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-rw-r--r--Documentation/block/biodoc.txt20
-rw-r--r--Documentation/block/ioprio.txt11
-rw-r--r--Documentation/dvb/faq.txt2
-rw-r--r--Documentation/feature-removal-schedule.txt12
-rw-r--r--Documentation/kernel-parameters.txt3
-rw-r--r--Documentation/lguest/lguest.c2
-rw-r--r--Documentation/video4linux/CARDLIST.bttv1
-rw-r--r--Documentation/video4linux/CARDLIST.cx238855
-rw-r--r--Documentation/video4linux/CARDLIST.saa71345
-rw-r--r--Kbuild8
-rw-r--r--MAINTAINERS41
-rw-r--r--Makefile39
-rw-r--r--arch/arm/mach-imx/mx1ads.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c18
-rw-r--r--arch/arm/mach-pxa/spitz.c18
-rw-r--r--arch/avr32/boards/atngw100/flash.c5
-rw-r--r--arch/avr32/boards/atngw100/setup.c14
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c1
-rw-r--r--arch/avr32/boards/atstk1000/flash.c5
-rw-r--r--arch/avr32/kernel/Makefile5
-rw-r--r--arch/avr32/kernel/entry-avr32b.S26
-rw-r--r--arch/avr32/kernel/setup.c2
-rw-r--r--arch/avr32/kernel/vmlinux.lds.S143
-rw-r--r--arch/avr32/kernel/vmlinux.lds.c142
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c74
-rw-r--r--arch/avr32/mach-at32ap/clock.c116
-rw-r--r--arch/avr32/mach-at32ap/hsmc.c129
-rw-r--r--arch/avr32/mach-at32ap/pio.c4
-rw-r--r--arch/avr32/mach-at32ap/pm.h8
-rw-r--r--arch/avr32/mm/init.c12
-rw-r--r--arch/blackfin/Kconfig365
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig243
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig280
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig296
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig480
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig223
-rw-r--r--arch/blackfin/configs/PNAV-10_defconfig296
-rw-r--r--arch/blackfin/kernel/Makefile5
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c81
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c549
-rw-r--r--arch/blackfin/kernel/bfin_ksyms.c1
-rw-r--r--arch/blackfin/kernel/cacheinit.c5
-rw-r--r--arch/blackfin/kernel/cplbinit.c7
-rw-r--r--arch/blackfin/kernel/early_printk.c214
-rw-r--r--arch/blackfin/kernel/irqchip.c12
-rw-r--r--arch/blackfin/kernel/process.c28
-rw-r--r--arch/blackfin/kernel/ptrace.c24
-rw-r--r--arch/blackfin/kernel/reboot.c78
-rw-r--r--arch/blackfin/kernel/setup.c90
-rw-r--r--arch/blackfin/kernel/traps.c110
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S48
-rw-r--r--arch/blackfin/lib/memcmp.S2
-rw-r--r--arch/blackfin/lib/memcpy.S2
-rw-r--r--arch/blackfin/lib/memmove.S4
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c81
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c91
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c119
-rw-r--r--arch/blackfin/mach-bf533/head.S344
-rw-r--r--arch/blackfin/mach-bf537/Kconfig27
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c87
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c397
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c53
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c142
-rw-r--r--arch/blackfin/mach-bf537/head.S128
-rw-r--r--arch/blackfin/mach-bf548/Kconfig11
-rw-r--r--arch/blackfin/mach-bf548/Makefile2
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c477
-rw-r--r--arch/blackfin/mach-bf548/gpio.c323
-rw-r--r--arch/blackfin/mach-bf548/head.S156
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c84
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c82
-rw-r--r--arch/blackfin/mach-bf561/head.S102
-rw-r--r--arch/blackfin/mach-common/Makefile2
-rw-r--r--arch/blackfin/mach-common/arch_checks.c60
-rw-r--r--arch/blackfin/mach-common/cache.S8
-rw-r--r--arch/blackfin/mach-common/cacheinit.S14
-rw-r--r--arch/blackfin/mach-common/cplbhdlr.S8
-rw-r--r--arch/blackfin/mach-common/cplbmgr.S56
-rw-r--r--arch/blackfin/mach-common/dpmc.S54
-rw-r--r--arch/blackfin/mach-common/entry.S268
-rw-r--r--arch/blackfin/mach-common/interrupt.S56
-rw-r--r--arch/blackfin/mach-common/ints-priority-dc.c13
-rw-r--r--arch/blackfin/mach-common/ints-priority-sc.c17
-rw-r--r--arch/blackfin/mach-common/lock.S24
-rw-r--r--arch/blackfin/mm/init.c2
-rw-r--r--arch/blackfin/oprofile/op_blackfin.h8
-rw-r--r--arch/i386/Kconfig8
-rw-r--r--arch/i386/Makefile72
-rw-r--r--arch/i386/boot/Makefile171
-rw-r--r--arch/i386/boot/compressed/Makefile50
-rw-r--r--arch/i386/crypto/Makefile12
-rw-r--r--arch/i386/kernel/Makefile88
-rw-r--r--arch/i386/kernel/acpi/Makefile10
-rw-r--r--arch/i386/kernel/acpi/boot.c1326
-rw-r--r--arch/i386/kernel/acpi/sleep.c110
-rw-r--r--arch/i386/kernel/apm.c2403
-rw-r--r--arch/i386/kernel/asm-offsets.c147
-rw-r--r--arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c799
-rw-r--r--arch/i386/kernel/cpu/mtrr/state.c79
-rw-r--r--arch/i386/kernel/early_printk.c2
-rw-r--r--arch/i386/kernel/entry.S1112
-rw-r--r--arch/i386/kernel/head.S578
-rw-r--r--arch/i386/kernel/reboot.c413
-rw-r--r--arch/i386/kernel/signal.c667
-rw-r--r--arch/i386/kernel/tsc.c413
-rw-r--r--arch/i386/kernel/tsc_sync.c1
-rw-r--r--arch/i386/kernel/vsyscall-int80.S53
-rw-r--r--arch/i386/kernel/vsyscall-note.S45
-rw-r--r--arch/i386/kernel/vsyscall-sysenter.S122
-rw-r--r--arch/i386/kernel/vsyscall.S15
-rw-r--r--arch/i386/lib/Makefile11
-rw-r--r--arch/i386/mach-generic/Makefile7
-rw-r--r--arch/i386/mach-generic/bigsmp.c57
-rw-r--r--arch/i386/mach-voyager/Makefile8
-rw-r--r--arch/i386/mm/Makefile10
-rw-r--r--arch/i386/pci/Makefile14
-rw-r--r--arch/i386/pci/common.c480
-rw-r--r--arch/i386/pci/irq.c1173
-rw-r--r--arch/ia64/ia32/audit.c2
-rw-r--r--arch/mips/Kconfig99
-rw-r--r--arch/mips/Makefile48
-rw-r--r--arch/mips/arc/env.c27
-rw-r--r--arch/mips/arc/file.c75
-rw-r--r--arch/mips/arc/identify.c123
-rw-r--r--arch/mips/arc/memory.c160
-rw-r--r--arch/mips/arc/misc.c89
-rw-r--r--arch/mips/arc/time.c25
-rw-r--r--arch/mips/arc/tree.c127
-rw-r--r--arch/mips/au1000/common/dbdma.c6
-rw-r--r--arch/mips/au1000/common/dbg_io.c2
-rw-r--r--arch/mips/au1000/common/irq.c15
-rw-r--r--arch/mips/au1000/common/power.c2
-rw-r--r--arch/mips/au1000/common/reset.c2
-rw-r--r--arch/mips/au1000/common/setup.c2
-rw-r--r--arch/mips/au1000/common/time.c46
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c2
-rw-r--r--arch/mips/au1000/db1x00/init.c8
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c2
-rw-r--r--arch/mips/au1000/mtx-1/init.c1
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1000/init.c1
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1100/init.c1
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c8
-rw-r--r--arch/mips/au1000/pb1200/init.c1
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c2
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1500/init.c1
-rw-r--r--arch/mips/au1000/pb1550/board_setup.c2
-rw-r--r--arch/mips/au1000/pb1550/init.c1
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c2
-rw-r--r--arch/mips/au1000/xxs1500/init.c1
-rw-r--r--arch/mips/basler/excite/excite_prom.c1
-rw-r--r--arch/mips/basler/excite/excite_setup.c17
-rw-r--r--arch/mips/bcm47xx/Makefile6
-rw-r--r--arch/mips/bcm47xx/gpio.c79
-rw-r--r--arch/mips/bcm47xx/irq.c55
-rw-r--r--arch/mips/bcm47xx/prom.c158
-rw-r--r--arch/mips/bcm47xx/serial.c52
-rw-r--r--arch/mips/bcm47xx/setup.c123
-rw-r--r--arch/mips/bcm47xx/time.c55
-rw-r--r--arch/mips/bcm47xx/wgt634u.c64
-rw-r--r--arch/mips/boot/addinitrd.c60
-rw-r--r--arch/mips/boot/elf2ecoff.c2
-rw-r--r--arch/mips/cobalt/Makefile2
-rw-r--r--arch/mips/cobalt/console.c9
-rw-r--r--arch/mips/cobalt/irq.c116
-rw-r--r--arch/mips/cobalt/led.c62
-rw-r--r--arch/mips/cobalt/reset.c39
-rw-r--r--arch/mips/cobalt/rtc.c5
-rw-r--r--arch/mips/cobalt/serial.c7
-rw-r--r--arch/mips/cobalt/setup.c20
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig23
-rw-r--r--arch/mips/configs/lasat_defconfig828
-rw-r--r--arch/mips/configs/mtx1_defconfig3115
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/dec/ecc-berr.c2
-rw-r--r--arch/mips/dec/kn02xa-berr.c2
-rw-r--r--arch/mips/dec/prom/identify.c3
-rw-r--r--arch/mips/dec/prom/init.c8
-rw-r--r--arch/mips/dec/setup.c4
-rw-r--r--arch/mips/dec/time.c13
-rw-r--r--arch/mips/emma2rh/common/prom.c2
-rw-r--r--arch/mips/emma2rh/markeins/setup.c4
-rw-r--r--arch/mips/fw/arc/Makefile (renamed from arch/mips/arc/Makefile)0
-rw-r--r--arch/mips/fw/arc/arc_con.c (renamed from arch/mips/arc/arc_con.c)0
-rw-r--r--arch/mips/fw/arc/cmdline.c (renamed from arch/mips/arc/cmdline.c)0
-rw-r--r--arch/mips/fw/arc/env.c27
-rw-r--r--arch/mips/fw/arc/file.c75
-rw-r--r--arch/mips/fw/arc/identify.c121
-rw-r--r--arch/mips/fw/arc/init.c (renamed from arch/mips/arc/init.c)0
-rw-r--r--arch/mips/fw/arc/memory.c160
-rw-r--r--arch/mips/fw/arc/misc.c89
-rw-r--r--arch/mips/fw/arc/promlib.c (renamed from arch/mips/arc/promlib.c)0
-rw-r--r--arch/mips/fw/arc/salone.c (renamed from arch/mips/arc/salone.c)0
-rw-r--r--arch/mips/fw/arc/time.c25
-rw-r--r--arch/mips/fw/arc/tree.c127
-rw-r--r--arch/mips/fw/cfe/Makefile5
-rw-r--r--arch/mips/fw/cfe/cfe_api.c502
-rw-r--r--arch/mips/fw/cfe/cfe_api_int.h (renamed from arch/mips/sibyte/cfe/cfe_api_int.h)0
-rw-r--r--arch/mips/gt64120/wrppmc/Makefile2
-rw-r--r--arch/mips/gt64120/wrppmc/irq.c23
-rw-r--r--arch/mips/gt64120/wrppmc/pci.c3
-rw-r--r--arch/mips/gt64120/wrppmc/reset.c10
-rw-r--r--arch/mips/gt64120/wrppmc/serial.c80
-rw-r--r--arch/mips/gt64120/wrppmc/setup.c39
-rw-r--r--arch/mips/gt64120/wrppmc/time.c13
-rw-r--r--arch/mips/jazz/Makefile2
-rw-r--r--arch/mips/jazz/irq.c142
-rw-r--r--arch/mips/jazz/jazz-platform.c60
-rw-r--r--arch/mips/jazz/jazzdma.c47
-rw-r--r--arch/mips/jazz/reset.c4
-rw-r--r--arch/mips/jazz/setup.c134
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c1
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c8
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c4
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c2
-rw-r--r--arch/mips/kernel/cpu-bugs64.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c129
-rw-r--r--arch/mips/kernel/gdb-stub.c26
-rw-r--r--arch/mips/kernel/i8253.c213
-rw-r--r--arch/mips/kernel/i8259.c37
-rw-r--r--arch/mips/kernel/irixelf.c40
-rw-r--r--arch/mips/kernel/irixinv.c42
-rw-r--r--arch/mips/kernel/irixioctl.c2
-rw-r--r--arch/mips/kernel/irixsig.c8
-rw-r--r--arch/mips/kernel/irq-gt641xx.c131
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq.c4
-rw-r--r--arch/mips/kernel/kspd.c12
-rw-r--r--arch/mips/kernel/linux32.c24
-rw-r--r--arch/mips/kernel/mips-mt.c2
-rw-r--r--arch/mips/kernel/proc.c73
-rw-r--r--arch/mips/kernel/process.c11
-rw-r--r--arch/mips/kernel/ptrace.c50
-rw-r--r--arch/mips/kernel/ptrace32.c16
-rw-r--r--arch/mips/kernel/setup.c2
-rw-r--r--arch/mips/kernel/signal.c4
-rw-r--r--arch/mips/kernel/signal32.c44
-rw-r--r--arch/mips/kernel/signal_n32.c4
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/smp.c123
-rw-r--r--arch/mips/kernel/smtc.c146
-rw-r--r--arch/mips/kernel/syscall.c60
-rw-r--r--arch/mips/kernel/sysirix.c22
-rw-r--r--arch/mips/kernel/time.c416
-rw-r--r--arch/mips/kernel/traps.c45
-rw-r--r--arch/mips/kernel/unaligned.c2
-rw-r--r--arch/mips/kernel/vmlinux.lds.S339
-rw-r--r--arch/mips/kernel/vpe.c47
-rw-r--r--arch/mips/lasat/Kconfig15
-rw-r--r--arch/mips/lasat/Makefile16
-rw-r--r--arch/mips/lasat/at93c.c149
-rw-r--r--arch/mips/lasat/at93c.h18
-rw-r--r--arch/mips/lasat/ds1603.c183
-rw-r--r--arch/mips/lasat/ds1603.h31
-rw-r--r--arch/mips/lasat/image/Makefile54
-rw-r--r--arch/mips/lasat/image/head.S31
-rw-r--r--arch/mips/lasat/image/romscript.normal23
-rw-r--r--arch/mips/lasat/interrupt.c130
-rw-r--r--arch/mips/lasat/lasat_board.c280
-rw-r--r--arch/mips/lasat/lasat_models.h67
-rw-r--r--arch/mips/lasat/picvue.c244
-rw-r--r--arch/mips/lasat/picvue.h48
-rw-r--r--arch/mips/lasat/picvue_proc.c191
-rw-r--r--arch/mips/lasat/prom.c126
-rw-r--r--arch/mips/lasat/prom.h7
-rw-r--r--arch/mips/lasat/reset.c61
-rw-r--r--arch/mips/lasat/serial.c94
-rw-r--r--arch/mips/lasat/setup.c154
-rw-r--r--arch/mips/lasat/sysctl.c456
-rw-r--r--arch/mips/lasat/sysctl.h24
-rw-r--r--arch/mips/lemote/lm2e/Makefile1
-rw-r--r--arch/mips/lemote/lm2e/prom.c1
-rw-r--r--arch/mips/lemote/lm2e/setup.c7
-rw-r--r--arch/mips/lib/ucmpdi2.c2
-rw-r--r--arch/mips/math-emu/cp1emu.c32
-rw-r--r--arch/mips/math-emu/dp_mul.c2
-rw-r--r--arch/mips/math-emu/ieee754.c12
-rw-r--r--arch/mips/math-emu/ieee754dp.h12
-rw-r--r--arch/mips/math-emu/ieee754int.h30
-rw-r--r--arch/mips/math-emu/ieee754sp.h12
-rw-r--r--arch/mips/mips-boards/atlas/atlas_gdb.c2
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c22
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c7
-rw-r--r--arch/mips/mips-boards/generic/init.c12
-rw-r--r--arch/mips/mips-boards/generic/memory.c4
-rw-r--r--arch/mips/mips-boards/generic/pci.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c149
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c36
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c16
-rw-r--r--arch/mips/mips-boards/malta/malta_smtc.c50
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c2
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c5
-rw-r--r--arch/mips/mipssim/sim_int.c2
-rw-r--r--arch/mips/mipssim/sim_mem.c4
-rw-r--r--arch/mips/mipssim/sim_setup.c2
-rw-r--r--arch/mips/mipssim/sim_time.c76
-rw-r--r--arch/mips/mm/Makefile2
-rw-r--r--arch/mips/mm/c-r3k.c12
-rw-r--r--arch/mips/mm/c-r4k.c116
-rw-r--r--arch/mips/mm/c-sb1.c535
-rw-r--r--arch/mips/mm/c-tx39.c6
-rw-r--r--arch/mips/mm/cache.c9
-rw-r--r--arch/mips/mm/cerr-sb1.c24
-rw-r--r--arch/mips/mm/dma-default.c4
-rw-r--r--arch/mips/mm/pg-r4k.c22
-rw-r--r--arch/mips/mm/pg-sb1.c12
-rw-r--r--arch/mips/mm/pgtable.c8
-rw-r--r--arch/mips/mm/sc-mips.c2
-rw-r--r--arch/mips/mm/tlb-r4k.c2
-rw-r--r--arch/mips/mm/tlb-r8k.c2
-rw-r--r--arch/mips/mm/tlbex.c210
-rw-r--r--arch/mips/oprofile/common.c2
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c6
-rw-r--r--arch/mips/oprofile/op_model_rm9000.c2
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-atlas.c6
-rw-r--r--arch/mips/pci/fixup-cobalt.c40
-rw-r--r--arch/mips/pci/ops-au1000.c2
-rw-r--r--arch/mips/pci/ops-nile4.c147
-rw-r--r--arch/mips/pci/ops-sni.c22
-rw-r--r--arch/mips/pci/pci-bcm1480.c6
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c4
-rw-r--r--arch/mips/pci/pci-lasat.c91
-rw-r--r--arch/mips/pci/pci-sb1250.c4
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
-rw-r--r--arch/mips/philips/pnx8550/common/proc.c36
-rw-r--r--arch/mips/philips/pnx8550/common/setup.c3
-rw-r--r--arch/mips/philips/pnx8550/common/time.c7
-rw-r--r--arch/mips/philips/pnx8550/jbs/init.c1
-rw-r--r--arch/mips/philips/pnx8550/stb810/prom_init.c1
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c2
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_serial.c8
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_setup.c18
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_time.c3
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_usb.c8
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-rw-r--r--include/asm-x86/unistd.h13
-rw-r--r--include/asm-x86/unistd_32.h (renamed from include/asm-i386/unistd.h)0
-rw-r--r--include/asm-x86/unistd_64.h (renamed from include/asm-x86_64/unistd.h)0
-rw-r--r--include/asm-x86/unwind.h5
-rw-r--r--include/asm-x86/unwind_32.h (renamed from include/asm-i386/unwind.h)0
-rw-r--r--include/asm-x86/unwind_64.h (renamed from include/asm-x86_64/unwind.h)0
-rw-r--r--include/asm-x86/user.h13
-rw-r--r--include/asm-x86/user32.h (renamed from include/asm-x86_64/user32.h)0
-rw-r--r--include/asm-x86/user_32.h (renamed from include/asm-i386/user.h)0
-rw-r--r--include/asm-x86/user_64.h (renamed from include/asm-x86_64/user.h)0
-rw-r--r--include/asm-x86/vga.h (renamed from include/asm-i386/vga.h)0
-rw-r--r--include/asm-x86/vgtod.h (renamed from include/asm-x86_64/vgtod.h)0
-rw-r--r--include/asm-x86/vic.h (renamed from include/asm-i386/vic.h)0
-rw-r--r--include/asm-x86/vm86.h (renamed from include/asm-i386/vm86.h)0
-rw-r--r--include/asm-x86/vmi.h (renamed from include/asm-i386/vmi.h)0
-rw-r--r--include/asm-x86/vmi_time.h (renamed from include/asm-i386/vmi_time.h)0
-rw-r--r--include/asm-x86/voyager.h (renamed from include/asm-i386/voyager.h)0
-rw-r--r--include/asm-x86/vsyscall.h (renamed from include/asm-x86_64/vsyscall.h)0
-rw-r--r--include/asm-x86/vsyscall32.h (renamed from include/asm-x86_64/vsyscall32.h)0
-rw-r--r--include/asm-x86/xen/hypercall.h (renamed from include/asm-i386/xen/hypercall.h)0
-rw-r--r--include/asm-x86/xen/hypervisor.h (renamed from include/asm-i386/xen/hypervisor.h)0
-rw-r--r--include/asm-x86/xen/interface.h (renamed from include/asm-i386/xen/interface.h)0
-rw-r--r--include/asm-x86/xor.h5
-rw-r--r--include/asm-x86/xor_32.h (renamed from include/asm-i386/xor.h)0
-rw-r--r--include/asm-x86/xor_64.h (renamed from include/asm-x86_64/xor.h)0
-rw-r--r--include/asm-x86_64/Kbuild21
-rw-r--r--include/asm-x86_64/boot.h1
-rw-r--r--include/asm-x86_64/bootparam.h1
-rw-r--r--include/asm-x86_64/cpu.h1
-rw-r--r--include/asm-x86_64/cpufeature.h30
-rw-r--r--include/asm-x86_64/emergency-restart.h6
-rw-r--r--include/asm-x86_64/fcntl.h1
-rw-r--r--include/asm-x86_64/hpet.h18
-rw-r--r--include/asm-x86_64/hypertransport.h1
-rw-r--r--include/asm-x86_64/ide.h1
-rw-r--r--include/asm-x86_64/ioctl.h1
-rw-r--r--include/asm-x86_64/ist.h1
-rw-r--r--include/asm-x86_64/msidef.h1
-rw-r--r--include/asm-x86_64/msr-index.h1
-rw-r--r--include/asm-x86_64/node.h1
-rw-r--r--include/asm-x86_64/poll.h1
-rw-r--r--include/asm-x86_64/processor-flags.h1
-rw-r--r--include/asm-x86_64/socket.h55
-rw-r--r--include/asm-x86_64/spinlock_types.h20
-rw-r--r--include/asm-x86_64/therm_throt.h1
-rw-r--r--include/asm-x86_64/tsc.h1
-rw-r--r--include/asm-x86_64/vga.h20
-rw-r--r--include/linux/backlight.h9
-rw-r--r--include/linux/bio.h6
-rw-r--r--include/linux/blkdev.h25
-rw-r--r--include/linux/blktrace_api.h12
-rw-r--r--include/linux/dmi.h22
-rw-r--r--include/linux/i2c-id.h2
-rw-r--r--include/linux/ide.h34
-rw-r--r--include/linux/ivtv.h72
-rw-r--r--include/linux/ivtvfb.h42
-rw-r--r--include/linux/mmc/card.h32
-rw-r--r--include/linux/mmc/core.h63
-rw-r--r--include/linux/mmc/host.h39
-rw-r--r--include/linux/mmc/mmc.h39
-rw-r--r--include/linux/mmc/sdio.h159
-rw-r--r--include/linux/mmc/sdio_func.h153
-rw-r--r--include/linux/mmc/sdio_ids.h23
-rw-r--r--include/linux/mod_devicetable.h11
-rw-r--r--include/linux/pci_ids.h7
-rw-r--r--include/linux/spi/mmc_spi.h33
-rw-r--r--include/linux/swap.h2
-rw-r--r--include/linux/umem.h138
-rw-r--r--include/linux/videodev2.h7
-rw-r--r--include/linux/writeback.h1
-rw-r--r--include/media/cx2341x.h2
-rw-r--r--include/media/ir-common.h1
-rw-r--r--include/media/ivtv.h65
-rw-r--r--include/media/saa7146.h1
-rw-r--r--include/media/saa7146_vv.h2
-rw-r--r--include/media/tuner-types.h4
-rw-r--r--include/media/tuner.h1
-rw-r--r--include/media/v4l2-chip-ident.h3
-rw-r--r--include/media/v4l2-dev.h16
-rw-r--r--include/media/v4l2-int-device.h278
-rw-r--r--include/media/video-buf.h289
-rw-r--r--include/media/videobuf-core.h236
-rw-r--r--include/media/videobuf-dma-sg.h122
-rw-r--r--include/media/videobuf-dvb.h (renamed from include/media/video-buf-dvb.h)0
-rw-r--r--include/media/videobuf-vmalloc.h41
-rw-r--r--kernel/sched.c1
-rw-r--r--mm/bounce.c25
-rw-r--r--mm/page_io.c12
-rw-r--r--mm/readahead.c1
-rwxr-xr-xscripts/checkstack.pl5
-rwxr-xr-xscripts/checksyscalls.sh2
-rw-r--r--scripts/mod/file2alias.c19
-rwxr-xr-xscripts/namespace.pl8
2178 files changed, 65410 insertions, 39449 deletions
diff --git a/Documentation/block/biodoc.txt b/Documentation/block/biodoc.txt
index 8af392fc6ef0..dc3f49e3e539 100644
--- a/Documentation/block/biodoc.txt
+++ b/Documentation/block/biodoc.txt
@@ -477,9 +477,9 @@ With this multipage bio design:
477 the same bi_io_vec array, but with the index and size accordingly modified) 477 the same bi_io_vec array, but with the index and size accordingly modified)
478- A linked list of bios is used as before for unrelated merges (*) - this 478- A linked list of bios is used as before for unrelated merges (*) - this
479 avoids reallocs and makes independent completions easier to handle. 479 avoids reallocs and makes independent completions easier to handle.
480- Code that traverses the req list needs to make a distinction between 480- Code that traverses the req list can find all the segments of a bio
481 segments of a request (bio_for_each_segment) and the distinct completion 481 by using rq_for_each_segment. This handles the fact that a request
482 units/bios (rq_for_each_bio). 482 has multiple bios, each of which can have multiple segments.
483- Drivers which can't process a large bio in one shot can use the bi_idx 483- Drivers which can't process a large bio in one shot can use the bi_idx
484 field to keep track of the next bio_vec entry to process. 484 field to keep track of the next bio_vec entry to process.
485 (e.g a 1MB bio_vec needs to be handled in max 128kB chunks for IDE) 485 (e.g a 1MB bio_vec needs to be handled in max 128kB chunks for IDE)
@@ -664,14 +664,14 @@ in lvm or md.
664 664
6653.2.1 Traversing segments and completion units in a request 6653.2.1 Traversing segments and completion units in a request
666 666
667The macros bio_for_each_segment() and rq_for_each_bio() should be used for 667The macro rq_for_each_segment() should be used for traversing the bios
668traversing the bios in the request list (drivers should avoid directly 668in the request list (drivers should avoid directly trying to do it
669trying to do it themselves). Using these helpers should also make it easier 669themselves). Using these helpers should also make it easier to cope
670to cope with block changes in the future. 670with block changes in the future.
671 671
672 rq_for_each_bio(bio, rq) 672 struct req_iterator iter;
673 bio_for_each_segment(bio_vec, bio, i) 673 rq_for_each_segment(bio_vec, rq, iter)
674 /* bio_vec is now current segment */ 674 /* bio_vec is now current segment */
675 675
676I/O completion callbacks are per-bio rather than per-segment, so drivers 676I/O completion callbacks are per-bio rather than per-segment, so drivers
677that traverse bio chains on completion need to keep that in mind. Drivers 677that traverse bio chains on completion need to keep that in mind. Drivers
diff --git a/Documentation/block/ioprio.txt b/Documentation/block/ioprio.txt
index 1b930ef5a079..35e516b0b8a9 100644
--- a/Documentation/block/ioprio.txt
+++ b/Documentation/block/ioprio.txt
@@ -86,8 +86,15 @@ extern int sys_ioprio_get(int, int);
86#error "Unsupported arch" 86#error "Unsupported arch"
87#endif 87#endif
88 88
89_syscall3(int, ioprio_set, int, which, int, who, int, ioprio); 89static inline int ioprio_set(int which, int who, int ioprio)
90_syscall2(int, ioprio_get, int, which, int, who); 90{
91 return syscall(__NR_ioprio_set, which, who, ioprio);
92}
93
94static inline int ioprio_get(int which, int who)
95{
96 return syscall(__NR_ioprio_get, which, who);
97}
91 98
92enum { 99enum {
93 IOPRIO_CLASS_NONE, 100 IOPRIO_CLASS_NONE,
diff --git a/Documentation/dvb/faq.txt b/Documentation/dvb/faq.txt
index dbcedf5833ee..2511a335abd6 100644
--- a/Documentation/dvb/faq.txt
+++ b/Documentation/dvb/faq.txt
@@ -150,7 +150,7 @@ Some very frequently asked questions about linuxtv-dvb
150 - saa7146_vv: SAA7146 video and vbi functions. These are only needed 150 - saa7146_vv: SAA7146 video and vbi functions. These are only needed
151 for full-featured cards. 151 for full-featured cards.
152 152
153 - video-buf: capture helper module for the saa7146_vv driver. This 153 - videobuf-dma-sg: capture helper module for the saa7146_vv driver. This
154 one is responsible to handle capture buffers. 154 one is responsible to handle capture buffers.
155 155
156 - dvb-ttpci: The main driver for AV7110 based, full-featured 156 - dvb-ttpci: The main driver for AV7110 based, full-featured
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 64831def40ab..63df2262d41a 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -307,6 +307,16 @@ Who: Stephen Hemminger <shemminger@linux-foundation.org>
307 307
308--------------------------- 308---------------------------
309 309
310What: i386/x86_64 bzImage symlinks
311When: April 2008
312
313Why: The i386/x86_64 merge provides a symlink to the old bzImage
314 location so not yet updated user space tools, e.g. package
315 scripts, do not break.
316Who: Thomas Gleixner <tglx@linutronix.de>
317
318---------------------------
319
310What: shaper network driver 320What: shaper network driver
311When: January 2008 321When: January 2008
312Files: drivers/net/shaper.c, include/linux/if_shaper.h 322Files: drivers/net/shaper.c, include/linux/if_shaper.h
@@ -315,3 +325,5 @@ Why: This driver has been marked obsolete for many years.
315 flaws that lead to machine crashes. The qdisc infrastructure in 325 flaws that lead to machine crashes. The qdisc infrastructure in
316 2.4 or later kernels, provides richer features and is more robust. 326 2.4 or later kernels, provides richer features and is more robust.
317Who: Stephen Hemminger <shemminger@linux-foundation.org> 327Who: Stephen Hemminger <shemminger@linux-foundation.org>
328
329---------------------------
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 4d175c751246..a57c1f216b21 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -35,6 +35,7 @@ parameter is applicable:
35 APIC APIC support is enabled. 35 APIC APIC support is enabled.
36 APM Advanced Power Management support is enabled. 36 APM Advanced Power Management support is enabled.
37 AX25 Appropriate AX.25 support is enabled. 37 AX25 Appropriate AX.25 support is enabled.
38 BLACKFIN Blackfin architecture is enabled.
38 DRM Direct Rendering Management support is enabled. 39 DRM Direct Rendering Management support is enabled.
39 EDD BIOS Enhanced Disk Drive Services (EDD) is enabled 40 EDD BIOS Enhanced Disk Drive Services (EDD) is enabled
40 EFI EFI Partitioning (GPT) is enabled 41 EFI EFI Partitioning (GPT) is enabled
@@ -550,7 +551,7 @@ and is between 256 and 4096 characters. It is defined in the file
550 551
551 dtc3181e= [HW,SCSI] 552 dtc3181e= [HW,SCSI]
552 553
553 earlyprintk= [X86-32,X86-64,SH] 554 earlyprintk= [X86-32,X86-64,SH,BLACKFIN]
554 earlyprintk=vga 555 earlyprintk=vga
555 earlyprintk=serial[,ttySn[,baudrate]] 556 earlyprintk=serial[,ttySn[,baudrate]]
556 557
diff --git a/Documentation/lguest/lguest.c b/Documentation/lguest/lguest.c
index 73c5f1f3d5d2..103e346c8b6a 100644
--- a/Documentation/lguest/lguest.c
+++ b/Documentation/lguest/lguest.c
@@ -46,7 +46,7 @@ typedef uint32_t u32;
46typedef uint16_t u16; 46typedef uint16_t u16;
47typedef uint8_t u8; 47typedef uint8_t u8;
48#include "../../include/linux/lguest_launcher.h" 48#include "../../include/linux/lguest_launcher.h"
49#include "../../include/asm-i386/e820.h" 49#include "../../include/asm-x86/e820_32.h"
50/*:*/ 50/*:*/
51 51
52#define PAGE_PRESENT 0x7 /* Present, RW, Execute */ 52#define PAGE_PRESENT 0x7 /* Present, RW, Execute */
diff --git a/Documentation/video4linux/CARDLIST.bttv b/Documentation/video4linux/CARDLIST.bttv
index 177159c5f4c4..d97cf7cc6088 100644
--- a/Documentation/video4linux/CARDLIST.bttv
+++ b/Documentation/video4linux/CARDLIST.bttv
@@ -147,3 +147,4 @@
147146 -> SSAI Ultrasound Video Interface [414a:5353] 147146 -> SSAI Ultrasound Video Interface [414a:5353]
148147 -> VoodooTV 200 (USA) [121a:3000] 148147 -> VoodooTV 200 (USA) [121a:3000]
149148 -> DViCO FusionHDTV 2 [dbc0:d200] 149148 -> DViCO FusionHDTV 2 [dbc0:d200]
150149 -> Typhoon TV-Tuner PCI (50684)
diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885
new file mode 100644
index 000000000000..00cb646a4bde
--- /dev/null
+++ b/Documentation/video4linux/CARDLIST.cx23885
@@ -0,0 +1,5 @@
1 0 -> UNKNOWN/GENERIC [0070:3400]
2 1 -> Hauppauge WinTV-HVR1800lp [0070:7600]
3 2 -> Hauppauge WinTV-HVR1800 [0070:7800,0070:7801]
4 3 -> Hauppauge WinTV-HVR1250 [0070:7911]
5 4 -> DViCO FusionHDTV5 Express [18ac:d500]
diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134
index 3f8aeab50a10..a14545300e4c 100644
--- a/Documentation/video4linux/CARDLIST.saa7134
+++ b/Documentation/video4linux/CARDLIST.saa7134
@@ -88,11 +88,11 @@
88 87 -> ADS Instant TV Duo Cardbus PTV331 [0331:1421] 88 87 -> ADS Instant TV Duo Cardbus PTV331 [0331:1421]
89 88 -> Tevion/KWorld DVB-T 220RF [17de:7201] 89 88 -> Tevion/KWorld DVB-T 220RF [17de:7201]
90 89 -> ELSA EX-VISION 700TV [1048:226c] 90 89 -> ELSA EX-VISION 700TV [1048:226c]
91 90 -> Kworld ATSC110 [17de:7350] 91 90 -> Kworld ATSC110/115 [17de:7350,17de:7352]
92 91 -> AVerMedia A169 B [1461:7360] 92 91 -> AVerMedia A169 B [1461:7360]
93 92 -> AVerMedia A169 B1 [1461:6360] 93 92 -> AVerMedia A169 B1 [1461:6360]
94 93 -> Medion 7134 Bridge #2 [16be:0005] 94 93 -> Medion 7134 Bridge #2 [16be:0005]
95 94 -> LifeView FlyDVB-T Hybrid Cardbus [5168:3306,5168:3502] 95 94 -> LifeView FlyDVB-T Hybrid Cardbus/MSI TV @nywhere A/D NB [5168:3306,5168:3502,4e42:3502]
96 95 -> LifeView FlyVIDEO3000 (NTSC) [5169:0138] 96 95 -> LifeView FlyVIDEO3000 (NTSC) [5169:0138]
97 96 -> Medion Md8800 Quadro [16be:0007,16be:0008] 97 96 -> Medion Md8800 Quadro [16be:0007,16be:0008]
98 97 -> LifeView FlyDVB-S /Acorp TV134DS [5168:0300,4e42:0300] 98 97 -> LifeView FlyDVB-S /Acorp TV134DS [5168:0300,4e42:0300]
@@ -115,3 +115,4 @@
115114 -> KWorld DVB-T 210 [17de:7250] 115114 -> KWorld DVB-T 210 [17de:7250]
116115 -> Sabrent PCMCIA TV-PCB05 [0919:2003] 116115 -> Sabrent PCMCIA TV-PCB05 [0919:2003]
117116 -> 10MOONS TM300 TV Card [1131:2304] 117116 -> 10MOONS TM300 TV Card [1131:2304]
118117 -> Avermedia Super 007 [1461:f01d]
diff --git a/Kbuild b/Kbuild
index 56b8edf6a3bc..1570d248ad92 100644
--- a/Kbuild
+++ b/Kbuild
@@ -8,11 +8,11 @@
8# 1) Generate asm-offsets.h 8# 1) Generate asm-offsets.h
9# 9#
10 10
11offsets-file := include/asm-$(ARCH)/asm-offsets.h 11offsets-file := include/asm-$(SRCARCH)/asm-offsets.h
12 12
13always := $(offsets-file) 13always := $(offsets-file)
14targets := $(offsets-file) 14targets := $(offsets-file)
15targets += arch/$(ARCH)/kernel/asm-offsets.s 15targets += arch/$(SRCARCH)/kernel/asm-offsets.s
16clean-files := $(addprefix $(objtree)/,$(targets)) 16clean-files := $(addprefix $(objtree)/,$(targets))
17 17
18# Default sed regexp - multiline due to syntax constraints 18# Default sed regexp - multiline due to syntax constraints
@@ -40,11 +40,11 @@ define cmd_offsets
40endef 40endef
41 41
42# We use internal kbuild rules to avoid the "is up to date" message from make 42# We use internal kbuild rules to avoid the "is up to date" message from make
43arch/$(ARCH)/kernel/asm-offsets.s: arch/$(ARCH)/kernel/asm-offsets.c FORCE 43arch/$(SRCARCH)/kernel/asm-offsets.s: arch/$(SRCARCH)/kernel/asm-offsets.c FORCE
44 $(Q)mkdir -p $(dir $@) 44 $(Q)mkdir -p $(dir $@)
45 $(call if_changed_dep,cc_s_c) 45 $(call if_changed_dep,cc_s_c)
46 46
47$(obj)/$(offsets-file): arch/$(ARCH)/kernel/asm-offsets.s Kbuild 47$(obj)/$(offsets-file): arch/$(SRCARCH)/kernel/asm-offsets.s Kbuild
48 $(Q)mkdir -p $(dir $@) 48 $(Q)mkdir -p $(dir $@)
49 $(call cmd,offsets) 49 $(call cmd,offsets)
50 50
diff --git a/MAINTAINERS b/MAINTAINERS
index 16646801105c..8a1360045c2d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -726,34 +726,8 @@ M: rpurdie@rpsys.net
726S: Maintained 726S: Maintained
727 727
728BLACKFIN ARCHITECTURE 728BLACKFIN ARCHITECTURE
729P: Aubrey Li
730M: aubrey.li@analog.com
731P: Bernd Schmidt
732M: bernd.schmidt@analog.com
733P: Bryan Wu 729P: Bryan Wu
734M: bryan.wu@analog.com 730M: bryan.wu@analog.com
735P: Grace Pan
736M: grace.pan@analog.com
737P: Marc Hoffman
738M: marc.hoffman@analog.com
739P: Michael Hennerich
740M: michael.hennerich@analog.com
741P: Mike Frysinger
742M: michael.frysinger@analog.com
743P: Jerry Zeng
744M: jerry.zeng@analog.com
745P: Jie Zhang
746M: jie.zhang@analog.com
747P: Robin Getz
748M: robin.getz@analog.com
749P: Roy Huang
750M: roy.huang@analog.com
751P: Sonic Zhang
752M: sonic.zhang@analog.com
753P: Vivi Li
754M: vivi.li@analog.com
755P: Yi Li
756M: yi.li@analog.com
757L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only) 731L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
758W: http://blackfin.uclinux.org 732W: http://blackfin.uclinux.org
759S: Supported 733S: Supported
@@ -2596,12 +2570,18 @@ L: linux-kernel@vger.kernel.org
2596W: http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html 2570W: http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
2597S: Maintained 2571S: Maintained
2598 2572
2599MULTIMEDIA CARD (MMC) AND SECURE DIGITAL (SD) SUBSYSTEM 2573MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM
2600P: Pierre Ossman 2574P: Pierre Ossman
2601M: drzeus-mmc@drzeus.cx 2575M: drzeus-mmc@drzeus.cx
2602L: linux-kernel@vger.kernel.org 2576L: linux-kernel@vger.kernel.org
2603S: Maintained 2577S: Maintained
2604 2578
2579MULTIMEDIA CARD (MMC) ETC. OVER SPI
2580P: David Brownell
2581M: dbrownell@users.sourceforge.net
2582L: linux-kernel@vger.kernel.org
2583S: Odd fixes
2584
2605MULTISOUND SOUND DRIVER 2585MULTISOUND SOUND DRIVER
2606P: Andrew Veliath 2586P: Andrew Veliath
2607M: andrewtv@usa.net 2587M: andrewtv@usa.net
@@ -4249,6 +4229,13 @@ W: http://oss.sgi.com/projects/xfs
4249T: git git://oss.sgi.com:8090/xfs/xfs-2.6.git 4229T: git git://oss.sgi.com:8090/xfs/xfs-2.6.git
4250S: Supported 4230S: Supported
4251 4231
4232XILINX SYSTEMACE DRIVER
4233P: Grant Likely
4234M: grant.likely@secretlab.ca
4235W: http://www.secretlab.ca/
4236L: linux-kernel@vger.kernel.org
4237S: Maintained
4238
4252XILINX UARTLITE SERIAL DRIVER 4239XILINX UARTLITE SERIAL DRIVER
4253P: Peter Korsgaard 4240P: Peter Korsgaard
4254M: jacmet@sunsite.dk 4241M: jacmet@sunsite.dk
diff --git a/Makefile b/Makefile
index 4635a64da36c..1274084c9090 100644
--- a/Makefile
+++ b/Makefile
@@ -186,7 +186,8 @@ ARCH ?= $(SUBARCH)
186CROSS_COMPILE ?= 186CROSS_COMPILE ?=
187 187
188# Architecture as present in compile.h 188# Architecture as present in compile.h
189UTS_MACHINE := $(ARCH) 189UTS_MACHINE := $(ARCH)
190SRCARCH := $(ARCH)
190 191
191KCONFIG_CONFIG ?= .config 192KCONFIG_CONFIG ?= .config
192 193
@@ -322,7 +323,7 @@ KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
322KERNELVERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) 323KERNELVERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
323 324
324export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION 325export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION
325export ARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC 326export ARCH SRCARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC
326export CPP AR NM STRIP OBJCOPY OBJDUMP MAKE AWK GENKSYMS PERL UTS_MACHINE 327export CPP AR NM STRIP OBJCOPY OBJDUMP MAKE AWK GENKSYMS PERL UTS_MACHINE
327export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS 328export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS
328 329
@@ -609,7 +610,7 @@ libs-y := $(libs-y1) $(libs-y2)
609vmlinux-init := $(head-y) $(init-y) 610vmlinux-init := $(head-y) $(init-y)
610vmlinux-main := $(core-y) $(libs-y) $(drivers-y) $(net-y) 611vmlinux-main := $(core-y) $(libs-y) $(drivers-y) $(net-y)
611vmlinux-all := $(vmlinux-init) $(vmlinux-main) 612vmlinux-all := $(vmlinux-init) $(vmlinux-main)
612vmlinux-lds := arch/$(ARCH)/kernel/vmlinux.lds 613vmlinux-lds := arch/$(SRCARCH)/kernel/vmlinux.lds
613export KBUILD_VMLINUX_OBJS := $(vmlinux-all) 614export KBUILD_VMLINUX_OBJS := $(vmlinux-all)
614 615
615# Rule to link vmlinux - also used during CONFIG_KALLSYMS 616# Rule to link vmlinux - also used during CONFIG_KALLSYMS
@@ -862,7 +863,7 @@ ifneq ($(KBUILD_SRC),)
862 /bin/false; \ 863 /bin/false; \
863 fi; 864 fi;
864 $(Q)if [ ! -d include2 ]; then mkdir -p include2; fi; 865 $(Q)if [ ! -d include2 ]; then mkdir -p include2; fi;
865 $(Q)ln -fsn $(srctree)/include/asm-$(ARCH) include2/asm 866 $(Q)ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm
866endif 867endif
867 868
868# prepare2 creates a makefile if using a separate output directory 869# prepare2 creates a makefile if using a separate output directory
@@ -894,9 +895,9 @@ export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
894# before switching between archs anyway. 895# before switching between archs anyway.
895 896
896include/asm: 897include/asm:
897 @echo ' SYMLINK $@ -> include/asm-$(ARCH)' 898 @echo ' SYMLINK $@ -> include/asm-$(SRCARCH)'
898 $(Q)if [ ! -d include ]; then mkdir -p include; fi; 899 $(Q)if [ ! -d include ]; then mkdir -p include; fi;
899 @ln -fsn asm-$(ARCH) $@ 900 @ln -fsn asm-$(SRCARCH) $@
900 901
901# Generate some files 902# Generate some files
902# --------------------------------------------------------------------------- 903# ---------------------------------------------------------------------------
@@ -936,7 +937,8 @@ depend dep:
936INSTALL_HDR_PATH=$(objtree)/usr 937INSTALL_HDR_PATH=$(objtree)/usr
937export INSTALL_HDR_PATH 938export INSTALL_HDR_PATH
938 939
939HDRARCHES=$(filter-out generic,$(patsubst $(srctree)/include/asm-%/Kbuild,%,$(wildcard $(srctree)/include/asm-*/Kbuild))) 940HDRFILTER=generic i386 x86_64
941HDRARCHES=$(filter-out $(HDRFILTER),$(patsubst $(srctree)/include/asm-%/Kbuild,%,$(wildcard $(srctree)/include/asm-*/Kbuild)))
940 942
941PHONY += headers_install_all 943PHONY += headers_install_all
942headers_install_all: include/linux/version.h scripts_basic FORCE 944headers_install_all: include/linux/version.h scripts_basic FORCE
@@ -947,11 +949,11 @@ headers_install_all: include/linux/version.h scripts_basic FORCE
947 949
948PHONY += headers_install 950PHONY += headers_install
949headers_install: include/linux/version.h scripts_basic FORCE 951headers_install: include/linux/version.h scripts_basic FORCE
950 @if [ ! -r $(srctree)/include/asm-$(ARCH)/Kbuild ]; then \ 952 @if [ ! -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \
951 echo '*** Error: Headers not exportable for this architecture ($(ARCH))'; \ 953 echo '*** Error: Headers not exportable for this architecture ($(SRCARCH))'; \
952 exit 1 ; fi 954 exit 1 ; fi
953 $(Q)$(MAKE) $(build)=scripts scripts/unifdef 955 $(Q)$(MAKE) $(build)=scripts scripts/unifdef
954 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst obj=include 956 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst ARCH=$(SRCARCH) obj=include
955 957
956PHONY += headers_check_all 958PHONY += headers_check_all
957headers_check_all: headers_install_all 959headers_check_all: headers_install_all
@@ -961,7 +963,7 @@ headers_check_all: headers_install_all
961 963
962PHONY += headers_check 964PHONY += headers_check
963headers_check: headers_install 965headers_check: headers_install
964 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst obj=include HDRCHECK=1 966 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst ARCH=$(SRCARCH) obj=include HDRCHECK=1
965 967
966# --------------------------------------------------------------------------- 968# ---------------------------------------------------------------------------
967# Modules 969# Modules
@@ -1139,7 +1141,7 @@ help:
1139 @echo ' cscope - Generate cscope index' 1141 @echo ' cscope - Generate cscope index'
1140 @echo ' kernelrelease - Output the release version string' 1142 @echo ' kernelrelease - Output the release version string'
1141 @echo ' kernelversion - Output the version stored in Makefile' 1143 @echo ' kernelversion - Output the version stored in Makefile'
1142 @if [ -r $(srctree)/include/asm-$(ARCH)/Kbuild ]; then \ 1144 @if [ -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \
1143 echo ' headers_install - Install sanitised kernel headers to INSTALL_HDR_PATH'; \ 1145 echo ' headers_install - Install sanitised kernel headers to INSTALL_HDR_PATH'; \
1144 echo ' (default: $(INSTALL_HDR_PATH))'; \ 1146 echo ' (default: $(INSTALL_HDR_PATH))'; \
1145 fi 1147 fi
@@ -1147,7 +1149,7 @@ help:
1147 @echo 'Static analysers' 1149 @echo 'Static analysers'
1148 @echo ' checkstack - Generate a list of stack hogs' 1150 @echo ' checkstack - Generate a list of stack hogs'
1149 @echo ' namespacecheck - Name space analysis on compiled kernel' 1151 @echo ' namespacecheck - Name space analysis on compiled kernel'
1150 @if [ -r $(srctree)/include/asm-$(ARCH)/Kbuild ]; then \ 1152 @if [ -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \
1151 echo ' headers_check - Sanity check on exported headers'; \ 1153 echo ' headers_check - Sanity check on exported headers'; \
1152 fi 1154 fi
1153 @echo '' 1155 @echo ''
@@ -1292,18 +1294,23 @@ ifeq ($(ALLSOURCE_ARCHS),)
1292ifeq ($(ARCH),um) 1294ifeq ($(ARCH),um)
1293ALLINCLUDE_ARCHS := $(ARCH) $(SUBARCH) 1295ALLINCLUDE_ARCHS := $(ARCH) $(SUBARCH)
1294else 1296else
1295ALLINCLUDE_ARCHS := $(ARCH) 1297ALLINCLUDE_ARCHS := $(SRCARCH)
1296endif 1298endif
1297else 1299else
1298#Allow user to specify only ALLSOURCE_PATHS on the command line, keeping existing behavour. 1300#Allow user to specify only ALLSOURCE_PATHS on the command line, keeping existing behavour.
1299ALLINCLUDE_ARCHS := $(ALLSOURCE_ARCHS) 1301ALLINCLUDE_ARCHS := $(ALLSOURCE_ARCHS)
1300endif 1302endif
1301 1303
1304# Take care of arch/x86
1305ifeq ($(ARCH), $(SRCARCH))
1302ALLSOURCE_ARCHS := $(ARCH) 1306ALLSOURCE_ARCHS := $(ARCH)
1307else
1308ALLSOURCE_ARCHS := $(ARCH) $(SRCARCH)
1309endif
1303 1310
1304define find-sources 1311define find-sources
1305 ( for ARCH in $(ALLSOURCE_ARCHS) ; do \ 1312 ( for ARCH in $(ALLSOURCE_ARCHS) ; do \
1306 find $(__srctree)arch/$${ARCH} $(RCS_FIND_IGNORE) \ 1313 find $(__srctree)arch/$${SRCARCH} $(RCS_FIND_IGNORE) \
1307 -name $1 -print; \ 1314 -name $1 -print; \
1308 done ; \ 1315 done ; \
1309 find $(__srctree)security/selinux/include $(RCS_FIND_IGNORE) \ 1316 find $(__srctree)security/selinux/include $(RCS_FIND_IGNORE) \
@@ -1312,7 +1319,7 @@ define find-sources
1312 \( -name config -o -name 'asm-*' \) -prune \ 1319 \( -name config -o -name 'asm-*' \) -prune \
1313 -o -name $1 -print; \ 1320 -o -name $1 -print; \
1314 for ARCH in $(ALLINCLUDE_ARCHS) ; do \ 1321 for ARCH in $(ALLINCLUDE_ARCHS) ; do \
1315 find $(__srctree)include/asm-$${ARCH} $(RCS_FIND_IGNORE) \ 1322 find $(__srctree)include/asm-$${SRCARCH} $(RCS_FIND_IGNORE) \
1316 -name $1 -print; \ 1323 -name $1 -print; \
1317 done ; \ 1324 done ; \
1318 find $(__srctree)include/asm-generic $(RCS_FIND_IGNORE) \ 1325 find $(__srctree)include/asm-generic $(RCS_FIND_IGNORE) \
diff --git a/arch/arm/mach-imx/mx1ads.c b/arch/arm/mach-imx/mx1ads.c
index da893c80d471..a9778c1587ab 100644
--- a/arch/arm/mach-imx/mx1ads.c
+++ b/arch/arm/mach-imx/mx1ads.c
@@ -116,7 +116,7 @@ static struct platform_device *devices[] __initdata = {
116}; 116};
117 117
118#ifdef CONFIG_MMC_IMX 118#ifdef CONFIG_MMC_IMX
119static int mx1ads_mmc_card_present(void) 119static int mx1ads_mmc_card_present(struct device *dev)
120{ 120{
121 /* MMC/SD Card Detect is PB 20 on MX1ADS V1.0.7 */ 121 /* MMC/SD Card Detect is PB 20 on MX1ADS V1.0.7 */
122 return (SSR(1) & (1 << 20) ? 0 : 1); 122 return (SSR(1) & (1 << 20) ? 0 : 1);
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index aab27297b3c6..2363cc64fe07 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -20,6 +20,7 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/pm.h> 22#include <linux/pm.h>
23#include <linux/backlight.h>
23 24
24#include <asm/setup.h> 25#include <asm/setup.h>
25#include <asm/memory.h> 26#include <asm/memory.h>
@@ -142,15 +143,28 @@ struct corgissp_machinfo corgi_ssp_machinfo = {
142/* 143/*
143 * Corgi Backlight Device 144 * Corgi Backlight Device
144 */ 145 */
145static struct corgibl_machinfo corgi_bl_machinfo = { 146static void corgi_bl_kick_battery(void)
147{
148 void (*kick_batt)(void);
149
150 kick_batt = symbol_get(sharpsl_battery_kick);
151 if (kick_batt) {
152 kick_batt();
153 symbol_put(sharpsl_battery_kick);
154 }
155}
156
157static struct generic_bl_info corgi_bl_machinfo = {
158 .name = "corgi-bl",
146 .max_intensity = 0x2f, 159 .max_intensity = 0x2f,
147 .default_intensity = 0x1f, 160 .default_intensity = 0x1f,
148 .limit_mask = 0x0b, 161 .limit_mask = 0x0b,
149 .set_bl_intensity = corgi_bl_set_intensity, 162 .set_bl_intensity = corgi_bl_set_intensity,
163 .kick_battery = corgi_bl_kick_battery,
150}; 164};
151 165
152static struct platform_device corgibl_device = { 166static struct platform_device corgibl_device = {
153 .name = "corgi-bl", 167 .name = "generic-bl",
154 .dev = { 168 .dev = {
155 .parent = &corgifb_device.dev, 169 .parent = &corgifb_device.dev,
156 .platform_data = &corgi_bl_machinfo, 170 .platform_data = &corgi_bl_machinfo,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index bae47e145de8..2d78199d24af 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/mmc/host.h> 22#include <linux/mmc/host.h>
23#include <linux/pm.h> 23#include <linux/pm.h>
24#include <linux/backlight.h>
24 25
25#include <asm/setup.h> 26#include <asm/setup.h>
26#include <asm/memory.h> 27#include <asm/memory.h>
@@ -222,14 +223,27 @@ struct corgissp_machinfo spitz_ssp_machinfo = {
222/* 223/*
223 * Spitz Backlight Device 224 * Spitz Backlight Device
224 */ 225 */
225static struct corgibl_machinfo spitz_bl_machinfo = { 226static void spitz_bl_kick_battery(void)
227{
228 void (*kick_batt)(void);
229
230 kick_batt = symbol_get(sharpsl_battery_kick);
231 if (kick_batt) {
232 kick_batt();
233 symbol_put(sharpsl_battery_kick);
234 }
235}
236
237static struct generic_bl_info spitz_bl_machinfo = {
238 .name = "corgi-bl",
226 .default_intensity = 0x1f, 239 .default_intensity = 0x1f,
227 .limit_mask = 0x0b, 240 .limit_mask = 0x0b,
228 .max_intensity = 0x2f, 241 .max_intensity = 0x2f,
242 .kick_battery = spitz_bl_kick_battery,
229}; 243};
230 244
231static struct platform_device spitzbl_device = { 245static struct platform_device spitzbl_device = {
232 .name = "corgi-bl", 246 .name = "generic-bl",
233 .dev = { 247 .dev = {
234 .platform_data = &spitz_bl_machinfo, 248 .platform_data = &spitz_bl_machinfo,
235 }, 249 },
diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
index f9b32a8eab9b..b07ae63aa548 100644
--- a/arch/avr32/boards/atngw100/flash.c
+++ b/arch/avr32/boards/atngw100/flash.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/arch/smc.h> 16#include <asm/arch/smc.h>
17 17
18static struct smc_config flash_config __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
20 .nrd_setup = 40, 20 .nrd_setup = 40,
21 .ncs_write_setup = 0, 21 .ncs_write_setup = 0,
@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
28 28
29 .read_cycle = 120, 29 .read_cycle = 120,
30 .write_cycle = 120, 30 .write_cycle = 120,
31};
31 32
33static struct smc_config flash_config __initdata = {
32 .bus_width = 2, 34 .bus_width = 2,
33 .nrd_controlled = 1, 35 .nrd_controlled = 1,
34 .nwe_controlled = 1, 36 .nwe_controlled = 1,
@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
82{ 84{
83 int ret; 85 int ret;
84 86
87 smc_set_timing(&flash_config, &flash_timing);
85 ret = smc_set_configuration(0, &flash_config); 88 ret = smc_set_configuration(0, &flash_config);
86 if (ret < 0) { 89 if (ret < 0) {
87 printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); 90 printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index ef801563bbf5..52987c81d668 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -125,8 +125,11 @@ static struct platform_device ngw_gpio_leds = {
125}; 125};
126 126
127static struct i2c_gpio_platform_data i2c_gpio_data = { 127static struct i2c_gpio_platform_data i2c_gpio_data = {
128 .sda_pin = GPIO_PIN_PA(6), 128 .sda_pin = GPIO_PIN_PA(6),
129 .scl_pin = GPIO_PIN_PA(7), 129 .scl_pin = GPIO_PIN_PA(7),
130 .sda_is_open_drain = 1,
131 .scl_is_open_drain = 1,
132 .udelay = 2, /* close to 100 kHz */
130}; 133};
131 134
132static struct platform_device i2c_gpio_device = { 135static struct platform_device i2c_gpio_device = {
@@ -154,6 +157,7 @@ static int __init atngw100_init(void)
154 set_hw_addr(at32_add_device_eth(1, &eth_data[1])); 157 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
155 158
156 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); 159 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
160 at32_add_device_usba(0, NULL);
157 161
158 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { 162 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
159 at32_select_gpio(ngw_leds[i].gpio, 163 at32_select_gpio(ngw_leds[i].gpio,
@@ -161,8 +165,10 @@ static int __init atngw100_init(void)
161 } 165 }
162 platform_device_register(&ngw_gpio_leds); 166 platform_device_register(&ngw_gpio_leds);
163 167
164 at32_select_gpio(i2c_gpio_data.sda_pin, 0); 168 at32_select_gpio(i2c_gpio_data.sda_pin,
165 at32_select_gpio(i2c_gpio_data.scl_pin, 0); 169 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
170 at32_select_gpio(i2c_gpio_data.scl_pin,
171 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
166 platform_device_register(&i2c_gpio_device); 172 platform_device_register(&i2c_gpio_device);
167 173
168 return 0; 174 return 0;
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index c9981b731efa..6b9e466104ad 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -241,6 +241,7 @@ static int __init atstk1002_init(void)
241 at32_add_device_lcdc(0, &atstk1000_lcdc_data, 241 at32_add_device_lcdc(0, &atstk1000_lcdc_data,
242 fbmem_start, fbmem_size); 242 fbmem_start, fbmem_size);
243#endif 243#endif
244 at32_add_device_usba(0, NULL);
244#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM 245#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
245 at32_add_device_ssc(0, ATMEL_SSC_TX); 246 at32_add_device_ssc(0, ATMEL_SSC_TX);
246#endif 247#endif
diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
index aac4300cca12..3d0a102ad45e 100644
--- a/arch/avr32/boards/atstk1000/flash.c
+++ b/arch/avr32/boards/atstk1000/flash.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/arch/smc.h> 16#include <asm/arch/smc.h>
17 17
18static struct smc_config flash_config __initdata = { 18static struct smc_timing flash_timing __initdata = {
19 .ncs_read_setup = 0, 19 .ncs_read_setup = 0,
20 .nrd_setup = 40, 20 .nrd_setup = 40,
21 .ncs_write_setup = 0, 21 .ncs_write_setup = 0,
@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
28 28
29 .read_cycle = 120, 29 .read_cycle = 120,
30 .write_cycle = 120, 30 .write_cycle = 120,
31};
31 32
33static struct smc_config flash_config __initdata = {
32 .bus_width = 2, 34 .bus_width = 2,
33 .nrd_controlled = 1, 35 .nrd_controlled = 1,
34 .nwe_controlled = 1, 36 .nwe_controlled = 1,
@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
82{ 84{
83 int ret; 85 int ret;
84 86
87 smc_set_timing(&flash_config, &flash_timing);
85 ret = smc_set_configuration(0, &flash_config); 88 ret = smc_set_configuration(0, &flash_config);
86 if (ret < 0) { 89 if (ret < 0) {
87 printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); 90 printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
index 90e5afff54a2..989fcd1fef7e 100644
--- a/arch/avr32/kernel/Makefile
+++ b/arch/avr32/kernel/Makefile
@@ -11,8 +11,3 @@ obj-y += signal.o sys_avr32.o process.o time.o
11obj-y += init_task.o switch_to.o cpu.o 11obj-y += init_task.o switch_to.o cpu.o
12obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o 12obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
13obj-$(CONFIG_KPROBES) += kprobes.o 13obj-$(CONFIG_KPROBES) += kprobes.o
14
15USE_STANDARD_AS_RULE := true
16
17%.lds: %.lds.c FORCE
18 $(call if_changed_dep,cpp_lds_S)
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index 42657f1703b2..ccadfd9b438d 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -159,11 +159,18 @@ handle_vmalloc_miss:
159 159
160 .section .scall.text,"ax",@progbits 160 .section .scall.text,"ax",@progbits
161system_call: 161system_call:
162#ifdef CONFIG_PREEMPT
163 mask_interrupts
164#endif
162 pushm r12 /* r12_orig */ 165 pushm r12 /* r12_orig */
163 stmts --sp, r0-lr 166 stmts --sp, r0-lr
164 zero_fp 167
165 mfsr r0, SYSREG_RAR_SUP 168 mfsr r0, SYSREG_RAR_SUP
166 mfsr r1, SYSREG_RSR_SUP 169 mfsr r1, SYSREG_RSR_SUP
170#ifdef CONFIG_PREEMPT
171 unmask_interrupts
172#endif
173 zero_fp
167 stm --sp, r0-r1 174 stm --sp, r0-r1
168 175
169 /* check for syscall tracing */ 176 /* check for syscall tracing */
@@ -638,6 +645,13 @@ irq_level\level:
638 stmts --sp,r0-lr 645 stmts --sp,r0-lr
639 mfsr r8, rar_int\level 646 mfsr r8, rar_int\level
640 mfsr r9, rsr_int\level 647 mfsr r9, rsr_int\level
648
649#ifdef CONFIG_PREEMPT
650 sub r11, pc, (. - system_call)
651 cp.w r11, r8
652 breq 4f
653#endif
654
641 pushm r8-r9 655 pushm r8-r9
642 656
643 mov r11, sp 657 mov r11, sp
@@ -668,6 +682,16 @@ irq_level\level:
668 sub sp, -4 /* ignore r12_orig */ 682 sub sp, -4 /* ignore r12_orig */
669 rete 683 rete
670 684
685#ifdef CONFIG_PREEMPT
6864: mask_interrupts
687 mfsr r8, rsr_int\level
688 sbr r8, 16
689 mtsr rsr_int\level, r8
690 ldmts sp++, r0-lr
691 sub sp, -4 /* ignore r12_orig */
692 rete
693#endif
694
6712: get_thread_info r0 6952: get_thread_info r0
672 ld.w r1, r0[TI_flags] 696 ld.w r1, r0[TI_flags]
673 bld r1, TIF_CPU_GOING_TO_SLEEP 697 bld r1, TIF_CPU_GOING_TO_SLEEP
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index d08b0bc6b2bb..4b4c1884e1c5 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
248 248
249 fbmem_size = memparse(p, &p); 249 fbmem_size = memparse(p, &p);
250 if (*p == '@') { 250 if (*p == '@') {
251 fbmem_start = memparse(p, &p); 251 fbmem_start = memparse(p + 1, &p);
252 ret = add_reserved_region(fbmem_start, 252 ret = add_reserved_region(fbmem_start,
253 fbmem_start + fbmem_size - 1, 253 fbmem_start + fbmem_size - 1,
254 "Framebuffer"); 254 "Framebuffer");
diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..ce9ac9659883
--- /dev/null
+++ b/arch/avr32/kernel/vmlinux.lds.S
@@ -0,0 +1,143 @@
1/*
2 * AVR32 linker script for the Linux kernel
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define LOAD_OFFSET 0x00000000
11#include <asm-generic/vmlinux.lds.h>
12#include <asm/cache.h>
13#include <asm/thread_info.h>
14
15OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
16OUTPUT_ARCH(avr32)
17ENTRY(_start)
18
19/* Big endian */
20jiffies = jiffies_64 + 4;
21
22SECTIONS
23{
24 . = CONFIG_ENTRY_ADDRESS;
25 .init : AT(ADDR(.init) - LOAD_OFFSET) {
26 _stext = .;
27 __init_begin = .;
28 _sinittext = .;
29 *(.text.reset)
30 *(.init.text)
31 /*
32 * .exit.text is discarded at runtime, not
33 * link time, to deal with references from
34 * __bug_table
35 */
36 *(.exit.text)
37 _einittext = .;
38 . = ALIGN(4);
39 __tagtable_begin = .;
40 *(.taglist.init)
41 __tagtable_end = .;
42 *(.init.data)
43 . = ALIGN(16);
44 __setup_start = .;
45 *(.init.setup)
46 __setup_end = .;
47 . = ALIGN(4);
48 __initcall_start = .;
49 INITCALLS
50 __initcall_end = .;
51 __con_initcall_start = .;
52 *(.con_initcall.init)
53 __con_initcall_end = .;
54 __security_initcall_start = .;
55 *(.security_initcall.init)
56 __security_initcall_end = .;
57#ifdef CONFIG_BLK_DEV_INITRD
58 . = ALIGN(32);
59 __initramfs_start = .;
60 *(.init.ramfs)
61 __initramfs_end = .;
62#endif
63 . = ALIGN(PAGE_SIZE);
64 __init_end = .;
65 }
66
67 .text : AT(ADDR(.text) - LOAD_OFFSET) {
68 _evba = .;
69 _text = .;
70 *(.ex.text)
71 . = 0x50;
72 *(.tlbx.ex.text)
73 . = 0x60;
74 *(.tlbr.ex.text)
75 . = 0x70;
76 *(.tlbw.ex.text)
77 . = 0x100;
78 *(.scall.text)
79 *(.irq.text)
80 TEXT_TEXT
81 SCHED_TEXT
82 LOCK_TEXT
83 KPROBES_TEXT
84 *(.fixup)
85 *(.gnu.warning)
86 _etext = .;
87 } = 0xd703d703
88
89 . = ALIGN(4);
90 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
91 __start___ex_table = .;
92 *(__ex_table)
93 __stop___ex_table = .;
94 }
95
96 BUG_TABLE
97
98 RODATA
99
100 . = ALIGN(THREAD_SIZE);
101
102 .data : AT(ADDR(.data) - LOAD_OFFSET) {
103 _data = .;
104 _sdata = .;
105 /*
106 * First, the init task union, aligned to an 8K boundary.
107 */
108 *(.data.init_task)
109
110 /* Then, the cacheline aligned data */
111 . = ALIGN(L1_CACHE_BYTES);
112 *(.data.cacheline_aligned)
113
114 /* And the rest... */
115 *(.data.rel*)
116 DATA_DATA
117 CONSTRUCTORS
118
119 _edata = .;
120 }
121
122
123 . = ALIGN(8);
124 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
125 __bss_start = .;
126 *(.bss)
127 *(COMMON)
128 . = ALIGN(8);
129 __bss_stop = .;
130 _end = .;
131 }
132
133 /* When something in the kernel is NOT compiled as a module, the module
134 * cleanup code and data are put into these segments. Both can then be
135 * thrown away, as cleanup code is never called unless it's a module.
136 */
137 /DISCARD/ : {
138 *(.exit.data)
139 *(.exitcall.exit)
140 }
141
142 DWARF_DEBUG
143}
diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
deleted file mode 100644
index db0438f35c00..000000000000
--- a/arch/avr32/kernel/vmlinux.lds.c
+++ /dev/null
@@ -1,142 +0,0 @@
1/*
2 * AVR32 linker script for the Linux kernel
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define LOAD_OFFSET 0x00000000
11#include <asm-generic/vmlinux.lds.h>
12
13OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
14OUTPUT_ARCH(avr32)
15ENTRY(_start)
16
17/* Big endian */
18jiffies = jiffies_64 + 4;
19
20SECTIONS
21{
22 . = CONFIG_ENTRY_ADDRESS;
23 .init : AT(ADDR(.init) - LOAD_OFFSET) {
24 _stext = .;
25 __init_begin = .;
26 _sinittext = .;
27 *(.text.reset)
28 *(.init.text)
29 /*
30 * .exit.text is discarded at runtime, not
31 * link time, to deal with references from
32 * __bug_table
33 */
34 *(.exit.text)
35 _einittext = .;
36 . = ALIGN(4);
37 __tagtable_begin = .;
38 *(.taglist.init)
39 __tagtable_end = .;
40 *(.init.data)
41 . = ALIGN(16);
42 __setup_start = .;
43 *(.init.setup)
44 __setup_end = .;
45 . = ALIGN(4);
46 __initcall_start = .;
47 INITCALLS
48 __initcall_end = .;
49 __con_initcall_start = .;
50 *(.con_initcall.init)
51 __con_initcall_end = .;
52 __security_initcall_start = .;
53 *(.security_initcall.init)
54 __security_initcall_end = .;
55#ifdef CONFIG_BLK_DEV_INITRD
56 . = ALIGN(32);
57 __initramfs_start = .;
58 *(.init.ramfs)
59 __initramfs_end = .;
60#endif
61 . = ALIGN(4096);
62 __init_end = .;
63 }
64
65 . = ALIGN(8192);
66 .text : AT(ADDR(.text) - LOAD_OFFSET) {
67 _evba = .;
68 _text = .;
69 *(.ex.text)
70 . = 0x50;
71 *(.tlbx.ex.text)
72 . = 0x60;
73 *(.tlbr.ex.text)
74 . = 0x70;
75 *(.tlbw.ex.text)
76 . = 0x100;
77 *(.scall.text)
78 *(.irq.text)
79 TEXT_TEXT
80 SCHED_TEXT
81 LOCK_TEXT
82 KPROBES_TEXT
83 *(.fixup)
84 *(.gnu.warning)
85 _etext = .;
86 } = 0xd703d703
87
88 . = ALIGN(4);
89 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
90 __start___ex_table = .;
91 *(__ex_table)
92 __stop___ex_table = .;
93 }
94
95 BUG_TABLE
96
97 RODATA
98
99 . = ALIGN(8192);
100
101 .data : AT(ADDR(.data) - LOAD_OFFSET) {
102 _data = .;
103 _sdata = .;
104 /*
105 * First, the init task union, aligned to an 8K boundary.
106 */
107 *(.data.init_task)
108
109 /* Then, the cacheline aligned data */
110 . = ALIGN(32);
111 *(.data.cacheline_aligned)
112
113 /* And the rest... */
114 *(.data.rel*)
115 DATA_DATA
116 CONSTRUCTORS
117
118 _edata = .;
119 }
120
121
122 . = ALIGN(8);
123 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
124 __bss_start = .;
125 *(.bss)
126 *(COMMON)
127 . = ALIGN(8);
128 __bss_stop = .;
129 _end = .;
130 }
131
132 /* When something in the kernel is NOT compiled as a module, the module
133 * cleanup code and data are put into these segments. Both can then be
134 * thrown away, as cleanup code is never called unless it's a module.
135 */
136 /DISCARD/ : {
137 *(.exit.data)
138 *(.exitcall.exit)
139 }
140
141 DWARF_DEBUG
142}
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 64cc5583ddfb..f6d154ca4d24 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -25,12 +25,6 @@
25#include "pio.h" 25#include "pio.h"
26#include "pm.h" 26#include "pm.h"
27 27
28/*
29 * We can reduce the code size a bit by using a constant here. Since
30 * this file is completely chip-specific, it's safe to not use
31 * ioremap. Generic drivers should of course never do this.
32 */
33#define AT32_PM_BASE 0xfff00000
34 28
35#define PBMEM(base) \ 29#define PBMEM(base) \
36 { \ 30 { \
@@ -1168,6 +1162,72 @@ at32_add_device_ssc(unsigned int id, unsigned int flags)
1168} 1162}
1169 1163
1170/* -------------------------------------------------------------------- 1164/* --------------------------------------------------------------------
1165 * USB Device Controller
1166 * -------------------------------------------------------------------- */
1167static struct resource usba0_resource[] __initdata = {
1168 {
1169 .start = 0xff300000,
1170 .end = 0xff3fffff,
1171 .flags = IORESOURCE_MEM,
1172 }, {
1173 .start = 0xfff03000,
1174 .end = 0xfff033ff,
1175 .flags = IORESOURCE_MEM,
1176 },
1177 IRQ(31),
1178};
1179static struct clk usba0_pclk = {
1180 .name = "pclk",
1181 .parent = &pbb_clk,
1182 .mode = pbb_clk_mode,
1183 .get_rate = pbb_clk_get_rate,
1184 .index = 12,
1185};
1186static struct clk usba0_hclk = {
1187 .name = "hclk",
1188 .parent = &hsb_clk,
1189 .mode = hsb_clk_mode,
1190 .get_rate = hsb_clk_get_rate,
1191 .index = 6,
1192};
1193
1194struct platform_device *__init
1195at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
1196{
1197 struct platform_device *pdev;
1198
1199 if (id != 0)
1200 return NULL;
1201
1202 pdev = platform_device_alloc("atmel_usba_udc", 0);
1203 if (!pdev)
1204 return NULL;
1205
1206 if (platform_device_add_resources(pdev, usba0_resource,
1207 ARRAY_SIZE(usba0_resource)))
1208 goto out_free_pdev;
1209
1210 if (data) {
1211 if (platform_device_add_data(pdev, data, sizeof(*data)))
1212 goto out_free_pdev;
1213
1214 if (data->vbus_pin != GPIO_PIN_NONE)
1215 at32_select_gpio(data->vbus_pin, 0);
1216 }
1217
1218 usba0_pclk.dev = &pdev->dev;
1219 usba0_hclk.dev = &pdev->dev;
1220
1221 platform_device_add(pdev);
1222
1223 return pdev;
1224
1225out_free_pdev:
1226 platform_device_put(pdev);
1227 return NULL;
1228}
1229
1230/* --------------------------------------------------------------------
1171 * GCLK 1231 * GCLK
1172 * -------------------------------------------------------------------- */ 1232 * -------------------------------------------------------------------- */
1173static struct clk gclk0 = { 1233static struct clk gclk0 = {
@@ -1252,6 +1312,8 @@ struct clk *at32_clock_list[] = {
1252 &ssc0_pclk, 1312 &ssc0_pclk,
1253 &ssc1_pclk, 1313 &ssc1_pclk,
1254 &ssc2_pclk, 1314 &ssc2_pclk,
1315 &usba0_hclk,
1316 &usba0_pclk,
1255 &gclk0, 1317 &gclk0,
1256 &gclk1, 1318 &gclk1,
1257 &gclk2, 1319 &gclk2,
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 0f8c89c9f832..4642117cc9ab 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
150 return clk->parent; 150 return clk->parent;
151} 151}
152EXPORT_SYMBOL(clk_get_parent); 152EXPORT_SYMBOL(clk_get_parent);
153
154
155
156#ifdef CONFIG_DEBUG_FS
157
158/* /sys/kernel/debug/at32ap_clk */
159
160#include <linux/io.h>
161#include <linux/debugfs.h>
162#include <linux/seq_file.h>
163#include "pm.h"
164
165
166#define NEST_DELTA 2
167#define NEST_MAX 6
168
169struct clkinf {
170 struct seq_file *s;
171 unsigned nest;
172};
173
174static void
175dump_clock(struct clk *parent, struct clkinf *r)
176{
177 unsigned nest = r->nest;
178 char buf[16 + NEST_MAX];
179 struct clk *clk;
180 unsigned i;
181
182 /* skip clocks coupled to devices that aren't registered */
183 if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
184 return;
185
186 /* <nest spaces> name <pad to end> */
187 memset(buf, ' ', sizeof(buf) - 1);
188 buf[sizeof(buf) - 1] = 0;
189 i = strlen(parent->name);
190 memcpy(buf + nest, parent->name,
191 min(i, (unsigned)(sizeof(buf) - 1 - nest)));
192
193 seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
194 buf, parent->set_parent ? '*' : ' ',
195 parent->users,
196 parent->users ? "on" : "off", /* NOTE: not-paranoid!! */
197 clk_get_rate(parent));
198 if (parent->dev)
199 seq_printf(r->s, ", for %s", parent->dev->bus_id);
200 seq_printf(r->s, "\n");
201
202 /* cost of this scan is small, but not linear... */
203 r->nest = nest + NEST_DELTA;
204 for (i = 3; i < at32_nr_clocks; i++) {
205 clk = at32_clock_list[i];
206 if (clk->parent == parent)
207 dump_clock(clk, r);
208 }
209 r->nest = nest;
210}
211
212static int clk_show(struct seq_file *s, void *unused)
213{
214 struct clkinf r;
215 int i;
216
217 /* show all the power manager registers */
218 seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL));
219 seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL));
220 seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
221 seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
222 seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
223 seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
224 seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0));
225 seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1));
226 seq_printf(s, "IMR = %8x\n", pm_readl(IMR));
227 for (i = 0; i < 8; i++) {
228 if (i == 5)
229 continue;
230 seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
231 }
232
233 seq_printf(s, "\n");
234
235 /* show clock tree as derived from the three oscillators
236 * we "know" are at the head of the list
237 */
238 r.s = s;
239 r.nest = 0;
240 dump_clock(at32_clock_list[0], &r);
241 dump_clock(at32_clock_list[1], &r);
242 dump_clock(at32_clock_list[2], &r);
243
244 return 0;
245}
246
247static int clk_open(struct inode *inode, struct file *file)
248{
249 return single_open(file, clk_show, NULL);
250}
251
252static const struct file_operations clk_operations = {
253 .open = clk_open,
254 .read = seq_read,
255 .llseek = seq_lseek,
256 .release = single_release,
257};
258
259static int __init clk_debugfs_init(void)
260{
261 (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
262 NULL, NULL, &clk_operations);
263
264 return 0;
265}
266postcore_initcall(clk_debugfs_init);
267
268#endif
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
index 5e22a750632b..704607fbcc69 100644
--- a/arch/avr32/mach-at32ap/hsmc.c
+++ b/arch/avr32/mach-at32ap/hsmc.c
@@ -29,16 +29,25 @@ struct hsmc {
29 29
30static struct hsmc *hsmc; 30static struct hsmc *hsmc;
31 31
32int smc_set_configuration(int cs, const struct smc_config *config) 32void smc_set_timing(struct smc_config *config,
33 const struct smc_timing *timing)
33{ 34{
35 int recover;
36 int cycle;
37
34 unsigned long mul; 38 unsigned long mul;
35 unsigned long offset;
36 u32 setup, pulse, cycle, mode;
37 39
38 if (!hsmc) 40 /* Reset all SMC timings */
39 return -ENODEV; 41 config->ncs_read_setup = 0;
40 if (cs >= NR_CHIP_SELECTS) 42 config->nrd_setup = 0;
41 return -EINVAL; 43 config->ncs_write_setup = 0;
44 config->nwe_setup = 0;
45 config->ncs_read_pulse = 0;
46 config->nrd_pulse = 0;
47 config->ncs_write_pulse = 0;
48 config->nwe_pulse = 0;
49 config->read_cycle = 0;
50 config->write_cycle = 0;
42 51
43 /* 52 /*
44 * cycles = x / T = x * f 53 * cycles = x / T = x * f
@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
50 59
51#define ns2cyc(x) ((((x) * mul) + 65535) >> 16) 60#define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
52 61
53 setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup)) 62 if (timing->ncs_read_setup > 0)
54 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup)) 63 config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
55 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup)) 64
56 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup))); 65 if (timing->nrd_setup > 0)
57 pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse)) 66 config->nrd_setup = ns2cyc(timing->nrd_setup);
58 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse)) 67
59 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse)) 68 if (timing->ncs_write_setup > 0)
60 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse))); 69 config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
61 cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle)) 70
62 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle))); 71 if (timing->nwe_setup > 0)
72 config->nwe_setup = ns2cyc(timing->nwe_setup);
73
74 if (timing->ncs_read_pulse > 0)
75 config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
76
77 if (timing->nrd_pulse > 0)
78 config->nrd_pulse = ns2cyc(timing->nrd_pulse);
79
80 if (timing->ncs_write_pulse > 0)
81 config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
82
83 if (timing->nwe_pulse > 0)
84 config->nwe_pulse = ns2cyc(timing->nwe_pulse);
85
86 if (timing->read_cycle > 0)
87 config->read_cycle = ns2cyc(timing->read_cycle);
88
89 if (timing->write_cycle > 0)
90 config->write_cycle = ns2cyc(timing->write_cycle);
91
92 /* Extend read cycle in needed */
93 if (timing->ncs_read_recover > 0)
94 recover = ns2cyc(timing->ncs_read_recover);
95 else
96 recover = 1;
97
98 cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
99
100 if (config->read_cycle < cycle)
101 config->read_cycle = cycle;
102
103 /* Extend read cycle in needed */
104 if (timing->nrd_recover > 0)
105 recover = ns2cyc(timing->nrd_recover);
106 else
107 recover = 1;
108
109 cycle = config->nrd_setup + config->nrd_pulse + recover;
110
111 if (config->read_cycle < cycle)
112 config->read_cycle = cycle;
113
114 /* Extend write cycle in needed */
115 if (timing->ncs_write_recover > 0)
116 recover = ns2cyc(timing->ncs_write_recover);
117 else
118 recover = 1;
119
120 cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
121
122 if (config->write_cycle < cycle)
123 config->write_cycle = cycle;
124
125 /* Extend write cycle in needed */
126 if (timing->nwe_recover > 0)
127 recover = ns2cyc(timing->nwe_recover);
128 else
129 recover = 1;
130
131 cycle = config->nwe_setup + config->nwe_pulse + recover;
132
133 if (config->write_cycle < cycle)
134 config->write_cycle = cycle;
135}
136EXPORT_SYMBOL(smc_set_timing);
137
138int smc_set_configuration(int cs, const struct smc_config *config)
139{
140 unsigned long offset;
141 u32 setup, pulse, cycle, mode;
142
143 if (!hsmc)
144 return -ENODEV;
145 if (cs >= NR_CHIP_SELECTS)
146 return -EINVAL;
147
148 setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
149 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
150 | HSMC_BF(NRD_SETUP, config->nrd_setup)
151 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
152 pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
153 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
154 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
155 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
156 cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
157 | HSMC_BF(NRD_CYCLE, config->read_cycle));
63 158
64 switch (config->bus_width) { 159 switch (config->bus_width) {
65 case 1: 160 case 1:
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 1eb99b814f5b..d61a02da898c 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
110 pio_writel(pio, SODR, mask); 110 pio_writel(pio, SODR, mask);
111 else 111 else
112 pio_writel(pio, CODR, mask); 112 pio_writel(pio, CODR, mask);
113 if (flags & AT32_GPIOF_MULTIDRV)
114 pio_writel(pio, MDER, mask);
115 else
116 pio_writel(pio, MDDR, mask);
113 pio_writel(pio, PUDR, mask); 117 pio_writel(pio, PUDR, mask);
114 pio_writel(pio, OER, mask); 118 pio_writel(pio, OER, mask);
115 } else { 119 } else {
diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
index a1f8aced0a8c..47efd0d1951f 100644
--- a/arch/avr32/mach-at32ap/pm.h
+++ b/arch/avr32/mach-at32ap/pm.h
@@ -4,6 +4,14 @@
4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ 4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
5#define __ARCH_AVR32_MACH_AT32AP_PM_H__ 5#define __ARCH_AVR32_MACH_AT32AP_PM_H__
6 6
7/*
8 * We can reduce the code size a bit by using a constant here. Since
9 * this file is only used on AVR32 AP CPUs with segmentation enabled,
10 * it's safe to not use ioremap. Generic drivers should of course
11 * never do this.
12 */
13#define AT32_PM_BASE 0xfff00000
14
7/* PM register offsets */ 15/* PM register offsets */
8#define PM_MCCTRL 0x0000 16#define PM_MCCTRL 0x0000
9#define PM_CKSEL 0x0004 17#define PM_CKSEL 0x0004
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
index 82cf70854b90..480760bde63f 100644
--- a/arch/avr32/mm/init.c
+++ b/arch/avr32/mm/init.c
@@ -224,19 +224,9 @@ void free_initmem(void)
224 224
225#ifdef CONFIG_BLK_DEV_INITRD 225#ifdef CONFIG_BLK_DEV_INITRD
226 226
227static int keep_initrd;
228
229void free_initrd_mem(unsigned long start, unsigned long end) 227void free_initrd_mem(unsigned long start, unsigned long end)
230{ 228{
231 if (!keep_initrd) 229 free_area(start, end, "initrd");
232 free_area(start, end, "initrd");
233}
234
235static int __init keepinitrd_setup(char *__unused)
236{
237 keep_initrd = 1;
238 return 1;
239} 230}
240 231
241__setup("keepinitrd", keepinitrd_setup);
242#endif 232#endif
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 017defaa525b..b24f4535ffe0 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -57,7 +57,7 @@ config GENERIC_TIME
57 bool 57 bool
58 default n 58 default n
59 59
60config GENERIC_CALIBRATE_DELAY 60config GENERIC_GPIO
61 bool 61 bool
62 default y 62 default y
63 63
@@ -323,7 +323,7 @@ config CMDLINE
323 to the kernel, you may specify one here. As a minimum, you should specify 323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs). 324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
325 325
326comment "Board Setup" 326comment "Clock/PLL Setup"
327 327
328config CLKIN_HZ 328config CLKIN_HZ
329 int "Crystal Frequency in Hz" 329 int "Crystal Frequency in Hz"
@@ -335,6 +335,118 @@ config CLKIN_HZ
335 help 335 help
336 The frequency of CLKIN crystal oscillator on the board in Hz. 336 The frequency of CLKIN crystal oscillator on the board in Hz.
337 337
338config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
340 default n
341 help
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
345 configuration.
346
347config PLL_BYPASS
348 bool "Bypass PLL"
349 depends on BFIN_KERNEL_CLOCK
350 default n
351
352config CLKIN_HALF
353 bool "Half Clock In"
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
355 default n
356 help
357 If this is set the clock will be divided by 2, before it goes to the PLL.
358
359config VCO_MULT
360 int "VCO Multiplier"
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
362 range 1 64
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
370 help
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
373
374choice
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
377 default CCLK_DIV_1
378 help
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
381
382config CCLK_DIV_1
383 bool "1"
384
385config CCLK_DIV_2
386 bool "2"
387
388config CCLK_DIV_4
389 bool "4"
390
391config CCLK_DIV_8
392 bool "8"
393endchoice
394
395config SCLK_DIV
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
398 range 1 15
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
406 help
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
410
411#
412# Max & Min Speeds for various Chips
413#
414config MAX_VCO_HZ
415 int
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
431
432config MIN_VCO_HZ
433 int
434 default 50000000
435
436config MAX_SCLK_HZ
437 int
438 default 133000000
439
440config MIN_SCLK_HZ
441 int
442 default 27000000
443
444comment "Kernel Timer/Scheduler"
445
446source kernel/Kconfig.hz
447
448comment "Memory Setup"
449
338config MEM_SIZE 450config MEM_SIZE
339 int "SDRAM Memory Size in MBytes" 451 int "SDRAM Memory Size in MBytes"
340 default 32 if BFIN533_EZKIT 452 default 32 if BFIN533_EZKIT
@@ -364,15 +476,16 @@ config ENET_FLASH_PIN
364config BOOT_LOAD 476config BOOT_LOAD
365 hex "Kernel load address for booting" 477 hex "Kernel load address for booting"
366 default "0x1000" 478 default "0x1000"
479 range 0x1000 0x20000000
367 help 480 help
368 This option allows you to set the load address of the kernel. 481 This option allows you to set the load address of the kernel.
369 This can be useful if you are on a board which has a small amount 482 This can be useful if you are on a board which has a small amount
370 of memory or you wish to reserve some memory at the beginning of 483 of memory or you wish to reserve some memory at the beginning of
371 the address space. 484 the address space.
372 485
373 Note that you generally want to keep this value at or above 4k 486 Note that you need to keep this value above 4k (0x1000) as this
374 (0x1000) as this will allow the kernel to capture NULL pointer 487 memory region is used to capture NULL pointer references as well
375 references. 488 as some core kernel functions.
376 489
377comment "LED Status Indicators" 490comment "LED Status Indicators"
378 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM) 491 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
@@ -408,6 +521,52 @@ config BFIN_IDLE_LED_NUM
408 help 521 help
409 Select the LED (marked on the board) for you to blink. 522 Select the LED (marked on the board) for you to blink.
410 523
524choice
525 prompt "Blackfin Exception Scratch Register"
526 default BFIN_SCRATCH_REG_RETN
527 help
528 Select the resource to reserve for the Exception handler:
529 - RETN: Non-Maskable Interrupt (NMI)
530 - RETE: Exception Return (JTAG/ICE)
531 - CYCLES: Performance counter
532
533 If you are unsure, please select "RETN".
534
535config BFIN_SCRATCH_REG_RETN
536 bool "RETN"
537 help
538 Use the RETN register in the Blackfin exception handler
539 as a stack scratch register. This means you cannot
540 safely use NMI on the Blackfin while running Linux, but
541 you can debug the system with a JTAG ICE and use the
542 CYCLES performance registers.
543
544 If you are unsure, please select "RETN".
545
546config BFIN_SCRATCH_REG_RETE
547 bool "RETE"
548 help
549 Use the RETE register in the Blackfin exception handler
550 as a stack scratch register. This means you cannot
551 safely use a JTAG ICE while debugging a Blackfin board,
552 but you can safely use the CYCLES performance registers
553 and the NMI.
554
555 If you are unsure, please select "RETN".
556
557config BFIN_SCRATCH_REG_CYCLES
558 bool "CYCLES"
559 help
560 Use the CYCLES register in the Blackfin exception handler
561 as a stack scratch register. This means you cannot
562 safely use the CYCLES performance registers on a Blackfin
563 board at anytime, but you can debug the system with a JTAG
564 ICE and use the NMI.
565
566 If you are unsure, please select "RETN".
567
568endchoice
569
411# 570#
412# Sorry - but you need to put the hex address here - 571# Sorry - but you need to put the hex address here -
413# 572#
@@ -448,10 +607,6 @@ endmenu
448 607
449menu "Blackfin Kernel Optimizations" 608menu "Blackfin Kernel Optimizations"
450 609
451comment "Timer Tick"
452
453source kernel/Kconfig.hz
454
455comment "Memory Optimizations" 610comment "Memory Optimizations"
456 611
457config I_ENTRY_L1 612config I_ENTRY_L1
@@ -614,22 +769,22 @@ endchoice
614 769
615 770
616comment "Cache Support" 771comment "Cache Support"
617config BLKFIN_CACHE 772config BFIN_ICACHE
618 bool "Enable ICACHE" 773 bool "Enable ICACHE"
619config BLKFIN_DCACHE 774config BFIN_DCACHE
620 bool "Enable DCACHE" 775 bool "Enable DCACHE"
621config BLKFIN_DCACHE_BANKA 776config BFIN_DCACHE_BANKA
622 bool "Enable only 16k BankA DCACHE - BankB is SRAM" 777 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
623 depends on BLKFIN_DCACHE && !BF531 778 depends on BFIN_DCACHE && !BF531
624 default n 779 default n
625config BLKFIN_CACHE_LOCK 780config BFIN_ICACHE_LOCK
626 bool "Enable Cache Locking" 781 bool "Enable Instruction Cache Locking"
627 782
628choice 783choice
629 prompt "Policy" 784 prompt "Policy"
630 depends on BLKFIN_DCACHE 785 depends on BFIN_DCACHE
631 default BLKFIN_WB 786 default BFIN_WB
632config BLKFIN_WB 787config BFIN_WB
633 bool "Write back" 788 bool "Write back"
634 help 789 help
635 Write Back Policy: 790 Write Back Policy:
@@ -646,7 +801,7 @@ config BLKFIN_WB
646 If you are unsure of the options and you want to be safe, 801 If you are unsure of the options and you want to be safe,
647 then go with Write Through. 802 then go with Write Through.
648 803
649config BLKFIN_WT 804config BFIN_WT
650 bool "Write through" 805 bool "Write through"
651 help 806 help
652 Write Back Policy: 807 Write Back Policy:
@@ -672,66 +827,9 @@ config L1_MAX_PIECE
672 Set the max memory pieces for the L1 SRAM allocation algorithm. 827 Set the max memory pieces for the L1 SRAM allocation algorithm.
673 Min value is 16. Max value is 1024. 828 Min value is 16. Max value is 1024.
674 829
675menu "Clock Settings"
676
677
678config BFIN_KERNEL_CLOCK
679 bool "Re-program Clocks while Kernel boots?"
680 default n
681 help
682 This option decides if kernel clocks are re-programed from the
683 bootloader settings. If the clocks are not set, the SDRAM settings
684 are also not changed, and the Bootloader does 100% of the hardware
685 configuration.
686
687config VCO_MULT
688 int "VCO Multiplier"
689 depends on BFIN_KERNEL_CLOCK
690 default "22" if BFIN533_EZKIT
691 default "45" if BFIN533_STAMP
692 default "20" if BFIN537_STAMP
693 default "22" if BFIN533_BLUETECHNIX_CM
694 default "20" if BFIN537_BLUETECHNIX_CM
695 default "20" if BFIN561_BLUETECHNIX_CM
696 default "20" if BFIN561_EZKIT
697
698config CCLK_DIV
699 int "Core Clock Divider"
700 depends on BFIN_KERNEL_CLOCK
701 default 1 if BFIN533_EZKIT
702 default 1 if BFIN533_STAMP
703 default 1 if BFIN537_STAMP
704 default 1 if BFIN533_BLUETECHNIX_CM
705 default 1 if BFIN537_BLUETECHNIX_CM
706 default 1 if BFIN561_BLUETECHNIX_CM
707 default 1 if BFIN561_EZKIT
708
709config SCLK_DIV
710 int "System Clock Divider"
711 depends on BFIN_KERNEL_CLOCK
712 default 5 if BFIN533_EZKIT
713 default 5 if BFIN533_STAMP
714 default 4 if BFIN537_STAMP
715 default 5 if BFIN533_BLUETECHNIX_CM
716 default 4 if BFIN537_BLUETECHNIX_CM
717 default 4 if BFIN561_BLUETECHNIX_CM
718 default 5 if BFIN561_EZKIT
719
720config CLKIN_HALF
721 bool "Half ClockIn"
722 depends on BFIN_KERNEL_CLOCK
723 default n
724
725config PLL_BYPASS
726 bool "Bypass PLL"
727 depends on BFIN_KERNEL_CLOCK
728 default n
729
730endmenu
731
732comment "Asynchonous Memory Configuration" 830comment "Asynchonous Memory Configuration"
733 831
734menu "EBIU_AMBCTL Global Control" 832menu "EBIU_AMGCTL Global Control"
735config C_AMCKEN 833config C_AMCKEN
736 bool "Enable CLKOUT" 834 bool "Enable CLKOUT"
737 default y 835 default y
@@ -941,24 +1039,6 @@ config DEBUG_ICACHE_CHECK
941 also relocates the irq_panic() function to L1 memory, (which is 1039 also relocates the irq_panic() function to L1 memory, (which is
942 un-cached). 1040 un-cached).
943 1041
944config DEBUG_KERNEL_START
945 bool "Debug Kernel Startup"
946 depends on DEBUG_KERNEL
947 help
948 Say Y here to put in an mini-execption handler before the kernel
949 replaces the bootloader exception handler. This will stop kernels
950 from dieing at startup with no visible error messages.
951
952config DEBUG_SERIAL_EARLY_INIT
953 bool "Initialize serial driver early"
954 default n
955 depends on SERIAL_BFIN
956 help
957 Say Y here if you want to get kernel output early when kernel
958 crashes before the normal console initialization. If this option
959 is enable, console output will always go to the ttyBF0, no matter
960 what kernel boot paramters you set.
961
962config DEBUG_HUNT_FOR_ZERO 1042config DEBUG_HUNT_FOR_ZERO
963 bool "Catch NULL pointer reads/writes" 1043 bool "Catch NULL pointer reads/writes"
964 default y 1044 default y
@@ -973,8 +1053,89 @@ config DEBUG_HUNT_FOR_ZERO
973 Enabling this option will take up an extra entry in CPLB table. 1053 Enabling this option will take up an extra entry in CPLB table.
974 Otherwise, there is no extra overhead. 1054 Otherwise, there is no extra overhead.
975 1055
1056config DEBUG_BFIN_HWTRACE_ON
1057 bool "Turn on Blackfin's Hardware Trace"
1058 default y
1059 help
1060 All Blackfins include a Trace Unit which stores a history of the last
1061 16 changes in program flow taken by the program sequencer. The history
1062 allows the user to recreate the program sequencer’s recent path. This
1063 can be handy when an application dies - we print out the execution
1064 path of how it got to the offending instruction.
1065
1066 By turning this off, you may save a tiny amount of power.
1067
1068choice
1069 prompt "Omit loop Tracing"
1070 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1071 depends on DEBUG_BFIN_HWTRACE_ON
1072 help
1073 The trace buffer can be configured to omit recording of changes in
1074 program flow that match either the last entry or one of the last
1075 two entries. Omitting one of these entries from the record prevents
1076 the trace buffer from overflowing because of any sort of loop (for, do
1077 while, etc) in the program.
1078
1079 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1080 this feature can be used to prevent trace overflow from loops that
1081 are nested four deep.
1082
1083config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1084 bool "Trace all Loops"
1085 help
1086 The trace buffer records all changes of flow
1087
1088config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1089 bool "Compress single-level loops"
1090 help
1091 The trace buffer does not record single loops - helpful if trace
1092 is spinning on a while or do loop.
1093
1094config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1095 bool "Compress two-level loops"
1096 help
1097 The trace buffer does not record loops two levels deep. Helpful if
1098 the trace is spinning in a nested loop
1099
1100endchoice
1101
1102config DEBUG_BFIN_HWTRACE_COMPRESSION
1103 int
1104 depends on DEBUG_BFIN_HWTRACE_ON
1105 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1106 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1107 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1108
1109
1110config DEBUG_BFIN_HWTRACE_EXPAND
1111 bool "Expand Trace Buffer greater than 16 entries"
1112 depends on DEBUG_BFIN_HWTRACE_ON
1113 default n
1114 help
1115 By selecting this option, every time the 16 hardware entries in
1116 the Blackfin's HW Trace buffer are full, the kernel will move them
1117 into a software buffer, for dumping when there is an issue. This
1118 has a great impact on performance, (an interrupt every 16 change of
1119 flows) and should normally be turned off, except in those nasty
1120 debugging sessions
1121
1122config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1123 int "Size of Trace buffer (in power of 2k)"
1124 range 0 4
1125 depends on DEBUG_BFIN_HWTRACE_EXPAND
1126 default 1
1127 help
1128 This sets the size of the software buffer that the trace information
1129 is kept in.
1130 0 for (2^0) 1k, or 256 entries,
1131 1 for (2^1) 2k, or 512 entries,
1132 2 for (2^2) 4k, or 1024 entries,
1133 3 for (2^3) 8k, or 2048 entries,
1134 4 for (2^4) 16k, or 4096 entries
1135
976config DEBUG_BFIN_NO_KERN_HWTRACE 1136config DEBUG_BFIN_NO_KERN_HWTRACE
977 bool "Trace user apps (turn off hwtrace in kernel)" 1137 bool "Trace user apps (turn off hwtrace in kernel)"
1138 depends on DEBUG_BFIN_HWTRACE_ON
978 default n 1139 default n
979 help 1140 help
980 Some pieces of the kernel contain a lot of flow changes which can 1141 Some pieces of the kernel contain a lot of flow changes which can
@@ -985,6 +1146,20 @@ config DEBUG_BFIN_NO_KERN_HWTRACE
985 Say Y here to disable hardware tracing in some known "jumpy" pieces 1146 Say Y here to disable hardware tracing in some known "jumpy" pieces
986 of code so that the trace buffer will extend further back. 1147 of code so that the trace buffer will extend further back.
987 1148
1149config EARLY_PRINTK
1150 bool "Early printk"
1151 default n
1152 help
1153 This option enables special console drivers which allow the kernel
1154 to print messages very early in the bootup process.
1155
1156 This is useful for kernel debugging when your machine crashes very
1157 early before the console code is initialized. After enabling this
1158 feature, you must add "earlyprintk=serial,uart0,57600" to the
1159 command line (bootargs). It is safe to say Y here in all cases, as
1160 all of this lives in the init section and is thrown away after the
1161 kernel boots completely.
1162
988config DUAL_CORE_TEST_MODULE 1163config DUAL_CORE_TEST_MODULE
989 tristate "Dual Core Test Module" 1164 tristate "Dual Core Test Module"
990 depends on (BF561) 1165 depends on (BF561)
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 1cf1ab28dc66..57f58d5cd47a 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -40,7 +41,9 @@ CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 47CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 48# CONFIG_RELAY is not set
46CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
@@ -58,15 +61,20 @@ CONFIG_BUG=y
58CONFIG_ELF_CORE=y 61CONFIG_ELF_CORE=y
59CONFIG_BASE_FULL=y 62CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 63CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y
69CONFIG_VM_EVENT_COUNTERS=y
61CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 70CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
62CONFIG_BUDDY=y
63# CONFIG_NP2 is not set 71# CONFIG_NP2 is not set
64CONFIG_SLAB=y 72CONFIG_SLAB=y
65CONFIG_VM_EVENT_COUNTERS=y 73# CONFIG_SLUB is not set
74# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y 75CONFIG_RT_MUTEXES=y
67CONFIG_TINY_SHMEM=y 76CONFIG_TINY_SHMEM=y
68CONFIG_BASE_SMALL=0 77CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70 78
71# 79#
72# Loadable module support 80# Loadable module support
@@ -184,19 +192,17 @@ CONFIG_WDTIMER=13
184# CONFIG_CMDLINE_BOOL is not set 192# CONFIG_CMDLINE_BOOL is not set
185 193
186# 194#
187# Board Setup 195# Clock/PLL Setup
188# 196#
189CONFIG_CLKIN_HZ=27000000 197CONFIG_CLKIN_HZ=27000000
190CONFIG_MEM_SIZE=32 198# CONFIG_BFIN_KERNEL_CLOCK is not set
191CONFIG_MEM_ADD_WIDTH=9 199CONFIG_MAX_VCO_HZ=750000000
192CONFIG_BOOT_LOAD=0x1000 200CONFIG_MIN_VCO_HZ=50000000
193 201CONFIG_MAX_SCLK_HZ=133000000
194# 202CONFIG_MIN_SCLK_HZ=27000000
195# Blackfin Kernel Optimizations
196#
197 203
198# 204#
199# Timer Tick 205# Kernel Timer/Scheduler
200# 206#
201# CONFIG_HZ_100 is not set 207# CONFIG_HZ_100 is not set
202CONFIG_HZ_250=y 208CONFIG_HZ_250=y
@@ -205,6 +211,20 @@ CONFIG_HZ_250=y
205CONFIG_HZ=250 211CONFIG_HZ=250
206 212
207# 213#
214# Memory Setup
215#
216CONFIG_MEM_SIZE=32
217CONFIG_MEM_ADD_WIDTH=9
218CONFIG_BOOT_LOAD=0x1000
219CONFIG_BFIN_SCRATCH_REG_RETN=y
220# CONFIG_BFIN_SCRATCH_REG_RETE is not set
221# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
222
223#
224# Blackfin Kernel Optimizations
225#
226
227#
208# Memory Optimizations 228# Memory Optimizations
209# 229#
210CONFIG_I_ENTRY_L1=y 230CONFIG_I_ENTRY_L1=y
@@ -243,20 +263,15 @@ CONFIG_DMA_UNCACHED_1M=y
243# 263#
244# Cache Support 264# Cache Support
245# 265#
246CONFIG_BLKFIN_CACHE=y 266CONFIG_BFIN_ICACHE=y
247CONFIG_BLKFIN_DCACHE=y 267CONFIG_BFIN_DCACHE=y
248# CONFIG_BLKFIN_DCACHE_BANKA is not set 268# CONFIG_BFIN_DCACHE_BANKA is not set
249# CONFIG_BLKFIN_CACHE_LOCK is not set 269# CONFIG_BFIN_ICACHE_LOCK is not set
250# CONFIG_BLKFIN_WB is not set 270# CONFIG_BFIN_WB is not set
251CONFIG_BLKFIN_WT=y 271CONFIG_BFIN_WT=y
252CONFIG_L1_MAX_PIECE=16 272CONFIG_L1_MAX_PIECE=16
253 273
254# 274#
255# Clock Settings
256#
257# CONFIG_BFIN_KERNEL_CLOCK is not set
258
259#
260# Asynchonous Memory Configuration 275# Asynchonous Memory Configuration
261# 276#
262 277
@@ -277,12 +292,13 @@ CONFIG_C_AMBEN_ALL=y
277CONFIG_BANK_0=0x7BB0 292CONFIG_BANK_0=0x7BB0
278CONFIG_BANK_1=0x7BB0 293CONFIG_BANK_1=0x7BB0
279CONFIG_BANK_2=0x7BB0 294CONFIG_BANK_2=0x7BB0
280CONFIG_BANK_3=0x99B3 295CONFIG_BANK_3=0xAAC3
281 296
282# 297#
283# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 298# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
284# 299#
285# CONFIG_PCI is not set 300# CONFIG_PCI is not set
301# CONFIG_ARCH_SUPPORTS_MSI is not set
286 302
287# 303#
288# PCCARD (PCMCIA/CardBus) support 304# PCCARD (PCMCIA/CardBus) support
@@ -290,10 +306,6 @@ CONFIG_BANK_3=0x99B3
290# CONFIG_PCCARD is not set 306# CONFIG_PCCARD is not set
291 307
292# 308#
293# PCI Hotplug Support
294#
295
296#
297# Executable file formats 309# Executable file formats
298# 310#
299CONFIG_BINFMT_ELF_FDPIC=y 311CONFIG_BINFMT_ELF_FDPIC=y
@@ -327,7 +339,6 @@ CONFIG_NET=y
327# 339#
328# Networking options 340# Networking options
329# 341#
330# CONFIG_NETDEBUG is not set
331CONFIG_PACKET=y 342CONFIG_PACKET=y
332# CONFIG_PACKET_MMAP is not set 343# CONFIG_PACKET_MMAP is not set
333CONFIG_UNIX=y 344CONFIG_UNIX=y
@@ -368,20 +379,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
368# CONFIG_NETLABEL is not set 379# CONFIG_NETLABEL is not set
369# CONFIG_NETWORK_SECMARK is not set 380# CONFIG_NETWORK_SECMARK is not set
370# CONFIG_NETFILTER is not set 381# CONFIG_NETFILTER is not set
371
372#
373# DCCP Configuration (EXPERIMENTAL)
374#
375# CONFIG_IP_DCCP is not set 382# CONFIG_IP_DCCP is not set
376
377#
378# SCTP Configuration (EXPERIMENTAL)
379#
380# CONFIG_IP_SCTP is not set 383# CONFIG_IP_SCTP is not set
381
382#
383# TIPC Configuration (EXPERIMENTAL)
384#
385# CONFIG_TIPC is not set 384# CONFIG_TIPC is not set
386# CONFIG_ATM is not set 385# CONFIG_ATM is not set
387# CONFIG_BRIDGE is not set 386# CONFIG_BRIDGE is not set
@@ -448,7 +447,16 @@ CONFIG_IRTTY_SIR=m
448# FIR device drivers 447# FIR device drivers
449# 448#
450# CONFIG_BT is not set 449# CONFIG_BT is not set
450# CONFIG_AF_RXRPC is not set
451
452#
453# Wireless
454#
455# CONFIG_CFG80211 is not set
456# CONFIG_WIRELESS_EXT is not set
457# CONFIG_MAC80211 is not set
451# CONFIG_IEEE80211 is not set 458# CONFIG_IEEE80211 is not set
459# CONFIG_RFKILL is not set
452 460
453# 461#
454# Device Drivers 462# Device Drivers
@@ -466,10 +474,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
466# Connector - unified userspace <-> kernelspace linker 474# Connector - unified userspace <-> kernelspace linker
467# 475#
468# CONFIG_CONNECTOR is not set 476# CONFIG_CONNECTOR is not set
469
470#
471# Memory Technology Devices (MTD)
472#
473CONFIG_MTD=y 477CONFIG_MTD=y
474# CONFIG_MTD_DEBUG is not set 478# CONFIG_MTD_DEBUG is not set
475# CONFIG_MTD_CONCAT is not set 479# CONFIG_MTD_CONCAT is not set
@@ -513,7 +517,6 @@ CONFIG_MTD_MW320D=m
513CONFIG_MTD_RAM=y 517CONFIG_MTD_RAM=y
514CONFIG_MTD_ROM=m 518CONFIG_MTD_ROM=m
515# CONFIG_MTD_ABSENT is not set 519# CONFIG_MTD_ABSENT is not set
516# CONFIG_MTD_OBSOLETE_CHIPS is not set
517 520
518# 521#
519# Mapping drivers for chip access 522# Mapping drivers for chip access
@@ -550,16 +553,13 @@ CONFIG_BFIN_FLASH_BANK_3=0x7BB0
550# CONFIG_MTD_DOC2000 is not set 553# CONFIG_MTD_DOC2000 is not set
551# CONFIG_MTD_DOC2001 is not set 554# CONFIG_MTD_DOC2001 is not set
552# CONFIG_MTD_DOC2001PLUS is not set 555# CONFIG_MTD_DOC2001PLUS is not set
553
554#
555# NAND Flash Device Drivers
556#
557# CONFIG_MTD_NAND is not set 556# CONFIG_MTD_NAND is not set
557# CONFIG_MTD_ONENAND is not set
558 558
559# 559#
560# OneNAND Flash Device Drivers 560# UBI - Unsorted block images
561# 561#
562# CONFIG_MTD_ONENAND is not set 562# CONFIG_MTD_UBI is not set
563 563
564# 564#
565# Parallel port support 565# Parallel port support
@@ -587,10 +587,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
587# 587#
588# Misc devices 588# Misc devices
589# 589#
590
591#
592# ATA/ATAPI/MFM/RLL support
593#
594# CONFIG_IDE is not set 590# CONFIG_IDE is not set
595 591
596# 592#
@@ -599,10 +595,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
599# CONFIG_RAID_ATTRS is not set 595# CONFIG_RAID_ATTRS is not set
600# CONFIG_SCSI is not set 596# CONFIG_SCSI is not set
601# CONFIG_SCSI_NETLINK is not set 597# CONFIG_SCSI_NETLINK is not set
602
603#
604# Serial ATA (prod) and Parallel ATA (experimental) drivers
605#
606# CONFIG_ATA is not set 598# CONFIG_ATA is not set
607 599
608# 600#
@@ -611,19 +603,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
611# CONFIG_MD is not set 603# CONFIG_MD is not set
612 604
613# 605#
614# Fusion MPT device support
615#
616# CONFIG_FUSION is not set
617
618#
619# IEEE 1394 (FireWire) support
620#
621
622#
623# I2O device support
624#
625
626#
627# Network device support 606# Network device support
628# 607#
629CONFIG_NETDEVICES=y 608CONFIG_NETDEVICES=y
@@ -631,10 +610,6 @@ CONFIG_NETDEVICES=y
631# CONFIG_BONDING is not set 610# CONFIG_BONDING is not set
632# CONFIG_EQUALIZER is not set 611# CONFIG_EQUALIZER is not set
633# CONFIG_TUN is not set 612# CONFIG_TUN is not set
634
635#
636# PHY device support
637#
638# CONFIG_PHYLIB is not set 613# CONFIG_PHYLIB is not set
639 614
640# 615#
@@ -644,27 +619,15 @@ CONFIG_NET_ETHERNET=y
644CONFIG_MII=y 619CONFIG_MII=y
645CONFIG_SMC91X=y 620CONFIG_SMC91X=y
646# CONFIG_SMSC911X is not set 621# CONFIG_SMSC911X is not set
622# CONFIG_DM9000 is not set
623CONFIG_NETDEV_1000=y
624CONFIG_NETDEV_10000=y
647 625
648# 626#
649# Ethernet (1000 Mbit) 627# Wireless LAN
650#
651
652#
653# Ethernet (10000 Mbit)
654#
655
656#
657# Token Ring devices
658#
659
660#
661# Wireless LAN (non-hamradio)
662#
663# CONFIG_NET_RADIO is not set
664
665#
666# Wan interfaces
667# 628#
629# CONFIG_WLAN_PRE80211 is not set
630# CONFIG_WLAN_80211 is not set
668# CONFIG_WAN is not set 631# CONFIG_WAN is not set
669# CONFIG_PPP is not set 632# CONFIG_PPP is not set
670# CONFIG_SLIP is not set 633# CONFIG_SLIP is not set
@@ -688,6 +651,7 @@ CONFIG_SMC91X=y
688# 651#
689CONFIG_INPUT=m 652CONFIG_INPUT=m
690# CONFIG_INPUT_FF_MEMLESS is not set 653# CONFIG_INPUT_FF_MEMLESS is not set
654# CONFIG_INPUT_POLLDEV is not set
691 655
692# 656#
693# Userland interfaces 657# Userland interfaces
@@ -704,6 +668,7 @@ CONFIG_INPUT_EVDEV=m
704# CONFIG_INPUT_KEYBOARD is not set 668# CONFIG_INPUT_KEYBOARD is not set
705# CONFIG_INPUT_MOUSE is not set 669# CONFIG_INPUT_MOUSE is not set
706# CONFIG_INPUT_JOYSTICK is not set 670# CONFIG_INPUT_JOYSTICK is not set
671# CONFIG_INPUT_TABLET is not set
707# CONFIG_INPUT_TOUCHSCREEN is not set 672# CONFIG_INPUT_TOUCHSCREEN is not set
708# CONFIG_INPUT_MISC is not set 673# CONFIG_INPUT_MISC is not set
709 674
@@ -718,7 +683,7 @@ CONFIG_INPUT_EVDEV=m
718# 683#
719# CONFIG_AD9960 is not set 684# CONFIG_AD9960 is not set
720# CONFIG_SPI_ADC_BF533 is not set 685# CONFIG_SPI_ADC_BF533 is not set
721# CONFIG_BF5xx_PFLAGS is not set 686# CONFIG_BFIN_PFLAGS is not set
722# CONFIG_BF5xx_PPIFCD is not set 687# CONFIG_BF5xx_PPIFCD is not set
723# CONFIG_BF5xx_TIMERS is not set 688# CONFIG_BF5xx_TIMERS is not set
724# CONFIG_BF5xx_PPI is not set 689# CONFIG_BF5xx_PPI is not set
@@ -758,10 +723,6 @@ CONFIG_UNIX98_PTYS=y
758# IPMI 723# IPMI
759# 724#
760# CONFIG_IPMI_HANDLER is not set 725# CONFIG_IPMI_HANDLER is not set
761
762#
763# Watchdog Cards
764#
765CONFIG_WATCHDOG=y 726CONFIG_WATCHDOG=y
766# CONFIG_WATCHDOG_NOWAYOUT is not set 727# CONFIG_WATCHDOG_NOWAYOUT is not set
767 728
@@ -773,7 +734,6 @@ CONFIG_BFIN_WDT=y
773CONFIG_HW_RANDOM=y 734CONFIG_HW_RANDOM=y
774# CONFIG_GEN_RTC is not set 735# CONFIG_GEN_RTC is not set
775CONFIG_BLACKFIN_DPMC=y 736CONFIG_BLACKFIN_DPMC=y
776# CONFIG_DTLK is not set
777# CONFIG_R3964 is not set 737# CONFIG_R3964 is not set
778# CONFIG_RAW_DRIVER is not set 738# CONFIG_RAW_DRIVER is not set
779 739
@@ -781,10 +741,6 @@ CONFIG_BLACKFIN_DPMC=y
781# TPM devices 741# TPM devices
782# 742#
783# CONFIG_TCG_TPM is not set 743# CONFIG_TCG_TPM is not set
784
785#
786# I2C support
787#
788# CONFIG_I2C is not set 744# CONFIG_I2C is not set
789 745
790# 746#
@@ -803,22 +759,22 @@ CONFIG_SPI_BFIN=y
803# SPI Protocol Masters 759# SPI Protocol Masters
804# 760#
805# CONFIG_SPI_AT25 is not set 761# CONFIG_SPI_AT25 is not set
762# CONFIG_SPI_SPIDEV is not set
806 763
807# 764#
808# Dallas's 1-wire bus 765# Dallas's 1-wire bus
809# 766#
810# CONFIG_W1 is not set 767# CONFIG_W1 is not set
811
812#
813# Hardware Monitoring support
814#
815CONFIG_HWMON=y 768CONFIG_HWMON=y
816# CONFIG_HWMON_VID is not set 769# CONFIG_HWMON_VID is not set
817# CONFIG_SENSORS_ABITUGURU is not set 770# CONFIG_SENSORS_ABITUGURU is not set
818# CONFIG_SENSORS_F71805F is not set 771# CONFIG_SENSORS_F71805F is not set
819# CONFIG_SENSORS_LM70 is not set 772# CONFIG_SENSORS_LM70 is not set
820# CONFIG_SENSORS_PC87427 is not set 773# CONFIG_SENSORS_PC87427 is not set
774# CONFIG_SENSORS_SMSC47M1 is not set
775# CONFIG_SENSORS_SMSC47B397 is not set
821# CONFIG_SENSORS_VT1211 is not set 776# CONFIG_SENSORS_VT1211 is not set
777# CONFIG_SENSORS_W83627HF is not set
822# CONFIG_HWMON_DEBUG_CHIP is not set 778# CONFIG_HWMON_DEBUG_CHIP is not set
823 779
824# 780#
@@ -830,16 +786,19 @@ CONFIG_HWMON=y
830# Multimedia devices 786# Multimedia devices
831# 787#
832# CONFIG_VIDEO_DEV is not set 788# CONFIG_VIDEO_DEV is not set
789# CONFIG_DVB_CORE is not set
790CONFIG_DAB=y
833 791
834# 792#
835# Digital Video Broadcasting Devices 793# Graphics support
836# 794#
837# CONFIG_DVB is not set 795# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
838 796
839# 797#
840# Graphics support 798# Display device support
841# 799#
842# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 800# CONFIG_DISPLAY_SUPPORT is not set
801# CONFIG_VGASTATE is not set
843# CONFIG_FB is not set 802# CONFIG_FB is not set
844 803
845# 804#
@@ -862,18 +821,17 @@ CONFIG_USB_ARCH_HAS_HCD=y
862# CONFIG_USB is not set 821# CONFIG_USB is not set
863 822
864# 823#
865# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 824# Enable Host or Gadget support to see Inventra options
866# 825#
867 826
868# 827#
869# USB Gadget Support 828# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
870# 829#
871# CONFIG_USB_GADGET is not set
872 830
873# 831#
874# MMC/SD Card support 832# USB Gadget Support
875# 833#
876# CONFIG_SPI_MMC is not set 834# CONFIG_USB_GADGET is not set
877# CONFIG_MMC is not set 835# CONFIG_MMC is not set
878 836
879# 837#
@@ -913,17 +871,29 @@ CONFIG_RTC_INTF_SYSFS=y
913CONFIG_RTC_INTF_PROC=y 871CONFIG_RTC_INTF_PROC=y
914CONFIG_RTC_INTF_DEV=y 872CONFIG_RTC_INTF_DEV=y
915# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 873# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
874# CONFIG_RTC_DRV_TEST is not set
875
876#
877# I2C RTC drivers
878#
879
880#
881# SPI RTC drivers
882#
883# CONFIG_RTC_DRV_RS5C348 is not set
884# CONFIG_RTC_DRV_MAX6902 is not set
916 885
917# 886#
918# RTC drivers 887# Platform RTC drivers
919# 888#
920# CONFIG_RTC_DRV_DS1553 is not set 889# CONFIG_RTC_DRV_DS1553 is not set
921# CONFIG_RTC_DRV_DS1742 is not set 890# CONFIG_RTC_DRV_DS1742 is not set
922# CONFIG_RTC_DRV_RS5C348 is not set
923# CONFIG_RTC_DRV_M48T86 is not set 891# CONFIG_RTC_DRV_M48T86 is not set
924# CONFIG_RTC_DRV_TEST is not set
925# CONFIG_RTC_DRV_MAX6902 is not set
926# CONFIG_RTC_DRV_V3020 is not set 892# CONFIG_RTC_DRV_V3020 is not set
893
894#
895# on-CPU RTC drivers
896#
927CONFIG_RTC_DRV_BFIN=y 897CONFIG_RTC_DRV_BFIN=y
928 898
929# 899#
@@ -940,14 +910,6 @@ CONFIG_RTC_DRV_BFIN=y
940# 910#
941 911
942# 912#
943# Auxiliary Display support
944#
945
946#
947# Virtualization
948#
949
950#
951# PBX support 913# PBX support
952# 914#
953# CONFIG_PBX is not set 915# CONFIG_PBX is not set
@@ -1047,6 +1009,7 @@ CONFIG_LOCKD=m
1047CONFIG_LOCKD_V4=y 1009CONFIG_LOCKD_V4=y
1048CONFIG_NFS_COMMON=y 1010CONFIG_NFS_COMMON=y
1049CONFIG_SUNRPC=m 1011CONFIG_SUNRPC=m
1012# CONFIG_SUNRPC_BIND34 is not set
1050# CONFIG_RPCSEC_GSS_KRB5 is not set 1013# CONFIG_RPCSEC_GSS_KRB5 is not set
1051# CONFIG_RPCSEC_GSS_SPKM3 is not set 1014# CONFIG_RPCSEC_GSS_SPKM3 is not set
1052CONFIG_SMB_FS=m 1015CONFIG_SMB_FS=m
@@ -1124,14 +1087,20 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1124CONFIG_ENABLE_MUST_CHECK=y 1087CONFIG_ENABLE_MUST_CHECK=y
1125# CONFIG_MAGIC_SYSRQ is not set 1088# CONFIG_MAGIC_SYSRQ is not set
1126# CONFIG_UNUSED_SYMBOLS is not set 1089# CONFIG_UNUSED_SYMBOLS is not set
1127# CONFIG_DEBUG_FS is not set 1090CONFIG_DEBUG_FS=y
1128# CONFIG_HEADERS_CHECK is not set 1091# CONFIG_HEADERS_CHECK is not set
1129# CONFIG_DEBUG_KERNEL is not set 1092# CONFIG_DEBUG_KERNEL is not set
1130CONFIG_LOG_BUF_SHIFT=14
1131# CONFIG_DEBUG_BUGVERBOSE is not set 1093# CONFIG_DEBUG_BUGVERBOSE is not set
1132# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set 1094CONFIG_DEBUG_MMRS=y
1133CONFIG_DEBUG_HUNT_FOR_ZERO=y 1095CONFIG_DEBUG_HUNT_FOR_ZERO=y
1096CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1097CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1098# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1099# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1100CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1101# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1134# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1102# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1103CONFIG_EARLY_PRINTK=y
1135CONFIG_CPLB_INFO=y 1104CONFIG_CPLB_INFO=y
1136CONFIG_ACCESS_CHECK=y 1105CONFIG_ACCESS_CHECK=y
1137 1106
@@ -1154,6 +1123,7 @@ CONFIG_SECURITY_CAPABILITIES=m
1154CONFIG_BITREVERSE=y 1123CONFIG_BITREVERSE=y
1155CONFIG_CRC_CCITT=m 1124CONFIG_CRC_CCITT=m
1156# CONFIG_CRC16 is not set 1125# CONFIG_CRC16 is not set
1126# CONFIG_CRC_ITU_T is not set
1157CONFIG_CRC32=y 1127CONFIG_CRC32=y
1158# CONFIG_LIBCRC32C is not set 1128# CONFIG_LIBCRC32C is not set
1159CONFIG_ZLIB_INFLATE=y 1129CONFIG_ZLIB_INFLATE=y
@@ -1161,3 +1131,4 @@ CONFIG_ZLIB_DEFLATE=m
1161CONFIG_PLIST=y 1131CONFIG_PLIST=y
1162CONFIG_HAS_IOMEM=y 1132CONFIG_HAS_IOMEM=y
1163CONFIG_HAS_IOPORT=y 1133CONFIG_HAS_IOPORT=y
1134CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 64b7f1b3b2af..306302baff06 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -40,7 +41,9 @@ CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 47CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 48# CONFIG_RELAY is not set
46CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
@@ -58,15 +61,20 @@ CONFIG_BUG=y
58CONFIG_ELF_CORE=y 61CONFIG_ELF_CORE=y
59CONFIG_BASE_FULL=y 62CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 63CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y
69CONFIG_VM_EVENT_COUNTERS=y
61CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 70CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
62CONFIG_BUDDY=y
63# CONFIG_NP2 is not set 71# CONFIG_NP2 is not set
64CONFIG_SLAB=y 72CONFIG_SLAB=y
65CONFIG_VM_EVENT_COUNTERS=y 73# CONFIG_SLUB is not set
74# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y 75CONFIG_RT_MUTEXES=y
67CONFIG_TINY_SHMEM=y 76CONFIG_TINY_SHMEM=y
68CONFIG_BASE_SMALL=0 77CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70 78
71# 79#
72# Loadable module support 80# Loadable module support
@@ -185,9 +193,27 @@ CONFIG_WDTIMER=13
185# CONFIG_CMDLINE_BOOL is not set 193# CONFIG_CMDLINE_BOOL is not set
186 194
187# 195#
188# Board Setup 196# Clock/PLL Setup
189# 197#
190CONFIG_CLKIN_HZ=11059200 198CONFIG_CLKIN_HZ=11059200
199# CONFIG_BFIN_KERNEL_CLOCK is not set
200CONFIG_MAX_VCO_HZ=750000000
201CONFIG_MIN_VCO_HZ=50000000
202CONFIG_MAX_SCLK_HZ=133000000
203CONFIG_MIN_SCLK_HZ=27000000
204
205#
206# Kernel Timer/Scheduler
207#
208# CONFIG_HZ_100 is not set
209CONFIG_HZ_250=y
210# CONFIG_HZ_300 is not set
211# CONFIG_HZ_1000 is not set
212CONFIG_HZ=250
213
214#
215# Memory Setup
216#
191CONFIG_MEM_SIZE=128 217CONFIG_MEM_SIZE=128
192CONFIG_MEM_ADD_WIDTH=11 218CONFIG_MEM_ADD_WIDTH=11
193CONFIG_ENET_FLASH_PIN=0 219CONFIG_ENET_FLASH_PIN=0
@@ -198,6 +224,9 @@ CONFIG_BOOT_LOAD=0x1000
198# 224#
199# CONFIG_BFIN_ALIVE_LED is not set 225# CONFIG_BFIN_ALIVE_LED is not set
200# CONFIG_BFIN_IDLE_LED is not set 226# CONFIG_BFIN_IDLE_LED is not set
227CONFIG_BFIN_SCRATCH_REG_RETN=y
228# CONFIG_BFIN_SCRATCH_REG_RETE is not set
229# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
201CONFIG_BFIN_ALIVE_LED_PORT=0xFFC00700 230CONFIG_BFIN_ALIVE_LED_PORT=0xFFC00700
202CONFIG_BFIN_ALIVE_LED_DPORT=0xFFC00730 231CONFIG_BFIN_ALIVE_LED_DPORT=0xFFC00730
203CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700 232CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700
@@ -208,15 +237,6 @@ CONFIG_BFIN_IDLE_LED_DPORT=0xFFC00730
208# 237#
209 238
210# 239#
211# Timer Tick
212#
213# CONFIG_HZ_100 is not set
214CONFIG_HZ_250=y
215# CONFIG_HZ_300 is not set
216# CONFIG_HZ_1000 is not set
217CONFIG_HZ=250
218
219#
220# Memory Optimizations 240# Memory Optimizations
221# 241#
222CONFIG_I_ENTRY_L1=y 242CONFIG_I_ENTRY_L1=y
@@ -255,20 +275,15 @@ CONFIG_DMA_UNCACHED_1M=y
255# 275#
256# Cache Support 276# Cache Support
257# 277#
258CONFIG_BLKFIN_CACHE=y 278CONFIG_BFIN_ICACHE=y
259CONFIG_BLKFIN_DCACHE=y 279CONFIG_BFIN_DCACHE=y
260# CONFIG_BLKFIN_DCACHE_BANKA is not set 280# CONFIG_BFIN_DCACHE_BANKA is not set
261# CONFIG_BLKFIN_CACHE_LOCK is not set 281# CONFIG_BFIN_ICACHE_LOCK is not set
262# CONFIG_BLKFIN_WB is not set 282# CONFIG_BFIN_WB is not set
263CONFIG_BLKFIN_WT=y 283CONFIG_BFIN_WT=y
264CONFIG_L1_MAX_PIECE=16 284CONFIG_L1_MAX_PIECE=16
265 285
266# 286#
267# Clock Settings
268#
269# CONFIG_BFIN_KERNEL_CLOCK is not set
270
271#
272# Asynchonous Memory Configuration 287# Asynchonous Memory Configuration
273# 288#
274 289
@@ -289,12 +304,13 @@ CONFIG_C_AMBEN_ALL=y
289CONFIG_BANK_0=0x7BB0 304CONFIG_BANK_0=0x7BB0
290CONFIG_BANK_1=0x7BB0 305CONFIG_BANK_1=0x7BB0
291CONFIG_BANK_2=0x7BB0 306CONFIG_BANK_2=0x7BB0
292CONFIG_BANK_3=0x99B3 307CONFIG_BANK_3=0xAAC3
293 308
294# 309#
295# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 310# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
296# 311#
297# CONFIG_PCI is not set 312# CONFIG_PCI is not set
313# CONFIG_ARCH_SUPPORTS_MSI is not set
298 314
299# 315#
300# PCCARD (PCMCIA/CardBus) support 316# PCCARD (PCMCIA/CardBus) support
@@ -302,10 +318,6 @@ CONFIG_BANK_3=0x99B3
302# CONFIG_PCCARD is not set 318# CONFIG_PCCARD is not set
303 319
304# 320#
305# PCI Hotplug Support
306#
307
308#
309# Executable file formats 321# Executable file formats
310# 322#
311CONFIG_BINFMT_ELF_FDPIC=y 323CONFIG_BINFMT_ELF_FDPIC=y
@@ -339,7 +351,6 @@ CONFIG_NET=y
339# 351#
340# Networking options 352# Networking options
341# 353#
342# CONFIG_NETDEBUG is not set
343CONFIG_PACKET=y 354CONFIG_PACKET=y
344# CONFIG_PACKET_MMAP is not set 355# CONFIG_PACKET_MMAP is not set
345CONFIG_UNIX=y 356CONFIG_UNIX=y
@@ -380,20 +391,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
380# CONFIG_NETLABEL is not set 391# CONFIG_NETLABEL is not set
381# CONFIG_NETWORK_SECMARK is not set 392# CONFIG_NETWORK_SECMARK is not set
382# CONFIG_NETFILTER is not set 393# CONFIG_NETFILTER is not set
383
384#
385# DCCP Configuration (EXPERIMENTAL)
386#
387# CONFIG_IP_DCCP is not set 394# CONFIG_IP_DCCP is not set
388
389#
390# SCTP Configuration (EXPERIMENTAL)
391#
392# CONFIG_IP_SCTP is not set 395# CONFIG_IP_SCTP is not set
393
394#
395# TIPC Configuration (EXPERIMENTAL)
396#
397# CONFIG_TIPC is not set 396# CONFIG_TIPC is not set
398# CONFIG_ATM is not set 397# CONFIG_ATM is not set
399# CONFIG_BRIDGE is not set 398# CONFIG_BRIDGE is not set
@@ -460,7 +459,16 @@ CONFIG_IRTTY_SIR=m
460# FIR device drivers 459# FIR device drivers
461# 460#
462# CONFIG_BT is not set 461# CONFIG_BT is not set
462# CONFIG_AF_RXRPC is not set
463
464#
465# Wireless
466#
467# CONFIG_CFG80211 is not set
468# CONFIG_WIRELESS_EXT is not set
469# CONFIG_MAC80211 is not set
463# CONFIG_IEEE80211 is not set 470# CONFIG_IEEE80211 is not set
471# CONFIG_RFKILL is not set
464 472
465# 473#
466# Device Drivers 474# Device Drivers
@@ -478,10 +486,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
478# Connector - unified userspace <-> kernelspace linker 486# Connector - unified userspace <-> kernelspace linker
479# 487#
480# CONFIG_CONNECTOR is not set 488# CONFIG_CONNECTOR is not set
481
482#
483# Memory Technology Devices (MTD)
484#
485CONFIG_MTD=y 489CONFIG_MTD=y
486# CONFIG_MTD_DEBUG is not set 490# CONFIG_MTD_DEBUG is not set
487# CONFIG_MTD_CONCAT is not set 491# CONFIG_MTD_CONCAT is not set
@@ -525,7 +529,6 @@ CONFIG_MTD_MW320D=m
525CONFIG_MTD_RAM=y 529CONFIG_MTD_RAM=y
526CONFIG_MTD_ROM=m 530CONFIG_MTD_ROM=m
527# CONFIG_MTD_ABSENT is not set 531# CONFIG_MTD_ABSENT is not set
528# CONFIG_MTD_OBSOLETE_CHIPS is not set
529 532
530# 533#
531# Mapping drivers for chip access 534# Mapping drivers for chip access
@@ -562,16 +565,13 @@ CONFIG_BFIN_FLASH_BANK_3=0x7BB0
562# CONFIG_MTD_DOC2000 is not set 565# CONFIG_MTD_DOC2000 is not set
563# CONFIG_MTD_DOC2001 is not set 566# CONFIG_MTD_DOC2001 is not set
564# CONFIG_MTD_DOC2001PLUS is not set 567# CONFIG_MTD_DOC2001PLUS is not set
565
566#
567# NAND Flash Device Drivers
568#
569# CONFIG_MTD_NAND is not set 568# CONFIG_MTD_NAND is not set
569# CONFIG_MTD_ONENAND is not set
570 570
571# 571#
572# OneNAND Flash Device Drivers 572# UBI - Unsorted block images
573# 573#
574# CONFIG_MTD_ONENAND is not set 574# CONFIG_MTD_UBI is not set
575 575
576# 576#
577# Parallel port support 577# Parallel port support
@@ -599,10 +599,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
599# 599#
600# Misc devices 600# Misc devices
601# 601#
602
603#
604# ATA/ATAPI/MFM/RLL support
605#
606# CONFIG_IDE is not set 602# CONFIG_IDE is not set
607 603
608# 604#
@@ -611,10 +607,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
611# CONFIG_RAID_ATTRS is not set 607# CONFIG_RAID_ATTRS is not set
612# CONFIG_SCSI is not set 608# CONFIG_SCSI is not set
613# CONFIG_SCSI_NETLINK is not set 609# CONFIG_SCSI_NETLINK is not set
614
615#
616# Serial ATA (prod) and Parallel ATA (experimental) drivers
617#
618# CONFIG_ATA is not set 610# CONFIG_ATA is not set
619 611
620# 612#
@@ -623,19 +615,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
623# CONFIG_MD is not set 615# CONFIG_MD is not set
624 616
625# 617#
626# Fusion MPT device support
627#
628# CONFIG_FUSION is not set
629
630#
631# IEEE 1394 (FireWire) support
632#
633
634#
635# I2O device support
636#
637
638#
639# Network device support 618# Network device support
640# 619#
641CONFIG_NETDEVICES=y 620CONFIG_NETDEVICES=y
@@ -643,10 +622,6 @@ CONFIG_NETDEVICES=y
643# CONFIG_BONDING is not set 622# CONFIG_BONDING is not set
644# CONFIG_EQUALIZER is not set 623# CONFIG_EQUALIZER is not set
645# CONFIG_TUN is not set 624# CONFIG_TUN is not set
646
647#
648# PHY device support
649#
650# CONFIG_PHYLIB is not set 625# CONFIG_PHYLIB is not set
651 626
652# 627#
@@ -656,27 +631,15 @@ CONFIG_NET_ETHERNET=y
656CONFIG_MII=y 631CONFIG_MII=y
657CONFIG_SMC91X=y 632CONFIG_SMC91X=y
658# CONFIG_SMSC911X is not set 633# CONFIG_SMSC911X is not set
634# CONFIG_DM9000 is not set
635CONFIG_NETDEV_1000=y
636CONFIG_NETDEV_10000=y
659 637
660# 638#
661# Ethernet (1000 Mbit) 639# Wireless LAN
662#
663
664#
665# Ethernet (10000 Mbit)
666#
667
668#
669# Token Ring devices
670#
671
672#
673# Wireless LAN (non-hamradio)
674#
675# CONFIG_NET_RADIO is not set
676
677#
678# Wan interfaces
679# 640#
641# CONFIG_WLAN_PRE80211 is not set
642# CONFIG_WLAN_80211 is not set
680# CONFIG_WAN is not set 643# CONFIG_WAN is not set
681# CONFIG_PPP is not set 644# CONFIG_PPP is not set
682# CONFIG_SLIP is not set 645# CONFIG_SLIP is not set
@@ -700,6 +663,7 @@ CONFIG_SMC91X=y
700# 663#
701CONFIG_INPUT=y 664CONFIG_INPUT=y
702# CONFIG_INPUT_FF_MEMLESS is not set 665# CONFIG_INPUT_FF_MEMLESS is not set
666# CONFIG_INPUT_POLLDEV is not set
703 667
704# 668#
705# Userland interfaces 669# Userland interfaces
@@ -716,8 +680,14 @@ CONFIG_INPUT_EVDEV=m
716# CONFIG_INPUT_KEYBOARD is not set 680# CONFIG_INPUT_KEYBOARD is not set
717# CONFIG_INPUT_MOUSE is not set 681# CONFIG_INPUT_MOUSE is not set
718# CONFIG_INPUT_JOYSTICK is not set 682# CONFIG_INPUT_JOYSTICK is not set
683# CONFIG_INPUT_TABLET is not set
719# CONFIG_INPUT_TOUCHSCREEN is not set 684# CONFIG_INPUT_TOUCHSCREEN is not set
720CONFIG_INPUT_MISC=y 685CONFIG_INPUT_MISC=y
686# CONFIG_INPUT_ATI_REMOTE is not set
687# CONFIG_INPUT_ATI_REMOTE2 is not set
688# CONFIG_INPUT_KEYSPAN_REMOTE is not set
689# CONFIG_INPUT_POWERMATE is not set
690# CONFIG_INPUT_YEALINK is not set
721# CONFIG_INPUT_UINPUT is not set 691# CONFIG_INPUT_UINPUT is not set
722# CONFIG_BF53X_PFBUTTONS is not set 692# CONFIG_BF53X_PFBUTTONS is not set
723CONFIG_TWI_KEYPAD=m 693CONFIG_TWI_KEYPAD=m
@@ -734,7 +704,7 @@ CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=39
734# 704#
735# CONFIG_AD9960 is not set 705# CONFIG_AD9960 is not set
736# CONFIG_SPI_ADC_BF533 is not set 706# CONFIG_SPI_ADC_BF533 is not set
737# CONFIG_BF5xx_PFLAGS is not set 707# CONFIG_BFIN_PFLAGS is not set
738# CONFIG_BF5xx_PPIFCD is not set 708# CONFIG_BF5xx_PPIFCD is not set
739# CONFIG_BF5xx_TIMERS is not set 709# CONFIG_BF5xx_TIMERS is not set
740# CONFIG_BF5xx_PPI is not set 710# CONFIG_BF5xx_PPI is not set
@@ -777,10 +747,6 @@ CONFIG_UNIX98_PTYS=y
777# IPMI 747# IPMI
778# 748#
779# CONFIG_IPMI_HANDLER is not set 749# CONFIG_IPMI_HANDLER is not set
780
781#
782# Watchdog Cards
783#
784CONFIG_WATCHDOG=y 750CONFIG_WATCHDOG=y
785# CONFIG_WATCHDOG_NOWAYOUT is not set 751# CONFIG_WATCHDOG_NOWAYOUT is not set
786 752
@@ -792,7 +758,6 @@ CONFIG_BFIN_WDT=y
792CONFIG_HW_RANDOM=y 758CONFIG_HW_RANDOM=y
793# CONFIG_GEN_RTC is not set 759# CONFIG_GEN_RTC is not set
794CONFIG_BLACKFIN_DPMC=y 760CONFIG_BLACKFIN_DPMC=y
795# CONFIG_DTLK is not set
796# CONFIG_R3964 is not set 761# CONFIG_R3964 is not set
797# CONFIG_RAW_DRIVER is not set 762# CONFIG_RAW_DRIVER is not set
798 763
@@ -800,11 +765,8 @@ CONFIG_BLACKFIN_DPMC=y
800# TPM devices 765# TPM devices
801# 766#
802# CONFIG_TCG_TPM is not set 767# CONFIG_TCG_TPM is not set
803
804#
805# I2C support
806#
807CONFIG_I2C=m 768CONFIG_I2C=m
769CONFIG_I2C_BOARDINFO=y
808CONFIG_I2C_CHARDEV=m 770CONFIG_I2C_CHARDEV=m
809 771
810# 772#
@@ -818,10 +780,11 @@ CONFIG_I2C_ALGOBIT=m
818# I2C Hardware Bus support 780# I2C Hardware Bus support
819# 781#
820# CONFIG_I2C_BLACKFIN_GPIO is not set 782# CONFIG_I2C_BLACKFIN_GPIO is not set
783# CONFIG_I2C_GPIO is not set
821# CONFIG_I2C_OCORES is not set 784# CONFIG_I2C_OCORES is not set
822# CONFIG_I2C_PARPORT_LIGHT is not set 785# CONFIG_I2C_PARPORT_LIGHT is not set
786# CONFIG_I2C_SIMTEC is not set
823# CONFIG_I2C_STUB is not set 787# CONFIG_I2C_STUB is not set
824# CONFIG_I2C_PCA_ISA is not set
825 788
826# 789#
827# Miscellaneous I2C Chip support 790# Miscellaneous I2C Chip support
@@ -857,18 +820,16 @@ CONFIG_SPI_BFIN=y
857# SPI Protocol Masters 820# SPI Protocol Masters
858# 821#
859# CONFIG_SPI_AT25 is not set 822# CONFIG_SPI_AT25 is not set
823# CONFIG_SPI_SPIDEV is not set
860 824
861# 825#
862# Dallas's 1-wire bus 826# Dallas's 1-wire bus
863# 827#
864# CONFIG_W1 is not set 828# CONFIG_W1 is not set
865
866#
867# Hardware Monitoring support
868#
869CONFIG_HWMON=y 829CONFIG_HWMON=y
870# CONFIG_HWMON_VID is not set 830# CONFIG_HWMON_VID is not set
871# CONFIG_SENSORS_ABITUGURU is not set 831# CONFIG_SENSORS_ABITUGURU is not set
832# CONFIG_SENSORS_AD7418 is not set
872# CONFIG_SENSORS_ADM1021 is not set 833# CONFIG_SENSORS_ADM1021 is not set
873# CONFIG_SENSORS_ADM1025 is not set 834# CONFIG_SENSORS_ADM1025 is not set
874# CONFIG_SENSORS_ADM1026 is not set 835# CONFIG_SENSORS_ADM1026 is not set
@@ -896,6 +857,7 @@ CONFIG_HWMON=y
896# CONFIG_SENSORS_LM90 is not set 857# CONFIG_SENSORS_LM90 is not set
897# CONFIG_SENSORS_LM92 is not set 858# CONFIG_SENSORS_LM92 is not set
898# CONFIG_SENSORS_MAX1619 is not set 859# CONFIG_SENSORS_MAX1619 is not set
860# CONFIG_SENSORS_MAX6650 is not set
899# CONFIG_SENSORS_PC87360 is not set 861# CONFIG_SENSORS_PC87360 is not set
900# CONFIG_SENSORS_PC87427 is not set 862# CONFIG_SENSORS_PC87427 is not set
901# CONFIG_SENSORS_SMSC47M1 is not set 863# CONFIG_SENSORS_SMSC47M1 is not set
@@ -920,22 +882,30 @@ CONFIG_HWMON=y
920# Multimedia devices 882# Multimedia devices
921# 883#
922# CONFIG_VIDEO_DEV is not set 884# CONFIG_VIDEO_DEV is not set
885# CONFIG_DVB_CORE is not set
886CONFIG_DAB=y
923 887
924# 888#
925# Digital Video Broadcasting Devices 889# Graphics support
926# 890#
927# CONFIG_DVB is not set 891# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
928 892
929# 893#
930# Graphics support 894# Display device support
931# 895#
932# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 896# CONFIG_DISPLAY_SUPPORT is not set
897# CONFIG_VGASTATE is not set
933CONFIG_FB=m 898CONFIG_FB=m
934CONFIG_FIRMWARE_EDID=y 899CONFIG_FIRMWARE_EDID=y
935# CONFIG_FB_DDC is not set 900# CONFIG_FB_DDC is not set
936CONFIG_FB_CFB_FILLRECT=m 901CONFIG_FB_CFB_FILLRECT=m
937CONFIG_FB_CFB_COPYAREA=m 902CONFIG_FB_CFB_COPYAREA=m
938CONFIG_FB_CFB_IMAGEBLIT=m 903CONFIG_FB_CFB_IMAGEBLIT=m
904# CONFIG_FB_SYS_FILLRECT is not set
905# CONFIG_FB_SYS_COPYAREA is not set
906# CONFIG_FB_SYS_IMAGEBLIT is not set
907# CONFIG_FB_SYS_FOPS is not set
908CONFIG_FB_DEFERRED_IO=y
939# CONFIG_FB_SVGALIB is not set 909# CONFIG_FB_SVGALIB is not set
940# CONFIG_FB_MACMODES is not set 910# CONFIG_FB_MACMODES is not set
941# CONFIG_FB_BACKLIGHT is not set 911# CONFIG_FB_BACKLIGHT is not set
@@ -957,10 +927,6 @@ CONFIG_ADV7393_1XMEM=y
957# CONFIG_ADV7393_2XMEM is not set 927# CONFIG_ADV7393_2XMEM is not set
958# CONFIG_FB_S1D13XXX is not set 928# CONFIG_FB_S1D13XXX is not set
959# CONFIG_FB_VIRTUAL is not set 929# CONFIG_FB_VIRTUAL is not set
960
961#
962# Logo configuration
963#
964# CONFIG_LOGO is not set 930# CONFIG_LOGO is not set
965 931
966# 932#
@@ -1001,7 +967,6 @@ CONFIG_SND_BLACKFIN_AD1836_TDM=y
1001# CONFIG_SND_BLACKFIN_AD1836_I2S is not set 967# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
1002CONFIG_SND_BLACKFIN_AD1836_MULSUB=y 968CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
1003# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set 969# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
1004CONFIG_SND_BLACKFIN_AD1981B=m
1005CONFIG_SND_BLACKFIN_SPORT=0 970CONFIG_SND_BLACKFIN_SPORT=0
1006CONFIG_SND_BLACKFIN_SPI_PFBIT=4 971CONFIG_SND_BLACKFIN_SPI_PFBIT=4
1007CONFIG_SND_BFIN_AD73311=m 972CONFIG_SND_BFIN_AD73311=m
@@ -1009,11 +974,16 @@ CONFIG_SND_BFIN_SPORT=0
1009CONFIG_SND_BFIN_AD73311_SE=4 974CONFIG_SND_BFIN_AD73311_SE=4
1010 975
1011# 976#
1012# SoC audio support 977# System on Chip audio support
1013# 978#
1014# CONFIG_SND_SOC is not set 979# CONFIG_SND_SOC is not set
1015 980
1016# 981#
982# SoC Audio for the ADI Blackfin
983#
984# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
985
986#
1017# Open Sound System 987# Open Sound System
1018# 988#
1019# CONFIG_SOUND_PRIME is not set 989# CONFIG_SOUND_PRIME is not set
@@ -1033,18 +1003,17 @@ CONFIG_USB_ARCH_HAS_HCD=y
1033# CONFIG_USB is not set 1003# CONFIG_USB is not set
1034 1004
1035# 1005#
1036# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1006# Enable Host or Gadget support to see Inventra options
1037# 1007#
1038 1008
1039# 1009#
1040# USB Gadget Support 1010# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1041# 1011#
1042# CONFIG_USB_GADGET is not set
1043 1012
1044# 1013#
1045# MMC/SD Card support 1014# USB Gadget Support
1046# 1015#
1047# CONFIG_SPI_MMC is not set 1016# CONFIG_USB_GADGET is not set
1048# CONFIG_MMC is not set 1017# CONFIG_MMC is not set
1049 1018
1050# 1019#
@@ -1084,44 +1053,50 @@ CONFIG_RTC_INTF_SYSFS=y
1084CONFIG_RTC_INTF_PROC=y 1053CONFIG_RTC_INTF_PROC=y
1085CONFIG_RTC_INTF_DEV=y 1054CONFIG_RTC_INTF_DEV=y
1086# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1055# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1056# CONFIG_RTC_DRV_TEST is not set
1087 1057
1088# 1058#
1089# RTC drivers 1059# I2C RTC drivers
1090# 1060#
1091# CONFIG_RTC_DRV_X1205 is not set
1092# CONFIG_RTC_DRV_DS1307 is not set 1061# CONFIG_RTC_DRV_DS1307 is not set
1093# CONFIG_RTC_DRV_DS1553 is not set
1094# CONFIG_RTC_DRV_ISL1208 is not set
1095# CONFIG_RTC_DRV_DS1672 is not set 1062# CONFIG_RTC_DRV_DS1672 is not set
1096# CONFIG_RTC_DRV_DS1742 is not set 1063# CONFIG_RTC_DRV_MAX6900 is not set
1064# CONFIG_RTC_DRV_RS5C372 is not set
1065# CONFIG_RTC_DRV_ISL1208 is not set
1066# CONFIG_RTC_DRV_X1205 is not set
1097# CONFIG_RTC_DRV_PCF8563 is not set 1067# CONFIG_RTC_DRV_PCF8563 is not set
1068# CONFIG_RTC_DRV_PCF8583 is not set
1069
1070#
1071# SPI RTC drivers
1072#
1098# CONFIG_RTC_DRV_RS5C348 is not set 1073# CONFIG_RTC_DRV_RS5C348 is not set
1099# CONFIG_RTC_DRV_RS5C372 is not set
1100# CONFIG_RTC_DRV_M48T86 is not set
1101# CONFIG_RTC_DRV_TEST is not set
1102# CONFIG_RTC_DRV_MAX6902 is not set 1074# CONFIG_RTC_DRV_MAX6902 is not set
1103# CONFIG_RTC_DRV_V3020 is not set
1104CONFIG_RTC_DRV_BFIN=y
1105 1075
1106# 1076#
1107# DMA Engine support 1077# Platform RTC drivers
1108# 1078#
1109# CONFIG_DMA_ENGINE is not set 1079# CONFIG_RTC_DRV_DS1553 is not set
1080# CONFIG_RTC_DRV_DS1742 is not set
1081# CONFIG_RTC_DRV_M48T86 is not set
1082# CONFIG_RTC_DRV_V3020 is not set
1110 1083
1111# 1084#
1112# DMA Clients 1085# on-CPU RTC drivers
1113# 1086#
1087CONFIG_RTC_DRV_BFIN=y
1114 1088
1115# 1089#
1116# DMA Devices 1090# DMA Engine support
1117# 1091#
1092# CONFIG_DMA_ENGINE is not set
1118 1093
1119# 1094#
1120# Auxiliary Display support 1095# DMA Clients
1121# 1096#
1122 1097
1123# 1098#
1124# Virtualization 1099# DMA Devices
1125# 1100#
1126 1101
1127# 1102#
@@ -1224,6 +1199,7 @@ CONFIG_LOCKD=m
1224CONFIG_LOCKD_V4=y 1199CONFIG_LOCKD_V4=y
1225CONFIG_NFS_COMMON=y 1200CONFIG_NFS_COMMON=y
1226CONFIG_SUNRPC=m 1201CONFIG_SUNRPC=m
1202# CONFIG_SUNRPC_BIND34 is not set
1227# CONFIG_RPCSEC_GSS_KRB5 is not set 1203# CONFIG_RPCSEC_GSS_KRB5 is not set
1228# CONFIG_RPCSEC_GSS_SPKM3 is not set 1204# CONFIG_RPCSEC_GSS_SPKM3 is not set
1229CONFIG_SMB_FS=m 1205CONFIG_SMB_FS=m
@@ -1301,14 +1277,20 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1301CONFIG_ENABLE_MUST_CHECK=y 1277CONFIG_ENABLE_MUST_CHECK=y
1302# CONFIG_MAGIC_SYSRQ is not set 1278# CONFIG_MAGIC_SYSRQ is not set
1303# CONFIG_UNUSED_SYMBOLS is not set 1279# CONFIG_UNUSED_SYMBOLS is not set
1304# CONFIG_DEBUG_FS is not set 1280CONFIG_DEBUG_FS=y
1305# CONFIG_HEADERS_CHECK is not set 1281# CONFIG_HEADERS_CHECK is not set
1306# CONFIG_DEBUG_KERNEL is not set 1282# CONFIG_DEBUG_KERNEL is not set
1307CONFIG_LOG_BUF_SHIFT=14
1308# CONFIG_DEBUG_BUGVERBOSE is not set 1283# CONFIG_DEBUG_BUGVERBOSE is not set
1309# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set 1284CONFIG_DEBUG_MMRS=y
1310CONFIG_DEBUG_HUNT_FOR_ZERO=y 1285CONFIG_DEBUG_HUNT_FOR_ZERO=y
1286CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1287CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1288# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1289# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1290CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1291# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1311# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1292# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1293CONFIG_EARLY_PRINTK=y
1312CONFIG_CPLB_INFO=y 1294CONFIG_CPLB_INFO=y
1313CONFIG_ACCESS_CHECK=y 1295CONFIG_ACCESS_CHECK=y
1314 1296
@@ -1331,6 +1313,7 @@ CONFIG_SECURITY_CAPABILITIES=m
1331CONFIG_BITREVERSE=y 1313CONFIG_BITREVERSE=y
1332CONFIG_CRC_CCITT=m 1314CONFIG_CRC_CCITT=m
1333# CONFIG_CRC16 is not set 1315# CONFIG_CRC16 is not set
1316# CONFIG_CRC_ITU_T is not set
1334CONFIG_CRC32=y 1317CONFIG_CRC32=y
1335# CONFIG_LIBCRC32C is not set 1318# CONFIG_LIBCRC32C is not set
1336CONFIG_ZLIB_INFLATE=y 1319CONFIG_ZLIB_INFLATE=y
@@ -1338,3 +1321,4 @@ CONFIG_ZLIB_DEFLATE=m
1338CONFIG_PLIST=y 1321CONFIG_PLIST=y
1339CONFIG_HAS_IOMEM=y 1322CONFIG_HAS_IOMEM=y
1340CONFIG_HAS_IOPORT=y 1323CONFIG_HAS_IOPORT=y
1324CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index ccf09dc09a18..828b604438eb 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -40,7 +41,9 @@ CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 47CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 48# CONFIG_RELAY is not set
46CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
@@ -58,15 +61,20 @@ CONFIG_BUG=y
58CONFIG_ELF_CORE=y 61CONFIG_ELF_CORE=y
59CONFIG_BASE_FULL=y 62CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 63CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y
69CONFIG_VM_EVENT_COUNTERS=y
61CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 70CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
62CONFIG_BUDDY=y
63# CONFIG_NP2 is not set 71# CONFIG_NP2 is not set
64CONFIG_SLAB=y 72CONFIG_SLAB=y
65CONFIG_VM_EVENT_COUNTERS=y 73# CONFIG_SLUB is not set
74# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y 75CONFIG_RT_MUTEXES=y
67CONFIG_TINY_SHMEM=y 76CONFIG_TINY_SHMEM=y
68CONFIG_BASE_SMALL=0 77CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70 78
71# 79#
72# Loadable module support 80# Loadable module support
@@ -148,13 +156,6 @@ CONFIG_IRQ_PLL_WAKEUP=7
148# 156#
149 157
150# 158#
151# PORT F/G Selection
152#
153CONFIG_BF537_PORT_F=y
154# CONFIG_BF537_PORT_G is not set
155# CONFIG_BF537_PORT_H is not set
156
157#
158# Interrupt Priority Assignment 159# Interrupt Priority Assignment
159# 160#
160 161
@@ -199,19 +200,17 @@ CONFIG_IRQ_WATCH=13
199# CONFIG_CMDLINE_BOOL is not set 200# CONFIG_CMDLINE_BOOL is not set
200 201
201# 202#
202# Board Setup 203# Clock/PLL Setup
203# 204#
204CONFIG_CLKIN_HZ=25000000 205CONFIG_CLKIN_HZ=25000000
205CONFIG_MEM_SIZE=64 206# CONFIG_BFIN_KERNEL_CLOCK is not set
206CONFIG_MEM_ADD_WIDTH=10 207CONFIG_MAX_VCO_HZ=600000000
207CONFIG_BOOT_LOAD=0x1000 208CONFIG_MIN_VCO_HZ=50000000
208 209CONFIG_MAX_SCLK_HZ=133000000
209# 210CONFIG_MIN_SCLK_HZ=27000000
210# Blackfin Kernel Optimizations
211#
212 211
213# 212#
214# Timer Tick 213# Kernel Timer/Scheduler
215# 214#
216# CONFIG_HZ_100 is not set 215# CONFIG_HZ_100 is not set
217CONFIG_HZ_250=y 216CONFIG_HZ_250=y
@@ -220,6 +219,20 @@ CONFIG_HZ_250=y
220CONFIG_HZ=250 219CONFIG_HZ=250
221 220
222# 221#
222# Memory Setup
223#
224CONFIG_MEM_SIZE=64
225CONFIG_MEM_ADD_WIDTH=10
226CONFIG_BOOT_LOAD=0x1000
227CONFIG_BFIN_SCRATCH_REG_RETN=y
228# CONFIG_BFIN_SCRATCH_REG_RETE is not set
229# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
230
231#
232# Blackfin Kernel Optimizations
233#
234
235#
223# Memory Optimizations 236# Memory Optimizations
224# 237#
225CONFIG_I_ENTRY_L1=y 238CONFIG_I_ENTRY_L1=y
@@ -258,20 +271,15 @@ CONFIG_DMA_UNCACHED_1M=y
258# 271#
259# Cache Support 272# Cache Support
260# 273#
261CONFIG_BLKFIN_CACHE=y 274CONFIG_BFIN_ICACHE=y
262CONFIG_BLKFIN_DCACHE=y 275CONFIG_BFIN_DCACHE=y
263# CONFIG_BLKFIN_DCACHE_BANKA is not set 276# CONFIG_BFIN_DCACHE_BANKA is not set
264# CONFIG_BLKFIN_CACHE_LOCK is not set 277# CONFIG_BFIN_ICACHE_LOCK is not set
265# CONFIG_BLKFIN_WB is not set 278# CONFIG_BFIN_WB is not set
266CONFIG_BLKFIN_WT=y 279CONFIG_BFIN_WT=y
267CONFIG_L1_MAX_PIECE=16 280CONFIG_L1_MAX_PIECE=16
268 281
269# 282#
270# Clock Settings
271#
272# CONFIG_BFIN_KERNEL_CLOCK is not set
273
274#
275# Asynchonous Memory Configuration 283# Asynchonous Memory Configuration
276# 284#
277 285
@@ -298,6 +306,7 @@ CONFIG_BANK_3=0x99B3
298# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 306# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
299# 307#
300# CONFIG_PCI is not set 308# CONFIG_PCI is not set
309# CONFIG_ARCH_SUPPORTS_MSI is not set
301 310
302# 311#
303# PCCARD (PCMCIA/CardBus) support 312# PCCARD (PCMCIA/CardBus) support
@@ -305,10 +314,6 @@ CONFIG_BANK_3=0x99B3
305# CONFIG_PCCARD is not set 314# CONFIG_PCCARD is not set
306 315
307# 316#
308# PCI Hotplug Support
309#
310
311#
312# Executable file formats 317# Executable file formats
313# 318#
314CONFIG_BINFMT_ELF_FDPIC=y 319CONFIG_BINFMT_ELF_FDPIC=y
@@ -342,7 +347,6 @@ CONFIG_NET=y
342# 347#
343# Networking options 348# Networking options
344# 349#
345# CONFIG_NETDEBUG is not set
346CONFIG_PACKET=y 350CONFIG_PACKET=y
347# CONFIG_PACKET_MMAP is not set 351# CONFIG_PACKET_MMAP is not set
348CONFIG_UNIX=y 352CONFIG_UNIX=y
@@ -383,20 +387,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
383# CONFIG_NETLABEL is not set 387# CONFIG_NETLABEL is not set
384# CONFIG_NETWORK_SECMARK is not set 388# CONFIG_NETWORK_SECMARK is not set
385# CONFIG_NETFILTER is not set 389# CONFIG_NETFILTER is not set
386
387#
388# DCCP Configuration (EXPERIMENTAL)
389#
390# CONFIG_IP_DCCP is not set 390# CONFIG_IP_DCCP is not set
391
392#
393# SCTP Configuration (EXPERIMENTAL)
394#
395# CONFIG_IP_SCTP is not set 391# CONFIG_IP_SCTP is not set
396
397#
398# TIPC Configuration (EXPERIMENTAL)
399#
400# CONFIG_TIPC is not set 392# CONFIG_TIPC is not set
401# CONFIG_ATM is not set 393# CONFIG_ATM is not set
402# CONFIG_BRIDGE is not set 394# CONFIG_BRIDGE is not set
@@ -463,7 +455,16 @@ CONFIG_IRTTY_SIR=m
463# FIR device drivers 455# FIR device drivers
464# 456#
465# CONFIG_BT is not set 457# CONFIG_BT is not set
458# CONFIG_AF_RXRPC is not set
459
460#
461# Wireless
462#
463# CONFIG_CFG80211 is not set
464# CONFIG_WIRELESS_EXT is not set
465# CONFIG_MAC80211 is not set
466# CONFIG_IEEE80211 is not set 466# CONFIG_IEEE80211 is not set
467# CONFIG_RFKILL is not set
467 468
468# 469#
469# Device Drivers 470# Device Drivers
@@ -481,10 +482,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
481# Connector - unified userspace <-> kernelspace linker 482# Connector - unified userspace <-> kernelspace linker
482# 483#
483# CONFIG_CONNECTOR is not set 484# CONFIG_CONNECTOR is not set
484
485#
486# Memory Technology Devices (MTD)
487#
488CONFIG_MTD=y 485CONFIG_MTD=y
489# CONFIG_MTD_DEBUG is not set 486# CONFIG_MTD_DEBUG is not set
490# CONFIG_MTD_CONCAT is not set 487# CONFIG_MTD_CONCAT is not set
@@ -528,7 +525,6 @@ CONFIG_MTD_MW320D=m
528CONFIG_MTD_RAM=y 525CONFIG_MTD_RAM=y
529CONFIG_MTD_ROM=m 526CONFIG_MTD_ROM=m
530# CONFIG_MTD_ABSENT is not set 527# CONFIG_MTD_ABSENT is not set
531# CONFIG_MTD_OBSOLETE_CHIPS is not set
532 528
533# 529#
534# Mapping drivers for chip access 530# Mapping drivers for chip access
@@ -565,13 +561,10 @@ CONFIG_BFIN_FLASH_BANK_3=0x7BB0
565# CONFIG_MTD_DOC2000 is not set 561# CONFIG_MTD_DOC2000 is not set
566# CONFIG_MTD_DOC2001 is not set 562# CONFIG_MTD_DOC2001 is not set
567# CONFIG_MTD_DOC2001PLUS is not set 563# CONFIG_MTD_DOC2001PLUS is not set
568
569#
570# NAND Flash Device Drivers
571#
572CONFIG_MTD_NAND=m 564CONFIG_MTD_NAND=m
573# CONFIG_MTD_NAND_VERIFY_WRITE is not set 565# CONFIG_MTD_NAND_VERIFY_WRITE is not set
574# CONFIG_MTD_NAND_ECC_SMC is not set 566# CONFIG_MTD_NAND_ECC_SMC is not set
567# CONFIG_MTD_NAND_MUSEUM_IDS is not set
575CONFIG_MTD_NAND_BFIN=m 568CONFIG_MTD_NAND_BFIN=m
576CONFIG_BFIN_NAND_BASE=0x20212000 569CONFIG_BFIN_NAND_BASE=0x20212000
577CONFIG_BFIN_NAND_CLE=2 570CONFIG_BFIN_NAND_CLE=2
@@ -580,11 +573,13 @@ CONFIG_BFIN_NAND_READY=3
580CONFIG_MTD_NAND_IDS=m 573CONFIG_MTD_NAND_IDS=m
581# CONFIG_MTD_NAND_DISKONCHIP is not set 574# CONFIG_MTD_NAND_DISKONCHIP is not set
582# CONFIG_MTD_NAND_NANDSIM is not set 575# CONFIG_MTD_NAND_NANDSIM is not set
576# CONFIG_MTD_NAND_PLATFORM is not set
577# CONFIG_MTD_ONENAND is not set
583 578
584# 579#
585# OneNAND Flash Device Drivers 580# UBI - Unsorted block images
586# 581#
587# CONFIG_MTD_ONENAND is not set 582# CONFIG_MTD_UBI is not set
588 583
589# 584#
590# Parallel port support 585# Parallel port support
@@ -612,10 +607,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
612# 607#
613# Misc devices 608# Misc devices
614# 609#
615
616#
617# ATA/ATAPI/MFM/RLL support
618#
619# CONFIG_IDE is not set 610# CONFIG_IDE is not set
620 611
621# 612#
@@ -624,10 +615,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
624# CONFIG_RAID_ATTRS is not set 615# CONFIG_RAID_ATTRS is not set
625# CONFIG_SCSI is not set 616# CONFIG_SCSI is not set
626# CONFIG_SCSI_NETLINK is not set 617# CONFIG_SCSI_NETLINK is not set
627
628#
629# Serial ATA (prod) and Parallel ATA (experimental) drivers
630#
631# CONFIG_ATA is not set 618# CONFIG_ATA is not set
632 619
633# 620#
@@ -636,19 +623,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
636# CONFIG_MD is not set 623# CONFIG_MD is not set
637 624
638# 625#
639# Fusion MPT device support
640#
641# CONFIG_FUSION is not set
642
643#
644# IEEE 1394 (FireWire) support
645#
646
647#
648# I2O device support
649#
650
651#
652# Network device support 626# Network device support
653# 627#
654CONFIG_NETDEVICES=y 628CONFIG_NETDEVICES=y
@@ -656,11 +630,20 @@ CONFIG_NETDEVICES=y
656# CONFIG_BONDING is not set 630# CONFIG_BONDING is not set
657# CONFIG_EQUALIZER is not set 631# CONFIG_EQUALIZER is not set
658# CONFIG_TUN is not set 632# CONFIG_TUN is not set
633CONFIG_PHYLIB=y
659 634
660# 635#
661# PHY device support 636# MII PHY device drivers
662# 637#
663# CONFIG_PHYLIB is not set 638# CONFIG_MARVELL_PHY is not set
639# CONFIG_DAVICOM_PHY is not set
640# CONFIG_QSEMI_PHY is not set
641# CONFIG_LXT_PHY is not set
642# CONFIG_CICADA_PHY is not set
643# CONFIG_VITESSE_PHY is not set
644CONFIG_SMSC_PHY=y
645# CONFIG_BROADCOM_PHY is not set
646# CONFIG_FIXED_PHY is not set
664 647
665# 648#
666# Ethernet (10 or 100Mbit) 649# Ethernet (10 or 100Mbit)
@@ -674,27 +657,15 @@ CONFIG_BFIN_TX_DESC_NUM=10
674CONFIG_BFIN_RX_DESC_NUM=20 657CONFIG_BFIN_RX_DESC_NUM=20
675# CONFIG_BFIN_MAC_RMII is not set 658# CONFIG_BFIN_MAC_RMII is not set
676# CONFIG_SMSC911X is not set 659# CONFIG_SMSC911X is not set
660# CONFIG_DM9000 is not set
661CONFIG_NETDEV_1000=y
662CONFIG_NETDEV_10000=y
677 663
678# 664#
679# Ethernet (1000 Mbit) 665# Wireless LAN
680#
681
682#
683# Ethernet (10000 Mbit)
684#
685
686#
687# Token Ring devices
688#
689
690#
691# Wireless LAN (non-hamradio)
692#
693# CONFIG_NET_RADIO is not set
694
695#
696# Wan interfaces
697# 666#
667# CONFIG_WLAN_PRE80211 is not set
668# CONFIG_WLAN_80211 is not set
698# CONFIG_WAN is not set 669# CONFIG_WAN is not set
699# CONFIG_PPP is not set 670# CONFIG_PPP is not set
700# CONFIG_SLIP is not set 671# CONFIG_SLIP is not set
@@ -718,6 +689,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
718# 689#
719CONFIG_INPUT=y 690CONFIG_INPUT=y
720# CONFIG_INPUT_FF_MEMLESS is not set 691# CONFIG_INPUT_FF_MEMLESS is not set
692# CONFIG_INPUT_POLLDEV is not set
721 693
722# 694#
723# Userland interfaces 695# Userland interfaces
@@ -734,8 +706,14 @@ CONFIG_INPUT_EVDEV=m
734# CONFIG_INPUT_KEYBOARD is not set 706# CONFIG_INPUT_KEYBOARD is not set
735# CONFIG_INPUT_MOUSE is not set 707# CONFIG_INPUT_MOUSE is not set
736# CONFIG_INPUT_JOYSTICK is not set 708# CONFIG_INPUT_JOYSTICK is not set
709# CONFIG_INPUT_TABLET is not set
737# CONFIG_INPUT_TOUCHSCREEN is not set 710# CONFIG_INPUT_TOUCHSCREEN is not set
738CONFIG_INPUT_MISC=y 711CONFIG_INPUT_MISC=y
712# CONFIG_INPUT_ATI_REMOTE is not set
713# CONFIG_INPUT_ATI_REMOTE2 is not set
714# CONFIG_INPUT_KEYSPAN_REMOTE is not set
715# CONFIG_INPUT_POWERMATE is not set
716# CONFIG_INPUT_YEALINK is not set
739# CONFIG_INPUT_UINPUT is not set 717# CONFIG_INPUT_UINPUT is not set
740# CONFIG_BF53X_PFBUTTONS is not set 718# CONFIG_BF53X_PFBUTTONS is not set
741CONFIG_TWI_KEYPAD=m 719CONFIG_TWI_KEYPAD=m
@@ -752,7 +730,7 @@ CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=72
752# 730#
753# CONFIG_AD9960 is not set 731# CONFIG_AD9960 is not set
754# CONFIG_SPI_ADC_BF533 is not set 732# CONFIG_SPI_ADC_BF533 is not set
755# CONFIG_BF5xx_PFLAGS is not set 733# CONFIG_BFIN_PFLAGS is not set
756# CONFIG_BF5xx_PPIFCD is not set 734# CONFIG_BF5xx_PPIFCD is not set
757# CONFIG_BF5xx_TIMERS is not set 735# CONFIG_BF5xx_TIMERS is not set
758# CONFIG_BF5xx_PPI is not set 736# CONFIG_BF5xx_PPI is not set
@@ -803,10 +781,6 @@ CONFIG_CAN_BLACKFIN=m
803# IPMI 781# IPMI
804# 782#
805# CONFIG_IPMI_HANDLER is not set 783# CONFIG_IPMI_HANDLER is not set
806
807#
808# Watchdog Cards
809#
810CONFIG_WATCHDOG=y 784CONFIG_WATCHDOG=y
811# CONFIG_WATCHDOG_NOWAYOUT is not set 785# CONFIG_WATCHDOG_NOWAYOUT is not set
812 786
@@ -818,7 +792,6 @@ CONFIG_BFIN_WDT=y
818CONFIG_HW_RANDOM=y 792CONFIG_HW_RANDOM=y
819# CONFIG_GEN_RTC is not set 793# CONFIG_GEN_RTC is not set
820CONFIG_BLACKFIN_DPMC=y 794CONFIG_BLACKFIN_DPMC=y
821# CONFIG_DTLK is not set
822# CONFIG_R3964 is not set 795# CONFIG_R3964 is not set
823# CONFIG_RAW_DRIVER is not set 796# CONFIG_RAW_DRIVER is not set
824 797
@@ -826,11 +799,8 @@ CONFIG_BLACKFIN_DPMC=y
826# TPM devices 799# TPM devices
827# 800#
828# CONFIG_TCG_TPM is not set 801# CONFIG_TCG_TPM is not set
829
830#
831# I2C support
832#
833CONFIG_I2C=m 802CONFIG_I2C=m
803CONFIG_I2C_BOARDINFO=y
834CONFIG_I2C_CHARDEV=m 804CONFIG_I2C_CHARDEV=m
835 805
836# 806#
@@ -846,10 +816,11 @@ CONFIG_I2C_CHARDEV=m
846# CONFIG_I2C_BLACKFIN_GPIO is not set 816# CONFIG_I2C_BLACKFIN_GPIO is not set
847CONFIG_I2C_BLACKFIN_TWI=m 817CONFIG_I2C_BLACKFIN_TWI=m
848CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50 818CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
819# CONFIG_I2C_GPIO is not set
849# CONFIG_I2C_OCORES is not set 820# CONFIG_I2C_OCORES is not set
850# CONFIG_I2C_PARPORT_LIGHT is not set 821# CONFIG_I2C_PARPORT_LIGHT is not set
822# CONFIG_I2C_SIMTEC is not set
851# CONFIG_I2C_STUB is not set 823# CONFIG_I2C_STUB is not set
852# CONFIG_I2C_PCA_ISA is not set
853 824
854# 825#
855# Miscellaneous I2C Chip support 826# Miscellaneous I2C Chip support
@@ -885,18 +856,16 @@ CONFIG_SPI_BFIN=y
885# SPI Protocol Masters 856# SPI Protocol Masters
886# 857#
887# CONFIG_SPI_AT25 is not set 858# CONFIG_SPI_AT25 is not set
859# CONFIG_SPI_SPIDEV is not set
888 860
889# 861#
890# Dallas's 1-wire bus 862# Dallas's 1-wire bus
891# 863#
892# CONFIG_W1 is not set 864# CONFIG_W1 is not set
893
894#
895# Hardware Monitoring support
896#
897CONFIG_HWMON=y 865CONFIG_HWMON=y
898# CONFIG_HWMON_VID is not set 866# CONFIG_HWMON_VID is not set
899# CONFIG_SENSORS_ABITUGURU is not set 867# CONFIG_SENSORS_ABITUGURU is not set
868# CONFIG_SENSORS_AD7418 is not set
900# CONFIG_SENSORS_ADM1021 is not set 869# CONFIG_SENSORS_ADM1021 is not set
901# CONFIG_SENSORS_ADM1025 is not set 870# CONFIG_SENSORS_ADM1025 is not set
902# CONFIG_SENSORS_ADM1026 is not set 871# CONFIG_SENSORS_ADM1026 is not set
@@ -924,6 +893,7 @@ CONFIG_HWMON=y
924# CONFIG_SENSORS_LM90 is not set 893# CONFIG_SENSORS_LM90 is not set
925# CONFIG_SENSORS_LM92 is not set 894# CONFIG_SENSORS_LM92 is not set
926# CONFIG_SENSORS_MAX1619 is not set 895# CONFIG_SENSORS_MAX1619 is not set
896# CONFIG_SENSORS_MAX6650 is not set
927# CONFIG_SENSORS_PC87360 is not set 897# CONFIG_SENSORS_PC87360 is not set
928# CONFIG_SENSORS_PC87427 is not set 898# CONFIG_SENSORS_PC87427 is not set
929# CONFIG_SENSORS_SMSC47M1 is not set 899# CONFIG_SENSORS_SMSC47M1 is not set
@@ -948,11 +918,8 @@ CONFIG_HWMON=y
948# Multimedia devices 918# Multimedia devices
949# 919#
950# CONFIG_VIDEO_DEV is not set 920# CONFIG_VIDEO_DEV is not set
951 921# CONFIG_DVB_CORE is not set
952# 922CONFIG_DAB=y
953# Digital Video Broadcasting Devices
954#
955# CONFIG_DVB is not set
956 923
957# 924#
958# Graphics support 925# Graphics support
@@ -960,12 +927,23 @@ CONFIG_HWMON=y
960CONFIG_BACKLIGHT_LCD_SUPPORT=y 927CONFIG_BACKLIGHT_LCD_SUPPORT=y
961CONFIG_BACKLIGHT_CLASS_DEVICE=m 928CONFIG_BACKLIGHT_CLASS_DEVICE=m
962CONFIG_LCD_CLASS_DEVICE=m 929CONFIG_LCD_CLASS_DEVICE=m
930
931#
932# Display device support
933#
934# CONFIG_DISPLAY_SUPPORT is not set
935# CONFIG_VGASTATE is not set
963CONFIG_FB=m 936CONFIG_FB=m
964CONFIG_FIRMWARE_EDID=y 937CONFIG_FIRMWARE_EDID=y
965# CONFIG_FB_DDC is not set 938# CONFIG_FB_DDC is not set
966CONFIG_FB_CFB_FILLRECT=m 939CONFIG_FB_CFB_FILLRECT=m
967CONFIG_FB_CFB_COPYAREA=m 940CONFIG_FB_CFB_COPYAREA=m
968CONFIG_FB_CFB_IMAGEBLIT=m 941CONFIG_FB_CFB_IMAGEBLIT=m
942# CONFIG_FB_SYS_FILLRECT is not set
943# CONFIG_FB_SYS_COPYAREA is not set
944# CONFIG_FB_SYS_IMAGEBLIT is not set
945# CONFIG_FB_SYS_FOPS is not set
946CONFIG_FB_DEFERRED_IO=y
969# CONFIG_FB_SVGALIB is not set 947# CONFIG_FB_SVGALIB is not set
970# CONFIG_FB_MACMODES is not set 948# CONFIG_FB_MACMODES is not set
971# CONFIG_FB_BACKLIGHT is not set 949# CONFIG_FB_BACKLIGHT is not set
@@ -991,10 +969,6 @@ CONFIG_LQ035_SLAVE_ADDR=0x58
991# CONFIG_FB_BFIN_BGR is not set 969# CONFIG_FB_BFIN_BGR is not set
992# CONFIG_FB_S1D13XXX is not set 970# CONFIG_FB_S1D13XXX is not set
993# CONFIG_FB_VIRTUAL is not set 971# CONFIG_FB_VIRTUAL is not set
994
995#
996# Logo configuration
997#
998# CONFIG_LOGO is not set 972# CONFIG_LOGO is not set
999 973
1000# 974#
@@ -1035,7 +1009,6 @@ CONFIG_SND_BLACKFIN_AD1836_TDM=y
1035# CONFIG_SND_BLACKFIN_AD1836_I2S is not set 1009# CONFIG_SND_BLACKFIN_AD1836_I2S is not set
1036CONFIG_SND_BLACKFIN_AD1836_MULSUB=y 1010CONFIG_SND_BLACKFIN_AD1836_MULSUB=y
1037# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set 1011# CONFIG_SND_BLACKFIN_AD1836_5P1 is not set
1038CONFIG_SND_BLACKFIN_AD1981B=m
1039CONFIG_SND_BLACKFIN_SPORT=0 1012CONFIG_SND_BLACKFIN_SPORT=0
1040CONFIG_SND_BLACKFIN_SPI_PFBIT=4 1013CONFIG_SND_BLACKFIN_SPI_PFBIT=4
1041CONFIG_SND_BFIN_AD73311=m 1014CONFIG_SND_BFIN_AD73311=m
@@ -1043,11 +1016,16 @@ CONFIG_SND_BFIN_SPORT=0
1043CONFIG_SND_BFIN_AD73311_SE=4 1016CONFIG_SND_BFIN_AD73311_SE=4
1044 1017
1045# 1018#
1046# SoC audio support 1019# System on Chip audio support
1047# 1020#
1048# CONFIG_SND_SOC is not set 1021# CONFIG_SND_SOC is not set
1049 1022
1050# 1023#
1024# SoC Audio for the ADI Blackfin
1025#
1026# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
1027
1028#
1051# Open Sound System 1029# Open Sound System
1052# 1030#
1053# CONFIG_SOUND_PRIME is not set 1031# CONFIG_SOUND_PRIME is not set
@@ -1067,18 +1045,17 @@ CONFIG_USB_ARCH_HAS_HCD=y
1067# CONFIG_USB is not set 1045# CONFIG_USB is not set
1068 1046
1069# 1047#
1070# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1048# Enable Host or Gadget support to see Inventra options
1071# 1049#
1072 1050
1073# 1051#
1074# USB Gadget Support 1052# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1075# 1053#
1076# CONFIG_USB_GADGET is not set
1077 1054
1078# 1055#
1079# MMC/SD Card support 1056# USB Gadget Support
1080# 1057#
1081# CONFIG_SPI_MMC is not set 1058# CONFIG_USB_GADGET is not set
1082# CONFIG_MMC is not set 1059# CONFIG_MMC is not set
1083 1060
1084# 1061#
@@ -1118,44 +1095,50 @@ CONFIG_RTC_INTF_SYSFS=y
1118CONFIG_RTC_INTF_PROC=y 1095CONFIG_RTC_INTF_PROC=y
1119CONFIG_RTC_INTF_DEV=y 1096CONFIG_RTC_INTF_DEV=y
1120# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1097# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1098# CONFIG_RTC_DRV_TEST is not set
1121 1099
1122# 1100#
1123# RTC drivers 1101# I2C RTC drivers
1124# 1102#
1125# CONFIG_RTC_DRV_X1205 is not set
1126# CONFIG_RTC_DRV_DS1307 is not set 1103# CONFIG_RTC_DRV_DS1307 is not set
1127# CONFIG_RTC_DRV_DS1553 is not set
1128# CONFIG_RTC_DRV_ISL1208 is not set
1129# CONFIG_RTC_DRV_DS1672 is not set 1104# CONFIG_RTC_DRV_DS1672 is not set
1130# CONFIG_RTC_DRV_DS1742 is not set 1105# CONFIG_RTC_DRV_MAX6900 is not set
1106# CONFIG_RTC_DRV_RS5C372 is not set
1107# CONFIG_RTC_DRV_ISL1208 is not set
1108# CONFIG_RTC_DRV_X1205 is not set
1131# CONFIG_RTC_DRV_PCF8563 is not set 1109# CONFIG_RTC_DRV_PCF8563 is not set
1110# CONFIG_RTC_DRV_PCF8583 is not set
1111
1112#
1113# SPI RTC drivers
1114#
1132# CONFIG_RTC_DRV_RS5C348 is not set 1115# CONFIG_RTC_DRV_RS5C348 is not set
1133# CONFIG_RTC_DRV_RS5C372 is not set
1134# CONFIG_RTC_DRV_M48T86 is not set
1135# CONFIG_RTC_DRV_TEST is not set
1136# CONFIG_RTC_DRV_MAX6902 is not set 1116# CONFIG_RTC_DRV_MAX6902 is not set
1137# CONFIG_RTC_DRV_V3020 is not set
1138CONFIG_RTC_DRV_BFIN=y
1139 1117
1140# 1118#
1141# DMA Engine support 1119# Platform RTC drivers
1142# 1120#
1143# CONFIG_DMA_ENGINE is not set 1121# CONFIG_RTC_DRV_DS1553 is not set
1122# CONFIG_RTC_DRV_DS1742 is not set
1123# CONFIG_RTC_DRV_M48T86 is not set
1124# CONFIG_RTC_DRV_V3020 is not set
1144 1125
1145# 1126#
1146# DMA Clients 1127# on-CPU RTC drivers
1147# 1128#
1129CONFIG_RTC_DRV_BFIN=y
1148 1130
1149# 1131#
1150# DMA Devices 1132# DMA Engine support
1151# 1133#
1134# CONFIG_DMA_ENGINE is not set
1152 1135
1153# 1136#
1154# Auxiliary Display support 1137# DMA Clients
1155# 1138#
1156 1139
1157# 1140#
1158# Virtualization 1141# DMA Devices
1159# 1142#
1160 1143
1161# 1144#
@@ -1258,6 +1241,7 @@ CONFIG_LOCKD=m
1258CONFIG_LOCKD_V4=y 1241CONFIG_LOCKD_V4=y
1259CONFIG_NFS_COMMON=y 1242CONFIG_NFS_COMMON=y
1260CONFIG_SUNRPC=m 1243CONFIG_SUNRPC=m
1244# CONFIG_SUNRPC_BIND34 is not set
1261# CONFIG_RPCSEC_GSS_KRB5 is not set 1245# CONFIG_RPCSEC_GSS_KRB5 is not set
1262# CONFIG_RPCSEC_GSS_SPKM3 is not set 1246# CONFIG_RPCSEC_GSS_SPKM3 is not set
1263CONFIG_SMB_FS=m 1247CONFIG_SMB_FS=m
@@ -1335,14 +1319,20 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1335CONFIG_ENABLE_MUST_CHECK=y 1319CONFIG_ENABLE_MUST_CHECK=y
1336# CONFIG_MAGIC_SYSRQ is not set 1320# CONFIG_MAGIC_SYSRQ is not set
1337# CONFIG_UNUSED_SYMBOLS is not set 1321# CONFIG_UNUSED_SYMBOLS is not set
1338# CONFIG_DEBUG_FS is not set 1322CONFIG_DEBUG_FS=y
1339# CONFIG_HEADERS_CHECK is not set 1323# CONFIG_HEADERS_CHECK is not set
1340# CONFIG_DEBUG_KERNEL is not set 1324# CONFIG_DEBUG_KERNEL is not set
1341CONFIG_LOG_BUF_SHIFT=14
1342# CONFIG_DEBUG_BUGVERBOSE is not set 1325# CONFIG_DEBUG_BUGVERBOSE is not set
1343# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set 1326CONFIG_DEBUG_MMRS=y
1344CONFIG_DEBUG_HUNT_FOR_ZERO=y 1327CONFIG_DEBUG_HUNT_FOR_ZERO=y
1328CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1329CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1330# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1331# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1332CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1333# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1345# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1334# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1335CONFIG_EARLY_PRINTK=y
1346CONFIG_CPLB_INFO=y 1336CONFIG_CPLB_INFO=y
1347CONFIG_ACCESS_CHECK=y 1337CONFIG_ACCESS_CHECK=y
1348 1338
@@ -1365,6 +1355,7 @@ CONFIG_SECURITY_CAPABILITIES=m
1365CONFIG_BITREVERSE=y 1355CONFIG_BITREVERSE=y
1366CONFIG_CRC_CCITT=m 1356CONFIG_CRC_CCITT=m
1367# CONFIG_CRC16 is not set 1357# CONFIG_CRC16 is not set
1358# CONFIG_CRC_ITU_T is not set
1368CONFIG_CRC32=y 1359CONFIG_CRC32=y
1369# CONFIG_LIBCRC32C is not set 1360# CONFIG_LIBCRC32C is not set
1370CONFIG_ZLIB_INFLATE=y 1361CONFIG_ZLIB_INFLATE=y
@@ -1372,3 +1363,4 @@ CONFIG_ZLIB_DEFLATE=m
1372CONFIG_PLIST=y 1363CONFIG_PLIST=y
1373CONFIG_HAS_IOMEM=y 1364CONFIG_HAS_IOMEM=y
1374CONFIG_HAS_IOPORT=y 1365CONFIG_HAS_IOPORT=y
1366CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index ac8390fafa9c..e80f3d59c283 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -40,7 +41,9 @@ CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 47CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 48# CONFIG_RELAY is not set
46CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
@@ -51,7 +54,6 @@ CONFIG_EMBEDDED=y
51CONFIG_UID16=y 54CONFIG_UID16=y
52CONFIG_SYSCTL_SYSCALL=y 55CONFIG_SYSCTL_SYSCALL=y
53CONFIG_KALLSYMS=y 56CONFIG_KALLSYMS=y
54# CONFIG_KALLSYMS_ALL is not set
55# CONFIG_KALLSYMS_EXTRA_PASS is not set 57# CONFIG_KALLSYMS_EXTRA_PASS is not set
56CONFIG_HOTPLUG=y 58CONFIG_HOTPLUG=y
57CONFIG_PRINTK=y 59CONFIG_PRINTK=y
@@ -59,14 +61,20 @@ CONFIG_BUG=y
59CONFIG_ELF_CORE=y 61CONFIG_ELF_CORE=y
60CONFIG_BASE_FULL=y 62CONFIG_BASE_FULL=y
61CONFIG_FUTEX=y 63CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y
69CONFIG_VM_EVENT_COUNTERS=y
62CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 70CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
63# CONFIG_NP2 is not set 71# CONFIG_NP2 is not set
64CONFIG_SLAB=y 72CONFIG_SLAB=y
65CONFIG_VM_EVENT_COUNTERS=y 73# CONFIG_SLUB is not set
74# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y 75CONFIG_RT_MUTEXES=y
67CONFIG_TINY_SHMEM=y 76CONFIG_TINY_SHMEM=y
68CONFIG_BASE_SMALL=0 77CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70 78
71# 79#
72# Loadable module support 80# Loadable module support
@@ -165,6 +173,7 @@ CONFIG_IRQ_UART1_TX=10
165# 173#
166# BF548 Specific Configuration 174# BF548 Specific Configuration
167# 175#
176# CONFIG_DEB_DMA_URGENT is not set
168 177
169# 178#
170# Interrupt Priority Assignment 179# Interrupt Priority Assignment
@@ -242,24 +251,35 @@ CONFIG_IRQ_PINT2=11
242CONFIG_IRQ_PINT3=11 251CONFIG_IRQ_PINT3=11
243 252
244# 253#
245# Board customizations 254# Pin Interrupt to Port Assignment
246# 255#
247# CONFIG_CMDLINE_BOOL is not set
248 256
249# 257#
250# Board Setup 258# Assignment
251# 259#
252CONFIG_CLKIN_HZ=25000000 260CONFIG_PINTx_REASSIGN=y
253CONFIG_MEM_SIZE=64 261CONFIG_PINT0_ASSIGN=0x00000101
254CONFIG_MEM_ADD_WIDTH=10 262CONFIG_PINT1_ASSIGN=0x01010000
255CONFIG_BOOT_LOAD=0x1000 263CONFIG_PINT2_ASSIGN=0x07000101
264CONFIG_PINT3_ASSIGN=0x02020303
256 265
257# 266#
258# Blackfin Kernel Optimizations 267# Board customizations
259# 268#
269# CONFIG_CMDLINE_BOOL is not set
260 270
261# 271#
262# Timer Tick 272# Clock/PLL Setup
273#
274CONFIG_CLKIN_HZ=25000000
275# CONFIG_BFIN_KERNEL_CLOCK is not set
276CONFIG_MAX_VCO_HZ=533000000
277CONFIG_MIN_VCO_HZ=50000000
278CONFIG_MAX_SCLK_HZ=133000000
279CONFIG_MIN_SCLK_HZ=27000000
280
281#
282# Kernel Timer/Scheduler
263# 283#
264# CONFIG_HZ_100 is not set 284# CONFIG_HZ_100 is not set
265CONFIG_HZ_250=y 285CONFIG_HZ_250=y
@@ -268,6 +288,20 @@ CONFIG_HZ_250=y
268CONFIG_HZ=250 288CONFIG_HZ=250
269 289
270# 290#
291# Memory Setup
292#
293CONFIG_MEM_SIZE=64
294CONFIG_MEM_ADD_WIDTH=10
295CONFIG_BOOT_LOAD=0x1000
296CONFIG_BFIN_SCRATCH_REG_RETN=y
297# CONFIG_BFIN_SCRATCH_REG_RETE is not set
298# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
299
300#
301# Blackfin Kernel Optimizations
302#
303
304#
271# Memory Optimizations 305# Memory Optimizations
272# 306#
273CONFIG_I_ENTRY_L1=y 307CONFIG_I_ENTRY_L1=y
@@ -275,12 +309,12 @@ CONFIG_EXCPT_IRQ_SYSC_L1=y
275CONFIG_DO_IRQ_L1=y 309CONFIG_DO_IRQ_L1=y
276CONFIG_CORE_TIMER_IRQ_L1=y 310CONFIG_CORE_TIMER_IRQ_L1=y
277CONFIG_IDLE_L1=y 311CONFIG_IDLE_L1=y
278CONFIG_SCHEDULE_L1=y 312# CONFIG_SCHEDULE_L1 is not set
279CONFIG_ARITHMETIC_OPS_L1=y 313CONFIG_ARITHMETIC_OPS_L1=y
280CONFIG_ACCESS_OK_L1=y 314CONFIG_ACCESS_OK_L1=y
281CONFIG_MEMSET_L1=y 315# CONFIG_MEMSET_L1 is not set
282CONFIG_MEMCPY_L1=y 316# CONFIG_MEMCPY_L1 is not set
283CONFIG_SYS_BFIN_SPINLOCK_L1=y 317# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
284# CONFIG_IP_CHECKSUM_L1 is not set 318# CONFIG_IP_CHECKSUM_L1 is not set
285CONFIG_CACHELINE_ALIGNED_L1=y 319CONFIG_CACHELINE_ALIGNED_L1=y
286# CONFIG_SYSCALL_TAB_L1 is not set 320# CONFIG_SYSCALL_TAB_L1 is not set
@@ -306,20 +340,15 @@ CONFIG_DMA_UNCACHED_1M=y
306# 340#
307# Cache Support 341# Cache Support
308# 342#
309CONFIG_BLKFIN_CACHE=y 343CONFIG_BFIN_ICACHE=y
310CONFIG_BLKFIN_DCACHE=y 344CONFIG_BFIN_DCACHE=y
311# CONFIG_BLKFIN_DCACHE_BANKA is not set 345# CONFIG_BFIN_DCACHE_BANKA is not set
312# CONFIG_BLKFIN_CACHE_LOCK is not set 346# CONFIG_BFIN_ICACHE_LOCK is not set
313# CONFIG_BLKFIN_WB is not set 347# CONFIG_BFIN_WB is not set
314CONFIG_BLKFIN_WT=y 348CONFIG_BFIN_WT=y
315CONFIG_L1_MAX_PIECE=16 349CONFIG_L1_MAX_PIECE=16
316 350
317# 351#
318# Clock Settings
319#
320# CONFIG_BFIN_KERNEL_CLOCK is not set
321
322#
323# Asynchonous Memory Configuration 352# Asynchonous Memory Configuration
324# 353#
325 354
@@ -327,7 +356,6 @@ CONFIG_L1_MAX_PIECE=16
327# EBIU_AMBCTL Global Control 356# EBIU_AMBCTL Global Control
328# 357#
329CONFIG_C_AMCKEN=y 358CONFIG_C_AMCKEN=y
330CONFIG_C_CDPRIO=y
331# CONFIG_C_AMBEN is not set 359# CONFIG_C_AMBEN is not set
332# CONFIG_C_AMBEN_B0 is not set 360# CONFIG_C_AMBEN_B0 is not set
333# CONFIG_C_AMBEN_B0_B1 is not set 361# CONFIG_C_AMBEN_B0_B1 is not set
@@ -338,7 +366,7 @@ CONFIG_C_AMBEN_ALL=y
338# EBIU_AMBCTL Control 366# EBIU_AMBCTL Control
339# 367#
340CONFIG_BANK_0=0x7BB0 368CONFIG_BANK_0=0x7BB0
341CONFIG_BANK_1=0x7BB0 369CONFIG_BANK_1=0x5554
342CONFIG_BANK_2=0x7BB0 370CONFIG_BANK_2=0x7BB0
343CONFIG_BANK_3=0x99B3 371CONFIG_BANK_3=0x99B3
344 372
@@ -346,6 +374,7 @@ CONFIG_BANK_3=0x99B3
346# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 374# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
347# 375#
348# CONFIG_PCI is not set 376# CONFIG_PCI is not set
377# CONFIG_ARCH_SUPPORTS_MSI is not set
349 378
350# 379#
351# PCCARD (PCMCIA/CardBus) support 380# PCCARD (PCMCIA/CardBus) support
@@ -353,10 +382,6 @@ CONFIG_BANK_3=0x99B3
353# CONFIG_PCCARD is not set 382# CONFIG_PCCARD is not set
354 383
355# 384#
356# PCI Hotplug Support
357#
358
359#
360# Executable file formats 385# Executable file formats
361# 386#
362CONFIG_BINFMT_ELF_FDPIC=y 387CONFIG_BINFMT_ELF_FDPIC=y
@@ -383,7 +408,6 @@ CONFIG_NET=y
383# 408#
384# Networking options 409# Networking options
385# 410#
386# CONFIG_NETDEBUG is not set
387CONFIG_PACKET=y 411CONFIG_PACKET=y
388# CONFIG_PACKET_MMAP is not set 412# CONFIG_PACKET_MMAP is not set
389CONFIG_UNIX=y 413CONFIG_UNIX=y
@@ -424,20 +448,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
424# CONFIG_NETLABEL is not set 448# CONFIG_NETLABEL is not set
425# CONFIG_NETWORK_SECMARK is not set 449# CONFIG_NETWORK_SECMARK is not set
426# CONFIG_NETFILTER is not set 450# CONFIG_NETFILTER is not set
427
428#
429# DCCP Configuration (EXPERIMENTAL)
430#
431# CONFIG_IP_DCCP is not set 451# CONFIG_IP_DCCP is not set
432
433#
434# SCTP Configuration (EXPERIMENTAL)
435#
436# CONFIG_IP_SCTP is not set 452# CONFIG_IP_SCTP is not set
437
438#
439# TIPC Configuration (EXPERIMENTAL)
440#
441# CONFIG_TIPC is not set 453# CONFIG_TIPC is not set
442# CONFIG_ATM is not set 454# CONFIG_ATM is not set
443# CONFIG_BRIDGE is not set 455# CONFIG_BRIDGE is not set
@@ -463,7 +475,16 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
463# CONFIG_HAMRADIO is not set 475# CONFIG_HAMRADIO is not set
464# CONFIG_IRDA is not set 476# CONFIG_IRDA is not set
465# CONFIG_BT is not set 477# CONFIG_BT is not set
478# CONFIG_AF_RXRPC is not set
479
480#
481# Wireless
482#
483# CONFIG_CFG80211 is not set
484# CONFIG_WIRELESS_EXT is not set
485# CONFIG_MAC80211 is not set
466# CONFIG_IEEE80211 is not set 486# CONFIG_IEEE80211 is not set
487# CONFIG_RFKILL is not set
467 488
468# 489#
469# Device Drivers 490# Device Drivers
@@ -475,29 +496,23 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
475CONFIG_STANDALONE=y 496CONFIG_STANDALONE=y
476CONFIG_PREVENT_FIRMWARE_BUILD=y 497CONFIG_PREVENT_FIRMWARE_BUILD=y
477# CONFIG_FW_LOADER is not set 498# CONFIG_FW_LOADER is not set
478# CONFIG_DEBUG_DRIVER is not set
479# CONFIG_DEBUG_DEVRES is not set
480# CONFIG_SYS_HYPERVISOR is not set 499# CONFIG_SYS_HYPERVISOR is not set
481 500
482# 501#
483# Connector - unified userspace <-> kernelspace linker 502# Connector - unified userspace <-> kernelspace linker
484# 503#
485# CONFIG_CONNECTOR is not set 504# CONFIG_CONNECTOR is not set
486
487#
488# Memory Technology Devices (MTD)
489#
490CONFIG_MTD=y 505CONFIG_MTD=y
491# CONFIG_MTD_DEBUG is not set 506# CONFIG_MTD_DEBUG is not set
492# CONFIG_MTD_CONCAT is not set 507# CONFIG_MTD_CONCAT is not set
493CONFIG_MTD_PARTITIONS=y 508CONFIG_MTD_PARTITIONS=y
494# CONFIG_MTD_REDBOOT_PARTS is not set 509# CONFIG_MTD_REDBOOT_PARTS is not set
495# CONFIG_MTD_CMDLINE_PARTS is not set 510CONFIG_MTD_CMDLINE_PARTS=y
496 511
497# 512#
498# User Modules And Translation Layers 513# User Modules And Translation Layers
499# 514#
500# CONFIG_MTD_CHAR is not set 515CONFIG_MTD_CHAR=y
501CONFIG_MTD_BLKDEVS=y 516CONFIG_MTD_BLKDEVS=y
502CONFIG_MTD_BLOCK=y 517CONFIG_MTD_BLOCK=y
503# CONFIG_FTL is not set 518# CONFIG_FTL is not set
@@ -509,8 +524,10 @@ CONFIG_MTD_BLOCK=y
509# 524#
510# RAM/ROM/Flash chip drivers 525# RAM/ROM/Flash chip drivers
511# 526#
512# CONFIG_MTD_CFI is not set 527CONFIG_MTD_CFI=y
513# CONFIG_MTD_JEDECPROBE is not set 528# CONFIG_MTD_JEDECPROBE is not set
529CONFIG_MTD_GEN_PROBE=y
530# CONFIG_MTD_CFI_ADV_OPTIONS is not set
514CONFIG_MTD_MAP_BANK_WIDTH_1=y 531CONFIG_MTD_MAP_BANK_WIDTH_1=y
515CONFIG_MTD_MAP_BANK_WIDTH_2=y 532CONFIG_MTD_MAP_BANK_WIDTH_2=y
516CONFIG_MTD_MAP_BANK_WIDTH_4=y 533CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -521,22 +538,32 @@ CONFIG_MTD_CFI_I1=y
521CONFIG_MTD_CFI_I2=y 538CONFIG_MTD_CFI_I2=y
522# CONFIG_MTD_CFI_I4 is not set 539# CONFIG_MTD_CFI_I4 is not set
523# CONFIG_MTD_CFI_I8 is not set 540# CONFIG_MTD_CFI_I8 is not set
541CONFIG_MTD_CFI_INTELEXT=y
542# CONFIG_MTD_CFI_AMDSTD is not set
543# CONFIG_MTD_CFI_STAA is not set
544# CONFIG_MTD_MW320D is not set
545CONFIG_MTD_CFI_UTIL=y
524CONFIG_MTD_RAM=y 546CONFIG_MTD_RAM=y
525# CONFIG_MTD_ROM is not set 547# CONFIG_MTD_ROM is not set
526# CONFIG_MTD_ABSENT is not set 548# CONFIG_MTD_ABSENT is not set
527# CONFIG_MTD_OBSOLETE_CHIPS is not set
528 549
529# 550#
530# Mapping drivers for chip access 551# Mapping drivers for chip access
531# 552#
532CONFIG_MTD_COMPLEX_MAPPINGS=y 553CONFIG_MTD_COMPLEX_MAPPINGS=y
554CONFIG_MTD_PHYSMAP=y
555CONFIG_MTD_PHYSMAP_START=0x20000000
556CONFIG_MTD_PHYSMAP_LEN=0x400000
557CONFIG_MTD_PHYSMAP_BANKWIDTH=2
533# CONFIG_MTD_BF5xx is not set 558# CONFIG_MTD_BF5xx is not set
534CONFIG_MTD_UCLINUX=y 559# CONFIG_MTD_UCLINUX is not set
535# CONFIG_MTD_PLATRAM is not set 560# CONFIG_MTD_PLATRAM is not set
536 561
537# 562#
538# Self-contained MTD device drivers 563# Self-contained MTD device drivers
539# 564#
565# CONFIG_MTD_DATAFLASH is not set
566# CONFIG_MTD_M25P80 is not set
540# CONFIG_MTD_SLRAM is not set 567# CONFIG_MTD_SLRAM is not set
541# CONFIG_MTD_PHRAM is not set 568# CONFIG_MTD_PHRAM is not set
542# CONFIG_MTD_MTDRAM is not set 569# CONFIG_MTD_MTDRAM is not set
@@ -548,16 +575,23 @@ CONFIG_MTD_UCLINUX=y
548# CONFIG_MTD_DOC2000 is not set 575# CONFIG_MTD_DOC2000 is not set
549# CONFIG_MTD_DOC2001 is not set 576# CONFIG_MTD_DOC2001 is not set
550# CONFIG_MTD_DOC2001PLUS is not set 577# CONFIG_MTD_DOC2001PLUS is not set
578CONFIG_MTD_NAND=y
579# CONFIG_MTD_NAND_VERIFY_WRITE is not set
580# CONFIG_MTD_NAND_ECC_SMC is not set
581# CONFIG_MTD_NAND_MUSEUM_IDS is not set
582# CONFIG_MTD_NAND_BFIN is not set
583CONFIG_MTD_NAND_IDS=y
584CONFIG_MTD_NAND_BF5XX=y
585CONFIG_MTD_NAND_BF5XX_HWECC=y
586# CONFIG_MTD_NAND_DISKONCHIP is not set
587# CONFIG_MTD_NAND_NANDSIM is not set
588# CONFIG_MTD_NAND_PLATFORM is not set
589# CONFIG_MTD_ONENAND is not set
551 590
552# 591#
553# NAND Flash Device Drivers 592# UBI - Unsorted block images
554#
555# CONFIG_MTD_NAND is not set
556
557#
558# OneNAND Flash Device Drivers
559# 593#
560# CONFIG_MTD_ONENAND is not set 594# CONFIG_MTD_UBI is not set
561 595
562# 596#
563# Parallel port support 597# Parallel port support
@@ -585,41 +619,61 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
585# 619#
586# Misc devices 620# Misc devices
587# 621#
588
589#
590# ATA/ATAPI/MFM/RLL support
591#
592# CONFIG_IDE is not set 622# CONFIG_IDE is not set
593 623
594# 624#
595# SCSI device support 625# SCSI device support
596# 626#
597# CONFIG_RAID_ATTRS is not set 627# CONFIG_RAID_ATTRS is not set
598# CONFIG_SCSI is not set 628CONFIG_SCSI=y
629# CONFIG_SCSI_TGT is not set
599# CONFIG_SCSI_NETLINK is not set 630# CONFIG_SCSI_NETLINK is not set
631CONFIG_SCSI_PROC_FS=y
600 632
601# 633#
602# Serial ATA (prod) and Parallel ATA (experimental) drivers 634# SCSI support type (disk, tape, CD-ROM)
603# 635#
604# CONFIG_ATA is not set 636CONFIG_BLK_DEV_SD=y
637# CONFIG_CHR_DEV_ST is not set
638# CONFIG_CHR_DEV_OSST is not set
639CONFIG_BLK_DEV_SR=y
640# CONFIG_BLK_DEV_SR_VENDOR is not set
641# CONFIG_CHR_DEV_SG is not set
642# CONFIG_CHR_DEV_SCH is not set
605 643
606# 644#
607# Multi-device support (RAID and LVM) 645# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
608# 646#
609# CONFIG_MD is not set 647# CONFIG_SCSI_MULTI_LUN is not set
648# CONFIG_SCSI_CONSTANTS is not set
649# CONFIG_SCSI_LOGGING is not set
650# CONFIG_SCSI_SCAN_ASYNC is not set
651CONFIG_SCSI_WAIT_SCAN=m
610 652
611# 653#
612# Fusion MPT device support 654# SCSI Transports
613# 655#
614# CONFIG_FUSION is not set 656# CONFIG_SCSI_SPI_ATTRS is not set
657# CONFIG_SCSI_FC_ATTRS is not set
658# CONFIG_SCSI_ISCSI_ATTRS is not set
659# CONFIG_SCSI_SAS_ATTRS is not set
660# CONFIG_SCSI_SAS_LIBSAS is not set
615 661
616# 662#
617# IEEE 1394 (FireWire) support 663# SCSI low-level drivers
618# 664#
665# CONFIG_ISCSI_TCP is not set
666# CONFIG_SCSI_DEBUG is not set
667CONFIG_ATA=y
668# CONFIG_ATA_NONSTANDARD is not set
669# CONFIG_PATA_PLATFORM is not set
670CONFIG_PATA_BF54X=y
671CONFIG_PATA_BF54X_DMA=y
619 672
620# 673#
621# I2O device support 674# Multi-device support (RAID and LVM)
622# 675#
676# CONFIG_MD is not set
623 677
624# 678#
625# Network device support 679# Network device support
@@ -629,10 +683,6 @@ CONFIG_NETDEVICES=y
629# CONFIG_BONDING is not set 683# CONFIG_BONDING is not set
630# CONFIG_EQUALIZER is not set 684# CONFIG_EQUALIZER is not set
631# CONFIG_TUN is not set 685# CONFIG_TUN is not set
632
633#
634# PHY device support
635#
636# CONFIG_PHYLIB is not set 686# CONFIG_PHYLIB is not set
637 687
638# 688#
@@ -641,28 +691,16 @@ CONFIG_NETDEVICES=y
641CONFIG_NET_ETHERNET=y 691CONFIG_NET_ETHERNET=y
642CONFIG_MII=y 692CONFIG_MII=y
643# CONFIG_SMC91X is not set 693# CONFIG_SMC91X is not set
644# CONFIG_SMSC911X is not set 694CONFIG_SMSC911X=y
645 695# CONFIG_DM9000 is not set
646# 696CONFIG_NETDEV_1000=y
647# Ethernet (1000 Mbit) 697CONFIG_NETDEV_10000=y
648#
649
650#
651# Ethernet (10000 Mbit)
652#
653 698
654# 699#
655# Token Ring devices 700# Wireless LAN
656#
657
658#
659# Wireless LAN (non-hamradio)
660#
661# CONFIG_NET_RADIO is not set
662
663#
664# Wan interfaces
665# 701#
702# CONFIG_WLAN_PRE80211 is not set
703# CONFIG_WLAN_80211 is not set
666# CONFIG_WAN is not set 704# CONFIG_WAN is not set
667# CONFIG_PPP is not set 705# CONFIG_PPP is not set
668# CONFIG_SLIP is not set 706# CONFIG_SLIP is not set
@@ -686,6 +724,7 @@ CONFIG_MII=y
686# 724#
687CONFIG_INPUT=y 725CONFIG_INPUT=y
688# CONFIG_INPUT_FF_MEMLESS is not set 726# CONFIG_INPUT_FF_MEMLESS is not set
727# CONFIG_INPUT_POLLDEV is not set
689 728
690# 729#
691# Userland interfaces 730# Userland interfaces
@@ -702,10 +741,17 @@ CONFIG_INPUT=y
702# CONFIG_INPUT_KEYBOARD is not set 741# CONFIG_INPUT_KEYBOARD is not set
703# CONFIG_INPUT_MOUSE is not set 742# CONFIG_INPUT_MOUSE is not set
704# CONFIG_INPUT_JOYSTICK is not set 743# CONFIG_INPUT_JOYSTICK is not set
744# CONFIG_INPUT_TABLET is not set
705# CONFIG_INPUT_TOUCHSCREEN is not set 745# CONFIG_INPUT_TOUCHSCREEN is not set
706CONFIG_INPUT_MISC=y 746CONFIG_INPUT_MISC=y
747# CONFIG_INPUT_ATI_REMOTE is not set
748# CONFIG_INPUT_ATI_REMOTE2 is not set
749# CONFIG_INPUT_KEYSPAN_REMOTE is not set
750# CONFIG_INPUT_POWERMATE is not set
751# CONFIG_INPUT_YEALINK is not set
707# CONFIG_INPUT_UINPUT is not set 752# CONFIG_INPUT_UINPUT is not set
708# CONFIG_BF53X_PFBUTTONS is not set 753# CONFIG_BF53X_PFBUTTONS is not set
754# CONFIG_TWI_KEYPAD is not set
709 755
710# 756#
711# Hardware I/O ports 757# Hardware I/O ports
@@ -718,12 +764,15 @@ CONFIG_INPUT_MISC=y
718# 764#
719# CONFIG_AD9960 is not set 765# CONFIG_AD9960 is not set
720# CONFIG_SPI_ADC_BF533 is not set 766# CONFIG_SPI_ADC_BF533 is not set
721# CONFIG_BF5xx_PFLAGS is not set 767# CONFIG_BFIN_PFLAGS is not set
722# CONFIG_BF5xx_PPIFCD is not set 768# CONFIG_BF5xx_PPIFCD is not set
723# CONFIG_BF5xx_TIMERS is not set 769# CONFIG_BF5xx_TIMERS is not set
724# CONFIG_BF5xx_PPI is not set 770# CONFIG_BF5xx_PPI is not set
725# CONFIG_BFIN_SPORT is not set 771# CONFIG_BFIN_SPORT is not set
726# CONFIG_BFIN_TIMER_LATENCY is not set 772# CONFIG_BFIN_TIMER_LATENCY is not set
773# CONFIG_TWI_LCD is not set
774# CONFIG_AD5304 is not set
775# CONFIG_BF5xx_TEA5764 is not set
727# CONFIG_BF5xx_FBDMA is not set 776# CONFIG_BF5xx_FBDMA is not set
728# CONFIG_VT is not set 777# CONFIG_VT is not set
729# CONFIG_SERIAL_NONSTANDARD is not set 778# CONFIG_SERIAL_NONSTANDARD is not set
@@ -760,14 +809,9 @@ CONFIG_UNIX98_PTYS=y
760# IPMI 809# IPMI
761# 810#
762# CONFIG_IPMI_HANDLER is not set 811# CONFIG_IPMI_HANDLER is not set
763
764#
765# Watchdog Cards
766#
767# CONFIG_WATCHDOG is not set 812# CONFIG_WATCHDOG is not set
768CONFIG_HW_RANDOM=y 813CONFIG_HW_RANDOM=y
769# CONFIG_GEN_RTC is not set 814# CONFIG_GEN_RTC is not set
770# CONFIG_DTLK is not set
771# CONFIG_R3964 is not set 815# CONFIG_R3964 is not set
772# CONFIG_RAW_DRIVER is not set 816# CONFIG_RAW_DRIVER is not set
773 817
@@ -775,32 +819,114 @@ CONFIG_HW_RANDOM=y
775# TPM devices 819# TPM devices
776# 820#
777# CONFIG_TCG_TPM is not set 821# CONFIG_TCG_TPM is not set
822CONFIG_I2C=y
823CONFIG_I2C_BOARDINFO=y
824CONFIG_I2C_CHARDEV=y
825
826#
827# I2C Algorithms
828#
829# CONFIG_I2C_ALGOBIT is not set
830# CONFIG_I2C_ALGOPCF is not set
831# CONFIG_I2C_ALGOPCA is not set
778 832
779# 833#
780# I2C support 834# I2C Hardware Bus support
781# 835#
782# CONFIG_I2C is not set 836# CONFIG_I2C_BLACKFIN_GPIO is not set
837CONFIG_I2C_BLACKFIN_TWI=y
838CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
839# CONFIG_I2C_GPIO is not set
840# CONFIG_I2C_OCORES is not set
841# CONFIG_I2C_PARPORT_LIGHT is not set
842# CONFIG_I2C_SIMTEC is not set
843# CONFIG_I2C_STUB is not set
844
845#
846# Miscellaneous I2C Chip support
847#
848# CONFIG_SENSORS_DS1337 is not set
849# CONFIG_SENSORS_DS1374 is not set
850# CONFIG_SENSORS_AD5252 is not set
851# CONFIG_SENSORS_EEPROM is not set
852# CONFIG_SENSORS_PCF8574 is not set
853# CONFIG_SENSORS_PCF8575 is not set
854# CONFIG_SENSORS_PCA9543 is not set
855# CONFIG_SENSORS_PCA9539 is not set
856# CONFIG_SENSORS_PCF8591 is not set
857# CONFIG_SENSORS_MAX6875 is not set
858# CONFIG_I2C_DEBUG_CORE is not set
859# CONFIG_I2C_DEBUG_ALGO is not set
860# CONFIG_I2C_DEBUG_BUS is not set
861# CONFIG_I2C_DEBUG_CHIP is not set
783 862
784# 863#
785# SPI support 864# SPI support
786# 865#
787# CONFIG_SPI is not set 866CONFIG_SPI=y
788# CONFIG_SPI_MASTER is not set 867CONFIG_SPI_MASTER=y
789 868
790# 869#
791# Dallas's 1-wire bus 870# SPI Master Controller Drivers
792# 871#
793# CONFIG_W1 is not set 872CONFIG_SPI_BFIN=y
873# CONFIG_SPI_BITBANG is not set
874
875#
876# SPI Protocol Masters
877#
878# CONFIG_SPI_AT25 is not set
879# CONFIG_SPI_SPIDEV is not set
794 880
795# 881#
796# Hardware Monitoring support 882# Dallas's 1-wire bus
797# 883#
884# CONFIG_W1 is not set
798CONFIG_HWMON=y 885CONFIG_HWMON=y
799# CONFIG_HWMON_VID is not set 886# CONFIG_HWMON_VID is not set
800# CONFIG_SENSORS_ABITUGURU is not set 887# CONFIG_SENSORS_ABITUGURU is not set
888# CONFIG_SENSORS_AD7418 is not set
889# CONFIG_SENSORS_ADM1021 is not set
890# CONFIG_SENSORS_ADM1025 is not set
891# CONFIG_SENSORS_ADM1026 is not set
892# CONFIG_SENSORS_ADM1029 is not set
893# CONFIG_SENSORS_ADM1031 is not set
894# CONFIG_SENSORS_ADM9240 is not set
895# CONFIG_SENSORS_ASB100 is not set
896# CONFIG_SENSORS_ATXP1 is not set
897# CONFIG_SENSORS_DS1621 is not set
801# CONFIG_SENSORS_F71805F is not set 898# CONFIG_SENSORS_F71805F is not set
899# CONFIG_SENSORS_FSCHER is not set
900# CONFIG_SENSORS_FSCPOS is not set
901# CONFIG_SENSORS_GL518SM is not set
902# CONFIG_SENSORS_GL520SM is not set
903# CONFIG_SENSORS_IT87 is not set
904# CONFIG_SENSORS_LM63 is not set
905# CONFIG_SENSORS_LM70 is not set
906# CONFIG_SENSORS_LM75 is not set
907# CONFIG_SENSORS_LM77 is not set
908# CONFIG_SENSORS_LM78 is not set
909# CONFIG_SENSORS_LM80 is not set
910# CONFIG_SENSORS_LM83 is not set
911# CONFIG_SENSORS_LM85 is not set
912# CONFIG_SENSORS_LM87 is not set
913# CONFIG_SENSORS_LM90 is not set
914# CONFIG_SENSORS_LM92 is not set
915# CONFIG_SENSORS_MAX1619 is not set
916# CONFIG_SENSORS_MAX6650 is not set
917# CONFIG_SENSORS_PC87360 is not set
802# CONFIG_SENSORS_PC87427 is not set 918# CONFIG_SENSORS_PC87427 is not set
919# CONFIG_SENSORS_SMSC47M1 is not set
920# CONFIG_SENSORS_SMSC47M192 is not set
921# CONFIG_SENSORS_SMSC47B397 is not set
803# CONFIG_SENSORS_VT1211 is not set 922# CONFIG_SENSORS_VT1211 is not set
923# CONFIG_SENSORS_W83781D is not set
924# CONFIG_SENSORS_W83791D is not set
925# CONFIG_SENSORS_W83792D is not set
926# CONFIG_SENSORS_W83793 is not set
927# CONFIG_SENSORS_W83L785TS is not set
928# CONFIG_SENSORS_W83627HF is not set
929# CONFIG_SENSORS_W83627EHF is not set
804# CONFIG_HWMON_DEBUG_CHIP is not set 930# CONFIG_HWMON_DEBUG_CHIP is not set
805 931
806# 932#
@@ -812,16 +938,19 @@ CONFIG_HWMON=y
812# Multimedia devices 938# Multimedia devices
813# 939#
814# CONFIG_VIDEO_DEV is not set 940# CONFIG_VIDEO_DEV is not set
941# CONFIG_DVB_CORE is not set
942CONFIG_DAB=y
815 943
816# 944#
817# Digital Video Broadcasting Devices 945# Graphics support
818# 946#
819# CONFIG_DVB is not set 947# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
820 948
821# 949#
822# Graphics support 950# Display device support
823# 951#
824# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 952# CONFIG_DISPLAY_SUPPORT is not set
953# CONFIG_VGASTATE is not set
825# CONFIG_FB is not set 954# CONFIG_FB is not set
826 955
827# 956#
@@ -844,6 +973,10 @@ CONFIG_USB_ARCH_HAS_HCD=y
844# CONFIG_USB is not set 973# CONFIG_USB is not set
845 974
846# 975#
976# Enable Host or Gadget support to see Inventra options
977#
978
979#
847# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 980# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
848# 981#
849 982
@@ -851,11 +984,20 @@ CONFIG_USB_ARCH_HAS_HCD=y
851# USB Gadget Support 984# USB Gadget Support
852# 985#
853# CONFIG_USB_GADGET is not set 986# CONFIG_USB_GADGET is not set
987CONFIG_MMC=m
988# CONFIG_MMC_DEBUG is not set
989# CONFIG_MMC_UNSAFE_RESUME is not set
990
991#
992# MMC/SD Card Drivers
993#
994CONFIG_MMC_BLOCK=m
854 995
855# 996#
856# MMC/SD Card support 997# MMC/SD Host Controller Drivers
857# 998#
858# CONFIG_MMC is not set 999CONFIG_SDH_BFIN=m
1000# CONFIG_SPI_MMC is not set
859 1001
860# 1002#
861# LED devices 1003# LED devices
@@ -894,15 +1036,37 @@ CONFIG_RTC_INTF_SYSFS=y
894CONFIG_RTC_INTF_PROC=y 1036CONFIG_RTC_INTF_PROC=y
895CONFIG_RTC_INTF_DEV=y 1037CONFIG_RTC_INTF_DEV=y
896# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1038# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1039# CONFIG_RTC_DRV_TEST is not set
897 1040
898# 1041#
899# RTC drivers 1042# I2C RTC drivers
1043#
1044# CONFIG_RTC_DRV_DS1307 is not set
1045# CONFIG_RTC_DRV_DS1672 is not set
1046# CONFIG_RTC_DRV_MAX6900 is not set
1047# CONFIG_RTC_DRV_RS5C372 is not set
1048# CONFIG_RTC_DRV_ISL1208 is not set
1049# CONFIG_RTC_DRV_X1205 is not set
1050# CONFIG_RTC_DRV_PCF8563 is not set
1051# CONFIG_RTC_DRV_PCF8583 is not set
1052
1053#
1054# SPI RTC drivers
1055#
1056# CONFIG_RTC_DRV_RS5C348 is not set
1057# CONFIG_RTC_DRV_MAX6902 is not set
1058
1059#
1060# Platform RTC drivers
900# 1061#
901# CONFIG_RTC_DRV_DS1553 is not set 1062# CONFIG_RTC_DRV_DS1553 is not set
902# CONFIG_RTC_DRV_DS1742 is not set 1063# CONFIG_RTC_DRV_DS1742 is not set
903# CONFIG_RTC_DRV_M48T86 is not set 1064# CONFIG_RTC_DRV_M48T86 is not set
904# CONFIG_RTC_DRV_TEST is not set
905# CONFIG_RTC_DRV_V3020 is not set 1065# CONFIG_RTC_DRV_V3020 is not set
1066
1067#
1068# on-CPU RTC drivers
1069#
906CONFIG_RTC_DRV_BFIN=y 1070CONFIG_RTC_DRV_BFIN=y
907 1071
908# 1072#
@@ -919,14 +1083,6 @@ CONFIG_RTC_DRV_BFIN=y
919# 1083#
920 1084
921# 1085#
922# Auxiliary Display support
923#
924
925#
926# Virtualization
927#
928
929#
930# PBX support 1086# PBX support
931# 1087#
932# CONFIG_PBX is not set 1088# CONFIG_PBX is not set
@@ -991,8 +1147,25 @@ CONFIG_RAMFS=y
991# CONFIG_BEFS_FS is not set 1147# CONFIG_BEFS_FS is not set
992# CONFIG_BFS_FS is not set 1148# CONFIG_BFS_FS is not set
993# CONFIG_EFS_FS is not set 1149# CONFIG_EFS_FS is not set
994# CONFIG_YAFFS_FS is not set 1150CONFIG_YAFFS_FS=m
995# CONFIG_JFFS2_FS is not set 1151CONFIG_YAFFS_YAFFS1=y
1152# CONFIG_YAFFS_DOES_ECC is not set
1153CONFIG_YAFFS_YAFFS2=y
1154CONFIG_YAFFS_AUTO_YAFFS2=y
1155# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1156CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
1157# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1158# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1159CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1160CONFIG_JFFS2_FS=m
1161CONFIG_JFFS2_FS_DEBUG=0
1162CONFIG_JFFS2_FS_WRITEBUFFER=y
1163# CONFIG_JFFS2_SUMMARY is not set
1164# CONFIG_JFFS2_FS_XATTR is not set
1165# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1166CONFIG_JFFS2_ZLIB=y
1167CONFIG_JFFS2_RTIME=y
1168# CONFIG_JFFS2_RUBIN is not set
996# CONFIG_CRAMFS is not set 1169# CONFIG_CRAMFS is not set
997# CONFIG_VXFS_FS is not set 1170# CONFIG_VXFS_FS is not set
998# CONFIG_HPFS_FS is not set 1171# CONFIG_HPFS_FS is not set
@@ -1040,36 +1213,20 @@ CONFIG_MSDOS_PARTITION=y
1040CONFIG_ENABLE_MUST_CHECK=y 1213CONFIG_ENABLE_MUST_CHECK=y
1041CONFIG_MAGIC_SYSRQ=y 1214CONFIG_MAGIC_SYSRQ=y
1042# CONFIG_UNUSED_SYMBOLS is not set 1215# CONFIG_UNUSED_SYMBOLS is not set
1043# CONFIG_DEBUG_FS is not set 1216CONFIG_DEBUG_FS=y
1044# CONFIG_HEADERS_CHECK is not set 1217# CONFIG_HEADERS_CHECK is not set
1045CONFIG_DEBUG_KERNEL=y 1218# CONFIG_DEBUG_KERNEL is not set
1046# CONFIG_DEBUG_SHIRQ is not set
1047CONFIG_LOG_BUF_SHIFT=14
1048CONFIG_DETECT_SOFTLOCKUP=y
1049# CONFIG_SCHEDSTATS is not set
1050# CONFIG_TIMER_STATS is not set
1051# CONFIG_DEBUG_SLAB is not set
1052# CONFIG_DEBUG_RT_MUTEXES is not set
1053# CONFIG_RT_MUTEX_TESTER is not set
1054# CONFIG_DEBUG_SPINLOCK is not set
1055# CONFIG_DEBUG_MUTEXES is not set
1056# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1057# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1058# CONFIG_DEBUG_KOBJECT is not set
1059# CONFIG_DEBUG_BUGVERBOSE is not set 1219# CONFIG_DEBUG_BUGVERBOSE is not set
1060CONFIG_DEBUG_INFO=y 1220CONFIG_DEBUG_MMRS=y
1061# CONFIG_DEBUG_VM is not set
1062# CONFIG_DEBUG_LIST is not set
1063CONFIG_FRAME_POINTER=y
1064CONFIG_FORCED_INLINING=y
1065# CONFIG_RCU_TORTURE_TEST is not set
1066# CONFIG_FAULT_INJECTION is not set
1067CONFIG_DEBUG_HWERR=y
1068# CONFIG_DEBUG_ICACHE_CHECK is not set
1069# CONFIG_DEBUG_KERNEL_START is not set
1070# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
1071CONFIG_DEBUG_HUNT_FOR_ZERO=y 1221CONFIG_DEBUG_HUNT_FOR_ZERO=y
1222CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1223CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1224# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1225# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1226CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1227# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1072# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1228# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1229CONFIG_EARLY_PRINTK=y
1073CONFIG_CPLB_INFO=y 1230CONFIG_CPLB_INFO=y
1074CONFIG_ACCESS_CHECK=y 1231CONFIG_ACCESS_CHECK=y
1075 1232
@@ -1092,9 +1249,12 @@ CONFIG_SECURITY_CAPABILITIES=y
1092CONFIG_BITREVERSE=y 1249CONFIG_BITREVERSE=y
1093# CONFIG_CRC_CCITT is not set 1250# CONFIG_CRC_CCITT is not set
1094# CONFIG_CRC16 is not set 1251# CONFIG_CRC16 is not set
1252# CONFIG_CRC_ITU_T is not set
1095CONFIG_CRC32=y 1253CONFIG_CRC32=y
1096# CONFIG_LIBCRC32C is not set 1254# CONFIG_LIBCRC32C is not set
1097CONFIG_ZLIB_INFLATE=y 1255CONFIG_ZLIB_INFLATE=y
1256CONFIG_ZLIB_DEFLATE=m
1098CONFIG_PLIST=y 1257CONFIG_PLIST=y
1099CONFIG_HAS_IOMEM=y 1258CONFIG_HAS_IOMEM=y
1100CONFIG_HAS_IOPORT=y 1259CONFIG_HAS_IOPORT=y
1260CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 51c0b6f97798..85e647f87759 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -40,7 +41,9 @@ CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y
46CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 47CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 48# CONFIG_RELAY is not set
46CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
@@ -58,15 +61,20 @@ CONFIG_BUG=y
58CONFIG_ELF_CORE=y 61CONFIG_ELF_CORE=y
59CONFIG_BASE_FULL=y 62CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 63CONFIG_FUTEX=y
64CONFIG_ANON_INODES=y
65CONFIG_EPOLL=y
66CONFIG_SIGNALFD=y
67CONFIG_TIMERFD=y
68CONFIG_EVENTFD=y
69CONFIG_VM_EVENT_COUNTERS=y
61CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3 70CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
62CONFIG_BUDDY=y
63# CONFIG_NP2 is not set 71# CONFIG_NP2 is not set
64CONFIG_SLAB=y 72CONFIG_SLAB=y
65CONFIG_VM_EVENT_COUNTERS=y 73# CONFIG_SLUB is not set
74# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y 75CONFIG_RT_MUTEXES=y
67CONFIG_TINY_SHMEM=y 76CONFIG_TINY_SHMEM=y
68CONFIG_BASE_SMALL=0 77CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70 78
71# 79#
72# Loadable module support 80# Loadable module support
@@ -229,19 +237,17 @@ CONFIG_IRQ_WDTIMER=13
229# CONFIG_CMDLINE_BOOL is not set 237# CONFIG_CMDLINE_BOOL is not set
230 238
231# 239#
232# Board Setup 240# Clock/PLL Setup
233# 241#
234CONFIG_CLKIN_HZ=30000000 242CONFIG_CLKIN_HZ=30000000
235CONFIG_MEM_SIZE=64 243# CONFIG_BFIN_KERNEL_CLOCK is not set
236CONFIG_MEM_ADD_WIDTH=9 244CONFIG_MAX_VCO_HZ=600000000
237CONFIG_BOOT_LOAD=0x1000 245CONFIG_MIN_VCO_HZ=50000000
238 246CONFIG_MAX_SCLK_HZ=133000000
239# 247CONFIG_MIN_SCLK_HZ=27000000
240# Blackfin Kernel Optimizations
241#
242 248
243# 249#
244# Timer Tick 250# Kernel Timer/Scheduler
245# 251#
246# CONFIG_HZ_100 is not set 252# CONFIG_HZ_100 is not set
247CONFIG_HZ_250=y 253CONFIG_HZ_250=y
@@ -250,6 +256,20 @@ CONFIG_HZ_250=y
250CONFIG_HZ=250 256CONFIG_HZ=250
251 257
252# 258#
259# Memory Setup
260#
261CONFIG_MEM_SIZE=64
262CONFIG_MEM_ADD_WIDTH=9
263CONFIG_BOOT_LOAD=0x1000
264CONFIG_BFIN_SCRATCH_REG_RETN=y
265# CONFIG_BFIN_SCRATCH_REG_RETE is not set
266# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
267
268#
269# Blackfin Kernel Optimizations
270#
271
272#
253# Memory Optimizations 273# Memory Optimizations
254# 274#
255CONFIG_I_ENTRY_L1=y 275CONFIG_I_ENTRY_L1=y
@@ -288,20 +308,15 @@ CONFIG_DMA_UNCACHED_1M=y
288# 308#
289# Cache Support 309# Cache Support
290# 310#
291CONFIG_BLKFIN_CACHE=y 311CONFIG_BFIN_ICACHE=y
292CONFIG_BLKFIN_DCACHE=y 312CONFIG_BFIN_DCACHE=y
293# CONFIG_BLKFIN_DCACHE_BANKA is not set 313# CONFIG_BFIN_DCACHE_BANKA is not set
294# CONFIG_BLKFIN_CACHE_LOCK is not set 314# CONFIG_BFIN_ICACHE_LOCK is not set
295# CONFIG_BLKFIN_WB is not set 315# CONFIG_BFIN_WB is not set
296CONFIG_BLKFIN_WT=y 316CONFIG_BFIN_WT=y
297CONFIG_L1_MAX_PIECE=16 317CONFIG_L1_MAX_PIECE=16
298 318
299# 319#
300# Clock Settings
301#
302# CONFIG_BFIN_KERNEL_CLOCK is not set
303
304#
305# Asynchonous Memory Configuration 320# Asynchonous Memory Configuration
306# 321#
307 322
@@ -326,12 +341,13 @@ CONFIG_C_AMBEN_ALL=y
326CONFIG_BANK_0=0x7BB0 341CONFIG_BANK_0=0x7BB0
327CONFIG_BANK_1=0x7BB0 342CONFIG_BANK_1=0x7BB0
328CONFIG_BANK_2=0x7BB0 343CONFIG_BANK_2=0x7BB0
329CONFIG_BANK_3=0x99B3 344CONFIG_BANK_3=0xAAC3
330 345
331# 346#
332# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 347# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
333# 348#
334# CONFIG_PCI is not set 349# CONFIG_PCI is not set
350# CONFIG_ARCH_SUPPORTS_MSI is not set
335 351
336# 352#
337# PCCARD (PCMCIA/CardBus) support 353# PCCARD (PCMCIA/CardBus) support
@@ -339,10 +355,6 @@ CONFIG_BANK_3=0x99B3
339# CONFIG_PCCARD is not set 355# CONFIG_PCCARD is not set
340 356
341# 357#
342# PCI Hotplug Support
343#
344
345#
346# Executable file formats 358# Executable file formats
347# 359#
348CONFIG_BINFMT_ELF_FDPIC=y 360CONFIG_BINFMT_ELF_FDPIC=y
@@ -364,7 +376,6 @@ CONFIG_NET=y
364# 376#
365# Networking options 377# Networking options
366# 378#
367# CONFIG_NETDEBUG is not set
368CONFIG_PACKET=y 379CONFIG_PACKET=y
369# CONFIG_PACKET_MMAP is not set 380# CONFIG_PACKET_MMAP is not set
370CONFIG_UNIX=y 381CONFIG_UNIX=y
@@ -405,20 +416,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
405# CONFIG_NETLABEL is not set 416# CONFIG_NETLABEL is not set
406# CONFIG_NETWORK_SECMARK is not set 417# CONFIG_NETWORK_SECMARK is not set
407# CONFIG_NETFILTER is not set 418# CONFIG_NETFILTER is not set
408
409#
410# DCCP Configuration (EXPERIMENTAL)
411#
412# CONFIG_IP_DCCP is not set 419# CONFIG_IP_DCCP is not set
413
414#
415# SCTP Configuration (EXPERIMENTAL)
416#
417# CONFIG_IP_SCTP is not set 420# CONFIG_IP_SCTP is not set
418
419#
420# TIPC Configuration (EXPERIMENTAL)
421#
422# CONFIG_TIPC is not set 421# CONFIG_TIPC is not set
423# CONFIG_ATM is not set 422# CONFIG_ATM is not set
424# CONFIG_BRIDGE is not set 423# CONFIG_BRIDGE is not set
@@ -485,7 +484,16 @@ CONFIG_IRTTY_SIR=m
485# FIR device drivers 484# FIR device drivers
486# 485#
487# CONFIG_BT is not set 486# CONFIG_BT is not set
487# CONFIG_AF_RXRPC is not set
488
489#
490# Wireless
491#
492# CONFIG_CFG80211 is not set
493# CONFIG_WIRELESS_EXT is not set
494# CONFIG_MAC80211 is not set
488# CONFIG_IEEE80211 is not set 495# CONFIG_IEEE80211 is not set
496# CONFIG_RFKILL is not set
489 497
490# 498#
491# Device Drivers 499# Device Drivers
@@ -503,10 +511,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
503# Connector - unified userspace <-> kernelspace linker 511# Connector - unified userspace <-> kernelspace linker
504# 512#
505# CONFIG_CONNECTOR is not set 513# CONFIG_CONNECTOR is not set
506
507#
508# Memory Technology Devices (MTD)
509#
510CONFIG_MTD=y 514CONFIG_MTD=y
511# CONFIG_MTD_DEBUG is not set 515# CONFIG_MTD_DEBUG is not set
512# CONFIG_MTD_CONCAT is not set 516# CONFIG_MTD_CONCAT is not set
@@ -550,7 +554,6 @@ CONFIG_MTD_MW320D=m
550CONFIG_MTD_RAM=y 554CONFIG_MTD_RAM=y
551CONFIG_MTD_ROM=m 555CONFIG_MTD_ROM=m
552# CONFIG_MTD_ABSENT is not set 556# CONFIG_MTD_ABSENT is not set
553# CONFIG_MTD_OBSOLETE_CHIPS is not set
554 557
555# 558#
556# Mapping drivers for chip access 559# Mapping drivers for chip access
@@ -588,16 +591,13 @@ CONFIG_BFIN_FLASH_BANK_3=0x7BB0
588# CONFIG_MTD_DOC2000 is not set 591# CONFIG_MTD_DOC2000 is not set
589# CONFIG_MTD_DOC2001 is not set 592# CONFIG_MTD_DOC2001 is not set
590# CONFIG_MTD_DOC2001PLUS is not set 593# CONFIG_MTD_DOC2001PLUS is not set
591
592#
593# NAND Flash Device Drivers
594#
595# CONFIG_MTD_NAND is not set 594# CONFIG_MTD_NAND is not set
595# CONFIG_MTD_ONENAND is not set
596 596
597# 597#
598# OneNAND Flash Device Drivers 598# UBI - Unsorted block images
599# 599#
600# CONFIG_MTD_ONENAND is not set 600# CONFIG_MTD_UBI is not set
601 601
602# 602#
603# Parallel port support 603# Parallel port support
@@ -625,10 +625,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
625# 625#
626# Misc devices 626# Misc devices
627# 627#
628
629#
630# ATA/ATAPI/MFM/RLL support
631#
632# CONFIG_IDE is not set 628# CONFIG_IDE is not set
633 629
634# 630#
@@ -637,10 +633,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
637# CONFIG_RAID_ATTRS is not set 633# CONFIG_RAID_ATTRS is not set
638# CONFIG_SCSI is not set 634# CONFIG_SCSI is not set
639# CONFIG_SCSI_NETLINK is not set 635# CONFIG_SCSI_NETLINK is not set
640
641#
642# Serial ATA (prod) and Parallel ATA (experimental) drivers
643#
644# CONFIG_ATA is not set 636# CONFIG_ATA is not set
645 637
646# 638#
@@ -649,19 +641,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
649# CONFIG_MD is not set 641# CONFIG_MD is not set
650 642
651# 643#
652# Fusion MPT device support
653#
654# CONFIG_FUSION is not set
655
656#
657# IEEE 1394 (FireWire) support
658#
659
660#
661# I2O device support
662#
663
664#
665# Network device support 644# Network device support
666# 645#
667CONFIG_NETDEVICES=y 646CONFIG_NETDEVICES=y
@@ -669,10 +648,6 @@ CONFIG_NETDEVICES=y
669# CONFIG_BONDING is not set 648# CONFIG_BONDING is not set
670# CONFIG_EQUALIZER is not set 649# CONFIG_EQUALIZER is not set
671# CONFIG_TUN is not set 650# CONFIG_TUN is not set
672
673#
674# PHY device support
675#
676# CONFIG_PHYLIB is not set 651# CONFIG_PHYLIB is not set
677 652
678# 653#
@@ -682,27 +657,15 @@ CONFIG_NET_ETHERNET=y
682CONFIG_MII=y 657CONFIG_MII=y
683CONFIG_SMC91X=y 658CONFIG_SMC91X=y
684# CONFIG_SMSC911X is not set 659# CONFIG_SMSC911X is not set
660# CONFIG_DM9000 is not set
661CONFIG_NETDEV_1000=y
662CONFIG_NETDEV_10000=y
685 663
686# 664#
687# Ethernet (1000 Mbit) 665# Wireless LAN
688#
689
690#
691# Ethernet (10000 Mbit)
692#
693
694#
695# Token Ring devices
696#
697
698#
699# Wireless LAN (non-hamradio)
700#
701# CONFIG_NET_RADIO is not set
702
703#
704# Wan interfaces
705# 666#
667# CONFIG_WLAN_PRE80211 is not set
668# CONFIG_WLAN_80211 is not set
706# CONFIG_WAN is not set 669# CONFIG_WAN is not set
707# CONFIG_PPP is not set 670# CONFIG_PPP is not set
708# CONFIG_SLIP is not set 671# CONFIG_SLIP is not set
@@ -726,6 +689,7 @@ CONFIG_SMC91X=y
726# 689#
727CONFIG_INPUT=m 690CONFIG_INPUT=m
728# CONFIG_INPUT_FF_MEMLESS is not set 691# CONFIG_INPUT_FF_MEMLESS is not set
692# CONFIG_INPUT_POLLDEV is not set
729 693
730# 694#
731# Userland interfaces 695# Userland interfaces
@@ -742,6 +706,7 @@ CONFIG_INPUT_EVDEV=m
742# CONFIG_INPUT_KEYBOARD is not set 706# CONFIG_INPUT_KEYBOARD is not set
743# CONFIG_INPUT_MOUSE is not set 707# CONFIG_INPUT_MOUSE is not set
744# CONFIG_INPUT_JOYSTICK is not set 708# CONFIG_INPUT_JOYSTICK is not set
709# CONFIG_INPUT_TABLET is not set
745# CONFIG_INPUT_TOUCHSCREEN is not set 710# CONFIG_INPUT_TOUCHSCREEN is not set
746# CONFIG_INPUT_MISC is not set 711# CONFIG_INPUT_MISC is not set
747 712
@@ -756,7 +721,7 @@ CONFIG_INPUT_EVDEV=m
756# 721#
757# CONFIG_AD9960 is not set 722# CONFIG_AD9960 is not set
758# CONFIG_SPI_ADC_BF533 is not set 723# CONFIG_SPI_ADC_BF533 is not set
759# CONFIG_BF5xx_PFLAGS is not set 724# CONFIG_BFIN_PFLAGS is not set
760# CONFIG_BF5xx_PPIFCD is not set 725# CONFIG_BF5xx_PPIFCD is not set
761# CONFIG_BF5xx_TIMERS is not set 726# CONFIG_BF5xx_TIMERS is not set
762# CONFIG_BF5xx_PPI is not set 727# CONFIG_BF5xx_PPI is not set
@@ -796,10 +761,6 @@ CONFIG_UNIX98_PTYS=y
796# IPMI 761# IPMI
797# 762#
798# CONFIG_IPMI_HANDLER is not set 763# CONFIG_IPMI_HANDLER is not set
799
800#
801# Watchdog Cards
802#
803CONFIG_WATCHDOG=y 764CONFIG_WATCHDOG=y
804# CONFIG_WATCHDOG_NOWAYOUT is not set 765# CONFIG_WATCHDOG_NOWAYOUT is not set
805 766
@@ -810,7 +771,6 @@ CONFIG_WATCHDOG=y
810CONFIG_BFIN_WDT=y 771CONFIG_BFIN_WDT=y
811CONFIG_HW_RANDOM=y 772CONFIG_HW_RANDOM=y
812# CONFIG_GEN_RTC is not set 773# CONFIG_GEN_RTC is not set
813# CONFIG_DTLK is not set
814# CONFIG_R3964 is not set 774# CONFIG_R3964 is not set
815# CONFIG_RAW_DRIVER is not set 775# CONFIG_RAW_DRIVER is not set
816 776
@@ -818,10 +778,6 @@ CONFIG_HW_RANDOM=y
818# TPM devices 778# TPM devices
819# 779#
820# CONFIG_TCG_TPM is not set 780# CONFIG_TCG_TPM is not set
821
822#
823# I2C support
824#
825# CONFIG_I2C is not set 781# CONFIG_I2C is not set
826 782
827# 783#
@@ -840,22 +796,22 @@ CONFIG_SPI_BFIN=y
840# SPI Protocol Masters 796# SPI Protocol Masters
841# 797#
842# CONFIG_SPI_AT25 is not set 798# CONFIG_SPI_AT25 is not set
799# CONFIG_SPI_SPIDEV is not set
843 800
844# 801#
845# Dallas's 1-wire bus 802# Dallas's 1-wire bus
846# 803#
847# CONFIG_W1 is not set 804# CONFIG_W1 is not set
848
849#
850# Hardware Monitoring support
851#
852CONFIG_HWMON=y 805CONFIG_HWMON=y
853# CONFIG_HWMON_VID is not set 806# CONFIG_HWMON_VID is not set
854# CONFIG_SENSORS_ABITUGURU is not set 807# CONFIG_SENSORS_ABITUGURU is not set
855# CONFIG_SENSORS_F71805F is not set 808# CONFIG_SENSORS_F71805F is not set
856# CONFIG_SENSORS_LM70 is not set 809# CONFIG_SENSORS_LM70 is not set
857# CONFIG_SENSORS_PC87427 is not set 810# CONFIG_SENSORS_PC87427 is not set
811# CONFIG_SENSORS_SMSC47M1 is not set
812# CONFIG_SENSORS_SMSC47B397 is not set
858# CONFIG_SENSORS_VT1211 is not set 813# CONFIG_SENSORS_VT1211 is not set
814# CONFIG_SENSORS_W83627HF is not set
859# CONFIG_HWMON_DEBUG_CHIP is not set 815# CONFIG_HWMON_DEBUG_CHIP is not set
860 816
861# 817#
@@ -867,16 +823,19 @@ CONFIG_HWMON=y
867# Multimedia devices 823# Multimedia devices
868# 824#
869# CONFIG_VIDEO_DEV is not set 825# CONFIG_VIDEO_DEV is not set
826# CONFIG_DVB_CORE is not set
827CONFIG_DAB=y
870 828
871# 829#
872# Digital Video Broadcasting Devices 830# Graphics support
873# 831#
874# CONFIG_DVB is not set 832# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
875 833
876# 834#
877# Graphics support 835# Display device support
878# 836#
879# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 837# CONFIG_DISPLAY_SUPPORT is not set
838# CONFIG_VGASTATE is not set
880# CONFIG_FB is not set 839# CONFIG_FB is not set
881 840
882# 841#
@@ -899,18 +858,17 @@ CONFIG_USB_ARCH_HAS_HCD=y
899# CONFIG_USB is not set 858# CONFIG_USB is not set
900 859
901# 860#
902# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 861# Enable Host or Gadget support to see Inventra options
903# 862#
904 863
905# 864#
906# USB Gadget Support 865# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
907# 866#
908# CONFIG_USB_GADGET is not set
909 867
910# 868#
911# MMC/SD Card support 869# USB Gadget Support
912# 870#
913# CONFIG_SPI_MMC is not set 871# CONFIG_USB_GADGET is not set
914# CONFIG_MMC is not set 872# CONFIG_MMC is not set
915 873
916# 874#
@@ -953,14 +911,6 @@ CONFIG_USB_ARCH_HAS_HCD=y
953# 911#
954 912
955# 913#
956# Auxiliary Display support
957#
958
959#
960# Virtualization
961#
962
963#
964# PBX support 914# PBX support
965# 915#
966# CONFIG_PBX is not set 916# CONFIG_PBX is not set
@@ -1060,6 +1010,7 @@ CONFIG_LOCKD=m
1060CONFIG_LOCKD_V4=y 1010CONFIG_LOCKD_V4=y
1061CONFIG_NFS_COMMON=y 1011CONFIG_NFS_COMMON=y
1062CONFIG_SUNRPC=m 1012CONFIG_SUNRPC=m
1013# CONFIG_SUNRPC_BIND34 is not set
1063# CONFIG_RPCSEC_GSS_KRB5 is not set 1014# CONFIG_RPCSEC_GSS_KRB5 is not set
1064# CONFIG_RPCSEC_GSS_SPKM3 is not set 1015# CONFIG_RPCSEC_GSS_SPKM3 is not set
1065CONFIG_SMB_FS=m 1016CONFIG_SMB_FS=m
@@ -1137,14 +1088,20 @@ CONFIG_NLS_DEFAULT="iso8859-1"
1137CONFIG_ENABLE_MUST_CHECK=y 1088CONFIG_ENABLE_MUST_CHECK=y
1138# CONFIG_MAGIC_SYSRQ is not set 1089# CONFIG_MAGIC_SYSRQ is not set
1139# CONFIG_UNUSED_SYMBOLS is not set 1090# CONFIG_UNUSED_SYMBOLS is not set
1140# CONFIG_DEBUG_FS is not set 1091CONFIG_DEBUG_FS=y
1141# CONFIG_HEADERS_CHECK is not set 1092# CONFIG_HEADERS_CHECK is not set
1142# CONFIG_DEBUG_KERNEL is not set 1093# CONFIG_DEBUG_KERNEL is not set
1143CONFIG_LOG_BUF_SHIFT=14
1144# CONFIG_DEBUG_BUGVERBOSE is not set 1094# CONFIG_DEBUG_BUGVERBOSE is not set
1145# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set 1095CONFIG_DEBUG_MMRS=y
1146CONFIG_DEBUG_HUNT_FOR_ZERO=y 1096CONFIG_DEBUG_HUNT_FOR_ZERO=y
1097CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1098CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1099# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1100# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1101CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1102# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1147# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1103# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1104CONFIG_EARLY_PRINTK=y
1148# CONFIG_DUAL_CORE_TEST_MODULE is not set 1105# CONFIG_DUAL_CORE_TEST_MODULE is not set
1149CONFIG_CPLB_INFO=y 1106CONFIG_CPLB_INFO=y
1150CONFIG_ACCESS_CHECK=y 1107CONFIG_ACCESS_CHECK=y
@@ -1168,6 +1125,7 @@ CONFIG_SECURITY_CAPABILITIES=m
1168CONFIG_BITREVERSE=y 1125CONFIG_BITREVERSE=y
1169CONFIG_CRC_CCITT=m 1126CONFIG_CRC_CCITT=m
1170# CONFIG_CRC16 is not set 1127# CONFIG_CRC16 is not set
1128# CONFIG_CRC_ITU_T is not set
1171CONFIG_CRC32=y 1129CONFIG_CRC32=y
1172# CONFIG_LIBCRC32C is not set 1130# CONFIG_LIBCRC32C is not set
1173CONFIG_ZLIB_INFLATE=y 1131CONFIG_ZLIB_INFLATE=y
@@ -1175,3 +1133,4 @@ CONFIG_ZLIB_DEFLATE=m
1175CONFIG_PLIST=y 1133CONFIG_PLIST=y
1176CONFIG_HAS_IOMEM=y 1134CONFIG_HAS_IOMEM=y
1177CONFIG_HAS_IOPORT=y 1135CONFIG_HAS_IOPORT=y
1136CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index 983ed181c896..15e36aaf2186 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21.5 3# Linux kernel version: 2.6.22.6
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -15,8 +15,9 @@ CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y 15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
17# CONFIG_GENERIC_TIME is not set 17# CONFIG_GENERIC_TIME is not set
18CONFIG_GENERIC_CALIBRATE_DELAY=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_FORCE_MAX_ZONEORDER=14 19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_IRQCHIP_DEMUX_GPIO=y 21CONFIG_IRQCHIP_DEMUX_GPIO=y
21CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
22 23
@@ -41,6 +42,7 @@ CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_UTS_NS is not set 42# CONFIG_UTS_NS is not set
42# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
43# CONFIG_IKCONFIG is not set 44# CONFIG_IKCONFIG is not set
45CONFIG_LOG_BUF_SHIFT=14
44CONFIG_SYSFS_DEPRECATED=y 46CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 47# CONFIG_RELAY is not set
46# CONFIG_BLK_DEV_INITRD is not set 48# CONFIG_BLK_DEV_INITRD is not set
@@ -57,15 +59,20 @@ CONFIG_BUG=y
57CONFIG_ELF_CORE=y 59CONFIG_ELF_CORE=y
58CONFIG_BASE_FULL=y 60CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 61CONFIG_FUTEX=y
62CONFIG_ANON_INODES=y
63CONFIG_EPOLL=y
64CONFIG_SIGNALFD=y
65CONFIG_TIMERFD=y
66CONFIG_EVENTFD=y
67CONFIG_VM_EVENT_COUNTERS=y
60CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=9 68CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=9
61CONFIG_BUDDY=y
62# CONFIG_NP2 is not set 69# CONFIG_NP2 is not set
63CONFIG_SLAB=y 70CONFIG_SLAB=y
64CONFIG_VM_EVENT_COUNTERS=y 71# CONFIG_SLUB is not set
72# CONFIG_SLOB is not set
65CONFIG_RT_MUTEXES=y 73CONFIG_RT_MUTEXES=y
66CONFIG_TINY_SHMEM=y 74CONFIG_TINY_SHMEM=y
67CONFIG_BASE_SMALL=0 75CONFIG_BASE_SMALL=0
68# CONFIG_SLOB is not set
69 76
70# 77#
71# Loadable module support 78# Loadable module support
@@ -147,13 +154,6 @@ CONFIG_IRQ_PLL_WAKEUP=7
147# 154#
148 155
149# 156#
150# PORT F/G Selection
151#
152CONFIG_BF537_PORT_F=y
153# CONFIG_BF537_PORT_G is not set
154# CONFIG_BF537_PORT_H is not set
155
156#
157# Interrupt Priority Assignment 157# Interrupt Priority Assignment
158# 158#
159 159
@@ -198,19 +198,17 @@ CONFIG_IRQ_WATCH=13
198# CONFIG_CMDLINE_BOOL is not set 198# CONFIG_CMDLINE_BOOL is not set
199 199
200# 200#
201# Board Setup 201# Clock/PLL Setup
202# 202#
203CONFIG_CLKIN_HZ=24576000 203CONFIG_CLKIN_HZ=24576000
204CONFIG_MEM_SIZE=64 204# CONFIG_BFIN_KERNEL_CLOCK is not set
205CONFIG_MEM_ADD_WIDTH=10 205CONFIG_MAX_VCO_HZ=600000000
206CONFIG_BOOT_LOAD=0x1000 206CONFIG_MIN_VCO_HZ=50000000
207 207CONFIG_MAX_SCLK_HZ=133000000
208# 208CONFIG_MIN_SCLK_HZ=27000000
209# Blackfin Kernel Optimizations
210#
211 209
212# 210#
213# Timer Tick 211# Kernel Timer/Scheduler
214# 212#
215# CONFIG_HZ_100 is not set 213# CONFIG_HZ_100 is not set
216CONFIG_HZ_250=y 214CONFIG_HZ_250=y
@@ -219,6 +217,20 @@ CONFIG_HZ_250=y
219CONFIG_HZ=250 217CONFIG_HZ=250
220 218
221# 219#
220# Memory Setup
221#
222CONFIG_MEM_SIZE=64
223CONFIG_MEM_ADD_WIDTH=10
224CONFIG_BOOT_LOAD=0x1000
225CONFIG_BFIN_SCRATCH_REG_RETN=y
226# CONFIG_BFIN_SCRATCH_REG_RETE is not set
227# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
228
229#
230# Blackfin Kernel Optimizations
231#
232
233#
222# Memory Optimizations 234# Memory Optimizations
223# 235#
224CONFIG_I_ENTRY_L1=y 236CONFIG_I_ENTRY_L1=y
@@ -257,20 +269,15 @@ CONFIG_DMA_UNCACHED_1M=y
257# 269#
258# Cache Support 270# Cache Support
259# 271#
260CONFIG_BLKFIN_CACHE=y 272CONFIG_BFIN_ICACHE=y
261CONFIG_BLKFIN_DCACHE=y 273CONFIG_BFIN_DCACHE=y
262# CONFIG_BLKFIN_DCACHE_BANKA is not set 274# CONFIG_BFIN_DCACHE_BANKA is not set
263# CONFIG_BLKFIN_CACHE_LOCK is not set 275# CONFIG_BFIN_ICACHE_LOCK is not set
264CONFIG_BLKFIN_WB=y 276CONFIG_BFIN_WB=y
265# CONFIG_BLKFIN_WT is not set 277# CONFIG_BFIN_WT is not set
266CONFIG_L1_MAX_PIECE=16 278CONFIG_L1_MAX_PIECE=16
267 279
268# 280#
269# Clock Settings
270#
271# CONFIG_BFIN_KERNEL_CLOCK is not set
272
273#
274# Asynchonous Memory Configuration 281# Asynchonous Memory Configuration
275# 282#
276 283
@@ -297,6 +304,7 @@ CONFIG_BANK_3=0x99B3
297# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 304# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
298# 305#
299# CONFIG_PCI is not set 306# CONFIG_PCI is not set
307# CONFIG_ARCH_SUPPORTS_MSI is not set
300 308
301# 309#
302# PCCARD (PCMCIA/CardBus) support 310# PCCARD (PCMCIA/CardBus) support
@@ -304,10 +312,6 @@ CONFIG_BANK_3=0x99B3
304# CONFIG_PCCARD is not set 312# CONFIG_PCCARD is not set
305 313
306# 314#
307# PCI Hotplug Support
308#
309
310#
311# Executable file formats 315# Executable file formats
312# 316#
313CONFIG_BINFMT_ELF_FDPIC=y 317CONFIG_BINFMT_ELF_FDPIC=y
@@ -334,7 +338,6 @@ CONFIG_NET=y
334# 338#
335# Networking options 339# Networking options
336# 340#
337# CONFIG_NETDEBUG is not set
338CONFIG_PACKET=y 341CONFIG_PACKET=y
339# CONFIG_PACKET_MMAP is not set 342# CONFIG_PACKET_MMAP is not set
340CONFIG_UNIX=y 343CONFIG_UNIX=y
@@ -375,20 +378,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
375# CONFIG_NETLABEL is not set 378# CONFIG_NETLABEL is not set
376# CONFIG_NETWORK_SECMARK is not set 379# CONFIG_NETWORK_SECMARK is not set
377# CONFIG_NETFILTER is not set 380# CONFIG_NETFILTER is not set
378
379#
380# DCCP Configuration (EXPERIMENTAL)
381#
382# CONFIG_IP_DCCP is not set 381# CONFIG_IP_DCCP is not set
383
384#
385# SCTP Configuration (EXPERIMENTAL)
386#
387# CONFIG_IP_SCTP is not set 382# CONFIG_IP_SCTP is not set
388
389#
390# TIPC Configuration (EXPERIMENTAL)
391#
392# CONFIG_TIPC is not set 383# CONFIG_TIPC is not set
393# CONFIG_ATM is not set 384# CONFIG_ATM is not set
394# CONFIG_BRIDGE is not set 385# CONFIG_BRIDGE is not set
@@ -414,7 +405,16 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
414# CONFIG_HAMRADIO is not set 405# CONFIG_HAMRADIO is not set
415# CONFIG_IRDA is not set 406# CONFIG_IRDA is not set
416# CONFIG_BT is not set 407# CONFIG_BT is not set
408# CONFIG_AF_RXRPC is not set
409
410#
411# Wireless
412#
413# CONFIG_CFG80211 is not set
414# CONFIG_WIRELESS_EXT is not set
415# CONFIG_MAC80211 is not set
417# CONFIG_IEEE80211 is not set 416# CONFIG_IEEE80211 is not set
417# CONFIG_RFKILL is not set
418 418
419# 419#
420# Device Drivers 420# Device Drivers
@@ -432,10 +432,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
432# Connector - unified userspace <-> kernelspace linker 432# Connector - unified userspace <-> kernelspace linker
433# 433#
434# CONFIG_CONNECTOR is not set 434# CONFIG_CONNECTOR is not set
435
436#
437# Memory Technology Devices (MTD)
438#
439CONFIG_MTD=y 435CONFIG_MTD=y
440# CONFIG_MTD_DEBUG is not set 436# CONFIG_MTD_DEBUG is not set
441# CONFIG_MTD_CONCAT is not set 437# CONFIG_MTD_CONCAT is not set
@@ -473,7 +469,6 @@ CONFIG_MTD_CFI_I2=y
473CONFIG_MTD_RAM=y 469CONFIG_MTD_RAM=y
474# CONFIG_MTD_ROM is not set 470# CONFIG_MTD_ROM is not set
475# CONFIG_MTD_ABSENT is not set 471# CONFIG_MTD_ABSENT is not set
476# CONFIG_MTD_OBSOLETE_CHIPS is not set
477 472
478# 473#
479# Mapping drivers for chip access 474# Mapping drivers for chip access
@@ -499,13 +494,10 @@ CONFIG_MTD_UCLINUX=y
499# CONFIG_MTD_DOC2000 is not set 494# CONFIG_MTD_DOC2000 is not set
500# CONFIG_MTD_DOC2001 is not set 495# CONFIG_MTD_DOC2001 is not set
501# CONFIG_MTD_DOC2001PLUS is not set 496# CONFIG_MTD_DOC2001PLUS is not set
502
503#
504# NAND Flash Device Drivers
505#
506CONFIG_MTD_NAND=y 497CONFIG_MTD_NAND=y
507# CONFIG_MTD_NAND_VERIFY_WRITE is not set 498# CONFIG_MTD_NAND_VERIFY_WRITE is not set
508# CONFIG_MTD_NAND_ECC_SMC is not set 499# CONFIG_MTD_NAND_ECC_SMC is not set
500# CONFIG_MTD_NAND_MUSEUM_IDS is not set
509CONFIG_MTD_NAND_BFIN=y 501CONFIG_MTD_NAND_BFIN=y
510CONFIG_BFIN_NAND_BASE=0x20100000 502CONFIG_BFIN_NAND_BASE=0x20100000
511CONFIG_BFIN_NAND_CLE=2 503CONFIG_BFIN_NAND_CLE=2
@@ -514,11 +506,13 @@ CONFIG_BFIN_NAND_READY=44
514CONFIG_MTD_NAND_IDS=y 506CONFIG_MTD_NAND_IDS=y
515# CONFIG_MTD_NAND_DISKONCHIP is not set 507# CONFIG_MTD_NAND_DISKONCHIP is not set
516# CONFIG_MTD_NAND_NANDSIM is not set 508# CONFIG_MTD_NAND_NANDSIM is not set
509# CONFIG_MTD_NAND_PLATFORM is not set
510# CONFIG_MTD_ONENAND is not set
517 511
518# 512#
519# OneNAND Flash Device Drivers 513# UBI - Unsorted block images
520# 514#
521# CONFIG_MTD_ONENAND is not set 515# CONFIG_MTD_UBI is not set
522 516
523# 517#
524# Parallel port support 518# Parallel port support
@@ -546,10 +540,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
546# 540#
547# Misc devices 541# Misc devices
548# 542#
549
550#
551# ATA/ATAPI/MFM/RLL support
552#
553# CONFIG_IDE is not set 543# CONFIG_IDE is not set
554 544
555# 545#
@@ -558,10 +548,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
558# CONFIG_RAID_ATTRS is not set 548# CONFIG_RAID_ATTRS is not set
559# CONFIG_SCSI is not set 549# CONFIG_SCSI is not set
560# CONFIG_SCSI_NETLINK is not set 550# CONFIG_SCSI_NETLINK is not set
561
562#
563# Serial ATA (prod) and Parallel ATA (experimental) drivers
564#
565# CONFIG_ATA is not set 551# CONFIG_ATA is not set
566 552
567# 553#
@@ -570,19 +556,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
570# CONFIG_MD is not set 556# CONFIG_MD is not set
571 557
572# 558#
573# Fusion MPT device support
574#
575# CONFIG_FUSION is not set
576
577#
578# IEEE 1394 (FireWire) support
579#
580
581#
582# I2O device support
583#
584
585#
586# Network device support 559# Network device support
587# 560#
588CONFIG_NETDEVICES=y 561CONFIG_NETDEVICES=y
@@ -590,11 +563,20 @@ CONFIG_NETDEVICES=y
590# CONFIG_BONDING is not set 563# CONFIG_BONDING is not set
591# CONFIG_EQUALIZER is not set 564# CONFIG_EQUALIZER is not set
592# CONFIG_TUN is not set 565# CONFIG_TUN is not set
566CONFIG_PHYLIB=y
593 567
594# 568#
595# PHY device support 569# MII PHY device drivers
596# 570#
597# CONFIG_PHYLIB is not set 571# CONFIG_MARVELL_PHY is not set
572# CONFIG_DAVICOM_PHY is not set
573# CONFIG_QSEMI_PHY is not set
574# CONFIG_LXT_PHY is not set
575# CONFIG_CICADA_PHY is not set
576# CONFIG_VITESSE_PHY is not set
577# CONFIG_SMSC_PHY is not set
578# CONFIG_BROADCOM_PHY is not set
579# CONFIG_FIXED_PHY is not set
598 580
599# 581#
600# Ethernet (10 or 100Mbit) 582# Ethernet (10 or 100Mbit)
@@ -608,27 +590,15 @@ CONFIG_BFIN_TX_DESC_NUM=100
608CONFIG_BFIN_RX_DESC_NUM=100 590CONFIG_BFIN_RX_DESC_NUM=100
609CONFIG_BFIN_MAC_RMII=y 591CONFIG_BFIN_MAC_RMII=y
610# CONFIG_SMSC911X is not set 592# CONFIG_SMSC911X is not set
593# CONFIG_DM9000 is not set
594CONFIG_NETDEV_1000=y
595CONFIG_NETDEV_10000=y
611 596
612# 597#
613# Ethernet (1000 Mbit) 598# Wireless LAN
614#
615
616#
617# Ethernet (10000 Mbit)
618#
619
620#
621# Token Ring devices
622#
623
624#
625# Wireless LAN (non-hamradio)
626#
627# CONFIG_NET_RADIO is not set
628
629#
630# Wan interfaces
631# 599#
600# CONFIG_WLAN_PRE80211 is not set
601# CONFIG_WLAN_80211 is not set
632# CONFIG_WAN is not set 602# CONFIG_WAN is not set
633# CONFIG_PPP is not set 603# CONFIG_PPP is not set
634# CONFIG_SLIP is not set 604# CONFIG_SLIP is not set
@@ -652,6 +622,7 @@ CONFIG_BFIN_MAC_RMII=y
652# 622#
653CONFIG_INPUT=y 623CONFIG_INPUT=y
654# CONFIG_INPUT_FF_MEMLESS is not set 624# CONFIG_INPUT_FF_MEMLESS is not set
625# CONFIG_INPUT_POLLDEV is not set
655 626
656# 627#
657# Userland interfaces 628# Userland interfaces
@@ -670,6 +641,7 @@ CONFIG_INPUT_EVDEV=y
670# CONFIG_INPUT_KEYBOARD is not set 641# CONFIG_INPUT_KEYBOARD is not set
671# CONFIG_INPUT_MOUSE is not set 642# CONFIG_INPUT_MOUSE is not set
672# CONFIG_INPUT_JOYSTICK is not set 643# CONFIG_INPUT_JOYSTICK is not set
644# CONFIG_INPUT_TABLET is not set
673CONFIG_INPUT_TOUCHSCREEN=y 645CONFIG_INPUT_TOUCHSCREEN=y
674# CONFIG_TOUCHSCREEN_ADS7846 is not set 646# CONFIG_TOUCHSCREEN_ADS7846 is not set
675CONFIG_TOUCHSCREEN_AD7877=y 647CONFIG_TOUCHSCREEN_AD7877=y
@@ -681,7 +653,13 @@ CONFIG_TOUCHSCREEN_AD7877=y
681# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 653# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
682# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 654# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
683# CONFIG_TOUCHSCREEN_UCB1400 is not set 655# CONFIG_TOUCHSCREEN_UCB1400 is not set
656# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
684CONFIG_INPUT_MISC=y 657CONFIG_INPUT_MISC=y
658# CONFIG_INPUT_ATI_REMOTE is not set
659# CONFIG_INPUT_ATI_REMOTE2 is not set
660# CONFIG_INPUT_KEYSPAN_REMOTE is not set
661# CONFIG_INPUT_POWERMATE is not set
662# CONFIG_INPUT_YEALINK is not set
685CONFIG_INPUT_UINPUT=y 663CONFIG_INPUT_UINPUT=y
686# CONFIG_BF53X_PFBUTTONS is not set 664# CONFIG_BF53X_PFBUTTONS is not set
687# CONFIG_TWI_KEYPAD is not set 665# CONFIG_TWI_KEYPAD is not set
@@ -697,7 +675,7 @@ CONFIG_INPUT_UINPUT=y
697# 675#
698# CONFIG_AD9960 is not set 676# CONFIG_AD9960 is not set
699# CONFIG_SPI_ADC_BF533 is not set 677# CONFIG_SPI_ADC_BF533 is not set
700# CONFIG_BF5xx_PFLAGS is not set 678# CONFIG_BFIN_PFLAGS is not set
701# CONFIG_BF5xx_PPIFCD is not set 679# CONFIG_BF5xx_PPIFCD is not set
702# CONFIG_BF5xx_TIMERS is not set 680# CONFIG_BF5xx_TIMERS is not set
703# CONFIG_BF5xx_PPI is not set 681# CONFIG_BF5xx_PPI is not set
@@ -749,14 +727,9 @@ CONFIG_CAN_BLACKFIN=m
749# IPMI 727# IPMI
750# 728#
751# CONFIG_IPMI_HANDLER is not set 729# CONFIG_IPMI_HANDLER is not set
752
753#
754# Watchdog Cards
755#
756# CONFIG_WATCHDOG is not set 730# CONFIG_WATCHDOG is not set
757CONFIG_HW_RANDOM=y 731CONFIG_HW_RANDOM=y
758# CONFIG_GEN_RTC is not set 732# CONFIG_GEN_RTC is not set
759# CONFIG_DTLK is not set
760# CONFIG_R3964 is not set 733# CONFIG_R3964 is not set
761# CONFIG_RAW_DRIVER is not set 734# CONFIG_RAW_DRIVER is not set
762 735
@@ -764,11 +737,8 @@ CONFIG_HW_RANDOM=y
764# TPM devices 737# TPM devices
765# 738#
766# CONFIG_TCG_TPM is not set 739# CONFIG_TCG_TPM is not set
767
768#
769# I2C support
770#
771CONFIG_I2C=y 740CONFIG_I2C=y
741CONFIG_I2C_BOARDINFO=y
772CONFIG_I2C_CHARDEV=y 742CONFIG_I2C_CHARDEV=y
773 743
774# 744#
@@ -784,10 +754,11 @@ CONFIG_I2C_CHARDEV=y
784# CONFIG_I2C_BLACKFIN_GPIO is not set 754# CONFIG_I2C_BLACKFIN_GPIO is not set
785CONFIG_I2C_BLACKFIN_TWI=y 755CONFIG_I2C_BLACKFIN_TWI=y
786CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50 756CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
757# CONFIG_I2C_GPIO is not set
787# CONFIG_I2C_OCORES is not set 758# CONFIG_I2C_OCORES is not set
788# CONFIG_I2C_PARPORT_LIGHT is not set 759# CONFIG_I2C_PARPORT_LIGHT is not set
760# CONFIG_I2C_SIMTEC is not set
789# CONFIG_I2C_STUB is not set 761# CONFIG_I2C_STUB is not set
790# CONFIG_I2C_PCA_ISA is not set
791 762
792# 763#
793# Miscellaneous I2C Chip support 764# Miscellaneous I2C Chip support
@@ -823,18 +794,16 @@ CONFIG_SPI_BFIN=y
823# SPI Protocol Masters 794# SPI Protocol Masters
824# 795#
825# CONFIG_SPI_AT25 is not set 796# CONFIG_SPI_AT25 is not set
797# CONFIG_SPI_SPIDEV is not set
826 798
827# 799#
828# Dallas's 1-wire bus 800# Dallas's 1-wire bus
829# 801#
830# CONFIG_W1 is not set 802# CONFIG_W1 is not set
831
832#
833# Hardware Monitoring support
834#
835CONFIG_HWMON=y 803CONFIG_HWMON=y
836# CONFIG_HWMON_VID is not set 804# CONFIG_HWMON_VID is not set
837# CONFIG_SENSORS_ABITUGURU is not set 805# CONFIG_SENSORS_ABITUGURU is not set
806# CONFIG_SENSORS_AD7418 is not set
838# CONFIG_SENSORS_ADM1021 is not set 807# CONFIG_SENSORS_ADM1021 is not set
839# CONFIG_SENSORS_ADM1025 is not set 808# CONFIG_SENSORS_ADM1025 is not set
840# CONFIG_SENSORS_ADM1026 is not set 809# CONFIG_SENSORS_ADM1026 is not set
@@ -862,6 +831,7 @@ CONFIG_HWMON=y
862# CONFIG_SENSORS_LM90 is not set 831# CONFIG_SENSORS_LM90 is not set
863# CONFIG_SENSORS_LM92 is not set 832# CONFIG_SENSORS_LM92 is not set
864# CONFIG_SENSORS_MAX1619 is not set 833# CONFIG_SENSORS_MAX1619 is not set
834# CONFIG_SENSORS_MAX6650 is not set
865# CONFIG_SENSORS_PC87360 is not set 835# CONFIG_SENSORS_PC87360 is not set
866# CONFIG_SENSORS_PC87427 is not set 836# CONFIG_SENSORS_PC87427 is not set
867# CONFIG_SENSORS_SMSC47M1 is not set 837# CONFIG_SENSORS_SMSC47M1 is not set
@@ -886,11 +856,8 @@ CONFIG_HWMON=y
886# Multimedia devices 856# Multimedia devices
887# 857#
888# CONFIG_VIDEO_DEV is not set 858# CONFIG_VIDEO_DEV is not set
889 859# CONFIG_DVB_CORE is not set
890# 860CONFIG_DAB=y
891# Digital Video Broadcasting Devices
892#
893# CONFIG_DVB is not set
894 861
895# 862#
896# Graphics support 863# Graphics support
@@ -898,12 +865,23 @@ CONFIG_HWMON=y
898CONFIG_BACKLIGHT_LCD_SUPPORT=y 865CONFIG_BACKLIGHT_LCD_SUPPORT=y
899CONFIG_BACKLIGHT_CLASS_DEVICE=y 866CONFIG_BACKLIGHT_CLASS_DEVICE=y
900CONFIG_LCD_CLASS_DEVICE=y 867CONFIG_LCD_CLASS_DEVICE=y
868
869#
870# Display device support
871#
872# CONFIG_DISPLAY_SUPPORT is not set
873# CONFIG_VGASTATE is not set
901CONFIG_FB=y 874CONFIG_FB=y
902CONFIG_FIRMWARE_EDID=y 875CONFIG_FIRMWARE_EDID=y
903# CONFIG_FB_DDC is not set 876# CONFIG_FB_DDC is not set
904CONFIG_FB_CFB_FILLRECT=y 877CONFIG_FB_CFB_FILLRECT=y
905CONFIG_FB_CFB_COPYAREA=y 878CONFIG_FB_CFB_COPYAREA=y
906CONFIG_FB_CFB_IMAGEBLIT=y 879CONFIG_FB_CFB_IMAGEBLIT=y
880# CONFIG_FB_SYS_FILLRECT is not set
881# CONFIG_FB_SYS_COPYAREA is not set
882# CONFIG_FB_SYS_IMAGEBLIT is not set
883# CONFIG_FB_SYS_FOPS is not set
884CONFIG_FB_DEFERRED_IO=y
907# CONFIG_FB_SVGALIB is not set 885# CONFIG_FB_SVGALIB is not set
908# CONFIG_FB_MACMODES is not set 886# CONFIG_FB_MACMODES is not set
909# CONFIG_FB_BACKLIGHT is not set 887# CONFIG_FB_BACKLIGHT is not set
@@ -921,10 +899,6 @@ CONFIG_FB_BFIN_LANDSCAPE=y
921# CONFIG_FB_BFIN_BGR is not set 899# CONFIG_FB_BFIN_BGR is not set
922# CONFIG_FB_S1D13XXX is not set 900# CONFIG_FB_S1D13XXX is not set
923# CONFIG_FB_VIRTUAL is not set 901# CONFIG_FB_VIRTUAL is not set
924
925#
926# Logo configuration
927#
928# CONFIG_LOGO is not set 902# CONFIG_LOGO is not set
929 903
930# 904#
@@ -936,8 +910,6 @@ CONFIG_SOUND=y
936# Advanced Linux Sound Architecture 910# Advanced Linux Sound Architecture
937# 911#
938CONFIG_SND=m 912CONFIG_SND=m
939CONFIG_SND_TIMER=m
940CONFIG_SND_PCM=m
941# CONFIG_SND_SEQUENCER is not set 913# CONFIG_SND_SEQUENCER is not set
942# CONFIG_SND_MIXER_OSS is not set 914# CONFIG_SND_MIXER_OSS is not set
943# CONFIG_SND_PCM_OSS is not set 915# CONFIG_SND_PCM_OSS is not set
@@ -959,19 +931,23 @@ CONFIG_SND_PCM=m
959# ALSA Blackfin devices 931# ALSA Blackfin devices
960# 932#
961# CONFIG_SND_BLACKFIN_AD1836 is not set 933# CONFIG_SND_BLACKFIN_AD1836 is not set
962CONFIG_SND_BLACKFIN_AD1981B=m
963# CONFIG_SND_BFIN_AD73311 is not set 934# CONFIG_SND_BFIN_AD73311 is not set
964 935
965# 936#
966# SoC audio support 937# System on Chip audio support
967# 938#
968# CONFIG_SND_SOC is not set 939# CONFIG_SND_SOC is not set
969 940
970# 941#
942# SoC Audio for the ADI Blackfin
943#
944# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
945
946#
971# Open Sound System 947# Open Sound System
972# 948#
973CONFIG_SOUND_PRIME=y 949CONFIG_SOUND_PRIME=y
974# CONFIG_OBSOLETE_OSS is not set 950# CONFIG_OSS_OBSOLETE is not set
975# CONFIG_SOUND_MSNDCLAS is not set 951# CONFIG_SOUND_MSNDCLAS is not set
976# CONFIG_SOUND_MSNDPIN is not set 952# CONFIG_SOUND_MSNDPIN is not set
977 953
@@ -989,18 +965,17 @@ CONFIG_USB_ARCH_HAS_HCD=y
989# CONFIG_USB is not set 965# CONFIG_USB is not set
990 966
991# 967#
992# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 968# Enable Host or Gadget support to see Inventra options
993# 969#
994 970
995# 971#
996# USB Gadget Support 972# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
997# 973#
998# CONFIG_USB_GADGET is not set
999 974
1000# 975#
1001# MMC/SD Card support 976# USB Gadget Support
1002# 977#
1003# CONFIG_SPI_MMC is not set 978# CONFIG_USB_GADGET is not set
1004# CONFIG_MMC is not set 979# CONFIG_MMC is not set
1005 980
1006# 981#
@@ -1040,44 +1015,50 @@ CONFIG_RTC_INTF_SYSFS=y
1040CONFIG_RTC_INTF_PROC=y 1015CONFIG_RTC_INTF_PROC=y
1041CONFIG_RTC_INTF_DEV=y 1016CONFIG_RTC_INTF_DEV=y
1042# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1017# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1018# CONFIG_RTC_DRV_TEST is not set
1043 1019
1044# 1020#
1045# RTC drivers 1021# I2C RTC drivers
1046# 1022#
1047# CONFIG_RTC_DRV_X1205 is not set
1048# CONFIG_RTC_DRV_DS1307 is not set 1023# CONFIG_RTC_DRV_DS1307 is not set
1049# CONFIG_RTC_DRV_DS1553 is not set
1050# CONFIG_RTC_DRV_ISL1208 is not set
1051# CONFIG_RTC_DRV_DS1672 is not set 1024# CONFIG_RTC_DRV_DS1672 is not set
1052# CONFIG_RTC_DRV_DS1742 is not set 1025# CONFIG_RTC_DRV_MAX6900 is not set
1026# CONFIG_RTC_DRV_RS5C372 is not set
1027# CONFIG_RTC_DRV_ISL1208 is not set
1028# CONFIG_RTC_DRV_X1205 is not set
1053# CONFIG_RTC_DRV_PCF8563 is not set 1029# CONFIG_RTC_DRV_PCF8563 is not set
1030# CONFIG_RTC_DRV_PCF8583 is not set
1031
1032#
1033# SPI RTC drivers
1034#
1054# CONFIG_RTC_DRV_RS5C348 is not set 1035# CONFIG_RTC_DRV_RS5C348 is not set
1055# CONFIG_RTC_DRV_RS5C372 is not set
1056# CONFIG_RTC_DRV_M48T86 is not set
1057# CONFIG_RTC_DRV_TEST is not set
1058# CONFIG_RTC_DRV_MAX6902 is not set 1036# CONFIG_RTC_DRV_MAX6902 is not set
1059# CONFIG_RTC_DRV_V3020 is not set
1060CONFIG_RTC_DRV_BFIN=y
1061 1037
1062# 1038#
1063# DMA Engine support 1039# Platform RTC drivers
1064# 1040#
1065# CONFIG_DMA_ENGINE is not set 1041# CONFIG_RTC_DRV_DS1553 is not set
1042# CONFIG_RTC_DRV_DS1742 is not set
1043# CONFIG_RTC_DRV_M48T86 is not set
1044# CONFIG_RTC_DRV_V3020 is not set
1066 1045
1067# 1046#
1068# DMA Clients 1047# on-CPU RTC drivers
1069# 1048#
1049CONFIG_RTC_DRV_BFIN=y
1070 1050
1071# 1051#
1072# DMA Devices 1052# DMA Engine support
1073# 1053#
1054# CONFIG_DMA_ENGINE is not set
1074 1055
1075# 1056#
1076# Auxiliary Display support 1057# DMA Clients
1077# 1058#
1078 1059
1079# 1060#
1080# Virtualization 1061# DMA Devices
1081# 1062#
1082 1063
1083# 1064#
@@ -1176,6 +1157,7 @@ CONFIG_LOCKD=m
1176CONFIG_LOCKD_V4=y 1157CONFIG_LOCKD_V4=y
1177CONFIG_NFS_COMMON=y 1158CONFIG_NFS_COMMON=y
1178CONFIG_SUNRPC=m 1159CONFIG_SUNRPC=m
1160# CONFIG_SUNRPC_BIND34 is not set
1179# CONFIG_RPCSEC_GSS_KRB5 is not set 1161# CONFIG_RPCSEC_GSS_KRB5 is not set
1180# CONFIG_RPCSEC_GSS_SPKM3 is not set 1162# CONFIG_RPCSEC_GSS_SPKM3 is not set
1181CONFIG_SMB_FS=m 1163CONFIG_SMB_FS=m
@@ -1256,11 +1238,17 @@ CONFIG_ENABLE_MUST_CHECK=y
1256# CONFIG_DEBUG_FS is not set 1238# CONFIG_DEBUG_FS is not set
1257# CONFIG_HEADERS_CHECK is not set 1239# CONFIG_HEADERS_CHECK is not set
1258# CONFIG_DEBUG_KERNEL is not set 1240# CONFIG_DEBUG_KERNEL is not set
1259CONFIG_LOG_BUF_SHIFT=14
1260# CONFIG_DEBUG_BUGVERBOSE is not set 1241# CONFIG_DEBUG_BUGVERBOSE is not set
1261# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set 1242# CONFIG_DEBUG_MMRS is not set
1262# CONFIG_DEBUG_HUNT_FOR_ZERO is not set 1243# CONFIG_DEBUG_HUNT_FOR_ZERO is not set
1244CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1245CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1246# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1247# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1248CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1249# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1263# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set 1250# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1251# CONFIG_EARLY_PRINTK is not set
1264# CONFIG_CPLB_INFO is not set 1252# CONFIG_CPLB_INFO is not set
1265# CONFIG_ACCESS_CHECK is not set 1253# CONFIG_ACCESS_CHECK is not set
1266 1254
@@ -1283,9 +1271,11 @@ CONFIG_SECURITY_CAPABILITIES=y
1283CONFIG_BITREVERSE=y 1271CONFIG_BITREVERSE=y
1284CONFIG_CRC_CCITT=m 1272CONFIG_CRC_CCITT=m
1285# CONFIG_CRC16 is not set 1273# CONFIG_CRC16 is not set
1274# CONFIG_CRC_ITU_T is not set
1286CONFIG_CRC32=y 1275CONFIG_CRC32=y
1287# CONFIG_LIBCRC32C is not set 1276# CONFIG_LIBCRC32C is not set
1288CONFIG_ZLIB_INFLATE=y 1277CONFIG_ZLIB_INFLATE=y
1289CONFIG_PLIST=y 1278CONFIG_PLIST=y
1290CONFIG_HAS_IOMEM=y 1279CONFIG_HAS_IOMEM=y
1291CONFIG_HAS_IOPORT=y 1280CONFIG_HAS_IOPORT=y
1281CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index f429ebc3a961..8aeb6066b19b 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,11 +7,10 @@ extra-y := init_task.o vmlinux.lds
7obj-y := \ 7obj-y := \
8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ 8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
9 sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ 9 sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
10 fixed_code.o cplbinit.o cacheinit.o 10 fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o
11 11
12obj-$(CONFIG_BF53x) += bfin_gpio.o
13obj-$(CONFIG_BF561) += bfin_gpio.o
14obj-$(CONFIG_MODULES) += module.o 12obj-$(CONFIG_MODULES) += module.o
15obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o 13obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
16obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o 14obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o
17obj-$(CONFIG_KGDB) += kgdb.o 15obj-$(CONFIG_KGDB) += kgdb.o
16obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 7cf02f02a1db..e19164fb4cd1 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -73,6 +73,11 @@ static int __init blackfin_dma_init(void)
73 /* Mark MEMDMA Channel 0 as requested since we're using it internally */ 73 /* Mark MEMDMA Channel 0 as requested since we're using it internally */
74 dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED; 74 dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED;
75 dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED; 75 dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED;
76
77#if defined(CONFIG_DEB_DMA_URGENT)
78 bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE()
79 | DEB1_URGENT | DEB2_URGENT | DEB3_URGENT);
80#endif
76 return 0; 81 return 0;
77} 82}
78 83
@@ -265,10 +270,23 @@ void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
265 270
266 dma_ch[channel].regs->next_desc_ptr = addr; 271 dma_ch[channel].regs->next_desc_ptr = addr;
267 SSYNC(); 272 SSYNC();
268 pr_debug("set_dma_start_addr() : END\n"); 273 pr_debug("set_dma_next_desc_addr() : END\n");
269} 274}
270EXPORT_SYMBOL(set_dma_next_desc_addr); 275EXPORT_SYMBOL(set_dma_next_desc_addr);
271 276
277void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
278{
279 pr_debug("set_dma_curr_desc_addr() : BEGIN \n");
280
281 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
282 && channel < MAX_BLACKFIN_DMA_CHANNEL));
283
284 dma_ch[channel].regs->curr_desc_ptr = addr;
285 SSYNC();
286 pr_debug("set_dma_curr_desc_addr() : END\n");
287}
288EXPORT_SYMBOL(set_dma_curr_desc_addr);
289
272void set_dma_x_count(unsigned int channel, unsigned short x_count) 290void set_dma_x_count(unsigned int channel, unsigned short x_count)
273{ 291{
274 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE 292 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
@@ -345,6 +363,16 @@ void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
345} 363}
346EXPORT_SYMBOL(set_dma_sg); 364EXPORT_SYMBOL(set_dma_sg);
347 365
366void set_dma_curr_addr(unsigned int channel, unsigned long addr)
367{
368 BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
369 && channel < MAX_BLACKFIN_DMA_CHANNEL));
370
371 dma_ch[channel].regs->curr_addr_ptr = addr;
372 SSYNC();
373}
374EXPORT_SYMBOL(set_dma_curr_addr);
375
348/*------------------------------------------------------------------------------ 376/*------------------------------------------------------------------------------
349 * Get the DMA status of a specific DMA channel from the system. 377 * Get the DMA status of a specific DMA channel from the system.
350 *-----------------------------------------------------------------------------*/ 378 *-----------------------------------------------------------------------------*/
@@ -408,6 +436,10 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
408 blackfin_dcache_flush_range((unsigned int)src, 436 blackfin_dcache_flush_range((unsigned int)src,
409 (unsigned int)(src + size)); 437 (unsigned int)(src + size));
410 438
439 if ((unsigned long)dest < memory_end)
440 blackfin_dcache_invalidate_range((unsigned int)dest,
441 (unsigned int)(dest + size));
442
411 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); 443 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
412 444
413 if ((unsigned long)src < (unsigned long)dest) 445 if ((unsigned long)src < (unsigned long)dest)
@@ -515,6 +547,8 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
515 } 547 }
516 } 548 }
517 549
550 SSYNC();
551
518 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) 552 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
519 ; 553 ;
520 554
@@ -524,9 +558,6 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
524 bfin_write_MDMA_S0_CONFIG(0); 558 bfin_write_MDMA_S0_CONFIG(0);
525 bfin_write_MDMA_D0_CONFIG(0); 559 bfin_write_MDMA_D0_CONFIG(0);
526 560
527 if ((unsigned long)dest < memory_end)
528 blackfin_dcache_invalidate_range((unsigned int)dest,
529 (unsigned int)(dest + size));
530 local_irq_restore(flags); 561 local_irq_restore(flags);
531 562
532 return dest; 563 return dest;
@@ -555,13 +586,14 @@ void *safe_dma_memcpy(void *dest, const void *src, size_t size)
555} 586}
556EXPORT_SYMBOL(safe_dma_memcpy); 587EXPORT_SYMBOL(safe_dma_memcpy);
557 588
558void dma_outsb(void __iomem *addr, const void *buf, unsigned short len) 589void dma_outsb(unsigned long addr, const void *buf, unsigned short len)
559{ 590{
560 unsigned long flags; 591 unsigned long flags;
561 592
562 local_irq_save(flags); 593 local_irq_save(flags);
563 594
564 blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); 595 blackfin_dcache_flush_range((unsigned int)buf,
596 (unsigned int)(buf) + len);
565 597
566 bfin_write_MDMA_D0_START_ADDR(addr); 598 bfin_write_MDMA_D0_START_ADDR(addr);
567 bfin_write_MDMA_D0_X_COUNT(len); 599 bfin_write_MDMA_D0_X_COUNT(len);
@@ -576,6 +608,8 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
576 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); 608 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
577 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); 609 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
578 610
611 SSYNC();
612
579 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 613 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
580 614
581 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); 615 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -588,10 +622,13 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
588EXPORT_SYMBOL(dma_outsb); 622EXPORT_SYMBOL(dma_outsb);
589 623
590 624
591void dma_insb(const void __iomem *addr, void *buf, unsigned short len) 625void dma_insb(unsigned long addr, void *buf, unsigned short len)
592{ 626{
593 unsigned long flags; 627 unsigned long flags;
594 628
629 blackfin_dcache_invalidate_range((unsigned int)buf,
630 (unsigned int)(buf) + len);
631
595 local_irq_save(flags); 632 local_irq_save(flags);
596 bfin_write_MDMA_D0_START_ADDR(buf); 633 bfin_write_MDMA_D0_START_ADDR(buf);
597 bfin_write_MDMA_D0_X_COUNT(len); 634 bfin_write_MDMA_D0_X_COUNT(len);
@@ -606,7 +643,7 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
606 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); 643 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
607 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); 644 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
608 645
609 blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); 646 SSYNC();
610 647
611 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 648 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
612 649
@@ -619,13 +656,14 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
619} 656}
620EXPORT_SYMBOL(dma_insb); 657EXPORT_SYMBOL(dma_insb);
621 658
622void dma_outsw(void __iomem *addr, const void *buf, unsigned short len) 659void dma_outsw(unsigned long addr, const void *buf, unsigned short len)
623{ 660{
624 unsigned long flags; 661 unsigned long flags;
625 662
626 local_irq_save(flags); 663 local_irq_save(flags);
627 664
628 blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); 665 blackfin_dcache_flush_range((unsigned int)buf,
666 (unsigned int)(buf) + len * sizeof(short));
629 667
630 bfin_write_MDMA_D0_START_ADDR(addr); 668 bfin_write_MDMA_D0_START_ADDR(addr);
631 bfin_write_MDMA_D0_X_COUNT(len); 669 bfin_write_MDMA_D0_X_COUNT(len);
@@ -640,6 +678,8 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len)
640 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); 678 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
641 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); 679 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
642 680
681 SSYNC();
682
643 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 683 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
644 684
645 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); 685 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -651,10 +691,13 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len)
651} 691}
652EXPORT_SYMBOL(dma_outsw); 692EXPORT_SYMBOL(dma_outsw);
653 693
654void dma_insw(const void __iomem *addr, void *buf, unsigned short len) 694void dma_insw(unsigned long addr, void *buf, unsigned short len)
655{ 695{
656 unsigned long flags; 696 unsigned long flags;
657 697
698 blackfin_dcache_invalidate_range((unsigned int)buf,
699 (unsigned int)(buf) + len * sizeof(short));
700
658 local_irq_save(flags); 701 local_irq_save(flags);
659 702
660 bfin_write_MDMA_D0_START_ADDR(buf); 703 bfin_write_MDMA_D0_START_ADDR(buf);
@@ -670,7 +713,7 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
670 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); 713 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
671 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); 714 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
672 715
673 blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); 716 SSYNC();
674 717
675 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 718 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
676 719
@@ -683,13 +726,14 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
683} 726}
684EXPORT_SYMBOL(dma_insw); 727EXPORT_SYMBOL(dma_insw);
685 728
686void dma_outsl(void __iomem *addr, const void *buf, unsigned short len) 729void dma_outsl(unsigned long addr, const void *buf, unsigned short len)
687{ 730{
688 unsigned long flags; 731 unsigned long flags;
689 732
690 local_irq_save(flags); 733 local_irq_save(flags);
691 734
692 blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); 735 blackfin_dcache_flush_range((unsigned int)buf,
736 (unsigned int)(buf) + len * sizeof(long));
693 737
694 bfin_write_MDMA_D0_START_ADDR(addr); 738 bfin_write_MDMA_D0_START_ADDR(addr);
695 bfin_write_MDMA_D0_X_COUNT(len); 739 bfin_write_MDMA_D0_X_COUNT(len);
@@ -704,6 +748,8 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
704 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); 748 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
705 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); 749 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
706 750
751 SSYNC();
752
707 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 753 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
708 754
709 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); 755 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -715,10 +761,13 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
715} 761}
716EXPORT_SYMBOL(dma_outsl); 762EXPORT_SYMBOL(dma_outsl);
717 763
718void dma_insl(const void __iomem *addr, void *buf, unsigned short len) 764void dma_insl(unsigned long addr, void *buf, unsigned short len)
719{ 765{
720 unsigned long flags; 766 unsigned long flags;
721 767
768 blackfin_dcache_invalidate_range((unsigned int)buf,
769 (unsigned int)(buf) + len * sizeof(long));
770
722 local_irq_save(flags); 771 local_irq_save(flags);
723 772
724 bfin_write_MDMA_D0_START_ADDR(buf); 773 bfin_write_MDMA_D0_START_ADDR(buf);
@@ -734,7 +783,7 @@ void dma_insl(const void __iomem *addr, void *buf, unsigned short len)
734 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); 783 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
735 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); 784 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
736 785
737 blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); 786 SSYNC();
738 787
739 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); 788 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
740 789
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 5d488ef965ce..3fe0cd49e8db 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -7,7 +7,7 @@
7 * Description: GPIO Abstraction Layer 7 * Description: GPIO Abstraction Layer
8 * 8 *
9 * Modified: 9 * Modified:
10 * Copyright 2006 Analog Devices Inc. 10 * Copyright 2007 Analog Devices Inc.
11 * 11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 * 13 *
@@ -28,9 +28,9 @@
28 */ 28 */
29 29
30/* 30/*
31* Number BF537/6/4 BF561 BF533/2/1 31* Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
32* 32*
33* GPIO_0 PF0 PF0 PF0 33* GPIO_0 PF0 PF0 PF0 PA0...PJ13
34* GPIO_1 PF1 PF1 PF1 34* GPIO_1 PF1 PF1 PF1
35* GPIO_2 PF2 PF2 PF2 35* GPIO_2 PF2 PF2 PF2
36* GPIO_3 PF3 PF3 PF3 36* GPIO_3 PF3 PF3 PF3
@@ -80,6 +80,7 @@
80* GPIO_47 PH15 PF47 80* GPIO_47 PH15 PF47
81*/ 81*/
82 82
83#include <linux/delay.h>
83#include <linux/module.h> 84#include <linux/module.h>
84#include <linux/err.h> 85#include <linux/err.h>
85#include <asm/blackfin.h> 86#include <asm/blackfin.h>
@@ -87,6 +88,36 @@
87#include <asm/portmux.h> 88#include <asm/portmux.h>
88#include <linux/irq.h> 89#include <linux/irq.h>
89 90
91#if ANOMALY_05000311 || ANOMALY_05000323
92enum {
93 AWA_data = SYSCR,
94 AWA_data_clear = SYSCR,
95 AWA_data_set = SYSCR,
96 AWA_toggle = SYSCR,
97 AWA_maska = UART_SCR,
98 AWA_maska_clear = UART_SCR,
99 AWA_maska_set = UART_SCR,
100 AWA_maska_toggle = UART_SCR,
101 AWA_maskb = UART_GCTL,
102 AWA_maskb_clear = UART_GCTL,
103 AWA_maskb_set = UART_GCTL,
104 AWA_maskb_toggle = UART_GCTL,
105 AWA_dir = SPORT1_STAT,
106 AWA_polar = SPORT1_STAT,
107 AWA_edge = SPORT1_STAT,
108 AWA_both = SPORT1_STAT,
109#if ANOMALY_05000311
110 AWA_inen = TIMER_ENABLE,
111#elif ANOMALY_05000323
112 AWA_inen = DMA1_1_CONFIG,
113#endif
114};
115 /* Anomaly Workaround */
116#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
117#else
118#define AWA_DUMMY_READ(...) do { } while (0)
119#endif
120
90#ifdef BF533_FAMILY 121#ifdef BF533_FAMILY
91static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { 122static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
92 (struct gpio_port_t *) FIO_FLAG_D, 123 (struct gpio_port_t *) FIO_FLAG_D,
@@ -116,11 +147,31 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
116}; 147};
117#endif 148#endif
118 149
150#ifdef BF548_FAMILY
151static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
152 (struct gpio_port_t *)PORTA_FER,
153 (struct gpio_port_t *)PORTB_FER,
154 (struct gpio_port_t *)PORTC_FER,
155 (struct gpio_port_t *)PORTD_FER,
156 (struct gpio_port_t *)PORTE_FER,
157 (struct gpio_port_t *)PORTF_FER,
158 (struct gpio_port_t *)PORTG_FER,
159 (struct gpio_port_t *)PORTH_FER,
160 (struct gpio_port_t *)PORTI_FER,
161 (struct gpio_port_t *)PORTJ_FER,
162};
163#endif
164
119static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; 165static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
120static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)]; 166static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
121char *str_ident = NULL;
122 167
123#define RESOURCE_LABEL_SIZE 16 168#define MAX_RESOURCES 256
169#define RESOURCE_LABEL_SIZE 16
170
171struct str_ident {
172 char name[RESOURCE_LABEL_SIZE];
173} *str_ident;
174
124 175
125#ifdef CONFIG_PM 176#ifdef CONFIG_PM
126static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)]; 177static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
@@ -141,21 +192,32 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INT
141 192
142#endif /* CONFIG_PM */ 193#endif /* CONFIG_PM */
143 194
195#if defined(BF548_FAMILY)
196inline int check_gpio(unsigned short gpio)
197{
198 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
199 || gpio == GPIO_PH14 || gpio == GPIO_PH15
200 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
201 || gpio > MAX_BLACKFIN_GPIOS)
202 return -EINVAL;
203 return 0;
204}
205#else
144inline int check_gpio(unsigned short gpio) 206inline int check_gpio(unsigned short gpio)
145{ 207{
146 if (gpio >= MAX_BLACKFIN_GPIOS) 208 if (gpio >= MAX_BLACKFIN_GPIOS)
147 return -EINVAL; 209 return -EINVAL;
148 return 0; 210 return 0;
149} 211}
212#endif
150 213
151static void set_label(unsigned short ident, const char *label) 214static void set_label(unsigned short ident, const char *label)
152{ 215{
153 216
154 if (label && str_ident) { 217 if (label && str_ident) {
155 strncpy(str_ident + ident * RESOURCE_LABEL_SIZE, label, 218 strncpy(str_ident[ident].name, label,
156 RESOURCE_LABEL_SIZE); 219 RESOURCE_LABEL_SIZE);
157 str_ident[ident * RESOURCE_LABEL_SIZE + 220 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
158 RESOURCE_LABEL_SIZE - 1] = 0;
159 } 221 }
160} 222}
161 223
@@ -164,14 +226,13 @@ static char *get_label(unsigned short ident)
164 if (!str_ident) 226 if (!str_ident)
165 return "UNKNOWN"; 227 return "UNKNOWN";
166 228
167 return (str_ident[ident * RESOURCE_LABEL_SIZE] ? 229 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
168 (str_ident + ident * RESOURCE_LABEL_SIZE) : "UNKNOWN");
169} 230}
170 231
171static int cmp_label(unsigned short ident, const char *label) 232static int cmp_label(unsigned short ident, const char *label)
172{ 233{
173 if (label && str_ident) 234 if (label && str_ident)
174 return strncmp(str_ident + ident * RESOURCE_LABEL_SIZE, 235 return strncmp(str_ident[ident].name,
175 label, strlen(label)); 236 label, strlen(label));
176 else 237 else
177 return -EINVAL; 238 return -EINVAL;
@@ -181,50 +242,84 @@ static int cmp_label(unsigned short ident, const char *label)
181static void port_setup(unsigned short gpio, unsigned short usage) 242static void port_setup(unsigned short gpio, unsigned short usage)
182{ 243{
183 if (!check_gpio(gpio)) { 244 if (!check_gpio(gpio)) {
184 if (usage == GPIO_USAGE) { 245 if (usage == GPIO_USAGE)
185 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); 246 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
186 } else 247 else
187 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); 248 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
188 SSYNC(); 249 SSYNC();
189 } 250 }
190} 251}
252#elif defined(BF548_FAMILY)
253static void port_setup(unsigned short gpio, unsigned short usage)
254{
255 if (usage == GPIO_USAGE)
256 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
257 else
258 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
259 SSYNC();
260}
191#else 261#else
192# define port_setup(...) do { } while (0) 262# define port_setup(...) do { } while (0)
193#endif 263#endif
194 264
195#ifdef BF537_FAMILY 265#ifdef BF537_FAMILY
196 266static struct {
197#define PMUX_LUT_RES 0 267 unsigned short res;
198#define PMUX_LUT_OFFSET 1 268 unsigned short offset;
199#define PMUX_LUT_ENTRIES 41 269} port_mux_lut[] = {
200#define PMUX_LUT_SIZE 2 270 {.res = P_PPI0_D13, .offset = 11},
201 271 {.res = P_PPI0_D14, .offset = 11},
202static unsigned short port_mux_lut[PMUX_LUT_ENTRIES][PMUX_LUT_SIZE] = { 272 {.res = P_PPI0_D15, .offset = 11},
203 {P_PPI0_D13, 11}, {P_PPI0_D14, 11}, {P_PPI0_D15, 11}, 273 {.res = P_SPORT1_TFS, .offset = 11},
204 {P_SPORT1_TFS, 11}, {P_SPORT1_TSCLK, 11}, {P_SPORT1_DTPRI, 11}, 274 {.res = P_SPORT1_TSCLK, .offset = 11},
205 {P_PPI0_D10, 10}, {P_PPI0_D11, 10}, {P_PPI0_D12, 10}, 275 {.res = P_SPORT1_DTPRI, .offset = 11},
206 {P_SPORT1_RSCLK, 10}, {P_SPORT1_RFS, 10}, {P_SPORT1_DRPRI, 10}, 276 {.res = P_PPI0_D10, .offset = 10},
207 {P_PPI0_D8, 9}, {P_PPI0_D9, 9}, {P_SPORT1_DRSEC, 9}, 277 {.res = P_PPI0_D11, .offset = 10},
208 {P_SPORT1_DTSEC, 9}, {P_TMR2, 8}, {P_PPI0_FS3, 8}, {P_TMR3, 7}, 278 {.res = P_PPI0_D12, .offset = 10},
209 {P_SPI0_SSEL4, 7}, {P_TMR4, 6}, {P_SPI0_SSEL5, 6}, {P_TMR5, 5}, 279 {.res = P_SPORT1_RSCLK, .offset = 10},
210 {P_SPI0_SSEL6, 5}, {P_UART1_RX, 4}, {P_UART1_TX, 4}, {P_TMR6, 4}, 280 {.res = P_SPORT1_RFS, .offset = 10},
211 {P_TMR7, 4}, {P_UART0_RX, 3}, {P_UART0_TX, 3}, {P_DMAR0, 3}, 281 {.res = P_SPORT1_DRPRI, .offset = 10},
212 {P_DMAR1, 3}, {P_SPORT0_DTSEC, 1}, {P_SPORT0_DRSEC, 1}, 282 {.res = P_PPI0_D8, .offset = 9},
213 {P_CAN0_RX, 1}, {P_CAN0_TX, 1}, {P_SPI0_SSEL7, 1}, 283 {.res = P_PPI0_D9, .offset = 9},
214 {P_SPORT0_TFS, 0}, {P_SPORT0_DTPRI, 0}, {P_SPI0_SSEL2, 0}, 284 {.res = P_SPORT1_DRSEC, .offset = 9},
215 {P_SPI0_SSEL3, 0} 285 {.res = P_SPORT1_DTSEC, .offset = 9},
286 {.res = P_TMR2, .offset = 8},
287 {.res = P_PPI0_FS3, .offset = 8},
288 {.res = P_TMR3, .offset = 7},
289 {.res = P_SPI0_SSEL4, .offset = 7},
290 {.res = P_TMR4, .offset = 6},
291 {.res = P_SPI0_SSEL5, .offset = 6},
292 {.res = P_TMR5, .offset = 5},
293 {.res = P_SPI0_SSEL6, .offset = 5},
294 {.res = P_UART1_RX, .offset = 4},
295 {.res = P_UART1_TX, .offset = 4},
296 {.res = P_TMR6, .offset = 4},
297 {.res = P_TMR7, .offset = 4},
298 {.res = P_UART0_RX, .offset = 3},
299 {.res = P_UART0_TX, .offset = 3},
300 {.res = P_DMAR0, .offset = 3},
301 {.res = P_DMAR1, .offset = 3},
302 {.res = P_SPORT0_DTSEC, .offset = 1},
303 {.res = P_SPORT0_DRSEC, .offset = 1},
304 {.res = P_CAN0_RX, .offset = 1},
305 {.res = P_CAN0_TX, .offset = 1},
306 {.res = P_SPI0_SSEL7, .offset = 1},
307 {.res = P_SPORT0_TFS, .offset = 0},
308 {.res = P_SPORT0_DTPRI, .offset = 0},
309 {.res = P_SPI0_SSEL2, .offset = 0},
310 {.res = P_SPI0_SSEL3, .offset = 0},
216}; 311};
217 312
218static void portmux_setup(unsigned short per, unsigned short function) 313static void portmux_setup(unsigned short per, unsigned short function)
219{ 314{
220 u16 y, muxreg, offset; 315 u16 y, offset, muxreg;
221 316
222 for (y = 0; y < PMUX_LUT_ENTRIES; y++) { 317 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
223 if (port_mux_lut[y][PMUX_LUT_RES] == per) { 318 if (port_mux_lut[y].res == per) {
224 319
225 /* SET PORTMUX REG */ 320 /* SET PORTMUX REG */
226 321
227 offset = port_mux_lut[y][PMUX_LUT_OFFSET]; 322 offset = port_mux_lut[y].offset;
228 muxreg = bfin_read_PORT_MUX(); 323 muxreg = bfin_read_PORT_MUX();
229 324
230 if (offset != 1) { 325 if (offset != 1) {
@@ -238,18 +333,42 @@ static void portmux_setup(unsigned short per, unsigned short function)
238 } 333 }
239 } 334 }
240} 335}
336#elif defined(BF548_FAMILY)
337inline void portmux_setup(unsigned short portno, unsigned short function)
338{
339 u32 pmux;
340
341 pmux = gpio_array[gpio_bank(portno)]->port_mux;
342
343 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
344 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
241 345
346 gpio_array[gpio_bank(portno)]->port_mux = pmux;
347}
348
349inline u16 get_portmux(unsigned short portno)
350{
351 u32 pmux;
352
353 pmux = gpio_array[gpio_bank(portno)]->port_mux;
354
355 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
356}
242#else 357#else
243# define portmux_setup(...) do { } while (0) 358# define portmux_setup(...) do { } while (0)
244#endif 359#endif
245 360
361#ifndef BF548_FAMILY
246static void default_gpio(unsigned short gpio) 362static void default_gpio(unsigned short gpio)
247{ 363{
248 unsigned short bank, bitmask; 364 unsigned short bank, bitmask;
365 unsigned long flags;
249 366
250 bank = gpio_bank(gpio); 367 bank = gpio_bank(gpio);
251 bitmask = gpio_bit(gpio); 368 bitmask = gpio_bit(gpio);
252 369
370 local_irq_save(flags);
371
253 gpio_bankb[bank]->maska_clear = bitmask; 372 gpio_bankb[bank]->maska_clear = bitmask;
254 gpio_bankb[bank]->maskb_clear = bitmask; 373 gpio_bankb[bank]->maskb_clear = bitmask;
255 SSYNC(); 374 SSYNC();
@@ -258,24 +377,32 @@ static void default_gpio(unsigned short gpio)
258 gpio_bankb[bank]->polar &= ~bitmask; 377 gpio_bankb[bank]->polar &= ~bitmask;
259 gpio_bankb[bank]->both &= ~bitmask; 378 gpio_bankb[bank]->both &= ~bitmask;
260 gpio_bankb[bank]->edge &= ~bitmask; 379 gpio_bankb[bank]->edge &= ~bitmask;
380 AWA_DUMMY_READ(edge);
381 local_irq_restore(flags);
382
261} 383}
384#else
385# define default_gpio(...) do { } while (0)
386#endif
262 387
263static int __init bfin_gpio_init(void) 388static int __init bfin_gpio_init(void)
264{ 389{
265 390 str_ident = kcalloc(MAX_RESOURCES,
266 str_ident = kzalloc(RESOURCE_LABEL_SIZE * 256, GFP_KERNEL); 391 sizeof(struct str_ident), GFP_KERNEL);
267 if (!str_ident) 392 if (str_ident == NULL)
268 return -ENOMEM; 393 return -ENOMEM;
269 394
395 memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
396
270 printk(KERN_INFO "Blackfin GPIO Controller\n"); 397 printk(KERN_INFO "Blackfin GPIO Controller\n");
271 398
272 return 0; 399 return 0;
273 400
274} 401}
275
276arch_initcall(bfin_gpio_init); 402arch_initcall(bfin_gpio_init);
277 403
278 404
405#ifndef BF548_FAMILY
279/*********************************************************** 406/***********************************************************
280* 407*
281* FUNCTIONS: Blackfin General Purpose Ports Access Functions 408* FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -305,6 +432,7 @@ void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
305 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \ 432 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
306 else \ 433 else \
307 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \ 434 gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
435 AWA_DUMMY_READ(name); \
308 local_irq_restore(flags); \ 436 local_irq_restore(flags); \
309} \ 437} \
310EXPORT_SYMBOL(set_gpio_ ## name); 438EXPORT_SYMBOL(set_gpio_ ## name);
@@ -316,6 +444,22 @@ SET_GPIO(edge)
316SET_GPIO(both) 444SET_GPIO(both)
317 445
318 446
447#if ANOMALY_05000311 || ANOMALY_05000323
448#define SET_GPIO_SC(name) \
449void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
450{ \
451 unsigned long flags; \
452 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
453 local_irq_save(flags); \
454 if (arg) \
455 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
456 else \
457 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
458 AWA_DUMMY_READ(name); \
459 local_irq_restore(flags); \
460} \
461EXPORT_SYMBOL(set_gpio_ ## name);
462#else
319#define SET_GPIO_SC(name) \ 463#define SET_GPIO_SC(name) \
320void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \ 464void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
321{ \ 465{ \
@@ -326,37 +470,20 @@ void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
326 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \ 470 gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
327} \ 471} \
328EXPORT_SYMBOL(set_gpio_ ## name); 472EXPORT_SYMBOL(set_gpio_ ## name);
473#endif
329 474
330SET_GPIO_SC(maska) 475SET_GPIO_SC(maska)
331SET_GPIO_SC(maskb) 476SET_GPIO_SC(maskb)
332
333#if defined(ANOMALY_05000311)
334void set_gpio_data(unsigned short gpio, unsigned short arg)
335{
336 unsigned long flags;
337 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
338 local_irq_save(flags);
339 if (arg)
340 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
341 else
342 gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
343 bfin_read_CHIPID();
344 local_irq_restore(flags);
345}
346EXPORT_SYMBOL(set_gpio_data);
347#else
348SET_GPIO_SC(data) 477SET_GPIO_SC(data)
349#endif
350
351 478
352#if defined(ANOMALY_05000311) 479#if ANOMALY_05000311 || ANOMALY_05000323
353void set_gpio_toggle(unsigned short gpio) 480void set_gpio_toggle(unsigned short gpio)
354{ 481{
355 unsigned long flags; 482 unsigned long flags;
356 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); 483 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
357 local_irq_save(flags); 484 local_irq_save(flags);
358 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio); 485 gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
359 bfin_read_CHIPID(); 486 AWA_DUMMY_READ(toggle);
360 local_irq_restore(flags); 487 local_irq_restore(flags);
361} 488}
362#else 489#else
@@ -371,13 +498,27 @@ EXPORT_SYMBOL(set_gpio_toggle);
371 498
372/*Set current PORT date (16-bit word)*/ 499/*Set current PORT date (16-bit word)*/
373 500
501#if ANOMALY_05000311 || ANOMALY_05000323
374#define SET_GPIO_P(name) \ 502#define SET_GPIO_P(name) \
375void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \ 503void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
376{ \ 504{ \
505 unsigned long flags; \
506 local_irq_save(flags); \
377 gpio_bankb[gpio_bank(gpio)]->name = arg; \ 507 gpio_bankb[gpio_bank(gpio)]->name = arg; \
508 AWA_DUMMY_READ(name); \
509 local_irq_restore(flags); \
378} \ 510} \
379EXPORT_SYMBOL(set_gpiop_ ## name); 511EXPORT_SYMBOL(set_gpiop_ ## name);
512#else
513#define SET_GPIO_P(name) \
514void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
515{ \
516 gpio_bankb[gpio_bank(gpio)]->name = arg; \
517} \
518EXPORT_SYMBOL(set_gpiop_ ## name);
519#endif
380 520
521SET_GPIO_P(data)
381SET_GPIO_P(dir) 522SET_GPIO_P(dir)
382SET_GPIO_P(inen) 523SET_GPIO_P(inen)
383SET_GPIO_P(polar) 524SET_GPIO_P(polar)
@@ -387,31 +528,30 @@ SET_GPIO_P(maska)
387SET_GPIO_P(maskb) 528SET_GPIO_P(maskb)
388 529
389 530
390#if defined(ANOMALY_05000311)
391void set_gpiop_data(unsigned short gpio, unsigned short arg)
392{
393 unsigned long flags;
394 local_irq_save(flags);
395 gpio_bankb[gpio_bank(gpio)]->data = arg;
396 bfin_read_CHIPID();
397 local_irq_restore(flags);
398}
399EXPORT_SYMBOL(set_gpiop_data);
400#else
401SET_GPIO_P(data)
402#endif
403
404
405
406/* Get a specific bit */ 531/* Get a specific bit */
407 532#if ANOMALY_05000311 || ANOMALY_05000323
533#define GET_GPIO(name) \
534unsigned short get_gpio_ ## name(unsigned short gpio) \
535{ \
536 unsigned long flags; \
537 unsigned short ret; \
538 local_irq_save(flags); \
539 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
540 AWA_DUMMY_READ(name); \
541 local_irq_restore(flags); \
542 return ret; \
543} \
544EXPORT_SYMBOL(get_gpio_ ## name);
545#else
408#define GET_GPIO(name) \ 546#define GET_GPIO(name) \
409unsigned short get_gpio_ ## name(unsigned short gpio) \ 547unsigned short get_gpio_ ## name(unsigned short gpio) \
410{ \ 548{ \
411 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \ 549 return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
412} \ 550} \
413EXPORT_SYMBOL(get_gpio_ ## name); 551EXPORT_SYMBOL(get_gpio_ ## name);
552#endif
414 553
554GET_GPIO(data)
415GET_GPIO(dir) 555GET_GPIO(dir)
416GET_GPIO(inen) 556GET_GPIO(inen)
417GET_GPIO(polar) 557GET_GPIO(polar)
@@ -420,33 +560,31 @@ GET_GPIO(both)
420GET_GPIO(maska) 560GET_GPIO(maska)
421GET_GPIO(maskb) 561GET_GPIO(maskb)
422 562
423
424#if defined(ANOMALY_05000311)
425unsigned short get_gpio_data(unsigned short gpio)
426{
427 unsigned long flags;
428 unsigned short ret;
429 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
430 local_irq_save(flags);
431 ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->data >> gpio_sub_n(gpio));
432 bfin_read_CHIPID();
433 local_irq_restore(flags);
434 return ret;
435}
436EXPORT_SYMBOL(get_gpio_data);
437#else
438GET_GPIO(data)
439#endif
440
441/*Get current PORT date (16-bit word)*/ 563/*Get current PORT date (16-bit word)*/
442 564
565#if ANOMALY_05000311 || ANOMALY_05000323
566#define GET_GPIO_P(name) \
567unsigned short get_gpiop_ ## name(unsigned short gpio) \
568{ \
569 unsigned long flags; \
570 unsigned short ret; \
571 local_irq_save(flags); \
572 ret = (gpio_bankb[gpio_bank(gpio)]->name); \
573 AWA_DUMMY_READ(name); \
574 local_irq_restore(flags); \
575 return ret; \
576} \
577EXPORT_SYMBOL(get_gpiop_ ## name);
578#else
443#define GET_GPIO_P(name) \ 579#define GET_GPIO_P(name) \
444unsigned short get_gpiop_ ## name(unsigned short gpio) \ 580unsigned short get_gpiop_ ## name(unsigned short gpio) \
445{ \ 581{ \
446 return (gpio_bankb[gpio_bank(gpio)]->name);\ 582 return (gpio_bankb[gpio_bank(gpio)]->name);\
447} \ 583} \
448EXPORT_SYMBOL(get_gpiop_ ## name); 584EXPORT_SYMBOL(get_gpiop_ ## name);
585#endif
449 586
587GET_GPIO_P(data)
450GET_GPIO_P(dir) 588GET_GPIO_P(dir)
451GET_GPIO_P(inen) 589GET_GPIO_P(inen)
452GET_GPIO_P(polar) 590GET_GPIO_P(polar)
@@ -455,21 +593,6 @@ GET_GPIO_P(both)
455GET_GPIO_P(maska) 593GET_GPIO_P(maska)
456GET_GPIO_P(maskb) 594GET_GPIO_P(maskb)
457 595
458#if defined(ANOMALY_05000311)
459unsigned short get_gpiop_data(unsigned short gpio)
460{
461 unsigned long flags;
462 unsigned short ret;
463 local_irq_save(flags);
464 ret = gpio_bankb[gpio_bank(gpio)]->data;
465 bfin_read_CHIPID();
466 local_irq_restore(flags);
467 return ret;
468}
469EXPORT_SYMBOL(get_gpiop_data);
470#else
471GET_GPIO_P(data)
472#endif
473 596
474#ifdef CONFIG_PM 597#ifdef CONFIG_PM
475/*********************************************************** 598/***********************************************************
@@ -593,6 +716,8 @@ u32 gpio_pm_setup(void)
593 } 716 }
594 } 717 }
595 718
719 AWA_DUMMY_READ(maskb_set);
720
596 if (sic_iwr) 721 if (sic_iwr)
597 return sic_iwr; 722 return sic_iwr;
598 else 723 else
@@ -624,12 +749,99 @@ void gpio_pm_restore(void)
624 749
625 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb; 750 gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
626 } 751 }
752 AWA_DUMMY_READ(maskb);
627} 753}
628 754
629#endif 755#endif
756#endif /* BF548_FAMILY */
630 757
758/***********************************************************
759*
760* FUNCTIONS: Blackfin Peripheral Resource Allocation
761* and PortMux Setup
762*
763* INPUTS/OUTPUTS:
764* per Peripheral Identifier
765* label String
766*
767* DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
768*
769* CAUTION:
770*************************************************************
771* MODIFICATION HISTORY :
772**************************************************************/
773
774#ifdef BF548_FAMILY
775int peripheral_request(unsigned short per, const char *label)
776{
777 unsigned long flags;
778 unsigned short ident = P_IDENT(per);
779
780 /*
781 * Don't cares are pins with only one dedicated function
782 */
783
784 if (per & P_DONTCARE)
785 return 0;
786
787 if (!(per & P_DEFINED))
788 return -ENODEV;
789
790 if (check_gpio(ident) < 0)
791 return -EINVAL;
792
793 local_irq_save(flags);
794
795 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
796 printk(KERN_ERR
797 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
798 __FUNCTION__, ident, get_label(ident));
799 dump_stack();
800 local_irq_restore(flags);
801 return -EBUSY;
802 }
803
804 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
805
806 u16 funct = get_portmux(ident);
807
808 /*
809 * Pin functions like AMC address strobes my
810 * be requested and used by several drivers
811 */
812
813 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
814
815 /*
816 * Allow that the identical pin function can
817 * be requested from the same driver twice
818 */
819
820 if (cmp_label(ident, label) == 0)
821 goto anyway;
631 822
823 printk(KERN_ERR
824 "%s: Peripheral %d function %d is already reserved by %s !\n",
825 __FUNCTION__, ident, P_FUNCT2MUX(per), get_label(ident));
826 dump_stack();
827 local_irq_restore(flags);
828 return -EBUSY;
829 }
830 }
632 831
832anyway:
833 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
834
835 portmux_setup(ident, P_FUNCT2MUX(per));
836 port_setup(ident, PERIPHERAL_USAGE);
837
838 local_irq_restore(flags);
839 set_label(ident, label);
840
841 return 0;
842}
843EXPORT_SYMBOL(peripheral_request);
844#else
633 845
634int peripheral_request(unsigned short per, const char *label) 846int peripheral_request(unsigned short per, const char *label)
635{ 847{
@@ -680,7 +892,7 @@ int peripheral_request(unsigned short per, const char *label)
680 892
681 printk(KERN_ERR 893 printk(KERN_ERR
682 "%s: Peripheral %d function %d is already" 894 "%s: Peripheral %d function %d is already"
683 "reserved by %s !\n", 895 " reserved by %s !\n",
684 __FUNCTION__, ident, P_FUNCT2MUX(per), 896 __FUNCTION__, ident, P_FUNCT2MUX(per),
685 get_label(ident)); 897 get_label(ident));
686 dump_stack(); 898 dump_stack();
@@ -691,8 +903,6 @@ int peripheral_request(unsigned short per, const char *label)
691 } 903 }
692 904
693anyway: 905anyway:
694
695
696 portmux_setup(per, P_FUNCT2MUX(per)); 906 portmux_setup(per, P_FUNCT2MUX(per));
697 907
698 port_setup(ident, PERIPHERAL_USAGE); 908 port_setup(ident, PERIPHERAL_USAGE);
@@ -704,6 +914,7 @@ anyway:
704 return 0; 914 return 0;
705} 915}
706EXPORT_SYMBOL(peripheral_request); 916EXPORT_SYMBOL(peripheral_request);
917#endif
707 918
708int peripheral_request_list(unsigned short per[], const char *label) 919int peripheral_request_list(unsigned short per[], const char *label)
709{ 920{
@@ -711,9 +922,15 @@ int peripheral_request_list(unsigned short per[], const char *label)
711 int ret; 922 int ret;
712 923
713 for (cnt = 0; per[cnt] != 0; cnt++) { 924 for (cnt = 0; per[cnt] != 0; cnt++) {
925
714 ret = peripheral_request(per[cnt], label); 926 ret = peripheral_request(per[cnt], label);
715 if (ret < 0) 927
716 return ret; 928 if (ret < 0) {
929 for ( ; cnt > 0; cnt--) {
930 peripheral_free(per[cnt - 1]);
931 }
932 return ret;
933 }
717 } 934 }
718 935
719 return 0; 936 return 0;
@@ -748,6 +965,8 @@ void peripheral_free(unsigned short per)
748 965
749 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident); 966 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
750 967
968 set_label(ident, "free");
969
751 local_irq_restore(flags); 970 local_irq_restore(flags);
752} 971}
753EXPORT_SYMBOL(peripheral_free); 972EXPORT_SYMBOL(peripheral_free);
@@ -768,8 +987,8 @@ EXPORT_SYMBOL(peripheral_free_list);
768* FUNCTIONS: Blackfin GPIO Driver 987* FUNCTIONS: Blackfin GPIO Driver
769* 988*
770* INPUTS/OUTPUTS: 989* INPUTS/OUTPUTS:
771* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS 990* gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
772* 991* label String
773* 992*
774* DESCRIPTION: Blackfin GPIO Driver API 993* DESCRIPTION: Blackfin GPIO Driver API
775* 994*
@@ -787,17 +1006,39 @@ int gpio_request(unsigned short gpio, const char *label)
787 1006
788 local_irq_save(flags); 1007 local_irq_save(flags);
789 1008
1009 /*
1010 * Allow that the identical GPIO can
1011 * be requested from the same driver twice
1012 * Do nothing and return -
1013 */
1014
1015 if (cmp_label(gpio, label) == 0) {
1016 local_irq_restore(flags);
1017 return 0;
1018 }
1019
790 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { 1020 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
791 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio); 1021 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1022 gpio, get_label(gpio));
792 dump_stack(); 1023 dump_stack();
793 local_irq_restore(flags); 1024 local_irq_restore(flags);
794 return -EBUSY; 1025 return -EBUSY;
795 } 1026 }
1027 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1028 printk(KERN_ERR
1029 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1030 gpio, get_label(gpio));
1031 dump_stack();
1032 local_irq_restore(flags);
1033 return -EBUSY;
1034 }
1035
796 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio); 1036 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
797 1037
798 local_irq_restore(flags); 1038 local_irq_restore(flags);
799 1039
800 port_setup(gpio, GPIO_USAGE); 1040 port_setup(gpio, GPIO_USAGE);
1041 set_label(gpio, label);
801 1042
802 return 0; 1043 return 0;
803} 1044}
@@ -823,10 +1064,57 @@ void gpio_free(unsigned short gpio)
823 1064
824 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio); 1065 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
825 1066
1067 set_label(gpio, "free");
1068
826 local_irq_restore(flags); 1069 local_irq_restore(flags);
827} 1070}
828EXPORT_SYMBOL(gpio_free); 1071EXPORT_SYMBOL(gpio_free);
829 1072
1073#ifdef BF548_FAMILY
1074void gpio_direction_input(unsigned short gpio)
1075{
1076 unsigned long flags;
1077
1078 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1079
1080 local_irq_save(flags);
1081 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
1082 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
1083 local_irq_restore(flags);
1084}
1085EXPORT_SYMBOL(gpio_direction_input);
1086
1087void gpio_direction_output(unsigned short gpio)
1088{
1089 unsigned long flags;
1090
1091 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
1092
1093 local_irq_save(flags);
1094 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
1095 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
1096 local_irq_restore(flags);
1097}
1098EXPORT_SYMBOL(gpio_direction_output);
1099
1100void gpio_set_value(unsigned short gpio, unsigned short arg)
1101{
1102 if (arg)
1103 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
1104 else
1105 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
1106
1107}
1108EXPORT_SYMBOL(gpio_set_value);
1109
1110unsigned short gpio_get_value(unsigned short gpio)
1111{
1112 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
1113}
1114EXPORT_SYMBOL(gpio_get_value);
1115
1116#else
1117
830void gpio_direction_input(unsigned short gpio) 1118void gpio_direction_input(unsigned short gpio)
831{ 1119{
832 unsigned long flags; 1120 unsigned long flags;
@@ -836,6 +1124,7 @@ void gpio_direction_input(unsigned short gpio)
836 local_irq_save(flags); 1124 local_irq_save(flags);
837 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); 1125 gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
838 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio); 1126 gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1127 AWA_DUMMY_READ(inen);
839 local_irq_restore(flags); 1128 local_irq_restore(flags);
840} 1129}
841EXPORT_SYMBOL(gpio_direction_input); 1130EXPORT_SYMBOL(gpio_direction_input);
@@ -849,6 +1138,28 @@ void gpio_direction_output(unsigned short gpio)
849 local_irq_save(flags); 1138 local_irq_save(flags);
850 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); 1139 gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
851 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio); 1140 gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1141 AWA_DUMMY_READ(dir);
852 local_irq_restore(flags); 1142 local_irq_restore(flags);
853} 1143}
854EXPORT_SYMBOL(gpio_direction_output); 1144EXPORT_SYMBOL(gpio_direction_output);
1145
1146/* If we are booting from SPI and our board lacks a strong enough pull up,
1147 * the core can reset and execute the bootrom faster than the resistor can
1148 * pull the signal logically high. To work around this (common) error in
1149 * board design, we explicitly set the pin back to GPIO mode, force /CS
1150 * high, and wait for the electrons to do their thing.
1151 *
1152 * This function only makes sense to be called from reset code, but it
1153 * lives here as we need to force all the GPIO states w/out going through
1154 * BUG() checks and such.
1155 */
1156void bfin_gpio_reset_spi0_ssel1(void)
1157{
1158 u16 gpio = P_IDENT(P_SPI0_SSEL1);
1159
1160 port_setup(gpio, GPIO_USAGE);
1161 gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1162 udelay(1);
1163}
1164
1165#endif /*BF548_FAMILY */
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c
index 70455949cfd2..2198afe40f33 100644
--- a/arch/blackfin/kernel/bfin_ksyms.c
+++ b/arch/blackfin/kernel/bfin_ksyms.c
@@ -60,6 +60,7 @@ EXPORT_SYMBOL(csum_partial_copy);
60 * their interface isn't gonna change any time soon now, so 60 * their interface isn't gonna change any time soon now, so
61 * it's OK to leave it out of version control. 61 * it's OK to leave it out of version control.
62 */ 62 */
63EXPORT_SYMBOL(strcpy);
63EXPORT_SYMBOL(memcpy); 64EXPORT_SYMBOL(memcpy);
64EXPORT_SYMBOL(memset); 65EXPORT_SYMBOL(memset);
65EXPORT_SYMBOL(memcmp); 66EXPORT_SYMBOL(memcmp);
diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cacheinit.c
index 4d41a40e8133..62cbba7364b0 100644
--- a/arch/blackfin/kernel/cacheinit.c
+++ b/arch/blackfin/kernel/cacheinit.c
@@ -21,9 +21,10 @@
21 21
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
23#include <asm/blackfin.h> 23#include <asm/blackfin.h>
24#include <asm/cplb.h>
24#include <asm/cplbinit.h> 25#include <asm/cplbinit.h>
25 26
26#if defined(CONFIG_BLKFIN_CACHE) 27#if defined(CONFIG_BFIN_ICACHE)
27void bfin_icache_init(void) 28void bfin_icache_init(void)
28{ 29{
29 unsigned long *table = icplb_table; 30 unsigned long *table = icplb_table;
@@ -44,7 +45,7 @@ void bfin_icache_init(void)
44} 45}
45#endif 46#endif
46 47
47#if defined(CONFIG_BLKFIN_DCACHE) 48#if defined(CONFIG_BFIN_DCACHE)
48void bfin_dcache_init(void) 49void bfin_dcache_init(void)
49{ 50{
50 unsigned long *table = dcplb_table; 51 unsigned long *table = dcplb_table;
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c
index bbdb403fcb55..f2db6a5e2b5b 100644
--- a/arch/blackfin/kernel/cplbinit.c
+++ b/arch/blackfin/kernel/cplbinit.c
@@ -23,6 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24 24
25#include <asm/blackfin.h> 25#include <asm/blackfin.h>
26#include <asm/cplb.h>
26#include <asm/cplbinit.h> 27#include <asm/cplbinit.h>
27 28
28u_long icplb_table[MAX_CPLBS+1]; 29u_long icplb_table[MAX_CPLBS+1];
@@ -56,7 +57,7 @@ struct s_cplb {
56 struct cplb_tab switch_d; 57 struct cplb_tab switch_d;
57}; 58};
58 59
59#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) 60#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
60static struct cplb_desc cplb_data[] = { 61static struct cplb_desc cplb_data[] = {
61 { 62 {
62 .start = 0, 63 .start = 0,
@@ -230,8 +231,8 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en
230 cplb_data[i].psize, 231 cplb_data[i].psize,
231 cplb_data[i].i_conf); 232 cplb_data[i].i_conf);
232 } else { 233 } else {
233#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 234#if defined(CONFIG_BFIN_ICACHE)
234 if (i == SDRAM_KERN) { 235 if (ANOMALY_05000263 && i == SDRAM_KERN) {
235 fill_cplbtab(t, 236 fill_cplbtab(t,
236 cplb_data[i].start, 237 cplb_data[i].start,
237 cplb_data[i].end, 238 cplb_data[i].end,
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c
new file mode 100644
index 000000000000..6ec518a81113
--- /dev/null
+++ b/arch/blackfin/kernel/early_printk.c
@@ -0,0 +1,214 @@
1/*
2 * File: arch/blackfin/kernel/early_printk.c
3 * Based on: arch/x86_64/kernel/early_printk.c
4 * Author: Robin Getz <rgetz@blackfin.uclinux.org
5 *
6 * Created: 14Aug2007
7 * Description: allow a console to be used for early printk
8 *
9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 */
24
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/serial_core.h>
28#include <linux/console.h>
29#include <linux/string.h>
30#include <asm/blackfin.h>
31#include <asm/irq_handler.h>
32#include <asm/early_printk.h>
33
34#ifdef CONFIG_SERIAL_BFIN
35extern struct console *bfin_earlyserial_init(unsigned int port,
36 unsigned int cflag);
37#endif
38
39static struct console *early_console;
40
41/* Default console */
42#define DEFAULT_PORT 0
43#define DEFAULT_CFLAG CS8|B57600
44
45/* Default console for early crashes */
46#define DEFAULT_EARLY_PORT "serial,uart0,57600"
47
48#ifdef CONFIG_SERIAL_CORE
49/* What should get here is "0,57600" */
50static struct console * __init earlyserial_init(char *buf)
51{
52 int baud, bit;
53 char parity;
54 unsigned int serial_port = DEFAULT_PORT;
55 unsigned int cflag = DEFAULT_CFLAG;
56
57 serial_port = simple_strtoul(buf, &buf, 10);
58 buf++;
59
60 cflag = 0;
61 baud = simple_strtoul(buf, &buf, 10);
62 switch (baud) {
63 case 1200:
64 cflag |= B1200;
65 break;
66 case 2400:
67 cflag |= B2400;
68 break;
69 case 4800:
70 cflag |= B4800;
71 break;
72 case 9600:
73 cflag |= B9600;
74 break;
75 case 19200:
76 cflag |= B19200;
77 break;
78 case 38400:
79 cflag |= B38400;
80 break;
81 case 115200:
82 cflag |= B115200;
83 break;
84 default:
85 cflag |= B57600;
86 }
87
88 parity = buf[0];
89 buf++;
90 switch (parity) {
91 case 'e':
92 cflag |= PARENB;
93 break;
94 case 'o':
95 cflag |= PARODD;
96 break;
97 }
98
99 bit = simple_strtoul(buf, &buf, 10);
100 switch (bit) {
101 case 5:
102 cflag |= CS5;
103 break;
104 case 6:
105 cflag |= CS5;
106 break;
107 case 7:
108 cflag |= CS5;
109 break;
110 default:
111 cflag |= CS8;
112 }
113
114#ifdef CONFIG_SERIAL_BFIN
115 return bfin_earlyserial_init(serial_port, cflag);
116#else
117 return NULL;
118#endif
119
120}
121#endif
122
123int __init setup_early_printk(char *buf)
124{
125
126 /* Crashing in here would be really bad, so check both the var
127 and the pointer before we start using it
128 */
129 if (!buf)
130 return 0;
131
132 if (!*buf)
133 return 0;
134
135 if (early_console != NULL)
136 return 0;
137
138#ifdef CONFIG_SERIAL_BFIN
139 /* Check for Blackfin Serial */
140 if (!strncmp(buf, "serial,uart", 11)) {
141 buf += 11;
142 early_console = earlyserial_init(buf);
143 }
144#endif
145#ifdef CONFIG_FB
146 /* TODO: add framebuffer console support */
147#endif
148
149 if (likely(early_console)) {
150 early_console->flags |= CON_BOOT;
151
152 register_console(early_console);
153 printk(KERN_INFO "early printk enabled on %s%d\n",
154 early_console->name,
155 early_console->index);
156 }
157
158 return 0;
159}
160
161/*
162 * Set up a temporary Event Vector Table, so if something bad happens before
163 * the kernel is fully started, it doesn't vector off into somewhere we don't
164 * know
165 */
166
167asmlinkage void __init init_early_exception_vectors(void)
168{
169 SSYNC();
170
171 /* cannot program in software:
172 * evt0 - emulation (jtag)
173 * evt1 - reset
174 */
175 bfin_write_EVT2(early_trap);
176 bfin_write_EVT3(early_trap);
177 bfin_write_EVT5(early_trap);
178 bfin_write_EVT6(early_trap);
179 bfin_write_EVT7(early_trap);
180 bfin_write_EVT8(early_trap);
181 bfin_write_EVT9(early_trap);
182 bfin_write_EVT10(early_trap);
183 bfin_write_EVT11(early_trap);
184 bfin_write_EVT12(early_trap);
185 bfin_write_EVT13(early_trap);
186 bfin_write_EVT14(early_trap);
187 bfin_write_EVT15(early_trap);
188 CSYNC();
189
190 /* Set all the return from interupt, exception, NMI to a known place
191 * so if we do a RETI, RETX or RETN by mistake - we go somewhere known
192 * Note - don't change RETS - we are in a subroutine, or
193 * RETE - since it might screw up if emulator is attached
194 */
195 asm("\tRETI = %0; RETX = %0; RETN = %0;\n"
196 : : "p"(early_trap));
197
198}
199
200asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr)
201{
202 /* This can happen before the uart is initialized, so initialize
203 * the UART now
204 */
205 if (likely(early_console == NULL))
206 setup_early_printk(DEFAULT_EARLY_PORT);
207
208 dump_bfin_regs(fp, retaddr);
209 dump_bfin_trace_buffer();
210
211 panic("Died early");
212}
213
214early_param("earlyprintk", setup_early_printk);
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 1fc001c7abda..73647c158774 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -34,6 +34,7 @@
34#include <linux/kallsyms.h> 34#include <linux/kallsyms.h>
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <linux/irq.h> 36#include <linux/irq.h>
37#include <asm/trace.h>
37 38
38static unsigned long irq_err_count; 39static unsigned long irq_err_count;
39static spinlock_t irq_controller_lock; 40static spinlock_t irq_controller_lock;
@@ -97,9 +98,8 @@ int show_interrupts(struct seq_file *p, void *v)
97 */ 98 */
98 99
99#ifdef CONFIG_DO_IRQ_L1 100#ifdef CONFIG_DO_IRQ_L1
100asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)__attribute__((l1_text)); 101__attribute__((l1_text))
101#endif 102#endif
102
103asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) 103asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
104{ 104{
105 struct pt_regs *old_regs; 105 struct pt_regs *old_regs;
@@ -144,4 +144,12 @@ void __init init_IRQ(void)
144 } 144 }
145 145
146 init_arch_irq(); 146 init_arch_irq();
147
148#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
149 /* Now that evt_ivhw is set up, turn this on */
150 trace_buff_offset = 0;
151 bfin_write_TBUFCTL(BFIN_TRACE_ON);
152 printk(KERN_INFO "Hardware Trace expanded to %ik\n",
153 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN);
154#endif
147} 155}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 6a7aefe48346..9124467651c4 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -134,31 +134,6 @@ void cpu_idle(void)
134 } 134 }
135} 135}
136 136
137void machine_restart(char *__unused)
138{
139#if defined(CONFIG_BLKFIN_CACHE)
140 bfin_write_IMEM_CONTROL(0x01);
141 SSYNC();
142#endif
143 bfin_reset();
144 /* Dont do anything till the reset occurs */
145 while (1) {
146 SSYNC();
147 }
148}
149
150void machine_halt(void)
151{
152 for (;;)
153 asm volatile ("idle");
154}
155
156void machine_power_off(void)
157{
158 for (;;)
159 asm volatile ("idle");
160}
161
162void show_regs(struct pt_regs *regs) 137void show_regs(struct pt_regs *regs)
163{ 138{
164 printk(KERN_NOTICE "\n"); 139 printk(KERN_NOTICE "\n");
@@ -420,7 +395,8 @@ void finish_atomic_sections (struct pt_regs *regs)
420#if defined(CONFIG_ACCESS_CHECK) 395#if defined(CONFIG_ACCESS_CHECK)
421int _access_ok(unsigned long addr, unsigned long size) 396int _access_ok(unsigned long addr, unsigned long size)
422{ 397{
423 398 if (size == 0)
399 return 1;
424 if (addr > (addr + size)) 400 if (addr > (addr + size))
425 return 0; 401 return 0;
426 if (segment_eq(get_fs(), KERNEL_DS)) 402 if (segment_eq(get_fs(), KERNEL_DS))
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index ed800c7456dd..64ce5fea8609 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -44,6 +44,7 @@
44#include <asm/processor.h> 44#include <asm/processor.h>
45#include <asm/asm-offsets.h> 45#include <asm/asm-offsets.h>
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/fixed_code.h>
47 48
48#define MAX_SHARED_LIBS 3 49#define MAX_SHARED_LIBS 3
49#define TEXT_OFFSET 0 50#define TEXT_OFFSET 0
@@ -169,6 +170,9 @@ static inline int is_user_addr_valid(struct task_struct *child,
169 && start + len <= (unsigned long)sraml->addr + sraml->length) 170 && start + len <= (unsigned long)sraml->addr + sraml->length)
170 return 0; 171 return 0;
171 172
173 if (start >= FIXED_CODE_START && start + len <= FIXED_CODE_END)
174 return 0;
175
172 return -EIO; 176 return -EIO;
173} 177}
174 178
@@ -215,9 +219,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
215 copied = sizeof(tmp); 219 copied = sizeof(tmp);
216 } else 220 } else
217#endif 221#endif
218 copied = 222 if (addr + add >= FIXED_CODE_START
219 access_process_vm(child, addr + add, &tmp, 223 && addr + add + sizeof(tmp) <= FIXED_CODE_END) {
220 sizeof(tmp), 0); 224 memcpy(&tmp, (const void *)(addr + add), sizeof(tmp));
225 copied = sizeof(tmp);
226 } else
227 copied = access_process_vm(child, addr + add, &tmp,
228 sizeof(tmp), 0);
221 pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); 229 pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
222 if (copied != sizeof(tmp)) 230 if (copied != sizeof(tmp))
223 break; 231 break;
@@ -281,9 +289,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
281 copied = sizeof(data); 289 copied = sizeof(data);
282 } else 290 } else
283#endif 291#endif
284 copied = 292 if (addr + add >= FIXED_CODE_START
285 access_process_vm(child, addr + add, &data, 293 && addr + add + sizeof(data) <= FIXED_CODE_END) {
286 sizeof(data), 1); 294 memcpy((void *)(addr + add), &data, sizeof(data));
295 copied = sizeof(data);
296 } else
297 copied = access_process_vm(child, addr + add, &data,
298 sizeof(data), 1);
287 pr_debug("ptrace: copied size %d\n", copied); 299 pr_debug("ptrace: copied size %d\n", copied);
288 if (copied != sizeof(data)) 300 if (copied != sizeof(data))
289 break; 301 break;
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
new file mode 100644
index 000000000000..356078ec462b
--- /dev/null
+++ b/arch/blackfin/kernel/reboot.c
@@ -0,0 +1,78 @@
1/*
2 * arch/blackfin/kernel/reboot.c - handle shutdown/reboot
3 *
4 * Copyright 2004-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <asm/bfin-global.h>
11#include <asm/reboot.h>
12#include <asm/system.h>
13
14#if defined(BF537_FAMILY) || defined(BF533_FAMILY)
15#define SYSCR_VAL 0x0
16#elif defined(BF561_FAMILY)
17#define SYSCR_VAL 0x20
18#elif defined(BF548_FAMILY)
19#define SYSCR_VAL 0x10
20#endif
21
22/* A system soft reset makes external memory unusable
23 * so force this function into L1.
24 */
25__attribute__((l1_text))
26void bfin_reset(void)
27{
28 /* force BMODE and disable Core B (as needed) */
29 bfin_write_SYSCR(SYSCR_VAL);
30
31 /* we use asm ssync here because it's save and we save some L1 */
32 asm("ssync;");
33
34 while (1) {
35 /* initiate system soft reset with magic 0x7 */
36 bfin_write_SWRST(0x7);
37 asm("ssync;");
38 /* clear system soft reset */
39 bfin_write_SWRST(0);
40 asm("ssync;");
41 /* issue core reset */
42 asm("raise 1");
43 }
44}
45
46__attribute__((weak))
47void native_machine_restart(char *cmd)
48{
49}
50
51void machine_restart(char *cmd)
52{
53 native_machine_restart(cmd);
54 local_irq_disable();
55 bfin_reset();
56}
57
58__attribute__((weak))
59void native_machine_halt(void)
60{
61 idle_with_irq_disabled();
62}
63
64void machine_halt(void)
65{
66 native_machine_halt();
67}
68
69__attribute__((weak))
70void native_machine_power_off(void)
71{
72 idle_with_irq_disabled();
73}
74
75void machine_power_off(void)
76{
77 native_machine_power_off();
78}
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 88f221b89b33..8dcd76e87ed5 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -39,10 +39,12 @@
39#include <linux/cramfs_fs.h> 39#include <linux/cramfs_fs.h>
40#include <linux/romfs_fs.h> 40#include <linux/romfs_fs.h>
41 41
42#include <asm/cplb.h>
42#include <asm/cacheflush.h> 43#include <asm/cacheflush.h>
43#include <asm/blackfin.h> 44#include <asm/blackfin.h>
44#include <asm/cplbinit.h> 45#include <asm/cplbinit.h>
45#include <asm/fixed_code.h> 46#include <asm/fixed_code.h>
47#include <asm/early_printk.h>
46 48
47u16 _bfin_swrst; 49u16 _bfin_swrst;
48 50
@@ -66,21 +68,21 @@ char __initdata command_line[COMMAND_LINE_SIZE];
66 68
67void __init bf53x_cache_init(void) 69void __init bf53x_cache_init(void)
68{ 70{
69#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) 71#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
70 generate_cpl_tables(); 72 generate_cpl_tables();
71#endif 73#endif
72 74
73#ifdef CONFIG_BLKFIN_CACHE 75#ifdef CONFIG_BFIN_ICACHE
74 bfin_icache_init(); 76 bfin_icache_init();
75 printk(KERN_INFO "Instruction Cache Enabled\n"); 77 printk(KERN_INFO "Instruction Cache Enabled\n");
76#endif 78#endif
77 79
78#ifdef CONFIG_BLKFIN_DCACHE 80#ifdef CONFIG_BFIN_DCACHE
79 bfin_dcache_init(); 81 bfin_dcache_init();
80 printk(KERN_INFO "Data Cache Enabled" 82 printk(KERN_INFO "Data Cache Enabled"
81# if defined CONFIG_BLKFIN_WB 83# if defined CONFIG_BFIN_WB
82 " (write-back)" 84 " (write-back)"
83# elif defined CONFIG_BLKFIN_WT 85# elif defined CONFIG_BFIN_WT
84 " (write-through)" 86 " (write-through)"
85# endif 87# endif
86 "\n"); 88 "\n");
@@ -156,8 +158,10 @@ static __init void parse_cmdline_early(char *cmdline_p)
156 1; 158 1;
157 } 159 }
158 } 160 }
161 } else if (!memcmp(to, "earlyprintk=", 12)) {
162 to += 12;
163 setup_early_printk(to);
159 } 164 }
160
161 } 165 }
162 c = *(to++); 166 c = *(to++);
163 if (!c) 167 if (!c)
@@ -176,22 +180,36 @@ void __init setup_arch(char **cmdline_p)
176#ifdef CONFIG_DUMMY_CONSOLE 180#ifdef CONFIG_DUMMY_CONSOLE
177 conswitchp = &dummy_con; 181 conswitchp = &dummy_con;
178#endif 182#endif
183
184#if defined(CONFIG_CMDLINE_BOOL)
185 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
186 command_line[sizeof(command_line) - 1] = 0;
187#endif
188
189 /* Keep a copy of command line */
190 *cmdline_p = &command_line[0];
191 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
192 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
193
194 /* setup memory defaults from the user config */
195 physical_mem_end = 0;
196 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
197
198 parse_cmdline_early(&command_line[0]);
199
179 cclk = get_cclk(); 200 cclk = get_cclk();
180 sclk = get_sclk(); 201 sclk = get_sclk();
181 202
182#if !defined(CONFIG_BFIN_KERNEL_CLOCK) && defined(ANOMALY_05000273) 203#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
183 if (cclk == sclk) 204 if (ANOMALY_05000273 && cclk == sclk)
184 panic("ANOMALY 05000273, SCLK can not be same as CCLK"); 205 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
185#endif 206#endif
186 207
187#if defined(ANOMALY_05000266) 208#ifdef BF561_FAMILY
188 bfin_read_IMDMA_D0_IRQ_STATUS(); 209 if (ANOMALY_05000266) {
189 bfin_read_IMDMA_D1_IRQ_STATUS(); 210 bfin_read_IMDMA_D0_IRQ_STATUS();
190#endif 211 bfin_read_IMDMA_D1_IRQ_STATUS();
191 212 }
192#ifdef DEBUG_SERIAL_EARLY_INIT
193 bfin_console_init(); /* early console registration */
194 /* this give a chance to get printk() working before crash. */
195#endif 213#endif
196 214
197 printk(KERN_INFO "Hardware Trace "); 215 printk(KERN_INFO "Hardware Trace ");
@@ -212,22 +230,6 @@ void __init setup_arch(char **cmdline_p)
212 flash_probe(); 230 flash_probe();
213#endif 231#endif
214 232
215#if defined(CONFIG_CMDLINE_BOOL)
216 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
217 command_line[sizeof(command_line) - 1] = 0;
218#endif
219
220 /* Keep a copy of command line */
221 *cmdline_p = &command_line[0];
222 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
223 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
224
225 /* setup memory defaults from the user config */
226 physical_mem_end = 0;
227 _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
228
229 parse_cmdline_early(&command_line[0]);
230
231 if (physical_mem_end == 0) 233 if (physical_mem_end == 0)
232 physical_mem_end = _ramend; 234 physical_mem_end = _ramend;
233 235
@@ -260,7 +262,7 @@ void __init setup_arch(char **cmdline_p)
260 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) 262 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
261 mtd_size = 263 mtd_size =
262 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); 264 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
263# if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 265# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
264 /* Due to a Hardware Anomaly we need to limit the size of usable 266 /* Due to a Hardware Anomaly we need to limit the size of usable
265 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on 267 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
266 * 05000263 - Hardware loop corrupted when taking an ICPLB exception 268 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -289,7 +291,7 @@ void __init setup_arch(char **cmdline_p)
289 _ebss = memory_mtd_start; /* define _ebss for compatible */ 291 _ebss = memory_mtd_start; /* define _ebss for compatible */
290#endif /* CONFIG_MTD_UCLINUX */ 292#endif /* CONFIG_MTD_UCLINUX */
291 293
292#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 294#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
293 /* Due to a Hardware Anomaly we need to limit the size of usable 295 /* Due to a Hardware Anomaly we need to limit the size of usable
294 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on 296 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
295 * 05000263 - Hardware loop corrupted when taking an ICPLB exception 297 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -334,13 +336,11 @@ void __init setup_arch(char **cmdline_p)
334 CPU, bfin_revid()); 336 CPU, bfin_revid());
335 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); 337 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
336 338
337 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n", 339 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
338 cclk / 1000000, sclk / 1000000); 340 cclk / 1000000, sclk / 1000000);
339 341
340#if defined(ANOMALY_05000273) 342 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
341 if ((cclk >> 1) <= sclk)
342 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); 343 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
343#endif
344 344
345 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); 345 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
346 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); 346 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
@@ -535,9 +535,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
535 seq_printf(m, "I-CACHE:\tOFF\n"); 535 seq_printf(m, "I-CACHE:\tOFF\n");
536 if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE)) 536 if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
537 seq_printf(m, "D-CACHE:\tON" 537 seq_printf(m, "D-CACHE:\tON"
538#if defined CONFIG_BLKFIN_WB 538#if defined CONFIG_BFIN_WB
539 " (write-back)" 539 " (write-back)"
540#elif defined CONFIG_BLKFIN_WT 540#elif defined CONFIG_BFIN_WT
541 " (write-through)" 541 " (write-through)"
542#endif 542#endif
543 "\n"); 543 "\n");
@@ -566,15 +566,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
566 } 566 }
567 567
568 568
569 seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024); 569 seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
570 seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size); 570 seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
571 seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n", 571 seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
572 BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES); 572 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
573 seq_printf(m, 573 seq_printf(m,
574 "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n", 574 "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
575 dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS, 575 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
576 BLKFIN_DLINES); 576 BFIN_DLINES);
577#ifdef CONFIG_BLKFIN_CACHE_LOCK 577#ifdef CONFIG_BFIN_ICACHE_LOCK
578 switch (read_iloc()) { 578 switch (read_iloc()) {
579 case WAY0_L: 579 case WAY0_L:
580 seq_printf(m, "Way0 Locked-Down\n"); 580 seq_printf(m, "Way0 Locked-Down\n");
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 792a8416fe10..8823e9ade584 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -51,10 +51,9 @@ void __init trap_init(void)
51 CSYNC(); 51 CSYNC();
52} 52}
53 53
54asmlinkage void trap_c(struct pt_regs *fp);
55
56int kstack_depth_to_print = 48; 54int kstack_depth_to_print = 48;
57 55
56#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
58static int printk_address(unsigned long address) 57static int printk_address(unsigned long address)
59{ 58{
60 struct vm_list_struct *vml; 59 struct vm_list_struct *vml;
@@ -131,10 +130,22 @@ static int printk_address(unsigned long address)
131 /* we were unable to find this address anywhere */ 130 /* we were unable to find this address anywhere */
132 return printk("[<0x%p>]", (void *)address); 131 return printk("[<0x%p>]", (void *)address);
133} 132}
133#endif
134
135asmlinkage void double_fault_c(struct pt_regs *fp)
136{
137 printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n");
138 dump_bfin_regs(fp, (void *)fp->retx);
139 panic("Double Fault - unrecoverable event\n");
140
141}
134 142
135asmlinkage void trap_c(struct pt_regs *fp) 143asmlinkage void trap_c(struct pt_regs *fp)
136{ 144{
137 int j, sig = 0; 145#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
146 int j;
147#endif
148 int sig = 0;
138 siginfo_t info; 149 siginfo_t info;
139 unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE; 150 unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE;
140 151
@@ -391,10 +402,6 @@ asmlinkage void trap_c(struct pt_regs *fp)
391 break; 402 break;
392 } 403 }
393 404
394 info.si_signo = sig;
395 info.si_errno = 0;
396 info.si_addr = (void *)fp->pc;
397 force_sig_info(sig, &info, current);
398 if (sig != 0 && sig != SIGTRAP) { 405 if (sig != 0 && sig != SIGTRAP) {
399 unsigned long stack; 406 unsigned long stack;
400 dump_bfin_regs(fp, (void *)fp->retx); 407 dump_bfin_regs(fp, (void *)fp->retx);
@@ -403,6 +410,10 @@ asmlinkage void trap_c(struct pt_regs *fp)
403 if (current->mm == NULL) 410 if (current->mm == NULL)
404 panic("Kernel exception"); 411 panic("Kernel exception");
405 } 412 }
413 info.si_signo = sig;
414 info.si_errno = 0;
415 info.si_addr = (void *)fp->pc;
416 force_sig_info(sig, &info, current);
406 417
407 /* if the address that we are about to return to is not valid, set it 418 /* if the address that we are about to return to is not valid, set it
408 * to a valid address, if we have a current application or panic 419 * to a valid address, if we have a current application or panic
@@ -429,24 +440,56 @@ asmlinkage void trap_c(struct pt_regs *fp)
429 440
430/* Typical exception handling routines */ 441/* Typical exception handling routines */
431 442
443#define EXPAND_LEN ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1)
444
432void dump_bfin_trace_buffer(void) 445void dump_bfin_trace_buffer(void)
433{ 446{
434 int tflags; 447#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
448 int tflags, i = 0;
449#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
450 int j, index;
451#endif
452
435 trace_buffer_save(tflags); 453 trace_buffer_save(tflags);
436 454
455 printk(KERN_EMERG "Hardware Trace:\n");
456
437 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { 457 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) {
438 int i; 458 for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) {
439 printk(KERN_EMERG "Hardware Trace:\n"); 459 printk(KERN_EMERG "%4i Target : ", i);
440 for (i = 0; bfin_read_TBUFSTAT() & TBUFCNT; i++) {
441 printk(KERN_EMERG "%2i Target : ", i);
442 printk_address((unsigned long)bfin_read_TBUF()); 460 printk_address((unsigned long)bfin_read_TBUF());
443 printk("\n" KERN_EMERG " Source : "); 461 printk("\n" KERN_EMERG " Source : ");
444 printk_address((unsigned long)bfin_read_TBUF()); 462 printk_address((unsigned long)bfin_read_TBUF());
445 printk("\n"); 463 printk("\n");
446 } 464 }
447 } 465 }
448 466
467#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
468 if (trace_buff_offset)
469 index = trace_buff_offset/4 - 1;
470 else
471 index = EXPAND_LEN;
472
473 j = (1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 128;
474 while (j) {
475 printk(KERN_EMERG "%4i Target : ", i);
476 printk_address(software_trace_buff[index]);
477 index -= 1;
478 if (index < 0 )
479 index = EXPAND_LEN;
480 printk("\n" KERN_EMERG " Source : ");
481 printk_address(software_trace_buff[index]);
482 index -= 1;
483 if (index < 0)
484 index = EXPAND_LEN;
485 printk("\n");
486 j--;
487 i++;
488 }
489#endif
490
449 trace_buffer_restore(tflags); 491 trace_buffer_restore(tflags);
492#endif
450} 493}
451EXPORT_SYMBOL(dump_bfin_trace_buffer); 494EXPORT_SYMBOL(dump_bfin_trace_buffer);
452 495
@@ -510,7 +553,9 @@ void show_stack(struct task_struct *task, unsigned long *stack)
510void dump_stack(void) 553void dump_stack(void)
511{ 554{
512 unsigned long stack; 555 unsigned long stack;
556#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
513 int tflags; 557 int tflags;
558#endif
514 trace_buffer_save(tflags); 559 trace_buffer_save(tflags);
515 dump_bfin_trace_buffer(); 560 dump_bfin_trace_buffer();
516 show_stack(current, &stack); 561 show_stack(current, &stack);
@@ -559,8 +604,7 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr)
559 unsigned short x = 0; 604 unsigned short x = 0;
560 for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) { 605 for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) {
561 if (!(i & 0xF)) 606 if (!(i & 0xF))
562 printk(KERN_EMERG "\n" KERN_EMERG 607 printk("\n" KERN_EMERG "0x%08x: ", i);
563 "0x%08x: ", i);
564 608
565 if (get_user(x, (unsigned short *)i)) 609 if (get_user(x, (unsigned short *)i))
566 break; 610 break;
@@ -655,6 +699,42 @@ asmlinkage int sys_bfin_spinlock(int *spinlock)
655 return ret; 699 return ret;
656} 700}
657 701
702int bfin_request_exception(unsigned int exception, void (*handler)(void))
703{
704 void (*curr_handler)(void);
705
706 if (exception > 0x3F)
707 return -EINVAL;
708
709 curr_handler = ex_table[exception];
710
711 if (curr_handler != ex_replaceable)
712 return -EBUSY;
713
714 ex_table[exception] = handler;
715
716 return 0;
717}
718EXPORT_SYMBOL(bfin_request_exception);
719
720int bfin_free_exception(unsigned int exception, void (*handler)(void))
721{
722 void (*curr_handler)(void);
723
724 if (exception > 0x3F)
725 return -EINVAL;
726
727 curr_handler = ex_table[exception];
728
729 if (curr_handler != handler)
730 return -EBUSY;
731
732 ex_table[exception] = ex_replaceable;
733
734 return 0;
735}
736EXPORT_SYMBOL(bfin_free_exception);
737
658void panic_cplb_error(int cplb_panic, struct pt_regs *fp) 738void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
659{ 739{
660 switch (cplb_panic) { 740 switch (cplb_panic) {
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index fb53780247bc..eec43674a465 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -49,7 +49,8 @@ SECTIONS
49 TEXT_TEXT 49 TEXT_TEXT
50 SCHED_TEXT 50 SCHED_TEXT
51 LOCK_TEXT 51 LOCK_TEXT
52 *(.text.lock) 52 KPROBES_TEXT
53 *(.text.*)
53 *(.fixup) 54 *(.fixup)
54 55
55 . = ALIGN(16); 56 . = ALIGN(16);
@@ -61,7 +62,7 @@ SECTIONS
61 __etext = .; 62 __etext = .;
62 } 63 }
63 64
64 RODATA 65 RO_DATA(PAGE_SIZE)
65 66
66 .data : 67 .data :
67 { 68 {
@@ -72,50 +73,63 @@ SECTIONS
72 __sdata = .; 73 __sdata = .;
73 . = ALIGN(THREAD_SIZE); 74 . = ALIGN(THREAD_SIZE);
74 *(.data.init_task) 75 *(.data.init_task)
75 DATA_DATA
76 CONSTRUCTORS
77 76
78 . = ALIGN(32); 77 . = ALIGN(32);
79 *(.data.cacheline_aligned) 78 *(.data.cacheline_aligned)
80 79
80 DATA_DATA
81 *(.data.*)
82 CONSTRUCTORS
83
81 . = ALIGN(THREAD_SIZE); 84 . = ALIGN(THREAD_SIZE);
82 __edata = .; 85 __edata = .;
83 } 86 }
84 87
85 ___init_begin = .; 88 ___init_begin = .;
86 .init : 89
90 .init.text :
87 { 91 {
88 . = ALIGN(PAGE_SIZE); 92 . = ALIGN(PAGE_SIZE);
89 __sinittext = .; 93 __sinittext = .;
90 *(.init.text) 94 *(.init.text)
91 __einittext = .; 95 __einittext = .;
96 }
97 .init.data :
98 {
99 . = ALIGN(16);
92 *(.init.data) 100 *(.init.data)
101 }
102 .init.setup :
103 {
93 . = ALIGN(16); 104 . = ALIGN(16);
94 ___setup_start = .; 105 ___setup_start = .;
95 *(.init.setup) 106 *(.init.setup)
96 ___setup_end = .; 107 ___setup_end = .;
97 ___start___param = .; 108 }
98 *(__param) 109 .initcall.init :
99 ___stop___param = .; 110 {
100 ___initcall_start = .; 111 ___initcall_start = .;
101 INITCALLS 112 INITCALLS
102 ___initcall_end = .; 113 ___initcall_end = .;
114 }
115 .con_initcall.init :
116 {
103 ___con_initcall_start = .; 117 ___con_initcall_start = .;
104 *(.con_initcall.init) 118 *(.con_initcall.init)
105 ___con_initcall_end = .; 119 ___con_initcall_end = .;
106 ___security_initcall_start = .; 120 }
107 *(.security_initcall.init) 121 SECURITY_INIT
108 ___security_initcall_end = .; 122 .init.ramfs :
123 {
109 . = ALIGN(4); 124 . = ALIGN(4);
110 ___initramfs_start = .; 125 ___initramfs_start = .;
111 *(.init.ramfs) 126 *(.init.ramfs)
112 ___initramfs_end = .; 127 ___initramfs_end = .;
113 . = ALIGN(4);
114 } 128 }
115 129
116 __l1_lma_start = .; 130 __l1_lma_start = .;
117 131
118 .text_l1 L1_CODE_START : AT(LOADADDR(.init) + SIZEOF(.init)) 132 .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
119 { 133 {
120 . = ALIGN(4); 134 . = ALIGN(4);
121 __stext_l1 = .; 135 __stext_l1 = .;
@@ -164,13 +178,19 @@ SECTIONS
164 { 178 {
165 . = ALIGN(4); 179 . = ALIGN(4);
166 ___bss_start = .; 180 ___bss_start = .;
167 *(.bss) 181 *(.bss .bss.*)
168 *(COMMON) 182 *(COMMON)
169 . = ALIGN(4); 183 . = ALIGN(4);
170 ___bss_stop = .; 184 ___bss_stop = .;
171 __end = .; 185 __end = .;
172 } 186 }
173 187
188 STABS_DEBUG
189
190 DWARF_DEBUG
191
192 NOTES
193
174 /DISCARD/ : 194 /DISCARD/ :
175 { 195 {
176 *(.exit.text) 196 *(.exit.text)
diff --git a/arch/blackfin/lib/memcmp.S b/arch/blackfin/lib/memcmp.S
index b88c5d2d1ebe..219fa2877c62 100644
--- a/arch/blackfin/lib/memcmp.S
+++ b/arch/blackfin/lib/memcmp.S
@@ -61,7 +61,7 @@ ENTRY(_memcmp)
61 61
62 LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1; 62 LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1;
63.Lquad_loop_s: 63.Lquad_loop_s:
64#ifdef ANOMALY_05000202 64#if ANOMALY_05000202
65 R0 = [P0++]; 65 R0 = [P0++];
66 R1 = [I0++]; 66 R1 = [I0++];
67#else 67#else
diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S
index 14a5585bbd02..2e6336492b4b 100644
--- a/arch/blackfin/lib/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
@@ -98,7 +98,7 @@ ENTRY(_memcpy)
98 R0 = R1; 98 R0 = R1;
99 I1 = P1; 99 I1 = P1;
100 R3 = [I1++]; 100 R3 = [I1++];
101#ifdef ANOMALY_05000202 101#if ANOMALY_05000202
102.Lword_loops: 102.Lword_loops:
103 [P0++] = R3; 103 [P0++] = R3;
104.Lword_loope: 104.Lword_loope:
diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S
index 6ee6e206e77c..33f8653145b7 100644
--- a/arch/blackfin/lib/memmove.S
+++ b/arch/blackfin/lib/memmove.S
@@ -70,7 +70,7 @@ ENTRY(_memmove)
70 R1 = [I0++]; 70 R1 = [I0++];
71 71
72 LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1; 72 LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1;
73#ifdef ANOMALY_05000202 73#if ANOMALY_05000202
74.Lquad_loops: 74.Lquad_loops:
75 [P0++] = R1; 75 [P0++] = R1;
76.Lquad_loope: 76.Lquad_loope:
@@ -102,7 +102,7 @@ ENTRY(_memmove)
102 R1 = B[P3--] (Z); 102 R1 = B[P3--] (Z);
103 CC = P2 == 0; 103 CC = P2 == 0;
104 IF CC JUMP .Lno_loop; 104 IF CC JUMP .Lno_loop;
105#ifdef ANOMALY_05000245 105#if ANOMALY_05000245
106 NOP; 106 NOP;
107 NOP; 107 NOP;
108#endif 108#endif
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 4545f363e641..a57b52d207cd 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -34,7 +34,9 @@
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#include <linux/usb_isp1362.h> 36#include <linux/usb_isp1362.h>
37#include <linux/pata_platform.h>
37#include <linux/irq.h> 38#include <linux/irq.h>
39#include <asm/dma.h>
38#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
39 41
40/* 42/*
@@ -93,7 +95,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
93 /* the modalias must be the same as spi device driver name */ 95 /* the modalias must be the same as spi device driver name */
94 .modalias = "m25p80", /* Name of spi_driver for this device */ 96 .modalias = "m25p80", /* Name of spi_driver for this device */
95 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 97 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
96 .bus_num = 1, /* Framework bus number */ 98 .bus_num = 0, /* Framework bus number */
97 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 99 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
98 .platform_data = &bfin_spi_flash_data, 100 .platform_data = &bfin_spi_flash_data,
99 .controller_data = &spi_flash_chip_info, 101 .controller_data = &spi_flash_chip_info,
@@ -101,7 +103,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
101 }, { 103 }, {
102 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 104 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
103 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 105 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
104 .bus_num = 1, /* Framework bus number */ 106 .bus_num = 0, /* Framework bus number */
105 .chip_select = 2, /* Framework chip select. */ 107 .chip_select = 2, /* Framework chip select. */
106 .platform_data = NULL, /* No spi_driver specific config */ 108 .platform_data = NULL, /* No spi_driver specific config */
107 .controller_data = &spi_adc_chip_info, 109 .controller_data = &spi_adc_chip_info,
@@ -110,24 +112,40 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
110 { 112 {
111 .modalias = "ad1836-spi", 113 .modalias = "ad1836-spi",
112 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 114 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
113 .bus_num = 1, 115 .bus_num = 0,
114 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 116 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
115 .controller_data = &ad1836_spi_chip_info, 117 .controller_data = &ad1836_spi_chip_info,
116 }, 118 },
117#endif 119#endif
118}; 120};
119 121
122/* SPI (0) */
123static struct resource bfin_spi0_resource[] = {
124 [0] = {
125 .start = SPI0_REGBASE,
126 .end = SPI0_REGBASE + 0xFF,
127 .flags = IORESOURCE_MEM,
128 },
129 [1] = {
130 .start = CH_SPI,
131 .end = CH_SPI,
132 .flags = IORESOURCE_IRQ,
133 }
134};
135
120/* SPI controller data */ 136/* SPI controller data */
121static struct bfin5xx_spi_master spi_bfin_master_info = { 137static struct bfin5xx_spi_master bfin_spi0_info = {
122 .num_chipselect = 8, 138 .num_chipselect = 8,
123 .enable_dma = 1, /* master has the ability to do dma transfer */ 139 .enable_dma = 1, /* master has the ability to do dma transfer */
124}; 140};
125 141
126static struct platform_device spi_bfin_master_device = { 142static struct platform_device bfin_spi0_device = {
127 .name = "bfin-spi-master", 143 .name = "bfin-spi",
128 .id = 1, /* Bus number */ 144 .id = 0, /* Bus number */
145 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
146 .resource = bfin_spi0_resource,
129 .dev = { 147 .dev = {
130 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 148 .platform_data = &bfin_spi0_info, /* Passed to driver */
131 }, 149 },
132}; 150};
133#endif /* spi master and devices */ 151#endif /* spi master and devices */
@@ -227,6 +245,43 @@ static struct platform_device isp1362_hcd_device = {
227}; 245};
228#endif 246#endif
229 247
248#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
249#define PATA_INT 38
250
251static struct pata_platform_info bfin_pata_platform_data = {
252 .ioport_shift = 2,
253 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
254};
255
256static struct resource bfin_pata_resources[] = {
257 {
258 .start = 0x2030C000,
259 .end = 0x2030C01F,
260 .flags = IORESOURCE_MEM,
261 },
262 {
263 .start = 0x2030D018,
264 .end = 0x2030D01B,
265 .flags = IORESOURCE_MEM,
266 },
267 {
268 .start = PATA_INT,
269 .end = PATA_INT,
270 .flags = IORESOURCE_IRQ,
271 },
272};
273
274static struct platform_device bfin_pata_device = {
275 .name = "pata_platform",
276 .id = -1,
277 .num_resources = ARRAY_SIZE(bfin_pata_resources),
278 .resource = bfin_pata_resources,
279 .dev = {
280 .platform_data = &bfin_pata_platform_data,
281 }
282};
283#endif
284
230static struct platform_device *cm_bf533_devices[] __initdata = { 285static struct platform_device *cm_bf533_devices[] __initdata = {
231#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 286#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
232 &bfin_uart_device, 287 &bfin_uart_device,
@@ -250,7 +305,11 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
250#endif 305#endif
251 306
252#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 307#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
253 &spi_bfin_master_device, 308 &bfin_spi0_device,
309#endif
310
311#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
312 &bfin_pata_device,
254#endif 313#endif
255}; 314};
256 315
@@ -261,6 +320,10 @@ static int __init cm_bf533_init(void)
261#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 320#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
262 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 321 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
263#endif 322#endif
323
324#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
325 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
326#endif
264 return 0; 327 return 0;
265} 328}
266 329
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 0000b8f1239c..5c1e35d3c012 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -35,7 +35,9 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/usb_isp1362.h> 37#include <linux/usb_isp1362.h>
38#include <linux/pata_platform.h>
38#include <linux/irq.h> 39#include <linux/irq.h>
40#include <asm/dma.h>
39#include <asm/bfin5xx_spi.h> 41#include <asm/bfin5xx_spi.h>
40 42
41/* 43/*
@@ -50,6 +52,12 @@ static struct platform_device rtc_device = {
50}; 52};
51#endif 53#endif
52 54
55#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
56static struct platform_device bfin_fb_adv7393_device = {
57 .name = "bfin-adv7393",
58};
59#endif
60
53/* 61/*
54 * USB-LAN EzExtender board 62 * USB-LAN EzExtender board
55 * Driver needs to know address, irq and flag pin. 63 * Driver needs to know address, irq and flag pin.
@@ -131,7 +139,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
131 /* the modalias must be the same as spi device driver name */ 139 /* the modalias must be the same as spi device driver name */
132 .modalias = "m25p80", /* Name of spi_driver for this device */ 140 .modalias = "m25p80", /* Name of spi_driver for this device */
133 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 141 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
134 .bus_num = 1, /* Framework bus number */ 142 .bus_num = 0, /* Framework bus number */
135 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ 143 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
136 .platform_data = &bfin_spi_flash_data, 144 .platform_data = &bfin_spi_flash_data,
137 .controller_data = &spi_flash_chip_info, 145 .controller_data = &spi_flash_chip_info,
@@ -143,7 +151,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
143 { 151 {
144 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 152 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
145 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 153 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
146 .bus_num = 1, /* Framework bus number */ 154 .bus_num = 0, /* Framework bus number */
147 .chip_select = 1, /* Framework chip select. */ 155 .chip_select = 1, /* Framework chip select. */
148 .platform_data = NULL, /* No spi_driver specific config */ 156 .platform_data = NULL, /* No spi_driver specific config */
149 .controller_data = &spi_adc_chip_info, 157 .controller_data = &spi_adc_chip_info,
@@ -154,24 +162,40 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
154 { 162 {
155 .modalias = "ad1836-spi", 163 .modalias = "ad1836-spi",
156 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 164 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 1, 165 .bus_num = 0,
158 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 166 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
159 .controller_data = &ad1836_spi_chip_info, 167 .controller_data = &ad1836_spi_chip_info,
160 }, 168 },
161#endif 169#endif
162}; 170};
163 171
172/* SPI (0) */
173static struct resource bfin_spi0_resource[] = {
174 [0] = {
175 .start = SPI0_REGBASE,
176 .end = SPI0_REGBASE + 0xFF,
177 .flags = IORESOURCE_MEM,
178 },
179 [1] = {
180 .start = CH_SPI,
181 .end = CH_SPI,
182 .flags = IORESOURCE_IRQ,
183 }
184};
185
164/* SPI controller data */ 186/* SPI controller data */
165static struct bfin5xx_spi_master spi_bfin_master_info = { 187static struct bfin5xx_spi_master bfin_spi0_info = {
166 .num_chipselect = 8, 188 .num_chipselect = 8,
167 .enable_dma = 1, /* master has the ability to do dma transfer */ 189 .enable_dma = 1, /* master has the ability to do dma transfer */
168}; 190};
169 191
170static struct platform_device spi_bfin_master_device = { 192static struct platform_device bfin_spi0_device = {
171 .name = "bfin-spi-master", 193 .name = "bfin-spi",
172 .id = 1, /* Bus number */ 194 .id = 0, /* Bus number */
195 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
196 .resource = bfin_spi0_resource,
173 .dev = { 197 .dev = {
174 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 198 .platform_data = &bfin_spi0_info, /* Passed to driver */
175 }, 199 },
176}; 200};
177#endif /* spi master and devices */ 201#endif /* spi master and devices */
@@ -193,13 +217,54 @@ static struct platform_device bfin_uart_device = {
193}; 217};
194#endif 218#endif
195 219
220#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
221#define PATA_INT 55
222
223static struct pata_platform_info bfin_pata_platform_data = {
224 .ioport_shift = 1,
225 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
226};
227
228static struct resource bfin_pata_resources[] = {
229 {
230 .start = 0x20314020,
231 .end = 0x2031403F,
232 .flags = IORESOURCE_MEM,
233 },
234 {
235 .start = 0x2031401C,
236 .end = 0x2031401F,
237 .flags = IORESOURCE_MEM,
238 },
239 {
240 .start = PATA_INT,
241 .end = PATA_INT,
242 .flags = IORESOURCE_IRQ,
243 },
244};
245
246static struct platform_device bfin_pata_device = {
247 .name = "pata_platform",
248 .id = -1,
249 .num_resources = ARRAY_SIZE(bfin_pata_resources),
250 .resource = bfin_pata_resources,
251 .dev = {
252 .platform_data = &bfin_pata_platform_data,
253 }
254};
255#endif
256
196static struct platform_device *ezkit_devices[] __initdata = { 257static struct platform_device *ezkit_devices[] __initdata = {
197#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 258#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
198 &smc91x_device, 259 &smc91x_device,
199#endif 260#endif
200 261
201#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 262#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
202 &spi_bfin_master_device, 263 &bfin_spi0_device,
264#endif
265
266#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
267 &bfin_fb_adv7393_device,
203#endif 268#endif
204 269
205#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 270#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
@@ -209,6 +274,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
209#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 274#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
210 &bfin_uart_device, 275 &bfin_uart_device,
211#endif 276#endif
277
278#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
279 &bfin_pata_device,
280#endif
212}; 281};
213 282
214static int __init ezkit_init(void) 283static int __init ezkit_init(void)
@@ -218,6 +287,10 @@ static int __init ezkit_init(void)
218#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 287#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
219 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 288 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
220#endif 289#endif
290
291#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
292 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
293#endif
221 return 0; 294 return 0;
222} 295}
223 296
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index a9143c4cbdcd..8975e06ea158 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -37,8 +37,11 @@
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb_isp1362.h> 38#include <linux/usb_isp1362.h>
39#endif 39#endif
40#include <linux/pata_platform.h>
40#include <linux/irq.h> 41#include <linux/irq.h>
42#include <asm/dma.h>
41#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
44#include <asm/reboot.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -77,6 +80,12 @@ static struct platform_device smc91x_device = {
77}; 80};
78#endif 81#endif
79 82
83#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
84static struct platform_device bfin_fb_adv7393_device = {
85 .name = "bfin-adv7393",
86};
87#endif
88
80#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 89#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
81static struct resource net2272_bfin_resources[] = { 90static struct resource net2272_bfin_resources[] = {
82 { 91 {
@@ -177,7 +186,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
177 /* the modalias must be the same as spi device driver name */ 186 /* the modalias must be the same as spi device driver name */
178 .modalias = "m25p80", /* Name of spi_driver for this device */ 187 .modalias = "m25p80", /* Name of spi_driver for this device */
179 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 188 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
180 .bus_num = 1, /* Framework bus number */ 189 .bus_num = 0, /* Framework bus number */
181 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ 190 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
182 .platform_data = &bfin_spi_flash_data, 191 .platform_data = &bfin_spi_flash_data,
183 .controller_data = &spi_flash_chip_info, 192 .controller_data = &spi_flash_chip_info,
@@ -189,7 +198,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
189 { 198 {
190 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 199 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
191 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 200 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
192 .bus_num = 1, /* Framework bus number */ 201 .bus_num = 0, /* Framework bus number */
193 .chip_select = 1, /* Framework chip select. */ 202 .chip_select = 1, /* Framework chip select. */
194 .platform_data = NULL, /* No spi_driver specific config */ 203 .platform_data = NULL, /* No spi_driver specific config */
195 .controller_data = &spi_adc_chip_info, 204 .controller_data = &spi_adc_chip_info,
@@ -200,7 +209,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
200 { 209 {
201 .modalias = "ad1836-spi", 210 .modalias = "ad1836-spi",
202 .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */ 211 .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
203 .bus_num = 1, 212 .bus_num = 0,
204 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 213 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
205 .controller_data = &ad1836_spi_chip_info, 214 .controller_data = &ad1836_spi_chip_info,
206 }, 215 },
@@ -210,7 +219,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
210 { 219 {
211 .modalias = "spi_mmc_dummy", 220 .modalias = "spi_mmc_dummy",
212 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 221 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
213 .bus_num = 1, 222 .bus_num = 0,
214 .chip_select = 0, 223 .chip_select = 0,
215 .platform_data = NULL, 224 .platform_data = NULL,
216 .controller_data = &spi_mmc_chip_info, 225 .controller_data = &spi_mmc_chip_info,
@@ -219,7 +228,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
219 { 228 {
220 .modalias = "spi_mmc", 229 .modalias = "spi_mmc",
221 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 230 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
222 .bus_num = 1, 231 .bus_num = 0,
223 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 232 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
224 .platform_data = NULL, 233 .platform_data = NULL,
225 .controller_data = &spi_mmc_chip_info, 234 .controller_data = &spi_mmc_chip_info,
@@ -231,16 +240,16 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
231 { 240 {
232 .modalias = "fxs-spi", 241 .modalias = "fxs-spi",
233 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 242 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
234 .bus_num = 1, 243 .bus_num = 0,
235 .chip_select = 3, 244 .chip_select = 8 - CONFIG_J11_JUMPER,
236 .controller_data = &spi_si3xxx_chip_info, 245 .controller_data = &spi_si3xxx_chip_info,
237 .mode = SPI_MODE_3, 246 .mode = SPI_MODE_3,
238 }, 247 },
239 { 248 {
240 .modalias = "fxo-spi", 249 .modalias = "fxo-spi",
241 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 250 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
242 .bus_num = 1, 251 .bus_num = 0,
243 .chip_select = 2, 252 .chip_select = 8 - CONFIG_J19_JUMPER,
244 .controller_data = &spi_si3xxx_chip_info, 253 .controller_data = &spi_si3xxx_chip_info,
245 .mode = SPI_MODE_3, 254 .mode = SPI_MODE_3,
246 }, 255 },
@@ -250,7 +259,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
250 { 259 {
251 .modalias = "ad5304_spi", 260 .modalias = "ad5304_spi",
252 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */ 261 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
253 .bus_num = 1, 262 .bus_num = 0,
254 .chip_select = 2, 263 .chip_select = 2,
255 .platform_data = NULL, 264 .platform_data = NULL,
256 .controller_data = &ad5304_chip_info, 265 .controller_data = &ad5304_chip_info,
@@ -259,17 +268,33 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
259#endif 268#endif
260}; 269};
261 270
271/* SPI (0) */
272static struct resource bfin_spi0_resource[] = {
273 [0] = {
274 .start = SPI0_REGBASE,
275 .end = SPI0_REGBASE + 0xFF,
276 .flags = IORESOURCE_MEM,
277 },
278 [1] = {
279 .start = CH_SPI,
280 .end = CH_SPI,
281 .flags = IORESOURCE_IRQ,
282 }
283};
284
262/* SPI controller data */ 285/* SPI controller data */
263static struct bfin5xx_spi_master spi_bfin_master_info = { 286static struct bfin5xx_spi_master bfin_spi0_info = {
264 .num_chipselect = 8, 287 .num_chipselect = 8,
265 .enable_dma = 1, /* master has the ability to do dma transfer */ 288 .enable_dma = 1, /* master has the ability to do dma transfer */
266}; 289};
267 290
268static struct platform_device spi_bfin_master_device = { 291static struct platform_device bfin_spi0_device = {
269 .name = "bfin-spi-master", 292 .name = "bfin-spi",
270 .id = 1, /* Bus number */ 293 .id = 0, /* Bus number */
294 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
295 .resource = bfin_spi0_resource,
271 .dev = { 296 .dev = {
272 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 297 .platform_data = &bfin_spi0_info, /* Passed to driver */
273 }, 298 },
274}; 299};
275#endif /* spi master and devices */ 300#endif /* spi master and devices */
@@ -309,6 +334,43 @@ static struct platform_device bfin_sport1_uart_device = {
309}; 334};
310#endif 335#endif
311 336
337#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
338#define PATA_INT 55
339
340static struct pata_platform_info bfin_pata_platform_data = {
341 .ioport_shift = 1,
342 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
343};
344
345static struct resource bfin_pata_resources[] = {
346 {
347 .start = 0x20314020,
348 .end = 0x2031403F,
349 .flags = IORESOURCE_MEM,
350 },
351 {
352 .start = 0x2031401C,
353 .end = 0x2031401F,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .start = PATA_INT,
358 .end = PATA_INT,
359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device bfin_pata_device = {
364 .name = "pata_platform",
365 .id = -1,
366 .num_resources = ARRAY_SIZE(bfin_pata_resources),
367 .resource = bfin_pata_resources,
368 .dev = {
369 .platform_data = &bfin_pata_platform_data,
370 }
371};
372#endif
373
312static struct platform_device *stamp_devices[] __initdata = { 374static struct platform_device *stamp_devices[] __initdata = {
313#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 375#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
314 &rtc_device, 376 &rtc_device,
@@ -318,12 +380,16 @@ static struct platform_device *stamp_devices[] __initdata = {
318 &smc91x_device, 380 &smc91x_device,
319#endif 381#endif
320 382
383#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
384 &bfin_fb_adv7393_device,
385#endif
386
321#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 387#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
322 &net2272_bfin_device, 388 &net2272_bfin_device,
323#endif 389#endif
324 390
325#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 391#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
326 &spi_bfin_master_device, 392 &bfin_spi0_device,
327#endif 393#endif
328 394
329#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 395#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
@@ -334,6 +400,10 @@ static struct platform_device *stamp_devices[] __initdata = {
334 &bfin_sport0_uart_device, 400 &bfin_sport0_uart_device,
335 &bfin_sport1_uart_device, 401 &bfin_sport1_uart_device,
336#endif 402#endif
403
404#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
405 &bfin_pata_device,
406#endif
337}; 407};
338 408
339static int __init stamp_init(void) 409static int __init stamp_init(void)
@@ -355,8 +425,23 @@ static int __init stamp_init(void)
355#endif 425#endif
356 426
357#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 427#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
358 return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 428 spi_register_board_info(bfin_spi_board_info,
429 ARRAY_SIZE(bfin_spi_board_info));
430#endif
431#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
432 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
359#endif 433#endif
434 return 0;
360} 435}
361 436
362arch_initcall(stamp_init); 437arch_initcall(stamp_init);
438
439void native_machine_restart(char *cmd)
440{
441#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
442# define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
443 bfin_write_FIO_INEN(~BIT_TO_SET);
444 bfin_write_FIO_DIR(BIT_TO_SET);
445 bfin_write_FIO_FLAG_C(BIT_TO_SET);
446#endif
447}
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 7dd0e9c3a936..1ded945a6fa0 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -32,11 +32,9 @@
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h> 33#include <asm/trace.h>
34#if CONFIG_BFIN_KERNEL_CLOCK 34#if CONFIG_BFIN_KERNEL_CLOCK
35#include <asm/mach-common/clocks.h>
35#include <asm/mach/mem_init.h> 36#include <asm/mach/mem_init.h>
36#endif 37#endif
37#if CONFIG_DEBUG_KERNEL_START
38#include <asm/mach-common/def_LPBlackfin.h>
39#endif
40 38
41.global __rambase 39.global __rambase
42.global __ramstart 40.global __ramstart
@@ -52,10 +50,12 @@ __INIT
52ENTRY(__start) 50ENTRY(__start)
53 /* R0: argument of command line string, passed from uboot, save it */ 51 /* R0: argument of command line string, passed from uboot, save it */
54 R7 = R0; 52 R7 = R0;
55 /* Set the SYSCFG register: 53 /* Enable Cycle Counter and Nesting Of Interrupts */
56 * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit) 54#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
57 */ 55 R0 = SYSCFG_SNEN;
58 R0 = 0x36; 56#else
57 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
58#endif
59 SYSCFG = R0; 59 SYSCFG = R0;
60 R0 = 0; 60 R0 = 0;
61 61
@@ -97,40 +97,10 @@ ENTRY(__start)
97 M2 = r0; 97 M2 = r0;
98 M3 = r0; 98 M3 = r0;
99 99
100 trace_buffer_start(p0,r0); 100 trace_buffer_init(p0,r0);
101 P0 = R1; 101 P0 = R1;
102 R0 = R1; 102 R0 = R1;
103 103
104#if CONFIG_DEBUG_KERNEL_START
105
106/*
107 * Set up a temporary Event Vector Table, so if something bad happens before
108 * the kernel is fully started, it doesn't vector off into the bootloaders
109 * table
110 */
111 P0.l = lo(EVT2);
112 P0.h = hi(EVT2);
113 P1.l = lo(EVT15);
114 P1.h = hi(EVT15);
115 P2.l = debug_kernel_start_trap;
116 P2.h = debug_kernel_start_trap;
117
118 RTS = P2;
119 RTI = P2;
120 RTX = P2;
121 RTN = P2;
122 RTE = P2;
123
124.Lfill_temp_vector_table:
125 [P0++] = P2; /* Core Event Vector Table */
126 CC = P0 == P1;
127 if !CC JUMP .Lfill_temp_vector_table
128 P0 = r0;
129 P1 = r0;
130 P2 = r0;
131
132#endif
133
134 p0.h = hi(FIO_MASKA_C); 104 p0.h = hi(FIO_MASKA_C);
135 p0.l = lo(FIO_MASKA_C); 105 p0.l = lo(FIO_MASKA_C);
136 r0 = 0xFFFF(Z); 106 r0 = 0xFFFF(Z);
@@ -144,38 +114,38 @@ ENTRY(__start)
144 ssync; 114 ssync;
145 115
146 /* Turn off the icache */ 116 /* Turn off the icache */
147 p0.l = (IMEM_CONTROL & 0xFFFF); 117 p0.l = LO(IMEM_CONTROL);
148 p0.h = (IMEM_CONTROL >> 16); 118 p0.h = HI(IMEM_CONTROL);
149 R1 = [p0]; 119 R1 = [p0];
150 R0 = ~ENICPLB; 120 R0 = ~ENICPLB;
151 R0 = R0 & R1; 121 R0 = R0 & R1;
152 122
153 /* Anomaly 05000125 */ 123 /* Anomaly 05000125 */
154#ifdef ANOMALY_05000125 124#if ANOMALY_05000125
155 CLI R2; 125 CLI R2;
156 SSYNC; 126 SSYNC;
157#endif 127#endif
158 [p0] = R0; 128 [p0] = R0;
159 SSYNC; 129 SSYNC;
160#ifdef ANOMALY_05000125 130#if ANOMALY_05000125
161 STI R2; 131 STI R2;
162#endif 132#endif
163 133
164 /* Turn off the dcache */ 134 /* Turn off the dcache */
165 p0.l = (DMEM_CONTROL & 0xFFFF); 135 p0.l = LO(DMEM_CONTROL);
166 p0.h = (DMEM_CONTROL >> 16); 136 p0.h = HI(DMEM_CONTROL);
167 R1 = [p0]; 137 R1 = [p0];
168 R0 = ~ENDCPLB; 138 R0 = ~ENDCPLB;
169 R0 = R0 & R1; 139 R0 = R0 & R1;
170 140
171 /* Anomaly 05000125 */ 141 /* Anomaly 05000125 */
172#ifdef ANOMALY_05000125 142#if ANOMALY_05000125
173 CLI R2; 143 CLI R2;
174 SSYNC; 144 SSYNC;
175#endif 145#endif
176 [p0] = R0; 146 [p0] = R0;
177 SSYNC; 147 SSYNC;
178#ifdef ANOMALY_05000125 148#if ANOMALY_05000125
179 STI R2; 149 STI R2;
180#endif 150#endif
181 151
@@ -211,6 +181,12 @@ ENTRY(__start)
211 fp = sp; 181 fp = sp;
212 usp = sp; 182 usp = sp;
213 183
184#ifdef CONFIG_EARLY_PRINTK
185 SP += -12;
186 call _init_early_exception_vectors;
187 SP += 12;
188#endif
189
214 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 190 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
215 call _bf53x_relocate_l1_mem; 191 call _bf53x_relocate_l1_mem;
216#if CONFIG_BFIN_KERNEL_CLOCK 192#if CONFIG_BFIN_KERNEL_CLOCK
@@ -264,7 +240,7 @@ ENTRY(__start)
264 p0.l = .LWAIT_HERE; 240 p0.l = .LWAIT_HERE;
265 p0.h = .LWAIT_HERE; 241 p0.h = .LWAIT_HERE;
266 reti = p0; 242 reti = p0;
267#if defined(ANOMALY_05000281) 243#if ANOMALY_05000281
268 nop; nop; nop; 244 nop; nop; nop;
269#endif 245#endif
270 rti; 246 rti;
@@ -417,8 +393,8 @@ ENTRY(_start_dma_code)
417 w[p0] = r0.l; 393 w[p0] = r0.l;
418 ssync; 394 ssync;
419 395
420 p0.l = (EBIU_SDBCTL & 0xFFFF); 396 p0.l = LO(EBIU_SDBCTL);
421 p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */ 397 p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
422 r0 = mem_SDBCTL; 398 r0 = mem_SDBCTL;
423 w[p0] = r0.l; 399 w[p0] = r0.l;
424 ssync; 400 ssync;
@@ -456,276 +432,6 @@ ENTRY(_start_dma_code)
456ENDPROC(_start_dma_code) 432ENDPROC(_start_dma_code)
457#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 433#endif /* CONFIG_BFIN_KERNEL_CLOCK */
458 434
459ENTRY(_bfin_reset)
460 /* No more interrupts to be handled*/
461 CLI R6;
462 SSYNC;
463
464#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
465 p0.h = hi(FIO_INEN);
466 p0.l = lo(FIO_INEN);
467 r0.l = ~(1 << CONFIG_ENET_FLASH_PIN);
468 w[p0] = r0.l;
469
470 p0.h = hi(FIO_DIR);
471 p0.l = lo(FIO_DIR);
472 r0.l = (1 << CONFIG_ENET_FLASH_PIN);
473 w[p0] = r0.l;
474
475 p0.h = hi(FIO_FLAG_C);
476 p0.l = lo(FIO_FLAG_C);
477 r0.l = (1 << CONFIG_ENET_FLASH_PIN);
478 w[p0] = r0.l;
479#endif
480
481 /* Clear the IMASK register */
482 p0.h = hi(IMASK);
483 p0.l = lo(IMASK);
484 r0 = 0x0;
485 [p0] = r0;
486
487 /* Clear the ILAT register */
488 p0.h = hi(ILAT);
489 p0.l = lo(ILAT);
490 r0 = [p0];
491 [p0] = r0;
492 SSYNC;
493
494 /* make sure SYSCR is set to use BMODE */
495 P0.h = hi(SYSCR);
496 P0.l = lo(SYSCR);
497 R0.l = 0x0;
498 W[P0] = R0.l;
499 SSYNC;
500
501 /* issue a system soft reset */
502 P1.h = hi(SWRST);
503 P1.l = lo(SWRST);
504 R1.l = 0x0007;
505 W[P1] = R1;
506 SSYNC;
507
508 /* clear system soft reset */
509 R0.l = 0x0000;
510 W[P0] = R0;
511 SSYNC;
512
513 /* issue core reset */
514 raise 1;
515
516 RTS;
517ENDPROC(_bfin_reset)
518
519#if CONFIG_DEBUG_KERNEL_START
520debug_kernel_start_trap:
521 /* Set up a temp stack in L1 - SDRAM might not be working */
522 P0.L = lo(L1_DATA_A_START + 0x100);
523 P0.H = hi(L1_DATA_A_START + 0x100);
524 SP = P0;
525
526 /* Make sure the Clocks are the way I think they should be */
527 r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */
528 r0 = r0 << 9; /* Shift it over, */
529 r1 = CLKIN_HALF; /* Do we need to divide CLKIN by 2?*/
530 r0 = r1 | r0;
531 r1 = PLL_BYPASS; /* Bypass the PLL? */
532 r1 = r1 << 8; /* Shift it over */
533 r0 = r1 | r0; /* add them all together */
534
535 p0.h = hi(PLL_CTL);
536 p0.l = lo(PLL_CTL); /* Load the address */
537 cli r2; /* Disable interrupts */
538 ssync;
539 w[p0] = r0.l; /* Set the value */
540 idle; /* Wait for the PLL to stablize */
541 sti r2; /* Enable interrupts */
542
543.Lcheck_again1:
544 p0.h = hi(PLL_STAT);
545 p0.l = lo(PLL_STAT);
546 R0 = W[P0](Z);
547 CC = BITTST(R0,5);
548 if ! CC jump .Lcheck_again1;
549
550 /* Configure SCLK & CCLK Dividers */
551 r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
552 p0.h = hi(PLL_DIV);
553 p0.l = lo(PLL_DIV);
554 w[p0] = r0.l;
555 ssync;
556
557 /* Make sure UART is enabled - you can never be sure */
558
559/*
560 * Setup for console. Argument comes from the menuconfig
561 */
562
563#ifdef CONFIG_BAUD_9600
564#define CONSOLE_BAUD_RATE 9600
565#elif CONFIG_BAUD_19200
566#define CONSOLE_BAUD_RATE 19200
567#elif CONFIG_BAUD_38400
568#define CONSOLE_BAUD_RATE 38400
569#elif CONFIG_BAUD_57600
570#define CONSOLE_BAUD_RATE 57600
571#elif CONFIG_BAUD_115200
572#define CONSOLE_BAUD_RATE 115200
573#endif
574
575 p0.h = hi(UART_GCTL);
576 p0.l = lo(UART_GCTL);
577 r0 = 0x00(Z);
578 w[p0] = r0.L; /* To Turn off UART clocks */
579 ssync;
580
581 p0.h = hi(UART_LCR);
582 p0.l = lo(UART_LCR);
583 r0 = 0x83(Z);
584 w[p0] = r0.L; /* To enable DLL writes */
585 ssync;
586
587 R1 = (((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / CONFIG_SCLK_DIV) / (CONSOLE_BAUD_RATE * 16));
588
589 p0.h = hi(UART_DLL);
590 p0.l = lo(UART_DLL);
591 r0 = 0xFF(Z);
592 r0 = R1 & R0;
593 w[p0] = r0.L;
594 ssync;
595
596 p0.h = hi(UART_DLH);
597 p0.l = lo(UART_DLH);
598 r1 >>= 8 ;
599 w[p0] = r1.L;
600 ssync;
601
602 p0.h = hi(UART_GCTL);
603 p0.l = lo(UART_GCTL);
604 r0 = 0x0(Z);
605 w[p0] = r0.L; /* To enable UART clock */
606 ssync;
607
608 p0.h = hi(UART_LCR);
609 p0.l = lo(UART_LCR);
610 r0 = 0x03(Z);
611 w[p0] = r0.L; /* To Turn on UART */
612 ssync;
613
614 p0.h = hi(UART_GCTL);
615 p0.l = lo(UART_GCTL);
616 r0 = 0x01(Z);
617 w[p0] = r0.L; /* To Turn on UART Clocks */
618 ssync;
619
620 P0.h = hi(UART_THR);
621 P0.l = lo(UART_THR);
622 P1.h = hi(UART_LSR);
623 P1.l = lo(UART_LSR);
624
625 R0.L = 'K';
626 call .Lwait_char;
627 R0.L='e';
628 call .Lwait_char;
629 R0.L='r';
630 call .Lwait_char;
631 R0.L='n'
632 call .Lwait_char;
633 R0.L='e'
634 call .Lwait_char;
635 R0.L='l';
636 call .Lwait_char;
637 R0.L=' ';
638 call .Lwait_char;
639 R0.L='c';
640 call .Lwait_char;
641 R0.L='r';
642 call .Lwait_char;
643 R0.L='a';
644 call .Lwait_char;
645 R0.L='s';
646 call .Lwait_char;
647 R0.L='h';
648 call .Lwait_char;
649 R0.L='\r';
650 call .Lwait_char;
651 R0.L='\n';
652 call .Lwait_char;
653
654 R0.L='S';
655 call .Lwait_char;
656 R0.L='E';
657 call .Lwait_char;
658 R0.L='Q'
659 call .Lwait_char;
660 R0.L='S'
661 call .Lwait_char;
662 R0.L='T';
663 call .Lwait_char;
664 R0.L='A';
665 call .Lwait_char;
666 R0.L='T';
667 call .Lwait_char;
668 R0.L='=';
669 call .Lwait_char;
670 R2 = SEQSTAT;
671 call .Ldump_reg;
672
673 R0.L=' ';
674 call .Lwait_char;
675 R0.L='R';
676 call .Lwait_char;
677 R0.L='E'
678 call .Lwait_char;
679 R0.L='T'
680 call .Lwait_char;
681 R0.L='X';
682 call .Lwait_char;
683 R0.L='=';
684 call .Lwait_char;
685 R2 = RETX;
686 call .Ldump_reg;
687
688 R0.L='\r';
689 call .Lwait_char;
690 R0.L='\n';
691 call .Lwait_char;
692
693.Ldebug_kernel_start_trap_done:
694 JUMP .Ldebug_kernel_start_trap_done;
695.Ldump_reg:
696 R3 = 32;
697 R4 = 0x0F;
698 R5 = ':'; /* one past 9 */
699
700.Ldump_reg2:
701 R0 = R2;
702 R3 += -4;
703 R0 >>>= R3;
704 R0 = R0 & R4;
705 R0 += 0x30;
706 CC = R0 <= R5;
707 if CC JUMP .Ldump_reg1;
708 R0 += 7;
709
710.Ldump_reg1:
711 R1.l = W[P1];
712 CC = BITTST(R1, 5);
713 if !CC JUMP .Ldump_reg1;
714 W[P0] = r0;
715
716 CC = R3 == 0;
717 if !CC JUMP .Ldump_reg2
718 RTS;
719
720.Lwait_char:
721 R1.l = W[P1];
722 CC = BITTST(R1, 5);
723 if !CC JUMP .Lwait_char;
724 W[P0] = r0;
725 RTS;
726
727#endif /* CONFIG_DEBUG_KERNEL_START */
728
729.data 435.data
730 436
731/* 437/*
diff --git a/arch/blackfin/mach-bf537/Kconfig b/arch/blackfin/mach-bf537/Kconfig
index cc9ae38a4dda..e6648db09519 100644
--- a/arch/blackfin/mach-bf537/Kconfig
+++ b/arch/blackfin/mach-bf537/Kconfig
@@ -2,33 +2,6 @@ if (BF537 || BF534 || BF536)
2 2
3menu "BF537 Specific Configuration" 3menu "BF537 Specific Configuration"
4 4
5comment "PORT F/G Selection"
6choice
7 prompt "Select BF537/6/4 default GPIO PFx PORTx"
8 help
9 Quick Hack for BF537/6/4 default GPIO PFx PORTF.
10
11config BF537_PORT_F
12 bool "Select BF537/6/4 default GPIO PFx PORTF"
13 depends on (BF537 || BF536 || BF534)
14 help
15 Quick Hack for BF537/6/4 default GPIO PFx PORTF.
16
17config BF537_PORT_G
18 bool "Select BF537/6/4 default GPIO PFx PORTG"
19 depends on (BF537 || BF536 || BF534)
20 help
21 Quick Hack for BF537/6/4 default GPIO PFx PORTG.
22
23config BF537_PORT_H
24 bool "Select BF537/6/4 default GPIO PFx PORTH"
25 depends on (BF537 || BF536 || BF534)
26 help
27 Quick Hack for BF537/6/4 default GPIO PFx PORTH
28 Use only when Blackfin EMAC support is not required.
29
30endchoice
31
32comment "Interrupt Priority Assignment" 5comment "Interrupt Priority Assignment"
33menu "Priority" 6menu "Priority"
34 7
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index a8f947b72754..44dea05e1d03 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,7 +35,9 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/usb_isp1362.h> 37#include <linux/usb_isp1362.h>
38#include <linux/pata_platform.h>
38#include <linux/irq.h> 39#include <linux/irq.h>
40#include <asm/dma.h>
39#include <asm/bfin5xx_spi.h> 41#include <asm/bfin5xx_spi.h>
40 42
41/* 43/*
@@ -113,7 +115,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
113 /* the modalias must be the same as spi device driver name */ 115 /* the modalias must be the same as spi device driver name */
114 .modalias = "m25p80", /* Name of spi_driver for this device */ 116 .modalias = "m25p80", /* Name of spi_driver for this device */
115 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 117 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
116 .bus_num = 1, /* Framework bus number */ 118 .bus_num = 0, /* Framework bus number */
117 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 119 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
118 .platform_data = &bfin_spi_flash_data, 120 .platform_data = &bfin_spi_flash_data,
119 .controller_data = &spi_flash_chip_info, 121 .controller_data = &spi_flash_chip_info,
@@ -125,7 +127,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
125 { 127 {
126 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 128 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
127 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 129 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
128 .bus_num = 1, /* Framework bus number */ 130 .bus_num = 0, /* Framework bus number */
129 .chip_select = 1, /* Framework chip select. */ 131 .chip_select = 1, /* Framework chip select. */
130 .platform_data = NULL, /* No spi_driver specific config */ 132 .platform_data = NULL, /* No spi_driver specific config */
131 .controller_data = &spi_adc_chip_info, 133 .controller_data = &spi_adc_chip_info,
@@ -136,7 +138,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
136 { 138 {
137 .modalias = "ad1836-spi", 139 .modalias = "ad1836-spi",
138 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 140 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
139 .bus_num = 1, 141 .bus_num = 0,
140 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 142 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
141 .controller_data = &ad1836_spi_chip_info, 143 .controller_data = &ad1836_spi_chip_info,
142 }, 144 },
@@ -146,7 +148,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
146 { 148 {
147 .modalias = "ad9960-spi", 149 .modalias = "ad9960-spi",
148 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 150 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
149 .bus_num = 1, 151 .bus_num = 0,
150 .chip_select = 1, 152 .chip_select = 1,
151 .controller_data = &ad9960_spi_chip_info, 153 .controller_data = &ad9960_spi_chip_info,
152 }, 154 },
@@ -156,7 +158,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
156 { 158 {
157 .modalias = "spi_mmc_dummy", 159 .modalias = "spi_mmc_dummy",
158 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 160 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
159 .bus_num = 1, 161 .bus_num = 0,
160 .chip_select = 7, 162 .chip_select = 7,
161 .platform_data = NULL, 163 .platform_data = NULL,
162 .controller_data = &spi_mmc_chip_info, 164 .controller_data = &spi_mmc_chip_info,
@@ -165,7 +167,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
165 { 167 {
166 .modalias = "spi_mmc", 168 .modalias = "spi_mmc",
167 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 169 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
168 .bus_num = 1, 170 .bus_num = 0,
169 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 171 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
170 .platform_data = NULL, 172 .platform_data = NULL,
171 .controller_data = &spi_mmc_chip_info, 173 .controller_data = &spi_mmc_chip_info,
@@ -174,17 +176,33 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
174#endif 176#endif
175}; 177};
176 178
179/* SPI (0) */
180static struct resource bfin_spi0_resource[] = {
181 [0] = {
182 .start = SPI0_REGBASE,
183 .end = SPI0_REGBASE + 0xFF,
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = CH_SPI,
188 .end = CH_SPI,
189 .flags = IORESOURCE_IRQ,
190 }
191};
192
177/* SPI controller data */ 193/* SPI controller data */
178static struct bfin5xx_spi_master spi_bfin_master_info = { 194static struct bfin5xx_spi_master bfin_spi0_info = {
179 .num_chipselect = 8, 195 .num_chipselect = 8,
180 .enable_dma = 1, /* master has the ability to do dma transfer */ 196 .enable_dma = 1, /* master has the ability to do dma transfer */
181}; 197};
182 198
183static struct platform_device spi_bfin_master_device = { 199static struct platform_device bfin_spi0_device = {
184 .name = "bfin-spi-master", 200 .name = "bfin-spi",
185 .id = 1, /* Bus number */ 201 .id = 0, /* Bus number */
202 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
203 .resource = bfin_spi0_resource,
186 .dev = { 204 .dev = {
187 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 205 .platform_data = &bfin_spi0_info, /* Passed to driver */
188 }, 206 },
189}; 207};
190#endif /* spi master and devices */ 208#endif /* spi master and devices */
@@ -316,6 +334,43 @@ static struct platform_device bfin_mac_device = {
316}; 334};
317#endif 335#endif
318 336
337#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
338#define PATA_INT 64
339
340static struct pata_platform_info bfin_pata_platform_data = {
341 .ioport_shift = 2,
342 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
343};
344
345static struct resource bfin_pata_resources[] = {
346 {
347 .start = 0x2030C000,
348 .end = 0x2030C01F,
349 .flags = IORESOURCE_MEM,
350 },
351 {
352 .start = 0x2030D018,
353 .end = 0x2030D01B,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .start = PATA_INT,
358 .end = PATA_INT,
359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device bfin_pata_device = {
364 .name = "pata_platform",
365 .id = -1,
366 .num_resources = ARRAY_SIZE(bfin_pata_resources),
367 .resource = bfin_pata_resources,
368 .dev = {
369 .platform_data = &bfin_pata_platform_data,
370 }
371};
372#endif
373
319static struct platform_device *cm_bf537_devices[] __initdata = { 374static struct platform_device *cm_bf537_devices[] __initdata = {
320#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 375#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
321 &rtc_device, 376 &rtc_device,
@@ -347,7 +402,11 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
347#endif 402#endif
348 403
349#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 404#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
350 &spi_bfin_master_device, 405 &bfin_spi0_device,
406#endif
407
408#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
409 &bfin_pata_device,
351#endif 410#endif
352}; 411};
353 412
@@ -358,6 +417,10 @@ static int __init cm_bf537_init(void)
358#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 417#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
359 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 418 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
360#endif 419#endif
420
421#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
422 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
423#endif
361 return 0; 424 return 0;
362} 425}
363 426
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index 648d984e98d6..5e9d09eb8579 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -8,7 +8,7 @@
8 * 8 *
9 * Modified: 9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA) 10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc. 11 * Copyright 2004-2007 Analog Devices Inc.
12 * 12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * 14 *
@@ -34,20 +34,74 @@
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
37#include <linux/usb_isp1362.h> 38#include <linux/usb_isp1362.h>
39#endif
40#include <linux/pata_platform.h>
38#include <linux/irq.h> 41#include <linux/irq.h>
42#include <linux/interrupt.h>
39#include <linux/usb_sl811.h> 43#include <linux/usb_sl811.h>
44#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h>
47#include <linux/spi/ad7877.h>
41 48
42/* 49/*
43 * Name the Board for the /proc/cpuinfo 50 * Name the Board for the /proc/cpuinfo
44 */ 51 */
45char *bfin_board_name = "UNKNOWN BOARD"; 52char *bfin_board_name = "GENERIC Board";
46 53
47/* 54/*
48 * Driver needs to know address, irq and flag pin. 55 * Driver needs to know address, irq and flag pin.
49 */ 56 */
50 57
58#define ISP1761_BASE 0x203C0000
59#define ISP1761_IRQ IRQ_PF7
60
61#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
62static struct resource bfin_isp1761_resources[] = {
63 [0] = {
64 .name = "isp1761-regs",
65 .start = ISP1761_BASE + 0x00000000,
66 .end = ISP1761_BASE + 0x000fffff,
67 .flags = IORESOURCE_MEM,
68 },
69 [1] = {
70 .start = ISP1761_IRQ,
71 .end = ISP1761_IRQ,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct platform_device bfin_isp1761_device = {
77 .name = "isp1761",
78 .id = 0,
79 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
80 .resource = bfin_isp1761_resources,
81};
82
83static struct platform_device *bfin_isp1761_devices[] = {
84 &bfin_isp1761_device,
85};
86
87int __init bfin_isp1761_init(void)
88{
89 unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
90
91 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
92 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
93
94 return platform_add_devices(bfin_isp1761_devices, num_devices);
95}
96
97void __exit bfin_isp1761_exit(void)
98{
99 platform_device_unregister(&bfin_isp1761_device);
100}
101
102arch_initcall(bfin_isp1761_init);
103#endif
104
51#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 105#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
52static struct resource bfin_pcmcia_cf_resources[] = { 106static struct resource bfin_pcmcia_cf_resources[] = {
53 { 107 {
@@ -59,10 +113,6 @@ static struct resource bfin_pcmcia_cf_resources[] = {
59 .end = 0x20311FFF, 113 .end = 0x20311FFF,
60 .flags = IORESOURCE_MEM, 114 .flags = IORESOURCE_MEM,
61 }, { 115 }, {
62 .start = IRQ_PROG_INTA,
63 .end = IRQ_PROG_INTA,
64 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
65 }, {
66 .start = IRQ_PF4, 116 .start = IRQ_PF4,
67 .end = IRQ_PF4, 117 .end = IRQ_PF4,
68 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 118 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
@@ -96,14 +146,7 @@ static struct resource smc91x_resources[] = {
96 .end = 0x20300300 + 16, 146 .end = 0x20300300 + 16,
97 .flags = IORESOURCE_MEM, 147 .flags = IORESOURCE_MEM,
98 }, { 148 }, {
99 .start = IRQ_PROG_INTB, 149
100 .end = IRQ_PROG_INTB,
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
102 }, {
103 /*
104 * denotes the flag pin and is used directly if
105 * CONFIG_IRQCHIP_DEMUX_GPIO is defined.
106 */
107 .start = IRQ_PF7, 150 .start = IRQ_PF7,
108 .end = IRQ_PF7, 151 .end = IRQ_PF7,
109 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 152 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -117,6 +160,28 @@ static struct platform_device smc91x_device = {
117}; 160};
118#endif 161#endif
119 162
163#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
164static struct resource dm9000_resources[] = {
165 [0] = {
166 .start = 0x203FB800,
167 .end = 0x203FB800 + 8,
168 .flags = IORESOURCE_MEM,
169 },
170 [1] = {
171 .start = IRQ_PF9,
172 .end = IRQ_PF9,
173 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
174 },
175};
176
177static struct platform_device dm9000_device = {
178 .name = "dm9000",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(dm9000_resources),
181 .resource = dm9000_resources,
182};
183#endif
184
120#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) 185#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
121static struct resource sl811_hcd_resources[] = { 186static struct resource sl811_hcd_resources[] = {
122 { 187 {
@@ -128,12 +193,8 @@ static struct resource sl811_hcd_resources[] = {
128 .end = 0x20340004, 193 .end = 0x20340004,
129 .flags = IORESOURCE_MEM, 194 .flags = IORESOURCE_MEM,
130 }, { 195 }, {
131 .start = IRQ_PROG_INTA, 196 .start = CONFIG_USB_SL811_BFIN_IRQ,
132 .end = IRQ_PROG_INTA, 197 .end = CONFIG_USB_SL811_BFIN_IRQ,
133 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
134 }, {
135 .start = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
136 .end = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 198 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
138 }, 199 },
139}; 200};
@@ -141,21 +202,19 @@ static struct resource sl811_hcd_resources[] = {
141#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 202#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
142void sl811_port_power(struct device *dev, int is_on) 203void sl811_port_power(struct device *dev, int is_on)
143{ 204{
144 unsigned short mask = (1<<CONFIG_USB_SL811_BFIN_GPIO_VBUS); 205 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
145 206 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
146 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
147 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
148 207
149 if (is_on) 208 if (is_on)
150 bfin_write_FIO_FLAG_S(mask); 209 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
151 else 210 else
152 bfin_write_FIO_FLAG_C(mask); 211 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
153} 212}
154#endif 213#endif
155 214
156static struct sl811_platform_data sl811_priv = { 215static struct sl811_platform_data sl811_priv = {
157 .potpg = 10, 216 .potpg = 10,
158 .power = 250, /* == 500mA */ 217 .power = 250, /* == 500mA */
159#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 218#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
160 .port_power = &sl811_port_power, 219 .port_power = &sl811_port_power,
161#endif 220#endif
@@ -170,7 +229,6 @@ static struct platform_device sl811_hcd_device = {
170 .num_resources = ARRAY_SIZE(sl811_hcd_resources), 229 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
171 .resource = sl811_hcd_resources, 230 .resource = sl811_hcd_resources,
172}; 231};
173
174#endif 232#endif
175 233
176#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 234#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
@@ -184,13 +242,9 @@ static struct resource isp1362_hcd_resources[] = {
184 .end = 0x20360004, 242 .end = 0x20360004,
185 .flags = IORESOURCE_MEM, 243 .flags = IORESOURCE_MEM,
186 }, { 244 }, {
187 .start = IRQ_PROG_INTA, 245 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
188 .end = IRQ_PROG_INTA, 246 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
189 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 247 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
190 }, {
191 .start = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
192 .end = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
193 .flags = IORESOURCE_IRQ,
194 }, 248 },
195}; 249};
196 250
@@ -246,7 +300,8 @@ static struct platform_device net2272_bfin_device = {
246#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 300#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
247/* all SPI peripherals info goes here */ 301/* all SPI peripherals info goes here */
248 302
249#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 303#if defined(CONFIG_MTD_M25P80) \
304 || defined(CONFIG_MTD_M25P80_MODULE)
250static struct mtd_partition bfin_spi_flash_partitions[] = { 305static struct mtd_partition bfin_spi_flash_partitions[] = {
251 { 306 {
252 .name = "bootloader", 307 .name = "bootloader",
@@ -302,70 +357,198 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
302}; 357};
303#endif 358#endif
304 359
360#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
361static struct bfin5xx_spi_chip spi_mmc_chip_info = {
362 .enable_dma = 1,
363 .bits_per_word = 8,
364};
365#endif
366
367#if defined(CONFIG_PBX)
368static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
369 .ctl_reg = 0x4, /* send zero */
370 .enable_dma = 0,
371 .bits_per_word = 8,
372 .cs_change_per_word = 1,
373};
374#endif
375
376#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
377static struct bfin5xx_spi_chip ad5304_chip_info = {
378 .enable_dma = 0,
379 .bits_per_word = 16,
380};
381#endif
382
383#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
384static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
385 .enable_dma = 0,
386 .bits_per_word = 16,
387};
388
389static const struct ad7877_platform_data bfin_ad7877_ts_info = {
390 .model = 7877,
391 .vref_delay_usecs = 50, /* internal, no capacitor */
392 .x_plate_ohms = 419,
393 .y_plate_ohms = 486,
394 .pressure_max = 1000,
395 .pressure_min = 0,
396 .stopacq_polarity = 1,
397 .first_conversion_delay = 3,
398 .acquisition_time = 1,
399 .averaging = 1,
400 .pen_down_acc_interval = 1,
401};
402#endif
403
305static struct spi_board_info bfin_spi_board_info[] __initdata = { 404static struct spi_board_info bfin_spi_board_info[] __initdata = {
306#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 405#if defined(CONFIG_MTD_M25P80) \
406 || defined(CONFIG_MTD_M25P80_MODULE)
307 { 407 {
308 /* the modalias must be the same as spi device driver name */ 408 /* the modalias must be the same as spi device driver name */
309 .modalias = "m25p80", /* Name of spi_driver for this device */ 409 .modalias = "m25p80", /* Name of spi_driver for this device */
310 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 410 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
311 .bus_num = 1, /* Framework bus number */ 411 .bus_num = 0, /* Framework bus number */
312 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 412 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
313 .platform_data = &bfin_spi_flash_data, 413 .platform_data = &bfin_spi_flash_data,
314 .controller_data = &spi_flash_chip_info, 414 .controller_data = &spi_flash_chip_info,
315 .mode = SPI_MODE_3, 415 .mode = SPI_MODE_3,
316 }, 416 },
317#endif 417#endif
318 418
319#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) 419#if defined(CONFIG_SPI_ADC_BF533) \
420 || defined(CONFIG_SPI_ADC_BF533_MODULE)
320 { 421 {
321 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 422 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
322 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 423 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
323 .bus_num = 1, /* Framework bus number */ 424 .bus_num = 0, /* Framework bus number */
324 .chip_select = 1, /* Framework chip select. */ 425 .chip_select = 1, /* Framework chip select. */
325 .platform_data = NULL, /* No spi_driver specific config */ 426 .platform_data = NULL, /* No spi_driver specific config */
326 .controller_data = &spi_adc_chip_info, 427 .controller_data = &spi_adc_chip_info,
327 }, 428 },
328#endif 429#endif
329 430
330#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 431#if defined(CONFIG_SND_BLACKFIN_AD1836) \
432 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
331 { 433 {
332 .modalias = "ad1836-spi", 434 .modalias = "ad1836-spi",
333 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 435 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
334 .bus_num = 1, 436 .bus_num = 0,
335 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 437 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
336 .controller_data = &ad1836_spi_chip_info, 438 .controller_data = &ad1836_spi_chip_info,
337 }, 439 },
338#endif 440#endif
339
340#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) 441#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
341 { 442 {
342 .modalias = "ad9960-spi", 443 .modalias = "ad9960-spi",
343 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 444 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 1, 445 .bus_num = 0,
345 .chip_select = 1, 446 .chip_select = 1,
346 .controller_data = &ad9960_spi_chip_info, 447 .controller_data = &ad9960_spi_chip_info,
347 }, 448 },
348#endif 449#endif
450#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
451 {
452 .modalias = "spi_mmc_dummy",
453 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
454 .bus_num = 0,
455 .chip_select = 0,
456 .platform_data = NULL,
457 .controller_data = &spi_mmc_chip_info,
458 .mode = SPI_MODE_3,
459 },
460 {
461 .modalias = "spi_mmc",
462 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
463 .bus_num = 0,
464 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
465 .platform_data = NULL,
466 .controller_data = &spi_mmc_chip_info,
467 .mode = SPI_MODE_3,
468 },
469#endif
470#if defined(CONFIG_PBX)
471 {
472 .modalias = "fxs-spi",
473 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
474 .bus_num = 0,
475 .chip_select = 8 - CONFIG_J11_JUMPER,
476 .controller_data = &spi_si3xxx_chip_info,
477 .mode = SPI_MODE_3,
478 },
479 {
480 .modalias = "fxo-spi",
481 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
482 .bus_num = 0,
483 .chip_select = 8 - CONFIG_J19_JUMPER,
484 .controller_data = &spi_si3xxx_chip_info,
485 .mode = SPI_MODE_3,
486 },
487#endif
488#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
489 {
490 .modalias = "ad5304_spi",
491 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
492 .bus_num = 0,
493 .chip_select = 2,
494 .platform_data = NULL,
495 .controller_data = &ad5304_chip_info,
496 .mode = SPI_MODE_2,
497 },
498#endif
499#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
500 {
501 .modalias = "ad7877",
502 .platform_data = &bfin_ad7877_ts_info,
503 .irq = IRQ_PF6,
504 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
505 .bus_num = 1,
506 .chip_select = 1,
507 .controller_data = &spi_ad7877_chip_info,
508 },
509#endif
349}; 510};
350 511
351/* SPI controller data */ 512/* SPI controller data */
352static struct bfin5xx_spi_master spi_bfin_master_info = { 513static struct bfin5xx_spi_master bfin_spi0_info = {
353 .num_chipselect = 8, 514 .num_chipselect = 8,
354 .enable_dma = 1, /* master has the ability to do dma transfer */ 515 .enable_dma = 1, /* master has the ability to do dma transfer */
355}; 516};
356 517
357static struct platform_device spi_bfin_master_device = { 518/* SPI (0) */
358 .name = "bfin-spi-master", 519static struct resource bfin_spi0_resource[] = {
359 .id = 1, /* Bus number */ 520 [0] = {
521 .start = SPI0_REGBASE,
522 .end = SPI0_REGBASE + 0xFF,
523 .flags = IORESOURCE_MEM,
524 },
525 [1] = {
526 .start = CH_SPI,
527 .end = CH_SPI,
528 .flags = IORESOURCE_IRQ,
529 },
530};
531
532static struct platform_device bfin_spi0_device = {
533 .name = "bfin-spi",
534 .id = 0, /* Bus number */
535 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
536 .resource = bfin_spi0_resource,
360 .dev = { 537 .dev = {
361 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 538 .platform_data = &bfin_spi0_info, /* Passed to driver */
362 }, 539 },
363}; 540};
364#endif /* spi master and devices */ 541#endif /* spi master and devices */
365 542
366#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 543#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
367static struct platform_device bfin_fb_device = { 544static struct platform_device bfin_fb_device = {
368 .name = "bf537-fb", 545 .name = "bf537-lq035",
546};
547#endif
548
549#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
550static struct platform_device bfin_fb_adv7393_device = {
551 .name = "bfin-adv7393",
369}; 552};
370#endif 553#endif
371 554
@@ -390,15 +573,86 @@ static struct platform_device bfin_uart_device = {
390}; 573};
391#endif 574#endif
392 575
393static struct platform_device *stamp_devices[] __initdata = { 576#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
394#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 577static struct resource bfin_twi0_resource[] = {
395 &rtc_device, 578 [0] = {
579 .start = TWI0_REGBASE,
580 .end = TWI0_REGBASE + 0xFF,
581 .flags = IORESOURCE_MEM,
582 },
583 [1] = {
584 .start = IRQ_TWI,
585 .end = IRQ_TWI,
586 .flags = IORESOURCE_IRQ,
587 },
588};
589
590static struct platform_device i2c_bfin_twi_device = {
591 .name = "i2c-bfin-twi",
592 .id = 0,
593 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
594 .resource = bfin_twi0_resource,
595};
596#endif
597
598#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
599static struct platform_device bfin_sport0_uart_device = {
600 .name = "bfin-sport-uart",
601 .id = 0,
602};
603
604static struct platform_device bfin_sport1_uart_device = {
605 .name = "bfin-sport-uart",
606 .id = 1,
607};
608#endif
609
610#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
611#define PATA_INT 55
612
613static struct pata_platform_info bfin_pata_platform_data = {
614 .ioport_shift = 1,
615 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
616};
617
618static struct resource bfin_pata_resources[] = {
619 {
620 .start = 0x20314020,
621 .end = 0x2031403F,
622 .flags = IORESOURCE_MEM,
623 },
624 {
625 .start = 0x2031401C,
626 .end = 0x2031401F,
627 .flags = IORESOURCE_MEM,
628 },
629 {
630 .start = PATA_INT,
631 .end = PATA_INT,
632 .flags = IORESOURCE_IRQ,
633 },
634};
635
636static struct platform_device bfin_pata_device = {
637 .name = "pata_platform",
638 .id = -1,
639 .num_resources = ARRAY_SIZE(bfin_pata_resources),
640 .resource = bfin_pata_resources,
641 .dev = {
642 .platform_data = &bfin_pata_platform_data,
643 }
644};
396#endif 645#endif
397 646
647static struct platform_device *stamp_devices[] __initdata = {
398#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 648#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
399 &bfin_pcmcia_cf_device, 649 &bfin_pcmcia_cf_device,
400#endif 650#endif
401 651
652#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
653 &rtc_device,
654#endif
655
402#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) 656#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
403 &sl811_hcd_device, 657 &sl811_hcd_device,
404#endif 658#endif
@@ -411,6 +665,10 @@ static struct platform_device *stamp_devices[] __initdata = {
411 &smc91x_device, 665 &smc91x_device,
412#endif 666#endif
413 667
668#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
669 &dm9000_device,
670#endif
671
414#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 672#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
415 &bfin_mac_device, 673 &bfin_mac_device,
416#endif 674#endif
@@ -420,16 +678,33 @@ static struct platform_device *stamp_devices[] __initdata = {
420#endif 678#endif
421 679
422#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 680#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
423 &spi_bfin_master_device, 681 &bfin_spi0_device,
424#endif 682#endif
425 683
426#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 684#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
427 &bfin_fb_device, 685 &bfin_fb_device,
428#endif 686#endif
429 687
688#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
689 &bfin_fb_adv7393_device,
690#endif
691
430#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 692#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
431 &bfin_uart_device, 693 &bfin_uart_device,
432#endif 694#endif
695
696#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
697 &i2c_bfin_twi_device,
698#endif
699
700#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
701 &bfin_sport0_uart_device,
702 &bfin_sport1_uart_device,
703#endif
704
705#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
706 &bfin_pata_device,
707#endif
433}; 708};
434 709
435static int __init stamp_init(void) 710static int __init stamp_init(void)
@@ -437,9 +712,21 @@ static int __init stamp_init(void)
437 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 712 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
438 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 713 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
439#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 714#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
440 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 715 spi_register_board_info(bfin_spi_board_info,
716 ARRAY_SIZE(bfin_spi_board_info));
717#endif
718
719#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
720 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
441#endif 721#endif
442 return 0; 722 return 0;
443} 723}
444 724
445arch_initcall(stamp_init); 725arch_initcall(stamp_init);
726
727void native_machine_restart(char *cmd)
728{
729 /* workaround reboot hang when booting from SPI */
730 if ((bfin_read_SYSCR() & 0x7) == 0x3)
731 bfin_gpio_reset_spi0_ssel1();
732}
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 8806f1230f2d..20507e92a3a4 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -38,6 +38,7 @@
38#include <linux/usb_isp1362.h> 38#include <linux/usb_isp1362.h>
39#endif 39#endif
40#include <linux/irq.h> 40#include <linux/irq.h>
41#include <asm/dma.h>
41#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
42#include <linux/usb_sl811.h> 43#include <linux/usb_sl811.h>
43 44
@@ -130,15 +131,13 @@ static struct resource sl811_hcd_resources[] = {
130#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 131#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
131void sl811_port_power(struct device *dev, int is_on) 132void sl811_port_power(struct device *dev, int is_on)
132{ 133{
133 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS); 134 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
134 135 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
135 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
136 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
137 136
138 if (is_on) 137 if (is_on)
139 bfin_write_FIO_FLAG_S(mask); 138 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
140 else 139 else
141 bfin_write_FIO_FLAG_C(mask); 140 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
142} 141}
143#endif 142#endif
144 143
@@ -323,7 +322,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
323 /* the modalias must be the same as spi device driver name */ 322 /* the modalias must be the same as spi device driver name */
324 .modalias = "m25p80", /* Name of spi_driver for this device */ 323 .modalias = "m25p80", /* Name of spi_driver for this device */
325 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 324 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
326 .bus_num = 1, /* Framework bus number */ 325 .bus_num = 0, /* Framework bus number */
327 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 326 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
328 .platform_data = &bfin_spi_flash_data, 327 .platform_data = &bfin_spi_flash_data,
329 .controller_data = &spi_flash_chip_info, 328 .controller_data = &spi_flash_chip_info,
@@ -336,7 +335,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
336 { 335 {
337 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 336 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
338 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 337 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
339 .bus_num = 1, /* Framework bus number */ 338 .bus_num = 0, /* Framework bus number */
340 .chip_select = 1, /* Framework chip select. */ 339 .chip_select = 1, /* Framework chip select. */
341 .platform_data = NULL, /* No spi_driver specific config */ 340 .platform_data = NULL, /* No spi_driver specific config */
342 .controller_data = &spi_adc_chip_info, 341 .controller_data = &spi_adc_chip_info,
@@ -348,7 +347,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
348 { 347 {
349 .modalias = "ad1836-spi", 348 .modalias = "ad1836-spi",
350 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 349 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
351 .bus_num = 1, 350 .bus_num = 0,
352 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 351 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
353 .controller_data = &ad1836_spi_chip_info, 352 .controller_data = &ad1836_spi_chip_info,
354 }, 353 },
@@ -357,7 +356,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
357 { 356 {
358 .modalias = "ad9960-spi", 357 .modalias = "ad9960-spi",
359 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 358 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
360 .bus_num = 1, 359 .bus_num = 0,
361 .chip_select = 1, 360 .chip_select = 1,
362 .controller_data = &ad9960_spi_chip_info, 361 .controller_data = &ad9960_spi_chip_info,
363 }, 362 },
@@ -366,7 +365,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
366 { 365 {
367 .modalias = "spi_mmc_dummy", 366 .modalias = "spi_mmc_dummy",
368 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 367 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
369 .bus_num = 1, 368 .bus_num = 0,
370 .chip_select = 7, 369 .chip_select = 7,
371 .platform_data = NULL, 370 .platform_data = NULL,
372 .controller_data = &spi_mmc_chip_info, 371 .controller_data = &spi_mmc_chip_info,
@@ -375,7 +374,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
375 { 374 {
376 .modalias = "spi_mmc", 375 .modalias = "spi_mmc",
377 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 376 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
378 .bus_num = 1, 377 .bus_num = 0,
379 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 378 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
380 .platform_data = NULL, 379 .platform_data = NULL,
381 .controller_data = &spi_mmc_chip_info, 380 .controller_data = &spi_mmc_chip_info,
@@ -396,24 +395,40 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
396 395
397}; 396};
398 397
398/* SPI (0) */
399static struct resource bfin_spi0_resource[] = {
400 [0] = {
401 .start = SPI0_REGBASE,
402 .end = SPI0_REGBASE + 0xFF,
403 .flags = IORESOURCE_MEM,
404 },
405 [1] = {
406 .start = CH_SPI,
407 .end = CH_SPI,
408 .flags = IORESOURCE_IRQ,
409 }
410};
411
399/* SPI controller data */ 412/* SPI controller data */
400static struct bfin5xx_spi_master spi_bfin_master_info = { 413static struct bfin5xx_spi_master bfin_spi0_info = {
401 .num_chipselect = 8, 414 .num_chipselect = 8,
402 .enable_dma = 1, /* master has the ability to do dma transfer */ 415 .enable_dma = 1, /* master has the ability to do dma transfer */
403}; 416};
404 417
405static struct platform_device spi_bfin_master_device = { 418static struct platform_device bfin_spi0_device = {
406 .name = "bfin-spi-master", 419 .name = "bfin-spi",
407 .id = 1, /* Bus number */ 420 .id = 0, /* Bus number */
421 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
422 .resource = bfin_spi0_resource,
408 .dev = { 423 .dev = {
409 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 424 .platform_data = &bfin_spi0_info, /* Passed to driver */
410 }, 425 },
411}; 426};
412#endif /* spi master and devices */ 427#endif /* spi master and devices */
413 428
414#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 429#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
415static struct platform_device bfin_fb_device = { 430static struct platform_device bfin_fb_device = {
416 .name = "bf537-fb", 431 .name = "bf537-lq035",
417}; 432};
418#endif 433#endif
419 434
@@ -469,7 +484,7 @@ static struct platform_device *stamp_devices[] __initdata = {
469#endif 484#endif
470 485
471#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 486#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
472 &spi_bfin_master_device, 487 &bfin_spi0_device,
473#endif 488#endif
474 489
475#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 490#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 9c43d7756510..47d7d4a0e73d 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -37,10 +37,13 @@
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb_isp1362.h> 38#include <linux/usb_isp1362.h>
39#endif 39#endif
40#include <linux/pata_platform.h>
40#include <linux/irq.h> 41#include <linux/irq.h>
41#include <linux/interrupt.h> 42#include <linux/interrupt.h>
42#include <linux/usb_sl811.h> 43#include <linux/usb_sl811.h>
44#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h>
44#include <linux/spi/ad7877.h> 47#include <linux/spi/ad7877.h>
45 48
46/* 49/*
@@ -199,15 +202,13 @@ static struct resource sl811_hcd_resources[] = {
199#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 202#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
200void sl811_port_power(struct device *dev, int is_on) 203void sl811_port_power(struct device *dev, int is_on)
201{ 204{
202 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS); 205 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
203 206 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
204 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
205 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
206 207
207 if (is_on) 208 if (is_on)
208 bfin_write_FIO_FLAG_S(mask); 209 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
209 else 210 else
210 bfin_write_FIO_FLAG_C(mask); 211 gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
211} 212}
212#endif 213#endif
213 214
@@ -407,7 +408,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
407 /* the modalias must be the same as spi device driver name */ 408 /* the modalias must be the same as spi device driver name */
408 .modalias = "m25p80", /* Name of spi_driver for this device */ 409 .modalias = "m25p80", /* Name of spi_driver for this device */
409 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 410 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
410 .bus_num = 1, /* Framework bus number */ 411 .bus_num = 0, /* Framework bus number */
411 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 412 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
412 .platform_data = &bfin_spi_flash_data, 413 .platform_data = &bfin_spi_flash_data,
413 .controller_data = &spi_flash_chip_info, 414 .controller_data = &spi_flash_chip_info,
@@ -420,7 +421,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
420 { 421 {
421 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 422 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
422 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 423 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
423 .bus_num = 1, /* Framework bus number */ 424 .bus_num = 0, /* Framework bus number */
424 .chip_select = 1, /* Framework chip select. */ 425 .chip_select = 1, /* Framework chip select. */
425 .platform_data = NULL, /* No spi_driver specific config */ 426 .platform_data = NULL, /* No spi_driver specific config */
426 .controller_data = &spi_adc_chip_info, 427 .controller_data = &spi_adc_chip_info,
@@ -432,7 +433,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
432 { 433 {
433 .modalias = "ad1836-spi", 434 .modalias = "ad1836-spi",
434 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 435 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
435 .bus_num = 1, 436 .bus_num = 0,
436 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 437 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
437 .controller_data = &ad1836_spi_chip_info, 438 .controller_data = &ad1836_spi_chip_info,
438 }, 439 },
@@ -441,7 +442,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
441 { 442 {
442 .modalias = "ad9960-spi", 443 .modalias = "ad9960-spi",
443 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 444 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
444 .bus_num = 1, 445 .bus_num = 0,
445 .chip_select = 1, 446 .chip_select = 1,
446 .controller_data = &ad9960_spi_chip_info, 447 .controller_data = &ad9960_spi_chip_info,
447 }, 448 },
@@ -450,7 +451,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
450 { 451 {
451 .modalias = "spi_mmc_dummy", 452 .modalias = "spi_mmc_dummy",
452 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 453 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
453 .bus_num = 1, 454 .bus_num = 0,
454 .chip_select = 0, 455 .chip_select = 0,
455 .platform_data = NULL, 456 .platform_data = NULL,
456 .controller_data = &spi_mmc_chip_info, 457 .controller_data = &spi_mmc_chip_info,
@@ -459,7 +460,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
459 { 460 {
460 .modalias = "spi_mmc", 461 .modalias = "spi_mmc",
461 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 462 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
462 .bus_num = 1, 463 .bus_num = 0,
463 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 464 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
464 .platform_data = NULL, 465 .platform_data = NULL,
465 .controller_data = &spi_mmc_chip_info, 466 .controller_data = &spi_mmc_chip_info,
@@ -470,16 +471,16 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
470 { 471 {
471 .modalias = "fxs-spi", 472 .modalias = "fxs-spi",
472 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 473 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
473 .bus_num = 1, 474 .bus_num = 0,
474 .chip_select = 3, 475 .chip_select = 8 - CONFIG_J11_JUMPER,
475 .controller_data = &spi_si3xxx_chip_info, 476 .controller_data = &spi_si3xxx_chip_info,
476 .mode = SPI_MODE_3, 477 .mode = SPI_MODE_3,
477 }, 478 },
478 { 479 {
479 .modalias = "fxo-spi", 480 .modalias = "fxo-spi",
480 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 481 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
481 .bus_num = 1, 482 .bus_num = 0,
482 .chip_select = 2, 483 .chip_select = 8 - CONFIG_J19_JUMPER,
483 .controller_data = &spi_si3xxx_chip_info, 484 .controller_data = &spi_si3xxx_chip_info,
484 .mode = SPI_MODE_3, 485 .mode = SPI_MODE_3,
485 }, 486 },
@@ -488,7 +489,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
488 { 489 {
489 .modalias = "ad5304_spi", 490 .modalias = "ad5304_spi",
490 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ 491 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
491 .bus_num = 1, 492 .bus_num = 0,
492 .chip_select = 2, 493 .chip_select = 2,
493 .platform_data = NULL, 494 .platform_data = NULL,
494 .controller_data = &ad5304_chip_info, 495 .controller_data = &ad5304_chip_info,
@@ -509,23 +510,45 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
509}; 510};
510 511
511/* SPI controller data */ 512/* SPI controller data */
512static struct bfin5xx_spi_master spi_bfin_master_info = { 513static struct bfin5xx_spi_master bfin_spi0_info = {
513 .num_chipselect = 8, 514 .num_chipselect = 8,
514 .enable_dma = 1, /* master has the ability to do dma transfer */ 515 .enable_dma = 1, /* master has the ability to do dma transfer */
515}; 516};
516 517
517static struct platform_device spi_bfin_master_device = { 518/* SPI (0) */
518 .name = "bfin-spi-master", 519static struct resource bfin_spi0_resource[] = {
519 .id = 1, /* Bus number */ 520 [0] = {
521 .start = SPI0_REGBASE,
522 .end = SPI0_REGBASE + 0xFF,
523 .flags = IORESOURCE_MEM,
524 },
525 [1] = {
526 .start = CH_SPI,
527 .end = CH_SPI,
528 .flags = IORESOURCE_IRQ,
529 },
530};
531
532static struct platform_device bfin_spi0_device = {
533 .name = "bfin-spi",
534 .id = 0, /* Bus number */
535 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
536 .resource = bfin_spi0_resource,
520 .dev = { 537 .dev = {
521 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 538 .platform_data = &bfin_spi0_info, /* Passed to driver */
522 }, 539 },
523}; 540};
524#endif /* spi master and devices */ 541#endif /* spi master and devices */
525 542
526#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 543#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
527static struct platform_device bfin_fb_device = { 544static struct platform_device bfin_fb_device = {
528 .name = "bf537-fb", 545 .name = "bf537-lq035",
546};
547#endif
548
549#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
550static struct platform_device bfin_fb_adv7393_device = {
551 .name = "bfin-adv7393",
529}; 552};
530#endif 553#endif
531 554
@@ -551,9 +574,24 @@ static struct platform_device bfin_uart_device = {
551#endif 574#endif
552 575
553#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 576#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
577static struct resource bfin_twi0_resource[] = {
578 [0] = {
579 .start = TWI0_REGBASE,
580 .end = TWI0_REGBASE,
581 .flags = IORESOURCE_MEM,
582 },
583 [1] = {
584 .start = IRQ_TWI,
585 .end = IRQ_TWI,
586 .flags = IORESOURCE_IRQ,
587 },
588};
589
554static struct platform_device i2c_bfin_twi_device = { 590static struct platform_device i2c_bfin_twi_device = {
555 .name = "i2c-bfin-twi", 591 .name = "i2c-bfin-twi",
556 .id = 0, 592 .id = 0,
593 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
594 .resource = bfin_twi0_resource,
557}; 595};
558#endif 596#endif
559 597
@@ -569,6 +607,43 @@ static struct platform_device bfin_sport1_uart_device = {
569}; 607};
570#endif 608#endif
571 609
610#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
611#define PATA_INT 55
612
613static struct pata_platform_info bfin_pata_platform_data = {
614 .ioport_shift = 1,
615 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
616};
617
618static struct resource bfin_pata_resources[] = {
619 {
620 .start = 0x20314020,
621 .end = 0x2031403F,
622 .flags = IORESOURCE_MEM,
623 },
624 {
625 .start = 0x2031401C,
626 .end = 0x2031401F,
627 .flags = IORESOURCE_MEM,
628 },
629 {
630 .start = PATA_INT,
631 .end = PATA_INT,
632 .flags = IORESOURCE_IRQ,
633 },
634};
635
636static struct platform_device bfin_pata_device = {
637 .name = "pata_platform",
638 .id = -1,
639 .num_resources = ARRAY_SIZE(bfin_pata_resources),
640 .resource = bfin_pata_resources,
641 .dev = {
642 .platform_data = &bfin_pata_platform_data,
643 }
644};
645#endif
646
572static struct platform_device *stamp_devices[] __initdata = { 647static struct platform_device *stamp_devices[] __initdata = {
573#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 648#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
574 &bfin_pcmcia_cf_device, 649 &bfin_pcmcia_cf_device,
@@ -603,13 +678,17 @@ static struct platform_device *stamp_devices[] __initdata = {
603#endif 678#endif
604 679
605#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 680#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
606 &spi_bfin_master_device, 681 &bfin_spi0_device,
607#endif 682#endif
608 683
609#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 684#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
610 &bfin_fb_device, 685 &bfin_fb_device,
611#endif 686#endif
612 687
688#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
689 &bfin_fb_adv7393_device,
690#endif
691
613#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 692#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
614 &bfin_uart_device, 693 &bfin_uart_device,
615#endif 694#endif
@@ -622,6 +701,10 @@ static struct platform_device *stamp_devices[] __initdata = {
622 &bfin_sport0_uart_device, 701 &bfin_sport0_uart_device,
623 &bfin_sport1_uart_device, 702 &bfin_sport1_uart_device,
624#endif 703#endif
704
705#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
706 &bfin_pata_device,
707#endif
625}; 708};
626 709
627static int __init stamp_init(void) 710static int __init stamp_init(void)
@@ -632,7 +715,18 @@ static int __init stamp_init(void)
632 spi_register_board_info(bfin_spi_board_info, 715 spi_register_board_info(bfin_spi_board_info,
633 ARRAY_SIZE(bfin_spi_board_info)); 716 ARRAY_SIZE(bfin_spi_board_info));
634#endif 717#endif
718
719#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
720 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
721#endif
635 return 0; 722 return 0;
636} 723}
637 724
638arch_initcall(stamp_init); 725arch_initcall(stamp_init);
726
727void native_machine_restart(char *cmd)
728{
729 /* workaround reboot hang when booting from SPI */
730 if ((bfin_read_SYSCR() & 0x7) == 0x3)
731 bfin_gpio_reset_spi0_ssel1();
732}
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 429c8a1019da..3014fe8dd155 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -33,6 +33,7 @@
33#include <asm/trace.h> 33#include <asm/trace.h>
34 34
35#if CONFIG_BFIN_KERNEL_CLOCK 35#if CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h>
36#include <asm/mach/mem_init.h> 37#include <asm/mach/mem_init.h>
37#endif 38#endif
38 39
@@ -50,10 +51,12 @@ __INIT
50ENTRY(__start) 51ENTRY(__start)
51 /* R0: argument of command line string, passed from uboot, save it */ 52 /* R0: argument of command line string, passed from uboot, save it */
52 R7 = R0; 53 R7 = R0;
53 /* Set the SYSCFG register: 54 /* Enable Cycle Counter and Nesting Of Interrupts */
54 * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit) 55#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
55 */ 56 R0 = SYSCFG_SNEN;
56 R0 = 0x36; 57#else
58 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
59#endif
57 SYSCFG = R0; 60 SYSCFG = R0;
58 R0 = 0; 61 R0 = 0;
59 62
@@ -95,43 +98,43 @@ ENTRY(__start)
95 M2 = r0; 98 M2 = r0;
96 M3 = r0; 99 M3 = r0;
97 100
98 trace_buffer_start(p0,r0); 101 trace_buffer_init(p0,r0);
99 P0 = R1; 102 P0 = R1;
100 R0 = R1; 103 R0 = R1;
101 104
102 /* Turn off the icache */ 105 /* Turn off the icache */
103 p0.l = (IMEM_CONTROL & 0xFFFF); 106 p0.l = LO(IMEM_CONTROL);
104 p0.h = (IMEM_CONTROL >> 16); 107 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0]; 108 R1 = [p0];
106 R0 = ~ENICPLB; 109 R0 = ~ENICPLB;
107 R0 = R0 & R1; 110 R0 = R0 & R1;
108 111
109 /* Anomaly 05000125 */ 112 /* Anomaly 05000125 */
110#ifdef ANOMALY_05000125 113#if ANOMALY_05000125
111 CLI R2; 114 CLI R2;
112 SSYNC; 115 SSYNC;
113#endif 116#endif
114 [p0] = R0; 117 [p0] = R0;
115 SSYNC; 118 SSYNC;
116#ifdef ANOMALY_05000125 119#if ANOMALY_05000125
117 STI R2; 120 STI R2;
118#endif 121#endif
119 122
120 /* Turn off the dcache */ 123 /* Turn off the dcache */
121 p0.l = (DMEM_CONTROL & 0xFFFF); 124 p0.l = LO(DMEM_CONTROL);
122 p0.h = (DMEM_CONTROL >> 16); 125 p0.h = HI(DMEM_CONTROL);
123 R1 = [p0]; 126 R1 = [p0];
124 R0 = ~ENDCPLB; 127 R0 = ~ENDCPLB;
125 R0 = R0 & R1; 128 R0 = R0 & R1;
126 129
127 /* Anomaly 05000125 */ 130 /* Anomaly 05000125 */
128#ifdef ANOMALY_05000125 131#if ANOMALY_05000125
129 CLI R2; 132 CLI R2;
130 SSYNC; 133 SSYNC;
131#endif 134#endif
132 [p0] = R0; 135 [p0] = R0;
133 SSYNC; 136 SSYNC;
134#ifdef ANOMALY_05000125 137#if ANOMALY_05000125
135 STI R2; 138 STI R2;
136#endif 139#endif
137 140
@@ -141,12 +144,12 @@ ENTRY(__start)
141 */ 144 */
142 p0.h = hi(BFIN_PORT_MUX); 145 p0.h = hi(BFIN_PORT_MUX);
143 p0.l = lo(BFIN_PORT_MUX); 146 p0.l = lo(BFIN_PORT_MUX);
144#ifdef ANOMALY_05000212 147#if ANOMALY_05000212
145 R0.L = W[P0]; /* Read */ 148 R0.L = W[P0]; /* Read */
146 SSYNC; 149 SSYNC;
147#endif 150#endif
148 R0 = (PGDE_UART | PFTE_UART)(Z); 151 R0 = (PGDE_UART | PFTE_UART)(Z);
149#ifdef ANOMALY_05000212 152#if ANOMALY_05000212
150 W[P0] = R0.L; /* Write */ 153 W[P0] = R0.L; /* Write */
151 SSYNC; 154 SSYNC;
152#endif 155#endif
@@ -155,12 +158,12 @@ ENTRY(__start)
155 158
156 p0.h = hi(PORTF_FER); 159 p0.h = hi(PORTF_FER);
157 p0.l = lo(PORTF_FER); 160 p0.l = lo(PORTF_FER);
158#ifdef ANOMALY_05000212 161#if ANOMALY_05000212
159 R0.L = W[P0]; /* Read */ 162 R0.L = W[P0]; /* Read */
160 SSYNC; 163 SSYNC;
161#endif 164#endif
162 R0 = 0x000F(Z); 165 R0 = 0x000F(Z);
163#ifdef ANOMALY_05000212 166#if ANOMALY_05000212
164 W[P0] = R0.L; /* Write */ 167 W[P0] = R0.L; /* Write */
165 SSYNC; 168 SSYNC;
166#endif 169#endif
@@ -221,6 +224,12 @@ ENTRY(__start)
221 fp = sp; 224 fp = sp;
222 usp = sp; 225 usp = sp;
223 226
227#ifdef CONFIG_EARLY_PRINTK
228 SP += -12;
229 call _init_early_exception_vectors;
230 SP += 12;
231#endif
232
224 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 233 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
225 call _bf53x_relocate_l1_mem; 234 call _bf53x_relocate_l1_mem;
226#if CONFIG_BFIN_KERNEL_CLOCK 235#if CONFIG_BFIN_KERNEL_CLOCK
@@ -274,7 +283,7 @@ ENTRY(__start)
274 p0.l = .LWAIT_HERE; 283 p0.l = .LWAIT_HERE;
275 p0.h = .LWAIT_HERE; 284 p0.h = .LWAIT_HERE;
276 reti = p0; 285 reti = p0;
277#if defined(ANOMALY_05000281) 286#if ANOMALY_05000281
278 nop; nop; nop; 287 nop; nop; nop;
279#endif 288#endif
280 rti; 289 rti;
@@ -436,8 +445,8 @@ ENTRY(_start_dma_code)
436 w[p0] = r0.l; 445 w[p0] = r0.l;
437 ssync; 446 ssync;
438 447
439 p0.l = (EBIU_SDBCTL & 0xFFFF); 448 p0.l = LO(EBIU_SDBCTL);
440 p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */ 449 p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
441 r0 = mem_SDBCTL; 450 r0 = mem_SDBCTL;
442 w[p0] = r0.l; 451 w[p0] = r0.l;
443 ssync; 452 ssync;
@@ -475,85 +484,6 @@ ENTRY(_start_dma_code)
475ENDPROC(_start_dma_code) 484ENDPROC(_start_dma_code)
476#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 485#endif /* CONFIG_BFIN_KERNEL_CLOCK */
477 486
478ENTRY(_bfin_reset)
479 /* No more interrupts to be handled*/
480 CLI R6;
481 SSYNC;
482
483#if defined(CONFIG_MTD_M25P80)
484 /*
485 * The following code fix the SPI flash reboot issue,
486 * /CS signal of the chip which is using PF10 return to GPIO mode
487 */
488 p0.h = hi(PORTF_FER);
489 p0.l = lo(PORTF_FER);
490 r0.l = 0x0000;
491 w[p0] = r0.l;
492 SSYNC;
493
494 /* /CS return to high */
495 p0.h = hi(PORTFIO);
496 p0.l = lo(PORTFIO);
497 r0.l = 0xFFFF;
498 w[p0] = r0.l;
499 SSYNC;
500
501 /* Delay some time, This is necessary */
502 r1.h = 0;
503 r1.l = 0x400;
504 p1 = r1;
505 lsetup (.L_delay_lab1, .L_delay_lab1_end) lc1 = p1;
506.L_delay_lab1:
507 r0.h = 0;
508 r0.l = 0x8000;
509 p0 = r0;
510 lsetup (.L_delay_lab0, .L_delay_lab0_end) lc0 = p0;
511.L_delay_lab0:
512 nop;
513.L_delay_lab0_end:
514 nop;
515.L_delay_lab1_end:
516 nop;
517#endif
518
519 /* Clear the IMASK register */
520 p0.h = hi(IMASK);
521 p0.l = lo(IMASK);
522 r0 = 0x0;
523 [p0] = r0;
524
525 /* Clear the ILAT register */
526 p0.h = hi(ILAT);
527 p0.l = lo(ILAT);
528 r0 = [p0];
529 [p0] = r0;
530 SSYNC;
531
532 /* make sure SYSCR is set to use BMODE */
533 P0.h = hi(SYSCR);
534 P0.l = lo(SYSCR);
535 R0.l = 0x0;
536 W[P0] = R0.l;
537 SSYNC;
538
539 /* issue a system soft reset */
540 P1.h = hi(SWRST);
541 P1.l = lo(SWRST);
542 R1.l = 0x0007;
543 W[P1] = R1;
544 SSYNC;
545
546 /* clear system soft reset */
547 R0.l = 0x0000;
548 W[P0] = R0;
549 SSYNC;
550
551 /* issue core reset */
552 raise 1;
553
554 RTS;
555ENDPROC(_bfin_reset)
556
557.data 487.data
558 488
559/* 489/*
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index e78b03d56c7c..08d8dc83701c 100644
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -2,6 +2,13 @@ if (BF54x)
2 2
3menu "BF548 Specific Configuration" 3menu "BF548 Specific Configuration"
4 4
5config DEB_DMA_URGENT
6 bool "DMA has priority over core for ext. accesses"
7 depends on BF54x
8 default n
9 help
10 Treat any DEB1, DEB2 and DEB3 request as Urgent
11
5comment "Interrupt Priority Assignment" 12comment "Interrupt Priority Assignment"
6menu "Priority" 13menu "Priority"
7 14
@@ -282,7 +289,7 @@ menu "Assignment"
282 289
283config PINTx_REASSIGN 290config PINTx_REASSIGN
284 bool "Reprogram PINT Assignment" 291 bool "Reprogram PINT Assignment"
285 default n 292 default y
286 help 293 help
287 The interrupt assignment registers controls the pin-to-interrupt 294 The interrupt assignment registers controls the pin-to-interrupt
288 assignment in a byte-wide manner. Each option allows you to select 295 assignment in a byte-wide manner. Each option allows you to select
@@ -303,7 +310,7 @@ config PINT1_ASSIGN
303config PINT2_ASSIGN 310config PINT2_ASSIGN
304 hex "PINT2_ASSIGN" 311 hex "PINT2_ASSIGN"
305 depends on PINTx_REASSIGN 312 depends on PINTx_REASSIGN
306 default 0x00000101 313 default 0x07000101
307config PINT3_ASSIGN 314config PINT3_ASSIGN
308 hex "PINT3_ASSIGN" 315 hex "PINT3_ASSIGN"
309 depends on PINTx_REASSIGN 316 depends on PINTx_REASSIGN
diff --git a/arch/blackfin/mach-bf548/Makefile b/arch/blackfin/mach-bf548/Makefile
index 060ad78ebf1d..7e7c9c8ac5b2 100644
--- a/arch/blackfin/mach-bf548/Makefile
+++ b/arch/blackfin/mach-bf548/Makefile
@@ -4,6 +4,6 @@
4 4
5extra-y := head.o 5extra-y := head.o
6 6
7obj-y := ints-priority.o dma.o gpio.o 7obj-y := ints-priority.o dma.o
8 8
9obj-$(CONFIG_CPU_FREQ) += cpu.o 9obj-$(CONFIG_CPU_FREQ) += cpu.o
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 96ad95fab1a8..2c47db494f7d 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -35,9 +35,16 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/irq.h>
39#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#include <linux/usb/musb.h>
40#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h>
42#include <asm/dma.h>
43#include <asm/gpio.h>
44#include <asm/nand.h>
45#include <asm/mach/bf54x_keys.h>
46#include <linux/input.h>
47#include <linux/spi/ad7877.h>
41 48
42/* 49/*
43 * Name the Board for the /proc/cpuinfo 50 * Name the Board for the /proc/cpuinfo
@@ -48,6 +55,88 @@ char *bfin_board_name = "ADSP-BF548-EZKIT";
48 * Driver needs to know address, irq and flag pin. 55 * Driver needs to know address, irq and flag pin.
49 */ 56 */
50 57
58#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
59
60#include <asm/mach/bf54x-lq043.h>
61
62static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
63 .width = 480,
64 .height = 272,
65 .xres = {480, 480, 480},
66 .yres = {272, 272, 272},
67 .bpp = {24, 24, 24},
68 .disp = GPIO_PE3,
69};
70
71static struct resource bf54x_lq043_resources[] = {
72 {
73 .start = IRQ_EPPI0_ERR,
74 .end = IRQ_EPPI0_ERR,
75 .flags = IORESOURCE_IRQ,
76 },
77};
78
79static struct platform_device bf54x_lq043_device = {
80 .name = "bf54x-lq043",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
83 .resource = bf54x_lq043_resources,
84 .dev = {
85 .platform_data = &bf54x_lq043_data,
86 },
87};
88#endif
89
90#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
91static int bf548_keymap[] = {
92 KEYVAL(0, 0, KEY_ENTER),
93 KEYVAL(0, 1, KEY_HELP),
94 KEYVAL(0, 2, KEY_0),
95 KEYVAL(0, 3, KEY_BACKSPACE),
96 KEYVAL(1, 0, KEY_TAB),
97 KEYVAL(1, 1, KEY_9),
98 KEYVAL(1, 2, KEY_8),
99 KEYVAL(1, 3, KEY_7),
100 KEYVAL(2, 0, KEY_DOWN),
101 KEYVAL(2, 1, KEY_6),
102 KEYVAL(2, 2, KEY_5),
103 KEYVAL(2, 3, KEY_4),
104 KEYVAL(3, 0, KEY_UP),
105 KEYVAL(3, 1, KEY_3),
106 KEYVAL(3, 2, KEY_2),
107 KEYVAL(3, 3, KEY_1),
108};
109
110static struct bfin_kpad_platform_data bf54x_kpad_data = {
111 .rows = 4,
112 .cols = 4,
113 .keymap = bf548_keymap,
114 .keymapsize = ARRAY_SIZE(bf548_keymap),
115 .repeat = 0,
116 .debounce_time = 5000, /* ns (5ms) */
117 .coldrive_time = 1000, /* ns (1ms) */
118 .keyup_test_interval = 50, /* ms (50ms) */
119};
120
121static struct resource bf54x_kpad_resources[] = {
122 {
123 .start = IRQ_KEY,
124 .end = IRQ_KEY,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129static struct platform_device bf54x_kpad_device = {
130 .name = "bf54x-keys",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
133 .resource = bf54x_kpad_resources,
134 .dev = {
135 .platform_data = &bf54x_kpad_data,
136 },
137};
138#endif
139
51#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 140#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
52static struct platform_device rtc_device = { 141static struct platform_device rtc_device = {
53 .name = "rtc-bfin", 142 .name = "rtc-bfin",
@@ -94,6 +183,344 @@ static struct platform_device bfin_uart_device = {
94}; 183};
95#endif 184#endif
96 185
186#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
187static struct resource smsc911x_resources[] = {
188 {
189 .name = "smsc911x-memory",
190 .start = 0x24000000,
191 .end = 0x24000000 + 0xFF,
192 .flags = IORESOURCE_MEM,
193 },
194 {
195 .start = IRQ_PE8,
196 .end = IRQ_PE8,
197 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
198 },
199};
200static struct platform_device smsc911x_device = {
201 .name = "smsc911x",
202 .id = 0,
203 .num_resources = ARRAY_SIZE(smsc911x_resources),
204 .resource = smsc911x_resources,
205};
206#endif
207
208#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE)
209static struct resource bf54x_hcd_resources[] = {
210 {
211 .start = 0xFFC03C00,
212 .end = 0xFFC040FF,
213 .flags = IORESOURCE_MEM,
214 },
215};
216
217static struct platform_device bf54x_hcd = {
218 .name = "bf54x-hcd",
219 .id = 0,
220 .num_resources = ARRAY_SIZE(bf54x_hcd_resources),
221 .resource = bf54x_hcd_resources,
222};
223#endif
224
225#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
226static struct resource musb_resources[] = {
227 [0] = {
228 .start = 0xFFC03C00,
229 .end = 0xFFC040FF,
230 .flags = IORESOURCE_MEM,
231 },
232 [1] = { /* general IRQ */
233 .start = IRQ_USB_INT0,
234 .end = IRQ_USB_INT0,
235 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
236 },
237 [2] = { /* DMA IRQ */
238 .start = IRQ_USB_DMA,
239 .end = IRQ_USB_DMA,
240 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
241 },
242};
243
244static struct musb_hdrc_platform_data musb_plat = {
245#ifdef CONFIG_USB_MUSB_OTG
246 .mode = MUSB_OTG,
247#elif CONFIG_USB_MUSB_HDRC_HCD
248 .mode = MUSB_HOST,
249#elif CONFIG_USB_GADGET_MUSB_HDRC
250 .mode = MUSB_PERIPHERAL,
251#endif
252 .multipoint = 1,
253};
254
255static u64 musb_dmamask = ~(u32)0;
256
257static struct platform_device musb_device = {
258 .name = "musb_hdrc",
259 .id = 0,
260 .dev = {
261 .dma_mask = &musb_dmamask,
262 .coherent_dma_mask = 0xffffffff,
263 .platform_data = &musb_plat,
264 },
265 .num_resources = ARRAY_SIZE(musb_resources),
266 .resource = musb_resources,
267};
268#endif
269
270#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
271static struct resource bfin_atapi_resources[] = {
272 {
273 .start = 0xFFC03800,
274 .end = 0xFFC0386F,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = IRQ_ATAPI_ERR,
279 .end = IRQ_ATAPI_ERR,
280 .flags = IORESOURCE_IRQ,
281 },
282};
283
284static struct platform_device bfin_atapi_device = {
285 .name = "pata-bf54x",
286 .id = -1,
287 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
288 .resource = bfin_atapi_resources,
289};
290#endif
291
292#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
293static struct mtd_partition partition_info[] = {
294 {
295 .name = "Linux Kernel",
296 .offset = 0,
297 .size = 4 * SIZE_1M,
298 },
299 {
300 .name = "File System",
301 .offset = 4 * SIZE_1M,
302 .size = (256 - 4) * SIZE_1M,
303 },
304};
305
306static struct bf5xx_nand_platform bf5xx_nand_platform = {
307 .page_size = NFC_PG_SIZE_256,
308 .data_width = NFC_NWIDTH_8,
309 .partitions = partition_info,
310 .nr_partitions = ARRAY_SIZE(partition_info),
311 .rd_dly = 3,
312 .wr_dly = 3,
313};
314
315static struct resource bf5xx_nand_resources[] = {
316 {
317 .start = 0xFFC03B00,
318 .end = 0xFFC03B4F,
319 .flags = IORESOURCE_MEM,
320 },
321 {
322 .start = CH_NFC,
323 .end = CH_NFC,
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
328static struct platform_device bf5xx_nand_device = {
329 .name = "bf5xx-nand",
330 .id = 0,
331 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
332 .resource = bf5xx_nand_resources,
333 .dev = {
334 .platform_data = &bf5xx_nand_platform,
335 },
336};
337#endif
338
339#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN)
340static struct platform_device bf54x_sdh_device = {
341 .name = "bfin-sdh",
342 .id = 0,
343};
344#endif
345
346#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
347/* all SPI peripherals info goes here */
348#if defined(CONFIG_MTD_M25P80) \
349 || defined(CONFIG_MTD_M25P80_MODULE)
350/* SPI flash chip (m25p16) */
351static struct mtd_partition bfin_spi_flash_partitions[] = {
352 {
353 .name = "bootloader",
354 .size = 0x00040000,
355 .offset = 0,
356 .mask_flags = MTD_CAP_ROM
357 }, {
358 .name = "linux kernel",
359 .size = 0x1c0000,
360 .offset = 0x40000
361 }
362};
363
364static struct flash_platform_data bfin_spi_flash_data = {
365 .name = "m25p80",
366 .parts = bfin_spi_flash_partitions,
367 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
368 .type = "m25p16",
369};
370
371static struct bfin5xx_spi_chip spi_flash_chip_info = {
372 .enable_dma = 0, /* use dma transfer with this chip*/
373 .bits_per_word = 8,
374 .cs_change_per_word = 0,
375};
376#endif
377
378#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
379static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
380 .cs_change_per_word = 1,
381 .enable_dma = 0,
382 .bits_per_word = 16,
383};
384
385static const struct ad7877_platform_data bfin_ad7877_ts_info = {
386 .model = 7877,
387 .vref_delay_usecs = 50, /* internal, no capacitor */
388 .x_plate_ohms = 419,
389 .y_plate_ohms = 486,
390 .pressure_max = 1000,
391 .pressure_min = 0,
392 .stopacq_polarity = 1,
393 .first_conversion_delay = 3,
394 .acquisition_time = 1,
395 .averaging = 1,
396 .pen_down_acc_interval = 1,
397};
398#endif
399
400static struct spi_board_info bf54x_spi_board_info[] __initdata = {
401#if defined(CONFIG_MTD_M25P80) \
402 || defined(CONFIG_MTD_M25P80_MODULE)
403 {
404 /* the modalias must be the same as spi device driver name */
405 .modalias = "m25p80", /* Name of spi_driver for this device */
406 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
407 .bus_num = 0, /* Framework bus number */
408 .chip_select = 1, /* SPI_SSEL1*/
409 .platform_data = &bfin_spi_flash_data,
410 .controller_data = &spi_flash_chip_info,
411 .mode = SPI_MODE_3,
412 },
413#endif
414#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
415{
416 .modalias = "ad7877",
417 .platform_data = &bfin_ad7877_ts_info,
418 .irq = IRQ_PJ11,
419 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
420 .bus_num = 0,
421 .chip_select = 2,
422 .controller_data = &spi_ad7877_chip_info,
423},
424#endif
425};
426
427/* SPI (0) */
428static struct resource bfin_spi0_resource[] = {
429 [0] = {
430 .start = SPI0_REGBASE,
431 .end = SPI0_REGBASE + 0xFF,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = CH_SPI0,
436 .end = CH_SPI0,
437 .flags = IORESOURCE_IRQ,
438 }
439};
440
441/* SPI (1) */
442static struct resource bfin_spi1_resource[] = {
443 [0] = {
444 .start = SPI1_REGBASE,
445 .end = SPI1_REGBASE + 0xFF,
446 .flags = IORESOURCE_MEM,
447 },
448 [1] = {
449 .start = CH_SPI1,
450 .end = CH_SPI1,
451 .flags = IORESOURCE_IRQ,
452 }
453};
454
455/* SPI controller data */
456static struct bfin5xx_spi_master bf54x_spi_master_info = {
457 .num_chipselect = 8,
458 .enable_dma = 1, /* master has the ability to do dma transfer */
459};
460
461static struct platform_device bf54x_spi_master0 = {
462 .name = "bfin-spi",
463 .id = 0, /* Bus number */
464 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
465 .resource = bfin_spi0_resource,
466 .dev = {
467 .platform_data = &bf54x_spi_master_info, /* Passed to driver */
468 },
469};
470
471static struct platform_device bf54x_spi_master1 = {
472 .name = "bfin-spi",
473 .id = 1, /* Bus number */
474 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
475 .resource = bfin_spi1_resource,
476 .dev = {
477 .platform_data = &bf54x_spi_master_info, /* Passed to driver */
478 },
479};
480#endif /* spi master and devices */
481
482#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
483static struct resource bfin_twi0_resource[] = {
484 [0] = {
485 .start = TWI0_REGBASE,
486 .end = TWI0_REGBASE + 0xFF,
487 .flags = IORESOURCE_MEM,
488 },
489 [1] = {
490 .start = IRQ_TWI0,
491 .end = IRQ_TWI0,
492 .flags = IORESOURCE_IRQ,
493 },
494};
495
496static struct platform_device i2c_bfin_twi0_device = {
497 .name = "i2c-bfin-twi",
498 .id = 0,
499 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
500 .resource = bfin_twi0_resource,
501};
502
503static struct resource bfin_twi1_resource[] = {
504 [0] = {
505 .start = TWI1_REGBASE,
506 .end = TWI1_REGBASE + 0xFF,
507 .flags = IORESOURCE_MEM,
508 },
509 [1] = {
510 .start = IRQ_TWI1,
511 .end = IRQ_TWI1,
512 .flags = IORESOURCE_IRQ,
513 },
514};
515
516static struct platform_device i2c_bfin_twi1_device = {
517 .name = "i2c-bfin-twi",
518 .id = 1,
519 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
520 .resource = bfin_twi1_resource,
521};
522#endif
523
97static struct platform_device *ezkit_devices[] __initdata = { 524static struct platform_device *ezkit_devices[] __initdata = {
98#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 525#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
99 &rtc_device, 526 &rtc_device,
@@ -102,12 +529,60 @@ static struct platform_device *ezkit_devices[] __initdata = {
102#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 529#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
103 &bfin_uart_device, 530 &bfin_uart_device,
104#endif 531#endif
532
533#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
534 &bf54x_lq043_device,
535#endif
536
537#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
538 &smsc911x_device,
539#endif
540
541#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE)
542 &bf54x_hcd,
543#endif
544
545#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
546 &musb_device,
547#endif
548
549#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
550 &bfin_atapi_device,
551#endif
552
553#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
554 &bf5xx_nand_device,
555#endif
556
557#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN)
558 &bf54x_sdh_device,
559#endif
560
561#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
562 &bf54x_spi_master0,
563/* &bf54x_spi_master1,*/
564#endif
565
566#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
567 &bf54x_kpad_device,
568#endif
569
570#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
571 &i2c_bfin_twi0_device,
572 &i2c_bfin_twi1_device,
573#endif
105}; 574};
106 575
107static int __init stamp_init(void) 576static int __init stamp_init(void)
108{ 577{
109 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 578 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
110 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); 579 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
580
581#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
582 spi_register_board_info(bf54x_spi_board_info,
583 ARRAY_SIZE(bf54x_spi_board_info));
584#endif
585
111 return 0; 586 return 0;
112} 587}
113 588
diff --git a/arch/blackfin/mach-bf548/gpio.c b/arch/blackfin/mach-bf548/gpio.c
deleted file mode 100644
index 0da5f0003b8c..000000000000
--- a/arch/blackfin/mach-bf548/gpio.c
+++ /dev/null
@@ -1,323 +0,0 @@
1/*
2 * File: arch/blackfin/mach-bf548/gpio.c
3 * Based on:
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
5 *
6 * Created:
7 * Description: GPIO Abstraction Layer
8 *
9 * Modified:
10 * Copyright 2007 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#include <linux/module.h>
31#include <linux/err.h>
32#include <asm/blackfin.h>
33#include <asm/gpio.h>
34#include <asm/portmux.h>
35#include <linux/irq.h>
36
37static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
38 (struct gpio_port_t *)PORTA_FER,
39 (struct gpio_port_t *)PORTB_FER,
40 (struct gpio_port_t *)PORTC_FER,
41 (struct gpio_port_t *)PORTD_FER,
42 (struct gpio_port_t *)PORTE_FER,
43 (struct gpio_port_t *)PORTF_FER,
44 (struct gpio_port_t *)PORTG_FER,
45 (struct gpio_port_t *)PORTH_FER,
46 (struct gpio_port_t *)PORTI_FER,
47 (struct gpio_port_t *)PORTJ_FER,
48};
49
50static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
51static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
52
53inline int check_gpio(unsigned short gpio)
54{
55 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
56 || gpio == GPIO_PH14 || gpio == GPIO_PH15
57 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
58 || gpio > MAX_BLACKFIN_GPIOS)
59 return -EINVAL;
60 return 0;
61}
62
63inline void portmux_setup(unsigned short portno, unsigned short function)
64{
65 u32 pmux;
66
67 pmux = gpio_array[gpio_bank(portno)]->port_mux;
68
69 pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
70 pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
71
72 gpio_array[gpio_bank(portno)]->port_mux = pmux;
73
74}
75
76inline u16 get_portmux(unsigned short portno)
77{
78 u32 pmux;
79
80 pmux = gpio_array[gpio_bank(portno)]->port_mux;
81
82 return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
83
84}
85
86static void port_setup(unsigned short gpio, unsigned short usage)
87{
88 if (usage == GPIO_USAGE) {
89 if (gpio_array[gpio_bank(gpio)]->port_fer & gpio_bit(gpio))
90 printk(KERN_WARNING
91 "bfin-gpio: Possible Conflict with Peripheral "
92 "usage and GPIO %d detected!\n", gpio);
93 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
94 } else
95 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
96 SSYNC();
97}
98
99static int __init bfin_gpio_init(void)
100{
101 printk(KERN_INFO "Blackfin GPIO Controller\n");
102
103 return 0;
104}
105
106arch_initcall(bfin_gpio_init);
107
108int peripheral_request(unsigned short per, const char *label)
109{
110 unsigned long flags;
111 unsigned short ident = P_IDENT(per);
112
113 if (!(per & P_DEFINED))
114 return -ENODEV;
115
116 if (check_gpio(ident) < 0)
117 return -EINVAL;
118
119 local_irq_save(flags);
120
121 if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
122 printk(KERN_ERR
123 "%s: Peripheral %d is already reserved as GPIO!\n",
124 __FUNCTION__, per);
125 dump_stack();
126 local_irq_restore(flags);
127 return -EBUSY;
128 }
129
130 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
131
132 u16 funct = get_portmux(ident);
133
134 if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
135 printk(KERN_ERR
136 "%s: Peripheral %d is already reserved!\n",
137 __FUNCTION__, per);
138 dump_stack();
139 local_irq_restore(flags);
140 return -EBUSY;
141 }
142 }
143
144 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
145
146 portmux_setup(ident, P_FUNCT2MUX(per));
147 port_setup(ident, PERIPHERAL_USAGE);
148
149 local_irq_restore(flags);
150
151 return 0;
152}
153EXPORT_SYMBOL(peripheral_request);
154
155int peripheral_request_list(unsigned short per[], const char *label)
156{
157
158 u16 cnt;
159 int ret;
160
161 for (cnt = 0; per[cnt] != 0; cnt++) {
162 ret = peripheral_request(per[cnt], label);
163 if (ret < 0)
164 return ret;
165 }
166
167 return 0;
168}
169EXPORT_SYMBOL(peripheral_request_list);
170
171void peripheral_free(unsigned short per)
172{
173 unsigned long flags;
174 unsigned short ident = P_IDENT(per);
175
176 if (!(per & P_DEFINED))
177 return;
178
179 if (check_gpio(ident) < 0)
180 return;
181
182 local_irq_save(flags);
183
184 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
185 printk(KERN_ERR "bfin-gpio: Peripheral %d wasn't reserved!\n", per);
186 dump_stack();
187 local_irq_restore(flags);
188 return;
189 }
190
191 if (!(per & P_MAYSHARE)) {
192 port_setup(ident, GPIO_USAGE);
193 }
194
195 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
196
197 local_irq_restore(flags);
198}
199EXPORT_SYMBOL(peripheral_free);
200
201void peripheral_free_list(unsigned short per[])
202{
203 u16 cnt;
204
205 for (cnt = 0; per[cnt] != 0; cnt++) {
206 peripheral_free(per[cnt]);
207 }
208
209}
210EXPORT_SYMBOL(peripheral_free_list);
211
212/***********************************************************
213*
214* FUNCTIONS: Blackfin GPIO Driver
215*
216* INPUTS/OUTPUTS:
217* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
218*
219*
220* DESCRIPTION: Blackfin GPIO Driver API
221*
222* CAUTION:
223*************************************************************
224* MODIFICATION HISTORY :
225**************************************************************/
226
227int gpio_request(unsigned short gpio, const char *label)
228{
229 unsigned long flags;
230
231 if (check_gpio(gpio) < 0)
232 return -EINVAL;
233
234 local_irq_save(flags);
235
236 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
237 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);
238 dump_stack();
239 local_irq_restore(flags);
240 return -EBUSY;
241 }
242
243 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
244 printk(KERN_ERR
245 "bfin-gpio: GPIO %d is already reserved as Peripheral!\n", gpio);
246 dump_stack();
247 local_irq_restore(flags);
248 return -EBUSY;
249 }
250
251 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
252
253 local_irq_restore(flags);
254
255 port_setup(gpio, GPIO_USAGE);
256
257 return 0;
258}
259EXPORT_SYMBOL(gpio_request);
260
261void gpio_free(unsigned short gpio)
262{
263 unsigned long flags;
264
265 if (check_gpio(gpio) < 0)
266 return;
267
268 local_irq_save(flags);
269
270 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
271 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
272 dump_stack();
273 local_irq_restore(flags);
274 return;
275 }
276
277 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
278
279 local_irq_restore(flags);
280}
281EXPORT_SYMBOL(gpio_free);
282
283void gpio_direction_input(unsigned short gpio)
284{
285 unsigned long flags;
286
287 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
288
289 local_irq_save(flags);
290 gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
291 gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
292 local_irq_restore(flags);
293}
294EXPORT_SYMBOL(gpio_direction_input);
295
296void gpio_direction_output(unsigned short gpio)
297{
298 unsigned long flags;
299
300 BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
301
302 local_irq_save(flags);
303 gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
304 gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
305 local_irq_restore(flags);
306}
307EXPORT_SYMBOL(gpio_direction_output);
308
309void gpio_set_value(unsigned short gpio, unsigned short arg)
310{
311 if (arg)
312 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
313 else
314 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
315
316}
317EXPORT_SYMBOL(gpio_set_value);
318
319unsigned short gpio_get_value(unsigned short gpio)
320{
321 return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
322}
323EXPORT_SYMBOL(gpio_get_value);
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 06751ae8b857..3071c243d426 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -31,6 +31,7 @@
31#include <asm/blackfin.h> 31#include <asm/blackfin.h>
32#include <asm/trace.h> 32#include <asm/trace.h>
33#if CONFIG_BFIN_KERNEL_CLOCK 33#if CONFIG_BFIN_KERNEL_CLOCK
34#include <asm/mach-common/clocks.h>
34#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
35#endif 36#endif
36 37
@@ -49,9 +50,13 @@ ENTRY(__start)
49ENTRY(__stext) 50ENTRY(__stext)
50 /* R0: argument of command line string, passed from uboot, save it */ 51 /* R0: argument of command line string, passed from uboot, save it */
51 R7 = R0; 52 R7 = R0;
52 /* Set the SYSCFG register */ 53 /* Enable Cycle Counter and Nesting Of Interrupts */
53 R0 = 0x36; 54#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
54 SYSCFG = R0; /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/ 55 R0 = SYSCFG_SNEN;
56#else
57 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
58#endif
59 SYSCFG = R0;
55 R0 = 0; 60 R0 = 0;
56 61
57 /* Clear Out All the data and pointer Registers*/ 62 /* Clear Out All the data and pointer Registers*/
@@ -92,13 +97,13 @@ ENTRY(__stext)
92 M2 = r0; 97 M2 = r0;
93 M3 = r0; 98 M3 = r0;
94 99
95 trace_buffer_start(p0,r0); 100 trace_buffer_init(p0,r0);
96 P0 = R1; 101 P0 = R1;
97 R0 = R1; 102 R0 = R1;
98 103
99 /* Turn off the icache */ 104 /* Turn off the icache */
100 p0.l = (IMEM_CONTROL & 0xFFFF); 105 p0.l = LO(IMEM_CONTROL);
101 p0.h = (IMEM_CONTROL >> 16); 106 p0.h = HI(IMEM_CONTROL);
102 R1 = [p0]; 107 R1 = [p0];
103 R0 = ~ENICPLB; 108 R0 = ~ENICPLB;
104 R0 = R0 & R1; 109 R0 = R0 & R1;
@@ -106,8 +111,8 @@ ENTRY(__stext)
106 SSYNC; 111 SSYNC;
107 112
108 /* Turn off the dcache */ 113 /* Turn off the dcache */
109 p0.l = (DMEM_CONTROL & 0xFFFF); 114 p0.l = LO(DMEM_CONTROL);
110 p0.h = (DMEM_CONTROL >> 16); 115 p0.h = HI(DMEM_CONTROL);
111 R1 = [p0]; 116 R1 = [p0];
112 R0 = ~ENDCPLB; 117 R0 = ~ENDCPLB;
113 R0 = R0 & R1; 118 R0 = R0 & R1;
@@ -120,6 +125,12 @@ ENTRY(__stext)
120 FP = SP; 125 FP = SP;
121 USP = SP; 126 USP = SP;
122 127
128#ifdef CONFIG_EARLY_PRINTK
129 SP += -12;
130 call _init_early_exception_vectors;
131 SP += 12;
132#endif
133
123 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 134 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
124 call _bf53x_relocate_l1_mem; 135 call _bf53x_relocate_l1_mem;
125#if CONFIG_BFIN_KERNEL_CLOCK 136#if CONFIG_BFIN_KERNEL_CLOCK
@@ -172,7 +183,7 @@ ENTRY(__stext)
172 p0.l = .LWAIT_HERE; 183 p0.l = .LWAIT_HERE;
173 p0.h = .LWAIT_HERE; 184 p0.h = .LWAIT_HERE;
174 reti = p0; 185 reti = p0;
175#if defined (ANOMALY_05000281) 186#if ANOMALY_05000281
176 nop; 187 nop;
177 nop; 188 nop;
178 nop; 189 nop;
@@ -335,8 +346,8 @@ ENTRY(_start_dma_code)
335 w[p0] = r0.l; 346 w[p0] = r0.l;
336 ssync; 347 ssync;
337 348
338 p0.l = (EBIU_SDBCTL & 0xFFFF); 349 p0.l = LO(EBIU_SDBCTL);
339 p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */ 350 p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
340 r0 = mem_SDBCTL; 351 r0 = mem_SDBCTL;
341 w[p0] = r0.l; 352 w[p0] = r0.l;
342 ssync; 353 ssync;
@@ -373,129 +384,6 @@ ENTRY(_start_dma_code)
373 RTS; 384 RTS;
374#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 385#endif /* CONFIG_BFIN_KERNEL_CLOCK */
375 386
376ENTRY(_bfin_reset)
377 /* No more interrupts to be handled*/
378 CLI R6;
379 SSYNC;
380
381#if defined(CONFIG_MTD_M25P80)
382/*
383 * The following code fix the SPI flash reboot issue,
384 * /CS signal of the chip which is using PF10 return to GPIO mode
385 */
386 p0.h = hi(PORTF_FER);
387 p0.l = lo(PORTF_FER);
388 r0.l = 0x0000;
389 w[p0] = r0.l;
390 SSYNC;
391
392/* /CS return to high */
393 p0.h = hi(PORTFIO);
394 p0.l = lo(PORTFIO);
395 r0.l = 0xFFFF;
396 w[p0] = r0.l;
397 SSYNC;
398
399/* Delay some time, This is necessary */
400 r1.h = 0;
401 r1.l = 0x400;
402 p1 = r1;
403 lsetup (_delay_lab1,_delay_lab1_end ) lc1 = p1;
404_delay_lab1:
405 r0.h = 0;
406 r0.l = 0x8000;
407 p0 = r0;
408 lsetup (_delay_lab0,_delay_lab0_end ) lc0 = p0;
409_delay_lab0:
410 nop;
411_delay_lab0_end:
412 nop;
413_delay_lab1_end:
414 nop;
415#endif
416
417 /* Clear the bits 13-15 in SWRST if they werent cleared */
418 p0.h = hi(SWRST);
419 p0.l = lo(SWRST);
420 csync;
421 r0.l = w[p0];
422
423 /* Clear the IMASK register */
424 p0.h = hi(IMASK);
425 p0.l = lo(IMASK);
426 r0 = 0x0;
427 [p0] = r0;
428
429 /* Clear the ILAT register */
430 p0.h = hi(ILAT);
431 p0.l = lo(ILAT);
432 r0 = [p0];
433 [p0] = r0;
434 SSYNC;
435
436 /* Disable the WDOG TIMER */
437 p0.h = hi(WDOG_CTL);
438 p0.l = lo(WDOG_CTL);
439 r0.l = 0xAD6;
440 w[p0] = r0.l;
441 SSYNC;
442
443 /* Clear the sticky bit incase it is already set */
444 p0.h = hi(WDOG_CTL);
445 p0.l = lo(WDOG_CTL);
446 r0.l = 0x8AD6;
447 w[p0] = r0.l;
448 SSYNC;
449
450 /* Program the count value */
451 R0.l = 0x100;
452 R0.h = 0x0;
453 P0.h = hi(WDOG_CNT);
454 P0.l = lo(WDOG_CNT);
455 [P0] = R0;
456 SSYNC;
457
458 /* Program WDOG_STAT if necessary */
459 P0.h = hi(WDOG_CTL);
460 P0.l = lo(WDOG_CTL);
461 R0 = W[P0](Z);
462 CC = BITTST(R0,1);
463 if !CC JUMP .LWRITESTAT;
464 CC = BITTST(R0,2);
465 if !CC JUMP .LWRITESTAT;
466 JUMP .LSKIP_WRITE;
467
468.LWRITESTAT:
469 /* When watch dog timer is enabled,
470 * a write to STAT will load the contents of CNT to STAT
471 */
472 R0 = 0x0000(z);
473 P0.h = hi(WDOG_STAT);
474 P0.l = lo(WDOG_STAT)
475 [P0] = R0;
476 SSYNC;
477
478.LSKIP_WRITE:
479 /* Enable the reset event */
480 P0.h = hi(WDOG_CTL);
481 P0.l = lo(WDOG_CTL);
482 R0 = W[P0](Z);
483 BITCLR(R0,1);
484 BITCLR(R0,2);
485 W[P0] = R0.L;
486 SSYNC;
487 NOP;
488
489 /* Enable the wdog counter */
490 R0 = W[P0](Z);
491 BITCLR(R0,4);
492 W[P0] = R0.L;
493 SSYNC;
494
495 IDLE;
496
497 RTS;
498
499.data 387.data
500 388
501/* 389/*
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 5b2b544529a1..cd827a1b6ba1 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -34,7 +34,9 @@
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#include <linux/usb_isp1362.h> 36#include <linux/usb_isp1362.h>
37#include <linux/pata_platform.h>
37#include <linux/irq.h> 38#include <linux/irq.h>
39#include <asm/dma.h>
38#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
39 41
40/* 42/*
@@ -112,7 +114,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
112 /* the modalias must be the same as spi device driver name */ 114 /* the modalias must be the same as spi device driver name */
113 .modalias = "m25p80", /* Name of spi_driver for this device */ 115 .modalias = "m25p80", /* Name of spi_driver for this device */
114 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 116 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
115 .bus_num = 1, /* Framework bus number */ 117 .bus_num = 0, /* Framework bus number */
116 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 118 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
117 .platform_data = &bfin_spi_flash_data, 119 .platform_data = &bfin_spi_flash_data,
118 .controller_data = &spi_flash_chip_info, 120 .controller_data = &spi_flash_chip_info,
@@ -124,7 +126,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
124 { 126 {
125 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 127 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
126 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 128 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
127 .bus_num = 1, /* Framework bus number */ 129 .bus_num = 0, /* Framework bus number */
128 .chip_select = 1, /* Framework chip select. */ 130 .chip_select = 1, /* Framework chip select. */
129 .platform_data = NULL, /* No spi_driver specific config */ 131 .platform_data = NULL, /* No spi_driver specific config */
130 .controller_data = &spi_adc_chip_info, 132 .controller_data = &spi_adc_chip_info,
@@ -135,7 +137,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
135 { 137 {
136 .modalias = "ad1836-spi", 138 .modalias = "ad1836-spi",
137 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 139 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
138 .bus_num = 1, 140 .bus_num = 0,
139 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 141 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
140 .controller_data = &ad1836_spi_chip_info, 142 .controller_data = &ad1836_spi_chip_info,
141 }, 143 },
@@ -144,7 +146,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
144 { 146 {
145 .modalias = "ad9960-spi", 147 .modalias = "ad9960-spi",
146 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 148 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 1, 149 .bus_num = 0,
148 .chip_select = 1, 150 .chip_select = 1,
149 .controller_data = &ad9960_spi_chip_info, 151 .controller_data = &ad9960_spi_chip_info,
150 }, 152 },
@@ -153,7 +155,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
153 { 155 {
154 .modalias = "spi_mmc", 156 .modalias = "spi_mmc",
155 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 157 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
156 .bus_num = 1, 158 .bus_num = 0,
157 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 159 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
158 .platform_data = NULL, 160 .platform_data = NULL,
159 .controller_data = &spi_mmc_chip_info, 161 .controller_data = &spi_mmc_chip_info,
@@ -162,17 +164,33 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
162#endif 164#endif
163}; 165};
164 166
167/* SPI (0) */
168static struct resource bfin_spi0_resource[] = {
169 [0] = {
170 .start = SPI0_REGBASE,
171 .end = SPI0_REGBASE + 0xFF,
172 .flags = IORESOURCE_MEM,
173 },
174 [1] = {
175 .start = CH_SPI,
176 .end = CH_SPI,
177 .flags = IORESOURCE_IRQ,
178 }
179};
180
165/* SPI controller data */ 181/* SPI controller data */
166static struct bfin5xx_spi_master spi_bfin_master_info = { 182static struct bfin5xx_spi_master bfin_spi0_info = {
167 .num_chipselect = 8, 183 .num_chipselect = 8,
168 .enable_dma = 1, /* master has the ability to do dma transfer */ 184 .enable_dma = 1, /* master has the ability to do dma transfer */
169}; 185};
170 186
171static struct platform_device spi_bfin_master_device = { 187static struct platform_device bfin_spi0_device = {
172 .name = "bfin-spi-master", 188 .name = "bfin-spi",
173 .id = 1, /* Bus number */ 189 .id = 0, /* Bus number */
190 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
191 .resource = bfin_spi0_resource,
174 .dev = { 192 .dev = {
175 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 193 .platform_data = &bfin_spi0_info, /* Passed to driver */
176 }, 194 },
177}; 195};
178#endif /* spi master and devices */ 196#endif /* spi master and devices */
@@ -256,6 +274,43 @@ static struct platform_device bfin_uart_device = {
256}; 274};
257#endif 275#endif
258 276
277#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
278#define PATA_INT 119
279
280static struct pata_platform_info bfin_pata_platform_data = {
281 .ioport_shift = 2,
282 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
283};
284
285static struct resource bfin_pata_resources[] = {
286 {
287 .start = 0x2400C000,
288 .end = 0x2400C001F,
289 .flags = IORESOURCE_MEM,
290 },
291 {
292 .start = 0x2400D018,
293 .end = 0x2400D01B,
294 .flags = IORESOURCE_MEM,
295 },
296 {
297 .start = PATA_INT,
298 .end = PATA_INT,
299 .flags = IORESOURCE_IRQ,
300 },
301};
302
303static struct platform_device bfin_pata_device = {
304 .name = "pata_platform",
305 .id = -1,
306 .num_resources = ARRAY_SIZE(bfin_pata_resources),
307 .resource = bfin_pata_resources,
308 .dev = {
309 .platform_data = &bfin_pata_platform_data,
310 }
311};
312#endif
313
259static struct platform_device *cm_bf561_devices[] __initdata = { 314static struct platform_device *cm_bf561_devices[] __initdata = {
260 315
261#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 316#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
@@ -271,9 +326,12 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
271#endif 326#endif
272 327
273#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 328#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
274 &spi_bfin_master_device, 329 &bfin_spi0_device,
275#endif 330#endif
276 331
332#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
333 &bfin_pata_device,
334#endif
277}; 335};
278 336
279static int __init cm_bf561_init(void) 337static int __init cm_bf561_init(void)
@@ -283,6 +341,10 @@ static int __init cm_bf561_init(void)
283#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 341#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
284 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 342 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
285#endif 343#endif
344
345#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
346 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
347#endif
286 return 0; 348 return 0;
287} 349}
288 350
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 724191da20a2..57e14edca8b1 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -32,6 +32,8 @@
32#include <linux/spi/spi.h> 32#include <linux/spi/spi.h>
33#include <linux/irq.h> 33#include <linux/irq.h>
34#include <linux/interrupt.h> 34#include <linux/interrupt.h>
35#include <linux/pata_platform.h>
36#include <asm/dma.h>
35#include <asm/bfin5xx_spi.h> 37#include <asm/bfin5xx_spi.h>
36 38
37/* 39/*
@@ -140,17 +142,33 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
140#endif 142#endif
141#endif 143#endif
142 144
145/* SPI (0) */
146static struct resource bfin_spi0_resource[] = {
147 [0] = {
148 .start = SPI0_REGBASE,
149 .end = SPI0_REGBASE + 0xFF,
150 .flags = IORESOURCE_MEM,
151 },
152 [1] = {
153 .start = CH_SPI,
154 .end = CH_SPI,
155 .flags = IORESOURCE_IRQ,
156 }
157};
158
143/* SPI controller data */ 159/* SPI controller data */
144static struct bfin5xx_spi_master spi_bfin_master_info = { 160static struct bfin5xx_spi_master bfin_spi0_info = {
145 .num_chipselect = 8, 161 .num_chipselect = 8,
146 .enable_dma = 1, /* master has the ability to do dma transfer */ 162 .enable_dma = 1, /* master has the ability to do dma transfer */
147}; 163};
148 164
149static struct platform_device spi_bfin_master_device = { 165static struct platform_device bfin_spi0_device = {
150 .name = "bfin-spi-master", 166 .name = "bfin-spi",
151 .id = 1, /* Bus number */ 167 .id = 0, /* Bus number */
168 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
169 .resource = bfin_spi0_resource,
152 .dev = { 170 .dev = {
153 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 171 .platform_data = &bfin_spi0_info, /* Passed to driver */
154 }, 172 },
155}; 173};
156 174
@@ -160,23 +178,63 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
160 { 178 {
161 .modalias = "ad1836-spi", 179 .modalias = "ad1836-spi",
162 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 180 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
163 .bus_num = 1, 181 .bus_num = 0,
164 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 182 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
165 .controller_data = &ad1836_spi_chip_info, 183 .controller_data = &ad1836_spi_chip_info,
166 }, 184 },
167#endif 185#endif
168}; 186};
169 187
188#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
189#define PATA_INT 55
190
191static struct pata_platform_info bfin_pata_platform_data = {
192 .ioport_shift = 1,
193 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
194};
195
196static struct resource bfin_pata_resources[] = {
197 {
198 .start = 0x20314020,
199 .end = 0x2031403F,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .start = 0x2031401C,
204 .end = 0x2031401F,
205 .flags = IORESOURCE_MEM,
206 },
207 {
208 .start = PATA_INT,
209 .end = PATA_INT,
210 .flags = IORESOURCE_IRQ,
211 },
212};
213
214static struct platform_device bfin_pata_device = {
215 .name = "pata_platform",
216 .id = -1,
217 .num_resources = ARRAY_SIZE(bfin_pata_resources),
218 .resource = bfin_pata_resources,
219 .dev = {
220 .platform_data = &bfin_pata_platform_data,
221 }
222};
223#endif
224
170static struct platform_device *ezkit_devices[] __initdata = { 225static struct platform_device *ezkit_devices[] __initdata = {
171#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 226#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
172 &smc91x_device, 227 &smc91x_device,
173#endif 228#endif
174#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 229#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
175 &spi_bfin_master_device, 230 &bfin_spi0_device,
176#endif 231#endif
177#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 232#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
178 &bfin_uart_device, 233 &bfin_uart_device,
179#endif 234#endif
235#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
236 &bfin_pata_device,
237#endif
180}; 238};
181 239
182static int __init ezkit_init(void) 240static int __init ezkit_init(void)
@@ -194,7 +252,15 @@ static int __init ezkit_init(void)
194 SSYNC(); 252 SSYNC();
195#endif 253#endif
196 254
197 return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 255#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
256 spi_register_board_info(bfin_spi_board_info,
257 ARRAY_SIZE(bfin_spi_board_info));
258#endif
259
260#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
261 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
262#endif
263 return 0;
198} 264}
199 265
200arch_initcall(ezkit_init); 266arch_initcall(ezkit_init);
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 38650a628980..96a3d456fb6d 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -33,6 +33,7 @@
33#include <asm/trace.h> 33#include <asm/trace.h>
34 34
35#if CONFIG_BFIN_KERNEL_CLOCK 35#if CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h>
36#include <asm/mach/mem_init.h> 37#include <asm/mach/mem_init.h>
37#endif 38#endif
38 39
@@ -50,10 +51,12 @@ __INIT
50ENTRY(__start) 51ENTRY(__start)
51 /* R0: argument of command line string, passed from uboot, save it */ 52 /* R0: argument of command line string, passed from uboot, save it */
52 R7 = R0; 53 R7 = R0;
53 /* Set the SYSCFG register: 54 /* Enable Cycle Counter and Nesting Of Interrupts */
54 * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit) 55#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
55 */ 56 R0 = SYSCFG_SNEN;
56 R0 = 0x36; 57#else
58 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
59#endif
57 SYSCFG = R0; 60 SYSCFG = R0;
58 R0 = 0; 61 R0 = 0;
59 62
@@ -95,43 +98,42 @@ ENTRY(__start)
95 M2 = r0; 98 M2 = r0;
96 M3 = r0; 99 M3 = r0;
97 100
98 trace_buffer_start(p0,r0); 101 trace_buffer_init(p0,r0);
99 P0 = R1; 102 P0 = R1;
100 R0 = R1; 103 R0 = R1;
101 104
102 /* Turn off the icache */ 105 /* Turn off the icache */
103 p0.l = (IMEM_CONTROL & 0xFFFF); 106 p0.l = LO(IMEM_CONTROL);
104 p0.h = (IMEM_CONTROL >> 16); 107 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0]; 108 R1 = [p0];
106 R0 = ~ENICPLB; 109 R0 = ~ENICPLB;
107 R0 = R0 & R1; 110 R0 = R0 & R1;
108 111
109 /* Anomaly 05000125 */ 112#if ANOMALY_05000125
110#ifdef ANOMALY_05000125
111 CLI R2; 113 CLI R2;
112 SSYNC; 114 SSYNC;
113#endif 115#endif
114 [p0] = R0; 116 [p0] = R0;
115 SSYNC; 117 SSYNC;
116#ifdef ANOMALY_05000125 118#if ANOMALY_05000125
117 STI R2; 119 STI R2;
118#endif 120#endif
119 121
120 /* Turn off the dcache */ 122 /* Turn off the dcache */
121 p0.l = (DMEM_CONTROL & 0xFFFF); 123 p0.l = LO(DMEM_CONTROL);
122 p0.h = (DMEM_CONTROL >> 16); 124 p0.h = HI(DMEM_CONTROL);
123 R1 = [p0]; 125 R1 = [p0];
124 R0 = ~ENDCPLB; 126 R0 = ~ENDCPLB;
125 R0 = R0 & R1; 127 R0 = R0 & R1;
126 128
127 /* Anomaly 05000125 */ 129 /* Anomaly 05000125 */
128#ifdef ANOMALY_05000125 130#if ANOMALY_05000125
129 CLI R2; 131 CLI R2;
130 SSYNC; 132 SSYNC;
131#endif 133#endif
132 [p0] = R0; 134 [p0] = R0;
133 SSYNC; 135 SSYNC;
134#ifdef ANOMALY_05000125 136#if ANOMALY_05000125
135 STI R2; 137 STI R2;
136#endif 138#endif
137 139
@@ -167,6 +169,12 @@ ENTRY(__start)
167 fp = sp; 169 fp = sp;
168 usp = sp; 170 usp = sp;
169 171
172#ifdef CONFIG_EARLY_PRINTK
173 SP += -12;
174 call _init_early_exception_vectors;
175 SP += 12;
176#endif
177
170 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 178 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
171 call _bf53x_relocate_l1_mem; 179 call _bf53x_relocate_l1_mem;
172#if CONFIG_BFIN_KERNEL_CLOCK 180#if CONFIG_BFIN_KERNEL_CLOCK
@@ -220,7 +228,7 @@ ENTRY(__start)
220 p0.l = .LWAIT_HERE; 228 p0.l = .LWAIT_HERE;
221 p0.h = .LWAIT_HERE; 229 p0.h = .LWAIT_HERE;
222 reti = p0; 230 reti = p0;
223#if defined(ANOMALY_05000281) 231#if ANOMALY_05000281
224 nop; nop; nop; 232 nop; nop; nop;
225#endif 233#endif
226 rti; 234 rti;
@@ -372,8 +380,8 @@ ENTRY(_start_dma_code)
372 w[p0] = r0.l; 380 w[p0] = r0.l;
373 ssync; 381 ssync;
374 382
375 p0.l = (EBIU_SDBCTL & 0xFFFF); 383 p0.l = LO(EBIU_SDBCTL);
376 p0.h = (EBIU_SDBCTL >> 16); /* SDRAM Memory Bank Control Register */ 384 p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
377 r0 = mem_SDBCTL; 385 r0 = mem_SDBCTL;
378 w[p0] = r0.l; 386 w[p0] = r0.l;
379 ssync; 387 ssync;
@@ -404,66 +412,6 @@ ENTRY(_start_dma_code)
404ENDPROC(_start_dma_code) 412ENDPROC(_start_dma_code)
405#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 413#endif /* CONFIG_BFIN_KERNEL_CLOCK */
406 414
407ENTRY(_bfin_reset)
408 /* No more interrupts to be handled*/
409 CLI R6;
410 SSYNC;
411
412#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
413 p0.h = hi(FIO_INEN);
414 p0.l = lo(FIO_INEN);
415 r0.l = ~(PF1 | PF0);
416 w[p0] = r0.l;
417
418 p0.h = hi(FIO_DIR);
419 p0.l = lo(FIO_DIR);
420 r0.l = (PF1 | PF0);
421 w[p0] = r0.l;
422
423 p0.h = hi(FIO_FLAG_C);
424 p0.l = lo(FIO_FLAG_C);
425 r0.l = (PF1 | PF0);
426 w[p0] = r0.l;
427#endif
428
429 /* Clear the IMASK register */
430 p0.h = hi(IMASK);
431 p0.l = lo(IMASK);
432 r0 = 0x0;
433 [p0] = r0;
434
435 /* Clear the ILAT register */
436 p0.h = hi(ILAT);
437 p0.l = lo(ILAT);
438 r0 = [p0];
439 [p0] = r0;
440 SSYNC;
441
442 /* make sure SYSCR is set to use BMODE */
443 P0.h = hi(SYSCR);
444 P0.l = lo(SYSCR);
445 R0.l = 0x20; /* on BF561, disable core b */
446 W[P0] = R0.l;
447 SSYNC;
448
449 /* issue a system soft reset */
450 P1.h = hi(SWRST);
451 P1.l = lo(SWRST);
452 R1.l = 0x0007;
453 W[P1] = R1;
454 SSYNC;
455
456 /* clear system soft reset */
457 R0.l = 0x0000;
458 W[P0] = R0;
459 SSYNC;
460
461 /* issue core reset */
462 raise 1;
463
464 RTS;
465ENDPROC(_bfin_reset)
466
467.data 415.data
468 416
469/* 417/*
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 0279ede70392..4d7733dfd5de 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -4,7 +4,7 @@
4 4
5obj-y := \ 5obj-y := \
6 cache.o cacheinit.o cplbhdlr.o cplbmgr.o entry.o \ 6 cache.o cacheinit.o cplbhdlr.o cplbmgr.o entry.o \
7 interrupt.o lock.o irqpanic.o 7 interrupt.o lock.o irqpanic.o arch_checks.o
8 8
9obj-$(CONFIG_CPLB_INFO) += cplbinfo.o 9obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
10obj-$(CONFIG_BFIN_SINGLE_CORE) += ints-priority-sc.o 10obj-$(CONFIG_BFIN_SINGLE_CORE) += ints-priority-sc.o
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
new file mode 100644
index 000000000000..2f6ce397780f
--- /dev/null
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -0,0 +1,60 @@
1/*
2 * File: arch/blackfin/mach-common/arch_checks.c
3 * Based on:
4 * Author: Robin Getz <rgetz@blackfin.uclinux.org>
5 *
6 * Created: 25Jul07
7 * Description: Do some checking to make sure things are OK
8 *
9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#include <asm/mach/anomaly.h>
31#include <asm/mach-common/clocks.h>
32
33#ifdef CONFIG_BFIN_KERNEL_CLOCK
34
35# if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ)
36# error "VCO selected is more than maximum value. Please change the VCO multipler"
37# endif
38
39# if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ)
40# error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
41# endif
42
43# if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ)
44# error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
45# endif
46
47# if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ)
48# error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK"
49# endif
50
51# if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
52# error "Please select sclk less than cclk"
53# endif
54
55#endif /* CONFIG_BFIN_KERNEL_CLOCK */
56
57#if (CONFIG_MEM_SIZE % 4)
58#error "SDRAM mem size must be multible of 4MB"
59#endif
60
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 7063795eb7c0..0521b1588204 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -79,8 +79,8 @@ ENTRY(_icache_invalidate)
79ENTRY(_invalidate_entire_icache) 79ENTRY(_invalidate_entire_icache)
80 [--SP] = ( R7:5); 80 [--SP] = ( R7:5);
81 81
82 P0.L = (IMEM_CONTROL & 0xFFFF); 82 P0.L = LO(IMEM_CONTROL);
83 P0.H = (IMEM_CONTROL >> 16); 83 P0.H = HI(IMEM_CONTROL);
84 R7 = [P0]; 84 R7 = [P0];
85 85
86 /* Clear the IMC bit , All valid bits in the instruction 86 /* Clear the IMC bit , All valid bits in the instruction
@@ -197,8 +197,8 @@ ENTRY(_invalidate_entire_dcache)
197ENTRY(_dcache_invalidate) 197ENTRY(_dcache_invalidate)
198 [--SP] = ( R7:6); 198 [--SP] = ( R7:6);
199 199
200 P0.L = (DMEM_CONTROL & 0xFFFF); 200 P0.L = LO(DMEM_CONTROL);
201 P0.H = (DMEM_CONTROL >> 16); 201 P0.H = HI(DMEM_CONTROL);
202 R7 = [P0]; 202 R7 = [P0];
203 203
204 /* Clear the DMC[1:0] bits, All valid bits in the data 204 /* Clear the DMC[1:0] bits, All valid bits in the data
diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
index 5be6b975ae4a..22fada0c1cb3 100644
--- a/arch/blackfin/mach-common/cacheinit.S
+++ b/arch/blackfin/mach-common/cacheinit.S
@@ -38,13 +38,13 @@
38 38
39.text 39.text
40 40
41#ifdef ANOMALY_05000125 41#if ANOMALY_05000125
42#if defined(CONFIG_BLKFIN_CACHE) 42#if defined(CONFIG_BFIN_ICACHE)
43ENTRY(_bfin_write_IMEM_CONTROL) 43ENTRY(_bfin_write_IMEM_CONTROL)
44 44
45 /* Enable Instruction Cache */ 45 /* Enable Instruction Cache */
46 P0.l = (IMEM_CONTROL & 0xFFFF); 46 P0.l = LO(IMEM_CONTROL);
47 P0.h = (IMEM_CONTROL >> 16); 47 P0.h = HI(IMEM_CONTROL);
48 48
49 /* Anomaly 05000125 */ 49 /* Anomaly 05000125 */
50 CLI R1; 50 CLI R1;
@@ -58,10 +58,10 @@ ENTRY(_bfin_write_IMEM_CONTROL)
58ENDPROC(_bfin_write_IMEM_CONTROL) 58ENDPROC(_bfin_write_IMEM_CONTROL)
59#endif 59#endif
60 60
61#if defined(CONFIG_BLKFIN_DCACHE) 61#if defined(CONFIG_BFIN_DCACHE)
62ENTRY(_bfin_write_DMEM_CONTROL) 62ENTRY(_bfin_write_DMEM_CONTROL)
63 P0.l = (DMEM_CONTROL & 0xFFFF); 63 P0.l = LO(DMEM_CONTROL);
64 P0.h = (DMEM_CONTROL >> 16); 64 P0.h = HI(DMEM_CONTROL);
65 65
66 CLI R1; 66 CLI R1;
67 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */ 67 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/mach-common/cplbhdlr.S
index 2f3c72c23997..2788532de72b 100644
--- a/arch/blackfin/mach-common/cplbhdlr.S
+++ b/arch/blackfin/mach-common/cplbhdlr.S
@@ -69,14 +69,14 @@ ENTRY(__cplb_hdr)
69 69
70.Lis_icplb_miss: 70.Lis_icplb_miss:
71 71
72#if defined(CONFIG_BLKFIN_CACHE) || defined(CONFIG_BLKFIN_DCACHE) 72#if defined(CONFIG_BFIN_ICACHE) || defined(CONFIG_BFIN_DCACHE)
73# if defined(CONFIG_BLKFIN_CACHE) && !defined(CONFIG_BLKFIN_DCACHE) 73# if defined(CONFIG_BFIN_ICACHE) && !defined(CONFIG_BFIN_DCACHE)
74 R1 = CPLB_ENABLE_ICACHE; 74 R1 = CPLB_ENABLE_ICACHE;
75# endif 75# endif
76# if !defined(CONFIG_BLKFIN_CACHE) && defined(CONFIG_BLKFIN_DCACHE) 76# if !defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
77 R1 = CPLB_ENABLE_DCACHE; 77 R1 = CPLB_ENABLE_DCACHE;
78# endif 78# endif
79# if defined(CONFIG_BLKFIN_CACHE) && defined(CONFIG_BLKFIN_DCACHE) 79# if defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
80 R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE; 80 R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE;
81# endif 81# endif
82#else 82#else
diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S
index e4b47e09cf13..946703ef48ff 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/mach-common/cplbmgr.S
@@ -75,15 +75,15 @@ ENTRY(_cplb_mgr)
75 * from the configuration table. 75 * from the configuration table.
76 */ 76 */
77 77
78 P4.L = (ICPLB_FAULT_ADDR & 0xFFFF); 78 P4.L = LO(ICPLB_FAULT_ADDR);
79 P4.H = (ICPLB_FAULT_ADDR >> 16); 79 P4.H = HI(ICPLB_FAULT_ADDR);
80 80
81 P1 = 16; 81 P1 = 16;
82 P5.L = _page_size_table; 82 P5.L = _page_size_table;
83 P5.H = _page_size_table; 83 P5.H = _page_size_table;
84 84
85 P0.L = (ICPLB_DATA0 & 0xFFFF); 85 P0.L = LO(ICPLB_DATA0);
86 P0.H = (ICPLB_DATA0 >> 16); 86 P0.H = HI(ICPLB_DATA0);
87 R4 = [P4]; /* Get faulting address*/ 87 R4 = [P4]; /* Get faulting address*/
88 R6 = 64; /* Advance past the fault address, which*/ 88 R6 = 64; /* Advance past the fault address, which*/
89 R6 = R6 + R4; /* we'll use if we find a match*/ 89 R6 = R6 + R4; /* we'll use if we find a match*/
@@ -117,13 +117,13 @@ ENTRY(_cplb_mgr)
117 I0 = R4; /* Fault address we'll search for*/ 117 I0 = R4; /* Fault address we'll search for*/
118 118
119 /* set up pointers */ 119 /* set up pointers */
120 P0.L = (ICPLB_DATA0 & 0xFFFF); 120 P0.L = LO(ICPLB_DATA0);
121 P0.H = (ICPLB_DATA0 >> 16); 121 P0.H = HI(ICPLB_DATA0);
122 122
123 /* The replacement procedure for ICPLBs */ 123 /* The replacement procedure for ICPLBs */
124 124
125 P4.L = (IMEM_CONTROL & 0xFFFF); 125 P4.L = LO(IMEM_CONTROL);
126 P4.H = (IMEM_CONTROL >> 16); 126 P4.H = HI(IMEM_CONTROL);
127 127
128 /* disable cplbs */ 128 /* disable cplbs */
129 R5 = [P4]; /* Control Register*/ 129 R5 = [P4]; /* Control Register*/
@@ -243,8 +243,8 @@ ENTRY(_cplb_mgr)
243 * last entry of the table. 243 * last entry of the table.
244 */ 244 */
245 245
246 P1.L = (ICPLB_DATA15 & 0xFFFF); /* ICPLB_DATA15 */ 246 P1.L = LO(ICPLB_DATA15); /* ICPLB_DATA15 */
247 P1.H = (ICPLB_DATA15 >> 16); 247 P1.H = HI(ICPLB_DATA15);
248 [P1] = R2; 248 [P1] = R2;
249 [P1-0x100] = R4; 249 [P1-0x100] = R4;
250#ifdef CONFIG_CPLB_INFO 250#ifdef CONFIG_CPLB_INFO
@@ -292,10 +292,10 @@ ENTRY(_cplb_mgr)
292 * pending writes associated with the CPLB. 292 * pending writes associated with the CPLB.
293 */ 293 */
294 294
295 P4.L = (DCPLB_STATUS & 0xFFFF); 295 P4.L = LO(DCPLB_STATUS);
296 P4.H = (DCPLB_STATUS >> 16); 296 P4.H = HI(DCPLB_STATUS);
297 P3.L = (DCPLB_DATA0 & 0xFFFF); 297 P3.L = LO(DCPLB_DATA0);
298 P3.H = (DCPLB_DATA0 >> 16); 298 P3.H = HI(DCPLB_DATA0);
299 R5 = [P4]; 299 R5 = [P4];
300 300
301 /* A protection violation can be caused by more than just writes 301 /* A protection violation can be caused by more than just writes
@@ -355,11 +355,11 @@ ENTRY(_cplb_mgr)
355 * config table, that covers the faulting address. 355 * config table, that covers the faulting address.
356 */ 356 */
357 357
358 P1.L = (DCPLB_DATA15 & 0xFFFF); 358 P1.L = LO(DCPLB_DATA15);
359 P1.H = (DCPLB_DATA15 >> 16); 359 P1.H = HI(DCPLB_DATA15);
360 360
361 P4.L = (DCPLB_FAULT_ADDR & 0xFFFF); 361 P4.L = LO(DCPLB_FAULT_ADDR);
362 P4.H = (DCPLB_FAULT_ADDR >> 16); 362 P4.H = HI(DCPLB_FAULT_ADDR);
363 R4 = [P4]; 363 R4 = [P4];
364 I0 = R4; 364 I0 = R4;
365 365
@@ -368,8 +368,8 @@ ENTRY(_cplb_mgr)
368 R6 = R1; /* Save for later*/ 368 R6 = R1; /* Save for later*/
369 369
370 /* Turn off CPLBs while we work.*/ 370 /* Turn off CPLBs while we work.*/
371 P4.L = (DMEM_CONTROL & 0xFFFF); 371 P4.L = LO(DMEM_CONTROL);
372 P4.H = (DMEM_CONTROL >> 16); 372 P4.H = HI(DMEM_CONTROL);
373 R5 = [P4]; 373 R5 = [P4];
374 BITCLR(R5,ENDCPLB_P); 374 BITCLR(R5,ENDCPLB_P);
375 CLI R0; 375 CLI R0;
@@ -384,8 +384,8 @@ ENTRY(_cplb_mgr)
384 * are no good. 384 * are no good.
385 */ 385 */
386 386
387 I1.L = (DCPLB_DATA0 & 0xFFFF); 387 I1.L = LO(DCPLB_DATA0);
388 I1.H = (DCPLB_DATA0 >> 16); 388 I1.H = HI(DCPLB_DATA0);
389 P1 = 2; 389 P1 = 2;
390 P2 = 16; 390 P2 = 16;
391 I2.L = _dcplb_preference; 391 I2.L = _dcplb_preference;
@@ -405,7 +405,7 @@ ENTRY(_cplb_mgr)
405 P3.L = _page_size_table; /* retrieve end address */ 405 P3.L = _page_size_table; /* retrieve end address */
406 P3.H = _page_size_table; /* retrieve end address */ 406 P3.H = _page_size_table; /* retrieve end address */
407 R3 = 0x1002; /* 16th - position, 2 bits -length */ 407 R3 = 0x1002; /* 16th - position, 2 bits -length */
408#ifdef ANOMALY_05000209 408#if ANOMALY_05000209
409 nop; /* Anomaly 05000209 */ 409 nop; /* Anomaly 05000209 */
410#endif 410#endif
411 R7 = EXTRACT(R1,R3.l); 411 R7 = EXTRACT(R1,R3.l);
@@ -475,8 +475,8 @@ ENTRY(_cplb_mgr)
475 * one space closer to the start. 475 * one space closer to the start.
476 */ 476 */
477 477
478 R1.L = (DCPLB_DATA16 & 0xFFFF); /* DCPLB_DATA15 + 4 */ 478 R1.L = LO(DCPLB_DATA16); /* DCPLB_DATA15 + 4 */
479 R1.H = (DCPLB_DATA16 >> 16); 479 R1.H = HI(DCPLB_DATA16);
480 R0 = P0; 480 R0 = P0;
481 481
482 /* If the victim happens to be in DCPLB15, 482 /* If the victim happens to be in DCPLB15,
@@ -549,8 +549,8 @@ ENTRY(_cplb_mgr)
549 * if necessary. 549 * if necessary.
550 */ 550 */
551 551
552 P1.L = (DCPLB_DATA15 & 0xFFFF); 552 P1.L = LO(DCPLB_DATA15);
553 P1.H = (DCPLB_DATA15 >> 16); 553 P1.H = HI(DCPLB_DATA15);
554 554
555 /* If the DCPLB has cache bits set, but caching hasn't 555 /* If the DCPLB has cache bits set, but caching hasn't
556 * been enabled, then we want to mask off the cache-in-L1 556 * been enabled, then we want to mask off the cache-in-L1
@@ -565,7 +565,7 @@ ENTRY(_cplb_mgr)
565 * cost of first-write exceptions to mark the page as dirty. 565 * cost of first-write exceptions to mark the page as dirty.
566 */ 566 */
567 567
568#ifdef CONFIG_BLKFIN_WT 568#ifdef CONFIG_BFIN_WT
569 BITSET(R6, 14); /* Set WT*/ 569 BITSET(R6, 14); /* Set WT*/
570#endif 570#endif
571 571
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index 97cdcd6a00d4..39fbc2861107 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -39,8 +39,8 @@ ENTRY(_unmask_wdog_wakeup_evt)
39 P0.H = hi(SICA_IWR1); 39 P0.H = hi(SICA_IWR1);
40 P0.L = lo(SICA_IWR1); 40 P0.L = lo(SICA_IWR1);
41#else 41#else
42 P0.h = (SIC_IWR >> 16); 42 P0.h = HI(SIC_IWR);
43 P0.l = (SIC_IWR & 0xFFFF); 43 P0.l = LO(SIC_IWR);
44#endif 44#endif
45 R7 = [P0]; 45 R7 = [P0];
46#if defined(CONFIG_BF561) 46#if defined(CONFIG_BF561)
@@ -60,11 +60,11 @@ ENTRY(_unmask_wdog_wakeup_evt)
60 */ 60 */
61 R7 = 0x0000(z); 61 R7 = 0x0000(z);
62#if defined(CONFIG_BF561) 62#if defined(CONFIG_BF561)
63 P0.h = (WDOGA_STAT >> 16); 63 P0.h = HI(WDOGA_STAT);
64 P0.l = (WDOGA_STAT & 0xFFFF); 64 P0.l = LO(WDOGA_STAT);
65#else 65#else
66 P0.h = (WDOG_STAT >> 16); 66 P0.h = HI(WDOG_STAT);
67 P0.l = (WDOG_STAT & 0xFFFF); 67 P0.l = LO(WDOG_STAT);
68#endif 68#endif
69 [P0] = R7; 69 [P0] = R7;
70 SSYNC; 70 SSYNC;
@@ -73,21 +73,21 @@ ENTRY(_unmask_wdog_wakeup_evt)
73ENTRY(_program_wdog_timer) 73ENTRY(_program_wdog_timer)
74 [--SP] = ( R7:0, P5:0 ); 74 [--SP] = ( R7:0, P5:0 );
75#if defined(CONFIG_BF561) 75#if defined(CONFIG_BF561)
76 P0.h = (WDOGA_CNT >> 16); 76 P0.h = HI(WDOGA_CNT);
77 P0.l = (WDOGA_CNT & 0xFFFF); 77 P0.l = LO(WDOGA_CNT);
78#else 78#else
79 P0.h = (WDOG_CNT >> 16); 79 P0.h = HI(WDOG_CNT);
80 P0.l = (WDOG_CNT & 0xFFFF); 80 P0.l = LO(WDOG_CNT);
81#endif 81#endif
82 [P0] = R0; 82 [P0] = R0;
83 SSYNC; 83 SSYNC;
84 84
85#if defined(CONFIG_BF561) 85#if defined(CONFIG_BF561)
86 P0.h = (WDOGA_CTL >> 16); 86 P0.h = HI(WDOGA_CTL);
87 P0.l = (WDOGA_CTL & 0xFFFF); 87 P0.l = LO(WDOGA_CTL);
88#else 88#else
89 P0.h = (WDOG_CTL >> 16); 89 P0.h = HI(WDOG_CTL);
90 P0.l = (WDOG_CTL & 0xFFFF); 90 P0.l = LO(WDOG_CTL);
91#endif 91#endif
92 R7 = W[P0](Z); 92 R7 = W[P0](Z);
93 CC = BITTST(R7,1); 93 CC = BITTST(R7,1);
@@ -97,11 +97,11 @@ ENTRY(_program_wdog_timer)
97 97
98.LSKIP_WRITE_TO_STAT: 98.LSKIP_WRITE_TO_STAT:
99#if defined(CONFIG_BF561) 99#if defined(CONFIG_BF561)
100 P0.h = (WDOGA_CTL >> 16); 100 P0.h = HI(WDOGA_CTL);
101 P0.l = (WDOGA_CTL & 0xFFFF); 101 P0.l = LO(WDOGA_CTL);
102#else 102#else
103 P0.h = (WDOG_CTL >> 16); 103 P0.h = HI(WDOG_CTL);
104 P0.l = (WDOG_CTL & 0xFFFF); 104 P0.l = LO(WDOG_CTL);
105#endif 105#endif
106 R7 = W[P0](Z); 106 R7 = W[P0](Z);
107 BITCLR(R7,1); /* Enable GP event */ 107 BITCLR(R7,1); /* Enable GP event */
@@ -122,11 +122,11 @@ ENTRY(_clear_wdog_wakeup_evt)
122 [--SP] = ( R7:0, P5:0 ); 122 [--SP] = ( R7:0, P5:0 );
123 123
124#if defined(CONFIG_BF561) 124#if defined(CONFIG_BF561)
125 P0.h = (WDOGA_CTL >> 16); 125 P0.h = HI(WDOGA_CTL);
126 P0.l = (WDOGA_CTL & 0xFFFF); 126 P0.l = LO(WDOGA_CTL);
127#else 127#else
128 P0.h = (WDOG_CTL >> 16); 128 P0.h = HI(WDOG_CTL);
129 P0.l = (WDOG_CTL & 0xFFFF); 129 P0.l = LO(WDOG_CTL);
130#endif 130#endif
131 R7 = 0x0AD6(Z); 131 R7 = 0x0AD6(Z);
132 W[P0] = R7.L; 132 W[P0] = R7.L;
@@ -149,11 +149,11 @@ ENTRY(_clear_wdog_wakeup_evt)
149ENTRY(_disable_wdog_timer) 149ENTRY(_disable_wdog_timer)
150 [--SP] = ( R7:0, P5:0 ); 150 [--SP] = ( R7:0, P5:0 );
151#if defined(CONFIG_BF561) 151#if defined(CONFIG_BF561)
152 P0.h = (WDOGA_CTL >> 16); 152 P0.h = HI(WDOGA_CTL);
153 P0.l = (WDOGA_CTL & 0xFFFF); 153 P0.l = LO(WDOGA_CTL);
154#else 154#else
155 P0.h = (WDOG_CTL >> 16); 155 P0.h = HI(WDOG_CTL);
156 P0.l = (WDOG_CTL & 0xFFFF); 156 P0.l = LO(WDOG_CTL);
157#endif 157#endif
158 R7 = 0xAD6(Z); 158 R7 = 0xAD6(Z);
159 W[P0] = R7.L; 159 W[P0] = R7.L;
@@ -300,7 +300,7 @@ ENTRY(_sleep_deeper)
300 P0.H = hi(PLL_CTL); 300 P0.H = hi(PLL_CTL);
301 P0.L = lo(PLL_CTL); 301 P0.L = lo(PLL_CTL);
302 R5 = W[P0](z); 302 R5 = W[P0](z);
303 R0.L = (MIN_VC/CONFIG_CLKIN_HZ) << 9; 303 R0.L = (CONFIG_MIN_VCO_HZ/CONFIG_CLKIN_HZ) << 9;
304 W[P0] = R0.l; 304 W[P0] = R0.l;
305 305
306 SSYNC; 306 SSYNC;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 960458808344..e3ad5802868a 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -29,21 +29,7 @@
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */ 30 */
31 31
32/* 32/* NOTE: This code handles signal-recognition, which happens every time
33 * 25-Dec-2004 - LG Soft India
34 * 1. Fix in return_from_int, to make sure any pending
35 * system call in ILAT for this process to get
36 * executed, otherwise in case context switch happens,
37 * system call of first process (i.e in ILAT) will be
38 * carried forward to the switched process.
39 * 2. Removed Constant references for the following
40 * a. IPEND
41 * b. EXCAUSE mask
42 * c. PAGE Mask
43 */
44
45/*
46 * NOTE: This code handles signal-recognition, which happens every time
47 * after a timer-interrupt and after each system call. 33 * after a timer-interrupt and after each system call.
48 */ 34 */
49 35
@@ -58,6 +44,23 @@
58 44
59#include <asm/mach-common/context.S> 45#include <asm/mach-common/context.S>
60 46
47#if defined(CONFIG_BFIN_SCRATCH_REG_RETN)
48# define EX_SCRATCH_REG RETN
49#elif defined(CONFIG_BFIN_SCRATCH_REG_RETE)
50# define EX_SCRATCH_REG RETE
51#else
52# define EX_SCRATCH_REG CYCLES
53#endif
54
55#if ANOMALY_05000281
56ENTRY(_safe_speculative_execution)
57 NOP;
58 NOP;
59 NOP;
60 jump _safe_speculative_execution;
61ENDPROC(_safe_speculative_execution)
62#endif
63
61#ifdef CONFIG_EXCPT_IRQ_SYSC_L1 64#ifdef CONFIG_EXCPT_IRQ_SYSC_L1
62.section .l1.text 65.section .l1.text
63#else 66#else
@@ -69,7 +72,7 @@
69 * patch up CPLB misses on the kernel stack. 72 * patch up CPLB misses on the kernel stack.
70 */ 73 */
71ENTRY(_ex_dcplb) 74ENTRY(_ex_dcplb)
72#if defined(ANOMALY_05000261) 75#if ANOMALY_05000261
73 /* 76 /*
74 * Work around an anomaly: if we see a new DCPLB fault, return 77 * Work around an anomaly: if we see a new DCPLB fault, return
75 * without doing anything. Then, if we get the same fault again, 78 * without doing anything. Then, if we get the same fault again,
@@ -93,7 +96,7 @@ ENTRY(_ex_icplb)
93 call __cplb_hdr; 96 call __cplb_hdr;
94 DEBUG_START_HWTRACE(p5, r7) 97 DEBUG_START_HWTRACE(p5, r7)
95 RESTORE_ALL_SYS 98 RESTORE_ALL_SYS
96 SP = RETN; 99 SP = EX_SCRATCH_REG;
97 rtx; 100 rtx;
98ENDPROC(_ex_icplb) 101ENDPROC(_ex_icplb)
99 102
@@ -102,7 +105,7 @@ ENTRY(_ex_syscall)
102 (R7:6,P5:4) = [sp++]; 105 (R7:6,P5:4) = [sp++];
103 ASTAT = [sp++]; 106 ASTAT = [sp++];
104 raise 15; /* invoked by TRAP #0, for sys call */ 107 raise 15; /* invoked by TRAP #0, for sys call */
105 sp = retn; 108 sp = EX_SCRATCH_REG;
106 rtx 109 rtx
107ENDPROC(_ex_syscall) 110ENDPROC(_ex_syscall)
108 111
@@ -135,9 +138,9 @@ ENTRY(_ex_single_step)
135 cc = r6 == r7; 138 cc = r6 == r7;
136 if !cc jump _ex_trap_c; 139 if !cc jump _ex_trap_c;
137 140
138_return_from_exception: 141ENTRY(_return_from_exception)
139 DEBUG_START_HWTRACE(p5, r7) 142 DEBUG_START_HWTRACE(p5, r7)
140#ifdef ANOMALY_05000257 143#if ANOMALY_05000257
141 R7=LC0; 144 R7=LC0;
142 LC0=R7; 145 LC0=R7;
143 R7=LC1; 146 R7=LC1;
@@ -145,7 +148,7 @@ _return_from_exception:
145#endif 148#endif
146 (R7:6,P5:4) = [sp++]; 149 (R7:6,P5:4) = [sp++];
147 ASTAT = [sp++]; 150 ASTAT = [sp++];
148 sp = retn; 151 sp = EX_SCRATCH_REG;
149 rtx; 152 rtx;
150ENDPROC(_ex_soft_bp) 153ENDPROC(_ex_soft_bp)
151 154
@@ -163,7 +166,17 @@ ENTRY(_handle_bad_cplb)
163 [--sp] = ASTAT; 166 [--sp] = ASTAT;
164 [--sp] = (R7:6, P5:4); 167 [--sp] = (R7:6, P5:4);
165 168
169ENTRY(_ex_replaceable)
170 nop;
171
166ENTRY(_ex_trap_c) 172ENTRY(_ex_trap_c)
173 /* Make sure we are not in a double fault */
174 p4.l = lo(IPEND);
175 p4.h = hi(IPEND);
176 r7 = [p4];
177 CC = BITTST (r7, 5);
178 if CC jump _double_fault;
179
167 /* Call C code (trap_c) to handle the exception, which most 180 /* Call C code (trap_c) to handle the exception, which most
168 * likely involves sending a signal to the current process. 181 * likely involves sending a signal to the current process.
169 * To avoid double faults, lower our priority to IRQ5 first. 182 * To avoid double faults, lower our priority to IRQ5 first.
@@ -204,11 +217,57 @@ ENTRY(_ex_trap_c)
204 DEBUG_START_HWTRACE(p5, r7) 217 DEBUG_START_HWTRACE(p5, r7)
205 (R7:6,P5:4) = [sp++]; 218 (R7:6,P5:4) = [sp++];
206 ASTAT = [sp++]; 219 ASTAT = [sp++];
207 SP = RETN; 220 SP = EX_SCRATCH_REG;
208 raise 5; 221 raise 5;
209 rtx; 222 rtx;
210ENDPROC(_ex_trap_c) 223ENDPROC(_ex_trap_c)
211 224
225/* We just realized we got an exception, while we were processing a different
226 * exception. This is a unrecoverable event, so crash
227 */
228ENTRY(_double_fault)
229 /* Turn caches & protection off, to ensure we don't get any more
230 * double exceptions
231 */
232
233 P4.L = LO(IMEM_CONTROL);
234 P4.H = HI(IMEM_CONTROL);
235
236 R5 = [P4]; /* Control Register*/
237 BITCLR(R5,ENICPLB_P);
238 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
239 .align 8;
240 [P4] = R5;
241 SSYNC;
242
243 P4.L = LO(DMEM_CONTROL);
244 P4.H = HI(DMEM_CONTROL);
245 R5 = [P4];
246 BITCLR(R5,ENDCPLB_P);
247 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
248 .align 8;
249 [P4] = R5;
250 SSYNC;
251
252 /* Fix up the stack */
253 (R7:6,P5:4) = [sp++];
254 ASTAT = [sp++];
255 SP = EX_SCRATCH_REG;
256
257 /* We should be out of the exception stack, and back down into
258 * kernel or user space stack
259 */
260 SAVE_ALL_SYS
261
262 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
263 SP += -12;
264 call _double_fault_c;
265 SP += 12;
266.L_double_fault_panic:
267 JUMP .L_double_fault_panic
268
269ENDPROC(_double_fault)
270
212ENTRY(_exception_to_level5) 271ENTRY(_exception_to_level5)
213 SAVE_ALL_SYS 272 SAVE_ALL_SYS
214 273
@@ -279,7 +338,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
279 * covered by a CPLB. Switch to an exception stack; use RETN as a 338 * covered by a CPLB. Switch to an exception stack; use RETN as a
280 * scratch register (for want of a better option). 339 * scratch register (for want of a better option).
281 */ 340 */
282 retn = sp; 341 EX_SCRATCH_REG = sp;
283 sp.l = _exception_stack_top; 342 sp.l = _exception_stack_top;
284 sp.h = _exception_stack_top; 343 sp.h = _exception_stack_top;
285 /* Try to deal with syscalls quickly. */ 344 /* Try to deal with syscalls quickly. */
@@ -290,8 +349,8 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
290 r6.l = lo(SEQSTAT_EXCAUSE); 349 r6.l = lo(SEQSTAT_EXCAUSE);
291 r6.h = hi(SEQSTAT_EXCAUSE); 350 r6.h = hi(SEQSTAT_EXCAUSE);
292 r7 = r7 & r6; 351 r7 = r7 & r6;
293 p5.h = _extable; 352 p5.h = _ex_table;
294 p5.l = _extable; 353 p5.l = _ex_table;
295 p4 = r7; 354 p4 = r7;
296 p5 = p5 + (p4 << 2); 355 p5 = p5 + (p4 << 2);
297 p4 = [p5]; 356 p4 = [p5];
@@ -634,9 +693,9 @@ ENTRY(_return_from_int)
634 p1.h = _schedule_and_signal_from_int; 693 p1.h = _schedule_and_signal_from_int;
635 [p0] = p1; 694 [p0] = p1;
636 csync; 695 csync;
637#if defined(ANOMALY_05000281) 696#if ANOMALY_05000281
638 r0.l = lo(CONFIG_BOOT_LOAD); 697 r0.l = _safe_speculative_execution;
639 r0.h = hi(CONFIG_BOOT_LOAD); 698 r0.h = _safe_speculative_execution;
640 reti = r0; 699 reti = r0;
641#endif 700#endif
642 r0 = 0x801f (z); 701 r0 = 0x801f (z);
@@ -648,9 +707,9 @@ ENTRY(_return_from_int)
648ENDPROC(_return_from_int) 707ENDPROC(_return_from_int)
649 708
650ENTRY(_lower_to_irq14) 709ENTRY(_lower_to_irq14)
651#if defined(ANOMALY_05000281) 710#if ANOMALY_05000281
652 r0.l = lo(CONFIG_BOOT_LOAD); 711 r0.l = _safe_speculative_execution;
653 r0.h = hi(CONFIG_BOOT_LOAD); 712 r0.h = _safe_speculative_execution;
654 reti = r0; 713 reti = r0;
655#endif 714#endif
656 r0 = 0x401f; 715 r0 = 0x401f;
@@ -731,6 +790,114 @@ ENTRY(_init_exception_buff)
731 rts; 790 rts;
732ENDPROC(_init_exception_buff) 791ENDPROC(_init_exception_buff)
733 792
793/* We handle this 100% in exception space - to reduce overhead
794 * Only potiential problem is if the software buffer gets swapped out of the
795 * CPLB table - then double fault. - so we don't let this happen in other places
796 */
797#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
798ENTRY(_ex_trace_buff_full)
799 [--sp] = P3;
800 [--sp] = P2;
801 [--sp] = LC0;
802 [--sp] = LT0;
803 [--sp] = LB0;
804 P5.L = _trace_buff_offset;
805 P5.H = _trace_buff_offset;
806 P3 = [P5]; /* trace_buff_offset */
807 P5.L = lo(TBUFSTAT);
808 P5.H = hi(TBUFSTAT);
809 R7 = [P5];
810 R7 <<= 1; /* double, since we need to read twice */
811 LC0 = R7;
812 R7 <<= 2; /* need to shift over again,
813 * to get the number of bytes */
814 P5.L = lo(TBUF);
815 P5.H = hi(TBUF);
816 R6 = ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN)*1024) - 1;
817
818 P2 = R7;
819 P3 = P3 + P2;
820 R7 = P3;
821 R7 = R7 & R6;
822 P3 = R7;
823 P2.L = _trace_buff_offset;
824 P2.H = _trace_buff_offset;
825 [P2] = P3;
826
827 P2.L = _software_trace_buff;
828 P2.H = _software_trace_buff;
829
830 LSETUP (.Lstart, .Lend) LC0;
831.Lstart:
832 R7 = [P5]; /* read TBUF */
833 P4 = P3 + P2;
834 [P4] = R7;
835 P3 += -4;
836 R7 = P3;
837 R7 = R7 & R6;
838.Lend:
839 P3 = R7;
840
841 LB0 = [sp++];
842 LT0 = [sp++];
843 LC0 = [sp++];
844 P2 = [sp++];
845 P3 = [sp++];
846 jump _return_from_exception;
847ENDPROC(_ex_trace_buff_full)
848
849#if CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN == 4
850.data
851#else
852.section .l1.data.B
853#endif /* CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN */
854ENTRY(_trace_buff_offset)
855 .long 0;
856ALIGN
857ENTRY(_software_trace_buff)
858 .rept ((1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN)*256);
859 .long 0
860 .endr
861#endif /* CONFIG_DEBUG_BFIN_HWTRACE_EXPAND */
862
863#if CONFIG_EARLY_PRINTK
864.section .init.text
865ENTRY(_early_trap)
866 SAVE_ALL_SYS
867 trace_buffer_stop(p0,r0);
868
869 /* Turn caches off, to ensure we don't get double exceptions */
870
871 P4.L = LO(IMEM_CONTROL);
872 P4.H = HI(IMEM_CONTROL);
873
874 R5 = [P4]; /* Control Register*/
875 BITCLR(R5,ENICPLB_P);
876 CLI R1;
877 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
878 .align 8;
879 [P4] = R5;
880 SSYNC;
881
882 P4.L = LO(DMEM_CONTROL);
883 P4.H = HI(DMEM_CONTROL);
884 R5 = [P4];
885 BITCLR(R5,ENDCPLB_P);
886 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
887 .align 8;
888 [P4] = R5;
889 SSYNC;
890 STI R1;
891
892 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
893 r1 = RETX;
894
895 SP += -12;
896 call _early_trap_c;
897 SP += 12;
898ENDPROC(_early_trap)
899#endif /* CONFIG_EARLY_PRINTK */
900
734/* 901/*
735 * Put these in the kernel data section - that should always be covered by 902 * Put these in the kernel data section - that should always be covered by
736 * a CPLB. This is needed to ensure we don't get double fault conditions 903 * a CPLB. This is needed to ensure we don't get double fault conditions
@@ -741,30 +908,33 @@ ENDPROC(_init_exception_buff)
741#else 908#else
742.data 909.data
743#endif 910#endif
744ALIGN 911ENTRY(_ex_table)
745_extable:
746 /* entry for each EXCAUSE[5:0] 912 /* entry for each EXCAUSE[5:0]
747 * This table must be in sync with the table in ./kernel/traps.c 913 * This table must be in sync with the table in ./kernel/traps.c
748 * EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined 914 * EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined
749 */ 915 */
750 .long _ex_syscall; /* 0x00 - User Defined - Linux Syscall */ 916 .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
751 .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */ 917 .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
752 .long _ex_trap_c /* 0x02 - User Defined */ 918 .long _ex_replaceable /* 0x02 - User Defined */
753 .long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */ 919 .long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */
754 .long _ex_trap_c /* 0x04 - User Defined */ 920 .long _ex_replaceable /* 0x04 - User Defined */
755 .long _ex_trap_c /* 0x05 - User Defined */ 921 .long _ex_replaceable /* 0x05 - User Defined */
756 .long _ex_trap_c /* 0x06 - User Defined */ 922 .long _ex_replaceable /* 0x06 - User Defined */
757 .long _ex_trap_c /* 0x07 - User Defined */ 923 .long _ex_replaceable /* 0x07 - User Defined */
758 .long _ex_trap_c /* 0x08 - User Defined */ 924 .long _ex_replaceable /* 0x08 - User Defined */
759 .long _ex_trap_c /* 0x09 - User Defined */ 925 .long _ex_replaceable /* 0x09 - User Defined */
760 .long _ex_trap_c /* 0x0A - User Defined */ 926 .long _ex_replaceable /* 0x0A - User Defined */
761 .long _ex_trap_c /* 0x0B - User Defined */ 927 .long _ex_replaceable /* 0x0B - User Defined */
762 .long _ex_trap_c /* 0x0C - User Defined */ 928 .long _ex_replaceable /* 0x0C - User Defined */
763 .long _ex_trap_c /* 0x0D - User Defined */ 929 .long _ex_replaceable /* 0x0D - User Defined */
764 .long _ex_trap_c /* 0x0E - User Defined */ 930 .long _ex_replaceable /* 0x0E - User Defined */
765 .long _ex_trap_c /* 0x0F - User Defined */ 931 .long _ex_replaceable /* 0x0F - User Defined */
766 .long _ex_single_step /* 0x10 - HW Single step */ 932 .long _ex_single_step /* 0x10 - HW Single step */
933#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
934 .long _ex_trace_buff_full /* 0x11 - Trace Buffer Full */
935#else
767 .long _ex_trap_c /* 0x11 - Trace Buffer Full */ 936 .long _ex_trap_c /* 0x11 - Trace Buffer Full */
937#endif
768 .long _ex_trap_c /* 0x12 - Reserved */ 938 .long _ex_trap_c /* 0x12 - Reserved */
769 .long _ex_trap_c /* 0x13 - Reserved */ 939 .long _ex_trap_c /* 0x13 - Reserved */
770 .long _ex_trap_c /* 0x14 - Reserved */ 940 .long _ex_trap_c /* 0x14 - Reserved */
@@ -812,8 +982,8 @@ _extable:
812 .long _ex_trap_c /* 0x3D - Reserved */ 982 .long _ex_trap_c /* 0x3D - Reserved */
813 .long _ex_trap_c /* 0x3E - Reserved */ 983 .long _ex_trap_c /* 0x3E - Reserved */
814 .long _ex_trap_c /* 0x3F - Reserved */ 984 .long _ex_trap_c /* 0x3F - Reserved */
985END(_ex_table)
815 986
816ALIGN
817ENTRY(_sys_call_table) 987ENTRY(_sys_call_table)
818 .long _sys_restart_syscall /* 0 */ 988 .long _sys_restart_syscall /* 0 */
819 .long _sys_exit 989 .long _sys_exit
@@ -1184,7 +1354,7 @@ _exception_stack:
1184 .endr 1354 .endr
1185_exception_stack_top: 1355_exception_stack_top:
1186 1356
1187#if defined(ANOMALY_05000261) 1357#if ANOMALY_05000261
1188/* Used by the assembly entry point to work around an anomaly. */ 1358/* Used by the assembly entry point to work around an anomaly. */
1189_last_cplb_fault_retx: 1359_last_cplb_fault_retx:
1190 .long 0; 1360 .long 0;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 203e20709163..c6b32fe0f6e9 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -46,30 +46,6 @@
46 46
47.align 4 /* just in case */ 47.align 4 /* just in case */
48 48
49/*
50 * initial interrupt handlers
51 */
52
53#ifndef CONFIG_KGDB
54 /* interrupt routine for emulation - 0 */
55 /* Currently used only if GDB stub is not in - invalid */
56 /* gdb-stub set the evt itself */
57 /* save registers for post-mortem only */
58ENTRY(_evt_emulation)
59 SAVE_ALL_SYS
60#ifdef CONFIG_FRAME_POINTER
61 fp = 0;
62#endif
63 r0 = IRQ_EMU;
64 r1 = sp;
65 SP += -12;
66 call _irq_panic;
67 SP += 12;
68 /* - GDB stub fills this in by itself (if defined) */
69 rte;
70ENDPROC(_evt_emulation)
71#endif
72
73/* Common interrupt entry code. First we do CLI, then push 49/* Common interrupt entry code. First we do CLI, then push
74 * RETI, to keep interrupts disabled, but to allow this state to be changed 50 * RETI, to keep interrupts disabled, but to allow this state to be changed
75 * by local_bh_enable. 51 * by local_bh_enable.
@@ -140,7 +116,7 @@ __common_int_entry:
140 fp = 0; 116 fp = 0;
141#endif 117#endif
142 118
143#if defined (ANOMALY_05000283) || defined (ANOMALY_05000315) 119#if ANOMALY_05000283 || ANOMALY_05000315
144 cc = r7 == r7; 120 cc = r7 == r7;
145 p5.h = 0xffc0; 121 p5.h = 0xffc0;
146 p5.l = 0x0014; 122 p5.l = 0x0014;
@@ -163,7 +139,7 @@ ENTRY(_evt_ivhw)
163#ifdef CONFIG_FRAME_POINTER 139#ifdef CONFIG_FRAME_POINTER
164 fp = 0; 140 fp = 0;
165#endif 141#endif
166#ifdef ANOMALY_05000283 142#if ANOMALY_05000283
167 cc = r7 == r7; 143 cc = r7 == r7;
168 p5.h = 0xffc0; 144 p5.h = 0xffc0;
169 p5.l = 0x0014; 145 p5.l = 0x0014;
@@ -201,27 +177,15 @@ ENTRY(_evt_ivhw)
201 jump .Lcommon_restore_context; 177 jump .Lcommon_restore_context;
202#endif 178#endif
203 179
204/* interrupt routine for evt2 - 2. This is NMI. */ 180/* Interrupt routine for evt2 (NMI).
205ENTRY(_evt_evt2) 181 * We don't actually use this, so just return.
206 SAVE_CONTEXT 182 * For inner circle type details, please see:
207#ifdef CONFIG_FRAME_POINTER 183 * http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi
208 fp = 0; 184 */
209#endif 185ENTRY(_evt_nmi)
210#ifdef ANOMALY_05000283 186.weak _evt_nmi
211 cc = r7 == r7;
212 p5.h = 0xffc0;
213 p5.l = 0x0014;
214 if cc jump 1f;
215 r7.l = W[p5];
2161:
217#endif
218 r0 = IRQ_NMI;
219 r1 = sp;
220 SP += -12;
221 call _asm_do_IRQ;
222 SP += 12;
223 RESTORE_CONTEXT
224 rtn; 187 rtn;
188ENDPROC(_evt_nmi)
225 189
226/* interrupt routine for core timer - 6 */ 190/* interrupt routine for core timer - 6 */
227ENTRY(_evt_timer) 191ENTRY(_evt_timer)
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 660f881b620a..2db3546fc874 100644
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -221,7 +221,7 @@ static unsigned int bf561_gpio_irq_startup(unsigned int irq)
221 221
222 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 222 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
223 223
224 ret = gpio_request(gpionr, NULL); 224 ret = gpio_request(gpionr, "IRQ");
225 if (ret) 225 if (ret)
226 return ret; 226 return ret;
227 227
@@ -261,7 +261,7 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
261 261
262 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 262 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
263 263
264 ret = gpio_request(gpionr, NULL); 264 ret = gpio_request(gpionr, "IRQ");
265 if (ret) 265 if (ret)
266 return ret; 266 return ret;
267 267
@@ -362,10 +362,11 @@ void __init init_exception_vectors(void)
362{ 362{
363 SSYNC(); 363 SSYNC();
364 364
365#ifndef CONFIG_KGDB 365 /* cannot program in software:
366 bfin_write_EVT0(evt_emulation); 366 * evt0 - emulation (jtag)
367#endif 367 * evt1 - reset
368 bfin_write_EVT2(evt_evt2); 368 */
369 bfin_write_EVT2(evt_nmi);
369 bfin_write_EVT3(trap); 370 bfin_write_EVT3(trap);
370 bfin_write_EVT5(evt_ivhw); 371 bfin_write_EVT5(evt_ivhw);
371 bfin_write_EVT6(evt_timer); 372 bfin_write_EVT6(evt_timer);
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index 4708023fe716..d3b7672b2b94 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -343,7 +343,7 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
343 u16 gpionr = irq - IRQ_PF0; 343 u16 gpionr = irq - IRQ_PF0;
344 344
345 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 345 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
346 ret = gpio_request(gpionr, NULL); 346 ret = gpio_request(gpionr, "IRQ");
347 if (ret) 347 if (ret)
348 return ret; 348 return ret;
349 } 349 }
@@ -377,7 +377,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
377 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING | 377 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
378 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 378 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
379 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 379 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
380 ret = gpio_request(gpionr, NULL); 380 ret = gpio_request(gpionr, "IRQ");
381 if (ret) 381 if (ret)
382 return ret; 382 return ret;
383 } 383 }
@@ -587,7 +587,7 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
587 } 587 }
588 588
589 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 589 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
590 ret = gpio_request(gpionr, NULL); 590 ret = gpio_request(gpionr, "IRQ");
591 if (ret) 591 if (ret)
592 return ret; 592 return ret;
593 } 593 }
@@ -627,7 +627,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
627 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING | 627 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
628 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 628 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
629 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) { 629 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
630 ret = gpio_request(gpionr, NULL); 630 ret = gpio_request(gpionr, "IRQ");
631 if (ret) 631 if (ret)
632 return ret; 632 return ret;
633 } 633 }
@@ -721,10 +721,11 @@ void __init init_exception_vectors(void)
721{ 721{
722 SSYNC(); 722 SSYNC();
723 723
724#ifndef CONFIG_KGDB 724 /* cannot program in software:
725 bfin_write_EVT0(evt_emulation); 725 * evt0 - emulation (jtag)
726#endif 726 * evt1 - reset
727 bfin_write_EVT2(evt_evt2); 727 */
728 bfin_write_EVT2(evt_nmi);
728 bfin_write_EVT3(trap); 729 bfin_write_EVT3(trap);
729 bfin_write_EVT5(evt_ivhw); 730 bfin_write_EVT5(evt_ivhw);
730 bfin_write_EVT6(evt_timer); 731 bfin_write_EVT6(evt_timer);
diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S
index 386ac8dda076..28b87fe9ce3c 100644
--- a/arch/blackfin/mach-common/lock.S
+++ b/arch/blackfin/mach-common/lock.S
@@ -33,7 +33,7 @@
33 33
34.text 34.text
35 35
36#ifdef CONFIG_BLKFIN_CACHE_LOCK 36#ifdef CONFIG_BFIN_ICACHE_LOCK
37 37
38/* When you come here, it is assumed that 38/* When you come here, it is assumed that
39 * R0 - Which way to be locked 39 * R0 - Which way to be locked
@@ -43,12 +43,12 @@ ENTRY(_cache_grab_lock)
43 43
44 [--SP]=( R7:0,P5:0 ); 44 [--SP]=( R7:0,P5:0 );
45 45
46 P1.H = (IMEM_CONTROL >> 16); 46 P1.H = HI(IMEM_CONTROL);
47 P1.L = (IMEM_CONTROL & 0xFFFF); 47 P1.L = LO(IMEM_CONTROL);
48 P5.H = (ICPLB_ADDR0 >> 16); 48 P5.H = HI(ICPLB_ADDR0);
49 P5.L = (ICPLB_ADDR0 & 0xFFFF); 49 P5.L = LO(ICPLB_ADDR0);
50 P4.H = (ICPLB_DATA0 >> 16); 50 P4.H = HI(ICPLB_DATA0);
51 P4.L = (ICPLB_DATA0 & 0xFFFF); 51 P4.L = LO(ICPLB_DATA0);
52 R7 = R0; 52 R7 = R0;
53 53
54 /* If the code of interest already resides in the cache 54 /* If the code of interest already resides in the cache
@@ -167,8 +167,8 @@ ENTRY(_cache_lock)
167 167
168 [--SP]=( R7:0,P5:0 ); 168 [--SP]=( R7:0,P5:0 );
169 169
170 P1.H = (IMEM_CONTROL >> 16); 170 P1.H = HI(IMEM_CONTROL);
171 P1.L = (IMEM_CONTROL & 0xFFFF); 171 P1.L = LO(IMEM_CONTROL);
172 172
173 /* Disable the Interrupts*/ 173 /* Disable the Interrupts*/
174 CLI R3; 174 CLI R3;
@@ -189,14 +189,14 @@ ENTRY(_cache_lock)
189 RTS; 189 RTS;
190ENDPROC(_cache_lock) 190ENDPROC(_cache_lock)
191 191
192#endif /* BLKFIN_CACHE_LOCK */ 192#endif /* BFIN_ICACHE_LOCK */
193 193
194/* Return the ILOC bits of IMEM_CONTROL 194/* Return the ILOC bits of IMEM_CONTROL
195 */ 195 */
196 196
197ENTRY(_read_iloc) 197ENTRY(_read_iloc)
198 P1.H = (IMEM_CONTROL >> 16); 198 P1.H = HI(IMEM_CONTROL);
199 P1.L = (IMEM_CONTROL & 0xFFFF); 199 P1.L = LO(IMEM_CONTROL);
200 R1 = 0xF; 200 R1 = 0xF;
201 R0 = [P1]; 201 R0 = [P1];
202 R0 = R0 >> 3; 202 R0 = R0 >> 3;
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index 68459cc052a1..e97ea8fc8dc4 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -53,7 +53,7 @@ static unsigned long empty_bad_page;
53 53
54unsigned long empty_zero_page; 54unsigned long empty_zero_page;
55 55
56void __init show_mem(void) 56void show_mem(void)
57{ 57{
58 unsigned long i; 58 unsigned long i;
59 int free = 0, total = 0, reserved = 0, shared = 0; 59 int free = 0, total = 0, reserved = 0, shared = 0;
diff --git a/arch/blackfin/oprofile/op_blackfin.h b/arch/blackfin/oprofile/op_blackfin.h
index f88f446c814f..05dd08c9d154 100644
--- a/arch/blackfin/oprofile/op_blackfin.h
+++ b/arch/blackfin/oprofile/op_blackfin.h
@@ -68,7 +68,7 @@ static inline unsigned int ctr_read(void)
68 unsigned int tmp; 68 unsigned int tmp;
69 69
70 tmp = bfin_read_PFCTL(); 70 tmp = bfin_read_PFCTL();
71 __builtin_bfin_csync(); 71 CSYNC();
72 72
73 return tmp; 73 return tmp;
74} 74}
@@ -76,21 +76,21 @@ static inline unsigned int ctr_read(void)
76static inline void ctr_write(unsigned int val) 76static inline void ctr_write(unsigned int val)
77{ 77{
78 bfin_write_PFCTL(val); 78 bfin_write_PFCTL(val);
79 __builtin_bfin_csync(); 79 CSYNC();
80} 80}
81 81
82static inline void count_read(unsigned int *count) 82static inline void count_read(unsigned int *count)
83{ 83{
84 count[0] = bfin_read_PFCNTR0(); 84 count[0] = bfin_read_PFCNTR0();
85 count[1] = bfin_read_PFCNTR1(); 85 count[1] = bfin_read_PFCNTR1();
86 __builtin_bfin_csync(); 86 CSYNC();
87} 87}
88 88
89static inline void count_write(unsigned int *count) 89static inline void count_write(unsigned int *count)
90{ 90{
91 bfin_write_PFCNTR0(count[0]); 91 bfin_write_PFCNTR0(count[0]);
92 bfin_write_PFCNTR1(count[1]); 92 bfin_write_PFCNTR1(count[1]);
93 __builtin_bfin_csync(); 93 CSYNC();
94} 94}
95 95
96extern int pm_overflow_handler(int irq, struct pt_regs *regs); 96extern int pm_overflow_handler(int irq, struct pt_regs *regs);
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 97b64d7d6bf6..2d85e4b87307 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -226,7 +226,7 @@ config PARAVIRT
226 However, when run without a hypervisor the kernel is 226 However, when run without a hypervisor the kernel is
227 theoretically slower. If in doubt, say N. 227 theoretically slower. If in doubt, say N.
228 228
229source "arch/i386/xen/Kconfig" 229source "arch/x86/xen/Kconfig"
230 230
231config VMI 231config VMI
232 bool "VMI Paravirt-ops support" 232 bool "VMI Paravirt-ops support"
@@ -707,7 +707,7 @@ config MATH_EMULATION
707 intend to use this kernel on different machines. 707 intend to use this kernel on different machines.
708 708
709 More information about the internals of the Linux math coprocessor 709 More information about the internals of the Linux math coprocessor
710 emulation can be found in <file:arch/i386/math-emu/README>. 710 emulation can be found in <file:arch/x86/math-emu/README>.
711 711
712 If you are not sure, say Y; apart from resulting in a 66 KB bigger 712 If you are not sure, say Y; apart from resulting in a 66 KB bigger
713 kernel, it won't hurt. 713 kernel, it won't hurt.
@@ -1067,7 +1067,7 @@ config APM_REAL_MODE_POWER_OFF
1067 1067
1068endif # APM 1068endif # APM
1069 1069
1070source "arch/i386/kernel/cpu/cpufreq/Kconfig" 1070source "arch/x86/kernel/cpu/cpufreq/Kconfig"
1071 1071
1072endmenu 1072endmenu
1073 1073
@@ -1240,7 +1240,7 @@ menuconfig INSTRUMENTATION
1240 1240
1241if INSTRUMENTATION 1241if INSTRUMENTATION
1242 1242
1243source "arch/i386/oprofile/Kconfig" 1243source "arch/x86/oprofile/Kconfig"
1244 1244
1245config KPROBES 1245config KPROBES
1246 bool "Kprobes" 1246 bool "Kprobes"
diff --git a/arch/i386/Makefile b/arch/i386/Makefile
index 52b932478c6d..5e50dbf00f3e 100644
--- a/arch/i386/Makefile
+++ b/arch/i386/Makefile
@@ -17,6 +17,9 @@
17# 20050320 Kianusch Sayah Karadji <kianusch@sk-tech.net> 17# 20050320 Kianusch Sayah Karadji <kianusch@sk-tech.net>
18# Added support for GEODE CPU 18# Added support for GEODE CPU
19 19
20# Fill in SRCARCH
21SRCARCH := x86
22
20HAS_BIARCH := $(call cc-option-yn, -m32) 23HAS_BIARCH := $(call cc-option-yn, -m32)
21ifeq ($(HAS_BIARCH),y) 24ifeq ($(HAS_BIARCH),y)
22AS := $(AS) --32 25AS := $(AS) --32
@@ -61,62 +64,62 @@ AFLAGS += $(call as-instr,.cfi_startproc\n.cfi_signal_frame\n.cfi_endproc,-DCONF
61CFLAGS += $(cflags-y) 64CFLAGS += $(cflags-y)
62 65
63# Default subarch .c files 66# Default subarch .c files
64mcore-y := mach-default 67mcore-y := arch/x86/mach-default
65 68
66# Voyager subarch support 69# Voyager subarch support
67mflags-$(CONFIG_X86_VOYAGER) := -Iinclude/asm-i386/mach-voyager 70mflags-$(CONFIG_X86_VOYAGER) := -Iinclude/asm-x86/mach-voyager
68mcore-$(CONFIG_X86_VOYAGER) := mach-voyager 71mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager
69 72
70# VISWS subarch support 73# VISWS subarch support
71mflags-$(CONFIG_X86_VISWS) := -Iinclude/asm-i386/mach-visws 74mflags-$(CONFIG_X86_VISWS) := -Iinclude/asm-x86/mach-visws
72mcore-$(CONFIG_X86_VISWS) := mach-visws 75mcore-$(CONFIG_X86_VISWS) := arch/x86/mach-visws
73 76
74# NUMAQ subarch support 77# NUMAQ subarch support
75mflags-$(CONFIG_X86_NUMAQ) := -Iinclude/asm-i386/mach-numaq 78mflags-$(CONFIG_X86_NUMAQ) := -Iinclude/asm-x86/mach-numaq
76mcore-$(CONFIG_X86_NUMAQ) := mach-default 79mcore-$(CONFIG_X86_NUMAQ) := arch/x86/mach-default
77 80
78# BIGSMP subarch support 81# BIGSMP subarch support
79mflags-$(CONFIG_X86_BIGSMP) := -Iinclude/asm-i386/mach-bigsmp 82mflags-$(CONFIG_X86_BIGSMP) := -Iinclude/asm-x86/mach-bigsmp
80mcore-$(CONFIG_X86_BIGSMP) := mach-default 83mcore-$(CONFIG_X86_BIGSMP) := arch/x86/mach-default
81 84
82#Summit subarch support 85#Summit subarch support
83mflags-$(CONFIG_X86_SUMMIT) := -Iinclude/asm-i386/mach-summit 86mflags-$(CONFIG_X86_SUMMIT) := -Iinclude/asm-x86/mach-summit
84mcore-$(CONFIG_X86_SUMMIT) := mach-default 87mcore-$(CONFIG_X86_SUMMIT) := arch/x86/mach-default
85 88
86# generic subarchitecture 89# generic subarchitecture
87mflags-$(CONFIG_X86_GENERICARCH) := -Iinclude/asm-i386/mach-generic 90mflags-$(CONFIG_X86_GENERICARCH) := -Iinclude/asm-x86/mach-generic
88mcore-$(CONFIG_X86_GENERICARCH) := mach-default 91mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default
89core-$(CONFIG_X86_GENERICARCH) += arch/i386/mach-generic/ 92core-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/
90 93
91# ES7000 subarch support 94# ES7000 subarch support
92mflags-$(CONFIG_X86_ES7000) := -Iinclude/asm-i386/mach-es7000 95mflags-$(CONFIG_X86_ES7000) := -Iinclude/asm-x86/mach-es7000
93mcore-$(CONFIG_X86_ES7000) := mach-default 96mcore-$(CONFIG_X86_ES7000) := arch/x86/mach-default
94core-$(CONFIG_X86_ES7000) := arch/i386/mach-es7000/ 97core-$(CONFIG_X86_ES7000) := arch/x86/mach-es7000/
95 98
96# Xen paravirtualization support 99# Xen paravirtualization support
97core-$(CONFIG_XEN) += arch/i386/xen/ 100core-$(CONFIG_XEN) += arch/x86/xen/
98 101
99# default subarch .h files 102# default subarch .h files
100mflags-y += -Iinclude/asm-i386/mach-default 103mflags-y += -Iinclude/asm-x86/mach-default
101 104
102head-y := arch/i386/kernel/head.o arch/i386/kernel/init_task.o 105head-y := arch/x86/kernel/head_32.o arch/x86/kernel/init_task_32.o
103 106
104libs-y += arch/i386/lib/ 107libs-y += arch/x86/lib/
105core-y += arch/i386/kernel/ \ 108core-y += arch/x86/kernel/ \
106 arch/i386/mm/ \ 109 arch/x86/mm/ \
107 arch/i386/$(mcore-y)/ \ 110 $(mcore-y)/ \
108 arch/i386/crypto/ 111 arch/x86/crypto/
109drivers-$(CONFIG_MATH_EMULATION) += arch/i386/math-emu/ 112drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
110drivers-$(CONFIG_PCI) += arch/i386/pci/ 113drivers-$(CONFIG_PCI) += arch/x86/pci/
111# must be linked after kernel/ 114# must be linked after kernel/
112drivers-$(CONFIG_OPROFILE) += arch/i386/oprofile/ 115drivers-$(CONFIG_OPROFILE) += arch/x86/oprofile/
113drivers-$(CONFIG_PM) += arch/i386/power/ 116drivers-$(CONFIG_PM) += arch/x86/power/
114drivers-$(CONFIG_FB) += arch/i386/video/ 117drivers-$(CONFIG_FB) += arch/x86/video/
115 118
116CFLAGS += $(mflags-y) 119CFLAGS += $(mflags-y)
117AFLAGS += $(mflags-y) 120AFLAGS += $(mflags-y)
118 121
119boot := arch/i386/boot 122boot := arch/x86/boot
120 123
121PHONY += zImage bzImage compressed zlilo bzlilo \ 124PHONY += zImage bzImage compressed zlilo bzlilo \
122 zdisk bzdisk fdimage fdimage144 fdimage288 isoimage install 125 zdisk bzdisk fdimage fdimage144 fdimage288 isoimage install
@@ -125,9 +128,11 @@ all: bzImage
125 128
126# KBUILD_IMAGE specify target image being built 129# KBUILD_IMAGE specify target image being built
127 KBUILD_IMAGE := $(boot)/bzImage 130 KBUILD_IMAGE := $(boot)/bzImage
128zImage zlilo zdisk: KBUILD_IMAGE := arch/i386/boot/zImage 131zImage zlilo zdisk: KBUILD_IMAGE := arch/x86/boot/zImage
129 132
130zImage bzImage: vmlinux 133zImage bzImage: vmlinux
134 $(Q)mkdir -p $(objtree)/arch/i386/boot
135 $(Q)ln -fsn $(objtree)/arch/x86/boot/bzImage $(objtree)/arch/i386/boot/bzImage
131 $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE) 136 $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE)
132 137
133compressed: zImage 138compressed: zImage
@@ -145,7 +150,8 @@ install:
145 $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install 150 $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
146 151
147archclean: 152archclean:
148 $(Q)$(MAKE) $(clean)=arch/i386/boot 153 $(Q)rm -rf $(objtree)/arch/i386/boot
154 $(Q)$(MAKE) $(clean)=arch/x86/boot
149 155
150define archhelp 156define archhelp
151 echo '* bzImage - Compressed kernel image (arch/$(ARCH)/boot/bzImage)' 157 echo '* bzImage - Compressed kernel image (arch/$(ARCH)/boot/bzImage)'
diff --git a/arch/i386/boot/Makefile b/arch/i386/boot/Makefile
deleted file mode 100644
index 93386a4e40b4..000000000000
--- a/arch/i386/boot/Makefile
+++ /dev/null
@@ -1,171 +0,0 @@
1#
2# arch/i386/boot/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# Copyright (C) 1994 by Linus Torvalds
9#
10
11# ROOT_DEV specifies the default root-device when making the image.
12# This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
13# the default of FLOPPY is used by 'build'.
14
15ROOT_DEV := CURRENT
16
17# If you want to preset the SVGA mode, uncomment the next line and
18# set SVGA_MODE to whatever number you want.
19# Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
20# The number is the same as you would ordinarily press at bootup.
21
22SVGA_MODE := -DSVGA_MODE=NORMAL_VGA
23
24# If you want the RAM disk device, define this to be the size in blocks.
25
26#RAMDISK := -DRAMDISK=512
27
28targets := vmlinux.bin setup.bin setup.elf zImage bzImage
29subdir- := compressed
30
31setup-y += a20.o apm.o cmdline.o copy.o cpu.o cpucheck.o edd.o
32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o
33setup-y += printf.o string.o tty.o video.o version.o voyager.o
34
35# The link order of the video-*.o modules can matter. In particular,
36# video-vga.o *must* be listed first, followed by video-vesa.o.
37# Hardware-specific drivers should follow in the order they should be
38# probed, and video-bios.o should typically be last.
39setup-y += video-vga.o
40setup-y += video-vesa.o
41setup-y += video-bios.o
42targets += $(setup-y)
43hostprogs-y := tools/build
44
45HOSTCFLAGS_build.o := $(LINUXINCLUDE)
46
47# ---------------------------------------------------------------------------
48
49# How to compile the 16-bit code. Note we always compile for -march=i386,
50# that way we can complain to the user if the CPU is insufficient.
51cflags-i386 :=
52cflags-x86_64 := -m32
53CFLAGS := $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
54 $(cflags-$(ARCH)) \
55 -Wall -Wstrict-prototypes \
56 -march=i386 -mregparm=3 \
57 -include $(srctree)/$(src)/code16gcc.h \
58 -fno-strict-aliasing -fomit-frame-pointer \
59 $(call cc-option, -ffreestanding) \
60 $(call cc-option, -fno-toplevel-reorder,\
61 $(call cc-option, -fno-unit-at-a-time)) \
62 $(call cc-option, -fno-stack-protector) \
63 $(call cc-option, -mpreferred-stack-boundary=2)
64AFLAGS := $(CFLAGS) -D__ASSEMBLY__
65
66$(obj)/zImage: IMAGE_OFFSET := 0x1000
67$(obj)/zImage: EXTRA_AFLAGS := $(SVGA_MODE) $(RAMDISK)
68$(obj)/bzImage: IMAGE_OFFSET := 0x100000
69$(obj)/bzImage: EXTRA_CFLAGS := -D__BIG_KERNEL__
70$(obj)/bzImage: EXTRA_AFLAGS := $(SVGA_MODE) $(RAMDISK) -D__BIG_KERNEL__
71$(obj)/bzImage: BUILDFLAGS := -b
72
73quiet_cmd_image = BUILD $@
74cmd_image = $(obj)/tools/build $(BUILDFLAGS) $(obj)/setup.bin \
75 $(obj)/vmlinux.bin $(ROOT_DEV) > $@
76
77$(obj)/zImage $(obj)/bzImage: $(obj)/setup.bin \
78 $(obj)/vmlinux.bin $(obj)/tools/build FORCE
79 $(call if_changed,image)
80 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
81
82$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
83 $(call if_changed,objcopy)
84
85SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
86
87LDFLAGS_setup.elf := -T
88$(obj)/setup.elf: $(src)/setup.ld $(SETUP_OBJS) FORCE
89 $(call if_changed,ld)
90
91OBJCOPYFLAGS_setup.bin := -O binary
92
93$(obj)/setup.bin: $(obj)/setup.elf FORCE
94 $(call if_changed,objcopy)
95
96$(obj)/compressed/vmlinux: FORCE
97 $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
98
99# Set this if you want to pass append arguments to the zdisk/fdimage/isoimage kernel
100FDARGS =
101# Set this if you want an initrd included with the zdisk/fdimage/isoimage kernel
102FDINITRD =
103
104image_cmdline = default linux $(FDARGS) $(if $(FDINITRD),initrd=initrd.img,)
105
106$(obj)/mtools.conf: $(src)/mtools.conf.in
107 sed -e 's|@OBJ@|$(obj)|g' < $< > $@
108
109# This requires write access to /dev/fd0
110zdisk: $(BOOTIMAGE) $(obj)/mtools.conf
111 MTOOLSRC=$(obj)/mtools.conf mformat a: ; sync
112 syslinux /dev/fd0 ; sync
113 echo '$(image_cmdline)' | \
114 MTOOLSRC=$(src)/mtools.conf mcopy - a:syslinux.cfg
115 if [ -f '$(FDINITRD)' ] ; then \
116 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' a:initrd.img ; \
117 fi
118 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) a:linux ; sync
119
120# These require being root or having syslinux 2.02 or higher installed
121fdimage fdimage144: $(BOOTIMAGE) $(obj)/mtools.conf
122 dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=1440
123 MTOOLSRC=$(obj)/mtools.conf mformat v: ; sync
124 syslinux $(obj)/fdimage ; sync
125 echo '$(image_cmdline)' | \
126 MTOOLSRC=$(obj)/mtools.conf mcopy - v:syslinux.cfg
127 if [ -f '$(FDINITRD)' ] ; then \
128 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' v:initrd.img ; \
129 fi
130 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) v:linux ; sync
131
132fdimage288: $(BOOTIMAGE) $(obj)/mtools.conf
133 dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=2880
134 MTOOLSRC=$(obj)/mtools.conf mformat w: ; sync
135 syslinux $(obj)/fdimage ; sync
136 echo '$(image_cmdline)' | \
137 MTOOLSRC=$(obj)/mtools.conf mcopy - w:syslinux.cfg
138 if [ -f '$(FDINITRD)' ] ; then \
139 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' w:initrd.img ; \
140 fi
141 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) w:linux ; sync
142
143isoimage: $(BOOTIMAGE)
144 -rm -rf $(obj)/isoimage
145 mkdir $(obj)/isoimage
146 for i in lib lib64 share end ; do \
147 if [ -f /usr/$$i/syslinux/isolinux.bin ] ; then \
148 cp /usr/$$i/syslinux/isolinux.bin $(obj)/isoimage ; \
149 break ; \
150 fi ; \
151 if [ $$i = end ] ; then exit 1 ; fi ; \
152 done
153 cp $(BOOTIMAGE) $(obj)/isoimage/linux
154 echo '$(image_cmdline)' > $(obj)/isoimage/isolinux.cfg
155 if [ -f '$(FDINITRD)' ] ; then \
156 cp '$(FDINITRD)' $(obj)/isoimage/initrd.img ; \
157 fi
158 mkisofs -J -r -o $(obj)/image.iso -b isolinux.bin -c boot.cat \
159 -no-emul-boot -boot-load-size 4 -boot-info-table \
160 $(obj)/isoimage
161 rm -rf $(obj)/isoimage
162
163zlilo: $(BOOTIMAGE)
164 if [ -f $(INSTALL_PATH)/vmlinuz ]; then mv $(INSTALL_PATH)/vmlinuz $(INSTALL_PATH)/vmlinuz.old; fi
165 if [ -f $(INSTALL_PATH)/System.map ]; then mv $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
166 cat $(BOOTIMAGE) > $(INSTALL_PATH)/vmlinuz
167 cp System.map $(INSTALL_PATH)/
168 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
169
170install:
171 sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
diff --git a/arch/i386/boot/compressed/Makefile b/arch/i386/boot/compressed/Makefile
deleted file mode 100644
index 189fa1dbefcc..000000000000
--- a/arch/i386/boot/compressed/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
1#
2# linux/arch/i386/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o \
8 vmlinux.bin.all vmlinux.relocs
9EXTRA_AFLAGS := -traditional
10
11LDFLAGS_vmlinux := -T
12hostprogs-y := relocs
13
14CFLAGS := -m32 -D__KERNEL__ $(LINUX_INCLUDE) -O2 \
15 -fno-strict-aliasing -fPIC \
16 $(call cc-option,-ffreestanding) \
17 $(call cc-option,-fno-stack-protector)
18LDFLAGS := -m elf_i386
19
20$(obj)/vmlinux: $(src)/vmlinux.lds $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
21 $(call if_changed,ld)
22 @:
23
24$(obj)/vmlinux.bin: vmlinux FORCE
25 $(call if_changed,objcopy)
26
27quiet_cmd_relocs = RELOCS $@
28 cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $<
29$(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE
30 $(call if_changed,relocs)
31
32vmlinux.bin.all-y := $(obj)/vmlinux.bin
33vmlinux.bin.all-$(CONFIG_RELOCATABLE) += $(obj)/vmlinux.relocs
34quiet_cmd_relocbin = BUILD $@
35 cmd_relocbin = cat $(filter-out FORCE,$^) > $@
36$(obj)/vmlinux.bin.all: $(vmlinux.bin.all-y) FORCE
37 $(call if_changed,relocbin)
38
39ifdef CONFIG_RELOCATABLE
40$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
41 $(call if_changed,gzip)
42else
43$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
44 $(call if_changed,gzip)
45endif
46
47LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
48
49$(obj)/piggy.o: $(src)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
50 $(call if_changed,ld)
diff --git a/arch/i386/crypto/Makefile b/arch/i386/crypto/Makefile
deleted file mode 100644
index 3fd19af18e34..000000000000
--- a/arch/i386/crypto/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1#
2# i386/crypto/Makefile
3#
4# Arch-specific CryptoAPI modules.
5#
6
7obj-$(CONFIG_CRYPTO_AES_586) += aes-i586.o
8obj-$(CONFIG_CRYPTO_TWOFISH_586) += twofish-i586.o
9
10aes-i586-y := aes-i586-asm.o aes.o
11twofish-i586-y := twofish-i586-asm.o twofish.o
12
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
deleted file mode 100644
index 9d33b00de659..000000000000
--- a/arch/i386/kernel/Makefile
+++ /dev/null
@@ -1,88 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := head.o init_task.o vmlinux.lds
6
7obj-y := process.o signal.o entry.o traps.o irq.o \
8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_i386.o \
9 pci-dma.o i386_ksyms.o i387.o bootflag.o e820.o\
10 quirks.o i8237.o topology.o alternative.o i8253.o tsc.o
11
12obj-$(CONFIG_STACKTRACE) += stacktrace.o
13obj-y += cpu/
14obj-y += acpi/
15obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o
16obj-$(CONFIG_MCA) += mca.o
17obj-$(CONFIG_X86_MSR) += msr.o
18obj-$(CONFIG_X86_CPUID) += cpuid.o
19obj-$(CONFIG_MICROCODE) += microcode.o
20obj-$(CONFIG_APM) += apm.o
21obj-$(CONFIG_X86_SMP) += smp.o smpboot.o tsc_sync.o
22obj-$(CONFIG_SMP) += smpcommon.o
23obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
24obj-$(CONFIG_X86_MPPARSE) += mpparse.o
25obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o
26obj-$(CONFIG_X86_IO_APIC) += io_apic.o
27obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups.o
28obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o crash.o
29obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
30obj-$(CONFIG_X86_NUMAQ) += numaq.o
31obj-$(CONFIG_X86_SUMMIT_NUMA) += summit.o
32obj-$(CONFIG_KPROBES) += kprobes.o
33obj-$(CONFIG_MODULES) += module.o
34obj-y += sysenter.o vsyscall.o
35obj-$(CONFIG_ACPI_SRAT) += srat.o
36obj-$(CONFIG_EFI) += efi.o efi_stub.o
37obj-$(CONFIG_DOUBLEFAULT) += doublefault.o
38obj-$(CONFIG_VM86) += vm86.o
39obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
40obj-$(CONFIG_HPET_TIMER) += hpet.o
41obj-$(CONFIG_K8_NB) += k8.o
42obj-$(CONFIG_MGEODE_LX) += geode.o
43
44obj-$(CONFIG_VMI) += vmi.o vmiclock.o
45obj-$(CONFIG_PARAVIRT) += paravirt.o
46obj-y += pcspeaker.o
47
48obj-$(CONFIG_SCx200) += scx200.o
49
50# vsyscall.o contains the vsyscall DSO images as __initdata.
51# We must build both images before we can assemble it.
52# Note: kbuild does not track this dependency due to usage of .incbin
53$(obj)/vsyscall.o: $(obj)/vsyscall-int80.so $(obj)/vsyscall-sysenter.so
54targets += $(foreach F,int80 sysenter,vsyscall-$F.o vsyscall-$F.so)
55targets += vsyscall-note.o vsyscall.lds
56
57# The DSO images are built using a special linker script.
58quiet_cmd_syscall = SYSCALL $@
59 cmd_syscall = $(CC) -m elf_i386 -nostdlib $(SYSCFLAGS_$(@F)) \
60 -Wl,-T,$(filter-out FORCE,$^) -o $@
61
62export CPPFLAGS_vsyscall.lds += -P -C -U$(ARCH)
63
64vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
65 $(call ld-option, -Wl$(comma)--hash-style=sysv)
66SYSCFLAGS_vsyscall-sysenter.so = $(vsyscall-flags)
67SYSCFLAGS_vsyscall-int80.so = $(vsyscall-flags)
68
69$(obj)/vsyscall-int80.so $(obj)/vsyscall-sysenter.so: \
70$(obj)/vsyscall-%.so: $(src)/vsyscall.lds \
71 $(obj)/vsyscall-%.o $(obj)/vsyscall-note.o FORCE
72 $(call if_changed,syscall)
73
74# We also create a special relocatable object that should mirror the symbol
75# table and layout of the linked DSO. With ld -R we can then refer to
76# these symbols in the kernel code rather than hand-coded addresses.
77extra-y += vsyscall-syms.o
78$(obj)/built-in.o: $(obj)/vsyscall-syms.o
79$(obj)/built-in.o: ld_flags += -R $(obj)/vsyscall-syms.o
80
81SYSCFLAGS_vsyscall-syms.o = -r
82$(obj)/vsyscall-syms.o: $(src)/vsyscall.lds \
83 $(obj)/vsyscall-sysenter.o $(obj)/vsyscall-note.o FORCE
84 $(call if_changed,syscall)
85
86k8-y += ../../x86_64/kernel/k8.o
87stacktrace-y += ../../x86_64/kernel/stacktrace.o
88
diff --git a/arch/i386/kernel/acpi/Makefile b/arch/i386/kernel/acpi/Makefile
deleted file mode 100644
index 7f7be01f44e6..000000000000
--- a/arch/i386/kernel/acpi/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1obj-$(CONFIG_ACPI) += boot.o
2ifneq ($(CONFIG_PCI),)
3obj-$(CONFIG_X86_IO_APIC) += earlyquirk.o
4endif
5obj-$(CONFIG_ACPI_SLEEP) += sleep.o wakeup.o
6
7ifneq ($(CONFIG_ACPI_PROCESSOR),)
8obj-y += cstate.o processor.o
9endif
10
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
deleted file mode 100644
index cacdd883bf2b..000000000000
--- a/arch/i386/kernel/acpi/boot.c
+++ /dev/null
@@ -1,1326 +0,0 @@
1/*
2 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
3 *
4 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
5 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */
25
26#include <linux/init.h>
27#include <linux/acpi.h>
28#include <linux/acpi_pmtmr.h>
29#include <linux/efi.h>
30#include <linux/cpumask.h>
31#include <linux/module.h>
32#include <linux/dmi.h>
33#include <linux/irq.h>
34#include <linux/bootmem.h>
35#include <linux/ioport.h>
36
37#include <asm/pgtable.h>
38#include <asm/io_apic.h>
39#include <asm/apic.h>
40#include <asm/io.h>
41#include <asm/mpspec.h>
42
43static int __initdata acpi_force = 0;
44
45#ifdef CONFIG_ACPI
46int acpi_disabled = 0;
47#else
48int acpi_disabled = 1;
49#endif
50EXPORT_SYMBOL(acpi_disabled);
51
52#ifdef CONFIG_X86_64
53
54#include <asm/proto.h>
55
56static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return 0; }
57
58
59#else /* X86 */
60
61#ifdef CONFIG_X86_LOCAL_APIC
62#include <mach_apic.h>
63#include <mach_mpparse.h>
64#endif /* CONFIG_X86_LOCAL_APIC */
65
66#endif /* X86 */
67
68#define BAD_MADT_ENTRY(entry, end) ( \
69 (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
70 ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
71
72#define PREFIX "ACPI: "
73
74int acpi_noirq; /* skip ACPI IRQ initialization */
75int acpi_pci_disabled __initdata; /* skip ACPI PCI scan and IRQ initialization */
76int acpi_ht __initdata = 1; /* enable HT */
77
78int acpi_lapic;
79int acpi_ioapic;
80int acpi_strict;
81EXPORT_SYMBOL(acpi_strict);
82
83u8 acpi_sci_flags __initdata;
84int acpi_sci_override_gsi __initdata;
85int acpi_skip_timer_override __initdata;
86int acpi_use_timer_override __initdata;
87
88#ifdef CONFIG_X86_LOCAL_APIC
89static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
90#endif
91
92#ifndef __HAVE_ARCH_CMPXCHG
93#warning ACPI uses CMPXCHG, i486 and later hardware
94#endif
95
96/* --------------------------------------------------------------------------
97 Boot-time Configuration
98 -------------------------------------------------------------------------- */
99
100/*
101 * The default interrupt routing model is PIC (8259). This gets
102 * overriden if IOAPICs are enumerated (below).
103 */
104enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
105
106#ifdef CONFIG_X86_64
107
108/* rely on all ACPI tables being in the direct mapping */
109char *__acpi_map_table(unsigned long phys_addr, unsigned long size)
110{
111 if (!phys_addr || !size)
112 return NULL;
113
114 if (phys_addr+size <= (end_pfn_map << PAGE_SHIFT) + PAGE_SIZE)
115 return __va(phys_addr);
116
117 return NULL;
118}
119
120#else
121
122/*
123 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
124 * to map the target physical address. The problem is that set_fixmap()
125 * provides a single page, and it is possible that the page is not
126 * sufficient.
127 * By using this area, we can map up to MAX_IO_APICS pages temporarily,
128 * i.e. until the next __va_range() call.
129 *
130 * Important Safety Note: The fixed I/O APIC page numbers are *subtracted*
131 * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and
132 * count idx down while incrementing the phys address.
133 */
134char *__acpi_map_table(unsigned long phys, unsigned long size)
135{
136 unsigned long base, offset, mapped_size;
137 int idx;
138
139 if (phys + size < 8 * 1024 * 1024)
140 return __va(phys);
141
142 offset = phys & (PAGE_SIZE - 1);
143 mapped_size = PAGE_SIZE - offset;
144 set_fixmap(FIX_ACPI_END, phys);
145 base = fix_to_virt(FIX_ACPI_END);
146
147 /*
148 * Most cases can be covered by the below.
149 */
150 idx = FIX_ACPI_END;
151 while (mapped_size < size) {
152 if (--idx < FIX_ACPI_BEGIN)
153 return NULL; /* cannot handle this */
154 phys += PAGE_SIZE;
155 set_fixmap(idx, phys);
156 mapped_size += PAGE_SIZE;
157 }
158
159 return ((unsigned char *)base + offset);
160}
161#endif
162
163#ifdef CONFIG_PCI_MMCONFIG
164/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
165struct acpi_mcfg_allocation *pci_mmcfg_config;
166int pci_mmcfg_config_num;
167
168int __init acpi_parse_mcfg(struct acpi_table_header *header)
169{
170 struct acpi_table_mcfg *mcfg;
171 unsigned long i;
172 int config_size;
173
174 if (!header)
175 return -EINVAL;
176
177 mcfg = (struct acpi_table_mcfg *)header;
178
179 /* how many config structures do we have */
180 pci_mmcfg_config_num = 0;
181 i = header->length - sizeof(struct acpi_table_mcfg);
182 while (i >= sizeof(struct acpi_mcfg_allocation)) {
183 ++pci_mmcfg_config_num;
184 i -= sizeof(struct acpi_mcfg_allocation);
185 };
186 if (pci_mmcfg_config_num == 0) {
187 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
188 return -ENODEV;
189 }
190
191 config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config);
192 pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL);
193 if (!pci_mmcfg_config) {
194 printk(KERN_WARNING PREFIX
195 "No memory for MCFG config tables\n");
196 return -ENOMEM;
197 }
198
199 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
200 for (i = 0; i < pci_mmcfg_config_num; ++i) {
201 if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
202 printk(KERN_ERR PREFIX
203 "MMCONFIG not in low 4GB of memory\n");
204 kfree(pci_mmcfg_config);
205 pci_mmcfg_config_num = 0;
206 return -ENODEV;
207 }
208 }
209
210 return 0;
211}
212#endif /* CONFIG_PCI_MMCONFIG */
213
214#ifdef CONFIG_X86_LOCAL_APIC
215static int __init acpi_parse_madt(struct acpi_table_header *table)
216{
217 struct acpi_table_madt *madt = NULL;
218
219 if (!cpu_has_apic)
220 return -EINVAL;
221
222 madt = (struct acpi_table_madt *)table;
223 if (!madt) {
224 printk(KERN_WARNING PREFIX "Unable to map MADT\n");
225 return -ENODEV;
226 }
227
228 if (madt->address) {
229 acpi_lapic_addr = (u64) madt->address;
230
231 printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
232 madt->address);
233 }
234
235 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
236
237 return 0;
238}
239
240static int __init
241acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
242{
243 struct acpi_madt_local_apic *processor = NULL;
244
245 processor = (struct acpi_madt_local_apic *)header;
246
247 if (BAD_MADT_ENTRY(processor, end))
248 return -EINVAL;
249
250 acpi_table_print_madt_entry(header);
251
252 /*
253 * We need to register disabled CPU as well to permit
254 * counting disabled CPUs. This allows us to size
255 * cpus_possible_map more accurately, to permit
256 * to not preallocating memory for all NR_CPUS
257 * when we use CPU hotplug.
258 */
259 mp_register_lapic(processor->id, /* APIC ID */
260 processor->lapic_flags & ACPI_MADT_ENABLED); /* Enabled? */
261
262 return 0;
263}
264
265static int __init
266acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
267 const unsigned long end)
268{
269 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
270
271 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
272
273 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
274 return -EINVAL;
275
276 acpi_lapic_addr = lapic_addr_ovr->address;
277
278 return 0;
279}
280
281static int __init
282acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
283{
284 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
285
286 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
287
288 if (BAD_MADT_ENTRY(lapic_nmi, end))
289 return -EINVAL;
290
291 acpi_table_print_madt_entry(header);
292
293 if (lapic_nmi->lint != 1)
294 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
295
296 return 0;
297}
298
299#endif /*CONFIG_X86_LOCAL_APIC */
300
301#ifdef CONFIG_X86_IO_APIC
302
303static int __init
304acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
305{
306 struct acpi_madt_io_apic *ioapic = NULL;
307
308 ioapic = (struct acpi_madt_io_apic *)header;
309
310 if (BAD_MADT_ENTRY(ioapic, end))
311 return -EINVAL;
312
313 acpi_table_print_madt_entry(header);
314
315 mp_register_ioapic(ioapic->id,
316 ioapic->address, ioapic->global_irq_base);
317
318 return 0;
319}
320
321/*
322 * Parse Interrupt Source Override for the ACPI SCI
323 */
324static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
325{
326 if (trigger == 0) /* compatible SCI trigger is level */
327 trigger = 3;
328
329 if (polarity == 0) /* compatible SCI polarity is low */
330 polarity = 3;
331
332 /* Command-line over-ride via acpi_sci= */
333 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
334 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
335
336 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
337 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
338
339 /*
340 * mp_config_acpi_legacy_irqs() already setup IRQs < 16
341 * If GSI is < 16, this will update its flags,
342 * else it will create a new mp_irqs[] entry.
343 */
344 mp_override_legacy_irq(gsi, polarity, trigger, gsi);
345
346 /*
347 * stash over-ride to indicate we've been here
348 * and for later update of acpi_gbl_FADT
349 */
350 acpi_sci_override_gsi = gsi;
351 return;
352}
353
354static int __init
355acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
356 const unsigned long end)
357{
358 struct acpi_madt_interrupt_override *intsrc = NULL;
359
360 intsrc = (struct acpi_madt_interrupt_override *)header;
361
362 if (BAD_MADT_ENTRY(intsrc, end))
363 return -EINVAL;
364
365 acpi_table_print_madt_entry(header);
366
367 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
368 acpi_sci_ioapic_setup(intsrc->global_irq,
369 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
370 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
371 return 0;
372 }
373
374 if (acpi_skip_timer_override &&
375 intsrc->source_irq == 0 && intsrc->global_irq == 2) {
376 printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
377 return 0;
378 }
379
380 mp_override_legacy_irq(intsrc->source_irq,
381 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
382 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
383 intsrc->global_irq);
384
385 return 0;
386}
387
388static int __init
389acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
390{
391 struct acpi_madt_nmi_source *nmi_src = NULL;
392
393 nmi_src = (struct acpi_madt_nmi_source *)header;
394
395 if (BAD_MADT_ENTRY(nmi_src, end))
396 return -EINVAL;
397
398 acpi_table_print_madt_entry(header);
399
400 /* TBD: Support nimsrc entries? */
401
402 return 0;
403}
404
405#endif /* CONFIG_X86_IO_APIC */
406
407/*
408 * acpi_pic_sci_set_trigger()
409 *
410 * use ELCR to set PIC-mode trigger type for SCI
411 *
412 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
413 * it may require Edge Trigger -- use "acpi_sci=edge"
414 *
415 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
416 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
417 * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0)
418 * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0)
419 */
420
421void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
422{
423 unsigned int mask = 1 << irq;
424 unsigned int old, new;
425
426 /* Real old ELCR mask */
427 old = inb(0x4d0) | (inb(0x4d1) << 8);
428
429 /*
430 * If we use ACPI to set PCI irq's, then we should clear ELCR
431 * since we will set it correctly as we enable the PCI irq
432 * routing.
433 */
434 new = acpi_noirq ? old : 0;
435
436 /*
437 * Update SCI information in the ELCR, it isn't in the PCI
438 * routing tables..
439 */
440 switch (trigger) {
441 case 1: /* Edge - clear */
442 new &= ~mask;
443 break;
444 case 3: /* Level - set */
445 new |= mask;
446 break;
447 }
448
449 if (old == new)
450 return;
451
452 printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
453 outb(new, 0x4d0);
454 outb(new >> 8, 0x4d1);
455}
456
457int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
458{
459 *irq = gsi;
460 return 0;
461}
462
463/*
464 * success: return IRQ number (>=0)
465 * failure: return < 0
466 */
467int acpi_register_gsi(u32 gsi, int triggering, int polarity)
468{
469 unsigned int irq;
470 unsigned int plat_gsi = gsi;
471
472#ifdef CONFIG_PCI
473 /*
474 * Make sure all (legacy) PCI IRQs are set as level-triggered.
475 */
476 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
477 extern void eisa_set_level_irq(unsigned int irq);
478
479 if (triggering == ACPI_LEVEL_SENSITIVE)
480 eisa_set_level_irq(gsi);
481 }
482#endif
483
484#ifdef CONFIG_X86_IO_APIC
485 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
486 plat_gsi = mp_register_gsi(gsi, triggering, polarity);
487 }
488#endif
489 acpi_gsi_to_irq(plat_gsi, &irq);
490 return irq;
491}
492
493EXPORT_SYMBOL(acpi_register_gsi);
494
495/*
496 * ACPI based hotplug support for CPU
497 */
498#ifdef CONFIG_ACPI_HOTPLUG_CPU
499int acpi_map_lsapic(acpi_handle handle, int *pcpu)
500{
501 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
502 union acpi_object *obj;
503 struct acpi_madt_local_apic *lapic;
504 cpumask_t tmp_map, new_map;
505 u8 physid;
506 int cpu;
507
508 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
509 return -EINVAL;
510
511 if (!buffer.length || !buffer.pointer)
512 return -EINVAL;
513
514 obj = buffer.pointer;
515 if (obj->type != ACPI_TYPE_BUFFER ||
516 obj->buffer.length < sizeof(*lapic)) {
517 kfree(buffer.pointer);
518 return -EINVAL;
519 }
520
521 lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
522
523 if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
524 !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
525 kfree(buffer.pointer);
526 return -EINVAL;
527 }
528
529 physid = lapic->id;
530
531 kfree(buffer.pointer);
532 buffer.length = ACPI_ALLOCATE_BUFFER;
533 buffer.pointer = NULL;
534
535 tmp_map = cpu_present_map;
536 mp_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
537
538 /*
539 * If mp_register_lapic successfully generates a new logical cpu
540 * number, then the following will get us exactly what was mapped
541 */
542 cpus_andnot(new_map, cpu_present_map, tmp_map);
543 if (cpus_empty(new_map)) {
544 printk ("Unable to map lapic to logical cpu number\n");
545 return -EINVAL;
546 }
547
548 cpu = first_cpu(new_map);
549
550 *pcpu = cpu;
551 return 0;
552}
553
554EXPORT_SYMBOL(acpi_map_lsapic);
555
556int acpi_unmap_lsapic(int cpu)
557{
558 x86_cpu_to_apicid[cpu] = -1;
559 cpu_clear(cpu, cpu_present_map);
560 num_processors--;
561
562 return (0);
563}
564
565EXPORT_SYMBOL(acpi_unmap_lsapic);
566#endif /* CONFIG_ACPI_HOTPLUG_CPU */
567
568int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
569{
570 /* TBD */
571 return -EINVAL;
572}
573
574EXPORT_SYMBOL(acpi_register_ioapic);
575
576int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
577{
578 /* TBD */
579 return -EINVAL;
580}
581
582EXPORT_SYMBOL(acpi_unregister_ioapic);
583
584static unsigned long __init
585acpi_scan_rsdp(unsigned long start, unsigned long length)
586{
587 unsigned long offset = 0;
588 unsigned long sig_len = sizeof("RSD PTR ") - 1;
589
590 /*
591 * Scan all 16-byte boundaries of the physical memory region for the
592 * RSDP signature.
593 */
594 for (offset = 0; offset < length; offset += 16) {
595 if (strncmp((char *)(phys_to_virt(start) + offset), "RSD PTR ", sig_len))
596 continue;
597 return (start + offset);
598 }
599
600 return 0;
601}
602
603static int __init acpi_parse_sbf(struct acpi_table_header *table)
604{
605 struct acpi_table_boot *sb;
606
607 sb = (struct acpi_table_boot *)table;
608 if (!sb) {
609 printk(KERN_WARNING PREFIX "Unable to map SBF\n");
610 return -ENODEV;
611 }
612
613 sbf_port = sb->cmos_index; /* Save CMOS port */
614
615 return 0;
616}
617
618#ifdef CONFIG_HPET_TIMER
619#include <asm/hpet.h>
620
621static struct __initdata resource *hpet_res;
622
623static int __init acpi_parse_hpet(struct acpi_table_header *table)
624{
625 struct acpi_table_hpet *hpet_tbl;
626
627 hpet_tbl = (struct acpi_table_hpet *)table;
628 if (!hpet_tbl) {
629 printk(KERN_WARNING PREFIX "Unable to map HPET\n");
630 return -ENODEV;
631 }
632
633 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
634 printk(KERN_WARNING PREFIX "HPET timers must be located in "
635 "memory.\n");
636 return -1;
637 }
638
639 hpet_address = hpet_tbl->address.address;
640 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
641 hpet_tbl->id, hpet_address);
642
643 /*
644 * Allocate and initialize the HPET firmware resource for adding into
645 * the resource tree during the lateinit timeframe.
646 */
647#define HPET_RESOURCE_NAME_SIZE 9
648 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
649
650 if (!hpet_res)
651 return 0;
652
653 memset(hpet_res, 0, sizeof(*hpet_res));
654 hpet_res->name = (void *)&hpet_res[1];
655 hpet_res->flags = IORESOURCE_MEM;
656 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
657 hpet_tbl->sequence);
658
659 hpet_res->start = hpet_address;
660 hpet_res->end = hpet_address + (1 * 1024) - 1;
661
662 return 0;
663}
664
665/*
666 * hpet_insert_resource inserts the HPET resources used into the resource
667 * tree.
668 */
669static __init int hpet_insert_resource(void)
670{
671 if (!hpet_res)
672 return 1;
673
674 return insert_resource(&iomem_resource, hpet_res);
675}
676
677late_initcall(hpet_insert_resource);
678
679#else
680#define acpi_parse_hpet NULL
681#endif
682
683static int __init acpi_parse_fadt(struct acpi_table_header *table)
684{
685
686#ifdef CONFIG_X86_PM_TIMER
687 /* detect the location of the ACPI PM Timer */
688 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
689 /* FADT rev. 2 */
690 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
691 ACPI_ADR_SPACE_SYSTEM_IO)
692 return 0;
693
694 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
695 /*
696 * "X" fields are optional extensions to the original V1.0
697 * fields, so we must selectively expand V1.0 fields if the
698 * corresponding X field is zero.
699 */
700 if (!pmtmr_ioport)
701 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
702 } else {
703 /* FADT rev. 1 */
704 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
705 }
706 if (pmtmr_ioport)
707 printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
708 pmtmr_ioport);
709#endif
710 return 0;
711}
712
713unsigned long __init acpi_find_rsdp(void)
714{
715 unsigned long rsdp_phys = 0;
716
717 if (efi_enabled) {
718 if (efi.acpi20 != EFI_INVALID_TABLE_ADDR)
719 return efi.acpi20;
720 else if (efi.acpi != EFI_INVALID_TABLE_ADDR)
721 return efi.acpi;
722 }
723 /*
724 * Scan memory looking for the RSDP signature. First search EBDA (low
725 * memory) paragraphs and then search upper memory (E0000-FFFFF).
726 */
727 rsdp_phys = acpi_scan_rsdp(0, 0x400);
728 if (!rsdp_phys)
729 rsdp_phys = acpi_scan_rsdp(0xE0000, 0x20000);
730
731 return rsdp_phys;
732}
733
734#ifdef CONFIG_X86_LOCAL_APIC
735/*
736 * Parse LAPIC entries in MADT
737 * returns 0 on success, < 0 on error
738 */
739static int __init acpi_parse_madt_lapic_entries(void)
740{
741 int count;
742
743 if (!cpu_has_apic)
744 return -ENODEV;
745
746 /*
747 * Note that the LAPIC address is obtained from the MADT (32-bit value)
748 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
749 */
750
751 count =
752 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
753 acpi_parse_lapic_addr_ovr, 0);
754 if (count < 0) {
755 printk(KERN_ERR PREFIX
756 "Error parsing LAPIC address override entry\n");
757 return count;
758 }
759
760 mp_register_lapic_address(acpi_lapic_addr);
761
762 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, acpi_parse_lapic,
763 MAX_APICS);
764 if (!count) {
765 printk(KERN_ERR PREFIX "No LAPIC entries present\n");
766 /* TBD: Cleanup to allow fallback to MPS */
767 return -ENODEV;
768 } else if (count < 0) {
769 printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
770 /* TBD: Cleanup to allow fallback to MPS */
771 return count;
772 }
773
774 count =
775 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0);
776 if (count < 0) {
777 printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
778 /* TBD: Cleanup to allow fallback to MPS */
779 return count;
780 }
781 return 0;
782}
783#endif /* CONFIG_X86_LOCAL_APIC */
784
785#ifdef CONFIG_X86_IO_APIC
786/*
787 * Parse IOAPIC related entries in MADT
788 * returns 0 on success, < 0 on error
789 */
790static int __init acpi_parse_madt_ioapic_entries(void)
791{
792 int count;
793
794 /*
795 * ACPI interpreter is required to complete interrupt setup,
796 * so if it is off, don't enumerate the io-apics with ACPI.
797 * If MPS is present, it will handle them,
798 * otherwise the system will stay in PIC mode
799 */
800 if (acpi_disabled || acpi_noirq) {
801 return -ENODEV;
802 }
803
804 if (!cpu_has_apic)
805 return -ENODEV;
806
807 /*
808 * if "noapic" boot option, don't look for IO-APICs
809 */
810 if (skip_ioapic_setup) {
811 printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
812 "due to 'noapic' option.\n");
813 return -ENODEV;
814 }
815
816 count =
817 acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
818 MAX_IO_APICS);
819 if (!count) {
820 printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
821 return -ENODEV;
822 } else if (count < 0) {
823 printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
824 return count;
825 }
826
827 count =
828 acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr,
829 NR_IRQ_VECTORS);
830 if (count < 0) {
831 printk(KERN_ERR PREFIX
832 "Error parsing interrupt source overrides entry\n");
833 /* TBD: Cleanup to allow fallback to MPS */
834 return count;
835 }
836
837 /*
838 * If BIOS did not supply an INT_SRC_OVR for the SCI
839 * pretend we got one so we can set the SCI flags.
840 */
841 if (!acpi_sci_override_gsi)
842 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
843
844 /* Fill in identity legacy mapings where no override */
845 mp_config_acpi_legacy_irqs();
846
847 count =
848 acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src,
849 NR_IRQ_VECTORS);
850 if (count < 0) {
851 printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
852 /* TBD: Cleanup to allow fallback to MPS */
853 return count;
854 }
855
856 return 0;
857}
858#else
859static inline int acpi_parse_madt_ioapic_entries(void)
860{
861 return -1;
862}
863#endif /* !CONFIG_X86_IO_APIC */
864
865static void __init acpi_process_madt(void)
866{
867#ifdef CONFIG_X86_LOCAL_APIC
868 int error;
869
870 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
871
872 /*
873 * Parse MADT LAPIC entries
874 */
875 error = acpi_parse_madt_lapic_entries();
876 if (!error) {
877 acpi_lapic = 1;
878
879#ifdef CONFIG_X86_GENERICARCH
880 generic_bigsmp_probe();
881#endif
882 /*
883 * Parse MADT IO-APIC entries
884 */
885 error = acpi_parse_madt_ioapic_entries();
886 if (!error) {
887 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
888 acpi_irq_balance_set(NULL);
889 acpi_ioapic = 1;
890
891 smp_found_config = 1;
892 setup_apic_routing();
893 }
894 }
895 if (error == -EINVAL) {
896 /*
897 * Dell Precision Workstation 410, 610 come here.
898 */
899 printk(KERN_ERR PREFIX
900 "Invalid BIOS MADT, disabling ACPI\n");
901 disable_acpi();
902 }
903 }
904#endif
905 return;
906}
907
908#ifdef __i386__
909
910static int __init disable_acpi_irq(struct dmi_system_id *d)
911{
912 if (!acpi_force) {
913 printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
914 d->ident);
915 acpi_noirq_set();
916 }
917 return 0;
918}
919
920static int __init disable_acpi_pci(struct dmi_system_id *d)
921{
922 if (!acpi_force) {
923 printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
924 d->ident);
925 acpi_disable_pci();
926 }
927 return 0;
928}
929
930static int __init dmi_disable_acpi(struct dmi_system_id *d)
931{
932 if (!acpi_force) {
933 printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
934 disable_acpi();
935 } else {
936 printk(KERN_NOTICE
937 "Warning: DMI blacklist says broken, but acpi forced\n");
938 }
939 return 0;
940}
941
942/*
943 * Limit ACPI to CPU enumeration for HT
944 */
945static int __init force_acpi_ht(struct dmi_system_id *d)
946{
947 if (!acpi_force) {
948 printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
949 d->ident);
950 disable_acpi();
951 acpi_ht = 1;
952 } else {
953 printk(KERN_NOTICE
954 "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
955 }
956 return 0;
957}
958
959/*
960 * If your system is blacklisted here, but you find that acpi=force
961 * works for you, please contact acpi-devel@sourceforge.net
962 */
963static struct dmi_system_id __initdata acpi_dmi_table[] = {
964 /*
965 * Boxes that need ACPI disabled
966 */
967 {
968 .callback = dmi_disable_acpi,
969 .ident = "IBM Thinkpad",
970 .matches = {
971 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
972 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
973 },
974 },
975
976 /*
977 * Boxes that need acpi=ht
978 */
979 {
980 .callback = force_acpi_ht,
981 .ident = "FSC Primergy T850",
982 .matches = {
983 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
984 DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
985 },
986 },
987 {
988 .callback = force_acpi_ht,
989 .ident = "HP VISUALIZE NT Workstation",
990 .matches = {
991 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
992 DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
993 },
994 },
995 {
996 .callback = force_acpi_ht,
997 .ident = "Compaq Workstation W8000",
998 .matches = {
999 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
1000 DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
1001 },
1002 },
1003 {
1004 .callback = force_acpi_ht,
1005 .ident = "ASUS P4B266",
1006 .matches = {
1007 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1008 DMI_MATCH(DMI_BOARD_NAME, "P4B266"),
1009 },
1010 },
1011 {
1012 .callback = force_acpi_ht,
1013 .ident = "ASUS P2B-DS",
1014 .matches = {
1015 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1016 DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
1017 },
1018 },
1019 {
1020 .callback = force_acpi_ht,
1021 .ident = "ASUS CUR-DLS",
1022 .matches = {
1023 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1024 DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
1025 },
1026 },
1027 {
1028 .callback = force_acpi_ht,
1029 .ident = "ABIT i440BX-W83977",
1030 .matches = {
1031 DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
1032 DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
1033 },
1034 },
1035 {
1036 .callback = force_acpi_ht,
1037 .ident = "IBM Bladecenter",
1038 .matches = {
1039 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1040 DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
1041 },
1042 },
1043 {
1044 .callback = force_acpi_ht,
1045 .ident = "IBM eServer xSeries 360",
1046 .matches = {
1047 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1048 DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
1049 },
1050 },
1051 {
1052 .callback = force_acpi_ht,
1053 .ident = "IBM eserver xSeries 330",
1054 .matches = {
1055 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1056 DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
1057 },
1058 },
1059 {
1060 .callback = force_acpi_ht,
1061 .ident = "IBM eserver xSeries 440",
1062 .matches = {
1063 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1064 DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
1065 },
1066 },
1067
1068 /*
1069 * Boxes that need ACPI PCI IRQ routing disabled
1070 */
1071 {
1072 .callback = disable_acpi_irq,
1073 .ident = "ASUS A7V",
1074 .matches = {
1075 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1076 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1077 /* newer BIOS, Revision 1011, does work */
1078 DMI_MATCH(DMI_BIOS_VERSION,
1079 "ASUS A7V ACPI BIOS Revision 1007"),
1080 },
1081 },
1082 {
1083 /*
1084 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1085 * for LPC bridge, which is needed for the PCI
1086 * interrupt links to work. DSDT fix is in bug 5966.
1087 * 2645, 2646 model numbers are shared with 600/600E/600X
1088 */
1089 .callback = disable_acpi_irq,
1090 .ident = "IBM Thinkpad 600 Series 2645",
1091 .matches = {
1092 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1093 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1094 },
1095 },
1096 {
1097 .callback = disable_acpi_irq,
1098 .ident = "IBM Thinkpad 600 Series 2646",
1099 .matches = {
1100 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1101 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1102 },
1103 },
1104 /*
1105 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1106 */
1107 { /* _BBN 0 bug */
1108 .callback = disable_acpi_pci,
1109 .ident = "ASUS PR-DLS",
1110 .matches = {
1111 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1112 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1113 DMI_MATCH(DMI_BIOS_VERSION,
1114 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1115 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1116 },
1117 },
1118 {
1119 .callback = disable_acpi_pci,
1120 .ident = "Acer TravelMate 36x Laptop",
1121 .matches = {
1122 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1123 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1124 },
1125 },
1126 {}
1127};
1128
1129#endif /* __i386__ */
1130
1131/*
1132 * acpi_boot_table_init() and acpi_boot_init()
1133 * called from setup_arch(), always.
1134 * 1. checksums all tables
1135 * 2. enumerates lapics
1136 * 3. enumerates io-apics
1137 *
1138 * acpi_table_init() is separate to allow reading SRAT without
1139 * other side effects.
1140 *
1141 * side effects of acpi_boot_init:
1142 * acpi_lapic = 1 if LAPIC found
1143 * acpi_ioapic = 1 if IOAPIC found
1144 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1145 * if acpi_blacklisted() acpi_disabled = 1;
1146 * acpi_irq_model=...
1147 * ...
1148 *
1149 * return value: (currently ignored)
1150 * 0: success
1151 * !0: failure
1152 */
1153
1154int __init acpi_boot_table_init(void)
1155{
1156 int error;
1157
1158#ifdef __i386__
1159 dmi_check_system(acpi_dmi_table);
1160#endif
1161
1162 /*
1163 * If acpi_disabled, bail out
1164 * One exception: acpi=ht continues far enough to enumerate LAPICs
1165 */
1166 if (acpi_disabled && !acpi_ht)
1167 return 1;
1168
1169 /*
1170 * Initialize the ACPI boot-time table parser.
1171 */
1172 error = acpi_table_init();
1173 if (error) {
1174 disable_acpi();
1175 return error;
1176 }
1177
1178 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1179
1180 /*
1181 * blacklist may disable ACPI entirely
1182 */
1183 error = acpi_blacklisted();
1184 if (error) {
1185 if (acpi_force) {
1186 printk(KERN_WARNING PREFIX "acpi=force override\n");
1187 } else {
1188 printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
1189 disable_acpi();
1190 return error;
1191 }
1192 }
1193
1194 return 0;
1195}
1196
1197int __init acpi_boot_init(void)
1198{
1199 /*
1200 * If acpi_disabled, bail out
1201 * One exception: acpi=ht continues far enough to enumerate LAPICs
1202 */
1203 if (acpi_disabled && !acpi_ht)
1204 return 1;
1205
1206 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1207
1208 /*
1209 * set sci_int and PM timer address
1210 */
1211 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1212
1213 /*
1214 * Process the Multiple APIC Description Table (MADT), if present
1215 */
1216 acpi_process_madt();
1217
1218 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1219
1220 return 0;
1221}
1222
1223static int __init parse_acpi(char *arg)
1224{
1225 if (!arg)
1226 return -EINVAL;
1227
1228 /* "acpi=off" disables both ACPI table parsing and interpreter */
1229 if (strcmp(arg, "off") == 0) {
1230 disable_acpi();
1231 }
1232 /* acpi=force to over-ride black-list */
1233 else if (strcmp(arg, "force") == 0) {
1234 acpi_force = 1;
1235 acpi_ht = 1;
1236 acpi_disabled = 0;
1237 }
1238 /* acpi=strict disables out-of-spec workarounds */
1239 else if (strcmp(arg, "strict") == 0) {
1240 acpi_strict = 1;
1241 }
1242 /* Limit ACPI just to boot-time to enable HT */
1243 else if (strcmp(arg, "ht") == 0) {
1244 if (!acpi_force)
1245 disable_acpi();
1246 acpi_ht = 1;
1247 }
1248 /* "acpi=noirq" disables ACPI interrupt routing */
1249 else if (strcmp(arg, "noirq") == 0) {
1250 acpi_noirq_set();
1251 } else {
1252 /* Core will printk when we return error. */
1253 return -EINVAL;
1254 }
1255 return 0;
1256}
1257early_param("acpi", parse_acpi);
1258
1259/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1260static int __init parse_pci(char *arg)
1261{
1262 if (arg && strcmp(arg, "noacpi") == 0)
1263 acpi_disable_pci();
1264 return 0;
1265}
1266early_param("pci", parse_pci);
1267
1268#ifdef CONFIG_X86_IO_APIC
1269static int __init parse_acpi_skip_timer_override(char *arg)
1270{
1271 acpi_skip_timer_override = 1;
1272 return 0;
1273}
1274early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
1275
1276static int __init parse_acpi_use_timer_override(char *arg)
1277{
1278 acpi_use_timer_override = 1;
1279 return 0;
1280}
1281early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1282#endif /* CONFIG_X86_IO_APIC */
1283
1284static int __init setup_acpi_sci(char *s)
1285{
1286 if (!s)
1287 return -EINVAL;
1288 if (!strcmp(s, "edge"))
1289 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1290 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1291 else if (!strcmp(s, "level"))
1292 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1293 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1294 else if (!strcmp(s, "high"))
1295 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1296 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1297 else if (!strcmp(s, "low"))
1298 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1299 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1300 else
1301 return -EINVAL;
1302 return 0;
1303}
1304early_param("acpi_sci", setup_acpi_sci);
1305
1306int __acpi_acquire_global_lock(unsigned int *lock)
1307{
1308 unsigned int old, new, val;
1309 do {
1310 old = *lock;
1311 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
1312 val = cmpxchg(lock, old, new);
1313 } while (unlikely (val != old));
1314 return (new < 3) ? -1 : 0;
1315}
1316
1317int __acpi_release_global_lock(unsigned int *lock)
1318{
1319 unsigned int old, new, val;
1320 do {
1321 old = *lock;
1322 new = old & ~0x3;
1323 val = cmpxchg(lock, old, new);
1324 } while (unlikely (val != old));
1325 return old & 0x1;
1326}
diff --git a/arch/i386/kernel/acpi/sleep.c b/arch/i386/kernel/acpi/sleep.c
deleted file mode 100644
index c42b5ab49deb..000000000000
--- a/arch/i386/kernel/acpi/sleep.c
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * sleep.c - x86-specific ACPI sleep support.
3 *
4 * Copyright (C) 2001-2003 Patrick Mochel
5 * Copyright (C) 2001-2003 Pavel Machek <pavel@suse.cz>
6 */
7
8#include <linux/acpi.h>
9#include <linux/bootmem.h>
10#include <linux/dmi.h>
11#include <linux/cpumask.h>
12
13#include <asm/smp.h>
14
15/* address in low memory of the wakeup routine. */
16unsigned long acpi_wakeup_address = 0;
17unsigned long acpi_realmode_flags;
18extern char wakeup_start, wakeup_end;
19
20extern unsigned long FASTCALL(acpi_copy_wakeup_routine(unsigned long));
21
22/**
23 * acpi_save_state_mem - save kernel state
24 *
25 * Create an identity mapped page table and copy the wakeup routine to
26 * low memory.
27 */
28int acpi_save_state_mem(void)
29{
30 if (!acpi_wakeup_address)
31 return 1;
32 memcpy((void *)acpi_wakeup_address, &wakeup_start,
33 &wakeup_end - &wakeup_start);
34 acpi_copy_wakeup_routine(acpi_wakeup_address);
35
36 return 0;
37}
38
39/*
40 * acpi_restore_state - undo effects of acpi_save_state_mem
41 */
42void acpi_restore_state_mem(void)
43{
44}
45
46/**
47 * acpi_reserve_bootmem - do _very_ early ACPI initialisation
48 *
49 * We allocate a page from the first 1MB of memory for the wakeup
50 * routine for when we come back from a sleep state. The
51 * runtime allocator allows specification of <16MB pages, but not
52 * <1MB pages.
53 */
54void __init acpi_reserve_bootmem(void)
55{
56 if ((&wakeup_end - &wakeup_start) > PAGE_SIZE) {
57 printk(KERN_ERR
58 "ACPI: Wakeup code way too big, S3 disabled.\n");
59 return;
60 }
61
62 acpi_wakeup_address = (unsigned long)alloc_bootmem_low(PAGE_SIZE);
63 if (!acpi_wakeup_address)
64 printk(KERN_ERR "ACPI: Cannot allocate lowmem, S3 disabled.\n");
65}
66
67static int __init acpi_sleep_setup(char *str)
68{
69 while ((str != NULL) && (*str != '\0')) {
70 if (strncmp(str, "s3_bios", 7) == 0)
71 acpi_realmode_flags |= 1;
72 if (strncmp(str, "s3_mode", 7) == 0)
73 acpi_realmode_flags |= 2;
74 if (strncmp(str, "s3_beep", 7) == 0)
75 acpi_realmode_flags |= 4;
76 str = strchr(str, ',');
77 if (str != NULL)
78 str += strspn(str, ", \t");
79 }
80 return 1;
81}
82
83__setup("acpi_sleep=", acpi_sleep_setup);
84
85/* Ouch, we want to delete this. We already have better version in userspace, in
86 s2ram from suspend.sf.net project */
87static __init int reset_videomode_after_s3(struct dmi_system_id *d)
88{
89 acpi_realmode_flags |= 2;
90 return 0;
91}
92
93static __initdata struct dmi_system_id acpisleep_dmi_table[] = {
94 { /* Reset video mode after returning from ACPI S3 sleep */
95 .callback = reset_videomode_after_s3,
96 .ident = "Toshiba Satellite 4030cdt",
97 .matches = {
98 DMI_MATCH(DMI_PRODUCT_NAME, "S4030CDT/4.3"),
99 },
100 },
101 {}
102};
103
104static int __init acpisleep_dmi_init(void)
105{
106 dmi_check_system(acpisleep_dmi_table);
107 return 0;
108}
109
110core_initcall(acpisleep_dmi_init);
diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
deleted file mode 100644
index f02a8aca826b..000000000000
--- a/arch/i386/kernel/apm.c
+++ /dev/null
@@ -1,2403 +0,0 @@
1/* -*- linux-c -*-
2 * APM BIOS driver for Linux
3 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
4 *
5 * Initial development of this driver was funded by NEC Australia P/L
6 * and NEC Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2, or (at your option) any
11 * later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * October 1995, Rik Faith (faith@cs.unc.edu):
19 * Minor enhancements and updates (to the patch set) for 1.3.x
20 * Documentation
21 * January 1996, Rik Faith (faith@cs.unc.edu):
22 * Make /proc/apm easy to format (bump driver version)
23 * March 1996, Rik Faith (faith@cs.unc.edu):
24 * Prohibit APM BIOS calls unless apm_enabled.
25 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
26 * April 1996, Stephen Rothwell (sfr@canb.auug.org.au)
27 * Version 1.0 and 1.1
28 * May 1996, Version 1.2
29 * Feb 1998, Version 1.3
30 * Feb 1998, Version 1.4
31 * Aug 1998, Version 1.5
32 * Sep 1998, Version 1.6
33 * Nov 1998, Version 1.7
34 * Jan 1999, Version 1.8
35 * Jan 1999, Version 1.9
36 * Oct 1999, Version 1.10
37 * Nov 1999, Version 1.11
38 * Jan 2000, Version 1.12
39 * Feb 2000, Version 1.13
40 * Nov 2000, Version 1.14
41 * Oct 2001, Version 1.15
42 * Jan 2002, Version 1.16
43 * Oct 2002, Version 1.16ac
44 *
45 * History:
46 * 0.6b: first version in official kernel, Linux 1.3.46
47 * 0.7: changed /proc/apm format, Linux 1.3.58
48 * 0.8: fixed gcc 2.7.[12] compilation problems, Linux 1.3.59
49 * 0.9: only call bios if bios is present, Linux 1.3.72
50 * 1.0: use fixed device number, consolidate /proc/apm into this file,
51 * Linux 1.3.85
52 * 1.1: support user-space standby and suspend, power off after system
53 * halted, Linux 1.3.98
54 * 1.2: When resetting RTC after resume, take care so that the time
55 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
56 * <jtoth@princeton.edu>); improve interaction between
57 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
58 * 1.2a:Simple change to stop mysterious bug reports with SMP also added
59 * levels to the printk calls. APM is not defined for SMP machines.
60 * The new replacment for it is, but Linux doesn't yet support this.
61 * Alan Cox Linux 2.1.55
62 * 1.3: Set up a valid data descriptor 0x40 for buggy BIOS's
63 * 1.4: Upgraded to support APM 1.2. Integrated ThinkPad suspend patch by
64 * Dean Gaudet <dgaudet@arctic.org>.
65 * C. Scott Ananian <cananian@alumni.princeton.edu> Linux 2.1.87
66 * 1.5: Fix segment register reloading (in case of bad segments saved
67 * across BIOS call).
68 * Stephen Rothwell
69 * 1.6: Cope with complier/assembler differences.
70 * Only try to turn off the first display device.
71 * Fix OOPS at power off with no APM BIOS by Jan Echternach
72 * <echter@informatik.uni-rostock.de>
73 * Stephen Rothwell
74 * 1.7: Modify driver's cached copy of the disabled/disengaged flags
75 * to reflect current state of APM BIOS.
76 * Chris Rankin <rankinc@bellsouth.net>
77 * Reset interrupt 0 timer to 100Hz after suspend
78 * Chad Miller <cmiller@surfsouth.com>
79 * Add CONFIG_APM_IGNORE_SUSPEND_BOUNCE
80 * Richard Gooch <rgooch@atnf.csiro.au>
81 * Allow boot time disabling of APM
82 * Make boot messages far less verbose by default
83 * Make asm safer
84 * Stephen Rothwell
85 * 1.8: Add CONFIG_APM_RTC_IS_GMT
86 * Richard Gooch <rgooch@atnf.csiro.au>
87 * change APM_NOINTS to CONFIG_APM_ALLOW_INTS
88 * remove dependency on CONFIG_PROC_FS
89 * Stephen Rothwell
90 * 1.9: Fix small typo. <laslo@wodip.opole.pl>
91 * Try to cope with BIOS's that need to have all display
92 * devices blanked and not just the first one.
93 * Ross Paterson <ross@soi.city.ac.uk>
94 * Fix segment limit setting it has always been wrong as
95 * the segments needed to have byte granularity.
96 * Mark a few things __init.
97 * Add hack to allow power off of SMP systems by popular request.
98 * Use CONFIG_SMP instead of __SMP__
99 * Ignore BOUNCES for three seconds.
100 * Stephen Rothwell
101 * 1.10: Fix for Thinkpad return code.
102 * Merge 2.2 and 2.3 drivers.
103 * Remove APM dependencies in arch/i386/kernel/process.c
104 * Remove APM dependencies in drivers/char/sysrq.c
105 * Reset time across standby.
106 * Allow more inititialisation on SMP.
107 * Remove CONFIG_APM_POWER_OFF and make it boot time
108 * configurable (default on).
109 * Make debug only a boot time parameter (remove APM_DEBUG).
110 * Try to blank all devices on any error.
111 * 1.11: Remove APM dependencies in drivers/char/console.c
112 * Check nr_running to detect if we are idle (from
113 * Borislav Deianov <borislav@lix.polytechnique.fr>)
114 * Fix for bioses that don't zero the top part of the
115 * entrypoint offset (Mario Sitta <sitta@al.unipmn.it>)
116 * (reported by Panos Katsaloulis <teras@writeme.com>).
117 * Real mode power off patch (Walter Hofmann
118 * <Walter.Hofmann@physik.stud.uni-erlangen.de>).
119 * 1.12: Remove CONFIG_SMP as the compiler will optimize
120 * the code away anyway (smp_num_cpus == 1 in UP)
121 * noted by Artur Skawina <skawina@geocities.com>.
122 * Make power off under SMP work again.
123 * Fix thinko with initial engaging of BIOS.
124 * Make sure power off only happens on CPU 0
125 * (Paul "Rusty" Russell <rusty@rustcorp.com.au>).
126 * Do error notification to user mode if BIOS calls fail.
127 * Move entrypoint offset fix to ...boot/setup.S
128 * where it belongs (Cosmos <gis88564@cis.nctu.edu.tw>).
129 * Remove smp-power-off. SMP users must now specify
130 * "apm=power-off" on the kernel command line. Suggested
131 * by Jim Avera <jima@hal.com>, modified by Alan Cox
132 * <alan@lxorguk.ukuu.org.uk>.
133 * Register the /proc/apm entry even on SMP so that
134 * scripts that check for it before doing power off
135 * work (Jim Avera <jima@hal.com>).
136 * 1.13: Changes for new pm_ interfaces (Andy Henroid
137 * <andy_henroid@yahoo.com>).
138 * Modularize the code.
139 * Fix the Thinkpad (again) :-( (CONFIG_APM_IGNORE_MULTIPLE_SUSPENDS
140 * is now the way life works).
141 * Fix thinko in suspend() (wrong return).
142 * Notify drivers on critical suspend.
143 * Make kapmd absorb more idle time (Pavel Machek <pavel@suse.cz>
144 * modified by sfr).
145 * Disable interrupts while we are suspended (Andy Henroid
146 * <andy_henroid@yahoo.com> fixed by sfr).
147 * Make power off work on SMP again (Tony Hoyle
148 * <tmh@magenta-logic.com> and <zlatko@iskon.hr>) modified by sfr.
149 * Remove CONFIG_APM_SUSPEND_BOUNCE. The bounce ignore
150 * interval is now configurable.
151 * 1.14: Make connection version persist across module unload/load.
152 * Enable and engage power management earlier.
153 * Disengage power management on module unload.
154 * Changed to use the sysrq-register hack for registering the
155 * power off function called by magic sysrq based upon discussions
156 * in irc://irc.openprojects.net/#kernelnewbies
157 * (Crutcher Dunnavant <crutcher+kernel@datastacks.com>).
158 * Make CONFIG_APM_REAL_MODE_POWER_OFF run time configurable.
159 * (Arjan van de Ven <arjanv@redhat.com>) modified by sfr.
160 * Work around byte swap bug in one of the Vaio's BIOS's
161 * (Marc Boucher <marc@mbsi.ca>).
162 * Exposed the disable flag to dmi so that we can handle known
163 * broken APM (Alan Cox <alan@redhat.com>).
164 * 1.14ac: If the BIOS says "I slowed the CPU down" then don't spin
165 * calling it - instead idle. (Alan Cox <alan@redhat.com>)
166 * If an APM idle fails log it and idle sensibly
167 * 1.15: Don't queue events to clients who open the device O_WRONLY.
168 * Don't expect replies from clients who open the device O_RDONLY.
169 * (Idea from Thomas Hood)
170 * Minor waitqueue cleanups. (John Fremlin <chief@bandits.org>)
171 * 1.16: Fix idle calling. (Andreas Steinmetz <ast@domdv.de> et al.)
172 * Notify listeners of standby or suspend events before notifying
173 * drivers. Return EBUSY to ioctl() if suspend is rejected.
174 * (Russell King <rmk@arm.linux.org.uk> and Thomas Hood)
175 * Ignore first resume after we generate our own resume event
176 * after a suspend (Thomas Hood)
177 * Daemonize now gets rid of our controlling terminal (sfr).
178 * CONFIG_APM_CPU_IDLE now just affects the default value of
179 * idle_threshold (sfr).
180 * Change name of kernel apm daemon (as it no longer idles) (sfr).
181 * 1.16ac: Fix up SMP support somewhat. You can now force SMP on and we
182 * make _all_ APM calls on the CPU#0. Fix unsafe sign bug.
183 * TODO: determine if its "boot CPU" or "CPU0" we want to lock to.
184 *
185 * APM 1.1 Reference:
186 *
187 * Intel Corporation, Microsoft Corporation. Advanced Power Management
188 * (APM) BIOS Interface Specification, Revision 1.1, September 1993.
189 * Intel Order Number 241704-001. Microsoft Part Number 781-110-X01.
190 *
191 * [This document is available free from Intel by calling 800.628.8686 (fax
192 * 916.356.6100) or 800.548.4725; or via anonymous ftp from
193 * ftp://ftp.intel.com/pub/IAL/software_specs/apmv11.doc. It is also
194 * available from Microsoft by calling 206.882.8080.]
195 *
196 * APM 1.2 Reference:
197 * Intel Corporation, Microsoft Corporation. Advanced Power Management
198 * (APM) BIOS Interface Specification, Revision 1.2, February 1996.
199 *
200 * [This document is available from Microsoft at:
201 * http://www.microsoft.com/whdc/archive/amp_12.mspx]
202 */
203
204#include <linux/module.h>
205
206#include <linux/poll.h>
207#include <linux/types.h>
208#include <linux/stddef.h>
209#include <linux/timer.h>
210#include <linux/fcntl.h>
211#include <linux/slab.h>
212#include <linux/stat.h>
213#include <linux/proc_fs.h>
214#include <linux/seq_file.h>
215#include <linux/miscdevice.h>
216#include <linux/apm_bios.h>
217#include <linux/init.h>
218#include <linux/time.h>
219#include <linux/sched.h>
220#include <linux/pm.h>
221#include <linux/pm_legacy.h>
222#include <linux/capability.h>
223#include <linux/device.h>
224#include <linux/kernel.h>
225#include <linux/freezer.h>
226#include <linux/smp.h>
227#include <linux/dmi.h>
228#include <linux/suspend.h>
229#include <linux/kthread.h>
230
231#include <asm/system.h>
232#include <asm/uaccess.h>
233#include <asm/desc.h>
234#include <asm/i8253.h>
235#include <asm/paravirt.h>
236#include <asm/reboot.h>
237
238#include "io_ports.h"
239
240#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
241extern int (*console_blank_hook)(int);
242#endif
243
244/*
245 * The apm_bios device is one of the misc char devices.
246 * This is its minor number.
247 */
248#define APM_MINOR_DEV 134
249
250/*
251 * See Documentation/Config.help for the configuration options.
252 *
253 * Various options can be changed at boot time as follows:
254 * (We allow underscores for compatibility with the modules code)
255 * apm=on/off enable/disable APM
256 * [no-]allow[-_]ints allow interrupts during BIOS calls
257 * [no-]broken[-_]psr BIOS has a broken GetPowerStatus call
258 * [no-]realmode[-_]power[-_]off switch to real mode before
259 * powering off
260 * [no-]debug log some debugging messages
261 * [no-]power[-_]off power off on shutdown
262 * [no-]smp Use apm even on an SMP box
263 * bounce[-_]interval=<n> number of ticks to ignore suspend
264 * bounces
265 * idle[-_]threshold=<n> System idle percentage above which to
266 * make APM BIOS idle calls. Set it to
267 * 100 to disable.
268 * idle[-_]period=<n> Period (in 1/100s of a second) over
269 * which the idle percentage is
270 * calculated.
271 */
272
273/* KNOWN PROBLEM MACHINES:
274 *
275 * U: TI 4000M TravelMate: BIOS is *NOT* APM compliant
276 * [Confirmed by TI representative]
277 * ?: ACER 486DX4/75: uses dseg 0040, in violation of APM specification
278 * [Confirmed by BIOS disassembly]
279 * [This may work now ...]
280 * P: Toshiba 1950S: battery life information only gets updated after resume
281 * P: Midwest Micro Soundbook Elite DX2/66 monochrome: screen blanking
282 * broken in BIOS [Reported by Garst R. Reese <reese@isn.net>]
283 * ?: AcerNote-950: oops on reading /proc/apm - workaround is a WIP
284 * Neale Banks <neale@lowendale.com.au> December 2000
285 *
286 * Legend: U = unusable with APM patches
287 * P = partially usable with APM patches
288 */
289
290/*
291 * Define as 1 to make the driver always call the APM BIOS busy
292 * routine even if the clock was not reported as slowed by the
293 * idle routine. Otherwise, define as 0.
294 */
295#define ALWAYS_CALL_BUSY 1
296
297/*
298 * Define to make the APM BIOS calls zero all data segment registers (so
299 * that an incorrect BIOS implementation will cause a kernel panic if it
300 * tries to write to arbitrary memory).
301 */
302#define APM_ZERO_SEGS
303
304#include "apm.h"
305
306/*
307 * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend.
308 * This patched by Chad Miller <cmiller@surfsouth.com>, original code by
309 * David Chen <chen@ctpa04.mit.edu>
310 */
311#undef INIT_TIMER_AFTER_SUSPEND
312
313#ifdef INIT_TIMER_AFTER_SUSPEND
314#include <linux/timex.h>
315#include <asm/io.h>
316#include <linux/delay.h>
317#endif
318
319/*
320 * Need to poll the APM BIOS every second
321 */
322#define APM_CHECK_TIMEOUT (HZ)
323
324/*
325 * Ignore suspend events for this amount of time after a resume
326 */
327#define DEFAULT_BOUNCE_INTERVAL (3 * HZ)
328
329/*
330 * Maximum number of events stored
331 */
332#define APM_MAX_EVENTS 20
333
334/*
335 * The per-file APM data
336 */
337struct apm_user {
338 int magic;
339 struct apm_user * next;
340 unsigned int suser: 1;
341 unsigned int writer: 1;
342 unsigned int reader: 1;
343 unsigned int suspend_wait: 1;
344 int suspend_result;
345 int suspends_pending;
346 int standbys_pending;
347 int suspends_read;
348 int standbys_read;
349 int event_head;
350 int event_tail;
351 apm_event_t events[APM_MAX_EVENTS];
352};
353
354/*
355 * The magic number in apm_user
356 */
357#define APM_BIOS_MAGIC 0x4101
358
359/*
360 * idle percentage above which bios idle calls are done
361 */
362#ifdef CONFIG_APM_CPU_IDLE
363#define DEFAULT_IDLE_THRESHOLD 95
364#else
365#define DEFAULT_IDLE_THRESHOLD 100
366#endif
367#define DEFAULT_IDLE_PERIOD (100 / 3)
368
369/*
370 * Local variables
371 */
372static struct {
373 unsigned long offset;
374 unsigned short segment;
375} apm_bios_entry;
376static int clock_slowed;
377static int idle_threshold __read_mostly = DEFAULT_IDLE_THRESHOLD;
378static int idle_period __read_mostly = DEFAULT_IDLE_PERIOD;
379static int set_pm_idle;
380static int suspends_pending;
381static int standbys_pending;
382static int ignore_sys_suspend;
383static int ignore_normal_resume;
384static int bounce_interval __read_mostly = DEFAULT_BOUNCE_INTERVAL;
385
386static int debug __read_mostly;
387static int smp __read_mostly;
388static int apm_disabled = -1;
389#ifdef CONFIG_SMP
390static int power_off;
391#else
392static int power_off = 1;
393#endif
394#ifdef CONFIG_APM_REAL_MODE_POWER_OFF
395static int realmode_power_off = 1;
396#else
397static int realmode_power_off;
398#endif
399#ifdef CONFIG_APM_ALLOW_INTS
400static int allow_ints = 1;
401#else
402static int allow_ints;
403#endif
404static int broken_psr;
405
406static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
407static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
408static struct apm_user * user_list;
409static DEFINE_SPINLOCK(user_list_lock);
410static const struct desc_struct bad_bios_desc = { 0, 0x00409200 };
411
412static const char driver_version[] = "1.16ac"; /* no spaces */
413
414static struct task_struct *kapmd_task;
415
416/*
417 * APM event names taken from the APM 1.2 specification. These are
418 * the message codes that the BIOS uses to tell us about events
419 */
420static const char * const apm_event_name[] = {
421 "system standby",
422 "system suspend",
423 "normal resume",
424 "critical resume",
425 "low battery",
426 "power status change",
427 "update time",
428 "critical suspend",
429 "user standby",
430 "user suspend",
431 "system standby resume",
432 "capabilities change"
433};
434#define NR_APM_EVENT_NAME ARRAY_SIZE(apm_event_name)
435
436typedef struct lookup_t {
437 int key;
438 char * msg;
439} lookup_t;
440
441/*
442 * The BIOS returns a set of standard error codes in AX when the
443 * carry flag is set.
444 */
445
446static const lookup_t error_table[] = {
447/* N/A { APM_SUCCESS, "Operation succeeded" }, */
448 { APM_DISABLED, "Power management disabled" },
449 { APM_CONNECTED, "Real mode interface already connected" },
450 { APM_NOT_CONNECTED, "Interface not connected" },
451 { APM_16_CONNECTED, "16 bit interface already connected" },
452/* N/A { APM_16_UNSUPPORTED, "16 bit interface not supported" }, */
453 { APM_32_CONNECTED, "32 bit interface already connected" },
454 { APM_32_UNSUPPORTED, "32 bit interface not supported" },
455 { APM_BAD_DEVICE, "Unrecognized device ID" },
456 { APM_BAD_PARAM, "Parameter out of range" },
457 { APM_NOT_ENGAGED, "Interface not engaged" },
458 { APM_BAD_FUNCTION, "Function not supported" },
459 { APM_RESUME_DISABLED, "Resume timer disabled" },
460 { APM_BAD_STATE, "Unable to enter requested state" },
461/* N/A { APM_NO_EVENTS, "No events pending" }, */
462 { APM_NO_ERROR, "BIOS did not set a return code" },
463 { APM_NOT_PRESENT, "No APM present" }
464};
465#define ERROR_COUNT ARRAY_SIZE(error_table)
466
467/**
468 * apm_error - display an APM error
469 * @str: information string
470 * @err: APM BIOS return code
471 *
472 * Write a meaningful log entry to the kernel log in the event of
473 * an APM error.
474 */
475
476static void apm_error(char *str, int err)
477{
478 int i;
479
480 for (i = 0; i < ERROR_COUNT; i++)
481 if (error_table[i].key == err) break;
482 if (i < ERROR_COUNT)
483 printk(KERN_NOTICE "apm: %s: %s\n", str, error_table[i].msg);
484 else
485 printk(KERN_NOTICE "apm: %s: unknown error code %#2.2x\n",
486 str, err);
487}
488
489/*
490 * Lock APM functionality to physical CPU 0
491 */
492
493#ifdef CONFIG_SMP
494
495static cpumask_t apm_save_cpus(void)
496{
497 cpumask_t x = current->cpus_allowed;
498 /* Some bioses don't like being called from CPU != 0 */
499 set_cpus_allowed(current, cpumask_of_cpu(0));
500 BUG_ON(smp_processor_id() != 0);
501 return x;
502}
503
504static inline void apm_restore_cpus(cpumask_t mask)
505{
506 set_cpus_allowed(current, mask);
507}
508
509#else
510
511/*
512 * No CPU lockdown needed on a uniprocessor
513 */
514
515#define apm_save_cpus() (current->cpus_allowed)
516#define apm_restore_cpus(x) (void)(x)
517
518#endif
519
520/*
521 * These are the actual BIOS calls. Depending on APM_ZERO_SEGS and
522 * apm_info.allow_ints, we are being really paranoid here! Not only
523 * are interrupts disabled, but all the segment registers (except SS)
524 * are saved and zeroed this means that if the BIOS tries to reference
525 * any data without explicitly loading the segment registers, the kernel
526 * will fault immediately rather than have some unforeseen circumstances
527 * for the rest of the kernel. And it will be very obvious! :-) Doing
528 * this depends on CS referring to the same physical memory as DS so that
529 * DS can be zeroed before the call. Unfortunately, we can't do anything
530 * about the stack segment/pointer. Also, we tell the compiler that
531 * everything could change.
532 *
533 * Also, we KNOW that for the non error case of apm_bios_call, there
534 * is no useful data returned in the low order 8 bits of eax.
535 */
536
537static inline unsigned long __apm_irq_save(void)
538{
539 unsigned long flags;
540 local_save_flags(flags);
541 if (apm_info.allow_ints) {
542 if (irqs_disabled_flags(flags))
543 local_irq_enable();
544 } else
545 local_irq_disable();
546
547 return flags;
548}
549
550#define apm_irq_save(flags) \
551 do { flags = __apm_irq_save(); } while (0)
552
553static inline void apm_irq_restore(unsigned long flags)
554{
555 if (irqs_disabled_flags(flags))
556 local_irq_disable();
557 else if (irqs_disabled())
558 local_irq_enable();
559}
560
561#ifdef APM_ZERO_SEGS
562# define APM_DECL_SEGS \
563 unsigned int saved_fs; unsigned int saved_gs;
564# define APM_DO_SAVE_SEGS \
565 savesegment(fs, saved_fs); savesegment(gs, saved_gs)
566# define APM_DO_RESTORE_SEGS \
567 loadsegment(fs, saved_fs); loadsegment(gs, saved_gs)
568#else
569# define APM_DECL_SEGS
570# define APM_DO_SAVE_SEGS
571# define APM_DO_RESTORE_SEGS
572#endif
573
574/**
575 * apm_bios_call - Make an APM BIOS 32bit call
576 * @func: APM function to execute
577 * @ebx_in: EBX register for call entry
578 * @ecx_in: ECX register for call entry
579 * @eax: EAX register return
580 * @ebx: EBX register return
581 * @ecx: ECX register return
582 * @edx: EDX register return
583 * @esi: ESI register return
584 *
585 * Make an APM call using the 32bit protected mode interface. The
586 * caller is responsible for knowing if APM BIOS is configured and
587 * enabled. This call can disable interrupts for a long period of
588 * time on some laptops. The return value is in AH and the carry
589 * flag is loaded into AL. If there is an error, then the error
590 * code is returned in AH (bits 8-15 of eax) and this function
591 * returns non-zero.
592 */
593
594static u8 apm_bios_call(u32 func, u32 ebx_in, u32 ecx_in,
595 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, u32 *esi)
596{
597 APM_DECL_SEGS
598 unsigned long flags;
599 cpumask_t cpus;
600 int cpu;
601 struct desc_struct save_desc_40;
602 struct desc_struct *gdt;
603
604 cpus = apm_save_cpus();
605
606 cpu = get_cpu();
607 gdt = get_cpu_gdt_table(cpu);
608 save_desc_40 = gdt[0x40 / 8];
609 gdt[0x40 / 8] = bad_bios_desc;
610
611 apm_irq_save(flags);
612 APM_DO_SAVE_SEGS;
613 apm_bios_call_asm(func, ebx_in, ecx_in, eax, ebx, ecx, edx, esi);
614 APM_DO_RESTORE_SEGS;
615 apm_irq_restore(flags);
616 gdt[0x40 / 8] = save_desc_40;
617 put_cpu();
618 apm_restore_cpus(cpus);
619
620 return *eax & 0xff;
621}
622
623/**
624 * apm_bios_call_simple - make a simple APM BIOS 32bit call
625 * @func: APM function to invoke
626 * @ebx_in: EBX register value for BIOS call
627 * @ecx_in: ECX register value for BIOS call
628 * @eax: EAX register on return from the BIOS call
629 *
630 * Make a BIOS call that returns one value only, or just status.
631 * If there is an error, then the error code is returned in AH
632 * (bits 8-15 of eax) and this function returns non-zero. This is
633 * used for simpler BIOS operations. This call may hold interrupts
634 * off for a long time on some laptops.
635 */
636
637static u8 apm_bios_call_simple(u32 func, u32 ebx_in, u32 ecx_in, u32 *eax)
638{
639 u8 error;
640 APM_DECL_SEGS
641 unsigned long flags;
642 cpumask_t cpus;
643 int cpu;
644 struct desc_struct save_desc_40;
645 struct desc_struct *gdt;
646
647 cpus = apm_save_cpus();
648
649 cpu = get_cpu();
650 gdt = get_cpu_gdt_table(cpu);
651 save_desc_40 = gdt[0x40 / 8];
652 gdt[0x40 / 8] = bad_bios_desc;
653
654 apm_irq_save(flags);
655 APM_DO_SAVE_SEGS;
656 error = apm_bios_call_simple_asm(func, ebx_in, ecx_in, eax);
657 APM_DO_RESTORE_SEGS;
658 apm_irq_restore(flags);
659 gdt[0x40 / 8] = save_desc_40;
660 put_cpu();
661 apm_restore_cpus(cpus);
662 return error;
663}
664
665/**
666 * apm_driver_version - APM driver version
667 * @val: loaded with the APM version on return
668 *
669 * Retrieve the APM version supported by the BIOS. This is only
670 * supported for APM 1.1 or higher. An error indicates APM 1.0 is
671 * probably present.
672 *
673 * On entry val should point to a value indicating the APM driver
674 * version with the high byte being the major and the low byte the
675 * minor number both in BCD
676 *
677 * On return it will hold the BIOS revision supported in the
678 * same format.
679 */
680
681static int apm_driver_version(u_short *val)
682{
683 u32 eax;
684
685 if (apm_bios_call_simple(APM_FUNC_VERSION, 0, *val, &eax))
686 return (eax >> 8) & 0xff;
687 *val = eax;
688 return APM_SUCCESS;
689}
690
691/**
692 * apm_get_event - get an APM event from the BIOS
693 * @event: pointer to the event
694 * @info: point to the event information
695 *
696 * The APM BIOS provides a polled information for event
697 * reporting. The BIOS expects to be polled at least every second
698 * when events are pending. When a message is found the caller should
699 * poll until no more messages are present. However, this causes
700 * problems on some laptops where a suspend event notification is
701 * not cleared until it is acknowledged.
702 *
703 * Additional information is returned in the info pointer, providing
704 * that APM 1.2 is in use. If no messges are pending the value 0x80
705 * is returned (No power management events pending).
706 */
707
708static int apm_get_event(apm_event_t *event, apm_eventinfo_t *info)
709{
710 u32 eax;
711 u32 ebx;
712 u32 ecx;
713 u32 dummy;
714
715 if (apm_bios_call(APM_FUNC_GET_EVENT, 0, 0, &eax, &ebx, &ecx,
716 &dummy, &dummy))
717 return (eax >> 8) & 0xff;
718 *event = ebx;
719 if (apm_info.connection_version < 0x0102)
720 *info = ~0; /* indicate info not valid */
721 else
722 *info = ecx;
723 return APM_SUCCESS;
724}
725
726/**
727 * set_power_state - set the power management state
728 * @what: which items to transition
729 * @state: state to transition to
730 *
731 * Request an APM change of state for one or more system devices. The
732 * processor state must be transitioned last of all. what holds the
733 * class of device in the upper byte and the device number (0xFF for
734 * all) for the object to be transitioned.
735 *
736 * The state holds the state to transition to, which may in fact
737 * be an acceptance of a BIOS requested state change.
738 */
739
740static int set_power_state(u_short what, u_short state)
741{
742 u32 eax;
743
744 if (apm_bios_call_simple(APM_FUNC_SET_STATE, what, state, &eax))
745 return (eax >> 8) & 0xff;
746 return APM_SUCCESS;
747}
748
749/**
750 * set_system_power_state - set system wide power state
751 * @state: which state to enter
752 *
753 * Transition the entire system into a new APM power state.
754 */
755
756static int set_system_power_state(u_short state)
757{
758 return set_power_state(APM_DEVICE_ALL, state);
759}
760
761/**
762 * apm_do_idle - perform power saving
763 *
764 * This function notifies the BIOS that the processor is (in the view
765 * of the OS) idle. It returns -1 in the event that the BIOS refuses
766 * to handle the idle request. On a success the function returns 1
767 * if the BIOS did clock slowing or 0 otherwise.
768 */
769
770static int apm_do_idle(void)
771{
772 u32 eax;
773 u8 ret = 0;
774 int idled = 0;
775 int polling;
776
777 polling = !!(current_thread_info()->status & TS_POLLING);
778 if (polling) {
779 current_thread_info()->status &= ~TS_POLLING;
780 /*
781 * TS_POLLING-cleared state must be visible before we
782 * test NEED_RESCHED:
783 */
784 smp_mb();
785 }
786 if (!need_resched()) {
787 idled = 1;
788 ret = apm_bios_call_simple(APM_FUNC_IDLE, 0, 0, &eax);
789 }
790 if (polling)
791 current_thread_info()->status |= TS_POLLING;
792
793 if (!idled)
794 return 0;
795
796 if (ret) {
797 static unsigned long t;
798
799 /* This always fails on some SMP boards running UP kernels.
800 * Only report the failure the first 5 times.
801 */
802 if (++t < 5)
803 {
804 printk(KERN_DEBUG "apm_do_idle failed (%d)\n",
805 (eax >> 8) & 0xff);
806 t = jiffies;
807 }
808 return -1;
809 }
810 clock_slowed = (apm_info.bios.flags & APM_IDLE_SLOWS_CLOCK) != 0;
811 return clock_slowed;
812}
813
814/**
815 * apm_do_busy - inform the BIOS the CPU is busy
816 *
817 * Request that the BIOS brings the CPU back to full performance.
818 */
819
820static void apm_do_busy(void)
821{
822 u32 dummy;
823
824 if (clock_slowed || ALWAYS_CALL_BUSY) {
825 (void) apm_bios_call_simple(APM_FUNC_BUSY, 0, 0, &dummy);
826 clock_slowed = 0;
827 }
828}
829
830/*
831 * If no process has really been interested in
832 * the CPU for some time, we want to call BIOS
833 * power management - we probably want
834 * to conserve power.
835 */
836#define IDLE_CALC_LIMIT (HZ * 100)
837#define IDLE_LEAKY_MAX 16
838
839static void (*original_pm_idle)(void) __read_mostly;
840
841/**
842 * apm_cpu_idle - cpu idling for APM capable Linux
843 *
844 * This is the idling function the kernel executes when APM is available. It
845 * tries to do BIOS powermanagement based on the average system idle time.
846 * Furthermore it calls the system default idle routine.
847 */
848
849static void apm_cpu_idle(void)
850{
851 static int use_apm_idle; /* = 0 */
852 static unsigned int last_jiffies; /* = 0 */
853 static unsigned int last_stime; /* = 0 */
854
855 int apm_idle_done = 0;
856 unsigned int jiffies_since_last_check = jiffies - last_jiffies;
857 unsigned int bucket;
858
859recalc:
860 if (jiffies_since_last_check > IDLE_CALC_LIMIT) {
861 use_apm_idle = 0;
862 last_jiffies = jiffies;
863 last_stime = current->stime;
864 } else if (jiffies_since_last_check > idle_period) {
865 unsigned int idle_percentage;
866
867 idle_percentage = current->stime - last_stime;
868 idle_percentage *= 100;
869 idle_percentage /= jiffies_since_last_check;
870 use_apm_idle = (idle_percentage > idle_threshold);
871 if (apm_info.forbid_idle)
872 use_apm_idle = 0;
873 last_jiffies = jiffies;
874 last_stime = current->stime;
875 }
876
877 bucket = IDLE_LEAKY_MAX;
878
879 while (!need_resched()) {
880 if (use_apm_idle) {
881 unsigned int t;
882
883 t = jiffies;
884 switch (apm_do_idle()) {
885 case 0: apm_idle_done = 1;
886 if (t != jiffies) {
887 if (bucket) {
888 bucket = IDLE_LEAKY_MAX;
889 continue;
890 }
891 } else if (bucket) {
892 bucket--;
893 continue;
894 }
895 break;
896 case 1: apm_idle_done = 1;
897 break;
898 default: /* BIOS refused */
899 break;
900 }
901 }
902 if (original_pm_idle)
903 original_pm_idle();
904 else
905 default_idle();
906 jiffies_since_last_check = jiffies - last_jiffies;
907 if (jiffies_since_last_check > idle_period)
908 goto recalc;
909 }
910
911 if (apm_idle_done)
912 apm_do_busy();
913}
914
915/**
916 * apm_power_off - ask the BIOS to power off
917 *
918 * Handle the power off sequence. This is the one piece of code we
919 * will execute even on SMP machines. In order to deal with BIOS
920 * bugs we support real mode APM BIOS power off calls. We also make
921 * the SMP call on CPU0 as some systems will only honour this call
922 * on their first cpu.
923 */
924
925static void apm_power_off(void)
926{
927 unsigned char po_bios_call[] = {
928 0xb8, 0x00, 0x10, /* movw $0x1000,ax */
929 0x8e, 0xd0, /* movw ax,ss */
930 0xbc, 0x00, 0xf0, /* movw $0xf000,sp */
931 0xb8, 0x07, 0x53, /* movw $0x5307,ax */
932 0xbb, 0x01, 0x00, /* movw $0x0001,bx */
933 0xb9, 0x03, 0x00, /* movw $0x0003,cx */
934 0xcd, 0x15 /* int $0x15 */
935 };
936
937 /* Some bioses don't like being called from CPU != 0 */
938 if (apm_info.realmode_power_off)
939 {
940 (void)apm_save_cpus();
941 machine_real_restart(po_bios_call, sizeof(po_bios_call));
942 }
943 else
944 (void) set_system_power_state(APM_STATE_OFF);
945}
946
947#ifdef CONFIG_APM_DO_ENABLE
948
949/**
950 * apm_enable_power_management - enable BIOS APM power management
951 * @enable: enable yes/no
952 *
953 * Enable or disable the APM BIOS power services.
954 */
955
956static int apm_enable_power_management(int enable)
957{
958 u32 eax;
959
960 if ((enable == 0) && (apm_info.bios.flags & APM_BIOS_DISENGAGED))
961 return APM_NOT_ENGAGED;
962 if (apm_bios_call_simple(APM_FUNC_ENABLE_PM, APM_DEVICE_BALL,
963 enable, &eax))
964 return (eax >> 8) & 0xff;
965 if (enable)
966 apm_info.bios.flags &= ~APM_BIOS_DISABLED;
967 else
968 apm_info.bios.flags |= APM_BIOS_DISABLED;
969 return APM_SUCCESS;
970}
971#endif
972
973/**
974 * apm_get_power_status - get current power state
975 * @status: returned status
976 * @bat: battery info
977 * @life: estimated life
978 *
979 * Obtain the current power status from the APM BIOS. We return a
980 * status which gives the rough battery status, and current power
981 * source. The bat value returned give an estimate as a percentage
982 * of life and a status value for the battery. The estimated life
983 * if reported is a lifetime in secodnds/minutes at current powwer
984 * consumption.
985 */
986
987static int apm_get_power_status(u_short *status, u_short *bat, u_short *life)
988{
989 u32 eax;
990 u32 ebx;
991 u32 ecx;
992 u32 edx;
993 u32 dummy;
994
995 if (apm_info.get_power_status_broken)
996 return APM_32_UNSUPPORTED;
997 if (apm_bios_call(APM_FUNC_GET_STATUS, APM_DEVICE_ALL, 0,
998 &eax, &ebx, &ecx, &edx, &dummy))
999 return (eax >> 8) & 0xff;
1000 *status = ebx;
1001 *bat = ecx;
1002 if (apm_info.get_power_status_swabinminutes) {
1003 *life = swab16((u16)edx);
1004 *life |= 0x8000;
1005 } else
1006 *life = edx;
1007 return APM_SUCCESS;
1008}
1009
1010#if 0
1011static int apm_get_battery_status(u_short which, u_short *status,
1012 u_short *bat, u_short *life, u_short *nbat)
1013{
1014 u32 eax;
1015 u32 ebx;
1016 u32 ecx;
1017 u32 edx;
1018 u32 esi;
1019
1020 if (apm_info.connection_version < 0x0102) {
1021 /* pretend we only have one battery. */
1022 if (which != 1)
1023 return APM_BAD_DEVICE;
1024 *nbat = 1;
1025 return apm_get_power_status(status, bat, life);
1026 }
1027
1028 if (apm_bios_call(APM_FUNC_GET_STATUS, (0x8000 | (which)), 0, &eax,
1029 &ebx, &ecx, &edx, &esi))
1030 return (eax >> 8) & 0xff;
1031 *status = ebx;
1032 *bat = ecx;
1033 *life = edx;
1034 *nbat = esi;
1035 return APM_SUCCESS;
1036}
1037#endif
1038
1039/**
1040 * apm_engage_power_management - enable PM on a device
1041 * @device: identity of device
1042 * @enable: on/off
1043 *
1044 * Activate or deactive power management on either a specific device
1045 * or the entire system (%APM_DEVICE_ALL).
1046 */
1047
1048static int apm_engage_power_management(u_short device, int enable)
1049{
1050 u32 eax;
1051
1052 if ((enable == 0) && (device == APM_DEVICE_ALL)
1053 && (apm_info.bios.flags & APM_BIOS_DISABLED))
1054 return APM_DISABLED;
1055 if (apm_bios_call_simple(APM_FUNC_ENGAGE_PM, device, enable, &eax))
1056 return (eax >> 8) & 0xff;
1057 if (device == APM_DEVICE_ALL) {
1058 if (enable)
1059 apm_info.bios.flags &= ~APM_BIOS_DISENGAGED;
1060 else
1061 apm_info.bios.flags |= APM_BIOS_DISENGAGED;
1062 }
1063 return APM_SUCCESS;
1064}
1065
1066#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1067
1068/**
1069 * apm_console_blank - blank the display
1070 * @blank: on/off
1071 *
1072 * Attempt to blank the console, firstly by blanking just video device
1073 * zero, and if that fails (some BIOSes don't support it) then it blanks
1074 * all video devices. Typically the BIOS will do laptop backlight and
1075 * monitor powerdown for us.
1076 */
1077
1078static int apm_console_blank(int blank)
1079{
1080 int error = APM_NOT_ENGAGED; /* silence gcc */
1081 int i;
1082 u_short state;
1083 static const u_short dev[3] = { 0x100, 0x1FF, 0x101 };
1084
1085 state = blank ? APM_STATE_STANDBY : APM_STATE_READY;
1086
1087 for (i = 0; i < ARRAY_SIZE(dev); i++) {
1088 error = set_power_state(dev[i], state);
1089
1090 if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
1091 return 1;
1092
1093 if (error == APM_NOT_ENGAGED)
1094 break;
1095 }
1096
1097 if (error == APM_NOT_ENGAGED) {
1098 static int tried;
1099 int eng_error;
1100 if (tried++ == 0) {
1101 eng_error = apm_engage_power_management(APM_DEVICE_ALL, 1);
1102 if (eng_error) {
1103 apm_error("set display", error);
1104 apm_error("engage interface", eng_error);
1105 return 0;
1106 } else
1107 return apm_console_blank(blank);
1108 }
1109 }
1110 apm_error("set display", error);
1111 return 0;
1112}
1113#endif
1114
1115static int queue_empty(struct apm_user *as)
1116{
1117 return as->event_head == as->event_tail;
1118}
1119
1120static apm_event_t get_queued_event(struct apm_user *as)
1121{
1122 if (++as->event_tail >= APM_MAX_EVENTS)
1123 as->event_tail = 0;
1124 return as->events[as->event_tail];
1125}
1126
1127static void queue_event(apm_event_t event, struct apm_user *sender)
1128{
1129 struct apm_user * as;
1130
1131 spin_lock(&user_list_lock);
1132 if (user_list == NULL)
1133 goto out;
1134 for (as = user_list; as != NULL; as = as->next) {
1135 if ((as == sender) || (!as->reader))
1136 continue;
1137 if (++as->event_head >= APM_MAX_EVENTS)
1138 as->event_head = 0;
1139
1140 if (as->event_head == as->event_tail) {
1141 static int notified;
1142
1143 if (notified++ == 0)
1144 printk(KERN_ERR "apm: an event queue overflowed\n");
1145 if (++as->event_tail >= APM_MAX_EVENTS)
1146 as->event_tail = 0;
1147 }
1148 as->events[as->event_head] = event;
1149 if ((!as->suser) || (!as->writer))
1150 continue;
1151 switch (event) {
1152 case APM_SYS_SUSPEND:
1153 case APM_USER_SUSPEND:
1154 as->suspends_pending++;
1155 suspends_pending++;
1156 break;
1157
1158 case APM_SYS_STANDBY:
1159 case APM_USER_STANDBY:
1160 as->standbys_pending++;
1161 standbys_pending++;
1162 break;
1163 }
1164 }
1165 wake_up_interruptible(&apm_waitqueue);
1166out:
1167 spin_unlock(&user_list_lock);
1168}
1169
1170static void reinit_timer(void)
1171{
1172#ifdef INIT_TIMER_AFTER_SUSPEND
1173 unsigned long flags;
1174
1175 spin_lock_irqsave(&i8253_lock, flags);
1176 /* set the clock to HZ */
1177 outb_p(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */
1178 udelay(10);
1179 outb_p(LATCH & 0xff, PIT_CH0); /* LSB */
1180 udelay(10);
1181 outb(LATCH >> 8, PIT_CH0); /* MSB */
1182 udelay(10);
1183 spin_unlock_irqrestore(&i8253_lock, flags);
1184#endif
1185}
1186
1187static int suspend(int vetoable)
1188{
1189 int err;
1190 struct apm_user *as;
1191
1192 if (pm_send_all(PM_SUSPEND, (void *)3)) {
1193 /* Vetoed */
1194 if (vetoable) {
1195 if (apm_info.connection_version > 0x100)
1196 set_system_power_state(APM_STATE_REJECT);
1197 err = -EBUSY;
1198 ignore_sys_suspend = 0;
1199 printk(KERN_WARNING "apm: suspend was vetoed.\n");
1200 goto out;
1201 }
1202 printk(KERN_CRIT "apm: suspend was vetoed, but suspending anyway.\n");
1203 }
1204
1205 device_suspend(PMSG_SUSPEND);
1206 local_irq_disable();
1207 device_power_down(PMSG_SUSPEND);
1208
1209 local_irq_enable();
1210
1211 save_processor_state();
1212 err = set_system_power_state(APM_STATE_SUSPEND);
1213 ignore_normal_resume = 1;
1214 restore_processor_state();
1215
1216 local_irq_disable();
1217 reinit_timer();
1218
1219 if (err == APM_NO_ERROR)
1220 err = APM_SUCCESS;
1221 if (err != APM_SUCCESS)
1222 apm_error("suspend", err);
1223 err = (err == APM_SUCCESS) ? 0 : -EIO;
1224 device_power_up();
1225 local_irq_enable();
1226 device_resume();
1227 pm_send_all(PM_RESUME, (void *)0);
1228 queue_event(APM_NORMAL_RESUME, NULL);
1229 out:
1230 spin_lock(&user_list_lock);
1231 for (as = user_list; as != NULL; as = as->next) {
1232 as->suspend_wait = 0;
1233 as->suspend_result = err;
1234 }
1235 spin_unlock(&user_list_lock);
1236 wake_up_interruptible(&apm_suspend_waitqueue);
1237 return err;
1238}
1239
1240static void standby(void)
1241{
1242 int err;
1243
1244 local_irq_disable();
1245 device_power_down(PMSG_SUSPEND);
1246 local_irq_enable();
1247
1248 err = set_system_power_state(APM_STATE_STANDBY);
1249 if ((err != APM_SUCCESS) && (err != APM_NO_ERROR))
1250 apm_error("standby", err);
1251
1252 local_irq_disable();
1253 device_power_up();
1254 local_irq_enable();
1255}
1256
1257static apm_event_t get_event(void)
1258{
1259 int error;
1260 apm_event_t event = APM_NO_EVENTS; /* silence gcc */
1261 apm_eventinfo_t info;
1262
1263 static int notified;
1264
1265 /* we don't use the eventinfo */
1266 error = apm_get_event(&event, &info);
1267 if (error == APM_SUCCESS)
1268 return event;
1269
1270 if ((error != APM_NO_EVENTS) && (notified++ == 0))
1271 apm_error("get_event", error);
1272
1273 return 0;
1274}
1275
1276static void check_events(void)
1277{
1278 apm_event_t event;
1279 static unsigned long last_resume;
1280 static int ignore_bounce;
1281
1282 while ((event = get_event()) != 0) {
1283 if (debug) {
1284 if (event <= NR_APM_EVENT_NAME)
1285 printk(KERN_DEBUG "apm: received %s notify\n",
1286 apm_event_name[event - 1]);
1287 else
1288 printk(KERN_DEBUG "apm: received unknown "
1289 "event 0x%02x\n", event);
1290 }
1291 if (ignore_bounce
1292 && ((jiffies - last_resume) > bounce_interval))
1293 ignore_bounce = 0;
1294
1295 switch (event) {
1296 case APM_SYS_STANDBY:
1297 case APM_USER_STANDBY:
1298 queue_event(event, NULL);
1299 if (standbys_pending <= 0)
1300 standby();
1301 break;
1302
1303 case APM_USER_SUSPEND:
1304#ifdef CONFIG_APM_IGNORE_USER_SUSPEND
1305 if (apm_info.connection_version > 0x100)
1306 set_system_power_state(APM_STATE_REJECT);
1307 break;
1308#endif
1309 case APM_SYS_SUSPEND:
1310 if (ignore_bounce) {
1311 if (apm_info.connection_version > 0x100)
1312 set_system_power_state(APM_STATE_REJECT);
1313 break;
1314 }
1315 /*
1316 * If we are already processing a SUSPEND,
1317 * then further SUSPEND events from the BIOS
1318 * will be ignored. We also return here to
1319 * cope with the fact that the Thinkpads keep
1320 * sending a SUSPEND event until something else
1321 * happens!
1322 */
1323 if (ignore_sys_suspend)
1324 return;
1325 ignore_sys_suspend = 1;
1326 queue_event(event, NULL);
1327 if (suspends_pending <= 0)
1328 (void) suspend(1);
1329 break;
1330
1331 case APM_NORMAL_RESUME:
1332 case APM_CRITICAL_RESUME:
1333 case APM_STANDBY_RESUME:
1334 ignore_sys_suspend = 0;
1335 last_resume = jiffies;
1336 ignore_bounce = 1;
1337 if ((event != APM_NORMAL_RESUME)
1338 || (ignore_normal_resume == 0)) {
1339 device_resume();
1340 pm_send_all(PM_RESUME, (void *)0);
1341 queue_event(event, NULL);
1342 }
1343 ignore_normal_resume = 0;
1344 break;
1345
1346 case APM_CAPABILITY_CHANGE:
1347 case APM_LOW_BATTERY:
1348 case APM_POWER_STATUS_CHANGE:
1349 queue_event(event, NULL);
1350 /* If needed, notify drivers here */
1351 break;
1352
1353 case APM_UPDATE_TIME:
1354 break;
1355
1356 case APM_CRITICAL_SUSPEND:
1357 /*
1358 * We are not allowed to reject a critical suspend.
1359 */
1360 (void) suspend(0);
1361 break;
1362 }
1363 }
1364}
1365
1366static void apm_event_handler(void)
1367{
1368 static int pending_count = 4;
1369 int err;
1370
1371 if ((standbys_pending > 0) || (suspends_pending > 0)) {
1372 if ((apm_info.connection_version > 0x100) &&
1373 (pending_count-- <= 0)) {
1374 pending_count = 4;
1375 if (debug)
1376 printk(KERN_DEBUG "apm: setting state busy\n");
1377 err = set_system_power_state(APM_STATE_BUSY);
1378 if (err)
1379 apm_error("busy", err);
1380 }
1381 } else
1382 pending_count = 4;
1383 check_events();
1384}
1385
1386/*
1387 * This is the APM thread main loop.
1388 */
1389
1390static void apm_mainloop(void)
1391{
1392 DECLARE_WAITQUEUE(wait, current);
1393
1394 add_wait_queue(&apm_waitqueue, &wait);
1395 set_current_state(TASK_INTERRUPTIBLE);
1396 for (;;) {
1397 schedule_timeout(APM_CHECK_TIMEOUT);
1398 if (kthread_should_stop())
1399 break;
1400 /*
1401 * Ok, check all events, check for idle (and mark us sleeping
1402 * so as not to count towards the load average)..
1403 */
1404 set_current_state(TASK_INTERRUPTIBLE);
1405 apm_event_handler();
1406 }
1407 remove_wait_queue(&apm_waitqueue, &wait);
1408}
1409
1410static int check_apm_user(struct apm_user *as, const char *func)
1411{
1412 if ((as == NULL) || (as->magic != APM_BIOS_MAGIC)) {
1413 printk(KERN_ERR "apm: %s passed bad filp\n", func);
1414 return 1;
1415 }
1416 return 0;
1417}
1418
1419static ssize_t do_read(struct file *fp, char __user *buf, size_t count, loff_t *ppos)
1420{
1421 struct apm_user * as;
1422 int i;
1423 apm_event_t event;
1424
1425 as = fp->private_data;
1426 if (check_apm_user(as, "read"))
1427 return -EIO;
1428 if ((int)count < sizeof(apm_event_t))
1429 return -EINVAL;
1430 if ((queue_empty(as)) && (fp->f_flags & O_NONBLOCK))
1431 return -EAGAIN;
1432 wait_event_interruptible(apm_waitqueue, !queue_empty(as));
1433 i = count;
1434 while ((i >= sizeof(event)) && !queue_empty(as)) {
1435 event = get_queued_event(as);
1436 if (copy_to_user(buf, &event, sizeof(event))) {
1437 if (i < count)
1438 break;
1439 return -EFAULT;
1440 }
1441 switch (event) {
1442 case APM_SYS_SUSPEND:
1443 case APM_USER_SUSPEND:
1444 as->suspends_read++;
1445 break;
1446
1447 case APM_SYS_STANDBY:
1448 case APM_USER_STANDBY:
1449 as->standbys_read++;
1450 break;
1451 }
1452 buf += sizeof(event);
1453 i -= sizeof(event);
1454 }
1455 if (i < count)
1456 return count - i;
1457 if (signal_pending(current))
1458 return -ERESTARTSYS;
1459 return 0;
1460}
1461
1462static unsigned int do_poll(struct file *fp, poll_table * wait)
1463{
1464 struct apm_user * as;
1465
1466 as = fp->private_data;
1467 if (check_apm_user(as, "poll"))
1468 return 0;
1469 poll_wait(fp, &apm_waitqueue, wait);
1470 if (!queue_empty(as))
1471 return POLLIN | POLLRDNORM;
1472 return 0;
1473}
1474
1475static int do_ioctl(struct inode * inode, struct file *filp,
1476 u_int cmd, u_long arg)
1477{
1478 struct apm_user * as;
1479
1480 as = filp->private_data;
1481 if (check_apm_user(as, "ioctl"))
1482 return -EIO;
1483 if ((!as->suser) || (!as->writer))
1484 return -EPERM;
1485 switch (cmd) {
1486 case APM_IOC_STANDBY:
1487 if (as->standbys_read > 0) {
1488 as->standbys_read--;
1489 as->standbys_pending--;
1490 standbys_pending--;
1491 } else
1492 queue_event(APM_USER_STANDBY, as);
1493 if (standbys_pending <= 0)
1494 standby();
1495 break;
1496 case APM_IOC_SUSPEND:
1497 if (as->suspends_read > 0) {
1498 as->suspends_read--;
1499 as->suspends_pending--;
1500 suspends_pending--;
1501 } else
1502 queue_event(APM_USER_SUSPEND, as);
1503 if (suspends_pending <= 0) {
1504 return suspend(1);
1505 } else {
1506 as->suspend_wait = 1;
1507 wait_event_interruptible(apm_suspend_waitqueue,
1508 as->suspend_wait == 0);
1509 return as->suspend_result;
1510 }
1511 break;
1512 default:
1513 return -EINVAL;
1514 }
1515 return 0;
1516}
1517
1518static int do_release(struct inode * inode, struct file * filp)
1519{
1520 struct apm_user * as;
1521
1522 as = filp->private_data;
1523 if (check_apm_user(as, "release"))
1524 return 0;
1525 filp->private_data = NULL;
1526 if (as->standbys_pending > 0) {
1527 standbys_pending -= as->standbys_pending;
1528 if (standbys_pending <= 0)
1529 standby();
1530 }
1531 if (as->suspends_pending > 0) {
1532 suspends_pending -= as->suspends_pending;
1533 if (suspends_pending <= 0)
1534 (void) suspend(1);
1535 }
1536 spin_lock(&user_list_lock);
1537 if (user_list == as)
1538 user_list = as->next;
1539 else {
1540 struct apm_user * as1;
1541
1542 for (as1 = user_list;
1543 (as1 != NULL) && (as1->next != as);
1544 as1 = as1->next)
1545 ;
1546 if (as1 == NULL)
1547 printk(KERN_ERR "apm: filp not in user list\n");
1548 else
1549 as1->next = as->next;
1550 }
1551 spin_unlock(&user_list_lock);
1552 kfree(as);
1553 return 0;
1554}
1555
1556static int do_open(struct inode * inode, struct file * filp)
1557{
1558 struct apm_user * as;
1559
1560 as = kmalloc(sizeof(*as), GFP_KERNEL);
1561 if (as == NULL) {
1562 printk(KERN_ERR "apm: cannot allocate struct of size %d bytes\n",
1563 sizeof(*as));
1564 return -ENOMEM;
1565 }
1566 as->magic = APM_BIOS_MAGIC;
1567 as->event_tail = as->event_head = 0;
1568 as->suspends_pending = as->standbys_pending = 0;
1569 as->suspends_read = as->standbys_read = 0;
1570 /*
1571 * XXX - this is a tiny bit broken, when we consider BSD
1572 * process accounting. If the device is opened by root, we
1573 * instantly flag that we used superuser privs. Who knows,
1574 * we might close the device immediately without doing a
1575 * privileged operation -- cevans
1576 */
1577 as->suser = capable(CAP_SYS_ADMIN);
1578 as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE;
1579 as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ;
1580 spin_lock(&user_list_lock);
1581 as->next = user_list;
1582 user_list = as;
1583 spin_unlock(&user_list_lock);
1584 filp->private_data = as;
1585 return 0;
1586}
1587
1588static int proc_apm_show(struct seq_file *m, void *v)
1589{
1590 unsigned short bx;
1591 unsigned short cx;
1592 unsigned short dx;
1593 int error;
1594 unsigned short ac_line_status = 0xff;
1595 unsigned short battery_status = 0xff;
1596 unsigned short battery_flag = 0xff;
1597 int percentage = -1;
1598 int time_units = -1;
1599 char *units = "?";
1600
1601 if ((num_online_cpus() == 1) &&
1602 !(error = apm_get_power_status(&bx, &cx, &dx))) {
1603 ac_line_status = (bx >> 8) & 0xff;
1604 battery_status = bx & 0xff;
1605 if ((cx & 0xff) != 0xff)
1606 percentage = cx & 0xff;
1607
1608 if (apm_info.connection_version > 0x100) {
1609 battery_flag = (cx >> 8) & 0xff;
1610 if (dx != 0xffff) {
1611 units = (dx & 0x8000) ? "min" : "sec";
1612 time_units = dx & 0x7fff;
1613 }
1614 }
1615 }
1616 /* Arguments, with symbols from linux/apm_bios.h. Information is
1617 from the Get Power Status (0x0a) call unless otherwise noted.
1618
1619 0) Linux driver version (this will change if format changes)
1620 1) APM BIOS Version. Usually 1.0, 1.1 or 1.2.
1621 2) APM flags from APM Installation Check (0x00):
1622 bit 0: APM_16_BIT_SUPPORT
1623 bit 1: APM_32_BIT_SUPPORT
1624 bit 2: APM_IDLE_SLOWS_CLOCK
1625 bit 3: APM_BIOS_DISABLED
1626 bit 4: APM_BIOS_DISENGAGED
1627 3) AC line status
1628 0x00: Off-line
1629 0x01: On-line
1630 0x02: On backup power (BIOS >= 1.1 only)
1631 0xff: Unknown
1632 4) Battery status
1633 0x00: High
1634 0x01: Low
1635 0x02: Critical
1636 0x03: Charging
1637 0x04: Selected battery not present (BIOS >= 1.2 only)
1638 0xff: Unknown
1639 5) Battery flag
1640 bit 0: High
1641 bit 1: Low
1642 bit 2: Critical
1643 bit 3: Charging
1644 bit 7: No system battery
1645 0xff: Unknown
1646 6) Remaining battery life (percentage of charge):
1647 0-100: valid
1648 -1: Unknown
1649 7) Remaining battery life (time units):
1650 Number of remaining minutes or seconds
1651 -1: Unknown
1652 8) min = minutes; sec = seconds */
1653
1654 seq_printf(m, "%s %d.%d 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
1655 driver_version,
1656 (apm_info.bios.version >> 8) & 0xff,
1657 apm_info.bios.version & 0xff,
1658 apm_info.bios.flags,
1659 ac_line_status,
1660 battery_status,
1661 battery_flag,
1662 percentage,
1663 time_units,
1664 units);
1665 return 0;
1666}
1667
1668static int proc_apm_open(struct inode *inode, struct file *file)
1669{
1670 return single_open(file, proc_apm_show, NULL);
1671}
1672
1673static const struct file_operations apm_file_ops = {
1674 .owner = THIS_MODULE,
1675 .open = proc_apm_open,
1676 .read = seq_read,
1677 .llseek = seq_lseek,
1678 .release = single_release,
1679};
1680
1681static int apm(void *unused)
1682{
1683 unsigned short bx;
1684 unsigned short cx;
1685 unsigned short dx;
1686 int error;
1687 char * power_stat;
1688 char * bat_stat;
1689
1690#ifdef CONFIG_SMP
1691 /* 2002/08/01 - WT
1692 * This is to avoid random crashes at boot time during initialization
1693 * on SMP systems in case of "apm=power-off" mode. Seen on ASUS A7M266D.
1694 * Some bioses don't like being called from CPU != 0.
1695 * Method suggested by Ingo Molnar.
1696 */
1697 set_cpus_allowed(current, cpumask_of_cpu(0));
1698 BUG_ON(smp_processor_id() != 0);
1699#endif
1700
1701 if (apm_info.connection_version == 0) {
1702 apm_info.connection_version = apm_info.bios.version;
1703 if (apm_info.connection_version > 0x100) {
1704 /*
1705 * We only support BIOSs up to version 1.2
1706 */
1707 if (apm_info.connection_version > 0x0102)
1708 apm_info.connection_version = 0x0102;
1709 error = apm_driver_version(&apm_info.connection_version);
1710 if (error != APM_SUCCESS) {
1711 apm_error("driver version", error);
1712 /* Fall back to an APM 1.0 connection. */
1713 apm_info.connection_version = 0x100;
1714 }
1715 }
1716 }
1717
1718 if (debug)
1719 printk(KERN_INFO "apm: Connection version %d.%d\n",
1720 (apm_info.connection_version >> 8) & 0xff,
1721 apm_info.connection_version & 0xff);
1722
1723#ifdef CONFIG_APM_DO_ENABLE
1724 if (apm_info.bios.flags & APM_BIOS_DISABLED) {
1725 /*
1726 * This call causes my NEC UltraLite Versa 33/C to hang if it
1727 * is booted with PM disabled but not in the docking station.
1728 * Unfortunate ...
1729 */
1730 error = apm_enable_power_management(1);
1731 if (error) {
1732 apm_error("enable power management", error);
1733 return -1;
1734 }
1735 }
1736#endif
1737
1738 if ((apm_info.bios.flags & APM_BIOS_DISENGAGED)
1739 && (apm_info.connection_version > 0x0100)) {
1740 error = apm_engage_power_management(APM_DEVICE_ALL, 1);
1741 if (error) {
1742 apm_error("engage power management", error);
1743 return -1;
1744 }
1745 }
1746
1747 if (debug && (num_online_cpus() == 1 || smp )) {
1748 error = apm_get_power_status(&bx, &cx, &dx);
1749 if (error)
1750 printk(KERN_INFO "apm: power status not available\n");
1751 else {
1752 switch ((bx >> 8) & 0xff) {
1753 case 0: power_stat = "off line"; break;
1754 case 1: power_stat = "on line"; break;
1755 case 2: power_stat = "on backup power"; break;
1756 default: power_stat = "unknown"; break;
1757 }
1758 switch (bx & 0xff) {
1759 case 0: bat_stat = "high"; break;
1760 case 1: bat_stat = "low"; break;
1761 case 2: bat_stat = "critical"; break;
1762 case 3: bat_stat = "charging"; break;
1763 default: bat_stat = "unknown"; break;
1764 }
1765 printk(KERN_INFO
1766 "apm: AC %s, battery status %s, battery life ",
1767 power_stat, bat_stat);
1768 if ((cx & 0xff) == 0xff)
1769 printk("unknown\n");
1770 else
1771 printk("%d%%\n", cx & 0xff);
1772 if (apm_info.connection_version > 0x100) {
1773 printk(KERN_INFO
1774 "apm: battery flag 0x%02x, battery life ",
1775 (cx >> 8) & 0xff);
1776 if (dx == 0xffff)
1777 printk("unknown\n");
1778 else
1779 printk("%d %s\n", dx & 0x7fff,
1780 (dx & 0x8000) ?
1781 "minutes" : "seconds");
1782 }
1783 }
1784 }
1785
1786 /* Install our power off handler.. */
1787 if (power_off)
1788 pm_power_off = apm_power_off;
1789
1790 if (num_online_cpus() == 1 || smp) {
1791#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1792 console_blank_hook = apm_console_blank;
1793#endif
1794 apm_mainloop();
1795#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1796 console_blank_hook = NULL;
1797#endif
1798 }
1799
1800 return 0;
1801}
1802
1803#ifndef MODULE
1804static int __init apm_setup(char *str)
1805{
1806 int invert;
1807
1808 while ((str != NULL) && (*str != '\0')) {
1809 if (strncmp(str, "off", 3) == 0)
1810 apm_disabled = 1;
1811 if (strncmp(str, "on", 2) == 0)
1812 apm_disabled = 0;
1813 if ((strncmp(str, "bounce-interval=", 16) == 0) ||
1814 (strncmp(str, "bounce_interval=", 16) == 0))
1815 bounce_interval = simple_strtol(str + 16, NULL, 0);
1816 if ((strncmp(str, "idle-threshold=", 15) == 0) ||
1817 (strncmp(str, "idle_threshold=", 15) == 0))
1818 idle_threshold = simple_strtol(str + 15, NULL, 0);
1819 if ((strncmp(str, "idle-period=", 12) == 0) ||
1820 (strncmp(str, "idle_period=", 12) == 0))
1821 idle_period = simple_strtol(str + 12, NULL, 0);
1822 invert = (strncmp(str, "no-", 3) == 0) ||
1823 (strncmp(str, "no_", 3) == 0);
1824 if (invert)
1825 str += 3;
1826 if (strncmp(str, "debug", 5) == 0)
1827 debug = !invert;
1828 if ((strncmp(str, "power-off", 9) == 0) ||
1829 (strncmp(str, "power_off", 9) == 0))
1830 power_off = !invert;
1831 if (strncmp(str, "smp", 3) == 0)
1832 {
1833 smp = !invert;
1834 idle_threshold = 100;
1835 }
1836 if ((strncmp(str, "allow-ints", 10) == 0) ||
1837 (strncmp(str, "allow_ints", 10) == 0))
1838 apm_info.allow_ints = !invert;
1839 if ((strncmp(str, "broken-psr", 10) == 0) ||
1840 (strncmp(str, "broken_psr", 10) == 0))
1841 apm_info.get_power_status_broken = !invert;
1842 if ((strncmp(str, "realmode-power-off", 18) == 0) ||
1843 (strncmp(str, "realmode_power_off", 18) == 0))
1844 apm_info.realmode_power_off = !invert;
1845 str = strchr(str, ',');
1846 if (str != NULL)
1847 str += strspn(str, ", \t");
1848 }
1849 return 1;
1850}
1851
1852__setup("apm=", apm_setup);
1853#endif
1854
1855static const struct file_operations apm_bios_fops = {
1856 .owner = THIS_MODULE,
1857 .read = do_read,
1858 .poll = do_poll,
1859 .ioctl = do_ioctl,
1860 .open = do_open,
1861 .release = do_release,
1862};
1863
1864static struct miscdevice apm_device = {
1865 APM_MINOR_DEV,
1866 "apm_bios",
1867 &apm_bios_fops
1868};
1869
1870
1871/* Simple "print if true" callback */
1872static int __init print_if_true(struct dmi_system_id *d)
1873{
1874 printk("%s\n", d->ident);
1875 return 0;
1876}
1877
1878/*
1879 * Some Bioses enable the PS/2 mouse (touchpad) at resume, even if it was
1880 * disabled before the suspend. Linux used to get terribly confused by that.
1881 */
1882static int __init broken_ps2_resume(struct dmi_system_id *d)
1883{
1884 printk(KERN_INFO "%s machine detected. Mousepad Resume Bug workaround hopefully not needed.\n", d->ident);
1885 return 0;
1886}
1887
1888/* Some bioses have a broken protected mode poweroff and need to use realmode */
1889static int __init set_realmode_power_off(struct dmi_system_id *d)
1890{
1891 if (apm_info.realmode_power_off == 0) {
1892 apm_info.realmode_power_off = 1;
1893 printk(KERN_INFO "%s bios detected. Using realmode poweroff only.\n", d->ident);
1894 }
1895 return 0;
1896}
1897
1898/* Some laptops require interrupts to be enabled during APM calls */
1899static int __init set_apm_ints(struct dmi_system_id *d)
1900{
1901 if (apm_info.allow_ints == 0) {
1902 apm_info.allow_ints = 1;
1903 printk(KERN_INFO "%s machine detected. Enabling interrupts during APM calls.\n", d->ident);
1904 }
1905 return 0;
1906}
1907
1908/* Some APM bioses corrupt memory or just plain do not work */
1909static int __init apm_is_horked(struct dmi_system_id *d)
1910{
1911 if (apm_info.disabled == 0) {
1912 apm_info.disabled = 1;
1913 printk(KERN_INFO "%s machine detected. Disabling APM.\n", d->ident);
1914 }
1915 return 0;
1916}
1917
1918static int __init apm_is_horked_d850md(struct dmi_system_id *d)
1919{
1920 if (apm_info.disabled == 0) {
1921 apm_info.disabled = 1;
1922 printk(KERN_INFO "%s machine detected. Disabling APM.\n", d->ident);
1923 printk(KERN_INFO "This bug is fixed in bios P15 which is available for \n");
1924 printk(KERN_INFO "download from support.intel.com \n");
1925 }
1926 return 0;
1927}
1928
1929/* Some APM bioses hang on APM idle calls */
1930static int __init apm_likes_to_melt(struct dmi_system_id *d)
1931{
1932 if (apm_info.forbid_idle == 0) {
1933 apm_info.forbid_idle = 1;
1934 printk(KERN_INFO "%s machine detected. Disabling APM idle calls.\n", d->ident);
1935 }
1936 return 0;
1937}
1938
1939/*
1940 * Check for clue free BIOS implementations who use
1941 * the following QA technique
1942 *
1943 * [ Write BIOS Code ]<------
1944 * | ^
1945 * < Does it Compile >----N--
1946 * |Y ^
1947 * < Does it Boot Win98 >-N--
1948 * |Y
1949 * [Ship It]
1950 *
1951 * Phoenix A04 08/24/2000 is known bad (Dell Inspiron 5000e)
1952 * Phoenix A07 09/29/2000 is known good (Dell Inspiron 5000)
1953 */
1954static int __init broken_apm_power(struct dmi_system_id *d)
1955{
1956 apm_info.get_power_status_broken = 1;
1957 printk(KERN_WARNING "BIOS strings suggest APM bugs, disabling power status reporting.\n");
1958 return 0;
1959}
1960
1961/*
1962 * This bios swaps the APM minute reporting bytes over (Many sony laptops
1963 * have this problem).
1964 */
1965static int __init swab_apm_power_in_minutes(struct dmi_system_id *d)
1966{
1967 apm_info.get_power_status_swabinminutes = 1;
1968 printk(KERN_WARNING "BIOS strings suggest APM reports battery life in minutes and wrong byte order.\n");
1969 return 0;
1970}
1971
1972static struct dmi_system_id __initdata apm_dmi_table[] = {
1973 {
1974 print_if_true,
1975 KERN_WARNING "IBM T23 - BIOS 1.03b+ and controller firmware 1.02+ may be needed for Linux APM.",
1976 { DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
1977 DMI_MATCH(DMI_BIOS_VERSION, "1AET38WW (1.01b)"), },
1978 },
1979 { /* Handle problems with APM on the C600 */
1980 broken_ps2_resume, "Dell Latitude C600",
1981 { DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
1982 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude C600"), },
1983 },
1984 { /* Allow interrupts during suspend on Dell Latitude laptops*/
1985 set_apm_ints, "Dell Latitude",
1986 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1987 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude C510"), }
1988 },
1989 { /* APM crashes */
1990 apm_is_horked, "Dell Inspiron 2500",
1991 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1992 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 2500"),
1993 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
1994 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
1995 },
1996 { /* Allow interrupts during suspend on Dell Inspiron laptops*/
1997 set_apm_ints, "Dell Inspiron", {
1998 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1999 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 4000"), },
2000 },
2001 { /* Handle problems with APM on Inspiron 5000e */
2002 broken_apm_power, "Dell Inspiron 5000e",
2003 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2004 DMI_MATCH(DMI_BIOS_VERSION, "A04"),
2005 DMI_MATCH(DMI_BIOS_DATE, "08/24/2000"), },
2006 },
2007 { /* Handle problems with APM on Inspiron 2500 */
2008 broken_apm_power, "Dell Inspiron 2500",
2009 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2010 DMI_MATCH(DMI_BIOS_VERSION, "A12"),
2011 DMI_MATCH(DMI_BIOS_DATE, "02/04/2002"), },
2012 },
2013 { /* APM crashes */
2014 apm_is_horked, "Dell Dimension 4100",
2015 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
2016 DMI_MATCH(DMI_PRODUCT_NAME, "XPS-Z"),
2017 DMI_MATCH(DMI_BIOS_VENDOR,"Intel Corp."),
2018 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
2019 },
2020 { /* Allow interrupts during suspend on Compaq Laptops*/
2021 set_apm_ints, "Compaq 12XL125",
2022 { DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
2023 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq PC"),
2024 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2025 DMI_MATCH(DMI_BIOS_VERSION,"4.06"), },
2026 },
2027 { /* Allow interrupts during APM or the clock goes slow */
2028 set_apm_ints, "ASUSTeK",
2029 { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
2030 DMI_MATCH(DMI_PRODUCT_NAME, "L8400K series Notebook PC"), },
2031 },
2032 { /* APM blows on shutdown */
2033 apm_is_horked, "ABIT KX7-333[R]",
2034 { DMI_MATCH(DMI_BOARD_VENDOR, "ABIT"),
2035 DMI_MATCH(DMI_BOARD_NAME, "VT8367-8233A (KX7-333[R])"), },
2036 },
2037 { /* APM crashes */
2038 apm_is_horked, "Trigem Delhi3",
2039 { DMI_MATCH(DMI_SYS_VENDOR, "TriGem Computer, Inc"),
2040 DMI_MATCH(DMI_PRODUCT_NAME, "Delhi3"), },
2041 },
2042 { /* APM crashes */
2043 apm_is_horked, "Fujitsu-Siemens",
2044 { DMI_MATCH(DMI_BIOS_VENDOR, "hoenix/FUJITSU SIEMENS"),
2045 DMI_MATCH(DMI_BIOS_VERSION, "Version1.01"), },
2046 },
2047 { /* APM crashes */
2048 apm_is_horked_d850md, "Intel D850MD",
2049 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2050 DMI_MATCH(DMI_BIOS_VERSION, "MV85010A.86A.0016.P07.0201251536"), },
2051 },
2052 { /* APM crashes */
2053 apm_is_horked, "Intel D810EMO",
2054 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2055 DMI_MATCH(DMI_BIOS_VERSION, "MO81010A.86A.0008.P04.0004170800"), },
2056 },
2057 { /* APM crashes */
2058 apm_is_horked, "Dell XPS-Z",
2059 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2060 DMI_MATCH(DMI_BIOS_VERSION, "A11"),
2061 DMI_MATCH(DMI_PRODUCT_NAME, "XPS-Z"), },
2062 },
2063 { /* APM crashes */
2064 apm_is_horked, "Sharp PC-PJ/AX",
2065 { DMI_MATCH(DMI_SYS_VENDOR, "SHARP"),
2066 DMI_MATCH(DMI_PRODUCT_NAME, "PC-PJ/AX"),
2067 DMI_MATCH(DMI_BIOS_VENDOR,"SystemSoft"),
2068 DMI_MATCH(DMI_BIOS_VERSION,"Version R2.08"), },
2069 },
2070 { /* APM crashes */
2071 apm_is_horked, "Dell Inspiron 2500",
2072 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
2073 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 2500"),
2074 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
2075 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
2076 },
2077 { /* APM idle hangs */
2078 apm_likes_to_melt, "Jabil AMD",
2079 { DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
2080 DMI_MATCH(DMI_BIOS_VERSION, "0AASNP06"), },
2081 },
2082 { /* APM idle hangs */
2083 apm_likes_to_melt, "AMI Bios",
2084 { DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
2085 DMI_MATCH(DMI_BIOS_VERSION, "0AASNP05"), },
2086 },
2087 { /* Handle problems with APM on Sony Vaio PCG-N505X(DE) */
2088 swab_apm_power_in_minutes, "Sony VAIO",
2089 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2090 DMI_MATCH(DMI_BIOS_VERSION, "R0206H"),
2091 DMI_MATCH(DMI_BIOS_DATE, "08/23/99"), },
2092 },
2093 { /* Handle problems with APM on Sony Vaio PCG-N505VX */
2094 swab_apm_power_in_minutes, "Sony VAIO",
2095 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2096 DMI_MATCH(DMI_BIOS_VERSION, "W2K06H0"),
2097 DMI_MATCH(DMI_BIOS_DATE, "02/03/00"), },
2098 },
2099 { /* Handle problems with APM on Sony Vaio PCG-XG29 */
2100 swab_apm_power_in_minutes, "Sony VAIO",
2101 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2102 DMI_MATCH(DMI_BIOS_VERSION, "R0117A0"),
2103 DMI_MATCH(DMI_BIOS_DATE, "04/25/00"), },
2104 },
2105 { /* Handle problems with APM on Sony Vaio PCG-Z600NE */
2106 swab_apm_power_in_minutes, "Sony VAIO",
2107 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2108 DMI_MATCH(DMI_BIOS_VERSION, "R0121Z1"),
2109 DMI_MATCH(DMI_BIOS_DATE, "05/11/00"), },
2110 },
2111 { /* Handle problems with APM on Sony Vaio PCG-Z600NE */
2112 swab_apm_power_in_minutes, "Sony VAIO",
2113 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2114 DMI_MATCH(DMI_BIOS_VERSION, "WME01Z1"),
2115 DMI_MATCH(DMI_BIOS_DATE, "08/11/00"), },
2116 },
2117 { /* Handle problems with APM on Sony Vaio PCG-Z600LEK(DE) */
2118 swab_apm_power_in_minutes, "Sony VAIO",
2119 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2120 DMI_MATCH(DMI_BIOS_VERSION, "R0206Z3"),
2121 DMI_MATCH(DMI_BIOS_DATE, "12/25/00"), },
2122 },
2123 { /* Handle problems with APM on Sony Vaio PCG-Z505LS */
2124 swab_apm_power_in_minutes, "Sony VAIO",
2125 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2126 DMI_MATCH(DMI_BIOS_VERSION, "R0203D0"),
2127 DMI_MATCH(DMI_BIOS_DATE, "05/12/00"), },
2128 },
2129 { /* Handle problems with APM on Sony Vaio PCG-Z505LS */
2130 swab_apm_power_in_minutes, "Sony VAIO",
2131 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2132 DMI_MATCH(DMI_BIOS_VERSION, "R0203Z3"),
2133 DMI_MATCH(DMI_BIOS_DATE, "08/25/00"), },
2134 },
2135 { /* Handle problems with APM on Sony Vaio PCG-Z505LS (with updated BIOS) */
2136 swab_apm_power_in_minutes, "Sony VAIO",
2137 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2138 DMI_MATCH(DMI_BIOS_VERSION, "R0209Z3"),
2139 DMI_MATCH(DMI_BIOS_DATE, "05/12/01"), },
2140 },
2141 { /* Handle problems with APM on Sony Vaio PCG-F104K */
2142 swab_apm_power_in_minutes, "Sony VAIO",
2143 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2144 DMI_MATCH(DMI_BIOS_VERSION, "R0204K2"),
2145 DMI_MATCH(DMI_BIOS_DATE, "08/28/00"), },
2146 },
2147
2148 { /* Handle problems with APM on Sony Vaio PCG-C1VN/C1VE */
2149 swab_apm_power_in_minutes, "Sony VAIO",
2150 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2151 DMI_MATCH(DMI_BIOS_VERSION, "R0208P1"),
2152 DMI_MATCH(DMI_BIOS_DATE, "11/09/00"), },
2153 },
2154 { /* Handle problems with APM on Sony Vaio PCG-C1VE */
2155 swab_apm_power_in_minutes, "Sony VAIO",
2156 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2157 DMI_MATCH(DMI_BIOS_VERSION, "R0204P1"),
2158 DMI_MATCH(DMI_BIOS_DATE, "09/12/00"), },
2159 },
2160 { /* Handle problems with APM on Sony Vaio PCG-C1VE */
2161 swab_apm_power_in_minutes, "Sony VAIO",
2162 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2163 DMI_MATCH(DMI_BIOS_VERSION, "WXPO1Z3"),
2164 DMI_MATCH(DMI_BIOS_DATE, "10/26/01"), },
2165 },
2166 { /* broken PM poweroff bios */
2167 set_realmode_power_off, "Award Software v4.60 PGMA",
2168 { DMI_MATCH(DMI_BIOS_VENDOR, "Award Software International, Inc."),
2169 DMI_MATCH(DMI_BIOS_VERSION, "4.60 PGMA"),
2170 DMI_MATCH(DMI_BIOS_DATE, "134526184"), },
2171 },
2172
2173 /* Generic per vendor APM settings */
2174
2175 { /* Allow interrupts during suspend on IBM laptops */
2176 set_apm_ints, "IBM",
2177 { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
2178 },
2179
2180 { }
2181};
2182
2183/*
2184 * Just start the APM thread. We do NOT want to do APM BIOS
2185 * calls from anything but the APM thread, if for no other reason
2186 * than the fact that we don't trust the APM BIOS. This way,
2187 * most common APM BIOS problems that lead to protection errors
2188 * etc will have at least some level of being contained...
2189 *
2190 * In short, if something bad happens, at least we have a choice
2191 * of just killing the apm thread..
2192 */
2193static int __init apm_init(void)
2194{
2195 struct proc_dir_entry *apm_proc;
2196 struct desc_struct *gdt;
2197 int err;
2198
2199 dmi_check_system(apm_dmi_table);
2200
2201 if (apm_info.bios.version == 0 || paravirt_enabled()) {
2202 printk(KERN_INFO "apm: BIOS not found.\n");
2203 return -ENODEV;
2204 }
2205 printk(KERN_INFO
2206 "apm: BIOS version %d.%d Flags 0x%02x (Driver version %s)\n",
2207 ((apm_info.bios.version >> 8) & 0xff),
2208 (apm_info.bios.version & 0xff),
2209 apm_info.bios.flags,
2210 driver_version);
2211 if ((apm_info.bios.flags & APM_32_BIT_SUPPORT) == 0) {
2212 printk(KERN_INFO "apm: no 32 bit BIOS support\n");
2213 return -ENODEV;
2214 }
2215
2216 if (allow_ints)
2217 apm_info.allow_ints = 1;
2218 if (broken_psr)
2219 apm_info.get_power_status_broken = 1;
2220 if (realmode_power_off)
2221 apm_info.realmode_power_off = 1;
2222 /* User can override, but default is to trust DMI */
2223 if (apm_disabled != -1)
2224 apm_info.disabled = apm_disabled;
2225
2226 /*
2227 * Fix for the Compaq Contura 3/25c which reports BIOS version 0.1
2228 * but is reportedly a 1.0 BIOS.
2229 */
2230 if (apm_info.bios.version == 0x001)
2231 apm_info.bios.version = 0x100;
2232
2233 /* BIOS < 1.2 doesn't set cseg_16_len */
2234 if (apm_info.bios.version < 0x102)
2235 apm_info.bios.cseg_16_len = 0; /* 64k */
2236
2237 if (debug) {
2238 printk(KERN_INFO "apm: entry %x:%x cseg16 %x dseg %x",
2239 apm_info.bios.cseg, apm_info.bios.offset,
2240 apm_info.bios.cseg_16, apm_info.bios.dseg);
2241 if (apm_info.bios.version > 0x100)
2242 printk(" cseg len %x, dseg len %x",
2243 apm_info.bios.cseg_len,
2244 apm_info.bios.dseg_len);
2245 if (apm_info.bios.version > 0x101)
2246 printk(" cseg16 len %x", apm_info.bios.cseg_16_len);
2247 printk("\n");
2248 }
2249
2250 if (apm_info.disabled) {
2251 printk(KERN_NOTICE "apm: disabled on user request.\n");
2252 return -ENODEV;
2253 }
2254 if ((num_online_cpus() > 1) && !power_off && !smp) {
2255 printk(KERN_NOTICE "apm: disabled - APM is not SMP safe.\n");
2256 apm_info.disabled = 1;
2257 return -ENODEV;
2258 }
2259 if (PM_IS_ACTIVE()) {
2260 printk(KERN_NOTICE "apm: overridden by ACPI.\n");
2261 apm_info.disabled = 1;
2262 return -ENODEV;
2263 }
2264#ifdef CONFIG_PM_LEGACY
2265 pm_active = 1;
2266#endif
2267
2268 /*
2269 * Set up a segment that references the real mode segment 0x40
2270 * that extends up to the end of page zero (that we have reserved).
2271 * This is for buggy BIOS's that refer to (real mode) segment 0x40
2272 * even though they are called in protected mode.
2273 */
2274 set_base(bad_bios_desc, __va((unsigned long)0x40 << 4));
2275 _set_limit((char *)&bad_bios_desc, 4095 - (0x40 << 4));
2276
2277 /*
2278 * Set up the long jump entry point to the APM BIOS, which is called
2279 * from inline assembly.
2280 */
2281 apm_bios_entry.offset = apm_info.bios.offset;
2282 apm_bios_entry.segment = APM_CS;
2283
2284 /*
2285 * The APM 1.1 BIOS is supposed to provide limit information that it
2286 * recognizes. Many machines do this correctly, but many others do
2287 * not restrict themselves to their claimed limit. When this happens,
2288 * they will cause a segmentation violation in the kernel at boot time.
2289 * Most BIOS's, however, will respect a 64k limit, so we use that.
2290 *
2291 * Note we only set APM segments on CPU zero, since we pin the APM
2292 * code to that CPU.
2293 */
2294 gdt = get_cpu_gdt_table(0);
2295 set_base(gdt[APM_CS >> 3],
2296 __va((unsigned long)apm_info.bios.cseg << 4));
2297 set_base(gdt[APM_CS_16 >> 3],
2298 __va((unsigned long)apm_info.bios.cseg_16 << 4));
2299 set_base(gdt[APM_DS >> 3],
2300 __va((unsigned long)apm_info.bios.dseg << 4));
2301
2302 apm_proc = create_proc_entry("apm", 0, NULL);
2303 if (apm_proc)
2304 apm_proc->proc_fops = &apm_file_ops;
2305
2306 kapmd_task = kthread_create(apm, NULL, "kapmd");
2307 if (IS_ERR(kapmd_task)) {
2308 printk(KERN_ERR "apm: disabled - Unable to start kernel "
2309 "thread.\n");
2310 err = PTR_ERR(kapmd_task);
2311 kapmd_task = NULL;
2312 remove_proc_entry("apm", NULL);
2313 return err;
2314 }
2315 wake_up_process(kapmd_task);
2316
2317 if (num_online_cpus() > 1 && !smp ) {
2318 printk(KERN_NOTICE
2319 "apm: disabled - APM is not SMP safe (power off active).\n");
2320 return 0;
2321 }
2322
2323 /*
2324 * Note we don't actually care if the misc_device cannot be registered.
2325 * this driver can do its job without it, even if userspace can't
2326 * control it. just log the error
2327 */
2328 if (misc_register(&apm_device))
2329 printk(KERN_WARNING "apm: Could not register misc device.\n");
2330
2331 if (HZ != 100)
2332 idle_period = (idle_period * HZ) / 100;
2333 if (idle_threshold < 100) {
2334 original_pm_idle = pm_idle;
2335 pm_idle = apm_cpu_idle;
2336 set_pm_idle = 1;
2337 }
2338
2339 return 0;
2340}
2341
2342static void __exit apm_exit(void)
2343{
2344 int error;
2345
2346 if (set_pm_idle) {
2347 pm_idle = original_pm_idle;
2348 /*
2349 * We are about to unload the current idle thread pm callback
2350 * (pm_idle), Wait for all processors to update cached/local
2351 * copies of pm_idle before proceeding.
2352 */
2353 cpu_idle_wait();
2354 }
2355 if (((apm_info.bios.flags & APM_BIOS_DISENGAGED) == 0)
2356 && (apm_info.connection_version > 0x0100)) {
2357 error = apm_engage_power_management(APM_DEVICE_ALL, 0);
2358 if (error)
2359 apm_error("disengage power management", error);
2360 }
2361 misc_deregister(&apm_device);
2362 remove_proc_entry("apm", NULL);
2363 if (power_off)
2364 pm_power_off = NULL;
2365 if (kapmd_task) {
2366 kthread_stop(kapmd_task);
2367 kapmd_task = NULL;
2368 }
2369#ifdef CONFIG_PM_LEGACY
2370 pm_active = 0;
2371#endif
2372}
2373
2374module_init(apm_init);
2375module_exit(apm_exit);
2376
2377MODULE_AUTHOR("Stephen Rothwell");
2378MODULE_DESCRIPTION("Advanced Power Management");
2379MODULE_LICENSE("GPL");
2380module_param(debug, bool, 0644);
2381MODULE_PARM_DESC(debug, "Enable debug mode");
2382module_param(power_off, bool, 0444);
2383MODULE_PARM_DESC(power_off, "Enable power off");
2384module_param(bounce_interval, int, 0444);
2385MODULE_PARM_DESC(bounce_interval,
2386 "Set the number of ticks to ignore suspend bounces");
2387module_param(allow_ints, bool, 0444);
2388MODULE_PARM_DESC(allow_ints, "Allow interrupts during BIOS calls");
2389module_param(broken_psr, bool, 0444);
2390MODULE_PARM_DESC(broken_psr, "BIOS has a broken GetPowerStatus call");
2391module_param(realmode_power_off, bool, 0444);
2392MODULE_PARM_DESC(realmode_power_off,
2393 "Switch to real mode before powering off");
2394module_param(idle_threshold, int, 0444);
2395MODULE_PARM_DESC(idle_threshold,
2396 "System idle percentage above which to make APM BIOS idle calls");
2397module_param(idle_period, int, 0444);
2398MODULE_PARM_DESC(idle_period,
2399 "Period (in sec/100) over which to caculate the idle percentage");
2400module_param(smp, bool, 0444);
2401MODULE_PARM_DESC(smp,
2402 "Set this to enable APM use on an SMP platform. Use with caution on older systems");
2403MODULE_ALIAS_MISCDEV(APM_MINOR_DEV);
diff --git a/arch/i386/kernel/asm-offsets.c b/arch/i386/kernel/asm-offsets.c
deleted file mode 100644
index 7288ac88d746..000000000000
--- a/arch/i386/kernel/asm-offsets.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * Generate definitions needed by assembly language modules.
3 * This code generates raw asm output which is post-processed
4 * to extract and format the required data.
5 */
6
7#include <linux/crypto.h>
8#include <linux/sched.h>
9#include <linux/signal.h>
10#include <linux/personality.h>
11#include <linux/suspend.h>
12#include <asm/ucontext.h>
13#include "sigframe.h"
14#include <asm/pgtable.h>
15#include <asm/fixmap.h>
16#include <asm/processor.h>
17#include <asm/thread_info.h>
18#include <asm/elf.h>
19
20#include <xen/interface/xen.h>
21
22#ifdef CONFIG_LGUEST_GUEST
23#include <linux/lguest.h>
24#include "../../../drivers/lguest/lg.h"
25#endif
26
27#define DEFINE(sym, val) \
28 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
29
30#define BLANK() asm volatile("\n->" : : )
31
32#define OFFSET(sym, str, mem) \
33 DEFINE(sym, offsetof(struct str, mem));
34
35/* workaround for a warning with -Wmissing-prototypes */
36void foo(void);
37
38void foo(void)
39{
40 OFFSET(SIGCONTEXT_eax, sigcontext, eax);
41 OFFSET(SIGCONTEXT_ebx, sigcontext, ebx);
42 OFFSET(SIGCONTEXT_ecx, sigcontext, ecx);
43 OFFSET(SIGCONTEXT_edx, sigcontext, edx);
44 OFFSET(SIGCONTEXT_esi, sigcontext, esi);
45 OFFSET(SIGCONTEXT_edi, sigcontext, edi);
46 OFFSET(SIGCONTEXT_ebp, sigcontext, ebp);
47 OFFSET(SIGCONTEXT_esp, sigcontext, esp);
48 OFFSET(SIGCONTEXT_eip, sigcontext, eip);
49 BLANK();
50
51 OFFSET(CPUINFO_x86, cpuinfo_x86, x86);
52 OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);
53 OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);
54 OFFSET(CPUINFO_x86_mask, cpuinfo_x86, x86_mask);
55 OFFSET(CPUINFO_hard_math, cpuinfo_x86, hard_math);
56 OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);
57 OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);
58 OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);
59 BLANK();
60
61 OFFSET(TI_task, thread_info, task);
62 OFFSET(TI_exec_domain, thread_info, exec_domain);
63 OFFSET(TI_flags, thread_info, flags);
64 OFFSET(TI_status, thread_info, status);
65 OFFSET(TI_preempt_count, thread_info, preempt_count);
66 OFFSET(TI_addr_limit, thread_info, addr_limit);
67 OFFSET(TI_restart_block, thread_info, restart_block);
68 OFFSET(TI_sysenter_return, thread_info, sysenter_return);
69 OFFSET(TI_cpu, thread_info, cpu);
70 BLANK();
71
72 OFFSET(GDS_size, Xgt_desc_struct, size);
73 OFFSET(GDS_address, Xgt_desc_struct, address);
74 OFFSET(GDS_pad, Xgt_desc_struct, pad);
75 BLANK();
76
77 OFFSET(PT_EBX, pt_regs, ebx);
78 OFFSET(PT_ECX, pt_regs, ecx);
79 OFFSET(PT_EDX, pt_regs, edx);
80 OFFSET(PT_ESI, pt_regs, esi);
81 OFFSET(PT_EDI, pt_regs, edi);
82 OFFSET(PT_EBP, pt_regs, ebp);
83 OFFSET(PT_EAX, pt_regs, eax);
84 OFFSET(PT_DS, pt_regs, xds);
85 OFFSET(PT_ES, pt_regs, xes);
86 OFFSET(PT_FS, pt_regs, xfs);
87 OFFSET(PT_ORIG_EAX, pt_regs, orig_eax);
88 OFFSET(PT_EIP, pt_regs, eip);
89 OFFSET(PT_CS, pt_regs, xcs);
90 OFFSET(PT_EFLAGS, pt_regs, eflags);
91 OFFSET(PT_OLDESP, pt_regs, esp);
92 OFFSET(PT_OLDSS, pt_regs, xss);
93 BLANK();
94
95 OFFSET(EXEC_DOMAIN_handler, exec_domain, handler);
96 OFFSET(RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);
97 BLANK();
98
99 OFFSET(pbe_address, pbe, address);
100 OFFSET(pbe_orig_address, pbe, orig_address);
101 OFFSET(pbe_next, pbe, next);
102
103 /* Offset from the sysenter stack to tss.esp0 */
104 DEFINE(TSS_sysenter_esp0, offsetof(struct tss_struct, x86_tss.esp0) -
105 sizeof(struct tss_struct));
106
107 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
108 DEFINE(PAGE_SHIFT_asm, PAGE_SHIFT);
109 DEFINE(PTRS_PER_PTE, PTRS_PER_PTE);
110 DEFINE(PTRS_PER_PMD, PTRS_PER_PMD);
111 DEFINE(PTRS_PER_PGD, PTRS_PER_PGD);
112
113 DEFINE(VDSO_PRELINK_asm, VDSO_PRELINK);
114
115 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
116
117#ifdef CONFIG_PARAVIRT
118 BLANK();
119 OFFSET(PARAVIRT_enabled, paravirt_ops, paravirt_enabled);
120 OFFSET(PARAVIRT_irq_disable, paravirt_ops, irq_disable);
121 OFFSET(PARAVIRT_irq_enable, paravirt_ops, irq_enable);
122 OFFSET(PARAVIRT_irq_enable_sysexit, paravirt_ops, irq_enable_sysexit);
123 OFFSET(PARAVIRT_iret, paravirt_ops, iret);
124 OFFSET(PARAVIRT_read_cr0, paravirt_ops, read_cr0);
125#endif
126
127#ifdef CONFIG_XEN
128 BLANK();
129 OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
130 OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
131#endif
132
133#ifdef CONFIG_LGUEST_GUEST
134 BLANK();
135 OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled);
136 OFFSET(LGUEST_PAGES_host_gdt_desc, lguest_pages, state.host_gdt_desc);
137 OFFSET(LGUEST_PAGES_host_idt_desc, lguest_pages, state.host_idt_desc);
138 OFFSET(LGUEST_PAGES_host_cr3, lguest_pages, state.host_cr3);
139 OFFSET(LGUEST_PAGES_host_sp, lguest_pages, state.host_sp);
140 OFFSET(LGUEST_PAGES_guest_gdt_desc, lguest_pages,state.guest_gdt_desc);
141 OFFSET(LGUEST_PAGES_guest_idt_desc, lguest_pages,state.guest_idt_desc);
142 OFFSET(LGUEST_PAGES_guest_gdt, lguest_pages, state.guest_gdt);
143 OFFSET(LGUEST_PAGES_regs_trapnum, lguest_pages, regs.trapnum);
144 OFFSET(LGUEST_PAGES_regs_errcode, lguest_pages, regs.errcode);
145 OFFSET(LGUEST_PAGES_regs, lguest_pages, regs);
146#endif
147}
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
deleted file mode 100644
index 705e13a30781..000000000000
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ /dev/null
@@ -1,799 +0,0 @@
1/*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/smp.h>
32#include <linux/sched.h>
33#include <linux/cpufreq.h>
34#include <linux/compiler.h>
35#include <linux/dmi.h>
36
37#include <linux/acpi.h>
38#include <acpi/processor.h>
39
40#include <asm/io.h>
41#include <asm/msr.h>
42#include <asm/processor.h>
43#include <asm/cpufeature.h>
44#include <asm/delay.h>
45#include <asm/uaccess.h>
46
47#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
48
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
53enum {
54 UNDEFINED_CAPABLE = 0,
55 SYSTEM_INTEL_MSR_CAPABLE,
56 SYSTEM_IO_CAPABLE,
57};
58
59#define INTEL_MSR_RANGE (0xffff)
60#define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
61
62struct acpi_cpufreq_data {
63 struct acpi_processor_performance *acpi_data;
64 struct cpufreq_frequency_table *freq_table;
65 unsigned int max_freq;
66 unsigned int resume;
67 unsigned int cpu_feature;
68};
69
70static struct acpi_cpufreq_data *drv_data[NR_CPUS];
71/* acpi_perf_data is a pointer to percpu data. */
72static struct acpi_processor_performance *acpi_perf_data;
73
74static struct cpufreq_driver acpi_cpufreq_driver;
75
76static unsigned int acpi_pstate_strict;
77
78static int check_est_cpu(unsigned int cpuid)
79{
80 struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
81
82 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
83 !cpu_has(cpu, X86_FEATURE_EST))
84 return 0;
85
86 return 1;
87}
88
89static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
90{
91 struct acpi_processor_performance *perf;
92 int i;
93
94 perf = data->acpi_data;
95
96 for (i=0; i<perf->state_count; i++) {
97 if (value == perf->states[i].status)
98 return data->freq_table[i].frequency;
99 }
100 return 0;
101}
102
103static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
104{
105 int i;
106 struct acpi_processor_performance *perf;
107
108 msr &= INTEL_MSR_RANGE;
109 perf = data->acpi_data;
110
111 for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
112 if (msr == perf->states[data->freq_table[i].index].status)
113 return data->freq_table[i].frequency;
114 }
115 return data->freq_table[0].frequency;
116}
117
118static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
119{
120 switch (data->cpu_feature) {
121 case SYSTEM_INTEL_MSR_CAPABLE:
122 return extract_msr(val, data);
123 case SYSTEM_IO_CAPABLE:
124 return extract_io(val, data);
125 default:
126 return 0;
127 }
128}
129
130struct msr_addr {
131 u32 reg;
132};
133
134struct io_addr {
135 u16 port;
136 u8 bit_width;
137};
138
139typedef union {
140 struct msr_addr msr;
141 struct io_addr io;
142} drv_addr_union;
143
144struct drv_cmd {
145 unsigned int type;
146 cpumask_t mask;
147 drv_addr_union addr;
148 u32 val;
149};
150
151static void do_drv_read(struct drv_cmd *cmd)
152{
153 u32 h;
154
155 switch (cmd->type) {
156 case SYSTEM_INTEL_MSR_CAPABLE:
157 rdmsr(cmd->addr.msr.reg, cmd->val, h);
158 break;
159 case SYSTEM_IO_CAPABLE:
160 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
161 &cmd->val,
162 (u32)cmd->addr.io.bit_width);
163 break;
164 default:
165 break;
166 }
167}
168
169static void do_drv_write(struct drv_cmd *cmd)
170{
171 u32 lo, hi;
172
173 switch (cmd->type) {
174 case SYSTEM_INTEL_MSR_CAPABLE:
175 rdmsr(cmd->addr.msr.reg, lo, hi);
176 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
177 wrmsr(cmd->addr.msr.reg, lo, hi);
178 break;
179 case SYSTEM_IO_CAPABLE:
180 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
181 cmd->val,
182 (u32)cmd->addr.io.bit_width);
183 break;
184 default:
185 break;
186 }
187}
188
189static void drv_read(struct drv_cmd *cmd)
190{
191 cpumask_t saved_mask = current->cpus_allowed;
192 cmd->val = 0;
193
194 set_cpus_allowed(current, cmd->mask);
195 do_drv_read(cmd);
196 set_cpus_allowed(current, saved_mask);
197}
198
199static void drv_write(struct drv_cmd *cmd)
200{
201 cpumask_t saved_mask = current->cpus_allowed;
202 unsigned int i;
203
204 for_each_cpu_mask(i, cmd->mask) {
205 set_cpus_allowed(current, cpumask_of_cpu(i));
206 do_drv_write(cmd);
207 }
208
209 set_cpus_allowed(current, saved_mask);
210 return;
211}
212
213static u32 get_cur_val(cpumask_t mask)
214{
215 struct acpi_processor_performance *perf;
216 struct drv_cmd cmd;
217
218 if (unlikely(cpus_empty(mask)))
219 return 0;
220
221 switch (drv_data[first_cpu(mask)]->cpu_feature) {
222 case SYSTEM_INTEL_MSR_CAPABLE:
223 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
224 cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
225 break;
226 case SYSTEM_IO_CAPABLE:
227 cmd.type = SYSTEM_IO_CAPABLE;
228 perf = drv_data[first_cpu(mask)]->acpi_data;
229 cmd.addr.io.port = perf->control_register.address;
230 cmd.addr.io.bit_width = perf->control_register.bit_width;
231 break;
232 default:
233 return 0;
234 }
235
236 cmd.mask = mask;
237
238 drv_read(&cmd);
239
240 dprintk("get_cur_val = %u\n", cmd.val);
241
242 return cmd.val;
243}
244
245/*
246 * Return the measured active (C0) frequency on this CPU since last call
247 * to this function.
248 * Input: cpu number
249 * Return: Average CPU frequency in terms of max frequency (zero on error)
250 *
251 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
252 * over a period of time, while CPU is in C0 state.
253 * IA32_MPERF counts at the rate of max advertised frequency
254 * IA32_APERF counts at the rate of actual CPU frequency
255 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
256 * no meaning should be associated with absolute values of these MSRs.
257 */
258static unsigned int get_measured_perf(unsigned int cpu)
259{
260 union {
261 struct {
262 u32 lo;
263 u32 hi;
264 } split;
265 u64 whole;
266 } aperf_cur, mperf_cur;
267
268 cpumask_t saved_mask;
269 unsigned int perf_percent;
270 unsigned int retval;
271
272 saved_mask = current->cpus_allowed;
273 set_cpus_allowed(current, cpumask_of_cpu(cpu));
274 if (get_cpu() != cpu) {
275 /* We were not able to run on requested processor */
276 put_cpu();
277 return 0;
278 }
279
280 rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
281 rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
282
283 wrmsr(MSR_IA32_APERF, 0,0);
284 wrmsr(MSR_IA32_MPERF, 0,0);
285
286#ifdef __i386__
287 /*
288 * We dont want to do 64 bit divide with 32 bit kernel
289 * Get an approximate value. Return failure in case we cannot get
290 * an approximate value.
291 */
292 if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
293 int shift_count;
294 u32 h;
295
296 h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
297 shift_count = fls(h);
298
299 aperf_cur.whole >>= shift_count;
300 mperf_cur.whole >>= shift_count;
301 }
302
303 if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
304 int shift_count = 7;
305 aperf_cur.split.lo >>= shift_count;
306 mperf_cur.split.lo >>= shift_count;
307 }
308
309 if (aperf_cur.split.lo && mperf_cur.split.lo)
310 perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
311 else
312 perf_percent = 0;
313
314#else
315 if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
316 int shift_count = 7;
317 aperf_cur.whole >>= shift_count;
318 mperf_cur.whole >>= shift_count;
319 }
320
321 if (aperf_cur.whole && mperf_cur.whole)
322 perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
323 else
324 perf_percent = 0;
325
326#endif
327
328 retval = drv_data[cpu]->max_freq * perf_percent / 100;
329
330 put_cpu();
331 set_cpus_allowed(current, saved_mask);
332
333 dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
334 return retval;
335}
336
337static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
338{
339 struct acpi_cpufreq_data *data = drv_data[cpu];
340 unsigned int freq;
341
342 dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
343
344 if (unlikely(data == NULL ||
345 data->acpi_data == NULL || data->freq_table == NULL)) {
346 return 0;
347 }
348
349 freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
350 dprintk("cur freq = %u\n", freq);
351
352 return freq;
353}
354
355static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
356 struct acpi_cpufreq_data *data)
357{
358 unsigned int cur_freq;
359 unsigned int i;
360
361 for (i=0; i<100; i++) {
362 cur_freq = extract_freq(get_cur_val(mask), data);
363 if (cur_freq == freq)
364 return 1;
365 udelay(10);
366 }
367 return 0;
368}
369
370static int acpi_cpufreq_target(struct cpufreq_policy *policy,
371 unsigned int target_freq, unsigned int relation)
372{
373 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
374 struct acpi_processor_performance *perf;
375 struct cpufreq_freqs freqs;
376 cpumask_t online_policy_cpus;
377 struct drv_cmd cmd;
378 unsigned int next_state = 0; /* Index into freq_table */
379 unsigned int next_perf_state = 0; /* Index into perf table */
380 unsigned int i;
381 int result = 0;
382
383 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
384
385 if (unlikely(data == NULL ||
386 data->acpi_data == NULL || data->freq_table == NULL)) {
387 return -ENODEV;
388 }
389
390 perf = data->acpi_data;
391 result = cpufreq_frequency_table_target(policy,
392 data->freq_table,
393 target_freq,
394 relation, &next_state);
395 if (unlikely(result))
396 return -ENODEV;
397
398#ifdef CONFIG_HOTPLUG_CPU
399 /* cpufreq holds the hotplug lock, so we are safe from here on */
400 cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
401#else
402 online_policy_cpus = policy->cpus;
403#endif
404
405 next_perf_state = data->freq_table[next_state].index;
406 if (perf->state == next_perf_state) {
407 if (unlikely(data->resume)) {
408 dprintk("Called after resume, resetting to P%d\n",
409 next_perf_state);
410 data->resume = 0;
411 } else {
412 dprintk("Already at target state (P%d)\n",
413 next_perf_state);
414 return 0;
415 }
416 }
417
418 switch (data->cpu_feature) {
419 case SYSTEM_INTEL_MSR_CAPABLE:
420 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
421 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
422 cmd.val = (u32) perf->states[next_perf_state].control;
423 break;
424 case SYSTEM_IO_CAPABLE:
425 cmd.type = SYSTEM_IO_CAPABLE;
426 cmd.addr.io.port = perf->control_register.address;
427 cmd.addr.io.bit_width = perf->control_register.bit_width;
428 cmd.val = (u32) perf->states[next_perf_state].control;
429 break;
430 default:
431 return -ENODEV;
432 }
433
434 cpus_clear(cmd.mask);
435
436 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
437 cmd.mask = online_policy_cpus;
438 else
439 cpu_set(policy->cpu, cmd.mask);
440
441 freqs.old = perf->states[perf->state].core_frequency * 1000;
442 freqs.new = data->freq_table[next_state].frequency;
443 for_each_cpu_mask(i, cmd.mask) {
444 freqs.cpu = i;
445 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
446 }
447
448 drv_write(&cmd);
449
450 if (acpi_pstate_strict) {
451 if (!check_freqs(cmd.mask, freqs.new, data)) {
452 dprintk("acpi_cpufreq_target failed (%d)\n",
453 policy->cpu);
454 return -EAGAIN;
455 }
456 }
457
458 for_each_cpu_mask(i, cmd.mask) {
459 freqs.cpu = i;
460 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
461 }
462 perf->state = next_perf_state;
463
464 return result;
465}
466
467static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
468{
469 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
470
471 dprintk("acpi_cpufreq_verify\n");
472
473 return cpufreq_frequency_table_verify(policy, data->freq_table);
474}
475
476static unsigned long
477acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
478{
479 struct acpi_processor_performance *perf = data->acpi_data;
480
481 if (cpu_khz) {
482 /* search the closest match to cpu_khz */
483 unsigned int i;
484 unsigned long freq;
485 unsigned long freqn = perf->states[0].core_frequency * 1000;
486
487 for (i=0; i<(perf->state_count-1); i++) {
488 freq = freqn;
489 freqn = perf->states[i+1].core_frequency * 1000;
490 if ((2 * cpu_khz) > (freqn + freq)) {
491 perf->state = i;
492 return freq;
493 }
494 }
495 perf->state = perf->state_count-1;
496 return freqn;
497 } else {
498 /* assume CPU is at P0... */
499 perf->state = 0;
500 return perf->states[0].core_frequency * 1000;
501 }
502}
503
504/*
505 * acpi_cpufreq_early_init - initialize ACPI P-States library
506 *
507 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
508 * in order to determine correct frequency and voltage pairings. We can
509 * do _PDC and _PSD and find out the processor dependency for the
510 * actual init that will happen later...
511 */
512static int __init acpi_cpufreq_early_init(void)
513{
514 dprintk("acpi_cpufreq_early_init\n");
515
516 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
517 if (!acpi_perf_data) {
518 dprintk("Memory allocation error for acpi_perf_data.\n");
519 return -ENOMEM;
520 }
521
522 /* Do initialization in ACPI core */
523 acpi_processor_preregister_performance(acpi_perf_data);
524 return 0;
525}
526
527#ifdef CONFIG_SMP
528/*
529 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
530 * or do it in BIOS firmware and won't inform about it to OS. If not
531 * detected, this has a side effect of making CPU run at a different speed
532 * than OS intended it to run at. Detect it and handle it cleanly.
533 */
534static int bios_with_sw_any_bug;
535
536static int sw_any_bug_found(struct dmi_system_id *d)
537{
538 bios_with_sw_any_bug = 1;
539 return 0;
540}
541
542static struct dmi_system_id sw_any_bug_dmi_table[] = {
543 {
544 .callback = sw_any_bug_found,
545 .ident = "Supermicro Server X6DLP",
546 .matches = {
547 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
548 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
549 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
550 },
551 },
552 { }
553};
554#endif
555
556static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
557{
558 unsigned int i;
559 unsigned int valid_states = 0;
560 unsigned int cpu = policy->cpu;
561 struct acpi_cpufreq_data *data;
562 unsigned int result = 0;
563 struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
564 struct acpi_processor_performance *perf;
565
566 dprintk("acpi_cpufreq_cpu_init\n");
567
568 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
569 if (!data)
570 return -ENOMEM;
571
572 data->acpi_data = percpu_ptr(acpi_perf_data, cpu);
573 drv_data[cpu] = data;
574
575 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
576 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
577
578 result = acpi_processor_register_performance(data->acpi_data, cpu);
579 if (result)
580 goto err_free;
581
582 perf = data->acpi_data;
583 policy->shared_type = perf->shared_type;
584
585 /*
586 * Will let policy->cpus know about dependency only when software
587 * coordination is required.
588 */
589 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
590 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
591 policy->cpus = perf->shared_cpu_map;
592 }
593
594#ifdef CONFIG_SMP
595 dmi_check_system(sw_any_bug_dmi_table);
596 if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
597 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
598 policy->cpus = cpu_core_map[cpu];
599 }
600#endif
601
602 /* capability check */
603 if (perf->state_count <= 1) {
604 dprintk("No P-States\n");
605 result = -ENODEV;
606 goto err_unreg;
607 }
608
609 if (perf->control_register.space_id != perf->status_register.space_id) {
610 result = -ENODEV;
611 goto err_unreg;
612 }
613
614 switch (perf->control_register.space_id) {
615 case ACPI_ADR_SPACE_SYSTEM_IO:
616 dprintk("SYSTEM IO addr space\n");
617 data->cpu_feature = SYSTEM_IO_CAPABLE;
618 break;
619 case ACPI_ADR_SPACE_FIXED_HARDWARE:
620 dprintk("HARDWARE addr space\n");
621 if (!check_est_cpu(cpu)) {
622 result = -ENODEV;
623 goto err_unreg;
624 }
625 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
626 break;
627 default:
628 dprintk("Unknown addr space %d\n",
629 (u32) (perf->control_register.space_id));
630 result = -ENODEV;
631 goto err_unreg;
632 }
633
634 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
635 (perf->state_count+1), GFP_KERNEL);
636 if (!data->freq_table) {
637 result = -ENOMEM;
638 goto err_unreg;
639 }
640
641 /* detect transition latency */
642 policy->cpuinfo.transition_latency = 0;
643 for (i=0; i<perf->state_count; i++) {
644 if ((perf->states[i].transition_latency * 1000) >
645 policy->cpuinfo.transition_latency)
646 policy->cpuinfo.transition_latency =
647 perf->states[i].transition_latency * 1000;
648 }
649 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
650
651 data->max_freq = perf->states[0].core_frequency * 1000;
652 /* table init */
653 for (i=0; i<perf->state_count; i++) {
654 if (i>0 && perf->states[i].core_frequency >=
655 data->freq_table[valid_states-1].frequency / 1000)
656 continue;
657
658 data->freq_table[valid_states].index = i;
659 data->freq_table[valid_states].frequency =
660 perf->states[i].core_frequency * 1000;
661 valid_states++;
662 }
663 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
664 perf->state = 0;
665
666 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
667 if (result)
668 goto err_freqfree;
669
670 switch (perf->control_register.space_id) {
671 case ACPI_ADR_SPACE_SYSTEM_IO:
672 /* Current speed is unknown and not detectable by IO port */
673 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
674 break;
675 case ACPI_ADR_SPACE_FIXED_HARDWARE:
676 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
677 policy->cur = get_cur_freq_on_cpu(cpu);
678 break;
679 default:
680 break;
681 }
682
683 /* notify BIOS that we exist */
684 acpi_processor_notify_smm(THIS_MODULE);
685
686 /* Check for APERF/MPERF support in hardware */
687 if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
688 unsigned int ecx;
689 ecx = cpuid_ecx(6);
690 if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
691 acpi_cpufreq_driver.getavg = get_measured_perf;
692 }
693
694 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
695 for (i = 0; i < perf->state_count; i++)
696 dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
697 (i == perf->state ? '*' : ' '), i,
698 (u32) perf->states[i].core_frequency,
699 (u32) perf->states[i].power,
700 (u32) perf->states[i].transition_latency);
701
702 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
703
704 /*
705 * the first call to ->target() should result in us actually
706 * writing something to the appropriate registers.
707 */
708 data->resume = 1;
709
710 return result;
711
712err_freqfree:
713 kfree(data->freq_table);
714err_unreg:
715 acpi_processor_unregister_performance(perf, cpu);
716err_free:
717 kfree(data);
718 drv_data[cpu] = NULL;
719
720 return result;
721}
722
723static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
724{
725 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
726
727 dprintk("acpi_cpufreq_cpu_exit\n");
728
729 if (data) {
730 cpufreq_frequency_table_put_attr(policy->cpu);
731 drv_data[policy->cpu] = NULL;
732 acpi_processor_unregister_performance(data->acpi_data,
733 policy->cpu);
734 kfree(data);
735 }
736
737 return 0;
738}
739
740static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
741{
742 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
743
744 dprintk("acpi_cpufreq_resume\n");
745
746 data->resume = 1;
747
748 return 0;
749}
750
751static struct freq_attr *acpi_cpufreq_attr[] = {
752 &cpufreq_freq_attr_scaling_available_freqs,
753 NULL,
754};
755
756static struct cpufreq_driver acpi_cpufreq_driver = {
757 .verify = acpi_cpufreq_verify,
758 .target = acpi_cpufreq_target,
759 .init = acpi_cpufreq_cpu_init,
760 .exit = acpi_cpufreq_cpu_exit,
761 .resume = acpi_cpufreq_resume,
762 .name = "acpi-cpufreq",
763 .owner = THIS_MODULE,
764 .attr = acpi_cpufreq_attr,
765};
766
767static int __init acpi_cpufreq_init(void)
768{
769 int ret;
770
771 dprintk("acpi_cpufreq_init\n");
772
773 ret = acpi_cpufreq_early_init();
774 if (ret)
775 return ret;
776
777 return cpufreq_register_driver(&acpi_cpufreq_driver);
778}
779
780static void __exit acpi_cpufreq_exit(void)
781{
782 dprintk("acpi_cpufreq_exit\n");
783
784 cpufreq_unregister_driver(&acpi_cpufreq_driver);
785
786 free_percpu(acpi_perf_data);
787
788 return;
789}
790
791module_param(acpi_pstate_strict, uint, 0644);
792MODULE_PARM_DESC(acpi_pstate_strict,
793 "value 0 or non-zero. non-zero -> strict ACPI checks are "
794 "performed during frequency changes.");
795
796late_initcall(acpi_cpufreq_init);
797module_exit(acpi_cpufreq_exit);
798
799MODULE_ALIAS("acpi");
diff --git a/arch/i386/kernel/cpu/mtrr/state.c b/arch/i386/kernel/cpu/mtrr/state.c
deleted file mode 100644
index c9014ca4a575..000000000000
--- a/arch/i386/kernel/cpu/mtrr/state.c
+++ /dev/null
@@ -1,79 +0,0 @@
1#include <linux/mm.h>
2#include <linux/init.h>
3#include <asm/io.h>
4#include <asm/mtrr.h>
5#include <asm/msr.h>
6#include <asm-i386/processor-cyrix.h>
7#include "mtrr.h"
8
9
10/* Put the processor into a state where MTRRs can be safely set */
11void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
12{
13 unsigned int cr0;
14
15 /* Disable interrupts locally */
16 local_irq_save(ctxt->flags);
17
18 if (use_intel() || is_cpu(CYRIX)) {
19
20 /* Save value of CR4 and clear Page Global Enable (bit 7) */
21 if ( cpu_has_pge ) {
22 ctxt->cr4val = read_cr4();
23 write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
24 }
25
26 /* Disable and flush caches. Note that wbinvd flushes the TLBs as
27 a side-effect */
28 cr0 = read_cr0() | 0x40000000;
29 wbinvd();
30 write_cr0(cr0);
31 wbinvd();
32
33 if (use_intel())
34 /* Save MTRR state */
35 rdmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
36 else
37 /* Cyrix ARRs - everything else were excluded at the top */
38 ctxt->ccr3 = getCx86(CX86_CCR3);
39 }
40}
41
42void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
43{
44 if (use_intel())
45 /* Disable MTRRs, and set the default type to uncached */
46 mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL,
47 ctxt->deftype_hi);
48 else if (is_cpu(CYRIX))
49 /* Cyrix ARRs - everything else were excluded at the top */
50 setCx86(CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10);
51}
52
53/* Restore the processor after a set_mtrr_prepare */
54void set_mtrr_done(struct set_mtrr_context *ctxt)
55{
56 if (use_intel() || is_cpu(CYRIX)) {
57
58 /* Flush caches and TLBs */
59 wbinvd();
60
61 /* Restore MTRRdefType */
62 if (use_intel())
63 /* Intel (P6) standard MTRRs */
64 mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
65 else
66 /* Cyrix ARRs - everything else was excluded at the top */
67 setCx86(CX86_CCR3, ctxt->ccr3);
68
69 /* Enable caches */
70 write_cr0(read_cr0() & 0xbfffffff);
71
72 /* Restore value of CR4 */
73 if ( cpu_has_pge )
74 write_cr4(ctxt->cr4val);
75 }
76 /* Re-enable interrupts locally (if enabled previously) */
77 local_irq_restore(ctxt->flags);
78}
79
diff --git a/arch/i386/kernel/early_printk.c b/arch/i386/kernel/early_printk.c
deleted file mode 100644
index 92f812ba275c..000000000000
--- a/arch/i386/kernel/early_printk.c
+++ /dev/null
@@ -1,2 +0,0 @@
1
2#include "../../x86_64/kernel/early_printk.c"
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
deleted file mode 100644
index a714d6b43506..000000000000
--- a/arch/i386/kernel/entry.S
+++ /dev/null
@@ -1,1112 +0,0 @@
1/*
2 * linux/arch/i386/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 */
6
7/*
8 * entry.S contains the system-call and fault low-level handling routines.
9 * This also contains the timer-interrupt handler, as well as all interrupts
10 * and faults that can result in a task-switch.
11 *
12 * NOTE: This code handles signal-recognition, which happens every time
13 * after a timer-interrupt and after each system call.
14 *
15 * I changed all the .align's to 4 (16 byte alignment), as that's faster
16 * on a 486.
17 *
18 * Stack layout in 'syscall_exit':
19 * ptrace needs to have all regs on the stack.
20 * if the order here is changed, it needs to be
21 * updated in fork.c:copy_process, signal.c:do_signal,
22 * ptrace.c and ptrace.h
23 *
24 * 0(%esp) - %ebx
25 * 4(%esp) - %ecx
26 * 8(%esp) - %edx
27 * C(%esp) - %esi
28 * 10(%esp) - %edi
29 * 14(%esp) - %ebp
30 * 18(%esp) - %eax
31 * 1C(%esp) - %ds
32 * 20(%esp) - %es
33 * 24(%esp) - %fs
34 * 28(%esp) - orig_eax
35 * 2C(%esp) - %eip
36 * 30(%esp) - %cs
37 * 34(%esp) - %eflags
38 * 38(%esp) - %oldesp
39 * 3C(%esp) - %oldss
40 *
41 * "current" is in register %ebx during any slow entries.
42 */
43
44#include <linux/linkage.h>
45#include <asm/thread_info.h>
46#include <asm/irqflags.h>
47#include <asm/errno.h>
48#include <asm/segment.h>
49#include <asm/smp.h>
50#include <asm/page.h>
51#include <asm/desc.h>
52#include <asm/percpu.h>
53#include <asm/dwarf2.h>
54#include "irq_vectors.h"
55
56/*
57 * We use macros for low-level operations which need to be overridden
58 * for paravirtualization. The following will never clobber any registers:
59 * INTERRUPT_RETURN (aka. "iret")
60 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
61 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
62 *
63 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
64 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
65 * Allowing a register to be clobbered can shrink the paravirt replacement
66 * enough to patch inline, increasing performance.
67 */
68
69#define nr_syscalls ((syscall_table_size)/4)
70
71CF_MASK = 0x00000001
72TF_MASK = 0x00000100
73IF_MASK = 0x00000200
74DF_MASK = 0x00000400
75NT_MASK = 0x00004000
76VM_MASK = 0x00020000
77
78#ifdef CONFIG_PREEMPT
79#define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
80#else
81#define preempt_stop(clobbers)
82#define resume_kernel restore_nocheck
83#endif
84
85.macro TRACE_IRQS_IRET
86#ifdef CONFIG_TRACE_IRQFLAGS
87 testl $IF_MASK,PT_EFLAGS(%esp) # interrupts off?
88 jz 1f
89 TRACE_IRQS_ON
901:
91#endif
92.endm
93
94#ifdef CONFIG_VM86
95#define resume_userspace_sig check_userspace
96#else
97#define resume_userspace_sig resume_userspace
98#endif
99
100#define SAVE_ALL \
101 cld; \
102 pushl %fs; \
103 CFI_ADJUST_CFA_OFFSET 4;\
104 /*CFI_REL_OFFSET fs, 0;*/\
105 pushl %es; \
106 CFI_ADJUST_CFA_OFFSET 4;\
107 /*CFI_REL_OFFSET es, 0;*/\
108 pushl %ds; \
109 CFI_ADJUST_CFA_OFFSET 4;\
110 /*CFI_REL_OFFSET ds, 0;*/\
111 pushl %eax; \
112 CFI_ADJUST_CFA_OFFSET 4;\
113 CFI_REL_OFFSET eax, 0;\
114 pushl %ebp; \
115 CFI_ADJUST_CFA_OFFSET 4;\
116 CFI_REL_OFFSET ebp, 0;\
117 pushl %edi; \
118 CFI_ADJUST_CFA_OFFSET 4;\
119 CFI_REL_OFFSET edi, 0;\
120 pushl %esi; \
121 CFI_ADJUST_CFA_OFFSET 4;\
122 CFI_REL_OFFSET esi, 0;\
123 pushl %edx; \
124 CFI_ADJUST_CFA_OFFSET 4;\
125 CFI_REL_OFFSET edx, 0;\
126 pushl %ecx; \
127 CFI_ADJUST_CFA_OFFSET 4;\
128 CFI_REL_OFFSET ecx, 0;\
129 pushl %ebx; \
130 CFI_ADJUST_CFA_OFFSET 4;\
131 CFI_REL_OFFSET ebx, 0;\
132 movl $(__USER_DS), %edx; \
133 movl %edx, %ds; \
134 movl %edx, %es; \
135 movl $(__KERNEL_PERCPU), %edx; \
136 movl %edx, %fs
137
138#define RESTORE_INT_REGS \
139 popl %ebx; \
140 CFI_ADJUST_CFA_OFFSET -4;\
141 CFI_RESTORE ebx;\
142 popl %ecx; \
143 CFI_ADJUST_CFA_OFFSET -4;\
144 CFI_RESTORE ecx;\
145 popl %edx; \
146 CFI_ADJUST_CFA_OFFSET -4;\
147 CFI_RESTORE edx;\
148 popl %esi; \
149 CFI_ADJUST_CFA_OFFSET -4;\
150 CFI_RESTORE esi;\
151 popl %edi; \
152 CFI_ADJUST_CFA_OFFSET -4;\
153 CFI_RESTORE edi;\
154 popl %ebp; \
155 CFI_ADJUST_CFA_OFFSET -4;\
156 CFI_RESTORE ebp;\
157 popl %eax; \
158 CFI_ADJUST_CFA_OFFSET -4;\
159 CFI_RESTORE eax
160
161#define RESTORE_REGS \
162 RESTORE_INT_REGS; \
1631: popl %ds; \
164 CFI_ADJUST_CFA_OFFSET -4;\
165 /*CFI_RESTORE ds;*/\
1662: popl %es; \
167 CFI_ADJUST_CFA_OFFSET -4;\
168 /*CFI_RESTORE es;*/\
1693: popl %fs; \
170 CFI_ADJUST_CFA_OFFSET -4;\
171 /*CFI_RESTORE fs;*/\
172.pushsection .fixup,"ax"; \
1734: movl $0,(%esp); \
174 jmp 1b; \
1755: movl $0,(%esp); \
176 jmp 2b; \
1776: movl $0,(%esp); \
178 jmp 3b; \
179.section __ex_table,"a";\
180 .align 4; \
181 .long 1b,4b; \
182 .long 2b,5b; \
183 .long 3b,6b; \
184.popsection
185
186#define RING0_INT_FRAME \
187 CFI_STARTPROC simple;\
188 CFI_SIGNAL_FRAME;\
189 CFI_DEF_CFA esp, 3*4;\
190 /*CFI_OFFSET cs, -2*4;*/\
191 CFI_OFFSET eip, -3*4
192
193#define RING0_EC_FRAME \
194 CFI_STARTPROC simple;\
195 CFI_SIGNAL_FRAME;\
196 CFI_DEF_CFA esp, 4*4;\
197 /*CFI_OFFSET cs, -2*4;*/\
198 CFI_OFFSET eip, -3*4
199
200#define RING0_PTREGS_FRAME \
201 CFI_STARTPROC simple;\
202 CFI_SIGNAL_FRAME;\
203 CFI_DEF_CFA esp, PT_OLDESP-PT_EBX;\
204 /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/\
205 CFI_OFFSET eip, PT_EIP-PT_OLDESP;\
206 /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/\
207 /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/\
208 CFI_OFFSET eax, PT_EAX-PT_OLDESP;\
209 CFI_OFFSET ebp, PT_EBP-PT_OLDESP;\
210 CFI_OFFSET edi, PT_EDI-PT_OLDESP;\
211 CFI_OFFSET esi, PT_ESI-PT_OLDESP;\
212 CFI_OFFSET edx, PT_EDX-PT_OLDESP;\
213 CFI_OFFSET ecx, PT_ECX-PT_OLDESP;\
214 CFI_OFFSET ebx, PT_EBX-PT_OLDESP
215
216ENTRY(ret_from_fork)
217 CFI_STARTPROC
218 pushl %eax
219 CFI_ADJUST_CFA_OFFSET 4
220 call schedule_tail
221 GET_THREAD_INFO(%ebp)
222 popl %eax
223 CFI_ADJUST_CFA_OFFSET -4
224 pushl $0x0202 # Reset kernel eflags
225 CFI_ADJUST_CFA_OFFSET 4
226 popfl
227 CFI_ADJUST_CFA_OFFSET -4
228 jmp syscall_exit
229 CFI_ENDPROC
230END(ret_from_fork)
231
232/*
233 * Return to user mode is not as complex as all this looks,
234 * but we want the default path for a system call return to
235 * go as quickly as possible which is why some of this is
236 * less clear than it otherwise should be.
237 */
238
239 # userspace resumption stub bypassing syscall exit tracing
240 ALIGN
241 RING0_PTREGS_FRAME
242ret_from_exception:
243 preempt_stop(CLBR_ANY)
244ret_from_intr:
245 GET_THREAD_INFO(%ebp)
246check_userspace:
247 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
248 movb PT_CS(%esp), %al
249 andl $(VM_MASK | SEGMENT_RPL_MASK), %eax
250 cmpl $USER_RPL, %eax
251 jb resume_kernel # not returning to v8086 or userspace
252
253ENTRY(resume_userspace)
254 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
255 # setting need_resched or sigpending
256 # between sampling and the iret
257 movl TI_flags(%ebp), %ecx
258 andl $_TIF_WORK_MASK, %ecx # is there any work to be done on
259 # int/exception return?
260 jne work_pending
261 jmp restore_all
262END(ret_from_exception)
263
264#ifdef CONFIG_PREEMPT
265ENTRY(resume_kernel)
266 DISABLE_INTERRUPTS(CLBR_ANY)
267 cmpl $0,TI_preempt_count(%ebp) # non-zero preempt_count ?
268 jnz restore_nocheck
269need_resched:
270 movl TI_flags(%ebp), %ecx # need_resched set ?
271 testb $_TIF_NEED_RESCHED, %cl
272 jz restore_all
273 testl $IF_MASK,PT_EFLAGS(%esp) # interrupts off (exception path) ?
274 jz restore_all
275 call preempt_schedule_irq
276 jmp need_resched
277END(resume_kernel)
278#endif
279 CFI_ENDPROC
280
281/* SYSENTER_RETURN points to after the "sysenter" instruction in
282 the vsyscall page. See vsyscall-sysentry.S, which defines the symbol. */
283
284 # sysenter call handler stub
285ENTRY(sysenter_entry)
286 CFI_STARTPROC simple
287 CFI_SIGNAL_FRAME
288 CFI_DEF_CFA esp, 0
289 CFI_REGISTER esp, ebp
290 movl TSS_sysenter_esp0(%esp),%esp
291sysenter_past_esp:
292 /*
293 * No need to follow this irqs on/off section: the syscall
294 * disabled irqs and here we enable it straight after entry:
295 */
296 ENABLE_INTERRUPTS(CLBR_NONE)
297 pushl $(__USER_DS)
298 CFI_ADJUST_CFA_OFFSET 4
299 /*CFI_REL_OFFSET ss, 0*/
300 pushl %ebp
301 CFI_ADJUST_CFA_OFFSET 4
302 CFI_REL_OFFSET esp, 0
303 pushfl
304 CFI_ADJUST_CFA_OFFSET 4
305 pushl $(__USER_CS)
306 CFI_ADJUST_CFA_OFFSET 4
307 /*CFI_REL_OFFSET cs, 0*/
308 /*
309 * Push current_thread_info()->sysenter_return to the stack.
310 * A tiny bit of offset fixup is necessary - 4*4 means the 4 words
311 * pushed above; +8 corresponds to copy_thread's esp0 setting.
312 */
313 pushl (TI_sysenter_return-THREAD_SIZE+8+4*4)(%esp)
314 CFI_ADJUST_CFA_OFFSET 4
315 CFI_REL_OFFSET eip, 0
316
317/*
318 * Load the potential sixth argument from user stack.
319 * Careful about security.
320 */
321 cmpl $__PAGE_OFFSET-3,%ebp
322 jae syscall_fault
3231: movl (%ebp),%ebp
324.section __ex_table,"a"
325 .align 4
326 .long 1b,syscall_fault
327.previous
328
329 pushl %eax
330 CFI_ADJUST_CFA_OFFSET 4
331 SAVE_ALL
332 GET_THREAD_INFO(%ebp)
333
334 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
335 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
336 jnz syscall_trace_entry
337 cmpl $(nr_syscalls), %eax
338 jae syscall_badsys
339 call *sys_call_table(,%eax,4)
340 movl %eax,PT_EAX(%esp)
341 DISABLE_INTERRUPTS(CLBR_ANY)
342 TRACE_IRQS_OFF
343 movl TI_flags(%ebp), %ecx
344 testw $_TIF_ALLWORK_MASK, %cx
345 jne syscall_exit_work
346/* if something modifies registers it must also disable sysexit */
347 movl PT_EIP(%esp), %edx
348 movl PT_OLDESP(%esp), %ecx
349 xorl %ebp,%ebp
350 TRACE_IRQS_ON
3511: mov PT_FS(%esp), %fs
352 ENABLE_INTERRUPTS_SYSEXIT
353 CFI_ENDPROC
354.pushsection .fixup,"ax"
3552: movl $0,PT_FS(%esp)
356 jmp 1b
357.section __ex_table,"a"
358 .align 4
359 .long 1b,2b
360.popsection
361ENDPROC(sysenter_entry)
362
363 # system call handler stub
364ENTRY(system_call)
365 RING0_INT_FRAME # can't unwind into user space anyway
366 pushl %eax # save orig_eax
367 CFI_ADJUST_CFA_OFFSET 4
368 SAVE_ALL
369 GET_THREAD_INFO(%ebp)
370 # system call tracing in operation / emulation
371 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
372 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
373 jnz syscall_trace_entry
374 cmpl $(nr_syscalls), %eax
375 jae syscall_badsys
376syscall_call:
377 call *sys_call_table(,%eax,4)
378 movl %eax,PT_EAX(%esp) # store the return value
379syscall_exit:
380 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
381 # setting need_resched or sigpending
382 # between sampling and the iret
383 TRACE_IRQS_OFF
384 testl $TF_MASK,PT_EFLAGS(%esp) # If tracing set singlestep flag on exit
385 jz no_singlestep
386 orl $_TIF_SINGLESTEP,TI_flags(%ebp)
387no_singlestep:
388 movl TI_flags(%ebp), %ecx
389 testw $_TIF_ALLWORK_MASK, %cx # current->work
390 jne syscall_exit_work
391
392restore_all:
393 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
394 # Warning: PT_OLDSS(%esp) contains the wrong/random values if we
395 # are returning to the kernel.
396 # See comments in process.c:copy_thread() for details.
397 movb PT_OLDSS(%esp), %ah
398 movb PT_CS(%esp), %al
399 andl $(VM_MASK | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
400 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
401 CFI_REMEMBER_STATE
402 je ldt_ss # returning to user-space with LDT SS
403restore_nocheck:
404 TRACE_IRQS_IRET
405restore_nocheck_notrace:
406 RESTORE_REGS
407 addl $4, %esp # skip orig_eax/error_code
408 CFI_ADJUST_CFA_OFFSET -4
4091: INTERRUPT_RETURN
410.section .fixup,"ax"
411iret_exc:
412 pushl $0 # no error code
413 pushl $do_iret_error
414 jmp error_code
415.previous
416.section __ex_table,"a"
417 .align 4
418 .long 1b,iret_exc
419.previous
420
421 CFI_RESTORE_STATE
422ldt_ss:
423 larl PT_OLDSS(%esp), %eax
424 jnz restore_nocheck
425 testl $0x00400000, %eax # returning to 32bit stack?
426 jnz restore_nocheck # allright, normal return
427
428#ifdef CONFIG_PARAVIRT
429 /*
430 * The kernel can't run on a non-flat stack if paravirt mode
431 * is active. Rather than try to fixup the high bits of
432 * ESP, bypass this code entirely. This may break DOSemu
433 * and/or Wine support in a paravirt VM, although the option
434 * is still available to implement the setting of the high
435 * 16-bits in the INTERRUPT_RETURN paravirt-op.
436 */
437 cmpl $0, paravirt_ops+PARAVIRT_enabled
438 jne restore_nocheck
439#endif
440
441 /* If returning to userspace with 16bit stack,
442 * try to fix the higher word of ESP, as the CPU
443 * won't restore it.
444 * This is an "official" bug of all the x86-compatible
445 * CPUs, which we can try to work around to make
446 * dosemu and wine happy. */
447 movl PT_OLDESP(%esp), %eax
448 movl %esp, %edx
449 call patch_espfix_desc
450 pushl $__ESPFIX_SS
451 CFI_ADJUST_CFA_OFFSET 4
452 pushl %eax
453 CFI_ADJUST_CFA_OFFSET 4
454 DISABLE_INTERRUPTS(CLBR_EAX)
455 TRACE_IRQS_OFF
456 lss (%esp), %esp
457 CFI_ADJUST_CFA_OFFSET -8
458 jmp restore_nocheck
459 CFI_ENDPROC
460ENDPROC(system_call)
461
462 # perform work that needs to be done immediately before resumption
463 ALIGN
464 RING0_PTREGS_FRAME # can't unwind into user space anyway
465work_pending:
466 testb $_TIF_NEED_RESCHED, %cl
467 jz work_notifysig
468work_resched:
469 call schedule
470 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
471 # setting need_resched or sigpending
472 # between sampling and the iret
473 TRACE_IRQS_OFF
474 movl TI_flags(%ebp), %ecx
475 andl $_TIF_WORK_MASK, %ecx # is there any work to be done other
476 # than syscall tracing?
477 jz restore_all
478 testb $_TIF_NEED_RESCHED, %cl
479 jnz work_resched
480
481work_notifysig: # deal with pending signals and
482 # notify-resume requests
483#ifdef CONFIG_VM86
484 testl $VM_MASK, PT_EFLAGS(%esp)
485 movl %esp, %eax
486 jne work_notifysig_v86 # returning to kernel-space or
487 # vm86-space
488 xorl %edx, %edx
489 call do_notify_resume
490 jmp resume_userspace_sig
491
492 ALIGN
493work_notifysig_v86:
494 pushl %ecx # save ti_flags for do_notify_resume
495 CFI_ADJUST_CFA_OFFSET 4
496 call save_v86_state # %eax contains pt_regs pointer
497 popl %ecx
498 CFI_ADJUST_CFA_OFFSET -4
499 movl %eax, %esp
500#else
501 movl %esp, %eax
502#endif
503 xorl %edx, %edx
504 call do_notify_resume
505 jmp resume_userspace_sig
506END(work_pending)
507
508 # perform syscall exit tracing
509 ALIGN
510syscall_trace_entry:
511 movl $-ENOSYS,PT_EAX(%esp)
512 movl %esp, %eax
513 xorl %edx,%edx
514 call do_syscall_trace
515 cmpl $0, %eax
516 jne resume_userspace # ret != 0 -> running under PTRACE_SYSEMU,
517 # so must skip actual syscall
518 movl PT_ORIG_EAX(%esp), %eax
519 cmpl $(nr_syscalls), %eax
520 jnae syscall_call
521 jmp syscall_exit
522END(syscall_trace_entry)
523
524 # perform syscall exit tracing
525 ALIGN
526syscall_exit_work:
527 testb $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP), %cl
528 jz work_pending
529 TRACE_IRQS_ON
530 ENABLE_INTERRUPTS(CLBR_ANY) # could let do_syscall_trace() call
531 # schedule() instead
532 movl %esp, %eax
533 movl $1, %edx
534 call do_syscall_trace
535 jmp resume_userspace
536END(syscall_exit_work)
537 CFI_ENDPROC
538
539 RING0_INT_FRAME # can't unwind into user space anyway
540syscall_fault:
541 pushl %eax # save orig_eax
542 CFI_ADJUST_CFA_OFFSET 4
543 SAVE_ALL
544 GET_THREAD_INFO(%ebp)
545 movl $-EFAULT,PT_EAX(%esp)
546 jmp resume_userspace
547END(syscall_fault)
548
549syscall_badsys:
550 movl $-ENOSYS,PT_EAX(%esp)
551 jmp resume_userspace
552END(syscall_badsys)
553 CFI_ENDPROC
554
555#define FIXUP_ESPFIX_STACK \
556 /* since we are on a wrong stack, we cant make it a C code :( */ \
557 PER_CPU(gdt_page, %ebx); \
558 GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah); \
559 addl %esp, %eax; \
560 pushl $__KERNEL_DS; \
561 CFI_ADJUST_CFA_OFFSET 4; \
562 pushl %eax; \
563 CFI_ADJUST_CFA_OFFSET 4; \
564 lss (%esp), %esp; \
565 CFI_ADJUST_CFA_OFFSET -8;
566#define UNWIND_ESPFIX_STACK \
567 movl %ss, %eax; \
568 /* see if on espfix stack */ \
569 cmpw $__ESPFIX_SS, %ax; \
570 jne 27f; \
571 movl $__KERNEL_DS, %eax; \
572 movl %eax, %ds; \
573 movl %eax, %es; \
574 /* switch to normal stack */ \
575 FIXUP_ESPFIX_STACK; \
57627:;
577
578/*
579 * Build the entry stubs and pointer table with
580 * some assembler magic.
581 */
582.data
583ENTRY(interrupt)
584.text
585
586ENTRY(irq_entries_start)
587 RING0_INT_FRAME
588vector=0
589.rept NR_IRQS
590 ALIGN
591 .if vector
592 CFI_ADJUST_CFA_OFFSET -4
593 .endif
5941: pushl $~(vector)
595 CFI_ADJUST_CFA_OFFSET 4
596 jmp common_interrupt
597 .previous
598 .long 1b
599 .text
600vector=vector+1
601.endr
602END(irq_entries_start)
603
604.previous
605END(interrupt)
606.previous
607
608/*
609 * the CPU automatically disables interrupts when executing an IRQ vector,
610 * so IRQ-flags tracing has to follow that:
611 */
612 ALIGN
613common_interrupt:
614 SAVE_ALL
615 TRACE_IRQS_OFF
616 movl %esp,%eax
617 call do_IRQ
618 jmp ret_from_intr
619ENDPROC(common_interrupt)
620 CFI_ENDPROC
621
622#define BUILD_INTERRUPT(name, nr) \
623ENTRY(name) \
624 RING0_INT_FRAME; \
625 pushl $~(nr); \
626 CFI_ADJUST_CFA_OFFSET 4; \
627 SAVE_ALL; \
628 TRACE_IRQS_OFF \
629 movl %esp,%eax; \
630 call smp_##name; \
631 jmp ret_from_intr; \
632 CFI_ENDPROC; \
633ENDPROC(name)
634
635/* The include is where all of the SMP etc. interrupts come from */
636#include "entry_arch.h"
637
638KPROBE_ENTRY(page_fault)
639 RING0_EC_FRAME
640 pushl $do_page_fault
641 CFI_ADJUST_CFA_OFFSET 4
642 ALIGN
643error_code:
644 /* the function address is in %fs's slot on the stack */
645 pushl %es
646 CFI_ADJUST_CFA_OFFSET 4
647 /*CFI_REL_OFFSET es, 0*/
648 pushl %ds
649 CFI_ADJUST_CFA_OFFSET 4
650 /*CFI_REL_OFFSET ds, 0*/
651 pushl %eax
652 CFI_ADJUST_CFA_OFFSET 4
653 CFI_REL_OFFSET eax, 0
654 pushl %ebp
655 CFI_ADJUST_CFA_OFFSET 4
656 CFI_REL_OFFSET ebp, 0
657 pushl %edi
658 CFI_ADJUST_CFA_OFFSET 4
659 CFI_REL_OFFSET edi, 0
660 pushl %esi
661 CFI_ADJUST_CFA_OFFSET 4
662 CFI_REL_OFFSET esi, 0
663 pushl %edx
664 CFI_ADJUST_CFA_OFFSET 4
665 CFI_REL_OFFSET edx, 0
666 pushl %ecx
667 CFI_ADJUST_CFA_OFFSET 4
668 CFI_REL_OFFSET ecx, 0
669 pushl %ebx
670 CFI_ADJUST_CFA_OFFSET 4
671 CFI_REL_OFFSET ebx, 0
672 cld
673 pushl %fs
674 CFI_ADJUST_CFA_OFFSET 4
675 /*CFI_REL_OFFSET fs, 0*/
676 movl $(__KERNEL_PERCPU), %ecx
677 movl %ecx, %fs
678 UNWIND_ESPFIX_STACK
679 popl %ecx
680 CFI_ADJUST_CFA_OFFSET -4
681 /*CFI_REGISTER es, ecx*/
682 movl PT_FS(%esp), %edi # get the function address
683 movl PT_ORIG_EAX(%esp), %edx # get the error code
684 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
685 mov %ecx, PT_FS(%esp)
686 /*CFI_REL_OFFSET fs, ES*/
687 movl $(__USER_DS), %ecx
688 movl %ecx, %ds
689 movl %ecx, %es
690 movl %esp,%eax # pt_regs pointer
691 call *%edi
692 jmp ret_from_exception
693 CFI_ENDPROC
694KPROBE_END(page_fault)
695
696ENTRY(coprocessor_error)
697 RING0_INT_FRAME
698 pushl $0
699 CFI_ADJUST_CFA_OFFSET 4
700 pushl $do_coprocessor_error
701 CFI_ADJUST_CFA_OFFSET 4
702 jmp error_code
703 CFI_ENDPROC
704END(coprocessor_error)
705
706ENTRY(simd_coprocessor_error)
707 RING0_INT_FRAME
708 pushl $0
709 CFI_ADJUST_CFA_OFFSET 4
710 pushl $do_simd_coprocessor_error
711 CFI_ADJUST_CFA_OFFSET 4
712 jmp error_code
713 CFI_ENDPROC
714END(simd_coprocessor_error)
715
716ENTRY(device_not_available)
717 RING0_INT_FRAME
718 pushl $-1 # mark this as an int
719 CFI_ADJUST_CFA_OFFSET 4
720 SAVE_ALL
721 GET_CR0_INTO_EAX
722 testl $0x4, %eax # EM (math emulation bit)
723 jne device_not_available_emulate
724 preempt_stop(CLBR_ANY)
725 call math_state_restore
726 jmp ret_from_exception
727device_not_available_emulate:
728 pushl $0 # temporary storage for ORIG_EIP
729 CFI_ADJUST_CFA_OFFSET 4
730 call math_emulate
731 addl $4, %esp
732 CFI_ADJUST_CFA_OFFSET -4
733 jmp ret_from_exception
734 CFI_ENDPROC
735END(device_not_available)
736
737/*
738 * Debug traps and NMI can happen at the one SYSENTER instruction
739 * that sets up the real kernel stack. Check here, since we can't
740 * allow the wrong stack to be used.
741 *
742 * "TSS_sysenter_esp0+12" is because the NMI/debug handler will have
743 * already pushed 3 words if it hits on the sysenter instruction:
744 * eflags, cs and eip.
745 *
746 * We just load the right stack, and push the three (known) values
747 * by hand onto the new stack - while updating the return eip past
748 * the instruction that would have done it for sysenter.
749 */
750#define FIX_STACK(offset, ok, label) \
751 cmpw $__KERNEL_CS,4(%esp); \
752 jne ok; \
753label: \
754 movl TSS_sysenter_esp0+offset(%esp),%esp; \
755 CFI_DEF_CFA esp, 0; \
756 CFI_UNDEFINED eip; \
757 pushfl; \
758 CFI_ADJUST_CFA_OFFSET 4; \
759 pushl $__KERNEL_CS; \
760 CFI_ADJUST_CFA_OFFSET 4; \
761 pushl $sysenter_past_esp; \
762 CFI_ADJUST_CFA_OFFSET 4; \
763 CFI_REL_OFFSET eip, 0
764
765KPROBE_ENTRY(debug)
766 RING0_INT_FRAME
767 cmpl $sysenter_entry,(%esp)
768 jne debug_stack_correct
769 FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
770debug_stack_correct:
771 pushl $-1 # mark this as an int
772 CFI_ADJUST_CFA_OFFSET 4
773 SAVE_ALL
774 xorl %edx,%edx # error code 0
775 movl %esp,%eax # pt_regs pointer
776 call do_debug
777 jmp ret_from_exception
778 CFI_ENDPROC
779KPROBE_END(debug)
780
781/*
782 * NMI is doubly nasty. It can happen _while_ we're handling
783 * a debug fault, and the debug fault hasn't yet been able to
784 * clear up the stack. So we first check whether we got an
785 * NMI on the sysenter entry path, but after that we need to
786 * check whether we got an NMI on the debug path where the debug
787 * fault happened on the sysenter path.
788 */
789KPROBE_ENTRY(nmi)
790 RING0_INT_FRAME
791 pushl %eax
792 CFI_ADJUST_CFA_OFFSET 4
793 movl %ss, %eax
794 cmpw $__ESPFIX_SS, %ax
795 popl %eax
796 CFI_ADJUST_CFA_OFFSET -4
797 je nmi_espfix_stack
798 cmpl $sysenter_entry,(%esp)
799 je nmi_stack_fixup
800 pushl %eax
801 CFI_ADJUST_CFA_OFFSET 4
802 movl %esp,%eax
803 /* Do not access memory above the end of our stack page,
804 * it might not exist.
805 */
806 andl $(THREAD_SIZE-1),%eax
807 cmpl $(THREAD_SIZE-20),%eax
808 popl %eax
809 CFI_ADJUST_CFA_OFFSET -4
810 jae nmi_stack_correct
811 cmpl $sysenter_entry,12(%esp)
812 je nmi_debug_stack_check
813nmi_stack_correct:
814 /* We have a RING0_INT_FRAME here */
815 pushl %eax
816 CFI_ADJUST_CFA_OFFSET 4
817 SAVE_ALL
818 xorl %edx,%edx # zero error code
819 movl %esp,%eax # pt_regs pointer
820 call do_nmi
821 jmp restore_nocheck_notrace
822 CFI_ENDPROC
823
824nmi_stack_fixup:
825 RING0_INT_FRAME
826 FIX_STACK(12,nmi_stack_correct, 1)
827 jmp nmi_stack_correct
828
829nmi_debug_stack_check:
830 /* We have a RING0_INT_FRAME here */
831 cmpw $__KERNEL_CS,16(%esp)
832 jne nmi_stack_correct
833 cmpl $debug,(%esp)
834 jb nmi_stack_correct
835 cmpl $debug_esp_fix_insn,(%esp)
836 ja nmi_stack_correct
837 FIX_STACK(24,nmi_stack_correct, 1)
838 jmp nmi_stack_correct
839
840nmi_espfix_stack:
841 /* We have a RING0_INT_FRAME here.
842 *
843 * create the pointer to lss back
844 */
845 pushl %ss
846 CFI_ADJUST_CFA_OFFSET 4
847 pushl %esp
848 CFI_ADJUST_CFA_OFFSET 4
849 addw $4, (%esp)
850 /* copy the iret frame of 12 bytes */
851 .rept 3
852 pushl 16(%esp)
853 CFI_ADJUST_CFA_OFFSET 4
854 .endr
855 pushl %eax
856 CFI_ADJUST_CFA_OFFSET 4
857 SAVE_ALL
858 FIXUP_ESPFIX_STACK # %eax == %esp
859 xorl %edx,%edx # zero error code
860 call do_nmi
861 RESTORE_REGS
862 lss 12+4(%esp), %esp # back to espfix stack
863 CFI_ADJUST_CFA_OFFSET -24
8641: INTERRUPT_RETURN
865 CFI_ENDPROC
866.section __ex_table,"a"
867 .align 4
868 .long 1b,iret_exc
869.previous
870KPROBE_END(nmi)
871
872#ifdef CONFIG_PARAVIRT
873ENTRY(native_iret)
8741: iret
875.section __ex_table,"a"
876 .align 4
877 .long 1b,iret_exc
878.previous
879END(native_iret)
880
881ENTRY(native_irq_enable_sysexit)
882 sti
883 sysexit
884END(native_irq_enable_sysexit)
885#endif
886
887KPROBE_ENTRY(int3)
888 RING0_INT_FRAME
889 pushl $-1 # mark this as an int
890 CFI_ADJUST_CFA_OFFSET 4
891 SAVE_ALL
892 xorl %edx,%edx # zero error code
893 movl %esp,%eax # pt_regs pointer
894 call do_int3
895 jmp ret_from_exception
896 CFI_ENDPROC
897KPROBE_END(int3)
898
899ENTRY(overflow)
900 RING0_INT_FRAME
901 pushl $0
902 CFI_ADJUST_CFA_OFFSET 4
903 pushl $do_overflow
904 CFI_ADJUST_CFA_OFFSET 4
905 jmp error_code
906 CFI_ENDPROC
907END(overflow)
908
909ENTRY(bounds)
910 RING0_INT_FRAME
911 pushl $0
912 CFI_ADJUST_CFA_OFFSET 4
913 pushl $do_bounds
914 CFI_ADJUST_CFA_OFFSET 4
915 jmp error_code
916 CFI_ENDPROC
917END(bounds)
918
919ENTRY(invalid_op)
920 RING0_INT_FRAME
921 pushl $0
922 CFI_ADJUST_CFA_OFFSET 4
923 pushl $do_invalid_op
924 CFI_ADJUST_CFA_OFFSET 4
925 jmp error_code
926 CFI_ENDPROC
927END(invalid_op)
928
929ENTRY(coprocessor_segment_overrun)
930 RING0_INT_FRAME
931 pushl $0
932 CFI_ADJUST_CFA_OFFSET 4
933 pushl $do_coprocessor_segment_overrun
934 CFI_ADJUST_CFA_OFFSET 4
935 jmp error_code
936 CFI_ENDPROC
937END(coprocessor_segment_overrun)
938
939ENTRY(invalid_TSS)
940 RING0_EC_FRAME
941 pushl $do_invalid_TSS
942 CFI_ADJUST_CFA_OFFSET 4
943 jmp error_code
944 CFI_ENDPROC
945END(invalid_TSS)
946
947ENTRY(segment_not_present)
948 RING0_EC_FRAME
949 pushl $do_segment_not_present
950 CFI_ADJUST_CFA_OFFSET 4
951 jmp error_code
952 CFI_ENDPROC
953END(segment_not_present)
954
955ENTRY(stack_segment)
956 RING0_EC_FRAME
957 pushl $do_stack_segment
958 CFI_ADJUST_CFA_OFFSET 4
959 jmp error_code
960 CFI_ENDPROC
961END(stack_segment)
962
963KPROBE_ENTRY(general_protection)
964 RING0_EC_FRAME
965 pushl $do_general_protection
966 CFI_ADJUST_CFA_OFFSET 4
967 jmp error_code
968 CFI_ENDPROC
969KPROBE_END(general_protection)
970
971ENTRY(alignment_check)
972 RING0_EC_FRAME
973 pushl $do_alignment_check
974 CFI_ADJUST_CFA_OFFSET 4
975 jmp error_code
976 CFI_ENDPROC
977END(alignment_check)
978
979ENTRY(divide_error)
980 RING0_INT_FRAME
981 pushl $0 # no error code
982 CFI_ADJUST_CFA_OFFSET 4
983 pushl $do_divide_error
984 CFI_ADJUST_CFA_OFFSET 4
985 jmp error_code
986 CFI_ENDPROC
987END(divide_error)
988
989#ifdef CONFIG_X86_MCE
990ENTRY(machine_check)
991 RING0_INT_FRAME
992 pushl $0
993 CFI_ADJUST_CFA_OFFSET 4
994 pushl machine_check_vector
995 CFI_ADJUST_CFA_OFFSET 4
996 jmp error_code
997 CFI_ENDPROC
998END(machine_check)
999#endif
1000
1001ENTRY(spurious_interrupt_bug)
1002 RING0_INT_FRAME
1003 pushl $0
1004 CFI_ADJUST_CFA_OFFSET 4
1005 pushl $do_spurious_interrupt_bug
1006 CFI_ADJUST_CFA_OFFSET 4
1007 jmp error_code
1008 CFI_ENDPROC
1009END(spurious_interrupt_bug)
1010
1011ENTRY(kernel_thread_helper)
1012 pushl $0 # fake return address for unwinder
1013 CFI_STARTPROC
1014 movl %edx,%eax
1015 push %edx
1016 CFI_ADJUST_CFA_OFFSET 4
1017 call *%ebx
1018 push %eax
1019 CFI_ADJUST_CFA_OFFSET 4
1020 call do_exit
1021 CFI_ENDPROC
1022ENDPROC(kernel_thread_helper)
1023
1024#ifdef CONFIG_XEN
1025ENTRY(xen_hypervisor_callback)
1026 CFI_STARTPROC
1027 pushl $0
1028 CFI_ADJUST_CFA_OFFSET 4
1029 SAVE_ALL
1030 TRACE_IRQS_OFF
1031
1032 /* Check to see if we got the event in the critical
1033 region in xen_iret_direct, after we've reenabled
1034 events and checked for pending events. This simulates
1035 iret instruction's behaviour where it delivers a
1036 pending interrupt when enabling interrupts. */
1037 movl PT_EIP(%esp),%eax
1038 cmpl $xen_iret_start_crit,%eax
1039 jb 1f
1040 cmpl $xen_iret_end_crit,%eax
1041 jae 1f
1042
1043 call xen_iret_crit_fixup
1044
10451: mov %esp, %eax
1046 call xen_evtchn_do_upcall
1047 jmp ret_from_intr
1048 CFI_ENDPROC
1049ENDPROC(xen_hypervisor_callback)
1050
1051# Hypervisor uses this for application faults while it executes.
1052# We get here for two reasons:
1053# 1. Fault while reloading DS, ES, FS or GS
1054# 2. Fault while executing IRET
1055# Category 1 we fix up by reattempting the load, and zeroing the segment
1056# register if the load fails.
1057# Category 2 we fix up by jumping to do_iret_error. We cannot use the
1058# normal Linux return path in this case because if we use the IRET hypercall
1059# to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1060# We distinguish between categories by maintaining a status value in EAX.
1061ENTRY(xen_failsafe_callback)
1062 CFI_STARTPROC
1063 pushl %eax
1064 CFI_ADJUST_CFA_OFFSET 4
1065 movl $1,%eax
10661: mov 4(%esp),%ds
10672: mov 8(%esp),%es
10683: mov 12(%esp),%fs
10694: mov 16(%esp),%gs
1070 testl %eax,%eax
1071 popl %eax
1072 CFI_ADJUST_CFA_OFFSET -4
1073 lea 16(%esp),%esp
1074 CFI_ADJUST_CFA_OFFSET -16
1075 jz 5f
1076 addl $16,%esp
1077 jmp iret_exc # EAX != 0 => Category 2 (Bad IRET)
10785: pushl $0 # EAX == 0 => Category 1 (Bad segment)
1079 CFI_ADJUST_CFA_OFFSET 4
1080 SAVE_ALL
1081 jmp ret_from_exception
1082 CFI_ENDPROC
1083
1084.section .fixup,"ax"
10856: xorl %eax,%eax
1086 movl %eax,4(%esp)
1087 jmp 1b
10887: xorl %eax,%eax
1089 movl %eax,8(%esp)
1090 jmp 2b
10918: xorl %eax,%eax
1092 movl %eax,12(%esp)
1093 jmp 3b
10949: xorl %eax,%eax
1095 movl %eax,16(%esp)
1096 jmp 4b
1097.previous
1098.section __ex_table,"a"
1099 .align 4
1100 .long 1b,6b
1101 .long 2b,7b
1102 .long 3b,8b
1103 .long 4b,9b
1104.previous
1105ENDPROC(xen_failsafe_callback)
1106
1107#endif /* CONFIG_XEN */
1108
1109.section .rodata,"a"
1110#include "syscall_table.S"
1111
1112syscall_table_size=(.-sys_call_table)
diff --git a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S
deleted file mode 100644
index 8f0382161c91..000000000000
--- a/arch/i386/kernel/head.S
+++ /dev/null
@@ -1,578 +0,0 @@
1/*
2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/threads.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page.h>
15#include <asm/pgtable.h>
16#include <asm/desc.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21
22/*
23 * References to members of the new_cpu_data structure.
24 */
25
26#define X86 new_cpu_data+CPUINFO_x86
27#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
28#define X86_MODEL new_cpu_data+CPUINFO_x86_model
29#define X86_MASK new_cpu_data+CPUINFO_x86_mask
30#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
31#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
32#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
33#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
34
35/*
36 * This is how much memory *in addition to the memory covered up to
37 * and including _end* we need mapped initially.
38 * We need:
39 * - one bit for each possible page, but only in low memory, which means
40 * 2^32/4096/8 = 128K worst case (4G/4G split.)
41 * - enough space to map all low memory, which means
42 * (2^32/4096) / 1024 pages (worst case, non PAE)
43 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
44 * - a few pages for allocator use before the kernel pagetable has
45 * been set up
46 *
47 * Modulo rounding, each megabyte assigned here requires a kilobyte of
48 * memory, which is currently unreclaimed.
49 *
50 * This should be a multiple of a page.
51 */
52LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
53
54#if PTRS_PER_PMD > 1
55PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
56#else
57PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
58#endif
59BOOTBITMAP_SIZE = LOW_PAGES / 8
60ALLOCATOR_SLOP = 4
61
62INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
63
64/*
65 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
66 * %esi points to the real-mode code as a 32-bit pointer.
67 * CS and DS must be 4 GB flat segments, but we don't depend on
68 * any particular GDT layout, because we load our own as soon as we
69 * can.
70 */
71.section .text.head,"ax",@progbits
72ENTRY(startup_32)
73
74/*
75 * Set segments to known values.
76 */
77 cld
78 lgdt boot_gdt_descr - __PAGE_OFFSET
79 movl $(__BOOT_DS),%eax
80 movl %eax,%ds
81 movl %eax,%es
82 movl %eax,%fs
83 movl %eax,%gs
84
85/*
86 * Clear BSS first so that there are no surprises...
87 * No need to cld as DF is already clear from cld above...
88 */
89 xorl %eax,%eax
90 movl $__bss_start - __PAGE_OFFSET,%edi
91 movl $__bss_stop - __PAGE_OFFSET,%ecx
92 subl %edi,%ecx
93 shrl $2,%ecx
94 rep ; stosl
95/*
96 * Copy bootup parameters out of the way.
97 * Note: %esi still has the pointer to the real-mode data.
98 * With the kexec as boot loader, parameter segment might be loaded beyond
99 * kernel image and might not even be addressable by early boot page tables.
100 * (kexec on panic case). Hence copy out the parameters before initializing
101 * page tables.
102 */
103 movl $(boot_params - __PAGE_OFFSET),%edi
104 movl $(PARAM_SIZE/4),%ecx
105 cld
106 rep
107 movsl
108 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
109 andl %esi,%esi
110 jnz 2f # New command line protocol
111 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
112 jne 1f
113 movzwl OLD_CL_OFFSET,%esi
114 addl $(OLD_CL_BASE_ADDR),%esi
1152:
116 movl $(boot_command_line - __PAGE_OFFSET),%edi
117 movl $(COMMAND_LINE_SIZE/4),%ecx
118 rep
119 movsl
1201:
121
122/*
123 * Initialize page tables. This creates a PDE and a set of page
124 * tables, which are located immediately beyond _end. The variable
125 * init_pg_tables_end is set up to point to the first "safe" location.
126 * Mappings are created both at virtual address 0 (identity mapping)
127 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
128 *
129 * Warning: don't use %esi or the stack in this code. However, %esp
130 * can be used as a GPR if you really need it...
131 */
132page_pde_offset = (__PAGE_OFFSET >> 20);
133
134 movl $(pg0 - __PAGE_OFFSET), %edi
135 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
136 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
13710:
138 leal 0x007(%edi),%ecx /* Create PDE entry */
139 movl %ecx,(%edx) /* Store identity PDE entry */
140 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
141 addl $4,%edx
142 movl $1024, %ecx
14311:
144 stosl
145 addl $0x1000,%eax
146 loop 11b
147 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
148 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
149 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
150 cmpl %ebp,%eax
151 jb 10b
152 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
153
154 xorl %ebx,%ebx /* This is the boot CPU (BSP) */
155 jmp 3f
156/*
157 * Non-boot CPU entry point; entered from trampoline.S
158 * We can't lgdt here, because lgdt itself uses a data segment, but
159 * we know the trampoline has already loaded the boot_gdt for us.
160 *
161 * If cpu hotplug is not supported then this code can go in init section
162 * which will be freed later
163 */
164
165#ifndef CONFIG_HOTPLUG_CPU
166.section .init.text,"ax",@progbits
167#endif
168
169 /* Do an early initialization of the fixmap area */
170 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
171 movl $(swapper_pg_pmd - __PAGE_OFFSET), %eax
172 addl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
173 movl %eax, 4092(%edx)
174
175#ifdef CONFIG_SMP
176ENTRY(startup_32_smp)
177 cld
178 movl $(__BOOT_DS),%eax
179 movl %eax,%ds
180 movl %eax,%es
181 movl %eax,%fs
182 movl %eax,%gs
183
184/*
185 * New page tables may be in 4Mbyte page mode and may
186 * be using the global pages.
187 *
188 * NOTE! If we are on a 486 we may have no cr4 at all!
189 * So we do not try to touch it unless we really have
190 * some bits in it to set. This won't work if the BSP
191 * implements cr4 but this AP does not -- very unlikely
192 * but be warned! The same applies to the pse feature
193 * if not equally supported. --macro
194 *
195 * NOTE! We have to correct for the fact that we're
196 * not yet offset PAGE_OFFSET..
197 */
198#define cr4_bits mmu_cr4_features-__PAGE_OFFSET
199 movl cr4_bits,%edx
200 andl %edx,%edx
201 jz 6f
202 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
203 orl %edx,%eax
204 movl %eax,%cr4
205
206 btl $5, %eax # check if PAE is enabled
207 jnc 6f
208
209 /* Check if extended functions are implemented */
210 movl $0x80000000, %eax
211 cpuid
212 cmpl $0x80000000, %eax
213 jbe 6f
214 mov $0x80000001, %eax
215 cpuid
216 /* Execute Disable bit supported? */
217 btl $20, %edx
218 jnc 6f
219
220 /* Setup EFER (Extended Feature Enable Register) */
221 movl $0xc0000080, %ecx
222 rdmsr
223
224 btsl $11, %eax
225 /* Make changes effective */
226 wrmsr
227
2286:
229 /* This is a secondary processor (AP) */
230 xorl %ebx,%ebx
231 incl %ebx
232
233#endif /* CONFIG_SMP */
2343:
235
236/*
237 * Enable paging
238 */
239 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
240 movl %eax,%cr3 /* set the page table pointer.. */
241 movl %cr0,%eax
242 orl $0x80000000,%eax
243 movl %eax,%cr0 /* ..and set paging (PG) bit */
244 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
2451:
246 /* Set up the stack pointer */
247 lss stack_start,%esp
248
249/*
250 * Initialize eflags. Some BIOS's leave bits like NT set. This would
251 * confuse the debugger if this code is traced.
252 * XXX - best to initialize before switching to protected mode.
253 */
254 pushl $0
255 popfl
256
257#ifdef CONFIG_SMP
258 andl %ebx,%ebx
259 jz 1f /* Initial CPU cleans BSS */
260 jmp checkCPUtype
2611:
262#endif /* CONFIG_SMP */
263
264/*
265 * start system 32-bit setup. We need to re-do some of the things done
266 * in 16-bit mode for the "real" operations.
267 */
268 call setup_idt
269
270checkCPUtype:
271
272 movl $-1,X86_CPUID # -1 for no CPUID initially
273
274/* check if it is 486 or 386. */
275/*
276 * XXX - this does a lot of unnecessary setup. Alignment checks don't
277 * apply at our cpl of 0 and the stack ought to be aligned already, and
278 * we don't need to preserve eflags.
279 */
280
281 movb $3,X86 # at least 386
282 pushfl # push EFLAGS
283 popl %eax # get EFLAGS
284 movl %eax,%ecx # save original EFLAGS
285 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
286 pushl %eax # copy to EFLAGS
287 popfl # set EFLAGS
288 pushfl # get new EFLAGS
289 popl %eax # put it in eax
290 xorl %ecx,%eax # change in flags
291 pushl %ecx # restore original EFLAGS
292 popfl
293 testl $0x40000,%eax # check if AC bit changed
294 je is386
295
296 movb $4,X86 # at least 486
297 testl $0x200000,%eax # check if ID bit changed
298 je is486
299
300 /* get vendor info */
301 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
302 cpuid
303 movl %eax,X86_CPUID # save CPUID level
304 movl %ebx,X86_VENDOR_ID # lo 4 chars
305 movl %edx,X86_VENDOR_ID+4 # next 4 chars
306 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
307
308 orl %eax,%eax # do we have processor info as well?
309 je is486
310
311 movl $1,%eax # Use the CPUID instruction to get CPU type
312 cpuid
313 movb %al,%cl # save reg for future use
314 andb $0x0f,%ah # mask processor family
315 movb %ah,X86
316 andb $0xf0,%al # mask model
317 shrb $4,%al
318 movb %al,X86_MODEL
319 andb $0x0f,%cl # mask mask revision
320 movb %cl,X86_MASK
321 movl %edx,X86_CAPABILITY
322
323is486: movl $0x50022,%ecx # set AM, WP, NE and MP
324 jmp 2f
325
326is386: movl $2,%ecx # set MP
3272: movl %cr0,%eax
328 andl $0x80000011,%eax # Save PG,PE,ET
329 orl %ecx,%eax
330 movl %eax,%cr0
331
332 call check_x87
333 lgdt early_gdt_descr
334 lidt idt_descr
335 ljmp $(__KERNEL_CS),$1f
3361: movl $(__KERNEL_DS),%eax # reload all the segment registers
337 movl %eax,%ss # after changing gdt.
338 movl %eax,%fs # gets reset once there's real percpu
339
340 movl $(__USER_DS),%eax # DS/ES contains default USER segment
341 movl %eax,%ds
342 movl %eax,%es
343
344 xorl %eax,%eax # Clear GS and LDT
345 movl %eax,%gs
346 lldt %ax
347
348 cld # gcc2 wants the direction flag cleared at all times
349 pushl $0 # fake return address for unwinder
350#ifdef CONFIG_SMP
351 movb ready, %cl
352 movb $1, ready
353 cmpb $0,%cl # the first CPU calls start_kernel
354 je 1f
355 movl $(__KERNEL_PERCPU), %eax
356 movl %eax,%fs # set this cpu's percpu
357 jmp initialize_secondary # all other CPUs call initialize_secondary
3581:
359#endif /* CONFIG_SMP */
360 jmp start_kernel
361
362/*
363 * We depend on ET to be correct. This checks for 287/387.
364 */
365check_x87:
366 movb $0,X86_HARD_MATH
367 clts
368 fninit
369 fstsw %ax
370 cmpb $0,%al
371 je 1f
372 movl %cr0,%eax /* no coprocessor: have to set bits */
373 xorl $4,%eax /* set EM */
374 movl %eax,%cr0
375 ret
376 ALIGN
3771: movb $1,X86_HARD_MATH
378 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
379 ret
380
381/*
382 * setup_idt
383 *
384 * sets up a idt with 256 entries pointing to
385 * ignore_int, interrupt gates. It doesn't actually load
386 * idt - that can be done only after paging has been enabled
387 * and the kernel moved to PAGE_OFFSET. Interrupts
388 * are enabled elsewhere, when we can be relatively
389 * sure everything is ok.
390 *
391 * Warning: %esi is live across this function.
392 */
393setup_idt:
394 lea ignore_int,%edx
395 movl $(__KERNEL_CS << 16),%eax
396 movw %dx,%ax /* selector = 0x0010 = cs */
397 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
398
399 lea idt_table,%edi
400 mov $256,%ecx
401rp_sidt:
402 movl %eax,(%edi)
403 movl %edx,4(%edi)
404 addl $8,%edi
405 dec %ecx
406 jne rp_sidt
407
408.macro set_early_handler handler,trapno
409 lea \handler,%edx
410 movl $(__KERNEL_CS << 16),%eax
411 movw %dx,%ax
412 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
413 lea idt_table,%edi
414 movl %eax,8*\trapno(%edi)
415 movl %edx,8*\trapno+4(%edi)
416.endm
417
418 set_early_handler handler=early_divide_err,trapno=0
419 set_early_handler handler=early_illegal_opcode,trapno=6
420 set_early_handler handler=early_protection_fault,trapno=13
421 set_early_handler handler=early_page_fault,trapno=14
422
423 ret
424
425early_divide_err:
426 xor %edx,%edx
427 pushl $0 /* fake errcode */
428 jmp early_fault
429
430early_illegal_opcode:
431 movl $6,%edx
432 pushl $0 /* fake errcode */
433 jmp early_fault
434
435early_protection_fault:
436 movl $13,%edx
437 jmp early_fault
438
439early_page_fault:
440 movl $14,%edx
441 jmp early_fault
442
443early_fault:
444 cld
445#ifdef CONFIG_PRINTK
446 movl $(__KERNEL_DS),%eax
447 movl %eax,%ds
448 movl %eax,%es
449 cmpl $2,early_recursion_flag
450 je hlt_loop
451 incl early_recursion_flag
452 movl %cr2,%eax
453 pushl %eax
454 pushl %edx /* trapno */
455 pushl $fault_msg
456#ifdef CONFIG_EARLY_PRINTK
457 call early_printk
458#else
459 call printk
460#endif
461#endif
462hlt_loop:
463 hlt
464 jmp hlt_loop
465
466/* This is the default interrupt "handler" :-) */
467 ALIGN
468ignore_int:
469 cld
470#ifdef CONFIG_PRINTK
471 pushl %eax
472 pushl %ecx
473 pushl %edx
474 pushl %es
475 pushl %ds
476 movl $(__KERNEL_DS),%eax
477 movl %eax,%ds
478 movl %eax,%es
479 cmpl $2,early_recursion_flag
480 je hlt_loop
481 incl early_recursion_flag
482 pushl 16(%esp)
483 pushl 24(%esp)
484 pushl 32(%esp)
485 pushl 40(%esp)
486 pushl $int_msg
487#ifdef CONFIG_EARLY_PRINTK
488 call early_printk
489#else
490 call printk
491#endif
492 addl $(5*4),%esp
493 popl %ds
494 popl %es
495 popl %edx
496 popl %ecx
497 popl %eax
498#endif
499 iret
500
501.section .text
502/*
503 * Real beginning of normal "text" segment
504 */
505ENTRY(stext)
506ENTRY(_stext)
507
508/*
509 * BSS section
510 */
511.section ".bss.page_aligned","wa"
512 .align PAGE_SIZE_asm
513ENTRY(swapper_pg_dir)
514 .fill 1024,4,0
515ENTRY(swapper_pg_pmd)
516 .fill 1024,4,0
517ENTRY(empty_zero_page)
518 .fill 4096,1,0
519
520/*
521 * This starts the data section.
522 */
523.data
524ENTRY(stack_start)
525 .long init_thread_union+THREAD_SIZE
526 .long __BOOT_DS
527
528ready: .byte 0
529
530early_recursion_flag:
531 .long 0
532
533int_msg:
534 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
535
536fault_msg:
537 .ascii "Int %d: CR2 %p err %p EIP %p CS %p flags %p\n"
538 .asciz "Stack: %p %p %p %p %p %p %p %p\n"
539
540#include "../xen/xen-head.S"
541
542/*
543 * The IDT and GDT 'descriptors' are a strange 48-bit object
544 * only used by the lidt and lgdt instructions. They are not
545 * like usual segment descriptors - they consist of a 16-bit
546 * segment size, and 32-bit linear address value:
547 */
548
549.globl boot_gdt_descr
550.globl idt_descr
551
552 ALIGN
553# early boot GDT descriptor (must use 1:1 address mapping)
554 .word 0 # 32 bit align gdt_desc.address
555boot_gdt_descr:
556 .word __BOOT_DS+7
557 .long boot_gdt - __PAGE_OFFSET
558
559 .word 0 # 32-bit align idt_desc.address
560idt_descr:
561 .word IDT_ENTRIES*8-1 # idt contains 256 entries
562 .long idt_table
563
564# boot GDT descriptor (later on used by CPU#0):
565 .word 0 # 32 bit align gdt_desc.address
566ENTRY(early_gdt_descr)
567 .word GDT_ENTRIES*8-1
568 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
569
570/*
571 * The boot_gdt must mirror the equivalent in setup.S and is
572 * used only for booting.
573 */
574 .align L1_CACHE_BYTES
575ENTRY(boot_gdt)
576 .fill GDT_ENTRY_BOOT_CS,8,0
577 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
578 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
diff --git a/arch/i386/kernel/reboot.c b/arch/i386/kernel/reboot.c
deleted file mode 100644
index 0d796248866c..000000000000
--- a/arch/i386/kernel/reboot.c
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * linux/arch/i386/kernel/reboot.c
3 */
4
5#include <linux/mm.h>
6#include <linux/module.h>
7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/mc146818rtc.h>
11#include <linux/efi.h>
12#include <linux/dmi.h>
13#include <linux/ctype.h>
14#include <linux/pm.h>
15#include <linux/reboot.h>
16#include <asm/uaccess.h>
17#include <asm/apic.h>
18#include <asm/desc.h>
19#include "mach_reboot.h"
20#include <asm/reboot_fixups.h>
21#include <asm/reboot.h>
22
23/*
24 * Power off function, if any
25 */
26void (*pm_power_off)(void);
27EXPORT_SYMBOL(pm_power_off);
28
29static int reboot_mode;
30static int reboot_thru_bios;
31
32#ifdef CONFIG_SMP
33static int reboot_cpu = -1;
34#endif
35static int __init reboot_setup(char *str)
36{
37 while(1) {
38 switch (*str) {
39 case 'w': /* "warm" reboot (no memory testing etc) */
40 reboot_mode = 0x1234;
41 break;
42 case 'c': /* "cold" reboot (with memory testing etc) */
43 reboot_mode = 0x0;
44 break;
45 case 'b': /* "bios" reboot by jumping through the BIOS */
46 reboot_thru_bios = 1;
47 break;
48 case 'h': /* "hard" reboot by toggling RESET and/or crashing the CPU */
49 reboot_thru_bios = 0;
50 break;
51#ifdef CONFIG_SMP
52 case 's': /* "smp" reboot by executing reset on BSP or other CPU*/
53 if (isdigit(*(str+1))) {
54 reboot_cpu = (int) (*(str+1) - '0');
55 if (isdigit(*(str+2)))
56 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
57 }
58 /* we will leave sorting out the final value
59 when we are ready to reboot, since we might not
60 have set up boot_cpu_id or smp_num_cpu */
61 break;
62#endif
63 }
64 if((str = strchr(str,',')) != NULL)
65 str++;
66 else
67 break;
68 }
69 return 1;
70}
71
72__setup("reboot=", reboot_setup);
73
74/*
75 * Reboot options and system auto-detection code provided by
76 * Dell Inc. so their systems "just work". :-)
77 */
78
79/*
80 * Some machines require the "reboot=b" commandline option, this quirk makes that automatic.
81 */
82static int __init set_bios_reboot(struct dmi_system_id *d)
83{
84 if (!reboot_thru_bios) {
85 reboot_thru_bios = 1;
86 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
87 }
88 return 0;
89}
90
91static struct dmi_system_id __initdata reboot_dmi_table[] = {
92 { /* Handle problems with rebooting on Dell E520's */
93 .callback = set_bios_reboot,
94 .ident = "Dell E520",
95 .matches = {
96 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
97 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
98 },
99 },
100 { /* Handle problems with rebooting on Dell 1300's */
101 .callback = set_bios_reboot,
102 .ident = "Dell PowerEdge 1300",
103 .matches = {
104 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
105 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
106 },
107 },
108 { /* Handle problems with rebooting on Dell 300's */
109 .callback = set_bios_reboot,
110 .ident = "Dell PowerEdge 300",
111 .matches = {
112 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
113 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
114 },
115 },
116 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
117 .callback = set_bios_reboot,
118 .ident = "Dell OptiPlex 745",
119 .matches = {
120 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
121 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
122 DMI_MATCH(DMI_BOARD_NAME, "0WF810"),
123 },
124 },
125 { /* Handle problems with rebooting on Dell 2400's */
126 .callback = set_bios_reboot,
127 .ident = "Dell PowerEdge 2400",
128 .matches = {
129 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
130 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
131 },
132 },
133 { /* Handle problems with rebooting on HP laptops */
134 .callback = set_bios_reboot,
135 .ident = "HP Compaq Laptop",
136 .matches = {
137 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
138 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
139 },
140 },
141 { }
142};
143
144static int __init reboot_init(void)
145{
146 dmi_check_system(reboot_dmi_table);
147 return 0;
148}
149
150core_initcall(reboot_init);
151
152/* The following code and data reboots the machine by switching to real
153 mode and jumping to the BIOS reset entry point, as if the CPU has
154 really been reset. The previous version asked the keyboard
155 controller to pulse the CPU reset line, which is more thorough, but
156 doesn't work with at least one type of 486 motherboard. It is easy
157 to stop this code working; hence the copious comments. */
158
159static unsigned long long
160real_mode_gdt_entries [3] =
161{
162 0x0000000000000000ULL, /* Null descriptor */
163 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
164 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
165};
166
167static struct Xgt_desc_struct
168real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
169real_mode_idt = { 0x3ff, 0 },
170no_idt = { 0, 0 };
171
172
173/* This is 16-bit protected mode code to disable paging and the cache,
174 switch to real mode and jump to the BIOS reset code.
175
176 The instruction that switches to real mode by writing to CR0 must be
177 followed immediately by a far jump instruction, which set CS to a
178 valid value for real mode, and flushes the prefetch queue to avoid
179 running instructions that have already been decoded in protected
180 mode.
181
182 Clears all the flags except ET, especially PG (paging), PE
183 (protected-mode enable) and TS (task switch for coprocessor state
184 save). Flushes the TLB after paging has been disabled. Sets CD and
185 NW, to disable the cache on a 486, and invalidates the cache. This
186 is more like the state of a 486 after reset. I don't know if
187 something else should be done for other chips.
188
189 More could be done here to set up the registers as if a CPU reset had
190 occurred; hopefully real BIOSs don't assume much. */
191
192static unsigned char real_mode_switch [] =
193{
194 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
195 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
196 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
197 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
198 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
199 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
200 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
201 0x74, 0x02, /* jz f */
202 0x0f, 0x09, /* wbinvd */
203 0x24, 0x10, /* f: andb $0x10,al */
204 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
205};
206static unsigned char jump_to_bios [] =
207{
208 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
209};
210
211/*
212 * Switch to real mode and then execute the code
213 * specified by the code and length parameters.
214 * We assume that length will aways be less that 100!
215 */
216void machine_real_restart(unsigned char *code, int length)
217{
218 local_irq_disable();
219
220 /* Write zero to CMOS register number 0x0f, which the BIOS POST
221 routine will recognize as telling it to do a proper reboot. (Well
222 that's what this book in front of me says -- it may only apply to
223 the Phoenix BIOS though, it's not clear). At the same time,
224 disable NMIs by setting the top bit in the CMOS address register,
225 as we're about to do peculiar things to the CPU. I'm not sure if
226 `outb_p' is needed instead of just `outb'. Use it to be on the
227 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
228 */
229
230 spin_lock(&rtc_lock);
231 CMOS_WRITE(0x00, 0x8f);
232 spin_unlock(&rtc_lock);
233
234 /* Remap the kernel at virtual address zero, as well as offset zero
235 from the kernel segment. This assumes the kernel segment starts at
236 virtual address PAGE_OFFSET. */
237
238 memcpy (swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
239 sizeof (swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
240
241 /*
242 * Use `swapper_pg_dir' as our page directory.
243 */
244 load_cr3(swapper_pg_dir);
245
246 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
247 this on booting to tell it to "Bypass memory test (also warm
248 boot)". This seems like a fairly standard thing that gets set by
249 REBOOT.COM programs, and the previous reset routine did this
250 too. */
251
252 *((unsigned short *)0x472) = reboot_mode;
253
254 /* For the switch to real mode, copy some code to low memory. It has
255 to be in the first 64k because it is running in 16-bit mode, and it
256 has to have the same physical and virtual address, because it turns
257 off paging. Copy it near the end of the first page, out of the way
258 of BIOS variables. */
259
260 memcpy ((void *) (0x1000 - sizeof (real_mode_switch) - 100),
261 real_mode_switch, sizeof (real_mode_switch));
262 memcpy ((void *) (0x1000 - 100), code, length);
263
264 /* Set up the IDT for real mode. */
265
266 load_idt(&real_mode_idt);
267
268 /* Set up a GDT from which we can load segment descriptors for real
269 mode. The GDT is not used in real mode; it is just needed here to
270 prepare the descriptors. */
271
272 load_gdt(&real_mode_gdt);
273
274 /* Load the data segment registers, and thus the descriptors ready for
275 real mode. The base address of each segment is 0x100, 16 times the
276 selector value being loaded here. This is so that the segment
277 registers don't have to be reloaded after switching to real mode:
278 the values are consistent for real mode operation already. */
279
280 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
281 "\tmovl %%eax,%%ds\n"
282 "\tmovl %%eax,%%es\n"
283 "\tmovl %%eax,%%fs\n"
284 "\tmovl %%eax,%%gs\n"
285 "\tmovl %%eax,%%ss" : : : "eax");
286
287 /* Jump to the 16-bit code that we copied earlier. It disables paging
288 and the cache, switches to real mode, and jumps to the BIOS reset
289 entry point. */
290
291 __asm__ __volatile__ ("ljmp $0x0008,%0"
292 :
293 : "i" ((void *) (0x1000 - sizeof (real_mode_switch) - 100)));
294}
295#ifdef CONFIG_APM_MODULE
296EXPORT_SYMBOL(machine_real_restart);
297#endif
298
299static void native_machine_shutdown(void)
300{
301#ifdef CONFIG_SMP
302 int reboot_cpu_id;
303
304 /* The boot cpu is always logical cpu 0 */
305 reboot_cpu_id = 0;
306
307 /* See if there has been given a command line override */
308 if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
309 cpu_isset(reboot_cpu, cpu_online_map)) {
310 reboot_cpu_id = reboot_cpu;
311 }
312
313 /* Make certain the cpu I'm rebooting on is online */
314 if (!cpu_isset(reboot_cpu_id, cpu_online_map)) {
315 reboot_cpu_id = smp_processor_id();
316 }
317
318 /* Make certain I only run on the appropriate processor */
319 set_cpus_allowed(current, cpumask_of_cpu(reboot_cpu_id));
320
321 /* O.K. Now that I'm on the appropriate processor, stop
322 * all of the others, and disable their local APICs.
323 */
324
325 smp_send_stop();
326#endif /* CONFIG_SMP */
327
328 lapic_shutdown();
329
330#ifdef CONFIG_X86_IO_APIC
331 disable_IO_APIC();
332#endif
333}
334
335void __attribute__((weak)) mach_reboot_fixups(void)
336{
337}
338
339static void native_machine_emergency_restart(void)
340{
341 if (!reboot_thru_bios) {
342 if (efi_enabled) {
343 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
344 load_idt(&no_idt);
345 __asm__ __volatile__("int3");
346 }
347 /* rebooting needs to touch the page at absolute addr 0 */
348 *((unsigned short *)__va(0x472)) = reboot_mode;
349 for (;;) {
350 mach_reboot_fixups(); /* for board specific fixups */
351 mach_reboot();
352 /* That didn't work - force a triple fault.. */
353 load_idt(&no_idt);
354 __asm__ __volatile__("int3");
355 }
356 }
357 if (efi_enabled)
358 efi.reset_system(EFI_RESET_WARM, EFI_SUCCESS, 0, NULL);
359
360 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
361}
362
363static void native_machine_restart(char * __unused)
364{
365 machine_shutdown();
366 machine_emergency_restart();
367}
368
369static void native_machine_halt(void)
370{
371}
372
373static void native_machine_power_off(void)
374{
375 if (pm_power_off) {
376 machine_shutdown();
377 pm_power_off();
378 }
379}
380
381
382struct machine_ops machine_ops = {
383 .power_off = native_machine_power_off,
384 .shutdown = native_machine_shutdown,
385 .emergency_restart = native_machine_emergency_restart,
386 .restart = native_machine_restart,
387 .halt = native_machine_halt,
388};
389
390void machine_power_off(void)
391{
392 machine_ops.power_off();
393}
394
395void machine_shutdown(void)
396{
397 machine_ops.shutdown();
398}
399
400void machine_emergency_restart(void)
401{
402 machine_ops.emergency_restart();
403}
404
405void machine_restart(char *cmd)
406{
407 machine_ops.restart(cmd);
408}
409
410void machine_halt(void)
411{
412 machine_ops.halt();
413}
diff --git a/arch/i386/kernel/signal.c b/arch/i386/kernel/signal.c
deleted file mode 100644
index f5dd85656c18..000000000000
--- a/arch/i386/kernel/signal.c
+++ /dev/null
@@ -1,667 +0,0 @@
1/*
2 * linux/arch/i386/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
7 * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes
8 */
9
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/kernel.h>
14#include <linux/signal.h>
15#include <linux/errno.h>
16#include <linux/wait.h>
17#include <linux/unistd.h>
18#include <linux/stddef.h>
19#include <linux/personality.h>
20#include <linux/suspend.h>
21#include <linux/ptrace.h>
22#include <linux/elf.h>
23#include <linux/binfmts.h>
24#include <asm/processor.h>
25#include <asm/ucontext.h>
26#include <asm/uaccess.h>
27#include <asm/i387.h>
28#include "sigframe.h"
29
30#define DEBUG_SIG 0
31
32#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
33
34/*
35 * Atomically swap in the new signal mask, and wait for a signal.
36 */
37asmlinkage int
38sys_sigsuspend(int history0, int history1, old_sigset_t mask)
39{
40 mask &= _BLOCKABLE;
41 spin_lock_irq(&current->sighand->siglock);
42 current->saved_sigmask = current->blocked;
43 siginitset(&current->blocked, mask);
44 recalc_sigpending();
45 spin_unlock_irq(&current->sighand->siglock);
46
47 current->state = TASK_INTERRUPTIBLE;
48 schedule();
49 set_thread_flag(TIF_RESTORE_SIGMASK);
50 return -ERESTARTNOHAND;
51}
52
53asmlinkage int
54sys_sigaction(int sig, const struct old_sigaction __user *act,
55 struct old_sigaction __user *oact)
56{
57 struct k_sigaction new_ka, old_ka;
58 int ret;
59
60 if (act) {
61 old_sigset_t mask;
62 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
63 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
64 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
65 return -EFAULT;
66 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
67 __get_user(mask, &act->sa_mask);
68 siginitset(&new_ka.sa.sa_mask, mask);
69 }
70
71 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
72
73 if (!ret && oact) {
74 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
75 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
76 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
77 return -EFAULT;
78 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
79 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
80 }
81
82 return ret;
83}
84
85asmlinkage int
86sys_sigaltstack(unsigned long ebx)
87{
88 /* This is needed to make gcc realize it doesn't own the "struct pt_regs" */
89 struct pt_regs *regs = (struct pt_regs *)&ebx;
90 const stack_t __user *uss = (const stack_t __user *)ebx;
91 stack_t __user *uoss = (stack_t __user *)regs->ecx;
92
93 return do_sigaltstack(uss, uoss, regs->esp);
94}
95
96
97/*
98 * Do a signal return; undo the signal stack.
99 */
100
101static int
102restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *peax)
103{
104 unsigned int err = 0;
105
106 /* Always make any pending restarted system calls return -EINTR */
107 current_thread_info()->restart_block.fn = do_no_restart_syscall;
108
109#define COPY(x) err |= __get_user(regs->x, &sc->x)
110
111#define COPY_SEG(seg) \
112 { unsigned short tmp; \
113 err |= __get_user(tmp, &sc->seg); \
114 regs->x##seg = tmp; }
115
116#define COPY_SEG_STRICT(seg) \
117 { unsigned short tmp; \
118 err |= __get_user(tmp, &sc->seg); \
119 regs->x##seg = tmp|3; }
120
121#define GET_SEG(seg) \
122 { unsigned short tmp; \
123 err |= __get_user(tmp, &sc->seg); \
124 loadsegment(seg,tmp); }
125
126#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_RF | \
127 X86_EFLAGS_OF | X86_EFLAGS_DF | \
128 X86_EFLAGS_TF | X86_EFLAGS_SF | X86_EFLAGS_ZF | \
129 X86_EFLAGS_AF | X86_EFLAGS_PF | X86_EFLAGS_CF)
130
131 GET_SEG(gs);
132 COPY_SEG(fs);
133 COPY_SEG(es);
134 COPY_SEG(ds);
135 COPY(edi);
136 COPY(esi);
137 COPY(ebp);
138 COPY(esp);
139 COPY(ebx);
140 COPY(edx);
141 COPY(ecx);
142 COPY(eip);
143 COPY_SEG_STRICT(cs);
144 COPY_SEG_STRICT(ss);
145
146 {
147 unsigned int tmpflags;
148 err |= __get_user(tmpflags, &sc->eflags);
149 regs->eflags = (regs->eflags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
150 regs->orig_eax = -1; /* disable syscall checks */
151 }
152
153 {
154 struct _fpstate __user * buf;
155 err |= __get_user(buf, &sc->fpstate);
156 if (buf) {
157 if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
158 goto badframe;
159 err |= restore_i387(buf);
160 } else {
161 struct task_struct *me = current;
162 if (used_math()) {
163 clear_fpu(me);
164 clear_used_math();
165 }
166 }
167 }
168
169 err |= __get_user(*peax, &sc->eax);
170 return err;
171
172badframe:
173 return 1;
174}
175
176asmlinkage int sys_sigreturn(unsigned long __unused)
177{
178 struct pt_regs *regs = (struct pt_regs *) &__unused;
179 struct sigframe __user *frame = (struct sigframe __user *)(regs->esp - 8);
180 sigset_t set;
181 int eax;
182
183 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
184 goto badframe;
185 if (__get_user(set.sig[0], &frame->sc.oldmask)
186 || (_NSIG_WORDS > 1
187 && __copy_from_user(&set.sig[1], &frame->extramask,
188 sizeof(frame->extramask))))
189 goto badframe;
190
191 sigdelsetmask(&set, ~_BLOCKABLE);
192 spin_lock_irq(&current->sighand->siglock);
193 current->blocked = set;
194 recalc_sigpending();
195 spin_unlock_irq(&current->sighand->siglock);
196
197 if (restore_sigcontext(regs, &frame->sc, &eax))
198 goto badframe;
199 return eax;
200
201badframe:
202 if (show_unhandled_signals && printk_ratelimit())
203 printk("%s%s[%d] bad frame in sigreturn frame:%p eip:%lx"
204 " esp:%lx oeax:%lx\n",
205 current->pid > 1 ? KERN_INFO : KERN_EMERG,
206 current->comm, current->pid, frame, regs->eip,
207 regs->esp, regs->orig_eax);
208
209 force_sig(SIGSEGV, current);
210 return 0;
211}
212
213asmlinkage int sys_rt_sigreturn(unsigned long __unused)
214{
215 struct pt_regs *regs = (struct pt_regs *) &__unused;
216 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(regs->esp - 4);
217 sigset_t set;
218 int eax;
219
220 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
221 goto badframe;
222 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
223 goto badframe;
224
225 sigdelsetmask(&set, ~_BLOCKABLE);
226 spin_lock_irq(&current->sighand->siglock);
227 current->blocked = set;
228 recalc_sigpending();
229 spin_unlock_irq(&current->sighand->siglock);
230
231 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &eax))
232 goto badframe;
233
234 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->esp) == -EFAULT)
235 goto badframe;
236
237 return eax;
238
239badframe:
240 force_sig(SIGSEGV, current);
241 return 0;
242}
243
244/*
245 * Set up a signal frame.
246 */
247
248static int
249setup_sigcontext(struct sigcontext __user *sc, struct _fpstate __user *fpstate,
250 struct pt_regs *regs, unsigned long mask)
251{
252 int tmp, err = 0;
253
254 err |= __put_user(regs->xfs, (unsigned int __user *)&sc->fs);
255 savesegment(gs, tmp);
256 err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
257
258 err |= __put_user(regs->xes, (unsigned int __user *)&sc->es);
259 err |= __put_user(regs->xds, (unsigned int __user *)&sc->ds);
260 err |= __put_user(regs->edi, &sc->edi);
261 err |= __put_user(regs->esi, &sc->esi);
262 err |= __put_user(regs->ebp, &sc->ebp);
263 err |= __put_user(regs->esp, &sc->esp);
264 err |= __put_user(regs->ebx, &sc->ebx);
265 err |= __put_user(regs->edx, &sc->edx);
266 err |= __put_user(regs->ecx, &sc->ecx);
267 err |= __put_user(regs->eax, &sc->eax);
268 err |= __put_user(current->thread.trap_no, &sc->trapno);
269 err |= __put_user(current->thread.error_code, &sc->err);
270 err |= __put_user(regs->eip, &sc->eip);
271 err |= __put_user(regs->xcs, (unsigned int __user *)&sc->cs);
272 err |= __put_user(regs->eflags, &sc->eflags);
273 err |= __put_user(regs->esp, &sc->esp_at_signal);
274 err |= __put_user(regs->xss, (unsigned int __user *)&sc->ss);
275
276 tmp = save_i387(fpstate);
277 if (tmp < 0)
278 err = 1;
279 else
280 err |= __put_user(tmp ? fpstate : NULL, &sc->fpstate);
281
282 /* non-iBCS2 extensions.. */
283 err |= __put_user(mask, &sc->oldmask);
284 err |= __put_user(current->thread.cr2, &sc->cr2);
285
286 return err;
287}
288
289/*
290 * Determine which stack to use..
291 */
292static inline void __user *
293get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)
294{
295 unsigned long esp;
296
297 /* Default to using normal stack */
298 esp = regs->esp;
299
300 /* This is the X/Open sanctioned signal stack switching. */
301 if (ka->sa.sa_flags & SA_ONSTACK) {
302 if (sas_ss_flags(esp) == 0)
303 esp = current->sas_ss_sp + current->sas_ss_size;
304 }
305
306 /* This is the legacy signal stack switching. */
307 else if ((regs->xss & 0xffff) != __USER_DS &&
308 !(ka->sa.sa_flags & SA_RESTORER) &&
309 ka->sa.sa_restorer) {
310 esp = (unsigned long) ka->sa.sa_restorer;
311 }
312
313 esp -= frame_size;
314 /* Align the stack pointer according to the i386 ABI,
315 * i.e. so that on function entry ((sp + 4) & 15) == 0. */
316 esp = ((esp + 4) & -16ul) - 4;
317 return (void __user *) esp;
318}
319
320/* These symbols are defined with the addresses in the vsyscall page.
321 See vsyscall-sigreturn.S. */
322extern void __user __kernel_sigreturn;
323extern void __user __kernel_rt_sigreturn;
324
325static int setup_frame(int sig, struct k_sigaction *ka,
326 sigset_t *set, struct pt_regs * regs)
327{
328 void __user *restorer;
329 struct sigframe __user *frame;
330 int err = 0;
331 int usig;
332
333 frame = get_sigframe(ka, regs, sizeof(*frame));
334
335 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
336 goto give_sigsegv;
337
338 usig = current_thread_info()->exec_domain
339 && current_thread_info()->exec_domain->signal_invmap
340 && sig < 32
341 ? current_thread_info()->exec_domain->signal_invmap[sig]
342 : sig;
343
344 err = __put_user(usig, &frame->sig);
345 if (err)
346 goto give_sigsegv;
347
348 err = setup_sigcontext(&frame->sc, &frame->fpstate, regs, set->sig[0]);
349 if (err)
350 goto give_sigsegv;
351
352 if (_NSIG_WORDS > 1) {
353 err = __copy_to_user(&frame->extramask, &set->sig[1],
354 sizeof(frame->extramask));
355 if (err)
356 goto give_sigsegv;
357 }
358
359 if (current->binfmt->hasvdso)
360 restorer = (void *)VDSO_SYM(&__kernel_sigreturn);
361 else
362 restorer = (void *)&frame->retcode;
363 if (ka->sa.sa_flags & SA_RESTORER)
364 restorer = ka->sa.sa_restorer;
365
366 /* Set up to return from userspace. */
367 err |= __put_user(restorer, &frame->pretcode);
368
369 /*
370 * This is popl %eax ; movl $,%eax ; int $0x80
371 *
372 * WE DO NOT USE IT ANY MORE! It's only left here for historical
373 * reasons and because gdb uses it as a signature to notice
374 * signal handler stack frames.
375 */
376 err |= __put_user(0xb858, (short __user *)(frame->retcode+0));
377 err |= __put_user(__NR_sigreturn, (int __user *)(frame->retcode+2));
378 err |= __put_user(0x80cd, (short __user *)(frame->retcode+6));
379
380 if (err)
381 goto give_sigsegv;
382
383 /* Set up registers for signal handler */
384 regs->esp = (unsigned long) frame;
385 regs->eip = (unsigned long) ka->sa.sa_handler;
386 regs->eax = (unsigned long) sig;
387 regs->edx = (unsigned long) 0;
388 regs->ecx = (unsigned long) 0;
389
390 set_fs(USER_DS);
391 regs->xds = __USER_DS;
392 regs->xes = __USER_DS;
393 regs->xss = __USER_DS;
394 regs->xcs = __USER_CS;
395
396 /*
397 * Clear TF when entering the signal handler, but
398 * notify any tracer that was single-stepping it.
399 * The tracer may want to single-step inside the
400 * handler too.
401 */
402 regs->eflags &= ~TF_MASK;
403 if (test_thread_flag(TIF_SINGLESTEP))
404 ptrace_notify(SIGTRAP);
405
406#if DEBUG_SIG
407 printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n",
408 current->comm, current->pid, frame, regs->eip, frame->pretcode);
409#endif
410
411 return 0;
412
413give_sigsegv:
414 force_sigsegv(sig, current);
415 return -EFAULT;
416}
417
418static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
419 sigset_t *set, struct pt_regs * regs)
420{
421 void __user *restorer;
422 struct rt_sigframe __user *frame;
423 int err = 0;
424 int usig;
425
426 frame = get_sigframe(ka, regs, sizeof(*frame));
427
428 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
429 goto give_sigsegv;
430
431 usig = current_thread_info()->exec_domain
432 && current_thread_info()->exec_domain->signal_invmap
433 && sig < 32
434 ? current_thread_info()->exec_domain->signal_invmap[sig]
435 : sig;
436
437 err |= __put_user(usig, &frame->sig);
438 err |= __put_user(&frame->info, &frame->pinfo);
439 err |= __put_user(&frame->uc, &frame->puc);
440 err |= copy_siginfo_to_user(&frame->info, info);
441 if (err)
442 goto give_sigsegv;
443
444 /* Create the ucontext. */
445 err |= __put_user(0, &frame->uc.uc_flags);
446 err |= __put_user(0, &frame->uc.uc_link);
447 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
448 err |= __put_user(sas_ss_flags(regs->esp),
449 &frame->uc.uc_stack.ss_flags);
450 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
451 err |= setup_sigcontext(&frame->uc.uc_mcontext, &frame->fpstate,
452 regs, set->sig[0]);
453 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
454 if (err)
455 goto give_sigsegv;
456
457 /* Set up to return from userspace. */
458 restorer = (void *)VDSO_SYM(&__kernel_rt_sigreturn);
459 if (ka->sa.sa_flags & SA_RESTORER)
460 restorer = ka->sa.sa_restorer;
461 err |= __put_user(restorer, &frame->pretcode);
462
463 /*
464 * This is movl $,%eax ; int $0x80
465 *
466 * WE DO NOT USE IT ANY MORE! It's only left here for historical
467 * reasons and because gdb uses it as a signature to notice
468 * signal handler stack frames.
469 */
470 err |= __put_user(0xb8, (char __user *)(frame->retcode+0));
471 err |= __put_user(__NR_rt_sigreturn, (int __user *)(frame->retcode+1));
472 err |= __put_user(0x80cd, (short __user *)(frame->retcode+5));
473
474 if (err)
475 goto give_sigsegv;
476
477 /* Set up registers for signal handler */
478 regs->esp = (unsigned long) frame;
479 regs->eip = (unsigned long) ka->sa.sa_handler;
480 regs->eax = (unsigned long) usig;
481 regs->edx = (unsigned long) &frame->info;
482 regs->ecx = (unsigned long) &frame->uc;
483
484 set_fs(USER_DS);
485 regs->xds = __USER_DS;
486 regs->xes = __USER_DS;
487 regs->xss = __USER_DS;
488 regs->xcs = __USER_CS;
489
490 /*
491 * Clear TF when entering the signal handler, but
492 * notify any tracer that was single-stepping it.
493 * The tracer may want to single-step inside the
494 * handler too.
495 */
496 regs->eflags &= ~TF_MASK;
497 if (test_thread_flag(TIF_SINGLESTEP))
498 ptrace_notify(SIGTRAP);
499
500#if DEBUG_SIG
501 printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n",
502 current->comm, current->pid, frame, regs->eip, frame->pretcode);
503#endif
504
505 return 0;
506
507give_sigsegv:
508 force_sigsegv(sig, current);
509 return -EFAULT;
510}
511
512/*
513 * OK, we're invoking a handler
514 */
515
516static int
517handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
518 sigset_t *oldset, struct pt_regs * regs)
519{
520 int ret;
521
522 /* Are we from a system call? */
523 if (regs->orig_eax >= 0) {
524 /* If so, check system call restarting.. */
525 switch (regs->eax) {
526 case -ERESTART_RESTARTBLOCK:
527 case -ERESTARTNOHAND:
528 regs->eax = -EINTR;
529 break;
530
531 case -ERESTARTSYS:
532 if (!(ka->sa.sa_flags & SA_RESTART)) {
533 regs->eax = -EINTR;
534 break;
535 }
536 /* fallthrough */
537 case -ERESTARTNOINTR:
538 regs->eax = regs->orig_eax;
539 regs->eip -= 2;
540 }
541 }
542
543 /*
544 * If TF is set due to a debugger (PT_DTRACE), clear the TF flag so
545 * that register information in the sigcontext is correct.
546 */
547 if (unlikely(regs->eflags & TF_MASK)
548 && likely(current->ptrace & PT_DTRACE)) {
549 current->ptrace &= ~PT_DTRACE;
550 regs->eflags &= ~TF_MASK;
551 }
552
553 /* Set up the stack frame */
554 if (ka->sa.sa_flags & SA_SIGINFO)
555 ret = setup_rt_frame(sig, ka, info, oldset, regs);
556 else
557 ret = setup_frame(sig, ka, oldset, regs);
558
559 if (ret == 0) {
560 spin_lock_irq(&current->sighand->siglock);
561 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
562 if (!(ka->sa.sa_flags & SA_NODEFER))
563 sigaddset(&current->blocked,sig);
564 recalc_sigpending();
565 spin_unlock_irq(&current->sighand->siglock);
566 }
567
568 return ret;
569}
570
571/*
572 * Note that 'init' is a special process: it doesn't get signals it doesn't
573 * want to handle. Thus you cannot kill init even with a SIGKILL even by
574 * mistake.
575 */
576static void fastcall do_signal(struct pt_regs *regs)
577{
578 siginfo_t info;
579 int signr;
580 struct k_sigaction ka;
581 sigset_t *oldset;
582
583 /*
584 * We want the common case to go fast, which
585 * is why we may in certain cases get here from
586 * kernel mode. Just return without doing anything
587 * if so. vm86 regs switched out by assembly code
588 * before reaching here, so testing against kernel
589 * CS suffices.
590 */
591 if (!user_mode(regs))
592 return;
593
594 if (test_thread_flag(TIF_RESTORE_SIGMASK))
595 oldset = &current->saved_sigmask;
596 else
597 oldset = &current->blocked;
598
599 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
600 if (signr > 0) {
601 /* Reenable any watchpoints before delivering the
602 * signal to user space. The processor register will
603 * have been cleared if the watchpoint triggered
604 * inside the kernel.
605 */
606 if (unlikely(current->thread.debugreg[7]))
607 set_debugreg(current->thread.debugreg[7], 7);
608
609 /* Whee! Actually deliver the signal. */
610 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
611 /* a signal was successfully delivered; the saved
612 * sigmask will have been stored in the signal frame,
613 * and will be restored by sigreturn, so we can simply
614 * clear the TIF_RESTORE_SIGMASK flag */
615 if (test_thread_flag(TIF_RESTORE_SIGMASK))
616 clear_thread_flag(TIF_RESTORE_SIGMASK);
617 }
618
619 return;
620 }
621
622 /* Did we come from a system call? */
623 if (regs->orig_eax >= 0) {
624 /* Restart the system call - no handlers present */
625 switch (regs->eax) {
626 case -ERESTARTNOHAND:
627 case -ERESTARTSYS:
628 case -ERESTARTNOINTR:
629 regs->eax = regs->orig_eax;
630 regs->eip -= 2;
631 break;
632
633 case -ERESTART_RESTARTBLOCK:
634 regs->eax = __NR_restart_syscall;
635 regs->eip -= 2;
636 break;
637 }
638 }
639
640 /* if there's no signal to deliver, we just put the saved sigmask
641 * back */
642 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
643 clear_thread_flag(TIF_RESTORE_SIGMASK);
644 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
645 }
646}
647
648/*
649 * notification of userspace execution resumption
650 * - triggered by the TIF_WORK_MASK flags
651 */
652__attribute__((regparm(3)))
653void do_notify_resume(struct pt_regs *regs, void *_unused,
654 __u32 thread_info_flags)
655{
656 /* Pending single-step? */
657 if (thread_info_flags & _TIF_SINGLESTEP) {
658 regs->eflags |= TF_MASK;
659 clear_thread_flag(TIF_SINGLESTEP);
660 }
661
662 /* deal with pending signal delivery */
663 if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
664 do_signal(regs);
665
666 clear_thread_flag(TIF_IRET);
667}
diff --git a/arch/i386/kernel/tsc.c b/arch/i386/kernel/tsc.c
deleted file mode 100644
index a39280b4dd3a..000000000000
--- a/arch/i386/kernel/tsc.c
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
3 * which was originally moved from arch/i386/kernel/time.c.
4 * See comments there for proper credits.
5 */
6
7#include <linux/sched.h>
8#include <linux/clocksource.h>
9#include <linux/workqueue.h>
10#include <linux/cpufreq.h>
11#include <linux/jiffies.h>
12#include <linux/init.h>
13#include <linux/dmi.h>
14
15#include <asm/delay.h>
16#include <asm/tsc.h>
17#include <asm/io.h>
18#include <asm/timer.h>
19
20#include "mach_timer.h"
21
22static int tsc_enabled;
23
24/*
25 * On some systems the TSC frequency does not
26 * change with the cpu frequency. So we need
27 * an extra value to store the TSC freq
28 */
29unsigned int tsc_khz;
30EXPORT_SYMBOL_GPL(tsc_khz);
31
32int tsc_disable;
33
34#ifdef CONFIG_X86_TSC
35static int __init tsc_setup(char *str)
36{
37 printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
38 "cannot disable TSC.\n");
39 return 1;
40}
41#else
42/*
43 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
44 * in cpu/common.c
45 */
46static int __init tsc_setup(char *str)
47{
48 tsc_disable = 1;
49
50 return 1;
51}
52#endif
53
54__setup("notsc", tsc_setup);
55
56/*
57 * code to mark and check if the TSC is unstable
58 * due to cpufreq or due to unsynced TSCs
59 */
60static int tsc_unstable;
61
62int check_tsc_unstable(void)
63{
64 return tsc_unstable;
65}
66EXPORT_SYMBOL_GPL(check_tsc_unstable);
67
68/* Accellerators for sched_clock()
69 * convert from cycles(64bits) => nanoseconds (64bits)
70 * basic equation:
71 * ns = cycles / (freq / ns_per_sec)
72 * ns = cycles * (ns_per_sec / freq)
73 * ns = cycles * (10^9 / (cpu_khz * 10^3))
74 * ns = cycles * (10^6 / cpu_khz)
75 *
76 * Then we use scaling math (suggested by george@mvista.com) to get:
77 * ns = cycles * (10^6 * SC / cpu_khz) / SC
78 * ns = cycles * cyc2ns_scale / SC
79 *
80 * And since SC is a constant power of two, we can convert the div
81 * into a shift.
82 *
83 * We can use khz divisor instead of mhz to keep a better percision, since
84 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
85 * (mathieu.desnoyers@polymtl.ca)
86 *
87 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
88 */
89unsigned long cyc2ns_scale __read_mostly;
90
91#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
92
93static inline void set_cyc2ns_scale(unsigned long cpu_khz)
94{
95 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
96}
97
98/*
99 * Scheduler clock - returns current time in nanosec units.
100 */
101unsigned long long native_sched_clock(void)
102{
103 unsigned long long this_offset;
104
105 /*
106 * Fall back to jiffies if there's no TSC available:
107 * ( But note that we still use it if the TSC is marked
108 * unstable. We do this because unlike Time Of Day,
109 * the scheduler clock tolerates small errors and it's
110 * very important for it to be as fast as the platform
111 * can achive it. )
112 */
113 if (unlikely(!tsc_enabled && !tsc_unstable))
114 /* No locking but a rare wrong value is not a big deal: */
115 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
116
117 /* read the Time Stamp Counter: */
118 rdtscll(this_offset);
119
120 /* return the value in ns */
121 return cycles_2_ns(this_offset);
122}
123
124/* We need to define a real function for sched_clock, to override the
125 weak default version */
126#ifdef CONFIG_PARAVIRT
127unsigned long long sched_clock(void)
128{
129 return paravirt_sched_clock();
130}
131#else
132unsigned long long sched_clock(void)
133 __attribute__((alias("native_sched_clock")));
134#endif
135
136unsigned long native_calculate_cpu_khz(void)
137{
138 unsigned long long start, end;
139 unsigned long count;
140 u64 delta64;
141 int i;
142 unsigned long flags;
143
144 local_irq_save(flags);
145
146 /* run 3 times to ensure the cache is warm */
147 for (i = 0; i < 3; i++) {
148 mach_prepare_counter();
149 rdtscll(start);
150 mach_countup(&count);
151 rdtscll(end);
152 }
153 /*
154 * Error: ECTCNEVERSET
155 * The CTC wasn't reliable: we got a hit on the very first read,
156 * or the CPU was so fast/slow that the quotient wouldn't fit in
157 * 32 bits..
158 */
159 if (count <= 1)
160 goto err;
161
162 delta64 = end - start;
163
164 /* cpu freq too fast: */
165 if (delta64 > (1ULL<<32))
166 goto err;
167
168 /* cpu freq too slow: */
169 if (delta64 <= CALIBRATE_TIME_MSEC)
170 goto err;
171
172 delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
173 do_div(delta64,CALIBRATE_TIME_MSEC);
174
175 local_irq_restore(flags);
176 return (unsigned long)delta64;
177err:
178 local_irq_restore(flags);
179 return 0;
180}
181
182int recalibrate_cpu_khz(void)
183{
184#ifndef CONFIG_SMP
185 unsigned long cpu_khz_old = cpu_khz;
186
187 if (cpu_has_tsc) {
188 cpu_khz = calculate_cpu_khz();
189 tsc_khz = cpu_khz;
190 cpu_data[0].loops_per_jiffy =
191 cpufreq_scale(cpu_data[0].loops_per_jiffy,
192 cpu_khz_old, cpu_khz);
193 return 0;
194 } else
195 return -ENODEV;
196#else
197 return -ENODEV;
198#endif
199}
200
201EXPORT_SYMBOL(recalibrate_cpu_khz);
202
203#ifdef CONFIG_CPU_FREQ
204
205/*
206 * if the CPU frequency is scaled, TSC-based delays will need a different
207 * loops_per_jiffy value to function properly.
208 */
209static unsigned int ref_freq = 0;
210static unsigned long loops_per_jiffy_ref = 0;
211static unsigned long cpu_khz_ref = 0;
212
213static int
214time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
215{
216 struct cpufreq_freqs *freq = data;
217
218 if (!ref_freq) {
219 if (!freq->old){
220 ref_freq = freq->new;
221 return 0;
222 }
223 ref_freq = freq->old;
224 loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
225 cpu_khz_ref = cpu_khz;
226 }
227
228 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
229 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
230 (val == CPUFREQ_RESUMECHANGE)) {
231 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
232 cpu_data[freq->cpu].loops_per_jiffy =
233 cpufreq_scale(loops_per_jiffy_ref,
234 ref_freq, freq->new);
235
236 if (cpu_khz) {
237
238 if (num_online_cpus() == 1)
239 cpu_khz = cpufreq_scale(cpu_khz_ref,
240 ref_freq, freq->new);
241 if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
242 tsc_khz = cpu_khz;
243 set_cyc2ns_scale(cpu_khz);
244 /*
245 * TSC based sched_clock turns
246 * to junk w/ cpufreq
247 */
248 mark_tsc_unstable("cpufreq changes");
249 }
250 }
251 }
252
253 return 0;
254}
255
256static struct notifier_block time_cpufreq_notifier_block = {
257 .notifier_call = time_cpufreq_notifier
258};
259
260static int __init cpufreq_tsc(void)
261{
262 return cpufreq_register_notifier(&time_cpufreq_notifier_block,
263 CPUFREQ_TRANSITION_NOTIFIER);
264}
265core_initcall(cpufreq_tsc);
266
267#endif
268
269/* clock source code */
270
271static unsigned long current_tsc_khz = 0;
272
273static cycle_t read_tsc(void)
274{
275 cycle_t ret;
276
277 rdtscll(ret);
278
279 return ret;
280}
281
282static struct clocksource clocksource_tsc = {
283 .name = "tsc",
284 .rating = 300,
285 .read = read_tsc,
286 .mask = CLOCKSOURCE_MASK(64),
287 .mult = 0, /* to be set */
288 .shift = 22,
289 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
290 CLOCK_SOURCE_MUST_VERIFY,
291};
292
293void mark_tsc_unstable(char *reason)
294{
295 if (!tsc_unstable) {
296 tsc_unstable = 1;
297 tsc_enabled = 0;
298 printk("Marking TSC unstable due to: %s.\n", reason);
299 /* Can be called before registration */
300 if (clocksource_tsc.mult)
301 clocksource_change_rating(&clocksource_tsc, 0);
302 else
303 clocksource_tsc.rating = 0;
304 }
305}
306EXPORT_SYMBOL_GPL(mark_tsc_unstable);
307
308static int __init dmi_mark_tsc_unstable(struct dmi_system_id *d)
309{
310 printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
311 d->ident);
312 tsc_unstable = 1;
313 return 0;
314}
315
316/* List of systems that have known TSC problems */
317static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
318 {
319 .callback = dmi_mark_tsc_unstable,
320 .ident = "IBM Thinkpad 380XD",
321 .matches = {
322 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
323 DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
324 },
325 },
326 {}
327};
328
329/*
330 * Make an educated guess if the TSC is trustworthy and synchronized
331 * over all CPUs.
332 */
333__cpuinit int unsynchronized_tsc(void)
334{
335 if (!cpu_has_tsc || tsc_unstable)
336 return 1;
337 /*
338 * Intel systems are normally all synchronized.
339 * Exceptions must mark TSC as unstable:
340 */
341 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
342 /* assume multi socket systems are not synchronized: */
343 if (num_possible_cpus() > 1)
344 tsc_unstable = 1;
345 }
346 return tsc_unstable;
347}
348
349/*
350 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
351 */
352#ifdef CONFIG_MGEODE_LX
353/* RTSC counts during suspend */
354#define RTSC_SUSP 0x100
355
356static void __init check_geode_tsc_reliable(void)
357{
358 unsigned long val;
359
360 rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
361 if ((val & RTSC_SUSP))
362 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
363}
364#else
365static inline void check_geode_tsc_reliable(void) { }
366#endif
367
368
369void __init tsc_init(void)
370{
371 if (!cpu_has_tsc || tsc_disable)
372 goto out_no_tsc;
373
374 cpu_khz = calculate_cpu_khz();
375 tsc_khz = cpu_khz;
376
377 if (!cpu_khz)
378 goto out_no_tsc;
379
380 printk("Detected %lu.%03lu MHz processor.\n",
381 (unsigned long)cpu_khz / 1000,
382 (unsigned long)cpu_khz % 1000);
383
384 set_cyc2ns_scale(cpu_khz);
385 use_tsc_delay();
386
387 /* Check and install the TSC clocksource */
388 dmi_check_system(bad_tsc_dmi_table);
389
390 unsynchronized_tsc();
391 check_geode_tsc_reliable();
392 current_tsc_khz = tsc_khz;
393 clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
394 clocksource_tsc.shift);
395 /* lower the rating if we already know its unstable: */
396 if (check_tsc_unstable()) {
397 clocksource_tsc.rating = 0;
398 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
399 } else
400 tsc_enabled = 1;
401
402 clocksource_register(&clocksource_tsc);
403
404 return;
405
406out_no_tsc:
407 /*
408 * Set the tsc_disable flag if there's no TSC support, this
409 * makes it a fast flag for the kernel to see whether it
410 * should be using the TSC.
411 */
412 tsc_disable = 1;
413}
diff --git a/arch/i386/kernel/tsc_sync.c b/arch/i386/kernel/tsc_sync.c
deleted file mode 100644
index 12424629af87..000000000000
--- a/arch/i386/kernel/tsc_sync.c
+++ /dev/null
@@ -1 +0,0 @@
1#include "../../x86_64/kernel/tsc_sync.c"
diff --git a/arch/i386/kernel/vsyscall-int80.S b/arch/i386/kernel/vsyscall-int80.S
deleted file mode 100644
index 530d0525e5e2..000000000000
--- a/arch/i386/kernel/vsyscall-int80.S
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Code for the vsyscall page. This version uses the old int $0x80 method.
3 *
4 * NOTE:
5 * 1) __kernel_vsyscall _must_ be first in this page.
6 * 2) there are alignment constraints on this stub, see vsyscall-sigreturn.S
7 * for details.
8 */
9
10 .text
11 .globl __kernel_vsyscall
12 .type __kernel_vsyscall,@function
13__kernel_vsyscall:
14.LSTART_vsyscall:
15 int $0x80
16 ret
17.LEND_vsyscall:
18 .size __kernel_vsyscall,.-.LSTART_vsyscall
19 .previous
20
21 .section .eh_frame,"a",@progbits
22.LSTARTFRAMEDLSI:
23 .long .LENDCIEDLSI-.LSTARTCIEDLSI
24.LSTARTCIEDLSI:
25 .long 0 /* CIE ID */
26 .byte 1 /* Version number */
27 .string "zR" /* NUL-terminated augmentation string */
28 .uleb128 1 /* Code alignment factor */
29 .sleb128 -4 /* Data alignment factor */
30 .byte 8 /* Return address register column */
31 .uleb128 1 /* Augmentation value length */
32 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
33 .byte 0x0c /* DW_CFA_def_cfa */
34 .uleb128 4
35 .uleb128 4
36 .byte 0x88 /* DW_CFA_offset, column 0x8 */
37 .uleb128 1
38 .align 4
39.LENDCIEDLSI:
40 .long .LENDFDEDLSI-.LSTARTFDEDLSI /* Length FDE */
41.LSTARTFDEDLSI:
42 .long .LSTARTFDEDLSI-.LSTARTFRAMEDLSI /* CIE pointer */
43 .long .LSTART_vsyscall-. /* PC-relative start address */
44 .long .LEND_vsyscall-.LSTART_vsyscall
45 .uleb128 0
46 .align 4
47.LENDFDEDLSI:
48 .previous
49
50/*
51 * Get the common code for the sigreturn entry points.
52 */
53#include "vsyscall-sigreturn.S"
diff --git a/arch/i386/kernel/vsyscall-note.S b/arch/i386/kernel/vsyscall-note.S
deleted file mode 100644
index 07c0daf78237..000000000000
--- a/arch/i386/kernel/vsyscall-note.S
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
3 * Here we can supply some information useful to userland.
4 */
5
6#include <linux/version.h>
7#include <linux/elfnote.h>
8
9/* Ideally this would use UTS_NAME, but using a quoted string here
10 doesn't work. Remember to change this when changing the
11 kernel's name. */
12ELFNOTE_START(Linux, 0, "a")
13 .long LINUX_VERSION_CODE
14ELFNOTE_END
15
16#ifdef CONFIG_XEN
17/*
18 * Add a special note telling glibc's dynamic linker a fake hardware
19 * flavor that it will use to choose the search path for libraries in the
20 * same way it uses real hardware capabilities like "mmx".
21 * We supply "nosegneg" as the fake capability, to indicate that we
22 * do not like negative offsets in instructions using segment overrides,
23 * since we implement those inefficiently. This makes it possible to
24 * install libraries optimized to avoid those access patterns in someplace
25 * like /lib/i686/tls/nosegneg. Note that an /etc/ld.so.conf.d/file
26 * corresponding to the bits here is needed to make ldconfig work right.
27 * It should contain:
28 * hwcap 1 nosegneg
29 * to match the mapping of bit to name that we give here.
30 *
31 * At runtime, the fake hardware feature will be considered to be present
32 * if its bit is set in the mask word. So, we start with the mask 0, and
33 * at boot time we set VDSO_NOTE_NONEGSEG_BIT if running under Xen.
34 */
35
36#include "../xen/vdso.h" /* Defines VDSO_NOTE_NONEGSEG_BIT. */
37
38 .globl VDSO_NOTE_MASK
39ELFNOTE_START(GNU, 2, "a")
40 .long 1 /* ncaps */
41VDSO_NOTE_MASK:
42 .long 0 /* mask */
43 .byte VDSO_NOTE_NONEGSEG_BIT; .asciz "nosegneg" /* bit, name */
44ELFNOTE_END
45#endif
diff --git a/arch/i386/kernel/vsyscall-sysenter.S b/arch/i386/kernel/vsyscall-sysenter.S
deleted file mode 100644
index 1a36d26e15eb..000000000000
--- a/arch/i386/kernel/vsyscall-sysenter.S
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Code for the vsyscall page. This version uses the sysenter instruction.
3 *
4 * NOTE:
5 * 1) __kernel_vsyscall _must_ be first in this page.
6 * 2) there are alignment constraints on this stub, see vsyscall-sigreturn.S
7 * for details.
8 */
9
10/*
11 * The caller puts arg2 in %ecx, which gets pushed. The kernel will use
12 * %ecx itself for arg2. The pushing is because the sysexit instruction
13 * (found in entry.S) requires that we clobber %ecx with the desired %esp.
14 * User code might expect that %ecx is unclobbered though, as it would be
15 * for returning via the iret instruction, so we must push and pop.
16 *
17 * The caller puts arg3 in %edx, which the sysexit instruction requires
18 * for %eip. Thus, exactly as for arg2, we must push and pop.
19 *
20 * Arg6 is different. The caller puts arg6 in %ebp. Since the sysenter
21 * instruction clobbers %esp, the user's %esp won't even survive entry
22 * into the kernel. We store %esp in %ebp. Code in entry.S must fetch
23 * arg6 from the stack.
24 *
25 * You can not use this vsyscall for the clone() syscall because the
26 * three dwords on the parent stack do not get copied to the child.
27 */
28 .text
29 .globl __kernel_vsyscall
30 .type __kernel_vsyscall,@function
31__kernel_vsyscall:
32.LSTART_vsyscall:
33 push %ecx
34.Lpush_ecx:
35 push %edx
36.Lpush_edx:
37 push %ebp
38.Lenter_kernel:
39 movl %esp,%ebp
40 sysenter
41
42 /* 7: align return point with nop's to make disassembly easier */
43 .space 7,0x90
44
45 /* 14: System call restart point is here! (SYSENTER_RETURN-2) */
46 jmp .Lenter_kernel
47 /* 16: System call normal return point is here! */
48 .globl SYSENTER_RETURN /* Symbol used by sysenter.c */
49SYSENTER_RETURN:
50 pop %ebp
51.Lpop_ebp:
52 pop %edx
53.Lpop_edx:
54 pop %ecx
55.Lpop_ecx:
56 ret
57.LEND_vsyscall:
58 .size __kernel_vsyscall,.-.LSTART_vsyscall
59 .previous
60
61 .section .eh_frame,"a",@progbits
62.LSTARTFRAMEDLSI:
63 .long .LENDCIEDLSI-.LSTARTCIEDLSI
64.LSTARTCIEDLSI:
65 .long 0 /* CIE ID */
66 .byte 1 /* Version number */
67 .string "zR" /* NUL-terminated augmentation string */
68 .uleb128 1 /* Code alignment factor */
69 .sleb128 -4 /* Data alignment factor */
70 .byte 8 /* Return address register column */
71 .uleb128 1 /* Augmentation value length */
72 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
73 .byte 0x0c /* DW_CFA_def_cfa */
74 .uleb128 4
75 .uleb128 4
76 .byte 0x88 /* DW_CFA_offset, column 0x8 */
77 .uleb128 1
78 .align 4
79.LENDCIEDLSI:
80 .long .LENDFDEDLSI-.LSTARTFDEDLSI /* Length FDE */
81.LSTARTFDEDLSI:
82 .long .LSTARTFDEDLSI-.LSTARTFRAMEDLSI /* CIE pointer */
83 .long .LSTART_vsyscall-. /* PC-relative start address */
84 .long .LEND_vsyscall-.LSTART_vsyscall
85 .uleb128 0
86 /* What follows are the instructions for the table generation.
87 We have to record all changes of the stack pointer. */
88 .byte 0x04 /* DW_CFA_advance_loc4 */
89 .long .Lpush_ecx-.LSTART_vsyscall
90 .byte 0x0e /* DW_CFA_def_cfa_offset */
91 .byte 0x08 /* RA at offset 8 now */
92 .byte 0x04 /* DW_CFA_advance_loc4 */
93 .long .Lpush_edx-.Lpush_ecx
94 .byte 0x0e /* DW_CFA_def_cfa_offset */
95 .byte 0x0c /* RA at offset 12 now */
96 .byte 0x04 /* DW_CFA_advance_loc4 */
97 .long .Lenter_kernel-.Lpush_edx
98 .byte 0x0e /* DW_CFA_def_cfa_offset */
99 .byte 0x10 /* RA at offset 16 now */
100 .byte 0x85, 0x04 /* DW_CFA_offset %ebp -16 */
101 /* Finally the epilogue. */
102 .byte 0x04 /* DW_CFA_advance_loc4 */
103 .long .Lpop_ebp-.Lenter_kernel
104 .byte 0x0e /* DW_CFA_def_cfa_offset */
105 .byte 0x0c /* RA at offset 12 now */
106 .byte 0xc5 /* DW_CFA_restore %ebp */
107 .byte 0x04 /* DW_CFA_advance_loc4 */
108 .long .Lpop_edx-.Lpop_ebp
109 .byte 0x0e /* DW_CFA_def_cfa_offset */
110 .byte 0x08 /* RA at offset 8 now */
111 .byte 0x04 /* DW_CFA_advance_loc4 */
112 .long .Lpop_ecx-.Lpop_edx
113 .byte 0x0e /* DW_CFA_def_cfa_offset */
114 .byte 0x04 /* RA at offset 4 now */
115 .align 4
116.LENDFDEDLSI:
117 .previous
118
119/*
120 * Get the common code for the sigreturn entry points.
121 */
122#include "vsyscall-sigreturn.S"
diff --git a/arch/i386/kernel/vsyscall.S b/arch/i386/kernel/vsyscall.S
deleted file mode 100644
index b403890fe39b..000000000000
--- a/arch/i386/kernel/vsyscall.S
+++ /dev/null
@@ -1,15 +0,0 @@
1#include <linux/init.h>
2
3__INITDATA
4
5 .globl vsyscall_int80_start, vsyscall_int80_end
6vsyscall_int80_start:
7 .incbin "arch/i386/kernel/vsyscall-int80.so"
8vsyscall_int80_end:
9
10 .globl vsyscall_sysenter_start, vsyscall_sysenter_end
11vsyscall_sysenter_start:
12 .incbin "arch/i386/kernel/vsyscall-sysenter.so"
13vsyscall_sysenter_end:
14
15__FINIT
diff --git a/arch/i386/lib/Makefile b/arch/i386/lib/Makefile
deleted file mode 100644
index 4d105fdfe817..000000000000
--- a/arch/i386/lib/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for i386-specific library files..
3#
4
5
6lib-y = checksum.o delay.o usercopy.o getuser.o putuser.o memcpy.o strstr.o \
7 bitops.o semaphore.o string.o
8
9lib-$(CONFIG_X86_USE_3DNOW) += mmx.o
10
11obj-$(CONFIG_SMP) += msr-on-cpu.o
diff --git a/arch/i386/mach-generic/Makefile b/arch/i386/mach-generic/Makefile
deleted file mode 100644
index 6914485c0d85..000000000000
--- a/arch/i386/mach-generic/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the generic architecture
3#
4
5EXTRA_CFLAGS := -Iarch/i386/kernel
6
7obj-y := probe.o summit.o bigsmp.o es7000.o default.o ../mach-es7000/
diff --git a/arch/i386/mach-generic/bigsmp.c b/arch/i386/mach-generic/bigsmp.c
deleted file mode 100644
index 58a477baec30..000000000000
--- a/arch/i386/mach-generic/bigsmp.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
3 * Drives the local APIC in "clustered mode".
4 */
5#define APIC_DEFINITION 1
6#include <linux/threads.h>
7#include <linux/cpumask.h>
8#include <asm/smp.h>
9#include <asm/mpspec.h>
10#include <asm/genapic.h>
11#include <asm/fixmap.h>
12#include <asm/apicdef.h>
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <linux/dmi.h>
17#include <asm/mach-bigsmp/mach_apic.h>
18#include <asm/mach-bigsmp/mach_apicdef.h>
19#include <asm/mach-bigsmp/mach_ipi.h>
20#include <asm/mach-default/mach_mpparse.h>
21
22static int dmi_bigsmp; /* can be set by dmi scanners */
23
24static int hp_ht_bigsmp(struct dmi_system_id *d)
25{
26#ifdef CONFIG_X86_GENERICARCH
27 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
28 dmi_bigsmp = 1;
29#endif
30 return 0;
31}
32
33
34static struct dmi_system_id bigsmp_dmi_table[] = {
35 { hp_ht_bigsmp, "HP ProLiant DL760 G2", {
36 DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
37 DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
38 }},
39
40 { hp_ht_bigsmp, "HP ProLiant DL740", {
41 DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
42 DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
43 }},
44 { }
45};
46
47
48static int probe_bigsmp(void)
49{
50 if (def_to_bigsmp)
51 dmi_bigsmp = 1;
52 else
53 dmi_check_system(bigsmp_dmi_table);
54 return dmi_bigsmp;
55}
56
57struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp);
diff --git a/arch/i386/mach-voyager/Makefile b/arch/i386/mach-voyager/Makefile
deleted file mode 100644
index 33b74cf0dd22..000000000000
--- a/arch/i386/mach-voyager/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5EXTRA_CFLAGS := -Iarch/i386/kernel
6obj-y := setup.o voyager_basic.o voyager_thread.o
7
8obj-$(CONFIG_SMP) += voyager_smp.o voyager_cat.o
diff --git a/arch/i386/mm/Makefile b/arch/i386/mm/Makefile
deleted file mode 100644
index 80908b5aa60f..000000000000
--- a/arch/i386/mm/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Makefile for the linux i386-specific parts of the memory manager.
3#
4
5obj-y := init.o pgtable.o fault.o ioremap.o extable.o pageattr.o mmap.o
6
7obj-$(CONFIG_NUMA) += discontig.o
8obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
9obj-$(CONFIG_HIGHMEM) += highmem.o
10obj-$(CONFIG_BOOT_IOREMAP) += boot_ioremap.o
diff --git a/arch/i386/pci/Makefile b/arch/i386/pci/Makefile
deleted file mode 100644
index 44650e03308b..000000000000
--- a/arch/i386/pci/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1obj-y := i386.o init.o
2
3obj-$(CONFIG_PCI_BIOS) += pcbios.o
4obj-$(CONFIG_PCI_MMCONFIG) += mmconfig.o direct.o mmconfig-shared.o
5obj-$(CONFIG_PCI_DIRECT) += direct.o
6
7pci-y := fixup.o
8pci-$(CONFIG_ACPI) += acpi.o
9pci-y += legacy.o irq.o
10
11pci-$(CONFIG_X86_VISWS) := visws.o fixup.o
12pci-$(CONFIG_X86_NUMAQ) := numa.o irq.o
13
14obj-y += $(pci-y) common.o early.o
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c
deleted file mode 100644
index ebc6f3c66340..000000000000
--- a/arch/i386/pci/common.c
+++ /dev/null
@@ -1,480 +0,0 @@
1/*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/sched.h>
8#include <linux/pci.h>
9#include <linux/ioport.h>
10#include <linux/init.h>
11#include <linux/dmi.h>
12
13#include <asm/acpi.h>
14#include <asm/segment.h>
15#include <asm/io.h>
16#include <asm/smp.h>
17
18#include "pci.h"
19
20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF;
22
23static int pci_bf_sort;
24int pci_routeirq;
25int pcibios_last_bus = -1;
26unsigned long pirq_table_addr;
27struct pci_bus *pci_root_bus;
28struct pci_raw_ops *raw_pci_ops;
29
30static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
31{
32 return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
33}
34
35static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
36{
37 return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
38}
39
40struct pci_ops pci_root_ops = {
41 .read = pci_read,
42 .write = pci_write,
43};
44
45/*
46 * legacy, numa, and acpi all want to call pcibios_scan_root
47 * from their initcalls. This flag prevents that.
48 */
49int pcibios_scanned;
50
51/*
52 * This interrupt-safe spinlock protects all accesses to PCI
53 * configuration space.
54 */
55DEFINE_SPINLOCK(pci_config_lock);
56
57/*
58 * Several buggy motherboards address only 16 devices and mirror
59 * them to next 16 IDs. We try to detect this `feature' on all
60 * primary buses (those containing host bridges as they are
61 * expected to be unique) and remove the ghost devices.
62 */
63
64static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
65{
66 struct list_head *ln, *mn;
67 struct pci_dev *d, *e;
68 int mirror = PCI_DEVFN(16,0);
69 int seen_host_bridge = 0;
70 int i;
71
72 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
73 list_for_each(ln, &b->devices) {
74 d = pci_dev_b(ln);
75 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
76 seen_host_bridge++;
77 for (mn=ln->next; mn != &b->devices; mn=mn->next) {
78 e = pci_dev_b(mn);
79 if (e->devfn != d->devfn + mirror ||
80 e->vendor != d->vendor ||
81 e->device != d->device ||
82 e->class != d->class)
83 continue;
84 for(i=0; i<PCI_NUM_RESOURCES; i++)
85 if (e->resource[i].start != d->resource[i].start ||
86 e->resource[i].end != d->resource[i].end ||
87 e->resource[i].flags != d->resource[i].flags)
88 continue;
89 break;
90 }
91 if (mn == &b->devices)
92 return;
93 }
94 if (!seen_host_bridge)
95 return;
96 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
97
98 ln = &b->devices;
99 while (ln->next != &b->devices) {
100 d = pci_dev_b(ln->next);
101 if (d->devfn >= mirror) {
102 list_del(&d->global_list);
103 list_del(&d->bus_list);
104 kfree(d);
105 } else
106 ln = ln->next;
107 }
108}
109
110/*
111 * Called after each bus is probed, but before its children
112 * are examined.
113 */
114
115void __devinit pcibios_fixup_bus(struct pci_bus *b)
116{
117 pcibios_fixup_ghosts(b);
118 pci_read_bridge_bases(b);
119}
120
121/*
122 * Only use DMI information to set this if nothing was passed
123 * on the kernel command line (which was parsed earlier).
124 */
125
126static int __devinit set_bf_sort(struct dmi_system_id *d)
127{
128 if (pci_bf_sort == pci_bf_sort_default) {
129 pci_bf_sort = pci_dmi_bf;
130 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
131 }
132 return 0;
133}
134
135/*
136 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
137 */
138#ifdef __i386__
139static int __devinit assign_all_busses(struct dmi_system_id *d)
140{
141 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
142 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
143 " (pci=assign-busses)\n", d->ident);
144 return 0;
145}
146#endif
147
148static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
149#ifdef __i386__
150/*
151 * Laptops which need pci=assign-busses to see Cardbus cards
152 */
153 {
154 .callback = assign_all_busses,
155 .ident = "Samsung X20 Laptop",
156 .matches = {
157 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
158 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
159 },
160 },
161#endif /* __i386__ */
162 {
163 .callback = set_bf_sort,
164 .ident = "Dell PowerEdge 1950",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
167 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
168 },
169 },
170 {
171 .callback = set_bf_sort,
172 .ident = "Dell PowerEdge 1955",
173 .matches = {
174 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
175 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
176 },
177 },
178 {
179 .callback = set_bf_sort,
180 .ident = "Dell PowerEdge 2900",
181 .matches = {
182 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
183 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
184 },
185 },
186 {
187 .callback = set_bf_sort,
188 .ident = "Dell PowerEdge 2950",
189 .matches = {
190 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
191 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
192 },
193 },
194 {
195 .callback = set_bf_sort,
196 .ident = "Dell PowerEdge R900",
197 .matches = {
198 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
199 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
200 },
201 },
202 {
203 .callback = set_bf_sort,
204 .ident = "HP ProLiant BL20p G3",
205 .matches = {
206 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
207 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
208 },
209 },
210 {
211 .callback = set_bf_sort,
212 .ident = "HP ProLiant BL20p G4",
213 .matches = {
214 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
215 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
216 },
217 },
218 {
219 .callback = set_bf_sort,
220 .ident = "HP ProLiant BL30p G1",
221 .matches = {
222 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
223 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
224 },
225 },
226 {
227 .callback = set_bf_sort,
228 .ident = "HP ProLiant BL25p G1",
229 .matches = {
230 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
231 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
232 },
233 },
234 {
235 .callback = set_bf_sort,
236 .ident = "HP ProLiant BL35p G1",
237 .matches = {
238 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
239 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
240 },
241 },
242 {
243 .callback = set_bf_sort,
244 .ident = "HP ProLiant BL45p G1",
245 .matches = {
246 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
247 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
248 },
249 },
250 {
251 .callback = set_bf_sort,
252 .ident = "HP ProLiant BL45p G2",
253 .matches = {
254 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
255 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
256 },
257 },
258 {
259 .callback = set_bf_sort,
260 .ident = "HP ProLiant BL460c G1",
261 .matches = {
262 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
263 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
264 },
265 },
266 {
267 .callback = set_bf_sort,
268 .ident = "HP ProLiant BL465c G1",
269 .matches = {
270 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
271 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
272 },
273 },
274 {
275 .callback = set_bf_sort,
276 .ident = "HP ProLiant BL480c G1",
277 .matches = {
278 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
280 },
281 },
282 {
283 .callback = set_bf_sort,
284 .ident = "HP ProLiant BL685c G1",
285 .matches = {
286 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
287 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
288 },
289 },
290 {}
291};
292
293struct pci_bus * __devinit pcibios_scan_root(int busnum)
294{
295 struct pci_bus *bus = NULL;
296 struct pci_sysdata *sd;
297
298 dmi_check_system(pciprobe_dmi_table);
299
300 while ((bus = pci_find_next_bus(bus)) != NULL) {
301 if (bus->number == busnum) {
302 /* Already scanned */
303 return bus;
304 }
305 }
306
307 /* Allocate per-root-bus (not per bus) arch-specific data.
308 * TODO: leak; this memory is never freed.
309 * It's arguable whether it's worth the trouble to care.
310 */
311 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
312 if (!sd) {
313 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
314 return NULL;
315 }
316
317 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
318
319 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
320}
321
322extern u8 pci_cache_line_size;
323
324static int __init pcibios_init(void)
325{
326 struct cpuinfo_x86 *c = &boot_cpu_data;
327
328 if (!raw_pci_ops) {
329 printk(KERN_WARNING "PCI: System does not support PCI\n");
330 return 0;
331 }
332
333 /*
334 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
335 * and P4. It's also good for 386/486s (which actually have 16)
336 * as quite a few PCI devices do not support smaller values.
337 */
338 pci_cache_line_size = 32 >> 2;
339 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
340 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
341 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
342 pci_cache_line_size = 128 >> 2; /* P4 */
343
344 pcibios_resource_survey();
345
346 if (pci_bf_sort >= pci_force_bf)
347 pci_sort_breadthfirst();
348#ifdef CONFIG_PCI_BIOS
349 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
350 pcibios_sort();
351#endif
352 return 0;
353}
354
355subsys_initcall(pcibios_init);
356
357char * __devinit pcibios_setup(char *str)
358{
359 if (!strcmp(str, "off")) {
360 pci_probe = 0;
361 return NULL;
362 } else if (!strcmp(str, "bfsort")) {
363 pci_bf_sort = pci_force_bf;
364 return NULL;
365 } else if (!strcmp(str, "nobfsort")) {
366 pci_bf_sort = pci_force_nobf;
367 return NULL;
368 }
369#ifdef CONFIG_PCI_BIOS
370 else if (!strcmp(str, "bios")) {
371 pci_probe = PCI_PROBE_BIOS;
372 return NULL;
373 } else if (!strcmp(str, "nobios")) {
374 pci_probe &= ~PCI_PROBE_BIOS;
375 return NULL;
376 } else if (!strcmp(str, "nosort")) {
377 pci_probe |= PCI_NO_SORT;
378 return NULL;
379 } else if (!strcmp(str, "biosirq")) {
380 pci_probe |= PCI_BIOS_IRQ_SCAN;
381 return NULL;
382 } else if (!strncmp(str, "pirqaddr=", 9)) {
383 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
384 return NULL;
385 }
386#endif
387#ifdef CONFIG_PCI_DIRECT
388 else if (!strcmp(str, "conf1")) {
389 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
390 return NULL;
391 }
392 else if (!strcmp(str, "conf2")) {
393 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
394 return NULL;
395 }
396#endif
397#ifdef CONFIG_PCI_MMCONFIG
398 else if (!strcmp(str, "nommconf")) {
399 pci_probe &= ~PCI_PROBE_MMCONF;
400 return NULL;
401 }
402#endif
403 else if (!strcmp(str, "noacpi")) {
404 acpi_noirq_set();
405 return NULL;
406 }
407 else if (!strcmp(str, "noearly")) {
408 pci_probe |= PCI_PROBE_NOEARLY;
409 return NULL;
410 }
411#ifndef CONFIG_X86_VISWS
412 else if (!strcmp(str, "usepirqmask")) {
413 pci_probe |= PCI_USE_PIRQ_MASK;
414 return NULL;
415 } else if (!strncmp(str, "irqmask=", 8)) {
416 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
417 return NULL;
418 } else if (!strncmp(str, "lastbus=", 8)) {
419 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
420 return NULL;
421 }
422#endif
423 else if (!strcmp(str, "rom")) {
424 pci_probe |= PCI_ASSIGN_ROMS;
425 return NULL;
426 } else if (!strcmp(str, "assign-busses")) {
427 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
428 return NULL;
429 } else if (!strcmp(str, "routeirq")) {
430 pci_routeirq = 1;
431 return NULL;
432 }
433 return str;
434}
435
436unsigned int pcibios_assign_all_busses(void)
437{
438 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
439}
440
441int pcibios_enable_device(struct pci_dev *dev, int mask)
442{
443 int err;
444
445 if ((err = pcibios_enable_resources(dev, mask)) < 0)
446 return err;
447
448 if (!dev->msi_enabled)
449 return pcibios_enable_irq(dev);
450 return 0;
451}
452
453void pcibios_disable_device (struct pci_dev *dev)
454{
455 if (!dev->msi_enabled && pcibios_disable_irq)
456 pcibios_disable_irq(dev);
457}
458
459struct pci_bus *pci_scan_bus_with_sysdata(int busno)
460{
461 struct pci_bus *bus = NULL;
462 struct pci_sysdata *sd;
463
464 /*
465 * Allocate per-root-bus (not per bus) arch-specific data.
466 * TODO: leak; this memory is never freed.
467 * It's arguable whether it's worth the trouble to care.
468 */
469 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
470 if (!sd) {
471 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
472 return NULL;
473 }
474 sd->node = -1;
475 bus = pci_scan_bus(busno, &pci_root_ops, sd);
476 if (!bus)
477 kfree(sd);
478
479 return bus;
480}
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
deleted file mode 100644
index 8434f2323b87..000000000000
--- a/arch/i386/pci/irq.c
+++ /dev/null
@@ -1,1173 +0,0 @@
1/*
2 * Low-Level PCI Support for PC -- Routing of Interrupts
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/types.h>
8#include <linux/kernel.h>
9#include <linux/pci.h>
10#include <linux/init.h>
11#include <linux/slab.h>
12#include <linux/interrupt.h>
13#include <linux/dmi.h>
14#include <asm/io.h>
15#include <asm/smp.h>
16#include <asm/io_apic.h>
17#include <linux/irq.h>
18#include <linux/acpi.h>
19
20#include "pci.h"
21
22#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23#define PIRQ_VERSION 0x0100
24
25static int broken_hp_bios_irq9;
26static int acer_tm360_irqrouting;
27
28static struct irq_routing_table *pirq_table;
29
30static int pirq_enable_irq(struct pci_dev *dev);
31
32/*
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
36 */
37unsigned int pcibios_irq_mask = 0xfff8;
38
39static int pirq_penalty[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
42};
43
44struct irq_router {
45 char *name;
46 u16 vendor, device;
47 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
48 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
49};
50
51struct irq_router_handler {
52 u16 vendor;
53 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
54};
55
56int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
57void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
58
59/*
60 * Check passed address for the PCI IRQ Routing Table signature
61 * and perform checksum verification.
62 */
63
64static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
65{
66 struct irq_routing_table *rt;
67 int i;
68 u8 sum;
69
70 rt = (struct irq_routing_table *) addr;
71 if (rt->signature != PIRQ_SIGNATURE ||
72 rt->version != PIRQ_VERSION ||
73 rt->size % 16 ||
74 rt->size < sizeof(struct irq_routing_table))
75 return NULL;
76 sum = 0;
77 for (i=0; i < rt->size; i++)
78 sum += addr[i];
79 if (!sum) {
80 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
81 return rt;
82 }
83 return NULL;
84}
85
86
87
88/*
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
90 */
91
92static struct irq_routing_table * __init pirq_find_routing_table(void)
93{
94 u8 *addr;
95 struct irq_routing_table *rt;
96
97 if (pirq_table_addr) {
98 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
99 if (rt)
100 return rt;
101 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
102 }
103 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
104 rt = pirq_check_routing_table(addr);
105 if (rt)
106 return rt;
107 }
108 return NULL;
109}
110
111/*
112 * If we have a IRQ routing table, use it to search for peer host
113 * bridges. It's a gross hack, but since there are no other known
114 * ways how to get a list of buses, we have to go this way.
115 */
116
117static void __init pirq_peer_trick(void)
118{
119 struct irq_routing_table *rt = pirq_table;
120 u8 busmap[256];
121 int i;
122 struct irq_info *e;
123
124 memset(busmap, 0, sizeof(busmap));
125 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
126 e = &rt->slots[i];
127#ifdef DEBUG
128 {
129 int j;
130 DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
131 for(j=0; j<4; j++)
132 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
133 DBG("\n");
134 }
135#endif
136 busmap[e->bus] = 1;
137 }
138 for(i = 1; i < 256; i++) {
139 if (!busmap[i] || pci_find_bus(0, i))
140 continue;
141 if (pci_scan_bus_with_sysdata(i))
142 printk(KERN_INFO "PCI: Discovered primary peer "
143 "bus %02x [IRQ]\n", i);
144 }
145 pcibios_last_bus = -1;
146}
147
148/*
149 * Code for querying and setting of IRQ routes on various interrupt routers.
150 */
151
152void eisa_set_level_irq(unsigned int irq)
153{
154 unsigned char mask = 1 << (irq & 7);
155 unsigned int port = 0x4d0 + (irq >> 3);
156 unsigned char val;
157 static u16 eisa_irq_mask;
158
159 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
160 return;
161
162 eisa_irq_mask |= (1 << irq);
163 printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
164 val = inb(port);
165 if (!(val & mask)) {
166 DBG(KERN_DEBUG " -> edge");
167 outb(val | mask, port);
168 }
169}
170
171/*
172 * Common IRQ routing practice: nybbles in config space,
173 * offset by some magic constant.
174 */
175static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
176{
177 u8 x;
178 unsigned reg = offset + (nr >> 1);
179
180 pci_read_config_byte(router, reg, &x);
181 return (nr & 1) ? (x >> 4) : (x & 0xf);
182}
183
184static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
185{
186 u8 x;
187 unsigned reg = offset + (nr >> 1);
188
189 pci_read_config_byte(router, reg, &x);
190 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
191 pci_write_config_byte(router, reg, x);
192}
193
194/*
195 * ALI pirq entries are damn ugly, and completely undocumented.
196 * This has been figured out from pirq tables, and it's not a pretty
197 * picture.
198 */
199static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
200{
201 static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
202
203 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
204}
205
206static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
207{
208 static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
209 unsigned int val = irqmap[irq];
210
211 if (val) {
212 write_config_nybble(router, 0x48, pirq-1, val);
213 return 1;
214 }
215 return 0;
216}
217
218/*
219 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
220 * just a pointer to the config space.
221 */
222static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
223{
224 u8 x;
225
226 pci_read_config_byte(router, pirq, &x);
227 return (x < 16) ? x : 0;
228}
229
230static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
231{
232 pci_write_config_byte(router, pirq, irq);
233 return 1;
234}
235
236/*
237 * The VIA pirq rules are nibble-based, like ALI,
238 * but without the ugly irq number munging.
239 * However, PIRQD is in the upper instead of lower 4 bits.
240 */
241static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
242{
243 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
244}
245
246static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
247{
248 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
249 return 1;
250}
251
252/*
253 * The VIA pirq rules are nibble-based, like ALI,
254 * but without the ugly irq number munging.
255 * However, for 82C586, nibble map is different .
256 */
257static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
258{
259 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
260 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
261}
262
263static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
264{
265 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
266 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
267 return 1;
268}
269
270/*
271 * ITE 8330G pirq rules are nibble-based
272 * FIXME: pirqmap may be { 1, 0, 3, 2 },
273 * 2+3 are both mapped to irq 9 on my system
274 */
275static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
276{
277 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
278 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
279}
280
281static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
282{
283 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
284 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
285 return 1;
286}
287
288/*
289 * OPTI: high four bits are nibble pointer..
290 * I wonder what the low bits do?
291 */
292static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
293{
294 return read_config_nybble(router, 0xb8, pirq >> 4);
295}
296
297static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
298{
299 write_config_nybble(router, 0xb8, pirq >> 4, irq);
300 return 1;
301}
302
303/*
304 * Cyrix: nibble offset 0x5C
305 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
306 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
307 */
308static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
309{
310 return read_config_nybble(router, 0x5C, (pirq-1)^1);
311}
312
313static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
314{
315 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
316 return 1;
317}
318
319/*
320 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
321 * We have to deal with the following issues here:
322 * - vendors have different ideas about the meaning of link values
323 * - some onboard devices (integrated in the chipset) have special
324 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
325 * - different revision of the router have a different layout for
326 * the routing registers, particularly for the onchip devices
327 *
328 * For all routing registers the common thing is we have one byte
329 * per routeable link which is defined as:
330 * bit 7 IRQ mapping enabled (0) or disabled (1)
331 * bits [6:4] reserved (sometimes used for onchip devices)
332 * bits [3:0] IRQ to map to
333 * allowed: 3-7, 9-12, 14-15
334 * reserved: 0, 1, 2, 8, 13
335 *
336 * The config-space registers located at 0x41/0x42/0x43/0x44 are
337 * always used to route the normal PCI INT A/B/C/D respectively.
338 * Apparently there are systems implementing PCI routing table using
339 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
340 * We try our best to handle both link mappings.
341 *
342 * Currently (2003-05-21) it appears most SiS chipsets follow the
343 * definition of routing registers from the SiS-5595 southbridge.
344 * According to the SiS 5595 datasheets the revision id's of the
345 * router (ISA-bridge) should be 0x01 or 0xb0.
346 *
347 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
348 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
349 * They seem to work with the current routing code. However there is
350 * some concern because of the two USB-OHCI HCs (original SiS 5595
351 * had only one). YMMV.
352 *
353 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
354 *
355 * 0x61: IDEIRQ:
356 * bits [6:5] must be written 01
357 * bit 4 channel-select primary (0), secondary (1)
358 *
359 * 0x62: USBIRQ:
360 * bit 6 OHCI function disabled (0), enabled (1)
361 *
362 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
363 *
364 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
365 *
366 * We support USBIRQ (in addition to INTA-INTD) and keep the
367 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
368 *
369 * Currently the only reported exception is the new SiS 65x chipset
370 * which includes the SiS 69x southbridge. Here we have the 85C503
371 * router revision 0x04 and there are changes in the register layout
372 * mostly related to the different USB HCs with USB 2.0 support.
373 *
374 * Onchip routing for router rev-id 0x04 (try-and-error observation)
375 *
376 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
377 * bit 6-4 are probably unused, not like 5595
378 */
379
380#define PIRQ_SIS_IRQ_MASK 0x0f
381#define PIRQ_SIS_IRQ_DISABLE 0x80
382#define PIRQ_SIS_USB_ENABLE 0x40
383
384static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
385{
386 u8 x;
387 int reg;
388
389 reg = pirq;
390 if (reg >= 0x01 && reg <= 0x04)
391 reg += 0x40;
392 pci_read_config_byte(router, reg, &x);
393 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
394}
395
396static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
397{
398 u8 x;
399 int reg;
400
401 reg = pirq;
402 if (reg >= 0x01 && reg <= 0x04)
403 reg += 0x40;
404 pci_read_config_byte(router, reg, &x);
405 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
406 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
407 pci_write_config_byte(router, reg, x);
408 return 1;
409}
410
411
412/*
413 * VLSI: nibble offset 0x74 - educated guess due to routing table and
414 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
415 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
416 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
417 * for the busbridge to the docking station.
418 */
419
420static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
421{
422 if (pirq > 8) {
423 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
424 return 0;
425 }
426 return read_config_nybble(router, 0x74, pirq-1);
427}
428
429static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
430{
431 if (pirq > 8) {
432 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
433 return 0;
434 }
435 write_config_nybble(router, 0x74, pirq-1, irq);
436 return 1;
437}
438
439/*
440 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
441 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
442 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
443 * register is a straight binary coding of desired PIC IRQ (low nibble).
444 *
445 * The 'link' value in the PIRQ table is already in the correct format
446 * for the Index register. There are some special index values:
447 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
448 * and 0x03 for SMBus.
449 */
450static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
451{
452 outb_p(pirq, 0xc00);
453 return inb(0xc01) & 0xf;
454}
455
456static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
457{
458 outb_p(pirq, 0xc00);
459 outb_p(irq, 0xc01);
460 return 1;
461}
462
463/* Support for AMD756 PCI IRQ Routing
464 * Jhon H. Caicedo <jhcaiced@osso.org.co>
465 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
466 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
467 * The AMD756 pirq rules are nibble-based
468 * offset 0x56 0-3 PIRQA 4-7 PIRQB
469 * offset 0x57 0-3 PIRQC 4-7 PIRQD
470 */
471static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
472{
473 u8 irq;
474 irq = 0;
475 if (pirq <= 4)
476 {
477 irq = read_config_nybble(router, 0x56, pirq - 1);
478 }
479 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
480 dev->vendor, dev->device, pirq, irq);
481 return irq;
482}
483
484static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
485{
486 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
487 dev->vendor, dev->device, pirq, irq);
488 if (pirq <= 4)
489 {
490 write_config_nybble(router, 0x56, pirq - 1, irq);
491 }
492 return 1;
493}
494
495#ifdef CONFIG_PCI_BIOS
496
497static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
498{
499 struct pci_dev *bridge;
500 int pin = pci_get_interrupt_pin(dev, &bridge);
501 return pcibios_set_irq_routing(bridge, pin, irq);
502}
503
504#endif
505
506static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
507{
508 static struct pci_device_id __initdata pirq_440gx[] = {
509 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
510 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
511 { },
512 };
513
514 /* 440GX has a proprietary PIRQ router -- don't use it */
515 if (pci_dev_present(pirq_440gx))
516 return 0;
517
518 switch(device)
519 {
520 case PCI_DEVICE_ID_INTEL_82371FB_0:
521 case PCI_DEVICE_ID_INTEL_82371SB_0:
522 case PCI_DEVICE_ID_INTEL_82371AB_0:
523 case PCI_DEVICE_ID_INTEL_82371MX:
524 case PCI_DEVICE_ID_INTEL_82443MX_0:
525 case PCI_DEVICE_ID_INTEL_82801AA_0:
526 case PCI_DEVICE_ID_INTEL_82801AB_0:
527 case PCI_DEVICE_ID_INTEL_82801BA_0:
528 case PCI_DEVICE_ID_INTEL_82801BA_10:
529 case PCI_DEVICE_ID_INTEL_82801CA_0:
530 case PCI_DEVICE_ID_INTEL_82801CA_12:
531 case PCI_DEVICE_ID_INTEL_82801DB_0:
532 case PCI_DEVICE_ID_INTEL_82801E_0:
533 case PCI_DEVICE_ID_INTEL_82801EB_0:
534 case PCI_DEVICE_ID_INTEL_ESB_1:
535 case PCI_DEVICE_ID_INTEL_ICH6_0:
536 case PCI_DEVICE_ID_INTEL_ICH6_1:
537 case PCI_DEVICE_ID_INTEL_ICH7_0:
538 case PCI_DEVICE_ID_INTEL_ICH7_1:
539 case PCI_DEVICE_ID_INTEL_ICH7_30:
540 case PCI_DEVICE_ID_INTEL_ICH7_31:
541 case PCI_DEVICE_ID_INTEL_ESB2_0:
542 case PCI_DEVICE_ID_INTEL_ICH8_0:
543 case PCI_DEVICE_ID_INTEL_ICH8_1:
544 case PCI_DEVICE_ID_INTEL_ICH8_2:
545 case PCI_DEVICE_ID_INTEL_ICH8_3:
546 case PCI_DEVICE_ID_INTEL_ICH8_4:
547 case PCI_DEVICE_ID_INTEL_ICH9_0:
548 case PCI_DEVICE_ID_INTEL_ICH9_1:
549 case PCI_DEVICE_ID_INTEL_ICH9_2:
550 case PCI_DEVICE_ID_INTEL_ICH9_3:
551 case PCI_DEVICE_ID_INTEL_ICH9_4:
552 case PCI_DEVICE_ID_INTEL_ICH9_5:
553 case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
554 r->name = "PIIX/ICH";
555 r->get = pirq_piix_get;
556 r->set = pirq_piix_set;
557 return 1;
558 }
559 return 0;
560}
561
562static __init int via_router_probe(struct irq_router *r,
563 struct pci_dev *router, u16 device)
564{
565 /* FIXME: We should move some of the quirk fixup stuff here */
566
567 /*
568 * work arounds for some buggy BIOSes
569 */
570 if (device == PCI_DEVICE_ID_VIA_82C586_0) {
571 switch(router->device) {
572 case PCI_DEVICE_ID_VIA_82C686:
573 /*
574 * Asus k7m bios wrongly reports 82C686A
575 * as 586-compatible
576 */
577 device = PCI_DEVICE_ID_VIA_82C686;
578 break;
579 case PCI_DEVICE_ID_VIA_8235:
580 /**
581 * Asus a7v-x bios wrongly reports 8235
582 * as 586-compatible
583 */
584 device = PCI_DEVICE_ID_VIA_8235;
585 break;
586 }
587 }
588
589 switch(device) {
590 case PCI_DEVICE_ID_VIA_82C586_0:
591 r->name = "VIA";
592 r->get = pirq_via586_get;
593 r->set = pirq_via586_set;
594 return 1;
595 case PCI_DEVICE_ID_VIA_82C596:
596 case PCI_DEVICE_ID_VIA_82C686:
597 case PCI_DEVICE_ID_VIA_8231:
598 case PCI_DEVICE_ID_VIA_8233A:
599 case PCI_DEVICE_ID_VIA_8235:
600 case PCI_DEVICE_ID_VIA_8237:
601 /* FIXME: add new ones for 8233/5 */
602 r->name = "VIA";
603 r->get = pirq_via_get;
604 r->set = pirq_via_set;
605 return 1;
606 }
607 return 0;
608}
609
610static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
611{
612 switch(device)
613 {
614 case PCI_DEVICE_ID_VLSI_82C534:
615 r->name = "VLSI 82C534";
616 r->get = pirq_vlsi_get;
617 r->set = pirq_vlsi_set;
618 return 1;
619 }
620 return 0;
621}
622
623
624static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
625{
626 switch(device)
627 {
628 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
629 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
630 r->name = "ServerWorks";
631 r->get = pirq_serverworks_get;
632 r->set = pirq_serverworks_set;
633 return 1;
634 }
635 return 0;
636}
637
638static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
639{
640 if (device != PCI_DEVICE_ID_SI_503)
641 return 0;
642
643 r->name = "SIS";
644 r->get = pirq_sis_get;
645 r->set = pirq_sis_set;
646 return 1;
647}
648
649static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
650{
651 switch(device)
652 {
653 case PCI_DEVICE_ID_CYRIX_5520:
654 r->name = "NatSemi";
655 r->get = pirq_cyrix_get;
656 r->set = pirq_cyrix_set;
657 return 1;
658 }
659 return 0;
660}
661
662static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
663{
664 switch(device)
665 {
666 case PCI_DEVICE_ID_OPTI_82C700:
667 r->name = "OPTI";
668 r->get = pirq_opti_get;
669 r->set = pirq_opti_set;
670 return 1;
671 }
672 return 0;
673}
674
675static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
676{
677 switch(device)
678 {
679 case PCI_DEVICE_ID_ITE_IT8330G_0:
680 r->name = "ITE";
681 r->get = pirq_ite_get;
682 r->set = pirq_ite_set;
683 return 1;
684 }
685 return 0;
686}
687
688static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
689{
690 switch(device)
691 {
692 case PCI_DEVICE_ID_AL_M1533:
693 case PCI_DEVICE_ID_AL_M1563:
694 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
695 r->name = "ALI";
696 r->get = pirq_ali_get;
697 r->set = pirq_ali_set;
698 return 1;
699 }
700 return 0;
701}
702
703static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
704{
705 switch(device)
706 {
707 case PCI_DEVICE_ID_AMD_VIPER_740B:
708 r->name = "AMD756";
709 break;
710 case PCI_DEVICE_ID_AMD_VIPER_7413:
711 r->name = "AMD766";
712 break;
713 case PCI_DEVICE_ID_AMD_VIPER_7443:
714 r->name = "AMD768";
715 break;
716 default:
717 return 0;
718 }
719 r->get = pirq_amd756_get;
720 r->set = pirq_amd756_set;
721 return 1;
722}
723
724static __initdata struct irq_router_handler pirq_routers[] = {
725 { PCI_VENDOR_ID_INTEL, intel_router_probe },
726 { PCI_VENDOR_ID_AL, ali_router_probe },
727 { PCI_VENDOR_ID_ITE, ite_router_probe },
728 { PCI_VENDOR_ID_VIA, via_router_probe },
729 { PCI_VENDOR_ID_OPTI, opti_router_probe },
730 { PCI_VENDOR_ID_SI, sis_router_probe },
731 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
732 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
733 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
734 { PCI_VENDOR_ID_AMD, amd_router_probe },
735 /* Someone with docs needs to add the ATI Radeon IGP */
736 { 0, NULL }
737};
738static struct irq_router pirq_router;
739static struct pci_dev *pirq_router_dev;
740
741
742/*
743 * FIXME: should we have an option to say "generic for
744 * chipset" ?
745 */
746
747static void __init pirq_find_router(struct irq_router *r)
748{
749 struct irq_routing_table *rt = pirq_table;
750 struct irq_router_handler *h;
751
752#ifdef CONFIG_PCI_BIOS
753 if (!rt->signature) {
754 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
755 r->set = pirq_bios_set;
756 r->name = "BIOS";
757 return;
758 }
759#endif
760
761 /* Default unless a driver reloads it */
762 r->name = "default";
763 r->get = NULL;
764 r->set = NULL;
765
766 DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
767 rt->rtr_vendor, rt->rtr_device);
768
769 pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
770 if (!pirq_router_dev) {
771 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
772 "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
773 return;
774 }
775
776 for( h = pirq_routers; h->vendor; h++) {
777 /* First look for a router match */
778 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
779 break;
780 /* Fall back to a device match */
781 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
782 break;
783 }
784 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
785 pirq_router.name,
786 pirq_router_dev->vendor,
787 pirq_router_dev->device,
788 pci_name(pirq_router_dev));
789
790 /* The device remains referenced for the kernel lifetime */
791}
792
793static struct irq_info *pirq_get_info(struct pci_dev *dev)
794{
795 struct irq_routing_table *rt = pirq_table;
796 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
797 struct irq_info *info;
798
799 for (info = rt->slots; entries--; info++)
800 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
801 return info;
802 return NULL;
803}
804
805static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
806{
807 u8 pin;
808 struct irq_info *info;
809 int i, pirq, newirq;
810 int irq = 0;
811 u32 mask;
812 struct irq_router *r = &pirq_router;
813 struct pci_dev *dev2 = NULL;
814 char *msg = NULL;
815
816 /* Find IRQ pin */
817 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
818 if (!pin) {
819 DBG(KERN_DEBUG " -> no interrupt pin\n");
820 return 0;
821 }
822 pin = pin - 1;
823
824 /* Find IRQ routing entry */
825
826 if (!pirq_table)
827 return 0;
828
829 DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
830 info = pirq_get_info(dev);
831 if (!info) {
832 DBG(" -> not found in routing table\n" KERN_DEBUG);
833 return 0;
834 }
835 pirq = info->irq[pin].link;
836 mask = info->irq[pin].bitmap;
837 if (!pirq) {
838 DBG(" -> not routed\n" KERN_DEBUG);
839 return 0;
840 }
841 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
842 mask &= pcibios_irq_mask;
843
844 /* Work around broken HP Pavilion Notebooks which assign USB to
845 IRQ 9 even though it is actually wired to IRQ 11 */
846
847 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
848 dev->irq = 11;
849 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
850 r->set(pirq_router_dev, dev, pirq, 11);
851 }
852
853 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
854 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
855 pirq = 0x68;
856 mask = 0x400;
857 dev->irq = r->get(pirq_router_dev, dev, pirq);
858 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
859 }
860
861 /*
862 * Find the best IRQ to assign: use the one
863 * reported by the device if possible.
864 */
865 newirq = dev->irq;
866 if (newirq && !((1 << newirq) & mask)) {
867 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
868 else printk("\n" KERN_WARNING
869 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
870 "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
871 pci_name(dev));
872 }
873 if (!newirq && assign) {
874 for (i = 0; i < 16; i++) {
875 if (!(mask & (1 << i)))
876 continue;
877 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
878 newirq = i;
879 }
880 }
881 DBG(" -> newirq=%d", newirq);
882
883 /* Check if it is hardcoded */
884 if ((pirq & 0xf0) == 0xf0) {
885 irq = pirq & 0xf;
886 DBG(" -> hardcoded IRQ %d\n", irq);
887 msg = "Hardcoded";
888 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
889 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
890 DBG(" -> got IRQ %d\n", irq);
891 msg = "Found";
892 eisa_set_level_irq(irq);
893 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
894 DBG(" -> assigning IRQ %d", newirq);
895 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
896 eisa_set_level_irq(newirq);
897 DBG(" ... OK\n");
898 msg = "Assigned";
899 irq = newirq;
900 }
901 }
902
903 if (!irq) {
904 DBG(" ... failed\n");
905 if (newirq && mask == (1 << newirq)) {
906 msg = "Guessed";
907 irq = newirq;
908 } else
909 return 0;
910 }
911 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
912
913 /* Update IRQ for all devices with the same pirq value */
914 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
915 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
916 if (!pin)
917 continue;
918 pin--;
919 info = pirq_get_info(dev2);
920 if (!info)
921 continue;
922 if (info->irq[pin].link == pirq) {
923 /* We refuse to override the dev->irq information. Give a warning! */
924 if ( dev2->irq && dev2->irq != irq && \
925 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
926 ((1 << dev2->irq) & mask)) ) {
927#ifndef CONFIG_PCI_MSI
928 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
929 pci_name(dev2), dev2->irq, irq);
930#endif
931 continue;
932 }
933 dev2->irq = irq;
934 pirq_penalty[irq]++;
935 if (dev != dev2)
936 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
937 }
938 }
939 return 1;
940}
941
942static void __init pcibios_fixup_irqs(void)
943{
944 struct pci_dev *dev = NULL;
945 u8 pin;
946
947 DBG(KERN_DEBUG "PCI: IRQ fixup\n");
948 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
949 /*
950 * If the BIOS has set an out of range IRQ number, just ignore it.
951 * Also keep track of which IRQ's are already in use.
952 */
953 if (dev->irq >= 16) {
954 DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
955 dev->irq = 0;
956 }
957 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
958 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
959 pirq_penalty[dev->irq] = 0;
960 pirq_penalty[dev->irq]++;
961 }
962
963 dev = NULL;
964 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
965 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
966#ifdef CONFIG_X86_IO_APIC
967 /*
968 * Recalculate IRQ numbers if we use the I/O APIC.
969 */
970 if (io_apic_assign_pci_irqs)
971 {
972 int irq;
973
974 if (pin) {
975 pin--; /* interrupt pins are numbered starting from 1 */
976 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
977 /*
978 * Busses behind bridges are typically not listed in the MP-table.
979 * In this case we have to look up the IRQ based on the parent bus,
980 * parent slot, and pin number. The SMP code detects such bridged
981 * busses itself so we should get into this branch reliably.
982 */
983 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
984 struct pci_dev * bridge = dev->bus->self;
985
986 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
987 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
988 PCI_SLOT(bridge->devfn), pin);
989 if (irq >= 0)
990 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
991 pci_name(bridge), 'A' + pin, irq);
992 }
993 if (irq >= 0) {
994 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
995 pci_name(dev), 'A' + pin, irq);
996 dev->irq = irq;
997 }
998 }
999 }
1000#endif
1001 /*
1002 * Still no IRQ? Try to lookup one...
1003 */
1004 if (pin && !dev->irq)
1005 pcibios_lookup_irq(dev, 0);
1006 }
1007}
1008
1009/*
1010 * Work around broken HP Pavilion Notebooks which assign USB to
1011 * IRQ 9 even though it is actually wired to IRQ 11
1012 */
1013static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
1014{
1015 if (!broken_hp_bios_irq9) {
1016 broken_hp_bios_irq9 = 1;
1017 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1018 }
1019 return 0;
1020}
1021
1022/*
1023 * Work around broken Acer TravelMate 360 Notebooks which assign
1024 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1025 */
1026static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
1027{
1028 if (!acer_tm360_irqrouting) {
1029 acer_tm360_irqrouting = 1;
1030 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1031 }
1032 return 0;
1033}
1034
1035static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1036 {
1037 .callback = fix_broken_hp_bios_irq9,
1038 .ident = "HP Pavilion N5400 Series Laptop",
1039 .matches = {
1040 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1041 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1042 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1043 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1044 },
1045 },
1046 {
1047 .callback = fix_acer_tm360_irqrouting,
1048 .ident = "Acer TravelMate 36x Laptop",
1049 .matches = {
1050 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1051 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1052 },
1053 },
1054 { }
1055};
1056
1057static int __init pcibios_irq_init(void)
1058{
1059 DBG(KERN_DEBUG "PCI: IRQ init\n");
1060
1061 if (pcibios_enable_irq || raw_pci_ops == NULL)
1062 return 0;
1063
1064 dmi_check_system(pciirq_dmi_table);
1065
1066 pirq_table = pirq_find_routing_table();
1067
1068#ifdef CONFIG_PCI_BIOS
1069 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1070 pirq_table = pcibios_get_irq_routing_table();
1071#endif
1072 if (pirq_table) {
1073 pirq_peer_trick();
1074 pirq_find_router(&pirq_router);
1075 if (pirq_table->exclusive_irqs) {
1076 int i;
1077 for (i=0; i<16; i++)
1078 if (!(pirq_table->exclusive_irqs & (1 << i)))
1079 pirq_penalty[i] += 100;
1080 }
1081 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1082 if (io_apic_assign_pci_irqs)
1083 pirq_table = NULL;
1084 }
1085
1086 pcibios_enable_irq = pirq_enable_irq;
1087
1088 pcibios_fixup_irqs();
1089 return 0;
1090}
1091
1092subsys_initcall(pcibios_irq_init);
1093
1094
1095static void pirq_penalize_isa_irq(int irq, int active)
1096{
1097 /*
1098 * If any ISAPnP device reports an IRQ in its list of possible
1099 * IRQ's, we try to avoid assigning it to PCI devices.
1100 */
1101 if (irq < 16) {
1102 if (active)
1103 pirq_penalty[irq] += 1000;
1104 else
1105 pirq_penalty[irq] += 100;
1106 }
1107}
1108
1109void pcibios_penalize_isa_irq(int irq, int active)
1110{
1111#ifdef CONFIG_ACPI
1112 if (!acpi_noirq)
1113 acpi_penalize_isa_irq(irq, active);
1114 else
1115#endif
1116 pirq_penalize_isa_irq(irq, active);
1117}
1118
1119static int pirq_enable_irq(struct pci_dev *dev)
1120{
1121 u8 pin;
1122 struct pci_dev *temp_dev;
1123
1124 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1125 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1126 char *msg = "";
1127
1128 pin--; /* interrupt pins are numbered starting from 1 */
1129
1130 if (io_apic_assign_pci_irqs) {
1131 int irq;
1132
1133 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1134 /*
1135 * Busses behind bridges are typically not listed in the MP-table.
1136 * In this case we have to look up the IRQ based on the parent bus,
1137 * parent slot, and pin number. The SMP code detects such bridged
1138 * busses itself so we should get into this branch reliably.
1139 */
1140 temp_dev = dev;
1141 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1142 struct pci_dev * bridge = dev->bus->self;
1143
1144 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1145 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1146 PCI_SLOT(bridge->devfn), pin);
1147 if (irq >= 0)
1148 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1149 pci_name(bridge), 'A' + pin, irq);
1150 dev = bridge;
1151 }
1152 dev = temp_dev;
1153 if (irq >= 0) {
1154 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1155 pci_name(dev), 'A' + pin, irq);
1156 dev->irq = irq;
1157 return 0;
1158 } else
1159 msg = " Probably buggy MP table.";
1160 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1161 msg = "";
1162 else
1163 msg = " Please try using pci=biosirq.";
1164
1165 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1166 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1167 return 0;
1168
1169 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1170 'A' + pin, pci_name(dev), msg);
1171 }
1172 return 0;
1173}
diff --git a/arch/ia64/ia32/audit.c b/arch/ia64/ia32/audit.c
index 8850fe40ea34..5e901c75df1b 100644
--- a/arch/ia64/ia32/audit.c
+++ b/arch/ia64/ia32/audit.c
@@ -1,4 +1,4 @@
1#include <asm-i386/unistd.h> 1#include <asm-x86/unistd_32.h>
2 2
3unsigned ia32_dir_class[] = { 3unsigned ia32_dir_class[] = {
4#include <asm-generic/audit_dir_write.h> 4#include <asm-generic/audit_dir_write.h>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3b807b4bc7cd..f943736541cb 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -3,6 +3,7 @@ config MIPS
3 default y 3 default y
4 # Horrible source of confusion. Die, die, die ... 4 # Horrible source of confusion. Die, die, die ...
5 select EMBEDDED 5 select EMBEDDED
6 select RTC_LIB
6 7
7mainmenu "Linux/MIPS Kernel Configuration" 8mainmenu "Linux/MIPS Kernel Configuration"
8 9
@@ -44,12 +45,30 @@ config BASLER_EXCITE_PROTOTYPE
44 note that a kernel built with this option selected will not be 45 note that a kernel built with this option selected will not be
45 able to run on normal units. 46 able to run on normal units.
46 47
48config BCM47XX
49 bool "BCM47XX based boards"
50 select DMA_NONCOHERENT
51 select HW_HAS_PCI
52 select IRQ_CPU
53 select SYS_HAS_CPU_MIPS32_R1
54 select SYS_SUPPORTS_32BIT_KERNEL
55 select SYS_SUPPORTS_LITTLE_ENDIAN
56 select SSB
57 select SSB_DRIVER_MIPS
58 select GENERIC_GPIO
59 select SYS_HAS_EARLY_PRINTK
60 select CFE
61 help
62 Support for BCM47XX based boards
63
47config MIPS_COBALT 64config MIPS_COBALT
48 bool "Cobalt Server" 65 bool "Cobalt Server"
49 select DMA_NONCOHERENT 66 select DMA_NONCOHERENT
50 select HW_HAS_PCI 67 select HW_HAS_PCI
68 select I8253
51 select I8259 69 select I8259
52 select IRQ_CPU 70 select IRQ_CPU
71 select IRQ_GT641XX
53 select PCI_GT64XXX_PCI0 72 select PCI_GT64XXX_PCI0
54 select SYS_HAS_CPU_NEVADA 73 select SYS_HAS_CPU_NEVADA
55 select SYS_HAS_EARLY_PRINTK 74 select SYS_HAS_EARLY_PRINTK
@@ -93,6 +112,8 @@ config MACH_JAZZ
93 select ARC32 112 select ARC32
94 select ARCH_MAY_HAVE_PC_FDC 113 select ARCH_MAY_HAVE_PC_FDC
95 select GENERIC_ISA_DMA 114 select GENERIC_ISA_DMA
115 select IRQ_CPU
116 select I8253
96 select I8259 117 select I8259
97 select ISA 118 select ISA
98 select PCSPEAKER 119 select PCSPEAKER
@@ -107,6 +128,20 @@ config MACH_JAZZ
107 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and 128 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
108 Olivetti M700-10 workstations. 129 Olivetti M700-10 workstations.
109 130
131config LASAT
132 bool "LASAT Networks platforms"
133 select DMA_NONCOHERENT
134 select SYS_HAS_EARLY_PRINTK
135 select HW_HAS_PCI
136 select PCI_GT64XXX_PCI0
137 select MIPS_NILE4
138 select R5000_CPU_SCACHE
139 select SYS_HAS_CPU_R5000
140 select SYS_SUPPORTS_32BIT_KERNEL
141 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
142 select SYS_SUPPORTS_LITTLE_ENDIAN
143 select GENERIC_HARDIRQS_NO__DO_IRQ
144
110config LEMOTE_FULONG 145config LEMOTE_FULONG
111 bool "Lemote Fulong mini-PC" 146 bool "Lemote Fulong mini-PC"
112 select ARCH_SPARSEMEM_ENABLE 147 select ARCH_SPARSEMEM_ENABLE
@@ -168,6 +203,7 @@ config MIPS_MALTA
168 select GENERIC_ISA_DMA 203 select GENERIC_ISA_DMA
169 select IRQ_CPU 204 select IRQ_CPU
170 select HW_HAS_PCI 205 select HW_HAS_PCI
206 select I8253
171 select I8259 207 select I8259
172 select MIPS_BOARDS_GEN 208 select MIPS_BOARDS_GEN
173 select MIPS_BONITO64 209 select MIPS_BONITO64
@@ -301,7 +337,9 @@ config QEMU
301 select DMA_COHERENT 337 select DMA_COHERENT
302 select GENERIC_ISA_DMA 338 select GENERIC_ISA_DMA
303 select HAVE_STD_PC_SERIAL_PORT 339 select HAVE_STD_PC_SERIAL_PORT
340 select I8253
304 select I8259 341 select I8259
342 select IRQ_CPU
305 select ISA 343 select ISA
306 select PCSPEAKER 344 select PCSPEAKER
307 select SWAP_IO_SPACE 345 select SWAP_IO_SPACE
@@ -328,6 +366,7 @@ config SGI_IP22
328 select BOOT_ELF32 366 select BOOT_ELF32
329 select DMA_NONCOHERENT 367 select DMA_NONCOHERENT
330 select HW_HAS_EISA 368 select HW_HAS_EISA
369 select I8253
331 select IP22_CPU_SCACHE 370 select IP22_CPU_SCACHE
332 select IRQ_CPU 371 select IRQ_CPU
333 select GENERIC_ISA_DMA_SUPPORT_BROKEN 372 select GENERIC_ISA_DMA_SUPPORT_BROKEN
@@ -352,7 +391,6 @@ config SGI_IP27
352 select SYS_HAS_EARLY_PRINTK 391 select SYS_HAS_EARLY_PRINTK
353 select HW_HAS_PCI 392 select HW_HAS_PCI
354 select NR_CPUS_DEFAULT_64 393 select NR_CPUS_DEFAULT_64
355 select PCI_DOMAINS
356 select SYS_HAS_CPU_R10000 394 select SYS_HAS_CPU_R10000
357 select SYS_SUPPORTS_64BIT_KERNEL 395 select SYS_SUPPORTS_64BIT_KERNEL
358 select SYS_SUPPORTS_BIG_ENDIAN 396 select SYS_SUPPORTS_BIG_ENDIAN
@@ -484,7 +522,6 @@ config SIBYTE_BIGSUR
484 select BOOT_ELF32 522 select BOOT_ELF32
485 select DMA_COHERENT 523 select DMA_COHERENT
486 select NR_CPUS_DEFAULT_4 524 select NR_CPUS_DEFAULT_4
487 select PCI_DOMAINS
488 select SIBYTE_BCM1x80 525 select SIBYTE_BCM1x80
489 select SWAP_IO_SPACE 526 select SWAP_IO_SPACE
490 select SYS_HAS_CPU_SB1 527 select SYS_HAS_CPU_SB1
@@ -502,6 +539,7 @@ config SNI_RM
502 select HW_HAS_EISA 539 select HW_HAS_EISA
503 select HW_HAS_PCI 540 select HW_HAS_PCI
504 select IRQ_CPU 541 select IRQ_CPU
542 select I8253
505 select I8259 543 select I8259
506 select ISA 544 select ISA
507 select PCSPEAKER 545 select PCSPEAKER
@@ -599,6 +637,7 @@ endchoice
599 637
600source "arch/mips/au1000/Kconfig" 638source "arch/mips/au1000/Kconfig"
601source "arch/mips/jazz/Kconfig" 639source "arch/mips/jazz/Kconfig"
640source "arch/mips/lasat/Kconfig"
602source "arch/mips/pmc-sierra/Kconfig" 641source "arch/mips/pmc-sierra/Kconfig"
603source "arch/mips/sgi-ip27/Kconfig" 642source "arch/mips/sgi-ip27/Kconfig"
604source "arch/mips/sibyte/Kconfig" 643source "arch/mips/sibyte/Kconfig"
@@ -635,10 +674,18 @@ config GENERIC_CALIBRATE_DELAY
635 bool 674 bool
636 default y 675 default y
637 676
677config GENERIC_CLOCKEVENTS
678 bool
679 default y
680
638config GENERIC_TIME 681config GENERIC_TIME
639 bool 682 bool
640 default y 683 default y
641 684
685config GENERIC_CMOS_UPDATE
686 bool
687 default y
688
642config SCHED_NO_NO_OMIT_FRAME_POINTER 689config SCHED_NO_NO_OMIT_FRAME_POINTER
643 bool 690 bool
644 default y 691 default y
@@ -659,6 +706,9 @@ config ARCH_MAY_HAVE_PC_FDC
659config BOOT_RAW 706config BOOT_RAW
660 bool 707 bool
661 708
709config CFE
710 bool
711
662config DMA_COHERENT 712config DMA_COHERENT
663 bool 713 bool
664 714
@@ -706,6 +756,9 @@ config MIPS_BONITO64
706config MIPS_MSC 756config MIPS_MSC
707 bool 757 bool
708 758
759config MIPS_NILE4
760 bool
761
709config MIPS_DISABLE_OBSOLETE_IDE 762config MIPS_DISABLE_OBSOLETE_IDE
710 bool 763 bool
711 764
@@ -775,6 +828,9 @@ config IRQ_MSP_CIC
775config IRQ_TXX9 828config IRQ_TXX9
776 bool 829 bool
777 830
831config IRQ_GT641XX
832 bool
833
778config MIPS_BOARDS_GEN 834config MIPS_BOARDS_GEN
779 bool 835 bool
780 836
@@ -856,6 +912,8 @@ config BOOT_ELF64
856 912
857menu "CPU selection" 913menu "CPU selection"
858 914
915source "kernel/time/Kconfig"
916
859choice 917choice
860 prompt "CPU type" 918 prompt "CPU type"
861 default CPU_R4X00 919 default CPU_R4X00
@@ -1316,6 +1374,7 @@ config MIPS_MT_SMTC
1316 depends on CPU_MIPS32_R2 1374 depends on CPU_MIPS32_R2
1317 #depends on CPU_MIPS64_R2 # once there is hardware ... 1375 #depends on CPU_MIPS64_R2 # once there is hardware ...
1318 depends on SYS_SUPPORTS_MULTITHREADING 1376 depends on SYS_SUPPORTS_MULTITHREADING
1377 select GENERIC_CLOCKEVENTS_BROADCAST
1319 select CPU_MIPSR2_IRQ_VI 1378 select CPU_MIPSR2_IRQ_VI
1320 select CPU_MIPSR2_IRQ_EI 1379 select CPU_MIPSR2_IRQ_EI
1321 select CPU_MIPSR2_SRS 1380 select CPU_MIPSR2_SRS
@@ -1378,6 +1437,19 @@ config MIPS_MT_SMTC_IM_BACKSTOP
1378 impact on interrupt service overhead. Disable it only if you know 1437 impact on interrupt service overhead. Disable it only if you know
1379 what you are doing. 1438 what you are doing.
1380 1439
1440config MIPS_MT_SMTC_IRQAFF
1441 bool "Support IRQ affinity API"
1442 depends on MIPS_MT_SMTC
1443 default n
1444 help
1445 Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1446 for SMTC Linux kernel. Requires platform support, of which
1447 an example can be found in the MIPS kernel i8259 and Malta
1448 platform code. It is recommended that MIPS_MT_SMTC_INSTANT_REPLAY
1449 be enabled if MIPS_MT_SMTC_IRQAFF is used. Adds overhead to
1450 interrupt dispatch, and should be used only if you know what
1451 you are doing.
1452
1381config MIPS_VPE_LOADER_TOM 1453config MIPS_VPE_LOADER_TOM
1382 bool "Load VPE program into memory hidden from linux" 1454 bool "Load VPE program into memory hidden from linux"
1383 depends on MIPS_VPE_LOADER 1455 depends on MIPS_VPE_LOADER
@@ -1472,6 +1544,9 @@ config CPU_HAS_SYNC
1472 depends on !CPU_R3000 1544 depends on !CPU_R3000
1473 default y 1545 default y
1474 1546
1547config GENERIC_CLOCKEVENTS_BROADCAST
1548 bool
1549
1475# 1550#
1476# Use the generic interrupt handling code in kernel/irq/: 1551# Use the generic interrupt handling code in kernel/irq/:
1477# 1552#
@@ -1762,6 +1837,7 @@ config HW_HAS_PCI
1762config PCI 1837config PCI
1763 bool "Support for PCI controller" 1838 bool "Support for PCI controller"
1764 depends on HW_HAS_PCI 1839 depends on HW_HAS_PCI
1840 select PCI_DOMAINS
1765 help 1841 help
1766 Find out whether you have a PCI motherboard. PCI is the name of a 1842 Find out whether you have a PCI motherboard. PCI is the name of a
1767 bus system, i.e. the way the CPU talks to the other stuff inside 1843 bus system, i.e. the way the CPU talks to the other stuff inside
@@ -1775,7 +1851,6 @@ config PCI
1775 1851
1776config PCI_DOMAINS 1852config PCI_DOMAINS
1777 bool 1853 bool
1778 depends on PCI
1779 1854
1780source "drivers/pci/Kconfig" 1855source "drivers/pci/Kconfig"
1781 1856
@@ -1824,6 +1899,9 @@ config MMU
1824 bool 1899 bool
1825 default y 1900 default y
1826 1901
1902config I8253
1903 bool
1904
1827config PCSPEAKER 1905config PCSPEAKER
1828 bool 1906 bool
1829 1907
@@ -1840,21 +1918,6 @@ source "fs/Kconfig.binfmt"
1840config TRAD_SIGNALS 1918config TRAD_SIGNALS
1841 bool 1919 bool
1842 1920
1843config BUILD_ELF64
1844 bool "Use 64-bit ELF format for building"
1845 depends on 64BIT
1846 help
1847 A 64-bit kernel is usually built using the 64-bit ELF binary object
1848 format as it's one that allows arbitrary 64-bit constructs. For
1849 kernels that are loaded within the KSEG compatibility segments the
1850 32-bit ELF format can optionally be used resulting in a somewhat
1851 smaller binary, but this option is not explicitly supported by the
1852 toolchain and since binutils 2.14 it does not even work at all.
1853
1854 Say Y to use the 64-bit format or N to use the 32-bit one.
1855
1856 If unsure say Y.
1857
1858config BINFMT_IRIX 1921config BINFMT_IRIX
1859 bool "Include IRIX binary compatibility" 1922 bool "Include IRIX binary compatibility"
1860 depends on CPU_BIG_ENDIAN && 32BIT && BROKEN 1923 depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 32c1c8fb6f98..ebd5d02a7d78 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -60,11 +60,6 @@ vmlinux-32 = vmlinux.32
60vmlinux-64 = vmlinux 60vmlinux-64 = vmlinux
61 61
62cflags-y += -mabi=64 62cflags-y += -mabi=64
63ifdef CONFIG_BUILD_ELF64
64cflags-y += $(call cc-option,-mno-explicit-relocs)
65else
66cflags-y += $(call cc-option,-msym32)
67endif
68endif 63endif
69 64
70all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32) 65all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32)
@@ -153,7 +148,8 @@ endif
153# 148#
154# Firmware support 149# Firmware support
155# 150#
156libs-$(CONFIG_ARC) += arch/mips/arc/ 151libs-$(CONFIG_ARC) += arch/mips/fw/arc/
152libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
157libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/ 153libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
158 154
159# 155#
@@ -367,6 +363,13 @@ cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
367load-$(CONFIG_BASLER_EXCITE) += 0x80100000 363load-$(CONFIG_BASLER_EXCITE) += 0x80100000
368 364
369# 365#
366# LASAT platforms
367#
368core-$(CONFIG_LASAT) += arch/mips/lasat/
369cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
370load-$(CONFIG_LASAT) += 0xffffffff80000000
371
372#
370# Common VR41xx 373# Common VR41xx
371# 374#
372core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ 375core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
@@ -533,6 +536,13 @@ libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
533load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 536load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
534 537
535# 538#
539# Broadcom BCM47XX boards
540#
541core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
542cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
543load-$(CONFIG_BCM47XX) := 0xffffffff80001000
544
545#
536# SNI RM 546# SNI RM
537# 547#
538core-$(CONFIG_SNI_RM) += arch/mips/sni/ 548core-$(CONFIG_SNI_RM) += arch/mips/sni/
@@ -578,6 +588,26 @@ else
578JIFFIES = jiffies_64 588JIFFIES = jiffies_64
579endif 589endif
580 590
591#
592# Automatically detect the build format. By default we choose
593# the elf format according to the load address.
594# We can always force a build with a 64-bits symbol format by
595# passing 'KBUILD_SYM32=no' option to the make's command line.
596#
597ifdef CONFIG_64BIT
598 ifndef KBUILD_SYM32
599 ifeq ($(shell expr $(load-y) \< 0xffffffff80000000), 0)
600 KBUILD_SYM32 = y
601 endif
602 endif
603
604 ifeq ($(KBUILD_SYM32), y)
605 ifeq ($(call cc-option-yn,-msym32), y)
606 cflags-y += -msym32 -DKBUILD_64BIT_SYM32
607 endif
608 endif
609endif
610
581AFLAGS += $(cflags-y) 611AFLAGS += $(cflags-y)
582CFLAGS += $(cflags-y) \ 612CFLAGS += $(cflags-y) \
583 -D"VMLINUX_LOAD_ADDRESS=$(load-y)" 613 -D"VMLINUX_LOAD_ADDRESS=$(load-y)"
@@ -615,6 +645,11 @@ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
615 645
616drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ 646drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
617 647
648ifdef CONFIG_LASAT
649rom.bin rom.sw: vmlinux
650 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
651endif
652
618# 653#
619# Some machines like the Indy need 32-bit ELF binaries for booting purposes. 654# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
620# Other need ECOFF, so we build a 32-bit ELF binary for them which we then 655# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
@@ -658,6 +693,7 @@ endif
658 693
659archclean: 694archclean:
660 @$(MAKE) $(clean)=arch/mips/boot 695 @$(MAKE) $(clean)=arch/mips/boot
696 @$(MAKE) $(clean)=arch/mips/lasat
661 697
662define archhelp 698define archhelp
663 echo ' vmlinux.ecoff - ECOFF boot image' 699 echo ' vmlinux.ecoff - ECOFF boot image'
diff --git a/arch/mips/arc/env.c b/arch/mips/arc/env.c
deleted file mode 100644
index e521a6e010aa..000000000000
--- a/arch/mips/arc/env.c
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * env.c: ARCS environment variable routines.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 */
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13
14#include <asm/arc/types.h>
15#include <asm/sgialib.h>
16
17PCHAR __init
18ArcGetEnvironmentVariable(CHAR *name)
19{
20 return (CHAR *) ARC_CALL1(get_evar, name);
21}
22
23LONG __init
24ArcSetEnvironmentVariable(PCHAR name, PCHAR value)
25{
26 return ARC_CALL2(set_evar, name, value);
27}
diff --git a/arch/mips/arc/file.c b/arch/mips/arc/file.c
deleted file mode 100644
index cb0127cf5bc1..000000000000
--- a/arch/mips/arc/file.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * ARC firmware interface.
7 *
8 * Copyright (C) 1994, 1995, 1996, 1999 Ralf Baechle
9 * Copyright (C) 1999 Silicon Graphics, Inc.
10 */
11#include <linux/init.h>
12
13#include <asm/arc/types.h>
14#include <asm/sgialib.h>
15
16LONG
17ArcGetDirectoryEntry(ULONG FileID, struct linux_vdirent *Buffer,
18 ULONG N, ULONG *Count)
19{
20 return ARC_CALL4(get_vdirent, FileID, Buffer, N, Count);
21}
22
23LONG
24ArcOpen(CHAR *Path, enum linux_omode OpenMode, ULONG *FileID)
25{
26 return ARC_CALL3(open, Path, OpenMode, FileID);
27}
28
29LONG
30ArcClose(ULONG FileID)
31{
32 return ARC_CALL1(close, FileID);
33}
34
35LONG
36ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count)
37{
38 return ARC_CALL4(read, FileID, Buffer, N, Count);
39}
40
41LONG
42ArcGetReadStatus(ULONG FileID)
43{
44 return ARC_CALL1(get_rstatus, FileID);
45}
46
47LONG
48ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count)
49{
50 return ARC_CALL4(write, FileID, Buffer, N, Count);
51}
52
53LONG
54ArcSeek(ULONG FileID, struct linux_bigint *Position, enum linux_seekmode SeekMode)
55{
56 return ARC_CALL3(seek, FileID, Position, SeekMode);
57}
58
59LONG
60ArcMount(char *name, enum linux_mountops op)
61{
62 return ARC_CALL2(mount, name, op);
63}
64
65LONG
66ArcGetFileInformation(ULONG FileID, struct linux_finfo *Information)
67{
68 return ARC_CALL2(get_finfo, FileID, Information);
69}
70
71LONG ArcSetFileInformation(ULONG FileID, ULONG AttributeFlags,
72 ULONG AttributeMask)
73{
74 return ARC_CALL3(set_finfo, FileID, AttributeFlags, AttributeMask);
75}
diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c
deleted file mode 100644
index 4b907369b0f9..000000000000
--- a/arch/mips/arc/identify.c
+++ /dev/null
@@ -1,123 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * identify.c: identify machine by looking up system identifier
7 *
8 * Copyright (C) 1998 Thomas Bogendoerfer
9 *
10 * This code is based on arch/mips/sgi/kernel/system.c, which is
11 *
12 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/string.h>
18
19#include <asm/sgialib.h>
20#include <asm/bootinfo.h>
21
22struct smatch {
23 char *arcname;
24 char *liname;
25 int group;
26 int type;
27 int flags;
28};
29
30static struct smatch mach_table[] = {
31 { "SGI-IP22",
32 "SGI Indy",
33 MACH_GROUP_SGI,
34 MACH_SGI_IP22,
35 PROM_FLAG_ARCS
36 }, { "SGI-IP27",
37 "SGI Origin",
38 MACH_GROUP_SGI,
39 MACH_SGI_IP27,
40 PROM_FLAG_ARCS
41 }, { "SGI-IP28",
42 "SGI IP28",
43 MACH_GROUP_SGI,
44 MACH_SGI_IP28,
45 PROM_FLAG_ARCS
46 }, { "SGI-IP30",
47 "SGI Octane",
48 MACH_GROUP_SGI,
49 MACH_SGI_IP30,
50 PROM_FLAG_ARCS
51 }, { "SGI-IP32",
52 "SGI O2",
53 MACH_GROUP_SGI,
54 MACH_SGI_IP32,
55 PROM_FLAG_ARCS
56 }, { "Microsoft-Jazz",
57 "Jazz MIPS_Magnum_4000",
58 MACH_GROUP_JAZZ,
59 MACH_MIPS_MAGNUM_4000,
60 0
61 }, { "PICA-61",
62 "Jazz Acer_PICA_61",
63 MACH_GROUP_JAZZ,
64 MACH_ACER_PICA_61,
65 0
66 }, { "RM200PCI",
67 "SNI RM200_PCI",
68 MACH_GROUP_SNI_RM,
69 MACH_SNI_RM200_PCI,
70 PROM_FLAG_DONT_FREE_TEMP
71 }
72};
73
74int prom_flags;
75
76static struct smatch * __init string_to_mach(const char *s)
77{
78 int i;
79
80 for (i = 0; i < ARRAY_SIZE(mach_table); i++) {
81 if (!strcmp(s, mach_table[i].arcname))
82 return &mach_table[i];
83 }
84
85 panic("Yeee, could not determine architecture type <%s>", s);
86}
87
88char *system_type;
89
90const char *get_system_type(void)
91{
92 return system_type;
93}
94
95void __init prom_identify_arch(void)
96{
97 pcomponent *p;
98 struct smatch *mach;
99 const char *iname;
100
101 /*
102 * The root component tells us what machine architecture we have here.
103 */
104 p = ArcGetChild(PROM_NULL_COMPONENT);
105 if (p == NULL) {
106#ifdef CONFIG_SGI_IP27
107 /* IP27 PROM misbehaves, seems to not implement ARC
108 GetChild(). So we just assume it's an IP27. */
109 iname = "SGI-IP27";
110#else
111 iname = "Unknown";
112#endif
113 } else
114 iname = (char *) (long) p->iname;
115
116 printk("ARCH: %s\n", iname);
117 mach = string_to_mach(iname);
118 system_type = mach->liname;
119
120 mips_machgroup = mach->group;
121 mips_machtype = mach->type;
122 prom_flags = mach->flags;
123}
diff --git a/arch/mips/arc/memory.c b/arch/mips/arc/memory.c
deleted file mode 100644
index 83d15791ef6a..000000000000
--- a/arch/mips/arc/memory.c
+++ /dev/null
@@ -1,160 +0,0 @@
1/*
2 * memory.c: PROM library functions for acquiring/using memory descriptors
3 * given to us from the ARCS firmware.
4 *
5 * Copyright (C) 1996 by David S. Miller
6 * Copyright (C) 1999, 2000, 2001 by Ralf Baechle
7 * Copyright (C) 1999, 2000 by Silicon Graphics, Inc.
8 *
9 * PROM library functions for acquiring/using memory descriptors given to us
10 * from the ARCS firmware. This is only used when CONFIG_ARC_MEMORY is set
11 * because on some machines like SGI IP27 the ARC memory configuration data
12 * completly bogus and alternate easier to use mechanisms are available.
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/sched.h>
18#include <linux/mm.h>
19#include <linux/bootmem.h>
20#include <linux/swap.h>
21
22#include <asm/sgialib.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/bootinfo.h>
26
27#undef DEBUG
28
29/*
30 * For ARC firmware memory functions the unit of meassuring memory is always
31 * a 4k page of memory
32 */
33#define ARC_PAGE_SHIFT 12
34
35struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
36{
37 return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
38}
39
40#ifdef DEBUG /* convenient for debugging */
41static char *arcs_mtypes[8] = {
42 "Exception Block",
43 "ARCS Romvec Page",
44 "Free/Contig RAM",
45 "Generic Free RAM",
46 "Bad Memory",
47 "Standalone Program Pages",
48 "ARCS Temp Storage Area",
49 "ARCS Permanent Storage Area"
50};
51
52static char *arc_mtypes[8] = {
53 "Exception Block",
54 "SystemParameterBlock",
55 "FreeMemory",
56 "Bad Memory",
57 "LoadedProgram",
58 "FirmwareTemporary",
59 "FirmwarePermanent",
60 "FreeContiguous"
61};
62#define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] \
63 : arc_mtypes[a.arc]
64#endif
65
66static inline int memtype_classify_arcs (union linux_memtypes type)
67{
68 switch (type.arcs) {
69 case arcs_fcontig:
70 case arcs_free:
71 return BOOT_MEM_RAM;
72 case arcs_atmp:
73 return BOOT_MEM_ROM_DATA;
74 case arcs_eblock:
75 case arcs_rvpage:
76 case arcs_bmem:
77 case arcs_prog:
78 case arcs_aperm:
79 return BOOT_MEM_RESERVED;
80 default:
81 BUG();
82 }
83 while(1); /* Nuke warning. */
84}
85
86static inline int memtype_classify_arc (union linux_memtypes type)
87{
88 switch (type.arc) {
89 case arc_free:
90 case arc_fcontig:
91 return BOOT_MEM_RAM;
92 case arc_atmp:
93 return BOOT_MEM_ROM_DATA;
94 case arc_eblock:
95 case arc_rvpage:
96 case arc_bmem:
97 case arc_prog:
98 case arc_aperm:
99 return BOOT_MEM_RESERVED;
100 default:
101 BUG();
102 }
103 while(1); /* Nuke warning. */
104}
105
106static int __init prom_memtype_classify (union linux_memtypes type)
107{
108 if (prom_flags & PROM_FLAG_ARCS) /* SGI is ``different'' ... */
109 return memtype_classify_arcs(type);
110
111 return memtype_classify_arc(type);
112}
113
114void __init prom_meminit(void)
115{
116 struct linux_mdesc *p;
117
118#ifdef DEBUG
119 int i = 0;
120
121 printk("ARCS MEMORY DESCRIPTOR dump:\n");
122 p = ArcGetMemoryDescriptor(PROM_NULL_MDESC);
123 while(p) {
124 printk("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n",
125 i, p, p->base, p->pages, mtypes(p->type));
126 p = ArcGetMemoryDescriptor(p);
127 i++;
128 }
129#endif
130
131 p = PROM_NULL_MDESC;
132 while ((p = ArcGetMemoryDescriptor(p))) {
133 unsigned long base, size;
134 long type;
135
136 base = p->base << ARC_PAGE_SHIFT;
137 size = p->pages << ARC_PAGE_SHIFT;
138 type = prom_memtype_classify(p->type);
139
140 add_memory_region(base, size, type);
141 }
142}
143
144void __init prom_free_prom_memory(void)
145{
146 unsigned long addr;
147 int i;
148
149 if (prom_flags & PROM_FLAG_DONT_FREE_TEMP)
150 return;
151
152 for (i = 0; i < boot_mem_map.nr_map; i++) {
153 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
154 continue;
155
156 addr = boot_mem_map.map[i].addr;
157 free_init_pages("prom memory",
158 addr, addr + boot_mem_map.map[i].size);
159 }
160}
diff --git a/arch/mips/arc/misc.c b/arch/mips/arc/misc.c
deleted file mode 100644
index b2e10b9e9452..000000000000
--- a/arch/mips/arc/misc.c
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Miscellaneous ARCS PROM routines.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14
15#include <asm/bcache.h>
16
17#include <asm/arc/types.h>
18#include <asm/sgialib.h>
19#include <asm/bootinfo.h>
20#include <asm/system.h>
21
22VOID
23ArcHalt(VOID)
24{
25 bc_disable();
26 local_irq_disable();
27 ARC_CALL0(halt);
28never: goto never;
29}
30
31VOID
32ArcPowerDown(VOID)
33{
34 bc_disable();
35 local_irq_disable();
36 ARC_CALL0(pdown);
37never: goto never;
38}
39
40/* XXX is this a soft reset basically? XXX */
41VOID
42ArcRestart(VOID)
43{
44 bc_disable();
45 local_irq_disable();
46 ARC_CALL0(restart);
47never: goto never;
48}
49
50VOID
51ArcReboot(VOID)
52{
53 bc_disable();
54 local_irq_disable();
55 ARC_CALL0(reboot);
56never: goto never;
57}
58
59VOID
60ArcEnterInteractiveMode(VOID)
61{
62 bc_disable();
63 local_irq_disable();
64 ARC_CALL0(imode);
65never: goto never;
66}
67
68LONG
69ArcSaveConfiguration(VOID)
70{
71 return ARC_CALL0(cfg_save);
72}
73
74struct linux_sysid *
75ArcGetSystemId(VOID)
76{
77 return (struct linux_sysid *) ARC_CALL0(get_sysid);
78}
79
80VOID __init
81ArcFlushAllCaches(VOID)
82{
83 ARC_CALL0(cache_flush);
84}
85
86DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
87{
88 return (DISPLAY_STATUS *) ARC_CALL1(GetDisplayStatus, FileID);
89}
diff --git a/arch/mips/arc/time.c b/arch/mips/arc/time.c
deleted file mode 100644
index 299ff2c5c0b5..000000000000
--- a/arch/mips/arc/time.c
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Extracting time information from ARCS prom.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 */
10#include <linux/init.h>
11
12#include <asm/arc/types.h>
13#include <asm/sgialib.h>
14
15struct linux_tinfo * __init
16ArcGetTime(VOID)
17{
18 return (struct linux_tinfo *) ARC_CALL0(get_tinfo);
19}
20
21ULONG __init
22ArcGetRelativeTime(VOID)
23{
24 return ARC_CALL0(get_rtime);
25}
diff --git a/arch/mips/arc/tree.c b/arch/mips/arc/tree.c
deleted file mode 100644
index abd1786ea09b..000000000000
--- a/arch/mips/arc/tree.c
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * PROM component device tree code.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 */
12#include <linux/init.h>
13#include <asm/arc/types.h>
14#include <asm/sgialib.h>
15
16#undef DEBUG_PROM_TREE
17
18pcomponent * __init
19ArcGetPeer(pcomponent *Current)
20{
21 if (Current == PROM_NULL_COMPONENT)
22 return PROM_NULL_COMPONENT;
23
24 return (pcomponent *) ARC_CALL1(next_component, Current);
25}
26
27pcomponent * __init
28ArcGetChild(pcomponent *Current)
29{
30 return (pcomponent *) ARC_CALL1(child_component, Current);
31}
32
33pcomponent * __init
34ArcGetParent(pcomponent *Current)
35{
36 if (Current == PROM_NULL_COMPONENT)
37 return PROM_NULL_COMPONENT;
38
39 return (pcomponent *) ARC_CALL1(parent_component, Current);
40}
41
42LONG __init
43ArcGetConfigurationData(VOID *Buffer, pcomponent *Current)
44{
45 return ARC_CALL2(component_data, Buffer, Current);
46}
47
48pcomponent * __init
49ArcAddChild(pcomponent *Current, pcomponent *Template, VOID *ConfigurationData)
50{
51 return (pcomponent *)
52 ARC_CALL3(child_add, Current, Template, ConfigurationData);
53}
54
55LONG __init
56ArcDeleteComponent(pcomponent *ComponentToDelete)
57{
58 return ARC_CALL1(comp_del, ComponentToDelete);
59}
60
61pcomponent * __init
62ArcGetComponent(CHAR *Path)
63{
64 return (pcomponent *)ARC_CALL1(component_by_path, Path);
65}
66
67#ifdef DEBUG_PROM_TREE
68
69static char *classes[] = {
70 "system", "processor", "cache", "adapter", "controller", "peripheral",
71 "memory"
72};
73
74static char *types[] = {
75 "arc", "cpu", "fpu", "picache", "pdcache", "sicache", "sdcache",
76 "sccache", "memdev", "eisa adapter", "tc adapter", "scsi adapter",
77 "dti adapter", "multi-func adapter", "disk controller",
78 "tp controller", "cdrom controller", "worm controller",
79 "serial controller", "net controller", "display controller",
80 "parallel controller", "pointer controller", "keyboard controller",
81 "audio controller", "misc controller", "disk peripheral",
82 "floppy peripheral", "tp peripheral", "modem peripheral",
83 "monitor peripheral", "printer peripheral", "pointer peripheral",
84 "keyboard peripheral", "terminal peripheral", "line peripheral",
85 "net peripheral", "misc peripheral", "anonymous"
86};
87
88static char *iflags[] = {
89 "bogus", "read only", "removable", "console in", "console out",
90 "input", "output"
91};
92
93static void __init
94dump_component(pcomponent *p)
95{
96 printk("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>",
97 p, classes[p->class], types[p->type],
98 iflags[p->iflags], p->vers, p->rev);
99 printk("key<%08lx>\n\tamask<%08lx>cdsize<%d>ilen<%d>iname<%s>\n",
100 p->key, p->amask, (int)p->cdsize, (int)p->ilen, p->iname);
101}
102
103static void __init
104traverse(pcomponent *p, int op)
105{
106 dump_component(p);
107 if(ArcGetChild(p))
108 traverse(ArcGetChild(p), 1);
109 if(ArcGetPeer(p) && op)
110 traverse(ArcGetPeer(p), 1);
111}
112
113void __init
114prom_testtree(void)
115{
116 pcomponent *p;
117
118 p = ArcGetChild(PROM_NULL_COMPONENT);
119 dump_component(p);
120 p = ArcGetChild(p);
121 while(p) {
122 dump_component(p);
123 p = ArcGetPeer(p);
124 }
125}
126
127#endif /* DEBUG_PROM_TREE */
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 626de44bd888..461cf0139737 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -184,7 +184,7 @@ static dbdev_tab_t dbdev_tab[] = {
184static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; 184static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
185 185
186static dbdev_tab_t * 186static dbdev_tab_t *
187find_dbdev_id (u32 id) 187find_dbdev_id(u32 id)
188{ 188{
189 int i; 189 int i;
190 dbdev_tab_t *p; 190 dbdev_tab_t *p;
@@ -213,7 +213,7 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev)
213 if ( NULL != p ) 213 if ( NULL != p )
214 { 214 {
215 memcpy(p, dev, sizeof(dbdev_tab_t)); 215 memcpy(p, dev, sizeof(dbdev_tab_t));
216 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); 216 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
217 ret = p->dev_id; 217 ret = p->dev_id;
218 new_id++; 218 new_id++;
219#if 0 219#if 0
@@ -671,7 +671,7 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
671 * parts. If it is fixedin the future, these dma_cache_inv will just 671 * parts. If it is fixedin the future, these dma_cache_inv will just
672 * be nothing more than empty macros. See io.h. 672 * be nothing more than empty macros. See io.h.
673 * */ 673 * */
674 dma_cache_inv((unsigned long)buf,nbytes); 674 dma_cache_inv((unsigned long)buf, nbytes);
675 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 675 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
676 au_sync(); 676 au_sync();
677 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 677 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 0a50af7f34b8..79e0b0a51ace 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -53,7 +53,7 @@ typedef unsigned int uint32;
53 53
54/* memory-mapped read/write of the port */ 54/* memory-mapped read/write of the port */
55#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff) 55#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
56#define UART16550_WRITE(y,z) (au_writel(z&0xff, DEBUG_BASE + y)) 56#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
57 57
58extern unsigned long get_au1x00_uart_baud_base(void); 58extern unsigned long get_au1x00_uart_baud_base(void);
59extern unsigned long cal_r4koff(void); 59extern unsigned long cal_r4koff(void);
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index ea6e99fbe2f7..a6640b998c6e 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -65,19 +65,6 @@
65#define EXT_INTC1_REQ1 5 /* IP 5 */ 65#define EXT_INTC1_REQ1 5 /* IP 5 */
66#define MIPS_TIMER_IP 7 /* IP 7 */ 66#define MIPS_TIMER_IP 7 /* IP 7 */
67 67
68extern void set_debug_traps(void);
69extern irq_cpustat_t irq_stat [NR_CPUS];
70extern void mips_timer_interrupt(void);
71
72static void setup_local_irq(unsigned int irq, int type, int int_req);
73static void end_irq(unsigned int irq_nr);
74static inline void mask_and_ack_level_irq(unsigned int irq_nr);
75static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr);
76static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr);
77static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr);
78inline void local_enable_irq(unsigned int irq_nr);
79inline void local_disable_irq(unsigned int irq_nr);
80
81void (*board_init_irq)(void); 68void (*board_init_irq)(void);
82 69
83static DEFINE_SPINLOCK(irq_lock); 70static DEFINE_SPINLOCK(irq_lock);
@@ -646,7 +633,7 @@ asmlinkage void plat_irq_dispatch(void)
646 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; 633 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
647 634
648 if (pending & CAUSEF_IP7) 635 if (pending & CAUSEF_IP7)
649 mips_timer_interrupt(); 636 do_IRQ(63);
650 else if (pending & CAUSEF_IP2) 637 else if (pending & CAUSEF_IP2)
651 intc0_req0_irqdispatch(); 638 intc0_req0_irqdispatch();
652 else if (pending & CAUSEF_IP3) 639 else if (pending & CAUSEF_IP3)
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index 3901e8e04755..6f57f72a7d57 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -211,7 +211,7 @@ int au_sleep(void)
211 unsigned long wakeup, flags; 211 unsigned long wakeup, flags;
212 extern void save_and_sleep(void); 212 extern void save_and_sleep(void);
213 213
214 spin_lock_irqsave(&pm_lock,flags); 214 spin_lock_irqsave(&pm_lock, flags);
215 215
216 save_core_regs(); 216 save_core_regs();
217 217
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index de5447e83849..b8638d293cf9 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -42,7 +42,7 @@ extern void (*flush_cache_all)(void);
42void au1000_restart(char *command) 42void au1000_restart(char *command)
43{ 43{
44 /* Set all integrated peripherals to disabled states */ 44 /* Set all integrated peripherals to disabled states */
45 extern void board_reset (void); 45 extern void board_reset(void);
46 u32 prid = read_c0_prid(); 46 u32 prid = read_c0_prid();
47 47
48 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); 48 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index a95b37773196..b212c0726125 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -50,7 +50,6 @@ extern void au1000_halt(void);
50extern void au1000_power_off(void); 50extern void au1000_power_off(void);
51extern void au1x_time_init(void); 51extern void au1x_time_init(void);
52extern void au1x_timer_setup(struct irqaction *irq); 52extern void au1x_timer_setup(struct irqaction *irq);
53extern void au1xxx_time_init(void);
54extern void set_cpuspec(void); 53extern void set_cpuspec(void);
55 54
56void __init plat_mem_setup(void) 55void __init plat_mem_setup(void)
@@ -112,7 +111,6 @@ void __init plat_mem_setup(void)
112 _machine_restart = au1000_restart; 111 _machine_restart = au1000_restart;
113 _machine_halt = au1000_halt; 112 _machine_halt = au1000_halt;
114 pm_power_off = au1000_power_off; 113 pm_power_off = au1000_power_off;
115 board_time_init = au1xxx_time_init;
116 114
117 /* IO/MEM resources. */ 115 /* IO/MEM resources. */
118 set_io_port_base(0); 116 set_io_port_base(0);
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 8fc29982d700..2556399708ba 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -64,48 +64,8 @@ static unsigned long last_pc0, last_match20;
64 64
65static DEFINE_SPINLOCK(time_lock); 65static DEFINE_SPINLOCK(time_lock);
66 66
67static inline void ack_r4ktimer(unsigned long newval)
68{
69 write_c0_compare(newval);
70}
71
72/*
73 * There are a lot of conceptually broken versions of the MIPS timer interrupt
74 * handler floating around. This one is rather different, but the algorithm
75 * is provably more robust.
76 */
77unsigned long wtimer; 67unsigned long wtimer;
78 68
79void mips_timer_interrupt(void)
80{
81 int irq = 63;
82
83 irq_enter();
84 kstat_this_cpu.irqs[irq]++;
85
86 if (r4k_offset == 0)
87 goto null;
88
89 do {
90 kstat_this_cpu.irqs[irq]++;
91 do_timer(1);
92#ifndef CONFIG_SMP
93 update_process_times(user_mode(get_irq_regs()));
94#endif
95 r4k_cur += r4k_offset;
96 ack_r4ktimer(r4k_cur);
97
98 } while (((unsigned long)read_c0_count()
99 - r4k_cur) < 0x7fffffff);
100
101 irq_exit();
102 return;
103
104null:
105 ack_r4ktimer(0);
106 irq_exit();
107}
108
109#ifdef CONFIG_PM 69#ifdef CONFIG_PM
110irqreturn_t counter0_irq(int irq, void *dev_id) 70irqreturn_t counter0_irq(int irq, void *dev_id)
111{ 71{
@@ -240,7 +200,7 @@ unsigned long cal_r4koff(void)
240 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); 200 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
241 201
242 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); 202 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
243 au_writel (0, SYS_TOYWRITE); 203 au_writel(0, SYS_TOYWRITE);
244 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); 204 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
245 205
246 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * 206 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
@@ -329,7 +289,3 @@ void __init plat_timer_setup(struct irqaction *irq)
329 289
330#endif 290#endif
331} 291}
332
333void __init au1xxx_time_init(void)
334{
335}
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index 8b08edb977be..99eafeada518 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -46,7 +46,7 @@
46 46
47static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; 47static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
48 48
49void board_reset (void) 49void board_reset(void)
50{ 50{
51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
52 bcsr->swreset = 0x0000; 52 bcsr->swreset = 0x0000;
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index 0a3f025eb023..4d7bcfc8cf73 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -59,14 +59,12 @@ void __init prom_init(void)
59 prom_argv = (char **) fw_arg1; 59 prom_argv = (char **) fw_arg1;
60 prom_envp = (char **) fw_arg2; 60 prom_envp = (char **) fw_arg2;
61 61
62 mips_machgroup = MACH_GROUP_ALCHEMY;
63
64 /* Set the platform # */ 62 /* Set the platform # */
65#if defined (CONFIG_MIPS_DB1550) 63#if defined(CONFIG_MIPS_DB1550)
66 mips_machtype = MACH_DB1550; 64 mips_machtype = MACH_DB1550;
67#elif defined (CONFIG_MIPS_DB1500) 65#elif defined(CONFIG_MIPS_DB1500)
68 mips_machtype = MACH_DB1500; 66 mips_machtype = MACH_DB1500;
69#elif defined (CONFIG_MIPS_DB1100) 67#elif defined(CONFIG_MIPS_DB1100)
70 mips_machtype = MACH_DB1100; 68 mips_machtype = MACH_DB1100;
71#else 69#else
72 mips_machtype = MACH_DB1000; 70 mips_machtype = MACH_DB1000;
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 2c460c116570..abfc4bcddf7a 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -46,7 +46,7 @@
46extern int (*board_pci_idsel)(unsigned int devsel, int assert); 46extern int (*board_pci_idsel)(unsigned int devsel, int assert);
47int mtx1_pci_idsel(unsigned int devsel, int assert); 47int mtx1_pci_idsel(unsigned int devsel, int assert);
48 48
49void board_reset (void) 49void board_reset(void)
50{ 50{
51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
52 au_writel(0x00000000, 0xAE00001C); 52 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/au1000/mtx-1/init.c
index 88f2b6d97281..2aa7b2ed6a8c 100644
--- a/arch/mips/au1000/mtx-1/init.c
+++ b/arch/mips/au1000/mtx-1/init.c
@@ -56,7 +56,6 @@ void __init prom_init(void)
56 prom_argv = (char **) fw_arg1; 56 prom_argv = (char **) fw_arg1;
57 prom_envp = (char **) fw_arg2; 57 prom_envp = (char **) fw_arg2;
58 58
59 mips_machgroup = MACH_GROUP_ALCHEMY;
60 mips_machtype = MACH_MTX1; /* set the platform # */ 59 mips_machtype = MACH_MTX1; /* set the platform # */
61 60
62 prom_init_cmdline(); 61 prom_init_cmdline();
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 0aed89114bfc..5198c4f98b43 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1000.h> 40#include <asm/mach-pb1x00/pb1000.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44} 44}
45 45
diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c
index e9fa1bab81f3..4535f7208e18 100644
--- a/arch/mips/au1000/pb1000/init.c
+++ b/arch/mips/au1000/pb1000/init.c
@@ -54,7 +54,6 @@ void __init prom_init(void)
54 prom_argv = (char **) fw_arg1; 54 prom_argv = (char **) fw_arg1;
55 prom_envp = (char **) fw_arg2; 55 prom_envp = (char **) fw_arg2;
56 56
57 mips_machgroup = MACH_GROUP_ALCHEMY;
58 mips_machtype = MACH_PB1000; 57 mips_machtype = MACH_PB1000;
59 58
60 prom_init_cmdline(); 59 prom_init_cmdline();
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 259ca05860c3..42874a6b31d1 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1100.h> 40#include <asm/mach-pb1x00/pb1100.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/au1000/pb1100/init.c
index 6131b56f41b5..7ba6852de7cd 100644
--- a/arch/mips/au1000/pb1100/init.c
+++ b/arch/mips/au1000/pb1100/init.c
@@ -55,7 +55,6 @@ void __init prom_init(void)
55 prom_argv = (char **) fw_arg1; 55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg3; 56 prom_envp = (char **) fw_arg3;
57 57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1100; 58 mips_machtype = MACH_PB1100;
60 59
61 prom_init_cmdline(); 60 prom_init_cmdline();
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index eea2092bde8d..2122515f79d7 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -57,7 +57,7 @@
57extern void _board_init_irq(void); 57extern void _board_init_irq(void);
58extern void (*board_init_irq)(void); 58extern void (*board_init_irq)(void);
59 59
60void board_reset (void) 60void board_reset(void)
61{ 61{
62 bcsr->resets = 0; 62 bcsr->resets = 0;
63 bcsr->system = 0; 63 bcsr->system = 0;
@@ -148,7 +148,7 @@ void __init board_setup(void)
148} 148}
149 149
150int 150int
151board_au1200fb_panel (void) 151board_au1200fb_panel(void)
152{ 152{
153 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 153 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
154 int p; 154 int p;
@@ -160,7 +160,7 @@ board_au1200fb_panel (void)
160} 160}
161 161
162int 162int
163board_au1200fb_panel_init (void) 163board_au1200fb_panel_init(void)
164{ 164{
165 /* Apply power */ 165 /* Apply power */
166 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 166 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
@@ -170,7 +170,7 @@ board_au1200fb_panel_init (void)
170} 170}
171 171
172int 172int
173board_au1200fb_panel_shutdown (void) 173board_au1200fb_panel_shutdown(void)
174{ 174{
175 /* Remove power */ 175 /* Remove power */
176 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 176 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c
index 27f09e374e15..5a70029d5388 100644
--- a/arch/mips/au1000/pb1200/init.c
+++ b/arch/mips/au1000/pb1200/init.c
@@ -55,7 +55,6 @@ void __init prom_init(void)
55 prom_argv = (char **) fw_arg1; 55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg2; 56 prom_envp = (char **) fw_arg2;
57 57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1200; 58 mips_machtype = MACH_PB1200;
60 59
61 prom_init_cmdline(); 60 prom_init_cmdline();
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index b73b2d18bf56..7c708db04a88 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -132,7 +132,7 @@ static void pb1200_shutdown_irq( unsigned int irq_nr )
132 pb1200_disable_irq(irq_nr); 132 pb1200_disable_irq(irq_nr);
133 if (--pb1200_cascade_en == 0) 133 if (--pb1200_cascade_en == 0)
134 { 134 {
135 free_irq(AU1000_GPIO_7,&pb1200_cascade_handler ); 135 free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
136 } 136 }
137 return; 137 return;
138} 138}
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index a2d850db8902..5446836869d6 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/mach-au1x00/au1000.h> 39#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-pb1x00/pb1500.h> 40#include <asm/mach-pb1x00/pb1500.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/au1000/pb1500/init.c
index 733d2e469db2..e58a9d6c5021 100644
--- a/arch/mips/au1000/pb1500/init.c
+++ b/arch/mips/au1000/pb1500/init.c
@@ -55,7 +55,6 @@ void __init prom_init(void)
55 prom_argv = (char **) fw_arg1; 55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg2; 56 prom_envp = (char **) fw_arg2;
57 57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1500; 58 mips_machtype = MACH_PB1500;
60 59
61 prom_init_cmdline(); 60 prom_init_cmdline();
diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c
index 05fd27dc24e6..e3cfb0d73180 100644
--- a/arch/mips/au1000/pb1550/board_setup.c
+++ b/arch/mips/au1000/pb1550/board_setup.c
@@ -44,7 +44,7 @@
44#include <asm/mach-au1x00/au1000.h> 44#include <asm/mach-au1x00/au1000.h>
45#include <asm/mach-pb1x00/pb1550.h> 45#include <asm/mach-pb1x00/pb1550.h>
46 46
47void board_reset (void) 47void board_reset(void)
48{ 48{
49 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 49 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
50 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C); 50 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
diff --git a/arch/mips/au1000/pb1550/init.c b/arch/mips/au1000/pb1550/init.c
index 41daa3371be3..fad53bf5aad1 100644
--- a/arch/mips/au1000/pb1550/init.c
+++ b/arch/mips/au1000/pb1550/init.c
@@ -55,7 +55,6 @@ void __init prom_init(void)
55 prom_argv = (char **) fw_arg1; 55 prom_argv = (char **) fw_arg1;
56 prom_envp = (char **) fw_arg2; 56 prom_envp = (char **) fw_arg2;
57 57
58 mips_machgroup = MACH_GROUP_ALCHEMY;
59 mips_machtype = MACH_PB1550; 58 mips_machtype = MACH_PB1550;
60 59
61 prom_init_cmdline(); 60 prom_init_cmdline();
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index ae3d6b19e94d..a9237f41933d 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -39,7 +39,7 @@
39#include <asm/pgtable.h> 39#include <asm/pgtable.h>
40#include <asm/au1000.h> 40#include <asm/au1000.h>
41 41
42void board_reset (void) 42void board_reset(void)
43{ 43{
44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 44 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
45 au_writel(0x00000000, 0xAE00001C); 45 au_writel(0x00000000, 0xAE00001C);
diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/au1000/xxs1500/init.c
index f1c76533b6fc..9f839c36f69e 100644
--- a/arch/mips/au1000/xxs1500/init.c
+++ b/arch/mips/au1000/xxs1500/init.c
@@ -54,7 +54,6 @@ void __init prom_init(void)
54 prom_argv = (char **) fw_arg1; 54 prom_argv = (char **) fw_arg1;
55 prom_envp = (char **) fw_arg2; 55 prom_envp = (char **) fw_arg2;
56 56
57 mips_machgroup = MACH_GROUP_ALCHEMY;
58 mips_machtype = MACH_XXS1500; /* set the platform # */ 57 mips_machtype = MACH_XXS1500; /* set the platform # */
59 58
60 prom_init_cmdline(); 59 prom_init_cmdline();
diff --git a/arch/mips/basler/excite/excite_prom.c b/arch/mips/basler/excite/excite_prom.c
index 6ecd512b999d..2d752c2f6e59 100644
--- a/arch/mips/basler/excite/excite_prom.c
+++ b/arch/mips/basler/excite/excite_prom.c
@@ -136,7 +136,6 @@ void __init prom_init(void)
136# error 64 bit support not implemented 136# error 64 bit support not implemented
137#endif /* CONFIG_64BIT */ 137#endif /* CONFIG_64BIT */
138 138
139 mips_machgroup = MACH_GROUP_TITAN;
140 mips_machtype = MACH_TITAN_EXCITE; 139 mips_machtype = MACH_TITAN_EXCITE;
141} 140}
142 141
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 56003188f17c..404ca9284b30 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -68,7 +68,7 @@ DEFINE_SPINLOCK(titan_lock);
68int titan_irqflags; 68int titan_irqflags;
69 69
70 70
71static void excite_timer_init(void) 71void __init plat_time_init(void)
72{ 72{
73 const u32 modebit5 = ocd_readl(0x00e4); 73 const u32 modebit5 = ocd_readl(0x00e4);
74 unsigned int 74 unsigned int
@@ -216,7 +216,7 @@ static int __init excite_platform_init(void)
216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */ 216 titan_writel(0x80021dff, GXCFG); /* XDMA reset */
217 titan_writel(0x00000000, CPXCISRA); 217 titan_writel(0x00000000, CPXCISRA);
218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */ 218 titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */
219#if defined (CONFIG_HIGHMEM) 219#if defined(CONFIG_HIGHMEM)
220# error change for HIGHMEM support! 220# error change for HIGHMEM support!
221#else 221#else
222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */ 222 titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */
@@ -261,16 +261,13 @@ void __init plat_mem_setup(void)
261 /* Announce RAM to system */ 261 /* Announce RAM to system */
262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); 262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
263 263
264 /* Set up timer initialization hooks */
265 board_time_init = excite_timer_init;
266
267 /* Set up the peripheral address map */ 264 /* Set up the peripheral address map */
268 *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0; 265 *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0;
269 *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0; 266 *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0;
270 *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0; 267 *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0;
271 *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0; 268 *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0;
272 wmb(); 269 wmb();
273 *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4; 270 *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4;
274 wmb(); 271 wmb();
275 272
276 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5); 273 ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
new file mode 100644
index 000000000000..35294b12d638
--- /dev/null
+++ b/arch/mips/bcm47xx/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the BCM47XX specific kernel interface routines
3# under Linux.
4#
5
6obj-y := gpio.o irq.o prom.o serial.o setup.o time.o wgt634u.o
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
new file mode 100644
index 000000000000..f5a53acf995a
--- /dev/null
+++ b/arch/mips/bcm47xx/gpio.c
@@ -0,0 +1,79 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#include <linux/ssb/ssb.h>
10#include <linux/ssb/ssb_driver_chipcommon.h>
11#include <linux/ssb/ssb_driver_extif.h>
12#include <asm/mach-bcm47xx/bcm47xx.h>
13#include <asm/mach-bcm47xx/gpio.h>
14
15int bcm47xx_gpio_to_irq(unsigned gpio)
16{
17 if (ssb_bcm47xx.chipco.dev)
18 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
19 else if (ssb_bcm47xx.extif.dev)
20 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
21 else
22 return -EINVAL;
23}
24EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
25
26int bcm47xx_gpio_get_value(unsigned gpio)
27{
28 if (ssb_bcm47xx.chipco.dev)
29 return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
30 else if (ssb_bcm47xx.extif.dev)
31 return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
32 else
33 return 0;
34}
35EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
36
37void bcm47xx_gpio_set_value(unsigned gpio, int value)
38{
39 if (ssb_bcm47xx.chipco.dev)
40 ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
41 1 << gpio,
42 value ? 1 << gpio : 0);
43 else if (ssb_bcm47xx.extif.dev)
44 ssb_extif_gpio_out(&ssb_bcm47xx.extif,
45 1 << gpio,
46 value ? 1 << gpio : 0);
47}
48EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
49
50int bcm47xx_gpio_direction_input(unsigned gpio)
51{
52 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
53 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
54 1 << gpio, 0);
55 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
56 ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
57 1 << gpio, 0);
58 else
59 return -EINVAL;
60 return 0;
61}
62EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input);
63
64int bcm47xx_gpio_direction_output(unsigned gpio, int value)
65{
66 bcm47xx_gpio_set_value(gpio, value);
67
68 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
69 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
70 1 << gpio, 1 << gpio);
71 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
72 ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
73 1 << gpio, 1 << gpio);
74 else
75 return -EINVAL;
76 return 0;
77}
78EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output);
79
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
new file mode 100644
index 000000000000..325757acd020
--- /dev/null
+++ b/arch/mips/bcm47xx/irq.c
@@ -0,0 +1,55 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#include <linux/types.h>
26#include <linux/interrupt.h>
27#include <linux/irq.h>
28#include <asm/irq_cpu.h>
29
30void plat_irq_dispatch(void)
31{
32 u32 cause;
33
34 cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
35
36 clear_c0_status(cause);
37
38 if (cause & CAUSEF_IP7)
39 do_IRQ(7);
40 if (cause & CAUSEF_IP2)
41 do_IRQ(2);
42 if (cause & CAUSEF_IP3)
43 do_IRQ(3);
44 if (cause & CAUSEF_IP4)
45 do_IRQ(4);
46 if (cause & CAUSEF_IP5)
47 do_IRQ(5);
48 if (cause & CAUSEF_IP6)
49 do_IRQ(6);
50}
51
52void __init arch_init_irq(void)
53{
54 mips_cpu_irq_init();
55}
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
new file mode 100644
index 000000000000..079e33d52783
--- /dev/null
+++ b/arch/mips/bcm47xx/prom.c
@@ -0,0 +1,158 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/kernel.h>
29#include <linux/spinlock.h>
30#include <asm/bootinfo.h>
31#include <asm/fw/cfe/cfe_api.h>
32#include <asm/fw/cfe/cfe_error.h>
33
34static int cfe_cons_handle;
35
36const char *get_system_type(void)
37{
38 return "Broadcom BCM47XX";
39}
40
41void prom_putchar(char c)
42{
43 while (cfe_write(cfe_cons_handle, &c, 1) == 0)
44 ;
45}
46
47static __init void prom_init_cfe(void)
48{
49 uint32_t cfe_ept;
50 uint32_t cfe_handle;
51 uint32_t cfe_eptseal;
52 int argc = fw_arg0;
53 char **envp = (char **) fw_arg2;
54 int *prom_vec = (int *) fw_arg3;
55
56 /*
57 * Check if a loader was used; if NOT, the 4 arguments are
58 * what CFE gives us (handle, 0, EPT and EPTSEAL)
59 */
60 if (argc < 0) {
61 cfe_handle = (uint32_t)argc;
62 cfe_ept = (uint32_t)envp;
63 cfe_eptseal = (uint32_t)prom_vec;
64 } else {
65 if ((int)prom_vec < 0) {
66 /*
67 * Old loader; all it gives us is the handle,
68 * so use the "known" entrypoint and assume
69 * the seal.
70 */
71 cfe_handle = (uint32_t)prom_vec;
72 cfe_ept = 0xBFC00500;
73 cfe_eptseal = CFE_EPTSEAL;
74 } else {
75 /*
76 * Newer loaders bundle the handle/ept/eptseal
77 * Note: prom_vec is in the loader's useg
78 * which is still alive in the TLB.
79 */
80 cfe_handle = prom_vec[0];
81 cfe_ept = prom_vec[2];
82 cfe_eptseal = prom_vec[3];
83 }
84 }
85
86 if (cfe_eptseal != CFE_EPTSEAL) {
87 /* too early for panic to do any good */
88 printk(KERN_ERR "CFE's entrypoint seal doesn't match.");
89 while (1) ;
90 }
91
92 cfe_init(cfe_handle, cfe_ept);
93}
94
95static __init void prom_init_console(void)
96{
97 /* Initialize CFE console */
98 cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
99}
100
101static __init void prom_init_cmdline(void)
102{
103 char buf[CL_SIZE];
104
105 /* Get the kernel command line from CFE */
106 if (cfe_getenv("LINUX_CMDLINE", buf, CL_SIZE) >= 0) {
107 buf[CL_SIZE-1] = 0;
108 strcpy(arcs_cmdline, buf);
109 }
110
111 /* Force a console handover by adding a console= argument if needed,
112 * as CFE is not available anymore later in the boot process. */
113 if ((strstr(arcs_cmdline, "console=")) == NULL) {
114 /* Try to read the default serial port used by CFE */
115 if ((cfe_getenv("BOOT_CONSOLE", buf, CL_SIZE) < 0)
116 || (strncmp("uart", buf, 4)))
117 /* Default to uart0 */
118 strcpy(buf, "uart0");
119
120 /* Compute the new command line */
121 snprintf(arcs_cmdline, CL_SIZE, "%s console=ttyS%c,115200",
122 arcs_cmdline, buf[4]);
123 }
124}
125
126static __init void prom_init_mem(void)
127{
128 unsigned long mem;
129
130 /* Figure out memory size by finding aliases.
131 *
132 * We should theoretically use the mapping from CFE using cfe_enummem().
133 * However as the BCM47XX is mostly used on low-memory systems, we
134 * want to reuse the memory used by CFE (around 4MB). That means cfe_*
135 * functions stop to work at some point during the boot, we should only
136 * call them at the beginning of the boot.
137 */
138 for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
139 if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
140 *(unsigned long *)(prom_init))
141 break;
142 }
143
144 add_memory_region(0, mem, BOOT_MEM_RAM);
145}
146
147void __init prom_init(void)
148{
149 prom_init_cfe();
150 prom_init_console();
151 prom_init_cmdline();
152 prom_init_mem();
153}
154
155void __init prom_free_prom_memory(void)
156{
157}
158
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
new file mode 100644
index 000000000000..59c11afdb2ab
--- /dev/null
+++ b/arch/mips/bcm47xx/serial.c
@@ -0,0 +1,52 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/serial.h>
12#include <linux/serial_8250.h>
13#include <linux/ssb/ssb.h>
14#include <bcm47xx.h>
15
16static struct plat_serial8250_port uart8250_data[5];
17
18static struct platform_device uart8250_device = {
19 .name = "serial8250",
20 .id = PLAT8250_DEV_PLATFORM,
21 .dev = {
22 .platform_data = uart8250_data,
23 },
24};
25
26static int __init uart8250_init(void)
27{
28 int i;
29 struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
30
31 memset(&uart8250_data, 0, sizeof(uart8250_data));
32
33 for (i = 0; i < mcore->nr_serial_ports; i++) {
34 struct plat_serial8250_port *p = &(uart8250_data[i]);
35 struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
36
37 p->mapbase = (unsigned int) ssb_port->regs;
38 p->membase = (void *) ssb_port->regs;
39 p->irq = ssb_port->irq + 2;
40 p->uartclk = ssb_port->baud_base;
41 p->regshift = ssb_port->reg_shift;
42 p->iotype = UPIO_MEM;
43 p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
44 }
45 return platform_device_register(&uart8250_device);
46}
47
48module_init(uart8250_init);
49
50MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
51MODULE_LICENSE("GPL");
52MODULE_DESCRIPTION("8250 UART probe driver for the BCM47XX platforms");
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
new file mode 100644
index 000000000000..1b6b0fa5028f
--- /dev/null
+++ b/arch/mips/bcm47xx/setup.c
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5 * Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/types.h>
29#include <linux/ssb/ssb.h>
30#include <asm/bootinfo.h>
31#include <asm/reboot.h>
32#include <asm/time.h>
33#include <bcm47xx.h>
34#include <asm/fw/cfe/cfe_api.h>
35
36struct ssb_bus ssb_bcm47xx;
37EXPORT_SYMBOL(ssb_bcm47xx);
38
39static void bcm47xx_machine_restart(char *command)
40{
41 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
42 local_irq_disable();
43 /* Set the watchdog timer to reset immediately */
44 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
45 while (1)
46 cpu_relax();
47}
48
49static void bcm47xx_machine_halt(void)
50{
51 /* Disable interrupts and watchdog and spin forever */
52 local_irq_disable();
53 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
54 while (1)
55 cpu_relax();
56}
57
58static void str2eaddr(char *str, char *dest)
59{
60 int i = 0;
61
62 if (str == NULL) {
63 memset(dest, 0, 6);
64 return;
65 }
66
67 for (;;) {
68 dest[i++] = (char) simple_strtoul(str, NULL, 16);
69 str += 2;
70 if (!*str++ || i == 6)
71 break;
72 }
73}
74
75static int bcm47xx_get_invariants(struct ssb_bus *bus,
76 struct ssb_init_invariants *iv)
77{
78 char buf[100];
79
80 /* Fill boardinfo structure */
81 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
82
83 if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0)
84 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
85 if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0)
86 iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
87 if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0)
88 iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
89
90 /* Fill sprom structure */
91 memset(&(iv->sprom), 0, sizeof(struct ssb_sprom));
92 iv->sprom.revision = 3;
93
94 if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
95 str2eaddr(buf, iv->sprom.r1.et0mac);
96 if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
97 str2eaddr(buf, iv->sprom.r1.et1mac);
98 if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0)
99 iv->sprom.r1.et0phyaddr = simple_strtoul(buf, NULL, 10);
100 if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0)
101 iv->sprom.r1.et1phyaddr = simple_strtoul(buf, NULL, 10);
102 if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0)
103 iv->sprom.r1.et0mdcport = simple_strtoul(buf, NULL, 10);
104 if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0)
105 iv->sprom.r1.et1mdcport = simple_strtoul(buf, NULL, 10);
106
107 return 0;
108}
109
110void __init plat_mem_setup(void)
111{
112 int err;
113
114 err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
115 bcm47xx_get_invariants);
116 if (err)
117 panic("Failed to initialize SSB bus (err %d)\n", err);
118
119 _machine_restart = bcm47xx_machine_restart;
120 _machine_halt = bcm47xx_machine_halt;
121 pm_power_off = bcm47xx_machine_halt;
122}
123
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
new file mode 100644
index 000000000000..0ab4676c8bd3
--- /dev/null
+++ b/arch/mips/bcm47xx/time.c
@@ -0,0 +1,55 @@
1/*
2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25
26#include <linux/init.h>
27#include <linux/ssb/ssb.h>
28#include <asm/time.h>
29#include <bcm47xx.h>
30
31void __init plat_time_init(void)
32{
33 unsigned long hz;
34
35 /*
36 * Use deterministic values for initial counter interrupt
37 * so that calibrate delay avoids encountering a counter wrap.
38 */
39 write_c0_count(0);
40 write_c0_compare(0xffff);
41
42 hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
43 if (!hz)
44 hz = 100000000;
45
46 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
47 mips_hpt_frequency = hz;
48}
49
50void __init
51plat_timer_setup(struct irqaction *irq)
52{
53 /* Enable the timer interrupt */
54 setup_irq(7, irq);
55}
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
new file mode 100644
index 000000000000..5a017eaee712
--- /dev/null
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -0,0 +1,64 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#include <linux/platform_device.h>
10#include <linux/module.h>
11#include <linux/leds.h>
12#include <linux/ssb/ssb.h>
13#include <asm/mach-bcm47xx/bcm47xx.h>
14
15/* GPIO definitions for the WGT634U */
16#define WGT634U_GPIO_LED 3
17#define WGT634U_GPIO_RESET 2
18#define WGT634U_GPIO_TP1 7
19#define WGT634U_GPIO_TP2 6
20#define WGT634U_GPIO_TP3 5
21#define WGT634U_GPIO_TP4 4
22#define WGT634U_GPIO_TP5 1
23
24static struct gpio_led wgt634u_leds[] = {
25 {
26 .name = "power",
27 .gpio = WGT634U_GPIO_LED,
28 .active_low = 1,
29 .default_trigger = "heartbeat",
30 },
31};
32
33static struct gpio_led_platform_data wgt634u_led_data = {
34 .num_leds = ARRAY_SIZE(wgt634u_leds),
35 .leds = wgt634u_leds,
36};
37
38static struct platform_device wgt634u_gpio_leds = {
39 .name = "leds-gpio",
40 .id = -1,
41 .dev = {
42 .platform_data = &wgt634u_led_data,
43 }
44};
45
46static int __init wgt634u_init(void)
47{
48 /* There is no easy way to detect that we are running on a WGT634U
49 * machine. Use the MAC address as an heuristic. Netgear Inc. has
50 * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
51 */
52
53 u8 *et0mac = ssb_bcm47xx.sprom.r1.et0mac;
54
55 if (et0mac[0] == 0x00 &&
56 ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
57 (et0mac[1] == 0x0f && et0mac[2] == 0xb5)))
58 return platform_device_register(&wgt634u_gpio_leds);
59 else
60 return -ENODEV;
61}
62
63module_init(wgt634u_init);
64
diff --git a/arch/mips/boot/addinitrd.c b/arch/mips/boot/addinitrd.c
index 8b3033304770..b5b3febc10cc 100644
--- a/arch/mips/boot/addinitrd.c
+++ b/arch/mips/boot/addinitrd.c
@@ -32,15 +32,15 @@
32 32
33#define SWAB(a) (swab ? swab32(a) : (a)) 33#define SWAB(a) (swab ? swab32(a) : (a))
34 34
35void die (char *s) 35void die(char *s)
36{ 36{
37 perror (s); 37 perror(s);
38 exit (1); 38 exit(1);
39} 39}
40 40
41int main (int argc, char *argv[]) 41int main(int argc, char *argv[])
42{ 42{
43 int fd_vmlinux,fd_initrd,fd_outfile; 43 int fd_vmlinux, fd_initrd, fd_outfile;
44 FILHDR efile; 44 FILHDR efile;
45 AOUTHDR eaout; 45 AOUTHDR eaout;
46 SCNHDR esecs[3]; 46 SCNHDR esecs[3];
@@ -48,22 +48,22 @@ int main (int argc, char *argv[])
48 char buf[1024]; 48 char buf[1024];
49 unsigned long loadaddr; 49 unsigned long loadaddr;
50 unsigned long initrd_header[2]; 50 unsigned long initrd_header[2];
51 int i,cnt; 51 int i, cnt;
52 int swab = 0; 52 int swab = 0;
53 53
54 if (argc != 4) { 54 if (argc != 4) {
55 printf ("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]); 55 printf("Usage: %s <vmlinux> <initrd> <outfile>\n", argv[0]);
56 exit (1); 56 exit(1);
57 } 57 }
58 58
59 if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0) 59 if ((fd_vmlinux = open (argv[1], O_RDONLY)) < 0)
60 die ("open vmlinux"); 60 die("open vmlinux");
61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile) 61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
62 die ("read file header"); 62 die("read file header");
63 if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout) 63 if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout)
64 die ("read aout header"); 64 die("read aout header");
65 if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs) 65 if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs)
66 die ("read section headers"); 66 die("read section headers");
67 /* 67 /*
68 * check whether the file is good for us 68 * check whether the file is good for us
69 */ 69 */
@@ -82,13 +82,13 @@ int main (int argc, char *argv[])
82 82
83 /* make sure we have an empty data segment for the initrd */ 83 /* make sure we have an empty data segment for the initrd */
84 if (eaout.dsize || esecs[1].s_size) { 84 if (eaout.dsize || esecs[1].s_size) {
85 fprintf (stderr, "Data segment not empty. Giving up!\n"); 85 fprintf(stderr, "Data segment not empty. Giving up!\n");
86 exit (1); 86 exit(1);
87 } 87 }
88 if ((fd_initrd = open (argv[2], O_RDONLY)) < 0) 88 if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
89 die ("open initrd"); 89 die("open initrd");
90 if (fstat (fd_initrd, &st) < 0) 90 if (fstat (fd_initrd, &st) < 0)
91 die ("fstat initrd"); 91 die("fstat initrd");
92 loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size) 92 loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)
93 + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8; 93 + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8;
94 if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size))) 94 if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size)))
@@ -98,34 +98,34 @@ int main (int argc, char *argv[])
98 eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8); 98 eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8);
99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr); 99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
100 100
101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0) 101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC, 0666)) < 0)
102 die ("open outfile"); 102 die("open outfile");
103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile) 103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
104 die ("write file header"); 104 die("write file header");
105 if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout) 105 if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout)
106 die ("write aout header"); 106 die("write aout header");
107 if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs) 107 if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs)
108 die ("write section headers"); 108 die("write section headers");
109 /* skip padding */ 109 /* skip padding */
110 if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) 110 if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
111 die ("lseek vmlinux"); 111 die("lseek vmlinux");
112 if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) 112 if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1)
113 die ("lseek outfile"); 113 die("lseek outfile");
114 /* copy text segment */ 114 /* copy text segment */
115 cnt = SWAB(eaout.tsize); 115 cnt = SWAB(eaout.tsize);
116 while (cnt) { 116 while (cnt) {
117 if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0) 117 if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0)
118 die ("read vmlinux"); 118 die("read vmlinux");
119 if (write (fd_outfile, buf, i) != i) 119 if (write (fd_outfile, buf, i) != i)
120 die ("write vmlinux"); 120 die("write vmlinux");
121 cnt -= i; 121 cnt -= i;
122 } 122 }
123 if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header) 123 if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header)
124 die ("write initrd header"); 124 die("write initrd header");
125 while ((i = read (fd_initrd, buf, sizeof buf)) > 0) 125 while ((i = read (fd_initrd, buf, sizeof buf)) > 0)
126 if (write (fd_outfile, buf, i) != i) 126 if (write (fd_outfile, buf, i) != i)
127 die ("write initrd"); 127 die("write initrd");
128 close (fd_vmlinux); 128 close(fd_vmlinux);
129 close (fd_initrd); 129 close(fd_initrd);
130 return 0; 130 return 0;
131} 131}
diff --git a/arch/mips/boot/elf2ecoff.c b/arch/mips/boot/elf2ecoff.c
index c3543d9eb266..c5a7f308c405 100644
--- a/arch/mips/boot/elf2ecoff.c
+++ b/arch/mips/boot/elf2ecoff.c
@@ -467,7 +467,7 @@ int main(int argc, char *argv[])
467 esecs[0].s_scnptr = N_TXTOFF(efh, eah); 467 esecs[0].s_scnptr = N_TXTOFF(efh, eah);
468 esecs[1].s_scnptr = N_DATOFF(efh, eah); 468 esecs[1].s_scnptr = N_DATOFF(efh, eah);
469#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10 469#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10
470#define ECOFF_ROUND(s,a) (((s)+(a)-1)&~((a)-1)) 470#define ECOFF_ROUND(s, a) (((s)+(a)-1)&~((a)-1))
471 esecs[2].s_scnptr = esecs[1].s_scnptr + 471 esecs[2].s_scnptr = esecs[1].s_scnptr +
472 ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah)); 472 ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah));
473 if (addflag) { 473 if (addflag) {
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index a043f93f7d08..6b83f4ddc8fc 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Cobalt micro systems family specific parts of the kernel 2# Makefile for the Cobalt micro systems family specific parts of the kernel
3# 3#
4 4
5obj-y := buttons.o irq.o reset.o rtc.o serial.o setup.o 5obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8obj-$(CONFIG_EARLY_PRINTK) += console.o 8obj-$(CONFIG_EARLY_PRINTK) += console.o
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index 0485d51f7216..db330e811025 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -1,16 +1,15 @@
1/* 1/*
2 * (C) P. Horton 2006 2 * (C) P. Horton 2006
3 */ 3 */
4#include <linux/io.h>
4#include <linux/serial_reg.h> 5#include <linux/serial_reg.h>
5 6
6#include <asm/addrspace.h> 7#define UART_BASE ((void __iomem *)CKSEG1ADDR(0x1c800000))
7
8#include <cobalt.h>
9 8
10void prom_putchar(char c) 9void prom_putchar(char c)
11{ 10{
12 while(!(COBALT_UART[UART_LSR] & UART_LSR_THRE)) 11 while (!(readb(UART_BASE + UART_LSR) & UART_LSR_THRE))
13 ; 12 ;
14 13
15 COBALT_UART[UART_TX] = c; 14 writeb(c, UART_BASE + UART_TX);
16} 15}
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 950ad1e8be44..ac4fb912649d 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -15,102 +15,48 @@
15 15
16#include <asm/i8259.h> 16#include <asm/i8259.h>
17#include <asm/irq_cpu.h> 17#include <asm/irq_cpu.h>
18#include <asm/irq_gt641xx.h>
18#include <asm/gt64120.h> 19#include <asm/gt64120.h>
19 20
20#include <cobalt.h> 21#include <irq.h>
21
22/*
23 * We have two types of interrupts that we handle, ones that come in through
24 * the CPU interrupt lines, and ones that come in on the via chip. The CPU
25 * mappings are:
26 *
27 * 16 - Software interrupt 0 (unused) IE_SW0
28 * 17 - Software interrupt 1 (unused) IE_SW1
29 * 18 - Galileo chip (timer) IE_IRQ0
30 * 19 - Tulip 0 + NCR SCSI IE_IRQ1
31 * 20 - Tulip 1 IE_IRQ2
32 * 21 - 16550 UART IE_IRQ3
33 * 22 - VIA southbridge PIC IE_IRQ4
34 * 23 - unused IE_IRQ5
35 *
36 * The VIA chip is a master/slave 8259 setup and has the following interrupts:
37 *
38 * 8 - RTC
39 * 9 - PCI
40 * 14 - IDE0
41 * 15 - IDE1
42 */
43
44static inline void galileo_irq(void)
45{
46 unsigned int mask, pending, devfn;
47
48 mask = GT_READ(GT_INTRMASK_OFS);
49 pending = GT_READ(GT_INTRCAUSE_OFS) & mask;
50
51 if (pending & GT_INTR_T0EXP_MSK) {
52 GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_T0EXP_MSK);
53 do_IRQ(COBALT_GALILEO_IRQ);
54 } else if (pending & GT_INTR_RETRYCTR0_MSK) {
55 devfn = GT_READ(GT_PCI0_CFGADDR_OFS) >> 8;
56 GT_WRITE(GT_INTRCAUSE_OFS, ~GT_INTR_RETRYCTR0_MSK);
57 printk(KERN_WARNING
58 "Galileo: PCI retry count exceeded (%02x.%u)\n",
59 PCI_SLOT(devfn), PCI_FUNC(devfn));
60 } else {
61 GT_WRITE(GT_INTRMASK_OFS, mask & ~pending);
62 printk(KERN_WARNING
63 "Galileo: masking unexpected interrupt %08x\n", pending);
64 }
65}
66
67static inline void via_pic_irq(void)
68{
69 int irq;
70
71 irq = i8259_irq();
72 if (irq >= 0)
73 do_IRQ(irq);
74}
75 22
76asmlinkage void plat_irq_dispatch(void) 23asmlinkage void plat_irq_dispatch(void)
77{ 24{
78 unsigned pending = read_c0_status() & read_c0_cause(); 25 unsigned pending = read_c0_status() & read_c0_cause() & ST0_IM;
26 int irq;
79 27
80 if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */ 28 if (pending & CAUSEF_IP2)
81 galileo_irq(); 29 gt641xx_irq_dispatch();
82 else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */ 30 else if (pending & CAUSEF_IP6) {
83 via_pic_irq(); 31 irq = i8259_irq();
84 else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */ 32 if (irq < 0)
85 do_IRQ(COBALT_CPU_IRQ + 3); 33 spurious_interrupt();
86 else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */ 34 else
87 do_IRQ(COBALT_CPU_IRQ + 4); 35 do_IRQ(irq);
88 else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */ 36 } else if (pending & CAUSEF_IP3)
89 do_IRQ(COBALT_CPU_IRQ + 5); 37 do_IRQ(MIPS_CPU_IRQ_BASE + 3);
90 else if (pending & CAUSEF_IP7) /* IRQ 23 */ 38 else if (pending & CAUSEF_IP4)
91 do_IRQ(COBALT_CPU_IRQ + 7); 39 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
40 else if (pending & CAUSEF_IP5)
41 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
42 else if (pending & CAUSEF_IP7)
43 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
44 else
45 spurious_interrupt();
92} 46}
93 47
94static struct irqaction irq_via = { 48static struct irqaction cascade = {
95 no_action, 0, { { 0, } }, "cascade", NULL, NULL 49 .handler = no_action,
50 .mask = CPU_MASK_NONE,
51 .name = "cascade",
96}; 52};
97 53
98void __init arch_init_irq(void) 54void __init arch_init_irq(void)
99{ 55{
100 /* 56 mips_cpu_irq_init();
101 * Mask all Galileo interrupts. The Galileo 57 gt641xx_irq_init();
102 * handler is set in cobalt_timer_setup() 58 init_i8259_irqs();
103 */
104 GT_WRITE(GT_INTRMASK_OFS, 0);
105
106 init_i8259_irqs(); /* 0 ... 15 */
107 mips_cpu_irq_init(); /* 16 ... 23 */
108
109 /*
110 * Mask all cpu interrupts
111 * (except IE4, we already masked those at VIA level)
112 */
113 change_c0_status(ST0_IM, IE_IRQ4);
114 59
115 setup_irq(COBALT_VIA_IRQ, &irq_via); 60 setup_irq(GT641XX_CASCADE_IRQ, &cascade);
61 setup_irq(I8259_CASCADE_IRQ, &cascade);
116} 62}
diff --git a/arch/mips/cobalt/led.c b/arch/mips/cobalt/led.c
new file mode 100644
index 000000000000..1c6ebd468b07
--- /dev/null
+++ b/arch/mips/cobalt/led.c
@@ -0,0 +1,62 @@
1/*
2 * Registration of Cobalt LED platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25#include <cobalt.h>
26
27static struct resource cobalt_led_resource __initdata = {
28 .start = 0x1c000000,
29 .end = 0x1c000000,
30 .flags = IORESOURCE_MEM,
31};
32
33static __init int cobalt_led_add(void)
34{
35 struct platform_device *pdev;
36 int retval;
37
38 if (cobalt_board_id == COBALT_BRD_ID_QUBE1 ||
39 cobalt_board_id == COBALT_BRD_ID_QUBE2)
40 pdev = platform_device_alloc("cobalt-qube-leds", -1);
41 else
42 pdev = platform_device_alloc("cobalt-raq-leds", -1);
43
44 if (!pdev)
45 return -ENOMEM;
46
47 retval = platform_device_add_resources(pdev, &cobalt_led_resource, 1);
48 if (retval)
49 goto err_free_device;
50
51 retval = platform_device_add(pdev);
52 if (retval)
53 goto err_free_device;
54
55 return 0;
56
57err_free_device:
58 platform_device_put(pdev);
59
60 return retval;
61}
62device_initcall(cobalt_led_add);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 43cca21fdbc0..71eb4ccc4bc1 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -8,36 +8,46 @@
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle 8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) 9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 */ 10 */
11#include <linux/init.h>
12#include <linux/io.h>
11#include <linux/jiffies.h> 13#include <linux/jiffies.h>
12 14#include <linux/leds.h>
13#include <asm/io.h>
14#include <asm/reboot.h>
15 15
16#include <cobalt.h> 16#include <cobalt.h>
17 17
18#define RESET_PORT ((void __iomem *)CKSEG1ADDR(0x1c000000))
19#define RESET 0x0f
20
21DEFINE_LED_TRIGGER(power_off_led_trigger);
22
23static int __init ledtrig_power_off_init(void)
24{
25 led_trigger_register_simple("power-off", &power_off_led_trigger);
26 return 0;
27}
28device_initcall(ledtrig_power_off_init);
29
18void cobalt_machine_halt(void) 30void cobalt_machine_halt(void)
19{ 31{
20 int state, last, diff; 32 int state, last, diff;
21 unsigned long mark; 33 unsigned long mark;
22 34
23 /* 35 /*
24 * turn off bar on Qube, flash power off LED on RaQ (0.5Hz) 36 * turn on power off LED on RaQ
25 * 37 *
26 * restart if ENTER and SELECT are pressed 38 * restart if ENTER and SELECT are pressed
27 */ 39 */
28 40
29 last = COBALT_KEY_PORT; 41 last = COBALT_KEY_PORT;
30 42
31 for (state = 0;;) { 43 led_trigger_event(power_off_led_trigger, LED_FULL);
32
33 state ^= COBALT_LED_POWER_OFF;
34 COBALT_LED_PORT = state;
35 44
45 for (state = 0;;) {
36 diff = COBALT_KEY_PORT ^ last; 46 diff = COBALT_KEY_PORT ^ last;
37 last ^= diff; 47 last ^= diff;
38 48
39 if((diff & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)) && !(~last & (COBALT_KEY_ENTER | COBALT_KEY_SELECT))) 49 if((diff & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)) && !(~last & (COBALT_KEY_ENTER | COBALT_KEY_SELECT)))
40 COBALT_LED_PORT = COBALT_LED_RESET; 50 writeb(RESET, RESET_PORT);
41 51
42 for (mark = jiffies; jiffies - mark < HZ;) 52 for (mark = jiffies; jiffies - mark < HZ;)
43 ; 53 ;
@@ -46,17 +56,8 @@ void cobalt_machine_halt(void)
46 56
47void cobalt_machine_restart(char *command) 57void cobalt_machine_restart(char *command)
48{ 58{
49 COBALT_LED_PORT = COBALT_LED_RESET; 59 writeb(RESET, RESET_PORT);
50 60
51 /* we should never get here */ 61 /* we should never get here */
52 cobalt_machine_halt(); 62 cobalt_machine_halt();
53} 63}
54
55/*
56 * This triggers the luser mode device driver for the power switch ;-)
57 */
58void cobalt_machine_power_off(void)
59{
60 printk("You can switch the machine off now.\n");
61 cobalt_machine_halt();
62}
diff --git a/arch/mips/cobalt/rtc.c b/arch/mips/cobalt/rtc.c
index 284daefc5c55..e70794b8bcba 100644
--- a/arch/mips/cobalt/rtc.c
+++ b/arch/mips/cobalt/rtc.c
@@ -20,6 +20,7 @@
20#include <linux/errno.h> 20#include <linux/errno.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/mc146818rtc.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24 25
25static struct resource cobalt_rtc_resource[] __initdata = { 26static struct resource cobalt_rtc_resource[] __initdata = {
@@ -29,8 +30,8 @@ static struct resource cobalt_rtc_resource[] __initdata = {
29 .flags = IORESOURCE_IO, 30 .flags = IORESOURCE_IO,
30 }, 31 },
31 { 32 {
32 .start = 8, 33 .start = RTC_IRQ,
33 .end = 8, 34 .end = RTC_IRQ,
34 .flags = IORESOURCE_IRQ, 35 .flags = IORESOURCE_IRQ,
35 }, 36 },
36}; 37};
diff --git a/arch/mips/cobalt/serial.c b/arch/mips/cobalt/serial.c
index 08e739704cc9..53b8d0d6da90 100644
--- a/arch/mips/cobalt/serial.c
+++ b/arch/mips/cobalt/serial.c
@@ -24,6 +24,7 @@
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25 25
26#include <cobalt.h> 26#include <cobalt.h>
27#include <irq.h>
27 28
28static struct resource cobalt_uart_resource[] __initdata = { 29static struct resource cobalt_uart_resource[] __initdata = {
29 { 30 {
@@ -32,15 +33,15 @@ static struct resource cobalt_uart_resource[] __initdata = {
32 .flags = IORESOURCE_MEM, 33 .flags = IORESOURCE_MEM,
33 }, 34 },
34 { 35 {
35 .start = COBALT_SERIAL_IRQ, 36 .start = SERIAL_IRQ,
36 .end = COBALT_SERIAL_IRQ, 37 .end = SERIAL_IRQ,
37 .flags = IORESOURCE_IRQ, 38 .flags = IORESOURCE_IRQ,
38 }, 39 },
39}; 40};
40 41
41static struct plat_serial8250_port cobalt_serial8250_port[] = { 42static struct plat_serial8250_port cobalt_serial8250_port[] = {
42 { 43 {
43 .irq = COBALT_SERIAL_IRQ, 44 .irq = SERIAL_IRQ,
44 .uartclk = 18432000, 45 .uartclk = 18432000,
45 .iotype = UPIO_MEM, 46 .iotype = UPIO_MEM,
46 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 47 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 7abe45e78425..d11bb1bc7b6b 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -15,15 +15,16 @@
15 15
16#include <asm/bootinfo.h> 16#include <asm/bootinfo.h>
17#include <asm/time.h> 17#include <asm/time.h>
18#include <asm/i8253.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/reboot.h> 20#include <asm/reboot.h>
20#include <asm/gt64120.h> 21#include <asm/gt64120.h>
21 22
22#include <cobalt.h> 23#include <cobalt.h>
24#include <irq.h>
23 25
24extern void cobalt_machine_restart(char *command); 26extern void cobalt_machine_restart(char *command);
25extern void cobalt_machine_halt(void); 27extern void cobalt_machine_halt(void);
26extern void cobalt_machine_power_off(void);
27 28
28const char *get_system_type(void) 29const char *get_system_type(void)
29{ 30{
@@ -45,14 +46,10 @@ void __init plat_timer_setup(struct irqaction *irq)
45 /* Load timer value for HZ (TCLK is 50MHz) */ 46 /* Load timer value for HZ (TCLK is 50MHz) */
46 GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ); 47 GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
47 48
48 /* Enable timer */ 49 /* Enable timer0 */
49 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); 50 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
50 51
51 /* Register interrupt */ 52 setup_irq(GT641XX_TIMER0_IRQ, irq);
52 setup_irq(COBALT_GALILEO_IRQ, irq);
53
54 /* Enable interrupt */
55 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
56} 53}
57 54
58/* 55/*
@@ -87,13 +84,18 @@ static struct resource cobalt_reserved_resources[] = {
87 }, 84 },
88}; 85};
89 86
87void __init plat_time_init(void)
88{
89 setup_pit_timer();
90}
91
90void __init plat_mem_setup(void) 92void __init plat_mem_setup(void)
91{ 93{
92 int i; 94 int i;
93 95
94 _machine_restart = cobalt_machine_restart; 96 _machine_restart = cobalt_machine_restart;
95 _machine_halt = cobalt_machine_halt; 97 _machine_halt = cobalt_machine_halt;
96 pm_power_off = cobalt_machine_power_off; 98 pm_power_off = cobalt_machine_halt;
97 99
98 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); 100 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
99 101
@@ -117,8 +119,6 @@ void __init prom_init(void)
117 unsigned long memsz; 119 unsigned long memsz;
118 char **argv; 120 char **argv;
119 121
120 mips_machgroup = MACH_GROUP_COBALT;
121
122 memsz = fw_arg0 & 0x7fff0000; 122 memsz = fw_arg0 & 0x7fff0000;
123 narg = fw_arg0 & 0x0000ffff; 123 narg = fw_arg0 & 0x0000ffff;
124 124
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 9861fe670d89..80b0c99c2cfb 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -69,7 +69,6 @@ CONFIG_SIBYTE_SB1xxx_SOC=y
69CONFIG_SIBYTE_CFE=y 69CONFIG_SIBYTE_CFE=y
70# CONFIG_SIBYTE_CFE_CONSOLE is not set 70# CONFIG_SIBYTE_CFE_CONSOLE is not set
71# CONFIG_SIBYTE_BUS_WATCHER is not set 71# CONFIG_SIBYTE_BUS_WATCHER is not set
72# CONFIG_SIBYTE_SB1250_PROF is not set
73# CONFIG_SIBYTE_TBPROF is not set 72# CONFIG_SIBYTE_TBPROF is not set
74CONFIG_RWSEM_GENERIC_SPINLOCK=y 73CONFIG_RWSEM_GENERIC_SPINLOCK=y
75# CONFIG_ARCH_HAS_ILOG2_U32 is not set 74# CONFIG_ARCH_HAS_ILOG2_U32 is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index ebcb7ad8814b..36c13039e237 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc2 3# Linux kernel version: 2.6.23-rc5
4# Tue Aug 7 22:12:54 2007 4# Thu Sep 6 13:14:29 2007
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -55,12 +55,14 @@ CONFIG_DMA_NONCOHERENT=y
55CONFIG_DMA_NEED_PCI_MAP_STATE=y 55CONFIG_DMA_NEED_PCI_MAP_STATE=y
56CONFIG_EARLY_PRINTK=y 56CONFIG_EARLY_PRINTK=y
57CONFIG_SYS_HAS_EARLY_PRINTK=y 57CONFIG_SYS_HAS_EARLY_PRINTK=y
58# CONFIG_HOTPLUG_CPU is not set
58CONFIG_I8259=y 59CONFIG_I8259=y
59# CONFIG_NO_IOPORT is not set 60# CONFIG_NO_IOPORT is not set
60# CONFIG_CPU_BIG_ENDIAN is not set 61# CONFIG_CPU_BIG_ENDIAN is not set
61CONFIG_CPU_LITTLE_ENDIAN=y 62CONFIG_CPU_LITTLE_ENDIAN=y
62CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y 63CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
63CONFIG_IRQ_CPU=y 64CONFIG_IRQ_CPU=y
65CONFIG_IRQ_GT641XX=y
64CONFIG_PCI_GT64XXX_PCI0=y 66CONFIG_PCI_GT64XXX_PCI0=y
65CONFIG_MIPS_L1_CACHE_SHIFT=5 67CONFIG_MIPS_L1_CACHE_SHIFT=5
66 68
@@ -235,6 +237,7 @@ CONFIG_TRAD_SIGNALS=y
235# Power management options 237# Power management options
236# 238#
237# CONFIG_PM is not set 239# CONFIG_PM is not set
240CONFIG_SUSPEND_UP_POSSIBLE=y
238 241
239# 242#
240# Networking 243# Networking
@@ -844,7 +847,21 @@ CONFIG_USB_MON=y
844# 847#
845# CONFIG_USB_GADGET is not set 848# CONFIG_USB_GADGET is not set
846# CONFIG_MMC is not set 849# CONFIG_MMC is not set
847# CONFIG_NEW_LEDS is not set 850CONFIG_NEW_LEDS=y
851CONFIG_LEDS_CLASS=y
852
853#
854# LED drivers
855#
856CONFIG_LEDS_COBALT_QUBE=y
857CONFIG_LEDS_COBALT_RAQ=y
858
859#
860# LED Triggers
861#
862CONFIG_LEDS_TRIGGERS=y
863# CONFIG_LEDS_TRIGGER_TIMER is not set
864# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
848# CONFIG_INFINIBAND is not set 865# CONFIG_INFINIBAND is not set
849CONFIG_RTC_LIB=y 866CONFIG_RTC_LIB=y
850CONFIG_RTC_CLASS=y 867CONFIG_RTC_CLASS=y
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
new file mode 100644
index 000000000000..2c665fcef089
--- /dev/null
+++ b/arch/mips/configs/lasat_defconfig
@@ -0,0 +1,828 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc3
4# Sat Aug 18 17:37:58 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set
16CONFIG_LASAT=y
17# CONFIG_LEMOTE_FULONG is not set
18# CONFIG_MIPS_ATLAS is not set
19# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SEAD is not set
21# CONFIG_MIPS_SIM is not set
22# CONFIG_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set
24# CONFIG_PNX8550_JBS is not set
25# CONFIG_PNX8550_STB810 is not set
26# CONFIG_PMC_MSP is not set
27# CONFIG_PMC_YOSEMITE is not set
28# CONFIG_QEMU is not set
29# CONFIG_SGI_IP22 is not set
30# CONFIG_SGI_IP27 is not set
31# CONFIG_SGI_IP32 is not set
32# CONFIG_SIBYTE_CRHINE is not set
33# CONFIG_SIBYTE_CARMEL is not set
34# CONFIG_SIBYTE_CRHONE is not set
35# CONFIG_SIBYTE_RHONE is not set
36# CONFIG_SIBYTE_SWARM is not set
37# CONFIG_SIBYTE_LITTLESUR is not set
38# CONFIG_SIBYTE_SENTOSA is not set
39# CONFIG_SIBYTE_PTSWARM is not set
40# CONFIG_SIBYTE_BIGSUR is not set
41# CONFIG_SNI_RM is not set
42# CONFIG_TOSHIBA_JMR3927 is not set
43# CONFIG_TOSHIBA_RBTX4927 is not set
44# CONFIG_TOSHIBA_RBTX4938 is not set
45# CONFIG_WR_PPMC is not set
46CONFIG_PICVUE=y
47CONFIG_PICVUE_PROC=y
48CONFIG_DS1603=y
49CONFIG_LASAT_SYSCTL=y
50CONFIG_RWSEM_GENERIC_SPINLOCK=y
51# CONFIG_ARCH_HAS_ILOG2_U32 is not set
52# CONFIG_ARCH_HAS_ILOG2_U64 is not set
53CONFIG_GENERIC_FIND_NEXT_BIT=y
54CONFIG_GENERIC_HWEIGHT=y
55CONFIG_GENERIC_CALIBRATE_DELAY=y
56CONFIG_GENERIC_TIME=y
57CONFIG_GENERIC_CMOS_UPDATE=y
58CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
59CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
60CONFIG_DMA_NONCOHERENT=y
61CONFIG_DMA_NEED_PCI_MAP_STATE=y
62CONFIG_EARLY_PRINTK=y
63CONFIG_SYS_HAS_EARLY_PRINTK=y
64# CONFIG_HOTPLUG_CPU is not set
65CONFIG_MIPS_NILE4=y
66# CONFIG_NO_IOPORT is not set
67# CONFIG_CPU_BIG_ENDIAN is not set
68CONFIG_CPU_LITTLE_ENDIAN=y
69CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
70CONFIG_PCI_GT64XXX_PCI0=y
71CONFIG_MIPS_L1_CACHE_SHIFT=5
72
73#
74# CPU selection
75#
76# CONFIG_CPU_LOONGSON2 is not set
77# CONFIG_CPU_MIPS32_R1 is not set
78# CONFIG_CPU_MIPS32_R2 is not set
79# CONFIG_CPU_MIPS64_R1 is not set
80# CONFIG_CPU_MIPS64_R2 is not set
81# CONFIG_CPU_R3000 is not set
82# CONFIG_CPU_TX39XX is not set
83# CONFIG_CPU_VR41XX is not set
84# CONFIG_CPU_R4300 is not set
85# CONFIG_CPU_R4X00 is not set
86# CONFIG_CPU_TX49XX is not set
87CONFIG_CPU_R5000=y
88# CONFIG_CPU_R5432 is not set
89# CONFIG_CPU_R6000 is not set
90# CONFIG_CPU_NEVADA is not set
91# CONFIG_CPU_R8000 is not set
92# CONFIG_CPU_R10000 is not set
93# CONFIG_CPU_RM7000 is not set
94# CONFIG_CPU_RM9000 is not set
95# CONFIG_CPU_SB1 is not set
96CONFIG_SYS_HAS_CPU_R5000=y
97CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
98CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
99CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
100
101#
102# Kernel type
103#
104CONFIG_32BIT=y
105# CONFIG_64BIT is not set
106CONFIG_PAGE_SIZE_4KB=y
107# CONFIG_PAGE_SIZE_8KB is not set
108# CONFIG_PAGE_SIZE_16KB is not set
109# CONFIG_PAGE_SIZE_64KB is not set
110CONFIG_BOARD_SCACHE=y
111CONFIG_R5000_CPU_SCACHE=y
112CONFIG_MIPS_MT_DISABLED=y
113# CONFIG_MIPS_MT_SMP is not set
114# CONFIG_MIPS_MT_SMTC is not set
115CONFIG_CPU_HAS_LLSC=y
116CONFIG_CPU_HAS_SYNC=y
117CONFIG_GENERIC_HARDIRQS=y
118CONFIG_GENERIC_IRQ_PROBE=y
119CONFIG_ARCH_FLATMEM_ENABLE=y
120CONFIG_SELECT_MEMORY_MODEL=y
121CONFIG_FLATMEM_MANUAL=y
122# CONFIG_DISCONTIGMEM_MANUAL is not set
123# CONFIG_SPARSEMEM_MANUAL is not set
124CONFIG_FLATMEM=y
125CONFIG_FLAT_NODE_MEM_MAP=y
126# CONFIG_SPARSEMEM_STATIC is not set
127CONFIG_SPLIT_PTLOCK_CPUS=4
128# CONFIG_RESOURCES_64BIT is not set
129CONFIG_ZONE_DMA_FLAG=0
130CONFIG_VIRT_TO_BUS=y
131# CONFIG_HZ_48 is not set
132# CONFIG_HZ_100 is not set
133# CONFIG_HZ_128 is not set
134# CONFIG_HZ_250 is not set
135# CONFIG_HZ_256 is not set
136CONFIG_HZ_1000=y
137# CONFIG_HZ_1024 is not set
138CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
139CONFIG_HZ=1000
140CONFIG_PREEMPT_NONE=y
141# CONFIG_PREEMPT_VOLUNTARY is not set
142# CONFIG_PREEMPT is not set
143# CONFIG_KEXEC is not set
144# CONFIG_SECCOMP is not set
145CONFIG_LOCKDEP_SUPPORT=y
146CONFIG_STACKTRACE_SUPPORT=y
147CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
148
149#
150# General setup
151#
152CONFIG_EXPERIMENTAL=y
153CONFIG_BROKEN_ON_SMP=y
154CONFIG_INIT_ENV_ARG_LIMIT=32
155CONFIG_LOCALVERSION=""
156CONFIG_LOCALVERSION_AUTO=y
157CONFIG_SWAP=y
158CONFIG_SYSVIPC=y
159CONFIG_SYSVIPC_SYSCTL=y
160# CONFIG_POSIX_MQUEUE is not set
161# CONFIG_BSD_PROCESS_ACCT is not set
162# CONFIG_TASKSTATS is not set
163# CONFIG_USER_NS is not set
164# CONFIG_AUDIT is not set
165# CONFIG_IKCONFIG is not set
166CONFIG_LOG_BUF_SHIFT=14
167# CONFIG_SYSFS_DEPRECATED is not set
168# CONFIG_RELAY is not set
169# CONFIG_BLK_DEV_INITRD is not set
170CONFIG_CC_OPTIMIZE_FOR_SIZE=y
171CONFIG_SYSCTL=y
172CONFIG_EMBEDDED=y
173# CONFIG_SYSCTL_SYSCALL is not set
174# CONFIG_KALLSYMS is not set
175# CONFIG_HOTPLUG is not set
176CONFIG_PRINTK=y
177CONFIG_BUG=y
178CONFIG_ELF_CORE=y
179CONFIG_BASE_FULL=y
180CONFIG_FUTEX=y
181# CONFIG_EPOLL is not set
182# CONFIG_SIGNALFD is not set
183# CONFIG_TIMERFD is not set
184# CONFIG_EVENTFD is not set
185CONFIG_SHMEM=y
186CONFIG_VM_EVENT_COUNTERS=y
187CONFIG_SLAB=y
188# CONFIG_SLUB is not set
189# CONFIG_SLOB is not set
190CONFIG_RT_MUTEXES=y
191# CONFIG_TINY_SHMEM is not set
192CONFIG_BASE_SMALL=0
193# CONFIG_MODULES is not set
194CONFIG_BLOCK=y
195# CONFIG_LBD is not set
196# CONFIG_BLK_DEV_IO_TRACE is not set
197# CONFIG_LSF is not set
198# CONFIG_BLK_DEV_BSG is not set
199
200#
201# IO Schedulers
202#
203CONFIG_IOSCHED_NOOP=y
204CONFIG_IOSCHED_AS=y
205# CONFIG_IOSCHED_DEADLINE is not set
206# CONFIG_IOSCHED_CFQ is not set
207CONFIG_DEFAULT_AS=y
208# CONFIG_DEFAULT_DEADLINE is not set
209# CONFIG_DEFAULT_CFQ is not set
210# CONFIG_DEFAULT_NOOP is not set
211CONFIG_DEFAULT_IOSCHED="anticipatory"
212
213#
214# Bus options (PCI, PCMCIA, EISA, ISA, TC)
215#
216CONFIG_HW_HAS_PCI=y
217CONFIG_PCI=y
218# CONFIG_ARCH_SUPPORTS_MSI is not set
219CONFIG_MMU=y
220
221#
222# PCCARD (PCMCIA/CardBus) support
223#
224
225#
226# Executable file formats
227#
228CONFIG_BINFMT_ELF=y
229# CONFIG_BINFMT_MISC is not set
230CONFIG_TRAD_SIGNALS=y
231
232#
233# Power management options
234#
235# CONFIG_PM is not set
236
237#
238# Networking
239#
240CONFIG_NET=y
241
242#
243# Networking options
244#
245CONFIG_PACKET=y
246CONFIG_PACKET_MMAP=y
247CONFIG_UNIX=y
248# CONFIG_NET_KEY is not set
249CONFIG_INET=y
250# CONFIG_IP_MULTICAST is not set
251# CONFIG_IP_ADVANCED_ROUTER is not set
252CONFIG_IP_FIB_HASH=y
253# CONFIG_IP_PNP is not set
254# CONFIG_NET_IPIP is not set
255# CONFIG_NET_IPGRE is not set
256# CONFIG_ARPD is not set
257# CONFIG_SYN_COOKIES is not set
258# CONFIG_INET_AH is not set
259# CONFIG_INET_ESP is not set
260# CONFIG_INET_IPCOMP is not set
261# CONFIG_INET_XFRM_TUNNEL is not set
262# CONFIG_INET_TUNNEL is not set
263# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
264# CONFIG_INET_XFRM_MODE_TUNNEL is not set
265# CONFIG_INET_XFRM_MODE_BEET is not set
266# CONFIG_INET_DIAG is not set
267# CONFIG_TCP_CONG_ADVANCED is not set
268CONFIG_TCP_CONG_CUBIC=y
269CONFIG_DEFAULT_TCP_CONG="cubic"
270# CONFIG_TCP_MD5SIG is not set
271# CONFIG_IPV6 is not set
272# CONFIG_INET6_XFRM_TUNNEL is not set
273# CONFIG_INET6_TUNNEL is not set
274# CONFIG_NETWORK_SECMARK is not set
275# CONFIG_NETFILTER is not set
276# CONFIG_IP_DCCP is not set
277# CONFIG_IP_SCTP is not set
278# CONFIG_TIPC is not set
279# CONFIG_ATM is not set
280# CONFIG_BRIDGE is not set
281# CONFIG_VLAN_8021Q is not set
282# CONFIG_DECNET is not set
283# CONFIG_LLC2 is not set
284# CONFIG_IPX is not set
285# CONFIG_ATALK is not set
286# CONFIG_X25 is not set
287# CONFIG_LAPB is not set
288# CONFIG_ECONET is not set
289# CONFIG_WAN_ROUTER is not set
290
291#
292# QoS and/or fair queueing
293#
294# CONFIG_NET_SCHED is not set
295
296#
297# Network testing
298#
299# CONFIG_NET_PKTGEN is not set
300# CONFIG_HAMRADIO is not set
301# CONFIG_IRDA is not set
302# CONFIG_BT is not set
303# CONFIG_AF_RXRPC is not set
304
305#
306# Wireless
307#
308# CONFIG_CFG80211 is not set
309# CONFIG_WIRELESS_EXT is not set
310# CONFIG_MAC80211 is not set
311# CONFIG_IEEE80211 is not set
312# CONFIG_RFKILL is not set
313# CONFIG_NET_9P is not set
314
315#
316# Device Drivers
317#
318
319#
320# Generic Driver Options
321#
322CONFIG_STANDALONE=y
323CONFIG_PREVENT_FIRMWARE_BUILD=y
324# CONFIG_SYS_HYPERVISOR is not set
325# CONFIG_CONNECTOR is not set
326CONFIG_MTD=y
327# CONFIG_MTD_DEBUG is not set
328# CONFIG_MTD_CONCAT is not set
329CONFIG_MTD_PARTITIONS=y
330# CONFIG_MTD_REDBOOT_PARTS is not set
331# CONFIG_MTD_CMDLINE_PARTS is not set
332
333#
334# User Modules And Translation Layers
335#
336CONFIG_MTD_CHAR=y
337CONFIG_MTD_BLKDEVS=y
338CONFIG_MTD_BLOCK=y
339# CONFIG_FTL is not set
340# CONFIG_NFTL is not set
341# CONFIG_INFTL is not set
342# CONFIG_RFD_FTL is not set
343# CONFIG_SSFDC is not set
344
345#
346# RAM/ROM/Flash chip drivers
347#
348CONFIG_MTD_CFI=y
349# CONFIG_MTD_JEDECPROBE is not set
350CONFIG_MTD_GEN_PROBE=y
351# CONFIG_MTD_CFI_ADV_OPTIONS is not set
352CONFIG_MTD_MAP_BANK_WIDTH_1=y
353CONFIG_MTD_MAP_BANK_WIDTH_2=y
354CONFIG_MTD_MAP_BANK_WIDTH_4=y
355# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
356# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
357# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
358CONFIG_MTD_CFI_I1=y
359CONFIG_MTD_CFI_I2=y
360# CONFIG_MTD_CFI_I4 is not set
361# CONFIG_MTD_CFI_I8 is not set
362# CONFIG_MTD_CFI_INTELEXT is not set
363CONFIG_MTD_CFI_AMDSTD=y
364# CONFIG_MTD_CFI_STAA is not set
365CONFIG_MTD_CFI_UTIL=y
366# CONFIG_MTD_RAM is not set
367# CONFIG_MTD_ROM is not set
368# CONFIG_MTD_ABSENT is not set
369
370#
371# Mapping drivers for chip access
372#
373# CONFIG_MTD_COMPLEX_MAPPINGS is not set
374# CONFIG_MTD_PHYSMAP is not set
375CONFIG_MTD_LASAT=y
376# CONFIG_MTD_PLATRAM is not set
377
378#
379# Self-contained MTD device drivers
380#
381# CONFIG_MTD_PMC551 is not set
382# CONFIG_MTD_SLRAM is not set
383# CONFIG_MTD_PHRAM is not set
384# CONFIG_MTD_MTDRAM is not set
385# CONFIG_MTD_BLOCK2MTD is not set
386
387#
388# Disk-On-Chip Device Drivers
389#
390# CONFIG_MTD_DOC2000 is not set
391# CONFIG_MTD_DOC2001 is not set
392# CONFIG_MTD_DOC2001PLUS is not set
393# CONFIG_MTD_NAND is not set
394# CONFIG_MTD_ONENAND is not set
395
396#
397# UBI - Unsorted block images
398#
399# CONFIG_MTD_UBI is not set
400# CONFIG_PARPORT is not set
401CONFIG_BLK_DEV=y
402# CONFIG_BLK_CPQ_DA is not set
403# CONFIG_BLK_CPQ_CISS_DA is not set
404# CONFIG_BLK_DEV_DAC960 is not set
405# CONFIG_BLK_DEV_UMEM is not set
406# CONFIG_BLK_DEV_COW_COMMON is not set
407# CONFIG_BLK_DEV_LOOP is not set
408# CONFIG_BLK_DEV_NBD is not set
409# CONFIG_BLK_DEV_SX8 is not set
410# CONFIG_BLK_DEV_RAM is not set
411# CONFIG_CDROM_PKTCDVD is not set
412# CONFIG_ATA_OVER_ETH is not set
413# CONFIG_MISC_DEVICES is not set
414CONFIG_IDE=y
415CONFIG_IDE_MAX_HWIFS=4
416CONFIG_BLK_DEV_IDE=y
417
418#
419# Please see Documentation/ide.txt for help/info on IDE drives
420#
421# CONFIG_BLK_DEV_IDE_SATA is not set
422CONFIG_BLK_DEV_IDEDISK=y
423CONFIG_IDEDISK_MULTI_MODE=y
424# CONFIG_BLK_DEV_IDECD is not set
425# CONFIG_BLK_DEV_IDETAPE is not set
426# CONFIG_BLK_DEV_IDEFLOPPY is not set
427# CONFIG_IDE_TASK_IOCTL is not set
428CONFIG_IDE_PROC_FS=y
429
430#
431# IDE chipset support/bugfixes
432#
433CONFIG_IDE_GENERIC=y
434CONFIG_BLK_DEV_IDEPCI=y
435# CONFIG_IDEPCI_SHARE_IRQ is not set
436CONFIG_IDEPCI_PCIBUS_ORDER=y
437# CONFIG_BLK_DEV_OFFBOARD is not set
438CONFIG_BLK_DEV_GENERIC=y
439# CONFIG_BLK_DEV_OPTI621 is not set
440CONFIG_BLK_DEV_IDEDMA_PCI=y
441# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
442# CONFIG_IDEDMA_ONLYDISK is not set
443# CONFIG_BLK_DEV_AEC62XX is not set
444# CONFIG_BLK_DEV_ALI15X3 is not set
445# CONFIG_BLK_DEV_AMD74XX is not set
446CONFIG_BLK_DEV_CMD64X=y
447# CONFIG_BLK_DEV_TRIFLEX is not set
448# CONFIG_BLK_DEV_CY82C693 is not set
449# CONFIG_BLK_DEV_CS5520 is not set
450# CONFIG_BLK_DEV_CS5530 is not set
451# CONFIG_BLK_DEV_HPT34X is not set
452# CONFIG_BLK_DEV_HPT366 is not set
453# CONFIG_BLK_DEV_JMICRON is not set
454# CONFIG_BLK_DEV_SC1200 is not set
455# CONFIG_BLK_DEV_PIIX is not set
456# CONFIG_BLK_DEV_IT8213 is not set
457# CONFIG_BLK_DEV_IT821X is not set
458# CONFIG_BLK_DEV_NS87415 is not set
459# CONFIG_BLK_DEV_PDC202XX_OLD is not set
460# CONFIG_BLK_DEV_PDC202XX_NEW is not set
461# CONFIG_BLK_DEV_SVWKS is not set
462# CONFIG_BLK_DEV_SIIMAGE is not set
463# CONFIG_BLK_DEV_SLC90E66 is not set
464# CONFIG_BLK_DEV_TRM290 is not set
465# CONFIG_BLK_DEV_VIA82CXXX is not set
466# CONFIG_BLK_DEV_TC86C001 is not set
467# CONFIG_IDE_ARM is not set
468CONFIG_BLK_DEV_IDEDMA=y
469# CONFIG_IDEDMA_IVB is not set
470# CONFIG_BLK_DEV_HD is not set
471
472#
473# SCSI device support
474#
475# CONFIG_RAID_ATTRS is not set
476# CONFIG_SCSI is not set
477# CONFIG_SCSI_DMA is not set
478# CONFIG_SCSI_NETLINK is not set
479# CONFIG_ATA is not set
480# CONFIG_MD is not set
481
482#
483# Fusion MPT device support
484#
485# CONFIG_FUSION is not set
486
487#
488# IEEE 1394 (FireWire) support
489#
490# CONFIG_FIREWIRE is not set
491# CONFIG_IEEE1394 is not set
492# CONFIG_I2O is not set
493CONFIG_NETDEVICES=y
494# CONFIG_NETDEVICES_MULTIQUEUE is not set
495# CONFIG_DUMMY is not set
496# CONFIG_BONDING is not set
497# CONFIG_MACVLAN is not set
498# CONFIG_EQUALIZER is not set
499# CONFIG_TUN is not set
500# CONFIG_ARCNET is not set
501# CONFIG_PHYLIB is not set
502CONFIG_NET_ETHERNET=y
503CONFIG_MII=y
504# CONFIG_AX88796 is not set
505# CONFIG_HAPPYMEAL is not set
506# CONFIG_SUNGEM is not set
507# CONFIG_CASSINI is not set
508# CONFIG_NET_VENDOR_3COM is not set
509# CONFIG_DM9000 is not set
510# CONFIG_NET_TULIP is not set
511# CONFIG_HP100 is not set
512CONFIG_NET_PCI=y
513CONFIG_PCNET32=y
514# CONFIG_PCNET32_NAPI is not set
515# CONFIG_AMD8111_ETH is not set
516# CONFIG_ADAPTEC_STARFIRE is not set
517# CONFIG_B44 is not set
518# CONFIG_FORCEDETH is not set
519# CONFIG_TC35815 is not set
520# CONFIG_DGRS is not set
521# CONFIG_EEPRO100 is not set
522# CONFIG_E100 is not set
523# CONFIG_FEALNX is not set
524# CONFIG_NATSEMI is not set
525# CONFIG_NE2K_PCI is not set
526# CONFIG_8139CP is not set
527# CONFIG_8139TOO is not set
528# CONFIG_SIS900 is not set
529# CONFIG_EPIC100 is not set
530# CONFIG_SUNDANCE is not set
531# CONFIG_TLAN is not set
532# CONFIG_VIA_RHINE is not set
533# CONFIG_SC92031 is not set
534# CONFIG_NETDEV_1000 is not set
535# CONFIG_NETDEV_10000 is not set
536# CONFIG_TR is not set
537
538#
539# Wireless LAN
540#
541# CONFIG_WLAN_PRE80211 is not set
542# CONFIG_WLAN_80211 is not set
543# CONFIG_WAN is not set
544# CONFIG_FDDI is not set
545# CONFIG_HIPPI is not set
546# CONFIG_PPP is not set
547# CONFIG_SLIP is not set
548# CONFIG_SHAPER is not set
549# CONFIG_NETCONSOLE is not set
550# CONFIG_NETPOLL is not set
551# CONFIG_NET_POLL_CONTROLLER is not set
552# CONFIG_ISDN is not set
553# CONFIG_PHONE is not set
554
555#
556# Input device support
557#
558CONFIG_INPUT=y
559# CONFIG_INPUT_FF_MEMLESS is not set
560# CONFIG_INPUT_POLLDEV is not set
561
562#
563# Userland interfaces
564#
565# CONFIG_INPUT_MOUSEDEV is not set
566# CONFIG_INPUT_JOYDEV is not set
567# CONFIG_INPUT_TSDEV is not set
568# CONFIG_INPUT_EVDEV is not set
569# CONFIG_INPUT_EVBUG is not set
570
571#
572# Input Device Drivers
573#
574# CONFIG_INPUT_KEYBOARD is not set
575# CONFIG_INPUT_MOUSE is not set
576# CONFIG_INPUT_JOYSTICK is not set
577# CONFIG_INPUT_TABLET is not set
578# CONFIG_INPUT_TOUCHSCREEN is not set
579# CONFIG_INPUT_MISC is not set
580
581#
582# Hardware I/O ports
583#
584CONFIG_SERIO=y
585CONFIG_SERIO_I8042=y
586CONFIG_SERIO_SERPORT=y
587# CONFIG_SERIO_PCIPS2 is not set
588# CONFIG_SERIO_LIBPS2 is not set
589CONFIG_SERIO_RAW=y
590# CONFIG_GAMEPORT is not set
591
592#
593# Character devices
594#
595# CONFIG_VT is not set
596# CONFIG_SERIAL_NONSTANDARD is not set
597
598#
599# Serial drivers
600#
601CONFIG_SERIAL_8250=y
602CONFIG_SERIAL_8250_CONSOLE=y
603# CONFIG_SERIAL_8250_PCI is not set
604CONFIG_SERIAL_8250_NR_UARTS=4
605CONFIG_SERIAL_8250_RUNTIME_UARTS=4
606# CONFIG_SERIAL_8250_EXTENDED is not set
607
608#
609# Non-8250 serial port support
610#
611CONFIG_SERIAL_CORE=y
612CONFIG_SERIAL_CORE_CONSOLE=y
613# CONFIG_SERIAL_JSM is not set
614CONFIG_UNIX98_PTYS=y
615CONFIG_LEGACY_PTYS=y
616CONFIG_LEGACY_PTY_COUNT=256
617# CONFIG_IPMI_HANDLER is not set
618# CONFIG_WATCHDOG is not set
619# CONFIG_HW_RANDOM is not set
620# CONFIG_RTC is not set
621# CONFIG_R3964 is not set
622# CONFIG_APPLICOM is not set
623# CONFIG_DRM is not set
624# CONFIG_RAW_DRIVER is not set
625# CONFIG_TCG_TPM is not set
626CONFIG_DEVPORT=y
627# CONFIG_I2C is not set
628
629#
630# SPI support
631#
632# CONFIG_SPI is not set
633# CONFIG_SPI_MASTER is not set
634# CONFIG_W1 is not set
635# CONFIG_POWER_SUPPLY is not set
636# CONFIG_HWMON is not set
637
638#
639# Multifunction device drivers
640#
641# CONFIG_MFD_SM501 is not set
642
643#
644# Multimedia devices
645#
646# CONFIG_VIDEO_DEV is not set
647# CONFIG_DVB_CORE is not set
648# CONFIG_DAB is not set
649
650#
651# Graphics support
652#
653# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
654
655#
656# Display device support
657#
658# CONFIG_DISPLAY_SUPPORT is not set
659# CONFIG_VGASTATE is not set
660# CONFIG_VIDEO_OUTPUT_CONTROL is not set
661# CONFIG_FB is not set
662
663#
664# Sound
665#
666# CONFIG_SOUND is not set
667# CONFIG_HID_SUPPORT is not set
668# CONFIG_USB_SUPPORT is not set
669# CONFIG_MMC is not set
670# CONFIG_NEW_LEDS is not set
671# CONFIG_INFINIBAND is not set
672# CONFIG_RTC_CLASS is not set
673
674#
675# DMA Engine support
676#
677# CONFIG_DMA_ENGINE is not set
678
679#
680# DMA Clients
681#
682
683#
684# DMA Devices
685#
686
687#
688# Userspace I/O
689#
690# CONFIG_UIO is not set
691
692#
693# File systems
694#
695CONFIG_EXT2_FS=y
696# CONFIG_EXT2_FS_XATTR is not set
697# CONFIG_EXT2_FS_XIP is not set
698CONFIG_EXT3_FS=y
699# CONFIG_EXT3_FS_XATTR is not set
700# CONFIG_EXT4DEV_FS is not set
701CONFIG_JBD=y
702# CONFIG_JBD_DEBUG is not set
703# CONFIG_REISERFS_FS is not set
704# CONFIG_JFS_FS is not set
705# CONFIG_FS_POSIX_ACL is not set
706# CONFIG_XFS_FS is not set
707# CONFIG_GFS2_FS is not set
708# CONFIG_OCFS2_FS is not set
709# CONFIG_MINIX_FS is not set
710# CONFIG_ROMFS_FS is not set
711# CONFIG_INOTIFY is not set
712# CONFIG_QUOTA is not set
713# CONFIG_DNOTIFY is not set
714# CONFIG_AUTOFS_FS is not set
715# CONFIG_AUTOFS4_FS is not set
716# CONFIG_FUSE_FS is not set
717
718#
719# CD-ROM/DVD Filesystems
720#
721# CONFIG_ISO9660_FS is not set
722# CONFIG_UDF_FS is not set
723
724#
725# DOS/FAT/NT Filesystems
726#
727# CONFIG_MSDOS_FS is not set
728# CONFIG_VFAT_FS is not set
729# CONFIG_NTFS_FS is not set
730
731#
732# Pseudo filesystems
733#
734CONFIG_PROC_FS=y
735CONFIG_PROC_KCORE=y
736CONFIG_PROC_SYSCTL=y
737CONFIG_SYSFS=y
738CONFIG_TMPFS=y
739# CONFIG_TMPFS_POSIX_ACL is not set
740# CONFIG_HUGETLB_PAGE is not set
741CONFIG_RAMFS=y
742CONFIG_CONFIGFS_FS=y
743
744#
745# Miscellaneous filesystems
746#
747# CONFIG_ADFS_FS is not set
748# CONFIG_AFFS_FS is not set
749# CONFIG_HFS_FS is not set
750# CONFIG_HFSPLUS_FS is not set
751# CONFIG_BEFS_FS is not set
752# CONFIG_BFS_FS is not set
753# CONFIG_EFS_FS is not set
754# CONFIG_JFFS2_FS is not set
755# CONFIG_CRAMFS is not set
756# CONFIG_VXFS_FS is not set
757# CONFIG_HPFS_FS is not set
758# CONFIG_QNX4FS_FS is not set
759# CONFIG_SYSV_FS is not set
760# CONFIG_UFS_FS is not set
761
762#
763# Network File Systems
764#
765# CONFIG_NFS_FS is not set
766# CONFIG_NFSD is not set
767# CONFIG_SMB_FS is not set
768# CONFIG_CIFS is not set
769# CONFIG_NCP_FS is not set
770# CONFIG_CODA_FS is not set
771# CONFIG_AFS_FS is not set
772
773#
774# Partition Types
775#
776# CONFIG_PARTITION_ADVANCED is not set
777CONFIG_MSDOS_PARTITION=y
778
779#
780# Native Language Support
781#
782# CONFIG_NLS is not set
783
784#
785# Distributed Lock Manager
786#
787# CONFIG_DLM is not set
788
789#
790# Profiling support
791#
792# CONFIG_PROFILING is not set
793
794#
795# Kernel hacking
796#
797CONFIG_TRACE_IRQFLAGS_SUPPORT=y
798# CONFIG_PRINTK_TIME is not set
799CONFIG_ENABLE_MUST_CHECK=y
800CONFIG_MAGIC_SYSRQ=y
801# CONFIG_UNUSED_SYMBOLS is not set
802# CONFIG_DEBUG_FS is not set
803# CONFIG_HEADERS_CHECK is not set
804# CONFIG_DEBUG_KERNEL is not set
805CONFIG_CROSSCOMPILE=y
806CONFIG_CMDLINE=""
807
808#
809# Security options
810#
811# CONFIG_KEYS is not set
812# CONFIG_SECURITY is not set
813# CONFIG_CRYPTO is not set
814
815#
816# Library routines
817#
818CONFIG_BITREVERSE=y
819# CONFIG_CRC_CCITT is not set
820# CONFIG_CRC16 is not set
821# CONFIG_CRC_ITU_T is not set
822CONFIG_CRC32=y
823# CONFIG_CRC7 is not set
824# CONFIG_LIBCRC32C is not set
825CONFIG_PLIST=y
826CONFIG_HAS_IOMEM=y
827CONFIG_HAS_IOPORT=y
828CONFIG_HAS_DMA=y
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
new file mode 100644
index 000000000000..0280ef389d8d
--- /dev/null
+++ b/arch/mips/configs/mtx1_defconfig
@@ -0,0 +1,3115 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc8
4# Sun Sep 30 12:56:10 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_MACH_ALCHEMY=y
12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set
16# CONFIG_LEMOTE_FULONG is not set
17# CONFIG_MIPS_ATLAS is not set
18# CONFIG_MIPS_MALTA is not set
19# CONFIG_MIPS_SEAD is not set
20# CONFIG_MIPS_SIM is not set
21# CONFIG_MARKEINS is not set
22# CONFIG_MACH_VR41XX is not set
23# CONFIG_PNX8550_JBS is not set
24# CONFIG_PNX8550_STB810 is not set
25# CONFIG_PMC_MSP is not set
26# CONFIG_PMC_YOSEMITE is not set
27# CONFIG_QEMU is not set
28# CONFIG_SGI_IP22 is not set
29# CONFIG_SGI_IP27 is not set
30# CONFIG_SGI_IP32 is not set
31# CONFIG_SIBYTE_CRHINE is not set
32# CONFIG_SIBYTE_CARMEL is not set
33# CONFIG_SIBYTE_CRHONE is not set
34# CONFIG_SIBYTE_RHONE is not set
35# CONFIG_SIBYTE_SWARM is not set
36# CONFIG_SIBYTE_LITTLESUR is not set
37# CONFIG_SIBYTE_SENTOSA is not set
38# CONFIG_SIBYTE_PTSWARM is not set
39# CONFIG_SIBYTE_BIGSUR is not set
40# CONFIG_SNI_RM is not set
41# CONFIG_TOSHIBA_JMR3927 is not set
42# CONFIG_TOSHIBA_RBTX4927 is not set
43# CONFIG_TOSHIBA_RBTX4938 is not set
44# CONFIG_WR_PPMC is not set
45CONFIG_MIPS_MTX1=y
46# CONFIG_MIPS_BOSPORUS is not set
47# CONFIG_MIPS_DB1000 is not set
48# CONFIG_MIPS_DB1100 is not set
49# CONFIG_MIPS_DB1200 is not set
50# CONFIG_MIPS_DB1500 is not set
51# CONFIG_MIPS_DB1550 is not set
52# CONFIG_MIPS_MIRAGE is not set
53# CONFIG_MIPS_PB1000 is not set
54# CONFIG_MIPS_PB1100 is not set
55# CONFIG_MIPS_PB1200 is not set
56# CONFIG_MIPS_PB1500 is not set
57# CONFIG_MIPS_PB1550 is not set
58# CONFIG_MIPS_XXS1500 is not set
59CONFIG_SOC_AU1500=y
60CONFIG_SOC_AU1X00=y
61CONFIG_RWSEM_GENERIC_SPINLOCK=y
62# CONFIG_ARCH_HAS_ILOG2_U32 is not set
63# CONFIG_ARCH_HAS_ILOG2_U64 is not set
64CONFIG_GENERIC_FIND_NEXT_BIT=y
65CONFIG_GENERIC_HWEIGHT=y
66CONFIG_GENERIC_CALIBRATE_DELAY=y
67CONFIG_GENERIC_TIME=y
68CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
69# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
70CONFIG_DMA_NONCOHERENT=y
71CONFIG_DMA_NEED_PCI_MAP_STATE=y
72# CONFIG_HOTPLUG_CPU is not set
73# CONFIG_NO_IOPORT is not set
74# CONFIG_CPU_BIG_ENDIAN is not set
75CONFIG_CPU_LITTLE_ENDIAN=y
76CONFIG_SYS_SUPPORTS_APM_EMULATION=y
77CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
78CONFIG_MIPS_L1_CACHE_SHIFT=5
79
80#
81# CPU selection
82#
83# CONFIG_CPU_LOONGSON2 is not set
84CONFIG_CPU_MIPS32_R1=y
85# CONFIG_CPU_MIPS32_R2 is not set
86# CONFIG_CPU_MIPS64_R1 is not set
87# CONFIG_CPU_MIPS64_R2 is not set
88# CONFIG_CPU_R3000 is not set
89# CONFIG_CPU_TX39XX is not set
90# CONFIG_CPU_VR41XX is not set
91# CONFIG_CPU_R4300 is not set
92# CONFIG_CPU_R4X00 is not set
93# CONFIG_CPU_TX49XX is not set
94# CONFIG_CPU_R5000 is not set
95# CONFIG_CPU_R5432 is not set
96# CONFIG_CPU_R6000 is not set
97# CONFIG_CPU_NEVADA is not set
98# CONFIG_CPU_R8000 is not set
99# CONFIG_CPU_R10000 is not set
100# CONFIG_CPU_RM7000 is not set
101# CONFIG_CPU_RM9000 is not set
102# CONFIG_CPU_SB1 is not set
103CONFIG_SYS_HAS_CPU_MIPS32_R1=y
104CONFIG_CPU_MIPS32=y
105CONFIG_CPU_MIPSR1=y
106CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
107CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
108
109#
110# Kernel type
111#
112CONFIG_32BIT=y
113# CONFIG_64BIT is not set
114CONFIG_PAGE_SIZE_4KB=y
115# CONFIG_PAGE_SIZE_8KB is not set
116# CONFIG_PAGE_SIZE_16KB is not set
117# CONFIG_PAGE_SIZE_64KB is not set
118CONFIG_CPU_HAS_PREFETCH=y
119CONFIG_MIPS_MT_DISABLED=y
120# CONFIG_MIPS_MT_SMP is not set
121# CONFIG_MIPS_MT_SMTC is not set
122CONFIG_64BIT_PHYS_ADDR=y
123CONFIG_CPU_HAS_LLSC=y
124CONFIG_CPU_HAS_SYNC=y
125CONFIG_GENERIC_HARDIRQS=y
126CONFIG_GENERIC_IRQ_PROBE=y
127CONFIG_CPU_SUPPORTS_HIGHMEM=y
128CONFIG_ARCH_FLATMEM_ENABLE=y
129CONFIG_SELECT_MEMORY_MODEL=y
130CONFIG_FLATMEM_MANUAL=y
131# CONFIG_DISCONTIGMEM_MANUAL is not set
132# CONFIG_SPARSEMEM_MANUAL is not set
133CONFIG_FLATMEM=y
134CONFIG_FLAT_NODE_MEM_MAP=y
135# CONFIG_SPARSEMEM_STATIC is not set
136CONFIG_SPLIT_PTLOCK_CPUS=4
137CONFIG_RESOURCES_64BIT=y
138CONFIG_ZONE_DMA_FLAG=0
139CONFIG_VIRT_TO_BUS=y
140# CONFIG_HZ_48 is not set
141# CONFIG_HZ_100 is not set
142# CONFIG_HZ_128 is not set
143CONFIG_HZ_250=y
144# CONFIG_HZ_256 is not set
145# CONFIG_HZ_1000 is not set
146# CONFIG_HZ_1024 is not set
147CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
148CONFIG_HZ=250
149# CONFIG_PREEMPT_NONE is not set
150CONFIG_PREEMPT_VOLUNTARY=y
151# CONFIG_PREEMPT is not set
152# CONFIG_KEXEC is not set
153CONFIG_SECCOMP=y
154CONFIG_LOCKDEP_SUPPORT=y
155CONFIG_STACKTRACE_SUPPORT=y
156CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
157
158#
159# General setup
160#
161CONFIG_EXPERIMENTAL=y
162CONFIG_BROKEN_ON_SMP=y
163CONFIG_INIT_ENV_ARG_LIMIT=32
164CONFIG_LOCALVERSION=""
165# CONFIG_LOCALVERSION_AUTO is not set
166CONFIG_SWAP=y
167CONFIG_SYSVIPC=y
168CONFIG_SYSVIPC_SYSCTL=y
169CONFIG_POSIX_MQUEUE=y
170CONFIG_BSD_PROCESS_ACCT=y
171CONFIG_BSD_PROCESS_ACCT_V3=y
172# CONFIG_TASKSTATS is not set
173# CONFIG_USER_NS is not set
174CONFIG_AUDIT=y
175# CONFIG_IKCONFIG is not set
176CONFIG_LOG_BUF_SHIFT=17
177CONFIG_SYSFS_DEPRECATED=y
178CONFIG_RELAY=y
179CONFIG_BLK_DEV_INITRD=y
180CONFIG_INITRAMFS_SOURCE=""
181# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
182CONFIG_SYSCTL=y
183CONFIG_EMBEDDED=y
184CONFIG_SYSCTL_SYSCALL=y
185CONFIG_KALLSYMS=y
186# CONFIG_KALLSYMS_EXTRA_PASS is not set
187CONFIG_HOTPLUG=y
188CONFIG_PRINTK=y
189CONFIG_BUG=y
190CONFIG_ELF_CORE=y
191CONFIG_BASE_FULL=y
192CONFIG_FUTEX=y
193CONFIG_ANON_INODES=y
194CONFIG_EPOLL=y
195CONFIG_SIGNALFD=y
196CONFIG_EVENTFD=y
197CONFIG_SHMEM=y
198CONFIG_VM_EVENT_COUNTERS=y
199CONFIG_SLAB=y
200# CONFIG_SLUB is not set
201# CONFIG_SLOB is not set
202CONFIG_RT_MUTEXES=y
203# CONFIG_TINY_SHMEM is not set
204CONFIG_BASE_SMALL=0
205CONFIG_MODULES=y
206CONFIG_MODULE_UNLOAD=y
207# CONFIG_MODULE_FORCE_UNLOAD is not set
208CONFIG_MODVERSIONS=y
209CONFIG_MODULE_SRCVERSION_ALL=y
210CONFIG_KMOD=y
211CONFIG_BLOCK=y
212CONFIG_LBD=y
213# CONFIG_BLK_DEV_IO_TRACE is not set
214# CONFIG_LSF is not set
215# CONFIG_BLK_DEV_BSG is not set
216
217#
218# IO Schedulers
219#
220CONFIG_IOSCHED_NOOP=y
221CONFIG_IOSCHED_AS=y
222CONFIG_IOSCHED_DEADLINE=y
223CONFIG_IOSCHED_CFQ=y
224# CONFIG_DEFAULT_AS is not set
225# CONFIG_DEFAULT_DEADLINE is not set
226CONFIG_DEFAULT_CFQ=y
227# CONFIG_DEFAULT_NOOP is not set
228CONFIG_DEFAULT_IOSCHED="cfq"
229
230#
231# Bus options (PCI, PCMCIA, EISA, ISA, TC)
232#
233CONFIG_HW_HAS_PCI=y
234CONFIG_PCI=y
235# CONFIG_ARCH_SUPPORTS_MSI is not set
236CONFIG_MMU=y
237
238#
239# PCCARD (PCMCIA/CardBus) support
240#
241CONFIG_PCCARD=m
242# CONFIG_PCMCIA_DEBUG is not set
243CONFIG_PCMCIA=m
244CONFIG_PCMCIA_LOAD_CIS=y
245CONFIG_PCMCIA_IOCTL=y
246CONFIG_CARDBUS=y
247
248#
249# PC-card bridges
250#
251CONFIG_YENTA=m
252CONFIG_YENTA_O2=y
253CONFIG_YENTA_RICOH=y
254CONFIG_YENTA_TI=y
255CONFIG_YENTA_ENE_TUNE=y
256CONFIG_YENTA_TOSHIBA=y
257CONFIG_PD6729=m
258CONFIG_I82092=m
259# CONFIG_PCMCIA_AU1X00 is not set
260CONFIG_PCCARD_NONSTATIC=m
261# CONFIG_HOTPLUG_PCI is not set
262
263#
264# Executable file formats
265#
266CONFIG_BINFMT_ELF=y
267CONFIG_BINFMT_MISC=m
268CONFIG_TRAD_SIGNALS=y
269
270#
271# Power management options
272#
273CONFIG_PM=y
274# CONFIG_PM_LEGACY is not set
275# CONFIG_PM_DEBUG is not set
276CONFIG_PM_SLEEP=y
277CONFIG_SUSPEND_UP_POSSIBLE=y
278CONFIG_SUSPEND=y
279# CONFIG_APM_EMULATION is not set
280
281#
282# Networking
283#
284CONFIG_NET=y
285
286#
287# Networking options
288#
289CONFIG_PACKET=m
290CONFIG_PACKET_MMAP=y
291CONFIG_UNIX=y
292CONFIG_XFRM=y
293CONFIG_XFRM_USER=m
294# CONFIG_XFRM_SUB_POLICY is not set
295# CONFIG_XFRM_MIGRATE is not set
296CONFIG_NET_KEY=m
297# CONFIG_NET_KEY_MIGRATE is not set
298CONFIG_INET=y
299CONFIG_IP_MULTICAST=y
300CONFIG_IP_ADVANCED_ROUTER=y
301CONFIG_ASK_IP_FIB_HASH=y
302# CONFIG_IP_FIB_TRIE is not set
303CONFIG_IP_FIB_HASH=y
304CONFIG_IP_MULTIPLE_TABLES=y
305CONFIG_IP_ROUTE_MULTIPATH=y
306CONFIG_IP_ROUTE_VERBOSE=y
307# CONFIG_IP_PNP is not set
308CONFIG_NET_IPIP=m
309CONFIG_NET_IPGRE=m
310CONFIG_NET_IPGRE_BROADCAST=y
311CONFIG_IP_MROUTE=y
312CONFIG_IP_PIMSM_V1=y
313CONFIG_IP_PIMSM_V2=y
314# CONFIG_ARPD is not set
315CONFIG_SYN_COOKIES=y
316CONFIG_INET_AH=m
317CONFIG_INET_ESP=m
318CONFIG_INET_IPCOMP=m
319CONFIG_INET_XFRM_TUNNEL=m
320CONFIG_INET_TUNNEL=m
321CONFIG_INET_XFRM_MODE_TRANSPORT=m
322CONFIG_INET_XFRM_MODE_TUNNEL=m
323CONFIG_INET_XFRM_MODE_BEET=m
324CONFIG_INET_DIAG=y
325CONFIG_INET_TCP_DIAG=y
326# CONFIG_TCP_CONG_ADVANCED is not set
327CONFIG_TCP_CONG_CUBIC=y
328CONFIG_DEFAULT_TCP_CONG="cubic"
329# CONFIG_TCP_MD5SIG is not set
330CONFIG_IP_VS=m
331# CONFIG_IP_VS_DEBUG is not set
332CONFIG_IP_VS_TAB_BITS=12
333
334#
335# IPVS transport protocol load balancing support
336#
337CONFIG_IP_VS_PROTO_TCP=y
338CONFIG_IP_VS_PROTO_UDP=y
339CONFIG_IP_VS_PROTO_ESP=y
340CONFIG_IP_VS_PROTO_AH=y
341
342#
343# IPVS scheduler
344#
345CONFIG_IP_VS_RR=m
346CONFIG_IP_VS_WRR=m
347CONFIG_IP_VS_LC=m
348CONFIG_IP_VS_WLC=m
349CONFIG_IP_VS_LBLC=m
350CONFIG_IP_VS_LBLCR=m
351CONFIG_IP_VS_DH=m
352CONFIG_IP_VS_SH=m
353CONFIG_IP_VS_SED=m
354CONFIG_IP_VS_NQ=m
355
356#
357# IPVS application helper
358#
359CONFIG_IP_VS_FTP=m
360CONFIG_IPV6=m
361CONFIG_IPV6_PRIVACY=y
362# CONFIG_IPV6_ROUTER_PREF is not set
363# CONFIG_IPV6_OPTIMISTIC_DAD is not set
364CONFIG_INET6_AH=m
365CONFIG_INET6_ESP=m
366CONFIG_INET6_IPCOMP=m
367# CONFIG_IPV6_MIP6 is not set
368CONFIG_INET6_XFRM_TUNNEL=m
369CONFIG_INET6_TUNNEL=m
370CONFIG_INET6_XFRM_MODE_TRANSPORT=m
371CONFIG_INET6_XFRM_MODE_TUNNEL=m
372CONFIG_INET6_XFRM_MODE_BEET=m
373CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
374CONFIG_IPV6_SIT=m
375CONFIG_IPV6_TUNNEL=m
376# CONFIG_IPV6_MULTIPLE_TABLES is not set
377# CONFIG_NETLABEL is not set
378CONFIG_NETWORK_SECMARK=y
379CONFIG_NETFILTER=y
380# CONFIG_NETFILTER_DEBUG is not set
381CONFIG_BRIDGE_NETFILTER=y
382
383#
384# Core Netfilter Configuration
385#
386CONFIG_NETFILTER_NETLINK=m
387CONFIG_NETFILTER_NETLINK_QUEUE=m
388CONFIG_NETFILTER_NETLINK_LOG=m
389# CONFIG_NF_CONNTRACK_ENABLED is not set
390# CONFIG_NF_CONNTRACK is not set
391CONFIG_NETFILTER_XTABLES=m
392CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
393CONFIG_NETFILTER_XT_TARGET_DSCP=m
394CONFIG_NETFILTER_XT_TARGET_MARK=m
395CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
396# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
397# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
398CONFIG_NETFILTER_XT_TARGET_SECMARK=m
399# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
400CONFIG_NETFILTER_XT_MATCH_COMMENT=m
401CONFIG_NETFILTER_XT_MATCH_DCCP=m
402CONFIG_NETFILTER_XT_MATCH_DSCP=m
403CONFIG_NETFILTER_XT_MATCH_ESP=m
404CONFIG_NETFILTER_XT_MATCH_LENGTH=m
405CONFIG_NETFILTER_XT_MATCH_LIMIT=m
406CONFIG_NETFILTER_XT_MATCH_MAC=m
407CONFIG_NETFILTER_XT_MATCH_MARK=m
408CONFIG_NETFILTER_XT_MATCH_POLICY=m
409CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
410CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
411CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
412CONFIG_NETFILTER_XT_MATCH_QUOTA=m
413CONFIG_NETFILTER_XT_MATCH_REALM=m
414CONFIG_NETFILTER_XT_MATCH_SCTP=m
415CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
416CONFIG_NETFILTER_XT_MATCH_STRING=m
417CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
418# CONFIG_NETFILTER_XT_MATCH_U32 is not set
419# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
420
421#
422# IP: Netfilter Configuration
423#
424CONFIG_IP_NF_QUEUE=m
425CONFIG_IP_NF_IPTABLES=m
426CONFIG_IP_NF_MATCH_IPRANGE=m
427CONFIG_IP_NF_MATCH_TOS=m
428CONFIG_IP_NF_MATCH_RECENT=m
429CONFIG_IP_NF_MATCH_ECN=m
430CONFIG_IP_NF_MATCH_AH=m
431CONFIG_IP_NF_MATCH_TTL=m
432CONFIG_IP_NF_MATCH_OWNER=m
433CONFIG_IP_NF_MATCH_ADDRTYPE=m
434CONFIG_IP_NF_FILTER=m
435CONFIG_IP_NF_TARGET_REJECT=m
436CONFIG_IP_NF_TARGET_LOG=m
437CONFIG_IP_NF_TARGET_ULOG=m
438CONFIG_IP_NF_MANGLE=m
439CONFIG_IP_NF_TARGET_TOS=m
440CONFIG_IP_NF_TARGET_ECN=m
441CONFIG_IP_NF_TARGET_TTL=m
442CONFIG_IP_NF_RAW=m
443CONFIG_IP_NF_ARPTABLES=m
444CONFIG_IP_NF_ARPFILTER=m
445CONFIG_IP_NF_ARP_MANGLE=m
446
447#
448# IPv6: Netfilter Configuration (EXPERIMENTAL)
449#
450CONFIG_IP6_NF_QUEUE=m
451CONFIG_IP6_NF_IPTABLES=m
452CONFIG_IP6_NF_MATCH_RT=m
453CONFIG_IP6_NF_MATCH_OPTS=m
454CONFIG_IP6_NF_MATCH_FRAG=m
455CONFIG_IP6_NF_MATCH_HL=m
456CONFIG_IP6_NF_MATCH_OWNER=m
457CONFIG_IP6_NF_MATCH_IPV6HEADER=m
458CONFIG_IP6_NF_MATCH_AH=m
459# CONFIG_IP6_NF_MATCH_MH is not set
460CONFIG_IP6_NF_MATCH_EUI64=m
461CONFIG_IP6_NF_FILTER=m
462CONFIG_IP6_NF_TARGET_LOG=m
463CONFIG_IP6_NF_TARGET_REJECT=m
464CONFIG_IP6_NF_MANGLE=m
465CONFIG_IP6_NF_TARGET_HL=m
466CONFIG_IP6_NF_RAW=m
467
468#
469# DECnet: Netfilter Configuration
470#
471CONFIG_DECNET_NF_GRABULATOR=m
472
473#
474# Bridge: Netfilter Configuration
475#
476CONFIG_BRIDGE_NF_EBTABLES=m
477CONFIG_BRIDGE_EBT_BROUTE=m
478CONFIG_BRIDGE_EBT_T_FILTER=m
479CONFIG_BRIDGE_EBT_T_NAT=m
480CONFIG_BRIDGE_EBT_802_3=m
481CONFIG_BRIDGE_EBT_AMONG=m
482CONFIG_BRIDGE_EBT_ARP=m
483CONFIG_BRIDGE_EBT_IP=m
484CONFIG_BRIDGE_EBT_LIMIT=m
485CONFIG_BRIDGE_EBT_MARK=m
486CONFIG_BRIDGE_EBT_PKTTYPE=m
487CONFIG_BRIDGE_EBT_STP=m
488CONFIG_BRIDGE_EBT_VLAN=m
489CONFIG_BRIDGE_EBT_ARPREPLY=m
490CONFIG_BRIDGE_EBT_DNAT=m
491CONFIG_BRIDGE_EBT_MARK_T=m
492CONFIG_BRIDGE_EBT_REDIRECT=m
493CONFIG_BRIDGE_EBT_SNAT=m
494CONFIG_BRIDGE_EBT_LOG=m
495CONFIG_BRIDGE_EBT_ULOG=m
496CONFIG_IP_DCCP=m
497CONFIG_INET_DCCP_DIAG=m
498CONFIG_IP_DCCP_ACKVEC=y
499
500#
501# DCCP CCIDs Configuration (EXPERIMENTAL)
502#
503CONFIG_IP_DCCP_CCID2=m
504# CONFIG_IP_DCCP_CCID2_DEBUG is not set
505CONFIG_IP_DCCP_CCID3=m
506CONFIG_IP_DCCP_TFRC_LIB=m
507# CONFIG_IP_DCCP_CCID3_DEBUG is not set
508CONFIG_IP_DCCP_CCID3_RTO=100
509CONFIG_IP_SCTP=m
510# CONFIG_SCTP_DBG_MSG is not set
511# CONFIG_SCTP_DBG_OBJCNT is not set
512# CONFIG_SCTP_HMAC_NONE is not set
513# CONFIG_SCTP_HMAC_SHA1 is not set
514CONFIG_SCTP_HMAC_MD5=y
515CONFIG_TIPC=m
516# CONFIG_TIPC_ADVANCED is not set
517# CONFIG_TIPC_DEBUG is not set
518CONFIG_ATM=y
519CONFIG_ATM_CLIP=y
520# CONFIG_ATM_CLIP_NO_ICMP is not set
521CONFIG_ATM_LANE=m
522CONFIG_ATM_MPOA=m
523CONFIG_ATM_BR2684=m
524# CONFIG_ATM_BR2684_IPFILTER is not set
525CONFIG_BRIDGE=m
526CONFIG_VLAN_8021Q=m
527CONFIG_DECNET=m
528# CONFIG_DECNET_ROUTER is not set
529CONFIG_LLC=y
530CONFIG_LLC2=m
531CONFIG_IPX=m
532# CONFIG_IPX_INTERN is not set
533CONFIG_ATALK=m
534CONFIG_DEV_APPLETALK=m
535CONFIG_IPDDP=m
536CONFIG_IPDDP_ENCAP=y
537CONFIG_IPDDP_DECAP=y
538CONFIG_X25=m
539CONFIG_LAPB=m
540CONFIG_ECONET=m
541CONFIG_ECONET_AUNUDP=y
542CONFIG_ECONET_NATIVE=y
543CONFIG_WAN_ROUTER=m
544
545#
546# QoS and/or fair queueing
547#
548CONFIG_NET_SCHED=y
549CONFIG_NET_SCH_FIFO=y
550
551#
552# Queueing/Scheduling
553#
554CONFIG_NET_SCH_CBQ=m
555CONFIG_NET_SCH_HTB=m
556CONFIG_NET_SCH_HFSC=m
557CONFIG_NET_SCH_ATM=m
558CONFIG_NET_SCH_PRIO=m
559# CONFIG_NET_SCH_RR is not set
560CONFIG_NET_SCH_RED=m
561CONFIG_NET_SCH_SFQ=m
562CONFIG_NET_SCH_TEQL=m
563CONFIG_NET_SCH_TBF=m
564CONFIG_NET_SCH_GRED=m
565CONFIG_NET_SCH_DSMARK=m
566CONFIG_NET_SCH_NETEM=m
567CONFIG_NET_SCH_INGRESS=m
568
569#
570# Classification
571#
572CONFIG_NET_CLS=y
573CONFIG_NET_CLS_BASIC=m
574CONFIG_NET_CLS_TCINDEX=m
575CONFIG_NET_CLS_ROUTE4=m
576CONFIG_NET_CLS_ROUTE=y
577CONFIG_NET_CLS_FW=m
578CONFIG_NET_CLS_U32=m
579# CONFIG_CLS_U32_PERF is not set
580CONFIG_CLS_U32_MARK=y
581CONFIG_NET_CLS_RSVP=m
582CONFIG_NET_CLS_RSVP6=m
583CONFIG_NET_EMATCH=y
584CONFIG_NET_EMATCH_STACK=32
585CONFIG_NET_EMATCH_CMP=m
586CONFIG_NET_EMATCH_NBYTE=m
587CONFIG_NET_EMATCH_U32=m
588CONFIG_NET_EMATCH_META=m
589CONFIG_NET_EMATCH_TEXT=m
590CONFIG_NET_CLS_ACT=y
591CONFIG_NET_ACT_POLICE=y
592# CONFIG_NET_ACT_GACT is not set
593# CONFIG_NET_ACT_MIRRED is not set
594# CONFIG_NET_ACT_IPT is not set
595# CONFIG_NET_ACT_PEDIT is not set
596# CONFIG_NET_ACT_SIMP is not set
597CONFIG_NET_CLS_POLICE=y
598# CONFIG_NET_CLS_IND is not set
599
600#
601# Network testing
602#
603CONFIG_NET_PKTGEN=m
604CONFIG_HAMRADIO=y
605
606#
607# Packet Radio protocols
608#
609CONFIG_AX25=m
610# CONFIG_AX25_DAMA_SLAVE is not set
611CONFIG_NETROM=m
612CONFIG_ROSE=m
613
614#
615# AX.25 network device drivers
616#
617CONFIG_MKISS=m
618CONFIG_6PACK=m
619CONFIG_BPQETHER=m
620CONFIG_BAYCOM_SER_FDX=m
621CONFIG_BAYCOM_SER_HDX=m
622CONFIG_BAYCOM_PAR=m
623CONFIG_BAYCOM_EPP=m
624CONFIG_YAM=m
625CONFIG_IRDA=m
626
627#
628# IrDA protocols
629#
630CONFIG_IRLAN=m
631CONFIG_IRNET=m
632CONFIG_IRCOMM=m
633CONFIG_IRDA_ULTRA=y
634
635#
636# IrDA options
637#
638CONFIG_IRDA_CACHE_LAST_LSAP=y
639CONFIG_IRDA_FAST_RR=y
640CONFIG_IRDA_DEBUG=y
641
642#
643# Infrared-port device drivers
644#
645
646#
647# SIR device drivers
648#
649CONFIG_IRTTY_SIR=m
650
651#
652# Dongle support
653#
654CONFIG_DONGLE=y
655CONFIG_ESI_DONGLE=m
656CONFIG_ACTISYS_DONGLE=m
657CONFIG_TEKRAM_DONGLE=m
658# CONFIG_TOIM3232_DONGLE is not set
659CONFIG_LITELINK_DONGLE=m
660CONFIG_MA600_DONGLE=m
661CONFIG_GIRBIL_DONGLE=m
662CONFIG_MCP2120_DONGLE=m
663CONFIG_OLD_BELKIN_DONGLE=m
664CONFIG_ACT200L_DONGLE=m
665# CONFIG_KINGSUN_DONGLE is not set
666
667#
668# Old SIR device drivers
669#
670# CONFIG_IRPORT_SIR is not set
671
672#
673# Old Serial dongle support
674#
675
676#
677# FIR device drivers
678#
679CONFIG_USB_IRDA=m
680CONFIG_SIGMATEL_FIR=m
681CONFIG_TOSHIBA_FIR=m
682CONFIG_VLSI_FIR=m
683CONFIG_MCS_FIR=m
684CONFIG_BT=m
685CONFIG_BT_L2CAP=m
686CONFIG_BT_SCO=m
687CONFIG_BT_RFCOMM=m
688CONFIG_BT_RFCOMM_TTY=y
689CONFIG_BT_BNEP=m
690CONFIG_BT_BNEP_MC_FILTER=y
691CONFIG_BT_BNEP_PROTO_FILTER=y
692CONFIG_BT_CMTP=m
693CONFIG_BT_HIDP=m
694
695#
696# Bluetooth device drivers
697#
698CONFIG_BT_HCIUSB=m
699CONFIG_BT_HCIUSB_SCO=y
700CONFIG_BT_HCIUART=m
701CONFIG_BT_HCIUART_H4=y
702CONFIG_BT_HCIUART_BCSP=y
703CONFIG_BT_HCIBCM203X=m
704CONFIG_BT_HCIBPA10X=m
705CONFIG_BT_HCIBFUSB=m
706CONFIG_BT_HCIDTL1=m
707CONFIG_BT_HCIBT3C=m
708CONFIG_BT_HCIBLUECARD=m
709CONFIG_BT_HCIBTUART=m
710CONFIG_BT_HCIVHCI=m
711CONFIG_AF_RXRPC=m
712# CONFIG_AF_RXRPC_DEBUG is not set
713# CONFIG_RXKAD is not set
714CONFIG_FIB_RULES=y
715
716#
717# Wireless
718#
719# CONFIG_CFG80211 is not set
720CONFIG_WIRELESS_EXT=y
721# CONFIG_MAC80211 is not set
722CONFIG_IEEE80211=m
723# CONFIG_IEEE80211_DEBUG is not set
724CONFIG_IEEE80211_CRYPT_WEP=m
725CONFIG_IEEE80211_CRYPT_CCMP=m
726CONFIG_IEEE80211_CRYPT_TKIP=m
727CONFIG_IEEE80211_SOFTMAC=m
728# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
729# CONFIG_RFKILL is not set
730# CONFIG_NET_9P is not set
731
732#
733# Device Drivers
734#
735
736#
737# Generic Driver Options
738#
739CONFIG_STANDALONE=y
740CONFIG_PREVENT_FIRMWARE_BUILD=y
741CONFIG_FW_LOADER=y
742# CONFIG_SYS_HYPERVISOR is not set
743CONFIG_CONNECTOR=m
744CONFIG_MTD=m
745# CONFIG_MTD_DEBUG is not set
746CONFIG_MTD_CONCAT=m
747CONFIG_MTD_PARTITIONS=y
748CONFIG_MTD_REDBOOT_PARTS=m
749CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
750# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
751# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
752
753#
754# User Modules And Translation Layers
755#
756CONFIG_MTD_CHAR=m
757CONFIG_MTD_BLKDEVS=m
758CONFIG_MTD_BLOCK=m
759CONFIG_MTD_BLOCK_RO=m
760CONFIG_FTL=m
761CONFIG_NFTL=m
762CONFIG_NFTL_RW=y
763CONFIG_INFTL=m
764CONFIG_RFD_FTL=m
765CONFIG_SSFDC=m
766
767#
768# RAM/ROM/Flash chip drivers
769#
770CONFIG_MTD_CFI=m
771CONFIG_MTD_JEDECPROBE=m
772CONFIG_MTD_GEN_PROBE=m
773# CONFIG_MTD_CFI_ADV_OPTIONS is not set
774CONFIG_MTD_MAP_BANK_WIDTH_1=y
775CONFIG_MTD_MAP_BANK_WIDTH_2=y
776CONFIG_MTD_MAP_BANK_WIDTH_4=y
777# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
778# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
779# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
780CONFIG_MTD_CFI_I1=y
781CONFIG_MTD_CFI_I2=y
782# CONFIG_MTD_CFI_I4 is not set
783# CONFIG_MTD_CFI_I8 is not set
784CONFIG_MTD_CFI_INTELEXT=m
785CONFIG_MTD_CFI_AMDSTD=m
786CONFIG_MTD_CFI_STAA=m
787CONFIG_MTD_CFI_UTIL=m
788CONFIG_MTD_RAM=m
789CONFIG_MTD_ROM=m
790CONFIG_MTD_ABSENT=m
791
792#
793# Mapping drivers for chip access
794#
795CONFIG_MTD_COMPLEX_MAPPINGS=y
796CONFIG_MTD_PHYSMAP=m
797CONFIG_MTD_PHYSMAP_START=0x8000000
798CONFIG_MTD_PHYSMAP_LEN=0x4000000
799CONFIG_MTD_PHYSMAP_BANKWIDTH=2
800# CONFIG_MTD_ALCHEMY is not set
801# CONFIG_MTD_MTX1 is not set
802CONFIG_MTD_PCI=m
803CONFIG_MTD_PLATRAM=m
804
805#
806# Self-contained MTD device drivers
807#
808CONFIG_MTD_PMC551=m
809# CONFIG_MTD_PMC551_BUGFIX is not set
810# CONFIG_MTD_PMC551_DEBUG is not set
811CONFIG_MTD_DATAFLASH=m
812CONFIG_MTD_M25P80=m
813CONFIG_MTD_SLRAM=m
814CONFIG_MTD_PHRAM=m
815CONFIG_MTD_MTDRAM=m
816CONFIG_MTDRAM_TOTAL_SIZE=4096
817CONFIG_MTDRAM_ERASE_SIZE=128
818CONFIG_MTD_BLOCK2MTD=m
819
820#
821# Disk-On-Chip Device Drivers
822#
823CONFIG_MTD_DOC2000=m
824CONFIG_MTD_DOC2001=m
825CONFIG_MTD_DOC2001PLUS=m
826CONFIG_MTD_DOCPROBE=m
827CONFIG_MTD_DOCECC=m
828# CONFIG_MTD_DOCPROBE_ADVANCED is not set
829CONFIG_MTD_DOCPROBE_ADDRESS=0
830CONFIG_MTD_NAND=m
831# CONFIG_MTD_NAND_VERIFY_WRITE is not set
832# CONFIG_MTD_NAND_ECC_SMC is not set
833# CONFIG_MTD_NAND_MUSEUM_IDS is not set
834CONFIG_MTD_NAND_IDS=m
835CONFIG_MTD_NAND_DISKONCHIP=m
836# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
837CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
838# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
839# CONFIG_MTD_NAND_CAFE is not set
840CONFIG_MTD_NAND_NANDSIM=m
841# CONFIG_MTD_NAND_PLATFORM is not set
842CONFIG_MTD_ONENAND=m
843CONFIG_MTD_ONENAND_VERIFY_WRITE=y
844# CONFIG_MTD_ONENAND_OTP is not set
845
846#
847# UBI - Unsorted block images
848#
849# CONFIG_MTD_UBI is not set
850CONFIG_PARPORT=m
851CONFIG_PARPORT_PC=m
852CONFIG_PARPORT_SERIAL=m
853CONFIG_PARPORT_PC_FIFO=y
854CONFIG_PARPORT_PC_SUPERIO=y
855CONFIG_PARPORT_PC_PCMCIA=m
856# CONFIG_PARPORT_GSC is not set
857CONFIG_PARPORT_AX88796=m
858CONFIG_PARPORT_1284=y
859CONFIG_PARPORT_NOT_PC=y
860CONFIG_BLK_DEV=y
861CONFIG_PARIDE=m
862
863#
864# Parallel IDE high-level drivers
865#
866CONFIG_PARIDE_PD=m
867CONFIG_PARIDE_PCD=m
868CONFIG_PARIDE_PF=m
869CONFIG_PARIDE_PT=m
870CONFIG_PARIDE_PG=m
871
872#
873# Parallel IDE protocol modules
874#
875CONFIG_PARIDE_ATEN=m
876CONFIG_PARIDE_BPCK=m
877CONFIG_PARIDE_BPCK6=m
878CONFIG_PARIDE_COMM=m
879CONFIG_PARIDE_DSTR=m
880CONFIG_PARIDE_FIT2=m
881CONFIG_PARIDE_FIT3=m
882CONFIG_PARIDE_EPAT=m
883CONFIG_PARIDE_EPATC8=y
884CONFIG_PARIDE_EPIA=m
885CONFIG_PARIDE_FRIQ=m
886CONFIG_PARIDE_FRPW=m
887CONFIG_PARIDE_KBIC=m
888CONFIG_PARIDE_KTTI=m
889CONFIG_PARIDE_ON20=m
890CONFIG_PARIDE_ON26=m
891CONFIG_BLK_CPQ_DA=m
892CONFIG_BLK_CPQ_CISS_DA=m
893CONFIG_CISS_SCSI_TAPE=y
894CONFIG_BLK_DEV_DAC960=m
895CONFIG_BLK_DEV_UMEM=m
896# CONFIG_BLK_DEV_COW_COMMON is not set
897CONFIG_BLK_DEV_LOOP=m
898CONFIG_BLK_DEV_CRYPTOLOOP=m
899CONFIG_BLK_DEV_NBD=m
900CONFIG_BLK_DEV_SX8=m
901# CONFIG_BLK_DEV_UB is not set
902CONFIG_BLK_DEV_RAM=y
903CONFIG_BLK_DEV_RAM_COUNT=16
904CONFIG_BLK_DEV_RAM_SIZE=65536
905CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
906CONFIG_CDROM_PKTCDVD=m
907CONFIG_CDROM_PKTCDVD_BUFFERS=8
908# CONFIG_CDROM_PKTCDVD_WCACHE is not set
909CONFIG_ATA_OVER_ETH=m
910CONFIG_MISC_DEVICES=y
911# CONFIG_PHANTOM is not set
912# CONFIG_EEPROM_93CX6 is not set
913CONFIG_SGI_IOC4=m
914CONFIG_TIFM_CORE=m
915CONFIG_TIFM_7XX1=m
916CONFIG_IDE=y
917CONFIG_IDE_MAX_HWIFS=4
918CONFIG_BLK_DEV_IDE=y
919
920#
921# Please see Documentation/ide.txt for help/info on IDE drives
922#
923# CONFIG_BLK_DEV_IDE_SATA is not set
924CONFIG_BLK_DEV_IDEDISK=m
925# CONFIG_IDEDISK_MULTI_MODE is not set
926CONFIG_BLK_DEV_IDECS=m
927# CONFIG_BLK_DEV_DELKIN is not set
928CONFIG_BLK_DEV_IDECD=m
929CONFIG_BLK_DEV_IDETAPE=m
930CONFIG_BLK_DEV_IDEFLOPPY=m
931CONFIG_BLK_DEV_IDESCSI=m
932# CONFIG_IDE_TASK_IOCTL is not set
933CONFIG_IDE_PROC_FS=y
934
935#
936# IDE chipset support/bugfixes
937#
938CONFIG_IDE_GENERIC=m
939CONFIG_BLK_DEV_IDEPCI=y
940CONFIG_IDEPCI_SHARE_IRQ=y
941CONFIG_IDEPCI_PCIBUS_ORDER=y
942# CONFIG_BLK_DEV_OFFBOARD is not set
943CONFIG_BLK_DEV_GENERIC=m
944CONFIG_BLK_DEV_OPTI621=m
945CONFIG_BLK_DEV_IDEDMA_PCI=y
946# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
947# CONFIG_IDEDMA_ONLYDISK is not set
948CONFIG_BLK_DEV_AEC62XX=m
949CONFIG_BLK_DEV_ALI15X3=m
950# CONFIG_WDC_ALI15X3 is not set
951CONFIG_BLK_DEV_AMD74XX=m
952CONFIG_BLK_DEV_CMD64X=m
953CONFIG_BLK_DEV_TRIFLEX=m
954CONFIG_BLK_DEV_CY82C693=m
955# CONFIG_BLK_DEV_CS5520 is not set
956CONFIG_BLK_DEV_CS5530=m
957CONFIG_BLK_DEV_HPT34X=m
958# CONFIG_HPT34X_AUTODMA is not set
959CONFIG_BLK_DEV_HPT366=m
960# CONFIG_BLK_DEV_JMICRON is not set
961CONFIG_BLK_DEV_SC1200=m
962CONFIG_BLK_DEV_PIIX=m
963# CONFIG_BLK_DEV_IT8213 is not set
964CONFIG_BLK_DEV_IT821X=m
965CONFIG_BLK_DEV_NS87415=m
966CONFIG_BLK_DEV_PDC202XX_OLD=m
967CONFIG_PDC202XX_BURST=y
968CONFIG_BLK_DEV_PDC202XX_NEW=m
969CONFIG_BLK_DEV_SVWKS=m
970CONFIG_BLK_DEV_SIIMAGE=m
971# CONFIG_BLK_DEV_SLC90E66 is not set
972CONFIG_BLK_DEV_TRM290=m
973# CONFIG_BLK_DEV_VIA82CXXX is not set
974# CONFIG_BLK_DEV_TC86C001 is not set
975# CONFIG_IDE_ARM is not set
976CONFIG_BLK_DEV_IDEDMA=y
977# CONFIG_IDEDMA_IVB is not set
978# CONFIG_BLK_DEV_HD is not set
979
980#
981# SCSI device support
982#
983CONFIG_RAID_ATTRS=m
984CONFIG_SCSI=m
985CONFIG_SCSI_DMA=y
986# CONFIG_SCSI_TGT is not set
987CONFIG_SCSI_NETLINK=y
988CONFIG_SCSI_PROC_FS=y
989
990#
991# SCSI support type (disk, tape, CD-ROM)
992#
993CONFIG_BLK_DEV_SD=m
994CONFIG_CHR_DEV_ST=m
995CONFIG_CHR_DEV_OSST=m
996CONFIG_BLK_DEV_SR=m
997# CONFIG_BLK_DEV_SR_VENDOR is not set
998CONFIG_CHR_DEV_SG=m
999CONFIG_CHR_DEV_SCH=m
1000
1001#
1002# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
1003#
1004CONFIG_SCSI_MULTI_LUN=y
1005CONFIG_SCSI_CONSTANTS=y
1006CONFIG_SCSI_LOGGING=y
1007# CONFIG_SCSI_SCAN_ASYNC is not set
1008CONFIG_SCSI_WAIT_SCAN=m
1009
1010#
1011# SCSI Transports
1012#
1013CONFIG_SCSI_SPI_ATTRS=m
1014CONFIG_SCSI_FC_ATTRS=m
1015CONFIG_SCSI_ISCSI_ATTRS=m
1016CONFIG_SCSI_SAS_ATTRS=m
1017CONFIG_SCSI_SAS_LIBSAS=m
1018# CONFIG_SCSI_SAS_ATA is not set
1019# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
1020CONFIG_SCSI_LOWLEVEL=y
1021CONFIG_ISCSI_TCP=m
1022CONFIG_BLK_DEV_3W_XXXX_RAID=m
1023CONFIG_SCSI_3W_9XXX=m
1024CONFIG_SCSI_ACARD=m
1025CONFIG_SCSI_AACRAID=m
1026CONFIG_SCSI_AIC7XXX=m
1027CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
1028CONFIG_AIC7XXX_RESET_DELAY_MS=15000
1029CONFIG_AIC7XXX_DEBUG_ENABLE=y
1030CONFIG_AIC7XXX_DEBUG_MASK=0
1031CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
1032# CONFIG_SCSI_AIC7XXX_OLD is not set
1033CONFIG_SCSI_AIC79XX=m
1034CONFIG_AIC79XX_CMDS_PER_DEVICE=32
1035CONFIG_AIC79XX_RESET_DELAY_MS=15000
1036CONFIG_AIC79XX_DEBUG_ENABLE=y
1037CONFIG_AIC79XX_DEBUG_MASK=0
1038CONFIG_AIC79XX_REG_PRETTY_PRINT=y
1039CONFIG_SCSI_AIC94XX=m
1040# CONFIG_AIC94XX_DEBUG is not set
1041CONFIG_SCSI_DPT_I2O=m
1042CONFIG_SCSI_ARCMSR=m
1043CONFIG_MEGARAID_NEWGEN=y
1044CONFIG_MEGARAID_MM=m
1045CONFIG_MEGARAID_MAILBOX=m
1046CONFIG_MEGARAID_LEGACY=m
1047CONFIG_MEGARAID_SAS=m
1048CONFIG_SCSI_HPTIOP=m
1049CONFIG_SCSI_DMX3191D=m
1050CONFIG_SCSI_FUTURE_DOMAIN=m
1051CONFIG_SCSI_IPS=m
1052CONFIG_SCSI_INITIO=m
1053# CONFIG_SCSI_INIA100 is not set
1054CONFIG_SCSI_PPA=m
1055CONFIG_SCSI_IMM=m
1056# CONFIG_SCSI_IZIP_EPP16 is not set
1057# CONFIG_SCSI_IZIP_SLOW_CTR is not set
1058CONFIG_SCSI_STEX=m
1059CONFIG_SCSI_SYM53C8XX_2=m
1060CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
1061CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
1062CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
1063CONFIG_SCSI_SYM53C8XX_MMIO=y
1064CONFIG_SCSI_IPR=m
1065# CONFIG_SCSI_IPR_TRACE is not set
1066# CONFIG_SCSI_IPR_DUMP is not set
1067CONFIG_SCSI_QLOGIC_1280=m
1068CONFIG_SCSI_QLA_FC=m
1069CONFIG_SCSI_QLA_ISCSI=m
1070CONFIG_SCSI_LPFC=m
1071CONFIG_SCSI_DC395x=m
1072CONFIG_SCSI_DC390T=m
1073CONFIG_SCSI_NSP32=m
1074CONFIG_SCSI_DEBUG=m
1075# CONFIG_SCSI_SRP is not set
1076# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
1077CONFIG_ATA=m
1078# CONFIG_ATA_NONSTANDARD is not set
1079CONFIG_SATA_AHCI=m
1080CONFIG_SATA_SVW=m
1081CONFIG_ATA_PIIX=m
1082CONFIG_SATA_MV=m
1083CONFIG_SATA_NV=m
1084CONFIG_PDC_ADMA=m
1085CONFIG_SATA_QSTOR=m
1086CONFIG_SATA_PROMISE=m
1087CONFIG_SATA_SX4=m
1088CONFIG_SATA_SIL=m
1089CONFIG_SATA_SIL24=m
1090CONFIG_SATA_SIS=m
1091CONFIG_SATA_ULI=m
1092CONFIG_SATA_VIA=m
1093CONFIG_SATA_VITESSE=m
1094# CONFIG_SATA_INIC162X is not set
1095# CONFIG_PATA_ALI is not set
1096# CONFIG_PATA_AMD is not set
1097# CONFIG_PATA_ARTOP is not set
1098# CONFIG_PATA_ATIIXP is not set
1099# CONFIG_PATA_CMD640_PCI is not set
1100# CONFIG_PATA_CMD64X is not set
1101CONFIG_PATA_CS5520=m
1102# CONFIG_PATA_CS5530 is not set
1103# CONFIG_PATA_CYPRESS is not set
1104CONFIG_PATA_EFAR=m
1105CONFIG_ATA_GENERIC=m
1106# CONFIG_PATA_HPT366 is not set
1107# CONFIG_PATA_HPT37X is not set
1108# CONFIG_PATA_HPT3X2N is not set
1109# CONFIG_PATA_HPT3X3 is not set
1110# CONFIG_PATA_IT821X is not set
1111# CONFIG_PATA_IT8213 is not set
1112CONFIG_PATA_JMICRON=m
1113CONFIG_PATA_TRIFLEX=m
1114# CONFIG_PATA_MARVELL is not set
1115CONFIG_PATA_MPIIX=m
1116# CONFIG_PATA_OLDPIIX is not set
1117CONFIG_PATA_NETCELL=m
1118# CONFIG_PATA_NS87410 is not set
1119# CONFIG_PATA_OPTI is not set
1120# CONFIG_PATA_OPTIDMA is not set
1121CONFIG_PATA_PCMCIA=m
1122# CONFIG_PATA_PDC_OLD is not set
1123# CONFIG_PATA_RADISYS is not set
1124CONFIG_PATA_RZ1000=m
1125# CONFIG_PATA_SC1200 is not set
1126# CONFIG_PATA_SERVERWORKS is not set
1127CONFIG_PATA_PDC2027X=m
1128CONFIG_PATA_SIL680=m
1129CONFIG_PATA_SIS=m
1130CONFIG_PATA_VIA=m
1131CONFIG_PATA_WINBOND=m
1132# CONFIG_PATA_PLATFORM is not set
1133CONFIG_MD=y
1134CONFIG_BLK_DEV_MD=m
1135CONFIG_MD_LINEAR=m
1136CONFIG_MD_RAID0=m
1137CONFIG_MD_RAID1=m
1138CONFIG_MD_RAID10=m
1139CONFIG_MD_RAID456=m
1140# CONFIG_MD_RAID5_RESHAPE is not set
1141CONFIG_MD_MULTIPATH=m
1142CONFIG_MD_FAULTY=m
1143CONFIG_BLK_DEV_DM=m
1144# CONFIG_DM_DEBUG is not set
1145CONFIG_DM_CRYPT=m
1146CONFIG_DM_SNAPSHOT=m
1147CONFIG_DM_MIRROR=m
1148CONFIG_DM_ZERO=m
1149CONFIG_DM_MULTIPATH=m
1150CONFIG_DM_MULTIPATH_EMC=m
1151# CONFIG_DM_MULTIPATH_RDAC is not set
1152# CONFIG_DM_DELAY is not set
1153
1154#
1155# Fusion MPT device support
1156#
1157CONFIG_FUSION=y
1158CONFIG_FUSION_SPI=m
1159CONFIG_FUSION_FC=m
1160CONFIG_FUSION_SAS=m
1161CONFIG_FUSION_MAX_SGE=128
1162CONFIG_FUSION_CTL=m
1163CONFIG_FUSION_LAN=m
1164# CONFIG_FUSION_LOGGING is not set
1165
1166#
1167# IEEE 1394 (FireWire) support
1168#
1169# CONFIG_FIREWIRE is not set
1170CONFIG_IEEE1394=m
1171
1172#
1173# Subsystem Options
1174#
1175# CONFIG_IEEE1394_VERBOSEDEBUG is not set
1176
1177#
1178# Controllers
1179#
1180CONFIG_IEEE1394_PCILYNX=m
1181CONFIG_IEEE1394_OHCI1394=m
1182
1183#
1184# Protocols
1185#
1186CONFIG_IEEE1394_VIDEO1394=m
1187CONFIG_IEEE1394_SBP2=m
1188# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
1189CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
1190CONFIG_IEEE1394_ETH1394=m
1191CONFIG_IEEE1394_DV1394=m
1192CONFIG_IEEE1394_RAWIO=m
1193CONFIG_I2O=m
1194CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
1195CONFIG_I2O_EXT_ADAPTEC=y
1196CONFIG_I2O_CONFIG=m
1197CONFIG_I2O_CONFIG_OLD_IOCTL=y
1198CONFIG_I2O_BUS=m
1199CONFIG_I2O_BLOCK=m
1200CONFIG_I2O_SCSI=m
1201CONFIG_I2O_PROC=m
1202CONFIG_NETDEVICES=y
1203# CONFIG_NETDEVICES_MULTIQUEUE is not set
1204# CONFIG_IFB is not set
1205CONFIG_DUMMY=m
1206CONFIG_BONDING=m
1207# CONFIG_MACVLAN is not set
1208CONFIG_EQUALIZER=m
1209CONFIG_TUN=m
1210CONFIG_ARCNET=m
1211CONFIG_ARCNET_1201=m
1212CONFIG_ARCNET_1051=m
1213CONFIG_ARCNET_RAW=m
1214CONFIG_ARCNET_CAP=m
1215CONFIG_ARCNET_COM90xx=m
1216CONFIG_ARCNET_COM90xxIO=m
1217CONFIG_ARCNET_RIM_I=m
1218CONFIG_ARCNET_COM20020=m
1219CONFIG_ARCNET_COM20020_PCI=m
1220CONFIG_PHYLIB=m
1221
1222#
1223# MII PHY device drivers
1224#
1225CONFIG_MARVELL_PHY=m
1226CONFIG_DAVICOM_PHY=m
1227CONFIG_QSEMI_PHY=m
1228CONFIG_LXT_PHY=m
1229CONFIG_CICADA_PHY=m
1230CONFIG_VITESSE_PHY=m
1231CONFIG_SMSC_PHY=m
1232# CONFIG_BROADCOM_PHY is not set
1233# CONFIG_ICPLUS_PHY is not set
1234CONFIG_FIXED_PHY=m
1235# CONFIG_FIXED_MII_10_FDX is not set
1236# CONFIG_FIXED_MII_100_FDX is not set
1237CONFIG_NET_ETHERNET=y
1238CONFIG_MII=m
1239# CONFIG_AX88796 is not set
1240# CONFIG_MIPS_AU1X00_ENET is not set
1241CONFIG_HAPPYMEAL=m
1242CONFIG_SUNGEM=m
1243CONFIG_CASSINI=m
1244CONFIG_NET_VENDOR_3COM=y
1245CONFIG_VORTEX=m
1246CONFIG_TYPHOON=m
1247# CONFIG_SMC91X is not set
1248# CONFIG_DM9000 is not set
1249CONFIG_NET_TULIP=y
1250CONFIG_DE2104X=m
1251CONFIG_TULIP=m
1252# CONFIG_TULIP_MWI is not set
1253# CONFIG_TULIP_MMIO is not set
1254# CONFIG_TULIP_NAPI is not set
1255CONFIG_DE4X5=m
1256CONFIG_WINBOND_840=m
1257CONFIG_DM9102=m
1258CONFIG_ULI526X=m
1259CONFIG_PCMCIA_XIRCOM=m
1260# CONFIG_PCMCIA_XIRTULIP is not set
1261CONFIG_HP100=m
1262CONFIG_NET_PCI=y
1263CONFIG_PCNET32=m
1264# CONFIG_PCNET32_NAPI is not set
1265CONFIG_AMD8111_ETH=m
1266# CONFIG_AMD8111E_NAPI is not set
1267CONFIG_ADAPTEC_STARFIRE=m
1268# CONFIG_ADAPTEC_STARFIRE_NAPI is not set
1269CONFIG_B44=m
1270CONFIG_FORCEDETH=m
1271# CONFIG_FORCEDETH_NAPI is not set
1272# CONFIG_TC35815 is not set
1273CONFIG_DGRS=m
1274CONFIG_EEPRO100=m
1275CONFIG_E100=m
1276CONFIG_FEALNX=m
1277CONFIG_NATSEMI=m
1278CONFIG_NE2K_PCI=m
1279CONFIG_8139CP=m
1280CONFIG_8139TOO=m
1281# CONFIG_8139TOO_PIO is not set
1282# CONFIG_8139TOO_TUNE_TWISTER is not set
1283CONFIG_8139TOO_8129=y
1284# CONFIG_8139_OLD_RX_RESET is not set
1285CONFIG_SIS900=m
1286CONFIG_EPIC100=m
1287CONFIG_SUNDANCE=m
1288# CONFIG_SUNDANCE_MMIO is not set
1289CONFIG_TLAN=m
1290CONFIG_VIA_RHINE=m
1291# CONFIG_VIA_RHINE_MMIO is not set
1292# CONFIG_VIA_RHINE_NAPI is not set
1293# CONFIG_SC92031 is not set
1294CONFIG_NET_POCKET=y
1295CONFIG_DE600=m
1296CONFIG_DE620=m
1297CONFIG_NETDEV_1000=y
1298CONFIG_ACENIC=m
1299# CONFIG_ACENIC_OMIT_TIGON_I is not set
1300CONFIG_DL2K=m
1301CONFIG_E1000=m
1302# CONFIG_E1000_NAPI is not set
1303# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
1304CONFIG_NS83820=m
1305CONFIG_HAMACHI=m
1306CONFIG_YELLOWFIN=m
1307CONFIG_R8169=m
1308# CONFIG_R8169_NAPI is not set
1309CONFIG_R8169_VLAN=y
1310CONFIG_SIS190=m
1311CONFIG_SKGE=m
1312CONFIG_SKY2=m
1313CONFIG_SK98LIN=m
1314CONFIG_VIA_VELOCITY=m
1315CONFIG_TIGON3=m
1316CONFIG_BNX2=m
1317CONFIG_QLA3XXX=m
1318# CONFIG_ATL1 is not set
1319CONFIG_NETDEV_10000=y
1320CONFIG_CHELSIO_T1=m
1321# CONFIG_CHELSIO_T1_1G is not set
1322CONFIG_CHELSIO_T1_NAPI=y
1323# CONFIG_CHELSIO_T3 is not set
1324CONFIG_IXGB=m
1325# CONFIG_IXGB_NAPI is not set
1326CONFIG_S2IO=m
1327# CONFIG_S2IO_NAPI is not set
1328CONFIG_MYRI10GE=m
1329# CONFIG_NETXEN_NIC is not set
1330# CONFIG_MLX4_CORE is not set
1331CONFIG_TR=y
1332CONFIG_IBMOL=m
1333CONFIG_IBMLS=m
1334CONFIG_3C359=m
1335CONFIG_TMS380TR=m
1336CONFIG_TMSPCI=m
1337CONFIG_ABYSS=m
1338
1339#
1340# Wireless LAN
1341#
1342# CONFIG_WLAN_PRE80211 is not set
1343# CONFIG_WLAN_80211 is not set
1344
1345#
1346# USB Network Adapters
1347#
1348CONFIG_USB_CATC=m
1349CONFIG_USB_KAWETH=m
1350CONFIG_USB_PEGASUS=m
1351CONFIG_USB_RTL8150=m
1352CONFIG_USB_USBNET_MII=m
1353CONFIG_USB_USBNET=m
1354CONFIG_USB_NET_AX8817X=m
1355CONFIG_USB_NET_CDCETHER=m
1356# CONFIG_USB_NET_DM9601 is not set
1357CONFIG_USB_NET_GL620A=m
1358CONFIG_USB_NET_NET1080=m
1359CONFIG_USB_NET_PLUSB=m
1360CONFIG_USB_NET_MCS7830=m
1361CONFIG_USB_NET_RNDIS_HOST=m
1362CONFIG_USB_NET_CDC_SUBSET=m
1363CONFIG_USB_ALI_M5632=y
1364CONFIG_USB_AN2720=y
1365CONFIG_USB_BELKIN=y
1366CONFIG_USB_ARMLINUX=y
1367CONFIG_USB_EPSON2888=y
1368# CONFIG_USB_KC2190 is not set
1369CONFIG_USB_NET_ZAURUS=m
1370CONFIG_NET_PCMCIA=y
1371CONFIG_PCMCIA_3C589=m
1372CONFIG_PCMCIA_3C574=m
1373CONFIG_PCMCIA_FMVJ18X=m
1374CONFIG_PCMCIA_PCNET=m
1375CONFIG_PCMCIA_NMCLAN=m
1376CONFIG_PCMCIA_SMC91C92=m
1377CONFIG_PCMCIA_XIRC2PS=m
1378CONFIG_PCMCIA_AXNET=m
1379CONFIG_ARCNET_COM20020_CS=m
1380CONFIG_PCMCIA_IBMTR=m
1381CONFIG_WAN=y
1382CONFIG_LANMEDIA=m
1383CONFIG_HDLC=m
1384CONFIG_HDLC_RAW=m
1385CONFIG_HDLC_RAW_ETH=m
1386CONFIG_HDLC_CISCO=m
1387CONFIG_HDLC_FR=m
1388CONFIG_HDLC_PPP=m
1389CONFIG_HDLC_X25=m
1390CONFIG_PCI200SYN=m
1391CONFIG_WANXL=m
1392CONFIG_PC300=m
1393CONFIG_PC300_MLPPP=y
1394
1395#
1396# Cyclades-PC300 MLPPP support is disabled.
1397#
1398
1399#
1400# Refer to the file README.mlppp, provided by PC300 package.
1401#
1402# CONFIG_PC300TOO is not set
1403CONFIG_FARSYNC=m
1404CONFIG_DSCC4=m
1405CONFIG_DSCC4_PCISYNC=y
1406CONFIG_DSCC4_PCI_RST=y
1407CONFIG_DLCI=m
1408CONFIG_DLCI_MAX=8
1409CONFIG_WAN_ROUTER_DRIVERS=m
1410CONFIG_CYCLADES_SYNC=m
1411CONFIG_CYCLOMX_X25=y
1412CONFIG_LAPBETHER=m
1413CONFIG_X25_ASY=m
1414CONFIG_ATM_DRIVERS=y
1415# CONFIG_ATM_DUMMY is not set
1416CONFIG_ATM_TCP=m
1417CONFIG_ATM_LANAI=m
1418CONFIG_ATM_ENI=m
1419# CONFIG_ATM_ENI_DEBUG is not set
1420# CONFIG_ATM_ENI_TUNE_BURST is not set
1421CONFIG_ATM_FIRESTREAM=m
1422CONFIG_ATM_ZATM=m
1423# CONFIG_ATM_ZATM_DEBUG is not set
1424CONFIG_ATM_NICSTAR=m
1425# CONFIG_ATM_NICSTAR_USE_SUNI is not set
1426# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set
1427CONFIG_ATM_IDT77252=m
1428# CONFIG_ATM_IDT77252_DEBUG is not set
1429# CONFIG_ATM_IDT77252_RCV_ALL is not set
1430CONFIG_ATM_IDT77252_USE_SUNI=y
1431CONFIG_ATM_AMBASSADOR=m
1432# CONFIG_ATM_AMBASSADOR_DEBUG is not set
1433CONFIG_ATM_HORIZON=m
1434# CONFIG_ATM_HORIZON_DEBUG is not set
1435CONFIG_ATM_IA=m
1436# CONFIG_ATM_IA_DEBUG is not set
1437CONFIG_ATM_FORE200E_MAYBE=m
1438CONFIG_ATM_FORE200E_PCA=y
1439CONFIG_ATM_FORE200E_PCA_DEFAULT_FW=y
1440# CONFIG_ATM_FORE200E_USE_TASKLET is not set
1441CONFIG_ATM_FORE200E_TX_RETRY=16
1442CONFIG_ATM_FORE200E_DEBUG=0
1443CONFIG_ATM_FORE200E=m
1444CONFIG_ATM_HE=m
1445CONFIG_ATM_HE_USE_SUNI=y
1446CONFIG_FDDI=y
1447CONFIG_DEFXX=m
1448# CONFIG_DEFXX_MMIO is not set
1449CONFIG_SKFP=m
1450CONFIG_HIPPI=y
1451CONFIG_ROADRUNNER=m
1452# CONFIG_ROADRUNNER_LARGE_RINGS is not set
1453CONFIG_PLIP=m
1454CONFIG_PPP=m
1455CONFIG_PPP_MULTILINK=y
1456CONFIG_PPP_FILTER=y
1457CONFIG_PPP_ASYNC=m
1458CONFIG_PPP_SYNC_TTY=m
1459CONFIG_PPP_DEFLATE=m
1460CONFIG_PPP_BSDCOMP=m
1461CONFIG_PPP_MPPE=m
1462CONFIG_PPPOE=m
1463CONFIG_PPPOATM=m
1464# CONFIG_PPPOL2TP is not set
1465CONFIG_SLIP=m
1466CONFIG_SLIP_COMPRESSED=y
1467CONFIG_SLHC=m
1468CONFIG_SLIP_SMART=y
1469CONFIG_SLIP_MODE_SLIP6=y
1470CONFIG_NET_FC=y
1471CONFIG_SHAPER=m
1472CONFIG_NETCONSOLE=m
1473CONFIG_NETPOLL=y
1474# CONFIG_NETPOLL_TRAP is not set
1475CONFIG_NET_POLL_CONTROLLER=y
1476CONFIG_ISDN=m
1477CONFIG_ISDN_I4L=m
1478CONFIG_ISDN_PPP=y
1479CONFIG_ISDN_PPP_VJ=y
1480CONFIG_ISDN_MPP=y
1481CONFIG_IPPP_FILTER=y
1482CONFIG_ISDN_PPP_BSDCOMP=m
1483CONFIG_ISDN_AUDIO=y
1484CONFIG_ISDN_TTY_FAX=y
1485CONFIG_ISDN_X25=y
1486
1487#
1488# ISDN feature submodules
1489#
1490# CONFIG_ISDN_DRV_LOOP is not set
1491CONFIG_ISDN_DIVERSION=m
1492
1493#
1494# ISDN4Linux hardware drivers
1495#
1496
1497#
1498# Passive cards
1499#
1500CONFIG_ISDN_DRV_HISAX=m
1501
1502#
1503# D-channel protocol features
1504#
1505CONFIG_HISAX_EURO=y
1506CONFIG_DE_AOC=y
1507# CONFIG_HISAX_NO_SENDCOMPLETE is not set
1508# CONFIG_HISAX_NO_LLC is not set
1509# CONFIG_HISAX_NO_KEYPAD is not set
1510CONFIG_HISAX_1TR6=y
1511CONFIG_HISAX_NI1=y
1512CONFIG_HISAX_MAX_CARDS=8
1513
1514#
1515# HiSax supported cards
1516#
1517CONFIG_HISAX_16_3=y
1518CONFIG_HISAX_TELESPCI=y
1519CONFIG_HISAX_S0BOX=y
1520CONFIG_HISAX_FRITZPCI=y
1521CONFIG_HISAX_AVM_A1_PCMCIA=y
1522CONFIG_HISAX_ELSA=y
1523CONFIG_HISAX_DIEHLDIVA=y
1524CONFIG_HISAX_SEDLBAUER=y
1525CONFIG_HISAX_NETJET=y
1526CONFIG_HISAX_NETJET_U=y
1527CONFIG_HISAX_NICCY=y
1528CONFIG_HISAX_BKM_A4T=y
1529CONFIG_HISAX_SCT_QUADRO=y
1530CONFIG_HISAX_GAZEL=y
1531CONFIG_HISAX_HFC_PCI=y
1532CONFIG_HISAX_W6692=y
1533CONFIG_HISAX_HFC_SX=y
1534CONFIG_HISAX_ENTERNOW_PCI=y
1535# CONFIG_HISAX_DEBUG is not set
1536
1537#
1538# HiSax PCMCIA card service modules
1539#
1540CONFIG_HISAX_SEDLBAUER_CS=m
1541CONFIG_HISAX_ELSA_CS=m
1542CONFIG_HISAX_AVM_A1_CS=m
1543CONFIG_HISAX_TELES_CS=m
1544
1545#
1546# HiSax sub driver modules
1547#
1548CONFIG_HISAX_ST5481=m
1549CONFIG_HISAX_HFCUSB=m
1550CONFIG_HISAX_HFC4S8S=m
1551CONFIG_HISAX_FRITZ_PCIPNP=m
1552CONFIG_HISAX_HDLC=y
1553
1554#
1555# Active cards
1556#
1557# CONFIG_HYSDN is not set
1558CONFIG_ISDN_DRV_GIGASET=m
1559CONFIG_GIGASET_BASE=m
1560CONFIG_GIGASET_M105=m
1561# CONFIG_GIGASET_M101 is not set
1562# CONFIG_GIGASET_DEBUG is not set
1563# CONFIG_GIGASET_UNDOCREQ is not set
1564CONFIG_ISDN_CAPI=m
1565CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
1566CONFIG_CAPI_TRACE=y
1567CONFIG_ISDN_CAPI_MIDDLEWARE=y
1568CONFIG_ISDN_CAPI_CAPI20=m
1569CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
1570CONFIG_ISDN_CAPI_CAPIFS=m
1571CONFIG_ISDN_CAPI_CAPIDRV=m
1572
1573#
1574# CAPI hardware drivers
1575#
1576CONFIG_CAPI_AVM=y
1577CONFIG_ISDN_DRV_AVMB1_B1PCI=m
1578CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y
1579CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
1580CONFIG_ISDN_DRV_AVMB1_AVM_CS=m
1581CONFIG_ISDN_DRV_AVMB1_T1PCI=m
1582CONFIG_ISDN_DRV_AVMB1_C4=m
1583CONFIG_CAPI_EICON=y
1584CONFIG_ISDN_DIVAS=m
1585CONFIG_ISDN_DIVAS_BRIPCI=y
1586CONFIG_ISDN_DIVAS_PRIPCI=y
1587CONFIG_ISDN_DIVAS_DIVACAPI=m
1588CONFIG_ISDN_DIVAS_USERIDI=m
1589CONFIG_ISDN_DIVAS_MAINT=m
1590CONFIG_PHONE=m
1591CONFIG_PHONE_IXJ=m
1592CONFIG_PHONE_IXJ_PCMCIA=m
1593
1594#
1595# Input device support
1596#
1597CONFIG_INPUT=y
1598CONFIG_INPUT_FF_MEMLESS=m
1599# CONFIG_INPUT_POLLDEV is not set
1600
1601#
1602# Userland interfaces
1603#
1604CONFIG_INPUT_MOUSEDEV=y
1605CONFIG_INPUT_MOUSEDEV_PSAUX=y
1606CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
1607CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
1608CONFIG_INPUT_JOYDEV=m
1609CONFIG_INPUT_TSDEV=m
1610CONFIG_INPUT_TSDEV_SCREEN_X=240
1611CONFIG_INPUT_TSDEV_SCREEN_Y=320
1612CONFIG_INPUT_EVDEV=m
1613CONFIG_INPUT_EVBUG=m
1614
1615#
1616# Input Device Drivers
1617#
1618CONFIG_INPUT_KEYBOARD=y
1619CONFIG_KEYBOARD_ATKBD=y
1620CONFIG_KEYBOARD_SUNKBD=m
1621CONFIG_KEYBOARD_LKKBD=m
1622CONFIG_KEYBOARD_XTKBD=m
1623CONFIG_KEYBOARD_NEWTON=m
1624CONFIG_KEYBOARD_STOWAWAY=m
1625CONFIG_INPUT_MOUSE=y
1626CONFIG_MOUSE_PS2=m
1627CONFIG_MOUSE_PS2_ALPS=y
1628CONFIG_MOUSE_PS2_LOGIPS2PP=y
1629CONFIG_MOUSE_PS2_SYNAPTICS=y
1630CONFIG_MOUSE_PS2_LIFEBOOK=y
1631CONFIG_MOUSE_PS2_TRACKPOINT=y
1632# CONFIG_MOUSE_PS2_TOUCHKIT is not set
1633CONFIG_MOUSE_SERIAL=m
1634# CONFIG_MOUSE_APPLETOUCH is not set
1635CONFIG_MOUSE_VSXXXAA=m
1636CONFIG_INPUT_JOYSTICK=y
1637CONFIG_JOYSTICK_ANALOG=m
1638CONFIG_JOYSTICK_A3D=m
1639CONFIG_JOYSTICK_ADI=m
1640CONFIG_JOYSTICK_COBRA=m
1641CONFIG_JOYSTICK_GF2K=m
1642CONFIG_JOYSTICK_GRIP=m
1643CONFIG_JOYSTICK_GRIP_MP=m
1644CONFIG_JOYSTICK_GUILLEMOT=m
1645CONFIG_JOYSTICK_INTERACT=m
1646CONFIG_JOYSTICK_SIDEWINDER=m
1647CONFIG_JOYSTICK_TMDC=m
1648CONFIG_JOYSTICK_IFORCE=m
1649CONFIG_JOYSTICK_IFORCE_USB=y
1650CONFIG_JOYSTICK_IFORCE_232=y
1651CONFIG_JOYSTICK_WARRIOR=m
1652CONFIG_JOYSTICK_MAGELLAN=m
1653CONFIG_JOYSTICK_SPACEORB=m
1654CONFIG_JOYSTICK_SPACEBALL=m
1655CONFIG_JOYSTICK_STINGER=m
1656CONFIG_JOYSTICK_TWIDJOY=m
1657CONFIG_JOYSTICK_DB9=m
1658CONFIG_JOYSTICK_GAMECON=m
1659CONFIG_JOYSTICK_TURBOGRAFX=m
1660CONFIG_JOYSTICK_JOYDUMP=m
1661# CONFIG_JOYSTICK_XPAD is not set
1662# CONFIG_INPUT_TABLET is not set
1663CONFIG_INPUT_TOUCHSCREEN=y
1664CONFIG_TOUCHSCREEN_ADS7846=m
1665# CONFIG_TOUCHSCREEN_FUJITSU is not set
1666CONFIG_TOUCHSCREEN_GUNZE=m
1667CONFIG_TOUCHSCREEN_ELO=m
1668CONFIG_TOUCHSCREEN_MTOUCH=m
1669CONFIG_TOUCHSCREEN_MK712=m
1670CONFIG_TOUCHSCREEN_PENMOUNT=m
1671CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
1672CONFIG_TOUCHSCREEN_TOUCHWIN=m
1673# CONFIG_TOUCHSCREEN_UCB1400 is not set
1674# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1675CONFIG_INPUT_MISC=y
1676CONFIG_INPUT_PCSPKR=m
1677# CONFIG_INPUT_ATI_REMOTE is not set
1678# CONFIG_INPUT_ATI_REMOTE2 is not set
1679# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1680# CONFIG_INPUT_POWERMATE is not set
1681# CONFIG_INPUT_YEALINK is not set
1682CONFIG_INPUT_UINPUT=m
1683
1684#
1685# Hardware I/O ports
1686#
1687CONFIG_SERIO=y
1688CONFIG_SERIO_I8042=y
1689CONFIG_SERIO_SERPORT=m
1690CONFIG_SERIO_PARKBD=m
1691CONFIG_SERIO_PCIPS2=m
1692CONFIG_SERIO_LIBPS2=y
1693CONFIG_SERIO_RAW=m
1694CONFIG_GAMEPORT=m
1695CONFIG_GAMEPORT_NS558=m
1696CONFIG_GAMEPORT_L4=m
1697CONFIG_GAMEPORT_EMU10K1=m
1698CONFIG_GAMEPORT_FM801=m
1699
1700#
1701# Character devices
1702#
1703CONFIG_VT=y
1704CONFIG_VT_CONSOLE=y
1705CONFIG_HW_CONSOLE=y
1706CONFIG_VT_HW_CONSOLE_BINDING=y
1707CONFIG_SERIAL_NONSTANDARD=y
1708# CONFIG_COMPUTONE is not set
1709CONFIG_ROCKETPORT=m
1710CONFIG_CYCLADES=m
1711# CONFIG_CYZ_INTR is not set
1712CONFIG_DIGIEPCA=m
1713# CONFIG_MOXA_INTELLIO is not set
1714CONFIG_MOXA_SMARTIO=m
1715# CONFIG_MOXA_SMARTIO_NEW is not set
1716# CONFIG_ISI is not set
1717CONFIG_SYNCLINKMP=m
1718CONFIG_SYNCLINK_GT=m
1719CONFIG_N_HDLC=m
1720# CONFIG_RISCOM8 is not set
1721CONFIG_SPECIALIX=m
1722# CONFIG_SPECIALIX_RTSCTS is not set
1723CONFIG_SX=m
1724# CONFIG_RIO is not set
1725CONFIG_STALDRV=y
1726# CONFIG_STALLION is not set
1727# CONFIG_ISTALLION is not set
1728
1729#
1730# Serial drivers
1731#
1732CONFIG_SERIAL_8250=m
1733CONFIG_SERIAL_8250_PCI=m
1734CONFIG_SERIAL_8250_CS=m
1735CONFIG_SERIAL_8250_NR_UARTS=48
1736CONFIG_SERIAL_8250_RUNTIME_UARTS=4
1737CONFIG_SERIAL_8250_EXTENDED=y
1738CONFIG_SERIAL_8250_MANY_PORTS=y
1739CONFIG_SERIAL_8250_SHARE_IRQ=y
1740# CONFIG_SERIAL_8250_DETECT_IRQ is not set
1741CONFIG_SERIAL_8250_RSA=y
1742# CONFIG_SERIAL_8250_AU1X00 is not set
1743
1744#
1745# Non-8250 serial port support
1746#
1747CONFIG_SERIAL_CORE=m
1748CONFIG_SERIAL_JSM=m
1749CONFIG_UNIX98_PTYS=y
1750CONFIG_LEGACY_PTYS=y
1751CONFIG_LEGACY_PTY_COUNT=256
1752CONFIG_PRINTER=m
1753# CONFIG_LP_CONSOLE is not set
1754CONFIG_PPDEV=m
1755CONFIG_TIPAR=m
1756CONFIG_IPMI_HANDLER=m
1757# CONFIG_IPMI_PANIC_EVENT is not set
1758CONFIG_IPMI_DEVICE_INTERFACE=m
1759CONFIG_IPMI_SI=m
1760CONFIG_IPMI_WATCHDOG=m
1761CONFIG_IPMI_POWEROFF=m
1762CONFIG_WATCHDOG=y
1763# CONFIG_WATCHDOG_NOWAYOUT is not set
1764
1765#
1766# Watchdog Device Drivers
1767#
1768CONFIG_SOFT_WATCHDOG=m
1769# CONFIG_WDT_MTX1 is not set
1770
1771#
1772# PCI-based Watchdog Cards
1773#
1774CONFIG_PCIPCWATCHDOG=m
1775CONFIG_WDTPCI=m
1776CONFIG_WDT_501_PCI=y
1777
1778#
1779# USB-based Watchdog Cards
1780#
1781CONFIG_USBPCWATCHDOG=m
1782CONFIG_HW_RANDOM=y
1783CONFIG_RTC=y
1784CONFIG_R3964=m
1785CONFIG_APPLICOM=m
1786CONFIG_DRM=m
1787CONFIG_DRM_TDFX=m
1788CONFIG_DRM_R128=m
1789CONFIG_DRM_RADEON=m
1790CONFIG_DRM_MGA=m
1791CONFIG_DRM_VIA=m
1792CONFIG_DRM_SAVAGE=m
1793
1794#
1795# PCMCIA character devices
1796#
1797CONFIG_SYNCLINK_CS=m
1798CONFIG_CARDMAN_4000=m
1799CONFIG_CARDMAN_4040=m
1800CONFIG_RAW_DRIVER=m
1801CONFIG_MAX_RAW_DEVS=256
1802CONFIG_TCG_TPM=m
1803CONFIG_TCG_ATMEL=m
1804CONFIG_DEVPORT=y
1805CONFIG_I2C=m
1806CONFIG_I2C_BOARDINFO=y
1807CONFIG_I2C_CHARDEV=m
1808
1809#
1810# I2C Algorithms
1811#
1812CONFIG_I2C_ALGOBIT=m
1813CONFIG_I2C_ALGOPCF=m
1814CONFIG_I2C_ALGOPCA=m
1815
1816#
1817# I2C Hardware Bus support
1818#
1819CONFIG_I2C_ALI1535=m
1820CONFIG_I2C_ALI1563=m
1821CONFIG_I2C_ALI15X3=m
1822CONFIG_I2C_AMD756=m
1823CONFIG_I2C_AMD756_S4882=m
1824CONFIG_I2C_AMD8111=m
1825CONFIG_I2C_I801=m
1826CONFIG_I2C_I810=m
1827CONFIG_I2C_PIIX4=m
1828CONFIG_I2C_NFORCE2=m
1829CONFIG_I2C_OCORES=m
1830CONFIG_I2C_PARPORT=m
1831CONFIG_I2C_PARPORT_LIGHT=m
1832CONFIG_I2C_PROSAVAGE=m
1833CONFIG_I2C_SAVAGE4=m
1834# CONFIG_I2C_SIMTEC is not set
1835CONFIG_I2C_SIS5595=m
1836CONFIG_I2C_SIS630=m
1837CONFIG_I2C_SIS96X=m
1838# CONFIG_I2C_TAOS_EVM is not set
1839CONFIG_I2C_STUB=m
1840# CONFIG_I2C_TINY_USB is not set
1841CONFIG_I2C_VIA=m
1842CONFIG_I2C_VIAPRO=m
1843CONFIG_I2C_VOODOO3=m
1844
1845#
1846# Miscellaneous I2C Chip support
1847#
1848CONFIG_SENSORS_DS1337=m
1849CONFIG_SENSORS_DS1374=m
1850# CONFIG_DS1682 is not set
1851CONFIG_SENSORS_EEPROM=m
1852CONFIG_SENSORS_PCF8574=m
1853CONFIG_SENSORS_PCA9539=m
1854CONFIG_SENSORS_PCF8591=m
1855CONFIG_SENSORS_MAX6875=m
1856# CONFIG_SENSORS_TSL2550 is not set
1857# CONFIG_I2C_DEBUG_CORE is not set
1858# CONFIG_I2C_DEBUG_ALGO is not set
1859# CONFIG_I2C_DEBUG_BUS is not set
1860# CONFIG_I2C_DEBUG_CHIP is not set
1861
1862#
1863# SPI support
1864#
1865CONFIG_SPI=y
1866CONFIG_SPI_MASTER=y
1867
1868#
1869# SPI Master Controller Drivers
1870#
1871CONFIG_SPI_BITBANG=m
1872CONFIG_SPI_BUTTERFLY=m
1873# CONFIG_SPI_LM70_LLP is not set
1874
1875#
1876# SPI Protocol Masters
1877#
1878# CONFIG_SPI_AT25 is not set
1879# CONFIG_SPI_SPIDEV is not set
1880# CONFIG_SPI_TLE62X0 is not set
1881CONFIG_W1=m
1882CONFIG_W1_CON=y
1883
1884#
1885# 1-wire Bus Masters
1886#
1887CONFIG_W1_MASTER_MATROX=m
1888CONFIG_W1_MASTER_DS2490=m
1889CONFIG_W1_MASTER_DS2482=m
1890
1891#
1892# 1-wire Slaves
1893#
1894CONFIG_W1_SLAVE_THERM=m
1895CONFIG_W1_SLAVE_SMEM=m
1896CONFIG_W1_SLAVE_DS2433=m
1897# CONFIG_W1_SLAVE_DS2433_CRC is not set
1898# CONFIG_W1_SLAVE_DS2760 is not set
1899# CONFIG_POWER_SUPPLY is not set
1900CONFIG_HWMON=y
1901CONFIG_HWMON_VID=m
1902CONFIG_SENSORS_ABITUGURU=m
1903# CONFIG_SENSORS_ABITUGURU3 is not set
1904# CONFIG_SENSORS_AD7418 is not set
1905CONFIG_SENSORS_ADM1021=m
1906CONFIG_SENSORS_ADM1025=m
1907CONFIG_SENSORS_ADM1026=m
1908# CONFIG_SENSORS_ADM1029 is not set
1909CONFIG_SENSORS_ADM1031=m
1910CONFIG_SENSORS_ADM9240=m
1911CONFIG_SENSORS_ASB100=m
1912CONFIG_SENSORS_ATXP1=m
1913CONFIG_SENSORS_DS1621=m
1914CONFIG_SENSORS_F71805F=m
1915CONFIG_SENSORS_FSCHER=m
1916CONFIG_SENSORS_FSCPOS=m
1917CONFIG_SENSORS_GL518SM=m
1918CONFIG_SENSORS_GL520SM=m
1919CONFIG_SENSORS_IT87=m
1920CONFIG_SENSORS_LM63=m
1921CONFIG_SENSORS_LM70=m
1922CONFIG_SENSORS_LM75=m
1923CONFIG_SENSORS_LM77=m
1924CONFIG_SENSORS_LM78=m
1925CONFIG_SENSORS_LM80=m
1926CONFIG_SENSORS_LM83=m
1927CONFIG_SENSORS_LM85=m
1928CONFIG_SENSORS_LM87=m
1929CONFIG_SENSORS_LM90=m
1930CONFIG_SENSORS_LM92=m
1931# CONFIG_SENSORS_LM93 is not set
1932CONFIG_SENSORS_MAX1619=m
1933# CONFIG_SENSORS_MAX6650 is not set
1934CONFIG_SENSORS_PC87360=m
1935# CONFIG_SENSORS_PC87427 is not set
1936CONFIG_SENSORS_SIS5595=m
1937# CONFIG_SENSORS_DME1737 is not set
1938CONFIG_SENSORS_SMSC47M1=m
1939CONFIG_SENSORS_SMSC47M192=m
1940CONFIG_SENSORS_SMSC47B397=m
1941# CONFIG_SENSORS_THMC50 is not set
1942CONFIG_SENSORS_VIA686A=m
1943CONFIG_SENSORS_VT1211=m
1944CONFIG_SENSORS_VT8231=m
1945CONFIG_SENSORS_W83781D=m
1946CONFIG_SENSORS_W83791D=m
1947CONFIG_SENSORS_W83792D=m
1948# CONFIG_SENSORS_W83793 is not set
1949CONFIG_SENSORS_W83L785TS=m
1950CONFIG_SENSORS_W83627HF=m
1951CONFIG_SENSORS_W83627EHF=m
1952# CONFIG_HWMON_DEBUG_CHIP is not set
1953
1954#
1955# Multifunction device drivers
1956#
1957# CONFIG_MFD_SM501 is not set
1958
1959#
1960# Multimedia devices
1961#
1962CONFIG_VIDEO_DEV=m
1963CONFIG_VIDEO_V4L1=y
1964CONFIG_VIDEO_V4L1_COMPAT=y
1965CONFIG_VIDEO_V4L2=y
1966CONFIG_VIDEO_CAPTURE_DRIVERS=y
1967# CONFIG_VIDEO_ADV_DEBUG is not set
1968CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1969CONFIG_VIDEO_TVAUDIO=m
1970CONFIG_VIDEO_TDA7432=m
1971CONFIG_VIDEO_TDA9840=m
1972CONFIG_VIDEO_TDA9875=m
1973CONFIG_VIDEO_TEA6415C=m
1974CONFIG_VIDEO_TEA6420=m
1975CONFIG_VIDEO_MSP3400=m
1976CONFIG_VIDEO_WM8775=m
1977CONFIG_VIDEO_BT819=m
1978CONFIG_VIDEO_BT856=m
1979CONFIG_VIDEO_KS0127=m
1980CONFIG_VIDEO_SAA7110=m
1981CONFIG_VIDEO_SAA7111=m
1982CONFIG_VIDEO_SAA7114=m
1983CONFIG_VIDEO_SAA711X=m
1984CONFIG_VIDEO_TVP5150=m
1985CONFIG_VIDEO_VPX3220=m
1986CONFIG_VIDEO_CX25840=m
1987CONFIG_VIDEO_CX2341X=m
1988CONFIG_VIDEO_SAA7185=m
1989CONFIG_VIDEO_ADV7170=m
1990CONFIG_VIDEO_ADV7175=m
1991CONFIG_VIDEO_VIVI=m
1992CONFIG_VIDEO_BT848=m
1993CONFIG_VIDEO_BT848_DVB=y
1994CONFIG_VIDEO_SAA6588=m
1995CONFIG_VIDEO_BWQCAM=m
1996CONFIG_VIDEO_CQCAM=m
1997CONFIG_VIDEO_W9966=m
1998CONFIG_VIDEO_CPIA=m
1999CONFIG_VIDEO_CPIA_PP=m
2000CONFIG_VIDEO_CPIA_USB=m
2001CONFIG_VIDEO_CPIA2=m
2002CONFIG_VIDEO_SAA5246A=m
2003CONFIG_VIDEO_SAA5249=m
2004CONFIG_TUNER_3036=m
2005# CONFIG_TUNER_TEA5761 is not set
2006CONFIG_VIDEO_STRADIS=m
2007CONFIG_VIDEO_ZORAN_ZR36060=m
2008CONFIG_VIDEO_ZORAN=m
2009CONFIG_VIDEO_ZORAN_BUZ=m
2010CONFIG_VIDEO_ZORAN_DC10=m
2011CONFIG_VIDEO_ZORAN_DC30=m
2012CONFIG_VIDEO_ZORAN_LML33=m
2013CONFIG_VIDEO_ZORAN_LML33R10=m
2014CONFIG_VIDEO_ZORAN_AVS6EYES=m
2015CONFIG_VIDEO_SAA7134=m
2016CONFIG_VIDEO_SAA7134_ALSA=m
2017CONFIG_VIDEO_SAA7134_OSS=m
2018CONFIG_VIDEO_SAA7134_DVB=m
2019CONFIG_VIDEO_MXB=m
2020CONFIG_VIDEO_DPC=m
2021CONFIG_VIDEO_HEXIUM_ORION=m
2022CONFIG_VIDEO_HEXIUM_GEMINI=m
2023CONFIG_VIDEO_CX88=m
2024CONFIG_VIDEO_CX88_ALSA=m
2025CONFIG_VIDEO_CX88_BLACKBIRD=m
2026CONFIG_VIDEO_CX88_DVB=m
2027CONFIG_VIDEO_CX88_VP3054=m
2028# CONFIG_VIDEO_IVTV is not set
2029# CONFIG_VIDEO_CAFE_CCIC is not set
2030CONFIG_V4L_USB_DRIVERS=y
2031CONFIG_VIDEO_PVRUSB2=m
2032CONFIG_VIDEO_PVRUSB2_29XXX=y
2033CONFIG_VIDEO_PVRUSB2_24XXX=y
2034CONFIG_VIDEO_PVRUSB2_SYSFS=y
2035# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
2036CONFIG_VIDEO_EM28XX=m
2037# CONFIG_VIDEO_USBVISION is not set
2038CONFIG_VIDEO_USBVIDEO=m
2039CONFIG_USB_VICAM=m
2040CONFIG_USB_IBMCAM=m
2041CONFIG_USB_KONICAWC=m
2042CONFIG_USB_QUICKCAM_MESSENGER=m
2043CONFIG_USB_ET61X251=m
2044CONFIG_VIDEO_OVCAMCHIP=m
2045CONFIG_USB_W9968CF=m
2046# CONFIG_USB_OV511 is not set
2047CONFIG_USB_SE401=m
2048CONFIG_USB_SN9C102=m
2049CONFIG_USB_STV680=m
2050CONFIG_USB_ZC0301=m
2051CONFIG_USB_PWC=m
2052# CONFIG_USB_PWC_DEBUG is not set
2053# CONFIG_USB_ZR364XX is not set
2054CONFIG_RADIO_ADAPTERS=y
2055CONFIG_RADIO_GEMTEK_PCI=m
2056CONFIG_RADIO_MAXIRADIO=m
2057CONFIG_RADIO_MAESTRO=m
2058CONFIG_USB_DSBR=m
2059CONFIG_DVB_CORE=m
2060CONFIG_DVB_CORE_ATTACH=y
2061CONFIG_DVB_CAPTURE_DRIVERS=y
2062
2063#
2064# Supported SAA7146 based PCI Adapters
2065#
2066CONFIG_DVB_AV7110=m
2067CONFIG_DVB_AV7110_OSD=y
2068CONFIG_DVB_BUDGET=m
2069CONFIG_DVB_BUDGET_CI=m
2070CONFIG_DVB_BUDGET_AV=m
2071CONFIG_DVB_BUDGET_PATCH=m
2072
2073#
2074# Supported USB Adapters
2075#
2076CONFIG_DVB_USB=m
2077# CONFIG_DVB_USB_DEBUG is not set
2078CONFIG_DVB_USB_A800=m
2079CONFIG_DVB_USB_DIBUSB_MB=m
2080CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
2081CONFIG_DVB_USB_DIBUSB_MC=m
2082CONFIG_DVB_USB_DIB0700=m
2083CONFIG_DVB_USB_UMT_010=m
2084CONFIG_DVB_USB_CXUSB=m
2085# CONFIG_DVB_USB_M920X is not set
2086# CONFIG_DVB_USB_GL861 is not set
2087# CONFIG_DVB_USB_AU6610 is not set
2088CONFIG_DVB_USB_DIGITV=m
2089CONFIG_DVB_USB_VP7045=m
2090CONFIG_DVB_USB_VP702X=m
2091CONFIG_DVB_USB_GP8PSK=m
2092CONFIG_DVB_USB_NOVA_T_USB2=m
2093# CONFIG_DVB_USB_TTUSB2 is not set
2094CONFIG_DVB_USB_DTT200U=m
2095# CONFIG_DVB_USB_OPERA1 is not set
2096# CONFIG_DVB_USB_AF9005 is not set
2097CONFIG_DVB_TTUSB_BUDGET=m
2098CONFIG_DVB_TTUSB_DEC=m
2099CONFIG_DVB_CINERGYT2=m
2100CONFIG_DVB_CINERGYT2_TUNING=y
2101CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32
2102CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512
2103CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250
2104CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y
2105CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100
2106
2107#
2108# Supported FlexCopII (B2C2) Adapters
2109#
2110CONFIG_DVB_B2C2_FLEXCOP=m
2111CONFIG_DVB_B2C2_FLEXCOP_PCI=m
2112CONFIG_DVB_B2C2_FLEXCOP_USB=m
2113# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
2114
2115#
2116# Supported BT878 Adapters
2117#
2118CONFIG_DVB_BT8XX=m
2119
2120#
2121# Supported Pluto2 Adapters
2122#
2123CONFIG_DVB_PLUTO2=m
2124
2125#
2126# Supported DVB Frontends
2127#
2128
2129#
2130# Customise DVB Frontends
2131#
2132# CONFIG_DVB_FE_CUSTOMISE is not set
2133
2134#
2135# DVB-S (satellite) frontends
2136#
2137CONFIG_DVB_STV0299=m
2138CONFIG_DVB_CX24110=m
2139CONFIG_DVB_CX24123=m
2140CONFIG_DVB_TDA8083=m
2141CONFIG_DVB_MT312=m
2142CONFIG_DVB_VES1X93=m
2143CONFIG_DVB_S5H1420=m
2144CONFIG_DVB_TDA10086=m
2145
2146#
2147# DVB-T (terrestrial) frontends
2148#
2149CONFIG_DVB_SP8870=m
2150CONFIG_DVB_SP887X=m
2151CONFIG_DVB_CX22700=m
2152CONFIG_DVB_CX22702=m
2153CONFIG_DVB_L64781=m
2154CONFIG_DVB_TDA1004X=m
2155CONFIG_DVB_NXT6000=m
2156CONFIG_DVB_MT352=m
2157CONFIG_DVB_ZL10353=m
2158CONFIG_DVB_DIB3000MB=m
2159CONFIG_DVB_DIB3000MC=m
2160CONFIG_DVB_DIB7000M=m
2161CONFIG_DVB_DIB7000P=m
2162
2163#
2164# DVB-C (cable) frontends
2165#
2166CONFIG_DVB_VES1820=m
2167CONFIG_DVB_TDA10021=m
2168CONFIG_DVB_TDA10023=m
2169CONFIG_DVB_STV0297=m
2170
2171#
2172# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
2173#
2174CONFIG_DVB_NXT200X=m
2175CONFIG_DVB_OR51211=m
2176CONFIG_DVB_OR51132=m
2177CONFIG_DVB_BCM3510=m
2178CONFIG_DVB_LGDT330X=m
2179
2180#
2181# Tuners/PLL support
2182#
2183CONFIG_DVB_PLL=m
2184CONFIG_DVB_TDA826X=m
2185CONFIG_DVB_TDA827X=m
2186# CONFIG_DVB_TUNER_QT1010 is not set
2187CONFIG_DVB_TUNER_MT2060=m
2188
2189#
2190# Miscellaneous devices
2191#
2192CONFIG_DVB_LNBP21=m
2193CONFIG_DVB_ISL6421=m
2194CONFIG_DVB_TUA6100=m
2195CONFIG_VIDEO_SAA7146=m
2196CONFIG_VIDEO_SAA7146_VV=m
2197CONFIG_VIDEO_TUNER=m
2198CONFIG_VIDEO_BUF=m
2199CONFIG_VIDEO_BUF_DVB=m
2200CONFIG_VIDEO_BTCX=m
2201CONFIG_VIDEO_IR_I2C=m
2202CONFIG_VIDEO_IR=m
2203CONFIG_VIDEO_TVEEPROM=m
2204CONFIG_DAB=y
2205CONFIG_USB_DABUSB=m
2206
2207#
2208# Graphics support
2209#
2210CONFIG_BACKLIGHT_LCD_SUPPORT=y
2211CONFIG_LCD_CLASS_DEVICE=m
2212CONFIG_BACKLIGHT_CLASS_DEVICE=y
2213
2214#
2215# Display device support
2216#
2217# CONFIG_DISPLAY_SUPPORT is not set
2218CONFIG_VGASTATE=m
2219CONFIG_VIDEO_OUTPUT_CONTROL=m
2220CONFIG_FB=y
2221CONFIG_FIRMWARE_EDID=y
2222CONFIG_FB_DDC=m
2223CONFIG_FB_CFB_FILLRECT=m
2224CONFIG_FB_CFB_COPYAREA=m
2225CONFIG_FB_CFB_IMAGEBLIT=m
2226# CONFIG_FB_SYS_FILLRECT is not set
2227# CONFIG_FB_SYS_COPYAREA is not set
2228# CONFIG_FB_SYS_IMAGEBLIT is not set
2229# CONFIG_FB_SYS_FOPS is not set
2230CONFIG_FB_DEFERRED_IO=y
2231# CONFIG_FB_SVGALIB is not set
2232# CONFIG_FB_MACMODES is not set
2233CONFIG_FB_BACKLIGHT=y
2234CONFIG_FB_MODE_HELPERS=y
2235CONFIG_FB_TILEBLITTING=y
2236
2237#
2238# Frame buffer hardware drivers
2239#
2240CONFIG_FB_CIRRUS=m
2241CONFIG_FB_PM2=m
2242CONFIG_FB_PM2_FIFO_DISCONNECT=y
2243CONFIG_FB_CYBER2000=m
2244# CONFIG_FB_ASILIANT is not set
2245# CONFIG_FB_IMSTT is not set
2246CONFIG_FB_S1D13XXX=m
2247CONFIG_FB_NVIDIA=m
2248CONFIG_FB_NVIDIA_I2C=y
2249# CONFIG_FB_NVIDIA_DEBUG is not set
2250CONFIG_FB_NVIDIA_BACKLIGHT=y
2251CONFIG_FB_RIVA=m
2252CONFIG_FB_RIVA_I2C=y
2253# CONFIG_FB_RIVA_DEBUG is not set
2254CONFIG_FB_RIVA_BACKLIGHT=y
2255CONFIG_FB_MATROX=m
2256CONFIG_FB_MATROX_MILLENIUM=y
2257CONFIG_FB_MATROX_MYSTIQUE=y
2258CONFIG_FB_MATROX_G=y
2259CONFIG_FB_MATROX_I2C=m
2260CONFIG_FB_MATROX_MAVEN=m
2261CONFIG_FB_MATROX_MULTIHEAD=y
2262CONFIG_FB_RADEON=m
2263CONFIG_FB_RADEON_I2C=y
2264CONFIG_FB_RADEON_BACKLIGHT=y
2265# CONFIG_FB_RADEON_DEBUG is not set
2266CONFIG_FB_ATY128=m
2267CONFIG_FB_ATY128_BACKLIGHT=y
2268CONFIG_FB_ATY=m
2269CONFIG_FB_ATY_CT=y
2270CONFIG_FB_ATY_GENERIC_LCD=y
2271CONFIG_FB_ATY_GX=y
2272CONFIG_FB_ATY_BACKLIGHT=y
2273# CONFIG_FB_S3 is not set
2274CONFIG_FB_SAVAGE=m
2275CONFIG_FB_SAVAGE_I2C=y
2276CONFIG_FB_SAVAGE_ACCEL=y
2277CONFIG_FB_SIS=m
2278CONFIG_FB_SIS_300=y
2279CONFIG_FB_SIS_315=y
2280CONFIG_FB_NEOMAGIC=m
2281CONFIG_FB_KYRO=m
2282CONFIG_FB_3DFX=m
2283# CONFIG_FB_3DFX_ACCEL is not set
2284CONFIG_FB_VOODOO1=m
2285# CONFIG_FB_VT8623 is not set
2286CONFIG_FB_TRIDENT=m
2287# CONFIG_FB_TRIDENT_ACCEL is not set
2288# CONFIG_FB_ARK is not set
2289# CONFIG_FB_PM3 is not set
2290# CONFIG_FB_VIRTUAL is not set
2291
2292#
2293# Console display driver support
2294#
2295CONFIG_VGA_CONSOLE=y
2296# CONFIG_VGACON_SOFT_SCROLLBACK is not set
2297CONFIG_DUMMY_CONSOLE=y
2298CONFIG_FRAMEBUFFER_CONSOLE=m
2299# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
2300# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
2301# CONFIG_FONTS is not set
2302CONFIG_FONT_8x8=y
2303CONFIG_FONT_8x16=y
2304# CONFIG_LOGO is not set
2305
2306#
2307# Sound
2308#
2309CONFIG_SOUND=m
2310
2311#
2312# Advanced Linux Sound Architecture
2313#
2314CONFIG_SND=m
2315CONFIG_SND_TIMER=m
2316CONFIG_SND_PCM=m
2317CONFIG_SND_HWDEP=m
2318CONFIG_SND_RAWMIDI=m
2319CONFIG_SND_SEQUENCER=m
2320CONFIG_SND_SEQ_DUMMY=m
2321CONFIG_SND_OSSEMUL=y
2322CONFIG_SND_MIXER_OSS=m
2323CONFIG_SND_PCM_OSS=m
2324CONFIG_SND_PCM_OSS_PLUGINS=y
2325CONFIG_SND_SEQUENCER_OSS=y
2326CONFIG_SND_RTCTIMER=m
2327CONFIG_SND_SEQ_RTCTIMER_DEFAULT=y
2328CONFIG_SND_DYNAMIC_MINORS=y
2329CONFIG_SND_SUPPORT_OLD_API=y
2330CONFIG_SND_VERBOSE_PROCFS=y
2331# CONFIG_SND_VERBOSE_PRINTK is not set
2332# CONFIG_SND_DEBUG is not set
2333
2334#
2335# Generic devices
2336#
2337CONFIG_SND_MPU401_UART=m
2338CONFIG_SND_OPL3_LIB=m
2339CONFIG_SND_VX_LIB=m
2340CONFIG_SND_AC97_CODEC=m
2341CONFIG_SND_DUMMY=m
2342CONFIG_SND_VIRMIDI=m
2343CONFIG_SND_MTPAV=m
2344CONFIG_SND_MTS64=m
2345CONFIG_SND_SERIAL_U16550=m
2346CONFIG_SND_MPU401=m
2347# CONFIG_SND_PORTMAN2X4 is not set
2348
2349#
2350# PCI devices
2351#
2352CONFIG_SND_AD1889=m
2353CONFIG_SND_ALS300=m
2354CONFIG_SND_ALI5451=m
2355CONFIG_SND_ATIIXP=m
2356CONFIG_SND_ATIIXP_MODEM=m
2357CONFIG_SND_AU8810=m
2358CONFIG_SND_AU8820=m
2359CONFIG_SND_AU8830=m
2360CONFIG_SND_AZT3328=m
2361CONFIG_SND_BT87X=m
2362# CONFIG_SND_BT87X_OVERCLOCK is not set
2363CONFIG_SND_CA0106=m
2364CONFIG_SND_CMIPCI=m
2365CONFIG_SND_CS4281=m
2366CONFIG_SND_CS46XX=m
2367CONFIG_SND_CS46XX_NEW_DSP=y
2368CONFIG_SND_DARLA20=m
2369CONFIG_SND_GINA20=m
2370CONFIG_SND_LAYLA20=m
2371CONFIG_SND_DARLA24=m
2372CONFIG_SND_GINA24=m
2373CONFIG_SND_LAYLA24=m
2374CONFIG_SND_MONA=m
2375CONFIG_SND_MIA=m
2376CONFIG_SND_ECHO3G=m
2377CONFIG_SND_INDIGO=m
2378CONFIG_SND_INDIGOIO=m
2379CONFIG_SND_INDIGODJ=m
2380CONFIG_SND_EMU10K1=m
2381CONFIG_SND_EMU10K1X=m
2382CONFIG_SND_ENS1370=m
2383CONFIG_SND_ENS1371=m
2384CONFIG_SND_ES1938=m
2385CONFIG_SND_ES1968=m
2386CONFIG_SND_FM801=m
2387CONFIG_SND_FM801_TEA575X_BOOL=y
2388CONFIG_SND_FM801_TEA575X=m
2389CONFIG_SND_HDA_INTEL=m
2390CONFIG_SND_HDSP=m
2391CONFIG_SND_HDSPM=m
2392CONFIG_SND_ICE1712=m
2393CONFIG_SND_ICE1724=m
2394CONFIG_SND_INTEL8X0=m
2395CONFIG_SND_INTEL8X0M=m
2396CONFIG_SND_KORG1212=m
2397CONFIG_SND_KORG1212_FIRMWARE_IN_KERNEL=y
2398CONFIG_SND_MAESTRO3=m
2399CONFIG_SND_MAESTRO3_FIRMWARE_IN_KERNEL=y
2400CONFIG_SND_MIXART=m
2401CONFIG_SND_NM256=m
2402CONFIG_SND_PCXHR=m
2403CONFIG_SND_RIPTIDE=m
2404CONFIG_SND_RME32=m
2405CONFIG_SND_RME96=m
2406CONFIG_SND_RME9652=m
2407CONFIG_SND_SONICVIBES=m
2408CONFIG_SND_TRIDENT=m
2409CONFIG_SND_VIA82XX=m
2410CONFIG_SND_VIA82XX_MODEM=m
2411CONFIG_SND_VX222=m
2412CONFIG_SND_YMFPCI=m
2413CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL=y
2414# CONFIG_SND_AC97_POWER_SAVE is not set
2415
2416#
2417# ALSA MIPS devices
2418#
2419# CONFIG_SND_AU1X00 is not set
2420
2421#
2422# USB devices
2423#
2424CONFIG_SND_USB_AUDIO=m
2425# CONFIG_SND_USB_CAIAQ is not set
2426
2427#
2428# PCMCIA devices
2429#
2430CONFIG_SND_VXPOCKET=m
2431CONFIG_SND_PDAUDIOCF=m
2432
2433#
2434# System on Chip audio support
2435#
2436# CONFIG_SND_SOC is not set
2437
2438#
2439# SoC Audio support for SuperH
2440#
2441
2442#
2443# Open Sound System
2444#
2445CONFIG_SOUND_PRIME=m
2446CONFIG_SOUND_TRIDENT=m
2447# CONFIG_SOUND_MSNDCLAS is not set
2448# CONFIG_SOUND_MSNDPIN is not set
2449CONFIG_AC97_BUS=m
2450CONFIG_HID_SUPPORT=y
2451CONFIG_HID=y
2452# CONFIG_HID_DEBUG is not set
2453
2454#
2455# USB Input Devices
2456#
2457CONFIG_USB_HID=m
2458CONFIG_USB_HIDINPUT_POWERBOOK=y
2459# CONFIG_HID_FF is not set
2460CONFIG_USB_HIDDEV=y
2461
2462#
2463# USB HID Boot Protocol drivers
2464#
2465CONFIG_USB_KBD=m
2466CONFIG_USB_MOUSE=m
2467CONFIG_USB_SUPPORT=y
2468CONFIG_USB_ARCH_HAS_HCD=y
2469CONFIG_USB_ARCH_HAS_OHCI=y
2470CONFIG_USB_ARCH_HAS_EHCI=y
2471CONFIG_USB=m
2472# CONFIG_USB_DEBUG is not set
2473
2474#
2475# Miscellaneous USB options
2476#
2477CONFIG_USB_DEVICEFS=y
2478CONFIG_USB_DEVICE_CLASS=y
2479# CONFIG_USB_DYNAMIC_MINORS is not set
2480CONFIG_USB_SUSPEND=y
2481# CONFIG_USB_PERSIST is not set
2482# CONFIG_USB_OTG is not set
2483
2484#
2485# USB Host Controller Drivers
2486#
2487CONFIG_USB_EHCI_HCD=m
2488CONFIG_USB_EHCI_SPLIT_ISO=y
2489CONFIG_USB_EHCI_ROOT_HUB_TT=y
2490CONFIG_USB_EHCI_TT_NEWSCHED=y
2491# CONFIG_USB_ISP116X_HCD is not set
2492CONFIG_USB_OHCI_HCD=m
2493# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
2494# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
2495CONFIG_USB_OHCI_LITTLE_ENDIAN=y
2496CONFIG_USB_UHCI_HCD=m
2497CONFIG_USB_U132_HCD=m
2498CONFIG_USB_SL811_HCD=m
2499CONFIG_USB_SL811_CS=m
2500# CONFIG_USB_R8A66597_HCD is not set
2501
2502#
2503# USB Device Class drivers
2504#
2505CONFIG_USB_ACM=m
2506CONFIG_USB_PRINTER=m
2507
2508#
2509# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
2510#
2511
2512#
2513# may also be needed; see USB_STORAGE Help for more information
2514#
2515CONFIG_USB_STORAGE=m
2516# CONFIG_USB_STORAGE_DEBUG is not set
2517CONFIG_USB_STORAGE_DATAFAB=y
2518CONFIG_USB_STORAGE_FREECOM=y
2519CONFIG_USB_STORAGE_ISD200=y
2520CONFIG_USB_STORAGE_DPCM=y
2521CONFIG_USB_STORAGE_USBAT=y
2522CONFIG_USB_STORAGE_SDDR09=y
2523CONFIG_USB_STORAGE_SDDR55=y
2524CONFIG_USB_STORAGE_JUMPSHOT=y
2525CONFIG_USB_STORAGE_ALAUDA=y
2526CONFIG_USB_STORAGE_KARMA=y
2527CONFIG_USB_LIBUSUAL=y
2528
2529#
2530# USB Imaging devices
2531#
2532CONFIG_USB_MDC800=m
2533CONFIG_USB_MICROTEK=m
2534CONFIG_USB_MON=y
2535
2536#
2537# USB port drivers
2538#
2539CONFIG_USB_USS720=m
2540
2541#
2542# USB Serial Converter support
2543#
2544CONFIG_USB_SERIAL=m
2545CONFIG_USB_SERIAL_GENERIC=y
2546CONFIG_USB_SERIAL_AIRCABLE=m
2547CONFIG_USB_SERIAL_AIRPRIME=m
2548CONFIG_USB_SERIAL_ARK3116=m
2549CONFIG_USB_SERIAL_BELKIN=m
2550CONFIG_USB_SERIAL_WHITEHEAT=m
2551CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
2552CONFIG_USB_SERIAL_CP2101=m
2553CONFIG_USB_SERIAL_CYPRESS_M8=m
2554CONFIG_USB_SERIAL_EMPEG=m
2555CONFIG_USB_SERIAL_FTDI_SIO=m
2556CONFIG_USB_SERIAL_FUNSOFT=m
2557CONFIG_USB_SERIAL_VISOR=m
2558CONFIG_USB_SERIAL_IPAQ=m
2559CONFIG_USB_SERIAL_IR=m
2560CONFIG_USB_SERIAL_EDGEPORT=m
2561CONFIG_USB_SERIAL_EDGEPORT_TI=m
2562CONFIG_USB_SERIAL_GARMIN=m
2563CONFIG_USB_SERIAL_IPW=m
2564CONFIG_USB_SERIAL_KEYSPAN_PDA=m
2565CONFIG_USB_SERIAL_KEYSPAN=m
2566# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set
2567# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
2568# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
2569# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
2570# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
2571# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
2572# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
2573# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
2574# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set
2575# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set
2576# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
2577# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set
2578CONFIG_USB_SERIAL_KLSI=m
2579CONFIG_USB_SERIAL_KOBIL_SCT=m
2580CONFIG_USB_SERIAL_MCT_U232=m
2581CONFIG_USB_SERIAL_MOS7720=m
2582CONFIG_USB_SERIAL_MOS7840=m
2583CONFIG_USB_SERIAL_NAVMAN=m
2584CONFIG_USB_SERIAL_PL2303=m
2585# CONFIG_USB_SERIAL_OTI6858 is not set
2586CONFIG_USB_SERIAL_HP4X=m
2587CONFIG_USB_SERIAL_SAFE=m
2588# CONFIG_USB_SERIAL_SAFE_PADDED is not set
2589CONFIG_USB_SERIAL_SIERRAWIRELESS=m
2590CONFIG_USB_SERIAL_TI=m
2591CONFIG_USB_SERIAL_CYBERJACK=m
2592CONFIG_USB_SERIAL_XIRCOM=m
2593CONFIG_USB_SERIAL_OPTION=m
2594CONFIG_USB_SERIAL_OMNINET=m
2595# CONFIG_USB_SERIAL_DEBUG is not set
2596CONFIG_USB_EZUSB=y
2597
2598#
2599# USB Miscellaneous drivers
2600#
2601CONFIG_USB_EMI62=m
2602CONFIG_USB_EMI26=m
2603CONFIG_USB_ADUTUX=m
2604CONFIG_USB_AUERSWALD=m
2605CONFIG_USB_RIO500=m
2606CONFIG_USB_LEGOTOWER=m
2607CONFIG_USB_LCD=m
2608# CONFIG_USB_BERRY_CHARGE is not set
2609CONFIG_USB_LED=m
2610CONFIG_USB_CYPRESS_CY7C63=m
2611CONFIG_USB_CYTHERM=m
2612CONFIG_USB_PHIDGET=m
2613CONFIG_USB_PHIDGETKIT=m
2614CONFIG_USB_PHIDGETMOTORCONTROL=m
2615CONFIG_USB_PHIDGETSERVO=m
2616CONFIG_USB_IDMOUSE=m
2617CONFIG_USB_FTDI_ELAN=m
2618CONFIG_USB_APPLEDISPLAY=m
2619CONFIG_USB_SISUSBVGA=m
2620# CONFIG_USB_SISUSBVGA_CON is not set
2621CONFIG_USB_LD=m
2622CONFIG_USB_TRANCEVIBRATOR=m
2623# CONFIG_USB_IOWARRIOR is not set
2624CONFIG_USB_TEST=m
2625
2626#
2627# USB DSL modem support
2628#
2629CONFIG_USB_ATM=m
2630CONFIG_USB_SPEEDTOUCH=m
2631CONFIG_USB_CXACRU=m
2632CONFIG_USB_UEAGLEATM=m
2633CONFIG_USB_XUSBATM=m
2634
2635#
2636# USB Gadget Support
2637#
2638CONFIG_USB_GADGET=m
2639# CONFIG_USB_GADGET_DEBUG_FILES is not set
2640CONFIG_USB_GADGET_SELECTED=y
2641# CONFIG_USB_GADGET_AMD5536UDC is not set
2642# CONFIG_USB_GADGET_FSL_USB2 is not set
2643CONFIG_USB_GADGET_NET2280=y
2644CONFIG_USB_NET2280=m
2645# CONFIG_USB_GADGET_PXA2XX is not set
2646# CONFIG_USB_GADGET_M66592 is not set
2647# CONFIG_USB_GADGET_GOKU is not set
2648# CONFIG_USB_GADGET_LH7A40X is not set
2649# CONFIG_USB_GADGET_OMAP is not set
2650# CONFIG_USB_GADGET_S3C2410 is not set
2651# CONFIG_USB_GADGET_AT91 is not set
2652# CONFIG_USB_GADGET_DUMMY_HCD is not set
2653CONFIG_USB_GADGET_DUALSPEED=y
2654CONFIG_USB_ZERO=m
2655CONFIG_USB_ETH=m
2656CONFIG_USB_ETH_RNDIS=y
2657CONFIG_USB_GADGETFS=m
2658CONFIG_USB_FILE_STORAGE=m
2659# CONFIG_USB_FILE_STORAGE_TEST is not set
2660CONFIG_USB_G_SERIAL=m
2661CONFIG_USB_MIDI_GADGET=m
2662CONFIG_MMC=m
2663# CONFIG_MMC_DEBUG is not set
2664# CONFIG_MMC_UNSAFE_RESUME is not set
2665
2666#
2667# MMC/SD Card Drivers
2668#
2669CONFIG_MMC_BLOCK=m
2670CONFIG_MMC_BLOCK_BOUNCE=y
2671
2672#
2673# MMC/SD Host Controller Drivers
2674#
2675CONFIG_MMC_SDHCI=m
2676CONFIG_MMC_TIFM_SD=m
2677CONFIG_NEW_LEDS=y
2678CONFIG_LEDS_CLASS=m
2679
2680#
2681# LED drivers
2682#
2683
2684#
2685# LED Triggers
2686#
2687# CONFIG_LEDS_TRIGGERS is not set
2688CONFIG_INFINIBAND=m
2689CONFIG_INFINIBAND_USER_MAD=m
2690CONFIG_INFINIBAND_USER_ACCESS=m
2691CONFIG_INFINIBAND_USER_MEM=y
2692CONFIG_INFINIBAND_ADDR_TRANS=y
2693CONFIG_INFINIBAND_MTHCA=m
2694CONFIG_INFINIBAND_MTHCA_DEBUG=y
2695CONFIG_INFINIBAND_AMSO1100=m
2696CONFIG_INFINIBAND_AMSO1100_DEBUG=y
2697# CONFIG_MLX4_INFINIBAND is not set
2698CONFIG_INFINIBAND_IPOIB=m
2699# CONFIG_INFINIBAND_IPOIB_CM is not set
2700CONFIG_INFINIBAND_IPOIB_DEBUG=y
2701# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
2702CONFIG_INFINIBAND_SRP=m
2703CONFIG_INFINIBAND_ISER=m
2704CONFIG_RTC_LIB=m
2705CONFIG_RTC_CLASS=m
2706
2707#
2708# RTC interfaces
2709#
2710CONFIG_RTC_INTF_SYSFS=y
2711CONFIG_RTC_INTF_PROC=y
2712CONFIG_RTC_INTF_DEV=y
2713CONFIG_RTC_INTF_DEV_UIE_EMUL=y
2714CONFIG_RTC_DRV_TEST=m
2715
2716#
2717# I2C RTC drivers
2718#
2719CONFIG_RTC_DRV_DS1307=m
2720CONFIG_RTC_DRV_DS1672=m
2721# CONFIG_RTC_DRV_MAX6900 is not set
2722CONFIG_RTC_DRV_RS5C372=m
2723CONFIG_RTC_DRV_ISL1208=m
2724CONFIG_RTC_DRV_X1205=m
2725CONFIG_RTC_DRV_PCF8563=m
2726CONFIG_RTC_DRV_PCF8583=m
2727# CONFIG_RTC_DRV_M41T80 is not set
2728
2729#
2730# SPI RTC drivers
2731#
2732CONFIG_RTC_DRV_RS5C348=m
2733CONFIG_RTC_DRV_MAX6902=m
2734
2735#
2736# Platform RTC drivers
2737#
2738# CONFIG_RTC_DRV_CMOS is not set
2739CONFIG_RTC_DRV_DS1553=m
2740# CONFIG_RTC_DRV_STK17TA8 is not set
2741CONFIG_RTC_DRV_DS1742=m
2742CONFIG_RTC_DRV_M48T86=m
2743# CONFIG_RTC_DRV_M48T59 is not set
2744CONFIG_RTC_DRV_V3020=m
2745
2746#
2747# on-CPU RTC drivers
2748#
2749
2750#
2751# DMA Engine support
2752#
2753CONFIG_DMA_ENGINE=y
2754
2755#
2756# DMA Clients
2757#
2758CONFIG_NET_DMA=y
2759
2760#
2761# DMA Devices
2762#
2763CONFIG_INTEL_IOATDMA=m
2764# CONFIG_AUXDISPLAY is not set
2765
2766#
2767# Userspace I/O
2768#
2769# CONFIG_UIO is not set
2770
2771#
2772# File systems
2773#
2774CONFIG_EXT2_FS=m
2775CONFIG_EXT2_FS_XATTR=y
2776CONFIG_EXT2_FS_POSIX_ACL=y
2777CONFIG_EXT2_FS_SECURITY=y
2778# CONFIG_EXT2_FS_XIP is not set
2779CONFIG_EXT3_FS=m
2780CONFIG_EXT3_FS_XATTR=y
2781CONFIG_EXT3_FS_POSIX_ACL=y
2782CONFIG_EXT3_FS_SECURITY=y
2783# CONFIG_EXT4DEV_FS is not set
2784CONFIG_JBD=m
2785# CONFIG_JBD_DEBUG is not set
2786CONFIG_FS_MBCACHE=m
2787CONFIG_REISERFS_FS=m
2788# CONFIG_REISERFS_CHECK is not set
2789# CONFIG_REISERFS_PROC_INFO is not set
2790CONFIG_REISERFS_FS_XATTR=y
2791CONFIG_REISERFS_FS_POSIX_ACL=y
2792CONFIG_REISERFS_FS_SECURITY=y
2793CONFIG_JFS_FS=m
2794CONFIG_JFS_POSIX_ACL=y
2795CONFIG_JFS_SECURITY=y
2796# CONFIG_JFS_DEBUG is not set
2797CONFIG_JFS_STATISTICS=y
2798CONFIG_FS_POSIX_ACL=y
2799CONFIG_XFS_FS=m
2800CONFIG_XFS_QUOTA=y
2801CONFIG_XFS_SECURITY=y
2802CONFIG_XFS_POSIX_ACL=y
2803CONFIG_XFS_RT=y
2804# CONFIG_GFS2_FS is not set
2805# CONFIG_OCFS2_FS is not set
2806CONFIG_MINIX_FS=m
2807CONFIG_ROMFS_FS=m
2808CONFIG_INOTIFY=y
2809CONFIG_INOTIFY_USER=y
2810CONFIG_QUOTA=y
2811CONFIG_QFMT_V1=m
2812CONFIG_QFMT_V2=m
2813CONFIG_QUOTACTL=y
2814CONFIG_DNOTIFY=y
2815CONFIG_AUTOFS_FS=m
2816CONFIG_AUTOFS4_FS=m
2817CONFIG_FUSE_FS=m
2818
2819#
2820# CD-ROM/DVD Filesystems
2821#
2822CONFIG_ISO9660_FS=m
2823CONFIG_JOLIET=y
2824CONFIG_ZISOFS=y
2825CONFIG_UDF_FS=m
2826CONFIG_UDF_NLS=y
2827
2828#
2829# DOS/FAT/NT Filesystems
2830#
2831CONFIG_FAT_FS=m
2832CONFIG_MSDOS_FS=m
2833CONFIG_VFAT_FS=m
2834CONFIG_FAT_DEFAULT_CODEPAGE=437
2835CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
2836CONFIG_NTFS_FS=m
2837# CONFIG_NTFS_DEBUG is not set
2838# CONFIG_NTFS_RW is not set
2839
2840#
2841# Pseudo filesystems
2842#
2843CONFIG_PROC_FS=y
2844CONFIG_PROC_KCORE=y
2845CONFIG_PROC_SYSCTL=y
2846CONFIG_SYSFS=y
2847CONFIG_TMPFS=y
2848# CONFIG_TMPFS_POSIX_ACL is not set
2849# CONFIG_HUGETLB_PAGE is not set
2850CONFIG_RAMFS=y
2851CONFIG_CONFIGFS_FS=m
2852
2853#
2854# Miscellaneous filesystems
2855#
2856CONFIG_ADFS_FS=m
2857# CONFIG_ADFS_FS_RW is not set
2858CONFIG_AFFS_FS=m
2859CONFIG_ECRYPT_FS=m
2860CONFIG_HFS_FS=m
2861CONFIG_HFSPLUS_FS=m
2862CONFIG_BEFS_FS=m
2863# CONFIG_BEFS_DEBUG is not set
2864CONFIG_BFS_FS=m
2865CONFIG_EFS_FS=m
2866CONFIG_JFFS2_FS=m
2867CONFIG_JFFS2_FS_DEBUG=0
2868CONFIG_JFFS2_FS_WRITEBUFFER=y
2869# CONFIG_JFFS2_SUMMARY is not set
2870# CONFIG_JFFS2_FS_XATTR is not set
2871# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2872CONFIG_JFFS2_ZLIB=y
2873CONFIG_JFFS2_RTIME=y
2874# CONFIG_JFFS2_RUBIN is not set
2875CONFIG_CRAMFS=y
2876CONFIG_VXFS_FS=m
2877CONFIG_HPFS_FS=m
2878CONFIG_QNX4FS_FS=m
2879CONFIG_SYSV_FS=m
2880CONFIG_UFS_FS=m
2881# CONFIG_UFS_FS_WRITE is not set
2882# CONFIG_UFS_DEBUG is not set
2883
2884#
2885# Network File Systems
2886#
2887CONFIG_NFS_FS=m
2888CONFIG_NFS_V3=y
2889# CONFIG_NFS_V3_ACL is not set
2890CONFIG_NFS_V4=y
2891CONFIG_NFS_DIRECTIO=y
2892CONFIG_NFSD=m
2893CONFIG_NFSD_V3=y
2894# CONFIG_NFSD_V3_ACL is not set
2895CONFIG_NFSD_V4=y
2896CONFIG_NFSD_TCP=y
2897CONFIG_LOCKD=m
2898CONFIG_LOCKD_V4=y
2899CONFIG_EXPORTFS=m
2900CONFIG_NFS_COMMON=y
2901CONFIG_SUNRPC=m
2902CONFIG_SUNRPC_GSS=m
2903# CONFIG_SUNRPC_BIND34 is not set
2904CONFIG_RPCSEC_GSS_KRB5=m
2905CONFIG_RPCSEC_GSS_SPKM3=m
2906CONFIG_SMB_FS=m
2907# CONFIG_SMB_NLS_DEFAULT is not set
2908CONFIG_CIFS=m
2909# CONFIG_CIFS_STATS is not set
2910# CONFIG_CIFS_WEAK_PW_HASH is not set
2911# CONFIG_CIFS_XATTR is not set
2912# CONFIG_CIFS_DEBUG2 is not set
2913# CONFIG_CIFS_EXPERIMENTAL is not set
2914CONFIG_NCP_FS=m
2915CONFIG_NCPFS_PACKET_SIGNING=y
2916CONFIG_NCPFS_IOCTL_LOCKING=y
2917CONFIG_NCPFS_STRONG=y
2918CONFIG_NCPFS_NFS_NS=y
2919CONFIG_NCPFS_OS2_NS=y
2920# CONFIG_NCPFS_SMALLDOS is not set
2921CONFIG_NCPFS_NLS=y
2922CONFIG_NCPFS_EXTRAS=y
2923CONFIG_CODA_FS=m
2924# CONFIG_CODA_FS_OLD_API is not set
2925CONFIG_AFS_FS=m
2926# CONFIG_AFS_DEBUG is not set
2927
2928#
2929# Partition Types
2930#
2931CONFIG_PARTITION_ADVANCED=y
2932CONFIG_ACORN_PARTITION=y
2933# CONFIG_ACORN_PARTITION_CUMANA is not set
2934# CONFIG_ACORN_PARTITION_EESOX is not set
2935CONFIG_ACORN_PARTITION_ICS=y
2936# CONFIG_ACORN_PARTITION_ADFS is not set
2937# CONFIG_ACORN_PARTITION_POWERTEC is not set
2938CONFIG_ACORN_PARTITION_RISCIX=y
2939CONFIG_OSF_PARTITION=y
2940CONFIG_AMIGA_PARTITION=y
2941CONFIG_ATARI_PARTITION=y
2942CONFIG_MAC_PARTITION=y
2943CONFIG_MSDOS_PARTITION=y
2944CONFIG_BSD_DISKLABEL=y
2945CONFIG_MINIX_SUBPARTITION=y
2946CONFIG_SOLARIS_X86_PARTITION=y
2947CONFIG_UNIXWARE_DISKLABEL=y
2948CONFIG_LDM_PARTITION=y
2949# CONFIG_LDM_DEBUG is not set
2950CONFIG_SGI_PARTITION=y
2951CONFIG_ULTRIX_PARTITION=y
2952CONFIG_SUN_PARTITION=y
2953CONFIG_KARMA_PARTITION=y
2954CONFIG_EFI_PARTITION=y
2955# CONFIG_SYSV68_PARTITION is not set
2956
2957#
2958# Native Language Support
2959#
2960CONFIG_NLS=y
2961CONFIG_NLS_DEFAULT="cp437"
2962CONFIG_NLS_CODEPAGE_437=m
2963CONFIG_NLS_CODEPAGE_737=m
2964CONFIG_NLS_CODEPAGE_775=m
2965CONFIG_NLS_CODEPAGE_850=m
2966CONFIG_NLS_CODEPAGE_852=m
2967CONFIG_NLS_CODEPAGE_855=m
2968CONFIG_NLS_CODEPAGE_857=m
2969CONFIG_NLS_CODEPAGE_860=m
2970CONFIG_NLS_CODEPAGE_861=m
2971CONFIG_NLS_CODEPAGE_862=m
2972CONFIG_NLS_CODEPAGE_863=m
2973CONFIG_NLS_CODEPAGE_864=m
2974CONFIG_NLS_CODEPAGE_865=m
2975CONFIG_NLS_CODEPAGE_866=m
2976CONFIG_NLS_CODEPAGE_869=m
2977CONFIG_NLS_CODEPAGE_936=m
2978CONFIG_NLS_CODEPAGE_950=m
2979CONFIG_NLS_CODEPAGE_932=m
2980CONFIG_NLS_CODEPAGE_949=m
2981CONFIG_NLS_CODEPAGE_874=m
2982CONFIG_NLS_ISO8859_8=m
2983CONFIG_NLS_CODEPAGE_1250=m
2984CONFIG_NLS_CODEPAGE_1251=m
2985CONFIG_NLS_ASCII=m
2986CONFIG_NLS_ISO8859_1=m
2987CONFIG_NLS_ISO8859_2=m
2988CONFIG_NLS_ISO8859_3=m
2989CONFIG_NLS_ISO8859_4=m
2990CONFIG_NLS_ISO8859_5=m
2991CONFIG_NLS_ISO8859_6=m
2992CONFIG_NLS_ISO8859_7=m
2993CONFIG_NLS_ISO8859_9=m
2994CONFIG_NLS_ISO8859_13=m
2995CONFIG_NLS_ISO8859_14=m
2996CONFIG_NLS_ISO8859_15=m
2997CONFIG_NLS_KOI8_R=m
2998CONFIG_NLS_KOI8_U=m
2999CONFIG_NLS_UTF8=m
3000
3001#
3002# Distributed Lock Manager
3003#
3004CONFIG_DLM=m
3005# CONFIG_DLM_DEBUG is not set
3006
3007#
3008# Profiling support
3009#
3010CONFIG_PROFILING=y
3011CONFIG_OPROFILE=m
3012
3013#
3014# Kernel hacking
3015#
3016CONFIG_TRACE_IRQFLAGS_SUPPORT=y
3017# CONFIG_PRINTK_TIME is not set
3018# CONFIG_ENABLE_MUST_CHECK is not set
3019CONFIG_MAGIC_SYSRQ=y
3020# CONFIG_UNUSED_SYMBOLS is not set
3021# CONFIG_DEBUG_FS is not set
3022# CONFIG_HEADERS_CHECK is not set
3023# CONFIG_DEBUG_KERNEL is not set
3024# CONFIG_CROSSCOMPILE is not set
3025CONFIG_CMDLINE=""
3026CONFIG_SYS_SUPPORTS_KGDB=y
3027
3028#
3029# Security options
3030#
3031CONFIG_KEYS=y
3032# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
3033CONFIG_SECURITY=y
3034CONFIG_SECURITY_NETWORK=y
3035# CONFIG_SECURITY_NETWORK_XFRM is not set
3036CONFIG_SECURITY_CAPABILITIES=m
3037CONFIG_SECURITY_ROOTPLUG=m
3038CONFIG_SECURITY_SELINUX=y
3039CONFIG_SECURITY_SELINUX_BOOTPARAM=y
3040CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
3041CONFIG_SECURITY_SELINUX_DISABLE=y
3042CONFIG_SECURITY_SELINUX_DEVELOP=y
3043CONFIG_SECURITY_SELINUX_AVC_STATS=y
3044CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
3045# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
3046# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
3047CONFIG_XOR_BLOCKS=m
3048CONFIG_ASYNC_CORE=m
3049CONFIG_ASYNC_MEMCPY=m
3050CONFIG_ASYNC_XOR=m
3051CONFIG_CRYPTO=y
3052CONFIG_CRYPTO_ALGAPI=y
3053CONFIG_CRYPTO_BLKCIPHER=m
3054CONFIG_CRYPTO_HASH=y
3055CONFIG_CRYPTO_MANAGER=y
3056CONFIG_CRYPTO_HMAC=y
3057# CONFIG_CRYPTO_XCBC is not set
3058CONFIG_CRYPTO_NULL=m
3059CONFIG_CRYPTO_MD4=m
3060CONFIG_CRYPTO_MD5=y
3061CONFIG_CRYPTO_SHA1=m
3062CONFIG_CRYPTO_SHA256=m
3063CONFIG_CRYPTO_SHA512=m
3064CONFIG_CRYPTO_WP512=m
3065CONFIG_CRYPTO_TGR192=m
3066# CONFIG_CRYPTO_GF128MUL is not set
3067CONFIG_CRYPTO_ECB=m
3068CONFIG_CRYPTO_CBC=m
3069CONFIG_CRYPTO_PCBC=m
3070# CONFIG_CRYPTO_LRW is not set
3071# CONFIG_CRYPTO_CRYPTD is not set
3072CONFIG_CRYPTO_DES=m
3073# CONFIG_CRYPTO_FCRYPT is not set
3074CONFIG_CRYPTO_BLOWFISH=m
3075CONFIG_CRYPTO_TWOFISH=m
3076CONFIG_CRYPTO_TWOFISH_COMMON=m
3077CONFIG_CRYPTO_SERPENT=m
3078CONFIG_CRYPTO_AES=m
3079CONFIG_CRYPTO_CAST5=m
3080CONFIG_CRYPTO_CAST6=m
3081CONFIG_CRYPTO_TEA=m
3082CONFIG_CRYPTO_ARC4=m
3083CONFIG_CRYPTO_KHAZAD=m
3084CONFIG_CRYPTO_ANUBIS=m
3085CONFIG_CRYPTO_DEFLATE=m
3086CONFIG_CRYPTO_MICHAEL_MIC=m
3087CONFIG_CRYPTO_CRC32C=m
3088# CONFIG_CRYPTO_CAMELLIA is not set
3089CONFIG_CRYPTO_TEST=m
3090CONFIG_CRYPTO_HW=y
3091
3092#
3093# Library routines
3094#
3095CONFIG_BITREVERSE=y
3096CONFIG_CRC_CCITT=m
3097CONFIG_CRC16=m
3098# CONFIG_CRC_ITU_T is not set
3099CONFIG_CRC32=y
3100# CONFIG_CRC7 is not set
3101CONFIG_LIBCRC32C=m
3102CONFIG_AUDIT_GENERIC=y
3103CONFIG_ZLIB_INFLATE=y
3104CONFIG_ZLIB_DEFLATE=m
3105CONFIG_REED_SOLOMON=m
3106CONFIG_REED_SOLOMON_DEC16=y
3107CONFIG_TEXTSEARCH=y
3108CONFIG_TEXTSEARCH_KMP=m
3109CONFIG_TEXTSEARCH_BM=m
3110CONFIG_TEXTSEARCH_FSM=m
3111CONFIG_PLIST=y
3112CONFIG_HAS_IOMEM=y
3113CONFIG_HAS_IOPORT=y
3114CONFIG_HAS_DMA=y
3115CONFIG_CHECK_SIGNATURE=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 2f28557f3d72..3ed991ae0ebe 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -70,7 +70,6 @@ CONFIG_SIBYTE_HAS_LDT=y
70CONFIG_SIBYTE_CFE=y 70CONFIG_SIBYTE_CFE=y
71# CONFIG_SIBYTE_CFE_CONSOLE is not set 71# CONFIG_SIBYTE_CFE_CONSOLE is not set
72# CONFIG_SIBYTE_BUS_WATCHER is not set 72# CONFIG_SIBYTE_BUS_WATCHER is not set
73# CONFIG_SIBYTE_SB1250_PROF is not set
74# CONFIG_SIBYTE_TBPROF is not set 73# CONFIG_SIBYTE_TBPROF is not set
75CONFIG_RWSEM_GENERIC_SPINLOCK=y 74CONFIG_RWSEM_GENERIC_SPINLOCK=y
76# CONFIG_ARCH_HAS_ILOG2_U32 is not set 75# CONFIG_ARCH_HAS_ILOG2_U32 is not set
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 6d55e8aab668..6a17c9b508ea 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -263,7 +263,7 @@ static inline void dec_kn03_be_init(void)
263 */ 263 */
264 *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | 264 *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) |
265 KN03_MCR_CORRECT; 265 KN03_MCR_CORRECT;
266 if (current_cpu_data.cputype == CPU_R4400SC) 266 if (current_cpu_type() == CPU_R4400SC)
267 *mbcs |= KN4K_MB_CSR_EE; 267 *mbcs |= KN4K_MB_CSR_EE;
268 fast_iob(); 268 fast_iob();
269} 269}
diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c
index 7a053aadcd3a..5f04545c3606 100644
--- a/arch/mips/dec/kn02xa-berr.c
+++ b/arch/mips/dec/kn02xa-berr.c
@@ -132,7 +132,7 @@ void __init dec_kn02xa_be_init(void)
132 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); 132 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
133 133
134 /* For KN04 we need to make sure EE (?) is enabled in the MB. */ 134 /* For KN04 we need to make sure EE (?) is enabled in the MB. */
135 if (current_cpu_data.cputype == CPU_R4000SC) 135 if (current_cpu_type() == CPU_R4000SC)
136 *mbcs |= KN4K_MB_CSR_EE; 136 *mbcs |= KN4K_MB_CSR_EE;
137 fast_iob(); 137 fast_iob();
138 138
diff --git a/arch/mips/dec/prom/identify.c b/arch/mips/dec/prom/identify.c
index cd85924e2572..95e26f4bb38f 100644
--- a/arch/mips/dec/prom/identify.c
+++ b/arch/mips/dec/prom/identify.c
@@ -133,9 +133,6 @@ void __init prom_identify_arch(u32 magic)
133 dec_firmrev = (dec_sysid & 0xff00) >> 8; 133 dec_firmrev = (dec_sysid & 0xff00) >> 8;
134 dec_etc = dec_sysid & 0xff; 134 dec_etc = dec_sysid & 0xff;
135 135
136 /* We're obviously one of the DEC machines */
137 mips_machgroup = MACH_GROUP_DEC;
138
139 /* 136 /*
140 * FIXME: This may not be an exhaustive list of DECStations/Servers! 137 * FIXME: This may not be an exhaustive list of DECStations/Servers!
141 * Put all model-specific initialisation calls here. 138 * Put all model-specific initialisation calls here.
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 808c182fd3fa..93f1239af524 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -108,8 +108,8 @@ void __init prom_init(void)
108 108
109 /* Were we compiled with the right CPU option? */ 109 /* Were we compiled with the right CPU option? */
110#if defined(CONFIG_CPU_R3000) 110#if defined(CONFIG_CPU_R3000)
111 if ((current_cpu_data.cputype == CPU_R4000SC) || 111 if ((current_cpu_type() == CPU_R4000SC) ||
112 (current_cpu_data.cputype == CPU_R4400SC)) { 112 (current_cpu_type() == CPU_R4400SC)) {
113 static char r4k_msg[] __initdata = 113 static char r4k_msg[] __initdata =
114 "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n"; 114 "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
115 printk(cpu_msg); 115 printk(cpu_msg);
@@ -119,8 +119,8 @@ void __init prom_init(void)
119#endif 119#endif
120 120
121#if defined(CONFIG_CPU_R4X00) 121#if defined(CONFIG_CPU_R4X00)
122 if ((current_cpu_data.cputype == CPU_R3000) || 122 if ((current_cpu_type() == CPU_R3000) ||
123 (current_cpu_data.cputype == CPU_R3000A)) { 123 (current_cpu_type() == CPU_R3000A)) {
124 static char r3k_msg[] __initdata = 124 static char r3k_msg[] __initdata =
125 "Please recompile with \"CONFIG_CPU_R3000 = y\".\n"; 125 "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
126 printk(cpu_msg); 126 printk(cpu_msg);
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 3e634f2f5443..bd5431e1f408 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -145,13 +145,9 @@ static void __init dec_be_init(void)
145 } 145 }
146} 146}
147 147
148
149extern void dec_time_init(void);
150
151void __init plat_mem_setup(void) 148void __init plat_mem_setup(void)
152{ 149{
153 board_be_init = dec_be_init; 150 board_be_init = dec_be_init;
154 board_time_init = dec_time_init;
155 151
156 wbflush_setup(); 152 wbflush_setup();
157 153
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 8b7e0c17ac35..820e5331205f 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
26#include <asm/cpu.h> 26#include <asm/cpu.h>
27#include <asm/div64.h>
28#include <asm/io.h> 27#include <asm/io.h>
29#include <asm/irq.h> 28#include <asm/irq.h>
30#include <asm/mipsregs.h> 29#include <asm/mipsregs.h>
@@ -36,7 +35,7 @@
36#include <asm/dec/ioasic_addrs.h> 35#include <asm/dec/ioasic_addrs.h>
37#include <asm/dec/machtype.h> 36#include <asm/dec/machtype.h>
38 37
39static unsigned long dec_rtc_get_time(void) 38unsigned long read_persistent_clock(void)
40{ 39{
41 unsigned int year, mon, day, hour, min, sec, real_year; 40 unsigned int year, mon, day, hour, min, sec, real_year;
42 unsigned long flags; 41 unsigned long flags;
@@ -75,13 +74,13 @@ static unsigned long dec_rtc_get_time(void)
75} 74}
76 75
77/* 76/*
78 * In order to set the CMOS clock precisely, dec_rtc_set_mmss has to 77 * In order to set the CMOS clock precisely, rtc_mips_set_mmss has to
79 * be called 500 ms after the second nowtime has started, because when 78 * be called 500 ms after the second nowtime has started, because when
80 * nowtime is written into the registers of the CMOS clock, it will 79 * nowtime is written into the registers of the CMOS clock, it will
81 * jump to the next second precisely 500 ms later. Check the Dallas 80 * jump to the next second precisely 500 ms later. Check the Dallas
82 * DS1287 data sheet for details. 81 * DS1287 data sheet for details.
83 */ 82 */
84static int dec_rtc_set_mmss(unsigned long nowtime) 83int rtc_mips_set_mmss(unsigned long nowtime)
85{ 84{
86 int retval = 0; 85 int retval = 0;
87 int real_seconds, real_minutes, cmos_minutes; 86 int real_seconds, real_minutes, cmos_minutes;
@@ -140,7 +139,6 @@ static int dec_rtc_set_mmss(unsigned long nowtime)
140 return retval; 139 return retval;
141} 140}
142 141
143
144static int dec_timer_state(void) 142static int dec_timer_state(void)
145{ 143{
146 return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; 144 return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0;
@@ -161,11 +159,8 @@ static cycle_t dec_ioasic_hpt_read(void)
161} 159}
162 160
163 161
164void __init dec_time_init(void) 162void __init plat_time_init(void)
165{ 163{
166 rtc_mips_get_time = dec_rtc_get_time;
167 rtc_mips_set_mmss = dec_rtc_set_mmss;
168
169 mips_timer_state = dec_timer_state; 164 mips_timer_state = dec_timer_state;
170 mips_timer_ack = dec_timer_ack; 165 mips_timer_ack = dec_timer_ack;
171 166
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index 7433bd8e5562..0f791eb6bb66 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -62,8 +62,6 @@ void __init prom_init(void)
62 strcat(arcs_cmdline, " "); 62 strcat(arcs_cmdline, " ");
63 } 63 }
64 64
65 mips_machgroup = MACH_GROUP_NEC_EMMA2RH;
66
67#if defined(CONFIG_MARKEINS) 65#if defined(CONFIG_MARKEINS)
68 mips_machtype = MACH_NEC_MARKEINS; 66 mips_machtype = MACH_NEC_MARKEINS;
69 add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM); 67 add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
index 2f060e1ed36c..5e1da53b04a7 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -88,7 +88,7 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
88 return clock[reg]; 88 return clock[reg];
89} 89}
90 90
91static void __init emma2rh_time_init(void) 91void __init plat_time_init(void)
92{ 92{
93 u32 reg; 93 u32 reg;
94 if (bus_frequency == 0) 94 if (bus_frequency == 0)
@@ -124,8 +124,6 @@ void __init plat_mem_setup(void)
124 124
125 set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); 125 set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
126 126
127 board_time_init = emma2rh_time_init;
128
129 _machine_restart = markeins_machine_restart; 127 _machine_restart = markeins_machine_restart;
130 _machine_halt = markeins_machine_halt; 128 _machine_halt = markeins_machine_halt;
131 pm_power_off = markeins_machine_power_off; 129 pm_power_off = markeins_machine_power_off;
diff --git a/arch/mips/arc/Makefile b/arch/mips/fw/arc/Makefile
index 4f349ec1ea2d..4f349ec1ea2d 100644
--- a/arch/mips/arc/Makefile
+++ b/arch/mips/fw/arc/Makefile
diff --git a/arch/mips/arc/arc_con.c b/arch/mips/fw/arc/arc_con.c
index bc32fe64f42a..bc32fe64f42a 100644
--- a/arch/mips/arc/arc_con.c
+++ b/arch/mips/fw/arc/arc_con.c
diff --git a/arch/mips/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c
index fd604ef28823..fd604ef28823 100644
--- a/arch/mips/arc/cmdline.c
+++ b/arch/mips/fw/arc/cmdline.c
diff --git a/arch/mips/fw/arc/env.c b/arch/mips/fw/arc/env.c
new file mode 100644
index 000000000000..6f5dd42b96e2
--- /dev/null
+++ b/arch/mips/fw/arc/env.c
@@ -0,0 +1,27 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * env.c: ARCS environment variable routines.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 */
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13
14#include <asm/fw/arc/types.h>
15#include <asm/sgialib.h>
16
17PCHAR __init
18ArcGetEnvironmentVariable(CHAR *name)
19{
20 return (CHAR *) ARC_CALL1(get_evar, name);
21}
22
23LONG __init
24ArcSetEnvironmentVariable(PCHAR name, PCHAR value)
25{
26 return ARC_CALL2(set_evar, name, value);
27}
diff --git a/arch/mips/fw/arc/file.c b/arch/mips/fw/arc/file.c
new file mode 100644
index 000000000000..30335341b447
--- /dev/null
+++ b/arch/mips/fw/arc/file.c
@@ -0,0 +1,75 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * ARC firmware interface.
7 *
8 * Copyright (C) 1994, 1995, 1996, 1999 Ralf Baechle
9 * Copyright (C) 1999 Silicon Graphics, Inc.
10 */
11#include <linux/init.h>
12
13#include <asm/fw/arc/types.h>
14#include <asm/sgialib.h>
15
16LONG
17ArcGetDirectoryEntry(ULONG FileID, struct linux_vdirent *Buffer,
18 ULONG N, ULONG *Count)
19{
20 return ARC_CALL4(get_vdirent, FileID, Buffer, N, Count);
21}
22
23LONG
24ArcOpen(CHAR *Path, enum linux_omode OpenMode, ULONG *FileID)
25{
26 return ARC_CALL3(open, Path, OpenMode, FileID);
27}
28
29LONG
30ArcClose(ULONG FileID)
31{
32 return ARC_CALL1(close, FileID);
33}
34
35LONG
36ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count)
37{
38 return ARC_CALL4(read, FileID, Buffer, N, Count);
39}
40
41LONG
42ArcGetReadStatus(ULONG FileID)
43{
44 return ARC_CALL1(get_rstatus, FileID);
45}
46
47LONG
48ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count)
49{
50 return ARC_CALL4(write, FileID, Buffer, N, Count);
51}
52
53LONG
54ArcSeek(ULONG FileID, struct linux_bigint *Position, enum linux_seekmode SeekMode)
55{
56 return ARC_CALL3(seek, FileID, Position, SeekMode);
57}
58
59LONG
60ArcMount(char *name, enum linux_mountops op)
61{
62 return ARC_CALL2(mount, name, op);
63}
64
65LONG
66ArcGetFileInformation(ULONG FileID, struct linux_finfo *Information)
67{
68 return ARC_CALL2(get_finfo, FileID, Information);
69}
70
71LONG ArcSetFileInformation(ULONG FileID, ULONG AttributeFlags,
72 ULONG AttributeMask)
73{
74 return ARC_CALL3(set_finfo, FileID, AttributeFlags, AttributeMask);
75}
diff --git a/arch/mips/fw/arc/identify.c b/arch/mips/fw/arc/identify.c
new file mode 100644
index 000000000000..28dfd2e2989a
--- /dev/null
+++ b/arch/mips/fw/arc/identify.c
@@ -0,0 +1,121 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * identify.c: identify machine by looking up system identifier
7 *
8 * Copyright (C) 1998 Thomas Bogendoerfer
9 *
10 * This code is based on arch/mips/sgi/kernel/system.c, which is
11 *
12 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/string.h>
18
19#include <asm/sgialib.h>
20#include <asm/bootinfo.h>
21
22struct smatch {
23 char *arcname;
24 char *liname;
25 int type;
26 int flags;
27};
28
29static struct smatch mach_table[] = {
30 {
31 .arcname = "SGI-IP22",
32 .liname = "SGI Indy",
33 .type = MACH_SGI_IP22,
34 .flags = PROM_FLAG_ARCS,
35 }, {
36 .arcname = "SGI-IP27",
37 .liname = "SGI Origin",
38 .type = MACH_SGI_IP27,
39 .flags = PROM_FLAG_ARCS,
40 }, {
41 .arcname = "SGI-IP28",
42 .liname = "SGI IP28",
43 .type = MACH_SGI_IP28,
44 .flags = PROM_FLAG_ARCS,
45 }, {
46 .arcname = "SGI-IP30",
47 .liname = "SGI Octane",
48 .type = MACH_SGI_IP30,
49 .flags = PROM_FLAG_ARCS,
50 }, {
51 .arcname = "SGI-IP32",
52 .liname = "SGI O2",
53 .type = MACH_SGI_IP32,
54 .flags = PROM_FLAG_ARCS,
55 }, {
56 .arcname = "Microsoft-Jazz",
57 .liname = "Jazz MIPS_Magnum_4000",
58 .type = MACH_MIPS_MAGNUM_4000,
59 .flags = 0,
60 }, {
61 .arcname = "PICA-61",
62 .liname = "Jazz Acer_PICA_61",
63 .type = MACH_ACER_PICA_61,
64 .flags = 0,
65 }, {
66 .arcname = "RM200PCI",
67 .liname = "SNI RM200_PCI",
68 .type = MACH_SNI_RM200_PCI,
69 .flags = PROM_FLAG_DONT_FREE_TEMP,
70 }
71};
72
73int prom_flags;
74
75static struct smatch * __init string_to_mach(const char *s)
76{
77 int i;
78
79 for (i = 0; i < ARRAY_SIZE(mach_table); i++) {
80 if (!strcmp(s, mach_table[i].arcname))
81 return &mach_table[i];
82 }
83
84 panic("Yeee, could not determine architecture type <%s>", s);
85}
86
87char *system_type;
88
89const char *get_system_type(void)
90{
91 return system_type;
92}
93
94void __init prom_identify_arch(void)
95{
96 pcomponent *p;
97 struct smatch *mach;
98 const char *iname;
99
100 /*
101 * The root component tells us what machine architecture we have here.
102 */
103 p = ArcGetChild(PROM_NULL_COMPONENT);
104 if (p == NULL) {
105#ifdef CONFIG_SGI_IP27
106 /* IP27 PROM misbehaves, seems to not implement ARC
107 GetChild(). So we just assume it's an IP27. */
108 iname = "SGI-IP27";
109#else
110 iname = "Unknown";
111#endif
112 } else
113 iname = (char *) (long) p->iname;
114
115 printk("ARCH: %s\n", iname);
116 mach = string_to_mach(iname);
117 system_type = mach->liname;
118
119 mips_machtype = mach->type;
120 prom_flags = mach->flags;
121}
diff --git a/arch/mips/arc/init.c b/arch/mips/fw/arc/init.c
index e2f75b13312f..e2f75b13312f 100644
--- a/arch/mips/arc/init.c
+++ b/arch/mips/fw/arc/init.c
diff --git a/arch/mips/fw/arc/memory.c b/arch/mips/fw/arc/memory.c
new file mode 100644
index 000000000000..8b8eea2b6cf6
--- /dev/null
+++ b/arch/mips/fw/arc/memory.c
@@ -0,0 +1,160 @@
1/*
2 * memory.c: PROM library functions for acquiring/using memory descriptors
3 * given to us from the ARCS firmware.
4 *
5 * Copyright (C) 1996 by David S. Miller
6 * Copyright (C) 1999, 2000, 2001 by Ralf Baechle
7 * Copyright (C) 1999, 2000 by Silicon Graphics, Inc.
8 *
9 * PROM library functions for acquiring/using memory descriptors given to us
10 * from the ARCS firmware. This is only used when CONFIG_ARC_MEMORY is set
11 * because on some machines like SGI IP27 the ARC memory configuration data
12 * completly bogus and alternate easier to use mechanisms are available.
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/sched.h>
18#include <linux/mm.h>
19#include <linux/bootmem.h>
20#include <linux/swap.h>
21
22#include <asm/sgialib.h>
23#include <asm/page.h>
24#include <asm/pgtable.h>
25#include <asm/bootinfo.h>
26
27#undef DEBUG
28
29/*
30 * For ARC firmware memory functions the unit of meassuring memory is always
31 * a 4k page of memory
32 */
33#define ARC_PAGE_SHIFT 12
34
35struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
36{
37 return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
38}
39
40#ifdef DEBUG /* convenient for debugging */
41static char *arcs_mtypes[8] = {
42 "Exception Block",
43 "ARCS Romvec Page",
44 "Free/Contig RAM",
45 "Generic Free RAM",
46 "Bad Memory",
47 "Standalone Program Pages",
48 "ARCS Temp Storage Area",
49 "ARCS Permanent Storage Area"
50};
51
52static char *arc_mtypes[8] = {
53 "Exception Block",
54 "SystemParameterBlock",
55 "FreeMemory",
56 "Bad Memory",
57 "LoadedProgram",
58 "FirmwareTemporary",
59 "FirmwarePermanent",
60 "FreeContiguous"
61};
62#define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] \
63 : arc_mtypes[a.arc]
64#endif
65
66static inline int memtype_classify_arcs(union linux_memtypes type)
67{
68 switch (type.arcs) {
69 case arcs_fcontig:
70 case arcs_free:
71 return BOOT_MEM_RAM;
72 case arcs_atmp:
73 return BOOT_MEM_ROM_DATA;
74 case arcs_eblock:
75 case arcs_rvpage:
76 case arcs_bmem:
77 case arcs_prog:
78 case arcs_aperm:
79 return BOOT_MEM_RESERVED;
80 default:
81 BUG();
82 }
83 while(1); /* Nuke warning. */
84}
85
86static inline int memtype_classify_arc(union linux_memtypes type)
87{
88 switch (type.arc) {
89 case arc_free:
90 case arc_fcontig:
91 return BOOT_MEM_RAM;
92 case arc_atmp:
93 return BOOT_MEM_ROM_DATA;
94 case arc_eblock:
95 case arc_rvpage:
96 case arc_bmem:
97 case arc_prog:
98 case arc_aperm:
99 return BOOT_MEM_RESERVED;
100 default:
101 BUG();
102 }
103 while(1); /* Nuke warning. */
104}
105
106static int __init prom_memtype_classify(union linux_memtypes type)
107{
108 if (prom_flags & PROM_FLAG_ARCS) /* SGI is ``different'' ... */
109 return memtype_classify_arcs(type);
110
111 return memtype_classify_arc(type);
112}
113
114void __init prom_meminit(void)
115{
116 struct linux_mdesc *p;
117
118#ifdef DEBUG
119 int i = 0;
120
121 printk("ARCS MEMORY DESCRIPTOR dump:\n");
122 p = ArcGetMemoryDescriptor(PROM_NULL_MDESC);
123 while(p) {
124 printk("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n",
125 i, p, p->base, p->pages, mtypes(p->type));
126 p = ArcGetMemoryDescriptor(p);
127 i++;
128 }
129#endif
130
131 p = PROM_NULL_MDESC;
132 while ((p = ArcGetMemoryDescriptor(p))) {
133 unsigned long base, size;
134 long type;
135
136 base = p->base << ARC_PAGE_SHIFT;
137 size = p->pages << ARC_PAGE_SHIFT;
138 type = prom_memtype_classify(p->type);
139
140 add_memory_region(base, size, type);
141 }
142}
143
144void __init prom_free_prom_memory(void)
145{
146 unsigned long addr;
147 int i;
148
149 if (prom_flags & PROM_FLAG_DONT_FREE_TEMP)
150 return;
151
152 for (i = 0; i < boot_mem_map.nr_map; i++) {
153 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
154 continue;
155
156 addr = boot_mem_map.map[i].addr;
157 free_init_pages("prom memory",
158 addr, addr + boot_mem_map.map[i].size);
159 }
160}
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
new file mode 100644
index 000000000000..e527c5fd5a32
--- /dev/null
+++ b/arch/mips/fw/arc/misc.c
@@ -0,0 +1,89 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Miscellaneous ARCS PROM routines.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14
15#include <asm/bcache.h>
16
17#include <asm/fw/arc/types.h>
18#include <asm/sgialib.h>
19#include <asm/bootinfo.h>
20#include <asm/system.h>
21
22VOID
23ArcHalt(VOID)
24{
25 bc_disable();
26 local_irq_disable();
27 ARC_CALL0(halt);
28never: goto never;
29}
30
31VOID
32ArcPowerDown(VOID)
33{
34 bc_disable();
35 local_irq_disable();
36 ARC_CALL0(pdown);
37never: goto never;
38}
39
40/* XXX is this a soft reset basically? XXX */
41VOID
42ArcRestart(VOID)
43{
44 bc_disable();
45 local_irq_disable();
46 ARC_CALL0(restart);
47never: goto never;
48}
49
50VOID
51ArcReboot(VOID)
52{
53 bc_disable();
54 local_irq_disable();
55 ARC_CALL0(reboot);
56never: goto never;
57}
58
59VOID
60ArcEnterInteractiveMode(VOID)
61{
62 bc_disable();
63 local_irq_disable();
64 ARC_CALL0(imode);
65never: goto never;
66}
67
68LONG
69ArcSaveConfiguration(VOID)
70{
71 return ARC_CALL0(cfg_save);
72}
73
74struct linux_sysid *
75ArcGetSystemId(VOID)
76{
77 return (struct linux_sysid *) ARC_CALL0(get_sysid);
78}
79
80VOID __init
81ArcFlushAllCaches(VOID)
82{
83 ARC_CALL0(cache_flush);
84}
85
86DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
87{
88 return (DISPLAY_STATUS *) ARC_CALL1(GetDisplayStatus, FileID);
89}
diff --git a/arch/mips/arc/promlib.c b/arch/mips/fw/arc/promlib.c
index c508c00dbb64..c508c00dbb64 100644
--- a/arch/mips/arc/promlib.c
+++ b/arch/mips/fw/arc/promlib.c
diff --git a/arch/mips/arc/salone.c b/arch/mips/fw/arc/salone.c
index e6afb64723d0..e6afb64723d0 100644
--- a/arch/mips/arc/salone.c
+++ b/arch/mips/fw/arc/salone.c
diff --git a/arch/mips/fw/arc/time.c b/arch/mips/fw/arc/time.c
new file mode 100644
index 000000000000..42138c837d48
--- /dev/null
+++ b/arch/mips/fw/arc/time.c
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Extracting time information from ARCS prom.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 */
10#include <linux/init.h>
11
12#include <asm/fw/arc/types.h>
13#include <asm/sgialib.h>
14
15struct linux_tinfo * __init
16ArcGetTime(VOID)
17{
18 return (struct linux_tinfo *) ARC_CALL0(get_tinfo);
19}
20
21ULONG __init
22ArcGetRelativeTime(VOID)
23{
24 return ARC_CALL0(get_rtime);
25}
diff --git a/arch/mips/fw/arc/tree.c b/arch/mips/fw/arc/tree.c
new file mode 100644
index 000000000000..d68e5a59c1f6
--- /dev/null
+++ b/arch/mips/fw/arc/tree.c
@@ -0,0 +1,127 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * PROM component device tree code.
7 *
8 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 */
12#include <linux/init.h>
13#include <asm/fw/arc/types.h>
14#include <asm/sgialib.h>
15
16#undef DEBUG_PROM_TREE
17
18pcomponent * __init
19ArcGetPeer(pcomponent *Current)
20{
21 if (Current == PROM_NULL_COMPONENT)
22 return PROM_NULL_COMPONENT;
23
24 return (pcomponent *) ARC_CALL1(next_component, Current);
25}
26
27pcomponent * __init
28ArcGetChild(pcomponent *Current)
29{
30 return (pcomponent *) ARC_CALL1(child_component, Current);
31}
32
33pcomponent * __init
34ArcGetParent(pcomponent *Current)
35{
36 if (Current == PROM_NULL_COMPONENT)
37 return PROM_NULL_COMPONENT;
38
39 return (pcomponent *) ARC_CALL1(parent_component, Current);
40}
41
42LONG __init
43ArcGetConfigurationData(VOID *Buffer, pcomponent *Current)
44{
45 return ARC_CALL2(component_data, Buffer, Current);
46}
47
48pcomponent * __init
49ArcAddChild(pcomponent *Current, pcomponent *Template, VOID *ConfigurationData)
50{
51 return (pcomponent *)
52 ARC_CALL3(child_add, Current, Template, ConfigurationData);
53}
54
55LONG __init
56ArcDeleteComponent(pcomponent *ComponentToDelete)
57{
58 return ARC_CALL1(comp_del, ComponentToDelete);
59}
60
61pcomponent * __init
62ArcGetComponent(CHAR *Path)
63{
64 return (pcomponent *)ARC_CALL1(component_by_path, Path);
65}
66
67#ifdef DEBUG_PROM_TREE
68
69static char *classes[] = {
70 "system", "processor", "cache", "adapter", "controller", "peripheral",
71 "memory"
72};
73
74static char *types[] = {
75 "arc", "cpu", "fpu", "picache", "pdcache", "sicache", "sdcache",
76 "sccache", "memdev", "eisa adapter", "tc adapter", "scsi adapter",
77 "dti adapter", "multi-func adapter", "disk controller",
78 "tp controller", "cdrom controller", "worm controller",
79 "serial controller", "net controller", "display controller",
80 "parallel controller", "pointer controller", "keyboard controller",
81 "audio controller", "misc controller", "disk peripheral",
82 "floppy peripheral", "tp peripheral", "modem peripheral",
83 "monitor peripheral", "printer peripheral", "pointer peripheral",
84 "keyboard peripheral", "terminal peripheral", "line peripheral",
85 "net peripheral", "misc peripheral", "anonymous"
86};
87
88static char *iflags[] = {
89 "bogus", "read only", "removable", "console in", "console out",
90 "input", "output"
91};
92
93static void __init
94dump_component(pcomponent *p)
95{
96 printk("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>",
97 p, classes[p->class], types[p->type],
98 iflags[p->iflags], p->vers, p->rev);
99 printk("key<%08lx>\n\tamask<%08lx>cdsize<%d>ilen<%d>iname<%s>\n",
100 p->key, p->amask, (int)p->cdsize, (int)p->ilen, p->iname);
101}
102
103static void __init
104traverse(pcomponent *p, int op)
105{
106 dump_component(p);
107 if(ArcGetChild(p))
108 traverse(ArcGetChild(p), 1);
109 if(ArcGetPeer(p) && op)
110 traverse(ArcGetPeer(p), 1);
111}
112
113void __init
114prom_testtree(void)
115{
116 pcomponent *p;
117
118 p = ArcGetChild(PROM_NULL_COMPONENT);
119 dump_component(p);
120 p = ArcGetChild(p);
121 while(p) {
122 dump_component(p);
123 p = ArcGetPeer(p);
124 }
125}
126
127#endif /* DEBUG_PROM_TREE */
diff --git a/arch/mips/fw/cfe/Makefile b/arch/mips/fw/cfe/Makefile
new file mode 100644
index 000000000000..8f20044c0adf
--- /dev/null
+++ b/arch/mips/fw/cfe/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Broadcom Common Firmware Environment support
3#
4
5lib-y += cfe_api.o
diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c
new file mode 100644
index 000000000000..a9f69e4e40ac
--- /dev/null
+++ b/arch/mips/fw/cfe/cfe_api.c
@@ -0,0 +1,502 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/* *********************************************************************
20 *
21 * Broadcom Common Firmware Environment (CFE)
22 *
23 * Device Function stubs File: cfe_api.c
24 *
25 * This module contains device function stubs (small routines to
26 * call the standard "iocb" interface entry point to CFE).
27 * There should be one routine here per iocb function call.
28 *
29 * Authors: Mitch Lichtenberg, Chris Demetriou
30 *
31 ********************************************************************* */
32
33#include <asm/fw/cfe/cfe_api.h>
34#include "cfe_api_int.h"
35
36/* Cast from a native pointer to a cfe_xptr_t and back. */
37#define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n))
38#define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x))
39
40#ifdef CFE_API_IMPL_NAMESPACE
41#define cfe_iocb_dispatch(a) __cfe_iocb_dispatch(a)
42#endif
43int cfe_iocb_dispatch(cfe_xiocb_t * xiocb);
44
45#if defined(CFE_API_common) || defined(CFE_API_ALL)
46/*
47 * Declare the dispatch function with args of "intptr_t".
48 * This makes sure whatever model we're compiling in
49 * puts the pointers in a single register. For example,
50 * combining -mlong64 and -mips1 or -mips2 would lead to
51 * trouble, since the handle and IOCB pointer will be
52 * passed in two registers each, and CFE expects one.
53 */
54
55static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb) = 0;
56static cfe_xuint_t cfe_handle = 0;
57
58int cfe_init(cfe_xuint_t handle, cfe_xuint_t ept)
59{
60 cfe_dispfunc = NATIVE_FROM_XPTR(ept);
61 cfe_handle = handle;
62 return 0;
63}
64
65int cfe_iocb_dispatch(cfe_xiocb_t * xiocb)
66{
67 if (!cfe_dispfunc)
68 return -1;
69 return (*cfe_dispfunc) ((intptr_t) cfe_handle, (intptr_t) xiocb);
70}
71#endif /* CFE_API_common || CFE_API_ALL */
72
73#if defined(CFE_API_close) || defined(CFE_API_ALL)
74int cfe_close(int handle)
75{
76 cfe_xiocb_t xiocb;
77
78 xiocb.xiocb_fcode = CFE_CMD_DEV_CLOSE;
79 xiocb.xiocb_status = 0;
80 xiocb.xiocb_handle = handle;
81 xiocb.xiocb_flags = 0;
82 xiocb.xiocb_psize = 0;
83
84 cfe_iocb_dispatch(&xiocb);
85
86 return xiocb.xiocb_status;
87
88}
89#endif /* CFE_API_close || CFE_API_ALL */
90
91#if defined(CFE_API_cpu_start) || defined(CFE_API_ALL)
92int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1)
93{
94 cfe_xiocb_t xiocb;
95
96 xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
97 xiocb.xiocb_status = 0;
98 xiocb.xiocb_handle = 0;
99 xiocb.xiocb_flags = 0;
100 xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t);
101 xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
102 xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START;
103 xiocb.plist.xiocb_cpuctl.gp_val = gp;
104 xiocb.plist.xiocb_cpuctl.sp_val = sp;
105 xiocb.plist.xiocb_cpuctl.a1_val = a1;
106 xiocb.plist.xiocb_cpuctl.start_addr = (long) fn;
107
108 cfe_iocb_dispatch(&xiocb);
109
110 return xiocb.xiocb_status;
111}
112#endif /* CFE_API_cpu_start || CFE_API_ALL */
113
114#if defined(CFE_API_cpu_stop) || defined(CFE_API_ALL)
115int cfe_cpu_stop(int cpu)
116{
117 cfe_xiocb_t xiocb;
118
119 xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
120 xiocb.xiocb_status = 0;
121 xiocb.xiocb_handle = 0;
122 xiocb.xiocb_flags = 0;
123 xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t);
124 xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
125 xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_STOP;
126
127 cfe_iocb_dispatch(&xiocb);
128
129 return xiocb.xiocb_status;
130}
131#endif /* CFE_API_cpu_stop || CFE_API_ALL */
132
133#if defined(CFE_API_enumenv) || defined(CFE_API_ALL)
134int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
135{
136 cfe_xiocb_t xiocb;
137
138 xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
139 xiocb.xiocb_status = 0;
140 xiocb.xiocb_handle = 0;
141 xiocb.xiocb_flags = 0;
142 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
143 xiocb.plist.xiocb_envbuf.enum_idx = idx;
144 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
145 xiocb.plist.xiocb_envbuf.name_length = namelen;
146 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
147 xiocb.plist.xiocb_envbuf.val_length = vallen;
148
149 cfe_iocb_dispatch(&xiocb);
150
151 return xiocb.xiocb_status;
152}
153#endif /* CFE_API_enumenv || CFE_API_ALL */
154
155#if defined(CFE_API_enummem) || defined(CFE_API_ALL)
156int
157cfe_enummem(int idx, int flags, cfe_xuint_t * start, cfe_xuint_t * length,
158 cfe_xuint_t * type)
159{
160 cfe_xiocb_t xiocb;
161
162 xiocb.xiocb_fcode = CFE_CMD_FW_MEMENUM;
163 xiocb.xiocb_status = 0;
164 xiocb.xiocb_handle = 0;
165 xiocb.xiocb_flags = flags;
166 xiocb.xiocb_psize = sizeof(xiocb_meminfo_t);
167 xiocb.plist.xiocb_meminfo.mi_idx = idx;
168
169 cfe_iocb_dispatch(&xiocb);
170
171 if (xiocb.xiocb_status < 0)
172 return xiocb.xiocb_status;
173
174 *start = xiocb.plist.xiocb_meminfo.mi_addr;
175 *length = xiocb.plist.xiocb_meminfo.mi_size;
176 *type = xiocb.plist.xiocb_meminfo.mi_type;
177
178 return 0;
179}
180#endif /* CFE_API_enummem || CFE_API_ALL */
181
182#if defined(CFE_API_exit) || defined(CFE_API_ALL)
183int cfe_exit(int warm, int status)
184{
185 cfe_xiocb_t xiocb;
186
187 xiocb.xiocb_fcode = CFE_CMD_FW_RESTART;
188 xiocb.xiocb_status = 0;
189 xiocb.xiocb_handle = 0;
190 xiocb.xiocb_flags = warm ? CFE_FLG_WARMSTART : 0;
191 xiocb.xiocb_psize = sizeof(xiocb_exitstat_t);
192 xiocb.plist.xiocb_exitstat.status = status;
193
194 cfe_iocb_dispatch(&xiocb);
195
196 return xiocb.xiocb_status;
197}
198#endif /* CFE_API_exit || CFE_API_ALL */
199
200#if defined(CFE_API_flushcache) || defined(CFE_API_ALL)
201int cfe_flushcache(int flg)
202{
203 cfe_xiocb_t xiocb;
204
205 xiocb.xiocb_fcode = CFE_CMD_FW_FLUSHCACHE;
206 xiocb.xiocb_status = 0;
207 xiocb.xiocb_handle = 0;
208 xiocb.xiocb_flags = flg;
209 xiocb.xiocb_psize = 0;
210
211 cfe_iocb_dispatch(&xiocb);
212
213 return xiocb.xiocb_status;
214}
215#endif /* CFE_API_flushcache || CFE_API_ALL */
216
217#if defined(CFE_API_getdevinfo) || defined(CFE_API_ALL)
218int cfe_getdevinfo(char *name)
219{
220 cfe_xiocb_t xiocb;
221
222 xiocb.xiocb_fcode = CFE_CMD_DEV_GETINFO;
223 xiocb.xiocb_status = 0;
224 xiocb.xiocb_handle = 0;
225 xiocb.xiocb_flags = 0;
226 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
227 xiocb.plist.xiocb_buffer.buf_offset = 0;
228 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
229 xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name);
230
231 cfe_iocb_dispatch(&xiocb);
232
233 if (xiocb.xiocb_status < 0)
234 return xiocb.xiocb_status;
235 return xiocb.plist.xiocb_buffer.buf_devflags;
236}
237#endif /* CFE_API_getdevinfo || CFE_API_ALL */
238
239#if defined(CFE_API_getenv) || defined(CFE_API_ALL)
240int cfe_getenv(char *name, char *dest, int destlen)
241{
242 cfe_xiocb_t xiocb;
243
244 *dest = 0;
245
246 xiocb.xiocb_fcode = CFE_CMD_ENV_GET;
247 xiocb.xiocb_status = 0;
248 xiocb.xiocb_handle = 0;
249 xiocb.xiocb_flags = 0;
250 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
251 xiocb.plist.xiocb_envbuf.enum_idx = 0;
252 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
253 xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name);
254 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(dest);
255 xiocb.plist.xiocb_envbuf.val_length = destlen;
256
257 cfe_iocb_dispatch(&xiocb);
258
259 return xiocb.xiocb_status;
260}
261#endif /* CFE_API_getenv || CFE_API_ALL */
262
263#if defined(CFE_API_getfwinfo) || defined(CFE_API_ALL)
264int cfe_getfwinfo(cfe_fwinfo_t * info)
265{
266 cfe_xiocb_t xiocb;
267
268 xiocb.xiocb_fcode = CFE_CMD_FW_GETINFO;
269 xiocb.xiocb_status = 0;
270 xiocb.xiocb_handle = 0;
271 xiocb.xiocb_flags = 0;
272 xiocb.xiocb_psize = sizeof(xiocb_fwinfo_t);
273
274 cfe_iocb_dispatch(&xiocb);
275
276 if (xiocb.xiocb_status < 0)
277 return xiocb.xiocb_status;
278
279 info->fwi_version = xiocb.plist.xiocb_fwinfo.fwi_version;
280 info->fwi_totalmem = xiocb.plist.xiocb_fwinfo.fwi_totalmem;
281 info->fwi_flags = xiocb.plist.xiocb_fwinfo.fwi_flags;
282 info->fwi_boardid = xiocb.plist.xiocb_fwinfo.fwi_boardid;
283 info->fwi_bootarea_va = xiocb.plist.xiocb_fwinfo.fwi_bootarea_va;
284 info->fwi_bootarea_pa = xiocb.plist.xiocb_fwinfo.fwi_bootarea_pa;
285 info->fwi_bootarea_size =
286 xiocb.plist.xiocb_fwinfo.fwi_bootarea_size;
287#if 0
288 info->fwi_reserved1 = xiocb.plist.xiocb_fwinfo.fwi_reserved1;
289 info->fwi_reserved2 = xiocb.plist.xiocb_fwinfo.fwi_reserved2;
290 info->fwi_reserved3 = xiocb.plist.xiocb_fwinfo.fwi_reserved3;
291#endif
292
293 return 0;
294}
295#endif /* CFE_API_getfwinfo || CFE_API_ALL */
296
297#if defined(CFE_API_getstdhandle) || defined(CFE_API_ALL)
298int cfe_getstdhandle(int flg)
299{
300 cfe_xiocb_t xiocb;
301
302 xiocb.xiocb_fcode = CFE_CMD_DEV_GETHANDLE;
303 xiocb.xiocb_status = 0;
304 xiocb.xiocb_handle = 0;
305 xiocb.xiocb_flags = flg;
306 xiocb.xiocb_psize = 0;
307
308 cfe_iocb_dispatch(&xiocb);
309
310 if (xiocb.xiocb_status < 0)
311 return xiocb.xiocb_status;
312 return xiocb.xiocb_handle;
313}
314#endif /* CFE_API_getstdhandle || CFE_API_ALL */
315
316#if defined(CFE_API_getticks) || defined(CFE_API_ALL)
317int64_t
318#ifdef CFE_API_IMPL_NAMESPACE
319__cfe_getticks(void)
320#else
321cfe_getticks(void)
322#endif
323{
324 cfe_xiocb_t xiocb;
325
326 xiocb.xiocb_fcode = CFE_CMD_FW_GETTIME;
327 xiocb.xiocb_status = 0;
328 xiocb.xiocb_handle = 0;
329 xiocb.xiocb_flags = 0;
330 xiocb.xiocb_psize = sizeof(xiocb_time_t);
331 xiocb.plist.xiocb_time.ticks = 0;
332
333 cfe_iocb_dispatch(&xiocb);
334
335 return xiocb.plist.xiocb_time.ticks;
336
337}
338#endif /* CFE_API_getticks || CFE_API_ALL */
339
340#if defined(CFE_API_inpstat) || defined(CFE_API_ALL)
341int cfe_inpstat(int handle)
342{
343 cfe_xiocb_t xiocb;
344
345 xiocb.xiocb_fcode = CFE_CMD_DEV_INPSTAT;
346 xiocb.xiocb_status = 0;
347 xiocb.xiocb_handle = handle;
348 xiocb.xiocb_flags = 0;
349 xiocb.xiocb_psize = sizeof(xiocb_inpstat_t);
350 xiocb.plist.xiocb_inpstat.inp_status = 0;
351
352 cfe_iocb_dispatch(&xiocb);
353
354 if (xiocb.xiocb_status < 0)
355 return xiocb.xiocb_status;
356 return xiocb.plist.xiocb_inpstat.inp_status;
357}
358#endif /* CFE_API_inpstat || CFE_API_ALL */
359
360#if defined(CFE_API_ioctl) || defined(CFE_API_ALL)
361int
362cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
363 int length, int *retlen, cfe_xuint_t offset)
364{
365 cfe_xiocb_t xiocb;
366
367 xiocb.xiocb_fcode = CFE_CMD_DEV_IOCTL;
368 xiocb.xiocb_status = 0;
369 xiocb.xiocb_handle = handle;
370 xiocb.xiocb_flags = 0;
371 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
372 xiocb.plist.xiocb_buffer.buf_offset = offset;
373 xiocb.plist.xiocb_buffer.buf_ioctlcmd = ioctlnum;
374 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
375 xiocb.plist.xiocb_buffer.buf_length = length;
376
377 cfe_iocb_dispatch(&xiocb);
378
379 if (retlen)
380 *retlen = xiocb.plist.xiocb_buffer.buf_retlen;
381 return xiocb.xiocb_status;
382}
383#endif /* CFE_API_ioctl || CFE_API_ALL */
384
385#if defined(CFE_API_open) || defined(CFE_API_ALL)
386int cfe_open(char *name)
387{
388 cfe_xiocb_t xiocb;
389
390 xiocb.xiocb_fcode = CFE_CMD_DEV_OPEN;
391 xiocb.xiocb_status = 0;
392 xiocb.xiocb_handle = 0;
393 xiocb.xiocb_flags = 0;
394 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
395 xiocb.plist.xiocb_buffer.buf_offset = 0;
396 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
397 xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name);
398
399 cfe_iocb_dispatch(&xiocb);
400
401 if (xiocb.xiocb_status < 0)
402 return xiocb.xiocb_status;
403 return xiocb.xiocb_handle;
404}
405#endif /* CFE_API_open || CFE_API_ALL */
406
407#if defined(CFE_API_read) || defined(CFE_API_ALL)
408int cfe_read(int handle, unsigned char *buffer, int length)
409{
410 return cfe_readblk(handle, 0, buffer, length);
411}
412#endif /* CFE_API_read || CFE_API_ALL */
413
414#if defined(CFE_API_readblk) || defined(CFE_API_ALL)
415int
416cfe_readblk(int handle, cfe_xint_t offset, unsigned char *buffer,
417 int length)
418{
419 cfe_xiocb_t xiocb;
420
421 xiocb.xiocb_fcode = CFE_CMD_DEV_READ;
422 xiocb.xiocb_status = 0;
423 xiocb.xiocb_handle = handle;
424 xiocb.xiocb_flags = 0;
425 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
426 xiocb.plist.xiocb_buffer.buf_offset = offset;
427 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
428 xiocb.plist.xiocb_buffer.buf_length = length;
429
430 cfe_iocb_dispatch(&xiocb);
431
432 if (xiocb.xiocb_status < 0)
433 return xiocb.xiocb_status;
434 return xiocb.plist.xiocb_buffer.buf_retlen;
435}
436#endif /* CFE_API_readblk || CFE_API_ALL */
437
438#if defined(CFE_API_setenv) || defined(CFE_API_ALL)
439int cfe_setenv(char *name, char *val)
440{
441 cfe_xiocb_t xiocb;
442
443 xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
444 xiocb.xiocb_status = 0;
445 xiocb.xiocb_handle = 0;
446 xiocb.xiocb_flags = 0;
447 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
448 xiocb.plist.xiocb_envbuf.enum_idx = 0;
449 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
450 xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name);
451 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
452 xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);
453
454 cfe_iocb_dispatch(&xiocb);
455
456 return xiocb.xiocb_status;
457}
458#endif /* CFE_API_setenv || CFE_API_ALL */
459
460#if (defined(CFE_API_strlen) || defined(CFE_API_ALL)) \
461 && !defined(CFE_API_STRLEN_CUSTOM)
462int cfe_strlen(char *name)
463{
464 int count = 0;
465
466 while (*name++)
467 count++;
468
469 return count;
470}
471#endif /* CFE_API_strlen || CFE_API_ALL */
472
473#if defined(CFE_API_write) || defined(CFE_API_ALL)
474int cfe_write(int handle, unsigned char *buffer, int length)
475{
476 return cfe_writeblk(handle, 0, buffer, length);
477}
478#endif /* CFE_API_write || CFE_API_ALL */
479
480#if defined(CFE_API_writeblk) || defined(CFE_API_ALL)
481int
482cfe_writeblk(int handle, cfe_xint_t offset, unsigned char *buffer,
483 int length)
484{
485 cfe_xiocb_t xiocb;
486
487 xiocb.xiocb_fcode = CFE_CMD_DEV_WRITE;
488 xiocb.xiocb_status = 0;
489 xiocb.xiocb_handle = handle;
490 xiocb.xiocb_flags = 0;
491 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
492 xiocb.plist.xiocb_buffer.buf_offset = offset;
493 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
494 xiocb.plist.xiocb_buffer.buf_length = length;
495
496 cfe_iocb_dispatch(&xiocb);
497
498 if (xiocb.xiocb_status < 0)
499 return xiocb.xiocb_status;
500 return xiocb.plist.xiocb_buffer.buf_retlen;
501}
502#endif /* CFE_API_writeblk || CFE_API_ALL */
diff --git a/arch/mips/sibyte/cfe/cfe_api_int.h b/arch/mips/fw/cfe/cfe_api_int.h
index f7e5a64b55f3..f7e5a64b55f3 100644
--- a/arch/mips/sibyte/cfe/cfe_api_int.h
+++ b/arch/mips/fw/cfe/cfe_api_int.h
diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile
index bef15c90ae15..b49d282bee8a 100644
--- a/arch/mips/gt64120/wrppmc/Makefile
+++ b/arch/mips/gt64120/wrppmc/Makefile
@@ -9,6 +9,6 @@
9# Makefile for the Wind River MIPS 4KC PPMC Eval Board 9# Makefile for the Wind River MIPS 4KC PPMC Eval Board
10# 10#
11 11
12obj-y += irq.o reset.o setup.o time.o pci.o 12obj-y += irq.o pci.o reset.o serial.o setup.o time.o
13 13
14EXTRA_CFLAGS += -Werror 14EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 06177bf5b1d6..c6e706274db4 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -9,26 +9,13 @@
9 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12#include <linux/errno.h> 12#include <linux/hardirq.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel_stat.h> 14#include <linux/irq.h>
15#include <linux/module.h> 15
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/types.h>
19#include <linux/interrupt.h>
20#include <linux/ioport.h>
21#include <linux/timex.h>
22#include <linux/slab.h>
23#include <linux/random.h>
24#include <linux/bitops.h>
25#include <asm/bootinfo.h>
26#include <asm/io.h>
27#include <asm/bitops.h>
28#include <asm/mipsregs.h>
29#include <asm/system.h>
30#include <asm/irq_cpu.h>
31#include <asm/gt64120.h> 16#include <asm/gt64120.h>
17#include <asm/irq_cpu.h>
18#include <asm/mipsregs.h>
32 19
33asmlinkage void plat_irq_dispatch(void) 20asmlinkage void plat_irq_dispatch(void)
34{ 21{
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
index 0d5289bc1804..d06192faeb7c 100644
--- a/arch/mips/gt64120/wrppmc/pci.c
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -8,9 +8,10 @@
8 * for more details. 8 * for more details.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/ioport.h>
11#include <linux/types.h> 12#include <linux/types.h>
12#include <linux/pci.h> 13#include <linux/pci.h>
13#include <linux/kernel.h> 14
14#include <asm/gt64120.h> 15#include <asm/gt64120.h>
15 16
16extern struct pci_ops gt64xxx_pci0_ops; 17extern struct pci_ops gt64xxx_pci0_ops;
diff --git a/arch/mips/gt64120/wrppmc/reset.c b/arch/mips/gt64120/wrppmc/reset.c
index b97039c6d3db..c355cff38f6c 100644
--- a/arch/mips/gt64120/wrppmc/reset.c
+++ b/arch/mips/gt64120/wrppmc/reset.c
@@ -5,14 +5,10 @@
5 * 5 *
6 * Copyright (C) 1997 Ralf Baechle 6 * Copyright (C) 1997 Ralf Baechle
7 */ 7 */
8#include <linux/sched.h> 8#include <linux/kernel.h>
9#include <linux/mm.h> 9
10#include <asm/io.h>
11#include <asm/pgtable.h>
12#include <asm/processor.h>
13#include <asm/reboot.h>
14#include <asm/system.h>
15#include <asm/cacheflush.h> 10#include <asm/cacheflush.h>
11#include <asm/mipsregs.h>
16 12
17void wrppmc_machine_restart(char *command) 13void wrppmc_machine_restart(char *command)
18{ 14{
diff --git a/arch/mips/gt64120/wrppmc/serial.c b/arch/mips/gt64120/wrppmc/serial.c
new file mode 100644
index 000000000000..5ec1c2ffd3a5
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/serial.c
@@ -0,0 +1,80 @@
1/*
2 * Registration of WRPPMC UART platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24#include <linux/serial_8250.h>
25
26#include <asm/gt64120.h>
27
28static struct resource wrppmc_uart_resource[] __initdata = {
29 {
30 .start = WRPPMC_UART16550_BASE,
31 .end = WRPPMC_UART16550_BASE + 7,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = WRPPMC_UART16550_IRQ,
36 .end = WRPPMC_UART16550_IRQ,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41static struct plat_serial8250_port wrppmc_serial8250_port[] = {
42 {
43 .irq = WRPPMC_UART16550_IRQ,
44 .uartclk = WRPPMC_UART16550_CLOCK,
45 .iotype = UPIO_MEM,
46 .flags = UPF_IOREMAP | UPF_SKIP_TEST,
47 .mapbase = WRPPMC_UART16550_BASE,
48 },
49 {},
50};
51
52static __init int wrppmc_uart_add(void)
53{
54 struct platform_device *pdev;
55 int retval;
56
57 pdev = platform_device_alloc("serial8250", -1);
58 if (!pdev)
59 return -ENOMEM;
60
61 pdev->id = PLAT8250_DEV_PLATFORM;
62 pdev->dev.platform_data = wrppmc_serial8250_port;
63
64 retval = platform_device_add_resources(pdev, wrppmc_uart_resource,
65 ARRAY_SIZE(wrppmc_uart_resource));
66 if (retval)
67 goto err_free_device;
68
69 retval = platform_device_add(pdev);
70 if (retval)
71 goto err_free_device;
72
73 return 0;
74
75err_free_device:
76 platform_device_put(pdev);
77
78 return retval;
79}
80device_initcall(wrppmc_uart_add);
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index ed58c13b6032..51f6b7862460 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -11,10 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/tty.h>
15#include <linux/serial.h>
16#include <linux/serial_core.h>
17#include <linux/serial_8250.h>
18#include <linux/pm.h> 14#include <linux/pm.h>
19 15
20#include <asm/io.h> 16#include <asm/io.h>
@@ -98,35 +94,8 @@ void __init prom_free_prom_memory(void)
98{ 94{
99} 95}
100 96
101#ifdef CONFIG_SERIAL_8250
102static void wrppmc_setup_serial(void)
103{
104 struct uart_port up;
105
106 memset(&up, 0x00, sizeof(struct uart_port));
107
108 /*
109 * A note about mapbase/membase
110 * -) mapbase is the physical address of the IO port.
111 * -) membase is an 'ioremapped' cookie.
112 */
113 up.line = 0;
114 up.type = PORT_16550;
115 up.iotype = UPIO_MEM;
116 up.mapbase = WRPPMC_UART16550_BASE;
117 up.membase = ioremap(up.mapbase, 8);
118 up.irq = WRPPMC_UART16550_IRQ;
119 up.uartclk = WRPPMC_UART16550_CLOCK;
120 up.flags = UPF_SKIP_TEST/* | UPF_BOOT_AUTOCONF */;
121 up.regshift = 0;
122
123 early_serial_setup(&up);
124}
125#endif
126
127void __init plat_mem_setup(void) 97void __init plat_mem_setup(void)
128{ 98{
129 extern void wrppmc_time_init(void);
130 extern void wrppmc_machine_restart(char *command); 99 extern void wrppmc_machine_restart(char *command);
131 extern void wrppmc_machine_halt(void); 100 extern void wrppmc_machine_halt(void);
132 extern void wrppmc_machine_power_off(void); 101 extern void wrppmc_machine_power_off(void);
@@ -135,17 +104,10 @@ void __init plat_mem_setup(void)
135 _machine_halt = wrppmc_machine_halt; 104 _machine_halt = wrppmc_machine_halt;
136 pm_power_off = wrppmc_machine_power_off; 105 pm_power_off = wrppmc_machine_power_off;
137 106
138 /* Use MIPS Count/Compare Timer */
139 board_time_init = wrppmc_time_init;
140
141 /* This makes the operations of 'in/out[bwl]' to the 107 /* This makes the operations of 'in/out[bwl]' to the
142 * physical address ( < KSEG0) can work via KSEG1 108 * physical address ( < KSEG0) can work via KSEG1
143 */ 109 */
144 set_io_port_base(KSEG1); 110 set_io_port_base(KSEG1);
145
146#ifdef CONFIG_SERIAL_8250
147 wrppmc_setup_serial();
148#endif
149} 111}
150 112
151const char *get_system_type(void) 113const char *get_system_type(void)
@@ -159,7 +121,6 @@ const char *get_system_type(void)
159 */ 121 */
160void __init prom_init(void) 122void __init prom_init(void)
161{ 123{
162 mips_machgroup = MACH_GROUP_WINDRIVER;
163 mips_machtype = MACH_WRPPMC; 124 mips_machtype = MACH_WRPPMC;
164 125
165 add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM); 126 add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
index 5b440859bcee..b207e7f1417a 100644
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -11,18 +11,11 @@
11 * Copyright (C) 2006, Wind River System Inc. 11 * Copyright (C) 2006, Wind River System Inc.
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/string.h>
15#include <linux/kernel.h>
16#include <linux/param.h> /* for HZ */
17#include <linux/irq.h>
18#include <linux/timex.h>
19#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h>
20 16
21#include <asm/reboot.h>
22#include <asm/time.h>
23#include <asm/io.h>
24#include <asm/bootinfo.h>
25#include <asm/gt64120.h> 17#include <asm/gt64120.h>
18#include <asm/time.h>
26 19
27#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ 20#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
28 21
@@ -38,7 +31,7 @@ void __init plat_timer_setup(struct irqaction *irq)
38 * NOTE: We disable all GT64120 timers, and use MIPS processor internal 31 * NOTE: We disable all GT64120 timers, and use MIPS processor internal
39 * timer as the source of kernel clock tick. 32 * timer as the source of kernel clock tick.
40 */ 33 */
41void __init wrppmc_time_init(void) 34void __init plat_time_init(void)
42{ 35{
43 /* Disable GT64120 timers */ 36 /* Disable GT64120 timers */
44 GT_WRITE(GT_TC_CONTROL_OFS, 0x00); 37 GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
diff --git a/arch/mips/jazz/Makefile b/arch/mips/jazz/Makefile
index 575a9442bc82..5aee0c266d18 100644
--- a/arch/mips/jazz/Makefile
+++ b/arch/mips/jazz/Makefile
@@ -2,6 +2,6 @@
2# Makefile for the Jazz family specific parts of the kernel 2# Makefile for the Jazz family specific parts of the kernel
3# 3#
4 4
5obj-y := irq.o jazzdma.o jazz-platform.o reset.o setup.o 5obj-y := irq.o jazzdma.o reset.o setup.o
6 6
7EXTRA_CFLAGS += -Werror 7EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 015cf4bb51dd..835b056cea36 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -6,20 +6,23 @@
6 * Copyright (C) 1992 Linus Torvalds 6 * Copyright (C) 1992 Linus Torvalds
7 * Copyright (C) 1994 - 2001, 2003 Ralf Baechle 7 * Copyright (C) 1994 - 2001, 2003 Ralf Baechle
8 */ 8 */
9#include <linux/clockchips.h>
9#include <linux/init.h> 10#include <linux/init.h>
10#include <linux/interrupt.h> 11#include <linux/interrupt.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/spinlock.h> 13#include <linux/spinlock.h>
13 14
15#include <asm/irq_cpu.h>
14#include <asm/i8259.h> 16#include <asm/i8259.h>
15#include <asm/io.h> 17#include <asm/io.h>
16#include <asm/jazz.h> 18#include <asm/jazz.h>
19#include <asm/pgtable.h>
17 20
18static DEFINE_SPINLOCK(r4030_lock); 21static DEFINE_SPINLOCK(r4030_lock);
19 22
20static void enable_r4030_irq(unsigned int irq) 23static void enable_r4030_irq(unsigned int irq)
21{ 24{
22 unsigned int mask = 1 << (irq - JAZZ_PARALLEL_IRQ); 25 unsigned int mask = 1 << (irq - JAZZ_IRQ_START);
23 unsigned long flags; 26 unsigned long flags;
24 27
25 spin_lock_irqsave(&r4030_lock, flags); 28 spin_lock_irqsave(&r4030_lock, flags);
@@ -30,7 +33,7 @@ static void enable_r4030_irq(unsigned int irq)
30 33
31void disable_r4030_irq(unsigned int irq) 34void disable_r4030_irq(unsigned int irq)
32{ 35{
33 unsigned int mask = ~(1 << (irq - JAZZ_PARALLEL_IRQ)); 36 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START));
34 unsigned long flags; 37 unsigned long flags;
35 38
36 spin_lock_irqsave(&r4030_lock, flags); 39 spin_lock_irqsave(&r4030_lock, flags);
@@ -51,7 +54,7 @@ void __init init_r4030_ints(void)
51{ 54{
52 int i; 55 int i;
53 56
54 for (i = JAZZ_PARALLEL_IRQ; i <= JAZZ_TIMER_IRQ; i++) 57 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++)
55 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); 58 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq);
56 59
57 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 60 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
@@ -66,82 +69,87 @@ void __init init_r4030_ints(void)
66 */ 69 */
67void __init arch_init_irq(void) 70void __init arch_init_irq(void)
68{ 71{
72 /*
73 * this is a hack to get back the still needed wired mapping
74 * killed by init_mm()
75 */
76
77 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
78 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
79 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
80 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
81 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
82 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
83
69 init_i8259_irqs(); /* Integrated i8259 */ 84 init_i8259_irqs(); /* Integrated i8259 */
85 mips_cpu_irq_init();
70 init_r4030_ints(); 86 init_r4030_ints();
71 87
72 change_c0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1); 88 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1);
73}
74
75static void loc_call(unsigned int irq, unsigned int mask)
76{
77 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
78 r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) & mask);
79 do_IRQ(irq);
80 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
81 r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) | mask);
82}
83
84static void ll_local_dev(void)
85{
86 switch (r4030_read_reg32(JAZZ_IO_IRQ_SOURCE)) {
87 case 0:
88 panic("Unimplemented loc_no_irq handler");
89 break;
90 case 4:
91 loc_call(JAZZ_PARALLEL_IRQ, JAZZ_IE_PARALLEL);
92 break;
93 case 8:
94 loc_call(JAZZ_PARALLEL_IRQ, JAZZ_IE_FLOPPY);
95 break;
96 case 12:
97 panic("Unimplemented loc_sound handler");
98 break;
99 case 16:
100 panic("Unimplemented loc_video handler");
101 break;
102 case 20:
103 loc_call(JAZZ_ETHERNET_IRQ, JAZZ_IE_ETHERNET);
104 break;
105 case 24:
106 loc_call(JAZZ_SCSI_IRQ, JAZZ_IE_SCSI);
107 break;
108 case 28:
109 loc_call(JAZZ_KEYBOARD_IRQ, JAZZ_IE_KEYBOARD);
110 break;
111 case 32:
112 loc_call(JAZZ_MOUSE_IRQ, JAZZ_IE_MOUSE);
113 break;
114 case 36:
115 loc_call(JAZZ_SERIAL1_IRQ, JAZZ_IE_SERIAL1);
116 break;
117 case 40:
118 loc_call(JAZZ_SERIAL2_IRQ, JAZZ_IE_SERIAL2);
119 break;
120 }
121} 89}
122 90
123asmlinkage void plat_irq_dispatch(void) 91asmlinkage void plat_irq_dispatch(void)
124{ 92{
125 unsigned int pending = read_c0_cause() & read_c0_status(); 93 unsigned int pending = read_c0_cause() & read_c0_status();
94 unsigned int irq;
126 95
127 if (pending & IE_IRQ5) 96 if (pending & IE_IRQ4) {
128 write_c0_compare(0);
129 else if (pending & IE_IRQ4) {
130 r4030_read_reg32(JAZZ_TIMER_REGISTER); 97 r4030_read_reg32(JAZZ_TIMER_REGISTER);
131 do_IRQ(JAZZ_TIMER_IRQ); 98 do_IRQ(JAZZ_TIMER_IRQ);
132 } else if (pending & IE_IRQ3) 99 } else if (pending & IE_IRQ2)
133 panic("Unimplemented ISA NMI handler");
134 else if (pending & IE_IRQ2)
135 do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); 100 do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK));
136 else if (pending & IE_IRQ1) { 101 else if (pending & IE_IRQ1) {
137 ll_local_dev(); 102 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
138 } else if (unlikely(pending & IE_IRQ0)) 103 if (likely(irq > 0))
139 panic("Unimplemented local_dma handler"); 104 do_IRQ(irq + JAZZ_IRQ_START - 1);
140 else if (pending & IE_SW1) { 105 else
141 clear_c0_cause(IE_SW1); 106 panic("Unimplemented loc_no_irq handler");
142 panic("Unimplemented sw1 handler");
143 } else if (pending & IE_SW0) {
144 clear_c0_cause(IE_SW0);
145 panic("Unimplemented sw0 handler");
146 } 107 }
147} 108}
109
110static void r4030_set_mode(enum clock_event_mode mode,
111 struct clock_event_device *evt)
112{
113 /* Nothing to do ... */
114}
115
116struct clock_event_device r4030_clockevent = {
117 .name = "r4030",
118 .features = CLOCK_EVT_FEAT_PERIODIC,
119 .rating = 100,
120 .irq = JAZZ_TIMER_IRQ,
121 .cpumask = CPU_MASK_CPU0,
122 .set_mode = r4030_set_mode,
123};
124
125static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
126{
127 r4030_clockevent.event_handler(&r4030_clockevent);
128
129 return IRQ_HANDLED;
130}
131
132static struct irqaction r4030_timer_irqaction = {
133 .handler = r4030_timer_interrupt,
134 .flags = IRQF_DISABLED,
135 .mask = CPU_MASK_CPU0,
136 .name = "timer",
137};
138
139void __init plat_timer_setup(struct irqaction *ignored)
140{
141 struct irqaction *irq = &r4030_timer_irqaction;
142
143 BUG_ON(HZ != 100);
144
145 /*
146 * Set clock to 100Hz.
147 *
148 * The R4030 timer receives an input clock of 1kHz which is divieded by
149 * a programmable 4-bit divider. This makes it fairly inflexible.
150 */
151 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
152 setup_irq(JAZZ_TIMER_IRQ, irq);
153
154 clockevents_register_device(&r4030_clockevent);
155}
diff --git a/arch/mips/jazz/jazz-platform.c b/arch/mips/jazz/jazz-platform.c
deleted file mode 100644
index fd736703eef2..000000000000
--- a/arch/mips/jazz/jazz-platform.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/init.h>
9#include <linux/module.h>
10#include <linux/serial_8250.h>
11
12#include <asm/jazz.h>
13
14/*
15 * Confusion ... It seems the original Microsoft Jazz machine used to have a
16 * 4.096MHz clock for its UART while the MIPS Magnum and Millenium systems
17 * had 8MHz. The Olivetti M700-10 and the Acer PICA have 1.8432MHz like PCs.
18 */
19#ifdef CONFIG_OLIVETTI_M700
20#define JAZZ_BASE_BAUD 1843200
21#else
22#define JAZZ_BASE_BAUD 8000000 /* 3072000 */
23#endif
24
25#define JAZZ_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
26
27#define JAZZ_PORT(base, int) \
28{ \
29 .mapbase = base, \
30 .irq = int, \
31 .uartclk = JAZZ_BASE_BAUD, \
32 .iotype = UPIO_MEM, \
33 .flags = JAZZ_UART_FLAGS, \
34 .regshift = 0, \
35}
36
37static struct plat_serial8250_port uart8250_data[] = {
38 JAZZ_PORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
39 JAZZ_PORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
40 { },
41};
42
43static struct platform_device uart8250_device = {
44 .name = "serial8250",
45 .id = PLAT8250_DEV_PLATFORM,
46 .dev = {
47 .platform_data = uart8250_data,
48 },
49};
50
51static int __init uart8250_init(void)
52{
53 return platform_device_register(&uart8250_device);
54}
55
56module_init(uart8250_init);
57
58MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
59MODULE_LICENSE("GPL");
60MODULE_DESCRIPTION("8250 UART probe driver for the Jazz family");
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index e8e0ffb9354d..c672c08d49e5 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -27,7 +27,7 @@
27 */ 27 */
28#define CONF_DEBUG_VDMA 0 28#define CONF_DEBUG_VDMA 0
29 29
30static unsigned long vdma_pagetable_start; 30static VDMA_PGTBL_ENTRY *pgtbl;
31 31
32static DEFINE_SPINLOCK(vdma_lock); 32static DEFINE_SPINLOCK(vdma_lock);
33 33
@@ -46,7 +46,6 @@ static int debuglvl = 3;
46 */ 46 */
47static inline void vdma_pgtbl_init(void) 47static inline void vdma_pgtbl_init(void)
48{ 48{
49 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
50 unsigned long paddr = 0; 49 unsigned long paddr = 0;
51 int i; 50 int i;
52 51
@@ -60,31 +59,31 @@ static inline void vdma_pgtbl_init(void)
60/* 59/*
61 * Initialize the Jazz R4030 dma controller 60 * Initialize the Jazz R4030 dma controller
62 */ 61 */
63void __init vdma_init(void) 62static int __init vdma_init(void)
64{ 63{
65 /* 64 /*
66 * Allocate 32k of memory for DMA page tables. This needs to be page 65 * Allocate 32k of memory for DMA page tables. This needs to be page
67 * aligned and should be uncached to avoid cache flushing after every 66 * aligned and should be uncached to avoid cache flushing after every
68 * update. 67 * update.
69 */ 68 */
70 vdma_pagetable_start = 69 pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
71 (unsigned long) alloc_bootmem_low_pages(VDMA_PGTBL_SIZE); 70 get_order(VDMA_PGTBL_SIZE));
72 if (!vdma_pagetable_start) 71 if (!pgtbl)
73 BUG(); 72 BUG();
74 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE); 73 dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
75 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start); 74 pgtbl = (VDMA_PGTBL_ENTRY *)KSEG1ADDR(pgtbl);
76 75
77 /* 76 /*
78 * Clear the R4030 translation table 77 * Clear the R4030 translation table
79 */ 78 */
80 vdma_pgtbl_init(); 79 vdma_pgtbl_init();
81 80
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE, 81 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE, CPHYSADDR(pgtbl));
83 CPHYSADDR(vdma_pagetable_start));
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE); 82 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
85 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0); 83 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
86 84
87 printk("VDMA: R4030 DMA pagetables initialized.\n"); 85 printk(KERN_INFO "VDMA: R4030 DMA pagetables initialized.\n");
86 return 0;
88} 87}
89 88
90/* 89/*
@@ -92,7 +91,6 @@ void __init vdma_init(void)
92 */ 91 */
93unsigned long vdma_alloc(unsigned long paddr, unsigned long size) 92unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
94{ 93{
95 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
96 int first, last, pages, frame, i; 94 int first, last, pages, frame, i;
97 unsigned long laddr, flags; 95 unsigned long laddr, flags;
98 96
@@ -114,10 +112,10 @@ unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
114 /* 112 /*
115 * Find free chunk 113 * Find free chunk
116 */ 114 */
117 pages = (size + 4095) >> 12; /* no. of pages to allocate */ 115 pages = VDMA_PAGE(paddr + size) - VDMA_PAGE(paddr) + 1;
118 first = 0; 116 first = 0;
119 while (1) { 117 while (1) {
120 while (entry[first].owner != VDMA_PAGE_EMPTY && 118 while (pgtbl[first].owner != VDMA_PAGE_EMPTY &&
121 first < VDMA_PGTBL_ENTRIES) first++; 119 first < VDMA_PGTBL_ENTRIES) first++;
122 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */ 120 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
123 spin_unlock_irqrestore(&vdma_lock, flags); 121 spin_unlock_irqrestore(&vdma_lock, flags);
@@ -125,12 +123,13 @@ unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
125 } 123 }
126 124
127 last = first + 1; 125 last = first + 1;
128 while (entry[last].owner == VDMA_PAGE_EMPTY 126 while (pgtbl[last].owner == VDMA_PAGE_EMPTY
129 && last - first < pages) 127 && last - first < pages)
130 last++; 128 last++;
131 129
132 if (last - first == pages) 130 if (last - first == pages)
133 break; /* found */ 131 break; /* found */
132 first = last + 1;
134 } 133 }
135 134
136 /* 135 /*
@@ -140,8 +139,8 @@ unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
140 frame = paddr & ~(VDMA_PAGESIZE - 1); 139 frame = paddr & ~(VDMA_PAGESIZE - 1);
141 140
142 for (i = first; i < last; i++) { 141 for (i = first; i < last; i++) {
143 entry[i].frame = frame; 142 pgtbl[i].frame = frame;
144 entry[i].owner = laddr; 143 pgtbl[i].owner = laddr;
145 frame += VDMA_PAGESIZE; 144 frame += VDMA_PAGESIZE;
146 } 145 }
147 146
@@ -160,10 +159,10 @@ unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
160 printk("%08x ", i << 12); 159 printk("%08x ", i << 12);
161 printk("\nPADDR: "); 160 printk("\nPADDR: ");
162 for (i = first; i < last; i++) 161 for (i = first; i < last; i++)
163 printk("%08x ", entry[i].frame); 162 printk("%08x ", pgtbl[i].frame);
164 printk("\nOWNER: "); 163 printk("\nOWNER: ");
165 for (i = first; i < last; i++) 164 for (i = first; i < last; i++)
166 printk("%08x ", entry[i].owner); 165 printk("%08x ", pgtbl[i].owner);
167 printk("\n"); 166 printk("\n");
168 } 167 }
169 168
@@ -181,7 +180,6 @@ EXPORT_SYMBOL(vdma_alloc);
181 */ 180 */
182int vdma_free(unsigned long laddr) 181int vdma_free(unsigned long laddr)
183{ 182{
184 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
185 int i; 183 int i;
186 184
187 i = laddr >> 12; 185 i = laddr >> 12;
@@ -213,8 +211,6 @@ EXPORT_SYMBOL(vdma_free);
213 */ 211 */
214int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size) 212int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
215{ 213{
216 VDMA_PGTBL_ENTRY *pgtbl =
217 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
218 int first, pages, npages; 214 int first, pages, npages;
219 215
220 if (laddr > 0xffffff) { 216 if (laddr > 0xffffff) {
@@ -289,8 +285,6 @@ unsigned long vdma_phys2log(unsigned long paddr)
289{ 285{
290 int i; 286 int i;
291 int frame; 287 int frame;
292 VDMA_PGTBL_ENTRY *pgtbl =
293 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
294 288
295 frame = paddr & ~(VDMA_PAGESIZE - 1); 289 frame = paddr & ~(VDMA_PAGESIZE - 1);
296 290
@@ -312,9 +306,6 @@ EXPORT_SYMBOL(vdma_phys2log);
312 */ 306 */
313unsigned long vdma_log2phys(unsigned long laddr) 307unsigned long vdma_log2phys(unsigned long laddr)
314{ 308{
315 VDMA_PGTBL_ENTRY *pgtbl =
316 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
317
318 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1)); 309 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
319} 310}
320 311
@@ -564,3 +555,5 @@ int vdma_get_enable(int channel)
564 555
565 return enable; 556 return enable;
566} 557}
558
559arch_initcall(vdma_init);
diff --git a/arch/mips/jazz/reset.c b/arch/mips/jazz/reset.c
index d8ade85060b3..dd889fe86bd1 100644
--- a/arch/mips/jazz/reset.c
+++ b/arch/mips/jazz/reset.c
@@ -49,8 +49,8 @@ void jazz_machine_restart(char *command)
49{ 49{
50 while(1) { 50 while(1) {
51 kb_wait(); 51 kb_wait();
52 jazz_write_command (0xd1); 52 jazz_write_command(0xd1);
53 kb_wait(); 53 kb_wait();
54 jazz_write_output (0x00); 54 jazz_write_output(0x00);
55 } 55 }
56} 56}
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 798279e06691..cfc7dce78dab 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -7,6 +7,7 @@
7 * 7 *
8 * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle 8 * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle
9 * Copyright (C) 2001 MIPS Technologies, Inc. 9 * Copyright (C) 2001 MIPS Technologies, Inc.
10 * Copyright (C) 2007 by Thomas Bogendoerfer
10 */ 11 */
11#include <linux/eisa.h> 12#include <linux/eisa.h>
12#include <linux/hdreg.h> 13#include <linux/hdreg.h>
@@ -20,8 +21,11 @@
20#include <linux/ide.h> 21#include <linux/ide.h>
21#include <linux/pm.h> 22#include <linux/pm.h>
22#include <linux/screen_info.h> 23#include <linux/screen_info.h>
24#include <linux/platform_device.h>
25#include <linux/serial_8250.h>
23 26
24#include <asm/bootinfo.h> 27#include <asm/bootinfo.h>
28#include <asm/i8253.h>
25#include <asm/irq.h> 29#include <asm/irq.h>
26#include <asm/jazz.h> 30#include <asm/jazz.h>
27#include <asm/jazzdma.h> 31#include <asm/jazzdma.h>
@@ -30,18 +34,12 @@
30#include <asm/pgtable.h> 34#include <asm/pgtable.h>
31#include <asm/time.h> 35#include <asm/time.h>
32#include <asm/traps.h> 36#include <asm/traps.h>
37#include <asm/mc146818-time.h>
33 38
34extern asmlinkage void jazz_handle_int(void); 39extern asmlinkage void jazz_handle_int(void);
35 40
36extern void jazz_machine_restart(char *command); 41extern void jazz_machine_restart(char *command);
37 42
38void __init plat_timer_setup(struct irqaction *irq)
39{
40 /* set the clock to 100 Hz */
41 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
42 setup_irq(JAZZ_TIMER_IRQ, irq);
43}
44
45static struct resource jazz_io_resources[] = { 43static struct resource jazz_io_resources[] = {
46 { 44 {
47 .start = 0x00, 45 .start = 0x00,
@@ -66,18 +64,21 @@ static struct resource jazz_io_resources[] = {
66 } 64 }
67}; 65};
68 66
67void __init plat_time_init(void)
68{
69 setup_pit_timer();
70}
71
69void __init plat_mem_setup(void) 72void __init plat_mem_setup(void)
70{ 73{
71 int i; 74 int i;
72 75
73 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 76 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
74 add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K); 77 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
75
76 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 78 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
77 add_wired_entry (0x02400017, 0x02440017, 0xe2000000, PM_16M); 79 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
78
79 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 80 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
80 add_wired_entry (0x01800017, 0x01000017, 0xe4000000, PM_4M); 81 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
81 82
82 set_io_port_base(JAZZ_PORT_BASE); 83 set_io_port_base(JAZZ_PORT_BASE);
83#ifdef CONFIG_EISA 84#ifdef CONFIG_EISA
@@ -94,6 +95,7 @@ void __init plat_mem_setup(void)
94 95
95 _machine_restart = jazz_machine_restart; 96 _machine_restart = jazz_machine_restart;
96 97
98#ifdef CONFIG_VT
97 screen_info = (struct screen_info) { 99 screen_info = (struct screen_info) {
98 0, 0, /* orig-x, orig-y */ 100 0, 0, /* orig-x, orig-y */
99 0, /* unused */ 101 0, /* unused */
@@ -105,6 +107,112 @@ void __init plat_mem_setup(void)
105 0, /* orig_video_isVGA */ 107 0, /* orig_video_isVGA */
106 16 /* orig_video_points */ 108 16 /* orig_video_points */
107 }; 109 };
110#endif
108 111
109 vdma_init(); 112 add_preferred_console("ttyS", 0, "9600");
110} 113}
114
115#ifdef CONFIG_OLIVETTI_M700
116#define UART_CLK 1843200
117#else
118/* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
119 exactly which ones ... XXX */
120#define UART_CLK (8000000 / 16) /* ( 3072000 / 16) */
121#endif
122
123#define MEMPORT(_base, _irq) \
124 { \
125 .mapbase = (_base), \
126 .membase = (void *)(_base), \
127 .irq = (_irq), \
128 .uartclk = UART_CLK, \
129 .iotype = UPIO_MEM, \
130 .flags = UPF_BOOT_AUTOCONF, \
131 }
132
133static struct plat_serial8250_port jazz_serial_data[] = {
134 MEMPORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
135 MEMPORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
136 { },
137};
138
139static struct platform_device jazz_serial8250_device = {
140 .name = "serial8250",
141 .id = PLAT8250_DEV_PLATFORM,
142 .dev = {
143 .platform_data = jazz_serial_data,
144 },
145};
146
147static struct resource jazz_esp_rsrc[] = {
148 {
149 .start = JAZZ_SCSI_BASE,
150 .end = JAZZ_SCSI_BASE + 31,
151 .flags = IORESOURCE_MEM
152 },
153 {
154 .start = JAZZ_SCSI_DMA,
155 .end = JAZZ_SCSI_DMA,
156 .flags = IORESOURCE_MEM
157 },
158 {
159 .start = JAZZ_SCSI_IRQ,
160 .end = JAZZ_SCSI_IRQ,
161 .flags = IORESOURCE_IRQ
162 }
163};
164
165static struct platform_device jazz_esp_pdev = {
166 .name = "jazz_esp",
167 .num_resources = ARRAY_SIZE(jazz_esp_rsrc),
168 .resource = jazz_esp_rsrc
169};
170
171static struct resource jazz_sonic_rsrc[] = {
172 {
173 .start = JAZZ_ETHERNET_BASE,
174 .end = JAZZ_ETHERNET_BASE + 0xff,
175 .flags = IORESOURCE_MEM
176 },
177 {
178 .start = JAZZ_ETHERNET_IRQ,
179 .end = JAZZ_ETHERNET_IRQ,
180 .flags = IORESOURCE_IRQ
181 }
182};
183
184static struct platform_device jazz_sonic_pdev = {
185 .name = "jazzsonic",
186 .num_resources = ARRAY_SIZE(jazz_sonic_rsrc),
187 .resource = jazz_sonic_rsrc
188};
189
190static struct resource jazz_cmos_rsrc[] = {
191 {
192 .start = 0x70,
193 .end = 0x71,
194 .flags = IORESOURCE_IO
195 },
196 {
197 .start = 8,
198 .end = 8,
199 .flags = IORESOURCE_IRQ
200 }
201};
202
203static struct platform_device jazz_cmos_pdev = {
204 .name = "rtc_cmos",
205 .num_resources = ARRAY_SIZE(jazz_cmos_rsrc),
206 .resource = jazz_cmos_rsrc
207};
208
209static int __init jazz_setup_devinit(void)
210{
211 platform_device_register(&jazz_serial8250_device);
212 platform_device_register(&jazz_esp_pdev);
213 platform_device_register(&jazz_sonic_pdev);
214 platform_device_register(&jazz_cmos_pdev);
215 return 0;
216}
217
218device_initcall(jazz_setup_devinit);
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
index 9169fab1773a..b643f75ec9a5 100644
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ b/arch/mips/jmr3927/rbhma3100/init.c
@@ -51,7 +51,6 @@ void __init prom_init(void)
51 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) 51 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
52 puts("Warning: TX3927 TLB off\n"); 52 puts("Warning: TX3927 TLB off\n");
53#endif 53#endif
54 mips_machgroup = MACH_GROUP_TOSHIBA;
55 54
56#ifdef CONFIG_TOSHIBA_JMR3927 55#ifdef CONFIG_TOSHIBA_JMR3927
57 mips_machtype = MACH_TOSHIBA_JMR3927; 56 mips_machtype = MACH_TOSHIBA_JMR3927;
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index d9efe692e551..3a47e8ce1196 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -104,7 +104,9 @@ static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
104} 104}
105 105
106static struct irqaction ioc_action = { 106static struct irqaction ioc_action = {
107 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 107 .handler = jmr3927_ioc_interrupt,
108 .mask = CPU_MASK_NONE,
109 .name = "IOC",
108}; 110};
109 111
110static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) 112static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
@@ -116,7 +118,9 @@ static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
116 return IRQ_HANDLED; 118 return IRQ_HANDLED;
117} 119}
118static struct irqaction pcierr_action = { 120static struct irqaction pcierr_action = {
119 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, 121 .handler = jmr3927_pcierr_interrupt,
122 .mask = CPU_MASK_NONE,
123 .name = "PCI error",
120}; 124};
121 125
122static void __init jmr3927_irq_init(void); 126static void __init jmr3927_irq_init(void);
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index fde56e86c2ab..7f14f70a1b88 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -109,7 +109,7 @@ static void jmr3927_timer_ack(void)
109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */ 109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
110} 110}
111 111
112static void __init jmr3927_time_init(void) 112void __init plat_time_init(void)
113{ 113{
114 clocksource_mips.read = jmr3927_hpt_read; 114 clocksource_mips.read = jmr3927_hpt_read;
115 mips_timer_ack = jmr3927_timer_ack; 115 mips_timer_ack = jmr3927_timer_ack;
@@ -141,8 +141,6 @@ void __init plat_mem_setup(void)
141 141
142 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); 142 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
143 143
144 board_time_init = jmr3927_time_init;
145
146 _machine_restart = jmr3927_machine_restart; 144 _machine_restart = jmr3927_machine_restart;
147 _machine_halt = jmr3927_machine_halt; 145 _machine_halt = jmr3927_machine_halt;
148 pm_power_off = jmr3927_machine_power_off; 146 pm_power_off = jmr3927_machine_power_off;
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 2fd96d95a39c..a2689f93c160 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
51obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o 51obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
52obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o 52obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
53obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o 53obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o
54obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o
54 55
55obj-$(CONFIG_32BIT) += scall32-o32.o 56obj-$(CONFIG_32BIT) += scall32-o32.o
56obj-$(CONFIG_64BIT) += scall64-64.o 57obj-$(CONFIG_64BIT) += scall64-64.o
@@ -64,6 +65,7 @@ obj-$(CONFIG_PROC_FS) += proc.o
64 65
65obj-$(CONFIG_64BIT) += cpu-bugs64.o 66obj-$(CONFIG_64BIT) += cpu-bugs64.o
66 67
68obj-$(CONFIG_I8253) += i8253.o
67obj-$(CONFIG_PCSPEAKER) += pcspeaker.o 69obj-$(CONFIG_PCSPEAKER) += pcspeaker.o
68 70
69obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 71obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index 993f7ec70f35..da41eac195ca 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -110,7 +110,7 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
110} 110}
111 111
112#undef ELF_CORE_COPY_REGS 112#undef ELF_CORE_COPY_REGS
113#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs); 113#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
114 114
115void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs) 115void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
116{ 116{
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 6648fde20b96..af78456d4138 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -29,7 +29,7 @@ static inline void align_mod(const int align, const int mod)
29 ".endr\n\t" 29 ".endr\n\t"
30 ".set pop" 30 ".set pop"
31 : 31 :
32 : GCC_IMM_ASM (align), GCC_IMM_ASM (mod)); 32 : GCC_IMM_ASM(align), GCC_IMM_ASM(mod));
33} 33}
34 34
35static inline void mult_sh_align_mod(long *v1, long *v2, long *w, 35static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 3e004161ebd5..c8c47a2d1972 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -159,6 +159,7 @@ static inline void check_wait(void)
159 case CPU_5KC: 159 case CPU_5KC:
160 case CPU_25KF: 160 case CPU_25KF:
161 case CPU_PR4450: 161 case CPU_PR4450:
162 case CPU_BCM3302:
162 cpu_wait = r4k_wait; 163 cpu_wait = r4k_wait;
163 break; 164 break;
164 165
@@ -745,14 +746,6 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
745{ 746{
746 decode_configs(c); 747 decode_configs(c);
747 748
748 /*
749 * For historical reasons the SB1 comes with it's own variant of
750 * cache code which eventually will be folded into c-r4k.c. Until
751 * then we pretend it's got it's own cache architecture.
752 */
753 c->options &= ~MIPS_CPU_4K_CACHE;
754 c->options |= MIPS_CPU_SB1_CACHE;
755
756 switch (c->processor_id & 0xff00) { 749 switch (c->processor_id & 0xff00) {
757 case PRID_IMP_SB1: 750 case PRID_IMP_SB1:
758 c->cputype = CPU_SB1; 751 c->cputype = CPU_SB1;
@@ -793,9 +786,111 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c)
793} 786}
794 787
795 788
789static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
790{
791 decode_configs(c);
792 switch (c->processor_id & 0xff00) {
793 case PRID_IMP_BCM3302:
794 c->cputype = CPU_BCM3302;
795 break;
796 case PRID_IMP_BCM4710:
797 c->cputype = CPU_BCM4710;
798 break;
799 default:
800 c->cputype = CPU_UNKNOWN;
801 break;
802 }
803}
804
805const char *__cpu_name[NR_CPUS];
806
807/*
808 * Name a CPU
809 */
810static __init const char *cpu_to_name(struct cpuinfo_mips *c)
811{
812 const char *name = NULL;
813
814 switch (c->cputype) {
815 case CPU_UNKNOWN: name = "unknown"; break;
816 case CPU_R2000: name = "R2000"; break;
817 case CPU_R3000: name = "R3000"; break;
818 case CPU_R3000A: name = "R3000A"; break;
819 case CPU_R3041: name = "R3041"; break;
820 case CPU_R3051: name = "R3051"; break;
821 case CPU_R3052: name = "R3052"; break;
822 case CPU_R3081: name = "R3081"; break;
823 case CPU_R3081E: name = "R3081E"; break;
824 case CPU_R4000PC: name = "R4000PC"; break;
825 case CPU_R4000SC: name = "R4000SC"; break;
826 case CPU_R4000MC: name = "R4000MC"; break;
827 case CPU_R4200: name = "R4200"; break;
828 case CPU_R4400PC: name = "R4400PC"; break;
829 case CPU_R4400SC: name = "R4400SC"; break;
830 case CPU_R4400MC: name = "R4400MC"; break;
831 case CPU_R4600: name = "R4600"; break;
832 case CPU_R6000: name = "R6000"; break;
833 case CPU_R6000A: name = "R6000A"; break;
834 case CPU_R8000: name = "R8000"; break;
835 case CPU_R10000: name = "R10000"; break;
836 case CPU_R12000: name = "R12000"; break;
837 case CPU_R14000: name = "R14000"; break;
838 case CPU_R4300: name = "R4300"; break;
839 case CPU_R4650: name = "R4650"; break;
840 case CPU_R4700: name = "R4700"; break;
841 case CPU_R5000: name = "R5000"; break;
842 case CPU_R5000A: name = "R5000A"; break;
843 case CPU_R4640: name = "R4640"; break;
844 case CPU_NEVADA: name = "Nevada"; break;
845 case CPU_RM7000: name = "RM7000"; break;
846 case CPU_RM9000: name = "RM9000"; break;
847 case CPU_R5432: name = "R5432"; break;
848 case CPU_4KC: name = "MIPS 4Kc"; break;
849 case CPU_5KC: name = "MIPS 5Kc"; break;
850 case CPU_R4310: name = "R4310"; break;
851 case CPU_SB1: name = "SiByte SB1"; break;
852 case CPU_SB1A: name = "SiByte SB1A"; break;
853 case CPU_TX3912: name = "TX3912"; break;
854 case CPU_TX3922: name = "TX3922"; break;
855 case CPU_TX3927: name = "TX3927"; break;
856 case CPU_AU1000: name = "Au1000"; break;
857 case CPU_AU1500: name = "Au1500"; break;
858 case CPU_AU1100: name = "Au1100"; break;
859 case CPU_AU1550: name = "Au1550"; break;
860 case CPU_AU1200: name = "Au1200"; break;
861 case CPU_4KEC: name = "MIPS 4KEc"; break;
862 case CPU_4KSC: name = "MIPS 4KSc"; break;
863 case CPU_VR41XX: name = "NEC Vr41xx"; break;
864 case CPU_R5500: name = "R5500"; break;
865 case CPU_TX49XX: name = "TX49xx"; break;
866 case CPU_20KC: name = "MIPS 20Kc"; break;
867 case CPU_24K: name = "MIPS 24K"; break;
868 case CPU_25KF: name = "MIPS 25Kf"; break;
869 case CPU_34K: name = "MIPS 34K"; break;
870 case CPU_74K: name = "MIPS 74K"; break;
871 case CPU_VR4111: name = "NEC VR4111"; break;
872 case CPU_VR4121: name = "NEC VR4121"; break;
873 case CPU_VR4122: name = "NEC VR4122"; break;
874 case CPU_VR4131: name = "NEC VR4131"; break;
875 case CPU_VR4133: name = "NEC VR4133"; break;
876 case CPU_VR4181: name = "NEC VR4181"; break;
877 case CPU_VR4181A: name = "NEC VR4181A"; break;
878 case CPU_SR71000: name = "Sandcraft SR71000"; break;
879 case CPU_BCM3302: name = "Broadcom BCM3302"; break;
880 case CPU_BCM4710: name = "Broadcom BCM4710"; break;
881 case CPU_PR4450: name = "Philips PR4450"; break;
882 case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
883 default:
884 BUG();
885 }
886
887 return name;
888}
889
796__init void cpu_probe(void) 890__init void cpu_probe(void)
797{ 891{
798 struct cpuinfo_mips *c = &current_cpu_data; 892 struct cpuinfo_mips *c = &current_cpu_data;
893 unsigned int cpu = smp_processor_id();
799 894
800 c->processor_id = PRID_IMP_UNKNOWN; 895 c->processor_id = PRID_IMP_UNKNOWN;
801 c->fpu_id = FPIR_IMP_NONE; 896 c->fpu_id = FPIR_IMP_NONE;
@@ -815,6 +910,9 @@ __init void cpu_probe(void)
815 case PRID_COMP_SIBYTE: 910 case PRID_COMP_SIBYTE:
816 cpu_probe_sibyte(c); 911 cpu_probe_sibyte(c);
817 break; 912 break;
913 case PRID_COMP_BROADCOM:
914 cpu_probe_broadcom(c);
915 break;
818 case PRID_COMP_SANDCRAFT: 916 case PRID_COMP_SANDCRAFT:
819 cpu_probe_sandcraft(c); 917 cpu_probe_sandcraft(c);
820 break; 918 break;
@@ -824,6 +922,14 @@ __init void cpu_probe(void)
824 default: 922 default:
825 c->cputype = CPU_UNKNOWN; 923 c->cputype = CPU_UNKNOWN;
826 } 924 }
925
926 /*
927 * Platform code can force the cpu type to optimize code
928 * generation. In that case be sure the cpu type is correctly
929 * manually setup otherwise it could trigger some nasty bugs.
930 */
931 BUG_ON(current_cpu_type() != c->cputype);
932
827 if (c->options & MIPS_CPU_FPU) { 933 if (c->options & MIPS_CPU_FPU) {
828 c->fpu_id = cpu_get_fpu_id(); 934 c->fpu_id = cpu_get_fpu_id();
829 935
@@ -835,13 +941,16 @@ __init void cpu_probe(void)
835 c->ases |= MIPS_ASE_MIPS3D; 941 c->ases |= MIPS_ASE_MIPS3D;
836 } 942 }
837 } 943 }
944
945 __cpu_name[cpu] = cpu_to_name(c);
838} 946}
839 947
840__init void cpu_report(void) 948__init void cpu_report(void)
841{ 949{
842 struct cpuinfo_mips *c = &current_cpu_data; 950 struct cpuinfo_mips *c = &current_cpu_data;
843 951
844 printk("CPU revision is: %08x\n", c->processor_id); 952 printk(KERN_INFO "CPU revision is: %08x (%s)\n",
953 c->processor_id, cpu_name_string());
845 if (c->options & MIPS_CPU_FPU) 954 if (c->options & MIPS_CPU_FPU)
846 printk("FPU revision is: %08x\n", c->fpu_id); 955 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id);
847} 956}
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index cb5623aad552..3191afa29ad8 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -676,15 +676,18 @@ static void kgdb_wait(void *arg)
676static int kgdb_smp_call_kgdb_wait(void) 676static int kgdb_smp_call_kgdb_wait(void)
677{ 677{
678#ifdef CONFIG_SMP 678#ifdef CONFIG_SMP
679 cpumask_t mask = cpu_online_map;
679 struct call_data_struct data; 680 struct call_data_struct data;
680 int i, cpus = num_online_cpus() - 1;
681 int cpu = smp_processor_id(); 681 int cpu = smp_processor_id();
682 int cpus;
682 683
683 /* 684 /*
684 * Can die spectacularly if this CPU isn't yet marked online 685 * Can die spectacularly if this CPU isn't yet marked online
685 */ 686 */
686 BUG_ON(!cpu_online(cpu)); 687 BUG_ON(!cpu_online(cpu));
687 688
689 cpu_clear(cpu, mask);
690 cpus = cpus_weight(mask);
688 if (!cpus) 691 if (!cpus)
689 return 0; 692 return 0;
690 693
@@ -711,10 +714,7 @@ static int kgdb_smp_call_kgdb_wait(void)
711 call_data = &data; 714 call_data = &data;
712 mb(); 715 mb();
713 716
714 /* Send a message to all other CPUs and wait for them to respond */ 717 core_send_ipi_mask(mask, SMP_CALL_FUNCTION);
715 for (i = 0; i < NR_CPUS; i++)
716 if (cpu_online(i) && i != cpu)
717 core_send_ipi(i, SMP_CALL_FUNCTION);
718 718
719 /* Wait for response */ 719 /* Wait for response */
720 /* FIXME: lock-up detection, backtrace on lock-up */ 720 /* FIXME: lock-up detection, backtrace on lock-up */
@@ -733,7 +733,7 @@ static int kgdb_smp_call_kgdb_wait(void)
733 * returns 1 if you should skip the instruction at the trap address, 0 733 * returns 1 if you should skip the instruction at the trap address, 0
734 * otherwise. 734 * otherwise.
735 */ 735 */
736void handle_exception (struct gdb_regs *regs) 736void handle_exception(struct gdb_regs *regs)
737{ 737{
738 int trap; /* Trap type */ 738 int trap; /* Trap type */
739 int sigval; 739 int sigval;
@@ -769,7 +769,7 @@ void handle_exception (struct gdb_regs *regs)
769 /* 769 /*
770 * acquire the CPU spinlocks 770 * acquire the CPU spinlocks
771 */ 771 */
772 for (i = num_online_cpus()-1; i >= 0; i--) 772 for_each_online_cpu(i)
773 if (__raw_spin_trylock(&kgdb_cpulock[i]) == 0) 773 if (__raw_spin_trylock(&kgdb_cpulock[i]) == 0)
774 panic("kgdb: couldn't get cpulock %d\n", i); 774 panic("kgdb: couldn't get cpulock %d\n", i);
775 775
@@ -902,7 +902,7 @@ void handle_exception (struct gdb_regs *regs)
902 hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0); 902 hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0);
903 ptr += 2*(2*sizeof(long)); 903 ptr += 2*(2*sizeof(long));
904 hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0); 904 hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0);
905 strcpy(output_buffer,"OK"); 905 strcpy(output_buffer, "OK");
906 } 906 }
907 break; 907 break;
908 908
@@ -917,9 +917,9 @@ void handle_exception (struct gdb_regs *regs)
917 && hexToInt(&ptr, &length)) { 917 && hexToInt(&ptr, &length)) {
918 if (mem2hex((char *)addr, output_buffer, length, 1)) 918 if (mem2hex((char *)addr, output_buffer, length, 1))
919 break; 919 break;
920 strcpy (output_buffer, "E03"); 920 strcpy(output_buffer, "E03");
921 } else 921 } else
922 strcpy(output_buffer,"E01"); 922 strcpy(output_buffer, "E01");
923 break; 923 break;
924 924
925 /* 925 /*
@@ -996,7 +996,7 @@ void handle_exception (struct gdb_regs *regs)
996 ptr = &input_buffer[1]; 996 ptr = &input_buffer[1];
997 if (!hexToInt(&ptr, &baudrate)) 997 if (!hexToInt(&ptr, &baudrate))
998 { 998 {
999 strcpy(output_buffer,"B01"); 999 strcpy(output_buffer, "B01");
1000 break; 1000 break;
1001 } 1001 }
1002 1002
@@ -1015,7 +1015,7 @@ void handle_exception (struct gdb_regs *regs)
1015 break; 1015 break;
1016 default: 1016 default:
1017 baudrate = 0; 1017 baudrate = 0;
1018 strcpy(output_buffer,"B02"); 1018 strcpy(output_buffer, "B02");
1019 goto x1; 1019 goto x1;
1020 } 1020 }
1021 1021
@@ -1044,7 +1044,7 @@ finish_kgdb:
1044 1044
1045exit_kgdb_exception: 1045exit_kgdb_exception:
1046 /* release locks so other CPUs can go */ 1046 /* release locks so other CPUs can go */
1047 for (i = num_online_cpus()-1; i >= 0; i--) 1047 for_each_online_cpu(i)
1048 __raw_spin_unlock(&kgdb_cpulock[i]); 1048 __raw_spin_unlock(&kgdb_cpulock[i]);
1049 spin_unlock(&kgdb_lock); 1049 spin_unlock(&kgdb_lock);
1050 1050
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
new file mode 100644
index 000000000000..5d9830df3595
--- /dev/null
+++ b/arch/mips/kernel/i8253.c
@@ -0,0 +1,213 @@
1/*
2 * i8253.c 8253/PIT functions
3 *
4 */
5#include <linux/clockchips.h>
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <linux/jiffies.h>
9#include <linux/module.h>
10#include <linux/spinlock.h>
11
12#include <asm/delay.h>
13#include <asm/i8253.h>
14#include <asm/io.h>
15
16static DEFINE_SPINLOCK(i8253_lock);
17
18/*
19 * Initialize the PIT timer.
20 *
21 * This is also called after resume to bring the PIT into operation again.
22 */
23static void init_pit_timer(enum clock_event_mode mode,
24 struct clock_event_device *evt)
25{
26 unsigned long flags;
27
28 spin_lock_irqsave(&i8253_lock, flags);
29
30 switch(mode) {
31 case CLOCK_EVT_MODE_PERIODIC:
32 /* binary, mode 2, LSB/MSB, ch 0 */
33 outb_p(0x34, PIT_MODE);
34 outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
35 outb(LATCH >> 8 , PIT_CH0); /* MSB */
36 break;
37
38 case CLOCK_EVT_MODE_SHUTDOWN:
39 case CLOCK_EVT_MODE_UNUSED:
40 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
41 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
42 outb_p(0x30, PIT_MODE);
43 outb_p(0, PIT_CH0);
44 outb_p(0, PIT_CH0);
45 }
46 break;
47
48 case CLOCK_EVT_MODE_ONESHOT:
49 /* One shot setup */
50 outb_p(0x38, PIT_MODE);
51 break;
52
53 case CLOCK_EVT_MODE_RESUME:
54 /* Nothing to do here */
55 break;
56 }
57 spin_unlock_irqrestore(&i8253_lock, flags);
58}
59
60/*
61 * Program the next event in oneshot mode
62 *
63 * Delta is given in PIT ticks
64 */
65static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
66{
67 unsigned long flags;
68
69 spin_lock_irqsave(&i8253_lock, flags);
70 outb_p(delta & 0xff , PIT_CH0); /* LSB */
71 outb(delta >> 8 , PIT_CH0); /* MSB */
72 spin_unlock_irqrestore(&i8253_lock, flags);
73
74 return 0;
75}
76
77/*
78 * On UP the PIT can serve all of the possible timer functions. On SMP systems
79 * it can be solely used for the global tick.
80 *
81 * The profiling and update capabilites are switched off once the local apic is
82 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
83 * !using_apic_timer decisions in do_timer_interrupt_hook()
84 */
85struct clock_event_device pit_clockevent = {
86 .name = "pit",
87 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
88 .set_mode = init_pit_timer,
89 .set_next_event = pit_next_event,
90 .shift = 32,
91 .irq = 0,
92};
93
94irqreturn_t timer_interrupt(int irq, void *dev_id)
95{
96 pit_clockevent.event_handler(&pit_clockevent);
97
98 return IRQ_HANDLED;
99}
100
101static struct irqaction irq0 = {
102 .handler = timer_interrupt,
103 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
104 .mask = CPU_MASK_NONE,
105 .name = "timer"
106};
107
108/*
109 * Initialize the conversion factor and the min/max deltas of the clock event
110 * structure and register the clock event source with the framework.
111 */
112void __init setup_pit_timer(void)
113{
114 /*
115 * Start pit with the boot cpu mask and make it global after the
116 * IO_APIC has been initialized.
117 */
118 pit_clockevent.cpumask = cpumask_of_cpu(0);
119 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32);
120 pit_clockevent.max_delta_ns =
121 clockevent_delta2ns(0x7FFF, &pit_clockevent);
122 pit_clockevent.min_delta_ns =
123 clockevent_delta2ns(0xF, &pit_clockevent);
124 clockevents_register_device(&pit_clockevent);
125
126 irq0.mask = cpumask_of_cpu(0);
127 setup_irq(0, &irq0);
128}
129
130/*
131 * Since the PIT overflows every tick, its not very useful
132 * to just read by itself. So use jiffies to emulate a free
133 * running counter:
134 */
135static cycle_t pit_read(void)
136{
137 unsigned long flags;
138 int count;
139 u32 jifs;
140 static int old_count;
141 static u32 old_jifs;
142
143 spin_lock_irqsave(&i8253_lock, flags);
144 /*
145 * Although our caller may have the read side of xtime_lock,
146 * this is now a seqlock, and we are cheating in this routine
147 * by having side effects on state that we cannot undo if
148 * there is a collision on the seqlock and our caller has to
149 * retry. (Namely, old_jifs and old_count.) So we must treat
150 * jiffies as volatile despite the lock. We read jiffies
151 * before latching the timer count to guarantee that although
152 * the jiffies value might be older than the count (that is,
153 * the counter may underflow between the last point where
154 * jiffies was incremented and the point where we latch the
155 * count), it cannot be newer.
156 */
157 jifs = jiffies;
158 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
159 count = inb_p(PIT_CH0); /* read the latched count */
160 count |= inb_p(PIT_CH0) << 8;
161
162 /* VIA686a test code... reset the latch if count > max + 1 */
163 if (count > LATCH) {
164 outb_p(0x34, PIT_MODE);
165 outb_p(LATCH & 0xff, PIT_CH0);
166 outb(LATCH >> 8, PIT_CH0);
167 count = LATCH - 1;
168 }
169
170 /*
171 * It's possible for count to appear to go the wrong way for a
172 * couple of reasons:
173 *
174 * 1. The timer counter underflows, but we haven't handled the
175 * resulting interrupt and incremented jiffies yet.
176 * 2. Hardware problem with the timer, not giving us continuous time,
177 * the counter does small "jumps" upwards on some Pentium systems,
178 * (see c't 95/10 page 335 for Neptun bug.)
179 *
180 * Previous attempts to handle these cases intelligently were
181 * buggy, so we just do the simple thing now.
182 */
183 if (count > old_count && jifs == old_jifs) {
184 count = old_count;
185 }
186 old_count = count;
187 old_jifs = jifs;
188
189 spin_unlock_irqrestore(&i8253_lock, flags);
190
191 count = (LATCH - 1) - count;
192
193 return (cycle_t)(jifs * LATCH) + count;
194}
195
196static struct clocksource clocksource_pit = {
197 .name = "pit",
198 .rating = 110,
199 .read = pit_read,
200 .mask = CLOCKSOURCE_MASK(32),
201 .mult = 0,
202 .shift = 20,
203};
204
205static int __init init_pit_clocksource(void)
206{
207 if (num_possible_cpus() > 1) /* PIT does not scale! */
208 return 0;
209
210 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
211 return clocksource_register(&clocksource_pit);
212}
213arch_initcall(init_pit_clocksource);
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 3a2d255361bc..471013577108 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -30,8 +30,10 @@
30 30
31static int i8259A_auto_eoi = -1; 31static int i8259A_auto_eoi = -1;
32DEFINE_SPINLOCK(i8259A_lock); 32DEFINE_SPINLOCK(i8259A_lock);
33/* some platforms call this... */ 33static void disable_8259A_irq(unsigned int irq);
34void mask_and_ack_8259A(unsigned int); 34static void enable_8259A_irq(unsigned int irq);
35static void mask_and_ack_8259A(unsigned int irq);
36static void init_8259A(int auto_eoi);
35 37
36static struct irq_chip i8259A_chip = { 38static struct irq_chip i8259A_chip = {
37 .name = "XT-PIC", 39 .name = "XT-PIC",
@@ -39,6 +41,9 @@ static struct irq_chip i8259A_chip = {
39 .disable = disable_8259A_irq, 41 .disable = disable_8259A_irq,
40 .unmask = enable_8259A_irq, 42 .unmask = enable_8259A_irq,
41 .mask_ack = mask_and_ack_8259A, 43 .mask_ack = mask_and_ack_8259A,
44#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
45 .set_affinity = plat_set_irq_affinity,
46#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
42}; 47};
43 48
44/* 49/*
@@ -53,7 +58,7 @@ static unsigned int cached_irq_mask = 0xffff;
53#define cached_master_mask (cached_irq_mask) 58#define cached_master_mask (cached_irq_mask)
54#define cached_slave_mask (cached_irq_mask >> 8) 59#define cached_slave_mask (cached_irq_mask >> 8)
55 60
56void disable_8259A_irq(unsigned int irq) 61static void disable_8259A_irq(unsigned int irq)
57{ 62{
58 unsigned int mask; 63 unsigned int mask;
59 unsigned long flags; 64 unsigned long flags;
@@ -69,7 +74,7 @@ void disable_8259A_irq(unsigned int irq)
69 spin_unlock_irqrestore(&i8259A_lock, flags); 74 spin_unlock_irqrestore(&i8259A_lock, flags);
70} 75}
71 76
72void enable_8259A_irq(unsigned int irq) 77static void enable_8259A_irq(unsigned int irq)
73{ 78{
74 unsigned int mask; 79 unsigned int mask;
75 unsigned long flags; 80 unsigned long flags;
@@ -122,14 +127,14 @@ static inline int i8259A_irq_real(unsigned int irq)
122 int irqmask = 1 << irq; 127 int irqmask = 1 << irq;
123 128
124 if (irq < 8) { 129 if (irq < 8) {
125 outb(0x0B,PIC_MASTER_CMD); /* ISR register */ 130 outb(0x0B, PIC_MASTER_CMD); /* ISR register */
126 value = inb(PIC_MASTER_CMD) & irqmask; 131 value = inb(PIC_MASTER_CMD) & irqmask;
127 outb(0x0A,PIC_MASTER_CMD); /* back to the IRR register */ 132 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
128 return value; 133 return value;
129 } 134 }
130 outb(0x0B,PIC_SLAVE_CMD); /* ISR register */ 135 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
131 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8); 136 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
132 outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */ 137 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
133 return value; 138 return value;
134} 139}
135 140
@@ -139,7 +144,7 @@ static inline int i8259A_irq_real(unsigned int irq)
139 * first, _then_ send the EOI, and the order of EOI 144 * first, _then_ send the EOI, and the order of EOI
140 * to the two 8259s is important! 145 * to the two 8259s is important!
141 */ 146 */
142void mask_and_ack_8259A(unsigned int irq) 147static void mask_and_ack_8259A(unsigned int irq)
143{ 148{
144 unsigned int irqmask; 149 unsigned int irqmask;
145 unsigned long flags; 150 unsigned long flags;
@@ -170,12 +175,12 @@ handle_real_irq:
170 if (irq & 8) { 175 if (irq & 8) {
171 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ 176 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
172 outb(cached_slave_mask, PIC_SLAVE_IMR); 177 outb(cached_slave_mask, PIC_SLAVE_IMR);
173 outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ 178 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
174 outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ 179 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
175 } else { 180 } else {
176 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ 181 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
177 outb(cached_master_mask, PIC_MASTER_IMR); 182 outb(cached_master_mask, PIC_MASTER_IMR);
178 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ 183 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
179 } 184 }
180 smtc_im_ack_irq(irq); 185 smtc_im_ack_irq(irq);
181 spin_unlock_irqrestore(&i8259A_lock, flags); 186 spin_unlock_irqrestore(&i8259A_lock, flags);
@@ -253,7 +258,7 @@ static int __init i8259A_init_sysfs(void)
253 258
254device_initcall(i8259A_init_sysfs); 259device_initcall(i8259A_init_sysfs);
255 260
256void init_8259A(int auto_eoi) 261static void init_8259A(int auto_eoi)
257{ 262{
258 unsigned long flags; 263 unsigned long flags;
259 264
@@ -300,7 +305,9 @@ void init_8259A(int auto_eoi)
300 * IRQ2 is cascade interrupt to second interrupt controller 305 * IRQ2 is cascade interrupt to second interrupt controller
301 */ 306 */
302static struct irqaction irq2 = { 307static struct irqaction irq2 = {
303 no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL 308 .handler = no_action,
309 .mask = CPU_MASK_NONE,
310 .name = "cascade",
304}; 311};
305 312
306static struct resource pic1_io_resource = { 313static struct resource pic1_io_resource = {
@@ -322,7 +329,7 @@ static struct resource pic2_io_resource = {
322 * driver compatibility reasons interrupts 0 - 15 to be the i8259 329 * driver compatibility reasons interrupts 0 - 15 to be the i8259
323 * interrupts even if the hardware uses a different interrupt numbering. 330 * interrupts even if the hardware uses a different interrupt numbering.
324 */ 331 */
325void __init init_i8259_irqs (void) 332void __init init_i8259_irqs(void)
326{ 333{
327 int i; 334 int i;
328 335
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 403d96f99e77..8ef5cf4cc423 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -203,8 +203,8 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
203 * Put the ELF interpreter info on the stack 203 * Put the ELF interpreter info on the stack
204 */ 204 */
205#define NEW_AUX_ENT(nr, id, val) \ 205#define NEW_AUX_ENT(nr, id, val) \
206 __put_user ((id), sp+(nr*2)); \ 206 __put_user((id), sp+(nr*2)); \
207 __put_user ((val), sp+(nr*2+1)); \ 207 __put_user((val), sp+(nr*2+1)); \
208 208
209 sp -= 2; 209 sp -= 2;
210 NEW_AUX_ENT(0, AT_NULL, 0); 210 NEW_AUX_ENT(0, AT_NULL, 0);
@@ -212,17 +212,17 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
212 if (exec) { 212 if (exec) {
213 sp -= 11*2; 213 sp -= 11*2;
214 214
215 NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff); 215 NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
216 NEW_AUX_ENT (1, AT_PHENT, sizeof (struct elf_phdr)); 216 NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
217 NEW_AUX_ENT (2, AT_PHNUM, exec->e_phnum); 217 NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
218 NEW_AUX_ENT (3, AT_PAGESZ, ELF_EXEC_PAGESIZE); 218 NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
219 NEW_AUX_ENT (4, AT_BASE, interp_load_addr); 219 NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
220 NEW_AUX_ENT (5, AT_FLAGS, 0); 220 NEW_AUX_ENT(5, AT_FLAGS, 0);
221 NEW_AUX_ENT (6, AT_ENTRY, (elf_addr_t) exec->e_entry); 221 NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
222 NEW_AUX_ENT (7, AT_UID, (elf_addr_t) current->uid); 222 NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
223 NEW_AUX_ENT (8, AT_EUID, (elf_addr_t) current->euid); 223 NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
224 NEW_AUX_ENT (9, AT_GID, (elf_addr_t) current->gid); 224 NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
225 NEW_AUX_ENT (10, AT_EGID, (elf_addr_t) current->egid); 225 NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
226 } 226 }
227#undef NEW_AUX_ENT 227#undef NEW_AUX_ENT
228 228
@@ -231,16 +231,16 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
231 sp -= argc+1; 231 sp -= argc+1;
232 argv = sp; 232 argv = sp;
233 233
234 __put_user((elf_addr_t)argc,--sp); 234 __put_user((elf_addr_t)argc, --sp);
235 current->mm->arg_start = (unsigned long) p; 235 current->mm->arg_start = (unsigned long) p;
236 while (argc-->0) { 236 while (argc-->0) {
237 __put_user((unsigned long)p,argv++); 237 __put_user((unsigned long)p, argv++);
238 p += strlen_user(p); 238 p += strlen_user(p);
239 } 239 }
240 __put_user((unsigned long) NULL, argv); 240 __put_user((unsigned long) NULL, argv);
241 current->mm->arg_end = current->mm->env_start = (unsigned long) p; 241 current->mm->arg_end = current->mm->env_start = (unsigned long) p;
242 while (envc-->0) { 242 while (envc-->0) {
243 __put_user((unsigned long)p,envp++); 243 __put_user((unsigned long)p, envp++);
244 p += strlen_user(p); 244 p += strlen_user(p);
245 } 245 }
246 __put_user((unsigned long) NULL, envp); 246 __put_user((unsigned long) NULL, envp);
@@ -581,7 +581,7 @@ static void irix_map_prda_page(void)
581 struct prda *pp; 581 struct prda *pp;
582 582
583 down_write(&current->mm->mmap_sem); 583 down_write(&current->mm->mmap_sem);
584 v = do_brk (PRDA_ADDRESS, PAGE_SIZE); 584 v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
585 up_write(&current->mm->mmap_sem); 585 up_write(&current->mm->mmap_sem);
586 586
587 if (v < 0) 587 if (v < 0)
@@ -815,7 +815,7 @@ out_free_interp:
815 kfree(elf_interpreter); 815 kfree(elf_interpreter);
816out_free_file: 816out_free_file:
817out_free_ph: 817out_free_ph:
818 kfree (elf_phdata); 818 kfree(elf_phdata);
819 goto out; 819 goto out;
820} 820}
821 821
@@ -831,7 +831,7 @@ static int load_irix_library(struct file *file)
831 int retval; 831 int retval;
832 unsigned int bss; 832 unsigned int bss;
833 int error; 833 int error;
834 int i,j, k; 834 int i, j, k;
835 835
836 error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex)); 836 error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
837 if (error != sizeof(elf_ex)) 837 if (error != sizeof(elf_ex))
@@ -1232,7 +1232,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file)
1232 strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname)); 1232 strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
1233 1233
1234 /* Try to dump the FPU. */ 1234 /* Try to dump the FPU. */
1235 prstatus.pr_fpvalid = dump_fpu (regs, &fpu); 1235 prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
1236 if (!prstatus.pr_fpvalid) { 1236 if (!prstatus.pr_fpvalid) {
1237 numnote--; 1237 numnote--;
1238 } else { 1238 } else {
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
index de8584f62311..cf2dcd3d6a93 100644
--- a/arch/mips/kernel/irixinv.c
+++ b/arch/mips/kernel/irixinv.c
@@ -14,7 +14,7 @@ int inventory_items = 0;
14 14
15static inventory_t inventory [MAX_INVENTORY]; 15static inventory_t inventory [MAX_INVENTORY];
16 16
17void add_to_inventory (int class, int type, int controller, int unit, int state) 17void add_to_inventory(int class, int type, int controller, int unit, int state)
18{ 18{
19 inventory_t *ni = &inventory [inventory_items]; 19 inventory_t *ni = &inventory [inventory_items];
20 20
@@ -30,7 +30,7 @@ void add_to_inventory (int class, int type, int controller, int unit, int state)
30 inventory_items++; 30 inventory_items++;
31} 31}
32 32
33int dump_inventory_to_user (void __user *userbuf, int size) 33int dump_inventory_to_user(void __user *userbuf, int size)
34{ 34{
35 inventory_t *inv = &inventory [0]; 35 inventory_t *inv = &inventory [0];
36 inventory_t __user *user = userbuf; 36 inventory_t __user *user = userbuf;
@@ -45,7 +45,7 @@ int dump_inventory_to_user (void __user *userbuf, int size)
45 return -EFAULT; 45 return -EFAULT;
46 user++; 46 user++;
47 } 47 }
48 return inventory_items * sizeof (inventory_t); 48 return inventory_items * sizeof(inventory_t);
49} 49}
50 50
51int __init init_inventory(void) 51int __init init_inventory(void)
@@ -55,24 +55,24 @@ int __init init_inventory(void)
55 * most likely this will not let just anyone run the X server 55 * most likely this will not let just anyone run the X server
56 * until we put the right values all over the place 56 * until we put the right values all over the place
57 */ 57 */
58 add_to_inventory (10, 3, 0, 0, 16400); 58 add_to_inventory(10, 3, 0, 0, 16400);
59 add_to_inventory (1, 1, 150, -1, 12); 59 add_to_inventory(1, 1, 150, -1, 12);
60 add_to_inventory (1, 3, 0, 0, 8976); 60 add_to_inventory(1, 3, 0, 0, 8976);
61 add_to_inventory (1, 2, 0, 0, 8976); 61 add_to_inventory(1, 2, 0, 0, 8976);
62 add_to_inventory (4, 8, 0, 0, 2); 62 add_to_inventory(4, 8, 0, 0, 2);
63 add_to_inventory (5, 5, 0, 0, 1); 63 add_to_inventory(5, 5, 0, 0, 1);
64 add_to_inventory (3, 3, 0, 0, 32768); 64 add_to_inventory(3, 3, 0, 0, 32768);
65 add_to_inventory (3, 4, 0, 0, 32768); 65 add_to_inventory(3, 4, 0, 0, 32768);
66 add_to_inventory (3, 8, 0, 0, 524288); 66 add_to_inventory(3, 8, 0, 0, 524288);
67 add_to_inventory (3, 9, 0, 0, 64); 67 add_to_inventory(3, 9, 0, 0, 64);
68 add_to_inventory (3, 1, 0, 0, 67108864); 68 add_to_inventory(3, 1, 0, 0, 67108864);
69 add_to_inventory (12, 3, 0, 0, 16); 69 add_to_inventory(12, 3, 0, 0, 16);
70 add_to_inventory (8, 7, 17, 0, 16777472); 70 add_to_inventory(8, 7, 17, 0, 16777472);
71 add_to_inventory (8, 0, 0, 0, 1); 71 add_to_inventory(8, 0, 0, 0, 1);
72 add_to_inventory (2, 1, 0, 13, 2); 72 add_to_inventory(2, 1, 0, 13, 2);
73 add_to_inventory (2, 2, 0, 2, 0); 73 add_to_inventory(2, 2, 0, 2, 0);
74 add_to_inventory (2, 2, 0, 1, 0); 74 add_to_inventory(2, 2, 0, 1, 0);
75 add_to_inventory (7, 14, 0, 0, 6); 75 add_to_inventory(7, 14, 0, 0, 6);
76 76
77 return 0; 77 return 0;
78} 78}
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
index 30f9eb09db3f..2bde200d5ad0 100644
--- a/arch/mips/kernel/irixioctl.c
+++ b/arch/mips/kernel/irixioctl.c
@@ -238,7 +238,7 @@ asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
238 current->comm, current->pid, cmd); 238 current->comm, current->pid, cmd);
239 do_exit(255); 239 do_exit(255);
240#else 240#else
241 error = sys_ioctl (fd, cmd, arg); 241 error = sys_ioctl(fd, cmd, arg);
242#endif 242#endif
243 } 243 }
244 244
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 28b2a8f00911..85c2e389edd6 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -163,9 +163,9 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
163 ret = setup_irix_frame(ka, regs, sig, oldset); 163 ret = setup_irix_frame(ka, regs, sig, oldset);
164 164
165 spin_lock_irq(&current->sighand->siglock); 165 spin_lock_irq(&current->sighand->siglock);
166 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 166 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
167 if (!(ka->sa.sa_flags & SA_NODEFER)) 167 if (!(ka->sa.sa_flags & SA_NODEFER))
168 sigaddset(&current->blocked,sig); 168 sigaddset(&current->blocked, sig);
169 recalc_sigpending(); 169 recalc_sigpending();
170 spin_unlock_irq(&current->sighand->siglock); 170 spin_unlock_irq(&current->sighand->siglock);
171 171
@@ -605,8 +605,8 @@ repeat:
605 current->state = TASK_INTERRUPTIBLE; 605 current->state = TASK_INTERRUPTIBLE;
606 read_lock(&tasklist_lock); 606 read_lock(&tasklist_lock);
607 tsk = current; 607 tsk = current;
608 list_for_each(_p,&tsk->children) { 608 list_for_each(_p, &tsk->children) {
609 p = list_entry(_p,struct task_struct,sibling); 609 p = list_entry(_p, struct task_struct, sibling);
610 if ((type == IRIX_P_PID) && p->pid != pid) 610 if ((type == IRIX_P_PID) && p->pid != pid)
611 continue; 611 continue;
612 if ((type == IRIX_P_PGID) && process_group(p) != pid) 612 if ((type == IRIX_P_PGID) && process_group(p) != pid)
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
new file mode 100644
index 000000000000..1b81b131f43c
--- /dev/null
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -0,0 +1,131 @@
1/*
2 * GT641xx IRQ routines.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/hardirq.h>
21#include <linux/init.h>
22#include <linux/irq.h>
23#include <linux/spinlock.h>
24#include <linux/types.h>
25
26#include <asm/gt64120.h>
27
28#define GT641XX_IRQ_TO_BIT(irq) (1U << (irq - GT641XX_IRQ_BASE))
29
30static DEFINE_SPINLOCK(gt641xx_irq_lock);
31
32static void ack_gt641xx_irq(unsigned int irq)
33{
34 unsigned long flags;
35 u32 cause;
36
37 spin_lock_irqsave(&gt641xx_irq_lock, flags);
38 cause = GT_READ(GT_INTRCAUSE_OFS);
39 cause &= ~GT641XX_IRQ_TO_BIT(irq);
40 GT_WRITE(GT_INTRCAUSE_OFS, cause);
41 spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
42}
43
44static void mask_gt641xx_irq(unsigned int irq)
45{
46 unsigned long flags;
47 u32 mask;
48
49 spin_lock_irqsave(&gt641xx_irq_lock, flags);
50 mask = GT_READ(GT_INTRMASK_OFS);
51 mask &= ~GT641XX_IRQ_TO_BIT(irq);
52 GT_WRITE(GT_INTRMASK_OFS, mask);
53 spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
54}
55
56static void mask_ack_gt641xx_irq(unsigned int irq)
57{
58 unsigned long flags;
59 u32 cause, mask;
60
61 spin_lock_irqsave(&gt641xx_irq_lock, flags);
62 mask = GT_READ(GT_INTRMASK_OFS);
63 mask &= ~GT641XX_IRQ_TO_BIT(irq);
64 GT_WRITE(GT_INTRMASK_OFS, mask);
65
66 cause = GT_READ(GT_INTRCAUSE_OFS);
67 cause &= ~GT641XX_IRQ_TO_BIT(irq);
68 GT_WRITE(GT_INTRCAUSE_OFS, cause);
69 spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
70}
71
72static void unmask_gt641xx_irq(unsigned int irq)
73{
74 unsigned long flags;
75 u32 mask;
76
77 spin_lock_irqsave(&gt641xx_irq_lock, flags);
78 mask = GT_READ(GT_INTRMASK_OFS);
79 mask |= GT641XX_IRQ_TO_BIT(irq);
80 GT_WRITE(GT_INTRMASK_OFS, mask);
81 spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
82}
83
84static struct irq_chip gt641xx_irq_chip = {
85 .name = "GT641xx",
86 .ack = ack_gt641xx_irq,
87 .mask = mask_gt641xx_irq,
88 .mask_ack = mask_ack_gt641xx_irq,
89 .unmask = unmask_gt641xx_irq,
90};
91
92void gt641xx_irq_dispatch(void)
93{
94 u32 cause, mask;
95 int i;
96
97 cause = GT_READ(GT_INTRCAUSE_OFS);
98 mask = GT_READ(GT_INTRMASK_OFS);
99 cause &= mask;
100
101 /*
102 * bit0 : logical or of all the interrupt bits.
103 * bit30: logical or of bits[29:26,20:1].
104 * bit31: logical or of bits[25:1].
105 */
106 for (i = 1; i < 30; i++) {
107 if (cause & (1U << i)) {
108 do_IRQ(GT641XX_IRQ_BASE + i);
109 return;
110 }
111 }
112
113 atomic_inc(&irq_err_count);
114}
115
116void __init gt641xx_irq_init(void)
117{
118 int i;
119
120 GT_WRITE(GT_INTRMASK_OFS, 0);
121 GT_WRITE(GT_INTRCAUSE_OFS, 0);
122
123 /*
124 * bit0 : logical or of all the interrupt bits.
125 * bit30: logical or of bits[29:26,20:1].
126 * bit31: logical or of bits[25:1].
127 */
128 for (i = 1; i < 30; i++)
129 set_irq_chip_and_handler(GT641XX_IRQ_BASE + i,
130 &gt641xx_irq_chip, handle_level_irq);
131}
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 1ecdd50bfc60..4edc7e451d91 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -99,7 +99,7 @@ void ll_msc_irq(void)
99} 99}
100 100
101void 101void
102msc_bind_eic_interrupt (unsigned int irq, unsigned int set) 102msc_bind_eic_interrupt(unsigned int irq, unsigned int set)
103{ 103{
104 MSCIC_WRITE(MSC01_IC_RAMW, 104 MSCIC_WRITE(MSC01_IC_RAMW,
105 (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); 105 (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
@@ -130,7 +130,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
130{ 130{
131 extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset); 131 extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
132 132
133 _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000); 133 _icctrl_msc = (unsigned long) ioremap(icubase, 0x40000);
134 134
135 /* Reset interrupt controller - initialises all registers to 0 */ 135 /* Reset interrupt controller - initialises all registers to 0 */
136 MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT); 136 MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT);
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index a990aad2f049..d06e9c9af790 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -93,7 +93,7 @@ int show_interrupts(struct seq_file *p, void *v)
93 if (i == 0) { 93 if (i == 0) {
94 seq_printf(p, " "); 94 seq_printf(p, " ");
95 for_each_online_cpu(j) 95 for_each_online_cpu(j)
96 seq_printf(p, "CPU%d ",j); 96 seq_printf(p, "CPU%d ", j);
97 seq_putc(p, '\n'); 97 seq_putc(p, '\n');
98 } 98 }
99 99
@@ -102,7 +102,7 @@ int show_interrupts(struct seq_file *p, void *v)
102 action = irq_desc[i].action; 102 action = irq_desc[i].action;
103 if (!action) 103 if (!action)
104 goto skip; 104 goto skip;
105 seq_printf(p, "%3d: ",i); 105 seq_printf(p, "%3d: ", i);
106#ifndef CONFIG_SMP 106#ifndef CONFIG_SMP
107 seq_printf(p, "%10u ", kstat_irqs(i)); 107 seq_printf(p, "%10u ", kstat_irqs(i));
108#else 108#else
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index cb9a14a1ca5b..d2c2e00e5864 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -118,11 +118,11 @@ struct apsp_table syscall_command_table[] = {
118 118
119static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3) 119static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
120{ 120{
121 register long int _num __asm__ ("$2") = num; 121 register long int _num __asm__("$2") = num;
122 register long int _arg0 __asm__ ("$4") = arg0; 122 register long int _arg0 __asm__("$4") = arg0;
123 register long int _arg1 __asm__ ("$5") = arg1; 123 register long int _arg1 __asm__("$5") = arg1;
124 register long int _arg2 __asm__ ("$6") = arg2; 124 register long int _arg2 __asm__("$6") = arg2;
125 register long int _arg3 __asm__ ("$7") = arg3; 125 register long int _arg3 __asm__("$7") = arg3;
126 126
127 mm_segment_t old_fs; 127 mm_segment_t old_fs;
128 128
@@ -239,7 +239,7 @@ void sp_work_handle_request(void)
239 case MTSP_SYSCALL_GETTOD: 239 case MTSP_SYSCALL_GETTOD:
240 memset(&tz, 0, sizeof(tz)); 240 memset(&tz, 0, sizeof(tz));
241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv, 241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
242 (int)&tz, 0,0)) == 0) 242 (int)&tz, 0, 0)) == 0)
243 ret.retval = tv.tv_sec; 243 ret.retval = tv.tv_sec;
244 break; 244 break;
245 245
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 135d9a5fe337..d6e01215fb2b 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -58,10 +58,10 @@
58#define AA(__x) ((unsigned long)((int)__x)) 58#define AA(__x) ((unsigned long)((int)__x))
59 59
60#ifdef __MIPSEB__ 60#ifdef __MIPSEB__
61#define merge_64(r1,r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL)) 61#define merge_64(r1, r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
62#endif 62#endif
63#ifdef __MIPSEL__ 63#ifdef __MIPSEL__
64#define merge_64(r1,r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) 64#define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
65#endif 65#endif
66 66
67/* 67/*
@@ -96,7 +96,7 @@ int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
96#endif 96#endif
97 tmp.st_blocks = stat->blocks; 97 tmp.st_blocks = stat->blocks;
98 tmp.st_blksize = stat->blksize; 98 tmp.st_blksize = stat->blksize;
99 return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0; 99 return copy_to_user(statbuf, &tmp, sizeof(tmp)) ? -EFAULT : 0;
100} 100}
101 101
102asmlinkage unsigned long 102asmlinkage unsigned long
@@ -300,13 +300,13 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
300{ 300{
301 struct timespec t; 301 struct timespec t;
302 int ret; 302 int ret;
303 mm_segment_t old_fs = get_fs (); 303 mm_segment_t old_fs = get_fs();
304 304
305 set_fs (KERNEL_DS); 305 set_fs(KERNEL_DS);
306 ret = sys_sched_rr_get_interval(pid, (struct timespec __user *)&t); 306 ret = sys_sched_rr_get_interval(pid, (struct timespec __user *)&t);
307 set_fs (old_fs); 307 set_fs(old_fs);
308 if (put_user (t.tv_sec, &interval->tv_sec) || 308 if (put_user (t.tv_sec, &interval->tv_sec) ||
309 __put_user (t.tv_nsec, &interval->tv_nsec)) 309 __put_user(t.tv_nsec, &interval->tv_nsec))
310 return -EFAULT; 310 return -EFAULT;
311 return ret; 311 return ret;
312} 312}
@@ -314,7 +314,7 @@ asmlinkage int sys32_sched_rr_get_interval(compat_pid_t pid,
314#ifdef CONFIG_SYSVIPC 314#ifdef CONFIG_SYSVIPC
315 315
316asmlinkage long 316asmlinkage long
317sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) 317sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
318{ 318{
319 int version, err; 319 int version, err;
320 320
@@ -373,7 +373,7 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
373#else 373#else
374 374
375asmlinkage long 375asmlinkage long
376sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) 376sys32_ipc(u32 call, int first, int second, int third, u32 ptr, u32 fifth)
377{ 377{
378 return -ENOSYS; 378 return -ENOSYS;
379} 379}
@@ -505,16 +505,16 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32)
505 505
506 set_fs(KERNEL_DS); 506 set_fs(KERNEL_DS);
507 err = sys_ustat(dev, (struct ustat __user *)&tmp); 507 err = sys_ustat(dev, (struct ustat __user *)&tmp);
508 set_fs (old_fs); 508 set_fs(old_fs);
509 509
510 if (err) 510 if (err)
511 goto out; 511 goto out;
512 512
513 memset(&tmp32,0,sizeof(struct ustat32)); 513 memset(&tmp32, 0, sizeof(struct ustat32));
514 tmp32.f_tfree = tmp.f_tfree; 514 tmp32.f_tfree = tmp.f_tfree;
515 tmp32.f_tinode = tmp.f_tinode; 515 tmp32.f_tinode = tmp.f_tinode;
516 516
517 err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; 517 err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
518 518
519out: 519out:
520 return err; 520 return err;
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 56750b02ab40..3d6b1ec1f328 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -236,7 +236,7 @@ void mips_mt_set_cpuoptions(void)
236 if (oconfig7 != nconfig7) { 236 if (oconfig7 != nconfig7) {
237 __asm__ __volatile("sync"); 237 __asm__ __volatile("sync");
238 write_c0_config7(nconfig7); 238 write_c0_config7(nconfig7);
239 ehb (); 239 ehb();
240 printk("Config7: 0x%08x\n", read_c0_config7()); 240 printk("Config7: 0x%08x\n", read_c0_config7());
241 } 241 }
242 242
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index ec04f5a1a5ea..efd2d1314123 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -17,76 +17,6 @@
17 17
18unsigned int vced_count, vcei_count; 18unsigned int vced_count, vcei_count;
19 19
20static const char *cpu_name[] = {
21 [CPU_UNKNOWN] = "unknown",
22 [CPU_R2000] = "R2000",
23 [CPU_R3000] = "R3000",
24 [CPU_R3000A] = "R3000A",
25 [CPU_R3041] = "R3041",
26 [CPU_R3051] = "R3051",
27 [CPU_R3052] = "R3052",
28 [CPU_R3081] = "R3081",
29 [CPU_R3081E] = "R3081E",
30 [CPU_R4000PC] = "R4000PC",
31 [CPU_R4000SC] = "R4000SC",
32 [CPU_R4000MC] = "R4000MC",
33 [CPU_R4200] = "R4200",
34 [CPU_R4400PC] = "R4400PC",
35 [CPU_R4400SC] = "R4400SC",
36 [CPU_R4400MC] = "R4400MC",
37 [CPU_R4600] = "R4600",
38 [CPU_R6000] = "R6000",
39 [CPU_R6000A] = "R6000A",
40 [CPU_R8000] = "R8000",
41 [CPU_R10000] = "R10000",
42 [CPU_R12000] = "R12000",
43 [CPU_R14000] = "R14000",
44 [CPU_R4300] = "R4300",
45 [CPU_R4650] = "R4650",
46 [CPU_R4700] = "R4700",
47 [CPU_R5000] = "R5000",
48 [CPU_R5000A] = "R5000A",
49 [CPU_R4640] = "R4640",
50 [CPU_NEVADA] = "Nevada",
51 [CPU_RM7000] = "RM7000",
52 [CPU_RM9000] = "RM9000",
53 [CPU_R5432] = "R5432",
54 [CPU_4KC] = "MIPS 4Kc",
55 [CPU_5KC] = "MIPS 5Kc",
56 [CPU_R4310] = "R4310",
57 [CPU_SB1] = "SiByte SB1",
58 [CPU_SB1A] = "SiByte SB1A",
59 [CPU_TX3912] = "TX3912",
60 [CPU_TX3922] = "TX3922",
61 [CPU_TX3927] = "TX3927",
62 [CPU_AU1000] = "Au1000",
63 [CPU_AU1500] = "Au1500",
64 [CPU_AU1100] = "Au1100",
65 [CPU_AU1550] = "Au1550",
66 [CPU_AU1200] = "Au1200",
67 [CPU_4KEC] = "MIPS 4KEc",
68 [CPU_4KSC] = "MIPS 4KSc",
69 [CPU_VR41XX] = "NEC Vr41xx",
70 [CPU_R5500] = "R5500",
71 [CPU_TX49XX] = "TX49xx",
72 [CPU_20KC] = "MIPS 20Kc",
73 [CPU_24K] = "MIPS 24K",
74 [CPU_25KF] = "MIPS 25Kf",
75 [CPU_34K] = "MIPS 34K",
76 [CPU_74K] = "MIPS 74K",
77 [CPU_VR4111] = "NEC VR4111",
78 [CPU_VR4121] = "NEC VR4121",
79 [CPU_VR4122] = "NEC VR4122",
80 [CPU_VR4131] = "NEC VR4131",
81 [CPU_VR4133] = "NEC VR4133",
82 [CPU_VR4181] = "NEC VR4181",
83 [CPU_VR4181A] = "NEC VR4181A",
84 [CPU_SR71000] = "Sandcraft SR71000",
85 [CPU_PR4450] = "Philips PR4450",
86 [CPU_LOONGSON2] = "ICT Loongson-2",
87};
88
89
90static int show_cpuinfo(struct seq_file *m, void *v) 20static int show_cpuinfo(struct seq_file *m, void *v)
91{ 21{
92 unsigned long n = (unsigned long) v - 1; 22 unsigned long n = (unsigned long) v - 1;
@@ -108,8 +38,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
108 seq_printf(m, "processor\t\t: %ld\n", n); 38 seq_printf(m, "processor\t\t: %ld\n", n);
109 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 39 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
110 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 40 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
111 seq_printf(m, fmt, cpu_name[cpu_data[n].cputype <= CPU_LAST ? 41 seq_printf(m, fmt, __cpu_name[smp_processor_id()],
112 cpu_data[n].cputype : CPU_UNKNOWN],
113 (version >> 4) & 0x0f, version & 0x0f, 42 (version >> 4) & 0x0f, version & 0x0f,
114 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 43 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
115 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", 44 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index e6ce943099a0..11cb264f59ce 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -11,6 +11,7 @@
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include <linux/tick.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/mm.h> 16#include <linux/mm.h>
16#include <linux/stddef.h> 17#include <linux/stddef.h>
@@ -52,6 +53,7 @@ void __noreturn cpu_idle(void)
52{ 53{
53 /* endless idle loop with no priority at all */ 54 /* endless idle loop with no priority at all */
54 while (1) { 55 while (1) {
56 tick_nohz_stop_sched_tick();
55 while (!need_resched()) { 57 while (!need_resched()) {
56#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG 58#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
57 extern void smtc_idle_loop_hook(void); 59 extern void smtc_idle_loop_hook(void);
@@ -61,6 +63,7 @@ void __noreturn cpu_idle(void)
61 if (cpu_wait) 63 if (cpu_wait)
62 (*cpu_wait)(); 64 (*cpu_wait)();
63 } 65 }
66 tick_nohz_restart_sched_tick();
64 preempt_enable_no_resched(); 67 preempt_enable_no_resched();
65 schedule(); 68 schedule();
66 preempt_disable(); 69 preempt_disable();
@@ -199,13 +202,13 @@ void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
199#endif 202#endif
200} 203}
201 204
202int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) 205int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
203{ 206{
204 elf_dump_regs(*regs, task_pt_regs(tsk)); 207 elf_dump_regs(*regs, task_pt_regs(tsk));
205 return 1; 208 return 1;
206} 209}
207 210
208int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr) 211int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
209{ 212{
210 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu)); 213 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
211 214
@@ -231,8 +234,8 @@ long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
231 regs.cp0_epc = (unsigned long) kernel_thread_helper; 234 regs.cp0_epc = (unsigned long) kernel_thread_helper;
232 regs.cp0_status = read_c0_status(); 235 regs.cp0_status = read_c0_status();
233#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 236#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
234 regs.cp0_status &= ~(ST0_KUP | ST0_IEC); 237 regs.cp0_status = (regs.cp0_status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
235 regs.cp0_status |= ST0_IEP; 238 ((regs.cp0_status & (ST0_KUC | ST0_IEC)) << 2);
236#else 239#else
237 regs.cp0_status |= ST0_EXL; 240 regs.cp0_status |= ST0_EXL;
238#endif 241#endif
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index bbd57b20b43e..58aa6fec1146 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -54,7 +54,7 @@ void ptrace_disable(struct task_struct *child)
54 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. 54 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
55 * Registers are sign extended to fill the available space. 55 * Registers are sign extended to fill the available space.
56 */ 56 */
57int ptrace_getregs (struct task_struct *child, __s64 __user *data) 57int ptrace_getregs(struct task_struct *child, __s64 __user *data)
58{ 58{
59 struct pt_regs *regs; 59 struct pt_regs *regs;
60 int i; 60 int i;
@@ -65,13 +65,13 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
65 regs = task_pt_regs(child); 65 regs = task_pt_regs(child);
66 66
67 for (i = 0; i < 32; i++) 67 for (i = 0; i < 32; i++)
68 __put_user (regs->regs[i], data + i); 68 __put_user(regs->regs[i], data + i);
69 __put_user (regs->lo, data + EF_LO - EF_R0); 69 __put_user(regs->lo, data + EF_LO - EF_R0);
70 __put_user (regs->hi, data + EF_HI - EF_R0); 70 __put_user(regs->hi, data + EF_HI - EF_R0);
71 __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); 71 __put_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
72 __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); 72 __put_user(regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
73 __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0); 73 __put_user(regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
74 __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); 74 __put_user(regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
75 75
76 return 0; 76 return 0;
77} 77}
@@ -81,7 +81,7 @@ int ptrace_getregs (struct task_struct *child, __s64 __user *data)
81 * the 64-bit format. On a 32-bit kernel only the lower order half 81 * the 64-bit format. On a 32-bit kernel only the lower order half
82 * (according to endianness) will be used. 82 * (according to endianness) will be used.
83 */ 83 */
84int ptrace_setregs (struct task_struct *child, __s64 __user *data) 84int ptrace_setregs(struct task_struct *child, __s64 __user *data)
85{ 85{
86 struct pt_regs *regs; 86 struct pt_regs *regs;
87 int i; 87 int i;
@@ -92,17 +92,17 @@ int ptrace_setregs (struct task_struct *child, __s64 __user *data)
92 regs = task_pt_regs(child); 92 regs = task_pt_regs(child);
93 93
94 for (i = 0; i < 32; i++) 94 for (i = 0; i < 32; i++)
95 __get_user (regs->regs[i], data + i); 95 __get_user(regs->regs[i], data + i);
96 __get_user (regs->lo, data + EF_LO - EF_R0); 96 __get_user(regs->lo, data + EF_LO - EF_R0);
97 __get_user (regs->hi, data + EF_HI - EF_R0); 97 __get_user(regs->hi, data + EF_HI - EF_R0);
98 __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0); 98 __get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
99 99
100 /* badvaddr, status, and cause may not be written. */ 100 /* badvaddr, status, and cause may not be written. */
101 101
102 return 0; 102 return 0;
103} 103}
104 104
105int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) 105int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
106{ 106{
107 int i; 107 int i;
108 unsigned int tmp; 108 unsigned int tmp;
@@ -113,13 +113,13 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
113 if (tsk_used_math(child)) { 113 if (tsk_used_math(child)) {
114 fpureg_t *fregs = get_fpu_regs(child); 114 fpureg_t *fregs = get_fpu_regs(child);
115 for (i = 0; i < 32; i++) 115 for (i = 0; i < 32; i++)
116 __put_user (fregs[i], i + (__u64 __user *) data); 116 __put_user(fregs[i], i + (__u64 __user *) data);
117 } else { 117 } else {
118 for (i = 0; i < 32; i++) 118 for (i = 0; i < 32; i++)
119 __put_user ((__u64) -1, i + (__u64 __user *) data); 119 __put_user((__u64) -1, i + (__u64 __user *) data);
120 } 120 }
121 121
122 __put_user (child->thread.fpu.fcr31, data + 64); 122 __put_user(child->thread.fpu.fcr31, data + 64);
123 123
124 preempt_disable(); 124 preempt_disable();
125 if (cpu_has_fpu) { 125 if (cpu_has_fpu) {
@@ -142,12 +142,12 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
142 tmp = 0; 142 tmp = 0;
143 } 143 }
144 preempt_enable(); 144 preempt_enable();
145 __put_user (tmp, data + 65); 145 __put_user(tmp, data + 65);
146 146
147 return 0; 147 return 0;
148} 148}
149 149
150int ptrace_setfpregs (struct task_struct *child, __u32 __user *data) 150int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
151{ 151{
152 fpureg_t *fregs; 152 fpureg_t *fregs;
153 int i; 153 int i;
@@ -158,9 +158,9 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
158 fregs = get_fpu_regs(child); 158 fregs = get_fpu_regs(child);
159 159
160 for (i = 0; i < 32; i++) 160 for (i = 0; i < 32; i++)
161 __get_user (fregs[i], i + (__u64 __user *) data); 161 __get_user(fregs[i], i + (__u64 __user *) data);
162 162
163 __get_user (child->thread.fpu.fcr31, data + 64); 163 __get_user(child->thread.fpu.fcr31, data + 64);
164 164
165 /* FIR may not be written. */ 165 /* FIR may not be written. */
166 166
@@ -390,19 +390,19 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
390 } 390 }
391 391
392 case PTRACE_GETREGS: 392 case PTRACE_GETREGS:
393 ret = ptrace_getregs (child, (__u64 __user *) data); 393 ret = ptrace_getregs(child, (__u64 __user *) data);
394 break; 394 break;
395 395
396 case PTRACE_SETREGS: 396 case PTRACE_SETREGS:
397 ret = ptrace_setregs (child, (__u64 __user *) data); 397 ret = ptrace_setregs(child, (__u64 __user *) data);
398 break; 398 break;
399 399
400 case PTRACE_GETFPREGS: 400 case PTRACE_GETFPREGS:
401 ret = ptrace_getfpregs (child, (__u32 __user *) data); 401 ret = ptrace_getfpregs(child, (__u32 __user *) data);
402 break; 402 break;
403 403
404 case PTRACE_SETFPREGS: 404 case PTRACE_SETFPREGS:
405 ret = ptrace_setfpregs (child, (__u32 __user *) data); 405 ret = ptrace_setfpregs(child, (__u32 __user *) data);
406 break; 406 break;
407 407
408 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 408 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index d9a39c169450..f2bffed94fa3 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -36,11 +36,11 @@
36#include <asm/uaccess.h> 36#include <asm/uaccess.h>
37#include <asm/bootinfo.h> 37#include <asm/bootinfo.h>
38 38
39int ptrace_getregs (struct task_struct *child, __s64 __user *data); 39int ptrace_getregs(struct task_struct *child, __s64 __user *data);
40int ptrace_setregs (struct task_struct *child, __s64 __user *data); 40int ptrace_setregs(struct task_struct *child, __s64 __user *data);
41 41
42int ptrace_getfpregs (struct task_struct *child, __u32 __user *data); 42int ptrace_getfpregs(struct task_struct *child, __u32 __user *data);
43int ptrace_setfpregs (struct task_struct *child, __u32 __user *data); 43int ptrace_setfpregs(struct task_struct *child, __u32 __user *data);
44 44
45/* 45/*
46 * Tracing a 32-bit process with a 64-bit strace and vice versa will not 46 * Tracing a 32-bit process with a 64-bit strace and vice versa will not
@@ -346,19 +346,19 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
346 } 346 }
347 347
348 case PTRACE_GETREGS: 348 case PTRACE_GETREGS:
349 ret = ptrace_getregs (child, (__u64 __user *) (__u64) data); 349 ret = ptrace_getregs(child, (__u64 __user *) (__u64) data);
350 break; 350 break;
351 351
352 case PTRACE_SETREGS: 352 case PTRACE_SETREGS:
353 ret = ptrace_setregs (child, (__u64 __user *) (__u64) data); 353 ret = ptrace_setregs(child, (__u64 __user *) (__u64) data);
354 break; 354 break;
355 355
356 case PTRACE_GETFPREGS: 356 case PTRACE_GETFPREGS:
357 ret = ptrace_getfpregs (child, (__u32 __user *) (__u64) data); 357 ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
358 break; 358 break;
359 359
360 case PTRACE_SETFPREGS: 360 case PTRACE_SETFPREGS:
361 ret = ptrace_setfpregs (child, (__u32 __user *) (__u64) data); 361 ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
362 break; 362 break;
363 363
364 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 364 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 316685fca059..a06a27d6cfcd 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -51,10 +51,8 @@ EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS);
51 * These are initialized so they are in the .data section 51 * These are initialized so they are in the .data section
52 */ 52 */
53unsigned long mips_machtype __read_mostly = MACH_UNKNOWN; 53unsigned long mips_machtype __read_mostly = MACH_UNKNOWN;
54unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN;
55 54
56EXPORT_SYMBOL(mips_machtype); 55EXPORT_SYMBOL(mips_machtype);
57EXPORT_SYMBOL(mips_machgroup);
58 56
59struct boot_mem_map boot_mem_map; 57struct boot_mem_map boot_mem_map;
60 58
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 2a08ce41bf2b..a4e106c56ab5 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -613,9 +613,9 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
613 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset); 613 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
614 614
615 spin_lock_irq(&current->sighand->siglock); 615 spin_lock_irq(&current->sighand->siglock);
616 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 616 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
617 if (!(ka->sa.sa_flags & SA_NODEFER)) 617 if (!(ka->sa.sa_flags & SA_NODEFER))
618 sigaddset(&current->blocked,sig); 618 sigaddset(&current->blocked, sig);
619 recalc_sigpending(); 619 recalc_sigpending();
620 spin_unlock_irq(&current->sighand->siglock); 620 spin_unlock_irq(&current->sighand->siglock);
621 621
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 64b612a0a622..572c610db1b1 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -261,11 +261,11 @@ static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t __user *ubuf)
261 default: 261 default:
262 __put_sigset_unknown_nsig(); 262 __put_sigset_unknown_nsig();
263 case 2: 263 case 2:
264 err |= __put_user (kbuf->sig[1] >> 32, &ubuf->sig[3]); 264 err |= __put_user(kbuf->sig[1] >> 32, &ubuf->sig[3]);
265 err |= __put_user (kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]); 265 err |= __put_user(kbuf->sig[1] & 0xffffffff, &ubuf->sig[2]);
266 case 1: 266 case 1:
267 err |= __put_user (kbuf->sig[0] >> 32, &ubuf->sig[1]); 267 err |= __put_user(kbuf->sig[0] >> 32, &ubuf->sig[1]);
268 err |= __put_user (kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]); 268 err |= __put_user(kbuf->sig[0] & 0xffffffff, &ubuf->sig[0]);
269 } 269 }
270 270
271 return err; 271 return err;
@@ -283,12 +283,12 @@ static inline int get_sigset(sigset_t *kbuf, const compat_sigset_t __user *ubuf)
283 default: 283 default:
284 __get_sigset_unknown_nsig(); 284 __get_sigset_unknown_nsig();
285 case 2: 285 case 2:
286 err |= __get_user (sig[3], &ubuf->sig[3]); 286 err |= __get_user(sig[3], &ubuf->sig[3]);
287 err |= __get_user (sig[2], &ubuf->sig[2]); 287 err |= __get_user(sig[2], &ubuf->sig[2]);
288 kbuf->sig[1] = sig[2] | (sig[3] << 32); 288 kbuf->sig[1] = sig[2] | (sig[3] << 32);
289 case 1: 289 case 1:
290 err |= __get_user (sig[1], &ubuf->sig[1]); 290 err |= __get_user(sig[1], &ubuf->sig[1]);
291 err |= __get_user (sig[0], &ubuf->sig[0]); 291 err |= __get_user(sig[0], &ubuf->sig[0]);
292 kbuf->sig[0] = sig[0] | (sig[1] << 32); 292 kbuf->sig[0] = sig[0] | (sig[1] << 32);
293 } 293 }
294 294
@@ -412,10 +412,10 @@ asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs)
412 return -EFAULT; 412 return -EFAULT;
413 } 413 }
414 414
415 set_fs (KERNEL_DS); 415 set_fs(KERNEL_DS);
416 ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL, 416 ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL,
417 uoss ? (stack_t __user *)&koss : NULL, usp); 417 uoss ? (stack_t __user *)&koss : NULL, usp);
418 set_fs (old_fs); 418 set_fs(old_fs);
419 419
420 if (!ret && uoss) { 420 if (!ret && uoss) {
421 if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss))) 421 if (!access_ok(VERIFY_WRITE, uoss, sizeof(*uoss)))
@@ -559,9 +559,9 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
559 /* It is more difficult to avoid calling this function than to 559 /* It is more difficult to avoid calling this function than to
560 call it and ignore errors. */ 560 call it and ignore errors. */
561 old_fs = get_fs(); 561 old_fs = get_fs();
562 set_fs (KERNEL_DS); 562 set_fs(KERNEL_DS);
563 do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]); 563 do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]);
564 set_fs (old_fs); 564 set_fs(old_fs);
565 565
566 /* 566 /*
567 * Don't let your children do this ... 567 * Don't let your children do this ...
@@ -746,11 +746,11 @@ asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
746 if (set && get_sigset(&new_set, set)) 746 if (set && get_sigset(&new_set, set))
747 return -EFAULT; 747 return -EFAULT;
748 748
749 set_fs (KERNEL_DS); 749 set_fs(KERNEL_DS);
750 ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL, 750 ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL,
751 oset ? (sigset_t __user *)&old_set : NULL, 751 oset ? (sigset_t __user *)&old_set : NULL,
752 sigsetsize); 752 sigsetsize);
753 set_fs (old_fs); 753 set_fs(old_fs);
754 754
755 if (!ret && oset && put_sigset(&old_set, oset)) 755 if (!ret && oset && put_sigset(&old_set, oset))
756 return -EFAULT; 756 return -EFAULT;
@@ -765,9 +765,9 @@ asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset,
765 sigset_t set; 765 sigset_t set;
766 mm_segment_t old_fs = get_fs(); 766 mm_segment_t old_fs = get_fs();
767 767
768 set_fs (KERNEL_DS); 768 set_fs(KERNEL_DS);
769 ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize); 769 ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize);
770 set_fs (old_fs); 770 set_fs(old_fs);
771 771
772 if (!ret && put_sigset(&set, uset)) 772 if (!ret && put_sigset(&set, uset))
773 return -EFAULT; 773 return -EFAULT;
@@ -781,12 +781,12 @@ asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *
781 int ret; 781 int ret;
782 mm_segment_t old_fs = get_fs(); 782 mm_segment_t old_fs = get_fs();
783 783
784 if (copy_from_user (&info, uinfo, 3*sizeof(int)) || 784 if (copy_from_user(&info, uinfo, 3*sizeof(int)) ||
785 copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE)) 785 copy_from_user(info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE))
786 return -EFAULT; 786 return -EFAULT;
787 set_fs (KERNEL_DS); 787 set_fs(KERNEL_DS);
788 ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info); 788 ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info);
789 set_fs (old_fs); 789 set_fs(old_fs);
790 return ret; 790 return ret;
791} 791}
792 792
@@ -801,10 +801,10 @@ sys32_waitid(int which, compat_pid_t pid,
801 mm_segment_t old_fs = get_fs(); 801 mm_segment_t old_fs = get_fs();
802 802
803 info.si_signo = 0; 803 info.si_signo = 0;
804 set_fs (KERNEL_DS); 804 set_fs(KERNEL_DS);
805 ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options, 805 ret = sys_waitid(which, pid, (siginfo_t __user *) &info, options,
806 uru ? (struct rusage __user *) &ru : NULL); 806 uru ? (struct rusage __user *) &ru : NULL);
807 set_fs (old_fs); 807 set_fs(old_fs);
808 808
809 if (ret < 0 || info.si_signo == 0) 809 if (ret < 0 || info.si_signo == 0)
810 return ret; 810 return ret;
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index eb7e05926ebe..bb277e82d421 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -88,7 +88,7 @@ struct rt_sigframe_n32 {
88 88
89#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */ 89#endif /* !ICACHE_REFILLS_WORKAROUND_WAR */
90 90
91extern void sigset_from_compat (sigset_t *set, compat_sigset_t *compat); 91extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat);
92 92
93asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) 93asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
94{ 94{
@@ -105,7 +105,7 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
105 unewset = (compat_sigset_t __user *) regs.regs[4]; 105 unewset = (compat_sigset_t __user *) regs.regs[4];
106 if (copy_from_user(&uset, unewset, sizeof(uset))) 106 if (copy_from_user(&uset, unewset, sizeof(uset)))
107 return -EFAULT; 107 return -EFAULT;
108 sigset_from_compat (&newset, &uset); 108 sigset_from_compat(&newset, &uset);
109 sigdelsetmask(&newset, ~_BLOCKABLE); 109 sigdelsetmask(&newset, ~_BLOCKABLE);
110 110
111 spin_lock_irq(&current->sighand->siglock); 111 spin_lock_irq(&current->sighand->siglock);
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 05dcce416325..94e210cc6cb6 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -353,7 +353,7 @@ void core_send_ipi(int cpu, unsigned int action)
353 unsigned long flags; 353 unsigned long flags;
354 int vpflags; 354 int vpflags;
355 355
356 local_irq_save (flags); 356 local_irq_save(flags);
357 357
358 vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */ 358 vpflags = dvpe(); /* cant access the other CPU's registers whilst MVPE enabled */
359 359
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 73b0dab02668..432f2e376aea 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -38,6 +38,7 @@
38#include <asm/system.h> 38#include <asm/system.h>
39#include <asm/mmu_context.h> 39#include <asm/mmu_context.h>
40#include <asm/smp.h> 40#include <asm/smp.h>
41#include <asm/time.h>
41 42
42#ifdef CONFIG_MIPS_MT_SMTC 43#ifdef CONFIG_MIPS_MT_SMTC
43#include <asm/mipsmtregs.h> 44#include <asm/mipsmtregs.h>
@@ -70,6 +71,7 @@ asmlinkage __cpuinit void start_secondary(void)
70 cpu_probe(); 71 cpu_probe();
71 cpu_report(); 72 cpu_report();
72 per_cpu_trap_init(); 73 per_cpu_trap_init();
74 mips_clockevent_init();
73 prom_init_secondary(); 75 prom_init_secondary();
74 76
75 /* 77 /*
@@ -95,6 +97,8 @@ struct call_data_struct *call_data;
95 97
96/* 98/*
97 * Run a function on all other CPUs. 99 * Run a function on all other CPUs.
100 *
101 * <mask> cpuset_t of all processors to run the function on.
98 * <func> The function to run. This must be fast and non-blocking. 102 * <func> The function to run. This must be fast and non-blocking.
99 * <info> An arbitrary pointer to pass to the function. 103 * <info> An arbitrary pointer to pass to the function.
100 * <retry> If true, keep retrying until ready. 104 * <retry> If true, keep retrying until ready.
@@ -119,18 +123,20 @@ struct call_data_struct *call_data;
119 * Spin waiting for call_lock 123 * Spin waiting for call_lock
120 * Deadlock Deadlock 124 * Deadlock Deadlock
121 */ 125 */
122int smp_call_function (void (*func) (void *info), void *info, int retry, 126int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
123 int wait) 127 void *info, int retry, int wait)
124{ 128{
125 struct call_data_struct data; 129 struct call_data_struct data;
126 int i, cpus = num_online_cpus() - 1;
127 int cpu = smp_processor_id(); 130 int cpu = smp_processor_id();
131 int cpus;
128 132
129 /* 133 /*
130 * Can die spectacularly if this CPU isn't yet marked online 134 * Can die spectacularly if this CPU isn't yet marked online
131 */ 135 */
132 BUG_ON(!cpu_online(cpu)); 136 BUG_ON(!cpu_online(cpu));
133 137
138 cpu_clear(cpu, mask);
139 cpus = cpus_weight(mask);
134 if (!cpus) 140 if (!cpus)
135 return 0; 141 return 0;
136 142
@@ -149,9 +155,7 @@ int smp_call_function (void (*func) (void *info), void *info, int retry,
149 smp_mb(); 155 smp_mb();
150 156
151 /* Send a message to all other CPUs and wait for them to respond */ 157 /* Send a message to all other CPUs and wait for them to respond */
152 for_each_online_cpu(i) 158 core_send_ipi_mask(mask, SMP_CALL_FUNCTION);
153 if (i != cpu)
154 core_send_ipi(i, SMP_CALL_FUNCTION);
155 159
156 /* Wait for response */ 160 /* Wait for response */
157 /* FIXME: lock-up detection, backtrace on lock-up */ 161 /* FIXME: lock-up detection, backtrace on lock-up */
@@ -167,6 +171,11 @@ int smp_call_function (void (*func) (void *info), void *info, int retry,
167 return 0; 171 return 0;
168} 172}
169 173
174int smp_call_function(void (*func) (void *info), void *info, int retry,
175 int wait)
176{
177 return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
178}
170 179
171void smp_call_function_interrupt(void) 180void smp_call_function_interrupt(void)
172{ 181{
@@ -197,8 +206,7 @@ void smp_call_function_interrupt(void)
197int smp_call_function_single(int cpu, void (*func) (void *info), void *info, 206int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
198 int retry, int wait) 207 int retry, int wait)
199{ 208{
200 struct call_data_struct data; 209 int ret, me;
201 int me;
202 210
203 /* 211 /*
204 * Can die spectacularly if this CPU isn't yet marked online 212 * Can die spectacularly if this CPU isn't yet marked online
@@ -217,33 +225,8 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
217 return 0; 225 return 0;
218 } 226 }
219 227
220 /* Can deadlock when called with interrupts disabled */ 228 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
221 WARN_ON(irqs_disabled()); 229 wait);
222
223 data.func = func;
224 data.info = info;
225 atomic_set(&data.started, 0);
226 data.wait = wait;
227 if (wait)
228 atomic_set(&data.finished, 0);
229
230 spin_lock(&smp_call_lock);
231 call_data = &data;
232 smp_mb();
233
234 /* Send a message to the other CPU */
235 core_send_ipi(cpu, SMP_CALL_FUNCTION);
236
237 /* Wait for response */
238 /* FIXME: lock-up detection, backtrace on lock-up */
239 while (atomic_read(&data.started) != 1)
240 barrier();
241
242 if (wait)
243 while (atomic_read(&data.finished) != 1)
244 barrier();
245 call_data = NULL;
246 spin_unlock(&smp_call_lock);
247 230
248 put_cpu(); 231 put_cpu();
249 return 0; 232 return 0;
@@ -390,12 +373,15 @@ void flush_tlb_mm(struct mm_struct *mm)
390 preempt_disable(); 373 preempt_disable();
391 374
392 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { 375 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
393 smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm); 376 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
394 } else { 377 } else {
395 int i; 378 cpumask_t mask = cpu_online_map;
396 for (i = 0; i < num_online_cpus(); i++) 379 unsigned int cpu;
397 if (smp_processor_id() != i) 380
398 cpu_context(i, mm) = 0; 381 cpu_clear(smp_processor_id(), mask);
382 for_each_online_cpu(cpu)
383 if (cpu_context(cpu, mm))
384 cpu_context(cpu, mm) = 0;
399 } 385 }
400 local_flush_tlb_mm(mm); 386 local_flush_tlb_mm(mm);
401 387
@@ -410,7 +396,7 @@ struct flush_tlb_data {
410 396
411static void flush_tlb_range_ipi(void *info) 397static void flush_tlb_range_ipi(void *info)
412{ 398{
413 struct flush_tlb_data *fd = (struct flush_tlb_data *)info; 399 struct flush_tlb_data *fd = info;
414 400
415 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); 401 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
416} 402}
@@ -421,17 +407,21 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned l
421 407
422 preempt_disable(); 408 preempt_disable();
423 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { 409 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
424 struct flush_tlb_data fd; 410 struct flush_tlb_data fd = {
411 .vma = vma,
412 .addr1 = start,
413 .addr2 = end,
414 };
425 415
426 fd.vma = vma; 416 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
427 fd.addr1 = start;
428 fd.addr2 = end;
429 smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd);
430 } else { 417 } else {
431 int i; 418 cpumask_t mask = cpu_online_map;
432 for (i = 0; i < num_online_cpus(); i++) 419 unsigned int cpu;
433 if (smp_processor_id() != i) 420
434 cpu_context(i, mm) = 0; 421 cpu_clear(smp_processor_id(), mask);
422 for_each_online_cpu(cpu)
423 if (cpu_context(cpu, mm))
424 cpu_context(cpu, mm) = 0;
435 } 425 }
436 local_flush_tlb_range(vma, start, end); 426 local_flush_tlb_range(vma, start, end);
437 preempt_enable(); 427 preempt_enable();
@@ -439,23 +429,24 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned l
439 429
440static void flush_tlb_kernel_range_ipi(void *info) 430static void flush_tlb_kernel_range_ipi(void *info)
441{ 431{
442 struct flush_tlb_data *fd = (struct flush_tlb_data *)info; 432 struct flush_tlb_data *fd = info;
443 433
444 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); 434 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
445} 435}
446 436
447void flush_tlb_kernel_range(unsigned long start, unsigned long end) 437void flush_tlb_kernel_range(unsigned long start, unsigned long end)
448{ 438{
449 struct flush_tlb_data fd; 439 struct flush_tlb_data fd = {
440 .addr1 = start,
441 .addr2 = end,
442 };
450 443
451 fd.addr1 = start; 444 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1);
452 fd.addr2 = end;
453 on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
454} 445}
455 446
456static void flush_tlb_page_ipi(void *info) 447static void flush_tlb_page_ipi(void *info)
457{ 448{
458 struct flush_tlb_data *fd = (struct flush_tlb_data *)info; 449 struct flush_tlb_data *fd = info;
459 450
460 local_flush_tlb_page(fd->vma, fd->addr1); 451 local_flush_tlb_page(fd->vma, fd->addr1);
461} 452}
@@ -464,16 +455,20 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
464{ 455{
465 preempt_disable(); 456 preempt_disable();
466 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) { 457 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
467 struct flush_tlb_data fd; 458 struct flush_tlb_data fd = {
459 .vma = vma,
460 .addr1 = page,
461 };
468 462
469 fd.vma = vma; 463 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
470 fd.addr1 = page;
471 smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd);
472 } else { 464 } else {
473 int i; 465 cpumask_t mask = cpu_online_map;
474 for (i = 0; i < num_online_cpus(); i++) 466 unsigned int cpu;
475 if (smp_processor_id() != i) 467
476 cpu_context(i, vma->vm_mm) = 0; 468 cpu_clear(smp_processor_id(), mask);
469 for_each_online_cpu(cpu)
470 if (cpu_context(cpu, vma->vm_mm))
471 cpu_context(cpu, vma->vm_mm) = 0;
477 } 472 }
478 local_flush_tlb_page(vma, page); 473 local_flush_tlb_page(vma, page);
479 preempt_enable(); 474 preempt_enable();
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index f09404377ef1..a8c1a698d588 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1,5 +1,6 @@
1/* Copyright (C) 2004 Mips Technologies, Inc */ 1/* Copyright (C) 2004 Mips Technologies, Inc */
2 2
3#include <linux/clockchips.h>
3#include <linux/kernel.h> 4#include <linux/kernel.h>
4#include <linux/sched.h> 5#include <linux/sched.h>
5#include <linux/cpumask.h> 6#include <linux/cpumask.h>
@@ -62,7 +63,7 @@ asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS];
62 * Clock interrupt "latch" buffers, per "CPU" 63 * Clock interrupt "latch" buffers, per "CPU"
63 */ 64 */
64 65
65unsigned int ipi_timer_latch[NR_CPUS]; 66static atomic_t ipi_timer_latch[NR_CPUS];
66 67
67/* 68/*
68 * Number of InterProcessor Interupt (IPI) message buffers to allocate 69 * Number of InterProcessor Interupt (IPI) message buffers to allocate
@@ -179,7 +180,7 @@ void __init sanitize_tlb_entries(void)
179 180
180static void smtc_configure_tlb(void) 181static void smtc_configure_tlb(void)
181{ 182{
182 int i,tlbsiz,vpes; 183 int i, tlbsiz, vpes;
183 unsigned long mvpconf0; 184 unsigned long mvpconf0;
184 unsigned long config1val; 185 unsigned long config1val;
185 186
@@ -296,8 +297,10 @@ int __init mipsmt_build_cpu_map(int start_cpu_slot)
296 __cpu_number_map[i] = i; 297 __cpu_number_map[i] = i;
297 __cpu_logical_map[i] = i; 298 __cpu_logical_map[i] = i;
298 } 299 }
300#ifdef CONFIG_MIPS_MT_FPAFF
299 /* Initialize map of CPUs with FPUs */ 301 /* Initialize map of CPUs with FPUs */
300 cpus_clear(mt_fpu_cpumask); 302 cpus_clear(mt_fpu_cpumask);
303#endif
301 304
302 /* One of those TC's is the one booting, and not a secondary... */ 305 /* One of those TC's is the one booting, and not a secondary... */
303 printk("%i available secondary CPU TC(s)\n", i - 1); 306 printk("%i available secondary CPU TC(s)\n", i - 1);
@@ -359,7 +362,7 @@ void mipsmt_prepare_cpus(void)
359 IPIQ[i].head = IPIQ[i].tail = NULL; 362 IPIQ[i].head = IPIQ[i].tail = NULL;
360 spin_lock_init(&IPIQ[i].lock); 363 spin_lock_init(&IPIQ[i].lock);
361 IPIQ[i].depth = 0; 364 IPIQ[i].depth = 0;
362 ipi_timer_latch[i] = 0; 365 atomic_set(&ipi_timer_latch[i], 0);
363 } 366 }
364 367
365 /* cpu_data index starts at zero */ 368 /* cpu_data index starts at zero */
@@ -369,7 +372,7 @@ void mipsmt_prepare_cpus(void)
369 cpu++; 372 cpu++;
370 373
371 /* Report on boot-time options */ 374 /* Report on boot-time options */
372 mips_mt_set_cpuoptions (); 375 mips_mt_set_cpuoptions();
373 if (vpelimit > 0) 376 if (vpelimit > 0)
374 printk("Limit of %d VPEs set\n", vpelimit); 377 printk("Limit of %d VPEs set\n", vpelimit);
375 if (tclimit > 0) 378 if (tclimit > 0)
@@ -420,7 +423,7 @@ void mipsmt_prepare_cpus(void)
420 * code. Leave it alone! 423 * code. Leave it alone!
421 */ 424 */
422 if (tc != 0) { 425 if (tc != 0) {
423 smtc_tc_setup(vpe,tc, cpu); 426 smtc_tc_setup(vpe, tc, cpu);
424 cpu++; 427 cpu++;
425 } 428 }
426 printk(" %d", tc); 429 printk(" %d", tc);
@@ -428,7 +431,7 @@ void mipsmt_prepare_cpus(void)
428 } 431 }
429 if (slop) { 432 if (slop) {
430 if (tc != 0) { 433 if (tc != 0) {
431 smtc_tc_setup(vpe,tc, cpu); 434 smtc_tc_setup(vpe, tc, cpu);
432 cpu++; 435 cpu++;
433 } 436 }
434 printk(" %d", tc); 437 printk(" %d", tc);
@@ -482,10 +485,12 @@ void mipsmt_prepare_cpus(void)
482 485
483 /* Set up coprocessor affinity CPU mask(s) */ 486 /* Set up coprocessor affinity CPU mask(s) */
484 487
488#ifdef CONFIG_MIPS_MT_FPAFF
485 for (tc = 0; tc < ntc; tc++) { 489 for (tc = 0; tc < ntc; tc++) {
486 if (cpu_data[tc].options & MIPS_CPU_FPU) 490 if (cpu_data[tc].options & MIPS_CPU_FPU)
487 cpu_set(tc, mt_fpu_cpumask); 491 cpu_set(tc, mt_fpu_cpumask);
488 } 492 }
493#endif
489 494
490 /* set up ipi interrupts... */ 495 /* set up ipi interrupts... */
491 496
@@ -567,7 +572,7 @@ void smtc_init_secondary(void)
567 if (((read_c0_tcbind() & TCBIND_CURTC) != 0) && 572 if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&
568 ((read_c0_tcbind() & TCBIND_CURVPE) 573 ((read_c0_tcbind() & TCBIND_CURVPE)
569 != cpu_data[smp_processor_id() - 1].vpe_id)){ 574 != cpu_data[smp_processor_id() - 1].vpe_id)){
570 write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ); 575 write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
571 } 576 }
572 577
573 local_irq_enable(); 578 local_irq_enable();
@@ -606,6 +611,60 @@ int setup_irq_smtc(unsigned int irq, struct irqaction * new,
606 return setup_irq(irq, new); 611 return setup_irq(irq, new);
607} 612}
608 613
614#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
615/*
616 * Support for IRQ affinity to TCs
617 */
618
619void smtc_set_irq_affinity(unsigned int irq, cpumask_t affinity)
620{
621 /*
622 * If a "fast path" cache of quickly decodable affinity state
623 * is maintained, this is where it gets done, on a call up
624 * from the platform affinity code.
625 */
626}
627
628void smtc_forward_irq(unsigned int irq)
629{
630 int target;
631
632 /*
633 * OK wise guy, now figure out how to get the IRQ
634 * to be serviced on an authorized "CPU".
635 *
636 * Ideally, to handle the situation where an IRQ has multiple
637 * eligible CPUS, we would maintain state per IRQ that would
638 * allow a fair distribution of service requests. Since the
639 * expected use model is any-or-only-one, for simplicity
640 * and efficiency, we just pick the easiest one to find.
641 */
642
643 target = first_cpu(irq_desc[irq].affinity);
644
645 /*
646 * We depend on the platform code to have correctly processed
647 * IRQ affinity change requests to ensure that the IRQ affinity
648 * mask has been purged of bits corresponding to nonexistent and
649 * offline "CPUs", and to TCs bound to VPEs other than the VPE
650 * connected to the physical interrupt input for the interrupt
651 * in question. Otherwise we have a nasty problem with interrupt
652 * mask management. This is best handled in non-performance-critical
653 * platform IRQ affinity setting code, to minimize interrupt-time
654 * checks.
655 */
656
657 /* If no one is eligible, service locally */
658 if (target >= NR_CPUS) {
659 do_IRQ_no_affinity(irq);
660 return;
661 }
662
663 smtc_send_ipi(target, IRQ_AFFINITY_IPI, irq);
664}
665
666#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
667
609/* 668/*
610 * IPI model for SMTC is tricky, because interrupts aren't TC-specific. 669 * IPI model for SMTC is tricky, because interrupts aren't TC-specific.
611 * Within a VPE one TC can interrupt another by different approaches. 670 * Within a VPE one TC can interrupt another by different approaches.
@@ -648,7 +707,7 @@ static void smtc_ipi_qdump(void)
648 * be done with the atomic.h primitives). And since this is 707 * be done with the atomic.h primitives). And since this is
649 * MIPS MT, we can assume that we have LL/SC. 708 * MIPS MT, we can assume that we have LL/SC.
650 */ 709 */
651static __inline__ int atomic_postincrement(unsigned int *pv) 710static inline int atomic_postincrement(atomic_t *v)
652{ 711{
653 unsigned long result; 712 unsigned long result;
654 713
@@ -659,9 +718,9 @@ static __inline__ int atomic_postincrement(unsigned int *pv)
659 " addu %1, %0, 1 \n" 718 " addu %1, %0, 1 \n"
660 " sc %1, %2 \n" 719 " sc %1, %2 \n"
661 " beqz %1, 1b \n" 720 " beqz %1, 1b \n"
662 " sync \n" 721 __WEAK_LLSC_MB
663 : "=&r" (result), "=&r" (temp), "=m" (*pv) 722 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
664 : "m" (*pv) 723 : "m" (v->counter)
665 : "memory"); 724 : "memory");
666 725
667 return result; 726 return result;
@@ -689,6 +748,8 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
689 pipi->arg = (void *)action; 748 pipi->arg = (void *)action;
690 pipi->dest = cpu; 749 pipi->dest = cpu;
691 if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) { 750 if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) {
751 if (type == SMTC_CLOCK_TICK)
752 atomic_inc(&ipi_timer_latch[cpu]);
692 /* If not on same VPE, enqueue and send cross-VPE interupt */ 753 /* If not on same VPE, enqueue and send cross-VPE interupt */
693 smtc_ipi_nq(&IPIQ[cpu], pipi); 754 smtc_ipi_nq(&IPIQ[cpu], pipi);
694 LOCK_CORE_PRA(); 755 LOCK_CORE_PRA();
@@ -730,6 +791,8 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
730 } 791 }
731 smtc_ipi_nq(&IPIQ[cpu], pipi); 792 smtc_ipi_nq(&IPIQ[cpu], pipi);
732 } else { 793 } else {
794 if (type == SMTC_CLOCK_TICK)
795 atomic_inc(&ipi_timer_latch[cpu]);
733 post_direct_ipi(cpu, pipi); 796 post_direct_ipi(cpu, pipi);
734 write_tc_c0_tchalt(0); 797 write_tc_c0_tchalt(0);
735 UNLOCK_CORE_PRA(); 798 UNLOCK_CORE_PRA();
@@ -747,6 +810,7 @@ static void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
747 unsigned long tcrestart; 810 unsigned long tcrestart;
748 extern u32 kernelsp[NR_CPUS]; 811 extern u32 kernelsp[NR_CPUS];
749 extern void __smtc_ipi_vector(void); 812 extern void __smtc_ipi_vector(void);
813//printk("%s: on %d for %d\n", __func__, smp_processor_id(), cpu);
750 814
751 /* Extract Status, EPC from halted TC */ 815 /* Extract Status, EPC from halted TC */
752 tcstatus = read_tc_c0_tcstatus(); 816 tcstatus = read_tc_c0_tcstatus();
@@ -797,25 +861,31 @@ static void ipi_call_interrupt(void)
797 smp_call_function_interrupt(); 861 smp_call_function_interrupt();
798} 862}
799 863
864DECLARE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
865
800void ipi_decode(struct smtc_ipi *pipi) 866void ipi_decode(struct smtc_ipi *pipi)
801{ 867{
868 unsigned int cpu = smp_processor_id();
869 struct clock_event_device *cd;
802 void *arg_copy = pipi->arg; 870 void *arg_copy = pipi->arg;
803 int type_copy = pipi->type; 871 int type_copy = pipi->type;
804 int dest_copy = pipi->dest; 872 int ticks;
805 873
806 smtc_ipi_nq(&freeIPIq, pipi); 874 smtc_ipi_nq(&freeIPIq, pipi);
807 switch (type_copy) { 875 switch (type_copy) {
808 case SMTC_CLOCK_TICK: 876 case SMTC_CLOCK_TICK:
809 irq_enter(); 877 irq_enter();
810 kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++; 878 kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++;
811 /* Invoke Clock "Interrupt" */ 879 cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
812 ipi_timer_latch[dest_copy] = 0; 880 ticks = atomic_read(&ipi_timer_latch[cpu]);
813#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG 881 atomic_sub(ticks, &ipi_timer_latch[cpu]);
814 clock_hang_reported[dest_copy] = 0; 882 while (ticks) {
815#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */ 883 cd->event_handler(cd);
816 local_timer_interrupt(0, NULL); 884 ticks--;
885 }
817 irq_exit(); 886 irq_exit();
818 break; 887 break;
888
819 case LINUX_SMP_IPI: 889 case LINUX_SMP_IPI:
820 switch ((int)arg_copy) { 890 switch ((int)arg_copy) {
821 case SMP_RESCHEDULE_YOURSELF: 891 case SMP_RESCHEDULE_YOURSELF:
@@ -830,6 +900,15 @@ void ipi_decode(struct smtc_ipi *pipi)
830 break; 900 break;
831 } 901 }
832 break; 902 break;
903#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
904 case IRQ_AFFINITY_IPI:
905 /*
906 * Accept a "forwarded" interrupt that was initially
907 * taken by a TC who doesn't have affinity for the IRQ.
908 */
909 do_IRQ_no_affinity((int)arg_copy);
910 break;
911#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
833 default: 912 default:
834 printk("Impossible SMTC IPI Type 0x%x\n", type_copy); 913 printk("Impossible SMTC IPI Type 0x%x\n", type_copy);
835 break; 914 break;
@@ -858,25 +937,6 @@ void deferred_smtc_ipi(void)
858} 937}
859 938
860/* 939/*
861 * Send clock tick to all TCs except the one executing the funtion
862 */
863
864void smtc_timer_broadcast(void)
865{
866 int cpu;
867 int myTC = cpu_data[smp_processor_id()].tc_id;
868 int myVPE = cpu_data[smp_processor_id()].vpe_id;
869
870 smtc_cpu_stats[smp_processor_id()].timerints++;
871
872 for_each_online_cpu(cpu) {
873 if (cpu_data[cpu].vpe_id == myVPE &&
874 cpu_data[cpu].tc_id != myTC)
875 smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
876 }
877}
878
879/*
880 * Cross-VPE interrupts in the SMTC prototype use "software interrupts" 940 * Cross-VPE interrupts in the SMTC prototype use "software interrupts"
881 * set via cross-VPE MTTR manipulation of the Cause register. It would be 941 * set via cross-VPE MTTR manipulation of the Cause register. It would be
882 * in some regards preferable to have external logic for "doorbell" hardware 942 * in some regards preferable to have external logic for "doorbell" hardware
@@ -1117,11 +1177,11 @@ void smtc_idle_loop_hook(void)
1117 for (tc = 0; tc < NR_CPUS; tc++) { 1177 for (tc = 0; tc < NR_CPUS; tc++) {
1118 /* Don't check ourself - we'll dequeue IPIs just below */ 1178 /* Don't check ourself - we'll dequeue IPIs just below */
1119 if ((tc != smp_processor_id()) && 1179 if ((tc != smp_processor_id()) &&
1120 ipi_timer_latch[tc] > timerq_limit) { 1180 atomic_read(&ipi_timer_latch[tc]) > timerq_limit) {
1121 if (clock_hang_reported[tc] == 0) { 1181 if (clock_hang_reported[tc] == 0) {
1122 pdb_msg += sprintf(pdb_msg, 1182 pdb_msg += sprintf(pdb_msg,
1123 "TC %d looks hung with timer latch at %d\n", 1183 "TC %d looks hung with timer latch at %d\n",
1124 tc, ipi_timer_latch[tc]); 1184 tc, atomic_read(&ipi_timer_latch[tc]));
1125 clock_hang_reported[tc]++; 1185 clock_hang_reported[tc]++;
1126 } 1186 }
1127 } 1187 }
@@ -1162,7 +1222,7 @@ void smtc_soft_dump(void)
1162 smtc_ipi_qdump(); 1222 smtc_ipi_qdump();
1163 printk("Timer IPI Backlogs:\n"); 1223 printk("Timer IPI Backlogs:\n");
1164 for (i=0; i < NR_CPUS; i++) { 1224 for (i=0; i < NR_CPUS; i++) {
1165 printk("%d: %d\n", i, ipi_timer_latch[i]); 1225 printk("%d: %d\n", i, atomic_read(&ipi_timer_latch[i]));
1166 } 1226 }
1167 printk("%d Recoveries of \"stolen\" FPU\n", 1227 printk("%d Recoveries of \"stolen\" FPU\n",
1168 atomic_read(&smtc_fpu_recoveries)); 1228 atomic_read(&smtc_fpu_recoveries));
@@ -1204,7 +1264,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
1204 if (cpu_has_vtag_icache) 1264 if (cpu_has_vtag_icache)
1205 flush_icache_all(); 1265 flush_icache_all();
1206 /* Traverse all online CPUs (hack requires contigous range) */ 1266 /* Traverse all online CPUs (hack requires contigous range) */
1207 for (i = 0; i < num_online_cpus(); i++) { 1267 for_each_online_cpu(i) {
1208 /* 1268 /*
1209 * We don't need to worry about our own CPU, nor those of 1269 * We don't need to worry about our own CPU, nor those of
1210 * CPUs who don't share our TLB. 1270 * CPUs who don't share our TLB.
@@ -1233,7 +1293,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
1233 /* 1293 /*
1234 * SMTC shares the TLB within VPEs and possibly across all VPEs. 1294 * SMTC shares the TLB within VPEs and possibly across all VPEs.
1235 */ 1295 */
1236 for (i = 0; i < num_online_cpus(); i++) { 1296 for_each_online_cpu(i) {
1237 if ((smtc_status & SMTC_TLB_SHARED) || 1297 if ((smtc_status & SMTC_TLB_SHARED) ||
1238 (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id)) 1298 (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id))
1239 cpu_context(i, mm) = asid_cache(i) = asid; 1299 cpu_context(i, mm) = asid_cache(i) = asid;
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 7c800ec3ff55..17c4374d2209 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -245,7 +245,7 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name)
245 245
246 if (!name) 246 if (!name)
247 return -EFAULT; 247 return -EFAULT;
248 if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname))) 248 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
249 return -EFAULT; 249 return -EFAULT;
250 250
251 error = __copy_to_user(&name->sysname, &utsname()->sysname, 251 error = __copy_to_user(&name->sysname, &utsname()->sysname,
@@ -314,8 +314,8 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
314 * 314 *
315 * This is really horribly ugly. 315 * This is really horribly ugly.
316 */ 316 */
317asmlinkage int sys_ipc (unsigned int call, int first, int second, 317asmlinkage int sys_ipc(unsigned int call, int first, int second,
318 unsigned long third, void __user *ptr, long fifth) 318 unsigned long third, void __user *ptr, long fifth)
319{ 319{
320 int version, ret; 320 int version, ret;
321 321
@@ -324,26 +324,26 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
324 324
325 switch (call) { 325 switch (call) {
326 case SEMOP: 326 case SEMOP:
327 return sys_semtimedop (first, (struct sembuf __user *)ptr, 327 return sys_semtimedop(first, (struct sembuf __user *)ptr,
328 second, NULL); 328 second, NULL);
329 case SEMTIMEDOP: 329 case SEMTIMEDOP:
330 return sys_semtimedop (first, (struct sembuf __user *)ptr, 330 return sys_semtimedop(first, (struct sembuf __user *)ptr,
331 second, 331 second,
332 (const struct timespec __user *)fifth); 332 (const struct timespec __user *)fifth);
333 case SEMGET: 333 case SEMGET:
334 return sys_semget (first, second, third); 334 return sys_semget(first, second, third);
335 case SEMCTL: { 335 case SEMCTL: {
336 union semun fourth; 336 union semun fourth;
337 if (!ptr) 337 if (!ptr)
338 return -EINVAL; 338 return -EINVAL;
339 if (get_user(fourth.__pad, (void __user *__user *) ptr)) 339 if (get_user(fourth.__pad, (void __user *__user *) ptr))
340 return -EFAULT; 340 return -EFAULT;
341 return sys_semctl (first, second, third, fourth); 341 return sys_semctl(first, second, third, fourth);
342 } 342 }
343 343
344 case MSGSND: 344 case MSGSND:
345 return sys_msgsnd (first, (struct msgbuf __user *) ptr, 345 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
346 second, third); 346 second, third);
347 case MSGRCV: 347 case MSGRCV:
348 switch (version) { 348 switch (version) {
349 case 0: { 349 case 0: {
@@ -353,45 +353,45 @@ asmlinkage int sys_ipc (unsigned int call, int first, int second,
353 353
354 if (copy_from_user(&tmp, 354 if (copy_from_user(&tmp,
355 (struct ipc_kludge __user *) ptr, 355 (struct ipc_kludge __user *) ptr,
356 sizeof (tmp))) 356 sizeof(tmp)))
357 return -EFAULT; 357 return -EFAULT;
358 return sys_msgrcv (first, tmp.msgp, second, 358 return sys_msgrcv(first, tmp.msgp, second,
359 tmp.msgtyp, third); 359 tmp.msgtyp, third);
360 } 360 }
361 default: 361 default:
362 return sys_msgrcv (first, 362 return sys_msgrcv(first,
363 (struct msgbuf __user *) ptr, 363 (struct msgbuf __user *) ptr,
364 second, fifth, third); 364 second, fifth, third);
365 } 365 }
366 case MSGGET: 366 case MSGGET:
367 return sys_msgget ((key_t) first, second); 367 return sys_msgget((key_t) first, second);
368 case MSGCTL: 368 case MSGCTL:
369 return sys_msgctl (first, second, 369 return sys_msgctl(first, second,
370 (struct msqid_ds __user *) ptr); 370 (struct msqid_ds __user *) ptr);
371 371
372 case SHMAT: 372 case SHMAT:
373 switch (version) { 373 switch (version) {
374 default: { 374 default: {
375 unsigned long raddr; 375 unsigned long raddr;
376 ret = do_shmat (first, (char __user *) ptr, second, 376 ret = do_shmat(first, (char __user *) ptr, second,
377 &raddr); 377 &raddr);
378 if (ret) 378 if (ret)
379 return ret; 379 return ret;
380 return put_user (raddr, (unsigned long __user *) third); 380 return put_user(raddr, (unsigned long __user *) third);
381 } 381 }
382 case 1: /* iBCS2 emulator entry point */ 382 case 1: /* iBCS2 emulator entry point */
383 if (!segment_eq(get_fs(), get_ds())) 383 if (!segment_eq(get_fs(), get_ds()))
384 return -EINVAL; 384 return -EINVAL;
385 return do_shmat (first, (char __user *) ptr, second, 385 return do_shmat(first, (char __user *) ptr, second,
386 (unsigned long *) third); 386 (unsigned long *) third);
387 } 387 }
388 case SHMDT: 388 case SHMDT:
389 return sys_shmdt ((char __user *)ptr); 389 return sys_shmdt((char __user *)ptr);
390 case SHMGET: 390 case SHMGET:
391 return sys_shmget (first, second, third); 391 return sys_shmget(first, second, third);
392 case SHMCTL: 392 case SHMCTL:
393 return sys_shmctl (first, second, 393 return sys_shmctl(first, second,
394 (struct shmid_ds __user *) ptr); 394 (struct shmid_ds __user *) ptr);
395 default: 395 default:
396 return -ENOSYS; 396 return -ENOSYS;
397 } 397 }
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index 93a148486f88..ee7790d9debe 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -486,10 +486,10 @@ asmlinkage int irix_syssgi(struct pt_regs *regs)
486 486
487 switch (arg1) { 487 switch (arg1) {
488 case SGI_INV_SIZEOF: 488 case SGI_INV_SIZEOF:
489 retval = sizeof (inventory_t); 489 retval = sizeof(inventory_t);
490 break; 490 break;
491 case SGI_INV_READ: 491 case SGI_INV_READ:
492 retval = dump_inventory_to_user (buffer, count); 492 retval = dump_inventory_to_user(buffer, count);
493 break; 493 break;
494 default: 494 default:
495 retval = -EINVAL; 495 retval = -EINVAL;
@@ -778,7 +778,7 @@ asmlinkage int irix_times(struct tms __user *tbuf)
778 int err = 0; 778 int err = 0;
779 779
780 if (tbuf) { 780 if (tbuf) {
781 if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf)) 781 if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
782 return -EFAULT; 782 return -EFAULT;
783 783
784 err = __put_user(current->utime, &tbuf->tms_utime); 784 err = __put_user(current->utime, &tbuf->tms_utime);
@@ -1042,9 +1042,9 @@ asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
1042 long max_size = offset + len; 1042 long max_size = offset + len;
1043 1043
1044 if (max_size > file->f_path.dentry->d_inode->i_size) { 1044 if (max_size > file->f_path.dentry->d_inode->i_size) {
1045 old_pos = sys_lseek (fd, max_size - 1, 0); 1045 old_pos = sys_lseek(fd, max_size - 1, 0);
1046 sys_write (fd, (void __user *) "", 1); 1046 sys_write(fd, (void __user *) "", 1);
1047 sys_lseek (fd, old_pos, 0); 1047 sys_lseek(fd, old_pos, 0);
1048 } 1048 }
1049 } 1049 }
1050 } 1050 }
@@ -1176,7 +1176,7 @@ static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
1176 ub.st_ctime1 = stat->atime.tv_nsec; 1176 ub.st_ctime1 = stat->atime.tv_nsec;
1177 ub.st_blksize = stat->blksize; 1177 ub.st_blksize = stat->blksize;
1178 ub.st_blocks = stat->blocks; 1178 ub.st_blocks = stat->blocks;
1179 strcpy (ub.st_fstype, "efs"); 1179 strcpy(ub.st_fstype, "efs");
1180 1180
1181 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0; 1181 return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
1182} 1182}
@@ -1208,7 +1208,7 @@ static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
1208 ks.st_nlink = (u32) stat->nlink; 1208 ks.st_nlink = (u32) stat->nlink;
1209 ks.st_uid = (s32) stat->uid; 1209 ks.st_uid = (s32) stat->uid;
1210 ks.st_gid = (s32) stat->gid; 1210 ks.st_gid = (s32) stat->gid;
1211 ks.st_rdev = sysv_encode_dev (stat->rdev); 1211 ks.st_rdev = sysv_encode_dev(stat->rdev);
1212 ks.st_pad2[0] = ks.st_pad2[1] = 0; 1212 ks.st_pad2[0] = ks.st_pad2[1] = 0;
1213 ks.st_size = (long long) stat->size; 1213 ks.st_size = (long long) stat->size;
1214 ks.st_pad3 = 0; 1214 ks.st_pad3 = 0;
@@ -1527,9 +1527,9 @@ asmlinkage int irix_mmap64(struct pt_regs *regs)
1527 long max_size = off2 + len; 1527 long max_size = off2 + len;
1528 1528
1529 if (max_size > file->f_path.dentry->d_inode->i_size) { 1529 if (max_size > file->f_path.dentry->d_inode->i_size) {
1530 old_pos = sys_lseek (fd, max_size - 1, 0); 1530 old_pos = sys_lseek(fd, max_size - 1, 0);
1531 sys_write (fd, (void __user *) "", 1); 1531 sys_write(fd, (void __user *) "", 1);
1532 sys_lseek (fd, old_pos, 0); 1532 sys_lseek(fd, old_pos, 0);
1533 } 1533 }
1534 } 1534 }
1535 } 1535 }
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 9a5596bf8571..5892491b40eb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,6 +11,7 @@
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/clockchips.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/kernel.h> 16#include <linux/kernel.h>
16#include <linux/init.h> 17#include <linux/init.h>
@@ -24,6 +25,7 @@
24#include <linux/spinlock.h> 25#include <linux/spinlock.h>
25#include <linux/interrupt.h> 26#include <linux/interrupt.h>
26#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/kallsyms.h>
27 29
28#include <asm/bootinfo.h> 30#include <asm/bootinfo.h>
29#include <asm/cache.h> 31#include <asm/cache.h>
@@ -32,8 +34,11 @@
32#include <asm/cpu-features.h> 34#include <asm/cpu-features.h>
33#include <asm/div64.h> 35#include <asm/div64.h>
34#include <asm/sections.h> 36#include <asm/sections.h>
37#include <asm/smtc_ipi.h>
35#include <asm/time.h> 38#include <asm/time.h>
36 39
40#include <irq.h>
41
37/* 42/*
38 * The integer part of the number of usecs per jiffy is taken from tick, 43 * The integer part of the number of usecs per jiffy is taken from tick,
39 * but the fractional part is not recorded, so we calculate it using the 44 * but the fractional part is not recorded, so we calculate it using the
@@ -49,32 +54,27 @@
49 * forward reference 54 * forward reference
50 */ 55 */
51DEFINE_SPINLOCK(rtc_lock); 56DEFINE_SPINLOCK(rtc_lock);
57EXPORT_SYMBOL(rtc_lock);
52 58
53/* 59int __weak rtc_mips_set_time(unsigned long sec)
54 * By default we provide the null RTC ops
55 */
56static unsigned long null_rtc_get_time(void)
57{ 60{
58 return mktime(2000, 1, 1, 0, 0, 0); 61 return 0;
59} 62}
63EXPORT_SYMBOL(rtc_mips_set_time);
60 64
61static int null_rtc_set_time(unsigned long sec) 65int __weak rtc_mips_set_mmss(unsigned long nowtime)
62{ 66{
63 return 0; 67 return rtc_mips_set_time(nowtime);
64} 68}
65 69
66unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time; 70int update_persistent_clock(struct timespec now)
67int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time; 71{
68int (*rtc_mips_set_mmss)(unsigned long); 72 return rtc_mips_set_mmss(now.tv_sec);
69 73}
70 74
71/* how many counter cycles in a jiffy */ 75/* how many counter cycles in a jiffy */
72static unsigned long cycles_per_jiffy __read_mostly; 76static unsigned long cycles_per_jiffy __read_mostly;
73 77
74/* expirelo is the count value for next CPU timer interrupt */
75static unsigned int expirelo;
76
77
78/* 78/*
79 * Null timer ack for systems not needing one (e.g. i8254). 79 * Null timer ack for systems not needing one (e.g. i8254).
80 */ 80 */
@@ -93,18 +93,7 @@ static cycle_t null_hpt_read(void)
93 */ 93 */
94static void c0_timer_ack(void) 94static void c0_timer_ack(void)
95{ 95{
96 unsigned int count; 96 write_c0_compare(read_c0_compare());
97
98 /* Ack this timer interrupt and set the next one. */
99 expirelo += cycles_per_jiffy;
100 write_c0_compare(expirelo);
101
102 /* Check to see if we have missed any timer interrupts. */
103 while (((count = read_c0_count()) - expirelo) < 0x7fffffff) {
104 /* missed_timer_count++; */
105 expirelo = count + cycles_per_jiffy;
106 write_c0_compare(expirelo);
107 }
108} 97}
109 98
110/* 99/*
@@ -115,19 +104,9 @@ static cycle_t c0_hpt_read(void)
115 return read_c0_count(); 104 return read_c0_count();
116} 105}
117 106
118/* For use both as a high precision timer and an interrupt source. */
119static void __init c0_hpt_timer_init(void)
120{
121 expirelo = read_c0_count() + cycles_per_jiffy;
122 write_c0_compare(expirelo);
123}
124
125int (*mips_timer_state)(void); 107int (*mips_timer_state)(void);
126void (*mips_timer_ack)(void); 108void (*mips_timer_ack)(void);
127 109
128/* last time when xtime and rtc are sync'ed up */
129static long last_rtc_update;
130
131/* 110/*
132 * local_timer_interrupt() does profiling and process accounting 111 * local_timer_interrupt() does profiling and process accounting
133 * on a per-CPU basis. 112 * on a per-CPU basis.
@@ -144,60 +123,15 @@ void local_timer_interrupt(int irq, void *dev_id)
144 update_process_times(user_mode(get_irq_regs())); 123 update_process_times(user_mode(get_irq_regs()));
145} 124}
146 125
147/*
148 * High-level timer interrupt service routines. This function
149 * is set as irqaction->handler and is invoked through do_IRQ.
150 */
151irqreturn_t timer_interrupt(int irq, void *dev_id)
152{
153 write_seqlock(&xtime_lock);
154
155 mips_timer_ack();
156
157 /*
158 * call the generic timer interrupt handling
159 */
160 do_timer(1);
161
162 /*
163 * If we have an externally synchronized Linux clock, then update
164 * CMOS clock accordingly every ~11 minutes. rtc_mips_set_time() has to be
165 * called as close as possible to 500 ms before the new second starts.
166 */
167 if (ntp_synced() &&
168 xtime.tv_sec > last_rtc_update + 660 &&
169 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
170 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
171 if (rtc_mips_set_mmss(xtime.tv_sec) == 0) {
172 last_rtc_update = xtime.tv_sec;
173 } else {
174 /* do it again in 60 s */
175 last_rtc_update = xtime.tv_sec - 600;
176 }
177 }
178
179 write_sequnlock(&xtime_lock);
180
181 /*
182 * In UP mode, we call local_timer_interrupt() to do profiling
183 * and process accouting.
184 *
185 * In SMP mode, local_timer_interrupt() is invoked by appropriate
186 * low-level local timer interrupt handler.
187 */
188 local_timer_interrupt(irq, dev_id);
189
190 return IRQ_HANDLED;
191}
192
193int null_perf_irq(void) 126int null_perf_irq(void)
194{ 127{
195 return 0; 128 return 0;
196} 129}
197 130
131EXPORT_SYMBOL(null_perf_irq);
132
198int (*perf_irq)(void) = null_perf_irq; 133int (*perf_irq)(void) = null_perf_irq;
199 134
200EXPORT_SYMBOL(null_perf_irq);
201EXPORT_SYMBOL(perf_irq); 135EXPORT_SYMBOL(perf_irq);
202 136
203/* 137/*
@@ -215,7 +149,7 @@ EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
215 * Possibly handle a performance counter interrupt. 149 * Possibly handle a performance counter interrupt.
216 * Return true if the timer interrupt should not be checked 150 * Return true if the timer interrupt should not be checked
217 */ 151 */
218static inline int handle_perf_irq (int r2) 152static inline int handle_perf_irq(int r2)
219{ 153{
220 /* 154 /*
221 * The performance counter overflow interrupt may be shared with the 155 * The performance counter overflow interrupt may be shared with the
@@ -229,63 +163,23 @@ static inline int handle_perf_irq (int r2)
229 !r2; 163 !r2;
230} 164}
231 165
232asmlinkage void ll_timer_interrupt(int irq)
233{
234 int r2 = cpu_has_mips_r2;
235
236 irq_enter();
237 kstat_this_cpu.irqs[irq]++;
238
239 if (handle_perf_irq(r2))
240 goto out;
241
242 if (r2 && ((read_c0_cause() & (1 << 30)) == 0))
243 goto out;
244
245 timer_interrupt(irq, NULL);
246
247out:
248 irq_exit();
249}
250
251asmlinkage void ll_local_timer_interrupt(int irq)
252{
253 irq_enter();
254 if (smp_processor_id() != 0)
255 kstat_this_cpu.irqs[irq]++;
256
257 /* we keep interrupt disabled all the time */
258 local_timer_interrupt(irq, NULL);
259
260 irq_exit();
261}
262
263/* 166/*
264 * time_init() - it does the following things. 167 * time_init() - it does the following things.
265 * 168 *
266 * 1) board_time_init() - 169 * 1) plat_time_init() -
267 * a) (optional) set up RTC routines, 170 * a) (optional) set up RTC routines,
268 * b) (optional) calibrate and set the mips_hpt_frequency 171 * b) (optional) calibrate and set the mips_hpt_frequency
269 * (only needed if you intended to use cpu counter as timer interrupt 172 * (only needed if you intended to use cpu counter as timer interrupt
270 * source) 173 * source)
271 * 2) setup xtime based on rtc_mips_get_time(). 174 * 2) calculate a couple of cached variables for later usage
272 * 3) calculate a couple of cached variables for later usage 175 * 3) plat_timer_setup() -
273 * 4) plat_timer_setup() -
274 * a) (optional) over-write any choices made above by time_init(). 176 * a) (optional) over-write any choices made above by time_init().
275 * b) machine specific code should setup the timer irqaction. 177 * b) machine specific code should setup the timer irqaction.
276 * c) enable the timer interrupt 178 * c) enable the timer interrupt
277 */ 179 */
278 180
279void (*board_time_init)(void);
280
281unsigned int mips_hpt_frequency; 181unsigned int mips_hpt_frequency;
282 182
283static struct irqaction timer_irqaction = {
284 .handler = timer_interrupt,
285 .flags = IRQF_DISABLED | IRQF_PERCPU,
286 .name = "timer",
287};
288
289static unsigned int __init calibrate_hpt(void) 183static unsigned int __init calibrate_hpt(void)
290{ 184{
291 cycle_t frequency, hpt_start, hpt_end, hpt_count, hz; 185 cycle_t frequency, hpt_start, hpt_end, hpt_count, hz;
@@ -334,6 +228,84 @@ struct clocksource clocksource_mips = {
334 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 228 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
335}; 229};
336 230
231static int mips_next_event(unsigned long delta,
232 struct clock_event_device *evt)
233{
234 unsigned int cnt;
235 int res;
236
237#ifdef CONFIG_MIPS_MT_SMTC
238 {
239 unsigned long flags, vpflags;
240 local_irq_save(flags);
241 vpflags = dvpe();
242#endif
243 cnt = read_c0_count();
244 cnt += delta;
245 write_c0_compare(cnt);
246 res = ((long)(read_c0_count() - cnt ) > 0) ? -ETIME : 0;
247#ifdef CONFIG_MIPS_MT_SMTC
248 evpe(vpflags);
249 local_irq_restore(flags);
250 }
251#endif
252 return res;
253}
254
255static void mips_set_mode(enum clock_event_mode mode,
256 struct clock_event_device *evt)
257{
258 /* Nothing to do ... */
259}
260
261static DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
262static int cp0_timer_irq_installed;
263
264static irqreturn_t timer_interrupt(int irq, void *dev_id)
265{
266 const int r2 = cpu_has_mips_r2;
267 struct clock_event_device *cd;
268 int cpu = smp_processor_id();
269
270 /*
271 * Suckage alert:
272 * Before R2 of the architecture there was no way to see if a
273 * performance counter interrupt was pending, so we have to run
274 * the performance counter interrupt handler anyway.
275 */
276 if (handle_perf_irq(r2))
277 goto out;
278
279 /*
280 * The same applies to performance counter interrupts. But with the
281 * above we now know that the reason we got here must be a timer
282 * interrupt. Being the paranoiacs we are we check anyway.
283 */
284 if (!r2 || (read_c0_cause() & (1 << 30))) {
285 c0_timer_ack();
286#ifdef CONFIG_MIPS_MT_SMTC
287 if (cpu_data[cpu].vpe_id)
288 goto out;
289 cpu = 0;
290#endif
291 cd = &per_cpu(mips_clockevent_device, cpu);
292 cd->event_handler(cd);
293 }
294
295out:
296 return IRQ_HANDLED;
297}
298
299static struct irqaction timer_irqaction = {
300 .handler = timer_interrupt,
301#ifdef CONFIG_MIPS_MT_SMTC
302 .flags = IRQF_DISABLED,
303#else
304 .flags = IRQF_DISABLED | IRQF_PERCPU,
305#endif
306 .name = "timer",
307};
308
337static void __init init_mips_clocksource(void) 309static void __init init_mips_clocksource(void)
338{ 310{
339 u64 temp; 311 u64 temp;
@@ -357,19 +329,127 @@ static void __init init_mips_clocksource(void)
357 clocksource_register(&clocksource_mips); 329 clocksource_register(&clocksource_mips);
358} 330}
359 331
360void __init time_init(void) 332void __init __weak plat_time_init(void)
333{
334}
335
336void __init __weak plat_timer_setup(struct irqaction *irq)
337{
338}
339
340#ifdef CONFIG_MIPS_MT_SMTC
341DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
342
343static void smtc_set_mode(enum clock_event_mode mode,
344 struct clock_event_device *evt)
345{
346}
347
348int dummycnt[NR_CPUS];
349
350static void mips_broadcast(cpumask_t mask)
351{
352 unsigned int cpu;
353
354 for_each_cpu_mask(cpu, mask)
355 smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
356}
357
358static void setup_smtc_dummy_clockevent_device(void)
359{
360 //uint64_t mips_freq = mips_hpt_^frequency;
361 unsigned int cpu = smp_processor_id();
362 struct clock_event_device *cd;
363
364 cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
365
366 cd->name = "SMTC";
367 cd->features = CLOCK_EVT_FEAT_DUMMY;
368
369 /* Calculate the min / max delta */
370 cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
371 cd->shift = 0; //32;
372 cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);
373 cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);
374
375 cd->rating = 200;
376 cd->irq = 17; //-1;
377// if (cpu)
378// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
379// else
380 cd->cpumask = cpumask_of_cpu(cpu);
381
382 cd->set_mode = smtc_set_mode;
383
384 cd->broadcast = mips_broadcast;
385
386 clockevents_register_device(cd);
387}
388#endif
389
390static void mips_event_handler(struct clock_event_device *dev)
361{ 391{
362 if (board_time_init) 392}
363 board_time_init();
364 393
365 if (!rtc_mips_set_mmss) 394void __cpuinit mips_clockevent_init(void)
366 rtc_mips_set_mmss = rtc_mips_set_time; 395{
396 uint64_t mips_freq = mips_hpt_frequency;
397 unsigned int cpu = smp_processor_id();
398 struct clock_event_device *cd;
399 unsigned int irq = MIPS_CPU_IRQ_BASE + 7;
367 400
368 xtime.tv_sec = rtc_mips_get_time(); 401 if (!cpu_has_counter)
369 xtime.tv_nsec = 0; 402 return;
370 403
371 set_normalized_timespec(&wall_to_monotonic, 404#ifdef CONFIG_MIPS_MT_SMTC
372 -xtime.tv_sec, -xtime.tv_nsec); 405 setup_smtc_dummy_clockevent_device();
406
407 /*
408 * On SMTC we only register VPE0's compare interrupt as clockevent
409 * device.
410 */
411 if (cpu)
412 return;
413#endif
414
415 cd = &per_cpu(mips_clockevent_device, cpu);
416
417 cd->name = "MIPS";
418 cd->features = CLOCK_EVT_FEAT_ONESHOT;
419
420 /* Calculate the min / max delta */
421 cd->mult = div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
422 cd->shift = 32;
423 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
424 cd->min_delta_ns = clockevent_delta2ns(0x30, cd);
425
426 cd->rating = 300;
427 cd->irq = irq;
428#ifdef CONFIG_MIPS_MT_SMTC
429 cd->cpumask = CPU_MASK_ALL;
430#else
431 cd->cpumask = cpumask_of_cpu(cpu);
432#endif
433 cd->set_next_event = mips_next_event;
434 cd->set_mode = mips_set_mode;
435 cd->event_handler = mips_event_handler;
436
437 clockevents_register_device(cd);
438
439 if (!cp0_timer_irq_installed) {
440#ifdef CONFIG_MIPS_MT_SMTC
441#define CPUCTR_IMASKBIT (0x100 << cp0_compare_irq)
442 setup_irq_smtc(irq, &timer_irqaction, CPUCTR_IMASKBIT);
443#else
444 setup_irq(irq, &timer_irqaction);
445#endif /* CONFIG_MIPS_MT_SMTC */
446 cp0_timer_irq_installed = 1;
447 }
448}
449
450void __init time_init(void)
451{
452 plat_time_init();
373 453
374 /* Choose appropriate high precision timer routines. */ 454 /* Choose appropriate high precision timer routines. */
375 if (!cpu_has_counter && !clocksource_mips.read) 455 if (!cpu_has_counter && !clocksource_mips.read)
@@ -392,11 +472,6 @@ void __init time_init(void)
392 /* Calculate cache parameters. */ 472 /* Calculate cache parameters. */
393 cycles_per_jiffy = 473 cycles_per_jiffy =
394 (mips_hpt_frequency + HZ / 2) / HZ; 474 (mips_hpt_frequency + HZ / 2) / HZ;
395 /*
396 * This sets up the high precision
397 * timer for the first interrupt.
398 */
399 c0_hpt_timer_init();
400 } 475 }
401 } 476 }
402 if (!mips_hpt_frequency) 477 if (!mips_hpt_frequency)
@@ -406,6 +481,10 @@ void __init time_init(void)
406 printk("Using %u.%03u MHz high precision timer.\n", 481 printk("Using %u.%03u MHz high precision timer.\n",
407 ((mips_hpt_frequency + 500) / 1000) / 1000, 482 ((mips_hpt_frequency + 500) / 1000) / 1000,
408 ((mips_hpt_frequency + 500) / 1000) % 1000); 483 ((mips_hpt_frequency + 500) / 1000) % 1000);
484
485#ifdef CONFIG_IRQ_CPU
486 setup_irq(MIPS_CPU_IRQ_BASE + 7, &timer_irqaction);
487#endif
409 } 488 }
410 489
411 if (!mips_timer_ack) 490 if (!mips_timer_ack)
@@ -426,56 +505,5 @@ void __init time_init(void)
426 plat_timer_setup(&timer_irqaction); 505 plat_timer_setup(&timer_irqaction);
427 506
428 init_mips_clocksource(); 507 init_mips_clocksource();
508 mips_clockevent_init();
429} 509}
430
431#define FEBRUARY 2
432#define STARTOFTIME 1970
433#define SECDAY 86400L
434#define SECYR (SECDAY * 365)
435#define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400))
436#define days_in_year(y) (leapyear(y) ? 366 : 365)
437#define days_in_month(m) (month_days[(m) - 1])
438
439static int month_days[12] = {
440 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
441};
442
443void to_tm(unsigned long tim, struct rtc_time *tm)
444{
445 long hms, day, gday;
446 int i;
447
448 gday = day = tim / SECDAY;
449 hms = tim % SECDAY;
450
451 /* Hours, minutes, seconds are easy */
452 tm->tm_hour = hms / 3600;
453 tm->tm_min = (hms % 3600) / 60;
454 tm->tm_sec = (hms % 3600) % 60;
455
456 /* Number of years in days */
457 for (i = STARTOFTIME; day >= days_in_year(i); i++)
458 day -= days_in_year(i);
459 tm->tm_year = i;
460
461 /* Number of months in days left */
462 if (leapyear(tm->tm_year))
463 days_in_month(FEBRUARY) = 29;
464 for (i = 1; day >= days_in_month(i); i++)
465 day -= days_in_month(i);
466 days_in_month(FEBRUARY) = 28;
467 tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */
468
469 /* Days are what is left over (+1) from all that. */
470 tm->tm_mday = day + 1;
471
472 /*
473 * Determine the day of week
474 */
475 tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
476}
477
478EXPORT_SYMBOL(rtc_lock);
479EXPORT_SYMBOL(to_tm);
480EXPORT_SYMBOL(rtc_mips_set_time);
481EXPORT_SYMBOL(rtc_mips_get_time);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 6379003f9d8d..632bce1bf420 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -295,7 +295,8 @@ void show_regs(struct pt_regs *regs)
295 if (1 <= cause && cause <= 5) 295 if (1 <= cause && cause <= 5)
296 printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr); 296 printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
297 297
298 printk("PrId : %08x\n", read_c0_prid()); 298 printk("PrId : %08x (%s)\n", read_c0_prid(),
299 cpu_name_string());
299} 300}
300 301
301void show_registers(struct pt_regs *regs) 302void show_registers(struct pt_regs *regs)
@@ -627,7 +628,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
627 lose_fpu(1); 628 lose_fpu(1);
628 629
629 /* Run the emulator */ 630 /* Run the emulator */
630 sig = fpu_emulator_cop1Handler (regs, &current->thread.fpu, 1); 631 sig = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 1);
631 632
632 /* 633 /*
633 * We can't allow the emulated instruction to leave any of 634 * We can't allow the emulated instruction to leave any of
@@ -954,7 +955,7 @@ asmlinkage void do_reserved(struct pt_regs *regs)
954 */ 955 */
955static inline void parity_protection_init(void) 956static inline void parity_protection_init(void)
956{ 957{
957 switch (current_cpu_data.cputype) { 958 switch (current_cpu_type()) {
958 case CPU_24K: 959 case CPU_24K:
959 case CPU_34K: 960 case CPU_34K:
960 case CPU_5KC: 961 case CPU_5KC:
@@ -1075,8 +1076,8 @@ void *set_except_vector(int n, void *addr)
1075 1076
1076 exception_handlers[n] = handler; 1077 exception_handlers[n] = handler;
1077 if (n == 0 && cpu_has_divec) { 1078 if (n == 0 && cpu_has_divec) {
1078 *(volatile u32 *)(ebase + 0x200) = 0x08000000 | 1079 *(u32 *)(ebase + 0x200) = 0x08000000 |
1079 (0x03ffffff & (handler >> 2)); 1080 (0x03ffffff & (handler >> 2));
1080 flush_icache_range(ebase + 0x200, ebase + 0x204); 1081 flush_icache_range(ebase + 0x200, ebase + 0x204);
1081 } 1082 }
1082 return (void *)old_handler; 1083 return (void *)old_handler;
@@ -1165,11 +1166,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1165 1166
1166 if (cpu_has_veic) { 1167 if (cpu_has_veic) {
1167 if (board_bind_eic_interrupt) 1168 if (board_bind_eic_interrupt)
1168 board_bind_eic_interrupt (n, srs); 1169 board_bind_eic_interrupt(n, srs);
1169 } else if (cpu_has_vint) { 1170 } else if (cpu_has_vint) {
1170 /* SRSMap is only defined if shadow sets are implemented */ 1171 /* SRSMap is only defined if shadow sets are implemented */
1171 if (mips_srs_max() > 1) 1172 if (mips_srs_max() > 1)
1172 change_c0_srsmap (0xf << n*4, srs << n*4); 1173 change_c0_srsmap(0xf << n*4, srs << n*4);
1173 } 1174 }
1174 1175
1175 if (srs == 0) { 1176 if (srs == 0) {
@@ -1198,10 +1199,10 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1198 * Sigh... panicing won't help as the console 1199 * Sigh... panicing won't help as the console
1199 * is probably not configured :( 1200 * is probably not configured :(
1200 */ 1201 */
1201 panic ("VECTORSPACING too small"); 1202 panic("VECTORSPACING too small");
1202 } 1203 }
1203 1204
1204 memcpy (b, &except_vec_vi, handler_len); 1205 memcpy(b, &except_vec_vi, handler_len);
1205#ifdef CONFIG_MIPS_MT_SMTC 1206#ifdef CONFIG_MIPS_MT_SMTC
1206 BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */ 1207 BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */
1207 1208
@@ -1370,9 +1371,9 @@ void __init per_cpu_trap_init(void)
1370#endif /* CONFIG_MIPS_MT_SMTC */ 1371#endif /* CONFIG_MIPS_MT_SMTC */
1371 1372
1372 if (cpu_has_veic || cpu_has_vint) { 1373 if (cpu_has_veic || cpu_has_vint) {
1373 write_c0_ebase (ebase); 1374 write_c0_ebase(ebase);
1374 /* Setting vector spacing enables EI/VI mode */ 1375 /* Setting vector spacing enables EI/VI mode */
1375 change_c0_intctl (0x3e0, VECTORSPACING); 1376 change_c0_intctl(0x3e0, VECTORSPACING);
1376 } 1377 }
1377 if (cpu_has_divec) { 1378 if (cpu_has_divec) {
1378 if (cpu_has_mipsmt) { 1379 if (cpu_has_mipsmt) {
@@ -1390,8 +1391,8 @@ void __init per_cpu_trap_init(void)
1390 * o read IntCtl.IPPCI to determine the performance counter interrupt 1391 * o read IntCtl.IPPCI to determine the performance counter interrupt
1391 */ 1392 */
1392 if (cpu_has_mips_r2) { 1393 if (cpu_has_mips_r2) {
1393 cp0_compare_irq = (read_c0_intctl () >> 29) & 7; 1394 cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
1394 cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7; 1395 cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
1395 if (cp0_perfcount_irq == cp0_compare_irq) 1396 if (cp0_perfcount_irq == cp0_compare_irq)
1396 cp0_perfcount_irq = -1; 1397 cp0_perfcount_irq = -1;
1397 } else { 1398 } else {
@@ -1429,14 +1430,17 @@ void __init per_cpu_trap_init(void)
1429} 1430}
1430 1431
1431/* Install CPU exception handler */ 1432/* Install CPU exception handler */
1432void __init set_handler (unsigned long offset, void *addr, unsigned long size) 1433void __init set_handler(unsigned long offset, void *addr, unsigned long size)
1433{ 1434{
1434 memcpy((void *)(ebase + offset), addr, size); 1435 memcpy((void *)(ebase + offset), addr, size);
1435 flush_icache_range(ebase + offset, ebase + offset + size); 1436 flush_icache_range(ebase + offset, ebase + offset + size);
1436} 1437}
1437 1438
1439static char panic_null_cerr[] __initdata =
1440 "Trying to set NULL cache error exception handler";
1441
1438/* Install uncached CPU exception handler */ 1442/* Install uncached CPU exception handler */
1439void __init set_uncached_handler (unsigned long offset, void *addr, unsigned long size) 1443void __init set_uncached_handler(unsigned long offset, void *addr, unsigned long size)
1440{ 1444{
1441#ifdef CONFIG_32BIT 1445#ifdef CONFIG_32BIT
1442 unsigned long uncached_ebase = KSEG1ADDR(ebase); 1446 unsigned long uncached_ebase = KSEG1ADDR(ebase);
@@ -1445,6 +1449,9 @@ void __init set_uncached_handler (unsigned long offset, void *addr, unsigned lon
1445 unsigned long uncached_ebase = TO_UNCAC(ebase); 1449 unsigned long uncached_ebase = TO_UNCAC(ebase);
1446#endif 1450#endif
1447 1451
1452 if (!addr)
1453 panic(panic_null_cerr);
1454
1448 memcpy((void *)(uncached_ebase + offset), addr, size); 1455 memcpy((void *)(uncached_ebase + offset), addr, size);
1449} 1456}
1450 1457
@@ -1464,7 +1471,7 @@ void __init trap_init(void)
1464 unsigned long i; 1471 unsigned long i;
1465 1472
1466 if (cpu_has_veic || cpu_has_vint) 1473 if (cpu_has_veic || cpu_has_vint)
1467 ebase = (unsigned long) alloc_bootmem_low_pages (0x200 + VECTORSPACING*64); 1474 ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
1468 else 1475 else
1469 ebase = CAC_BASE; 1476 ebase = CAC_BASE;
1470 1477
@@ -1490,7 +1497,7 @@ void __init trap_init(void)
1490 * destination. 1497 * destination.
1491 */ 1498 */
1492 if (cpu_has_ejtag && board_ejtag_handler_setup) 1499 if (cpu_has_ejtag && board_ejtag_handler_setup)
1493 board_ejtag_handler_setup (); 1500 board_ejtag_handler_setup();
1494 1501
1495 /* 1502 /*
1496 * Only some CPUs have the watch exceptions. 1503 * Only some CPUs have the watch exceptions.
@@ -1543,8 +1550,8 @@ void __init trap_init(void)
1543 set_except_vector(12, handle_ov); 1550 set_except_vector(12, handle_ov);
1544 set_except_vector(13, handle_tr); 1551 set_except_vector(13, handle_tr);
1545 1552
1546 if (current_cpu_data.cputype == CPU_R6000 || 1553 if (current_cpu_type() == CPU_R6000 ||
1547 current_cpu_data.cputype == CPU_R6000A) { 1554 current_cpu_type() == CPU_R6000A) {
1548 /* 1555 /*
1549 * The R6000 is the only R-series CPU that features a machine 1556 * The R6000 is the only R-series CPU that features a machine
1550 * check exception (similar to the R4000 cache error) and 1557 * check exception (similar to the R4000 cache error) and
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index d34b1fb3665d..c327b21bca81 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -481,7 +481,7 @@ fault:
481 if (fixup_exception(regs)) 481 if (fixup_exception(regs))
482 return; 482 return;
483 483
484 die_if_kernel ("Unhandled kernel unaligned access", regs); 484 die_if_kernel("Unhandled kernel unaligned access", regs);
485 send_sig(SIGSEGV, current, 1); 485 send_sig(SIGSEGV, current, 1);
486 486
487 return; 487 return;
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 087ab997487d..84f9a4cc6f2f 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -6,163 +6,202 @@
6OUTPUT_ARCH(mips) 6OUTPUT_ARCH(mips)
7ENTRY(kernel_entry) 7ENTRY(kernel_entry)
8jiffies = JIFFIES; 8jiffies = JIFFIES;
9
9SECTIONS 10SECTIONS
10{ 11{
11#ifdef CONFIG_BOOT_ELF64 12#ifdef CONFIG_BOOT_ELF64
12 /* Read-only sections, merged into text segment: */ 13 /* Read-only sections, merged into text segment: */
13 /* . = 0xc000000000000000; */ 14 /* . = 0xc000000000000000; */
14 15
15 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 16 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
16 /* . = 0xc00000000001c000; */ 17 /* . = 0xc00000000001c000; */
17 18
18 /* Set the vaddr for the text segment to a value 19 /* Set the vaddr for the text segment to a value
19 >= 0xa800 0000 0001 9000 if no symmon is going to configured 20 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
20 >= 0xa800 0000 0030 0000 otherwise */ 21 * >= 0xa800 0000 0030 0000 otherwise
22 */
21 23
22 /* . = 0xa800000000300000; */ 24 /* . = 0xa800000000300000; */
23 /* . = 0xa800000000300000; */ 25 /* . = 0xa800000000300000; */
24 . = 0xffffffff80300000; 26 . = 0xffffffff80300000;
25#endif 27#endif
26 . = LOADADDR; 28 . = LOADADDR;
27 /* read-only */ 29 /* read-only */
28 _text = .; /* Text and read-only data */ 30 _text = .; /* Text and read-only data */
29 .text : { 31 .text : {
30 TEXT_TEXT 32 TEXT_TEXT
31 SCHED_TEXT 33 SCHED_TEXT
32 LOCK_TEXT 34 LOCK_TEXT
33 *(.fixup) 35 *(.fixup)
34 *(.gnu.warning) 36 *(.gnu.warning)
35 } =0 37 } =0
36 38 _etext = .; /* End of text section */
37 _etext = .; /* End of text section */ 39
38 40 /* Exception table */
39 . = ALIGN(16); /* Exception table */ 41 . = ALIGN(16);
40 __start___ex_table = .; 42 __ex_table : {
41 __ex_table : { *(__ex_table) } 43 __start___ex_table = .;
42 __stop___ex_table = .; 44 *(__ex_table)
43 45 __stop___ex_table = .;
44 __start___dbe_table = .; /* Exception table for data bus errors */ 46 }
45 __dbe_table : { *(__dbe_table) } 47
46 __stop___dbe_table = .; 48 /* Exception table for data bus errors */
47 49 __dbe_table : {
48 NOTES 50 __start___dbe_table = .;
49 51 *(__dbe_table)
50 RODATA 52 __stop___dbe_table = .;
51 53 }
52 /* writeable */ 54 RODATA
53 .data : { /* Data */ 55
54 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 56 /* writeable */
55 /* 57 .data : { /* Data */
56 * This ALIGN is needed as a workaround for a bug a gcc bug upto 4.1 which 58 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
57 * limits the maximum alignment to at most 32kB and results in the following 59 /*
58 * warning: 60 * This ALIGN is needed as a workaround for a bug a gcc bug upto 4.1 which
59 * 61 * limits the maximum alignment to at most 32kB and results in the following
60 * CC arch/mips/kernel/init_task.o 62 * warning:
61 * arch/mips/kernel/init_task.c:30: warning: alignment of ‘init_thread_union’ 63 *
62 * is greater than maximum object file alignment. Using 32768 64 * CC arch/mips/kernel/init_task.o
63 */ 65 * arch/mips/kernel/init_task.c:30: warning: alignment of ‘init_thread_union’
64 . = ALIGN(_PAGE_SIZE); 66 * is greater than maximum object file alignment. Using 32768
65 *(.data.init_task) 67 */
66 68 . = ALIGN(_PAGE_SIZE);
67 DATA_DATA 69 *(.data.init_task)
68 70
69 CONSTRUCTORS 71 DATA_DATA
70 } 72 CONSTRUCTORS
71 _gp = . + 0x8000; 73 }
72 .lit8 : { *(.lit8) } 74 _gp = . + 0x8000;
73 .lit4 : { *(.lit4) } 75 .lit8 : {
74 /* We want the small data sections together, so single-instruction offsets 76 *(.lit8)
75 can access them all, and initialized data all before uninitialized, so 77 }
76 we can shorten the on-disk segment size. */ 78 .lit4 : {
77 .sdata : { *(.sdata) } 79 *(.lit4)
78 80 }
79 . = ALIGN(_PAGE_SIZE); 81 /* We want the small data sections together, so single-instruction offsets
80 __nosave_begin = .; 82 can access them all, and initialized data all before uninitialized, so
81 .data_nosave : { *(.data.nosave) } 83 we can shorten the on-disk segment size. */
82 . = ALIGN(_PAGE_SIZE); 84 .sdata : {
83 __nosave_end = .; 85 *(.sdata)
84 86 }
85 . = ALIGN(32); 87
86 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 88 . = ALIGN(_PAGE_SIZE);
87 89 .data_nosave : {
88 _edata = .; /* End of data section */ 90 __nosave_begin = .;
89 91 *(.data.nosave)
90 /* will be freed after init */ 92 }
91 . = ALIGN(_PAGE_SIZE); /* Init code and data */ 93 . = ALIGN(_PAGE_SIZE);
92 __init_begin = .; 94 __nosave_end = .;
93 .init.text : { 95
94 _sinittext = .; 96 . = ALIGN(32);
95 *(.init.text) 97 .data.cacheline_aligned : {
96 _einittext = .; 98 *(.data.cacheline_aligned)
97 } 99 }
98 .init.data : { *(.init.data) } 100 _edata = .; /* End of data section */
99 . = ALIGN(16); 101
100 __setup_start = .; 102 /* will be freed after init */
101 .init.setup : { *(.init.setup) } 103 . = ALIGN(_PAGE_SIZE); /* Init code and data */
102 __setup_end = .; 104 __init_begin = .;
103 105 .init.text : {
104 __initcall_start = .; 106 _sinittext = .;
105 .initcall.init : { 107 *(.init.text)
106 INITCALLS 108 _einittext = .;
107 } 109 }
108 __initcall_end = .; 110 .init.data : {
109 111 *(.init.data)
110 __con_initcall_start = .; 112 }
111 .con_initcall.init : { *(.con_initcall.init) } 113 . = ALIGN(16);
112 __con_initcall_end = .; 114 .init.setup : {
113 SECURITY_INIT 115 __setup_start = .;
114 /* .exit.text is discarded at runtime, not link time, to deal with 116 *(.init.setup)
115 references from .rodata */ 117 __setup_end = .;
116 .exit.text : { *(.exit.text) } 118 }
117 .exit.data : { *(.exit.data) } 119
120 .initcall.init : {
121 __initcall_start = .;
122 INITCALLS
123 __initcall_end = .;
124 }
125
126 .con_initcall.init : {
127 __con_initcall_start = .;
128 *(.con_initcall.init)
129 __con_initcall_end = .;
130 }
131 SECURITY_INIT
132
133 /* .exit.text is discarded at runtime, not link time, to deal with
134 * references from .rodata
135 */
136 .exit.text : {
137 *(.exit.text)
138 }
139 .exit.data : {
140 *(.exit.data)
141 }
118#if defined(CONFIG_BLK_DEV_INITRD) 142#if defined(CONFIG_BLK_DEV_INITRD)
119 . = ALIGN(_PAGE_SIZE); 143 . = ALIGN(_PAGE_SIZE);
120 __initramfs_start = .; 144 .init.ramfs : {
121 .init.ramfs : { *(.init.ramfs) } 145 __initramfs_start = .;
122 __initramfs_end = .; 146 *(.init.ramfs)
147 __initramfs_end = .;
148 }
123#endif 149#endif
124 PERCPU(_PAGE_SIZE) 150 PERCPU(_PAGE_SIZE)
125 . = ALIGN(_PAGE_SIZE); 151 . = ALIGN(_PAGE_SIZE);
126 __init_end = .; 152 __init_end = .;
127 /* freed after init ends here */ 153 /* freed after init ends here */
128 154
129 __bss_start = .; /* BSS */ 155 __bss_start = .; /* BSS */
130 .sbss : { 156 .sbss : {
131 *(.sbss) 157 *(.sbss)
132 *(.scommon) 158 *(.scommon)
133 } 159 }
134 .bss : { 160 .bss : {
135 *(.bss) 161 *(.bss)
136 *(COMMON) 162 *(COMMON)
137 } 163 }
138 __bss_stop = .; 164 __bss_stop = .;
139 165
140 _end = . ; 166 _end = . ;
141 167
142 /* Sections to be discarded */ 168 /* Sections to be discarded */
143 /DISCARD/ : { 169 /DISCARD/ : {
144 *(.exitcall.exit) 170 *(.exitcall.exit)
145 171
146 /* ABI crap starts here */ 172 /* ABI crap starts here */
147 *(.MIPS.options) 173 *(.MIPS.options)
148 *(.options) 174 *(.options)
149 *(.pdr) 175 *(.pdr)
150 *(.reginfo) 176 *(.reginfo)
151 } 177 }
152 178
153 /* These mark the ABI of the kernel for debuggers. */ 179 /* These mark the ABI of the kernel for debuggers. */
154 .mdebug.abi32 : { KEEP(*(.mdebug.abi32)) } 180 .mdebug.abi32 : {
155 .mdebug.abi64 : { KEEP(*(.mdebug.abi64)) } 181 KEEP(*(.mdebug.abi32))
156 182 }
157 /* This is the MIPS specific mdebug section. */ 183 .mdebug.abi64 : {
158 .mdebug : { *(.mdebug) } 184 KEEP(*(.mdebug.abi64))
159 185 }
160 STABS_DEBUG 186
161 187 /* This is the MIPS specific mdebug section. */
162 DWARF_DEBUG 188 .mdebug : {
163 189 *(.mdebug)
164 /* These must appear regardless of . */ 190 }
165 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } 191
166 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } 192 STABS_DEBUG
167 .note : { *(.note) } 193 DWARF_DEBUG
194
195 /* These must appear regardless of . */
196 .gptab.sdata : {
197 *(.gptab.data)
198 *(.gptab.sdata)
199 }
200 .gptab.sbss : {
201 *(.gptab.bss)
202 *(.gptab.sbss)
203 }
204 .note : {
205 *(.note)
206 }
168} 207}
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 3c09b9785f4c..61b729fa0548 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -936,8 +936,18 @@ static int vpe_elfload(struct vpe * v)
936 936
937 } 937 }
938 } else { 938 } else {
939 for (i = 0; i < hdr->e_shnum; i++) { 939 struct elf_phdr *phdr = (struct elf_phdr *) ((char *)hdr + hdr->e_phoff);
940 940
941 for (i = 0; i < hdr->e_phnum; i++) {
942 if (phdr->p_type != PT_LOAD)
943 continue;
944
945 memcpy((void *)phdr->p_vaddr, (char *)hdr + phdr->p_offset, phdr->p_filesz);
946 memset((void *)phdr->p_vaddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz);
947 phdr++;
948 }
949
950 for (i = 0; i < hdr->e_shnum; i++) {
941 /* Internal symbols and strings. */ 951 /* Internal symbols and strings. */
942 if (sechdrs[i].sh_type == SHT_SYMTAB) { 952 if (sechdrs[i].sh_type == SHT_SYMTAB) {
943 symindex = i; 953 symindex = i;
@@ -948,39 +958,6 @@ static int vpe_elfload(struct vpe * v)
948 magic symbols */ 958 magic symbols */
949 sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset; 959 sechdrs[i].sh_addr = (size_t) hdr + sechdrs[i].sh_offset;
950 } 960 }
951
952 /* filter sections we dont want in the final image */
953 if (!(sechdrs[i].sh_flags & SHF_ALLOC) ||
954 (sechdrs[i].sh_type == SHT_MIPS_REGINFO)) {
955 printk( KERN_DEBUG " ignoring section, "
956 "name %s type %x address 0x%x \n",
957 secstrings + sechdrs[i].sh_name,
958 sechdrs[i].sh_type, sechdrs[i].sh_addr);
959 continue;
960 }
961
962 if (sechdrs[i].sh_addr < (unsigned int)v->load_addr) {
963 printk( KERN_WARNING "VPE loader: "
964 "fully linked image has invalid section, "
965 "name %s type %x address 0x%x, before load "
966 "address of 0x%x\n",
967 secstrings + sechdrs[i].sh_name,
968 sechdrs[i].sh_type, sechdrs[i].sh_addr,
969 (unsigned int)v->load_addr);
970 return -ENOEXEC;
971 }
972
973 printk(KERN_DEBUG " copying section sh_name %s, sh_addr 0x%x "
974 "size 0x%x0 from x%p\n",
975 secstrings + sechdrs[i].sh_name, sechdrs[i].sh_addr,
976 sechdrs[i].sh_size, hdr + sechdrs[i].sh_offset);
977
978 if (sechdrs[i].sh_type != SHT_NOBITS)
979 memcpy((void *)sechdrs[i].sh_addr,
980 (char *)hdr + sechdrs[i].sh_offset,
981 sechdrs[i].sh_size);
982 else
983 memset((void *)sechdrs[i].sh_addr, 0, sechdrs[i].sh_size);
984 } 961 }
985 } 962 }
986 963
@@ -1044,7 +1021,7 @@ static int getcwd(char *buff, int size)
1044 old_fs = get_fs(); 1021 old_fs = get_fs();
1045 set_fs(KERNEL_DS); 1022 set_fs(KERNEL_DS);
1046 1023
1047 ret = sys_getcwd(buff,size); 1024 ret = sys_getcwd(buff, size);
1048 1025
1049 set_fs(old_fs); 1026 set_fs(old_fs);
1050 1027
diff --git a/arch/mips/lasat/Kconfig b/arch/mips/lasat/Kconfig
new file mode 100644
index 000000000000..1d2ee8a9be13
--- /dev/null
+++ b/arch/mips/lasat/Kconfig
@@ -0,0 +1,15 @@
1config PICVUE
2 tristate "PICVUE LCD display driver"
3 depends on LASAT
4
5config PICVUE_PROC
6 tristate "PICVUE LCD display driver /proc interface"
7 depends on PICVUE
8
9config DS1603
10 bool "DS1603 RTC driver"
11 depends on LASAT
12
13config LASAT_SYSCTL
14 bool "LASAT sysctl interface"
15 depends on LASAT
diff --git a/arch/mips/lasat/Makefile b/arch/mips/lasat/Makefile
new file mode 100644
index 000000000000..33791609fe99
--- /dev/null
+++ b/arch/mips/lasat/Makefile
@@ -0,0 +1,16 @@
1#
2# Makefile for the LASAT specific kernel interface routines under Linux.
3#
4
5obj-y += reset.o setup.o prom.o lasat_board.o \
6 at93c.o interrupt.o serial.o
7
8obj-$(CONFIG_LASAT_SYSCTL) += sysctl.o
9obj-$(CONFIG_DS1603) += ds1603.o
10obj-$(CONFIG_PICVUE) += picvue.o
11obj-$(CONFIG_PICVUE_PROC) += picvue_proc.o
12
13clean:
14 make -C image clean
15
16EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/lasat/at93c.c b/arch/mips/lasat/at93c.c
new file mode 100644
index 000000000000..793e234719a6
--- /dev/null
+++ b/arch/mips/lasat/at93c.c
@@ -0,0 +1,149 @@
1/*
2 * Atmel AT93C46 serial eeprom driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/delay.h>
9#include <asm/lasat/lasat.h>
10#include <linux/module.h>
11#include <linux/init.h>
12
13#include "at93c.h"
14
15#define AT93C_ADDR_SHIFT 7
16#define AT93C_ADDR_MAX ((1 << AT93C_ADDR_SHIFT) - 1)
17#define AT93C_RCMD (0x6 << AT93C_ADDR_SHIFT)
18#define AT93C_WCMD (0x5 << AT93C_ADDR_SHIFT)
19#define AT93C_WENCMD 0x260
20#define AT93C_WDSCMD 0x200
21
22struct at93c_defs *at93c;
23
24static void at93c_reg_write(u32 val)
25{
26 *at93c->reg = val;
27}
28
29static u32 at93c_reg_read(void)
30{
31 u32 tmp = *at93c->reg;
32 return tmp;
33}
34
35static u32 at93c_datareg_read(void)
36{
37 u32 tmp = *at93c->rdata_reg;
38 return tmp;
39}
40
41static void at93c_cycle_clk(u32 data)
42{
43 at93c_reg_write(data | at93c->clk);
44 lasat_ndelay(250);
45 at93c_reg_write(data & ~at93c->clk);
46 lasat_ndelay(250);
47}
48
49static void at93c_write_databit(u8 bit)
50{
51 u32 data = at93c_reg_read();
52 if (bit)
53 data |= 1 << at93c->wdata_shift;
54 else
55 data &= ~(1 << at93c->wdata_shift);
56
57 at93c_reg_write(data);
58 lasat_ndelay(100);
59 at93c_cycle_clk(data);
60}
61
62static unsigned int at93c_read_databit(void)
63{
64 u32 data;
65
66 at93c_cycle_clk(at93c_reg_read());
67 data = (at93c_datareg_read() >> at93c->rdata_shift) & 1;
68 return data;
69}
70
71static u8 at93c_read_byte(void)
72{
73 int i;
74 u8 data = 0;
75
76 for (i = 0; i <= 7; i++) {
77 data <<= 1;
78 data |= at93c_read_databit();
79 }
80 return data;
81}
82
83static void at93c_write_bits(u32 data, int size)
84{
85 int i;
86 int shift = size - 1;
87 u32 mask = (1 << shift);
88
89 for (i = 0; i < size; i++) {
90 at93c_write_databit((data & mask) >> shift);
91 data <<= 1;
92 }
93}
94
95static void at93c_init_op(void)
96{
97 at93c_reg_write((at93c_reg_read() | at93c->cs) &
98 ~at93c->clk & ~(1 << at93c->rdata_shift));
99 lasat_ndelay(50);
100}
101
102static void at93c_end_op(void)
103{
104 at93c_reg_write(at93c_reg_read() & ~at93c->cs);
105 lasat_ndelay(250);
106}
107
108static void at93c_wait(void)
109{
110 at93c_init_op();
111 while (!at93c_read_databit())
112 ;
113 at93c_end_op();
114};
115
116static void at93c_disable_wp(void)
117{
118 at93c_init_op();
119 at93c_write_bits(AT93C_WENCMD, 10);
120 at93c_end_op();
121}
122
123static void at93c_enable_wp(void)
124{
125 at93c_init_op();
126 at93c_write_bits(AT93C_WDSCMD, 10);
127 at93c_end_op();
128}
129
130u8 at93c_read(u8 addr)
131{
132 u8 byte;
133 at93c_init_op();
134 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_RCMD, 10);
135 byte = at93c_read_byte();
136 at93c_end_op();
137 return byte;
138}
139
140void at93c_write(u8 addr, u8 data)
141{
142 at93c_disable_wp();
143 at93c_init_op();
144 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_WCMD, 10);
145 at93c_write_bits(data, 8);
146 at93c_end_op();
147 at93c_wait();
148 at93c_enable_wp();
149}
diff --git a/arch/mips/lasat/at93c.h b/arch/mips/lasat/at93c.h
new file mode 100644
index 000000000000..cfe2f99b1d44
--- /dev/null
+++ b/arch/mips/lasat/at93c.h
@@ -0,0 +1,18 @@
1/*
2 * Atmel AT93C46 serial eeprom driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7
8extern struct at93c_defs {
9 volatile u32 *reg;
10 volatile u32 *rdata_reg;
11 int rdata_shift;
12 int wdata_shift;
13 u32 cs;
14 u32 clk;
15} *at93c;
16
17u8 at93c_read(u8 addr);
18void at93c_write(u8 addr, u8 data);
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c
new file mode 100644
index 000000000000..52cb1436a12a
--- /dev/null
+++ b/arch/mips/lasat/ds1603.c
@@ -0,0 +1,183 @@
1/*
2 * Dallas Semiconductors 1603 RTC driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#include <linux/kernel.h>
8#include <asm/lasat/lasat.h>
9#include <linux/delay.h>
10#include <asm/lasat/ds1603.h>
11#include <asm/time.h>
12
13#include "ds1603.h"
14
15#define READ_TIME_CMD 0x81
16#define SET_TIME_CMD 0x80
17#define TRIMMER_SET_CMD 0xC0
18#define TRIMMER_VALUE_MASK 0x38
19#define TRIMMER_SHIFT 3
20
21struct ds_defs *ds1603;
22
23/* HW specific register functions */
24static void rtc_reg_write(unsigned long val)
25{
26 *ds1603->reg = val;
27}
28
29static unsigned long rtc_reg_read(void)
30{
31 unsigned long tmp = *ds1603->reg;
32 return tmp;
33}
34
35static unsigned long rtc_datareg_read(void)
36{
37 unsigned long tmp = *ds1603->data_reg;
38 return tmp;
39}
40
41static void rtc_nrst_high(void)
42{
43 rtc_reg_write(rtc_reg_read() | ds1603->rst);
44}
45
46static void rtc_nrst_low(void)
47{
48 rtc_reg_write(rtc_reg_read() & ~ds1603->rst);
49}
50
51static void rtc_cycle_clock(unsigned long data)
52{
53 data |= ds1603->clk;
54 rtc_reg_write(data);
55 lasat_ndelay(250);
56 if (ds1603->data_reversed)
57 data &= ~ds1603->data;
58 else
59 data |= ds1603->data;
60 data &= ~ds1603->clk;
61 rtc_reg_write(data);
62 lasat_ndelay(250 + ds1603->huge_delay);
63}
64
65static void rtc_write_databit(unsigned int bit)
66{
67 unsigned long data = rtc_reg_read();
68 if (ds1603->data_reversed)
69 bit = !bit;
70 if (bit)
71 data |= ds1603->data;
72 else
73 data &= ~ds1603->data;
74
75 rtc_reg_write(data);
76 lasat_ndelay(50 + ds1603->huge_delay);
77 rtc_cycle_clock(data);
78}
79
80static unsigned int rtc_read_databit(void)
81{
82 unsigned int data;
83
84 data = (rtc_datareg_read() & (1 << ds1603->data_read_shift))
85 >> ds1603->data_read_shift;
86 rtc_cycle_clock(rtc_reg_read());
87 return data;
88}
89
90static void rtc_write_byte(unsigned int byte)
91{
92 int i;
93
94 for (i = 0; i <= 7; i++) {
95 rtc_write_databit(byte & 1L);
96 byte >>= 1;
97 }
98}
99
100static void rtc_write_word(unsigned long word)
101{
102 int i;
103
104 for (i = 0; i <= 31; i++) {
105 rtc_write_databit(word & 1L);
106 word >>= 1;
107 }
108}
109
110static unsigned long rtc_read_word(void)
111{
112 int i;
113 unsigned long word = 0;
114 unsigned long shift = 0;
115
116 for (i = 0; i <= 31; i++) {
117 word |= rtc_read_databit() << shift;
118 shift++;
119 }
120 return word;
121}
122
123static void rtc_init_op(void)
124{
125 rtc_nrst_high();
126
127 rtc_reg_write(rtc_reg_read() & ~ds1603->clk);
128
129 lasat_ndelay(50);
130}
131
132static void rtc_end_op(void)
133{
134 rtc_nrst_low();
135 lasat_ndelay(1000);
136}
137
138unsigned long read_persistent_clock(void)
139{
140 unsigned long word;
141 unsigned long flags;
142
143 spin_lock_irqsave(&rtc_lock, flags);
144 rtc_init_op();
145 rtc_write_byte(READ_TIME_CMD);
146 word = rtc_read_word();
147 rtc_end_op();
148 spin_unlock_irqrestore(&rtc_lock, flags);
149
150 return word;
151}
152
153int rtc_mips_set_mmss(unsigned long time)
154{
155 unsigned long flags;
156
157 spin_lock_irqsave(&rtc_lock, flags);
158 rtc_init_op();
159 rtc_write_byte(SET_TIME_CMD);
160 rtc_write_word(time);
161 rtc_end_op();
162 spin_unlock_irqrestore(&rtc_lock, flags);
163
164 return 0;
165}
166
167void ds1603_set_trimmer(unsigned int trimval)
168{
169 rtc_init_op();
170 rtc_write_byte(((trimval << TRIMMER_SHIFT) & TRIMMER_VALUE_MASK)
171 | (TRIMMER_SET_CMD));
172 rtc_end_op();
173}
174
175void ds1603_disable(void)
176{
177 ds1603_set_trimmer(TRIMMER_DISABLE_RTC);
178}
179
180void ds1603_enable(void)
181{
182 ds1603_set_trimmer(TRIMMER_DEFAULT);
183}
diff --git a/arch/mips/lasat/ds1603.h b/arch/mips/lasat/ds1603.h
new file mode 100644
index 000000000000..2da3704044fd
--- /dev/null
+++ b/arch/mips/lasat/ds1603.h
@@ -0,0 +1,31 @@
1/*
2 * Dallas Semiconductors 1603 RTC driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#ifndef __DS1603_H
8#define __DS1603_H
9
10struct ds_defs {
11 volatile u32 *reg;
12 volatile u32 *data_reg;
13 u32 rst;
14 u32 clk;
15 u32 data;
16 u32 data_read_shift;
17 char data_reversed;
18 u32 huge_delay;
19};
20
21extern struct ds_defs *ds1603;
22
23void ds1603_set_trimmer(unsigned int);
24void ds1603_enable(void);
25void ds1603_disable(void);
26void ds1603_init(struct ds_defs *);
27
28#define TRIMMER_DEFAULT 3
29#define TRIMMER_DISABLE_RTC 0
30
31#endif
diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile
new file mode 100644
index 000000000000..5332449ec040
--- /dev/null
+++ b/arch/mips/lasat/image/Makefile
@@ -0,0 +1,54 @@
1#
2# MAKEFILE FOR THE MIPS LINUX BOOTLOADER AND ROM DEBUGGER
3#
4# i-data Networks
5#
6# Author: Thomas Horsten <thh@i-data.com>
7#
8
9ifndef Version
10 Version = "$(USER)-test"
11endif
12
13MKLASATIMG = mklasatimg
14MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
15KERNEL_IMAGE = $(TOPDIR)/vmlinux
16KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
17KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
18
19LDSCRIPT= -L$(obj) -Tromscript.normal
20
21HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
22 -D_kernel_entry=0x$(KERNEL_ENTRY) \
23 -D VERSION="\"$(Version)\"" \
24 -D TIMESTAMP=$(shell date +%s)
25
26$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
27 $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
28
29OBJECTS = head.o kImage.o
30
31rom.sw: $(obj)/rom.sw
32rom.bin: $(obj)/rom.bin
33
34$(obj)/rom.sw: $(obj)/rom.bin
35 $(MKLASATIMG) -o $@ -k $^ -m $(MKLASATIMG_ARCH)
36
37$(obj)/rom.bin: $(obj)/rom
38 $(OBJCOPY) -O binary -S $^ $@
39
40# Rule to make the bootloader
41$(obj)/rom: $(addprefix $(obj)/,$(OBJECTS))
42 $(LD) $(LDFLAGS) $(LDSCRIPT) -o $@ $^
43
44$(obj)/%.o: $(obj)/%.gz
45 $(LD) -r -o $@ -b binary $<
46
47$(obj)/%.gz: $(obj)/%.bin
48 gzip -cf -9 $< > $@
49
50$(obj)/kImage.bin: $(KERNEL_IMAGE)
51 $(OBJCOPY) -O binary -S $^ $@
52
53clean:
54 rm -f rom rom.bin rom.sw kImage.bin kImage.o
diff --git a/arch/mips/lasat/image/head.S b/arch/mips/lasat/image/head.S
new file mode 100644
index 000000000000..efb95f2609c2
--- /dev/null
+++ b/arch/mips/lasat/image/head.S
@@ -0,0 +1,31 @@
1#include <asm/lasat/head.h>
2
3 .text
4 .section .text.start, "ax"
5 .set noreorder
6 .set mips3
7
8 /* Magic words identifying a software image */
9 .word LASAT_K_MAGIC0_VAL
10 .word LASAT_K_MAGIC1_VAL
11
12 /* Image header version */
13 .word 0x00000002
14
15 /* image start and size */
16 .word _image_start
17 .word _image_size
18
19 /* start of kernel and entrypoint in uncompressed image */
20 .word _kernel_start
21 .word _kernel_entry
22
23 /* Here we have room for future flags */
24
25 .org 0x40
26reldate:
27 .word TIMESTAMP
28
29 .org 0x50
30release:
31 .string VERSION
diff --git a/arch/mips/lasat/image/romscript.normal b/arch/mips/lasat/image/romscript.normal
new file mode 100644
index 000000000000..988f8ad189cb
--- /dev/null
+++ b/arch/mips/lasat/image/romscript.normal
@@ -0,0 +1,23 @@
1OUTPUT_ARCH(mips)
2
3SECTIONS
4{
5 .text :
6 {
7 *(.text.start)
8 }
9
10 /* Data in ROM */
11
12 .data ALIGN(0x10) :
13 {
14 *(.data)
15 }
16 _image_start = ADDR(.data);
17 _image_size = SIZEOF(.data);
18
19 .other :
20 {
21 *(.*)
22 }
23}
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
new file mode 100644
index 000000000000..5f35289bfff5
--- /dev/null
+++ b/arch/mips/lasat/interrupt.c
@@ -0,0 +1,130 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines for generic manipulation of the interrupts found on the
19 * Lasat boards.
20 */
21#include <linux/init.h>
22#include <linux/irq.h>
23#include <linux/sched.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/kernel_stat.h>
27
28#include <asm/bootinfo.h>
29#include <asm/lasat/lasatint.h>
30#include <asm/time.h>
31#include <asm/gdb-stub.h>
32
33static volatile int *lasat_int_status;
34static volatile int *lasat_int_mask;
35static volatile int lasat_int_mask_shift;
36
37void disable_lasat_irq(unsigned int irq_nr)
38{
39 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
40}
41
42void enable_lasat_irq(unsigned int irq_nr)
43{
44 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
45}
46
47static struct irq_chip lasat_irq_type = {
48 .name = "Lasat",
49 .ack = disable_lasat_irq,
50 .mask = disable_lasat_irq,
51 .mask_ack = disable_lasat_irq,
52 .unmask = enable_lasat_irq,
53};
54
55static inline int ls1bit32(unsigned int x)
56{
57 int b = 31, s;
58
59 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
60 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
61 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
62 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
63 s = 1; if (x << 1 == 0) s = 0; b -= s;
64
65 return b;
66}
67
68static unsigned long (*get_int_status)(void);
69
70static unsigned long get_int_status_100(void)
71{
72 return *lasat_int_status & *lasat_int_mask;
73}
74
75static unsigned long get_int_status_200(void)
76{
77 unsigned long int_status;
78
79 int_status = *lasat_int_status;
80 int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff;
81 return int_status;
82}
83
84asmlinkage void plat_irq_dispatch(void)
85{
86 unsigned long int_status;
87 unsigned int cause = read_c0_cause();
88 int irq;
89
90 if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
91 ll_timer_interrupt(7);
92 return;
93 }
94
95 int_status = get_int_status();
96
97 /* if int_status == 0, then the interrupt has already been cleared */
98 if (int_status) {
99 irq = ls1bit32(int_status);
100
101 do_IRQ(irq);
102 }
103}
104
105void __init arch_init_irq(void)
106{
107 int i;
108
109 switch (mips_machtype) {
110 case MACH_LASAT_100:
111 lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
112 lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
113 lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
114 get_int_status = get_int_status_100;
115 *lasat_int_mask = 0;
116 break;
117 case MACH_LASAT_200:
118 lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
119 lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
120 lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
121 get_int_status = get_int_status_200;
122 *lasat_int_mask &= 0xffff;
123 break;
124 default:
125 panic("arch_init_irq: mips_machtype incorrect");
126 }
127
128 for (i = 0; i <= LASATINT_END; i++)
129 set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
130}
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
new file mode 100644
index 000000000000..ec2f658c3709
--- /dev/null
+++ b/arch/mips/lasat/lasat_board.c
@@ -0,0 +1,280 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines specific to the LASAT boards
19 */
20#include <linux/types.h>
21#include <linux/crc32.h>
22#include <asm/lasat/lasat.h>
23#include <linux/kernel.h>
24#include <linux/string.h>
25#include <linux/ctype.h>
26#include <asm/bootinfo.h>
27#include <asm/addrspace.h>
28#include "at93c.h"
29/* New model description table */
30#include "lasat_models.h"
31
32#define EEPROM_CRC(data, len) (~crc32(~0, data, len))
33
34struct lasat_info lasat_board_info;
35
36void update_bcastaddr(void);
37
38int EEPROMRead(unsigned int pos, unsigned char *data, int len)
39{
40 int i;
41
42 for (i = 0; i < len; i++)
43 *data++ = at93c_read(pos++);
44
45 return 0;
46}
47
48int EEPROMWrite(unsigned int pos, unsigned char *data, int len)
49{
50 int i;
51
52 for (i = 0; i < len; i++)
53 at93c_write(pos++, *data++);
54
55 return 0;
56}
57
58static void init_flash_sizes(void)
59{
60 unsigned long *lb = lasat_board_info.li_flashpart_base;
61 unsigned long *ls = lasat_board_info.li_flashpart_size;
62 int i;
63
64 ls[LASAT_MTD_BOOTLOADER] = 0x40000;
65 ls[LASAT_MTD_SERVICE] = 0xC0000;
66 ls[LASAT_MTD_NORMAL] = 0x100000;
67
68 if (mips_machtype == MACH_LASAT_100) {
69 lasat_board_info.li_flash_base = 0x1e000000;
70
71 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
72
73 if (lasat_board_info.li_flash_size > 0x200000) {
74 ls[LASAT_MTD_CONFIG] = 0x100000;
75 ls[LASAT_MTD_FS] = 0x500000;
76 }
77 } else {
78 lasat_board_info.li_flash_base = 0x10000000;
79
80 if (lasat_board_info.li_flash_size < 0x1000000) {
81 lb[LASAT_MTD_BOOTLOADER] = 0x10000000;
82 ls[LASAT_MTD_CONFIG] = 0x100000;
83 if (lasat_board_info.li_flash_size >= 0x400000)
84 ls[LASAT_MTD_FS] =
85 lasat_board_info.li_flash_size - 0x300000;
86 }
87 }
88
89 for (i = 1; i < LASAT_MTD_LAST; i++)
90 lb[i] = lb[i-1] + ls[i-1];
91}
92
93int lasat_init_board_info(void)
94{
95 int c;
96 unsigned long crc;
97 unsigned long cfg0, cfg1;
98 const struct product_info *ppi;
99 int i_n_base_models = N_BASE_MODELS;
100 const char * const * i_txt_base_models = txt_base_models;
101 int i_n_prids = N_PRIDS;
102
103 memset(&lasat_board_info, 0, sizeof(lasat_board_info));
104
105 /* First read the EEPROM info */
106 EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
107 sizeof(struct lasat_eeprom_struct));
108
109 /* Check the CRC */
110 crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
111 sizeof(struct lasat_eeprom_struct) - 4);
112
113 if (crc != lasat_board_info.li_eeprom_info.crc32) {
114 printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM CRC does "
115 "not match calculated, attempting to soldier on...\n");
116 }
117
118 if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION) {
119 printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM version "
120 "%d, wanted version %d, attempting to soldier on...\n",
121 (unsigned int)lasat_board_info.li_eeprom_info.version,
122 LASAT_EEPROM_VERSION);
123 }
124
125 cfg0 = lasat_board_info.li_eeprom_info.cfg[0];
126 cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
127
128 if (LASAT_W0_DSCTYPE(cfg0) != 1) {
129 printk(KERN_WARNING "WARNING...\nWARNING...\n"
130 "Invalid configuration read from EEPROM, attempting to "
131 "soldier on...");
132 }
133 /* We have a valid configuration */
134
135 switch (LASAT_W0_SDRAMBANKSZ(cfg0)) {
136 case 0:
137 lasat_board_info.li_memsize = 0x0800000;
138 break;
139 case 1:
140 lasat_board_info.li_memsize = 0x1000000;
141 break;
142 case 2:
143 lasat_board_info.li_memsize = 0x2000000;
144 break;
145 case 3:
146 lasat_board_info.li_memsize = 0x4000000;
147 break;
148 case 4:
149 lasat_board_info.li_memsize = 0x8000000;
150 break;
151 default:
152 lasat_board_info.li_memsize = 0;
153 }
154
155 switch (LASAT_W0_SDRAMBANKS(cfg0)) {
156 case 0:
157 break;
158 case 1:
159 lasat_board_info.li_memsize *= 2;
160 break;
161 default:
162 break;
163 }
164
165 switch (LASAT_W0_BUSSPEED(cfg0)) {
166 case 0x0:
167 lasat_board_info.li_bus_hz = 60000000;
168 break;
169 case 0x1:
170 lasat_board_info.li_bus_hz = 66000000;
171 break;
172 case 0x2:
173 lasat_board_info.li_bus_hz = 66666667;
174 break;
175 case 0x3:
176 lasat_board_info.li_bus_hz = 80000000;
177 break;
178 case 0x4:
179 lasat_board_info.li_bus_hz = 83333333;
180 break;
181 case 0x5:
182 lasat_board_info.li_bus_hz = 100000000;
183 break;
184 }
185
186 switch (LASAT_W0_CPUCLK(cfg0)) {
187 case 0x0:
188 lasat_board_info.li_cpu_hz =
189 lasat_board_info.li_bus_hz;
190 break;
191 case 0x1:
192 lasat_board_info.li_cpu_hz =
193 lasat_board_info.li_bus_hz +
194 (lasat_board_info.li_bus_hz >> 1);
195 break;
196 case 0x2:
197 lasat_board_info.li_cpu_hz =
198 lasat_board_info.li_bus_hz +
199 lasat_board_info.li_bus_hz;
200 break;
201 case 0x3:
202 lasat_board_info.li_cpu_hz =
203 lasat_board_info.li_bus_hz +
204 lasat_board_info.li_bus_hz +
205 (lasat_board_info.li_bus_hz >> 1);
206 break;
207 case 0x4:
208 lasat_board_info.li_cpu_hz =
209 lasat_board_info.li_bus_hz +
210 lasat_board_info.li_bus_hz +
211 lasat_board_info.li_bus_hz;
212 break;
213 }
214
215 /* Flash size */
216 switch (LASAT_W1_FLASHSIZE(cfg1)) {
217 case 0:
218 lasat_board_info.li_flash_size = 0x200000;
219 break;
220 case 1:
221 lasat_board_info.li_flash_size = 0x400000;
222 break;
223 case 2:
224 lasat_board_info.li_flash_size = 0x800000;
225 break;
226 case 3:
227 lasat_board_info.li_flash_size = 0x1000000;
228 break;
229 case 4:
230 lasat_board_info.li_flash_size = 0x2000000;
231 break;
232 }
233
234 init_flash_sizes();
235
236 lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0);
237 lasat_board_info.li_prid = lasat_board_info.li_eeprom_info.prid;
238 if (lasat_board_info.li_prid == 0xffff || lasat_board_info.li_prid == 0)
239 lasat_board_info.li_prid = lasat_board_info.li_bmid;
240
241 /* Base model stuff */
242 if (lasat_board_info.li_bmid > i_n_base_models)
243 lasat_board_info.li_bmid = i_n_base_models;
244 strcpy(lasat_board_info.li_bmstr,
245 i_txt_base_models[lasat_board_info.li_bmid]);
246
247 /* Product ID dependent values */
248 c = lasat_board_info.li_prid;
249 if (c >= i_n_prids) {
250 strcpy(lasat_board_info.li_namestr, "Unknown Model");
251 strcpy(lasat_board_info.li_typestr, "Unknown Type");
252 } else {
253 ppi = &vendor_info_table[0].vi_product_info[c];
254 strcpy(lasat_board_info.li_namestr, ppi->pi_name);
255 if (ppi->pi_type)
256 strcpy(lasat_board_info.li_typestr, ppi->pi_type);
257 else
258 sprintf(lasat_board_info.li_typestr, "%d", 10 * c);
259 }
260
261#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
262 update_bcastaddr();
263#endif
264
265 return 0;
266}
267
268void lasat_write_eeprom_info(void)
269{
270 unsigned long crc;
271
272 /* Generate the CRC */
273 crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
274 sizeof(struct lasat_eeprom_struct) - 4);
275 lasat_board_info.li_eeprom_info.crc32 = crc;
276
277 /* Write the EEPROM info */
278 EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
279 sizeof(struct lasat_eeprom_struct));
280}
diff --git a/arch/mips/lasat/lasat_models.h b/arch/mips/lasat/lasat_models.h
new file mode 100644
index 000000000000..e1cbd26ae1b3
--- /dev/null
+++ b/arch/mips/lasat/lasat_models.h
@@ -0,0 +1,67 @@
1/*
2 * Model description tables
3 */
4#include <linux/kernel.h>
5
6struct product_info {
7 const char *pi_name;
8 const char *pi_type;
9};
10
11struct vendor_info {
12 const char *vi_name;
13 const struct product_info *vi_product_info;
14};
15
16/*
17 * Base models
18 */
19static const char * const txt_base_models[] = {
20 "MQ 2", "MQ Pro", "SP 25", "SP 50", "SP 100", "SP 5000", "SP 7000",
21 "SP 1000", "Unknown"
22};
23#define N_BASE_MODELS (ARRAY_SIZE(txt_base_models) - 1)
24
25/*
26 * Eicon Networks
27 */
28static const char txt_en_mq[] = "Masquerade";
29static const char txt_en_sp[] = "Safepipe";
30
31static const struct product_info product_info_eicon[] = {
32 { txt_en_mq, "II" }, /* 0 */
33 { txt_en_mq, "Pro" }, /* 1 */
34 { txt_en_sp, "25" }, /* 2 */
35 { txt_en_sp, "50" }, /* 3 */
36 { txt_en_sp, "100" }, /* 4 */
37 { txt_en_sp, "5000" }, /* 5 */
38 { txt_en_sp, "7000" }, /* 6 */
39 { txt_en_sp, "30" }, /* 7 */
40 { txt_en_sp, "5100" }, /* 8 */
41 { txt_en_sp, "7100" }, /* 9 */
42 { txt_en_sp, "1110" }, /* 10 */
43 { txt_en_sp, "3020" }, /* 11 */
44 { txt_en_sp, "3030" }, /* 12 */
45 { txt_en_sp, "5020" }, /* 13 */
46 { txt_en_sp, "5030" }, /* 14 */
47 { txt_en_sp, "1120" }, /* 15 */
48 { txt_en_sp, "1130" }, /* 16 */
49 { txt_en_sp, "6010" }, /* 17 */
50 { txt_en_sp, "6110" }, /* 18 */
51 { txt_en_sp, "6210" }, /* 19 */
52 { txt_en_sp, "1020" }, /* 20 */
53 { txt_en_sp, "1040" }, /* 21 */
54 { txt_en_sp, "1050" }, /* 22 */
55 { txt_en_sp, "1060" }, /* 23 */
56};
57
58#define N_PRIDS ARRAY_SIZE(product_info_eicon)
59
60/*
61 * The vendor table
62 */
63static struct vendor_info const vendor_info_table[] = {
64 { "Eicon Networks", product_info_eicon },
65};
66
67#define N_VENDORS ARRAY_SIZE(vendor_info_table)
diff --git a/arch/mips/lasat/picvue.c b/arch/mips/lasat/picvue.c
new file mode 100644
index 000000000000..6471d0663fd8
--- /dev/null
+++ b/arch/mips/lasat/picvue.c
@@ -0,0 +1,244 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/delay.h>
9#include <asm/bootinfo.h>
10#include <asm/lasat/lasat.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/string.h>
15
16#include "picvue.h"
17
18#define PVC_BUSY 0x80
19#define PVC_NLINES 2
20#define PVC_DISPMEM 80
21#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
22
23struct pvc_defs *picvue;
24
25DECLARE_MUTEX(pvc_sem);
26
27static void pvc_reg_write(u32 val)
28{
29 *picvue->reg = val;
30}
31
32static u32 pvc_reg_read(void)
33{
34 u32 tmp = *picvue->reg;
35 return tmp;
36}
37
38static void pvc_write_byte(u32 data, u8 byte)
39{
40 data |= picvue->e;
41 pvc_reg_write(data);
42 data &= ~picvue->data_mask;
43 data |= byte << picvue->data_shift;
44 pvc_reg_write(data);
45 ndelay(220);
46 pvc_reg_write(data & ~picvue->e);
47 ndelay(220);
48}
49
50static u8 pvc_read_byte(u32 data)
51{
52 u8 byte;
53
54 data |= picvue->e;
55 pvc_reg_write(data);
56 ndelay(220);
57 byte = (pvc_reg_read() & picvue->data_mask) >> picvue->data_shift;
58 data &= ~picvue->e;
59 pvc_reg_write(data);
60 ndelay(220);
61 return byte;
62}
63
64static u8 pvc_read_data(void)
65{
66 u32 data = pvc_reg_read();
67 u8 byte;
68 data |= picvue->rw;
69 data &= ~picvue->rs;
70 pvc_reg_write(data);
71 ndelay(40);
72 byte = pvc_read_byte(data);
73 data |= picvue->rs;
74 pvc_reg_write(data);
75 return byte;
76}
77
78#define TIMEOUT 1000
79static int pvc_wait(void)
80{
81 int i = TIMEOUT;
82 int err = 0;
83
84 while ((pvc_read_data() & PVC_BUSY) && i)
85 i--;
86 if (i == 0)
87 err = -ETIME;
88
89 return err;
90}
91
92#define MODE_INST 0
93#define MODE_DATA 1
94static void pvc_write(u8 byte, int mode)
95{
96 u32 data = pvc_reg_read();
97 data &= ~picvue->rw;
98 if (mode == MODE_DATA)
99 data |= picvue->rs;
100 else
101 data &= ~picvue->rs;
102 pvc_reg_write(data);
103 ndelay(40);
104 pvc_write_byte(data, byte);
105 if (mode == MODE_DATA)
106 data &= ~picvue->rs;
107 else
108 data |= picvue->rs;
109 pvc_reg_write(data);
110 pvc_wait();
111}
112
113void pvc_write_string(const unsigned char *str, u8 addr, int line)
114{
115 int i = 0;
116
117 if (line > 0 && (PVC_NLINES > 1))
118 addr += 0x40 * line;
119 pvc_write(0x80 | addr, MODE_INST);
120
121 while (*str != 0 && i < PVC_LINELEN) {
122 pvc_write(*str++, MODE_DATA);
123 i++;
124 }
125}
126
127void pvc_write_string_centered(const unsigned char *str, int line)
128{
129 int len = strlen(str);
130 u8 addr;
131
132 if (len > PVC_VISIBLE_CHARS)
133 addr = 0;
134 else
135 addr = (PVC_VISIBLE_CHARS - strlen(str))/2;
136
137 pvc_write_string(str, addr, line);
138}
139
140void pvc_dump_string(const unsigned char *str)
141{
142 int len = strlen(str);
143
144 pvc_write_string(str, 0, 0);
145 if (len > PVC_VISIBLE_CHARS)
146 pvc_write_string(&str[PVC_VISIBLE_CHARS], 0, 1);
147}
148
149#define BM_SIZE 8
150#define MAX_PROGRAMMABLE_CHARS 8
151int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE])
152{
153 int i;
154 int addr;
155
156 if (charnum > MAX_PROGRAMMABLE_CHARS)
157 return -ENOENT;
158
159 addr = charnum * 8;
160 pvc_write(0x40 | addr, MODE_INST);
161
162 for (i = 0; i < BM_SIZE; i++)
163 pvc_write(bitmap[i], MODE_DATA);
164 return 0;
165}
166
167#define FUNC_SET_CMD 0x20
168#define EIGHT_BYTE (1 << 4)
169#define FOUR_BYTE 0
170#define TWO_LINES (1 << 3)
171#define ONE_LINE 0
172#define LARGE_FONT (1 << 2)
173#define SMALL_FONT 0
174
175static void pvc_funcset(u8 cmd)
176{
177 pvc_write(FUNC_SET_CMD | (cmd & (EIGHT_BYTE|TWO_LINES|LARGE_FONT)),
178 MODE_INST);
179}
180
181#define ENTRYMODE_CMD 0x4
182#define AUTO_INC (1 << 1)
183#define AUTO_DEC 0
184#define CURSOR_FOLLOWS_DISP (1 << 0)
185
186static void pvc_entrymode(u8 cmd)
187{
188 pvc_write(ENTRYMODE_CMD | (cmd & (AUTO_INC|CURSOR_FOLLOWS_DISP)),
189 MODE_INST);
190}
191
192#define DISP_CNT_CMD 0x08
193#define DISP_OFF 0
194#define DISP_ON (1 << 2)
195#define CUR_ON (1 << 1)
196#define CUR_BLINK (1 << 0)
197void pvc_dispcnt(u8 cmd)
198{
199 pvc_write(DISP_CNT_CMD | (cmd & (DISP_ON|CUR_ON|CUR_BLINK)), MODE_INST);
200}
201
202#define MOVE_CMD 0x10
203#define DISPLAY (1 << 3)
204#define CURSOR 0
205#define RIGHT (1 << 2)
206#define LEFT 0
207void pvc_move(u8 cmd)
208{
209 pvc_write(MOVE_CMD | (cmd & (DISPLAY|RIGHT)), MODE_INST);
210}
211
212#define CLEAR_CMD 0x1
213void pvc_clear(void)
214{
215 pvc_write(CLEAR_CMD, MODE_INST);
216}
217
218#define HOME_CMD 0x2
219void pvc_home(void)
220{
221 pvc_write(HOME_CMD, MODE_INST);
222}
223
224int pvc_init(void)
225{
226 u8 cmd = EIGHT_BYTE;
227
228 if (PVC_NLINES == 2)
229 cmd |= (SMALL_FONT|TWO_LINES);
230 else
231 cmd |= (LARGE_FONT|ONE_LINE);
232 pvc_funcset(cmd);
233 pvc_dispcnt(DISP_ON);
234 pvc_entrymode(AUTO_INC);
235
236 pvc_clear();
237 pvc_write_string_centered("Display", 0);
238 pvc_write_string_centered("Initialized", 1);
239
240 return 0;
241}
242
243module_init(pvc_init);
244MODULE_LICENSE("GPL");
diff --git a/arch/mips/lasat/picvue.h b/arch/mips/lasat/picvue.h
new file mode 100644
index 000000000000..2a96bf971897
--- /dev/null
+++ b/arch/mips/lasat/picvue.h
@@ -0,0 +1,48 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <asm/semaphore.h>
8
9struct pvc_defs {
10 volatile u32 *reg;
11 u32 data_shift;
12 u32 data_mask;
13 u32 e;
14 u32 rw;
15 u32 rs;
16};
17
18extern struct pvc_defs *picvue;
19
20#define PVC_NLINES 2
21#define PVC_DISPMEM 80
22#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
23#define PVC_VISIBLE_CHARS 16
24
25void pvc_write_string(const unsigned char *str, u8 addr, int line);
26void pvc_write_string_centered(const unsigned char *str, int line);
27void pvc_dump_string(const unsigned char *str);
28
29#define BM_SIZE 8
30#define MAX_PROGRAMMABLE_CHARS 8
31int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE]);
32
33void pvc_dispcnt(u8 cmd);
34#define DISP_OFF 0
35#define DISP_ON (1 << 2)
36#define CUR_ON (1 << 1)
37#define CUR_BLINK (1 << 0)
38
39void pvc_move(u8 cmd);
40#define DISPLAY (1 << 3)
41#define CURSOR 0
42#define RIGHT (1 << 2)
43#define LEFT 0
44
45void pvc_clear(void);
46void pvc_home(void);
47
48extern struct semaphore pvc_sem;
diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c
new file mode 100644
index 000000000000..9947c1525822
--- /dev/null
+++ b/arch/mips/lasat/picvue_proc.c
@@ -0,0 +1,191 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/init.h>
10#include <linux/errno.h>
11
12#include <linux/proc_fs.h>
13#include <linux/interrupt.h>
14
15#include <linux/timer.h>
16
17#include "picvue.h"
18
19static char pvc_lines[PVC_NLINES][PVC_LINELEN+1];
20static int pvc_linedata[PVC_NLINES];
21static struct proc_dir_entry *pvc_display_dir;
22static char *pvc_linename[PVC_NLINES] = {"line1", "line2"};
23#define DISPLAY_DIR_NAME "display"
24static int scroll_dir, scroll_interval;
25
26static struct timer_list timer;
27
28static void pvc_display(unsigned long data)
29{
30 int i;
31
32 pvc_clear();
33 for (i = 0; i < PVC_NLINES; i++)
34 pvc_write_string(pvc_lines[i], 0, i);
35}
36
37static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0);
38
39static int pvc_proc_read_line(char *page, char **start,
40 off_t off, int count,
41 int *eof, void *data)
42{
43 char *origpage = page;
44 int lineno = *(int *)data;
45
46 if (lineno < 0 || lineno > PVC_NLINES) {
47 printk(KERN_WARNING "proc_read_line: invalid lineno %d\n", lineno);
48 return 0;
49 }
50
51 down(&pvc_sem);
52 page += sprintf(page, "%s\n", pvc_lines[lineno]);
53 up(&pvc_sem);
54
55 return page - origpage;
56}
57
58static int pvc_proc_write_line(struct file *file, const char *buffer,
59 unsigned long count, void *data)
60{
61 int origcount = count;
62 int lineno = *(int *)data;
63
64 if (lineno < 0 || lineno > PVC_NLINES) {
65 printk(KERN_WARNING "proc_write_line: invalid lineno %d\n",
66 lineno);
67 return origcount;
68 }
69
70 if (count > PVC_LINELEN)
71 count = PVC_LINELEN;
72
73 if (buffer[count-1] == '\n')
74 count--;
75
76 down(&pvc_sem);
77 strncpy(pvc_lines[lineno], buffer, count);
78 pvc_lines[lineno][count] = '\0';
79 up(&pvc_sem);
80
81 tasklet_schedule(&pvc_display_tasklet);
82
83 return origcount;
84}
85
86static int pvc_proc_write_scroll(struct file *file, const char *buffer,
87 unsigned long count, void *data)
88{
89 int origcount = count;
90 int cmd = simple_strtol(buffer, NULL, 10);
91
92 down(&pvc_sem);
93 if (scroll_interval != 0)
94 del_timer(&timer);
95
96 if (cmd == 0) {
97 scroll_dir = 0;
98 scroll_interval = 0;
99 } else {
100 if (cmd < 0) {
101 scroll_dir = -1;
102 scroll_interval = -cmd;
103 } else {
104 scroll_dir = 1;
105 scroll_interval = cmd;
106 }
107 add_timer(&timer);
108 }
109 up(&pvc_sem);
110
111 return origcount;
112}
113
114static int pvc_proc_read_scroll(char *page, char **start,
115 off_t off, int count,
116 int *eof, void *data)
117{
118 char *origpage = page;
119
120 down(&pvc_sem);
121 page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
122 up(&pvc_sem);
123
124 return page - origpage;
125}
126
127
128void pvc_proc_timerfunc(unsigned long data)
129{
130 if (scroll_dir < 0)
131 pvc_move(DISPLAY|RIGHT);
132 else if (scroll_dir > 0)
133 pvc_move(DISPLAY|LEFT);
134
135 timer.expires = jiffies + scroll_interval;
136 add_timer(&timer);
137}
138
139static void pvc_proc_cleanup(void)
140{
141 int i;
142 for (i = 0; i < PVC_NLINES; i++)
143 remove_proc_entry(pvc_linename[i], pvc_display_dir);
144 remove_proc_entry("scroll", pvc_display_dir);
145 remove_proc_entry(DISPLAY_DIR_NAME, NULL);
146
147 del_timer(&timer);
148}
149
150static int __init pvc_proc_init(void)
151{
152 struct proc_dir_entry *proc_entry;
153 int i;
154
155 pvc_display_dir = proc_mkdir(DISPLAY_DIR_NAME, NULL);
156 if (pvc_display_dir == NULL)
157 goto error;
158
159 for (i = 0; i < PVC_NLINES; i++) {
160 strcpy(pvc_lines[i], "");
161 pvc_linedata[i] = i;
162 }
163 for (i = 0; i < PVC_NLINES; i++) {
164 proc_entry = create_proc_entry(pvc_linename[i], 0644,
165 pvc_display_dir);
166 if (proc_entry == NULL)
167 goto error;
168
169 proc_entry->read_proc = pvc_proc_read_line;
170 proc_entry->write_proc = pvc_proc_write_line;
171 proc_entry->data = &pvc_linedata[i];
172 }
173 proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir);
174 if (proc_entry == NULL)
175 goto error;
176
177 proc_entry->write_proc = pvc_proc_write_scroll;
178 proc_entry->read_proc = pvc_proc_read_scroll;
179
180 init_timer(&timer);
181 timer.function = pvc_proc_timerfunc;
182
183 return 0;
184error:
185 pvc_proc_cleanup();
186 return -ENOMEM;
187}
188
189module_init(pvc_proc_init);
190module_exit(pvc_proc_cleanup);
191MODULE_LICENSE("GPL");
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
new file mode 100644
index 000000000000..209edcc26f07
--- /dev/null
+++ b/arch/mips/lasat/prom.c
@@ -0,0 +1,126 @@
1/*
2 * PROM interface routines.
3 */
4#include <linux/types.h>
5#include <linux/init.h>
6#include <linux/string.h>
7#include <linux/ctype.h>
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/bootmem.h>
11#include <linux/ioport.h>
12#include <asm/bootinfo.h>
13#include <asm/lasat/lasat.h>
14#include <asm/cpu.h>
15
16#include "at93c.h"
17#include <asm/lasat/eeprom.h>
18#include "prom.h"
19
20#define RESET_VECTOR 0xbfc00000
21#define PROM_JUMP_TABLE_ENTRY(n) (*((u32 *)(RESET_VECTOR + 0x20) + n))
22#define PROM_DISPLAY_ADDR PROM_JUMP_TABLE_ENTRY(0)
23#define PROM_PUTC_ADDR PROM_JUMP_TABLE_ENTRY(1)
24#define PROM_MONITOR_ADDR PROM_JUMP_TABLE_ENTRY(2)
25
26static void null_prom_display(const char *string, int pos, int clear)
27{
28}
29
30static void null_prom_monitor(void)
31{
32}
33
34static void null_prom_putc(char c)
35{
36}
37
38/* these are functions provided by the bootloader */
39static void (*__prom_putc)(char c) = null_prom_putc;
40
41void prom_putchar(char c)
42{
43 __prom_putc(c);
44}
45
46void (*prom_display)(const char *string, int pos, int clear) =
47 null_prom_display;
48void (*prom_monitor)(void) = null_prom_monitor;
49
50unsigned int lasat_ndelay_divider;
51
52static void setup_prom_vectors(void)
53{
54 u32 version = *(u32 *)(RESET_VECTOR + 0x90);
55
56 if (version >= 307) {
57 prom_display = (void *)PROM_DISPLAY_ADDR;
58 __prom_putc = (void *)PROM_PUTC_ADDR;
59 prom_monitor = (void *)PROM_MONITOR_ADDR;
60 }
61 printk(KERN_DEBUG "prom vectors set up\n");
62}
63
64static struct at93c_defs at93c_defs[N_MACHTYPES] = {
65 {
66 .reg = (void *)AT93C_REG_100,
67 .rdata_reg = (void *)AT93C_RDATA_REG_100,
68 .rdata_shift = AT93C_RDATA_SHIFT_100,
69 .wdata_shift = AT93C_WDATA_SHIFT_100,
70 .cs = AT93C_CS_M_100,
71 .clk = AT93C_CLK_M_100
72 }, {
73 .reg = (void *)AT93C_REG_200,
74 .rdata_reg = (void *)AT93C_RDATA_REG_200,
75 .rdata_shift = AT93C_RDATA_SHIFT_200,
76 .wdata_shift = AT93C_WDATA_SHIFT_200,
77 .cs = AT93C_CS_M_200,
78 .clk = AT93C_CLK_M_200
79 },
80};
81
82void __init prom_init(void)
83{
84 int argc = fw_arg0;
85 char **argv = (char **) fw_arg1;
86
87 setup_prom_vectors();
88
89 if (current_cpu_data.cputype == CPU_R5000) {
90 printk(KERN_INFO "LASAT 200 board\n");
91 mips_machtype = MACH_LASAT_200;
92 lasat_ndelay_divider = LASAT_200_DIVIDER;
93 } else {
94 printk(KERN_INFO "LASAT 100 board\n");
95 mips_machtype = MACH_LASAT_100;
96 lasat_ndelay_divider = LASAT_100_DIVIDER;
97 }
98
99 at93c = &at93c_defs[mips_machtype];
100
101 lasat_init_board_info(); /* Read info from EEPROM */
102
103 /* Get the command line */
104 if (argc > 0) {
105 strncpy(arcs_cmdline, argv[0], CL_SIZE-1);
106 arcs_cmdline[CL_SIZE-1] = '\0';
107 }
108
109 /* Set the I/O base address */
110 set_io_port_base(KSEG1);
111
112 /* Set memory regions */
113 ioport_resource.start = 0;
114 ioport_resource.end = 0xffffffff; /* Wrong, fixme. */
115
116 add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
117}
118
119void __init prom_free_prom_memory(void)
120{
121}
122
123const char *get_system_type(void)
124{
125 return lasat_board_info.li_bmstr;
126}
diff --git a/arch/mips/lasat/prom.h b/arch/mips/lasat/prom.h
new file mode 100644
index 000000000000..337acbc27442
--- /dev/null
+++ b/arch/mips/lasat/prom.h
@@ -0,0 +1,7 @@
1#ifndef __PROM_H
2#define __PROM_H
3
4extern void (*prom_display)(const char *string, int pos, int clear);
5extern void (*prom_monitor)(void);
6
7#endif /* __PROM_H */
diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
new file mode 100644
index 000000000000..b1e7a89fb730
--- /dev/null
+++ b/arch/mips/lasat/reset.c
@@ -0,0 +1,61 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Reset the LASAT board.
19 */
20#include <linux/kernel.h>
21#include <linux/pm.h>
22
23#include <asm/reboot.h>
24#include <asm/system.h>
25#include <asm/lasat/lasat.h>
26
27#include "picvue.h"
28#include "prom.h"
29
30static void lasat_machine_restart(char *command);
31static void lasat_machine_halt(void);
32
33/* Used to set machine to boot in service mode via /proc interface */
34int lasat_boot_to_service;
35
36static void lasat_machine_restart(char *command)
37{
38 local_irq_disable();
39
40 if (lasat_boot_to_service) {
41 *(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
42 *(volatile unsigned int *)0xa00000fc = 0xfedeabba;
43 }
44 *lasat_misc->reset_reg = 0xbedead;
45 for (;;) ;
46}
47
48static void lasat_machine_halt(void)
49{
50 local_irq_disable();
51
52 prom_monitor();
53 for (;;) ;
54}
55
56void lasat_reboot_setup(void)
57{
58 _machine_restart = lasat_machine_restart;
59 _machine_halt = lasat_machine_halt;
60 pm_power_off = lasat_machine_halt;
61}
diff --git a/arch/mips/lasat/serial.c b/arch/mips/lasat/serial.c
new file mode 100644
index 000000000000..205bd397d75b
--- /dev/null
+++ b/arch/mips/lasat/serial.c
@@ -0,0 +1,94 @@
1/*
2 * Registration of Lasat UART platform device.
3 *
4 * Copyright (C) 2007 Brian Murphy <brian@murphy.dk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24#include <linux/serial_8250.h>
25
26#include <asm/bootinfo.h>
27#include <asm/lasat/lasat.h>
28#include <asm/lasat/serial.h>
29
30static struct resource lasat_serial_res[2] __initdata;
31
32static struct plat_serial8250_port lasat_serial8250_port[] = {
33 {
34 .iotype = UPIO_MEM,
35 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
36 UPF_SKIP_TEST,
37 },
38 {},
39};
40
41static __init int lasat_uart_add(void)
42{
43 struct platform_device *pdev;
44 int retval;
45
46 pdev = platform_device_alloc("serial8250", -1);
47 if (!pdev)
48 return -ENOMEM;
49
50 if (mips_machtype == MACH_LASAT_100) {
51 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
52 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
53 lasat_serial_res[0].flags = IORESOURCE_MEM;
54 lasat_serial_res[1].start = LASATINT_UART_100;
55 lasat_serial_res[1].end = LASATINT_UART_100;
56 lasat_serial_res[1].flags = IORESOURCE_IRQ;
57
58 lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_100;
59 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_100 * 16;
60 lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_100;
61 lasat_serial8250_port[0].irq = LASATINT_UART_100;
62 } else {
63 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_200);
64 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_200 * 8 - 1;
65 lasat_serial_res[0].flags = IORESOURCE_MEM;
66 lasat_serial_res[1].start = LASATINT_UART_200;
67 lasat_serial_res[1].end = LASATINT_UART_200;
68 lasat_serial_res[1].flags = IORESOURCE_IRQ;
69
70 lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_200;
71 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_200 * 16;
72 lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_200;
73 lasat_serial8250_port[0].irq = LASATINT_UART_200;
74 }
75
76 pdev->id = PLAT8250_DEV_PLATFORM;
77 pdev->dev.platform_data = lasat_serial8250_port;
78
79 retval = platform_device_add_resources(pdev, lasat_serial_res, ARRAY_SIZE(lasat_serial_res));
80 if (retval)
81 goto err_free_device;
82
83 retval = platform_device_add(pdev);
84 if (retval)
85 goto err_free_device;
86
87 return 0;
88
89err_free_device:
90 platform_device_put(pdev);
91
92 return retval;
93}
94device_initcall(lasat_uart_add);
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
new file mode 100644
index 000000000000..54827d0174bf
--- /dev/null
+++ b/arch/mips/lasat/setup.c
@@ -0,0 +1,154 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved.
4 *
5 * Thomas Horsten <thh@lasat.com>
6 * Copyright (C) 2000 LASAT Networks A/S.
7 *
8 * Brian Murphy <brian@murphy.dk>
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 *
23 * Lasat specific setup.
24 */
25#include <linux/init.h>
26#include <linux/sched.h>
27#include <linux/pci.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30
31#include <asm/time.h>
32#include <asm/cpu.h>
33#include <asm/bootinfo.h>
34#include <asm/irq.h>
35#include <asm/lasat/lasat.h>
36#include <asm/lasat/serial.h>
37
38#ifdef CONFIG_PICVUE
39#include <linux/notifier.h>
40#endif
41
42#include "ds1603.h"
43#include <asm/lasat/ds1603.h>
44#include <asm/lasat/picvue.h>
45#include <asm/lasat/eeprom.h>
46
47#include "prom.h"
48
49int lasat_command_line;
50void lasatint_init(void);
51
52extern void lasat_reboot_setup(void);
53extern void pcisetup(void);
54extern void edhac_init(void *, void *, void *);
55extern void addrflt_init(void);
56
57struct lasat_misc lasat_misc_info[N_MACHTYPES] = {
58 {
59 .reset_reg = (void *)KSEG1ADDR(0x1c840000),
60 .flash_wp_reg = (void *)KSEG1ADDR(0x1c800000), 2
61 }, {
62 .reset_reg = (void *)KSEG1ADDR(0x11080000),
63 .flash_wp_reg = (void *)KSEG1ADDR(0x11000000), 6
64 }
65};
66
67struct lasat_misc *lasat_misc;
68
69#ifdef CONFIG_DS1603
70static struct ds_defs ds_defs[N_MACHTYPES] = {
71 { (void *)DS1603_REG_100, (void *)DS1603_REG_100,
72 DS1603_RST_100, DS1603_CLK_100, DS1603_DATA_100,
73 DS1603_DATA_SHIFT_100, 0, 0 },
74 { (void *)DS1603_REG_200, (void *)DS1603_DATA_REG_200,
75 DS1603_RST_200, DS1603_CLK_200, DS1603_DATA_200,
76 DS1603_DATA_READ_SHIFT_200, 1, 2000 }
77};
78#endif
79
80#ifdef CONFIG_PICVUE
81#include "picvue.h"
82static struct pvc_defs pvc_defs[N_MACHTYPES] = {
83 { (void *)PVC_REG_100, PVC_DATA_SHIFT_100, PVC_DATA_M_100,
84 PVC_E_100, PVC_RW_100, PVC_RS_100 },
85 { (void *)PVC_REG_200, PVC_DATA_SHIFT_200, PVC_DATA_M_200,
86 PVC_E_200, PVC_RW_200, PVC_RS_200 }
87};
88#endif
89
90static int lasat_panic_display(struct notifier_block *this,
91 unsigned long event, void *ptr)
92{
93#ifdef CONFIG_PICVUE
94 unsigned char *string = ptr;
95 if (string == NULL)
96 string = "Kernel Panic";
97 pvc_dump_string(string);
98#endif
99 return NOTIFY_DONE;
100}
101
102static int lasat_panic_prom_monitor(struct notifier_block *this,
103 unsigned long event, void *ptr)
104{
105 prom_monitor();
106 return NOTIFY_DONE;
107}
108
109static struct notifier_block lasat_panic_block[] =
110{
111 {
112 .notifier_call = lasat_panic_display,
113 .priority = INT_MAX
114 }, {
115 .notifier_call = lasat_panic_prom_monitor,
116 .priority = INT_MIN
117 }
118};
119
120void plat_time_init(void)
121{
122 mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2;
123}
124
125void __init plat_timer_setup(struct irqaction *irq)
126{
127 change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
128}
129
130void __init plat_mem_setup(void)
131{
132 int i;
133 lasat_misc = &lasat_misc_info[mips_machtype];
134#ifdef CONFIG_PICVUE
135 picvue = &pvc_defs[mips_machtype];
136#endif
137
138 /* Set up panic notifier */
139 for (i = 0; i < ARRAY_SIZE(lasat_panic_block); i++)
140 atomic_notifier_chain_register(&panic_notifier_list,
141 &lasat_panic_block[i]);
142
143 lasat_reboot_setup();
144
145#ifdef CONFIG_DS1603
146 ds1603 = &ds_defs[mips_machtype];
147#endif
148
149#ifdef DYNAMIC_SERIAL_INIT
150 serial_init();
151#endif
152
153 pr_info("Lasat specific initialization complete\n");
154}
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
new file mode 100644
index 000000000000..389336c4ecc5
--- /dev/null
+++ b/arch/mips/lasat/sysctl.c
@@ -0,0 +1,456 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines specific to the LASAT boards
19 */
20#include <linux/types.h>
21#include <asm/lasat/lasat.h>
22
23#include <linux/module.h>
24#include <linux/sysctl.h>
25#include <linux/stddef.h>
26#include <linux/init.h>
27#include <linux/fs.h>
28#include <linux/ctype.h>
29#include <linux/string.h>
30#include <linux/net.h>
31#include <linux/inet.h>
32#include <linux/mutex.h>
33#include <linux/uaccess.h>
34
35#include <asm/time.h>
36
37#include "sysctl.h"
38#include "ds1603.h"
39
40static DEFINE_MUTEX(lasat_info_mutex);
41
42/* Strategy function to write EEPROM after changing string entry */
43int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
44 void *oldval, size_t *oldlenp,
45 void *newval, size_t newlen)
46{
47 int r;
48
49 mutex_lock(&lasat_info_mutex);
50 r = sysctl_string(table, name,
51 nlen, oldval, oldlenp, newval, newlen);
52 if (r < 0) {
53 mutex_unlock(&lasat_info_mutex);
54 return r;
55 }
56 if (newval && newlen)
57 lasat_write_eeprom_info();
58 mutex_unlock(&lasat_info_mutex);
59
60 return 1;
61}
62
63
64/* And the same for proc */
65int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
66 void *buffer, size_t *lenp, loff_t *ppos)
67{
68 int r;
69
70 mutex_lock(&lasat_info_mutex);
71 r = proc_dostring(table, write, filp, buffer, lenp, ppos);
72 if ((!write) || r) {
73 mutex_unlock(&lasat_info_mutex);
74 return r;
75 }
76 lasat_write_eeprom_info();
77 mutex_unlock(&lasat_info_mutex);
78
79 return 0;
80}
81
82/* proc function to write EEPROM after changing int entry */
83int proc_dolasatint(ctl_table *table, int write, struct file *filp,
84 void *buffer, size_t *lenp, loff_t *ppos)
85{
86 int r;
87
88 mutex_lock(&lasat_info_mutex);
89 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
90 if ((!write) || r) {
91 mutex_unlock(&lasat_info_mutex);
92 return r;
93 }
94 lasat_write_eeprom_info();
95 mutex_unlock(&lasat_info_mutex);
96
97 return 0;
98}
99
100static int rtctmp;
101
102#ifdef CONFIG_DS1603
103/* proc function to read/write RealTime Clock */
104int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
105 void *buffer, size_t *lenp, loff_t *ppos)
106{
107 int r;
108
109 mutex_lock(&lasat_info_mutex);
110 if (!write) {
111 rtctmp = read_persistent_clock();
112 /* check for time < 0 and set to 0 */
113 if (rtctmp < 0)
114 rtctmp = 0;
115 }
116 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
117 if ((!write) || r) {
118 mutex_unlock(&lasat_info_mutex);
119 return r;
120 }
121 rtc_mips_set_mmss(rtctmp);
122 mutex_unlock(&lasat_info_mutex);
123
124 return 0;
125}
126#endif
127
128/* Sysctl for setting the IP addresses */
129int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen,
130 void *oldval, size_t *oldlenp,
131 void *newval, size_t newlen)
132{
133 int r;
134
135 mutex_lock(&lasat_info_mutex);
136 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
137 if (r < 0) {
138 mutex_unlock(&lasat_info_mutex);
139 return r;
140 }
141 if (newval && newlen)
142 lasat_write_eeprom_info();
143 mutex_unlock(&lasat_info_mutex);
144
145 return 1;
146}
147
148#ifdef CONFIG_DS1603
149/* Same for RTC */
150int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen,
151 void *oldval, size_t *oldlenp,
152 void *newval, size_t newlen)
153{
154 int r;
155
156 mutex_lock(&lasat_info_mutex);
157 rtctmp = read_persistent_clock();
158 if (rtctmp < 0)
159 rtctmp = 0;
160 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
161 if (r < 0) {
162 mutex_unlock(&lasat_info_mutex);
163 return r;
164 }
165 if (newval && newlen)
166 rtc_mips_set_mmss(rtctmp);
167 mutex_unlock(&lasat_info_mutex);
168
169 return 1;
170}
171#endif
172
173#ifdef CONFIG_INET
174static char lasat_bcastaddr[16];
175
176void update_bcastaddr(void)
177{
178 unsigned int ip;
179
180 ip = (lasat_board_info.li_eeprom_info.ipaddr &
181 lasat_board_info.li_eeprom_info.netmask) |
182 ~lasat_board_info.li_eeprom_info.netmask;
183
184 sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
185 (ip) & 0xff,
186 (ip >> 8) & 0xff,
187 (ip >> 16) & 0xff,
188 (ip >> 24) & 0xff);
189}
190
191static char proc_lasat_ipbuf[32];
192
193/* Parsing of IP address */
194int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
195 void *buffer, size_t *lenp, loff_t *ppos)
196{
197 unsigned int ip;
198 char *p, c;
199 int len;
200
201 if (!table->data || !table->maxlen || !*lenp ||
202 (*ppos && !write)) {
203 *lenp = 0;
204 return 0;
205 }
206
207 mutex_lock(&lasat_info_mutex);
208 if (write) {
209 len = 0;
210 p = buffer;
211 while (len < *lenp) {
212 if (get_user(c, p++)) {
213 mutex_unlock(&lasat_info_mutex);
214 return -EFAULT;
215 }
216 if (c == 0 || c == '\n')
217 break;
218 len++;
219 }
220 if (len >= sizeof(proc_lasat_ipbuf)-1)
221 len = sizeof(proc_lasat_ipbuf) - 1;
222 if (copy_from_user(proc_lasat_ipbuf, buffer, len)) {
223 mutex_unlock(&lasat_info_mutex);
224 return -EFAULT;
225 }
226 proc_lasat_ipbuf[len] = 0;
227 *ppos += *lenp;
228 /* Now see if we can convert it to a valid IP */
229 ip = in_aton(proc_lasat_ipbuf);
230 *(unsigned int *)(table->data) = ip;
231 lasat_write_eeprom_info();
232 } else {
233 ip = *(unsigned int *)(table->data);
234 sprintf(proc_lasat_ipbuf, "%d.%d.%d.%d",
235 (ip) & 0xff,
236 (ip >> 8) & 0xff,
237 (ip >> 16) & 0xff,
238 (ip >> 24) & 0xff);
239 len = strlen(proc_lasat_ipbuf);
240 if (len > *lenp)
241 len = *lenp;
242 if (len)
243 if (copy_to_user(buffer, proc_lasat_ipbuf, len)) {
244 mutex_unlock(&lasat_info_mutex);
245 return -EFAULT;
246 }
247 if (len < *lenp) {
248 if (put_user('\n', ((char *) buffer) + len)) {
249 mutex_unlock(&lasat_info_mutex);
250 return -EFAULT;
251 }
252 len++;
253 }
254 *lenp = len;
255 *ppos += len;
256 }
257 update_bcastaddr();
258 mutex_unlock(&lasat_info_mutex);
259
260 return 0;
261}
262#endif /* defined(CONFIG_INET) */
263
264static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen,
265 void *oldval, size_t *oldlenp,
266 void *newval, size_t newlen)
267{
268 int r;
269
270 mutex_lock(&lasat_info_mutex);
271 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
272 if (r < 0) {
273 mutex_unlock(&lasat_info_mutex);
274 return r;
275 }
276
277 if (newval && newlen) {
278 if (name && *name == LASAT_PRID)
279 lasat_board_info.li_eeprom_info.prid = *(int *)newval;
280
281 lasat_write_eeprom_info();
282 lasat_init_board_info();
283 }
284 mutex_unlock(&lasat_info_mutex);
285
286 return 0;
287}
288
289int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp,
290 void *buffer, size_t *lenp, loff_t *ppos)
291{
292 int r;
293
294 mutex_lock(&lasat_info_mutex);
295 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
296 if ((!write) || r) {
297 mutex_unlock(&lasat_info_mutex);
298 return r;
299 }
300 if (filp && filp->f_path.dentry) {
301 if (!strcmp(filp->f_path.dentry->d_name.name, "prid"))
302 lasat_board_info.li_eeprom_info.prid =
303 lasat_board_info.li_prid;
304 if (!strcmp(filp->f_path.dentry->d_name.name, "debugaccess"))
305 lasat_board_info.li_eeprom_info.debugaccess =
306 lasat_board_info.li_debugaccess;
307 }
308 lasat_write_eeprom_info();
309 mutex_unlock(&lasat_info_mutex);
310
311 return 0;
312}
313
314extern int lasat_boot_to_service;
315
316#ifdef CONFIG_SYSCTL
317
318static ctl_table lasat_table[] = {
319 {
320 .ctl_name = CTL_UNNUMBERED,
321 .procname = "cpu-hz",
322 .data = &lasat_board_info.li_cpu_hz,
323 .maxlen = sizeof(int),
324 .mode = 0444,
325 .proc_handler = &proc_dointvec,
326 .strategy = &sysctl_intvec
327 },
328 {
329 .ctl_name = CTL_UNNUMBERED,
330 .procname = "bus-hz",
331 .data = &lasat_board_info.li_bus_hz,
332 .maxlen = sizeof(int),
333 .mode = 0444,
334 .proc_handler = &proc_dointvec,
335 .strategy = &sysctl_intvec
336 },
337 {
338 .ctl_name = CTL_UNNUMBERED,
339 .procname = "bmid",
340 .data = &lasat_board_info.li_bmid,
341 .maxlen = sizeof(int),
342 .mode = 0444,
343 .proc_handler = &proc_dointvec,
344 .strategy = &sysctl_intvec
345 },
346 {
347 .ctl_name = CTL_UNNUMBERED,
348 .procname = "prid",
349 .data = &lasat_board_info.li_prid,
350 .maxlen = sizeof(int),
351 .mode = 0644,
352 .proc_handler = &proc_lasat_eeprom_value,
353 .strategy = &sysctl_lasat_eeprom_value
354 },
355#ifdef CONFIG_INET
356 {
357 .ctl_name = CTL_UNNUMBERED,
358 .procname = "ipaddr",
359 .data = &lasat_board_info.li_eeprom_info.ipaddr,
360 .maxlen = sizeof(int),
361 .mode = 0644,
362 .proc_handler = &proc_lasat_ip,
363 .strategy = &sysctl_lasat_intvec
364 },
365 {
366 .ctl_name = LASAT_NETMASK,
367 .procname = "netmask",
368 .data = &lasat_board_info.li_eeprom_info.netmask,
369 .maxlen = sizeof(int),
370 .mode = 0644,
371 .proc_handler = &proc_lasat_ip,
372 .strategy = &sysctl_lasat_intvec
373 },
374 {
375 .ctl_name = CTL_UNNUMBERED,
376 .procname = "bcastaddr",
377 .data = &lasat_bcastaddr,
378 .maxlen = sizeof(lasat_bcastaddr),
379 .mode = 0600,
380 .proc_handler = &proc_dostring,
381 .strategy = &sysctl_string
382 },
383#endif
384 {
385 .ctl_name = CTL_UNNUMBERED,
386 .procname = "passwd_hash",
387 .data = &lasat_board_info.li_eeprom_info.passwd_hash,
388 .maxlen =
389 sizeof(lasat_board_info.li_eeprom_info.passwd_hash),
390 .mode = 0600,
391 .proc_handler = &proc_dolasatstring,
392 .strategy = &sysctl_lasatstring
393 },
394 {
395 .ctl_name = CTL_UNNUMBERED,
396 .procname = "boot-service",
397 .data = &lasat_boot_to_service,
398 .maxlen = sizeof(int),
399 .mode = 0644,
400 .proc_handler = &proc_dointvec,
401 .strategy = &sysctl_intvec
402 },
403#ifdef CONFIG_DS1603
404 {
405 .ctl_name = CTL_UNNUMBERED,
406 .procname = "rtc",
407 .data = &rtctmp,
408 .maxlen = sizeof(int),
409 .mode = 0644,
410 .proc_handler = &proc_dolasatrtc,
411 .strategy = &sysctl_lasat_rtc
412 },
413#endif
414 {
415 .ctl_name = CTL_UNNUMBERED,
416 .procname = "namestr",
417 .data = &lasat_board_info.li_namestr,
418 .maxlen = sizeof(lasat_board_info.li_namestr),
419 .mode = 0444,
420 .proc_handler = &proc_dostring,
421 .strategy = &sysctl_string
422 },
423 {
424 .ctl_name = CTL_UNNUMBERED,
425 .procname = "typestr",
426 .data = &lasat_board_info.li_typestr,
427 .maxlen = sizeof(lasat_board_info.li_typestr),
428 .mode = 0444,
429 .proc_handler = &proc_dostring,
430 .strategy = &sysctl_string
431 },
432 {}
433};
434
435static ctl_table lasat_root_table[] = {
436 {
437 .ctl_name = CTL_UNNUMBERED,
438 .procname = "lasat",
439 .mode = 0555,
440 .child = lasat_table
441 },
442 {}
443};
444
445static int __init lasat_register_sysctl(void)
446{
447 struct ctl_table_header *lasat_table_header;
448
449 lasat_table_header =
450 register_sysctl_table(lasat_root_table);
451
452 return 0;
453}
454
455__initcall(lasat_register_sysctl);
456#endif /* CONFIG_SYSCTL */
diff --git a/arch/mips/lasat/sysctl.h b/arch/mips/lasat/sysctl.h
new file mode 100644
index 000000000000..341b97933423
--- /dev/null
+++ b/arch/mips/lasat/sysctl.h
@@ -0,0 +1,24 @@
1/*
2 * LASAT sysctl values
3 */
4
5#ifndef _LASAT_SYSCTL_H
6#define _LASAT_SYSCTL_H
7
8/* /proc/sys/lasat */
9enum {
10 LASAT_CPU_HZ = 1,
11 LASAT_BUS_HZ,
12 LASAT_MODEL,
13 LASAT_PRID,
14 LASAT_IPADDR,
15 LASAT_NETMASK,
16 LASAT_BCAST,
17 LASAT_PASSWORD,
18 LASAT_SBOOT,
19 LASAT_RTC,
20 LASAT_NAMESTR,
21 LASAT_TYPESTR,
22};
23
24#endif /* _LASAT_SYSCTL_H */
diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile
index dcaf6f4c3a37..d34671d1b899 100644
--- a/arch/mips/lemote/lm2e/Makefile
+++ b/arch/mips/lemote/lm2e/Makefile
@@ -4,5 +4,4 @@
4 4
5obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o 5obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o
6 6
7EXTRA_AFLAGS := $(CFLAGS)
8EXTRA_CFLAGS += -Werror 7EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/lemote/lm2e/prom.c b/arch/mips/lemote/lm2e/prom.c
index 3efb1cf111f2..824336812198 100644
--- a/arch/mips/lemote/lm2e/prom.c
+++ b/arch/mips/lemote/lm2e/prom.c
@@ -57,7 +57,6 @@ void __init prom_init(void)
57 arg = (int *)fw_arg1; 57 arg = (int *)fw_arg1;
58 env = (int *)fw_arg2; 58 env = (int *)fw_arg2;
59 59
60 mips_machgroup = MACH_GROUP_LEMOTE;
61 mips_machtype = MACH_LEMOTE_FULONG; 60 mips_machtype = MACH_LEMOTE_FULONG;
62 61
63 prom_init_cmdline(); 62 prom_init_cmdline();
diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c
index f34350a4f271..09314a20f9fb 100644
--- a/arch/mips/lemote/lm2e/setup.c
+++ b/arch/mips/lemote/lm2e/setup.c
@@ -58,13 +58,13 @@ void __init plat_timer_setup(struct irqaction *irq)
58 setup_irq(MIPS_CPU_IRQ_BASE + 7, irq); 58 setup_irq(MIPS_CPU_IRQ_BASE + 7, irq);
59} 59}
60 60
61static void __init loongson2e_time_init(void) 61void __init plat_time_init(void)
62{ 62{
63 /* setup mips r4k timer */ 63 /* setup mips r4k timer */
64 mips_hpt_frequency = cpu_clock_freq / 2; 64 mips_hpt_frequency = cpu_clock_freq / 2;
65} 65}
66 66
67static unsigned long __init mips_rtc_get_time(void) 67unsigned long read_persistent_clock(void)
68{ 68{
69 return mc146818_get_cmos_time(); 69 return mc146818_get_cmos_time();
70} 70}
@@ -89,9 +89,6 @@ void __init plat_mem_setup(void)
89 89
90 mips_reboot_setup(); 90 mips_reboot_setup();
91 91
92 board_time_init = loongson2e_time_init;
93 rtc_mips_get_time = mips_rtc_get_time;
94
95 __wbflush = wbflush_loongson2e; 92 __wbflush = wbflush_loongson2e;
96 93
97 add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); 94 add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c
index e2ff6072b5a3..b33d8569bcb0 100644
--- a/arch/mips/lib/ucmpdi2.c
+++ b/arch/mips/lib/ucmpdi2.c
@@ -2,7 +2,7 @@
2 2
3#include "libgcc.h" 3#include "libgcc.h"
4 4
5word_type __ucmpdi2 (unsigned long long a, unsigned long long b) 5word_type __ucmpdi2(unsigned long long a, unsigned long long b)
6{ 6{
7 const DWunion au = {.ll = a}; 7 const DWunion au = {.ll = a};
8 const DWunion bu = {.ll = b}; 8 const DWunion bu = {.ll = b};
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 17419e11ecad..b08fc65c13a6 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -178,24 +178,24 @@ static int isBranchInstr(mips_instruction * i)
178#define FR_BIT 0 178#define FR_BIT 0
179#endif 179#endif
180 180
181#define SIFROMREG(si,x) ((si) = \ 181#define SIFROMREG(si, x) ((si) = \
182 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \ 182 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \
183 (int)ctx->fpr[x] : \ 183 (int)ctx->fpr[x] : \
184 (int)(ctx->fpr[x & ~1] >> 32 )) 184 (int)(ctx->fpr[x & ~1] >> 32 ))
185#define SITOREG(si,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \ 185#define SITOREG(si, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
186 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \ 186 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \
187 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \ 187 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
188 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32) 188 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
189 189
190#define DIFROMREG(di,x) ((di) = \ 190#define DIFROMREG(di, x) ((di) = \
191 ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)]) 191 ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)])
192#define DITOREG(di,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \ 192#define DITOREG(di, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
193 = (di)) 193 = (di))
194 194
195#define SPFROMREG(sp,x) SIFROMREG((sp).bits,x) 195#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
196#define SPTOREG(sp,x) SITOREG((sp).bits,x) 196#define SPTOREG(sp, x) SITOREG((sp).bits, x)
197#define DPFROMREG(dp,x) DIFROMREG((dp).bits,x) 197#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
198#define DPTOREG(dp,x) DITOREG((dp).bits,x) 198#define DPTOREG(dp, x) DITOREG((dp).bits, x)
199 199
200/* 200/*
201 * Emulate the single floating point instruction pointed at by EPC. 201 * Emulate the single floating point instruction pointed at by EPC.
@@ -549,16 +549,16 @@ static const unsigned char cmptab[8] = {
549 */ 549 */
550 550
551#define DEF3OP(name, p, f1, f2, f3) \ 551#define DEF3OP(name, p, f1, f2, f3) \
552static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \ 552static ieee754##p fpemu_##p##_##name(ieee754##p r, ieee754##p s, \
553 ieee754##p t) \ 553 ieee754##p t) \
554{ \ 554{ \
555 struct _ieee754_csr ieee754_csr_save; \ 555 struct _ieee754_csr ieee754_csr_save; \
556 s = f1 (s, t); \ 556 s = f1(s, t); \
557 ieee754_csr_save = ieee754_csr; \ 557 ieee754_csr_save = ieee754_csr; \
558 s = f2 (s, r); \ 558 s = f2(s, r); \
559 ieee754_csr_save.cx |= ieee754_csr.cx; \ 559 ieee754_csr_save.cx |= ieee754_csr.cx; \
560 ieee754_csr_save.sx |= ieee754_csr.sx; \ 560 ieee754_csr_save.sx |= ieee754_csr.sx; \
561 s = f3 (s); \ 561 s = f3(s); \
562 ieee754_csr.cx |= ieee754_csr_save.cx; \ 562 ieee754_csr.cx |= ieee754_csr_save.cx; \
563 ieee754_csr.sx |= ieee754_csr_save.sx; \ 563 ieee754_csr.sx |= ieee754_csr_save.sx; \
564 return s; \ 564 return s; \
@@ -584,12 +584,12 @@ static ieee754sp fpemu_sp_rsqrt(ieee754sp s)
584 return ieee754sp_div(ieee754sp_one(0), ieee754sp_sqrt(s)); 584 return ieee754sp_div(ieee754sp_one(0), ieee754sp_sqrt(s));
585} 585}
586 586
587DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add,); 587DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add, );
588DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub,); 588DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub, );
589DEF3OP(nmadd, sp, ieee754sp_mul, ieee754sp_add, ieee754sp_neg); 589DEF3OP(nmadd, sp, ieee754sp_mul, ieee754sp_add, ieee754sp_neg);
590DEF3OP(nmsub, sp, ieee754sp_mul, ieee754sp_sub, ieee754sp_neg); 590DEF3OP(nmsub, sp, ieee754sp_mul, ieee754sp_sub, ieee754sp_neg);
591DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add,); 591DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add, );
592DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,); 592DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub, );
593DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg); 593DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
594DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); 594DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
595 595
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index f2373902f524..48908a809c17 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -121,7 +121,7 @@ ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y)
121 */ 121 */
122 122
123 /* 32 * 32 => 64 */ 123 /* 32 * 32 => 64 */
124#define DPXMULT(x,y) ((u64)(x) * (u64)y) 124#define DPXMULT(x, y) ((u64)(x) * (u64)y)
125 125
126 { 126 {
127 unsigned lxm = xm; 127 unsigned lxm = xm;
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index a93c45dbdefd..946aee331788 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -47,13 +47,13 @@
47 47
48 48
49#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__) 49#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
50#define SPSTR(s,b,m) {m,b,s} 50#define SPSTR(s, b, m) {m, b, s}
51#define DPSTR(s,b,mh,ml) {ml,mh,b,s} 51#define DPSTR(s, b, mh, ml) {ml, mh, b, s}
52#endif 52#endif
53 53
54#ifdef __MIPSEB__ 54#ifdef __MIPSEB__
55#define SPSTR(s,b,m) {s,b,m} 55#define SPSTR(s, b, m) {s, b, m}
56#define DPSTR(s,b,mh,ml) {s,b,mh,ml} 56#define DPSTR(s, b, mh, ml) {s, b, mh, ml}
57#endif 57#endif
58 58
59const struct ieee754dp_konst __ieee754dp_spcvals[] = { 59const struct ieee754dp_konst __ieee754dp_spcvals[] = {
@@ -65,7 +65,7 @@ const struct ieee754dp_konst __ieee754dp_spcvals[] = {
65 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */ 65 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */
66 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */ 66 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */
67 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */ 67 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */
68 DPSTR(0,DP_EMAX+1+DP_EBIAS,0x7FFFF,0xFFFFFFFF), /* + indef quiet Nan */ 68 DPSTR(0, DP_EMAX+1+DP_EBIAS, 0x7FFFF, 0xFFFFFFFF), /* + indef quiet Nan */
69 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */ 69 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */
70 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */ 70 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */
71 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */ 71 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */
@@ -85,7 +85,7 @@ const struct ieee754sp_konst __ieee754sp_spcvals[] = {
85 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */ 85 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */
86 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */ 86 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */
87 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */ 87 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */
88 SPSTR(0,SP_EMAX+1+SP_EBIAS,0x3FFFFF), /* + indef quiet Nan */ 88 SPSTR(0, SP_EMAX+1+SP_EBIAS, 0x3FFFFF), /* + indef quiet Nan */
89 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */ 89 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */
90 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */ 90 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */
91 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */ 91 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index a37370dae232..8977eb585a37 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -43,8 +43,8 @@
43/* convert denormal to normalized with extended exponent */ 43/* convert denormal to normalized with extended exponent */
44#define DPDNORMx(m,e) \ 44#define DPDNORMx(m,e) \
45 while( (m >> DP_MBITS) == 0) { m <<= 1; e--; } 45 while( (m >> DP_MBITS) == 0) { m <<= 1; e--; }
46#define DPDNORMX DPDNORMx(xm,xe) 46#define DPDNORMX DPDNORMx(xm, xe)
47#define DPDNORMY DPDNORMx(ym,ye) 47#define DPDNORMY DPDNORMx(ym, ye)
48 48
49static __inline ieee754dp builddp(int s, int bx, u64 m) 49static __inline ieee754dp builddp(int s, int bx, u64 m)
50{ 50{
@@ -71,13 +71,13 @@ extern ieee754dp ieee754dp_bestnan(ieee754dp, ieee754dp);
71extern ieee754dp ieee754dp_format(int, int, u64); 71extern ieee754dp ieee754dp_format(int, int, u64);
72 72
73 73
74#define DPNORMRET2(s,e,m,name,a0,a1) \ 74#define DPNORMRET2(s, e, m, name, a0, a1) \
75{ \ 75{ \
76 ieee754dp V = ieee754dp_format(s,e,m); \ 76 ieee754dp V = ieee754dp_format(s, e, m); \
77 if(TSTX()) \ 77 if(TSTX()) \
78 return ieee754dp_xcpt(V,name,a0,a1); \ 78 return ieee754dp_xcpt(V, name, a0, a1); \
79 else \ 79 else \
80 return V; \ 80 return V; \
81} 81}
82 82
83#define DPNORMRET1(s,e,m,name,a0) DPNORMRET2(s,e,m,name,a0,a0) 83#define DPNORMRET1(s, e, m, name, a0) DPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 4a5a81d6b893..1a846c5425cd 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -55,16 +55,16 @@
55#define DPBEXP(dp) (dp.parts.bexp) 55#define DPBEXP(dp) (dp.parts.bexp)
56#define DPMANT(dp) (dp.parts.mant) 56#define DPMANT(dp) (dp.parts.mant)
57 57
58#define CLPAIR(x,y) ((x)*6+(y)) 58#define CLPAIR(x, y) ((x)*6+(y))
59 59
60#define CLEARCX \ 60#define CLEARCX \
61 (ieee754_csr.cx = 0) 61 (ieee754_csr.cx = 0)
62 62
63#define SETCX(x) \ 63#define SETCX(x) \
64 (ieee754_csr.cx |= (x),ieee754_csr.sx |= (x)) 64 (ieee754_csr.cx |= (x), ieee754_csr.sx |= (x))
65 65
66#define SETANDTESTCX(x) \ 66#define SETANDTESTCX(x) \
67 (SETCX(x),ieee754_csr.mx & (x)) 67 (SETCX(x), ieee754_csr.mx & (x))
68 68
69#define TSTX() \ 69#define TSTX() \
70 (ieee754_csr.cx & ieee754_csr.mx) 70 (ieee754_csr.cx & ieee754_csr.mx)
@@ -76,7 +76,7 @@
76#define COMPYSP \ 76#define COMPYSP \
77 unsigned ym; int ye; int ys; int yc 77 unsigned ym; int ye; int ys; int yc
78 78
79#define EXPLODESP(v,vc,vs,ve,vm) \ 79#define EXPLODESP(v, vc, vs, ve, vm) \
80{\ 80{\
81 vs = SPSIGN(v);\ 81 vs = SPSIGN(v);\
82 ve = SPBEXP(v);\ 82 ve = SPBEXP(v);\
@@ -100,8 +100,8 @@
100 vc = IEEE754_CLASS_NORM;\ 100 vc = IEEE754_CLASS_NORM;\
101 }\ 101 }\
102} 102}
103#define EXPLODEXSP EXPLODESP(x,xc,xs,xe,xm) 103#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
104#define EXPLODEYSP EXPLODESP(y,yc,ys,ye,ym) 104#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym)
105 105
106 106
107#define COMPXDP \ 107#define COMPXDP \
@@ -110,7 +110,7 @@ u64 xm; int xe; int xs; int xc
110#define COMPYDP \ 110#define COMPYDP \
111u64 ym; int ye; int ys; int yc 111u64 ym; int ye; int ys; int yc
112 112
113#define EXPLODEDP(v,vc,vs,ve,vm) \ 113#define EXPLODEDP(v, vc, vs, ve, vm) \
114{\ 114{\
115 vm = DPMANT(v);\ 115 vm = DPMANT(v);\
116 vs = DPSIGN(v);\ 116 vs = DPSIGN(v);\
@@ -134,10 +134,10 @@ u64 ym; int ye; int ys; int yc
134 vc = IEEE754_CLASS_NORM;\ 134 vc = IEEE754_CLASS_NORM;\
135 }\ 135 }\
136} 136}
137#define EXPLODEXDP EXPLODEDP(x,xc,xs,xe,xm) 137#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
138#define EXPLODEYDP EXPLODEDP(y,yc,ys,ye,ym) 138#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym)
139 139
140#define FLUSHDP(v,vc,vs,ve,vm) \ 140#define FLUSHDP(v, vc, vs, ve, vm) \
141 if(vc==IEEE754_CLASS_DNORM) {\ 141 if(vc==IEEE754_CLASS_DNORM) {\
142 if(ieee754_csr.nod) {\ 142 if(ieee754_csr.nod) {\
143 SETCX(IEEE754_INEXACT);\ 143 SETCX(IEEE754_INEXACT);\
@@ -148,7 +148,7 @@ u64 ym; int ye; int ys; int yc
148 }\ 148 }\
149 } 149 }
150 150
151#define FLUSHSP(v,vc,vs,ve,vm) \ 151#define FLUSHSP(v, vc, vs, ve, vm) \
152 if(vc==IEEE754_CLASS_DNORM) {\ 152 if(vc==IEEE754_CLASS_DNORM) {\
153 if(ieee754_csr.nod) {\ 153 if(ieee754_csr.nod) {\
154 SETCX(IEEE754_INEXACT);\ 154 SETCX(IEEE754_INEXACT);\
@@ -159,7 +159,7 @@ u64 ym; int ye; int ys; int yc
159 }\ 159 }\
160 } 160 }
161 161
162#define FLUSHXDP FLUSHDP(x,xc,xs,xe,xm) 162#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
163#define FLUSHYDP FLUSHDP(y,yc,ys,ye,ym) 163#define FLUSHYDP FLUSHDP(y, yc, ys, ye, ym)
164#define FLUSHXSP FLUSHSP(x,xc,xs,xe,xm) 164#define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
165#define FLUSHYSP FLUSHSP(y,yc,ys,ye,ym) 165#define FLUSHYSP FLUSHSP(y, yc, ys, ye, ym)
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index ae82f51297e5..9917c1e4d947 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -48,8 +48,8 @@
48/* convert denormal to normalized with extended exponent */ 48/* convert denormal to normalized with extended exponent */
49#define SPDNORMx(m,e) \ 49#define SPDNORMx(m,e) \
50 while( (m >> SP_MBITS) == 0) { m <<= 1; e--; } 50 while( (m >> SP_MBITS) == 0) { m <<= 1; e--; }
51#define SPDNORMX SPDNORMx(xm,xe) 51#define SPDNORMX SPDNORMx(xm, xe)
52#define SPDNORMY SPDNORMx(ym,ye) 52#define SPDNORMY SPDNORMx(ym, ye)
53 53
54static __inline ieee754sp buildsp(int s, int bx, unsigned m) 54static __inline ieee754sp buildsp(int s, int bx, unsigned m)
55{ 55{
@@ -77,13 +77,13 @@ extern ieee754sp ieee754sp_bestnan(ieee754sp, ieee754sp);
77extern ieee754sp ieee754sp_format(int, int, unsigned); 77extern ieee754sp ieee754sp_format(int, int, unsigned);
78 78
79 79
80#define SPNORMRET2(s,e,m,name,a0,a1) \ 80#define SPNORMRET2(s, e, m, name, a0, a1) \
81{ \ 81{ \
82 ieee754sp V = ieee754sp_format(s,e,m); \ 82 ieee754sp V = ieee754sp_format(s, e, m); \
83 if(TSTX()) \ 83 if(TSTX()) \
84 return ieee754sp_xcpt(V,name,a0,a1); \ 84 return ieee754sp_xcpt(V, name, a0, a1); \
85 else \ 85 else \
86 return V; \ 86 return V; \
87} 87}
88 88
89#define SPNORMRET1(s,e,m,name,a0) SPNORMRET2(s,e,m,name,a0,a0) 89#define SPNORMRET1(s, e, m, name, a0) SPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/mips-boards/atlas/atlas_gdb.c b/arch/mips/mips-boards/atlas/atlas_gdb.c
index fb65280f1780..00c98cff62dc 100644
--- a/arch/mips/mips-boards/atlas/atlas_gdb.c
+++ b/arch/mips/mips-boards/atlas/atlas_gdb.c
@@ -22,7 +22,7 @@
22#include <asm/mips-boards/saa9730_uart.h> 22#include <asm/mips-boards/saa9730_uart.h>
23 23
24#define INB(a) inb((unsigned long)a) 24#define INB(a) inb((unsigned long)a)
25#define OUTB(x,a) outb(x,(unsigned long)a) 25#define OUTB(x, a) outb(x, (unsigned long)a)
26 26
27/* 27/*
28 * This is the interface to the remote debugger stub 28 * This is the interface to the remote debugger stub
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index 3c692abc2553..6fb29c3ff62d 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -112,7 +112,7 @@ static inline void atlas_hw0_irqdispatch(void)
112 112
113static inline int clz(unsigned long x) 113static inline int clz(unsigned long x)
114{ 114{
115 __asm__ ( 115 __asm__(
116 " .set push \n" 116 " .set push \n"
117 " .set mips32 \n" 117 " .set mips32 \n"
118 " clz %0, %1 \n" 118 " clz %0, %1 \n"
@@ -194,7 +194,7 @@ asmlinkage void plat_irq_dispatch(void)
194 spurious_interrupt(); 194 spurious_interrupt();
195} 195}
196 196
197static inline void init_atlas_irqs (int base) 197static inline void init_atlas_irqs(int base)
198{ 198{
199 int i; 199 int i;
200 200
@@ -249,21 +249,21 @@ void __init arch_init_irq(void)
249 case MIPS_REVISION_CORID_CORE_24K: 249 case MIPS_REVISION_CORID_CORE_24K:
250 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 250 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
251 if (cpu_has_veic) 251 if (cpu_has_veic)
252 init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE, 252 init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
253 msc_eicirqmap, msc_nr_eicirqs); 253 msc_eicirqmap, msc_nr_eicirqs);
254 else 254 else
255 init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE, 255 init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
256 msc_irqmap, msc_nr_irqs); 256 msc_irqmap, msc_nr_irqs);
257 } 257 }
258 258
259 if (cpu_has_veic) { 259 if (cpu_has_veic) {
260 set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); 260 set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
261 setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); 261 setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
262 } else if (cpu_has_vint) { 262 } else if (cpu_has_vint) {
263 set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch); 263 set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
264#ifdef CONFIG_MIPS_MT_SMTC 264#ifdef CONFIG_MIPS_MT_SMTC
265 setup_irq_smtc (MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, 265 setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
266 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS)); 266 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
267#else /* Not SMTC */ 267#else /* Not SMTC */
268 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq); 268 setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
269#endif /* CONFIG_MIPS_MT_SMTC */ 269#endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index c68358a476dd..e405d112a067 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -35,8 +35,6 @@
35#include <asm/traps.h> 35#include <asm/traps.h>
36 36
37extern void mips_reboot_setup(void); 37extern void mips_reboot_setup(void);
38extern void mips_time_init(void);
39extern unsigned long mips_rtc_get_time(void);
40 38
41#ifdef CONFIG_KGDB 39#ifdef CONFIG_KGDB
42extern void kgdb_config(void); 40extern void kgdb_config(void);
@@ -57,15 +55,12 @@ void __init plat_mem_setup(void)
57 55
58 ioport_resource.end = 0x7fffffff; 56 ioport_resource.end = 0x7fffffff;
59 57
60 serial_init (); 58 serial_init();
61 59
62#ifdef CONFIG_KGDB 60#ifdef CONFIG_KGDB
63 kgdb_config(); 61 kgdb_config();
64#endif 62#endif
65 mips_reboot_setup(); 63 mips_reboot_setup();
66
67 board_time_init = mips_time_init;
68 rtc_mips_get_time = mips_rtc_get_time;
69} 64}
70 65
71static void __init serial_init(void) 66static void __init serial_init(void)
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index e2c7147fedf7..30f1f54cb68b 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -166,15 +166,15 @@ static void __init console_config(void)
166 bits = '8'; 166 bits = '8';
167 if (flow == '\0') 167 if (flow == '\0')
168 flow = 'r'; 168 flow = 'r';
169 sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow); 169 sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
170 strcat (prom_getcmdline(), console_string); 170 strcat(prom_getcmdline(), console_string);
171 pr_info("Config serial console:%s\n", console_string); 171 pr_info("Config serial console:%s\n", console_string);
172 } 172 }
173} 173}
174#endif 174#endif
175 175
176#ifdef CONFIG_KGDB 176#ifdef CONFIG_KGDB
177void __init kgdb_config (void) 177void __init kgdb_config(void)
178{ 178{
179 extern int (*generic_putDebugChar)(char); 179 extern int (*generic_putDebugChar)(char);
180 extern char (*generic_getDebugChar)(void); 180 extern char (*generic_getDebugChar)(void);
@@ -218,7 +218,7 @@ void __init kgdb_config (void)
218 { 218 {
219 char *s; 219 char *s;
220 for (s = "Please connect GDB to this port\r\n"; *s; ) 220 for (s = "Please connect GDB to this port\r\n"; *s; )
221 generic_putDebugChar (*s++); 221 generic_putDebugChar(*s++);
222 } 222 }
223 223
224 /* Breakpoint is invoked after interrupts are initialised */ 224 /* Breakpoint is invoked after interrupts are initialised */
@@ -226,7 +226,7 @@ void __init kgdb_config (void)
226} 226}
227#endif 227#endif
228 228
229void __init mips_nmi_setup (void) 229void __init mips_nmi_setup(void)
230{ 230{
231 void *base; 231 void *base;
232 extern char except_vec_nmi; 232 extern char except_vec_nmi;
@@ -238,7 +238,7 @@ void __init mips_nmi_setup (void)
238 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); 238 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
239} 239}
240 240
241void __init mips_ejtag_setup (void) 241void __init mips_ejtag_setup(void)
242{ 242{
243 void *base; 243 void *base;
244 extern char except_vec_ejtag_debug; 244 extern char except_vec_ejtag_debug;
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index ae39953da2c4..dc272c188233 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -125,7 +125,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
125 return &mdesc[0]; 125 return &mdesc[0];
126} 126}
127 127
128static int __init prom_memtype_classify (unsigned int type) 128static int __init prom_memtype_classify(unsigned int type)
129{ 129{
130 switch (type) { 130 switch (type) {
131 case yamon_free: 131 case yamon_free:
@@ -158,7 +158,7 @@ void __init prom_meminit(void)
158 long type; 158 long type;
159 unsigned long base, size; 159 unsigned long base, size;
160 160
161 type = prom_memtype_classify (p->type); 161 type = prom_memtype_classify(p->type);
162 base = p->base; 162 base = p->base;
163 size = p->size; 163 size = p->size;
164 164
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index c9852206890a..b9743190609a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -239,5 +239,5 @@ void __init mips_pcibios_init(void)
239 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ 239 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
240 ioport_resource.end = controller->io_resource->end; 240 ioport_resource.end = controller->io_resource->end;
241 241
242 register_pci_controller (controller); 242 register_pci_controller(controller);
243} 243}
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index d7bff9ca5356..1d00b778ff1e 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -31,6 +31,7 @@
31#include <asm/mipsregs.h> 31#include <asm/mipsregs.h>
32#include <asm/mipsmtregs.h> 32#include <asm/mipsmtregs.h>
33#include <asm/hardirq.h> 33#include <asm/hardirq.h>
34#include <asm/i8253.h>
34#include <asm/irq.h> 35#include <asm/irq.h>
35#include <asm/div64.h> 36#include <asm/div64.h>
36#include <asm/cpu.h> 37#include <asm/cpu.h>
@@ -55,7 +56,6 @@ unsigned long cpu_khz;
55 56
56static int mips_cpu_timer_irq; 57static int mips_cpu_timer_irq;
57extern int cp0_perfcount_irq; 58extern int cp0_perfcount_irq;
58extern void smtc_timer_broadcast(void);
59 59
60static void mips_timer_dispatch(void) 60static void mips_timer_dispatch(void)
61{ 61{
@@ -68,108 +68,6 @@ static void mips_perf_dispatch(void)
68} 68}
69 69
70/* 70/*
71 * Redeclare until I get around mopping the timer code insanity on MIPS.
72 */
73extern int null_perf_irq(void);
74
75extern int (*perf_irq)(void);
76
77/*
78 * Possibly handle a performance counter interrupt.
79 * Return true if the timer interrupt should not be checked
80 */
81static inline int handle_perf_irq (int r2)
82{
83 /*
84 * The performance counter overflow interrupt may be shared with the
85 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
86 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
87 * and we can't reliably determine if a counter interrupt has also
88 * happened (!r2) then don't check for a timer interrupt.
89 */
90 return (cp0_perfcount_irq < 0) &&
91 perf_irq() == IRQ_HANDLED &&
92 !r2;
93}
94
95irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
96{
97 int cpu = smp_processor_id();
98
99#ifdef CONFIG_MIPS_MT_SMTC
100 /*
101 * In an SMTC system, one Count/Compare set exists per VPE.
102 * Which TC within a VPE gets the interrupt is essentially
103 * random - we only know that it shouldn't be one with
104 * IXMT set. Whichever TC gets the interrupt needs to
105 * send special interprocessor interrupts to the other
106 * TCs to make sure that they schedule, etc.
107 *
108 * That code is specific to the SMTC kernel, not to
109 * the a particular platform, so it's invoked from
110 * the general MIPS timer_interrupt routine.
111 */
112
113 /*
114 * We could be here due to timer interrupt,
115 * perf counter overflow, or both.
116 */
117 (void) handle_perf_irq(1);
118
119 if (read_c0_cause() & (1 << 30)) {
120 /*
121 * There are things we only want to do once per tick
122 * in an "MP" system. One TC of each VPE will take
123 * the actual timer interrupt. The others will get
124 * timer broadcast IPIs. We use whoever it is that takes
125 * the tick on VPE 0 to run the full timer_interrupt().
126 */
127 if (cpu_data[cpu].vpe_id == 0) {
128 timer_interrupt(irq, NULL);
129 } else {
130 write_c0_compare(read_c0_count() +
131 (mips_hpt_frequency/HZ));
132 local_timer_interrupt(irq, dev_id);
133 }
134 smtc_timer_broadcast();
135 }
136#else /* CONFIG_MIPS_MT_SMTC */
137 int r2 = cpu_has_mips_r2;
138
139 if (handle_perf_irq(r2))
140 goto out;
141
142 if (r2 && ((read_c0_cause() & (1 << 30)) == 0))
143 goto out;
144
145 if (cpu == 0) {
146 /*
147 * CPU 0 handles the global timer interrupt job and process
148 * accounting resets count/compare registers to trigger next
149 * timer int.
150 */
151 timer_interrupt(irq, NULL);
152 } else {
153 /* Everyone else needs to reset the timer int here as
154 ll_local_timer_interrupt doesn't */
155 /*
156 * FIXME: need to cope with counter underflow.
157 * More support needs to be added to kernel/time for
158 * counter/timer interrupts on multiple CPU's
159 */
160 write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
161
162 /*
163 * Other CPUs should do profiling and process accounting
164 */
165 local_timer_interrupt(irq, dev_id);
166 }
167out:
168#endif /* CONFIG_MIPS_MT_SMTC */
169 return IRQ_HANDLED;
170}
171
172/*
173 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect 71 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
174 */ 72 */
175static unsigned int __init estimate_cpu_frequency(void) 73static unsigned int __init estimate_cpu_frequency(void)
@@ -224,19 +122,19 @@ static unsigned int __init estimate_cpu_frequency(void)
224 return count; 122 return count;
225} 123}
226 124
227unsigned long __init mips_rtc_get_time(void) 125unsigned long read_persistent_clock(void)
228{ 126{
229 return mc146818_get_cmos_time(); 127 return mc146818_get_cmos_time();
230} 128}
231 129
232void __init mips_time_init(void) 130void __init plat_time_init(void)
233{ 131{
234 unsigned int est_freq; 132 unsigned int est_freq;
235 133
236 /* Set Data mode - binary. */ 134 /* Set Data mode - binary. */
237 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); 135 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
238 136
239 est_freq = estimate_cpu_frequency (); 137 est_freq = estimate_cpu_frequency();
240 138
241 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 139 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
242 (est_freq%1000000)*100/1000000); 140 (est_freq%1000000)*100/1000000);
@@ -244,38 +142,37 @@ void __init mips_time_init(void)
244 cpu_khz = est_freq / 1000; 142 cpu_khz = est_freq / 1000;
245 143
246 mips_scroll_message(); 144 mips_scroll_message();
145#ifdef CONFIG_I8253 /* Only Malta has a PIT */
146 setup_pit_timer();
147#endif
247} 148}
248 149
249irqreturn_t mips_perf_interrupt(int irq, void *dev_id) 150//static irqreturn_t mips_perf_interrupt(int irq, void *dev_id)
250{ 151//{
251 return perf_irq(); 152// return perf_irq();
252} 153//}
253 154
254static struct irqaction perf_irqaction = { 155//static struct irqaction perf_irqaction = {
255 .handler = mips_perf_interrupt, 156// .handler = mips_perf_interrupt,
256 .flags = IRQF_DISABLED | IRQF_PERCPU, 157// .flags = IRQF_DISABLED | IRQF_PERCPU,
257 .name = "performance", 158// .name = "performance",
258}; 159//};
259 160
260void __init plat_perf_setup(struct irqaction *irq) 161void __init plat_perf_setup(void)
261{ 162{
163// struct irqaction *irq = &perf_irqaction;
164
262 cp0_perfcount_irq = -1; 165 cp0_perfcount_irq = -1;
263 166
264#ifdef MSC01E_INT_BASE 167#ifdef MSC01E_INT_BASE
265 if (cpu_has_veic) { 168 if (cpu_has_veic) {
266 set_vi_handler (MSC01E_INT_PERFCTR, mips_perf_dispatch); 169 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
267 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR; 170 cp0_perfcount_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
268 } else 171 } else
269#endif 172#endif
270 if (cp0_perfcount_irq >= 0) { 173 if (cp0_perfcount_irq >= 0) {
271 if (cpu_has_vint) 174 if (cpu_has_vint)
272 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); 175 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
273#ifdef CONFIG_MIPS_MT_SMTC
274 setup_irq_smtc(cp0_perfcount_irq, irq,
275 0x100 << cp0_perfcount_irq);
276#else
277 setup_irq(cp0_perfcount_irq, irq);
278#endif /* CONFIG_MIPS_MT_SMTC */
279#ifdef CONFIG_SMP 176#ifdef CONFIG_SMP
280 set_irq_handler(cp0_perfcount_irq, handle_percpu_irq); 177 set_irq_handler(cp0_perfcount_irq, handle_percpu_irq);
281#endif 178#endif
@@ -286,7 +183,7 @@ void __init plat_timer_setup(struct irqaction *irq)
286{ 183{
287#ifdef MSC01E_INT_BASE 184#ifdef MSC01E_INT_BASE
288 if (cpu_has_veic) { 185 if (cpu_has_veic) {
289 set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); 186 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
290 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; 187 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
291 } 188 }
292 else 189 else
@@ -297,8 +194,6 @@ void __init plat_timer_setup(struct irqaction *irq)
297 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; 194 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
298 } 195 }
299 196
300 /* we are using the cpu counter for timer interrupts */
301 irq->handler = mips_timer_interrupt; /* we use our own handler */
302#ifdef CONFIG_MIPS_MT_SMTC 197#ifdef CONFIG_MIPS_MT_SMTC
303 setup_irq_smtc(mips_cpu_timer_irq, irq, 0x100 << cp0_compare_irq); 198 setup_irq_smtc(mips_cpu_timer_irq, irq, 0x100 << cp0_compare_irq);
304#else 199#else
@@ -308,5 +203,5 @@ void __init plat_timer_setup(struct irqaction *irq)
308 set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); 203 set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
309#endif 204#endif
310 205
311 plat_perf_setup(&perf_irqaction); 206 plat_perf_setup();
312} 207}
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index b73f21823c5e..f010261b75d8 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -124,7 +124,7 @@ static void corehi_irqdispatch(void)
124{ 124{
125 unsigned int intedge, intsteer, pcicmd, pcibadaddr; 125 unsigned int intedge, intsteer, pcicmd, pcibadaddr;
126 unsigned int pcimstat, intisr, inten, intpol; 126 unsigned int pcimstat, intisr, inten, intpol;
127 unsigned int intrcause,datalo,datahi; 127 unsigned int intrcause, datalo, datahi;
128 struct pt_regs *regs = get_irq_regs(); 128 struct pt_regs *regs = get_irq_regs();
129 129
130 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n"); 130 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
@@ -178,7 +178,7 @@ static void corehi_irqdispatch(void)
178 178
179static inline int clz(unsigned long x) 179static inline int clz(unsigned long x)
180{ 180{
181 __asm__ ( 181 __asm__(
182 " .set push \n" 182 " .set push \n"
183 " .set mips32 \n" 183 " .set mips32 \n"
184 " clz %0, %1 \n" 184 " clz %0, %1 \n"
@@ -303,32 +303,32 @@ void __init arch_init_irq(void)
303 case MIPS_REVISION_SCON_SOCIT: 303 case MIPS_REVISION_SCON_SOCIT:
304 case MIPS_REVISION_SCON_ROCIT: 304 case MIPS_REVISION_SCON_ROCIT:
305 if (cpu_has_veic) 305 if (cpu_has_veic)
306 init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); 306 init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
307 else 307 else
308 init_msc_irqs (MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); 308 init_msc_irqs(MIPS_MSC01_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
309 break; 309 break;
310 310
311 case MIPS_REVISION_SCON_SOCITSC: 311 case MIPS_REVISION_SCON_SOCITSC:
312 case MIPS_REVISION_SCON_SOCITSCP: 312 case MIPS_REVISION_SCON_SOCITSCP:
313 if (cpu_has_veic) 313 if (cpu_has_veic)
314 init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); 314 init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
315 else 315 else
316 init_msc_irqs (MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); 316 init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs);
317 } 317 }
318 318
319 if (cpu_has_veic) { 319 if (cpu_has_veic) {
320 set_vi_handler (MSC01E_INT_I8259A, malta_hw0_irqdispatch); 320 set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
321 set_vi_handler (MSC01E_INT_COREHI, corehi_irqdispatch); 321 set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
322 setup_irq (MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq); 322 setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
323 setup_irq (MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction); 323 setup_irq(MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
324 } 324 }
325 else if (cpu_has_vint) { 325 else if (cpu_has_vint) {
326 set_vi_handler (MIPSCPU_INT_I8259A, malta_hw0_irqdispatch); 326 set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
327 set_vi_handler (MIPSCPU_INT_COREHI, corehi_irqdispatch); 327 set_vi_handler(MIPSCPU_INT_COREHI, corehi_irqdispatch);
328#ifdef CONFIG_MIPS_MT_SMTC 328#ifdef CONFIG_MIPS_MT_SMTC
329 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq, 329 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
330 (0x100 << MIPSCPU_INT_I8259A)); 330 (0x100 << MIPSCPU_INT_I8259A));
331 setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, 331 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI)); 332 &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
333 /* 333 /*
334 * Temporary hack to ensure that the subsidiary device 334 * Temporary hack to ensure that the subsidiary device
@@ -343,12 +343,12 @@ void __init arch_init_irq(void)
343 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A); 343 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
344 } 344 }
345#else /* Not SMTC */ 345#else /* Not SMTC */
346 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); 346 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
347 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); 347 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
348#endif /* CONFIG_MIPS_MT_SMTC */ 348#endif /* CONFIG_MIPS_MT_SMTC */
349 } 349 }
350 else { 350 else {
351 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); 351 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
352 setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); 352 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);
353 } 353 }
354} 354}
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 8f1b78dfd89f..9a2636e56243 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -36,7 +36,6 @@
36#endif 36#endif
37 37
38extern void mips_reboot_setup(void); 38extern void mips_reboot_setup(void);
39extern void mips_time_init(void);
40extern unsigned long mips_rtc_get_time(void); 39extern unsigned long mips_rtc_get_time(void);
41 40
42#ifdef CONFIG_KGDB 41#ifdef CONFIG_KGDB
@@ -100,7 +99,7 @@ void __init plat_mem_setup(void)
100 enable_dma(4); 99 enable_dma(4);
101 100
102#ifdef CONFIG_KGDB 101#ifdef CONFIG_KGDB
103 kgdb_config (); 102 kgdb_config();
104#endif 103#endif
105 104
106 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { 105 if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
@@ -109,7 +108,7 @@ void __init plat_mem_setup(void)
109 argptr = prom_getcmdline(); 108 argptr = prom_getcmdline();
110 if (strstr(argptr, "debug")) { 109 if (strstr(argptr, "debug")) {
111 BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; 110 BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
112 printk ("Enabled Bonito debug mode\n"); 111 printk("Enabled Bonito debug mode\n");
113 } 112 }
114 else 113 else
115 BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; 114 BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
@@ -160,14 +159,14 @@ void __init plat_mem_setup(void)
160 if (pciclock != 33 && !strstr (argptr, "idebus=")) { 159 if (pciclock != 33 && !strstr (argptr, "idebus=")) {
161 printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock); 160 printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
162 argptr += strlen(argptr); 161 argptr += strlen(argptr);
163 sprintf (argptr, " idebus=%d", pciclock); 162 sprintf(argptr, " idebus=%d", pciclock);
164 if (pciclock < 20 || pciclock > 66) 163 if (pciclock < 20 || pciclock > 66)
165 printk ("WARNING: IDE timing calculations will be incorrect\n"); 164 printk("WARNING: IDE timing calculations will be incorrect\n");
166 } 165 }
167 } 166 }
168#endif 167#endif
169#ifdef CONFIG_BLK_DEV_FD 168#ifdef CONFIG_BLK_DEV_FD
170 fd_activate (); 169 fd_activate();
171#endif 170#endif
172#ifdef CONFIG_VT 171#ifdef CONFIG_VT
173#if defined(CONFIG_VGA_CONSOLE) 172#if defined(CONFIG_VGA_CONSOLE)
@@ -177,7 +176,7 @@ void __init plat_mem_setup(void)
177 0, /* orig-video-page */ 176 0, /* orig-video-page */
178 0, /* orig-video-mode */ 177 0, /* orig-video-mode */
179 80, /* orig-video-cols */ 178 80, /* orig-video-cols */
180 0,0,0, /* ega_ax, ega_bx, ega_cx */ 179 0, 0, 0, /* ega_ax, ega_bx, ega_cx */
181 25, /* orig-video-lines */ 180 25, /* orig-video-lines */
182 VIDEO_TYPE_VGAC, /* orig-video-isVGA */ 181 VIDEO_TYPE_VGAC, /* orig-video-isVGA */
183 16 /* orig-video-points */ 182 16 /* orig-video-points */
@@ -185,7 +184,4 @@ void __init plat_mem_setup(void)
185#endif 184#endif
186#endif 185#endif
187 mips_reboot_setup(); 186 mips_reboot_setup();
188
189 board_time_init = mips_time_init;
190 rtc_mips_get_time = mips_rtc_get_time;
191} 187}
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c
index ae05d058cb37..5c980f4a48fe 100644
--- a/arch/mips/mips-boards/malta/malta_smtc.c
+++ b/arch/mips/mips-boards/malta/malta_smtc.c
@@ -88,3 +88,53 @@ void __cpuinit prom_smp_finish(void)
88void prom_cpus_done(void) 88void prom_cpus_done(void)
89{ 89{
90} 90}
91
92#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
93/*
94 * IRQ affinity hook
95 */
96
97
98void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
99{
100 cpumask_t tmask = affinity;
101 int cpu = 0;
102 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
103
104 /*
105 * On the legacy Malta development board, all I/O interrupts
106 * are routed through the 8259 and combined in a single signal
107 * to the CPU daughterboard, and on the CoreFPGA2/3 34K models,
108 * that signal is brought to IP2 of both VPEs. To avoid racing
109 * concurrent interrupt service events, IP2 is enabled only on
110 * one VPE, by convention VPE0. So long as no bits are ever
111 * cleared in the affinity mask, there will never be any
112 * interrupt forwarding. But as soon as a program or operator
113 * sets affinity for one of the related IRQs, we need to make
114 * sure that we don't ever try to forward across the VPE boundry,
115 * at least not until we engineer a system where the interrupt
116 * _ack() or _end() function can somehow know that it corresponds
117 * to an interrupt taken on another VPE, and perform the appropriate
118 * restoration of Status.IM state using MFTR/MTTR instead of the
119 * normal local behavior. We also ensure that no attempt will
120 * be made to forward to an offline "CPU".
121 */
122
123 for_each_cpu_mask(cpu, affinity) {
124 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
125 cpu_clear(cpu, tmask);
126 }
127 irq_desc[irq].affinity = tmask;
128
129 if (cpus_empty(tmask))
130 /*
131 * We could restore a default mask here, but the
132 * runtime code can anyway deal with the null set
133 */
134 printk(KERN_WARNING
135 "IRQ affinity leaves no legal CPU for IRQ %d\n", irq);
136
137 /* Do any generic SMTC IRQ affinity setup */
138 smtc_set_irq_affinity(irq, tmask);
139}
140#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index 9ca0f82f1360..ec6dd194c14a 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -31,7 +31,7 @@
31 31
32static inline int clz(unsigned long x) 32static inline int clz(unsigned long x)
33{ 33{
34 __asm__ ( 34 __asm__(
35 " .set push \n" 35 " .set push \n"
36 " .set mips32 \n" 36 " .set mips32 \n"
37 " clz %0, %1 \n" 37 " clz %0, %1 \n"
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index 5f70eaf01fab..1fb61b852304 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -35,7 +35,6 @@
35#include <asm/time.h> 35#include <asm/time.h>
36 36
37extern void mips_reboot_setup(void); 37extern void mips_reboot_setup(void);
38extern void mips_time_init(void);
39 38
40static void __init serial_init(void); 39static void __init serial_init(void);
41 40
@@ -50,9 +49,7 @@ void __init plat_mem_setup(void)
50{ 49{
51 ioport_resource.end = 0x7fffffff; 50 ioport_resource.end = 0x7fffffff;
52 51
53 serial_init (); 52 serial_init();
54
55 board_time_init = mips_time_init;
56 53
57 mips_reboot_setup(); 54 mips_reboot_setup();
58} 55}
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
index 5cbc3509ab52..46067ad542dc 100644
--- a/arch/mips/mipssim/sim_int.c
+++ b/arch/mips/mipssim/sim_int.c
@@ -25,7 +25,7 @@
25 25
26static inline int clz(unsigned long x) 26static inline int clz(unsigned long x)
27{ 27{
28 __asm__ ( 28 __asm__(
29 " .set push \n" 29 " .set push \n"
30 " .set mips32 \n" 30 " .set mips32 \n"
31 " clz %0, %1 \n" 31 " clz %0, %1 \n"
diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c
index 2312483eb838..953d836a7713 100644
--- a/arch/mips/mipssim/sim_mem.c
+++ b/arch/mips/mipssim/sim_mem.c
@@ -69,7 +69,7 @@ struct prom_pmemblock * __init prom_getmdesc(void)
69 return &mdesc[0]; 69 return &mdesc[0];
70} 70}
71 71
72static int __init prom_memtype_classify (unsigned int type) 72static int __init prom_memtype_classify(unsigned int type)
73{ 73{
74 switch (type) { 74 switch (type) {
75 case simmem_free: 75 case simmem_free:
@@ -90,7 +90,7 @@ void __init prom_meminit(void)
90 long type; 90 long type;
91 unsigned long base, size; 91 unsigned long base, size;
92 92
93 type = prom_memtype_classify (p->type); 93 type = prom_memtype_classify(p->type);
94 base = p->base; 94 base = p->base;
95 size = p->size; 95 size = p->size;
96 96
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index d012719c4d24..452c129d02c1 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -36,7 +36,6 @@
36#include <asm/mips-boards/simint.h> 36#include <asm/mips-boards/simint.h>
37 37
38 38
39extern void sim_time_init(void);
40static void __init serial_init(void); 39static void __init serial_init(void);
41unsigned int _isbonito = 0; 40unsigned int _isbonito = 0;
42 41
@@ -54,7 +53,6 @@ void __init plat_mem_setup(void)
54 53
55 serial_init(); 54 serial_init();
56 55
57 board_time_init = sim_time_init;
58 pr_info("Linux started...\n"); 56 pr_info("Linux started...\n");
59 57
60#ifdef CONFIG_MIPS_MT_SMP 58#ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index a0f5a5dca1b2..e7fa0d1078a3 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -23,77 +23,6 @@
23 23
24unsigned long cpu_khz; 24unsigned long cpu_khz;
25 25
26irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
27{
28#ifdef CONFIG_SMP
29 int cpu = smp_processor_id();
30
31 /*
32 * CPU 0 handles the global timer interrupt job
33 * resets count/compare registers to trigger next timer int.
34 */
35#ifndef CONFIG_MIPS_MT_SMTC
36 if (cpu == 0) {
37 timer_interrupt(irq, dev_id);
38 } else {
39 /* Everyone else needs to reset the timer int here as
40 ll_local_timer_interrupt doesn't */
41 /*
42 * FIXME: need to cope with counter underflow.
43 * More support needs to be added to kernel/time for
44 * counter/timer interrupts on multiple CPU's
45 */
46 write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
47 }
48#else /* SMTC */
49 /*
50 * In SMTC system, one Count/Compare set exists per VPE.
51 * Which TC within a VPE gets the interrupt is essentially
52 * random - we only know that it shouldn't be one with
53 * IXMT set. Whichever TC gets the interrupt needs to
54 * send special interprocessor interrupts to the other
55 * TCs to make sure that they schedule, etc.
56 *
57 * That code is specific to the SMTC kernel, not to
58 * the simulation platform, so it's invoked from
59 * the general MIPS timer_interrupt routine.
60 *
61 * We have a problem in that the interrupt vector code
62 * had to turn off the timer IM bit to avoid redundant
63 * entries, but we may never get to mips_cpu_irq_end
64 * to turn it back on again if the scheduler gets
65 * involved. So we clear the pending timer here,
66 * and re-enable the mask...
67 */
68
69 int vpflags = dvpe();
70 write_c0_compare (read_c0_count() - 1);
71 clear_c0_cause(0x100 << cp0_compare_irq);
72 set_c0_status(0x100 << cp0_compare_irq);
73 irq_enable_hazard();
74 evpe(vpflags);
75
76 if (cpu_data[cpu].vpe_id == 0)
77 timer_interrupt(irq, dev_id);
78 else
79 write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
80 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
81
82#endif /* CONFIG_MIPS_MT_SMTC */
83
84 /*
85 * every CPU should do profiling and process accounting
86 */
87 local_timer_interrupt (irq, dev_id);
88
89 return IRQ_HANDLED;
90#else
91 return timer_interrupt (irq, dev_id);
92#endif
93}
94
95
96
97/* 26/*
98 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect 27 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
99 */ 28 */
@@ -146,7 +75,7 @@ static unsigned int __init estimate_cpu_frequency(void)
146 return count; 75 return count;
147} 76}
148 77
149void __init sim_time_init(void) 78void __init plat_time_init(void)
150{ 79{
151 unsigned int est_freq, flags; 80 unsigned int est_freq, flags;
152 81
@@ -155,7 +84,7 @@ void __init sim_time_init(void)
155 /* Set Data mode - binary. */ 84 /* Set Data mode - binary. */
156 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); 85 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
157 86
158 est_freq = estimate_cpu_frequency (); 87 est_freq = estimate_cpu_frequency();
159 88
160 printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, 89 printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
161 (est_freq % 1000000) * 100 / 1000000); 90 (est_freq % 1000000) * 100 / 1000000);
@@ -185,7 +114,6 @@ void __init plat_timer_setup(struct irqaction *irq)
185 } 114 }
186 115
187 /* we are using the cpu counter for timer interrupts */ 116 /* we are using the cpu counter for timer interrupts */
188 irq->handler = sim_timer_interrupt;
189 setup_irq(mips_cpu_timer_irq, irq); 117 setup_irq(mips_cpu_timer_irq, irq);
190 118
191#ifdef CONFIG_SMP 119#ifdef CONFIG_SMP
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 43e4810dcaa8..32fd5db95774 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -22,7 +22,7 @@ obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
22obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o 22obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o
23obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 23obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
24obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 24obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
25obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \ 25obj-$(CONFIG_CPU_SB1) += c-r4k.o cerr-sb1.o cex-sb1.o pg-sb1.o \
26 tlb-r4k.o 26 tlb-r4k.o
27obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o 27obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o
28obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o 28obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 59868a1edf66..c55312f6fd3a 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -121,7 +121,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end)
121 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); 121 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
122 122
123 for (i = 0; i < size; i += 0x080) { 123 for (i = 0; i < size; i += 0x080) {
124 asm ( "sb\t$0, 0x000(%0)\n\t" 124 asm( "sb\t$0, 0x000(%0)\n\t"
125 "sb\t$0, 0x004(%0)\n\t" 125 "sb\t$0, 0x004(%0)\n\t"
126 "sb\t$0, 0x008(%0)\n\t" 126 "sb\t$0, 0x008(%0)\n\t"
127 "sb\t$0, 0x00c(%0)\n\t" 127 "sb\t$0, 0x00c(%0)\n\t"
@@ -178,7 +178,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
178 write_c0_status((ST0_ISC|flags)&~ST0_IEC); 178 write_c0_status((ST0_ISC|flags)&~ST0_IEC);
179 179
180 for (i = 0; i < size; i += 0x080) { 180 for (i = 0; i < size; i += 0x080) {
181 asm ( "sb\t$0, 0x000(%0)\n\t" 181 asm( "sb\t$0, 0x000(%0)\n\t"
182 "sb\t$0, 0x004(%0)\n\t" 182 "sb\t$0, 0x004(%0)\n\t"
183 "sb\t$0, 0x008(%0)\n\t" 183 "sb\t$0, 0x008(%0)\n\t"
184 "sb\t$0, 0x00c(%0)\n\t" 184 "sb\t$0, 0x00c(%0)\n\t"
@@ -217,8 +217,8 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
217 write_c0_status(flags); 217 write_c0_status(flags);
218} 218}
219 219
220static inline unsigned long get_phys_page (unsigned long addr, 220static inline unsigned long get_phys_page(unsigned long addr,
221 struct mm_struct *mm) 221 struct mm_struct *mm)
222{ 222{
223 pgd_t *pgd; 223 pgd_t *pgd;
224 pud_t *pud; 224 pud_t *pud;
@@ -281,13 +281,13 @@ static void r3k_flush_cache_sigtramp(unsigned long addr)
281 write_c0_status(flags&~ST0_IEC); 281 write_c0_status(flags&~ST0_IEC);
282 282
283 /* Fill the TLB to avoid an exception with caches isolated. */ 283 /* Fill the TLB to avoid an exception with caches isolated. */
284 asm ( "lw\t$0, 0x000(%0)\n\t" 284 asm( "lw\t$0, 0x000(%0)\n\t"
285 "lw\t$0, 0x004(%0)\n\t" 285 "lw\t$0, 0x004(%0)\n\t"
286 : : "r" (addr) ); 286 : : "r" (addr) );
287 287
288 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); 288 write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC);
289 289
290 asm ( "sb\t$0, 0x000(%0)\n\t" 290 asm( "sb\t$0, 0x000(%0)\n\t"
291 "sb\t$0, 0x004(%0)\n\t" 291 "sb\t$0, 0x004(%0)\n\t"
292 : : "r" (addr) ); 292 : : "r" (addr) );
293 293
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index bad571971bf6..971f6c047b8a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -8,7 +8,9 @@
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/highmem.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/linkage.h>
12#include <linux/sched.h> 14#include <linux/sched.h>
13#include <linux/mm.h> 15#include <linux/mm.h>
14#include <linux/bitops.h> 16#include <linux/bitops.h>
@@ -162,12 +164,12 @@ static inline void tx49_blast_icache32(void)
162 /* I'm in even chunk. blast odd chunks */ 164 /* I'm in even chunk. blast odd chunks */
163 for (ws = 0; ws < ws_end; ws += ws_inc) 165 for (ws = 0; ws < ws_end; ws += ws_inc)
164 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 166 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
165 cache32_unroll32(addr|ws,Index_Invalidate_I); 167 cache32_unroll32(addr|ws, Index_Invalidate_I);
166 CACHE32_UNROLL32_ALIGN; 168 CACHE32_UNROLL32_ALIGN;
167 /* I'm in odd chunk. blast even chunks */ 169 /* I'm in odd chunk. blast even chunks */
168 for (ws = 0; ws < ws_end; ws += ws_inc) 170 for (ws = 0; ws < ws_end; ws += ws_inc)
169 for (addr = start; addr < end; addr += 0x400 * 2) 171 for (addr = start; addr < end; addr += 0x400 * 2)
170 cache32_unroll32(addr|ws,Index_Invalidate_I); 172 cache32_unroll32(addr|ws, Index_Invalidate_I);
171} 173}
172 174
173static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page) 175static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
@@ -193,12 +195,12 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
193 /* I'm in even chunk. blast odd chunks */ 195 /* I'm in even chunk. blast odd chunks */
194 for (ws = 0; ws < ws_end; ws += ws_inc) 196 for (ws = 0; ws < ws_end; ws += ws_inc)
195 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 197 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
196 cache32_unroll32(addr|ws,Index_Invalidate_I); 198 cache32_unroll32(addr|ws, Index_Invalidate_I);
197 CACHE32_UNROLL32_ALIGN; 199 CACHE32_UNROLL32_ALIGN;
198 /* I'm in odd chunk. blast even chunks */ 200 /* I'm in odd chunk. blast even chunks */
199 for (ws = 0; ws < ws_end; ws += ws_inc) 201 for (ws = 0; ws < ws_end; ws += ws_inc)
200 for (addr = start; addr < end; addr += 0x400 * 2) 202 for (addr = start; addr < end; addr += 0x400 * 2)
201 cache32_unroll32(addr|ws,Index_Invalidate_I); 203 cache32_unroll32(addr|ws, Index_Invalidate_I);
202} 204}
203 205
204static void (* r4k_blast_icache_page)(unsigned long addr); 206static void (* r4k_blast_icache_page)(unsigned long addr);
@@ -317,23 +319,6 @@ static void __init r4k_blast_scache_setup(void)
317 r4k_blast_scache = blast_scache128; 319 r4k_blast_scache = blast_scache128;
318} 320}
319 321
320/*
321 * This is former mm's flush_cache_all() which really should be
322 * flush_cache_vunmap these days ...
323 */
324static inline void local_r4k_flush_cache_all(void * args)
325{
326 r4k_blast_dcache();
327}
328
329static void r4k_flush_cache_all(void)
330{
331 if (!cpu_has_dc_aliases)
332 return;
333
334 r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
335}
336
337static inline void local_r4k___flush_cache_all(void * args) 322static inline void local_r4k___flush_cache_all(void * args)
338{ 323{
339#if defined(CONFIG_CPU_LOONGSON2) 324#if defined(CONFIG_CPU_LOONGSON2)
@@ -343,7 +328,7 @@ static inline void local_r4k___flush_cache_all(void * args)
343 r4k_blast_dcache(); 328 r4k_blast_dcache();
344 r4k_blast_icache(); 329 r4k_blast_icache();
345 330
346 switch (current_cpu_data.cputype) { 331 switch (current_cpu_type()) {
347 case CPU_R4000SC: 332 case CPU_R4000SC:
348 case CPU_R4000MC: 333 case CPU_R4000MC:
349 case CPU_R4400SC: 334 case CPU_R4400SC:
@@ -392,10 +377,10 @@ static inline void local_r4k_flush_cache_mm(void * args)
392 * R4000SC and R4400SC indexed S-cache ops also invalidate primary 377 * R4000SC and R4400SC indexed S-cache ops also invalidate primary
393 * caches, so we can bail out early. 378 * caches, so we can bail out early.
394 */ 379 */
395 if (current_cpu_data.cputype == CPU_R4000SC || 380 if (current_cpu_type() == CPU_R4000SC ||
396 current_cpu_data.cputype == CPU_R4000MC || 381 current_cpu_type() == CPU_R4000MC ||
397 current_cpu_data.cputype == CPU_R4400SC || 382 current_cpu_type() == CPU_R4400SC ||
398 current_cpu_data.cputype == CPU_R4400MC) { 383 current_cpu_type() == CPU_R4400MC) {
399 r4k_blast_scache(); 384 r4k_blast_scache();
400 return; 385 return;
401 } 386 }
@@ -422,13 +407,14 @@ static inline void local_r4k_flush_cache_page(void *args)
422 struct flush_cache_page_args *fcp_args = args; 407 struct flush_cache_page_args *fcp_args = args;
423 struct vm_area_struct *vma = fcp_args->vma; 408 struct vm_area_struct *vma = fcp_args->vma;
424 unsigned long addr = fcp_args->addr; 409 unsigned long addr = fcp_args->addr;
425 unsigned long paddr = fcp_args->pfn << PAGE_SHIFT; 410 struct page *page = pfn_to_page(fcp_args->pfn);
426 int exec = vma->vm_flags & VM_EXEC; 411 int exec = vma->vm_flags & VM_EXEC;
427 struct mm_struct *mm = vma->vm_mm; 412 struct mm_struct *mm = vma->vm_mm;
428 pgd_t *pgdp; 413 pgd_t *pgdp;
429 pud_t *pudp; 414 pud_t *pudp;
430 pmd_t *pmdp; 415 pmd_t *pmdp;
431 pte_t *ptep; 416 pte_t *ptep;
417 void *vaddr;
432 418
433 /* 419 /*
434 * If ownes no valid ASID yet, cannot possibly have gotten 420 * If ownes no valid ASID yet, cannot possibly have gotten
@@ -450,43 +436,40 @@ static inline void local_r4k_flush_cache_page(void *args)
450 if (!(pte_val(*ptep) & _PAGE_PRESENT)) 436 if (!(pte_val(*ptep) & _PAGE_PRESENT))
451 return; 437 return;
452 438
453 /* 439 if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID))
454 * Doing flushes for another ASID than the current one is 440 vaddr = NULL;
455 * too difficult since stupid R4k caches do a TLB translation 441 else {
456 * for every cache flush operation. So we do indexed flushes 442 /*
457 * in that case, which doesn't overly flush the cache too much. 443 * Use kmap_coherent or kmap_atomic to do flushes for
458 */ 444 * another ASID than the current one.
459 if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) { 445 */
460 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { 446 if (cpu_has_dc_aliases)
461 r4k_blast_dcache_page(addr); 447 vaddr = kmap_coherent(page, addr);
462 if (exec && !cpu_icache_snoops_remote_store) 448 else
463 r4k_blast_scache_page(addr); 449 vaddr = kmap_atomic(page, KM_USER0);
464 } 450 addr = (unsigned long)vaddr;
465 if (exec)
466 r4k_blast_icache_page(addr);
467
468 return;
469 } 451 }
470 452
471 /*
472 * Do indexed flush, too much work to get the (possible) TLB refills
473 * to work correctly.
474 */
475 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { 453 if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
476 r4k_blast_dcache_page_indexed(cpu_has_pindexed_dcache ? 454 r4k_blast_dcache_page(addr);
477 paddr : addr); 455 if (exec && !cpu_icache_snoops_remote_store)
478 if (exec && !cpu_icache_snoops_remote_store) { 456 r4k_blast_scache_page(addr);
479 r4k_blast_scache_page_indexed(paddr);
480 }
481 } 457 }
482 if (exec) { 458 if (exec) {
483 if (cpu_has_vtag_icache && mm == current->active_mm) { 459 if (vaddr && cpu_has_vtag_icache && mm == current->active_mm) {
484 int cpu = smp_processor_id(); 460 int cpu = smp_processor_id();
485 461
486 if (cpu_context(cpu, mm) != 0) 462 if (cpu_context(cpu, mm) != 0)
487 drop_mmu_context(mm, cpu); 463 drop_mmu_context(mm, cpu);
488 } else 464 } else
489 r4k_blast_icache_page_indexed(addr); 465 r4k_blast_icache_page(addr);
466 }
467
468 if (vaddr) {
469 if (cpu_has_dc_aliases)
470 kunmap_coherent();
471 else
472 kunmap_atomic(vaddr, KM_USER0);
490 } 473 }
491} 474}
492 475
@@ -948,12 +931,16 @@ static void __init probe_pcache(void)
948 switch (c->cputype) { 931 switch (c->cputype) {
949 case CPU_20KC: 932 case CPU_20KC:
950 case CPU_25KF: 933 case CPU_25KF:
934 case CPU_SB1:
935 case CPU_SB1A:
951 c->dcache.flags |= MIPS_CACHE_PINDEX; 936 c->dcache.flags |= MIPS_CACHE_PINDEX;
937 break;
938
952 case CPU_R10000: 939 case CPU_R10000:
953 case CPU_R12000: 940 case CPU_R12000:
954 case CPU_R14000: 941 case CPU_R14000:
955 case CPU_SB1:
956 break; 942 break;
943
957 case CPU_24K: 944 case CPU_24K:
958 case CPU_34K: 945 case CPU_34K:
959 case CPU_74K: 946 case CPU_74K:
@@ -1210,7 +1197,7 @@ static void __init coherency_setup(void)
1210 * this bit and; some wire it to zero, others like Toshiba had the 1197 * this bit and; some wire it to zero, others like Toshiba had the
1211 * silly idea of putting something else there ... 1198 * silly idea of putting something else there ...
1212 */ 1199 */
1213 switch (current_cpu_data.cputype) { 1200 switch (current_cpu_type()) {
1214 case CPU_R4000PC: 1201 case CPU_R4000PC:
1215 case CPU_R4000SC: 1202 case CPU_R4000SC:
1216 case CPU_R4000MC: 1203 case CPU_R4000MC:
@@ -1235,11 +1222,20 @@ void __init r4k_cache_init(void)
1235{ 1222{
1236 extern void build_clear_page(void); 1223 extern void build_clear_page(void);
1237 extern void build_copy_page(void); 1224 extern void build_copy_page(void);
1238 extern char except_vec2_generic; 1225 extern char __weak except_vec2_generic;
1226 extern char __weak except_vec2_sb1;
1239 struct cpuinfo_mips *c = &current_cpu_data; 1227 struct cpuinfo_mips *c = &current_cpu_data;
1240 1228
1241 /* Default cache error handler for R4000 and R5000 family */ 1229 switch (c->cputype) {
1242 set_uncached_handler (0x100, &except_vec2_generic, 0x80); 1230 case CPU_SB1:
1231 case CPU_SB1A:
1232 set_uncached_handler(0x100, &except_vec2_sb1, 0x80);
1233 break;
1234
1235 default:
1236 set_uncached_handler(0x100, &except_vec2_generic, 0x80);
1237 break;
1238 }
1243 1239
1244 probe_pcache(); 1240 probe_pcache();
1245 setup_scache(); 1241 setup_scache();
@@ -1265,7 +1261,7 @@ void __init r4k_cache_init(void)
1265 PAGE_SIZE - 1); 1261 PAGE_SIZE - 1);
1266 else 1262 else
1267 shm_align_mask = PAGE_SIZE-1; 1263 shm_align_mask = PAGE_SIZE-1;
1268 flush_cache_all = r4k_flush_cache_all; 1264 flush_cache_all = cache_noop;
1269 __flush_cache_all = r4k___flush_cache_all; 1265 __flush_cache_all = r4k___flush_cache_all;
1270 flush_cache_mm = r4k_flush_cache_mm; 1266 flush_cache_mm = r4k_flush_cache_mm;
1271 flush_cache_page = r4k_flush_cache_page; 1267 flush_cache_page = r4k_flush_cache_page;
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
deleted file mode 100644
index 85ce2842d0da..000000000000
--- a/arch/mips/mm/c-sb1.c
+++ /dev/null
@@ -1,535 +0,0 @@
1/*
2 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
3 * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
4 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
5 * Copyright (C) 2004 Maciej W. Rozycki
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21#include <linux/init.h>
22#include <linux/hardirq.h>
23
24#include <asm/asm.h>
25#include <asm/bootinfo.h>
26#include <asm/cacheops.h>
27#include <asm/cpu.h>
28#include <asm/mipsregs.h>
29#include <asm/mmu_context.h>
30#include <asm/uaccess.h>
31
32extern void sb1_dma_init(void);
33
34/* These are probed at ld_mmu time */
35static unsigned long icache_size;
36static unsigned long dcache_size;
37
38static unsigned short icache_line_size;
39static unsigned short dcache_line_size;
40
41static unsigned int icache_index_mask;
42static unsigned int dcache_index_mask;
43
44static unsigned short icache_assoc;
45static unsigned short dcache_assoc;
46
47static unsigned short icache_sets;
48static unsigned short dcache_sets;
49
50static unsigned int icache_range_cutoff;
51static unsigned int dcache_range_cutoff;
52
53static inline void sb1_on_each_cpu(void (*func) (void *info), void *info,
54 int retry, int wait)
55{
56 preempt_disable();
57 smp_call_function(func, info, retry, wait);
58 func(info);
59 preempt_enable();
60}
61
62/*
63 * The dcache is fully coherent to the system, with one
64 * big caveat: the instruction stream. In other words,
65 * if we miss in the icache, and have dirty data in the
66 * L1 dcache, then we'll go out to memory (or the L2) and
67 * get the not-as-recent data.
68 *
69 * So the only time we have to flush the dcache is when
70 * we're flushing the icache. Since the L2 is fully
71 * coherent to everything, including I/O, we never have
72 * to flush it
73 */
74
75#define cache_set_op(op, addr) \
76 __asm__ __volatile__( \
77 " .set noreorder \n" \
78 " .set mips64\n\t \n" \
79 " cache %0, (0<<13)(%1) \n" \
80 " cache %0, (1<<13)(%1) \n" \
81 " cache %0, (2<<13)(%1) \n" \
82 " cache %0, (3<<13)(%1) \n" \
83 " .set mips0 \n" \
84 " .set reorder" \
85 : \
86 : "i" (op), "r" (addr))
87
88#define sync() \
89 __asm__ __volatile( \
90 " .set mips64\n\t \n" \
91 " sync \n" \
92 " .set mips0")
93
94#define mispredict() \
95 __asm__ __volatile__( \
96 " bnezl $0, 1f \n" /* Force mispredict */ \
97 "1: \n");
98
99/*
100 * Writeback and invalidate the entire dcache
101 */
102static inline void __sb1_writeback_inv_dcache_all(void)
103{
104 unsigned long addr = 0;
105
106 while (addr < dcache_line_size * dcache_sets) {
107 cache_set_op(Index_Writeback_Inv_D, addr);
108 addr += dcache_line_size;
109 }
110}
111
112/*
113 * Writeback and invalidate a range of the dcache. The addresses are
114 * virtual, and since we're using index ops and bit 12 is part of both
115 * the virtual frame and physical index, we have to clear both sets
116 * (bit 12 set and cleared).
117 */
118static inline void __sb1_writeback_inv_dcache_range(unsigned long start,
119 unsigned long end)
120{
121 unsigned long index;
122
123 start &= ~(dcache_line_size - 1);
124 end = (end + dcache_line_size - 1) & ~(dcache_line_size - 1);
125
126 while (start != end) {
127 index = start & dcache_index_mask;
128 cache_set_op(Index_Writeback_Inv_D, index);
129 cache_set_op(Index_Writeback_Inv_D, index ^ (1<<12));
130 start += dcache_line_size;
131 }
132 sync();
133}
134
135/*
136 * Writeback and invalidate a range of the dcache. With physical
137 * addresseses, we don't have to worry about possible bit 12 aliasing.
138 * XXXKW is it worth turning on KX and using hit ops with xkphys?
139 */
140static inline void __sb1_writeback_inv_dcache_phys_range(unsigned long start,
141 unsigned long end)
142{
143 start &= ~(dcache_line_size - 1);
144 end = (end + dcache_line_size - 1) & ~(dcache_line_size - 1);
145
146 while (start != end) {
147 cache_set_op(Index_Writeback_Inv_D, start & dcache_index_mask);
148 start += dcache_line_size;
149 }
150 sync();
151}
152
153
154/*
155 * Invalidate the entire icache
156 */
157static inline void __sb1_flush_icache_all(void)
158{
159 unsigned long addr = 0;
160
161 while (addr < icache_line_size * icache_sets) {
162 cache_set_op(Index_Invalidate_I, addr);
163 addr += icache_line_size;
164 }
165}
166
167/*
168 * Invalidate a range of the icache. The addresses are virtual, and
169 * the cache is virtually indexed and tagged. However, we don't
170 * necessarily have the right ASID context, so use index ops instead
171 * of hit ops.
172 */
173static inline void __sb1_flush_icache_range(unsigned long start,
174 unsigned long end)
175{
176 start &= ~(icache_line_size - 1);
177 end = (end + icache_line_size - 1) & ~(icache_line_size - 1);
178
179 while (start != end) {
180 cache_set_op(Index_Invalidate_I, start & icache_index_mask);
181 start += icache_line_size;
182 }
183 mispredict();
184 sync();
185}
186
187/*
188 * Flush the icache for a given physical page. Need to writeback the
189 * dcache first, then invalidate the icache. If the page isn't
190 * executable, nothing is required.
191 */
192static void local_sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
193{
194 int cpu = smp_processor_id();
195
196#ifndef CONFIG_SMP
197 if (!(vma->vm_flags & VM_EXEC))
198 return;
199#endif
200
201 __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
202
203 /*
204 * Bumping the ASID is probably cheaper than the flush ...
205 */
206 if (vma->vm_mm == current->active_mm) {
207 if (cpu_context(cpu, vma->vm_mm) != 0)
208 drop_mmu_context(vma->vm_mm, cpu);
209 } else
210 __sb1_flush_icache_range(addr, addr + PAGE_SIZE);
211}
212
213#ifdef CONFIG_SMP
214struct flush_cache_page_args {
215 struct vm_area_struct *vma;
216 unsigned long addr;
217 unsigned long pfn;
218};
219
220static void sb1_flush_cache_page_ipi(void *info)
221{
222 struct flush_cache_page_args *args = info;
223
224 local_sb1_flush_cache_page(args->vma, args->addr, args->pfn);
225}
226
227/* Dirty dcache could be on another CPU, so do the IPIs */
228static void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
229{
230 struct flush_cache_page_args args;
231
232 if (!(vma->vm_flags & VM_EXEC))
233 return;
234
235 addr &= PAGE_MASK;
236 args.vma = vma;
237 args.addr = addr;
238 args.pfn = pfn;
239 sb1_on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
240}
241#else
242void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
243 __attribute__((alias("local_sb1_flush_cache_page")));
244#endif
245
246#ifdef CONFIG_SMP
247static void sb1_flush_cache_data_page_ipi(void *info)
248{
249 unsigned long start = (unsigned long)info;
250
251 __sb1_writeback_inv_dcache_range(start, start + PAGE_SIZE);
252}
253
254static void sb1_flush_cache_data_page(unsigned long addr)
255{
256 if (in_atomic())
257 __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
258 else
259 on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
260}
261#else
262
263static void local_sb1_flush_cache_data_page(unsigned long addr)
264{
265 __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
266}
267
268void sb1_flush_cache_data_page(unsigned long)
269 __attribute__((alias("local_sb1_flush_cache_data_page")));
270#endif
271
272/*
273 * Invalidate all caches on this CPU
274 */
275static void __used local_sb1___flush_cache_all(void)
276{
277 __sb1_writeback_inv_dcache_all();
278 __sb1_flush_icache_all();
279}
280
281#ifdef CONFIG_SMP
282void sb1___flush_cache_all_ipi(void *ignored)
283 __attribute__((alias("local_sb1___flush_cache_all")));
284
285static void sb1___flush_cache_all(void)
286{
287 sb1_on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
288}
289#else
290void sb1___flush_cache_all(void)
291 __attribute__((alias("local_sb1___flush_cache_all")));
292#endif
293
294/*
295 * When flushing a range in the icache, we have to first writeback
296 * the dcache for the same range, so new ifetches will see any
297 * data that was dirty in the dcache.
298 *
299 * The start/end arguments are Kseg addresses (possibly mapped Kseg).
300 */
301
302static void local_sb1_flush_icache_range(unsigned long start,
303 unsigned long end)
304{
305 /* Just wb-inv the whole dcache if the range is big enough */
306 if ((end - start) > dcache_range_cutoff)
307 __sb1_writeback_inv_dcache_all();
308 else
309 __sb1_writeback_inv_dcache_range(start, end);
310
311 /* Just flush the whole icache if the range is big enough */
312 if ((end - start) > icache_range_cutoff)
313 __sb1_flush_icache_all();
314 else
315 __sb1_flush_icache_range(start, end);
316}
317
318#ifdef CONFIG_SMP
319struct flush_icache_range_args {
320 unsigned long start;
321 unsigned long end;
322};
323
324static void sb1_flush_icache_range_ipi(void *info)
325{
326 struct flush_icache_range_args *args = info;
327
328 local_sb1_flush_icache_range(args->start, args->end);
329}
330
331void sb1_flush_icache_range(unsigned long start, unsigned long end)
332{
333 struct flush_icache_range_args args;
334
335 args.start = start;
336 args.end = end;
337 sb1_on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
338}
339#else
340void sb1_flush_icache_range(unsigned long start, unsigned long end)
341 __attribute__((alias("local_sb1_flush_icache_range")));
342#endif
343
344/*
345 * A signal trampoline must fit into a single cacheline.
346 */
347static void local_sb1_flush_cache_sigtramp(unsigned long addr)
348{
349 cache_set_op(Index_Writeback_Inv_D, addr & dcache_index_mask);
350 cache_set_op(Index_Writeback_Inv_D, (addr ^ (1<<12)) & dcache_index_mask);
351 cache_set_op(Index_Invalidate_I, addr & icache_index_mask);
352 mispredict();
353}
354
355#ifdef CONFIG_SMP
356static void sb1_flush_cache_sigtramp_ipi(void *info)
357{
358 unsigned long iaddr = (unsigned long) info;
359 local_sb1_flush_cache_sigtramp(iaddr);
360}
361
362static void sb1_flush_cache_sigtramp(unsigned long addr)
363{
364 sb1_on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
365}
366#else
367void sb1_flush_cache_sigtramp(unsigned long addr)
368 __attribute__((alias("local_sb1_flush_cache_sigtramp")));
369#endif
370
371
372/*
373 * Anything that just flushes dcache state can be ignored, as we're always
374 * coherent in dcache space. This is just a dummy function that all the
375 * nop'ed routines point to
376 */
377static void sb1_nop(void)
378{
379}
380
381/*
382 * Cache set values (from the mips64 spec)
383 * 0 - 64
384 * 1 - 128
385 * 2 - 256
386 * 3 - 512
387 * 4 - 1024
388 * 5 - 2048
389 * 6 - 4096
390 * 7 - Reserved
391 */
392
393static unsigned int decode_cache_sets(unsigned int config_field)
394{
395 if (config_field == 7) {
396 /* JDCXXX - Find a graceful way to abort. */
397 return 0;
398 }
399 return (1<<(config_field + 6));
400}
401
402/*
403 * Cache line size values (from the mips64 spec)
404 * 0 - No cache present.
405 * 1 - 4 bytes
406 * 2 - 8 bytes
407 * 3 - 16 bytes
408 * 4 - 32 bytes
409 * 5 - 64 bytes
410 * 6 - 128 bytes
411 * 7 - Reserved
412 */
413
414static unsigned int decode_cache_line_size(unsigned int config_field)
415{
416 if (config_field == 0) {
417 return 0;
418 } else if (config_field == 7) {
419 /* JDCXXX - Find a graceful way to abort. */
420 return 0;
421 }
422 return (1<<(config_field + 1));
423}
424
425/*
426 * Relevant bits of the config1 register format (from the MIPS32/MIPS64 specs)
427 *
428 * 24:22 Icache sets per way
429 * 21:19 Icache line size
430 * 18:16 Icache Associativity
431 * 15:13 Dcache sets per way
432 * 12:10 Dcache line size
433 * 9:7 Dcache Associativity
434 */
435
436static char *way_string[] = {
437 "direct mapped", "2-way", "3-way", "4-way",
438 "5-way", "6-way", "7-way", "8-way",
439};
440
441static __init void probe_cache_sizes(void)
442{
443 u32 config1;
444
445 config1 = read_c0_config1();
446 icache_line_size = decode_cache_line_size((config1 >> 19) & 0x7);
447 dcache_line_size = decode_cache_line_size((config1 >> 10) & 0x7);
448 icache_sets = decode_cache_sets((config1 >> 22) & 0x7);
449 dcache_sets = decode_cache_sets((config1 >> 13) & 0x7);
450 icache_assoc = ((config1 >> 16) & 0x7) + 1;
451 dcache_assoc = ((config1 >> 7) & 0x7) + 1;
452 icache_size = icache_line_size * icache_sets * icache_assoc;
453 dcache_size = dcache_line_size * dcache_sets * dcache_assoc;
454 /* Need to remove non-index bits for index ops */
455 icache_index_mask = (icache_sets - 1) * icache_line_size;
456 dcache_index_mask = (dcache_sets - 1) * dcache_line_size;
457 /*
458 * These are for choosing range (index ops) versus all.
459 * icache flushes all ways for each set, so drop icache_assoc.
460 * dcache flushes all ways and each setting of bit 12 for each
461 * index, so drop dcache_assoc and halve the dcache_sets.
462 */
463 icache_range_cutoff = icache_sets * icache_line_size;
464 dcache_range_cutoff = (dcache_sets / 2) * icache_line_size;
465
466 printk("Primary instruction cache %ldkB, %s, linesize %d bytes.\n",
467 icache_size >> 10, way_string[icache_assoc - 1],
468 icache_line_size);
469 printk("Primary data cache %ldkB, %s, linesize %d bytes.\n",
470 dcache_size >> 10, way_string[dcache_assoc - 1],
471 dcache_line_size);
472}
473
474/*
475 * This is called from cache.c. We have to set up all the
476 * memory management function pointers, as well as initialize
477 * the caches and tlbs
478 */
479void __init sb1_cache_init(void)
480{
481 extern char except_vec2_sb1;
482
483 /* Special cache error handler for SB1 */
484 set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
485
486 probe_cache_sizes();
487
488#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
489 sb1_dma_init();
490#endif
491
492 /*
493 * None of these are needed for the SB1 - the Dcache is
494 * physically indexed and tagged, so no virtual aliasing can
495 * occur
496 */
497 flush_cache_range = (void *) sb1_nop;
498 flush_cache_mm = (void (*)(struct mm_struct *))sb1_nop;
499 flush_cache_all = sb1_nop;
500
501 /* These routines are for Icache coherence with the Dcache */
502 flush_icache_range = sb1_flush_icache_range;
503 flush_icache_all = __sb1_flush_icache_all; /* local only */
504
505 /* This implies an Icache flush too, so can't be nop'ed */
506 flush_cache_page = sb1_flush_cache_page;
507
508 flush_cache_sigtramp = sb1_flush_cache_sigtramp;
509 local_flush_data_cache_page = (void *) sb1_nop;
510 flush_data_cache_page = sb1_flush_cache_data_page;
511
512 /* Full flush */
513 __flush_cache_all = sb1___flush_cache_all;
514
515 change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
516
517 /*
518 * This is the only way to force the update of K0 to complete
519 * before subsequent instruction fetch.
520 */
521 __asm__ __volatile__(
522 ".set push \n"
523 " .set noat \n"
524 " .set noreorder \n"
525 " .set mips3 \n"
526 " " STR(PTR_LA) " $1, 1f \n"
527 " " STR(MTC0) " $1, $14 \n"
528 " eret \n"
529 "1: .set pop"
530 :
531 :
532 : "memory");
533
534 local_sb1___flush_cache_all();
535}
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 560a6de96556..9ea121e8cdce 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -69,7 +69,7 @@ static void tx39h_dma_cache_wback_inv(unsigned long addr, unsigned long size)
69/* TX39H2,TX39H3 */ 69/* TX39H2,TX39H3 */
70static inline void tx39_blast_dcache_page(unsigned long addr) 70static inline void tx39_blast_dcache_page(unsigned long addr)
71{ 71{
72 if (current_cpu_data.cputype != CPU_TX3912) 72 if (current_cpu_type() != CPU_TX3912)
73 blast_dcache16_page(addr); 73 blast_dcache16_page(addr);
74} 74}
75 75
@@ -307,7 +307,7 @@ static __init void tx39_probe_cache(void)
307 TX39_CONF_DCS_SHIFT)); 307 TX39_CONF_DCS_SHIFT));
308 308
309 current_cpu_data.icache.linesz = 16; 309 current_cpu_data.icache.linesz = 16;
310 switch (current_cpu_data.cputype) { 310 switch (current_cpu_type()) {
311 case CPU_TX3912: 311 case CPU_TX3912:
312 current_cpu_data.icache.ways = 1; 312 current_cpu_data.icache.ways = 1;
313 current_cpu_data.dcache.ways = 1; 313 current_cpu_data.dcache.ways = 1;
@@ -341,7 +341,7 @@ void __init tx39_cache_init(void)
341 341
342 tx39_probe_cache(); 342 tx39_probe_cache();
343 343
344 switch (current_cpu_data.cputype) { 344 switch (current_cpu_type()) {
345 case CPU_TX3912: 345 case CPU_TX3912:
346 /* TX39/H core (writethru direct-map cache) */ 346 /* TX39/H core (writethru direct-map cache) */
347 flush_cache_all = tx39h_flush_icache_all; 347 flush_cache_all = tx39h_flush_icache_all;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 81f925a9a731..43dde874f414 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -3,13 +3,14 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1994 - 2003, 07 by Ralf Baechle (ralf@linux-mips.org) 6 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 MIPS Technologies, Inc. 7 * Copyright (C) 2007 MIPS Technologies, Inc.
8 */ 8 */
9#include <linux/fs.h> 9#include <linux/fs.h>
10#include <linux/fcntl.h> 10#include <linux/fcntl.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/linkage.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/sched.h> 15#include <linux/sched.h>
15#include <linux/mm.h> 16#include <linux/mm.h>
@@ -157,12 +158,6 @@ void __init cpu_cache_init(void)
157 tx39_cache_init(); 158 tx39_cache_init();
158 return; 159 return;
159 } 160 }
160 if (cpu_has_sb1_cache) {
161 extern void __weak sb1_cache_init(void);
162
163 sb1_cache_init();
164 return;
165 }
166 161
167 panic(cache_panic); 162 panic(cache_panic);
168} 163}
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 4c72e650f9b6..e7f539e3284b 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -271,14 +271,22 @@ asmlinkage void sb1_cache_error(void)
271 271
272/* Parity lookup table. */ 272/* Parity lookup table. */
273static const uint8_t parity[256] = { 273static const uint8_t parity[256] = {
274 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 274 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
275 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 275 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
276 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 276 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
277 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 277 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
278 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 278 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
279 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 279 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
280 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 280 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
281 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0 281 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
282 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
283 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
284 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
285 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
286 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
287 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
288 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
289 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
282}; 290};
283 291
284/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */ 292/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index f60b3dc0fc62..98b5e5bac02e 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -35,8 +35,8 @@ static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
35static inline int cpu_is_noncoherent_r10000(struct device *dev) 35static inline int cpu_is_noncoherent_r10000(struct device *dev)
36{ 36{
37 return !plat_device_is_coherent(dev) && 37 return !plat_device_is_coherent(dev) &&
38 (current_cpu_data.cputype == CPU_R10000 || 38 (current_cpu_type() == CPU_R10000 ||
39 current_cpu_data.cputype == CPU_R12000); 39 current_cpu_type() == CPU_R12000);
40} 40}
41 41
42void *dma_alloc_noncoherent(struct device *dev, size_t size, 42void *dma_alloc_noncoherent(struct device *dev, size_t size,
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index e47e9e9486bf..4f770ac885ce 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -347,13 +347,14 @@ void __init build_clear_page(void)
347{ 347{
348 unsigned int loop_start; 348 unsigned int loop_start;
349 unsigned long off; 349 unsigned long off;
350 int i;
350 351
351 epc = (unsigned int *) &clear_page_array; 352 epc = (unsigned int *) &clear_page_array;
352 instruction_pending = 0; 353 instruction_pending = 0;
353 store_offset = 0; 354 store_offset = 0;
354 355
355 if (cpu_has_prefetch) { 356 if (cpu_has_prefetch) {
356 switch (current_cpu_data.cputype) { 357 switch (current_cpu_type()) {
357 case CPU_TX49XX: 358 case CPU_TX49XX:
358 /* TX49 supports only Pref_Load */ 359 /* TX49 supports only Pref_Load */
359 pref_offset_clear = 0; 360 pref_offset_clear = 0;
@@ -434,12 +435,22 @@ dest = label();
434 build_jr_ra(); 435 build_jr_ra();
435 436
436 BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array)); 437 BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
438
439 pr_info("Synthesized clear page handler (%u instructions).\n",
440 (unsigned int)(epc - clear_page_array));
441
442 pr_debug("\t.set push\n");
443 pr_debug("\t.set noreorder\n");
444 for (i = 0; i < (epc - clear_page_array); i++)
445 pr_debug("\t.word 0x%08x\n", clear_page_array[i]);
446 pr_debug("\t.set pop\n");
437} 447}
438 448
439void __init build_copy_page(void) 449void __init build_copy_page(void)
440{ 450{
441 unsigned int loop_start; 451 unsigned int loop_start;
442 unsigned long off; 452 unsigned long off;
453 int i;
443 454
444 epc = (unsigned int *) &copy_page_array; 455 epc = (unsigned int *) &copy_page_array;
445 store_offset = load_offset = 0; 456 store_offset = load_offset = 0;
@@ -515,4 +526,13 @@ dest = label();
515 build_jr_ra(); 526 build_jr_ra();
516 527
517 BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array)); 528 BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
529
530 pr_info("Synthesized copy page handler (%u instructions).\n",
531 (unsigned int)(epc - copy_page_array));
532
533 pr_debug("\t.set push\n");
534 pr_debug("\t.set noreorder\n");
535 for (i = 0; i < (epc - copy_page_array); i++)
536 pr_debug("\t.word 0x%08x\n", copy_page_array[i]);
537 pr_debug("\t.set pop\n");
518} 538}
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index adb37d0a30ea..a3e98c243a89 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -188,9 +188,9 @@ static inline void copy_page_cpu(void *to, void *from)
188 : "+r" (src), "+r" (dst) 188 : "+r" (src), "+r" (dst)
189 : "r" (end) 189 : "r" (end)
190#ifdef CONFIG_64BIT 190#ifdef CONFIG_64BIT
191 : "$8","$9","$10","$11","memory"); 191 : "$8", "$9", "$10", "$11", "memory");
192#else 192#else
193 : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); 193 : "$2", "$3", "$6", "$7", "$8", "$9", "$10", "$11", "memory");
194#endif 194#endif
195} 195}
196 196
@@ -292,3 +292,11 @@ void copy_page(void *to, void *from)
292 292
293EXPORT_SYMBOL(clear_page); 293EXPORT_SYMBOL(clear_page);
294EXPORT_SYMBOL(copy_page); 294EXPORT_SYMBOL(copy_page);
295
296void __init build_clear_page(void)
297{
298}
299
300void __init build_copy_page(void)
301{
302}
diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
index c93aa6cbcaca..57df1c38e303 100644
--- a/arch/mips/mm/pgtable.c
+++ b/arch/mips/mm/pgtable.c
@@ -29,9 +29,9 @@ void show_mem(void)
29 shared += page_count(page) - 1; 29 shared += page_count(page) - 1;
30 } 30 }
31 printk("%d pages of RAM\n", total); 31 printk("%d pages of RAM\n", total);
32 printk("%d pages of HIGHMEM\n",highmem); 32 printk("%d pages of HIGHMEM\n", highmem);
33 printk("%d reserved pages\n",reserved); 33 printk("%d reserved pages\n", reserved);
34 printk("%d pages shared\n",shared); 34 printk("%d pages shared\n", shared);
35 printk("%d pages swap cached\n",cached); 35 printk("%d pages swap cached\n", cached);
36#endif 36#endif
37} 37}
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 42b50964c644..c13170bc675c 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -102,7 +102,7 @@ static inline int __init mips_sc_probe(void)
102 102
103int __init mips_sc_init(void) 103int __init mips_sc_init(void)
104{ 104{
105 int found = mips_sc_probe (); 105 int found = mips_sc_probe();
106 if (found) { 106 if (found) {
107 mips_sc_enable(); 107 mips_sc_enable();
108 bcops = &mips_sc_ops; 108 bcops = &mips_sc_ops;
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index dcd6913dc1ff..74ae0348cc92 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -491,7 +491,7 @@ void __init tlb_init(void)
491 int wired = current_cpu_data.tlbsize - ntlb; 491 int wired = current_cpu_data.tlbsize - ntlb;
492 write_c0_wired(wired); 492 write_c0_wired(wired);
493 write_c0_index(wired-1); 493 write_c0_index(wired-1);
494 printk ("Restricting TLB to %d entries\n", ntlb); 494 printk("Restricting TLB to %d entries\n", ntlb);
495 } else 495 } else
496 printk("Ignoring invalid argument ntlb=%d\n", ntlb); 496 printk("Ignoring invalid argument ntlb=%d\n", ntlb);
497 } 497 }
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 266a47d65eed..bd8409d8ff62 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -56,7 +56,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
56 int cpu = smp_processor_id(); 56 int cpu = smp_processor_id();
57 57
58 if (cpu_context(cpu, mm) != 0) 58 if (cpu_context(cpu, mm) != 0)
59 drop_mmu_context(mm,cpu); 59 drop_mmu_context(mm, cpu);
60} 60}
61 61
62void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 62void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 6c425b052442..01b0961acfb6 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -35,24 +35,24 @@
35#include <asm/smp.h> 35#include <asm/smp.h>
36#include <asm/war.h> 36#include <asm/war.h>
37 37
38static __init int __maybe_unused r45k_bvahwbug(void) 38static inline int r45k_bvahwbug(void)
39{ 39{
40 /* XXX: We should probe for the presence of this bug, but we don't. */ 40 /* XXX: We should probe for the presence of this bug, but we don't. */
41 return 0; 41 return 0;
42} 42}
43 43
44static __init int __maybe_unused r4k_250MHZhwbug(void) 44static inline int r4k_250MHZhwbug(void)
45{ 45{
46 /* XXX: We should probe for the presence of this bug, but we don't. */ 46 /* XXX: We should probe for the presence of this bug, but we don't. */
47 return 0; 47 return 0;
48} 48}
49 49
50static __init int __maybe_unused bcm1250_m3_war(void) 50static inline int __maybe_unused bcm1250_m3_war(void)
51{ 51{
52 return BCM1250_M3_WAR; 52 return BCM1250_M3_WAR;
53} 53}
54 54
55static __init int __maybe_unused r10000_llsc_war(void) 55static inline int __maybe_unused r10000_llsc_war(void)
56{ 56{
57 return R10000_LLSC_WAR; 57 return R10000_LLSC_WAR;
58} 58}
@@ -66,7 +66,7 @@ static __init int __maybe_unused r10000_llsc_war(void)
66 * why; it's not an issue caused by the core RTL. 66 * why; it's not an issue caused by the core RTL.
67 * 67 *
68 */ 68 */
69static __init int __attribute__((unused)) m4kc_tlbp_war(void) 69static int __init m4kc_tlbp_war(void)
70{ 70{
71 return (current_cpu_data.processor_id & 0xffff00) == 71 return (current_cpu_data.processor_id & 0xffff00) ==
72 (PRID_COMP_MIPS | PRID_IMP_4KC); 72 (PRID_COMP_MIPS | PRID_IMP_4KC);
@@ -140,60 +140,60 @@ struct insn {
140 | (e) << RE_SH \ 140 | (e) << RE_SH \
141 | (f) << FUNC_SH) 141 | (f) << FUNC_SH)
142 142
143static __initdata struct insn insn_table[] = { 143static struct insn insn_table[] __initdata = {
144 { insn_addiu, M(addiu_op,0,0,0,0,0), RS | RT | SIMM }, 144 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
145 { insn_addu, M(spec_op,0,0,0,0,addu_op), RS | RT | RD }, 145 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
146 { insn_and, M(spec_op,0,0,0,0,and_op), RS | RT | RD }, 146 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
147 { insn_andi, M(andi_op,0,0,0,0,0), RS | RT | UIMM }, 147 { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
148 { insn_beq, M(beq_op,0,0,0,0,0), RS | RT | BIMM }, 148 { insn_beq, M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
149 { insn_beql, M(beql_op,0,0,0,0,0), RS | RT | BIMM }, 149 { insn_beql, M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
150 { insn_bgez, M(bcond_op,0,bgez_op,0,0,0), RS | BIMM }, 150 { insn_bgez, M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM },
151 { insn_bgezl, M(bcond_op,0,bgezl_op,0,0,0), RS | BIMM }, 151 { insn_bgezl, M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM },
152 { insn_bltz, M(bcond_op,0,bltz_op,0,0,0), RS | BIMM }, 152 { insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM },
153 { insn_bltzl, M(bcond_op,0,bltzl_op,0,0,0), RS | BIMM }, 153 { insn_bltzl, M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM },
154 { insn_bne, M(bne_op,0,0,0,0,0), RS | RT | BIMM }, 154 { insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
155 { insn_daddiu, M(daddiu_op,0,0,0,0,0), RS | RT | SIMM }, 155 { insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
156 { insn_daddu, M(spec_op,0,0,0,0,daddu_op), RS | RT | RD }, 156 { insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
157 { insn_dmfc0, M(cop0_op,dmfc_op,0,0,0,0), RT | RD | SET}, 157 { insn_dmfc0, M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
158 { insn_dmtc0, M(cop0_op,dmtc_op,0,0,0,0), RT | RD | SET}, 158 { insn_dmtc0, M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
159 { insn_dsll, M(spec_op,0,0,0,0,dsll_op), RT | RD | RE }, 159 { insn_dsll, M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE },
160 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE }, 160 { insn_dsll32, M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE },
161 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE }, 161 { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE },
162 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE }, 162 { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
163 { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE }, 163 { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
164 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD }, 164 { insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
165 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 }, 165 { insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 },
166 { insn_j, M(j_op,0,0,0,0,0), JIMM }, 166 { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM },
167 { insn_jal, M(jal_op,0,0,0,0,0), JIMM }, 167 { insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM },
168 { insn_jr, M(spec_op,0,0,0,0,jr_op), RS }, 168 { insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS },
169 { insn_ld, M(ld_op,0,0,0,0,0), RS | RT | SIMM }, 169 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
170 { insn_ll, M(ll_op,0,0,0,0,0), RS | RT | SIMM }, 170 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
171 { insn_lld, M(lld_op,0,0,0,0,0), RS | RT | SIMM }, 171 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
172 { insn_lui, M(lui_op,0,0,0,0,0), RT | SIMM }, 172 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
173 { insn_lw, M(lw_op,0,0,0,0,0), RS | RT | SIMM }, 173 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
174 { insn_mfc0, M(cop0_op,mfc_op,0,0,0,0), RT | RD | SET}, 174 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
175 { insn_mtc0, M(cop0_op,mtc_op,0,0,0,0), RT | RD | SET}, 175 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
176 { insn_ori, M(ori_op,0,0,0,0,0), RS | RT | UIMM }, 176 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
177 { insn_rfe, M(cop0_op,cop_op,0,0,0,rfe_op), 0 }, 177 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
178 { insn_sc, M(sc_op,0,0,0,0,0), RS | RT | SIMM }, 178 { insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
179 { insn_scd, M(scd_op,0,0,0,0,0), RS | RT | SIMM }, 179 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
180 { insn_sd, M(sd_op,0,0,0,0,0), RS | RT | SIMM }, 180 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
181 { insn_sll, M(spec_op,0,0,0,0,sll_op), RT | RD | RE }, 181 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
182 { insn_sra, M(spec_op,0,0,0,0,sra_op), RT | RD | RE }, 182 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
183 { insn_srl, M(spec_op,0,0,0,0,srl_op), RT | RD | RE }, 183 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
184 { insn_subu, M(spec_op,0,0,0,0,subu_op), RS | RT | RD }, 184 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD },
185 { insn_sw, M(sw_op,0,0,0,0,0), RS | RT | SIMM }, 185 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
186 { insn_tlbp, M(cop0_op,cop_op,0,0,0,tlbp_op), 0 }, 186 { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 },
187 { insn_tlbwi, M(cop0_op,cop_op,0,0,0,tlbwi_op), 0 }, 187 { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 },
188 { insn_tlbwr, M(cop0_op,cop_op,0,0,0,tlbwr_op), 0 }, 188 { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 },
189 { insn_xor, M(spec_op,0,0,0,0,xor_op), RS | RT | RD }, 189 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
190 { insn_xori, M(xori_op,0,0,0,0,0), RS | RT | UIMM }, 190 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
191 { insn_invalid, 0, 0 } 191 { insn_invalid, 0, 0 }
192}; 192};
193 193
194#undef M 194#undef M
195 195
196static __init u32 build_rs(u32 arg) 196static u32 __init build_rs(u32 arg)
197{ 197{
198 if (arg & ~RS_MASK) 198 if (arg & ~RS_MASK)
199 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 199 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -201,7 +201,7 @@ static __init u32 build_rs(u32 arg)
201 return (arg & RS_MASK) << RS_SH; 201 return (arg & RS_MASK) << RS_SH;
202} 202}
203 203
204static __init u32 build_rt(u32 arg) 204static u32 __init build_rt(u32 arg)
205{ 205{
206 if (arg & ~RT_MASK) 206 if (arg & ~RT_MASK)
207 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 207 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -209,7 +209,7 @@ static __init u32 build_rt(u32 arg)
209 return (arg & RT_MASK) << RT_SH; 209 return (arg & RT_MASK) << RT_SH;
210} 210}
211 211
212static __init u32 build_rd(u32 arg) 212static u32 __init build_rd(u32 arg)
213{ 213{
214 if (arg & ~RD_MASK) 214 if (arg & ~RD_MASK)
215 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 215 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -217,7 +217,7 @@ static __init u32 build_rd(u32 arg)
217 return (arg & RD_MASK) << RD_SH; 217 return (arg & RD_MASK) << RD_SH;
218} 218}
219 219
220static __init u32 build_re(u32 arg) 220static u32 __init build_re(u32 arg)
221{ 221{
222 if (arg & ~RE_MASK) 222 if (arg & ~RE_MASK)
223 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 223 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -225,7 +225,7 @@ static __init u32 build_re(u32 arg)
225 return (arg & RE_MASK) << RE_SH; 225 return (arg & RE_MASK) << RE_SH;
226} 226}
227 227
228static __init u32 build_simm(s32 arg) 228static u32 __init build_simm(s32 arg)
229{ 229{
230 if (arg > 0x7fff || arg < -0x8000) 230 if (arg > 0x7fff || arg < -0x8000)
231 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 231 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -233,7 +233,7 @@ static __init u32 build_simm(s32 arg)
233 return arg & 0xffff; 233 return arg & 0xffff;
234} 234}
235 235
236static __init u32 build_uimm(u32 arg) 236static u32 __init build_uimm(u32 arg)
237{ 237{
238 if (arg & ~IMM_MASK) 238 if (arg & ~IMM_MASK)
239 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 239 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -241,7 +241,7 @@ static __init u32 build_uimm(u32 arg)
241 return arg & IMM_MASK; 241 return arg & IMM_MASK;
242} 242}
243 243
244static __init u32 build_bimm(s32 arg) 244static u32 __init build_bimm(s32 arg)
245{ 245{
246 if (arg > 0x1ffff || arg < -0x20000) 246 if (arg > 0x1ffff || arg < -0x20000)
247 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 247 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -252,7 +252,7 @@ static __init u32 build_bimm(s32 arg)
252 return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff); 252 return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
253} 253}
254 254
255static __init u32 build_jimm(u32 arg) 255static u32 __init build_jimm(u32 arg)
256{ 256{
257 if (arg & ~((JIMM_MASK) << 2)) 257 if (arg & ~((JIMM_MASK) << 2))
258 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 258 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -260,7 +260,7 @@ static __init u32 build_jimm(u32 arg)
260 return (arg >> 2) & JIMM_MASK; 260 return (arg >> 2) & JIMM_MASK;
261} 261}
262 262
263static __init u32 build_func(u32 arg) 263static u32 __init build_func(u32 arg)
264{ 264{
265 if (arg & ~FUNC_MASK) 265 if (arg & ~FUNC_MASK)
266 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 266 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -268,7 +268,7 @@ static __init u32 build_func(u32 arg)
268 return arg & FUNC_MASK; 268 return arg & FUNC_MASK;
269} 269}
270 270
271static __init u32 build_set(u32 arg) 271static u32 __init build_set(u32 arg)
272{ 272{
273 if (arg & ~SET_MASK) 273 if (arg & ~SET_MASK)
274 printk(KERN_WARNING "TLB synthesizer field overflow\n"); 274 printk(KERN_WARNING "TLB synthesizer field overflow\n");
@@ -315,69 +315,69 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...)
315} 315}
316 316
317#define I_u1u2u3(op) \ 317#define I_u1u2u3(op) \
318 static inline void __init i##op(u32 **buf, unsigned int a, \ 318 static inline void i##op(u32 **buf, unsigned int a, \
319 unsigned int b, unsigned int c) \ 319 unsigned int b, unsigned int c) \
320 { \ 320 { \
321 build_insn(buf, insn##op, a, b, c); \ 321 build_insn(buf, insn##op, a, b, c); \
322 } 322 }
323 323
324#define I_u2u1u3(op) \ 324#define I_u2u1u3(op) \
325 static inline void __init i##op(u32 **buf, unsigned int a, \ 325 static inline void i##op(u32 **buf, unsigned int a, \
326 unsigned int b, unsigned int c) \ 326 unsigned int b, unsigned int c) \
327 { \ 327 { \
328 build_insn(buf, insn##op, b, a, c); \ 328 build_insn(buf, insn##op, b, a, c); \
329 } 329 }
330 330
331#define I_u3u1u2(op) \ 331#define I_u3u1u2(op) \
332 static inline void __init i##op(u32 **buf, unsigned int a, \ 332 static inline void i##op(u32 **buf, unsigned int a, \
333 unsigned int b, unsigned int c) \ 333 unsigned int b, unsigned int c) \
334 { \ 334 { \
335 build_insn(buf, insn##op, b, c, a); \ 335 build_insn(buf, insn##op, b, c, a); \
336 } 336 }
337 337
338#define I_u1u2s3(op) \ 338#define I_u1u2s3(op) \
339 static inline void __init i##op(u32 **buf, unsigned int a, \ 339 static inline void i##op(u32 **buf, unsigned int a, \
340 unsigned int b, signed int c) \ 340 unsigned int b, signed int c) \
341 { \ 341 { \
342 build_insn(buf, insn##op, a, b, c); \ 342 build_insn(buf, insn##op, a, b, c); \
343 } 343 }
344 344
345#define I_u2s3u1(op) \ 345#define I_u2s3u1(op) \
346 static inline void __init i##op(u32 **buf, unsigned int a, \ 346 static inline void i##op(u32 **buf, unsigned int a, \
347 signed int b, unsigned int c) \ 347 signed int b, unsigned int c) \
348 { \ 348 { \
349 build_insn(buf, insn##op, c, a, b); \ 349 build_insn(buf, insn##op, c, a, b); \
350 } 350 }
351 351
352#define I_u2u1s3(op) \ 352#define I_u2u1s3(op) \
353 static inline void __init i##op(u32 **buf, unsigned int a, \ 353 static inline void i##op(u32 **buf, unsigned int a, \
354 unsigned int b, signed int c) \ 354 unsigned int b, signed int c) \
355 { \ 355 { \
356 build_insn(buf, insn##op, b, a, c); \ 356 build_insn(buf, insn##op, b, a, c); \
357 } 357 }
358 358
359#define I_u1u2(op) \ 359#define I_u1u2(op) \
360 static inline void __init i##op(u32 **buf, unsigned int a, \ 360 static inline void i##op(u32 **buf, unsigned int a, \
361 unsigned int b) \ 361 unsigned int b) \
362 { \ 362 { \
363 build_insn(buf, insn##op, a, b); \ 363 build_insn(buf, insn##op, a, b); \
364 } 364 }
365 365
366#define I_u1s2(op) \ 366#define I_u1s2(op) \
367 static inline void __init i##op(u32 **buf, unsigned int a, \ 367 static inline void i##op(u32 **buf, unsigned int a, \
368 signed int b) \ 368 signed int b) \
369 { \ 369 { \
370 build_insn(buf, insn##op, a, b); \ 370 build_insn(buf, insn##op, a, b); \
371 } 371 }
372 372
373#define I_u1(op) \ 373#define I_u1(op) \
374 static inline void __init i##op(u32 **buf, unsigned int a) \ 374 static inline void i##op(u32 **buf, unsigned int a) \
375 { \ 375 { \
376 build_insn(buf, insn##op, a); \ 376 build_insn(buf, insn##op, a); \
377 } 377 }
378 378
379#define I_0(op) \ 379#define I_0(op) \
380 static inline void __init i##op(u32 **buf) \ 380 static inline void i##op(u32 **buf) \
381 { \ 381 { \
382 build_insn(buf, insn##op); \ 382 build_insn(buf, insn##op); \
383 } 383 }
@@ -457,7 +457,7 @@ struct label {
457 enum label_id lab; 457 enum label_id lab;
458}; 458};
459 459
460static __init void build_label(struct label **lab, u32 *addr, 460static void __init build_label(struct label **lab, u32 *addr,
461 enum label_id l) 461 enum label_id l)
462{ 462{
463 (*lab)->addr = addr; 463 (*lab)->addr = addr;
@@ -526,34 +526,34 @@ L_LA(_r3000_write_probe_fail)
526#define i_ehb(buf) i_sll(buf, 0, 0, 3) 526#define i_ehb(buf) i_sll(buf, 0, 0, 3)
527 527
528#ifdef CONFIG_64BIT 528#ifdef CONFIG_64BIT
529static __init int __maybe_unused in_compat_space_p(long addr) 529static int __init __maybe_unused in_compat_space_p(long addr)
530{ 530{
531 /* Is this address in 32bit compat space? */ 531 /* Is this address in 32bit compat space? */
532 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L); 532 return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
533} 533}
534 534
535static __init int __maybe_unused rel_highest(long val) 535static int __init __maybe_unused rel_highest(long val)
536{ 536{
537 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000; 537 return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
538} 538}
539 539
540static __init int __maybe_unused rel_higher(long val) 540static int __init __maybe_unused rel_higher(long val)
541{ 541{
542 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000; 542 return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
543} 543}
544#endif 544#endif
545 545
546static __init int rel_hi(long val) 546static int __init rel_hi(long val)
547{ 547{
548 return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000; 548 return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
549} 549}
550 550
551static __init int rel_lo(long val) 551static int __init rel_lo(long val)
552{ 552{
553 return ((val & 0xffff) ^ 0x8000) - 0x8000; 553 return ((val & 0xffff) ^ 0x8000) - 0x8000;
554} 554}
555 555
556static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) 556static void __init i_LA_mostly(u32 **buf, unsigned int rs, long addr)
557{ 557{
558#ifdef CONFIG_64BIT 558#ifdef CONFIG_64BIT
559 if (!in_compat_space_p(addr)) { 559 if (!in_compat_space_p(addr)) {
@@ -571,7 +571,7 @@ static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
571 i_lui(buf, rs, rel_hi(addr)); 571 i_lui(buf, rs, rel_hi(addr));
572} 572}
573 573
574static __init void __maybe_unused i_LA(u32 **buf, unsigned int rs, 574static void __init __maybe_unused i_LA(u32 **buf, unsigned int rs,
575 long addr) 575 long addr)
576{ 576{
577 i_LA_mostly(buf, rs, addr); 577 i_LA_mostly(buf, rs, addr);
@@ -589,7 +589,7 @@ struct reloc {
589 enum label_id lab; 589 enum label_id lab;
590}; 590};
591 591
592static __init void r_mips_pc16(struct reloc **rel, u32 *addr, 592static void __init r_mips_pc16(struct reloc **rel, u32 *addr,
593 enum label_id l) 593 enum label_id l)
594{ 594{
595 (*rel)->addr = addr; 595 (*rel)->addr = addr;
@@ -614,7 +614,7 @@ static inline void __resolve_relocs(struct reloc *rel, struct label *lab)
614 } 614 }
615} 615}
616 616
617static __init void resolve_relocs(struct reloc *rel, struct label *lab) 617static void __init resolve_relocs(struct reloc *rel, struct label *lab)
618{ 618{
619 struct label *l; 619 struct label *l;
620 620
@@ -624,7 +624,7 @@ static __init void resolve_relocs(struct reloc *rel, struct label *lab)
624 __resolve_relocs(rel, l); 624 __resolve_relocs(rel, l);
625} 625}
626 626
627static __init void move_relocs(struct reloc *rel, u32 *first, u32 *end, 627static void __init move_relocs(struct reloc *rel, u32 *first, u32 *end,
628 long off) 628 long off)
629{ 629{
630 for (; rel->lab != label_invalid; rel++) 630 for (; rel->lab != label_invalid; rel++)
@@ -632,7 +632,7 @@ static __init void move_relocs(struct reloc *rel, u32 *first, u32 *end,
632 rel->addr += off; 632 rel->addr += off;
633} 633}
634 634
635static __init void move_labels(struct label *lab, u32 *first, u32 *end, 635static void __init move_labels(struct label *lab, u32 *first, u32 *end,
636 long off) 636 long off)
637{ 637{
638 for (; lab->lab != label_invalid; lab++) 638 for (; lab->lab != label_invalid; lab++)
@@ -640,7 +640,7 @@ static __init void move_labels(struct label *lab, u32 *first, u32 *end,
640 lab->addr += off; 640 lab->addr += off;
641} 641}
642 642
643static __init void copy_handler(struct reloc *rel, struct label *lab, 643static void __init copy_handler(struct reloc *rel, struct label *lab,
644 u32 *first, u32 *end, u32 *target) 644 u32 *first, u32 *end, u32 *target)
645{ 645{
646 long off = (long)(target - first); 646 long off = (long)(target - first);
@@ -651,7 +651,7 @@ static __init void copy_handler(struct reloc *rel, struct label *lab,
651 move_labels(lab, first, end, off); 651 move_labels(lab, first, end, off);
652} 652}
653 653
654static __init int __maybe_unused insn_has_bdelay(struct reloc *rel, 654static int __init __maybe_unused insn_has_bdelay(struct reloc *rel,
655 u32 *addr) 655 u32 *addr)
656{ 656{
657 for (; rel->lab != label_invalid; rel++) { 657 for (; rel->lab != label_invalid; rel++) {
@@ -743,11 +743,11 @@ il_bgez(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
743 * We deliberately chose a buffer size of 128, so we won't scribble 743 * We deliberately chose a buffer size of 128, so we won't scribble
744 * over anything important on overflow before we panic. 744 * over anything important on overflow before we panic.
745 */ 745 */
746static __initdata u32 tlb_handler[128]; 746static u32 tlb_handler[128] __initdata;
747 747
748/* simply assume worst case size for labels and relocs */ 748/* simply assume worst case size for labels and relocs */
749static __initdata struct label labels[128]; 749static struct label labels[128] __initdata;
750static __initdata struct reloc relocs[128]; 750static struct reloc relocs[128] __initdata;
751 751
752/* 752/*
753 * The R3000 TLB handler is simple. 753 * The R3000 TLB handler is simple.
@@ -801,7 +801,7 @@ static void __init build_r3000_tlb_refill_handler(void)
801 * other one.To keep things simple, we first assume linear space, 801 * other one.To keep things simple, we first assume linear space,
802 * then we relocate it to the final handler layout as needed. 802 * then we relocate it to the final handler layout as needed.
803 */ 803 */
804static __initdata u32 final_handler[64]; 804static u32 final_handler[64] __initdata;
805 805
806/* 806/*
807 * Hazards 807 * Hazards
@@ -825,9 +825,9 @@ static __initdata u32 final_handler[64];
825 * 825 *
826 * As if we MIPS hackers wouldn't know how to nop pipelines happy ... 826 * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
827 */ 827 */
828static __init void __maybe_unused build_tlb_probe_entry(u32 **p) 828static void __init __maybe_unused build_tlb_probe_entry(u32 **p)
829{ 829{
830 switch (current_cpu_data.cputype) { 830 switch (current_cpu_type()) {
831 /* Found by experiment: R4600 v2.0 needs this, too. */ 831 /* Found by experiment: R4600 v2.0 needs this, too. */
832 case CPU_R4600: 832 case CPU_R4600:
833 case CPU_R5000: 833 case CPU_R5000:
@@ -849,7 +849,7 @@ static __init void __maybe_unused build_tlb_probe_entry(u32 **p)
849 */ 849 */
850enum tlb_write_entry { tlb_random, tlb_indexed }; 850enum tlb_write_entry { tlb_random, tlb_indexed };
851 851
852static __init void build_tlb_write_entry(u32 **p, struct label **l, 852static void __init build_tlb_write_entry(u32 **p, struct label **l,
853 struct reloc **r, 853 struct reloc **r,
854 enum tlb_write_entry wmode) 854 enum tlb_write_entry wmode)
855{ 855{
@@ -860,7 +860,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
860 case tlb_indexed: tlbw = i_tlbwi; break; 860 case tlb_indexed: tlbw = i_tlbwi; break;
861 } 861 }
862 862
863 switch (current_cpu_data.cputype) { 863 switch (current_cpu_type()) {
864 case CPU_R4000PC: 864 case CPU_R4000PC:
865 case CPU_R4000SC: 865 case CPU_R4000SC:
866 case CPU_R4000MC: 866 case CPU_R4000MC:
@@ -908,6 +908,8 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
908 case CPU_4KSC: 908 case CPU_4KSC:
909 case CPU_20KC: 909 case CPU_20KC:
910 case CPU_25KF: 910 case CPU_25KF:
911 case CPU_BCM3302:
912 case CPU_BCM4710:
911 case CPU_LOONGSON2: 913 case CPU_LOONGSON2:
912 if (m4kc_tlbp_war()) 914 if (m4kc_tlbp_war())
913 i_nop(p); 915 i_nop(p);
@@ -991,7 +993,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
991 * TMP and PTR are scratch. 993 * TMP and PTR are scratch.
992 * TMP will be clobbered, PTR will hold the pmd entry. 994 * TMP will be clobbered, PTR will hold the pmd entry.
993 */ 995 */
994static __init void 996static void __init
995build_get_pmde64(u32 **p, struct label **l, struct reloc **r, 997build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
996 unsigned int tmp, unsigned int ptr) 998 unsigned int tmp, unsigned int ptr)
997{ 999{
@@ -1052,7 +1054,7 @@ build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
1052 * BVADDR is the faulting address, PTR is scratch. 1054 * BVADDR is the faulting address, PTR is scratch.
1053 * PTR will hold the pgd for vmalloc. 1055 * PTR will hold the pgd for vmalloc.
1054 */ 1056 */
1055static __init void 1057static void __init
1056build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, 1058build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1057 unsigned int bvaddr, unsigned int ptr) 1059 unsigned int bvaddr, unsigned int ptr)
1058{ 1060{
@@ -1116,7 +1118,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
1116 * TMP and PTR are scratch. 1118 * TMP and PTR are scratch.
1117 * TMP will be clobbered, PTR will hold the pgd entry. 1119 * TMP will be clobbered, PTR will hold the pgd entry.
1118 */ 1120 */
1119static __init void __maybe_unused 1121static void __init __maybe_unused
1120build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) 1122build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1121{ 1123{
1122 long pgdc = (long)pgd_current; 1124 long pgdc = (long)pgd_current;
@@ -1151,12 +1153,12 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
1151 1153
1152#endif /* !CONFIG_64BIT */ 1154#endif /* !CONFIG_64BIT */
1153 1155
1154static __init void build_adjust_context(u32 **p, unsigned int ctx) 1156static void __init build_adjust_context(u32 **p, unsigned int ctx)
1155{ 1157{
1156 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; 1158 unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;
1157 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); 1159 unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1);
1158 1160
1159 switch (current_cpu_data.cputype) { 1161 switch (current_cpu_type()) {
1160 case CPU_VR41XX: 1162 case CPU_VR41XX:
1161 case CPU_VR4111: 1163 case CPU_VR4111:
1162 case CPU_VR4121: 1164 case CPU_VR4121:
@@ -1177,7 +1179,7 @@ static __init void build_adjust_context(u32 **p, unsigned int ctx)
1177 i_andi(p, ctx, ctx, mask); 1179 i_andi(p, ctx, ctx, mask);
1178} 1180}
1179 1181
1180static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) 1182static void __init build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1181{ 1183{
1182 /* 1184 /*
1183 * Bug workaround for the Nevada. It seems as if under certain 1185 * Bug workaround for the Nevada. It seems as if under certain
@@ -1186,7 +1188,7 @@ static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1186 * in a different cacheline or a load instruction, probably any 1188 * in a different cacheline or a load instruction, probably any
1187 * memory reference, is between them. 1189 * memory reference, is between them.
1188 */ 1190 */
1189 switch (current_cpu_data.cputype) { 1191 switch (current_cpu_type()) {
1190 case CPU_NEVADA: 1192 case CPU_NEVADA:
1191 i_LW(p, ptr, 0, ptr); 1193 i_LW(p, ptr, 0, ptr);
1192 GET_CONTEXT(p, tmp); /* get context reg */ 1194 GET_CONTEXT(p, tmp); /* get context reg */
@@ -1202,7 +1204,7 @@ static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
1202 i_ADDU(p, ptr, ptr, tmp); /* add in offset */ 1204 i_ADDU(p, ptr, ptr, tmp); /* add in offset */
1203} 1205}
1204 1206
1205static __init void build_update_entries(u32 **p, unsigned int tmp, 1207static void __init build_update_entries(u32 **p, unsigned int tmp,
1206 unsigned int ptep) 1208 unsigned int ptep)
1207{ 1209{
1208 /* 1210 /*
@@ -1870,7 +1872,7 @@ void __init build_tlb_refill_handler(void)
1870 */ 1872 */
1871 static int run_once = 0; 1873 static int run_once = 0;
1872 1874
1873 switch (current_cpu_data.cputype) { 1875 switch (current_cpu_type()) {
1874 case CPU_R2000: 1876 case CPU_R2000:
1875 case CPU_R3000: 1877 case CPU_R3000:
1876 case CPU_R3000A: 1878 case CPU_R3000A:
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index 4e0a90b3916b..aa52aa146cea 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -74,7 +74,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
74 struct op_mips_model *lmodel = NULL; 74 struct op_mips_model *lmodel = NULL;
75 int res; 75 int res;
76 76
77 switch (current_cpu_data.cputype) { 77 switch (current_cpu_type()) {
78 case CPU_5KC: 78 case CPU_5KC:
79 case CPU_20KC: 79 case CPU_20KC:
80 case CPU_24K: 80 case CPU_24K:
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 1ea5c9c1010b..423bc2c473df 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -118,7 +118,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
118 118
119/* Program all of the registers in preparation for enabling profiling. */ 119/* Program all of the registers in preparation for enabling profiling. */
120 120
121static void mipsxx_cpu_setup (void *args) 121static void mipsxx_cpu_setup(void *args)
122{ 122{
123 unsigned int counters = op_model_mipsxx_ops.num_counters; 123 unsigned int counters = op_model_mipsxx_ops.num_counters;
124 124
@@ -222,7 +222,7 @@ static inline int n_counters(void)
222{ 222{
223 int counters; 223 int counters;
224 224
225 switch (current_cpu_data.cputype) { 225 switch (current_cpu_type()) {
226 case CPU_R10000: 226 case CPU_R10000:
227 counters = 2; 227 counters = 2;
228 break; 228 break;
@@ -274,7 +274,7 @@ static int __init mipsxx_init(void)
274#endif 274#endif
275 275
276 op_model_mipsxx_ops.num_counters = counters; 276 op_model_mipsxx_ops.num_counters = counters;
277 switch (current_cpu_data.cputype) { 277 switch (current_cpu_type()) {
278 case CPU_20KC: 278 case CPU_20KC:
279 op_model_mipsxx_ops.cpu_type = "mips/20K"; 279 op_model_mipsxx_ops.cpu_type = "mips/20K";
280 break; 280 break;
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index d29040a56aea..a45d3202894f 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -60,7 +60,7 @@ static void rm9000_reg_setup(struct op_counter_config *ctr)
60 60
61/* Program all of the registers in preparation for enabling profiling. */ 61/* Program all of the registers in preparation for enabling profiling. */
62 62
63static void rm9000_cpu_setup (void *args) 63static void rm9000_cpu_setup(void *args)
64{ 64{
65 uint64_t perfcount; 65 uint64_t perfcount;
66 66
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 4ee6800e67e6..ed0c07622baa 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -10,6 +10,7 @@ obj-y += pci.o
10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_MIPS_MSC) += ops-msc.o 12obj-$(CONFIG_MIPS_MSC) += ops-msc.o
13obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
13obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 14obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
14obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o 15obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
15obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o 16obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
19# These are still pretty much in the old state, watch, go blind. 20# These are still pretty much in the old state, watch, go blind.
20# 21#
21obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o 22obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
23obj-$(CONFIG_LASAT) += pci-lasat.o
22obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 24obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
23obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 25obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
24obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 26obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 45224fd2c7ba..506e883a8c71 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -77,12 +77,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
77 * code, but it is better than nothing... 77 * code, but it is better than nothing...
78 */ 78 */
79 79
80static void atlas_saa9730_base_fixup (struct pci_dev *pdev) 80static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
81{ 81{
82 extern void *saa9730_base; 82 extern void *saa9730_base;
83 if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19) 83 if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
84 (void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base); 84 (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
85 printk ("saa9730_base = %x\n", saa9730_base); 85 printk("saa9730_base = %x\n", saa9730_base);
86} 86}
87 87
88DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, 88DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 76b4f0ffb1e5..f7df1142912b 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -18,6 +18,24 @@
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <cobalt.h> 20#include <cobalt.h>
21#include <irq.h>
22
23/*
24 * PCI slot numbers
25 */
26#define COBALT_PCICONF_CPU 0x06
27#define COBALT_PCICONF_ETH0 0x07
28#define COBALT_PCICONF_RAQSCSI 0x08
29#define COBALT_PCICONF_VIA 0x09
30#define COBALT_PCICONF_PCISLOT 0x0A
31#define COBALT_PCICONF_ETH1 0x0C
32
33/*
34 * The Cobalt board ID information. The boards have an ID number wired
35 * into the VIA that is available in the high nibble of register 94.
36 */
37#define VIA_COBALT_BRD_ID_REG 0x94
38#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4)
21 39
22static void qube_raq_galileo_early_fixup(struct pci_dev *dev) 40static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
23{ 41{
@@ -132,29 +150,29 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
132 150
133static char irq_tab_qube1[] __initdata = { 151static char irq_tab_qube1[] __initdata = {
134 [COBALT_PCICONF_CPU] = 0, 152 [COBALT_PCICONF_CPU] = 0,
135 [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, 153 [COBALT_PCICONF_ETH0] = QUBE1_ETH0_IRQ,
136 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ, 154 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
137 [COBALT_PCICONF_VIA] = 0, 155 [COBALT_PCICONF_VIA] = 0,
138 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 156 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
139 [COBALT_PCICONF_ETH1] = 0 157 [COBALT_PCICONF_ETH1] = 0
140}; 158};
141 159
142static char irq_tab_cobalt[] __initdata = { 160static char irq_tab_cobalt[] __initdata = {
143 [COBALT_PCICONF_CPU] = 0, 161 [COBALT_PCICONF_CPU] = 0,
144 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ, 162 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
145 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ, 163 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
146 [COBALT_PCICONF_VIA] = 0, 164 [COBALT_PCICONF_VIA] = 0,
147 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 165 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
148 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ 166 [COBALT_PCICONF_ETH1] = ETH1_IRQ
149}; 167};
150 168
151static char irq_tab_raq2[] __initdata = { 169static char irq_tab_raq2[] __initdata = {
152 [COBALT_PCICONF_CPU] = 0, 170 [COBALT_PCICONF_CPU] = 0,
153 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ, 171 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
154 [COBALT_PCICONF_RAQSCSI] = COBALT_RAQ_SCSI_IRQ, 172 [COBALT_PCICONF_RAQSCSI] = RAQ2_SCSI_IRQ,
155 [COBALT_PCICONF_VIA] = 0, 173 [COBALT_PCICONF_VIA] = 0,
156 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 174 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
157 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ 175 [COBALT_PCICONF_ETH1] = ETH1_IRQ
158}; 176};
159 177
160int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 178int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 7932dfe5eb9b..6b29904acf45 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -112,7 +112,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
112 first_cfg = 0; 112 first_cfg = 0;
113 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); 113 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
114 if (!pci_cfg_vm) 114 if (!pci_cfg_vm)
115 panic (KERN_ERR "PCI unable to get vm area\n"); 115 panic(KERN_ERR "PCI unable to get vm area\n");
116 pci_cfg_wired_entry = read_c0_wired(); 116 pci_cfg_wired_entry = read_c0_wired();
117 add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); 117 add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K);
118 last_entryLo0 = last_entryLo1 = 0xffffffff; 118 last_entryLo0 = last_entryLo1 = 0xffffffff;
diff --git a/arch/mips/pci/ops-nile4.c b/arch/mips/pci/ops-nile4.c
new file mode 100644
index 000000000000..b7f0fb0210f4
--- /dev/null
+++ b/arch/mips/pci/ops-nile4.c
@@ -0,0 +1,147 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/pci.h>
4#include <asm/bootinfo.h>
5
6#include <asm/lasat/lasat.h>
7#include <asm/gt64120.h>
8#include <asm/nile4.h>
9
10#define PCI_ACCESS_READ 0
11#define PCI_ACCESS_WRITE 1
12
13#define LO(reg) (reg / 4)
14#define HI(reg) (reg / 4 + 1)
15
16volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
17
18static DEFINE_SPINLOCK(nile4_pci_lock);
19
20static int nile4_pcibios_config_access(unsigned char access_type,
21 struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
22{
23 unsigned char busnum = bus->number;
24 u32 adr, mask, err;
25
26 if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
27 /* The addressing scheme chosen leaves room for just
28 * 8 devices on the first busnum (besides the PCI
29 * controller itself) */
30 return PCIBIOS_DEVICE_NOT_FOUND;
31
32 if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
33 /* Access controller registers directly */
34 if (access_type == PCI_ACCESS_WRITE) {
35 vrc_pciregs[(0x200 + where) >> 2] = *val;
36 } else {
37 *val = vrc_pciregs[(0x200 + where) >> 2];
38 }
39 return PCIBIOS_SUCCESSFUL;
40 }
41
42 /* Temporarily map PCI Window 1 to config space */
43 mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
44 vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0);
45
46 /* Clear PCI Error register. This also clears the Error Type
47 * bits in the Control register */
48 vrc_pciregs[LO(NILE4_PCIERR)] = 0;
49 vrc_pciregs[HI(NILE4_PCIERR)] = 0;
50
51 /* Setup address */
52 if (busnum == 0)
53 adr =
54 KSEG1ADDR(PCI_WINDOW1) +
55 ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
56 | (where & ~3));
57 else
58 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) |
59 (where & ~3);
60
61 if (access_type == PCI_ACCESS_WRITE)
62 *(u32 *) adr = *val;
63 else
64 *val = *(u32 *) adr;
65
66 /* Check for master or target abort */
67 err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
68
69 /* Restore PCI Window 1 */
70 vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;
71
72 if (err)
73 return PCIBIOS_DEVICE_NOT_FOUND;
74
75 return PCIBIOS_SUCCESSFUL;
76}
77
78static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn,
79 int where, int size, u32 *val)
80{
81 unsigned long flags;
82 u32 data = 0;
83 int err;
84
85 if ((size == 2) && (where & 1))
86 return PCIBIOS_BAD_REGISTER_NUMBER;
87 else if ((size == 4) && (where & 3))
88 return PCIBIOS_BAD_REGISTER_NUMBER;
89
90 spin_lock_irqsave(&nile4_pci_lock, flags);
91 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
92 &data);
93 spin_unlock_irqrestore(&nile4_pci_lock, flags);
94
95 if (err)
96 return err;
97
98 if (size == 1)
99 *val = (data >> ((where & 3) << 3)) & 0xff;
100 else if (size == 2)
101 *val = (data >> ((where & 3) << 3)) & 0xffff;
102 else
103 *val = data;
104
105 return PCIBIOS_SUCCESSFUL;
106}
107
108static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn,
109 int where, int size, u32 val)
110{
111 unsigned long flags;
112 u32 data = 0;
113 int err;
114
115 if ((size == 2) && (where & 1))
116 return PCIBIOS_BAD_REGISTER_NUMBER;
117 else if ((size == 4) && (where & 3))
118 return PCIBIOS_BAD_REGISTER_NUMBER;
119
120 spin_lock_irqsave(&nile4_pci_lock, flags);
121 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
122 &data);
123 spin_unlock_irqrestore(&nile4_pci_lock, flags);
124
125 if (err)
126 return err;
127
128 if (size == 1)
129 data = (data & ~(0xff << ((where & 3) << 3))) |
130 (val << ((where & 3) << 3));
131 else if (size == 2)
132 data = (data & ~(0xffff << ((where & 3) << 3))) |
133 (val << ((where & 3) << 3));
134 else
135 data = val;
136
137 if (nile4_pcibios_config_access
138 (PCI_ACCESS_WRITE, bus, devfn, where, &data))
139 return -1;
140
141 return PCIBIOS_SUCCESSFUL;
142}
143
144struct pci_ops nile4_pci_ops = {
145 .read = nile4_pcibios_read,
146 .write = nile4_pcibios_write,
147};
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index fa2d2c60f797..97ed25b92edf 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
70 70
71 switch (size) { 71 switch (size) {
72 case 1: 72 case 1:
73 outb (val, PCIMT_CONFIG_DATA + (reg & 3)); 73 outb(val, PCIMT_CONFIG_DATA + (reg & 3));
74 break; 74 break;
75 case 2: 75 case 2:
76 outw (val, PCIMT_CONFIG_DATA + (reg & 2)); 76 outw(val, PCIMT_CONFIG_DATA + (reg & 2));
77 break; 77 break;
78 case 4: 78 case 4:
79 outl (val, PCIMT_CONFIG_DATA); 79 outl(val, PCIMT_CONFIG_DATA);
80 break; 80 break;
81 } 81 }
82 82
@@ -93,7 +93,7 @@ static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int r
93 if ((devfn > 255) || (reg > 255) || (busno > 255)) 93 if ((devfn > 255) || (reg > 255) || (busno > 255))
94 return PCIBIOS_BAD_REGISTER_NUMBER; 94 return PCIBIOS_BAD_REGISTER_NUMBER;
95 95
96 outl ((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); 96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8);
97 return PCIBIOS_SUCCESSFUL; 97 return PCIBIOS_SUCCESSFUL;
98} 98}
99 99
@@ -108,12 +108,12 @@ static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg,
108 * we don't do it, we will get a data bus error 108 * we don't do it, we will get a data bus error
109 */ 109 */
110 if (bus->number == 0) { 110 if (bus->number == 0) {
111 pcit_set_config_address (0, 0, 0x68); 111 pcit_set_config_address(0, 0, 0x68);
112 outl (inl (0xcfc) | 0xc0000000, 0xcfc); 112 outl(inl(0xcfc) | 0xc0000000, 0xcfc);
113 if ((res = pcit_set_config_address(0, devfn, 0))) 113 if ((res = pcit_set_config_address(0, devfn, 0)))
114 return res; 114 return res;
115 outl (0xffffffff, 0xcfc); 115 outl(0xffffffff, 0xcfc);
116 pcit_set_config_address (0, 0, 0x68); 116 pcit_set_config_address(0, 0, 0x68);
117 if (inl(0xcfc) & 0x100000) 117 if (inl(0xcfc) & 0x100000)
118 return PCIBIOS_DEVICE_NOT_FOUND; 118 return PCIBIOS_DEVICE_NOT_FOUND;
119 } 119 }
@@ -144,13 +144,13 @@ static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg,
144 144
145 switch (size) { 145 switch (size) {
146 case 1: 146 case 1:
147 outb (val, PCIMT_CONFIG_DATA + (reg & 3)); 147 outb(val, PCIMT_CONFIG_DATA + (reg & 3));
148 break; 148 break;
149 case 2: 149 case 2:
150 outw (val, PCIMT_CONFIG_DATA + (reg & 2)); 150 outw(val, PCIMT_CONFIG_DATA + (reg & 2));
151 break; 151 break;
152 case 4: 152 case 4:
153 outl (val, PCIMT_CONFIG_DATA); 153 outl(val, PCIMT_CONFIG_DATA);
154 break; 154 break;
155 } 155 }
156 156
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 2b4e30c7d105..5443ea3596f8 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -49,8 +49,8 @@
49 * Macros for calculating offsets into config space given a device 49 * Macros for calculating offsets into config space given a device
50 * structure or dev/fun/reg 50 * structure or dev/fun/reg
51 */ 51 */
52#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) 52#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
53#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 53#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
54 54
55static void *cfg_space; 55static void *cfg_space;
56 56
@@ -255,7 +255,7 @@ static int __init bcm1480_pcibios_init(void)
255 register_pci_controller(&bcm1480_controller); 255 register_pci_controller(&bcm1480_controller);
256 256
257#ifdef CONFIG_VGA_CONSOLE 257#ifdef CONFIG_VGA_CONSOLE
258 take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1); 258 take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1);
259#endif 259#endif
260 return 0; 260 return 0;
261} 261}
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index ba2e34b09231..a63e3bd6b0ac 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -48,8 +48,8 @@
48 * Macros for calculating offsets into config space given a device 48 * Macros for calculating offsets into config space given a device
49 * structure or dev/fun/reg 49 * structure or dev/fun/reg
50 */ 50 */
51#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) 51#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
52#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 52#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
53 53
54static void *ht_cfg_space; 54static void *ht_cfg_space;
55 55
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
new file mode 100644
index 000000000000..5abd5c7119be
--- /dev/null
+++ b/arch/mips/pci/pci-lasat.c
@@ -0,0 +1,91 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/pci.h>
11#include <linux/types.h>
12#include <asm/bootinfo.h>
13
14extern struct pci_ops nile4_pci_ops;
15extern struct pci_ops gt64xxx_pci0_ops;
16static struct resource lasat_pci_mem_resource = {
17 .name = "LASAT PCI MEM",
18 .start = 0x18000000,
19 .end = 0x19ffffff,
20 .flags = IORESOURCE_MEM,
21};
22
23static struct resource lasat_pci_io_resource = {
24 .name = "LASAT PCI IO",
25 .start = 0x1a000000,
26 .end = 0x1bffffff,
27 .flags = IORESOURCE_IO,
28};
29
30static struct pci_controller lasat_pci_controller = {
31 .mem_resource = &lasat_pci_mem_resource,
32 .io_resource = &lasat_pci_io_resource,
33};
34
35static int __init lasat_pci_setup(void)
36{
37 printk(KERN_DEBUG "PCI: starting\n");
38
39 switch (mips_machtype) {
40 case MACH_LASAT_100:
41 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
42 break;
43 case MACH_LASAT_200:
44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
45 break;
46 default:
47 panic("pcibios_init: mips_machtype incorrect");
48 }
49
50 register_pci_controller(&lasat_pci_controller);
51
52 return 0;
53}
54
55arch_initcall(lasat_pci_setup);
56
57#define LASATINT_ETH1 0
58#define LASATINT_ETH0 1
59#define LASATINT_HDC 2
60#define LASATINT_COMP 3
61#define LASATINT_HDLC 4
62#define LASATINT_PCIA 5
63#define LASATINT_PCIB 6
64#define LASATINT_PCIC 7
65#define LASATINT_PCID 8
66
67int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
68{
69 switch (slot) {
70 case 1:
71 case 2:
72 case 3:
73 return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
74 case 4:
75 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
76 case 5:
77 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
78 case 6:
79 return LASATINT_HDC; /* IDE controller */
80 default:
81 return 0xff; /* Illegal */
82 }
83
84 return -1;
85}
86
87/* Do platform specific device initialization at pci_enable_device() time */
88int pcibios_plat_dev_init(struct pci_dev *dev)
89{
90 return 0;
91}
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index c1ac6493155e..42e4d2c800fa 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -49,8 +49,8 @@
49 * Macros for calculating offsets into config space given a device 49 * Macros for calculating offsets into config space given a device
50 * structure or dev/fun/reg 50 * structure or dev/fun/reg
51 */ 51 */
52#define CFGOFFSET(bus,devfn,where) (((bus)<<16) + ((devfn)<<8) + (where)) 52#define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where))
53#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 53#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
54 54
55static void *cfg_space; 55static void *cfg_space;
56 56
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 9885fa403603..240df9e33813 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -228,7 +228,7 @@ static int __init vr41xx_pciu_init(void)
228 else 228 else
229 pciu_write(PCIEXACCREG, 0); 229 pciu_write(PCIEXACCREG, 0);
230 230
231 if (current_cpu_data.cputype == CPU_VR4122) 231 if (current_cpu_type() == CPU_VR4122)
232 pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy)); 232 pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy));
233 233
234 pciu_write(LATTIMEREG, MLTIM(setup->master_latency_timer)); 234 pciu_write(LATTIMEREG, MLTIM(setup->master_latency_timer));
diff --git a/arch/mips/philips/pnx8550/common/proc.c b/arch/mips/philips/pnx8550/common/proc.c
index 92311e95b700..18b125e3b65d 100644
--- a/arch/mips/philips/pnx8550/common/proc.c
+++ b/arch/mips/philips/pnx8550/common/proc.c
@@ -27,20 +27,20 @@
27#include <uart.h> 27#include <uart.h>
28 28
29 29
30static int pnx8550_timers_read (char* page, char** start, off_t offset, int count, int* eof, void* data) 30static int pnx8550_timers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
31{ 31{
32 int len = 0; 32 int len = 0;
33 int configPR = read_c0_config7(); 33 int configPR = read_c0_config7();
34 34
35 if (offset==0) { 35 if (offset==0) {
36 len += sprintf(&page[len],"Timer: count, compare, tc, status\n"); 36 len += sprintf(&page[len], "Timer: count, compare, tc, status\n");
37 len += sprintf(&page[len]," 1: %11i, %8i, %1i, %s\n", 37 len += sprintf(&page[len], " 1: %11i, %8i, %1i, %s\n",
38 read_c0_count(), read_c0_compare(), 38 read_c0_count(), read_c0_compare(),
39 (configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on"); 39 (configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on");
40 len += sprintf(&page[len]," 2: %11i, %8i, %1i, %s\n", 40 len += sprintf(&page[len], " 2: %11i, %8i, %1i, %s\n",
41 read_c0_count2(), read_c0_compare2(), 41 read_c0_count2(), read_c0_compare2(),
42 (configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on"); 42 (configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on");
43 len += sprintf(&page[len]," 3: %11i, %8i, %1i, %s\n", 43 len += sprintf(&page[len], " 3: %11i, %8i, %1i, %s\n",
44 read_c0_count3(), read_c0_compare3(), 44 read_c0_count3(), read_c0_compare3(),
45 (configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on"); 45 (configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on");
46 } 46 }
@@ -48,23 +48,23 @@ static int pnx8550_timers_read (char* page, char** start, off_t offset, int coun
48 return len; 48 return len;
49} 49}
50 50
51static int pnx8550_registers_read (char* page, char** start, off_t offset, int count, int* eof, void* data) 51static int pnx8550_registers_read(char* page, char** start, off_t offset, int count, int* eof, void* data)
52{ 52{
53 int len = 0; 53 int len = 0;
54 54
55 if (offset==0) { 55 if (offset==0) {
56 len += sprintf(&page[len],"config1: %#10.8x\n",read_c0_config1()); 56 len += sprintf(&page[len], "config1: %#10.8x\n", read_c0_config1());
57 len += sprintf(&page[len],"config2: %#10.8x\n",read_c0_config2()); 57 len += sprintf(&page[len], "config2: %#10.8x\n", read_c0_config2());
58 len += sprintf(&page[len],"config3: %#10.8x\n",read_c0_config3()); 58 len += sprintf(&page[len], "config3: %#10.8x\n", read_c0_config3());
59 len += sprintf(&page[len],"configPR: %#10.8x\n",read_c0_config7()); 59 len += sprintf(&page[len], "configPR: %#10.8x\n", read_c0_config7());
60 len += sprintf(&page[len],"status: %#10.8x\n",read_c0_status()); 60 len += sprintf(&page[len], "status: %#10.8x\n", read_c0_status());
61 len += sprintf(&page[len],"cause: %#10.8x\n",read_c0_cause()); 61 len += sprintf(&page[len], "cause: %#10.8x\n", read_c0_cause());
62 len += sprintf(&page[len],"count: %#10.8x\n",read_c0_count()); 62 len += sprintf(&page[len], "count: %#10.8x\n", read_c0_count());
63 len += sprintf(&page[len],"count_2: %#10.8x\n",read_c0_count2()); 63 len += sprintf(&page[len], "count_2: %#10.8x\n", read_c0_count2());
64 len += sprintf(&page[len],"count_3: %#10.8x\n",read_c0_count3()); 64 len += sprintf(&page[len], "count_3: %#10.8x\n", read_c0_count3());
65 len += sprintf(&page[len],"compare: %#10.8x\n",read_c0_compare()); 65 len += sprintf(&page[len], "compare: %#10.8x\n", read_c0_compare());
66 len += sprintf(&page[len],"compare_2: %#10.8x\n",read_c0_compare2()); 66 len += sprintf(&page[len], "compare_2: %#10.8x\n", read_c0_compare2());
67 len += sprintf(&page[len],"compare_3: %#10.8x\n",read_c0_compare3()); 67 len += sprintf(&page[len], "compare_3: %#10.8x\n", read_c0_compare3());
68 } 68 }
69 69
70 return len; 70 return len;
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
index 5bd737477685..2ce298f4d19a 100644
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -47,7 +47,6 @@ extern void pnx8550_machine_halt(void);
47extern void pnx8550_machine_power_off(void); 47extern void pnx8550_machine_power_off(void);
48extern struct resource ioport_resource; 48extern struct resource ioport_resource;
49extern struct resource iomem_resource; 49extern struct resource iomem_resource;
50extern void pnx8550_time_init(void);
51extern void rs_kgdb_hook(int tty_no); 50extern void rs_kgdb_hook(int tty_no);
52extern char *prom_getcmdline(void); 51extern char *prom_getcmdline(void);
53 52
@@ -104,8 +103,6 @@ void __init plat_mem_setup(void)
104 _machine_halt = pnx8550_machine_halt; 103 _machine_halt = pnx8550_machine_halt;
105 pm_power_off = pnx8550_machine_power_off; 104 pm_power_off = pnx8550_machine_power_off;
106 105
107 board_time_init = pnx8550_time_init;
108
109 /* Clear the Global 2 Register, PCI Inta Output Enable Registers 106 /* Clear the Global 2 Register, PCI Inta Output Enable Registers
110 Bit 1:Enable DAC Powerdown 107 Bit 1:Enable DAC Powerdown
111 -> 0:DACs are enabled and are working normally 108 -> 0:DACs are enabled and are working normally
diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c
index 68def3880a1c..e818fd0f1584 100644
--- a/arch/mips/philips/pnx8550/common/time.c
+++ b/arch/mips/philips/pnx8550/common/time.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * Copyright 2001, 2002, 2003 MontaVista Software Inc. 2 * Copyright 2001, 2002, 2003 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
4 * 5 *
5 * Common time service routines for MIPS machines. See 6 * Common time service routines for MIPS machines. See
6 * Documents/MIPS/README.txt. 7 * Documents/MIPS/README.txt.
@@ -46,16 +47,16 @@ static void timer_ack(void)
46} 47}
47 48
48/* 49/*
49 * pnx8550_time_init() - it does the following things: 50 * plat_time_init() - it does the following things:
50 * 51 *
51 * 1) board_time_init() - 52 * 1) plat_time_init() -
52 * a) (optional) set up RTC routines, 53 * a) (optional) set up RTC routines,
53 * b) (optional) calibrate and set the mips_hpt_frequency 54 * b) (optional) calibrate and set the mips_hpt_frequency
54 * (only needed if you intended to use cpu counter as timer interrupt 55 * (only needed if you intended to use cpu counter as timer interrupt
55 * source) 56 * source)
56 */ 57 */
57 58
58void pnx8550_time_init(void) 59__init void plat_time_init(void)
59{ 60{
60 unsigned int n; 61 unsigned int n;
61 unsigned int m; 62 unsigned int m;
diff --git a/arch/mips/philips/pnx8550/jbs/init.c b/arch/mips/philips/pnx8550/jbs/init.c
index 85f449174bc3..cfd90fa3d799 100644
--- a/arch/mips/philips/pnx8550/jbs/init.c
+++ b/arch/mips/philips/pnx8550/jbs/init.c
@@ -48,7 +48,6 @@ void __init prom_init(void)
48 48
49 unsigned long memsize; 49 unsigned long memsize;
50 50
51 mips_machgroup = MACH_GROUP_PHILIPS;
52 mips_machtype = MACH_PHILIPS_JBS; 51 mips_machtype = MACH_PHILIPS_JBS;
53 52
54 //memsize = 0x02800000; /* Trimedia uses memory above */ 53 //memsize = 0x02800000; /* Trimedia uses memory above */
diff --git a/arch/mips/philips/pnx8550/stb810/prom_init.c b/arch/mips/philips/pnx8550/stb810/prom_init.c
index ea5b4e0fb47d..fdb33ed089b9 100644
--- a/arch/mips/philips/pnx8550/stb810/prom_init.c
+++ b/arch/mips/philips/pnx8550/stb810/prom_init.c
@@ -41,7 +41,6 @@ void __init prom_init(void)
41 41
42 prom_init_cmdline(); 42 prom_init_cmdline();
43 43
44 mips_machgroup = MACH_GROUP_PHILIPS;
45 mips_machtype = MACH_PHILIPS_STB810; 44 mips_machtype = MACH_PHILIPS_STB810;
46 45
47 memsize = 0x08000000; /* Trimedia uses memory above */ 46 memsize = 0x08000000; /* Trimedia uses memory above */
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
index 6fa85728158b..ab96a2d7f4c4 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
@@ -163,7 +163,7 @@ static int msp_hwbutton_register(struct hwbutton_interrupt *hirq)
163 CIC_EXT_SET_ACTIVE_HI(cic_ext, hirq->eirq); 163 CIC_EXT_SET_ACTIVE_HI(cic_ext, hirq->eirq);
164 *CIC_EXT_CFG_REG = cic_ext; 164 *CIC_EXT_CFG_REG = cic_ext;
165 165
166 return request_irq(hirq->irq, hwbutton_handler, SA_INTERRUPT, 166 return request_irq(hirq->irq, hwbutton_handler, IRQF_DISABLED,
167 hirq->name, (void *)hirq); 167 hirq->name, (void *)hirq);
168} 168}
169 169
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
index e25bac537d77..15e7b8000b4c 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
@@ -117,7 +117,7 @@ void __init msp_serial_setup(void)
117 117
118 /* Initialize first serial port */ 118 /* Initialize first serial port */
119 up.mapbase = MSP_UART0_BASE; 119 up.mapbase = MSP_UART0_BASE;
120 up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN); 120 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
121 up.irq = MSP_INT_UART0; 121 up.irq = MSP_INT_UART0;
122 up.uartclk = uartclk; 122 up.uartclk = uartclk;
123 up.regshift = 2; 123 up.regshift = 2;
@@ -145,9 +145,9 @@ void __init msp_serial_setup(void)
145 if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) { 145 if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) {
146 if( mips_machtype == MACH_MSP4200_FPGA 146 if( mips_machtype == MACH_MSP4200_FPGA
147 || mips_machtype == MACH_MSP7120_FPGA ) 147 || mips_machtype == MACH_MSP7120_FPGA )
148 initDebugPort(uartclk,19200); 148 initDebugPort(uartclk, 19200);
149 else 149 else
150 initDebugPort(uartclk,57600); 150 initDebugPort(uartclk, 57600);
151 } 151 }
152#endif 152#endif
153 break; 153 break;
@@ -157,7 +157,7 @@ void __init msp_serial_setup(void)
157 } 157 }
158 158
159 up.mapbase = MSP_UART1_BASE; 159 up.mapbase = MSP_UART1_BASE;
160 up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN); 160 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
161 up.irq = MSP_INT_UART1; 161 up.irq = MSP_INT_UART1;
162 up.line = 1; 162 up.line = 1;
163 up.private_data = (void*)UART1_STATUS_REG; 163 up.private_data = (void*)UART1_STATUS_REG;
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
index 8f69b789be90..c93675615f5d 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c
@@ -25,7 +25,6 @@
25#define MSP_BOARD_RESET_GPIO 9 25#define MSP_BOARD_RESET_GPIO 9
26#endif 26#endif
27 27
28extern void msp_timer_init(void);
29extern void msp_serial_setup(void); 28extern void msp_serial_setup(void);
30extern void pmctwiled_setup(void); 29extern void pmctwiled_setup(void);
31 30
@@ -149,8 +148,6 @@ void __init plat_mem_setup(void)
149 _machine_restart = msp_restart; 148 _machine_restart = msp_restart;
150 _machine_halt = msp_halt; 149 _machine_halt = msp_halt;
151 pm_power_off = msp_power_off; 150 pm_power_off = msp_power_off;
152
153 board_time_init = msp_timer_init;
154} 151}
155 152
156void __init prom_init(void) 153void __init prom_init(void)
@@ -176,16 +173,13 @@ void __init prom_init(void)
176 case FAMILY_FPGA: 173 case FAMILY_FPGA:
177 if (FPGA_IS_MSP4200(revision)) { 174 if (FPGA_IS_MSP4200(revision)) {
178 /* Old-style revision ID */ 175 /* Old-style revision ID */
179 mips_machgroup = MACH_GROUP_MSP;
180 mips_machtype = MACH_MSP4200_FPGA; 176 mips_machtype = MACH_MSP4200_FPGA;
181 } else { 177 } else {
182 mips_machgroup = MACH_GROUP_MSP;
183 mips_machtype = MACH_MSP_OTHER; 178 mips_machtype = MACH_MSP_OTHER;
184 } 179 }
185 break; 180 break;
186 181
187 case FAMILY_MSP4200: 182 case FAMILY_MSP4200:
188 mips_machgroup = MACH_GROUP_MSP;
189#if defined(CONFIG_PMC_MSP4200_EVAL) 183#if defined(CONFIG_PMC_MSP4200_EVAL)
190 mips_machtype = MACH_MSP4200_EVAL; 184 mips_machtype = MACH_MSP4200_EVAL;
191#elif defined(CONFIG_PMC_MSP4200_GW) 185#elif defined(CONFIG_PMC_MSP4200_GW)
@@ -196,12 +190,10 @@ void __init prom_init(void)
196 break; 190 break;
197 191
198 case FAMILY_MSP4200_FPGA: 192 case FAMILY_MSP4200_FPGA:
199 mips_machgroup = MACH_GROUP_MSP;
200 mips_machtype = MACH_MSP4200_FPGA; 193 mips_machtype = MACH_MSP4200_FPGA;
201 break; 194 break;
202 195
203 case FAMILY_MSP7100: 196 case FAMILY_MSP7100:
204 mips_machgroup = MACH_GROUP_MSP;
205#if defined(CONFIG_PMC_MSP7120_EVAL) 197#if defined(CONFIG_PMC_MSP7120_EVAL)
206 mips_machtype = MACH_MSP7120_EVAL; 198 mips_machtype = MACH_MSP7120_EVAL;
207#elif defined(CONFIG_PMC_MSP7120_GW) 199#elif defined(CONFIG_PMC_MSP7120_GW)
@@ -212,22 +204,14 @@ void __init prom_init(void)
212 break; 204 break;
213 205
214 case FAMILY_MSP7100_FPGA: 206 case FAMILY_MSP7100_FPGA:
215 mips_machgroup = MACH_GROUP_MSP;
216 mips_machtype = MACH_MSP7120_FPGA; 207 mips_machtype = MACH_MSP7120_FPGA;
217 break; 208 break;
218 209
219 default: 210 default:
220 /* we don't recognize the machine */ 211 /* we don't recognize the machine */
221 mips_machgroup = MACH_GROUP_UNKNOWN;
222 mips_machtype = MACH_UNKNOWN; 212 mips_machtype = MACH_UNKNOWN;
223 break;
224 }
225
226 /* make sure we have the right initialization routine - sanity */
227 if (mips_machgroup != MACH_GROUP_MSP) {
228 ppfinit("Unknown machine group in a "
229 "MSP initialization routine\n");
230 panic("***Bogosity factor five***, exiting\n"); 213 panic("***Bogosity factor five***, exiting\n");
214 break;
231 } 215 }
232 216
233 prom_init_cmdline(); 217 prom_init_cmdline();
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c
index 2a2beac5a4f8..f221d4763625 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_time.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c
@@ -36,7 +36,7 @@
36#include <msp_int.h> 36#include <msp_int.h>
37#include <msp_regs.h> 37#include <msp_regs.h>
38 38
39void __init msp_timer_init(void) 39void __init plat_time_init(void)
40{ 40{
41 char *endp, *s; 41 char *endp, *s;
42 unsigned long cpu_rate = 0; 42 unsigned long cpu_rate = 0;
@@ -81,7 +81,6 @@ void __init msp_timer_init(void)
81 mips_hpt_frequency = cpu_rate/2; 81 mips_hpt_frequency = cpu_rate/2;
82} 82}
83 83
84
85void __init plat_timer_setup(struct irqaction *irq) 84void __init plat_timer_setup(struct irqaction *irq)
86{ 85{
87#ifdef CONFIG_IRQ_MSP_CIC 86#ifdef CONFIG_IRQ_MSP_CIC
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
index 21f9c70b6923..f7ca4f582331 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c
@@ -58,7 +58,7 @@ static struct platform_device msp_usbhost_device = {
58 .dma_mask = &msp_usbhost_dma_mask, 58 .dma_mask = &msp_usbhost_dma_mask,
59 .coherent_dma_mask = DMA_32BIT_MASK, 59 .coherent_dma_mask = DMA_32BIT_MASK,
60 }, 60 },
61 .num_resources = ARRAY_SIZE (msp_usbhost_resources), 61 .num_resources = ARRAY_SIZE(msp_usbhost_resources),
62 .resource = msp_usbhost_resources, 62 .resource = msp_usbhost_resources,
63}; 63};
64#endif /* CONFIG_USB_EHCI_HCD */ 64#endif /* CONFIG_USB_EHCI_HCD */
@@ -86,7 +86,7 @@ static struct platform_device msp_usbdev_device = {
86 .dma_mask = &msp_usbdev_dma_mask, 86 .dma_mask = &msp_usbdev_dma_mask,
87 .coherent_dma_mask = DMA_32BIT_MASK, 87 .coherent_dma_mask = DMA_32BIT_MASK,
88 }, 88 },
89 .num_resources = ARRAY_SIZE (msp_usbdev_resources), 89 .num_resources = ARRAY_SIZE(msp_usbdev_resources),
90 .resource = msp_usbdev_resources, 90 .resource = msp_usbdev_resources,
91}; 91};
92#endif /* CONFIG_USB_GADGET */ 92#endif /* CONFIG_USB_GADGET */
@@ -129,7 +129,7 @@ static int __init msp_usb_setup(void)
129 ppfinit("platform add USB HOST done %s.\n", 129 ppfinit("platform add USB HOST done %s.\n",
130 msp_devs[0]->name); 130 msp_devs[0]->name);
131 131
132 result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs)); 132 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
133#endif /* CONFIG_USB_EHCI_HCD */ 133#endif /* CONFIG_USB_EHCI_HCD */
134 } 134 }
135#if defined(CONFIG_USB_GADGET) 135#if defined(CONFIG_USB_GADGET)
@@ -139,7 +139,7 @@ static int __init msp_usb_setup(void)
139 ppfinit("platform add USB DEVICE done %s.\n", 139 ppfinit("platform add USB DEVICE done %s.\n",
140 msp_devs[0]->name); 140 msp_devs[0]->name);
141 141
142 result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs)); 142 result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs));
143 } 143 }
144#endif /* CONFIG_USB_GADGET */ 144#endif /* CONFIG_USB_GADGET */
145#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */ 145#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index 1f7c999eb7c6..6380662bbf3c 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -115,7 +115,7 @@ static int titan_ht_config_read_word(struct pci_dev *device,
115 115
116u32 longswap(unsigned long l) 116u32 longswap(unsigned long l)
117{ 117{
118 unsigned char b1,b2,b3,b4; 118 unsigned char b1, b2, b3, b4;
119 119
120 b1 = l&255; 120 b1 = l&255;
121 b2 = (l>>8)&255; 121 b2 = (l>>8)&255;
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index 0cd78f0f5f2d..9b9936de6589 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -126,7 +126,6 @@ void __init prom_init(void)
126 env++; 126 env++;
127 } 127 }
128 128
129 mips_machgroup = MACH_GROUP_TITAN;
130 mips_machtype = MACH_TITAN_YOSEMITE; 129 mips_machtype = MACH_TITAN_YOSEMITE;
131 130
132 prom_grab_secondary(); 131 prom_grab_secondary();
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 58862c8d1d00..015fcc363dc0 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -70,7 +70,7 @@ void __init bus_error_init(void)
70} 70}
71 71
72 72
73unsigned long m48t37y_get_time(void) 73unsigned long read_persistent_clock(void)
74{ 74{
75 unsigned int year, month, day, hour, min, sec; 75 unsigned int year, month, day, hour, min, sec;
76 unsigned long flags; 76 unsigned long flags;
@@ -95,13 +95,17 @@ unsigned long m48t37y_get_time(void)
95 return mktime(year, month, day, hour, min, sec); 95 return mktime(year, month, day, hour, min, sec);
96} 96}
97 97
98int m48t37y_set_time(unsigned long sec) 98int rtc_mips_set_time(unsigned long tim)
99{ 99{
100 struct rtc_time tm; 100 struct rtc_time tm;
101 unsigned long flags; 101 unsigned long flags;
102 102
103 /* convert to a more useful format -- note months count from 0 */ 103 /*
104 to_tm(sec, &tm); 104 * Convert to a more useful format -- note months count from 0
105 * and years from 1900
106 */
107 rtc_time_to_tm(tim, &tm);
108 tm.tm_year += 1900;
105 tm.tm_mon += 1; 109 tm.tm_mon += 1;
106 110
107 spin_lock_irqsave(&rtc_lock, flags); 111 spin_lock_irqsave(&rtc_lock, flags);
@@ -138,7 +142,7 @@ void __init plat_timer_setup(struct irqaction *irq)
138 setup_irq(7, irq); 142 setup_irq(7, irq);
139} 143}
140 144
141void yosemite_time_init(void) 145void __init plat_time_init(void)
142{ 146{
143 mips_hpt_frequency = cpu_clock_freq / 2; 147 mips_hpt_frequency = cpu_clock_freq / 2;
144mips_hpt_frequency = 33000000 * 3 * 5; 148mips_hpt_frequency = 33000000 * 3 * 5;
@@ -198,17 +202,6 @@ static void __init py_rtc_setup(void)
198 m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE); 202 m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE);
199 if (!m48t37_base) 203 if (!m48t37_base)
200 printk(KERN_ERR "Mapping the RTC failed\n"); 204 printk(KERN_ERR "Mapping the RTC failed\n");
201
202 rtc_mips_get_time = m48t37y_get_time;
203 rtc_mips_set_time = m48t37y_set_time;
204
205 write_seqlock(&xtime_lock);
206 xtime.tv_sec = m48t37y_get_time();
207 xtime.tv_nsec = 0;
208
209 set_normalized_timespec(&wall_to_monotonic,
210 -xtime.tv_sec, -xtime.tv_nsec);
211 write_sequnlock(&xtime_lock);
212} 205}
213 206
214/* Not only time init but that's what the hook it's called through is named */ 207/* Not only time init but that's what the hook it's called through is named */
@@ -221,7 +214,6 @@ static void __init py_late_time_init(void)
221 214
222void __init plat_mem_setup(void) 215void __init plat_mem_setup(void)
223{ 216{
224 board_time_init = yosemite_time_init;
225 late_time_init = py_late_time_init; 217 late_time_init = py_late_time_init;
226 218
227 /* Add memory regions */ 219 /* Add memory regions */
diff --git a/arch/mips/qemu/q-firmware.c b/arch/mips/qemu/q-firmware.c
index fb2a8673a6bf..c2239b417587 100644
--- a/arch/mips/qemu/q-firmware.c
+++ b/arch/mips/qemu/q-firmware.c
@@ -10,7 +10,7 @@ void __init prom_init(void)
10 cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260); 10 cmdline = (int *) (CKSEG0 + (0x10 << 20) - 260);
11 if (*cmdline == 0x12345678) { 11 if (*cmdline == 0x12345678) {
12 if (*(char *)(cmdline + 1)) 12 if (*(char *)(cmdline + 1))
13 strcpy (arcs_cmdline, (char *)(cmdline + 1)); 13 strcpy(arcs_cmdline, (char *)(cmdline + 1));
14 add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM); 14 add_memory_region(0x0<<20, cmdline[-1], BOOT_MEM_RAM);
15 } else { 15 } else {
16 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM); 16 add_memory_region(0x0<<20, 0x10<<20, BOOT_MEM_RAM);
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
index 89891e984b3b..4681757460a1 100644
--- a/arch/mips/qemu/q-irq.c
+++ b/arch/mips/qemu/q-irq.c
@@ -2,6 +2,7 @@
2#include <linux/linkage.h> 2#include <linux/linkage.h>
3 3
4#include <asm/i8259.h> 4#include <asm/i8259.h>
5#include <asm/irq_cpu.h>
5#include <asm/mipsregs.h> 6#include <asm/mipsregs.h>
6#include <asm/qemu.h> 7#include <asm/qemu.h>
7#include <asm/system.h> 8#include <asm/system.h>
@@ -12,7 +13,7 @@ asmlinkage void plat_irq_dispatch(void)
12 unsigned int pending = read_c0_status() & read_c0_cause(); 13 unsigned int pending = read_c0_status() & read_c0_cause();
13 14
14 if (pending & 0x8000) { 15 if (pending & 0x8000) {
15 ll_timer_interrupt(Q_COUNT_COMPARE_IRQ); 16 do_IRQ(Q_COUNT_COMPARE_IRQ);
16 return; 17 return;
17 } 18 }
18 if (pending & 0x0400) { 19 if (pending & 0x0400) {
@@ -29,6 +30,7 @@ void __init arch_init_irq(void)
29{ 30{
30 mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */ 31 mips_hpt_frequency = QEMU_C0_COUNTER_CLOCK; /* 100MHz */
31 32
33 mips_cpu_irq_init();
32 init_i8259_irqs(); 34 init_i8259_irqs();
33 set_c0_status(0x8400); 35 set_c0_status(0x8400);
34} 36}
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c
index 841394336f00..23d34c1917c0 100644
--- a/arch/mips/qemu/q-setup.c
+++ b/arch/mips/qemu/q-setup.c
@@ -1,4 +1,6 @@
1#include <linux/init.h> 1#include <linux/init.h>
2
3#include <asm/i8253.h>
2#include <asm/io.h> 4#include <asm/io.h>
3#include <asm/time.h> 5#include <asm/time.h>
4 6
@@ -11,13 +13,9 @@ const char *get_system_type(void)
11 return "Qemu"; 13 return "Qemu";
12} 14}
13 15
14void __init plat_timer_setup(struct irqaction *irq) 16void __init plat_time_init(void)
15{ 17{
16 /* set the clock to 100 Hz */ 18 setup_pit_timer();
17 outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
18 outb_p(LATCH & 0xff , 0x40); /* LSB */
19 outb(LATCH >> 8 , 0x40); /* MSB */
20 setup_irq(0, irq);
21} 19}
22 20
23void __init plat_mem_setup(void) 21void __init plat_mem_setup(void)
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index 6b6e97b90c6e..26854fb11e7c 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -55,7 +55,7 @@ static char __init *decode_eisa_sig(unsigned long addr)
55 int i; 55 int i;
56 56
57 for (i = 0; i < 4; i++) { 57 for (i = 0; i < 4; i++) {
58 sig[i] = inb (addr + i); 58 sig[i] = inb(addr + i);
59 59
60 if (!i && (sig[0] & 0x80)) 60 if (!i && (sig[0] & 0x80))
61 return NULL; 61 return NULL;
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index 18348321795d..f6d9bf4b26e7 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -20,10 +20,10 @@
20#include <asm/mipsregs.h> 20#include <asm/mipsregs.h>
21#include <asm/addrspace.h> 21#include <asm/addrspace.h>
22#include <asm/irq_cpu.h> 22#include <asm/irq_cpu.h>
23
24#include <asm/sgi/ioc.h> 23#include <asm/sgi/ioc.h>
25#include <asm/sgi/hpc3.h> 24#include <asm/sgi/hpc3.h>
26#include <asm/sgi/ip22.h> 25#include <asm/sgi/ip22.h>
26#include <asm/time.h>
27 27
28/* #define DEBUG_SGINT */ 28/* #define DEBUG_SGINT */
29 29
@@ -204,7 +204,6 @@ static struct irqaction map1_cascade = {
204#define SGI_INTERRUPTS SGINT_LOCAL3 204#define SGI_INTERRUPTS SGINT_LOCAL3
205#endif 205#endif
206 206
207extern void indy_r4k_timer_interrupt(void);
208extern void indy_8254timer_irq(void); 207extern void indy_8254timer_irq(void);
209 208
210/* 209/*
@@ -243,7 +242,7 @@ asmlinkage void plat_irq_dispatch(void)
243 * First we check for r4k counter/timer IRQ. 242 * First we check for r4k counter/timer IRQ.
244 */ 243 */
245 if (pending & CAUSEF_IP7) 244 if (pending & CAUSEF_IP7)
246 indy_r4k_timer_interrupt(); 245 do_IRQ(SGI_TIMER_IRQ);
247 else if (pending & CAUSEF_IP2) 246 else if (pending & CAUSEF_IP2)
248 indy_local0_irqdispatch(); 247 indy_local0_irqdispatch();
249 else if (pending & CAUSEF_IP3) 248 else if (pending & CAUSEF_IP3)
@@ -345,6 +344,6 @@ void __init arch_init_irq(void)
345 344
346#ifdef CONFIG_EISA 345#ifdef CONFIG_EISA
347 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */ 346 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
348 ip22_eisa_init (); 347 ip22_eisa_init();
349#endif 348#endif
350} 349}
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index e7ce7982db72..174f09e42f6b 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -51,7 +51,6 @@ void ip22_do_break(void)
51EXPORT_SYMBOL(ip22_do_break); 51EXPORT_SYMBOL(ip22_do_break);
52 52
53extern void ip22_be_init(void) __init; 53extern void ip22_be_init(void) __init;
54extern void ip22_time_init(void) __init;
55 54
56void __init plat_mem_setup(void) 55void __init plat_mem_setup(void)
57{ 56{
@@ -59,7 +58,6 @@ void __init plat_mem_setup(void)
59 char *cserial; 58 char *cserial;
60 59
61 board_be_init = ip22_be_init; 60 board_be_init = ip22_be_init;
62 ip22_time_init();
63 61
64 /* Init the INDY HPC I/O controller. Need to call this before 62 /* Init the INDY HPC I/O controller. Need to call this before
65 * fucking with the memory controller because it needs to know the 63 * fucking with the memory controller because it needs to know the
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index de3d01823ad5..9b9bffd2e8fb 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/cpu.h> 21#include <asm/cpu.h>
22#include <asm/mipsregs.h> 22#include <asm/mipsregs.h>
23#include <asm/i8253.h>
23#include <asm/io.h> 24#include <asm/io.h>
24#include <asm/irq.h> 25#include <asm/irq.h>
25#include <asm/time.h> 26#include <asm/time.h>
@@ -29,10 +30,10 @@
29#include <asm/sgi/ip22.h> 30#include <asm/sgi/ip22.h>
30 31
31/* 32/*
32 * note that mktime uses month from 1 to 12 while to_tm 33 * Note that mktime uses month from 1 to 12 while rtc_time_to_tm
33 * uses 0 to 11. 34 * uses 0 to 11.
34 */ 35 */
35static unsigned long indy_rtc_get_time(void) 36unsigned long read_persistent_clock(void)
36{ 37{
37 unsigned int yrs, mon, day, hrs, min, sec; 38 unsigned int yrs, mon, day, hrs, min, sec;
38 unsigned int save_control; 39 unsigned int save_control;
@@ -60,16 +61,16 @@ static unsigned long indy_rtc_get_time(void)
60 return mktime(yrs + 1900, mon, day, hrs, min, sec); 61 return mktime(yrs + 1900, mon, day, hrs, min, sec);
61} 62}
62 63
63static int indy_rtc_set_time(unsigned long tim) 64int rtc_mips_set_time(unsigned long tim)
64{ 65{
65 struct rtc_time tm; 66 struct rtc_time tm;
66 unsigned int save_control; 67 unsigned int save_control;
67 unsigned long flags; 68 unsigned long flags;
68 69
69 to_tm(tim, &tm); 70 rtc_time_to_tm(tim, &tm);
70 71
71 tm.tm_mon += 1; /* tm_mon starts at zero */ 72 tm.tm_mon += 1; /* tm_mon starts at zero */
72 tm.tm_year -= 1940; 73 tm.tm_year -= 40;
73 if (tm.tm_year >= 100) 74 if (tm.tm_year >= 100)
74 tm.tm_year -= 100; 75 tm.tm_year -= 100;
75 76
@@ -128,7 +129,7 @@ static unsigned long dosample(void)
128/* 129/*
129 * Here we need to calibrate the cycle counter to at least be close. 130 * Here we need to calibrate the cycle counter to at least be close.
130 */ 131 */
131static __init void indy_time_init(void) 132__init void plat_time_init(void)
132{ 133{
133 unsigned long r4k_ticks[3]; 134 unsigned long r4k_ticks[3];
134 unsigned long r4k_tick; 135 unsigned long r4k_tick;
@@ -172,6 +173,9 @@ static __init void indy_time_init(void)
172 (int) (r4k_tick % (500000 / HZ))); 173 (int) (r4k_tick % (500000 / HZ)));
173 174
174 mips_hpt_frequency = r4k_tick * HZ; 175 mips_hpt_frequency = r4k_tick * HZ;
176
177 if (ip22_is_fullhouse())
178 setup_pit_timer();
175} 179}
176 180
177/* Generic SGI handler for (spurious) 8254 interrupts */ 181/* Generic SGI handler for (spurious) 8254 interrupts */
@@ -189,16 +193,6 @@ void indy_8254timer_irq(void)
189 irq_exit(); 193 irq_exit();
190} 194}
191 195
192void indy_r4k_timer_interrupt(void)
193{
194 int irq = SGI_TIMER_IRQ;
195
196 irq_enter();
197 kstat_this_cpu.irqs[irq]++;
198 timer_interrupt(irq, NULL);
199 irq_exit();
200}
201
202void __init plat_timer_setup(struct irqaction *irq) 196void __init plat_timer_setup(struct irqaction *irq)
203{ 197{
204 /* over-write the handler, we use our own way */ 198 /* over-write the handler, we use our own way */
@@ -207,12 +201,3 @@ void __init plat_timer_setup(struct irqaction *irq)
207 /* setup irqaction */ 201 /* setup irqaction */
208 setup_irq(SGI_TIMER_IRQ, irq); 202 setup_irq(SGI_TIMER_IRQ, irq);
209} 203}
210
211void __init ip22_time_init(void)
212{
213 /* setup hookup functions */
214 rtc_mips_get_time = indy_rtc_get_time;
215 rtc_mips_set_time = indy_rtc_set_time;
216
217 board_time_init = indy_time_init;
218}
diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c
index 123141ab21a2..7d05e68fdc77 100644
--- a/arch/mips/sgi-ip27/ip27-berr.c
+++ b/arch/mips/sgi-ip27/ip27-berr.c
@@ -21,8 +21,6 @@
21#include <asm/traps.h> 21#include <asm/traps.h>
22#include <asm/uaccess.h> 22#include <asm/uaccess.h>
23 23
24extern void dump_tlb_all(void);
25
26static void dump_hub_information(unsigned long errst0, unsigned long errst1) 24static void dump_hub_information(unsigned long errst0, unsigned long errst1)
27{ 25{
28 static char *err_type[2][8] = { 26 static char *err_type[2][8] = {
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index 74158d349630..681b593071cb 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -47,6 +47,9 @@ cnodeid_t cpuid_to_compact_node[MAXCPUS];
47 47
48EXPORT_SYMBOL(nasid_to_compact_node); 48EXPORT_SYMBOL(nasid_to_compact_node);
49 49
50struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
51EXPORT_SYMBOL_GPL(sn_cpu_info);
52
50extern void pcibr_setup(cnodeid_t); 53extern void pcibr_setup(cnodeid_t);
51 54
52extern void xtalk_probe_node(cnodeid_t nid); 55extern void xtalk_probe_node(cnodeid_t nid);
@@ -191,7 +194,6 @@ static inline void ioc3_eth_init(void)
191 ioc3->eier = 0; 194 ioc3->eier = 0;
192} 195}
193 196
194extern void ip27_time_init(void);
195extern void ip27_reboot_setup(void); 197extern void ip27_reboot_setup(void);
196 198
197void __init plat_mem_setup(void) 199void __init plat_mem_setup(void)
@@ -238,6 +240,4 @@ void __init plat_mem_setup(void)
238 per_cpu_init(); 240 per_cpu_init();
239 241
240 set_io_port_base(IO_BASE); 242 set_io_port_base(IO_BASE);
241
242 board_time_init = ip27_time_init;
243} 243}
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index fbb27728a76a..a70656d42191 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -33,7 +33,7 @@ static void alloc_cpupda(cpuid_t cpu, int cpunum)
33 nasid_t nasid = COMPACT_TO_NASID_NODEID(node); 33 nasid_t nasid = COMPACT_TO_NASID_NODEID(node);
34 34
35 cputonasid(cpunum) = nasid; 35 cputonasid(cpunum) = nasid;
36 cpu_data[cpunum].p_nodeid = node; 36 sn_cpu_info[cpunum].p_nodeid = node;
37 cputoslice(cpunum) = get_cpu_slice(cpu); 37 cputoslice(cpunum) = get_cpu_slice(cpu);
38} 38}
39 39
@@ -176,7 +176,7 @@ void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
176 unsigned long gp = (unsigned long)task_thread_info(idle); 176 unsigned long gp = (unsigned long)task_thread_info(idle);
177 unsigned long sp = __KSTK_TOS(idle); 177 unsigned long sp = __KSTK_TOS(idle);
178 178
179 LAUNCH_SLAVE(cputonasid(cpu),cputoslice(cpu), 179 LAUNCH_SLAVE(cputonasid(cpu), cputoslice(cpu),
180 (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap), 180 (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
181 0, (void *) sp, (void *) gp); 181 0, (void *) sp, (void *) gp);
182} 182}
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 8c3c78c63ccd..b7b3479b6bce 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -40,7 +40,6 @@
40#define TICK_SIZE (tick_nsec / 1000) 40#define TICK_SIZE (tick_nsec / 1000)
41 41
42static unsigned long ct_cur[NR_CPUS]; /* What counter should be at next timer irq */ 42static unsigned long ct_cur[NR_CPUS]; /* What counter should be at next timer irq */
43static long last_rtc_update; /* Last time the rtc clock got updated */
44 43
45#if 0 44#if 0
46static int set_rtc_mmss(unsigned long nowtime) 45static int set_rtc_mmss(unsigned long nowtime)
@@ -113,23 +112,6 @@ again:
113 112
114 update_process_times(user_mode(get_irq_regs())); 113 update_process_times(user_mode(get_irq_regs()));
115 114
116 /*
117 * If we have an externally synchronized Linux clock, then update
118 * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
119 * called as close as possible to when a second starts.
120 */
121 if (ntp_synced() &&
122 xtime.tv_sec > last_rtc_update + 660 &&
123 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
124 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
125 if (rtc_mips_set_time(xtime.tv_sec) == 0) {
126 last_rtc_update = xtime.tv_sec;
127 } else {
128 last_rtc_update = xtime.tv_sec - 600;
129 /* do it again in 60 s */
130 }
131 }
132
133 write_sequnlock(&xtime_lock); 115 write_sequnlock(&xtime_lock);
134 irq_exit(); 116 irq_exit();
135} 117}
@@ -141,7 +123,7 @@ again:
141#include <asm/sn/sn0/hubio.h> 123#include <asm/sn/sn0/hubio.h>
142#include <asm/pci/bridge.h> 124#include <asm/pci/bridge.h>
143 125
144static __init unsigned long get_m48t35_time(void) 126unsigned long read_persistent_clock(void)
145{ 127{
146 unsigned int year, month, date, hour, min, sec; 128 unsigned int year, month, date, hour, min, sec;
147 struct m48t35_rtc *rtc; 129 struct m48t35_rtc *rtc;
@@ -218,17 +200,23 @@ void __init plat_timer_setup(struct irqaction *irq)
218 setup_irq(irqno, &rt_irqaction); 200 setup_irq(irqno, &rt_irqaction);
219} 201}
220 202
221static cycle_t ip27_hpt_read(void) 203static cycle_t hub_rt_read(void)
222{ 204{
223 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); 205 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
224} 206}
225 207
226void __init ip27_time_init(void) 208struct clocksource ht_rt_clocksource = {
209 .name = "HUB",
210 .rating = 200,
211 .read = hub_rt_read,
212 .mask = CLOCKSOURCE_MASK(52),
213 .shift = 32,
214 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
215};
216
217void __init plat_time_init(void)
227{ 218{
228 clocksource_mips.read = ip27_hpt_read; 219 clocksource_register(&ht_rt_clocksource);
229 mips_hpt_frequency = CYCLES_PER_SEC;
230 xtime.tv_sec = get_m48t35_time();
231 xtime.tv_nsec = 0;
232} 220}
233 221
234void __init cpu_time_init(void) 222void __init cpu_time_init(void)
diff --git a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
index bff508704d03..563c614ad021 100644
--- a/arch/mips/sgi-ip32/crime.c
+++ b/arch/mips/sgi-ip32/crime.c
@@ -35,8 +35,8 @@ void __init crime_init(void)
35 id = crime->id; 35 id = crime->id;
36 rev = id & CRIME_ID_REV; 36 rev = id & CRIME_ID_REV;
37 id = (id & CRIME_ID_IDBITS) >> 4; 37 id = (id & CRIME_ID_IDBITS) >> 4;
38 printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n", 38 printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
39 id, rev, field, (unsigned long) CRIME_BASE); 39 id, rev, field, (unsigned long) CRIME_BASE);
40} 40}
41 41
42irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id) 42irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
@@ -96,7 +96,7 @@ irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
96 unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK; 96 unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
97 97
98 addr <<= 2; 98 addr <<= 2;
99 printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat); 99 printk("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
100 crime->cpu_error_stat = 0; 100 crime->cpu_error_stat = 0;
101 101
102 return IRQ_HANDLED; 102 return IRQ_HANDLED;
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index fb9da9acf53f..7f4b793c3df3 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -117,10 +117,18 @@ static void inline flush_mace_bus(void)
117extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); 117extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
118extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); 118extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
119 119
120struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED, 120struct irqaction memerr_irq = {
121 CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; 121 .handler = crime_memerr_intr,
122struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED, 122 .flags = IRQF_DISABLED,
123 CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; 123 .mask = CPU_MASK_NONE,
124 .name = "CRIME memory error",
125};
126struct irqaction cpuerr_irq = {
127 .handler = crime_cpuerr_intr,
128 .flags = IRQF_DISABLED,
129 .mask = CPU_MASK_NONE,
130 .name = "CRIME CPU error",
131};
124 132
125/* 133/*
126 * For interrupts wired from a single device to the CPU. Only the clock 134 * For interrupts wired from a single device to the CPU. Only the clock
@@ -140,7 +148,7 @@ static void disable_cpu_irq(unsigned int irq)
140static void end_cpu_irq(unsigned int irq) 148static void end_cpu_irq(unsigned int irq)
141{ 149{
142 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 150 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
143 enable_cpu_irq (irq); 151 enable_cpu_irq(irq);
144} 152}
145 153
146static struct irq_chip ip32_cpu_interrupt = { 154static struct irq_chip ip32_cpu_interrupt = {
@@ -281,11 +289,11 @@ static struct irq_chip ip32_macepci_interrupt = {
281 289
282static unsigned long maceisa_mask; 290static unsigned long maceisa_mask;
283 291
284static void enable_maceisa_irq (unsigned int irq) 292static void enable_maceisa_irq(unsigned int irq)
285{ 293{
286 unsigned int crime_int = 0; 294 unsigned int crime_int = 0;
287 295
288 DBG ("maceisa enable: %u\n", irq); 296 DBG("maceisa enable: %u\n", irq);
289 297
290 switch (irq) { 298 switch (irq) {
291 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: 299 case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
@@ -298,7 +306,7 @@ static void enable_maceisa_irq (unsigned int irq)
298 crime_int = MACE_SUPERIO_INT; 306 crime_int = MACE_SUPERIO_INT;
299 break; 307 break;
300 } 308 }
301 DBG ("crime_int %08x enabled\n", crime_int); 309 DBG("crime_int %08x enabled\n", crime_int);
302 crime_mask |= crime_int; 310 crime_mask |= crime_int;
303 crime->imask = crime_mask; 311 crime->imask = crime_mask;
304 maceisa_mask |= 1 << (irq - 33); 312 maceisa_mask |= 1 << (irq - 33);
@@ -389,15 +397,15 @@ static struct irq_chip ip32_mace_interrupt = {
389 397
390static void ip32_unknown_interrupt(void) 398static void ip32_unknown_interrupt(void)
391{ 399{
392 printk ("Unknown interrupt occurred!\n"); 400 printk("Unknown interrupt occurred!\n");
393 printk ("cp0_status: %08x\n", read_c0_status()); 401 printk("cp0_status: %08x\n", read_c0_status());
394 printk ("cp0_cause: %08x\n", read_c0_cause()); 402 printk("cp0_cause: %08x\n", read_c0_cause());
395 printk ("CRIME intr mask: %016lx\n", crime->imask); 403 printk("CRIME intr mask: %016lx\n", crime->imask);
396 printk ("CRIME intr status: %016lx\n", crime->istat); 404 printk("CRIME intr status: %016lx\n", crime->istat);
397 printk ("CRIME hardware intr register: %016lx\n", crime->hard_int); 405 printk("CRIME hardware intr register: %016lx\n", crime->hard_int);
398 printk ("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask); 406 printk("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask);
399 printk ("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat); 407 printk("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat);
400 printk ("MACE PCI control register: %08x\n", mace->pci.control); 408 printk("MACE PCI control register: %08x\n", mace->pci.control);
401 409
402 printk("Register dump:\n"); 410 printk("Register dump:\n");
403 show_regs(get_irq_regs()); 411 show_regs(get_irq_regs());
@@ -449,7 +457,7 @@ static void ip32_irq4(void)
449 457
450static void ip32_irq5(void) 458static void ip32_irq5(void)
451{ 459{
452 ll_timer_interrupt(IP32_R4K_TIMER_IRQ); 460 do_IRQ(IP32_R4K_TIMER_IRQ);
453} 461}
454 462
455asmlinkage void plat_irq_dispatch(void) 463asmlinkage void plat_irq_dispatch(void)
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index 849d392a0013..ca93ecf825ae 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -19,7 +19,7 @@
19 19
20extern void crime_init(void); 20extern void crime_init(void);
21 21
22void __init prom_meminit (void) 22void __init prom_meminit(void)
23{ 23{
24 u64 base, size; 24 u64 base, size;
25 int bank; 25 int bank;
@@ -38,7 +38,7 @@ void __init prom_meminit (void)
38 38
39 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n", 39 printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n",
40 bank, base, size >> 20); 40 bank, base, size >> 20);
41 add_memory_region (base, size, BOOT_MEM_RAM); 41 add_memory_region(base, size, BOOT_MEM_RAM);
42 } 42 }
43} 43}
44 44
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index bbba066cb405..4125a5ba119e 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -62,10 +62,15 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
62} 62}
63#endif 63#endif
64 64
65unsigned long read_persistent_clock(void)
66{
67 return mc146818_get_cmos_time();
68}
69
65/* An arbitrary time; this can be decreased if reliability looks good */ 70/* An arbitrary time; this can be decreased if reliability looks good */
66#define WAIT_MS 10 71#define WAIT_MS 10
67 72
68void __init ip32_time_init(void) 73void __init plat_time_init(void)
69{ 74{
70 printk(KERN_INFO "Calibrating system timer... "); 75 printk(KERN_INFO "Calibrating system timer... ");
71 write_c0_count(0); 76 write_c0_count(0);
@@ -85,11 +90,6 @@ void __init plat_mem_setup(void)
85{ 90{
86 board_be_init = ip32_be_init; 91 board_be_init = ip32_be_init;
87 92
88 rtc_mips_get_time = mc146818_get_cmos_time;
89 rtc_mips_set_mmss = mc146818_set_rtc_mmss;
90
91 board_time_init = ip32_time_init;
92
93#ifdef CONFIG_SGI_O2MACE_ETH 93#ifdef CONFIG_SGI_O2MACE_ETH
94 { 94 {
95 char *mac = ArcGetEnvironmentVariable("eaddr"); 95 char *mac = ArcGetEnvironmentVariable("eaddr");
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index fdd7bd98fb44..e8fb880272bd 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -1,6 +1,7 @@
1config SIBYTE_SB1250 1config SIBYTE_SB1250
2 bool 2 bool
3 select HW_HAS_PCI 3 select HW_HAS_PCI
4 select IRQ_CPU
4 select SIBYTE_ENABLE_LDT_IF_PCI 5 select SIBYTE_ENABLE_LDT_IF_PCI
5 select SIBYTE_HAS_ZBUS_PROFILING 6 select SIBYTE_HAS_ZBUS_PROFILING
6 select SIBYTE_SB1xxx_SOC 7 select SIBYTE_SB1xxx_SOC
@@ -8,6 +9,7 @@ config SIBYTE_SB1250
8 9
9config SIBYTE_BCM1120 10config SIBYTE_BCM1120
10 bool 11 bool
12 select IRQ_CPU
11 select SIBYTE_BCM112X 13 select SIBYTE_BCM112X
12 select SIBYTE_HAS_ZBUS_PROFILING 14 select SIBYTE_HAS_ZBUS_PROFILING
13 select SIBYTE_SB1xxx_SOC 15 select SIBYTE_SB1xxx_SOC
@@ -15,6 +17,7 @@ config SIBYTE_BCM1120
15config SIBYTE_BCM1125 17config SIBYTE_BCM1125
16 bool 18 bool
17 select HW_HAS_PCI 19 select HW_HAS_PCI
20 select IRQ_CPU
18 select SIBYTE_BCM112X 21 select SIBYTE_BCM112X
19 select SIBYTE_HAS_ZBUS_PROFILING 22 select SIBYTE_HAS_ZBUS_PROFILING
20 select SIBYTE_SB1xxx_SOC 23 select SIBYTE_SB1xxx_SOC
@@ -22,6 +25,7 @@ config SIBYTE_BCM1125
22config SIBYTE_BCM1125H 25config SIBYTE_BCM1125H
23 bool 26 bool
24 select HW_HAS_PCI 27 select HW_HAS_PCI
28 select IRQ_CPU
25 select SIBYTE_BCM112X 29 select SIBYTE_BCM112X
26 select SIBYTE_ENABLE_LDT_IF_PCI 30 select SIBYTE_ENABLE_LDT_IF_PCI
27 select SIBYTE_HAS_ZBUS_PROFILING 31 select SIBYTE_HAS_ZBUS_PROFILING
@@ -29,12 +33,14 @@ config SIBYTE_BCM1125H
29 33
30config SIBYTE_BCM112X 34config SIBYTE_BCM112X
31 bool 35 bool
36 select IRQ_CPU
32 select SIBYTE_SB1xxx_SOC 37 select SIBYTE_SB1xxx_SOC
33 select SIBYTE_HAS_ZBUS_PROFILING 38 select SIBYTE_HAS_ZBUS_PROFILING
34 39
35config SIBYTE_BCM1x80 40config SIBYTE_BCM1x80
36 bool 41 bool
37 select HW_HAS_PCI 42 select HW_HAS_PCI
43 select IRQ_CPU
38 select SIBYTE_HAS_ZBUS_PROFILING 44 select SIBYTE_HAS_ZBUS_PROFILING
39 select SIBYTE_SB1xxx_SOC 45 select SIBYTE_SB1xxx_SOC
40 select SYS_SUPPORTS_SMP 46 select SYS_SUPPORTS_SMP
@@ -42,6 +48,7 @@ config SIBYTE_BCM1x80
42config SIBYTE_BCM1x55 48config SIBYTE_BCM1x55
43 bool 49 bool
44 select HW_HAS_PCI 50 select HW_HAS_PCI
51 select IRQ_CPU
45 select SIBYTE_SB1xxx_SOC 52 select SIBYTE_SB1xxx_SOC
46 select SIBYTE_HAS_ZBUS_PROFILING 53 select SIBYTE_HAS_ZBUS_PROFILING
47 select SYS_SUPPORTS_SMP 54 select SYS_SUPPORTS_SMP
@@ -49,6 +56,7 @@ config SIBYTE_BCM1x55
49config SIBYTE_SB1xxx_SOC 56config SIBYTE_SB1xxx_SOC
50 bool 57 bool
51 select DMA_COHERENT 58 select DMA_COHERENT
59 select IRQ_CPU
52 select SIBYTE_CFE 60 select SIBYTE_CFE
53 select SWAP_IO_SPACE 61 select SWAP_IO_SPACE
54 select SYS_SUPPORTS_32BIT_KERNEL 62 select SYS_SUPPORTS_32BIT_KERNEL
@@ -124,6 +132,7 @@ config SB1_CERR_STALL
124config SIBYTE_CFE 132config SIBYTE_CFE
125 bool "Booting from CFE" 133 bool "Booting from CFE"
126 depends on SIBYTE_SB1xxx_SOC 134 depends on SIBYTE_SB1xxx_SOC
135 select CFE
127 select SYS_HAS_EARLY_PRINTK 136 select SYS_HAS_EARLY_PRINTK
128 help 137 help
129 Make use of the CFE API for enumerating available memory, 138 Make use of the CFE API for enumerating available memory,
@@ -165,10 +174,6 @@ config SIBYTE_BW_TRACE
165 buffer activity. Raw buffer data is dumped to console, and 174 buffer activity. Raw buffer data is dumped to console, and
166 must be processed off-line. 175 must be processed off-line.
167 176
168config SIBYTE_SB1250_PROF
169 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
170 depends on SIBYTE_SB1xxx_SOC
171
172config SIBYTE_TBPROF 177config SIBYTE_TBPROF
173 tristate "Support for ZBbus profiling" 178 tristate "Support for ZBbus profiling"
174 depends on SIBYTE_HAS_ZBUS_PROFILING 179 depends on SIBYTE_HAS_ZBUS_PROFILING
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index e729b5f30264..7aa79bf63c4a 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -289,7 +289,7 @@ int bcm1480_steal_irq(int irq)
289 if (irq >= BCM1480_NR_IRQS) 289 if (irq >= BCM1480_NR_IRQS)
290 return -EINVAL; 290 return -EINVAL;
291 291
292 spin_lock_irqsave(&desc->lock,flags); 292 spin_lock_irqsave(&desc->lock, flags);
293 /* Don't allow sharing at all for these */ 293 /* Don't allow sharing at all for these */
294 if (desc->action != NULL) 294 if (desc->action != NULL)
295 retval = -EBUSY; 295 retval = -EBUSY;
@@ -297,7 +297,7 @@ int bcm1480_steal_irq(int irq)
297 desc->action = &bcm1480_dummy_action; 297 desc->action = &bcm1480_dummy_action;
298 desc->depth = 0; 298 desc->depth = 0;
299 } 299 }
300 spin_unlock_irqrestore(&desc->lock,flags); 300 spin_unlock_irqrestore(&desc->lock, flags);
301 return 0; 301 return 0;
302} 302}
303 303
@@ -431,8 +431,8 @@ void __init arch_init_irq(void)
431 431
432#include <linux/delay.h> 432#include <linux/delay.h>
433 433
434#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 434#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
435#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 435#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
436 436
437static void bcm1480_kgdb_interrupt(void) 437static void bcm1480_kgdb_interrupt(void)
438{ 438{
@@ -450,7 +450,6 @@ static void bcm1480_kgdb_interrupt(void)
450 450
451#endif /* CONFIG_KGDB */ 451#endif /* CONFIG_KGDB */
452 452
453extern void bcm1480_timer_interrupt(void);
454extern void bcm1480_mailbox_interrupt(void); 453extern void bcm1480_mailbox_interrupt(void);
455 454
456asmlinkage void plat_irq_dispatch(void) 455asmlinkage void plat_irq_dispatch(void)
@@ -470,8 +469,16 @@ asmlinkage void plat_irq_dispatch(void)
470 else 469 else
471#endif 470#endif
472 471
473 if (pending & CAUSEF_IP4) 472 if (pending & CAUSEF_IP4) {
474 bcm1480_timer_interrupt(); 473 int cpu = smp_processor_id();
474 int irq = K_BCM1480_INT_TIMER_0 + cpu;
475
476 /* Reset the timer */
477 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
478 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
479
480 do_IRQ(irq);
481 }
475 482
476#ifdef CONFIG_SMP 483#ifdef CONFIG_SMP
477 else if (pending & CAUSEF_IP3) 484 else if (pending & CAUSEF_IP3)
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index 7e1aa348b8e0..05ed92c92b69 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -43,16 +43,49 @@ static unsigned int part_type;
43static char *soc_str; 43static char *soc_str;
44static char *pass_str; 44static char *pass_str;
45 45
46static inline int setup_bcm1x80_bcm1x55(void); 46static int __init setup_bcm1x80_bcm1x55(void)
47{
48 int ret = 0;
49
50 switch (soc_pass) {
51 case K_SYS_REVISION_BCM1480_S0:
52 periph_rev = 1;
53 pass_str = "S0 (pass1)";
54 break;
55 case K_SYS_REVISION_BCM1480_A1:
56 periph_rev = 1;
57 pass_str = "A1 (pass1)";
58 break;
59 case K_SYS_REVISION_BCM1480_A2:
60 periph_rev = 1;
61 pass_str = "A2 (pass1)";
62 break;
63 case K_SYS_REVISION_BCM1480_A3:
64 periph_rev = 1;
65 pass_str = "A3 (pass1)";
66 break;
67 case K_SYS_REVISION_BCM1480_B0:
68 periph_rev = 1;
69 pass_str = "B0 (pass2)";
70 break;
71 default:
72 printk("Unknown %s rev %x\n", soc_str, soc_pass);
73 periph_rev = 1;
74 pass_str = "Unknown Revision";
75 break;
76 }
77
78 return ret;
79}
47 80
48/* Setup code likely to be common to all SiByte platforms */ 81/* Setup code likely to be common to all SiByte platforms */
49 82
50static inline int sys_rev_decode(void) 83static int __init sys_rev_decode(void)
51{ 84{
52 int ret = 0; 85 int ret = 0;
53 86
54 switch (soc_type) { 87 switch (soc_type) {
55 case K_SYS_SOC_TYPE_BCM1x80: 88 case K_SYS_SOC_TYPE_BCM1x80:
56 if (part_type == K_SYS_PART_BCM1480) 89 if (part_type == K_SYS_PART_BCM1480)
57 soc_str = "BCM1480"; 90 soc_str = "BCM1480";
58 else if (part_type == K_SYS_PART_BCM1280) 91 else if (part_type == K_SYS_PART_BCM1280)
@@ -62,7 +95,7 @@ static inline int sys_rev_decode(void)
62 ret = setup_bcm1x80_bcm1x55(); 95 ret = setup_bcm1x80_bcm1x55();
63 break; 96 break;
64 97
65 case K_SYS_SOC_TYPE_BCM1x55: 98 case K_SYS_SOC_TYPE_BCM1x55:
66 if (part_type == K_SYS_PART_BCM1455) 99 if (part_type == K_SYS_PART_BCM1455)
67 soc_str = "BCM1455"; 100 soc_str = "BCM1455";
68 else if (part_type == K_SYS_PART_BCM1255) 101 else if (part_type == K_SYS_PART_BCM1255)
@@ -72,49 +105,16 @@ static inline int sys_rev_decode(void)
72 ret = setup_bcm1x80_bcm1x55(); 105 ret = setup_bcm1x80_bcm1x55();
73 break; 106 break;
74 107
75 default: 108 default:
76 printk("Unknown part type %x\n", part_type); 109 printk("Unknown part type %x\n", part_type);
77 ret = 1; 110 ret = 1;
78 break; 111 break;
79 } 112 }
80 return ret;
81}
82 113
83static inline int setup_bcm1x80_bcm1x55(void)
84{
85 int ret = 0;
86
87 switch (soc_pass) {
88 case K_SYS_REVISION_BCM1480_S0:
89 periph_rev = 1;
90 pass_str = "S0 (pass1)";
91 break;
92 case K_SYS_REVISION_BCM1480_A1:
93 periph_rev = 1;
94 pass_str = "A1 (pass1)";
95 break;
96 case K_SYS_REVISION_BCM1480_A2:
97 periph_rev = 1;
98 pass_str = "A2 (pass1)";
99 break;
100 case K_SYS_REVISION_BCM1480_A3:
101 periph_rev = 1;
102 pass_str = "A3 (pass1)";
103 break;
104 case K_SYS_REVISION_BCM1480_B0:
105 periph_rev = 1;
106 pass_str = "B0 (pass2)";
107 break;
108 default:
109 printk("Unknown %s rev %x\n", soc_str, soc_pass);
110 periph_rev = 1;
111 pass_str = "Unknown Revision";
112 break;
113 }
114 return ret; 114 return ret;
115} 115}
116 116
117void bcm1480_setup(void) 117void __init bcm1480_setup(void)
118{ 118{
119 uint64_t sys_rev; 119 uint64_t sys_rev;
120 int plldiv; 120 int plldiv;
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index 6f3f71bf4244..40d7126cd5bf 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -25,6 +25,7 @@
25 * code to do general bookkeeping (e.g. update jiffies, run 25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.) 26 * bottom halves, etc.)
27 */ 27 */
28#include <linux/clockchips.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
29#include <linux/sched.h> 30#include <linux/sched.h>
30#include <linux/spinlock.h> 31#include <linux/spinlock.h>
@@ -55,15 +56,12 @@
55 56
56extern int bcm1480_steal_irq(int irq); 57extern int bcm1480_steal_irq(int irq);
57 58
58void bcm1480_time_init(void) 59void __init plat_time_init(void)
59{ 60{
60 int cpu = smp_processor_id(); 61 unsigned int cpu = smp_processor_id();
61 int irq = K_BCM1480_INT_TIMER_0+cpu; 62 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
62 63
63 /* Only have 4 general purpose timers */ 64 BUG_ON(cpu > 3); /* Only have 4 general purpose timers */
64 if (cpu > 3) {
65 BUG();
66 }
67 65
68 bcm1480_mask_irq(cpu, irq); 66 bcm1480_mask_irq(cpu, irq);
69 67
@@ -71,27 +69,83 @@ void bcm1480_time_init(void)
71 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) 69 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H)
72 + (irq<<3))); 70 + (irq<<3)));
73 71
74 /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */ 72 bcm1480_unmask_irq(cpu, irq);
75 /* Disable the timer and set up the count */ 73 bcm1480_steal_irq(irq);
76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 74}
77 __raw_writeq( 75
78 BCM1480_HPT_VALUE/HZ 76/*
79 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); 77 * The general purpose timer ticks at 1 Mhz independent if
78 * the rest of the system
79 */
80static void sibyte_set_mode(enum clock_event_mode mode,
81 struct clock_event_device *evt)
82{
83 unsigned int cpu = smp_processor_id();
84 void __iomem *timer_cfg, *timer_init;
85
86 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
87 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
88
89 switch (mode) {
90 case CLOCK_EVT_MODE_PERIODIC:
91 __raw_writeq(0, timer_cfg);
92 __raw_writeq(BCM1480_HPT_VALUE / HZ - 1, timer_init);
93 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
94 timer_cfg);
95 break;
96
97 case CLOCK_EVT_MODE_ONESHOT:
98 /* Stop the timer until we actually program a shot */
99 case CLOCK_EVT_MODE_SHUTDOWN:
100 __raw_writeq(0, timer_cfg);
101 break;
102
103 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
104 ;
105 }
106}
107
108struct clock_event_device sibyte_hpt_clockevent = {
109 .name = "bcm1480-counter",
110 .features = CLOCK_EVT_FEAT_PERIODIC,
111 .set_mode = sibyte_set_mode,
112 .shift = 32,
113 .irq = 0,
114};
115
116static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
117{
118 struct clock_event_device *cd = &sibyte_hpt_clockevent;
119 unsigned int cpu = smp_processor_id();
80 120
81 /* Set the timer running */ 121 /* Reset the timer */
82 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 122 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
83 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 123 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
124 cd->event_handler(cd);
84 125
85 bcm1480_unmask_irq(cpu, irq); 126 return IRQ_HANDLED;
86 bcm1480_steal_irq(irq); 127}
87 /* 128
88 * This interrupt is "special" in that it doesn't use the request_irq 129static struct irqaction sibyte_counter_irqaction = {
89 * way to hook the irq line. The timer interrupt is initialized early 130 .handler = sibyte_counter_handler,
90 * enough to make this a major pain, and it's also firing enough to 131 .flags = IRQF_DISABLED | IRQF_PERCPU,
91 * warrant a bit of special case code. bcm1480_timer_interrupt is 132 .name = "timer",
92 * called directly from irq_handler.S when IP[4] is set during an 133};
93 * interrupt 134
94 */ 135/*
136 * This interrupt is "special" in that it doesn't use the request_irq
137 * way to hook the irq line. The timer interrupt is initialized early
138 * enough to make this a major pain, and it's also firing enough to
139 * warrant a bit of special case code. bcm1480_timer_interrupt is
140 * called directly from irq_handler.S when IP[4] is set during an
141 * interrupt
142 */
143static void __init sb1480_clockevent_init(void)
144{
145 unsigned int cpu = smp_processor_id();
146 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
147
148 setup_irq(irq, &sibyte_counter_irqaction);
95} 149}
96 150
97void bcm1480_timer_interrupt(void) 151void bcm1480_timer_interrupt(void)
@@ -103,18 +157,7 @@ void bcm1480_timer_interrupt(void)
103 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 157 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
104 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 158 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
105 159
106 if (cpu == 0) { 160 ll_timer_interrupt(irq);
107 /*
108 * CPU 0 handles the global timer interrupt job
109 */
110 ll_timer_interrupt(irq);
111 }
112 else {
113 /*
114 * other CPUs should just do profiling and process accounting
115 */
116 ll_local_timer_interrupt(irq);
117 }
118} 161}
119 162
120static cycle_t bcm1480_hpt_read(void) 163static cycle_t bcm1480_hpt_read(void)
@@ -129,4 +172,5 @@ void __init bcm1480_hpt_setup(void)
129{ 172{
130 clocksource_mips.read = bcm1480_hpt_read; 173 clocksource_mips.read = bcm1480_hpt_read;
131 mips_hpt_frequency = BCM1480_HPT_VALUE; 174 mips_hpt_frequency = BCM1480_HPT_VALUE;
175 sb1480_clockevent_init();
132} 176}
diff --git a/arch/mips/sibyte/cfe/Makefile b/arch/mips/sibyte/cfe/Makefile
index 059d84a1d8a8..a1214937b705 100644
--- a/arch/mips/sibyte/cfe/Makefile
+++ b/arch/mips/sibyte/cfe/Makefile
@@ -1,3 +1,3 @@
1lib-y = cfe_api.o setup.o 1lib-y = setup.o
2lib-$(CONFIG_SMP) += smp.o 2lib-$(CONFIG_SMP) += smp.o
3lib-$(CONFIG_SIBYTE_CFE_CONSOLE) += console.o 3lib-$(CONFIG_SIBYTE_CFE_CONSOLE) += console.o
diff --git a/arch/mips/sibyte/cfe/cfe_api.c b/arch/mips/sibyte/cfe/cfe_api.c
deleted file mode 100644
index c0213605e18a..000000000000
--- a/arch/mips/sibyte/cfe/cfe_api.c
+++ /dev/null
@@ -1,502 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/* *********************************************************************
20 *
21 * Broadcom Common Firmware Environment (CFE)
22 *
23 * Device Function stubs File: cfe_api.c
24 *
25 * This module contains device function stubs (small routines to
26 * call the standard "iocb" interface entry point to CFE).
27 * There should be one routine here per iocb function call.
28 *
29 * Authors: Mitch Lichtenberg, Chris Demetriou
30 *
31 ********************************************************************* */
32
33#include "cfe_api.h"
34#include "cfe_api_int.h"
35
36/* Cast from a native pointer to a cfe_xptr_t and back. */
37#define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n))
38#define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x))
39
40#ifdef CFE_API_IMPL_NAMESPACE
41#define cfe_iocb_dispatch(a) __cfe_iocb_dispatch(a)
42#endif
43int cfe_iocb_dispatch(cfe_xiocb_t * xiocb);
44
45#if defined(CFE_API_common) || defined(CFE_API_ALL)
46/*
47 * Declare the dispatch function with args of "intptr_t".
48 * This makes sure whatever model we're compiling in
49 * puts the pointers in a single register. For example,
50 * combining -mlong64 and -mips1 or -mips2 would lead to
51 * trouble, since the handle and IOCB pointer will be
52 * passed in two registers each, and CFE expects one.
53 */
54
55static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb) = 0;
56static cfe_xuint_t cfe_handle = 0;
57
58int cfe_init(cfe_xuint_t handle, cfe_xuint_t ept)
59{
60 cfe_dispfunc = NATIVE_FROM_XPTR(ept);
61 cfe_handle = handle;
62 return 0;
63}
64
65int cfe_iocb_dispatch(cfe_xiocb_t * xiocb)
66{
67 if (!cfe_dispfunc)
68 return -1;
69 return (*cfe_dispfunc) ((intptr_t) cfe_handle, (intptr_t) xiocb);
70}
71#endif /* CFE_API_common || CFE_API_ALL */
72
73#if defined(CFE_API_close) || defined(CFE_API_ALL)
74int cfe_close(int handle)
75{
76 cfe_xiocb_t xiocb;
77
78 xiocb.xiocb_fcode = CFE_CMD_DEV_CLOSE;
79 xiocb.xiocb_status = 0;
80 xiocb.xiocb_handle = handle;
81 xiocb.xiocb_flags = 0;
82 xiocb.xiocb_psize = 0;
83
84 cfe_iocb_dispatch(&xiocb);
85
86 return xiocb.xiocb_status;
87
88}
89#endif /* CFE_API_close || CFE_API_ALL */
90
91#if defined(CFE_API_cpu_start) || defined(CFE_API_ALL)
92int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1)
93{
94 cfe_xiocb_t xiocb;
95
96 xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
97 xiocb.xiocb_status = 0;
98 xiocb.xiocb_handle = 0;
99 xiocb.xiocb_flags = 0;
100 xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t);
101 xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
102 xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START;
103 xiocb.plist.xiocb_cpuctl.gp_val = gp;
104 xiocb.plist.xiocb_cpuctl.sp_val = sp;
105 xiocb.plist.xiocb_cpuctl.a1_val = a1;
106 xiocb.plist.xiocb_cpuctl.start_addr = (long) fn;
107
108 cfe_iocb_dispatch(&xiocb);
109
110 return xiocb.xiocb_status;
111}
112#endif /* CFE_API_cpu_start || CFE_API_ALL */
113
114#if defined(CFE_API_cpu_stop) || defined(CFE_API_ALL)
115int cfe_cpu_stop(int cpu)
116{
117 cfe_xiocb_t xiocb;
118
119 xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
120 xiocb.xiocb_status = 0;
121 xiocb.xiocb_handle = 0;
122 xiocb.xiocb_flags = 0;
123 xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t);
124 xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
125 xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_STOP;
126
127 cfe_iocb_dispatch(&xiocb);
128
129 return xiocb.xiocb_status;
130}
131#endif /* CFE_API_cpu_stop || CFE_API_ALL */
132
133#if defined(CFE_API_enumenv) || defined(CFE_API_ALL)
134int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
135{
136 cfe_xiocb_t xiocb;
137
138 xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
139 xiocb.xiocb_status = 0;
140 xiocb.xiocb_handle = 0;
141 xiocb.xiocb_flags = 0;
142 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
143 xiocb.plist.xiocb_envbuf.enum_idx = idx;
144 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
145 xiocb.plist.xiocb_envbuf.name_length = namelen;
146 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
147 xiocb.plist.xiocb_envbuf.val_length = vallen;
148
149 cfe_iocb_dispatch(&xiocb);
150
151 return xiocb.xiocb_status;
152}
153#endif /* CFE_API_enumenv || CFE_API_ALL */
154
155#if defined(CFE_API_enummem) || defined(CFE_API_ALL)
156int
157cfe_enummem(int idx, int flags, cfe_xuint_t * start, cfe_xuint_t * length,
158 cfe_xuint_t * type)
159{
160 cfe_xiocb_t xiocb;
161
162 xiocb.xiocb_fcode = CFE_CMD_FW_MEMENUM;
163 xiocb.xiocb_status = 0;
164 xiocb.xiocb_handle = 0;
165 xiocb.xiocb_flags = flags;
166 xiocb.xiocb_psize = sizeof(xiocb_meminfo_t);
167 xiocb.plist.xiocb_meminfo.mi_idx = idx;
168
169 cfe_iocb_dispatch(&xiocb);
170
171 if (xiocb.xiocb_status < 0)
172 return xiocb.xiocb_status;
173
174 *start = xiocb.plist.xiocb_meminfo.mi_addr;
175 *length = xiocb.plist.xiocb_meminfo.mi_size;
176 *type = xiocb.plist.xiocb_meminfo.mi_type;
177
178 return 0;
179}
180#endif /* CFE_API_enummem || CFE_API_ALL */
181
182#if defined(CFE_API_exit) || defined(CFE_API_ALL)
183int cfe_exit(int warm, int status)
184{
185 cfe_xiocb_t xiocb;
186
187 xiocb.xiocb_fcode = CFE_CMD_FW_RESTART;
188 xiocb.xiocb_status = 0;
189 xiocb.xiocb_handle = 0;
190 xiocb.xiocb_flags = warm ? CFE_FLG_WARMSTART : 0;
191 xiocb.xiocb_psize = sizeof(xiocb_exitstat_t);
192 xiocb.plist.xiocb_exitstat.status = status;
193
194 cfe_iocb_dispatch(&xiocb);
195
196 return xiocb.xiocb_status;
197}
198#endif /* CFE_API_exit || CFE_API_ALL */
199
200#if defined(CFE_API_flushcache) || defined(CFE_API_ALL)
201int cfe_flushcache(int flg)
202{
203 cfe_xiocb_t xiocb;
204
205 xiocb.xiocb_fcode = CFE_CMD_FW_FLUSHCACHE;
206 xiocb.xiocb_status = 0;
207 xiocb.xiocb_handle = 0;
208 xiocb.xiocb_flags = flg;
209 xiocb.xiocb_psize = 0;
210
211 cfe_iocb_dispatch(&xiocb);
212
213 return xiocb.xiocb_status;
214}
215#endif /* CFE_API_flushcache || CFE_API_ALL */
216
217#if defined(CFE_API_getdevinfo) || defined(CFE_API_ALL)
218int cfe_getdevinfo(char *name)
219{
220 cfe_xiocb_t xiocb;
221
222 xiocb.xiocb_fcode = CFE_CMD_DEV_GETINFO;
223 xiocb.xiocb_status = 0;
224 xiocb.xiocb_handle = 0;
225 xiocb.xiocb_flags = 0;
226 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
227 xiocb.plist.xiocb_buffer.buf_offset = 0;
228 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
229 xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name);
230
231 cfe_iocb_dispatch(&xiocb);
232
233 if (xiocb.xiocb_status < 0)
234 return xiocb.xiocb_status;
235 return xiocb.plist.xiocb_buffer.buf_devflags;
236}
237#endif /* CFE_API_getdevinfo || CFE_API_ALL */
238
239#if defined(CFE_API_getenv) || defined(CFE_API_ALL)
240int cfe_getenv(char *name, char *dest, int destlen)
241{
242 cfe_xiocb_t xiocb;
243
244 *dest = 0;
245
246 xiocb.xiocb_fcode = CFE_CMD_ENV_GET;
247 xiocb.xiocb_status = 0;
248 xiocb.xiocb_handle = 0;
249 xiocb.xiocb_flags = 0;
250 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
251 xiocb.plist.xiocb_envbuf.enum_idx = 0;
252 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
253 xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name);
254 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(dest);
255 xiocb.plist.xiocb_envbuf.val_length = destlen;
256
257 cfe_iocb_dispatch(&xiocb);
258
259 return xiocb.xiocb_status;
260}
261#endif /* CFE_API_getenv || CFE_API_ALL */
262
263#if defined(CFE_API_getfwinfo) || defined(CFE_API_ALL)
264int cfe_getfwinfo(cfe_fwinfo_t * info)
265{
266 cfe_xiocb_t xiocb;
267
268 xiocb.xiocb_fcode = CFE_CMD_FW_GETINFO;
269 xiocb.xiocb_status = 0;
270 xiocb.xiocb_handle = 0;
271 xiocb.xiocb_flags = 0;
272 xiocb.xiocb_psize = sizeof(xiocb_fwinfo_t);
273
274 cfe_iocb_dispatch(&xiocb);
275
276 if (xiocb.xiocb_status < 0)
277 return xiocb.xiocb_status;
278
279 info->fwi_version = xiocb.plist.xiocb_fwinfo.fwi_version;
280 info->fwi_totalmem = xiocb.plist.xiocb_fwinfo.fwi_totalmem;
281 info->fwi_flags = xiocb.plist.xiocb_fwinfo.fwi_flags;
282 info->fwi_boardid = xiocb.plist.xiocb_fwinfo.fwi_boardid;
283 info->fwi_bootarea_va = xiocb.plist.xiocb_fwinfo.fwi_bootarea_va;
284 info->fwi_bootarea_pa = xiocb.plist.xiocb_fwinfo.fwi_bootarea_pa;
285 info->fwi_bootarea_size =
286 xiocb.plist.xiocb_fwinfo.fwi_bootarea_size;
287#if 0
288 info->fwi_reserved1 = xiocb.plist.xiocb_fwinfo.fwi_reserved1;
289 info->fwi_reserved2 = xiocb.plist.xiocb_fwinfo.fwi_reserved2;
290 info->fwi_reserved3 = xiocb.plist.xiocb_fwinfo.fwi_reserved3;
291#endif
292
293 return 0;
294}
295#endif /* CFE_API_getfwinfo || CFE_API_ALL */
296
297#if defined(CFE_API_getstdhandle) || defined(CFE_API_ALL)
298int cfe_getstdhandle(int flg)
299{
300 cfe_xiocb_t xiocb;
301
302 xiocb.xiocb_fcode = CFE_CMD_DEV_GETHANDLE;
303 xiocb.xiocb_status = 0;
304 xiocb.xiocb_handle = 0;
305 xiocb.xiocb_flags = flg;
306 xiocb.xiocb_psize = 0;
307
308 cfe_iocb_dispatch(&xiocb);
309
310 if (xiocb.xiocb_status < 0)
311 return xiocb.xiocb_status;
312 return xiocb.xiocb_handle;
313}
314#endif /* CFE_API_getstdhandle || CFE_API_ALL */
315
316#if defined(CFE_API_getticks) || defined(CFE_API_ALL)
317int64_t
318#ifdef CFE_API_IMPL_NAMESPACE
319__cfe_getticks(void)
320#else
321cfe_getticks(void)
322#endif
323{
324 cfe_xiocb_t xiocb;
325
326 xiocb.xiocb_fcode = CFE_CMD_FW_GETTIME;
327 xiocb.xiocb_status = 0;
328 xiocb.xiocb_handle = 0;
329 xiocb.xiocb_flags = 0;
330 xiocb.xiocb_psize = sizeof(xiocb_time_t);
331 xiocb.plist.xiocb_time.ticks = 0;
332
333 cfe_iocb_dispatch(&xiocb);
334
335 return xiocb.plist.xiocb_time.ticks;
336
337}
338#endif /* CFE_API_getticks || CFE_API_ALL */
339
340#if defined(CFE_API_inpstat) || defined(CFE_API_ALL)
341int cfe_inpstat(int handle)
342{
343 cfe_xiocb_t xiocb;
344
345 xiocb.xiocb_fcode = CFE_CMD_DEV_INPSTAT;
346 xiocb.xiocb_status = 0;
347 xiocb.xiocb_handle = handle;
348 xiocb.xiocb_flags = 0;
349 xiocb.xiocb_psize = sizeof(xiocb_inpstat_t);
350 xiocb.plist.xiocb_inpstat.inp_status = 0;
351
352 cfe_iocb_dispatch(&xiocb);
353
354 if (xiocb.xiocb_status < 0)
355 return xiocb.xiocb_status;
356 return xiocb.plist.xiocb_inpstat.inp_status;
357}
358#endif /* CFE_API_inpstat || CFE_API_ALL */
359
360#if defined(CFE_API_ioctl) || defined(CFE_API_ALL)
361int
362cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
363 int length, int *retlen, cfe_xuint_t offset)
364{
365 cfe_xiocb_t xiocb;
366
367 xiocb.xiocb_fcode = CFE_CMD_DEV_IOCTL;
368 xiocb.xiocb_status = 0;
369 xiocb.xiocb_handle = handle;
370 xiocb.xiocb_flags = 0;
371 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
372 xiocb.plist.xiocb_buffer.buf_offset = offset;
373 xiocb.plist.xiocb_buffer.buf_ioctlcmd = ioctlnum;
374 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
375 xiocb.plist.xiocb_buffer.buf_length = length;
376
377 cfe_iocb_dispatch(&xiocb);
378
379 if (retlen)
380 *retlen = xiocb.plist.xiocb_buffer.buf_retlen;
381 return xiocb.xiocb_status;
382}
383#endif /* CFE_API_ioctl || CFE_API_ALL */
384
385#if defined(CFE_API_open) || defined(CFE_API_ALL)
386int cfe_open(char *name)
387{
388 cfe_xiocb_t xiocb;
389
390 xiocb.xiocb_fcode = CFE_CMD_DEV_OPEN;
391 xiocb.xiocb_status = 0;
392 xiocb.xiocb_handle = 0;
393 xiocb.xiocb_flags = 0;
394 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
395 xiocb.plist.xiocb_buffer.buf_offset = 0;
396 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(name);
397 xiocb.plist.xiocb_buffer.buf_length = cfe_strlen(name);
398
399 cfe_iocb_dispatch(&xiocb);
400
401 if (xiocb.xiocb_status < 0)
402 return xiocb.xiocb_status;
403 return xiocb.xiocb_handle;
404}
405#endif /* CFE_API_open || CFE_API_ALL */
406
407#if defined(CFE_API_read) || defined(CFE_API_ALL)
408int cfe_read(int handle, unsigned char *buffer, int length)
409{
410 return cfe_readblk(handle, 0, buffer, length);
411}
412#endif /* CFE_API_read || CFE_API_ALL */
413
414#if defined(CFE_API_readblk) || defined(CFE_API_ALL)
415int
416cfe_readblk(int handle, cfe_xint_t offset, unsigned char *buffer,
417 int length)
418{
419 cfe_xiocb_t xiocb;
420
421 xiocb.xiocb_fcode = CFE_CMD_DEV_READ;
422 xiocb.xiocb_status = 0;
423 xiocb.xiocb_handle = handle;
424 xiocb.xiocb_flags = 0;
425 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
426 xiocb.plist.xiocb_buffer.buf_offset = offset;
427 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
428 xiocb.plist.xiocb_buffer.buf_length = length;
429
430 cfe_iocb_dispatch(&xiocb);
431
432 if (xiocb.xiocb_status < 0)
433 return xiocb.xiocb_status;
434 return xiocb.plist.xiocb_buffer.buf_retlen;
435}
436#endif /* CFE_API_readblk || CFE_API_ALL */
437
438#if defined(CFE_API_setenv) || defined(CFE_API_ALL)
439int cfe_setenv(char *name, char *val)
440{
441 cfe_xiocb_t xiocb;
442
443 xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
444 xiocb.xiocb_status = 0;
445 xiocb.xiocb_handle = 0;
446 xiocb.xiocb_flags = 0;
447 xiocb.xiocb_psize = sizeof(xiocb_envbuf_t);
448 xiocb.plist.xiocb_envbuf.enum_idx = 0;
449 xiocb.plist.xiocb_envbuf.name_ptr = XPTR_FROM_NATIVE(name);
450 xiocb.plist.xiocb_envbuf.name_length = cfe_strlen(name);
451 xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
452 xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);
453
454 cfe_iocb_dispatch(&xiocb);
455
456 return xiocb.xiocb_status;
457}
458#endif /* CFE_API_setenv || CFE_API_ALL */
459
460#if (defined(CFE_API_strlen) || defined(CFE_API_ALL)) \
461 && !defined(CFE_API_STRLEN_CUSTOM)
462int cfe_strlen(char *name)
463{
464 int count = 0;
465
466 while (*name++)
467 count++;
468
469 return count;
470}
471#endif /* CFE_API_strlen || CFE_API_ALL */
472
473#if defined(CFE_API_write) || defined(CFE_API_ALL)
474int cfe_write(int handle, unsigned char *buffer, int length)
475{
476 return cfe_writeblk(handle, 0, buffer, length);
477}
478#endif /* CFE_API_write || CFE_API_ALL */
479
480#if defined(CFE_API_writeblk) || defined(CFE_API_ALL)
481int
482cfe_writeblk(int handle, cfe_xint_t offset, unsigned char *buffer,
483 int length)
484{
485 cfe_xiocb_t xiocb;
486
487 xiocb.xiocb_fcode = CFE_CMD_DEV_WRITE;
488 xiocb.xiocb_status = 0;
489 xiocb.xiocb_handle = handle;
490 xiocb.xiocb_flags = 0;
491 xiocb.xiocb_psize = sizeof(xiocb_buffer_t);
492 xiocb.plist.xiocb_buffer.buf_offset = offset;
493 xiocb.plist.xiocb_buffer.buf_ptr = XPTR_FROM_NATIVE(buffer);
494 xiocb.plist.xiocb_buffer.buf_length = length;
495
496 cfe_iocb_dispatch(&xiocb);
497
498 if (xiocb.xiocb_status < 0)
499 return xiocb.xiocb_status;
500 return xiocb.plist.xiocb_buffer.buf_retlen;
501}
502#endif /* CFE_API_writeblk || CFE_API_ALL */
diff --git a/arch/mips/sibyte/cfe/cfe_api.h b/arch/mips/sibyte/cfe/cfe_api.h
deleted file mode 100644
index d8230cc53b81..000000000000
--- a/arch/mips/sibyte/cfe/cfe_api.h
+++ /dev/null
@@ -1,185 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/* *********************************************************************
20 *
21 * Broadcom Common Firmware Environment (CFE)
22 *
23 * Device function prototypes File: cfe_api.h
24 *
25 * This file contains declarations for doing callbacks to
26 * cfe from an application. It should be the only header
27 * needed by the application to use this library
28 *
29 * Authors: Mitch Lichtenberg, Chris Demetriou
30 *
31 ********************************************************************* */
32
33#ifndef CFE_API_H
34#define CFE_API_H
35
36/*
37 * Apply customizations here for different OSes. These need to:
38 * * typedef uint64_t, int64_t, intptr_t, uintptr_t.
39 * * define cfe_strlen() if use of an existing function is desired.
40 * * define CFE_API_IMPL_NAMESPACE if API functions are to use
41 * names in the implementation namespace.
42 * Also, optionally, if the build environment does not do so automatically,
43 * CFE_API_* can be defined here as desired.
44 */
45/* Begin customization. */
46#include <linux/types.h>
47#include <linux/string.h>
48
49typedef long intptr_t;
50
51#define cfe_strlen strlen
52
53#define CFE_API_ALL
54#define CFE_API_STRLEN_CUSTOM
55/* End customization. */
56
57
58/* *********************************************************************
59 * Constants
60 ********************************************************************* */
61
62/* Seal indicating CFE's presence, passed to user program. */
63#define CFE_EPTSEAL 0x43464531
64
65#define CFE_MI_RESERVED 0 /* memory is reserved, do not use */
66#define CFE_MI_AVAILABLE 1 /* memory is available */
67
68#define CFE_FLG_WARMSTART 0x00000001
69#define CFE_FLG_FULL_ARENA 0x00000001
70#define CFE_FLG_ENV_PERMANENT 0x00000001
71
72#define CFE_CPU_CMD_START 1
73#define CFE_CPU_CMD_STOP 0
74
75#define CFE_STDHANDLE_CONSOLE 0
76
77#define CFE_DEV_NETWORK 1
78#define CFE_DEV_DISK 2
79#define CFE_DEV_FLASH 3
80#define CFE_DEV_SERIAL 4
81#define CFE_DEV_CPU 5
82#define CFE_DEV_NVRAM 6
83#define CFE_DEV_CLOCK 7
84#define CFE_DEV_OTHER 8
85#define CFE_DEV_MASK 0x0F
86
87#define CFE_CACHE_FLUSH_D 1
88#define CFE_CACHE_INVAL_I 2
89#define CFE_CACHE_INVAL_D 4
90#define CFE_CACHE_INVAL_L2 8
91
92#define CFE_FWI_64BIT 0x00000001
93#define CFE_FWI_32BIT 0x00000002
94#define CFE_FWI_RELOC 0x00000004
95#define CFE_FWI_UNCACHED 0x00000008
96#define CFE_FWI_MULTICPU 0x00000010
97#define CFE_FWI_FUNCSIM 0x00000020
98#define CFE_FWI_RTLSIM 0x00000040
99
100typedef struct {
101 int64_t fwi_version; /* major, minor, eco version */
102 int64_t fwi_totalmem; /* total installed mem */
103 int64_t fwi_flags; /* various flags */
104 int64_t fwi_boardid; /* board ID */
105 int64_t fwi_bootarea_va; /* VA of boot area */
106 int64_t fwi_bootarea_pa; /* PA of boot area */
107 int64_t fwi_bootarea_size; /* size of boot area */
108} cfe_fwinfo_t;
109
110
111/*
112 * cfe_strlen is handled specially: If already defined, it has been
113 * overridden in this environment with a standard strlen-like function.
114 */
115#ifdef cfe_strlen
116# define CFE_API_STRLEN_CUSTOM
117#else
118# ifdef CFE_API_IMPL_NAMESPACE
119# define cfe_strlen(a) __cfe_strlen(a)
120# endif
121int cfe_strlen(char *name);
122#endif
123
124/*
125 * Defines and prototypes for functions which take no arguments.
126 */
127#ifdef CFE_API_IMPL_NAMESPACE
128int64_t __cfe_getticks(void);
129#define cfe_getticks() __cfe_getticks()
130#else
131int64_t cfe_getticks(void);
132#endif
133
134/*
135 * Defines and prototypes for the rest of the functions.
136 */
137#ifdef CFE_API_IMPL_NAMESPACE
138#define cfe_close(a) __cfe_close(a)
139#define cfe_cpu_start(a,b,c,d,e) __cfe_cpu_start(a,b,c,d,e)
140#define cfe_cpu_stop(a) __cfe_cpu_stop(a)
141#define cfe_enumenv(a,b,d,e,f) __cfe_enumenv(a,b,d,e,f)
142#define cfe_enummem(a,b,c,d,e) __cfe_enummem(a,b,c,d,e)
143#define cfe_exit(a,b) __cfe_exit(a,b)
144#define cfe_flushcache(a) __cfe_cacheflush(a)
145#define cfe_getdevinfo(a) __cfe_getdevinfo(a)
146#define cfe_getenv(a,b,c) __cfe_getenv(a,b,c)
147#define cfe_getfwinfo(a) __cfe_getfwinfo(a)
148#define cfe_getstdhandle(a) __cfe_getstdhandle(a)
149#define cfe_init(a,b) __cfe_init(a,b)
150#define cfe_inpstat(a) __cfe_inpstat(a)
151#define cfe_ioctl(a,b,c,d,e,f) __cfe_ioctl(a,b,c,d,e,f)
152#define cfe_open(a) __cfe_open(a)
153#define cfe_read(a,b,c) __cfe_read(a,b,c)
154#define cfe_readblk(a,b,c,d) __cfe_readblk(a,b,c,d)
155#define cfe_setenv(a,b) __cfe_setenv(a,b)
156#define cfe_write(a,b,c) __cfe_write(a,b,c)
157#define cfe_writeblk(a,b,c,d) __cfe_writeblk(a,b,c,d)
158#endif /* CFE_API_IMPL_NAMESPACE */
159
160int cfe_close(int handle);
161int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1);
162int cfe_cpu_stop(int cpu);
163int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);
164int cfe_enummem(int idx, int flags, uint64_t * start, uint64_t * length,
165 uint64_t * type);
166int cfe_exit(int warm, int status);
167int cfe_flushcache(int flg);
168int cfe_getdevinfo(char *name);
169int cfe_getenv(char *name, char *dest, int destlen);
170int cfe_getfwinfo(cfe_fwinfo_t * info);
171int cfe_getstdhandle(int flg);
172int cfe_init(uint64_t handle, uint64_t ept);
173int cfe_inpstat(int handle);
174int cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
175 int length, int *retlen, uint64_t offset);
176int cfe_open(char *name);
177int cfe_read(int handle, unsigned char *buffer, int length);
178int cfe_readblk(int handle, int64_t offset, unsigned char *buffer,
179 int length);
180int cfe_setenv(char *name, char *val);
181int cfe_write(int handle, unsigned char *buffer, int length);
182int cfe_writeblk(int handle, int64_t offset, unsigned char *buffer,
183 int length);
184
185#endif /* CFE_API_H */
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 4cec9d798d2f..81e3d54376e9 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -4,8 +4,8 @@
4 4
5#include <asm/sibyte/board.h> 5#include <asm/sibyte/board.h>
6 6
7#include "cfe_api.h" 7#include <asm/fw/cfe/cfe_api.h>
8#include "cfe_error.h" 8#include <asm/fw/cfe/cfe_error.h>
9 9
10extern int cfe_cons_handle; 10extern int cfe_cons_handle;
11 11
@@ -14,7 +14,7 @@ static void cfe_console_write(struct console *cons, const char *str,
14{ 14{
15 int i, last, written; 15 int i, last, written;
16 16
17 for (i=0,last=0; i<count; i++) { 17 for (i=0, last=0; i<count; i++) {
18 if (!str[i]) 18 if (!str[i])
19 /* XXXKW can/should this ever happen? */ 19 /* XXXKW can/should this ever happen? */
20 return; 20 return;
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index 51898dd1304a..dbd6e6fdd3f9 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -29,8 +29,8 @@
29#include <asm/reboot.h> 29#include <asm/reboot.h>
30#include <asm/sibyte/board.h> 30#include <asm/sibyte/board.h>
31 31
32#include "cfe_api.h" 32#include <asm/fw/cfe/cfe_api.h>
33#include "cfe_error.h" 33#include <asm/fw/cfe/cfe_error.h>
34 34
35/* Max ram addressable in 32-bit segments */ 35/* Max ram addressable in 32-bit segments */
36#ifdef CONFIG_64BIT 36#ifdef CONFIG_64BIT
@@ -309,7 +309,7 @@ void __init prom_init(void)
309 } 309 }
310 310
311#ifdef CONFIG_KGDB 311#ifdef CONFIG_KGDB
312 if ((arg = strstr(arcs_cmdline,"kgdb=duart")) != NULL) 312 if ((arg = strstr(arcs_cmdline, "kgdb=duart")) != NULL)
313 kgdb_port = (arg[10] == '0') ? 0 : 1; 313 kgdb_port = (arg[10] == '0') ? 0 : 1;
314 else 314 else
315 kgdb_port = 1; 315 kgdb_port = 1;
@@ -339,7 +339,6 @@ void __init prom_init(void)
339 /* Not sure this is needed, but it's the safe way. */ 339 /* Not sure this is needed, but it's the safe way. */
340 arcs_cmdline[CL_SIZE-1] = 0; 340 arcs_cmdline[CL_SIZE-1] = 0;
341 341
342 mips_machgroup = MACH_GROUP_SIBYTE;
343 prom_meminit(); 342 prom_meminit();
344} 343}
345 344
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 5de4cff9d14a..534a62912f21 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -21,8 +21,8 @@
21#include <linux/smp.h> 21#include <linux/smp.h>
22#include <asm/processor.h> 22#include <asm/processor.h>
23 23
24#include "cfe_api.h" 24#include <asm/fw/cfe/cfe_api.h>
25#include "cfe_error.h" 25#include <asm/fw/cfe/cfe_error.h>
26 26
27/* 27/*
28 * Use CFE to find out how many CPUs are available, setting up 28 * Use CFE to find out how many CPUs are available, setting up
diff --git a/arch/mips/sibyte/common/Makefile b/arch/mips/sibyte/common/Makefile
index f8ae30066a05..48a91b9e5870 100644
--- a/arch/mips/sibyte/common/Makefile
+++ b/arch/mips/sibyte/common/Makefile
@@ -2,5 +2,4 @@ obj-y :=
2 2
3obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o 3obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o
4 4
5EXTRA_AFLAGS := $(CFLAGS)
6EXTRA_CFLAGS += -Werror 5EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 4fcdaa8ba514..63b444eaf01e 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -276,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
276 sbp.next_tb_sample = 0; 276 sbp.next_tb_sample = 0;
277 filp->f_pos = 0; 277 filp->f_pos = 0;
278 278
279 err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, 279 err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
280 DEVNAME " trace freeze", &sbp); 280 DEVNAME " trace freeze", &sbp);
281 if (err) 281 if (err)
282 return -EBUSY; 282 return -EBUSY;
283 283
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index ad593a6c20be..7659174819c6 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -28,6 +28,7 @@
28#include <asm/errno.h> 28#include <asm/errno.h>
29#include <asm/signal.h> 29#include <asm/signal.h>
30#include <asm/system.h> 30#include <asm/system.h>
31#include <asm/time.h>
31#include <asm/io.h> 32#include <asm/io.h>
32 33
33#include <asm/sibyte/sb1250_regs.h> 34#include <asm/sibyte/sb1250_regs.h>
@@ -258,7 +259,7 @@ int sb1250_steal_irq(int irq)
258 if (irq >= SB1250_NR_IRQS) 259 if (irq >= SB1250_NR_IRQS)
259 return -EINVAL; 260 return -EINVAL;
260 261
261 spin_lock_irqsave(&desc->lock,flags); 262 spin_lock_irqsave(&desc->lock, flags);
262 /* Don't allow sharing at all for these */ 263 /* Don't allow sharing at all for these */
263 if (desc->action != NULL) 264 if (desc->action != NULL)
264 retval = -EBUSY; 265 retval = -EBUSY;
@@ -266,7 +267,7 @@ int sb1250_steal_irq(int irq)
266 desc->action = &sb1250_dummy_action; 267 desc->action = &sb1250_dummy_action;
267 desc->depth = 0; 268 desc->depth = 0;
268 } 269 }
269 spin_unlock_irqrestore(&desc->lock,flags); 270 spin_unlock_irqrestore(&desc->lock, flags);
270 return 0; 271 return 0;
271} 272}
272 273
@@ -380,8 +381,8 @@ void __init arch_init_irq(void)
380 381
381#include <linux/delay.h> 382#include <linux/delay.h>
382 383
383#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 384#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
384#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 385#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
385 386
386static void sb1250_kgdb_interrupt(void) 387static void sb1250_kgdb_interrupt(void)
387{ 388{
@@ -399,18 +400,45 @@ static void sb1250_kgdb_interrupt(void)
399 400
400#endif /* CONFIG_KGDB */ 401#endif /* CONFIG_KGDB */
401 402
402extern void sb1250_timer_interrupt(void); 403static inline void sb1250_timer_interrupt(void)
404{
405 int cpu = smp_processor_id();
406 int irq = K_INT_TIMER_0 + cpu;
407
408 irq_enter();
409 kstat_this_cpu.irqs[irq]++;
410
411 write_seqlock(&xtime_lock);
412
413 /* ACK interrupt */
414 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
415 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
416
417 /*
418 * call the generic timer interrupt handling
419 */
420 do_timer(1);
421
422 write_sequnlock(&xtime_lock);
423
424 /*
425 * In UP mode, we call local_timer_interrupt() to do profiling
426 * and process accouting.
427 *
428 * In SMP mode, local_timer_interrupt() is invoked by appropriate
429 * low-level local timer interrupt handler.
430 */
431 local_timer_interrupt(irq);
432
433 irq_exit();
434}
435
403extern void sb1250_mailbox_interrupt(void); 436extern void sb1250_mailbox_interrupt(void);
404 437
405asmlinkage void plat_irq_dispatch(void) 438asmlinkage void plat_irq_dispatch(void)
406{ 439{
407 unsigned int pending; 440 unsigned int pending;
408 441
409#ifdef CONFIG_SIBYTE_SB1250_PROF
410 /* Set compare to count to silence count/compare timer interrupts */
411 write_c0_compare(read_c0_count());
412#endif
413
414 /* 442 /*
415 * What a pain. We have to be really careful saving the upper 32 bits 443 * What a pain. We have to be really careful saving the upper 32 bits
416 * of any * register across function calls if we don't want them 444 * of any * register across function calls if we don't want them
@@ -423,13 +451,9 @@ asmlinkage void plat_irq_dispatch(void)
423 451
424 pending = read_c0_cause() & read_c0_status() & ST0_IM; 452 pending = read_c0_cause() & read_c0_status() & ST0_IM;
425 453
426#ifdef CONFIG_SIBYTE_SB1250_PROF 454 if (pending & CAUSEF_IP7) /* CPU performance counter interrupt */
427 if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ 455 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
428 sbprof_cpu_intr(); 456 else if (pending & CAUSEF_IP4)
429 else
430#endif
431
432 if (pending & CAUSEF_IP4)
433 sb1250_timer_interrupt(); 457 sb1250_timer_interrupt();
434 458
435#ifdef CONFIG_SMP 459#ifdef CONFIG_SMP
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
index 257c4e674353..cf8f6b3de86c 100644
--- a/arch/mips/sibyte/sb1250/prom.c
+++ b/arch/mips/sibyte/sb1250/prom.c
@@ -66,7 +66,7 @@ static void prom_linux_exit(void)
66{ 66{
67#ifdef CONFIG_SMP 67#ifdef CONFIG_SMP
68 if (smp_processor_id()) { 68 if (smp_processor_id()) {
69 smp_call_function(prom_cpu0_exit,NULL,1,1); 69 smp_call_function(prom_cpu0_exit, NULL, 1, 1);
70 } 70 }
71#endif 71#endif
72 while(1); 72 while(1);
@@ -83,7 +83,6 @@ void __init prom_init(void)
83 83
84 strcpy(arcs_cmdline, "root=/dev/ram0 "); 84 strcpy(arcs_cmdline, "root=/dev/ram0 ");
85 85
86 mips_machgroup = MACH_GROUP_SIBYTE;
87 prom_meminit(); 86 prom_meminit();
88} 87}
89 88
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index 2d5c6d8b41f2..0444da1e23c2 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -40,43 +40,6 @@ static char *soc_str;
40static char *pass_str; 40static char *pass_str;
41static unsigned int war_pass; /* XXXKW don't overload PASS defines? */ 41static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
42 42
43static inline int setup_bcm1250(void);
44static inline int setup_bcm112x(void);
45
46/* Setup code likely to be common to all SiByte platforms */
47
48static int __init sys_rev_decode(void)
49{
50 int ret = 0;
51
52 war_pass = soc_pass;
53 switch (soc_type) {
54 case K_SYS_SOC_TYPE_BCM1250:
55 case K_SYS_SOC_TYPE_BCM1250_ALT:
56 case K_SYS_SOC_TYPE_BCM1250_ALT2:
57 soc_str = "BCM1250";
58 ret = setup_bcm1250();
59 break;
60 case K_SYS_SOC_TYPE_BCM1120:
61 soc_str = "BCM1120";
62 ret = setup_bcm112x();
63 break;
64 case K_SYS_SOC_TYPE_BCM1125:
65 soc_str = "BCM1125";
66 ret = setup_bcm112x();
67 break;
68 case K_SYS_SOC_TYPE_BCM1125H:
69 soc_str = "BCM1125H";
70 ret = setup_bcm112x();
71 break;
72 default:
73 printk("Unknown SOC type %x\n", soc_type);
74 ret = 1;
75 break;
76 }
77 return ret;
78}
79
80static int __init setup_bcm1250(void) 43static int __init setup_bcm1250(void)
81{ 44{
82 int ret = 0; 45 int ret = 0;
@@ -120,6 +83,7 @@ static int __init setup_bcm1250(void)
120 } 83 }
121 break; 84 break;
122 } 85 }
86
123 return ret; 87 return ret;
124} 88}
125 89
@@ -158,6 +122,42 @@ static int __init setup_bcm112x(void)
158 printk("Unknown %s rev %x\n", soc_str, soc_pass); 122 printk("Unknown %s rev %x\n", soc_str, soc_pass);
159 ret = 1; 123 ret = 1;
160 } 124 }
125
126 return ret;
127}
128
129/* Setup code likely to be common to all SiByte platforms */
130
131static int __init sys_rev_decode(void)
132{
133 int ret = 0;
134
135 war_pass = soc_pass;
136 switch (soc_type) {
137 case K_SYS_SOC_TYPE_BCM1250:
138 case K_SYS_SOC_TYPE_BCM1250_ALT:
139 case K_SYS_SOC_TYPE_BCM1250_ALT2:
140 soc_str = "BCM1250";
141 ret = setup_bcm1250();
142 break;
143 case K_SYS_SOC_TYPE_BCM1120:
144 soc_str = "BCM1120";
145 ret = setup_bcm112x();
146 break;
147 case K_SYS_SOC_TYPE_BCM1125:
148 soc_str = "BCM1125";
149 ret = setup_bcm112x();
150 break;
151 case K_SYS_SOC_TYPE_BCM1125H:
152 soc_str = "BCM1125H";
153 ret = setup_bcm112x();
154 break;
155 default:
156 printk("Unknown SOC type %x\n", soc_type);
157 ret = 1;
158 break;
159 }
160
161 return ret; 161 return ret;
162} 162}
163 163
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 2efffe15ff23..38199ad8fc54 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -25,6 +25,7 @@
25 * code to do general bookkeeping (e.g. update jiffies, run 25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.) 26 * bottom halves, etc.)
27 */ 27 */
28#include <linux/clockchips.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
29#include <linux/sched.h> 30#include <linux/sched.h>
30#include <linux/spinlock.h> 31#include <linux/spinlock.h>
@@ -71,16 +72,158 @@ void __init sb1250_hpt_setup(void)
71 } 72 }
72} 73}
73 74
75/*
76 * The general purpose timer ticks at 1 Mhz independent if
77 * the rest of the system
78 */
79static void sibyte_set_mode(enum clock_event_mode mode,
80 struct clock_event_device *evt)
81{
82 unsigned int cpu = smp_processor_id();
83 void __iomem *timer_cfg, *timer_init;
84
85 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
86 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
74 87
75void sb1250_time_init(void) 88 switch(mode) {
89 case CLOCK_EVT_MODE_PERIODIC:
90 __raw_writeq(0, timer_cfg);
91 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, timer_init);
92 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
93 timer_cfg);
94 break;
95
96 case CLOCK_EVT_MODE_ONESHOT:
97 /* Stop the timer until we actually program a shot */
98 case CLOCK_EVT_MODE_SHUTDOWN:
99 __raw_writeq(0, timer_cfg);
100 break;
101
102 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
103 ;
104 }
105}
106
107static int
108sibyte_next_event(unsigned long delta, struct clock_event_device *evt)
76{ 109{
77 int cpu = smp_processor_id(); 110 unsigned int cpu = smp_processor_id();
78 int irq = K_INT_TIMER_0+cpu; 111 void __iomem *timer_cfg, *timer_init;
79 112
80 /* Only have 4 general purpose timers, and we use last one as hpt */ 113 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
81 if (cpu > 2) { 114 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
82 BUG(); 115
116 __raw_writeq(0, timer_cfg);
117 __raw_writeq(delta, timer_init);
118 __raw_writeq(M_SCD_TIMER_ENABLE, timer_cfg);
119
120 return 0;
121}
122
123struct clock_event_device sibyte_hpt_clockevent = {
124 .name = "sb1250-counter",
125 .features = CLOCK_EVT_FEAT_PERIODIC,
126 .set_mode = sibyte_set_mode,
127 .set_next_event = sibyte_next_event,
128 .shift = 32,
129 .irq = 0,
130};
131
132static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
133{
134 struct clock_event_device *cd = &sibyte_hpt_clockevent;
135
136 cd->event_handler(cd);
137
138 return IRQ_HANDLED;
139}
140
141static struct irqaction sibyte_irqaction = {
142 .handler = sibyte_counter_handler,
143 .flags = IRQF_DISABLED | IRQF_PERCPU,
144 .name = "timer",
145};
146
147/*
148 * The general purpose timer ticks at 1 Mhz independent if
149 * the rest of the system
150 */
151static void sibyte_set_mode(enum clock_event_mode mode,
152 struct clock_event_device *evt)
153{
154 unsigned int cpu = smp_processor_id();
155 void __iomem *timer_cfg, *timer_init;
156
157 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
158 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
159
160 switch (mode) {
161 case CLOCK_EVT_MODE_PERIODIC:
162 __raw_writeq(0, timer_cfg);
163 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, timer_init);
164 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
165 timer_cfg);
166 break;
167
168 case CLOCK_EVT_MODE_ONESHOT:
169 /* Stop the timer until we actually program a shot */
170 case CLOCK_EVT_MODE_SHUTDOWN:
171 __raw_writeq(0, timer_cfg);
172 break;
173
174 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
175 ;
83 } 176 }
177}
178
179static int
180sibyte_next_event(unsigned long delta, struct clock_event_device *evt)
181{
182 unsigned int cpu = smp_processor_id();
183 void __iomem *timer_cfg, *timer_init;
184
185 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
186 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
187
188 __raw_writeq(0, timer_cfg);
189 __raw_writeq(delta, timer_init);
190 __raw_writeq(M_SCD_TIMER_ENABLE, timer_cfg);
191
192 return 0;
193}
194
195struct clock_event_device sibyte_hpt_clockevent = {
196 .name = "sb1250-counter",
197 .features = CLOCK_EVT_FEAT_PERIODIC,
198 .set_mode = sibyte_set_mode,
199 .set_next_event = sibyte_next_event,
200 .shift = 32,
201 .irq = 0,
202};
203
204static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
205{
206 struct clock_event_device *cd = &sibyte_hpt_clockevent;
207
208 cd->event_handler(cd);
209
210 return IRQ_HANDLED;
211}
212
213static struct irqaction sibyte_irqaction = {
214 .handler = sibyte_counter_handler,
215 .flags = IRQF_DISABLED | IRQF_PERCPU,
216 .name = "timer",
217};
218
219static void __init sb1250_clockevent_init(void)
220{
221 struct clock_event_device *cd = &sibyte_hpt_clockevent;
222 unsigned int cpu = smp_processor_id();
223 int irq = K_INT_TIMER_0 + cpu;
224
225 /* Only have 4 general purpose timers, and we use last one as hpt */
226 BUG_ON(cpu > 2);
84 227
85 sb1250_mask_irq(cpu, irq); 228 sb1250_mask_irq(cpu, irq);
86 229
@@ -88,24 +231,11 @@ void sb1250_time_init(void)
88 __raw_writeq(IMR_IP4_VAL, 231 __raw_writeq(IMR_IP4_VAL,
89 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) + 232 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
90 (irq << 3))); 233 (irq << 3)));
91 234 cd->cpumask = cpumask_of_cpu(0);
92 /* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
93 /* Disable the timer and set up the count */
94 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
95#ifdef CONFIG_SIMULATION
96 __raw_writeq((50000 / HZ) - 1,
97 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
98#else
99 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
100 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
101#endif
102
103 /* Set the timer running */
104 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
105 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
106 235
107 sb1250_unmask_irq(cpu, irq); 236 sb1250_unmask_irq(cpu, irq);
108 sb1250_steal_irq(irq); 237 sb1250_steal_irq(irq);
238
109 /* 239 /*
110 * This interrupt is "special" in that it doesn't use the request_irq 240 * This interrupt is "special" in that it doesn't use the request_irq
111 * way to hook the irq line. The timer interrupt is initialized early 241 * way to hook the irq line. The timer interrupt is initialized early
@@ -114,29 +244,15 @@ void sb1250_time_init(void)
114 * called directly from irq_handler.S when IP[4] is set during an 244 * called directly from irq_handler.S when IP[4] is set during an
115 * interrupt 245 * interrupt
116 */ 246 */
247 setup_irq(irq, &sibyte_irqaction);
248
249 clockevents_register_device(cd);
117} 250}
118 251
119void sb1250_timer_interrupt(void) 252void __init plat_time_init(void)
120{ 253{
121 int cpu = smp_processor_id(); 254 sb1250_clocksource_init();
122 int irq = K_INT_TIMER_0 + cpu; 255 sb1250_clockevent_init();
123
124 /* ACK interrupt */
125 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
126 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
127
128 if (cpu == 0) {
129 /*
130 * CPU 0 handles the global timer interrupt job
131 */
132 ll_timer_interrupt(irq);
133 }
134 else {
135 /*
136 * other CPUs should just do profiling and process accounting
137 */
138 ll_local_timer_interrupt(irq);
139 }
140} 256}
141 257
142/* 258/*
diff --git a/arch/mips/sibyte/swarm/dbg_io.c b/arch/mips/sibyte/swarm/dbg_io.c
index 75ce14c8eb69..b97ae3048482 100644
--- a/arch/mips/sibyte/swarm/dbg_io.c
+++ b/arch/mips/sibyte/swarm/dbg_io.c
@@ -37,8 +37,8 @@ static int duart_initialized = 0; /* 0: need to be init'ed by kgdb */
37/* -------------------- END OF CONFIG --------------------- */ 37/* -------------------- END OF CONFIG --------------------- */
38extern int kgdb_port; 38extern int kgdb_port;
39 39
40#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 40#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
41#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 41#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
42 42
43void putDebugChar(unsigned char c); 43void putDebugChar(unsigned char c);
44unsigned char getDebugChar(void); 44unsigned char getDebugChar(void);
diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c
index c13914bdda59..26fbff4c15b1 100644
--- a/arch/mips/sibyte/swarm/rtc_m41t81.c
+++ b/arch/mips/sibyte/swarm/rtc_m41t81.c
@@ -146,7 +146,8 @@ int m41t81_set_time(unsigned long t)
146 struct rtc_time tm; 146 struct rtc_time tm;
147 unsigned long flags; 147 unsigned long flags;
148 148
149 to_tm(t, &tm); 149 /* Note we don't care about the century */
150 rtc_time_to_tm(t, &tm);
150 151
151 /* 152 /*
152 * Note the write order matters as it ensures the correctness. 153 * Note the write order matters as it ensures the correctness.
diff --git a/arch/mips/sibyte/swarm/rtc_xicor1241.c b/arch/mips/sibyte/swarm/rtc_xicor1241.c
index f4a178836415..ff3e5dabb348 100644
--- a/arch/mips/sibyte/swarm/rtc_xicor1241.c
+++ b/arch/mips/sibyte/swarm/rtc_xicor1241.c
@@ -115,7 +115,8 @@ int xicor_set_time(unsigned long t)
115 int tmp; 115 int tmp;
116 unsigned long flags; 116 unsigned long flags;
117 117
118 to_tm(t, &tm); 118 rtc_time_to_tm(t, &tm);
119 tm.tm_year += 1900;
119 120
120 spin_lock_irqsave(&rtc_lock, flags); 121 spin_lock_irqsave(&rtc_lock, flags);
121 /* unlock writes to the CCR */ 122 /* unlock writes to the CCR */
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 83572d8f3e14..8b3ef0e4cd55 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -69,7 +69,7 @@ const char *get_system_type(void)
69 return "SiByte " SIBYTE_BOARD_NAME; 69 return "SiByte " SIBYTE_BOARD_NAME;
70} 70}
71 71
72void __init swarm_time_init(void) 72void __init plat_time_init(void)
73{ 73{
74#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) 74#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
75 /* Setup HPT */ 75 /* Setup HPT */
@@ -104,6 +104,44 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
104 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); 104 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
105} 105}
106 106
107enum swarm_rtc_type {
108 RTC_NONE,
109 RTC_XICOR,
110 RTC_M4LT81
111};
112
113enum swarm_rtc_type swarm_rtc_type;
114
115unsigned long read_persistent_clock(void)
116{
117 switch (swarm_rtc_type) {
118 case RTC_XICOR:
119 return xicor_get_time();
120
121 case RTC_M4LT81:
122 return m41t81_get_time();
123
124 case RTC_NONE:
125 default:
126 return mktime(2000, 1, 1, 0, 0, 0);
127 }
128}
129
130int rtc_mips_set_time(unsigned long sec)
131{
132 switch (swarm_rtc_type) {
133 case RTC_XICOR:
134 return xicor_set_time(sec);
135
136 case RTC_M4LT81:
137 return m41t81_set_time(sec);
138
139 case RTC_NONE:
140 default:
141 return -1;
142 }
143}
144
107void __init plat_mem_setup(void) 145void __init plat_mem_setup(void)
108{ 146{
109#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) 147#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
@@ -116,20 +154,12 @@ void __init plat_mem_setup(void)
116 154
117 panic_timeout = 5; /* For debug. */ 155 panic_timeout = 5; /* For debug. */
118 156
119 board_time_init = swarm_time_init;
120 board_be_handler = swarm_be_handler; 157 board_be_handler = swarm_be_handler;
121 158
122 if (xicor_probe()) { 159 if (xicor_probe())
123 printk("swarm setup: Xicor 1241 RTC detected.\n"); 160 swarm_rtc_type = RTC_XICOR;
124 rtc_mips_get_time = xicor_get_time; 161 if (m41t81_probe())
125 rtc_mips_set_time = xicor_set_time; 162 swarm_rtc_type = RTC_M4LT81;
126 }
127
128 if (m41t81_probe()) {
129 printk("swarm setup: M41T81 RTC detected.\n");
130 rtc_mips_get_time = m41t81_get_time;
131 rtc_mips_set_time = m41t81_set_time;
132 }
133 163
134 printk("This kernel optimized for " 164 printk("This kernel optimized for "
135#ifdef CONFIG_SIMULATION 165#ifdef CONFIG_SIMULATION
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index acc9ba76c1a9..b74607599971 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void)
127{ 127{
128 u32 status = read_c0_status(); 128 u32 status = read_c0_status();
129 129
130 write_c0_status (status | 0x00010000); 130 write_c0_status(status | 0x00010000);
131 asm volatile( 131 asm volatile(
132 " .set push \n" 132 " .set push \n"
133 " .set noat \n" 133 " .set noat \n"
@@ -195,7 +195,7 @@ static void a20r_hwint(void)
195 u32 cause, status; 195 u32 cause, status;
196 int irq; 196 int irq;
197 197
198 clear_c0_status (IE_IRQ0); 198 clear_c0_status(IE_IRQ0);
199 status = a20r_ack_hwint(); 199 status = a20r_ack_hwint();
200 cause = read_c0_cause(); 200 cause = read_c0_cause();
201 201
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void)
213 set_irq_chip(i, &a20r_irq_type); 213 set_irq_chip(i, &a20r_irq_type);
214 sni_hwint = a20r_hwint; 214 sni_hwint = a20r_hwint;
215 change_c0_status(ST0_IM, IE_IRQ0); 215 change_c0_status(ST0_IM, IE_IRQ0);
216 setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); 216 setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
217} 217}
218 218
219void sni_a20r_init(void) 219void sni_a20r_init(void)
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 44b1ae62aa4a..39bb15f1f2a6 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -284,9 +284,9 @@ static void sni_pcimt_hwint(void)
284 u32 pending = read_c0_cause() & read_c0_status(); 284 u32 pending = read_c0_cause() & read_c0_status();
285 285
286 if (pending & C_IRQ5) 286 if (pending & C_IRQ5)
287 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 287 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
288 else if (pending & C_IRQ4) 288 else if (pending & C_IRQ4)
289 do_IRQ (MIPS_CPU_IRQ_BASE + 6); 289 do_IRQ(MIPS_CPU_IRQ_BASE + 6);
290 else if (pending & C_IRQ3) 290 else if (pending & C_IRQ3)
291 pcimt_hwint3(); 291 pcimt_hwint3();
292 else if (pending & C_IRQ1) 292 else if (pending & C_IRQ1)
@@ -313,7 +313,6 @@ void __init sni_pcimt_init(void)
313{ 313{
314 sni_pcimt_detect(); 314 sni_pcimt_detect();
315 sni_pcimt_sc_init(); 315 sni_pcimt_sc_init();
316 board_time_init = sni_cpu_time_init;
317 ioport_resource.end = sni_io_resource.end; 316 ioport_resource.end = sni_io_resource.end;
318#ifdef CONFIG_PCI 317#ifdef CONFIG_PCI
319 PCIBIOS_MIN_IO = 0x9000; 318 PCIBIOS_MIN_IO = 0x9000;
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 2480c478dcbd..416f397c768b 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -188,8 +188,8 @@ static void pcit_hwint1(void)
188 irq = ffs((pending >> 16) & 0x7f); 188 irq = ffs((pending >> 16) & 0x7f);
189 189
190 if (likely(irq > 0)) 190 if (likely(irq > 0))
191 do_IRQ (irq + SNI_PCIT_INT_START - 1); 191 do_IRQ(irq + SNI_PCIT_INT_START - 1);
192 set_c0_status (IE_IRQ1); 192 set_c0_status(IE_IRQ1);
193} 193}
194 194
195static void pcit_hwint0(void) 195static void pcit_hwint0(void)
@@ -201,8 +201,8 @@ static void pcit_hwint0(void)
201 irq = ffs((pending >> 16) & 0x3f); 201 irq = ffs((pending >> 16) & 0x3f);
202 202
203 if (likely(irq > 0)) 203 if (likely(irq > 0))
204 do_IRQ (irq + SNI_PCIT_INT_START - 1); 204 do_IRQ(irq + SNI_PCIT_INT_START - 1);
205 set_c0_status (IE_IRQ0); 205 set_c0_status(IE_IRQ0);
206} 206}
207 207
208static void sni_pcit_hwint(void) 208static void sni_pcit_hwint(void)
@@ -212,11 +212,11 @@ static void sni_pcit_hwint(void)
212 if (pending & C_IRQ1) 212 if (pending & C_IRQ1)
213 pcit_hwint1(); 213 pcit_hwint1();
214 else if (pending & C_IRQ2) 214 else if (pending & C_IRQ2)
215 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 215 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
216 else if (pending & C_IRQ3) 216 else if (pending & C_IRQ3)
217 do_IRQ (MIPS_CPU_IRQ_BASE + 5); 217 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
218 else if (pending & C_IRQ5) 218 else if (pending & C_IRQ5)
219 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 219 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
220} 220}
221 221
222static void sni_pcit_hwint_cplus(void) 222static void sni_pcit_hwint_cplus(void)
@@ -226,13 +226,13 @@ static void sni_pcit_hwint_cplus(void)
226 if (pending & C_IRQ0) 226 if (pending & C_IRQ0)
227 pcit_hwint0(); 227 pcit_hwint0();
228 else if (pending & C_IRQ1) 228 else if (pending & C_IRQ1)
229 do_IRQ (MIPS_CPU_IRQ_BASE + 3); 229 do_IRQ(MIPS_CPU_IRQ_BASE + 3);
230 else if (pending & C_IRQ2) 230 else if (pending & C_IRQ2)
231 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 231 do_IRQ(MIPS_CPU_IRQ_BASE + 4);
232 else if (pending & C_IRQ3) 232 else if (pending & C_IRQ3)
233 do_IRQ (MIPS_CPU_IRQ_BASE + 5); 233 do_IRQ(MIPS_CPU_IRQ_BASE + 5);
234 else if (pending & C_IRQ5) 234 else if (pending & C_IRQ5)
235 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 235 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
236} 236}
237 237
238void __init sni_pcit_irq_init(void) 238void __init sni_pcit_irq_init(void)
@@ -245,7 +245,7 @@ void __init sni_pcit_irq_init(void)
245 *(volatile u32 *)SNI_PCIT_INT_REG = 0; 245 *(volatile u32 *)SNI_PCIT_INT_REG = 0;
246 sni_hwint = sni_pcit_hwint; 246 sni_hwint = sni_pcit_hwint;
247 change_c0_status(ST0_IM, IE_IRQ1); 247 change_c0_status(ST0_IM, IE_IRQ1);
248 setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); 248 setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq);
249} 249}
250 250
251void __init sni_pcit_cplus_irq_init(void) 251void __init sni_pcit_cplus_irq_init(void)
@@ -258,12 +258,11 @@ void __init sni_pcit_cplus_irq_init(void)
258 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; 258 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
259 sni_hwint = sni_pcit_hwint_cplus; 259 sni_hwint = sni_pcit_hwint_cplus;
260 change_c0_status(ST0_IM, IE_IRQ0); 260 change_c0_status(ST0_IM, IE_IRQ0);
261 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); 261 setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
262} 262}
263 263
264void __init sni_pcit_init(void) 264void __init sni_pcit_init(void)
265{ 265{
266 board_time_init = sni_cpu_time_init;
267 ioport_resource.end = sni_io_resource.end; 266 ioport_resource.end = sni_io_resource.end;
268#ifdef CONFIG_PCI 267#ifdef CONFIG_PCI
269 PCIBIOS_MIN_IO = 0x9000; 268 PCIBIOS_MIN_IO = 0x9000;
diff --git a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c
index 38b6a97a31b5..79f8d70f48c9 100644
--- a/arch/mips/sni/reset.c
+++ b/arch/mips/sni/reset.c
@@ -35,7 +35,7 @@ void sni_machine_restart(char *command)
35 kb_wait(); 35 kb_wait();
36 for (j = 0; j < 100000 ; j++) 36 for (j = 0; j < 100000 ; j++)
37 /* nothing */; 37 /* nothing */;
38 outb_p(0xfe,0x64); /* pulse reset low */ 38 outb_p(0xfe, 0x64); /* pulse reset low */
39 } 39 }
40 } 40 }
41} 41}
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 28a11d8605ce..67b061eef6cd 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -162,16 +162,16 @@ static void sni_rm200_hwint(void)
162 int irq; 162 int irq;
163 163
164 if (pending & C_IRQ5) 164 if (pending & C_IRQ5)
165 do_IRQ (MIPS_CPU_IRQ_BASE + 7); 165 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
166 else if (pending & C_IRQ0) { 166 else if (pending & C_IRQ0) {
167 clear_c0_status (IE_IRQ0); 167 clear_c0_status(IE_IRQ0);
168 mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; 168 mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f;
169 stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14; 169 stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14;
170 irq = ffs(stat & mask & 0x1f); 170 irq = ffs(stat & mask & 0x1f);
171 171
172 if (likely(irq > 0)) 172 if (likely(irq > 0))
173 do_IRQ (irq + SNI_RM200_INT_START - 1); 173 do_IRQ(irq + SNI_RM200_INT_START - 1);
174 set_c0_status (IE_IRQ0); 174 set_c0_status(IE_IRQ0);
175 } 175 }
176} 176}
177 177
@@ -187,12 +187,11 @@ void __init sni_rm200_irq_init(void)
187 set_irq_chip(i, &rm200_irq_type); 187 set_irq_chip(i, &rm200_irq_type);
188 sni_hwint = sni_rm200_hwint; 188 sni_hwint = sni_rm200_hwint;
189 change_c0_status(ST0_IM, IE_IRQ0); 189 change_c0_status(ST0_IM, IE_IRQ0);
190 setup_irq (SNI_RM200_INT_START + 0, &sni_isa_irq); 190 setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq);
191} 191}
192 192
193void __init sni_rm200_init(void) 193void __init sni_rm200_init(void)
194{ 194{
195 set_io_port_base(SNI_PORT_BASE + 0x02000000); 195 set_io_port_base(SNI_PORT_BASE + 0x02000000);
196 ioport_resource.end += 0x02000000; 196 ioport_resource.end += 0x02000000;
197 board_time_init = sni_cpu_time_init;
198} 197}
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 6edbb3051c82..e8b26bdee24c 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -15,7 +15,7 @@
15#include <linux/screen_info.h> 15#include <linux/screen_info.h>
16 16
17#ifdef CONFIG_ARC 17#ifdef CONFIG_ARC
18#include <asm/arc/types.h> 18#include <asm/fw/arc/types.h>
19#include <asm/sgialib.h> 19#include <asm/sgialib.h>
20#endif 20#endif
21 21
@@ -106,11 +106,11 @@ static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev)
106 * need to do it here, otherwise we get screen corruption 106 * need to do it here, otherwise we get screen corruption
107 * on older Cirrus chips 107 * on older Cirrus chips
108 */ 108 */
109 pci_read_config_word (dev, PCI_COMMAND, &cmd); 109 pci_read_config_word(dev, PCI_COMMAND, &cmd);
110 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) 110 if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY))
111 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) { 111 == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) {
112 vga_wseq (NULL, CL_SEQR6, 0x12); /* unlock all extension registers */ 112 vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */
113 vga_wseq (NULL, CL_SEQRF, 0x18); 113 vga_wseq(NULL, CL_SEQRF, 0x18);
114 } 114 }
115} 115}
116 116
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
index db544a6e23f3..eff4b89d7b75 100644
--- a/arch/mips/sni/sniprom.c
+++ b/arch/mips/sni/sniprom.c
@@ -45,7 +45,7 @@ void prom_putchar(char c)
45static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV); 45static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
46static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF); 46static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
47 47
48char *prom_getenv (char *s) 48char *prom_getenv(char *s)
49{ 49{
50 return __prom_getenv(s); 50 return __prom_getenv(s);
51} 51}
@@ -131,9 +131,9 @@ static void __init sni_console_setup(void)
131 int port; 131 int port;
132 static char options[8]; 132 static char options[8];
133 133
134 cdev = prom_getenv ("console_dev"); 134 cdev = prom_getenv("console_dev");
135 if (strncmp (cdev, "tty", 3) == 0) { 135 if (strncmp (cdev, "tty", 3) == 0) {
136 ctype = prom_getenv ("console"); 136 ctype = prom_getenv("console");
137 switch (*ctype) { 137 switch (*ctype) {
138 default: 138 default:
139 case 'l': 139 case 'l':
@@ -233,7 +233,7 @@ void __init prom_init(void)
233 systype = "RM300-Exx"; 233 systype = "RM300-Exx";
234 break; 234 break;
235 } 235 }
236 pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type,systype); 236 pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type, systype);
237 237
238#ifdef DEBUG 238#ifdef DEBUG
239 sni_idprom_dump(); 239 sni_idprom_dump();
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 20028fc7757e..b80877349d38 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -2,8 +2,10 @@
2#include <linux/interrupt.h> 2#include <linux/interrupt.h>
3#include <linux/time.h> 3#include <linux/time.h>
4 4
5#include <asm/i8253.h>
5#include <asm/sni.h> 6#include <asm/sni.h>
6#include <asm/time.h> 7#include <asm/time.h>
8#include <asm-generic/rtc.h>
7 9
8#define SNI_CLOCK_TICK_RATE 3686400 10#define SNI_CLOCK_TICK_RATE 3686400
9#define SNI_COUNTER2_DIV 64 11#define SNI_COUNTER2_DIV 64
@@ -42,23 +44,23 @@ static __init unsigned long dosample(void)
42 volatile u8 msb, lsb; 44 volatile u8 msb, lsb;
43 45
44 /* Start the counter. */ 46 /* Start the counter. */
45 outb_p (0x34, 0x43); 47 outb_p(0x34, 0x43);
46 outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40); 48 outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40);
47 outb (SNI_8254_TCSAMP_COUNTER >> 8, 0x40); 49 outb(SNI_8254_TCSAMP_COUNTER >> 8, 0x40);
48 50
49 /* Get initial counter invariant */ 51 /* Get initial counter invariant */
50 ct0 = read_c0_count(); 52 ct0 = read_c0_count();
51 53
52 /* Latch and spin until top byte of counter0 is zero */ 54 /* Latch and spin until top byte of counter0 is zero */
53 do { 55 do {
54 outb (0x00, 0x43); 56 outb(0x00, 0x43);
55 lsb = inb (0x40); 57 lsb = inb(0x40);
56 msb = inb (0x40); 58 msb = inb(0x40);
57 ct1 = read_c0_count(); 59 ct1 = read_c0_count();
58 } while (msb); 60 } while (msb);
59 61
60 /* Stop the counter. */ 62 /* Stop the counter. */
61 outb (0x38, 0x43); 63 outb(0x38, 0x43);
62 /* 64 /*
63 * Return the difference, this is how far the r4k counter increments 65 * Return the difference, this is how far the r4k counter increments
64 * for every 1/HZ seconds. We round off the nearest 1 MHz of master 66 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
@@ -71,7 +73,7 @@ static __init unsigned long dosample(void)
71/* 73/*
72 * Here we need to calibrate the cycle counter to at least be close. 74 * Here we need to calibrate the cycle counter to at least be close.
73 */ 75 */
74__init void sni_cpu_time_init(void) 76void __init plat_time_init(void)
75{ 77{
76 unsigned long r4k_ticks[3]; 78 unsigned long r4k_ticks[3];
77 unsigned long r4k_tick; 79 unsigned long r4k_tick;
@@ -115,6 +117,8 @@ __init void sni_cpu_time_init(void)
115 (int) (r4k_tick % (500000 / HZ))); 117 (int) (r4k_tick % (500000 / HZ)));
116 118
117 mips_hpt_frequency = r4k_tick * HZ; 119 mips_hpt_frequency = r4k_tick * HZ;
120
121 setup_pit_timer();
118} 122}
119 123
120/* 124/*
@@ -133,7 +137,7 @@ void __init plat_timer_setup(struct irqaction *irq)
133 case SNI_BRD_10NEW: 137 case SNI_BRD_10NEW:
134 case SNI_BRD_TOWER_OASIC: 138 case SNI_BRD_TOWER_OASIC:
135 case SNI_BRD_MINITOWER: 139 case SNI_BRD_MINITOWER:
136 sni_a20r_timer_setup (irq); 140 sni_a20r_timer_setup(irq);
137 break; 141 break;
138 142
139 case SNI_BRD_PCI_TOWER: 143 case SNI_BRD_PCI_TOWER:
@@ -142,7 +146,12 @@ void __init plat_timer_setup(struct irqaction *irq)
142 case SNI_BRD_PCI_DESKTOP: 146 case SNI_BRD_PCI_DESKTOP:
143 case SNI_BRD_PCI_TOWER_CPLUS: 147 case SNI_BRD_PCI_TOWER_CPLUS:
144 case SNI_BRD_PCI_MTOWER_CPLUS: 148 case SNI_BRD_PCI_MTOWER_CPLUS:
145 sni_cpu_timer_setup (irq); 149 sni_cpu_timer_setup(irq);
146 break; 150 break;
147 } 151 }
148} 152}
153
154unsigned long read_persistent_clock(void)
155{
156 return -1;
157}
diff --git a/arch/mips/tx4927/common/tx4927_dbgio.c b/arch/mips/tx4927/common/tx4927_dbgio.c
index 09bdf2baa835..d8423e001b2d 100644
--- a/arch/mips/tx4927/common/tx4927_dbgio.c
+++ b/arch/mips/tx4927/common/tx4927_dbgio.c
@@ -31,7 +31,6 @@
31 31
32#include <asm/mipsregs.h> 32#include <asm/mipsregs.h>
33#include <asm/system.h> 33#include <asm/system.h>
34#include <asm/tx4927/tx4927_mips.h>
35 34
36u8 getDebugChar(void) 35u8 getDebugChar(void)
37{ 36{
diff --git a/arch/mips/tx4927/common/tx4927_prom.c b/arch/mips/tx4927/common/tx4927_prom.c
index 7d4cbf512d8a..6eed53d8f386 100644
--- a/arch/mips/tx4927/common/tx4927_prom.c
+++ b/arch/mips/tx4927/common/tx4927_prom.c
@@ -38,7 +38,7 @@
38#include <asm/bootinfo.h> 38#include <asm/bootinfo.h>
39#include <asm/tx4927/tx4927.h> 39#include <asm/tx4927/tx4927.h>
40 40
41static unsigned int __init tx4927_process_sdccr(u64 * addr) 41static unsigned int __init tx4927_process_sdccr(unsigned long addr)
42{ 42{
43 u64 val; 43 u64 val;
44 unsigned int sdccr_ce; 44 unsigned int sdccr_ce;
@@ -52,7 +52,7 @@ static unsigned int __init tx4927_process_sdccr(u64 * addr)
52 unsigned int mw = 0; 52 unsigned int mw = 0;
53 unsigned int msize = 0; 53 unsigned int msize = 0;
54 54
55 val = (*((vu64 *) (addr))); 55 val = __raw_readq((void __iomem *)addr);
56 56
57 /* MVMCP -- need #defs for these bits masks */ 57 /* MVMCP -- need #defs for these bits masks */
58 sdccr_ce = ((val & (1 << 10)) >> 10); 58 sdccr_ce = ((val & (1 << 10)) >> 10);
@@ -136,10 +136,10 @@ unsigned int __init tx4927_get_mem_size(void)
136 unsigned int total; 136 unsigned int total;
137 137
138 /* MVMCP -- need #defs for these registers */ 138 /* MVMCP -- need #defs for these registers */
139 c0 = tx4927_process_sdccr((u64 *) 0xff1f8000); 139 c0 = tx4927_process_sdccr(0xff1f8000);
140 c1 = tx4927_process_sdccr((u64 *) 0xff1f8008); 140 c1 = tx4927_process_sdccr(0xff1f8008);
141 c2 = tx4927_process_sdccr((u64 *) 0xff1f8010); 141 c2 = tx4927_process_sdccr(0xff1f8010);
142 c3 = tx4927_process_sdccr((u64 *) 0xff1f8018); 142 c3 = tx4927_process_sdccr(0xff1f8018);
143 total = c0 + c1 + c2 + c3; 143 total = c0 + c1 + c2 + c3;
144 144
145 return (total); 145 return (total);
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index c8e49feb345b..8ce0989671d8 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -49,14 +49,11 @@
49 49
50#undef DEBUG 50#undef DEBUG
51 51
52void __init tx4927_time_init(void);
53void dump_cp0(char *key); 52void dump_cp0(char *key);
54 53
55 54
56void __init plat_mem_setup(void) 55void __init plat_mem_setup(void)
57{ 56{
58 board_time_init = tx4927_time_init;
59
60#ifdef CONFIG_TOSHIBA_RBTX4927 57#ifdef CONFIG_TOSHIBA_RBTX4927
61 { 58 {
62 extern void toshiba_rbtx4927_setup(void); 59 extern void toshiba_rbtx4927_setup(void);
@@ -65,20 +62,16 @@ void __init plat_mem_setup(void)
65#endif 62#endif
66} 63}
67 64
68void __init tx4927_time_init(void) 65void __init plat_time_init(void)
69{ 66{
70
71#ifdef CONFIG_TOSHIBA_RBTX4927 67#ifdef CONFIG_TOSHIBA_RBTX4927
72 { 68 {
73 extern void toshiba_rbtx4927_time_init(void); 69 extern void toshiba_rbtx4927_time_init(void);
74 toshiba_rbtx4927_time_init(); 70 toshiba_rbtx4927_time_init();
75 } 71 }
76#endif 72#endif
77
78 return;
79} 73}
80 74
81
82void __init plat_timer_setup(struct irqaction *irq) 75void __init plat_timer_setup(struct irqaction *irq)
83{ 76{
84 setup_irq(TX4927_IRQ_CPU_TIMER, irq); 77 setup_irq(TX4927_IRQ_CPU_TIMER, irq);
@@ -124,10 +117,10 @@ dump_cp0(char *key)
124 return; 117 return;
125} 118}
126 119
127void print_pic(char *key, u32 reg, char *name) 120void print_pic(char *key, unsigned long reg, char *name)
128{ 121{
129 printk("%s pic:0x%08x:%s=0x%08x\n", key, reg, name, 122 printk(KERN_INFO "%s pic:0x%08lx:%s=0x%08x\n", key, reg, name,
130 TX4927_RD(reg)); 123 __raw_readl((void __iomem *)reg));
131 return; 124 return;
132} 125}
133 126
@@ -166,9 +159,10 @@ void dump_pic(char *key)
166} 159}
167 160
168 161
169void print_addr(char *hdr, char *key, u32 addr) 162void print_addr(char *hdr, char *key, unsigned long addr)
170{ 163{
171 printk("%s %s:0x%08x=0x%08x\n", hdr, key, addr, TX4927_RD(addr)); 164 printk(KERN_INFO "%s %s:0x%08lx=0x%08x\n", hdr, key, addr,
165 __raw_readl((void __iomem *)addr));
172 return; 166 return;
173} 167}
174 168
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 9607ad5e734a..3f808b629242 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -176,7 +176,7 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
176 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \ 176 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
177 } 177 }
178#else 178#else
179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) 179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
180#endif 180#endif
181 181
182 182
@@ -204,8 +204,8 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
204 .mask_ack = toshiba_rbtx4927_irq_ioc_disable, 204 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
205 .unmask = toshiba_rbtx4927_irq_ioc_enable, 205 .unmask = toshiba_rbtx4927_irq_ioc_enable,
206}; 206};
207#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 207#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
208#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 208#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
209 209
210 210
211u32 bit2num(u32 num) 211u32 bit2num(u32 num)
@@ -224,7 +224,7 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
224{ 224{
225 u32 level3; 225 u32 level3;
226 226
227 level3 = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; 227 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
228 if (level3) { 228 if (level3) {
229 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3); 229 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
230 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) { 230 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
@@ -243,10 +243,12 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
243 return (sw_irq); 243 return (sw_irq);
244} 244}
245 245
246//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 246static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
247#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL } 247 .handler = no_action,
248static struct irqaction toshiba_rbtx4927_irq_ioc_action = 248 .flags = IRQF_SHARED,
249TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); 249 .mask = CPU_MASK_NONE,
250 .name = TOSHIBA_RBTX4927_IOC_NAME
251};
250 252
251 253
252/**********************************************************************************/ 254/**********************************************************************************/
@@ -286,9 +288,9 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
286 panic("\n"); 288 panic("\n");
287 } 289 }
288 290
289 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 291 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
290 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); 292 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
291 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); 293 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
292} 294}
293 295
294 296
@@ -306,9 +308,10 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
306 panic("\n"); 308 panic("\n");
307 } 309 }
308 310
309 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 311 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
310 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); 312 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
311 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); 313 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
314 mmiowb();
312} 315}
313 316
314 317
@@ -385,12 +388,12 @@ void toshiba_rbtx4927_irq_dump_pics(char *s)
385 level1_m = level0_m; 388 level1_m = level0_m;
386 level1_s = level0_s & 0x87; 389 level1_s = level0_s & 0x87;
387 390
388 level2 = TX4927_RD(0xff1ff6a0); 391 level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
389 level2_p = (((level2 & 0x10000)) ? 0 : 1); 392 level2_p = (((level2 & 0x10000)) ? 0 : 1);
390 level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f)); 393 level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
391 394
392 level3_m = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f; 395 level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
393 level3_s = reg_rd08(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; 396 level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
394 397
395 level4_m = inb(0x21); 398 level4_m = inb(0x21);
396 outb(0x0A, 0x20); 399 outb(0x0A, 0x20);
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
index 9a3a5babd1fb..f3f86857beae 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
@@ -66,8 +66,6 @@ void __init prom_init(void)
66 66
67 prom_init_cmdline(); 67 prom_init_cmdline();
68 68
69 mips_machgroup = MACH_GROUP_TOSHIBA;
70
71 if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { 69 if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
72 mips_machtype = MACH_TOSHIBA_RBTX4927; 70 mips_machtype = MACH_TOSHIBA_RBTX4927;
73 toshiba_name = "TX4927"; 71 toshiba_name = "TX4927";
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index 3e84237abe63..acaf613358c7 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -122,7 +122,7 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
122 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \ 122 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
123 } 123 }
124#else 124#else
125#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) 125#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
126#endif 126#endif
127 127
128/* These functions are used for rebooting or halting the machine*/ 128/* These functions are used for rebooting or halting the machine*/
@@ -497,7 +497,7 @@ void __init tx4927_pci_setup(void)
497 "Internal"); 497 "Internal");
498 called = 1; 498 called = 1;
499 } 499 }
500 printk("%s PCIC --%s PCICLK:",toshiba_name, 500 printk("%s PCIC --%s PCICLK:", toshiba_name,
501 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : ""); 501 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
502 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) { 502 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
503 int pciclk = 0; 503 int pciclk = 0;
@@ -679,25 +679,30 @@ void __init tx4927_pci_setup(void)
679 679
680#endif /* CONFIG_PCI */ 680#endif /* CONFIG_PCI */
681 681
682static void __noreturn wait_forever(void)
683{
684 while (1)
685 if (cpu_wait)
686 (*cpu_wait)();
687}
688
682void toshiba_rbtx4927_restart(char *command) 689void toshiba_rbtx4927_restart(char *command)
683{ 690{
684 printk(KERN_NOTICE "System Rebooting...\n"); 691 printk(KERN_NOTICE "System Rebooting...\n");
685 692
686 /* enable the s/w reset register */ 693 /* enable the s/w reset register */
687 reg_wr08(RBTX4927_SW_RESET_ENABLE, RBTX4927_SW_RESET_ENABLE_SET); 694 writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
688 695
689 /* wait for enable to be seen */ 696 /* wait for enable to be seen */
690 while ((reg_rd08(RBTX4927_SW_RESET_ENABLE) & 697 while ((readb(RBTX4927_SW_RESET_ENABLE) &
691 RBTX4927_SW_RESET_ENABLE_SET) == 0x00); 698 RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
692 699
693 /* do a s/w reset */ 700 /* do a s/w reset */
694 reg_wr08(RBTX4927_SW_RESET_DO, RBTX4927_SW_RESET_DO_SET); 701 writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
695 702
696 /* do something passive while waiting for reset */ 703 /* do something passive while waiting for reset */
697 local_irq_disable(); 704 local_irq_disable();
698 while (1) 705 wait_forever();
699 asm_wait();
700
701 /* no return */ 706 /* no return */
702} 707}
703 708
@@ -706,9 +711,7 @@ void toshiba_rbtx4927_halt(void)
706{ 711{
707 printk(KERN_NOTICE "System Halted\n"); 712 printk(KERN_NOTICE "System Halted\n");
708 local_irq_disable(); 713 local_irq_disable();
709 while (1) { 714 wait_forever();
710 asm_wait();
711 }
712 /* no return */ 715 /* no return */
713} 716}
714 717
@@ -720,7 +723,7 @@ void toshiba_rbtx4927_power_off(void)
720 723
721void __init toshiba_rbtx4927_setup(void) 724void __init toshiba_rbtx4927_setup(void)
722{ 725{
723 vu32 cp0_config; 726 u32 cp0_config;
724 char *argptr; 727 char *argptr;
725 728
726 printk("CPU is %s\n", toshiba_name); 729 printk("CPU is %s\n", toshiba_name);
@@ -747,15 +750,6 @@ void __init toshiba_rbtx4927_setup(void)
747 } 750 }
748#endif 751#endif
749 752
750 /* setup serial stuff */
751 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
752 ":Setting up tx4927 sio.\n");
753 TX4927_WR(0xff1ff314, 0x00000000); /* h/w flow control off */
754 TX4927_WR(0xff1ff414, 0x00000000); /* h/w flow control off */
755
756 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
757 "+\n");
758
759 set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET); 753 set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET);
760 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP, 754 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
761 ":mips_io_port_base=0x%08lx\n", 755 ":mips_io_port_base=0x%08lx\n",
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index 142abf453e40..ab4082267553 100644
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -34,25 +34,16 @@
34#include <asm/tx4938/rbtx4938.h> 34#include <asm/tx4938/rbtx4938.h>
35 35
36extern void toshiba_rbtx4938_setup(void); 36extern void toshiba_rbtx4938_setup(void);
37extern void rbtx4938_time_init(void);
38 37
39void __init tx4938_setup(void); 38void __init tx4938_setup(void);
40void __init tx4938_time_init(void);
41void dump_cp0(char *key); 39void dump_cp0(char *key);
42 40
43void __init 41void __init
44plat_mem_setup(void) 42plat_mem_setup(void)
45{ 43{
46 board_time_init = tx4938_time_init;
47 toshiba_rbtx4938_setup(); 44 toshiba_rbtx4938_setup();
48} 45}
49 46
50void __init
51tx4938_time_init(void)
52{
53 rbtx4938_time_init();
54}
55
56void __init plat_timer_setup(struct irqaction *irq) 47void __init plat_timer_setup(struct irqaction *irq)
57{ 48{
58 setup_irq(TX4938_IRQ_CPU_TIMER, irq); 49 setup_irq(TX4938_IRQ_CPU_TIMER, irq);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
index 7dc6a0aae21c..69f21c1b7942 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
@@ -47,7 +47,6 @@ void __init prom_init(void)
47#ifndef CONFIG_TX4938_NAND_BOOT 47#ifndef CONFIG_TX4938_NAND_BOOT
48 prom_init_cmdline(); 48 prom_init_cmdline();
49#endif 49#endif
50 mips_machgroup = MACH_GROUP_TOSHIBA;
51 mips_machtype = MACH_TOSHIBA_RBTX4938; 50 mips_machtype = MACH_TOSHIBA_RBTX4938;
52 51
53 msize = tx4938_get_mem_size(); 52 msize = tx4938_get_mem_size();
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index f236b1ff8923..ceecaf498957 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -39,7 +39,6 @@
39#include <asm/tx4938/spi.h> 39#include <asm/tx4938/spi.h>
40#include <asm/gpio.h> 40#include <asm/gpio.h>
41 41
42extern void rbtx4938_time_init(void) __init;
43extern char * __init prom_getcmdline(void); 42extern char * __init prom_getcmdline(void);
44static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr); 43static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr);
45 44
@@ -458,9 +457,9 @@ extern struct pci_controller tx4938_pci_controller[];
458static int __init tx4938_pcibios_init(void) 457static int __init tx4938_pcibios_init(void)
459{ 458{
460 unsigned long mem_base[2]; 459 unsigned long mem_base[2];
461 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0,TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */ 460 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
462 unsigned long io_base[2]; 461 unsigned long io_base[2];
463 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0,TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */ 462 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
464 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */ 463 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
465 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB); 464 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
466 465
@@ -856,7 +855,7 @@ void tx4938_report_pcic_status(void)
856/* We use onchip r4k counter or TMR timer as our system wide timer 855/* We use onchip r4k counter or TMR timer as our system wide timer
857 * interrupt running at 100HZ. */ 856 * interrupt running at 100HZ. */
858 857
859void __init rbtx4938_time_init(void) 858void __init plat_time_init(void)
860{ 859{
861 mips_hpt_frequency = txx9_cpu_clock / 2; 860 mips_hpt_frequency = txx9_cpu_clock / 2;
862} 861}
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c
index ff272b2e8395..d77c330a0d59 100644
--- a/arch/mips/vr41xx/common/bcu.c
+++ b/arch/mips/vr41xx/common/bcu.c
@@ -70,7 +70,7 @@ EXPORT_SYMBOL_GPL(vr41xx_get_tclock_frequency);
70 70
71static inline uint16_t read_clkspeed(void) 71static inline uint16_t read_clkspeed(void)
72{ 72{
73 switch (current_cpu_data.cputype) { 73 switch (current_cpu_type()) {
74 case CPU_VR4111: 74 case CPU_VR4111:
75 case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1); 75 case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1);
76 case CPU_VR4122: 76 case CPU_VR4122:
@@ -88,7 +88,7 @@ static inline unsigned long calculate_pclock(uint16_t clkspeed)
88{ 88{
89 unsigned long pclock = 0; 89 unsigned long pclock = 0;
90 90
91 switch (current_cpu_data.cputype) { 91 switch (current_cpu_type()) {
92 case CPU_VR4111: 92 case CPU_VR4111:
93 case CPU_VR4121: 93 case CPU_VR4121:
94 pclock = 18432000 * 64; 94 pclock = 18432000 * 64;
@@ -138,7 +138,7 @@ static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long p
138{ 138{
139 unsigned long vtclock = 0; 139 unsigned long vtclock = 0;
140 140
141 switch (current_cpu_data.cputype) { 141 switch (current_cpu_type()) {
142 case CPU_VR4111: 142 case CPU_VR4111:
143 /* The NEC VR4111 doesn't have the VTClock. */ 143 /* The NEC VR4111 doesn't have the VTClock. */
144 break; 144 break;
@@ -180,7 +180,7 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc
180{ 180{
181 unsigned long tclock = 0; 181 unsigned long tclock = 0;
182 182
183 switch (current_cpu_data.cputype) { 183 switch (current_cpu_type()) {
184 case CPU_VR4111: 184 case CPU_VR4111:
185 if (!(clkspeed & DIV2B)) 185 if (!(clkspeed & DIV2B))
186 tclock = pclock / 2; 186 tclock = pclock / 2;
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c
index 657c5133c933..ad0e8e3409d9 100644
--- a/arch/mips/vr41xx/common/cmu.c
+++ b/arch/mips/vr41xx/common/cmu.c
@@ -95,8 +95,8 @@ void vr41xx_supply_clock(vr41xx_clock_t clock)
95 cmuclkmsk |= MSKFIR | MSKFFIR; 95 cmuclkmsk |= MSKFIR | MSKFFIR;
96 break; 96 break;
97 case DSIU_CLOCK: 97 case DSIU_CLOCK:
98 if (current_cpu_data.cputype == CPU_VR4111 || 98 if (current_cpu_type() == CPU_VR4111 ||
99 current_cpu_data.cputype == CPU_VR4121) 99 current_cpu_type() == CPU_VR4121)
100 cmuclkmsk |= MSKDSIU; 100 cmuclkmsk |= MSKDSIU;
101 else 101 else
102 cmuclkmsk |= MSKSIU | MSKDSIU; 102 cmuclkmsk |= MSKSIU | MSKDSIU;
@@ -146,8 +146,8 @@ void vr41xx_mask_clock(vr41xx_clock_t clock)
146 cmuclkmsk &= ~MSKPIU; 146 cmuclkmsk &= ~MSKPIU;
147 break; 147 break;
148 case SIU_CLOCK: 148 case SIU_CLOCK:
149 if (current_cpu_data.cputype == CPU_VR4111 || 149 if (current_cpu_type() == CPU_VR4111 ||
150 current_cpu_data.cputype == CPU_VR4121) { 150 current_cpu_type() == CPU_VR4121) {
151 cmuclkmsk &= ~(MSKSIU | MSKSSIU); 151 cmuclkmsk &= ~(MSKSIU | MSKSSIU);
152 } else { 152 } else {
153 if (cmuclkmsk & MSKDSIU) 153 if (cmuclkmsk & MSKDSIU)
@@ -166,8 +166,8 @@ void vr41xx_mask_clock(vr41xx_clock_t clock)
166 cmuclkmsk &= ~(MSKFIR | MSKFFIR); 166 cmuclkmsk &= ~(MSKFIR | MSKFFIR);
167 break; 167 break;
168 case DSIU_CLOCK: 168 case DSIU_CLOCK:
169 if (current_cpu_data.cputype == CPU_VR4111 || 169 if (current_cpu_type() == CPU_VR4111 ||
170 current_cpu_data.cputype == CPU_VR4121) { 170 current_cpu_type() == CPU_VR4121) {
171 cmuclkmsk &= ~MSKDSIU; 171 cmuclkmsk &= ~MSKDSIU;
172 } else { 172 } else {
173 if (cmuclkmsk & MSKSSIU) 173 if (cmuclkmsk & MSKSSIU)
@@ -216,7 +216,7 @@ static int __init vr41xx_cmu_init(void)
216{ 216{
217 unsigned long start, size; 217 unsigned long start, size;
218 218
219 switch (current_cpu_data.cputype) { 219 switch (current_cpu_type()) {
220 case CPU_VR4111: 220 case CPU_VR4111:
221 case CPU_VR4121: 221 case CPU_VR4121:
222 start = CMU_TYPE1_BASE; 222 start = CMU_TYPE1_BASE;
@@ -246,7 +246,7 @@ static int __init vr41xx_cmu_init(void)
246 } 246 }
247 247
248 cmuclkmsk = cmu_read(CMUCLKMSK); 248 cmuclkmsk = cmu_read(CMUCLKMSK);
249 if (current_cpu_data.cputype == CPU_VR4133) 249 if (current_cpu_type() == CPU_VR4133)
250 cmuclkmsk2 = cmu_read(CMUCLKMSK2); 250 cmuclkmsk2 = cmu_read(CMUCLKMSK2);
251 251
252 spin_lock_init(&cmu_lock); 252 spin_lock_init(&cmu_lock);
diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c
index d21f6f2d22a3..2b272f1496fe 100644
--- a/arch/mips/vr41xx/common/giu.c
+++ b/arch/mips/vr41xx/common/giu.c
@@ -81,7 +81,7 @@ static int __init vr41xx_giu_add(void)
81 if (!pdev) 81 if (!pdev)
82 return -ENOMEM; 82 return -ENOMEM;
83 83
84 switch (current_cpu_data.cputype) { 84 switch (current_cpu_type()) {
85 case CPU_VR4111: 85 case CPU_VR4111:
86 case CPU_VR4121: 86 case CPU_VR4121:
87 pdev->id = GPIO_50PINS_PULLUPDOWN; 87 pdev->id = GPIO_50PINS_PULLUPDOWN;
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index adabc6bad440..1899601e5862 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -157,8 +157,8 @@ void vr41xx_enable_piuint(uint16_t mask)
157 struct irq_desc *desc = irq_desc + PIU_IRQ; 157 struct irq_desc *desc = irq_desc + PIU_IRQ;
158 unsigned long flags; 158 unsigned long flags;
159 159
160 if (current_cpu_data.cputype == CPU_VR4111 || 160 if (current_cpu_type() == CPU_VR4111 ||
161 current_cpu_data.cputype == CPU_VR4121) { 161 current_cpu_type() == CPU_VR4121) {
162 spin_lock_irqsave(&desc->lock, flags); 162 spin_lock_irqsave(&desc->lock, flags);
163 icu1_set(MPIUINTREG, mask); 163 icu1_set(MPIUINTREG, mask);
164 spin_unlock_irqrestore(&desc->lock, flags); 164 spin_unlock_irqrestore(&desc->lock, flags);
@@ -172,8 +172,8 @@ void vr41xx_disable_piuint(uint16_t mask)
172 struct irq_desc *desc = irq_desc + PIU_IRQ; 172 struct irq_desc *desc = irq_desc + PIU_IRQ;
173 unsigned long flags; 173 unsigned long flags;
174 174
175 if (current_cpu_data.cputype == CPU_VR4111 || 175 if (current_cpu_type() == CPU_VR4111 ||
176 current_cpu_data.cputype == CPU_VR4121) { 176 current_cpu_type() == CPU_VR4121) {
177 spin_lock_irqsave(&desc->lock, flags); 177 spin_lock_irqsave(&desc->lock, flags);
178 icu1_clear(MPIUINTREG, mask); 178 icu1_clear(MPIUINTREG, mask);
179 spin_unlock_irqrestore(&desc->lock, flags); 179 spin_unlock_irqrestore(&desc->lock, flags);
@@ -187,8 +187,8 @@ void vr41xx_enable_aiuint(uint16_t mask)
187 struct irq_desc *desc = irq_desc + AIU_IRQ; 187 struct irq_desc *desc = irq_desc + AIU_IRQ;
188 unsigned long flags; 188 unsigned long flags;
189 189
190 if (current_cpu_data.cputype == CPU_VR4111 || 190 if (current_cpu_type() == CPU_VR4111 ||
191 current_cpu_data.cputype == CPU_VR4121) { 191 current_cpu_type() == CPU_VR4121) {
192 spin_lock_irqsave(&desc->lock, flags); 192 spin_lock_irqsave(&desc->lock, flags);
193 icu1_set(MAIUINTREG, mask); 193 icu1_set(MAIUINTREG, mask);
194 spin_unlock_irqrestore(&desc->lock, flags); 194 spin_unlock_irqrestore(&desc->lock, flags);
@@ -202,8 +202,8 @@ void vr41xx_disable_aiuint(uint16_t mask)
202 struct irq_desc *desc = irq_desc + AIU_IRQ; 202 struct irq_desc *desc = irq_desc + AIU_IRQ;
203 unsigned long flags; 203 unsigned long flags;
204 204
205 if (current_cpu_data.cputype == CPU_VR4111 || 205 if (current_cpu_type() == CPU_VR4111 ||
206 current_cpu_data.cputype == CPU_VR4121) { 206 current_cpu_type() == CPU_VR4121) {
207 spin_lock_irqsave(&desc->lock, flags); 207 spin_lock_irqsave(&desc->lock, flags);
208 icu1_clear(MAIUINTREG, mask); 208 icu1_clear(MAIUINTREG, mask);
209 spin_unlock_irqrestore(&desc->lock, flags); 209 spin_unlock_irqrestore(&desc->lock, flags);
@@ -217,8 +217,8 @@ void vr41xx_enable_kiuint(uint16_t mask)
217 struct irq_desc *desc = irq_desc + KIU_IRQ; 217 struct irq_desc *desc = irq_desc + KIU_IRQ;
218 unsigned long flags; 218 unsigned long flags;
219 219
220 if (current_cpu_data.cputype == CPU_VR4111 || 220 if (current_cpu_type() == CPU_VR4111 ||
221 current_cpu_data.cputype == CPU_VR4121) { 221 current_cpu_type() == CPU_VR4121) {
222 spin_lock_irqsave(&desc->lock, flags); 222 spin_lock_irqsave(&desc->lock, flags);
223 icu1_set(MKIUINTREG, mask); 223 icu1_set(MKIUINTREG, mask);
224 spin_unlock_irqrestore(&desc->lock, flags); 224 spin_unlock_irqrestore(&desc->lock, flags);
@@ -232,8 +232,8 @@ void vr41xx_disable_kiuint(uint16_t mask)
232 struct irq_desc *desc = irq_desc + KIU_IRQ; 232 struct irq_desc *desc = irq_desc + KIU_IRQ;
233 unsigned long flags; 233 unsigned long flags;
234 234
235 if (current_cpu_data.cputype == CPU_VR4111 || 235 if (current_cpu_type() == CPU_VR4111 ||
236 current_cpu_data.cputype == CPU_VR4121) { 236 current_cpu_type() == CPU_VR4121) {
237 spin_lock_irqsave(&desc->lock, flags); 237 spin_lock_irqsave(&desc->lock, flags);
238 icu1_clear(MKIUINTREG, mask); 238 icu1_clear(MKIUINTREG, mask);
239 spin_unlock_irqrestore(&desc->lock, flags); 239 spin_unlock_irqrestore(&desc->lock, flags);
@@ -319,9 +319,9 @@ void vr41xx_enable_pciint(void)
319 struct irq_desc *desc = irq_desc + PCI_IRQ; 319 struct irq_desc *desc = irq_desc + PCI_IRQ;
320 unsigned long flags; 320 unsigned long flags;
321 321
322 if (current_cpu_data.cputype == CPU_VR4122 || 322 if (current_cpu_type() == CPU_VR4122 ||
323 current_cpu_data.cputype == CPU_VR4131 || 323 current_cpu_type() == CPU_VR4131 ||
324 current_cpu_data.cputype == CPU_VR4133) { 324 current_cpu_type() == CPU_VR4133) {
325 spin_lock_irqsave(&desc->lock, flags); 325 spin_lock_irqsave(&desc->lock, flags);
326 icu2_write(MPCIINTREG, PCIINT0); 326 icu2_write(MPCIINTREG, PCIINT0);
327 spin_unlock_irqrestore(&desc->lock, flags); 327 spin_unlock_irqrestore(&desc->lock, flags);
@@ -335,9 +335,9 @@ void vr41xx_disable_pciint(void)
335 struct irq_desc *desc = irq_desc + PCI_IRQ; 335 struct irq_desc *desc = irq_desc + PCI_IRQ;
336 unsigned long flags; 336 unsigned long flags;
337 337
338 if (current_cpu_data.cputype == CPU_VR4122 || 338 if (current_cpu_type() == CPU_VR4122 ||
339 current_cpu_data.cputype == CPU_VR4131 || 339 current_cpu_type() == CPU_VR4131 ||
340 current_cpu_data.cputype == CPU_VR4133) { 340 current_cpu_type() == CPU_VR4133) {
341 spin_lock_irqsave(&desc->lock, flags); 341 spin_lock_irqsave(&desc->lock, flags);
342 icu2_write(MPCIINTREG, 0); 342 icu2_write(MPCIINTREG, 0);
343 spin_unlock_irqrestore(&desc->lock, flags); 343 spin_unlock_irqrestore(&desc->lock, flags);
@@ -351,9 +351,9 @@ void vr41xx_enable_scuint(void)
351 struct irq_desc *desc = irq_desc + SCU_IRQ; 351 struct irq_desc *desc = irq_desc + SCU_IRQ;
352 unsigned long flags; 352 unsigned long flags;
353 353
354 if (current_cpu_data.cputype == CPU_VR4122 || 354 if (current_cpu_type() == CPU_VR4122 ||
355 current_cpu_data.cputype == CPU_VR4131 || 355 current_cpu_type() == CPU_VR4131 ||
356 current_cpu_data.cputype == CPU_VR4133) { 356 current_cpu_type() == CPU_VR4133) {
357 spin_lock_irqsave(&desc->lock, flags); 357 spin_lock_irqsave(&desc->lock, flags);
358 icu2_write(MSCUINTREG, SCUINT0); 358 icu2_write(MSCUINTREG, SCUINT0);
359 spin_unlock_irqrestore(&desc->lock, flags); 359 spin_unlock_irqrestore(&desc->lock, flags);
@@ -367,9 +367,9 @@ void vr41xx_disable_scuint(void)
367 struct irq_desc *desc = irq_desc + SCU_IRQ; 367 struct irq_desc *desc = irq_desc + SCU_IRQ;
368 unsigned long flags; 368 unsigned long flags;
369 369
370 if (current_cpu_data.cputype == CPU_VR4122 || 370 if (current_cpu_type() == CPU_VR4122 ||
371 current_cpu_data.cputype == CPU_VR4131 || 371 current_cpu_type() == CPU_VR4131 ||
372 current_cpu_data.cputype == CPU_VR4133) { 372 current_cpu_type() == CPU_VR4133) {
373 spin_lock_irqsave(&desc->lock, flags); 373 spin_lock_irqsave(&desc->lock, flags);
374 icu2_write(MSCUINTREG, 0); 374 icu2_write(MSCUINTREG, 0);
375 spin_unlock_irqrestore(&desc->lock, flags); 375 spin_unlock_irqrestore(&desc->lock, flags);
@@ -383,9 +383,9 @@ void vr41xx_enable_csiint(uint16_t mask)
383 struct irq_desc *desc = irq_desc + CSI_IRQ; 383 struct irq_desc *desc = irq_desc + CSI_IRQ;
384 unsigned long flags; 384 unsigned long flags;
385 385
386 if (current_cpu_data.cputype == CPU_VR4122 || 386 if (current_cpu_type() == CPU_VR4122 ||
387 current_cpu_data.cputype == CPU_VR4131 || 387 current_cpu_type() == CPU_VR4131 ||
388 current_cpu_data.cputype == CPU_VR4133) { 388 current_cpu_type() == CPU_VR4133) {
389 spin_lock_irqsave(&desc->lock, flags); 389 spin_lock_irqsave(&desc->lock, flags);
390 icu2_set(MCSIINTREG, mask); 390 icu2_set(MCSIINTREG, mask);
391 spin_unlock_irqrestore(&desc->lock, flags); 391 spin_unlock_irqrestore(&desc->lock, flags);
@@ -399,9 +399,9 @@ void vr41xx_disable_csiint(uint16_t mask)
399 struct irq_desc *desc = irq_desc + CSI_IRQ; 399 struct irq_desc *desc = irq_desc + CSI_IRQ;
400 unsigned long flags; 400 unsigned long flags;
401 401
402 if (current_cpu_data.cputype == CPU_VR4122 || 402 if (current_cpu_type() == CPU_VR4122 ||
403 current_cpu_data.cputype == CPU_VR4131 || 403 current_cpu_type() == CPU_VR4131 ||
404 current_cpu_data.cputype == CPU_VR4133) { 404 current_cpu_type() == CPU_VR4133) {
405 spin_lock_irqsave(&desc->lock, flags); 405 spin_lock_irqsave(&desc->lock, flags);
406 icu2_clear(MCSIINTREG, mask); 406 icu2_clear(MCSIINTREG, mask);
407 spin_unlock_irqrestore(&desc->lock, flags); 407 spin_unlock_irqrestore(&desc->lock, flags);
@@ -415,9 +415,9 @@ void vr41xx_enable_bcuint(void)
415 struct irq_desc *desc = irq_desc + BCU_IRQ; 415 struct irq_desc *desc = irq_desc + BCU_IRQ;
416 unsigned long flags; 416 unsigned long flags;
417 417
418 if (current_cpu_data.cputype == CPU_VR4122 || 418 if (current_cpu_type() == CPU_VR4122 ||
419 current_cpu_data.cputype == CPU_VR4131 || 419 current_cpu_type() == CPU_VR4131 ||
420 current_cpu_data.cputype == CPU_VR4133) { 420 current_cpu_type() == CPU_VR4133) {
421 spin_lock_irqsave(&desc->lock, flags); 421 spin_lock_irqsave(&desc->lock, flags);
422 icu2_write(MBCUINTREG, BCUINTR); 422 icu2_write(MBCUINTREG, BCUINTR);
423 spin_unlock_irqrestore(&desc->lock, flags); 423 spin_unlock_irqrestore(&desc->lock, flags);
@@ -431,9 +431,9 @@ void vr41xx_disable_bcuint(void)
431 struct irq_desc *desc = irq_desc + BCU_IRQ; 431 struct irq_desc *desc = irq_desc + BCU_IRQ;
432 unsigned long flags; 432 unsigned long flags;
433 433
434 if (current_cpu_data.cputype == CPU_VR4122 || 434 if (current_cpu_type() == CPU_VR4122 ||
435 current_cpu_data.cputype == CPU_VR4131 || 435 current_cpu_type() == CPU_VR4131 ||
436 current_cpu_data.cputype == CPU_VR4133) { 436 current_cpu_type() == CPU_VR4133) {
437 spin_lock_irqsave(&desc->lock, flags); 437 spin_lock_irqsave(&desc->lock, flags);
438 icu2_write(MBCUINTREG, 0); 438 icu2_write(MBCUINTREG, 0);
439 spin_unlock_irqrestore(&desc->lock, flags); 439 spin_unlock_irqrestore(&desc->lock, flags);
@@ -608,7 +608,7 @@ int vr41xx_set_intassign(unsigned int irq, unsigned char intassign)
608{ 608{
609 int retval = -EINVAL; 609 int retval = -EINVAL;
610 610
611 if (current_cpu_data.cputype != CPU_VR4133) 611 if (current_cpu_type() != CPU_VR4133)
612 return -EINVAL; 612 return -EINVAL;
613 613
614 if (intassign > INTASSIGN_MAX) 614 if (intassign > INTASSIGN_MAX)
@@ -665,7 +665,7 @@ static int __init vr41xx_icu_init(void)
665 unsigned long icu1_start, icu2_start; 665 unsigned long icu1_start, icu2_start;
666 int i; 666 int i;
667 667
668 switch (current_cpu_data.cputype) { 668 switch (current_cpu_type()) {
669 case CPU_VR4111: 669 case CPU_VR4111:
670 case CPU_VR4121: 670 case CPU_VR4121:
671 icu1_start = ICU1_TYPE1_BASE; 671 icu1_start = ICU1_TYPE1_BASE;
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 4f97e0ba9e24..407cec203b29 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -36,7 +36,7 @@ static void __init iomem_resource_init(void)
36 iomem_resource.end = IO_MEM_RESOURCE_END; 36 iomem_resource.end = IO_MEM_RESOURCE_END;
37} 37}
38 38
39static void __init setup_timer_frequency(void) 39void __init plat_time_init(void)
40{ 40{
41 unsigned long tclock; 41 unsigned long tclock;
42 42
@@ -53,16 +53,10 @@ void __init plat_timer_setup(struct irqaction *irq)
53 setup_irq(TIMER_IRQ, irq); 53 setup_irq(TIMER_IRQ, irq);
54} 54}
55 55
56static void __init timer_init(void)
57{
58 board_time_init = setup_timer_frequency;
59}
60
61void __init plat_mem_setup(void) 56void __init plat_mem_setup(void)
62{ 57{
63 vr41xx_calculate_clock_frequency(); 58 vr41xx_calculate_clock_frequency();
64 59
65 timer_init();
66 iomem_resource_init(); 60 iomem_resource_init();
67} 61}
68 62
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 5e469796413f..028aaf75eb21 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * pmu.c, Power Management Unit routines for NEC VR4100 series. 2 * pmu.c, Power Management Unit routines for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> 4 * Copyright (C) 2003-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -22,11 +22,13 @@
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/pm.h> 24#include <linux/pm.h>
25#include <linux/smp.h> 25#include <linux/sched.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/cacheflush.h>
28#include <asm/cpu.h> 29#include <asm/cpu.h>
29#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/processor.h>
30#include <asm/reboot.h> 32#include <asm/reboot.h>
31#include <asm/system.h> 33#include <asm/system.h>
32 34
@@ -44,11 +46,23 @@ static void __iomem *pmu_base;
44#define pmu_read(offset) readw(pmu_base + (offset)) 46#define pmu_read(offset) readw(pmu_base + (offset))
45#define pmu_write(offset, value) writew((value), pmu_base + (offset)) 47#define pmu_write(offset, value) writew((value), pmu_base + (offset))
46 48
49static void vr41xx_cpu_wait(void)
50{
51 local_irq_disable();
52 if (!need_resched())
53 /*
54 * "standby" sets IE bit of the CP0_STATUS to 1.
55 */
56 __asm__("standby;\n");
57 else
58 local_irq_enable();
59}
60
47static inline void software_reset(void) 61static inline void software_reset(void)
48{ 62{
49 uint16_t pmucnt2; 63 uint16_t pmucnt2;
50 64
51 switch (current_cpu_data.cputype) { 65 switch (current_cpu_type()) {
52 case CPU_VR4122: 66 case CPU_VR4122:
53 case CPU_VR4131: 67 case CPU_VR4131:
54 case CPU_VR4133: 68 case CPU_VR4133:
@@ -57,6 +71,11 @@ static inline void software_reset(void)
57 pmu_write(PMUCNT2REG, pmucnt2); 71 pmu_write(PMUCNT2REG, pmucnt2);
58 break; 72 break;
59 default: 73 default:
74 set_c0_status(ST0_BEV | ST0_ERL);
75 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
76 flush_cache_all();
77 write_c0_wired(0);
78 __asm__("jr %0"::"r"(0xbfc00000));
60 break; 79 break;
61 } 80 }
62} 81}
@@ -65,7 +84,6 @@ static void vr41xx_restart(char *command)
65{ 84{
66 local_irq_disable(); 85 local_irq_disable();
67 software_reset(); 86 software_reset();
68 printk(KERN_NOTICE "\nYou can reset your system\n");
69 while (1) ; 87 while (1) ;
70} 88}
71 89
@@ -73,21 +91,14 @@ static void vr41xx_halt(void)
73{ 91{
74 local_irq_disable(); 92 local_irq_disable();
75 printk(KERN_NOTICE "\nYou can turn off the power supply\n"); 93 printk(KERN_NOTICE "\nYou can turn off the power supply\n");
76 while (1) ; 94 __asm__("hibernate;\n");
77}
78
79static void vr41xx_power_off(void)
80{
81 local_irq_disable();
82 printk(KERN_NOTICE "\nYou can turn off the power supply\n");
83 while (1) ;
84} 95}
85 96
86static int __init vr41xx_pmu_init(void) 97static int __init vr41xx_pmu_init(void)
87{ 98{
88 unsigned long start, size; 99 unsigned long start, size;
89 100
90 switch (current_cpu_data.cputype) { 101 switch (current_cpu_type()) {
91 case CPU_VR4111: 102 case CPU_VR4111:
92 case CPU_VR4121: 103 case CPU_VR4121:
93 start = PMU_TYPE1_BASE; 104 start = PMU_TYPE1_BASE;
@@ -113,9 +124,10 @@ static int __init vr41xx_pmu_init(void)
113 return -EBUSY; 124 return -EBUSY;
114 } 125 }
115 126
127 cpu_wait = vr41xx_cpu_wait;
116 _machine_restart = vr41xx_restart; 128 _machine_restart = vr41xx_restart;
117 _machine_halt = vr41xx_halt; 129 _machine_halt = vr41xx_halt;
118 pm_power_off = vr41xx_power_off; 130 pm_power_off = vr41xx_halt;
119 131
120 return 0; 132 return 0;
121} 133}
diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c
index cce605b3d688..9f26c14edcac 100644
--- a/arch/mips/vr41xx/common/rtc.c
+++ b/arch/mips/vr41xx/common/rtc.c
@@ -82,7 +82,7 @@ static int __init vr41xx_rtc_add(void)
82 if (!pdev) 82 if (!pdev)
83 return -ENOMEM; 83 return -ENOMEM;
84 84
85 switch (current_cpu_data.cputype) { 85 switch (current_cpu_type()) {
86 case CPU_VR4111: 86 case CPU_VR4111:
87 case CPU_VR4121: 87 case CPU_VR4121:
88 res = rtc_type1_resource; 88 res = rtc_type1_resource;
diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c
index a1e774142163..b735f45b25f0 100644
--- a/arch/mips/vr41xx/common/siu.c
+++ b/arch/mips/vr41xx/common/siu.c
@@ -83,7 +83,7 @@ static int __init vr41xx_siu_add(void)
83 if (!pdev) 83 if (!pdev)
84 return -ENOMEM; 84 return -ENOMEM;
85 85
86 switch (current_cpu_data.cputype) { 86 switch (current_cpu_type()) {
87 case CPU_VR4111: 87 case CPU_VR4111:
88 case CPU_VR4121: 88 case CPU_VR4121:
89 pdev->dev.platform_data = siu_type1_ports; 89 pdev->dev.platform_data = siu_type1_ports;
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
index ae1af6b21c45..7c5e18ee2231 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/init.c
@@ -36,7 +36,7 @@ void disable_pcnet(void)
36 */ 36 */
37 37
38 writel((2 << 16) | 38 writel((2 << 16) |
39 (PCI_DEVFN(1,0) << 8) | 39 (PCI_DEVFN(1, 0) << 8) |
40 (0 & 0xfc) | 40 (0 & 0xfc) |
41 1UL, 41 1UL,
42 PCICONFAREG); 42 PCICONFAREG);
@@ -44,7 +44,7 @@ void disable_pcnet(void)
44 data = readl(PCICONFDREG); 44 data = readl(PCICONFDREG);
45 45
46 writel((2 << 16) | 46 writel((2 << 16) |
47 (PCI_DEVFN(1,0) << 8) | 47 (PCI_DEVFN(1, 0) << 8) |
48 (4 & 0xfc) | 48 (4 & 0xfc) |
49 1UL, 49 1UL,
50 PCICONFAREG); 50 PCICONFAREG);
@@ -52,7 +52,7 @@ void disable_pcnet(void)
52 data = readl(PCICONFDREG); 52 data = readl(PCICONFDREG);
53 53
54 writel((2 << 16) | 54 writel((2 << 16) |
55 (PCI_DEVFN(1,0) << 8) | 55 (PCI_DEVFN(1, 0) << 8) |
56 (4 & 0xfc) | 56 (4 & 0xfc) |
57 1UL, 57 1UL,
58 PCICONFAREG); 58 PCICONFAREG);
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
index f45caccedc07..1341f3287d04 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
@@ -38,7 +38,7 @@
38 outb_p((dev_no), DATA_PORT(port)); \ 38 outb_p((dev_no), DATA_PORT(port)); \
39 } while(0) 39 } while(0)
40 40
41#define WRITE_CONFIG_DATA(port,index,data) \ 41#define WRITE_CONFIG_DATA(port, index, data) \
42 do { \ 42 do { \
43 outb_p((index), INDEX_PORT(port)); \ 43 outb_p((index), INDEX_PORT(port)); \
44 outb_p((data), DATA_PORT(port)); \ 44 outb_p((data), DATA_PORT(port)); \
@@ -206,8 +206,8 @@ static inline u16 ali_config_readw(u8 reg, int devfn)
206int vr4133_rockhopper = 0; 206int vr4133_rockhopper = 0;
207void __init ali_m5229_preinit(void) 207void __init ali_m5229_preinit(void)
208{ 208{
209 if (ali_config_readw(PCI_VENDOR_ID,16) == PCI_VENDOR_ID_AL && 209 if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
210 ali_config_readw(PCI_DEVICE_ID,16) == PCI_DEVICE_ID_AL_M1533) { 210 ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
211 printk(KERN_INFO "Found an NEC Rockhopper \n"); 211 printk(KERN_INFO "Found an NEC Rockhopper \n");
212 vr4133_rockhopper = 1; 212 vr4133_rockhopper = 1;
213 /* 213 /*
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
index b20b93b2b95e..58e47686b499 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
@@ -64,7 +64,6 @@ static void __init nec_cmbvr4133_setup(void)
64#endif 64#endif
65 set_io_port_base(KSEG1ADDR(0x16000000)); 65 set_io_port_base(KSEG1ADDR(0x16000000));
66 66
67 mips_machgroup = MACH_GROUP_NEC_VR41XX;
68 mips_machtype = MACH_NEC_CMBVR4133; 67 mips_machtype = MACH_NEC_CMBVR4133;
69 68
70#ifdef CONFIG_PCI 69#ifdef CONFIG_PCI
diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/um/sys-i386/sys_call_table.S
index 2497554b7b95..12d4148dba39 100644
--- a/arch/um/sys-i386/sys_call_table.S
+++ b/arch/um/sys-i386/sys_call_table.S
@@ -9,4 +9,4 @@
9 9
10#define old_mmap old_mmap_i386 10#define old_mmap old_mmap_i386
11 11
12#include "../../i386/kernel/syscall_table.S" 12#include "../../x86/kernel/syscall_table_32.S"
diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/um/sys-x86_64/syscall_table.c
index 5133988d3610..71b2ae4ad5de 100644
--- a/arch/um/sys-x86_64/syscall_table.c
+++ b/arch/um/sys-x86_64/syscall_table.c
@@ -36,7 +36,7 @@
36 36
37#define __SYSCALL(nr, sym) extern asmlinkage void sym(void) ; 37#define __SYSCALL(nr, sym) extern asmlinkage void sym(void) ;
38#undef _ASM_X86_64_UNISTD_H_ 38#undef _ASM_X86_64_UNISTD_H_
39#include <asm-x86_64/unistd.h> 39#include <asm-x86/unistd_64.h>
40 40
41#undef __SYSCALL 41#undef __SYSCALL
42#define __SYSCALL(nr, sym) [ nr ] = sym, 42#define __SYSCALL(nr, sym) [ nr ] = sym,
@@ -49,5 +49,5 @@ extern void sys_ni_syscall(void);
49sys_call_ptr_t sys_call_table[UM_NR_syscall_max+1] __cacheline_aligned = { 49sys_call_ptr_t sys_call_table[UM_NR_syscall_max+1] __cacheline_aligned = {
50 /* Smells like a like a compiler bug -- it doesn't work when the & below is removed. */ 50 /* Smells like a like a compiler bug -- it doesn't work when the & below is removed. */
51 [0 ... UM_NR_syscall_max] = &sys_ni_syscall, 51 [0 ... UM_NR_syscall_max] = &sys_ni_syscall,
52#include <asm-x86_64/unistd.h> 52#include <asm-x86/unistd_64.h>
53}; 53};
diff --git a/arch/i386/boot/.gitignore b/arch/x86/boot/.gitignore
index 18465143cfa2..18465143cfa2 100644
--- a/arch/i386/boot/.gitignore
+++ b/arch/x86/boot/.gitignore
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
new file mode 100644
index 000000000000..cb1035f2b7e9
--- /dev/null
+++ b/arch/x86/boot/Makefile
@@ -0,0 +1,171 @@
1#
2# arch/x86/boot/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# Copyright (C) 1994 by Linus Torvalds
9#
10
11# ROOT_DEV specifies the default root-device when making the image.
12# This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
13# the default of FLOPPY is used by 'build'.
14
15ROOT_DEV := CURRENT
16
17# If you want to preset the SVGA mode, uncomment the next line and
18# set SVGA_MODE to whatever number you want.
19# Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
20# The number is the same as you would ordinarily press at bootup.
21
22SVGA_MODE := -DSVGA_MODE=NORMAL_VGA
23
24# If you want the RAM disk device, define this to be the size in blocks.
25
26#RAMDISK := -DRAMDISK=512
27
28targets := vmlinux.bin setup.bin setup.elf zImage bzImage
29subdir- := compressed
30
31setup-y += a20.o apm.o cmdline.o copy.o cpu.o cpucheck.o edd.o
32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o
33setup-y += printf.o string.o tty.o video.o version.o voyager.o
34
35# The link order of the video-*.o modules can matter. In particular,
36# video-vga.o *must* be listed first, followed by video-vesa.o.
37# Hardware-specific drivers should follow in the order they should be
38# probed, and video-bios.o should typically be last.
39setup-y += video-vga.o
40setup-y += video-vesa.o
41setup-y += video-bios.o
42targets += $(setup-y)
43hostprogs-y := tools/build
44
45HOSTCFLAGS_build.o := $(LINUXINCLUDE)
46
47# ---------------------------------------------------------------------------
48
49# How to compile the 16-bit code. Note we always compile for -march=i386,
50# that way we can complain to the user if the CPU is insufficient.
51cflags-i386 :=
52cflags-x86_64 := -m32
53CFLAGS := $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
54 $(cflags-$(ARCH)) \
55 -Wall -Wstrict-prototypes \
56 -march=i386 -mregparm=3 \
57 -include $(srctree)/$(src)/code16gcc.h \
58 -fno-strict-aliasing -fomit-frame-pointer \
59 $(call cc-option, -ffreestanding) \
60 $(call cc-option, -fno-toplevel-reorder,\
61 $(call cc-option, -fno-unit-at-a-time)) \
62 $(call cc-option, -fno-stack-protector) \
63 $(call cc-option, -mpreferred-stack-boundary=2)
64AFLAGS := $(CFLAGS) -D__ASSEMBLY__
65
66$(obj)/zImage: IMAGE_OFFSET := 0x1000
67$(obj)/zImage: EXTRA_AFLAGS := $(SVGA_MODE) $(RAMDISK)
68$(obj)/bzImage: IMAGE_OFFSET := 0x100000
69$(obj)/bzImage: EXTRA_CFLAGS := -D__BIG_KERNEL__
70$(obj)/bzImage: EXTRA_AFLAGS := $(SVGA_MODE) $(RAMDISK) -D__BIG_KERNEL__
71$(obj)/bzImage: BUILDFLAGS := -b
72
73quiet_cmd_image = BUILD $@
74cmd_image = $(obj)/tools/build $(BUILDFLAGS) $(obj)/setup.bin \
75 $(obj)/vmlinux.bin $(ROOT_DEV) > $@
76
77$(obj)/zImage $(obj)/bzImage: $(obj)/setup.bin \
78 $(obj)/vmlinux.bin $(obj)/tools/build FORCE
79 $(call if_changed,image)
80 @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
81
82$(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
83 $(call if_changed,objcopy)
84
85SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
86
87LDFLAGS_setup.elf := -T
88$(obj)/setup.elf: $(src)/setup.ld $(SETUP_OBJS) FORCE
89 $(call if_changed,ld)
90
91OBJCOPYFLAGS_setup.bin := -O binary
92
93$(obj)/setup.bin: $(obj)/setup.elf FORCE
94 $(call if_changed,objcopy)
95
96$(obj)/compressed/vmlinux: FORCE
97 $(Q)$(MAKE) $(build)=$(obj)/compressed IMAGE_OFFSET=$(IMAGE_OFFSET) $@
98
99# Set this if you want to pass append arguments to the zdisk/fdimage/isoimage kernel
100FDARGS =
101# Set this if you want an initrd included with the zdisk/fdimage/isoimage kernel
102FDINITRD =
103
104image_cmdline = default linux $(FDARGS) $(if $(FDINITRD),initrd=initrd.img,)
105
106$(obj)/mtools.conf: $(src)/mtools.conf.in
107 sed -e 's|@OBJ@|$(obj)|g' < $< > $@
108
109# This requires write access to /dev/fd0
110zdisk: $(BOOTIMAGE) $(obj)/mtools.conf
111 MTOOLSRC=$(obj)/mtools.conf mformat a: ; sync
112 syslinux /dev/fd0 ; sync
113 echo '$(image_cmdline)' | \
114 MTOOLSRC=$(src)/mtools.conf mcopy - a:syslinux.cfg
115 if [ -f '$(FDINITRD)' ] ; then \
116 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' a:initrd.img ; \
117 fi
118 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) a:linux ; sync
119
120# These require being root or having syslinux 2.02 or higher installed
121fdimage fdimage144: $(BOOTIMAGE) $(obj)/mtools.conf
122 dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=1440
123 MTOOLSRC=$(obj)/mtools.conf mformat v: ; sync
124 syslinux $(obj)/fdimage ; sync
125 echo '$(image_cmdline)' | \
126 MTOOLSRC=$(obj)/mtools.conf mcopy - v:syslinux.cfg
127 if [ -f '$(FDINITRD)' ] ; then \
128 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' v:initrd.img ; \
129 fi
130 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) v:linux ; sync
131
132fdimage288: $(BOOTIMAGE) $(obj)/mtools.conf
133 dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=2880
134 MTOOLSRC=$(obj)/mtools.conf mformat w: ; sync
135 syslinux $(obj)/fdimage ; sync
136 echo '$(image_cmdline)' | \
137 MTOOLSRC=$(obj)/mtools.conf mcopy - w:syslinux.cfg
138 if [ -f '$(FDINITRD)' ] ; then \
139 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' w:initrd.img ; \
140 fi
141 MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) w:linux ; sync
142
143isoimage: $(BOOTIMAGE)
144 -rm -rf $(obj)/isoimage
145 mkdir $(obj)/isoimage
146 for i in lib lib64 share end ; do \
147 if [ -f /usr/$$i/syslinux/isolinux.bin ] ; then \
148 cp /usr/$$i/syslinux/isolinux.bin $(obj)/isoimage ; \
149 break ; \
150 fi ; \
151 if [ $$i = end ] ; then exit 1 ; fi ; \
152 done
153 cp $(BOOTIMAGE) $(obj)/isoimage/linux
154 echo '$(image_cmdline)' > $(obj)/isoimage/isolinux.cfg
155 if [ -f '$(FDINITRD)' ] ; then \
156 cp '$(FDINITRD)' $(obj)/isoimage/initrd.img ; \
157 fi
158 mkisofs -J -r -o $(obj)/image.iso -b isolinux.bin -c boot.cat \
159 -no-emul-boot -boot-load-size 4 -boot-info-table \
160 $(obj)/isoimage
161 rm -rf $(obj)/isoimage
162
163zlilo: $(BOOTIMAGE)
164 if [ -f $(INSTALL_PATH)/vmlinuz ]; then mv $(INSTALL_PATH)/vmlinuz $(INSTALL_PATH)/vmlinuz.old; fi
165 if [ -f $(INSTALL_PATH)/System.map ]; then mv $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
166 cat $(BOOTIMAGE) > $(INSTALL_PATH)/vmlinuz
167 cp System.map $(INSTALL_PATH)/
168 if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
169
170install:
171 sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
diff --git a/arch/i386/boot/a20.c b/arch/x86/boot/a20.c
index 31348d054fca..31348d054fca 100644
--- a/arch/i386/boot/a20.c
+++ b/arch/x86/boot/a20.c
diff --git a/arch/i386/boot/apm.c b/arch/x86/boot/apm.c
index eab50c55a3a5..eab50c55a3a5 100644
--- a/arch/i386/boot/apm.c
+++ b/arch/x86/boot/apm.c
diff --git a/arch/i386/boot/bitops.h b/arch/x86/boot/bitops.h
index 8dcc8dc7db88..8dcc8dc7db88 100644
--- a/arch/i386/boot/bitops.h
+++ b/arch/x86/boot/bitops.h
diff --git a/arch/i386/boot/boot.h b/arch/x86/boot/boot.h
index 20bab9431acb..20bab9431acb 100644
--- a/arch/i386/boot/boot.h
+++ b/arch/x86/boot/boot.h
diff --git a/arch/i386/boot/cmdline.c b/arch/x86/boot/cmdline.c
index 34bb778c4357..34bb778c4357 100644
--- a/arch/i386/boot/cmdline.c
+++ b/arch/x86/boot/cmdline.c
diff --git a/arch/i386/boot/code16gcc.h b/arch/x86/boot/code16gcc.h
index d93e48010b61..d93e48010b61 100644
--- a/arch/i386/boot/code16gcc.h
+++ b/arch/x86/boot/code16gcc.h
diff --git a/arch/i386/boot/compressed/.gitignore b/arch/x86/boot/compressed/.gitignore
index be0ed065249b..be0ed065249b 100644
--- a/arch/i386/boot/compressed/.gitignore
+++ b/arch/x86/boot/compressed/.gitignore
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
new file mode 100644
index 000000000000..52c1db854520
--- /dev/null
+++ b/arch/x86/boot/compressed/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/boot/compressed/Makefile_32
3else
4include ${srctree}/arch/x86/boot/compressed/Makefile_64
5endif
diff --git a/arch/x86/boot/compressed/Makefile_32 b/arch/x86/boot/compressed/Makefile_32
new file mode 100644
index 000000000000..22613c652d22
--- /dev/null
+++ b/arch/x86/boot/compressed/Makefile_32
@@ -0,0 +1,50 @@
1#
2# linux/arch/x86/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head_32.o misc_32.o piggy.o \
8 vmlinux.bin.all vmlinux.relocs
9EXTRA_AFLAGS := -traditional
10
11LDFLAGS_vmlinux := -T
12hostprogs-y := relocs
13
14CFLAGS := -m32 -D__KERNEL__ $(LINUX_INCLUDE) -O2 \
15 -fno-strict-aliasing -fPIC \
16 $(call cc-option,-ffreestanding) \
17 $(call cc-option,-fno-stack-protector)
18LDFLAGS := -m elf_i386
19
20$(obj)/vmlinux: $(src)/vmlinux_32.lds $(obj)/head_32.o $(obj)/misc_32.o $(obj)/piggy.o FORCE
21 $(call if_changed,ld)
22 @:
23
24$(obj)/vmlinux.bin: vmlinux FORCE
25 $(call if_changed,objcopy)
26
27quiet_cmd_relocs = RELOCS $@
28 cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $<
29$(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE
30 $(call if_changed,relocs)
31
32vmlinux.bin.all-y := $(obj)/vmlinux.bin
33vmlinux.bin.all-$(CONFIG_RELOCATABLE) += $(obj)/vmlinux.relocs
34quiet_cmd_relocbin = BUILD $@
35 cmd_relocbin = cat $(filter-out FORCE,$^) > $@
36$(obj)/vmlinux.bin.all: $(vmlinux.bin.all-y) FORCE
37 $(call if_changed,relocbin)
38
39ifdef CONFIG_RELOCATABLE
40$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
41 $(call if_changed,gzip)
42else
43$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
44 $(call if_changed,gzip)
45endif
46
47LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
48
49$(obj)/piggy.o: $(src)/vmlinux_32.scr $(obj)/vmlinux.bin.gz FORCE
50 $(call if_changed,ld)
diff --git a/arch/x86/boot/compressed/Makefile_64 b/arch/x86/boot/compressed/Makefile_64
new file mode 100644
index 000000000000..dc6b3380cc45
--- /dev/null
+++ b/arch/x86/boot/compressed/Makefile_64
@@ -0,0 +1,30 @@
1#
2# linux/arch/x86/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head_64.o misc_64.o piggy.o
8
9CFLAGS := -m64 -D__KERNEL__ $(LINUXINCLUDE) -O2 \
10 -fno-strict-aliasing -fPIC -mcmodel=small \
11 $(call cc-option, -ffreestanding) \
12 $(call cc-option, -fno-stack-protector)
13AFLAGS := $(CFLAGS) -D__ASSEMBLY__
14LDFLAGS := -m elf_x86_64
15
16LDFLAGS_vmlinux := -T
17$(obj)/vmlinux: $(src)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o $(obj)/piggy.o FORCE
18 $(call if_changed,ld)
19 @:
20
21$(obj)/vmlinux.bin: vmlinux FORCE
22 $(call if_changed,objcopy)
23
24$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
25 $(call if_changed,gzip)
26
27LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
28
29$(obj)/piggy.o: $(obj)/vmlinux_64.scr $(obj)/vmlinux.bin.gz FORCE
30 $(call if_changed,ld)
diff --git a/arch/i386/boot/compressed/head.S b/arch/x86/boot/compressed/head_32.S
index f35ea2237522..f35ea2237522 100644
--- a/arch/i386/boot/compressed/head.S
+++ b/arch/x86/boot/compressed/head_32.S
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
new file mode 100644
index 000000000000..49467640751f
--- /dev/null
+++ b/arch/x86/boot/compressed/head_64.S
@@ -0,0 +1,311 @@
1/*
2 * linux/boot/head.S
3 *
4 * Copyright (C) 1991, 1992, 1993 Linus Torvalds
5 */
6
7/*
8 * head.S contains the 32-bit startup code.
9 *
10 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
11 * the page directory will exist. The startup code will be overwritten by
12 * the page directory. [According to comments etc elsewhere on a compressed
13 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
14 *
15 * Page 0 is deliberately kept safe, since System Management Mode code in
16 * laptops may need to access the BIOS data stored there. This is also
17 * useful for future device drivers that either access the BIOS via VM86
18 * mode.
19 */
20
21/*
22 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
23 */
24.code32
25.text
26
27#include <linux/linkage.h>
28#include <asm/segment.h>
29#include <asm/pgtable.h>
30#include <asm/page.h>
31#include <asm/msr.h>
32
33.section ".text.head"
34 .code32
35 .globl startup_32
36
37startup_32:
38 cld
39 cli
40 movl $(__KERNEL_DS), %eax
41 movl %eax, %ds
42 movl %eax, %es
43 movl %eax, %ss
44
45/* Calculate the delta between where we were compiled to run
46 * at and where we were actually loaded at. This can only be done
47 * with a short local call on x86. Nothing else will tell us what
48 * address we are running at. The reserved chunk of the real-mode
49 * data at 0x1e4 (defined as a scratch field) are used as the stack
50 * for this calculation. Only 4 bytes are needed.
51 */
52 leal (0x1e4+4)(%esi), %esp
53 call 1f
541: popl %ebp
55 subl $1b, %ebp
56
57/* setup a stack and make sure cpu supports long mode. */
58 movl $user_stack_end, %eax
59 addl %ebp, %eax
60 movl %eax, %esp
61
62 call verify_cpu
63 testl %eax, %eax
64 jnz no_longmode
65
66/* Compute the delta between where we were compiled to run at
67 * and where the code will actually run at.
68 */
69/* %ebp contains the address we are loaded at by the boot loader and %ebx
70 * contains the address where we should move the kernel image temporarily
71 * for safe in-place decompression.
72 */
73
74#ifdef CONFIG_RELOCATABLE
75 movl %ebp, %ebx
76 addl $(LARGE_PAGE_SIZE -1), %ebx
77 andl $LARGE_PAGE_MASK, %ebx
78#else
79 movl $CONFIG_PHYSICAL_START, %ebx
80#endif
81
82 /* Replace the compressed data size with the uncompressed size */
83 subl input_len(%ebp), %ebx
84 movl output_len(%ebp), %eax
85 addl %eax, %ebx
86 /* Add 8 bytes for every 32K input block */
87 shrl $12, %eax
88 addl %eax, %ebx
89 /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
90 addl $(32768 + 18 + 4095), %ebx
91 andl $~4095, %ebx
92
93/*
94 * Prepare for entering 64 bit mode
95 */
96
97 /* Load new GDT with the 64bit segments using 32bit descriptor */
98 leal gdt(%ebp), %eax
99 movl %eax, gdt+2(%ebp)
100 lgdt gdt(%ebp)
101
102 /* Enable PAE mode */
103 xorl %eax, %eax
104 orl $(1 << 5), %eax
105 movl %eax, %cr4
106
107 /*
108 * Build early 4G boot pagetable
109 */
110 /* Initialize Page tables to 0*/
111 leal pgtable(%ebx), %edi
112 xorl %eax, %eax
113 movl $((4096*6)/4), %ecx
114 rep stosl
115
116 /* Build Level 4 */
117 leal pgtable + 0(%ebx), %edi
118 leal 0x1007 (%edi), %eax
119 movl %eax, 0(%edi)
120
121 /* Build Level 3 */
122 leal pgtable + 0x1000(%ebx), %edi
123 leal 0x1007(%edi), %eax
124 movl $4, %ecx
1251: movl %eax, 0x00(%edi)
126 addl $0x00001000, %eax
127 addl $8, %edi
128 decl %ecx
129 jnz 1b
130
131 /* Build Level 2 */
132 leal pgtable + 0x2000(%ebx), %edi
133 movl $0x00000183, %eax
134 movl $2048, %ecx
1351: movl %eax, 0(%edi)
136 addl $0x00200000, %eax
137 addl $8, %edi
138 decl %ecx
139 jnz 1b
140
141 /* Enable the boot page tables */
142 leal pgtable(%ebx), %eax
143 movl %eax, %cr3
144
145 /* Enable Long mode in EFER (Extended Feature Enable Register) */
146 movl $MSR_EFER, %ecx
147 rdmsr
148 btsl $_EFER_LME, %eax
149 wrmsr
150
151 /* Setup for the jump to 64bit mode
152 *
153 * When the jump is performend we will be in long mode but
154 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
155 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
156 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
157 * We place all of the values on our mini stack so lret can
158 * used to perform that far jump.
159 */
160 pushl $__KERNEL_CS
161 leal startup_64(%ebp), %eax
162 pushl %eax
163
164 /* Enter paged protected Mode, activating Long Mode */
165 movl $0x80000001, %eax /* Enable Paging and Protected mode */
166 movl %eax, %cr0
167
168 /* Jump from 32bit compatibility mode into 64bit mode. */
169 lret
170
171no_longmode:
172 /* This isn't an x86-64 CPU so hang */
1731:
174 hlt
175 jmp 1b
176
177#include "../../kernel/verify_cpu_64.S"
178
179 /* Be careful here startup_64 needs to be at a predictable
180 * address so I can export it in an ELF header. Bootloaders
181 * should look at the ELF header to find this address, as
182 * it may change in the future.
183 */
184 .code64
185 .org 0x200
186ENTRY(startup_64)
187 /* We come here either from startup_32 or directly from a
188 * 64bit bootloader. If we come here from a bootloader we depend on
189 * an identity mapped page table being provied that maps our
190 * entire text+data+bss and hopefully all of memory.
191 */
192
193 /* Setup data segments. */
194 xorl %eax, %eax
195 movl %eax, %ds
196 movl %eax, %es
197 movl %eax, %ss
198 movl %eax, %fs
199 movl %eax, %gs
200 lldt %ax
201 movl $0x20, %eax
202 ltr %ax
203
204 /* Compute the decompressed kernel start address. It is where
205 * we were loaded at aligned to a 2M boundary. %rbp contains the
206 * decompressed kernel start address.
207 *
208 * If it is a relocatable kernel then decompress and run the kernel
209 * from load address aligned to 2MB addr, otherwise decompress and
210 * run the kernel from CONFIG_PHYSICAL_START
211 */
212
213 /* Start with the delta to where the kernel will run at. */
214#ifdef CONFIG_RELOCATABLE
215 leaq startup_32(%rip) /* - $startup_32 */, %rbp
216 addq $(LARGE_PAGE_SIZE - 1), %rbp
217 andq $LARGE_PAGE_MASK, %rbp
218 movq %rbp, %rbx
219#else
220 movq $CONFIG_PHYSICAL_START, %rbp
221 movq %rbp, %rbx
222#endif
223
224 /* Replace the compressed data size with the uncompressed size */
225 movl input_len(%rip), %eax
226 subq %rax, %rbx
227 movl output_len(%rip), %eax
228 addq %rax, %rbx
229 /* Add 8 bytes for every 32K input block */
230 shrq $12, %rax
231 addq %rax, %rbx
232 /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
233 addq $(32768 + 18 + 4095), %rbx
234 andq $~4095, %rbx
235
236/* Copy the compressed kernel to the end of our buffer
237 * where decompression in place becomes safe.
238 */
239 leaq _end(%rip), %r8
240 leaq _end(%rbx), %r9
241 movq $_end /* - $startup_32 */, %rcx
2421: subq $8, %r8
243 subq $8, %r9
244 movq 0(%r8), %rax
245 movq %rax, 0(%r9)
246 subq $8, %rcx
247 jnz 1b
248
249/*
250 * Jump to the relocated address.
251 */
252 leaq relocated(%rbx), %rax
253 jmp *%rax
254
255.section ".text"
256relocated:
257
258/*
259 * Clear BSS
260 */
261 xorq %rax, %rax
262 leaq _edata(%rbx), %rdi
263 leaq _end(%rbx), %rcx
264 subq %rdi, %rcx
265 cld
266 rep
267 stosb
268
269 /* Setup the stack */
270 leaq user_stack_end(%rip), %rsp
271
272 /* zero EFLAGS after setting rsp */
273 pushq $0
274 popfq
275
276/*
277 * Do the decompression, and jump to the new kernel..
278 */
279 pushq %rsi # Save the real mode argument
280 movq %rsi, %rdi # real mode address
281 leaq _heap(%rip), %rsi # _heap
282 leaq input_data(%rip), %rdx # input_data
283 movl input_len(%rip), %eax
284 movq %rax, %rcx # input_len
285 movq %rbp, %r8 # output
286 call decompress_kernel
287 popq %rsi
288
289
290/*
291 * Jump to the decompressed kernel.
292 */
293 jmp *%rbp
294
295 .data
296gdt:
297 .word gdt_end - gdt
298 .long gdt
299 .word 0
300 .quad 0x0000000000000000 /* NULL descriptor */
301 .quad 0x00af9a000000ffff /* __KERNEL_CS */
302 .quad 0x00cf92000000ffff /* __KERNEL_DS */
303 .quad 0x0080890000000000 /* TS descriptor */
304 .quad 0x0000000000000000 /* TS continued */
305gdt_end:
306 .bss
307/* Stack for uncompression */
308 .balign 4
309user_stack:
310 .fill 4096,4,0
311user_stack_end:
diff --git a/arch/i386/boot/compressed/misc.c b/arch/x86/boot/compressed/misc_32.c
index b28505c544c9..b28505c544c9 100644
--- a/arch/i386/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc_32.c
diff --git a/arch/x86_64/boot/compressed/misc.c b/arch/x86/boot/compressed/misc_64.c
index f932b0e89096..f932b0e89096 100644
--- a/arch/x86_64/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc_64.c
diff --git a/arch/i386/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c
index 2d77ee728f92..2d77ee728f92 100644
--- a/arch/i386/boot/compressed/relocs.c
+++ b/arch/x86/boot/compressed/relocs.c
diff --git a/arch/i386/boot/compressed/vmlinux.lds b/arch/x86/boot/compressed/vmlinux_32.lds
index cc4854f6c6c1..cc4854f6c6c1 100644
--- a/arch/i386/boot/compressed/vmlinux.lds
+++ b/arch/x86/boot/compressed/vmlinux_32.lds
diff --git a/arch/i386/boot/compressed/vmlinux.scr b/arch/x86/boot/compressed/vmlinux_32.scr
index 707a88f7f29e..707a88f7f29e 100644
--- a/arch/i386/boot/compressed/vmlinux.scr
+++ b/arch/x86/boot/compressed/vmlinux_32.scr
diff --git a/arch/x86_64/boot/compressed/vmlinux.lds b/arch/x86/boot/compressed/vmlinux_64.lds
index 94c13e557fb4..94c13e557fb4 100644
--- a/arch/x86_64/boot/compressed/vmlinux.lds
+++ b/arch/x86/boot/compressed/vmlinux_64.lds
diff --git a/arch/x86_64/boot/compressed/vmlinux.scr b/arch/x86/boot/compressed/vmlinux_64.scr
index bd1429ce193e..bd1429ce193e 100644
--- a/arch/x86_64/boot/compressed/vmlinux.scr
+++ b/arch/x86/boot/compressed/vmlinux_64.scr
diff --git a/arch/i386/boot/copy.S b/arch/x86/boot/copy.S
index ef127e56a3cf..ef127e56a3cf 100644
--- a/arch/i386/boot/copy.S
+++ b/arch/x86/boot/copy.S
diff --git a/arch/i386/boot/cpu.c b/arch/x86/boot/cpu.c
index 2a5c32da5852..2a5c32da5852 100644
--- a/arch/i386/boot/cpu.c
+++ b/arch/x86/boot/cpu.c
diff --git a/arch/i386/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index e655a89c5510..e655a89c5510 100644
--- a/arch/i386/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
diff --git a/arch/i386/boot/edd.c b/arch/x86/boot/edd.c
index bd138e442ec2..bd138e442ec2 100644
--- a/arch/i386/boot/edd.c
+++ b/arch/x86/boot/edd.c
diff --git a/arch/i386/boot/header.S b/arch/x86/boot/header.S
index f3140e596d40..f3140e596d40 100644
--- a/arch/i386/boot/header.S
+++ b/arch/x86/boot/header.S
diff --git a/arch/i386/boot/install.sh b/arch/x86/boot/install.sh
index 88d77761d01b..88d77761d01b 100644
--- a/arch/i386/boot/install.sh
+++ b/arch/x86/boot/install.sh
diff --git a/arch/i386/boot/main.c b/arch/x86/boot/main.c
index 0eeef3989a17..0eeef3989a17 100644
--- a/arch/i386/boot/main.c
+++ b/arch/x86/boot/main.c
diff --git a/arch/i386/boot/mca.c b/arch/x86/boot/mca.c
index 68222f2d4b67..68222f2d4b67 100644
--- a/arch/i386/boot/mca.c
+++ b/arch/x86/boot/mca.c
diff --git a/arch/i386/boot/memory.c b/arch/x86/boot/memory.c
index 378353956b5d..378353956b5d 100644
--- a/arch/i386/boot/memory.c
+++ b/arch/x86/boot/memory.c
diff --git a/arch/i386/boot/mtools.conf.in b/arch/x86/boot/mtools.conf.in
index efd6d2490c1d..efd6d2490c1d 100644
--- a/arch/i386/boot/mtools.conf.in
+++ b/arch/x86/boot/mtools.conf.in
diff --git a/arch/i386/boot/pm.c b/arch/x86/boot/pm.c
index 09fb342cc62e..09fb342cc62e 100644
--- a/arch/i386/boot/pm.c
+++ b/arch/x86/boot/pm.c
diff --git a/arch/i386/boot/pmjump.S b/arch/x86/boot/pmjump.S
index 2e559233725a..2e559233725a 100644
--- a/arch/i386/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
diff --git a/arch/i386/boot/printf.c b/arch/x86/boot/printf.c
index 1a09f9309d3c..1a09f9309d3c 100644
--- a/arch/i386/boot/printf.c
+++ b/arch/x86/boot/printf.c
diff --git a/arch/i386/boot/setup.ld b/arch/x86/boot/setup.ld
index df9234b3a5e0..df9234b3a5e0 100644
--- a/arch/i386/boot/setup.ld
+++ b/arch/x86/boot/setup.ld
diff --git a/arch/i386/boot/string.c b/arch/x86/boot/string.c
index 481a22097781..481a22097781 100644
--- a/arch/i386/boot/string.c
+++ b/arch/x86/boot/string.c
diff --git a/arch/i386/boot/tools/.gitignore b/arch/x86/boot/tools/.gitignore
index 378eac25d311..378eac25d311 100644
--- a/arch/i386/boot/tools/.gitignore
+++ b/arch/x86/boot/tools/.gitignore
diff --git a/arch/i386/boot/tools/build.c b/arch/x86/boot/tools/build.c
index b4248740ff0d..b4248740ff0d 100644
--- a/arch/i386/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
diff --git a/arch/i386/boot/tty.c b/arch/x86/boot/tty.c
index f3f14bd26371..f3f14bd26371 100644
--- a/arch/i386/boot/tty.c
+++ b/arch/x86/boot/tty.c
diff --git a/arch/i386/boot/version.c b/arch/x86/boot/version.c
index c61462f7d9a7..c61462f7d9a7 100644
--- a/arch/i386/boot/version.c
+++ b/arch/x86/boot/version.c
diff --git a/arch/i386/boot/vesa.h b/arch/x86/boot/vesa.h
index ff5b73cd406f..ff5b73cd406f 100644
--- a/arch/i386/boot/vesa.h
+++ b/arch/x86/boot/vesa.h
diff --git a/arch/i386/boot/video-bios.c b/arch/x86/boot/video-bios.c
index 68e65d95cdfd..68e65d95cdfd 100644
--- a/arch/i386/boot/video-bios.c
+++ b/arch/x86/boot/video-bios.c
diff --git a/arch/i386/boot/video-vesa.c b/arch/x86/boot/video-vesa.c
index 192190710710..192190710710 100644
--- a/arch/i386/boot/video-vesa.c
+++ b/arch/x86/boot/video-vesa.c
diff --git a/arch/i386/boot/video-vga.c b/arch/x86/boot/video-vga.c
index aef02f9ec0c1..aef02f9ec0c1 100644
--- a/arch/i386/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
diff --git a/arch/i386/boot/video.c b/arch/x86/boot/video.c
index e4ba897bf9a3..e4ba897bf9a3 100644
--- a/arch/i386/boot/video.c
+++ b/arch/x86/boot/video.c
diff --git a/arch/i386/boot/video.h b/arch/x86/boot/video.h
index b92447d51213..b92447d51213 100644
--- a/arch/i386/boot/video.h
+++ b/arch/x86/boot/video.h
diff --git a/arch/i386/boot/voyager.c b/arch/x86/boot/voyager.c
index 61c8fe0453be..61c8fe0453be 100644
--- a/arch/i386/boot/voyager.c
+++ b/arch/x86/boot/voyager.c
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
new file mode 100644
index 000000000000..18dcdc6fb7aa
--- /dev/null
+++ b/arch/x86/crypto/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/crypto/Makefile_32
3else
4include ${srctree}/arch/x86/crypto/Makefile_64
5endif
diff --git a/arch/x86/crypto/Makefile_32 b/arch/x86/crypto/Makefile_32
new file mode 100644
index 000000000000..2d873a2388ed
--- /dev/null
+++ b/arch/x86/crypto/Makefile_32
@@ -0,0 +1,12 @@
1#
2# x86/crypto/Makefile
3#
4# Arch-specific CryptoAPI modules.
5#
6
7obj-$(CONFIG_CRYPTO_AES_586) += aes-i586.o
8obj-$(CONFIG_CRYPTO_TWOFISH_586) += twofish-i586.o
9
10aes-i586-y := aes-i586-asm_32.o aes_32.o
11twofish-i586-y := twofish-i586-asm_32.o twofish_32.o
12
diff --git a/arch/x86/crypto/Makefile_64 b/arch/x86/crypto/Makefile_64
new file mode 100644
index 000000000000..b40896276e93
--- /dev/null
+++ b/arch/x86/crypto/Makefile_64
@@ -0,0 +1,12 @@
1#
2# x86/crypto/Makefile
3#
4# Arch-specific CryptoAPI modules.
5#
6
7obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
8obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
9
10aes-x86_64-y := aes-x86_64-asm_64.o aes_64.o
11twofish-x86_64-y := twofish-x86_64-asm_64.o twofish_64.o
12
diff --git a/arch/i386/crypto/aes-i586-asm.S b/arch/x86/crypto/aes-i586-asm_32.S
index f942f0c8f630..f942f0c8f630 100644
--- a/arch/i386/crypto/aes-i586-asm.S
+++ b/arch/x86/crypto/aes-i586-asm_32.S
diff --git a/arch/x86_64/crypto/aes-x86_64-asm.S b/arch/x86/crypto/aes-x86_64-asm_64.S
index 26b40de4d0b0..26b40de4d0b0 100644
--- a/arch/x86_64/crypto/aes-x86_64-asm.S
+++ b/arch/x86/crypto/aes-x86_64-asm_64.S
diff --git a/arch/i386/crypto/aes.c b/arch/x86/crypto/aes_32.c
index 49aad9397f10..49aad9397f10 100644
--- a/arch/i386/crypto/aes.c
+++ b/arch/x86/crypto/aes_32.c
diff --git a/arch/x86_64/crypto/aes.c b/arch/x86/crypto/aes_64.c
index 5cdb13ea5cc2..5cdb13ea5cc2 100644
--- a/arch/x86_64/crypto/aes.c
+++ b/arch/x86/crypto/aes_64.c
diff --git a/arch/i386/crypto/twofish-i586-asm.S b/arch/x86/crypto/twofish-i586-asm_32.S
index 39b98ed2c1b9..39b98ed2c1b9 100644
--- a/arch/i386/crypto/twofish-i586-asm.S
+++ b/arch/x86/crypto/twofish-i586-asm_32.S
diff --git a/arch/x86_64/crypto/twofish-x86_64-asm.S b/arch/x86/crypto/twofish-x86_64-asm_64.S
index 35974a586615..35974a586615 100644
--- a/arch/x86_64/crypto/twofish-x86_64-asm.S
+++ b/arch/x86/crypto/twofish-x86_64-asm_64.S
diff --git a/arch/i386/crypto/twofish.c b/arch/x86/crypto/twofish_32.c
index e3004dfe9c7a..e3004dfe9c7a 100644
--- a/arch/i386/crypto/twofish.c
+++ b/arch/x86/crypto/twofish_32.c
diff --git a/arch/x86_64/crypto/twofish.c b/arch/x86/crypto/twofish_64.c
index 182d91d5cfb9..182d91d5cfb9 100644
--- a/arch/x86_64/crypto/twofish.c
+++ b/arch/x86/crypto/twofish_64.c
diff --git a/arch/x86_64/ia32/Makefile b/arch/x86/ia32/Makefile
index cdae36435e21..cdae36435e21 100644
--- a/arch/x86_64/ia32/Makefile
+++ b/arch/x86/ia32/Makefile
diff --git a/arch/x86/ia32/audit.c b/arch/x86/ia32/audit.c
new file mode 100644
index 000000000000..91b7b5922dfa
--- /dev/null
+++ b/arch/x86/ia32/audit.c
@@ -0,0 +1,42 @@
1#include <asm/unistd_32.h>
2
3unsigned ia32_dir_class[] = {
4#include <asm-generic/audit_dir_write.h>
5~0U
6};
7
8unsigned ia32_chattr_class[] = {
9#include <asm-generic/audit_change_attr.h>
10~0U
11};
12
13unsigned ia32_write_class[] = {
14#include <asm-generic/audit_write.h>
15~0U
16};
17
18unsigned ia32_read_class[] = {
19#include <asm-generic/audit_read.h>
20~0U
21};
22
23unsigned ia32_signal_class[] = {
24#include <asm-generic/audit_signal.h>
25~0U
26};
27
28int ia32_classify_syscall(unsigned syscall)
29{
30 switch(syscall) {
31 case __NR_open:
32 return 2;
33 case __NR_openat:
34 return 3;
35 case __NR_socketcall:
36 return 4;
37 case __NR_execve:
38 return 5;
39 default:
40 return 1;
41 }
42}
diff --git a/arch/x86_64/ia32/fpu32.c b/arch/x86/ia32/fpu32.c
index 2c8209a3605a..2c8209a3605a 100644
--- a/arch/x86_64/ia32/fpu32.c
+++ b/arch/x86/ia32/fpu32.c
diff --git a/arch/x86_64/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index 08781370256d..08781370256d 100644
--- a/arch/x86_64/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86/ia32/ia32_binfmt.c
index dffd2ac72747..dffd2ac72747 100644
--- a/arch/x86_64/ia32/ia32_binfmt.c
+++ b/arch/x86/ia32/ia32_binfmt.c
diff --git a/arch/x86_64/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 6ea19c25f90d..6ea19c25f90d 100644
--- a/arch/x86_64/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
diff --git a/arch/x86_64/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 18b231810908..18b231810908 100644
--- a/arch/x86_64/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
diff --git a/arch/x86/ia32/ipc32.c b/arch/x86/ia32/ipc32.c
new file mode 100644
index 000000000000..2e1869ec4db4
--- /dev/null
+++ b/arch/x86/ia32/ipc32.c
@@ -0,0 +1,57 @@
1#include <linux/kernel.h>
2#include <linux/spinlock.h>
3#include <linux/list.h>
4#include <linux/syscalls.h>
5#include <linux/time.h>
6#include <linux/sem.h>
7#include <linux/msg.h>
8#include <linux/shm.h>
9#include <linux/ipc.h>
10#include <linux/compat.h>
11
12#include <asm/ipc.h>
13
14asmlinkage long
15sys32_ipc(u32 call, int first, int second, int third,
16 compat_uptr_t ptr, u32 fifth)
17{
18 int version;
19
20 version = call >> 16; /* hack for backward compatibility */
21 call &= 0xffff;
22
23 switch (call) {
24 case SEMOP:
25 /* struct sembuf is the same on 32 and 64bit :)) */
26 return sys_semtimedop(first, compat_ptr(ptr), second, NULL);
27 case SEMTIMEDOP:
28 return compat_sys_semtimedop(first, compat_ptr(ptr), second,
29 compat_ptr(fifth));
30 case SEMGET:
31 return sys_semget(first, second, third);
32 case SEMCTL:
33 return compat_sys_semctl(first, second, third, compat_ptr(ptr));
34
35 case MSGSND:
36 return compat_sys_msgsnd(first, second, third, compat_ptr(ptr));
37 case MSGRCV:
38 return compat_sys_msgrcv(first, second, fifth, third,
39 version, compat_ptr(ptr));
40 case MSGGET:
41 return sys_msgget((key_t) first, second);
42 case MSGCTL:
43 return compat_sys_msgctl(first, second, compat_ptr(ptr));
44
45 case SHMAT:
46 return compat_sys_shmat(first, second, third, version,
47 compat_ptr(ptr));
48 break;
49 case SHMDT:
50 return sys_shmdt(compat_ptr(ptr));
51 case SHMGET:
52 return sys_shmget(first, (unsigned)second, third);
53 case SHMCTL:
54 return compat_sys_shmctl(first, second, compat_ptr(ptr));
55 }
56 return -ENOSYS;
57}
diff --git a/arch/x86_64/ia32/mmap32.c b/arch/x86/ia32/mmap32.c
index e4b84b4a417a..e4b84b4a417a 100644
--- a/arch/x86_64/ia32/mmap32.c
+++ b/arch/x86/ia32/mmap32.c
diff --git a/arch/x86_64/ia32/ptrace32.c b/arch/x86/ia32/ptrace32.c
index 4a233ad6269c..4a233ad6269c 100644
--- a/arch/x86_64/ia32/ptrace32.c
+++ b/arch/x86/ia32/ptrace32.c
diff --git a/arch/x86_64/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index bee96d614432..bee96d614432 100644
--- a/arch/x86_64/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
diff --git a/arch/x86_64/ia32/syscall32.c b/arch/x86/ia32/syscall32.c
index 15013bac181c..15013bac181c 100644
--- a/arch/x86_64/ia32/syscall32.c
+++ b/arch/x86/ia32/syscall32.c
diff --git a/arch/x86/ia32/syscall32_syscall.S b/arch/x86/ia32/syscall32_syscall.S
new file mode 100644
index 000000000000..933f0f08b1cf
--- /dev/null
+++ b/arch/x86/ia32/syscall32_syscall.S
@@ -0,0 +1,17 @@
1/* 32bit VDSOs mapped into user space. */
2
3 .section ".init.data","aw"
4
5 .globl syscall32_syscall
6 .globl syscall32_syscall_end
7
8syscall32_syscall:
9 .incbin "arch/x86/ia32/vsyscall-syscall.so"
10syscall32_syscall_end:
11
12 .globl syscall32_sysenter
13 .globl syscall32_sysenter_end
14
15syscall32_sysenter:
16 .incbin "arch/x86/ia32/vsyscall-sysenter.so"
17syscall32_sysenter_end:
diff --git a/arch/x86_64/ia32/tls32.c b/arch/x86/ia32/tls32.c
index 1cc4340de3ca..1cc4340de3ca 100644
--- a/arch/x86_64/ia32/tls32.c
+++ b/arch/x86/ia32/tls32.c
diff --git a/arch/x86/ia32/vsyscall-sigreturn.S b/arch/x86/ia32/vsyscall-sigreturn.S
new file mode 100644
index 000000000000..b383be00baec
--- /dev/null
+++ b/arch/x86/ia32/vsyscall-sigreturn.S
@@ -0,0 +1,143 @@
1/*
2 * Common code for the sigreturn entry points on the vsyscall page.
3 * This code uses SYSCALL_ENTER_KERNEL (either syscall or int $0x80)
4 * to enter the kernel.
5 * This file is #include'd by vsyscall-*.S to define them after the
6 * vsyscall entry point. The addresses we get for these entry points
7 * by doing ".balign 32" must match in both versions of the page.
8 */
9
10 .code32
11 .section .text.sigreturn,"ax"
12 .balign 32
13 .globl __kernel_sigreturn
14 .type __kernel_sigreturn,@function
15__kernel_sigreturn:
16.LSTART_sigreturn:
17 popl %eax
18 movl $__NR_ia32_sigreturn, %eax
19 SYSCALL_ENTER_KERNEL
20.LEND_sigreturn:
21 .size __kernel_sigreturn,.-.LSTART_sigreturn
22
23 .section .text.rtsigreturn,"ax"
24 .balign 32
25 .globl __kernel_rt_sigreturn
26 .type __kernel_rt_sigreturn,@function
27__kernel_rt_sigreturn:
28.LSTART_rt_sigreturn:
29 movl $__NR_ia32_rt_sigreturn, %eax
30 SYSCALL_ENTER_KERNEL
31.LEND_rt_sigreturn:
32 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
33
34 .section .eh_frame,"a",@progbits
35.LSTARTFRAMES:
36 .long .LENDCIES-.LSTARTCIES
37.LSTARTCIES:
38 .long 0 /* CIE ID */
39 .byte 1 /* Version number */
40 .string "zRS" /* NUL-terminated augmentation string */
41 .uleb128 1 /* Code alignment factor */
42 .sleb128 -4 /* Data alignment factor */
43 .byte 8 /* Return address register column */
44 .uleb128 1 /* Augmentation value length */
45 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
46 .byte 0x0c /* DW_CFA_def_cfa */
47 .uleb128 4
48 .uleb128 4
49 .byte 0x88 /* DW_CFA_offset, column 0x8 */
50 .uleb128 1
51 .align 4
52.LENDCIES:
53
54 .long .LENDFDE2-.LSTARTFDE2 /* Length FDE */
55.LSTARTFDE2:
56 .long .LSTARTFDE2-.LSTARTFRAMES /* CIE pointer */
57 /* HACK: The dwarf2 unwind routines will subtract 1 from the
58 return address to get an address in the middle of the
59 presumed call instruction. Since we didn't get here via
60 a call, we need to include the nop before the real start
61 to make up for it. */
62 .long .LSTART_sigreturn-1-. /* PC-relative start address */
63 .long .LEND_sigreturn-.LSTART_sigreturn+1
64 .uleb128 0 /* Augmentation length */
65 /* What follows are the instructions for the table generation.
66 We record the locations of each register saved. This is
67 complicated by the fact that the "CFA" is always assumed to
68 be the value of the stack pointer in the caller. This means
69 that we must define the CFA of this body of code to be the
70 saved value of the stack pointer in the sigcontext. Which
71 also means that there is no fixed relation to the other
72 saved registers, which means that we must use DW_CFA_expression
73 to compute their addresses. It also means that when we
74 adjust the stack with the popl, we have to do it all over again. */
75
76#define do_cfa_expr(offset) \
77 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
78 .uleb128 1f-0f; /* length */ \
790: .byte 0x74; /* DW_OP_breg4 */ \
80 .sleb128 offset; /* offset */ \
81 .byte 0x06; /* DW_OP_deref */ \
821:
83
84#define do_expr(regno, offset) \
85 .byte 0x10; /* DW_CFA_expression */ \
86 .uleb128 regno; /* regno */ \
87 .uleb128 1f-0f; /* length */ \
880: .byte 0x74; /* DW_OP_breg4 */ \
89 .sleb128 offset; /* offset */ \
901:
91
92 do_cfa_expr(IA32_SIGCONTEXT_esp+4)
93 do_expr(0, IA32_SIGCONTEXT_eax+4)
94 do_expr(1, IA32_SIGCONTEXT_ecx+4)
95 do_expr(2, IA32_SIGCONTEXT_edx+4)
96 do_expr(3, IA32_SIGCONTEXT_ebx+4)
97 do_expr(5, IA32_SIGCONTEXT_ebp+4)
98 do_expr(6, IA32_SIGCONTEXT_esi+4)
99 do_expr(7, IA32_SIGCONTEXT_edi+4)
100 do_expr(8, IA32_SIGCONTEXT_eip+4)
101
102 .byte 0x42 /* DW_CFA_advance_loc 2 -- nop; popl eax. */
103
104 do_cfa_expr(IA32_SIGCONTEXT_esp)
105 do_expr(0, IA32_SIGCONTEXT_eax)
106 do_expr(1, IA32_SIGCONTEXT_ecx)
107 do_expr(2, IA32_SIGCONTEXT_edx)
108 do_expr(3, IA32_SIGCONTEXT_ebx)
109 do_expr(5, IA32_SIGCONTEXT_ebp)
110 do_expr(6, IA32_SIGCONTEXT_esi)
111 do_expr(7, IA32_SIGCONTEXT_edi)
112 do_expr(8, IA32_SIGCONTEXT_eip)
113
114 .align 4
115.LENDFDE2:
116
117 .long .LENDFDE3-.LSTARTFDE3 /* Length FDE */
118.LSTARTFDE3:
119 .long .LSTARTFDE3-.LSTARTFRAMES /* CIE pointer */
120 /* HACK: See above wrt unwind library assumptions. */
121 .long .LSTART_rt_sigreturn-1-. /* PC-relative start address */
122 .long .LEND_rt_sigreturn-.LSTART_rt_sigreturn+1
123 .uleb128 0 /* Augmentation */
124 /* What follows are the instructions for the table generation.
125 We record the locations of each register saved. This is
126 slightly less complicated than the above, since we don't
127 modify the stack pointer in the process. */
128
129 do_cfa_expr(IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_esp)
130 do_expr(0, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_eax)
131 do_expr(1, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ecx)
132 do_expr(2, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_edx)
133 do_expr(3, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ebx)
134 do_expr(5, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ebp)
135 do_expr(6, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_esi)
136 do_expr(7, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_edi)
137 do_expr(8, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_eip)
138
139 .align 4
140.LENDFDE3:
141
142#include "../../x86/kernel/vsyscall-note_32.S"
143
diff --git a/arch/x86_64/ia32/vsyscall-syscall.S b/arch/x86/ia32/vsyscall-syscall.S
index cf9ef678de3e..cf9ef678de3e 100644
--- a/arch/x86_64/ia32/vsyscall-syscall.S
+++ b/arch/x86/ia32/vsyscall-syscall.S
diff --git a/arch/x86_64/ia32/vsyscall-sysenter.S b/arch/x86/ia32/vsyscall-sysenter.S
index ae056e553d13..ae056e553d13 100644
--- a/arch/x86_64/ia32/vsyscall-sysenter.S
+++ b/arch/x86/ia32/vsyscall-sysenter.S
diff --git a/arch/x86_64/ia32/vsyscall.lds b/arch/x86/ia32/vsyscall.lds
index 1dc86ff5bcb9..1dc86ff5bcb9 100644
--- a/arch/x86_64/ia32/vsyscall.lds
+++ b/arch/x86/ia32/vsyscall.lds
diff --git a/arch/i386/kernel/.gitignore b/arch/x86/kernel/.gitignore
index 40836ad9079c..40836ad9079c 100644
--- a/arch/i386/kernel/.gitignore
+++ b/arch/x86/kernel/.gitignore
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
new file mode 100644
index 000000000000..45855c97923e
--- /dev/null
+++ b/arch/x86/kernel/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/kernel/Makefile_32
3else
4include ${srctree}/arch/x86/kernel/Makefile_64
5endif
diff --git a/arch/x86/kernel/Makefile_32 b/arch/x86/kernel/Makefile_32
new file mode 100644
index 000000000000..c624193740fd
--- /dev/null
+++ b/arch/x86/kernel/Makefile_32
@@ -0,0 +1,86 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := head_32.o init_task_32.o vmlinux.lds
6
7obj-y := process_32.o signal_32.o entry_32.o traps_32.o irq_32.o \
8 ptrace_32.o time_32.o ioport_32.o ldt_32.o setup_32.o i8259_32.o sys_i386_32.o \
9 pci-dma_32.o i386_ksyms_32.o i387_32.o bootflag.o e820_32.o\
10 quirks.o i8237.o topology.o alternative.o i8253_32.o tsc_32.o
11
12obj-$(CONFIG_STACKTRACE) += stacktrace.o
13obj-y += cpu/
14obj-y += acpi/
15obj-$(CONFIG_X86_BIOS_REBOOT) += reboot_32.o
16obj-$(CONFIG_MCA) += mca_32.o
17obj-$(CONFIG_X86_MSR) += msr.o
18obj-$(CONFIG_X86_CPUID) += cpuid.o
19obj-$(CONFIG_MICROCODE) += microcode.o
20obj-$(CONFIG_APM) += apm_32.o
21obj-$(CONFIG_X86_SMP) += smp_32.o smpboot_32.o tsc_sync.o
22obj-$(CONFIG_SMP) += smpcommon_32.o
23obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_32.o
24obj-$(CONFIG_X86_MPPARSE) += mpparse_32.o
25obj-$(CONFIG_X86_LOCAL_APIC) += apic_32.o nmi_32.o
26obj-$(CONFIG_X86_IO_APIC) += io_apic_32.o
27obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
28obj-$(CONFIG_KEXEC) += machine_kexec_32.o relocate_kernel_32.o crash_32.o
29obj-$(CONFIG_CRASH_DUMP) += crash_dump_32.o
30obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
31obj-$(CONFIG_X86_SUMMIT_NUMA) += summit_32.o
32obj-$(CONFIG_KPROBES) += kprobes_32.o
33obj-$(CONFIG_MODULES) += module_32.o
34obj-y += sysenter_32.o vsyscall_32.o
35obj-$(CONFIG_ACPI_SRAT) += srat_32.o
36obj-$(CONFIG_EFI) += efi_32.o efi_stub_32.o
37obj-$(CONFIG_DOUBLEFAULT) += doublefault_32.o
38obj-$(CONFIG_VM86) += vm86_32.o
39obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
40obj-$(CONFIG_HPET_TIMER) += hpet_32.o
41obj-$(CONFIG_K8_NB) += k8.o
42obj-$(CONFIG_MGEODE_LX) += geode_32.o
43
44obj-$(CONFIG_VMI) += vmi_32.o vmiclock_32.o
45obj-$(CONFIG_PARAVIRT) += paravirt_32.o
46obj-y += pcspeaker.o
47
48obj-$(CONFIG_SCx200) += scx200_32.o
49
50# vsyscall_32.o contains the vsyscall DSO images as __initdata.
51# We must build both images before we can assemble it.
52# Note: kbuild does not track this dependency due to usage of .incbin
53$(obj)/vsyscall_32.o: $(obj)/vsyscall-int80_32.so $(obj)/vsyscall-sysenter_32.so
54targets += $(foreach F,int80 sysenter,vsyscall-$F.o vsyscall-$F.so)
55targets += vsyscall-note_32.o vsyscall_32.lds
56
57# The DSO images are built using a special linker script.
58quiet_cmd_syscall = SYSCALL $@
59 cmd_syscall = $(CC) -m elf_i386 -nostdlib $(SYSCFLAGS_$(@F)) \
60 -Wl,-T,$(filter-out FORCE,$^) -o $@
61
62export CPPFLAGS_vsyscall_32.lds += -P -C -U$(ARCH)
63
64vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
65 $(call ld-option, -Wl$(comma)--hash-style=sysv)
66SYSCFLAGS_vsyscall-sysenter_32.so = $(vsyscall-flags)
67SYSCFLAGS_vsyscall-int80_32.so = $(vsyscall-flags)
68
69$(obj)/vsyscall-int80_32.so $(obj)/vsyscall-sysenter_32.so: \
70$(obj)/vsyscall-%.so: $(src)/vsyscall_32.lds \
71 $(obj)/vsyscall-%.o $(obj)/vsyscall-note_32.o FORCE
72 $(call if_changed,syscall)
73
74# We also create a special relocatable object that should mirror the symbol
75# table and layout of the linked DSO. With ld -R we can then refer to
76# these symbols in the kernel code rather than hand-coded addresses.
77extra-y += vsyscall-syms.o
78$(obj)/built-in.o: $(obj)/vsyscall-syms.o
79$(obj)/built-in.o: ld_flags += -R $(obj)/vsyscall-syms.o
80
81SYSCFLAGS_vsyscall-syms.o = -r
82$(obj)/vsyscall-syms.o: $(src)/vsyscall_32.lds \
83 $(obj)/vsyscall-sysenter_32.o $(obj)/vsyscall-note_32.o FORCE
84 $(call if_changed,syscall)
85
86
diff --git a/arch/x86/kernel/Makefile_64 b/arch/x86/kernel/Makefile_64
new file mode 100644
index 000000000000..3ab017a0a3b9
--- /dev/null
+++ b/arch/x86/kernel/Makefile_64
@@ -0,0 +1,54 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := head_64.o head64.o init_task_64.o vmlinux.lds
6EXTRA_AFLAGS := -traditional
7obj-y := process_64.o signal_64.o entry_64.o traps_64.o irq_64.o \
8 ptrace_64.o time_64.o ioport_64.o ldt_64.o setup_64.o i8259_64.o sys_x86_64.o \
9 x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \
10 setup64.o bootflag.o e820_64.o reboot_64.o quirks.o i8237.o \
11 pci-dma_64.o pci-nommu_64.o alternative.o hpet_64.o tsc_64.o bugs_64.o \
12 perfctr-watchdog.o
13
14obj-$(CONFIG_STACKTRACE) += stacktrace.o
15obj-$(CONFIG_X86_MCE) += mce_64.o therm_throt.o
16obj-$(CONFIG_X86_MCE_INTEL) += mce_intel_64.o
17obj-$(CONFIG_X86_MCE_AMD) += mce_amd_64.o
18obj-$(CONFIG_MTRR) += cpu/mtrr/
19obj-$(CONFIG_ACPI) += acpi/
20obj-$(CONFIG_X86_MSR) += msr.o
21obj-$(CONFIG_MICROCODE) += microcode.o
22obj-$(CONFIG_X86_CPUID) += cpuid.o
23obj-$(CONFIG_SMP) += smp_64.o smpboot_64.o trampoline_64.o tsc_sync.o
24obj-y += apic_64.o nmi_64.o
25obj-y += io_apic_64.o mpparse_64.o genapic_64.o genapic_flat_64.o
26obj-$(CONFIG_KEXEC) += machine_kexec_64.o relocate_kernel_64.o crash_64.o
27obj-$(CONFIG_CRASH_DUMP) += crash_dump_64.o
28obj-$(CONFIG_PM) += suspend_64.o
29obj-$(CONFIG_HIBERNATION) += suspend_asm_64.o
30obj-$(CONFIG_CPU_FREQ) += cpu/cpufreq/
31obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
32obj-$(CONFIG_IOMMU) += pci-gart_64.o aperture_64.o
33obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
34obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o
35obj-$(CONFIG_KPROBES) += kprobes_64.o
36obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o
37obj-$(CONFIG_X86_VSMP) += vsmp_64.o
38obj-$(CONFIG_K8_NB) += k8.o
39obj-$(CONFIG_AUDIT) += audit_64.o
40
41obj-$(CONFIG_MODULES) += module_64.o
42obj-$(CONFIG_PCI) += early-quirks_64.o
43
44obj-y += topology.o
45obj-y += intel_cacheinfo.o
46obj-y += addon_cpuid_features.o
47obj-y += pcspeaker.o
48
49CFLAGS_vsyscall_64.o := $(PROFILING) -g0
50
51therm_throt-y += cpu/mcheck/therm_throt.o
52intel_cacheinfo-y += cpu/intel_cacheinfo.o
53addon_cpuid_features-y += cpu/addon_cpuid_features.o
54perfctr-watchdog-y += cpu/perfctr-watchdog.o
diff --git a/arch/x86/kernel/acpi/Makefile b/arch/x86/kernel/acpi/Makefile
new file mode 100644
index 000000000000..3d5671939542
--- /dev/null
+++ b/arch/x86/kernel/acpi/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/kernel/acpi/Makefile_32
3else
4include ${srctree}/arch/x86/kernel/acpi/Makefile_64
5endif
diff --git a/arch/x86/kernel/acpi/Makefile_32 b/arch/x86/kernel/acpi/Makefile_32
new file mode 100644
index 000000000000..a4852a2e9190
--- /dev/null
+++ b/arch/x86/kernel/acpi/Makefile_32
@@ -0,0 +1,10 @@
1obj-$(CONFIG_ACPI) += boot.o
2ifneq ($(CONFIG_PCI),)
3obj-$(CONFIG_X86_IO_APIC) += earlyquirk_32.o
4endif
5obj-$(CONFIG_ACPI_SLEEP) += sleep_32.o wakeup_32.o
6
7ifneq ($(CONFIG_ACPI_PROCESSOR),)
8obj-y += cstate.o processor.o
9endif
10
diff --git a/arch/x86/kernel/acpi/Makefile_64 b/arch/x86/kernel/acpi/Makefile_64
new file mode 100644
index 000000000000..629425bc002d
--- /dev/null
+++ b/arch/x86/kernel/acpi/Makefile_64
@@ -0,0 +1,7 @@
1obj-y := boot.o
2obj-$(CONFIG_ACPI_SLEEP) += sleep_64.o wakeup_64.o
3
4ifneq ($(CONFIG_ACPI_PROCESSOR),)
5obj-y += processor.o cstate.o
6endif
7
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
new file mode 100644
index 000000000000..afd2afe9102d
--- /dev/null
+++ b/arch/x86/kernel/acpi/boot.c
@@ -0,0 +1,1326 @@
1/*
2 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
3 *
4 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
5 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */
25
26#include <linux/init.h>
27#include <linux/acpi.h>
28#include <linux/acpi_pmtmr.h>
29#include <linux/efi.h>
30#include <linux/cpumask.h>
31#include <linux/module.h>
32#include <linux/dmi.h>
33#include <linux/irq.h>
34#include <linux/bootmem.h>
35#include <linux/ioport.h>
36
37#include <asm/pgtable.h>
38#include <asm/io_apic.h>
39#include <asm/apic.h>
40#include <asm/io.h>
41#include <asm/mpspec.h>
42
43static int __initdata acpi_force = 0;
44
45#ifdef CONFIG_ACPI
46int acpi_disabled = 0;
47#else
48int acpi_disabled = 1;
49#endif
50EXPORT_SYMBOL(acpi_disabled);
51
52#ifdef CONFIG_X86_64
53
54#include <asm/proto.h>
55
56static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return 0; }
57
58
59#else /* X86 */
60
61#ifdef CONFIG_X86_LOCAL_APIC
62#include <mach_apic.h>
63#include <mach_mpparse.h>
64#endif /* CONFIG_X86_LOCAL_APIC */
65
66#endif /* X86 */
67
68#define BAD_MADT_ENTRY(entry, end) ( \
69 (!entry) || (unsigned long)entry + sizeof(*entry) > end || \
70 ((struct acpi_subtable_header *)entry)->length < sizeof(*entry))
71
72#define PREFIX "ACPI: "
73
74int acpi_noirq; /* skip ACPI IRQ initialization */
75int acpi_pci_disabled __initdata; /* skip ACPI PCI scan and IRQ initialization */
76int acpi_ht __initdata = 1; /* enable HT */
77
78int acpi_lapic;
79int acpi_ioapic;
80int acpi_strict;
81EXPORT_SYMBOL(acpi_strict);
82
83u8 acpi_sci_flags __initdata;
84int acpi_sci_override_gsi __initdata;
85int acpi_skip_timer_override __initdata;
86int acpi_use_timer_override __initdata;
87
88#ifdef CONFIG_X86_LOCAL_APIC
89static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
90#endif
91
92#ifndef __HAVE_ARCH_CMPXCHG
93#warning ACPI uses CMPXCHG, i486 and later hardware
94#endif
95
96/* --------------------------------------------------------------------------
97 Boot-time Configuration
98 -------------------------------------------------------------------------- */
99
100/*
101 * The default interrupt routing model is PIC (8259). This gets
102 * overriden if IOAPICs are enumerated (below).
103 */
104enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
105
106#ifdef CONFIG_X86_64
107
108/* rely on all ACPI tables being in the direct mapping */
109char *__acpi_map_table(unsigned long phys_addr, unsigned long size)
110{
111 if (!phys_addr || !size)
112 return NULL;
113
114 if (phys_addr+size <= (end_pfn_map << PAGE_SHIFT) + PAGE_SIZE)
115 return __va(phys_addr);
116
117 return NULL;
118}
119
120#else
121
122/*
123 * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
124 * to map the target physical address. The problem is that set_fixmap()
125 * provides a single page, and it is possible that the page is not
126 * sufficient.
127 * By using this area, we can map up to MAX_IO_APICS pages temporarily,
128 * i.e. until the next __va_range() call.
129 *
130 * Important Safety Note: The fixed I/O APIC page numbers are *subtracted*
131 * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and
132 * count idx down while incrementing the phys address.
133 */
134char *__acpi_map_table(unsigned long phys, unsigned long size)
135{
136 unsigned long base, offset, mapped_size;
137 int idx;
138
139 if (phys + size < 8 * 1024 * 1024)
140 return __va(phys);
141
142 offset = phys & (PAGE_SIZE - 1);
143 mapped_size = PAGE_SIZE - offset;
144 set_fixmap(FIX_ACPI_END, phys);
145 base = fix_to_virt(FIX_ACPI_END);
146
147 /*
148 * Most cases can be covered by the below.
149 */
150 idx = FIX_ACPI_END;
151 while (mapped_size < size) {
152 if (--idx < FIX_ACPI_BEGIN)
153 return NULL; /* cannot handle this */
154 phys += PAGE_SIZE;
155 set_fixmap(idx, phys);
156 mapped_size += PAGE_SIZE;
157 }
158
159 return ((unsigned char *)base + offset);
160}
161#endif
162
163#ifdef CONFIG_PCI_MMCONFIG
164/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
165struct acpi_mcfg_allocation *pci_mmcfg_config;
166int pci_mmcfg_config_num;
167
168int __init acpi_parse_mcfg(struct acpi_table_header *header)
169{
170 struct acpi_table_mcfg *mcfg;
171 unsigned long i;
172 int config_size;
173
174 if (!header)
175 return -EINVAL;
176
177 mcfg = (struct acpi_table_mcfg *)header;
178
179 /* how many config structures do we have */
180 pci_mmcfg_config_num = 0;
181 i = header->length - sizeof(struct acpi_table_mcfg);
182 while (i >= sizeof(struct acpi_mcfg_allocation)) {
183 ++pci_mmcfg_config_num;
184 i -= sizeof(struct acpi_mcfg_allocation);
185 };
186 if (pci_mmcfg_config_num == 0) {
187 printk(KERN_ERR PREFIX "MMCONFIG has no entries\n");
188 return -ENODEV;
189 }
190
191 config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config);
192 pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL);
193 if (!pci_mmcfg_config) {
194 printk(KERN_WARNING PREFIX
195 "No memory for MCFG config tables\n");
196 return -ENOMEM;
197 }
198
199 memcpy(pci_mmcfg_config, &mcfg[1], config_size);
200 for (i = 0; i < pci_mmcfg_config_num; ++i) {
201 if (pci_mmcfg_config[i].address > 0xFFFFFFFF) {
202 printk(KERN_ERR PREFIX
203 "MMCONFIG not in low 4GB of memory\n");
204 kfree(pci_mmcfg_config);
205 pci_mmcfg_config_num = 0;
206 return -ENODEV;
207 }
208 }
209
210 return 0;
211}
212#endif /* CONFIG_PCI_MMCONFIG */
213
214#ifdef CONFIG_X86_LOCAL_APIC
215static int __init acpi_parse_madt(struct acpi_table_header *table)
216{
217 struct acpi_table_madt *madt = NULL;
218
219 if (!cpu_has_apic)
220 return -EINVAL;
221
222 madt = (struct acpi_table_madt *)table;
223 if (!madt) {
224 printk(KERN_WARNING PREFIX "Unable to map MADT\n");
225 return -ENODEV;
226 }
227
228 if (madt->address) {
229 acpi_lapic_addr = (u64) madt->address;
230
231 printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
232 madt->address);
233 }
234
235 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);
236
237 return 0;
238}
239
240static int __init
241acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
242{
243 struct acpi_madt_local_apic *processor = NULL;
244
245 processor = (struct acpi_madt_local_apic *)header;
246
247 if (BAD_MADT_ENTRY(processor, end))
248 return -EINVAL;
249
250 acpi_table_print_madt_entry(header);
251
252 /*
253 * We need to register disabled CPU as well to permit
254 * counting disabled CPUs. This allows us to size
255 * cpus_possible_map more accurately, to permit
256 * to not preallocating memory for all NR_CPUS
257 * when we use CPU hotplug.
258 */
259 mp_register_lapic(processor->id, /* APIC ID */
260 processor->lapic_flags & ACPI_MADT_ENABLED); /* Enabled? */
261
262 return 0;
263}
264
265static int __init
266acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
267 const unsigned long end)
268{
269 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
270
271 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
272
273 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
274 return -EINVAL;
275
276 acpi_lapic_addr = lapic_addr_ovr->address;
277
278 return 0;
279}
280
281static int __init
282acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
283{
284 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
285
286 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
287
288 if (BAD_MADT_ENTRY(lapic_nmi, end))
289 return -EINVAL;
290
291 acpi_table_print_madt_entry(header);
292
293 if (lapic_nmi->lint != 1)
294 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
295
296 return 0;
297}
298
299#endif /*CONFIG_X86_LOCAL_APIC */
300
301#ifdef CONFIG_X86_IO_APIC
302
303static int __init
304acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
305{
306 struct acpi_madt_io_apic *ioapic = NULL;
307
308 ioapic = (struct acpi_madt_io_apic *)header;
309
310 if (BAD_MADT_ENTRY(ioapic, end))
311 return -EINVAL;
312
313 acpi_table_print_madt_entry(header);
314
315 mp_register_ioapic(ioapic->id,
316 ioapic->address, ioapic->global_irq_base);
317
318 return 0;
319}
320
321/*
322 * Parse Interrupt Source Override for the ACPI SCI
323 */
324static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
325{
326 if (trigger == 0) /* compatible SCI trigger is level */
327 trigger = 3;
328
329 if (polarity == 0) /* compatible SCI polarity is low */
330 polarity = 3;
331
332 /* Command-line over-ride via acpi_sci= */
333 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
334 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
335
336 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
337 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
338
339 /*
340 * mp_config_acpi_legacy_irqs() already setup IRQs < 16
341 * If GSI is < 16, this will update its flags,
342 * else it will create a new mp_irqs[] entry.
343 */
344 mp_override_legacy_irq(gsi, polarity, trigger, gsi);
345
346 /*
347 * stash over-ride to indicate we've been here
348 * and for later update of acpi_gbl_FADT
349 */
350 acpi_sci_override_gsi = gsi;
351 return;
352}
353
354static int __init
355acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
356 const unsigned long end)
357{
358 struct acpi_madt_interrupt_override *intsrc = NULL;
359
360 intsrc = (struct acpi_madt_interrupt_override *)header;
361
362 if (BAD_MADT_ENTRY(intsrc, end))
363 return -EINVAL;
364
365 acpi_table_print_madt_entry(header);
366
367 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
368 acpi_sci_ioapic_setup(intsrc->global_irq,
369 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
370 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
371 return 0;
372 }
373
374 if (acpi_skip_timer_override &&
375 intsrc->source_irq == 0 && intsrc->global_irq == 2) {
376 printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
377 return 0;
378 }
379
380 mp_override_legacy_irq(intsrc->source_irq,
381 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
382 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
383 intsrc->global_irq);
384
385 return 0;
386}
387
388static int __init
389acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
390{
391 struct acpi_madt_nmi_source *nmi_src = NULL;
392
393 nmi_src = (struct acpi_madt_nmi_source *)header;
394
395 if (BAD_MADT_ENTRY(nmi_src, end))
396 return -EINVAL;
397
398 acpi_table_print_madt_entry(header);
399
400 /* TBD: Support nimsrc entries? */
401
402 return 0;
403}
404
405#endif /* CONFIG_X86_IO_APIC */
406
407/*
408 * acpi_pic_sci_set_trigger()
409 *
410 * use ELCR to set PIC-mode trigger type for SCI
411 *
412 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
413 * it may require Edge Trigger -- use "acpi_sci=edge"
414 *
415 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
416 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
417 * ECLR1 is IRQ's 0-7 (IRQ 0, 1, 2 must be 0)
418 * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0)
419 */
420
421void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
422{
423 unsigned int mask = 1 << irq;
424 unsigned int old, new;
425
426 /* Real old ELCR mask */
427 old = inb(0x4d0) | (inb(0x4d1) << 8);
428
429 /*
430 * If we use ACPI to set PCI irq's, then we should clear ELCR
431 * since we will set it correctly as we enable the PCI irq
432 * routing.
433 */
434 new = acpi_noirq ? old : 0;
435
436 /*
437 * Update SCI information in the ELCR, it isn't in the PCI
438 * routing tables..
439 */
440 switch (trigger) {
441 case 1: /* Edge - clear */
442 new &= ~mask;
443 break;
444 case 3: /* Level - set */
445 new |= mask;
446 break;
447 }
448
449 if (old == new)
450 return;
451
452 printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
453 outb(new, 0x4d0);
454 outb(new >> 8, 0x4d1);
455}
456
457int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
458{
459 *irq = gsi;
460 return 0;
461}
462
463/*
464 * success: return IRQ number (>=0)
465 * failure: return < 0
466 */
467int acpi_register_gsi(u32 gsi, int triggering, int polarity)
468{
469 unsigned int irq;
470 unsigned int plat_gsi = gsi;
471
472#ifdef CONFIG_PCI
473 /*
474 * Make sure all (legacy) PCI IRQs are set as level-triggered.
475 */
476 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
477 extern void eisa_set_level_irq(unsigned int irq);
478
479 if (triggering == ACPI_LEVEL_SENSITIVE)
480 eisa_set_level_irq(gsi);
481 }
482#endif
483
484#ifdef CONFIG_X86_IO_APIC
485 if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
486 plat_gsi = mp_register_gsi(gsi, triggering, polarity);
487 }
488#endif
489 acpi_gsi_to_irq(plat_gsi, &irq);
490 return irq;
491}
492
493EXPORT_SYMBOL(acpi_register_gsi);
494
495/*
496 * ACPI based hotplug support for CPU
497 */
498#ifdef CONFIG_ACPI_HOTPLUG_CPU
499int acpi_map_lsapic(acpi_handle handle, int *pcpu)
500{
501 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
502 union acpi_object *obj;
503 struct acpi_madt_local_apic *lapic;
504 cpumask_t tmp_map, new_map;
505 u8 physid;
506 int cpu;
507
508 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer)))
509 return -EINVAL;
510
511 if (!buffer.length || !buffer.pointer)
512 return -EINVAL;
513
514 obj = buffer.pointer;
515 if (obj->type != ACPI_TYPE_BUFFER ||
516 obj->buffer.length < sizeof(*lapic)) {
517 kfree(buffer.pointer);
518 return -EINVAL;
519 }
520
521 lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer;
522
523 if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC ||
524 !(lapic->lapic_flags & ACPI_MADT_ENABLED)) {
525 kfree(buffer.pointer);
526 return -EINVAL;
527 }
528
529 physid = lapic->id;
530
531 kfree(buffer.pointer);
532 buffer.length = ACPI_ALLOCATE_BUFFER;
533 buffer.pointer = NULL;
534
535 tmp_map = cpu_present_map;
536 mp_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED);
537
538 /*
539 * If mp_register_lapic successfully generates a new logical cpu
540 * number, then the following will get us exactly what was mapped
541 */
542 cpus_andnot(new_map, cpu_present_map, tmp_map);
543 if (cpus_empty(new_map)) {
544 printk ("Unable to map lapic to logical cpu number\n");
545 return -EINVAL;
546 }
547
548 cpu = first_cpu(new_map);
549
550 *pcpu = cpu;
551 return 0;
552}
553
554EXPORT_SYMBOL(acpi_map_lsapic);
555
556int acpi_unmap_lsapic(int cpu)
557{
558 x86_cpu_to_apicid[cpu] = -1;
559 cpu_clear(cpu, cpu_present_map);
560 num_processors--;
561
562 return (0);
563}
564
565EXPORT_SYMBOL(acpi_unmap_lsapic);
566#endif /* CONFIG_ACPI_HOTPLUG_CPU */
567
568int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
569{
570 /* TBD */
571 return -EINVAL;
572}
573
574EXPORT_SYMBOL(acpi_register_ioapic);
575
576int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
577{
578 /* TBD */
579 return -EINVAL;
580}
581
582EXPORT_SYMBOL(acpi_unregister_ioapic);
583
584static unsigned long __init
585acpi_scan_rsdp(unsigned long start, unsigned long length)
586{
587 unsigned long offset = 0;
588 unsigned long sig_len = sizeof("RSD PTR ") - 1;
589
590 /*
591 * Scan all 16-byte boundaries of the physical memory region for the
592 * RSDP signature.
593 */
594 for (offset = 0; offset < length; offset += 16) {
595 if (strncmp((char *)(phys_to_virt(start) + offset), "RSD PTR ", sig_len))
596 continue;
597 return (start + offset);
598 }
599
600 return 0;
601}
602
603static int __init acpi_parse_sbf(struct acpi_table_header *table)
604{
605 struct acpi_table_boot *sb;
606
607 sb = (struct acpi_table_boot *)table;
608 if (!sb) {
609 printk(KERN_WARNING PREFIX "Unable to map SBF\n");
610 return -ENODEV;
611 }
612
613 sbf_port = sb->cmos_index; /* Save CMOS port */
614
615 return 0;
616}
617
618#ifdef CONFIG_HPET_TIMER
619#include <asm/hpet.h>
620
621static struct __initdata resource *hpet_res;
622
623static int __init acpi_parse_hpet(struct acpi_table_header *table)
624{
625 struct acpi_table_hpet *hpet_tbl;
626
627 hpet_tbl = (struct acpi_table_hpet *)table;
628 if (!hpet_tbl) {
629 printk(KERN_WARNING PREFIX "Unable to map HPET\n");
630 return -ENODEV;
631 }
632
633 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
634 printk(KERN_WARNING PREFIX "HPET timers must be located in "
635 "memory.\n");
636 return -1;
637 }
638
639 hpet_address = hpet_tbl->address.address;
640 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
641 hpet_tbl->id, hpet_address);
642
643 /*
644 * Allocate and initialize the HPET firmware resource for adding into
645 * the resource tree during the lateinit timeframe.
646 */
647#define HPET_RESOURCE_NAME_SIZE 9
648 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
649
650 if (!hpet_res)
651 return 0;
652
653 memset(hpet_res, 0, sizeof(*hpet_res));
654 hpet_res->name = (void *)&hpet_res[1];
655 hpet_res->flags = IORESOURCE_MEM;
656 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
657 hpet_tbl->sequence);
658
659 hpet_res->start = hpet_address;
660 hpet_res->end = hpet_address + (1 * 1024) - 1;
661
662 return 0;
663}
664
665/*
666 * hpet_insert_resource inserts the HPET resources used into the resource
667 * tree.
668 */
669static __init int hpet_insert_resource(void)
670{
671 if (!hpet_res)
672 return 1;
673
674 return insert_resource(&iomem_resource, hpet_res);
675}
676
677late_initcall(hpet_insert_resource);
678
679#else
680#define acpi_parse_hpet NULL
681#endif
682
683static int __init acpi_parse_fadt(struct acpi_table_header *table)
684{
685
686#ifdef CONFIG_X86_PM_TIMER
687 /* detect the location of the ACPI PM Timer */
688 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
689 /* FADT rev. 2 */
690 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
691 ACPI_ADR_SPACE_SYSTEM_IO)
692 return 0;
693
694 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
695 /*
696 * "X" fields are optional extensions to the original V1.0
697 * fields, so we must selectively expand V1.0 fields if the
698 * corresponding X field is zero.
699 */
700 if (!pmtmr_ioport)
701 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
702 } else {
703 /* FADT rev. 1 */
704 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
705 }
706 if (pmtmr_ioport)
707 printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
708 pmtmr_ioport);
709#endif
710 return 0;
711}
712
713unsigned long __init acpi_find_rsdp(void)
714{
715 unsigned long rsdp_phys = 0;
716
717 if (efi_enabled) {
718 if (efi.acpi20 != EFI_INVALID_TABLE_ADDR)
719 return efi.acpi20;
720 else if (efi.acpi != EFI_INVALID_TABLE_ADDR)
721 return efi.acpi;
722 }
723 /*
724 * Scan memory looking for the RSDP signature. First search EBDA (low
725 * memory) paragraphs and then search upper memory (E0000-FFFFF).
726 */
727 rsdp_phys = acpi_scan_rsdp(0, 0x400);
728 if (!rsdp_phys)
729 rsdp_phys = acpi_scan_rsdp(0xE0000, 0x20000);
730
731 return rsdp_phys;
732}
733
734#ifdef CONFIG_X86_LOCAL_APIC
735/*
736 * Parse LAPIC entries in MADT
737 * returns 0 on success, < 0 on error
738 */
739static int __init acpi_parse_madt_lapic_entries(void)
740{
741 int count;
742
743 if (!cpu_has_apic)
744 return -ENODEV;
745
746 /*
747 * Note that the LAPIC address is obtained from the MADT (32-bit value)
748 * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value).
749 */
750
751 count =
752 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
753 acpi_parse_lapic_addr_ovr, 0);
754 if (count < 0) {
755 printk(KERN_ERR PREFIX
756 "Error parsing LAPIC address override entry\n");
757 return count;
758 }
759
760 mp_register_lapic_address(acpi_lapic_addr);
761
762 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, acpi_parse_lapic,
763 MAX_APICS);
764 if (!count) {
765 printk(KERN_ERR PREFIX "No LAPIC entries present\n");
766 /* TBD: Cleanup to allow fallback to MPS */
767 return -ENODEV;
768 } else if (count < 0) {
769 printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
770 /* TBD: Cleanup to allow fallback to MPS */
771 return count;
772 }
773
774 count =
775 acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0);
776 if (count < 0) {
777 printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
778 /* TBD: Cleanup to allow fallback to MPS */
779 return count;
780 }
781 return 0;
782}
783#endif /* CONFIG_X86_LOCAL_APIC */
784
785#ifdef CONFIG_X86_IO_APIC
786/*
787 * Parse IOAPIC related entries in MADT
788 * returns 0 on success, < 0 on error
789 */
790static int __init acpi_parse_madt_ioapic_entries(void)
791{
792 int count;
793
794 /*
795 * ACPI interpreter is required to complete interrupt setup,
796 * so if it is off, don't enumerate the io-apics with ACPI.
797 * If MPS is present, it will handle them,
798 * otherwise the system will stay in PIC mode
799 */
800 if (acpi_disabled || acpi_noirq) {
801 return -ENODEV;
802 }
803
804 if (!cpu_has_apic)
805 return -ENODEV;
806
807 /*
808 * if "noapic" boot option, don't look for IO-APICs
809 */
810 if (skip_ioapic_setup) {
811 printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
812 "due to 'noapic' option.\n");
813 return -ENODEV;
814 }
815
816 count =
817 acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
818 MAX_IO_APICS);
819 if (!count) {
820 printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
821 return -ENODEV;
822 } else if (count < 0) {
823 printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
824 return count;
825 }
826
827 count =
828 acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr,
829 NR_IRQ_VECTORS);
830 if (count < 0) {
831 printk(KERN_ERR PREFIX
832 "Error parsing interrupt source overrides entry\n");
833 /* TBD: Cleanup to allow fallback to MPS */
834 return count;
835 }
836
837 /*
838 * If BIOS did not supply an INT_SRC_OVR for the SCI
839 * pretend we got one so we can set the SCI flags.
840 */
841 if (!acpi_sci_override_gsi)
842 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
843
844 /* Fill in identity legacy mapings where no override */
845 mp_config_acpi_legacy_irqs();
846
847 count =
848 acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src,
849 NR_IRQ_VECTORS);
850 if (count < 0) {
851 printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
852 /* TBD: Cleanup to allow fallback to MPS */
853 return count;
854 }
855
856 return 0;
857}
858#else
859static inline int acpi_parse_madt_ioapic_entries(void)
860{
861 return -1;
862}
863#endif /* !CONFIG_X86_IO_APIC */
864
865static void __init acpi_process_madt(void)
866{
867#ifdef CONFIG_X86_LOCAL_APIC
868 int error;
869
870 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
871
872 /*
873 * Parse MADT LAPIC entries
874 */
875 error = acpi_parse_madt_lapic_entries();
876 if (!error) {
877 acpi_lapic = 1;
878
879#ifdef CONFIG_X86_GENERICARCH
880 generic_bigsmp_probe();
881#endif
882 /*
883 * Parse MADT IO-APIC entries
884 */
885 error = acpi_parse_madt_ioapic_entries();
886 if (!error) {
887 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
888 acpi_irq_balance_set(NULL);
889 acpi_ioapic = 1;
890
891 smp_found_config = 1;
892 setup_apic_routing();
893 }
894 }
895 if (error == -EINVAL) {
896 /*
897 * Dell Precision Workstation 410, 610 come here.
898 */
899 printk(KERN_ERR PREFIX
900 "Invalid BIOS MADT, disabling ACPI\n");
901 disable_acpi();
902 }
903 }
904#endif
905 return;
906}
907
908#ifdef __i386__
909
910static int __init disable_acpi_irq(const struct dmi_system_id *d)
911{
912 if (!acpi_force) {
913 printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
914 d->ident);
915 acpi_noirq_set();
916 }
917 return 0;
918}
919
920static int __init disable_acpi_pci(const struct dmi_system_id *d)
921{
922 if (!acpi_force) {
923 printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
924 d->ident);
925 acpi_disable_pci();
926 }
927 return 0;
928}
929
930static int __init dmi_disable_acpi(const struct dmi_system_id *d)
931{
932 if (!acpi_force) {
933 printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
934 disable_acpi();
935 } else {
936 printk(KERN_NOTICE
937 "Warning: DMI blacklist says broken, but acpi forced\n");
938 }
939 return 0;
940}
941
942/*
943 * Limit ACPI to CPU enumeration for HT
944 */
945static int __init force_acpi_ht(const struct dmi_system_id *d)
946{
947 if (!acpi_force) {
948 printk(KERN_NOTICE "%s detected: force use of acpi=ht\n",
949 d->ident);
950 disable_acpi();
951 acpi_ht = 1;
952 } else {
953 printk(KERN_NOTICE
954 "Warning: acpi=force overrules DMI blacklist: acpi=ht\n");
955 }
956 return 0;
957}
958
959/*
960 * If your system is blacklisted here, but you find that acpi=force
961 * works for you, please contact acpi-devel@sourceforge.net
962 */
963static struct dmi_system_id __initdata acpi_dmi_table[] = {
964 /*
965 * Boxes that need ACPI disabled
966 */
967 {
968 .callback = dmi_disable_acpi,
969 .ident = "IBM Thinkpad",
970 .matches = {
971 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
972 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
973 },
974 },
975
976 /*
977 * Boxes that need acpi=ht
978 */
979 {
980 .callback = force_acpi_ht,
981 .ident = "FSC Primergy T850",
982 .matches = {
983 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
984 DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
985 },
986 },
987 {
988 .callback = force_acpi_ht,
989 .ident = "HP VISUALIZE NT Workstation",
990 .matches = {
991 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
992 DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
993 },
994 },
995 {
996 .callback = force_acpi_ht,
997 .ident = "Compaq Workstation W8000",
998 .matches = {
999 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
1000 DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
1001 },
1002 },
1003 {
1004 .callback = force_acpi_ht,
1005 .ident = "ASUS P4B266",
1006 .matches = {
1007 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1008 DMI_MATCH(DMI_BOARD_NAME, "P4B266"),
1009 },
1010 },
1011 {
1012 .callback = force_acpi_ht,
1013 .ident = "ASUS P2B-DS",
1014 .matches = {
1015 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1016 DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
1017 },
1018 },
1019 {
1020 .callback = force_acpi_ht,
1021 .ident = "ASUS CUR-DLS",
1022 .matches = {
1023 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1024 DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"),
1025 },
1026 },
1027 {
1028 .callback = force_acpi_ht,
1029 .ident = "ABIT i440BX-W83977",
1030 .matches = {
1031 DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
1032 DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
1033 },
1034 },
1035 {
1036 .callback = force_acpi_ht,
1037 .ident = "IBM Bladecenter",
1038 .matches = {
1039 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1040 DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
1041 },
1042 },
1043 {
1044 .callback = force_acpi_ht,
1045 .ident = "IBM eServer xSeries 360",
1046 .matches = {
1047 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1048 DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
1049 },
1050 },
1051 {
1052 .callback = force_acpi_ht,
1053 .ident = "IBM eserver xSeries 330",
1054 .matches = {
1055 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1056 DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
1057 },
1058 },
1059 {
1060 .callback = force_acpi_ht,
1061 .ident = "IBM eserver xSeries 440",
1062 .matches = {
1063 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1064 DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
1065 },
1066 },
1067
1068 /*
1069 * Boxes that need ACPI PCI IRQ routing disabled
1070 */
1071 {
1072 .callback = disable_acpi_irq,
1073 .ident = "ASUS A7V",
1074 .matches = {
1075 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1076 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1077 /* newer BIOS, Revision 1011, does work */
1078 DMI_MATCH(DMI_BIOS_VERSION,
1079 "ASUS A7V ACPI BIOS Revision 1007"),
1080 },
1081 },
1082 {
1083 /*
1084 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1085 * for LPC bridge, which is needed for the PCI
1086 * interrupt links to work. DSDT fix is in bug 5966.
1087 * 2645, 2646 model numbers are shared with 600/600E/600X
1088 */
1089 .callback = disable_acpi_irq,
1090 .ident = "IBM Thinkpad 600 Series 2645",
1091 .matches = {
1092 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1093 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1094 },
1095 },
1096 {
1097 .callback = disable_acpi_irq,
1098 .ident = "IBM Thinkpad 600 Series 2646",
1099 .matches = {
1100 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1101 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1102 },
1103 },
1104 /*
1105 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1106 */
1107 { /* _BBN 0 bug */
1108 .callback = disable_acpi_pci,
1109 .ident = "ASUS PR-DLS",
1110 .matches = {
1111 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1112 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1113 DMI_MATCH(DMI_BIOS_VERSION,
1114 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1115 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1116 },
1117 },
1118 {
1119 .callback = disable_acpi_pci,
1120 .ident = "Acer TravelMate 36x Laptop",
1121 .matches = {
1122 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1123 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1124 },
1125 },
1126 {}
1127};
1128
1129#endif /* __i386__ */
1130
1131/*
1132 * acpi_boot_table_init() and acpi_boot_init()
1133 * called from setup_arch(), always.
1134 * 1. checksums all tables
1135 * 2. enumerates lapics
1136 * 3. enumerates io-apics
1137 *
1138 * acpi_table_init() is separate to allow reading SRAT without
1139 * other side effects.
1140 *
1141 * side effects of acpi_boot_init:
1142 * acpi_lapic = 1 if LAPIC found
1143 * acpi_ioapic = 1 if IOAPIC found
1144 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1145 * if acpi_blacklisted() acpi_disabled = 1;
1146 * acpi_irq_model=...
1147 * ...
1148 *
1149 * return value: (currently ignored)
1150 * 0: success
1151 * !0: failure
1152 */
1153
1154int __init acpi_boot_table_init(void)
1155{
1156 int error;
1157
1158#ifdef __i386__
1159 dmi_check_system(acpi_dmi_table);
1160#endif
1161
1162 /*
1163 * If acpi_disabled, bail out
1164 * One exception: acpi=ht continues far enough to enumerate LAPICs
1165 */
1166 if (acpi_disabled && !acpi_ht)
1167 return 1;
1168
1169 /*
1170 * Initialize the ACPI boot-time table parser.
1171 */
1172 error = acpi_table_init();
1173 if (error) {
1174 disable_acpi();
1175 return error;
1176 }
1177
1178 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1179
1180 /*
1181 * blacklist may disable ACPI entirely
1182 */
1183 error = acpi_blacklisted();
1184 if (error) {
1185 if (acpi_force) {
1186 printk(KERN_WARNING PREFIX "acpi=force override\n");
1187 } else {
1188 printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
1189 disable_acpi();
1190 return error;
1191 }
1192 }
1193
1194 return 0;
1195}
1196
1197int __init acpi_boot_init(void)
1198{
1199 /*
1200 * If acpi_disabled, bail out
1201 * One exception: acpi=ht continues far enough to enumerate LAPICs
1202 */
1203 if (acpi_disabled && !acpi_ht)
1204 return 1;
1205
1206 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1207
1208 /*
1209 * set sci_int and PM timer address
1210 */
1211 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1212
1213 /*
1214 * Process the Multiple APIC Description Table (MADT), if present
1215 */
1216 acpi_process_madt();
1217
1218 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1219
1220 return 0;
1221}
1222
1223static int __init parse_acpi(char *arg)
1224{
1225 if (!arg)
1226 return -EINVAL;
1227
1228 /* "acpi=off" disables both ACPI table parsing and interpreter */
1229 if (strcmp(arg, "off") == 0) {
1230 disable_acpi();
1231 }
1232 /* acpi=force to over-ride black-list */
1233 else if (strcmp(arg, "force") == 0) {
1234 acpi_force = 1;
1235 acpi_ht = 1;
1236 acpi_disabled = 0;
1237 }
1238 /* acpi=strict disables out-of-spec workarounds */
1239 else if (strcmp(arg, "strict") == 0) {
1240 acpi_strict = 1;
1241 }
1242 /* Limit ACPI just to boot-time to enable HT */
1243 else if (strcmp(arg, "ht") == 0) {
1244 if (!acpi_force)
1245 disable_acpi();
1246 acpi_ht = 1;
1247 }
1248 /* "acpi=noirq" disables ACPI interrupt routing */
1249 else if (strcmp(arg, "noirq") == 0) {
1250 acpi_noirq_set();
1251 } else {
1252 /* Core will printk when we return error. */
1253 return -EINVAL;
1254 }
1255 return 0;
1256}
1257early_param("acpi", parse_acpi);
1258
1259/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1260static int __init parse_pci(char *arg)
1261{
1262 if (arg && strcmp(arg, "noacpi") == 0)
1263 acpi_disable_pci();
1264 return 0;
1265}
1266early_param("pci", parse_pci);
1267
1268#ifdef CONFIG_X86_IO_APIC
1269static int __init parse_acpi_skip_timer_override(char *arg)
1270{
1271 acpi_skip_timer_override = 1;
1272 return 0;
1273}
1274early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
1275
1276static int __init parse_acpi_use_timer_override(char *arg)
1277{
1278 acpi_use_timer_override = 1;
1279 return 0;
1280}
1281early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1282#endif /* CONFIG_X86_IO_APIC */
1283
1284static int __init setup_acpi_sci(char *s)
1285{
1286 if (!s)
1287 return -EINVAL;
1288 if (!strcmp(s, "edge"))
1289 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1290 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1291 else if (!strcmp(s, "level"))
1292 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1293 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1294 else if (!strcmp(s, "high"))
1295 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1296 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1297 else if (!strcmp(s, "low"))
1298 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1299 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1300 else
1301 return -EINVAL;
1302 return 0;
1303}
1304early_param("acpi_sci", setup_acpi_sci);
1305
1306int __acpi_acquire_global_lock(unsigned int *lock)
1307{
1308 unsigned int old, new, val;
1309 do {
1310 old = *lock;
1311 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
1312 val = cmpxchg(lock, old, new);
1313 } while (unlikely (val != old));
1314 return (new < 3) ? -1 : 0;
1315}
1316
1317int __acpi_release_global_lock(unsigned int *lock)
1318{
1319 unsigned int old, new, val;
1320 do {
1321 old = *lock;
1322 new = old & ~0x3;
1323 val = cmpxchg(lock, old, new);
1324 } while (unlikely (val != old));
1325 return old & 0x1;
1326}
diff --git a/arch/i386/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 2d39f55d29a8..2d39f55d29a8 100644
--- a/arch/i386/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
diff --git a/arch/i386/kernel/acpi/earlyquirk.c b/arch/x86/kernel/acpi/earlyquirk_32.c
index 23f78efc577d..23f78efc577d 100644
--- a/arch/i386/kernel/acpi/earlyquirk.c
+++ b/arch/x86/kernel/acpi/earlyquirk_32.c
diff --git a/arch/i386/kernel/acpi/processor.c b/arch/x86/kernel/acpi/processor.c
index b54fded49834..b54fded49834 100644
--- a/arch/i386/kernel/acpi/processor.c
+++ b/arch/x86/kernel/acpi/processor.c
diff --git a/arch/x86/kernel/acpi/sleep_32.c b/arch/x86/kernel/acpi/sleep_32.c
new file mode 100644
index 000000000000..10699489cfe7
--- /dev/null
+++ b/arch/x86/kernel/acpi/sleep_32.c
@@ -0,0 +1,110 @@
1/*
2 * sleep.c - x86-specific ACPI sleep support.
3 *
4 * Copyright (C) 2001-2003 Patrick Mochel
5 * Copyright (C) 2001-2003 Pavel Machek <pavel@suse.cz>
6 */
7
8#include <linux/acpi.h>
9#include <linux/bootmem.h>
10#include <linux/dmi.h>
11#include <linux/cpumask.h>
12
13#include <asm/smp.h>
14
15/* address in low memory of the wakeup routine. */
16unsigned long acpi_wakeup_address = 0;
17unsigned long acpi_realmode_flags;
18extern char wakeup_start, wakeup_end;
19
20extern unsigned long FASTCALL(acpi_copy_wakeup_routine(unsigned long));
21
22/**
23 * acpi_save_state_mem - save kernel state
24 *
25 * Create an identity mapped page table and copy the wakeup routine to
26 * low memory.
27 */
28int acpi_save_state_mem(void)
29{
30 if (!acpi_wakeup_address)
31 return 1;
32 memcpy((void *)acpi_wakeup_address, &wakeup_start,
33 &wakeup_end - &wakeup_start);
34 acpi_copy_wakeup_routine(acpi_wakeup_address);
35
36 return 0;
37}
38
39/*
40 * acpi_restore_state - undo effects of acpi_save_state_mem
41 */
42void acpi_restore_state_mem(void)
43{
44}
45
46/**
47 * acpi_reserve_bootmem - do _very_ early ACPI initialisation
48 *
49 * We allocate a page from the first 1MB of memory for the wakeup
50 * routine for when we come back from a sleep state. The
51 * runtime allocator allows specification of <16MB pages, but not
52 * <1MB pages.
53 */
54void __init acpi_reserve_bootmem(void)
55{
56 if ((&wakeup_end - &wakeup_start) > PAGE_SIZE) {
57 printk(KERN_ERR
58 "ACPI: Wakeup code way too big, S3 disabled.\n");
59 return;
60 }
61
62 acpi_wakeup_address = (unsigned long)alloc_bootmem_low(PAGE_SIZE);
63 if (!acpi_wakeup_address)
64 printk(KERN_ERR "ACPI: Cannot allocate lowmem, S3 disabled.\n");
65}
66
67static int __init acpi_sleep_setup(char *str)
68{
69 while ((str != NULL) && (*str != '\0')) {
70 if (strncmp(str, "s3_bios", 7) == 0)
71 acpi_realmode_flags |= 1;
72 if (strncmp(str, "s3_mode", 7) == 0)
73 acpi_realmode_flags |= 2;
74 if (strncmp(str, "s3_beep", 7) == 0)
75 acpi_realmode_flags |= 4;
76 str = strchr(str, ',');
77 if (str != NULL)
78 str += strspn(str, ", \t");
79 }
80 return 1;
81}
82
83__setup("acpi_sleep=", acpi_sleep_setup);
84
85/* Ouch, we want to delete this. We already have better version in userspace, in
86 s2ram from suspend.sf.net project */
87static __init int reset_videomode_after_s3(const struct dmi_system_id *d)
88{
89 acpi_realmode_flags |= 2;
90 return 0;
91}
92
93static __initdata struct dmi_system_id acpisleep_dmi_table[] = {
94 { /* Reset video mode after returning from ACPI S3 sleep */
95 .callback = reset_videomode_after_s3,
96 .ident = "Toshiba Satellite 4030cdt",
97 .matches = {
98 DMI_MATCH(DMI_PRODUCT_NAME, "S4030CDT/4.3"),
99 },
100 },
101 {}
102};
103
104static int __init acpisleep_dmi_init(void)
105{
106 dmi_check_system(acpisleep_dmi_table);
107 return 0;
108}
109
110core_initcall(acpisleep_dmi_init);
diff --git a/arch/x86_64/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep_64.c
index 79475d237071..79475d237071 100644
--- a/arch/x86_64/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep_64.c
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/x86/kernel/acpi/wakeup_32.S
index f22ba8534d26..f22ba8534d26 100644
--- a/arch/i386/kernel/acpi/wakeup.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
new file mode 100644
index 000000000000..8b4357e1efe0
--- /dev/null
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -0,0 +1,456 @@
1.text
2#include <linux/linkage.h>
3#include <asm/segment.h>
4#include <asm/pgtable.h>
5#include <asm/page.h>
6#include <asm/msr.h>
7
8# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
9#
10# wakeup_code runs in real mode, and at unknown address (determined at run-time).
11# Therefore it must only use relative jumps/calls.
12#
13# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
14#
15# If physical address of wakeup_code is 0x12345, BIOS should call us with
16# cs = 0x1234, eip = 0x05
17#
18
19#define BEEP \
20 inb $97, %al; \
21 outb %al, $0x80; \
22 movb $3, %al; \
23 outb %al, $97; \
24 outb %al, $0x80; \
25 movb $-74, %al; \
26 outb %al, $67; \
27 outb %al, $0x80; \
28 movb $-119, %al; \
29 outb %al, $66; \
30 outb %al, $0x80; \
31 movb $15, %al; \
32 outb %al, $66;
33
34
35ALIGN
36 .align 16
37ENTRY(wakeup_start)
38wakeup_code:
39 wakeup_code_start = .
40 .code16
41
42# Running in *copy* of this code, somewhere in low 1MB.
43
44 movb $0xa1, %al ; outb %al, $0x80
45 cli
46 cld
47 # setup data segment
48 movw %cs, %ax
49 movw %ax, %ds # Make ds:0 point to wakeup_start
50 movw %ax, %ss
51
52 # Data segment must be set up before we can see whether to beep.
53 testl $4, realmode_flags - wakeup_code
54 jz 1f
55 BEEP
561:
57
58 # Private stack is needed for ASUS board
59 mov $(wakeup_stack - wakeup_code), %sp
60
61 pushl $0 # Kill any dangerous flags
62 popfl
63
64 movl real_magic - wakeup_code, %eax
65 cmpl $0x12345678, %eax
66 jne bogus_real_magic
67
68 call verify_cpu # Verify the cpu supports long
69 # mode
70 testl %eax, %eax
71 jnz no_longmode
72
73 testl $1, realmode_flags - wakeup_code
74 jz 1f
75 lcall $0xc000,$3
76 movw %cs, %ax
77 movw %ax, %ds # Bios might have played with that
78 movw %ax, %ss
791:
80
81 testl $2, realmode_flags - wakeup_code
82 jz 1f
83 mov video_mode - wakeup_code, %ax
84 call mode_set
851:
86
87 movw $0xb800, %ax
88 movw %ax,%fs
89 movw $0x0e00 + 'L', %fs:(0x10)
90
91 movb $0xa2, %al ; outb %al, $0x80
92
93 mov %ds, %ax # Find 32bit wakeup_code addr
94 movzx %ax, %esi # (Convert %ds:gdt to a liner ptr)
95 shll $4, %esi
96 # Fix up the vectors
97 addl %esi, wakeup_32_vector - wakeup_code
98 addl %esi, wakeup_long64_vector - wakeup_code
99 addl %esi, gdt_48a + 2 - wakeup_code # Fixup the gdt pointer
100
101 lidtl %ds:idt_48a - wakeup_code
102 lgdtl %ds:gdt_48a - wakeup_code # load gdt with whatever is
103 # appropriate
104
105 movl $1, %eax # protected mode (PE) bit
106 lmsw %ax # This is it!
107 jmp 1f
1081:
109
110 ljmpl *(wakeup_32_vector - wakeup_code)
111
112 .balign 4
113wakeup_32_vector:
114 .long wakeup_32 - wakeup_code
115 .word __KERNEL32_CS, 0
116
117 .code32
118wakeup_32:
119# Running in this code, but at low address; paging is not yet turned on.
120 movb $0xa5, %al ; outb %al, $0x80
121
122 movl $__KERNEL_DS, %eax
123 movl %eax, %ds
124
125 movw $0x0e00 + 'i', %ds:(0xb8012)
126 movb $0xa8, %al ; outb %al, $0x80;
127
128 /*
129 * Prepare for entering 64bits mode
130 */
131
132 /* Enable PAE */
133 xorl %eax, %eax
134 btsl $5, %eax
135 movl %eax, %cr4
136
137 /* Setup early boot stage 4 level pagetables */
138 leal (wakeup_level4_pgt - wakeup_code)(%esi), %eax
139 movl %eax, %cr3
140
141 /* Check if nx is implemented */
142 movl $0x80000001, %eax
143 cpuid
144 movl %edx,%edi
145
146 /* Enable Long Mode */
147 xorl %eax, %eax
148 btsl $_EFER_LME, %eax
149
150 /* No Execute supported? */
151 btl $20,%edi
152 jnc 1f
153 btsl $_EFER_NX, %eax
154
155 /* Make changes effective */
1561: movl $MSR_EFER, %ecx
157 xorl %edx, %edx
158 wrmsr
159
160 xorl %eax, %eax
161 btsl $31, %eax /* Enable paging and in turn activate Long Mode */
162 btsl $0, %eax /* Enable protected mode */
163
164 /* Make changes effective */
165 movl %eax, %cr0
166
167 /* At this point:
168 CR4.PAE must be 1
169 CS.L must be 0
170 CR3 must point to PML4
171 Next instruction must be a branch
172 This must be on identity-mapped page
173 */
174 /*
175 * At this point we're in long mode but in 32bit compatibility mode
176 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
177 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
178 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
179 */
180
181 /* Finally jump in 64bit mode */
182 ljmp *(wakeup_long64_vector - wakeup_code)(%esi)
183
184 .balign 4
185wakeup_long64_vector:
186 .long wakeup_long64 - wakeup_code
187 .word __KERNEL_CS, 0
188
189.code64
190
191 /* Hooray, we are in Long 64-bit mode (but still running in
192 * low memory)
193 */
194wakeup_long64:
195 /*
196 * We must switch to a new descriptor in kernel space for the GDT
197 * because soon the kernel won't have access anymore to the userspace
198 * addresses where we're currently running on. We have to do that here
199 * because in 32bit we couldn't load a 64bit linear address.
200 */
201 lgdt cpu_gdt_descr
202
203 movw $0x0e00 + 'n', %ds:(0xb8014)
204 movb $0xa9, %al ; outb %al, $0x80
205
206 movq saved_magic, %rax
207 movq $0x123456789abcdef0, %rdx
208 cmpq %rdx, %rax
209 jne bogus_64_magic
210
211 movw $0x0e00 + 'u', %ds:(0xb8016)
212
213 nop
214 nop
215 movw $__KERNEL_DS, %ax
216 movw %ax, %ss
217 movw %ax, %ds
218 movw %ax, %es
219 movw %ax, %fs
220 movw %ax, %gs
221 movq saved_rsp, %rsp
222
223 movw $0x0e00 + 'x', %ds:(0xb8018)
224 movq saved_rbx, %rbx
225 movq saved_rdi, %rdi
226 movq saved_rsi, %rsi
227 movq saved_rbp, %rbp
228
229 movw $0x0e00 + '!', %ds:(0xb801a)
230 movq saved_rip, %rax
231 jmp *%rax
232
233.code32
234
235 .align 64
236gdta:
237 /* Its good to keep gdt in sync with one in trampoline.S */
238 .word 0, 0, 0, 0 # dummy
239 /* ??? Why I need the accessed bit set in order for this to work? */
240 .quad 0x00cf9b000000ffff # __KERNEL32_CS
241 .quad 0x00af9b000000ffff # __KERNEL_CS
242 .quad 0x00cf93000000ffff # __KERNEL_DS
243
244idt_48a:
245 .word 0 # idt limit = 0
246 .word 0, 0 # idt base = 0L
247
248gdt_48a:
249 .word 0x800 # gdt limit=2048,
250 # 256 GDT entries
251 .long gdta - wakeup_code # gdt base (relocated in later)
252
253real_magic: .quad 0
254video_mode: .quad 0
255realmode_flags: .quad 0
256
257.code16
258bogus_real_magic:
259 movb $0xba,%al ; outb %al,$0x80
260 jmp bogus_real_magic
261
262.code64
263bogus_64_magic:
264 movb $0xb3,%al ; outb %al,$0x80
265 jmp bogus_64_magic
266
267.code16
268no_longmode:
269 movb $0xbc,%al ; outb %al,$0x80
270 jmp no_longmode
271
272#include "../verify_cpu_64.S"
273
274/* This code uses an extended set of video mode numbers. These include:
275 * Aliases for standard modes
276 * NORMAL_VGA (-1)
277 * EXTENDED_VGA (-2)
278 * ASK_VGA (-3)
279 * Video modes numbered by menu position -- NOT RECOMMENDED because of lack
280 * of compatibility when extending the table. These are between 0x00 and 0xff.
281 */
282#define VIDEO_FIRST_MENU 0x0000
283
284/* Standard BIOS video modes (BIOS number + 0x0100) */
285#define VIDEO_FIRST_BIOS 0x0100
286
287/* VESA BIOS video modes (VESA number + 0x0200) */
288#define VIDEO_FIRST_VESA 0x0200
289
290/* Video7 special modes (BIOS number + 0x0900) */
291#define VIDEO_FIRST_V7 0x0900
292
293# Setting of user mode (AX=mode ID) => CF=success
294
295# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
296# modes, we should probably compile in the video code from the boot
297# directory.
298.code16
299mode_set:
300 movw %ax, %bx
301 subb $VIDEO_FIRST_VESA>>8, %bh
302 cmpb $2, %bh
303 jb check_vesa
304
305setbad:
306 clc
307 ret
308
309check_vesa:
310 orw $0x4000, %bx # Use linear frame buffer
311 movw $0x4f02, %ax # VESA BIOS mode set call
312 int $0x10
313 cmpw $0x004f, %ax # AL=4f if implemented
314 jnz setbad # AH=0 if OK
315
316 stc
317 ret
318
319wakeup_stack_begin: # Stack grows down
320
321.org 0xff0
322wakeup_stack: # Just below end of page
323
324.org 0x1000
325ENTRY(wakeup_level4_pgt)
326 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
327 .fill 510,8,0
328 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
329 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
330
331ENTRY(wakeup_end)
332
333##
334# acpi_copy_wakeup_routine
335#
336# Copy the above routine to low memory.
337#
338# Parameters:
339# %rdi: place to copy wakeup routine to
340#
341# Returned address is location of code in low memory (past data and stack)
342#
343 .code64
344ENTRY(acpi_copy_wakeup_routine)
345 pushq %rax
346 pushq %rdx
347
348 movl saved_video_mode, %edx
349 movl %edx, video_mode - wakeup_start (,%rdi)
350 movl acpi_realmode_flags, %edx
351 movl %edx, realmode_flags - wakeup_start (,%rdi)
352 movq $0x12345678, real_magic - wakeup_start (,%rdi)
353 movq $0x123456789abcdef0, %rdx
354 movq %rdx, saved_magic
355
356 movq saved_magic, %rax
357 movq $0x123456789abcdef0, %rdx
358 cmpq %rdx, %rax
359 jne bogus_64_magic
360
361 # restore the regs we used
362 popq %rdx
363 popq %rax
364ENTRY(do_suspend_lowlevel_s4bios)
365 ret
366
367 .align 2
368 .p2align 4,,15
369.globl do_suspend_lowlevel
370 .type do_suspend_lowlevel,@function
371do_suspend_lowlevel:
372.LFB5:
373 subq $8, %rsp
374 xorl %eax, %eax
375 call save_processor_state
376
377 movq %rsp, saved_context_esp(%rip)
378 movq %rax, saved_context_eax(%rip)
379 movq %rbx, saved_context_ebx(%rip)
380 movq %rcx, saved_context_ecx(%rip)
381 movq %rdx, saved_context_edx(%rip)
382 movq %rbp, saved_context_ebp(%rip)
383 movq %rsi, saved_context_esi(%rip)
384 movq %rdi, saved_context_edi(%rip)
385 movq %r8, saved_context_r08(%rip)
386 movq %r9, saved_context_r09(%rip)
387 movq %r10, saved_context_r10(%rip)
388 movq %r11, saved_context_r11(%rip)
389 movq %r12, saved_context_r12(%rip)
390 movq %r13, saved_context_r13(%rip)
391 movq %r14, saved_context_r14(%rip)
392 movq %r15, saved_context_r15(%rip)
393 pushfq ; popq saved_context_eflags(%rip)
394
395 movq $.L97, saved_rip(%rip)
396
397 movq %rsp,saved_rsp
398 movq %rbp,saved_rbp
399 movq %rbx,saved_rbx
400 movq %rdi,saved_rdi
401 movq %rsi,saved_rsi
402
403 addq $8, %rsp
404 movl $3, %edi
405 xorl %eax, %eax
406 jmp acpi_enter_sleep_state
407.L97:
408 .p2align 4,,7
409.L99:
410 .align 4
411 movl $24, %eax
412 movw %ax, %ds
413 movq saved_context+58(%rip), %rax
414 movq %rax, %cr4
415 movq saved_context+50(%rip), %rax
416 movq %rax, %cr3
417 movq saved_context+42(%rip), %rax
418 movq %rax, %cr2
419 movq saved_context+34(%rip), %rax
420 movq %rax, %cr0
421 pushq saved_context_eflags(%rip) ; popfq
422 movq saved_context_esp(%rip), %rsp
423 movq saved_context_ebp(%rip), %rbp
424 movq saved_context_eax(%rip), %rax
425 movq saved_context_ebx(%rip), %rbx
426 movq saved_context_ecx(%rip), %rcx
427 movq saved_context_edx(%rip), %rdx
428 movq saved_context_esi(%rip), %rsi
429 movq saved_context_edi(%rip), %rdi
430 movq saved_context_r08(%rip), %r8
431 movq saved_context_r09(%rip), %r9
432 movq saved_context_r10(%rip), %r10
433 movq saved_context_r11(%rip), %r11
434 movq saved_context_r12(%rip), %r12
435 movq saved_context_r13(%rip), %r13
436 movq saved_context_r14(%rip), %r14
437 movq saved_context_r15(%rip), %r15
438
439 xorl %eax, %eax
440 addq $8, %rsp
441 jmp restore_processor_state
442.LFE5:
443.Lfe5:
444 .size do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
445
446.data
447ALIGN
448ENTRY(saved_rbp) .quad 0
449ENTRY(saved_rsi) .quad 0
450ENTRY(saved_rdi) .quad 0
451ENTRY(saved_rbx) .quad 0
452
453ENTRY(saved_rip) .quad 0
454ENTRY(saved_rsp) .quad 0
455
456ENTRY(saved_magic) .quad 0
diff --git a/arch/i386/kernel/alternative.c b/arch/x86/kernel/alternative.c
index bd72d94e713e..bd72d94e713e 100644
--- a/arch/i386/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
diff --git a/arch/x86_64/kernel/aperture.c b/arch/x86/kernel/aperture_64.c
index 8f681cae7bf7..8f681cae7bf7 100644
--- a/arch/x86_64/kernel/aperture.c
+++ b/arch/x86/kernel/aperture_64.c
diff --git a/arch/i386/kernel/apic.c b/arch/x86/kernel/apic_32.c
index 3d67ae18d762..3d67ae18d762 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/x86/kernel/apic_32.c
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86/kernel/apic_64.c
index 925758dbca0c..925758dbca0c 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86/kernel/apic_64.c
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
new file mode 100644
index 000000000000..32f2365c26ed
--- /dev/null
+++ b/arch/x86/kernel/apm_32.c
@@ -0,0 +1,2403 @@
1/* -*- linux-c -*-
2 * APM BIOS driver for Linux
3 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
4 *
5 * Initial development of this driver was funded by NEC Australia P/L
6 * and NEC Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2, or (at your option) any
11 * later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * October 1995, Rik Faith (faith@cs.unc.edu):
19 * Minor enhancements and updates (to the patch set) for 1.3.x
20 * Documentation
21 * January 1996, Rik Faith (faith@cs.unc.edu):
22 * Make /proc/apm easy to format (bump driver version)
23 * March 1996, Rik Faith (faith@cs.unc.edu):
24 * Prohibit APM BIOS calls unless apm_enabled.
25 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
26 * April 1996, Stephen Rothwell (sfr@canb.auug.org.au)
27 * Version 1.0 and 1.1
28 * May 1996, Version 1.2
29 * Feb 1998, Version 1.3
30 * Feb 1998, Version 1.4
31 * Aug 1998, Version 1.5
32 * Sep 1998, Version 1.6
33 * Nov 1998, Version 1.7
34 * Jan 1999, Version 1.8
35 * Jan 1999, Version 1.9
36 * Oct 1999, Version 1.10
37 * Nov 1999, Version 1.11
38 * Jan 2000, Version 1.12
39 * Feb 2000, Version 1.13
40 * Nov 2000, Version 1.14
41 * Oct 2001, Version 1.15
42 * Jan 2002, Version 1.16
43 * Oct 2002, Version 1.16ac
44 *
45 * History:
46 * 0.6b: first version in official kernel, Linux 1.3.46
47 * 0.7: changed /proc/apm format, Linux 1.3.58
48 * 0.8: fixed gcc 2.7.[12] compilation problems, Linux 1.3.59
49 * 0.9: only call bios if bios is present, Linux 1.3.72
50 * 1.0: use fixed device number, consolidate /proc/apm into this file,
51 * Linux 1.3.85
52 * 1.1: support user-space standby and suspend, power off after system
53 * halted, Linux 1.3.98
54 * 1.2: When resetting RTC after resume, take care so that the time
55 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
56 * <jtoth@princeton.edu>); improve interaction between
57 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
58 * 1.2a:Simple change to stop mysterious bug reports with SMP also added
59 * levels to the printk calls. APM is not defined for SMP machines.
60 * The new replacment for it is, but Linux doesn't yet support this.
61 * Alan Cox Linux 2.1.55
62 * 1.3: Set up a valid data descriptor 0x40 for buggy BIOS's
63 * 1.4: Upgraded to support APM 1.2. Integrated ThinkPad suspend patch by
64 * Dean Gaudet <dgaudet@arctic.org>.
65 * C. Scott Ananian <cananian@alumni.princeton.edu> Linux 2.1.87
66 * 1.5: Fix segment register reloading (in case of bad segments saved
67 * across BIOS call).
68 * Stephen Rothwell
69 * 1.6: Cope with complier/assembler differences.
70 * Only try to turn off the first display device.
71 * Fix OOPS at power off with no APM BIOS by Jan Echternach
72 * <echter@informatik.uni-rostock.de>
73 * Stephen Rothwell
74 * 1.7: Modify driver's cached copy of the disabled/disengaged flags
75 * to reflect current state of APM BIOS.
76 * Chris Rankin <rankinc@bellsouth.net>
77 * Reset interrupt 0 timer to 100Hz after suspend
78 * Chad Miller <cmiller@surfsouth.com>
79 * Add CONFIG_APM_IGNORE_SUSPEND_BOUNCE
80 * Richard Gooch <rgooch@atnf.csiro.au>
81 * Allow boot time disabling of APM
82 * Make boot messages far less verbose by default
83 * Make asm safer
84 * Stephen Rothwell
85 * 1.8: Add CONFIG_APM_RTC_IS_GMT
86 * Richard Gooch <rgooch@atnf.csiro.au>
87 * change APM_NOINTS to CONFIG_APM_ALLOW_INTS
88 * remove dependency on CONFIG_PROC_FS
89 * Stephen Rothwell
90 * 1.9: Fix small typo. <laslo@wodip.opole.pl>
91 * Try to cope with BIOS's that need to have all display
92 * devices blanked and not just the first one.
93 * Ross Paterson <ross@soi.city.ac.uk>
94 * Fix segment limit setting it has always been wrong as
95 * the segments needed to have byte granularity.
96 * Mark a few things __init.
97 * Add hack to allow power off of SMP systems by popular request.
98 * Use CONFIG_SMP instead of __SMP__
99 * Ignore BOUNCES for three seconds.
100 * Stephen Rothwell
101 * 1.10: Fix for Thinkpad return code.
102 * Merge 2.2 and 2.3 drivers.
103 * Remove APM dependencies in arch/i386/kernel/process.c
104 * Remove APM dependencies in drivers/char/sysrq.c
105 * Reset time across standby.
106 * Allow more inititialisation on SMP.
107 * Remove CONFIG_APM_POWER_OFF and make it boot time
108 * configurable (default on).
109 * Make debug only a boot time parameter (remove APM_DEBUG).
110 * Try to blank all devices on any error.
111 * 1.11: Remove APM dependencies in drivers/char/console.c
112 * Check nr_running to detect if we are idle (from
113 * Borislav Deianov <borislav@lix.polytechnique.fr>)
114 * Fix for bioses that don't zero the top part of the
115 * entrypoint offset (Mario Sitta <sitta@al.unipmn.it>)
116 * (reported by Panos Katsaloulis <teras@writeme.com>).
117 * Real mode power off patch (Walter Hofmann
118 * <Walter.Hofmann@physik.stud.uni-erlangen.de>).
119 * 1.12: Remove CONFIG_SMP as the compiler will optimize
120 * the code away anyway (smp_num_cpus == 1 in UP)
121 * noted by Artur Skawina <skawina@geocities.com>.
122 * Make power off under SMP work again.
123 * Fix thinko with initial engaging of BIOS.
124 * Make sure power off only happens on CPU 0
125 * (Paul "Rusty" Russell <rusty@rustcorp.com.au>).
126 * Do error notification to user mode if BIOS calls fail.
127 * Move entrypoint offset fix to ...boot/setup.S
128 * where it belongs (Cosmos <gis88564@cis.nctu.edu.tw>).
129 * Remove smp-power-off. SMP users must now specify
130 * "apm=power-off" on the kernel command line. Suggested
131 * by Jim Avera <jima@hal.com>, modified by Alan Cox
132 * <alan@lxorguk.ukuu.org.uk>.
133 * Register the /proc/apm entry even on SMP so that
134 * scripts that check for it before doing power off
135 * work (Jim Avera <jima@hal.com>).
136 * 1.13: Changes for new pm_ interfaces (Andy Henroid
137 * <andy_henroid@yahoo.com>).
138 * Modularize the code.
139 * Fix the Thinkpad (again) :-( (CONFIG_APM_IGNORE_MULTIPLE_SUSPENDS
140 * is now the way life works).
141 * Fix thinko in suspend() (wrong return).
142 * Notify drivers on critical suspend.
143 * Make kapmd absorb more idle time (Pavel Machek <pavel@suse.cz>
144 * modified by sfr).
145 * Disable interrupts while we are suspended (Andy Henroid
146 * <andy_henroid@yahoo.com> fixed by sfr).
147 * Make power off work on SMP again (Tony Hoyle
148 * <tmh@magenta-logic.com> and <zlatko@iskon.hr>) modified by sfr.
149 * Remove CONFIG_APM_SUSPEND_BOUNCE. The bounce ignore
150 * interval is now configurable.
151 * 1.14: Make connection version persist across module unload/load.
152 * Enable and engage power management earlier.
153 * Disengage power management on module unload.
154 * Changed to use the sysrq-register hack for registering the
155 * power off function called by magic sysrq based upon discussions
156 * in irc://irc.openprojects.net/#kernelnewbies
157 * (Crutcher Dunnavant <crutcher+kernel@datastacks.com>).
158 * Make CONFIG_APM_REAL_MODE_POWER_OFF run time configurable.
159 * (Arjan van de Ven <arjanv@redhat.com>) modified by sfr.
160 * Work around byte swap bug in one of the Vaio's BIOS's
161 * (Marc Boucher <marc@mbsi.ca>).
162 * Exposed the disable flag to dmi so that we can handle known
163 * broken APM (Alan Cox <alan@redhat.com>).
164 * 1.14ac: If the BIOS says "I slowed the CPU down" then don't spin
165 * calling it - instead idle. (Alan Cox <alan@redhat.com>)
166 * If an APM idle fails log it and idle sensibly
167 * 1.15: Don't queue events to clients who open the device O_WRONLY.
168 * Don't expect replies from clients who open the device O_RDONLY.
169 * (Idea from Thomas Hood)
170 * Minor waitqueue cleanups. (John Fremlin <chief@bandits.org>)
171 * 1.16: Fix idle calling. (Andreas Steinmetz <ast@domdv.de> et al.)
172 * Notify listeners of standby or suspend events before notifying
173 * drivers. Return EBUSY to ioctl() if suspend is rejected.
174 * (Russell King <rmk@arm.linux.org.uk> and Thomas Hood)
175 * Ignore first resume after we generate our own resume event
176 * after a suspend (Thomas Hood)
177 * Daemonize now gets rid of our controlling terminal (sfr).
178 * CONFIG_APM_CPU_IDLE now just affects the default value of
179 * idle_threshold (sfr).
180 * Change name of kernel apm daemon (as it no longer idles) (sfr).
181 * 1.16ac: Fix up SMP support somewhat. You can now force SMP on and we
182 * make _all_ APM calls on the CPU#0. Fix unsafe sign bug.
183 * TODO: determine if its "boot CPU" or "CPU0" we want to lock to.
184 *
185 * APM 1.1 Reference:
186 *
187 * Intel Corporation, Microsoft Corporation. Advanced Power Management
188 * (APM) BIOS Interface Specification, Revision 1.1, September 1993.
189 * Intel Order Number 241704-001. Microsoft Part Number 781-110-X01.
190 *
191 * [This document is available free from Intel by calling 800.628.8686 (fax
192 * 916.356.6100) or 800.548.4725; or via anonymous ftp from
193 * ftp://ftp.intel.com/pub/IAL/software_specs/apmv11.doc. It is also
194 * available from Microsoft by calling 206.882.8080.]
195 *
196 * APM 1.2 Reference:
197 * Intel Corporation, Microsoft Corporation. Advanced Power Management
198 * (APM) BIOS Interface Specification, Revision 1.2, February 1996.
199 *
200 * [This document is available from Microsoft at:
201 * http://www.microsoft.com/whdc/archive/amp_12.mspx]
202 */
203
204#include <linux/module.h>
205
206#include <linux/poll.h>
207#include <linux/types.h>
208#include <linux/stddef.h>
209#include <linux/timer.h>
210#include <linux/fcntl.h>
211#include <linux/slab.h>
212#include <linux/stat.h>
213#include <linux/proc_fs.h>
214#include <linux/seq_file.h>
215#include <linux/miscdevice.h>
216#include <linux/apm_bios.h>
217#include <linux/init.h>
218#include <linux/time.h>
219#include <linux/sched.h>
220#include <linux/pm.h>
221#include <linux/pm_legacy.h>
222#include <linux/capability.h>
223#include <linux/device.h>
224#include <linux/kernel.h>
225#include <linux/freezer.h>
226#include <linux/smp.h>
227#include <linux/dmi.h>
228#include <linux/suspend.h>
229#include <linux/kthread.h>
230
231#include <asm/system.h>
232#include <asm/uaccess.h>
233#include <asm/desc.h>
234#include <asm/i8253.h>
235#include <asm/paravirt.h>
236#include <asm/reboot.h>
237
238#include "io_ports.h"
239
240#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
241extern int (*console_blank_hook)(int);
242#endif
243
244/*
245 * The apm_bios device is one of the misc char devices.
246 * This is its minor number.
247 */
248#define APM_MINOR_DEV 134
249
250/*
251 * See Documentation/Config.help for the configuration options.
252 *
253 * Various options can be changed at boot time as follows:
254 * (We allow underscores for compatibility with the modules code)
255 * apm=on/off enable/disable APM
256 * [no-]allow[-_]ints allow interrupts during BIOS calls
257 * [no-]broken[-_]psr BIOS has a broken GetPowerStatus call
258 * [no-]realmode[-_]power[-_]off switch to real mode before
259 * powering off
260 * [no-]debug log some debugging messages
261 * [no-]power[-_]off power off on shutdown
262 * [no-]smp Use apm even on an SMP box
263 * bounce[-_]interval=<n> number of ticks to ignore suspend
264 * bounces
265 * idle[-_]threshold=<n> System idle percentage above which to
266 * make APM BIOS idle calls. Set it to
267 * 100 to disable.
268 * idle[-_]period=<n> Period (in 1/100s of a second) over
269 * which the idle percentage is
270 * calculated.
271 */
272
273/* KNOWN PROBLEM MACHINES:
274 *
275 * U: TI 4000M TravelMate: BIOS is *NOT* APM compliant
276 * [Confirmed by TI representative]
277 * ?: ACER 486DX4/75: uses dseg 0040, in violation of APM specification
278 * [Confirmed by BIOS disassembly]
279 * [This may work now ...]
280 * P: Toshiba 1950S: battery life information only gets updated after resume
281 * P: Midwest Micro Soundbook Elite DX2/66 monochrome: screen blanking
282 * broken in BIOS [Reported by Garst R. Reese <reese@isn.net>]
283 * ?: AcerNote-950: oops on reading /proc/apm - workaround is a WIP
284 * Neale Banks <neale@lowendale.com.au> December 2000
285 *
286 * Legend: U = unusable with APM patches
287 * P = partially usable with APM patches
288 */
289
290/*
291 * Define as 1 to make the driver always call the APM BIOS busy
292 * routine even if the clock was not reported as slowed by the
293 * idle routine. Otherwise, define as 0.
294 */
295#define ALWAYS_CALL_BUSY 1
296
297/*
298 * Define to make the APM BIOS calls zero all data segment registers (so
299 * that an incorrect BIOS implementation will cause a kernel panic if it
300 * tries to write to arbitrary memory).
301 */
302#define APM_ZERO_SEGS
303
304#include "apm.h"
305
306/*
307 * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend.
308 * This patched by Chad Miller <cmiller@surfsouth.com>, original code by
309 * David Chen <chen@ctpa04.mit.edu>
310 */
311#undef INIT_TIMER_AFTER_SUSPEND
312
313#ifdef INIT_TIMER_AFTER_SUSPEND
314#include <linux/timex.h>
315#include <asm/io.h>
316#include <linux/delay.h>
317#endif
318
319/*
320 * Need to poll the APM BIOS every second
321 */
322#define APM_CHECK_TIMEOUT (HZ)
323
324/*
325 * Ignore suspend events for this amount of time after a resume
326 */
327#define DEFAULT_BOUNCE_INTERVAL (3 * HZ)
328
329/*
330 * Maximum number of events stored
331 */
332#define APM_MAX_EVENTS 20
333
334/*
335 * The per-file APM data
336 */
337struct apm_user {
338 int magic;
339 struct apm_user * next;
340 unsigned int suser: 1;
341 unsigned int writer: 1;
342 unsigned int reader: 1;
343 unsigned int suspend_wait: 1;
344 int suspend_result;
345 int suspends_pending;
346 int standbys_pending;
347 int suspends_read;
348 int standbys_read;
349 int event_head;
350 int event_tail;
351 apm_event_t events[APM_MAX_EVENTS];
352};
353
354/*
355 * The magic number in apm_user
356 */
357#define APM_BIOS_MAGIC 0x4101
358
359/*
360 * idle percentage above which bios idle calls are done
361 */
362#ifdef CONFIG_APM_CPU_IDLE
363#define DEFAULT_IDLE_THRESHOLD 95
364#else
365#define DEFAULT_IDLE_THRESHOLD 100
366#endif
367#define DEFAULT_IDLE_PERIOD (100 / 3)
368
369/*
370 * Local variables
371 */
372static struct {
373 unsigned long offset;
374 unsigned short segment;
375} apm_bios_entry;
376static int clock_slowed;
377static int idle_threshold __read_mostly = DEFAULT_IDLE_THRESHOLD;
378static int idle_period __read_mostly = DEFAULT_IDLE_PERIOD;
379static int set_pm_idle;
380static int suspends_pending;
381static int standbys_pending;
382static int ignore_sys_suspend;
383static int ignore_normal_resume;
384static int bounce_interval __read_mostly = DEFAULT_BOUNCE_INTERVAL;
385
386static int debug __read_mostly;
387static int smp __read_mostly;
388static int apm_disabled = -1;
389#ifdef CONFIG_SMP
390static int power_off;
391#else
392static int power_off = 1;
393#endif
394#ifdef CONFIG_APM_REAL_MODE_POWER_OFF
395static int realmode_power_off = 1;
396#else
397static int realmode_power_off;
398#endif
399#ifdef CONFIG_APM_ALLOW_INTS
400static int allow_ints = 1;
401#else
402static int allow_ints;
403#endif
404static int broken_psr;
405
406static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
407static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
408static struct apm_user * user_list;
409static DEFINE_SPINLOCK(user_list_lock);
410static const struct desc_struct bad_bios_desc = { 0, 0x00409200 };
411
412static const char driver_version[] = "1.16ac"; /* no spaces */
413
414static struct task_struct *kapmd_task;
415
416/*
417 * APM event names taken from the APM 1.2 specification. These are
418 * the message codes that the BIOS uses to tell us about events
419 */
420static const char * const apm_event_name[] = {
421 "system standby",
422 "system suspend",
423 "normal resume",
424 "critical resume",
425 "low battery",
426 "power status change",
427 "update time",
428 "critical suspend",
429 "user standby",
430 "user suspend",
431 "system standby resume",
432 "capabilities change"
433};
434#define NR_APM_EVENT_NAME ARRAY_SIZE(apm_event_name)
435
436typedef struct lookup_t {
437 int key;
438 char * msg;
439} lookup_t;
440
441/*
442 * The BIOS returns a set of standard error codes in AX when the
443 * carry flag is set.
444 */
445
446static const lookup_t error_table[] = {
447/* N/A { APM_SUCCESS, "Operation succeeded" }, */
448 { APM_DISABLED, "Power management disabled" },
449 { APM_CONNECTED, "Real mode interface already connected" },
450 { APM_NOT_CONNECTED, "Interface not connected" },
451 { APM_16_CONNECTED, "16 bit interface already connected" },
452/* N/A { APM_16_UNSUPPORTED, "16 bit interface not supported" }, */
453 { APM_32_CONNECTED, "32 bit interface already connected" },
454 { APM_32_UNSUPPORTED, "32 bit interface not supported" },
455 { APM_BAD_DEVICE, "Unrecognized device ID" },
456 { APM_BAD_PARAM, "Parameter out of range" },
457 { APM_NOT_ENGAGED, "Interface not engaged" },
458 { APM_BAD_FUNCTION, "Function not supported" },
459 { APM_RESUME_DISABLED, "Resume timer disabled" },
460 { APM_BAD_STATE, "Unable to enter requested state" },
461/* N/A { APM_NO_EVENTS, "No events pending" }, */
462 { APM_NO_ERROR, "BIOS did not set a return code" },
463 { APM_NOT_PRESENT, "No APM present" }
464};
465#define ERROR_COUNT ARRAY_SIZE(error_table)
466
467/**
468 * apm_error - display an APM error
469 * @str: information string
470 * @err: APM BIOS return code
471 *
472 * Write a meaningful log entry to the kernel log in the event of
473 * an APM error.
474 */
475
476static void apm_error(char *str, int err)
477{
478 int i;
479
480 for (i = 0; i < ERROR_COUNT; i++)
481 if (error_table[i].key == err) break;
482 if (i < ERROR_COUNT)
483 printk(KERN_NOTICE "apm: %s: %s\n", str, error_table[i].msg);
484 else
485 printk(KERN_NOTICE "apm: %s: unknown error code %#2.2x\n",
486 str, err);
487}
488
489/*
490 * Lock APM functionality to physical CPU 0
491 */
492
493#ifdef CONFIG_SMP
494
495static cpumask_t apm_save_cpus(void)
496{
497 cpumask_t x = current->cpus_allowed;
498 /* Some bioses don't like being called from CPU != 0 */
499 set_cpus_allowed(current, cpumask_of_cpu(0));
500 BUG_ON(smp_processor_id() != 0);
501 return x;
502}
503
504static inline void apm_restore_cpus(cpumask_t mask)
505{
506 set_cpus_allowed(current, mask);
507}
508
509#else
510
511/*
512 * No CPU lockdown needed on a uniprocessor
513 */
514
515#define apm_save_cpus() (current->cpus_allowed)
516#define apm_restore_cpus(x) (void)(x)
517
518#endif
519
520/*
521 * These are the actual BIOS calls. Depending on APM_ZERO_SEGS and
522 * apm_info.allow_ints, we are being really paranoid here! Not only
523 * are interrupts disabled, but all the segment registers (except SS)
524 * are saved and zeroed this means that if the BIOS tries to reference
525 * any data without explicitly loading the segment registers, the kernel
526 * will fault immediately rather than have some unforeseen circumstances
527 * for the rest of the kernel. And it will be very obvious! :-) Doing
528 * this depends on CS referring to the same physical memory as DS so that
529 * DS can be zeroed before the call. Unfortunately, we can't do anything
530 * about the stack segment/pointer. Also, we tell the compiler that
531 * everything could change.
532 *
533 * Also, we KNOW that for the non error case of apm_bios_call, there
534 * is no useful data returned in the low order 8 bits of eax.
535 */
536
537static inline unsigned long __apm_irq_save(void)
538{
539 unsigned long flags;
540 local_save_flags(flags);
541 if (apm_info.allow_ints) {
542 if (irqs_disabled_flags(flags))
543 local_irq_enable();
544 } else
545 local_irq_disable();
546
547 return flags;
548}
549
550#define apm_irq_save(flags) \
551 do { flags = __apm_irq_save(); } while (0)
552
553static inline void apm_irq_restore(unsigned long flags)
554{
555 if (irqs_disabled_flags(flags))
556 local_irq_disable();
557 else if (irqs_disabled())
558 local_irq_enable();
559}
560
561#ifdef APM_ZERO_SEGS
562# define APM_DECL_SEGS \
563 unsigned int saved_fs; unsigned int saved_gs;
564# define APM_DO_SAVE_SEGS \
565 savesegment(fs, saved_fs); savesegment(gs, saved_gs)
566# define APM_DO_RESTORE_SEGS \
567 loadsegment(fs, saved_fs); loadsegment(gs, saved_gs)
568#else
569# define APM_DECL_SEGS
570# define APM_DO_SAVE_SEGS
571# define APM_DO_RESTORE_SEGS
572#endif
573
574/**
575 * apm_bios_call - Make an APM BIOS 32bit call
576 * @func: APM function to execute
577 * @ebx_in: EBX register for call entry
578 * @ecx_in: ECX register for call entry
579 * @eax: EAX register return
580 * @ebx: EBX register return
581 * @ecx: ECX register return
582 * @edx: EDX register return
583 * @esi: ESI register return
584 *
585 * Make an APM call using the 32bit protected mode interface. The
586 * caller is responsible for knowing if APM BIOS is configured and
587 * enabled. This call can disable interrupts for a long period of
588 * time on some laptops. The return value is in AH and the carry
589 * flag is loaded into AL. If there is an error, then the error
590 * code is returned in AH (bits 8-15 of eax) and this function
591 * returns non-zero.
592 */
593
594static u8 apm_bios_call(u32 func, u32 ebx_in, u32 ecx_in,
595 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, u32 *esi)
596{
597 APM_DECL_SEGS
598 unsigned long flags;
599 cpumask_t cpus;
600 int cpu;
601 struct desc_struct save_desc_40;
602 struct desc_struct *gdt;
603
604 cpus = apm_save_cpus();
605
606 cpu = get_cpu();
607 gdt = get_cpu_gdt_table(cpu);
608 save_desc_40 = gdt[0x40 / 8];
609 gdt[0x40 / 8] = bad_bios_desc;
610
611 apm_irq_save(flags);
612 APM_DO_SAVE_SEGS;
613 apm_bios_call_asm(func, ebx_in, ecx_in, eax, ebx, ecx, edx, esi);
614 APM_DO_RESTORE_SEGS;
615 apm_irq_restore(flags);
616 gdt[0x40 / 8] = save_desc_40;
617 put_cpu();
618 apm_restore_cpus(cpus);
619
620 return *eax & 0xff;
621}
622
623/**
624 * apm_bios_call_simple - make a simple APM BIOS 32bit call
625 * @func: APM function to invoke
626 * @ebx_in: EBX register value for BIOS call
627 * @ecx_in: ECX register value for BIOS call
628 * @eax: EAX register on return from the BIOS call
629 *
630 * Make a BIOS call that returns one value only, or just status.
631 * If there is an error, then the error code is returned in AH
632 * (bits 8-15 of eax) and this function returns non-zero. This is
633 * used for simpler BIOS operations. This call may hold interrupts
634 * off for a long time on some laptops.
635 */
636
637static u8 apm_bios_call_simple(u32 func, u32 ebx_in, u32 ecx_in, u32 *eax)
638{
639 u8 error;
640 APM_DECL_SEGS
641 unsigned long flags;
642 cpumask_t cpus;
643 int cpu;
644 struct desc_struct save_desc_40;
645 struct desc_struct *gdt;
646
647 cpus = apm_save_cpus();
648
649 cpu = get_cpu();
650 gdt = get_cpu_gdt_table(cpu);
651 save_desc_40 = gdt[0x40 / 8];
652 gdt[0x40 / 8] = bad_bios_desc;
653
654 apm_irq_save(flags);
655 APM_DO_SAVE_SEGS;
656 error = apm_bios_call_simple_asm(func, ebx_in, ecx_in, eax);
657 APM_DO_RESTORE_SEGS;
658 apm_irq_restore(flags);
659 gdt[0x40 / 8] = save_desc_40;
660 put_cpu();
661 apm_restore_cpus(cpus);
662 return error;
663}
664
665/**
666 * apm_driver_version - APM driver version
667 * @val: loaded with the APM version on return
668 *
669 * Retrieve the APM version supported by the BIOS. This is only
670 * supported for APM 1.1 or higher. An error indicates APM 1.0 is
671 * probably present.
672 *
673 * On entry val should point to a value indicating the APM driver
674 * version with the high byte being the major and the low byte the
675 * minor number both in BCD
676 *
677 * On return it will hold the BIOS revision supported in the
678 * same format.
679 */
680
681static int apm_driver_version(u_short *val)
682{
683 u32 eax;
684
685 if (apm_bios_call_simple(APM_FUNC_VERSION, 0, *val, &eax))
686 return (eax >> 8) & 0xff;
687 *val = eax;
688 return APM_SUCCESS;
689}
690
691/**
692 * apm_get_event - get an APM event from the BIOS
693 * @event: pointer to the event
694 * @info: point to the event information
695 *
696 * The APM BIOS provides a polled information for event
697 * reporting. The BIOS expects to be polled at least every second
698 * when events are pending. When a message is found the caller should
699 * poll until no more messages are present. However, this causes
700 * problems on some laptops where a suspend event notification is
701 * not cleared until it is acknowledged.
702 *
703 * Additional information is returned in the info pointer, providing
704 * that APM 1.2 is in use. If no messges are pending the value 0x80
705 * is returned (No power management events pending).
706 */
707
708static int apm_get_event(apm_event_t *event, apm_eventinfo_t *info)
709{
710 u32 eax;
711 u32 ebx;
712 u32 ecx;
713 u32 dummy;
714
715 if (apm_bios_call(APM_FUNC_GET_EVENT, 0, 0, &eax, &ebx, &ecx,
716 &dummy, &dummy))
717 return (eax >> 8) & 0xff;
718 *event = ebx;
719 if (apm_info.connection_version < 0x0102)
720 *info = ~0; /* indicate info not valid */
721 else
722 *info = ecx;
723 return APM_SUCCESS;
724}
725
726/**
727 * set_power_state - set the power management state
728 * @what: which items to transition
729 * @state: state to transition to
730 *
731 * Request an APM change of state for one or more system devices. The
732 * processor state must be transitioned last of all. what holds the
733 * class of device in the upper byte and the device number (0xFF for
734 * all) for the object to be transitioned.
735 *
736 * The state holds the state to transition to, which may in fact
737 * be an acceptance of a BIOS requested state change.
738 */
739
740static int set_power_state(u_short what, u_short state)
741{
742 u32 eax;
743
744 if (apm_bios_call_simple(APM_FUNC_SET_STATE, what, state, &eax))
745 return (eax >> 8) & 0xff;
746 return APM_SUCCESS;
747}
748
749/**
750 * set_system_power_state - set system wide power state
751 * @state: which state to enter
752 *
753 * Transition the entire system into a new APM power state.
754 */
755
756static int set_system_power_state(u_short state)
757{
758 return set_power_state(APM_DEVICE_ALL, state);
759}
760
761/**
762 * apm_do_idle - perform power saving
763 *
764 * This function notifies the BIOS that the processor is (in the view
765 * of the OS) idle. It returns -1 in the event that the BIOS refuses
766 * to handle the idle request. On a success the function returns 1
767 * if the BIOS did clock slowing or 0 otherwise.
768 */
769
770static int apm_do_idle(void)
771{
772 u32 eax;
773 u8 ret = 0;
774 int idled = 0;
775 int polling;
776
777 polling = !!(current_thread_info()->status & TS_POLLING);
778 if (polling) {
779 current_thread_info()->status &= ~TS_POLLING;
780 /*
781 * TS_POLLING-cleared state must be visible before we
782 * test NEED_RESCHED:
783 */
784 smp_mb();
785 }
786 if (!need_resched()) {
787 idled = 1;
788 ret = apm_bios_call_simple(APM_FUNC_IDLE, 0, 0, &eax);
789 }
790 if (polling)
791 current_thread_info()->status |= TS_POLLING;
792
793 if (!idled)
794 return 0;
795
796 if (ret) {
797 static unsigned long t;
798
799 /* This always fails on some SMP boards running UP kernels.
800 * Only report the failure the first 5 times.
801 */
802 if (++t < 5)
803 {
804 printk(KERN_DEBUG "apm_do_idle failed (%d)\n",
805 (eax >> 8) & 0xff);
806 t = jiffies;
807 }
808 return -1;
809 }
810 clock_slowed = (apm_info.bios.flags & APM_IDLE_SLOWS_CLOCK) != 0;
811 return clock_slowed;
812}
813
814/**
815 * apm_do_busy - inform the BIOS the CPU is busy
816 *
817 * Request that the BIOS brings the CPU back to full performance.
818 */
819
820static void apm_do_busy(void)
821{
822 u32 dummy;
823
824 if (clock_slowed || ALWAYS_CALL_BUSY) {
825 (void) apm_bios_call_simple(APM_FUNC_BUSY, 0, 0, &dummy);
826 clock_slowed = 0;
827 }
828}
829
830/*
831 * If no process has really been interested in
832 * the CPU for some time, we want to call BIOS
833 * power management - we probably want
834 * to conserve power.
835 */
836#define IDLE_CALC_LIMIT (HZ * 100)
837#define IDLE_LEAKY_MAX 16
838
839static void (*original_pm_idle)(void) __read_mostly;
840
841/**
842 * apm_cpu_idle - cpu idling for APM capable Linux
843 *
844 * This is the idling function the kernel executes when APM is available. It
845 * tries to do BIOS powermanagement based on the average system idle time.
846 * Furthermore it calls the system default idle routine.
847 */
848
849static void apm_cpu_idle(void)
850{
851 static int use_apm_idle; /* = 0 */
852 static unsigned int last_jiffies; /* = 0 */
853 static unsigned int last_stime; /* = 0 */
854
855 int apm_idle_done = 0;
856 unsigned int jiffies_since_last_check = jiffies - last_jiffies;
857 unsigned int bucket;
858
859recalc:
860 if (jiffies_since_last_check > IDLE_CALC_LIMIT) {
861 use_apm_idle = 0;
862 last_jiffies = jiffies;
863 last_stime = current->stime;
864 } else if (jiffies_since_last_check > idle_period) {
865 unsigned int idle_percentage;
866
867 idle_percentage = current->stime - last_stime;
868 idle_percentage *= 100;
869 idle_percentage /= jiffies_since_last_check;
870 use_apm_idle = (idle_percentage > idle_threshold);
871 if (apm_info.forbid_idle)
872 use_apm_idle = 0;
873 last_jiffies = jiffies;
874 last_stime = current->stime;
875 }
876
877 bucket = IDLE_LEAKY_MAX;
878
879 while (!need_resched()) {
880 if (use_apm_idle) {
881 unsigned int t;
882
883 t = jiffies;
884 switch (apm_do_idle()) {
885 case 0: apm_idle_done = 1;
886 if (t != jiffies) {
887 if (bucket) {
888 bucket = IDLE_LEAKY_MAX;
889 continue;
890 }
891 } else if (bucket) {
892 bucket--;
893 continue;
894 }
895 break;
896 case 1: apm_idle_done = 1;
897 break;
898 default: /* BIOS refused */
899 break;
900 }
901 }
902 if (original_pm_idle)
903 original_pm_idle();
904 else
905 default_idle();
906 jiffies_since_last_check = jiffies - last_jiffies;
907 if (jiffies_since_last_check > idle_period)
908 goto recalc;
909 }
910
911 if (apm_idle_done)
912 apm_do_busy();
913}
914
915/**
916 * apm_power_off - ask the BIOS to power off
917 *
918 * Handle the power off sequence. This is the one piece of code we
919 * will execute even on SMP machines. In order to deal with BIOS
920 * bugs we support real mode APM BIOS power off calls. We also make
921 * the SMP call on CPU0 as some systems will only honour this call
922 * on their first cpu.
923 */
924
925static void apm_power_off(void)
926{
927 unsigned char po_bios_call[] = {
928 0xb8, 0x00, 0x10, /* movw $0x1000,ax */
929 0x8e, 0xd0, /* movw ax,ss */
930 0xbc, 0x00, 0xf0, /* movw $0xf000,sp */
931 0xb8, 0x07, 0x53, /* movw $0x5307,ax */
932 0xbb, 0x01, 0x00, /* movw $0x0001,bx */
933 0xb9, 0x03, 0x00, /* movw $0x0003,cx */
934 0xcd, 0x15 /* int $0x15 */
935 };
936
937 /* Some bioses don't like being called from CPU != 0 */
938 if (apm_info.realmode_power_off)
939 {
940 (void)apm_save_cpus();
941 machine_real_restart(po_bios_call, sizeof(po_bios_call));
942 }
943 else
944 (void) set_system_power_state(APM_STATE_OFF);
945}
946
947#ifdef CONFIG_APM_DO_ENABLE
948
949/**
950 * apm_enable_power_management - enable BIOS APM power management
951 * @enable: enable yes/no
952 *
953 * Enable or disable the APM BIOS power services.
954 */
955
956static int apm_enable_power_management(int enable)
957{
958 u32 eax;
959
960 if ((enable == 0) && (apm_info.bios.flags & APM_BIOS_DISENGAGED))
961 return APM_NOT_ENGAGED;
962 if (apm_bios_call_simple(APM_FUNC_ENABLE_PM, APM_DEVICE_BALL,
963 enable, &eax))
964 return (eax >> 8) & 0xff;
965 if (enable)
966 apm_info.bios.flags &= ~APM_BIOS_DISABLED;
967 else
968 apm_info.bios.flags |= APM_BIOS_DISABLED;
969 return APM_SUCCESS;
970}
971#endif
972
973/**
974 * apm_get_power_status - get current power state
975 * @status: returned status
976 * @bat: battery info
977 * @life: estimated life
978 *
979 * Obtain the current power status from the APM BIOS. We return a
980 * status which gives the rough battery status, and current power
981 * source. The bat value returned give an estimate as a percentage
982 * of life and a status value for the battery. The estimated life
983 * if reported is a lifetime in secodnds/minutes at current powwer
984 * consumption.
985 */
986
987static int apm_get_power_status(u_short *status, u_short *bat, u_short *life)
988{
989 u32 eax;
990 u32 ebx;
991 u32 ecx;
992 u32 edx;
993 u32 dummy;
994
995 if (apm_info.get_power_status_broken)
996 return APM_32_UNSUPPORTED;
997 if (apm_bios_call(APM_FUNC_GET_STATUS, APM_DEVICE_ALL, 0,
998 &eax, &ebx, &ecx, &edx, &dummy))
999 return (eax >> 8) & 0xff;
1000 *status = ebx;
1001 *bat = ecx;
1002 if (apm_info.get_power_status_swabinminutes) {
1003 *life = swab16((u16)edx);
1004 *life |= 0x8000;
1005 } else
1006 *life = edx;
1007 return APM_SUCCESS;
1008}
1009
1010#if 0
1011static int apm_get_battery_status(u_short which, u_short *status,
1012 u_short *bat, u_short *life, u_short *nbat)
1013{
1014 u32 eax;
1015 u32 ebx;
1016 u32 ecx;
1017 u32 edx;
1018 u32 esi;
1019
1020 if (apm_info.connection_version < 0x0102) {
1021 /* pretend we only have one battery. */
1022 if (which != 1)
1023 return APM_BAD_DEVICE;
1024 *nbat = 1;
1025 return apm_get_power_status(status, bat, life);
1026 }
1027
1028 if (apm_bios_call(APM_FUNC_GET_STATUS, (0x8000 | (which)), 0, &eax,
1029 &ebx, &ecx, &edx, &esi))
1030 return (eax >> 8) & 0xff;
1031 *status = ebx;
1032 *bat = ecx;
1033 *life = edx;
1034 *nbat = esi;
1035 return APM_SUCCESS;
1036}
1037#endif
1038
1039/**
1040 * apm_engage_power_management - enable PM on a device
1041 * @device: identity of device
1042 * @enable: on/off
1043 *
1044 * Activate or deactive power management on either a specific device
1045 * or the entire system (%APM_DEVICE_ALL).
1046 */
1047
1048static int apm_engage_power_management(u_short device, int enable)
1049{
1050 u32 eax;
1051
1052 if ((enable == 0) && (device == APM_DEVICE_ALL)
1053 && (apm_info.bios.flags & APM_BIOS_DISABLED))
1054 return APM_DISABLED;
1055 if (apm_bios_call_simple(APM_FUNC_ENGAGE_PM, device, enable, &eax))
1056 return (eax >> 8) & 0xff;
1057 if (device == APM_DEVICE_ALL) {
1058 if (enable)
1059 apm_info.bios.flags &= ~APM_BIOS_DISENGAGED;
1060 else
1061 apm_info.bios.flags |= APM_BIOS_DISENGAGED;
1062 }
1063 return APM_SUCCESS;
1064}
1065
1066#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1067
1068/**
1069 * apm_console_blank - blank the display
1070 * @blank: on/off
1071 *
1072 * Attempt to blank the console, firstly by blanking just video device
1073 * zero, and if that fails (some BIOSes don't support it) then it blanks
1074 * all video devices. Typically the BIOS will do laptop backlight and
1075 * monitor powerdown for us.
1076 */
1077
1078static int apm_console_blank(int blank)
1079{
1080 int error = APM_NOT_ENGAGED; /* silence gcc */
1081 int i;
1082 u_short state;
1083 static const u_short dev[3] = { 0x100, 0x1FF, 0x101 };
1084
1085 state = blank ? APM_STATE_STANDBY : APM_STATE_READY;
1086
1087 for (i = 0; i < ARRAY_SIZE(dev); i++) {
1088 error = set_power_state(dev[i], state);
1089
1090 if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
1091 return 1;
1092
1093 if (error == APM_NOT_ENGAGED)
1094 break;
1095 }
1096
1097 if (error == APM_NOT_ENGAGED) {
1098 static int tried;
1099 int eng_error;
1100 if (tried++ == 0) {
1101 eng_error = apm_engage_power_management(APM_DEVICE_ALL, 1);
1102 if (eng_error) {
1103 apm_error("set display", error);
1104 apm_error("engage interface", eng_error);
1105 return 0;
1106 } else
1107 return apm_console_blank(blank);
1108 }
1109 }
1110 apm_error("set display", error);
1111 return 0;
1112}
1113#endif
1114
1115static int queue_empty(struct apm_user *as)
1116{
1117 return as->event_head == as->event_tail;
1118}
1119
1120static apm_event_t get_queued_event(struct apm_user *as)
1121{
1122 if (++as->event_tail >= APM_MAX_EVENTS)
1123 as->event_tail = 0;
1124 return as->events[as->event_tail];
1125}
1126
1127static void queue_event(apm_event_t event, struct apm_user *sender)
1128{
1129 struct apm_user * as;
1130
1131 spin_lock(&user_list_lock);
1132 if (user_list == NULL)
1133 goto out;
1134 for (as = user_list; as != NULL; as = as->next) {
1135 if ((as == sender) || (!as->reader))
1136 continue;
1137 if (++as->event_head >= APM_MAX_EVENTS)
1138 as->event_head = 0;
1139
1140 if (as->event_head == as->event_tail) {
1141 static int notified;
1142
1143 if (notified++ == 0)
1144 printk(KERN_ERR "apm: an event queue overflowed\n");
1145 if (++as->event_tail >= APM_MAX_EVENTS)
1146 as->event_tail = 0;
1147 }
1148 as->events[as->event_head] = event;
1149 if ((!as->suser) || (!as->writer))
1150 continue;
1151 switch (event) {
1152 case APM_SYS_SUSPEND:
1153 case APM_USER_SUSPEND:
1154 as->suspends_pending++;
1155 suspends_pending++;
1156 break;
1157
1158 case APM_SYS_STANDBY:
1159 case APM_USER_STANDBY:
1160 as->standbys_pending++;
1161 standbys_pending++;
1162 break;
1163 }
1164 }
1165 wake_up_interruptible(&apm_waitqueue);
1166out:
1167 spin_unlock(&user_list_lock);
1168}
1169
1170static void reinit_timer(void)
1171{
1172#ifdef INIT_TIMER_AFTER_SUSPEND
1173 unsigned long flags;
1174
1175 spin_lock_irqsave(&i8253_lock, flags);
1176 /* set the clock to HZ */
1177 outb_p(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */
1178 udelay(10);
1179 outb_p(LATCH & 0xff, PIT_CH0); /* LSB */
1180 udelay(10);
1181 outb(LATCH >> 8, PIT_CH0); /* MSB */
1182 udelay(10);
1183 spin_unlock_irqrestore(&i8253_lock, flags);
1184#endif
1185}
1186
1187static int suspend(int vetoable)
1188{
1189 int err;
1190 struct apm_user *as;
1191
1192 if (pm_send_all(PM_SUSPEND, (void *)3)) {
1193 /* Vetoed */
1194 if (vetoable) {
1195 if (apm_info.connection_version > 0x100)
1196 set_system_power_state(APM_STATE_REJECT);
1197 err = -EBUSY;
1198 ignore_sys_suspend = 0;
1199 printk(KERN_WARNING "apm: suspend was vetoed.\n");
1200 goto out;
1201 }
1202 printk(KERN_CRIT "apm: suspend was vetoed, but suspending anyway.\n");
1203 }
1204
1205 device_suspend(PMSG_SUSPEND);
1206 local_irq_disable();
1207 device_power_down(PMSG_SUSPEND);
1208
1209 local_irq_enable();
1210
1211 save_processor_state();
1212 err = set_system_power_state(APM_STATE_SUSPEND);
1213 ignore_normal_resume = 1;
1214 restore_processor_state();
1215
1216 local_irq_disable();
1217 reinit_timer();
1218
1219 if (err == APM_NO_ERROR)
1220 err = APM_SUCCESS;
1221 if (err != APM_SUCCESS)
1222 apm_error("suspend", err);
1223 err = (err == APM_SUCCESS) ? 0 : -EIO;
1224 device_power_up();
1225 local_irq_enable();
1226 device_resume();
1227 pm_send_all(PM_RESUME, (void *)0);
1228 queue_event(APM_NORMAL_RESUME, NULL);
1229 out:
1230 spin_lock(&user_list_lock);
1231 for (as = user_list; as != NULL; as = as->next) {
1232 as->suspend_wait = 0;
1233 as->suspend_result = err;
1234 }
1235 spin_unlock(&user_list_lock);
1236 wake_up_interruptible(&apm_suspend_waitqueue);
1237 return err;
1238}
1239
1240static void standby(void)
1241{
1242 int err;
1243
1244 local_irq_disable();
1245 device_power_down(PMSG_SUSPEND);
1246 local_irq_enable();
1247
1248 err = set_system_power_state(APM_STATE_STANDBY);
1249 if ((err != APM_SUCCESS) && (err != APM_NO_ERROR))
1250 apm_error("standby", err);
1251
1252 local_irq_disable();
1253 device_power_up();
1254 local_irq_enable();
1255}
1256
1257static apm_event_t get_event(void)
1258{
1259 int error;
1260 apm_event_t event = APM_NO_EVENTS; /* silence gcc */
1261 apm_eventinfo_t info;
1262
1263 static int notified;
1264
1265 /* we don't use the eventinfo */
1266 error = apm_get_event(&event, &info);
1267 if (error == APM_SUCCESS)
1268 return event;
1269
1270 if ((error != APM_NO_EVENTS) && (notified++ == 0))
1271 apm_error("get_event", error);
1272
1273 return 0;
1274}
1275
1276static void check_events(void)
1277{
1278 apm_event_t event;
1279 static unsigned long last_resume;
1280 static int ignore_bounce;
1281
1282 while ((event = get_event()) != 0) {
1283 if (debug) {
1284 if (event <= NR_APM_EVENT_NAME)
1285 printk(KERN_DEBUG "apm: received %s notify\n",
1286 apm_event_name[event - 1]);
1287 else
1288 printk(KERN_DEBUG "apm: received unknown "
1289 "event 0x%02x\n", event);
1290 }
1291 if (ignore_bounce
1292 && ((jiffies - last_resume) > bounce_interval))
1293 ignore_bounce = 0;
1294
1295 switch (event) {
1296 case APM_SYS_STANDBY:
1297 case APM_USER_STANDBY:
1298 queue_event(event, NULL);
1299 if (standbys_pending <= 0)
1300 standby();
1301 break;
1302
1303 case APM_USER_SUSPEND:
1304#ifdef CONFIG_APM_IGNORE_USER_SUSPEND
1305 if (apm_info.connection_version > 0x100)
1306 set_system_power_state(APM_STATE_REJECT);
1307 break;
1308#endif
1309 case APM_SYS_SUSPEND:
1310 if (ignore_bounce) {
1311 if (apm_info.connection_version > 0x100)
1312 set_system_power_state(APM_STATE_REJECT);
1313 break;
1314 }
1315 /*
1316 * If we are already processing a SUSPEND,
1317 * then further SUSPEND events from the BIOS
1318 * will be ignored. We also return here to
1319 * cope with the fact that the Thinkpads keep
1320 * sending a SUSPEND event until something else
1321 * happens!
1322 */
1323 if (ignore_sys_suspend)
1324 return;
1325 ignore_sys_suspend = 1;
1326 queue_event(event, NULL);
1327 if (suspends_pending <= 0)
1328 (void) suspend(1);
1329 break;
1330
1331 case APM_NORMAL_RESUME:
1332 case APM_CRITICAL_RESUME:
1333 case APM_STANDBY_RESUME:
1334 ignore_sys_suspend = 0;
1335 last_resume = jiffies;
1336 ignore_bounce = 1;
1337 if ((event != APM_NORMAL_RESUME)
1338 || (ignore_normal_resume == 0)) {
1339 device_resume();
1340 pm_send_all(PM_RESUME, (void *)0);
1341 queue_event(event, NULL);
1342 }
1343 ignore_normal_resume = 0;
1344 break;
1345
1346 case APM_CAPABILITY_CHANGE:
1347 case APM_LOW_BATTERY:
1348 case APM_POWER_STATUS_CHANGE:
1349 queue_event(event, NULL);
1350 /* If needed, notify drivers here */
1351 break;
1352
1353 case APM_UPDATE_TIME:
1354 break;
1355
1356 case APM_CRITICAL_SUSPEND:
1357 /*
1358 * We are not allowed to reject a critical suspend.
1359 */
1360 (void) suspend(0);
1361 break;
1362 }
1363 }
1364}
1365
1366static void apm_event_handler(void)
1367{
1368 static int pending_count = 4;
1369 int err;
1370
1371 if ((standbys_pending > 0) || (suspends_pending > 0)) {
1372 if ((apm_info.connection_version > 0x100) &&
1373 (pending_count-- <= 0)) {
1374 pending_count = 4;
1375 if (debug)
1376 printk(KERN_DEBUG "apm: setting state busy\n");
1377 err = set_system_power_state(APM_STATE_BUSY);
1378 if (err)
1379 apm_error("busy", err);
1380 }
1381 } else
1382 pending_count = 4;
1383 check_events();
1384}
1385
1386/*
1387 * This is the APM thread main loop.
1388 */
1389
1390static void apm_mainloop(void)
1391{
1392 DECLARE_WAITQUEUE(wait, current);
1393
1394 add_wait_queue(&apm_waitqueue, &wait);
1395 set_current_state(TASK_INTERRUPTIBLE);
1396 for (;;) {
1397 schedule_timeout(APM_CHECK_TIMEOUT);
1398 if (kthread_should_stop())
1399 break;
1400 /*
1401 * Ok, check all events, check for idle (and mark us sleeping
1402 * so as not to count towards the load average)..
1403 */
1404 set_current_state(TASK_INTERRUPTIBLE);
1405 apm_event_handler();
1406 }
1407 remove_wait_queue(&apm_waitqueue, &wait);
1408}
1409
1410static int check_apm_user(struct apm_user *as, const char *func)
1411{
1412 if ((as == NULL) || (as->magic != APM_BIOS_MAGIC)) {
1413 printk(KERN_ERR "apm: %s passed bad filp\n", func);
1414 return 1;
1415 }
1416 return 0;
1417}
1418
1419static ssize_t do_read(struct file *fp, char __user *buf, size_t count, loff_t *ppos)
1420{
1421 struct apm_user * as;
1422 int i;
1423 apm_event_t event;
1424
1425 as = fp->private_data;
1426 if (check_apm_user(as, "read"))
1427 return -EIO;
1428 if ((int)count < sizeof(apm_event_t))
1429 return -EINVAL;
1430 if ((queue_empty(as)) && (fp->f_flags & O_NONBLOCK))
1431 return -EAGAIN;
1432 wait_event_interruptible(apm_waitqueue, !queue_empty(as));
1433 i = count;
1434 while ((i >= sizeof(event)) && !queue_empty(as)) {
1435 event = get_queued_event(as);
1436 if (copy_to_user(buf, &event, sizeof(event))) {
1437 if (i < count)
1438 break;
1439 return -EFAULT;
1440 }
1441 switch (event) {
1442 case APM_SYS_SUSPEND:
1443 case APM_USER_SUSPEND:
1444 as->suspends_read++;
1445 break;
1446
1447 case APM_SYS_STANDBY:
1448 case APM_USER_STANDBY:
1449 as->standbys_read++;
1450 break;
1451 }
1452 buf += sizeof(event);
1453 i -= sizeof(event);
1454 }
1455 if (i < count)
1456 return count - i;
1457 if (signal_pending(current))
1458 return -ERESTARTSYS;
1459 return 0;
1460}
1461
1462static unsigned int do_poll(struct file *fp, poll_table * wait)
1463{
1464 struct apm_user * as;
1465
1466 as = fp->private_data;
1467 if (check_apm_user(as, "poll"))
1468 return 0;
1469 poll_wait(fp, &apm_waitqueue, wait);
1470 if (!queue_empty(as))
1471 return POLLIN | POLLRDNORM;
1472 return 0;
1473}
1474
1475static int do_ioctl(struct inode * inode, struct file *filp,
1476 u_int cmd, u_long arg)
1477{
1478 struct apm_user * as;
1479
1480 as = filp->private_data;
1481 if (check_apm_user(as, "ioctl"))
1482 return -EIO;
1483 if ((!as->suser) || (!as->writer))
1484 return -EPERM;
1485 switch (cmd) {
1486 case APM_IOC_STANDBY:
1487 if (as->standbys_read > 0) {
1488 as->standbys_read--;
1489 as->standbys_pending--;
1490 standbys_pending--;
1491 } else
1492 queue_event(APM_USER_STANDBY, as);
1493 if (standbys_pending <= 0)
1494 standby();
1495 break;
1496 case APM_IOC_SUSPEND:
1497 if (as->suspends_read > 0) {
1498 as->suspends_read--;
1499 as->suspends_pending--;
1500 suspends_pending--;
1501 } else
1502 queue_event(APM_USER_SUSPEND, as);
1503 if (suspends_pending <= 0) {
1504 return suspend(1);
1505 } else {
1506 as->suspend_wait = 1;
1507 wait_event_interruptible(apm_suspend_waitqueue,
1508 as->suspend_wait == 0);
1509 return as->suspend_result;
1510 }
1511 break;
1512 default:
1513 return -EINVAL;
1514 }
1515 return 0;
1516}
1517
1518static int do_release(struct inode * inode, struct file * filp)
1519{
1520 struct apm_user * as;
1521
1522 as = filp->private_data;
1523 if (check_apm_user(as, "release"))
1524 return 0;
1525 filp->private_data = NULL;
1526 if (as->standbys_pending > 0) {
1527 standbys_pending -= as->standbys_pending;
1528 if (standbys_pending <= 0)
1529 standby();
1530 }
1531 if (as->suspends_pending > 0) {
1532 suspends_pending -= as->suspends_pending;
1533 if (suspends_pending <= 0)
1534 (void) suspend(1);
1535 }
1536 spin_lock(&user_list_lock);
1537 if (user_list == as)
1538 user_list = as->next;
1539 else {
1540 struct apm_user * as1;
1541
1542 for (as1 = user_list;
1543 (as1 != NULL) && (as1->next != as);
1544 as1 = as1->next)
1545 ;
1546 if (as1 == NULL)
1547 printk(KERN_ERR "apm: filp not in user list\n");
1548 else
1549 as1->next = as->next;
1550 }
1551 spin_unlock(&user_list_lock);
1552 kfree(as);
1553 return 0;
1554}
1555
1556static int do_open(struct inode * inode, struct file * filp)
1557{
1558 struct apm_user * as;
1559
1560 as = kmalloc(sizeof(*as), GFP_KERNEL);
1561 if (as == NULL) {
1562 printk(KERN_ERR "apm: cannot allocate struct of size %d bytes\n",
1563 sizeof(*as));
1564 return -ENOMEM;
1565 }
1566 as->magic = APM_BIOS_MAGIC;
1567 as->event_tail = as->event_head = 0;
1568 as->suspends_pending = as->standbys_pending = 0;
1569 as->suspends_read = as->standbys_read = 0;
1570 /*
1571 * XXX - this is a tiny bit broken, when we consider BSD
1572 * process accounting. If the device is opened by root, we
1573 * instantly flag that we used superuser privs. Who knows,
1574 * we might close the device immediately without doing a
1575 * privileged operation -- cevans
1576 */
1577 as->suser = capable(CAP_SYS_ADMIN);
1578 as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE;
1579 as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ;
1580 spin_lock(&user_list_lock);
1581 as->next = user_list;
1582 user_list = as;
1583 spin_unlock(&user_list_lock);
1584 filp->private_data = as;
1585 return 0;
1586}
1587
1588static int proc_apm_show(struct seq_file *m, void *v)
1589{
1590 unsigned short bx;
1591 unsigned short cx;
1592 unsigned short dx;
1593 int error;
1594 unsigned short ac_line_status = 0xff;
1595 unsigned short battery_status = 0xff;
1596 unsigned short battery_flag = 0xff;
1597 int percentage = -1;
1598 int time_units = -1;
1599 char *units = "?";
1600
1601 if ((num_online_cpus() == 1) &&
1602 !(error = apm_get_power_status(&bx, &cx, &dx))) {
1603 ac_line_status = (bx >> 8) & 0xff;
1604 battery_status = bx & 0xff;
1605 if ((cx & 0xff) != 0xff)
1606 percentage = cx & 0xff;
1607
1608 if (apm_info.connection_version > 0x100) {
1609 battery_flag = (cx >> 8) & 0xff;
1610 if (dx != 0xffff) {
1611 units = (dx & 0x8000) ? "min" : "sec";
1612 time_units = dx & 0x7fff;
1613 }
1614 }
1615 }
1616 /* Arguments, with symbols from linux/apm_bios.h. Information is
1617 from the Get Power Status (0x0a) call unless otherwise noted.
1618
1619 0) Linux driver version (this will change if format changes)
1620 1) APM BIOS Version. Usually 1.0, 1.1 or 1.2.
1621 2) APM flags from APM Installation Check (0x00):
1622 bit 0: APM_16_BIT_SUPPORT
1623 bit 1: APM_32_BIT_SUPPORT
1624 bit 2: APM_IDLE_SLOWS_CLOCK
1625 bit 3: APM_BIOS_DISABLED
1626 bit 4: APM_BIOS_DISENGAGED
1627 3) AC line status
1628 0x00: Off-line
1629 0x01: On-line
1630 0x02: On backup power (BIOS >= 1.1 only)
1631 0xff: Unknown
1632 4) Battery status
1633 0x00: High
1634 0x01: Low
1635 0x02: Critical
1636 0x03: Charging
1637 0x04: Selected battery not present (BIOS >= 1.2 only)
1638 0xff: Unknown
1639 5) Battery flag
1640 bit 0: High
1641 bit 1: Low
1642 bit 2: Critical
1643 bit 3: Charging
1644 bit 7: No system battery
1645 0xff: Unknown
1646 6) Remaining battery life (percentage of charge):
1647 0-100: valid
1648 -1: Unknown
1649 7) Remaining battery life (time units):
1650 Number of remaining minutes or seconds
1651 -1: Unknown
1652 8) min = minutes; sec = seconds */
1653
1654 seq_printf(m, "%s %d.%d 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
1655 driver_version,
1656 (apm_info.bios.version >> 8) & 0xff,
1657 apm_info.bios.version & 0xff,
1658 apm_info.bios.flags,
1659 ac_line_status,
1660 battery_status,
1661 battery_flag,
1662 percentage,
1663 time_units,
1664 units);
1665 return 0;
1666}
1667
1668static int proc_apm_open(struct inode *inode, struct file *file)
1669{
1670 return single_open(file, proc_apm_show, NULL);
1671}
1672
1673static const struct file_operations apm_file_ops = {
1674 .owner = THIS_MODULE,
1675 .open = proc_apm_open,
1676 .read = seq_read,
1677 .llseek = seq_lseek,
1678 .release = single_release,
1679};
1680
1681static int apm(void *unused)
1682{
1683 unsigned short bx;
1684 unsigned short cx;
1685 unsigned short dx;
1686 int error;
1687 char * power_stat;
1688 char * bat_stat;
1689
1690#ifdef CONFIG_SMP
1691 /* 2002/08/01 - WT
1692 * This is to avoid random crashes at boot time during initialization
1693 * on SMP systems in case of "apm=power-off" mode. Seen on ASUS A7M266D.
1694 * Some bioses don't like being called from CPU != 0.
1695 * Method suggested by Ingo Molnar.
1696 */
1697 set_cpus_allowed(current, cpumask_of_cpu(0));
1698 BUG_ON(smp_processor_id() != 0);
1699#endif
1700
1701 if (apm_info.connection_version == 0) {
1702 apm_info.connection_version = apm_info.bios.version;
1703 if (apm_info.connection_version > 0x100) {
1704 /*
1705 * We only support BIOSs up to version 1.2
1706 */
1707 if (apm_info.connection_version > 0x0102)
1708 apm_info.connection_version = 0x0102;
1709 error = apm_driver_version(&apm_info.connection_version);
1710 if (error != APM_SUCCESS) {
1711 apm_error("driver version", error);
1712 /* Fall back to an APM 1.0 connection. */
1713 apm_info.connection_version = 0x100;
1714 }
1715 }
1716 }
1717
1718 if (debug)
1719 printk(KERN_INFO "apm: Connection version %d.%d\n",
1720 (apm_info.connection_version >> 8) & 0xff,
1721 apm_info.connection_version & 0xff);
1722
1723#ifdef CONFIG_APM_DO_ENABLE
1724 if (apm_info.bios.flags & APM_BIOS_DISABLED) {
1725 /*
1726 * This call causes my NEC UltraLite Versa 33/C to hang if it
1727 * is booted with PM disabled but not in the docking station.
1728 * Unfortunate ...
1729 */
1730 error = apm_enable_power_management(1);
1731 if (error) {
1732 apm_error("enable power management", error);
1733 return -1;
1734 }
1735 }
1736#endif
1737
1738 if ((apm_info.bios.flags & APM_BIOS_DISENGAGED)
1739 && (apm_info.connection_version > 0x0100)) {
1740 error = apm_engage_power_management(APM_DEVICE_ALL, 1);
1741 if (error) {
1742 apm_error("engage power management", error);
1743 return -1;
1744 }
1745 }
1746
1747 if (debug && (num_online_cpus() == 1 || smp )) {
1748 error = apm_get_power_status(&bx, &cx, &dx);
1749 if (error)
1750 printk(KERN_INFO "apm: power status not available\n");
1751 else {
1752 switch ((bx >> 8) & 0xff) {
1753 case 0: power_stat = "off line"; break;
1754 case 1: power_stat = "on line"; break;
1755 case 2: power_stat = "on backup power"; break;
1756 default: power_stat = "unknown"; break;
1757 }
1758 switch (bx & 0xff) {
1759 case 0: bat_stat = "high"; break;
1760 case 1: bat_stat = "low"; break;
1761 case 2: bat_stat = "critical"; break;
1762 case 3: bat_stat = "charging"; break;
1763 default: bat_stat = "unknown"; break;
1764 }
1765 printk(KERN_INFO
1766 "apm: AC %s, battery status %s, battery life ",
1767 power_stat, bat_stat);
1768 if ((cx & 0xff) == 0xff)
1769 printk("unknown\n");
1770 else
1771 printk("%d%%\n", cx & 0xff);
1772 if (apm_info.connection_version > 0x100) {
1773 printk(KERN_INFO
1774 "apm: battery flag 0x%02x, battery life ",
1775 (cx >> 8) & 0xff);
1776 if (dx == 0xffff)
1777 printk("unknown\n");
1778 else
1779 printk("%d %s\n", dx & 0x7fff,
1780 (dx & 0x8000) ?
1781 "minutes" : "seconds");
1782 }
1783 }
1784 }
1785
1786 /* Install our power off handler.. */
1787 if (power_off)
1788 pm_power_off = apm_power_off;
1789
1790 if (num_online_cpus() == 1 || smp) {
1791#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1792 console_blank_hook = apm_console_blank;
1793#endif
1794 apm_mainloop();
1795#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
1796 console_blank_hook = NULL;
1797#endif
1798 }
1799
1800 return 0;
1801}
1802
1803#ifndef MODULE
1804static int __init apm_setup(char *str)
1805{
1806 int invert;
1807
1808 while ((str != NULL) && (*str != '\0')) {
1809 if (strncmp(str, "off", 3) == 0)
1810 apm_disabled = 1;
1811 if (strncmp(str, "on", 2) == 0)
1812 apm_disabled = 0;
1813 if ((strncmp(str, "bounce-interval=", 16) == 0) ||
1814 (strncmp(str, "bounce_interval=", 16) == 0))
1815 bounce_interval = simple_strtol(str + 16, NULL, 0);
1816 if ((strncmp(str, "idle-threshold=", 15) == 0) ||
1817 (strncmp(str, "idle_threshold=", 15) == 0))
1818 idle_threshold = simple_strtol(str + 15, NULL, 0);
1819 if ((strncmp(str, "idle-period=", 12) == 0) ||
1820 (strncmp(str, "idle_period=", 12) == 0))
1821 idle_period = simple_strtol(str + 12, NULL, 0);
1822 invert = (strncmp(str, "no-", 3) == 0) ||
1823 (strncmp(str, "no_", 3) == 0);
1824 if (invert)
1825 str += 3;
1826 if (strncmp(str, "debug", 5) == 0)
1827 debug = !invert;
1828 if ((strncmp(str, "power-off", 9) == 0) ||
1829 (strncmp(str, "power_off", 9) == 0))
1830 power_off = !invert;
1831 if (strncmp(str, "smp", 3) == 0)
1832 {
1833 smp = !invert;
1834 idle_threshold = 100;
1835 }
1836 if ((strncmp(str, "allow-ints", 10) == 0) ||
1837 (strncmp(str, "allow_ints", 10) == 0))
1838 apm_info.allow_ints = !invert;
1839 if ((strncmp(str, "broken-psr", 10) == 0) ||
1840 (strncmp(str, "broken_psr", 10) == 0))
1841 apm_info.get_power_status_broken = !invert;
1842 if ((strncmp(str, "realmode-power-off", 18) == 0) ||
1843 (strncmp(str, "realmode_power_off", 18) == 0))
1844 apm_info.realmode_power_off = !invert;
1845 str = strchr(str, ',');
1846 if (str != NULL)
1847 str += strspn(str, ", \t");
1848 }
1849 return 1;
1850}
1851
1852__setup("apm=", apm_setup);
1853#endif
1854
1855static const struct file_operations apm_bios_fops = {
1856 .owner = THIS_MODULE,
1857 .read = do_read,
1858 .poll = do_poll,
1859 .ioctl = do_ioctl,
1860 .open = do_open,
1861 .release = do_release,
1862};
1863
1864static struct miscdevice apm_device = {
1865 APM_MINOR_DEV,
1866 "apm_bios",
1867 &apm_bios_fops
1868};
1869
1870
1871/* Simple "print if true" callback */
1872static int __init print_if_true(const struct dmi_system_id *d)
1873{
1874 printk("%s\n", d->ident);
1875 return 0;
1876}
1877
1878/*
1879 * Some Bioses enable the PS/2 mouse (touchpad) at resume, even if it was
1880 * disabled before the suspend. Linux used to get terribly confused by that.
1881 */
1882static int __init broken_ps2_resume(const struct dmi_system_id *d)
1883{
1884 printk(KERN_INFO "%s machine detected. Mousepad Resume Bug workaround hopefully not needed.\n", d->ident);
1885 return 0;
1886}
1887
1888/* Some bioses have a broken protected mode poweroff and need to use realmode */
1889static int __init set_realmode_power_off(const struct dmi_system_id *d)
1890{
1891 if (apm_info.realmode_power_off == 0) {
1892 apm_info.realmode_power_off = 1;
1893 printk(KERN_INFO "%s bios detected. Using realmode poweroff only.\n", d->ident);
1894 }
1895 return 0;
1896}
1897
1898/* Some laptops require interrupts to be enabled during APM calls */
1899static int __init set_apm_ints(const struct dmi_system_id *d)
1900{
1901 if (apm_info.allow_ints == 0) {
1902 apm_info.allow_ints = 1;
1903 printk(KERN_INFO "%s machine detected. Enabling interrupts during APM calls.\n", d->ident);
1904 }
1905 return 0;
1906}
1907
1908/* Some APM bioses corrupt memory or just plain do not work */
1909static int __init apm_is_horked(const struct dmi_system_id *d)
1910{
1911 if (apm_info.disabled == 0) {
1912 apm_info.disabled = 1;
1913 printk(KERN_INFO "%s machine detected. Disabling APM.\n", d->ident);
1914 }
1915 return 0;
1916}
1917
1918static int __init apm_is_horked_d850md(const struct dmi_system_id *d)
1919{
1920 if (apm_info.disabled == 0) {
1921 apm_info.disabled = 1;
1922 printk(KERN_INFO "%s machine detected. Disabling APM.\n", d->ident);
1923 printk(KERN_INFO "This bug is fixed in bios P15 which is available for \n");
1924 printk(KERN_INFO "download from support.intel.com \n");
1925 }
1926 return 0;
1927}
1928
1929/* Some APM bioses hang on APM idle calls */
1930static int __init apm_likes_to_melt(const struct dmi_system_id *d)
1931{
1932 if (apm_info.forbid_idle == 0) {
1933 apm_info.forbid_idle = 1;
1934 printk(KERN_INFO "%s machine detected. Disabling APM idle calls.\n", d->ident);
1935 }
1936 return 0;
1937}
1938
1939/*
1940 * Check for clue free BIOS implementations who use
1941 * the following QA technique
1942 *
1943 * [ Write BIOS Code ]<------
1944 * | ^
1945 * < Does it Compile >----N--
1946 * |Y ^
1947 * < Does it Boot Win98 >-N--
1948 * |Y
1949 * [Ship It]
1950 *
1951 * Phoenix A04 08/24/2000 is known bad (Dell Inspiron 5000e)
1952 * Phoenix A07 09/29/2000 is known good (Dell Inspiron 5000)
1953 */
1954static int __init broken_apm_power(const struct dmi_system_id *d)
1955{
1956 apm_info.get_power_status_broken = 1;
1957 printk(KERN_WARNING "BIOS strings suggest APM bugs, disabling power status reporting.\n");
1958 return 0;
1959}
1960
1961/*
1962 * This bios swaps the APM minute reporting bytes over (Many sony laptops
1963 * have this problem).
1964 */
1965static int __init swab_apm_power_in_minutes(const struct dmi_system_id *d)
1966{
1967 apm_info.get_power_status_swabinminutes = 1;
1968 printk(KERN_WARNING "BIOS strings suggest APM reports battery life in minutes and wrong byte order.\n");
1969 return 0;
1970}
1971
1972static struct dmi_system_id __initdata apm_dmi_table[] = {
1973 {
1974 print_if_true,
1975 KERN_WARNING "IBM T23 - BIOS 1.03b+ and controller firmware 1.02+ may be needed for Linux APM.",
1976 { DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
1977 DMI_MATCH(DMI_BIOS_VERSION, "1AET38WW (1.01b)"), },
1978 },
1979 { /* Handle problems with APM on the C600 */
1980 broken_ps2_resume, "Dell Latitude C600",
1981 { DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
1982 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude C600"), },
1983 },
1984 { /* Allow interrupts during suspend on Dell Latitude laptops*/
1985 set_apm_ints, "Dell Latitude",
1986 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1987 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude C510"), }
1988 },
1989 { /* APM crashes */
1990 apm_is_horked, "Dell Inspiron 2500",
1991 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1992 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 2500"),
1993 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
1994 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
1995 },
1996 { /* Allow interrupts during suspend on Dell Inspiron laptops*/
1997 set_apm_ints, "Dell Inspiron", {
1998 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
1999 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 4000"), },
2000 },
2001 { /* Handle problems with APM on Inspiron 5000e */
2002 broken_apm_power, "Dell Inspiron 5000e",
2003 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2004 DMI_MATCH(DMI_BIOS_VERSION, "A04"),
2005 DMI_MATCH(DMI_BIOS_DATE, "08/24/2000"), },
2006 },
2007 { /* Handle problems with APM on Inspiron 2500 */
2008 broken_apm_power, "Dell Inspiron 2500",
2009 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2010 DMI_MATCH(DMI_BIOS_VERSION, "A12"),
2011 DMI_MATCH(DMI_BIOS_DATE, "02/04/2002"), },
2012 },
2013 { /* APM crashes */
2014 apm_is_horked, "Dell Dimension 4100",
2015 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
2016 DMI_MATCH(DMI_PRODUCT_NAME, "XPS-Z"),
2017 DMI_MATCH(DMI_BIOS_VENDOR,"Intel Corp."),
2018 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
2019 },
2020 { /* Allow interrupts during suspend on Compaq Laptops*/
2021 set_apm_ints, "Compaq 12XL125",
2022 { DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
2023 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq PC"),
2024 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2025 DMI_MATCH(DMI_BIOS_VERSION,"4.06"), },
2026 },
2027 { /* Allow interrupts during APM or the clock goes slow */
2028 set_apm_ints, "ASUSTeK",
2029 { DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
2030 DMI_MATCH(DMI_PRODUCT_NAME, "L8400K series Notebook PC"), },
2031 },
2032 { /* APM blows on shutdown */
2033 apm_is_horked, "ABIT KX7-333[R]",
2034 { DMI_MATCH(DMI_BOARD_VENDOR, "ABIT"),
2035 DMI_MATCH(DMI_BOARD_NAME, "VT8367-8233A (KX7-333[R])"), },
2036 },
2037 { /* APM crashes */
2038 apm_is_horked, "Trigem Delhi3",
2039 { DMI_MATCH(DMI_SYS_VENDOR, "TriGem Computer, Inc"),
2040 DMI_MATCH(DMI_PRODUCT_NAME, "Delhi3"), },
2041 },
2042 { /* APM crashes */
2043 apm_is_horked, "Fujitsu-Siemens",
2044 { DMI_MATCH(DMI_BIOS_VENDOR, "hoenix/FUJITSU SIEMENS"),
2045 DMI_MATCH(DMI_BIOS_VERSION, "Version1.01"), },
2046 },
2047 { /* APM crashes */
2048 apm_is_horked_d850md, "Intel D850MD",
2049 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2050 DMI_MATCH(DMI_BIOS_VERSION, "MV85010A.86A.0016.P07.0201251536"), },
2051 },
2052 { /* APM crashes */
2053 apm_is_horked, "Intel D810EMO",
2054 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2055 DMI_MATCH(DMI_BIOS_VERSION, "MO81010A.86A.0008.P04.0004170800"), },
2056 },
2057 { /* APM crashes */
2058 apm_is_horked, "Dell XPS-Z",
2059 { DMI_MATCH(DMI_BIOS_VENDOR, "Intel Corp."),
2060 DMI_MATCH(DMI_BIOS_VERSION, "A11"),
2061 DMI_MATCH(DMI_PRODUCT_NAME, "XPS-Z"), },
2062 },
2063 { /* APM crashes */
2064 apm_is_horked, "Sharp PC-PJ/AX",
2065 { DMI_MATCH(DMI_SYS_VENDOR, "SHARP"),
2066 DMI_MATCH(DMI_PRODUCT_NAME, "PC-PJ/AX"),
2067 DMI_MATCH(DMI_BIOS_VENDOR,"SystemSoft"),
2068 DMI_MATCH(DMI_BIOS_VERSION,"Version R2.08"), },
2069 },
2070 { /* APM crashes */
2071 apm_is_horked, "Dell Inspiron 2500",
2072 { DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
2073 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 2500"),
2074 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
2075 DMI_MATCH(DMI_BIOS_VERSION,"A11"), },
2076 },
2077 { /* APM idle hangs */
2078 apm_likes_to_melt, "Jabil AMD",
2079 { DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
2080 DMI_MATCH(DMI_BIOS_VERSION, "0AASNP06"), },
2081 },
2082 { /* APM idle hangs */
2083 apm_likes_to_melt, "AMI Bios",
2084 { DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
2085 DMI_MATCH(DMI_BIOS_VERSION, "0AASNP05"), },
2086 },
2087 { /* Handle problems with APM on Sony Vaio PCG-N505X(DE) */
2088 swab_apm_power_in_minutes, "Sony VAIO",
2089 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2090 DMI_MATCH(DMI_BIOS_VERSION, "R0206H"),
2091 DMI_MATCH(DMI_BIOS_DATE, "08/23/99"), },
2092 },
2093 { /* Handle problems with APM on Sony Vaio PCG-N505VX */
2094 swab_apm_power_in_minutes, "Sony VAIO",
2095 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2096 DMI_MATCH(DMI_BIOS_VERSION, "W2K06H0"),
2097 DMI_MATCH(DMI_BIOS_DATE, "02/03/00"), },
2098 },
2099 { /* Handle problems with APM on Sony Vaio PCG-XG29 */
2100 swab_apm_power_in_minutes, "Sony VAIO",
2101 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2102 DMI_MATCH(DMI_BIOS_VERSION, "R0117A0"),
2103 DMI_MATCH(DMI_BIOS_DATE, "04/25/00"), },
2104 },
2105 { /* Handle problems with APM on Sony Vaio PCG-Z600NE */
2106 swab_apm_power_in_minutes, "Sony VAIO",
2107 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2108 DMI_MATCH(DMI_BIOS_VERSION, "R0121Z1"),
2109 DMI_MATCH(DMI_BIOS_DATE, "05/11/00"), },
2110 },
2111 { /* Handle problems with APM on Sony Vaio PCG-Z600NE */
2112 swab_apm_power_in_minutes, "Sony VAIO",
2113 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2114 DMI_MATCH(DMI_BIOS_VERSION, "WME01Z1"),
2115 DMI_MATCH(DMI_BIOS_DATE, "08/11/00"), },
2116 },
2117 { /* Handle problems with APM on Sony Vaio PCG-Z600LEK(DE) */
2118 swab_apm_power_in_minutes, "Sony VAIO",
2119 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2120 DMI_MATCH(DMI_BIOS_VERSION, "R0206Z3"),
2121 DMI_MATCH(DMI_BIOS_DATE, "12/25/00"), },
2122 },
2123 { /* Handle problems with APM on Sony Vaio PCG-Z505LS */
2124 swab_apm_power_in_minutes, "Sony VAIO",
2125 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2126 DMI_MATCH(DMI_BIOS_VERSION, "R0203D0"),
2127 DMI_MATCH(DMI_BIOS_DATE, "05/12/00"), },
2128 },
2129 { /* Handle problems with APM on Sony Vaio PCG-Z505LS */
2130 swab_apm_power_in_minutes, "Sony VAIO",
2131 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2132 DMI_MATCH(DMI_BIOS_VERSION, "R0203Z3"),
2133 DMI_MATCH(DMI_BIOS_DATE, "08/25/00"), },
2134 },
2135 { /* Handle problems with APM on Sony Vaio PCG-Z505LS (with updated BIOS) */
2136 swab_apm_power_in_minutes, "Sony VAIO",
2137 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2138 DMI_MATCH(DMI_BIOS_VERSION, "R0209Z3"),
2139 DMI_MATCH(DMI_BIOS_DATE, "05/12/01"), },
2140 },
2141 { /* Handle problems with APM on Sony Vaio PCG-F104K */
2142 swab_apm_power_in_minutes, "Sony VAIO",
2143 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2144 DMI_MATCH(DMI_BIOS_VERSION, "R0204K2"),
2145 DMI_MATCH(DMI_BIOS_DATE, "08/28/00"), },
2146 },
2147
2148 { /* Handle problems with APM on Sony Vaio PCG-C1VN/C1VE */
2149 swab_apm_power_in_minutes, "Sony VAIO",
2150 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2151 DMI_MATCH(DMI_BIOS_VERSION, "R0208P1"),
2152 DMI_MATCH(DMI_BIOS_DATE, "11/09/00"), },
2153 },
2154 { /* Handle problems with APM on Sony Vaio PCG-C1VE */
2155 swab_apm_power_in_minutes, "Sony VAIO",
2156 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2157 DMI_MATCH(DMI_BIOS_VERSION, "R0204P1"),
2158 DMI_MATCH(DMI_BIOS_DATE, "09/12/00"), },
2159 },
2160 { /* Handle problems with APM on Sony Vaio PCG-C1VE */
2161 swab_apm_power_in_minutes, "Sony VAIO",
2162 { DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
2163 DMI_MATCH(DMI_BIOS_VERSION, "WXPO1Z3"),
2164 DMI_MATCH(DMI_BIOS_DATE, "10/26/01"), },
2165 },
2166 { /* broken PM poweroff bios */
2167 set_realmode_power_off, "Award Software v4.60 PGMA",
2168 { DMI_MATCH(DMI_BIOS_VENDOR, "Award Software International, Inc."),
2169 DMI_MATCH(DMI_BIOS_VERSION, "4.60 PGMA"),
2170 DMI_MATCH(DMI_BIOS_DATE, "134526184"), },
2171 },
2172
2173 /* Generic per vendor APM settings */
2174
2175 { /* Allow interrupts during suspend on IBM laptops */
2176 set_apm_ints, "IBM",
2177 { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
2178 },
2179
2180 { }
2181};
2182
2183/*
2184 * Just start the APM thread. We do NOT want to do APM BIOS
2185 * calls from anything but the APM thread, if for no other reason
2186 * than the fact that we don't trust the APM BIOS. This way,
2187 * most common APM BIOS problems that lead to protection errors
2188 * etc will have at least some level of being contained...
2189 *
2190 * In short, if something bad happens, at least we have a choice
2191 * of just killing the apm thread..
2192 */
2193static int __init apm_init(void)
2194{
2195 struct proc_dir_entry *apm_proc;
2196 struct desc_struct *gdt;
2197 int err;
2198
2199 dmi_check_system(apm_dmi_table);
2200
2201 if (apm_info.bios.version == 0 || paravirt_enabled()) {
2202 printk(KERN_INFO "apm: BIOS not found.\n");
2203 return -ENODEV;
2204 }
2205 printk(KERN_INFO
2206 "apm: BIOS version %d.%d Flags 0x%02x (Driver version %s)\n",
2207 ((apm_info.bios.version >> 8) & 0xff),
2208 (apm_info.bios.version & 0xff),
2209 apm_info.bios.flags,
2210 driver_version);
2211 if ((apm_info.bios.flags & APM_32_BIT_SUPPORT) == 0) {
2212 printk(KERN_INFO "apm: no 32 bit BIOS support\n");
2213 return -ENODEV;
2214 }
2215
2216 if (allow_ints)
2217 apm_info.allow_ints = 1;
2218 if (broken_psr)
2219 apm_info.get_power_status_broken = 1;
2220 if (realmode_power_off)
2221 apm_info.realmode_power_off = 1;
2222 /* User can override, but default is to trust DMI */
2223 if (apm_disabled != -1)
2224 apm_info.disabled = apm_disabled;
2225
2226 /*
2227 * Fix for the Compaq Contura 3/25c which reports BIOS version 0.1
2228 * but is reportedly a 1.0 BIOS.
2229 */
2230 if (apm_info.bios.version == 0x001)
2231 apm_info.bios.version = 0x100;
2232
2233 /* BIOS < 1.2 doesn't set cseg_16_len */
2234 if (apm_info.bios.version < 0x102)
2235 apm_info.bios.cseg_16_len = 0; /* 64k */
2236
2237 if (debug) {
2238 printk(KERN_INFO "apm: entry %x:%x cseg16 %x dseg %x",
2239 apm_info.bios.cseg, apm_info.bios.offset,
2240 apm_info.bios.cseg_16, apm_info.bios.dseg);
2241 if (apm_info.bios.version > 0x100)
2242 printk(" cseg len %x, dseg len %x",
2243 apm_info.bios.cseg_len,
2244 apm_info.bios.dseg_len);
2245 if (apm_info.bios.version > 0x101)
2246 printk(" cseg16 len %x", apm_info.bios.cseg_16_len);
2247 printk("\n");
2248 }
2249
2250 if (apm_info.disabled) {
2251 printk(KERN_NOTICE "apm: disabled on user request.\n");
2252 return -ENODEV;
2253 }
2254 if ((num_online_cpus() > 1) && !power_off && !smp) {
2255 printk(KERN_NOTICE "apm: disabled - APM is not SMP safe.\n");
2256 apm_info.disabled = 1;
2257 return -ENODEV;
2258 }
2259 if (PM_IS_ACTIVE()) {
2260 printk(KERN_NOTICE "apm: overridden by ACPI.\n");
2261 apm_info.disabled = 1;
2262 return -ENODEV;
2263 }
2264#ifdef CONFIG_PM_LEGACY
2265 pm_active = 1;
2266#endif
2267
2268 /*
2269 * Set up a segment that references the real mode segment 0x40
2270 * that extends up to the end of page zero (that we have reserved).
2271 * This is for buggy BIOS's that refer to (real mode) segment 0x40
2272 * even though they are called in protected mode.
2273 */
2274 set_base(bad_bios_desc, __va((unsigned long)0x40 << 4));
2275 _set_limit((char *)&bad_bios_desc, 4095 - (0x40 << 4));
2276
2277 /*
2278 * Set up the long jump entry point to the APM BIOS, which is called
2279 * from inline assembly.
2280 */
2281 apm_bios_entry.offset = apm_info.bios.offset;
2282 apm_bios_entry.segment = APM_CS;
2283
2284 /*
2285 * The APM 1.1 BIOS is supposed to provide limit information that it
2286 * recognizes. Many machines do this correctly, but many others do
2287 * not restrict themselves to their claimed limit. When this happens,
2288 * they will cause a segmentation violation in the kernel at boot time.
2289 * Most BIOS's, however, will respect a 64k limit, so we use that.
2290 *
2291 * Note we only set APM segments on CPU zero, since we pin the APM
2292 * code to that CPU.
2293 */
2294 gdt = get_cpu_gdt_table(0);
2295 set_base(gdt[APM_CS >> 3],
2296 __va((unsigned long)apm_info.bios.cseg << 4));
2297 set_base(gdt[APM_CS_16 >> 3],
2298 __va((unsigned long)apm_info.bios.cseg_16 << 4));
2299 set_base(gdt[APM_DS >> 3],
2300 __va((unsigned long)apm_info.bios.dseg << 4));
2301
2302 apm_proc = create_proc_entry("apm", 0, NULL);
2303 if (apm_proc)
2304 apm_proc->proc_fops = &apm_file_ops;
2305
2306 kapmd_task = kthread_create(apm, NULL, "kapmd");
2307 if (IS_ERR(kapmd_task)) {
2308 printk(KERN_ERR "apm: disabled - Unable to start kernel "
2309 "thread.\n");
2310 err = PTR_ERR(kapmd_task);
2311 kapmd_task = NULL;
2312 remove_proc_entry("apm", NULL);
2313 return err;
2314 }
2315 wake_up_process(kapmd_task);
2316
2317 if (num_online_cpus() > 1 && !smp ) {
2318 printk(KERN_NOTICE
2319 "apm: disabled - APM is not SMP safe (power off active).\n");
2320 return 0;
2321 }
2322
2323 /*
2324 * Note we don't actually care if the misc_device cannot be registered.
2325 * this driver can do its job without it, even if userspace can't
2326 * control it. just log the error
2327 */
2328 if (misc_register(&apm_device))
2329 printk(KERN_WARNING "apm: Could not register misc device.\n");
2330
2331 if (HZ != 100)
2332 idle_period = (idle_period * HZ) / 100;
2333 if (idle_threshold < 100) {
2334 original_pm_idle = pm_idle;
2335 pm_idle = apm_cpu_idle;
2336 set_pm_idle = 1;
2337 }
2338
2339 return 0;
2340}
2341
2342static void __exit apm_exit(void)
2343{
2344 int error;
2345
2346 if (set_pm_idle) {
2347 pm_idle = original_pm_idle;
2348 /*
2349 * We are about to unload the current idle thread pm callback
2350 * (pm_idle), Wait for all processors to update cached/local
2351 * copies of pm_idle before proceeding.
2352 */
2353 cpu_idle_wait();
2354 }
2355 if (((apm_info.bios.flags & APM_BIOS_DISENGAGED) == 0)
2356 && (apm_info.connection_version > 0x0100)) {
2357 error = apm_engage_power_management(APM_DEVICE_ALL, 0);
2358 if (error)
2359 apm_error("disengage power management", error);
2360 }
2361 misc_deregister(&apm_device);
2362 remove_proc_entry("apm", NULL);
2363 if (power_off)
2364 pm_power_off = NULL;
2365 if (kapmd_task) {
2366 kthread_stop(kapmd_task);
2367 kapmd_task = NULL;
2368 }
2369#ifdef CONFIG_PM_LEGACY
2370 pm_active = 0;
2371#endif
2372}
2373
2374module_init(apm_init);
2375module_exit(apm_exit);
2376
2377MODULE_AUTHOR("Stephen Rothwell");
2378MODULE_DESCRIPTION("Advanced Power Management");
2379MODULE_LICENSE("GPL");
2380module_param(debug, bool, 0644);
2381MODULE_PARM_DESC(debug, "Enable debug mode");
2382module_param(power_off, bool, 0444);
2383MODULE_PARM_DESC(power_off, "Enable power off");
2384module_param(bounce_interval, int, 0444);
2385MODULE_PARM_DESC(bounce_interval,
2386 "Set the number of ticks to ignore suspend bounces");
2387module_param(allow_ints, bool, 0444);
2388MODULE_PARM_DESC(allow_ints, "Allow interrupts during BIOS calls");
2389module_param(broken_psr, bool, 0444);
2390MODULE_PARM_DESC(broken_psr, "BIOS has a broken GetPowerStatus call");
2391module_param(realmode_power_off, bool, 0444);
2392MODULE_PARM_DESC(realmode_power_off,
2393 "Switch to real mode before powering off");
2394module_param(idle_threshold, int, 0444);
2395MODULE_PARM_DESC(idle_threshold,
2396 "System idle percentage above which to make APM BIOS idle calls");
2397module_param(idle_period, int, 0444);
2398MODULE_PARM_DESC(idle_period,
2399 "Period (in sec/100) over which to caculate the idle percentage");
2400module_param(smp, bool, 0444);
2401MODULE_PARM_DESC(smp,
2402 "Set this to enable APM use on an SMP platform. Use with caution on older systems");
2403MODULE_ALIAS_MISCDEV(APM_MINOR_DEV);
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
new file mode 100644
index 000000000000..cfa82c899f47
--- /dev/null
+++ b/arch/x86/kernel/asm-offsets.c
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "asm-offsets_32.c"
3#else
4# include "asm-offsets_64.c"
5#endif
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
new file mode 100644
index 000000000000..8029742c0fc1
--- /dev/null
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -0,0 +1,147 @@
1/*
2 * Generate definitions needed by assembly language modules.
3 * This code generates raw asm output which is post-processed
4 * to extract and format the required data.
5 */
6
7#include <linux/crypto.h>
8#include <linux/sched.h>
9#include <linux/signal.h>
10#include <linux/personality.h>
11#include <linux/suspend.h>
12#include <asm/ucontext.h>
13#include "sigframe_32.h"
14#include <asm/pgtable.h>
15#include <asm/fixmap.h>
16#include <asm/processor.h>
17#include <asm/thread_info.h>
18#include <asm/elf.h>
19
20#include <xen/interface/xen.h>
21
22#ifdef CONFIG_LGUEST_GUEST
23#include <linux/lguest.h>
24#include "../../../drivers/lguest/lg.h"
25#endif
26
27#define DEFINE(sym, val) \
28 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
29
30#define BLANK() asm volatile("\n->" : : )
31
32#define OFFSET(sym, str, mem) \
33 DEFINE(sym, offsetof(struct str, mem));
34
35/* workaround for a warning with -Wmissing-prototypes */
36void foo(void);
37
38void foo(void)
39{
40 OFFSET(SIGCONTEXT_eax, sigcontext, eax);
41 OFFSET(SIGCONTEXT_ebx, sigcontext, ebx);
42 OFFSET(SIGCONTEXT_ecx, sigcontext, ecx);
43 OFFSET(SIGCONTEXT_edx, sigcontext, edx);
44 OFFSET(SIGCONTEXT_esi, sigcontext, esi);
45 OFFSET(SIGCONTEXT_edi, sigcontext, edi);
46 OFFSET(SIGCONTEXT_ebp, sigcontext, ebp);
47 OFFSET(SIGCONTEXT_esp, sigcontext, esp);
48 OFFSET(SIGCONTEXT_eip, sigcontext, eip);
49 BLANK();
50
51 OFFSET(CPUINFO_x86, cpuinfo_x86, x86);
52 OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);
53 OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);
54 OFFSET(CPUINFO_x86_mask, cpuinfo_x86, x86_mask);
55 OFFSET(CPUINFO_hard_math, cpuinfo_x86, hard_math);
56 OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);
57 OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);
58 OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);
59 BLANK();
60
61 OFFSET(TI_task, thread_info, task);
62 OFFSET(TI_exec_domain, thread_info, exec_domain);
63 OFFSET(TI_flags, thread_info, flags);
64 OFFSET(TI_status, thread_info, status);
65 OFFSET(TI_preempt_count, thread_info, preempt_count);
66 OFFSET(TI_addr_limit, thread_info, addr_limit);
67 OFFSET(TI_restart_block, thread_info, restart_block);
68 OFFSET(TI_sysenter_return, thread_info, sysenter_return);
69 OFFSET(TI_cpu, thread_info, cpu);
70 BLANK();
71
72 OFFSET(GDS_size, Xgt_desc_struct, size);
73 OFFSET(GDS_address, Xgt_desc_struct, address);
74 OFFSET(GDS_pad, Xgt_desc_struct, pad);
75 BLANK();
76
77 OFFSET(PT_EBX, pt_regs, ebx);
78 OFFSET(PT_ECX, pt_regs, ecx);
79 OFFSET(PT_EDX, pt_regs, edx);
80 OFFSET(PT_ESI, pt_regs, esi);
81 OFFSET(PT_EDI, pt_regs, edi);
82 OFFSET(PT_EBP, pt_regs, ebp);
83 OFFSET(PT_EAX, pt_regs, eax);
84 OFFSET(PT_DS, pt_regs, xds);
85 OFFSET(PT_ES, pt_regs, xes);
86 OFFSET(PT_FS, pt_regs, xfs);
87 OFFSET(PT_ORIG_EAX, pt_regs, orig_eax);
88 OFFSET(PT_EIP, pt_regs, eip);
89 OFFSET(PT_CS, pt_regs, xcs);
90 OFFSET(PT_EFLAGS, pt_regs, eflags);
91 OFFSET(PT_OLDESP, pt_regs, esp);
92 OFFSET(PT_OLDSS, pt_regs, xss);
93 BLANK();
94
95 OFFSET(EXEC_DOMAIN_handler, exec_domain, handler);
96 OFFSET(RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext);
97 BLANK();
98
99 OFFSET(pbe_address, pbe, address);
100 OFFSET(pbe_orig_address, pbe, orig_address);
101 OFFSET(pbe_next, pbe, next);
102
103 /* Offset from the sysenter stack to tss.esp0 */
104 DEFINE(TSS_sysenter_esp0, offsetof(struct tss_struct, x86_tss.esp0) -
105 sizeof(struct tss_struct));
106
107 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
108 DEFINE(PAGE_SHIFT_asm, PAGE_SHIFT);
109 DEFINE(PTRS_PER_PTE, PTRS_PER_PTE);
110 DEFINE(PTRS_PER_PMD, PTRS_PER_PMD);
111 DEFINE(PTRS_PER_PGD, PTRS_PER_PGD);
112
113 DEFINE(VDSO_PRELINK_asm, VDSO_PRELINK);
114
115 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
116
117#ifdef CONFIG_PARAVIRT
118 BLANK();
119 OFFSET(PARAVIRT_enabled, paravirt_ops, paravirt_enabled);
120 OFFSET(PARAVIRT_irq_disable, paravirt_ops, irq_disable);
121 OFFSET(PARAVIRT_irq_enable, paravirt_ops, irq_enable);
122 OFFSET(PARAVIRT_irq_enable_sysexit, paravirt_ops, irq_enable_sysexit);
123 OFFSET(PARAVIRT_iret, paravirt_ops, iret);
124 OFFSET(PARAVIRT_read_cr0, paravirt_ops, read_cr0);
125#endif
126
127#ifdef CONFIG_XEN
128 BLANK();
129 OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
130 OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
131#endif
132
133#ifdef CONFIG_LGUEST_GUEST
134 BLANK();
135 OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled);
136 OFFSET(LGUEST_PAGES_host_gdt_desc, lguest_pages, state.host_gdt_desc);
137 OFFSET(LGUEST_PAGES_host_idt_desc, lguest_pages, state.host_idt_desc);
138 OFFSET(LGUEST_PAGES_host_cr3, lguest_pages, state.host_cr3);
139 OFFSET(LGUEST_PAGES_host_sp, lguest_pages, state.host_sp);
140 OFFSET(LGUEST_PAGES_guest_gdt_desc, lguest_pages,state.guest_gdt_desc);
141 OFFSET(LGUEST_PAGES_guest_idt_desc, lguest_pages,state.guest_idt_desc);
142 OFFSET(LGUEST_PAGES_guest_gdt, lguest_pages, state.guest_gdt);
143 OFFSET(LGUEST_PAGES_regs_trapnum, lguest_pages, regs.trapnum);
144 OFFSET(LGUEST_PAGES_regs_errcode, lguest_pages, regs.errcode);
145 OFFSET(LGUEST_PAGES_regs, lguest_pages, regs);
146#endif
147}
diff --git a/arch/x86_64/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets_64.c
index 778953bc636c..778953bc636c 100644
--- a/arch/x86_64/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets_64.c
diff --git a/arch/x86_64/kernel/audit.c b/arch/x86/kernel/audit_64.c
index 06d3e5a14d9d..06d3e5a14d9d 100644
--- a/arch/x86_64/kernel/audit.c
+++ b/arch/x86/kernel/audit_64.c
diff --git a/arch/i386/kernel/bootflag.c b/arch/x86/kernel/bootflag.c
index 0b9860530a6b..0b9860530a6b 100644
--- a/arch/i386/kernel/bootflag.c
+++ b/arch/x86/kernel/bootflag.c
diff --git a/arch/x86_64/kernel/bugs.c b/arch/x86/kernel/bugs_64.c
index 4e5e9d364d63..4e5e9d364d63 100644
--- a/arch/x86_64/kernel/bugs.c
+++ b/arch/x86/kernel/bugs_64.c
diff --git a/arch/i386/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 778396c78d65..778396c78d65 100644
--- a/arch/i386/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
diff --git a/arch/i386/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 3e91d3ee26ec..3e91d3ee26ec 100644
--- a/arch/i386/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index dcf6bbb1c7c0..dcf6bbb1c7c0 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
diff --git a/arch/i386/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 59266f03d1cd..59266f03d1cd 100644
--- a/arch/i386/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
diff --git a/arch/i386/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index 473eac883c7b..473eac883c7b 100644
--- a/arch/i386/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
diff --git a/arch/i386/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d506201d397c..d506201d397c 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
diff --git a/arch/i386/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 2f6432cef6ff..2f6432cef6ff 100644
--- a/arch/i386/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index d8c6f132dc7a..d8c6f132dc7a 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
diff --git a/arch/i386/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
index 560f7760dae5..560f7760dae5 100644
--- a/arch/i386/kernel/cpu/cpufreq/Makefile
+++ b/arch/x86/kernel/cpu/cpufreq/Makefile
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
new file mode 100644
index 000000000000..b6434a7ef8b2
--- /dev/null
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -0,0 +1,799 @@
1/*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/smp.h>
32#include <linux/sched.h>
33#include <linux/cpufreq.h>
34#include <linux/compiler.h>
35#include <linux/dmi.h>
36
37#include <linux/acpi.h>
38#include <acpi/processor.h>
39
40#include <asm/io.h>
41#include <asm/msr.h>
42#include <asm/processor.h>
43#include <asm/cpufeature.h>
44#include <asm/delay.h>
45#include <asm/uaccess.h>
46
47#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
48
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
53enum {
54 UNDEFINED_CAPABLE = 0,
55 SYSTEM_INTEL_MSR_CAPABLE,
56 SYSTEM_IO_CAPABLE,
57};
58
59#define INTEL_MSR_RANGE (0xffff)
60#define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
61
62struct acpi_cpufreq_data {
63 struct acpi_processor_performance *acpi_data;
64 struct cpufreq_frequency_table *freq_table;
65 unsigned int max_freq;
66 unsigned int resume;
67 unsigned int cpu_feature;
68};
69
70static struct acpi_cpufreq_data *drv_data[NR_CPUS];
71/* acpi_perf_data is a pointer to percpu data. */
72static struct acpi_processor_performance *acpi_perf_data;
73
74static struct cpufreq_driver acpi_cpufreq_driver;
75
76static unsigned int acpi_pstate_strict;
77
78static int check_est_cpu(unsigned int cpuid)
79{
80 struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
81
82 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
83 !cpu_has(cpu, X86_FEATURE_EST))
84 return 0;
85
86 return 1;
87}
88
89static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
90{
91 struct acpi_processor_performance *perf;
92 int i;
93
94 perf = data->acpi_data;
95
96 for (i=0; i<perf->state_count; i++) {
97 if (value == perf->states[i].status)
98 return data->freq_table[i].frequency;
99 }
100 return 0;
101}
102
103static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
104{
105 int i;
106 struct acpi_processor_performance *perf;
107
108 msr &= INTEL_MSR_RANGE;
109 perf = data->acpi_data;
110
111 for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
112 if (msr == perf->states[data->freq_table[i].index].status)
113 return data->freq_table[i].frequency;
114 }
115 return data->freq_table[0].frequency;
116}
117
118static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
119{
120 switch (data->cpu_feature) {
121 case SYSTEM_INTEL_MSR_CAPABLE:
122 return extract_msr(val, data);
123 case SYSTEM_IO_CAPABLE:
124 return extract_io(val, data);
125 default:
126 return 0;
127 }
128}
129
130struct msr_addr {
131 u32 reg;
132};
133
134struct io_addr {
135 u16 port;
136 u8 bit_width;
137};
138
139typedef union {
140 struct msr_addr msr;
141 struct io_addr io;
142} drv_addr_union;
143
144struct drv_cmd {
145 unsigned int type;
146 cpumask_t mask;
147 drv_addr_union addr;
148 u32 val;
149};
150
151static void do_drv_read(struct drv_cmd *cmd)
152{
153 u32 h;
154
155 switch (cmd->type) {
156 case SYSTEM_INTEL_MSR_CAPABLE:
157 rdmsr(cmd->addr.msr.reg, cmd->val, h);
158 break;
159 case SYSTEM_IO_CAPABLE:
160 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
161 &cmd->val,
162 (u32)cmd->addr.io.bit_width);
163 break;
164 default:
165 break;
166 }
167}
168
169static void do_drv_write(struct drv_cmd *cmd)
170{
171 u32 lo, hi;
172
173 switch (cmd->type) {
174 case SYSTEM_INTEL_MSR_CAPABLE:
175 rdmsr(cmd->addr.msr.reg, lo, hi);
176 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
177 wrmsr(cmd->addr.msr.reg, lo, hi);
178 break;
179 case SYSTEM_IO_CAPABLE:
180 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
181 cmd->val,
182 (u32)cmd->addr.io.bit_width);
183 break;
184 default:
185 break;
186 }
187}
188
189static void drv_read(struct drv_cmd *cmd)
190{
191 cpumask_t saved_mask = current->cpus_allowed;
192 cmd->val = 0;
193
194 set_cpus_allowed(current, cmd->mask);
195 do_drv_read(cmd);
196 set_cpus_allowed(current, saved_mask);
197}
198
199static void drv_write(struct drv_cmd *cmd)
200{
201 cpumask_t saved_mask = current->cpus_allowed;
202 unsigned int i;
203
204 for_each_cpu_mask(i, cmd->mask) {
205 set_cpus_allowed(current, cpumask_of_cpu(i));
206 do_drv_write(cmd);
207 }
208
209 set_cpus_allowed(current, saved_mask);
210 return;
211}
212
213static u32 get_cur_val(cpumask_t mask)
214{
215 struct acpi_processor_performance *perf;
216 struct drv_cmd cmd;
217
218 if (unlikely(cpus_empty(mask)))
219 return 0;
220
221 switch (drv_data[first_cpu(mask)]->cpu_feature) {
222 case SYSTEM_INTEL_MSR_CAPABLE:
223 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
224 cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
225 break;
226 case SYSTEM_IO_CAPABLE:
227 cmd.type = SYSTEM_IO_CAPABLE;
228 perf = drv_data[first_cpu(mask)]->acpi_data;
229 cmd.addr.io.port = perf->control_register.address;
230 cmd.addr.io.bit_width = perf->control_register.bit_width;
231 break;
232 default:
233 return 0;
234 }
235
236 cmd.mask = mask;
237
238 drv_read(&cmd);
239
240 dprintk("get_cur_val = %u\n", cmd.val);
241
242 return cmd.val;
243}
244
245/*
246 * Return the measured active (C0) frequency on this CPU since last call
247 * to this function.
248 * Input: cpu number
249 * Return: Average CPU frequency in terms of max frequency (zero on error)
250 *
251 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
252 * over a period of time, while CPU is in C0 state.
253 * IA32_MPERF counts at the rate of max advertised frequency
254 * IA32_APERF counts at the rate of actual CPU frequency
255 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
256 * no meaning should be associated with absolute values of these MSRs.
257 */
258static unsigned int get_measured_perf(unsigned int cpu)
259{
260 union {
261 struct {
262 u32 lo;
263 u32 hi;
264 } split;
265 u64 whole;
266 } aperf_cur, mperf_cur;
267
268 cpumask_t saved_mask;
269 unsigned int perf_percent;
270 unsigned int retval;
271
272 saved_mask = current->cpus_allowed;
273 set_cpus_allowed(current, cpumask_of_cpu(cpu));
274 if (get_cpu() != cpu) {
275 /* We were not able to run on requested processor */
276 put_cpu();
277 return 0;
278 }
279
280 rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
281 rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
282
283 wrmsr(MSR_IA32_APERF, 0,0);
284 wrmsr(MSR_IA32_MPERF, 0,0);
285
286#ifdef __i386__
287 /*
288 * We dont want to do 64 bit divide with 32 bit kernel
289 * Get an approximate value. Return failure in case we cannot get
290 * an approximate value.
291 */
292 if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
293 int shift_count;
294 u32 h;
295
296 h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
297 shift_count = fls(h);
298
299 aperf_cur.whole >>= shift_count;
300 mperf_cur.whole >>= shift_count;
301 }
302
303 if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
304 int shift_count = 7;
305 aperf_cur.split.lo >>= shift_count;
306 mperf_cur.split.lo >>= shift_count;
307 }
308
309 if (aperf_cur.split.lo && mperf_cur.split.lo)
310 perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
311 else
312 perf_percent = 0;
313
314#else
315 if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
316 int shift_count = 7;
317 aperf_cur.whole >>= shift_count;
318 mperf_cur.whole >>= shift_count;
319 }
320
321 if (aperf_cur.whole && mperf_cur.whole)
322 perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
323 else
324 perf_percent = 0;
325
326#endif
327
328 retval = drv_data[cpu]->max_freq * perf_percent / 100;
329
330 put_cpu();
331 set_cpus_allowed(current, saved_mask);
332
333 dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
334 return retval;
335}
336
337static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
338{
339 struct acpi_cpufreq_data *data = drv_data[cpu];
340 unsigned int freq;
341
342 dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
343
344 if (unlikely(data == NULL ||
345 data->acpi_data == NULL || data->freq_table == NULL)) {
346 return 0;
347 }
348
349 freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
350 dprintk("cur freq = %u\n", freq);
351
352 return freq;
353}
354
355static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
356 struct acpi_cpufreq_data *data)
357{
358 unsigned int cur_freq;
359 unsigned int i;
360
361 for (i=0; i<100; i++) {
362 cur_freq = extract_freq(get_cur_val(mask), data);
363 if (cur_freq == freq)
364 return 1;
365 udelay(10);
366 }
367 return 0;
368}
369
370static int acpi_cpufreq_target(struct cpufreq_policy *policy,
371 unsigned int target_freq, unsigned int relation)
372{
373 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
374 struct acpi_processor_performance *perf;
375 struct cpufreq_freqs freqs;
376 cpumask_t online_policy_cpus;
377 struct drv_cmd cmd;
378 unsigned int next_state = 0; /* Index into freq_table */
379 unsigned int next_perf_state = 0; /* Index into perf table */
380 unsigned int i;
381 int result = 0;
382
383 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
384
385 if (unlikely(data == NULL ||
386 data->acpi_data == NULL || data->freq_table == NULL)) {
387 return -ENODEV;
388 }
389
390 perf = data->acpi_data;
391 result = cpufreq_frequency_table_target(policy,
392 data->freq_table,
393 target_freq,
394 relation, &next_state);
395 if (unlikely(result))
396 return -ENODEV;
397
398#ifdef CONFIG_HOTPLUG_CPU
399 /* cpufreq holds the hotplug lock, so we are safe from here on */
400 cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
401#else
402 online_policy_cpus = policy->cpus;
403#endif
404
405 next_perf_state = data->freq_table[next_state].index;
406 if (perf->state == next_perf_state) {
407 if (unlikely(data->resume)) {
408 dprintk("Called after resume, resetting to P%d\n",
409 next_perf_state);
410 data->resume = 0;
411 } else {
412 dprintk("Already at target state (P%d)\n",
413 next_perf_state);
414 return 0;
415 }
416 }
417
418 switch (data->cpu_feature) {
419 case SYSTEM_INTEL_MSR_CAPABLE:
420 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
421 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
422 cmd.val = (u32) perf->states[next_perf_state].control;
423 break;
424 case SYSTEM_IO_CAPABLE:
425 cmd.type = SYSTEM_IO_CAPABLE;
426 cmd.addr.io.port = perf->control_register.address;
427 cmd.addr.io.bit_width = perf->control_register.bit_width;
428 cmd.val = (u32) perf->states[next_perf_state].control;
429 break;
430 default:
431 return -ENODEV;
432 }
433
434 cpus_clear(cmd.mask);
435
436 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
437 cmd.mask = online_policy_cpus;
438 else
439 cpu_set(policy->cpu, cmd.mask);
440
441 freqs.old = perf->states[perf->state].core_frequency * 1000;
442 freqs.new = data->freq_table[next_state].frequency;
443 for_each_cpu_mask(i, cmd.mask) {
444 freqs.cpu = i;
445 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
446 }
447
448 drv_write(&cmd);
449
450 if (acpi_pstate_strict) {
451 if (!check_freqs(cmd.mask, freqs.new, data)) {
452 dprintk("acpi_cpufreq_target failed (%d)\n",
453 policy->cpu);
454 return -EAGAIN;
455 }
456 }
457
458 for_each_cpu_mask(i, cmd.mask) {
459 freqs.cpu = i;
460 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
461 }
462 perf->state = next_perf_state;
463
464 return result;
465}
466
467static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
468{
469 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
470
471 dprintk("acpi_cpufreq_verify\n");
472
473 return cpufreq_frequency_table_verify(policy, data->freq_table);
474}
475
476static unsigned long
477acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
478{
479 struct acpi_processor_performance *perf = data->acpi_data;
480
481 if (cpu_khz) {
482 /* search the closest match to cpu_khz */
483 unsigned int i;
484 unsigned long freq;
485 unsigned long freqn = perf->states[0].core_frequency * 1000;
486
487 for (i=0; i<(perf->state_count-1); i++) {
488 freq = freqn;
489 freqn = perf->states[i+1].core_frequency * 1000;
490 if ((2 * cpu_khz) > (freqn + freq)) {
491 perf->state = i;
492 return freq;
493 }
494 }
495 perf->state = perf->state_count-1;
496 return freqn;
497 } else {
498 /* assume CPU is at P0... */
499 perf->state = 0;
500 return perf->states[0].core_frequency * 1000;
501 }
502}
503
504/*
505 * acpi_cpufreq_early_init - initialize ACPI P-States library
506 *
507 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
508 * in order to determine correct frequency and voltage pairings. We can
509 * do _PDC and _PSD and find out the processor dependency for the
510 * actual init that will happen later...
511 */
512static int __init acpi_cpufreq_early_init(void)
513{
514 dprintk("acpi_cpufreq_early_init\n");
515
516 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
517 if (!acpi_perf_data) {
518 dprintk("Memory allocation error for acpi_perf_data.\n");
519 return -ENOMEM;
520 }
521
522 /* Do initialization in ACPI core */
523 acpi_processor_preregister_performance(acpi_perf_data);
524 return 0;
525}
526
527#ifdef CONFIG_SMP
528/*
529 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
530 * or do it in BIOS firmware and won't inform about it to OS. If not
531 * detected, this has a side effect of making CPU run at a different speed
532 * than OS intended it to run at. Detect it and handle it cleanly.
533 */
534static int bios_with_sw_any_bug;
535
536static int sw_any_bug_found(const struct dmi_system_id *d)
537{
538 bios_with_sw_any_bug = 1;
539 return 0;
540}
541
542static const struct dmi_system_id sw_any_bug_dmi_table[] = {
543 {
544 .callback = sw_any_bug_found,
545 .ident = "Supermicro Server X6DLP",
546 .matches = {
547 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
548 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
549 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
550 },
551 },
552 { }
553};
554#endif
555
556static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
557{
558 unsigned int i;
559 unsigned int valid_states = 0;
560 unsigned int cpu = policy->cpu;
561 struct acpi_cpufreq_data *data;
562 unsigned int result = 0;
563 struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
564 struct acpi_processor_performance *perf;
565
566 dprintk("acpi_cpufreq_cpu_init\n");
567
568 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
569 if (!data)
570 return -ENOMEM;
571
572 data->acpi_data = percpu_ptr(acpi_perf_data, cpu);
573 drv_data[cpu] = data;
574
575 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
576 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
577
578 result = acpi_processor_register_performance(data->acpi_data, cpu);
579 if (result)
580 goto err_free;
581
582 perf = data->acpi_data;
583 policy->shared_type = perf->shared_type;
584
585 /*
586 * Will let policy->cpus know about dependency only when software
587 * coordination is required.
588 */
589 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
590 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
591 policy->cpus = perf->shared_cpu_map;
592 }
593
594#ifdef CONFIG_SMP
595 dmi_check_system(sw_any_bug_dmi_table);
596 if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
597 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
598 policy->cpus = cpu_core_map[cpu];
599 }
600#endif
601
602 /* capability check */
603 if (perf->state_count <= 1) {
604 dprintk("No P-States\n");
605 result = -ENODEV;
606 goto err_unreg;
607 }
608
609 if (perf->control_register.space_id != perf->status_register.space_id) {
610 result = -ENODEV;
611 goto err_unreg;
612 }
613
614 switch (perf->control_register.space_id) {
615 case ACPI_ADR_SPACE_SYSTEM_IO:
616 dprintk("SYSTEM IO addr space\n");
617 data->cpu_feature = SYSTEM_IO_CAPABLE;
618 break;
619 case ACPI_ADR_SPACE_FIXED_HARDWARE:
620 dprintk("HARDWARE addr space\n");
621 if (!check_est_cpu(cpu)) {
622 result = -ENODEV;
623 goto err_unreg;
624 }
625 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
626 break;
627 default:
628 dprintk("Unknown addr space %d\n",
629 (u32) (perf->control_register.space_id));
630 result = -ENODEV;
631 goto err_unreg;
632 }
633
634 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
635 (perf->state_count+1), GFP_KERNEL);
636 if (!data->freq_table) {
637 result = -ENOMEM;
638 goto err_unreg;
639 }
640
641 /* detect transition latency */
642 policy->cpuinfo.transition_latency = 0;
643 for (i=0; i<perf->state_count; i++) {
644 if ((perf->states[i].transition_latency * 1000) >
645 policy->cpuinfo.transition_latency)
646 policy->cpuinfo.transition_latency =
647 perf->states[i].transition_latency * 1000;
648 }
649 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
650
651 data->max_freq = perf->states[0].core_frequency * 1000;
652 /* table init */
653 for (i=0; i<perf->state_count; i++) {
654 if (i>0 && perf->states[i].core_frequency >=
655 data->freq_table[valid_states-1].frequency / 1000)
656 continue;
657
658 data->freq_table[valid_states].index = i;
659 data->freq_table[valid_states].frequency =
660 perf->states[i].core_frequency * 1000;
661 valid_states++;
662 }
663 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
664 perf->state = 0;
665
666 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
667 if (result)
668 goto err_freqfree;
669
670 switch (perf->control_register.space_id) {
671 case ACPI_ADR_SPACE_SYSTEM_IO:
672 /* Current speed is unknown and not detectable by IO port */
673 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
674 break;
675 case ACPI_ADR_SPACE_FIXED_HARDWARE:
676 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
677 policy->cur = get_cur_freq_on_cpu(cpu);
678 break;
679 default:
680 break;
681 }
682
683 /* notify BIOS that we exist */
684 acpi_processor_notify_smm(THIS_MODULE);
685
686 /* Check for APERF/MPERF support in hardware */
687 if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
688 unsigned int ecx;
689 ecx = cpuid_ecx(6);
690 if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
691 acpi_cpufreq_driver.getavg = get_measured_perf;
692 }
693
694 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
695 for (i = 0; i < perf->state_count; i++)
696 dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
697 (i == perf->state ? '*' : ' '), i,
698 (u32) perf->states[i].core_frequency,
699 (u32) perf->states[i].power,
700 (u32) perf->states[i].transition_latency);
701
702 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
703
704 /*
705 * the first call to ->target() should result in us actually
706 * writing something to the appropriate registers.
707 */
708 data->resume = 1;
709
710 return result;
711
712err_freqfree:
713 kfree(data->freq_table);
714err_unreg:
715 acpi_processor_unregister_performance(perf, cpu);
716err_free:
717 kfree(data);
718 drv_data[cpu] = NULL;
719
720 return result;
721}
722
723static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
724{
725 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
726
727 dprintk("acpi_cpufreq_cpu_exit\n");
728
729 if (data) {
730 cpufreq_frequency_table_put_attr(policy->cpu);
731 drv_data[policy->cpu] = NULL;
732 acpi_processor_unregister_performance(data->acpi_data,
733 policy->cpu);
734 kfree(data);
735 }
736
737 return 0;
738}
739
740static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
741{
742 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
743
744 dprintk("acpi_cpufreq_resume\n");
745
746 data->resume = 1;
747
748 return 0;
749}
750
751static struct freq_attr *acpi_cpufreq_attr[] = {
752 &cpufreq_freq_attr_scaling_available_freqs,
753 NULL,
754};
755
756static struct cpufreq_driver acpi_cpufreq_driver = {
757 .verify = acpi_cpufreq_verify,
758 .target = acpi_cpufreq_target,
759 .init = acpi_cpufreq_cpu_init,
760 .exit = acpi_cpufreq_cpu_exit,
761 .resume = acpi_cpufreq_resume,
762 .name = "acpi-cpufreq",
763 .owner = THIS_MODULE,
764 .attr = acpi_cpufreq_attr,
765};
766
767static int __init acpi_cpufreq_init(void)
768{
769 int ret;
770
771 dprintk("acpi_cpufreq_init\n");
772
773 ret = acpi_cpufreq_early_init();
774 if (ret)
775 return ret;
776
777 return cpufreq_register_driver(&acpi_cpufreq_driver);
778}
779
780static void __exit acpi_cpufreq_exit(void)
781{
782 dprintk("acpi_cpufreq_exit\n");
783
784 cpufreq_unregister_driver(&acpi_cpufreq_driver);
785
786 free_percpu(acpi_perf_data);
787
788 return;
789}
790
791module_param(acpi_pstate_strict, uint, 0644);
792MODULE_PARM_DESC(acpi_pstate_strict,
793 "value 0 or non-zero. non-zero -> strict ACPI checks are "
794 "performed during frequency changes.");
795
796late_initcall(acpi_cpufreq_init);
797module_exit(acpi_cpufreq_exit);
798
799MODULE_ALIAS("acpi");
diff --git a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 66acd5039918..66acd5039918 100644
--- a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
diff --git a/arch/i386/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
index f43d98e11cc7..f43d98e11cc7 100644
--- a/arch/i386/kernel/cpu/cpufreq/e_powersaver.c
+++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
diff --git a/arch/i386/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index f317276afa7a..f317276afa7a 100644
--- a/arch/i386/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
diff --git a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
index 461dabc4e495..461dabc4e495 100644
--- a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index f0cce3c2dc3a..f0cce3c2dc3a 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.h b/arch/x86/kernel/cpu/cpufreq/longhaul.h
index 4fcc320997df..4fcc320997df 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.h
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.h
diff --git a/arch/i386/kernel/cpu/cpufreq/longrun.c b/arch/x86/kernel/cpu/cpufreq/longrun.c
index b2689514295a..b2689514295a 100644
--- a/arch/i386/kernel/cpu/cpufreq/longrun.c
+++ b/arch/x86/kernel/cpu/cpufreq/longrun.c
diff --git a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index 4c76b511e194..4c76b511e194 100644
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index f89524051e4a..f89524051e4a 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index ca3e1d341889..ca3e1d341889 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k7.h b/arch/x86/kernel/cpu/cpufreq/powernow-k7.h
index f8a63b3664e3..f8a63b3664e3 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.h
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 34ed53a06730..34ed53a06730 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
index b06c812208ca..b06c812208ca 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
diff --git a/arch/i386/kernel/cpu/cpufreq/sc520_freq.c b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
index b8fb4b521c62..b8fb4b521c62 100644
--- a/arch/i386/kernel/cpu/cpufreq/sc520_freq.c
+++ b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index 6c5dc2c85aeb..6c5dc2c85aeb 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index a5b2346faf1f..a5b2346faf1f 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index b1acc8ce3167..b1acc8ce3167 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
index b11bcc608cac..b11bcc608cac 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.h
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index e1c509aa3054..e1c509aa3054 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 122d2d75aa9f..122d2d75aa9f 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index dc4e08147b1f..dc4e08147b1f 100644
--- a/arch/i386/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index db6c25aa5776..db6c25aa5776 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
diff --git a/arch/i386/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile
index f1ebe1c1c17a..f1ebe1c1c17a 100644
--- a/arch/i386/kernel/cpu/mcheck/Makefile
+++ b/arch/x86/kernel/cpu/mcheck/Makefile
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c
index eef63e3630c2..eef63e3630c2 100644
--- a/arch/i386/kernel/cpu/mcheck/k7.c
+++ b/arch/x86/kernel/cpu/mcheck/k7.c
diff --git a/arch/i386/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 34c781eddee4..34c781eddee4 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
diff --git a/arch/i386/kernel/cpu/mcheck/mce.h b/arch/x86/kernel/cpu/mcheck/mce.h
index 81fb6e2d35f3..81fb6e2d35f3 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.h
+++ b/arch/x86/kernel/cpu/mcheck/mce.h
diff --git a/arch/i386/kernel/cpu/mcheck/non-fatal.c b/arch/x86/kernel/cpu/mcheck/non-fatal.c
index bf39409b3838..bf39409b3838 100644
--- a/arch/i386/kernel/cpu/mcheck/non-fatal.c
+++ b/arch/x86/kernel/cpu/mcheck/non-fatal.c
diff --git a/arch/i386/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index 1509edfb2313..1509edfb2313 100644
--- a/arch/i386/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
diff --git a/arch/i386/kernel/cpu/mcheck/p5.c b/arch/x86/kernel/cpu/mcheck/p5.c
index 94bc43d950cf..94bc43d950cf 100644
--- a/arch/i386/kernel/cpu/mcheck/p5.c
+++ b/arch/x86/kernel/cpu/mcheck/p5.c
diff --git a/arch/i386/kernel/cpu/mcheck/p6.c b/arch/x86/kernel/cpu/mcheck/p6.c
index deeae42ce199..deeae42ce199 100644
--- a/arch/i386/kernel/cpu/mcheck/p6.c
+++ b/arch/x86/kernel/cpu/mcheck/p6.c
diff --git a/arch/i386/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 1203dc5ab87a..1203dc5ab87a 100644
--- a/arch/i386/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
diff --git a/arch/i386/kernel/cpu/mcheck/winchip.c b/arch/x86/kernel/cpu/mcheck/winchip.c
index 9e424b6c293d..9e424b6c293d 100644
--- a/arch/i386/kernel/cpu/mcheck/winchip.c
+++ b/arch/x86/kernel/cpu/mcheck/winchip.c
diff --git a/arch/i386/kernel/cpu/mtrr/Makefile b/arch/x86/kernel/cpu/mtrr/Makefile
index 191fc0533649..191fc0533649 100644
--- a/arch/i386/kernel/cpu/mtrr/Makefile
+++ b/arch/x86/kernel/cpu/mtrr/Makefile
diff --git a/arch/i386/kernel/cpu/mtrr/amd.c b/arch/x86/kernel/cpu/mtrr/amd.c
index 0949cdbf848a..0949cdbf848a 100644
--- a/arch/i386/kernel/cpu/mtrr/amd.c
+++ b/arch/x86/kernel/cpu/mtrr/amd.c
diff --git a/arch/i386/kernel/cpu/mtrr/centaur.c b/arch/x86/kernel/cpu/mtrr/centaur.c
index cb9aa3a7a7ab..cb9aa3a7a7ab 100644
--- a/arch/i386/kernel/cpu/mtrr/centaur.c
+++ b/arch/x86/kernel/cpu/mtrr/centaur.c
diff --git a/arch/i386/kernel/cpu/mtrr/cyrix.c b/arch/x86/kernel/cpu/mtrr/cyrix.c
index 2287d4863a8a..2287d4863a8a 100644
--- a/arch/i386/kernel/cpu/mtrr/cyrix.c
+++ b/arch/x86/kernel/cpu/mtrr/cyrix.c
diff --git a/arch/i386/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 56f64e34829f..56f64e34829f 100644
--- a/arch/i386/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
diff --git a/arch/i386/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index c7d8f1756745..c7d8f1756745 100644
--- a/arch/i386/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index c48b6fea5ab4..c48b6fea5ab4 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
diff --git a/arch/i386/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h
index 289dfe6030e3..289dfe6030e3 100644
--- a/arch/i386/kernel/cpu/mtrr/mtrr.h
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.h
diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c
new file mode 100644
index 000000000000..49e20c2afcdf
--- /dev/null
+++ b/arch/x86/kernel/cpu/mtrr/state.c
@@ -0,0 +1,79 @@
1#include <linux/mm.h>
2#include <linux/init.h>
3#include <asm/io.h>
4#include <asm/mtrr.h>
5#include <asm/msr.h>
6#include <asm/processor-cyrix.h>
7#include "mtrr.h"
8
9
10/* Put the processor into a state where MTRRs can be safely set */
11void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
12{
13 unsigned int cr0;
14
15 /* Disable interrupts locally */
16 local_irq_save(ctxt->flags);
17
18 if (use_intel() || is_cpu(CYRIX)) {
19
20 /* Save value of CR4 and clear Page Global Enable (bit 7) */
21 if ( cpu_has_pge ) {
22 ctxt->cr4val = read_cr4();
23 write_cr4(ctxt->cr4val & ~X86_CR4_PGE);
24 }
25
26 /* Disable and flush caches. Note that wbinvd flushes the TLBs as
27 a side-effect */
28 cr0 = read_cr0() | 0x40000000;
29 wbinvd();
30 write_cr0(cr0);
31 wbinvd();
32
33 if (use_intel())
34 /* Save MTRR state */
35 rdmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
36 else
37 /* Cyrix ARRs - everything else were excluded at the top */
38 ctxt->ccr3 = getCx86(CX86_CCR3);
39 }
40}
41
42void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
43{
44 if (use_intel())
45 /* Disable MTRRs, and set the default type to uncached */
46 mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL,
47 ctxt->deftype_hi);
48 else if (is_cpu(CYRIX))
49 /* Cyrix ARRs - everything else were excluded at the top */
50 setCx86(CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10);
51}
52
53/* Restore the processor after a set_mtrr_prepare */
54void set_mtrr_done(struct set_mtrr_context *ctxt)
55{
56 if (use_intel() || is_cpu(CYRIX)) {
57
58 /* Flush caches and TLBs */
59 wbinvd();
60
61 /* Restore MTRRdefType */
62 if (use_intel())
63 /* Intel (P6) standard MTRRs */
64 mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
65 else
66 /* Cyrix ARRs - everything else was excluded at the top */
67 setCx86(CX86_CCR3, ctxt->ccr3);
68
69 /* Enable caches */
70 write_cr0(read_cr0() & 0xbfffffff);
71
72 /* Restore value of CR4 */
73 if ( cpu_has_pge )
74 write_cr4(ctxt->cr4val);
75 }
76 /* Re-enable interrupts locally (if enabled previously) */
77 local_irq_restore(ctxt->flags);
78}
79
diff --git a/arch/i386/kernel/cpu/nexgen.c b/arch/x86/kernel/cpu/nexgen.c
index 961fbe1a748f..961fbe1a748f 100644
--- a/arch/i386/kernel/cpu/nexgen.c
+++ b/arch/x86/kernel/cpu/nexgen.c
diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 93fecd4b03de..93fecd4b03de 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
diff --git a/arch/i386/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 1e31b6caffb1..1e31b6caffb1 100644
--- a/arch/i386/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
diff --git a/arch/i386/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 200fb3f9ebfb..200fb3f9ebfb 100644
--- a/arch/i386/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
diff --git a/arch/i386/kernel/cpu/umc.c b/arch/x86/kernel/cpu/umc.c
index a7a4e75bdcd7..a7a4e75bdcd7 100644
--- a/arch/i386/kernel/cpu/umc.c
+++ b/arch/x86/kernel/cpu/umc.c
diff --git a/arch/x86_64/kernel/cpufreq/Kconfig b/arch/x86/kernel/cpufreq/Kconfig
index a3fd51926cbd..a3fd51926cbd 100644
--- a/arch/x86_64/kernel/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpufreq/Kconfig
diff --git a/arch/i386/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 5c2faa10e9fa..5c2faa10e9fa 100644
--- a/arch/i386/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
diff --git a/arch/i386/kernel/crash.c b/arch/x86/kernel/crash_32.c
index 53589d1b1a05..53589d1b1a05 100644
--- a/arch/i386/kernel/crash.c
+++ b/arch/x86/kernel/crash_32.c
diff --git a/arch/x86_64/kernel/crash.c b/arch/x86/kernel/crash_64.c
index 13432a1ae904..13432a1ae904 100644
--- a/arch/x86_64/kernel/crash.c
+++ b/arch/x86/kernel/crash_64.c
diff --git a/arch/i386/kernel/crash_dump.c b/arch/x86/kernel/crash_dump_32.c
index 3f532df488bc..3f532df488bc 100644
--- a/arch/i386/kernel/crash_dump.c
+++ b/arch/x86/kernel/crash_dump_32.c
diff --git a/arch/x86_64/kernel/crash_dump.c b/arch/x86/kernel/crash_dump_64.c
index 942deac4d43a..942deac4d43a 100644
--- a/arch/x86_64/kernel/crash_dump.c
+++ b/arch/x86/kernel/crash_dump_64.c
diff --git a/arch/i386/kernel/doublefault.c b/arch/x86/kernel/doublefault_32.c
index 40978af630e7..40978af630e7 100644
--- a/arch/i386/kernel/doublefault.c
+++ b/arch/x86/kernel/doublefault_32.c
diff --git a/arch/i386/kernel/e820.c b/arch/x86/kernel/e820_32.c
index 3c86b979a40a..3c86b979a40a 100644
--- a/arch/i386/kernel/e820.c
+++ b/arch/x86/kernel/e820_32.c
diff --git a/arch/x86_64/kernel/e820.c b/arch/x86/kernel/e820_64.c
index 0f4d5e209e9b..0f4d5e209e9b 100644
--- a/arch/x86_64/kernel/e820.c
+++ b/arch/x86/kernel/e820_64.c
diff --git a/arch/x86_64/kernel/early-quirks.c b/arch/x86/kernel/early-quirks_64.c
index 13aa4fd728f3..13aa4fd728f3 100644
--- a/arch/x86_64/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks_64.c
diff --git a/arch/x86_64/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index fd9aff3f3890..fd9aff3f3890 100644
--- a/arch/x86_64/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
diff --git a/arch/i386/kernel/efi.c b/arch/x86/kernel/efi_32.c
index 2452c6fbe992..2452c6fbe992 100644
--- a/arch/i386/kernel/efi.c
+++ b/arch/x86/kernel/efi_32.c
diff --git a/arch/i386/kernel/efi_stub.S b/arch/x86/kernel/efi_stub_32.S
index ef00bb77d7e4..ef00bb77d7e4 100644
--- a/arch/i386/kernel/efi_stub.S
+++ b/arch/x86/kernel/efi_stub_32.S
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
new file mode 100644
index 000000000000..290b7bc82da3
--- /dev/null
+++ b/arch/x86/kernel/entry_32.S
@@ -0,0 +1,1112 @@
1/*
2 * linux/arch/i386/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 */
6
7/*
8 * entry.S contains the system-call and fault low-level handling routines.
9 * This also contains the timer-interrupt handler, as well as all interrupts
10 * and faults that can result in a task-switch.
11 *
12 * NOTE: This code handles signal-recognition, which happens every time
13 * after a timer-interrupt and after each system call.
14 *
15 * I changed all the .align's to 4 (16 byte alignment), as that's faster
16 * on a 486.
17 *
18 * Stack layout in 'syscall_exit':
19 * ptrace needs to have all regs on the stack.
20 * if the order here is changed, it needs to be
21 * updated in fork.c:copy_process, signal.c:do_signal,
22 * ptrace.c and ptrace.h
23 *
24 * 0(%esp) - %ebx
25 * 4(%esp) - %ecx
26 * 8(%esp) - %edx
27 * C(%esp) - %esi
28 * 10(%esp) - %edi
29 * 14(%esp) - %ebp
30 * 18(%esp) - %eax
31 * 1C(%esp) - %ds
32 * 20(%esp) - %es
33 * 24(%esp) - %fs
34 * 28(%esp) - orig_eax
35 * 2C(%esp) - %eip
36 * 30(%esp) - %cs
37 * 34(%esp) - %eflags
38 * 38(%esp) - %oldesp
39 * 3C(%esp) - %oldss
40 *
41 * "current" is in register %ebx during any slow entries.
42 */
43
44#include <linux/linkage.h>
45#include <asm/thread_info.h>
46#include <asm/irqflags.h>
47#include <asm/errno.h>
48#include <asm/segment.h>
49#include <asm/smp.h>
50#include <asm/page.h>
51#include <asm/desc.h>
52#include <asm/percpu.h>
53#include <asm/dwarf2.h>
54#include "irq_vectors.h"
55
56/*
57 * We use macros for low-level operations which need to be overridden
58 * for paravirtualization. The following will never clobber any registers:
59 * INTERRUPT_RETURN (aka. "iret")
60 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
61 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
62 *
63 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
64 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
65 * Allowing a register to be clobbered can shrink the paravirt replacement
66 * enough to patch inline, increasing performance.
67 */
68
69#define nr_syscalls ((syscall_table_size)/4)
70
71CF_MASK = 0x00000001
72TF_MASK = 0x00000100
73IF_MASK = 0x00000200
74DF_MASK = 0x00000400
75NT_MASK = 0x00004000
76VM_MASK = 0x00020000
77
78#ifdef CONFIG_PREEMPT
79#define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
80#else
81#define preempt_stop(clobbers)
82#define resume_kernel restore_nocheck
83#endif
84
85.macro TRACE_IRQS_IRET
86#ifdef CONFIG_TRACE_IRQFLAGS
87 testl $IF_MASK,PT_EFLAGS(%esp) # interrupts off?
88 jz 1f
89 TRACE_IRQS_ON
901:
91#endif
92.endm
93
94#ifdef CONFIG_VM86
95#define resume_userspace_sig check_userspace
96#else
97#define resume_userspace_sig resume_userspace
98#endif
99
100#define SAVE_ALL \
101 cld; \
102 pushl %fs; \
103 CFI_ADJUST_CFA_OFFSET 4;\
104 /*CFI_REL_OFFSET fs, 0;*/\
105 pushl %es; \
106 CFI_ADJUST_CFA_OFFSET 4;\
107 /*CFI_REL_OFFSET es, 0;*/\
108 pushl %ds; \
109 CFI_ADJUST_CFA_OFFSET 4;\
110 /*CFI_REL_OFFSET ds, 0;*/\
111 pushl %eax; \
112 CFI_ADJUST_CFA_OFFSET 4;\
113 CFI_REL_OFFSET eax, 0;\
114 pushl %ebp; \
115 CFI_ADJUST_CFA_OFFSET 4;\
116 CFI_REL_OFFSET ebp, 0;\
117 pushl %edi; \
118 CFI_ADJUST_CFA_OFFSET 4;\
119 CFI_REL_OFFSET edi, 0;\
120 pushl %esi; \
121 CFI_ADJUST_CFA_OFFSET 4;\
122 CFI_REL_OFFSET esi, 0;\
123 pushl %edx; \
124 CFI_ADJUST_CFA_OFFSET 4;\
125 CFI_REL_OFFSET edx, 0;\
126 pushl %ecx; \
127 CFI_ADJUST_CFA_OFFSET 4;\
128 CFI_REL_OFFSET ecx, 0;\
129 pushl %ebx; \
130 CFI_ADJUST_CFA_OFFSET 4;\
131 CFI_REL_OFFSET ebx, 0;\
132 movl $(__USER_DS), %edx; \
133 movl %edx, %ds; \
134 movl %edx, %es; \
135 movl $(__KERNEL_PERCPU), %edx; \
136 movl %edx, %fs
137
138#define RESTORE_INT_REGS \
139 popl %ebx; \
140 CFI_ADJUST_CFA_OFFSET -4;\
141 CFI_RESTORE ebx;\
142 popl %ecx; \
143 CFI_ADJUST_CFA_OFFSET -4;\
144 CFI_RESTORE ecx;\
145 popl %edx; \
146 CFI_ADJUST_CFA_OFFSET -4;\
147 CFI_RESTORE edx;\
148 popl %esi; \
149 CFI_ADJUST_CFA_OFFSET -4;\
150 CFI_RESTORE esi;\
151 popl %edi; \
152 CFI_ADJUST_CFA_OFFSET -4;\
153 CFI_RESTORE edi;\
154 popl %ebp; \
155 CFI_ADJUST_CFA_OFFSET -4;\
156 CFI_RESTORE ebp;\
157 popl %eax; \
158 CFI_ADJUST_CFA_OFFSET -4;\
159 CFI_RESTORE eax
160
161#define RESTORE_REGS \
162 RESTORE_INT_REGS; \
1631: popl %ds; \
164 CFI_ADJUST_CFA_OFFSET -4;\
165 /*CFI_RESTORE ds;*/\
1662: popl %es; \
167 CFI_ADJUST_CFA_OFFSET -4;\
168 /*CFI_RESTORE es;*/\
1693: popl %fs; \
170 CFI_ADJUST_CFA_OFFSET -4;\
171 /*CFI_RESTORE fs;*/\
172.pushsection .fixup,"ax"; \
1734: movl $0,(%esp); \
174 jmp 1b; \
1755: movl $0,(%esp); \
176 jmp 2b; \
1776: movl $0,(%esp); \
178 jmp 3b; \
179.section __ex_table,"a";\
180 .align 4; \
181 .long 1b,4b; \
182 .long 2b,5b; \
183 .long 3b,6b; \
184.popsection
185
186#define RING0_INT_FRAME \
187 CFI_STARTPROC simple;\
188 CFI_SIGNAL_FRAME;\
189 CFI_DEF_CFA esp, 3*4;\
190 /*CFI_OFFSET cs, -2*4;*/\
191 CFI_OFFSET eip, -3*4
192
193#define RING0_EC_FRAME \
194 CFI_STARTPROC simple;\
195 CFI_SIGNAL_FRAME;\
196 CFI_DEF_CFA esp, 4*4;\
197 /*CFI_OFFSET cs, -2*4;*/\
198 CFI_OFFSET eip, -3*4
199
200#define RING0_PTREGS_FRAME \
201 CFI_STARTPROC simple;\
202 CFI_SIGNAL_FRAME;\
203 CFI_DEF_CFA esp, PT_OLDESP-PT_EBX;\
204 /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/\
205 CFI_OFFSET eip, PT_EIP-PT_OLDESP;\
206 /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/\
207 /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/\
208 CFI_OFFSET eax, PT_EAX-PT_OLDESP;\
209 CFI_OFFSET ebp, PT_EBP-PT_OLDESP;\
210 CFI_OFFSET edi, PT_EDI-PT_OLDESP;\
211 CFI_OFFSET esi, PT_ESI-PT_OLDESP;\
212 CFI_OFFSET edx, PT_EDX-PT_OLDESP;\
213 CFI_OFFSET ecx, PT_ECX-PT_OLDESP;\
214 CFI_OFFSET ebx, PT_EBX-PT_OLDESP
215
216ENTRY(ret_from_fork)
217 CFI_STARTPROC
218 pushl %eax
219 CFI_ADJUST_CFA_OFFSET 4
220 call schedule_tail
221 GET_THREAD_INFO(%ebp)
222 popl %eax
223 CFI_ADJUST_CFA_OFFSET -4
224 pushl $0x0202 # Reset kernel eflags
225 CFI_ADJUST_CFA_OFFSET 4
226 popfl
227 CFI_ADJUST_CFA_OFFSET -4
228 jmp syscall_exit
229 CFI_ENDPROC
230END(ret_from_fork)
231
232/*
233 * Return to user mode is not as complex as all this looks,
234 * but we want the default path for a system call return to
235 * go as quickly as possible which is why some of this is
236 * less clear than it otherwise should be.
237 */
238
239 # userspace resumption stub bypassing syscall exit tracing
240 ALIGN
241 RING0_PTREGS_FRAME
242ret_from_exception:
243 preempt_stop(CLBR_ANY)
244ret_from_intr:
245 GET_THREAD_INFO(%ebp)
246check_userspace:
247 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
248 movb PT_CS(%esp), %al
249 andl $(VM_MASK | SEGMENT_RPL_MASK), %eax
250 cmpl $USER_RPL, %eax
251 jb resume_kernel # not returning to v8086 or userspace
252
253ENTRY(resume_userspace)
254 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
255 # setting need_resched or sigpending
256 # between sampling and the iret
257 movl TI_flags(%ebp), %ecx
258 andl $_TIF_WORK_MASK, %ecx # is there any work to be done on
259 # int/exception return?
260 jne work_pending
261 jmp restore_all
262END(ret_from_exception)
263
264#ifdef CONFIG_PREEMPT
265ENTRY(resume_kernel)
266 DISABLE_INTERRUPTS(CLBR_ANY)
267 cmpl $0,TI_preempt_count(%ebp) # non-zero preempt_count ?
268 jnz restore_nocheck
269need_resched:
270 movl TI_flags(%ebp), %ecx # need_resched set ?
271 testb $_TIF_NEED_RESCHED, %cl
272 jz restore_all
273 testl $IF_MASK,PT_EFLAGS(%esp) # interrupts off (exception path) ?
274 jz restore_all
275 call preempt_schedule_irq
276 jmp need_resched
277END(resume_kernel)
278#endif
279 CFI_ENDPROC
280
281/* SYSENTER_RETURN points to after the "sysenter" instruction in
282 the vsyscall page. See vsyscall-sysentry.S, which defines the symbol. */
283
284 # sysenter call handler stub
285ENTRY(sysenter_entry)
286 CFI_STARTPROC simple
287 CFI_SIGNAL_FRAME
288 CFI_DEF_CFA esp, 0
289 CFI_REGISTER esp, ebp
290 movl TSS_sysenter_esp0(%esp),%esp
291sysenter_past_esp:
292 /*
293 * No need to follow this irqs on/off section: the syscall
294 * disabled irqs and here we enable it straight after entry:
295 */
296 ENABLE_INTERRUPTS(CLBR_NONE)
297 pushl $(__USER_DS)
298 CFI_ADJUST_CFA_OFFSET 4
299 /*CFI_REL_OFFSET ss, 0*/
300 pushl %ebp
301 CFI_ADJUST_CFA_OFFSET 4
302 CFI_REL_OFFSET esp, 0
303 pushfl
304 CFI_ADJUST_CFA_OFFSET 4
305 pushl $(__USER_CS)
306 CFI_ADJUST_CFA_OFFSET 4
307 /*CFI_REL_OFFSET cs, 0*/
308 /*
309 * Push current_thread_info()->sysenter_return to the stack.
310 * A tiny bit of offset fixup is necessary - 4*4 means the 4 words
311 * pushed above; +8 corresponds to copy_thread's esp0 setting.
312 */
313 pushl (TI_sysenter_return-THREAD_SIZE+8+4*4)(%esp)
314 CFI_ADJUST_CFA_OFFSET 4
315 CFI_REL_OFFSET eip, 0
316
317/*
318 * Load the potential sixth argument from user stack.
319 * Careful about security.
320 */
321 cmpl $__PAGE_OFFSET-3,%ebp
322 jae syscall_fault
3231: movl (%ebp),%ebp
324.section __ex_table,"a"
325 .align 4
326 .long 1b,syscall_fault
327.previous
328
329 pushl %eax
330 CFI_ADJUST_CFA_OFFSET 4
331 SAVE_ALL
332 GET_THREAD_INFO(%ebp)
333
334 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
335 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
336 jnz syscall_trace_entry
337 cmpl $(nr_syscalls), %eax
338 jae syscall_badsys
339 call *sys_call_table(,%eax,4)
340 movl %eax,PT_EAX(%esp)
341 DISABLE_INTERRUPTS(CLBR_ANY)
342 TRACE_IRQS_OFF
343 movl TI_flags(%ebp), %ecx
344 testw $_TIF_ALLWORK_MASK, %cx
345 jne syscall_exit_work
346/* if something modifies registers it must also disable sysexit */
347 movl PT_EIP(%esp), %edx
348 movl PT_OLDESP(%esp), %ecx
349 xorl %ebp,%ebp
350 TRACE_IRQS_ON
3511: mov PT_FS(%esp), %fs
352 ENABLE_INTERRUPTS_SYSEXIT
353 CFI_ENDPROC
354.pushsection .fixup,"ax"
3552: movl $0,PT_FS(%esp)
356 jmp 1b
357.section __ex_table,"a"
358 .align 4
359 .long 1b,2b
360.popsection
361ENDPROC(sysenter_entry)
362
363 # system call handler stub
364ENTRY(system_call)
365 RING0_INT_FRAME # can't unwind into user space anyway
366 pushl %eax # save orig_eax
367 CFI_ADJUST_CFA_OFFSET 4
368 SAVE_ALL
369 GET_THREAD_INFO(%ebp)
370 # system call tracing in operation / emulation
371 /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
372 testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
373 jnz syscall_trace_entry
374 cmpl $(nr_syscalls), %eax
375 jae syscall_badsys
376syscall_call:
377 call *sys_call_table(,%eax,4)
378 movl %eax,PT_EAX(%esp) # store the return value
379syscall_exit:
380 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
381 # setting need_resched or sigpending
382 # between sampling and the iret
383 TRACE_IRQS_OFF
384 testl $TF_MASK,PT_EFLAGS(%esp) # If tracing set singlestep flag on exit
385 jz no_singlestep
386 orl $_TIF_SINGLESTEP,TI_flags(%ebp)
387no_singlestep:
388 movl TI_flags(%ebp), %ecx
389 testw $_TIF_ALLWORK_MASK, %cx # current->work
390 jne syscall_exit_work
391
392restore_all:
393 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
394 # Warning: PT_OLDSS(%esp) contains the wrong/random values if we
395 # are returning to the kernel.
396 # See comments in process.c:copy_thread() for details.
397 movb PT_OLDSS(%esp), %ah
398 movb PT_CS(%esp), %al
399 andl $(VM_MASK | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
400 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
401 CFI_REMEMBER_STATE
402 je ldt_ss # returning to user-space with LDT SS
403restore_nocheck:
404 TRACE_IRQS_IRET
405restore_nocheck_notrace:
406 RESTORE_REGS
407 addl $4, %esp # skip orig_eax/error_code
408 CFI_ADJUST_CFA_OFFSET -4
4091: INTERRUPT_RETURN
410.section .fixup,"ax"
411iret_exc:
412 pushl $0 # no error code
413 pushl $do_iret_error
414 jmp error_code
415.previous
416.section __ex_table,"a"
417 .align 4
418 .long 1b,iret_exc
419.previous
420
421 CFI_RESTORE_STATE
422ldt_ss:
423 larl PT_OLDSS(%esp), %eax
424 jnz restore_nocheck
425 testl $0x00400000, %eax # returning to 32bit stack?
426 jnz restore_nocheck # allright, normal return
427
428#ifdef CONFIG_PARAVIRT
429 /*
430 * The kernel can't run on a non-flat stack if paravirt mode
431 * is active. Rather than try to fixup the high bits of
432 * ESP, bypass this code entirely. This may break DOSemu
433 * and/or Wine support in a paravirt VM, although the option
434 * is still available to implement the setting of the high
435 * 16-bits in the INTERRUPT_RETURN paravirt-op.
436 */
437 cmpl $0, paravirt_ops+PARAVIRT_enabled
438 jne restore_nocheck
439#endif
440
441 /* If returning to userspace with 16bit stack,
442 * try to fix the higher word of ESP, as the CPU
443 * won't restore it.
444 * This is an "official" bug of all the x86-compatible
445 * CPUs, which we can try to work around to make
446 * dosemu and wine happy. */
447 movl PT_OLDESP(%esp), %eax
448 movl %esp, %edx
449 call patch_espfix_desc
450 pushl $__ESPFIX_SS
451 CFI_ADJUST_CFA_OFFSET 4
452 pushl %eax
453 CFI_ADJUST_CFA_OFFSET 4
454 DISABLE_INTERRUPTS(CLBR_EAX)
455 TRACE_IRQS_OFF
456 lss (%esp), %esp
457 CFI_ADJUST_CFA_OFFSET -8
458 jmp restore_nocheck
459 CFI_ENDPROC
460ENDPROC(system_call)
461
462 # perform work that needs to be done immediately before resumption
463 ALIGN
464 RING0_PTREGS_FRAME # can't unwind into user space anyway
465work_pending:
466 testb $_TIF_NEED_RESCHED, %cl
467 jz work_notifysig
468work_resched:
469 call schedule
470 DISABLE_INTERRUPTS(CLBR_ANY) # make sure we don't miss an interrupt
471 # setting need_resched or sigpending
472 # between sampling and the iret
473 TRACE_IRQS_OFF
474 movl TI_flags(%ebp), %ecx
475 andl $_TIF_WORK_MASK, %ecx # is there any work to be done other
476 # than syscall tracing?
477 jz restore_all
478 testb $_TIF_NEED_RESCHED, %cl
479 jnz work_resched
480
481work_notifysig: # deal with pending signals and
482 # notify-resume requests
483#ifdef CONFIG_VM86
484 testl $VM_MASK, PT_EFLAGS(%esp)
485 movl %esp, %eax
486 jne work_notifysig_v86 # returning to kernel-space or
487 # vm86-space
488 xorl %edx, %edx
489 call do_notify_resume
490 jmp resume_userspace_sig
491
492 ALIGN
493work_notifysig_v86:
494 pushl %ecx # save ti_flags for do_notify_resume
495 CFI_ADJUST_CFA_OFFSET 4
496 call save_v86_state # %eax contains pt_regs pointer
497 popl %ecx
498 CFI_ADJUST_CFA_OFFSET -4
499 movl %eax, %esp
500#else
501 movl %esp, %eax
502#endif
503 xorl %edx, %edx
504 call do_notify_resume
505 jmp resume_userspace_sig
506END(work_pending)
507
508 # perform syscall exit tracing
509 ALIGN
510syscall_trace_entry:
511 movl $-ENOSYS,PT_EAX(%esp)
512 movl %esp, %eax
513 xorl %edx,%edx
514 call do_syscall_trace
515 cmpl $0, %eax
516 jne resume_userspace # ret != 0 -> running under PTRACE_SYSEMU,
517 # so must skip actual syscall
518 movl PT_ORIG_EAX(%esp), %eax
519 cmpl $(nr_syscalls), %eax
520 jnae syscall_call
521 jmp syscall_exit
522END(syscall_trace_entry)
523
524 # perform syscall exit tracing
525 ALIGN
526syscall_exit_work:
527 testb $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP), %cl
528 jz work_pending
529 TRACE_IRQS_ON
530 ENABLE_INTERRUPTS(CLBR_ANY) # could let do_syscall_trace() call
531 # schedule() instead
532 movl %esp, %eax
533 movl $1, %edx
534 call do_syscall_trace
535 jmp resume_userspace
536END(syscall_exit_work)
537 CFI_ENDPROC
538
539 RING0_INT_FRAME # can't unwind into user space anyway
540syscall_fault:
541 pushl %eax # save orig_eax
542 CFI_ADJUST_CFA_OFFSET 4
543 SAVE_ALL
544 GET_THREAD_INFO(%ebp)
545 movl $-EFAULT,PT_EAX(%esp)
546 jmp resume_userspace
547END(syscall_fault)
548
549syscall_badsys:
550 movl $-ENOSYS,PT_EAX(%esp)
551 jmp resume_userspace
552END(syscall_badsys)
553 CFI_ENDPROC
554
555#define FIXUP_ESPFIX_STACK \
556 /* since we are on a wrong stack, we cant make it a C code :( */ \
557 PER_CPU(gdt_page, %ebx); \
558 GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah); \
559 addl %esp, %eax; \
560 pushl $__KERNEL_DS; \
561 CFI_ADJUST_CFA_OFFSET 4; \
562 pushl %eax; \
563 CFI_ADJUST_CFA_OFFSET 4; \
564 lss (%esp), %esp; \
565 CFI_ADJUST_CFA_OFFSET -8;
566#define UNWIND_ESPFIX_STACK \
567 movl %ss, %eax; \
568 /* see if on espfix stack */ \
569 cmpw $__ESPFIX_SS, %ax; \
570 jne 27f; \
571 movl $__KERNEL_DS, %eax; \
572 movl %eax, %ds; \
573 movl %eax, %es; \
574 /* switch to normal stack */ \
575 FIXUP_ESPFIX_STACK; \
57627:;
577
578/*
579 * Build the entry stubs and pointer table with
580 * some assembler magic.
581 */
582.data
583ENTRY(interrupt)
584.text
585
586ENTRY(irq_entries_start)
587 RING0_INT_FRAME
588vector=0
589.rept NR_IRQS
590 ALIGN
591 .if vector
592 CFI_ADJUST_CFA_OFFSET -4
593 .endif
5941: pushl $~(vector)
595 CFI_ADJUST_CFA_OFFSET 4
596 jmp common_interrupt
597 .previous
598 .long 1b
599 .text
600vector=vector+1
601.endr
602END(irq_entries_start)
603
604.previous
605END(interrupt)
606.previous
607
608/*
609 * the CPU automatically disables interrupts when executing an IRQ vector,
610 * so IRQ-flags tracing has to follow that:
611 */
612 ALIGN
613common_interrupt:
614 SAVE_ALL
615 TRACE_IRQS_OFF
616 movl %esp,%eax
617 call do_IRQ
618 jmp ret_from_intr
619ENDPROC(common_interrupt)
620 CFI_ENDPROC
621
622#define BUILD_INTERRUPT(name, nr) \
623ENTRY(name) \
624 RING0_INT_FRAME; \
625 pushl $~(nr); \
626 CFI_ADJUST_CFA_OFFSET 4; \
627 SAVE_ALL; \
628 TRACE_IRQS_OFF \
629 movl %esp,%eax; \
630 call smp_##name; \
631 jmp ret_from_intr; \
632 CFI_ENDPROC; \
633ENDPROC(name)
634
635/* The include is where all of the SMP etc. interrupts come from */
636#include "entry_arch.h"
637
638KPROBE_ENTRY(page_fault)
639 RING0_EC_FRAME
640 pushl $do_page_fault
641 CFI_ADJUST_CFA_OFFSET 4
642 ALIGN
643error_code:
644 /* the function address is in %fs's slot on the stack */
645 pushl %es
646 CFI_ADJUST_CFA_OFFSET 4
647 /*CFI_REL_OFFSET es, 0*/
648 pushl %ds
649 CFI_ADJUST_CFA_OFFSET 4
650 /*CFI_REL_OFFSET ds, 0*/
651 pushl %eax
652 CFI_ADJUST_CFA_OFFSET 4
653 CFI_REL_OFFSET eax, 0
654 pushl %ebp
655 CFI_ADJUST_CFA_OFFSET 4
656 CFI_REL_OFFSET ebp, 0
657 pushl %edi
658 CFI_ADJUST_CFA_OFFSET 4
659 CFI_REL_OFFSET edi, 0
660 pushl %esi
661 CFI_ADJUST_CFA_OFFSET 4
662 CFI_REL_OFFSET esi, 0
663 pushl %edx
664 CFI_ADJUST_CFA_OFFSET 4
665 CFI_REL_OFFSET edx, 0
666 pushl %ecx
667 CFI_ADJUST_CFA_OFFSET 4
668 CFI_REL_OFFSET ecx, 0
669 pushl %ebx
670 CFI_ADJUST_CFA_OFFSET 4
671 CFI_REL_OFFSET ebx, 0
672 cld
673 pushl %fs
674 CFI_ADJUST_CFA_OFFSET 4
675 /*CFI_REL_OFFSET fs, 0*/
676 movl $(__KERNEL_PERCPU), %ecx
677 movl %ecx, %fs
678 UNWIND_ESPFIX_STACK
679 popl %ecx
680 CFI_ADJUST_CFA_OFFSET -4
681 /*CFI_REGISTER es, ecx*/
682 movl PT_FS(%esp), %edi # get the function address
683 movl PT_ORIG_EAX(%esp), %edx # get the error code
684 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
685 mov %ecx, PT_FS(%esp)
686 /*CFI_REL_OFFSET fs, ES*/
687 movl $(__USER_DS), %ecx
688 movl %ecx, %ds
689 movl %ecx, %es
690 movl %esp,%eax # pt_regs pointer
691 call *%edi
692 jmp ret_from_exception
693 CFI_ENDPROC
694KPROBE_END(page_fault)
695
696ENTRY(coprocessor_error)
697 RING0_INT_FRAME
698 pushl $0
699 CFI_ADJUST_CFA_OFFSET 4
700 pushl $do_coprocessor_error
701 CFI_ADJUST_CFA_OFFSET 4
702 jmp error_code
703 CFI_ENDPROC
704END(coprocessor_error)
705
706ENTRY(simd_coprocessor_error)
707 RING0_INT_FRAME
708 pushl $0
709 CFI_ADJUST_CFA_OFFSET 4
710 pushl $do_simd_coprocessor_error
711 CFI_ADJUST_CFA_OFFSET 4
712 jmp error_code
713 CFI_ENDPROC
714END(simd_coprocessor_error)
715
716ENTRY(device_not_available)
717 RING0_INT_FRAME
718 pushl $-1 # mark this as an int
719 CFI_ADJUST_CFA_OFFSET 4
720 SAVE_ALL
721 GET_CR0_INTO_EAX
722 testl $0x4, %eax # EM (math emulation bit)
723 jne device_not_available_emulate
724 preempt_stop(CLBR_ANY)
725 call math_state_restore
726 jmp ret_from_exception
727device_not_available_emulate:
728 pushl $0 # temporary storage for ORIG_EIP
729 CFI_ADJUST_CFA_OFFSET 4
730 call math_emulate
731 addl $4, %esp
732 CFI_ADJUST_CFA_OFFSET -4
733 jmp ret_from_exception
734 CFI_ENDPROC
735END(device_not_available)
736
737/*
738 * Debug traps and NMI can happen at the one SYSENTER instruction
739 * that sets up the real kernel stack. Check here, since we can't
740 * allow the wrong stack to be used.
741 *
742 * "TSS_sysenter_esp0+12" is because the NMI/debug handler will have
743 * already pushed 3 words if it hits on the sysenter instruction:
744 * eflags, cs and eip.
745 *
746 * We just load the right stack, and push the three (known) values
747 * by hand onto the new stack - while updating the return eip past
748 * the instruction that would have done it for sysenter.
749 */
750#define FIX_STACK(offset, ok, label) \
751 cmpw $__KERNEL_CS,4(%esp); \
752 jne ok; \
753label: \
754 movl TSS_sysenter_esp0+offset(%esp),%esp; \
755 CFI_DEF_CFA esp, 0; \
756 CFI_UNDEFINED eip; \
757 pushfl; \
758 CFI_ADJUST_CFA_OFFSET 4; \
759 pushl $__KERNEL_CS; \
760 CFI_ADJUST_CFA_OFFSET 4; \
761 pushl $sysenter_past_esp; \
762 CFI_ADJUST_CFA_OFFSET 4; \
763 CFI_REL_OFFSET eip, 0
764
765KPROBE_ENTRY(debug)
766 RING0_INT_FRAME
767 cmpl $sysenter_entry,(%esp)
768 jne debug_stack_correct
769 FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn)
770debug_stack_correct:
771 pushl $-1 # mark this as an int
772 CFI_ADJUST_CFA_OFFSET 4
773 SAVE_ALL
774 xorl %edx,%edx # error code 0
775 movl %esp,%eax # pt_regs pointer
776 call do_debug
777 jmp ret_from_exception
778 CFI_ENDPROC
779KPROBE_END(debug)
780
781/*
782 * NMI is doubly nasty. It can happen _while_ we're handling
783 * a debug fault, and the debug fault hasn't yet been able to
784 * clear up the stack. So we first check whether we got an
785 * NMI on the sysenter entry path, but after that we need to
786 * check whether we got an NMI on the debug path where the debug
787 * fault happened on the sysenter path.
788 */
789KPROBE_ENTRY(nmi)
790 RING0_INT_FRAME
791 pushl %eax
792 CFI_ADJUST_CFA_OFFSET 4
793 movl %ss, %eax
794 cmpw $__ESPFIX_SS, %ax
795 popl %eax
796 CFI_ADJUST_CFA_OFFSET -4
797 je nmi_espfix_stack
798 cmpl $sysenter_entry,(%esp)
799 je nmi_stack_fixup
800 pushl %eax
801 CFI_ADJUST_CFA_OFFSET 4
802 movl %esp,%eax
803 /* Do not access memory above the end of our stack page,
804 * it might not exist.
805 */
806 andl $(THREAD_SIZE-1),%eax
807 cmpl $(THREAD_SIZE-20),%eax
808 popl %eax
809 CFI_ADJUST_CFA_OFFSET -4
810 jae nmi_stack_correct
811 cmpl $sysenter_entry,12(%esp)
812 je nmi_debug_stack_check
813nmi_stack_correct:
814 /* We have a RING0_INT_FRAME here */
815 pushl %eax
816 CFI_ADJUST_CFA_OFFSET 4
817 SAVE_ALL
818 xorl %edx,%edx # zero error code
819 movl %esp,%eax # pt_regs pointer
820 call do_nmi
821 jmp restore_nocheck_notrace
822 CFI_ENDPROC
823
824nmi_stack_fixup:
825 RING0_INT_FRAME
826 FIX_STACK(12,nmi_stack_correct, 1)
827 jmp nmi_stack_correct
828
829nmi_debug_stack_check:
830 /* We have a RING0_INT_FRAME here */
831 cmpw $__KERNEL_CS,16(%esp)
832 jne nmi_stack_correct
833 cmpl $debug,(%esp)
834 jb nmi_stack_correct
835 cmpl $debug_esp_fix_insn,(%esp)
836 ja nmi_stack_correct
837 FIX_STACK(24,nmi_stack_correct, 1)
838 jmp nmi_stack_correct
839
840nmi_espfix_stack:
841 /* We have a RING0_INT_FRAME here.
842 *
843 * create the pointer to lss back
844 */
845 pushl %ss
846 CFI_ADJUST_CFA_OFFSET 4
847 pushl %esp
848 CFI_ADJUST_CFA_OFFSET 4
849 addw $4, (%esp)
850 /* copy the iret frame of 12 bytes */
851 .rept 3
852 pushl 16(%esp)
853 CFI_ADJUST_CFA_OFFSET 4
854 .endr
855 pushl %eax
856 CFI_ADJUST_CFA_OFFSET 4
857 SAVE_ALL
858 FIXUP_ESPFIX_STACK # %eax == %esp
859 xorl %edx,%edx # zero error code
860 call do_nmi
861 RESTORE_REGS
862 lss 12+4(%esp), %esp # back to espfix stack
863 CFI_ADJUST_CFA_OFFSET -24
8641: INTERRUPT_RETURN
865 CFI_ENDPROC
866.section __ex_table,"a"
867 .align 4
868 .long 1b,iret_exc
869.previous
870KPROBE_END(nmi)
871
872#ifdef CONFIG_PARAVIRT
873ENTRY(native_iret)
8741: iret
875.section __ex_table,"a"
876 .align 4
877 .long 1b,iret_exc
878.previous
879END(native_iret)
880
881ENTRY(native_irq_enable_sysexit)
882 sti
883 sysexit
884END(native_irq_enable_sysexit)
885#endif
886
887KPROBE_ENTRY(int3)
888 RING0_INT_FRAME
889 pushl $-1 # mark this as an int
890 CFI_ADJUST_CFA_OFFSET 4
891 SAVE_ALL
892 xorl %edx,%edx # zero error code
893 movl %esp,%eax # pt_regs pointer
894 call do_int3
895 jmp ret_from_exception
896 CFI_ENDPROC
897KPROBE_END(int3)
898
899ENTRY(overflow)
900 RING0_INT_FRAME
901 pushl $0
902 CFI_ADJUST_CFA_OFFSET 4
903 pushl $do_overflow
904 CFI_ADJUST_CFA_OFFSET 4
905 jmp error_code
906 CFI_ENDPROC
907END(overflow)
908
909ENTRY(bounds)
910 RING0_INT_FRAME
911 pushl $0
912 CFI_ADJUST_CFA_OFFSET 4
913 pushl $do_bounds
914 CFI_ADJUST_CFA_OFFSET 4
915 jmp error_code
916 CFI_ENDPROC
917END(bounds)
918
919ENTRY(invalid_op)
920 RING0_INT_FRAME
921 pushl $0
922 CFI_ADJUST_CFA_OFFSET 4
923 pushl $do_invalid_op
924 CFI_ADJUST_CFA_OFFSET 4
925 jmp error_code
926 CFI_ENDPROC
927END(invalid_op)
928
929ENTRY(coprocessor_segment_overrun)
930 RING0_INT_FRAME
931 pushl $0
932 CFI_ADJUST_CFA_OFFSET 4
933 pushl $do_coprocessor_segment_overrun
934 CFI_ADJUST_CFA_OFFSET 4
935 jmp error_code
936 CFI_ENDPROC
937END(coprocessor_segment_overrun)
938
939ENTRY(invalid_TSS)
940 RING0_EC_FRAME
941 pushl $do_invalid_TSS
942 CFI_ADJUST_CFA_OFFSET 4
943 jmp error_code
944 CFI_ENDPROC
945END(invalid_TSS)
946
947ENTRY(segment_not_present)
948 RING0_EC_FRAME
949 pushl $do_segment_not_present
950 CFI_ADJUST_CFA_OFFSET 4
951 jmp error_code
952 CFI_ENDPROC
953END(segment_not_present)
954
955ENTRY(stack_segment)
956 RING0_EC_FRAME
957 pushl $do_stack_segment
958 CFI_ADJUST_CFA_OFFSET 4
959 jmp error_code
960 CFI_ENDPROC
961END(stack_segment)
962
963KPROBE_ENTRY(general_protection)
964 RING0_EC_FRAME
965 pushl $do_general_protection
966 CFI_ADJUST_CFA_OFFSET 4
967 jmp error_code
968 CFI_ENDPROC
969KPROBE_END(general_protection)
970
971ENTRY(alignment_check)
972 RING0_EC_FRAME
973 pushl $do_alignment_check
974 CFI_ADJUST_CFA_OFFSET 4
975 jmp error_code
976 CFI_ENDPROC
977END(alignment_check)
978
979ENTRY(divide_error)
980 RING0_INT_FRAME
981 pushl $0 # no error code
982 CFI_ADJUST_CFA_OFFSET 4
983 pushl $do_divide_error
984 CFI_ADJUST_CFA_OFFSET 4
985 jmp error_code
986 CFI_ENDPROC
987END(divide_error)
988
989#ifdef CONFIG_X86_MCE
990ENTRY(machine_check)
991 RING0_INT_FRAME
992 pushl $0
993 CFI_ADJUST_CFA_OFFSET 4
994 pushl machine_check_vector
995 CFI_ADJUST_CFA_OFFSET 4
996 jmp error_code
997 CFI_ENDPROC
998END(machine_check)
999#endif
1000
1001ENTRY(spurious_interrupt_bug)
1002 RING0_INT_FRAME
1003 pushl $0
1004 CFI_ADJUST_CFA_OFFSET 4
1005 pushl $do_spurious_interrupt_bug
1006 CFI_ADJUST_CFA_OFFSET 4
1007 jmp error_code
1008 CFI_ENDPROC
1009END(spurious_interrupt_bug)
1010
1011ENTRY(kernel_thread_helper)
1012 pushl $0 # fake return address for unwinder
1013 CFI_STARTPROC
1014 movl %edx,%eax
1015 push %edx
1016 CFI_ADJUST_CFA_OFFSET 4
1017 call *%ebx
1018 push %eax
1019 CFI_ADJUST_CFA_OFFSET 4
1020 call do_exit
1021 CFI_ENDPROC
1022ENDPROC(kernel_thread_helper)
1023
1024#ifdef CONFIG_XEN
1025ENTRY(xen_hypervisor_callback)
1026 CFI_STARTPROC
1027 pushl $0
1028 CFI_ADJUST_CFA_OFFSET 4
1029 SAVE_ALL
1030 TRACE_IRQS_OFF
1031
1032 /* Check to see if we got the event in the critical
1033 region in xen_iret_direct, after we've reenabled
1034 events and checked for pending events. This simulates
1035 iret instruction's behaviour where it delivers a
1036 pending interrupt when enabling interrupts. */
1037 movl PT_EIP(%esp),%eax
1038 cmpl $xen_iret_start_crit,%eax
1039 jb 1f
1040 cmpl $xen_iret_end_crit,%eax
1041 jae 1f
1042
1043 call xen_iret_crit_fixup
1044
10451: mov %esp, %eax
1046 call xen_evtchn_do_upcall
1047 jmp ret_from_intr
1048 CFI_ENDPROC
1049ENDPROC(xen_hypervisor_callback)
1050
1051# Hypervisor uses this for application faults while it executes.
1052# We get here for two reasons:
1053# 1. Fault while reloading DS, ES, FS or GS
1054# 2. Fault while executing IRET
1055# Category 1 we fix up by reattempting the load, and zeroing the segment
1056# register if the load fails.
1057# Category 2 we fix up by jumping to do_iret_error. We cannot use the
1058# normal Linux return path in this case because if we use the IRET hypercall
1059# to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1060# We distinguish between categories by maintaining a status value in EAX.
1061ENTRY(xen_failsafe_callback)
1062 CFI_STARTPROC
1063 pushl %eax
1064 CFI_ADJUST_CFA_OFFSET 4
1065 movl $1,%eax
10661: mov 4(%esp),%ds
10672: mov 8(%esp),%es
10683: mov 12(%esp),%fs
10694: mov 16(%esp),%gs
1070 testl %eax,%eax
1071 popl %eax
1072 CFI_ADJUST_CFA_OFFSET -4
1073 lea 16(%esp),%esp
1074 CFI_ADJUST_CFA_OFFSET -16
1075 jz 5f
1076 addl $16,%esp
1077 jmp iret_exc # EAX != 0 => Category 2 (Bad IRET)
10785: pushl $0 # EAX == 0 => Category 1 (Bad segment)
1079 CFI_ADJUST_CFA_OFFSET 4
1080 SAVE_ALL
1081 jmp ret_from_exception
1082 CFI_ENDPROC
1083
1084.section .fixup,"ax"
10856: xorl %eax,%eax
1086 movl %eax,4(%esp)
1087 jmp 1b
10887: xorl %eax,%eax
1089 movl %eax,8(%esp)
1090 jmp 2b
10918: xorl %eax,%eax
1092 movl %eax,12(%esp)
1093 jmp 3b
10949: xorl %eax,%eax
1095 movl %eax,16(%esp)
1096 jmp 4b
1097.previous
1098.section __ex_table,"a"
1099 .align 4
1100 .long 1b,6b
1101 .long 2b,7b
1102 .long 3b,8b
1103 .long 4b,9b
1104.previous
1105ENDPROC(xen_failsafe_callback)
1106
1107#endif /* CONFIG_XEN */
1108
1109.section .rodata,"a"
1110#include "syscall_table_32.S"
1111
1112syscall_table_size=(.-sys_call_table)
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86/kernel/entry_64.S
index 1d232e5f5658..1d232e5f5658 100644
--- a/arch/x86_64/kernel/entry.S
+++ b/arch/x86/kernel/entry_64.S
diff --git a/arch/x86_64/kernel/genapic.c b/arch/x86/kernel/genapic_64.c
index 47496a40e84f..47496a40e84f 100644
--- a/arch/x86_64/kernel/genapic.c
+++ b/arch/x86/kernel/genapic_64.c
diff --git a/arch/x86_64/kernel/genapic_flat.c b/arch/x86/kernel/genapic_flat_64.c
index ecb01eefdd27..ecb01eefdd27 100644
--- a/arch/x86_64/kernel/genapic_flat.c
+++ b/arch/x86/kernel/genapic_flat_64.c
diff --git a/arch/i386/kernel/geode.c b/arch/x86/kernel/geode_32.c
index 41e8aec4c61d..41e8aec4c61d 100644
--- a/arch/i386/kernel/geode.c
+++ b/arch/x86/kernel/geode_32.c
diff --git a/arch/x86_64/kernel/head64.c b/arch/x86/kernel/head64.c
index 6c34bdd22e26..6c34bdd22e26 100644
--- a/arch/x86_64/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
new file mode 100644
index 000000000000..9150ca9b5f80
--- /dev/null
+++ b/arch/x86/kernel/head_32.S
@@ -0,0 +1,578 @@
1/*
2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/threads.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page.h>
15#include <asm/pgtable.h>
16#include <asm/desc.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21
22/*
23 * References to members of the new_cpu_data structure.
24 */
25
26#define X86 new_cpu_data+CPUINFO_x86
27#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
28#define X86_MODEL new_cpu_data+CPUINFO_x86_model
29#define X86_MASK new_cpu_data+CPUINFO_x86_mask
30#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
31#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
32#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
33#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
34
35/*
36 * This is how much memory *in addition to the memory covered up to
37 * and including _end* we need mapped initially.
38 * We need:
39 * - one bit for each possible page, but only in low memory, which means
40 * 2^32/4096/8 = 128K worst case (4G/4G split.)
41 * - enough space to map all low memory, which means
42 * (2^32/4096) / 1024 pages (worst case, non PAE)
43 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
44 * - a few pages for allocator use before the kernel pagetable has
45 * been set up
46 *
47 * Modulo rounding, each megabyte assigned here requires a kilobyte of
48 * memory, which is currently unreclaimed.
49 *
50 * This should be a multiple of a page.
51 */
52LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
53
54#if PTRS_PER_PMD > 1
55PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
56#else
57PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
58#endif
59BOOTBITMAP_SIZE = LOW_PAGES / 8
60ALLOCATOR_SLOP = 4
61
62INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
63
64/*
65 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
66 * %esi points to the real-mode code as a 32-bit pointer.
67 * CS and DS must be 4 GB flat segments, but we don't depend on
68 * any particular GDT layout, because we load our own as soon as we
69 * can.
70 */
71.section .text.head,"ax",@progbits
72ENTRY(startup_32)
73
74/*
75 * Set segments to known values.
76 */
77 cld
78 lgdt boot_gdt_descr - __PAGE_OFFSET
79 movl $(__BOOT_DS),%eax
80 movl %eax,%ds
81 movl %eax,%es
82 movl %eax,%fs
83 movl %eax,%gs
84
85/*
86 * Clear BSS first so that there are no surprises...
87 * No need to cld as DF is already clear from cld above...
88 */
89 xorl %eax,%eax
90 movl $__bss_start - __PAGE_OFFSET,%edi
91 movl $__bss_stop - __PAGE_OFFSET,%ecx
92 subl %edi,%ecx
93 shrl $2,%ecx
94 rep ; stosl
95/*
96 * Copy bootup parameters out of the way.
97 * Note: %esi still has the pointer to the real-mode data.
98 * With the kexec as boot loader, parameter segment might be loaded beyond
99 * kernel image and might not even be addressable by early boot page tables.
100 * (kexec on panic case). Hence copy out the parameters before initializing
101 * page tables.
102 */
103 movl $(boot_params - __PAGE_OFFSET),%edi
104 movl $(PARAM_SIZE/4),%ecx
105 cld
106 rep
107 movsl
108 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
109 andl %esi,%esi
110 jnz 2f # New command line protocol
111 cmpw $(OLD_CL_MAGIC),OLD_CL_MAGIC_ADDR
112 jne 1f
113 movzwl OLD_CL_OFFSET,%esi
114 addl $(OLD_CL_BASE_ADDR),%esi
1152:
116 movl $(boot_command_line - __PAGE_OFFSET),%edi
117 movl $(COMMAND_LINE_SIZE/4),%ecx
118 rep
119 movsl
1201:
121
122/*
123 * Initialize page tables. This creates a PDE and a set of page
124 * tables, which are located immediately beyond _end. The variable
125 * init_pg_tables_end is set up to point to the first "safe" location.
126 * Mappings are created both at virtual address 0 (identity mapping)
127 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
128 *
129 * Warning: don't use %esi or the stack in this code. However, %esp
130 * can be used as a GPR if you really need it...
131 */
132page_pde_offset = (__PAGE_OFFSET >> 20);
133
134 movl $(pg0 - __PAGE_OFFSET), %edi
135 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
136 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
13710:
138 leal 0x007(%edi),%ecx /* Create PDE entry */
139 movl %ecx,(%edx) /* Store identity PDE entry */
140 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
141 addl $4,%edx
142 movl $1024, %ecx
14311:
144 stosl
145 addl $0x1000,%eax
146 loop 11b
147 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
148 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
149 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
150 cmpl %ebp,%eax
151 jb 10b
152 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
153
154 xorl %ebx,%ebx /* This is the boot CPU (BSP) */
155 jmp 3f
156/*
157 * Non-boot CPU entry point; entered from trampoline.S
158 * We can't lgdt here, because lgdt itself uses a data segment, but
159 * we know the trampoline has already loaded the boot_gdt for us.
160 *
161 * If cpu hotplug is not supported then this code can go in init section
162 * which will be freed later
163 */
164
165#ifndef CONFIG_HOTPLUG_CPU
166.section .init.text,"ax",@progbits
167#endif
168
169 /* Do an early initialization of the fixmap area */
170 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
171 movl $(swapper_pg_pmd - __PAGE_OFFSET), %eax
172 addl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
173 movl %eax, 4092(%edx)
174
175#ifdef CONFIG_SMP
176ENTRY(startup_32_smp)
177 cld
178 movl $(__BOOT_DS),%eax
179 movl %eax,%ds
180 movl %eax,%es
181 movl %eax,%fs
182 movl %eax,%gs
183
184/*
185 * New page tables may be in 4Mbyte page mode and may
186 * be using the global pages.
187 *
188 * NOTE! If we are on a 486 we may have no cr4 at all!
189 * So we do not try to touch it unless we really have
190 * some bits in it to set. This won't work if the BSP
191 * implements cr4 but this AP does not -- very unlikely
192 * but be warned! The same applies to the pse feature
193 * if not equally supported. --macro
194 *
195 * NOTE! We have to correct for the fact that we're
196 * not yet offset PAGE_OFFSET..
197 */
198#define cr4_bits mmu_cr4_features-__PAGE_OFFSET
199 movl cr4_bits,%edx
200 andl %edx,%edx
201 jz 6f
202 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
203 orl %edx,%eax
204 movl %eax,%cr4
205
206 btl $5, %eax # check if PAE is enabled
207 jnc 6f
208
209 /* Check if extended functions are implemented */
210 movl $0x80000000, %eax
211 cpuid
212 cmpl $0x80000000, %eax
213 jbe 6f
214 mov $0x80000001, %eax
215 cpuid
216 /* Execute Disable bit supported? */
217 btl $20, %edx
218 jnc 6f
219
220 /* Setup EFER (Extended Feature Enable Register) */
221 movl $0xc0000080, %ecx
222 rdmsr
223
224 btsl $11, %eax
225 /* Make changes effective */
226 wrmsr
227
2286:
229 /* This is a secondary processor (AP) */
230 xorl %ebx,%ebx
231 incl %ebx
232
233#endif /* CONFIG_SMP */
2343:
235
236/*
237 * Enable paging
238 */
239 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
240 movl %eax,%cr3 /* set the page table pointer.. */
241 movl %cr0,%eax
242 orl $0x80000000,%eax
243 movl %eax,%cr0 /* ..and set paging (PG) bit */
244 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
2451:
246 /* Set up the stack pointer */
247 lss stack_start,%esp
248
249/*
250 * Initialize eflags. Some BIOS's leave bits like NT set. This would
251 * confuse the debugger if this code is traced.
252 * XXX - best to initialize before switching to protected mode.
253 */
254 pushl $0
255 popfl
256
257#ifdef CONFIG_SMP
258 andl %ebx,%ebx
259 jz 1f /* Initial CPU cleans BSS */
260 jmp checkCPUtype
2611:
262#endif /* CONFIG_SMP */
263
264/*
265 * start system 32-bit setup. We need to re-do some of the things done
266 * in 16-bit mode for the "real" operations.
267 */
268 call setup_idt
269
270checkCPUtype:
271
272 movl $-1,X86_CPUID # -1 for no CPUID initially
273
274/* check if it is 486 or 386. */
275/*
276 * XXX - this does a lot of unnecessary setup. Alignment checks don't
277 * apply at our cpl of 0 and the stack ought to be aligned already, and
278 * we don't need to preserve eflags.
279 */
280
281 movb $3,X86 # at least 386
282 pushfl # push EFLAGS
283 popl %eax # get EFLAGS
284 movl %eax,%ecx # save original EFLAGS
285 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
286 pushl %eax # copy to EFLAGS
287 popfl # set EFLAGS
288 pushfl # get new EFLAGS
289 popl %eax # put it in eax
290 xorl %ecx,%eax # change in flags
291 pushl %ecx # restore original EFLAGS
292 popfl
293 testl $0x40000,%eax # check if AC bit changed
294 je is386
295
296 movb $4,X86 # at least 486
297 testl $0x200000,%eax # check if ID bit changed
298 je is486
299
300 /* get vendor info */
301 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
302 cpuid
303 movl %eax,X86_CPUID # save CPUID level
304 movl %ebx,X86_VENDOR_ID # lo 4 chars
305 movl %edx,X86_VENDOR_ID+4 # next 4 chars
306 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
307
308 orl %eax,%eax # do we have processor info as well?
309 je is486
310
311 movl $1,%eax # Use the CPUID instruction to get CPU type
312 cpuid
313 movb %al,%cl # save reg for future use
314 andb $0x0f,%ah # mask processor family
315 movb %ah,X86
316 andb $0xf0,%al # mask model
317 shrb $4,%al
318 movb %al,X86_MODEL
319 andb $0x0f,%cl # mask mask revision
320 movb %cl,X86_MASK
321 movl %edx,X86_CAPABILITY
322
323is486: movl $0x50022,%ecx # set AM, WP, NE and MP
324 jmp 2f
325
326is386: movl $2,%ecx # set MP
3272: movl %cr0,%eax
328 andl $0x80000011,%eax # Save PG,PE,ET
329 orl %ecx,%eax
330 movl %eax,%cr0
331
332 call check_x87
333 lgdt early_gdt_descr
334 lidt idt_descr
335 ljmp $(__KERNEL_CS),$1f
3361: movl $(__KERNEL_DS),%eax # reload all the segment registers
337 movl %eax,%ss # after changing gdt.
338 movl %eax,%fs # gets reset once there's real percpu
339
340 movl $(__USER_DS),%eax # DS/ES contains default USER segment
341 movl %eax,%ds
342 movl %eax,%es
343
344 xorl %eax,%eax # Clear GS and LDT
345 movl %eax,%gs
346 lldt %ax
347
348 cld # gcc2 wants the direction flag cleared at all times
349 pushl $0 # fake return address for unwinder
350#ifdef CONFIG_SMP
351 movb ready, %cl
352 movb $1, ready
353 cmpb $0,%cl # the first CPU calls start_kernel
354 je 1f
355 movl $(__KERNEL_PERCPU), %eax
356 movl %eax,%fs # set this cpu's percpu
357 jmp initialize_secondary # all other CPUs call initialize_secondary
3581:
359#endif /* CONFIG_SMP */
360 jmp start_kernel
361
362/*
363 * We depend on ET to be correct. This checks for 287/387.
364 */
365check_x87:
366 movb $0,X86_HARD_MATH
367 clts
368 fninit
369 fstsw %ax
370 cmpb $0,%al
371 je 1f
372 movl %cr0,%eax /* no coprocessor: have to set bits */
373 xorl $4,%eax /* set EM */
374 movl %eax,%cr0
375 ret
376 ALIGN
3771: movb $1,X86_HARD_MATH
378 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
379 ret
380
381/*
382 * setup_idt
383 *
384 * sets up a idt with 256 entries pointing to
385 * ignore_int, interrupt gates. It doesn't actually load
386 * idt - that can be done only after paging has been enabled
387 * and the kernel moved to PAGE_OFFSET. Interrupts
388 * are enabled elsewhere, when we can be relatively
389 * sure everything is ok.
390 *
391 * Warning: %esi is live across this function.
392 */
393setup_idt:
394 lea ignore_int,%edx
395 movl $(__KERNEL_CS << 16),%eax
396 movw %dx,%ax /* selector = 0x0010 = cs */
397 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
398
399 lea idt_table,%edi
400 mov $256,%ecx
401rp_sidt:
402 movl %eax,(%edi)
403 movl %edx,4(%edi)
404 addl $8,%edi
405 dec %ecx
406 jne rp_sidt
407
408.macro set_early_handler handler,trapno
409 lea \handler,%edx
410 movl $(__KERNEL_CS << 16),%eax
411 movw %dx,%ax
412 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
413 lea idt_table,%edi
414 movl %eax,8*\trapno(%edi)
415 movl %edx,8*\trapno+4(%edi)
416.endm
417
418 set_early_handler handler=early_divide_err,trapno=0
419 set_early_handler handler=early_illegal_opcode,trapno=6
420 set_early_handler handler=early_protection_fault,trapno=13
421 set_early_handler handler=early_page_fault,trapno=14
422
423 ret
424
425early_divide_err:
426 xor %edx,%edx
427 pushl $0 /* fake errcode */
428 jmp early_fault
429
430early_illegal_opcode:
431 movl $6,%edx
432 pushl $0 /* fake errcode */
433 jmp early_fault
434
435early_protection_fault:
436 movl $13,%edx
437 jmp early_fault
438
439early_page_fault:
440 movl $14,%edx
441 jmp early_fault
442
443early_fault:
444 cld
445#ifdef CONFIG_PRINTK
446 movl $(__KERNEL_DS),%eax
447 movl %eax,%ds
448 movl %eax,%es
449 cmpl $2,early_recursion_flag
450 je hlt_loop
451 incl early_recursion_flag
452 movl %cr2,%eax
453 pushl %eax
454 pushl %edx /* trapno */
455 pushl $fault_msg
456#ifdef CONFIG_EARLY_PRINTK
457 call early_printk
458#else
459 call printk
460#endif
461#endif
462hlt_loop:
463 hlt
464 jmp hlt_loop
465
466/* This is the default interrupt "handler" :-) */
467 ALIGN
468ignore_int:
469 cld
470#ifdef CONFIG_PRINTK
471 pushl %eax
472 pushl %ecx
473 pushl %edx
474 pushl %es
475 pushl %ds
476 movl $(__KERNEL_DS),%eax
477 movl %eax,%ds
478 movl %eax,%es
479 cmpl $2,early_recursion_flag
480 je hlt_loop
481 incl early_recursion_flag
482 pushl 16(%esp)
483 pushl 24(%esp)
484 pushl 32(%esp)
485 pushl 40(%esp)
486 pushl $int_msg
487#ifdef CONFIG_EARLY_PRINTK
488 call early_printk
489#else
490 call printk
491#endif
492 addl $(5*4),%esp
493 popl %ds
494 popl %es
495 popl %edx
496 popl %ecx
497 popl %eax
498#endif
499 iret
500
501.section .text
502/*
503 * Real beginning of normal "text" segment
504 */
505ENTRY(stext)
506ENTRY(_stext)
507
508/*
509 * BSS section
510 */
511.section ".bss.page_aligned","wa"
512 .align PAGE_SIZE_asm
513ENTRY(swapper_pg_dir)
514 .fill 1024,4,0
515ENTRY(swapper_pg_pmd)
516 .fill 1024,4,0
517ENTRY(empty_zero_page)
518 .fill 4096,1,0
519
520/*
521 * This starts the data section.
522 */
523.data
524ENTRY(stack_start)
525 .long init_thread_union+THREAD_SIZE
526 .long __BOOT_DS
527
528ready: .byte 0
529
530early_recursion_flag:
531 .long 0
532
533int_msg:
534 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
535
536fault_msg:
537 .ascii "Int %d: CR2 %p err %p EIP %p CS %p flags %p\n"
538 .asciz "Stack: %p %p %p %p %p %p %p %p\n"
539
540#include "../../x86/xen/xen-head.S"
541
542/*
543 * The IDT and GDT 'descriptors' are a strange 48-bit object
544 * only used by the lidt and lgdt instructions. They are not
545 * like usual segment descriptors - they consist of a 16-bit
546 * segment size, and 32-bit linear address value:
547 */
548
549.globl boot_gdt_descr
550.globl idt_descr
551
552 ALIGN
553# early boot GDT descriptor (must use 1:1 address mapping)
554 .word 0 # 32 bit align gdt_desc.address
555boot_gdt_descr:
556 .word __BOOT_DS+7
557 .long boot_gdt - __PAGE_OFFSET
558
559 .word 0 # 32-bit align idt_desc.address
560idt_descr:
561 .word IDT_ENTRIES*8-1 # idt contains 256 entries
562 .long idt_table
563
564# boot GDT descriptor (later on used by CPU#0):
565 .word 0 # 32 bit align gdt_desc.address
566ENTRY(early_gdt_descr)
567 .word GDT_ENTRIES*8-1
568 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
569
570/*
571 * The boot_gdt must mirror the equivalent in setup.S and is
572 * used only for booting.
573 */
574 .align L1_CACHE_BYTES
575ENTRY(boot_gdt)
576 .fill GDT_ENTRY_BOOT_CS,8,0
577 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
578 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
diff --git a/arch/x86_64/kernel/head.S b/arch/x86/kernel/head_64.S
index b6167fe3330e..b6167fe3330e 100644
--- a/arch/x86_64/kernel/head.S
+++ b/arch/x86/kernel/head_64.S
diff --git a/arch/i386/kernel/hpet.c b/arch/x86/kernel/hpet_32.c
index 533d4932bc79..533d4932bc79 100644
--- a/arch/i386/kernel/hpet.c
+++ b/arch/x86/kernel/hpet_32.c
diff --git a/arch/x86_64/kernel/hpet.c b/arch/x86/kernel/hpet_64.c
index e2d1b912e154..e2d1b912e154 100644
--- a/arch/x86_64/kernel/hpet.c
+++ b/arch/x86/kernel/hpet_64.c
diff --git a/arch/i386/kernel/i386_ksyms.c b/arch/x86/kernel/i386_ksyms_32.c
index e3d4b73bfdb0..e3d4b73bfdb0 100644
--- a/arch/i386/kernel/i386_ksyms.c
+++ b/arch/x86/kernel/i386_ksyms_32.c
diff --git a/arch/i386/kernel/i387.c b/arch/x86/kernel/i387_32.c
index 665847281ed2..665847281ed2 100644
--- a/arch/i386/kernel/i387.c
+++ b/arch/x86/kernel/i387_32.c
diff --git a/arch/x86_64/kernel/i387.c b/arch/x86/kernel/i387_64.c
index 1d58c13bc6bc..1d58c13bc6bc 100644
--- a/arch/x86_64/kernel/i387.c
+++ b/arch/x86/kernel/i387_64.c
diff --git a/arch/i386/kernel/i8237.c b/arch/x86/kernel/i8237.c
index 6f508e8d7c57..6f508e8d7c57 100644
--- a/arch/i386/kernel/i8237.c
+++ b/arch/x86/kernel/i8237.c
diff --git a/arch/i386/kernel/i8253.c b/arch/x86/kernel/i8253_32.c
index 6d839f2f1b1a..6d839f2f1b1a 100644
--- a/arch/i386/kernel/i8253.c
+++ b/arch/x86/kernel/i8253_32.c
diff --git a/arch/i386/kernel/i8259.c b/arch/x86/kernel/i8259_32.c
index 0499cbe9871a..0499cbe9871a 100644
--- a/arch/i386/kernel/i8259.c
+++ b/arch/x86/kernel/i8259_32.c
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86/kernel/i8259_64.c
index 948cae646099..948cae646099 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86/kernel/i8259_64.c
diff --git a/arch/i386/kernel/init_task.c b/arch/x86/kernel/init_task_32.c
index d26fc063a760..d26fc063a760 100644
--- a/arch/i386/kernel/init_task.c
+++ b/arch/x86/kernel/init_task_32.c
diff --git a/arch/x86_64/kernel/init_task.c b/arch/x86/kernel/init_task_64.c
index 4ff33d4f8551..4ff33d4f8551 100644
--- a/arch/x86_64/kernel/init_task.c
+++ b/arch/x86/kernel/init_task_64.c
diff --git a/arch/i386/kernel/io_apic.c b/arch/x86/kernel/io_apic_32.c
index e2f4a1c68547..e2f4a1c68547 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic_32.c
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86/kernel/io_apic_64.c
index 966fa1062491..966fa1062491 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic_64.c
diff --git a/arch/i386/kernel/ioport.c b/arch/x86/kernel/ioport_32.c
index 3d310a946d76..3d310a946d76 100644
--- a/arch/i386/kernel/ioport.c
+++ b/arch/x86/kernel/ioport_32.c
diff --git a/arch/x86_64/kernel/ioport.c b/arch/x86/kernel/ioport_64.c
index 653efa30b0f4..653efa30b0f4 100644
--- a/arch/x86_64/kernel/ioport.c
+++ b/arch/x86/kernel/ioport_64.c
diff --git a/arch/i386/kernel/irq.c b/arch/x86/kernel/irq_32.c
index 4f681bcdb1fc..4f681bcdb1fc 100644
--- a/arch/i386/kernel/irq.c
+++ b/arch/x86/kernel/irq_32.c
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86/kernel/irq_64.c
index bd11e42b22bf..bd11e42b22bf 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86/kernel/irq_64.c
diff --git a/arch/x86_64/kernel/k8.c b/arch/x86/kernel/k8.c
index 7377ccb21335..7377ccb21335 100644
--- a/arch/x86_64/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
diff --git a/arch/i386/kernel/kprobes.c b/arch/x86/kernel/kprobes_32.c
index 448a50b1324c..448a50b1324c 100644
--- a/arch/i386/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes_32.c
diff --git a/arch/x86_64/kernel/kprobes.c b/arch/x86/kernel/kprobes_64.c
index a30e004682e2..a30e004682e2 100644
--- a/arch/x86_64/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes_64.c
diff --git a/arch/i386/kernel/ldt.c b/arch/x86/kernel/ldt_32.c
index e0b2d17f4f10..e0b2d17f4f10 100644
--- a/arch/i386/kernel/ldt.c
+++ b/arch/x86/kernel/ldt_32.c
diff --git a/arch/x86_64/kernel/ldt.c b/arch/x86/kernel/ldt_64.c
index bc9ffd5c19cc..bc9ffd5c19cc 100644
--- a/arch/x86_64/kernel/ldt.c
+++ b/arch/x86/kernel/ldt_64.c
diff --git a/arch/i386/kernel/machine_kexec.c b/arch/x86/kernel/machine_kexec_32.c
index 91966bafb3dc..91966bafb3dc 100644
--- a/arch/i386/kernel/machine_kexec.c
+++ b/arch/x86/kernel/machine_kexec_32.c
diff --git a/arch/x86_64/kernel/machine_kexec.c b/arch/x86/kernel/machine_kexec_64.c
index c3a554703672..c3a554703672 100644
--- a/arch/x86_64/kernel/machine_kexec.c
+++ b/arch/x86/kernel/machine_kexec_64.c
diff --git a/arch/i386/kernel/mca.c b/arch/x86/kernel/mca_32.c
index b83672b89527..b83672b89527 100644
--- a/arch/i386/kernel/mca.c
+++ b/arch/x86/kernel/mca_32.c
diff --git a/arch/x86_64/kernel/mce.c b/arch/x86/kernel/mce_64.c
index a66d607f5b92..a66d607f5b92 100644
--- a/arch/x86_64/kernel/mce.c
+++ b/arch/x86/kernel/mce_64.c
diff --git a/arch/x86_64/kernel/mce_amd.c b/arch/x86/kernel/mce_amd_64.c
index 2f8a7f18b0fe..2f8a7f18b0fe 100644
--- a/arch/x86_64/kernel/mce_amd.c
+++ b/arch/x86/kernel/mce_amd_64.c
diff --git a/arch/x86_64/kernel/mce_intel.c b/arch/x86/kernel/mce_intel_64.c
index 6551505d8a2c..6551505d8a2c 100644
--- a/arch/x86_64/kernel/mce_intel.c
+++ b/arch/x86/kernel/mce_intel_64.c
diff --git a/arch/i386/kernel/microcode.c b/arch/x86/kernel/microcode.c
index 09cf78110358..09cf78110358 100644
--- a/arch/i386/kernel/microcode.c
+++ b/arch/x86/kernel/microcode.c
diff --git a/arch/i386/kernel/module.c b/arch/x86/kernel/module_32.c
index 3db0a5442eb1..3db0a5442eb1 100644
--- a/arch/i386/kernel/module.c
+++ b/arch/x86/kernel/module_32.c
diff --git a/arch/x86_64/kernel/module.c b/arch/x86/kernel/module_64.c
index a888e67f5874..a888e67f5874 100644
--- a/arch/x86_64/kernel/module.c
+++ b/arch/x86/kernel/module_64.c
diff --git a/arch/i386/kernel/mpparse.c b/arch/x86/kernel/mpparse_32.c
index 13abb4ebfb79..13abb4ebfb79 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse_32.c
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86/kernel/mpparse_64.c
index 8bf0ca03ac8e..8bf0ca03ac8e 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse_64.c
diff --git a/arch/i386/kernel/msr.c b/arch/x86/kernel/msr.c
index 0c1069b8d638..0c1069b8d638 100644
--- a/arch/i386/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
diff --git a/arch/i386/kernel/nmi.c b/arch/x86/kernel/nmi_32.c
index c7227e2180f8..c7227e2180f8 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/x86/kernel/nmi_32.c
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86/kernel/nmi_64.c
index 0ec6d2ddb931..0ec6d2ddb931 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86/kernel/nmi_64.c
diff --git a/arch/i386/kernel/numaq.c b/arch/x86/kernel/numaq_32.c
index 9000d82c6dc0..9000d82c6dc0 100644
--- a/arch/i386/kernel/numaq.c
+++ b/arch/x86/kernel/numaq_32.c
diff --git a/arch/i386/kernel/paravirt.c b/arch/x86/kernel/paravirt_32.c
index 739cfb207dd7..739cfb207dd7 100644
--- a/arch/i386/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt_32.c
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86/kernel/pci-calgary_64.c
index 71da01e73f03..71da01e73f03 100644
--- a/arch/x86_64/kernel/pci-calgary.c
+++ b/arch/x86/kernel/pci-calgary_64.c
diff --git a/arch/i386/kernel/pci-dma.c b/arch/x86/kernel/pci-dma_32.c
index 048f09b62553..048f09b62553 100644
--- a/arch/i386/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma_32.c
diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86/kernel/pci-dma_64.c
index 29711445c818..29711445c818 100644
--- a/arch/x86_64/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma_64.c
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86/kernel/pci-gart_64.c
index 4918c575d582..4918c575d582 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86/kernel/pci-gart_64.c
diff --git a/arch/x86_64/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu_64.c
index 2a34c6c025a9..2a34c6c025a9 100644
--- a/arch/x86_64/kernel/pci-nommu.c
+++ b/arch/x86/kernel/pci-nommu_64.c
diff --git a/arch/x86_64/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb_64.c
index b2f405ea7c85..b2f405ea7c85 100644
--- a/arch/x86_64/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb_64.c
diff --git a/arch/i386/kernel/pcspeaker.c b/arch/x86/kernel/pcspeaker.c
index bc1f2d3ea277..bc1f2d3ea277 100644
--- a/arch/i386/kernel/pcspeaker.c
+++ b/arch/x86/kernel/pcspeaker.c
diff --git a/arch/x86_64/kernel/pmtimer.c b/arch/x86/kernel/pmtimer_64.c
index ae8f91214f15..ae8f91214f15 100644
--- a/arch/x86_64/kernel/pmtimer.c
+++ b/arch/x86/kernel/pmtimer_64.c
diff --git a/arch/i386/kernel/process.c b/arch/x86/kernel/process_32.c
index 84664710b784..84664710b784 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/x86/kernel/process_32.c
diff --git a/arch/x86_64/kernel/process.c b/arch/x86/kernel/process_64.c
index 98956555450b..98956555450b 100644
--- a/arch/x86_64/kernel/process.c
+++ b/arch/x86/kernel/process_64.c
diff --git a/arch/i386/kernel/ptrace.c b/arch/x86/kernel/ptrace_32.c
index 7c1b92522e95..7c1b92522e95 100644
--- a/arch/i386/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace_32.c
diff --git a/arch/x86_64/kernel/ptrace.c b/arch/x86/kernel/ptrace_64.c
index eea3702427b4..eea3702427b4 100644
--- a/arch/x86_64/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace_64.c
diff --git a/arch/i386/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 6722469c2633..6722469c2633 100644
--- a/arch/i386/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
diff --git a/arch/x86/kernel/reboot_32.c b/arch/x86/kernel/reboot_32.c
new file mode 100644
index 000000000000..b37ed226830a
--- /dev/null
+++ b/arch/x86/kernel/reboot_32.c
@@ -0,0 +1,413 @@
1/*
2 * linux/arch/i386/kernel/reboot.c
3 */
4
5#include <linux/mm.h>
6#include <linux/module.h>
7#include <linux/delay.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/mc146818rtc.h>
11#include <linux/efi.h>
12#include <linux/dmi.h>
13#include <linux/ctype.h>
14#include <linux/pm.h>
15#include <linux/reboot.h>
16#include <asm/uaccess.h>
17#include <asm/apic.h>
18#include <asm/desc.h>
19#include "mach_reboot.h"
20#include <asm/reboot_fixups.h>
21#include <asm/reboot.h>
22
23/*
24 * Power off function, if any
25 */
26void (*pm_power_off)(void);
27EXPORT_SYMBOL(pm_power_off);
28
29static int reboot_mode;
30static int reboot_thru_bios;
31
32#ifdef CONFIG_SMP
33static int reboot_cpu = -1;
34#endif
35static int __init reboot_setup(char *str)
36{
37 while(1) {
38 switch (*str) {
39 case 'w': /* "warm" reboot (no memory testing etc) */
40 reboot_mode = 0x1234;
41 break;
42 case 'c': /* "cold" reboot (with memory testing etc) */
43 reboot_mode = 0x0;
44 break;
45 case 'b': /* "bios" reboot by jumping through the BIOS */
46 reboot_thru_bios = 1;
47 break;
48 case 'h': /* "hard" reboot by toggling RESET and/or crashing the CPU */
49 reboot_thru_bios = 0;
50 break;
51#ifdef CONFIG_SMP
52 case 's': /* "smp" reboot by executing reset on BSP or other CPU*/
53 if (isdigit(*(str+1))) {
54 reboot_cpu = (int) (*(str+1) - '0');
55 if (isdigit(*(str+2)))
56 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
57 }
58 /* we will leave sorting out the final value
59 when we are ready to reboot, since we might not
60 have set up boot_cpu_id or smp_num_cpu */
61 break;
62#endif
63 }
64 if((str = strchr(str,',')) != NULL)
65 str++;
66 else
67 break;
68 }
69 return 1;
70}
71
72__setup("reboot=", reboot_setup);
73
74/*
75 * Reboot options and system auto-detection code provided by
76 * Dell Inc. so their systems "just work". :-)
77 */
78
79/*
80 * Some machines require the "reboot=b" commandline option, this quirk makes that automatic.
81 */
82static int __init set_bios_reboot(const struct dmi_system_id *d)
83{
84 if (!reboot_thru_bios) {
85 reboot_thru_bios = 1;
86 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
87 }
88 return 0;
89}
90
91static struct dmi_system_id __initdata reboot_dmi_table[] = {
92 { /* Handle problems with rebooting on Dell E520's */
93 .callback = set_bios_reboot,
94 .ident = "Dell E520",
95 .matches = {
96 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
97 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
98 },
99 },
100 { /* Handle problems with rebooting on Dell 1300's */
101 .callback = set_bios_reboot,
102 .ident = "Dell PowerEdge 1300",
103 .matches = {
104 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
105 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
106 },
107 },
108 { /* Handle problems with rebooting on Dell 300's */
109 .callback = set_bios_reboot,
110 .ident = "Dell PowerEdge 300",
111 .matches = {
112 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
113 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
114 },
115 },
116 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
117 .callback = set_bios_reboot,
118 .ident = "Dell OptiPlex 745",
119 .matches = {
120 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
121 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
122 DMI_MATCH(DMI_BOARD_NAME, "0WF810"),
123 },
124 },
125 { /* Handle problems with rebooting on Dell 2400's */
126 .callback = set_bios_reboot,
127 .ident = "Dell PowerEdge 2400",
128 .matches = {
129 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
130 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
131 },
132 },
133 { /* Handle problems with rebooting on HP laptops */
134 .callback = set_bios_reboot,
135 .ident = "HP Compaq Laptop",
136 .matches = {
137 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
138 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
139 },
140 },
141 { }
142};
143
144static int __init reboot_init(void)
145{
146 dmi_check_system(reboot_dmi_table);
147 return 0;
148}
149
150core_initcall(reboot_init);
151
152/* The following code and data reboots the machine by switching to real
153 mode and jumping to the BIOS reset entry point, as if the CPU has
154 really been reset. The previous version asked the keyboard
155 controller to pulse the CPU reset line, which is more thorough, but
156 doesn't work with at least one type of 486 motherboard. It is easy
157 to stop this code working; hence the copious comments. */
158
159static unsigned long long
160real_mode_gdt_entries [3] =
161{
162 0x0000000000000000ULL, /* Null descriptor */
163 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
164 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
165};
166
167static struct Xgt_desc_struct
168real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
169real_mode_idt = { 0x3ff, 0 },
170no_idt = { 0, 0 };
171
172
173/* This is 16-bit protected mode code to disable paging and the cache,
174 switch to real mode and jump to the BIOS reset code.
175
176 The instruction that switches to real mode by writing to CR0 must be
177 followed immediately by a far jump instruction, which set CS to a
178 valid value for real mode, and flushes the prefetch queue to avoid
179 running instructions that have already been decoded in protected
180 mode.
181
182 Clears all the flags except ET, especially PG (paging), PE
183 (protected-mode enable) and TS (task switch for coprocessor state
184 save). Flushes the TLB after paging has been disabled. Sets CD and
185 NW, to disable the cache on a 486, and invalidates the cache. This
186 is more like the state of a 486 after reset. I don't know if
187 something else should be done for other chips.
188
189 More could be done here to set up the registers as if a CPU reset had
190 occurred; hopefully real BIOSs don't assume much. */
191
192static unsigned char real_mode_switch [] =
193{
194 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
195 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
196 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
197 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
198 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
199 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
200 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
201 0x74, 0x02, /* jz f */
202 0x0f, 0x09, /* wbinvd */
203 0x24, 0x10, /* f: andb $0x10,al */
204 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
205};
206static unsigned char jump_to_bios [] =
207{
208 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
209};
210
211/*
212 * Switch to real mode and then execute the code
213 * specified by the code and length parameters.
214 * We assume that length will aways be less that 100!
215 */
216void machine_real_restart(unsigned char *code, int length)
217{
218 local_irq_disable();
219
220 /* Write zero to CMOS register number 0x0f, which the BIOS POST
221 routine will recognize as telling it to do a proper reboot. (Well
222 that's what this book in front of me says -- it may only apply to
223 the Phoenix BIOS though, it's not clear). At the same time,
224 disable NMIs by setting the top bit in the CMOS address register,
225 as we're about to do peculiar things to the CPU. I'm not sure if
226 `outb_p' is needed instead of just `outb'. Use it to be on the
227 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
228 */
229
230 spin_lock(&rtc_lock);
231 CMOS_WRITE(0x00, 0x8f);
232 spin_unlock(&rtc_lock);
233
234 /* Remap the kernel at virtual address zero, as well as offset zero
235 from the kernel segment. This assumes the kernel segment starts at
236 virtual address PAGE_OFFSET. */
237
238 memcpy (swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
239 sizeof (swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
240
241 /*
242 * Use `swapper_pg_dir' as our page directory.
243 */
244 load_cr3(swapper_pg_dir);
245
246 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
247 this on booting to tell it to "Bypass memory test (also warm
248 boot)". This seems like a fairly standard thing that gets set by
249 REBOOT.COM programs, and the previous reset routine did this
250 too. */
251
252 *((unsigned short *)0x472) = reboot_mode;
253
254 /* For the switch to real mode, copy some code to low memory. It has
255 to be in the first 64k because it is running in 16-bit mode, and it
256 has to have the same physical and virtual address, because it turns
257 off paging. Copy it near the end of the first page, out of the way
258 of BIOS variables. */
259
260 memcpy ((void *) (0x1000 - sizeof (real_mode_switch) - 100),
261 real_mode_switch, sizeof (real_mode_switch));
262 memcpy ((void *) (0x1000 - 100), code, length);
263
264 /* Set up the IDT for real mode. */
265
266 load_idt(&real_mode_idt);
267
268 /* Set up a GDT from which we can load segment descriptors for real
269 mode. The GDT is not used in real mode; it is just needed here to
270 prepare the descriptors. */
271
272 load_gdt(&real_mode_gdt);
273
274 /* Load the data segment registers, and thus the descriptors ready for
275 real mode. The base address of each segment is 0x100, 16 times the
276 selector value being loaded here. This is so that the segment
277 registers don't have to be reloaded after switching to real mode:
278 the values are consistent for real mode operation already. */
279
280 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
281 "\tmovl %%eax,%%ds\n"
282 "\tmovl %%eax,%%es\n"
283 "\tmovl %%eax,%%fs\n"
284 "\tmovl %%eax,%%gs\n"
285 "\tmovl %%eax,%%ss" : : : "eax");
286
287 /* Jump to the 16-bit code that we copied earlier. It disables paging
288 and the cache, switches to real mode, and jumps to the BIOS reset
289 entry point. */
290
291 __asm__ __volatile__ ("ljmp $0x0008,%0"
292 :
293 : "i" ((void *) (0x1000 - sizeof (real_mode_switch) - 100)));
294}
295#ifdef CONFIG_APM_MODULE
296EXPORT_SYMBOL(machine_real_restart);
297#endif
298
299static void native_machine_shutdown(void)
300{
301#ifdef CONFIG_SMP
302 int reboot_cpu_id;
303
304 /* The boot cpu is always logical cpu 0 */
305 reboot_cpu_id = 0;
306
307 /* See if there has been given a command line override */
308 if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) &&
309 cpu_isset(reboot_cpu, cpu_online_map)) {
310 reboot_cpu_id = reboot_cpu;
311 }
312
313 /* Make certain the cpu I'm rebooting on is online */
314 if (!cpu_isset(reboot_cpu_id, cpu_online_map)) {
315 reboot_cpu_id = smp_processor_id();
316 }
317
318 /* Make certain I only run on the appropriate processor */
319 set_cpus_allowed(current, cpumask_of_cpu(reboot_cpu_id));
320
321 /* O.K. Now that I'm on the appropriate processor, stop
322 * all of the others, and disable their local APICs.
323 */
324
325 smp_send_stop();
326#endif /* CONFIG_SMP */
327
328 lapic_shutdown();
329
330#ifdef CONFIG_X86_IO_APIC
331 disable_IO_APIC();
332#endif
333}
334
335void __attribute__((weak)) mach_reboot_fixups(void)
336{
337}
338
339static void native_machine_emergency_restart(void)
340{
341 if (!reboot_thru_bios) {
342 if (efi_enabled) {
343 efi.reset_system(EFI_RESET_COLD, EFI_SUCCESS, 0, NULL);
344 load_idt(&no_idt);
345 __asm__ __volatile__("int3");
346 }
347 /* rebooting needs to touch the page at absolute addr 0 */
348 *((unsigned short *)__va(0x472)) = reboot_mode;
349 for (;;) {
350 mach_reboot_fixups(); /* for board specific fixups */
351 mach_reboot();
352 /* That didn't work - force a triple fault.. */
353 load_idt(&no_idt);
354 __asm__ __volatile__("int3");
355 }
356 }
357 if (efi_enabled)
358 efi.reset_system(EFI_RESET_WARM, EFI_SUCCESS, 0, NULL);
359
360 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
361}
362
363static void native_machine_restart(char * __unused)
364{
365 machine_shutdown();
366 machine_emergency_restart();
367}
368
369static void native_machine_halt(void)
370{
371}
372
373static void native_machine_power_off(void)
374{
375 if (pm_power_off) {
376 machine_shutdown();
377 pm_power_off();
378 }
379}
380
381
382struct machine_ops machine_ops = {
383 .power_off = native_machine_power_off,
384 .shutdown = native_machine_shutdown,
385 .emergency_restart = native_machine_emergency_restart,
386 .restart = native_machine_restart,
387 .halt = native_machine_halt,
388};
389
390void machine_power_off(void)
391{
392 machine_ops.power_off();
393}
394
395void machine_shutdown(void)
396{
397 machine_ops.shutdown();
398}
399
400void machine_emergency_restart(void)
401{
402 machine_ops.emergency_restart();
403}
404
405void machine_restart(char *cmd)
406{
407 machine_ops.restart(cmd);
408}
409
410void machine_halt(void)
411{
412 machine_ops.halt();
413}
diff --git a/arch/x86_64/kernel/reboot.c b/arch/x86/kernel/reboot_64.c
index 368db2b9c5ac..368db2b9c5ac 100644
--- a/arch/x86_64/kernel/reboot.c
+++ b/arch/x86/kernel/reboot_64.c
diff --git a/arch/i386/kernel/reboot_fixups.c b/arch/x86/kernel/reboot_fixups_32.c
index 03e1cce58f49..03e1cce58f49 100644
--- a/arch/i386/kernel/reboot_fixups.c
+++ b/arch/x86/kernel/reboot_fixups_32.c
diff --git a/arch/i386/kernel/relocate_kernel.S b/arch/x86/kernel/relocate_kernel_32.S
index f151d6fae462..f151d6fae462 100644
--- a/arch/i386/kernel/relocate_kernel.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
diff --git a/arch/x86_64/kernel/relocate_kernel.S b/arch/x86/kernel/relocate_kernel_64.S
index 14e95872c6a3..14e95872c6a3 100644
--- a/arch/x86_64/kernel/relocate_kernel.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
diff --git a/arch/i386/kernel/scx200.c b/arch/x86/kernel/scx200_32.c
index c7d3df23f589..c7d3df23f589 100644
--- a/arch/i386/kernel/scx200.c
+++ b/arch/x86/kernel/scx200_32.c
diff --git a/arch/x86_64/kernel/setup64.c b/arch/x86/kernel/setup64.c
index 1200aaac403e..1200aaac403e 100644
--- a/arch/x86_64/kernel/setup64.c
+++ b/arch/x86/kernel/setup64.c
diff --git a/arch/i386/kernel/setup.c b/arch/x86/kernel/setup_32.c
index d474cd639bcb..d474cd639bcb 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/x86/kernel/setup_32.c
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86/kernel/setup_64.c
index af838f6b0b7f..af838f6b0b7f 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86/kernel/setup_64.c
diff --git a/arch/i386/kernel/sigframe.h b/arch/x86/kernel/sigframe_32.h
index 0b2221711dad..0b2221711dad 100644
--- a/arch/i386/kernel/sigframe.h
+++ b/arch/x86/kernel/sigframe_32.h
diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal_32.c
new file mode 100644
index 000000000000..c03570f7fe8e
--- /dev/null
+++ b/arch/x86/kernel/signal_32.c
@@ -0,0 +1,667 @@
1/*
2 * linux/arch/i386/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
7 * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes
8 */
9
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/kernel.h>
14#include <linux/signal.h>
15#include <linux/errno.h>
16#include <linux/wait.h>
17#include <linux/unistd.h>
18#include <linux/stddef.h>
19#include <linux/personality.h>
20#include <linux/suspend.h>
21#include <linux/ptrace.h>
22#include <linux/elf.h>
23#include <linux/binfmts.h>
24#include <asm/processor.h>
25#include <asm/ucontext.h>
26#include <asm/uaccess.h>
27#include <asm/i387.h>
28#include "sigframe_32.h"
29
30#define DEBUG_SIG 0
31
32#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
33
34/*
35 * Atomically swap in the new signal mask, and wait for a signal.
36 */
37asmlinkage int
38sys_sigsuspend(int history0, int history1, old_sigset_t mask)
39{
40 mask &= _BLOCKABLE;
41 spin_lock_irq(&current->sighand->siglock);
42 current->saved_sigmask = current->blocked;
43 siginitset(&current->blocked, mask);
44 recalc_sigpending();
45 spin_unlock_irq(&current->sighand->siglock);
46
47 current->state = TASK_INTERRUPTIBLE;
48 schedule();
49 set_thread_flag(TIF_RESTORE_SIGMASK);
50 return -ERESTARTNOHAND;
51}
52
53asmlinkage int
54sys_sigaction(int sig, const struct old_sigaction __user *act,
55 struct old_sigaction __user *oact)
56{
57 struct k_sigaction new_ka, old_ka;
58 int ret;
59
60 if (act) {
61 old_sigset_t mask;
62 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
63 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
64 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
65 return -EFAULT;
66 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
67 __get_user(mask, &act->sa_mask);
68 siginitset(&new_ka.sa.sa_mask, mask);
69 }
70
71 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
72
73 if (!ret && oact) {
74 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
75 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
76 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
77 return -EFAULT;
78 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
79 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
80 }
81
82 return ret;
83}
84
85asmlinkage int
86sys_sigaltstack(unsigned long ebx)
87{
88 /* This is needed to make gcc realize it doesn't own the "struct pt_regs" */
89 struct pt_regs *regs = (struct pt_regs *)&ebx;
90 const stack_t __user *uss = (const stack_t __user *)ebx;
91 stack_t __user *uoss = (stack_t __user *)regs->ecx;
92
93 return do_sigaltstack(uss, uoss, regs->esp);
94}
95
96
97/*
98 * Do a signal return; undo the signal stack.
99 */
100
101static int
102restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *peax)
103{
104 unsigned int err = 0;
105
106 /* Always make any pending restarted system calls return -EINTR */
107 current_thread_info()->restart_block.fn = do_no_restart_syscall;
108
109#define COPY(x) err |= __get_user(regs->x, &sc->x)
110
111#define COPY_SEG(seg) \
112 { unsigned short tmp; \
113 err |= __get_user(tmp, &sc->seg); \
114 regs->x##seg = tmp; }
115
116#define COPY_SEG_STRICT(seg) \
117 { unsigned short tmp; \
118 err |= __get_user(tmp, &sc->seg); \
119 regs->x##seg = tmp|3; }
120
121#define GET_SEG(seg) \
122 { unsigned short tmp; \
123 err |= __get_user(tmp, &sc->seg); \
124 loadsegment(seg,tmp); }
125
126#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_RF | \
127 X86_EFLAGS_OF | X86_EFLAGS_DF | \
128 X86_EFLAGS_TF | X86_EFLAGS_SF | X86_EFLAGS_ZF | \
129 X86_EFLAGS_AF | X86_EFLAGS_PF | X86_EFLAGS_CF)
130
131 GET_SEG(gs);
132 COPY_SEG(fs);
133 COPY_SEG(es);
134 COPY_SEG(ds);
135 COPY(edi);
136 COPY(esi);
137 COPY(ebp);
138 COPY(esp);
139 COPY(ebx);
140 COPY(edx);
141 COPY(ecx);
142 COPY(eip);
143 COPY_SEG_STRICT(cs);
144 COPY_SEG_STRICT(ss);
145
146 {
147 unsigned int tmpflags;
148 err |= __get_user(tmpflags, &sc->eflags);
149 regs->eflags = (regs->eflags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
150 regs->orig_eax = -1; /* disable syscall checks */
151 }
152
153 {
154 struct _fpstate __user * buf;
155 err |= __get_user(buf, &sc->fpstate);
156 if (buf) {
157 if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
158 goto badframe;
159 err |= restore_i387(buf);
160 } else {
161 struct task_struct *me = current;
162 if (used_math()) {
163 clear_fpu(me);
164 clear_used_math();
165 }
166 }
167 }
168
169 err |= __get_user(*peax, &sc->eax);
170 return err;
171
172badframe:
173 return 1;
174}
175
176asmlinkage int sys_sigreturn(unsigned long __unused)
177{
178 struct pt_regs *regs = (struct pt_regs *) &__unused;
179 struct sigframe __user *frame = (struct sigframe __user *)(regs->esp - 8);
180 sigset_t set;
181 int eax;
182
183 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
184 goto badframe;
185 if (__get_user(set.sig[0], &frame->sc.oldmask)
186 || (_NSIG_WORDS > 1
187 && __copy_from_user(&set.sig[1], &frame->extramask,
188 sizeof(frame->extramask))))
189 goto badframe;
190
191 sigdelsetmask(&set, ~_BLOCKABLE);
192 spin_lock_irq(&current->sighand->siglock);
193 current->blocked = set;
194 recalc_sigpending();
195 spin_unlock_irq(&current->sighand->siglock);
196
197 if (restore_sigcontext(regs, &frame->sc, &eax))
198 goto badframe;
199 return eax;
200
201badframe:
202 if (show_unhandled_signals && printk_ratelimit())
203 printk("%s%s[%d] bad frame in sigreturn frame:%p eip:%lx"
204 " esp:%lx oeax:%lx\n",
205 current->pid > 1 ? KERN_INFO : KERN_EMERG,
206 current->comm, current->pid, frame, regs->eip,
207 regs->esp, regs->orig_eax);
208
209 force_sig(SIGSEGV, current);
210 return 0;
211}
212
213asmlinkage int sys_rt_sigreturn(unsigned long __unused)
214{
215 struct pt_regs *regs = (struct pt_regs *) &__unused;
216 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(regs->esp - 4);
217 sigset_t set;
218 int eax;
219
220 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
221 goto badframe;
222 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
223 goto badframe;
224
225 sigdelsetmask(&set, ~_BLOCKABLE);
226 spin_lock_irq(&current->sighand->siglock);
227 current->blocked = set;
228 recalc_sigpending();
229 spin_unlock_irq(&current->sighand->siglock);
230
231 if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &eax))
232 goto badframe;
233
234 if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->esp) == -EFAULT)
235 goto badframe;
236
237 return eax;
238
239badframe:
240 force_sig(SIGSEGV, current);
241 return 0;
242}
243
244/*
245 * Set up a signal frame.
246 */
247
248static int
249setup_sigcontext(struct sigcontext __user *sc, struct _fpstate __user *fpstate,
250 struct pt_regs *regs, unsigned long mask)
251{
252 int tmp, err = 0;
253
254 err |= __put_user(regs->xfs, (unsigned int __user *)&sc->fs);
255 savesegment(gs, tmp);
256 err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
257
258 err |= __put_user(regs->xes, (unsigned int __user *)&sc->es);
259 err |= __put_user(regs->xds, (unsigned int __user *)&sc->ds);
260 err |= __put_user(regs->edi, &sc->edi);
261 err |= __put_user(regs->esi, &sc->esi);
262 err |= __put_user(regs->ebp, &sc->ebp);
263 err |= __put_user(regs->esp, &sc->esp);
264 err |= __put_user(regs->ebx, &sc->ebx);
265 err |= __put_user(regs->edx, &sc->edx);
266 err |= __put_user(regs->ecx, &sc->ecx);
267 err |= __put_user(regs->eax, &sc->eax);
268 err |= __put_user(current->thread.trap_no, &sc->trapno);
269 err |= __put_user(current->thread.error_code, &sc->err);
270 err |= __put_user(regs->eip, &sc->eip);
271 err |= __put_user(regs->xcs, (unsigned int __user *)&sc->cs);
272 err |= __put_user(regs->eflags, &sc->eflags);
273 err |= __put_user(regs->esp, &sc->esp_at_signal);
274 err |= __put_user(regs->xss, (unsigned int __user *)&sc->ss);
275
276 tmp = save_i387(fpstate);
277 if (tmp < 0)
278 err = 1;
279 else
280 err |= __put_user(tmp ? fpstate : NULL, &sc->fpstate);
281
282 /* non-iBCS2 extensions.. */
283 err |= __put_user(mask, &sc->oldmask);
284 err |= __put_user(current->thread.cr2, &sc->cr2);
285
286 return err;
287}
288
289/*
290 * Determine which stack to use..
291 */
292static inline void __user *
293get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)
294{
295 unsigned long esp;
296
297 /* Default to using normal stack */
298 esp = regs->esp;
299
300 /* This is the X/Open sanctioned signal stack switching. */
301 if (ka->sa.sa_flags & SA_ONSTACK) {
302 if (sas_ss_flags(esp) == 0)
303 esp = current->sas_ss_sp + current->sas_ss_size;
304 }
305
306 /* This is the legacy signal stack switching. */
307 else if ((regs->xss & 0xffff) != __USER_DS &&
308 !(ka->sa.sa_flags & SA_RESTORER) &&
309 ka->sa.sa_restorer) {
310 esp = (unsigned long) ka->sa.sa_restorer;
311 }
312
313 esp -= frame_size;
314 /* Align the stack pointer according to the i386 ABI,
315 * i.e. so that on function entry ((sp + 4) & 15) == 0. */
316 esp = ((esp + 4) & -16ul) - 4;
317 return (void __user *) esp;
318}
319
320/* These symbols are defined with the addresses in the vsyscall page.
321 See vsyscall-sigreturn.S. */
322extern void __user __kernel_sigreturn;
323extern void __user __kernel_rt_sigreturn;
324
325static int setup_frame(int sig, struct k_sigaction *ka,
326 sigset_t *set, struct pt_regs * regs)
327{
328 void __user *restorer;
329 struct sigframe __user *frame;
330 int err = 0;
331 int usig;
332
333 frame = get_sigframe(ka, regs, sizeof(*frame));
334
335 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
336 goto give_sigsegv;
337
338 usig = current_thread_info()->exec_domain
339 && current_thread_info()->exec_domain->signal_invmap
340 && sig < 32
341 ? current_thread_info()->exec_domain->signal_invmap[sig]
342 : sig;
343
344 err = __put_user(usig, &frame->sig);
345 if (err)
346 goto give_sigsegv;
347
348 err = setup_sigcontext(&frame->sc, &frame->fpstate, regs, set->sig[0]);
349 if (err)
350 goto give_sigsegv;
351
352 if (_NSIG_WORDS > 1) {
353 err = __copy_to_user(&frame->extramask, &set->sig[1],
354 sizeof(frame->extramask));
355 if (err)
356 goto give_sigsegv;
357 }
358
359 if (current->binfmt->hasvdso)
360 restorer = (void *)VDSO_SYM(&__kernel_sigreturn);
361 else
362 restorer = (void *)&frame->retcode;
363 if (ka->sa.sa_flags & SA_RESTORER)
364 restorer = ka->sa.sa_restorer;
365
366 /* Set up to return from userspace. */
367 err |= __put_user(restorer, &frame->pretcode);
368
369 /*
370 * This is popl %eax ; movl $,%eax ; int $0x80
371 *
372 * WE DO NOT USE IT ANY MORE! It's only left here for historical
373 * reasons and because gdb uses it as a signature to notice
374 * signal handler stack frames.
375 */
376 err |= __put_user(0xb858, (short __user *)(frame->retcode+0));
377 err |= __put_user(__NR_sigreturn, (int __user *)(frame->retcode+2));
378 err |= __put_user(0x80cd, (short __user *)(frame->retcode+6));
379
380 if (err)
381 goto give_sigsegv;
382
383 /* Set up registers for signal handler */
384 regs->esp = (unsigned long) frame;
385 regs->eip = (unsigned long) ka->sa.sa_handler;
386 regs->eax = (unsigned long) sig;
387 regs->edx = (unsigned long) 0;
388 regs->ecx = (unsigned long) 0;
389
390 set_fs(USER_DS);
391 regs->xds = __USER_DS;
392 regs->xes = __USER_DS;
393 regs->xss = __USER_DS;
394 regs->xcs = __USER_CS;
395
396 /*
397 * Clear TF when entering the signal handler, but
398 * notify any tracer that was single-stepping it.
399 * The tracer may want to single-step inside the
400 * handler too.
401 */
402 regs->eflags &= ~TF_MASK;
403 if (test_thread_flag(TIF_SINGLESTEP))
404 ptrace_notify(SIGTRAP);
405
406#if DEBUG_SIG
407 printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n",
408 current->comm, current->pid, frame, regs->eip, frame->pretcode);
409#endif
410
411 return 0;
412
413give_sigsegv:
414 force_sigsegv(sig, current);
415 return -EFAULT;
416}
417
418static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
419 sigset_t *set, struct pt_regs * regs)
420{
421 void __user *restorer;
422 struct rt_sigframe __user *frame;
423 int err = 0;
424 int usig;
425
426 frame = get_sigframe(ka, regs, sizeof(*frame));
427
428 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
429 goto give_sigsegv;
430
431 usig = current_thread_info()->exec_domain
432 && current_thread_info()->exec_domain->signal_invmap
433 && sig < 32
434 ? current_thread_info()->exec_domain->signal_invmap[sig]
435 : sig;
436
437 err |= __put_user(usig, &frame->sig);
438 err |= __put_user(&frame->info, &frame->pinfo);
439 err |= __put_user(&frame->uc, &frame->puc);
440 err |= copy_siginfo_to_user(&frame->info, info);
441 if (err)
442 goto give_sigsegv;
443
444 /* Create the ucontext. */
445 err |= __put_user(0, &frame->uc.uc_flags);
446 err |= __put_user(0, &frame->uc.uc_link);
447 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
448 err |= __put_user(sas_ss_flags(regs->esp),
449 &frame->uc.uc_stack.ss_flags);
450 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
451 err |= setup_sigcontext(&frame->uc.uc_mcontext, &frame->fpstate,
452 regs, set->sig[0]);
453 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
454 if (err)
455 goto give_sigsegv;
456
457 /* Set up to return from userspace. */
458 restorer = (void *)VDSO_SYM(&__kernel_rt_sigreturn);
459 if (ka->sa.sa_flags & SA_RESTORER)
460 restorer = ka->sa.sa_restorer;
461 err |= __put_user(restorer, &frame->pretcode);
462
463 /*
464 * This is movl $,%eax ; int $0x80
465 *
466 * WE DO NOT USE IT ANY MORE! It's only left here for historical
467 * reasons and because gdb uses it as a signature to notice
468 * signal handler stack frames.
469 */
470 err |= __put_user(0xb8, (char __user *)(frame->retcode+0));
471 err |= __put_user(__NR_rt_sigreturn, (int __user *)(frame->retcode+1));
472 err |= __put_user(0x80cd, (short __user *)(frame->retcode+5));
473
474 if (err)
475 goto give_sigsegv;
476
477 /* Set up registers for signal handler */
478 regs->esp = (unsigned long) frame;
479 regs->eip = (unsigned long) ka->sa.sa_handler;
480 regs->eax = (unsigned long) usig;
481 regs->edx = (unsigned long) &frame->info;
482 regs->ecx = (unsigned long) &frame->uc;
483
484 set_fs(USER_DS);
485 regs->xds = __USER_DS;
486 regs->xes = __USER_DS;
487 regs->xss = __USER_DS;
488 regs->xcs = __USER_CS;
489
490 /*
491 * Clear TF when entering the signal handler, but
492 * notify any tracer that was single-stepping it.
493 * The tracer may want to single-step inside the
494 * handler too.
495 */
496 regs->eflags &= ~TF_MASK;
497 if (test_thread_flag(TIF_SINGLESTEP))
498 ptrace_notify(SIGTRAP);
499
500#if DEBUG_SIG
501 printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n",
502 current->comm, current->pid, frame, regs->eip, frame->pretcode);
503#endif
504
505 return 0;
506
507give_sigsegv:
508 force_sigsegv(sig, current);
509 return -EFAULT;
510}
511
512/*
513 * OK, we're invoking a handler
514 */
515
516static int
517handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
518 sigset_t *oldset, struct pt_regs * regs)
519{
520 int ret;
521
522 /* Are we from a system call? */
523 if (regs->orig_eax >= 0) {
524 /* If so, check system call restarting.. */
525 switch (regs->eax) {
526 case -ERESTART_RESTARTBLOCK:
527 case -ERESTARTNOHAND:
528 regs->eax = -EINTR;
529 break;
530
531 case -ERESTARTSYS:
532 if (!(ka->sa.sa_flags & SA_RESTART)) {
533 regs->eax = -EINTR;
534 break;
535 }
536 /* fallthrough */
537 case -ERESTARTNOINTR:
538 regs->eax = regs->orig_eax;
539 regs->eip -= 2;
540 }
541 }
542
543 /*
544 * If TF is set due to a debugger (PT_DTRACE), clear the TF flag so
545 * that register information in the sigcontext is correct.
546 */
547 if (unlikely(regs->eflags & TF_MASK)
548 && likely(current->ptrace & PT_DTRACE)) {
549 current->ptrace &= ~PT_DTRACE;
550 regs->eflags &= ~TF_MASK;
551 }
552
553 /* Set up the stack frame */
554 if (ka->sa.sa_flags & SA_SIGINFO)
555 ret = setup_rt_frame(sig, ka, info, oldset, regs);
556 else
557 ret = setup_frame(sig, ka, oldset, regs);
558
559 if (ret == 0) {
560 spin_lock_irq(&current->sighand->siglock);
561 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
562 if (!(ka->sa.sa_flags & SA_NODEFER))
563 sigaddset(&current->blocked,sig);
564 recalc_sigpending();
565 spin_unlock_irq(&current->sighand->siglock);
566 }
567
568 return ret;
569}
570
571/*
572 * Note that 'init' is a special process: it doesn't get signals it doesn't
573 * want to handle. Thus you cannot kill init even with a SIGKILL even by
574 * mistake.
575 */
576static void fastcall do_signal(struct pt_regs *regs)
577{
578 siginfo_t info;
579 int signr;
580 struct k_sigaction ka;
581 sigset_t *oldset;
582
583 /*
584 * We want the common case to go fast, which
585 * is why we may in certain cases get here from
586 * kernel mode. Just return without doing anything
587 * if so. vm86 regs switched out by assembly code
588 * before reaching here, so testing against kernel
589 * CS suffices.
590 */
591 if (!user_mode(regs))
592 return;
593
594 if (test_thread_flag(TIF_RESTORE_SIGMASK))
595 oldset = &current->saved_sigmask;
596 else
597 oldset = &current->blocked;
598
599 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
600 if (signr > 0) {
601 /* Reenable any watchpoints before delivering the
602 * signal to user space. The processor register will
603 * have been cleared if the watchpoint triggered
604 * inside the kernel.
605 */
606 if (unlikely(current->thread.debugreg[7]))
607 set_debugreg(current->thread.debugreg[7], 7);
608
609 /* Whee! Actually deliver the signal. */
610 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
611 /* a signal was successfully delivered; the saved
612 * sigmask will have been stored in the signal frame,
613 * and will be restored by sigreturn, so we can simply
614 * clear the TIF_RESTORE_SIGMASK flag */
615 if (test_thread_flag(TIF_RESTORE_SIGMASK))
616 clear_thread_flag(TIF_RESTORE_SIGMASK);
617 }
618
619 return;
620 }
621
622 /* Did we come from a system call? */
623 if (regs->orig_eax >= 0) {
624 /* Restart the system call - no handlers present */
625 switch (regs->eax) {
626 case -ERESTARTNOHAND:
627 case -ERESTARTSYS:
628 case -ERESTARTNOINTR:
629 regs->eax = regs->orig_eax;
630 regs->eip -= 2;
631 break;
632
633 case -ERESTART_RESTARTBLOCK:
634 regs->eax = __NR_restart_syscall;
635 regs->eip -= 2;
636 break;
637 }
638 }
639
640 /* if there's no signal to deliver, we just put the saved sigmask
641 * back */
642 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
643 clear_thread_flag(TIF_RESTORE_SIGMASK);
644 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
645 }
646}
647
648/*
649 * notification of userspace execution resumption
650 * - triggered by the TIF_WORK_MASK flags
651 */
652__attribute__((regparm(3)))
653void do_notify_resume(struct pt_regs *regs, void *_unused,
654 __u32 thread_info_flags)
655{
656 /* Pending single-step? */
657 if (thread_info_flags & _TIF_SINGLESTEP) {
658 regs->eflags |= TF_MASK;
659 clear_thread_flag(TIF_SINGLESTEP);
660 }
661
662 /* deal with pending signal delivery */
663 if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
664 do_signal(regs);
665
666 clear_thread_flag(TIF_IRET);
667}
diff --git a/arch/x86_64/kernel/signal.c b/arch/x86/kernel/signal_64.c
index 739175b01e06..739175b01e06 100644
--- a/arch/x86_64/kernel/signal.c
+++ b/arch/x86/kernel/signal_64.c
diff --git a/arch/i386/kernel/smp.c b/arch/x86/kernel/smp_32.c
index 2d35d8502029..2d35d8502029 100644
--- a/arch/i386/kernel/smp.c
+++ b/arch/x86/kernel/smp_32.c
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86/kernel/smp_64.c
index df4a82812adb..df4a82812adb 100644
--- a/arch/x86_64/kernel/smp.c
+++ b/arch/x86/kernel/smp_64.c
diff --git a/arch/i386/kernel/smpboot.c b/arch/x86/kernel/smpboot_32.c
index e4f61d1c6248..e4f61d1c6248 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot_32.c
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86/kernel/smpboot_64.c
index 32f50783edc8..32f50783edc8 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot_64.c
diff --git a/arch/i386/kernel/smpcommon.c b/arch/x86/kernel/smpcommon_32.c
index bbfe85a0f699..bbfe85a0f699 100644
--- a/arch/i386/kernel/smpcommon.c
+++ b/arch/x86/kernel/smpcommon_32.c
diff --git a/arch/i386/kernel/srat.c b/arch/x86/kernel/srat_32.c
index 2a8713ec0f9a..2a8713ec0f9a 100644
--- a/arch/i386/kernel/srat.c
+++ b/arch/x86/kernel/srat_32.c
diff --git a/arch/x86_64/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index cb9109113584..cb9109113584 100644
--- a/arch/x86_64/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
diff --git a/arch/i386/kernel/summit.c b/arch/x86/kernel/summit_32.c
index d0e01a3acf35..d0e01a3acf35 100644
--- a/arch/i386/kernel/summit.c
+++ b/arch/x86/kernel/summit_32.c
diff --git a/arch/x86_64/kernel/suspend.c b/arch/x86/kernel/suspend_64.c
index 573c0a6e0ac6..573c0a6e0ac6 100644
--- a/arch/x86_64/kernel/suspend.c
+++ b/arch/x86/kernel/suspend_64.c
diff --git a/arch/x86_64/kernel/suspend_asm.S b/arch/x86/kernel/suspend_asm_64.S
index 16d183f67bc1..16d183f67bc1 100644
--- a/arch/x86_64/kernel/suspend_asm.S
+++ b/arch/x86/kernel/suspend_asm_64.S
diff --git a/arch/i386/kernel/sys_i386.c b/arch/x86/kernel/sys_i386_32.c
index 42147304de88..42147304de88 100644
--- a/arch/i386/kernel/sys_i386.c
+++ b/arch/x86/kernel/sys_i386_32.c
diff --git a/arch/x86_64/kernel/sys_x86_64.c b/arch/x86/kernel/sys_x86_64.c
index 4770b7a2052c..4770b7a2052c 100644
--- a/arch/x86_64/kernel/sys_x86_64.c
+++ b/arch/x86/kernel/sys_x86_64.c
diff --git a/arch/x86/kernel/syscall_64.c b/arch/x86/kernel/syscall_64.c
new file mode 100644
index 000000000000..9d498c2f8eea
--- /dev/null
+++ b/arch/x86/kernel/syscall_64.c
@@ -0,0 +1,26 @@
1/* System call table for x86-64. */
2
3#include <linux/linkage.h>
4#include <linux/sys.h>
5#include <linux/cache.h>
6#include <asm/asm-offsets.h>
7
8#define __NO_STUBS
9
10#define __SYSCALL(nr, sym) extern asmlinkage void sym(void) ;
11#undef _ASM_X86_64_UNISTD_H_
12#include <asm/unistd_64.h>
13
14#undef __SYSCALL
15#define __SYSCALL(nr, sym) [ nr ] = sym,
16#undef _ASM_X86_64_UNISTD_H_
17
18typedef void (*sys_call_ptr_t)(void);
19
20extern void sys_ni_syscall(void);
21
22const sys_call_ptr_t sys_call_table[__NR_syscall_max+1] = {
23 /* Smells like a like a compiler bug -- it doesn't work when the & below is removed. */
24 [0 ... __NR_syscall_max] = &sys_ni_syscall,
25#include <asm/unistd_64.h>
26};
diff --git a/arch/i386/kernel/syscall_table.S b/arch/x86/kernel/syscall_table_32.S
index 8344c70adf61..8344c70adf61 100644
--- a/arch/i386/kernel/syscall_table.S
+++ b/arch/x86/kernel/syscall_table_32.S
diff --git a/arch/i386/kernel/sysenter.c b/arch/x86/kernel/sysenter_32.c
index 4eb2e408764f..4eb2e408764f 100644
--- a/arch/i386/kernel/sysenter.c
+++ b/arch/x86/kernel/sysenter_32.c
diff --git a/arch/x86_64/kernel/tce.c b/arch/x86/kernel/tce_64.c
index e3f2569b2c44..e3f2569b2c44 100644
--- a/arch/x86_64/kernel/tce.c
+++ b/arch/x86/kernel/tce_64.c
diff --git a/arch/i386/kernel/time.c b/arch/x86/kernel/time_32.c
index 19a6c678d02e..19a6c678d02e 100644
--- a/arch/i386/kernel/time.c
+++ b/arch/x86/kernel/time_32.c
diff --git a/arch/x86_64/kernel/time.c b/arch/x86/kernel/time_64.c
index 6d48a4e826d9..6d48a4e826d9 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86/kernel/time_64.c
diff --git a/arch/i386/kernel/topology.c b/arch/x86/kernel/topology.c
index 45782356a618..45782356a618 100644
--- a/arch/i386/kernel/topology.c
+++ b/arch/x86/kernel/topology.c
diff --git a/arch/i386/kernel/trampoline.S b/arch/x86/kernel/trampoline_32.S
index f62815f8d06a..f62815f8d06a 100644
--- a/arch/i386/kernel/trampoline.S
+++ b/arch/x86/kernel/trampoline_32.S
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S
new file mode 100644
index 000000000000..607983b0d27b
--- /dev/null
+++ b/arch/x86/kernel/trampoline_64.S
@@ -0,0 +1,166 @@
1/*
2 *
3 * Trampoline.S Derived from Setup.S by Linus Torvalds
4 *
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
6 * 15 Sept 2005 Eric Biederman: 64bit PIC support
7 *
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
11 * is a mystery.
12 *
13 * In fact we don't actually need a stack so we don't
14 * set one up.
15 *
16 * On entry to trampoline_data, the processor is in real mode
17 * with 16-bit addressing and 16-bit data. CS has some value
18 * and IP is zero. Thus, data addresses need to be absolute
19 * (no relocation) and are taken with regard to r_base.
20 *
21 * With the addition of trampoline_level4_pgt this code can
22 * now enter a 64bit kernel that lives at arbitrary 64bit
23 * physical addresses.
24 *
25 * If you work on this file, check the object module with objdump
26 * --full-contents --reloc to make sure there are no relocation
27 * entries.
28 */
29
30#include <linux/linkage.h>
31#include <asm/pgtable.h>
32#include <asm/page.h>
33#include <asm/msr.h>
34#include <asm/segment.h>
35
36.data
37
38.code16
39
40ENTRY(trampoline_data)
41r_base = .
42 cli # We should be safe anyway
43 wbinvd
44 mov %cs, %ax # Code and data in the same place
45 mov %ax, %ds
46 mov %ax, %es
47 mov %ax, %ss
48
49
50 movl $0xA5A5A5A5, trampoline_data - r_base
51 # write marker for master knows we're running
52
53 # Setup stack
54 movw $(trampoline_stack_end - r_base), %sp
55
56 call verify_cpu # Verify the cpu supports long mode
57 testl %eax, %eax # Check for return code
58 jnz no_longmode
59
60 mov %cs, %ax
61 movzx %ax, %esi # Find the 32bit trampoline location
62 shll $4, %esi
63
64 # Fixup the vectors
65 addl %esi, startup_32_vector - r_base
66 addl %esi, startup_64_vector - r_base
67 addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
68
69 /*
70 * GDT tables in non default location kernel can be beyond 16MB and
71 * lgdt will not be able to load the address as in real mode default
72 * operand size is 16bit. Use lgdtl instead to force operand size
73 * to 32 bit.
74 */
75
76 lidtl tidt - r_base # load idt with 0, 0
77 lgdtl tgdt - r_base # load gdt with whatever is appropriate
78
79 xor %ax, %ax
80 inc %ax # protected mode (PE) bit
81 lmsw %ax # into protected mode
82
83 # flush prefetch and jump to startup_32
84 ljmpl *(startup_32_vector - r_base)
85
86 .code32
87 .balign 4
88startup_32:
89 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
90 movl %eax, %ds
91
92 xorl %eax, %eax
93 btsl $5, %eax # Enable PAE mode
94 movl %eax, %cr4
95
96 # Setup trampoline 4 level pagetables
97 leal (trampoline_level4_pgt - r_base)(%esi), %eax
98 movl %eax, %cr3
99
100 movl $MSR_EFER, %ecx
101 movl $(1 << _EFER_LME), %eax # Enable Long Mode
102 xorl %edx, %edx
103 wrmsr
104
105 xorl %eax, %eax
106 btsl $31, %eax # Enable paging and in turn activate Long Mode
107 btsl $0, %eax # Enable protected mode
108 movl %eax, %cr0
109
110 /*
111 * At this point we're in long mode but in 32bit compatibility mode
112 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
113 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
114 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
115 */
116 ljmp *(startup_64_vector - r_base)(%esi)
117
118 .code64
119 .balign 4
120startup_64:
121 # Now jump into the kernel using virtual addresses
122 movq $secondary_startup_64, %rax
123 jmp *%rax
124
125 .code16
126no_longmode:
127 hlt
128 jmp no_longmode
129#include "verify_cpu_64.S"
130
131 # Careful these need to be in the same 64K segment as the above;
132tidt:
133 .word 0 # idt limit = 0
134 .word 0, 0 # idt base = 0L
135
136 # Duplicate the global descriptor table
137 # so the kernel can live anywhere
138 .balign 4
139tgdt:
140 .short tgdt_end - tgdt # gdt limit
141 .long tgdt - r_base
142 .short 0
143 .quad 0x00cf9b000000ffff # __KERNEL32_CS
144 .quad 0x00af9b000000ffff # __KERNEL_CS
145 .quad 0x00cf93000000ffff # __KERNEL_DS
146tgdt_end:
147
148 .balign 4
149startup_32_vector:
150 .long startup_32 - r_base
151 .word __KERNEL32_CS, 0
152
153 .balign 4
154startup_64_vector:
155 .long startup_64 - r_base
156 .word __KERNEL_CS, 0
157
158trampoline_stack:
159 .org 0x1000
160trampoline_stack_end:
161ENTRY(trampoline_level4_pgt)
162 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
163 .fill 510,8,0
164 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
165
166ENTRY(trampoline_end)
diff --git a/arch/i386/kernel/traps.c b/arch/x86/kernel/traps_32.c
index 47b0bef335bd..47b0bef335bd 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/x86/kernel/traps_32.c
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86/kernel/traps_64.c
index 03888420775d..03888420775d 100644
--- a/arch/x86_64/kernel/traps.c
+++ b/arch/x86/kernel/traps_64.c
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
new file mode 100644
index 000000000000..3ed0ae8c918d
--- /dev/null
+++ b/arch/x86/kernel/tsc_32.c
@@ -0,0 +1,413 @@
1/*
2 * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
3 * which was originally moved from arch/i386/kernel/time.c.
4 * See comments there for proper credits.
5 */
6
7#include <linux/sched.h>
8#include <linux/clocksource.h>
9#include <linux/workqueue.h>
10#include <linux/cpufreq.h>
11#include <linux/jiffies.h>
12#include <linux/init.h>
13#include <linux/dmi.h>
14
15#include <asm/delay.h>
16#include <asm/tsc.h>
17#include <asm/io.h>
18#include <asm/timer.h>
19
20#include "mach_timer.h"
21
22static int tsc_enabled;
23
24/*
25 * On some systems the TSC frequency does not
26 * change with the cpu frequency. So we need
27 * an extra value to store the TSC freq
28 */
29unsigned int tsc_khz;
30EXPORT_SYMBOL_GPL(tsc_khz);
31
32int tsc_disable;
33
34#ifdef CONFIG_X86_TSC
35static int __init tsc_setup(char *str)
36{
37 printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
38 "cannot disable TSC.\n");
39 return 1;
40}
41#else
42/*
43 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
44 * in cpu/common.c
45 */
46static int __init tsc_setup(char *str)
47{
48 tsc_disable = 1;
49
50 return 1;
51}
52#endif
53
54__setup("notsc", tsc_setup);
55
56/*
57 * code to mark and check if the TSC is unstable
58 * due to cpufreq or due to unsynced TSCs
59 */
60static int tsc_unstable;
61
62int check_tsc_unstable(void)
63{
64 return tsc_unstable;
65}
66EXPORT_SYMBOL_GPL(check_tsc_unstable);
67
68/* Accellerators for sched_clock()
69 * convert from cycles(64bits) => nanoseconds (64bits)
70 * basic equation:
71 * ns = cycles / (freq / ns_per_sec)
72 * ns = cycles * (ns_per_sec / freq)
73 * ns = cycles * (10^9 / (cpu_khz * 10^3))
74 * ns = cycles * (10^6 / cpu_khz)
75 *
76 * Then we use scaling math (suggested by george@mvista.com) to get:
77 * ns = cycles * (10^6 * SC / cpu_khz) / SC
78 * ns = cycles * cyc2ns_scale / SC
79 *
80 * And since SC is a constant power of two, we can convert the div
81 * into a shift.
82 *
83 * We can use khz divisor instead of mhz to keep a better percision, since
84 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
85 * (mathieu.desnoyers@polymtl.ca)
86 *
87 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
88 */
89unsigned long cyc2ns_scale __read_mostly;
90
91#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
92
93static inline void set_cyc2ns_scale(unsigned long cpu_khz)
94{
95 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
96}
97
98/*
99 * Scheduler clock - returns current time in nanosec units.
100 */
101unsigned long long native_sched_clock(void)
102{
103 unsigned long long this_offset;
104
105 /*
106 * Fall back to jiffies if there's no TSC available:
107 * ( But note that we still use it if the TSC is marked
108 * unstable. We do this because unlike Time Of Day,
109 * the scheduler clock tolerates small errors and it's
110 * very important for it to be as fast as the platform
111 * can achive it. )
112 */
113 if (unlikely(!tsc_enabled && !tsc_unstable))
114 /* No locking but a rare wrong value is not a big deal: */
115 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
116
117 /* read the Time Stamp Counter: */
118 rdtscll(this_offset);
119
120 /* return the value in ns */
121 return cycles_2_ns(this_offset);
122}
123
124/* We need to define a real function for sched_clock, to override the
125 weak default version */
126#ifdef CONFIG_PARAVIRT
127unsigned long long sched_clock(void)
128{
129 return paravirt_sched_clock();
130}
131#else
132unsigned long long sched_clock(void)
133 __attribute__((alias("native_sched_clock")));
134#endif
135
136unsigned long native_calculate_cpu_khz(void)
137{
138 unsigned long long start, end;
139 unsigned long count;
140 u64 delta64;
141 int i;
142 unsigned long flags;
143
144 local_irq_save(flags);
145
146 /* run 3 times to ensure the cache is warm */
147 for (i = 0; i < 3; i++) {
148 mach_prepare_counter();
149 rdtscll(start);
150 mach_countup(&count);
151 rdtscll(end);
152 }
153 /*
154 * Error: ECTCNEVERSET
155 * The CTC wasn't reliable: we got a hit on the very first read,
156 * or the CPU was so fast/slow that the quotient wouldn't fit in
157 * 32 bits..
158 */
159 if (count <= 1)
160 goto err;
161
162 delta64 = end - start;
163
164 /* cpu freq too fast: */
165 if (delta64 > (1ULL<<32))
166 goto err;
167
168 /* cpu freq too slow: */
169 if (delta64 <= CALIBRATE_TIME_MSEC)
170 goto err;
171
172 delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
173 do_div(delta64,CALIBRATE_TIME_MSEC);
174
175 local_irq_restore(flags);
176 return (unsigned long)delta64;
177err:
178 local_irq_restore(flags);
179 return 0;
180}
181
182int recalibrate_cpu_khz(void)
183{
184#ifndef CONFIG_SMP
185 unsigned long cpu_khz_old = cpu_khz;
186
187 if (cpu_has_tsc) {
188 cpu_khz = calculate_cpu_khz();
189 tsc_khz = cpu_khz;
190 cpu_data[0].loops_per_jiffy =
191 cpufreq_scale(cpu_data[0].loops_per_jiffy,
192 cpu_khz_old, cpu_khz);
193 return 0;
194 } else
195 return -ENODEV;
196#else
197 return -ENODEV;
198#endif
199}
200
201EXPORT_SYMBOL(recalibrate_cpu_khz);
202
203#ifdef CONFIG_CPU_FREQ
204
205/*
206 * if the CPU frequency is scaled, TSC-based delays will need a different
207 * loops_per_jiffy value to function properly.
208 */
209static unsigned int ref_freq = 0;
210static unsigned long loops_per_jiffy_ref = 0;
211static unsigned long cpu_khz_ref = 0;
212
213static int
214time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
215{
216 struct cpufreq_freqs *freq = data;
217
218 if (!ref_freq) {
219 if (!freq->old){
220 ref_freq = freq->new;
221 return 0;
222 }
223 ref_freq = freq->old;
224 loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
225 cpu_khz_ref = cpu_khz;
226 }
227
228 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
229 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
230 (val == CPUFREQ_RESUMECHANGE)) {
231 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
232 cpu_data[freq->cpu].loops_per_jiffy =
233 cpufreq_scale(loops_per_jiffy_ref,
234 ref_freq, freq->new);
235
236 if (cpu_khz) {
237
238 if (num_online_cpus() == 1)
239 cpu_khz = cpufreq_scale(cpu_khz_ref,
240 ref_freq, freq->new);
241 if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
242 tsc_khz = cpu_khz;
243 set_cyc2ns_scale(cpu_khz);
244 /*
245 * TSC based sched_clock turns
246 * to junk w/ cpufreq
247 */
248 mark_tsc_unstable("cpufreq changes");
249 }
250 }
251 }
252
253 return 0;
254}
255
256static struct notifier_block time_cpufreq_notifier_block = {
257 .notifier_call = time_cpufreq_notifier
258};
259
260static int __init cpufreq_tsc(void)
261{
262 return cpufreq_register_notifier(&time_cpufreq_notifier_block,
263 CPUFREQ_TRANSITION_NOTIFIER);
264}
265core_initcall(cpufreq_tsc);
266
267#endif
268
269/* clock source code */
270
271static unsigned long current_tsc_khz = 0;
272
273static cycle_t read_tsc(void)
274{
275 cycle_t ret;
276
277 rdtscll(ret);
278
279 return ret;
280}
281
282static struct clocksource clocksource_tsc = {
283 .name = "tsc",
284 .rating = 300,
285 .read = read_tsc,
286 .mask = CLOCKSOURCE_MASK(64),
287 .mult = 0, /* to be set */
288 .shift = 22,
289 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
290 CLOCK_SOURCE_MUST_VERIFY,
291};
292
293void mark_tsc_unstable(char *reason)
294{
295 if (!tsc_unstable) {
296 tsc_unstable = 1;
297 tsc_enabled = 0;
298 printk("Marking TSC unstable due to: %s.\n", reason);
299 /* Can be called before registration */
300 if (clocksource_tsc.mult)
301 clocksource_change_rating(&clocksource_tsc, 0);
302 else
303 clocksource_tsc.rating = 0;
304 }
305}
306EXPORT_SYMBOL_GPL(mark_tsc_unstable);
307
308static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
309{
310 printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
311 d->ident);
312 tsc_unstable = 1;
313 return 0;
314}
315
316/* List of systems that have known TSC problems */
317static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
318 {
319 .callback = dmi_mark_tsc_unstable,
320 .ident = "IBM Thinkpad 380XD",
321 .matches = {
322 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
323 DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
324 },
325 },
326 {}
327};
328
329/*
330 * Make an educated guess if the TSC is trustworthy and synchronized
331 * over all CPUs.
332 */
333__cpuinit int unsynchronized_tsc(void)
334{
335 if (!cpu_has_tsc || tsc_unstable)
336 return 1;
337 /*
338 * Intel systems are normally all synchronized.
339 * Exceptions must mark TSC as unstable:
340 */
341 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
342 /* assume multi socket systems are not synchronized: */
343 if (num_possible_cpus() > 1)
344 tsc_unstable = 1;
345 }
346 return tsc_unstable;
347}
348
349/*
350 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
351 */
352#ifdef CONFIG_MGEODE_LX
353/* RTSC counts during suspend */
354#define RTSC_SUSP 0x100
355
356static void __init check_geode_tsc_reliable(void)
357{
358 unsigned long val;
359
360 rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
361 if ((val & RTSC_SUSP))
362 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
363}
364#else
365static inline void check_geode_tsc_reliable(void) { }
366#endif
367
368
369void __init tsc_init(void)
370{
371 if (!cpu_has_tsc || tsc_disable)
372 goto out_no_tsc;
373
374 cpu_khz = calculate_cpu_khz();
375 tsc_khz = cpu_khz;
376
377 if (!cpu_khz)
378 goto out_no_tsc;
379
380 printk("Detected %lu.%03lu MHz processor.\n",
381 (unsigned long)cpu_khz / 1000,
382 (unsigned long)cpu_khz % 1000);
383
384 set_cyc2ns_scale(cpu_khz);
385 use_tsc_delay();
386
387 /* Check and install the TSC clocksource */
388 dmi_check_system(bad_tsc_dmi_table);
389
390 unsynchronized_tsc();
391 check_geode_tsc_reliable();
392 current_tsc_khz = tsc_khz;
393 clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
394 clocksource_tsc.shift);
395 /* lower the rating if we already know its unstable: */
396 if (check_tsc_unstable()) {
397 clocksource_tsc.rating = 0;
398 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
399 } else
400 tsc_enabled = 1;
401
402 clocksource_register(&clocksource_tsc);
403
404 return;
405
406out_no_tsc:
407 /*
408 * Set the tsc_disable flag if there's no TSC support, this
409 * makes it a fast flag for the kernel to see whether it
410 * should be using the TSC.
411 */
412 tsc_disable = 1;
413}
diff --git a/arch/x86_64/kernel/tsc.c b/arch/x86/kernel/tsc_64.c
index 2a59bde663f2..2a59bde663f2 100644
--- a/arch/x86_64/kernel/tsc.c
+++ b/arch/x86/kernel/tsc_64.c
diff --git a/arch/x86_64/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 355f5f506c81..355f5f506c81 100644
--- a/arch/x86_64/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
diff --git a/arch/x86_64/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu_64.S
index 45b6f8a975a1..45b6f8a975a1 100644
--- a/arch/x86_64/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu_64.S
diff --git a/arch/i386/kernel/vm86.c b/arch/x86/kernel/vm86_32.c
index f2dcd1d27c0a..f2dcd1d27c0a 100644
--- a/arch/i386/kernel/vm86.c
+++ b/arch/x86/kernel/vm86_32.c
diff --git a/arch/i386/kernel/vmi.c b/arch/x86/kernel/vmi_32.c
index 18673e0f193b..18673e0f193b 100644
--- a/arch/i386/kernel/vmi.c
+++ b/arch/x86/kernel/vmi_32.c
diff --git a/arch/i386/kernel/vmiclock.c b/arch/x86/kernel/vmiclock_32.c
index b1b5ab08b26e..b1b5ab08b26e 100644
--- a/arch/i386/kernel/vmiclock.c
+++ b/arch/x86/kernel/vmiclock_32.c
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..849ee611f013
--- /dev/null
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "vmlinux_32.lds.S"
3#else
4# include "vmlinux_64.lds.S"
5#endif
diff --git a/arch/i386/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index 7d72cce00529..7d72cce00529 100644
--- a/arch/i386/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
diff --git a/arch/x86_64/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index ba8ea97abd21..ba8ea97abd21 100644
--- a/arch/x86_64/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
diff --git a/arch/x86_64/kernel/vsmp.c b/arch/x86/kernel/vsmp_64.c
index 414caf0c5f9a..414caf0c5f9a 100644
--- a/arch/x86_64/kernel/vsmp.c
+++ b/arch/x86/kernel/vsmp_64.c
diff --git a/arch/x86/kernel/vsyscall-int80_32.S b/arch/x86/kernel/vsyscall-int80_32.S
new file mode 100644
index 000000000000..103cab6aa7c0
--- /dev/null
+++ b/arch/x86/kernel/vsyscall-int80_32.S
@@ -0,0 +1,53 @@
1/*
2 * Code for the vsyscall page. This version uses the old int $0x80 method.
3 *
4 * NOTE:
5 * 1) __kernel_vsyscall _must_ be first in this page.
6 * 2) there are alignment constraints on this stub, see vsyscall-sigreturn.S
7 * for details.
8 */
9
10 .text
11 .globl __kernel_vsyscall
12 .type __kernel_vsyscall,@function
13__kernel_vsyscall:
14.LSTART_vsyscall:
15 int $0x80
16 ret
17.LEND_vsyscall:
18 .size __kernel_vsyscall,.-.LSTART_vsyscall
19 .previous
20
21 .section .eh_frame,"a",@progbits
22.LSTARTFRAMEDLSI:
23 .long .LENDCIEDLSI-.LSTARTCIEDLSI
24.LSTARTCIEDLSI:
25 .long 0 /* CIE ID */
26 .byte 1 /* Version number */
27 .string "zR" /* NUL-terminated augmentation string */
28 .uleb128 1 /* Code alignment factor */
29 .sleb128 -4 /* Data alignment factor */
30 .byte 8 /* Return address register column */
31 .uleb128 1 /* Augmentation value length */
32 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
33 .byte 0x0c /* DW_CFA_def_cfa */
34 .uleb128 4
35 .uleb128 4
36 .byte 0x88 /* DW_CFA_offset, column 0x8 */
37 .uleb128 1
38 .align 4
39.LENDCIEDLSI:
40 .long .LENDFDEDLSI-.LSTARTFDEDLSI /* Length FDE */
41.LSTARTFDEDLSI:
42 .long .LSTARTFDEDLSI-.LSTARTFRAMEDLSI /* CIE pointer */
43 .long .LSTART_vsyscall-. /* PC-relative start address */
44 .long .LEND_vsyscall-.LSTART_vsyscall
45 .uleb128 0
46 .align 4
47.LENDFDEDLSI:
48 .previous
49
50/*
51 * Get the common code for the sigreturn entry points.
52 */
53#include "vsyscall-sigreturn_32.S"
diff --git a/arch/x86/kernel/vsyscall-note_32.S b/arch/x86/kernel/vsyscall-note_32.S
new file mode 100644
index 000000000000..fcf376a37f79
--- /dev/null
+++ b/arch/x86/kernel/vsyscall-note_32.S
@@ -0,0 +1,45 @@
1/*
2 * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
3 * Here we can supply some information useful to userland.
4 */
5
6#include <linux/version.h>
7#include <linux/elfnote.h>
8
9/* Ideally this would use UTS_NAME, but using a quoted string here
10 doesn't work. Remember to change this when changing the
11 kernel's name. */
12ELFNOTE_START(Linux, 0, "a")
13 .long LINUX_VERSION_CODE
14ELFNOTE_END
15
16#ifdef CONFIG_XEN
17/*
18 * Add a special note telling glibc's dynamic linker a fake hardware
19 * flavor that it will use to choose the search path for libraries in the
20 * same way it uses real hardware capabilities like "mmx".
21 * We supply "nosegneg" as the fake capability, to indicate that we
22 * do not like negative offsets in instructions using segment overrides,
23 * since we implement those inefficiently. This makes it possible to
24 * install libraries optimized to avoid those access patterns in someplace
25 * like /lib/i686/tls/nosegneg. Note that an /etc/ld.so.conf.d/file
26 * corresponding to the bits here is needed to make ldconfig work right.
27 * It should contain:
28 * hwcap 1 nosegneg
29 * to match the mapping of bit to name that we give here.
30 *
31 * At runtime, the fake hardware feature will be considered to be present
32 * if its bit is set in the mask word. So, we start with the mask 0, and
33 * at boot time we set VDSO_NOTE_NONEGSEG_BIT if running under Xen.
34 */
35
36#include "../../x86/xen/vdso.h" /* Defines VDSO_NOTE_NONEGSEG_BIT. */
37
38 .globl VDSO_NOTE_MASK
39ELFNOTE_START(GNU, 2, "a")
40 .long 1 /* ncaps */
41VDSO_NOTE_MASK:
42 .long 0 /* mask */
43 .byte VDSO_NOTE_NONEGSEG_BIT; .asciz "nosegneg" /* bit, name */
44ELFNOTE_END
45#endif
diff --git a/arch/i386/kernel/vsyscall-sigreturn.S b/arch/x86/kernel/vsyscall-sigreturn_32.S
index a92262f41659..a92262f41659 100644
--- a/arch/i386/kernel/vsyscall-sigreturn.S
+++ b/arch/x86/kernel/vsyscall-sigreturn_32.S
diff --git a/arch/x86/kernel/vsyscall-sysenter_32.S b/arch/x86/kernel/vsyscall-sysenter_32.S
new file mode 100644
index 000000000000..ed879bf42995
--- /dev/null
+++ b/arch/x86/kernel/vsyscall-sysenter_32.S
@@ -0,0 +1,122 @@
1/*
2 * Code for the vsyscall page. This version uses the sysenter instruction.
3 *
4 * NOTE:
5 * 1) __kernel_vsyscall _must_ be first in this page.
6 * 2) there are alignment constraints on this stub, see vsyscall-sigreturn.S
7 * for details.
8 */
9
10/*
11 * The caller puts arg2 in %ecx, which gets pushed. The kernel will use
12 * %ecx itself for arg2. The pushing is because the sysexit instruction
13 * (found in entry.S) requires that we clobber %ecx with the desired %esp.
14 * User code might expect that %ecx is unclobbered though, as it would be
15 * for returning via the iret instruction, so we must push and pop.
16 *
17 * The caller puts arg3 in %edx, which the sysexit instruction requires
18 * for %eip. Thus, exactly as for arg2, we must push and pop.
19 *
20 * Arg6 is different. The caller puts arg6 in %ebp. Since the sysenter
21 * instruction clobbers %esp, the user's %esp won't even survive entry
22 * into the kernel. We store %esp in %ebp. Code in entry.S must fetch
23 * arg6 from the stack.
24 *
25 * You can not use this vsyscall for the clone() syscall because the
26 * three dwords on the parent stack do not get copied to the child.
27 */
28 .text
29 .globl __kernel_vsyscall
30 .type __kernel_vsyscall,@function
31__kernel_vsyscall:
32.LSTART_vsyscall:
33 push %ecx
34.Lpush_ecx:
35 push %edx
36.Lpush_edx:
37 push %ebp
38.Lenter_kernel:
39 movl %esp,%ebp
40 sysenter
41
42 /* 7: align return point with nop's to make disassembly easier */
43 .space 7,0x90
44
45 /* 14: System call restart point is here! (SYSENTER_RETURN-2) */
46 jmp .Lenter_kernel
47 /* 16: System call normal return point is here! */
48 .globl SYSENTER_RETURN /* Symbol used by sysenter.c */
49SYSENTER_RETURN:
50 pop %ebp
51.Lpop_ebp:
52 pop %edx
53.Lpop_edx:
54 pop %ecx
55.Lpop_ecx:
56 ret
57.LEND_vsyscall:
58 .size __kernel_vsyscall,.-.LSTART_vsyscall
59 .previous
60
61 .section .eh_frame,"a",@progbits
62.LSTARTFRAMEDLSI:
63 .long .LENDCIEDLSI-.LSTARTCIEDLSI
64.LSTARTCIEDLSI:
65 .long 0 /* CIE ID */
66 .byte 1 /* Version number */
67 .string "zR" /* NUL-terminated augmentation string */
68 .uleb128 1 /* Code alignment factor */
69 .sleb128 -4 /* Data alignment factor */
70 .byte 8 /* Return address register column */
71 .uleb128 1 /* Augmentation value length */
72 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
73 .byte 0x0c /* DW_CFA_def_cfa */
74 .uleb128 4
75 .uleb128 4
76 .byte 0x88 /* DW_CFA_offset, column 0x8 */
77 .uleb128 1
78 .align 4
79.LENDCIEDLSI:
80 .long .LENDFDEDLSI-.LSTARTFDEDLSI /* Length FDE */
81.LSTARTFDEDLSI:
82 .long .LSTARTFDEDLSI-.LSTARTFRAMEDLSI /* CIE pointer */
83 .long .LSTART_vsyscall-. /* PC-relative start address */
84 .long .LEND_vsyscall-.LSTART_vsyscall
85 .uleb128 0
86 /* What follows are the instructions for the table generation.
87 We have to record all changes of the stack pointer. */
88 .byte 0x04 /* DW_CFA_advance_loc4 */
89 .long .Lpush_ecx-.LSTART_vsyscall
90 .byte 0x0e /* DW_CFA_def_cfa_offset */
91 .byte 0x08 /* RA at offset 8 now */
92 .byte 0x04 /* DW_CFA_advance_loc4 */
93 .long .Lpush_edx-.Lpush_ecx
94 .byte 0x0e /* DW_CFA_def_cfa_offset */
95 .byte 0x0c /* RA at offset 12 now */
96 .byte 0x04 /* DW_CFA_advance_loc4 */
97 .long .Lenter_kernel-.Lpush_edx
98 .byte 0x0e /* DW_CFA_def_cfa_offset */
99 .byte 0x10 /* RA at offset 16 now */
100 .byte 0x85, 0x04 /* DW_CFA_offset %ebp -16 */
101 /* Finally the epilogue. */
102 .byte 0x04 /* DW_CFA_advance_loc4 */
103 .long .Lpop_ebp-.Lenter_kernel
104 .byte 0x0e /* DW_CFA_def_cfa_offset */
105 .byte 0x0c /* RA at offset 12 now */
106 .byte 0xc5 /* DW_CFA_restore %ebp */
107 .byte 0x04 /* DW_CFA_advance_loc4 */
108 .long .Lpop_edx-.Lpop_ebp
109 .byte 0x0e /* DW_CFA_def_cfa_offset */
110 .byte 0x08 /* RA at offset 8 now */
111 .byte 0x04 /* DW_CFA_advance_loc4 */
112 .long .Lpop_ecx-.Lpop_edx
113 .byte 0x0e /* DW_CFA_def_cfa_offset */
114 .byte 0x04 /* RA at offset 4 now */
115 .align 4
116.LENDFDEDLSI:
117 .previous
118
119/*
120 * Get the common code for the sigreturn entry points.
121 */
122#include "vsyscall-sigreturn_32.S"
diff --git a/arch/x86/kernel/vsyscall_32.S b/arch/x86/kernel/vsyscall_32.S
new file mode 100644
index 000000000000..a5ab3dc4fd25
--- /dev/null
+++ b/arch/x86/kernel/vsyscall_32.S
@@ -0,0 +1,15 @@
1#include <linux/init.h>
2
3__INITDATA
4
5 .globl vsyscall_int80_start, vsyscall_int80_end
6vsyscall_int80_start:
7 .incbin "arch/x86/kernel/vsyscall-int80_32.so"
8vsyscall_int80_end:
9
10 .globl vsyscall_sysenter_start, vsyscall_sysenter_end
11vsyscall_sysenter_start:
12 .incbin "arch/x86/kernel/vsyscall-sysenter_32.so"
13vsyscall_sysenter_end:
14
15__FINIT
diff --git a/arch/i386/kernel/vsyscall.lds.S b/arch/x86/kernel/vsyscall_32.lds.S
index 4a8b0ed9b8fb..4a8b0ed9b8fb 100644
--- a/arch/i386/kernel/vsyscall.lds.S
+++ b/arch/x86/kernel/vsyscall_32.lds.S
diff --git a/arch/x86_64/kernel/vsyscall.c b/arch/x86/kernel/vsyscall_64.c
index 06c34949bfdc..06c34949bfdc 100644
--- a/arch/x86_64/kernel/vsyscall.c
+++ b/arch/x86/kernel/vsyscall_64.c
diff --git a/arch/x86_64/kernel/x8664_ksyms.c b/arch/x86/kernel/x8664_ksyms_64.c
index 77c25b307635..77c25b307635 100644
--- a/arch/x86_64/kernel/x8664_ksyms.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
new file mode 100644
index 000000000000..329da276c6f1
--- /dev/null
+++ b/arch/x86/lib/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/lib/Makefile_32
3else
4include ${srctree}/arch/x86/lib/Makefile_64
5endif
diff --git a/arch/x86/lib/Makefile_32 b/arch/x86/lib/Makefile_32
new file mode 100644
index 000000000000..98d1f1e2e2ef
--- /dev/null
+++ b/arch/x86/lib/Makefile_32
@@ -0,0 +1,11 @@
1#
2# Makefile for i386-specific library files..
3#
4
5
6lib-y = checksum_32.o delay_32.o usercopy_32.o getuser_32.o putuser_32.o memcpy_32.o strstr_32.o \
7 bitops_32.o semaphore_32.o string_32.o
8
9lib-$(CONFIG_X86_USE_3DNOW) += mmx_32.o
10
11obj-$(CONFIG_SMP) += msr-on-cpu.o
diff --git a/arch/x86/lib/Makefile_64 b/arch/x86/lib/Makefile_64
new file mode 100644
index 000000000000..bbabad3c9335
--- /dev/null
+++ b/arch/x86/lib/Makefile_64
@@ -0,0 +1,13 @@
1#
2# Makefile for x86_64-specific library files.
3#
4
5CFLAGS_csum-partial_64.o := -funroll-loops
6
7obj-y := io_64.o iomap_copy_64.o
8obj-$(CONFIG_SMP) += msr-on-cpu.o
9
10lib-y := csum-partial_64.o csum-copy_64.o csum-wrappers_64.o delay_64.o \
11 usercopy_64.o getuser_64.o putuser_64.o \
12 thunk_64.o clear_page_64.o copy_page_64.o bitstr_64.o bitops_64.o
13lib-y += memcpy_64.o memmove_64.o memset_64.o copy_user_64.o rwlock_64.o copy_user_nocache_64.o
diff --git a/arch/i386/lib/bitops.c b/arch/x86/lib/bitops_32.c
index afd0045595d4..afd0045595d4 100644
--- a/arch/i386/lib/bitops.c
+++ b/arch/x86/lib/bitops_32.c
diff --git a/arch/x86_64/lib/bitops.c b/arch/x86/lib/bitops_64.c
index 95b6d9639fba..95b6d9639fba 100644
--- a/arch/x86_64/lib/bitops.c
+++ b/arch/x86/lib/bitops_64.c
diff --git a/arch/x86_64/lib/bitstr.c b/arch/x86/lib/bitstr_64.c
index 24676609a6ac..24676609a6ac 100644
--- a/arch/x86_64/lib/bitstr.c
+++ b/arch/x86/lib/bitstr_64.c
diff --git a/arch/i386/lib/checksum.S b/arch/x86/lib/checksum_32.S
index adbccd0bbb78..adbccd0bbb78 100644
--- a/arch/i386/lib/checksum.S
+++ b/arch/x86/lib/checksum_32.S
diff --git a/arch/x86_64/lib/clear_page.S b/arch/x86/lib/clear_page_64.S
index 9a10a78bb4a4..9a10a78bb4a4 100644
--- a/arch/x86_64/lib/clear_page.S
+++ b/arch/x86/lib/clear_page_64.S
diff --git a/arch/x86_64/lib/copy_page.S b/arch/x86/lib/copy_page_64.S
index 727a5d46d2fc..727a5d46d2fc 100644
--- a/arch/x86_64/lib/copy_page.S
+++ b/arch/x86/lib/copy_page_64.S
diff --git a/arch/x86_64/lib/copy_user.S b/arch/x86/lib/copy_user_64.S
index 70bebd310408..70bebd310408 100644
--- a/arch/x86_64/lib/copy_user.S
+++ b/arch/x86/lib/copy_user_64.S
diff --git a/arch/x86_64/lib/copy_user_nocache.S b/arch/x86/lib/copy_user_nocache_64.S
index 4620efb12f13..4620efb12f13 100644
--- a/arch/x86_64/lib/copy_user_nocache.S
+++ b/arch/x86/lib/copy_user_nocache_64.S
diff --git a/arch/x86_64/lib/csum-copy.S b/arch/x86/lib/csum-copy_64.S
index f0dba36578ea..f0dba36578ea 100644
--- a/arch/x86_64/lib/csum-copy.S
+++ b/arch/x86/lib/csum-copy_64.S
diff --git a/arch/x86_64/lib/csum-partial.c b/arch/x86/lib/csum-partial_64.c
index bc503f506903..bc503f506903 100644
--- a/arch/x86_64/lib/csum-partial.c
+++ b/arch/x86/lib/csum-partial_64.c
diff --git a/arch/x86_64/lib/csum-wrappers.c b/arch/x86/lib/csum-wrappers_64.c
index fd42a4a095fc..fd42a4a095fc 100644
--- a/arch/x86_64/lib/csum-wrappers.c
+++ b/arch/x86/lib/csum-wrappers_64.c
diff --git a/arch/i386/lib/delay.c b/arch/x86/lib/delay_32.c
index f6edb11364df..f6edb11364df 100644
--- a/arch/i386/lib/delay.c
+++ b/arch/x86/lib/delay_32.c
diff --git a/arch/x86_64/lib/delay.c b/arch/x86/lib/delay_64.c
index 2dbebd308347..2dbebd308347 100644
--- a/arch/x86_64/lib/delay.c
+++ b/arch/x86/lib/delay_64.c
diff --git a/arch/i386/lib/getuser.S b/arch/x86/lib/getuser_32.S
index 6d84b53f12a2..6d84b53f12a2 100644
--- a/arch/i386/lib/getuser.S
+++ b/arch/x86/lib/getuser_32.S
diff --git a/arch/x86_64/lib/getuser.S b/arch/x86/lib/getuser_64.S
index 5448876261f8..5448876261f8 100644
--- a/arch/x86_64/lib/getuser.S
+++ b/arch/x86/lib/getuser_64.S
diff --git a/arch/x86_64/lib/io.c b/arch/x86/lib/io_64.c
index 87b4a4e18039..87b4a4e18039 100644
--- a/arch/x86_64/lib/io.c
+++ b/arch/x86/lib/io_64.c
diff --git a/arch/x86_64/lib/iomap_copy.S b/arch/x86/lib/iomap_copy_64.S
index 05a95e713da8..05a95e713da8 100644
--- a/arch/x86_64/lib/iomap_copy.S
+++ b/arch/x86/lib/iomap_copy_64.S
diff --git a/arch/i386/lib/memcpy.c b/arch/x86/lib/memcpy_32.c
index 8ac51b82a632..8ac51b82a632 100644
--- a/arch/i386/lib/memcpy.c
+++ b/arch/x86/lib/memcpy_32.c
diff --git a/arch/x86_64/lib/memcpy.S b/arch/x86/lib/memcpy_64.S
index c22981fa2f3a..c22981fa2f3a 100644
--- a/arch/x86_64/lib/memcpy.S
+++ b/arch/x86/lib/memcpy_64.S
diff --git a/arch/x86_64/lib/memmove.c b/arch/x86/lib/memmove_64.c
index 751ebae8ec42..751ebae8ec42 100644
--- a/arch/x86_64/lib/memmove.c
+++ b/arch/x86/lib/memmove_64.c
diff --git a/arch/x86_64/lib/memset.S b/arch/x86/lib/memset_64.S
index 2c5948116bd2..2c5948116bd2 100644
--- a/arch/x86_64/lib/memset.S
+++ b/arch/x86/lib/memset_64.S
diff --git a/arch/i386/lib/mmx.c b/arch/x86/lib/mmx_32.c
index 28084d2e8dd4..28084d2e8dd4 100644
--- a/arch/i386/lib/mmx.c
+++ b/arch/x86/lib/mmx_32.c
diff --git a/arch/i386/lib/msr-on-cpu.c b/arch/x86/lib/msr-on-cpu.c
index 7767962f25d3..7767962f25d3 100644
--- a/arch/i386/lib/msr-on-cpu.c
+++ b/arch/x86/lib/msr-on-cpu.c
diff --git a/arch/i386/lib/putuser.S b/arch/x86/lib/putuser_32.S
index f58fba109d18..f58fba109d18 100644
--- a/arch/i386/lib/putuser.S
+++ b/arch/x86/lib/putuser_32.S
diff --git a/arch/x86_64/lib/putuser.S b/arch/x86/lib/putuser_64.S
index 4989f5a8fa9b..4989f5a8fa9b 100644
--- a/arch/x86_64/lib/putuser.S
+++ b/arch/x86/lib/putuser_64.S
diff --git a/arch/x86_64/lib/rwlock.S b/arch/x86/lib/rwlock_64.S
index 0cde1f807314..0cde1f807314 100644
--- a/arch/x86_64/lib/rwlock.S
+++ b/arch/x86/lib/rwlock_64.S
diff --git a/arch/i386/lib/semaphore.S b/arch/x86/lib/semaphore_32.S
index c01eb39c0b43..c01eb39c0b43 100644
--- a/arch/i386/lib/semaphore.S
+++ b/arch/x86/lib/semaphore_32.S
diff --git a/arch/i386/lib/string.c b/arch/x86/lib/string_32.c
index 2c773fefa3dd..2c773fefa3dd 100644
--- a/arch/i386/lib/string.c
+++ b/arch/x86/lib/string_32.c
diff --git a/arch/i386/lib/strstr.c b/arch/x86/lib/strstr_32.c
index a3dafbf59dae..a3dafbf59dae 100644
--- a/arch/i386/lib/strstr.c
+++ b/arch/x86/lib/strstr_32.c
diff --git a/arch/x86_64/lib/thunk.S b/arch/x86/lib/thunk_64.S
index 55e586d352d3..55e586d352d3 100644
--- a/arch/x86_64/lib/thunk.S
+++ b/arch/x86/lib/thunk_64.S
diff --git a/arch/i386/lib/usercopy.c b/arch/x86/lib/usercopy_32.c
index 9f38b12b4af1..9f38b12b4af1 100644
--- a/arch/i386/lib/usercopy.c
+++ b/arch/x86/lib/usercopy_32.c
diff --git a/arch/x86_64/lib/usercopy.c b/arch/x86/lib/usercopy_64.c
index 893d43f838cc..893d43f838cc 100644
--- a/arch/x86_64/lib/usercopy.c
+++ b/arch/x86/lib/usercopy_64.c
diff --git a/arch/i386/mach-default/Makefile b/arch/x86/mach-default/Makefile
index 012fe34459e6..012fe34459e6 100644
--- a/arch/i386/mach-default/Makefile
+++ b/arch/x86/mach-default/Makefile
diff --git a/arch/i386/mach-default/setup.c b/arch/x86/mach-default/setup.c
index 7f635c7a2381..7f635c7a2381 100644
--- a/arch/i386/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
diff --git a/arch/i386/mach-es7000/Makefile b/arch/x86/mach-es7000/Makefile
index 69dd4da218dc..69dd4da218dc 100644
--- a/arch/i386/mach-es7000/Makefile
+++ b/arch/x86/mach-es7000/Makefile
diff --git a/arch/i386/mach-es7000/es7000.h b/arch/x86/mach-es7000/es7000.h
index c8d5aa132fa0..c8d5aa132fa0 100644
--- a/arch/i386/mach-es7000/es7000.h
+++ b/arch/x86/mach-es7000/es7000.h
diff --git a/arch/i386/mach-es7000/es7000plat.c b/arch/x86/mach-es7000/es7000plat.c
index ab99072d3f9a..ab99072d3f9a 100644
--- a/arch/i386/mach-es7000/es7000plat.c
+++ b/arch/x86/mach-es7000/es7000plat.c
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile
new file mode 100644
index 000000000000..19d6d407737b
--- /dev/null
+++ b/arch/x86/mach-generic/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the generic architecture
3#
4
5EXTRA_CFLAGS := -Iarch/x86/kernel
6
7obj-y := probe.o summit.o bigsmp.o es7000.o default.o
8obj-y += ../../x86/mach-es7000/
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
new file mode 100644
index 000000000000..292a225edabe
--- /dev/null
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -0,0 +1,57 @@
1/*
2 * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
3 * Drives the local APIC in "clustered mode".
4 */
5#define APIC_DEFINITION 1
6#include <linux/threads.h>
7#include <linux/cpumask.h>
8#include <asm/smp.h>
9#include <asm/mpspec.h>
10#include <asm/genapic.h>
11#include <asm/fixmap.h>
12#include <asm/apicdef.h>
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <linux/dmi.h>
17#include <asm/mach-bigsmp/mach_apic.h>
18#include <asm/mach-bigsmp/mach_apicdef.h>
19#include <asm/mach-bigsmp/mach_ipi.h>
20#include <asm/mach-default/mach_mpparse.h>
21
22static int dmi_bigsmp; /* can be set by dmi scanners */
23
24static int hp_ht_bigsmp(const struct dmi_system_id *d)
25{
26#ifdef CONFIG_X86_GENERICARCH
27 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
28 dmi_bigsmp = 1;
29#endif
30 return 0;
31}
32
33
34static const struct dmi_system_id bigsmp_dmi_table[] = {
35 { hp_ht_bigsmp, "HP ProLiant DL760 G2", {
36 DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
37 DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
38 }},
39
40 { hp_ht_bigsmp, "HP ProLiant DL740", {
41 DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
42 DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
43 }},
44 { }
45};
46
47
48static int probe_bigsmp(void)
49{
50 if (def_to_bigsmp)
51 dmi_bigsmp = 1;
52 else
53 dmi_check_system(bigsmp_dmi_table);
54 return dmi_bigsmp;
55}
56
57struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp);
diff --git a/arch/i386/mach-generic/default.c b/arch/x86/mach-generic/default.c
index 8685208d8512..8685208d8512 100644
--- a/arch/i386/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
diff --git a/arch/i386/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 4742626f08c4..4742626f08c4 100644
--- a/arch/i386/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
diff --git a/arch/i386/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
index 74f3da634423..74f3da634423 100644
--- a/arch/i386/mach-generic/probe.c
+++ b/arch/x86/mach-generic/probe.c
diff --git a/arch/i386/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 74883ccb8f73..74883ccb8f73 100644
--- a/arch/i386/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
diff --git a/arch/i386/mach-visws/Makefile b/arch/x86/mach-visws/Makefile
index 835fd96ad768..835fd96ad768 100644
--- a/arch/i386/mach-visws/Makefile
+++ b/arch/x86/mach-visws/Makefile
diff --git a/arch/i386/mach-visws/mpparse.c b/arch/x86/mach-visws/mpparse.c
index f3c74fab8b95..f3c74fab8b95 100644
--- a/arch/i386/mach-visws/mpparse.c
+++ b/arch/x86/mach-visws/mpparse.c
diff --git a/arch/i386/mach-visws/reboot.c b/arch/x86/mach-visws/reboot.c
index 99332abfad42..99332abfad42 100644
--- a/arch/i386/mach-visws/reboot.c
+++ b/arch/x86/mach-visws/reboot.c
diff --git a/arch/i386/mach-visws/setup.c b/arch/x86/mach-visws/setup.c
index 1f81f10e03a0..1f81f10e03a0 100644
--- a/arch/i386/mach-visws/setup.c
+++ b/arch/x86/mach-visws/setup.c
diff --git a/arch/i386/mach-visws/traps.c b/arch/x86/mach-visws/traps.c
index 843b67acf43b..843b67acf43b 100644
--- a/arch/i386/mach-visws/traps.c
+++ b/arch/x86/mach-visws/traps.c
diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/x86/mach-visws/visws_apic.c
index 710faf71a650..710faf71a650 100644
--- a/arch/i386/mach-visws/visws_apic.c
+++ b/arch/x86/mach-visws/visws_apic.c
diff --git a/arch/x86/mach-voyager/Makefile b/arch/x86/mach-voyager/Makefile
new file mode 100644
index 000000000000..15c250b371d3
--- /dev/null
+++ b/arch/x86/mach-voyager/Makefile
@@ -0,0 +1,8 @@
1#
2# Makefile for the linux kernel.
3#
4
5EXTRA_CFLAGS := -Iarch/x86/kernel
6obj-y := setup.o voyager_basic.o voyager_thread.o
7
8obj-$(CONFIG_SMP) += voyager_smp.o voyager_cat.o
diff --git a/arch/i386/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index 2b55694e6400..2b55694e6400 100644
--- a/arch/i386/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
diff --git a/arch/i386/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
index 9b77b39b71a6..9b77b39b71a6 100644
--- a/arch/i386/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
diff --git a/arch/i386/mach-voyager/voyager_cat.c b/arch/x86/mach-voyager/voyager_cat.c
index 26a2d4c54b68..26a2d4c54b68 100644
--- a/arch/i386/mach-voyager/voyager_cat.c
+++ b/arch/x86/mach-voyager/voyager_cat.c
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index b87f8548e75a..b87f8548e75a 100644
--- a/arch/i386/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
diff --git a/arch/i386/mach-voyager/voyager_thread.c b/arch/x86/mach-voyager/voyager_thread.c
index f9d595338159..f9d595338159 100644
--- a/arch/i386/mach-voyager/voyager_thread.c
+++ b/arch/x86/mach-voyager/voyager_thread.c
diff --git a/arch/i386/math-emu/Makefile b/arch/x86/math-emu/Makefile
index 9c943fa6ce6b..9c943fa6ce6b 100644
--- a/arch/i386/math-emu/Makefile
+++ b/arch/x86/math-emu/Makefile
diff --git a/arch/i386/math-emu/README b/arch/x86/math-emu/README
index e6235491d6eb..e6235491d6eb 100644
--- a/arch/i386/math-emu/README
+++ b/arch/x86/math-emu/README
diff --git a/arch/i386/math-emu/control_w.h b/arch/x86/math-emu/control_w.h
index ae2274dbd305..ae2274dbd305 100644
--- a/arch/i386/math-emu/control_w.h
+++ b/arch/x86/math-emu/control_w.h
diff --git a/arch/i386/math-emu/div_Xsig.S b/arch/x86/math-emu/div_Xsig.S
index f77ba3058b31..f77ba3058b31 100644
--- a/arch/i386/math-emu/div_Xsig.S
+++ b/arch/x86/math-emu/div_Xsig.S
diff --git a/arch/i386/math-emu/div_small.S b/arch/x86/math-emu/div_small.S
index 47099628fa4c..47099628fa4c 100644
--- a/arch/i386/math-emu/div_small.S
+++ b/arch/x86/math-emu/div_small.S
diff --git a/arch/i386/math-emu/errors.c b/arch/x86/math-emu/errors.c
index a1b0d22f6978..a1b0d22f6978 100644
--- a/arch/i386/math-emu/errors.c
+++ b/arch/x86/math-emu/errors.c
diff --git a/arch/i386/math-emu/exception.h b/arch/x86/math-emu/exception.h
index b463f21a811e..b463f21a811e 100644
--- a/arch/i386/math-emu/exception.h
+++ b/arch/x86/math-emu/exception.h
diff --git a/arch/i386/math-emu/fpu_arith.c b/arch/x86/math-emu/fpu_arith.c
index 6972dec01af6..6972dec01af6 100644
--- a/arch/i386/math-emu/fpu_arith.c
+++ b/arch/x86/math-emu/fpu_arith.c
diff --git a/arch/i386/math-emu/fpu_asm.h b/arch/x86/math-emu/fpu_asm.h
index 9ba12416df12..9ba12416df12 100644
--- a/arch/i386/math-emu/fpu_asm.h
+++ b/arch/x86/math-emu/fpu_asm.h
diff --git a/arch/i386/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c
index 20886cfb9f76..20886cfb9f76 100644
--- a/arch/i386/math-emu/fpu_aux.c
+++ b/arch/x86/math-emu/fpu_aux.c
diff --git a/arch/i386/math-emu/fpu_emu.h b/arch/x86/math-emu/fpu_emu.h
index 65120f523853..65120f523853 100644
--- a/arch/i386/math-emu/fpu_emu.h
+++ b/arch/x86/math-emu/fpu_emu.h
diff --git a/arch/i386/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c
index 1853524c8b57..1853524c8b57 100644
--- a/arch/i386/math-emu/fpu_entry.c
+++ b/arch/x86/math-emu/fpu_entry.c
diff --git a/arch/i386/math-emu/fpu_etc.c b/arch/x86/math-emu/fpu_etc.c
index e3b5d465587f..e3b5d465587f 100644
--- a/arch/i386/math-emu/fpu_etc.c
+++ b/arch/x86/math-emu/fpu_etc.c
diff --git a/arch/i386/math-emu/fpu_proto.h b/arch/x86/math-emu/fpu_proto.h
index 37a8a7fe7e2b..37a8a7fe7e2b 100644
--- a/arch/i386/math-emu/fpu_proto.h
+++ b/arch/x86/math-emu/fpu_proto.h
diff --git a/arch/i386/math-emu/fpu_system.h b/arch/x86/math-emu/fpu_system.h
index a3ae28c49ddd..a3ae28c49ddd 100644
--- a/arch/i386/math-emu/fpu_system.h
+++ b/arch/x86/math-emu/fpu_system.h
diff --git a/arch/i386/math-emu/fpu_tags.c b/arch/x86/math-emu/fpu_tags.c
index cb436fe20e4c..cb436fe20e4c 100644
--- a/arch/i386/math-emu/fpu_tags.c
+++ b/arch/x86/math-emu/fpu_tags.c
diff --git a/arch/i386/math-emu/fpu_trig.c b/arch/x86/math-emu/fpu_trig.c
index 403cbde1d425..403cbde1d425 100644
--- a/arch/i386/math-emu/fpu_trig.c
+++ b/arch/x86/math-emu/fpu_trig.c
diff --git a/arch/i386/math-emu/get_address.c b/arch/x86/math-emu/get_address.c
index 2e2c51a8bd3a..2e2c51a8bd3a 100644
--- a/arch/i386/math-emu/get_address.c
+++ b/arch/x86/math-emu/get_address.c
diff --git a/arch/i386/math-emu/load_store.c b/arch/x86/math-emu/load_store.c
index eebd6fb1c8a8..eebd6fb1c8a8 100644
--- a/arch/i386/math-emu/load_store.c
+++ b/arch/x86/math-emu/load_store.c
diff --git a/arch/i386/math-emu/mul_Xsig.S b/arch/x86/math-emu/mul_Xsig.S
index 717785a53eb4..717785a53eb4 100644
--- a/arch/i386/math-emu/mul_Xsig.S
+++ b/arch/x86/math-emu/mul_Xsig.S
diff --git a/arch/i386/math-emu/poly.h b/arch/x86/math-emu/poly.h
index 4db798114923..4db798114923 100644
--- a/arch/i386/math-emu/poly.h
+++ b/arch/x86/math-emu/poly.h
diff --git a/arch/i386/math-emu/poly_2xm1.c b/arch/x86/math-emu/poly_2xm1.c
index 9766ad5e9743..9766ad5e9743 100644
--- a/arch/i386/math-emu/poly_2xm1.c
+++ b/arch/x86/math-emu/poly_2xm1.c
diff --git a/arch/i386/math-emu/poly_atan.c b/arch/x86/math-emu/poly_atan.c
index 82f702952f69..82f702952f69 100644
--- a/arch/i386/math-emu/poly_atan.c
+++ b/arch/x86/math-emu/poly_atan.c
diff --git a/arch/i386/math-emu/poly_l2.c b/arch/x86/math-emu/poly_l2.c
index dd00e1d5b074..dd00e1d5b074 100644
--- a/arch/i386/math-emu/poly_l2.c
+++ b/arch/x86/math-emu/poly_l2.c
diff --git a/arch/i386/math-emu/poly_sin.c b/arch/x86/math-emu/poly_sin.c
index a36313fb06f1..a36313fb06f1 100644
--- a/arch/i386/math-emu/poly_sin.c
+++ b/arch/x86/math-emu/poly_sin.c
diff --git a/arch/i386/math-emu/poly_tan.c b/arch/x86/math-emu/poly_tan.c
index 8df3e03b6e6f..8df3e03b6e6f 100644
--- a/arch/i386/math-emu/poly_tan.c
+++ b/arch/x86/math-emu/poly_tan.c
diff --git a/arch/i386/math-emu/polynom_Xsig.S b/arch/x86/math-emu/polynom_Xsig.S
index 17315c89ff3d..17315c89ff3d 100644
--- a/arch/i386/math-emu/polynom_Xsig.S
+++ b/arch/x86/math-emu/polynom_Xsig.S
diff --git a/arch/i386/math-emu/reg_add_sub.c b/arch/x86/math-emu/reg_add_sub.c
index 7cd3b37ac084..7cd3b37ac084 100644
--- a/arch/i386/math-emu/reg_add_sub.c
+++ b/arch/x86/math-emu/reg_add_sub.c
diff --git a/arch/i386/math-emu/reg_compare.c b/arch/x86/math-emu/reg_compare.c
index f37c5b5a35ad..f37c5b5a35ad 100644
--- a/arch/i386/math-emu/reg_compare.c
+++ b/arch/x86/math-emu/reg_compare.c
diff --git a/arch/i386/math-emu/reg_constant.c b/arch/x86/math-emu/reg_constant.c
index a85015801969..a85015801969 100644
--- a/arch/i386/math-emu/reg_constant.c
+++ b/arch/x86/math-emu/reg_constant.c
diff --git a/arch/i386/math-emu/reg_constant.h b/arch/x86/math-emu/reg_constant.h
index 1bffaec3a134..1bffaec3a134 100644
--- a/arch/i386/math-emu/reg_constant.h
+++ b/arch/x86/math-emu/reg_constant.h
diff --git a/arch/i386/math-emu/reg_convert.c b/arch/x86/math-emu/reg_convert.c
index 45a258752703..45a258752703 100644
--- a/arch/i386/math-emu/reg_convert.c
+++ b/arch/x86/math-emu/reg_convert.c
diff --git a/arch/i386/math-emu/reg_divide.c b/arch/x86/math-emu/reg_divide.c
index 5cee7ff920d9..5cee7ff920d9 100644
--- a/arch/i386/math-emu/reg_divide.c
+++ b/arch/x86/math-emu/reg_divide.c
diff --git a/arch/i386/math-emu/reg_ld_str.c b/arch/x86/math-emu/reg_ld_str.c
index e976caef6498..e976caef6498 100644
--- a/arch/i386/math-emu/reg_ld_str.c
+++ b/arch/x86/math-emu/reg_ld_str.c
diff --git a/arch/i386/math-emu/reg_mul.c b/arch/x86/math-emu/reg_mul.c
index 40f50b61bc67..40f50b61bc67 100644
--- a/arch/i386/math-emu/reg_mul.c
+++ b/arch/x86/math-emu/reg_mul.c
diff --git a/arch/i386/math-emu/reg_norm.S b/arch/x86/math-emu/reg_norm.S
index 8b6352efceef..8b6352efceef 100644
--- a/arch/i386/math-emu/reg_norm.S
+++ b/arch/x86/math-emu/reg_norm.S
diff --git a/arch/i386/math-emu/reg_round.S b/arch/x86/math-emu/reg_round.S
index d1d4e48b4f67..d1d4e48b4f67 100644
--- a/arch/i386/math-emu/reg_round.S
+++ b/arch/x86/math-emu/reg_round.S
diff --git a/arch/i386/math-emu/reg_u_add.S b/arch/x86/math-emu/reg_u_add.S
index 47c4c2434d85..47c4c2434d85 100644
--- a/arch/i386/math-emu/reg_u_add.S
+++ b/arch/x86/math-emu/reg_u_add.S
diff --git a/arch/i386/math-emu/reg_u_div.S b/arch/x86/math-emu/reg_u_div.S
index cc00654b6f9a..cc00654b6f9a 100644
--- a/arch/i386/math-emu/reg_u_div.S
+++ b/arch/x86/math-emu/reg_u_div.S
diff --git a/arch/i386/math-emu/reg_u_mul.S b/arch/x86/math-emu/reg_u_mul.S
index 973f12af97df..973f12af97df 100644
--- a/arch/i386/math-emu/reg_u_mul.S
+++ b/arch/x86/math-emu/reg_u_mul.S
diff --git a/arch/i386/math-emu/reg_u_sub.S b/arch/x86/math-emu/reg_u_sub.S
index 1b6c24801d22..1b6c24801d22 100644
--- a/arch/i386/math-emu/reg_u_sub.S
+++ b/arch/x86/math-emu/reg_u_sub.S
diff --git a/arch/i386/math-emu/round_Xsig.S b/arch/x86/math-emu/round_Xsig.S
index bbe0e87718e4..bbe0e87718e4 100644
--- a/arch/i386/math-emu/round_Xsig.S
+++ b/arch/x86/math-emu/round_Xsig.S
diff --git a/arch/i386/math-emu/shr_Xsig.S b/arch/x86/math-emu/shr_Xsig.S
index 31cdd118e918..31cdd118e918 100644
--- a/arch/i386/math-emu/shr_Xsig.S
+++ b/arch/x86/math-emu/shr_Xsig.S
diff --git a/arch/i386/math-emu/status_w.h b/arch/x86/math-emu/status_w.h
index 59e73302aa60..59e73302aa60 100644
--- a/arch/i386/math-emu/status_w.h
+++ b/arch/x86/math-emu/status_w.h
diff --git a/arch/i386/math-emu/version.h b/arch/x86/math-emu/version.h
index a0d73a1d2b67..a0d73a1d2b67 100644
--- a/arch/i386/math-emu/version.h
+++ b/arch/x86/math-emu/version.h
diff --git a/arch/i386/math-emu/wm_shrx.S b/arch/x86/math-emu/wm_shrx.S
index 518428317985..518428317985 100644
--- a/arch/i386/math-emu/wm_shrx.S
+++ b/arch/x86/math-emu/wm_shrx.S
diff --git a/arch/i386/math-emu/wm_sqrt.S b/arch/x86/math-emu/wm_sqrt.S
index d258f59564e1..d258f59564e1 100644
--- a/arch/i386/math-emu/wm_sqrt.S
+++ b/arch/x86/math-emu/wm_sqrt.S
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
new file mode 100644
index 000000000000..983291096848
--- /dev/null
+++ b/arch/x86/mm/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/mm/Makefile_32
3else
4include ${srctree}/arch/x86/mm/Makefile_64
5endif
diff --git a/arch/x86/mm/Makefile_32 b/arch/x86/mm/Makefile_32
new file mode 100644
index 000000000000..362b4ad082de
--- /dev/null
+++ b/arch/x86/mm/Makefile_32
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux i386-specific parts of the memory manager.
3#
4
5obj-y := init_32.o pgtable_32.o fault_32.o ioremap_32.o extable_32.o pageattr_32.o mmap_32.o
6
7obj-$(CONFIG_NUMA) += discontig_32.o
8obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
9obj-$(CONFIG_HIGHMEM) += highmem_32.o
10obj-$(CONFIG_BOOT_IOREMAP) += boot_ioremap_32.o
diff --git a/arch/x86/mm/Makefile_64 b/arch/x86/mm/Makefile_64
new file mode 100644
index 000000000000..6bcb47945b87
--- /dev/null
+++ b/arch/x86/mm/Makefile_64
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux x86_64-specific parts of the memory manager.
3#
4
5obj-y := init_64.o fault_64.o ioremap_64.o extable_64.o pageattr_64.o mmap_64.o
6obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
7obj-$(CONFIG_NUMA) += numa_64.o
8obj-$(CONFIG_K8_NUMA) += k8topology_64.o
9obj-$(CONFIG_ACPI_NUMA) += srat_64.o
10
diff --git a/arch/i386/mm/boot_ioremap.c b/arch/x86/mm/boot_ioremap_32.c
index 4de95a17a7d4..4de95a17a7d4 100644
--- a/arch/i386/mm/boot_ioremap.c
+++ b/arch/x86/mm/boot_ioremap_32.c
diff --git a/arch/i386/mm/discontig.c b/arch/x86/mm/discontig_32.c
index 860e912a3fbb..860e912a3fbb 100644
--- a/arch/i386/mm/discontig.c
+++ b/arch/x86/mm/discontig_32.c
diff --git a/arch/i386/mm/extable.c b/arch/x86/mm/extable_32.c
index 0ce4f22a2635..0ce4f22a2635 100644
--- a/arch/i386/mm/extable.c
+++ b/arch/x86/mm/extable_32.c
diff --git a/arch/x86_64/mm/extable.c b/arch/x86/mm/extable_64.c
index 79ac6e7100af..79ac6e7100af 100644
--- a/arch/x86_64/mm/extable.c
+++ b/arch/x86/mm/extable_64.c
diff --git a/arch/i386/mm/fault.c b/arch/x86/mm/fault_32.c
index fcb38e7f3543..fcb38e7f3543 100644
--- a/arch/i386/mm/fault.c
+++ b/arch/x86/mm/fault_32.c
diff --git a/arch/x86_64/mm/fault.c b/arch/x86/mm/fault_64.c
index 54816adb8e93..54816adb8e93 100644
--- a/arch/x86_64/mm/fault.c
+++ b/arch/x86/mm/fault_64.c
diff --git a/arch/i386/mm/highmem.c b/arch/x86/mm/highmem_32.c
index 1c3bf95f7356..1c3bf95f7356 100644
--- a/arch/i386/mm/highmem.c
+++ b/arch/x86/mm/highmem_32.c
diff --git a/arch/i386/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index 6c06d9c0488e..6c06d9c0488e 100644
--- a/arch/i386/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
diff --git a/arch/i386/mm/init.c b/arch/x86/mm/init_32.c
index 730a5b177b1f..730a5b177b1f 100644
--- a/arch/i386/mm/init.c
+++ b/arch/x86/mm/init_32.c
diff --git a/arch/x86_64/mm/init.c b/arch/x86/mm/init_64.c
index 458893b376f8..458893b376f8 100644
--- a/arch/x86_64/mm/init.c
+++ b/arch/x86/mm/init_64.c
diff --git a/arch/i386/mm/ioremap.c b/arch/x86/mm/ioremap_32.c
index 0b278315d737..0b278315d737 100644
--- a/arch/i386/mm/ioremap.c
+++ b/arch/x86/mm/ioremap_32.c
diff --git a/arch/x86_64/mm/ioremap.c b/arch/x86/mm/ioremap_64.c
index 6cac90aa5032..6cac90aa5032 100644
--- a/arch/x86_64/mm/ioremap.c
+++ b/arch/x86/mm/ioremap_64.c
diff --git a/arch/x86_64/mm/k8topology.c b/arch/x86/mm/k8topology_64.c
index a96006f7ae0c..a96006f7ae0c 100644
--- a/arch/x86_64/mm/k8topology.c
+++ b/arch/x86/mm/k8topology_64.c
diff --git a/arch/i386/mm/mmap.c b/arch/x86/mm/mmap_32.c
index 552e08473755..552e08473755 100644
--- a/arch/i386/mm/mmap.c
+++ b/arch/x86/mm/mmap_32.c
diff --git a/arch/x86_64/mm/mmap.c b/arch/x86/mm/mmap_64.c
index 80bba0dc000e..80bba0dc000e 100644
--- a/arch/x86_64/mm/mmap.c
+++ b/arch/x86/mm/mmap_64.c
diff --git a/arch/x86_64/mm/numa.c b/arch/x86/mm/numa_64.c
index 6da235522269..6da235522269 100644
--- a/arch/x86_64/mm/numa.c
+++ b/arch/x86/mm/numa_64.c
diff --git a/arch/i386/mm/pageattr.c b/arch/x86/mm/pageattr_32.c
index 4241a74d16c8..4241a74d16c8 100644
--- a/arch/i386/mm/pageattr.c
+++ b/arch/x86/mm/pageattr_32.c
diff --git a/arch/x86_64/mm/pageattr.c b/arch/x86/mm/pageattr_64.c
index 10b9809ce821..10b9809ce821 100644
--- a/arch/x86_64/mm/pageattr.c
+++ b/arch/x86/mm/pageattr_64.c
diff --git a/arch/i386/mm/pgtable.c b/arch/x86/mm/pgtable_32.c
index 01437c46baae..01437c46baae 100644
--- a/arch/i386/mm/pgtable.c
+++ b/arch/x86/mm/pgtable_32.c
diff --git a/arch/x86_64/mm/srat.c b/arch/x86/mm/srat_64.c
index acdf03e19146..acdf03e19146 100644
--- a/arch/x86_64/mm/srat.c
+++ b/arch/x86/mm/srat_64.c
diff --git a/arch/i386/oprofile/Kconfig b/arch/x86/oprofile/Kconfig
index d8a84088471a..d8a84088471a 100644
--- a/arch/i386/oprofile/Kconfig
+++ b/arch/x86/oprofile/Kconfig
diff --git a/arch/i386/oprofile/Makefile b/arch/x86/oprofile/Makefile
index 30f3eb366667..30f3eb366667 100644
--- a/arch/i386/oprofile/Makefile
+++ b/arch/x86/oprofile/Makefile
diff --git a/arch/i386/oprofile/backtrace.c b/arch/x86/oprofile/backtrace.c
index c049ce414f01..c049ce414f01 100644
--- a/arch/i386/oprofile/backtrace.c
+++ b/arch/x86/oprofile/backtrace.c
diff --git a/arch/i386/oprofile/init.c b/arch/x86/oprofile/init.c
index 5341d481d92f..5341d481d92f 100644
--- a/arch/i386/oprofile/init.c
+++ b/arch/x86/oprofile/init.c
diff --git a/arch/i386/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 11b7a51566a8..11b7a51566a8 100644
--- a/arch/i386/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
diff --git a/arch/i386/oprofile/nmi_timer_int.c b/arch/x86/oprofile/nmi_timer_int.c
index 1418e36ae7ab..1418e36ae7ab 100644
--- a/arch/i386/oprofile/nmi_timer_int.c
+++ b/arch/x86/oprofile/nmi_timer_int.c
diff --git a/arch/i386/oprofile/op_counter.h b/arch/x86/oprofile/op_counter.h
index 2880b15c4675..2880b15c4675 100644
--- a/arch/i386/oprofile/op_counter.h
+++ b/arch/x86/oprofile/op_counter.h
diff --git a/arch/i386/oprofile/op_model_athlon.c b/arch/x86/oprofile/op_model_athlon.c
index 3057a19e4641..3057a19e4641 100644
--- a/arch/i386/oprofile/op_model_athlon.c
+++ b/arch/x86/oprofile/op_model_athlon.c
diff --git a/arch/i386/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c
index 47925927b12f..47925927b12f 100644
--- a/arch/i386/oprofile/op_model_p4.c
+++ b/arch/x86/oprofile/op_model_p4.c
diff --git a/arch/i386/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index c554f52cb808..c554f52cb808 100644
--- a/arch/i386/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
diff --git a/arch/i386/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h
index abb1aa95b979..abb1aa95b979 100644
--- a/arch/i386/oprofile/op_x86_model.h
+++ b/arch/x86/oprofile/op_x86_model.h
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
new file mode 100644
index 000000000000..c5c8e485fc44
--- /dev/null
+++ b/arch/x86/pci/Makefile
@@ -0,0 +1,5 @@
1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/pci/Makefile_32
3else
4include ${srctree}/arch/x86/pci/Makefile_64
5endif
diff --git a/arch/x86/pci/Makefile_32 b/arch/x86/pci/Makefile_32
new file mode 100644
index 000000000000..cdd6828b5abb
--- /dev/null
+++ b/arch/x86/pci/Makefile_32
@@ -0,0 +1,14 @@
1obj-y := i386.o init.o
2
3obj-$(CONFIG_PCI_BIOS) += pcbios.o
4obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_32.o direct.o mmconfig-shared.o
5obj-$(CONFIG_PCI_DIRECT) += direct.o
6
7pci-y := fixup.o
8pci-$(CONFIG_ACPI) += acpi.o
9pci-y += legacy.o irq.o
10
11pci-$(CONFIG_X86_VISWS) := visws.o fixup.o
12pci-$(CONFIG_X86_NUMAQ) := numa.o irq.o
13
14obj-y += $(pci-y) common.o early.o
diff --git a/arch/x86/pci/Makefile_64 b/arch/x86/pci/Makefile_64
new file mode 100644
index 000000000000..7d8c467bf143
--- /dev/null
+++ b/arch/x86/pci/Makefile_64
@@ -0,0 +1,17 @@
1#
2# Makefile for X86_64 specific PCI routines
3#
4# Reuse the i386 PCI subsystem
5#
6EXTRA_CFLAGS += -Iarch/x86/pci
7
8obj-y := i386.o
9obj-$(CONFIG_PCI_DIRECT)+= direct.o
10obj-y += fixup.o init.o
11obj-$(CONFIG_ACPI) += acpi.o
12obj-y += legacy.o irq.o common.o early.o
13# mmconfig has a 64bit special
14obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_64.o direct.o mmconfig-shared.o
15
16obj-$(CONFIG_NUMA) += k8-bus_64.o
17
diff --git a/arch/i386/pci/acpi.c b/arch/x86/pci/acpi.c
index bc8a44bddaa7..bc8a44bddaa7 100644
--- a/arch/i386/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
new file mode 100644
index 000000000000..07d5223442bf
--- /dev/null
+++ b/arch/x86/pci/common.c
@@ -0,0 +1,480 @@
1/*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/sched.h>
8#include <linux/pci.h>
9#include <linux/ioport.h>
10#include <linux/init.h>
11#include <linux/dmi.h>
12
13#include <asm/acpi.h>
14#include <asm/segment.h>
15#include <asm/io.h>
16#include <asm/smp.h>
17
18#include "pci.h"
19
20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF;
22
23static int pci_bf_sort;
24int pci_routeirq;
25int pcibios_last_bus = -1;
26unsigned long pirq_table_addr;
27struct pci_bus *pci_root_bus;
28struct pci_raw_ops *raw_pci_ops;
29
30static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
31{
32 return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
33}
34
35static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
36{
37 return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
38}
39
40struct pci_ops pci_root_ops = {
41 .read = pci_read,
42 .write = pci_write,
43};
44
45/*
46 * legacy, numa, and acpi all want to call pcibios_scan_root
47 * from their initcalls. This flag prevents that.
48 */
49int pcibios_scanned;
50
51/*
52 * This interrupt-safe spinlock protects all accesses to PCI
53 * configuration space.
54 */
55DEFINE_SPINLOCK(pci_config_lock);
56
57/*
58 * Several buggy motherboards address only 16 devices and mirror
59 * them to next 16 IDs. We try to detect this `feature' on all
60 * primary buses (those containing host bridges as they are
61 * expected to be unique) and remove the ghost devices.
62 */
63
64static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
65{
66 struct list_head *ln, *mn;
67 struct pci_dev *d, *e;
68 int mirror = PCI_DEVFN(16,0);
69 int seen_host_bridge = 0;
70 int i;
71
72 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
73 list_for_each(ln, &b->devices) {
74 d = pci_dev_b(ln);
75 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
76 seen_host_bridge++;
77 for (mn=ln->next; mn != &b->devices; mn=mn->next) {
78 e = pci_dev_b(mn);
79 if (e->devfn != d->devfn + mirror ||
80 e->vendor != d->vendor ||
81 e->device != d->device ||
82 e->class != d->class)
83 continue;
84 for(i=0; i<PCI_NUM_RESOURCES; i++)
85 if (e->resource[i].start != d->resource[i].start ||
86 e->resource[i].end != d->resource[i].end ||
87 e->resource[i].flags != d->resource[i].flags)
88 continue;
89 break;
90 }
91 if (mn == &b->devices)
92 return;
93 }
94 if (!seen_host_bridge)
95 return;
96 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
97
98 ln = &b->devices;
99 while (ln->next != &b->devices) {
100 d = pci_dev_b(ln->next);
101 if (d->devfn >= mirror) {
102 list_del(&d->global_list);
103 list_del(&d->bus_list);
104 kfree(d);
105 } else
106 ln = ln->next;
107 }
108}
109
110/*
111 * Called after each bus is probed, but before its children
112 * are examined.
113 */
114
115void __devinit pcibios_fixup_bus(struct pci_bus *b)
116{
117 pcibios_fixup_ghosts(b);
118 pci_read_bridge_bases(b);
119}
120
121/*
122 * Only use DMI information to set this if nothing was passed
123 * on the kernel command line (which was parsed earlier).
124 */
125
126static int __devinit set_bf_sort(const struct dmi_system_id *d)
127{
128 if (pci_bf_sort == pci_bf_sort_default) {
129 pci_bf_sort = pci_dmi_bf;
130 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
131 }
132 return 0;
133}
134
135/*
136 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
137 */
138#ifdef __i386__
139static int __devinit assign_all_busses(const struct dmi_system_id *d)
140{
141 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
142 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
143 " (pci=assign-busses)\n", d->ident);
144 return 0;
145}
146#endif
147
148static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
149#ifdef __i386__
150/*
151 * Laptops which need pci=assign-busses to see Cardbus cards
152 */
153 {
154 .callback = assign_all_busses,
155 .ident = "Samsung X20 Laptop",
156 .matches = {
157 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
158 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
159 },
160 },
161#endif /* __i386__ */
162 {
163 .callback = set_bf_sort,
164 .ident = "Dell PowerEdge 1950",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
167 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
168 },
169 },
170 {
171 .callback = set_bf_sort,
172 .ident = "Dell PowerEdge 1955",
173 .matches = {
174 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
175 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
176 },
177 },
178 {
179 .callback = set_bf_sort,
180 .ident = "Dell PowerEdge 2900",
181 .matches = {
182 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
183 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
184 },
185 },
186 {
187 .callback = set_bf_sort,
188 .ident = "Dell PowerEdge 2950",
189 .matches = {
190 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
191 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
192 },
193 },
194 {
195 .callback = set_bf_sort,
196 .ident = "Dell PowerEdge R900",
197 .matches = {
198 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
199 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
200 },
201 },
202 {
203 .callback = set_bf_sort,
204 .ident = "HP ProLiant BL20p G3",
205 .matches = {
206 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
207 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
208 },
209 },
210 {
211 .callback = set_bf_sort,
212 .ident = "HP ProLiant BL20p G4",
213 .matches = {
214 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
215 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
216 },
217 },
218 {
219 .callback = set_bf_sort,
220 .ident = "HP ProLiant BL30p G1",
221 .matches = {
222 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
223 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
224 },
225 },
226 {
227 .callback = set_bf_sort,
228 .ident = "HP ProLiant BL25p G1",
229 .matches = {
230 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
231 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
232 },
233 },
234 {
235 .callback = set_bf_sort,
236 .ident = "HP ProLiant BL35p G1",
237 .matches = {
238 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
239 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
240 },
241 },
242 {
243 .callback = set_bf_sort,
244 .ident = "HP ProLiant BL45p G1",
245 .matches = {
246 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
247 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
248 },
249 },
250 {
251 .callback = set_bf_sort,
252 .ident = "HP ProLiant BL45p G2",
253 .matches = {
254 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
255 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
256 },
257 },
258 {
259 .callback = set_bf_sort,
260 .ident = "HP ProLiant BL460c G1",
261 .matches = {
262 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
263 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
264 },
265 },
266 {
267 .callback = set_bf_sort,
268 .ident = "HP ProLiant BL465c G1",
269 .matches = {
270 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
271 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
272 },
273 },
274 {
275 .callback = set_bf_sort,
276 .ident = "HP ProLiant BL480c G1",
277 .matches = {
278 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
279 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
280 },
281 },
282 {
283 .callback = set_bf_sort,
284 .ident = "HP ProLiant BL685c G1",
285 .matches = {
286 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
287 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
288 },
289 },
290 {}
291};
292
293struct pci_bus * __devinit pcibios_scan_root(int busnum)
294{
295 struct pci_bus *bus = NULL;
296 struct pci_sysdata *sd;
297
298 dmi_check_system(pciprobe_dmi_table);
299
300 while ((bus = pci_find_next_bus(bus)) != NULL) {
301 if (bus->number == busnum) {
302 /* Already scanned */
303 return bus;
304 }
305 }
306
307 /* Allocate per-root-bus (not per bus) arch-specific data.
308 * TODO: leak; this memory is never freed.
309 * It's arguable whether it's worth the trouble to care.
310 */
311 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
312 if (!sd) {
313 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
314 return NULL;
315 }
316
317 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
318
319 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
320}
321
322extern u8 pci_cache_line_size;
323
324static int __init pcibios_init(void)
325{
326 struct cpuinfo_x86 *c = &boot_cpu_data;
327
328 if (!raw_pci_ops) {
329 printk(KERN_WARNING "PCI: System does not support PCI\n");
330 return 0;
331 }
332
333 /*
334 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
335 * and P4. It's also good for 386/486s (which actually have 16)
336 * as quite a few PCI devices do not support smaller values.
337 */
338 pci_cache_line_size = 32 >> 2;
339 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
340 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
341 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
342 pci_cache_line_size = 128 >> 2; /* P4 */
343
344 pcibios_resource_survey();
345
346 if (pci_bf_sort >= pci_force_bf)
347 pci_sort_breadthfirst();
348#ifdef CONFIG_PCI_BIOS
349 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
350 pcibios_sort();
351#endif
352 return 0;
353}
354
355subsys_initcall(pcibios_init);
356
357char * __devinit pcibios_setup(char *str)
358{
359 if (!strcmp(str, "off")) {
360 pci_probe = 0;
361 return NULL;
362 } else if (!strcmp(str, "bfsort")) {
363 pci_bf_sort = pci_force_bf;
364 return NULL;
365 } else if (!strcmp(str, "nobfsort")) {
366 pci_bf_sort = pci_force_nobf;
367 return NULL;
368 }
369#ifdef CONFIG_PCI_BIOS
370 else if (!strcmp(str, "bios")) {
371 pci_probe = PCI_PROBE_BIOS;
372 return NULL;
373 } else if (!strcmp(str, "nobios")) {
374 pci_probe &= ~PCI_PROBE_BIOS;
375 return NULL;
376 } else if (!strcmp(str, "nosort")) {
377 pci_probe |= PCI_NO_SORT;
378 return NULL;
379 } else if (!strcmp(str, "biosirq")) {
380 pci_probe |= PCI_BIOS_IRQ_SCAN;
381 return NULL;
382 } else if (!strncmp(str, "pirqaddr=", 9)) {
383 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
384 return NULL;
385 }
386#endif
387#ifdef CONFIG_PCI_DIRECT
388 else if (!strcmp(str, "conf1")) {
389 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
390 return NULL;
391 }
392 else if (!strcmp(str, "conf2")) {
393 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
394 return NULL;
395 }
396#endif
397#ifdef CONFIG_PCI_MMCONFIG
398 else if (!strcmp(str, "nommconf")) {
399 pci_probe &= ~PCI_PROBE_MMCONF;
400 return NULL;
401 }
402#endif
403 else if (!strcmp(str, "noacpi")) {
404 acpi_noirq_set();
405 return NULL;
406 }
407 else if (!strcmp(str, "noearly")) {
408 pci_probe |= PCI_PROBE_NOEARLY;
409 return NULL;
410 }
411#ifndef CONFIG_X86_VISWS
412 else if (!strcmp(str, "usepirqmask")) {
413 pci_probe |= PCI_USE_PIRQ_MASK;
414 return NULL;
415 } else if (!strncmp(str, "irqmask=", 8)) {
416 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
417 return NULL;
418 } else if (!strncmp(str, "lastbus=", 8)) {
419 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
420 return NULL;
421 }
422#endif
423 else if (!strcmp(str, "rom")) {
424 pci_probe |= PCI_ASSIGN_ROMS;
425 return NULL;
426 } else if (!strcmp(str, "assign-busses")) {
427 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
428 return NULL;
429 } else if (!strcmp(str, "routeirq")) {
430 pci_routeirq = 1;
431 return NULL;
432 }
433 return str;
434}
435
436unsigned int pcibios_assign_all_busses(void)
437{
438 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
439}
440
441int pcibios_enable_device(struct pci_dev *dev, int mask)
442{
443 int err;
444
445 if ((err = pcibios_enable_resources(dev, mask)) < 0)
446 return err;
447
448 if (!dev->msi_enabled)
449 return pcibios_enable_irq(dev);
450 return 0;
451}
452
453void pcibios_disable_device (struct pci_dev *dev)
454{
455 if (!dev->msi_enabled && pcibios_disable_irq)
456 pcibios_disable_irq(dev);
457}
458
459struct pci_bus *pci_scan_bus_with_sysdata(int busno)
460{
461 struct pci_bus *bus = NULL;
462 struct pci_sysdata *sd;
463
464 /*
465 * Allocate per-root-bus (not per bus) arch-specific data.
466 * TODO: leak; this memory is never freed.
467 * It's arguable whether it's worth the trouble to care.
468 */
469 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
470 if (!sd) {
471 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
472 return NULL;
473 }
474 sd->node = -1;
475 bus = pci_scan_bus(busno, &pci_root_ops, sd);
476 if (!bus)
477 kfree(sd);
478
479 return bus;
480}
diff --git a/arch/i386/pci/direct.c b/arch/x86/pci/direct.c
index 431c9a51b157..431c9a51b157 100644
--- a/arch/i386/pci/direct.c
+++ b/arch/x86/pci/direct.c
diff --git a/arch/i386/pci/early.c b/arch/x86/pci/early.c
index 42df4b6606df..42df4b6606df 100644
--- a/arch/i386/pci/early.c
+++ b/arch/x86/pci/early.c
diff --git a/arch/i386/pci/fixup.c b/arch/x86/pci/fixup.c
index c82cbf4c7226..c82cbf4c7226 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
diff --git a/arch/i386/pci/i386.c b/arch/x86/pci/i386.c
index bcd2f94b732c..bcd2f94b732c 100644
--- a/arch/i386/pci/i386.c
+++ b/arch/x86/pci/i386.c
diff --git a/arch/i386/pci/init.c b/arch/x86/pci/init.c
index 3de9f9ba2da6..3de9f9ba2da6 100644
--- a/arch/i386/pci/init.c
+++ b/arch/x86/pci/init.c
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
new file mode 100644
index 000000000000..d98c6b096f8e
--- /dev/null
+++ b/arch/x86/pci/irq.c
@@ -0,0 +1,1173 @@
1/*
2 * Low-Level PCI Support for PC -- Routing of Interrupts
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7#include <linux/types.h>
8#include <linux/kernel.h>
9#include <linux/pci.h>
10#include <linux/init.h>
11#include <linux/slab.h>
12#include <linux/interrupt.h>
13#include <linux/dmi.h>
14#include <asm/io.h>
15#include <asm/smp.h>
16#include <asm/io_apic.h>
17#include <linux/irq.h>
18#include <linux/acpi.h>
19
20#include "pci.h"
21
22#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23#define PIRQ_VERSION 0x0100
24
25static int broken_hp_bios_irq9;
26static int acer_tm360_irqrouting;
27
28static struct irq_routing_table *pirq_table;
29
30static int pirq_enable_irq(struct pci_dev *dev);
31
32/*
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
36 */
37unsigned int pcibios_irq_mask = 0xfff8;
38
39static int pirq_penalty[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
42};
43
44struct irq_router {
45 char *name;
46 u16 vendor, device;
47 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
48 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
49};
50
51struct irq_router_handler {
52 u16 vendor;
53 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
54};
55
56int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
57void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
58
59/*
60 * Check passed address for the PCI IRQ Routing Table signature
61 * and perform checksum verification.
62 */
63
64static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
65{
66 struct irq_routing_table *rt;
67 int i;
68 u8 sum;
69
70 rt = (struct irq_routing_table *) addr;
71 if (rt->signature != PIRQ_SIGNATURE ||
72 rt->version != PIRQ_VERSION ||
73 rt->size % 16 ||
74 rt->size < sizeof(struct irq_routing_table))
75 return NULL;
76 sum = 0;
77 for (i=0; i < rt->size; i++)
78 sum += addr[i];
79 if (!sum) {
80 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
81 return rt;
82 }
83 return NULL;
84}
85
86
87
88/*
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
90 */
91
92static struct irq_routing_table * __init pirq_find_routing_table(void)
93{
94 u8 *addr;
95 struct irq_routing_table *rt;
96
97 if (pirq_table_addr) {
98 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
99 if (rt)
100 return rt;
101 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
102 }
103 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
104 rt = pirq_check_routing_table(addr);
105 if (rt)
106 return rt;
107 }
108 return NULL;
109}
110
111/*
112 * If we have a IRQ routing table, use it to search for peer host
113 * bridges. It's a gross hack, but since there are no other known
114 * ways how to get a list of buses, we have to go this way.
115 */
116
117static void __init pirq_peer_trick(void)
118{
119 struct irq_routing_table *rt = pirq_table;
120 u8 busmap[256];
121 int i;
122 struct irq_info *e;
123
124 memset(busmap, 0, sizeof(busmap));
125 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
126 e = &rt->slots[i];
127#ifdef DEBUG
128 {
129 int j;
130 DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
131 for(j=0; j<4; j++)
132 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
133 DBG("\n");
134 }
135#endif
136 busmap[e->bus] = 1;
137 }
138 for(i = 1; i < 256; i++) {
139 if (!busmap[i] || pci_find_bus(0, i))
140 continue;
141 if (pci_scan_bus_with_sysdata(i))
142 printk(KERN_INFO "PCI: Discovered primary peer "
143 "bus %02x [IRQ]\n", i);
144 }
145 pcibios_last_bus = -1;
146}
147
148/*
149 * Code for querying and setting of IRQ routes on various interrupt routers.
150 */
151
152void eisa_set_level_irq(unsigned int irq)
153{
154 unsigned char mask = 1 << (irq & 7);
155 unsigned int port = 0x4d0 + (irq >> 3);
156 unsigned char val;
157 static u16 eisa_irq_mask;
158
159 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
160 return;
161
162 eisa_irq_mask |= (1 << irq);
163 printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
164 val = inb(port);
165 if (!(val & mask)) {
166 DBG(KERN_DEBUG " -> edge");
167 outb(val | mask, port);
168 }
169}
170
171/*
172 * Common IRQ routing practice: nybbles in config space,
173 * offset by some magic constant.
174 */
175static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
176{
177 u8 x;
178 unsigned reg = offset + (nr >> 1);
179
180 pci_read_config_byte(router, reg, &x);
181 return (nr & 1) ? (x >> 4) : (x & 0xf);
182}
183
184static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
185{
186 u8 x;
187 unsigned reg = offset + (nr >> 1);
188
189 pci_read_config_byte(router, reg, &x);
190 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
191 pci_write_config_byte(router, reg, x);
192}
193
194/*
195 * ALI pirq entries are damn ugly, and completely undocumented.
196 * This has been figured out from pirq tables, and it's not a pretty
197 * picture.
198 */
199static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
200{
201 static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
202
203 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
204}
205
206static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
207{
208 static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
209 unsigned int val = irqmap[irq];
210
211 if (val) {
212 write_config_nybble(router, 0x48, pirq-1, val);
213 return 1;
214 }
215 return 0;
216}
217
218/*
219 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
220 * just a pointer to the config space.
221 */
222static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
223{
224 u8 x;
225
226 pci_read_config_byte(router, pirq, &x);
227 return (x < 16) ? x : 0;
228}
229
230static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
231{
232 pci_write_config_byte(router, pirq, irq);
233 return 1;
234}
235
236/*
237 * The VIA pirq rules are nibble-based, like ALI,
238 * but without the ugly irq number munging.
239 * However, PIRQD is in the upper instead of lower 4 bits.
240 */
241static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
242{
243 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
244}
245
246static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
247{
248 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
249 return 1;
250}
251
252/*
253 * The VIA pirq rules are nibble-based, like ALI,
254 * but without the ugly irq number munging.
255 * However, for 82C586, nibble map is different .
256 */
257static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
258{
259 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
260 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
261}
262
263static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
264{
265 static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
266 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
267 return 1;
268}
269
270/*
271 * ITE 8330G pirq rules are nibble-based
272 * FIXME: pirqmap may be { 1, 0, 3, 2 },
273 * 2+3 are both mapped to irq 9 on my system
274 */
275static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
276{
277 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
278 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
279}
280
281static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
282{
283 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
284 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
285 return 1;
286}
287
288/*
289 * OPTI: high four bits are nibble pointer..
290 * I wonder what the low bits do?
291 */
292static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
293{
294 return read_config_nybble(router, 0xb8, pirq >> 4);
295}
296
297static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
298{
299 write_config_nybble(router, 0xb8, pirq >> 4, irq);
300 return 1;
301}
302
303/*
304 * Cyrix: nibble offset 0x5C
305 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
306 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
307 */
308static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
309{
310 return read_config_nybble(router, 0x5C, (pirq-1)^1);
311}
312
313static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
314{
315 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
316 return 1;
317}
318
319/*
320 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
321 * We have to deal with the following issues here:
322 * - vendors have different ideas about the meaning of link values
323 * - some onboard devices (integrated in the chipset) have special
324 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
325 * - different revision of the router have a different layout for
326 * the routing registers, particularly for the onchip devices
327 *
328 * For all routing registers the common thing is we have one byte
329 * per routeable link which is defined as:
330 * bit 7 IRQ mapping enabled (0) or disabled (1)
331 * bits [6:4] reserved (sometimes used for onchip devices)
332 * bits [3:0] IRQ to map to
333 * allowed: 3-7, 9-12, 14-15
334 * reserved: 0, 1, 2, 8, 13
335 *
336 * The config-space registers located at 0x41/0x42/0x43/0x44 are
337 * always used to route the normal PCI INT A/B/C/D respectively.
338 * Apparently there are systems implementing PCI routing table using
339 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
340 * We try our best to handle both link mappings.
341 *
342 * Currently (2003-05-21) it appears most SiS chipsets follow the
343 * definition of routing registers from the SiS-5595 southbridge.
344 * According to the SiS 5595 datasheets the revision id's of the
345 * router (ISA-bridge) should be 0x01 or 0xb0.
346 *
347 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
348 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
349 * They seem to work with the current routing code. However there is
350 * some concern because of the two USB-OHCI HCs (original SiS 5595
351 * had only one). YMMV.
352 *
353 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
354 *
355 * 0x61: IDEIRQ:
356 * bits [6:5] must be written 01
357 * bit 4 channel-select primary (0), secondary (1)
358 *
359 * 0x62: USBIRQ:
360 * bit 6 OHCI function disabled (0), enabled (1)
361 *
362 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
363 *
364 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
365 *
366 * We support USBIRQ (in addition to INTA-INTD) and keep the
367 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
368 *
369 * Currently the only reported exception is the new SiS 65x chipset
370 * which includes the SiS 69x southbridge. Here we have the 85C503
371 * router revision 0x04 and there are changes in the register layout
372 * mostly related to the different USB HCs with USB 2.0 support.
373 *
374 * Onchip routing for router rev-id 0x04 (try-and-error observation)
375 *
376 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
377 * bit 6-4 are probably unused, not like 5595
378 */
379
380#define PIRQ_SIS_IRQ_MASK 0x0f
381#define PIRQ_SIS_IRQ_DISABLE 0x80
382#define PIRQ_SIS_USB_ENABLE 0x40
383
384static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
385{
386 u8 x;
387 int reg;
388
389 reg = pirq;
390 if (reg >= 0x01 && reg <= 0x04)
391 reg += 0x40;
392 pci_read_config_byte(router, reg, &x);
393 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
394}
395
396static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
397{
398 u8 x;
399 int reg;
400
401 reg = pirq;
402 if (reg >= 0x01 && reg <= 0x04)
403 reg += 0x40;
404 pci_read_config_byte(router, reg, &x);
405 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
406 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
407 pci_write_config_byte(router, reg, x);
408 return 1;
409}
410
411
412/*
413 * VLSI: nibble offset 0x74 - educated guess due to routing table and
414 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
415 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
416 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
417 * for the busbridge to the docking station.
418 */
419
420static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
421{
422 if (pirq > 8) {
423 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
424 return 0;
425 }
426 return read_config_nybble(router, 0x74, pirq-1);
427}
428
429static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
430{
431 if (pirq > 8) {
432 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
433 return 0;
434 }
435 write_config_nybble(router, 0x74, pirq-1, irq);
436 return 1;
437}
438
439/*
440 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
441 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
442 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
443 * register is a straight binary coding of desired PIC IRQ (low nibble).
444 *
445 * The 'link' value in the PIRQ table is already in the correct format
446 * for the Index register. There are some special index values:
447 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
448 * and 0x03 for SMBus.
449 */
450static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
451{
452 outb_p(pirq, 0xc00);
453 return inb(0xc01) & 0xf;
454}
455
456static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
457{
458 outb_p(pirq, 0xc00);
459 outb_p(irq, 0xc01);
460 return 1;
461}
462
463/* Support for AMD756 PCI IRQ Routing
464 * Jhon H. Caicedo <jhcaiced@osso.org.co>
465 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
466 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
467 * The AMD756 pirq rules are nibble-based
468 * offset 0x56 0-3 PIRQA 4-7 PIRQB
469 * offset 0x57 0-3 PIRQC 4-7 PIRQD
470 */
471static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
472{
473 u8 irq;
474 irq = 0;
475 if (pirq <= 4)
476 {
477 irq = read_config_nybble(router, 0x56, pirq - 1);
478 }
479 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
480 dev->vendor, dev->device, pirq, irq);
481 return irq;
482}
483
484static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
485{
486 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
487 dev->vendor, dev->device, pirq, irq);
488 if (pirq <= 4)
489 {
490 write_config_nybble(router, 0x56, pirq - 1, irq);
491 }
492 return 1;
493}
494
495#ifdef CONFIG_PCI_BIOS
496
497static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
498{
499 struct pci_dev *bridge;
500 int pin = pci_get_interrupt_pin(dev, &bridge);
501 return pcibios_set_irq_routing(bridge, pin, irq);
502}
503
504#endif
505
506static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
507{
508 static struct pci_device_id __initdata pirq_440gx[] = {
509 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
510 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
511 { },
512 };
513
514 /* 440GX has a proprietary PIRQ router -- don't use it */
515 if (pci_dev_present(pirq_440gx))
516 return 0;
517
518 switch(device)
519 {
520 case PCI_DEVICE_ID_INTEL_82371FB_0:
521 case PCI_DEVICE_ID_INTEL_82371SB_0:
522 case PCI_DEVICE_ID_INTEL_82371AB_0:
523 case PCI_DEVICE_ID_INTEL_82371MX:
524 case PCI_DEVICE_ID_INTEL_82443MX_0:
525 case PCI_DEVICE_ID_INTEL_82801AA_0:
526 case PCI_DEVICE_ID_INTEL_82801AB_0:
527 case PCI_DEVICE_ID_INTEL_82801BA_0:
528 case PCI_DEVICE_ID_INTEL_82801BA_10:
529 case PCI_DEVICE_ID_INTEL_82801CA_0:
530 case PCI_DEVICE_ID_INTEL_82801CA_12:
531 case PCI_DEVICE_ID_INTEL_82801DB_0:
532 case PCI_DEVICE_ID_INTEL_82801E_0:
533 case PCI_DEVICE_ID_INTEL_82801EB_0:
534 case PCI_DEVICE_ID_INTEL_ESB_1:
535 case PCI_DEVICE_ID_INTEL_ICH6_0:
536 case PCI_DEVICE_ID_INTEL_ICH6_1:
537 case PCI_DEVICE_ID_INTEL_ICH7_0:
538 case PCI_DEVICE_ID_INTEL_ICH7_1:
539 case PCI_DEVICE_ID_INTEL_ICH7_30:
540 case PCI_DEVICE_ID_INTEL_ICH7_31:
541 case PCI_DEVICE_ID_INTEL_ESB2_0:
542 case PCI_DEVICE_ID_INTEL_ICH8_0:
543 case PCI_DEVICE_ID_INTEL_ICH8_1:
544 case PCI_DEVICE_ID_INTEL_ICH8_2:
545 case PCI_DEVICE_ID_INTEL_ICH8_3:
546 case PCI_DEVICE_ID_INTEL_ICH8_4:
547 case PCI_DEVICE_ID_INTEL_ICH9_0:
548 case PCI_DEVICE_ID_INTEL_ICH9_1:
549 case PCI_DEVICE_ID_INTEL_ICH9_2:
550 case PCI_DEVICE_ID_INTEL_ICH9_3:
551 case PCI_DEVICE_ID_INTEL_ICH9_4:
552 case PCI_DEVICE_ID_INTEL_ICH9_5:
553 case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
554 r->name = "PIIX/ICH";
555 r->get = pirq_piix_get;
556 r->set = pirq_piix_set;
557 return 1;
558 }
559 return 0;
560}
561
562static __init int via_router_probe(struct irq_router *r,
563 struct pci_dev *router, u16 device)
564{
565 /* FIXME: We should move some of the quirk fixup stuff here */
566
567 /*
568 * work arounds for some buggy BIOSes
569 */
570 if (device == PCI_DEVICE_ID_VIA_82C586_0) {
571 switch(router->device) {
572 case PCI_DEVICE_ID_VIA_82C686:
573 /*
574 * Asus k7m bios wrongly reports 82C686A
575 * as 586-compatible
576 */
577 device = PCI_DEVICE_ID_VIA_82C686;
578 break;
579 case PCI_DEVICE_ID_VIA_8235:
580 /**
581 * Asus a7v-x bios wrongly reports 8235
582 * as 586-compatible
583 */
584 device = PCI_DEVICE_ID_VIA_8235;
585 break;
586 }
587 }
588
589 switch(device) {
590 case PCI_DEVICE_ID_VIA_82C586_0:
591 r->name = "VIA";
592 r->get = pirq_via586_get;
593 r->set = pirq_via586_set;
594 return 1;
595 case PCI_DEVICE_ID_VIA_82C596:
596 case PCI_DEVICE_ID_VIA_82C686:
597 case PCI_DEVICE_ID_VIA_8231:
598 case PCI_DEVICE_ID_VIA_8233A:
599 case PCI_DEVICE_ID_VIA_8235:
600 case PCI_DEVICE_ID_VIA_8237:
601 /* FIXME: add new ones for 8233/5 */
602 r->name = "VIA";
603 r->get = pirq_via_get;
604 r->set = pirq_via_set;
605 return 1;
606 }
607 return 0;
608}
609
610static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
611{
612 switch(device)
613 {
614 case PCI_DEVICE_ID_VLSI_82C534:
615 r->name = "VLSI 82C534";
616 r->get = pirq_vlsi_get;
617 r->set = pirq_vlsi_set;
618 return 1;
619 }
620 return 0;
621}
622
623
624static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
625{
626 switch(device)
627 {
628 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
629 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
630 r->name = "ServerWorks";
631 r->get = pirq_serverworks_get;
632 r->set = pirq_serverworks_set;
633 return 1;
634 }
635 return 0;
636}
637
638static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
639{
640 if (device != PCI_DEVICE_ID_SI_503)
641 return 0;
642
643 r->name = "SIS";
644 r->get = pirq_sis_get;
645 r->set = pirq_sis_set;
646 return 1;
647}
648
649static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
650{
651 switch(device)
652 {
653 case PCI_DEVICE_ID_CYRIX_5520:
654 r->name = "NatSemi";
655 r->get = pirq_cyrix_get;
656 r->set = pirq_cyrix_set;
657 return 1;
658 }
659 return 0;
660}
661
662static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
663{
664 switch(device)
665 {
666 case PCI_DEVICE_ID_OPTI_82C700:
667 r->name = "OPTI";
668 r->get = pirq_opti_get;
669 r->set = pirq_opti_set;
670 return 1;
671 }
672 return 0;
673}
674
675static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
676{
677 switch(device)
678 {
679 case PCI_DEVICE_ID_ITE_IT8330G_0:
680 r->name = "ITE";
681 r->get = pirq_ite_get;
682 r->set = pirq_ite_set;
683 return 1;
684 }
685 return 0;
686}
687
688static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
689{
690 switch(device)
691 {
692 case PCI_DEVICE_ID_AL_M1533:
693 case PCI_DEVICE_ID_AL_M1563:
694 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
695 r->name = "ALI";
696 r->get = pirq_ali_get;
697 r->set = pirq_ali_set;
698 return 1;
699 }
700 return 0;
701}
702
703static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
704{
705 switch(device)
706 {
707 case PCI_DEVICE_ID_AMD_VIPER_740B:
708 r->name = "AMD756";
709 break;
710 case PCI_DEVICE_ID_AMD_VIPER_7413:
711 r->name = "AMD766";
712 break;
713 case PCI_DEVICE_ID_AMD_VIPER_7443:
714 r->name = "AMD768";
715 break;
716 default:
717 return 0;
718 }
719 r->get = pirq_amd756_get;
720 r->set = pirq_amd756_set;
721 return 1;
722}
723
724static __initdata struct irq_router_handler pirq_routers[] = {
725 { PCI_VENDOR_ID_INTEL, intel_router_probe },
726 { PCI_VENDOR_ID_AL, ali_router_probe },
727 { PCI_VENDOR_ID_ITE, ite_router_probe },
728 { PCI_VENDOR_ID_VIA, via_router_probe },
729 { PCI_VENDOR_ID_OPTI, opti_router_probe },
730 { PCI_VENDOR_ID_SI, sis_router_probe },
731 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
732 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
733 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
734 { PCI_VENDOR_ID_AMD, amd_router_probe },
735 /* Someone with docs needs to add the ATI Radeon IGP */
736 { 0, NULL }
737};
738static struct irq_router pirq_router;
739static struct pci_dev *pirq_router_dev;
740
741
742/*
743 * FIXME: should we have an option to say "generic for
744 * chipset" ?
745 */
746
747static void __init pirq_find_router(struct irq_router *r)
748{
749 struct irq_routing_table *rt = pirq_table;
750 struct irq_router_handler *h;
751
752#ifdef CONFIG_PCI_BIOS
753 if (!rt->signature) {
754 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
755 r->set = pirq_bios_set;
756 r->name = "BIOS";
757 return;
758 }
759#endif
760
761 /* Default unless a driver reloads it */
762 r->name = "default";
763 r->get = NULL;
764 r->set = NULL;
765
766 DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
767 rt->rtr_vendor, rt->rtr_device);
768
769 pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
770 if (!pirq_router_dev) {
771 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
772 "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
773 return;
774 }
775
776 for( h = pirq_routers; h->vendor; h++) {
777 /* First look for a router match */
778 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
779 break;
780 /* Fall back to a device match */
781 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
782 break;
783 }
784 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
785 pirq_router.name,
786 pirq_router_dev->vendor,
787 pirq_router_dev->device,
788 pci_name(pirq_router_dev));
789
790 /* The device remains referenced for the kernel lifetime */
791}
792
793static struct irq_info *pirq_get_info(struct pci_dev *dev)
794{
795 struct irq_routing_table *rt = pirq_table;
796 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
797 struct irq_info *info;
798
799 for (info = rt->slots; entries--; info++)
800 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
801 return info;
802 return NULL;
803}
804
805static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
806{
807 u8 pin;
808 struct irq_info *info;
809 int i, pirq, newirq;
810 int irq = 0;
811 u32 mask;
812 struct irq_router *r = &pirq_router;
813 struct pci_dev *dev2 = NULL;
814 char *msg = NULL;
815
816 /* Find IRQ pin */
817 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
818 if (!pin) {
819 DBG(KERN_DEBUG " -> no interrupt pin\n");
820 return 0;
821 }
822 pin = pin - 1;
823
824 /* Find IRQ routing entry */
825
826 if (!pirq_table)
827 return 0;
828
829 DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
830 info = pirq_get_info(dev);
831 if (!info) {
832 DBG(" -> not found in routing table\n" KERN_DEBUG);
833 return 0;
834 }
835 pirq = info->irq[pin].link;
836 mask = info->irq[pin].bitmap;
837 if (!pirq) {
838 DBG(" -> not routed\n" KERN_DEBUG);
839 return 0;
840 }
841 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
842 mask &= pcibios_irq_mask;
843
844 /* Work around broken HP Pavilion Notebooks which assign USB to
845 IRQ 9 even though it is actually wired to IRQ 11 */
846
847 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
848 dev->irq = 11;
849 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
850 r->set(pirq_router_dev, dev, pirq, 11);
851 }
852
853 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
854 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
855 pirq = 0x68;
856 mask = 0x400;
857 dev->irq = r->get(pirq_router_dev, dev, pirq);
858 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
859 }
860
861 /*
862 * Find the best IRQ to assign: use the one
863 * reported by the device if possible.
864 */
865 newirq = dev->irq;
866 if (newirq && !((1 << newirq) & mask)) {
867 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
868 else printk("\n" KERN_WARNING
869 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
870 "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
871 pci_name(dev));
872 }
873 if (!newirq && assign) {
874 for (i = 0; i < 16; i++) {
875 if (!(mask & (1 << i)))
876 continue;
877 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
878 newirq = i;
879 }
880 }
881 DBG(" -> newirq=%d", newirq);
882
883 /* Check if it is hardcoded */
884 if ((pirq & 0xf0) == 0xf0) {
885 irq = pirq & 0xf;
886 DBG(" -> hardcoded IRQ %d\n", irq);
887 msg = "Hardcoded";
888 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
889 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
890 DBG(" -> got IRQ %d\n", irq);
891 msg = "Found";
892 eisa_set_level_irq(irq);
893 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
894 DBG(" -> assigning IRQ %d", newirq);
895 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
896 eisa_set_level_irq(newirq);
897 DBG(" ... OK\n");
898 msg = "Assigned";
899 irq = newirq;
900 }
901 }
902
903 if (!irq) {
904 DBG(" ... failed\n");
905 if (newirq && mask == (1 << newirq)) {
906 msg = "Guessed";
907 irq = newirq;
908 } else
909 return 0;
910 }
911 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
912
913 /* Update IRQ for all devices with the same pirq value */
914 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
915 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
916 if (!pin)
917 continue;
918 pin--;
919 info = pirq_get_info(dev2);
920 if (!info)
921 continue;
922 if (info->irq[pin].link == pirq) {
923 /* We refuse to override the dev->irq information. Give a warning! */
924 if ( dev2->irq && dev2->irq != irq && \
925 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
926 ((1 << dev2->irq) & mask)) ) {
927#ifndef CONFIG_PCI_MSI
928 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
929 pci_name(dev2), dev2->irq, irq);
930#endif
931 continue;
932 }
933 dev2->irq = irq;
934 pirq_penalty[irq]++;
935 if (dev != dev2)
936 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
937 }
938 }
939 return 1;
940}
941
942static void __init pcibios_fixup_irqs(void)
943{
944 struct pci_dev *dev = NULL;
945 u8 pin;
946
947 DBG(KERN_DEBUG "PCI: IRQ fixup\n");
948 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
949 /*
950 * If the BIOS has set an out of range IRQ number, just ignore it.
951 * Also keep track of which IRQ's are already in use.
952 */
953 if (dev->irq >= 16) {
954 DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
955 dev->irq = 0;
956 }
957 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
958 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
959 pirq_penalty[dev->irq] = 0;
960 pirq_penalty[dev->irq]++;
961 }
962
963 dev = NULL;
964 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
965 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
966#ifdef CONFIG_X86_IO_APIC
967 /*
968 * Recalculate IRQ numbers if we use the I/O APIC.
969 */
970 if (io_apic_assign_pci_irqs)
971 {
972 int irq;
973
974 if (pin) {
975 pin--; /* interrupt pins are numbered starting from 1 */
976 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
977 /*
978 * Busses behind bridges are typically not listed in the MP-table.
979 * In this case we have to look up the IRQ based on the parent bus,
980 * parent slot, and pin number. The SMP code detects such bridged
981 * busses itself so we should get into this branch reliably.
982 */
983 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
984 struct pci_dev * bridge = dev->bus->self;
985
986 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
987 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
988 PCI_SLOT(bridge->devfn), pin);
989 if (irq >= 0)
990 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
991 pci_name(bridge), 'A' + pin, irq);
992 }
993 if (irq >= 0) {
994 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
995 pci_name(dev), 'A' + pin, irq);
996 dev->irq = irq;
997 }
998 }
999 }
1000#endif
1001 /*
1002 * Still no IRQ? Try to lookup one...
1003 */
1004 if (pin && !dev->irq)
1005 pcibios_lookup_irq(dev, 0);
1006 }
1007}
1008
1009/*
1010 * Work around broken HP Pavilion Notebooks which assign USB to
1011 * IRQ 9 even though it is actually wired to IRQ 11
1012 */
1013static int __init fix_broken_hp_bios_irq9(const struct dmi_system_id *d)
1014{
1015 if (!broken_hp_bios_irq9) {
1016 broken_hp_bios_irq9 = 1;
1017 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1018 }
1019 return 0;
1020}
1021
1022/*
1023 * Work around broken Acer TravelMate 360 Notebooks which assign
1024 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1025 */
1026static int __init fix_acer_tm360_irqrouting(const struct dmi_system_id *d)
1027{
1028 if (!acer_tm360_irqrouting) {
1029 acer_tm360_irqrouting = 1;
1030 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1031 }
1032 return 0;
1033}
1034
1035static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1036 {
1037 .callback = fix_broken_hp_bios_irq9,
1038 .ident = "HP Pavilion N5400 Series Laptop",
1039 .matches = {
1040 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1041 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1042 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1043 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1044 },
1045 },
1046 {
1047 .callback = fix_acer_tm360_irqrouting,
1048 .ident = "Acer TravelMate 36x Laptop",
1049 .matches = {
1050 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1051 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1052 },
1053 },
1054 { }
1055};
1056
1057static int __init pcibios_irq_init(void)
1058{
1059 DBG(KERN_DEBUG "PCI: IRQ init\n");
1060
1061 if (pcibios_enable_irq || raw_pci_ops == NULL)
1062 return 0;
1063
1064 dmi_check_system(pciirq_dmi_table);
1065
1066 pirq_table = pirq_find_routing_table();
1067
1068#ifdef CONFIG_PCI_BIOS
1069 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1070 pirq_table = pcibios_get_irq_routing_table();
1071#endif
1072 if (pirq_table) {
1073 pirq_peer_trick();
1074 pirq_find_router(&pirq_router);
1075 if (pirq_table->exclusive_irqs) {
1076 int i;
1077 for (i=0; i<16; i++)
1078 if (!(pirq_table->exclusive_irqs & (1 << i)))
1079 pirq_penalty[i] += 100;
1080 }
1081 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1082 if (io_apic_assign_pci_irqs)
1083 pirq_table = NULL;
1084 }
1085
1086 pcibios_enable_irq = pirq_enable_irq;
1087
1088 pcibios_fixup_irqs();
1089 return 0;
1090}
1091
1092subsys_initcall(pcibios_irq_init);
1093
1094
1095static void pirq_penalize_isa_irq(int irq, int active)
1096{
1097 /*
1098 * If any ISAPnP device reports an IRQ in its list of possible
1099 * IRQ's, we try to avoid assigning it to PCI devices.
1100 */
1101 if (irq < 16) {
1102 if (active)
1103 pirq_penalty[irq] += 1000;
1104 else
1105 pirq_penalty[irq] += 100;
1106 }
1107}
1108
1109void pcibios_penalize_isa_irq(int irq, int active)
1110{
1111#ifdef CONFIG_ACPI
1112 if (!acpi_noirq)
1113 acpi_penalize_isa_irq(irq, active);
1114 else
1115#endif
1116 pirq_penalize_isa_irq(irq, active);
1117}
1118
1119static int pirq_enable_irq(struct pci_dev *dev)
1120{
1121 u8 pin;
1122 struct pci_dev *temp_dev;
1123
1124 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1125 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1126 char *msg = "";
1127
1128 pin--; /* interrupt pins are numbered starting from 1 */
1129
1130 if (io_apic_assign_pci_irqs) {
1131 int irq;
1132
1133 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1134 /*
1135 * Busses behind bridges are typically not listed in the MP-table.
1136 * In this case we have to look up the IRQ based on the parent bus,
1137 * parent slot, and pin number. The SMP code detects such bridged
1138 * busses itself so we should get into this branch reliably.
1139 */
1140 temp_dev = dev;
1141 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1142 struct pci_dev * bridge = dev->bus->self;
1143
1144 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1145 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1146 PCI_SLOT(bridge->devfn), pin);
1147 if (irq >= 0)
1148 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1149 pci_name(bridge), 'A' + pin, irq);
1150 dev = bridge;
1151 }
1152 dev = temp_dev;
1153 if (irq >= 0) {
1154 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1155 pci_name(dev), 'A' + pin, irq);
1156 dev->irq = irq;
1157 return 0;
1158 } else
1159 msg = " Probably buggy MP table.";
1160 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1161 msg = "";
1162 else
1163 msg = " Please try using pci=biosirq.";
1164
1165 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1166 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1167 return 0;
1168
1169 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1170 'A' + pin, pci_name(dev), msg);
1171 }
1172 return 0;
1173}
diff --git a/arch/x86_64/pci/k8-bus.c b/arch/x86/pci/k8-bus_64.c
index 9cc813e29706..9cc813e29706 100644
--- a/arch/x86_64/pci/k8-bus.c
+++ b/arch/x86/pci/k8-bus_64.c
diff --git a/arch/i386/pci/legacy.c b/arch/x86/pci/legacy.c
index 5565d7016b75..5565d7016b75 100644
--- a/arch/i386/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
diff --git a/arch/i386/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 4df637e34f81..4df637e34f81 100644
--- a/arch/i386/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
diff --git a/arch/i386/pci/mmconfig.c b/arch/x86/pci/mmconfig_32.c
index 1bf5816d34c8..1bf5816d34c8 100644
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/x86/pci/mmconfig_32.c
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86/pci/mmconfig_64.c
index 4095e4d66a1d..4095e4d66a1d 100644
--- a/arch/x86_64/pci/mmconfig.c
+++ b/arch/x86/pci/mmconfig_64.c
diff --git a/arch/i386/pci/numa.c b/arch/x86/pci/numa.c
index f5f165f69e0c..f5f165f69e0c 100644
--- a/arch/i386/pci/numa.c
+++ b/arch/x86/pci/numa.c
diff --git a/arch/i386/pci/pcbios.c b/arch/x86/pci/pcbios.c
index 10ac8c316c46..10ac8c316c46 100644
--- a/arch/i386/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
diff --git a/arch/i386/pci/pci.h b/arch/x86/pci/pci.h
index 8c66f275756f..8c66f275756f 100644
--- a/arch/i386/pci/pci.h
+++ b/arch/x86/pci/pci.h
diff --git a/arch/i386/pci/visws.c b/arch/x86/pci/visws.c
index 8ecb1c722594..8ecb1c722594 100644
--- a/arch/i386/pci/visws.c
+++ b/arch/x86/pci/visws.c
diff --git a/arch/i386/power/Makefile b/arch/x86/power/Makefile
index d764ec950065..d764ec950065 100644
--- a/arch/i386/power/Makefile
+++ b/arch/x86/power/Makefile
diff --git a/arch/i386/power/cpu.c b/arch/x86/power/cpu.c
index 998fd3ec0d68..998fd3ec0d68 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/x86/power/cpu.c
diff --git a/arch/i386/power/suspend.c b/arch/x86/power/suspend.c
index a0020b913f31..a0020b913f31 100644
--- a/arch/i386/power/suspend.c
+++ b/arch/x86/power/suspend.c
diff --git a/arch/i386/power/swsusp.S b/arch/x86/power/swsusp.S
index 53662e05b393..53662e05b393 100644
--- a/arch/i386/power/swsusp.S
+++ b/arch/x86/power/swsusp.S
diff --git a/arch/x86_64/vdso/.gitignore b/arch/x86/vdso/.gitignore
index f8b69d84238e..f8b69d84238e 100644
--- a/arch/x86_64/vdso/.gitignore
+++ b/arch/x86/vdso/.gitignore
diff --git a/arch/x86_64/vdso/Makefile b/arch/x86/vdso/Makefile
index 8d03de029d9b..8d03de029d9b 100644
--- a/arch/x86_64/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
diff --git a/arch/x86_64/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 5b54cdfb2b07..5b54cdfb2b07 100644
--- a/arch/x86_64/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
diff --git a/arch/x86_64/vdso/vdso-note.S b/arch/x86/vdso/vdso-note.S
index 79a071e4357e..79a071e4357e 100644
--- a/arch/x86_64/vdso/vdso-note.S
+++ b/arch/x86/vdso/vdso-note.S
diff --git a/arch/x86_64/vdso/vdso-start.S b/arch/x86/vdso/vdso-start.S
index 2dc2cdb84d67..2dc2cdb84d67 100644
--- a/arch/x86_64/vdso/vdso-start.S
+++ b/arch/x86/vdso/vdso-start.S
diff --git a/arch/x86/vdso/vdso.S b/arch/x86/vdso/vdso.S
new file mode 100644
index 000000000000..4b1620a1529e
--- /dev/null
+++ b/arch/x86/vdso/vdso.S
@@ -0,0 +1,2 @@
1 .section ".vdso","a"
2 .incbin "arch/x86/vdso/vdso.so"
diff --git a/arch/x86_64/vdso/vdso.lds.S b/arch/x86/vdso/vdso.lds.S
index b9a60e665d08..b9a60e665d08 100644
--- a/arch/x86_64/vdso/vdso.lds.S
+++ b/arch/x86/vdso/vdso.lds.S
diff --git a/arch/x86_64/vdso/vextern.h b/arch/x86/vdso/vextern.h
index 1683ba2ae3e8..1683ba2ae3e8 100644
--- a/arch/x86_64/vdso/vextern.h
+++ b/arch/x86/vdso/vextern.h
diff --git a/arch/x86_64/vdso/vgetcpu.c b/arch/x86/vdso/vgetcpu.c
index 91f6e85d0fc2..91f6e85d0fc2 100644
--- a/arch/x86_64/vdso/vgetcpu.c
+++ b/arch/x86/vdso/vgetcpu.c
diff --git a/arch/x86_64/vdso/vma.c b/arch/x86/vdso/vma.c
index ff9333e5fb08..ff9333e5fb08 100644
--- a/arch/x86_64/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
diff --git a/arch/x86_64/vdso/voffset.h b/arch/x86/vdso/voffset.h
index 4af67c79085f..4af67c79085f 100644
--- a/arch/x86_64/vdso/voffset.h
+++ b/arch/x86/vdso/voffset.h
diff --git a/arch/x86_64/vdso/vvar.c b/arch/x86/vdso/vvar.c
index 6fc22219a472..6fc22219a472 100644
--- a/arch/x86_64/vdso/vvar.c
+++ b/arch/x86/vdso/vvar.c
diff --git a/arch/i386/video/Makefile b/arch/x86/video/Makefile
index 2c447c94adcc..2c447c94adcc 100644
--- a/arch/i386/video/Makefile
+++ b/arch/x86/video/Makefile
diff --git a/arch/i386/video/fbdev.c b/arch/x86/video/fbdev.c
index 48fb38d7d2c0..48fb38d7d2c0 100644
--- a/arch/i386/video/fbdev.c
+++ b/arch/x86/video/fbdev.c
diff --git a/arch/i386/xen/Kconfig b/arch/x86/xen/Kconfig
index 9df99e1885a4..9df99e1885a4 100644
--- a/arch/i386/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
diff --git a/arch/i386/xen/Makefile b/arch/x86/xen/Makefile
index 343df246bd3e..343df246bd3e 100644
--- a/arch/i386/xen/Makefile
+++ b/arch/x86/xen/Makefile
diff --git a/arch/i386/xen/enlighten.c b/arch/x86/xen/enlighten.c
index f01bfcd4bdee..f01bfcd4bdee 100644
--- a/arch/i386/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
diff --git a/arch/i386/xen/events.c b/arch/x86/xen/events.c
index da1b173547a1..da1b173547a1 100644
--- a/arch/i386/xen/events.c
+++ b/arch/x86/xen/events.c
diff --git a/arch/i386/xen/features.c b/arch/x86/xen/features.c
index 0707714e40d6..0707714e40d6 100644
--- a/arch/i386/xen/features.c
+++ b/arch/x86/xen/features.c
diff --git a/arch/i386/xen/manage.c b/arch/x86/xen/manage.c
index aa7af9e6abc0..aa7af9e6abc0 100644
--- a/arch/i386/xen/manage.c
+++ b/arch/x86/xen/manage.c
diff --git a/arch/i386/xen/mmu.c b/arch/x86/xen/mmu.c
index 874db0cd1d2a..874db0cd1d2a 100644
--- a/arch/i386/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
diff --git a/arch/i386/xen/mmu.h b/arch/x86/xen/mmu.h
index c9ff27f3ac3a..c9ff27f3ac3a 100644
--- a/arch/i386/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
diff --git a/arch/i386/xen/multicalls.c b/arch/x86/xen/multicalls.c
index c837e8e463db..c837e8e463db 100644
--- a/arch/i386/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
diff --git a/arch/i386/xen/multicalls.h b/arch/x86/xen/multicalls.h
index e6f7530b156c..e6f7530b156c 100644
--- a/arch/i386/xen/multicalls.h
+++ b/arch/x86/xen/multicalls.h
diff --git a/arch/i386/xen/setup.c b/arch/x86/xen/setup.c
index f84e77226646..f84e77226646 100644
--- a/arch/i386/xen/setup.c
+++ b/arch/x86/xen/setup.c
diff --git a/arch/i386/xen/smp.c b/arch/x86/xen/smp.c
index 557b8e24706a..557b8e24706a 100644
--- a/arch/i386/xen/smp.c
+++ b/arch/x86/xen/smp.c
diff --git a/arch/i386/xen/time.c b/arch/x86/xen/time.c
index dfd6db69ead5..dfd6db69ead5 100644
--- a/arch/i386/xen/time.c
+++ b/arch/x86/xen/time.c
diff --git a/arch/i386/xen/vdso.h b/arch/x86/xen/vdso.h
index 861fedfe5230..861fedfe5230 100644
--- a/arch/i386/xen/vdso.h
+++ b/arch/x86/xen/vdso.h
diff --git a/arch/i386/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
index 1a43b60c0c62..1a43b60c0c62 100644
--- a/arch/i386/xen/xen-asm.S
+++ b/arch/x86/xen/xen-asm.S
diff --git a/arch/i386/xen/xen-head.S b/arch/x86/xen/xen-head.S
index f8d6937db2ec..f8d6937db2ec 100644
--- a/arch/i386/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
diff --git a/arch/i386/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index b9aaea45f07f..b9aaea45f07f 100644
--- a/arch/i386/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index b4d9089a6a06..b1b98e614f7c 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -704,7 +704,7 @@ source kernel/power/Kconfig
704 704
705source "drivers/acpi/Kconfig" 705source "drivers/acpi/Kconfig"
706 706
707source "arch/x86_64/kernel/cpufreq/Kconfig" 707source "arch/x86/kernel/cpufreq/Kconfig"
708 708
709endmenu 709endmenu
710 710
@@ -778,7 +778,7 @@ source fs/Kconfig
778menu "Instrumentation Support" 778menu "Instrumentation Support"
779 depends on EXPERIMENTAL 779 depends on EXPERIMENTAL
780 780
781source "arch/x86_64/oprofile/Kconfig" 781source "arch/x86/oprofile/Kconfig"
782 782
783config KPROBES 783config KPROBES
784 bool "Kprobes" 784 bool "Kprobes"
diff --git a/arch/x86_64/Makefile b/arch/x86_64/Makefile
index b024e4a86895..8bffb94c71b5 100644
--- a/arch/x86_64/Makefile
+++ b/arch/x86_64/Makefile
@@ -21,6 +21,9 @@
21# 21#
22# $Id: Makefile,v 1.31 2002/03/22 15:56:07 ak Exp $ 22# $Id: Makefile,v 1.31 2002/03/22 15:56:07 ak Exp $
23 23
24# Fill in SRCARCH
25SRCARCH := x86
26
24LDFLAGS := -m elf_x86_64 27LDFLAGS := -m elf_x86_64
25OBJCOPYFLAGS := -O binary -R .note -R .comment -S 28OBJCOPYFLAGS := -O binary -R .note -R .comment -S
26LDFLAGS_vmlinux := 29LDFLAGS_vmlinux :=
@@ -71,18 +74,18 @@ CFLAGS += $(cflags-y)
71CFLAGS_KERNEL += $(cflags-kernel-y) 74CFLAGS_KERNEL += $(cflags-kernel-y)
72AFLAGS += -m64 75AFLAGS += -m64
73 76
74head-y := arch/x86_64/kernel/head.o arch/x86_64/kernel/head64.o arch/x86_64/kernel/init_task.o 77head-y := arch/x86/kernel/head_64.o arch/x86/kernel/head64.o arch/x86/kernel/init_task_64.o
75 78
76libs-y += arch/x86_64/lib/ 79libs-y += arch/x86/lib/
77core-y += arch/x86_64/kernel/ \ 80core-y += arch/x86/kernel/ \
78 arch/x86_64/mm/ \ 81 arch/x86/mm/ \
79 arch/x86_64/crypto/ \ 82 arch/x86/crypto/ \
80 arch/x86_64/vdso/ 83 arch/x86/vdso/
81core-$(CONFIG_IA32_EMULATION) += arch/x86_64/ia32/ 84core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
82drivers-$(CONFIG_PCI) += arch/x86_64/pci/ 85drivers-$(CONFIG_PCI) += arch/x86/pci/
83drivers-$(CONFIG_OPROFILE) += arch/x86_64/oprofile/ 86drivers-$(CONFIG_OPROFILE) += arch/x86/oprofile/
84 87
85boot := arch/x86_64/boot 88boot := arch/x86/boot
86 89
87PHONY += bzImage bzlilo install archmrproper \ 90PHONY += bzImage bzlilo install archmrproper \
88 fdimage fdimage144 fdimage288 isoimage archclean 91 fdimage fdimage144 fdimage288 isoimage archclean
@@ -90,10 +93,12 @@ PHONY += bzImage bzlilo install archmrproper \
90#Default target when executing "make" 93#Default target when executing "make"
91all: bzImage 94all: bzImage
92 95
93BOOTIMAGE := arch/x86_64/boot/bzImage 96BOOTIMAGE := arch/x86/boot/bzImage
94KBUILD_IMAGE := $(BOOTIMAGE) 97KBUILD_IMAGE := $(BOOTIMAGE)
95 98
96bzImage: vmlinux 99bzImage: vmlinux
100 $(Q)mkdir -p $(objtree)/arch/x86_64/boot
101 $(Q)ln -fsn $(objtree)/arch/x86/boot/bzImage $(objtree)/arch/x86_64/boot/bzImage
97 $(Q)$(MAKE) $(build)=$(boot) $(BOOTIMAGE) 102 $(Q)$(MAKE) $(build)=$(boot) $(BOOTIMAGE)
98 103
99bzlilo: vmlinux 104bzlilo: vmlinux
@@ -109,6 +114,7 @@ install:
109 $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(BOOTIMAGE) $@ 114 $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(BOOTIMAGE) $@
110 115
111archclean: 116archclean:
117 $(Q)rm -rf $(objtree)/arch/x86_64/boot
112 $(Q)$(MAKE) $(clean)=$(boot) 118 $(Q)$(MAKE) $(clean)=$(boot)
113 119
114define archhelp 120define archhelp
diff --git a/arch/x86_64/boot/.gitignore b/arch/x86_64/boot/.gitignore
deleted file mode 100644
index 18465143cfa2..000000000000
--- a/arch/x86_64/boot/.gitignore
+++ /dev/null
@@ -1,5 +0,0 @@
1bootsect
2bzImage
3setup
4setup.bin
5setup.elf
diff --git a/arch/x86_64/boot/Makefile b/arch/x86_64/boot/Makefile
deleted file mode 100644
index 67096389de1f..000000000000
--- a/arch/x86_64/boot/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# arch/x86_64/boot/Makefile
3#
4# The actual boot code is shared with i386 including the Makefile.
5# So tell kbuild that we fetch the code from i386 and include the
6# Makefile from i386 too.
7
8src := arch/i386/boot
9include $(src)/Makefile
diff --git a/arch/x86_64/boot/compressed/Makefile b/arch/x86_64/boot/compressed/Makefile
deleted file mode 100644
index 877c0bdbbc67..000000000000
--- a/arch/x86_64/boot/compressed/Makefile
+++ /dev/null
@@ -1,30 +0,0 @@
1#
2# linux/arch/x86_64/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
8
9CFLAGS := -m64 -D__KERNEL__ $(LINUXINCLUDE) -O2 \
10 -fno-strict-aliasing -fPIC -mcmodel=small \
11 $(call cc-option, -ffreestanding) \
12 $(call cc-option, -fno-stack-protector)
13AFLAGS := $(CFLAGS) -D__ASSEMBLY__
14LDFLAGS := -m elf_x86_64
15
16LDFLAGS_vmlinux := -T
17$(obj)/vmlinux: $(src)/vmlinux.lds $(obj)/head.o $(obj)/misc.o $(obj)/piggy.o FORCE
18 $(call if_changed,ld)
19 @:
20
21$(obj)/vmlinux.bin: vmlinux FORCE
22 $(call if_changed,objcopy)
23
24$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
25 $(call if_changed,gzip)
26
27LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
28
29$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
30 $(call if_changed,ld)
diff --git a/arch/x86_64/boot/compressed/head.S b/arch/x86_64/boot/compressed/head.S
deleted file mode 100644
index 9fd8030cc54f..000000000000
--- a/arch/x86_64/boot/compressed/head.S
+++ /dev/null
@@ -1,311 +0,0 @@
1/*
2 * linux/boot/head.S
3 *
4 * Copyright (C) 1991, 1992, 1993 Linus Torvalds
5 */
6
7/*
8 * head.S contains the 32-bit startup code.
9 *
10 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
11 * the page directory will exist. The startup code will be overwritten by
12 * the page directory. [According to comments etc elsewhere on a compressed
13 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
14 *
15 * Page 0 is deliberately kept safe, since System Management Mode code in
16 * laptops may need to access the BIOS data stored there. This is also
17 * useful for future device drivers that either access the BIOS via VM86
18 * mode.
19 */
20
21/*
22 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
23 */
24.code32
25.text
26
27#include <linux/linkage.h>
28#include <asm/segment.h>
29#include <asm/pgtable.h>
30#include <asm/page.h>
31#include <asm/msr.h>
32
33.section ".text.head"
34 .code32
35 .globl startup_32
36
37startup_32:
38 cld
39 cli
40 movl $(__KERNEL_DS), %eax
41 movl %eax, %ds
42 movl %eax, %es
43 movl %eax, %ss
44
45/* Calculate the delta between where we were compiled to run
46 * at and where we were actually loaded at. This can only be done
47 * with a short local call on x86. Nothing else will tell us what
48 * address we are running at. The reserved chunk of the real-mode
49 * data at 0x1e4 (defined as a scratch field) are used as the stack
50 * for this calculation. Only 4 bytes are needed.
51 */
52 leal (0x1e4+4)(%esi), %esp
53 call 1f
541: popl %ebp
55 subl $1b, %ebp
56
57/* setup a stack and make sure cpu supports long mode. */
58 movl $user_stack_end, %eax
59 addl %ebp, %eax
60 movl %eax, %esp
61
62 call verify_cpu
63 testl %eax, %eax
64 jnz no_longmode
65
66/* Compute the delta between where we were compiled to run at
67 * and where the code will actually run at.
68 */
69/* %ebp contains the address we are loaded at by the boot loader and %ebx
70 * contains the address where we should move the kernel image temporarily
71 * for safe in-place decompression.
72 */
73
74#ifdef CONFIG_RELOCATABLE
75 movl %ebp, %ebx
76 addl $(LARGE_PAGE_SIZE -1), %ebx
77 andl $LARGE_PAGE_MASK, %ebx
78#else
79 movl $CONFIG_PHYSICAL_START, %ebx
80#endif
81
82 /* Replace the compressed data size with the uncompressed size */
83 subl input_len(%ebp), %ebx
84 movl output_len(%ebp), %eax
85 addl %eax, %ebx
86 /* Add 8 bytes for every 32K input block */
87 shrl $12, %eax
88 addl %eax, %ebx
89 /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
90 addl $(32768 + 18 + 4095), %ebx
91 andl $~4095, %ebx
92
93/*
94 * Prepare for entering 64 bit mode
95 */
96
97 /* Load new GDT with the 64bit segments using 32bit descriptor */
98 leal gdt(%ebp), %eax
99 movl %eax, gdt+2(%ebp)
100 lgdt gdt(%ebp)
101
102 /* Enable PAE mode */
103 xorl %eax, %eax
104 orl $(1 << 5), %eax
105 movl %eax, %cr4
106
107 /*
108 * Build early 4G boot pagetable
109 */
110 /* Initialize Page tables to 0*/
111 leal pgtable(%ebx), %edi
112 xorl %eax, %eax
113 movl $((4096*6)/4), %ecx
114 rep stosl
115
116 /* Build Level 4 */
117 leal pgtable + 0(%ebx), %edi
118 leal 0x1007 (%edi), %eax
119 movl %eax, 0(%edi)
120
121 /* Build Level 3 */
122 leal pgtable + 0x1000(%ebx), %edi
123 leal 0x1007(%edi), %eax
124 movl $4, %ecx
1251: movl %eax, 0x00(%edi)
126 addl $0x00001000, %eax
127 addl $8, %edi
128 decl %ecx
129 jnz 1b
130
131 /* Build Level 2 */
132 leal pgtable + 0x2000(%ebx), %edi
133 movl $0x00000183, %eax
134 movl $2048, %ecx
1351: movl %eax, 0(%edi)
136 addl $0x00200000, %eax
137 addl $8, %edi
138 decl %ecx
139 jnz 1b
140
141 /* Enable the boot page tables */
142 leal pgtable(%ebx), %eax
143 movl %eax, %cr3
144
145 /* Enable Long mode in EFER (Extended Feature Enable Register) */
146 movl $MSR_EFER, %ecx
147 rdmsr
148 btsl $_EFER_LME, %eax
149 wrmsr
150
151 /* Setup for the jump to 64bit mode
152 *
153 * When the jump is performend we will be in long mode but
154 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
155 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
156 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
157 * We place all of the values on our mini stack so lret can
158 * used to perform that far jump.
159 */
160 pushl $__KERNEL_CS
161 leal startup_64(%ebp), %eax
162 pushl %eax
163
164 /* Enter paged protected Mode, activating Long Mode */
165 movl $0x80000001, %eax /* Enable Paging and Protected mode */
166 movl %eax, %cr0
167
168 /* Jump from 32bit compatibility mode into 64bit mode. */
169 lret
170
171no_longmode:
172 /* This isn't an x86-64 CPU so hang */
1731:
174 hlt
175 jmp 1b
176
177#include "../../kernel/verify_cpu.S"
178
179 /* Be careful here startup_64 needs to be at a predictable
180 * address so I can export it in an ELF header. Bootloaders
181 * should look at the ELF header to find this address, as
182 * it may change in the future.
183 */
184 .code64
185 .org 0x200
186ENTRY(startup_64)
187 /* We come here either from startup_32 or directly from a
188 * 64bit bootloader. If we come here from a bootloader we depend on
189 * an identity mapped page table being provied that maps our
190 * entire text+data+bss and hopefully all of memory.
191 */
192
193 /* Setup data segments. */
194 xorl %eax, %eax
195 movl %eax, %ds
196 movl %eax, %es
197 movl %eax, %ss
198 movl %eax, %fs
199 movl %eax, %gs
200 lldt %ax
201 movl $0x20, %eax
202 ltr %ax
203
204 /* Compute the decompressed kernel start address. It is where
205 * we were loaded at aligned to a 2M boundary. %rbp contains the
206 * decompressed kernel start address.
207 *
208 * If it is a relocatable kernel then decompress and run the kernel
209 * from load address aligned to 2MB addr, otherwise decompress and
210 * run the kernel from CONFIG_PHYSICAL_START
211 */
212
213 /* Start with the delta to where the kernel will run at. */
214#ifdef CONFIG_RELOCATABLE
215 leaq startup_32(%rip) /* - $startup_32 */, %rbp
216 addq $(LARGE_PAGE_SIZE - 1), %rbp
217 andq $LARGE_PAGE_MASK, %rbp
218 movq %rbp, %rbx
219#else
220 movq $CONFIG_PHYSICAL_START, %rbp
221 movq %rbp, %rbx
222#endif
223
224 /* Replace the compressed data size with the uncompressed size */
225 movl input_len(%rip), %eax
226 subq %rax, %rbx
227 movl output_len(%rip), %eax
228 addq %rax, %rbx
229 /* Add 8 bytes for every 32K input block */
230 shrq $12, %rax
231 addq %rax, %rbx
232 /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
233 addq $(32768 + 18 + 4095), %rbx
234 andq $~4095, %rbx
235
236/* Copy the compressed kernel to the end of our buffer
237 * where decompression in place becomes safe.
238 */
239 leaq _end(%rip), %r8
240 leaq _end(%rbx), %r9
241 movq $_end /* - $startup_32 */, %rcx
2421: subq $8, %r8
243 subq $8, %r9
244 movq 0(%r8), %rax
245 movq %rax, 0(%r9)
246 subq $8, %rcx
247 jnz 1b
248
249/*
250 * Jump to the relocated address.
251 */
252 leaq relocated(%rbx), %rax
253 jmp *%rax
254
255.section ".text"
256relocated:
257
258/*
259 * Clear BSS
260 */
261 xorq %rax, %rax
262 leaq _edata(%rbx), %rdi
263 leaq _end(%rbx), %rcx
264 subq %rdi, %rcx
265 cld
266 rep
267 stosb
268
269 /* Setup the stack */
270 leaq user_stack_end(%rip), %rsp
271
272 /* zero EFLAGS after setting rsp */
273 pushq $0
274 popfq
275
276/*
277 * Do the decompression, and jump to the new kernel..
278 */
279 pushq %rsi # Save the real mode argument
280 movq %rsi, %rdi # real mode address
281 leaq _heap(%rip), %rsi # _heap
282 leaq input_data(%rip), %rdx # input_data
283 movl input_len(%rip), %eax
284 movq %rax, %rcx # input_len
285 movq %rbp, %r8 # output
286 call decompress_kernel
287 popq %rsi
288
289
290/*
291 * Jump to the decompressed kernel.
292 */
293 jmp *%rbp
294
295 .data
296gdt:
297 .word gdt_end - gdt
298 .long gdt
299 .word 0
300 .quad 0x0000000000000000 /* NULL descriptor */
301 .quad 0x00af9a000000ffff /* __KERNEL_CS */
302 .quad 0x00cf92000000ffff /* __KERNEL_DS */
303 .quad 0x0080890000000000 /* TS descriptor */
304 .quad 0x0000000000000000 /* TS continued */
305gdt_end:
306 .bss
307/* Stack for uncompression */
308 .balign 4
309user_stack:
310 .fill 4096,4,0
311user_stack_end:
diff --git a/arch/x86_64/boot/tools/.gitignore b/arch/x86_64/boot/tools/.gitignore
deleted file mode 100644
index 378eac25d311..000000000000
--- a/arch/x86_64/boot/tools/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
1build
diff --git a/arch/x86_64/crypto/Makefile b/arch/x86_64/crypto/Makefile
deleted file mode 100644
index 15b538a8b7f7..000000000000
--- a/arch/x86_64/crypto/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1#
2# x86_64/crypto/Makefile
3#
4# Arch-specific CryptoAPI modules.
5#
6
7obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
8obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
9
10aes-x86_64-y := aes-x86_64-asm.o aes.o
11twofish-x86_64-y := twofish-x86_64-asm.o twofish.o
12
diff --git a/arch/x86_64/ia32/audit.c b/arch/x86_64/ia32/audit.c
deleted file mode 100644
index 8850fe40ea34..000000000000
--- a/arch/x86_64/ia32/audit.c
+++ /dev/null
@@ -1,42 +0,0 @@
1#include <asm-i386/unistd.h>
2
3unsigned ia32_dir_class[] = {
4#include <asm-generic/audit_dir_write.h>
5~0U
6};
7
8unsigned ia32_chattr_class[] = {
9#include <asm-generic/audit_change_attr.h>
10~0U
11};
12
13unsigned ia32_write_class[] = {
14#include <asm-generic/audit_write.h>
15~0U
16};
17
18unsigned ia32_read_class[] = {
19#include <asm-generic/audit_read.h>
20~0U
21};
22
23unsigned ia32_signal_class[] = {
24#include <asm-generic/audit_signal.h>
25~0U
26};
27
28int ia32_classify_syscall(unsigned syscall)
29{
30 switch(syscall) {
31 case __NR_open:
32 return 2;
33 case __NR_openat:
34 return 3;
35 case __NR_socketcall:
36 return 4;
37 case __NR_execve:
38 return 5;
39 default:
40 return 1;
41 }
42}
diff --git a/arch/x86_64/ia32/ipc32.c b/arch/x86_64/ia32/ipc32.c
deleted file mode 100644
index 369151dc3213..000000000000
--- a/arch/x86_64/ia32/ipc32.c
+++ /dev/null
@@ -1,57 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/spinlock.h>
3#include <linux/list.h>
4#include <linux/syscalls.h>
5#include <linux/time.h>
6#include <linux/sem.h>
7#include <linux/msg.h>
8#include <linux/shm.h>
9#include <linux/ipc.h>
10#include <linux/compat.h>
11
12#include <asm-i386/ipc.h>
13
14asmlinkage long
15sys32_ipc(u32 call, int first, int second, int third,
16 compat_uptr_t ptr, u32 fifth)
17{
18 int version;
19
20 version = call >> 16; /* hack for backward compatibility */
21 call &= 0xffff;
22
23 switch (call) {
24 case SEMOP:
25 /* struct sembuf is the same on 32 and 64bit :)) */
26 return sys_semtimedop(first, compat_ptr(ptr), second, NULL);
27 case SEMTIMEDOP:
28 return compat_sys_semtimedop(first, compat_ptr(ptr), second,
29 compat_ptr(fifth));
30 case SEMGET:
31 return sys_semget(first, second, third);
32 case SEMCTL:
33 return compat_sys_semctl(first, second, third, compat_ptr(ptr));
34
35 case MSGSND:
36 return compat_sys_msgsnd(first, second, third, compat_ptr(ptr));
37 case MSGRCV:
38 return compat_sys_msgrcv(first, second, fifth, third,
39 version, compat_ptr(ptr));
40 case MSGGET:
41 return sys_msgget((key_t) first, second);
42 case MSGCTL:
43 return compat_sys_msgctl(first, second, compat_ptr(ptr));
44
45 case SHMAT:
46 return compat_sys_shmat(first, second, third, version,
47 compat_ptr(ptr));
48 break;
49 case SHMDT:
50 return sys_shmdt(compat_ptr(ptr));
51 case SHMGET:
52 return sys_shmget(first, (unsigned)second, third);
53 case SHMCTL:
54 return compat_sys_shmctl(first, second, compat_ptr(ptr));
55 }
56 return -ENOSYS;
57}
diff --git a/arch/x86_64/ia32/syscall32_syscall.S b/arch/x86_64/ia32/syscall32_syscall.S
deleted file mode 100644
index 8f8271bdf135..000000000000
--- a/arch/x86_64/ia32/syscall32_syscall.S
+++ /dev/null
@@ -1,17 +0,0 @@
1/* 32bit VDSOs mapped into user space. */
2
3 .section ".init.data","aw"
4
5 .globl syscall32_syscall
6 .globl syscall32_syscall_end
7
8syscall32_syscall:
9 .incbin "arch/x86_64/ia32/vsyscall-syscall.so"
10syscall32_syscall_end:
11
12 .globl syscall32_sysenter
13 .globl syscall32_sysenter_end
14
15syscall32_sysenter:
16 .incbin "arch/x86_64/ia32/vsyscall-sysenter.so"
17syscall32_sysenter_end:
diff --git a/arch/x86_64/ia32/vsyscall-sigreturn.S b/arch/x86_64/ia32/vsyscall-sigreturn.S
deleted file mode 100644
index 1384367cdbe1..000000000000
--- a/arch/x86_64/ia32/vsyscall-sigreturn.S
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * Common code for the sigreturn entry points on the vsyscall page.
3 * This code uses SYSCALL_ENTER_KERNEL (either syscall or int $0x80)
4 * to enter the kernel.
5 * This file is #include'd by vsyscall-*.S to define them after the
6 * vsyscall entry point. The addresses we get for these entry points
7 * by doing ".balign 32" must match in both versions of the page.
8 */
9
10 .code32
11 .section .text.sigreturn,"ax"
12 .balign 32
13 .globl __kernel_sigreturn
14 .type __kernel_sigreturn,@function
15__kernel_sigreturn:
16.LSTART_sigreturn:
17 popl %eax
18 movl $__NR_ia32_sigreturn, %eax
19 SYSCALL_ENTER_KERNEL
20.LEND_sigreturn:
21 .size __kernel_sigreturn,.-.LSTART_sigreturn
22
23 .section .text.rtsigreturn,"ax"
24 .balign 32
25 .globl __kernel_rt_sigreturn
26 .type __kernel_rt_sigreturn,@function
27__kernel_rt_sigreturn:
28.LSTART_rt_sigreturn:
29 movl $__NR_ia32_rt_sigreturn, %eax
30 SYSCALL_ENTER_KERNEL
31.LEND_rt_sigreturn:
32 .size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
33
34 .section .eh_frame,"a",@progbits
35.LSTARTFRAMES:
36 .long .LENDCIES-.LSTARTCIES
37.LSTARTCIES:
38 .long 0 /* CIE ID */
39 .byte 1 /* Version number */
40 .string "zRS" /* NUL-terminated augmentation string */
41 .uleb128 1 /* Code alignment factor */
42 .sleb128 -4 /* Data alignment factor */
43 .byte 8 /* Return address register column */
44 .uleb128 1 /* Augmentation value length */
45 .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */
46 .byte 0x0c /* DW_CFA_def_cfa */
47 .uleb128 4
48 .uleb128 4
49 .byte 0x88 /* DW_CFA_offset, column 0x8 */
50 .uleb128 1
51 .align 4
52.LENDCIES:
53
54 .long .LENDFDE2-.LSTARTFDE2 /* Length FDE */
55.LSTARTFDE2:
56 .long .LSTARTFDE2-.LSTARTFRAMES /* CIE pointer */
57 /* HACK: The dwarf2 unwind routines will subtract 1 from the
58 return address to get an address in the middle of the
59 presumed call instruction. Since we didn't get here via
60 a call, we need to include the nop before the real start
61 to make up for it. */
62 .long .LSTART_sigreturn-1-. /* PC-relative start address */
63 .long .LEND_sigreturn-.LSTART_sigreturn+1
64 .uleb128 0 /* Augmentation length */
65 /* What follows are the instructions for the table generation.
66 We record the locations of each register saved. This is
67 complicated by the fact that the "CFA" is always assumed to
68 be the value of the stack pointer in the caller. This means
69 that we must define the CFA of this body of code to be the
70 saved value of the stack pointer in the sigcontext. Which
71 also means that there is no fixed relation to the other
72 saved registers, which means that we must use DW_CFA_expression
73 to compute their addresses. It also means that when we
74 adjust the stack with the popl, we have to do it all over again. */
75
76#define do_cfa_expr(offset) \
77 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
78 .uleb128 1f-0f; /* length */ \
790: .byte 0x74; /* DW_OP_breg4 */ \
80 .sleb128 offset; /* offset */ \
81 .byte 0x06; /* DW_OP_deref */ \
821:
83
84#define do_expr(regno, offset) \
85 .byte 0x10; /* DW_CFA_expression */ \
86 .uleb128 regno; /* regno */ \
87 .uleb128 1f-0f; /* length */ \
880: .byte 0x74; /* DW_OP_breg4 */ \
89 .sleb128 offset; /* offset */ \
901:
91
92 do_cfa_expr(IA32_SIGCONTEXT_esp+4)
93 do_expr(0, IA32_SIGCONTEXT_eax+4)
94 do_expr(1, IA32_SIGCONTEXT_ecx+4)
95 do_expr(2, IA32_SIGCONTEXT_edx+4)
96 do_expr(3, IA32_SIGCONTEXT_ebx+4)
97 do_expr(5, IA32_SIGCONTEXT_ebp+4)
98 do_expr(6, IA32_SIGCONTEXT_esi+4)
99 do_expr(7, IA32_SIGCONTEXT_edi+4)
100 do_expr(8, IA32_SIGCONTEXT_eip+4)
101
102 .byte 0x42 /* DW_CFA_advance_loc 2 -- nop; popl eax. */
103
104 do_cfa_expr(IA32_SIGCONTEXT_esp)
105 do_expr(0, IA32_SIGCONTEXT_eax)
106 do_expr(1, IA32_SIGCONTEXT_ecx)
107 do_expr(2, IA32_SIGCONTEXT_edx)
108 do_expr(3, IA32_SIGCONTEXT_ebx)
109 do_expr(5, IA32_SIGCONTEXT_ebp)
110 do_expr(6, IA32_SIGCONTEXT_esi)
111 do_expr(7, IA32_SIGCONTEXT_edi)
112 do_expr(8, IA32_SIGCONTEXT_eip)
113
114 .align 4
115.LENDFDE2:
116
117 .long .LENDFDE3-.LSTARTFDE3 /* Length FDE */
118.LSTARTFDE3:
119 .long .LSTARTFDE3-.LSTARTFRAMES /* CIE pointer */
120 /* HACK: See above wrt unwind library assumptions. */
121 .long .LSTART_rt_sigreturn-1-. /* PC-relative start address */
122 .long .LEND_rt_sigreturn-.LSTART_rt_sigreturn+1
123 .uleb128 0 /* Augmentation */
124 /* What follows are the instructions for the table generation.
125 We record the locations of each register saved. This is
126 slightly less complicated than the above, since we don't
127 modify the stack pointer in the process. */
128
129 do_cfa_expr(IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_esp)
130 do_expr(0, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_eax)
131 do_expr(1, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ecx)
132 do_expr(2, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_edx)
133 do_expr(3, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ebx)
134 do_expr(5, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_ebp)
135 do_expr(6, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_esi)
136 do_expr(7, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_edi)
137 do_expr(8, IA32_RT_SIGFRAME_sigcontext-4 + IA32_SIGCONTEXT_eip)
138
139 .align 4
140.LENDFDE3:
141
142#include "../../i386/kernel/vsyscall-note.S"
143
diff --git a/arch/x86_64/kernel/Makefile b/arch/x86_64/kernel/Makefile
deleted file mode 100644
index ff5d8c9b96d9..000000000000
--- a/arch/x86_64/kernel/Makefile
+++ /dev/null
@@ -1,63 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := head.o head64.o init_task.o vmlinux.lds
6EXTRA_AFLAGS := -traditional
7obj-y := process.o signal.o entry.o traps.o irq.o \
8 ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_x86_64.o \
9 x8664_ksyms.o i387.o syscall.o vsyscall.o \
10 setup64.o bootflag.o e820.o reboot.o quirks.o i8237.o \
11 pci-dma.o pci-nommu.o alternative.o hpet.o tsc.o bugs.o \
12 perfctr-watchdog.o
13
14obj-$(CONFIG_STACKTRACE) += stacktrace.o
15obj-$(CONFIG_X86_MCE) += mce.o therm_throt.o
16obj-$(CONFIG_X86_MCE_INTEL) += mce_intel.o
17obj-$(CONFIG_X86_MCE_AMD) += mce_amd.o
18obj-$(CONFIG_MTRR) += ../../i386/kernel/cpu/mtrr/
19obj-$(CONFIG_ACPI) += acpi/
20obj-$(CONFIG_X86_MSR) += msr.o
21obj-$(CONFIG_MICROCODE) += microcode.o
22obj-$(CONFIG_X86_CPUID) += cpuid.o
23obj-$(CONFIG_SMP) += smp.o smpboot.o trampoline.o tsc_sync.o
24obj-y += apic.o nmi.o
25obj-y += io_apic.o mpparse.o genapic.o genapic_flat.o
26obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o crash.o
27obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
28obj-$(CONFIG_PM) += suspend.o
29obj-$(CONFIG_HIBERNATION) += suspend_asm.o
30obj-$(CONFIG_CPU_FREQ) += cpufreq/
31obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
32obj-$(CONFIG_IOMMU) += pci-gart.o aperture.o
33obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary.o tce.o
34obj-$(CONFIG_SWIOTLB) += pci-swiotlb.o
35obj-$(CONFIG_KPROBES) += kprobes.o
36obj-$(CONFIG_X86_PM_TIMER) += pmtimer.o
37obj-$(CONFIG_X86_VSMP) += vsmp.o
38obj-$(CONFIG_K8_NB) += k8.o
39obj-$(CONFIG_AUDIT) += audit.o
40
41obj-$(CONFIG_MODULES) += module.o
42obj-$(CONFIG_PCI) += early-quirks.o
43
44obj-y += topology.o
45obj-y += intel_cacheinfo.o
46obj-y += addon_cpuid_features.o
47obj-y += pcspeaker.o
48
49CFLAGS_vsyscall.o := $(PROFILING) -g0
50
51therm_throt-y += ../../i386/kernel/cpu/mcheck/therm_throt.o
52bootflag-y += ../../i386/kernel/bootflag.o
53cpuid-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/cpuid.o
54topology-y += ../../i386/kernel/topology.o
55microcode-$(subst m,y,$(CONFIG_MICROCODE)) += ../../i386/kernel/microcode.o
56intel_cacheinfo-y += ../../i386/kernel/cpu/intel_cacheinfo.o
57addon_cpuid_features-y += ../../i386/kernel/cpu/addon_cpuid_features.o
58quirks-y += ../../i386/kernel/quirks.o
59i8237-y += ../../i386/kernel/i8237.o
60msr-$(subst m,y,$(CONFIG_X86_MSR)) += ../../i386/kernel/msr.o
61alternative-y += ../../i386/kernel/alternative.o
62pcspeaker-y += ../../i386/kernel/pcspeaker.o
63perfctr-watchdog-y += ../../i386/kernel/cpu/perfctr-watchdog.o
diff --git a/arch/x86_64/kernel/acpi/Makefile b/arch/x86_64/kernel/acpi/Makefile
deleted file mode 100644
index 080b9963f1bc..000000000000
--- a/arch/x86_64/kernel/acpi/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1obj-y := boot.o
2boot-y := ../../../i386/kernel/acpi/boot.o
3obj-$(CONFIG_ACPI_SLEEP) += sleep.o wakeup.o
4
5ifneq ($(CONFIG_ACPI_PROCESSOR),)
6obj-y += processor.o
7processor-y := ../../../i386/kernel/acpi/processor.o ../../../i386/kernel/acpi/cstate.o
8endif
9
diff --git a/arch/x86_64/kernel/acpi/wakeup.S b/arch/x86_64/kernel/acpi/wakeup.S
deleted file mode 100644
index a06f2bcabef9..000000000000
--- a/arch/x86_64/kernel/acpi/wakeup.S
+++ /dev/null
@@ -1,456 +0,0 @@
1.text
2#include <linux/linkage.h>
3#include <asm/segment.h>
4#include <asm/pgtable.h>
5#include <asm/page.h>
6#include <asm/msr.h>
7
8# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
9#
10# wakeup_code runs in real mode, and at unknown address (determined at run-time).
11# Therefore it must only use relative jumps/calls.
12#
13# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
14#
15# If physical address of wakeup_code is 0x12345, BIOS should call us with
16# cs = 0x1234, eip = 0x05
17#
18
19#define BEEP \
20 inb $97, %al; \
21 outb %al, $0x80; \
22 movb $3, %al; \
23 outb %al, $97; \
24 outb %al, $0x80; \
25 movb $-74, %al; \
26 outb %al, $67; \
27 outb %al, $0x80; \
28 movb $-119, %al; \
29 outb %al, $66; \
30 outb %al, $0x80; \
31 movb $15, %al; \
32 outb %al, $66;
33
34
35ALIGN
36 .align 16
37ENTRY(wakeup_start)
38wakeup_code:
39 wakeup_code_start = .
40 .code16
41
42# Running in *copy* of this code, somewhere in low 1MB.
43
44 movb $0xa1, %al ; outb %al, $0x80
45 cli
46 cld
47 # setup data segment
48 movw %cs, %ax
49 movw %ax, %ds # Make ds:0 point to wakeup_start
50 movw %ax, %ss
51
52 # Data segment must be set up before we can see whether to beep.
53 testl $4, realmode_flags - wakeup_code
54 jz 1f
55 BEEP
561:
57
58 # Private stack is needed for ASUS board
59 mov $(wakeup_stack - wakeup_code), %sp
60
61 pushl $0 # Kill any dangerous flags
62 popfl
63
64 movl real_magic - wakeup_code, %eax
65 cmpl $0x12345678, %eax
66 jne bogus_real_magic
67
68 call verify_cpu # Verify the cpu supports long
69 # mode
70 testl %eax, %eax
71 jnz no_longmode
72
73 testl $1, realmode_flags - wakeup_code
74 jz 1f
75 lcall $0xc000,$3
76 movw %cs, %ax
77 movw %ax, %ds # Bios might have played with that
78 movw %ax, %ss
791:
80
81 testl $2, realmode_flags - wakeup_code
82 jz 1f
83 mov video_mode - wakeup_code, %ax
84 call mode_set
851:
86
87 movw $0xb800, %ax
88 movw %ax,%fs
89 movw $0x0e00 + 'L', %fs:(0x10)
90
91 movb $0xa2, %al ; outb %al, $0x80
92
93 mov %ds, %ax # Find 32bit wakeup_code addr
94 movzx %ax, %esi # (Convert %ds:gdt to a liner ptr)
95 shll $4, %esi
96 # Fix up the vectors
97 addl %esi, wakeup_32_vector - wakeup_code
98 addl %esi, wakeup_long64_vector - wakeup_code
99 addl %esi, gdt_48a + 2 - wakeup_code # Fixup the gdt pointer
100
101 lidtl %ds:idt_48a - wakeup_code
102 lgdtl %ds:gdt_48a - wakeup_code # load gdt with whatever is
103 # appropriate
104
105 movl $1, %eax # protected mode (PE) bit
106 lmsw %ax # This is it!
107 jmp 1f
1081:
109
110 ljmpl *(wakeup_32_vector - wakeup_code)
111
112 .balign 4
113wakeup_32_vector:
114 .long wakeup_32 - wakeup_code
115 .word __KERNEL32_CS, 0
116
117 .code32
118wakeup_32:
119# Running in this code, but at low address; paging is not yet turned on.
120 movb $0xa5, %al ; outb %al, $0x80
121
122 movl $__KERNEL_DS, %eax
123 movl %eax, %ds
124
125 movw $0x0e00 + 'i', %ds:(0xb8012)
126 movb $0xa8, %al ; outb %al, $0x80;
127
128 /*
129 * Prepare for entering 64bits mode
130 */
131
132 /* Enable PAE */
133 xorl %eax, %eax
134 btsl $5, %eax
135 movl %eax, %cr4
136
137 /* Setup early boot stage 4 level pagetables */
138 leal (wakeup_level4_pgt - wakeup_code)(%esi), %eax
139 movl %eax, %cr3
140
141 /* Check if nx is implemented */
142 movl $0x80000001, %eax
143 cpuid
144 movl %edx,%edi
145
146 /* Enable Long Mode */
147 xorl %eax, %eax
148 btsl $_EFER_LME, %eax
149
150 /* No Execute supported? */
151 btl $20,%edi
152 jnc 1f
153 btsl $_EFER_NX, %eax
154
155 /* Make changes effective */
1561: movl $MSR_EFER, %ecx
157 xorl %edx, %edx
158 wrmsr
159
160 xorl %eax, %eax
161 btsl $31, %eax /* Enable paging and in turn activate Long Mode */
162 btsl $0, %eax /* Enable protected mode */
163
164 /* Make changes effective */
165 movl %eax, %cr0
166
167 /* At this point:
168 CR4.PAE must be 1
169 CS.L must be 0
170 CR3 must point to PML4
171 Next instruction must be a branch
172 This must be on identity-mapped page
173 */
174 /*
175 * At this point we're in long mode but in 32bit compatibility mode
176 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
177 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
178 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
179 */
180
181 /* Finally jump in 64bit mode */
182 ljmp *(wakeup_long64_vector - wakeup_code)(%esi)
183
184 .balign 4
185wakeup_long64_vector:
186 .long wakeup_long64 - wakeup_code
187 .word __KERNEL_CS, 0
188
189.code64
190
191 /* Hooray, we are in Long 64-bit mode (but still running in
192 * low memory)
193 */
194wakeup_long64:
195 /*
196 * We must switch to a new descriptor in kernel space for the GDT
197 * because soon the kernel won't have access anymore to the userspace
198 * addresses where we're currently running on. We have to do that here
199 * because in 32bit we couldn't load a 64bit linear address.
200 */
201 lgdt cpu_gdt_descr
202
203 movw $0x0e00 + 'n', %ds:(0xb8014)
204 movb $0xa9, %al ; outb %al, $0x80
205
206 movq saved_magic, %rax
207 movq $0x123456789abcdef0, %rdx
208 cmpq %rdx, %rax
209 jne bogus_64_magic
210
211 movw $0x0e00 + 'u', %ds:(0xb8016)
212
213 nop
214 nop
215 movw $__KERNEL_DS, %ax
216 movw %ax, %ss
217 movw %ax, %ds
218 movw %ax, %es
219 movw %ax, %fs
220 movw %ax, %gs
221 movq saved_rsp, %rsp
222
223 movw $0x0e00 + 'x', %ds:(0xb8018)
224 movq saved_rbx, %rbx
225 movq saved_rdi, %rdi
226 movq saved_rsi, %rsi
227 movq saved_rbp, %rbp
228
229 movw $0x0e00 + '!', %ds:(0xb801a)
230 movq saved_rip, %rax
231 jmp *%rax
232
233.code32
234
235 .align 64
236gdta:
237 /* Its good to keep gdt in sync with one in trampoline.S */
238 .word 0, 0, 0, 0 # dummy
239 /* ??? Why I need the accessed bit set in order for this to work? */
240 .quad 0x00cf9b000000ffff # __KERNEL32_CS
241 .quad 0x00af9b000000ffff # __KERNEL_CS
242 .quad 0x00cf93000000ffff # __KERNEL_DS
243
244idt_48a:
245 .word 0 # idt limit = 0
246 .word 0, 0 # idt base = 0L
247
248gdt_48a:
249 .word 0x800 # gdt limit=2048,
250 # 256 GDT entries
251 .long gdta - wakeup_code # gdt base (relocated in later)
252
253real_magic: .quad 0
254video_mode: .quad 0
255realmode_flags: .quad 0
256
257.code16
258bogus_real_magic:
259 movb $0xba,%al ; outb %al,$0x80
260 jmp bogus_real_magic
261
262.code64
263bogus_64_magic:
264 movb $0xb3,%al ; outb %al,$0x80
265 jmp bogus_64_magic
266
267.code16
268no_longmode:
269 movb $0xbc,%al ; outb %al,$0x80
270 jmp no_longmode
271
272#include "../verify_cpu.S"
273
274/* This code uses an extended set of video mode numbers. These include:
275 * Aliases for standard modes
276 * NORMAL_VGA (-1)
277 * EXTENDED_VGA (-2)
278 * ASK_VGA (-3)
279 * Video modes numbered by menu position -- NOT RECOMMENDED because of lack
280 * of compatibility when extending the table. These are between 0x00 and 0xff.
281 */
282#define VIDEO_FIRST_MENU 0x0000
283
284/* Standard BIOS video modes (BIOS number + 0x0100) */
285#define VIDEO_FIRST_BIOS 0x0100
286
287/* VESA BIOS video modes (VESA number + 0x0200) */
288#define VIDEO_FIRST_VESA 0x0200
289
290/* Video7 special modes (BIOS number + 0x0900) */
291#define VIDEO_FIRST_V7 0x0900
292
293# Setting of user mode (AX=mode ID) => CF=success
294
295# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
296# modes, we should probably compile in the video code from the boot
297# directory.
298.code16
299mode_set:
300 movw %ax, %bx
301 subb $VIDEO_FIRST_VESA>>8, %bh
302 cmpb $2, %bh
303 jb check_vesa
304
305setbad:
306 clc
307 ret
308
309check_vesa:
310 orw $0x4000, %bx # Use linear frame buffer
311 movw $0x4f02, %ax # VESA BIOS mode set call
312 int $0x10
313 cmpw $0x004f, %ax # AL=4f if implemented
314 jnz setbad # AH=0 if OK
315
316 stc
317 ret
318
319wakeup_stack_begin: # Stack grows down
320
321.org 0xff0
322wakeup_stack: # Just below end of page
323
324.org 0x1000
325ENTRY(wakeup_level4_pgt)
326 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
327 .fill 510,8,0
328 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
329 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
330
331ENTRY(wakeup_end)
332
333##
334# acpi_copy_wakeup_routine
335#
336# Copy the above routine to low memory.
337#
338# Parameters:
339# %rdi: place to copy wakeup routine to
340#
341# Returned address is location of code in low memory (past data and stack)
342#
343 .code64
344ENTRY(acpi_copy_wakeup_routine)
345 pushq %rax
346 pushq %rdx
347
348 movl saved_video_mode, %edx
349 movl %edx, video_mode - wakeup_start (,%rdi)
350 movl acpi_realmode_flags, %edx
351 movl %edx, realmode_flags - wakeup_start (,%rdi)
352 movq $0x12345678, real_magic - wakeup_start (,%rdi)
353 movq $0x123456789abcdef0, %rdx
354 movq %rdx, saved_magic
355
356 movq saved_magic, %rax
357 movq $0x123456789abcdef0, %rdx
358 cmpq %rdx, %rax
359 jne bogus_64_magic
360
361 # restore the regs we used
362 popq %rdx
363 popq %rax
364ENTRY(do_suspend_lowlevel_s4bios)
365 ret
366
367 .align 2
368 .p2align 4,,15
369.globl do_suspend_lowlevel
370 .type do_suspend_lowlevel,@function
371do_suspend_lowlevel:
372.LFB5:
373 subq $8, %rsp
374 xorl %eax, %eax
375 call save_processor_state
376
377 movq %rsp, saved_context_esp(%rip)
378 movq %rax, saved_context_eax(%rip)
379 movq %rbx, saved_context_ebx(%rip)
380 movq %rcx, saved_context_ecx(%rip)
381 movq %rdx, saved_context_edx(%rip)
382 movq %rbp, saved_context_ebp(%rip)
383 movq %rsi, saved_context_esi(%rip)
384 movq %rdi, saved_context_edi(%rip)
385 movq %r8, saved_context_r08(%rip)
386 movq %r9, saved_context_r09(%rip)
387 movq %r10, saved_context_r10(%rip)
388 movq %r11, saved_context_r11(%rip)
389 movq %r12, saved_context_r12(%rip)
390 movq %r13, saved_context_r13(%rip)
391 movq %r14, saved_context_r14(%rip)
392 movq %r15, saved_context_r15(%rip)
393 pushfq ; popq saved_context_eflags(%rip)
394
395 movq $.L97, saved_rip(%rip)
396
397 movq %rsp,saved_rsp
398 movq %rbp,saved_rbp
399 movq %rbx,saved_rbx
400 movq %rdi,saved_rdi
401 movq %rsi,saved_rsi
402
403 addq $8, %rsp
404 movl $3, %edi
405 xorl %eax, %eax
406 jmp acpi_enter_sleep_state
407.L97:
408 .p2align 4,,7
409.L99:
410 .align 4
411 movl $24, %eax
412 movw %ax, %ds
413 movq saved_context+58(%rip), %rax
414 movq %rax, %cr4
415 movq saved_context+50(%rip), %rax
416 movq %rax, %cr3
417 movq saved_context+42(%rip), %rax
418 movq %rax, %cr2
419 movq saved_context+34(%rip), %rax
420 movq %rax, %cr0
421 pushq saved_context_eflags(%rip) ; popfq
422 movq saved_context_esp(%rip), %rsp
423 movq saved_context_ebp(%rip), %rbp
424 movq saved_context_eax(%rip), %rax
425 movq saved_context_ebx(%rip), %rbx
426 movq saved_context_ecx(%rip), %rcx
427 movq saved_context_edx(%rip), %rdx
428 movq saved_context_esi(%rip), %rsi
429 movq saved_context_edi(%rip), %rdi
430 movq saved_context_r08(%rip), %r8
431 movq saved_context_r09(%rip), %r9
432 movq saved_context_r10(%rip), %r10
433 movq saved_context_r11(%rip), %r11
434 movq saved_context_r12(%rip), %r12
435 movq saved_context_r13(%rip), %r13
436 movq saved_context_r14(%rip), %r14
437 movq saved_context_r15(%rip), %r15
438
439 xorl %eax, %eax
440 addq $8, %rsp
441 jmp restore_processor_state
442.LFE5:
443.Lfe5:
444 .size do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
445
446.data
447ALIGN
448ENTRY(saved_rbp) .quad 0
449ENTRY(saved_rsi) .quad 0
450ENTRY(saved_rdi) .quad 0
451ENTRY(saved_rbx) .quad 0
452
453ENTRY(saved_rip) .quad 0
454ENTRY(saved_rsp) .quad 0
455
456ENTRY(saved_magic) .quad 0
diff --git a/arch/x86_64/kernel/cpufreq/Makefile b/arch/x86_64/kernel/cpufreq/Makefile
deleted file mode 100644
index 753ce1dd418e..000000000000
--- a/arch/x86_64/kernel/cpufreq/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
1#
2# Reuse the i386 cpufreq drivers
3#
4
5SRCDIR := ../../../i386/kernel/cpu/cpufreq
6
7obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o
8obj-$(CONFIG_X86_ACPI_CPUFREQ) += acpi-cpufreq.o
9obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO) += speedstep-centrino.o
10obj-$(CONFIG_X86_P4_CLOCKMOD) += p4-clockmod.o
11obj-$(CONFIG_X86_SPEEDSTEP_LIB) += speedstep-lib.o
12
13powernow-k8-objs := ${SRCDIR}/powernow-k8.o
14speedstep-centrino-objs := ${SRCDIR}/speedstep-centrino.o
15acpi-cpufreq-objs := ${SRCDIR}/acpi-cpufreq.o
16p4-clockmod-objs := ${SRCDIR}/p4-clockmod.o
17speedstep-lib-objs := ${SRCDIR}/speedstep-lib.o
diff --git a/arch/x86_64/kernel/syscall.c b/arch/x86_64/kernel/syscall.c
deleted file mode 100644
index 63d592c276cc..000000000000
--- a/arch/x86_64/kernel/syscall.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/* System call table for x86-64. */
2
3#include <linux/linkage.h>
4#include <linux/sys.h>
5#include <linux/cache.h>
6#include <asm/asm-offsets.h>
7
8#define __NO_STUBS
9
10#define __SYSCALL(nr, sym) extern asmlinkage void sym(void) ;
11#undef _ASM_X86_64_UNISTD_H_
12#include <asm-x86_64/unistd.h>
13
14#undef __SYSCALL
15#define __SYSCALL(nr, sym) [ nr ] = sym,
16#undef _ASM_X86_64_UNISTD_H_
17
18typedef void (*sys_call_ptr_t)(void);
19
20extern void sys_ni_syscall(void);
21
22const sys_call_ptr_t sys_call_table[__NR_syscall_max+1] = {
23 /* Smells like a like a compiler bug -- it doesn't work when the & below is removed. */
24 [0 ... __NR_syscall_max] = &sys_ni_syscall,
25#include <asm-x86_64/unistd.h>
26};
diff --git a/arch/x86_64/kernel/trampoline.S b/arch/x86_64/kernel/trampoline.S
deleted file mode 100644
index e7e2764c461b..000000000000
--- a/arch/x86_64/kernel/trampoline.S
+++ /dev/null
@@ -1,166 +0,0 @@
1/*
2 *
3 * Trampoline.S Derived from Setup.S by Linus Torvalds
4 *
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
6 * 15 Sept 2005 Eric Biederman: 64bit PIC support
7 *
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
11 * is a mystery.
12 *
13 * In fact we don't actually need a stack so we don't
14 * set one up.
15 *
16 * On entry to trampoline_data, the processor is in real mode
17 * with 16-bit addressing and 16-bit data. CS has some value
18 * and IP is zero. Thus, data addresses need to be absolute
19 * (no relocation) and are taken with regard to r_base.
20 *
21 * With the addition of trampoline_level4_pgt this code can
22 * now enter a 64bit kernel that lives at arbitrary 64bit
23 * physical addresses.
24 *
25 * If you work on this file, check the object module with objdump
26 * --full-contents --reloc to make sure there are no relocation
27 * entries.
28 */
29
30#include <linux/linkage.h>
31#include <asm/pgtable.h>
32#include <asm/page.h>
33#include <asm/msr.h>
34#include <asm/segment.h>
35
36.data
37
38.code16
39
40ENTRY(trampoline_data)
41r_base = .
42 cli # We should be safe anyway
43 wbinvd
44 mov %cs, %ax # Code and data in the same place
45 mov %ax, %ds
46 mov %ax, %es
47 mov %ax, %ss
48
49
50 movl $0xA5A5A5A5, trampoline_data - r_base
51 # write marker for master knows we're running
52
53 # Setup stack
54 movw $(trampoline_stack_end - r_base), %sp
55
56 call verify_cpu # Verify the cpu supports long mode
57 testl %eax, %eax # Check for return code
58 jnz no_longmode
59
60 mov %cs, %ax
61 movzx %ax, %esi # Find the 32bit trampoline location
62 shll $4, %esi
63
64 # Fixup the vectors
65 addl %esi, startup_32_vector - r_base
66 addl %esi, startup_64_vector - r_base
67 addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
68
69 /*
70 * GDT tables in non default location kernel can be beyond 16MB and
71 * lgdt will not be able to load the address as in real mode default
72 * operand size is 16bit. Use lgdtl instead to force operand size
73 * to 32 bit.
74 */
75
76 lidtl tidt - r_base # load idt with 0, 0
77 lgdtl tgdt - r_base # load gdt with whatever is appropriate
78
79 xor %ax, %ax
80 inc %ax # protected mode (PE) bit
81 lmsw %ax # into protected mode
82
83 # flush prefetch and jump to startup_32
84 ljmpl *(startup_32_vector - r_base)
85
86 .code32
87 .balign 4
88startup_32:
89 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
90 movl %eax, %ds
91
92 xorl %eax, %eax
93 btsl $5, %eax # Enable PAE mode
94 movl %eax, %cr4
95
96 # Setup trampoline 4 level pagetables
97 leal (trampoline_level4_pgt - r_base)(%esi), %eax
98 movl %eax, %cr3
99
100 movl $MSR_EFER, %ecx
101 movl $(1 << _EFER_LME), %eax # Enable Long Mode
102 xorl %edx, %edx
103 wrmsr
104
105 xorl %eax, %eax
106 btsl $31, %eax # Enable paging and in turn activate Long Mode
107 btsl $0, %eax # Enable protected mode
108 movl %eax, %cr0
109
110 /*
111 * At this point we're in long mode but in 32bit compatibility mode
112 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
113 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
114 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
115 */
116 ljmp *(startup_64_vector - r_base)(%esi)
117
118 .code64
119 .balign 4
120startup_64:
121 # Now jump into the kernel using virtual addresses
122 movq $secondary_startup_64, %rax
123 jmp *%rax
124
125 .code16
126no_longmode:
127 hlt
128 jmp no_longmode
129#include "verify_cpu.S"
130
131 # Careful these need to be in the same 64K segment as the above;
132tidt:
133 .word 0 # idt limit = 0
134 .word 0, 0 # idt base = 0L
135
136 # Duplicate the global descriptor table
137 # so the kernel can live anywhere
138 .balign 4
139tgdt:
140 .short tgdt_end - tgdt # gdt limit
141 .long tgdt - r_base
142 .short 0
143 .quad 0x00cf9b000000ffff # __KERNEL32_CS
144 .quad 0x00af9b000000ffff # __KERNEL_CS
145 .quad 0x00cf93000000ffff # __KERNEL_DS
146tgdt_end:
147
148 .balign 4
149startup_32_vector:
150 .long startup_32 - r_base
151 .word __KERNEL32_CS, 0
152
153 .balign 4
154startup_64_vector:
155 .long startup_64 - r_base
156 .word __KERNEL_CS, 0
157
158trampoline_stack:
159 .org 0x1000
160trampoline_stack_end:
161ENTRY(trampoline_level4_pgt)
162 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
163 .fill 510,8,0
164 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
165
166ENTRY(trampoline_end)
diff --git a/arch/x86_64/lib/Makefile b/arch/x86_64/lib/Makefile
deleted file mode 100644
index c94327178398..000000000000
--- a/arch/x86_64/lib/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
1#
2# Makefile for x86_64-specific library files.
3#
4
5CFLAGS_csum-partial.o := -funroll-loops
6
7obj-y := io.o iomap_copy.o
8obj-$(CONFIG_SMP) += msr-on-cpu.o
9
10lib-y := csum-partial.o csum-copy.o csum-wrappers.o delay.o \
11 usercopy.o getuser.o putuser.o \
12 thunk.o clear_page.o copy_page.o bitstr.o bitops.o
13lib-y += memcpy.o memmove.o memset.o copy_user.o rwlock.o copy_user_nocache.o
diff --git a/arch/x86_64/lib/msr-on-cpu.c b/arch/x86_64/lib/msr-on-cpu.c
deleted file mode 100644
index 47e0ec47c376..000000000000
--- a/arch/x86_64/lib/msr-on-cpu.c
+++ /dev/null
@@ -1 +0,0 @@
1#include "../../i386/lib/msr-on-cpu.c"
diff --git a/arch/x86_64/mm/Makefile b/arch/x86_64/mm/Makefile
deleted file mode 100644
index d25ac86fe27a..000000000000
--- a/arch/x86_64/mm/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the linux x86_64-specific parts of the memory manager.
3#
4
5obj-y := init.o fault.o ioremap.o extable.o pageattr.o mmap.o
6obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
7obj-$(CONFIG_NUMA) += numa.o
8obj-$(CONFIG_K8_NUMA) += k8topology.o
9obj-$(CONFIG_ACPI_NUMA) += srat.o
10
11hugetlbpage-y = ../../i386/mm/hugetlbpage.o
diff --git a/arch/x86_64/oprofile/Kconfig b/arch/x86_64/oprofile/Kconfig
deleted file mode 100644
index d8a84088471a..000000000000
--- a/arch/x86_64/oprofile/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
1config PROFILING
2 bool "Profiling support (EXPERIMENTAL)"
3 help
4 Say Y here to enable the extended profiling support mechanisms used
5 by profilers such as OProfile.
6
7
8config OPROFILE
9 tristate "OProfile system profiling (EXPERIMENTAL)"
10 depends on PROFILING
11 help
12 OProfile is a profiling system capable of profiling the
13 whole system, include the kernel, kernel modules, libraries,
14 and applications.
15
16 If unsure, say N.
17
diff --git a/arch/x86_64/oprofile/Makefile b/arch/x86_64/oprofile/Makefile
deleted file mode 100644
index 6be32683e1bc..000000000000
--- a/arch/x86_64/oprofile/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
1#
2# oprofile for x86-64.
3# Just reuse the one from i386.
4#
5
6obj-$(CONFIG_OPROFILE) += oprofile.o
7
8DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
9 oprof.o cpu_buffer.o buffer_sync.o \
10 event_buffer.o oprofile_files.o \
11 oprofilefs.o oprofile_stats.o \
12 timer_int.o )
13
14OPROFILE-y := init.o backtrace.o
15OPROFILE-$(CONFIG_X86_LOCAL_APIC) += nmi_int.o op_model_athlon.o op_model_p4.o \
16 op_model_ppro.o
17OPROFILE-$(CONFIG_X86_IO_APIC) += nmi_timer_int.o
18
19oprofile-y = $(DRIVER_OBJS) $(addprefix ../../i386/oprofile/, $(OPROFILE-y))
diff --git a/arch/x86_64/pci/Makefile b/arch/x86_64/pci/Makefile
deleted file mode 100644
index c9eddc8859c0..000000000000
--- a/arch/x86_64/pci/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
1#
2# Makefile for X86_64 specific PCI routines
3#
4# Reuse the i386 PCI subsystem
5#
6EXTRA_CFLAGS += -Iarch/i386/pci
7
8obj-y := i386.o
9obj-$(CONFIG_PCI_DIRECT)+= direct.o
10obj-y += fixup.o init.o
11obj-$(CONFIG_ACPI) += acpi.o
12obj-y += legacy.o irq.o common.o early.o
13# mmconfig has a 64bit special
14obj-$(CONFIG_PCI_MMCONFIG) += mmconfig.o direct.o mmconfig-shared.o
15
16obj-$(CONFIG_NUMA) += k8-bus.o
17
18direct-y += ../../i386/pci/direct.o
19acpi-y += ../../i386/pci/acpi.o
20legacy-y += ../../i386/pci/legacy.o
21irq-y += ../../i386/pci/irq.o
22common-y += ../../i386/pci/common.o
23fixup-y += ../../i386/pci/fixup.o
24i386-y += ../../i386/pci/i386.o
25init-y += ../../i386/pci/init.o
26early-y += ../../i386/pci/early.o
27mmconfig-shared-y += ../../i386/pci/mmconfig-shared.o
diff --git a/arch/x86_64/vdso/vdso.S b/arch/x86_64/vdso/vdso.S
deleted file mode 100644
index 92e80c1972a7..000000000000
--- a/arch/x86_64/vdso/vdso.S
+++ /dev/null
@@ -1,2 +0,0 @@
1 .section ".vdso","a"
2 .incbin "arch/x86_64/vdso/vdso.so"
diff --git a/block/Makefile b/block/Makefile
index 959feeb253be..3cfe7cebaa6a 100644
--- a/block/Makefile
+++ b/block/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_IOSCHED_DEADLINE) += deadline-iosched.o
11obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o 11obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o
12 12
13obj-$(CONFIG_BLK_DEV_IO_TRACE) += blktrace.o 13obj-$(CONFIG_BLK_DEV_IO_TRACE) += blktrace.o
14obj-$(CONFIG_COMPAT) += compat_ioctl.o
diff --git a/block/blktrace.c b/block/blktrace.c
index 20fa034ea4a2..775471ef84a5 100644
--- a/block/blktrace.c
+++ b/block/blktrace.c
@@ -312,33 +312,26 @@ static struct rchan_callbacks blk_relay_callbacks = {
312/* 312/*
313 * Setup everything required to start tracing 313 * Setup everything required to start tracing
314 */ 314 */
315static int blk_trace_setup(struct request_queue *q, struct block_device *bdev, 315int do_blk_trace_setup(struct request_queue *q, struct block_device *bdev,
316 char __user *arg) 316 struct blk_user_trace_setup *buts)
317{ 317{
318 struct blk_user_trace_setup buts;
319 struct blk_trace *old_bt, *bt = NULL; 318 struct blk_trace *old_bt, *bt = NULL;
320 struct dentry *dir = NULL; 319 struct dentry *dir = NULL;
321 char b[BDEVNAME_SIZE]; 320 char b[BDEVNAME_SIZE];
322 int ret, i; 321 int ret, i;
323 322
324 if (copy_from_user(&buts, arg, sizeof(buts))) 323 if (!buts->buf_size || !buts->buf_nr)
325 return -EFAULT;
326
327 if (!buts.buf_size || !buts.buf_nr)
328 return -EINVAL; 324 return -EINVAL;
329 325
330 strcpy(buts.name, bdevname(bdev, b)); 326 strcpy(buts->name, bdevname(bdev, b));
331 327
332 /* 328 /*
333 * some device names have larger paths - convert the slashes 329 * some device names have larger paths - convert the slashes
334 * to underscores for this to work as expected 330 * to underscores for this to work as expected
335 */ 331 */
336 for (i = 0; i < strlen(buts.name); i++) 332 for (i = 0; i < strlen(buts->name); i++)
337 if (buts.name[i] == '/') 333 if (buts->name[i] == '/')
338 buts.name[i] = '_'; 334 buts->name[i] = '_';
339
340 if (copy_to_user(arg, &buts, sizeof(buts)))
341 return -EFAULT;
342 335
343 ret = -ENOMEM; 336 ret = -ENOMEM;
344 bt = kzalloc(sizeof(*bt), GFP_KERNEL); 337 bt = kzalloc(sizeof(*bt), GFP_KERNEL);
@@ -350,7 +343,7 @@ static int blk_trace_setup(struct request_queue *q, struct block_device *bdev,
350 goto err; 343 goto err;
351 344
352 ret = -ENOENT; 345 ret = -ENOENT;
353 dir = blk_create_tree(buts.name); 346 dir = blk_create_tree(buts->name);
354 if (!dir) 347 if (!dir)
355 goto err; 348 goto err;
356 349
@@ -363,20 +356,21 @@ static int blk_trace_setup(struct request_queue *q, struct block_device *bdev,
363 if (!bt->dropped_file) 356 if (!bt->dropped_file)
364 goto err; 357 goto err;
365 358
366 bt->rchan = relay_open("trace", dir, buts.buf_size, buts.buf_nr, &blk_relay_callbacks, bt); 359 bt->rchan = relay_open("trace", dir, buts->buf_size,
360 buts->buf_nr, &blk_relay_callbacks, bt);
367 if (!bt->rchan) 361 if (!bt->rchan)
368 goto err; 362 goto err;
369 363
370 bt->act_mask = buts.act_mask; 364 bt->act_mask = buts->act_mask;
371 if (!bt->act_mask) 365 if (!bt->act_mask)
372 bt->act_mask = (u16) -1; 366 bt->act_mask = (u16) -1;
373 367
374 bt->start_lba = buts.start_lba; 368 bt->start_lba = buts->start_lba;
375 bt->end_lba = buts.end_lba; 369 bt->end_lba = buts->end_lba;
376 if (!bt->end_lba) 370 if (!bt->end_lba)
377 bt->end_lba = -1ULL; 371 bt->end_lba = -1ULL;
378 372
379 bt->pid = buts.pid; 373 bt->pid = buts->pid;
380 bt->trace_state = Blktrace_setup; 374 bt->trace_state = Blktrace_setup;
381 375
382 ret = -EBUSY; 376 ret = -EBUSY;
@@ -401,6 +395,26 @@ err:
401 return ret; 395 return ret;
402} 396}
403 397
398static int blk_trace_setup(struct request_queue *q, struct block_device *bdev,
399 char __user *arg)
400{
401 struct blk_user_trace_setup buts;
402 int ret;
403
404 ret = copy_from_user(&buts, arg, sizeof(buts));
405 if (ret)
406 return -EFAULT;
407
408 ret = do_blk_trace_setup(q, bdev, &buts);
409 if (ret)
410 return ret;
411
412 if (copy_to_user(arg, &buts, sizeof(buts)))
413 return -EFAULT;
414
415 return 0;
416}
417
404static int blk_trace_startstop(struct request_queue *q, int start) 418static int blk_trace_startstop(struct request_queue *q, int start)
405{ 419{
406 struct blk_trace *bt; 420 struct blk_trace *bt;
diff --git a/block/compat_ioctl.c b/block/compat_ioctl.c
new file mode 100644
index 000000000000..f84093b97f70
--- /dev/null
+++ b/block/compat_ioctl.c
@@ -0,0 +1,814 @@
1#include <linux/blkdev.h>
2#include <linux/blkpg.h>
3#include <linux/blktrace_api.h>
4#include <linux/cdrom.h>
5#include <linux/compat.h>
6#include <linux/elevator.h>
7#include <linux/fd.h>
8#include <linux/hdreg.h>
9#include <linux/syscalls.h>
10#include <linux/smp_lock.h>
11#include <linux/types.h>
12#include <linux/uaccess.h>
13
14static int compat_put_ushort(unsigned long arg, unsigned short val)
15{
16 return put_user(val, (unsigned short __user *)compat_ptr(arg));
17}
18
19static int compat_put_int(unsigned long arg, int val)
20{
21 return put_user(val, (compat_int_t __user *)compat_ptr(arg));
22}
23
24static int compat_put_long(unsigned long arg, long val)
25{
26 return put_user(val, (compat_long_t __user *)compat_ptr(arg));
27}
28
29static int compat_put_ulong(unsigned long arg, compat_ulong_t val)
30{
31 return put_user(val, (compat_ulong_t __user *)compat_ptr(arg));
32}
33
34static int compat_put_u64(unsigned long arg, u64 val)
35{
36 return put_user(val, (compat_u64 __user *)compat_ptr(arg));
37}
38
39struct compat_hd_geometry {
40 unsigned char heads;
41 unsigned char sectors;
42 unsigned short cylinders;
43 u32 start;
44};
45
46static int compat_hdio_getgeo(struct gendisk *disk, struct block_device *bdev,
47 struct compat_hd_geometry __user *ugeo)
48{
49 struct hd_geometry geo;
50 int ret;
51
52 if (!ugeo)
53 return -EINVAL;
54 if (!disk->fops->getgeo)
55 return -ENOTTY;
56
57 /*
58 * We need to set the startsect first, the driver may
59 * want to override it.
60 */
61 geo.start = get_start_sect(bdev);
62 ret = disk->fops->getgeo(bdev, &geo);
63 if (ret)
64 return ret;
65
66 ret = copy_to_user(ugeo, &geo, 4);
67 ret |= __put_user(geo.start, &ugeo->start);
68 if (ret)
69 ret = -EFAULT;
70
71 return ret;
72}
73
74static int compat_hdio_ioctl(struct inode *inode, struct file *file,
75 struct gendisk *disk, unsigned int cmd, unsigned long arg)
76{
77 mm_segment_t old_fs = get_fs();
78 unsigned long kval;
79 unsigned int __user *uvp;
80 int error;
81
82 set_fs(KERNEL_DS);
83 error = blkdev_driver_ioctl(inode, file, disk,
84 cmd, (unsigned long)(&kval));
85 set_fs(old_fs);
86
87 if (error == 0) {
88 uvp = compat_ptr(arg);
89 if (put_user(kval, uvp))
90 error = -EFAULT;
91 }
92 return error;
93}
94
95struct compat_cdrom_read_audio {
96 union cdrom_addr addr;
97 u8 addr_format;
98 compat_int_t nframes;
99 compat_caddr_t buf;
100};
101
102struct compat_cdrom_generic_command {
103 unsigned char cmd[CDROM_PACKET_SIZE];
104 compat_caddr_t buffer;
105 compat_uint_t buflen;
106 compat_int_t stat;
107 compat_caddr_t sense;
108 unsigned char data_direction;
109 compat_int_t quiet;
110 compat_int_t timeout;
111 compat_caddr_t reserved[1];
112};
113
114static int compat_cdrom_read_audio(struct inode *inode, struct file *file,
115 struct gendisk *disk, unsigned int cmd, unsigned long arg)
116{
117 struct cdrom_read_audio __user *cdread_audio;
118 struct compat_cdrom_read_audio __user *cdread_audio32;
119 __u32 data;
120 void __user *datap;
121
122 cdread_audio = compat_alloc_user_space(sizeof(*cdread_audio));
123 cdread_audio32 = compat_ptr(arg);
124
125 if (copy_in_user(&cdread_audio->addr,
126 &cdread_audio32->addr,
127 (sizeof(*cdread_audio32) -
128 sizeof(compat_caddr_t))))
129 return -EFAULT;
130
131 if (get_user(data, &cdread_audio32->buf))
132 return -EFAULT;
133 datap = compat_ptr(data);
134 if (put_user(datap, &cdread_audio->buf))
135 return -EFAULT;
136
137 return blkdev_driver_ioctl(inode, file, disk, cmd,
138 (unsigned long)cdread_audio);
139}
140
141static int compat_cdrom_generic_command(struct inode *inode, struct file *file,
142 struct gendisk *disk, unsigned int cmd, unsigned long arg)
143{
144 struct cdrom_generic_command __user *cgc;
145 struct compat_cdrom_generic_command __user *cgc32;
146 u32 data;
147 unsigned char dir;
148 int itmp;
149
150 cgc = compat_alloc_user_space(sizeof(*cgc));
151 cgc32 = compat_ptr(arg);
152
153 if (copy_in_user(&cgc->cmd, &cgc32->cmd, sizeof(cgc->cmd)) ||
154 get_user(data, &cgc32->buffer) ||
155 put_user(compat_ptr(data), &cgc->buffer) ||
156 copy_in_user(&cgc->buflen, &cgc32->buflen,
157 (sizeof(unsigned int) + sizeof(int))) ||
158 get_user(data, &cgc32->sense) ||
159 put_user(compat_ptr(data), &cgc->sense) ||
160 get_user(dir, &cgc32->data_direction) ||
161 put_user(dir, &cgc->data_direction) ||
162 get_user(itmp, &cgc32->quiet) ||
163 put_user(itmp, &cgc->quiet) ||
164 get_user(itmp, &cgc32->timeout) ||
165 put_user(itmp, &cgc->timeout) ||
166 get_user(data, &cgc32->reserved[0]) ||
167 put_user(compat_ptr(data), &cgc->reserved[0]))
168 return -EFAULT;
169
170 return blkdev_driver_ioctl(inode, file, disk, cmd, (unsigned long)cgc);
171}
172
173struct compat_blkpg_ioctl_arg {
174 compat_int_t op;
175 compat_int_t flags;
176 compat_int_t datalen;
177 compat_caddr_t data;
178};
179
180static int compat_blkpg_ioctl(struct inode *inode, struct file *file,
181 unsigned int cmd, struct compat_blkpg_ioctl_arg __user *ua32)
182{
183 struct blkpg_ioctl_arg __user *a = compat_alloc_user_space(sizeof(*a));
184 compat_caddr_t udata;
185 compat_int_t n;
186 int err;
187
188 err = get_user(n, &ua32->op);
189 err |= put_user(n, &a->op);
190 err |= get_user(n, &ua32->flags);
191 err |= put_user(n, &a->flags);
192 err |= get_user(n, &ua32->datalen);
193 err |= put_user(n, &a->datalen);
194 err |= get_user(udata, &ua32->data);
195 err |= put_user(compat_ptr(udata), &a->data);
196 if (err)
197 return err;
198
199 return blkdev_ioctl(inode, file, cmd, (unsigned long)a);
200}
201
202#define BLKBSZGET_32 _IOR(0x12, 112, int)
203#define BLKBSZSET_32 _IOW(0x12, 113, int)
204#define BLKGETSIZE64_32 _IOR(0x12, 114, int)
205
206struct compat_floppy_struct {
207 compat_uint_t size;
208 compat_uint_t sect;
209 compat_uint_t head;
210 compat_uint_t track;
211 compat_uint_t stretch;
212 unsigned char gap;
213 unsigned char rate;
214 unsigned char spec1;
215 unsigned char fmt_gap;
216 const compat_caddr_t name;
217};
218
219struct compat_floppy_drive_params {
220 char cmos;
221 compat_ulong_t max_dtr;
222 compat_ulong_t hlt;
223 compat_ulong_t hut;
224 compat_ulong_t srt;
225 compat_ulong_t spinup;
226 compat_ulong_t spindown;
227 unsigned char spindown_offset;
228 unsigned char select_delay;
229 unsigned char rps;
230 unsigned char tracks;
231 compat_ulong_t timeout;
232 unsigned char interleave_sect;
233 struct floppy_max_errors max_errors;
234 char flags;
235 char read_track;
236 short autodetect[8];
237 compat_int_t checkfreq;
238 compat_int_t native_format;
239};
240
241struct compat_floppy_drive_struct {
242 signed char flags;
243 compat_ulong_t spinup_date;
244 compat_ulong_t select_date;
245 compat_ulong_t first_read_date;
246 short probed_format;
247 short track;
248 short maxblock;
249 short maxtrack;
250 compat_int_t generation;
251 compat_int_t keep_data;
252 compat_int_t fd_ref;
253 compat_int_t fd_device;
254 compat_int_t last_checked;
255 compat_caddr_t dmabuf;
256 compat_int_t bufblocks;
257};
258
259struct compat_floppy_fdc_state {
260 compat_int_t spec1;
261 compat_int_t spec2;
262 compat_int_t dtr;
263 unsigned char version;
264 unsigned char dor;
265 compat_ulong_t address;
266 unsigned int rawcmd:2;
267 unsigned int reset:1;
268 unsigned int need_configure:1;
269 unsigned int perp_mode:2;
270 unsigned int has_fifo:1;
271 unsigned int driver_version;
272 unsigned char track[4];
273};
274
275struct compat_floppy_write_errors {
276 unsigned int write_errors;
277 compat_ulong_t first_error_sector;
278 compat_int_t first_error_generation;
279 compat_ulong_t last_error_sector;
280 compat_int_t last_error_generation;
281 compat_uint_t badness;
282};
283
284#define FDSETPRM32 _IOW(2, 0x42, struct compat_floppy_struct)
285#define FDDEFPRM32 _IOW(2, 0x43, struct compat_floppy_struct)
286#define FDGETPRM32 _IOR(2, 0x04, struct compat_floppy_struct)
287#define FDSETDRVPRM32 _IOW(2, 0x90, struct compat_floppy_drive_params)
288#define FDGETDRVPRM32 _IOR(2, 0x11, struct compat_floppy_drive_params)
289#define FDGETDRVSTAT32 _IOR(2, 0x12, struct compat_floppy_drive_struct)
290#define FDPOLLDRVSTAT32 _IOR(2, 0x13, struct compat_floppy_drive_struct)
291#define FDGETFDCSTAT32 _IOR(2, 0x15, struct compat_floppy_fdc_state)
292#define FDWERRORGET32 _IOR(2, 0x17, struct compat_floppy_write_errors)
293
294static struct {
295 unsigned int cmd32;
296 unsigned int cmd;
297} fd_ioctl_trans_table[] = {
298 { FDSETPRM32, FDSETPRM },
299 { FDDEFPRM32, FDDEFPRM },
300 { FDGETPRM32, FDGETPRM },
301 { FDSETDRVPRM32, FDSETDRVPRM },
302 { FDGETDRVPRM32, FDGETDRVPRM },
303 { FDGETDRVSTAT32, FDGETDRVSTAT },
304 { FDPOLLDRVSTAT32, FDPOLLDRVSTAT },
305 { FDGETFDCSTAT32, FDGETFDCSTAT },
306 { FDWERRORGET32, FDWERRORGET }
307};
308
309#define NR_FD_IOCTL_TRANS ARRAY_SIZE(fd_ioctl_trans_table)
310
311static int compat_fd_ioctl(struct inode *inode, struct file *file,
312 struct gendisk *disk, unsigned int cmd, unsigned long arg)
313{
314 mm_segment_t old_fs = get_fs();
315 void *karg = NULL;
316 unsigned int kcmd = 0;
317 int i, err;
318
319 for (i = 0; i < NR_FD_IOCTL_TRANS; i++)
320 if (cmd == fd_ioctl_trans_table[i].cmd32) {
321 kcmd = fd_ioctl_trans_table[i].cmd;
322 break;
323 }
324 if (!kcmd)
325 return -EINVAL;
326
327 switch (cmd) {
328 case FDSETPRM32:
329 case FDDEFPRM32:
330 case FDGETPRM32:
331 {
332 compat_uptr_t name;
333 struct compat_floppy_struct __user *uf;
334 struct floppy_struct *f;
335
336 uf = compat_ptr(arg);
337 f = karg = kmalloc(sizeof(struct floppy_struct), GFP_KERNEL);
338 if (!karg)
339 return -ENOMEM;
340 if (cmd == FDGETPRM32)
341 break;
342 err = __get_user(f->size, &uf->size);
343 err |= __get_user(f->sect, &uf->sect);
344 err |= __get_user(f->head, &uf->head);
345 err |= __get_user(f->track, &uf->track);
346 err |= __get_user(f->stretch, &uf->stretch);
347 err |= __get_user(f->gap, &uf->gap);
348 err |= __get_user(f->rate, &uf->rate);
349 err |= __get_user(f->spec1, &uf->spec1);
350 err |= __get_user(f->fmt_gap, &uf->fmt_gap);
351 err |= __get_user(name, &uf->name);
352 f->name = compat_ptr(name);
353 if (err) {
354 err = -EFAULT;
355 goto out;
356 }
357 break;
358 }
359 case FDSETDRVPRM32:
360 case FDGETDRVPRM32:
361 {
362 struct compat_floppy_drive_params __user *uf;
363 struct floppy_drive_params *f;
364
365 uf = compat_ptr(arg);
366 f = karg = kmalloc(sizeof(struct floppy_drive_params), GFP_KERNEL);
367 if (!karg)
368 return -ENOMEM;
369 if (cmd == FDGETDRVPRM32)
370 break;
371 err = __get_user(f->cmos, &uf->cmos);
372 err |= __get_user(f->max_dtr, &uf->max_dtr);
373 err |= __get_user(f->hlt, &uf->hlt);
374 err |= __get_user(f->hut, &uf->hut);
375 err |= __get_user(f->srt, &uf->srt);
376 err |= __get_user(f->spinup, &uf->spinup);
377 err |= __get_user(f->spindown, &uf->spindown);
378 err |= __get_user(f->spindown_offset, &uf->spindown_offset);
379 err |= __get_user(f->select_delay, &uf->select_delay);
380 err |= __get_user(f->rps, &uf->rps);
381 err |= __get_user(f->tracks, &uf->tracks);
382 err |= __get_user(f->timeout, &uf->timeout);
383 err |= __get_user(f->interleave_sect, &uf->interleave_sect);
384 err |= __copy_from_user(&f->max_errors, &uf->max_errors, sizeof(f->max_errors));
385 err |= __get_user(f->flags, &uf->flags);
386 err |= __get_user(f->read_track, &uf->read_track);
387 err |= __copy_from_user(f->autodetect, uf->autodetect, sizeof(f->autodetect));
388 err |= __get_user(f->checkfreq, &uf->checkfreq);
389 err |= __get_user(f->native_format, &uf->native_format);
390 if (err) {
391 err = -EFAULT;
392 goto out;
393 }
394 break;
395 }
396 case FDGETDRVSTAT32:
397 case FDPOLLDRVSTAT32:
398 karg = kmalloc(sizeof(struct floppy_drive_struct), GFP_KERNEL);
399 if (!karg)
400 return -ENOMEM;
401 break;
402 case FDGETFDCSTAT32:
403 karg = kmalloc(sizeof(struct floppy_fdc_state), GFP_KERNEL);
404 if (!karg)
405 return -ENOMEM;
406 break;
407 case FDWERRORGET32:
408 karg = kmalloc(sizeof(struct floppy_write_errors), GFP_KERNEL);
409 if (!karg)
410 return -ENOMEM;
411 break;
412 default:
413 return -EINVAL;
414 }
415 set_fs(KERNEL_DS);
416 err = blkdev_driver_ioctl(inode, file, disk, kcmd, (unsigned long)karg);
417 set_fs(old_fs);
418 if (err)
419 goto out;
420 switch (cmd) {
421 case FDGETPRM32:
422 {
423 struct floppy_struct *f = karg;
424 struct compat_floppy_struct __user *uf = compat_ptr(arg);
425
426 err = __put_user(f->size, &uf->size);
427 err |= __put_user(f->sect, &uf->sect);
428 err |= __put_user(f->head, &uf->head);
429 err |= __put_user(f->track, &uf->track);
430 err |= __put_user(f->stretch, &uf->stretch);
431 err |= __put_user(f->gap, &uf->gap);
432 err |= __put_user(f->rate, &uf->rate);
433 err |= __put_user(f->spec1, &uf->spec1);
434 err |= __put_user(f->fmt_gap, &uf->fmt_gap);
435 err |= __put_user((u64)f->name, (compat_caddr_t __user *)&uf->name);
436 break;
437 }
438 case FDGETDRVPRM32:
439 {
440 struct compat_floppy_drive_params __user *uf;
441 struct floppy_drive_params *f = karg;
442
443 uf = compat_ptr(arg);
444 err = __put_user(f->cmos, &uf->cmos);
445 err |= __put_user(f->max_dtr, &uf->max_dtr);
446 err |= __put_user(f->hlt, &uf->hlt);
447 err |= __put_user(f->hut, &uf->hut);
448 err |= __put_user(f->srt, &uf->srt);
449 err |= __put_user(f->spinup, &uf->spinup);
450 err |= __put_user(f->spindown, &uf->spindown);
451 err |= __put_user(f->spindown_offset, &uf->spindown_offset);
452 err |= __put_user(f->select_delay, &uf->select_delay);
453 err |= __put_user(f->rps, &uf->rps);
454 err |= __put_user(f->tracks, &uf->tracks);
455 err |= __put_user(f->timeout, &uf->timeout);
456 err |= __put_user(f->interleave_sect, &uf->interleave_sect);
457 err |= __copy_to_user(&uf->max_errors, &f->max_errors, sizeof(f->max_errors));
458 err |= __put_user(f->flags, &uf->flags);
459 err |= __put_user(f->read_track, &uf->read_track);
460 err |= __copy_to_user(uf->autodetect, f->autodetect, sizeof(f->autodetect));
461 err |= __put_user(f->checkfreq, &uf->checkfreq);
462 err |= __put_user(f->native_format, &uf->native_format);
463 break;
464 }
465 case FDGETDRVSTAT32:
466 case FDPOLLDRVSTAT32:
467 {
468 struct compat_floppy_drive_struct __user *uf;
469 struct floppy_drive_struct *f = karg;
470
471 uf = compat_ptr(arg);
472 err = __put_user(f->flags, &uf->flags);
473 err |= __put_user(f->spinup_date, &uf->spinup_date);
474 err |= __put_user(f->select_date, &uf->select_date);
475 err |= __put_user(f->first_read_date, &uf->first_read_date);
476 err |= __put_user(f->probed_format, &uf->probed_format);
477 err |= __put_user(f->track, &uf->track);
478 err |= __put_user(f->maxblock, &uf->maxblock);
479 err |= __put_user(f->maxtrack, &uf->maxtrack);
480 err |= __put_user(f->generation, &uf->generation);
481 err |= __put_user(f->keep_data, &uf->keep_data);
482 err |= __put_user(f->fd_ref, &uf->fd_ref);
483 err |= __put_user(f->fd_device, &uf->fd_device);
484 err |= __put_user(f->last_checked, &uf->last_checked);
485 err |= __put_user((u64)f->dmabuf, &uf->dmabuf);
486 err |= __put_user((u64)f->bufblocks, &uf->bufblocks);
487 break;
488 }
489 case FDGETFDCSTAT32:
490 {
491 struct compat_floppy_fdc_state __user *uf;
492 struct floppy_fdc_state *f = karg;
493
494 uf = compat_ptr(arg);
495 err = __put_user(f->spec1, &uf->spec1);
496 err |= __put_user(f->spec2, &uf->spec2);
497 err |= __put_user(f->dtr, &uf->dtr);
498 err |= __put_user(f->version, &uf->version);
499 err |= __put_user(f->dor, &uf->dor);
500 err |= __put_user(f->address, &uf->address);
501 err |= __copy_to_user((char __user *)&uf->address + sizeof(uf->address),
502 (char *)&f->address + sizeof(f->address), sizeof(int));
503 err |= __put_user(f->driver_version, &uf->driver_version);
504 err |= __copy_to_user(uf->track, f->track, sizeof(f->track));
505 break;
506 }
507 case FDWERRORGET32:
508 {
509 struct compat_floppy_write_errors __user *uf;
510 struct floppy_write_errors *f = karg;
511
512 uf = compat_ptr(arg);
513 err = __put_user(f->write_errors, &uf->write_errors);
514 err |= __put_user(f->first_error_sector, &uf->first_error_sector);
515 err |= __put_user(f->first_error_generation, &uf->first_error_generation);
516 err |= __put_user(f->last_error_sector, &uf->last_error_sector);
517 err |= __put_user(f->last_error_generation, &uf->last_error_generation);
518 err |= __put_user(f->badness, &uf->badness);
519 break;
520 }
521 default:
522 break;
523 }
524 if (err)
525 err = -EFAULT;
526
527out:
528 kfree(karg);
529 return err;
530}
531
532struct compat_blk_user_trace_setup {
533 char name[32];
534 u16 act_mask;
535 u32 buf_size;
536 u32 buf_nr;
537 compat_u64 start_lba;
538 compat_u64 end_lba;
539 u32 pid;
540};
541#define BLKTRACESETUP32 _IOWR(0x12, 115, struct compat_blk_user_trace_setup)
542
543static int compat_blk_trace_setup(struct block_device *bdev, char __user *arg)
544{
545 struct blk_user_trace_setup buts;
546 struct compat_blk_user_trace_setup cbuts;
547 struct request_queue *q;
548 int ret;
549
550 q = bdev_get_queue(bdev);
551 if (!q)
552 return -ENXIO;
553
554 if (copy_from_user(&cbuts, arg, sizeof(cbuts)))
555 return -EFAULT;
556
557 buts = (struct blk_user_trace_setup) {
558 .act_mask = cbuts.act_mask,
559 .buf_size = cbuts.buf_size,
560 .buf_nr = cbuts.buf_nr,
561 .start_lba = cbuts.start_lba,
562 .end_lba = cbuts.end_lba,
563 .pid = cbuts.pid,
564 };
565 memcpy(&buts.name, &cbuts.name, 32);
566
567 mutex_lock(&bdev->bd_mutex);
568 ret = do_blk_trace_setup(q, bdev, &buts);
569 mutex_unlock(&bdev->bd_mutex);
570 if (ret)
571 return ret;
572
573 if (copy_to_user(arg, &buts.name, 32))
574 return -EFAULT;
575
576 return 0;
577}
578
579static int compat_blkdev_driver_ioctl(struct inode *inode, struct file *file,
580 struct gendisk *disk, unsigned cmd, unsigned long arg)
581{
582 int ret;
583
584 switch (arg) {
585 case HDIO_GET_UNMASKINTR:
586 case HDIO_GET_MULTCOUNT:
587 case HDIO_GET_KEEPSETTINGS:
588 case HDIO_GET_32BIT:
589 case HDIO_GET_NOWERR:
590 case HDIO_GET_DMA:
591 case HDIO_GET_NICE:
592 case HDIO_GET_WCACHE:
593 case HDIO_GET_ACOUSTIC:
594 case HDIO_GET_ADDRESS:
595 case HDIO_GET_BUSSTATE:
596 return compat_hdio_ioctl(inode, file, disk, cmd, arg);
597 case FDSETPRM32:
598 case FDDEFPRM32:
599 case FDGETPRM32:
600 case FDSETDRVPRM32:
601 case FDGETDRVPRM32:
602 case FDGETDRVSTAT32:
603 case FDPOLLDRVSTAT32:
604 case FDGETFDCSTAT32:
605 case FDWERRORGET32:
606 return compat_fd_ioctl(inode, file, disk, cmd, arg);
607 case CDROMREADAUDIO:
608 return compat_cdrom_read_audio(inode, file, disk, cmd, arg);
609 case CDROM_SEND_PACKET:
610 return compat_cdrom_generic_command(inode, file, disk, cmd, arg);
611
612 /*
613 * No handler required for the ones below, we just need to
614 * convert arg to a 64 bit pointer.
615 */
616 case BLKSECTSET:
617 /*
618 * 0x03 -- HD/IDE ioctl's used by hdparm and friends.
619 * Some need translations, these do not.
620 */
621 case HDIO_GET_IDENTITY:
622 case HDIO_DRIVE_TASK:
623 case HDIO_DRIVE_CMD:
624 case HDIO_SCAN_HWIF:
625 /* 0x330 is reserved -- it used to be HDIO_GETGEO_BIG */
626 case 0x330:
627 /* 0x02 -- Floppy ioctls */
628 case FDMSGON:
629 case FDMSGOFF:
630 case FDSETEMSGTRESH:
631 case FDFLUSH:
632 case FDWERRORCLR:
633 case FDSETMAXERRS:
634 case FDGETMAXERRS:
635 case FDGETDRVTYP:
636 case FDEJECT:
637 case FDCLRPRM:
638 case FDFMTBEG:
639 case FDFMTEND:
640 case FDRESET:
641 case FDTWADDLE:
642 case FDFMTTRK:
643 case FDRAWCMD:
644 /* CDROM stuff */
645 case CDROMPAUSE:
646 case CDROMRESUME:
647 case CDROMPLAYMSF:
648 case CDROMPLAYTRKIND:
649 case CDROMREADTOCHDR:
650 case CDROMREADTOCENTRY:
651 case CDROMSTOP:
652 case CDROMSTART:
653 case CDROMEJECT:
654 case CDROMVOLCTRL:
655 case CDROMSUBCHNL:
656 case CDROMMULTISESSION:
657 case CDROM_GET_MCN:
658 case CDROMRESET:
659 case CDROMVOLREAD:
660 case CDROMSEEK:
661 case CDROMPLAYBLK:
662 case CDROMCLOSETRAY:
663 case CDROM_DISC_STATUS:
664 case CDROM_CHANGER_NSLOTS:
665 case CDROM_GET_CAPABILITY:
666 /* Ignore cdrom.h about these next 5 ioctls, they absolutely do
667 * not take a struct cdrom_read, instead they take a struct cdrom_msf
668 * which is compatible.
669 */
670 case CDROMREADMODE2:
671 case CDROMREADMODE1:
672 case CDROMREADRAW:
673 case CDROMREADCOOKED:
674 case CDROMREADALL:
675 /* DVD ioctls */
676 case DVD_READ_STRUCT:
677 case DVD_WRITE_STRUCT:
678 case DVD_AUTH:
679 arg = (unsigned long)compat_ptr(arg);
680 /* These intepret arg as an unsigned long, not as a pointer,
681 * so we must not do compat_ptr() conversion. */
682 case HDIO_SET_MULTCOUNT:
683 case HDIO_SET_UNMASKINTR:
684 case HDIO_SET_KEEPSETTINGS:
685 case HDIO_SET_32BIT:
686 case HDIO_SET_NOWERR:
687 case HDIO_SET_DMA:
688 case HDIO_SET_PIO_MODE:
689 case HDIO_SET_NICE:
690 case HDIO_SET_WCACHE:
691 case HDIO_SET_ACOUSTIC:
692 case HDIO_SET_BUSSTATE:
693 case HDIO_SET_ADDRESS:
694 case CDROMEJECT_SW:
695 case CDROM_SET_OPTIONS:
696 case CDROM_CLEAR_OPTIONS:
697 case CDROM_SELECT_SPEED:
698 case CDROM_SELECT_DISC:
699 case CDROM_MEDIA_CHANGED:
700 case CDROM_DRIVE_STATUS:
701 case CDROM_LOCKDOOR:
702 case CDROM_DEBUG:
703 break;
704 default:
705 /* unknown ioctl number */
706 return -ENOIOCTLCMD;
707 }
708
709 if (disk->fops->unlocked_ioctl)
710 return disk->fops->unlocked_ioctl(file, cmd, arg);
711
712 if (disk->fops->ioctl) {
713 lock_kernel();
714 ret = disk->fops->ioctl(inode, file, cmd, arg);
715 unlock_kernel();
716 return ret;
717 }
718
719 return -ENOTTY;
720}
721
722static int compat_blkdev_locked_ioctl(struct inode *inode, struct file *file,
723 struct block_device *bdev,
724 unsigned cmd, unsigned long arg)
725{
726 struct backing_dev_info *bdi;
727
728 switch (cmd) {
729 case BLKRAGET:
730 case BLKFRAGET:
731 if (!arg)
732 return -EINVAL;
733 bdi = blk_get_backing_dev_info(bdev);
734 if (bdi == NULL)
735 return -ENOTTY;
736 return compat_put_long(arg,
737 (bdi->ra_pages * PAGE_CACHE_SIZE) / 512);
738 case BLKROGET: /* compatible */
739 return compat_put_int(arg, bdev_read_only(bdev) != 0);
740 case BLKBSZGET_32: /* get the logical block size (cf. BLKSSZGET) */
741 return compat_put_int(arg, block_size(bdev));
742 case BLKSSZGET: /* get block device hardware sector size */
743 return compat_put_int(arg, bdev_hardsect_size(bdev));
744 case BLKSECTGET:
745 return compat_put_ushort(arg,
746 bdev_get_queue(bdev)->max_sectors);
747 case BLKRASET: /* compatible, but no compat_ptr (!) */
748 case BLKFRASET:
749 if (!capable(CAP_SYS_ADMIN))
750 return -EACCES;
751 bdi = blk_get_backing_dev_info(bdev);
752 if (bdi == NULL)
753 return -ENOTTY;
754 bdi->ra_pages = (arg * 512) / PAGE_CACHE_SIZE;
755 return 0;
756 case BLKGETSIZE:
757 if ((bdev->bd_inode->i_size >> 9) > ~0UL)
758 return -EFBIG;
759 return compat_put_ulong(arg, bdev->bd_inode->i_size >> 9);
760
761 case BLKGETSIZE64_32:
762 return compat_put_u64(arg, bdev->bd_inode->i_size);
763
764 case BLKTRACESETUP32:
765 return compat_blk_trace_setup(bdev, compat_ptr(arg));
766 case BLKTRACESTART: /* compatible */
767 case BLKTRACESTOP: /* compatible */
768 case BLKTRACETEARDOWN: /* compatible */
769 return blk_trace_ioctl(bdev, cmd, compat_ptr(arg));
770 }
771 return -ENOIOCTLCMD;
772}
773
774/* Most of the generic ioctls are handled in the normal fallback path.
775 This assumes the blkdev's low level compat_ioctl always returns
776 ENOIOCTLCMD for unknown ioctls. */
777long compat_blkdev_ioctl(struct file *file, unsigned cmd, unsigned long arg)
778{
779 int ret = -ENOIOCTLCMD;
780 struct inode *inode = file->f_mapping->host;
781 struct block_device *bdev = inode->i_bdev;
782 struct gendisk *disk = bdev->bd_disk;
783
784 switch (cmd) {
785 case HDIO_GETGEO:
786 return compat_hdio_getgeo(disk, bdev, compat_ptr(arg));
787 case BLKFLSBUF:
788 case BLKROSET:
789 /*
790 * the ones below are implemented in blkdev_locked_ioctl,
791 * but we call blkdev_ioctl, which gets the lock for us
792 */
793 case BLKRRPART:
794 return blkdev_ioctl(inode, file, cmd,
795 (unsigned long)compat_ptr(arg));
796 case BLKBSZSET_32:
797 return blkdev_ioctl(inode, file, BLKBSZSET,
798 (unsigned long)compat_ptr(arg));
799 case BLKPG:
800 return compat_blkpg_ioctl(inode, file, cmd, compat_ptr(arg));
801 }
802
803 lock_kernel();
804 ret = compat_blkdev_locked_ioctl(inode, file, bdev, cmd, arg);
805 /* FIXME: why do we assume -> compat_ioctl needs the BKL? */
806 if (ret == -ENOIOCTLCMD && disk->fops->compat_ioctl)
807 ret = disk->fops->compat_ioctl(file, cmd, arg);
808 unlock_kernel();
809
810 if (ret != -ENOIOCTLCMD)
811 return ret;
812
813 return compat_blkdev_driver_ioctl(inode, file, disk, cmd, arg);
814}
diff --git a/block/ioctl.c b/block/ioctl.c
index f7e3e8abf887..52d6385216ad 100644
--- a/block/ioctl.c
+++ b/block/ioctl.c
@@ -217,6 +217,10 @@ int blkdev_driver_ioctl(struct inode *inode, struct file *file,
217} 217}
218EXPORT_SYMBOL_GPL(blkdev_driver_ioctl); 218EXPORT_SYMBOL_GPL(blkdev_driver_ioctl);
219 219
220/*
221 * always keep this in sync with compat_blkdev_ioctl() and
222 * compat_blkdev_locked_ioctl()
223 */
220int blkdev_ioctl(struct inode *inode, struct file *file, unsigned cmd, 224int blkdev_ioctl(struct inode *inode, struct file *file, unsigned cmd,
221 unsigned long arg) 225 unsigned long arg)
222{ 226{
@@ -284,21 +288,4 @@ int blkdev_ioctl(struct inode *inode, struct file *file, unsigned cmd,
284 288
285 return blkdev_driver_ioctl(inode, file, disk, cmd, arg); 289 return blkdev_driver_ioctl(inode, file, disk, cmd, arg);
286} 290}
287
288/* Most of the generic ioctls are handled in the normal fallback path.
289 This assumes the blkdev's low level compat_ioctl always returns
290 ENOIOCTLCMD for unknown ioctls. */
291long compat_blkdev_ioctl(struct file *file, unsigned cmd, unsigned long arg)
292{
293 struct block_device *bdev = file->f_path.dentry->d_inode->i_bdev;
294 struct gendisk *disk = bdev->bd_disk;
295 int ret = -ENOIOCTLCMD;
296 if (disk->fops->compat_ioctl) {
297 lock_kernel();
298 ret = disk->fops->compat_ioctl(file, cmd, arg);
299 unlock_kernel();
300 }
301 return ret;
302}
303
304EXPORT_SYMBOL_GPL(blkdev_ioctl); 291EXPORT_SYMBOL_GPL(blkdev_ioctl);
diff --git a/block/ll_rw_blk.c b/block/ll_rw_blk.c
index ed39313c4085..cd9d2c5d91ae 100644
--- a/block/ll_rw_blk.c
+++ b/block/ll_rw_blk.c
@@ -42,6 +42,9 @@ static void drive_stat_acct(struct request *rq, int nr_sectors, int new_io);
42static void init_request_from_bio(struct request *req, struct bio *bio); 42static void init_request_from_bio(struct request *req, struct bio *bio);
43static int __make_request(struct request_queue *q, struct bio *bio); 43static int __make_request(struct request_queue *q, struct bio *bio);
44static struct io_context *current_io_context(gfp_t gfp_flags, int node); 44static struct io_context *current_io_context(gfp_t gfp_flags, int node);
45static void blk_recalc_rq_segments(struct request *rq);
46static void blk_rq_bio_prep(struct request_queue *q, struct request *rq,
47 struct bio *bio);
45 48
46/* 49/*
47 * For the allocated request tables 50 * For the allocated request tables
@@ -428,7 +431,6 @@ static void queue_flush(struct request_queue *q, unsigned which)
428static inline struct request *start_ordered(struct request_queue *q, 431static inline struct request *start_ordered(struct request_queue *q,
429 struct request *rq) 432 struct request *rq)
430{ 433{
431 q->bi_size = 0;
432 q->orderr = 0; 434 q->orderr = 0;
433 q->ordered = q->next_ordered; 435 q->ordered = q->next_ordered;
434 q->ordseq |= QUEUE_ORDSEQ_STARTED; 436 q->ordseq |= QUEUE_ORDSEQ_STARTED;
@@ -525,56 +527,36 @@ int blk_do_ordered(struct request_queue *q, struct request **rqp)
525 return 1; 527 return 1;
526} 528}
527 529
528static int flush_dry_bio_endio(struct bio *bio, unsigned int bytes, int error) 530static void req_bio_endio(struct request *rq, struct bio *bio,
529{ 531 unsigned int nbytes, int error)
530 struct request_queue *q = bio->bi_private;
531
532 /*
533 * This is dry run, restore bio_sector and size. We'll finish
534 * this request again with the original bi_end_io after an
535 * error occurs or post flush is complete.
536 */
537 q->bi_size += bytes;
538
539 if (bio->bi_size)
540 return 1;
541
542 /* Reset bio */
543 set_bit(BIO_UPTODATE, &bio->bi_flags);
544 bio->bi_size = q->bi_size;
545 bio->bi_sector -= (q->bi_size >> 9);
546 q->bi_size = 0;
547
548 return 0;
549}
550
551static int ordered_bio_endio(struct request *rq, struct bio *bio,
552 unsigned int nbytes, int error)
553{ 532{
554 struct request_queue *q = rq->q; 533 struct request_queue *q = rq->q;
555 bio_end_io_t *endio;
556 void *private;
557 534
558 if (&q->bar_rq != rq) 535 if (&q->bar_rq != rq) {
559 return 0; 536 if (error)
560 537 clear_bit(BIO_UPTODATE, &bio->bi_flags);
561 /* 538 else if (!test_bit(BIO_UPTODATE, &bio->bi_flags))
562 * Okay, this is the barrier request in progress, dry finish it. 539 error = -EIO;
563 */
564 if (error && !q->orderr)
565 q->orderr = error;
566 540
567 endio = bio->bi_end_io; 541 if (unlikely(nbytes > bio->bi_size)) {
568 private = bio->bi_private; 542 printk("%s: want %u bytes done, only %u left\n",
569 bio->bi_end_io = flush_dry_bio_endio; 543 __FUNCTION__, nbytes, bio->bi_size);
570 bio->bi_private = q; 544 nbytes = bio->bi_size;
571 545 }
572 bio_endio(bio, nbytes, error);
573 546
574 bio->bi_end_io = endio; 547 bio->bi_size -= nbytes;
575 bio->bi_private = private; 548 bio->bi_sector += (nbytes >> 9);
549 if (bio->bi_size == 0)
550 bio_endio(bio, error);
551 } else {
576 552
577 return 1; 553 /*
554 * Okay, this is the barrier request in progress, just
555 * record the error;
556 */
557 if (error && !q->orderr)
558 q->orderr = error;
559 }
578} 560}
579 561
580/** 562/**
@@ -1220,16 +1202,40 @@ EXPORT_SYMBOL(blk_dump_rq_flags);
1220 1202
1221void blk_recount_segments(struct request_queue *q, struct bio *bio) 1203void blk_recount_segments(struct request_queue *q, struct bio *bio)
1222{ 1204{
1205 struct request rq;
1206 struct bio *nxt = bio->bi_next;
1207 rq.q = q;
1208 rq.bio = rq.biotail = bio;
1209 bio->bi_next = NULL;
1210 blk_recalc_rq_segments(&rq);
1211 bio->bi_next = nxt;
1212 bio->bi_phys_segments = rq.nr_phys_segments;
1213 bio->bi_hw_segments = rq.nr_hw_segments;
1214 bio->bi_flags |= (1 << BIO_SEG_VALID);
1215}
1216EXPORT_SYMBOL(blk_recount_segments);
1217
1218static void blk_recalc_rq_segments(struct request *rq)
1219{
1220 int nr_phys_segs;
1221 int nr_hw_segs;
1222 unsigned int phys_size;
1223 unsigned int hw_size;
1223 struct bio_vec *bv, *bvprv = NULL; 1224 struct bio_vec *bv, *bvprv = NULL;
1224 int i, nr_phys_segs, nr_hw_segs, seg_size, hw_seg_size, cluster; 1225 int seg_size;
1226 int hw_seg_size;
1227 int cluster;
1228 struct req_iterator iter;
1225 int high, highprv = 1; 1229 int high, highprv = 1;
1230 struct request_queue *q = rq->q;
1226 1231
1227 if (unlikely(!bio->bi_io_vec)) 1232 if (!rq->bio)
1228 return; 1233 return;
1229 1234
1230 cluster = q->queue_flags & (1 << QUEUE_FLAG_CLUSTER); 1235 cluster = q->queue_flags & (1 << QUEUE_FLAG_CLUSTER);
1231 hw_seg_size = seg_size = nr_phys_segs = nr_hw_segs = 0; 1236 hw_seg_size = seg_size = 0;
1232 bio_for_each_segment(bv, bio, i) { 1237 phys_size = hw_size = nr_phys_segs = nr_hw_segs = 0;
1238 rq_for_each_segment(bv, rq, iter) {
1233 /* 1239 /*
1234 * the trick here is making sure that a high page is never 1240 * the trick here is making sure that a high page is never
1235 * considered part of another segment, since that might 1241 * considered part of another segment, since that might
@@ -1255,12 +1261,13 @@ void blk_recount_segments(struct request_queue *q, struct bio *bio)
1255 } 1261 }
1256new_segment: 1262new_segment:
1257 if (BIOVEC_VIRT_MERGEABLE(bvprv, bv) && 1263 if (BIOVEC_VIRT_MERGEABLE(bvprv, bv) &&
1258 !BIOVEC_VIRT_OVERSIZE(hw_seg_size + bv->bv_len)) { 1264 !BIOVEC_VIRT_OVERSIZE(hw_seg_size + bv->bv_len))
1259 hw_seg_size += bv->bv_len; 1265 hw_seg_size += bv->bv_len;
1260 } else { 1266 else {
1261new_hw_segment: 1267new_hw_segment:
1262 if (hw_seg_size > bio->bi_hw_front_size) 1268 if (nr_hw_segs == 1 &&
1263 bio->bi_hw_front_size = hw_seg_size; 1269 hw_seg_size > rq->bio->bi_hw_front_size)
1270 rq->bio->bi_hw_front_size = hw_seg_size;
1264 hw_seg_size = BIOVEC_VIRT_START_SIZE(bv) + bv->bv_len; 1271 hw_seg_size = BIOVEC_VIRT_START_SIZE(bv) + bv->bv_len;
1265 nr_hw_segs++; 1272 nr_hw_segs++;
1266 } 1273 }
@@ -1270,15 +1277,15 @@ new_hw_segment:
1270 seg_size = bv->bv_len; 1277 seg_size = bv->bv_len;
1271 highprv = high; 1278 highprv = high;
1272 } 1279 }
1273 if (hw_seg_size > bio->bi_hw_back_size) 1280
1274 bio->bi_hw_back_size = hw_seg_size; 1281 if (nr_hw_segs == 1 &&
1275 if (nr_hw_segs == 1 && hw_seg_size > bio->bi_hw_front_size) 1282 hw_seg_size > rq->bio->bi_hw_front_size)
1276 bio->bi_hw_front_size = hw_seg_size; 1283 rq->bio->bi_hw_front_size = hw_seg_size;
1277 bio->bi_phys_segments = nr_phys_segs; 1284 if (hw_seg_size > rq->biotail->bi_hw_back_size)
1278 bio->bi_hw_segments = nr_hw_segs; 1285 rq->biotail->bi_hw_back_size = hw_seg_size;
1279 bio->bi_flags |= (1 << BIO_SEG_VALID); 1286 rq->nr_phys_segments = nr_phys_segs;
1287 rq->nr_hw_segments = nr_hw_segs;
1280} 1288}
1281EXPORT_SYMBOL(blk_recount_segments);
1282 1289
1283static int blk_phys_contig_segment(struct request_queue *q, struct bio *bio, 1290static int blk_phys_contig_segment(struct request_queue *q, struct bio *bio,
1284 struct bio *nxt) 1291 struct bio *nxt)
@@ -1325,8 +1332,8 @@ int blk_rq_map_sg(struct request_queue *q, struct request *rq,
1325 struct scatterlist *sg) 1332 struct scatterlist *sg)
1326{ 1333{
1327 struct bio_vec *bvec, *bvprv; 1334 struct bio_vec *bvec, *bvprv;
1328 struct bio *bio; 1335 struct req_iterator iter;
1329 int nsegs, i, cluster; 1336 int nsegs, cluster;
1330 1337
1331 nsegs = 0; 1338 nsegs = 0;
1332 cluster = q->queue_flags & (1 << QUEUE_FLAG_CLUSTER); 1339 cluster = q->queue_flags & (1 << QUEUE_FLAG_CLUSTER);
@@ -1335,35 +1342,30 @@ int blk_rq_map_sg(struct request_queue *q, struct request *rq,
1335 * for each bio in rq 1342 * for each bio in rq
1336 */ 1343 */
1337 bvprv = NULL; 1344 bvprv = NULL;
1338 rq_for_each_bio(bio, rq) { 1345 rq_for_each_segment(bvec, rq, iter) {
1339 /* 1346 int nbytes = bvec->bv_len;
1340 * for each segment in bio
1341 */
1342 bio_for_each_segment(bvec, bio, i) {
1343 int nbytes = bvec->bv_len;
1344 1347
1345 if (bvprv && cluster) { 1348 if (bvprv && cluster) {
1346 if (sg[nsegs - 1].length + nbytes > q->max_segment_size) 1349 if (sg[nsegs - 1].length + nbytes > q->max_segment_size)
1347 goto new_segment; 1350 goto new_segment;
1348 1351
1349 if (!BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) 1352 if (!BIOVEC_PHYS_MERGEABLE(bvprv, bvec))
1350 goto new_segment; 1353 goto new_segment;
1351 if (!BIOVEC_SEG_BOUNDARY(q, bvprv, bvec)) 1354 if (!BIOVEC_SEG_BOUNDARY(q, bvprv, bvec))
1352 goto new_segment; 1355 goto new_segment;
1353 1356
1354 sg[nsegs - 1].length += nbytes; 1357 sg[nsegs - 1].length += nbytes;
1355 } else { 1358 } else {
1356new_segment: 1359new_segment:
1357 memset(&sg[nsegs],0,sizeof(struct scatterlist)); 1360 memset(&sg[nsegs],0,sizeof(struct scatterlist));
1358 sg[nsegs].page = bvec->bv_page; 1361 sg[nsegs].page = bvec->bv_page;
1359 sg[nsegs].length = nbytes; 1362 sg[nsegs].length = nbytes;
1360 sg[nsegs].offset = bvec->bv_offset; 1363 sg[nsegs].offset = bvec->bv_offset;
1361 1364
1362 nsegs++; 1365 nsegs++;
1363 } 1366 }
1364 bvprv = bvec; 1367 bvprv = bvec;
1365 } /* segments in bio */ 1368 } /* segments in rq */
1366 } /* bios in rq */
1367 1369
1368 return nsegs; 1370 return nsegs;
1369} 1371}
@@ -1420,7 +1422,8 @@ static inline int ll_new_hw_segment(struct request_queue *q,
1420 return 1; 1422 return 1;
1421} 1423}
1422 1424
1423int ll_back_merge_fn(struct request_queue *q, struct request *req, struct bio *bio) 1425static int ll_back_merge_fn(struct request_queue *q, struct request *req,
1426 struct bio *bio)
1424{ 1427{
1425 unsigned short max_sectors; 1428 unsigned short max_sectors;
1426 int len; 1429 int len;
@@ -1456,7 +1459,6 @@ int ll_back_merge_fn(struct request_queue *q, struct request *req, struct bio *b
1456 1459
1457 return ll_new_hw_segment(q, req, bio); 1460 return ll_new_hw_segment(q, req, bio);
1458} 1461}
1459EXPORT_SYMBOL(ll_back_merge_fn);
1460 1462
1461static int ll_front_merge_fn(struct request_queue *q, struct request *req, 1463static int ll_front_merge_fn(struct request_queue *q, struct request *req,
1462 struct bio *bio) 1464 struct bio *bio)
@@ -2346,6 +2348,23 @@ static int __blk_rq_unmap_user(struct bio *bio)
2346 return ret; 2348 return ret;
2347} 2349}
2348 2350
2351int blk_rq_append_bio(struct request_queue *q, struct request *rq,
2352 struct bio *bio)
2353{
2354 if (!rq->bio)
2355 blk_rq_bio_prep(q, rq, bio);
2356 else if (!ll_back_merge_fn(q, rq, bio))
2357 return -EINVAL;
2358 else {
2359 rq->biotail->bi_next = bio;
2360 rq->biotail = bio;
2361
2362 rq->data_len += bio->bi_size;
2363 }
2364 return 0;
2365}
2366EXPORT_SYMBOL(blk_rq_append_bio);
2367
2349static int __blk_rq_map_user(struct request_queue *q, struct request *rq, 2368static int __blk_rq_map_user(struct request_queue *q, struct request *rq,
2350 void __user *ubuf, unsigned int len) 2369 void __user *ubuf, unsigned int len)
2351{ 2370{
@@ -2377,23 +2396,12 @@ static int __blk_rq_map_user(struct request_queue *q, struct request *rq,
2377 */ 2396 */
2378 bio_get(bio); 2397 bio_get(bio);
2379 2398
2380 if (!rq->bio) 2399 ret = blk_rq_append_bio(q, rq, bio);
2381 blk_rq_bio_prep(q, rq, bio); 2400 if (!ret)
2382 else if (!ll_back_merge_fn(q, rq, bio)) { 2401 return bio->bi_size;
2383 ret = -EINVAL;
2384 goto unmap_bio;
2385 } else {
2386 rq->biotail->bi_next = bio;
2387 rq->biotail = bio;
2388
2389 rq->data_len += bio->bi_size;
2390 }
2391
2392 return bio->bi_size;
2393 2402
2394unmap_bio:
2395 /* if it was boucned we must call the end io function */ 2403 /* if it was boucned we must call the end io function */
2396 bio_endio(bio, bio->bi_size, 0); 2404 bio_endio(bio, 0);
2397 __blk_rq_unmap_user(orig_bio); 2405 __blk_rq_unmap_user(orig_bio);
2398 bio_put(bio); 2406 bio_put(bio);
2399 return ret; 2407 return ret;
@@ -2502,7 +2510,7 @@ int blk_rq_map_user_iov(struct request_queue *q, struct request *rq,
2502 return PTR_ERR(bio); 2510 return PTR_ERR(bio);
2503 2511
2504 if (bio->bi_size != len) { 2512 if (bio->bi_size != len) {
2505 bio_endio(bio, bio->bi_size, 0); 2513 bio_endio(bio, 0);
2506 bio_unmap_user(bio); 2514 bio_unmap_user(bio);
2507 return -EINVAL; 2515 return -EINVAL;
2508 } 2516 }
@@ -2912,15 +2920,9 @@ static void init_request_from_bio(struct request *req, struct bio *bio)
2912 2920
2913 req->errors = 0; 2921 req->errors = 0;
2914 req->hard_sector = req->sector = bio->bi_sector; 2922 req->hard_sector = req->sector = bio->bi_sector;
2915 req->hard_nr_sectors = req->nr_sectors = bio_sectors(bio);
2916 req->current_nr_sectors = req->hard_cur_sectors = bio_cur_sectors(bio);
2917 req->nr_phys_segments = bio_phys_segments(req->q, bio);
2918 req->nr_hw_segments = bio_hw_segments(req->q, bio);
2919 req->buffer = bio_data(bio); /* see ->buffer comment above */
2920 req->bio = req->biotail = bio;
2921 req->ioprio = bio_prio(bio); 2923 req->ioprio = bio_prio(bio);
2922 req->rq_disk = bio->bi_bdev->bd_disk;
2923 req->start_time = jiffies; 2924 req->start_time = jiffies;
2925 blk_rq_bio_prep(req->q, req, bio);
2924} 2926}
2925 2927
2926static int __make_request(struct request_queue *q, struct bio *bio) 2928static int __make_request(struct request_queue *q, struct bio *bio)
@@ -3038,7 +3040,7 @@ out:
3038 return 0; 3040 return 0;
3039 3041
3040end_io: 3042end_io:
3041 bio_endio(bio, nr_sectors << 9, err); 3043 bio_endio(bio, err);
3042 return 0; 3044 return 0;
3043} 3045}
3044 3046
@@ -3185,7 +3187,7 @@ static inline void __generic_make_request(struct bio *bio)
3185 bdevname(bio->bi_bdev, b), 3187 bdevname(bio->bi_bdev, b),
3186 (long long) bio->bi_sector); 3188 (long long) bio->bi_sector);
3187end_io: 3189end_io:
3188 bio_endio(bio, bio->bi_size, -EIO); 3190 bio_endio(bio, -EIO);
3189 break; 3191 break;
3190 } 3192 }
3191 3193
@@ -3329,48 +3331,6 @@ void submit_bio(int rw, struct bio *bio)
3329 3331
3330EXPORT_SYMBOL(submit_bio); 3332EXPORT_SYMBOL(submit_bio);
3331 3333
3332static void blk_recalc_rq_segments(struct request *rq)
3333{
3334 struct bio *bio, *prevbio = NULL;
3335 int nr_phys_segs, nr_hw_segs;
3336 unsigned int phys_size, hw_size;
3337 struct request_queue *q = rq->q;
3338
3339 if (!rq->bio)
3340 return;
3341
3342 phys_size = hw_size = nr_phys_segs = nr_hw_segs = 0;
3343 rq_for_each_bio(bio, rq) {
3344 /* Force bio hw/phys segs to be recalculated. */
3345 bio->bi_flags &= ~(1 << BIO_SEG_VALID);
3346
3347 nr_phys_segs += bio_phys_segments(q, bio);
3348 nr_hw_segs += bio_hw_segments(q, bio);
3349 if (prevbio) {
3350 int pseg = phys_size + prevbio->bi_size + bio->bi_size;
3351 int hseg = hw_size + prevbio->bi_size + bio->bi_size;
3352
3353 if (blk_phys_contig_segment(q, prevbio, bio) &&
3354 pseg <= q->max_segment_size) {
3355 nr_phys_segs--;
3356 phys_size += prevbio->bi_size + bio->bi_size;
3357 } else
3358 phys_size = 0;
3359
3360 if (blk_hw_contig_segment(q, prevbio, bio) &&
3361 hseg <= q->max_segment_size) {
3362 nr_hw_segs--;
3363 hw_size += prevbio->bi_size + bio->bi_size;
3364 } else
3365 hw_size = 0;
3366 }
3367 prevbio = bio;
3368 }
3369
3370 rq->nr_phys_segments = nr_phys_segs;
3371 rq->nr_hw_segments = nr_hw_segs;
3372}
3373
3374static void blk_recalc_rq_sectors(struct request *rq, int nsect) 3334static void blk_recalc_rq_sectors(struct request *rq, int nsect)
3375{ 3335{
3376 if (blk_fs_request(rq)) { 3336 if (blk_fs_request(rq)) {
@@ -3442,8 +3402,7 @@ static int __end_that_request_first(struct request *req, int uptodate,
3442 if (nr_bytes >= bio->bi_size) { 3402 if (nr_bytes >= bio->bi_size) {
3443 req->bio = bio->bi_next; 3403 req->bio = bio->bi_next;
3444 nbytes = bio->bi_size; 3404 nbytes = bio->bi_size;
3445 if (!ordered_bio_endio(req, bio, nbytes, error)) 3405 req_bio_endio(req, bio, nbytes, error);
3446 bio_endio(bio, nbytes, error);
3447 next_idx = 0; 3406 next_idx = 0;
3448 bio_nbytes = 0; 3407 bio_nbytes = 0;
3449 } else { 3408 } else {
@@ -3498,8 +3457,7 @@ static int __end_that_request_first(struct request *req, int uptodate,
3498 * if the request wasn't completed, update state 3457 * if the request wasn't completed, update state
3499 */ 3458 */
3500 if (bio_nbytes) { 3459 if (bio_nbytes) {
3501 if (!ordered_bio_endio(req, bio, bio_nbytes, error)) 3460 req_bio_endio(req, bio, bio_nbytes, error);
3502 bio_endio(bio, bio_nbytes, error);
3503 bio->bi_idx += next_idx; 3461 bio->bi_idx += next_idx;
3504 bio_iovec(bio)->bv_offset += nr_bytes; 3462 bio_iovec(bio)->bv_offset += nr_bytes;
3505 bio_iovec(bio)->bv_len -= nr_bytes; 3463 bio_iovec(bio)->bv_len -= nr_bytes;
@@ -3574,7 +3532,7 @@ static void blk_done_softirq(struct softirq_action *h)
3574 } 3532 }
3575} 3533}
3576 3534
3577static int blk_cpu_notify(struct notifier_block *self, unsigned long action, 3535static int __cpuinit blk_cpu_notify(struct notifier_block *self, unsigned long action,
3578 void *hcpu) 3536 void *hcpu)
3579{ 3537{
3580 /* 3538 /*
@@ -3595,7 +3553,7 @@ static int blk_cpu_notify(struct notifier_block *self, unsigned long action,
3595} 3553}
3596 3554
3597 3555
3598static struct notifier_block __devinitdata blk_cpu_notifier = { 3556static struct notifier_block blk_cpu_notifier __cpuinitdata = {
3599 .notifier_call = blk_cpu_notify, 3557 .notifier_call = blk_cpu_notify,
3600}; 3558};
3601 3559
@@ -3680,8 +3638,8 @@ void end_request(struct request *req, int uptodate)
3680 3638
3681EXPORT_SYMBOL(end_request); 3639EXPORT_SYMBOL(end_request);
3682 3640
3683void blk_rq_bio_prep(struct request_queue *q, struct request *rq, 3641static void blk_rq_bio_prep(struct request_queue *q, struct request *rq,
3684 struct bio *bio) 3642 struct bio *bio)
3685{ 3643{
3686 /* first two bits are identical in rq->cmd_flags and bio->bi_rw */ 3644 /* first two bits are identical in rq->cmd_flags and bio->bi_rw */
3687 rq->cmd_flags |= (bio->bi_rw & 3); 3645 rq->cmd_flags |= (bio->bi_rw & 3);
@@ -3695,9 +3653,10 @@ void blk_rq_bio_prep(struct request_queue *q, struct request *rq,
3695 rq->data_len = bio->bi_size; 3653 rq->data_len = bio->bi_size;
3696 3654
3697 rq->bio = rq->biotail = bio; 3655 rq->bio = rq->biotail = bio;
3698}
3699 3656
3700EXPORT_SYMBOL(blk_rq_bio_prep); 3657 if (bio->bi_bdev)
3658 rq->rq_disk = bio->bi_bdev->bd_disk;
3659}
3701 3660
3702int kblockd_schedule_work(struct work_struct *work) 3661int kblockd_schedule_work(struct work_struct *work)
3703{ 3662{
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 9ba778a2b484..feab124d8e05 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -262,10 +262,12 @@ int acpi_bus_set_power(acpi_handle handle, int state)
262 printk(KERN_WARNING PREFIX 262 printk(KERN_WARNING PREFIX
263 "Transitioning device [%s] to D%d\n", 263 "Transitioning device [%s] to D%d\n",
264 device->pnp.bus_id, state); 264 device->pnp.bus_id, state);
265 else 265 else {
266 device->power.state = state;
266 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 267 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
267 "Device [%s] transitioned to D%d\n", 268 "Device [%s] transitioned to D%d\n",
268 device->pnp.bus_id, state)); 269 device->pnp.bus_id, state));
270 }
269 271
270 return result; 272 return result;
271} 273}
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 12c09fafce9a..352cf81af581 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -1214,7 +1214,7 @@ acpi_os_validate_address (
1214} 1214}
1215 1215
1216#ifdef CONFIG_DMI 1216#ifdef CONFIG_DMI
1217static int dmi_osi_linux(struct dmi_system_id *d) 1217static int dmi_osi_linux(const struct dmi_system_id *d)
1218{ 1218{
1219 printk(KERN_NOTICE "%s detected: enabling _OSI(Linux)\n", d->ident); 1219 printk(KERN_NOTICE "%s detected: enabling _OSI(Linux)\n", d->ident);
1220 enable_osi_linux(1); 1220 enable_osi_linux(1);
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index f18261368e76..1e8287b4f40c 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -92,7 +92,7 @@ module_param(bm_history, uint, 0644);
92 * 92 *
93 * To skip this limit, boot/load with a large max_cstate limit. 93 * To skip this limit, boot/load with a large max_cstate limit.
94 */ 94 */
95static int set_max_cstate(struct dmi_system_id *id) 95static int set_max_cstate(const struct dmi_system_id *id)
96{ 96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0; 98 return 0;
diff --git a/drivers/acpi/sleep/main.c b/drivers/acpi/sleep/main.c
index 2cbb9aabd00e..5055acf2163c 100644
--- a/drivers/acpi/sleep/main.c
+++ b/drivers/acpi/sleep/main.c
@@ -215,7 +215,7 @@ static struct pm_ops acpi_pm_ops = {
215 * Toshiba fails to preserve interrupts over S1, reinitialization 215 * Toshiba fails to preserve interrupts over S1, reinitialization
216 * of 8259 is needed after S1 resume. 216 * of 8259 is needed after S1 resume.
217 */ 217 */
218static int __init init_ints_after_s1(struct dmi_system_id *d) 218static int __init init_ints_after_s1(const struct dmi_system_id *d)
219{ 219{
220 printk(KERN_WARNING "%s with broken S1 detected.\n", d->ident); 220 printk(KERN_WARNING "%s with broken S1 detected.\n", d->ident);
221 init_8259A_after_S1 = 1; 221 init_8259A_after_S1 = 1;
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index bc6d5866ef98..ad898e10c1a9 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c
@@ -1360,7 +1360,7 @@ static int acpi_thermal_resume(struct acpi_device *device)
1360} 1360}
1361 1361
1362#ifdef CONFIG_DMI 1362#ifdef CONFIG_DMI
1363static int thermal_act(struct dmi_system_id *d) { 1363static int thermal_act(const struct dmi_system_id *d) {
1364 1364
1365 if (act == 0) { 1365 if (act == 0) {
1366 printk(KERN_NOTICE "ACPI: %s detected: " 1366 printk(KERN_NOTICE "ACPI: %s detected: "
@@ -1369,14 +1369,14 @@ static int thermal_act(struct dmi_system_id *d) {
1369 } 1369 }
1370 return 0; 1370 return 0;
1371} 1371}
1372static int thermal_nocrt(struct dmi_system_id *d) { 1372static int thermal_nocrt(const struct dmi_system_id *d) {
1373 1373
1374 printk(KERN_NOTICE "ACPI: %s detected: " 1374 printk(KERN_NOTICE "ACPI: %s detected: "
1375 "disabling all critical thermal trip point actions.\n", d->ident); 1375 "disabling all critical thermal trip point actions.\n", d->ident);
1376 nocrt = 1; 1376 nocrt = 1;
1377 return 0; 1377 return 0;
1378} 1378}
1379static int thermal_tzp(struct dmi_system_id *d) { 1379static int thermal_tzp(const struct dmi_system_id *d) {
1380 1380
1381 if (tzp == 0) { 1381 if (tzp == 0) {
1382 printk(KERN_NOTICE "ACPI: %s detected: " 1382 printk(KERN_NOTICE "ACPI: %s detected: "
@@ -1385,7 +1385,7 @@ static int thermal_tzp(struct dmi_system_id *d) {
1385 } 1385 }
1386 return 0; 1386 return 0;
1387} 1387}
1388static int thermal_psv(struct dmi_system_id *d) { 1388static int thermal_psv(const struct dmi_system_id *d) {
1389 1389
1390 if (psv == 0) { 1390 if (psv == 0) {
1391 printk(KERN_NOTICE "ACPI: %s detected: " 1391 printk(KERN_NOTICE "ACPI: %s detected: "
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 6996eb5b7506..92c2d5082bef 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -919,7 +919,7 @@ static void ich_set_dmamode (struct ata_port *ap, struct ata_device *adev)
919#ifdef CONFIG_PM 919#ifdef CONFIG_PM
920static int piix_broken_suspend(void) 920static int piix_broken_suspend(void)
921{ 921{
922 static struct dmi_system_id sysids[] = { 922 static const struct dmi_system_id sysids[] = {
923 { 923 {
924 .ident = "TECRA M3", 924 .ident = "TECRA M3",
925 .matches = { 925 .matches = {
@@ -1183,7 +1183,7 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev,
1183 1183
1184static void piix_iocfg_bit18_quirk(struct pci_dev *pdev) 1184static void piix_iocfg_bit18_quirk(struct pci_dev *pdev)
1185{ 1185{
1186 static struct dmi_system_id sysids[] = { 1186 static const struct dmi_system_id sysids[] = {
1187 { 1187 {
1188 /* Clevo M570U sets IOCFG bit 18 if the cdrom 1188 /* Clevo M570U sets IOCFG bit 18 if the cdrom
1189 * isn't used to boot the system which 1189 * isn't used to boot the system which
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 71bdc3b3189c..32a10c99c06f 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -40,7 +40,7 @@
40 * Cable special cases 40 * Cable special cases
41 */ 41 */
42 42
43static struct dmi_system_id cable_dmi_table[] = { 43static const struct dmi_system_id cable_dmi_table[] = {
44 { 44 {
45 .ident = "HP Pavilion N5430", 45 .ident = "HP Pavilion N5430",
46 .matches = { 46 .matches = {
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index c6066aa43ec8..eaaea848b649 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -214,7 +214,7 @@ static struct ata_port_operations cs5530_port_ops = {
214 .port_start = ata_port_start, 214 .port_start = ata_port_start,
215}; 215};
216 216
217static struct dmi_system_id palmax_dmi_table[] = { 217static const struct dmi_system_id palmax_dmi_table[] = {
218 { 218 {
219 .ident = "Palmax PD1100", 219 .ident = "Palmax PD1100",
220 .matches = { 220 .matches = {
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 636c4f1a0b24..f143db4559e0 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -129,7 +129,7 @@ static const struct via_isa_bridge {
129 * Cable special cases 129 * Cable special cases
130 */ 130 */
131 131
132static struct dmi_system_id cable_dmi_table[] = { 132static const struct dmi_system_id cable_dmi_table[] = {
133 { 133 {
134 .ident = "Acer Ferrari 3400", 134 .ident = "Acer Ferrari 3400",
135 .matches = { 135 .matches = {
diff --git a/drivers/block/aoe/aoeblk.c b/drivers/block/aoe/aoeblk.c
index 007faaf008e7..b1d00ef6659c 100644
--- a/drivers/block/aoe/aoeblk.c
+++ b/drivers/block/aoe/aoeblk.c
@@ -138,7 +138,7 @@ aoeblk_make_request(struct request_queue *q, struct bio *bio)
138 buf = mempool_alloc(d->bufpool, GFP_NOIO); 138 buf = mempool_alloc(d->bufpool, GFP_NOIO);
139 if (buf == NULL) { 139 if (buf == NULL) {
140 printk(KERN_INFO "aoe: buf allocation failure\n"); 140 printk(KERN_INFO "aoe: buf allocation failure\n");
141 bio_endio(bio, bio->bi_size, -ENOMEM); 141 bio_endio(bio, -ENOMEM);
142 return 0; 142 return 0;
143 } 143 }
144 memset(buf, 0, sizeof(*buf)); 144 memset(buf, 0, sizeof(*buf));
@@ -159,7 +159,7 @@ aoeblk_make_request(struct request_queue *q, struct bio *bio)
159 d->aoemajor, d->aoeminor); 159 d->aoemajor, d->aoeminor);
160 spin_unlock_irqrestore(&d->lock, flags); 160 spin_unlock_irqrestore(&d->lock, flags);
161 mempool_free(buf, d->bufpool); 161 mempool_free(buf, d->bufpool);
162 bio_endio(bio, bio->bi_size, -ENXIO); 162 bio_endio(bio, -ENXIO);
163 return 0; 163 return 0;
164 } 164 }
165 165
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index 30394f78cac2..99672017ca56 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -653,7 +653,7 @@ aoecmd_ata_rsp(struct sk_buff *skb)
653 disk_stat_add(disk, sectors[rw], n_sect); 653 disk_stat_add(disk, sectors[rw], n_sect);
654 disk_stat_add(disk, io_ticks, duration); 654 disk_stat_add(disk, io_ticks, duration);
655 n = (buf->flags & BUFFL_FAIL) ? -EIO : 0; 655 n = (buf->flags & BUFFL_FAIL) ? -EIO : 0;
656 bio_endio(buf->bio, buf->bio->bi_size, n); 656 bio_endio(buf->bio, n);
657 mempool_free(buf, d->bufpool); 657 mempool_free(buf, d->bufpool);
658 } 658 }
659 } 659 }
diff --git a/drivers/block/aoe/aoedev.c b/drivers/block/aoe/aoedev.c
index 05a97197c918..51f50710e5fc 100644
--- a/drivers/block/aoe/aoedev.c
+++ b/drivers/block/aoe/aoedev.c
@@ -119,7 +119,7 @@ aoedev_downdev(struct aoedev *d)
119 bio = buf->bio; 119 bio = buf->bio;
120 if (--buf->nframesout == 0) { 120 if (--buf->nframesout == 0) {
121 mempool_free(buf, d->bufpool); 121 mempool_free(buf, d->bufpool);
122 bio_endio(bio, bio->bi_size, -EIO); 122 bio_endio(bio, -EIO);
123 } 123 }
124 skb_shinfo(f->skb)->nr_frags = f->skb->data_len = 0; 124 skb_shinfo(f->skb)->nr_frags = f->skb->data_len = 0;
125 } 125 }
@@ -130,7 +130,7 @@ aoedev_downdev(struct aoedev *d)
130 list_del(d->bufq.next); 130 list_del(d->bufq.next);
131 bio = buf->bio; 131 bio = buf->bio;
132 mempool_free(buf, d->bufpool); 132 mempool_free(buf, d->bufpool);
133 bio_endio(bio, bio->bi_size, -EIO); 133 bio_endio(bio, -EIO);
134 } 134 }
135 135
136 if (d->gd) 136 if (d->gd)
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 084358a828e9..28d145756f6c 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -1194,7 +1194,7 @@ static inline void complete_buffers(struct bio *bio, int status)
1194 int nr_sectors = bio_sectors(bio); 1194 int nr_sectors = bio_sectors(bio);
1195 1195
1196 bio->bi_next = NULL; 1196 bio->bi_next = NULL;
1197 bio_endio(bio, nr_sectors << 9, status ? 0 : -EIO); 1197 bio_endio(bio, status ? 0 : -EIO);
1198 bio = xbh; 1198 bio = xbh;
1199 } 1199 }
1200} 1200}
diff --git a/drivers/block/cpqarray.c b/drivers/block/cpqarray.c
index eb9799acf65b..3853c9a38d6a 100644
--- a/drivers/block/cpqarray.c
+++ b/drivers/block/cpqarray.c
@@ -987,7 +987,7 @@ static inline void complete_buffers(struct bio *bio, int ok)
987 xbh = bio->bi_next; 987 xbh = bio->bi_next;
988 bio->bi_next = NULL; 988 bio->bi_next = NULL;
989 989
990 bio_endio(bio, nr_sectors << 9, ok ? 0 : -EIO); 990 bio_endio(bio, ok ? 0 : -EIO);
991 991
992 bio = xbh; 992 bio = xbh;
993 } 993 }
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index 085b7794fb3e..80483aac4cc9 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -2437,22 +2437,19 @@ static void rw_interrupt(void)
2437/* Compute maximal contiguous buffer size. */ 2437/* Compute maximal contiguous buffer size. */
2438static int buffer_chain_size(void) 2438static int buffer_chain_size(void)
2439{ 2439{
2440 struct bio *bio;
2441 struct bio_vec *bv; 2440 struct bio_vec *bv;
2442 int size, i; 2441 int size;
2442 struct req_iterator iter;
2443 char *base; 2443 char *base;
2444 2444
2445 base = bio_data(current_req->bio); 2445 base = bio_data(current_req->bio);
2446 size = 0; 2446 size = 0;
2447 2447
2448 rq_for_each_bio(bio, current_req) { 2448 rq_for_each_segment(bv, current_req, iter) {
2449 bio_for_each_segment(bv, bio, i) { 2449 if (page_address(bv->bv_page) + bv->bv_offset != base + size)
2450 if (page_address(bv->bv_page) + bv->bv_offset != 2450 break;
2451 base + size)
2452 break;
2453 2451
2454 size += bv->bv_len; 2452 size += bv->bv_len;
2455 }
2456 } 2453 }
2457 2454
2458 return size >> 9; 2455 return size >> 9;
@@ -2479,9 +2476,9 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
2479{ 2476{
2480 int remaining; /* number of transferred 512-byte sectors */ 2477 int remaining; /* number of transferred 512-byte sectors */
2481 struct bio_vec *bv; 2478 struct bio_vec *bv;
2482 struct bio *bio;
2483 char *buffer, *dma_buffer; 2479 char *buffer, *dma_buffer;
2484 int size, i; 2480 int size;
2481 struct req_iterator iter;
2485 2482
2486 max_sector = transfer_size(ssize, 2483 max_sector = transfer_size(ssize,
2487 min(max_sector, max_sector_2), 2484 min(max_sector, max_sector_2),
@@ -2514,43 +2511,41 @@ static void copy_buffer(int ssize, int max_sector, int max_sector_2)
2514 2511
2515 size = current_req->current_nr_sectors << 9; 2512 size = current_req->current_nr_sectors << 9;
2516 2513
2517 rq_for_each_bio(bio, current_req) { 2514 rq_for_each_segment(bv, current_req, iter) {
2518 bio_for_each_segment(bv, bio, i) { 2515 if (!remaining)
2519 if (!remaining) 2516 break;
2520 break;
2521 2517
2522 size = bv->bv_len; 2518 size = bv->bv_len;
2523 SUPBOUND(size, remaining); 2519 SUPBOUND(size, remaining);
2524 2520
2525 buffer = page_address(bv->bv_page) + bv->bv_offset; 2521 buffer = page_address(bv->bv_page) + bv->bv_offset;
2526#ifdef FLOPPY_SANITY_CHECK 2522#ifdef FLOPPY_SANITY_CHECK
2527 if (dma_buffer + size > 2523 if (dma_buffer + size >
2528 floppy_track_buffer + (max_buffer_sectors << 10) || 2524 floppy_track_buffer + (max_buffer_sectors << 10) ||
2529 dma_buffer < floppy_track_buffer) { 2525 dma_buffer < floppy_track_buffer) {
2530 DPRINT("buffer overrun in copy buffer %d\n", 2526 DPRINT("buffer overrun in copy buffer %d\n",
2531 (int)((floppy_track_buffer - 2527 (int)((floppy_track_buffer -
2532 dma_buffer) >> 9)); 2528 dma_buffer) >> 9));
2533 printk("fsector_t=%d buffer_min=%d\n", 2529 printk("fsector_t=%d buffer_min=%d\n",
2534 fsector_t, buffer_min); 2530 fsector_t, buffer_min);
2535 printk("current_count_sectors=%ld\n", 2531 printk("current_count_sectors=%ld\n",
2536 current_count_sectors); 2532 current_count_sectors);
2537 if (CT(COMMAND) == FD_READ)
2538 printk("read\n");
2539 if (CT(COMMAND) == FD_WRITE)
2540 printk("write\n");
2541 break;
2542 }
2543 if (((unsigned long)buffer) % 512)
2544 DPRINT("%p buffer not aligned\n", buffer);
2545#endif
2546 if (CT(COMMAND) == FD_READ) 2533 if (CT(COMMAND) == FD_READ)
2547 memcpy(buffer, dma_buffer, size); 2534 printk("read\n");
2548 else 2535 if (CT(COMMAND) == FD_WRITE)
2549 memcpy(dma_buffer, buffer, size); 2536 printk("write\n");
2550 2537 break;
2551 remaining -= size;
2552 dma_buffer += size;
2553 } 2538 }
2539 if (((unsigned long)buffer) % 512)
2540 DPRINT("%p buffer not aligned\n", buffer);
2541#endif
2542 if (CT(COMMAND) == FD_READ)
2543 memcpy(buffer, dma_buffer, size);
2544 else
2545 memcpy(dma_buffer, buffer, size);
2546
2547 remaining -= size;
2548 dma_buffer += size;
2554 } 2549 }
2555#ifdef FLOPPY_SANITY_CHECK 2550#ifdef FLOPPY_SANITY_CHECK
2556 if (remaining) { 2551 if (remaining) {
@@ -3815,14 +3810,10 @@ static int check_floppy_change(struct gendisk *disk)
3815 * a disk in the drive, and whether that disk is writable. 3810 * a disk in the drive, and whether that disk is writable.
3816 */ 3811 */
3817 3812
3818static int floppy_rb0_complete(struct bio *bio, unsigned int bytes_done, 3813static void floppy_rb0_complete(struct bio *bio,
3819 int err) 3814 int err)
3820{ 3815{
3821 if (bio->bi_size)
3822 return 1;
3823
3824 complete((struct completion *)bio->bi_private); 3816 complete((struct completion *)bio->bi_private);
3825 return 0;
3826} 3817}
3827 3818
3828static int __floppy_read_block_0(struct block_device *bdev) 3819static int __floppy_read_block_0(struct block_device *bdev)
diff --git a/drivers/block/lguest_blk.c b/drivers/block/lguest_blk.c
index 160cf14431ac..fa8e42341b87 100644
--- a/drivers/block/lguest_blk.c
+++ b/drivers/block/lguest_blk.c
@@ -142,25 +142,23 @@ static irqreturn_t lgb_irq(int irq, void *_bd)
142 * return the total length. */ 142 * return the total length. */
143static unsigned int req_to_dma(struct request *req, struct lguest_dma *dma) 143static unsigned int req_to_dma(struct request *req, struct lguest_dma *dma)
144{ 144{
145 unsigned int i = 0, idx, len = 0; 145 unsigned int i = 0, len = 0;
146 struct bio *bio; 146 struct req_iterator iter;
147 147 struct bio_vec *bvec;
148 rq_for_each_bio(bio, req) { 148
149 struct bio_vec *bvec; 149 rq_for_each_segment(bvec, req, iter) {
150 bio_for_each_segment(bvec, bio, idx) { 150 /* We told the block layer not to give us too many. */
151 /* We told the block layer not to give us too many. */ 151 BUG_ON(i == LGUEST_MAX_DMA_SECTIONS);
152 BUG_ON(i == LGUEST_MAX_DMA_SECTIONS); 152 /* If we had a zero-length segment, it would look like
153 /* If we had a zero-length segment, it would look like 153 * the end of the data referred to by the "struct
154 * the end of the data referred to by the "struct 154 * lguest_dma", so make sure that doesn't happen. */
155 * lguest_dma", so make sure that doesn't happen. */ 155 BUG_ON(!bvec->bv_len);
156 BUG_ON(!bvec->bv_len); 156 /* Convert page & offset to a physical address */
157 /* Convert page & offset to a physical address */ 157 dma->addr[i] = page_to_phys(bvec->bv_page)
158 dma->addr[i] = page_to_phys(bvec->bv_page) 158 + bvec->bv_offset;
159 + bvec->bv_offset; 159 dma->len[i] = bvec->bv_len;
160 dma->len[i] = bvec->bv_len; 160 len += bvec->bv_len;
161 len += bvec->bv_len; 161 i++;
162 i++;
163 }
164 } 162 }
165 /* If the array isn't full, we mark the end with a 0 length */ 163 /* If the array isn't full, we mark the end with a 0 length */
166 if (i < LGUEST_MAX_DMA_SECTIONS) 164 if (i < LGUEST_MAX_DMA_SECTIONS)
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index 9f015fce4135..b9233a06934c 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -551,7 +551,7 @@ static int loop_make_request(struct request_queue *q, struct bio *old_bio)
551 551
552out: 552out:
553 spin_unlock_irq(&lo->lo_lock); 553 spin_unlock_irq(&lo->lo_lock);
554 bio_io_error(old_bio, old_bio->bi_size); 554 bio_io_error(old_bio);
555 return 0; 555 return 0;
556} 556}
557 557
@@ -580,7 +580,7 @@ static inline void loop_handle_bio(struct loop_device *lo, struct bio *bio)
580 bio_put(bio); 580 bio_put(bio);
581 } else { 581 } else {
582 int ret = do_bio_filebacked(lo, bio); 582 int ret = do_bio_filebacked(lo, bio);
583 bio_endio(bio, bio->bi_size, ret); 583 bio_endio(bio, ret);
584 } 584 }
585} 585}
586 586
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index be92c658f06e..be5ec3a9b1fc 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -180,7 +180,7 @@ static inline int sock_send_bvec(struct socket *sock, struct bio_vec *bvec,
180 180
181static int nbd_send_req(struct nbd_device *lo, struct request *req) 181static int nbd_send_req(struct nbd_device *lo, struct request *req)
182{ 182{
183 int result, i, flags; 183 int result, flags;
184 struct nbd_request request; 184 struct nbd_request request;
185 unsigned long size = req->nr_sectors << 9; 185 unsigned long size = req->nr_sectors << 9;
186 struct socket *sock = lo->sock; 186 struct socket *sock = lo->sock;
@@ -205,27 +205,23 @@ static int nbd_send_req(struct nbd_device *lo, struct request *req)
205 } 205 }
206 206
207 if (nbd_cmd(req) == NBD_CMD_WRITE) { 207 if (nbd_cmd(req) == NBD_CMD_WRITE) {
208 struct bio *bio; 208 struct req_iterator iter;
209 struct bio_vec *bvec;
209 /* 210 /*
210 * we are really probing at internals to determine 211 * we are really probing at internals to determine
211 * whether to set MSG_MORE or not... 212 * whether to set MSG_MORE or not...
212 */ 213 */
213 rq_for_each_bio(bio, req) { 214 rq_for_each_segment(bvec, req, iter) {
214 struct bio_vec *bvec; 215 flags = 0;
215 bio_for_each_segment(bvec, bio, i) { 216 if (!rq_iter_last(req, iter))
216 flags = 0; 217 flags = MSG_MORE;
217 if ((i < (bio->bi_vcnt - 1)) || bio->bi_next) 218 dprintk(DBG_TX, "%s: request %p: sending %d bytes data\n",
218 flags = MSG_MORE; 219 lo->disk->disk_name, req, bvec->bv_len);
219 dprintk(DBG_TX, "%s: request %p: sending %d bytes data\n", 220 result = sock_send_bvec(sock, bvec, flags);
220 lo->disk->disk_name, req, 221 if (result <= 0) {
221 bvec->bv_len); 222 printk(KERN_ERR "%s: Send data failed (result %d)\n",
222 result = sock_send_bvec(sock, bvec, flags); 223 lo->disk->disk_name, result);
223 if (result <= 0) { 224 goto error_out;
224 printk(KERN_ERR "%s: Send data failed (result %d)\n",
225 lo->disk->disk_name,
226 result);
227 goto error_out;
228 }
229 } 225 }
230 } 226 }
231 } 227 }
@@ -321,22 +317,19 @@ static struct request *nbd_read_stat(struct nbd_device *lo)
321 dprintk(DBG_RX, "%s: request %p: got reply\n", 317 dprintk(DBG_RX, "%s: request %p: got reply\n",
322 lo->disk->disk_name, req); 318 lo->disk->disk_name, req);
323 if (nbd_cmd(req) == NBD_CMD_READ) { 319 if (nbd_cmd(req) == NBD_CMD_READ) {
324 int i; 320 struct req_iterator iter;
325 struct bio *bio; 321 struct bio_vec *bvec;
326 rq_for_each_bio(bio, req) { 322
327 struct bio_vec *bvec; 323 rq_for_each_segment(bvec, req, iter) {
328 bio_for_each_segment(bvec, bio, i) { 324 result = sock_recv_bvec(sock, bvec);
329 result = sock_recv_bvec(sock, bvec); 325 if (result <= 0) {
330 if (result <= 0) { 326 printk(KERN_ERR "%s: Receive data failed (result %d)\n",
331 printk(KERN_ERR "%s: Receive data failed (result %d)\n", 327 lo->disk->disk_name, result);
332 lo->disk->disk_name, 328 req->errors++;
333 result); 329 return req;
334 req->errors++;
335 return req;
336 }
337 dprintk(DBG_RX, "%s: request %p: got %d bytes data\n",
338 lo->disk->disk_name, req, bvec->bv_len);
339 } 330 }
331 dprintk(DBG_RX, "%s: request %p: got %d bytes data\n",
332 lo->disk->disk_name, req, bvec->bv_len);
340 } 333 }
341 } 334 }
342 return req; 335 return req;
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index fadbfd880bab..540bf3676985 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -1058,15 +1058,12 @@ static void pkt_make_local_copy(struct packet_data *pkt, struct bio_vec *bvec)
1058 } 1058 }
1059} 1059}
1060 1060
1061static int pkt_end_io_read(struct bio *bio, unsigned int bytes_done, int err) 1061static void pkt_end_io_read(struct bio *bio, int err)
1062{ 1062{
1063 struct packet_data *pkt = bio->bi_private; 1063 struct packet_data *pkt = bio->bi_private;
1064 struct pktcdvd_device *pd = pkt->pd; 1064 struct pktcdvd_device *pd = pkt->pd;
1065 BUG_ON(!pd); 1065 BUG_ON(!pd);
1066 1066
1067 if (bio->bi_size)
1068 return 1;
1069
1070 VPRINTK("pkt_end_io_read: bio=%p sec0=%llx sec=%llx err=%d\n", bio, 1067 VPRINTK("pkt_end_io_read: bio=%p sec0=%llx sec=%llx err=%d\n", bio,
1071 (unsigned long long)pkt->sector, (unsigned long long)bio->bi_sector, err); 1068 (unsigned long long)pkt->sector, (unsigned long long)bio->bi_sector, err);
1072 1069
@@ -1077,19 +1074,14 @@ static int pkt_end_io_read(struct bio *bio, unsigned int bytes_done, int err)
1077 wake_up(&pd->wqueue); 1074 wake_up(&pd->wqueue);
1078 } 1075 }
1079 pkt_bio_finished(pd); 1076 pkt_bio_finished(pd);
1080
1081 return 0;
1082} 1077}
1083 1078
1084static int pkt_end_io_packet_write(struct bio *bio, unsigned int bytes_done, int err) 1079static void pkt_end_io_packet_write(struct bio *bio, int err)
1085{ 1080{
1086 struct packet_data *pkt = bio->bi_private; 1081 struct packet_data *pkt = bio->bi_private;
1087 struct pktcdvd_device *pd = pkt->pd; 1082 struct pktcdvd_device *pd = pkt->pd;
1088 BUG_ON(!pd); 1083 BUG_ON(!pd);
1089 1084
1090 if (bio->bi_size)
1091 return 1;
1092
1093 VPRINTK("pkt_end_io_packet_write: id=%d, err=%d\n", pkt->id, err); 1085 VPRINTK("pkt_end_io_packet_write: id=%d, err=%d\n", pkt->id, err);
1094 1086
1095 pd->stats.pkt_ended++; 1087 pd->stats.pkt_ended++;
@@ -1098,7 +1090,6 @@ static int pkt_end_io_packet_write(struct bio *bio, unsigned int bytes_done, int
1098 atomic_dec(&pkt->io_wait); 1090 atomic_dec(&pkt->io_wait);
1099 atomic_inc(&pkt->run_sm); 1091 atomic_inc(&pkt->run_sm);
1100 wake_up(&pd->wqueue); 1092 wake_up(&pd->wqueue);
1101 return 0;
1102} 1093}
1103 1094
1104/* 1095/*
@@ -1470,7 +1461,7 @@ static void pkt_finish_packet(struct packet_data *pkt, int uptodate)
1470 while (bio) { 1461 while (bio) {
1471 next = bio->bi_next; 1462 next = bio->bi_next;
1472 bio->bi_next = NULL; 1463 bio->bi_next = NULL;
1473 bio_endio(bio, bio->bi_size, uptodate ? 0 : -EIO); 1464 bio_endio(bio, uptodate ? 0 : -EIO);
1474 bio = next; 1465 bio = next;
1475 } 1466 }
1476 pkt->orig_bios = pkt->orig_bios_tail = NULL; 1467 pkt->orig_bios = pkt->orig_bios_tail = NULL;
@@ -2462,19 +2453,15 @@ static int pkt_close(struct inode *inode, struct file *file)
2462} 2453}
2463 2454
2464 2455
2465static int pkt_end_io_read_cloned(struct bio *bio, unsigned int bytes_done, int err) 2456static void pkt_end_io_read_cloned(struct bio *bio, int err)
2466{ 2457{
2467 struct packet_stacked_data *psd = bio->bi_private; 2458 struct packet_stacked_data *psd = bio->bi_private;
2468 struct pktcdvd_device *pd = psd->pd; 2459 struct pktcdvd_device *pd = psd->pd;
2469 2460
2470 if (bio->bi_size)
2471 return 1;
2472
2473 bio_put(bio); 2461 bio_put(bio);
2474 bio_endio(psd->bio, psd->bio->bi_size, err); 2462 bio_endio(psd->bio, err);
2475 mempool_free(psd, psd_pool); 2463 mempool_free(psd, psd_pool);
2476 pkt_bio_finished(pd); 2464 pkt_bio_finished(pd);
2477 return 0;
2478} 2465}
2479 2466
2480static int pkt_make_request(struct request_queue *q, struct bio *bio) 2467static int pkt_make_request(struct request_queue *q, struct bio *bio)
@@ -2620,7 +2607,7 @@ static int pkt_make_request(struct request_queue *q, struct bio *bio)
2620 } 2607 }
2621 return 0; 2608 return 0;
2622end_io: 2609end_io:
2623 bio_io_error(bio, bio->bi_size); 2610 bio_io_error(bio);
2624 return 0; 2611 return 0;
2625} 2612}
2626 2613
diff --git a/drivers/block/ps3disk.c b/drivers/block/ps3disk.c
index aa8b890c80d7..06d0552cf49c 100644
--- a/drivers/block/ps3disk.c
+++ b/drivers/block/ps3disk.c
@@ -91,30 +91,29 @@ static void ps3disk_scatter_gather(struct ps3_storage_device *dev,
91 struct request *req, int gather) 91 struct request *req, int gather)
92{ 92{
93 unsigned int offset = 0; 93 unsigned int offset = 0;
94 struct bio *bio; 94 struct req_iterator iter;
95 sector_t sector;
96 struct bio_vec *bvec; 95 struct bio_vec *bvec;
97 unsigned int i = 0, j; 96 unsigned int i = 0;
98 size_t size; 97 size_t size;
99 void *buf; 98 void *buf;
100 99
101 rq_for_each_bio(bio, req) { 100 rq_for_each_segment(bvec, req, iter) {
102 sector = bio->bi_sector; 101 unsigned long flags;
103 dev_dbg(&dev->sbd.core, 102 dev_dbg(&dev->sbd.core,
104 "%s:%u: bio %u: %u segs %u sectors from %lu\n", 103 "%s:%u: bio %u: %u segs %u sectors from %lu\n",
105 __func__, __LINE__, i, bio_segments(bio), 104 __func__, __LINE__, i, bio_segments(iter.bio),
106 bio_sectors(bio), sector); 105 bio_sectors(iter.bio),
107 bio_for_each_segment(bvec, bio, j) { 106 (unsigned long)iter.bio->bi_sector);
108 size = bvec->bv_len; 107
109 buf = __bio_kmap_atomic(bio, j, KM_IRQ0); 108 size = bvec->bv_len;
110 if (gather) 109 buf = bvec_kmap_irq(bvec, &flags);
111 memcpy(dev->bounce_buf+offset, buf, size); 110 if (gather)
112 else 111 memcpy(dev->bounce_buf+offset, buf, size);
113 memcpy(buf, dev->bounce_buf+offset, size); 112 else
114 offset += size; 113 memcpy(buf, dev->bounce_buf+offset, size);
115 flush_kernel_dcache_page(bio_iovec_idx(bio, j)->bv_page); 114 offset += size;
116 __bio_kunmap_atomic(bio, KM_IRQ0); 115 flush_kernel_dcache_page(bvec->bv_page);
117 } 116 bvec_kunmap_irq(bvec, &flags);
118 i++; 117 i++;
119 } 118 }
120} 119}
@@ -130,12 +129,13 @@ static int ps3disk_submit_request_sg(struct ps3_storage_device *dev,
130 129
131#ifdef DEBUG 130#ifdef DEBUG
132 unsigned int n = 0; 131 unsigned int n = 0;
133 struct bio *bio; 132 struct bio_vec *bv;
133 struct req_iterator iter;
134 134
135 rq_for_each_bio(bio, req) 135 rq_for_each_segment(bv, req, iter)
136 n++; 136 n++;
137 dev_dbg(&dev->sbd.core, 137 dev_dbg(&dev->sbd.core,
138 "%s:%u: %s req has %u bios for %lu sectors %lu hard sectors\n", 138 "%s:%u: %s req has %u bvecs for %lu sectors %lu hard sectors\n",
139 __func__, __LINE__, op, n, req->nr_sectors, 139 __func__, __LINE__, op, n, req->nr_sectors,
140 req->hard_nr_sectors); 140 req->hard_nr_sectors);
141#endif 141#endif
diff --git a/drivers/block/rd.c b/drivers/block/rd.c
index 65150b548f3a..701ea77f62e9 100644
--- a/drivers/block/rd.c
+++ b/drivers/block/rd.c
@@ -287,10 +287,10 @@ static int rd_make_request(struct request_queue *q, struct bio *bio)
287 if (ret) 287 if (ret)
288 goto fail; 288 goto fail;
289 289
290 bio_endio(bio, bio->bi_size, 0); 290 bio_endio(bio, 0);
291 return 0; 291 return 0;
292fail: 292fail:
293 bio_io_error(bio, bio->bi_size); 293 bio_io_error(bio);
294 return 0; 294 return 0;
295} 295}
296 296
diff --git a/drivers/block/umem.c b/drivers/block/umem.c
index 6b7c02d6360d..99806f9ee4ce 100644
--- a/drivers/block/umem.c
+++ b/drivers/block/umem.c
@@ -52,7 +52,7 @@
52#include <linux/fcntl.h> /* O_ACCMODE */ 52#include <linux/fcntl.h> /* O_ACCMODE */
53#include <linux/hdreg.h> /* HDIO_GETGEO */ 53#include <linux/hdreg.h> /* HDIO_GETGEO */
54 54
55#include <linux/umem.h> 55#include "umem.h"
56 56
57#include <asm/uaccess.h> 57#include <asm/uaccess.h>
58#include <asm/io.h> 58#include <asm/io.h>
@@ -67,9 +67,10 @@
67 * Version Information 67 * Version Information
68 */ 68 */
69 69
70#define DRIVER_VERSION "v2.3" 70#define DRIVER_NAME "umem"
71#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown" 71#define DRIVER_VERSION "v2.3"
72#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver" 72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
73 74
74static int debug; 75static int debug;
75/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */ 76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
@@ -97,15 +98,9 @@ static int major_nr;
97#include <linux/blkpg.h> 98#include <linux/blkpg.h>
98 99
99struct cardinfo { 100struct cardinfo {
100 int card_number;
101 struct pci_dev *dev; 101 struct pci_dev *dev;
102 102
103 int irq;
104
105 unsigned long csr_base;
106 unsigned char __iomem *csr_remap; 103 unsigned char __iomem *csr_remap;
107 unsigned long csr_len;
108 unsigned int win_size; /* PCI window size */
109 unsigned int mm_size; /* size in kbytes */ 104 unsigned int mm_size; /* size in kbytes */
110 105
111 unsigned int init_size; /* initial segment, in sectors, 106 unsigned int init_size; /* initial segment, in sectors,
@@ -113,6 +108,8 @@ struct cardinfo {
113 * have been written 108 * have been written
114 */ 109 */
115 struct bio *bio, *currentbio, **biotail; 110 struct bio *bio, *currentbio, **biotail;
111 int current_idx;
112 sector_t current_sector;
116 113
117 struct request_queue *queue; 114 struct request_queue *queue;
118 115
@@ -121,6 +118,7 @@ struct cardinfo {
121 struct mm_dma_desc *desc; 118 struct mm_dma_desc *desc;
122 int cnt, headcnt; 119 int cnt, headcnt;
123 struct bio *bio, **biotail; 120 struct bio *bio, **biotail;
121 int idx;
124 } mm_pages[2]; 122 } mm_pages[2];
125#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc)) 123#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
126 124
@@ -233,7 +231,7 @@ static void dump_regs(struct cardinfo *card)
233*/ 231*/
234static void dump_dmastat(struct cardinfo *card, unsigned int dmastat) 232static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
235{ 233{
236 printk(KERN_DEBUG "MM%d*: DMAstat - ", card->card_number); 234 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
237 if (dmastat & DMASCR_ANY_ERR) 235 if (dmastat & DMASCR_ANY_ERR)
238 printk("ANY_ERR "); 236 printk("ANY_ERR ");
239 if (dmastat & DMASCR_MBE_ERR) 237 if (dmastat & DMASCR_MBE_ERR)
@@ -295,7 +293,7 @@ static void mm_start_io(struct cardinfo *card)
295 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN); 293 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
296 desc->sem_control_bits = desc->control_bits; 294 desc->sem_control_bits = desc->control_bits;
297 295
298 296
299 if (debug & DEBUG_LED_ON_TRANSFER) 297 if (debug & DEBUG_LED_ON_TRANSFER)
300 set_led(card, LED_REMOVE, LED_ON); 298 set_led(card, LED_REMOVE, LED_ON);
301 299
@@ -329,7 +327,7 @@ static int add_bio(struct cardinfo *card);
329 327
330static void activate(struct cardinfo *card) 328static void activate(struct cardinfo *card)
331{ 329{
332 /* if No page is Active, and Ready is 330 /* if No page is Active, and Ready is
333 * not empty, then switch Ready page 331 * not empty, then switch Ready page
334 * to active and start IO. 332 * to active and start IO.
335 * Then add any bh's that are available to Ready 333 * Then add any bh's that are available to Ready
@@ -368,7 +366,7 @@ static void mm_unplug_device(struct request_queue *q)
368 spin_unlock_irqrestore(&card->lock, flags); 366 spin_unlock_irqrestore(&card->lock, flags);
369} 367}
370 368
371/* 369/*
372 * If there is room on Ready page, take 370 * If there is room on Ready page, take
373 * one bh off list and add it. 371 * one bh off list and add it.
374 * return 1 if there was room, else 0. 372 * return 1 if there was room, else 0.
@@ -380,12 +378,16 @@ static int add_bio(struct cardinfo *card)
380 dma_addr_t dma_handle; 378 dma_addr_t dma_handle;
381 int offset; 379 int offset;
382 struct bio *bio; 380 struct bio *bio;
381 struct bio_vec *vec;
382 int idx;
383 int rw; 383 int rw;
384 int len; 384 int len;
385 385
386 bio = card->currentbio; 386 bio = card->currentbio;
387 if (!bio && card->bio) { 387 if (!bio && card->bio) {
388 card->currentbio = card->bio; 388 card->currentbio = card->bio;
389 card->current_idx = card->bio->bi_idx;
390 card->current_sector = card->bio->bi_sector;
389 card->bio = card->bio->bi_next; 391 card->bio = card->bio->bi_next;
390 if (card->bio == NULL) 392 if (card->bio == NULL)
391 card->biotail = &card->bio; 393 card->biotail = &card->bio;
@@ -394,15 +396,17 @@ static int add_bio(struct cardinfo *card)
394 } 396 }
395 if (!bio) 397 if (!bio)
396 return 0; 398 return 0;
399 idx = card->current_idx;
397 400
398 rw = bio_rw(bio); 401 rw = bio_rw(bio);
399 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE) 402 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
400 return 0; 403 return 0;
401 404
402 len = bio_iovec(bio)->bv_len; 405 vec = bio_iovec_idx(bio, idx);
403 dma_handle = pci_map_page(card->dev, 406 len = vec->bv_len;
404 bio_page(bio), 407 dma_handle = pci_map_page(card->dev,
405 bio_offset(bio), 408 vec->bv_page,
409 vec->bv_offset,
406 len, 410 len,
407 (rw==READ) ? 411 (rw==READ) ?
408 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); 412 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
@@ -410,6 +414,8 @@ static int add_bio(struct cardinfo *card)
410 p = &card->mm_pages[card->Ready]; 414 p = &card->mm_pages[card->Ready];
411 desc = &p->desc[p->cnt]; 415 desc = &p->desc[p->cnt];
412 p->cnt++; 416 p->cnt++;
417 if (p->bio == NULL)
418 p->idx = idx;
413 if ((p->biotail) != &bio->bi_next) { 419 if ((p->biotail) != &bio->bi_next) {
414 *(p->biotail) = bio; 420 *(p->biotail) = bio;
415 p->biotail = &(bio->bi_next); 421 p->biotail = &(bio->bi_next);
@@ -419,7 +425,7 @@ static int add_bio(struct cardinfo *card)
419 desc->data_dma_handle = dma_handle; 425 desc->data_dma_handle = dma_handle;
420 426
421 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle); 427 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
422 desc->local_addr= cpu_to_le64(bio->bi_sector << 9); 428 desc->local_addr = cpu_to_le64(card->current_sector << 9);
423 desc->transfer_size = cpu_to_le32(len); 429 desc->transfer_size = cpu_to_le32(len);
424 offset = ( ((char*)&desc->sem_control_bits) - ((char*)p->desc)); 430 offset = ( ((char*)&desc->sem_control_bits) - ((char*)p->desc));
425 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset)); 431 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
@@ -435,10 +441,10 @@ static int add_bio(struct cardinfo *card)
435 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ); 441 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
436 desc->sem_control_bits = desc->control_bits; 442 desc->sem_control_bits = desc->control_bits;
437 443
438 bio->bi_sector += (len>>9); 444 card->current_sector += (len >> 9);
439 bio->bi_size -= len; 445 idx++;
440 bio->bi_idx++; 446 card->current_idx = idx;
441 if (bio->bi_idx >= bio->bi_vcnt) 447 if (idx >= bio->bi_vcnt)
442 card->currentbio = NULL; 448 card->currentbio = NULL;
443 449
444 return 1; 450 return 1;
@@ -461,7 +467,7 @@ static void process_page(unsigned long data)
461 if (card->Active < 0) 467 if (card->Active < 0)
462 goto out_unlock; 468 goto out_unlock;
463 page = &card->mm_pages[card->Active]; 469 page = &card->mm_pages[card->Active];
464 470
465 while (page->headcnt < page->cnt) { 471 while (page->headcnt < page->cnt) {
466 struct bio *bio = page->bio; 472 struct bio *bio = page->bio;
467 struct mm_dma_desc *desc = &page->desc[page->headcnt]; 473 struct mm_dma_desc *desc = &page->desc[page->headcnt];
@@ -471,32 +477,34 @@ static void process_page(unsigned long data)
471 477
472 if (!(control & DMASCR_DMA_COMPLETE)) { 478 if (!(control & DMASCR_DMA_COMPLETE)) {
473 control = dma_status; 479 control = dma_status;
474 last=1; 480 last=1;
475 } 481 }
476 page->headcnt++; 482 page->headcnt++;
477 idx = bio->bi_phys_segments; 483 idx = page->idx;
478 bio->bi_phys_segments++; 484 page->idx++;
479 if (bio->bi_phys_segments >= bio->bi_vcnt) 485 if (page->idx >= bio->bi_vcnt) {
480 page->bio = bio->bi_next; 486 page->bio = bio->bi_next;
487 page->idx = page->bio->bi_idx;
488 }
481 489
482 pci_unmap_page(card->dev, desc->data_dma_handle, 490 pci_unmap_page(card->dev, desc->data_dma_handle,
483 bio_iovec_idx(bio,idx)->bv_len, 491 bio_iovec_idx(bio,idx)->bv_len,
484 (control& DMASCR_TRANSFER_READ) ? 492 (control& DMASCR_TRANSFER_READ) ?
485 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 493 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
486 if (control & DMASCR_HARD_ERROR) { 494 if (control & DMASCR_HARD_ERROR) {
487 /* error */ 495 /* error */
488 clear_bit(BIO_UPTODATE, &bio->bi_flags); 496 clear_bit(BIO_UPTODATE, &bio->bi_flags);
489 printk(KERN_WARNING "MM%d: I/O error on sector %d/%d\n", 497 dev_printk(KERN_WARNING, &card->dev->dev,
490 card->card_number, 498 "I/O error on sector %d/%d\n",
491 le32_to_cpu(desc->local_addr)>>9, 499 le32_to_cpu(desc->local_addr)>>9,
492 le32_to_cpu(desc->transfer_size)); 500 le32_to_cpu(desc->transfer_size));
493 dump_dmastat(card, control); 501 dump_dmastat(card, control);
494 } else if (test_bit(BIO_RW, &bio->bi_rw) && 502 } else if (test_bit(BIO_RW, &bio->bi_rw) &&
495 le32_to_cpu(desc->local_addr)>>9 == card->init_size) { 503 le32_to_cpu(desc->local_addr)>>9 == card->init_size) {
496 card->init_size += le32_to_cpu(desc->transfer_size)>>9; 504 card->init_size += le32_to_cpu(desc->transfer_size)>>9;
497 if (card->init_size>>1 >= card->mm_size) { 505 if (card->init_size>>1 >= card->mm_size) {
498 printk(KERN_INFO "MM%d: memory now initialised\n", 506 dev_printk(KERN_INFO, &card->dev->dev,
499 card->card_number); 507 "memory now initialised\n");
500 set_userbit(card, MEMORY_INITIALIZED, 1); 508 set_userbit(card, MEMORY_INITIALIZED, 1);
501 } 509 }
502 } 510 }
@@ -532,7 +540,7 @@ static void process_page(unsigned long data)
532 540
533 return_bio = bio->bi_next; 541 return_bio = bio->bi_next;
534 bio->bi_next = NULL; 542 bio->bi_next = NULL;
535 bio_endio(bio, bio->bi_size, 0); 543 bio_endio(bio, 0);
536 } 544 }
537} 545}
538 546
@@ -547,7 +555,6 @@ static int mm_make_request(struct request_queue *q, struct bio *bio)
547 pr_debug("mm_make_request %llu %u\n", 555 pr_debug("mm_make_request %llu %u\n",
548 (unsigned long long)bio->bi_sector, bio->bi_size); 556 (unsigned long long)bio->bi_sector, bio->bi_size);
549 557
550 bio->bi_phys_segments = bio->bi_idx; /* count of completed segments*/
551 spin_lock_irq(&card->lock); 558 spin_lock_irq(&card->lock);
552 *card->biotail = bio; 559 *card->biotail = bio;
553 bio->bi_next = NULL; 560 bio->bi_next = NULL;
@@ -585,7 +592,7 @@ HW_TRACE(0x30);
585 else 592 else
586 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16, 593 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
587 card->csr_remap+ DMA_STATUS_CTRL + 2); 594 card->csr_remap+ DMA_STATUS_CTRL + 2);
588 595
589 /* log errors and clear interrupt status */ 596 /* log errors and clear interrupt status */
590 if (dma_status & DMASCR_ANY_ERR) { 597 if (dma_status & DMASCR_ANY_ERR) {
591 unsigned int data_log1, data_log2; 598 unsigned int data_log1, data_log2;
@@ -606,46 +613,51 @@ HW_TRACE(0x30);
606 dump_dmastat(card, dma_status); 613 dump_dmastat(card, dma_status);
607 614
608 if (stat & 0x01) 615 if (stat & 0x01)
609 printk(KERN_ERR "MM%d*: Memory access error detected (err count %d)\n", 616 dev_printk(KERN_ERR, &card->dev->dev,
610 card->card_number, count); 617 "Memory access error detected (err count %d)\n",
618 count);
611 if (stat & 0x02) 619 if (stat & 0x02)
612 printk(KERN_ERR "MM%d*: Multi-bit EDC error\n", 620 dev_printk(KERN_ERR, &card->dev->dev,
613 card->card_number); 621 "Multi-bit EDC error\n");
614 622
615 printk(KERN_ERR "MM%d*: Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n", 623 dev_printk(KERN_ERR, &card->dev->dev,
616 card->card_number, addr_log2, addr_log1, data_log2, data_log1); 624 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
617 printk(KERN_ERR "MM%d*: Fault Check 0x%02x, Fault Syndrome 0x%02x\n", 625 addr_log2, addr_log1, data_log2, data_log1);
618 card->card_number, check, syndrome); 626 dev_printk(KERN_ERR, &card->dev->dev,
627 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
628 check, syndrome);
619 629
620 writeb(0, card->csr_remap + ERROR_COUNT); 630 writeb(0, card->csr_remap + ERROR_COUNT);
621 } 631 }
622 632
623 if (dma_status & DMASCR_PARITY_ERR_REP) { 633 if (dma_status & DMASCR_PARITY_ERR_REP) {
624 printk(KERN_ERR "MM%d*: PARITY ERROR REPORTED\n", card->card_number); 634 dev_printk(KERN_ERR, &card->dev->dev,
635 "PARITY ERROR REPORTED\n");
625 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 636 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
626 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 637 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
627 } 638 }
628 639
629 if (dma_status & DMASCR_PARITY_ERR_DET) { 640 if (dma_status & DMASCR_PARITY_ERR_DET) {
630 printk(KERN_ERR "MM%d*: PARITY ERROR DETECTED\n", card->card_number); 641 dev_printk(KERN_ERR, &card->dev->dev,
642 "PARITY ERROR DETECTED\n");
631 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 643 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
632 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 644 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
633 } 645 }
634 646
635 if (dma_status & DMASCR_SYSTEM_ERR_SIG) { 647 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
636 printk(KERN_ERR "MM%d*: SYSTEM ERROR\n", card->card_number); 648 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
637 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 649 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
638 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 650 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
639 } 651 }
640 652
641 if (dma_status & DMASCR_TARGET_ABT) { 653 if (dma_status & DMASCR_TARGET_ABT) {
642 printk(KERN_ERR "MM%d*: TARGET ABORT\n", card->card_number); 654 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
643 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 655 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
644 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 656 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
645 } 657 }
646 658
647 if (dma_status & DMASCR_MASTER_ABT) { 659 if (dma_status & DMASCR_MASTER_ABT) {
648 printk(KERN_ERR "MM%d*: MASTER ABORT\n", card->card_number); 660 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
649 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 661 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
650 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 662 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
651 } 663 }
@@ -656,7 +668,7 @@ HW_TRACE(0x30);
656 668
657HW_TRACE(0x36); 669HW_TRACE(0x36);
658 670
659 return IRQ_HANDLED; 671 return IRQ_HANDLED;
660} 672}
661/* 673/*
662----------------------------------------------------------------------------------- 674-----------------------------------------------------------------------------------
@@ -696,20 +708,20 @@ static int check_battery(struct cardinfo *card, int battery, int status)
696 card->battery[battery].last_change = jiffies; 708 card->battery[battery].last_change = jiffies;
697 709
698 if (card->battery[battery].good) { 710 if (card->battery[battery].good) {
699 printk(KERN_ERR "MM%d: Battery %d now good\n", 711 dev_printk(KERN_ERR, &card->dev->dev,
700 card->card_number, battery + 1); 712 "Battery %d now good\n", battery + 1);
701 card->battery[battery].warned = 0; 713 card->battery[battery].warned = 0;
702 } else 714 } else
703 printk(KERN_ERR "MM%d: Battery %d now FAILED\n", 715 dev_printk(KERN_ERR, &card->dev->dev,
704 card->card_number, battery + 1); 716 "Battery %d now FAILED\n", battery + 1);
705 717
706 return 1; 718 return 1;
707 } else if (!card->battery[battery].good && 719 } else if (!card->battery[battery].good &&
708 !card->battery[battery].warned && 720 !card->battery[battery].warned &&
709 time_after_eq(jiffies, card->battery[battery].last_change + 721 time_after_eq(jiffies, card->battery[battery].last_change +
710 (HZ * 60 * 60 * 5))) { 722 (HZ * 60 * 60 * 5))) {
711 printk(KERN_ERR "MM%d: Battery %d still FAILED after 5 hours\n", 723 dev_printk(KERN_ERR, &card->dev->dev,
712 card->card_number, battery + 1); 724 "Battery %d still FAILED after 5 hours\n", battery + 1);
713 card->battery[battery].warned = 1; 725 card->battery[battery].warned = 1;
714 726
715 return 1; 727 return 1;
@@ -733,8 +745,8 @@ static void check_batteries(struct cardinfo *card)
733 745
734 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); 746 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
735 if (debug & DEBUG_BATTERY_POLLING) 747 if (debug & DEBUG_BATTERY_POLLING)
736 printk(KERN_DEBUG "MM%d: checking battery status, 1 = %s, 2 = %s\n", 748 dev_printk(KERN_DEBUG, &card->dev->dev,
737 card->card_number, 749 "checking battery status, 1 = %s, 2 = %s\n",
738 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK", 750 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
739 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK"); 751 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
740 752
@@ -749,7 +761,7 @@ static void check_all_batteries(unsigned long ptr)
749{ 761{
750 int i; 762 int i;
751 763
752 for (i = 0; i < num_cards; i++) 764 for (i = 0; i < num_cards; i++)
753 if (!(cards[i].flags & UM_FLAG_NO_BATT)) { 765 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
754 struct cardinfo *card = &cards[i]; 766 struct cardinfo *card = &cards[i];
755 spin_lock_bh(&card->lock); 767 spin_lock_bh(&card->lock);
@@ -853,45 +865,56 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
853 unsigned char mem_present; 865 unsigned char mem_present;
854 unsigned char batt_status; 866 unsigned char batt_status;
855 unsigned int saved_bar, data; 867 unsigned int saved_bar, data;
868 unsigned long csr_base;
869 unsigned long csr_len;
856 int magic_number; 870 int magic_number;
871 static int printed_version;
857 872
858 if (pci_enable_device(dev) < 0) 873 if (!printed_version++)
859 return -ENODEV; 874 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
875
876 ret = pci_enable_device(dev);
877 if (ret)
878 return ret;
860 879
861 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8); 880 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
862 pci_set_master(dev); 881 pci_set_master(dev);
863 882
864 card->dev = dev; 883 card->dev = dev;
865 card->card_number = num_cards;
866 884
867 card->csr_base = pci_resource_start(dev, 0); 885 csr_base = pci_resource_start(dev, 0);
868 card->csr_len = pci_resource_len(dev, 0); 886 csr_len = pci_resource_len(dev, 0);
887 if (!csr_base || !csr_len)
888 return -ENODEV;
869 889
870 printk(KERN_INFO "Micro Memory(tm) controller #%d found at %02x:%02x (PCI Mem Module (Battery Backup))\n", 890 dev_printk(KERN_INFO, &dev->dev,
871 card->card_number, dev->bus->number, dev->devfn); 891 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
872 892
873 if (pci_set_dma_mask(dev, DMA_64BIT_MASK) && 893 if (pci_set_dma_mask(dev, DMA_64BIT_MASK) &&
874 pci_set_dma_mask(dev, DMA_32BIT_MASK)) { 894 pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
875 printk(KERN_WARNING "MM%d: NO suitable DMA found\n",num_cards); 895 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
876 return -ENOMEM; 896 return -ENOMEM;
877 } 897 }
878 if (!request_mem_region(card->csr_base, card->csr_len, "Micro Memory")) {
879 printk(KERN_ERR "MM%d: Unable to request memory region\n", card->card_number);
880 ret = -ENOMEM;
881 898
899 ret = pci_request_regions(dev, DRIVER_NAME);
900 if (ret) {
901 dev_printk(KERN_ERR, &card->dev->dev,
902 "Unable to request memory region\n");
882 goto failed_req_csr; 903 goto failed_req_csr;
883 } 904 }
884 905
885 card->csr_remap = ioremap_nocache(card->csr_base, card->csr_len); 906 card->csr_remap = ioremap_nocache(csr_base, csr_len);
886 if (!card->csr_remap) { 907 if (!card->csr_remap) {
887 printk(KERN_ERR "MM%d: Unable to remap memory region\n", card->card_number); 908 dev_printk(KERN_ERR, &card->dev->dev,
909 "Unable to remap memory region\n");
888 ret = -ENOMEM; 910 ret = -ENOMEM;
889 911
890 goto failed_remap_csr; 912 goto failed_remap_csr;
891 } 913 }
892 914
893 printk(KERN_INFO "MM%d: CSR 0x%08lx -> 0x%p (0x%lx)\n", card->card_number, 915 dev_printk(KERN_INFO, &card->dev->dev,
894 card->csr_base, card->csr_remap, card->csr_len); 916 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
917 csr_base, card->csr_remap, csr_len);
895 918
896 switch(card->dev->device) { 919 switch(card->dev->device) {
897 case 0x5415: 920 case 0x5415:
@@ -915,7 +938,7 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
915 } 938 }
916 939
917 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) { 940 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
918 printk(KERN_ERR "MM%d: Magic number invalid\n", card->card_number); 941 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
919 ret = -ENOMEM; 942 ret = -ENOMEM;
920 goto failed_magic; 943 goto failed_magic;
921 } 944 }
@@ -928,7 +951,7 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
928 &card->mm_pages[1].page_dma); 951 &card->mm_pages[1].page_dma);
929 if (card->mm_pages[0].desc == NULL || 952 if (card->mm_pages[0].desc == NULL ||
930 card->mm_pages[1].desc == NULL) { 953 card->mm_pages[1].desc == NULL) {
931 printk(KERN_ERR "MM%d: alloc failed\n", card->card_number); 954 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
932 goto failed_alloc; 955 goto failed_alloc;
933 } 956 }
934 reset_page(&card->mm_pages[0]); 957 reset_page(&card->mm_pages[0]);
@@ -949,7 +972,7 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
949 tasklet_init(&card->tasklet, process_page, (unsigned long)card); 972 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
950 973
951 card->check_batteries = 0; 974 card->check_batteries = 0;
952 975
953 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY); 976 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
954 switch (mem_present) { 977 switch (mem_present) {
955 case MEM_128_MB: 978 case MEM_128_MB:
@@ -982,12 +1005,13 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
982 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE); 1005 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
983 card->battery[0].last_change = card->battery[1].last_change = jiffies; 1006 card->battery[0].last_change = card->battery[1].last_change = jiffies;
984 1007
985 if (card->flags & UM_FLAG_NO_BATT) 1008 if (card->flags & UM_FLAG_NO_BATT)
986 printk(KERN_INFO "MM%d: Size %d KB\n", 1009 dev_printk(KERN_INFO, &card->dev->dev,
987 card->card_number, card->mm_size); 1010 "Size %d KB\n", card->mm_size);
988 else { 1011 else {
989 printk(KERN_INFO "MM%d: Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n", 1012 dev_printk(KERN_INFO, &card->dev->dev,
990 card->card_number, card->mm_size, 1013 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
1014 card->mm_size,
991 (batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled"), 1015 (batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled"),
992 card->battery[0].good ? "OK" : "FAILURE", 1016 card->battery[0].good ? "OK" : "FAILURE",
993 (batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled"), 1017 (batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled"),
@@ -1005,19 +1029,16 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
1005 data = ~data; 1029 data = ~data;
1006 data += 1; 1030 data += 1;
1007 1031
1008 card->win_size = data; 1032 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME, card)) {
1009 1033 dev_printk(KERN_ERR, &card->dev->dev,
1010 1034 "Unable to allocate IRQ\n");
1011 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, "pci-umem", card)) {
1012 printk(KERN_ERR "MM%d: Unable to allocate IRQ\n", card->card_number);
1013 ret = -ENODEV; 1035 ret = -ENODEV;
1014 1036
1015 goto failed_req_irq; 1037 goto failed_req_irq;
1016 } 1038 }
1017 1039
1018 card->irq = dev->irq; 1040 dev_printk(KERN_INFO, &card->dev->dev,
1019 printk(KERN_INFO "MM%d: Window size %d bytes, IRQ %d\n", card->card_number, 1041 "Window size %d bytes, IRQ %d\n", data, dev->irq);
1020 card->win_size, card->irq);
1021 1042
1022 spin_lock_init(&card->lock); 1043 spin_lock_init(&card->lock);
1023 1044
@@ -1037,10 +1058,12 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
1037 num_cards++; 1058 num_cards++;
1038 1059
1039 if (!get_userbit(card, MEMORY_INITIALIZED)) { 1060 if (!get_userbit(card, MEMORY_INITIALIZED)) {
1040 printk(KERN_INFO "MM%d: memory NOT initialized. Consider over-writing whole device.\n", card->card_number); 1061 dev_printk(KERN_INFO, &card->dev->dev,
1062 "memory NOT initialized. Consider over-writing whole device.\n");
1041 card->init_size = 0; 1063 card->init_size = 0;
1042 } else { 1064 } else {
1043 printk(KERN_INFO "MM%d: memory already initialized\n", card->card_number); 1065 dev_printk(KERN_INFO, &card->dev->dev,
1066 "memory already initialized\n");
1044 card->init_size = card->mm_size; 1067 card->init_size = card->mm_size;
1045 } 1068 }
1046 1069
@@ -1062,7 +1085,7 @@ static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_i
1062 failed_magic: 1085 failed_magic:
1063 iounmap(card->csr_remap); 1086 iounmap(card->csr_remap);
1064 failed_remap_csr: 1087 failed_remap_csr:
1065 release_mem_region(card->csr_base, card->csr_len); 1088 pci_release_regions(dev);
1066 failed_req_csr: 1089 failed_req_csr:
1067 1090
1068 return ret; 1091 return ret;
@@ -1077,9 +1100,8 @@ static void mm_pci_remove(struct pci_dev *dev)
1077 struct cardinfo *card = pci_get_drvdata(dev); 1100 struct cardinfo *card = pci_get_drvdata(dev);
1078 1101
1079 tasklet_kill(&card->tasklet); 1102 tasklet_kill(&card->tasklet);
1103 free_irq(dev->irq, card);
1080 iounmap(card->csr_remap); 1104 iounmap(card->csr_remap);
1081 release_mem_region(card->csr_base, card->csr_len);
1082 free_irq(card->irq, card);
1083 1105
1084 if (card->mm_pages[0].desc) 1106 if (card->mm_pages[0].desc)
1085 pci_free_consistent(card->dev, PAGE_SIZE*2, 1107 pci_free_consistent(card->dev, PAGE_SIZE*2,
@@ -1090,6 +1112,9 @@ static void mm_pci_remove(struct pci_dev *dev)
1090 card->mm_pages[1].desc, 1112 card->mm_pages[1].desc,
1091 card->mm_pages[1].page_dma); 1113 card->mm_pages[1].page_dma);
1092 blk_cleanup_queue(card->queue); 1114 blk_cleanup_queue(card->queue);
1115
1116 pci_release_regions(dev);
1117 pci_disable_device(dev);
1093} 1118}
1094 1119
1095static const struct pci_device_id mm_pci_ids[] = { 1120static const struct pci_device_id mm_pci_ids[] = {
@@ -1109,11 +1134,12 @@ static const struct pci_device_id mm_pci_ids[] = {
1109MODULE_DEVICE_TABLE(pci, mm_pci_ids); 1134MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1110 1135
1111static struct pci_driver mm_pci_driver = { 1136static struct pci_driver mm_pci_driver = {
1112 .name = "umem", 1137 .name = DRIVER_NAME,
1113 .id_table = mm_pci_ids, 1138 .id_table = mm_pci_ids,
1114 .probe = mm_pci_probe, 1139 .probe = mm_pci_probe,
1115 .remove = mm_pci_remove, 1140 .remove = mm_pci_remove,
1116}; 1141};
1142
1117/* 1143/*
1118----------------------------------------------------------------------------------- 1144-----------------------------------------------------------------------------------
1119-- mm_init 1145-- mm_init
@@ -1125,13 +1151,11 @@ static int __init mm_init(void)
1125 int retval, i; 1151 int retval, i;
1126 int err; 1152 int err;
1127 1153
1128 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
1129
1130 retval = pci_register_driver(&mm_pci_driver); 1154 retval = pci_register_driver(&mm_pci_driver);
1131 if (retval) 1155 if (retval)
1132 return -ENOMEM; 1156 return -ENOMEM;
1133 1157
1134 err = major_nr = register_blkdev(0, "umem"); 1158 err = major_nr = register_blkdev(0, DRIVER_NAME);
1135 if (err < 0) { 1159 if (err < 0) {
1136 pci_unregister_driver(&mm_pci_driver); 1160 pci_unregister_driver(&mm_pci_driver);
1137 return -EIO; 1161 return -EIO;
@@ -1157,13 +1181,13 @@ static int __init mm_init(void)
1157 } 1181 }
1158 1182
1159 init_battery_timer(); 1183 init_battery_timer();
1160 printk("MM: desc_per_page = %ld\n", DESC_PER_PAGE); 1184 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1161/* printk("mm_init: Done. 10-19-01 9:00\n"); */ 1185/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1162 return 0; 1186 return 0;
1163 1187
1164out: 1188out:
1165 pci_unregister_driver(&mm_pci_driver); 1189 pci_unregister_driver(&mm_pci_driver);
1166 unregister_blkdev(major_nr, "umem"); 1190 unregister_blkdev(major_nr, DRIVER_NAME);
1167 while (i--) 1191 while (i--)
1168 put_disk(mm_gendisk[i]); 1192 put_disk(mm_gendisk[i]);
1169 return -ENOMEM; 1193 return -ENOMEM;
@@ -1186,7 +1210,7 @@ static void __exit mm_cleanup(void)
1186 1210
1187 pci_unregister_driver(&mm_pci_driver); 1211 pci_unregister_driver(&mm_pci_driver);
1188 1212
1189 unregister_blkdev(major_nr, "umem"); 1213 unregister_blkdev(major_nr, DRIVER_NAME);
1190} 1214}
1191 1215
1192module_init(mm_init); 1216module_init(mm_init);
diff --git a/drivers/block/umem.h b/drivers/block/umem.h
new file mode 100644
index 000000000000..375c68974c9a
--- /dev/null
+++ b/drivers/block/umem.h
@@ -0,0 +1,133 @@
1
2/*
3 * This file contains defines for the
4 * Micro Memory MM5415
5 * family PCI Memory Module with Battery Backup.
6 *
7 * Copyright Micro Memory INC 2001. All rights reserved.
8 * Release under the terms of the GNU GENERAL PUBLIC LICENSE version 2.
9 * See the file COPYING.
10 */
11
12#ifndef _DRIVERS_BLOCK_MM_H
13#define _DRIVERS_BLOCK_MM_H
14
15
16#define IRQ_TIMEOUT (1 * HZ)
17
18/* CSR register definition */
19#define MEMCTRLSTATUS_MAGIC 0x00
20#define MM_MAGIC_VALUE (unsigned char)0x59
21
22#define MEMCTRLSTATUS_BATTERY 0x04
23#define BATTERY_1_DISABLED 0x01
24#define BATTERY_1_FAILURE 0x02
25#define BATTERY_2_DISABLED 0x04
26#define BATTERY_2_FAILURE 0x08
27
28#define MEMCTRLSTATUS_MEMORY 0x07
29#define MEM_128_MB 0xfe
30#define MEM_256_MB 0xfc
31#define MEM_512_MB 0xf8
32#define MEM_1_GB 0xf0
33#define MEM_2_GB 0xe0
34
35#define MEMCTRLCMD_LEDCTRL 0x08
36#define LED_REMOVE 2
37#define LED_FAULT 4
38#define LED_POWER 6
39#define LED_FLIP 255
40#define LED_OFF 0x00
41#define LED_ON 0x01
42#define LED_FLASH_3_5 0x02
43#define LED_FLASH_7_0 0x03
44#define LED_POWER_ON 0x00
45#define LED_POWER_OFF 0x01
46#define USER_BIT1 0x01
47#define USER_BIT2 0x02
48
49#define MEMORY_INITIALIZED USER_BIT1
50
51#define MEMCTRLCMD_ERRCTRL 0x0C
52#define EDC_NONE_DEFAULT 0x00
53#define EDC_NONE 0x01
54#define EDC_STORE_READ 0x02
55#define EDC_STORE_CORRECT 0x03
56
57#define MEMCTRLCMD_ERRCNT 0x0D
58#define MEMCTRLCMD_ERRSTATUS 0x0E
59
60#define ERROR_DATA_LOG 0x20
61#define ERROR_ADDR_LOG 0x28
62#define ERROR_COUNT 0x3D
63#define ERROR_SYNDROME 0x3E
64#define ERROR_CHECK 0x3F
65
66#define DMA_PCI_ADDR 0x40
67#define DMA_LOCAL_ADDR 0x48
68#define DMA_TRANSFER_SIZE 0x50
69#define DMA_DESCRIPTOR_ADDR 0x58
70#define DMA_SEMAPHORE_ADDR 0x60
71#define DMA_STATUS_CTRL 0x68
72#define DMASCR_GO 0x00001
73#define DMASCR_TRANSFER_READ 0x00002
74#define DMASCR_CHAIN_EN 0x00004
75#define DMASCR_SEM_EN 0x00010
76#define DMASCR_DMA_COMP_EN 0x00020
77#define DMASCR_CHAIN_COMP_EN 0x00040
78#define DMASCR_ERR_INT_EN 0x00080
79#define DMASCR_PARITY_INT_EN 0x00100
80#define DMASCR_ANY_ERR 0x00800
81#define DMASCR_MBE_ERR 0x01000
82#define DMASCR_PARITY_ERR_REP 0x02000
83#define DMASCR_PARITY_ERR_DET 0x04000
84#define DMASCR_SYSTEM_ERR_SIG 0x08000
85#define DMASCR_TARGET_ABT 0x10000
86#define DMASCR_MASTER_ABT 0x20000
87#define DMASCR_DMA_COMPLETE 0x40000
88#define DMASCR_CHAIN_COMPLETE 0x80000
89
90/*
913.SOME PCs HAVE HOST BRIDGES WHICH APPARENTLY DO NOT CORRECTLY HANDLE
92READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA
93TRANSFERS. IN OTHER SYSTEMS THESE COMMAND CODES WILL CAUSE THE HOST BRIDGE
94TO ALLOW LONGER BURSTS DURING DMA READ OPERATIONS. THE UPPER FOUR BITS
95(31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6,
96AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING
97DMA READ OPERATIONS.
98*/
99#define DMASCR_READ 0x60000000
100#define DMASCR_READLINE 0xE0000000
101#define DMASCR_READMULTI 0xC0000000
102
103
104#define DMASCR_ERROR_MASK (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR | DMASCR_ANY_ERR)
105#define DMASCR_HARD_ERROR (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR)
106
107#define WINDOWMAP_WINNUM 0x7B
108
109#define DMA_READ_FROM_HOST 0
110#define DMA_WRITE_TO_HOST 1
111
112struct mm_dma_desc {
113 __le64 pci_addr;
114 __le64 local_addr;
115 __le32 transfer_size;
116 u32 zero1;
117 __le64 next_desc_addr;
118 __le64 sem_addr;
119 __le32 control_bits;
120 u32 zero2;
121
122 dma_addr_t data_dma_handle;
123
124 /* Copy of the bits */
125 __le64 sem_control_bits;
126} __attribute__((aligned(8)));
127
128/* bits for card->flags */
129#define UM_FLAG_DMA_IN_REGS 1
130#define UM_FLAG_NO_BYTE_STATUS 2
131#define UM_FLAG_NO_BATTREG 4
132#define UM_FLAG_NO_BATT 8
133#endif
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 964e51634f2d..2bdebcb3ff16 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -150,9 +150,8 @@ static int blkif_queue_request(struct request *req)
150 struct blkfront_info *info = req->rq_disk->private_data; 150 struct blkfront_info *info = req->rq_disk->private_data;
151 unsigned long buffer_mfn; 151 unsigned long buffer_mfn;
152 struct blkif_request *ring_req; 152 struct blkif_request *ring_req;
153 struct bio *bio; 153 struct req_iterator iter;
154 struct bio_vec *bvec; 154 struct bio_vec *bvec;
155 int idx;
156 unsigned long id; 155 unsigned long id;
157 unsigned int fsect, lsect; 156 unsigned int fsect, lsect;
158 int ref; 157 int ref;
@@ -186,34 +185,31 @@ static int blkif_queue_request(struct request *req)
186 ring_req->operation = BLKIF_OP_WRITE_BARRIER; 185 ring_req->operation = BLKIF_OP_WRITE_BARRIER;
187 186
188 ring_req->nr_segments = 0; 187 ring_req->nr_segments = 0;
189 rq_for_each_bio (bio, req) { 188 rq_for_each_segment(bvec, req, iter) {
190 bio_for_each_segment (bvec, bio, idx) { 189 BUG_ON(ring_req->nr_segments == BLKIF_MAX_SEGMENTS_PER_REQUEST);
191 BUG_ON(ring_req->nr_segments 190 buffer_mfn = pfn_to_mfn(page_to_pfn(bvec->bv_page));
192 == BLKIF_MAX_SEGMENTS_PER_REQUEST); 191 fsect = bvec->bv_offset >> 9;
193 buffer_mfn = pfn_to_mfn(page_to_pfn(bvec->bv_page)); 192 lsect = fsect + (bvec->bv_len >> 9) - 1;
194 fsect = bvec->bv_offset >> 9; 193 /* install a grant reference. */
195 lsect = fsect + (bvec->bv_len >> 9) - 1; 194 ref = gnttab_claim_grant_reference(&gref_head);
196 /* install a grant reference. */ 195 BUG_ON(ref == -ENOSPC);
197 ref = gnttab_claim_grant_reference(&gref_head); 196
198 BUG_ON(ref == -ENOSPC); 197 gnttab_grant_foreign_access_ref(
199
200 gnttab_grant_foreign_access_ref(
201 ref, 198 ref,
202 info->xbdev->otherend_id, 199 info->xbdev->otherend_id,
203 buffer_mfn, 200 buffer_mfn,
204 rq_data_dir(req) ); 201 rq_data_dir(req) );
205 202
206 info->shadow[id].frame[ring_req->nr_segments] = 203 info->shadow[id].frame[ring_req->nr_segments] =
207 mfn_to_pfn(buffer_mfn); 204 mfn_to_pfn(buffer_mfn);
208 205
209 ring_req->seg[ring_req->nr_segments] = 206 ring_req->seg[ring_req->nr_segments] =
210 (struct blkif_request_segment) { 207 (struct blkif_request_segment) {
211 .gref = ref, 208 .gref = ref,
212 .first_sect = fsect, 209 .first_sect = fsect,
213 .last_sect = lsect }; 210 .last_sect = lsect };
214 211
215 ring_req->nr_segments++; 212 ring_req->nr_segments++;
216 }
217 } 213 }
218 214
219 info->ring.req_prod_pvt++; 215 info->ring.req_prod_pvt++;
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c
index 3ede0b63da13..9e7652dcde6c 100644
--- a/drivers/block/xsysace.c
+++ b/drivers/block/xsysace.c
@@ -91,6 +91,10 @@
91#include <linux/blkdev.h> 91#include <linux/blkdev.h>
92#include <linux/hdreg.h> 92#include <linux/hdreg.h>
93#include <linux/platform_device.h> 93#include <linux/platform_device.h>
94#if defined(CONFIG_OF)
95#include <linux/of_device.h>
96#include <linux/of_platform.h>
97#endif
94 98
95MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); 99MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
96MODULE_DESCRIPTION("Xilinx SystemACE device driver"); 100MODULE_DESCRIPTION("Xilinx SystemACE device driver");
@@ -158,6 +162,9 @@ MODULE_LICENSE("GPL");
158#define ACE_FIFO_SIZE (32) 162#define ACE_FIFO_SIZE (32)
159#define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE) 163#define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
160 164
165#define ACE_BUS_WIDTH_8 0
166#define ACE_BUS_WIDTH_16 1
167
161struct ace_reg_ops; 168struct ace_reg_ops;
162 169
163struct ace_device { 170struct ace_device {
@@ -188,7 +195,7 @@ struct ace_device {
188 195
189 /* Details of hardware device */ 196 /* Details of hardware device */
190 unsigned long physaddr; 197 unsigned long physaddr;
191 void *baseaddr; 198 void __iomem *baseaddr;
192 int irq; 199 int irq;
193 int bus_width; /* 0 := 8 bit; 1 := 16 bit */ 200 int bus_width; /* 0 := 8 bit; 1 := 16 bit */
194 struct ace_reg_ops *reg_ops; 201 struct ace_reg_ops *reg_ops;
@@ -220,20 +227,20 @@ struct ace_reg_ops {
220/* 8 Bit bus width */ 227/* 8 Bit bus width */
221static u16 ace_in_8(struct ace_device *ace, int reg) 228static u16 ace_in_8(struct ace_device *ace, int reg)
222{ 229{
223 void *r = ace->baseaddr + reg; 230 void __iomem *r = ace->baseaddr + reg;
224 return in_8(r) | (in_8(r + 1) << 8); 231 return in_8(r) | (in_8(r + 1) << 8);
225} 232}
226 233
227static void ace_out_8(struct ace_device *ace, int reg, u16 val) 234static void ace_out_8(struct ace_device *ace, int reg, u16 val)
228{ 235{
229 void *r = ace->baseaddr + reg; 236 void __iomem *r = ace->baseaddr + reg;
230 out_8(r, val); 237 out_8(r, val);
231 out_8(r + 1, val >> 8); 238 out_8(r + 1, val >> 8);
232} 239}
233 240
234static void ace_datain_8(struct ace_device *ace) 241static void ace_datain_8(struct ace_device *ace)
235{ 242{
236 void *r = ace->baseaddr + 0x40; 243 void __iomem *r = ace->baseaddr + 0x40;
237 u8 *dst = ace->data_ptr; 244 u8 *dst = ace->data_ptr;
238 int i = ACE_FIFO_SIZE; 245 int i = ACE_FIFO_SIZE;
239 while (i--) 246 while (i--)
@@ -243,7 +250,7 @@ static void ace_datain_8(struct ace_device *ace)
243 250
244static void ace_dataout_8(struct ace_device *ace) 251static void ace_dataout_8(struct ace_device *ace)
245{ 252{
246 void *r = ace->baseaddr + 0x40; 253 void __iomem *r = ace->baseaddr + 0x40;
247 u8 *src = ace->data_ptr; 254 u8 *src = ace->data_ptr;
248 int i = ACE_FIFO_SIZE; 255 int i = ACE_FIFO_SIZE;
249 while (i--) 256 while (i--)
@@ -931,9 +938,11 @@ static int __devinit ace_setup(struct ace_device *ace)
931{ 938{
932 u16 version; 939 u16 version;
933 u16 val; 940 u16 val;
934
935 int rc; 941 int rc;
936 942
943 dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
944 dev_dbg(ace->dev, "physaddr=0x%lx irq=%i\n", ace->physaddr, ace->irq);
945
937 spin_lock_init(&ace->lock); 946 spin_lock_init(&ace->lock);
938 init_completion(&ace->id_completion); 947 init_completion(&ace->id_completion);
939 948
@@ -944,15 +953,6 @@ static int __devinit ace_setup(struct ace_device *ace)
944 if (!ace->baseaddr) 953 if (!ace->baseaddr)
945 goto err_ioremap; 954 goto err_ioremap;
946 955
947 if (ace->irq != NO_IRQ) {
948 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
949 if (rc) {
950 /* Failure - fall back to polled mode */
951 dev_err(ace->dev, "request_irq failed\n");
952 ace->irq = NO_IRQ;
953 }
954 }
955
956 /* 956 /*
957 * Initialize the state machine tasklet and stall timer 957 * Initialize the state machine tasklet and stall timer
958 */ 958 */
@@ -982,7 +982,7 @@ static int __devinit ace_setup(struct ace_device *ace)
982 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a'); 982 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
983 983
984 /* set bus width */ 984 /* set bus width */
985 if (ace->bus_width == 1) { 985 if (ace->bus_width == ACE_BUS_WIDTH_16) {
986 /* 0x0101 should work regardless of endianess */ 986 /* 0x0101 should work regardless of endianess */
987 ace_out_le16(ace, ACE_BUSMODE, 0x0101); 987 ace_out_le16(ace, ACE_BUSMODE, 0x0101);
988 988
@@ -1005,6 +1005,16 @@ static int __devinit ace_setup(struct ace_device *ace)
1005 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE | 1005 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE |
1006 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ); 1006 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ);
1007 1007
1008 /* Now we can hook up the irq handler */
1009 if (ace->irq != NO_IRQ) {
1010 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
1011 if (rc) {
1012 /* Failure - fall back to polled mode */
1013 dev_err(ace->dev, "request_irq failed\n");
1014 ace->irq = NO_IRQ;
1015 }
1016 }
1017
1008 /* Enable interrupts */ 1018 /* Enable interrupts */
1009 val = ace_in(ace, ACE_CTRL); 1019 val = ace_in(ace, ACE_CTRL);
1010 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ; 1020 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ;
@@ -1024,16 +1034,14 @@ static int __devinit ace_setup(struct ace_device *ace)
1024 1034
1025 return 0; 1035 return 0;
1026 1036
1027 err_read: 1037err_read:
1028 put_disk(ace->gd); 1038 put_disk(ace->gd);
1029 err_alloc_disk: 1039err_alloc_disk:
1030 blk_cleanup_queue(ace->queue); 1040 blk_cleanup_queue(ace->queue);
1031 err_blk_initq: 1041err_blk_initq:
1032 iounmap(ace->baseaddr); 1042 iounmap(ace->baseaddr);
1033 if (ace->irq != NO_IRQ) 1043err_ioremap:
1034 free_irq(ace->irq, ace); 1044 dev_info(ace->dev, "xsysace: error initializing device at 0x%lx\n",
1035 err_ioremap:
1036 printk(KERN_INFO "xsysace: error initializing device at 0x%lx\n",
1037 ace->physaddr); 1045 ace->physaddr);
1038 return -ENOMEM; 1046 return -ENOMEM;
1039} 1047}
@@ -1056,98 +1064,222 @@ static void __devexit ace_teardown(struct ace_device *ace)
1056 iounmap(ace->baseaddr); 1064 iounmap(ace->baseaddr);
1057} 1065}
1058 1066
1059/* --------------------------------------------------------------------- 1067static int __devinit
1060 * Platform Bus Support 1068ace_alloc(struct device *dev, int id, unsigned long physaddr,
1061 */ 1069 int irq, int bus_width)
1062
1063static int __devinit ace_probe(struct device *device)
1064{ 1070{
1065 struct platform_device *dev = to_platform_device(device);
1066 struct ace_device *ace; 1071 struct ace_device *ace;
1067 int i; 1072 int rc;
1073 dev_dbg(dev, "ace_alloc(%p)\n", dev);
1068 1074
1069 dev_dbg(device, "ace_probe(%p)\n", device); 1075 if (!physaddr) {
1076 rc = -ENODEV;
1077 goto err_noreg;
1078 }
1070 1079
1071 /* 1080 /* Allocate and initialize the ace device structure */
1072 * Allocate the ace device structure
1073 */
1074 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL); 1081 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL);
1075 if (!ace) 1082 if (!ace) {
1083 rc = -ENOMEM;
1076 goto err_alloc; 1084 goto err_alloc;
1077
1078 ace->dev = device;
1079 ace->id = dev->id;
1080 ace->irq = NO_IRQ;
1081
1082 for (i = 0; i < dev->num_resources; i++) {
1083 if (dev->resource[i].flags & IORESOURCE_MEM)
1084 ace->physaddr = dev->resource[i].start;
1085 if (dev->resource[i].flags & IORESOURCE_IRQ)
1086 ace->irq = dev->resource[i].start;
1087 } 1085 }
1088 1086
1089 /* FIXME: Should get bus_width from the platform_device struct */ 1087 ace->dev = dev;
1090 ace->bus_width = 1; 1088 ace->id = id;
1091 1089 ace->physaddr = physaddr;
1092 dev_set_drvdata(&dev->dev, ace); 1090 ace->irq = irq;
1091 ace->bus_width = bus_width;
1093 1092
1094 /* Call the bus-independant setup code */ 1093 /* Call the setup code */
1095 if (ace_setup(ace) != 0) 1094 rc = ace_setup(ace);
1095 if (rc)
1096 goto err_setup; 1096 goto err_setup;
1097 1097
1098 dev_set_drvdata(dev, ace);
1098 return 0; 1099 return 0;
1099 1100
1100 err_setup: 1101err_setup:
1101 dev_set_drvdata(&dev->dev, NULL); 1102 dev_set_drvdata(dev, NULL);
1102 kfree(ace); 1103 kfree(ace);
1103 err_alloc: 1104err_alloc:
1104 printk(KERN_ERR "xsysace: could not initialize device\n"); 1105err_noreg:
1105 return -ENOMEM; 1106 dev_err(dev, "could not initialize device, err=%i\n", rc);
1107 return rc;
1106} 1108}
1107 1109
1108/* 1110static void __devexit ace_free(struct device *dev)
1109 * Platform bus remove() method
1110 */
1111static int __devexit ace_remove(struct device *device)
1112{ 1111{
1113 struct ace_device *ace = dev_get_drvdata(device); 1112 struct ace_device *ace = dev_get_drvdata(dev);
1114 1113 dev_dbg(dev, "ace_free(%p)\n", dev);
1115 dev_dbg(device, "ace_remove(%p)\n", device);
1116 1114
1117 if (ace) { 1115 if (ace) {
1118 ace_teardown(ace); 1116 ace_teardown(ace);
1117 dev_set_drvdata(dev, NULL);
1119 kfree(ace); 1118 kfree(ace);
1120 } 1119 }
1120}
1121
1122/* ---------------------------------------------------------------------
1123 * Platform Bus Support
1124 */
1125
1126static int __devinit ace_probe(struct platform_device *dev)
1127{
1128 unsigned long physaddr = 0;
1129 int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
1130 int id = dev->id;
1131 int irq = NO_IRQ;
1132 int i;
1121 1133
1134 dev_dbg(&dev->dev, "ace_probe(%p)\n", dev);
1135
1136 for (i = 0; i < dev->num_resources; i++) {
1137 if (dev->resource[i].flags & IORESOURCE_MEM)
1138 physaddr = dev->resource[i].start;
1139 if (dev->resource[i].flags & IORESOURCE_IRQ)
1140 irq = dev->resource[i].start;
1141 }
1142
1143 /* Call the bus-independant setup code */
1144 return ace_alloc(&dev->dev, id, physaddr, irq, bus_width);
1145}
1146
1147/*
1148 * Platform bus remove() method
1149 */
1150static int __devexit ace_remove(struct platform_device *dev)
1151{
1152 ace_free(&dev->dev);
1122 return 0; 1153 return 0;
1123} 1154}
1124 1155
1125static struct device_driver ace_driver = { 1156static struct platform_driver ace_platform_driver = {
1126 .name = "xsysace",
1127 .bus = &platform_bus_type,
1128 .probe = ace_probe, 1157 .probe = ace_probe,
1129 .remove = __devexit_p(ace_remove), 1158 .remove = __devexit_p(ace_remove),
1159 .driver = {
1160 .owner = THIS_MODULE,
1161 .name = "xsysace",
1162 },
1163};
1164
1165/* ---------------------------------------------------------------------
1166 * OF_Platform Bus Support
1167 */
1168
1169#if defined(CONFIG_OF)
1170static int __devinit
1171ace_of_probe(struct of_device *op, const struct of_device_id *match)
1172{
1173 struct resource res;
1174 unsigned long physaddr;
1175 const u32 *id;
1176 int irq, bus_width, rc;
1177
1178 dev_dbg(&op->dev, "ace_of_probe(%p, %p)\n", op, match);
1179
1180 /* device id */
1181 id = of_get_property(op->node, "port-number", NULL);
1182
1183 /* physaddr */
1184 rc = of_address_to_resource(op->node, 0, &res);
1185 if (rc) {
1186 dev_err(&op->dev, "invalid address\n");
1187 return rc;
1188 }
1189 physaddr = res.start;
1190
1191 /* irq */
1192 irq = irq_of_parse_and_map(op->node, 0);
1193
1194 /* bus width */
1195 bus_width = ACE_BUS_WIDTH_16;
1196 if (of_find_property(op->node, "8-bit", NULL))
1197 bus_width = ACE_BUS_WIDTH_8;
1198
1199 /* Call the bus-independant setup code */
1200 return ace_alloc(&op->dev, id ? *id : 0, physaddr, irq, bus_width);
1201}
1202
1203static int __devexit ace_of_remove(struct of_device *op)
1204{
1205 ace_free(&op->dev);
1206 return 0;
1207}
1208
1209/* Match table for of_platform binding */
1210static struct of_device_id __devinit ace_of_match[] = {
1211 { .compatible = "xilinx,xsysace", },
1212 {},
1213};
1214MODULE_DEVICE_TABLE(of, ace_of_match);
1215
1216static struct of_platform_driver ace_of_driver = {
1217 .owner = THIS_MODULE,
1218 .name = "xsysace",
1219 .match_table = ace_of_match,
1220 .probe = ace_of_probe,
1221 .remove = __devexit_p(ace_of_remove),
1222 .driver = {
1223 .name = "xsysace",
1224 },
1130}; 1225};
1131 1226
1227/* Registration helpers to keep the number of #ifdefs to a minimum */
1228static inline int __init ace_of_register(void)
1229{
1230 pr_debug("xsysace: registering OF binding\n");
1231 return of_register_platform_driver(&ace_of_driver);
1232}
1233
1234static inline void __exit ace_of_unregister(void)
1235{
1236 of_unregister_platform_driver(&ace_of_driver);
1237}
1238#else /* CONFIG_OF */
1239/* CONFIG_OF not enabled; do nothing helpers */
1240static inline int __init ace_of_register(void) { return 0; }
1241static inline void __exit ace_of_unregister(void) { }
1242#endif /* CONFIG_OF */
1243
1132/* --------------------------------------------------------------------- 1244/* ---------------------------------------------------------------------
1133 * Module init/exit routines 1245 * Module init/exit routines
1134 */ 1246 */
1135static int __init ace_init(void) 1247static int __init ace_init(void)
1136{ 1248{
1249 int rc;
1250
1137 ace_major = register_blkdev(ace_major, "xsysace"); 1251 ace_major = register_blkdev(ace_major, "xsysace");
1138 if (ace_major <= 0) { 1252 if (ace_major <= 0) {
1139 printk(KERN_WARNING "xsysace: register_blkdev() failed\n"); 1253 rc = -ENOMEM;
1140 return ace_major; 1254 goto err_blk;
1141 } 1255 }
1142 1256
1143 pr_debug("Registering Xilinx SystemACE driver, major=%i\n", ace_major); 1257 rc = ace_of_register();
1144 return driver_register(&ace_driver); 1258 if (rc)
1259 goto err_of;
1260
1261 pr_debug("xsysace: registering platform binding\n");
1262 rc = platform_driver_register(&ace_platform_driver);
1263 if (rc)
1264 goto err_plat;
1265
1266 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major);
1267 return 0;
1268
1269err_plat:
1270 ace_of_unregister();
1271err_of:
1272 unregister_blkdev(ace_major, "xsysace");
1273err_blk:
1274 printk(KERN_ERR "xsysace: registration failed; err=%i\n", rc);
1275 return rc;
1145} 1276}
1146 1277
1147static void __exit ace_exit(void) 1278static void __exit ace_exit(void)
1148{ 1279{
1149 pr_debug("Unregistering Xilinx SystemACE driver\n"); 1280 pr_debug("Unregistering Xilinx SystemACE driver\n");
1150 driver_unregister(&ace_driver); 1281 platform_driver_unregister(&ace_platform_driver);
1282 ace_of_unregister();
1151 unregister_blkdev(ace_major, "xsysace"); 1283 unregister_blkdev(ace_major, "xsysace");
1152} 1284}
1153 1285
diff --git a/drivers/char/i8k.c b/drivers/char/i8k.c
index 0289705967de..cd406416effd 100644
--- a/drivers/char/i8k.c
+++ b/drivers/char/i8k.c
@@ -98,9 +98,9 @@ struct smm_regs {
98 unsigned int edi __attribute__ ((packed)); 98 unsigned int edi __attribute__ ((packed));
99}; 99};
100 100
101static inline char *i8k_get_dmi_data(int field) 101static inline const char *i8k_get_dmi_data(int field)
102{ 102{
103 char *dmi_data = dmi_get_system_info(field); 103 const char *dmi_data = dmi_get_system_info(field);
104 104
105 return dmi_data && *dmi_data ? dmi_data : "?"; 105 return dmi_data && *dmi_data ? dmi_data : "?";
106} 106}
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index dd441ff4af56..7901d5f218ec 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -1965,10 +1965,10 @@ struct dmi_ipmi_data
1965 u8 slave_addr; 1965 u8 slave_addr;
1966}; 1966};
1967 1967
1968static int __devinit decode_dmi(struct dmi_header *dm, 1968static int __devinit decode_dmi(const struct dmi_header *dm,
1969 struct dmi_ipmi_data *dmi) 1969 struct dmi_ipmi_data *dmi)
1970{ 1970{
1971 u8 *data = (u8 *)dm; 1971 const u8 *data = (const u8 *)dm;
1972 unsigned long base_addr; 1972 unsigned long base_addr;
1973 u8 reg_spacing; 1973 u8 reg_spacing;
1974 u8 len = dm->length; 1974 u8 len = dm->length;
@@ -2091,13 +2091,14 @@ static __devinit void try_init_dmi(struct dmi_ipmi_data *ipmi_data)
2091 2091
2092static void __devinit dmi_find_bmc(void) 2092static void __devinit dmi_find_bmc(void)
2093{ 2093{
2094 struct dmi_device *dev = NULL; 2094 const struct dmi_device *dev = NULL;
2095 struct dmi_ipmi_data data; 2095 struct dmi_ipmi_data data;
2096 int rv; 2096 int rv;
2097 2097
2098 while ((dev = dmi_find_device(DMI_DEV_TYPE_IPMI, NULL, dev))) { 2098 while ((dev = dmi_find_device(DMI_DEV_TYPE_IPMI, NULL, dev))) {
2099 memset(&data, 0, sizeof(data)); 2099 memset(&data, 0, sizeof(data));
2100 rv = decode_dmi((struct dmi_header *) dev->device_data, &data); 2100 rv = decode_dmi((const struct dmi_header *) dev->device_data,
2101 &data);
2101 if (!rv) 2102 if (!rv)
2102 try_init_dmi(&data); 2103 try_init_dmi(&data);
2103 } 2104 }
diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
index f7318b3b51f2..0cdadea7a40e 100644
--- a/drivers/firmware/dmi_scan.c
+++ b/drivers/firmware/dmi_scan.c
@@ -8,9 +8,9 @@
8#include <linux/slab.h> 8#include <linux/slab.h>
9#include <asm/dmi.h> 9#include <asm/dmi.h>
10 10
11static char * __init dmi_string(struct dmi_header *dm, u8 s) 11static char * __init dmi_string(const struct dmi_header *dm, u8 s)
12{ 12{
13 u8 *bp = ((u8 *) dm) + dm->length; 13 const u8 *bp = ((u8 *) dm) + dm->length;
14 char *str = ""; 14 char *str = "";
15 15
16 if (s) { 16 if (s) {
@@ -37,7 +37,7 @@ static char * __init dmi_string(struct dmi_header *dm, u8 s)
37 * pointing to completely the wrong place for example 37 * pointing to completely the wrong place for example
38 */ 38 */
39static int __init dmi_table(u32 base, int len, int num, 39static int __init dmi_table(u32 base, int len, int num,
40 void (*decode)(struct dmi_header *)) 40 void (*decode)(const struct dmi_header *))
41{ 41{
42 u8 *buf, *data; 42 u8 *buf, *data;
43 int i = 0; 43 int i = 0;
@@ -53,7 +53,8 @@ static int __init dmi_table(u32 base, int len, int num,
53 * OR we run off the end of the table (also happens) 53 * OR we run off the end of the table (also happens)
54 */ 54 */
55 while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) { 55 while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) {
56 struct dmi_header *dm = (struct dmi_header *)data; 56 const struct dmi_header *dm = (const struct dmi_header *)data;
57
57 /* 58 /*
58 * We want to know the total length (formated area and strings) 59 * We want to know the total length (formated area and strings)
59 * before decoding to make sure we won't run off the table in 60 * before decoding to make sure we won't run off the table in
@@ -71,7 +72,7 @@ static int __init dmi_table(u32 base, int len, int num,
71 return 0; 72 return 0;
72} 73}
73 74
74static int __init dmi_checksum(u8 *buf) 75static int __init dmi_checksum(const u8 *buf)
75{ 76{
76 u8 sum = 0; 77 u8 sum = 0;
77 int a; 78 int a;
@@ -89,9 +90,10 @@ int dmi_available;
89/* 90/*
90 * Save a DMI string 91 * Save a DMI string
91 */ 92 */
92static void __init dmi_save_ident(struct dmi_header *dm, int slot, int string) 93static void __init dmi_save_ident(const struct dmi_header *dm, int slot, int string)
93{ 94{
94 char *p, *d = (char*) dm; 95 const char *d = (const char*) dm;
96 char *p;
95 97
96 if (dmi_ident[slot]) 98 if (dmi_ident[slot])
97 return; 99 return;
@@ -103,9 +105,9 @@ static void __init dmi_save_ident(struct dmi_header *dm, int slot, int string)
103 dmi_ident[slot] = p; 105 dmi_ident[slot] = p;
104} 106}
105 107
106static void __init dmi_save_uuid(struct dmi_header *dm, int slot, int index) 108static void __init dmi_save_uuid(const struct dmi_header *dm, int slot, int index)
107{ 109{
108 u8 *d = (u8*) dm + index; 110 const u8 *d = (u8*) dm + index;
109 char *s; 111 char *s;
110 int is_ff = 1, is_00 = 1, i; 112 int is_ff = 1, is_00 = 1, i;
111 113
@@ -132,9 +134,9 @@ static void __init dmi_save_uuid(struct dmi_header *dm, int slot, int index)
132 dmi_ident[slot] = s; 134 dmi_ident[slot] = s;
133} 135}
134 136
135static void __init dmi_save_type(struct dmi_header *dm, int slot, int index) 137static void __init dmi_save_type(const struct dmi_header *dm, int slot, int index)
136{ 138{
137 u8 *d = (u8*) dm + index; 139 const u8 *d = (u8*) dm + index;
138 char *s; 140 char *s;
139 141
140 if (dmi_ident[slot]) 142 if (dmi_ident[slot])
@@ -148,13 +150,13 @@ static void __init dmi_save_type(struct dmi_header *dm, int slot, int index)
148 dmi_ident[slot] = s; 150 dmi_ident[slot] = s;
149} 151}
150 152
151static void __init dmi_save_devices(struct dmi_header *dm) 153static void __init dmi_save_devices(const struct dmi_header *dm)
152{ 154{
153 int i, count = (dm->length - sizeof(struct dmi_header)) / 2; 155 int i, count = (dm->length - sizeof(struct dmi_header)) / 2;
154 struct dmi_device *dev; 156 struct dmi_device *dev;
155 157
156 for (i = 0; i < count; i++) { 158 for (i = 0; i < count; i++) {
157 char *d = (char *)(dm + 1) + (i * 2); 159 const char *d = (char *)(dm + 1) + (i * 2);
158 160
159 /* Skip disabled device */ 161 /* Skip disabled device */
160 if ((*d & 0x80) == 0) 162 if ((*d & 0x80) == 0)
@@ -173,7 +175,7 @@ static void __init dmi_save_devices(struct dmi_header *dm)
173 } 175 }
174} 176}
175 177
176static void __init dmi_save_oem_strings_devices(struct dmi_header *dm) 178static void __init dmi_save_oem_strings_devices(const struct dmi_header *dm)
177{ 179{
178 int i, count = *(u8 *)(dm + 1); 180 int i, count = *(u8 *)(dm + 1);
179 struct dmi_device *dev; 181 struct dmi_device *dev;
@@ -194,7 +196,7 @@ static void __init dmi_save_oem_strings_devices(struct dmi_header *dm)
194 } 196 }
195} 197}
196 198
197static void __init dmi_save_ipmi_device(struct dmi_header *dm) 199static void __init dmi_save_ipmi_device(const struct dmi_header *dm)
198{ 200{
199 struct dmi_device *dev; 201 struct dmi_device *dev;
200 void * data; 202 void * data;
@@ -225,7 +227,7 @@ static void __init dmi_save_ipmi_device(struct dmi_header *dm)
225 * and machine entries. For 2.5 we should pull the smbus controller info 227 * and machine entries. For 2.5 we should pull the smbus controller info
226 * out of here. 228 * out of here.
227 */ 229 */
228static void __init dmi_decode(struct dmi_header *dm) 230static void __init dmi_decode(const struct dmi_header *dm)
229{ 231{
230 switch(dm->type) { 232 switch(dm->type) {
231 case 0: /* BIOS Information */ 233 case 0: /* BIOS Information */
@@ -265,9 +267,10 @@ static void __init dmi_decode(struct dmi_header *dm)
265 } 267 }
266} 268}
267 269
268static int __init dmi_present(char __iomem *p) 270static int __init dmi_present(const char __iomem *p)
269{ 271{
270 u8 buf[15]; 272 u8 buf[15];
273
271 memcpy_fromio(buf, p, 15); 274 memcpy_fromio(buf, p, 15);
272 if ((memcmp(buf, "_DMI_", 5) == 0) && dmi_checksum(buf)) { 275 if ((memcmp(buf, "_DMI_", 5) == 0) && dmi_checksum(buf)) {
273 u16 num = (buf[13] << 8) | buf[12]; 276 u16 num = (buf[13] << 8) | buf[12];
@@ -348,10 +351,10 @@ void __init dmi_scan_machine(void)
348 * returns non zero or we hit the end. Callback function is called for 351 * returns non zero or we hit the end. Callback function is called for
349 * each successful match. Returns the number of matches. 352 * each successful match. Returns the number of matches.
350 */ 353 */
351int dmi_check_system(struct dmi_system_id *list) 354int dmi_check_system(const struct dmi_system_id *list)
352{ 355{
353 int i, count = 0; 356 int i, count = 0;
354 struct dmi_system_id *d = list; 357 const struct dmi_system_id *d = list;
355 358
356 while (d->ident) { 359 while (d->ident) {
357 for (i = 0; i < ARRAY_SIZE(d->matches); i++) { 360 for (i = 0; i < ARRAY_SIZE(d->matches); i++) {
@@ -380,7 +383,7 @@ EXPORT_SYMBOL(dmi_check_system);
380 * Returns one DMI data value, can be used to perform 383 * Returns one DMI data value, can be used to perform
381 * complex DMI data checks. 384 * complex DMI data checks.
382 */ 385 */
383char *dmi_get_system_info(int field) 386const char *dmi_get_system_info(int field)
384{ 387{
385 return dmi_ident[field]; 388 return dmi_ident[field];
386} 389}
@@ -391,7 +394,7 @@ EXPORT_SYMBOL(dmi_get_system_info);
391 * dmi_name_in_vendors - Check if string is anywhere in the DMI vendor information. 394 * dmi_name_in_vendors - Check if string is anywhere in the DMI vendor information.
392 * @str: Case sensitive Name 395 * @str: Case sensitive Name
393 */ 396 */
394int dmi_name_in_vendors(char *str) 397int dmi_name_in_vendors(const char *str)
395{ 398{
396 static int fields[] = { DMI_BIOS_VENDOR, DMI_BIOS_VERSION, DMI_SYS_VENDOR, 399 static int fields[] = { DMI_BIOS_VENDOR, DMI_BIOS_VERSION, DMI_SYS_VENDOR,
397 DMI_PRODUCT_NAME, DMI_PRODUCT_VERSION, DMI_BOARD_VENDOR, 400 DMI_PRODUCT_NAME, DMI_PRODUCT_VERSION, DMI_BOARD_VENDOR,
@@ -418,13 +421,15 @@ EXPORT_SYMBOL(dmi_name_in_vendors);
418 * A new search is initiated by passing %NULL as the @from argument. 421 * A new search is initiated by passing %NULL as the @from argument.
419 * If @from is not %NULL, searches continue from next device. 422 * If @from is not %NULL, searches continue from next device.
420 */ 423 */
421struct dmi_device * dmi_find_device(int type, const char *name, 424const struct dmi_device * dmi_find_device(int type, const char *name,
422 struct dmi_device *from) 425 const struct dmi_device *from)
423{ 426{
424 struct list_head *d, *head = from ? &from->list : &dmi_devices; 427 const struct list_head *head = from ? &from->list : &dmi_devices;
428 struct list_head *d;
425 429
426 for(d = head->next; d != &dmi_devices; d = d->next) { 430 for(d = head->next; d != &dmi_devices; d = d->next) {
427 struct dmi_device *dev = list_entry(d, struct dmi_device, list); 431 const struct dmi_device *dev =
432 list_entry(d, struct dmi_device, list);
428 433
429 if (((type == DMI_DEV_TYPE_ANY) || (dev->type == type)) && 434 if (((type == DMI_DEV_TYPE_ANY) || (dev->type == type)) &&
430 ((name == NULL) || (strcmp(dev->name, name) == 0))) 435 ((name == NULL) || (strcmp(dev->name, name) == 0)))
@@ -444,7 +449,7 @@ EXPORT_SYMBOL(dmi_find_device);
444int dmi_get_year(int field) 449int dmi_get_year(int field)
445{ 450{
446 int year; 451 int year;
447 char *s = dmi_get_system_info(field); 452 const char *s = dmi_get_system_info(field);
448 453
449 if (!s) 454 if (!s)
450 return -1; 455 return -1;
diff --git a/drivers/hwmon/abituguru.c b/drivers/hwmon/abituguru.c
index d575ee958de5..2317f4bb9c92 100644
--- a/drivers/hwmon/abituguru.c
+++ b/drivers/hwmon/abituguru.c
@@ -1449,7 +1449,7 @@ static int __init abituguru_init(void)
1449 struct resource res = { .flags = IORESOURCE_IO }; 1449 struct resource res = { .flags = IORESOURCE_IO };
1450 1450
1451#ifdef CONFIG_DMI 1451#ifdef CONFIG_DMI
1452 char *board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 1452 const char *board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1453 1453
1454 /* safety check, refuse to load on non Abit motherboards */ 1454 /* safety check, refuse to load on non Abit motherboards */
1455 if (!force && (!board_vendor || 1455 if (!force && (!board_vendor ||
diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c
index 941729a131f5..56213b7f8188 100644
--- a/drivers/hwmon/applesmc.c
+++ b/drivers/hwmon/applesmc.c
@@ -1071,7 +1071,7 @@ static const struct attribute_group temperature_attributes_group =
1071/* 1071/*
1072 * applesmc_dmi_match - found a match. return one, short-circuiting the hunt. 1072 * applesmc_dmi_match - found a match. return one, short-circuiting the hunt.
1073 */ 1073 */
1074static int applesmc_dmi_match(struct dmi_system_id *id) 1074static int applesmc_dmi_match(const struct dmi_system_id *id)
1075{ 1075{
1076 int i = 0; 1076 int i = 0;
1077 struct dmi_match_data* dmi_data = id->driver_data; 1077 struct dmi_match_data* dmi_data = id->driver_data;
diff --git a/drivers/hwmon/hdaps.c b/drivers/hwmon/hdaps.c
index e0cf5e6fe5bc..a7c6d407572b 100644
--- a/drivers/hwmon/hdaps.c
+++ b/drivers/hwmon/hdaps.c
@@ -480,14 +480,14 @@ static struct attribute_group hdaps_attribute_group = {
480/* Module stuff */ 480/* Module stuff */
481 481
482/* hdaps_dmi_match - found a match. return one, short-circuiting the hunt. */ 482/* hdaps_dmi_match - found a match. return one, short-circuiting the hunt. */
483static int __init hdaps_dmi_match(struct dmi_system_id *id) 483static int __init hdaps_dmi_match(const struct dmi_system_id *id)
484{ 484{
485 printk(KERN_INFO "hdaps: %s detected.\n", id->ident); 485 printk(KERN_INFO "hdaps: %s detected.\n", id->ident);
486 return 1; 486 return 1;
487} 487}
488 488
489/* hdaps_dmi_match_invert - found an inverted match. */ 489/* hdaps_dmi_match_invert - found an inverted match. */
490static int __init hdaps_dmi_match_invert(struct dmi_system_id *id) 490static int __init hdaps_dmi_match_invert(const struct dmi_system_id *id)
491{ 491{
492 hdaps_invert = 1; 492 hdaps_invert = 1;
493 printk(KERN_INFO "hdaps: inverting axis readings.\n"); 493 printk(KERN_INFO "hdaps: inverting axis readings.\n");
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 4200251ff635..aa0e0c9f74c5 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -308,6 +308,14 @@ config IDE_GENERIC
308 help 308 help
309 If unsure, say N. 309 If unsure, say N.
310 310
311config BLK_DEV_PLATFORM
312 tristate "Platform driver for IDE interfaces"
313 help
314 This is the platform IDE driver, used mostly for Memory Mapped
315 IDE devices, like Compact Flashes running in True IDE mode.
316
317 If unsure, say N.
318
311config BLK_DEV_CMD640 319config BLK_DEV_CMD640
312 bool "CMD640 chipset bugfix/support" 320 bool "CMD640 chipset bugfix/support"
313 depends on X86 321 depends on X86
@@ -351,17 +359,16 @@ config BLK_DEV_IDEPNP
351 would like the kernel to automatically detect and activate 359 would like the kernel to automatically detect and activate
352 it, say Y here. 360 it, say Y here.
353 361
362if PCI
363
364comment "PCI IDE chipsets support"
365
354config BLK_DEV_IDEPCI 366config BLK_DEV_IDEPCI
355 bool "PCI IDE chipset support" if PCI 367 bool
356 default BLK_DEV_IDEDMA_PMAC if PPC_PMAC && BLK_DEV_IDEDMA_PMAC
357 help
358 Say Y here for PCI systems which use IDE drive(s).
359 This option helps the IDE driver to automatically detect and
360 configure all PCI-based IDE interfaces in your system.
361 368
362config IDEPCI_SHARE_IRQ 369config IDEPCI_SHARE_IRQ
363 bool "Sharing PCI IDE interrupts support" 370 bool "Sharing PCI IDE interrupts support"
364 depends on PCI && BLK_DEV_IDEPCI 371 depends on BLK_DEV_IDEPCI
365 help 372 help
366 Some ATA/IDE chipsets have hardware support which allows for 373 Some ATA/IDE chipsets have hardware support which allows for
367 sharing a single IRQ with other cards. To enable support for 374 sharing a single IRQ with other cards. To enable support for
@@ -371,11 +378,11 @@ config IDEPCI_SHARE_IRQ
371 If unsure, say N. 378 If unsure, say N.
372 379
373config IDEPCI_PCIBUS_ORDER 380config IDEPCI_PCIBUS_ORDER
374 def_bool PCI && BLK_DEV_IDE=y && BLK_DEV_IDEPCI 381 def_bool BLK_DEV_IDE=y && BLK_DEV_IDEPCI
375 382
376config BLK_DEV_OFFBOARD 383config BLK_DEV_OFFBOARD
377 bool "Boot off-board chipsets first support" 384 bool "Boot off-board chipsets first support"
378 depends on PCI && BLK_DEV_IDEPCI 385 depends on BLK_DEV_IDEPCI
379 help 386 help
380 Normally, IDE controllers built into the motherboard (on-board 387 Normally, IDE controllers built into the motherboard (on-board
381 controllers) are assigned to ide0 and ide1 while those on add-in PCI 388 controllers) are assigned to ide0 and ide1 while those on add-in PCI
@@ -398,21 +405,23 @@ config BLK_DEV_OFFBOARD
398 405
399config BLK_DEV_GENERIC 406config BLK_DEV_GENERIC
400 tristate "Generic PCI IDE Chipset Support" 407 tristate "Generic PCI IDE Chipset Support"
401 depends on BLK_DEV_IDEPCI 408 select BLK_DEV_IDEPCI
402 help 409 help
403 This option provides generic support for various PCI IDE Chipsets 410 This option provides generic support for various PCI IDE Chipsets
404 which otherwise might not be supported. 411 which otherwise might not be supported.
405 412
406config BLK_DEV_OPTI621 413config BLK_DEV_OPTI621
407 tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)" 414 tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)"
408 depends on PCI && BLK_DEV_IDEPCI && EXPERIMENTAL 415 depends on EXPERIMENTAL
416 select BLK_DEV_IDEPCI
409 help 417 help
410 This is a driver for the OPTi 82C621 EIDE controller. 418 This is a driver for the OPTi 82C621 EIDE controller.
411 Please read the comments at the top of <file:drivers/ide/pci/opti621.c>. 419 Please read the comments at the top of <file:drivers/ide/pci/opti621.c>.
412 420
413config BLK_DEV_RZ1000 421config BLK_DEV_RZ1000
414 tristate "RZ1000 chipset bugfix/support" 422 tristate "RZ1000 chipset bugfix/support"
415 depends on PCI && BLK_DEV_IDEPCI && X86 423 depends on X86
424 select BLK_DEV_IDEPCI
416 help 425 help
417 The PC-Technologies RZ1000 IDE chip is used on many common 486 and 426 The PC-Technologies RZ1000 IDE chip is used on many common 486 and
418 Pentium motherboards, usually along with the "Neptune" chipset. 427 Pentium motherboards, usually along with the "Neptune" chipset.
@@ -423,35 +432,21 @@ config BLK_DEV_RZ1000
423 things will operate 100% reliably. 432 things will operate 100% reliably.
424 433
425config BLK_DEV_IDEDMA_PCI 434config BLK_DEV_IDEDMA_PCI
426 bool "Generic PCI bus-master DMA support" 435 bool
427 depends on PCI && BLK_DEV_IDEPCI 436 select BLK_DEV_IDEPCI
428 ---help---
429 If your PCI system uses IDE drive(s) (as opposed to SCSI, say) and
430 is capable of bus-master DMA operation (most Pentium PCI systems),
431 you will want to say Y here to reduce CPU overhead. You can then use
432 the "hdparm" utility to enable DMA for drives for which it was not
433 enabled automatically. By default, DMA is not enabled automatically
434 for these drives, but you can change that by saying Y to the
435 following question "Use DMA by default when available". You can get
436 the latest version of the hdparm utility from
437 <ftp://ibiblio.org/pub/Linux/system/hardware/>.
438
439 Read the comments at the beginning of <file:drivers/ide/ide-dma.c>
440 and the file <file:Documentation/ide.txt> for more information.
441
442 It is safe to say Y to this question.
443
444if BLK_DEV_IDEDMA_PCI
445 437
446config BLK_DEV_IDEDMA_FORCED 438config BLK_DEV_IDEDMA_FORCED
447 bool "Force enable legacy 2.0.X HOSTS to use DMA" 439 bool "Force enable legacy 2.0.X HOSTS to use DMA"
440 depends on BLK_DEV_IDEDMA_PCI
448 help 441 help
449 This is an old piece of lost code from Linux 2.0 Kernels. 442 This is an old piece of lost code from Linux 2.0 Kernels.
450 443
451 Generally say N here. 444 Generally say N here.
452 445
446# TODO: remove it
453config IDEDMA_ONLYDISK 447config IDEDMA_ONLYDISK
454 bool "Enable DMA only for disks " 448 bool "Enable DMA only for disks "
449 depends on BLK_DEV_IDEDMA_PCI
455 help 450 help
456 This is used if you know your ATAPI Devices are going to fail DMA 451 This is used if you know your ATAPI Devices are going to fail DMA
457 Transfers. 452 Transfers.
@@ -460,6 +455,7 @@ config IDEDMA_ONLYDISK
460 455
461config BLK_DEV_AEC62XX 456config BLK_DEV_AEC62XX
462 tristate "AEC62XX chipset support" 457 tristate "AEC62XX chipset support"
458 select BLK_DEV_IDEDMA_PCI
463 help 459 help
464 This driver adds explicit support for Acard AEC62xx (Artop ATP8xx) 460 This driver adds explicit support for Acard AEC62xx (Artop ATP8xx)
465 IDE controllers. This allows the kernel to change PIO, DMA and UDMA 461 IDE controllers. This allows the kernel to change PIO, DMA and UDMA
@@ -467,6 +463,7 @@ config BLK_DEV_AEC62XX
467 463
468config BLK_DEV_ALI15X3 464config BLK_DEV_ALI15X3
469 tristate "ALI M15x3 chipset support" 465 tristate "ALI M15x3 chipset support"
466 select BLK_DEV_IDEDMA_PCI
470 help 467 help
471 This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C 468 This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C
472 onboard chipsets. It also tests for Simplex mode and enables 469 onboard chipsets. It also tests for Simplex mode and enables
@@ -495,6 +492,7 @@ config WDC_ALI15X3
495 492
496config BLK_DEV_AMD74XX 493config BLK_DEV_AMD74XX
497 tristate "AMD and nVidia IDE support" 494 tristate "AMD and nVidia IDE support"
495 select BLK_DEV_IDEDMA_PCI
498 help 496 help
499 This driver adds explicit support for AMD-7xx and AMD-8111 chips 497 This driver adds explicit support for AMD-7xx and AMD-8111 chips
500 and also for the nVidia nForce chip. This allows the kernel to 498 and also for the nVidia nForce chip. This allows the kernel to
@@ -504,6 +502,7 @@ config BLK_DEV_AMD74XX
504config BLK_DEV_ATIIXP 502config BLK_DEV_ATIIXP
505 tristate "ATI IXP chipset IDE support" 503 tristate "ATI IXP chipset IDE support"
506 depends on X86 504 depends on X86
505 select BLK_DEV_IDEDMA_PCI
507 help 506 help
508 This driver adds explicit support for ATI IXP chipset. 507 This driver adds explicit support for ATI IXP chipset.
509 This allows the kernel to change PIO, DMA and UDMA speeds 508 This allows the kernel to change PIO, DMA and UDMA speeds
@@ -513,18 +512,21 @@ config BLK_DEV_ATIIXP
513 512
514config BLK_DEV_CMD64X 513config BLK_DEV_CMD64X
515 tristate "CMD64{3|6|8|9} chipset support" 514 tristate "CMD64{3|6|8|9} chipset support"
515 select BLK_DEV_IDEDMA_PCI
516 help 516 help
517 Say Y here if you have an IDE controller which uses any of these 517 Say Y here if you have an IDE controller which uses any of these
518 chipsets: CMD643, CMD646, or CMD648. 518 chipsets: CMD643, CMD646, or CMD648.
519 519
520config BLK_DEV_TRIFLEX 520config BLK_DEV_TRIFLEX
521 tristate "Compaq Triflex IDE support" 521 tristate "Compaq Triflex IDE support"
522 select BLK_DEV_IDEDMA_PCI
522 help 523 help
523 Say Y here if you have a Compaq Triflex IDE controller, such 524 Say Y here if you have a Compaq Triflex IDE controller, such
524 as those commonly found on Compaq Pentium-Pro systems 525 as those commonly found on Compaq Pentium-Pro systems
525 526
526config BLK_DEV_CY82C693 527config BLK_DEV_CY82C693
527 tristate "CY82C693 chipset support" 528 tristate "CY82C693 chipset support"
529 select BLK_DEV_IDEDMA_PCI
528 help 530 help
529 This driver adds detection and support for the CY82C693 chipset 531 This driver adds detection and support for the CY82C693 chipset
530 used on Digital's PC-Alpha 164SX boards. 532 used on Digital's PC-Alpha 164SX boards.
@@ -535,6 +537,7 @@ config BLK_DEV_CY82C693
535config BLK_DEV_CS5520 537config BLK_DEV_CS5520
536 tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)" 538 tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)"
537 depends on EXPERIMENTAL 539 depends on EXPERIMENTAL
540 select BLK_DEV_IDEDMA_PCI
538 help 541 help
539 Include support for PIO tuning and virtual DMA on the Cyrix MediaGX 542 Include support for PIO tuning and virtual DMA on the Cyrix MediaGX
540 5510/5520 chipset. This will automatically be detected and 543 5510/5520 chipset. This will automatically be detected and
@@ -544,6 +547,7 @@ config BLK_DEV_CS5520
544 547
545config BLK_DEV_CS5530 548config BLK_DEV_CS5530
546 tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support" 549 tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support"
550 select BLK_DEV_IDEDMA_PCI
547 help 551 help
548 Include support for UDMA on the Cyrix MediaGX 5530 chipset. This 552 Include support for UDMA on the Cyrix MediaGX 5530 chipset. This
549 will automatically be detected and configured if found. 553 will automatically be detected and configured if found.
@@ -553,6 +557,7 @@ config BLK_DEV_CS5530
553config BLK_DEV_CS5535 557config BLK_DEV_CS5535
554 tristate "AMD CS5535 chipset support" 558 tristate "AMD CS5535 chipset support"
555 depends on X86 && !X86_64 559 depends on X86 && !X86_64
560 select BLK_DEV_IDEDMA_PCI
556 help 561 help
557 Include support for UDMA on the NSC/AMD CS5535 companion chipset. 562 Include support for UDMA on the NSC/AMD CS5535 companion chipset.
558 This will automatically be detected and configured if found. 563 This will automatically be detected and configured if found.
@@ -561,6 +566,7 @@ config BLK_DEV_CS5535
561 566
562config BLK_DEV_HPT34X 567config BLK_DEV_HPT34X
563 tristate "HPT34X chipset support" 568 tristate "HPT34X chipset support"
569 select BLK_DEV_IDEDMA_PCI
564 help 570 help
565 This driver adds up to 4 more EIDE devices sharing a single 571 This driver adds up to 4 more EIDE devices sharing a single
566 interrupt. The HPT343 chipset in its current form is a non-bootable 572 interrupt. The HPT343 chipset in its current form is a non-bootable
@@ -581,7 +587,8 @@ config HPT34X_AUTODMA
581 587
582config BLK_DEV_HPT366 588config BLK_DEV_HPT366
583 tristate "HPT36X/37X chipset support" 589 tristate "HPT36X/37X chipset support"
584 ---help--- 590 select BLK_DEV_IDEDMA_PCI
591 help
585 HPT366 is an Ultra DMA chipset for ATA-66. 592 HPT366 is an Ultra DMA chipset for ATA-66.
586 HPT368 is an Ultra DMA chipset for ATA-66 RAID Based. 593 HPT368 is an Ultra DMA chipset for ATA-66 RAID Based.
587 HPT370 is an Ultra DMA chipset for ATA-100. 594 HPT370 is an Ultra DMA chipset for ATA-100.
@@ -605,18 +612,21 @@ config BLK_DEV_HPT366
605 612
606config BLK_DEV_JMICRON 613config BLK_DEV_JMICRON
607 tristate "JMicron JMB36x support" 614 tristate "JMicron JMB36x support"
615 select BLK_DEV_IDEDMA_PCI
608 help 616 help
609 Basic support for the JMicron ATA controllers. For full support 617 Basic support for the JMicron ATA controllers. For full support
610 use the libata drivers. 618 use the libata drivers.
611 619
612config BLK_DEV_SC1200 620config BLK_DEV_SC1200
613 tristate "National SCx200 chipset support" 621 tristate "National SCx200 chipset support"
622 select BLK_DEV_IDEDMA_PCI
614 help 623 help
615 This driver adds support for the built in IDE on the National 624 This driver adds support for the built in IDE on the National
616 SCx200 series of embedded x86 "Geode" systems 625 SCx200 series of embedded x86 "Geode" systems
617 626
618config BLK_DEV_PIIX 627config BLK_DEV_PIIX
619 tristate "Intel PIIXn chipsets support" 628 tristate "Intel PIIXn chipsets support"
629 select BLK_DEV_IDEDMA_PCI
620 help 630 help
621 This driver adds explicit support for Intel PIIX and ICH chips 631 This driver adds explicit support for Intel PIIX and ICH chips
622 and also for the Efar Victory66 (slc90e66) chip. This allows 632 and also for the Efar Victory66 (slc90e66) chip. This allows
@@ -625,17 +635,20 @@ config BLK_DEV_PIIX
625 635
626config BLK_DEV_IT8213 636config BLK_DEV_IT8213
627 tristate "IT8213 IDE support" 637 tristate "IT8213 IDE support"
638 select BLK_DEV_IDEDMA_PCI
628 help 639 help
629 This driver adds support for the ITE 8213 IDE controller. 640 This driver adds support for the ITE 8213 IDE controller.
630 641
631config BLK_DEV_IT821X 642config BLK_DEV_IT821X
632 tristate "IT821X IDE support" 643 tristate "IT821X IDE support"
644 select BLK_DEV_IDEDMA_PCI
633 help 645 help
634 This driver adds support for the ITE 8211 IDE controller and the 646 This driver adds support for the ITE 8211 IDE controller and the
635 IT 8212 IDE RAID controller in both RAID and pass-through mode. 647 IT 8212 IDE RAID controller in both RAID and pass-through mode.
636 648
637config BLK_DEV_NS87415 649config BLK_DEV_NS87415
638 tristate "NS87415 chipset support" 650 tristate "NS87415 chipset support"
651 select BLK_DEV_IDEDMA_PCI
639 help 652 help
640 This driver adds detection and support for the NS87415 chip 653 This driver adds detection and support for the NS87415 chip
641 (used mainly on SPARC64 and PA-RISC machines). 654 (used mainly on SPARC64 and PA-RISC machines).
@@ -644,6 +657,7 @@ config BLK_DEV_NS87415
644 657
645config BLK_DEV_PDC202XX_OLD 658config BLK_DEV_PDC202XX_OLD
646 tristate "PROMISE PDC202{46|62|65|67} support" 659 tristate "PROMISE PDC202{46|62|65|67} support"
660 select BLK_DEV_IDEDMA_PCI
647 help 661 help
648 Promise Ultra33 or PDC20246 662 Promise Ultra33 or PDC20246
649 Promise Ultra66 or PDC20262 663 Promise Ultra66 or PDC20262
@@ -685,9 +699,11 @@ config PDC202XX_BURST
685 699
686config BLK_DEV_PDC202XX_NEW 700config BLK_DEV_PDC202XX_NEW
687 tristate "PROMISE PDC202{68|69|70|71|75|76|77} support" 701 tristate "PROMISE PDC202{68|69|70|71|75|76|77} support"
702 select BLK_DEV_IDEDMA_PCI
688 703
689config BLK_DEV_SVWKS 704config BLK_DEV_SVWKS
690 tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support" 705 tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support"
706 select BLK_DEV_IDEDMA_PCI
691 help 707 help
692 This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5 708 This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
693 chipsets. 709 chipsets.
@@ -696,6 +712,7 @@ config BLK_DEV_SGIIOC4
696 tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support" 712 tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support"
697 depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4 713 depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4
698 select IDEPCI_SHARE_IRQ 714 select IDEPCI_SHARE_IRQ
715 select BLK_DEV_IDEDMA_PCI
699 help 716 help
700 This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4 717 This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4
701 chipset, which has one channel and can support two devices. 718 chipset, which has one channel and can support two devices.
@@ -703,6 +720,7 @@ config BLK_DEV_SGIIOC4
703 720
704config BLK_DEV_SIIMAGE 721config BLK_DEV_SIIMAGE
705 tristate "Silicon Image chipset support" 722 tristate "Silicon Image chipset support"
723 select BLK_DEV_IDEDMA_PCI
706 help 724 help
707 This driver adds PIO/(U)DMA support for the SI CMD680 and SII 725 This driver adds PIO/(U)DMA support for the SI CMD680 and SII
708 3112 (Serial ATA) chips. 726 3112 (Serial ATA) chips.
@@ -710,7 +728,8 @@ config BLK_DEV_SIIMAGE
710config BLK_DEV_SIS5513 728config BLK_DEV_SIS5513
711 tristate "SiS5513 chipset support" 729 tristate "SiS5513 chipset support"
712 depends on X86 730 depends on X86
713 ---help--- 731 select BLK_DEV_IDEDMA_PCI
732 help
714 This driver ensures (U)DMA support for SIS5513 chipset family based 733 This driver ensures (U)DMA support for SIS5513 chipset family based
715 mainboards. 734 mainboards.
716 735
@@ -729,6 +748,7 @@ config BLK_DEV_SIS5513
729config BLK_DEV_SL82C105 748config BLK_DEV_SL82C105
730 tristate "Winbond SL82c105 support" 749 tristate "Winbond SL82c105 support"
731 depends on (PPC || ARM) 750 depends on (PPC || ARM)
751 select BLK_DEV_IDEDMA_PCI
732 help 752 help
733 If you have a Winbond SL82c105 IDE controller, say Y here to enable 753 If you have a Winbond SL82c105 IDE controller, say Y here to enable
734 special configuration for this chip. This is common on various CHRP 754 special configuration for this chip. This is common on various CHRP
@@ -736,6 +756,7 @@ config BLK_DEV_SL82C105
736 756
737config BLK_DEV_SLC90E66 757config BLK_DEV_SLC90E66
738 tristate "SLC90E66 chipset support" 758 tristate "SLC90E66 chipset support"
759 select BLK_DEV_IDEDMA_PCI
739 help 760 help
740 This driver ensures (U)DMA support for Victory66 SouthBridges for 761 This driver ensures (U)DMA support for Victory66 SouthBridges for
741 SMsC with Intel NorthBridges. This is an Ultra66 based chipset. 762 SMsC with Intel NorthBridges. This is an Ultra66 based chipset.
@@ -751,6 +772,7 @@ config BLK_DEV_SLC90E66
751 772
752config BLK_DEV_TRM290 773config BLK_DEV_TRM290
753 tristate "Tekram TRM290 chipset support" 774 tristate "Tekram TRM290 chipset support"
775 select BLK_DEV_IDEDMA_PCI
754 help 776 help
755 This driver adds support for bus master DMA transfers 777 This driver adds support for bus master DMA transfers
756 using the Tekram TRM290 PCI IDE chip. Volunteers are 778 using the Tekram TRM290 PCI IDE chip. Volunteers are
@@ -759,6 +781,7 @@ config BLK_DEV_TRM290
759 781
760config BLK_DEV_VIA82CXXX 782config BLK_DEV_VIA82CXXX
761 tristate "VIA82CXXX chipset support" 783 tristate "VIA82CXXX chipset support"
784 select BLK_DEV_IDEDMA_PCI
762 help 785 help
763 This driver adds explicit support for VIA BusMastering IDE chips. 786 This driver adds explicit support for VIA BusMastering IDE chips.
764 This allows the kernel to change PIO, DMA and UDMA speeds and to 787 This allows the kernel to change PIO, DMA and UDMA speeds and to
@@ -766,12 +789,14 @@ config BLK_DEV_VIA82CXXX
766 789
767config BLK_DEV_TC86C001 790config BLK_DEV_TC86C001
768 tristate "Toshiba TC86C001 support" 791 tristate "Toshiba TC86C001 support"
792 select BLK_DEV_IDEDMA_PCI
769 help 793 help
770 This driver adds support for Toshiba TC86C001 GOKU-S chip. 794 This driver adds support for Toshiba TC86C001 GOKU-S chip.
771 795
772config BLK_DEV_CELLEB 796config BLK_DEV_CELLEB
773 tristate "Toshiba's Cell Reference Set IDE support" 797 tristate "Toshiba's Cell Reference Set IDE support"
774 depends on PPC_CELLEB 798 depends on PPC_CELLEB
799 select BLK_DEV_IDEDMA_PCI
775 help 800 help
776 This driver provides support for the built-in IDE controller on 801 This driver provides support for the built-in IDE controller on
777 Toshiba Cell Reference Board. 802 Toshiba Cell Reference Board.
@@ -985,24 +1010,9 @@ config IDE_EXT_DIRECT
985endchoice 1010endchoice
986 1011
987# no isa -> no vlb 1012# no isa -> no vlb
988config IDE_CHIPSETS 1013if ISA
989 bool "Other IDE chipset support"
990 depends on ISA
991 ---help---
992 Say Y here if you want to include enhanced support for various IDE
993 interface chipsets used on motherboards and add-on cards. You can
994 then pick your particular IDE chip from among the following options.
995 This enhanced support may be necessary for Linux to be able to
996 access the 3rd/4th drives in some systems. It may also enable
997 setting of higher speed I/O rates to improve system performance with
998 these chipsets. Most of these also require special kernel boot
999 parameters to actually turn on the support at runtime; you can find
1000 a list of these in the file <file:Documentation/ide.txt>.
1001
1002 People with SCSI-only systems can say N here.
1003
1004if IDE_CHIPSETS
1005 1014
1015comment "Other IDE chipsets support"
1006comment "Note: most of these also require special kernel boot parameters" 1016comment "Note: most of these also require special kernel boot parameters"
1007 1017
1008config BLK_DEV_4DRIVES 1018config BLK_DEV_4DRIVES
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index 8a9b98fcb66d..7912a471f10d 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -248,15 +248,9 @@ static void icside_build_sglist(ide_drive_t *drive, struct request *rq)
248 * MW1 80 50 50 150 C 248 * MW1 80 50 50 150 C
249 * MW2 70 25 25 120 C 249 * MW2 70 25 25 120 C
250 */ 250 */
251static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode) 251static int icside_set_speed(ide_drive_t *drive, const u8 xfer_mode)
252{ 252{
253 int on = 0, cycle_time = 0, use_dma_info = 0; 253 int cycle_time, use_dma_info = 0;
254
255 /*
256 * Limit the transfer speed to MW_DMA_2.
257 */
258 if (xfer_mode > XFER_MW_DMA_2)
259 xfer_mode = XFER_MW_DMA_2;
260 254
261 switch (xfer_mode) { 255 switch (xfer_mode) {
262 case XFER_MW_DMA_2: 256 case XFER_MW_DMA_2:
@@ -278,6 +272,8 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
278 case XFER_SW_DMA_0: 272 case XFER_SW_DMA_0:
279 cycle_time = 480; 273 cycle_time = 480;
280 break; 274 break;
275 default:
276 return 1;
281 } 277 }
282 278
283 /* 279 /*
@@ -289,17 +285,10 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
289 285
290 drive->drive_data = cycle_time; 286 drive->drive_data = cycle_time;
291 287
292 if (cycle_time && ide_config_drive_speed(drive, xfer_mode) == 0)
293 on = 1;
294 else
295 drive->drive_data = 480;
296
297 printk("%s: %s selected (peak %dMB/s)\n", drive->name, 288 printk("%s: %s selected (peak %dMB/s)\n", drive->name,
298 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); 289 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
299 290
300 drive->current_speed = xfer_mode; 291 return ide_config_drive_speed(drive, xfer_mode);
301
302 return on;
303} 292}
304 293
305static void icside_dma_host_off(ide_drive_t *drive) 294static void icside_dma_host_off(ide_drive_t *drive)
@@ -326,8 +315,7 @@ static int icside_dma_check(ide_drive_t *drive)
326{ 315{
327 struct hd_driveid *id = drive->id; 316 struct hd_driveid *id = drive->id;
328 ide_hwif_t *hwif = HWIF(drive); 317 ide_hwif_t *hwif = HWIF(drive);
329 int xfer_mode = XFER_PIO_2; 318 int xfer_mode = 0;
330 int on;
331 319
332 if (!(id->capability & 1) || !hwif->autodma) 320 if (!(id->capability & 1) || !hwif->autodma)
333 goto out; 321 goto out;
@@ -356,9 +344,10 @@ static int icside_dma_check(ide_drive_t *drive)
356 } 344 }
357 345
358out: 346out:
359 on = icside_set_speed(drive, xfer_mode); 347 if (xfer_mode == 0)
348 return -1;
360 349
361 return on ? 0 : -1; 350 return icside_set_speed(drive, xfer_mode) ? -1 : 0;
362} 351}
363 352
364static int icside_dma_end(ide_drive_t *drive) 353static int icside_dma_end(ide_drive_t *drive)
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 04636f7eaae7..4bb42b30bfc0 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -680,12 +680,10 @@ static void cris_dma_off(ide_drive_t *drive)
680{ 680{
681} 681}
682 682
683static void tune_cris_ide(ide_drive_t *drive, u8 pio) 683static void cris_set_pio_mode(ide_drive_t *drive, const u8 pio)
684{ 684{
685 int setup, strobe, hold; 685 int setup, strobe, hold;
686 686
687 pio = ide_get_best_pio_mode(drive, pio, 4);
688
689 switch(pio) 687 switch(pio)
690 { 688 {
691 case 0: 689 case 0:
@@ -722,15 +720,10 @@ static void tune_cris_ide(ide_drive_t *drive, u8 pio)
722 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 720 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
723} 721}
724 722
725static int speed_cris_ide(ide_drive_t *drive, u8 speed) 723static int speed_cris_ide(ide_drive_t *drive, const u8 speed)
726{ 724{
727 int cyc = 0, dvs = 0, strobe = 0, hold = 0; 725 int cyc = 0, dvs = 0, strobe = 0, hold = 0;
728 726
729 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
730 tune_cris_ide(drive, speed - XFER_PIO_0);
731 return ide_config_drive_speed(drive, speed);
732 }
733
734 switch(speed) 727 switch(speed)
735 { 728 {
736 case XFER_UDMA_0: 729 case XFER_UDMA_0:
@@ -797,7 +790,7 @@ init_e100_ide (void)
797 ide_register_hw(&hw, 1, &hwif); 790 ide_register_hw(&hw, 1, &hwif);
798 hwif->mmio = 1; 791 hwif->mmio = 1;
799 hwif->chipset = ide_etrax100; 792 hwif->chipset = ide_etrax100;
800 hwif->tuneproc = &tune_cris_ide; 793 hwif->set_pio_mode = &cris_set_pio_mode;
801 hwif->speedproc = &speed_cris_ide; 794 hwif->speedproc = &speed_cris_ide;
802 hwif->ata_input_data = &cris_ide_input_data; 795 hwif->ata_input_data = &cris_ide_input_data;
803 hwif->ata_output_data = &cris_ide_output_data; 796 hwif->ata_output_data = &cris_ide_output_data;
diff --git a/drivers/ide/ide-acpi.c b/drivers/ide/ide-acpi.c
index 17aea65d7dd2..6bff81a58bf3 100644
--- a/drivers/ide/ide-acpi.c
+++ b/drivers/ide/ide-acpi.c
@@ -612,6 +612,46 @@ void ide_acpi_push_timing(ide_hwif_t *hwif)
612EXPORT_SYMBOL_GPL(ide_acpi_push_timing); 612EXPORT_SYMBOL_GPL(ide_acpi_push_timing);
613 613
614/** 614/**
615 * ide_acpi_set_state - set the channel power state
616 * @hwif: target IDE interface
617 * @on: state, on/off
618 *
619 * This function executes the _PS0/_PS3 ACPI method to set the power state.
620 * ACPI spec requires _PS0 when IDE power on and _PS3 when power off
621 */
622void ide_acpi_set_state(ide_hwif_t *hwif, int on)
623{
624 int unit;
625
626 if (ide_noacpi)
627 return;
628
629 DEBPRINT("ENTER:\n");
630
631 if (!hwif->acpidata) {
632 DEBPRINT("no ACPI data for %s\n", hwif->name);
633 return;
634 }
635 /* channel first and then drives for power on and verse versa for power off */
636 if (on)
637 acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D0);
638 for (unit = 0; unit < MAX_DRIVES; ++unit) {
639 ide_drive_t *drive = &hwif->drives[unit];
640
641 if (!drive->acpidata->obj_handle)
642 drive->acpidata->obj_handle = ide_acpi_drive_get_handle(drive);
643
644 if (drive->acpidata->obj_handle && drive->present) {
645 acpi_bus_set_power(drive->acpidata->obj_handle,
646 on? ACPI_STATE_D0: ACPI_STATE_D3);
647 }
648 }
649 if (!on)
650 acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D3);
651}
652EXPORT_SYMBOL_GPL(ide_acpi_set_state);
653
654/**
615 * ide_acpi_init - initialize the ACPI link for an IDE interface 655 * ide_acpi_init - initialize the ACPI link for an IDE interface
616 * @hwif: target IDE interface (channel) 656 * @hwif: target IDE interface (channel)
617 * 657 *
@@ -679,6 +719,8 @@ void ide_acpi_init(ide_hwif_t *hwif)
679 return; 719 return;
680 } 720 }
681 721
722 /* ACPI _PS0 before _STM */
723 ide_acpi_set_state(hwif, 1);
682 /* 724 /*
683 * ACPI requires us to call _STM on startup 725 * ACPI requires us to call _STM on startup
684 */ 726 */
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index ff644a5e12cd..6000c08f51ba 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -653,7 +653,7 @@ static const u8 xfer_mode_bases[] = {
653 XFER_SW_DMA_0, 653 XFER_SW_DMA_0,
654}; 654};
655 655
656static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base) 656static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
657{ 657{
658 struct hd_driveid *id = drive->id; 658 struct hd_driveid *id = drive->id;
659 ide_hwif_t *hwif = drive->hwif; 659 ide_hwif_t *hwif = drive->hwif;
@@ -664,17 +664,28 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
664 if ((id->field_valid & 4) == 0) 664 if ((id->field_valid & 4) == 0)
665 break; 665 break;
666 666
667 mask = id->dma_ultra & hwif->ultra_mask;
668
669 if (hwif->udma_filter) 667 if (hwif->udma_filter)
670 mask &= hwif->udma_filter(drive); 668 mask = hwif->udma_filter(drive);
669 else
670 mask = hwif->ultra_mask;
671 mask &= id->dma_ultra;
671 672
672 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) 673 /*
673 mask &= 0x07; 674 * avoid false cable warning from eighty_ninty_three()
675 */
676 if (req_mode > XFER_UDMA_2) {
677 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
678 mask &= 0x07;
679 }
674 break; 680 break;
675 case XFER_MW_DMA_0: 681 case XFER_MW_DMA_0:
676 if (id->field_valid & 2) 682 if ((id->field_valid & 2) == 0)
677 mask = id->dma_mword & hwif->mwdma_mask; 683 break;
684 if (hwif->mdma_filter)
685 mask = hwif->mdma_filter(drive);
686 else
687 mask = hwif->mwdma_mask;
688 mask &= id->dma_mword;
678 break; 689 break;
679 case XFER_SW_DMA_0: 690 case XFER_SW_DMA_0:
680 if (id->field_valid & 2) { 691 if (id->field_valid & 2) {
@@ -703,15 +714,18 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
703} 714}
704 715
705/** 716/**
706 * ide_max_dma_mode - compute DMA speed 717 * ide_find_dma_mode - compute DMA speed
707 * @drive: IDE device 718 * @drive: IDE device
719 * @req_mode: requested mode
720 *
721 * Checks the drive/host capabilities and finds the speed to use for
722 * the DMA transfer. The speed is then limited by the requested mode.
708 * 723 *
709 * Checks the drive capabilities and returns the speed to use 724 * Returns 0 if the drive/host combination is incapable of DMA transfers
710 * for the DMA transfer. Returns 0 if the drive is incapable 725 * or if the requested mode is not a DMA mode.
711 * of DMA transfers.
712 */ 726 */
713 727
714u8 ide_max_dma_mode(ide_drive_t *drive) 728u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
715{ 729{
716 ide_hwif_t *hwif = drive->hwif; 730 ide_hwif_t *hwif = drive->hwif;
717 unsigned int mask; 731 unsigned int mask;
@@ -722,7 +736,9 @@ u8 ide_max_dma_mode(ide_drive_t *drive)
722 return 0; 736 return 0;
723 737
724 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { 738 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
725 mask = ide_get_mode_mask(drive, xfer_mode_bases[i]); 739 if (req_mode < xfer_mode_bases[i])
740 continue;
741 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
726 x = fls(mask) - 1; 742 x = fls(mask) - 1;
727 if (x >= 0) { 743 if (x >= 0) {
728 mode = xfer_mode_bases[i] + x; 744 mode = xfer_mode_bases[i] + x;
@@ -732,10 +748,10 @@ u8 ide_max_dma_mode(ide_drive_t *drive)
732 748
733 printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode); 749 printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode);
734 750
735 return mode; 751 return min(mode, req_mode);
736} 752}
737 753
738EXPORT_SYMBOL_GPL(ide_max_dma_mode); 754EXPORT_SYMBOL_GPL(ide_find_dma_mode);
739 755
740int ide_tune_dma(ide_drive_t *drive) 756int ide_tune_dma(ide_drive_t *drive)
741{ 757{
diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c
index ae8e1a64b8ad..04a357808f2e 100644
--- a/drivers/ide/ide-floppy.c
+++ b/drivers/ide/ide-floppy.c
@@ -606,26 +606,24 @@ static void idefloppy_input_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, uns
606{ 606{
607 struct request *rq = pc->rq; 607 struct request *rq = pc->rq;
608 struct bio_vec *bvec; 608 struct bio_vec *bvec;
609 struct bio *bio; 609 struct req_iterator iter;
610 unsigned long flags; 610 unsigned long flags;
611 char *data; 611 char *data;
612 int count, i, done = 0; 612 int count, done = 0;
613 613
614 rq_for_each_bio(bio, rq) { 614 rq_for_each_segment(bvec, rq, iter) {
615 bio_for_each_segment(bvec, bio, i) { 615 if (!bcount)
616 if (!bcount) 616 break;
617 break;
618 617
619 count = min(bvec->bv_len, bcount); 618 count = min(bvec->bv_len, bcount);
620 619
621 data = bvec_kmap_irq(bvec, &flags); 620 data = bvec_kmap_irq(bvec, &flags);
622 drive->hwif->atapi_input_bytes(drive, data, count); 621 drive->hwif->atapi_input_bytes(drive, data, count);
623 bvec_kunmap_irq(data, &flags); 622 bvec_kunmap_irq(data, &flags);
624 623
625 bcount -= count; 624 bcount -= count;
626 pc->b_count += count; 625 pc->b_count += count;
627 done += count; 626 done += count;
628 }
629 } 627 }
630 628
631 idefloppy_do_end_request(drive, 1, done >> 9); 629 idefloppy_do_end_request(drive, 1, done >> 9);
@@ -639,27 +637,25 @@ static void idefloppy_input_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, uns
639static void idefloppy_output_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, unsigned int bcount) 637static void idefloppy_output_buffers (ide_drive_t *drive, idefloppy_pc_t *pc, unsigned int bcount)
640{ 638{
641 struct request *rq = pc->rq; 639 struct request *rq = pc->rq;
642 struct bio *bio; 640 struct req_iterator iter;
643 struct bio_vec *bvec; 641 struct bio_vec *bvec;
644 unsigned long flags; 642 unsigned long flags;
645 int count, i, done = 0; 643 int count, done = 0;
646 char *data; 644 char *data;
647 645
648 rq_for_each_bio(bio, rq) { 646 rq_for_each_segment(bvec, rq, iter) {
649 bio_for_each_segment(bvec, bio, i) { 647 if (!bcount)
650 if (!bcount) 648 break;
651 break;
652 649
653 count = min(bvec->bv_len, bcount); 650 count = min(bvec->bv_len, bcount);
654 651
655 data = bvec_kmap_irq(bvec, &flags); 652 data = bvec_kmap_irq(bvec, &flags);
656 drive->hwif->atapi_output_bytes(drive, data, count); 653 drive->hwif->atapi_output_bytes(drive, data, count);
657 bvec_kunmap_irq(data, &flags); 654 bvec_kunmap_irq(data, &flags);
658 655
659 bcount -= count; 656 bcount -= count;
660 pc->b_count += count; 657 pc->b_count += count;
661 done += count; 658 done += count;
662 }
663 } 659 }
664 660
665 idefloppy_do_end_request(drive, 1, done >> 9); 661 idefloppy_do_end_request(drive, 1, done >> 9);
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index aa9f5f0b1e67..9560a8f4a86c 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -201,8 +201,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request *
201 return do_rw_taskfile(drive, args); 201 return do_rw_taskfile(drive, args);
202 202
203 case idedisk_pm_restore_pio: /* Resume step 1 (restore PIO) */ 203 case idedisk_pm_restore_pio: /* Resume step 1 (restore PIO) */
204 if (drive->hwif->tuneproc != NULL) 204 ide_set_max_pio(drive);
205 drive->hwif->tuneproc(drive, 255);
206 /* 205 /*
207 * skip idedisk_pm_idle for ATAPI devices 206 * skip idedisk_pm_idle for ATAPI devices
208 */ 207 */
@@ -788,6 +787,30 @@ static ide_startstop_t ide_disk_special(ide_drive_t *drive)
788 return ide_started; 787 return ide_started;
789} 788}
790 789
790/*
791 * handle HDIO_SET_PIO_MODE ioctl abusers here, eventually it will go away
792 */
793static int set_pio_mode_abuse(ide_hwif_t *hwif, u8 req_pio)
794{
795 switch (req_pio) {
796 case 202:
797 case 201:
798 case 200:
799 case 102:
800 case 101:
801 case 100:
802 return (hwif->host_flags & IDE_HFLAG_ABUSE_DMA_MODES) ? 1 : 0;
803 case 9:
804 case 8:
805 return (hwif->host_flags & IDE_HFLAG_ABUSE_PREFETCH) ? 1 : 0;
806 case 7:
807 case 6:
808 return (hwif->host_flags & IDE_HFLAG_ABUSE_FAST_DEVSEL) ? 1 : 0;
809 default:
810 return 0;
811 }
812}
813
791/** 814/**
792 * do_special - issue some special commands 815 * do_special - issue some special commands
793 * @drive: drive the command is for 816 * @drive: drive the command is for
@@ -805,9 +828,17 @@ static ide_startstop_t do_special (ide_drive_t *drive)
805 printk("%s: do_special: 0x%02x\n", drive->name, s->all); 828 printk("%s: do_special: 0x%02x\n", drive->name, s->all);
806#endif 829#endif
807 if (s->b.set_tune) { 830 if (s->b.set_tune) {
831 ide_hwif_t *hwif = drive->hwif;
832 u8 req_pio = drive->tune_req;
833
808 s->b.set_tune = 0; 834 s->b.set_tune = 0;
809 if (HWIF(drive)->tuneproc != NULL) 835
810 HWIF(drive)->tuneproc(drive, drive->tune_req); 836 if (set_pio_mode_abuse(drive->hwif, req_pio)) {
837 if (hwif->set_pio_mode)
838 hwif->set_pio_mode(drive, req_pio);
839 } else
840 ide_set_pio(drive, req_pio);
841
811 return ide_stopped; 842 return ide_stopped;
812 } else { 843 } else {
813 if (drive->media == ide_disk) 844 if (drive->media == ide_disk)
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index 646a54e233d3..cf0678b61161 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -780,12 +780,6 @@ int ide_driveid_update (ide_drive_t *drive)
780 780
781/* 781/*
782 * Similar to ide_wait_stat(), except it never calls ide_error internally. 782 * Similar to ide_wait_stat(), except it never calls ide_error internally.
783 * This is a kludge to handle the new ide_config_drive_speed() function,
784 * and should not otherwise be used anywhere. Eventually, the tuneproc's
785 * should be updated to return ide_startstop_t, in which case we can get
786 * rid of this abomination again. :) -ml
787 *
788 * It is gone..........
789 * 783 *
790 * const char *msg == consider adding for verbose errors. 784 * const char *msg == consider adding for verbose errors.
791 */ 785 */
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c
index 92a6c7bcf527..d97390c0543b 100644
--- a/drivers/ide/ide-lib.c
+++ b/drivers/ide/ide-lib.c
@@ -76,41 +76,26 @@ EXPORT_SYMBOL(ide_xfer_verbose);
76 * Given the available transfer modes this function returns 76 * Given the available transfer modes this function returns
77 * the best available speed at or below the speed requested. 77 * the best available speed at or below the speed requested.
78 * 78 *
79 * FIXME: filter also PIO/SWDMA/MWDMA modes 79 * TODO: check device PIO capabilities
80 */ 80 */
81 81
82u8 ide_rate_filter(ide_drive_t *drive, u8 speed) 82static u8 ide_rate_filter(ide_drive_t *drive, u8 speed)
83{ 83{
84#ifdef CONFIG_BLK_DEV_IDEDMA
85 ide_hwif_t *hwif = drive->hwif; 84 ide_hwif_t *hwif = drive->hwif;
86 u8 mask = hwif->ultra_mask, mode = XFER_MW_DMA_2; 85 u8 mode = ide_find_dma_mode(drive, speed);
87 86
88 if (hwif->udma_filter) 87 if (mode == 0) {
89 mask = hwif->udma_filter(drive); 88 if (hwif->pio_mask)
90 89 mode = fls(hwif->pio_mask) - 1 + XFER_PIO_0;
91 /* 90 else
92 * TODO: speed > XFER_UDMA_2 extra check is needed to avoid false 91 mode = XFER_PIO_4;
93 * cable warning from eighty_ninty_three(), moving ide_rate_filter()
94 * calls from ->speedproc to core code will make this hack go away
95 */
96 if (speed > XFER_UDMA_2) {
97 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
98 mask &= 0x07;
99 } 92 }
100 93
101 if (mask)
102 mode = fls(mask) - 1 + XFER_UDMA_0;
103
104// printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed); 94// printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed);
105 95
106 return min(speed, mode); 96 return min(speed, mode);
107#else /* !CONFIG_BLK_DEV_IDEDMA */
108 return min(speed, (u8)XFER_PIO_4);
109#endif /* CONFIG_BLK_DEV_IDEDMA */
110} 97}
111 98
112EXPORT_SYMBOL(ide_rate_filter);
113
114int ide_use_fast_pio(ide_drive_t *drive) 99int ide_use_fast_pio(ide_drive_t *drive)
115{ 100{
116 struct hd_driveid *id = drive->id; 101 struct hd_driveid *id = drive->id;
@@ -340,6 +325,35 @@ u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
340 325
341EXPORT_SYMBOL_GPL(ide_get_best_pio_mode); 326EXPORT_SYMBOL_GPL(ide_get_best_pio_mode);
342 327
328/* req_pio == "255" for auto-tune */
329void ide_set_pio(ide_drive_t *drive, u8 req_pio)
330{
331 ide_hwif_t *hwif = drive->hwif;
332 u8 host_pio, pio;
333
334 if (hwif->set_pio_mode == NULL)
335 return;
336
337 BUG_ON(hwif->pio_mask == 0x00);
338
339 host_pio = fls(hwif->pio_mask) - 1;
340
341 pio = ide_get_best_pio_mode(drive, req_pio, host_pio);
342
343 /*
344 * TODO:
345 * - report device max PIO mode
346 * - check req_pio != 255 against device max PIO mode
347 */
348 printk(KERN_DEBUG "%s: host max PIO%d wanted PIO%d%s selected PIO%d\n",
349 drive->name, host_pio, req_pio,
350 req_pio == 255 ? "(auto-tune)" : "", pio);
351
352 hwif->set_pio_mode(drive, pio);
353}
354
355EXPORT_SYMBOL_GPL(ide_set_pio);
356
343/** 357/**
344 * ide_toggle_bounce - handle bounce buffering 358 * ide_toggle_bounce - handle bounce buffering
345 * @drive: drive to update 359 * @drive: drive to update
@@ -377,13 +391,26 @@ void ide_toggle_bounce(ide_drive_t *drive, int on)
377 391
378int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) 392int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
379{ 393{
380#ifndef CONFIG_BLK_DEV_IDEDMA 394 ide_hwif_t *hwif = drive->hwif;
381 rate = min(rate, (u8) XFER_PIO_4); 395
382#endif 396 if (hwif->speedproc == NULL)
383 if(HWIF(drive)->speedproc)
384 return HWIF(drive)->speedproc(drive, rate);
385 else
386 return -1; 397 return -1;
398
399 rate = ide_rate_filter(drive, rate);
400
401 if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) {
402 if (hwif->set_pio_mode)
403 hwif->set_pio_mode(drive, rate - XFER_PIO_0);
404
405 /*
406 * FIXME: this is incorrect to return zero here but
407 * since all users of ide_set_xfer_rate() ignore
408 * the return value it is not a problem currently
409 */
410 return 0;
411 }
412
413 return hwif->speedproc(drive, rate);
387} 414}
388 415
389static void ide_dump_opcode(ide_drive_t *drive) 416static void ide_dump_opcode(ide_drive_t *drive)
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 3a2a9a338fd9..b4c9f63a3854 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -827,10 +827,8 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif))
827 ide_drive_t *drive = &hwif->drives[unit]; 827 ide_drive_t *drive = &hwif->drives[unit];
828 828
829 if (drive->present) { 829 if (drive->present) {
830 if (hwif->tuneproc != NULL && 830 if (drive->autotune == IDE_TUNE_AUTO)
831 drive->autotune == IDE_TUNE_AUTO) 831 ide_set_max_pio(drive);
832 /* auto-tune PIO mode */
833 hwif->tuneproc(drive, 255);
834 832
835 if (drive->autotune != IDE_TUNE_DEFAULT && 833 if (drive->autotune != IDE_TUNE_DEFAULT &&
836 drive->autotune != IDE_TUNE_AUTO) 834 drive->autotune != IDE_TUNE_AUTO)
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index 5e88a060df06..e96212ce5729 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -396,8 +396,9 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
396 hwif->cds = tmp_hwif->cds; 396 hwif->cds = tmp_hwif->cds;
397#endif 397#endif
398 398
399 hwif->tuneproc = tmp_hwif->tuneproc; 399 hwif->set_pio_mode = tmp_hwif->set_pio_mode;
400 hwif->speedproc = tmp_hwif->speedproc; 400 hwif->speedproc = tmp_hwif->speedproc;
401 hwif->mdma_filter = tmp_hwif->mdma_filter;
401 hwif->udma_filter = tmp_hwif->udma_filter; 402 hwif->udma_filter = tmp_hwif->udma_filter;
402 hwif->selectproc = tmp_hwif->selectproc; 403 hwif->selectproc = tmp_hwif->selectproc;
403 hwif->reset_poll = tmp_hwif->reset_poll; 404 hwif->reset_poll = tmp_hwif->reset_poll;
@@ -866,8 +867,9 @@ int set_pio_mode(ide_drive_t *drive, int arg)
866 if (arg < 0 || arg > 255) 867 if (arg < 0 || arg > 255)
867 return -EINVAL; 868 return -EINVAL;
868 869
869 if (!HWIF(drive)->tuneproc) 870 if (drive->hwif->set_pio_mode == NULL)
870 return -ENOSYS; 871 return -ENOSYS;
872
871 if (drive->special.b.set_tune) 873 if (drive->special.b.set_tune)
872 return -EBUSY; 874 return -EBUSY;
873 ide_init_drive_cmd(&rq); 875 ide_init_drive_cmd(&rq);
@@ -914,6 +916,7 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg)
914 struct request rq; 916 struct request rq;
915 struct request_pm_state rqpm; 917 struct request_pm_state rqpm;
916 ide_task_t args; 918 ide_task_t args;
919 int ret;
917 920
918 /* Call ACPI _GTM only once */ 921 /* Call ACPI _GTM only once */
919 if (!(drive->dn % 2)) 922 if (!(drive->dn % 2))
@@ -930,7 +933,14 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg)
930 mesg.event = PM_EVENT_FREEZE; 933 mesg.event = PM_EVENT_FREEZE;
931 rqpm.pm_state = mesg.event; 934 rqpm.pm_state = mesg.event;
932 935
933 return ide_do_drive_cmd(drive, &rq, ide_wait); 936 ret = ide_do_drive_cmd(drive, &rq, ide_wait);
937 /* only call ACPI _PS3 after both drivers are suspended */
938 if (!ret && (((drive->dn % 2) && hwif->drives[0].present
939 && hwif->drives[1].present)
940 || !hwif->drives[0].present
941 || !hwif->drives[1].present))
942 ide_acpi_set_state(hwif, 0);
943 return ret;
934} 944}
935 945
936static int generic_ide_resume(struct device *dev) 946static int generic_ide_resume(struct device *dev)
@@ -943,8 +953,10 @@ static int generic_ide_resume(struct device *dev)
943 int err; 953 int err;
944 954
945 /* Call ACPI _STM only once */ 955 /* Call ACPI _STM only once */
946 if (!(drive->dn % 2)) 956 if (!(drive->dn % 2)) {
957 ide_acpi_set_state(hwif, 1);
947 ide_acpi_push_timing(hwif); 958 ide_acpi_push_timing(hwif);
959 }
948 960
949 ide_acpi_exec_tfs(drive); 961 ide_acpi_exec_tfs(drive);
950 962
diff --git a/drivers/ide/legacy/Makefile b/drivers/ide/legacy/Makefile
index c7971061767e..409822349f10 100644
--- a/drivers/ide/legacy/Makefile
+++ b/drivers/ide/legacy/Makefile
@@ -7,6 +7,8 @@ obj-$(CONFIG_BLK_DEV_UMC8672) += umc8672.o
7 7
8obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o 8obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o
9 9
10obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o
11
10# Last of all 12# Last of all
11obj-$(CONFIG_BLK_DEV_HD) += hd.o 13obj-$(CONFIG_BLK_DEV_HD) += hd.o
12 14
diff --git a/drivers/ide/legacy/ali14xx.c b/drivers/ide/legacy/ali14xx.c
index 9b9c4761cb7d..2f0ef9b44033 100644
--- a/drivers/ide/legacy/ali14xx.c
+++ b/drivers/ide/legacy/ali14xx.c
@@ -68,8 +68,6 @@ static RegInitializer initData[] __initdata = {
68 {0x35, 0x03}, {0x00, 0x00} 68 {0x35, 0x03}, {0x00, 0x00}
69}; 69};
70 70
71#define ALI_MAX_PIO 4
72
73/* timing parameter registers for each drive */ 71/* timing parameter registers for each drive */
74static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = { 72static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
75 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */ 73 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
@@ -109,7 +107,7 @@ static void outReg (u8 data, u8 reg)
109 * This function computes timing parameters 107 * This function computes timing parameters
110 * and sets controller registers accordingly. 108 * and sets controller registers accordingly.
111 */ 109 */
112static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio) 110static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
113{ 111{
114 int driveNum; 112 int driveNum;
115 int time1, time2; 113 int time1, time2;
@@ -117,8 +115,6 @@ static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio)
117 unsigned long flags; 115 unsigned long flags;
118 int bus_speed = system_bus_clock(); 116 int bus_speed = system_bus_clock();
119 117
120 pio = ide_get_best_pio_mode(drive, pio, ALI_MAX_PIO);
121
122 /* calculate timing, according to PIO mode */ 118 /* calculate timing, according to PIO mode */
123 time1 = ide_pio_cycle_time(drive, pio); 119 time1 = ide_pio_cycle_time(drive, pio);
124 time2 = ide_pio_timings[pio].active_time; 120 time2 = ide_pio_timings[pio].active_time;
@@ -212,12 +208,12 @@ static int __init ali14xx_probe(void)
212 208
213 hwif->chipset = ide_ali14xx; 209 hwif->chipset = ide_ali14xx;
214 hwif->pio_mask = ATA_PIO4; 210 hwif->pio_mask = ATA_PIO4;
215 hwif->tuneproc = &ali14xx_tune_drive; 211 hwif->set_pio_mode = &ali14xx_set_pio_mode;
216 hwif->mate = mate; 212 hwif->mate = mate;
217 213
218 mate->chipset = ide_ali14xx; 214 mate->chipset = ide_ali14xx;
219 mate->pio_mask = ATA_PIO4; 215 mate->pio_mask = ATA_PIO4;
220 mate->tuneproc = &ali14xx_tune_drive; 216 mate->set_pio_mode = &ali14xx_set_pio_mode;
221 mate->mate = hwif; 217 mate->mate = hwif;
222 mate->channel = 1; 218 mate->channel = 1;
223 219
diff --git a/drivers/ide/legacy/dtc2278.c b/drivers/ide/legacy/dtc2278.c
index 6c01d951d074..f16521254867 100644
--- a/drivers/ide/legacy/dtc2278.c
+++ b/drivers/ide/legacy/dtc2278.c
@@ -67,12 +67,10 @@ static void sub22 (char b, char c)
67 } 67 }
68} 68}
69 69
70static void tune_dtc2278 (ide_drive_t *drive, u8 pio) 70static void dtc2278_set_pio_mode(ide_drive_t *drive, const u8 pio)
71{ 71{
72 unsigned long flags; 72 unsigned long flags;
73 73
74 pio = ide_get_best_pio_mode(drive, pio, 4);
75
76 if (pio >= 3) { 74 if (pio >= 3) {
77 spin_lock_irqsave(&ide_lock, flags); 75 spin_lock_irqsave(&ide_lock, flags);
78 /* 76 /*
@@ -124,7 +122,7 @@ static int __init dtc2278_probe(void)
124 hwif->serialized = 1; 122 hwif->serialized = 1;
125 hwif->chipset = ide_dtc2278; 123 hwif->chipset = ide_dtc2278;
126 hwif->pio_mask = ATA_PIO4; 124 hwif->pio_mask = ATA_PIO4;
127 hwif->tuneproc = &tune_dtc2278; 125 hwif->set_pio_mode = &dtc2278_set_pio_mode;
128 hwif->drives[0].no_unmask = 1; 126 hwif->drives[0].no_unmask = 1;
129 hwif->drives[1].no_unmask = 1; 127 hwif->drives[1].no_unmask = 1;
130 hwif->mate = mate; 128 hwif->mate = mate;
diff --git a/drivers/ide/legacy/ht6560b.c b/drivers/ide/legacy/ht6560b.c
index bfaa2025173b..2e5a9cc5c0f7 100644
--- a/drivers/ide/legacy/ht6560b.c
+++ b/drivers/ide/legacy/ht6560b.c
@@ -199,7 +199,7 @@ static int __init try_to_init_ht6560b(void)
199 return 1; 199 return 1;
200} 200}
201 201
202static u8 ht_pio2timings(ide_drive_t *drive, u8 pio) 202static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio)
203{ 203{
204 int active_time, recovery_time; 204 int active_time, recovery_time;
205 int active_cycles, recovery_cycles; 205 int active_cycles, recovery_cycles;
@@ -208,7 +208,6 @@ static u8 ht_pio2timings(ide_drive_t *drive, u8 pio)
208 if (pio) { 208 if (pio) {
209 unsigned int cycle_time; 209 unsigned int cycle_time;
210 210
211 pio = ide_get_best_pio_mode(drive, pio, 5);
212 cycle_time = ide_pio_cycle_time(drive, pio); 211 cycle_time = ide_pio_cycle_time(drive, pio);
213 212
214 /* 213 /*
@@ -277,7 +276,7 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state)
277#endif 276#endif
278} 277}
279 278
280static void tune_ht6560b (ide_drive_t *drive, u8 pio) 279static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
281{ 280{
282 unsigned long flags; 281 unsigned long flags;
283 u8 timing; 282 u8 timing;
@@ -333,15 +332,17 @@ int __init ht6560b_init(void)
333 332
334 hwif->chipset = ide_ht6560b; 333 hwif->chipset = ide_ht6560b;
335 hwif->selectproc = &ht6560b_selectproc; 334 hwif->selectproc = &ht6560b_selectproc;
335 hwif->host_flags = IDE_HFLAG_ABUSE_PREFETCH;
336 hwif->pio_mask = ATA_PIO5; 336 hwif->pio_mask = ATA_PIO5;
337 hwif->tuneproc = &tune_ht6560b; 337 hwif->set_pio_mode = &ht6560b_set_pio_mode;
338 hwif->serialized = 1; /* is this needed? */ 338 hwif->serialized = 1; /* is this needed? */
339 hwif->mate = mate; 339 hwif->mate = mate;
340 340
341 mate->chipset = ide_ht6560b; 341 mate->chipset = ide_ht6560b;
342 mate->selectproc = &ht6560b_selectproc; 342 mate->selectproc = &ht6560b_selectproc;
343 mate->host_flags = IDE_HFLAG_ABUSE_PREFETCH;
343 mate->pio_mask = ATA_PIO5; 344 mate->pio_mask = ATA_PIO5;
344 mate->tuneproc = &tune_ht6560b; 345 mate->set_pio_mode = &ht6560b_set_pio_mode;
345 mate->serialized = 1; /* is this needed? */ 346 mate->serialized = 1; /* is this needed? */
346 mate->mate = hwif; 347 mate->mate = hwif;
347 mate->channel = 1; 348 mate->channel = 1;
diff --git a/drivers/ide/legacy/ide_platform.c b/drivers/ide/legacy/ide_platform.c
new file mode 100644
index 000000000000..ccfb9893a467
--- /dev/null
+++ b/drivers/ide/legacy/ide_platform.c
@@ -0,0 +1,182 @@
1/*
2 * Platform IDE driver
3 *
4 * Copyright (C) 2007 MontaVista Software
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/ide.h>
18#include <linux/ioport.h>
19#include <linux/module.h>
20#include <linux/pata_platform.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23
24static struct {
25 void __iomem *plat_ide_mapbase;
26 void __iomem *plat_ide_alt_mapbase;
27 ide_hwif_t *hwif;
28 int index;
29} hwif_prop;
30
31static ide_hwif_t *__devinit plat_ide_locate_hwif(void __iomem *base,
32 void __iomem *ctrl, struct pata_platform_info *pdata, int irq,
33 int mmio)
34{
35 unsigned long port = (unsigned long)base;
36 ide_hwif_t *hwif;
37 int index, i;
38
39 for (index = 0; index < MAX_HWIFS; ++index) {
40 hwif = ide_hwifs + index;
41 if (hwif->io_ports[IDE_DATA_OFFSET] == port)
42 goto found;
43 }
44
45 for (index = 0; index < MAX_HWIFS; ++index) {
46 hwif = ide_hwifs + index;
47 if (hwif->io_ports[IDE_DATA_OFFSET] == 0)
48 goto found;
49 }
50
51 return NULL;
52
53found:
54
55 hwif->hw.io_ports[IDE_DATA_OFFSET] = port;
56
57 port += (1 << pdata->ioport_shift);
58 for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET;
59 i++, port += (1 << pdata->ioport_shift))
60 hwif->hw.io_ports[i] = port;
61
62 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;
63
64 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports));
65 hwif->hw.irq = hwif->irq = irq;
66
67 hwif->hw.dma = NO_DMA;
68 hwif->hw.chipset = ide_generic;
69
70 if (mmio) {
71 hwif->mmio = 1;
72 default_hwif_mmiops(hwif);
73 }
74
75 hwif_prop.hwif = hwif;
76 hwif_prop.index = index;
77
78 return hwif;
79}
80
81static int __devinit plat_ide_probe(struct platform_device *pdev)
82{
83 struct resource *res_base, *res_alt, *res_irq;
84 ide_hwif_t *hwif;
85 struct pata_platform_info *pdata;
86 int ret = 0;
87 int mmio = 0;
88
89 pdata = pdev->dev.platform_data;
90
91 /* get a pointer to the register memory */
92 res_base = platform_get_resource(pdev, IORESOURCE_IO, 0);
93 res_alt = platform_get_resource(pdev, IORESOURCE_IO, 1);
94
95 if (!res_base || !res_alt) {
96 res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
97 res_alt = platform_get_resource(pdev, IORESOURCE_MEM, 1);
98 if (!res_base || !res_alt) {
99 ret = -ENOMEM;
100 goto out;
101 }
102 mmio = 1;
103 }
104
105 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
106 if (!res_irq) {
107 ret = -EINVAL;
108 goto out;
109 }
110
111 if (mmio) {
112 hwif_prop.plat_ide_mapbase = devm_ioremap(&pdev->dev,
113 res_base->start, res_base->end - res_base->start + 1);
114 hwif_prop.plat_ide_alt_mapbase = devm_ioremap(&pdev->dev,
115 res_alt->start, res_alt->end - res_alt->start + 1);
116 } else {
117 hwif_prop.plat_ide_mapbase = devm_ioport_map(&pdev->dev,
118 res_base->start, res_base->end - res_base->start + 1);
119 hwif_prop.plat_ide_alt_mapbase = devm_ioport_map(&pdev->dev,
120 res_alt->start, res_alt->end - res_alt->start + 1);
121 }
122
123 hwif = plat_ide_locate_hwif(hwif_prop.plat_ide_mapbase,
124 hwif_prop.plat_ide_alt_mapbase, pdata, res_irq->start, mmio);
125
126 if (!hwif) {
127 ret = -ENODEV;
128 goto out;
129 }
130 hwif->gendev.parent = &pdev->dev;
131 hwif->noprobe = 0;
132
133 probe_hwif_init(hwif);
134
135 platform_set_drvdata(pdev, hwif);
136 ide_proc_register_port(hwif);
137
138 return 0;
139
140out:
141 return ret;
142}
143
144static int __devexit plat_ide_remove(struct platform_device *pdev)
145{
146 ide_hwif_t *hwif = pdev->dev.driver_data;
147
148 if (hwif != hwif_prop.hwif) {
149 dev_printk(KERN_DEBUG, &pdev->dev, "%s: hwif value error",
150 pdev->name);
151 } else {
152 ide_unregister(hwif_prop.index);
153 hwif_prop.index = 0;
154 hwif_prop.hwif = NULL;
155 }
156
157 return 0;
158}
159
160static struct platform_driver platform_ide_driver = {
161 .driver = {
162 .name = "pata_platform",
163 },
164 .probe = plat_ide_probe,
165 .remove = __devexit_p(plat_ide_remove),
166};
167
168static int __init platform_ide_init(void)
169{
170 return platform_driver_register(&platform_ide_driver);
171}
172
173static void __exit platform_ide_exit(void)
174{
175 platform_driver_unregister(&platform_ide_driver);
176}
177
178MODULE_DESCRIPTION("Platform IDE driver");
179MODULE_LICENSE("GPL");
180
181module_init(platform_ide_init);
182module_exit(platform_ide_exit);
diff --git a/drivers/ide/legacy/qd65xx.c b/drivers/ide/legacy/qd65xx.c
index 8b87a424094a..0c81d2d0b941 100644
--- a/drivers/ide/legacy/qd65xx.c
+++ b/drivers/ide/legacy/qd65xx.c
@@ -224,15 +224,14 @@ static void qd_set_timing (ide_drive_t *drive, u8 timing)
224 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); 224 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
225} 225}
226 226
227/* 227static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
228 * qd6500_tune_drive
229 */
230
231static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
232{ 228{
233 int active_time = 175; 229 int active_time = 175;
234 int recovery_time = 415; /* worst case values from the dos driver */ 230 int recovery_time = 415; /* worst case values from the dos driver */
235 231
232 /*
233 * FIXME: use "pio" value
234 */
236 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time) 235 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
237 && drive->id->tPIO && (drive->id->field_valid & 0x02) 236 && drive->id->tPIO && (drive->id->field_valid & 0x02)
238 && drive->id->eide_pio >= 240) { 237 && drive->id->eide_pio >= 240) {
@@ -246,11 +245,7 @@ static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
246 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time)); 245 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
247} 246}
248 247
249/* 248static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
250 * qd6580_tune_drive
251 */
252
253static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
254{ 249{
255 int base = HWIF(drive)->select_data; 250 int base = HWIF(drive)->select_data;
256 unsigned int cycle_time; 251 unsigned int cycle_time;
@@ -258,7 +253,6 @@ static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
258 int recovery_time = 415; /* worst case values from the dos driver */ 253 int recovery_time = 415; /* worst case values from the dos driver */
259 254
260 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) { 255 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
261 pio = ide_get_best_pio_mode(drive, pio, 4);
262 cycle_time = ide_pio_cycle_time(drive, pio); 256 cycle_time = ide_pio_cycle_time(drive, pio);
263 257
264 switch (pio) { 258 switch (pio) {
@@ -335,8 +329,7 @@ static int __init qd_testreg(int port)
335 */ 329 */
336 330
337static void __init qd_setup(ide_hwif_t *hwif, int base, int config, 331static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
338 unsigned int data0, unsigned int data1, 332 unsigned int data0, unsigned int data1)
339 void (*tuneproc) (ide_drive_t *, u8 pio))
340{ 333{
341 hwif->chipset = ide_qd65xx; 334 hwif->chipset = ide_qd65xx;
342 hwif->channel = hwif->index; 335 hwif->channel = hwif->index;
@@ -347,8 +340,6 @@ static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
347 hwif->drives[0].io_32bit = 340 hwif->drives[0].io_32bit =
348 hwif->drives[1].io_32bit = 1; 341 hwif->drives[1].io_32bit = 1;
349 hwif->pio_mask = ATA_PIO4; 342 hwif->pio_mask = ATA_PIO4;
350 hwif->tuneproc = tuneproc;
351 probe_hwif_init(hwif);
352} 343}
353 344
354/* 345/*
@@ -361,7 +352,7 @@ static void __exit qd_unsetup(ide_hwif_t *hwif)
361{ 352{
362 u8 config = hwif->config_data; 353 u8 config = hwif->config_data;
363 int base = hwif->select_data; 354 int base = hwif->select_data;
364 void *tuneproc = (void *) hwif->tuneproc; 355 void *set_pio_mode = (void *)hwif->set_pio_mode;
365 356
366 if (hwif->chipset != ide_qd65xx) 357 if (hwif->chipset != ide_qd65xx)
367 return; 358 return;
@@ -369,12 +360,12 @@ static void __exit qd_unsetup(ide_hwif_t *hwif)
369 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name); 360 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
370 361
371 hwif->selectproc = NULL; 362 hwif->selectproc = NULL;
372 hwif->tuneproc = NULL; 363 hwif->set_pio_mode = NULL;
373 364
374 if (tuneproc == (void *) qd6500_tune_drive) { 365 if (set_pio_mode == (void *)qd6500_set_pio_mode) {
375 // will do it for both 366 // will do it for both
376 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); 367 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
377 } else if (tuneproc == (void *) qd6580_tune_drive) { 368 } else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
378 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) { 369 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
379 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); 370 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
380 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); 371 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
@@ -424,8 +415,11 @@ static int __init qd_probe(int base)
424 return 1; 415 return 1;
425 } 416 }
426 417
427 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA, 418 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);
428 &qd6500_tune_drive); 419
420 hwif->set_pio_mode = &qd6500_set_pio_mode;
421
422 probe_hwif_init(hwif);
429 423
430 ide_proc_register_port(hwif); 424 ide_proc_register_port(hwif);
431 425
@@ -455,8 +449,12 @@ static int __init qd_probe(int base)
455 printk(KERN_INFO "%s: qd6580: single IDE board\n", 449 printk(KERN_INFO "%s: qd6580: single IDE board\n",
456 hwif->name); 450 hwif->name);
457 qd_setup(hwif, base, config | (control << 8), 451 qd_setup(hwif, base, config | (control << 8),
458 QD6580_DEF_DATA, QD6580_DEF_DATA2, 452 QD6580_DEF_DATA, QD6580_DEF_DATA2);
459 &qd6580_tune_drive); 453
454 hwif->set_pio_mode = &qd6580_set_pio_mode;
455
456 probe_hwif_init(hwif);
457
460 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); 458 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
461 459
462 ide_proc_register_port(hwif); 460 ide_proc_register_port(hwif);
@@ -472,11 +470,19 @@ static int __init qd_probe(int base)
472 hwif->name, mate->name); 470 hwif->name, mate->name);
473 471
474 qd_setup(hwif, base, config | (control << 8), 472 qd_setup(hwif, base, config | (control << 8),
475 QD6580_DEF_DATA, QD6580_DEF_DATA, 473 QD6580_DEF_DATA, QD6580_DEF_DATA);
476 &qd6580_tune_drive); 474
475 hwif->set_pio_mode = &qd6580_set_pio_mode;
476
477 probe_hwif_init(hwif);
478
477 qd_setup(mate, base, config | (control << 8), 479 qd_setup(mate, base, config | (control << 8),
478 QD6580_DEF_DATA2, QD6580_DEF_DATA2, 480 QD6580_DEF_DATA2, QD6580_DEF_DATA2);
479 &qd6580_tune_drive); 481
482 mate->set_pio_mode = &qd6580_set_pio_mode;
483
484 probe_hwif_init(mate);
485
480 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); 486 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
481 487
482 ide_proc_register_port(hwif); 488 ide_proc_register_port(hwif);
diff --git a/drivers/ide/legacy/umc8672.c b/drivers/ide/legacy/umc8672.c
index d2862e638bc5..1151c92dd531 100644
--- a/drivers/ide/legacy/umc8672.c
+++ b/drivers/ide/legacy/umc8672.c
@@ -105,12 +105,11 @@ static void umc_set_speeds (u8 speeds[])
105 speeds[0], speeds[1], speeds[2], speeds[3]); 105 speeds[0], speeds[1], speeds[2], speeds[3]);
106} 106}
107 107
108static void tune_umc (ide_drive_t *drive, u8 pio) 108static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio)
109{ 109{
110 unsigned long flags; 110 unsigned long flags;
111 ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup; 111 ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup;
112 112
113 pio = ide_get_best_pio_mode(drive, pio, 4);
114 printk("%s: setting umc8672 to PIO mode%d (speed %d)\n", 113 printk("%s: setting umc8672 to PIO mode%d (speed %d)\n",
115 drive->name, pio, pio_to_umc[pio]); 114 drive->name, pio, pio_to_umc[pio]);
116 spin_lock_irqsave(&ide_lock, flags); 115 spin_lock_irqsave(&ide_lock, flags);
@@ -150,12 +149,12 @@ static int __init umc8672_probe(void)
150 149
151 hwif->chipset = ide_umc8672; 150 hwif->chipset = ide_umc8672;
152 hwif->pio_mask = ATA_PIO4; 151 hwif->pio_mask = ATA_PIO4;
153 hwif->tuneproc = &tune_umc; 152 hwif->set_pio_mode = &umc_set_pio_mode;
154 hwif->mate = mate; 153 hwif->mate = mate;
155 154
156 mate->chipset = ide_umc8672; 155 mate->chipset = ide_umc8672;
157 mate->pio_mask = ATA_PIO4; 156 mate->pio_mask = ATA_PIO4;
158 mate->tuneproc = &tune_umc; 157 mate->set_pio_mode = &umc_set_pio_mode;
159 mate->mate = hwif; 158 mate->mate = hwif;
160 mate->channel = 1; 159 mate->channel = 1;
161 160
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index 2ba6a054b861..85819ae20602 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -99,18 +99,12 @@ void auide_outsw(unsigned long port, void *addr, u32 count)
99 99
100#endif 100#endif
101 101
102static void auide_tune_drive(ide_drive_t *drive, byte pio) 102static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
103{ 103{
104 int mem_sttime; 104 int mem_sttime;
105 int mem_stcfg; 105 int mem_stcfg;
106 u8 speed; 106 u8 speed;
107 107
108 /* get the best pio mode for the drive */
109 pio = ide_get_best_pio_mode(drive, pio, 4);
110
111 printk(KERN_INFO "%s: setting Au1XXX IDE to PIO mode%d\n",
112 drive->name, pio);
113
114 mem_sttime = 0; 108 mem_sttime = 0;
115 mem_stcfg = au_readl(MEM_STCFG2); 109 mem_stcfg = au_readl(MEM_STCFG2);
116 110
@@ -175,7 +169,7 @@ static void auide_tune_drive(ide_drive_t *drive, byte pio)
175 ide_config_drive_speed(drive, speed); 169 ide_config_drive_speed(drive, speed);
176} 170}
177 171
178static int auide_tune_chipset (ide_drive_t *drive, u8 speed) 172static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)
179{ 173{
180 int mem_sttime; 174 int mem_sttime;
181 int mem_stcfg; 175 int mem_stcfg;
@@ -183,11 +177,6 @@ static int auide_tune_chipset (ide_drive_t *drive, u8 speed)
183 mem_sttime = 0; 177 mem_sttime = 0;
184 mem_stcfg = au_readl(MEM_STCFG2); 178 mem_stcfg = au_readl(MEM_STCFG2);
185 179
186 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
187 auide_tune_drive(drive, speed - XFER_PIO_0);
188 return 0;
189 }
190
191 switch(speed) { 180 switch(speed) {
192#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 181#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
193 case XFER_MW_DMA_2: 182 case XFER_MW_DMA_2:
@@ -712,7 +701,7 @@ static int au_ide_probe(struct device *dev)
712 hwif->OUTSW = auide_outsw; 701 hwif->OUTSW = auide_outsw;
713#endif 702#endif
714 703
715 hwif->tuneproc = &auide_tune_drive; 704 hwif->set_pio_mode = &au1xxx_set_pio_mode;
716 hwif->speedproc = &auide_tune_chipset; 705 hwif->speedproc = &auide_tune_chipset;
717 706
718#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 707#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 74432830abf7..0d5f62c5dfae 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -87,12 +87,11 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr
87 return chipset_table->ultra_settings; 87 return chipset_table->ultra_settings;
88} 88}
89 89
90static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed) 90static int aec6210_tune_chipset(ide_drive_t *drive, const u8 speed)
91{ 91{
92 ide_hwif_t *hwif = HWIF(drive); 92 ide_hwif_t *hwif = HWIF(drive);
93 struct pci_dev *dev = hwif->pci_dev; 93 struct pci_dev *dev = hwif->pci_dev;
94 u16 d_conf = 0; 94 u16 d_conf = 0;
95 u8 speed = ide_rate_filter(drive, xferspeed);
96 u8 ultra = 0, ultra_conf = 0; 95 u8 ultra = 0, ultra_conf = 0;
97 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; 96 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
98 unsigned long flags; 97 unsigned long flags;
@@ -115,11 +114,10 @@ static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
115 return(ide_config_drive_speed(drive, speed)); 114 return(ide_config_drive_speed(drive, speed));
116} 115}
117 116
118static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed) 117static int aec6260_tune_chipset(ide_drive_t *drive, const u8 speed)
119{ 118{
120 ide_hwif_t *hwif = HWIF(drive); 119 ide_hwif_t *hwif = HWIF(drive);
121 struct pci_dev *dev = hwif->pci_dev; 120 struct pci_dev *dev = hwif->pci_dev;
122 u8 speed = ide_rate_filter(drive, xferspeed);
123 u8 unit = (drive->select.b.unit & 0x01); 121 u8 unit = (drive->select.b.unit & 0x01);
124 u8 tmp1 = 0, tmp2 = 0; 122 u8 tmp1 = 0, tmp2 = 0;
125 u8 ultra = 0, drive_conf = 0, ultra_conf = 0; 123 u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
@@ -140,9 +138,8 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
140 return(ide_config_drive_speed(drive, speed)); 138 return(ide_config_drive_speed(drive, speed));
141} 139}
142 140
143static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) 141static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
144{ 142{
145 pio = ide_get_best_pio_mode(drive, pio, 4);
146 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); 143 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0);
147} 144}
148 145
@@ -152,7 +149,7 @@ static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
152 return 0; 149 return 0;
153 150
154 if (ide_use_fast_pio(drive)) 151 if (ide_use_fast_pio(drive))
155 aec62xx_tune_drive(drive, 255); 152 ide_set_max_pio(drive);
156 153
157 return -1; 154 return -1;
158} 155}
@@ -203,7 +200,7 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
203 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f; 200 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f;
204 unsigned long flags; 201 unsigned long flags;
205 202
206 hwif->tuneproc = &aec62xx_tune_drive; 203 hwif->set_pio_mode = &aec_set_pio_mode;
207 204
208 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 205 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
209 if(hwif->mate) 206 if(hwif->mate)
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 11ecb618007c..d04b966b4347 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/alim15x3.c Version 0.25 Jun 9 2007 2 * linux/drivers/ide/pci/alim15x3.c Version 0.26 Jul 14 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
@@ -283,17 +283,14 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ 283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
284 284
285/** 285/**
286 * ali15x3_tune_pio - set up chipset for PIO mode 286 * ali_tune_pio - set host controller for PIO mode
287 * @drive: drive to tune 287 * @drive: drive
288 * @pio: desired mode 288 * @pio: PIO mode number
289 *
290 * Select the best PIO mode for the drive in question.
291 * Then program the controller for this mode.
292 * 289 *
293 * Returns the PIO mode programmed. 290 * Program the controller for the given PIO mode.
294 */ 291 */
295 292
296static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio) 293static void ali_tune_pio(ide_drive_t *drive, const u8 pio)
297{ 294{
298 ide_hwif_t *hwif = HWIF(drive); 295 ide_hwif_t *hwif = HWIF(drive);
299 struct pci_dev *dev = hwif->pci_dev; 296 struct pci_dev *dev = hwif->pci_dev;
@@ -306,7 +303,6 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio)
306 u8 cd_dma_fifo = 0; 303 u8 cd_dma_fifo = 0;
307 int unit = drive->select.b.unit & 1; 304 int unit = drive->select.b.unit & 1;
308 305
309 pio = ide_get_best_pio_mode(drive, pio, 5);
310 s_time = ide_pio_timings[pio].setup_time; 306 s_time = ide_pio_timings[pio].setup_time;
311 a_time = ide_pio_timings[pio].active_time; 307 a_time = ide_pio_timings[pio].active_time;
312 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) 308 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
@@ -359,22 +355,20 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio)
359 * { 25, 70, 25 }, PIO Mode 4 with IORDY ns 355 * { 25, 70, 25 }, PIO Mode 4 with IORDY ns
360 * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard) 356 * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard)
361 */ 357 */
362
363 return pio;
364} 358}
365 359
366/** 360/**
367 * ali15x3_tune_drive - set up drive for PIO mode 361 * ali_set_pio_mode - set up drive for PIO mode
368 * @drive: drive to tune 362 * @drive: drive to tune
369 * @pio: desired mode 363 * @pio: desired mode
370 * 364 *
371 * Program the controller with the best PIO timing for the given drive. 365 * Program the controller with the desired PIO timing for the given drive.
372 * Then set up the drive itself. 366 * Then set up the drive itself.
373 */ 367 */
374 368
375static void ali15x3_tune_drive (ide_drive_t *drive, u8 pio) 369static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
376{ 370{
377 pio = ali15x3_tune_pio(drive, pio); 371 ali_tune_pio(drive, pio);
378 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 372 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
379} 373}
380 374
@@ -409,22 +403,24 @@ static u8 ali_udma_filter(ide_drive_t *drive)
409/** 403/**
410 * ali15x3_tune_chipset - set up chipset/drive for new speed 404 * ali15x3_tune_chipset - set up chipset/drive for new speed
411 * @drive: drive to configure for 405 * @drive: drive to configure for
412 * @xferspeed: desired speed 406 * @speed: desired speed
413 * 407 *
414 * Configure the hardware for the desired IDE transfer mode. 408 * Configure the hardware for the desired IDE transfer mode.
415 * We also do the needed drive configuration through helpers 409 * We also do the needed drive configuration through helpers
416 */ 410 */
417 411
418static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed) 412static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
419{ 413{
420 ide_hwif_t *hwif = HWIF(drive); 414 ide_hwif_t *hwif = HWIF(drive);
421 struct pci_dev *dev = hwif->pci_dev; 415 struct pci_dev *dev = hwif->pci_dev;
422 u8 speed = ide_rate_filter(drive, xferspeed);
423 u8 speed1 = speed; 416 u8 speed1 = speed;
424 u8 unit = (drive->select.b.unit & 0x01); 417 u8 unit = (drive->select.b.unit & 0x01);
425 u8 tmpbyte = 0x00; 418 u8 tmpbyte = 0x00;
426 int m5229_udma = (hwif->channel) ? 0x57 : 0x56; 419 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
427 420
421 if (speed < XFER_PIO_0)
422 return 1;
423
428 if (speed == XFER_UDMA_6) 424 if (speed == XFER_UDMA_6)
429 speed1 = 0x47; 425 speed1 = 0x47;
430 426
@@ -437,8 +433,9 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed)
437 tmpbyte &= ultra_enable; 433 tmpbyte &= ultra_enable;
438 pci_write_config_byte(dev, m5229_udma, tmpbyte); 434 pci_write_config_byte(dev, m5229_udma, tmpbyte);
439 435
440 if (speed < XFER_SW_DMA_0) 436 /*
441 (void) ali15x3_tune_pio(drive, speed - XFER_PIO_0); 437 * FIXME: Oh, my... DMA timings are never set.
438 */
442 } else { 439 } else {
443 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 440 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
444 tmpbyte &= (0x0f << ((1-unit) << 2)); 441 tmpbyte &= (0x0f << ((1-unit) << 2));
@@ -471,7 +468,7 @@ static int ali15x3_config_drive_for_dma(ide_drive_t *drive)
471 if (ide_tune_dma(drive)) 468 if (ide_tune_dma(drive))
472 return 0; 469 return 0;
473 470
474 ali15x3_tune_drive(drive, 255); 471 ide_set_max_pio(drive);
475 472
476 return -1; 473 return -1;
477} 474}
@@ -588,7 +585,7 @@ out:
588 * Cable special cases 585 * Cable special cases
589 */ 586 */
590 587
591static struct dmi_system_id cable_dmi_table[] = { 588static const struct dmi_system_id cable_dmi_table[] = {
592 { 589 {
593 .ident = "HP Pavilion N5430", 590 .ident = "HP Pavilion N5430",
594 .matches = { 591 .matches = {
@@ -701,7 +698,7 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
701static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) 698static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
702{ 699{
703 hwif->autodma = 0; 700 hwif->autodma = 0;
704 hwif->tuneproc = &ali15x3_tune_drive; 701 hwif->set_pio_mode = &ali_set_pio_mode;
705 hwif->speedproc = &ali15x3_tune_chipset; 702 hwif->speedproc = &ali15x3_tune_chipset;
706 hwif->udma_filter = &ali_udma_filter; 703 hwif->udma_filter = &ali_udma_filter;
707 704
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 06c15a6a3e7d..513205e52ad2 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Version 2.21 2 * Version 2.22
3 * 3 *
4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
5 * IDE driver for Linux. 5 * IDE driver for Linux.
@@ -234,7 +234,7 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
234 * by upper layers. 234 * by upper layers.
235 */ 235 */
236 236
237static int amd_set_drive(ide_drive_t *drive, u8 speed) 237static int amd_set_drive(ide_drive_t *drive, const u8 speed)
238{ 238{
239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
240 struct ide_timing t, p; 240 struct ide_timing t, p;
@@ -266,32 +266,21 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
266} 266}
267 267
268/* 268/*
269 * amd74xx_tune_drive() is a callback from upper layers for 269 * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
270 * PIO-only tuning.
271 */ 270 */
272 271
273static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) 272static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio)
274{ 273{
275 if (pio == 255) 274 amd_set_drive(drive, XFER_PIO_0 + pio);
276 pio = ide_get_best_pio_mode(drive, 255, 5);
277
278 amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
279} 275}
280 276
281static int amd74xx_ide_dma_check(ide_drive_t *drive) 277static int amd74xx_ide_dma_check(ide_drive_t *drive)
282{ 278{
283 u8 speed = ide_max_dma_mode(drive); 279 if (ide_tune_dma(drive))
284
285 if (speed == 0) {
286 amd74xx_tune_drive(drive, 255);
287 return -1;
288 }
289
290 amd_set_drive(drive, speed);
291
292 if (drive->autodma)
293 return 0; 280 return 0;
294 281
282 ide_set_max_pio(drive);
283
295 return -1; 284 return -1;
296} 285}
297 286
@@ -409,7 +398,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
409 398
410 hwif->autodma = 0; 399 hwif->autodma = 0;
411 400
412 hwif->tuneproc = &amd74xx_tune_drive; 401 hwif->set_pio_mode = &amd_set_pio_mode;
413 hwif->speedproc = &amd_set_drive; 402 hwif->speedproc = &amd_set_drive;
414 403
415 for (i = 0; i < 2; i++) { 404 for (i = 0; i < 2; i++) {
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 1725aa402d98..178876a3afca 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -153,9 +153,8 @@ static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
153 spin_unlock_irqrestore(&atiixp_lock, flags); 153 spin_unlock_irqrestore(&atiixp_lock, flags);
154} 154}
155 155
156static void atiixp_tuneproc(ide_drive_t *drive, u8 pio) 156static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
157{ 157{
158 pio = ide_get_best_pio_mode(drive, pio, 4);
159 atiixp_tune_pio(drive, pio); 158 atiixp_tune_pio(drive, pio);
160 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 159 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
161} 160}
@@ -163,28 +162,21 @@ static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
163/** 162/**
164 * atiixp_tune_chipset - tune a ATIIXP interface 163 * atiixp_tune_chipset - tune a ATIIXP interface
165 * @drive: IDE drive to tune 164 * @drive: IDE drive to tune
166 * @xferspeed: speed to configure 165 * @speed: speed to configure
167 * 166 *
168 * Set a ATIIXP interface channel to the desired speeds. This involves 167 * Set a ATIIXP interface channel to the desired speeds. This involves
169 * requires the right timing data into the ATIIXP configuration space 168 * requires the right timing data into the ATIIXP configuration space
170 * then setting the drive parameters appropriately 169 * then setting the drive parameters appropriately
171 */ 170 */
172 171
173static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed) 172static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
174{ 173{
175 struct pci_dev *dev = drive->hwif->pci_dev; 174 struct pci_dev *dev = drive->hwif->pci_dev;
176 unsigned long flags; 175 unsigned long flags;
177 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 176 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
178 u32 tmp32; 177 u32 tmp32;
179 u16 tmp16; 178 u16 tmp16;
180 u8 speed, pio; 179 u8 pio;
181
182 speed = ide_rate_filter(drive, xferspeed);
183
184 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
185 atiixp_tune_pio(drive, speed - XFER_PIO_0);
186 return ide_config_drive_speed(drive, speed);
187 }
188 180
189 spin_lock_irqsave(&atiixp_lock, flags); 181 spin_lock_irqsave(&atiixp_lock, flags);
190 182
@@ -233,7 +225,7 @@ static int atiixp_dma_check(ide_drive_t *drive)
233 return 0; 225 return 0;
234 226
235 if (ide_use_fast_pio(drive)) 227 if (ide_use_fast_pio(drive))
236 atiixp_tuneproc(drive, 255); 228 ide_set_max_pio(drive);
237 229
238 return -1; 230 return -1;
239} 231}
@@ -256,7 +248,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
256 hwif->irq = ch ? 15 : 14; 248 hwif->irq = ch ? 15 : 14;
257 249
258 hwif->autodma = 0; 250 hwif->autodma = 0;
259 hwif->tuneproc = &atiixp_tuneproc; 251 hwif->set_pio_mode = &atiixp_set_pio_mode;
260 hwif->speedproc = &atiixp_speedproc; 252 hwif->speedproc = &atiixp_speedproc;
261 hwif->drives[0].autotune = 1; 253 hwif->drives[0].autotune = 1;
262 hwif->drives[1].autotune = 1; 254 hwif->drives[1].autotune = 1;
@@ -325,7 +317,7 @@ static struct pci_device_id atiixp_pci_tbl[] = {
325 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 317 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
326 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 318 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
327 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 319 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
328 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 320 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
329 { 0, }, 321 { 0, },
330}; 322};
331MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); 323MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index 9689494efa24..f369645e4d16 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -628,45 +628,40 @@ static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle
628 program_drive_counts (index); 628 program_drive_counts (index);
629} 629}
630 630
631/* 631static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
632 * Drive PIO mode selection:
633 */
634static void cmd640_tune_drive (ide_drive_t *drive, u8 mode_wanted)
635{ 632{
636 unsigned int index = 0, cycle_time; 633 unsigned int index = 0, cycle_time;
637 u8 b; 634 u8 b;
638 635
639 while (drive != cmd_drives[index]) { 636 while (drive != cmd_drives[index]) {
640 if (++index > 3) { 637 if (++index > 3) {
641 printk("%s: bad news in cmd640_tune_drive\n", drive->name); 638 printk(KERN_ERR "%s: bad news in %s\n",
639 drive->name, __FUNCTION__);
642 return; 640 return;
643 } 641 }
644 } 642 }
645 switch (mode_wanted) { 643 switch (pio) {
646 case 6: /* set fast-devsel off */ 644 case 6: /* set fast-devsel off */
647 case 7: /* set fast-devsel on */ 645 case 7: /* set fast-devsel on */
648 mode_wanted &= 1;
649 b = get_cmd640_reg(CNTRL) & ~0x27; 646 b = get_cmd640_reg(CNTRL) & ~0x27;
650 if (mode_wanted) 647 if (pio & 1)
651 b |= 0x27; 648 b |= 0x27;
652 put_cmd640_reg(CNTRL, b); 649 put_cmd640_reg(CNTRL, b);
653 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis"); 650 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis");
654 return; 651 return;
655 652
656 case 8: /* set prefetch off */ 653 case 8: /* set prefetch off */
657 case 9: /* set prefetch on */ 654 case 9: /* set prefetch on */
658 mode_wanted &= 1; 655 set_prefetch_mode(index, pio & 1);
659 set_prefetch_mode(index, mode_wanted); 656 printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis");
660 printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis");
661 return; 657 return;
662 } 658 }
663 659
664 mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 5); 660 cycle_time = ide_pio_cycle_time(drive, pio);
665 cycle_time = ide_pio_cycle_time(drive, mode_wanted); 661 cmd640_set_mode(index, pio, cycle_time);
666 cmd640_set_mode(index, mode_wanted, cycle_time);
667 662
668 printk("%s: selected cmd640 PIO mode%d (%dns)", 663 printk("%s: selected cmd640 PIO mode%d (%dns)",
669 drive->name, mode_wanted, cycle_time); 664 drive->name, pio, cycle_time);
670 665
671 display_clocks(index); 666 display_clocks(index);
672} 667}
@@ -766,8 +761,10 @@ int __init ide_probe_for_cmd640x (void)
766 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr); 761 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
767 cmd_hwif0->chipset = ide_cmd640; 762 cmd_hwif0->chipset = ide_cmd640;
768#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 763#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
764 cmd_hwif0->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
765 IDE_HFLAG_ABUSE_FAST_DEVSEL;
769 cmd_hwif0->pio_mask = ATA_PIO5; 766 cmd_hwif0->pio_mask = ATA_PIO5;
770 cmd_hwif0->tuneproc = &cmd640_tune_drive; 767 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
771#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 768#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
772 769
773 /* 770 /*
@@ -822,8 +819,10 @@ int __init ide_probe_for_cmd640x (void)
822 cmd_hwif1->mate = cmd_hwif0; 819 cmd_hwif1->mate = cmd_hwif0;
823 cmd_hwif1->channel = 1; 820 cmd_hwif1->channel = 1;
824#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 821#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
822 cmd_hwif1->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
823 IDE_HFLAG_ABUSE_FAST_DEVSEL;
825 cmd_hwif1->pio_mask = ATA_PIO5; 824 cmd_hwif1->pio_mask = ATA_PIO5;
826 cmd_hwif1->tuneproc = &cmd640_tune_drive; 825 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
827#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 826#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
828 } 827 }
829 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name, 828 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0e3b5de26e69..0b568c60f926 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -214,28 +214,25 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
214} 214}
215 215
216/* 216/*
217 * This routine selects drive's best PIO mode and writes into the chipset 217 * This routine writes into the chipset registers
218 * registers setup/active/recovery timings. 218 * PIO setup/active/recovery timings.
219 */ 219 */
220static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted) 220static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
221{ 221{
222 ide_hwif_t *hwif = HWIF(drive); 222 ide_hwif_t *hwif = HWIF(drive);
223 struct pci_dev *dev = hwif->pci_dev; 223 struct pci_dev *dev = hwif->pci_dev;
224 unsigned int cycle_time; 224 unsigned int cycle_time;
225 u8 pio_mode, setup_count, arttim = 0; 225 u8 setup_count, arttim = 0;
226
226 static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0}; 227 static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
227 static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; 228 static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
228 229
229 pio_mode = ide_get_best_pio_mode(drive, mode_wanted, 5); 230 cycle_time = ide_pio_cycle_time(drive, pio);
230 cycle_time = ide_pio_cycle_time(drive, pio_mode);
231
232 cmdprintk("%s: PIO mode wanted %d, selected %d (%d ns)\n",
233 drive->name, mode_wanted, pio_mode, cycle_time);
234 231
235 program_cycle_times(drive, cycle_time, 232 program_cycle_times(drive, cycle_time,
236 ide_pio_timings[pio_mode].active_time); 233 ide_pio_timings[pio].active_time);
237 234
238 setup_count = quantize_timing(ide_pio_timings[pio_mode].setup_time, 235 setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
239 1000 / system_bus_clock()); 236 1000 / system_bus_clock());
240 237
241 /* 238 /*
@@ -266,16 +263,14 @@ static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted)
266 arttim |= setup_values[setup_count]; 263 arttim |= setup_values[setup_count];
267 (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim); 264 (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
268 cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]); 265 cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]);
269
270 return pio_mode;
271} 266}
272 267
273/* 268/*
274 * Attempts to set drive's PIO mode. 269 * Attempts to set drive's PIO mode.
275 * Special cases are 8: prefetch off, 9: prefetch on (both never worked), 270 * Special cases are 8: prefetch off, 9: prefetch on (both never worked)
276 * and 255: auto-select best mode (used at boot time).
277 */ 271 */
278static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio) 272
273static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
279{ 274{
280 /* 275 /*
281 * Filter out the prefetch control values 276 * Filter out the prefetch control values
@@ -284,19 +279,17 @@ static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio)
284 if (pio == 8 || pio == 9) 279 if (pio == 8 || pio == 9)
285 return; 280 return;
286 281
287 pio = cmd64x_tune_pio(drive, pio); 282 cmd64x_tune_pio(drive, pio);
288 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 283 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
289} 284}
290 285
291static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed) 286static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)
292{ 287{
293 ide_hwif_t *hwif = HWIF(drive); 288 ide_hwif_t *hwif = HWIF(drive);
294 struct pci_dev *dev = hwif->pci_dev; 289 struct pci_dev *dev = hwif->pci_dev;
295 u8 unit = drive->dn & 0x01; 290 u8 unit = drive->dn & 0x01;
296 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0; 291 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
297 292
298 speed = ide_rate_filter(drive, speed);
299
300 if (speed >= XFER_SW_DMA_0) { 293 if (speed >= XFER_SW_DMA_0) {
301 (void) pci_read_config_byte(dev, pciU, &regU); 294 (void) pci_read_config_byte(dev, pciU, &regU);
302 regU &= ~(unit ? 0xCA : 0x35); 295 regU &= ~(unit ? 0xCA : 0x35);
@@ -330,14 +323,6 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
330 case XFER_MW_DMA_0: 323 case XFER_MW_DMA_0:
331 program_cycle_times(drive, 480, 215); 324 program_cycle_times(drive, 480, 215);
332 break; 325 break;
333 case XFER_PIO_5:
334 case XFER_PIO_4:
335 case XFER_PIO_3:
336 case XFER_PIO_2:
337 case XFER_PIO_1:
338 case XFER_PIO_0:
339 (void) cmd64x_tune_pio(drive, speed - XFER_PIO_0);
340 break;
341 default: 326 default:
342 return 1; 327 return 1;
343 } 328 }
@@ -354,7 +339,7 @@ static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
354 return 0; 339 return 0;
355 340
356 if (ide_use_fast_pio(drive)) 341 if (ide_use_fast_pio(drive))
357 cmd64x_tune_drive(drive, 255); 342 ide_set_max_pio(drive);
358 343
359 return -1; 344 return -1;
360} 345}
@@ -538,7 +523,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
538 523
539 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 524 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
540 525
541 hwif->tuneproc = &cmd64x_tune_drive; 526 hwif->set_pio_mode = &cmd64x_set_pio_mode;
542 hwif->speedproc = &cmd64x_tune_chipset; 527 hwif->speedproc = &cmd64x_tune_chipset;
543 528
544 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 529 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
@@ -622,6 +607,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
622 .autodma = AUTODMA, 607 .autodma = AUTODMA,
623 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 608 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
624 .bootable = ON_BOARD, 609 .bootable = ON_BOARD,
610 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
625 .pio_mask = ATA_PIO5, 611 .pio_mask = ATA_PIO5,
626 .udma_mask = 0x00, /* no udma */ 612 .udma_mask = 0x00, /* no udma */
627 },{ /* 1 */ 613 },{ /* 1 */
@@ -632,6 +618,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
632 .autodma = AUTODMA, 618 .autodma = AUTODMA,
633 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 619 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
634 .bootable = ON_BOARD, 620 .bootable = ON_BOARD,
621 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
635 .pio_mask = ATA_PIO5, 622 .pio_mask = ATA_PIO5,
636 .udma_mask = 0x07, /* udma0-2 */ 623 .udma_mask = 0x07, /* udma0-2 */
637 },{ /* 2 */ 624 },{ /* 2 */
@@ -642,6 +629,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
642 .autodma = AUTODMA, 629 .autodma = AUTODMA,
643 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 630 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
644 .bootable = ON_BOARD, 631 .bootable = ON_BOARD,
632 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
645 .pio_mask = ATA_PIO5, 633 .pio_mask = ATA_PIO5,
646 .udma_mask = 0x1f, /* udma0-4 */ 634 .udma_mask = 0x1f, /* udma0-4 */
647 },{ /* 3 */ 635 },{ /* 3 */
@@ -652,6 +640,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
652 .autodma = AUTODMA, 640 .autodma = AUTODMA,
653 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 641 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
654 .bootable = ON_BOARD, 642 .bootable = ON_BOARD,
643 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
655 .pio_mask = ATA_PIO5, 644 .pio_mask = ATA_PIO5,
656 .udma_mask = 0x3f, /* udma0-5 */ 645 .udma_mask = 0x3f, /* udma0-5 */
657 } 646 }
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index b89e81656875..1217d2a747fb 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -66,32 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={
66 {1, 2, 1} 66 {1, 2, 1}
67}; 67};
68 68
69static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed) 69static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
70{ 70{
71 ide_hwif_t *hwif = HWIF(drive); 71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev; 72 struct pci_dev *pdev = hwif->pci_dev;
73 u8 speed = min((u8)XFER_PIO_4, xferspeed);
74 int pio = speed;
75 u8 reg;
76 int controller = drive->dn > 1 ? 1 : 0; 73 int controller = drive->dn > 1 ? 1 : 0;
77 int error; 74 u8 reg;
78 75
79 switch(speed)
80 {
81 case XFER_PIO_4:
82 case XFER_PIO_3:
83 case XFER_PIO_2:
84 case XFER_PIO_1:
85 case XFER_PIO_0:
86 pio -= XFER_PIO_0;
87 break;
88 default:
89 pio = 0;
90 printk(KERN_ERR "cs55x0: bad ide timing.\n");
91 }
92
93 printk("PIO clocking = %d\n", pio);
94
95 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ 76 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
96 77
97 /* 8bit CAT/CRT - 8bit command timing for channel */ 78 /* 8bit CAT/CRT - 8bit command timing for channel */
@@ -115,25 +96,28 @@ static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed)
115 reg = inb(hwif->dma_base + 0x02 + 8*controller); 96 reg = inb(hwif->dma_base + 0x02 + 8*controller);
116 reg |= 1<<((drive->dn&1)+5); 97 reg |= 1<<((drive->dn&1)+5);
117 outb(reg, hwif->dma_base + 0x02 + 8*controller); 98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
118
119 error = ide_config_drive_speed(drive, speed);
120 /* ATAPI is harder so leave it for now */
121 if(!error && drive->media == ide_disk)
122 error = hwif->ide_dma_on(drive);
123 99
124 return error; 100 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
125} 101}
126 102
127static void cs5520_tune_drive(ide_drive_t *drive, u8 pio) 103static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
128{ 104{
129 pio = ide_get_best_pio_mode(drive, pio, 4); 105 printk(KERN_ERR "cs55x0: bad ide timing.\n");
130 cs5520_tune_chipset(drive, (XFER_PIO_0 + pio)); 106
107 cs5520_set_pio_mode(drive, 0);
108
109 /*
110 * FIXME: this is incorrect to return zero here but
111 * since all users of ide_set_xfer_rate() ignore
112 * the return value it is not a problem currently
113 */
114 return 0;
131} 115}
132 116
133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 117static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
134{ 118{
135 /* Tune the drive for PIO modes up to PIO 4 */ 119 /* Tune the drive for PIO modes up to PIO 4 */
136 cs5520_tune_drive(drive, 255); 120 ide_set_max_pio(drive);
137 121
138 /* Then tell the core to use DMA operations */ 122 /* Then tell the core to use DMA operations */
139 return 0; 123 return 0;
@@ -165,7 +149,7 @@ static int cs5520_dma_on(ide_drive_t *drive)
165 149
166static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) 150static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
167{ 151{
168 hwif->tuneproc = &cs5520_tune_drive; 152 hwif->set_pio_mode = &cs5520_set_pio_mode;
169 hwif->speedproc = &cs5520_tune_chipset; 153 hwif->speedproc = &cs5520_tune_chipset;
170 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; 154 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate;
171 hwif->ide_dma_on = &cs5520_dma_on; 155 hwif->ide_dma_on = &cs5520_dma_on;
@@ -179,7 +163,8 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
179 hwif->drives[1].autotune = 1; 163 hwif->drives[1].autotune = 1;
180 return; 164 return;
181 } 165 }
182 166
167 /* ATAPI is harder so leave it for now */
183 hwif->atapi_dma = 0; 168 hwif->atapi_dma = 0;
184 hwif->ultra_mask = 0; 169 hwif->ultra_mask = 0;
185 hwif->swdma_mask = 0; 170 hwif->swdma_mask = 0;
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index e5949b1d3fb0..741507b4cd93 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -71,19 +71,18 @@ static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
71} 71}
72 72
73/** 73/**
74 * cs5530_tuneproc - select/set PIO modes 74 * cs5530_set_pio_mode - set PIO mode
75 * @drive: drive
76 * @pio: PIO mode number
75 * 77 *
76 * cs5530_tuneproc() handles selection/setting of PIO modes 78 * Handles setting of PIO mode for both the chipset and drive.
77 * for both the chipset and drive.
78 * 79 *
79 * The ide_init_cs5530() routine guarantees that all drives 80 * The init_hwif_cs5530() routine guarantees that all drives
80 * will have valid default PIO timings set up before we get here. 81 * will have valid default PIO timings set up before we get here.
81 */ 82 */
82 83
83static void cs5530_tuneproc (ide_drive_t *drive, u8 pio) /* pio=255 means "autotune" */ 84static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
84{ 85{
85 pio = ide_get_best_pio_mode(drive, pio, 4);
86
87 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 86 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0)
88 cs5530_tunepio(drive, pio); 87 cs5530_tunepio(drive, pio);
89} 88}
@@ -143,13 +142,11 @@ static int cs5530_config_dma(ide_drive_t *drive)
143 return 1; 142 return 1;
144} 143}
145 144
146static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode) 145static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
147{ 146{
148 unsigned long basereg; 147 unsigned long basereg;
149 unsigned int reg, timings = 0; 148 unsigned int reg, timings = 0;
150 149
151 mode = ide_rate_filter(drive, mode);
152
153 /* 150 /*
154 * Tell the drive to switch to the new mode; abort on failure. 151 * Tell the drive to switch to the new mode; abort on failure.
155 */ 152 */
@@ -166,13 +163,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode)
166 case XFER_MW_DMA_0: timings = 0x00077771; break; 163 case XFER_MW_DMA_0: timings = 0x00077771; break;
167 case XFER_MW_DMA_1: timings = 0x00012121; break; 164 case XFER_MW_DMA_1: timings = 0x00012121; break;
168 case XFER_MW_DMA_2: timings = 0x00002020; break; 165 case XFER_MW_DMA_2: timings = 0x00002020; break;
169 case XFER_PIO_4:
170 case XFER_PIO_3:
171 case XFER_PIO_2:
172 case XFER_PIO_1:
173 case XFER_PIO_0:
174 cs5530_tunepio(drive, mode - XFER_PIO_0);
175 return 0;
176 default: 166 default:
177 BUG(); 167 BUG();
178 break; 168 break;
@@ -308,7 +298,7 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
308 if (hwif->mate) 298 if (hwif->mate)
309 hwif->serialized = hwif->mate->serialized = 1; 299 hwif->serialized = hwif->mate->serialized = 1;
310 300
311 hwif->tuneproc = &cs5530_tuneproc; 301 hwif->set_pio_mode = &cs5530_set_pio_mode;
312 hwif->speedproc = &cs5530_tune_chipset; 302 hwif->speedproc = &cs5530_tune_chipset;
313 303
314 basereg = CS5530_BASEREG(hwif); 304 basereg = CS5530_BASEREG(hwif);
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 082ca7da2cbc..383b7eccbcbb 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -75,7 +75,7 @@ static unsigned int cs5535_udma_timings[5] =
75 * 75 *
76 * cs5535_set_speed() configures the chipset to a new speed. 76 * cs5535_set_speed() configures the chipset to a new speed.
77 */ 77 */
78static void cs5535_set_speed(ide_drive_t *drive, u8 speed) 78static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
79{ 79{
80 80
81 u32 reg = 0, dummy; 81 u32 reg = 0, dummy;
@@ -141,23 +141,22 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
141 */ 141 */
142static int cs5535_set_drive(ide_drive_t *drive, u8 speed) 142static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
143{ 143{
144 speed = ide_rate_filter(drive, speed);
145 ide_config_drive_speed(drive, speed); 144 ide_config_drive_speed(drive, speed);
146 cs5535_set_speed(drive, speed); 145 cs5535_set_speed(drive, speed);
147 146
148 return 0; 147 return 0;
149} 148}
150 149
151/**** 150/**
152 * cs5535_tuneproc - PIO setup 151 * cs5535_set_pio_mode - PIO setup
153 * @drive: drive to set up 152 * @drive: drive
154 * @pio: mode to use (255 for 'best possible') 153 * @pio: PIO mode number
155 * 154 *
156 * A callback from the upper layers for PIO-only tuning. 155 * A callback from the upper layers for PIO-only tuning.
157 */ 156 */
158static void cs5535_tuneproc(ide_drive_t *drive, u8 pio) 157
158static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio)
159{ 159{
160 pio = ide_get_best_pio_mode(drive, pio, 4);
161 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 160 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
162 cs5535_set_speed(drive, XFER_PIO_0 + pio); 161 cs5535_set_speed(drive, XFER_PIO_0 + pio);
163} 162}
@@ -170,7 +169,7 @@ static int cs5535_dma_check(ide_drive_t *drive)
170 return 0; 169 return 0;
171 170
172 if (ide_use_fast_pio(drive)) 171 if (ide_use_fast_pio(drive))
173 cs5535_tuneproc(drive, 255); 172 ide_set_max_pio(drive);
174 173
175 return -1; 174 return -1;
176} 175}
@@ -199,7 +198,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
199 198
200 hwif->autodma = 0; 199 hwif->autodma = 0;
201 200
202 hwif->tuneproc = &cs5535_tuneproc; 201 hwif->set_pio_mode = &cs5535_set_pio_mode;
203 hwif->speedproc = &cs5535_set_drive; 202 hwif->speedproc = &cs5535_set_drive;
204 hwif->ide_dma_check = &cs5535_dma_check; 203 hwif->ide_dma_check = &cs5535_dma_check;
205 204
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index daa36fcbc8ef..dc278025d318 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -97,9 +97,6 @@
97#define CY82_INDEX_CHANNEL1 0x31 97#define CY82_INDEX_CHANNEL1 0x31
98#define CY82_INDEX_TIMEOUT 0x32 98#define CY82_INDEX_TIMEOUT 0x32
99 99
100/* the max PIO mode - from datasheet */
101#define CY82C693_MAX_PIO 4
102
103/* the min and max PCI bus speed in MHz - from datasheet */ 100/* the min and max PCI bus speed in MHz - from datasheet */
104#define CY82C963_MIN_BUS_SPEED 25 101#define CY82C963_MIN_BUS_SPEED 25
105#define CY82C963_MAX_BUS_SPEED 33 102#define CY82C963_MAX_BUS_SPEED 33
@@ -148,9 +145,6 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
148 * so you can play with the idebus=xx parameter 145 * so you can play with the idebus=xx parameter
149 */ 146 */
150 147
151 if (pio > CY82C693_MAX_PIO)
152 pio = CY82C693_MAX_PIO;
153
154 /* let's calc the address setup time clocks */ 148 /* let's calc the address setup time clocks */
155 p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed); 149 p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed);
156 150
@@ -269,10 +263,7 @@ static int cy82c693_ide_dma_on (ide_drive_t *drive)
269 return __ide_dma_on(drive); 263 return __ide_dma_on(drive);
270} 264}
271 265
272/* 266static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
273 * tune ide drive - set PIO mode
274 */
275static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio)
276{ 267{
277 ide_hwif_t *hwif = HWIF(drive); 268 ide_hwif_t *hwif = HWIF(drive);
278 struct pci_dev *dev = hwif->pci_dev; 269 struct pci_dev *dev = hwif->pci_dev;
@@ -329,13 +320,6 @@ static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio)
329 addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8); 320 addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
330#endif /* CY82C693_DEBUG_LOGS */ 321#endif /* CY82C693_DEBUG_LOGS */
331 322
332 /* first let's calc the pio modes */
333 pio = ide_get_best_pio_mode(drive, pio, CY82C693_MAX_PIO);
334
335#if CY82C693_DEBUG_INFO
336 printk (KERN_INFO "%s: Selected PIO mode %d\n", drive->name, pio);
337#endif /* CY82C693_DEBUG_INFO */
338
339 /* let's calc the values for this PIO mode */ 323 /* let's calc the values for this PIO mode */
340 compute_clocks(pio, &pclk); 324 compute_clocks(pio, &pclk);
341 325
@@ -447,7 +431,7 @@ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
447 hwif->autodma = 0; 431 hwif->autodma = 0;
448 432
449 hwif->chipset = ide_cy82c693; 433 hwif->chipset = ide_cy82c693;
450 hwif->tuneproc = &cy82c693_tune_drive; 434 hwif->set_pio_mode = &cy82c693_set_pio_mode;
451 435
452 if (!hwif->dma_base) { 436 if (!hwif->dma_base) {
453 hwif->drives[0].autotune = 1; 437 hwif->drives[0].autotune = 1;
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index cb8fe5643d3b..a1bb10188fe5 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -43,10 +43,9 @@
43 43
44#define HPT343_DEBUG_DRIVE_INFO 0 44#define HPT343_DEBUG_DRIVE_INFO 0
45 45
46static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) 46static int hpt34x_tune_chipset(ide_drive_t *drive, const u8 speed)
47{ 47{
48 struct pci_dev *dev = HWIF(drive)->pci_dev; 48 struct pci_dev *dev = HWIF(drive)->pci_dev;
49 u8 speed = ide_rate_filter(drive, xferspeed);
50 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; 49 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
51 u8 hi_speed, lo_speed; 50 u8 hi_speed, lo_speed;
52 51
@@ -78,9 +77,8 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
78 return(ide_config_drive_speed(drive, speed)); 77 return(ide_config_drive_speed(drive, speed));
79} 78}
80 79
81static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio) 80static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio)
82{ 81{
83 pio = ide_get_best_pio_mode(drive, pio, 5);
84 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); 82 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio));
85} 83}
86 84
@@ -92,7 +90,7 @@ static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
92 return -1; 90 return -1;
93 91
94 if (ide_use_fast_pio(drive)) 92 if (ide_use_fast_pio(drive))
95 hpt34x_tune_drive(drive, 255); 93 ide_set_max_pio(drive);
96 94
97 return -1; 95 return -1;
98} 96}
@@ -146,7 +144,7 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
146 144
147 hwif->autodma = 0; 145 hwif->autodma = 0;
148 146
149 hwif->tuneproc = &hpt34x_tune_drive; 147 hwif->set_pio_mode = &hpt34x_set_pio_mode;
150 hwif->speedproc = &hpt34x_tune_chipset; 148 hwif->speedproc = &hpt34x_tune_chipset;
151 hwif->drives[0].autotune = 1; 149 hwif->drives[0].autotune = 1;
152 hwif->drives[1].autotune = 1; 150 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 39f1c89f7c86..0e7d3b60d43c 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/hpt366.c Version 1.12 Aug 19, 2007 2 * linux/drivers/ide/pci/hpt366.c Version 1.13 Sep 29, 2007
3 * 3 *
4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
5 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 5 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
@@ -114,7 +114,7 @@
114 * unify HPT36x/37x timing setup code and the speedproc handlers by joining 114 * unify HPT36x/37x timing setup code and the speedproc handlers by joining
115 * the register setting lists into the table indexed by the clock selected 115 * the register setting lists into the table indexed by the clock selected
116 * - set the correct hwif->ultra_mask for each individual chip 116 * - set the correct hwif->ultra_mask for each individual chip
117 * - add UltraDMA mode filtering for the HPT37[24] based SATA cards 117 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
118 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 118 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
119 */ 119 */
120 120
@@ -562,6 +562,24 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive)
562 return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; 562 return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask;
563} 563}
564 564
565static u8 hpt3xx_mdma_filter(ide_drive_t *drive)
566{
567 ide_hwif_t *hwif = HWIF(drive);
568 struct hpt_info *info = pci_get_drvdata(hwif->pci_dev);
569
570 switch (info->chip_type) {
571 case HPT372 :
572 case HPT372A:
573 case HPT372N:
574 case HPT374 :
575 if (ide_dev_is_sata(drive->id))
576 return 0x00;
577 /* Fall thru */
578 default:
579 return 0x07;
580 }
581}
582
565static u32 get_speed_setting(u8 speed, struct hpt_info *info) 583static u32 get_speed_setting(u8 speed, struct hpt_info *info)
566{ 584{
567 int i; 585 int i;
@@ -582,20 +600,15 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info)
582 return (*info->settings)[i]; 600 return (*info->settings)[i];
583} 601}
584 602
585static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed) 603static int hpt36x_tune_chipset(ide_drive_t *drive, const u8 speed)
586{ 604{
587 ide_hwif_t *hwif = HWIF(drive); 605 ide_hwif_t *hwif = HWIF(drive);
588 struct pci_dev *dev = hwif->pci_dev; 606 struct pci_dev *dev = hwif->pci_dev;
589 struct hpt_info *info = pci_get_drvdata(dev); 607 struct hpt_info *info = pci_get_drvdata(dev);
590 u8 speed = ide_rate_filter(drive, xferspeed);
591 u8 itr_addr = drive->dn ? 0x44 : 0x40; 608 u8 itr_addr = drive->dn ? 0x44 : 0x40;
592 u32 old_itr = 0; 609 u32 old_itr = 0;
593 u32 itr_mask, new_itr; 610 u32 itr_mask, new_itr;
594 611
595 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
596 if (drive->media != ide_disk)
597 speed = min_t(u8, speed, XFER_PIO_4);
598
599 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 : 612 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 :
600 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff); 613 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff);
601 614
@@ -614,20 +627,15 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed)
614 return ide_config_drive_speed(drive, speed); 627 return ide_config_drive_speed(drive, speed);
615} 628}
616 629
617static int hpt37x_tune_chipset(ide_drive_t *drive, u8 xferspeed) 630static int hpt37x_tune_chipset(ide_drive_t *drive, const u8 speed)
618{ 631{
619 ide_hwif_t *hwif = HWIF(drive); 632 ide_hwif_t *hwif = HWIF(drive);
620 struct pci_dev *dev = hwif->pci_dev; 633 struct pci_dev *dev = hwif->pci_dev;
621 struct hpt_info *info = pci_get_drvdata(dev); 634 struct hpt_info *info = pci_get_drvdata(dev);
622 u8 speed = ide_rate_filter(drive, xferspeed);
623 u8 itr_addr = 0x40 + (drive->dn * 4); 635 u8 itr_addr = 0x40 + (drive->dn * 4);
624 u32 old_itr = 0; 636 u32 old_itr = 0;
625 u32 itr_mask, new_itr; 637 u32 itr_mask, new_itr;
626 638
627 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
628 if (drive->media != ide_disk)
629 speed = min_t(u8, speed, XFER_PIO_4);
630
631 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 : 639 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 :
632 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff); 640 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff);
633 641
@@ -654,9 +662,8 @@ static int hpt3xx_tune_chipset(ide_drive_t *drive, u8 speed)
654 return hpt36x_tune_chipset(drive, speed); 662 return hpt36x_tune_chipset(drive, speed);
655} 663}
656 664
657static void hpt3xx_tune_drive(ide_drive_t *drive, u8 pio) 665static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
658{ 666{
659 pio = ide_get_best_pio_mode(drive, pio, 4);
660 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio); 667 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio);
661} 668}
662 669
@@ -718,7 +725,7 @@ static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
718 return 0; 725 return 0;
719 726
720 if (ide_use_fast_pio(drive)) 727 if (ide_use_fast_pio(drive))
721 hpt3xx_tune_drive(drive, 255); 728 ide_set_max_pio(drive);
722 729
723 return -1; 730 return -1;
724} 731}
@@ -1249,7 +1256,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1249 /* Cache the channel's MISC. control registers' offset */ 1256 /* Cache the channel's MISC. control registers' offset */
1250 hwif->select_data = hwif->channel ? 0x54 : 0x50; 1257 hwif->select_data = hwif->channel ? 0x54 : 0x50;
1251 1258
1252 hwif->tuneproc = &hpt3xx_tune_drive; 1259 hwif->set_pio_mode = &hpt3xx_set_pio_mode;
1253 hwif->speedproc = &hpt3xx_tune_chipset; 1260 hwif->speedproc = &hpt3xx_tune_chipset;
1254 hwif->quirkproc = &hpt3xx_quirkproc; 1261 hwif->quirkproc = &hpt3xx_quirkproc;
1255 hwif->intrproc = &hpt3xx_intrproc; 1262 hwif->intrproc = &hpt3xx_intrproc;
@@ -1257,6 +1264,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1257 hwif->busproc = &hpt3xx_busproc; 1264 hwif->busproc = &hpt3xx_busproc;
1258 1265
1259 hwif->udma_filter = &hpt3xx_udma_filter; 1266 hwif->udma_filter = &hpt3xx_udma_filter;
1267 hwif->mdma_filter = &hpt3xx_mdma_filter;
1260 1268
1261 /* 1269 /*
1262 * HPT3xxN chips have some complications: 1270 * HPT3xxN chips have some complications:
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 70b3245dbf62..76e91ff9420b 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -105,9 +105,8 @@ static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)
105 spin_unlock_irqrestore(&tune_lock, flags); 105 spin_unlock_irqrestore(&tune_lock, flags);
106} 106}
107 107
108static void it8213_tuneproc(ide_drive_t *drive, u8 pio) 108static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
109{ 109{
110 pio = ide_get_best_pio_mode(drive, pio, 4);
111 it8213_tune_pio(drive, pio); 110 it8213_tune_pio(drive, pio);
112 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 111 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
113} 112}
@@ -115,20 +114,16 @@ static void it8213_tuneproc(ide_drive_t *drive, u8 pio)
115/** 114/**
116 * it8213_tune_chipset - set controller timings 115 * it8213_tune_chipset - set controller timings
117 * @drive: Drive to set up 116 * @drive: Drive to set up
118 * @xferspeed: speed we want to achieve 117 * @speed: speed we want to achieve
119 * 118 *
120 * Tune the ITE chipset for the desired mode. If we can't achieve 119 * Tune the ITE chipset for the desired mode.
121 * the desired mode then tune for a lower one, but ultimately
122 * make the thing work.
123 */ 120 */
124 121
125static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) 122static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
126{ 123{
127
128 ide_hwif_t *hwif = HWIF(drive); 124 ide_hwif_t *hwif = HWIF(drive);
129 struct pci_dev *dev = hwif->pci_dev; 125 struct pci_dev *dev = hwif->pci_dev;
130 u8 maslave = 0x40; 126 u8 maslave = 0x40;
131 u8 speed = ide_rate_filter(drive, xferspeed);
132 int a_speed = 3 << (drive->dn * 4); 127 int a_speed = 3 << (drive->dn * 4);
133 int u_flag = 1 << drive->dn; 128 int u_flag = 1 << drive->dn;
134 int v_flag = 0x01 << drive->dn; 129 int v_flag = 0x01 << drive->dn;
@@ -156,12 +151,6 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
156 case XFER_MW_DMA_1: 151 case XFER_MW_DMA_1:
157 case XFER_SW_DMA_2: 152 case XFER_SW_DMA_2:
158 break; 153 break;
159 case XFER_PIO_4:
160 case XFER_PIO_3:
161 case XFER_PIO_2:
162 case XFER_PIO_1:
163 case XFER_PIO_0:
164 break;
165 default: 154 default:
166 return -1; 155 return -1;
167 } 156 }
@@ -193,10 +182,7 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
193 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 182 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
194 } 183 }
195 184
196 if (speed > XFER_PIO_4) 185 it8213_tune_pio(drive, it8213_dma_2_pio(speed));
197 it8213_tune_pio(drive, it8213_dma_2_pio(speed));
198 else
199 it8213_tune_pio(drive, speed - XFER_PIO_0);
200 186
201 return ide_config_drive_speed(drive, speed); 187 return ide_config_drive_speed(drive, speed);
202} 188}
@@ -216,7 +202,7 @@ static int it8213_config_drive_for_dma (ide_drive_t *drive)
216 if (ide_tune_dma(drive)) 202 if (ide_tune_dma(drive))
217 return 0; 203 return 0;
218 204
219 it8213_tuneproc(drive, 255); 205 ide_set_max_pio(drive);
220 206
221 return -1; 207 return -1;
222} 208}
@@ -235,7 +221,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
235 u8 reg42h = 0; 221 u8 reg42h = 0;
236 222
237 hwif->speedproc = &it8213_tune_chipset; 223 hwif->speedproc = &it8213_tune_chipset;
238 hwif->tuneproc = &it8213_tuneproc; 224 hwif->set_pio_mode = &it8213_set_pio_mode;
239 225
240 hwif->autodma = 0; 226 hwif->autodma = 0;
241 227
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 9286c99e2ff0..758a98230cc5 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -274,9 +274,8 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio)
274 return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio); 274 return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio);
275} 275}
276 276
277static void it821x_tuneproc(ide_drive_t *drive, u8 pio) 277static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
278{ 278{
279 pio = ide_get_best_pio_mode(drive, pio, 4);
280 (void)it821x_tunepio(drive, pio); 279 (void)it821x_tunepio(drive, pio);
281} 280}
282 281
@@ -405,32 +404,19 @@ static int it821x_dma_end(ide_drive_t *drive)
405 return ret; 404 return ret;
406} 405}
407 406
408
409/** 407/**
410 * it821x_tune_chipset - set controller timings 408 * it821x_tune_chipset - set controller timings
411 * @drive: Drive to set up 409 * @drive: Drive to set up
412 * @xferspeed: speed we want to achieve 410 * @speed: speed we want to achieve
413 * 411 *
414 * Tune the ITE chipset for the desired mode. If we can't achieve 412 * Tune the ITE chipset for the desired mode.
415 * the desired mode then tune for a lower one, but ultimately
416 * make the thing work.
417 */ 413 */
418 414
419static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed) 415static int it821x_tune_chipset(ide_drive_t *drive, const u8 speed)
420{ 416{
421 417
422 ide_hwif_t *hwif = drive->hwif; 418 ide_hwif_t *hwif = drive->hwif;
423 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 419 struct it821x_dev *itdev = ide_get_hwifdata(hwif);
424 u8 speed = ide_rate_filter(drive, xferspeed);
425
426 switch (speed) {
427 case XFER_PIO_4:
428 case XFER_PIO_3:
429 case XFER_PIO_2:
430 case XFER_PIO_1:
431 case XFER_PIO_0:
432 return it821x_tunepio(drive, speed - XFER_PIO_0);
433 }
434 420
435 if (itdev->smart == 0) { 421 if (itdev->smart == 0) {
436 switch (speed) { 422 switch (speed) {
@@ -477,7 +463,7 @@ static int it821x_config_drive_for_dma (ide_drive_t *drive)
477 if (ide_tune_dma(drive)) 463 if (ide_tune_dma(drive))
478 return 0; 464 return 0;
479 465
480 it821x_tuneproc(drive, 255); 466 ide_set_max_pio(drive);
481 467
482 return -1; 468 return -1;
483} 469}
@@ -644,7 +630,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
644 } 630 }
645 631
646 hwif->speedproc = &it821x_tune_chipset; 632 hwif->speedproc = &it821x_tune_chipset;
647 hwif->tuneproc = &it821x_tuneproc; 633 hwif->set_pio_mode = &it821x_set_pio_mode;
648 634
649 /* MWDMA/PIO clock switching for pass through mode */ 635 /* MWDMA/PIO clock switching for pass through mode */
650 if(!idev->smart) { 636 if(!idev->smart) {
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 65a0ff352b98..d379fbaf6743 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -83,26 +83,22 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
83 return ATA_CBL_PATA80; 83 return ATA_CBL_PATA80;
84} 84}
85 85
86static void jmicron_tuneproc(ide_drive_t *drive, u8 pio) 86static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio)
87{ 87{
88 pio = ide_get_best_pio_mode(drive, pio, 5);
89 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 88 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
90} 89}
91 90
92/** 91/**
93 * jmicron_tune_chipset - set controller timings 92 * jmicron_tune_chipset - set controller timings
94 * @drive: Drive to set up 93 * @drive: Drive to set up
95 * @xferspeed: speed we want to achieve 94 * @speed: speed we want to achieve
96 * 95 *
97 * As the JMicron snoops for timings all we actually need to do is 96 * As the JMicron snoops for timings all we actually need to do is
98 * make sure we don't set an invalid mode. We do need to honour 97 * set the transfer mode on the device.
99 * the cable detect here.
100 */ 98 */
101 99
102static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed) 100static int jmicron_tune_chipset(ide_drive_t *drive, const u8 speed)
103{ 101{
104 u8 speed = ide_rate_filter(drive, xferspeed);
105
106 return ide_config_drive_speed(drive, speed); 102 return ide_config_drive_speed(drive, speed);
107} 103}
108 104
@@ -119,7 +115,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
119 if (ide_tune_dma(drive)) 115 if (ide_tune_dma(drive))
120 return 0; 116 return 0;
121 117
122 jmicron_tuneproc(drive, 255); 118 ide_set_max_pio(drive);
123 119
124 return -1; 120 return -1;
125} 121}
@@ -134,7 +130,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
134static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) 130static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
135{ 131{
136 hwif->speedproc = &jmicron_tune_chipset; 132 hwif->speedproc = &jmicron_tune_chipset;
137 hwif->tuneproc = &jmicron_tuneproc; 133 hwif->set_pio_mode = &jmicron_set_pio_mode;
138 134
139 hwif->drives[0].autotune = 1; 135 hwif->drives[0].autotune = 1;
140 hwif->drives[1].autotune = 1; 136 hwif->drives[1].autotune = 1;
@@ -160,22 +156,13 @@ fallback:
160 return; 156 return;
161} 157}
162 158
163#define DECLARE_JMB_DEV(name_str) \ 159static ide_pci_device_t jmicron_chipset __devinitdata = {
164 { \ 160 .name = "JMB",
165 .name = name_str, \ 161 .init_hwif = init_hwif_jmicron,
166 .init_hwif = init_hwif_jmicron, \ 162 .autodma = AUTODMA,
167 .autodma = AUTODMA, \ 163 .bootable = ON_BOARD,
168 .bootable = ON_BOARD, \ 164 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
169 .enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \ 165 .pio_mask = ATA_PIO5,
170 .pio_mask = ATA_PIO5, \
171 }
172
173static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
174 /* 0 */ DECLARE_JMB_DEV("JMB361"),
175 /* 1 */ DECLARE_JMB_DEV("JMB363"),
176 /* 2 */ DECLARE_JMB_DEV("JMB365"),
177 /* 3 */ DECLARE_JMB_DEV("JMB366"),
178 /* 4 */ DECLARE_JMB_DEV("JMB368"),
179}; 166};
180 167
181/** 168/**
@@ -189,35 +176,29 @@ static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
189 176
190static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id) 177static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id)
191{ 178{
192 ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]); 179 ide_setup_pci_device(dev, &jmicron_chipset);
193 return 0; 180 return 0;
194} 181}
195 182
196/* If libata is configured, jmicron PCI quirk will configure it such 183/* All JMB PATA controllers have and will continue to have the same
197 * that the SATA ports are in AHCI function while the PATA ports are 184 * interface. Matching vendor and device class is enough for all
198 * in a separate IDE function. In such cases, match device class and 185 * current and future controllers if the controller is programmed
199 * attach only to IDE. If libata isn't configured, keep the old 186 * properly.
200 * behavior for backward compatibility. 187 *
188 * If libata is configured, jmicron PCI quirk programs the controller
189 * into the correct mode. If libata isn't configured, match known
190 * device IDs too to maintain backward compatibility.
201 */ 191 */
202#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE)
203#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8
204#define JMB_CLASS_MASK 0xffff00
205#else
206#define JMB_CLASS 0
207#define JMB_CLASS_MASK 0
208#endif
209
210static struct pci_device_id jmicron_pci_tbl[] = { 192static struct pci_device_id jmicron_pci_tbl[] = {
211 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, 193#if !defined(CONFIG_ATA) && !defined(CONFIG_ATA_MODULE)
212 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0}, 194 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361) },
213 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, 195 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363) },
214 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1}, 196 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365) },
215 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, 197 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366) },
216 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2}, 198 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368) },
217 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, 199#endif
218 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3}, 200 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
219 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, 201 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
220 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4},
221 { 0, }, 202 { 0, },
222}; 203};
223 204
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 3a2bb2723515..9fa06393469a 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -47,7 +47,7 @@
47 * The main problem with OPTi is that some timings for master 47 * The main problem with OPTi is that some timings for master
48 * and slave must be the same. For example, if you have master 48 * and slave must be the same. For example, if you have master
49 * PIO 3 and slave PIO 0, driver have to set some timings of 49 * PIO 3 and slave PIO 0, driver have to set some timings of
50 * master for PIO 0. Second problem is that opti621_tune_drive 50 * master for PIO 0. Second problem is that opti621_set_pio_mode
51 * got only one drive to set, but have to set both drives. 51 * got only one drive to set, but have to set both drives.
52 * This is solved in compute_pios. If you don't set 52 * This is solved in compute_pios. If you don't set
53 * the second drive, compute_pios use ide_get_best_pio_mode 53 * the second drive, compute_pios use ide_get_best_pio_mode
@@ -103,7 +103,7 @@
103 103
104#include <asm/io.h> 104#include <asm/io.h>
105 105
106#define OPTI621_MAX_PIO 3 106//#define OPTI621_MAX_PIO 3
107/* In fact, I do not have any PIO 4 drive 107/* In fact, I do not have any PIO 4 drive
108 * (address: 25 ns, data: 70 ns, recovery: 35 ns), 108 * (address: 25 ns, data: 70 ns, recovery: 35 ns),
109 * but OPTi 82C621 is programmable and it can do (minimal values): 109 * but OPTi 82C621 is programmable and it can do (minimal values):
@@ -136,8 +136,8 @@ static int reg_base;
136#define PIO_NOT_EXIST 254 136#define PIO_NOT_EXIST 254
137#define PIO_DONT_KNOW 255 137#define PIO_DONT_KNOW 255
138 138
139/* there are stored pio numbers from other calls of opti621_tune_drive */ 139/* there are stored pio numbers from other calls of opti621_set_pio_mode */
140static void compute_pios(ide_drive_t *drive, u8 pio) 140static void compute_pios(ide_drive_t *drive, const u8 pio)
141/* Store values into drive->drive_data 141/* Store values into drive->drive_data
142 * second_contr - 0 for primary controller, 1 for secondary 142 * second_contr - 0 for primary controller, 1 for secondary
143 * slave_drive - 0 -> pio is for master, 1 -> pio is for slave 143 * slave_drive - 0 -> pio is for master, 1 -> pio is for slave
@@ -147,12 +147,13 @@ static void compute_pios(ide_drive_t *drive, u8 pio)
147 int d; 147 int d;
148 ide_hwif_t *hwif = HWIF(drive); 148 ide_hwif_t *hwif = HWIF(drive);
149 149
150 drive->drive_data = ide_get_best_pio_mode(drive, pio, OPTI621_MAX_PIO); 150 drive->drive_data = pio;
151
151 for (d = 0; d < 2; ++d) { 152 for (d = 0; d < 2; ++d) {
152 drive = &hwif->drives[d]; 153 drive = &hwif->drives[d];
153 if (drive->present) { 154 if (drive->present) {
154 if (drive->drive_data == PIO_DONT_KNOW) 155 if (drive->drive_data == PIO_DONT_KNOW)
155 drive->drive_data = ide_get_best_pio_mode(drive, 255, OPTI621_MAX_PIO); 156 drive->drive_data = ide_get_best_pio_mode(drive, 255, 3);
156#ifdef OPTI621_DEBUG 157#ifdef OPTI621_DEBUG
157 printk("%s: Selected PIO mode %d\n", 158 printk("%s: Selected PIO mode %d\n",
158 drive->name, drive->drive_data); 159 drive->name, drive->drive_data);
@@ -240,8 +241,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks)
240 241
241} 242}
242 243
243/* Main tune procedure, called from tuneproc. */ 244static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
244static void opti621_tune_drive (ide_drive_t *drive, u8 pio)
245{ 245{
246 /* primary and secondary drives share some registers, 246 /* primary and secondary drives share some registers,
247 * so we have to program both drives 247 * so we have to program both drives
@@ -331,7 +331,8 @@ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif)
331 hwif->autodma = 0; 331 hwif->autodma = 0;
332 hwif->drives[0].drive_data = PIO_DONT_KNOW; 332 hwif->drives[0].drive_data = PIO_DONT_KNOW;
333 hwif->drives[1].drive_data = PIO_DONT_KNOW; 333 hwif->drives[1].drive_data = PIO_DONT_KNOW;
334 hwif->tuneproc = &opti621_tune_drive; 334
335 hwif->set_pio_mode = &opti621_set_pio_mode;
335 336
336 if (!(hwif->dma_base)) 337 if (!(hwif->dma_base))
337 return; 338 return;
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 7b0e479c355c..5fb1eedc8194 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -146,14 +146,12 @@ static struct udma_timing {
146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */ 146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */
147}; 147};
148 148
149static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed) 149static int pdcnew_tune_chipset(ide_drive_t *drive, const u8 speed)
150{ 150{
151 ide_hwif_t *hwif = HWIF(drive); 151 ide_hwif_t *hwif = HWIF(drive);
152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
153 int err; 153 int err;
154 154
155 speed = ide_rate_filter(drive, speed);
156
157 /* 155 /*
158 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will 156 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will
159 * automatically set the timing registers based on 100 MHz PLL output. 157 * automatically set the timing registers based on 100 MHz PLL output.
@@ -217,9 +215,8 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed)
217 return err; 215 return err;
218} 216}
219 217
220static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio) 218static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
221{ 219{
222 pio = ide_get_best_pio_mode(drive, pio, 4);
223 (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio); 220 (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio);
224} 221}
225 222
@@ -239,7 +236,7 @@ static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive)
239 return 0; 236 return 0;
240 237
241 if (ide_use_fast_pio(drive)) 238 if (ide_use_fast_pio(drive))
242 pdcnew_tune_drive(drive, 255); 239 ide_set_max_pio(drive);
243 240
244 return -1; 241 return -1;
245} 242}
@@ -492,7 +489,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
492{ 489{
493 hwif->autodma = 0; 490 hwif->autodma = 0;
494 491
495 hwif->tuneproc = &pdcnew_tune_drive; 492 hwif->set_pio_mode = &pdcnew_set_pio_mode;
493
496 hwif->quirkproc = &pdcnew_quirkproc; 494 hwif->quirkproc = &pdcnew_quirkproc;
497 hwif->speedproc = &pdcnew_tune_chipset; 495 hwif->speedproc = &pdcnew_tune_chipset;
498 hwif->resetproc = &pdcnew_reset; 496 hwif->resetproc = &pdcnew_reset;
@@ -524,44 +522,52 @@ static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
524 return ide_setup_pci_device(dev, d); 522 return ide_setup_pci_device(dev, d);
525} 523}
526 524
527static int __devinit init_setup_pdc20270(struct pci_dev *dev, 525static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *d)
528 ide_pci_device_t *d)
529{ 526{
530 struct pci_dev *findev = NULL; 527 struct pci_dev *bridge = dev->bus->self;
531 int ret; 528
529 if (bridge != NULL &&
530 bridge->vendor == PCI_VENDOR_ID_DEC &&
531 bridge->device == PCI_DEVICE_ID_DEC_21150) {
532 struct pci_dev *dev2;
532 533
533 if ((dev->bus->self &&
534 dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
535 (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
536 if (PCI_SLOT(dev->devfn) & 2) 534 if (PCI_SLOT(dev->devfn) & 2)
537 return -ENODEV; 535 return -ENODEV;
538 536
539 while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) { 537 dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2,
540 if ((findev->vendor == dev->vendor) && 538 PCI_FUNC(dev->devfn)));
541 (findev->device == dev->device) && 539 if (dev2 != NULL &&
542 (PCI_SLOT(findev->devfn) & 2)) { 540 dev2->vendor == dev->vendor &&
543 if (findev->irq != dev->irq) { 541 dev2->device == dev->device) {
544 findev->irq = dev->irq; 542 int ret;
545 } 543
546 ret = ide_setup_pci_devices(dev, findev, d); 544 if (dev2->irq != dev->irq) {
547 if (ret < 0) 545 dev2->irq = dev->irq;
548 pci_dev_put(findev); 546
549 return ret; 547 printk(KERN_WARNING "%s: PCI config space "
548 "interrupt fixed.\n", d->name);
550 } 549 }
550
551 ret = ide_setup_pci_devices(dev, dev2, d);
552 if (ret < 0)
553 pci_dev_put(dev2);
554 return ret;
551 } 555 }
552 } 556 }
553 return ide_setup_pci_device(dev, d); 557 return ide_setup_pci_device(dev, d);
554} 558}
555 559
556static int __devinit init_setup_pdc20276(struct pci_dev *dev, 560static int __devinit init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d)
557 ide_pci_device_t *d)
558{ 561{
559 if ((dev->bus->self) && 562 struct pci_dev *bridge = dev->bus->self;
560 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && 563
561 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || 564 if (bridge != NULL &&
562 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { 565 bridge->vendor == PCI_VENDOR_ID_INTEL &&
563 printk(KERN_INFO "ide: Skipping Promise PDC20276 " 566 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
564 "attached to I2O RAID controller.\n"); 567 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
568
569 printk(KERN_INFO "%s: attached to I2O RAID controller, "
570 "skipping.\n", d->name);
565 return -ENODEV; 571 return -ENODEV;
566 } 572 }
567 return ide_setup_pci_device(dev, d); 573 return ide_setup_pci_device(dev, d);
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index e19a891171cb..b578307fad51 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -63,12 +63,11 @@ static const char *pdc_quirk_drives[] = {
63 63
64static void pdc_old_disable_66MHz_clock(ide_hwif_t *); 64static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
65 65
66static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) 66static int pdc202xx_tune_chipset(ide_drive_t *drive, const u8 speed)
67{ 67{
68 ide_hwif_t *hwif = HWIF(drive); 68 ide_hwif_t *hwif = HWIF(drive);
69 struct pci_dev *dev = hwif->pci_dev; 69 struct pci_dev *dev = hwif->pci_dev;
70 u8 drive_pci = 0x60 + (drive->dn << 2); 70 u8 drive_pci = 0x60 + (drive->dn << 2);
71 u8 speed = ide_rate_filter(drive, xferspeed);
72 71
73 u8 AP = 0, BP = 0, CP = 0; 72 u8 AP = 0, BP = 0, CP = 0;
74 u8 TA = 0, TB = 0, TC = 0; 73 u8 TA = 0, TB = 0, TC = 0;
@@ -143,9 +142,8 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed)
143 return ide_config_drive_speed(drive, speed); 142 return ide_config_drive_speed(drive, speed);
144} 143}
145 144
146static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio) 145static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
147{ 146{
148 pio = ide_get_best_pio_mode(drive, pio, 4);
149 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio); 147 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio);
150} 148}
151 149
@@ -191,7 +189,7 @@ static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
191 return 0; 189 return 0;
192 190
193 if (ide_use_fast_pio(drive)) 191 if (ide_use_fast_pio(drive))
194 pdc202xx_tune_drive(drive, 255); 192 ide_set_max_pio(drive);
195 193
196 return -1; 194 return -1;
197} 195}
@@ -307,10 +305,11 @@ static void pdc202xx_reset (ide_drive_t *drive)
307{ 305{
308 ide_hwif_t *hwif = HWIF(drive); 306 ide_hwif_t *hwif = HWIF(drive);
309 ide_hwif_t *mate = hwif->mate; 307 ide_hwif_t *mate = hwif->mate;
310 308
311 pdc202xx_reset_host(hwif); 309 pdc202xx_reset_host(hwif);
312 pdc202xx_reset_host(mate); 310 pdc202xx_reset_host(mate);
313 pdc202xx_tune_drive(drive, 255); 311
312 ide_set_max_pio(drive);
314} 313}
315 314
316static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, 315static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
@@ -329,7 +328,9 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
329 hwif->rqsize = 256; 328 hwif->rqsize = 256;
330 329
331 hwif->autodma = 0; 330 hwif->autodma = 0;
332 hwif->tuneproc = &pdc202xx_tune_drive; 331
332 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
333
333 hwif->quirkproc = &pdc202xx_quirkproc; 334 hwif->quirkproc = &pdc202xx_quirkproc;
334 335
335 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 336 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 5cfa9378bbb8..fd8214a7ab98 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007 2 * linux/drivers/ide/pci/piix.c Version 0.52 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
@@ -17,11 +17,11 @@
17 * 41 17 * 41
18 * 43 18 * 43
19 * 19 *
20 * | PIO 0 | c0 | 80 | 0 | piix_tune_drive(drive, 0); 20 * | PIO 0 | c0 | 80 | 0 |
21 * | PIO 2 | SW2 | d0 | 90 | 4 | piix_tune_drive(drive, 2); 21 * | PIO 2 | SW2 | d0 | 90 | 4 |
22 * | PIO 3 | MW1 | e1 | a1 | 9 | piix_tune_drive(drive, 3); 22 * | PIO 3 | MW1 | e1 | a1 | 9 |
23 * | PIO 4 | MW2 | e3 | a3 | b | piix_tune_drive(drive, 4); 23 * | PIO 4 | MW2 | e3 | a3 | b |
24 * 24 *
25 * sitre = word40 & 0x4000; primary 25 * sitre = word40 & 0x4000; primary
26 * sitre = word42 & 0x4000; secondary 26 * sitre = word42 & 0x4000; secondary
27 * 27 *
@@ -204,16 +204,16 @@ static void piix_tune_pio (ide_drive_t *drive, u8 pio)
204} 204}
205 205
206/** 206/**
207 * piix_tune_drive - tune a drive attached to PIIX 207 * piix_set_pio_mode - set PIO mode
208 * @drive: drive to tune 208 * @drive: drive to tune
209 * @pio: desired PIO mode 209 * @pio: desired PIO mode
210 * 210 *
211 * Set the drive's PIO mode (might be useful if drive is not registered 211 * Set the drive's PIO mode (might be useful if drive is not registered
212 * in CMOS for any reason). 212 * in CMOS for any reason).
213 */ 213 */
214static void piix_tune_drive (ide_drive_t *drive, u8 pio) 214
215static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
215{ 216{
216 pio = ide_get_best_pio_mode(drive, pio, 4);
217 piix_tune_pio(drive, pio); 217 piix_tune_pio(drive, pio);
218 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 218 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
219} 219}
@@ -221,19 +221,18 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
221/** 221/**
222 * piix_tune_chipset - tune a PIIX interface 222 * piix_tune_chipset - tune a PIIX interface
223 * @drive: IDE drive to tune 223 * @drive: IDE drive to tune
224 * @xferspeed: speed to configure 224 * @speed: speed to configure
225 * 225 *
226 * Set a PIIX interface channel to the desired speeds. This involves 226 * Set a PIIX interface channel to the desired speeds. This involves
227 * requires the right timing data into the PIIX configuration space 227 * requires the right timing data into the PIIX configuration space
228 * then setting the drive parameters appropriately 228 * then setting the drive parameters appropriately
229 */ 229 */
230 230
231static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) 231static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
232{ 232{
233 ide_hwif_t *hwif = HWIF(drive); 233 ide_hwif_t *hwif = HWIF(drive);
234 struct pci_dev *dev = hwif->pci_dev; 234 struct pci_dev *dev = hwif->pci_dev;
235 u8 maslave = hwif->channel ? 0x42 : 0x40; 235 u8 maslave = hwif->channel ? 0x42 : 0x40;
236 u8 speed = ide_rate_filter(drive, xferspeed);
237 int a_speed = 3 << (drive->dn * 4); 236 int a_speed = 3 << (drive->dn * 4);
238 int u_flag = 1 << drive->dn; 237 int u_flag = 1 << drive->dn;
239 int v_flag = 0x01 << drive->dn; 238 int v_flag = 0x01 << drive->dn;
@@ -260,11 +259,6 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
260 case XFER_MW_DMA_2: 259 case XFER_MW_DMA_2:
261 case XFER_MW_DMA_1: 260 case XFER_MW_DMA_1:
262 case XFER_SW_DMA_2: break; 261 case XFER_SW_DMA_2: break;
263 case XFER_PIO_4:
264 case XFER_PIO_3:
265 case XFER_PIO_2:
266 case XFER_PIO_1:
267 case XFER_PIO_0: break;
268 default: return -1; 262 default: return -1;
269 } 263 }
270 264
@@ -294,10 +288,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
294 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 288 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
295 } 289 }
296 290
297 if (speed > XFER_PIO_4) 291 piix_tune_pio(drive, piix_dma_2_pio(speed));
298 piix_tune_pio(drive, piix_dma_2_pio(speed));
299 else
300 piix_tune_pio(drive, speed - XFER_PIO_0);
301 292
302 return ide_config_drive_speed(drive, speed); 293 return ide_config_drive_speed(drive, speed);
303} 294}
@@ -318,7 +309,7 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive)
318 return 0; 309 return 0;
319 310
320 if (ide_use_fast_pio(drive)) 311 if (ide_use_fast_pio(drive))
321 piix_tune_drive(drive, 255); 312 ide_set_max_pio(drive);
322 313
323 return -1; 314 return -1;
324} 315}
@@ -455,7 +446,8 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
455 } 446 }
456 447
457 hwif->autodma = 0; 448 hwif->autodma = 0;
458 hwif->tuneproc = &piix_tune_drive; 449
450 hwif->set_pio_mode = &piix_set_pio_mode;
459 hwif->speedproc = &piix_tune_chipset; 451 hwif->speedproc = &piix_tune_chipset;
460 hwif->drives[0].autotune = 1; 452 hwif->drives[0].autotune = 1;
461 hwif->drives[1].autotune = 1; 453 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 9bdc9694d50d..79ecab689489 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -138,7 +138,7 @@ out:
138 return mask; 138 return mask;
139} 139}
140 140
141static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode) 141static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
142{ 142{
143 ide_hwif_t *hwif = HWIF(drive); 143 ide_hwif_t *hwif = HWIF(drive);
144 int unit = drive->select.b.unit; 144 int unit = drive->select.b.unit;
@@ -146,25 +146,11 @@ static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode)
146 unsigned short pci_clock; 146 unsigned short pci_clock;
147 unsigned int basereg = hwif->channel ? 0x50 : 0x40; 147 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
148 148
149 mode = ide_rate_filter(drive, mode);
150
151 /* 149 /*
152 * Tell the drive to switch to the new mode; abort on failure. 150 * Tell the drive to switch to the new mode; abort on failure.
153 */ 151 */
154 if (sc1200_set_xfer_mode(drive, mode)) { 152 if (sc1200_set_xfer_mode(drive, mode))
155 printk("SC1200: set xfer mode failure\n");
156 return 1; /* failure */ 153 return 1; /* failure */
157 }
158
159 switch (mode) {
160 case XFER_PIO_4:
161 case XFER_PIO_3:
162 case XFER_PIO_2:
163 case XFER_PIO_1:
164 case XFER_PIO_0:
165 sc1200_tunepio(drive, mode - XFER_PIO_0);
166 return 0;
167 }
168 154
169 pci_clock = sc1200_get_pci_clock(); 155 pci_clock = sc1200_get_pci_clock();
170 156
@@ -274,19 +260,20 @@ static int sc1200_ide_dma_end (ide_drive_t *drive)
274} 260}
275 261
276/* 262/*
277 * sc1200_tuneproc() handles selection/setting of PIO modes 263 * sc1200_set_pio_mode() handles setting of PIO modes
278 * for both the chipset and drive. 264 * for both the chipset and drive.
279 * 265 *
280 * All existing BIOSs for this chipset guarantee that all drives 266 * All existing BIOSs for this chipset guarantee that all drives
281 * will have valid default PIO timings set up before we get here. 267 * will have valid default PIO timings set up before we get here.
282 */ 268 */
283static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */ 269
270static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
284{ 271{
285 ide_hwif_t *hwif = HWIF(drive); 272 ide_hwif_t *hwif = HWIF(drive);
286 int mode = -1; 273 int mode = -1;
287 274
288 /* 275 /*
289 * bad abuse of ->tuneproc interface 276 * bad abuse of ->set_pio_mode interface
290 */ 277 */
291 switch (pio) { 278 switch (pio) {
292 case 200: mode = XFER_UDMA_0; break; 279 case 200: mode = XFER_UDMA_0; break;
@@ -304,9 +291,6 @@ static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "au
304 return; 291 return;
305 } 292 }
306 293
307 pio = ide_get_best_pio_mode(drive, pio, 4);
308 printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio);
309
310 if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 294 if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0)
311 sc1200_tunepio(drive, pio); 295 sc1200_tunepio(drive, pio);
312} 296}
@@ -422,7 +406,8 @@ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
422 hwif->ide_dma_end = &sc1200_ide_dma_end; 406 hwif->ide_dma_end = &sc1200_ide_dma_end;
423 if (!noautodma) 407 if (!noautodma)
424 hwif->autodma = 1; 408 hwif->autodma = 1;
425 hwif->tuneproc = &sc1200_tuneproc; 409
410 hwif->set_pio_mode = &sc1200_set_pio_mode;
426 hwif->speedproc = &sc1200_tune_chipset; 411 hwif->speedproc = &sc1200_tune_chipset;
427 } 412 }
428 hwif->atapi_dma = 1; 413 hwif->atapi_dma = 1;
@@ -438,6 +423,7 @@ static ide_pci_device_t sc1200_chipset __devinitdata = {
438 .init_hwif = init_hwif_sc1200, 423 .init_hwif = init_hwif_sc1200,
439 .autodma = AUTODMA, 424 .autodma = AUTODMA,
440 .bootable = ON_BOARD, 425 .bootable = ON_BOARD,
426 .host_flags = IDE_HFLAG_ABUSE_DMA_MODES,
441 .pio_mask = ATA_PIO4, 427 .pio_mask = ATA_PIO4,
442}; 428};
443 429
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index eeb0a6d434aa..66a526e0ece4 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -221,9 +221,8 @@ static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
221 out_be32((void __iomem *)pioct_port, reg); 221 out_be32((void __iomem *)pioct_port, reg);
222} 222}
223 223
224static void scc_tuneproc(ide_drive_t *drive, u8 pio) 224static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
225{ 225{
226 pio = ide_get_best_pio_mode(drive, pio, 4);
227 scc_tune_pio(drive, pio); 226 scc_tune_pio(drive, pio);
228 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 227 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
229} 228}
@@ -231,16 +230,15 @@ static void scc_tuneproc(ide_drive_t *drive, u8 pio)
231/** 230/**
232 * scc_tune_chipset - tune a drive DMA mode 231 * scc_tune_chipset - tune a drive DMA mode
233 * @drive: Drive to set up 232 * @drive: Drive to set up
234 * @xferspeed: speed we want to achieve 233 * @speed: speed we want to achieve
235 * 234 *
236 * Load the timing settings for this device mode into the 235 * Load the timing settings for this device mode into the
237 * controller. 236 * controller.
238 */ 237 */
239 238
240static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) 239static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
241{ 240{
242 ide_hwif_t *hwif = HWIF(drive); 241 ide_hwif_t *hwif = HWIF(drive);
243 u8 speed = ide_rate_filter(drive, xferspeed);
244 struct scc_ports *ports = ide_get_hwifdata(hwif); 242 struct scc_ports *ports = ide_get_hwifdata(hwif);
245 unsigned long ctl_base = ports->ctl; 243 unsigned long ctl_base = ports->ctl;
246 unsigned long cckctrl_port = ctl_base + 0xff0; 244 unsigned long cckctrl_port = ctl_base + 0xff0;
@@ -272,13 +270,6 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
272 case XFER_UDMA_0: 270 case XFER_UDMA_0:
273 idx = speed - XFER_UDMA_0; 271 idx = speed - XFER_UDMA_0;
274 break; 272 break;
275 case XFER_PIO_4:
276 case XFER_PIO_3:
277 case XFER_PIO_2:
278 case XFER_PIO_1:
279 case XFER_PIO_0:
280 scc_tune_pio(drive, speed - XFER_PIO_0);
281 return ide_config_drive_speed(drive, speed);
282 default: 273 default:
283 return 1; 274 return 1;
284 } 275 }
@@ -317,7 +308,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
317 return 0; 308 return 0;
318 309
319 if (ide_use_fast_pio(drive)) 310 if (ide_use_fast_pio(drive))
320 scc_tuneproc(drive, 255); 311 ide_set_max_pio(drive);
321 312
322 return -1; 313 return -1;
323} 314}
@@ -718,7 +709,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
718 hwif->dma_setup = scc_dma_setup; 709 hwif->dma_setup = scc_dma_setup;
719 hwif->ide_dma_end = scc_ide_dma_end; 710 hwif->ide_dma_end = scc_ide_dma_end;
720 hwif->speedproc = scc_tune_chipset; 711 hwif->speedproc = scc_tune_chipset;
721 hwif->tuneproc = scc_tuneproc; 712 hwif->set_pio_mode = scc_set_pio_mode;
722 hwif->ide_dma_check = scc_config_drive_for_dma; 713 hwif->ide_dma_check = scc_config_drive_for_dma;
723 hwif->ide_dma_test_irq = scc_dma_test_irq; 714 hwif->ide_dma_test_irq = scc_dma_test_irq;
724 hwif->udma_filter = scc_udma_filter; 715 hwif->udma_filter = scc_udma_filter;
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 9fead2e7d4c8..0351cf210427 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -145,7 +145,7 @@ static void svwks_tune_pio(ide_drive_t *drive, const u8 pio)
145 } 145 }
146} 146}
147 147
148static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) 148static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)
149{ 149{
150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 }; 150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 }; 151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
@@ -153,16 +153,10 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
153 153
154 ide_hwif_t *hwif = HWIF(drive); 154 ide_hwif_t *hwif = HWIF(drive);
155 struct pci_dev *dev = hwif->pci_dev; 155 struct pci_dev *dev = hwif->pci_dev;
156 u8 speed = ide_rate_filter(drive, xferspeed);
157 u8 unit = (drive->select.b.unit & 0x01); 156 u8 unit = (drive->select.b.unit & 0x01);
158 157
159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; 158 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
160 159
161 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
162 svwks_tune_pio(drive, speed - XFER_PIO_0);
163 return ide_config_drive_speed(drive, speed);
164 }
165
166 /* If we are about to put a disk into UDMA mode we screwed up. 160 /* If we are about to put a disk into UDMA mode we screwed up.
167 Our code assumes we never _ever_ do this on an OSB4 */ 161 Our code assumes we never _ever_ do this on an OSB4 */
168 162
@@ -203,9 +197,8 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
203 return (ide_config_drive_speed(drive, speed)); 197 return (ide_config_drive_speed(drive, speed));
204} 198}
205 199
206static void svwks_tune_drive (ide_drive_t *drive, u8 pio) 200static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
207{ 201{
208 pio = ide_get_best_pio_mode(drive, pio, 4);
209 svwks_tune_pio(drive, pio); 202 svwks_tune_pio(drive, pio);
210 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 203 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
211} 204}
@@ -218,7 +211,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
218 return 0; 211 return 0;
219 212
220 if (ide_use_fast_pio(drive)) 213 if (ide_use_fast_pio(drive))
221 svwks_tune_drive(drive, 255); 214 ide_set_max_pio(drive);
222 215
223 return -1; 216 return -1;
224} 217}
@@ -390,7 +383,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
390 if (!hwif->irq) 383 if (!hwif->irq)
391 hwif->irq = hwif->channel ? 15 : 14; 384 hwif->irq = hwif->channel ? 15 : 14;
392 385
393 hwif->tuneproc = &svwks_tune_drive; 386 hwif->set_pio_mode = &svwks_set_pio_mode;
394 hwif->speedproc = &svwks_tune_chipset; 387 hwif->speedproc = &svwks_tune_chipset;
395 hwif->udma_filter = &svwks_udma_filter; 388 hwif->udma_filter = &svwks_udma_filter;
396 389
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 57145767c3df..c292e1de1d56 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -34,6 +34,8 @@
34 34
35#include <linux/ide.h> 35#include <linux/ide.h>
36 36
37#define DRV_NAME "SGIIOC4"
38
37/* IOC4 Specific Definitions */ 39/* IOC4 Specific Definitions */
38#define IOC4_CMD_OFFSET 0x100 40#define IOC4_CMD_OFFSET 0x100
39#define IOC4_CTRL_OFFSET 0x120 41#define IOC4_CTRL_OFFSET 0x120
@@ -289,15 +291,26 @@ static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
289 drive->hwif->dma_host_off(drive); 291 drive->hwif->dma_host_off(drive);
290} 292}
291 293
294static int sgiioc4_speedproc(ide_drive_t *drive, const u8 speed)
295{
296 if (speed != XFER_MW_DMA_2)
297 return 1;
298
299 return ide_config_drive_speed(drive, speed);
300}
301
292static int sgiioc4_ide_dma_check(ide_drive_t *drive) 302static int sgiioc4_ide_dma_check(ide_drive_t *drive)
293{ 303{
294 /* FIXME: check for available DMA modes */ 304 if (ide_tune_dma(drive))
295 if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0) {
296 printk(KERN_WARNING "%s: couldn't set MWDMA2 mode, "
297 "using PIO instead\n", drive->name);
298 return -1;
299 } else
300 return 0; 305 return 0;
306
307 /*
308 * ->set_pio_mode is not implemented currently
309 * so this is just for the completness
310 */
311 ide_set_max_pio(drive);
312
313 return -1;
301} 314}
302 315
303/* returns 1 if dma irq issued, 0 otherwise */ 316/* returns 1 if dma irq issued, 0 otherwise */
@@ -353,7 +366,7 @@ sgiioc4_INB(unsigned long port)
353} 366}
354 367
355/* Creates a dma map for the scatter-gather list entries */ 368/* Creates a dma map for the scatter-gather list entries */
356static void __devinit 369static int __devinit
357ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) 370ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
358{ 371{
359 void __iomem *virt_dma_base; 372 void __iomem *virt_dma_base;
@@ -369,7 +382,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
369 "ALREADY in use\n", 382 "ALREADY in use\n",
370 __FUNCTION__, hwif->name, (void *) dma_base, 383 __FUNCTION__, hwif->name, (void *) dma_base,
371 (void *) dma_base + num_ports - 1); 384 (void *) dma_base + num_ports - 1);
372 goto dma_alloc_failure; 385 return -1;
373 } 386 }
374 387
375 virt_dma_base = ioremap(dma_base, num_ports); 388 virt_dma_base = ioremap(dma_base, num_ports);
@@ -395,7 +408,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
395 408
396 if (pad) { 409 if (pad) {
397 ide_set_hwifdata(hwif, pad); 410 ide_set_hwifdata(hwif, pad);
398 return; 411 return 0;
399 } 412 }
400 413
401 pci_free_consistent(hwif->pci_dev, 414 pci_free_consistent(hwif->pci_dev,
@@ -413,10 +426,7 @@ dma_pci_alloc_failure:
413dma_remap_failure: 426dma_remap_failure:
414 release_mem_region(dma_base, num_ports); 427 release_mem_region(dma_base, num_ports);
415 428
416dma_alloc_failure: 429 return -1;
417 /* Disable DMA because we couldnot allocate any DMA maps */
418 hwif->autodma = 0;
419 hwif->atapi_dma = 0;
420} 430}
421 431
422/* Initializes the IOC4 DMA Engine */ 432/* Initializes the IOC4 DMA Engine */
@@ -581,14 +591,11 @@ static void __devinit
581ide_init_sgiioc4(ide_hwif_t * hwif) 591ide_init_sgiioc4(ide_hwif_t * hwif)
582{ 592{
583 hwif->mmio = 1; 593 hwif->mmio = 1;
584 hwif->autodma = 1;
585 hwif->atapi_dma = 1; 594 hwif->atapi_dma = 1;
586 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */ 595 hwif->mwdma_mask = 0x04;
587 hwif->mwdma_mask = 0x2; /* Multimode-2 DMA */
588 hwif->swdma_mask = 0x2;
589 hwif->pio_mask = 0x00; 596 hwif->pio_mask = 0x00;
590 hwif->tuneproc = NULL; /* Sets timing for PIO mode */ 597 hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */
591 hwif->speedproc = NULL; /* Sets timing for DMA &/or PIO modes */ 598 hwif->speedproc = &sgiioc4_speedproc;
592 hwif->selectproc = NULL;/* Use the default routine to select drive */ 599 hwif->selectproc = NULL;/* Use the default routine to select drive */
593 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */ 600 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */
594 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */ 601 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */
@@ -615,7 +622,7 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
615} 622}
616 623
617static int __devinit 624static int __devinit
618sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) 625sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
619{ 626{
620 unsigned long cmd_base, dma_base, irqport; 627 unsigned long cmd_base, dma_base, irqport;
621 unsigned long bar0, cmd_phys_base, ctl; 628 unsigned long bar0, cmd_phys_base, ctl;
@@ -632,7 +639,8 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
632 break; 639 break;
633 } 640 }
634 if (h == MAX_HWIFS) { 641 if (h == MAX_HWIFS) {
635 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", d->name); 642 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n",
643 DRV_NAME);
636 return -ENOMEM; 644 return -ENOMEM;
637 } 645 }
638 646
@@ -641,7 +649,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
641 virt_base = ioremap(bar0, pci_resource_len(dev, 0)); 649 virt_base = ioremap(bar0, pci_resource_len(dev, 0));
642 if (virt_base == NULL) { 650 if (virt_base == NULL) {
643 printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n", 651 printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n",
644 d->name, bar0); 652 DRV_NAME, bar0);
645 return -ENOMEM; 653 return -ENOMEM;
646 } 654 }
647 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET; 655 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET;
@@ -672,7 +680,6 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
672 hwif->chipset = ide_pci; 680 hwif->chipset = ide_pci;
673 hwif->pci_dev = dev; 681 hwif->pci_dev = dev;
674 hwif->channel = 0; /* Single Channel chip */ 682 hwif->channel = 0; /* Single Channel chip */
675 hwif->cds = (struct ide_pci_device_s *) d;
676 hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */ 683 hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */
677 684
678 /* The IOC4 uses MMIO rather than Port IO. */ 685 /* The IOC4 uses MMIO rather than Port IO. */
@@ -683,11 +690,14 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
683 690
684 ide_init_sgiioc4(hwif); 691 ide_init_sgiioc4(hwif);
685 692
686 if (dma_base) 693 hwif->autodma = 0;
687 ide_dma_sgiioc4(hwif, dma_base); 694
688 else 695 if (dma_base && ide_dma_sgiioc4(hwif, dma_base) == 0) {
696 hwif->autodma = 1;
697 hwif->drives[1].autodma = hwif->drives[0].autodma = 1;
698 } else
689 printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n", 699 printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n",
690 hwif->name, d->name); 700 hwif->name, DRV_NAME);
691 701
692 if (probe_hwif_init(hwif)) 702 if (probe_hwif_init(hwif))
693 return -EIO; 703 return -EIO;
@@ -699,7 +709,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
699} 709}
700 710
701static unsigned int __devinit 711static unsigned int __devinit
702pci_init_sgiioc4(struct pci_dev *dev, ide_pci_device_t * d) 712pci_init_sgiioc4(struct pci_dev *dev)
703{ 713{
704 unsigned int class_rev; 714 unsigned int class_rev;
705 int ret; 715 int ret;
@@ -707,30 +717,20 @@ pci_init_sgiioc4(struct pci_dev *dev, ide_pci_device_t * d)
707 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 717 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
708 class_rev &= 0xff; 718 class_rev &= 0xff;
709 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n", 719 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n",
710 d->name, pci_name(dev), class_rev); 720 DRV_NAME, pci_name(dev), class_rev);
711 if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) { 721 if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) {
712 printk(KERN_ERR "Skipping %s IDE controller in slot %s: " 722 printk(KERN_ERR "Skipping %s IDE controller in slot %s: "
713 "firmware is obsolete - please upgrade to revision" 723 "firmware is obsolete - please upgrade to "
714 "46 or higher\n", d->name, pci_name(dev)); 724 "revision46 or higher\n",
725 DRV_NAME, pci_name(dev));
715 ret = -EAGAIN; 726 ret = -EAGAIN;
716 goto out; 727 goto out;
717 } 728 }
718 ret = sgiioc4_ide_setup_pci_device(dev, d); 729 ret = sgiioc4_ide_setup_pci_device(dev);
719out: 730out:
720 return ret; 731 return ret;
721} 732}
722 733
723static ide_pci_device_t sgiioc4_chipset __devinitdata = {
724 /* Channel 0 */
725 .name = "SGIIOC4",
726 .init_hwif = ide_init_sgiioc4,
727 .init_dma = ide_dma_sgiioc4,
728 .autodma = AUTODMA,
729 /* SGI IOC4 doesn't have enablebits. */
730 .bootable = ON_BOARD,
731 .host_flags = IDE_HFLAG_SINGLE,
732};
733
734int 734int
735ioc4_ide_attach_one(struct ioc4_driver_data *idd) 735ioc4_ide_attach_one(struct ioc4_driver_data *idd)
736{ 736{
@@ -740,7 +740,7 @@ ioc4_ide_attach_one(struct ioc4_driver_data *idd)
740 if (idd->idd_variant == IOC4_VARIANT_PCI_RT) 740 if (idd->idd_variant == IOC4_VARIANT_PCI_RT)
741 return 0; 741 return 0;
742 742
743 return pci_init_sgiioc4(idd->idd_pdev, &sgiioc4_chipset); 743 return pci_init_sgiioc4(idd->idd_pdev);
744} 744}
745 745
746static struct ioc4_submodule ioc4_ide_submodule = { 746static struct ioc4_submodule ioc4_ide_submodule = {
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 50f6d172ef77..5d1e5e52a044 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/siimage.c Version 1.15 Jun 29 2007 2 * linux/drivers/ide/pci/siimage.c Version 1.16 Jul 13 2007
3 * 3 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
@@ -185,7 +185,12 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
185 u16 speedp = 0; 185 u16 speedp = 0;
186 unsigned long addr = siimage_seldev(drive, 0x04); 186 unsigned long addr = siimage_seldev(drive, 0x04);
187 unsigned long tfaddr = siimage_selreg(hwif, 0x02); 187 unsigned long tfaddr = siimage_selreg(hwif, 0x02);
188 unsigned long base = (unsigned long)hwif->hwif_data;
188 u8 tf_pio = pio; 189 u8 tf_pio = pio;
190 u8 addr_mask = hwif->channel ? (hwif->mmio ? 0xF4 : 0x84)
191 : (hwif->mmio ? 0xB4 : 0x80);
192 u8 mode = 0;
193 u8 unit = drive->select.b.unit;
189 194
190 /* trim *taskfile* PIO to the slowest of the master/slave */ 195 /* trim *taskfile* PIO to the slowest of the master/slave */
191 if (pair->present) { 196 if (pair->present) {
@@ -207,6 +212,11 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
207 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2); 212 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
208 else 213 else
209 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2); 214 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
215
216 mode = hwif->INB(base + addr_mask);
217 mode &= ~(unit ? 0x30 : 0x03);
218 mode |= (unit ? 0x10 : 0x01);
219 hwif->OUTB(mode, base + addr_mask);
210 } else { 220 } else {
211 pci_write_config_word(hwif->pci_dev, addr, speedp); 221 pci_write_config_word(hwif->pci_dev, addr, speedp);
212 pci_write_config_word(hwif->pci_dev, tfaddr, speedt); 222 pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
@@ -216,12 +226,16 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
216 if (pio > 2) 226 if (pio > 2)
217 speedp |= 0x200; 227 speedp |= 0x200;
218 pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp); 228 pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp);
229
230 pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
231 mode &= ~(unit ? 0x30 : 0x03);
232 mode |= (unit ? 0x10 : 0x01);
233 pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
219 } 234 }
220} 235}
221 236
222static void sil_tuneproc(ide_drive_t *drive, u8 pio) 237static void sil_set_pio_mode(ide_drive_t *drive, const u8 pio)
223{ 238{
224 pio = ide_get_best_pio_mode(drive, pio, 4);
225 sil_tune_pio(drive, pio); 239 sil_tune_pio(drive, pio);
226 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 240 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
227} 241}
@@ -229,14 +243,12 @@ static void sil_tuneproc(ide_drive_t *drive, u8 pio)
229/** 243/**
230 * siimage_tune_chipset - set controller timings 244 * siimage_tune_chipset - set controller timings
231 * @drive: Drive to set up 245 * @drive: Drive to set up
232 * @xferspeed: speed we want to achieve 246 * @speed: speed we want to achieve
233 * 247 *
234 * Tune the SII chipset for the desired mode. If we can't achieve 248 * Tune the SII chipset for the desired mode.
235 * the desired mode then tune for a lower one, but ultimately
236 * make the thing work.
237 */ 249 */
238 250
239static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) 251static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
240{ 252{
241 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; 253 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
242 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; 254 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
@@ -245,7 +257,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
245 ide_hwif_t *hwif = HWIF(drive); 257 ide_hwif_t *hwif = HWIF(drive);
246 u16 ultra = 0, multi = 0; 258 u16 ultra = 0, multi = 0;
247 u8 mode = 0, unit = drive->select.b.unit; 259 u8 mode = 0, unit = drive->select.b.unit;
248 u8 speed = ide_rate_filter(drive, xferspeed);
249 unsigned long base = (unsigned long)hwif->hwif_data; 260 unsigned long base = (unsigned long)hwif->hwif_data;
250 u8 scsc = 0, addr_mask = ((hwif->channel) ? 261 u8 scsc = 0, addr_mask = ((hwif->channel) ?
251 ((hwif->mmio) ? 0xF4 : 0x84) : 262 ((hwif->mmio) ? 0xF4 : 0x84) :
@@ -273,14 +284,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
273 scsc = is_sata(hwif) ? 1 : scsc; 284 scsc = is_sata(hwif) ? 1 : scsc;
274 285
275 switch(speed) { 286 switch(speed) {
276 case XFER_PIO_4:
277 case XFER_PIO_3:
278 case XFER_PIO_2:
279 case XFER_PIO_1:
280 case XFER_PIO_0:
281 sil_tune_pio(drive, speed - XFER_PIO_0);
282 mode |= ((unit) ? 0x10 : 0x01);
283 break;
284 case XFER_MW_DMA_2: 287 case XFER_MW_DMA_2:
285 case XFER_MW_DMA_1: 288 case XFER_MW_DMA_1:
286 case XFER_MW_DMA_0: 289 case XFER_MW_DMA_0:
@@ -331,7 +334,7 @@ static int siimage_config_drive_for_dma (ide_drive_t *drive)
331 return 0; 334 return 0;
332 335
333 if (ide_use_fast_pio(drive)) 336 if (ide_use_fast_pio(drive))
334 sil_tuneproc(drive, 255); 337 ide_set_max_pio(drive);
335 338
336 return -1; 339 return -1;
337} 340}
@@ -902,7 +905,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
902 905
903 hwif->resetproc = &siimage_reset; 906 hwif->resetproc = &siimage_reset;
904 hwif->speedproc = &siimage_tune_chipset; 907 hwif->speedproc = &siimage_tune_chipset;
905 hwif->tuneproc = &sil_tuneproc; 908 hwif->set_pio_mode = &sil_set_pio_mode;
906 hwif->reset_poll = &siimage_reset_poll; 909 hwif->reset_poll = &siimage_reset_poll;
907 hwif->pre_reset = &siimage_pre_reset; 910 hwif->pre_reset = &siimage_pre_reset;
908 hwif->udma_filter = &sil_udma_filter; 911 hwif->udma_filter = &sil_udma_filter;
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 26f24802d3e8..3e18899de631 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/sis5513.c Version 0.25 Jun 10, 2007 2 * linux/drivers/ide/pci/sis5513.c Version 0.27 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
@@ -519,27 +519,18 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio)
519 } 519 }
520} 520}
521 521
522static int sis5513_tune_drive(ide_drive_t *drive, u8 pio) 522static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
523{ 523{
524 pio = ide_get_best_pio_mode(drive, pio, 4);
525 config_art_rwp_pio(drive, pio); 524 config_art_rwp_pio(drive, pio);
526 return ide_config_drive_speed(drive, XFER_PIO_0 + pio); 525 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
527} 526}
528 527
529static void sis5513_tuneproc(ide_drive_t *drive, u8 pio) 528static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
530{
531 (void)sis5513_tune_drive(drive, pio);
532}
533
534static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
535{ 529{
536 ide_hwif_t *hwif = HWIF(drive); 530 ide_hwif_t *hwif = HWIF(drive);
537 struct pci_dev *dev = hwif->pci_dev; 531 struct pci_dev *dev = hwif->pci_dev;
538
539 u8 drive_pci, reg, speed;
540 u32 regdw; 532 u32 regdw;
541 533 u8 drive_pci, reg;
542 speed = ide_rate_filter(drive, xferspeed);
543 534
544 /* See config_art_rwp_pio for drive pci config registers */ 535 /* See config_art_rwp_pio for drive pci config registers */
545 drive_pci = 0x40; 536 drive_pci = 0x40;
@@ -582,9 +573,6 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
582 regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4; 573 regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4;
583 regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8; 574 regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8;
584 } else { 575 } else {
585 /* if ATA133 disable, we should not set speed above UDMA5 */
586 if (speed > XFER_UDMA_5)
587 speed = XFER_UDMA_5;
588 regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4; 576 regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4;
589 regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8; 577 regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8;
590 } 578 }
@@ -608,12 +596,6 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
608 case XFER_SW_DMA_1: 596 case XFER_SW_DMA_1:
609 case XFER_SW_DMA_0: 597 case XFER_SW_DMA_0:
610 break; 598 break;
611 case XFER_PIO_4:
612 case XFER_PIO_3:
613 case XFER_PIO_2:
614 case XFER_PIO_1:
615 case XFER_PIO_0:
616 return sis5513_tune_drive(drive, speed - XFER_PIO_0);
617 default: 599 default:
618 BUG(); 600 BUG();
619 break; 601 break;
@@ -627,7 +609,7 @@ static int sis5513_config_xfer_rate(ide_drive_t *drive)
627 /* 609 /*
628 * TODO: always set PIO mode and remove this 610 * TODO: always set PIO mode and remove this
629 */ 611 */
630 sis5513_tuneproc(drive, 255); 612 ide_set_max_pio(drive);
631 613
632 drive->init_speed = 0; 614 drive->init_speed = 0;
633 615
@@ -635,11 +617,25 @@ static int sis5513_config_xfer_rate(ide_drive_t *drive)
635 return 0; 617 return 0;
636 618
637 if (ide_use_fast_pio(drive)) 619 if (ide_use_fast_pio(drive))
638 sis5513_tuneproc(drive, 255); 620 ide_set_max_pio(drive);
639 621
640 return -1; 622 return -1;
641} 623}
642 624
625static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
626{
627 struct pci_dev *dev = drive->hwif->pci_dev;
628 int drive_pci;
629 u32 reg54 = 0, regdw = 0;
630
631 pci_read_config_dword(dev, 0x54, &reg54);
632 drive_pci = ((reg54 & 0x40000000) ? 0x70 : 0x40) + drive->dn * 4;
633 pci_read_config_dword(dev, drive_pci, &regdw);
634
635 /* if ATA133 disable, we should not set speed above UDMA5 */
636 return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5;
637}
638
643/* Chip detection and general config */ 639/* Chip detection and general config */
644static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name) 640static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name)
645{ 641{
@@ -844,9 +840,12 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
844 if (!hwif->irq) 840 if (!hwif->irq)
845 hwif->irq = hwif->channel ? 15 : 14; 841 hwif->irq = hwif->channel ? 15 : 14;
846 842
847 hwif->tuneproc = &sis5513_tuneproc; 843 hwif->set_pio_mode = &sis_set_pio_mode;
848 hwif->speedproc = &sis5513_tune_chipset; 844 hwif->speedproc = &sis5513_tune_chipset;
849 845
846 if (chipset_family >= ATA_133)
847 hwif->udma_filter = sis5513_ata133_udma_filter;
848
850 if (!(hwif->dma_base)) { 849 if (!(hwif->dma_base)) {
851 hwif->drives[0].autotune = 1; 850 hwif->drives[0].autotune = 1;
852 hwif->drives[1].autotune = 1; 851 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 0947cab00595..f492318ba797 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -75,16 +75,12 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
75/* 75/*
76 * Configure the chipset for PIO mode. 76 * Configure the chipset for PIO mode.
77 */ 77 */
78static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio) 78static void sl82c105_tune_pio(ide_drive_t *drive, const u8 pio)
79{ 79{
80 struct pci_dev *dev = HWIF(drive)->pci_dev; 80 struct pci_dev *dev = HWIF(drive)->pci_dev;
81 int reg = 0x44 + drive->dn * 4; 81 int reg = 0x44 + drive->dn * 4;
82 u16 drv_ctrl; 82 u16 drv_ctrl;
83 83
84 DBG(("sl82c105_tune_pio(drive:%s, pio:%u)\n", drive->name, pio));
85
86 pio = ide_get_best_pio_mode(drive, pio, 5);
87
88 drv_ctrl = get_pio_timings(drive, pio); 84 drv_ctrl = get_pio_timings(drive, pio);
89 85
90 /* 86 /*
@@ -106,14 +102,12 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
106 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name, 102 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
107 ide_xfer_verbose(pio + XFER_PIO_0), 103 ide_xfer_verbose(pio + XFER_PIO_0),
108 ide_pio_cycle_time(drive, pio), drv_ctrl); 104 ide_pio_cycle_time(drive, pio), drv_ctrl);
109
110 return pio;
111} 105}
112 106
113/* 107/*
114 * Configure the drive and chipset for a new transfer speed. 108 * Configure the drive and chipset for a new transfer speed.
115 */ 109 */
116static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed) 110static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed)
117{ 111{
118 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; 112 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
119 u16 drv_ctrl; 113 u16 drv_ctrl;
@@ -121,8 +115,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed)
121 DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", 115 DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
122 drive->name, ide_xfer_verbose(speed))); 116 drive->name, ide_xfer_verbose(speed)));
123 117
124 speed = ide_rate_filter(drive, speed);
125
126 switch (speed) { 118 switch (speed) {
127 case XFER_MW_DMA_2: 119 case XFER_MW_DMA_2:
128 case XFER_MW_DMA_1: 120 case XFER_MW_DMA_1:
@@ -147,14 +139,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed)
147 pci_write_config_word(dev, reg, drv_ctrl); 139 pci_write_config_word(dev, reg, drv_ctrl);
148 } 140 }
149 break; 141 break;
150 case XFER_PIO_5:
151 case XFER_PIO_4:
152 case XFER_PIO_3:
153 case XFER_PIO_2:
154 case XFER_PIO_1:
155 case XFER_PIO_0:
156 (void) sl82c105_tune_pio(drive, speed - XFER_PIO_0);
157 break;
158 default: 142 default:
159 return -1; 143 return -1;
160 } 144 }
@@ -327,11 +311,10 @@ static void sl82c105_resetproc(ide_drive_t *drive)
327 * We only deal with PIO mode here - DMA mode 'using_dma' is not 311 * We only deal with PIO mode here - DMA mode 'using_dma' is not
328 * initialised at the point that this function is called. 312 * initialised at the point that this function is called.
329 */ 313 */
330static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio) 314static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
331{ 315{
332 DBG(("sl82c105_tune_drive(drive:%s, pio:%u)\n", drive->name, pio)); 316 sl82c105_tune_pio(drive, pio);
333 317
334 pio = sl82c105_tune_pio(drive, pio);
335 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 318 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
336} 319}
337 320
@@ -399,7 +382,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
399 382
400 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); 383 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
401 384
402 hwif->tuneproc = &sl82c105_tune_drive; 385 hwif->set_pio_mode = &sl82c105_set_pio_mode;
403 hwif->speedproc = &sl82c105_tune_chipset; 386 hwif->speedproc = &sl82c105_tune_chipset;
404 hwif->selectproc = &sl82c105_selectproc; 387 hwif->selectproc = &sl82c105_selectproc;
405 hwif->resetproc = &sl82c105_resetproc; 388 hwif->resetproc = &sl82c105_resetproc;
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 628b0664f576..ae8e91324577 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007 2 * linux/drivers/ide/pci/slc90e66.c Version 0.16 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
@@ -95,19 +95,17 @@ static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)
95 spin_unlock_irqrestore(&ide_lock, flags); 95 spin_unlock_irqrestore(&ide_lock, flags);
96} 96}
97 97
98static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio) 98static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
99{ 99{
100 pio = ide_get_best_pio_mode(drive, pio, 4);
101 slc90e66_tune_pio(drive, pio); 100 slc90e66_tune_pio(drive, pio);
102 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 101 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
103} 102}
104 103
105static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) 104static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
106{ 105{
107 ide_hwif_t *hwif = HWIF(drive); 106 ide_hwif_t *hwif = HWIF(drive);
108 struct pci_dev *dev = hwif->pci_dev; 107 struct pci_dev *dev = hwif->pci_dev;
109 u8 maslave = hwif->channel ? 0x42 : 0x40; 108 u8 maslave = hwif->channel ? 0x42 : 0x40;
110 u8 speed = ide_rate_filter(drive, xferspeed);
111 int sitre = 0, a_speed = 7 << (drive->dn * 4); 109 int sitre = 0, a_speed = 7 << (drive->dn * 4);
112 int u_speed = 0, u_flag = 1 << drive->dn; 110 int u_speed = 0, u_flag = 1 << drive->dn;
113 u16 reg4042, reg44, reg48, reg4a; 111 u16 reg4042, reg44, reg48, reg4a;
@@ -127,11 +125,6 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
127 case XFER_MW_DMA_2: 125 case XFER_MW_DMA_2:
128 case XFER_MW_DMA_1: 126 case XFER_MW_DMA_1:
129 case XFER_SW_DMA_2: break; 127 case XFER_SW_DMA_2: break;
130 case XFER_PIO_4:
131 case XFER_PIO_3:
132 case XFER_PIO_2:
133 case XFER_PIO_1:
134 case XFER_PIO_0: break;
135 default: return -1; 128 default: return -1;
136 } 129 }
137 130
@@ -151,10 +144,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
151 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 144 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
152 } 145 }
153 146
154 if (speed > XFER_PIO_4) 147 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
155 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
156 else
157 slc90e66_tune_pio(drive, speed - XFER_PIO_0);
158 148
159 return ide_config_drive_speed(drive, speed); 149 return ide_config_drive_speed(drive, speed);
160} 150}
@@ -167,7 +157,7 @@ static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
167 return 0; 157 return 0;
168 158
169 if (ide_use_fast_pio(drive)) 159 if (ide_use_fast_pio(drive))
170 slc90e66_tune_drive(drive, 255); 160 ide_set_max_pio(drive);
171 161
172 return -1; 162 return -1;
173} 163}
@@ -183,7 +173,7 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
183 hwif->irq = hwif->channel ? 15 : 14; 173 hwif->irq = hwif->channel ? 15 : 14;
184 174
185 hwif->speedproc = &slc90e66_tune_chipset; 175 hwif->speedproc = &slc90e66_tune_chipset;
186 hwif->tuneproc = &slc90e66_tune_drive; 176 hwif->set_pio_mode = &slc90e66_set_pio_mode;
187 177
188 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47); 178 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47);
189 179
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index ec79bacc30c2..e23b9cfb6eb4 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -13,14 +13,12 @@
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/ide.h> 14#include <linux/ide.h>
15 15
16static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed) 16static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed)
17{ 17{
18 ide_hwif_t *hwif = HWIF(drive); 18 ide_hwif_t *hwif = HWIF(drive);
19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); 19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
20 u16 mode, scr = hwif->INW(scr_port); 20 u16 mode, scr = hwif->INW(scr_port);
21 21
22 speed = ide_rate_filter(drive, speed);
23
24 switch (speed) { 22 switch (speed) {
25 case XFER_UDMA_4: mode = 0x00c0; break; 23 case XFER_UDMA_4: mode = 0x00c0; break;
26 case XFER_UDMA_3: mode = 0x00b0; break; 24 case XFER_UDMA_3: mode = 0x00b0; break;
@@ -45,9 +43,8 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
45 return ide_config_drive_speed(drive, speed); 43 return ide_config_drive_speed(drive, speed);
46} 44}
47 45
48static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio) 46static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
49{ 47{
50 pio = ide_get_best_pio_mode(drive, pio, 4);
51 (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio); 48 (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
52} 49}
53 50
@@ -173,7 +170,7 @@ static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
173 return 0; 170 return 0;
174 171
175 if (ide_use_fast_pio(drive)) 172 if (ide_use_fast_pio(drive))
176 tc86c001_tune_drive(drive, 255); 173 ide_set_max_pio(drive);
177 174
178 return -1; 175 return -1;
179} 176}
@@ -195,7 +192,7 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
195 /* Store the system control register base for convenience... */ 192 /* Store the system control register base for convenience... */
196 hwif->config_data = sc_base; 193 hwif->config_data = sc_base;
197 194
198 hwif->tuneproc = &tc86c001_tune_drive; 195 hwif->set_pio_mode = &tc86c001_set_pio_mode;
199 hwif->speedproc = &tc86c001_tune_chipset; 196 hwif->speedproc = &tc86c001_tune_chipset;
200 hwif->busproc = &tc86c001_busproc; 197 hwif->busproc = &tc86c001_busproc;
201 198
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 098692a6d615..c3ff066eea5a 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -40,7 +40,7 @@
40#include <linux/ide.h> 40#include <linux/ide.h>
41#include <linux/init.h> 41#include <linux/init.h>
42 42
43static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed) 43static int triflex_tune_chipset(ide_drive_t *drive, const u8 speed)
44{ 44{
45 ide_hwif_t *hwif = HWIF(drive); 45 ide_hwif_t *hwif = HWIF(drive);
46 struct pci_dev *dev = hwif->pci_dev; 46 struct pci_dev *dev = hwif->pci_dev;
@@ -48,7 +48,6 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed)
48 u16 timing = 0; 48 u16 timing = 0;
49 u32 triflex_timings = 0; 49 u32 triflex_timings = 0;
50 u8 unit = (drive->select.b.unit & 0x01); 50 u8 unit = (drive->select.b.unit & 0x01);
51 u8 speed = ide_rate_filter(drive, xferspeed);
52 51
53 pci_read_config_dword(dev, channel_offset, &triflex_timings); 52 pci_read_config_dword(dev, channel_offset, &triflex_timings);
54 53
@@ -94,10 +93,9 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed)
94 return (ide_config_drive_speed(drive, speed)); 93 return (ide_config_drive_speed(drive, speed));
95} 94}
96 95
97static void triflex_tune_drive(ide_drive_t *drive, u8 pio) 96static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio)
98{ 97{
99 int use_pio = ide_get_best_pio_mode(drive, pio, 4); 98 (void)triflex_tune_chipset(drive, XFER_PIO_0 + pio);
100 (void) triflex_tune_chipset(drive, (XFER_PIO_0 + use_pio));
101} 99}
102 100
103static int triflex_config_drive_xfer_rate(ide_drive_t *drive) 101static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
@@ -105,14 +103,14 @@ static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
105 if (ide_tune_dma(drive)) 103 if (ide_tune_dma(drive))
106 return 0; 104 return 0;
107 105
108 triflex_tune_drive(drive, 255); 106 ide_set_max_pio(drive);
109 107
110 return -1; 108 return -1;
111} 109}
112 110
113static void __devinit init_hwif_triflex(ide_hwif_t *hwif) 111static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
114{ 112{
115 hwif->tuneproc = &triflex_tune_drive; 113 hwif->set_pio_mode = &triflex_set_pio_mode;
116 hwif->speedproc = &triflex_tune_chipset; 114 hwif->speedproc = &triflex_tune_chipset;
117 115
118 if (hwif->dma_base == 0) 116 if (hwif->dma_base == 0)
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index a7be7795e6af..378feb491ec4 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * 2 *
3 * Version 3.47 3 * Version 3.48
4 * 4 *
5 * VIA IDE driver for Linux. Supported southbridges: 5 * VIA IDE driver for Linux. Supported southbridges:
6 * 6 *
@@ -158,7 +158,7 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
158 * by upper layers. 158 * by upper layers.
159 */ 159 */
160 160
161static int via_set_drive(ide_drive_t *drive, u8 speed) 161static int via_set_drive(ide_drive_t *drive, const u8 speed)
162{ 162{
163 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 163 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
164 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev); 164 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
@@ -195,19 +195,16 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
195} 195}
196 196
197/** 197/**
198 * via82cxxx_tune_drive - PIO setup 198 * via_set_pio_mode - PIO setup
199 * @drive: drive to set up 199 * @drive: drive
200 * @pio: mode to use (255 for 'best possible') 200 * @pio: PIO mode number
201 * 201 *
202 * A callback from the upper layers for PIO-only tuning. 202 * A callback from the upper layers for PIO-only tuning.
203 */ 203 */
204 204
205static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) 205static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
206{ 206{
207 if (pio == 255) 207 via_set_drive(drive, XFER_PIO_0 + pio);
208 pio = ide_get_best_pio_mode(drive, 255, 5);
209
210 via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
211} 208}
212 209
213/** 210/**
@@ -220,18 +217,11 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
220 217
221static int via82cxxx_ide_dma_check (ide_drive_t *drive) 218static int via82cxxx_ide_dma_check (ide_drive_t *drive)
222{ 219{
223 u8 speed = ide_max_dma_mode(drive); 220 if (ide_tune_dma(drive))
224
225 if (speed == 0) {
226 via82cxxx_tune_drive(drive, 255);
227 return -1;
228 }
229
230 via_set_drive(drive, speed);
231
232 if (drive->autodma)
233 return 0; 221 return 0;
234 222
223 ide_set_max_pio(drive);
224
235 return -1; 225 return -1;
236} 226}
237 227
@@ -419,7 +409,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
419 * Cable special cases 409 * Cable special cases
420 */ 410 */
421 411
422static struct dmi_system_id cable_dmi_table[] = { 412static const struct dmi_system_id cable_dmi_table[] = {
423 { 413 {
424 .ident = "Acer Ferrari 3400", 414 .ident = "Acer Ferrari 3400",
425 .matches = { 415 .matches = {
@@ -465,7 +455,7 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
465 455
466 hwif->autodma = 0; 456 hwif->autodma = 0;
467 457
468 hwif->tuneproc = &via82cxxx_tune_drive; 458 hwif->set_pio_mode = &via_set_pio_mode;
469 hwif->speedproc = &via_set_drive; 459 hwif->speedproc = &via_set_drive;
470 460
471 461
diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c
index dab79afa9b22..df2e92034f5d 100644
--- a/drivers/ide/ppc/mpc8xx.c
+++ b/drivers/ide/ppc/mpc8xx.c
@@ -45,7 +45,7 @@ static void print_funcid (int func);
45static int check_ide_device (unsigned long base); 45static int check_ide_device (unsigned long base);
46 46
47static void ide_interrupt_ack (void *dev); 47static void ide_interrupt_ack (void *dev);
48static void m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio); 48static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio);
49 49
50typedef struct ide_ioport_desc { 50typedef struct ide_ioport_desc {
51 unsigned long base_off; /* Offset to PCMCIA memory */ 51 unsigned long base_off; /* Offset to PCMCIA memory */
@@ -314,9 +314,8 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
314#endif /* CONFIG_IDE_8xx_PCCARD */ 314#endif /* CONFIG_IDE_8xx_PCCARD */
315 } 315 }
316 316
317 /* register routine to tune PIO mode */
318 ide_hwifs[data_port].pio_mask = ATA_PIO4; 317 ide_hwifs[data_port].pio_mask = ATA_PIO4;
319 ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; 318 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
320 319
321 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; 320 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack;
322 /* Enable Harddisk Interrupt, 321 /* Enable Harddisk Interrupt,
@@ -401,9 +400,8 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
401 *irq = ioport_dsc[data_port].irq; 400 *irq = ioport_dsc[data_port].irq;
402 } 401 }
403 402
404 /* register routine to tune PIO mode */
405 ide_hwifs[data_port].pio_mask = ATA_PIO4; 403 ide_hwifs[data_port].pio_mask = ATA_PIO4;
406 ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; 404 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
407 405
408 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; 406 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack;
409 /* Enable Harddisk Interrupt, 407 /* Enable Harddisk Interrupt,
@@ -427,24 +425,13 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
427#define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */ 425#define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */
428#endif 426#endif
429 427
430
431/* Calculate PIO timings */ 428/* Calculate PIO timings */
432static void 429static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
433m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio)
434{ 430{
435#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) 431#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
436 volatile pcmconf8xx_t *pcmp; 432 volatile pcmconf8xx_t *pcmp;
437 ulong timing, mask, reg; 433 ulong timing, mask, reg;
438#endif
439
440 pio = ide_get_best_pio_mode(drive, pio, 4);
441 434
442#if 1
443 printk("%s[%d] %s: best PIO mode: %d\n",
444 __FILE__,__LINE__,__FUNCTION__, pio);
445#endif
446
447#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
448 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia)); 435 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia));
449 436
450 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF)); 437 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF));
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 2fb047b898aa..f759a5397865 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -6,6 +6,7 @@
6 * for doing DMA. 6 * for doing DMA.
7 * 7 *
8 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt 8 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt
9 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
9 * 10 *
10 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -311,7 +312,8 @@ static struct kauai_timing kauai_pio_timings[] =
311 { 240 , 0x0800038b }, 312 { 240 , 0x0800038b },
312 { 239 , 0x0800030c }, 313 { 239 , 0x0800030c },
313 { 180 , 0x05000249 }, 314 { 180 , 0x05000249 },
314 { 120 , 0x04000148 } 315 { 120 , 0x04000148 },
316 { 0 , 0 },
315}; 317};
316 318
317static struct kauai_timing kauai_mdma_timings[] = 319static struct kauai_timing kauai_mdma_timings[] =
@@ -351,7 +353,8 @@ static struct kauai_timing shasta_pio_timings[] =
351 { 240 , 0x040003cd }, 353 { 240 , 0x040003cd },
352 { 239 , 0x040003cd }, 354 { 239 , 0x040003cd },
353 { 180 , 0x0400028b }, 355 { 180 , 0x0400028b },
354 { 120 , 0x0400010a } 356 { 120 , 0x0400010a },
357 { 0 , 0 },
355}; 358};
356 359
357static struct kauai_timing shasta_mdma_timings[] = 360static struct kauai_timing shasta_mdma_timings[] =
@@ -411,8 +414,6 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
411 414
412static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif); 415static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif);
413static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); 416static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
414static int pmac_ide_tune_chipset(ide_drive_t *drive, u8 speed);
415static void pmac_ide_tuneproc(ide_drive_t *drive, u8 pio);
416static void pmac_ide_selectproc(ide_drive_t *drive); 417static void pmac_ide_selectproc(ide_drive_t *drive);
417static void pmac_ide_kauai_selectproc(ide_drive_t *drive); 418static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
418 419
@@ -616,7 +617,7 @@ out:
616 * Old tuning functions (called on hdparm -p), sets up drive PIO timings 617 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
617 */ 618 */
618static void 619static void
619pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) 620pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
620{ 621{
621 u32 *timings; 622 u32 *timings;
622 unsigned accessTicks, recTicks; 623 unsigned accessTicks, recTicks;
@@ -630,7 +631,6 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
630 /* which drive is it ? */ 631 /* which drive is it ? */
631 timings = &pmif->timings[drive->select.b.unit & 0x01]; 632 timings = &pmif->timings[drive->select.b.unit & 0x01];
632 633
633 pio = ide_get_best_pio_mode(drive, pio, 4);
634 cycle_time = ide_pio_cycle_time(drive, pio); 634 cycle_time = ide_pio_cycle_time(drive, pio);
635 635
636 switch (pmif->kind) { 636 switch (pmif->kind) {
@@ -698,8 +698,10 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
698 drive->name, pio, *timings); 698 drive->name, pio, *timings);
699#endif 699#endif
700 700
701 if (drive->select.all == HWIF(drive)->INB(IDE_SELECT_REG)) 701 if (pmac_ide_do_setfeature(drive, XFER_PIO_0 + pio))
702 pmac_ide_do_update_timings(drive); 702 return;
703
704 pmac_ide_do_update_timings(drive);
703} 705}
704 706
705#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 707#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
@@ -915,13 +917,12 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
915 917
916/* 918/*
917 * Speedproc. This function is called by the core to set any of the standard 919 * Speedproc. This function is called by the core to set any of the standard
918 * timing (PIO, MDMA or UDMA) to both the drive and the controller. 920 * DMA timing (MDMA or UDMA) to both the drive and the controller.
919 * You may notice we don't use this function on normal "dma check" operation, 921 * You may notice we don't use this function on normal "dma check" operation,
920 * our dedicated function is more precise as it uses the drive provided 922 * our dedicated function is more precise as it uses the drive provided
921 * cycle time value. We should probably fix this one to deal with that too... 923 * cycle time value. We should probably fix this one to deal with that too...
922 */ 924 */
923static int 925static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
924pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
925{ 926{
926 int unit = (drive->select.b.unit & 0x01); 927 int unit = (drive->select.b.unit & 0x01);
927 int ret = 0; 928 int ret = 0;
@@ -937,17 +938,9 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
937 switch(speed) { 938 switch(speed) {
938#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 939#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
939 case XFER_UDMA_6: 940 case XFER_UDMA_6:
940 if (pmif->kind != controller_sh_ata6)
941 return 1;
942 case XFER_UDMA_5: 941 case XFER_UDMA_5:
943 if (pmif->kind != controller_un_ata6 &&
944 pmif->kind != controller_k2_ata6 &&
945 pmif->kind != controller_sh_ata6)
946 return 1;
947 case XFER_UDMA_4: 942 case XFER_UDMA_4:
948 case XFER_UDMA_3: 943 case XFER_UDMA_3:
949 if (drive->hwif->cbl != ATA_CBL_PATA80)
950 return 1;
951 case XFER_UDMA_2: 944 case XFER_UDMA_2:
952 case XFER_UDMA_1: 945 case XFER_UDMA_1:
953 case XFER_UDMA_0: 946 case XFER_UDMA_0:
@@ -971,13 +964,6 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
971 case XFER_SW_DMA_0: 964 case XFER_SW_DMA_0:
972 return 1; 965 return 1;
973#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 966#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
974 case XFER_PIO_4:
975 case XFER_PIO_3:
976 case XFER_PIO_2:
977 case XFER_PIO_1:
978 case XFER_PIO_0:
979 pmac_ide_tuneproc(drive, speed & 0x07);
980 break;
981 default: 967 default:
982 ret = 1; 968 ret = 1;
983 } 969 }
@@ -1251,7 +1237,7 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1251 hwif->drives[0].unmask = 1; 1237 hwif->drives[0].unmask = 1;
1252 hwif->drives[1].unmask = 1; 1238 hwif->drives[1].unmask = 1;
1253 hwif->pio_mask = ATA_PIO4; 1239 hwif->pio_mask = ATA_PIO4;
1254 hwif->tuneproc = pmac_ide_tuneproc; 1240 hwif->set_pio_mode = pmac_ide_set_pio_mode;
1255 if (pmif->kind == controller_un_ata6 1241 if (pmif->kind == controller_un_ata6
1256 || pmif->kind == controller_k2_ata6 1242 || pmif->kind == controller_k2_ata6
1257 || pmif->kind == controller_sh_ata6) 1243 || pmif->kind == controller_sh_ata6)
diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c
index 60121f10f8d9..b438d998625c 100644
--- a/drivers/input/misc/wistron_btns.c
+++ b/drivers/input/misc/wistron_btns.c
@@ -247,7 +247,7 @@ static int have_wifi;
247static int have_bluetooth; 247static int have_bluetooth;
248static int have_leds; 248static int have_leds;
249 249
250static int __init dmi_matched(struct dmi_system_id *dmi) 250static int __init dmi_matched(const struct dmi_system_id *dmi)
251{ 251{
252 const struct key_entry *key; 252 const struct key_entry *key;
253 253
diff --git a/drivers/input/mouse/lifebook.c b/drivers/input/mouse/lifebook.c
index 91109b49fde1..608674d0be8b 100644
--- a/drivers/input/mouse/lifebook.c
+++ b/drivers/input/mouse/lifebook.c
@@ -27,7 +27,7 @@ struct lifebook_data {
27 27
28static const char *desired_serio_phys; 28static const char *desired_serio_phys;
29 29
30static int lifebook_set_serio_phys(struct dmi_system_id *d) 30static int lifebook_set_serio_phys(const struct dmi_system_id *d)
31{ 31{
32 desired_serio_phys = d->driver_data; 32 desired_serio_phys = d->driver_data;
33 return 0; 33 return 0;
@@ -35,13 +35,13 @@ static int lifebook_set_serio_phys(struct dmi_system_id *d)
35 35
36static unsigned char lifebook_use_6byte_proto; 36static unsigned char lifebook_use_6byte_proto;
37 37
38static int lifebook_set_6byte_proto(struct dmi_system_id *d) 38static int lifebook_set_6byte_proto(const struct dmi_system_id *d)
39{ 39{
40 lifebook_use_6byte_proto = 1; 40 lifebook_use_6byte_proto = 1;
41 return 0; 41 return 0;
42} 42}
43 43
44static struct dmi_system_id lifebook_dmi_table[] = { 44static const struct dmi_system_id lifebook_dmi_table[] = {
45 { 45 {
46 .ident = "FLORA-ie 55mi", 46 .ident = "FLORA-ie 55mi",
47 .matches = { 47 .matches = {
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 666ad3a53fdb..d349c4a5e3e8 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -602,7 +602,7 @@ static int synaptics_reconnect(struct psmouse *psmouse)
602 602
603#if defined(__i386__) 603#if defined(__i386__)
604#include <linux/dmi.h> 604#include <linux/dmi.h>
605static struct dmi_system_id toshiba_dmi_table[] = { 605static const struct dmi_system_id toshiba_dmi_table[] = {
606 { 606 {
607 .ident = "Toshiba Satellite", 607 .ident = "Toshiba Satellite",
608 .matches = { 608 .matches = {
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 4468cb3a8d24..3cb23210b912 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -87,11 +87,18 @@ config LEDS_H1940
87 help 87 help
88 This option enables support for the LEDs on the h1940. 88 This option enables support for the LEDs on the h1940.
89 89
90config LEDS_COBALT 90config LEDS_COBALT_QUBE
91 tristate "LED Support for Cobalt Server front LED" 91 tristate "LED Support for the Cobalt Qube series front LED"
92 depends on LEDS_CLASS && MIPS_COBALT 92 depends on LEDS_CLASS && MIPS_COBALT
93 help 93 help
94 This option enables support for the front LED on Cobalt Server 94 This option enables support for the front LED on Cobalt Qube series
95
96config LEDS_COBALT_RAQ
97 bool "LED Support for the Cobalt Raq series"
98 depends on LEDS_CLASS && MIPS_COBALT
99 select LEDS_TRIGGERS
100 help
101 This option enables support for the Cobalt Raq series LEDs.
95 102
96config LEDS_GPIO 103config LEDS_GPIO
97 tristate "LED Support for GPIO connected LEDs" 104 tristate "LED Support for GPIO connected LEDs"
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index f8995c9bc2ea..d2ca1abbc3d2 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -15,7 +15,8 @@ obj-$(CONFIG_LEDS_AMS_DELTA) += leds-ams-delta.o
15obj-$(CONFIG_LEDS_NET48XX) += leds-net48xx.o 15obj-$(CONFIG_LEDS_NET48XX) += leds-net48xx.o
16obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o 16obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
17obj-$(CONFIG_LEDS_H1940) += leds-h1940.o 17obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
18obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o 18obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o
19obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
19obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o 20obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
20 21
21# LED Triggers 22# LED Triggers
diff --git a/drivers/leds/leds-cobalt-qube.c b/drivers/leds/leds-cobalt-qube.c
new file mode 100644
index 000000000000..d2b54b53d80a
--- /dev/null
+++ b/drivers/leds/leds-cobalt-qube.c
@@ -0,0 +1,102 @@
1/*
2 * Copyright 2006 - Florian Fainelli <florian@openwrt.org>
3 *
4 * Control the Cobalt Qube/RaQ front LED
5 */
6#include <linux/init.h>
7#include <linux/io.h>
8#include <linux/ioport.h>
9#include <linux/leds.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/types.h>
13
14#define LED_FRONT_LEFT 0x01
15#define LED_FRONT_RIGHT 0x02
16
17static void __iomem *led_port;
18static u8 led_value;
19
20static void qube_front_led_set(struct led_classdev *led_cdev,
21 enum led_brightness brightness)
22{
23 if (brightness)
24 led_value = LED_FRONT_LEFT | LED_FRONT_RIGHT;
25 else
26 led_value = ~(LED_FRONT_LEFT | LED_FRONT_RIGHT);
27 writeb(led_value, led_port);
28}
29
30static struct led_classdev qube_front_led = {
31 .name = "qube-front",
32 .brightness = LED_FULL,
33 .brightness_set = qube_front_led_set,
34 .default_trigger = "ide-disk",
35};
36
37static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
38{
39 struct resource *res;
40 int retval;
41
42 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
43 if (!res)
44 return -EBUSY;
45
46 led_port = ioremap(res->start, res->end - res->start + 1);
47 if (!led_port)
48 return -ENOMEM;
49
50 led_value = LED_FRONT_LEFT | LED_FRONT_RIGHT;
51 writeb(led_value, led_port);
52
53 retval = led_classdev_register(&pdev->dev, &qube_front_led);
54 if (retval)
55 goto err_iounmap;
56
57 return 0;
58
59err_iounmap:
60 iounmap(led_port);
61 led_port = NULL;
62
63 return retval;
64}
65
66static int __devexit cobalt_qube_led_remove(struct platform_device *pdev)
67{
68 led_classdev_unregister(&qube_front_led);
69
70 if (led_port) {
71 iounmap(led_port);
72 led_port = NULL;
73 }
74
75 return 0;
76}
77
78static struct platform_driver cobalt_qube_led_driver = {
79 .probe = cobalt_qube_led_probe,
80 .remove = __devexit_p(cobalt_qube_led_remove),
81 .driver = {
82 .name = "cobalt-qube-leds",
83 .owner = THIS_MODULE,
84 },
85};
86
87static int __init cobalt_qube_led_init(void)
88{
89 return platform_driver_register(&cobalt_qube_led_driver);
90}
91
92static void __exit cobalt_qube_led_exit(void)
93{
94 platform_driver_unregister(&cobalt_qube_led_driver);
95}
96
97module_init(cobalt_qube_led_init);
98module_exit(cobalt_qube_led_exit);
99
100MODULE_LICENSE("GPL");
101MODULE_DESCRIPTION("Front LED support for Cobalt Server");
102MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c
new file mode 100644
index 000000000000..6ebfff341e6c
--- /dev/null
+++ b/drivers/leds/leds-cobalt-raq.c
@@ -0,0 +1,138 @@
1/*
2 * LEDs driver for the Cobalt Raq series.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/ioport.h>
23#include <linux/leds.h>
24#include <linux/platform_device.h>
25#include <linux/spinlock.h>
26#include <linux/types.h>
27
28#define LED_WEB 0x04
29#define LED_POWER_OFF 0x08
30
31static void __iomem *led_port;
32static u8 led_value;
33static DEFINE_SPINLOCK(led_value_lock);
34
35static void raq_web_led_set(struct led_classdev *led_cdev,
36 enum led_brightness brightness)
37{
38 unsigned long flags;
39
40 spin_lock_irqsave(&led_value_lock, flags);
41
42 if (brightness)
43 led_value |= LED_WEB;
44 else
45 led_value &= ~LED_WEB;
46 writeb(led_value, led_port);
47
48 spin_unlock_irqrestore(&led_value_lock, flags);
49}
50
51static struct led_classdev raq_web_led = {
52 .name = "raq-web",
53 .brightness_set = raq_web_led_set,
54};
55
56static void raq_power_off_led_set(struct led_classdev *led_cdev,
57 enum led_brightness brightness)
58{
59 unsigned long flags;
60
61 spin_lock_irqsave(&led_value_lock, flags);
62
63 if (brightness)
64 led_value |= LED_POWER_OFF;
65 else
66 led_value &= ~LED_POWER_OFF;
67 writeb(led_value, led_port);
68
69 spin_unlock_irqrestore(&led_value_lock, flags);
70}
71
72static struct led_classdev raq_power_off_led = {
73 .name = "raq-power-off",
74 .brightness_set = raq_power_off_led_set,
75 .default_trigger = "power-off",
76};
77
78static int __devinit cobalt_raq_led_probe(struct platform_device *pdev)
79{
80 struct resource *res;
81 int retval;
82
83 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
84 if (!res)
85 return -EBUSY;
86
87 led_port = ioremap(res->start, res->end - res->start + 1);
88 if (!led_port)
89 return -ENOMEM;
90
91 retval = led_classdev_register(&pdev->dev, &raq_power_off_led);
92 if (retval)
93 goto err_iounmap;
94
95 retval = led_classdev_register(&pdev->dev, &raq_web_led);
96 if (retval)
97 goto err_unregister;
98
99 return 0;
100
101err_unregister:
102 led_classdev_unregister(&raq_power_off_led);
103
104err_iounmap:
105 iounmap(led_port);
106 led_port = NULL;
107
108 return retval;
109}
110
111static int __devexit cobalt_raq_led_remove(struct platform_device *pdev)
112{
113 led_classdev_unregister(&raq_power_off_led);
114 led_classdev_unregister(&raq_web_led);
115
116 if (led_port) {
117 iounmap(led_port);
118 led_port = NULL;
119 }
120
121 return 0;
122}
123
124static struct platform_driver cobalt_raq_led_driver = {
125 .probe = cobalt_raq_led_probe,
126 .remove = __devexit_p(cobalt_raq_led_remove),
127 .driver = {
128 .name = "cobalt-raq-leds",
129 .owner = THIS_MODULE,
130 },
131};
132
133static int __init cobalt_raq_led_init(void)
134{
135 return platform_driver_register(&cobalt_raq_led_driver);
136}
137
138module_init(cobalt_raq_led_init);
diff --git a/drivers/leds/leds-cobalt.c b/drivers/leds/leds-cobalt.c
deleted file mode 100644
index d16439ce5da7..000000000000
--- a/drivers/leds/leds-cobalt.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright 2006 - Florian Fainelli <florian@openwrt.org>
3 *
4 * Control the Cobalt Qube/RaQ front LED
5 */
6
7#include <linux/module.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/device.h>
11#include <linux/leds.h>
12#include <asm/mach-cobalt/cobalt.h>
13
14static void cobalt_led_set(struct led_classdev *led_cdev, enum led_brightness brightness)
15{
16 if (brightness)
17 COBALT_LED_PORT = COBALT_LED_BAR_LEFT | COBALT_LED_BAR_RIGHT;
18 else
19 COBALT_LED_PORT = 0;
20}
21
22static struct led_classdev cobalt_led = {
23 .name = "cobalt-front-led",
24 .brightness_set = cobalt_led_set,
25 .default_trigger = "ide-disk",
26};
27
28static int __init cobalt_led_init(void)
29{
30 return led_classdev_register(NULL, &cobalt_led);
31}
32
33static void __exit cobalt_led_exit(void)
34{
35 led_classdev_unregister(&cobalt_led);
36}
37
38module_init(cobalt_led_init);
39module_exit(cobalt_led_exit);
40
41MODULE_LICENSE("GPL");
42MODULE_DESCRIPTION("Front LED support for Cobalt Server");
43MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index bdc52d6922b7..8216a6f75be5 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -489,7 +489,7 @@ static void dec_pending(struct dm_crypt_io *io, int error)
489 if (!atomic_dec_and_test(&io->pending)) 489 if (!atomic_dec_and_test(&io->pending))
490 return; 490 return;
491 491
492 bio_endio(io->base_bio, io->base_bio->bi_size, io->error); 492 bio_endio(io->base_bio, io->error);
493 493
494 mempool_free(io, cc->io_pool); 494 mempool_free(io, cc->io_pool);
495} 495}
@@ -509,25 +509,19 @@ static void kcryptd_queue_io(struct dm_crypt_io *io)
509 queue_work(_kcryptd_workqueue, &io->work); 509 queue_work(_kcryptd_workqueue, &io->work);
510} 510}
511 511
512static int crypt_endio(struct bio *clone, unsigned int done, int error) 512static void crypt_endio(struct bio *clone, int error)
513{ 513{
514 struct dm_crypt_io *io = clone->bi_private; 514 struct dm_crypt_io *io = clone->bi_private;
515 struct crypt_config *cc = io->target->private; 515 struct crypt_config *cc = io->target->private;
516 unsigned read_io = bio_data_dir(clone) == READ; 516 unsigned read_io = bio_data_dir(clone) == READ;
517 517
518 /* 518 /*
519 * free the processed pages, even if 519 * free the processed pages
520 * it's only a partially completed write
521 */ 520 */
522 if (!read_io) 521 if (!read_io) {
523 crypt_free_buffer_pages(cc, clone, done); 522 crypt_free_buffer_pages(cc, clone, clone->bi_size);
524
525 /* keep going - not finished yet */
526 if (unlikely(clone->bi_size))
527 return 1;
528
529 if (!read_io)
530 goto out; 523 goto out;
524 }
531 525
532 if (unlikely(!bio_flagged(clone, BIO_UPTODATE))) { 526 if (unlikely(!bio_flagged(clone, BIO_UPTODATE))) {
533 error = -EIO; 527 error = -EIO;
@@ -537,12 +531,11 @@ static int crypt_endio(struct bio *clone, unsigned int done, int error)
537 bio_put(clone); 531 bio_put(clone);
538 io->post_process = 1; 532 io->post_process = 1;
539 kcryptd_queue_io(io); 533 kcryptd_queue_io(io);
540 return 0; 534 return;
541 535
542out: 536out:
543 bio_put(clone); 537 bio_put(clone);
544 dec_pending(io, error); 538 dec_pending(io, error);
545 return error;
546} 539}
547 540
548static void clone_init(struct dm_crypt_io *io, struct bio *clone) 541static void clone_init(struct dm_crypt_io *io, struct bio *clone)
diff --git a/drivers/md/dm-emc.c b/drivers/md/dm-emc.c
index 265c467854da..a2191a4fcf77 100644
--- a/drivers/md/dm-emc.c
+++ b/drivers/md/dm-emc.c
@@ -38,13 +38,10 @@ static inline void free_bio(struct bio *bio)
38 bio_put(bio); 38 bio_put(bio);
39} 39}
40 40
41static int emc_endio(struct bio *bio, unsigned int bytes_done, int error) 41static void emc_endio(struct bio *bio, int error)
42{ 42{
43 struct dm_path *path = bio->bi_private; 43 struct dm_path *path = bio->bi_private;
44 44
45 if (bio->bi_size)
46 return 1;
47
48 /* We also need to look at the sense keys here whether or not to 45 /* We also need to look at the sense keys here whether or not to
49 * switch to the next PG etc. 46 * switch to the next PG etc.
50 * 47 *
@@ -109,15 +106,7 @@ static struct request *get_failover_req(struct emc_handler *h,
109 return NULL; 106 return NULL;
110 } 107 }
111 108
112 rq->bio = rq->biotail = bio; 109 blk_rq_append_bio(q, rq, bio);
113 blk_rq_bio_prep(q, rq, bio);
114
115 rq->rq_disk = bdev->bd_contains->bd_disk;
116
117 /* bio backed don't set data */
118 rq->buffer = rq->data = NULL;
119 /* rq data_len used for pc cmd's request_bufflen */
120 rq->data_len = bio->bi_size;
121 110
122 rq->sense = h->sense; 111 rq->sense = h->sense;
123 memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE); 112 memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE);
diff --git a/drivers/md/dm-io.c b/drivers/md/dm-io.c
index f3a772486437..b8e342fe7586 100644
--- a/drivers/md/dm-io.c
+++ b/drivers/md/dm-io.c
@@ -124,15 +124,11 @@ static void dec_count(struct io *io, unsigned int region, int error)
124 } 124 }
125} 125}
126 126
127static int endio(struct bio *bio, unsigned int done, int error) 127static void endio(struct bio *bio, int error)
128{ 128{
129 struct io *io; 129 struct io *io;
130 unsigned region; 130 unsigned region;
131 131
132 /* keep going until we've finished */
133 if (bio->bi_size)
134 return 1;
135
136 if (error && bio_data_dir(bio) == READ) 132 if (error && bio_data_dir(bio) == READ)
137 zero_fill_bio(bio); 133 zero_fill_bio(bio);
138 134
@@ -146,8 +142,6 @@ static int endio(struct bio *bio, unsigned int done, int error)
146 bio_put(bio); 142 bio_put(bio);
147 143
148 dec_count(io, region, error); 144 dec_count(io, region, error);
149
150 return 0;
151} 145}
152 146
153/*----------------------------------------------------------------- 147/*-----------------------------------------------------------------
diff --git a/drivers/md/dm-mpath.c b/drivers/md/dm-mpath.c
index d6ca9d0a6fd1..31056abca89d 100644
--- a/drivers/md/dm-mpath.c
+++ b/drivers/md/dm-mpath.c
@@ -390,11 +390,11 @@ static void dispatch_queued_ios(struct multipath *m)
390 390
391 r = map_io(m, bio, mpio, 1); 391 r = map_io(m, bio, mpio, 1);
392 if (r < 0) 392 if (r < 0)
393 bio_endio(bio, bio->bi_size, r); 393 bio_endio(bio, r);
394 else if (r == DM_MAPIO_REMAPPED) 394 else if (r == DM_MAPIO_REMAPPED)
395 generic_make_request(bio); 395 generic_make_request(bio);
396 else if (r == DM_MAPIO_REQUEUE) 396 else if (r == DM_MAPIO_REQUEUE)
397 bio_endio(bio, bio->bi_size, -EIO); 397 bio_endio(bio, -EIO);
398 398
399 bio = next; 399 bio = next;
400 } 400 }
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c
index 144071e70a93..d09ff15490a5 100644
--- a/drivers/md/dm-raid1.c
+++ b/drivers/md/dm-raid1.c
@@ -820,7 +820,7 @@ static void write_callback(unsigned long error, void *context)
820 break; 820 break;
821 } 821 }
822 } 822 }
823 bio_endio(bio, bio->bi_size, 0); 823 bio_endio(bio, 0);
824} 824}
825 825
826static void do_write(struct mirror_set *ms, struct bio *bio) 826static void do_write(struct mirror_set *ms, struct bio *bio)
@@ -900,7 +900,7 @@ static void do_writes(struct mirror_set *ms, struct bio_list *writes)
900 */ 900 */
901 if (unlikely(ms->log_failure)) 901 if (unlikely(ms->log_failure))
902 while ((bio = bio_list_pop(&sync))) 902 while ((bio = bio_list_pop(&sync)))
903 bio_endio(bio, bio->bi_size, -EIO); 903 bio_endio(bio, -EIO);
904 else while ((bio = bio_list_pop(&sync))) 904 else while ((bio = bio_list_pop(&sync)))
905 do_write(ms, bio); 905 do_write(ms, bio);
906 906
diff --git a/drivers/md/dm-snap.c b/drivers/md/dm-snap.c
index 83ddbfe6b8a4..98a633f3d6b0 100644
--- a/drivers/md/dm-snap.c
+++ b/drivers/md/dm-snap.c
@@ -636,7 +636,7 @@ static void error_bios(struct bio *bio)
636 while (bio) { 636 while (bio) {
637 n = bio->bi_next; 637 n = bio->bi_next;
638 bio->bi_next = NULL; 638 bio->bi_next = NULL;
639 bio_io_error(bio, bio->bi_size); 639 bio_io_error(bio);
640 bio = n; 640 bio = n;
641 } 641 }
642} 642}
diff --git a/drivers/md/dm-zero.c b/drivers/md/dm-zero.c
index f314d7dc9c26..bdec206c404b 100644
--- a/drivers/md/dm-zero.c
+++ b/drivers/md/dm-zero.c
@@ -43,7 +43,7 @@ static int zero_map(struct dm_target *ti, struct bio *bio,
43 break; 43 break;
44 } 44 }
45 45
46 bio_endio(bio, bio->bi_size, 0); 46 bio_endio(bio, 0);
47 47
48 /* accepted bio, don't make new request */ 48 /* accepted bio, don't make new request */
49 return DM_MAPIO_SUBMITTED; 49 return DM_MAPIO_SUBMITTED;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 2120155929a6..167765c47747 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -484,23 +484,20 @@ static void dec_pending(struct dm_io *io, int error)
484 blk_add_trace_bio(io->md->queue, io->bio, 484 blk_add_trace_bio(io->md->queue, io->bio,
485 BLK_TA_COMPLETE); 485 BLK_TA_COMPLETE);
486 486
487 bio_endio(io->bio, io->bio->bi_size, io->error); 487 bio_endio(io->bio, io->error);
488 } 488 }
489 489
490 free_io(io->md, io); 490 free_io(io->md, io);
491 } 491 }
492} 492}
493 493
494static int clone_endio(struct bio *bio, unsigned int done, int error) 494static void clone_endio(struct bio *bio, int error)
495{ 495{
496 int r = 0; 496 int r = 0;
497 struct dm_target_io *tio = bio->bi_private; 497 struct dm_target_io *tio = bio->bi_private;
498 struct mapped_device *md = tio->io->md; 498 struct mapped_device *md = tio->io->md;
499 dm_endio_fn endio = tio->ti->type->end_io; 499 dm_endio_fn endio = tio->ti->type->end_io;
500 500
501 if (bio->bi_size)
502 return 1;
503
504 if (!bio_flagged(bio, BIO_UPTODATE) && !error) 501 if (!bio_flagged(bio, BIO_UPTODATE) && !error)
505 error = -EIO; 502 error = -EIO;
506 503
@@ -514,7 +511,7 @@ static int clone_endio(struct bio *bio, unsigned int done, int error)
514 error = r; 511 error = r;
515 else if (r == DM_ENDIO_INCOMPLETE) 512 else if (r == DM_ENDIO_INCOMPLETE)
516 /* The target will handle the io */ 513 /* The target will handle the io */
517 return 1; 514 return;
518 else if (r) { 515 else if (r) {
519 DMWARN("unimplemented target endio return value: %d", r); 516 DMWARN("unimplemented target endio return value: %d", r);
520 BUG(); 517 BUG();
@@ -530,7 +527,6 @@ static int clone_endio(struct bio *bio, unsigned int done, int error)
530 527
531 bio_put(bio); 528 bio_put(bio);
532 free_tio(md, tio); 529 free_tio(md, tio);
533 return r;
534} 530}
535 531
536static sector_t max_io_len(struct mapped_device *md, 532static sector_t max_io_len(struct mapped_device *md,
@@ -761,7 +757,7 @@ static void __split_bio(struct mapped_device *md, struct bio *bio)
761 757
762 ci.map = dm_get_table(md); 758 ci.map = dm_get_table(md);
763 if (!ci.map) { 759 if (!ci.map) {
764 bio_io_error(bio, bio->bi_size); 760 bio_io_error(bio);
765 return; 761 return;
766 } 762 }
767 763
@@ -803,7 +799,7 @@ static int dm_request(struct request_queue *q, struct bio *bio)
803 * guarantee it is (or can be) handled by the targets correctly. 799 * guarantee it is (or can be) handled by the targets correctly.
804 */ 800 */
805 if (unlikely(bio_barrier(bio))) { 801 if (unlikely(bio_barrier(bio))) {
806 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 802 bio_endio(bio, -EOPNOTSUPP);
807 return 0; 803 return 0;
808 } 804 }
809 805
@@ -820,13 +816,13 @@ static int dm_request(struct request_queue *q, struct bio *bio)
820 up_read(&md->io_lock); 816 up_read(&md->io_lock);
821 817
822 if (bio_rw(bio) == READA) { 818 if (bio_rw(bio) == READA) {
823 bio_io_error(bio, bio->bi_size); 819 bio_io_error(bio);
824 return 0; 820 return 0;
825 } 821 }
826 822
827 r = queue_io(md, bio); 823 r = queue_io(md, bio);
828 if (r < 0) { 824 if (r < 0) {
829 bio_io_error(bio, bio->bi_size); 825 bio_io_error(bio);
830 return 0; 826 return 0;
831 827
832 } else if (r == 0) 828 } else if (r == 0)
diff --git a/drivers/md/faulty.c b/drivers/md/faulty.c
index cb059cf14c2e..cf2ddce34118 100644
--- a/drivers/md/faulty.c
+++ b/drivers/md/faulty.c
@@ -65,18 +65,16 @@
65#include <linux/raid/md.h> 65#include <linux/raid/md.h>
66 66
67 67
68static int faulty_fail(struct bio *bio, unsigned int bytes_done, int error) 68static void faulty_fail(struct bio *bio, int error)
69{ 69{
70 struct bio *b = bio->bi_private; 70 struct bio *b = bio->bi_private;
71 71
72 b->bi_size = bio->bi_size; 72 b->bi_size = bio->bi_size;
73 b->bi_sector = bio->bi_sector; 73 b->bi_sector = bio->bi_sector;
74 74
75 if (bio->bi_size == 0) 75 bio_put(bio);
76 bio_put(bio);
77 76
78 clear_bit(BIO_UPTODATE, &b->bi_flags); 77 bio_io_error(b);
79 return (b->bi_end_io)(b, bytes_done, -EIO);
80} 78}
81 79
82typedef struct faulty_conf { 80typedef struct faulty_conf {
@@ -179,7 +177,7 @@ static int make_request(struct request_queue *q, struct bio *bio)
179 /* special case - don't decrement, don't generic_make_request, 177 /* special case - don't decrement, don't generic_make_request,
180 * just fail immediately 178 * just fail immediately
181 */ 179 */
182 bio_endio(bio, bio->bi_size, -EIO); 180 bio_endio(bio, -EIO);
183 return 0; 181 return 0;
184 } 182 }
185 183
diff --git a/drivers/md/linear.c b/drivers/md/linear.c
index 17f795c3e0ab..550148770bb2 100644
--- a/drivers/md/linear.c
+++ b/drivers/md/linear.c
@@ -338,7 +338,7 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
338 sector_t block; 338 sector_t block;
339 339
340 if (unlikely(bio_barrier(bio))) { 340 if (unlikely(bio_barrier(bio))) {
341 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 341 bio_endio(bio, -EOPNOTSUPP);
342 return 0; 342 return 0;
343 } 343 }
344 344
@@ -358,7 +358,7 @@ static int linear_make_request (struct request_queue *q, struct bio *bio)
358 bdevname(tmp_dev->rdev->bdev, b), 358 bdevname(tmp_dev->rdev->bdev, b),
359 (unsigned long long)tmp_dev->size, 359 (unsigned long long)tmp_dev->size,
360 (unsigned long long)tmp_dev->offset); 360 (unsigned long long)tmp_dev->offset);
361 bio_io_error(bio, bio->bi_size); 361 bio_io_error(bio);
362 return 0; 362 return 0;
363 } 363 }
364 if (unlikely(bio->bi_sector + (bio->bi_size >> 9) > 364 if (unlikely(bio->bi_sector + (bio->bi_size >> 9) >
diff --git a/drivers/md/md.c b/drivers/md/md.c
index f883b7e37f3d..e8f102ea9b03 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -213,7 +213,7 @@ static DEFINE_SPINLOCK(all_mddevs_lock);
213 213
214static int md_fail_request (struct request_queue *q, struct bio *bio) 214static int md_fail_request (struct request_queue *q, struct bio *bio)
215{ 215{
216 bio_io_error(bio, bio->bi_size); 216 bio_io_error(bio);
217 return 0; 217 return 0;
218} 218}
219 219
@@ -384,12 +384,10 @@ static void free_disk_sb(mdk_rdev_t * rdev)
384} 384}
385 385
386 386
387static int super_written(struct bio *bio, unsigned int bytes_done, int error) 387static void super_written(struct bio *bio, int error)
388{ 388{
389 mdk_rdev_t *rdev = bio->bi_private; 389 mdk_rdev_t *rdev = bio->bi_private;
390 mddev_t *mddev = rdev->mddev; 390 mddev_t *mddev = rdev->mddev;
391 if (bio->bi_size)
392 return 1;
393 391
394 if (error || !test_bit(BIO_UPTODATE, &bio->bi_flags)) { 392 if (error || !test_bit(BIO_UPTODATE, &bio->bi_flags)) {
395 printk("md: super_written gets error=%d, uptodate=%d\n", 393 printk("md: super_written gets error=%d, uptodate=%d\n",
@@ -401,16 +399,13 @@ static int super_written(struct bio *bio, unsigned int bytes_done, int error)
401 if (atomic_dec_and_test(&mddev->pending_writes)) 399 if (atomic_dec_and_test(&mddev->pending_writes))
402 wake_up(&mddev->sb_wait); 400 wake_up(&mddev->sb_wait);
403 bio_put(bio); 401 bio_put(bio);
404 return 0;
405} 402}
406 403
407static int super_written_barrier(struct bio *bio, unsigned int bytes_done, int error) 404static void super_written_barrier(struct bio *bio, int error)
408{ 405{
409 struct bio *bio2 = bio->bi_private; 406 struct bio *bio2 = bio->bi_private;
410 mdk_rdev_t *rdev = bio2->bi_private; 407 mdk_rdev_t *rdev = bio2->bi_private;
411 mddev_t *mddev = rdev->mddev; 408 mddev_t *mddev = rdev->mddev;
412 if (bio->bi_size)
413 return 1;
414 409
415 if (!test_bit(BIO_UPTODATE, &bio->bi_flags) && 410 if (!test_bit(BIO_UPTODATE, &bio->bi_flags) &&
416 error == -EOPNOTSUPP) { 411 error == -EOPNOTSUPP) {
@@ -424,11 +419,11 @@ static int super_written_barrier(struct bio *bio, unsigned int bytes_done, int e
424 spin_unlock_irqrestore(&mddev->write_lock, flags); 419 spin_unlock_irqrestore(&mddev->write_lock, flags);
425 wake_up(&mddev->sb_wait); 420 wake_up(&mddev->sb_wait);
426 bio_put(bio); 421 bio_put(bio);
427 return 0; 422 } else {
423 bio_put(bio2);
424 bio->bi_private = rdev;
425 super_written(bio, error);
428 } 426 }
429 bio_put(bio2);
430 bio->bi_private = rdev;
431 return super_written(bio, bytes_done, error);
432} 427}
433 428
434void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev, 429void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev,
@@ -489,13 +484,9 @@ void md_super_wait(mddev_t *mddev)
489 finish_wait(&mddev->sb_wait, &wq); 484 finish_wait(&mddev->sb_wait, &wq);
490} 485}
491 486
492static int bi_complete(struct bio *bio, unsigned int bytes_done, int error) 487static void bi_complete(struct bio *bio, int error)
493{ 488{
494 if (bio->bi_size)
495 return 1;
496
497 complete((struct completion*)bio->bi_private); 489 complete((struct completion*)bio->bi_private);
498 return 0;
499} 490}
500 491
501int sync_page_io(struct block_device *bdev, sector_t sector, int size, 492int sync_page_io(struct block_device *bdev, sector_t sector, int size,
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c
index 1e2af43a73b9..f2a63f394ad9 100644
--- a/drivers/md/multipath.c
+++ b/drivers/md/multipath.c
@@ -82,21 +82,17 @@ static void multipath_end_bh_io (struct multipath_bh *mp_bh, int err)
82 struct bio *bio = mp_bh->master_bio; 82 struct bio *bio = mp_bh->master_bio;
83 multipath_conf_t *conf = mddev_to_conf(mp_bh->mddev); 83 multipath_conf_t *conf = mddev_to_conf(mp_bh->mddev);
84 84
85 bio_endio(bio, bio->bi_size, err); 85 bio_endio(bio, err);
86 mempool_free(mp_bh, conf->pool); 86 mempool_free(mp_bh, conf->pool);
87} 87}
88 88
89static int multipath_end_request(struct bio *bio, unsigned int bytes_done, 89static void multipath_end_request(struct bio *bio, int error)
90 int error)
91{ 90{
92 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 91 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
93 struct multipath_bh * mp_bh = (struct multipath_bh *)(bio->bi_private); 92 struct multipath_bh * mp_bh = (struct multipath_bh *)(bio->bi_private);
94 multipath_conf_t *conf = mddev_to_conf(mp_bh->mddev); 93 multipath_conf_t *conf = mddev_to_conf(mp_bh->mddev);
95 mdk_rdev_t *rdev = conf->multipaths[mp_bh->path].rdev; 94 mdk_rdev_t *rdev = conf->multipaths[mp_bh->path].rdev;
96 95
97 if (bio->bi_size)
98 return 1;
99
100 if (uptodate) 96 if (uptodate)
101 multipath_end_bh_io(mp_bh, 0); 97 multipath_end_bh_io(mp_bh, 0);
102 else if (!bio_rw_ahead(bio)) { 98 else if (!bio_rw_ahead(bio)) {
@@ -112,7 +108,6 @@ static int multipath_end_request(struct bio *bio, unsigned int bytes_done,
112 } else 108 } else
113 multipath_end_bh_io(mp_bh, error); 109 multipath_end_bh_io(mp_bh, error);
114 rdev_dec_pending(rdev, conf->mddev); 110 rdev_dec_pending(rdev, conf->mddev);
115 return 0;
116} 111}
117 112
118static void unplug_slaves(mddev_t *mddev) 113static void unplug_slaves(mddev_t *mddev)
@@ -155,7 +150,7 @@ static int multipath_make_request (struct request_queue *q, struct bio * bio)
155 const int rw = bio_data_dir(bio); 150 const int rw = bio_data_dir(bio);
156 151
157 if (unlikely(bio_barrier(bio))) { 152 if (unlikely(bio_barrier(bio))) {
158 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 153 bio_endio(bio, -EOPNOTSUPP);
159 return 0; 154 return 0;
160 } 155 }
161 156
@@ -169,7 +164,7 @@ static int multipath_make_request (struct request_queue *q, struct bio * bio)
169 164
170 mp_bh->path = multipath_map(conf); 165 mp_bh->path = multipath_map(conf);
171 if (mp_bh->path < 0) { 166 if (mp_bh->path < 0) {
172 bio_endio(bio, bio->bi_size, -EIO); 167 bio_endio(bio, -EIO);
173 mempool_free(mp_bh, conf->pool); 168 mempool_free(mp_bh, conf->pool);
174 return 0; 169 return 0;
175 } 170 }
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index b8216bc6db45..ef0da2d84959 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -420,7 +420,7 @@ static int raid0_make_request (struct request_queue *q, struct bio *bio)
420 const int rw = bio_data_dir(bio); 420 const int rw = bio_data_dir(bio);
421 421
422 if (unlikely(bio_barrier(bio))) { 422 if (unlikely(bio_barrier(bio))) {
423 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 423 bio_endio(bio, -EOPNOTSUPP);
424 return 0; 424 return 0;
425 } 425 }
426 426
@@ -490,7 +490,7 @@ bad_map:
490 " or bigger than %dk %llu %d\n", chunk_size, 490 " or bigger than %dk %llu %d\n", chunk_size,
491 (unsigned long long)bio->bi_sector, bio->bi_size >> 10); 491 (unsigned long long)bio->bi_sector, bio->bi_size >> 10);
492 492
493 bio_io_error(bio, bio->bi_size); 493 bio_io_error(bio);
494 return 0; 494 return 0;
495} 495}
496 496
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index f33a729960ca..6d03bea6fa58 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -238,7 +238,7 @@ static void raid_end_bio_io(r1bio_t *r1_bio)
238 (unsigned long long) bio->bi_sector + 238 (unsigned long long) bio->bi_sector +
239 (bio->bi_size >> 9) - 1); 239 (bio->bi_size >> 9) - 1);
240 240
241 bio_endio(bio, bio->bi_size, 241 bio_endio(bio,
242 test_bit(R1BIO_Uptodate, &r1_bio->state) ? 0 : -EIO); 242 test_bit(R1BIO_Uptodate, &r1_bio->state) ? 0 : -EIO);
243 } 243 }
244 free_r1bio(r1_bio); 244 free_r1bio(r1_bio);
@@ -255,16 +255,13 @@ static inline void update_head_pos(int disk, r1bio_t *r1_bio)
255 r1_bio->sector + (r1_bio->sectors); 255 r1_bio->sector + (r1_bio->sectors);
256} 256}
257 257
258static int raid1_end_read_request(struct bio *bio, unsigned int bytes_done, int error) 258static void raid1_end_read_request(struct bio *bio, int error)
259{ 259{
260 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 260 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
261 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private); 261 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private);
262 int mirror; 262 int mirror;
263 conf_t *conf = mddev_to_conf(r1_bio->mddev); 263 conf_t *conf = mddev_to_conf(r1_bio->mddev);
264 264
265 if (bio->bi_size)
266 return 1;
267
268 mirror = r1_bio->read_disk; 265 mirror = r1_bio->read_disk;
269 /* 266 /*
270 * this branch is our 'one mirror IO has finished' event handler: 267 * this branch is our 'one mirror IO has finished' event handler:
@@ -301,10 +298,9 @@ static int raid1_end_read_request(struct bio *bio, unsigned int bytes_done, int
301 } 298 }
302 299
303 rdev_dec_pending(conf->mirrors[mirror].rdev, conf->mddev); 300 rdev_dec_pending(conf->mirrors[mirror].rdev, conf->mddev);
304 return 0;
305} 301}
306 302
307static int raid1_end_write_request(struct bio *bio, unsigned int bytes_done, int error) 303static void raid1_end_write_request(struct bio *bio, int error)
308{ 304{
309 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 305 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
310 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private); 306 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private);
@@ -312,8 +308,6 @@ static int raid1_end_write_request(struct bio *bio, unsigned int bytes_done, int
312 conf_t *conf = mddev_to_conf(r1_bio->mddev); 308 conf_t *conf = mddev_to_conf(r1_bio->mddev);
313 struct bio *to_put = NULL; 309 struct bio *to_put = NULL;
314 310
315 if (bio->bi_size)
316 return 1;
317 311
318 for (mirror = 0; mirror < conf->raid_disks; mirror++) 312 for (mirror = 0; mirror < conf->raid_disks; mirror++)
319 if (r1_bio->bios[mirror] == bio) 313 if (r1_bio->bios[mirror] == bio)
@@ -366,7 +360,7 @@ static int raid1_end_write_request(struct bio *bio, unsigned int bytes_done, int
366 (unsigned long long) mbio->bi_sector, 360 (unsigned long long) mbio->bi_sector,
367 (unsigned long long) mbio->bi_sector + 361 (unsigned long long) mbio->bi_sector +
368 (mbio->bi_size >> 9) - 1); 362 (mbio->bi_size >> 9) - 1);
369 bio_endio(mbio, mbio->bi_size, 0); 363 bio_endio(mbio, 0);
370 } 364 }
371 } 365 }
372 } 366 }
@@ -400,8 +394,6 @@ static int raid1_end_write_request(struct bio *bio, unsigned int bytes_done, int
400 394
401 if (to_put) 395 if (to_put)
402 bio_put(to_put); 396 bio_put(to_put);
403
404 return 0;
405} 397}
406 398
407 399
@@ -796,7 +788,7 @@ static int make_request(struct request_queue *q, struct bio * bio)
796 if (unlikely(!mddev->barriers_work && bio_barrier(bio))) { 788 if (unlikely(!mddev->barriers_work && bio_barrier(bio))) {
797 if (rw == WRITE) 789 if (rw == WRITE)
798 md_write_end(mddev); 790 md_write_end(mddev);
799 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 791 bio_endio(bio, -EOPNOTSUPP);
800 return 0; 792 return 0;
801 } 793 }
802 794
@@ -1137,14 +1129,11 @@ abort:
1137} 1129}
1138 1130
1139 1131
1140static int end_sync_read(struct bio *bio, unsigned int bytes_done, int error) 1132static void end_sync_read(struct bio *bio, int error)
1141{ 1133{
1142 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private); 1134 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private);
1143 int i; 1135 int i;
1144 1136
1145 if (bio->bi_size)
1146 return 1;
1147
1148 for (i=r1_bio->mddev->raid_disks; i--; ) 1137 for (i=r1_bio->mddev->raid_disks; i--; )
1149 if (r1_bio->bios[i] == bio) 1138 if (r1_bio->bios[i] == bio)
1150 break; 1139 break;
@@ -1160,10 +1149,9 @@ static int end_sync_read(struct bio *bio, unsigned int bytes_done, int error)
1160 1149
1161 if (atomic_dec_and_test(&r1_bio->remaining)) 1150 if (atomic_dec_and_test(&r1_bio->remaining))
1162 reschedule_retry(r1_bio); 1151 reschedule_retry(r1_bio);
1163 return 0;
1164} 1152}
1165 1153
1166static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error) 1154static void end_sync_write(struct bio *bio, int error)
1167{ 1155{
1168 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 1156 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
1169 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private); 1157 r1bio_t * r1_bio = (r1bio_t *)(bio->bi_private);
@@ -1172,9 +1160,6 @@ static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error)
1172 int i; 1160 int i;
1173 int mirror=0; 1161 int mirror=0;
1174 1162
1175 if (bio->bi_size)
1176 return 1;
1177
1178 for (i = 0; i < conf->raid_disks; i++) 1163 for (i = 0; i < conf->raid_disks; i++)
1179 if (r1_bio->bios[i] == bio) { 1164 if (r1_bio->bios[i] == bio) {
1180 mirror = i; 1165 mirror = i;
@@ -1200,7 +1185,6 @@ static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error)
1200 md_done_sync(mddev, r1_bio->sectors, uptodate); 1185 md_done_sync(mddev, r1_bio->sectors, uptodate);
1201 put_buf(r1_bio); 1186 put_buf(r1_bio);
1202 } 1187 }
1203 return 0;
1204} 1188}
1205 1189
1206static void sync_request_write(mddev_t *mddev, r1bio_t *r1_bio) 1190static void sync_request_write(mddev_t *mddev, r1bio_t *r1_bio)
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 4e53792aa520..25a96c42bdb0 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -227,7 +227,7 @@ static void raid_end_bio_io(r10bio_t *r10_bio)
227{ 227{
228 struct bio *bio = r10_bio->master_bio; 228 struct bio *bio = r10_bio->master_bio;
229 229
230 bio_endio(bio, bio->bi_size, 230 bio_endio(bio,
231 test_bit(R10BIO_Uptodate, &r10_bio->state) ? 0 : -EIO); 231 test_bit(R10BIO_Uptodate, &r10_bio->state) ? 0 : -EIO);
232 free_r10bio(r10_bio); 232 free_r10bio(r10_bio);
233} 233}
@@ -243,15 +243,13 @@ static inline void update_head_pos(int slot, r10bio_t *r10_bio)
243 r10_bio->devs[slot].addr + (r10_bio->sectors); 243 r10_bio->devs[slot].addr + (r10_bio->sectors);
244} 244}
245 245
246static int raid10_end_read_request(struct bio *bio, unsigned int bytes_done, int error) 246static void raid10_end_read_request(struct bio *bio, int error)
247{ 247{
248 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 248 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
249 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private); 249 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private);
250 int slot, dev; 250 int slot, dev;
251 conf_t *conf = mddev_to_conf(r10_bio->mddev); 251 conf_t *conf = mddev_to_conf(r10_bio->mddev);
252 252
253 if (bio->bi_size)
254 return 1;
255 253
256 slot = r10_bio->read_slot; 254 slot = r10_bio->read_slot;
257 dev = r10_bio->devs[slot].devnum; 255 dev = r10_bio->devs[slot].devnum;
@@ -284,19 +282,15 @@ static int raid10_end_read_request(struct bio *bio, unsigned int bytes_done, int
284 } 282 }
285 283
286 rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); 284 rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev);
287 return 0;
288} 285}
289 286
290static int raid10_end_write_request(struct bio *bio, unsigned int bytes_done, int error) 287static void raid10_end_write_request(struct bio *bio, int error)
291{ 288{
292 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 289 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
293 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private); 290 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private);
294 int slot, dev; 291 int slot, dev;
295 conf_t *conf = mddev_to_conf(r10_bio->mddev); 292 conf_t *conf = mddev_to_conf(r10_bio->mddev);
296 293
297 if (bio->bi_size)
298 return 1;
299
300 for (slot = 0; slot < conf->copies; slot++) 294 for (slot = 0; slot < conf->copies; slot++)
301 if (r10_bio->devs[slot].bio == bio) 295 if (r10_bio->devs[slot].bio == bio)
302 break; 296 break;
@@ -339,7 +333,6 @@ static int raid10_end_write_request(struct bio *bio, unsigned int bytes_done, in
339 } 333 }
340 334
341 rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); 335 rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev);
342 return 0;
343} 336}
344 337
345 338
@@ -787,7 +780,7 @@ static int make_request(struct request_queue *q, struct bio * bio)
787 unsigned long flags; 780 unsigned long flags;
788 781
789 if (unlikely(bio_barrier(bio))) { 782 if (unlikely(bio_barrier(bio))) {
790 bio_endio(bio, bio->bi_size, -EOPNOTSUPP); 783 bio_endio(bio, -EOPNOTSUPP);
791 return 0; 784 return 0;
792 } 785 }
793 786
@@ -819,7 +812,7 @@ static int make_request(struct request_queue *q, struct bio * bio)
819 " or bigger than %dk %llu %d\n", chunk_sects/2, 812 " or bigger than %dk %llu %d\n", chunk_sects/2,
820 (unsigned long long)bio->bi_sector, bio->bi_size >> 10); 813 (unsigned long long)bio->bi_sector, bio->bi_size >> 10);
821 814
822 bio_io_error(bio, bio->bi_size); 815 bio_io_error(bio);
823 return 0; 816 return 0;
824 } 817 }
825 818
@@ -1155,15 +1148,12 @@ abort:
1155} 1148}
1156 1149
1157 1150
1158static int end_sync_read(struct bio *bio, unsigned int bytes_done, int error) 1151static void end_sync_read(struct bio *bio, int error)
1159{ 1152{
1160 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private); 1153 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private);
1161 conf_t *conf = mddev_to_conf(r10_bio->mddev); 1154 conf_t *conf = mddev_to_conf(r10_bio->mddev);
1162 int i,d; 1155 int i,d;
1163 1156
1164 if (bio->bi_size)
1165 return 1;
1166
1167 for (i=0; i<conf->copies; i++) 1157 for (i=0; i<conf->copies; i++)
1168 if (r10_bio->devs[i].bio == bio) 1158 if (r10_bio->devs[i].bio == bio)
1169 break; 1159 break;
@@ -1192,10 +1182,9 @@ static int end_sync_read(struct bio *bio, unsigned int bytes_done, int error)
1192 reschedule_retry(r10_bio); 1182 reschedule_retry(r10_bio);
1193 } 1183 }
1194 rdev_dec_pending(conf->mirrors[d].rdev, conf->mddev); 1184 rdev_dec_pending(conf->mirrors[d].rdev, conf->mddev);
1195 return 0;
1196} 1185}
1197 1186
1198static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error) 1187static void end_sync_write(struct bio *bio, int error)
1199{ 1188{
1200 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 1189 int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
1201 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private); 1190 r10bio_t * r10_bio = (r10bio_t *)(bio->bi_private);
@@ -1203,9 +1192,6 @@ static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error)
1203 conf_t *conf = mddev_to_conf(mddev); 1192 conf_t *conf = mddev_to_conf(mddev);
1204 int i,d; 1193 int i,d;
1205 1194
1206 if (bio->bi_size)
1207 return 1;
1208
1209 for (i = 0; i < conf->copies; i++) 1195 for (i = 0; i < conf->copies; i++)
1210 if (r10_bio->devs[i].bio == bio) 1196 if (r10_bio->devs[i].bio == bio)
1211 break; 1197 break;
@@ -1228,7 +1214,6 @@ static int end_sync_write(struct bio *bio, unsigned int bytes_done, int error)
1228 } 1214 }
1229 } 1215 }
1230 rdev_dec_pending(conf->mirrors[d].rdev, mddev); 1216 rdev_dec_pending(conf->mirrors[d].rdev, mddev);
1231 return 0;
1232} 1217}
1233 1218
1234/* 1219/*
@@ -1374,7 +1359,7 @@ static void recovery_request_write(mddev_t *mddev, r10bio_t *r10_bio)
1374 if (test_bit(R10BIO_Uptodate, &r10_bio->state)) 1359 if (test_bit(R10BIO_Uptodate, &r10_bio->state))
1375 generic_make_request(wbio); 1360 generic_make_request(wbio);
1376 else 1361 else
1377 bio_endio(wbio, wbio->bi_size, -EIO); 1362 bio_endio(wbio, -EIO);
1378} 1363}
1379 1364
1380 1365
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index f96dea975fa5..caaca9e178bc 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -108,12 +108,11 @@ static void return_io(struct bio *return_bi)
108{ 108{
109 struct bio *bi = return_bi; 109 struct bio *bi = return_bi;
110 while (bi) { 110 while (bi) {
111 int bytes = bi->bi_size;
112 111
113 return_bi = bi->bi_next; 112 return_bi = bi->bi_next;
114 bi->bi_next = NULL; 113 bi->bi_next = NULL;
115 bi->bi_size = 0; 114 bi->bi_size = 0;
116 bi->bi_end_io(bi, bytes, 115 bi->bi_end_io(bi,
117 test_bit(BIO_UPTODATE, &bi->bi_flags) 116 test_bit(BIO_UPTODATE, &bi->bi_flags)
118 ? 0 : -EIO); 117 ? 0 : -EIO);
119 bi = return_bi; 118 bi = return_bi;
@@ -382,10 +381,10 @@ static unsigned long get_stripe_work(struct stripe_head *sh)
382 return pending; 381 return pending;
383} 382}
384 383
385static int 384static void
386raid5_end_read_request(struct bio *bi, unsigned int bytes_done, int error); 385raid5_end_read_request(struct bio *bi, int error);
387static int 386static void
388raid5_end_write_request (struct bio *bi, unsigned int bytes_done, int error); 387raid5_end_write_request(struct bio *bi, int error);
389 388
390static void ops_run_io(struct stripe_head *sh) 389static void ops_run_io(struct stripe_head *sh)
391{ 390{
@@ -1110,8 +1109,7 @@ static void shrink_stripes(raid5_conf_t *conf)
1110 conf->slab_cache = NULL; 1109 conf->slab_cache = NULL;
1111} 1110}
1112 1111
1113static int raid5_end_read_request(struct bio * bi, unsigned int bytes_done, 1112static void raid5_end_read_request(struct bio * bi, int error)
1114 int error)
1115{ 1113{
1116 struct stripe_head *sh = bi->bi_private; 1114 struct stripe_head *sh = bi->bi_private;
1117 raid5_conf_t *conf = sh->raid_conf; 1115 raid5_conf_t *conf = sh->raid_conf;
@@ -1120,8 +1118,6 @@ static int raid5_end_read_request(struct bio * bi, unsigned int bytes_done,
1120 char b[BDEVNAME_SIZE]; 1118 char b[BDEVNAME_SIZE];
1121 mdk_rdev_t *rdev; 1119 mdk_rdev_t *rdev;
1122 1120
1123 if (bi->bi_size)
1124 return 1;
1125 1121
1126 for (i=0 ; i<disks; i++) 1122 for (i=0 ; i<disks; i++)
1127 if (bi == &sh->dev[i].req) 1123 if (bi == &sh->dev[i].req)
@@ -1132,7 +1128,7 @@ static int raid5_end_read_request(struct bio * bi, unsigned int bytes_done,
1132 uptodate); 1128 uptodate);
1133 if (i == disks) { 1129 if (i == disks) {
1134 BUG(); 1130 BUG();
1135 return 0; 1131 return;
1136 } 1132 }
1137 1133
1138 if (uptodate) { 1134 if (uptodate) {
@@ -1185,20 +1181,15 @@ static int raid5_end_read_request(struct bio * bi, unsigned int bytes_done,
1185 clear_bit(R5_LOCKED, &sh->dev[i].flags); 1181 clear_bit(R5_LOCKED, &sh->dev[i].flags);
1186 set_bit(STRIPE_HANDLE, &sh->state); 1182 set_bit(STRIPE_HANDLE, &sh->state);
1187 release_stripe(sh); 1183 release_stripe(sh);
1188 return 0;
1189} 1184}
1190 1185
1191static int raid5_end_write_request (struct bio *bi, unsigned int bytes_done, 1186static void raid5_end_write_request (struct bio *bi, int error)
1192 int error)
1193{ 1187{
1194 struct stripe_head *sh = bi->bi_private; 1188 struct stripe_head *sh = bi->bi_private;
1195 raid5_conf_t *conf = sh->raid_conf; 1189 raid5_conf_t *conf = sh->raid_conf;
1196 int disks = sh->disks, i; 1190 int disks = sh->disks, i;
1197 int uptodate = test_bit(BIO_UPTODATE, &bi->bi_flags); 1191 int uptodate = test_bit(BIO_UPTODATE, &bi->bi_flags);
1198 1192
1199 if (bi->bi_size)
1200 return 1;
1201
1202 for (i=0 ; i<disks; i++) 1193 for (i=0 ; i<disks; i++)
1203 if (bi == &sh->dev[i].req) 1194 if (bi == &sh->dev[i].req)
1204 break; 1195 break;
@@ -1208,7 +1199,7 @@ static int raid5_end_write_request (struct bio *bi, unsigned int bytes_done,
1208 uptodate); 1199 uptodate);
1209 if (i == disks) { 1200 if (i == disks) {
1210 BUG(); 1201 BUG();
1211 return 0; 1202 return;
1212 } 1203 }
1213 1204
1214 if (!uptodate) 1205 if (!uptodate)
@@ -1219,7 +1210,6 @@ static int raid5_end_write_request (struct bio *bi, unsigned int bytes_done,
1219 clear_bit(R5_LOCKED, &sh->dev[i].flags); 1210 clear_bit(R5_LOCKED, &sh->dev[i].flags);
1220 set_bit(STRIPE_HANDLE, &sh->state); 1211 set_bit(STRIPE_HANDLE, &sh->state);
1221 release_stripe(sh); 1212 release_stripe(sh);
1222 return 0;
1223} 1213}
1224 1214
1225 1215
@@ -3340,7 +3330,7 @@ static struct bio *remove_bio_from_retry(raid5_conf_t *conf)
3340 * first). 3330 * first).
3341 * If the read failed.. 3331 * If the read failed..
3342 */ 3332 */
3343static int raid5_align_endio(struct bio *bi, unsigned int bytes, int error) 3333static void raid5_align_endio(struct bio *bi, int error)
3344{ 3334{
3345 struct bio* raid_bi = bi->bi_private; 3335 struct bio* raid_bi = bi->bi_private;
3346 mddev_t *mddev; 3336 mddev_t *mddev;
@@ -3348,8 +3338,6 @@ static int raid5_align_endio(struct bio *bi, unsigned int bytes, int error)
3348 int uptodate = test_bit(BIO_UPTODATE, &bi->bi_flags); 3338 int uptodate = test_bit(BIO_UPTODATE, &bi->bi_flags);
3349 mdk_rdev_t *rdev; 3339 mdk_rdev_t *rdev;
3350 3340
3351 if (bi->bi_size)
3352 return 1;
3353 bio_put(bi); 3341 bio_put(bi);
3354 3342
3355 mddev = raid_bi->bi_bdev->bd_disk->queue->queuedata; 3343 mddev = raid_bi->bi_bdev->bd_disk->queue->queuedata;
@@ -3360,17 +3348,16 @@ static int raid5_align_endio(struct bio *bi, unsigned int bytes, int error)
3360 rdev_dec_pending(rdev, conf->mddev); 3348 rdev_dec_pending(rdev, conf->mddev);
3361 3349
3362 if (!error && uptodate) { 3350 if (!error && uptodate) {
3363 bio_endio(raid_bi, bytes, 0); 3351 bio_endio(raid_bi, 0);
3364 if (atomic_dec_and_test(&conf->active_aligned_reads)) 3352 if (atomic_dec_and_test(&conf->active_aligned_reads))
3365 wake_up(&conf->wait_for_stripe); 3353 wake_up(&conf->wait_for_stripe);
3366 return 0; 3354 return;
3367 } 3355 }
3368 3356
3369 3357
3370 pr_debug("raid5_align_endio : io error...handing IO for a retry\n"); 3358 pr_debug("raid5_align_endio : io error...handing IO for a retry\n");
3371 3359
3372 add_bio_to_retry(raid_bi, conf); 3360 add_bio_to_retry(raid_bi, conf);
3373 return 0;
3374} 3361}
3375 3362
3376static int bio_fits_rdev(struct bio *bi) 3363static int bio_fits_rdev(struct bio *bi)
@@ -3476,7 +3463,7 @@ static int make_request(struct request_queue *q, struct bio * bi)
3476 int remaining; 3463 int remaining;
3477 3464
3478 if (unlikely(bio_barrier(bi))) { 3465 if (unlikely(bio_barrier(bi))) {
3479 bio_endio(bi, bi->bi_size, -EOPNOTSUPP); 3466 bio_endio(bi, -EOPNOTSUPP);
3480 return 0; 3467 return 0;
3481 } 3468 }
3482 3469
@@ -3592,12 +3579,11 @@ static int make_request(struct request_queue *q, struct bio * bi)
3592 remaining = --bi->bi_phys_segments; 3579 remaining = --bi->bi_phys_segments;
3593 spin_unlock_irq(&conf->device_lock); 3580 spin_unlock_irq(&conf->device_lock);
3594 if (remaining == 0) { 3581 if (remaining == 0) {
3595 int bytes = bi->bi_size;
3596 3582
3597 if ( rw == WRITE ) 3583 if ( rw == WRITE )
3598 md_write_end(mddev); 3584 md_write_end(mddev);
3599 bi->bi_size = 0; 3585
3600 bi->bi_end_io(bi, bytes, 3586 bi->bi_end_io(bi,
3601 test_bit(BIO_UPTODATE, &bi->bi_flags) 3587 test_bit(BIO_UPTODATE, &bi->bi_flags)
3602 ? 0 : -EIO); 3588 ? 0 : -EIO);
3603 } 3589 }
@@ -3875,10 +3861,8 @@ static int retry_aligned_read(raid5_conf_t *conf, struct bio *raid_bio)
3875 remaining = --raid_bio->bi_phys_segments; 3861 remaining = --raid_bio->bi_phys_segments;
3876 spin_unlock_irq(&conf->device_lock); 3862 spin_unlock_irq(&conf->device_lock);
3877 if (remaining == 0) { 3863 if (remaining == 0) {
3878 int bytes = raid_bio->bi_size;
3879 3864
3880 raid_bio->bi_size = 0; 3865 raid_bio->bi_end_io(raid_bio,
3881 raid_bio->bi_end_io(raid_bio, bytes,
3882 test_bit(BIO_UPTODATE, &raid_bio->bi_flags) 3866 test_bit(BIO_UPTODATE, &raid_bio->bi_flags)
3883 ? 0 : -EIO); 3867 ? 0 : -EIO);
3884 } 3868 }
diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig
index d9d033e07e19..dd9bd4310c84 100644
--- a/drivers/media/Kconfig
+++ b/drivers/media/Kconfig
@@ -69,13 +69,79 @@ source "drivers/media/common/Kconfig"
69config VIDEO_TUNER 69config VIDEO_TUNER
70 tristate 70 tristate
71 depends on I2C 71 depends on I2C
72 select TUNER_MT20XX if !VIDEO_TUNER_CUSTOMIZE
73 select TUNER_TDA8290 if !VIDEO_TUNER_CUSTOMIZE
74 select TUNER_TEA5761 if !VIDEO_TUNER_CUSTOMIZE
75 select TUNER_TEA5767 if !VIDEO_TUNER_CUSTOMIZE
76 select TUNER_SIMPLE if !VIDEO_TUNER_CUSTOMIZE
77
78menuconfig VIDEO_TUNER_CUSTOMIZE
79 bool "Customize analog tuner modules to build"
80 depends on VIDEO_TUNER
81 help
82 This allows the user to deselect tuner drivers unnecessary
83 for their hardware from the build. Use this option with care
84 as deselecting tuner drivers which are in fact necessary will
85 result in V4L devices which cannot be tuned due to lack of
86 driver support
87
88 If unsure say N.
89
90if VIDEO_TUNER_CUSTOMIZE
91
92config TUNER_MT20XX
93 tristate "Microtune 2032 / 2050 tuners"
94 depends on I2C
95 default m if VIDEO_TUNER_CUSTOMIZE
96 help
97 Say Y here to include support for the MT2032 / MT2050 tuner.
98
99config TUNER_TDA8290
100 tristate "TDA 8290+8275(a) tuner combo"
101 depends on I2C
102 default m if VIDEO_TUNER_CUSTOMIZE
103 help
104 Say Y here to include support for Philips TDA8290+8275(a) tuner.
105
106config TUNER_TEA5761
107 tristate "TEA 5761 radio tuner (EXPERIMENTAL)"
108 depends on I2C && EXPERIMENTAL
109 default m if VIDEO_TUNER_CUSTOMIZE
110 help
111 Say Y here to include support for the Philips TEA5761 radio tuner.
112
113config TUNER_TEA5767
114 tristate "TEA 5767 radio tuner"
115 depends on I2C
116 default m if VIDEO_TUNER_CUSTOMIZE
117 help
118 Say Y here to include support for the Philips TEA5767 radio tuner.
119
120config TUNER_SIMPLE
121 tristate "Simple tuner support"
122 depends on I2C
123 default m if VIDEO_TUNER_CUSTOMIZE
124 help
125 Say Y here to include support for various simple tuners.
72 126
73config VIDEO_BUF 127endif # VIDEO_TUNER_CUSTOMIZE
128
129config VIDEOBUF_GEN
130 tristate
131
132config VIDEOBUF_DMA_SG
74 depends on PCI 133 depends on PCI
134 select VIDEOBUF_GEN
135 tristate
136
137config VIDEOBUF_VMALLOC
138 select VIDEOBUF_GEN
75 tristate 139 tristate
76 140
77config VIDEO_BUF_DVB 141config VIDEOBUF_DVB
78 tristate 142 tristate
143 select VIDEOBUF_GEN
144 select VIDEOBUF_DMA_SG
79 145
80config VIDEO_BTCX 146config VIDEO_BTCX
81 tristate 147 tristate
diff --git a/drivers/media/common/Kconfig b/drivers/media/common/Kconfig
index 5c63c8e24ee7..c5092ef1082f 100644
--- a/drivers/media/common/Kconfig
+++ b/drivers/media/common/Kconfig
@@ -5,5 +5,5 @@ config VIDEO_SAA7146
5config VIDEO_SAA7146_VV 5config VIDEO_SAA7146_VV
6 tristate 6 tristate
7 depends on VIDEO_DEV 7 depends on VIDEO_DEV
8 select VIDEO_BUF 8 select VIDEOBUF_DMA_SG
9 select VIDEO_SAA7146 9 select VIDEO_SAA7146
diff --git a/drivers/media/common/ir-functions.c b/drivers/media/common/ir-functions.c
index a3292e955aaa..e7c3ab951a44 100644
--- a/drivers/media/common/ir-functions.c
+++ b/drivers/media/common/ir-functions.c
@@ -21,7 +21,6 @@
21 */ 21 */
22 22
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/string.h> 24#include <linux/string.h>
26#include <linux/jiffies.h> 25#include <linux/jiffies.h>
27#include <media/ir-common.h> 26#include <media/ir-common.h>
diff --git a/drivers/media/common/ir-keymaps.c b/drivers/media/common/ir-keymaps.c
index cbd1184b5219..aefcf28da1ca 100644
--- a/drivers/media/common/ir-keymaps.c
+++ b/drivers/media/common/ir-keymaps.c
@@ -20,7 +20,6 @@
20 20
21 */ 21 */
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/moduleparam.h>
24 23
25#include <linux/input.h> 24#include <linux/input.h>
26#include <media/ir-common.h> 25#include <media/ir-common.h>
@@ -1783,3 +1782,64 @@ IR_KEYTAB_TYPE ir_codes_tt_1500[IR_KEYTAB_SIZE] = {
1783}; 1782};
1784 1783
1785EXPORT_SYMBOL_GPL(ir_codes_tt_1500); 1784EXPORT_SYMBOL_GPL(ir_codes_tt_1500);
1785
1786/* DViCO FUSION HDTV MCE remote */
1787IR_KEYTAB_TYPE ir_codes_fusionhdtv_mce[IR_KEYTAB_SIZE] = {
1788
1789 [ 0x0b ] = KEY_1,
1790 [ 0x17 ] = KEY_2,
1791 [ 0x1b ] = KEY_3,
1792 [ 0x07 ] = KEY_4,
1793 [ 0x50 ] = KEY_5,
1794 [ 0x54 ] = KEY_6,
1795 [ 0x48 ] = KEY_7,
1796 [ 0x4c ] = KEY_8,
1797 [ 0x58 ] = KEY_9,
1798 [ 0x03 ] = KEY_0,
1799
1800 [ 0x5e ] = KEY_OK,
1801 [ 0x51 ] = KEY_UP,
1802 [ 0x53 ] = KEY_DOWN,
1803 [ 0x5b ] = KEY_LEFT,
1804 [ 0x5f ] = KEY_RIGHT,
1805
1806 [ 0x02 ] = KEY_TV, /* Labeled DTV on remote */
1807 [ 0x0e ] = KEY_MP3,
1808 [ 0x1a ] = KEY_DVD,
1809 [ 0x1e ] = KEY_FAVORITES, /* Labeled CPF on remote */
1810 [ 0x16 ] = KEY_SETUP,
1811 [ 0x46 ] = KEY_POWER2, /* TV On/Off button on remote */
1812 [ 0x0a ] = KEY_EPG, /* Labeled Guide on remote */
1813
1814 [ 0x49 ] = KEY_BACK,
1815 [ 0x59 ] = KEY_INFO, /* Labeled MORE on remote */
1816 [ 0x4d ] = KEY_MENU, /* Labeled DVDMENU on remote */
1817 [ 0x55 ] = KEY_CYCLEWINDOWS, /* Labeled ALT-TAB on remote */
1818
1819 [ 0x0f ] = KEY_PREVIOUSSONG, /* Labeled |<< REPLAY on remote */
1820 [ 0x12 ] = KEY_NEXTSONG, /* Labeled >>| SKIP on remote */
1821 [ 0x42 ] = KEY_ENTER, /* Labeled START with a green
1822 * MS windows logo on remote */
1823
1824 [ 0x15 ] = KEY_VOLUMEUP,
1825 [ 0x05 ] = KEY_VOLUMEDOWN,
1826 [ 0x11 ] = KEY_CHANNELUP,
1827 [ 0x09 ] = KEY_CHANNELDOWN,
1828
1829 [ 0x52 ] = KEY_CAMERA,
1830 [ 0x5a ] = KEY_TUNER,
1831 [ 0x19 ] = KEY_OPEN,
1832
1833 [ 0x13 ] = KEY_MODE, /* 4:3 16:9 select */
1834 [ 0x1f ] = KEY_ZOOM,
1835
1836 [ 0x43 ] = KEY_REWIND,
1837 [ 0x47 ] = KEY_PLAYPAUSE,
1838 [ 0x4f ] = KEY_FASTFORWARD,
1839 [ 0x57 ] = KEY_MUTE,
1840 [ 0x0d ] = KEY_STOP,
1841 [ 0x01 ] = KEY_RECORD,
1842 [ 0x4e ] = KEY_POWER,
1843};
1844
1845EXPORT_SYMBOL_GPL(ir_codes_fusionhdtv_mce);
diff --git a/drivers/media/common/saa7146_core.c b/drivers/media/common/saa7146_core.c
index ba6701e97671..365a22118a09 100644
--- a/drivers/media/common/saa7146_core.c
+++ b/drivers/media/common/saa7146_core.c
@@ -100,7 +100,7 @@ int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop)
100 * general helper functions 100 * general helper functions
101 ****************************************************************************/ 101 ****************************************************************************/
102 102
103/* this is videobuf_vmalloc_to_sg() from video-buf.c 103/* this is videobuf_vmalloc_to_sg() from videobuf-dma-sg.c
104 make sure virt has been allocated with vmalloc_32(), otherwise the BUG() 104 make sure virt has been allocated with vmalloc_32(), otherwise the BUG()
105 may be triggered on highmem machines */ 105 may be triggered on highmem machines */
106static struct scatterlist* vmalloc_to_sg(unsigned char *virt, int nr_pages) 106static struct scatterlist* vmalloc_to_sg(unsigned char *virt, int nr_pages)
@@ -248,10 +248,11 @@ int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt
248static irqreturn_t interrupt_hw(int irq, void *dev_id) 248static irqreturn_t interrupt_hw(int irq, void *dev_id)
249{ 249{
250 struct saa7146_dev *dev = dev_id; 250 struct saa7146_dev *dev = dev_id;
251 u32 isr = 0; 251 u32 isr;
252 u32 ack_isr;
252 253
253 /* read out the interrupt status register */ 254 /* read out the interrupt status register */
254 isr = saa7146_read(dev, ISR); 255 ack_isr = isr = saa7146_read(dev, ISR);
255 256
256 /* is this our interrupt? */ 257 /* is this our interrupt? */
257 if ( 0 == isr ) { 258 if ( 0 == isr ) {
@@ -259,8 +260,6 @@ static irqreturn_t interrupt_hw(int irq, void *dev_id)
259 return IRQ_NONE; 260 return IRQ_NONE;
260 } 261 }
261 262
262 saa7146_write(dev, ISR, isr);
263
264 if( 0 != (dev->ext)) { 263 if( 0 != (dev->ext)) {
265 if( 0 != (dev->ext->irq_mask & isr )) { 264 if( 0 != (dev->ext->irq_mask & isr )) {
266 if( 0 != dev->ext->irq_func ) { 265 if( 0 != dev->ext->irq_func ) {
@@ -283,21 +282,16 @@ static irqreturn_t interrupt_hw(int irq, void *dev_id)
283 isr &= ~MASK_28; 282 isr &= ~MASK_28;
284 } 283 }
285 if (0 != (isr & (MASK_16|MASK_17))) { 284 if (0 != (isr & (MASK_16|MASK_17))) {
286 u32 status = saa7146_read(dev, I2C_STATUS); 285 SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
287 if( (0x3 == (status & 0x3)) || (0 == (status & 0x1)) ) { 286 /* only wake up if we expect something */
288 SAA7146_IER_DISABLE(dev, MASK_16|MASK_17); 287 if (0 != dev->i2c_op) {
289 /* only wake up if we expect something */ 288 dev->i2c_op = 0;
290 if( 0 != dev->i2c_op ) { 289 wake_up(&dev->i2c_wq);
291 u32 psr = (saa7146_read(dev, PSR) >> 16) & 0x2;
292 u32 ssr = (saa7146_read(dev, SSR) >> 17) & 0x1f;
293 DEB_I2C(("irq: i2c, status: 0x%08x, psr:0x%02x, ssr:0x%02x).\n",status,psr,ssr));
294 dev->i2c_op = 0;
295 wake_up(&dev->i2c_wq);
296 } else {
297 DEB_I2C(("unexpected irq: i2c, status: 0x%08x, isr %#x\n",status, isr));
298 }
299 } else { 290 } else {
300 DEB_I2C(("unhandled irq: i2c, status: 0x%08x, isr %#x\n",status, isr)); 291 u32 psr = saa7146_read(dev, PSR);
292 u32 ssr = saa7146_read(dev, SSR);
293 printk(KERN_WARNING "%s: unexpected i2c irq: isr %08x psr %08x ssr %08x\n",
294 dev->name, isr, psr, ssr);
301 } 295 }
302 isr &= ~(MASK_16|MASK_17); 296 isr &= ~(MASK_16|MASK_17);
303 } 297 }
@@ -306,6 +300,7 @@ static irqreturn_t interrupt_hw(int irq, void *dev_id)
306 ERR(("disabling interrupt source(s)!\n")); 300 ERR(("disabling interrupt source(s)!\n"));
307 SAA7146_IER_DISABLE(dev,isr); 301 SAA7146_IER_DISABLE(dev,isr);
308 } 302 }
303 saa7146_write(dev, ISR, ack_isr);
309 return IRQ_HANDLED; 304 return IRQ_HANDLED;
310} 305}
311 306
@@ -548,7 +543,6 @@ EXPORT_SYMBOL_GPL(saa7146_wait_for_debi_done);
548 543
549EXPORT_SYMBOL_GPL(saa7146_setgpio); 544EXPORT_SYMBOL_GPL(saa7146_setgpio);
550 545
551EXPORT_SYMBOL_GPL(saa7146_i2c_transfer);
552EXPORT_SYMBOL_GPL(saa7146_i2c_adapter_prepare); 546EXPORT_SYMBOL_GPL(saa7146_i2c_adapter_prepare);
553 547
554EXPORT_SYMBOL_GPL(saa7146_debug); 548EXPORT_SYMBOL_GPL(saa7146_debug);
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c
index b4770aecc01d..67d1b1b1b254 100644
--- a/drivers/media/common/saa7146_fops.c
+++ b/drivers/media/common/saa7146_fops.c
@@ -53,13 +53,14 @@ void saa7146_res_free(struct saa7146_fh *fh, unsigned int bits)
53void saa7146_dma_free(struct saa7146_dev *dev,struct videobuf_queue *q, 53void saa7146_dma_free(struct saa7146_dev *dev,struct videobuf_queue *q,
54 struct saa7146_buf *buf) 54 struct saa7146_buf *buf)
55{ 55{
56 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
56 DEB_EE(("dev:%p, buf:%p\n",dev,buf)); 57 DEB_EE(("dev:%p, buf:%p\n",dev,buf));
57 58
58 BUG_ON(in_interrupt()); 59 BUG_ON(in_interrupt());
59 60
60 videobuf_waiton(&buf->vb,0,0); 61 videobuf_waiton(&buf->vb,0,0);
61 videobuf_dma_unmap(q, &buf->vb.dma); 62 videobuf_dma_unmap(q, dma);
62 videobuf_dma_free(&buf->vb.dma); 63 videobuf_dma_free(dma);
63 buf->vb.state = STATE_NEEDS_INIT; 64 buf->vb.state = STATE_NEEDS_INIT;
64} 65}
65 66
diff --git a/drivers/media/common/saa7146_i2c.c b/drivers/media/common/saa7146_i2c.c
index 8c85efc26527..7e7689afae62 100644
--- a/drivers/media/common/saa7146_i2c.c
+++ b/drivers/media/common/saa7146_i2c.c
@@ -202,7 +202,8 @@ static int saa7146_i2c_writeout(struct saa7146_dev *dev, u32* dword, int short_d
202 /* a signal arrived */ 202 /* a signal arrived */
203 return -ERESTARTSYS; 203 return -ERESTARTSYS;
204 204
205 printk(KERN_WARNING "saa7146_i2c_writeout: timed out waiting for end of xfer\n"); 205 printk(KERN_WARNING "%s %s [irq]: timed out waiting for end of xfer\n",
206 dev->name, __FUNCTION__);
206 return -EIO; 207 return -EIO;
207 } 208 }
208 status = saa7146_read(dev, I2C_STATUS); 209 status = saa7146_read(dev, I2C_STATUS);
@@ -219,7 +220,8 @@ static int saa7146_i2c_writeout(struct saa7146_dev *dev, u32* dword, int short_d
219 break; 220 break;
220 } 221 }
221 if (time_after(jiffies,timeout)) { 222 if (time_after(jiffies,timeout)) {
222 printk(KERN_WARNING "saa7146_i2c_writeout: timed out waiting for MC2\n"); 223 printk(KERN_WARNING "%s %s: timed out waiting for MC2\n",
224 dev->name, __FUNCTION__);
223 return -EIO; 225 return -EIO;
224 } 226 }
225 } 227 }
@@ -235,7 +237,8 @@ static int saa7146_i2c_writeout(struct saa7146_dev *dev, u32* dword, int short_d
235 /* this is normal when probing the bus 237 /* this is normal when probing the bus
236 * (no answer from nonexisistant device...) 238 * (no answer from nonexisistant device...)
237 */ 239 */
238 DEB_I2C(("saa7146_i2c_writeout: timed out waiting for end of xfer\n")); 240 printk(KERN_WARNING "%s %s [poll]: timed out waiting for end of xfer\n",
241 dev->name, __FUNCTION__);
239 return -EIO; 242 return -EIO;
240 } 243 }
241 if (++trial < 50 && short_delay) 244 if (++trial < 50 && short_delay)
@@ -246,8 +249,16 @@ static int saa7146_i2c_writeout(struct saa7146_dev *dev, u32* dword, int short_d
246 } 249 }
247 250
248 /* give a detailed status report */ 251 /* give a detailed status report */
249 if ( 0 != (status & SAA7146_I2C_ERR)) { 252 if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR |
250 253 SAA7146_I2C_DTERR | SAA7146_I2C_DRERR |
254 SAA7146_I2C_AL | SAA7146_I2C_ERR |
255 SAA7146_I2C_BUSY)) ) {
256
257 if ( 0 == (status & SAA7146_I2C_ERR) ||
258 0 == (status & SAA7146_I2C_BUSY) ) {
259 /* it may take some time until ERR goes high - ignore */
260 DEB_I2C(("unexpected i2c status %04x\n", status));
261 }
251 if( 0 != (status & SAA7146_I2C_SPERR) ) { 262 if( 0 != (status & SAA7146_I2C_SPERR) ) {
252 DEB_I2C(("error due to invalid start/stop condition.\n")); 263 DEB_I2C(("error due to invalid start/stop condition.\n"));
253 } 264 }
@@ -277,7 +288,7 @@ static int saa7146_i2c_writeout(struct saa7146_dev *dev, u32* dword, int short_d
277 return 0; 288 return 0;
278} 289}
279 290
280int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries) 291static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries)
281{ 292{
282 int i = 0, count = 0; 293 int i = 0, count = 0;
283 u32* buffer = dev->d_i2c.cpu_addr; 294 u32* buffer = dev->d_i2c.cpu_addr;
diff --git a/drivers/media/common/saa7146_vbi.c b/drivers/media/common/saa7146_vbi.c
index 063608462ebe..6103484e4442 100644
--- a/drivers/media/common/saa7146_vbi.c
+++ b/drivers/media/common/saa7146_vbi.c
@@ -165,7 +165,7 @@ static void saa7146_set_vbi_capture(struct saa7146_dev *dev, struct saa7146_buf
165 /* we don't wait here for the first field anymore. this is different from the video 165 /* we don't wait here for the first field anymore. this is different from the video
166 capture and might cause that the first buffer is only half filled (with only 166 capture and might cause that the first buffer is only half filled (with only
167 one field). but since this is some sort of streaming data, this is not that negative. 167 one field). but since this is some sort of streaming data, this is not that negative.
168 but by doing this, we can use the whole engine from video-buf.c... */ 168 but by doing this, we can use the whole engine from videobuf-dma-sg.c... */
169 169
170/* 170/*
171 WRITE_RPS1(CMD_PAUSE | CMD_OAN | CMD_SIG1 | e_wait); 171 WRITE_RPS1(CMD_PAUSE | CMD_OAN | CMD_SIG1 | e_wait);
@@ -239,6 +239,8 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,e
239 saa7146_dma_free(dev,q,buf); 239 saa7146_dma_free(dev,q,buf);
240 240
241 if (STATE_NEEDS_INIT == buf->vb.state) { 241 if (STATE_NEEDS_INIT == buf->vb.state) {
242 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
243
242 buf->vb.width = llength; 244 buf->vb.width = llength;
243 buf->vb.height = lines; 245 buf->vb.height = lines;
244 buf->vb.size = size; 246 buf->vb.size = size;
@@ -250,7 +252,8 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,e
250 err = videobuf_iolock(q,&buf->vb, NULL); 252 err = videobuf_iolock(q,&buf->vb, NULL);
251 if (err) 253 if (err)
252 goto oops; 254 goto oops;
253 err = saa7146_pgtable_build_single(dev->pci, &buf->pt[2], buf->vb.dma.sglist, buf->vb.dma.sglen); 255 err = saa7146_pgtable_build_single(dev->pci, &buf->pt[2],
256 dma->sglist, dma->sglen);
254 if (0 != err) 257 if (0 != err)
255 return err; 258 return err;
256 } 259 }
@@ -404,7 +407,7 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)
404 fh->vbi_fmt.start[1] = 312; 407 fh->vbi_fmt.start[1] = 312;
405 fh->vbi_fmt.count[1] = 16; 408 fh->vbi_fmt.count[1] = 16;
406 409
407 videobuf_queue_init(&fh->vbi_q, &vbi_qops, 410 videobuf_queue_pci_init(&fh->vbi_q, &vbi_qops,
408 dev->pci, &dev->slock, 411 dev->pci, &dev->slock,
409 V4L2_BUF_TYPE_VBI_CAPTURE, 412 V4L2_BUF_TYPE_VBI_CAPTURE,
410 V4L2_FIELD_SEQ_TB, // FIXME: does this really work? 413 V4L2_FIELD_SEQ_TB, // FIXME: does this really work?
diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
index 664280c78ff2..f245a3b2ef47 100644
--- a/drivers/media/common/saa7146_video.c
+++ b/drivers/media/common/saa7146_video.c
@@ -594,8 +594,9 @@ static int set_control(struct saa7146_fh *fh, struct v4l2_control *c)
594static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *buf) 594static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *buf)
595{ 595{
596 struct pci_dev *pci = dev->pci; 596 struct pci_dev *pci = dev->pci;
597 struct scatterlist *list = buf->vb.dma.sglist; 597 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
598 int length = buf->vb.dma.sglen; 598 struct scatterlist *list = dma->sglist;
599 int length = dma->sglen;
599 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat); 600 struct saa7146_format *sfmt = format_by_fourcc(dev,buf->fmt->pixelformat);
600 601
601 DEB_EE(("dev:%p, buf:%p, sg_len:%d\n",dev,buf,length)); 602 DEB_EE(("dev:%p, buf:%p, sg_len:%d\n",dev,buf,length));
@@ -655,7 +656,7 @@ static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *bu
655 656
656 /* if we have a user buffer, the first page may not be 657 /* if we have a user buffer, the first page may not be
657 aligned to a page boundary. */ 658 aligned to a page boundary. */
658 pt1->offset = buf->vb.dma.sglist->offset; 659 pt1->offset = list->offset;
659 pt2->offset = pt1->offset+o1; 660 pt2->offset = pt1->offset+o1;
660 pt3->offset = pt1->offset+o2; 661 pt3->offset = pt1->offset+o2;
661 662
@@ -1211,6 +1212,8 @@ int saa7146_video_do_ioctl(struct inode *inode, struct file *file, unsigned int
1211 mutex_unlock(&q->lock); 1212 mutex_unlock(&q->lock);
1212 return err; 1213 return err;
1213 } 1214 }
1215
1216 gbuffers = err;
1214 memset(mbuf,0,sizeof(*mbuf)); 1217 memset(mbuf,0,sizeof(*mbuf));
1215 mbuf->frames = gbuffers; 1218 mbuf->frames = gbuffers;
1216 mbuf->size = gbuffers * gbufsize; 1219 mbuf->size = gbuffers * gbufsize;
@@ -1411,7 +1414,7 @@ static int video_open(struct saa7146_dev *dev, struct file *file)
1411 sfmt = format_by_fourcc(dev,fh->video_fmt.pixelformat); 1414 sfmt = format_by_fourcc(dev,fh->video_fmt.pixelformat);
1412 fh->video_fmt.sizeimage = (fh->video_fmt.width * fh->video_fmt.height * sfmt->depth)/8; 1415 fh->video_fmt.sizeimage = (fh->video_fmt.width * fh->video_fmt.height * sfmt->depth)/8;
1413 1416
1414 videobuf_queue_init(&fh->video_q, &video_qops, 1417 videobuf_queue_pci_init(&fh->video_q, &video_qops,
1415 dev->pci, &dev->slock, 1418 dev->pci, &dev->slock,
1416 V4L2_BUF_TYPE_VIDEO_CAPTURE, 1419 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1417 V4L2_FIELD_INTERLACED, 1420 V4L2_FIELD_INTERLACED,
diff --git a/drivers/media/dvb/bt8xx/bt878.c b/drivers/media/dvb/bt8xx/bt878.c
index df72b4b8ee10..eca602d9b3de 100644
--- a/drivers/media/dvb/bt8xx/bt878.c
+++ b/drivers/media/dvb/bt8xx/bt878.c
@@ -28,7 +28,6 @@
28 */ 28 */
29 29
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/pci.h> 32#include <linux/pci.h>
34#include <asm/io.h> 33#include <asm/io.h>
diff --git a/drivers/media/dvb/bt8xx/bt878.h b/drivers/media/dvb/bt8xx/bt878.h
index f685bc129609..d593bc145628 100644
--- a/drivers/media/dvb/bt8xx/bt878.h
+++ b/drivers/media/dvb/bt8xx/bt878.h
@@ -149,11 +149,10 @@ void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
149void bt878_stop(struct bt878 *bt); 149void bt878_stop(struct bt878 *bt);
150 150
151#if defined(__powerpc__) /* big-endian */ 151#if defined(__powerpc__) /* big-endian */
152extern __inline__ void io_st_le32(volatile unsigned __iomem *addr, unsigned val) 152static inline void io_st_le32(volatile unsigned __iomem *addr, unsigned val)
153{ 153{
154 __asm__ __volatile__("stwbrx %1,0,%2":"=m"(*addr):"r"(val), 154 st_le32(addr, val);
155 "r"(addr)); 155 eieio();
156 __asm__ __volatile__("eieio":::"memory");
157} 156}
158 157
159#define bmtwrite(dat,adr) io_st_le32((adr),(dat)) 158#define bmtwrite(dat,adr) io_st_le32((adr),(dat))
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
index 67613eb6fa3d..dedd30a8356b 100644
--- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c
+++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c
@@ -21,7 +21,6 @@
21 21
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/kernel.h> 25#include <linux/kernel.h>
27#include <linux/device.h> 26#include <linux/device.h>
diff --git a/drivers/media/dvb/cinergyT2/cinergyT2.c b/drivers/media/dvb/cinergyT2/cinergyT2.c
index 28929b618e20..5a12b5679556 100644
--- a/drivers/media/dvb/cinergyT2/cinergyT2.c
+++ b/drivers/media/dvb/cinergyT2/cinergyT2.c
@@ -548,19 +548,19 @@ static unsigned int cinergyt2_poll (struct file *file, struct poll_table_struct
548{ 548{
549 struct dvb_device *dvbdev = file->private_data; 549 struct dvb_device *dvbdev = file->private_data;
550 struct cinergyt2 *cinergyt2 = dvbdev->priv; 550 struct cinergyt2 *cinergyt2 = dvbdev->priv;
551 unsigned int mask = 0; 551 unsigned int mask = 0;
552 552
553 if (cinergyt2->disconnect_pending || mutex_lock_interruptible(&cinergyt2->sem)) 553 if (cinergyt2->disconnect_pending || mutex_lock_interruptible(&cinergyt2->sem))
554 return -ERESTARTSYS; 554 return -ERESTARTSYS;
555 555
556 poll_wait(file, &cinergyt2->poll_wq, wait); 556 poll_wait(file, &cinergyt2->poll_wq, wait);
557 557
558 if (cinergyt2->pending_fe_events != 0) 558 if (cinergyt2->pending_fe_events != 0)
559 mask |= (POLLIN | POLLRDNORM | POLLPRI); 559 mask |= (POLLIN | POLLRDNORM | POLLPRI);
560 560
561 mutex_unlock(&cinergyt2->sem); 561 mutex_unlock(&cinergyt2->sem);
562 562
563 return mask; 563 return mask;
564} 564}
565 565
566 566
@@ -1008,6 +1008,8 @@ static int cinergyt2_suspend (struct usb_interface *intf, pm_message_t state)
1008 cinergyt2_sleep(cinergyt2, 1); 1008 cinergyt2_sleep(cinergyt2, 1);
1009 mutex_unlock(&cinergyt2->sem); 1009 mutex_unlock(&cinergyt2->sem);
1010 1010
1011 mutex_unlock(&cinergyt2->wq_sem);
1012
1011 return 0; 1013 return 0;
1012} 1014}
1013 1015
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index 5394de2e4ce0..f94bc31e3b33 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -24,7 +24,6 @@
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/vmalloc.h> 25#include <linux/vmalloc.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/poll.h> 27#include <linux/poll.h>
29#include <linux/ioctl.h> 28#include <linux/ioctl.h>
30#include <linux/wait.h> 29#include <linux/wait.h>
diff --git a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
index 4fadddb264d6..084a508a03da 100644
--- a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
+++ b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
@@ -32,11 +32,11 @@
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/list.h> 33#include <linux/list.h>
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/vmalloc.h> 35#include <linux/vmalloc.h>
37#include <linux/delay.h> 36#include <linux/delay.h>
38#include <linux/spinlock.h> 37#include <linux/spinlock.h>
39#include <linux/sched.h> 38#include <linux/sched.h>
39#include <linux/kthread.h>
40 40
41#include "dvb_ca_en50221.h" 41#include "dvb_ca_en50221.h"
42#include "dvb_ringbuffer.h" 42#include "dvb_ringbuffer.h"
@@ -140,13 +140,7 @@ struct dvb_ca_private {
140 wait_queue_head_t wait_queue; 140 wait_queue_head_t wait_queue;
141 141
142 /* PID of the monitoring thread */ 142 /* PID of the monitoring thread */
143 pid_t thread_pid; 143 struct task_struct *thread;
144
145 /* Wait queue used when shutting thread down */
146 wait_queue_head_t thread_queue;
147
148 /* Flag indicating when thread should exit */
149 unsigned int exit:1;
150 144
151 /* Flag indicating if the CA device is open */ 145 /* Flag indicating if the CA device is open */
152 unsigned int open:1; 146 unsigned int open:1;
@@ -902,28 +896,10 @@ static void dvb_ca_en50221_thread_wakeup(struct dvb_ca_private *ca)
902 896
903 ca->wakeup = 1; 897 ca->wakeup = 1;
904 mb(); 898 mb();
905 wake_up_interruptible(&ca->thread_queue); 899 wake_up_process(ca->thread);
906} 900}
907 901
908/** 902/**
909 * Used by the CA thread to determine if an early wakeup is necessary
910 *
911 * @param ca CA instance.
912 */
913static int dvb_ca_en50221_thread_should_wakeup(struct dvb_ca_private *ca)
914{
915 if (ca->wakeup) {
916 ca->wakeup = 0;
917 return 1;
918 }
919 if (ca->exit)
920 return 1;
921
922 return 0;
923}
924
925
926/**
927 * Update the delay used by the thread. 903 * Update the delay used by the thread.
928 * 904 *
929 * @param ca CA instance. 905 * @param ca CA instance.
@@ -982,7 +958,6 @@ static void dvb_ca_en50221_thread_update_delay(struct dvb_ca_private *ca)
982static int dvb_ca_en50221_thread(void *data) 958static int dvb_ca_en50221_thread(void *data)
983{ 959{
984 struct dvb_ca_private *ca = data; 960 struct dvb_ca_private *ca = data;
985 char name[15];
986 int slot; 961 int slot;
987 int flags; 962 int flags;
988 int status; 963 int status;
@@ -991,28 +966,17 @@ static int dvb_ca_en50221_thread(void *data)
991 966
992 dprintk("%s\n", __FUNCTION__); 967 dprintk("%s\n", __FUNCTION__);
993 968
994 /* setup kernel thread */
995 snprintf(name, sizeof(name), "kdvb-ca-%i:%i", ca->dvbdev->adapter->num, ca->dvbdev->id);
996
997 lock_kernel();
998 daemonize(name);
999 sigfillset(&current->blocked);
1000 unlock_kernel();
1001
1002 /* choose the correct initial delay */ 969 /* choose the correct initial delay */
1003 dvb_ca_en50221_thread_update_delay(ca); 970 dvb_ca_en50221_thread_update_delay(ca);
1004 971
1005 /* main loop */ 972 /* main loop */
1006 while (!ca->exit) { 973 while (!kthread_should_stop()) {
1007 /* sleep for a bit */ 974 /* sleep for a bit */
1008 if (!ca->wakeup) { 975 while (!ca->wakeup) {
1009 flags = wait_event_interruptible_timeout(ca->thread_queue, 976 set_current_state(TASK_INTERRUPTIBLE);
1010 dvb_ca_en50221_thread_should_wakeup(ca), 977 schedule_timeout(ca->delay);
1011 ca->delay); 978 if (kthread_should_stop())
1012 if ((flags == -ERESTARTSYS) || ca->exit) { 979 return 0;
1013 /* got signal or quitting */
1014 break;
1015 }
1016 } 980 }
1017 ca->wakeup = 0; 981 ca->wakeup = 0;
1018 982
@@ -1181,10 +1145,6 @@ static int dvb_ca_en50221_thread(void *data)
1181 } 1145 }
1182 } 1146 }
1183 1147
1184 /* completed */
1185 ca->thread_pid = 0;
1186 mb();
1187 wake_up_interruptible(&ca->thread_queue);
1188 return 0; 1148 return 0;
1189} 1149}
1190 1150
@@ -1536,8 +1496,10 @@ static int dvb_ca_en50221_io_open(struct inode *inode, struct file *file)
1536 return -EIO; 1496 return -EIO;
1537 1497
1538 err = dvb_generic_open(inode, file); 1498 err = dvb_generic_open(inode, file);
1539 if (err < 0) 1499 if (err < 0) {
1500 module_put(ca->pub->owner);
1540 return err; 1501 return err;
1502 }
1541 1503
1542 for (i = 0; i < ca->slot_count; i++) { 1504 for (i = 0; i < ca->slot_count; i++) {
1543 1505
@@ -1570,7 +1532,7 @@ static int dvb_ca_en50221_io_release(struct inode *inode, struct file *file)
1570{ 1532{
1571 struct dvb_device *dvbdev = file->private_data; 1533 struct dvb_device *dvbdev = file->private_data;
1572 struct dvb_ca_private *ca = dvbdev->priv; 1534 struct dvb_ca_private *ca = dvbdev->priv;
1573 int err = 0; 1535 int err;
1574 1536
1575 dprintk("%s\n", __FUNCTION__); 1537 dprintk("%s\n", __FUNCTION__);
1576 1538
@@ -1582,7 +1544,7 @@ static int dvb_ca_en50221_io_release(struct inode *inode, struct file *file)
1582 1544
1583 module_put(ca->pub->owner); 1545 module_put(ca->pub->owner);
1584 1546
1585 return 0; 1547 return err;
1586} 1548}
1587 1549
1588 1550
@@ -1682,9 +1644,6 @@ int dvb_ca_en50221_init(struct dvb_adapter *dvb_adapter,
1682 goto error; 1644 goto error;
1683 } 1645 }
1684 init_waitqueue_head(&ca->wait_queue); 1646 init_waitqueue_head(&ca->wait_queue);
1685 ca->thread_pid = 0;
1686 init_waitqueue_head(&ca->thread_queue);
1687 ca->exit = 0;
1688 ca->open = 0; 1647 ca->open = 0;
1689 ca->wakeup = 0; 1648 ca->wakeup = 0;
1690 ca->next_read_slot = 0; 1649 ca->next_read_slot = 0;
@@ -1710,14 +1669,14 @@ int dvb_ca_en50221_init(struct dvb_adapter *dvb_adapter,
1710 mb(); 1669 mb();
1711 1670
1712 /* create a kthread for monitoring this CA device */ 1671 /* create a kthread for monitoring this CA device */
1713 1672 ca->thread = kthread_run(dvb_ca_en50221_thread, ca, "kdvb-ca-%i:%i",
1714 ret = kernel_thread(dvb_ca_en50221_thread, ca, 0); 1673 ca->dvbdev->adapter->num, ca->dvbdev->id);
1715 1674 if (IS_ERR(ca->thread)) {
1716 if (ret < 0) { 1675 ret = PTR_ERR(ca->thread);
1717 printk("dvb_ca_init: failed to start kernel_thread (%d)\n", ret); 1676 printk("dvb_ca_init: failed to start kernel_thread (%d)\n",
1677 ret);
1718 goto error; 1678 goto error;
1719 } 1679 }
1720 ca->thread_pid = ret;
1721 return 0; 1680 return 0;
1722 1681
1723error: 1682error:
@@ -1748,17 +1707,7 @@ void dvb_ca_en50221_release(struct dvb_ca_en50221 *pubca)
1748 dprintk("%s\n", __FUNCTION__); 1707 dprintk("%s\n", __FUNCTION__);
1749 1708
1750 /* shutdown the thread if there was one */ 1709 /* shutdown the thread if there was one */
1751 if (ca->thread_pid) { 1710 kthread_stop(ca->thread);
1752 if (kill_proc(ca->thread_pid, 0, 1) == -ESRCH) {
1753 printk("dvb_ca_release adapter %d: thread PID %d already died\n",
1754 ca->dvbdev->adapter->num, ca->thread_pid);
1755 } else {
1756 ca->exit = 1;
1757 mb();
1758 dvb_ca_en50221_thread_wakeup(ca);
1759 wait_event_interruptible(ca->thread_queue, ca->thread_pid == 0);
1760 }
1761 }
1762 1711
1763 for (i = 0; i < ca->slot_count; i++) { 1712 for (i = 0; i < ca->slot_count; i++) {
1764 dvb_ca_en50221_slot_shutdown(ca, i); 1713 dvb_ca_en50221_slot_shutdown(ca, i);
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index cb6987fce26c..7959020f9317 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -373,13 +373,10 @@ static inline void dvb_dmx_swfilter_packet_type(struct dvb_demux_feed *feed,
373static void dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf) 373static void dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)
374{ 374{
375 struct dvb_demux_feed *feed; 375 struct dvb_demux_feed *feed;
376 struct list_head *pos, *head = &demux->feed_list;
377 u16 pid = ts_pid(buf); 376 u16 pid = ts_pid(buf);
378 int dvr_done = 0; 377 int dvr_done = 0;
379 378
380 list_for_each(pos, head) { 379 list_for_each_entry(feed, &demux->feed_list, list_head) {
381 feed = list_entry(pos, struct dvb_demux_feed, list_head);
382
383 if ((feed->pid != pid) && (feed->pid != 0x2000)) 380 if ((feed->pid != pid) && (feed->pid != 0x2000))
384 continue; 381 continue;
385 382
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index b6c7f6610ec5..b203640ef1c5 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -32,7 +32,6 @@
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/poll.h> 33#include <linux/poll.h>
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/list.h> 35#include <linux/list.h>
37#include <linux/freezer.h> 36#include <linux/freezer.h>
38#include <linux/jiffies.h> 37#include <linux/jiffies.h>
@@ -43,7 +42,7 @@
43#include "dvbdev.h" 42#include "dvbdev.h"
44 43
45static int dvb_frontend_debug; 44static int dvb_frontend_debug;
46static int dvb_shutdown_timeout = 5; 45static int dvb_shutdown_timeout;
47static int dvb_force_auto_inversion; 46static int dvb_force_auto_inversion;
48static int dvb_override_tune_delay; 47static int dvb_override_tune_delay;
49static int dvb_powerdown_on_sleep = 1; 48static int dvb_powerdown_on_sleep = 1;
@@ -138,7 +137,7 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status)
138 137
139 dprintk ("%s\n", __FUNCTION__); 138 dprintk ("%s\n", __FUNCTION__);
140 139
141 if (down_interruptible (&events->sem)) 140 if (mutex_lock_interruptible (&events->mtx))
142 return; 141 return;
143 142
144 wp = (events->eventw + 1) % MAX_EVENT; 143 wp = (events->eventw + 1) % MAX_EVENT;
@@ -159,7 +158,7 @@ static void dvb_frontend_add_event(struct dvb_frontend *fe, fe_status_t status)
159 158
160 events->eventw = wp; 159 events->eventw = wp;
161 160
162 up (&events->sem); 161 mutex_unlock(&events->mtx);
163 162
164 e->status = status; 163 e->status = status;
165 164
@@ -197,7 +196,7 @@ static int dvb_frontend_get_event(struct dvb_frontend *fe,
197 return ret; 196 return ret;
198 } 197 }
199 198
200 if (down_interruptible (&events->sem)) 199 if (mutex_lock_interruptible (&events->mtx))
201 return -ERESTARTSYS; 200 return -ERESTARTSYS;
202 201
203 memcpy (event, &events->events[events->eventr], 202 memcpy (event, &events->events[events->eventr],
@@ -205,7 +204,7 @@ static int dvb_frontend_get_event(struct dvb_frontend *fe,
205 204
206 events->eventr = (events->eventr + 1) % MAX_EVENT; 205 events->eventr = (events->eventr + 1) % MAX_EVENT;
207 206
208 up (&events->sem); 207 mutex_unlock(&events->mtx);
209 208
210 return 0; 209 return 0;
211} 210}
@@ -574,10 +573,9 @@ restart:
574 dvb_frontend_swzigzag(fe); 573 dvb_frontend_swzigzag(fe);
575 } 574 }
576 575
577 if (dvb_shutdown_timeout) { 576 if (dvb_powerdown_on_sleep) {
578 if (dvb_powerdown_on_sleep) 577 if (fe->ops.set_voltage)
579 if (fe->ops.set_voltage) 578 fe->ops.set_voltage(fe, SEC_VOLTAGE_OFF);
580 fe->ops.set_voltage(fe, SEC_VOLTAGE_OFF);
581 if (fe->ops.tuner_ops.sleep) { 579 if (fe->ops.tuner_ops.sleep) {
582 fe->ops.tuner_ops.sleep(fe); 580 fe->ops.tuner_ops.sleep(fe);
583 if (fe->ops.i2c_gate_ctrl) 581 if (fe->ops.i2c_gate_ctrl)
@@ -697,6 +695,65 @@ static int dvb_frontend_start(struct dvb_frontend *fe)
697 return 0; 695 return 0;
698} 696}
699 697
698static void dvb_frontend_get_frequeny_limits(struct dvb_frontend *fe,
699 u32 *freq_min, u32 *freq_max)
700{
701 *freq_min = max(fe->ops.info.frequency_min, fe->ops.tuner_ops.info.frequency_min);
702
703 if (fe->ops.info.frequency_max == 0)
704 *freq_max = fe->ops.tuner_ops.info.frequency_max;
705 else if (fe->ops.tuner_ops.info.frequency_max == 0)
706 *freq_max = fe->ops.info.frequency_max;
707 else
708 *freq_max = min(fe->ops.info.frequency_max, fe->ops.tuner_ops.info.frequency_max);
709
710 if (*freq_min == 0 || *freq_max == 0)
711 printk(KERN_WARNING "DVB: frontend %u frequency limits undefined - fix the driver\n",
712 fe->dvb->num);
713}
714
715static int dvb_frontend_check_parameters(struct dvb_frontend *fe,
716 struct dvb_frontend_parameters *parms)
717{
718 u32 freq_min;
719 u32 freq_max;
720
721 /* range check: frequency */
722 dvb_frontend_get_frequeny_limits(fe, &freq_min, &freq_max);
723 if ((freq_min && parms->frequency < freq_min) ||
724 (freq_max && parms->frequency > freq_max)) {
725 printk(KERN_WARNING "DVB: frontend %u frequency %u out of range (%u..%u)\n",
726 fe->dvb->num, parms->frequency, freq_min, freq_max);
727 return -EINVAL;
728 }
729
730 /* range check: symbol rate */
731 if (fe->ops.info.type == FE_QPSK) {
732 if ((fe->ops.info.symbol_rate_min &&
733 parms->u.qpsk.symbol_rate < fe->ops.info.symbol_rate_min) ||
734 (fe->ops.info.symbol_rate_max &&
735 parms->u.qpsk.symbol_rate > fe->ops.info.symbol_rate_max)) {
736 printk(KERN_WARNING "DVB: frontend %u symbol rate %u out of range (%u..%u)\n",
737 fe->dvb->num, parms->u.qpsk.symbol_rate,
738 fe->ops.info.symbol_rate_min, fe->ops.info.symbol_rate_max);
739 return -EINVAL;
740 }
741
742 } else if (fe->ops.info.type == FE_QAM) {
743 if ((fe->ops.info.symbol_rate_min &&
744 parms->u.qam.symbol_rate < fe->ops.info.symbol_rate_min) ||
745 (fe->ops.info.symbol_rate_max &&
746 parms->u.qam.symbol_rate > fe->ops.info.symbol_rate_max)) {
747 printk(KERN_WARNING "DVB: frontend %u symbol rate %u out of range (%u..%u)\n",
748 fe->dvb->num, parms->u.qam.symbol_rate,
749 fe->ops.info.symbol_rate_min, fe->ops.info.symbol_rate_max);
750 return -EINVAL;
751 }
752 }
753
754 return 0;
755}
756
700static int dvb_frontend_ioctl(struct inode *inode, struct file *file, 757static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
701 unsigned int cmd, void *parg) 758 unsigned int cmd, void *parg)
702{ 759{
@@ -707,7 +764,7 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
707 764
708 dprintk ("%s\n", __FUNCTION__); 765 dprintk ("%s\n", __FUNCTION__);
709 766
710 if (!fe || fepriv->exit) 767 if (fepriv->exit)
711 return -ENODEV; 768 return -ENODEV;
712 769
713 if ((file->f_flags & O_ACCMODE) == O_RDONLY && 770 if ((file->f_flags & O_ACCMODE) == O_RDONLY &&
@@ -722,6 +779,7 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
722 case FE_GET_INFO: { 779 case FE_GET_INFO: {
723 struct dvb_frontend_info* info = parg; 780 struct dvb_frontend_info* info = parg;
724 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info)); 781 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info));
782 dvb_frontend_get_frequeny_limits(fe, &info->frequency_min, &info->frequency_max);
725 783
726 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't 784 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't
727 * do it, it is done for it. */ 785 * do it, it is done for it. */
@@ -883,6 +941,11 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
883 case FE_SET_FRONTEND: { 941 case FE_SET_FRONTEND: {
884 struct dvb_frontend_tune_settings fetunesettings; 942 struct dvb_frontend_tune_settings fetunesettings;
885 943
944 if (dvb_frontend_check_parameters(fe, parg) < 0) {
945 err = -EINVAL;
946 break;
947 }
948
886 memcpy (&fepriv->parameters, parg, 949 memcpy (&fepriv->parameters, parg,
887 sizeof (struct dvb_frontend_parameters)); 950 sizeof (struct dvb_frontend_parameters));
888 951
@@ -992,18 +1055,15 @@ static int dvb_frontend_open(struct inode *inode, struct file *file)
992 1055
993 dprintk ("%s\n", __FUNCTION__); 1056 dprintk ("%s\n", __FUNCTION__);
994 1057
995 if ((ret = dvb_generic_open (inode, file)) < 0) 1058 if (dvbdev->users == -1 && fe->ops.ts_bus_ctrl) {
996 return ret; 1059 if ((ret = fe->ops.ts_bus_ctrl(fe, 1)) < 0)
997
998 if (fe->ops.ts_bus_ctrl) {
999 if ((ret = fe->ops.ts_bus_ctrl (fe, 1)) < 0) {
1000 dvb_generic_release (inode, file);
1001 return ret; 1060 return ret;
1002 }
1003 } 1061 }
1004 1062
1005 if ((file->f_flags & O_ACCMODE) != O_RDONLY) { 1063 if ((ret = dvb_generic_open (inode, file)) < 0)
1064 goto err1;
1006 1065
1066 if ((file->f_flags & O_ACCMODE) != O_RDONLY) {
1007 /* normal tune mode when opened R/W */ 1067 /* normal tune mode when opened R/W */
1008 fepriv->tune_mode_flags &= ~FE_TUNE_MODE_ONESHOT; 1068 fepriv->tune_mode_flags &= ~FE_TUNE_MODE_ONESHOT;
1009 fepriv->tone = -1; 1069 fepriv->tone = -1;
@@ -1011,13 +1071,20 @@ static int dvb_frontend_open(struct inode *inode, struct file *file)
1011 1071
1012 ret = dvb_frontend_start (fe); 1072 ret = dvb_frontend_start (fe);
1013 if (ret) 1073 if (ret)
1014 dvb_generic_release (inode, file); 1074 goto err2;
1015 1075
1016 /* empty event queue */ 1076 /* empty event queue */
1017 fepriv->events.eventr = fepriv->events.eventw = 0; 1077 fepriv->events.eventr = fepriv->events.eventw = 0;
1018 } 1078 }
1019 1079
1020 return ret; 1080 return ret;
1081
1082err2:
1083 dvb_generic_release(inode, file);
1084err1:
1085 if (dvbdev->users == -1 && fe->ops.ts_bus_ctrl)
1086 fe->ops.ts_bus_ctrl(fe, 0);
1087 return ret;
1021} 1088}
1022 1089
1023static int dvb_frontend_release(struct inode *inode, struct file *file) 1090static int dvb_frontend_release(struct inode *inode, struct file *file)
@@ -1032,16 +1099,18 @@ static int dvb_frontend_release(struct inode *inode, struct file *file)
1032 if ((file->f_flags & O_ACCMODE) != O_RDONLY) 1099 if ((file->f_flags & O_ACCMODE) != O_RDONLY)
1033 fepriv->release_jiffies = jiffies; 1100 fepriv->release_jiffies = jiffies;
1034 1101
1035 if (fe->ops.ts_bus_ctrl)
1036 fe->ops.ts_bus_ctrl (fe, 0);
1037
1038 ret = dvb_generic_release (inode, file); 1102 ret = dvb_generic_release (inode, file);
1039 1103
1040 if (dvbdev->users==-1 && fepriv->exit==1) { 1104 if (dvbdev->users == -1) {
1041 fops_put(file->f_op); 1105 if (fepriv->exit == 1) {
1042 file->f_op = NULL; 1106 fops_put(file->f_op);
1043 wake_up(&dvbdev->wait_queue); 1107 file->f_op = NULL;
1108 wake_up(&dvbdev->wait_queue);
1109 }
1110 if (fe->ops.ts_bus_ctrl)
1111 fe->ops.ts_bus_ctrl(fe, 0);
1044 } 1112 }
1113
1045 return ret; 1114 return ret;
1046} 1115}
1047 1116
@@ -1080,7 +1149,7 @@ int dvb_register_frontend(struct dvb_adapter* dvb,
1080 init_MUTEX (&fepriv->sem); 1149 init_MUTEX (&fepriv->sem);
1081 init_waitqueue_head (&fepriv->wait_queue); 1150 init_waitqueue_head (&fepriv->wait_queue);
1082 init_waitqueue_head (&fepriv->events.wait_queue); 1151 init_waitqueue_head (&fepriv->events.wait_queue);
1083 init_MUTEX (&fepriv->events.sem); 1152 mutex_init(&fepriv->events.mtx);
1084 fe->dvb = dvb; 1153 fe->dvb = dvb;
1085 fepriv->inversion = INVERSION_OFF; 1154 fepriv->inversion = INVERSION_OFF;
1086 1155
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h
index a770a87b9a93..a5262e852c82 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.h
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.h
@@ -35,6 +35,7 @@
35#include <linux/module.h> 35#include <linux/module.h>
36#include <linux/errno.h> 36#include <linux/errno.h>
37#include <linux/delay.h> 37#include <linux/delay.h>
38#include <linux/mutex.h>
38 39
39#include <linux/dvb/frontend.h> 40#include <linux/dvb/frontend.h>
40 41
@@ -61,6 +62,13 @@ struct dvb_tuner_info {
61 u32 bandwidth_step; 62 u32 bandwidth_step;
62}; 63};
63 64
65struct analog_parameters {
66 unsigned int frequency;
67 unsigned int mode;
68 unsigned int audmode;
69 u64 std;
70};
71
64struct dvb_tuner_ops { 72struct dvb_tuner_ops {
65 73
66 struct dvb_tuner_info info; 74 struct dvb_tuner_info info;
@@ -71,6 +79,7 @@ struct dvb_tuner_ops {
71 79
72 /** This is for simple PLLs - set all parameters in one go. */ 80 /** This is for simple PLLs - set all parameters in one go. */
73 int (*set_params)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p); 81 int (*set_params)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p);
82 int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p);
74 83
75 /** This is support for demods like the mt352 - fills out the supplied buffer with what to write. */ 84 /** This is support for demods like the mt352 - fills out the supplied buffer with what to write. */
76 int (*calc_regs)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p, u8 *buf, int buf_len); 85 int (*calc_regs)(struct dvb_frontend *fe, struct dvb_frontend_parameters *p, u8 *buf, int buf_len);
@@ -79,7 +88,9 @@ struct dvb_tuner_ops {
79 int (*get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth); 88 int (*get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth);
80 89
81#define TUNER_STATUS_LOCKED 1 90#define TUNER_STATUS_LOCKED 1
91#define TUNER_STATUS_STEREO 2
82 int (*get_status)(struct dvb_frontend *fe, u32 *status); 92 int (*get_status)(struct dvb_frontend *fe, u32 *status);
93 int (*get_rf_strength)(struct dvb_frontend *fe, u16 *strength);
83 94
84 /** These are provided seperately from set_params in order to facilitate silicon 95 /** These are provided seperately from set_params in order to facilitate silicon
85 * tuners which require sophisticated tuning loops, controlling each parameter seperately. */ 96 * tuners which require sophisticated tuning loops, controlling each parameter seperately. */
@@ -142,7 +153,7 @@ struct dvb_fe_events {
142 int eventr; 153 int eventr;
143 int overflow; 154 int overflow;
144 wait_queue_head_t wait_queue; 155 wait_queue_head_t wait_queue;
145 struct semaphore sem; 156 struct mutex mtx;
146}; 157};
147 158
148struct dvb_frontend { 159struct dvb_frontend {
diff --git a/drivers/media/dvb/dvb-core/dvb_net.c b/drivers/media/dvb/dvb-core/dvb_net.c
index 06800e5a0770..a33eb5988c42 100644
--- a/drivers/media/dvb/dvb-core/dvb_net.c
+++ b/drivers/media/dvb/dvb-core/dvb_net.c
@@ -357,11 +357,6 @@ static void dvb_net_ule( struct net_device *dev, const u8 *buf, size_t buf_len )
357 static unsigned char *ule_where = ule_hist, ule_dump = 0; 357 static unsigned char *ule_where = ule_hist, ule_dump = 0;
358#endif 358#endif
359 359
360 if (dev == NULL) {
361 printk( KERN_ERR "NO netdev struct!\n" );
362 return;
363 }
364
365 /* For all TS cells in current buffer. 360 /* For all TS cells in current buffer.
366 * Appearently, we are called for every single TS cell. 361 * Appearently, we are called for every single TS cell.
367 */ 362 */
@@ -800,8 +795,8 @@ static int dvb_net_ts_callback(const u8 *buffer1, size_t buffer1_len,
800} 795}
801 796
802 797
803static void dvb_net_sec(struct net_device *dev, const u8 *pkt, int 798static void dvb_net_sec(struct net_device *dev,
804pkt_len) 799 const u8 *pkt, int pkt_len)
805{ 800{
806 u8 *eth; 801 u8 *eth;
807 struct sk_buff *skb; 802 struct sk_buff *skb;
@@ -1453,18 +1448,9 @@ static int dvb_net_close(struct inode *inode, struct file *file)
1453 struct dvb_device *dvbdev = file->private_data; 1448 struct dvb_device *dvbdev = file->private_data;
1454 struct dvb_net *dvbnet = dvbdev->priv; 1449 struct dvb_net *dvbnet = dvbdev->priv;
1455 1450
1456 if (!dvbdev) 1451 dvb_generic_release(inode, file);
1457 return -ENODEV;
1458
1459 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
1460 dvbdev->readers++;
1461 } else {
1462 dvbdev->writers++;
1463 }
1464
1465 dvbdev->users++;
1466 1452
1467 if(dvbdev->users == 1 && dvbnet->exit==1) { 1453 if(dvbdev->users == 1 && dvbnet->exit == 1) {
1468 fops_put(file->f_op); 1454 fops_put(file->f_op);
1469 file->f_op = NULL; 1455 file->f_op = NULL;
1470 wake_up(&dvbdev->wait_queue); 1456 wake_up(&dvbdev->wait_queue);
diff --git a/drivers/media/dvb/dvb-core/dvbdev.c b/drivers/media/dvb/dvb-core/dvbdev.c
index 9ef0c00605ee..56231d8edc07 100644
--- a/drivers/media/dvb/dvb-core/dvbdev.c
+++ b/drivers/media/dvb/dvb-core/dvbdev.c
@@ -25,7 +25,6 @@
25#include <linux/errno.h> 25#include <linux/errno.h>
26#include <linux/string.h> 26#include <linux/string.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
30#include <linux/init.h> 29#include <linux/init.h>
31#include <linux/slab.h> 30#include <linux/slab.h>
@@ -59,18 +58,13 @@ static struct class *dvb_class;
59 58
60static struct dvb_device* dvbdev_find_device (int minor) 59static struct dvb_device* dvbdev_find_device (int minor)
61{ 60{
62 struct list_head *entry; 61 struct dvb_adapter *adap;
63 62
64 list_for_each (entry, &dvb_adapter_list) { 63 list_for_each_entry(adap, &dvb_adapter_list, list_head) {
65 struct list_head *entry0; 64 struct dvb_device *dev;
66 struct dvb_adapter *adap; 65 list_for_each_entry(dev, &adap->device_list, list_head)
67 adap = list_entry (entry, struct dvb_adapter, list_head);
68 list_for_each (entry0, &adap->device_list) {
69 struct dvb_device *dev;
70 dev = list_entry (entry0, struct dvb_device, list_head);
71 if (nums2minor(adap->num, dev->type, dev->id) == minor) 66 if (nums2minor(adap->num, dev->type, dev->id) == minor)
72 return dev; 67 return dev;
73 }
74 } 68 }
75 69
76 return NULL; 70 return NULL;
@@ -180,13 +174,10 @@ static int dvbdev_get_free_id (struct dvb_adapter *adap, int type)
180 u32 id = 0; 174 u32 id = 0;
181 175
182 while (id < DVB_MAX_IDS) { 176 while (id < DVB_MAX_IDS) {
183 struct list_head *entry; 177 struct dvb_device *dev;
184 list_for_each (entry, &adap->device_list) { 178 list_for_each_entry(dev, &adap->device_list, list_head)
185 struct dvb_device *dev;
186 dev = list_entry (entry, struct dvb_device, list_head);
187 if (dev->type == type && dev->id == id) 179 if (dev->type == type && dev->id == id)
188 goto skip; 180 goto skip;
189 }
190 return id; 181 return id;
191skip: 182skip:
192 id++; 183 id++;
@@ -200,7 +191,7 @@ int dvb_register_device(struct dvb_adapter *adap, struct dvb_device **pdvbdev,
200{ 191{
201 struct dvb_device *dvbdev; 192 struct dvb_device *dvbdev;
202 struct file_operations *dvbdevfops; 193 struct file_operations *dvbdevfops;
203 struct class_device *clsdev; 194 struct device *clsdev;
204 int id; 195 int id;
205 196
206 mutex_lock(&dvbdev_register_lock); 197 mutex_lock(&dvbdev_register_lock);
@@ -242,10 +233,9 @@ int dvb_register_device(struct dvb_adapter *adap, struct dvb_device **pdvbdev,
242 233
243 mutex_unlock(&dvbdev_register_lock); 234 mutex_unlock(&dvbdev_register_lock);
244 235
245 clsdev = class_device_create(dvb_class, NULL, MKDEV(DVB_MAJOR, 236 clsdev = device_create(dvb_class, adap->device,
246 nums2minor(adap->num, type, id)), 237 MKDEV(DVB_MAJOR, nums2minor(adap->num, type, id)),
247 adap->device, "dvb%d.%s%d", adap->num, 238 "dvb%d.%s%d", adap->num, dnames[type], id);
248 dnames[type], id);
249 if (IS_ERR(clsdev)) { 239 if (IS_ERR(clsdev)) {
250 printk(KERN_ERR "%s: failed to create device dvb%d.%s%d (%ld)\n", 240 printk(KERN_ERR "%s: failed to create device dvb%d.%s%d (%ld)\n",
251 __FUNCTION__, adap->num, dnames[type], id, PTR_ERR(clsdev)); 241 __FUNCTION__, adap->num, dnames[type], id, PTR_ERR(clsdev));
@@ -266,8 +256,8 @@ void dvb_unregister_device(struct dvb_device *dvbdev)
266 if (!dvbdev) 256 if (!dvbdev)
267 return; 257 return;
268 258
269 class_device_destroy(dvb_class, MKDEV(DVB_MAJOR, nums2minor(dvbdev->adapter->num, 259 device_destroy(dvb_class, MKDEV(DVB_MAJOR, nums2minor(dvbdev->adapter->num,
270 dvbdev->type, dvbdev->id))); 260 dvbdev->type, dvbdev->id)));
271 261
272 list_del (&dvbdev->list_head); 262 list_del (&dvbdev->list_head);
273 kfree (dvbdev->fops); 263 kfree (dvbdev->fops);
@@ -281,13 +271,10 @@ static int dvbdev_get_free_adapter_num (void)
281 int num = 0; 271 int num = 0;
282 272
283 while (num < DVB_MAX_ADAPTERS) { 273 while (num < DVB_MAX_ADAPTERS) {
284 struct list_head *entry; 274 struct dvb_adapter *adap;
285 list_for_each (entry, &dvb_adapter_list) { 275 list_for_each_entry(adap, &dvb_adapter_list, list_head)
286 struct dvb_adapter *adap;
287 adap = list_entry (entry, struct dvb_adapter, list_head);
288 if (adap->num == num) 276 if (adap->num == num)
289 goto skip; 277 goto skip;
290 }
291 return num; 278 return num;
292skip: 279skip:
293 num++; 280 num++;
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 40e41f2f5afe..d73934dd4c57 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -74,6 +74,8 @@ config DVB_USB_DIB0700
74 select DVB_DIB7000M 74 select DVB_DIB7000M
75 select DVB_DIB3000MC 75 select DVB_DIB3000MC
76 select DVB_TUNER_MT2060 if !DVB_FE_CUSTOMISE 76 select DVB_TUNER_MT2060 if !DVB_FE_CUSTOMISE
77 select DVB_TUNER_MT2266 if !DVB_FE_CUSTOMISE
78 select DVB_TUNER_DIB0070
77 help 79 help
78 Support for USB2.0/1.1 DVB receivers based on the DiB0700 USB bridge. The 80 Support for USB2.0/1.1 DVB receivers based on the DiB0700 USB bridge. The
79 USB bridge is also present in devices having the DiB7700 DVB-T-USB 81 USB bridge is also present in devices having the DiB7700 DVB-T-USB
diff --git a/drivers/media/dvb/dvb-usb/dib0700.h b/drivers/media/dvb/dvb-usb/dib0700.h
index cda3adea24fb..4a903ea95896 100644
--- a/drivers/media/dvb/dvb-usb/dib0700.h
+++ b/drivers/media/dvb/dvb-usb/dib0700.h
@@ -30,17 +30,19 @@ extern int dvb_usb_dib0700_debug;
30 // 1 Byte: 4MSB(1 = enable streaming, 0 = disable streaming) 4LSB(Video Mode: 0 = MPEG2 188Bytes, 1 = Analog) 30 // 1 Byte: 4MSB(1 = enable streaming, 0 = disable streaming) 4LSB(Video Mode: 0 = MPEG2 188Bytes, 1 = Analog)
31 // 2 Byte: MPEG2 mode: 4MSB(1 = Master Mode, 0 = Slave Mode) 4LSB(Channel 1 = bit0, Channel 2 = bit1) 31 // 2 Byte: MPEG2 mode: 4MSB(1 = Master Mode, 0 = Slave Mode) 4LSB(Channel 1 = bit0, Channel 2 = bit1)
32 // 2 Byte: Analog mode: 4MSB(0 = 625 lines, 1 = 525 lines) 4LSB( " " ) 32 // 2 Byte: Analog mode: 4MSB(0 = 625 lines, 1 = 525 lines) 4LSB( " " )
33#define REQUEST_SET_RC 0x11
33#define REQUEST_GET_VERSION 0x15 34#define REQUEST_GET_VERSION 0x15
34 35
35struct dib0700_state { 36struct dib0700_state {
36 u8 channel_state; 37 u8 channel_state;
37 u16 mt2060_if1[2]; 38 u16 mt2060_if1[2];
38 39 u8 rc_toggle;
39 u8 is_dib7000pc; 40 u8 is_dib7000pc;
40}; 41};
41 42
42extern int dib0700_set_gpio(struct dvb_usb_device *, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val); 43extern int dib0700_set_gpio(struct dvb_usb_device *, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val);
43extern int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3); 44extern int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3);
45extern int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen);
44extern int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw); 46extern int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw);
45extern int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff); 47extern int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff);
46extern struct i2c_algorithm dib0700_i2c_algo; 48extern struct i2c_algorithm dib0700_i2c_algo;
@@ -50,5 +52,4 @@ extern int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device
50extern int dib0700_device_count; 52extern int dib0700_device_count;
51extern struct dvb_usb_device_properties dib0700_devices[]; 53extern struct dvb_usb_device_properties dib0700_devices[];
52extern struct usb_device_id dib0700_usb_id_table[]; 54extern struct usb_device_id dib0700_usb_id_table[];
53
54#endif 55#endif
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index dddf164f269a..3ea294eb96bd 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -13,6 +13,10 @@ int dvb_usb_dib0700_debug;
13module_param_named(debug,dvb_usb_dib0700_debug, int, 0644); 13module_param_named(debug,dvb_usb_dib0700_debug, int, 0644);
14MODULE_PARM_DESC(debug, "set debugging level (1=info,2=fw,4=fwdata,8=data (or-able))." DVB_USB_DEBUG_STATUS); 14MODULE_PARM_DESC(debug, "set debugging level (1=info,2=fw,4=fwdata,8=data (or-able))." DVB_USB_DEBUG_STATUS);
15 15
16static int dvb_usb_dib0700_ir_proto = 1;
17module_param(dvb_usb_dib0700_ir_proto, int, 0644);
18MODULE_PARM_DESC(dvb_usb_dib0700_ir_proto, "set ir protocol (0=NEC, 1=RC5 (default), 2=RC6).");
19
16/* expecting rx buffer: request data[0] data[1] ... data[2] */ 20/* expecting rx buffer: request data[0] data[1] ... data[2] */
17static int dib0700_ctrl_wr(struct dvb_usb_device *d, u8 *tx, u8 txlen) 21static int dib0700_ctrl_wr(struct dvb_usb_device *d, u8 *tx, u8 txlen)
18{ 22{
@@ -32,7 +36,7 @@ static int dib0700_ctrl_wr(struct dvb_usb_device *d, u8 *tx, u8 txlen)
32} 36}
33 37
34/* expecting tx buffer: request data[0] ... data[n] (n <= 4) */ 38/* expecting tx buffer: request data[0] ... data[n] (n <= 4) */
35static int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen) 39int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen)
36{ 40{
37 u16 index, value; 41 u16 index, value;
38 int status; 42 int status;
@@ -260,14 +264,29 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
260 return dib0700_ctrl_wr(adap->dev, b, 4); 264 return dib0700_ctrl_wr(adap->dev, b, 4);
261} 265}
262 266
267static int dib0700_rc_setup(struct dvb_usb_device *d)
268{
269 u8 rc_setup[3] = {REQUEST_SET_RC, dvb_usb_dib0700_ir_proto, 0};
270 int i = dib0700_ctrl_wr(d, rc_setup, 3);
271 if (i<0) {
272 err("ir protocol setup failed");
273 return -1;
274 }
275 return 0;
276}
277
263static int dib0700_probe(struct usb_interface *intf, 278static int dib0700_probe(struct usb_interface *intf,
264 const struct usb_device_id *id) 279 const struct usb_device_id *id)
265{ 280{
266 int i; 281 int i;
282 struct dvb_usb_device *dev;
267 283
268 for (i = 0; i < dib0700_device_count; i++) 284 for (i = 0; i < dib0700_device_count; i++)
269 if (dvb_usb_device_init(intf, &dib0700_devices[i], THIS_MODULE, NULL) == 0) 285 if (dvb_usb_device_init(intf, &dib0700_devices[i], THIS_MODULE, &dev) == 0)
286 {
287 dib0700_rc_setup(dev);
270 return 0; 288 return 0;
289 }
271 290
272 return -ENODEV; 291 return -ENODEV;
273} 292}
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 2208757d9017..e8c4a8694532 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -4,7 +4,7 @@
4 * under the terms of the GNU General Public License as published by the Free 4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2. 5 * Software Foundation, version 2.
6 * 6 *
7 * Copyright (C) 2005-6 DiBcom, SA 7 * Copyright (C) 2005-7 DiBcom, SA
8 */ 8 */
9#include "dib0700.h" 9#include "dib0700.h"
10 10
@@ -12,13 +12,19 @@
12#include "dib7000m.h" 12#include "dib7000m.h"
13#include "dib7000p.h" 13#include "dib7000p.h"
14#include "mt2060.h" 14#include "mt2060.h"
15#include "mt2266.h"
16#include "dib0070.h"
15 17
16static int force_lna_activation; 18static int force_lna_activation;
17module_param(force_lna_activation, int, 0644); 19module_param(force_lna_activation, int, 0644);
18MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), " 20MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), "
19 "if applicable for the device (default: 0=automatic/off)."); 21 "if applicable for the device (default: 0=automatic/off).");
20 22
21/* Hauppauge Nova-T 500 23struct dib0700_adapter_state {
24 int (*set_param_save) (struct dvb_frontend *, struct dvb_frontend_parameters *);
25};
26
27/* Hauppauge Nova-T 500 (aka Bristol)
22 * has a LNA on GPIO0 which is enabled by setting 1 */ 28 * has a LNA on GPIO0 which is enabled by setting 1 */
23static struct mt2060_config bristol_mt2060_config[2] = { 29static struct mt2060_config bristol_mt2060_config[2] = {
24 { 30 {
@@ -96,6 +102,321 @@ static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
96 st->mt2060_if1[adap->id]) == NULL ? -ENODEV : 0; 102 st->mt2060_if1[adap->id]) == NULL ? -ENODEV : 0;
97} 103}
98 104
105/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
106
107/* MT226x */
108static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
109 {
110 BAND_UHF, // band_caps
111
112 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
113 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
114 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), // setup
115
116 1130, // inv_gain
117 21, // time_stabiliz
118
119 0, // alpha_level
120 118, // thlock
121
122 0, // wbd_inv
123 3530, // wbd_ref
124 1, // wbd_sel
125 0, // wbd_alpha
126
127 65535, // agc1_max
128 33770, // agc1_min
129 65535, // agc2_max
130 23592, // agc2_min
131
132 0, // agc1_pt1
133 62, // agc1_pt2
134 255, // agc1_pt3
135 64, // agc1_slope1
136 64, // agc1_slope2
137 132, // agc2_pt1
138 192, // agc2_pt2
139 80, // agc2_slope1
140 80, // agc2_slope2
141
142 17, // alpha_mant
143 27, // alpha_exp
144 23, // beta_mant
145 51, // beta_exp
146
147 1, // perform_agc_softsplit
148 }, {
149 BAND_VHF | BAND_LBAND, // band_caps
150
151 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
152 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
153 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), // setup
154
155 2372, // inv_gain
156 21, // time_stabiliz
157
158 0, // alpha_level
159 118, // thlock
160
161 0, // wbd_inv
162 3530, // wbd_ref
163 1, // wbd_sel
164 0, // wbd_alpha
165
166 65535, // agc1_max
167 0, // agc1_min
168 65535, // agc2_max
169 23592, // agc2_min
170
171 0, // agc1_pt1
172 128, // agc1_pt2
173 128, // agc1_pt3
174 128, // agc1_slope1
175 0, // agc1_slope2
176 128, // agc2_pt1
177 253, // agc2_pt2
178 81, // agc2_slope1
179 0, // agc2_slope2
180
181 17, // alpha_mant
182 27, // alpha_exp
183 23, // beta_mant
184 51, // beta_exp
185
186 1, // perform_agc_softsplit
187 }
188};
189
190static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
191 60000, 30000, // internal, sampling
192 1, 8, 3, 1, 0, // pll_cfg: prediv, ratio, range, reset, bypass
193 0, 0, 1, 1, 2, // misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, modulo
194 (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
195 0, // ifreq
196 20452225, // timf
197};
198
199static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
200 { .output_mpeg2_in_188_bytes = 1,
201 .hostbus_diversity = 1,
202 .tuner_is_baseband = 1,
203
204 .agc_config_count = 2,
205 .agc = stk7700d_7000p_mt2266_agc_config,
206 .bw = &stk7700d_mt2266_pll_config,
207
208 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
209 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
210 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
211 },
212 { .output_mpeg2_in_188_bytes = 1,
213 .hostbus_diversity = 1,
214 .tuner_is_baseband = 1,
215
216 .agc_config_count = 2,
217 .agc = stk7700d_7000p_mt2266_agc_config,
218 .bw = &stk7700d_mt2266_pll_config,
219
220 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
221 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
222 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
223 }
224};
225
226static struct mt2266_config stk7700d_mt2266_config[2] = {
227 { .i2c_address = 0x60
228 },
229 { .i2c_address = 0x60
230 }
231};
232
233static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
234{
235 if (adap->id == 0) {
236 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
237 msleep(10);
238 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
239 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
240 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
241 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
242 msleep(10);
243 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
244 msleep(10);
245 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
246 dib7000p_i2c_enumeration(&adap->dev->i2c_adap,2,18,stk7700d_dib7000p_mt2266_config);
247 }
248
249 adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap,0x80+(adap->id << 1),
250 &stk7700d_dib7000p_mt2266_config[adap->id]);
251
252 return adap->fe == NULL ? -ENODEV : 0;
253}
254
255static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
256{
257 struct i2c_adapter *tun_i2c;
258 tun_i2c = dib7000p_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
259 return dvb_attach(mt2266_attach, adap->fe, tun_i2c,
260 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;;
261}
262
263#define DEFAULT_RC_INTERVAL 150
264
265static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
266
267static int dib0700_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
268{
269 u8 key[4];
270 int i;
271 struct dvb_usb_rc_key *keymap = d->props.rc_key_map;
272 struct dib0700_state *st = d->priv;
273 *event = 0;
274 *state = REMOTE_NO_KEY_PRESSED;
275 i=dib0700_ctrl_rd(d,rc_request,2,key,4);
276 if (i<=0) {
277 err("RC Query Failed");
278 return -1;
279 }
280 if (key[0]==0 && key[1]==0 && key[2]==0 && key[3]==0) return 0;
281 if (key[3-1]!=st->rc_toggle) {
282 for (i=0;i<d->props.rc_key_map_size; i++) {
283 if (keymap[i].custom == key[3-2] && keymap[i].data == key[3-3]) {
284 *event = keymap[i].event;
285 *state = REMOTE_KEY_PRESSED;
286 st->rc_toggle=key[3-1];
287 return 0;
288 }
289 }
290 err("Unknown remote controller key : %2X %2X",(int)key[3-2],(int)key[3-3]);
291 }
292 return 0;
293}
294
295static struct dvb_usb_rc_key dib0700_rc_keys[] = {
296 /* Key codes for the tiny Pinnacle remote*/
297 { 0x07, 0x00, KEY_MUTE },
298 { 0x07, 0x01, KEY_MENU }, // Pinnacle logo
299 { 0x07, 0x39, KEY_POWER },
300 { 0x07, 0x03, KEY_VOLUMEUP },
301 { 0x07, 0x09, KEY_VOLUMEDOWN },
302 { 0x07, 0x06, KEY_CHANNELUP },
303 { 0x07, 0x0c, KEY_CHANNELDOWN },
304 { 0x07, 0x0f, KEY_1 },
305 { 0x07, 0x15, KEY_2 },
306 { 0x07, 0x10, KEY_3 },
307 { 0x07, 0x18, KEY_4 },
308 { 0x07, 0x1b, KEY_5 },
309 { 0x07, 0x1e, KEY_6 },
310 { 0x07, 0x11, KEY_7 },
311 { 0x07, 0x21, KEY_8 },
312 { 0x07, 0x12, KEY_9 },
313 { 0x07, 0x27, KEY_0 },
314 { 0x07, 0x24, KEY_SCREEN }, // 'Square' key
315 { 0x07, 0x2a, KEY_TEXT }, // 'T' key
316 { 0x07, 0x2d, KEY_REWIND },
317 { 0x07, 0x30, KEY_PLAY },
318 { 0x07, 0x33, KEY_FASTFORWARD },
319 { 0x07, 0x36, KEY_RECORD },
320 { 0x07, 0x3c, KEY_STOP },
321 { 0x07, 0x3f, KEY_CANCEL }, // '?' key
322 /* Key codes for the Terratec Cinergy DT XS Diversity, similar to cinergyT2.c */
323 { 0xeb, 0x01, KEY_POWER },
324 { 0xeb, 0x02, KEY_1 },
325 { 0xeb, 0x03, KEY_2 },
326 { 0xeb, 0x04, KEY_3 },
327 { 0xeb, 0x05, KEY_4 },
328 { 0xeb, 0x06, KEY_5 },
329 { 0xeb, 0x07, KEY_6 },
330 { 0xeb, 0x08, KEY_7 },
331 { 0xeb, 0x09, KEY_8 },
332 { 0xeb, 0x0a, KEY_9 },
333 { 0xeb, 0x0b, KEY_VIDEO },
334 { 0xeb, 0x0c, KEY_0 },
335 { 0xeb, 0x0d, KEY_REFRESH },
336 { 0xeb, 0x0f, KEY_EPG },
337 { 0xeb, 0x10, KEY_UP },
338 { 0xeb, 0x11, KEY_LEFT },
339 { 0xeb, 0x12, KEY_OK },
340 { 0xeb, 0x13, KEY_RIGHT },
341 { 0xeb, 0x14, KEY_DOWN },
342 { 0xeb, 0x16, KEY_INFO },
343 { 0xeb, 0x17, KEY_RED },
344 { 0xeb, 0x18, KEY_GREEN },
345 { 0xeb, 0x19, KEY_YELLOW },
346 { 0xeb, 0x1a, KEY_BLUE },
347 { 0xeb, 0x1b, KEY_CHANNELUP },
348 { 0xeb, 0x1c, KEY_VOLUMEUP },
349 { 0xeb, 0x1d, KEY_MUTE },
350 { 0xeb, 0x1e, KEY_VOLUMEDOWN },
351 { 0xeb, 0x1f, KEY_CHANNELDOWN },
352 { 0xeb, 0x40, KEY_PAUSE },
353 { 0xeb, 0x41, KEY_HOME },
354 { 0xeb, 0x42, KEY_MENU }, /* DVD Menu */
355 { 0xeb, 0x43, KEY_SUBTITLE },
356 { 0xeb, 0x44, KEY_TEXT }, /* Teletext */
357 { 0xeb, 0x45, KEY_DELETE },
358 { 0xeb, 0x46, KEY_TV },
359 { 0xeb, 0x47, KEY_DVD },
360 { 0xeb, 0x48, KEY_STOP },
361 { 0xeb, 0x49, KEY_VIDEO },
362 { 0xeb, 0x4a, KEY_AUDIO }, /* Music */
363 { 0xeb, 0x4b, KEY_SCREEN }, /* Pic */
364 { 0xeb, 0x4c, KEY_PLAY },
365 { 0xeb, 0x4d, KEY_BACK },
366 { 0xeb, 0x4e, KEY_REWIND },
367 { 0xeb, 0x4f, KEY_FASTFORWARD },
368 { 0xeb, 0x54, KEY_PREVIOUS },
369 { 0xeb, 0x58, KEY_RECORD },
370 { 0xeb, 0x5c, KEY_NEXT },
371
372 /* Key codes for the Haupauge WinTV Nova-TD, copied from nova-t-usb2.c (Nova-T USB2) */
373 { 0x1e, 0x00, KEY_0 },
374 { 0x1e, 0x01, KEY_1 },
375 { 0x1e, 0x02, KEY_2 },
376 { 0x1e, 0x03, KEY_3 },
377 { 0x1e, 0x04, KEY_4 },
378 { 0x1e, 0x05, KEY_5 },
379 { 0x1e, 0x06, KEY_6 },
380 { 0x1e, 0x07, KEY_7 },
381 { 0x1e, 0x08, KEY_8 },
382 { 0x1e, 0x09, KEY_9 },
383 { 0x1e, 0x0a, KEY_KPASTERISK },
384 { 0x1e, 0x0b, KEY_RED },
385 { 0x1e, 0x0c, KEY_RADIO },
386 { 0x1e, 0x0d, KEY_MENU },
387 { 0x1e, 0x0e, KEY_GRAVE }, /* # */
388 { 0x1e, 0x0f, KEY_MUTE },
389 { 0x1e, 0x10, KEY_VOLUMEUP },
390 { 0x1e, 0x11, KEY_VOLUMEDOWN },
391 { 0x1e, 0x12, KEY_CHANNEL },
392 { 0x1e, 0x14, KEY_UP },
393 { 0x1e, 0x15, KEY_DOWN },
394 { 0x1e, 0x16, KEY_LEFT },
395 { 0x1e, 0x17, KEY_RIGHT },
396 { 0x1e, 0x18, KEY_VIDEO },
397 { 0x1e, 0x19, KEY_AUDIO },
398 { 0x1e, 0x1a, KEY_MEDIA },
399 { 0x1e, 0x1b, KEY_EPG },
400 { 0x1e, 0x1c, KEY_TV },
401 { 0x1e, 0x1e, KEY_NEXT },
402 { 0x1e, 0x1f, KEY_BACK },
403 { 0x1e, 0x20, KEY_CHANNELUP },
404 { 0x1e, 0x21, KEY_CHANNELDOWN },
405 { 0x1e, 0x24, KEY_LAST }, /* Skip backwards */
406 { 0x1e, 0x25, KEY_OK },
407 { 0x1e, 0x29, KEY_BLUE},
408 { 0x1e, 0x2e, KEY_GREEN },
409 { 0x1e, 0x30, KEY_PAUSE },
410 { 0x1e, 0x32, KEY_REWIND },
411 { 0x1e, 0x34, KEY_FASTFORWARD },
412 { 0x1e, 0x35, KEY_PLAY },
413 { 0x1e, 0x36, KEY_STOP },
414 { 0x1e, 0x37, KEY_RECORD },
415 { 0x1e, 0x38, KEY_YELLOW },
416 { 0x1e, 0x3b, KEY_GOTO },
417 { 0x1e, 0x3d, KEY_POWER },
418};
419
99/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */ 420/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
100static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = { 421static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
101 BAND_UHF | BAND_VHF, // band_caps 422 BAND_UHF | BAND_VHF, // band_caps
@@ -194,6 +515,7 @@ static struct dibx000_bandwidth_config stk7700p_pll_config = {
194 (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k 515 (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
195 60258167, // ifreq 516 60258167, // ifreq
196 20452225, // timf 517 20452225, // timf
518 30000000, // xtal
197}; 519};
198 520
199static struct dib7000m_config stk7700p_dib7000m_config = { 521static struct dib7000m_config stk7700p_dib7000m_config = {
@@ -213,6 +535,7 @@ static struct dib7000m_config stk7700p_dib7000m_config = {
213static struct dib7000p_config stk7700p_dib7000p_config = { 535static struct dib7000p_config stk7700p_dib7000p_config = {
214 .output_mpeg2_in_188_bytes = 1, 536 .output_mpeg2_in_188_bytes = 1,
215 537
538 .agc_config_count = 1,
216 .agc = &stk7700p_7000p_mt2060_agc_config, 539 .agc = &stk7700p_7000p_mt2060_agc_config,
217 .bw = &stk7700p_pll_config, 540 .bw = &stk7700p_pll_config,
218 541
@@ -267,27 +590,245 @@ static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
267 st->mt2060_if1[0]) == NULL ? -ENODEV : 0; 590 st->mt2060_if1[0]) == NULL ? -ENODEV : 0;
268} 591}
269 592
593/* DIB7070 generic */
594static struct dibx000_agc_config dib7070_agc_config = {
595 BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
596 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
597 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
598 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), // setup
599
600 600, // inv_gain
601 10, // time_stabiliz
602
603 0, // alpha_level
604 118, // thlock
605
606 0, // wbd_inv
607 3530, // wbd_ref
608 1, // wbd_sel
609 5, // wbd_alpha
610
611 65535, // agc1_max
612 0, // agc1_min
613
614 65535, // agc2_max
615 0, // agc2_min
616
617 0, // agc1_pt1
618 40, // agc1_pt2
619 183, // agc1_pt3
620 206, // agc1_slope1
621 255, // agc1_slope2
622 72, // agc2_pt1
623 152, // agc2_pt2
624 88, // agc2_slope1
625 90, // agc2_slope2
626
627 17, // alpha_mant
628 27, // alpha_exp
629 23, // beta_mant
630 51, // beta_exp
631
632 0, // perform_agc_softsplit
633};
634
635static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
636{
637 return dib7000p_set_gpio(fe, 8, 0, !onoff);
638}
639
640static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
641{
642 return dib7000p_set_gpio(fe, 9, 0, onoff);
643}
644
645static struct dib0070_config dib7070p_dib0070_config[2] = {
646 {
647 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
648 .reset = dib7070_tuner_reset,
649 .sleep = dib7070_tuner_sleep,
650 .clock_khz = 12000,
651 .clock_pad_drive = 4
652 }, {
653 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
654 .reset = dib7070_tuner_reset,
655 .sleep = dib7070_tuner_sleep,
656 .clock_khz = 12000,
657
658 }
659};
660
661static int dib7070_set_param_override(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep)
662{
663 struct dvb_usb_adapter *adap = fe->dvb->priv;
664 struct dib0700_adapter_state *state = adap->priv;
665
666 u16 offset;
667 u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
668 switch (band) {
669 case BAND_VHF: offset = 950; break;
670 case BAND_UHF:
671 default: offset = 550; break;
672 }
673 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
674 dib7000p_set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
675 return state->set_param_save(fe, fep);
676}
677
678static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
679{
680 struct dib0700_adapter_state *st = adap->priv;
681 struct i2c_adapter *tun_i2c = dib7000p_get_i2c_master(adap->fe, DIBX000_I2C_INTERFACE_TUNER, 1);
682
683 if (adap->id == 0) {
684 if (dvb_attach(dib0070_attach, adap->fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
685 return -ENODEV;
686 } else {
687 if (dvb_attach(dib0070_attach, adap->fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
688 return -ENODEV;
689 }
690
691 st->set_param_save = adap->fe->ops.tuner_ops.set_params;
692 adap->fe->ops.tuner_ops.set_params = dib7070_set_param_override;
693 return 0;
694}
695
696static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
697 60000, 15000, // internal, sampling
698 1, 20, 3, 1, 0, // pll_cfg: prediv, ratio, range, reset, bypass
699 0, 0, 1, 1, 2, // misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, modulo
700 (3 << 14) | (1 << 12) | (524 << 0), // sad_cfg: refsel, sel, freq_15k
701 (0 << 25) | 0, // ifreq = 0.000000 MHz
702 20452225, // timf
703 12000000, // xtal_hz
704};
705
706static struct dib7000p_config dib7070p_dib7000p_config = {
707 .output_mpeg2_in_188_bytes = 1,
708
709 .agc_config_count = 1,
710 .agc = &dib7070_agc_config,
711 .bw = &dib7070_bw_config_12_mhz,
712
713 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
714 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
715 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
716
717 .hostbus_diversity = 1,
718};
719
720/* STK7070P */
721static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
722{
723 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
724 msleep(10);
725 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
726 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
727 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
728 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
729
730 dib0700_ctrl_clock(adap->dev, 72, 1);
731
732 msleep(10);
733 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
734 msleep(10);
735 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
736
737 dib7000p_i2c_enumeration(&adap->dev->i2c_adap, 1, 18, &dib7070p_dib7000p_config);
738
739 adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x80, &dib7070p_dib7000p_config);
740 return adap->fe == NULL ? -ENODEV : 0;
741}
742
743/* STK7070PD */
744static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
745 {
746 .output_mpeg2_in_188_bytes = 1,
747
748 .agc_config_count = 1,
749 .agc = &dib7070_agc_config,
750 .bw = &dib7070_bw_config_12_mhz,
751
752 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
753 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
754 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
755
756 .hostbus_diversity = 1,
757 }, {
758 .output_mpeg2_in_188_bytes = 1,
759
760 .agc_config_count = 1,
761 .agc = &dib7070_agc_config,
762 .bw = &dib7070_bw_config_12_mhz,
763
764 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
765 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
766 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
767
768 .hostbus_diversity = 1,
769 }
770};
771
772static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
773{
774 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
775 msleep(10);
776 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
777 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
778 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
779 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
780
781 dib0700_ctrl_clock(adap->dev, 72, 1);
782
783 msleep(10);
784 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
785 msleep(10);
786 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
787
788 dib7000p_i2c_enumeration(&adap->dev->i2c_adap, 2, 18, stk7070pd_dib7000p_config);
789
790 adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
791 return adap->fe == NULL ? -ENODEV : 0;
792}
793
794static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
795{
796 adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
797 return adap->fe == NULL ? -ENODEV : 0;
798}
799
800/* DVB-USB and USB stuff follows */
270struct usb_device_id dib0700_usb_id_table[] = { 801struct usb_device_id dib0700_usb_id_table[] = {
271 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) }, 802/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
272 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) }, 803 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
273 804
274 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) }, 805 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
275 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) }, 806 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
276 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) }, 807 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
277 { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) }, 808/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
278 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) }, 809 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
279 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) }, 810 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
280 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) }, 811 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
281 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) }, 812 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
282 { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) }, 813/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
283 { } /* Terminating entry */ 814 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
815 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
816 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
817 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
818/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
819 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
820 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
821 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
822 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
823/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
824 { 0 } /* Terminating entry */
284}; 825};
285MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); 826MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
286 827
287#define DIB0700_DEFAULT_DEVICE_PROPERTIES \ 828#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
288 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \ 829 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
289 .usb_ctrl = DEVICE_SPECIFIC, \ 830 .usb_ctrl = DEVICE_SPECIFIC, \
290 .firmware = "dvb-usb-dib0700-01.fw", \ 831 .firmware = "dvb-usb-dib0700-03-pre1.fw", \
291 .download_firmware = dib0700_download_firmware, \ 832 .download_firmware = dib0700_download_firmware, \
292 .no_reconnect = 1, \ 833 .no_reconnect = 1, \
293 .size_of_priv = sizeof(struct dib0700_state), \ 834 .size_of_priv = sizeof(struct dib0700_state), \
@@ -321,7 +862,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
321 }, 862 },
322 }, 863 },
323 864
324 .num_device_descs = 6, 865 .num_device_descs = 7,
325 .devices = { 866 .devices = {
326 { "DiBcom STK7700P reference design", 867 { "DiBcom STK7700P reference design",
327 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] }, 868 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
@@ -336,7 +877,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
336 { NULL }, 877 { NULL },
337 }, 878 },
338 { "Compro Videomate U500", 879 { "Compro Videomate U500",
339 { &dib0700_usb_id_table[6], NULL }, 880 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
340 { NULL }, 881 { NULL },
341 }, 882 },
342 { "Uniwill STK7700P based (Hama and others)", 883 { "Uniwill STK7700P based (Hama and others)",
@@ -346,8 +887,17 @@ struct dvb_usb_device_properties dib0700_devices[] = {
346 { "Leadtek Winfast DTV Dongle (STK7700P based)", 887 { "Leadtek Winfast DTV Dongle (STK7700P based)",
347 { &dib0700_usb_id_table[8], NULL }, 888 { &dib0700_usb_id_table[8], NULL },
348 { NULL }, 889 { NULL },
890 },
891 { "AVerMedia AVerTV DVB-T Express",
892 { &dib0700_usb_id_table[20] },
893 { NULL },
349 } 894 }
350 } 895 },
896
897 .rc_interval = DEFAULT_RC_INTERVAL,
898 .rc_key_map = dib0700_rc_keys,
899 .rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
900 .rc_query = dib0700_rc_query
351 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 901 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
352 902
353 .num_adapters = 2, 903 .num_adapters = 2,
@@ -371,8 +921,112 @@ struct dvb_usb_device_properties dib0700_devices[] = {
371 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL }, 921 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
372 { NULL }, 922 { NULL },
373 }, 923 },
924 },
925
926 .rc_interval = DEFAULT_RC_INTERVAL,
927 .rc_key_map = dib0700_rc_keys,
928 .rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
929 .rc_query = dib0700_rc_query
930 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
931
932 .num_adapters = 2,
933 .adapter = {
934 {
935 .frontend_attach = stk7700d_frontend_attach,
936 .tuner_attach = stk7700d_tuner_attach,
937
938 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
939 }, {
940 .frontend_attach = stk7700d_frontend_attach,
941 .tuner_attach = stk7700d_tuner_attach,
942
943 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
944 }
945 },
946
947 .num_device_descs = 4,
948 .devices = {
949 { "Pinnacle PCTV 2000e",
950 { &dib0700_usb_id_table[11], NULL },
951 { NULL },
952 },
953 { "Terratec Cinergy DT XS Diversity",
954 { &dib0700_usb_id_table[12], NULL },
955 { NULL },
956 },
957 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
958 { &dib0700_usb_id_table[13], NULL },
959 { NULL },
960 },
961 { "DiBcom STK7700D reference design",
962 { &dib0700_usb_id_table[14], NULL },
963 { NULL },
964 },
965 },
966
967 .rc_interval = DEFAULT_RC_INTERVAL,
968 .rc_key_map = dib0700_rc_keys,
969 .rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
970 .rc_query = dib0700_rc_query
971
972 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
973
974 .num_adapters = 1,
975 .adapter = {
976 {
977 .frontend_attach = stk7070p_frontend_attach,
978 .tuner_attach = dib7070p_tuner_attach,
979
980 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
981
982 .size_of_priv = sizeof(struct dib0700_adapter_state),
983 },
984 },
985
986 .num_device_descs = 2,
987 .devices = {
988 { "DiBcom STK7070P reference design",
989 { &dib0700_usb_id_table[15], NULL },
990 { NULL },
991 },
992 { "Pinnacle PCTV DVB-T Flash Stick",
993 { &dib0700_usb_id_table[16], NULL },
994 { NULL },
995 },
374 } 996 }
375 } 997 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
998
999 .num_adapters = 2,
1000 .adapter = {
1001 {
1002 .frontend_attach = stk7070pd_frontend_attach0,
1003 .tuner_attach = dib7070p_tuner_attach,
1004
1005 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
1006
1007 .size_of_priv = sizeof(struct dib0700_adapter_state),
1008 }, {
1009 .frontend_attach = stk7070pd_frontend_attach1,
1010 .tuner_attach = dib7070p_tuner_attach,
1011
1012 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
1013
1014 .size_of_priv = sizeof(struct dib0700_adapter_state),
1015 }
1016 },
1017
1018 .num_device_descs = 2,
1019 .devices = {
1020 { "DiBcom STK7070PD reference design",
1021 { &dib0700_usb_id_table[17], NULL },
1022 { NULL },
1023 },
1024 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
1025 { &dib0700_usb_id_table[18], NULL },
1026 { NULL },
1027 },
1028 }
1029 },
376}; 1030};
377 1031
378int dib0700_device_count = ARRAY_SIZE(dib0700_devices); 1032int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
diff --git a/drivers/media/dvb/dvb-usb/dtt200u.c b/drivers/media/dvb/dvb-usb/dtt200u.c
index 7dbe14321019..d86cf9bee91c 100644
--- a/drivers/media/dvb/dvb-usb/dtt200u.c
+++ b/drivers/media/dvb/dvb-usb/dtt200u.c
@@ -1,5 +1,5 @@
1/* DVB USB library compliant Linux driver for the WideView/ Yakumo/ Hama/ 1/* DVB USB library compliant Linux driver for the WideView/ Yakumo/ Hama/
2 * Typhoon/ Yuan DVB-T USB2.0 receiver. 2 * Typhoon/ Yuan/ Miglia DVB-T USB2.0 receiver.
3 * 3 *
4 * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) 4 * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
5 * 5 *
@@ -96,6 +96,7 @@ static struct dvb_usb_device_properties dtt200u_properties;
96static struct dvb_usb_device_properties wt220u_fc_properties; 96static struct dvb_usb_device_properties wt220u_fc_properties;
97static struct dvb_usb_device_properties wt220u_properties; 97static struct dvb_usb_device_properties wt220u_properties;
98static struct dvb_usb_device_properties wt220u_zl0353_properties; 98static struct dvb_usb_device_properties wt220u_zl0353_properties;
99static struct dvb_usb_device_properties wt220u_miglia_properties;
99 100
100static int dtt200u_usb_probe(struct usb_interface *intf, 101static int dtt200u_usb_probe(struct usb_interface *intf,
101 const struct usb_device_id *id) 102 const struct usb_device_id *id)
@@ -103,7 +104,8 @@ static int dtt200u_usb_probe(struct usb_interface *intf,
103 if (dvb_usb_device_init(intf,&dtt200u_properties,THIS_MODULE,NULL) == 0 || 104 if (dvb_usb_device_init(intf,&dtt200u_properties,THIS_MODULE,NULL) == 0 ||
104 dvb_usb_device_init(intf,&wt220u_properties,THIS_MODULE,NULL) == 0 || 105 dvb_usb_device_init(intf,&wt220u_properties,THIS_MODULE,NULL) == 0 ||
105 dvb_usb_device_init(intf,&wt220u_fc_properties,THIS_MODULE,NULL) == 0 || 106 dvb_usb_device_init(intf,&wt220u_fc_properties,THIS_MODULE,NULL) == 0 ||
106 dvb_usb_device_init(intf,&wt220u_zl0353_properties,THIS_MODULE,NULL) == 0) 107 dvb_usb_device_init(intf,&wt220u_zl0353_properties,THIS_MODULE,NULL) == 0 ||
108 dvb_usb_device_init(intf,&wt220u_miglia_properties,THIS_MODULE,NULL) == 0)
107 return 0; 109 return 0;
108 110
109 return -ENODEV; 111 return -ENODEV;
@@ -119,6 +121,7 @@ static struct usb_device_id dtt200u_usb_table [] = {
119 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_FC_COLD) }, 121 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_FC_COLD) },
120 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_FC_WARM) }, 122 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_FC_WARM) },
121 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_ZAP250_COLD) }, 123 { USB_DEVICE(USB_VID_WIDEVIEW, USB_PID_WT220U_ZAP250_COLD) },
124 { USB_DEVICE(USB_VID_MIGLIA, USB_PID_WT220U_ZAP250_COLD) },
122 { 0 }, 125 { 0 },
123}; 126};
124MODULE_DEVICE_TABLE(usb, dtt200u_usb_table); 127MODULE_DEVICE_TABLE(usb, dtt200u_usb_table);
@@ -303,6 +306,25 @@ static struct dvb_usb_device_properties wt220u_zl0353_properties = {
303 } 306 }
304}; 307};
305 308
309static struct dvb_usb_device_properties wt220u_miglia_properties = {
310 .usb_ctrl = CYPRESS_FX2,
311 .firmware = "dvb-usb-wt220u-miglia-01.fw",
312
313 .num_adapters = 1,
314 .generic_bulk_ctrl_endpoint = 0x01,
315
316 .num_device_descs = 1,
317 .devices = {
318 { .name = "WideView WT-220U PenType Receiver (Miglia)",
319 .cold_ids = { &dtt200u_usb_table[9], NULL },
320 /* This device turns into WT220U_ZL0353_WARM when fw
321 has been uploaded */
322 .warm_ids = { NULL },
323 },
324 { NULL },
325 }
326};
327
306/* usb specific object needed to register this driver with the usb subsystem */ 328/* usb specific object needed to register this driver with the usb subsystem */
307static struct usb_driver dtt200u_usb_driver = { 329static struct usb_driver dtt200u_usb_driver = {
308 .name = "dvb_usb_dtt200u", 330 .name = "dvb_usb_dtt200u",
@@ -333,6 +355,6 @@ module_init(dtt200u_usb_module_init);
333module_exit(dtt200u_usb_module_exit); 355module_exit(dtt200u_usb_module_exit);
334 356
335MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); 357MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
336MODULE_DESCRIPTION("Driver for the WideView/Yakumo/Hama/Typhoon/Club3D DVB-T USB2.0 devices"); 358MODULE_DESCRIPTION("Driver for the WideView/Yakumo/Hama/Typhoon/Club3D/Miglia DVB-T USB2.0 devices");
337MODULE_VERSION("1.0"); 359MODULE_VERSION("1.0");
338MODULE_LICENSE("GPL"); 360MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index 4dfab02a8a0d..4fa3e895028a 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -12,7 +12,7 @@
12/* Vendor IDs */ 12/* Vendor IDs */
13#define USB_VID_ADSTECH 0x06e1 13#define USB_VID_ADSTECH 0x06e1
14#define USB_VID_AFATECH 0x15a4 14#define USB_VID_AFATECH 0x15a4
15#define USB_VID_ALCOR_MICRO 0x058f 15#define USB_VID_ALCOR_MICRO 0x058f
16#define USB_VID_ALINK 0x05e3 16#define USB_VID_ALINK 0x05e3
17#define USB_VID_ANCHOR 0x0547 17#define USB_VID_ANCHOR 0x0547
18#define USB_VID_ANUBIS_ELECTRONIC 0x10fd 18#define USB_VID_ANUBIS_ELECTRONIC 0x10fd
@@ -34,6 +34,7 @@
34#define USB_VID_LEADTEK 0x0413 34#define USB_VID_LEADTEK 0x0413
35#define USB_VID_LITEON 0x04ca 35#define USB_VID_LITEON 0x04ca
36#define USB_VID_MEDION 0x1660 36#define USB_VID_MEDION 0x1660
37#define USB_VID_MIGLIA 0x18f3
37#define USB_VID_MSI 0x0db0 38#define USB_VID_MSI 0x0db0
38#define USB_VID_OPERA1 0x695c 39#define USB_VID_OPERA1 0x695c
39#define USB_VID_PINNACLE 0x2304 40#define USB_VID_PINNACLE 0x2304
@@ -58,6 +59,7 @@
58#define USB_PID_COMPRO_DVBU2000_UNK_COLD 0x010c 59#define USB_PID_COMPRO_DVBU2000_UNK_COLD 0x010c
59#define USB_PID_COMPRO_DVBU2000_UNK_WARM 0x010d 60#define USB_PID_COMPRO_DVBU2000_UNK_WARM 0x010d
60#define USB_PID_COMPRO_VIDEOMATE_U500 0x1e78 61#define USB_PID_COMPRO_VIDEOMATE_U500 0x1e78
62#define USB_PID_COMPRO_VIDEOMATE_U500_PC 0x1e80
61#define USB_PID_DIBCOM_HOOK_DEFAULT 0x0064 63#define USB_PID_DIBCOM_HOOK_DEFAULT 0x0064
62#define USB_PID_DIBCOM_HOOK_DEFAULT_REENUM 0x0065 64#define USB_PID_DIBCOM_HOOK_DEFAULT_REENUM 0x0065
63#define USB_PID_DIBCOM_MOD3000_COLD 0x0bb8 65#define USB_PID_DIBCOM_MOD3000_COLD 0x0bb8
@@ -66,6 +68,9 @@
66#define USB_PID_DIBCOM_MOD3001_WARM 0x0bc7 68#define USB_PID_DIBCOM_MOD3001_WARM 0x0bc7
67#define USB_PID_DIBCOM_STK7700P 0x1e14 69#define USB_PID_DIBCOM_STK7700P 0x1e14
68#define USB_PID_DIBCOM_STK7700P_PC 0x1e78 70#define USB_PID_DIBCOM_STK7700P_PC 0x1e78
71#define USB_PID_DIBCOM_STK7700D 0x1ef0
72#define USB_PID_DIBCOM_STK7070P 0x1ebc
73#define USB_PID_DIBCOM_STK7070PD 0x1ebe
69#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131 74#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131
70#define USB_PID_DPOSH_M9206_COLD 0x9206 75#define USB_PID_DPOSH_M9206_COLD 0x9206
71#define USB_PID_DPOSH_M9206_WARM 0xa090 76#define USB_PID_DPOSH_M9206_WARM 0xa090
@@ -115,8 +120,17 @@
115#define USB_PID_HAUPPAUGE_NOVA_T_500_2 0x9950 120#define USB_PID_HAUPPAUGE_NOVA_T_500_2 0x9950
116#define USB_PID_HAUPPAUGE_NOVA_T_STICK 0x7050 121#define USB_PID_HAUPPAUGE_NOVA_T_STICK 0x7050
117#define USB_PID_HAUPPAUGE_NOVA_T_STICK_2 0x7060 122#define USB_PID_HAUPPAUGE_NOVA_T_STICK_2 0x7060
123#define USB_PID_HAUPPAUGE_NOVA_TD_STICK 0x9580
124#define USB_PID_AVERMEDIA_EXPRESS 0xb568
118#define USB_PID_AVERMEDIA_VOLAR 0xa807 125#define USB_PID_AVERMEDIA_VOLAR 0xa807
119#define USB_PID_AVERMEDIA_VOLAR_2 0xb808 126#define USB_PID_AVERMEDIA_VOLAR_2 0xb808
127#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a
128#define USB_PID_PINNACLE_PCTV2000E 0x022c
129#define USB_PID_PINNACLE_PCTV_DVB_T_FLASH 0x0228
130#define USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T 0x0229
131#define USB_PID_PCTV_200E 0x020e
132#define USB_PID_PCTV_400E 0x020f
133#define USB_PID_PCTV_450E 0x0222
120#define USB_PID_NEBULA_DIGITV 0x0201 134#define USB_PID_NEBULA_DIGITV 0x0201
121#define USB_PID_DVICO_BLUEBIRD_LGDT 0xd820 135#define USB_PID_DVICO_BLUEBIRD_LGDT 0xd820
122#define USB_PID_DVICO_BLUEBIRD_LG064F_COLD 0xd500 136#define USB_PID_DVICO_BLUEBIRD_LG064F_COLD 0xd500
@@ -136,9 +150,6 @@
136#define USB_PID_MSI_MEGASKY580_55801 0x5581 150#define USB_PID_MSI_MEGASKY580_55801 0x5581
137#define USB_PID_KYE_DVB_T_COLD 0x701e 151#define USB_PID_KYE_DVB_T_COLD 0x701e
138#define USB_PID_KYE_DVB_T_WARM 0x701f 152#define USB_PID_KYE_DVB_T_WARM 0x701f
139#define USB_PID_PCTV_200E 0x020e
140#define USB_PID_PCTV_400E 0x020f
141#define USB_PID_PCTV_450E 0x0222
142#define USB_PID_LITEON_DVB_T_COLD 0xf000 153#define USB_PID_LITEON_DVB_T_COLD 0xf000
143#define USB_PID_LITEON_DVB_T_WARM 0xf001 154#define USB_PID_LITEON_DVB_T_WARM 0xf001
144#define USB_PID_DIGIVOX_MINI_SL_COLD 0xe360 155#define USB_PID_DIGIVOX_MINI_SL_COLD 0xe360
@@ -148,8 +159,11 @@
148#define USB_PID_WINFAST_DTV_DONGLE_COLD 0x6025 159#define USB_PID_WINFAST_DTV_DONGLE_COLD 0x6025
149#define USB_PID_WINFAST_DTV_DONGLE_WARM 0x6026 160#define USB_PID_WINFAST_DTV_DONGLE_WARM 0x6026
150#define USB_PID_WINFAST_DTV_DONGLE_STK7700P 0x6f00 161#define USB_PID_WINFAST_DTV_DONGLE_STK7700P 0x6f00
151#define USB_PID_GENPIX_8PSK_COLD 0x0200 162#define USB_PID_GENPIX_8PSK_REV_1_COLD 0x0200
152#define USB_PID_GENPIX_8PSK_WARM 0x0201 163#define USB_PID_GENPIX_8PSK_REV_1_WARM 0x0201
164#define USB_PID_GENPIX_8PSK_REV_2 0x0202
165#define USB_PID_GENPIX_SKYWALKER_1 0x0203
166#define USB_PID_GENPIX_SKYWALKER_CW3K 0x0204
153#define USB_PID_SIGMATEK_DVB_110 0x6610 167#define USB_PID_SIGMATEK_DVB_110 0x6610
154#define USB_PID_MSI_DIGI_VOX_MINI_II 0x1513 168#define USB_PID_MSI_DIGI_VOX_MINI_II 0x1513
155#define USB_PID_OPERA1_COLD 0x2830 169#define USB_PID_OPERA1_COLD 0x2830
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-init.c b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
index ffdde83d1e77..cdd717c3fe45 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-init.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
@@ -24,7 +24,7 @@ MODULE_PARM_DESC(disable_rc_polling, "disable remote control polling (default: 0
24 24
25static int dvb_usb_force_pid_filter_usage; 25static int dvb_usb_force_pid_filter_usage;
26module_param_named(force_pid_filter_usage, dvb_usb_force_pid_filter_usage, int, 0444); 26module_param_named(force_pid_filter_usage, dvb_usb_force_pid_filter_usage, int, 0444);
27MODULE_PARM_DESC(disable_rc_polling, "force all dvb-usb-devices to use a PID filter, if any (default: 0)."); 27MODULE_PARM_DESC(force_pid_filter_usage, "force all dvb-usb-devices to use a PID filter, if any (default: 0).");
28 28
29static int dvb_usb_adapter_init(struct dvb_usb_device *d) 29static int dvb_usb_adapter_init(struct dvb_usb_device *d)
30{ 30{
diff --git a/drivers/media/dvb/dvb-usb/gp8psk-fe.c b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
index 6ccbdc9cd772..e37142d9271a 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk-fe.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
@@ -1,7 +1,8 @@
1/* DVB USB compliant Linux driver for the 1/* DVB USB compliant Linux driver for the
2 * - GENPIX 8pks/qpsk USB2.0 DVB-S module 2 * - GENPIX 8pks/qpsk/DCII USB2.0 DVB-S module
3 * 3 *
4 * Copyright (C) 2006 Alan Nisota (alannisota@gmail.com) 4 * Copyright (C) 2006,2007 Alan Nisota (alannisota@gmail.com)
5 * Copyright (C) 2006,2007 Genpix Electronics (genpix@genpix-electronics.com)
5 * 6 *
6 * Thanks to GENPIX for the sample code used to implement this module. 7 * Thanks to GENPIX for the sample code used to implement this module.
7 * 8 *
@@ -17,27 +18,39 @@
17 18
18struct gp8psk_fe_state { 19struct gp8psk_fe_state {
19 struct dvb_frontend fe; 20 struct dvb_frontend fe;
20
21 struct dvb_usb_device *d; 21 struct dvb_usb_device *d;
22 22 u8 lock;
23 u16 snr; 23 u16 snr;
24 24 unsigned long next_status_check;
25 unsigned long next_snr_check; 25 unsigned long status_check_interval;
26}; 26};
27 27
28static int gp8psk_fe_update_status(struct gp8psk_fe_state *st)
29{
30 u8 buf[6];
31 if (time_after(jiffies,st->next_status_check)) {
32 gp8psk_usb_in_op(st->d, GET_SIGNAL_LOCK, 0,0,&st->lock,1);
33 gp8psk_usb_in_op(st->d, GET_SIGNAL_STRENGTH, 0,0,buf,6);
34 st->snr = (buf[1]) << 8 | buf[0];
35 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
36 }
37 return 0;
38}
39
28static int gp8psk_fe_read_status(struct dvb_frontend* fe, fe_status_t *status) 40static int gp8psk_fe_read_status(struct dvb_frontend* fe, fe_status_t *status)
29{ 41{
30 struct gp8psk_fe_state *st = fe->demodulator_priv; 42 struct gp8psk_fe_state *st = fe->demodulator_priv;
31 u8 lock; 43 gp8psk_fe_update_status(st);
32 44
33 if (gp8psk_usb_in_op(st->d, GET_SIGNAL_LOCK, 0, 0, &lock,1)) 45 if (st->lock)
34 return -EINVAL;
35
36 if (lock)
37 *status = FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_SIGNAL | FE_HAS_CARRIER; 46 *status = FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_SIGNAL | FE_HAS_CARRIER;
38 else 47 else
39 *status = 0; 48 *status = 0;
40 49
50 if (*status & FE_HAS_LOCK)
51 st->status_check_interval = 1000;
52 else
53 st->status_check_interval = 100;
41 return 0; 54 return 0;
42} 55}
43 56
@@ -60,33 +73,29 @@ static int gp8psk_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc)
60static int gp8psk_fe_read_snr(struct dvb_frontend* fe, u16 *snr) 73static int gp8psk_fe_read_snr(struct dvb_frontend* fe, u16 *snr)
61{ 74{
62 struct gp8psk_fe_state *st = fe->demodulator_priv; 75 struct gp8psk_fe_state *st = fe->demodulator_priv;
63 u8 buf[2]; 76 gp8psk_fe_update_status(st);
64 77 /* snr is reported in dBu*256 */
65 if (time_after(jiffies,st->next_snr_check)) { 78 *snr = st->snr;
66 gp8psk_usb_in_op(st->d,GET_SIGNAL_STRENGTH,0,0,buf,2);
67 *snr = (int)(buf[1]) << 8 | buf[0];
68 /* snr is reported in dBu*256 */
69 /* snr / 38.4 ~= 100% strength */
70 /* snr * 17 returns 100% strength as 65535 */
71 if (*snr <= 3855)
72 *snr = (*snr<<4) + *snr; // snr * 17
73 else
74 *snr = 65535;
75 st->next_snr_check = jiffies + (10*HZ)/1000;
76 } else {
77 *snr = st->snr;
78 }
79 return 0; 79 return 0;
80} 80}
81 81
82static int gp8psk_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength) 82static int gp8psk_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength)
83{ 83{
84 return gp8psk_fe_read_snr(fe, strength); 84 struct gp8psk_fe_state *st = fe->demodulator_priv;
85 gp8psk_fe_update_status(st);
86 /* snr is reported in dBu*256 */
87 /* snr / 38.4 ~= 100% strength */
88 /* snr * 17 returns 100% strength as 65535 */
89 if (st->snr > 0xf00)
90 *strength = 0xffff;
91 else
92 *strength = (st->snr << 4) + st->snr; /* snr*17 */
93 return 0;
85} 94}
86 95
87static int gp8psk_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune) 96static int gp8psk_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
88{ 97{
89 tune->min_delay_ms = 800; 98 tune->min_delay_ms = 200;
90 return 0; 99 return 0;
91} 100}
92 101
@@ -124,7 +133,9 @@ static int gp8psk_fe_set_frontend(struct dvb_frontend* fe,
124 133
125 gp8psk_usb_out_op(state->d,TUNE_8PSK,0,0,cmd,10); 134 gp8psk_usb_out_op(state->d,TUNE_8PSK,0,0,cmd,10);
126 135
127 state->next_snr_check = jiffies; 136 state->lock = 0;
137 state->next_status_check = jiffies;
138 state->status_check_interval = 200;
128 139
129 return 0; 140 return 0;
130} 141}
@@ -190,6 +201,12 @@ static int gp8psk_fe_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t volt
190 return 0; 201 return 0;
191} 202}
192 203
204static int gp8psk_fe_enable_high_lnb_voltage(struct dvb_frontend* fe, long onoff)
205{
206 struct gp8psk_fe_state* state = fe->demodulator_priv;
207 return gp8psk_usb_out_op(state->d, USE_EXTRA_VOLT, onoff, 0,NULL,0);
208}
209
193static int gp8psk_fe_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long sw_cmd) 210static int gp8psk_fe_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long sw_cmd)
194{ 211{
195 struct gp8psk_fe_state* state = fe->demodulator_priv; 212 struct gp8psk_fe_state* state = fe->demodulator_priv;
@@ -235,10 +252,10 @@ success:
235 252
236static struct dvb_frontend_ops gp8psk_fe_ops = { 253static struct dvb_frontend_ops gp8psk_fe_ops = {
237 .info = { 254 .info = {
238 .name = "Genpix 8psk-USB DVB-S", 255 .name = "Genpix 8psk-to-USB2 DVB-S",
239 .type = FE_QPSK, 256 .type = FE_QPSK,
240 .frequency_min = 950000, 257 .frequency_min = 800000,
241 .frequency_max = 2150000, 258 .frequency_max = 2250000,
242 .frequency_stepsize = 100, 259 .frequency_stepsize = 100,
243 .symbol_rate_min = 1000000, 260 .symbol_rate_min = 1000000,
244 .symbol_rate_max = 45000000, 261 .symbol_rate_max = 45000000,
@@ -269,4 +286,5 @@ static struct dvb_frontend_ops gp8psk_fe_ops = {
269 .set_tone = gp8psk_fe_set_tone, 286 .set_tone = gp8psk_fe_set_tone,
270 .set_voltage = gp8psk_fe_set_voltage, 287 .set_voltage = gp8psk_fe_set_voltage,
271 .dishnetwork_send_legacy_command = gp8psk_fe_send_legacy_dish_cmd, 288 .dishnetwork_send_legacy_command = gp8psk_fe_send_legacy_dish_cmd,
289 .enable_high_lnb_voltage = gp8psk_fe_enable_high_lnb_voltage
272}; 290};
diff --git a/drivers/media/dvb/dvb-usb/gp8psk.c b/drivers/media/dvb/dvb-usb/gp8psk.c
index 518d67fca5e8..92147ee3e14f 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk.c
@@ -1,7 +1,8 @@
1/* DVB USB compliant Linux driver for the 1/* DVB USB compliant Linux driver for the
2 * - GENPIX 8pks/qpsk USB2.0 DVB-S module 2 * - GENPIX 8pks/qpsk/DCII USB2.0 DVB-S module
3 * 3 *
4 * Copyright (C) 2006 Alan Nisota (alannisota@gmail.com) 4 * Copyright (C) 2006,2007 Alan Nisota (alannisota@gmail.com)
5 * Copyright (C) 2006,2007 Genpix Electronics (genpix@genpix-electronics.com)
5 * 6 *
6 * Thanks to GENPIX for the sample code used to implement this module. 7 * Thanks to GENPIX for the sample code used to implement this module.
7 * 8 *
@@ -40,7 +41,7 @@ int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8
40 } 41 }
41 42
42 if (ret < 0 || ret != blen) { 43 if (ret < 0 || ret != blen) {
43 warn("usb in operation failed."); 44 warn("usb in %d operation failed.", req);
44 ret = -EIO; 45 ret = -EIO;
45 } else 46 } else
46 ret = 0; 47 ret = 0;
@@ -97,10 +98,10 @@ static int gp8psk_load_bcm4500fw(struct dvb_usb_device *d)
97 if (gp8psk_usb_out_op(d, LOAD_BCM4500,1,0,NULL, 0)) 98 if (gp8psk_usb_out_op(d, LOAD_BCM4500,1,0,NULL, 0))
98 goto out_rel_fw; 99 goto out_rel_fw;
99 100
100 info("downloaidng bcm4500 firmware from file '%s'",bcm4500_firmware); 101 info("downloading bcm4500 firmware from file '%s'",bcm4500_firmware);
101 102
102 ptr = fw->data; 103 ptr = fw->data;
103 buf = kmalloc(512, GFP_KERNEL | GFP_DMA); 104 buf = kmalloc(64, GFP_KERNEL | GFP_DMA);
104 105
105 while (ptr[0] != 0xff) { 106 while (ptr[0] != 0xff) {
106 u16 buflen = ptr[0] + 4; 107 u16 buflen = ptr[0] + 4;
@@ -129,25 +130,34 @@ out_rel_fw:
129static int gp8psk_power_ctrl(struct dvb_usb_device *d, int onoff) 130static int gp8psk_power_ctrl(struct dvb_usb_device *d, int onoff)
130{ 131{
131 u8 status, buf; 132 u8 status, buf;
133 int gp_product_id = le16_to_cpu(d->udev->descriptor.idProduct);
134
132 if (onoff) { 135 if (onoff) {
133 gp8psk_usb_in_op(d, GET_8PSK_CONFIG,0,0,&status,1); 136 gp8psk_usb_in_op(d, GET_8PSK_CONFIG,0,0,&status,1);
134 if (! (status & 0x01)) /* started */ 137 if (! (status & bm8pskStarted)) { /* started */
138 if(gp_product_id == USB_PID_GENPIX_SKYWALKER_CW3K)
139 gp8psk_usb_out_op(d, CW3K_INIT, 1, 0, NULL, 0);
135 if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1)) 140 if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1))
136 return -EINVAL; 141 return -EINVAL;
142 }
137 143
138 if (! (status & 0x02)) /* BCM4500 firmware loaded */ 144 if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
139 if(gp8psk_load_bcm4500fw(d)) 145 if (! (status & bm8pskFW_Loaded)) /* BCM4500 firmware loaded */
140 return EINVAL; 146 if(gp8psk_load_bcm4500fw(d))
147 return EINVAL;
141 148
142 if (! (status & 0x04)) /* LNB Power */ 149 if (! (status & bmIntersilOn)) /* LNB Power */
143 if (gp8psk_usb_in_op(d, START_INTERSIL, 1, 0, 150 if (gp8psk_usb_in_op(d, START_INTERSIL, 1, 0,
144 &buf, 1)) 151 &buf, 1))
145 return EINVAL; 152 return EINVAL;
146 153
147 /* Set DVB mode */ 154 /* Set DVB mode to 1 */
148 if(gp8psk_usb_out_op(d, SET_DVB_MODE, 1, 0, NULL, 0)) 155 if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
149 return -EINVAL; 156 if (gp8psk_usb_out_op(d, SET_DVB_MODE, 1, 0, NULL, 0))
150 gp8psk_usb_in_op(d, GET_8PSK_CONFIG,0,0,&status,1); 157 return EINVAL;
158 /* Abort possible TS (if previous tune crashed) */
159 if (gp8psk_usb_out_op(d, ARM_TRANSFER, 0, 0, NULL, 0))
160 return EINVAL;
151 } else { 161 } else {
152 /* Turn off LNB power */ 162 /* Turn off LNB power */
153 if (gp8psk_usb_in_op(d, START_INTERSIL, 0, 0, &buf, 1)) 163 if (gp8psk_usb_in_op(d, START_INTERSIL, 0, 0, &buf, 1))
@@ -155,11 +165,28 @@ static int gp8psk_power_ctrl(struct dvb_usb_device *d, int onoff)
155 /* Turn off 8psk power */ 165 /* Turn off 8psk power */
156 if (gp8psk_usb_in_op(d, BOOT_8PSK, 0, 0, &buf, 1)) 166 if (gp8psk_usb_in_op(d, BOOT_8PSK, 0, 0, &buf, 1))
157 return -EINVAL; 167 return -EINVAL;
158 168 if(gp_product_id == USB_PID_GENPIX_SKYWALKER_CW3K)
169 gp8psk_usb_out_op(d, CW3K_INIT, 0, 0, NULL, 0);
159 } 170 }
160 return 0; 171 return 0;
161} 172}
162 173
174int gp8psk_bcm4500_reload(struct dvb_usb_device *d)
175{
176 u8 buf;
177 int gp_product_id = le16_to_cpu(d->udev->descriptor.idProduct);
178 /* Turn off 8psk power */
179 if (gp8psk_usb_in_op(d, BOOT_8PSK, 0, 0, &buf, 1))
180 return -EINVAL;
181 /* Turn On 8psk power */
182 if (gp8psk_usb_in_op(d, BOOT_8PSK, 1, 0, &buf, 1))
183 return -EINVAL;
184 /* load BCM4500 firmware */
185 if (gp_product_id == USB_PID_GENPIX_8PSK_REV_1_WARM)
186 if (gp8psk_load_bcm4500fw(d))
187 return EINVAL;
188 return 0;
189}
163 190
164static int gp8psk_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff) 191static int gp8psk_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
165{ 192{
@@ -177,12 +204,22 @@ static struct dvb_usb_device_properties gp8psk_properties;
177static int gp8psk_usb_probe(struct usb_interface *intf, 204static int gp8psk_usb_probe(struct usb_interface *intf,
178 const struct usb_device_id *id) 205 const struct usb_device_id *id)
179{ 206{
180 return dvb_usb_device_init(intf,&gp8psk_properties,THIS_MODULE,NULL); 207 int ret;
208 struct usb_device *udev = interface_to_usbdev(intf);
209 ret = dvb_usb_device_init(intf,&gp8psk_properties,THIS_MODULE,NULL);
210 if (ret == 0) {
211 info("found Genpix USB device pID = %x (hex)",
212 le16_to_cpu(udev->descriptor.idProduct));
213 }
214 return ret;
181} 215}
182 216
183static struct usb_device_id gp8psk_usb_table [] = { 217static struct usb_device_id gp8psk_usb_table [] = {
184 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_COLD) }, 218 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_REV_1_COLD) },
185 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_WARM) }, 219 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_REV_1_WARM) },
220 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_8PSK_REV_2) },
221 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_SKYWALKER_1) },
222 { USB_DEVICE(USB_VID_GENPIX, USB_PID_GENPIX_SKYWALKER_CW3K) },
186 { 0 }, 223 { 0 },
187}; 224};
188MODULE_DEVICE_TABLE(usb, gp8psk_usb_table); 225MODULE_DEVICE_TABLE(usb, gp8psk_usb_table);
@@ -213,12 +250,24 @@ static struct dvb_usb_device_properties gp8psk_properties = {
213 250
214 .generic_bulk_ctrl_endpoint = 0x01, 251 .generic_bulk_ctrl_endpoint = 0x01,
215 252
216 .num_device_descs = 1, 253 .num_device_descs = 4,
217 .devices = { 254 .devices = {
218 { .name = "Genpix 8PSK-USB DVB-S USB2.0 receiver", 255 { .name = "Genpix 8PSK-to-USB2 Rev.1 DVB-S receiver",
219 .cold_ids = { &gp8psk_usb_table[0], NULL }, 256 .cold_ids = { &gp8psk_usb_table[0], NULL },
220 .warm_ids = { &gp8psk_usb_table[1], NULL }, 257 .warm_ids = { &gp8psk_usb_table[1], NULL },
221 }, 258 },
259 { .name = "Genpix 8PSK-to-USB2 Rev.2 DVB-S receiver",
260 .cold_ids = { NULL },
261 .warm_ids = { &gp8psk_usb_table[2], NULL },
262 },
263 { .name = "Genpix SkyWalker-1 DVB-S receiver",
264 .cold_ids = { NULL },
265 .warm_ids = { &gp8psk_usb_table[3], NULL },
266 },
267 { .name = "Genpix SkyWalker-CW3K DVB-S receiver",
268 .cold_ids = { NULL },
269 .warm_ids = { &gp8psk_usb_table[4], NULL },
270 },
222 { NULL }, 271 { NULL },
223 } 272 }
224}; 273};
@@ -253,6 +302,6 @@ module_init(gp8psk_usb_module_init);
253module_exit(gp8psk_usb_module_exit); 302module_exit(gp8psk_usb_module_exit);
254 303
255MODULE_AUTHOR("Alan Nisota <alannisota@gamil.com>"); 304MODULE_AUTHOR("Alan Nisota <alannisota@gamil.com>");
256MODULE_DESCRIPTION("Driver for Genpix 8psk-USB DVB-S USB2.0"); 305MODULE_DESCRIPTION("Driver for Genpix 8psk-to-USB2 DVB-S");
257MODULE_VERSION("1.0"); 306MODULE_VERSION("1.1");
258MODULE_LICENSE("GPL"); 307MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/dvb-usb/gp8psk.h b/drivers/media/dvb/dvb-usb/gp8psk.h
index 3eba7061011c..e83a57506cfa 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk.h
+++ b/drivers/media/dvb/dvb-usb/gp8psk.h
@@ -1,7 +1,8 @@
1/* DVB USB compliant Linux driver for the 1/* DVB USB compliant Linux driver for the
2 * - GENPIX 8pks/qpsk USB2.0 DVB-S module 2 * - GENPIX 8pks/qpsk/DCII USB2.0 DVB-S module
3 * 3 *
4 * Copyright (C) 2006 Alan Nisota (alannisota@gmail.com) 4 * Copyright (C) 2006 Alan Nisota (alannisota@gmail.com)
5 * Copyright (C) 2006,2007 Alan Nisota (alannisota@gmail.com)
5 * 6 *
6 * Thanks to GENPIX for the sample code used to implement this module. 7 * Thanks to GENPIX for the sample code used to implement this module.
7 * 8 *
@@ -30,21 +31,37 @@ extern int dvb_usb_gp8psk_debug;
30#define TH_COMMAND_IN 0xC0 31#define TH_COMMAND_IN 0xC0
31#define TH_COMMAND_OUT 0xC1 32#define TH_COMMAND_OUT 0xC1
32 33
33/* command bytes */ 34/* gp8psk commands */
34#define GET_8PSK_CONFIG 0x80 35
36#define GET_8PSK_CONFIG 0x80 /* in */
35#define SET_8PSK_CONFIG 0x81 37#define SET_8PSK_CONFIG 0x81
38#define I2C_WRITE 0x83
39#define I2C_READ 0x84
36#define ARM_TRANSFER 0x85 40#define ARM_TRANSFER 0x85
37#define TUNE_8PSK 0x86 41#define TUNE_8PSK 0x86
38#define GET_SIGNAL_STRENGTH 0x87 42#define GET_SIGNAL_STRENGTH 0x87 /* in */
39#define LOAD_BCM4500 0x88 43#define LOAD_BCM4500 0x88
40#define BOOT_8PSK 0x89 44#define BOOT_8PSK 0x89 /* in */
41#define START_INTERSIL 0x8A 45#define START_INTERSIL 0x8A /* in */
42#define SET_LNB_VOLTAGE 0x8B 46#define SET_LNB_VOLTAGE 0x8B
43#define SET_22KHZ_TONE 0x8C 47#define SET_22KHZ_TONE 0x8C
44#define SEND_DISEQC_COMMAND 0x8D 48#define SEND_DISEQC_COMMAND 0x8D
45#define SET_DVB_MODE 0x8E 49#define SET_DVB_MODE 0x8E
46#define SET_DN_SWITCH 0x8F 50#define SET_DN_SWITCH 0x8F
47#define GET_SIGNAL_LOCK 0x90 51#define GET_SIGNAL_LOCK 0x90 /* in */
52#define GET_SERIAL_NUMBER 0x93 /* in */
53#define USE_EXTRA_VOLT 0x94
54#define CW3K_INIT 0x9d
55
56/* PSK_configuration bits */
57#define bm8pskStarted 0x01
58#define bm8pskFW_Loaded 0x02
59#define bmIntersilOn 0x04
60#define bmDVBmode 0x08
61#define bm22kHz 0x10
62#define bmSEL18V 0x20
63#define bmDCtuned 0x40
64#define bmArmed 0x80
48 65
49/* Satellite modulation modes */ 66/* Satellite modulation modes */
50#define ADV_MOD_DVB_QPSK 0 /* DVB-S QPSK */ 67#define ADV_MOD_DVB_QPSK 0 /* DVB-S QPSK */
@@ -75,5 +92,6 @@ extern struct dvb_frontend * gp8psk_fe_attach(struct dvb_usb_device *d);
75extern int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen); 92extern int gp8psk_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen);
76extern int gp8psk_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value, 93extern int gp8psk_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value,
77 u16 index, u8 *b, int blen); 94 u16 index, u8 *b, int blen);
95extern int gp8psk_bcm4500_reload(struct dvb_usb_device *d);
78 96
79#endif 97#endif
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c
index 69a46b3607a2..5bbd2d5192f0 100644
--- a/drivers/media/dvb/dvb-usb/vp7045.c
+++ b/drivers/media/dvb/dvb-usb/vp7045.c
@@ -159,7 +159,7 @@ static int vp7045_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
159 return 0; 159 return 0;
160 } 160 }
161 161
162 for (i = 0; i < sizeof(vp7045_rc_keys)/sizeof(struct dvb_usb_rc_key); i++) 162 for (i = 0; i < ARRAY_SIZE(vp7045_rc_keys); i++)
163 if (vp7045_rc_keys[i].data == key) { 163 if (vp7045_rc_keys[i].data == key) {
164 *state = REMOTE_KEY_PRESSED; 164 *state = REMOTE_KEY_PRESSED;
165 *event = vp7045_rc_keys[i].event; 165 *event = vp7045_rc_keys[i].event;
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index ff448761dcef..59b9ed1f1aec 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -283,6 +283,14 @@ config DVB_LGDT330X
283 An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want 283 An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
284 to support this frontend. 284 to support this frontend.
285 285
286config DVB_S5H1409
287 tristate "Samsung S5H1409 based"
288 depends on DVB_CORE && I2C
289 default m if DVB_FE_CUSTOMISE
290 help
291 An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want
292 to support this frontend.
293
286comment "Tuners/PLL support" 294comment "Tuners/PLL support"
287 depends on DVB_CORE 295 depends on DVB_CORE
288 296
@@ -291,7 +299,7 @@ config DVB_PLL
291 depends on DVB_CORE && I2C 299 depends on DVB_CORE && I2C
292 default m if DVB_FE_CUSTOMISE 300 default m if DVB_FE_CUSTOMISE
293 help 301 help
294 This module driver a number of tuners based on PLL chips with a 302 This module drives a number of tuners based on PLL chips with a
295 common I2C interface. Say Y when you want to support these tuners. 303 common I2C interface. Say Y when you want to support these tuners.
296 304
297config DVB_TDA826X 305config DVB_TDA826X
@@ -322,6 +330,29 @@ config DVB_TUNER_MT2060
322 help 330 help
323 A driver for the silicon IF tuner MT2060 from Microtune. 331 A driver for the silicon IF tuner MT2060 from Microtune.
324 332
333config DVB_TUNER_MT2266
334 tristate "Microtune MT2266 silicon tuner"
335 depends on I2C
336 default m if DVB_FE_CUSTOMISE
337 help
338 A driver for the silicon baseband tuner MT2266 from Microtune.
339
340config DVB_TUNER_MT2131
341 tristate "Microtune MT2131 silicon tuner"
342 depends on I2C
343 default m if DVB_FE_CUSTOMISE
344 help
345 A driver for the silicon baseband tuner MT2131 from Microtune.
346
347config DVB_TUNER_DIB0070
348 tristate "DiBcom DiB0070 silicon base-band tuner"
349 depends on I2C
350 default m if DVB_FE_CUSTOMISE
351 help
352 A driver for the silicon baseband tuner DiB0070 from DiBcom.
353 This device is only used inside a SiP called togther with a
354 demodulator for now.
355
325comment "Miscellaneous devices" 356comment "Miscellaneous devices"
326 depends on DVB_CORE 357 depends on DVB_CORE
327 358
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 156b062e02c4..4b8ad1f132aa 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -40,5 +40,9 @@ obj-$(CONFIG_DVB_TDA10086) += tda10086.o
40obj-$(CONFIG_DVB_TDA826X) += tda826x.o 40obj-$(CONFIG_DVB_TDA826X) += tda826x.o
41obj-$(CONFIG_DVB_TDA827X) += tda827x.o 41obj-$(CONFIG_DVB_TDA827X) += tda827x.o
42obj-$(CONFIG_DVB_TUNER_MT2060) += mt2060.o 42obj-$(CONFIG_DVB_TUNER_MT2060) += mt2060.o
43obj-$(CONFIG_DVB_TUNER_MT2266) += mt2266.o
44obj-$(CONFIG_DVB_TUNER_DIB0070) += dib0070.o
43obj-$(CONFIG_DVB_TUNER_QT1010) += qt1010.o 45obj-$(CONFIG_DVB_TUNER_QT1010) += qt1010.o
44obj-$(CONFIG_DVB_TUA6100) += tua6100.o 46obj-$(CONFIG_DVB_TUA6100) += tua6100.o
47obj-$(CONFIG_DVB_TUNER_MT2131) += mt2131.o
48obj-$(CONFIG_DVB_S5H1409) += s5h1409.o
diff --git a/drivers/media/dvb/frontends/bcm3510.c b/drivers/media/dvb/frontends/bcm3510.c
index baeb311de893..a913f49c062b 100644
--- a/drivers/media/dvb/frontends/bcm3510.c
+++ b/drivers/media/dvb/frontends/bcm3510.c
@@ -33,7 +33,6 @@
33 33
34#include <linux/init.h> 34#include <linux/init.h>
35#include <linux/module.h> 35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/device.h> 36#include <linux/device.h>
38#include <linux/firmware.h> 37#include <linux/firmware.h>
39#include <linux/jiffies.h> 38#include <linux/jiffies.h>
diff --git a/drivers/media/dvb/frontends/cx22700.c b/drivers/media/dvb/frontends/cx22700.c
index 13ad1bfae663..11a4968f18cb 100644
--- a/drivers/media/dvb/frontends/cx22700.c
+++ b/drivers/media/dvb/frontends/cx22700.c
@@ -23,7 +23,6 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/string.h> 26#include <linux/string.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include "dvb_frontend.h" 28#include "dvb_frontend.h"
diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c
index 10fc0c8316dd..b03d8283c37d 100644
--- a/drivers/media/dvb/frontends/cx24110.c
+++ b/drivers/media/dvb/frontends/cx24110.c
@@ -25,7 +25,6 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/init.h> 28#include <linux/init.h>
30 29
31#include "dvb_frontend.h" 30#include "dvb_frontend.h"
diff --git a/drivers/media/dvb/frontends/cx24123.c b/drivers/media/dvb/frontends/cx24123.c
index 0834c0677fef..d74fdbd63361 100644
--- a/drivers/media/dvb/frontends/cx24123.c
+++ b/drivers/media/dvb/frontends/cx24123.c
@@ -23,7 +23,6 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h> 26#include <linux/init.h>
28 27
29#include "dvb_frontend.h" 28#include "dvb_frontend.h"
diff --git a/drivers/media/dvb/frontends/dib0070.c b/drivers/media/dvb/frontends/dib0070.c
new file mode 100644
index 000000000000..481eaa684157
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib0070.c
@@ -0,0 +1,580 @@
1/*
2 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
3 *
4 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 */
10#include <linux/kernel.h>
11#include <linux/i2c.h>
12
13#include "dvb_frontend.h"
14
15#include "dib0070.h"
16#include "dibx000_common.h"
17
18static int debug;
19module_param(debug, int, 0644);
20MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
21
22#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB0070: "); printk(args); printk("\n"); } } while (0)
23
24#define DIB0070_P1D 0x00
25#define DIB0070_P1F 0x01
26#define DIB0070_P1G 0x03
27#define DIB0070S_P1A 0x02
28
29struct dib0070_state {
30 struct i2c_adapter *i2c;
31 struct dvb_frontend *fe;
32 const struct dib0070_config *cfg;
33 u16 wbd_ff_offset;
34 u8 revision;
35};
36
37static uint16_t dib0070_read_reg(struct dib0070_state *state, u8 reg)
38{
39 u8 b[2];
40 struct i2c_msg msg[2] = {
41 { .addr = state->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 },
42 { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = b, .len = 2 },
43 };
44 if (i2c_transfer(state->i2c, msg, 2) != 2) {
45 printk(KERN_WARNING "DiB0070 I2C read failed\n");
46 return 0;
47 }
48 return (b[0] << 8) | b[1];
49}
50
51static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
52{
53 u8 b[3] = { reg, val >> 8, val & 0xff };
54 struct i2c_msg msg = { .addr = state->cfg->i2c_address, .flags = 0, .buf = b, .len = 3 };
55 if (i2c_transfer(state->i2c, &msg, 1) != 1) {
56 printk(KERN_WARNING "DiB0070 I2C write failed\n");
57 return -EREMOTEIO;
58 }
59 return 0;
60}
61
62#define HARD_RESET(state) do { if (state->cfg->reset) { state->cfg->reset(state->fe,1); msleep(10); state->cfg->reset(state->fe,0); msleep(10); } } while (0)
63
64static int dib0070_set_bandwidth(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
65{
66 struct dib0070_state *st = fe->tuner_priv;
67 u16 tmp = 0;
68 tmp = dib0070_read_reg(st, 0x02) & 0x3fff;
69
70 switch(BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)) {
71 case 8000:
72 tmp |= (0 << 14);
73 break;
74 case 7000:
75 tmp |= (1 << 14);
76 break;
77 case 6000:
78 tmp |= (2 << 14);
79 break;
80 case 5000:
81 default:
82 tmp |= (3 << 14);
83 break;
84 }
85 dib0070_write_reg(st, 0x02, tmp);
86 return 0;
87}
88
89static void dib0070_captrim(struct dib0070_state *st, u16 LO4)
90{
91 int8_t captrim, fcaptrim, step_sign, step;
92 u16 adc, adc_diff = 3000;
93
94
95
96 dib0070_write_reg(st, 0x0f, 0xed10);
97 dib0070_write_reg(st, 0x17, 0x0034);
98
99 dib0070_write_reg(st, 0x18, 0x0032);
100 msleep(2);
101
102 step = captrim = fcaptrim = 64;
103
104 do {
105 step /= 2;
106 dib0070_write_reg(st, 0x14, LO4 | captrim);
107 msleep(1);
108 adc = dib0070_read_reg(st, 0x19);
109
110 dprintk( "CAPTRIM=%hd; ADC = %hd (ADC) & %dmV", captrim, adc, (u32) adc*(u32)1800/(u32)1024);
111
112 if (adc >= 400) {
113 adc -= 400;
114 step_sign = -1;
115 } else {
116 adc = 400 - adc;
117 step_sign = 1;
118 }
119
120 if (adc < adc_diff) {
121 dprintk( "CAPTRIM=%hd is closer to target (%hd/%hd)", captrim, adc, adc_diff);
122 adc_diff = adc;
123 fcaptrim = captrim;
124
125
126
127 }
128 captrim += (step_sign * step);
129 } while (step >= 1);
130
131 dib0070_write_reg(st, 0x14, LO4 | fcaptrim);
132 dib0070_write_reg(st, 0x18, 0x07ff);
133}
134
135#define LPF 100 // define for the loop filter 100kHz by default 16-07-06
136#define LO4_SET_VCO_HFDIV(l, v, h) l |= ((v) << 11) | ((h) << 7)
137#define LO4_SET_SD(l, s) l |= ((s) << 14) | ((s) << 12)
138#define LO4_SET_CTRIM(l, c) l |= (c) << 10
139static int dib0070_tune_digital(struct dvb_frontend *fe, struct dvb_frontend_parameters *ch)
140{
141 struct dib0070_state *st = fe->tuner_priv;
142 u32 freq = ch->frequency/1000 + (BAND_OF_FREQUENCY(ch->frequency/1000) == BAND_VHF ? st->cfg->freq_offset_khz_vhf : st->cfg->freq_offset_khz_uhf);
143
144 u8 band = BAND_OF_FREQUENCY(freq), c;
145
146 /*******************VCO***********************************/
147 u16 lo4 = 0;
148
149 u8 REFDIV, PRESC = 2;
150 u32 FBDiv, Rest, FREF, VCOF_kHz;
151 u16 Num, Den;
152 /*******************FrontEnd******************************/
153 u16 value = 0;
154
155 dprintk( "Tuning for Band: %hd (%d kHz)", band, freq);
156
157
158 dib0070_write_reg(st, 0x17, 0x30);
159
160 dib0070_set_bandwidth(fe, ch); /* c is used as HF */
161 switch (st->revision) {
162 case DIB0070S_P1A:
163 switch (band) {
164 case BAND_LBAND:
165 LO4_SET_VCO_HFDIV(lo4, 1, 1);
166 c = 2;
167 break;
168 case BAND_SBAND:
169 LO4_SET_VCO_HFDIV(lo4, 0, 0);
170 LO4_SET_CTRIM(lo4, 1);;
171 c = 1;
172 break;
173 case BAND_UHF:
174 default:
175 if (freq < 570000) {
176 LO4_SET_VCO_HFDIV(lo4, 1, 3);
177 PRESC = 6; c = 6;
178 } else if (freq < 680000) {
179 LO4_SET_VCO_HFDIV(lo4, 0, 2);
180 c = 4;
181 } else {
182 LO4_SET_VCO_HFDIV(lo4, 1, 2);
183 c = 4;
184 }
185 break;
186 } break;
187
188 case DIB0070_P1G:
189 case DIB0070_P1F:
190 default:
191 switch (band) {
192 case BAND_FM:
193 LO4_SET_VCO_HFDIV(lo4, 0, 7);
194 c = 24;
195 break;
196 case BAND_LBAND:
197 LO4_SET_VCO_HFDIV(lo4, 1, 0);
198 c = 2;
199 break;
200 case BAND_VHF:
201 if (freq < 180000) {
202 LO4_SET_VCO_HFDIV(lo4, 0, 3);
203 c = 16;
204 } else if (freq < 190000) {
205 LO4_SET_VCO_HFDIV(lo4, 1, 3);
206 c = 16;
207 } else {
208 LO4_SET_VCO_HFDIV(lo4, 0, 6);
209 c = 12;
210 }
211 break;
212
213 case BAND_UHF:
214 default:
215 if (freq < 570000) {
216 LO4_SET_VCO_HFDIV(lo4, 1, 5);
217 c = 6;
218 } else if (freq < 700000) {
219 LO4_SET_VCO_HFDIV(lo4, 0, 1);
220 c = 4;
221 } else {
222 LO4_SET_VCO_HFDIV(lo4, 1, 1);
223 c = 4;
224 }
225 break;
226 }
227 break;
228 }
229
230 dprintk( "HFDIV code: %hd", (lo4 >> 7) & 0xf);
231 dprintk( "VCO = %hd", (lo4 >> 11) & 0x3);
232
233
234 VCOF_kHz = (c * freq) * 2;
235 dprintk( "VCOF in kHz: %d ((%hd*%d) << 1))",VCOF_kHz, c, freq);
236
237 switch (band) {
238 case BAND_VHF:
239 REFDIV = (u8) ((st->cfg->clock_khz + 9999) / 10000);
240 break;
241 case BAND_FM:
242 REFDIV = (u8) ((st->cfg->clock_khz) / 1000);
243 break;
244 default:
245 REFDIV = (u8) ( st->cfg->clock_khz / 10000);
246 break;
247 }
248 FREF = st->cfg->clock_khz / REFDIV;
249
250 dprintk( "REFDIV: %hd, FREF: %d", REFDIV, FREF);
251
252
253
254 switch (st->revision) {
255 case DIB0070S_P1A:
256 FBDiv = (VCOF_kHz / PRESC / FREF);
257 Rest = (VCOF_kHz / PRESC) - FBDiv * FREF;
258 break;
259
260 case DIB0070_P1G:
261 case DIB0070_P1F:
262 default:
263 FBDiv = (freq / (FREF / 2));
264 Rest = 2 * freq - FBDiv * FREF;
265 break;
266 }
267
268
269 if (Rest < LPF) Rest = 0;
270 else if (Rest < 2 * LPF) Rest = 2 * LPF;
271 else if (Rest > (FREF - LPF)) { Rest = 0 ; FBDiv += 1; }
272 else if (Rest > (FREF - 2 * LPF)) Rest = FREF - 2 * LPF;
273 Rest = (Rest * 6528) / (FREF / 10);
274 dprintk( "FBDIV: %d, Rest: %d", FBDiv, Rest);
275
276 Num = 0;
277 Den = 1;
278
279 if (Rest > 0) {
280 LO4_SET_SD(lo4, 1);
281 Den = 255;
282 Num = (u16)Rest;
283 }
284 dprintk( "Num: %hd, Den: %hd, SD: %hd",Num, Den, (lo4 >> 12) & 0x1);
285
286
287
288 dib0070_write_reg(st, 0x11, (u16)FBDiv);
289
290
291 dib0070_write_reg(st, 0x12, (Den << 8) | REFDIV);
292
293
294 dib0070_write_reg(st, 0x13, Num);
295
296
297 value = 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001;
298
299 switch (band) {
300 case BAND_UHF: value |= 0x4000 | 0x0800; break;
301 case BAND_LBAND: value |= 0x2000 | 0x0400; break;
302 default: value |= 0x8000 | 0x1000; break;
303 }
304 dib0070_write_reg(st, 0x20, value);
305
306 dib0070_captrim(st, lo4);
307 if (st->revision == DIB0070S_P1A) {
308 if (band == BAND_SBAND)
309 dib0070_write_reg(st, 0x15, 0x16e2);
310 else
311 dib0070_write_reg(st, 0x15, 0x56e5);
312 }
313
314
315
316 switch (band) {
317 case BAND_UHF: value = 0x7c82; break;
318 case BAND_LBAND: value = 0x7c84; break;
319 default: value = 0x7c81; break;
320 }
321 dib0070_write_reg(st, 0x0f, value);
322 dib0070_write_reg(st, 0x06, 0x3fff);
323
324 /* Front End */
325 /* c == TUNE, value = SWITCH */
326 c = 0;
327 value = 0;
328 switch (band) {
329 case BAND_FM:
330 c = 0; value = 1;
331 break;
332
333 case BAND_VHF:
334 if (freq <= 180000) c = 0;
335 else if (freq <= 188200) c = 1;
336 else if (freq <= 196400) c = 2;
337 else c = 3;
338 value = 1;
339 break;
340
341 case BAND_LBAND:
342 if (freq <= 1500000) c = 0;
343 else if (freq <= 1600000) c = 1;
344 else c = 3;
345 break;
346
347 case BAND_SBAND:
348 c = 7;
349 dib0070_write_reg(st, 0x1d,0xFFFF);
350 break;
351
352 case BAND_UHF:
353 default:
354 if (st->cfg->flip_chip) {
355 if (freq <= 550000) c = 0;
356 else if (freq <= 590000) c = 1;
357 else if (freq <= 666000) c = 3;
358 else c = 5;
359 } else {
360 if (freq <= 550000) c = 2;
361 else if (freq <= 650000) c = 3;
362 else if (freq <= 750000) c = 5;
363 else if (freq <= 850000) c = 6;
364 else c = 7;
365 }
366 value = 2;
367 break;
368 }
369
370 /* default: LNA_MATCH=7, BIAS=3 */
371 dib0070_write_reg(st, 0x07, (value << 11) | (7 << 8) | (c << 3) | (3 << 0));
372 dib0070_write_reg(st, 0x08, (c << 10) | (3 << 7) | (127));
373 dib0070_write_reg(st, 0x0d, 0x0d80);
374
375
376 dib0070_write_reg(st, 0x18, 0x07ff);
377 dib0070_write_reg(st, 0x17, 0x0033);
378
379 return 0;
380}
381
382static int dib0070_wakeup(struct dvb_frontend *fe)
383{
384 struct dib0070_state *st = fe->tuner_priv;
385 if (st->cfg->sleep)
386 st->cfg->sleep(fe, 0);
387 return 0;
388}
389
390static int dib0070_sleep(struct dvb_frontend *fe)
391{
392 struct dib0070_state *st = fe->tuner_priv;
393 if (st->cfg->sleep)
394 st->cfg->sleep(fe, 1);
395 return 0;
396}
397
398static u16 dib0070_p1f_defaults[] =
399
400{
401 7, 0x02,
402 0x0008,
403 0x0000,
404 0x0000,
405 0x0000,
406 0x0000,
407 0x0002,
408 0x0100,
409
410 3, 0x0d,
411 0x0d80,
412 0x0001,
413 0x0000,
414
415 4, 0x11,
416 0x0000,
417 0x0103,
418 0x0000,
419 0x0000,
420
421 3, 0x16,
422 0x0004 | 0x0040,
423 0x0030,
424 0x07ff,
425
426 6, 0x1b,
427 0x4112,
428 0xff00,
429 0xc07f,
430 0x0000,
431 0x0180,
432 0x4000 | 0x0800 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001,
433
434 0,
435};
436
437static void dib0070_wbd_calibration(struct dib0070_state *state)
438{
439 u16 wbd_offs;
440 dib0070_write_reg(state, 0x0f, 0x6d81);
441 dib0070_write_reg(state, 0x20, 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
442 msleep(9);
443 wbd_offs = dib0070_read_reg(state, 0x19);
444 dib0070_write_reg(state, 0x20, 0);
445 state->wbd_ff_offset = ((wbd_offs * 8 * 18 / 33 + 1) / 2);
446 dprintk( "WBDStart = %d (Vargen) - FF = %hd", (u32) wbd_offs * 1800/1024, state->wbd_ff_offset);
447}
448
449u16 dib0070_wbd_offset(struct dvb_frontend *fe)
450{
451 struct dib0070_state *st = fe->tuner_priv;
452 return st->wbd_ff_offset;
453}
454
455EXPORT_SYMBOL(dib0070_wbd_offset);
456static int dib0070_set_ctrl_lo5(struct dvb_frontend *fe, u8 vco_bias_trim, u8 hf_div_trim, u8 cp_current, u8 third_order_filt)
457{
458 struct dib0070_state *state = fe->tuner_priv;
459 u16 lo5 = (third_order_filt << 14) | (0 << 13) | (1 << 12) | (3 << 9) | (cp_current << 6) | (hf_div_trim << 3) | (vco_bias_trim << 0);
460 dprintk( "CTRL_LO5: 0x%x", lo5);
461 return dib0070_write_reg(state, 0x15, lo5);
462}
463
464#define pgm_read_word(w) (*w)
465static int dib0070_reset(struct dib0070_state *state)
466{
467 u16 l, r, *n;
468
469 HARD_RESET(state);
470
471
472#ifndef FORCE_SBAND_TUNER
473 if ((dib0070_read_reg(state, 0x22) >> 9) & 0x1)
474 state->revision = (dib0070_read_reg(state, 0x1f) >> 8) & 0xff;
475 else
476#endif
477 state->revision = DIB0070S_P1A;
478
479 /* P1F or not */
480 dprintk( "Revision: %x", state->revision);
481
482 if (state->revision == DIB0070_P1D) {
483 dprintk( "Error: this driver is not to be used meant for P1D or earlier");
484 return -EINVAL;
485 }
486
487 n = (u16 *) dib0070_p1f_defaults;
488 l = pgm_read_word(n++);
489 while (l) {
490 r = pgm_read_word(n++);
491 do {
492 dib0070_write_reg(state, (u8)r, pgm_read_word(n++));
493 r++;
494 } while (--l);
495 l = pgm_read_word(n++);
496 }
497
498 if (state->cfg->force_crystal_mode != 0)
499 r = state->cfg->force_crystal_mode;
500 else if (state->cfg->clock_khz >= 24000)
501 r = 1;
502 else
503 r = 2;
504
505 r |= state->cfg->osc_buffer_state << 3;
506
507 dib0070_write_reg(state, 0x10, r);
508 dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 4));
509
510 if (state->cfg->invert_iq) {
511 r = dib0070_read_reg(state, 0x02) & 0xffdf;
512 dib0070_write_reg(state, 0x02, r | (1 << 5));
513 }
514
515
516 if (state->revision == DIB0070S_P1A)
517 dib0070_set_ctrl_lo5(state->fe, 4, 7, 3, 1);
518 else
519 dib0070_set_ctrl_lo5(state->fe, 4, 4, 2, 0);
520
521 dib0070_write_reg(state, 0x01, (54 << 9) | 0xc8);
522 return 0;
523}
524
525
526static int dib0070_release(struct dvb_frontend *fe)
527{
528 kfree(fe->tuner_priv);
529 fe->tuner_priv = NULL;
530 return 0;
531}
532
533static struct dvb_tuner_ops dib0070_ops = {
534 .info = {
535 .name = "DiBcom DiB0070",
536 .frequency_min = 45000000,
537 .frequency_max = 860000000,
538 .frequency_step = 1000,
539 },
540 .release = dib0070_release,
541
542 .init = dib0070_wakeup,
543 .sleep = dib0070_sleep,
544 .set_params = dib0070_tune_digital,
545// .get_frequency = dib0070_get_frequency,
546// .get_bandwidth = dib0070_get_bandwidth
547};
548
549struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
550{
551 struct dib0070_state *state = kzalloc(sizeof(struct dib0070_state), GFP_KERNEL);
552 if (state == NULL)
553 return NULL;
554
555 state->cfg = cfg;
556 state->i2c = i2c;
557 state->fe = fe;
558 fe->tuner_priv = state;
559
560 if (dib0070_reset(state) != 0)
561 goto free_mem;
562
563 dib0070_wbd_calibration(state);
564
565 printk(KERN_INFO "DiB0070: successfully identified\n");
566 memcpy(&fe->ops.tuner_ops, &dib0070_ops, sizeof(struct dvb_tuner_ops));
567
568 fe->tuner_priv = state;
569 return fe;
570
571free_mem:
572 kfree(state);
573 fe->tuner_priv = NULL;
574 return NULL;
575}
576EXPORT_SYMBOL(dib0070_attach);
577
578MODULE_AUTHOR("Patrick Boettcher <pboettcher@dibcom.fr>");
579MODULE_DESCRIPTION("Driver for the DiBcom 0070 base-band RF Tuner");
580MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h
new file mode 100644
index 000000000000..786e37d33889
--- /dev/null
+++ b/drivers/media/dvb/frontends/dib0070.h
@@ -0,0 +1,44 @@
1/*
2 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
3 *
4 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation, version 2.
9 */
10#ifndef DIB0070_H
11#define DIB0070_H
12
13struct dvb_frontend;
14struct i2c_adapter;
15
16#define DEFAULT_DIB0070_I2C_ADDRESS 0x60
17
18struct dib0070_config {
19 u8 i2c_address;
20
21 /* tuner pins controlled externally */
22 int (*reset) (struct dvb_frontend *, int);
23 int (*sleep) (struct dvb_frontend *, int);
24
25 /* offset in kHz */
26 int freq_offset_khz_uhf;
27 int freq_offset_khz_vhf;
28
29 u8 osc_buffer_state; /* 0= normal, 1= tri-state */
30 u32 clock_khz;
31 u8 clock_pad_drive; /* (Drive + 1) * 2mA */
32
33 u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
34
35 u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
36
37 u8 flip_chip;
38};
39
40extern struct dvb_frontend * dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
41extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, uint8_t open);
42extern u16 dib0070_wbd_offset(struct dvb_frontend *);
43
44#endif
diff --git a/drivers/media/dvb/frontends/dib3000mb.c b/drivers/media/dvb/frontends/dib3000mb.c
index b6adea5ffeb8..136b9d2164d7 100644
--- a/drivers/media/dvb/frontends/dib3000mb.c
+++ b/drivers/media/dvb/frontends/dib3000mb.c
@@ -23,7 +23,6 @@
23 23
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/delay.h> 27#include <linux/delay.h>
29#include <linux/string.h> 28#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c
index 054d7e6d9662..edae0be063f5 100644
--- a/drivers/media/dvb/frontends/dib3000mc.c
+++ b/drivers/media/dvb/frontends/dib3000mc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Driver for DiBcom DiB3000MC/P-demodulator. 2 * Driver for DiBcom DiB3000MC/P-demodulator.
3 * 3 *
4 * Copyright (C) 2004-6 DiBcom (http://www.dibcom.fr/) 4 * Copyright (C) 2004-7 DiBcom (http://www.dibcom.fr/)
5 * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) 5 * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
6 * 6 *
7 * This code is partially based on the previous dib3000mc.c . 7 * This code is partially based on the previous dib3000mc.c .
@@ -13,10 +13,6 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16//#include <linux/init.h>
17//#include <linux/delay.h>
18//#include <linux/string.h>
19//#include <linux/slab.h>
20 16
21#include "dvb_frontend.h" 17#include "dvb_frontend.h"
22 18
@@ -26,7 +22,11 @@ static int debug;
26module_param(debug, int, 0644); 22module_param(debug, int, 0644);
27MODULE_PARM_DESC(debug, "turn on debugging (default: 0)"); 23MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
28 24
29#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB3000MC/P:"); printk(args); } } while (0) 25static int buggy_sfn_workaround;
26module_param(buggy_sfn_workaround, int, 0644);
27MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)");
28
29#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB3000MC/P:"); printk(args); printk("\n"); } } while (0)
30 30
31struct dib3000mc_state { 31struct dib3000mc_state {
32 struct dvb_frontend demod; 32 struct dvb_frontend demod;
@@ -42,6 +42,8 @@ struct dib3000mc_state {
42 fe_bandwidth_t current_bandwidth; 42 fe_bandwidth_t current_bandwidth;
43 43
44 u16 dev_id; 44 u16 dev_id;
45
46 u8 sfn_workaround_active :1;
45}; 47};
46 48
47static u16 dib3000mc_read_word(struct dib3000mc_state *state, u16 reg) 49static u16 dib3000mc_read_word(struct dib3000mc_state *state, u16 reg)
@@ -71,7 +73,6 @@ static int dib3000mc_write_word(struct dib3000mc_state *state, u16 reg, u16 val)
71 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0; 73 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
72} 74}
73 75
74
75static int dib3000mc_identify(struct dib3000mc_state *state) 76static int dib3000mc_identify(struct dib3000mc_state *state)
76{ 77{
77 u16 value; 78 u16 value;
@@ -92,7 +93,7 @@ static int dib3000mc_identify(struct dib3000mc_state *state)
92 return 0; 93 return 0;
93} 94}
94 95
95static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u8 bw, u8 update_offset) 96static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u32 bw, u8 update_offset)
96{ 97{
97 u32 timf; 98 u32 timf;
98 99
@@ -103,7 +104,7 @@ static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u8 bw,
103 } else 104 } else
104 timf = state->timf; 105 timf = state->timf;
105 106
106 timf *= (BW_INDEX_TO_KHZ(bw) / 1000); 107 timf *= (bw / 1000);
107 108
108 if (update_offset) { 109 if (update_offset) {
109 s16 tim_offs = dib3000mc_read_word(state, 416); 110 s16 tim_offs = dib3000mc_read_word(state, 416);
@@ -111,17 +112,17 @@ static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u8 bw,
111 if (tim_offs & 0x2000) 112 if (tim_offs & 0x2000)
112 tim_offs -= 0x4000; 113 tim_offs -= 0x4000;
113 114
114 if (nfft == 0) 115 if (nfft == TRANSMISSION_MODE_2K)
115 tim_offs *= 4; 116 tim_offs *= 4;
116 117
117 timf += tim_offs; 118 timf += tim_offs;
118 state->timf = timf / (BW_INDEX_TO_KHZ(bw) / 1000); 119 state->timf = timf / (bw / 1000);
119 } 120 }
120 121
121 dprintk("timf: %d\n", timf); 122 dprintk("timf: %d\n", timf);
122 123
123 dib3000mc_write_word(state, 23, timf >> 16); 124 dib3000mc_write_word(state, 23, (u16) (timf >> 16));
124 dib3000mc_write_word(state, 24, timf & 0xffff); 125 dib3000mc_write_word(state, 24, (u16) (timf ) & 0xffff);
125 126
126 return 0; 127 return 0;
127} 128}
@@ -209,31 +210,30 @@ static int dib3000mc_set_output_mode(struct dib3000mc_state *state, int mode)
209 return ret; 210 return ret;
210} 211}
211 212
212static int dib3000mc_set_bandwidth(struct dvb_frontend *demod, u8 bw) 213static int dib3000mc_set_bandwidth(struct dib3000mc_state *state, u32 bw)
213{ 214{
214 struct dib3000mc_state *state = demod->demodulator_priv;
215 u16 bw_cfg[6] = { 0 }; 215 u16 bw_cfg[6] = { 0 };
216 u16 imp_bw_cfg[3] = { 0 }; 216 u16 imp_bw_cfg[3] = { 0 };
217 u16 reg; 217 u16 reg;
218 218
219/* settings here are for 27.7MHz */ 219/* settings here are for 27.7MHz */
220 switch (bw) { 220 switch (bw) {
221 case BANDWIDTH_8_MHZ: 221 case 8000:
222 bw_cfg[0] = 0x0019; bw_cfg[1] = 0x5c30; bw_cfg[2] = 0x0054; bw_cfg[3] = 0x88a0; bw_cfg[4] = 0x01a6; bw_cfg[5] = 0xab20; 222 bw_cfg[0] = 0x0019; bw_cfg[1] = 0x5c30; bw_cfg[2] = 0x0054; bw_cfg[3] = 0x88a0; bw_cfg[4] = 0x01a6; bw_cfg[5] = 0xab20;
223 imp_bw_cfg[0] = 0x04db; imp_bw_cfg[1] = 0x00db; imp_bw_cfg[2] = 0x00b7; 223 imp_bw_cfg[0] = 0x04db; imp_bw_cfg[1] = 0x00db; imp_bw_cfg[2] = 0x00b7;
224 break; 224 break;
225 225
226 case BANDWIDTH_7_MHZ: 226 case 7000:
227 bw_cfg[0] = 0x001c; bw_cfg[1] = 0xfba5; bw_cfg[2] = 0x0060; bw_cfg[3] = 0x9c25; bw_cfg[4] = 0x01e3; bw_cfg[5] = 0x0cb7; 227 bw_cfg[0] = 0x001c; bw_cfg[1] = 0xfba5; bw_cfg[2] = 0x0060; bw_cfg[3] = 0x9c25; bw_cfg[4] = 0x01e3; bw_cfg[5] = 0x0cb7;
228 imp_bw_cfg[0] = 0x04c0; imp_bw_cfg[1] = 0x00c0; imp_bw_cfg[2] = 0x00a0; 228 imp_bw_cfg[0] = 0x04c0; imp_bw_cfg[1] = 0x00c0; imp_bw_cfg[2] = 0x00a0;
229 break; 229 break;
230 230
231 case BANDWIDTH_6_MHZ: 231 case 6000:
232 bw_cfg[0] = 0x0021; bw_cfg[1] = 0xd040; bw_cfg[2] = 0x0070; bw_cfg[3] = 0xb62b; bw_cfg[4] = 0x0233; bw_cfg[5] = 0x8ed5; 232 bw_cfg[0] = 0x0021; bw_cfg[1] = 0xd040; bw_cfg[2] = 0x0070; bw_cfg[3] = 0xb62b; bw_cfg[4] = 0x0233; bw_cfg[5] = 0x8ed5;
233 imp_bw_cfg[0] = 0x04a5; imp_bw_cfg[1] = 0x00a5; imp_bw_cfg[2] = 0x0089; 233 imp_bw_cfg[0] = 0x04a5; imp_bw_cfg[1] = 0x00a5; imp_bw_cfg[2] = 0x0089;
234 break; 234 break;
235 235
236 case 255 /* BANDWIDTH_5_MHZ */: 236 case 5000:
237 bw_cfg[0] = 0x0028; bw_cfg[1] = 0x9380; bw_cfg[2] = 0x0087; bw_cfg[3] = 0x4100; bw_cfg[4] = 0x02a4; bw_cfg[5] = 0x4500; 237 bw_cfg[0] = 0x0028; bw_cfg[1] = 0x9380; bw_cfg[2] = 0x0087; bw_cfg[3] = 0x4100; bw_cfg[4] = 0x02a4; bw_cfg[5] = 0x4500;
238 imp_bw_cfg[0] = 0x0489; imp_bw_cfg[1] = 0x0089; imp_bw_cfg[2] = 0x0072; 238 imp_bw_cfg[0] = 0x0489; imp_bw_cfg[1] = 0x0089; imp_bw_cfg[2] = 0x0072;
239 break; 239 break;
@@ -257,7 +257,7 @@ static int dib3000mc_set_bandwidth(struct dvb_frontend *demod, u8 bw)
257 dib3000mc_write_word(state, reg, imp_bw_cfg[reg - 55]); 257 dib3000mc_write_word(state, reg, imp_bw_cfg[reg - 55]);
258 258
259 // Timing configuration 259 // Timing configuration
260 dib3000mc_set_timing(state, 0, bw, 0); 260 dib3000mc_set_timing(state, TRANSMISSION_MODE_2K, bw, 0);
261 261
262 return 0; 262 return 0;
263} 263}
@@ -276,7 +276,7 @@ static void dib3000mc_set_impulse_noise(struct dib3000mc_state *state, u8 mode,
276 for (i = 58; i < 87; i++) 276 for (i = 58; i < 87; i++)
277 dib3000mc_write_word(state, i, impulse_noise_val[i-58]); 277 dib3000mc_write_word(state, i, impulse_noise_val[i-58]);
278 278
279 if (nfft == 1) { 279 if (nfft == TRANSMISSION_MODE_8K) {
280 dib3000mc_write_word(state, 58, 0x3b); 280 dib3000mc_write_word(state, 58, 0x3b);
281 dib3000mc_write_word(state, 84, 0x00); 281 dib3000mc_write_word(state, 84, 0x00);
282 dib3000mc_write_word(state, 85, 0x8200); 282 dib3000mc_write_word(state, 85, 0x8200);
@@ -376,7 +376,7 @@ static int dib3000mc_init(struct dvb_frontend *demod)
376 // P_search_maxtrial=1 376 // P_search_maxtrial=1
377 dib3000mc_write_word(state, 5, 1); 377 dib3000mc_write_word(state, 5, 1);
378 378
379 dib3000mc_set_bandwidth(&state->demod, BANDWIDTH_8_MHZ); 379 dib3000mc_set_bandwidth(state, 8000);
380 380
381 // div_lock_mask 381 // div_lock_mask
382 dib3000mc_write_word(state, 4, 0x814); 382 dib3000mc_write_word(state, 4, 0x814);
@@ -397,7 +397,7 @@ static int dib3000mc_init(struct dvb_frontend *demod)
397 dib3000mc_write_word(state, 180, 0x2FF0); 397 dib3000mc_write_word(state, 180, 0x2FF0);
398 398
399 // Impulse noise configuration 399 // Impulse noise configuration
400 dib3000mc_set_impulse_noise(state, 0, 1); 400 dib3000mc_set_impulse_noise(state, 0, TRANSMISSION_MODE_8K);
401 401
402 // output mode set-up 402 // output mode set-up
403 dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); 403 dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z);
@@ -423,13 +423,13 @@ static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam)
423{ 423{
424 u16 cfg[4] = { 0 },reg; 424 u16 cfg[4] = { 0 },reg;
425 switch (qam) { 425 switch (qam) {
426 case 0: 426 case QPSK:
427 cfg[0] = 0x099a; cfg[1] = 0x7fae; cfg[2] = 0x0333; cfg[3] = 0x7ff0; 427 cfg[0] = 0x099a; cfg[1] = 0x7fae; cfg[2] = 0x0333; cfg[3] = 0x7ff0;
428 break; 428 break;
429 case 1: 429 case QAM_16:
430 cfg[0] = 0x023d; cfg[1] = 0x7fdf; cfg[2] = 0x00a4; cfg[3] = 0x7ff0; 430 cfg[0] = 0x023d; cfg[1] = 0x7fdf; cfg[2] = 0x00a4; cfg[3] = 0x7ff0;
431 break; 431 break;
432 case 2: 432 case QAM_64:
433 cfg[0] = 0x0148; cfg[1] = 0x7ff0; cfg[2] = 0x00a4; cfg[3] = 0x7ff8; 433 cfg[0] = 0x0148; cfg[1] = 0x7ff0; cfg[2] = 0x00a4; cfg[3] = 0x7ff8;
434 break; 434 break;
435 } 435 }
@@ -437,11 +437,11 @@ static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam)
437 dib3000mc_write_word(state, reg, cfg[reg - 129]); 437 dib3000mc_write_word(state, reg, cfg[reg - 129]);
438} 438}
439 439
440static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dibx000_ofdm_channel *chan, u16 seq) 440static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_frontend_parameters *ch, u16 seq)
441{ 441{
442 u16 tmp; 442 u16 value;
443 443 dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
444 dib3000mc_set_timing(state, chan->nfft, chan->Bw, 0); 444 dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 0);
445 445
446// if (boost) 446// if (boost)
447// dib3000mc_write_word(state, 100, (11 << 6) + 6); 447// dib3000mc_write_word(state, 100, (11 << 6) + 6);
@@ -455,7 +455,7 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dibx
455 dib3000mc_write_word(state, 26, 0x6680); 455 dib3000mc_write_word(state, 26, 0x6680);
456 dib3000mc_write_word(state, 29, 0x1273); 456 dib3000mc_write_word(state, 29, 0x1273);
457 dib3000mc_write_word(state, 33, 5); 457 dib3000mc_write_word(state, 33, 5);
458 dib3000mc_set_adp_cfg(state, 1); 458 dib3000mc_set_adp_cfg(state, QAM_16);
459 dib3000mc_write_word(state, 133, 15564); 459 dib3000mc_write_word(state, 133, 15564);
460 460
461 dib3000mc_write_word(state, 12 , 0x0); 461 dib3000mc_write_word(state, 12 , 0x0);
@@ -470,52 +470,98 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dibx
470 dib3000mc_write_word(state, 97,0); 470 dib3000mc_write_word(state, 97,0);
471 dib3000mc_write_word(state, 98,0); 471 dib3000mc_write_word(state, 98,0);
472 472
473 dib3000mc_set_impulse_noise(state, 0, chan->nfft); 473 dib3000mc_set_impulse_noise(state, 0, ch->u.ofdm.transmission_mode);
474
475 tmp = ((chan->nfft & 0x1) << 7) | (chan->guard << 5) | (chan->nqam << 3) | chan->vit_alpha;
476 dib3000mc_write_word(state, 0, tmp);
477 474
475 value = 0;
476 switch (ch->u.ofdm.transmission_mode) {
477 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
478 default:
479 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
480 }
481 switch (ch->u.ofdm.guard_interval) {
482 case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
483 case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
484 case GUARD_INTERVAL_1_4: value |= (3 << 5); break;
485 default:
486 case GUARD_INTERVAL_1_8: value |= (2 << 5); break;
487 }
488 switch (ch->u.ofdm.constellation) {
489 case QPSK: value |= (0 << 3); break;
490 case QAM_16: value |= (1 << 3); break;
491 default:
492 case QAM_64: value |= (2 << 3); break;
493 }
494 switch (HIERARCHY_1) {
495 case HIERARCHY_2: value |= 2; break;
496 case HIERARCHY_4: value |= 4; break;
497 default:
498 case HIERARCHY_1: value |= 1; break;
499 }
500 dib3000mc_write_word(state, 0, value);
478 dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); 501 dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4));
479 502
480 tmp = (chan->vit_hrch << 4) | (chan->vit_select_hp); 503 value = 0;
481 if (!chan->vit_hrch || (chan->vit_hrch && chan->vit_select_hp)) 504 if (ch->u.ofdm.hierarchy_information == 1)
482 tmp |= chan->vit_code_rate_hp << 1; 505 value |= (1 << 4);
483 else 506 if (1 == 1)
484 tmp |= chan->vit_code_rate_lp << 1; 507 value |= 1;
485 dib3000mc_write_word(state, 181, tmp); 508 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) {
509 case FEC_2_3: value |= (2 << 1); break;
510 case FEC_3_4: value |= (3 << 1); break;
511 case FEC_5_6: value |= (5 << 1); break;
512 case FEC_7_8: value |= (7 << 1); break;
513 default:
514 case FEC_1_2: value |= (1 << 1); break;
515 }
516 dib3000mc_write_word(state, 181, value);
486 517
487 // diversity synchro delay 518 // diversity synchro delay add 50% SFN margin
488 tmp = dib3000mc_read_word(state, 180) & 0x000f; 519 switch (ch->u.ofdm.transmission_mode) {
489 tmp |= ((chan->nfft == 0) ? 64 : 256) * ((1 << (chan->guard)) * 3 / 2) << 4; // add 50% SFN margin 520 case TRANSMISSION_MODE_8K: value = 256; break;
490 dib3000mc_write_word(state, 180, tmp); 521 case TRANSMISSION_MODE_2K:
522 default: value = 64; break;
523 }
524 switch (ch->u.ofdm.guard_interval) {
525 case GUARD_INTERVAL_1_16: value *= 2; break;
526 case GUARD_INTERVAL_1_8: value *= 4; break;
527 case GUARD_INTERVAL_1_4: value *= 8; break;
528 default:
529 case GUARD_INTERVAL_1_32: value *= 1; break;
530 }
531 value <<= 4;
532 value |= dib3000mc_read_word(state, 180) & 0x000f;
533 dib3000mc_write_word(state, 180, value);
491 534
492 // restart demod 535 // restart demod
493 tmp = dib3000mc_read_word(state, 0); 536 value = dib3000mc_read_word(state, 0);
494 dib3000mc_write_word(state, 0, tmp | (1 << 9)); 537 dib3000mc_write_word(state, 0, value | (1 << 9));
495 dib3000mc_write_word(state, 0, tmp); 538 dib3000mc_write_word(state, 0, value);
496 539
497 msleep(30); 540 msleep(30);
498 541
499 dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, chan->nfft); 542 dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->u.ofdm.transmission_mode);
500} 543}
501 544
502static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dibx000_ofdm_channel *chan) 545static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *chan)
503{ 546{
504 struct dib3000mc_state *state = demod->demodulator_priv; 547 struct dib3000mc_state *state = demod->demodulator_priv;
505 u16 reg; 548 u16 reg;
506// u32 val; 549// u32 val;
507 struct dibx000_ofdm_channel fchan; 550 struct dvb_frontend_parameters schan;
508 551
509 INIT_OFDM_CHANNEL(&fchan); 552 schan = *chan;
510 fchan = *chan;
511 553
554 /* TODO what is that ? */
512 555
513 /* a channel for autosearch */ 556 /* a channel for autosearch */
514 fchan.nfft = 1; fchan.guard = 0; fchan.nqam = 2; 557 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
515 fchan.vit_alpha = 1; fchan.vit_code_rate_hp = 2; fchan.vit_code_rate_lp = 2; 558 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
516 fchan.vit_hrch = 0; fchan.vit_select_hp = 1; 559 schan.u.ofdm.constellation = QAM_64;
560 schan.u.ofdm.code_rate_HP = FEC_2_3;
561 schan.u.ofdm.code_rate_LP = FEC_2_3;
562 schan.u.ofdm.hierarchy_information = 0;
517 563
518 dib3000mc_set_channel_cfg(state, &fchan, 11); 564 dib3000mc_set_channel_cfg(state, &schan, 11);
519 565
520 reg = dib3000mc_read_word(state, 0); 566 reg = dib3000mc_read_word(state, 0);
521 dib3000mc_write_word(state, 0, reg | (1 << 8)); 567 dib3000mc_write_word(state, 0, reg | (1 << 8));
@@ -539,7 +585,7 @@ static int dib3000mc_autosearch_is_irq(struct dvb_frontend *demod)
539 return 0; // still pending 585 return 0; // still pending
540} 586}
541 587
542static int dib3000mc_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel *ch) 588static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
543{ 589{
544 struct dib3000mc_state *state = demod->demodulator_priv; 590 struct dib3000mc_state *state = demod->demodulator_priv;
545 591
@@ -547,11 +593,17 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channe
547 dib3000mc_set_channel_cfg(state, ch, 0); 593 dib3000mc_set_channel_cfg(state, ch, 0);
548 594
549 // activates isi 595 // activates isi
550 dib3000mc_write_word(state, 29, 0x1073); 596 if (state->sfn_workaround_active) {
551 597 dprintk("SFN workaround is active\n");
552 dib3000mc_set_adp_cfg(state, (u8)ch->nqam); 598 dib3000mc_write_word(state, 29, 0x1273);
599 dib3000mc_write_word(state, 108, 0x4000); // P_pha3_force_pha_shift
600 } else {
601 dib3000mc_write_word(state, 29, 0x1073);
602 dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift
603 }
553 604
554 if (ch->nfft == 1) { 605 dib3000mc_set_adp_cfg(state, (u8)ch->u.ofdm.constellation);
606 if (ch->u.ofdm.transmission_mode == TRANSMISSION_MODE_8K) {
555 dib3000mc_write_word(state, 26, 38528); 607 dib3000mc_write_word(state, 26, 38528);
556 dib3000mc_write_word(state, 33, 8); 608 dib3000mc_write_word(state, 33, 8);
557 } else { 609 } else {
@@ -560,7 +612,7 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channe
560 } 612 }
561 613
562 if (dib3000mc_read_word(state, 509) & 0x80) 614 if (dib3000mc_read_word(state, 509) & 0x80)
563 dib3000mc_set_timing(state, ch->nfft, ch->Bw, 1); 615 dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 1);
564 616
565 return 0; 617 return 0;
566} 618}
@@ -632,13 +684,12 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe,
632 struct dvb_frontend_parameters *fep) 684 struct dvb_frontend_parameters *fep)
633{ 685{
634 struct dib3000mc_state *state = fe->demodulator_priv; 686 struct dib3000mc_state *state = fe->demodulator_priv;
635 struct dibx000_ofdm_channel ch;
636
637 INIT_OFDM_CHANNEL(&ch);
638 FEP2DIB(fep,&ch);
639 687
640 state->current_bandwidth = fep->u.ofdm.bandwidth; 688 state->current_bandwidth = fep->u.ofdm.bandwidth;
641 dib3000mc_set_bandwidth(fe, fep->u.ofdm.bandwidth); 689 dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth));
690
691 /* maybe the parameter has been changed */
692 state->sfn_workaround_active = buggy_sfn_workaround;
642 693
643 if (fe->ops.tuner_ops.set_params) { 694 if (fe->ops.tuner_ops.set_params) {
644 fe->ops.tuner_ops.set_params(fe, fep); 695 fe->ops.tuner_ops.set_params(fe, fep);
@@ -651,7 +702,7 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe,
651 fep->u.ofdm.code_rate_HP == FEC_AUTO) { 702 fep->u.ofdm.code_rate_HP == FEC_AUTO) {
652 int i = 100, found; 703 int i = 100, found;
653 704
654 dib3000mc_autosearch_start(fe, &ch); 705 dib3000mc_autosearch_start(fe, fep);
655 do { 706 do {
656 msleep(1); 707 msleep(1);
657 found = dib3000mc_autosearch_is_irq(fe); 708 found = dib3000mc_autosearch_is_irq(fe);
@@ -662,13 +713,12 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe,
662 return 0; // no channel found 713 return 0; // no channel found
663 714
664 dib3000mc_get_frontend(fe, fep); 715 dib3000mc_get_frontend(fe, fep);
665 FEP2DIB(fep,&ch);
666 } 716 }
667 717
668 /* make this a config parameter */ 718 /* make this a config parameter */
669 dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); 719 dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO);
670 720
671 return dib3000mc_tune(fe, &ch); 721 return dib3000mc_tune(fe, fep);
672} 722}
673 723
674static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) 724static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat)
diff --git a/drivers/media/dvb/frontends/dib7000m.c b/drivers/media/dvb/frontends/dib7000m.c
index f64546c6aeb5..fb18441a8c57 100644
--- a/drivers/media/dvb/frontends/dib7000m.c
+++ b/drivers/media/dvb/frontends/dib7000m.c
@@ -2,7 +2,7 @@
2 * Linux-DVB Driver for DiBcom's DiB7000M and 2 * Linux-DVB Driver for DiBcom's DiB7000M and
3 * first generation DiB7000P-demodulator-family. 3 * first generation DiB7000P-demodulator-family.
4 * 4 *
5 * Copyright (C) 2005-6 DiBcom (http://www.dibcom.fr/) 5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as 8 * modify it under the terms of the GNU General Public License as
@@ -19,7 +19,7 @@ static int debug;
19module_param(debug, int, 0644); 19module_param(debug, int, 0644);
20MODULE_PARM_DESC(debug, "turn on debugging (default: 0)"); 20MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
21 21
22#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB7000M:"); printk(args); } } while (0) 22#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB7000M: "); printk(args); printk("\n"); } } while (0)
23 23
24struct dib7000m_state { 24struct dib7000m_state {
25 struct dvb_frontend demod; 25 struct dvb_frontend demod;
@@ -39,8 +39,16 @@ struct dib7000m_state {
39 fe_bandwidth_t current_bandwidth; 39 fe_bandwidth_t current_bandwidth;
40 struct dibx000_agc_config *current_agc; 40 struct dibx000_agc_config *current_agc;
41 u32 timf; 41 u32 timf;
42 u32 timf_default;
43 u32 internal_clk;
44
45 u8 div_force_off : 1;
46 u8 div_state : 1;
47 u16 div_sync_wait;
42 48
43 u16 revision; 49 u16 revision;
50
51 u8 agc_state;
44}; 52};
45 53
46enum dib7000m_power_mode { 54enum dib7000m_power_mode {
@@ -63,7 +71,7 @@ static u16 dib7000m_read_word(struct dib7000m_state *state, u16 reg)
63 }; 71 };
64 72
65 if (i2c_transfer(state->i2c_adap, msg, 2) != 2) 73 if (i2c_transfer(state->i2c_adap, msg, 2) != 2)
66 dprintk("i2c read error on %d\n",reg); 74 dprintk("i2c read error on %d",reg);
67 75
68 return (rb[0] << 8) | rb[1]; 76 return (rb[0] << 8) | rb[1];
69} 77}
@@ -79,6 +87,25 @@ static int dib7000m_write_word(struct dib7000m_state *state, u16 reg, u16 val)
79 }; 87 };
80 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0; 88 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
81} 89}
90static void dib7000m_write_tab(struct dib7000m_state *state, u16 *buf)
91{
92 u16 l = 0, r, *n;
93 n = buf;
94 l = *n++;
95 while (l) {
96 r = *n++;
97
98 if (state->reg_offs && (r >= 112 && r <= 331)) // compensate for 7000MC
99 r++;
100
101 do {
102 dib7000m_write_word(state, r, *n++);
103 r++;
104 } while (--l);
105 l = *n++;
106 }
107}
108
82static int dib7000m_set_output_mode(struct dib7000m_state *state, int mode) 109static int dib7000m_set_output_mode(struct dib7000m_state *state, int mode)
83{ 110{
84 int ret = 0; 111 int ret = 0;
@@ -89,8 +116,7 @@ static int dib7000m_set_output_mode(struct dib7000m_state *state, int mode)
89 fifo_threshold = 1792; 116 fifo_threshold = 1792;
90 smo_mode = (dib7000m_read_word(state, 294 + state->reg_offs) & 0x0010) | (1 << 1); 117 smo_mode = (dib7000m_read_word(state, 294 + state->reg_offs) & 0x0010) | (1 << 1);
91 118
92 dprintk("-I- Setting output mode for demod %p to %d\n", 119 dprintk( "setting output mode for demod %p to %d", &state->demod, mode);
93 &state->demod, mode);
94 120
95 switch (mode) { 121 switch (mode) {
96 case OUTMODE_MPEG2_PAR_GATED_CLK: // STBs with parallel gated clock 122 case OUTMODE_MPEG2_PAR_GATED_CLK: // STBs with parallel gated clock
@@ -117,7 +143,7 @@ static int dib7000m_set_output_mode(struct dib7000m_state *state, int mode)
117 outreg = 0; 143 outreg = 0;
118 break; 144 break;
119 default: 145 default:
120 dprintk("Unhandled output_mode passed to be set for demod %p\n",&state->demod); 146 dprintk( "Unhandled output_mode passed to be set for demod %p",&state->demod);
121 break; 147 break;
122 } 148 }
123 149
@@ -129,13 +155,20 @@ static int dib7000m_set_output_mode(struct dib7000m_state *state, int mode)
129 ret |= dib7000m_write_word(state, 1795, outreg); 155 ret |= dib7000m_write_word(state, 1795, outreg);
130 ret |= dib7000m_write_word(state, 1805, sram); 156 ret |= dib7000m_write_word(state, 1805, sram);
131 157
158 if (state->revision == 0x4003) {
159 u16 clk_cfg1 = dib7000m_read_word(state, 909) & 0xfffd;
160 if (mode == OUTMODE_DIVERSITY)
161 clk_cfg1 |= (1 << 1); // P_O_CLK_en
162 dib7000m_write_word(state, 909, clk_cfg1);
163 }
132 return ret; 164 return ret;
133} 165}
134 166
135static int dib7000m_set_power_mode(struct dib7000m_state *state, enum dib7000m_power_mode mode) 167static void dib7000m_set_power_mode(struct dib7000m_state *state, enum dib7000m_power_mode mode)
136{ 168{
137 /* by default everything is going to be powered off */ 169 /* by default everything is going to be powered off */
138 u16 reg_903 = 0xffff, reg_904 = 0xffff, reg_905 = 0xffff, reg_906 = 0x3fff; 170 u16 reg_903 = 0xffff, reg_904 = 0xffff, reg_905 = 0xffff, reg_906 = 0x3fff;
171 u8 offset = 0;
139 172
140 /* now, depending on the requested mode, we power on */ 173 /* now, depending on the requested mode, we power on */
141 switch (mode) { 174 switch (mode) {
@@ -170,16 +203,17 @@ static int dib7000m_set_power_mode(struct dib7000m_state *state, enum dib7000m_p
170 if (!state->cfg.mobile_mode) 203 if (!state->cfg.mobile_mode)
171 reg_904 |= (1 << 7) | (1 << 6) | (1 << 4) | (1 << 2) | (1 << 1); 204 reg_904 |= (1 << 7) | (1 << 6) | (1 << 4) | (1 << 2) | (1 << 1);
172 205
173 /* P_sdio_select_clk = 0 on MC */ 206 /* P_sdio_select_clk = 0 on MC and after*/
174 if (state->revision != 0x4000) 207 if (state->revision != 0x4000)
175 reg_906 <<= 1; 208 reg_906 <<= 1;
176 209
177 dib7000m_write_word(state, 903, reg_903); 210 if (state->revision == 0x4003)
178 dib7000m_write_word(state, 904, reg_904); 211 offset = 1;
179 dib7000m_write_word(state, 905, reg_905);
180 dib7000m_write_word(state, 906, reg_906);
181 212
182 return 0; 213 dib7000m_write_word(state, 903 + offset, reg_903);
214 dib7000m_write_word(state, 904 + offset, reg_904);
215 dib7000m_write_word(state, 905 + offset, reg_905);
216 dib7000m_write_word(state, 906 + offset, reg_906);
183} 217}
184 218
185static int dib7000m_set_adc_state(struct dib7000m_state *state, enum dibx000_adc_states no) 219static int dib7000m_set_adc_state(struct dib7000m_state *state, enum dibx000_adc_states no)
@@ -230,34 +264,55 @@ static int dib7000m_set_adc_state(struct dib7000m_state *state, enum dibx000_adc
230 break; 264 break;
231 } 265 }
232 266
233// dprintk("-D- 913: %x, 914: %x\n", reg_913, reg_914); 267// dprintk( "913: %x, 914: %x", reg_913, reg_914);
234
235 ret |= dib7000m_write_word(state, 913, reg_913); 268 ret |= dib7000m_write_word(state, 913, reg_913);
236 ret |= dib7000m_write_word(state, 914, reg_914); 269 ret |= dib7000m_write_word(state, 914, reg_914);
237 270
238 return ret; 271 return ret;
239} 272}
240 273
241static int dib7000m_set_bandwidth(struct dvb_frontend *demod, u8 bw_idx) 274static int dib7000m_set_bandwidth(struct dib7000m_state *state, u32 bw)
242{ 275{
243 struct dib7000m_state *state = demod->demodulator_priv;
244 u32 timf; 276 u32 timf;
245 277
246 // store the current bandwidth for later use 278 // store the current bandwidth for later use
247 state->current_bandwidth = bw_idx; 279 state->current_bandwidth = bw;
248 280
249 if (state->timf == 0) { 281 if (state->timf == 0) {
250 dprintk("-D- Using default timf\n"); 282 dprintk( "using default timf");
251 timf = state->cfg.bw->timf; 283 timf = state->timf_default;
252 } else { 284 } else {
253 dprintk("-D- Using updated timf\n"); 285 dprintk( "using updated timf");
254 timf = state->timf; 286 timf = state->timf;
255 } 287 }
256 288
257 timf = timf * (BW_INDEX_TO_KHZ(bw_idx) / 100) / 80; 289 timf = timf * (bw / 50) / 160;
258 290
259 dib7000m_write_word(state, 23, (timf >> 16) & 0xffff); 291 dib7000m_write_word(state, 23, (u16) ((timf >> 16) & 0xffff));
260 dib7000m_write_word(state, 24, (timf ) & 0xffff); 292 dib7000m_write_word(state, 24, (u16) ((timf ) & 0xffff));
293
294 return 0;
295}
296
297static int dib7000m_set_diversity_in(struct dvb_frontend *demod, int onoff)
298{
299 struct dib7000m_state *state = demod->demodulator_priv;
300
301 if (state->div_force_off) {
302 dprintk( "diversity combination deactivated - forced by COFDM parameters");
303 onoff = 0;
304 }
305 state->div_state = (u8)onoff;
306
307 if (onoff) {
308 dib7000m_write_word(state, 263 + state->reg_offs, 6);
309 dib7000m_write_word(state, 264 + state->reg_offs, 6);
310 dib7000m_write_word(state, 266 + state->reg_offs, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0));
311 } else {
312 dib7000m_write_word(state, 263 + state->reg_offs, 1);
313 dib7000m_write_word(state, 264 + state->reg_offs, 0);
314 dib7000m_write_word(state, 266 + state->reg_offs, 0);
315 }
261 316
262 return 0; 317 return 0;
263} 318}
@@ -266,7 +321,7 @@ static int dib7000m_sad_calib(struct dib7000m_state *state)
266{ 321{
267 322
268/* internal */ 323/* internal */
269// dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is written in set_bandwidth 324// dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth
270 dib7000m_write_word(state, 929, (0 << 1) | (0 << 0)); 325 dib7000m_write_word(state, 929, (0 << 1) | (0 << 0));
271 dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096 326 dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096
272 327
@@ -281,10 +336,10 @@ static int dib7000m_sad_calib(struct dib7000m_state *state)
281 336
282static void dib7000m_reset_pll_common(struct dib7000m_state *state, const struct dibx000_bandwidth_config *bw) 337static void dib7000m_reset_pll_common(struct dib7000m_state *state, const struct dibx000_bandwidth_config *bw)
283{ 338{
284 dib7000m_write_word(state, 18, ((bw->internal*1000) >> 16) & 0xffff); 339 dib7000m_write_word(state, 18, (u16) (((bw->internal*1000) >> 16) & 0xffff));
285 dib7000m_write_word(state, 19, (bw->internal*1000) & 0xffff); 340 dib7000m_write_word(state, 19, (u16) ( (bw->internal*1000) & 0xffff));
286 dib7000m_write_word(state, 21, (bw->ifreq >> 16) & 0xffff); 341 dib7000m_write_word(state, 21, (u16) ( (bw->ifreq >> 16) & 0xffff));
287 dib7000m_write_word(state, 22, bw->ifreq & 0xffff); 342 dib7000m_write_word(state, 22, (u16) ( bw->ifreq & 0xffff));
288 343
289 dib7000m_write_word(state, 928, bw->sad_cfg); 344 dib7000m_write_word(state, 928, bw->sad_cfg);
290} 345}
@@ -325,15 +380,19 @@ static void dib7000m_reset_pll(struct dib7000m_state *state)
325static void dib7000mc_reset_pll(struct dib7000m_state *state) 380static void dib7000mc_reset_pll(struct dib7000m_state *state)
326{ 381{
327 const struct dibx000_bandwidth_config *bw = state->cfg.bw; 382 const struct dibx000_bandwidth_config *bw = state->cfg.bw;
383 u16 clk_cfg1;
328 384
329 // clk_cfg0 385 // clk_cfg0
330 dib7000m_write_word(state, 907, (bw->pll_prediv << 8) | (bw->pll_ratio << 0)); 386 dib7000m_write_word(state, 907, (bw->pll_prediv << 8) | (bw->pll_ratio << 0));
331 387
332 // clk_cfg1 388 // clk_cfg1
333 //dib7000m_write_word(state, 908, (1 << 14) | (3 << 12) |(0 << 11) | 389 //dib7000m_write_word(state, 908, (1 << 14) | (3 << 12) |(0 << 11) |
334 dib7000m_write_word(state, 908, (0 << 14) | (3 << 12) |(0 << 11) | 390 clk_cfg1 = (0 << 14) | (3 << 12) |(0 << 11) |
335 (bw->IO_CLK_en_core << 10) | (bw->bypclk_div << 5) | (bw->enable_refdiv << 4) | 391 (bw->IO_CLK_en_core << 10) | (bw->bypclk_div << 5) | (bw->enable_refdiv << 4) |
336 (bw->pll_bypass << 3) | (bw->pll_range << 1) | (bw->pll_reset << 0)); 392 (1 << 3) | (bw->pll_range << 1) | (bw->pll_reset << 0);
393 dib7000m_write_word(state, 908, clk_cfg1);
394 clk_cfg1 = (clk_cfg1 & 0xfff7) | (bw->pll_bypass << 3);
395 dib7000m_write_word(state, 908, clk_cfg1);
337 396
338 // smpl_cfg 397 // smpl_cfg
339 dib7000m_write_word(state, 910, (1 << 12) | (2 << 10) | (bw->modulo << 8) | (bw->ADClkSrc << 7)); 398 dib7000m_write_word(state, 910, (1 << 12) | (2 << 10) | (bw->modulo << 8) | (bw->ADClkSrc << 7));
@@ -344,9 +403,6 @@ static void dib7000mc_reset_pll(struct dib7000m_state *state)
344static int dib7000m_reset_gpio(struct dib7000m_state *st) 403static int dib7000m_reset_gpio(struct dib7000m_state *st)
345{ 404{
346 /* reset the GPIOs */ 405 /* reset the GPIOs */
347 dprintk("-D- gpio dir: %x: gpio val: %x, gpio pwm pos: %x\n",
348 st->cfg.gpio_dir, st->cfg.gpio_val,st->cfg.gpio_pwm_pos);
349
350 dib7000m_write_word(st, 773, st->cfg.gpio_dir); 406 dib7000m_write_word(st, 773, st->cfg.gpio_dir);
351 dib7000m_write_word(st, 774, st->cfg.gpio_val); 407 dib7000m_write_word(st, 774, st->cfg.gpio_val);
352 408
@@ -358,6 +414,107 @@ static int dib7000m_reset_gpio(struct dib7000m_state *st)
358 return 0; 414 return 0;
359} 415}
360 416
417static u16 dib7000m_defaults_common[] =
418
419{
420 // auto search configuration
421 3, 2,
422 0x0004,
423 0x1000,
424 0x0814,
425
426 12, 6,
427 0x001b,
428 0x7740,
429 0x005b,
430 0x8d80,
431 0x01c9,
432 0xc380,
433 0x0000,
434 0x0080,
435 0x0000,
436 0x0090,
437 0x0001,
438 0xd4c0,
439
440 1, 26,
441 0x6680, // P_corm_thres Lock algorithms configuration
442
443 1, 170,
444 0x0410, // P_palf_alpha_regul, P_palf_filter_freeze, P_palf_filter_on
445
446 8, 173,
447 0,
448 0,
449 0,
450 0,
451 0,
452 0,
453 0,
454 0,
455
456 1, 182,
457 8192, // P_fft_nb_to_cut
458
459 2, 195,
460 0x0ccd, // P_pha3_thres
461 0, // P_cti_use_cpe, P_cti_use_prog
462
463 1, 205,
464 0x200f, // P_cspu_regul, P_cspu_win_cut
465
466 5, 214,
467 0x023d, // P_adp_regul_cnt
468 0x00a4, // P_adp_noise_cnt
469 0x00a4, // P_adp_regul_ext
470 0x7ff0, // P_adp_noise_ext
471 0x3ccc, // P_adp_fil
472
473 1, 226,
474 0, // P_2d_byp_ti_num
475
476 1, 255,
477 0x800, // P_equal_thres_wgn
478
479 1, 263,
480 0x0001,
481
482 1, 281,
483 0x0010, // P_fec_*
484
485 1, 294,
486 0x0062, // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
487
488 0
489};
490
491static u16 dib7000m_defaults[] =
492
493{
494 /* set ADC level to -16 */
495 11, 76,
496 (1 << 13) - 825 - 117,
497 (1 << 13) - 837 - 117,
498 (1 << 13) - 811 - 117,
499 (1 << 13) - 766 - 117,
500 (1 << 13) - 737 - 117,
501 (1 << 13) - 693 - 117,
502 (1 << 13) - 648 - 117,
503 (1 << 13) - 619 - 117,
504 (1 << 13) - 575 - 117,
505 (1 << 13) - 531 - 117,
506 (1 << 13) - 501 - 117,
507
508 // Tuner IO bank: max drive (14mA)
509 1, 912,
510 0x2c8a,
511
512 1, 1817,
513 1,
514
515 0,
516};
517
361static int dib7000m_demod_reset(struct dib7000m_state *state) 518static int dib7000m_demod_reset(struct dib7000m_state *state)
362{ 519{
363 dib7000m_set_power_mode(state, DIB7000M_POWER_ALL); 520 dib7000m_set_power_mode(state, DIB7000M_POWER_ALL);
@@ -382,22 +539,47 @@ static int dib7000m_demod_reset(struct dib7000m_state *state)
382 dib7000mc_reset_pll(state); 539 dib7000mc_reset_pll(state);
383 540
384 if (dib7000m_reset_gpio(state) != 0) 541 if (dib7000m_reset_gpio(state) != 0)
385 dprintk("-E- GPIO reset was not successful.\n"); 542 dprintk( "GPIO reset was not successful.");
386 543
387 if (dib7000m_set_output_mode(state, OUTMODE_HIGH_Z) != 0) 544 if (dib7000m_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
388 dprintk("-E- OUTPUT_MODE could not be resetted.\n"); 545 dprintk( "OUTPUT_MODE could not be reset.");
389 546
390 /* unforce divstr regardless whether i2c enumeration was done or not */ 547 /* unforce divstr regardless whether i2c enumeration was done or not */
391 dib7000m_write_word(state, 1794, dib7000m_read_word(state, 1794) & ~(1 << 1) ); 548 dib7000m_write_word(state, 1794, dib7000m_read_word(state, 1794) & ~(1 << 1) );
392 549
393 dib7000m_set_bandwidth(&state->demod, BANDWIDTH_8_MHZ); 550 dib7000m_set_bandwidth(state, 8000);
394 551
395 dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_ON); 552 dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_ON);
396 dib7000m_sad_calib(state); 553 dib7000m_sad_calib(state);
397 dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_OFF); 554 dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_OFF);
398 555
556 if (state->cfg.dvbt_mode)
557 dib7000m_write_word(state, 1796, 0x0); // select DVB-T output
558
559 if (state->cfg.mobile_mode)
560 dib7000m_write_word(state, 261 + state->reg_offs, 2);
561 else
562 dib7000m_write_word(state, 224 + state->reg_offs, 1);
563
564 // P_iqc_alpha_pha, P_iqc_alpha_amp, P_iqc_dcc_alpha, ...
565 if(state->cfg.tuner_is_baseband)
566 dib7000m_write_word(state, 36, 0x0755);
567 else
568 dib7000m_write_word(state, 36, 0x1f55);
569
570 // P_divclksel=3 P_divbitsel=1
571 if (state->revision == 0x4000)
572 dib7000m_write_word(state, 909, (3 << 10) | (1 << 6));
573 else
574 dib7000m_write_word(state, 909, (3 << 4) | 1);
575
576 dib7000m_write_tab(state, dib7000m_defaults_common);
577 dib7000m_write_tab(state, dib7000m_defaults);
578
399 dib7000m_set_power_mode(state, DIB7000M_POWER_INTERFACE_ONLY); 579 dib7000m_set_power_mode(state, DIB7000M_POWER_INTERFACE_ONLY);
400 580
581 state->internal_clk = state->cfg.bw->internal;
582
401 return 0; 583 return 0;
402} 584}
403 585
@@ -427,7 +609,7 @@ static int dib7000m_agc_soft_split(struct dib7000m_state *state)
427 (agc - state->current_agc->split.min_thres) / 609 (agc - state->current_agc->split.min_thres) /
428 (state->current_agc->split.max_thres - state->current_agc->split.min_thres); 610 (state->current_agc->split.max_thres - state->current_agc->split.min_thres);
429 611
430 dprintk("AGC split_offset: %d\n",split_offset); 612 dprintk( "AGC split_offset: %d",split_offset);
431 613
432 // P_agc_force_split and P_agc_split_offset 614 // P_agc_force_split and P_agc_split_offset
433 return dib7000m_write_word(state, 103, (dib7000m_read_word(state, 103) & 0xff00) | split_offset); 615 return dib7000m_write_word(state, 103, (dib7000m_read_word(state, 103) & 0xff00) | split_offset);
@@ -435,35 +617,26 @@ static int dib7000m_agc_soft_split(struct dib7000m_state *state)
435 617
436static int dib7000m_update_lna(struct dib7000m_state *state) 618static int dib7000m_update_lna(struct dib7000m_state *state)
437{ 619{
438 int i;
439 u16 dyn_gain; 620 u16 dyn_gain;
440 621
441 // when there is no LNA to program return immediatly 622 if (state->cfg.update_lna) {
442 if (state->cfg.update_lna == NULL) 623 // read dyn_gain here (because it is demod-dependent and not fe)
443 return 0;
444
445 msleep(60);
446 for (i = 0; i < 20; i++) {
447 // read dyn_gain here (because it is demod-dependent and not tuner)
448 dyn_gain = dib7000m_read_word(state, 390); 624 dyn_gain = dib7000m_read_word(state, 390);
449 625
450 dprintk("agc global: %d\n", dyn_gain);
451
452 if (state->cfg.update_lna(&state->demod,dyn_gain)) { // LNA has changed 626 if (state->cfg.update_lna(&state->demod,dyn_gain)) { // LNA has changed
453 dib7000m_restart_agc(state); 627 dib7000m_restart_agc(state);
454 msleep(60); 628 return 1;
455 } else 629 }
456 break;
457 } 630 }
458 return 0; 631 return 0;
459} 632}
460 633
461static void dib7000m_set_agc_config(struct dib7000m_state *state, u8 band) 634static int dib7000m_set_agc_config(struct dib7000m_state *state, u8 band)
462{ 635{
463 struct dibx000_agc_config *agc = NULL; 636 struct dibx000_agc_config *agc = NULL;
464 int i; 637 int i;
465 if (state->current_band == band) 638 if (state->current_band == band && state->current_agc != NULL)
466 return; 639 return 0;
467 state->current_band = band; 640 state->current_band = band;
468 641
469 for (i = 0; i < state->cfg.agc_config_count; i++) 642 for (i = 0; i < state->cfg.agc_config_count; i++)
@@ -473,8 +646,8 @@ static void dib7000m_set_agc_config(struct dib7000m_state *state, u8 band)
473 } 646 }
474 647
475 if (agc == NULL) { 648 if (agc == NULL) {
476 dprintk("-E- No valid AGC configuration found for band 0x%02x\n",band); 649 dprintk( "no valid AGC configuration found for band 0x%02x",band);
477 return; 650 return -EINVAL;
478 } 651 }
479 652
480 state->current_agc = agc; 653 state->current_agc = agc;
@@ -489,7 +662,7 @@ static void dib7000m_set_agc_config(struct dib7000m_state *state, u8 band)
489 dib7000m_write_word(state, 98, (agc->alpha_mant << 5) | agc->alpha_exp); 662 dib7000m_write_word(state, 98, (agc->alpha_mant << 5) | agc->alpha_exp);
490 dib7000m_write_word(state, 99, (agc->beta_mant << 6) | agc->beta_exp); 663 dib7000m_write_word(state, 99, (agc->beta_mant << 6) | agc->beta_exp);
491 664
492 dprintk("-D- WBD: ref: %d, sel: %d, active: %d, alpha: %d\n", 665 dprintk( "WBD: ref: %d, sel: %d, active: %d, alpha: %d",
493 state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel); 666 state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel);
494 667
495 /* AGC continued */ 668 /* AGC continued */
@@ -510,7 +683,7 @@ static void dib7000m_set_agc_config(struct dib7000m_state *state, u8 band)
510 683
511 if (state->revision > 0x4000) { // settings for the MC 684 if (state->revision > 0x4000) { // settings for the MC
512 dib7000m_write_word(state, 71, agc->agc1_pt3); 685 dib7000m_write_word(state, 71, agc->agc1_pt3);
513// dprintk("-D- 929: %x %d %d\n", 686// dprintk( "929: %x %d %d",
514// (dib7000m_read_word(state, 929) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2), agc->wbd_inv, agc->wbd_sel); 687// (dib7000m_read_word(state, 929) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2), agc->wbd_inv, agc->wbd_sel);
515 dib7000m_write_word(state, 929, (dib7000m_read_word(state, 929) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2)); 688 dib7000m_write_word(state, 929, (dib7000m_read_word(state, 929) & 0xffe3) | (agc->wbd_inv << 4) | (agc->wbd_sel << 2));
516 } else { 689 } else {
@@ -519,33 +692,160 @@ static void dib7000m_set_agc_config(struct dib7000m_state *state, u8 band)
519 for (i = 0; i < 9; i++) 692 for (i = 0; i < 9; i++)
520 dib7000m_write_word(state, 88 + i, b[i]); 693 dib7000m_write_word(state, 88 + i, b[i]);
521 } 694 }
695 return 0;
522} 696}
523 697
524static void dib7000m_update_timf_freq(struct dib7000m_state *state) 698static void dib7000m_update_timf(struct dib7000m_state *state)
525{ 699{
526 u32 timf = (dib7000m_read_word(state, 436) << 16) | dib7000m_read_word(state, 437); 700 u32 timf = (dib7000m_read_word(state, 436) << 16) | dib7000m_read_word(state, 437);
527 state->timf = timf * 80 / (BW_INDEX_TO_KHZ(state->current_bandwidth) / 100); 701 state->timf = timf * 160 / (state->current_bandwidth / 50);
528 dib7000m_write_word(state, 23, (u16) (timf >> 16)); 702 dib7000m_write_word(state, 23, (u16) (timf >> 16));
529 dib7000m_write_word(state, 24, (u16) (timf & 0xffff)); 703 dib7000m_write_word(state, 24, (u16) (timf & 0xffff));
530 dprintk("-D- Updated timf_frequency: %d (default: %d)\n",state->timf, state->cfg.bw->timf); 704 dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->timf_default);
705}
706
707static int dib7000m_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
708{
709 struct dib7000m_state *state = demod->demodulator_priv;
710 u16 cfg_72 = dib7000m_read_word(state, 72);
711 int ret = -1;
712 u8 *agc_state = &state->agc_state;
713 u8 agc_split;
714
715 switch (state->agc_state) {
716 case 0:
717 // set power-up level: interf+analog+AGC
718 dib7000m_set_power_mode(state, DIB7000M_POWER_INTERF_ANALOG_AGC);
719 dib7000m_set_adc_state(state, DIBX000_ADC_ON);
720
721 if (dib7000m_set_agc_config(state, BAND_OF_FREQUENCY(ch->frequency/1000)) != 0)
722 return -1;
723
724 ret = 7; /* ADC power up */
725 (*agc_state)++;
726 break;
727
728 case 1:
729 /* AGC initialization */
730 if (state->cfg.agc_control)
731 state->cfg.agc_control(&state->demod, 1);
732
733 dib7000m_write_word(state, 75, 32768);
734 if (!state->current_agc->perform_agc_softsplit) {
735 /* we are using the wbd - so slow AGC startup */
736 dib7000m_write_word(state, 103, 1 << 8); /* force 0 split on WBD and restart AGC */
737 (*agc_state)++;
738 ret = 5;
739 } else {
740 /* default AGC startup */
741 (*agc_state) = 4;
742 /* wait AGC rough lock time */
743 ret = 7;
744 }
745
746 dib7000m_restart_agc(state);
747 break;
748
749 case 2: /* fast split search path after 5sec */
750 dib7000m_write_word(state, 72, cfg_72 | (1 << 4)); /* freeze AGC loop */
751 dib7000m_write_word(state, 103, 2 << 9); /* fast split search 0.25kHz */
752 (*agc_state)++;
753 ret = 14;
754 break;
755
756 case 3: /* split search ended */
757 agc_split = (u8)dib7000m_read_word(state, 392); /* store the split value for the next time */
758 dib7000m_write_word(state, 75, dib7000m_read_word(state, 390)); /* set AGC gain start value */
759
760 dib7000m_write_word(state, 72, cfg_72 & ~(1 << 4)); /* std AGC loop */
761 dib7000m_write_word(state, 103, (state->current_agc->wbd_alpha << 9) | agc_split); /* standard split search */
762
763 dib7000m_restart_agc(state);
764
765 dprintk( "SPLIT %p: %hd", demod, agc_split);
766
767 (*agc_state)++;
768 ret = 5;
769 break;
770
771 case 4: /* LNA startup */
772 /* wait AGC accurate lock time */
773 ret = 7;
774
775 if (dib7000m_update_lna(state))
776 // wait only AGC rough lock time
777 ret = 5;
778 else
779 (*agc_state)++;
780 break;
781
782 case 5:
783 dib7000m_agc_soft_split(state);
784
785 if (state->cfg.agc_control)
786 state->cfg.agc_control(&state->demod, 0);
787
788 (*agc_state)++;
789 break;
790
791 default:
792 break;
793 }
794 return ret;
531} 795}
532 796
533static void dib7000m_set_channel(struct dib7000m_state *state, struct dibx000_ofdm_channel *ch, u8 seq) 797static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_frontend_parameters *ch, u8 seq)
534{ 798{
535 u16 value, est[4]; 799 u16 value, est[4];
536 800
537 dib7000m_set_agc_config(state, BAND_OF_FREQUENCY(ch->RF_kHz)); 801 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
538 802
539 /* nfft, guard, qam, alpha */ 803 /* nfft, guard, qam, alpha */
540 dib7000m_write_word(state, 0, (ch->nfft << 7) | (ch->guard << 5) | (ch->nqam << 3) | (ch->vit_alpha)); 804 value = 0;
805 switch (ch->u.ofdm.transmission_mode) {
806 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
807 case /* 4K MODE */ 255: value |= (2 << 7); break;
808 default:
809 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
810 }
811 switch (ch->u.ofdm.guard_interval) {
812 case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
813 case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
814 case GUARD_INTERVAL_1_4: value |= (3 << 5); break;
815 default:
816 case GUARD_INTERVAL_1_8: value |= (2 << 5); break;
817 }
818 switch (ch->u.ofdm.constellation) {
819 case QPSK: value |= (0 << 3); break;
820 case QAM_16: value |= (1 << 3); break;
821 default:
822 case QAM_64: value |= (2 << 3); break;
823 }
824 switch (HIERARCHY_1) {
825 case HIERARCHY_2: value |= 2; break;
826 case HIERARCHY_4: value |= 4; break;
827 default:
828 case HIERARCHY_1: value |= 1; break;
829 }
830 dib7000m_write_word(state, 0, value);
541 dib7000m_write_word(state, 5, (seq << 4)); 831 dib7000m_write_word(state, 5, (seq << 4));
542 832
543 /* P_dintl_native, P_dintlv_inv, P_vit_hrch, P_vit_code_rate, P_vit_select_hp */ 833 /* P_dintl_native, P_dintlv_inv, P_hrch, P_code_rate, P_select_hp */
544 value = (ch->intlv_native << 6) | (ch->vit_hrch << 4) | (ch->vit_select_hp & 0x1); 834 value = 0;
545 if (ch->vit_hrch == 0 || ch->vit_select_hp == 1) 835 if (1 != 0)
546 value |= (ch->vit_code_rate_hp << 1); 836 value |= (1 << 6);
547 else 837 if (ch->u.ofdm.hierarchy_information == 1)
548 value |= (ch->vit_code_rate_lp << 1); 838 value |= (1 << 4);
839 if (1 == 1)
840 value |= 1;
841 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) {
842 case FEC_2_3: value |= (2 << 1); break;
843 case FEC_3_4: value |= (3 << 1); break;
844 case FEC_5_6: value |= (5 << 1); break;
845 case FEC_7_8: value |= (7 << 1); break;
846 default:
847 case FEC_1_2: value |= (1 << 1); break;
848 }
549 dib7000m_write_word(state, 267 + state->reg_offs, value); 849 dib7000m_write_word(state, 267 + state->reg_offs, value);
550 850
551 /* offset loop parameters */ 851 /* offset loop parameters */
@@ -563,32 +863,38 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dibx000_of
563 dib7000m_write_word(state, 33, (0 << 4) | 0x5); 863 dib7000m_write_word(state, 33, (0 << 4) | 0x5);
564 864
565 /* P_dvsy_sync_wait */ 865 /* P_dvsy_sync_wait */
566 switch (ch->nfft) { 866 switch (ch->u.ofdm.transmission_mode) {
567 case 1: value = 256; break; 867 case TRANSMISSION_MODE_8K: value = 256; break;
568 case 2: value = 128; break; 868 case /* 4K MODE */ 255: value = 128; break;
569 case 0: 869 case TRANSMISSION_MODE_2K:
570 default: value = 64; break; 870 default: value = 64; break;
571 } 871 }
572 value *= ((1 << (ch->guard)) * 3 / 2); // add 50% SFN margin 872 switch (ch->u.ofdm.guard_interval) {
573 value <<= 4; 873 case GUARD_INTERVAL_1_16: value *= 2; break;
874 case GUARD_INTERVAL_1_8: value *= 4; break;
875 case GUARD_INTERVAL_1_4: value *= 8; break;
876 default:
877 case GUARD_INTERVAL_1_32: value *= 1; break;
878 }
879 state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO
574 880
575 /* deactive the possibility of diversity reception if extended interleave - not for 7000MC */ 881 /* deactive the possibility of diversity reception if extended interleave - not for 7000MC */
576 /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */ 882 /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */
577 if (ch->intlv_native || state->revision > 0x4000) 883 if (1 == 1 || state->revision > 0x4000)
578 value |= (1 << 2) | (2 << 0); 884 state->div_force_off = 0;
579 else 885 else
580 value |= 0; 886 state->div_force_off = 1;
581 dib7000m_write_word(state, 266 + state->reg_offs, value); 887 dib7000m_set_diversity_in(&state->demod, state->div_state);
582 888
583 /* channel estimation fine configuration */ 889 /* channel estimation fine configuration */
584 switch (ch->nqam) { 890 switch (ch->u.ofdm.constellation) {
585 case 2: 891 case QAM_64:
586 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ 892 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */
587 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ 893 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */
588 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */ 894 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */
589 est[3] = 0xfff8; /* P_adp_noise_ext -0.001 */ 895 est[3] = 0xfff8; /* P_adp_noise_ext -0.001 */
590 break; 896 break;
591 case 1: 897 case QAM_16:
592 est[0] = 0x023d; /* P_adp_regul_cnt 0.07 */ 898 est[0] = 0x023d; /* P_adp_regul_cnt 0.07 */
593 est[1] = 0xffdf; /* P_adp_noise_cnt -0.004 */ 899 est[1] = 0xffdf; /* P_adp_noise_cnt -0.004 */
594 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */ 900 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */
@@ -604,70 +910,48 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dibx000_of
604 for (value = 0; value < 4; value++) 910 for (value = 0; value < 4; value++)
605 dib7000m_write_word(state, 214 + value + state->reg_offs, est[value]); 911 dib7000m_write_word(state, 214 + value + state->reg_offs, est[value]);
606 912
607 // set power-up level: interf+analog+AGC
608 dib7000m_set_power_mode(state, DIB7000M_POWER_INTERF_ANALOG_AGC);
609 dib7000m_set_adc_state(state, DIBX000_ADC_ON);
610
611 msleep(7);
612
613 //AGC initialization
614 if (state->cfg.agc_control)
615 state->cfg.agc_control(&state->demod, 1);
616
617 dib7000m_restart_agc(state);
618
619 // wait AGC rough lock time
620 msleep(5);
621
622 dib7000m_update_lna(state);
623 dib7000m_agc_soft_split(state);
624
625 // wait AGC accurate lock time
626 msleep(7);
627
628 if (state->cfg.agc_control)
629 state->cfg.agc_control(&state->demod, 0);
630
631 // set power-up level: autosearch 913 // set power-up level: autosearch
632 dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD); 914 dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD);
633} 915}
634 916
635static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dibx000_ofdm_channel *ch) 917static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
636{ 918{
637 struct dib7000m_state *state = demod->demodulator_priv; 919 struct dib7000m_state *state = demod->demodulator_priv;
638 struct dibx000_ofdm_channel auto_ch; 920 struct dvb_frontend_parameters schan;
639 int ret = 0; 921 int ret = 0;
640 u32 value; 922 u32 value, factor;
641 923
642 INIT_OFDM_CHANNEL(&auto_ch); 924 schan = *ch;
643 auto_ch.RF_kHz = ch->RF_kHz; 925
644 auto_ch.Bw = ch->Bw; 926 schan.u.ofdm.constellation = QAM_64;
645 auto_ch.nqam = 2; 927 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
646 auto_ch.guard = 0; 928 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
647 auto_ch.nfft = 1; 929 schan.u.ofdm.code_rate_HP = FEC_2_3;
648 auto_ch.vit_alpha = 1; 930 schan.u.ofdm.code_rate_LP = FEC_3_4;
649 auto_ch.vit_select_hp = 1; 931 schan.u.ofdm.hierarchy_information = 0;
650 auto_ch.vit_code_rate_hp = 2; 932
651 auto_ch.vit_code_rate_lp = 3; 933 dib7000m_set_channel(state, &schan, 7);
652 auto_ch.vit_hrch = 0; 934
653 auto_ch.intlv_native = 1; 935 factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth);
654 936 if (factor >= 5000)
655 dib7000m_set_channel(state, &auto_ch, 7); 937 factor = 1;
938 else
939 factor = 6;
656 940
657 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer 941 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer
658 value = 30 * state->cfg.bw->internal; 942 value = 30 * state->internal_clk * factor;
659 ret |= dib7000m_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time 943 ret |= dib7000m_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time
660 ret |= dib7000m_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time 944 ret |= dib7000m_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time
661 value = 100 * state->cfg.bw->internal; 945 value = 100 * state->internal_clk * factor;
662 ret |= dib7000m_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time 946 ret |= dib7000m_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time
663 ret |= dib7000m_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time 947 ret |= dib7000m_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time
664 value = 500 * state->cfg.bw->internal; 948 value = 500 * state->internal_clk * factor;
665 ret |= dib7000m_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time 949 ret |= dib7000m_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time
666 ret |= dib7000m_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time 950 ret |= dib7000m_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time
667 951
668 // start search 952 // start search
669 value = dib7000m_read_word(state, 0); 953 value = dib7000m_read_word(state, 0);
670 ret |= dib7000m_write_word(state, 0, value | (1 << 9)); 954 ret |= dib7000m_write_word(state, 0, (u16) (value | (1 << 9)));
671 955
672 /* clear n_irq_pending */ 956 /* clear n_irq_pending */
673 if (state->revision == 0x4000) 957 if (state->revision == 0x4000)
@@ -685,12 +969,12 @@ static int dib7000m_autosearch_irq(struct dib7000m_state *state, u16 reg)
685 u16 irq_pending = dib7000m_read_word(state, reg); 969 u16 irq_pending = dib7000m_read_word(state, reg);
686 970
687 if (irq_pending & 0x1) { // failed 971 if (irq_pending & 0x1) { // failed
688 dprintk("#\n"); 972 dprintk( "autosearch failed");
689 return 1; 973 return 1;
690 } 974 }
691 975
692 if (irq_pending & 0x2) { // succeeded 976 if (irq_pending & 0x2) { // succeeded
693 dprintk("!\n"); 977 dprintk( "autosearch succeeded");
694 return 2; 978 return 2;
695 } 979 }
696 return 0; // still pending 980 return 0; // still pending
@@ -705,7 +989,7 @@ static int dib7000m_autosearch_is_irq(struct dvb_frontend *demod)
705 return dib7000m_autosearch_irq(state, 537); 989 return dib7000m_autosearch_irq(state, 537);
706} 990}
707 991
708static int dib7000m_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel *ch) 992static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
709{ 993{
710 struct dib7000m_state *state = demod->demodulator_priv; 994 struct dib7000m_state *state = demod->demodulator_priv;
711 int ret = 0; 995 int ret = 0;
@@ -722,182 +1006,103 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel
722 ret |= dib7000m_write_word(state, 898, 0x0000); 1006 ret |= dib7000m_write_word(state, 898, 0x0000);
723 msleep(45); 1007 msleep(45);
724 1008
725 ret |= dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_CRY_ESRAM_MOUT_NUD); 1009 dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_CRY_ESRAM_MOUT_NUD);
726 /* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3, P_ctrl_inh_cor4=1, P_ctrl_alpha_cor4=3 */ 1010 /* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3, P_ctrl_inh_cor4=1, P_ctrl_alpha_cor4=3 */
727 ret |= dib7000m_write_word(state, 29, (0 << 14) | (4 << 10) | (0 << 9) | (3 << 5) | (1 << 4) | (0x3)); 1011 ret |= dib7000m_write_word(state, 29, (0 << 14) | (4 << 10) | (0 << 9) | (3 << 5) | (1 << 4) | (0x3));
728 1012
729 // never achieved a lock with that bandwidth so far - wait for timfreq to update 1013 // never achieved a lock before - wait for timfreq to update
730 if (state->timf == 0) 1014 if (state->timf == 0)
731 msleep(200); 1015 msleep(200);
732 1016
733 //dump_reg(state); 1017 //dump_reg(state);
734 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ 1018 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */
735 value = (6 << 8) | 0x80; 1019 value = (6 << 8) | 0x80;
736 switch (ch->nfft) { 1020 switch (ch->u.ofdm.transmission_mode) {
737 case 0: value |= (7 << 12); break; 1021 case TRANSMISSION_MODE_2K: value |= (7 << 12); break;
738 case 1: value |= (9 << 12); break; 1022 case /* 4K MODE */ 255: value |= (8 << 12); break;
739 case 2: value |= (8 << 12); break; 1023 default:
1024 case TRANSMISSION_MODE_8K: value |= (9 << 12); break;
740 } 1025 }
741 ret |= dib7000m_write_word(state, 26, value); 1026 ret |= dib7000m_write_word(state, 26, value);
742 1027
743 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ 1028 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */
744 value = (0 << 4); 1029 value = (0 << 4);
745 switch (ch->nfft) { 1030 switch (ch->u.ofdm.transmission_mode) {
746 case 0: value |= 0x6; break; 1031 case TRANSMISSION_MODE_2K: value |= 0x6; break;
747 case 1: value |= 0x8; break; 1032 case /* 4K MODE */ 255: value |= 0x7; break;
748 case 2: value |= 0x7; break; 1033 default:
1034 case TRANSMISSION_MODE_8K: value |= 0x8; break;
749 } 1035 }
750 ret |= dib7000m_write_word(state, 32, value); 1036 ret |= dib7000m_write_word(state, 32, value);
751 1037
752 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ 1038 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */
753 value = (0 << 4); 1039 value = (0 << 4);
754 switch (ch->nfft) { 1040 switch (ch->u.ofdm.transmission_mode) {
755 case 0: value |= 0x6; break; 1041 case TRANSMISSION_MODE_2K: value |= 0x6; break;
756 case 1: value |= 0x8; break; 1042 case /* 4K MODE */ 255: value |= 0x7; break;
757 case 2: value |= 0x7; break; 1043 default:
1044 case TRANSMISSION_MODE_8K: value |= 0x8; break;
758 } 1045 }
759 ret |= dib7000m_write_word(state, 33, value); 1046 ret |= dib7000m_write_word(state, 33, value);
760 1047
761 // we achieved a lock - it's time to update the osc freq 1048 // we achieved a lock - it's time to update the timf freq
762 if ((dib7000m_read_word(state, 535) >> 6) & 0x1) 1049 if ((dib7000m_read_word(state, 535) >> 6) & 0x1)
763 dib7000m_update_timf_freq(state); 1050 dib7000m_update_timf(state);
764 1051
1052 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
765 return ret; 1053 return ret;
766} 1054}
767 1055
768static int dib7000m_init(struct dvb_frontend *demod) 1056static int dib7000m_wakeup(struct dvb_frontend *demod)
769{ 1057{
770 struct dib7000m_state *state = demod->demodulator_priv; 1058 struct dib7000m_state *state = demod->demodulator_priv;
771 int ret = 0;
772 u8 o = state->reg_offs;
773 1059
774 dib7000m_set_power_mode(state, DIB7000M_POWER_ALL); 1060 dib7000m_set_power_mode(state, DIB7000M_POWER_ALL);
775 1061
776 if (dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0) 1062 if (dib7000m_set_adc_state(state, DIBX000_SLOW_ADC_ON) != 0)
777 dprintk("-E- could not start Slow ADC\n"); 1063 dprintk( "could not start Slow ADC");
778
779 if (state->cfg.dvbt_mode)
780 dib7000m_write_word(state, 1796, 0x0); // select DVB-T output
781
782 if (state->cfg.mobile_mode)
783 ret |= dib7000m_write_word(state, 261 + o, 2);
784 else
785 ret |= dib7000m_write_word(state, 224 + o, 1);
786
787 ret |= dib7000m_write_word(state, 173 + o, 0);
788 ret |= dib7000m_write_word(state, 174 + o, 0);
789 ret |= dib7000m_write_word(state, 175 + o, 0);
790 ret |= dib7000m_write_word(state, 176 + o, 0);
791 ret |= dib7000m_write_word(state, 177 + o, 0);
792 ret |= dib7000m_write_word(state, 178 + o, 0);
793 ret |= dib7000m_write_word(state, 179 + o, 0);
794 ret |= dib7000m_write_word(state, 180 + o, 0);
795
796 // P_corm_thres Lock algorithms configuration
797 ret |= dib7000m_write_word(state, 26, 0x6680);
798
799 // P_palf_alpha_regul, P_palf_filter_freeze, P_palf_filter_on
800 ret |= dib7000m_write_word(state, 170 + o, 0x0410);
801 // P_fft_nb_to_cut
802 ret |= dib7000m_write_word(state, 182 + o, 8192);
803 // P_pha3_thres
804 ret |= dib7000m_write_word(state, 195 + o, 0x0ccd);
805 // P_cti_use_cpe, P_cti_use_prog
806 ret |= dib7000m_write_word(state, 196 + o, 0);
807 // P_cspu_regul, P_cspu_win_cut
808 ret |= dib7000m_write_word(state, 205 + o, 0x200f);
809 // P_adp_regul_cnt
810 ret |= dib7000m_write_word(state, 214 + o, 0x023d);
811 // P_adp_noise_cnt
812 ret |= dib7000m_write_word(state, 215 + o, 0x00a4);
813 // P_adp_regul_ext
814 ret |= dib7000m_write_word(state, 216 + o, 0x00a4);
815 // P_adp_noise_ext
816 ret |= dib7000m_write_word(state, 217 + o, 0x7ff0);
817 // P_adp_fil
818 ret |= dib7000m_write_word(state, 218 + o, 0x3ccc);
819
820 // P_2d_byp_ti_num
821 ret |= dib7000m_write_word(state, 226 + o, 0);
822
823 // P_fec_*
824 ret |= dib7000m_write_word(state, 281 + o, 0x0010);
825 // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
826 ret |= dib7000m_write_word(state, 294 + o,0x0062);
827
828 // P_iqc_alpha_pha, P_iqc_alpha_amp, P_iqc_dcc_alpha, ...
829 if(state->cfg.tuner_is_baseband)
830 ret |= dib7000m_write_word(state, 36, 0x0755);
831 else
832 ret |= dib7000m_write_word(state, 36, 0x1f55);
833
834 // auto search configuration
835 ret |= dib7000m_write_word(state, 2, 0x0004);
836 ret |= dib7000m_write_word(state, 3, 0x1000);
837 ret |= dib7000m_write_word(state, 4, 0x0814);
838 ret |= dib7000m_write_word(state, 6, 0x001b);
839 ret |= dib7000m_write_word(state, 7, 0x7740);
840 ret |= dib7000m_write_word(state, 8, 0x005b);
841 ret |= dib7000m_write_word(state, 9, 0x8d80);
842 ret |= dib7000m_write_word(state, 10, 0x01c9);
843 ret |= dib7000m_write_word(state, 11, 0xc380);
844 ret |= dib7000m_write_word(state, 12, 0x0000);
845 ret |= dib7000m_write_word(state, 13, 0x0080);
846 ret |= dib7000m_write_word(state, 14, 0x0000);
847 ret |= dib7000m_write_word(state, 15, 0x0090);
848 ret |= dib7000m_write_word(state, 16, 0x0001);
849 ret |= dib7000m_write_word(state, 17, 0xd4c0);
850 ret |= dib7000m_write_word(state, 263 + o,0x0001);
851
852 // P_divclksel=3 P_divbitsel=1
853 if (state->revision == 0x4000)
854 dib7000m_write_word(state, 909, (3 << 10) | (1 << 6));
855 else
856 dib7000m_write_word(state, 909, (3 << 4) | 1);
857
858 // Tuner IO bank: max drive (14mA)
859 ret |= dib7000m_write_word(state, 912 ,0x2c8a);
860 1064
861 ret |= dib7000m_write_word(state, 1817, 1); 1065 return 0;
862
863 return ret;
864} 1066}
865 1067
866static int dib7000m_sleep(struct dvb_frontend *demod) 1068static int dib7000m_sleep(struct dvb_frontend *demod)
867{ 1069{
868 struct dib7000m_state *st = demod->demodulator_priv; 1070 struct dib7000m_state *st = demod->demodulator_priv;
869 dib7000m_set_output_mode(st, OUTMODE_HIGH_Z); 1071 dib7000m_set_output_mode(st, OUTMODE_HIGH_Z);
870 return dib7000m_set_power_mode(st, DIB7000M_POWER_INTERFACE_ONLY) | 1072 dib7000m_set_power_mode(st, DIB7000M_POWER_INTERFACE_ONLY);
871 dib7000m_set_adc_state(st, DIBX000_SLOW_ADC_OFF) | 1073 return dib7000m_set_adc_state(st, DIBX000_SLOW_ADC_OFF) |
872 dib7000m_set_adc_state(st, DIBX000_ADC_OFF); 1074 dib7000m_set_adc_state(st, DIBX000_ADC_OFF);
873} 1075}
874 1076
875static int dib7000m_identify(struct dib7000m_state *state) 1077static int dib7000m_identify(struct dib7000m_state *state)
876{ 1078{
877 u16 value; 1079 u16 value;
1080
878 if ((value = dib7000m_read_word(state, 896)) != 0x01b3) { 1081 if ((value = dib7000m_read_word(state, 896)) != 0x01b3) {
879 dprintk("-E- DiB7000M: wrong Vendor ID (read=0x%x)\n",value); 1082 dprintk( "wrong Vendor ID (0x%x)",value);
880 return -EREMOTEIO; 1083 return -EREMOTEIO;
881 } 1084 }
882 1085
883 state->revision = dib7000m_read_word(state, 897); 1086 state->revision = dib7000m_read_word(state, 897);
884 if (state->revision != 0x4000 && 1087 if (state->revision != 0x4000 &&
885 state->revision != 0x4001 && 1088 state->revision != 0x4001 &&
886 state->revision != 0x4002) { 1089 state->revision != 0x4002 &&
887 dprintk("-E- DiB7000M: wrong Device ID (%x)\n",value); 1090 state->revision != 0x4003) {
1091 dprintk( "wrong Device ID (0x%x)",value);
888 return -EREMOTEIO; 1092 return -EREMOTEIO;
889 } 1093 }
890 1094
891 /* protect this driver to be used with 7000PC */ 1095 /* protect this driver to be used with 7000PC */
892 if (state->revision == 0x4000 && dib7000m_read_word(state, 769) == 0x4000) { 1096 if (state->revision == 0x4000 && dib7000m_read_word(state, 769) == 0x4000) {
893 dprintk("-E- DiB7000M: this driver does not work with DiB7000PC\n"); 1097 dprintk( "this driver does not work with DiB7000PC");
894 return -EREMOTEIO; 1098 return -EREMOTEIO;
895 } 1099 }
896 1100
897 switch (state->revision) { 1101 switch (state->revision) {
898 case 0x4000: dprintk("-I- found DiB7000MA/PA/MB/PB\n"); break; 1102 case 0x4000: dprintk( "found DiB7000MA/PA/MB/PB"); break;
899 case 0x4001: state->reg_offs = 1; dprintk("-I- found DiB7000HC\n"); break; 1103 case 0x4001: state->reg_offs = 1; dprintk( "found DiB7000HC"); break;
900 case 0x4002: state->reg_offs = 1; dprintk("-I- found DiB7000MC\n"); break; 1104 case 0x4002: state->reg_offs = 1; dprintk( "found DiB7000MC"); break;
1105 case 0x4003: state->reg_offs = 1; dprintk( "found DiB9000"); break;
901 } 1106 }
902 1107
903 return 0; 1108 return 0;
@@ -966,41 +1171,45 @@ static int dib7000m_set_frontend(struct dvb_frontend* fe,
966 struct dvb_frontend_parameters *fep) 1171 struct dvb_frontend_parameters *fep)
967{ 1172{
968 struct dib7000m_state *state = fe->demodulator_priv; 1173 struct dib7000m_state *state = fe->demodulator_priv;
969 struct dibx000_ofdm_channel ch; 1174 int time;
970
971 INIT_OFDM_CHANNEL(&ch);
972 FEP2DIB(fep,&ch);
973 1175
974 state->current_bandwidth = fep->u.ofdm.bandwidth; 1176 state->current_bandwidth = fep->u.ofdm.bandwidth;
975 dib7000m_set_bandwidth(fe, fep->u.ofdm.bandwidth); 1177 dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth));
976 1178
977 if (fe->ops.tuner_ops.set_params) 1179 if (fe->ops.tuner_ops.set_params)
978 fe->ops.tuner_ops.set_params(fe, fep); 1180 fe->ops.tuner_ops.set_params(fe, fep);
979 1181
1182 /* start up the AGC */
1183 state->agc_state = 0;
1184 do {
1185 time = dib7000m_agc_startup(fe, fep);
1186 if (time != -1)
1187 msleep(time);
1188 } while (time != -1);
1189
980 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 1190 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO ||
981 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || 1191 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO ||
982 fep->u.ofdm.constellation == QAM_AUTO || 1192 fep->u.ofdm.constellation == QAM_AUTO ||
983 fep->u.ofdm.code_rate_HP == FEC_AUTO) { 1193 fep->u.ofdm.code_rate_HP == FEC_AUTO) {
984 int i = 800, found; 1194 int i = 800, found;
985 1195
986 dib7000m_autosearch_start(fe, &ch); 1196 dib7000m_autosearch_start(fe, fep);
987 do { 1197 do {
988 msleep(1); 1198 msleep(1);
989 found = dib7000m_autosearch_is_irq(fe); 1199 found = dib7000m_autosearch_is_irq(fe);
990 } while (found == 0 && i--); 1200 } while (found == 0 && i--);
991 1201
992 dprintk("autosearch returns: %d\n",found); 1202 dprintk("autosearch returns: %d",found);
993 if (found == 0 || found == 1) 1203 if (found == 0 || found == 1)
994 return 0; // no channel found 1204 return 0; // no channel found
995 1205
996 dib7000m_get_frontend(fe, fep); 1206 dib7000m_get_frontend(fe, fep);
997 FEP2DIB(fep, &ch);
998 } 1207 }
999 1208
1000 /* make this a config parameter */ 1209 /* make this a config parameter */
1001 dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO); 1210 dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO);
1002 1211
1003 return dib7000m_tune(fe, &ch); 1212 return dib7000m_tune(fe, fep);
1004} 1213}
1005 1214
1006static int dib7000m_read_status(struct dvb_frontend *fe, fe_status_t *stat) 1215static int dib7000m_read_status(struct dvb_frontend *fe, fe_status_t *stat)
@@ -1087,7 +1296,7 @@ int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
1087 if (dib7000m_identify(&st) != 0) { 1296 if (dib7000m_identify(&st) != 0) {
1088 st.i2c_addr = default_addr; 1297 st.i2c_addr = default_addr;
1089 if (dib7000m_identify(&st) != 0) { 1298 if (dib7000m_identify(&st) != 0) {
1090 dprintk("DiB7000M #%d: not identified\n", k); 1299 dprintk("DiB7000M #%d: not identified", k);
1091 return -EIO; 1300 return -EIO;
1092 } 1301 }
1093 } 1302 }
@@ -1100,7 +1309,7 @@ int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
1100 /* set new i2c address and force divstart */ 1309 /* set new i2c address and force divstart */
1101 dib7000m_write_word(&st, 1794, (new_addr << 2) | 0x2); 1310 dib7000m_write_word(&st, 1794, (new_addr << 2) | 0x2);
1102 1311
1103 dprintk("IC %d initialized (to i2c_address 0x%x)\n", k, new_addr); 1312 dprintk("IC %d initialized (to i2c_address 0x%x)", k, new_addr);
1104 } 1313 }
1105 1314
1106 for (k = 0; k < no_of_demods; k++) { 1315 for (k = 0; k < no_of_demods; k++) {
@@ -1135,6 +1344,8 @@ struct dvb_frontend * dib7000m_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
1135 demod->demodulator_priv = st; 1344 demod->demodulator_priv = st;
1136 memcpy(&st->demod.ops, &dib7000m_ops, sizeof(struct dvb_frontend_ops)); 1345 memcpy(&st->demod.ops, &dib7000m_ops, sizeof(struct dvb_frontend_ops));
1137 1346
1347 st->timf_default = cfg->bw->timf;
1348
1138 if (dib7000m_identify(st) != 0) 1349 if (dib7000m_identify(st) != 0)
1139 goto error; 1350 goto error;
1140 1351
@@ -1172,7 +1383,7 @@ static struct dvb_frontend_ops dib7000m_ops = {
1172 1383
1173 .release = dib7000m_release, 1384 .release = dib7000m_release,
1174 1385
1175 .init = dib7000m_init, 1386 .init = dib7000m_wakeup,
1176 .sleep = dib7000m_sleep, 1387 .sleep = dib7000m_sleep,
1177 1388
1178 .set_frontend = dib7000m_set_frontend, 1389 .set_frontend = dib7000m_set_frontend,
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c
index aece458cfe12..f45bcfc51cf8 100644
--- a/drivers/media/dvb/frontends/dib7000p.c
+++ b/drivers/media/dvb/frontends/dib7000p.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Linux-DVB Driver for DiBcom's second generation DiB7000P (PC). 2 * Linux-DVB Driver for DiBcom's second generation DiB7000P (PC).
3 * 3 *
4 * Copyright (C) 2005-6 DiBcom (http://www.dibcom.fr/) 4 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as 7 * modify it under the terms of the GNU General Public License as
@@ -18,7 +18,11 @@ static int debug;
18module_param(debug, int, 0644); 18module_param(debug, int, 0644);
19MODULE_PARM_DESC(debug, "turn on debugging (default: 0)"); 19MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
20 20
21#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB7000P:"); printk(args); } } while (0) 21static int buggy_sfn_workaround;
22module_param(buggy_sfn_workaround, int, 0644);
23MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)");
24
25#define dprintk(args...) do { if (debug) { printk(KERN_DEBUG "DiB7000P: "); printk(args); printk("\n"); } } while (0)
22 26
23struct dib7000p_state { 27struct dib7000p_state {
24 struct dvb_frontend demod; 28 struct dvb_frontend demod;
@@ -36,12 +40,21 @@ struct dib7000p_state {
36 struct dibx000_agc_config *current_agc; 40 struct dibx000_agc_config *current_agc;
37 u32 timf; 41 u32 timf;
38 42
43 u8 div_force_off : 1;
44 u8 div_state : 1;
45 u16 div_sync_wait;
46
47 u8 agc_state;
48
39 u16 gpio_dir; 49 u16 gpio_dir;
40 u16 gpio_val; 50 u16 gpio_val;
51
52 u8 sfn_workaround_active :1;
41}; 53};
42 54
43enum dib7000p_power_mode { 55enum dib7000p_power_mode {
44 DIB7000P_POWER_ALL = 0, 56 DIB7000P_POWER_ALL = 0,
57 DIB7000P_POWER_ANALOG_ADC,
45 DIB7000P_POWER_INTERFACE_ONLY, 58 DIB7000P_POWER_INTERFACE_ONLY,
46}; 59};
47 60
@@ -55,7 +68,7 @@ static u16 dib7000p_read_word(struct dib7000p_state *state, u16 reg)
55 }; 68 };
56 69
57 if (i2c_transfer(state->i2c_adap, msg, 2) != 2) 70 if (i2c_transfer(state->i2c_adap, msg, 2) != 2)
58 dprintk("i2c read error on %d\n",reg); 71 dprintk("i2c read error on %d",reg);
59 72
60 return (rb[0] << 8) | rb[1]; 73 return (rb[0] << 8) | rb[1];
61} 74}
@@ -71,6 +84,22 @@ static int dib7000p_write_word(struct dib7000p_state *state, u16 reg, u16 val)
71 }; 84 };
72 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0; 85 return i2c_transfer(state->i2c_adap, &msg, 1) != 1 ? -EREMOTEIO : 0;
73} 86}
87static void dib7000p_write_tab(struct dib7000p_state *state, u16 *buf)
88{
89 u16 l = 0, r, *n;
90 n = buf;
91 l = *n++;
92 while (l) {
93 r = *n++;
94
95 do {
96 dib7000p_write_word(state, r, *n++);
97 r++;
98 } while (--l);
99 l = *n++;
100 }
101}
102
74static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode) 103static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode)
75{ 104{
76 int ret = 0; 105 int ret = 0;
@@ -80,7 +109,7 @@ static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode)
80 fifo_threshold = 1792; 109 fifo_threshold = 1792;
81 smo_mode = (dib7000p_read_word(state, 235) & 0x0010) | (1 << 1); 110 smo_mode = (dib7000p_read_word(state, 235) & 0x0010) | (1 << 1);
82 111
83 dprintk("-I- Setting output mode for demod %p to %d\n", 112 dprintk( "setting output mode for demod %p to %d",
84 &state->demod, mode); 113 &state->demod, mode);
85 114
86 switch (mode) { 115 switch (mode) {
@@ -104,11 +133,14 @@ static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode)
104 fifo_threshold = 512; 133 fifo_threshold = 512;
105 outreg = (1 << 10) | (5 << 6); 134 outreg = (1 << 10) | (5 << 6);
106 break; 135 break;
136 case OUTMODE_ANALOG_ADC:
137 outreg = (1 << 10) | (3 << 6);
138 break;
107 case OUTMODE_HIGH_Z: // disable 139 case OUTMODE_HIGH_Z: // disable
108 outreg = 0; 140 outreg = 0;
109 break; 141 break;
110 default: 142 default:
111 dprintk("Unhandled output_mode passed to be set for demod %p\n",&state->demod); 143 dprintk( "Unhandled output_mode passed to be set for demod %p",&state->demod);
112 break; 144 break;
113 } 145 }
114 146
@@ -122,6 +154,30 @@ static int dib7000p_set_output_mode(struct dib7000p_state *state, int mode)
122 return ret; 154 return ret;
123} 155}
124 156
157static int dib7000p_set_diversity_in(struct dvb_frontend *demod, int onoff)
158{
159 struct dib7000p_state *state = demod->demodulator_priv;
160
161 if (state->div_force_off) {
162 dprintk( "diversity combination deactivated - forced by COFDM parameters");
163 onoff = 0;
164 }
165 state->div_state = (u8)onoff;
166
167 if (onoff) {
168 dib7000p_write_word(state, 204, 6);
169 dib7000p_write_word(state, 205, 16);
170 /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */
171 dib7000p_write_word(state, 207, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0));
172 } else {
173 dib7000p_write_word(state, 204, 1);
174 dib7000p_write_word(state, 205, 0);
175 dib7000p_write_word(state, 207, 0);
176 }
177
178 return 0;
179}
180
125static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_power_mode mode) 181static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_power_mode mode)
126{ 182{
127 /* by default everything is powered off */ 183 /* by default everything is powered off */
@@ -134,10 +190,21 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p
134 case DIB7000P_POWER_ALL: 190 case DIB7000P_POWER_ALL:
135 reg_774 = 0x0000; reg_775 = 0x0000; reg_776 = 0x0; reg_899 = 0x0; reg_1280 &= 0x01ff; 191 reg_774 = 0x0000; reg_775 = 0x0000; reg_776 = 0x0; reg_899 = 0x0; reg_1280 &= 0x01ff;
136 break; 192 break;
193
194 case DIB7000P_POWER_ANALOG_ADC:
195 /* dem, cfg, iqc, sad, agc */
196 reg_774 &= ~((1 << 15) | (1 << 14) | (1 << 11) | (1 << 10) | (1 << 9));
197 /* nud */
198 reg_776 &= ~((1 << 0));
199 /* Dout */
200 reg_1280 &= ~((1 << 11));
201 /* fall through wanted to enable the interfaces */
202
137 /* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */ 203 /* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */
138 case DIB7000P_POWER_INTERFACE_ONLY: /* TODO power up either SDIO or I2C */ 204 case DIB7000P_POWER_INTERFACE_ONLY: /* TODO power up either SDIO or I2C */
139 reg_1280 &= ~((1 << 14) | (1 << 13) | (1 << 12) | (1 << 10)); 205 reg_1280 &= ~((1 << 14) | (1 << 13) | (1 << 12) | (1 << 10));
140 break; 206 break;
207
141/* TODO following stuff is just converted from the dib7000-driver - check when is used what */ 208/* TODO following stuff is just converted from the dib7000-driver - check when is used what */
142 } 209 }
143 210
@@ -188,34 +255,31 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad
188 break; 255 break;
189 } 256 }
190 257
191// dprintk("908: %x, 909: %x\n", reg_908, reg_909); 258// dprintk( "908: %x, 909: %x\n", reg_908, reg_909);
192 259
193 dib7000p_write_word(state, 908, reg_908); 260 dib7000p_write_word(state, 908, reg_908);
194 dib7000p_write_word(state, 909, reg_909); 261 dib7000p_write_word(state, 909, reg_909);
195} 262}
196 263
197static int dib7000p_set_bandwidth(struct dvb_frontend *demod, u8 BW_Idx) 264static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw)
198{ 265{
199 struct dib7000p_state *state = demod->demodulator_priv;
200 u32 timf; 266 u32 timf;
201 267
202 // store the current bandwidth for later use 268 // store the current bandwidth for later use
203 state->current_bandwidth = BW_Idx; 269 state->current_bandwidth = bw;
204 270
205 if (state->timf == 0) { 271 if (state->timf == 0) {
206 dprintk("-D- Using default timf\n"); 272 dprintk( "using default timf");
207 timf = state->cfg.bw->timf; 273 timf = state->cfg.bw->timf;
208 } else { 274 } else {
209 dprintk("-D- Using updated timf\n"); 275 dprintk( "using updated timf");
210 timf = state->timf; 276 timf = state->timf;
211 } 277 }
212 278
213 timf = timf * (BW_INDEX_TO_KHZ(BW_Idx) / 100) / 80; 279 timf = timf * (bw / 50) / 160;
214
215 dprintk("timf: %d\n",timf);
216 280
217 dib7000p_write_word(state, 23, (timf >> 16) & 0xffff); 281 dib7000p_write_word(state, 23, (u16) ((timf >> 16) & 0xffff));
218 dib7000p_write_word(state, 24, (timf ) & 0xffff); 282 dib7000p_write_word(state, 24, (u16) ((timf ) & 0xffff));
219 283
220 return 0; 284 return 0;
221} 285}
@@ -223,7 +287,7 @@ static int dib7000p_set_bandwidth(struct dvb_frontend *demod, u8 BW_Idx)
223static int dib7000p_sad_calib(struct dib7000p_state *state) 287static int dib7000p_sad_calib(struct dib7000p_state *state)
224{ 288{
225/* internal */ 289/* internal */
226// dib7000p_write_word(state, 72, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is written in set_bandwidth 290// dib7000p_write_word(state, 72, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth
227 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0)); 291 dib7000p_write_word(state, 73, (0 << 1) | (0 << 0));
228 dib7000p_write_word(state, 74, 776); // 0.625*3.3 / 4096 292 dib7000p_write_word(state, 74, 776); // 0.625*3.3 / 4096
229 293
@@ -236,18 +300,37 @@ static int dib7000p_sad_calib(struct dib7000p_state *state)
236 return 0; 300 return 0;
237} 301}
238 302
303int dib7000p_set_wbd_ref(struct dvb_frontend *demod, u16 value)
304{
305 struct dib7000p_state *state = demod->demodulator_priv;
306 if (value > 4095)
307 value = 4095;
308 state->wbd_ref = value;
309 return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value);
310}
311
312EXPORT_SYMBOL(dib7000p_set_wbd_ref);
239static void dib7000p_reset_pll(struct dib7000p_state *state) 313static void dib7000p_reset_pll(struct dib7000p_state *state)
240{ 314{
241 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0]; 315 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0];
316 u16 clk_cfg0;
317
318 /* force PLL bypass */
319 clk_cfg0 = (1 << 15) | ((bw->pll_ratio & 0x3f) << 9) |
320 (bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) |
321 (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0);
242 322
323 dib7000p_write_word(state, 900, clk_cfg0);
324
325 /* P_pll_cfg */
243 dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset); 326 dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset);
244 dib7000p_write_word(state, 900, ((bw->pll_ratio & 0x3f) << 9) | (bw->pll_bypass << 15) | (bw->modulo << 7) | (bw->ADClkSrc << 6) | 327 clk_cfg0 = (bw->pll_bypass << 15) | (clk_cfg0 & 0x7fff);
245 (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0)); 328 dib7000p_write_word(state, 900, clk_cfg0);
246 329
247 dib7000p_write_word(state, 18, ((bw->internal*1000) >> 16) & 0xffff); 330 dib7000p_write_word(state, 18, (u16) (((bw->internal*1000) >> 16) & 0xffff));
248 dib7000p_write_word(state, 19, (bw->internal*1000 ) & 0xffff); 331 dib7000p_write_word(state, 19, (u16) ( (bw->internal*1000 ) & 0xffff));
249 dib7000p_write_word(state, 21, (bw->ifreq >> 16) & 0xffff); 332 dib7000p_write_word(state, 21, (u16) ( (bw->ifreq >> 16) & 0xffff));
250 dib7000p_write_word(state, 22, (bw->ifreq ) & 0xffff); 333 dib7000p_write_word(state, 22, (u16) ( (bw->ifreq ) & 0xffff));
251 334
252 dib7000p_write_word(state, 72, bw->sad_cfg); 335 dib7000p_write_word(state, 72, bw->sad_cfg);
253} 336}
@@ -255,7 +338,7 @@ static void dib7000p_reset_pll(struct dib7000p_state *state)
255static int dib7000p_reset_gpio(struct dib7000p_state *st) 338static int dib7000p_reset_gpio(struct dib7000p_state *st)
256{ 339{
257 /* reset the GPIOs */ 340 /* reset the GPIOs */
258 dprintk("-D- gpio dir: %x: gpio val: %x, gpio pwm pos: %x\n",st->gpio_dir, st->gpio_val,st->cfg.gpio_pwm_pos); 341 dprintk( "gpio dir: %x: val: %x, pwm_pos: %x",st->gpio_dir, st->gpio_val,st->cfg.gpio_pwm_pos);
259 342
260 dib7000p_write_word(st, 1029, st->gpio_dir); 343 dib7000p_write_word(st, 1029, st->gpio_dir);
261 dib7000p_write_word(st, 1030, st->gpio_val); 344 dib7000p_write_word(st, 1030, st->gpio_val);
@@ -268,6 +351,120 @@ static int dib7000p_reset_gpio(struct dib7000p_state *st)
268 return 0; 351 return 0;
269} 352}
270 353
354static int dib7000p_cfg_gpio(struct dib7000p_state *st, u8 num, u8 dir, u8 val)
355{
356 st->gpio_dir = dib7000p_read_word(st, 1029);
357 st->gpio_dir &= ~(1 << num); /* reset the direction bit */
358 st->gpio_dir |= (dir & 0x1) << num; /* set the new direction */
359 dib7000p_write_word(st, 1029, st->gpio_dir);
360
361 st->gpio_val = dib7000p_read_word(st, 1030);
362 st->gpio_val &= ~(1 << num); /* reset the direction bit */
363 st->gpio_val |= (val & 0x01) << num; /* set the new value */
364 dib7000p_write_word(st, 1030, st->gpio_val);
365
366 return 0;
367}
368
369int dib7000p_set_gpio(struct dvb_frontend *demod, u8 num, u8 dir, u8 val)
370{
371 struct dib7000p_state *state = demod->demodulator_priv;
372 return dib7000p_cfg_gpio(state, num, dir, val);
373}
374
375EXPORT_SYMBOL(dib7000p_set_gpio);
376static u16 dib7000p_defaults[] =
377
378{
379 // auto search configuration
380 3, 2,
381 0x0004,
382 0x1000,
383 0x0814, /* Equal Lock */
384
385 12, 6,
386 0x001b,
387 0x7740,
388 0x005b,
389 0x8d80,
390 0x01c9,
391 0xc380,
392 0x0000,
393 0x0080,
394 0x0000,
395 0x0090,
396 0x0001,
397 0xd4c0,
398
399 1, 26,
400 0x6680, // P_timf_alpha=6, P_corm_alpha=6, P_corm_thres=128 default: 6,4,26
401
402 /* set ADC level to -16 */
403 11, 79,
404 (1 << 13) - 825 - 117,
405 (1 << 13) - 837 - 117,
406 (1 << 13) - 811 - 117,
407 (1 << 13) - 766 - 117,
408 (1 << 13) - 737 - 117,
409 (1 << 13) - 693 - 117,
410 (1 << 13) - 648 - 117,
411 (1 << 13) - 619 - 117,
412 (1 << 13) - 575 - 117,
413 (1 << 13) - 531 - 117,
414 (1 << 13) - 501 - 117,
415
416 1, 142,
417 0x0410, // P_palf_filter_on=1, P_palf_filter_freeze=0, P_palf_alpha_regul=16
418
419 /* disable power smoothing */
420 8, 145,
421 0,
422 0,
423 0,
424 0,
425 0,
426 0,
427 0,
428 0,
429
430 1, 154,
431 1 << 13, // P_fft_freq_dir=1, P_fft_nb_to_cut=0
432
433 1, 168,
434 0x0ccd, // P_pha3_thres, default 0x3000
435
436// 1, 169,
437// 0x0010, // P_cti_use_cpe=0, P_cti_use_prog=0, P_cti_win_len=16, default: 0x0010
438
439 1, 183,
440 0x200f, // P_cspu_regul=512, P_cspu_win_cut=15, default: 0x2005
441
442 5, 187,
443 0x023d, // P_adp_regul_cnt=573, default: 410
444 0x00a4, // P_adp_noise_cnt=
445 0x00a4, // P_adp_regul_ext
446 0x7ff0, // P_adp_noise_ext
447 0x3ccc, // P_adp_fil
448
449 1, 198,
450 0x800, // P_equal_thres_wgn
451
452 1, 222,
453 0x0010, // P_fec_ber_rs_len=2
454
455 1, 235,
456 0x0062, // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
457
458 2, 901,
459 0x0006, // P_clk_cfg1
460 (3 << 10) | (1 << 6), // P_divclksel=3 P_divbitsel=1
461
462 1, 905,
463 0x2c8e, // Tuner IO bank: max drive (14mA) + divout pads max drive
464
465 0,
466};
467
271static int dib7000p_demod_reset(struct dib7000p_state *state) 468static int dib7000p_demod_reset(struct dib7000p_state *state)
272{ 469{
273 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL); 470 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
@@ -292,111 +489,307 @@ static int dib7000p_demod_reset(struct dib7000p_state *state)
292 dib7000p_reset_pll(state); 489 dib7000p_reset_pll(state);
293 490
294 if (dib7000p_reset_gpio(state) != 0) 491 if (dib7000p_reset_gpio(state) != 0)
295 dprintk("-E- GPIO reset was not successful.\n"); 492 dprintk( "GPIO reset was not successful.");
296 493
297 if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0) 494 if (dib7000p_set_output_mode(state, OUTMODE_HIGH_Z) != 0)
298 dprintk("-E- OUTPUT_MODE could not be resetted.\n"); 495 dprintk( "OUTPUT_MODE could not be reset.");
299 496
300 /* unforce divstr regardless whether i2c enumeration was done or not */ 497 /* unforce divstr regardless whether i2c enumeration was done or not */
301 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1) ); 498 dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1) );
302 499
500 dib7000p_set_bandwidth(state, 8000);
501
502 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON);
503 dib7000p_sad_calib(state);
504 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_OFF);
505
506 // P_iqc_alpha_pha, P_iqc_alpha_amp_dcc_alpha, ...
507 if(state->cfg.tuner_is_baseband)
508 dib7000p_write_word(state, 36,0x0755);
509 else
510 dib7000p_write_word(state, 36,0x1f55);
511
512 dib7000p_write_tab(state, dib7000p_defaults);
513
303 dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY); 514 dib7000p_set_power_mode(state, DIB7000P_POWER_INTERFACE_ONLY);
304 515
516
305 return 0; 517 return 0;
306} 518}
307 519
520static void dib7000p_pll_clk_cfg(struct dib7000p_state *state)
521{
522 u16 tmp = 0;
523 tmp = dib7000p_read_word(state, 903);
524 dib7000p_write_word(state, 903, (tmp | 0x1)); //pwr-up pll
525 tmp = dib7000p_read_word(state, 900);
526 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6)); //use High freq clock
527}
528
308static void dib7000p_restart_agc(struct dib7000p_state *state) 529static void dib7000p_restart_agc(struct dib7000p_state *state)
309{ 530{
310 // P_restart_iqc & P_restart_agc 531 // P_restart_iqc & P_restart_agc
311 dib7000p_write_word(state, 770, 0x0c00); 532 dib7000p_write_word(state, 770, (1 << 11) | (1 << 9));
312 dib7000p_write_word(state, 770, 0x0000); 533 dib7000p_write_word(state, 770, 0x0000);
313} 534}
314 535
315static void dib7000p_update_lna(struct dib7000p_state *state) 536static int dib7000p_update_lna(struct dib7000p_state *state)
316{ 537{
317 int i;
318 u16 dyn_gain; 538 u16 dyn_gain;
319 539
320 // when there is no LNA to program return immediatly 540 // when there is no LNA to program return immediatly
321 if (state->cfg.update_lna == NULL) 541 if (state->cfg.update_lna) {
322 return; 542 // read dyn_gain here (because it is demod-dependent and not fe)
323
324 for (i = 0; i < 5; i++) {
325 // read dyn_gain here (because it is demod-dependent and not tuner)
326 dyn_gain = dib7000p_read_word(state, 394); 543 dyn_gain = dib7000p_read_word(state, 394);
327
328 if (state->cfg.update_lna(&state->demod,dyn_gain)) { // LNA has changed 544 if (state->cfg.update_lna(&state->demod,dyn_gain)) { // LNA has changed
329 dib7000p_restart_agc(state); 545 dib7000p_restart_agc(state);
330 msleep(5); 546 return 1;
331 } else 547 }
548 }
549
550 return 0;
551}
552
553static int dib7000p_set_agc_config(struct dib7000p_state *state, u8 band)
554{
555 struct dibx000_agc_config *agc = NULL;
556 int i;
557 if (state->current_band == band && state->current_agc != NULL)
558 return 0;
559 state->current_band = band;
560
561 for (i = 0; i < state->cfg.agc_config_count; i++)
562 if (state->cfg.agc[i].band_caps & band) {
563 agc = &state->cfg.agc[i];
332 break; 564 break;
565 }
566
567 if (agc == NULL) {
568 dprintk( "no valid AGC configuration found for band 0x%02x",band);
569 return -EINVAL;
333 } 570 }
571
572 state->current_agc = agc;
573
574 /* AGC */
575 dib7000p_write_word(state, 75 , agc->setup );
576 dib7000p_write_word(state, 76 , agc->inv_gain );
577 dib7000p_write_word(state, 77 , agc->time_stabiliz );
578 dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock);
579
580 // Demod AGC loop configuration
581 dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp);
582 dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp);
583
584 /* AGC continued */
585 dprintk( "WBD: ref: %d, sel: %d, active: %d, alpha: %d",
586 state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel);
587
588 if (state->wbd_ref != 0)
589 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref);
590 else
591 dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref);
592
593 dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8));
594
595 dib7000p_write_word(state, 107, agc->agc1_max);
596 dib7000p_write_word(state, 108, agc->agc1_min);
597 dib7000p_write_word(state, 109, agc->agc2_max);
598 dib7000p_write_word(state, 110, agc->agc2_min);
599 dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2);
600 dib7000p_write_word(state, 112, agc->agc1_pt3);
601 dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
602 dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
603 dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
604 return 0;
334} 605}
335 606
336static void dib7000p_pll_clk_cfg(struct dib7000p_state *state) 607static int dib7000p_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
337{ 608{
338 u16 tmp = 0; 609 struct dib7000p_state *state = demod->demodulator_priv;
339 tmp = dib7000p_read_word(state, 903); 610 int ret = -1;
340 dib7000p_write_word(state, 903, (tmp | 0x1)); //pwr-up pll 611 u8 *agc_state = &state->agc_state;
341 tmp = dib7000p_read_word(state, 900); 612 u8 agc_split;
342 dib7000p_write_word(state, 900, (tmp & 0x7fff) | (1 << 6)); //use High freq clock 613
614 switch (state->agc_state) {
615 case 0:
616 // set power-up level: interf+analog+AGC
617 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
618 dib7000p_set_adc_state(state, DIBX000_ADC_ON);
619 dib7000p_pll_clk_cfg(state);
620
621 if (dib7000p_set_agc_config(state, BAND_OF_FREQUENCY(ch->frequency/1000)) != 0)
622 return -1;
623
624 ret = 7;
625 (*agc_state)++;
626 break;
627
628 case 1:
629 // AGC initialization
630 if (state->cfg.agc_control)
631 state->cfg.agc_control(&state->demod, 1);
632
633 dib7000p_write_word(state, 78, 32768);
634 if (!state->current_agc->perform_agc_softsplit) {
635 /* we are using the wbd - so slow AGC startup */
636 /* force 0 split on WBD and restart AGC */
637 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | (1 << 8));
638 (*agc_state)++;
639 ret = 5;
640 } else {
641 /* default AGC startup */
642 (*agc_state) = 4;
643 /* wait AGC rough lock time */
644 ret = 7;
645 }
646
647 dib7000p_restart_agc(state);
648 break;
649
650 case 2: /* fast split search path after 5sec */
651 dib7000p_write_word(state, 75, state->current_agc->setup | (1 << 4)); /* freeze AGC loop */
652 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (2 << 9) | (0 << 8)); /* fast split search 0.25kHz */
653 (*agc_state)++;
654 ret = 14;
655 break;
656
657 case 3: /* split search ended */
658 agc_split = (u8)dib7000p_read_word(state, 396); /* store the split value for the next time */
659 dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */
660
661 dib7000p_write_word(state, 75, state->current_agc->setup); /* std AGC loop */
662 dib7000p_write_word(state, 106, (state->current_agc->wbd_sel << 13) | (state->current_agc->wbd_alpha << 9) | agc_split); /* standard split search */
663
664 dib7000p_restart_agc(state);
665
666 dprintk( "SPLIT %p: %hd", demod, agc_split);
667
668 (*agc_state)++;
669 ret = 5;
670 break;
671
672 case 4: /* LNA startup */
673 // wait AGC accurate lock time
674 ret = 7;
675
676 if (dib7000p_update_lna(state))
677 // wait only AGC rough lock time
678 ret = 5;
679 else // nothing was done, go to the next state
680 (*agc_state)++;
681 break;
682
683 case 5:
684 if (state->cfg.agc_control)
685 state->cfg.agc_control(&state->demod, 0);
686 (*agc_state)++;
687 break;
688 default:
689 break;
690 }
691 return ret;
343} 692}
344 693
345static void dib7000p_update_timf_freq(struct dib7000p_state *state) 694static void dib7000p_update_timf(struct dib7000p_state *state)
346{ 695{
347 u32 timf = (dib7000p_read_word(state, 427) << 16) | dib7000p_read_word(state, 428); 696 u32 timf = (dib7000p_read_word(state, 427) << 16) | dib7000p_read_word(state, 428);
348 state->timf = timf * 80 / (BW_INDEX_TO_KHZ(state->current_bandwidth) / 100); 697 state->timf = timf * 160 / (state->current_bandwidth / 50);
349 dib7000p_write_word(state, 23, (u16) (timf >> 16)); 698 dib7000p_write_word(state, 23, (u16) (timf >> 16));
350 dib7000p_write_word(state, 24, (u16) (timf & 0xffff)); 699 dib7000p_write_word(state, 24, (u16) (timf & 0xffff));
351 dprintk("-D- Updated timf_frequency: %d (default: %d)\n",state->timf, state->cfg.bw->timf); 700 dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->cfg.bw->timf);
701
352} 702}
353 703
354static void dib7000p_set_channel(struct dib7000p_state *state, struct dibx000_ofdm_channel *ch, u8 seq) 704static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_frontend_parameters *ch, u8 seq)
355{ 705{
356 u16 tmp, est[4]; // reg_26, reg_32, reg_33, reg_187, reg_188, reg_189, reg_190, reg_207, reg_208; 706 u16 value, est[4];
707
708 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
357 709
358 /* nfft, guard, qam, alpha */ 710 /* nfft, guard, qam, alpha */
359 dib7000p_write_word(state, 0, (ch->nfft << 7) | (ch->guard << 5) | (ch->nqam << 3) | (ch->vit_alpha)); 711 value = 0;
712 switch (ch->u.ofdm.transmission_mode) {
713 case TRANSMISSION_MODE_2K: value |= (0 << 7); break;
714 case /* 4K MODE */ 255: value |= (2 << 7); break;
715 default:
716 case TRANSMISSION_MODE_8K: value |= (1 << 7); break;
717 }
718 switch (ch->u.ofdm.guard_interval) {
719 case GUARD_INTERVAL_1_32: value |= (0 << 5); break;
720 case GUARD_INTERVAL_1_16: value |= (1 << 5); break;
721 case GUARD_INTERVAL_1_4: value |= (3 << 5); break;
722 default:
723 case GUARD_INTERVAL_1_8: value |= (2 << 5); break;
724 }
725 switch (ch->u.ofdm.constellation) {
726 case QPSK: value |= (0 << 3); break;
727 case QAM_16: value |= (1 << 3); break;
728 default:
729 case QAM_64: value |= (2 << 3); break;
730 }
731 switch (HIERARCHY_1) {
732 case HIERARCHY_2: value |= 2; break;
733 case HIERARCHY_4: value |= 4; break;
734 default:
735 case HIERARCHY_1: value |= 1; break;
736 }
737 dib7000p_write_word(state, 0, value);
360 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */ 738 dib7000p_write_word(state, 5, (seq << 4) | 1); /* do not force tps, search list 0 */
361 739
362 /* P_dintl_native, P_dintlv_inv, P_vit_hrch, P_vit_code_rate, P_vit_select_hp */ 740 /* P_dintl_native, P_dintlv_inv, P_hrch, P_code_rate, P_select_hp */
363 tmp = (ch->intlv_native << 6) | (ch->vit_hrch << 4) | (ch->vit_select_hp & 0x1); 741 value = 0;
364 if (ch->vit_hrch == 0 || ch->vit_select_hp == 1) 742 if (1 != 0)
365 tmp |= (ch->vit_code_rate_hp << 1); 743 value |= (1 << 6);
366 else 744 if (ch->u.ofdm.hierarchy_information == 1)
367 tmp |= (ch->vit_code_rate_lp << 1); 745 value |= (1 << 4);
368 dib7000p_write_word(state, 208, tmp); 746 if (1 == 1)
747 value |= 1;
748 switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) {
749 case FEC_2_3: value |= (2 << 1); break;
750 case FEC_3_4: value |= (3 << 1); break;
751 case FEC_5_6: value |= (5 << 1); break;
752 case FEC_7_8: value |= (7 << 1); break;
753 default:
754 case FEC_1_2: value |= (1 << 1); break;
755 }
756 dib7000p_write_word(state, 208, value);
757
758 /* offset loop parameters */
759 dib7000p_write_word(state, 26, 0x6680); // timf(6xxx)
760 dib7000p_write_word(state, 32, 0x0003); // pha_off_max(xxx3)
761 dib7000p_write_word(state, 29, 0x1273); // isi
762 dib7000p_write_word(state, 33, 0x0005); // sfreq(xxx5)
369 763
370 /* P_dvsy_sync_wait */ 764 /* P_dvsy_sync_wait */
371 switch (ch->nfft) { 765 switch (ch->u.ofdm.transmission_mode) {
372 case 1: tmp = 256; break; 766 case TRANSMISSION_MODE_8K: value = 256; break;
373 case 2: tmp = 128; break; 767 case /* 4K MODE */ 255: value = 128; break;
374 case 0: 768 case TRANSMISSION_MODE_2K:
375 default: tmp = 64; break; 769 default: value = 64; break;
376 } 770 }
377 tmp *= ((1 << (ch->guard)) * 3 / 2); // add 50% SFN margin 771 switch (ch->u.ofdm.guard_interval) {
378 tmp <<= 4; 772 case GUARD_INTERVAL_1_16: value *= 2; break;
379 773 case GUARD_INTERVAL_1_8: value *= 4; break;
380 /* deactive the possibility of diversity reception if extended interleave */ 774 case GUARD_INTERVAL_1_4: value *= 8; break;
381 /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */ 775 default:
382 if (ch->intlv_native || ch->nfft == 1) 776 case GUARD_INTERVAL_1_32: value *= 1; break;
383 tmp |= (1 << 2) | (2 << 0); 777 }
384 dib7000p_write_word(state, 207, tmp); 778 state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO
385 779
386 dib7000p_write_word(state, 26, 0x6680); // timf(6xxx) 780 /* deactive the possibility of diversity reception if extended interleaver */
387 dib7000p_write_word(state, 29, 0x1273); // isi inh1273 on1073 781 state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K;
388 dib7000p_write_word(state, 32, 0x0003); // pha_off_max(xxx3) 782 dib7000p_set_diversity_in(&state->demod, state->div_state);
389 dib7000p_write_word(state, 33, 0x0005); // sfreq(xxx5)
390 783
391 /* channel estimation fine configuration */ 784 /* channel estimation fine configuration */
392 switch (ch->nqam) { 785 switch (ch->u.ofdm.constellation) {
393 case 2: 786 case QAM_64:
394 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ 787 est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */
395 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ 788 est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */
396 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */ 789 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */
397 est[3] = 0xfff8; /* P_adp_noise_ext -0.001 */ 790 est[3] = 0xfff8; /* P_adp_noise_ext -0.001 */
398 break; 791 break;
399 case 1: 792 case QAM_16:
400 est[0] = 0x023d; /* P_adp_regul_cnt 0.07 */ 793 est[0] = 0x023d; /* P_adp_regul_cnt 0.07 */
401 est[1] = 0xffdf; /* P_adp_noise_cnt -0.004 */ 794 est[1] = 0xffdf; /* P_adp_noise_cnt -0.004 */
402 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */ 795 est[2] = 0x00a4; /* P_adp_regul_ext 0.02 */
@@ -409,66 +802,45 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dibx000_of
409 est[3] = 0xfff8; /* P_adp_noise_ext -0.002 */ 802 est[3] = 0xfff8; /* P_adp_noise_ext -0.002 */
410 break; 803 break;
411 } 804 }
412 for (tmp = 0; tmp < 4; tmp++) 805 for (value = 0; value < 4; value++)
413 dib7000p_write_word(state, 187 + tmp, est[tmp]); 806 dib7000p_write_word(state, 187 + value, est[value]);
414
415 // set power-up level: interf+analog+AGC
416 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
417 dib7000p_set_adc_state(state, DIBX000_ADC_ON);
418 dib7000p_pll_clk_cfg(state);
419 msleep(7);
420
421 // AGC initialization
422 if (state->cfg.agc_control)
423 state->cfg.agc_control(&state->demod, 1);
424
425 dib7000p_restart_agc(state);
426
427 // wait AGC rough lock time
428 msleep(5);
429
430 dib7000p_update_lna(state);
431
432 // wait AGC accurate lock time
433 msleep(7);
434 if (state->cfg.agc_control)
435 state->cfg.agc_control(&state->demod, 0);
436} 807}
437 808
438static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dibx000_ofdm_channel *ch) 809static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
439{ 810{
440 struct dib7000p_state *state = demod->demodulator_priv; 811 struct dib7000p_state *state = demod->demodulator_priv;
441 struct dibx000_ofdm_channel auto_ch; 812 struct dvb_frontend_parameters schan;
442 u32 value; 813 u32 value, factor;
443 814
444 INIT_OFDM_CHANNEL(&auto_ch); 815 schan = *ch;
445 auto_ch.RF_kHz = ch->RF_kHz; 816 schan.u.ofdm.constellation = QAM_64;
446 auto_ch.Bw = ch->Bw; 817 schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
447 auto_ch.nqam = 2; 818 schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
448 auto_ch.guard = 0; 819 schan.u.ofdm.code_rate_HP = FEC_2_3;
449 auto_ch.nfft = 1; 820 schan.u.ofdm.code_rate_LP = FEC_3_4;
450 auto_ch.vit_alpha = 1; 821 schan.u.ofdm.hierarchy_information = 0;
451 auto_ch.vit_select_hp = 1; 822
452 auto_ch.vit_code_rate_hp = 2; 823 dib7000p_set_channel(state, &schan, 7);
453 auto_ch.vit_code_rate_lp = 3; 824
454 auto_ch.vit_hrch = 0; 825 factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth);
455 auto_ch.intlv_native = 1; 826 if (factor >= 5000)
456 827 factor = 1;
457 dib7000p_set_channel(state, &auto_ch, 7); 828 else
829 factor = 6;
458 830
459 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer 831 // always use the setting for 8MHz here lock_time for 7,6 MHz are longer
460 value = 30 * state->cfg.bw->internal; 832 value = 30 * state->cfg.bw->internal * factor;
461 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time 833 dib7000p_write_word(state, 6, (u16) ((value >> 16) & 0xffff)); // lock0 wait time
462 dib7000p_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time 834 dib7000p_write_word(state, 7, (u16) (value & 0xffff)); // lock0 wait time
463 value = 100 * state->cfg.bw->internal; 835 value = 100 * state->cfg.bw->internal * factor;
464 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time 836 dib7000p_write_word(state, 8, (u16) ((value >> 16) & 0xffff)); // lock1 wait time
465 dib7000p_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time 837 dib7000p_write_word(state, 9, (u16) (value & 0xffff)); // lock1 wait time
466 value = 500 * state->cfg.bw->internal; 838 value = 500 * state->cfg.bw->internal * factor;
467 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time 839 dib7000p_write_word(state, 10, (u16) ((value >> 16) & 0xffff)); // lock2 wait time
468 dib7000p_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time 840 dib7000p_write_word(state, 11, (u16) (value & 0xffff)); // lock2 wait time
469 841
470 value = dib7000p_read_word(state, 0); 842 value = dib7000p_read_word(state, 0);
471 dib7000p_write_word(state, 0, (1 << 9) | value); 843 dib7000p_write_word(state, 0, (u16) ((1 << 9) | value));
472 dib7000p_read_word(state, 1284); 844 dib7000p_read_word(state, 1284);
473 dib7000p_write_word(state, 0, (u16) value); 845 dib7000p_write_word(state, 0, (u16) value);
474 846
@@ -489,7 +861,95 @@ static int dib7000p_autosearch_is_irq(struct dvb_frontend *demod)
489 return 0; // still pending 861 return 0; // still pending
490} 862}
491 863
492static int dib7000p_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel *ch) 864static void dib7000p_spur_protect(struct dib7000p_state *state, u32 rf_khz, u32 bw)
865{
866 static s16 notch[]={16143, 14402, 12238, 9713, 6902, 3888, 759, -2392};
867 static u8 sine [] ={0, 2, 3, 5, 6, 8, 9, 11, 13, 14, 16, 17, 19, 20, 22,
868 24, 25, 27, 28, 30, 31, 33, 34, 36, 38, 39, 41, 42, 44, 45, 47, 48, 50, 51,
869 53, 55, 56, 58, 59, 61, 62, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77, 79, 80,
870 82, 83, 85, 86, 88, 89, 91, 92, 94, 95, 97, 98, 99, 101, 102, 104, 105,
871 107, 108, 109, 111, 112, 114, 115, 117, 118, 119, 121, 122, 123, 125, 126,
872 128, 129, 130, 132, 133, 134, 136, 137, 138, 140, 141, 142, 144, 145, 146,
873 147, 149, 150, 151, 152, 154, 155, 156, 157, 159, 160, 161, 162, 164, 165,
874 166, 167, 168, 170, 171, 172, 173, 174, 175, 177, 178, 179, 180, 181, 182,
875 183, 184, 185, 186, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
876 199, 200, 201, 202, 203, 204, 205, 206, 207, 207, 208, 209, 210, 211, 212,
877 213, 214, 215, 215, 216, 217, 218, 219, 220, 220, 221, 222, 223, 224, 224,
878 225, 226, 227, 227, 228, 229, 229, 230, 231, 231, 232, 233, 233, 234, 235,
879 235, 236, 237, 237, 238, 238, 239, 239, 240, 241, 241, 242, 242, 243, 243,
880 244, 244, 245, 245, 245, 246, 246, 247, 247, 248, 248, 248, 249, 249, 249,
881 250, 250, 250, 251, 251, 251, 252, 252, 252, 252, 253, 253, 253, 253, 254,
882 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
883 255, 255, 255, 255, 255, 255};
884
885 u32 xtal = state->cfg.bw->xtal_hz / 1000;
886 int f_rel = ( (rf_khz + xtal/2) / xtal) * xtal - rf_khz;
887 int k;
888 int coef_re[8],coef_im[8];
889 int bw_khz = bw;
890 u32 pha;
891
892 dprintk( "relative position of the Spur: %dk (RF: %dk, XTAL: %dk)", f_rel, rf_khz, xtal);
893
894
895 if (f_rel < -bw_khz/2 || f_rel > bw_khz/2)
896 return;
897
898 bw_khz /= 100;
899
900 dib7000p_write_word(state, 142 ,0x0610);
901
902 for (k = 0; k < 8; k++) {
903 pha = ((f_rel * (k+1) * 112 * 80/bw_khz) /1000) & 0x3ff;
904
905 if (pha==0) {
906 coef_re[k] = 256;
907 coef_im[k] = 0;
908 } else if(pha < 256) {
909 coef_re[k] = sine[256-(pha&0xff)];
910 coef_im[k] = sine[pha&0xff];
911 } else if (pha == 256) {
912 coef_re[k] = 0;
913 coef_im[k] = 256;
914 } else if (pha < 512) {
915 coef_re[k] = -sine[pha&0xff];
916 coef_im[k] = sine[256 - (pha&0xff)];
917 } else if (pha == 512) {
918 coef_re[k] = -256;
919 coef_im[k] = 0;
920 } else if (pha < 768) {
921 coef_re[k] = -sine[256-(pha&0xff)];
922 coef_im[k] = -sine[pha&0xff];
923 } else if (pha == 768) {
924 coef_re[k] = 0;
925 coef_im[k] = -256;
926 } else {
927 coef_re[k] = sine[pha&0xff];
928 coef_im[k] = -sine[256 - (pha&0xff)];
929 }
930
931 coef_re[k] *= notch[k];
932 coef_re[k] += (1<<14);
933 if (coef_re[k] >= (1<<24))
934 coef_re[k] = (1<<24) - 1;
935 coef_re[k] /= (1<<15);
936
937 coef_im[k] *= notch[k];
938 coef_im[k] += (1<<14);
939 if (coef_im[k] >= (1<<24))
940 coef_im[k] = (1<<24)-1;
941 coef_im[k] /= (1<<15);
942
943 dprintk( "PALF COEF: %d re: %d im: %d", k, coef_re[k], coef_im[k]);
944
945 dib7000p_write_word(state, 143, (0 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
946 dib7000p_write_word(state, 144, coef_im[k] & 0x3ff);
947 dib7000p_write_word(state, 143, (1 << 14) | (k << 10) | (coef_re[k] & 0x3ff));
948 }
949 dib7000p_write_word(state,143 ,0);
950}
951
952static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch)
493{ 953{
494 struct dib7000p_state *state = demod->demodulator_priv; 954 struct dib7000p_state *state = demod->demodulator_priv;
495 u16 tmp = 0; 955 u16 tmp = 0;
@@ -505,7 +965,15 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel
505 msleep(45); 965 msleep(45);
506 966
507 /* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3, P_ctrl_inh_cor4=1, P_ctrl_alpha_cor4=3 */ 967 /* P_ctrl_inh_cor=0, P_ctrl_alpha_cor=4, P_ctrl_inh_isi=0, P_ctrl_alpha_isi=3, P_ctrl_inh_cor4=1, P_ctrl_alpha_cor4=3 */
508 dib7000p_write_word(state, 29, (0 << 14) | (4 << 10) | (0 << 9) | (3 << 5) | (1 << 4) | (0x3)); 968 tmp = (0 << 14) | (4 << 10) | (0 << 9) | (3 << 5) | (1 << 4) | (0x3);
969 if (state->sfn_workaround_active) {
970 dprintk( "SFN workaround is active");
971 tmp |= (1 << 9);
972 dib7000p_write_word(state, 166, 0x4000); // P_pha3_force_pha_shift
973 } else {
974 dib7000p_write_word(state, 166, 0x0000); // P_pha3_force_pha_shift
975 }
976 dib7000p_write_word(state, 29, tmp);
509 977
510 // never achieved a lock with that bandwidth so far - wait for osc-freq to update 978 // never achieved a lock with that bandwidth so far - wait for osc-freq to update
511 if (state->timf == 0) 979 if (state->timf == 0)
@@ -515,28 +983,31 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel
515 983
516 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ 984 /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */
517 tmp = (6 << 8) | 0x80; 985 tmp = (6 << 8) | 0x80;
518 switch (ch->nfft) { 986 switch (ch->u.ofdm.transmission_mode) {
519 case 0: tmp |= (7 << 12); break; 987 case TRANSMISSION_MODE_2K: tmp |= (7 << 12); break;
520 case 1: tmp |= (9 << 12); break; 988 case /* 4K MODE */ 255: tmp |= (8 << 12); break;
521 case 2: tmp |= (8 << 12); break; 989 default:
990 case TRANSMISSION_MODE_8K: tmp |= (9 << 12); break;
522 } 991 }
523 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */ 992 dib7000p_write_word(state, 26, tmp); /* timf_a(6xxx) */
524 993
525 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ 994 /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */
526 tmp = (0 << 4); 995 tmp = (0 << 4);
527 switch (ch->nfft) { 996 switch (ch->u.ofdm.transmission_mode) {
528 case 0: tmp |= 0x6; break; 997 case TRANSMISSION_MODE_2K: tmp |= 0x6; break;
529 case 1: tmp |= 0x8; break; 998 case /* 4K MODE */ 255: tmp |= 0x7; break;
530 case 2: tmp |= 0x7; break; 999 default:
1000 case TRANSMISSION_MODE_8K: tmp |= 0x8; break;
531 } 1001 }
532 dib7000p_write_word(state, 32, tmp); 1002 dib7000p_write_word(state, 32, tmp);
533 1003
534 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ 1004 /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */
535 tmp = (0 << 4); 1005 tmp = (0 << 4);
536 switch (ch->nfft) { 1006 switch (ch->u.ofdm.transmission_mode) {
537 case 0: tmp |= 0x6; break; 1007 case TRANSMISSION_MODE_2K: tmp |= 0x6; break;
538 case 1: tmp |= 0x8; break; 1008 case /* 4K MODE */ 255: tmp |= 0x7; break;
539 case 2: tmp |= 0x7; break; 1009 default:
1010 case TRANSMISSION_MODE_8K: tmp |= 0x8; break;
540 } 1011 }
541 dib7000p_write_word(state, 33, tmp); 1012 dib7000p_write_word(state, 33, tmp);
542 1013
@@ -552,131 +1023,21 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dibx000_ofdm_channel
552 1023
553 // we achieved a lock - it's time to update the osc freq 1024 // we achieved a lock - it's time to update the osc freq
554 if ((tmp >> 6) & 0x1) 1025 if ((tmp >> 6) & 0x1)
555 dib7000p_update_timf_freq(state); 1026 dib7000p_update_timf(state);
556 1027
1028 if (state->cfg.spur_protect)
1029 dib7000p_spur_protect(state, ch->frequency/1000, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
1030
1031 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth));
557 return 0; 1032 return 0;
558} 1033}
559 1034
560static int dib7000p_init(struct dvb_frontend *demod) 1035static int dib7000p_wakeup(struct dvb_frontend *demod)
561{ 1036{
562 struct dibx000_agc_config *agc;
563 struct dib7000p_state *state = demod->demodulator_priv; 1037 struct dib7000p_state *state = demod->demodulator_priv;
564 int ret = 0;
565
566 // Demodulator default configuration
567 agc = state->cfg.agc;
568
569 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL); 1038 dib7000p_set_power_mode(state, DIB7000P_POWER_ALL);
570 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON); 1039 dib7000p_set_adc_state(state, DIBX000_SLOW_ADC_ON);
571 1040 return 0;
572 /* AGC */
573 ret |= dib7000p_write_word(state, 75 , agc->setup );
574 ret |= dib7000p_write_word(state, 76 , agc->inv_gain );
575 ret |= dib7000p_write_word(state, 77 , agc->time_stabiliz );
576 ret |= dib7000p_write_word(state, 100, (agc->alpha_level << 12) | agc->thlock);
577
578 // Demod AGC loop configuration
579 ret |= dib7000p_write_word(state, 101, (agc->alpha_mant << 5) | agc->alpha_exp);
580 ret |= dib7000p_write_word(state, 102, (agc->beta_mant << 6) | agc->beta_exp);
581
582 /* AGC continued */
583 dprintk("-D- WBD: ref: %d, sel: %d, active: %d, alpha: %d\n",
584 state->wbd_ref != 0 ? state->wbd_ref : agc->wbd_ref, agc->wbd_sel, !agc->perform_agc_softsplit, agc->wbd_sel);
585
586 if (state->wbd_ref != 0)
587 ret |= dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | state->wbd_ref);
588 else
589 ret |= dib7000p_write_word(state, 105, (agc->wbd_inv << 12) | agc->wbd_ref);
590
591 ret |= dib7000p_write_word(state, 106, (agc->wbd_sel << 13) | (agc->wbd_alpha << 9) | (agc->perform_agc_softsplit << 8) );
592
593 ret |= dib7000p_write_word(state, 107, agc->agc1_max);
594 ret |= dib7000p_write_word(state, 108, agc->agc1_min);
595 ret |= dib7000p_write_word(state, 109, agc->agc2_max);
596 ret |= dib7000p_write_word(state, 110, agc->agc2_min);
597 ret |= dib7000p_write_word(state, 111, (agc->agc1_pt1 << 8) | agc->agc1_pt2 );
598 ret |= dib7000p_write_word(state, 112, agc->agc1_pt3);
599 ret |= dib7000p_write_word(state, 113, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
600 ret |= dib7000p_write_word(state, 114, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
601 ret |= dib7000p_write_word(state, 115, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
602
603 /* disable power smoothing */
604 ret |= dib7000p_write_word(state, 145, 0);
605 ret |= dib7000p_write_word(state, 146, 0);
606 ret |= dib7000p_write_word(state, 147, 0);
607 ret |= dib7000p_write_word(state, 148, 0);
608 ret |= dib7000p_write_word(state, 149, 0);
609 ret |= dib7000p_write_word(state, 150, 0);
610 ret |= dib7000p_write_word(state, 151, 0);
611 ret |= dib7000p_write_word(state, 152, 0);
612
613 // P_timf_alpha=6, P_corm_alpha=6, P_corm_thres=128 default: 6,4,26
614 ret |= dib7000p_write_word(state, 26 ,0x6680);
615
616 // P_palf_filter_on=1, P_palf_filter_freeze=0, P_palf_alpha_regul=16
617 ret |= dib7000p_write_word(state, 142,0x0410);
618 // P_fft_freq_dir=1, P_fft_nb_to_cut=0
619 ret |= dib7000p_write_word(state, 154,1 << 13);
620 // P_pha3_thres, default 0x3000
621 ret |= dib7000p_write_word(state, 168,0x0ccd);
622 // P_cti_use_cpe=0, P_cti_use_prog=0, P_cti_win_len=16, default: 0x0010
623 //ret |= dib7000p_write_word(state, 169,0x0010);
624 // P_cspu_regul=512, P_cspu_win_cut=15, default: 0x2005
625 ret |= dib7000p_write_word(state, 183,0x200f);
626 // P_adp_regul_cnt=573, default: 410
627 ret |= dib7000p_write_word(state, 187,0x023d);
628 // P_adp_noise_cnt=
629 ret |= dib7000p_write_word(state, 188,0x00a4);
630 // P_adp_regul_ext
631 ret |= dib7000p_write_word(state, 189,0x00a4);
632 // P_adp_noise_ext
633 ret |= dib7000p_write_word(state, 190,0x7ff0);
634 // P_adp_fil
635 ret |= dib7000p_write_word(state, 191,0x3ccc);
636
637 ret |= dib7000p_write_word(state, 222,0x0010);
638 // P_smo_mode, P_smo_rs_discard, P_smo_fifo_flush, P_smo_pid_parse, P_smo_error_discard
639 ret |= dib7000p_write_word(state, 235,0x0062);
640
641 // P_iqc_alpha_pha, P_iqc_alpha_amp_dcc_alpha, ...
642 if(state->cfg.tuner_is_baseband)
643 ret |= dib7000p_write_word(state, 36,0x0755);
644 else
645 ret |= dib7000p_write_word(state, 36,0x1f55);
646
647 // auto search configuration
648 ret |= dib7000p_write_word(state, 2 ,0x0004);
649 ret |= dib7000p_write_word(state, 3 ,0x1000);
650
651 /* Equal Lock */
652 ret |= dib7000p_write_word(state, 4 ,0x0814);
653
654 ret |= dib7000p_write_word(state, 6 ,0x001b);
655 ret |= dib7000p_write_word(state, 7 ,0x7740);
656 ret |= dib7000p_write_word(state, 8 ,0x005b);
657 ret |= dib7000p_write_word(state, 9 ,0x8d80);
658 ret |= dib7000p_write_word(state, 10 ,0x01c9);
659 ret |= dib7000p_write_word(state, 11 ,0xc380);
660 ret |= dib7000p_write_word(state, 12 ,0x0000);
661 ret |= dib7000p_write_word(state, 13 ,0x0080);
662 ret |= dib7000p_write_word(state, 14 ,0x0000);
663 ret |= dib7000p_write_word(state, 15 ,0x0090);
664 ret |= dib7000p_write_word(state, 16 ,0x0001);
665 ret |= dib7000p_write_word(state, 17 ,0xd4c0);
666
667 // P_clk_cfg1
668 ret |= dib7000p_write_word(state, 901, 0x0006);
669
670 // P_divclksel=3 P_divbitsel=1
671 ret |= dib7000p_write_word(state, 902, (3 << 10) | (1 << 6));
672
673 // Tuner IO bank: max drive (14mA) + divout pads max drive
674 ret |= dib7000p_write_word(state, 905, 0x2c8e);
675
676 ret |= dib7000p_set_bandwidth(&state->demod, BANDWIDTH_8_MHZ);
677 dib7000p_sad_calib(state);
678
679 return ret;
680} 1041}
681 1042
682static int dib7000p_sleep(struct dvb_frontend *demod) 1043static int dib7000p_sleep(struct dvb_frontend *demod)
@@ -688,16 +1049,16 @@ static int dib7000p_sleep(struct dvb_frontend *demod)
688static int dib7000p_identify(struct dib7000p_state *st) 1049static int dib7000p_identify(struct dib7000p_state *st)
689{ 1050{
690 u16 value; 1051 u16 value;
691 dprintk("-I- DiB7000PC: checking demod on I2C address: %d (%x)\n", 1052 dprintk( "checking demod on I2C address: %d (%x)",
692 st->i2c_addr, st->i2c_addr); 1053 st->i2c_addr, st->i2c_addr);
693 1054
694 if ((value = dib7000p_read_word(st, 768)) != 0x01b3) { 1055 if ((value = dib7000p_read_word(st, 768)) != 0x01b3) {
695 dprintk("-E- DiB7000PC: wrong Vendor ID (read=0x%x)\n",value); 1056 dprintk( "wrong Vendor ID (read=0x%x)",value);
696 return -EREMOTEIO; 1057 return -EREMOTEIO;
697 } 1058 }
698 1059
699 if ((value = dib7000p_read_word(st, 769)) != 0x4000) { 1060 if ((value = dib7000p_read_word(st, 769)) != 0x4000) {
700 dprintk("-E- DiB7000PC: wrong Device ID (%x)\n",value); 1061 dprintk( "wrong Device ID (%x)",value);
701 return -EREMOTEIO; 1062 return -EREMOTEIO;
702 } 1063 }
703 1064
@@ -767,41 +1128,48 @@ static int dib7000p_set_frontend(struct dvb_frontend* fe,
767 struct dvb_frontend_parameters *fep) 1128 struct dvb_frontend_parameters *fep)
768{ 1129{
769 struct dib7000p_state *state = fe->demodulator_priv; 1130 struct dib7000p_state *state = fe->demodulator_priv;
770 struct dibx000_ofdm_channel ch; 1131 int time;
771
772 INIT_OFDM_CHANNEL(&ch);
773 FEP2DIB(fep,&ch);
774 1132
775 state->current_bandwidth = fep->u.ofdm.bandwidth; 1133 state->current_bandwidth = fep->u.ofdm.bandwidth;
776 dib7000p_set_bandwidth(fe, fep->u.ofdm.bandwidth); 1134 dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth));
1135
1136 /* maybe the parameter has been changed */
1137 state->sfn_workaround_active = buggy_sfn_workaround;
777 1138
778 if (fe->ops.tuner_ops.set_params) 1139 if (fe->ops.tuner_ops.set_params)
779 fe->ops.tuner_ops.set_params(fe, fep); 1140 fe->ops.tuner_ops.set_params(fe, fep);
780 1141
1142 /* start up the AGC */
1143 state->agc_state = 0;
1144 do {
1145 time = dib7000p_agc_startup(fe, fep);
1146 if (time != -1)
1147 msleep(time);
1148 } while (time != -1);
1149
781 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || 1150 if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO ||
782 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || 1151 fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO ||
783 fep->u.ofdm.constellation == QAM_AUTO || 1152 fep->u.ofdm.constellation == QAM_AUTO ||
784 fep->u.ofdm.code_rate_HP == FEC_AUTO) { 1153 fep->u.ofdm.code_rate_HP == FEC_AUTO) {
785 int i = 800, found; 1154 int i = 800, found;
786 1155
787 dib7000p_autosearch_start(fe, &ch); 1156 dib7000p_autosearch_start(fe, fep);
788 do { 1157 do {
789 msleep(1); 1158 msleep(1);
790 found = dib7000p_autosearch_is_irq(fe); 1159 found = dib7000p_autosearch_is_irq(fe);
791 } while (found == 0 && i--); 1160 } while (found == 0 && i--);
792 1161
793 dprintk("autosearch returns: %d\n",found); 1162 dprintk("autosearch returns: %d",found);
794 if (found == 0 || found == 1) 1163 if (found == 0 || found == 1)
795 return 0; // no channel found 1164 return 0; // no channel found
796 1165
797 dib7000p_get_frontend(fe, fep); 1166 dib7000p_get_frontend(fe, fep);
798 FEP2DIB(fep, &ch);
799 } 1167 }
800 1168
801 /* make this a config parameter */ 1169 /* make this a config parameter */
802 dib7000p_set_output_mode(state, OUTMODE_MPEG2_FIFO); 1170 dib7000p_set_output_mode(state, OUTMODE_MPEG2_FIFO);
803 1171
804 return dib7000p_tune(fe, &ch); 1172 return dib7000p_tune(fe, fep);
805} 1173}
806 1174
807static int dib7000p_read_status(struct dvb_frontend *fe, fe_status_t *stat) 1175static int dib7000p_read_status(struct dvb_frontend *fe, fe_status_t *stat)
@@ -879,7 +1247,7 @@ int dib7000pc_detection(struct i2c_adapter *i2c_adap)
879 1247
880 if (i2c_transfer(i2c_adap, msg, 2) == 2) 1248 if (i2c_transfer(i2c_adap, msg, 2) == 2)
881 if (rx[0] == 0x01 && rx[1] == 0xb3) { 1249 if (rx[0] == 0x01 && rx[1] == 0xb3) {
882 dprintk("-D- DiB7000PC detected\n"); 1250 dprintk("-D- DiB7000PC detected");
883 return 1; 1251 return 1;
884 } 1252 }
885 1253
@@ -887,11 +1255,11 @@ int dib7000pc_detection(struct i2c_adapter *i2c_adap)
887 1255
888 if (i2c_transfer(i2c_adap, msg, 2) == 2) 1256 if (i2c_transfer(i2c_adap, msg, 2) == 2)
889 if (rx[0] == 0x01 && rx[1] == 0xb3) { 1257 if (rx[0] == 0x01 && rx[1] == 0xb3) {
890 dprintk("-D- DiB7000PC detected\n"); 1258 dprintk("-D- DiB7000PC detected");
891 return 1; 1259 return 1;
892 } 1260 }
893 1261
894 dprintk("-D- DiB7000PC not detected\n"); 1262 dprintk("-D- DiB7000PC not detected");
895 return 0; 1263 return 0;
896} 1264}
897EXPORT_SYMBOL(dib7000pc_detection); 1265EXPORT_SYMBOL(dib7000pc_detection);
@@ -929,7 +1297,7 @@ int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defau
929 /* set new i2c address and force divstart */ 1297 /* set new i2c address and force divstart */
930 dib7000p_write_word(&st, 1285, (new_addr << 2) | 0x2); 1298 dib7000p_write_word(&st, 1285, (new_addr << 2) | 0x2);
931 1299
932 dprintk("IC %d initialized (to i2c_address 0x%x)\n", k, new_addr); 1300 dprintk("IC %d initialized (to i2c_address 0x%x)", k, new_addr);
933 } 1301 }
934 1302
935 for (k = 0; k < no_of_demods; k++) { 1303 for (k = 0; k < no_of_demods; k++) {
@@ -1000,7 +1368,7 @@ static struct dvb_frontend_ops dib7000p_ops = {
1000 1368
1001 .release = dib7000p_release, 1369 .release = dib7000p_release,
1002 1370
1003 .init = dib7000p_init, 1371 .init = dib7000p_wakeup,
1004 .sleep = dib7000p_sleep, 1372 .sleep = dib7000p_sleep,
1005 1373
1006 .set_frontend = dib7000p_set_frontend, 1374 .set_frontend = dib7000p_set_frontend,
diff --git a/drivers/media/dvb/frontends/dib7000p.h b/drivers/media/dvb/frontends/dib7000p.h
index 79465cf1aced..eefcac8b5244 100644
--- a/drivers/media/dvb/frontends/dib7000p.h
+++ b/drivers/media/dvb/frontends/dib7000p.h
@@ -9,6 +9,7 @@ struct dib7000p_config {
9 u8 tuner_is_baseband; 9 u8 tuner_is_baseband;
10 int (*update_lna) (struct dvb_frontend *, u16 agc_global); 10 int (*update_lna) (struct dvb_frontend *, u16 agc_global);
11 11
12 u8 agc_config_count;
12 struct dibx000_agc_config *agc; 13 struct dibx000_agc_config *agc;
13 struct dibx000_bandwidth_config *bw; 14 struct dibx000_bandwidth_config *bw;
14 15
@@ -27,20 +28,19 @@ struct dib7000p_config {
27 28
28 u8 quartz_direct; 29 u8 quartz_direct;
29 30
31 u8 spur_protect;
32
30 int (*agc_control) (struct dvb_frontend *, u8 before); 33 int (*agc_control) (struct dvb_frontend *, u8 before);
31}; 34};
32 35
33#define DEFAULT_DIB7000P_I2C_ADDRESS 18 36#define DEFAULT_DIB7000P_I2C_ADDRESS 18
34 37
35extern struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg); 38extern struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg);
39extern int dib7000p_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib7000p_config cfg[]);
40
36extern struct i2c_adapter * dib7000p_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int); 41extern struct i2c_adapter * dib7000p_get_i2c_master(struct dvb_frontend *, enum dibx000_i2c_interface, int);
37extern int dib7000pc_detection(struct i2c_adapter *i2c_adap); 42extern int dib7000pc_detection(struct i2c_adapter *i2c_adap);
38 43extern int dib7000p_set_gpio(struct dvb_frontend *, u8 num, u8 dir, u8 val);
39/* TODO 44extern int dib7000p_set_wbd_ref(struct dvb_frontend *, u16 value);
40extern INT dib7000p_set_gpio(struct dibDemod *demod, UCHAR num, UCHAR dir, UCHAR val);
41extern INT dib7000p_enable_vbg_voltage(struct dibDemod *demod);
42extern void dib7000p_set_hostbus_diversity(struct dibDemod *demod, UCHAR onoff);
43extern USHORT dib7000p_get_current_agc_global(struct dibDemod *demod);
44*/
45 45
46#endif 46#endif
diff --git a/drivers/media/dvb/frontends/dibx000_common.h b/drivers/media/dvb/frontends/dibx000_common.h
index a1df604366c3..5e17275afd25 100644
--- a/drivers/media/dvb/frontends/dibx000_common.h
+++ b/drivers/media/dvb/frontends/dibx000_common.h
@@ -111,6 +111,8 @@ struct dibx000_bandwidth_config {
111 111
112 u32 ifreq; 112 u32 ifreq;
113 u32 timf; 113 u32 timf;
114
115 u32 xtal_hz;
114}; 116};
115 117
116enum dibx000_adc_states { 118enum dibx000_adc_states {
@@ -122,56 +124,17 @@ enum dibx000_adc_states {
122 DIBX000_VBG_DISABLE, 124 DIBX000_VBG_DISABLE,
123}; 125};
124 126
125#define BW_INDEX_TO_KHZ(v) ( (v) == BANDWIDTH_8_MHZ ? 8000 : \ 127#define BANDWIDTH_TO_KHZ(v) ( (v) == BANDWIDTH_8_MHZ ? 8000 : \
126 (v) == BANDWIDTH_7_MHZ ? 7000 : \ 128 (v) == BANDWIDTH_7_MHZ ? 7000 : \
127 (v) == BANDWIDTH_6_MHZ ? 6000 : 8000 ) 129 (v) == BANDWIDTH_6_MHZ ? 6000 : 8000 )
128 130
129/* Chip output mode. */ 131/* Chip output mode. */
130#define OUTMODE_HIGH_Z 0 132#define OUTMODE_HIGH_Z 0
131#define OUTMODE_MPEG2_PAR_GATED_CLK 1 133#define OUTMODE_MPEG2_PAR_GATED_CLK 1
132#define OUTMODE_MPEG2_PAR_CONT_CLK 2 134#define OUTMODE_MPEG2_PAR_CONT_CLK 2
133#define OUTMODE_MPEG2_SERIAL 7 135#define OUTMODE_MPEG2_SERIAL 7
134#define OUTMODE_DIVERSITY 4 136#define OUTMODE_DIVERSITY 4
135#define OUTMODE_MPEG2_FIFO 5 137#define OUTMODE_MPEG2_FIFO 5
136 138#define OUTMODE_ANALOG_ADC 6
137/* I hope I can get rid of the following kludge in the near future */
138struct dibx000_ofdm_channel {
139 u32 RF_kHz;
140 u8 Bw;
141 s16 nfft;
142 s16 guard;
143 s16 nqam;
144 s16 vit_hrch;
145 s16 vit_select_hp;
146 s16 vit_alpha;
147 s16 vit_code_rate_hp;
148 s16 vit_code_rate_lp;
149 u8 intlv_native;
150};
151
152#define FEP2DIB(fep,ch) \
153 (ch)->RF_kHz = (fep)->frequency / 1000; \
154 (ch)->Bw = (fep)->u.ofdm.bandwidth; \
155 (ch)->nfft = (fep)->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO ? -1 : (fep)->u.ofdm.transmission_mode; \
156 (ch)->guard = (fep)->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO ? -1 : (fep)->u.ofdm.guard_interval; \
157 (ch)->nqam = (fep)->u.ofdm.constellation == QAM_AUTO ? -1 : (fep)->u.ofdm.constellation == QAM_64 ? 2 : (fep)->u.ofdm.constellation; \
158 (ch)->vit_hrch = 0; /* linux-dvb is not prepared for HIERARCHICAL TRANSMISSION */ \
159 (ch)->vit_select_hp = 1; \
160 (ch)->vit_alpha = 1; \
161 (ch)->vit_code_rate_hp = (fep)->u.ofdm.code_rate_HP == FEC_AUTO ? -1 : (fep)->u.ofdm.code_rate_HP; \
162 (ch)->vit_code_rate_lp = (fep)->u.ofdm.code_rate_LP == FEC_AUTO ? -1 : (fep)->u.ofdm.code_rate_LP; \
163 (ch)->intlv_native = 1;
164
165#define INIT_OFDM_CHANNEL(ch) do {\
166 (ch)->Bw = 0; \
167 (ch)->nfft = -1; \
168 (ch)->guard = -1; \
169 (ch)->nqam = -1; \
170 (ch)->vit_hrch = -1; \
171 (ch)->vit_select_hp = -1; \
172 (ch)->vit_alpha = -1; \
173 (ch)->vit_code_rate_hp = -1; \
174 (ch)->vit_code_rate_lp = -1; \
175} while (0)
176 139
177#endif 140#endif
diff --git a/drivers/media/dvb/frontends/dvb-pll.c b/drivers/media/dvb/frontends/dvb-pll.c
index 11f7d5939bd9..8c8d7342d0b3 100644
--- a/drivers/media/dvb/frontends/dvb-pll.c
+++ b/drivers/media/dvb/frontends/dvb-pll.c
@@ -24,12 +24,48 @@
24 24
25#include "dvb-pll.h" 25#include "dvb-pll.h"
26 26
27struct dvb_pll_priv {
28 /* pll number */
29 int nr;
30
31 /* i2c details */
32 int pll_i2c_address;
33 struct i2c_adapter *i2c;
34
35 /* the PLL descriptor */
36 struct dvb_pll_desc *pll_desc;
37
38 /* cached frequency/bandwidth */
39 u32 frequency;
40 u32 bandwidth;
41};
42
43#define DVB_PLL_MAX 64
44
45static unsigned int dvb_pll_devcount;
46
47static int debug = 0;
48module_param(debug, int, 0644);
49MODULE_PARM_DESC(debug, "enable verbose debug messages");
50
51static unsigned int input[DVB_PLL_MAX] = { [ 0 ... (DVB_PLL_MAX-1) ] = 0 };
52module_param_array(input, int, NULL, 0644);
53MODULE_PARM_DESC(input,"specify rf input choice, 0 for autoselect (default)");
54
55static unsigned int id[DVB_PLL_MAX] =
56 { [ 0 ... (DVB_PLL_MAX-1) ] = DVB_PLL_UNDEFINED };
57module_param_array(id, int, NULL, 0644);
58MODULE_PARM_DESC(id, "force pll id to use (DEBUG ONLY)");
59
60/* ----------------------------------------------------------- */
61
27struct dvb_pll_desc { 62struct dvb_pll_desc {
28 char *name; 63 char *name;
29 u32 min; 64 u32 min;
30 u32 max; 65 u32 max;
31 u32 iffreq; 66 u32 iffreq;
32 void (*set)(u8 *buf, const struct dvb_frontend_parameters *params); 67 void (*set)(struct dvb_frontend *fe, u8 *buf,
68 const struct dvb_frontend_parameters *params);
33 u8 *initdata; 69 u8 *initdata;
34 u8 *sleepdata; 70 u8 *sleepdata;
35 int count; 71 int count;
@@ -89,7 +125,7 @@ static struct dvb_pll_desc dvb_pll_thomson_dtt7610 = {
89 }, 125 },
90}; 126};
91 127
92static void thomson_dtt759x_bw(u8 *buf, 128static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf,
93 const struct dvb_frontend_parameters *params) 129 const struct dvb_frontend_parameters *params)
94{ 130{
95 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth) 131 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth)
@@ -210,7 +246,8 @@ static struct dvb_pll_desc dvb_pll_env57h1xd5 = {
210/* Philips TDA6650/TDA6651 246/* Philips TDA6650/TDA6651
211 * used in Panasonic ENV77H11D5 247 * used in Panasonic ENV77H11D5
212 */ 248 */
213static void tda665x_bw(u8 *buf, const struct dvb_frontend_parameters *params) 249static void tda665x_bw(struct dvb_frontend *fe, u8 *buf,
250 const struct dvb_frontend_parameters *params)
214{ 251{
215 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 252 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
216 buf[3] |= 0x08; 253 buf[3] |= 0x08;
@@ -243,7 +280,8 @@ static struct dvb_pll_desc dvb_pll_tda665x = {
243/* Infineon TUA6034 280/* Infineon TUA6034
244 * used in LG TDTP E102P 281 * used in LG TDTP E102P
245 */ 282 */
246static void tua6034_bw(u8 *buf, const struct dvb_frontend_parameters *params) 283static void tua6034_bw(struct dvb_frontend *fe, u8 *buf,
284 const struct dvb_frontend_parameters *params)
247{ 285{
248 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth) 286 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth)
249 buf[3] |= 0x08; 287 buf[3] |= 0x08;
@@ -283,7 +321,8 @@ static struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = {
283/* Philips FMD1216ME 321/* Philips FMD1216ME
284 * used in Medion Hybrid PCMCIA card and USB Box 322 * used in Medion Hybrid PCMCIA card and USB Box
285 */ 323 */
286static void fmd1216me_bw(u8 *buf, const struct dvb_frontend_parameters *params) 324static void fmd1216me_bw(struct dvb_frontend *fe, u8 *buf,
325 const struct dvb_frontend_parameters *params)
287{ 326{
288 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ && 327 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ &&
289 params->frequency >= 158870000) 328 params->frequency >= 158870000)
@@ -313,7 +352,8 @@ static struct dvb_pll_desc dvb_pll_fmd1216me = {
313/* ALPS TDED4 352/* ALPS TDED4
314 * used in Nebula-Cards and USB boxes 353 * used in Nebula-Cards and USB boxes
315 */ 354 */
316static void tded4_bw(u8 *buf, const struct dvb_frontend_parameters *params) 355static void tded4_bw(struct dvb_frontend *fe, u8 *buf,
356 const struct dvb_frontend_parameters *params)
317{ 357{
318 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 358 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
319 buf[3] |= 0x04; 359 buf[3] |= 0x04;
@@ -354,16 +394,35 @@ static struct dvb_pll_desc dvb_pll_tdhu2 = {
354/* Philips TUV1236D 394/* Philips TUV1236D
355 * used in ATI HDTV Wonder 395 * used in ATI HDTV Wonder
356 */ 396 */
357static void tuv1236d_rf(u8 *buf, const struct dvb_frontend_parameters *params) 397static void tuv1236d_rf(struct dvb_frontend *fe, u8 *buf,
398 const struct dvb_frontend_parameters *params)
358{ 399{
359 switch (params->u.vsb.modulation) { 400 struct dvb_pll_priv *priv = fe->tuner_priv;
360 case QAM_64: 401 unsigned int new_rf = input[priv->nr];
361 case QAM_256: 402
403 if ((new_rf == 0) || (new_rf > 2)) {
404 switch (params->u.vsb.modulation) {
405 case QAM_64:
406 case QAM_256:
407 new_rf = 1;
408 break;
409 case VSB_8:
410 default:
411 new_rf = 2;
412 }
413 }
414
415 switch (new_rf) {
416 case 1:
362 buf[3] |= 0x08; 417 buf[3] |= 0x08;
363 break; 418 break;
364 case VSB_8: 419 case 2:
365 default:
366 buf[3] &= ~0x08; 420 buf[3] &= ~0x08;
421 break;
422 default:
423 printk(KERN_WARNING
424 "%s: unhandled rf input selection: %d",
425 __FUNCTION__, new_rf);
367 } 426 }
368} 427}
369 428
@@ -420,7 +479,8 @@ static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
420/* 479/*
421 * Philips TD1316 Tuner. 480 * Philips TD1316 Tuner.
422 */ 481 */
423static void td1316_bw(u8 *buf, const struct dvb_frontend_parameters *params) 482static void td1316_bw(struct dvb_frontend *fe, u8 *buf,
483 const struct dvb_frontend_parameters *params)
424{ 484{
425 u8 band; 485 u8 band;
426 486
@@ -474,7 +534,8 @@ static struct dvb_pll_desc dvb_pll_thomson_fe6600 = {
474 } 534 }
475}; 535};
476 536
477static void opera1_bw(u8 *buf, const struct dvb_frontend_parameters *params) 537static void opera1_bw(struct dvb_frontend *fe, u8 *buf,
538 const struct dvb_frontend_parameters *params)
478{ 539{
479 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 540 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
480 buf[2] |= 0x08; 541 buf[2] |= 0x08;
@@ -546,30 +607,13 @@ static struct dvb_pll_desc *pll_list[] = {
546}; 607};
547 608
548/* ----------------------------------------------------------- */ 609/* ----------------------------------------------------------- */
549
550struct dvb_pll_priv {
551 /* i2c details */
552 int pll_i2c_address;
553 struct i2c_adapter *i2c;
554
555 /* the PLL descriptor */
556 struct dvb_pll_desc *pll_desc;
557
558 /* cached frequency/bandwidth */
559 u32 frequency;
560 u32 bandwidth;
561};
562
563/* ----------------------------------------------------------- */
564/* code */ 610/* code */
565 611
566static int debug = 0; 612static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
567module_param(debug, int, 0644);
568MODULE_PARM_DESC(debug, "enable verbose debug messages");
569
570static int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
571 const struct dvb_frontend_parameters *params) 613 const struct dvb_frontend_parameters *params)
572{ 614{
615 struct dvb_pll_priv *priv = fe->tuner_priv;
616 struct dvb_pll_desc *desc = priv->pll_desc;
573 u32 div; 617 u32 div;
574 int i; 618 int i;
575 619
@@ -597,7 +641,7 @@ static int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
597 buf[3] = desc->entries[i].cb; 641 buf[3] = desc->entries[i].cb;
598 642
599 if (desc->set) 643 if (desc->set)
600 desc->set(buf, params); 644 desc->set(fe, buf, params);
601 645
602 if (debug) 646 if (debug)
603 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", 647 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
@@ -654,7 +698,7 @@ static int dvb_pll_set_params(struct dvb_frontend *fe,
654 if (priv->i2c == NULL) 698 if (priv->i2c == NULL)
655 return -EINVAL; 699 return -EINVAL;
656 700
657 if ((result = dvb_pll_configure(priv->pll_desc, buf, params)) < 0) 701 if ((result = dvb_pll_configure(fe, buf, params)) < 0)
658 return result; 702 return result;
659 else 703 else
660 frequency = result; 704 frequency = result;
@@ -682,7 +726,7 @@ static int dvb_pll_calc_regs(struct dvb_frontend *fe,
682 if (buf_len < 5) 726 if (buf_len < 5)
683 return -EINVAL; 727 return -EINVAL;
684 728
685 if ((result = dvb_pll_configure(priv->pll_desc, buf+1, params)) < 0) 729 if ((result = dvb_pll_configure(fe, buf+1, params)) < 0)
686 return result; 730 return result;
687 else 731 else
688 frequency = result; 732 frequency = result;
@@ -755,6 +799,10 @@ struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
755 int ret; 799 int ret;
756 struct dvb_pll_desc *desc; 800 struct dvb_pll_desc *desc;
757 801
802 if ((id[dvb_pll_devcount] > DVB_PLL_UNDEFINED) &&
803 (id[dvb_pll_devcount] < ARRAY_SIZE(pll_list)))
804 pll_desc_id = id[dvb_pll_devcount];
805
758 BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list)); 806 BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list));
759 807
760 desc = pll_list[pll_desc_id]; 808 desc = pll_list[pll_desc_id];
@@ -777,6 +825,7 @@ struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
777 priv->pll_i2c_address = pll_addr; 825 priv->pll_i2c_address = pll_addr;
778 priv->i2c = i2c; 826 priv->i2c = i2c;
779 priv->pll_desc = desc; 827 priv->pll_desc = desc;
828 priv->nr = dvb_pll_devcount++;
780 829
781 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops, 830 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
782 sizeof(struct dvb_tuner_ops)); 831 sizeof(struct dvb_tuner_ops));
@@ -791,6 +840,30 @@ struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
791 fe->ops.tuner_ops.sleep = NULL; 840 fe->ops.tuner_ops.sleep = NULL;
792 841
793 fe->tuner_priv = priv; 842 fe->tuner_priv = priv;
843
844 if ((debug) || (id[priv->nr] == pll_desc_id)) {
845 printk("dvb-pll[%d]", priv->nr);
846 if (i2c != NULL)
847 printk(" %d-%04x", i2c_adapter_id(i2c), pll_addr);
848 printk(": id# %d (%s) attached, %s\n", pll_desc_id, desc->name,
849 id[priv->nr] == pll_desc_id ?
850 "insmod option" : "autodetected");
851 }
852 if ((debug) || (input[priv->nr] > 0)) {
853 printk("dvb-pll[%d]", priv->nr);
854 if (i2c != NULL)
855 printk(" %d-%04x", i2c_adapter_id(i2c), pll_addr);
856 printk(": tuner rf input will be ");
857 switch (input[priv->nr]) {
858 case 0:
859 printk("autoselected\n");
860 break;
861 default:
862 printk("set to input %d (insmod option)\n",
863 input[priv->nr]);
864 }
865 }
866
794 return fe; 867 return fe;
795} 868}
796EXPORT_SYMBOL(dvb_pll_attach); 869EXPORT_SYMBOL(dvb_pll_attach);
diff --git a/drivers/media/dvb/frontends/dvb_dummy_fe.c b/drivers/media/dvb/frontends/dvb_dummy_fe.c
index 6271b1e7f6ab..fed09dfb2b7c 100644
--- a/drivers/media/dvb/frontends/dvb_dummy_fe.c
+++ b/drivers/media/dvb/frontends/dvb_dummy_fe.c
@@ -20,7 +20,6 @@
20 */ 20 */
21 21
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h> 23#include <linux/init.h>
25#include <linux/string.h> 24#include <linux/string.h>
26#include <linux/slab.h> 25#include <linux/slab.h>
diff --git a/drivers/media/dvb/frontends/isl6421.c b/drivers/media/dvb/frontends/isl6421.c
index c967148a5945..684c8ec166cb 100644
--- a/drivers/media/dvb/frontends/isl6421.c
+++ b/drivers/media/dvb/frontends/isl6421.c
@@ -29,7 +29,6 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/string.h> 32#include <linux/string.h>
34#include <linux/slab.h> 33#include <linux/slab.h>
35 34
diff --git a/drivers/media/dvb/frontends/l64781.c b/drivers/media/dvb/frontends/l64781.c
index 1aeacb1c4af7..443d9045d4c9 100644
--- a/drivers/media/dvb/frontends/l64781.c
+++ b/drivers/media/dvb/frontends/l64781.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/string.h> 26#include <linux/string.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include "dvb_frontend.h" 28#include "dvb_frontend.h"
diff --git a/drivers/media/dvb/frontends/lgdt330x.c b/drivers/media/dvb/frontends/lgdt330x.c
index e25286e2d431..bdc9fa88b86a 100644
--- a/drivers/media/dvb/frontends/lgdt330x.c
+++ b/drivers/media/dvb/frontends/lgdt330x.c
@@ -35,7 +35,6 @@
35 35
36#include <linux/kernel.h> 36#include <linux/kernel.h>
37#include <linux/module.h> 37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/init.h> 38#include <linux/init.h>
40#include <linux/delay.h> 39#include <linux/delay.h>
41#include <linux/string.h> 40#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/lnbp21.c b/drivers/media/dvb/frontends/lnbp21.c
index 2d2f58c26226..76f935d9755a 100644
--- a/drivers/media/dvb/frontends/lnbp21.c
+++ b/drivers/media/dvb/frontends/lnbp21.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/string.h> 31#include <linux/string.h>
33#include <linux/slab.h> 32#include <linux/slab.h>
34 33
diff --git a/drivers/media/dvb/frontends/mt2060.c b/drivers/media/dvb/frontends/mt2060.c
index 450fad8d9b65..1305b0e63ce5 100644
--- a/drivers/media/dvb/frontends/mt2060.c
+++ b/drivers/media/dvb/frontends/mt2060.c
@@ -22,7 +22,6 @@
22/* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */ 22/* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
23 23
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
27#include <linux/dvb/frontend.h> 26#include <linux/dvb/frontend.h>
28#include <linux/i2c.h> 27#include <linux/i2c.h>
diff --git a/drivers/media/dvb/frontends/mt2131.c b/drivers/media/dvb/frontends/mt2131.c
new file mode 100644
index 000000000000..4b93931de4e1
--- /dev/null
+++ b/drivers/media/dvb/frontends/mt2131.c
@@ -0,0 +1,314 @@
1/*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/dvb/frontend.h>
25#include <linux/i2c.h>
26
27#include "dvb_frontend.h"
28
29#include "mt2131.h"
30#include "mt2131_priv.h"
31
32static int debug;
33module_param(debug, int, 0644);
34MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
35
36#define dprintk(level,fmt, arg...) if (debug >= level) \
37 printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
38
39static u8 mt2131_config1[] = {
40 0x01,
41 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
42 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
43 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
44 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
45};
46
47static u8 mt2131_config2[] = {
48 0x10,
49 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
50};
51
52static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
53{
54 struct i2c_msg msg[2] = {
55 { .addr = priv->cfg->i2c_address, .flags = 0,
56 .buf = &reg, .len = 1 },
57 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
58 .buf = val, .len = 1 },
59 };
60
61 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
62 printk(KERN_WARNING "mt2131 I2C read failed\n");
63 return -EREMOTEIO;
64 }
65 return 0;
66}
67
68static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
69{
70 u8 buf[2] = { reg, val };
71 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
72 .buf = buf, .len = 2 };
73
74 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
75 printk(KERN_WARNING "mt2131 I2C write failed\n");
76 return -EREMOTEIO;
77 }
78 return 0;
79}
80
81static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
82{
83 struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
84 .flags = 0, .buf = buf, .len = len };
85
86 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
87 printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
88 (int)len);
89 return -EREMOTEIO;
90 }
91 return 0;
92}
93
94static int mt2131_set_params(struct dvb_frontend *fe,
95 struct dvb_frontend_parameters *params)
96{
97 struct mt2131_priv *priv;
98 int ret=0, i;
99 u32 freq;
100 u8 if_band_center;
101 u32 f_lo1, f_lo2;
102 u32 div1, num1, div2, num2;
103 u8 b[8];
104 u8 lockval = 0;
105
106 priv = fe->tuner_priv;
107 if (fe->ops.info.type == FE_OFDM)
108 priv->bandwidth = params->u.ofdm.bandwidth;
109 else
110 priv->bandwidth = 0;
111
112 freq = params->frequency / 1000; // Hz -> kHz
113 dprintk(1, "%s() freq=%d\n", __FUNCTION__, freq);
114
115 f_lo1 = freq + MT2131_IF1 * 1000;
116 f_lo1 = (f_lo1 / 250) * 250;
117 f_lo2 = f_lo1 - freq - MT2131_IF2;
118
119 priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000,
120
121 /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
122 num1 = f_lo1 * 64 / (MT2131_FREF / 128);
123 div1 = num1 / 8192;
124 num1 &= 0x1fff;
125
126 /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
127 num2 = f_lo2 * 64 / (MT2131_FREF / 128);
128 div2 = num2 / 8192;
129 num2 &= 0x1fff;
130
131 if (freq <= 82500) if_band_center = 0x00; else
132 if (freq <= 137500) if_band_center = 0x01; else
133 if (freq <= 192500) if_band_center = 0x02; else
134 if (freq <= 247500) if_band_center = 0x03; else
135 if (freq <= 302500) if_band_center = 0x04; else
136 if (freq <= 357500) if_band_center = 0x05; else
137 if (freq <= 412500) if_band_center = 0x06; else
138 if (freq <= 467500) if_band_center = 0x07; else
139 if (freq <= 522500) if_band_center = 0x08; else
140 if (freq <= 577500) if_band_center = 0x09; else
141 if (freq <= 632500) if_band_center = 0x0A; else
142 if (freq <= 687500) if_band_center = 0x0B; else
143 if (freq <= 742500) if_band_center = 0x0C; else
144 if (freq <= 797500) if_band_center = 0x0D; else
145 if (freq <= 852500) if_band_center = 0x0E; else
146 if (freq <= 907500) if_band_center = 0x0F; else
147 if (freq <= 962500) if_band_center = 0x10; else
148 if (freq <= 1017500) if_band_center = 0x11; else
149 if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
150
151 b[0] = 1;
152 b[1] = (num1 >> 5) & 0xFF;
153 b[2] = (num1 & 0x1F);
154 b[3] = div1;
155 b[4] = (num2 >> 5) & 0xFF;
156 b[5] = num2 & 0x1F;
157 b[6] = div2;
158
159 dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
160 dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
161 dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
162 dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
163 (int)div1, (int)num1, (int)div2, (int)num2);
164 dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
165 (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
166 (int)b[6]);
167
168 ret = mt2131_writeregs(priv,b,7);
169 if (ret < 0)
170 return ret;
171
172 mt2131_writereg(priv, 0x0b, if_band_center);
173
174 /* Wait for lock */
175 i = 0;
176 do {
177 mt2131_readreg(priv, 0x08, &lockval);
178 if ((lockval & 0x88) == 0x88)
179 break;
180 msleep(4);
181 i++;
182 } while (i < 10);
183
184 return ret;
185}
186
187static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
188{
189 struct mt2131_priv *priv = fe->tuner_priv;
190 dprintk(1, "%s()\n", __FUNCTION__);
191 *frequency = priv->frequency;
192 return 0;
193}
194
195static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
196{
197 struct mt2131_priv *priv = fe->tuner_priv;
198 dprintk(1, "%s()\n", __FUNCTION__);
199 *bandwidth = priv->bandwidth;
200 return 0;
201}
202
203static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
204{
205 struct mt2131_priv *priv = fe->tuner_priv;
206 u8 lock_status = 0;
207 u8 afc_status = 0;
208
209 *status = 0;
210
211 mt2131_readreg(priv, 0x08, &lock_status);
212 if ((lock_status & 0x88) == 0x88)
213 *status = TUNER_STATUS_LOCKED;
214
215 mt2131_readreg(priv, 0x09, &afc_status);
216 dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
217 __FUNCTION__, lock_status, afc_status);
218
219 return 0;
220}
221
222static int mt2131_init(struct dvb_frontend *fe)
223{
224 struct mt2131_priv *priv = fe->tuner_priv;
225 int ret;
226 dprintk(1, "%s()\n", __FUNCTION__);
227
228 if ((ret = mt2131_writeregs(priv, mt2131_config1,
229 sizeof(mt2131_config1))) < 0)
230 return ret;
231
232 mt2131_writereg(priv, 0x0b, 0x09);
233 mt2131_writereg(priv, 0x15, 0x47);
234 mt2131_writereg(priv, 0x07, 0xf2);
235 mt2131_writereg(priv, 0x0b, 0x01);
236
237 if ((ret = mt2131_writeregs(priv, mt2131_config2,
238 sizeof(mt2131_config2))) < 0)
239 return ret;
240
241 return ret;
242}
243
244static int mt2131_release(struct dvb_frontend *fe)
245{
246 dprintk(1, "%s()\n", __FUNCTION__);
247 kfree(fe->tuner_priv);
248 fe->tuner_priv = NULL;
249 return 0;
250}
251
252static const struct dvb_tuner_ops mt2131_tuner_ops = {
253 .info = {
254 .name = "Microtune MT2131",
255 .frequency_min = 48000000,
256 .frequency_max = 860000000,
257 .frequency_step = 50000,
258 },
259
260 .release = mt2131_release,
261 .init = mt2131_init,
262
263 .set_params = mt2131_set_params,
264 .get_frequency = mt2131_get_frequency,
265 .get_bandwidth = mt2131_get_bandwidth,
266 .get_status = mt2131_get_status
267};
268
269struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
270 struct i2c_adapter *i2c,
271 struct mt2131_config *cfg, u16 if1)
272{
273 struct mt2131_priv *priv = NULL;
274 u8 id = 0;
275
276 dprintk(1, "%s()\n", __FUNCTION__);
277
278 priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
279 if (priv == NULL)
280 return NULL;
281
282 priv->cfg = cfg;
283 priv->bandwidth = 6000000; /* 6MHz */
284 priv->i2c = i2c;
285
286 if (mt2131_readreg(priv, 0, &id) != 0) {
287 kfree(priv);
288 return NULL;
289 }
290 if ( (id != 0x3E) && (id != 0x3F) ) {
291 printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
292 cfg->i2c_address);
293 kfree(priv);
294 return NULL;
295 }
296
297 printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
298 cfg->i2c_address);
299 memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
300 sizeof(struct dvb_tuner_ops));
301
302 fe->tuner_priv = priv;
303 return fe;
304}
305EXPORT_SYMBOL(mt2131_attach);
306
307MODULE_AUTHOR("Steven Toth");
308MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
309MODULE_LICENSE("GPL");
310
311/*
312 * Local variables:
313 * c-basic-offset: 8
314 */
diff --git a/drivers/media/dvb/frontends/mt2131.h b/drivers/media/dvb/frontends/mt2131.h
new file mode 100644
index 000000000000..1e4ffe7dc8c8
--- /dev/null
+++ b/drivers/media/dvb/frontends/mt2131.h
@@ -0,0 +1,54 @@
1/*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef __MT2131_H__
23#define __MT2131_H__
24
25struct dvb_frontend;
26struct i2c_adapter;
27
28struct mt2131_config {
29 u8 i2c_address;
30 u8 clock_out; /* 0 = off, 1 = CLK/4, 2 = CLK/2, 3 = CLK/1 */
31};
32
33#if defined(CONFIG_DVB_TUNER_MT2131) || (defined(CONFIG_DVB_TUNER_MT2131_MODULE) && defined(MODULE))
34extern struct dvb_frontend* mt2131_attach(struct dvb_frontend *fe,
35 struct i2c_adapter *i2c,
36 struct mt2131_config *cfg,
37 u16 if1);
38#else
39static inline struct dvb_frontend* mt2131_attach(struct dvb_frontend *fe,
40 struct i2c_adapter *i2c,
41 struct mt2131_config *cfg,
42 u16 if1)
43{
44 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
45 return NULL;
46}
47#endif /* CONFIG_DVB_TUNER_MT2131 */
48
49#endif /* __MT2131_H__ */
50
51/*
52 * Local variables:
53 * c-basic-offset: 8
54 */
diff --git a/drivers/media/dvb/frontends/mt2131_priv.h b/drivers/media/dvb/frontends/mt2131_priv.h
new file mode 100644
index 000000000000..e930759c2c00
--- /dev/null
+++ b/drivers/media/dvb/frontends/mt2131_priv.h
@@ -0,0 +1,49 @@
1/*
2 * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef __MT2131_PRIV_H__
23#define __MT2131_PRIV_H__
24
25/* Regs */
26#define MT2131_PWR 0x07
27#define MT2131_UPC_1 0x0b
28#define MT2131_AGC_RL 0x10
29#define MT2131_MISC_2 0x15
30
31/* frequency values in KHz */
32#define MT2131_IF1 1220
33#define MT2131_IF2 44000
34#define MT2131_FREF 16000
35
36struct mt2131_priv {
37 struct mt2131_config *cfg;
38 struct i2c_adapter *i2c;
39
40 u32 frequency;
41 u32 bandwidth;
42};
43
44#endif /* __MT2131_PRIV_H__ */
45
46/*
47 * Local variables:
48 * c-basic-offset: 8
49 */
diff --git a/drivers/media/dvb/frontends/mt2266.c b/drivers/media/dvb/frontends/mt2266.c
new file mode 100644
index 000000000000..03fe8265745f
--- /dev/null
+++ b/drivers/media/dvb/frontends/mt2266.c
@@ -0,0 +1,287 @@
1/*
2 * Driver for Microtune MT2266 "Direct conversion low power broadband tuner"
3 *
4 * Copyright (c) 2007 Olivier DANET <odanet@caramail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/module.h>
18#include <linux/delay.h>
19#include <linux/dvb/frontend.h>
20#include <linux/i2c.h>
21
22#include "dvb_frontend.h"
23#include "mt2266.h"
24
25#define I2C_ADDRESS 0x60
26
27#define REG_PART_REV 0
28#define REG_TUNE 1
29#define REG_BAND 6
30#define REG_BANDWIDTH 8
31#define REG_LOCK 0x12
32
33#define PART_REV 0x85
34
35struct mt2266_priv {
36 struct mt2266_config *cfg;
37 struct i2c_adapter *i2c;
38
39 u32 frequency;
40 u32 bandwidth;
41};
42
43/* Here, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
44
45static int debug;
46module_param(debug, int, 0644);
47MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
48
49#define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2266: " args); printk("\n"); }} while (0)
50
51// Reads a single register
52static int mt2266_readreg(struct mt2266_priv *priv, u8 reg, u8 *val)
53{
54 struct i2c_msg msg[2] = {
55 { .addr = priv->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 },
56 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 },
57 };
58 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
59 printk(KERN_WARNING "MT2266 I2C read failed\n");
60 return -EREMOTEIO;
61 }
62 return 0;
63}
64
65// Writes a single register
66static int mt2266_writereg(struct mt2266_priv *priv, u8 reg, u8 val)
67{
68 u8 buf[2] = { reg, val };
69 struct i2c_msg msg = {
70 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
71 };
72 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
73 printk(KERN_WARNING "MT2266 I2C write failed\n");
74 return -EREMOTEIO;
75 }
76 return 0;
77}
78
79// Writes a set of consecutive registers
80static int mt2266_writeregs(struct mt2266_priv *priv,u8 *buf, u8 len)
81{
82 struct i2c_msg msg = {
83 .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len
84 };
85 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
86 printk(KERN_WARNING "MT2266 I2C write failed (len=%i)\n",(int)len);
87 return -EREMOTEIO;
88 }
89 return 0;
90}
91
92// Initialisation sequences
93static u8 mt2266_init1[] = {
94 REG_TUNE,
95 0x00, 0x00, 0x28, 0x00, 0x52, 0x99, 0x3f };
96
97static u8 mt2266_init2[] = {
98 0x17, 0x6d, 0x71, 0x61, 0xc0, 0xbf, 0xff, 0xdc, 0x00, 0x0a,
99 0xd4, 0x03, 0x64, 0x64, 0x64, 0x64, 0x22, 0xaa, 0xf2, 0x1e, 0x80, 0x14, 0x01, 0x01, 0x01, 0x01,
100 0x01, 0x01, 0x7f, 0x5e, 0x3f, 0xff, 0xff, 0xff, 0x00, 0x77, 0x0f, 0x2d };
101
102static u8 mt2266_init_8mhz[] = {
103 REG_BANDWIDTH,
104 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22 };
105
106static u8 mt2266_init_7mhz[] = {
107 REG_BANDWIDTH,
108 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32 };
109
110static u8 mt2266_init_6mhz[] = {
111 REG_BANDWIDTH,
112 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7 };
113
114#define FREF 30000 // Quartz oscillator 30 MHz
115
116static int mt2266_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
117{
118 struct mt2266_priv *priv;
119 int ret=0;
120 u32 freq;
121 u32 tune;
122 u8 lnaband;
123 u8 b[10];
124 int i;
125
126 priv = fe->tuner_priv;
127
128 mt2266_writereg(priv,0x17,0x6d);
129 mt2266_writereg(priv,0x1c,0xff);
130
131 freq = params->frequency / 1000; // Hz -> kHz
132 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
133 priv->frequency = freq * 1000;
134 tune=2 * freq * (8192/16) / (FREF/16);
135
136 if (freq <= 495000) lnaband = 0xEE; else
137 if (freq <= 525000) lnaband = 0xDD; else
138 if (freq <= 550000) lnaband = 0xCC; else
139 if (freq <= 580000) lnaband = 0xBB; else
140 if (freq <= 605000) lnaband = 0xAA; else
141 if (freq <= 630000) lnaband = 0x99; else
142 if (freq <= 655000) lnaband = 0x88; else
143 if (freq <= 685000) lnaband = 0x77; else
144 if (freq <= 710000) lnaband = 0x66; else
145 if (freq <= 735000) lnaband = 0x55; else
146 if (freq <= 765000) lnaband = 0x44; else
147 if (freq <= 802000) lnaband = 0x33; else
148 if (freq <= 840000) lnaband = 0x22; else lnaband = 0x11;
149
150 msleep(100);
151 mt2266_writeregs(priv,(params->u.ofdm.bandwidth==BANDWIDTH_6_MHZ)?mt2266_init_6mhz:
152 (params->u.ofdm.bandwidth==BANDWIDTH_7_MHZ)?mt2266_init_7mhz:
153 mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
154
155 b[0] = REG_TUNE;
156 b[1] = (tune >> 8) & 0x1F;
157 b[2] = tune & 0xFF;
158 b[3] = tune >> 13;
159 mt2266_writeregs(priv,b,4);
160
161 dprintk("set_parms: tune=%d band=%d",(int)tune,(int)lnaband);
162 dprintk("set_parms: [1..3]: %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3]);
163
164 b[0] = 0x05;
165 b[1] = 0x62;
166 b[2] = lnaband;
167 mt2266_writeregs(priv,b,3);
168
169 //Waits for pll lock or timeout
170 i = 0;
171 do {
172 mt2266_readreg(priv,REG_LOCK,b);
173 if ((b[0] & 0x40)==0x40)
174 break;
175 msleep(10);
176 i++;
177 } while (i<10);
178 dprintk("Lock when i=%i",(int)i);
179 return ret;
180}
181
182static void mt2266_calibrate(struct mt2266_priv *priv)
183{
184 mt2266_writereg(priv,0x11,0x03);
185 mt2266_writereg(priv,0x11,0x01);
186
187 mt2266_writeregs(priv,mt2266_init1,sizeof(mt2266_init1));
188 mt2266_writeregs(priv,mt2266_init2,sizeof(mt2266_init2));
189
190 mt2266_writereg(priv,0x33,0x5e);
191 mt2266_writereg(priv,0x10,0x10);
192 mt2266_writereg(priv,0x10,0x00);
193
194 mt2266_writeregs(priv,mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
195
196 msleep(25);
197 mt2266_writereg(priv,0x17,0x6d);
198 mt2266_writereg(priv,0x1c,0x00);
199 msleep(75);
200 mt2266_writereg(priv,0x17,0x6d);
201 mt2266_writereg(priv,0x1c,0xff);
202}
203
204static int mt2266_get_frequency(struct dvb_frontend *fe, u32 *frequency)
205{
206 struct mt2266_priv *priv = fe->tuner_priv;
207 *frequency = priv->frequency;
208 return 0;
209}
210
211static int mt2266_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
212{
213 struct mt2266_priv *priv = fe->tuner_priv;
214 *bandwidth = priv->bandwidth;
215 return 0;
216}
217
218static int mt2266_init(struct dvb_frontend *fe)
219{
220 struct mt2266_priv *priv = fe->tuner_priv;
221 mt2266_writereg(priv,0x17,0x6d);
222 mt2266_writereg(priv,0x1c,0xff);
223 return 0;
224}
225
226static int mt2266_sleep(struct dvb_frontend *fe)
227{
228 struct mt2266_priv *priv = fe->tuner_priv;
229 mt2266_writereg(priv,0x17,0x6d);
230 mt2266_writereg(priv,0x1c,0x00);
231 return 0;
232}
233
234static int mt2266_release(struct dvb_frontend *fe)
235{
236 kfree(fe->tuner_priv);
237 fe->tuner_priv = NULL;
238 return 0;
239}
240
241static const struct dvb_tuner_ops mt2266_tuner_ops = {
242 .info = {
243 .name = "Microtune MT2266",
244 .frequency_min = 470000000,
245 .frequency_max = 860000000,
246 .frequency_step = 50000,
247 },
248 .release = mt2266_release,
249 .init = mt2266_init,
250 .sleep = mt2266_sleep,
251 .set_params = mt2266_set_params,
252 .get_frequency = mt2266_get_frequency,
253 .get_bandwidth = mt2266_get_bandwidth
254};
255
256struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg)
257{
258 struct mt2266_priv *priv = NULL;
259 u8 id = 0;
260
261 priv = kzalloc(sizeof(struct mt2266_priv), GFP_KERNEL);
262 if (priv == NULL)
263 return NULL;
264
265 priv->cfg = cfg;
266 priv->i2c = i2c;
267
268 if (mt2266_readreg(priv,0,&id) != 0) {
269 kfree(priv);
270 return NULL;
271 }
272 if (id != PART_REV) {
273 kfree(priv);
274 return NULL;
275 }
276 printk(KERN_INFO "MT2266: successfully identified\n");
277 memcpy(&fe->ops.tuner_ops, &mt2266_tuner_ops, sizeof(struct dvb_tuner_ops));
278
279 fe->tuner_priv = priv;
280 mt2266_calibrate(priv);
281 return fe;
282}
283EXPORT_SYMBOL(mt2266_attach);
284
285MODULE_AUTHOR("Olivier DANET");
286MODULE_DESCRIPTION("Microtune MT2266 silicon tuner driver");
287MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/mt2266.h b/drivers/media/dvb/frontends/mt2266.h
new file mode 100644
index 000000000000..f31dd613ad37
--- /dev/null
+++ b/drivers/media/dvb/frontends/mt2266.h
@@ -0,0 +1,37 @@
1/*
2 * Driver for Microtune MT2266 "Direct conversion low power broadband tuner"
3 *
4 * Copyright (c) 2007 Olivier DANET <odanet@caramail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef MT2266_H
18#define MT2266_H
19
20struct dvb_frontend;
21struct i2c_adapter;
22
23struct mt2266_config {
24 u8 i2c_address;
25};
26
27#if defined(CONFIG_DVB_TUNER_MT2266) || (defined(CONFIG_DVB_TUNER_MT2266_MODULE) && defined(MODULE))
28extern struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg);
29#else
30static inline struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg)
31{
32 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
33 return NULL;
34}
35#endif // CONFIG_DVB_TUNER_MT2266
36
37#endif
diff --git a/drivers/media/dvb/frontends/mt312.c b/drivers/media/dvb/frontends/mt312.c
index 1ef821825641..0606b9a5b616 100644
--- a/drivers/media/dvb/frontends/mt312.c
+++ b/drivers/media/dvb/frontends/mt312.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/string.h> 31#include <linux/string.h>
33#include <linux/slab.h> 32#include <linux/slab.h>
34 33
diff --git a/drivers/media/dvb/frontends/mt352.c b/drivers/media/dvb/frontends/mt352.c
index 87e31ca7e108..5dd9b731f6f2 100644
--- a/drivers/media/dvb/frontends/mt352.c
+++ b/drivers/media/dvb/frontends/mt352.c
@@ -32,7 +32,6 @@
32 32
33#include <linux/kernel.h> 33#include <linux/kernel.h>
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/init.h> 35#include <linux/init.h>
37#include <linux/delay.h> 36#include <linux/delay.h>
38#include <linux/string.h> 37#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/nxt200x.c b/drivers/media/dvb/frontends/nxt200x.c
index ddc84899cf86..fcf964fe1d6b 100644
--- a/drivers/media/dvb/frontends/nxt200x.c
+++ b/drivers/media/dvb/frontends/nxt200x.c
@@ -44,7 +44,6 @@
44#include <linux/kernel.h> 44#include <linux/kernel.h>
45#include <linux/init.h> 45#include <linux/init.h>
46#include <linux/module.h> 46#include <linux/module.h>
47#include <linux/moduleparam.h>
48#include <linux/slab.h> 47#include <linux/slab.h>
49#include <linux/string.h> 48#include <linux/string.h>
50 49
diff --git a/drivers/media/dvb/frontends/or51132.c b/drivers/media/dvb/frontends/or51132.c
index 3cc8b444b8f2..b314a1f2deed 100644
--- a/drivers/media/dvb/frontends/or51132.c
+++ b/drivers/media/dvb/frontends/or51132.c
@@ -36,7 +36,6 @@
36 36
37#include <linux/kernel.h> 37#include <linux/kernel.h>
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/moduleparam.h>
40#include <linux/init.h> 39#include <linux/init.h>
41#include <linux/delay.h> 40#include <linux/delay.h>
42#include <linux/string.h> 41#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/or51211.c b/drivers/media/dvb/frontends/or51211.c
index f46d5a46683a..f02bd9445955 100644
--- a/drivers/media/dvb/frontends/or51211.c
+++ b/drivers/media/dvb/frontends/or51211.c
@@ -32,7 +32,6 @@
32 32
33#include <linux/kernel.h> 33#include <linux/kernel.h>
34#include <linux/module.h> 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/device.h> 35#include <linux/device.h>
37#include <linux/firmware.h> 36#include <linux/firmware.h>
38#include <linux/string.h> 37#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/s5h1409.c b/drivers/media/dvb/frontends/s5h1409.c
new file mode 100644
index 000000000000..30e8a705fad4
--- /dev/null
+++ b/drivers/media/dvb/frontends/s5h1409.c
@@ -0,0 +1,729 @@
1/*
2 Samsung S5H1409 VSB/QAM demodulator driver
3
4 Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20*/
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/slab.h>
27#include <linux/delay.h>
28#include "dvb_frontend.h"
29#include "dvb-pll.h"
30#include "s5h1409.h"
31
32struct s5h1409_state {
33
34 struct i2c_adapter* i2c;
35
36 /* configuration settings */
37 const struct s5h1409_config* config;
38
39 struct dvb_frontend frontend;
40
41 /* previous uncorrected block counter */
42 fe_modulation_t current_modulation;
43
44 u32 current_frequency;
45};
46
47static int debug = 0;
48#define dprintk if (debug) printk
49
50/* Register values to initialise the demod, this will set VSB by default */
51static struct init_tab {
52 u8 reg;
53 u16 data;
54} init_tab[] = {
55 { 0x00, 0x0071, },
56 { 0x01, 0x3213, },
57 { 0x09, 0x0025, },
58 { 0x1c, 0x001d, },
59 { 0x1f, 0x002d, },
60 { 0x20, 0x001d, },
61 { 0x22, 0x0022, },
62 { 0x23, 0x0020, },
63 { 0x29, 0x110f, },
64 { 0x2a, 0x10b4, },
65 { 0x2b, 0x10ae, },
66 { 0x2c, 0x0031, },
67 { 0x31, 0x010d, },
68 { 0x32, 0x0100, },
69 { 0x44, 0x0510, },
70 { 0x54, 0x0104, },
71 { 0x58, 0x2222, },
72 { 0x59, 0x1162, },
73 { 0x5a, 0x3211, },
74 { 0x5d, 0x0370, },
75 { 0x5e, 0x0296, },
76 { 0x61, 0x0010, },
77 { 0x63, 0x4a00, },
78 { 0x65, 0x0800, },
79 { 0x71, 0x0003, },
80 { 0x72, 0x0470, },
81 { 0x81, 0x0002, },
82 { 0x82, 0x0600, },
83 { 0x86, 0x0002, },
84 { 0x8a, 0x2c38, },
85 { 0x8b, 0x2a37, },
86 { 0x92, 0x302f, },
87 { 0x93, 0x3332, },
88 { 0x96, 0x000c, },
89 { 0x99, 0x0101, },
90 { 0x9c, 0x2e37, },
91 { 0x9d, 0x2c37, },
92 { 0x9e, 0x2c37, },
93 { 0xab, 0x0100, },
94 { 0xac, 0x1003, },
95 { 0xad, 0x103f, },
96 { 0xe2, 0x0100, },
97 { 0x28, 0x1010, },
98 { 0xb1, 0x000e, },
99};
100
101/* VSB SNR lookup table */
102static struct vsb_snr_tab {
103 u16 val;
104 u16 data;
105} vsb_snr_tab[] = {
106 { 1023, 770, },
107 { 923, 300, },
108 { 918, 295, },
109 { 915, 290, },
110 { 911, 285, },
111 { 906, 280, },
112 { 901, 275, },
113 { 896, 270, },
114 { 891, 265, },
115 { 885, 260, },
116 { 879, 255, },
117 { 873, 250, },
118 { 864, 245, },
119 { 858, 240, },
120 { 850, 235, },
121 { 841, 230, },
122 { 832, 225, },
123 { 823, 220, },
124 { 812, 215, },
125 { 802, 210, },
126 { 788, 205, },
127 { 778, 200, },
128 { 767, 195, },
129 { 753, 190, },
130 { 740, 185, },
131 { 725, 180, },
132 { 707, 175, },
133 { 689, 170, },
134 { 671, 165, },
135 { 656, 160, },
136 { 637, 155, },
137 { 616, 150, },
138 { 542, 145, },
139 { 519, 140, },
140 { 507, 135, },
141 { 497, 130, },
142 { 492, 125, },
143 { 474, 120, },
144 { 300, 111, },
145 { 0, 0, },
146};
147
148/* QAM64 SNR lookup table */
149static struct qam64_snr_tab {
150 u16 val;
151 u16 data;
152} qam64_snr_tab[] = {
153 { 12, 300, },
154 { 15, 290, },
155 { 18, 280, },
156 { 22, 270, },
157 { 23, 268, },
158 { 24, 266, },
159 { 25, 264, },
160 { 27, 262, },
161 { 28, 260, },
162 { 29, 258, },
163 { 30, 256, },
164 { 32, 254, },
165 { 33, 252, },
166 { 34, 250, },
167 { 35, 249, },
168 { 36, 248, },
169 { 37, 247, },
170 { 38, 246, },
171 { 39, 245, },
172 { 40, 244, },
173 { 41, 243, },
174 { 42, 241, },
175 { 43, 240, },
176 { 44, 239, },
177 { 45, 238, },
178 { 46, 237, },
179 { 47, 236, },
180 { 48, 235, },
181 { 49, 234, },
182 { 50, 233, },
183 { 51, 232, },
184 { 52, 231, },
185 { 53, 230, },
186 { 55, 229, },
187 { 56, 228, },
188 { 57, 227, },
189 { 58, 226, },
190 { 59, 225, },
191 { 60, 224, },
192 { 62, 223, },
193 { 63, 222, },
194 { 65, 221, },
195 { 66, 220, },
196 { 68, 219, },
197 { 69, 218, },
198 { 70, 217, },
199 { 72, 216, },
200 { 73, 215, },
201 { 75, 214, },
202 { 76, 213, },
203 { 78, 212, },
204 { 80, 211, },
205 { 81, 210, },
206 { 83, 209, },
207 { 84, 208, },
208 { 85, 207, },
209 { 87, 206, },
210 { 89, 205, },
211 { 91, 204, },
212 { 93, 203, },
213 { 95, 202, },
214 { 96, 201, },
215 { 104, 200, },
216};
217
218/* QAM256 SNR lookup table */
219static struct qam256_snr_tab {
220 u16 val;
221 u16 data;
222} qam256_snr_tab[] = {
223 { 12, 400, },
224 { 13, 390, },
225 { 15, 380, },
226 { 17, 360, },
227 { 19, 350, },
228 { 22, 348, },
229 { 23, 346, },
230 { 24, 344, },
231 { 25, 342, },
232 { 26, 340, },
233 { 27, 336, },
234 { 28, 334, },
235 { 29, 332, },
236 { 30, 330, },
237 { 31, 328, },
238 { 32, 326, },
239 { 33, 325, },
240 { 34, 322, },
241 { 35, 320, },
242 { 37, 318, },
243 { 39, 316, },
244 { 40, 314, },
245 { 41, 312, },
246 { 42, 310, },
247 { 43, 308, },
248 { 46, 306, },
249 { 47, 304, },
250 { 49, 302, },
251 { 51, 300, },
252 { 53, 298, },
253 { 54, 297, },
254 { 55, 296, },
255 { 56, 295, },
256 { 57, 294, },
257 { 59, 293, },
258 { 60, 292, },
259 { 61, 291, },
260 { 63, 290, },
261 { 64, 289, },
262 { 65, 288, },
263 { 66, 287, },
264 { 68, 286, },
265 { 69, 285, },
266 { 71, 284, },
267 { 72, 283, },
268 { 74, 282, },
269 { 75, 281, },
270 { 76, 280, },
271 { 77, 279, },
272 { 78, 278, },
273 { 81, 277, },
274 { 83, 276, },
275 { 84, 275, },
276 { 86, 274, },
277 { 87, 273, },
278 { 89, 272, },
279 { 90, 271, },
280 { 92, 270, },
281 { 93, 269, },
282 { 95, 268, },
283 { 96, 267, },
284 { 98, 266, },
285 { 100, 265, },
286 { 102, 264, },
287 { 104, 263, },
288 { 105, 262, },
289 { 106, 261, },
290 { 110, 260, },
291};
292
293/* 8 bit registers, 16 bit values */
294static int s5h1409_writereg(struct s5h1409_state* state, u8 reg, u16 data)
295{
296 int ret;
297 u8 buf [] = { reg, data >> 8, data & 0xff };
298
299 struct i2c_msg msg = { .addr = state->config->demod_address,
300 .flags = 0, .buf = buf, .len = 3 };
301
302 ret = i2c_transfer(state->i2c, &msg, 1);
303
304 if (ret != 1)
305 printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
306 "ret == %i)\n", __FUNCTION__, reg, data, ret);
307
308 return (ret != 1) ? -1 : 0;
309}
310
311static u16 s5h1409_readreg(struct s5h1409_state* state, u8 reg)
312{
313 int ret;
314 u8 b0 [] = { reg };
315 u8 b1 [] = { 0, 0 };
316
317 struct i2c_msg msg [] = {
318 { .addr = state->config->demod_address, .flags = 0,
319 .buf = b0, .len = 1 },
320 { .addr = state->config->demod_address, .flags = I2C_M_RD,
321 .buf = b1, .len = 2 } };
322
323 ret = i2c_transfer(state->i2c, msg, 2);
324
325 if (ret != 2)
326 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
327 return (b1[0] << 8) | b1[1];
328}
329
330static int s5h1409_softreset(struct dvb_frontend* fe)
331{
332 struct s5h1409_state* state = fe->demodulator_priv;
333
334 dprintk("%s()\n", __FUNCTION__);
335
336 s5h1409_writereg(state, 0xf5, 0);
337 s5h1409_writereg(state, 0xf5, 1);
338 return 0;
339}
340
341static int s5h1409_set_if_freq(struct dvb_frontend* fe, int KHz)
342{
343 struct s5h1409_state* state = fe->demodulator_priv;
344 int ret = 0;
345
346 dprintk("%s(%d KHz)\n", __FUNCTION__, KHz);
347
348 if( (KHz == 44000) || (KHz == 5380) ) {
349 s5h1409_writereg(state, 0x87, 0x01be);
350 s5h1409_writereg(state, 0x88, 0x0436);
351 s5h1409_writereg(state, 0x89, 0x054d);
352 } else {
353 printk("%s() Invalid arg = %d KHz\n", __FUNCTION__, KHz);
354 ret = -1;
355 }
356
357 return ret;
358}
359
360static int s5h1409_set_spectralinversion(struct dvb_frontend* fe, int inverted)
361{
362 struct s5h1409_state* state = fe->demodulator_priv;
363
364 dprintk("%s()\n", __FUNCTION__);
365
366 if(inverted == 1)
367 return s5h1409_writereg(state, 0x1b, 0x1101); /* Inverted */
368 else
369 return s5h1409_writereg(state, 0x1b, 0x0110); /* Normal */
370}
371
372static int s5h1409_enable_modulation(struct dvb_frontend* fe,
373 fe_modulation_t m)
374{
375 struct s5h1409_state* state = fe->demodulator_priv;
376
377 dprintk("%s(0x%08x)\n", __FUNCTION__, m);
378
379 switch(m) {
380 case VSB_8:
381 dprintk("%s() VSB_8\n", __FUNCTION__);
382 s5h1409_writereg(state, 0xf4, 0);
383 break;
384 case QAM_64:
385 dprintk("%s() QAM_64\n", __FUNCTION__);
386 s5h1409_writereg(state, 0xf4, 1);
387 s5h1409_writereg(state, 0x85, 0x100);
388 break;
389 case QAM_256:
390 dprintk("%s() QAM_256\n", __FUNCTION__);
391 s5h1409_writereg(state, 0xf4, 1);
392 s5h1409_writereg(state, 0x85, 0x101);
393 break;
394 default:
395 dprintk("%s() Invalid modulation\n", __FUNCTION__);
396 return -EINVAL;
397 }
398
399 state->current_modulation = m;
400 s5h1409_softreset(fe);
401
402 return 0;
403}
404
405static int s5h1409_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
406{
407 struct s5h1409_state* state = fe->demodulator_priv;
408
409 dprintk("%s(%d)\n", __FUNCTION__, enable);
410
411 if (enable)
412 return s5h1409_writereg(state, 0xf3, 1);
413 else
414 return s5h1409_writereg(state, 0xf3, 0);
415}
416
417static int s5h1409_set_gpio(struct dvb_frontend* fe, int enable)
418{
419 struct s5h1409_state* state = fe->demodulator_priv;
420
421 dprintk("%s(%d)\n", __FUNCTION__, enable);
422
423 if (enable)
424 return s5h1409_writereg(state, 0xe3, 0x1100);
425 else
426 return s5h1409_writereg(state, 0xe3, 0);
427}
428
429static int s5h1409_sleep(struct dvb_frontend* fe, int enable)
430{
431 struct s5h1409_state* state = fe->demodulator_priv;
432
433 dprintk("%s(%d)\n", __FUNCTION__, enable);
434
435 return s5h1409_writereg(state, 0xf2, enable);
436}
437
438static int s5h1409_register_reset(struct dvb_frontend* fe)
439{
440 struct s5h1409_state* state = fe->demodulator_priv;
441
442 dprintk("%s()\n", __FUNCTION__);
443
444 return s5h1409_writereg(state, 0xfa, 0);
445}
446
447/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
448static int s5h1409_set_frontend (struct dvb_frontend* fe,
449 struct dvb_frontend_parameters *p)
450{
451 struct s5h1409_state* state = fe->demodulator_priv;
452
453 dprintk("%s(frequency=%d)\n", __FUNCTION__, p->frequency);
454
455 s5h1409_softreset(fe);
456
457 state->current_frequency = p->frequency;
458
459 s5h1409_enable_modulation(fe, p->u.vsb.modulation);
460
461 if (fe->ops.tuner_ops.set_params) {
462 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1);
463 fe->ops.tuner_ops.set_params(fe, p);
464 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
465 }
466
467 return 0;
468}
469
470/* Reset the demod hardware and reset all of the configuration registers
471 to a default state. */
472static int s5h1409_init (struct dvb_frontend* fe)
473{
474 int i;
475
476 struct s5h1409_state* state = fe->demodulator_priv;
477 dprintk("%s()\n", __FUNCTION__);
478
479 s5h1409_sleep(fe, 0);
480 s5h1409_register_reset(fe);
481
482 for (i=0; i < ARRAY_SIZE(init_tab); i++)
483 s5h1409_writereg(state, init_tab[i].reg, init_tab[i].data);
484
485 /* The datasheet says that after initialisation, VSB is default */
486 state->current_modulation = VSB_8;
487
488 if (state->config->output_mode == S5H1409_SERIAL_OUTPUT)
489 s5h1409_writereg(state, 0xab, 0x100); /* Serial */
490 else
491 s5h1409_writereg(state, 0xab, 0x0); /* Parallel */
492
493 s5h1409_set_spectralinversion(fe, state->config->inversion);
494 s5h1409_set_if_freq(fe, state->config->if_freq);
495 s5h1409_set_gpio(fe, state->config->gpio);
496 s5h1409_softreset(fe);
497
498 /* Note: Leaving the I2C gate open here. */
499 s5h1409_i2c_gate_ctrl(fe, 1);
500
501 return 0;
502}
503
504static int s5h1409_read_status(struct dvb_frontend* fe, fe_status_t* status)
505{
506 struct s5h1409_state* state = fe->demodulator_priv;
507 u16 reg;
508 u32 tuner_status = 0;
509
510 *status = 0;
511
512 /* Get the demodulator status */
513 reg = s5h1409_readreg(state, 0xf1);
514 if(reg & 0x1000)
515 *status |= FE_HAS_VITERBI;
516 if(reg & 0x8000)
517 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
518
519 switch(state->config->status_mode) {
520 case S5H1409_DEMODLOCKING:
521 if (*status & FE_HAS_VITERBI)
522 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
523 break;
524 case S5H1409_TUNERLOCKING:
525 /* Get the tuner status */
526 if (fe->ops.tuner_ops.get_status) {
527 if (fe->ops.i2c_gate_ctrl)
528 fe->ops.i2c_gate_ctrl(fe, 1);
529
530 fe->ops.tuner_ops.get_status(fe, &tuner_status);
531
532 if (fe->ops.i2c_gate_ctrl)
533 fe->ops.i2c_gate_ctrl(fe, 0);
534 }
535 if (tuner_status)
536 *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
537 break;
538 }
539
540 dprintk("%s() status 0x%08x\n", __FUNCTION__, *status);
541
542 return 0;
543}
544
545static int s5h1409_qam256_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
546{
547 int i, ret = -EINVAL;
548 dprintk("%s()\n", __FUNCTION__);
549
550 for (i=0; i < ARRAY_SIZE(qam256_snr_tab); i++) {
551 if (v < qam256_snr_tab[i].val) {
552 *snr = qam256_snr_tab[i].data;
553 ret = 0;
554 break;
555 }
556 }
557 return ret;
558}
559
560static int s5h1409_qam64_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
561{
562 int i, ret = -EINVAL;
563 dprintk("%s()\n", __FUNCTION__);
564
565 for (i=0; i < ARRAY_SIZE(qam64_snr_tab); i++) {
566 if (v < qam64_snr_tab[i].val) {
567 *snr = qam64_snr_tab[i].data;
568 ret = 0;
569 break;
570 }
571 }
572 return ret;
573}
574
575static int s5h1409_vsb_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
576{
577 int i, ret = -EINVAL;
578 dprintk("%s()\n", __FUNCTION__);
579
580 for (i=0; i < ARRAY_SIZE(vsb_snr_tab); i++) {
581 if (v > vsb_snr_tab[i].val) {
582 *snr = vsb_snr_tab[i].data;
583 ret = 0;
584 break;
585 }
586 }
587 dprintk("%s() snr=%d\n", __FUNCTION__, *snr);
588 return ret;
589}
590
591static int s5h1409_read_snr(struct dvb_frontend* fe, u16* snr)
592{
593 struct s5h1409_state* state = fe->demodulator_priv;
594 u16 reg;
595 dprintk("%s()\n", __FUNCTION__);
596
597 reg = s5h1409_readreg(state, 0xf1) & 0x1ff;
598
599 switch(state->current_modulation) {
600 case QAM_64:
601 return s5h1409_qam64_lookup_snr(fe, snr, reg);
602 case QAM_256:
603 return s5h1409_qam256_lookup_snr(fe, snr, reg);
604 case VSB_8:
605 return s5h1409_vsb_lookup_snr(fe, snr, reg);
606 default:
607 break;
608 }
609
610 return -EINVAL;
611}
612
613static int s5h1409_read_signal_strength(struct dvb_frontend* fe,
614 u16* signal_strength)
615{
616 return s5h1409_read_snr(fe, signal_strength);
617}
618
619static int s5h1409_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
620{
621 struct s5h1409_state* state = fe->demodulator_priv;
622
623 *ucblocks = s5h1409_readreg(state, 0xb5);
624
625 return 0;
626}
627
628static int s5h1409_read_ber(struct dvb_frontend* fe, u32* ber)
629{
630 return s5h1409_read_ucblocks(fe, ber);
631}
632
633static int s5h1409_get_frontend(struct dvb_frontend* fe,
634 struct dvb_frontend_parameters *p)
635{
636 struct s5h1409_state* state = fe->demodulator_priv;
637
638 p->frequency = state->current_frequency;
639 p->u.vsb.modulation = state->current_modulation;
640
641 return 0;
642}
643
644static int s5h1409_get_tune_settings(struct dvb_frontend* fe,
645 struct dvb_frontend_tune_settings *tune)
646{
647 tune->min_delay_ms = 1000;
648 return 0;
649}
650
651static void s5h1409_release(struct dvb_frontend* fe)
652{
653 struct s5h1409_state* state = fe->demodulator_priv;
654 kfree(state);
655}
656
657static struct dvb_frontend_ops s5h1409_ops;
658
659struct dvb_frontend* s5h1409_attach(const struct s5h1409_config* config,
660 struct i2c_adapter* i2c)
661{
662 struct s5h1409_state* state = NULL;
663
664 /* allocate memory for the internal state */
665 state = kmalloc(sizeof(struct s5h1409_state), GFP_KERNEL);
666 if (state == NULL)
667 goto error;
668
669 /* setup the state */
670 state->config = config;
671 state->i2c = i2c;
672 state->current_modulation = 0;
673
674 /* check if the demod exists */
675 if (s5h1409_readreg(state, 0x04) != 0x0066)
676 goto error;
677
678 /* create dvb_frontend */
679 memcpy(&state->frontend.ops, &s5h1409_ops,
680 sizeof(struct dvb_frontend_ops));
681 state->frontend.demodulator_priv = state;
682
683 /* Note: Leaving the I2C gate open here. */
684 s5h1409_writereg(state, 0xf3, 1);
685
686 return &state->frontend;
687
688error:
689 kfree(state);
690 return NULL;
691}
692
693static struct dvb_frontend_ops s5h1409_ops = {
694
695 .info = {
696 .name = "Samsung S5H1409 QAM/8VSB Frontend",
697 .type = FE_ATSC,
698 .frequency_min = 54000000,
699 .frequency_max = 858000000,
700 .frequency_stepsize = 62500,
701 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
702 },
703
704 .init = s5h1409_init,
705 .i2c_gate_ctrl = s5h1409_i2c_gate_ctrl,
706 .set_frontend = s5h1409_set_frontend,
707 .get_frontend = s5h1409_get_frontend,
708 .get_tune_settings = s5h1409_get_tune_settings,
709 .read_status = s5h1409_read_status,
710 .read_ber = s5h1409_read_ber,
711 .read_signal_strength = s5h1409_read_signal_strength,
712 .read_snr = s5h1409_read_snr,
713 .read_ucblocks = s5h1409_read_ucblocks,
714 .release = s5h1409_release,
715};
716
717module_param(debug, int, 0644);
718MODULE_PARM_DESC(debug, "Enable verbose debug messages");
719
720MODULE_DESCRIPTION("Samsung S5H1409 QAM-B/ATSC Demodulator driver");
721MODULE_AUTHOR("Steven Toth");
722MODULE_LICENSE("GPL");
723
724EXPORT_SYMBOL(s5h1409_attach);
725
726/*
727 * Local variables:
728 * c-basic-offset: 8
729 */
diff --git a/drivers/media/dvb/frontends/s5h1409.h b/drivers/media/dvb/frontends/s5h1409.h
new file mode 100644
index 000000000000..20f9af1af445
--- /dev/null
+++ b/drivers/media/dvb/frontends/s5h1409.h
@@ -0,0 +1,73 @@
1/*
2 Samsung S5H1409 VSB/QAM demodulator driver
3
4 Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20*/
21
22#ifndef __S5H1409_H__
23#define __S5H1409_H__
24
25#include <linux/dvb/frontend.h>
26
27struct s5h1409_config
28{
29 /* the demodulator's i2c address */
30 u8 demod_address;
31
32 /* serial/parallel output */
33#define S5H1409_PARALLEL_OUTPUT 0
34#define S5H1409_SERIAL_OUTPUT 1
35 u8 output_mode;
36
37 /* GPIO Setting */
38#define S5H1409_GPIO_OFF 0
39#define S5H1409_GPIO_ON 1
40 u8 gpio;
41
42 /* IF Freq in KHz */
43 u16 if_freq;
44
45 /* Spectral Inversion */
46#define S5H1409_INVERSION_OFF 0
47#define S5H1409_INVERSION_ON 1
48 u8 inversion;
49
50 /* Return lock status based on tuner lock, or demod lock */
51#define S5H1409_TUNERLOCKING 0
52#define S5H1409_DEMODLOCKING 1
53 u8 status_mode;
54};
55
56#if defined(CONFIG_DVB_S5H1409) || (defined(CONFIG_DVB_S5H1409_MODULE) && defined(MODULE))
57extern struct dvb_frontend* s5h1409_attach(const struct s5h1409_config* config,
58 struct i2c_adapter* i2c);
59#else
60static inline struct dvb_frontend* s5h1409_attach(const struct s5h1409_config* config,
61 struct i2c_adapter* i2c)
62{
63 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
64 return NULL;
65}
66#endif /* CONFIG_DVB_S5H1409 */
67
68#endif /* __S5H1409_H__ */
69
70/*
71 * Local variables:
72 * c-basic-offset: 8
73 */
diff --git a/drivers/media/dvb/frontends/sp8870.c b/drivers/media/dvb/frontends/sp8870.c
index d98fd5c2e13e..da876f7bfe32 100644
--- a/drivers/media/dvb/frontends/sp8870.c
+++ b/drivers/media/dvb/frontends/sp8870.c
@@ -29,7 +29,6 @@
29 29
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/moduleparam.h>
33#include <linux/device.h> 32#include <linux/device.h>
34#include <linux/firmware.h> 33#include <linux/firmware.h>
35#include <linux/delay.h> 34#include <linux/delay.h>
diff --git a/drivers/media/dvb/frontends/sp887x.c b/drivers/media/dvb/frontends/sp887x.c
index 5c2f8f4e0ae5..1aa2539f5099 100644
--- a/drivers/media/dvb/frontends/sp887x.c
+++ b/drivers/media/dvb/frontends/sp887x.c
@@ -12,7 +12,6 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/device.h> 15#include <linux/device.h>
17#include <linux/firmware.h> 16#include <linux/firmware.h>
18#include <linux/string.h> 17#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c
index 9a343972ff50..17e5cb561cd8 100644
--- a/drivers/media/dvb/frontends/stv0297.c
+++ b/drivers/media/dvb/frontends/stv0297.c
@@ -680,8 +680,8 @@ static struct dvb_frontend_ops stv0297_ops = {
680 .info = { 680 .info = {
681 .name = "ST STV0297 DVB-C", 681 .name = "ST STV0297 DVB-C",
682 .type = FE_QAM, 682 .type = FE_QAM,
683 .frequency_min = 64000000, 683 .frequency_min = 47000000,
684 .frequency_max = 1300000000, 684 .frequency_max = 862000000,
685 .frequency_stepsize = 62500, 685 .frequency_stepsize = 62500,
686 .symbol_rate_min = 870000, 686 .symbol_rate_min = 870000,
687 .symbol_rate_max = 11700000, 687 .symbol_rate_max = 11700000,
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c
index 6c607302c1b6..035dd7ba6519 100644
--- a/drivers/media/dvb/frontends/stv0299.c
+++ b/drivers/media/dvb/frontends/stv0299.c
@@ -45,7 +45,6 @@
45#include <linux/init.h> 45#include <linux/init.h>
46#include <linux/kernel.h> 46#include <linux/kernel.h>
47#include <linux/module.h> 47#include <linux/module.h>
48#include <linux/moduleparam.h>
49#include <linux/string.h> 48#include <linux/string.h>
50#include <linux/slab.h> 49#include <linux/slab.h>
51#include <linux/jiffies.h> 50#include <linux/jiffies.h>
diff --git a/drivers/media/dvb/frontends/tda10021.c b/drivers/media/dvb/frontends/tda10021.c
index e725f612a6b7..4cd9e82c4669 100644
--- a/drivers/media/dvb/frontends/tda10021.c
+++ b/drivers/media/dvb/frontends/tda10021.c
@@ -439,8 +439,8 @@ static struct dvb_frontend_ops tda10021_ops = {
439 .name = "Philips TDA10021 DVB-C", 439 .name = "Philips TDA10021 DVB-C",
440 .type = FE_QAM, 440 .type = FE_QAM,
441 .frequency_stepsize = 62500, 441 .frequency_stepsize = 62500,
442 .frequency_min = 51000000, 442 .frequency_min = 47000000,
443 .frequency_max = 858000000, 443 .frequency_max = 862000000,
444 .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */ 444 .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
445 .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */ 445 .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
446 #if 0 446 #if 0
diff --git a/drivers/media/dvb/frontends/tda10023.c b/drivers/media/dvb/frontends/tda10023.c
index 4bb06f97938b..364bc01971a0 100644
--- a/drivers/media/dvb/frontends/tda10023.c
+++ b/drivers/media/dvb/frontends/tda10023.c
@@ -215,12 +215,6 @@ static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
215 s16 SFIL=0; 215 s16 SFIL=0;
216 u16 NDEC = 0; 216 u16 NDEC = 0;
217 217
218 if (sr > (SYSCLK/(2*4)))
219 sr=SYSCLK/(2*4);
220
221 if (sr<870000)
222 sr=870000;
223
224 if (sr < (u32)(SYSCLK/98.40)) { 218 if (sr < (u32)(SYSCLK/98.40)) {
225 NDEC=3; 219 NDEC=3;
226 SFIL=1; 220 SFIL=1;
@@ -506,8 +500,8 @@ static struct dvb_frontend_ops tda10023_ops = {
506 .name = "Philips TDA10023 DVB-C", 500 .name = "Philips TDA10023 DVB-C",
507 .type = FE_QAM, 501 .type = FE_QAM,
508 .frequency_stepsize = 62500, 502 .frequency_stepsize = 62500,
509 .frequency_min = 51000000, 503 .frequency_min = 47000000,
510 .frequency_max = 858000000, 504 .frequency_max = 862000000,
511 .symbol_rate_min = (SYSCLK/2)/64, /* SACLK/64 == (SYSCLK/2)/64 */ 505 .symbol_rate_min = (SYSCLK/2)/64, /* SACLK/64 == (SYSCLK/2)/64 */
512 .symbol_rate_max = (SYSCLK/2)/4, /* SACLK/4 */ 506 .symbol_rate_max = (SYSCLK/2)/4, /* SACLK/4 */
513 .caps = 0x400 | //FE_CAN_QAM_4 507 .caps = 0x400 | //FE_CAN_QAM_4
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c
index 33a84372c9e6..8415a8a5247a 100644
--- a/drivers/media/dvb/frontends/tda1004x.c
+++ b/drivers/media/dvb/frontends/tda1004x.c
@@ -31,7 +31,6 @@
31 31
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/module.h> 33#include <linux/module.h>
34#include <linux/moduleparam.h>
35#include <linux/device.h> 34#include <linux/device.h>
36#include <linux/jiffies.h> 35#include <linux/jiffies.h>
37#include <linux/string.h> 36#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/tda10086.c b/drivers/media/dvb/frontends/tda10086.c
index 0f2d4b415560..9a8ddc537f8f 100644
--- a/drivers/media/dvb/frontends/tda10086.c
+++ b/drivers/media/dvb/frontends/tda10086.c
@@ -22,7 +22,6 @@
22 22
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/device.h> 25#include <linux/device.h>
27#include <linux/jiffies.h> 26#include <linux/jiffies.h>
28#include <linux/string.h> 27#include <linux/string.h>
diff --git a/drivers/media/dvb/frontends/tda8083.c b/drivers/media/dvb/frontends/tda8083.c
index 67415c9db6f7..011b74f798a0 100644
--- a/drivers/media/dvb/frontends/tda8083.c
+++ b/drivers/media/dvb/frontends/tda8083.c
@@ -27,7 +27,6 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/string.h> 30#include <linux/string.h>
32#include <linux/slab.h> 31#include <linux/slab.h>
33#include <linux/jiffies.h> 32#include <linux/jiffies.h>
@@ -443,12 +442,12 @@ static struct dvb_frontend_ops tda8083_ops = {
443 .info = { 442 .info = {
444 .name = "Philips TDA8083 DVB-S", 443 .name = "Philips TDA8083 DVB-S",
445 .type = FE_QPSK, 444 .type = FE_QPSK,
446 .frequency_min = 950000, /* FIXME: guessed! */ 445 .frequency_min = 920000, /* TDA8060 */
447 .frequency_max = 1400000, /* FIXME: guessed! */ 446 .frequency_max = 2200000, /* TDA8060 */
448 .frequency_stepsize = 125, /* kHz for QPSK frontends */ 447 .frequency_stepsize = 125, /* kHz for QPSK frontends */
449 /* .frequency_tolerance = ???,*/ 448 /* .frequency_tolerance = ???,*/
450 .symbol_rate_min = 1000000, /* FIXME: guessed! */ 449 .symbol_rate_min = 12000000,
451 .symbol_rate_max = 45000000, /* FIXME: guessed! */ 450 .symbol_rate_max = 30000000,
452 /* .symbol_rate_tolerance = ???,*/ 451 /* .symbol_rate_tolerance = ???,*/
453 .caps = FE_CAN_INVERSION_AUTO | 452 .caps = FE_CAN_INVERSION_AUTO |
454 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 453 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
diff --git a/drivers/media/dvb/frontends/ves1820.c b/drivers/media/dvb/frontends/ves1820.c
index 9b57576bfeb4..066b73b75698 100644
--- a/drivers/media/dvb/frontends/ves1820.c
+++ b/drivers/media/dvb/frontends/ves1820.c
@@ -410,8 +410,8 @@ static struct dvb_frontend_ops ves1820_ops = {
410 .name = "VLSI VES1820 DVB-C", 410 .name = "VLSI VES1820 DVB-C",
411 .type = FE_QAM, 411 .type = FE_QAM,
412 .frequency_stepsize = 62500, 412 .frequency_stepsize = 62500,
413 .frequency_min = 51000000, 413 .frequency_min = 47000000,
414 .frequency_max = 858000000, 414 .frequency_max = 862000000,
415 .caps = FE_CAN_QAM_16 | 415 .caps = FE_CAN_QAM_16 |
416 FE_CAN_QAM_32 | 416 FE_CAN_QAM_32 |
417 FE_CAN_QAM_64 | 417 FE_CAN_QAM_64 |
diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c
index 245f9b7dddfa..a97a7fd2c891 100644
--- a/drivers/media/dvb/frontends/zl10353.c
+++ b/drivers/media/dvb/frontends/zl10353.c
@@ -21,7 +21,6 @@
21 21
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/init.h> 24#include <linux/init.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
27#include <linux/string.h> 26#include <linux/string.h>
diff --git a/drivers/media/dvb/ttpci/av7110.c b/drivers/media/dvb/ttpci/av7110.c
index 8178832d14a8..8b8144f77a73 100644
--- a/drivers/media/dvb/ttpci/av7110.c
+++ b/drivers/media/dvb/ttpci/av7110.c
@@ -40,7 +40,6 @@
40#include <linux/smp_lock.h> 40#include <linux/smp_lock.h>
41 41
42#include <linux/kernel.h> 42#include <linux/kernel.h>
43#include <linux/moduleparam.h>
44#include <linux/sched.h> 43#include <linux/sched.h>
45#include <linux/types.h> 44#include <linux/types.h>
46#include <linux/fcntl.h> 45#include <linux/fcntl.h>
@@ -1543,7 +1542,7 @@ static int get_firmware(struct av7110* av7110)
1543 } 1542 }
1544 1543
1545 /* check if the firmware is available */ 1544 /* check if the firmware is available */
1546 av7110->bin_fw = (unsigned char *) vmalloc(fw->size); 1545 av7110->bin_fw = vmalloc(fw->size);
1547 if (NULL == av7110->bin_fw) { 1546 if (NULL == av7110->bin_fw) {
1548 dprintk(1, "out of memory\n"); 1547 dprintk(1, "out of memory\n");
1549 release_firmware(fw); 1548 release_firmware(fw);
diff --git a/drivers/media/dvb/ttpci/av7110_hw.c b/drivers/media/dvb/ttpci/av7110_hw.c
index 515e8232e020..a468aa2e4854 100644
--- a/drivers/media/dvb/ttpci/av7110_hw.c
+++ b/drivers/media/dvb/ttpci/av7110_hw.c
@@ -978,24 +978,24 @@ static int OSDSetColor(struct av7110 *av7110, u8 color, u8 r, u8 g, u8 b, u8 ble
978 978
979static int OSDSetPalette(struct av7110 *av7110, u32 __user * colors, u8 first, u8 last) 979static int OSDSetPalette(struct av7110 *av7110, u32 __user * colors, u8 first, u8 last)
980{ 980{
981 int i; 981 int i;
982 int length = last - first + 1; 982 int length = last - first + 1;
983 983
984 if (length * 4 > DATA_BUFF3_SIZE) 984 if (length * 4 > DATA_BUFF3_SIZE)
985 return -EINVAL; 985 return -EINVAL;
986 986
987 for (i = 0; i < length; i++) { 987 for (i = 0; i < length; i++) {
988 u32 color, blend, yuv; 988 u32 color, blend, yuv;
989 989
990 if (get_user(color, colors + i)) 990 if (get_user(color, colors + i))
991 return -EFAULT; 991 return -EFAULT;
992 blend = (color & 0xF0000000) >> 4; 992 blend = (color & 0xF0000000) >> 4;
993 yuv = blend ? RGB2YUV(color & 0xFF, (color >> 8) & 0xFF, 993 yuv = blend ? RGB2YUV(color & 0xFF, (color >> 8) & 0xFF,
994 (color >> 16) & 0xFF) | blend : 0; 994 (color >> 16) & 0xFF) | blend : 0;
995 yuv = ((yuv & 0xFFFF0000) >> 16) | ((yuv & 0x0000FFFF) << 16); 995 yuv = ((yuv & 0xFFFF0000) >> 16) | ((yuv & 0x0000FFFF) << 16);
996 wdebi(av7110, DEBINOSWAP, DATA_BUFF3_BASE + i * 4, yuv, 4); 996 wdebi(av7110, DEBINOSWAP, DATA_BUFF3_BASE + i * 4, yuv, 4);
997 } 997 }
998 return av7110_fw_cmd(av7110, COMTYPE_OSD, Set_Palette, 4, 998 return av7110_fw_cmd(av7110, COMTYPE_OSD, Set_Palette, 4,
999 av7110->osdwin, 999 av7110->osdwin,
1000 bpp2pal[av7110->osdbpp[av7110->osdwin]], 1000 bpp2pal[av7110->osdbpp[av7110->osdwin]],
1001 first, last); 1001 first, last);
diff --git a/drivers/media/dvb/ttpci/av7110_ir.c b/drivers/media/dvb/ttpci/av7110_ir.c
index 6322800ee12b..5d19c402dad1 100644
--- a/drivers/media/dvb/ttpci/av7110_ir.c
+++ b/drivers/media/dvb/ttpci/av7110_ir.c
@@ -25,7 +25,6 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/proc_fs.h> 28#include <linux/proc_fs.h>
30#include <linux/kernel.h> 29#include <linux/kernel.h>
31#include <asm/bitops.h> 30#include <asm/bitops.h>
@@ -280,7 +279,7 @@ static int av7110_ir_write_proc(struct file *file, const char __user *buffer,
280 if (count < size) 279 if (count < size)
281 return -EINVAL; 280 return -EINVAL;
282 281
283 page = (char *) vmalloc(size); 282 page = vmalloc(size);
284 if (!page) 283 if (!page)
285 return -ENOMEM; 284 return -ENOMEM;
286 285
diff --git a/drivers/media/dvb/ttpci/av7110_v4l.c b/drivers/media/dvb/ttpci/av7110_v4l.c
index 87afaebc0703..76cca003252f 100644
--- a/drivers/media/dvb/ttpci/av7110_v4l.c
+++ b/drivers/media/dvb/ttpci/av7110_v4l.c
@@ -129,23 +129,25 @@ static struct v4l2_input inputs[4] = {
129 129
130static int ves1820_writereg(struct saa7146_dev *dev, u8 addr, u8 reg, u8 data) 130static int ves1820_writereg(struct saa7146_dev *dev, u8 addr, u8 reg, u8 data)
131{ 131{
132 struct av7110 *av7110 = dev->ext_priv;
132 u8 buf[] = { 0x00, reg, data }; 133 u8 buf[] = { 0x00, reg, data };
133 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = 3 }; 134 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = 3 };
134 135
135 dprintk(4, "dev: %p\n", dev); 136 dprintk(4, "dev: %p\n", dev);
136 137
137 if (1 != saa7146_i2c_transfer(dev, &msg, 1, 1)) 138 if (1 != i2c_transfer(&av7110->i2c_adap, &msg, 1))
138 return -1; 139 return -1;
139 return 0; 140 return 0;
140} 141}
141 142
142static int tuner_write(struct saa7146_dev *dev, u8 addr, u8 data [4]) 143static int tuner_write(struct saa7146_dev *dev, u8 addr, u8 data [4])
143{ 144{
145 struct av7110 *av7110 = dev->ext_priv;
144 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = data, .len = 4 }; 146 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = data, .len = 4 };
145 147
146 dprintk(4, "dev: %p\n", dev); 148 dprintk(4, "dev: %p\n", dev);
147 149
148 if (1 != saa7146_i2c_transfer(dev, &msg, 1, 1)) 150 if (1 != i2c_transfer(&av7110->i2c_adap, &msg, 1))
149 return -1; 151 return -1;
150 return 0; 152 return 0;
151} 153}
diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c
index 0aee7a13a070..3439c9864f67 100644
--- a/drivers/media/dvb/ttpci/budget-av.c
+++ b/drivers/media/dvb/ttpci/budget-av.c
@@ -1232,7 +1232,7 @@ static struct saa7146_ext_vv vv_data = {
1232 .capabilities = 0, // perhaps later: V4L2_CAP_VBI_CAPTURE, but that need tweaking with the saa7113 1232 .capabilities = 0, // perhaps later: V4L2_CAP_VBI_CAPTURE, but that need tweaking with the saa7113
1233 .flags = 0, 1233 .flags = 0,
1234 .stds = &standard[0], 1234 .stds = &standard[0],
1235 .num_stds = sizeof(standard) / sizeof(struct saa7146_standard), 1235 .num_stds = ARRAY_SIZE(standard),
1236 .ioctls = &ioctls[0], 1236 .ioctls = &ioctls[0],
1237 .ioctl = av_ioctl, 1237 .ioctl = av_ioctl,
1238}; 1238};
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 873c3ba296f2..509349211d4f 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -214,7 +214,6 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
214 case 0x100f: 214 case 0x100f:
215 case 0x1011: 215 case 0x1011:
216 case 0x1012: 216 case 0x1012:
217 case 0x1017:
218 /* The hauppauge keymap is a superset of these remotes */ 217 /* The hauppauge keymap is a superset of these remotes */
219 ir_input_init(input_dev, &budget_ci->ir.state, 218 ir_input_init(input_dev, &budget_ci->ir.state,
220 IR_TYPE_RC5, ir_codes_hauppauge_new); 219 IR_TYPE_RC5, ir_codes_hauppauge_new);
@@ -225,6 +224,7 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
225 budget_ci->ir.rc5_device = rc5_device; 224 budget_ci->ir.rc5_device = rc5_device;
226 break; 225 break;
227 case 0x1010: 226 case 0x1010:
227 case 0x1017:
228 /* for the Technotrend 1500 bundled remote */ 228 /* for the Technotrend 1500 bundled remote */
229 ir_input_init(input_dev, &budget_ci->ir.state, 229 ir_input_init(input_dev, &budget_ci->ir.state,
230 IR_TYPE_RC5, ir_codes_tt_1500); 230 IR_TYPE_RC5, ir_codes_tt_1500);
diff --git a/drivers/media/dvb/ttpci/budget-core.c b/drivers/media/dvb/ttpci/budget-core.c
index b611f2b1f8bc..0252081f013c 100644
--- a/drivers/media/dvb/ttpci/budget-core.c
+++ b/drivers/media/dvb/ttpci/budget-core.c
@@ -34,7 +34,6 @@
34 * the project's page is at http://www.linuxtv.org/dvb/ 34 * the project's page is at http://www.linuxtv.org/dvb/
35 */ 35 */
36 36
37#include <linux/moduleparam.h>
38 37
39#include "budget.h" 38#include "budget.h"
40#include "ttpci-eeprom.h" 39#include "ttpci-eeprom.h"
diff --git a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
index b60cdc93d6db..288e79f2cb0f 100644
--- a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
+++ b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
@@ -13,7 +13,6 @@
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/wait.h> 14#include <linux/wait.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/usb.h> 16#include <linux/usb.h>
18#include <linux/delay.h> 17#include <linux/delay.h>
19#include <linux/time.h> 18#include <linux/time.h>
diff --git a/drivers/media/dvb/ttusb-dec/ttusb_dec.c b/drivers/media/dvb/ttusb-dec/ttusb_dec.c
index 78c98b089975..5e691fd79904 100644
--- a/drivers/media/dvb/ttusb-dec/ttusb_dec.c
+++ b/drivers/media/dvb/ttusb-dec/ttusb_dec.c
@@ -22,7 +22,6 @@
22 22
23#include <linux/list.h> 23#include <linux/list.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/pci.h> 25#include <linux/pci.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/spinlock.h> 27#include <linux/spinlock.h>
diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig
index f8bf9fe37d36..11e962f1a97f 100644
--- a/drivers/media/radio/Kconfig
+++ b/drivers/media/radio/Kconfig
@@ -111,11 +111,16 @@ config RADIO_AZTECH_PORT
111 jumper sets the card to 0x358. 111 jumper sets the card to 0x358.
112 112
113config RADIO_GEMTEK 113config RADIO_GEMTEK
114 tristate "GemTek Radio Card support" 114 tristate "GemTek Radio card (or compatible) support"
115 depends on ISA && VIDEO_V4L2 115 depends on ISA && VIDEO_V4L2
116 ---help--- 116 ---help---
117 Choose Y here if you have this FM radio card, and then fill in the 117 Choose Y here if you have this FM radio card, and then fill in the
118 port address below. 118 I/O port address and settings below. The following cards either have
119 GemTek Radio tuner or are rebranded GemTek Radio cards:
120
121 - Sound Vision 16 Gold with FM Radio
122 - Typhoon Radio card (some models)
123 - Hama Radio card
119 124
120 In order to control your radio card, you will need to use programs 125 In order to control your radio card, you will need to use programs
121 that are compatible with the Video For Linux API. Information on 126 that are compatible with the Video For Linux API. Information on
@@ -126,14 +131,25 @@ config RADIO_GEMTEK
126 module will be called radio-gemtek. 131 module will be called radio-gemtek.
127 132
128config RADIO_GEMTEK_PORT 133config RADIO_GEMTEK_PORT
129 hex "GemTek i/o port (0x20c, 0x30c, 0x24c or 0x34c)" 134 hex "Fixed I/O port (0x20c, 0x30c, 0x24c, 0x34c, 0c24c or 0x28c)"
130 depends on RADIO_GEMTEK=y 135 depends on RADIO_GEMTEK=y
131 default "34c" 136 default "34c"
132 help 137 help
133 Enter either 0x20c, 0x30c, 0x24c or 0x34c here. The card default is 138 Enter either 0x20c, 0x30c, 0x24c or 0x34c here. The card default is
134 0x34c, if you haven't changed the jumper setting on the card. On 139 0x34c, if you haven't changed the jumper setting on the card. On
135 Sound Vision 16 Gold PnP with FM Radio (ESS1869+FM Gemtek), the I/O 140 Sound Vision 16 Gold PnP with FM Radio (ESS1869+FM Gemtek), the I/O
136 port is 0x28c. 141 port is 0x20c, 0x248 or 0x28c.
142 If automatic I/O port probing is enabled this port will be used only
143 in case of automatic probing failure, ie. as a fallback.
144
145config RADIO_GEMTEK_PROBE
146 bool "Automatic I/O port probing"
147 depends on RADIO_GEMTEK=y
148 default y
149 help
150 Say Y here to enable automatic probing for GemTek Radio card. The
151 following ports will be probed: 0x20c, 0x30c, 0x24c, 0x34c, 0x248 and
152 0x28c.
137 153
138config RADIO_GEMTEK_PCI 154config RADIO_GEMTEK_PCI
139 tristate "GemTek PCI Radio Card support" 155 tristate "GemTek PCI Radio Card support"
diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c
index eab8c80a2e47..0c963db03614 100644
--- a/drivers/media/radio/radio-gemtek.c
+++ b/drivers/media/radio/radio-gemtek.c
@@ -26,143 +26,383 @@
26#include <media/v4l2-common.h> 26#include <media/v4l2-common.h>
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28 28
29#include <linux/version.h> /* for KERNEL_VERSION MACRO */ 29#include <linux/version.h> /* for KERNEL_VERSION MACRO */
30#define RADIO_VERSION KERNEL_VERSION(0,0,2) 30#define RADIO_VERSION KERNEL_VERSION(0,0,3)
31#define RADIO_BANNER "GemTek Radio card driver: v0.0.3"
31 32
32static struct v4l2_queryctrl radio_qctrl[] = { 33/*
33 { 34 * Module info.
34 .id = V4L2_CID_AUDIO_MUTE, 35 */
35 .name = "Mute", 36
36 .minimum = 0, 37MODULE_AUTHOR("Jonas Munsin, Pekka Seppänen <pexu@kapsi.fi>");
37 .maximum = 1, 38MODULE_DESCRIPTION("A driver for the GemTek Radio card.");
38 .default_value = 1, 39MODULE_LICENSE("GPL");
39 .type = V4L2_CTRL_TYPE_BOOLEAN, 40
40 },{ 41/*
41 .id = V4L2_CID_AUDIO_VOLUME, 42 * Module params.
42 .name = "Volume", 43 */
43 .minimum = 0,
44 .maximum = 65535,
45 .step = 65535,
46 .default_value = 0xff,
47 .type = V4L2_CTRL_TYPE_INTEGER,
48 }
49};
50 44
51#ifndef CONFIG_RADIO_GEMTEK_PORT 45#ifndef CONFIG_RADIO_GEMTEK_PORT
52#define CONFIG_RADIO_GEMTEK_PORT -1 46#define CONFIG_RADIO_GEMTEK_PORT -1
53#endif 47#endif
48#ifndef CONFIG_RADIO_GEMTEK_PROBE
49#define CONFIG_RADIO_GEMTEK_PROBE 1
50#endif
54 51
55static int io = CONFIG_RADIO_GEMTEK_PORT; 52static int io = CONFIG_RADIO_GEMTEK_PORT;
56static int radio_nr = -1; 53static int probe = CONFIG_RADIO_GEMTEK_PROBE;
57static spinlock_t lock; 54static int hardmute;
55static int shutdown = 1;
56static int keepmuted = 1;
57static int initmute = 1;
58static int radio_nr = -1;
58 59
59struct gemtek_device 60module_param(io, int, 0444);
60{ 61MODULE_PARM_DESC(io, "Force I/O port for the GemTek Radio card if automatic"
61 int port; 62 "probing is disabled or fails. The most common I/O ports are: 0x20c "
62 unsigned long curfreq; 63 "0x30c, 0x24c or 0x34c (0x20c, 0x248 and 0x28c have been reported to "
64 " work for the combined sound/radiocard).");
65
66module_param(probe, bool, 0444);
67MODULE_PARM_DESC(probe, "Enable automatic device probing. Note: only the most "
68 "common I/O ports used by the card are probed.");
69
70module_param(hardmute, bool, 0644);
71MODULE_PARM_DESC(hardmute, "Enable `hard muting' by shutting down PLL, may "
72 "reduce static noise.");
73
74module_param(shutdown, bool, 0644);
75MODULE_PARM_DESC(shutdown, "Enable shutting down PLL and muting line when "
76 "module is unloaded.");
77
78module_param(keepmuted, bool, 0644);
79MODULE_PARM_DESC(keepmuted, "Keep card muted even when frequency is changed.");
80
81module_param(initmute, bool, 0444);
82MODULE_PARM_DESC(initmute, "Mute card when module is loaded.");
83
84module_param(radio_nr, int, 0444);
85
86/*
87 * Functions for controlling the card.
88 */
89#define GEMTEK_LOWFREQ (87*16000)
90#define GEMTEK_HIGHFREQ (108*16000)
91
92/*
93 * Frequency calculation constants. Intermediate frequency 10.52 MHz (nominal
94 * value 10.7 MHz), reference divisor 6.39 kHz (nominal 6.25 kHz).
95 */
96#define FSCALE 8
97#define IF_OFFSET ((unsigned int)(10.52 * 16000 * (1<<FSCALE)))
98#define REF_FREQ ((unsigned int)(6.39 * 16 * (1<<FSCALE)))
99
100#define GEMTEK_CK 0x01 /* Clock signal */
101#define GEMTEK_DA 0x02 /* Serial data */
102#define GEMTEK_CE 0x04 /* Chip enable */
103#define GEMTEK_NS 0x08 /* No signal */
104#define GEMTEK_MT 0x10 /* Line mute */
105#define GEMTEK_STDF_3_125_KHZ 0x01 /* Standard frequency 3.125 kHz */
106#define GEMTEK_PLL_OFF 0x07 /* PLL off */
107
108#define BU2614_BUS_SIZE 32 /* BU2614 / BU2614FS bus size */
109
110#define SHORT_DELAY 5 /* usec */
111#define LONG_DELAY 75 /* usec */
112
113struct gemtek_device {
114 unsigned long lastfreq;
63 int muted; 115 int muted;
116 u32 bu2614data;
64}; 117};
65 118
119#define BU2614_FREQ_BITS 16 /* D0..D15, Frequency data */
120#define BU2614_PORT_BITS 3 /* P0..P2, Output port control data */
121#define BU2614_VOID_BITS 4 /* unused */
122#define BU2614_FMES_BITS 1 /* CT, Frequency measurement beginning data */
123#define BU2614_STDF_BITS 3 /* R0..R2, Standard frequency data */
124#define BU2614_SWIN_BITS 1 /* S, Switch between FMIN / AMIN */
125#define BU2614_SWAL_BITS 1 /* PS, Swallow counter division (AMIN only)*/
126#define BU2614_VOID2_BITS 1 /* unused */
127#define BU2614_FMUN_BITS 1 /* GT, Frequency measurement time & unlock */
128#define BU2614_TEST_BITS 1 /* TS, Test data is input */
129
130#define BU2614_FREQ_SHIFT 0
131#define BU2614_PORT_SHIFT (BU2614_FREQ_BITS + BU2614_FREQ_SHIFT)
132#define BU2614_VOID_SHIFT (BU2614_PORT_BITS + BU2614_PORT_SHIFT)
133#define BU2614_FMES_SHIFT (BU2614_VOID_BITS + BU2614_VOID_SHIFT)
134#define BU2614_STDF_SHIFT (BU2614_FMES_BITS + BU2614_FMES_SHIFT)
135#define BU2614_SWIN_SHIFT (BU2614_STDF_BITS + BU2614_STDF_SHIFT)
136#define BU2614_SWAL_SHIFT (BU2614_SWIN_BITS + BU2614_SWIN_SHIFT)
137#define BU2614_VOID2_SHIFT (BU2614_SWAL_BITS + BU2614_SWAL_SHIFT)
138#define BU2614_FMUN_SHIFT (BU2614_VOID2_BITS + BU2614_VOID2_SHIFT)
139#define BU2614_TEST_SHIFT (BU2614_FMUN_BITS + BU2614_FMUN_SHIFT)
140
141#define MKMASK(field) (((1<<BU2614_##field##_BITS) - 1) << \
142 BU2614_##field##_SHIFT)
143#define BU2614_PORT_MASK MKMASK(PORT)
144#define BU2614_FREQ_MASK MKMASK(FREQ)
145#define BU2614_VOID_MASK MKMASK(VOID)
146#define BU2614_FMES_MASK MKMASK(FMES)
147#define BU2614_STDF_MASK MKMASK(STDF)
148#define BU2614_SWIN_MASK MKMASK(SWIN)
149#define BU2614_SWAL_MASK MKMASK(SWAL)
150#define BU2614_VOID2_MASK MKMASK(VOID2)
151#define BU2614_FMUN_MASK MKMASK(FMUN)
152#define BU2614_TEST_MASK MKMASK(TEST)
66 153
67/* local things */ 154static struct gemtek_device gemtek_unit;
68 155
69/* the correct way to mute the gemtek may be to write the last written 156static spinlock_t lock;
70 * frequency || 0x10, but just writing 0x10 once seems to do it as well 157
158/*
159 * Set data which will be sent to BU2614FS.
71 */ 160 */
72static void gemtek_mute(struct gemtek_device *dev) 161#define gemtek_bu2614_set(dev, field, data) ((dev)->bu2614data = \
162 ((dev)->bu2614data & ~field##_MASK) | ((data) << field##_SHIFT))
163
164/*
165 * Transmit settings to BU2614FS over GemTek IC.
166 */
167static void gemtek_bu2614_transmit(struct gemtek_device *dev)
73{ 168{
74 if(dev->muted) 169 int i, bit, q, mute;
75 return; 170
76 spin_lock(&lock); 171 spin_lock(&lock);
77 outb(0x10, io); 172
173 mute = dev->muted ? GEMTEK_MT : 0x00;
174
175 outb_p(mute | GEMTEK_DA | GEMTEK_CK, io);
176 udelay(SHORT_DELAY);
177 outb_p(mute | GEMTEK_CE | GEMTEK_DA | GEMTEK_CK, io);
178 udelay(LONG_DELAY);
179
180 for (i = 0, q = dev->bu2614data; i < 32; i++, q >>= 1) {
181 bit = (q & 1) ? GEMTEK_DA : 0;
182 outb_p(mute | GEMTEK_CE | bit, io);
183 udelay(SHORT_DELAY);
184 outb_p(mute | GEMTEK_CE | bit | GEMTEK_CK, io);
185 udelay(SHORT_DELAY);
186 }
187
188 outb_p(mute | GEMTEK_DA | GEMTEK_CK, io);
189 udelay(SHORT_DELAY);
190 outb_p(mute | GEMTEK_CE | GEMTEK_DA | GEMTEK_CK, io);
191 udelay(LONG_DELAY);
192
78 spin_unlock(&lock); 193 spin_unlock(&lock);
79 dev->muted = 1;
80} 194}
81 195
82static void gemtek_unmute(struct gemtek_device *dev) 196/*
197 * Calculate divisor from FM-frequency for BU2614FS (3.125 KHz STDF expected).
198 */
199static unsigned long gemtek_convfreq(unsigned long freq)
83{ 200{
84 if(dev->muted == 0) 201 return ((freq<<FSCALE) + IF_OFFSET + REF_FREQ/2) / REF_FREQ;
202}
203
204/*
205 * Set FM-frequency.
206 */
207static void gemtek_setfreq(struct gemtek_device *dev, unsigned long freq)
208{
209
210 if (keepmuted && hardmute && dev->muted)
85 return; 211 return;
86 spin_lock(&lock); 212
87 outb(0x20, io); 213 if (freq < GEMTEK_LOWFREQ)
88 spin_unlock(&lock); 214 freq = GEMTEK_LOWFREQ;
215 else if (freq > GEMTEK_HIGHFREQ)
216 freq = GEMTEK_HIGHFREQ;
217
218 dev->lastfreq = freq;
89 dev->muted = 0; 219 dev->muted = 0;
220
221 gemtek_bu2614_set(dev, BU2614_PORT, 0);
222 gemtek_bu2614_set(dev, BU2614_FMES, 0);
223 gemtek_bu2614_set(dev, BU2614_SWIN, 0); /* FM-mode */
224 gemtek_bu2614_set(dev, BU2614_SWAL, 0);
225 gemtek_bu2614_set(dev, BU2614_FMUN, 1); /* GT bit set */
226 gemtek_bu2614_set(dev, BU2614_TEST, 0);
227
228 gemtek_bu2614_set(dev, BU2614_STDF, GEMTEK_STDF_3_125_KHZ);
229 gemtek_bu2614_set(dev, BU2614_FREQ, gemtek_convfreq(freq));
230
231 gemtek_bu2614_transmit(dev);
90} 232}
91 233
92static void zero(void) 234/*
235 * Set mute flag.
236 */
237static void gemtek_mute(struct gemtek_device *dev)
93{ 238{
94 outb_p(0x04, io); 239 int i;
95 udelay(5); 240 dev->muted = 1;
96 outb_p(0x05, io); 241
97 udelay(5); 242 if (hardmute) {
243 /* Turn off PLL, disable data output */
244 gemtek_bu2614_set(dev, BU2614_PORT, 0);
245 gemtek_bu2614_set(dev, BU2614_FMES, 0); /* CT bit off */
246 gemtek_bu2614_set(dev, BU2614_SWIN, 0); /* FM-mode */
247 gemtek_bu2614_set(dev, BU2614_SWAL, 0);
248 gemtek_bu2614_set(dev, BU2614_FMUN, 0); /* GT bit off */
249 gemtek_bu2614_set(dev, BU2614_TEST, 0);
250 gemtek_bu2614_set(dev, BU2614_STDF, GEMTEK_PLL_OFF);
251 gemtek_bu2614_set(dev, BU2614_FREQ, 0);
252 gemtek_bu2614_transmit(dev);
253 } else {
254 spin_lock(&lock);
255
256 /* Read bus contents (CE, CK and DA). */
257 i = inb_p(io);
258 /* Write it back with mute flag set. */
259 outb_p((i >> 5) | GEMTEK_MT, io);
260 udelay(SHORT_DELAY);
261
262 spin_unlock(&lock);
263 }
98} 264}
99 265
100static void one(void) 266/*
267 * Unset mute flag.
268 */
269static void gemtek_unmute(struct gemtek_device *dev)
101{ 270{
102 outb_p(0x06, io); 271 int i;
103 udelay(5); 272 dev->muted = 0;
104 outb_p(0x07, io); 273
105 udelay(5); 274 if (hardmute) {
275 /* Turn PLL back on. */
276 gemtek_setfreq(dev, dev->lastfreq);
277 } else {
278 spin_lock(&lock);
279
280 i = inb_p(io);
281 outb_p(i >> 5, io);
282 udelay(SHORT_DELAY);
283
284 spin_unlock(&lock);
285 }
106} 286}
107 287
108static int gemtek_setfreq(struct gemtek_device *dev, unsigned long freq) 288/*
289 * Get signal strength (= stereo status).
290 */
291static inline int gemtek_getsigstr(void)
109{ 292{
110 int i; 293 return inb_p(io) & GEMTEK_NS ? 0 : 1;
294}
111 295
112/* freq = 78.25*((float)freq/16000.0 + 10.52); */ 296/*
297 * Check if requested card acts like GemTek Radio card.
298 */
299static int gemtek_verify(int port)
300{
301 static int verified = -1;
302 int i, q;
113 303
114 freq /= 16; 304 if (verified == port)
115 freq += 10520; 305 return 1;
116 freq *= 7825;
117 freq /= 100000;
118 306
119 spin_lock(&lock); 307 spin_lock(&lock);
120 308
121 /* 2 start bits */ 309 q = inb_p(port); /* Read bus contents before probing. */
122 outb_p(0x03, io); 310 /* Try to turn on CE, CK and DA respectively and check if card responds
123 udelay(5); 311 properly. */
124 outb_p(0x07, io); 312 for (i = 0; i < 3; ++i) {
125 udelay(5); 313 outb_p(1 << i, port);
314 udelay(SHORT_DELAY);
126 315
127 /* 28 frequency bits (lsb first) */ 316 if ((inb_p(port) & (~GEMTEK_NS)) != (0x17 | (1 << (i + 5)))) {
128 for (i = 0; i < 14; i++) 317 spin_unlock(&lock);
129 if (freq & (1 << i)) 318 return 0;
130 one(); 319 }
131 else 320 }
132 zero(); 321 outb_p(q >> 5, port); /* Write bus contents back. */
133 /* 36 unknown bits */ 322 udelay(SHORT_DELAY);
134 for (i = 0; i < 11; i++)
135 zero();
136 one();
137 for (i = 0; i < 4; i++)
138 zero();
139 one();
140 zero();
141
142 /* 2 end bits */
143 outb_p(0x03, io);
144 udelay(5);
145 outb_p(0x07, io);
146 udelay(5);
147 323
148 spin_unlock(&lock); 324 spin_unlock(&lock);
325 verified = port;
149 326
150 return 0; 327 return 1;
151} 328}
152 329
153static int gemtek_getsigstr(struct gemtek_device *dev) 330/*
331 * Automatic probing for card.
332 */
333static int gemtek_probe(void)
154{ 334{
155 spin_lock(&lock); 335 int ioports[] = { 0x20c, 0x30c, 0x24c, 0x34c, 0x248, 0x28c };
156 inb(io); 336 int i;
157 udelay(5); 337
158 spin_unlock(&lock); 338 if (!probe) {
159 if (inb(io) & 8) /* bit set = no signal present */ 339 printk(KERN_INFO "Automatic device probing disabled.\n");
160 return 0; 340 return -1;
161 return 1; /* signal present */ 341 }
342
343 printk(KERN_INFO "Automatic device probing enabled.\n");
344
345 for (i = 0; i < ARRAY_SIZE(ioports); ++i) {
346 printk(KERN_INFO "Trying I/O port 0x%x...\n", ioports[i]);
347
348 if (!request_region(ioports[i], 1, "gemtek-probe")) {
349 printk(KERN_WARNING "I/O port 0x%x busy!\n",
350 ioports[i]);
351 continue;
352 }
353
354 if (gemtek_verify(ioports[i])) {
355 printk(KERN_INFO "Card found from I/O port "
356 "0x%x!\n", ioports[i]);
357
358 release_region(ioports[i], 1);
359
360 io = ioports[i];
361 return io;
362 }
363
364 release_region(ioports[i], 1);
365 }
366
367 printk(KERN_ERR "Automatic probing failed!\n");
368
369 return -1;
162} 370}
163 371
164static int vidioc_querycap(struct file *file, void *priv, 372/*
165 struct v4l2_capability *v) 373 * Video 4 Linux stuff.
374 */
375
376static struct v4l2_queryctrl radio_qctrl[] = {
377 {
378 .id = V4L2_CID_AUDIO_MUTE,
379 .name = "Mute",
380 .minimum = 0,
381 .maximum = 1,
382 .default_value = 1,
383 .type = V4L2_CTRL_TYPE_BOOLEAN,
384 }, {
385 .id = V4L2_CID_AUDIO_VOLUME,
386 .name = "Volume",
387 .minimum = 0,
388 .maximum = 65535,
389 .step = 65535,
390 .default_value = 0xff,
391 .type = V4L2_CTRL_TYPE_INTEGER,
392 }
393};
394
395static struct file_operations gemtek_fops = {
396 .owner = THIS_MODULE,
397 .open = video_exclusive_open,
398 .release = video_exclusive_release,
399 .ioctl = video_ioctl2,
400 .compat_ioctl = v4l_compat_ioctl32,
401 .llseek = no_llseek
402};
403
404static int vidioc_querycap(struct file *file, void *priv,
405 struct v4l2_capability *v)
166{ 406{
167 strlcpy(v->driver, "radio-gemtek", sizeof(v->driver)); 407 strlcpy(v->driver, "radio-gemtek", sizeof(v->driver));
168 strlcpy(v->card, "GemTek", sizeof(v->card)); 408 strlcpy(v->card, "GemTek", sizeof(v->card));
@@ -172,28 +412,29 @@ static int vidioc_querycap(struct file *file, void *priv,
172 return 0; 412 return 0;
173} 413}
174 414
175static int vidioc_g_tuner(struct file *file, void *priv, 415static int vidioc_g_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
176 struct v4l2_tuner *v)
177{ 416{
178 struct video_device *dev = video_devdata(file);
179 struct gemtek_device *rt = dev->priv;
180
181 if (v->index > 0) 417 if (v->index > 0)
182 return -EINVAL; 418 return -EINVAL;
183 419
184 strcpy(v->name, "FM"); 420 strcpy(v->name, "FM");
185 v->type = V4L2_TUNER_RADIO; 421 v->type = V4L2_TUNER_RADIO;
186 v->rangelow = (87*16000); 422 v->rangelow = GEMTEK_LOWFREQ;
187 v->rangehigh = (108*16000); 423 v->rangehigh = GEMTEK_HIGHFREQ;
188 v->rxsubchans = V4L2_TUNER_SUB_MONO; 424 v->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;
189 v->capability = V4L2_TUNER_CAP_LOW; 425 v->signal = 0xffff * gemtek_getsigstr();
190 v->audmode = V4L2_TUNER_MODE_MONO; 426 if (v->signal) {
191 v->signal = 0xffff*gemtek_getsigstr(rt); 427 v->audmode = V4L2_TUNER_MODE_STEREO;
428 v->rxsubchans = V4L2_TUNER_SUB_STEREO;
429 } else {
430 v->audmode = V4L2_TUNER_MODE_MONO;
431 v->rxsubchans = V4L2_TUNER_SUB_MONO;
432 }
433
192 return 0; 434 return 0;
193} 435}
194 436
195static int vidioc_s_tuner(struct file *file, void *priv, 437static int vidioc_s_tuner(struct file *file, void *priv, struct v4l2_tuner *v)
196 struct v4l2_tuner *v)
197{ 438{
198 if (v->index > 0) 439 if (v->index > 0)
199 return -EINVAL; 440 return -EINVAL;
@@ -201,38 +442,35 @@ static int vidioc_s_tuner(struct file *file, void *priv,
201} 442}
202 443
203static int vidioc_s_frequency(struct file *file, void *priv, 444static int vidioc_s_frequency(struct file *file, void *priv,
204 struct v4l2_frequency *f) 445 struct v4l2_frequency *f)
205{ 446{
206 struct video_device *dev = video_devdata(file); 447 struct video_device *dev = video_devdata(file);
207 struct gemtek_device *rt = dev->priv; 448 struct gemtek_device *rt = dev->priv;
208 449
209 rt->curfreq = f->frequency; 450 gemtek_setfreq(rt, f->frequency);
210 /* needs to be called twice in order for getsigstr to work */ 451
211 gemtek_setfreq(rt, rt->curfreq);
212 gemtek_setfreq(rt, rt->curfreq);
213 return 0; 452 return 0;
214} 453}
215 454
216static int vidioc_g_frequency(struct file *file, void *priv, 455static int vidioc_g_frequency(struct file *file, void *priv,
217 struct v4l2_frequency *f) 456 struct v4l2_frequency *f)
218{ 457{
219 struct video_device *dev = video_devdata(file); 458 struct video_device *dev = video_devdata(file);
220 struct gemtek_device *rt = dev->priv; 459 struct gemtek_device *rt = dev->priv;
221 460
222 f->type = V4L2_TUNER_RADIO; 461 f->type = V4L2_TUNER_RADIO;
223 f->frequency = rt->curfreq; 462 f->frequency = rt->lastfreq;
224 return 0; 463 return 0;
225} 464}
226 465
227static int vidioc_queryctrl(struct file *file, void *priv, 466static int vidioc_queryctrl(struct file *file, void *priv,
228 struct v4l2_queryctrl *qc) 467 struct v4l2_queryctrl *qc)
229{ 468{
230 int i; 469 int i;
231 470
232 for (i = 0; i < ARRAY_SIZE(radio_qctrl); i++) { 471 for (i = 0; i < ARRAY_SIZE(radio_qctrl); ++i) {
233 if (qc->id && qc->id == radio_qctrl[i].id) { 472 if (qc->id && qc->id == radio_qctrl[i].id) {
234 memcpy(qc, &(radio_qctrl[i]), 473 memcpy(qc, &(radio_qctrl[i]), sizeof(*qc));
235 sizeof(*qc));
236 return 0; 474 return 0;
237 } 475 }
238 } 476 }
@@ -240,7 +478,7 @@ static int vidioc_queryctrl(struct file *file, void *priv,
240} 478}
241 479
242static int vidioc_g_ctrl(struct file *file, void *priv, 480static int vidioc_g_ctrl(struct file *file, void *priv,
243 struct v4l2_control *ctrl) 481 struct v4l2_control *ctrl)
244{ 482{
245 struct video_device *dev = video_devdata(file); 483 struct video_device *dev = video_devdata(file);
246 struct gemtek_device *rt = dev->priv; 484 struct gemtek_device *rt = dev->priv;
@@ -260,7 +498,7 @@ static int vidioc_g_ctrl(struct file *file, void *priv,
260} 498}
261 499
262static int vidioc_s_ctrl(struct file *file, void *priv, 500static int vidioc_s_ctrl(struct file *file, void *priv,
263 struct v4l2_control *ctrl) 501 struct v4l2_control *ctrl)
264{ 502{
265 struct video_device *dev = video_devdata(file); 503 struct video_device *dev = video_devdata(file);
266 struct gemtek_device *rt = dev->priv; 504 struct gemtek_device *rt = dev->priv;
@@ -282,8 +520,7 @@ static int vidioc_s_ctrl(struct file *file, void *priv,
282 return -EINVAL; 520 return -EINVAL;
283} 521}
284 522
285static int vidioc_g_audio (struct file *file, void *priv, 523static int vidioc_g_audio(struct file *file, void *priv, struct v4l2_audio *a)
286 struct v4l2_audio *a)
287{ 524{
288 if (a->index > 1) 525 if (a->index > 1)
289 return -EINVAL; 526 return -EINVAL;
@@ -306,99 +543,102 @@ static int vidioc_s_input(struct file *filp, void *priv, unsigned int i)
306 return 0; 543 return 0;
307} 544}
308 545
309static int vidioc_s_audio(struct file *file, void *priv, 546static int vidioc_s_audio(struct file *file, void *priv, struct v4l2_audio *a)
310 struct v4l2_audio *a)
311{ 547{
312 if (a->index != 0) 548 if (a->index != 0)
313 return -EINVAL; 549 return -EINVAL;
314 return 0; 550 return 0;
315} 551}
316 552
317static struct gemtek_device gemtek_unit; 553static struct video_device gemtek_radio = {
318 554 .owner = THIS_MODULE,
319static const struct file_operations gemtek_fops = { 555 .name = "GemTek Radio card",
320 .owner = THIS_MODULE, 556 .type = VID_TYPE_TUNER,
321 .open = video_exclusive_open, 557 .hardware = VID_HARDWARE_GEMTEK,
322 .release = video_exclusive_release, 558 .fops = &gemtek_fops,
323 .ioctl = video_ioctl2, 559 .vidioc_querycap = vidioc_querycap,
324 .compat_ioctl = v4l_compat_ioctl32, 560 .vidioc_g_tuner = vidioc_g_tuner,
325 .llseek = no_llseek, 561 .vidioc_s_tuner = vidioc_s_tuner,
562 .vidioc_g_audio = vidioc_g_audio,
563 .vidioc_s_audio = vidioc_s_audio,
564 .vidioc_g_input = vidioc_g_input,
565 .vidioc_s_input = vidioc_s_input,
566 .vidioc_g_frequency = vidioc_g_frequency,
567 .vidioc_s_frequency = vidioc_s_frequency,
568 .vidioc_queryctrl = vidioc_queryctrl,
569 .vidioc_g_ctrl = vidioc_g_ctrl,
570 .vidioc_s_ctrl = vidioc_s_ctrl
326}; 571};
327 572
328static struct video_device gemtek_radio= 573/*
329{ 574 * Initialization / cleanup related stuff.
330 .owner = THIS_MODULE, 575 */
331 .name = "GemTek radio",
332 .type = VID_TYPE_TUNER,
333 .fops = &gemtek_fops,
334 .vidioc_querycap = vidioc_querycap,
335 .vidioc_g_tuner = vidioc_g_tuner,
336 .vidioc_s_tuner = vidioc_s_tuner,
337 .vidioc_g_audio = vidioc_g_audio,
338 .vidioc_s_audio = vidioc_s_audio,
339 .vidioc_g_input = vidioc_g_input,
340 .vidioc_s_input = vidioc_s_input,
341 .vidioc_g_frequency = vidioc_g_frequency,
342 .vidioc_s_frequency = vidioc_s_frequency,
343 .vidioc_queryctrl = vidioc_queryctrl,
344 .vidioc_g_ctrl = vidioc_g_ctrl,
345 .vidioc_s_ctrl = vidioc_s_ctrl,
346};
347 576
577/*
578 * Initilize card.
579 */
348static int __init gemtek_init(void) 580static int __init gemtek_init(void)
349{ 581{
350 if(io==-1) 582 printk(KERN_INFO RADIO_BANNER "\n");
351 {
352 printk(KERN_ERR "You must set an I/O address with io=0x20c, io=0x30c, io=0x24c or io=0x34c (io=0x020c or io=0x248 for the combined sound/radiocard)\n");
353 return -EINVAL;
354 }
355 583
356 if (!request_region(io, 4, "gemtek")) 584 spin_lock_init(&lock);
357 {
358 printk(KERN_ERR "gemtek: port 0x%x already in use\n", io);
359 return -EBUSY;
360 }
361 585
362 gemtek_radio.priv=&gemtek_unit; 586 gemtek_probe();
587 if (io) {
588 if (!request_region(io, 1, "gemtek")) {
589 printk(KERN_ERR "I/O port 0x%x already in use.\n", io);
590 return -EBUSY;
591 }
363 592
364 if(video_register_device(&gemtek_radio, VFL_TYPE_RADIO, radio_nr)==-1) 593 if (!gemtek_verify(io))
365 { 594 printk(KERN_WARNING "Card at I/O port 0x%x does not "
366 release_region(io, 4); 595 "respond properly, check your "
596 "configuration.\n", io);
597 else
598 printk(KERN_INFO "Using I/O port 0x%x.\n", io);
599 } else if (probe) {
600 printk(KERN_ERR "Automatic probing failed and no "
601 "fixed I/O port defined.\n");
602 return -ENODEV;
603 } else {
604 printk(KERN_ERR "Automatic probing disabled but no fixed "
605 "I/O port defined.");
367 return -EINVAL; 606 return -EINVAL;
368 } 607 }
369 printk(KERN_INFO "GemTek Radio Card driver.\n");
370 608
371 spin_lock_init(&lock); 609 gemtek_radio.priv = &gemtek_unit;
372 610
373 /* this is _maybe_ unnecessary */ 611 if (video_register_device(&gemtek_radio, VFL_TYPE_RADIO,
374 outb(0x01, io); 612 radio_nr) == -1) {
613 release_region(io, 1);
614 return -EBUSY;
615 }
375 616
376 /* mute card - prevents noisy bootups */ 617 /* Set defaults */
377 gemtek_unit.muted = 0; 618 gemtek_unit.lastfreq = GEMTEK_LOWFREQ;
378 gemtek_mute(&gemtek_unit); 619 gemtek_unit.bu2614data = 0;
620
621 if (initmute)
622 gemtek_mute(&gemtek_unit);
379 623
380 return 0; 624 return 0;
381} 625}
382 626
383MODULE_AUTHOR("Jonas Munsin"); 627/*
384MODULE_DESCRIPTION("A driver for the GemTek Radio Card"); 628 * Module cleanup
385MODULE_LICENSE("GPL"); 629 */
386 630static void __exit gemtek_exit(void)
387module_param(io, int, 0);
388MODULE_PARM_DESC(io, "I/O address of the GemTek card (0x20c, 0x30c, 0x24c or 0x34c (0x20c or 0x248 have been reported to work for the combined sound/radiocard)).");
389module_param(radio_nr, int, 0);
390
391static void __exit gemtek_cleanup(void)
392{ 631{
632 if (shutdown) {
633 hardmute = 1; /* Turn off PLL */
634 gemtek_mute(&gemtek_unit);
635 } else {
636 printk(KERN_INFO "Module unloaded but card not muted!\n");
637 }
638
393 video_unregister_device(&gemtek_radio); 639 video_unregister_device(&gemtek_radio);
394 release_region(io,4); 640 release_region(io, 1);
395} 641}
396 642
397module_init(gemtek_init); 643module_init(gemtek_init);
398module_exit(gemtek_cleanup); 644module_exit(gemtek_exit);
399
400/*
401 Local variables:
402 compile-command: "gcc -c -DMODVERSIONS -D__KERNEL__ -DMODULE -O6 -Wall -Wstrict-prototypes -I /home/blp/tmp/linux-2.1.111-rtrack/include radio-rtrack2.c"
403 End:
404*/
diff --git a/drivers/media/radio/radio-terratec.c b/drivers/media/radio/radio-terratec.c
index 7e1911c3d54e..535ffe8c8102 100644
--- a/drivers/media/radio/radio-terratec.c
+++ b/drivers/media/radio/radio-terratec.c
@@ -173,7 +173,7 @@ static int tt_setfreq(struct tt_device *dev, unsigned long freq1)
173 i--; 173 i--;
174 p--; 174 p--;
175 temp = temp/2; 175 temp = temp/2;
176 } 176 }
177 177
178 spin_lock(&lock); 178 spin_lock(&lock);
179 179
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index e204e7b4028a..2e571eb9313a 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -148,6 +148,15 @@ config VIDEO_WM8739
148 To compile this driver as a module, choose M here: the 148 To compile this driver as a module, choose M here: the
149 module will be called wm8739. 149 module will be called wm8739.
150 150
151config VIDEO_VP27SMPX
152 tristate "Panasonic VP27s internal MPX"
153 depends on VIDEO_V4L2 && I2C && EXPERIMENTAL
154 ---help---
155 Support for the internal MPX of the Panasonic VP27s tuner.
156
157 To compile this driver as a module, choose M here: the
158 module will be called vp27smpx.
159
151comment "Video decoders" 160comment "Video decoders"
152 161
153config VIDEO_BT819 162config VIDEO_BT819
@@ -197,6 +206,13 @@ config VIDEO_OV7670
197 OV7670 VGA camera. It currently only works with the M88ALP01 206 OV7670 VGA camera. It currently only works with the M88ALP01
198 controller. 207 controller.
199 208
209config VIDEO_TCM825X
210 tristate "TCM825x camera sensor support"
211 depends on I2C && VIDEO_V4L2
212 ---help---
213 This is a driver for the Toshiba TCM825x VGA camera sensor.
214 It is used for example in Nokia N800.
215
200config VIDEO_SAA7110 216config VIDEO_SAA7110
201 tristate "Philips SAA7110 video decoder" 217 tristate "Philips SAA7110 video decoder"
202 depends on VIDEO_V4L1 && I2C 218 depends on VIDEO_V4L1 && I2C
@@ -348,7 +364,7 @@ endmenu # encoder / decoder chips
348config VIDEO_VIVI 364config VIDEO_VIVI
349 tristate "Virtual Video Driver" 365 tristate "Virtual Video Driver"
350 depends on VIDEO_V4L2 && !SPARC32 && !SPARC64 && PCI 366 depends on VIDEO_V4L2 && !SPARC32 && !SPARC64 && PCI
351 select VIDEO_BUF 367 select VIDEOBUF_VMALLOC
352 default n 368 default n
353 ---help--- 369 ---help---
354 Enables a virtual video driver. This device shows a color bar 370 Enables a virtual video driver. This device shows a color bar
@@ -489,15 +505,6 @@ config TUNER_3036
489 Say Y here to include support for Philips SAB3036 compatible tuners. 505 Say Y here to include support for Philips SAB3036 compatible tuners.
490 If in doubt, say N. 506 If in doubt, say N.
491 507
492config TUNER_TEA5761
493 bool "TEA 5761 radio tuner (EXPERIMENTAL)"
494 depends on EXPERIMENTAL
495 depends on I2C
496 select VIDEO_TUNER
497 help
498 Say Y here to include support for Philips TEA5761 radio tuner.
499 If in doubt, say N.
500
501config VIDEO_VINO 508config VIDEO_VINO
502 tristate "SGI Vino Video For Linux (EXPERIMENTAL)" 509 tristate "SGI Vino Video For Linux (EXPERIMENTAL)"
503 depends on I2C && SGI_IP22 && EXPERIMENTAL && VIDEO_V4L2 510 depends on I2C && SGI_IP22 && EXPERIMENTAL && VIDEO_V4L2
@@ -661,6 +668,8 @@ config VIDEO_HEXIUM_GEMINI
661 668
662source "drivers/media/video/cx88/Kconfig" 669source "drivers/media/video/cx88/Kconfig"
663 670
671source "drivers/media/video/cx23885/Kconfig"
672
664source "drivers/media/video/ivtv/Kconfig" 673source "drivers/media/video/ivtv/Kconfig"
665 674
666config VIDEO_M32R_AR 675config VIDEO_M32R_AR
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 10b4d4469016..b5a064163e03 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -4,14 +4,12 @@
4 4
5zr36067-objs := zoran_procfs.o zoran_device.o \ 5zr36067-objs := zoran_procfs.o zoran_device.o \
6 zoran_driver.o zoran_card.o 6 zoran_driver.o zoran_card.o
7tuner-objs := tuner-core.o tuner-types.o tuner-simple.o \ 7tuner-objs := tuner-core.o tuner-types.o tda9887.o
8 mt20xx.o tda8290.o tea5767.o tda9887.o
9
10tuner-$(CONFIG_TUNER_TEA5761) += tea5761.o
11 8
12msp3400-objs := msp3400-driver.o msp3400-kthreads.o 9msp3400-objs := msp3400-driver.o msp3400-kthreads.o
13 10
14obj-$(CONFIG_VIDEO_DEV) += videodev.o v4l2-common.o compat_ioctl32.o 11obj-$(CONFIG_VIDEO_DEV) += videodev.o v4l2-common.o compat_ioctl32.o \
12 v4l2-int-device.o
15 13
16ifeq ($(CONFIG_VIDEO_V4L1_COMPAT),y) 14ifeq ($(CONFIG_VIDEO_V4L1_COMPAT),y)
17 obj-$(CONFIG_VIDEO_DEV) += v4l1-compat.o 15 obj-$(CONFIG_VIDEO_DEV) += v4l1-compat.o
@@ -63,7 +61,6 @@ obj-$(CONFIG_VIDEO_CPIA_USB) += cpia_usb.o
63obj-$(CONFIG_VIDEO_MEYE) += meye.o 61obj-$(CONFIG_VIDEO_MEYE) += meye.o
64obj-$(CONFIG_VIDEO_SAA7134) += saa7134/ 62obj-$(CONFIG_VIDEO_SAA7134) += saa7134/
65obj-$(CONFIG_VIDEO_CX88) += cx88/ 63obj-$(CONFIG_VIDEO_CX88) += cx88/
66obj-$(CONFIG_VIDEO_IVTV) += ivtv/
67obj-$(CONFIG_VIDEO_EM28XX) += em28xx/ 64obj-$(CONFIG_VIDEO_EM28XX) += em28xx/
68obj-$(CONFIG_VIDEO_USBVISION) += usbvision/ 65obj-$(CONFIG_VIDEO_USBVISION) += usbvision/
69obj-$(CONFIG_VIDEO_TVP5150) += tvp5150.o 66obj-$(CONFIG_VIDEO_TVP5150) += tvp5150.o
@@ -73,6 +70,7 @@ obj-$(CONFIG_VIDEO_CS53L32A) += cs53l32a.o
73obj-$(CONFIG_VIDEO_TLV320AIC23B) += tlv320aic23b.o 70obj-$(CONFIG_VIDEO_TLV320AIC23B) += tlv320aic23b.o
74obj-$(CONFIG_VIDEO_WM8775) += wm8775.o 71obj-$(CONFIG_VIDEO_WM8775) += wm8775.o
75obj-$(CONFIG_VIDEO_WM8739) += wm8739.o 72obj-$(CONFIG_VIDEO_WM8739) += wm8739.o
73obj-$(CONFIG_VIDEO_VP27SMPX) += vp27smpx.o
76obj-$(CONFIG_VIDEO_OVCAMCHIP) += ovcamchip/ 74obj-$(CONFIG_VIDEO_OVCAMCHIP) += ovcamchip/
77obj-$(CONFIG_VIDEO_CPIA2) += cpia2/ 75obj-$(CONFIG_VIDEO_CPIA2) += cpia2/
78obj-$(CONFIG_VIDEO_MXB) += mxb.o 76obj-$(CONFIG_VIDEO_MXB) += mxb.o
@@ -82,8 +80,17 @@ obj-$(CONFIG_VIDEO_DPC) += dpc7146.o
82obj-$(CONFIG_TUNER_3036) += tuner-3036.o 80obj-$(CONFIG_TUNER_3036) += tuner-3036.o
83 81
84obj-$(CONFIG_VIDEO_TUNER) += tuner.o 82obj-$(CONFIG_VIDEO_TUNER) += tuner.o
85obj-$(CONFIG_VIDEO_BUF) += video-buf.o 83
86obj-$(CONFIG_VIDEO_BUF_DVB) += video-buf-dvb.o 84obj-$(CONFIG_TUNER_SIMPLE) += tuner-simple.o
85obj-$(CONFIG_TUNER_MT20XX) += mt20xx.o
86obj-$(CONFIG_TUNER_TDA8290) += tda8290.o
87obj-$(CONFIG_TUNER_TEA5767) += tea5767.o
88obj-$(CONFIG_TUNER_TEA5761) += tea5761.o
89
90obj-$(CONFIG_VIDEOBUF_GEN) += videobuf-core.o
91obj-$(CONFIG_VIDEOBUF_DMA_SG) += videobuf-dma-sg.o
92obj-$(CONFIG_VIDEOBUF_VMALLOC) += videobuf-vmalloc.o
93obj-$(CONFIG_VIDEOBUF_DVB) += videobuf-dvb.o
87obj-$(CONFIG_VIDEO_BTCX) += btcx-risc.o 94obj-$(CONFIG_VIDEO_BTCX) += btcx-risc.o
88obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o 95obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o
89 96
@@ -97,6 +104,8 @@ obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o
97obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o 104obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o
98obj-$(CONFIG_VIDEO_OV7670) += ov7670.o 105obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
99 106
107obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
108
100obj-$(CONFIG_USB_DABUSB) += dabusb.o 109obj-$(CONFIG_USB_DABUSB) += dabusb.o
101obj-$(CONFIG_USB_OV511) += ov511.o 110obj-$(CONFIG_USB_OV511) += ov511.o
102obj-$(CONFIG_USB_SE401) += se401.o 111obj-$(CONFIG_USB_SE401) += se401.o
@@ -114,6 +123,9 @@ obj-$(CONFIG_USB_KONICAWC) += usbvideo/
114obj-$(CONFIG_USB_VICAM) += usbvideo/ 123obj-$(CONFIG_USB_VICAM) += usbvideo/
115obj-$(CONFIG_USB_QUICKCAM_MESSENGER) += usbvideo/ 124obj-$(CONFIG_USB_QUICKCAM_MESSENGER) += usbvideo/
116 125
126obj-$(CONFIG_VIDEO_IVTV) += ivtv/
127
117obj-$(CONFIG_VIDEO_VIVI) += vivi.o 128obj-$(CONFIG_VIDEO_VIVI) += vivi.o
129obj-$(CONFIG_VIDEO_CX23885) += cx23885/
118 130
119EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core 131EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c
index 649f52f9ad27..19e9929ffa0f 100644
--- a/drivers/media/video/arv.c
+++ b/drivers/media/video/arv.c
@@ -23,7 +23,6 @@
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/mm.h> 28#include <linux/mm.h>
@@ -442,7 +441,7 @@ static int ar_do_ioctl(struct inode *inode, struct file *file,
442 { 441 {
443 struct video_window *w = arg; 442 struct video_window *w = arg;
444 DEBUG(1, "VIDIOCGWIN:\n"); 443 DEBUG(1, "VIDIOCGWIN:\n");
445 memset(w, 0, sizeof(w)); 444 memset(w, 0, sizeof(*w));
446 w->width = ar->width; 445 w->width = ar->width;
447 w->height = ar->height; 446 w->height = ar->height;
448 return 0; 447 return 0;
diff --git a/drivers/media/video/bt8xx/Kconfig b/drivers/media/video/bt8xx/Kconfig
index 58eae887a629..2ca162b390a2 100644
--- a/drivers/media/video/bt8xx/Kconfig
+++ b/drivers/media/video/bt8xx/Kconfig
@@ -4,7 +4,7 @@ config VIDEO_BT848
4 select I2C_ALGOBIT 4 select I2C_ALGOBIT
5 select FW_LOADER 5 select FW_LOADER
6 select VIDEO_BTCX 6 select VIDEO_BTCX
7 select VIDEO_BUF 7 select VIDEOBUF_DMA_SG
8 select VIDEO_IR 8 select VIDEO_IR
9 select VIDEO_TUNER 9 select VIDEO_TUNER
10 select VIDEO_TVEEPROM 10 select VIDEO_TVEEPROM
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index f6715007d409..dd6a7d68b07f 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -27,7 +27,6 @@
27 27
28#include <linux/delay.h> 28#include <linux/delay.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/kmod.h> 30#include <linux/kmod.h>
32#include <linux/init.h> 31#include <linux/init.h>
33#include <linux/pci.h> 32#include <linux/pci.h>
@@ -2989,6 +2988,23 @@ struct tvcard bttv_tvcards[] = {
2989 .no_tda9875 = 1, 2988 .no_tda9875 = 1,
2990 .no_tda7432 = 1, 2989 .no_tda7432 = 1,
2991 }, 2990 },
2991 /* ---- card 0x95---------------------------------- */
2992 [BTTV_BOARD_TYPHOON_TVTUNERPCI] = {
2993 .name = "Typhoon TV-Tuner PCI (50684)",
2994 .video_inputs = 3,
2995 .audio_inputs = 1,
2996 .tuner = 0,
2997 .svhs = 2,
2998 .gpiomask = 0x3014f,
2999 .muxsel = { 2, 3, 1, 1 },
3000 .gpiomux = { 0x20001,0x10001, 0, 0 },
3001 .gpiomute = 10,
3002 .needs_tvaudio = 1,
3003 .pll = PLL_28,
3004 .tuner_type = TUNER_PHILIPS_PAL_I,
3005 .tuner_addr = ADDR_UNSET,
3006 .radio_addr = ADDR_UNSET,
3007 },
2992}; 3008};
2993 3009
2994static const unsigned int bttv_num_tvcards = ARRAY_SIZE(bttv_tvcards); 3010static const unsigned int bttv_num_tvcards = ARRAY_SIZE(bttv_tvcards);
@@ -3276,15 +3292,15 @@ static void eagle_muxsel(struct bttv *btv, unsigned int input)
3276 btaor((2)<<5, ~(3<<5), BT848_IFORM); 3292 btaor((2)<<5, ~(3<<5), BT848_IFORM);
3277 gpio_bits(3,bttv_tvcards[btv->c.type].muxsel[input&7]); 3293 gpio_bits(3,bttv_tvcards[btv->c.type].muxsel[input&7]);
3278 3294
3279 /* composite */ 3295 /* composite */
3280 /* set chroma ADC to sleep */ 3296 /* set chroma ADC to sleep */
3281 btor(BT848_ADC_C_SLEEP, BT848_ADC); 3297 btor(BT848_ADC_C_SLEEP, BT848_ADC);
3282 /* set to composite video */ 3298 /* set to composite video */
3283 btand(~BT848_CONTROL_COMP, BT848_E_CONTROL); 3299 btand(~BT848_CONTROL_COMP, BT848_E_CONTROL);
3284 btand(~BT848_CONTROL_COMP, BT848_O_CONTROL); 3300 btand(~BT848_CONTROL_COMP, BT848_O_CONTROL);
3285 3301
3286 /* switch sync drive off */ 3302 /* switch sync drive off */
3287 gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE); 3303 gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);
3288} 3304}
3289 3305
3290static void gvc1100_muxsel(struct bttv *btv, unsigned int input) 3306static void gvc1100_muxsel(struct bttv *btv, unsigned int input)
@@ -3453,7 +3469,7 @@ void __devinit bttv_init_card2(struct bttv *btv)
3453 printk("bttv%d: radio detected by subsystem id (CPH05x)\n",btv->c.nr); 3469 printk("bttv%d: radio detected by subsystem id (CPH05x)\n",btv->c.nr);
3454 } 3470 }
3455 break; 3471 break;
3456 case BTTV_BOARD_STB2: 3472 case BTTV_BOARD_STB2:
3457 if (btv->cardid == 0x3060121a) { 3473 if (btv->cardid == 0x3060121a) {
3458 /* Fix up entry for 3DFX VoodooTV 100, 3474 /* Fix up entry for 3DFX VoodooTV 100,
3459 which is an OEM STB card variant. */ 3475 which is an OEM STB card variant. */
@@ -3784,7 +3800,7 @@ static void __devinit osprey_eeprom(struct bttv *btv, const u8 ee[256])
3784 for (i = 12; i < 21; i++) 3800 for (i = 12; i < 21; i++)
3785 serial *= 10, serial += ee[i] - '0'; 3801 serial *= 10, serial += ee[i] - '0';
3786 } 3802 }
3787 } else { 3803 } else {
3788 unsigned short type; 3804 unsigned short type;
3789 3805
3790 for (i = 4*16; i < 8*16; i += 16) { 3806 for (i = 4*16; i < 8*16; i += 16) {
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index cb555f2c40f9..7a332b3efe51 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -30,7 +30,6 @@
30 30
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/delay.h> 33#include <linux/delay.h>
35#include <linux/errno.h> 34#include <linux/errno.h>
36#include <linux/fs.h> 35#include <linux/fs.h>
@@ -155,13 +154,14 @@ MODULE_LICENSE("GPL");
155/* ----------------------------------------------------------------------- */ 154/* ----------------------------------------------------------------------- */
156/* sysfs */ 155/* sysfs */
157 156
158static ssize_t show_card(struct class_device *cd, char *buf) 157static ssize_t show_card(struct device *cd,
158 struct device_attribute *attr, char *buf)
159{ 159{
160 struct video_device *vfd = to_video_device(cd); 160 struct video_device *vfd = to_video_device(cd);
161 struct bttv *btv = dev_get_drvdata(vfd->dev); 161 struct bttv *btv = dev_get_drvdata(vfd->dev);
162 return sprintf(buf, "%d\n", btv ? btv->c.type : UNSET); 162 return sprintf(buf, "%d\n", btv ? btv->c.type : UNSET);
163} 163}
164static CLASS_DEVICE_ATTR(card, S_IRUGO, show_card, NULL); 164static DEVICE_ATTR(card, S_IRUGO, show_card, NULL);
165 165
166/* ----------------------------------------------------------------------- */ 166/* ----------------------------------------------------------------------- */
167/* dvb auto-load setup */ 167/* dvb auto-load setup */
@@ -2583,7 +2583,7 @@ static int setup_window(struct bttv_fh *fh, struct bttv *btv,
2583 if (check_btres(fh, RESOURCE_OVERLAY)) { 2583 if (check_btres(fh, RESOURCE_OVERLAY)) {
2584 struct bttv_buffer *new; 2584 struct bttv_buffer *new;
2585 2585
2586 new = videobuf_alloc(sizeof(*new)); 2586 new = videobuf_pci_alloc(sizeof(*new));
2587 new->crop = btv->crop[!!fh->do_crop].rect; 2587 new->crop = btv->crop[!!fh->do_crop].rect;
2588 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new); 2588 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new);
2589 retval = bttv_switch_overlay(btv,fh,new); 2589 retval = bttv_switch_overlay(btv,fh,new);
@@ -3049,7 +3049,7 @@ static int bttv_do_ioctl(struct inode *inode, struct file *file,
3049 mutex_lock(&fh->cap.lock); 3049 mutex_lock(&fh->cap.lock);
3050 if (*on) { 3050 if (*on) {
3051 fh->ov.tvnorm = btv->tvnorm; 3051 fh->ov.tvnorm = btv->tvnorm;
3052 new = videobuf_alloc(sizeof(*new)); 3052 new = videobuf_pci_alloc(sizeof(*new));
3053 new->crop = btv->crop[!!fh->do_crop].rect; 3053 new->crop = btv->crop[!!fh->do_crop].rect;
3054 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new); 3054 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new);
3055 } else { 3055 } else {
@@ -3072,6 +3072,8 @@ static int bttv_do_ioctl(struct inode *inode, struct file *file,
3072 V4L2_MEMORY_MMAP); 3072 V4L2_MEMORY_MMAP);
3073 if (retval < 0) 3073 if (retval < 0)
3074 goto fh_unlock_and_return; 3074 goto fh_unlock_and_return;
3075
3076 gbuffers = retval;
3075 memset(mbuf,0,sizeof(*mbuf)); 3077 memset(mbuf,0,sizeof(*mbuf));
3076 mbuf->frames = gbuffers; 3078 mbuf->frames = gbuffers;
3077 mbuf->size = gbuffers * gbufsize; 3079 mbuf->size = gbuffers * gbufsize;
@@ -3142,9 +3144,12 @@ static int bttv_do_ioctl(struct inode *inode, struct file *file,
3142 retval = -EIO; 3144 retval = -EIO;
3143 /* fall through */ 3145 /* fall through */
3144 case STATE_DONE: 3146 case STATE_DONE:
3145 videobuf_dma_sync(&fh->cap,&buf->vb.dma); 3147 {
3148 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
3149 videobuf_dma_sync(&fh->cap,dma);
3146 bttv_dma_free(&fh->cap,btv,buf); 3150 bttv_dma_free(&fh->cap,btv,buf);
3147 break; 3151 break;
3152 }
3148 default: 3153 default:
3149 retval = -EINVAL; 3154 retval = -EINVAL;
3150 break; 3155 break;
@@ -3338,7 +3343,7 @@ static int bttv_do_ioctl(struct inode *inode, struct file *file,
3338 if (check_btres(fh, RESOURCE_OVERLAY)) { 3343 if (check_btres(fh, RESOURCE_OVERLAY)) {
3339 struct bttv_buffer *new; 3344 struct bttv_buffer *new;
3340 3345
3341 new = videobuf_alloc(sizeof(*new)); 3346 new = videobuf_pci_alloc(sizeof(*new));
3342 new->crop = btv->crop[!!fh->do_crop].rect; 3347 new->crop = btv->crop[!!fh->do_crop].rect;
3343 bttv_overlay_risc(btv,&fh->ov,fh->ovfmt,new); 3348 bttv_overlay_risc(btv,&fh->ov,fh->ovfmt,new);
3344 retval = bttv_switch_overlay(btv,fh,new); 3349 retval = bttv_switch_overlay(btv,fh,new);
@@ -3697,7 +3702,7 @@ static unsigned int bttv_poll(struct file *file, poll_table *wait)
3697 mutex_unlock(&fh->cap.lock); 3702 mutex_unlock(&fh->cap.lock);
3698 return POLLERR; 3703 return POLLERR;
3699 } 3704 }
3700 fh->cap.read_buf = videobuf_alloc(fh->cap.msize); 3705 fh->cap.read_buf = videobuf_pci_alloc(fh->cap.msize);
3701 if (NULL == fh->cap.read_buf) { 3706 if (NULL == fh->cap.read_buf) {
3702 mutex_unlock(&fh->cap.lock); 3707 mutex_unlock(&fh->cap.lock);
3703 return POLLERR; 3708 return POLLERR;
@@ -3764,13 +3769,13 @@ static int bttv_open(struct inode *inode, struct file *file)
3764 fh->ov.setup_ok = 0; 3769 fh->ov.setup_ok = 0;
3765 v4l2_prio_open(&btv->prio,&fh->prio); 3770 v4l2_prio_open(&btv->prio,&fh->prio);
3766 3771
3767 videobuf_queue_init(&fh->cap, &bttv_video_qops, 3772 videobuf_queue_pci_init(&fh->cap, &bttv_video_qops,
3768 btv->c.pci, &btv->s_lock, 3773 btv->c.pci, &btv->s_lock,
3769 V4L2_BUF_TYPE_VIDEO_CAPTURE, 3774 V4L2_BUF_TYPE_VIDEO_CAPTURE,
3770 V4L2_FIELD_INTERLACED, 3775 V4L2_FIELD_INTERLACED,
3771 sizeof(struct bttv_buffer), 3776 sizeof(struct bttv_buffer),
3772 fh); 3777 fh);
3773 videobuf_queue_init(&fh->vbi, &bttv_vbi_qops, 3778 videobuf_queue_pci_init(&fh->vbi, &bttv_vbi_qops,
3774 btv->c.pci, &btv->s_lock, 3779 btv->c.pci, &btv->s_lock,
3775 V4L2_BUF_TYPE_VBI_CAPTURE, 3780 V4L2_BUF_TYPE_VBI_CAPTURE,
3776 V4L2_FIELD_SEQ_TB, 3781 V4L2_FIELD_SEQ_TB,
@@ -4613,9 +4618,9 @@ static int __devinit bttv_register_video(struct bttv *btv)
4613 goto err; 4618 goto err;
4614 printk(KERN_INFO "bttv%d: registered device video%d\n", 4619 printk(KERN_INFO "bttv%d: registered device video%d\n",
4615 btv->c.nr,btv->video_dev->minor & 0x1f); 4620 btv->c.nr,btv->video_dev->minor & 0x1f);
4616 if (class_device_create_file(&btv->video_dev->class_dev, 4621 if (device_create_file(&btv->video_dev->class_dev,
4617 &class_device_attr_card)<0) { 4622 &dev_attr_card)<0) {
4618 printk(KERN_ERR "bttv%d: class_device_create_file 'card' " 4623 printk(KERN_ERR "bttv%d: device_create_file 'card' "
4619 "failed\n", btv->c.nr); 4624 "failed\n", btv->c.nr);
4620 goto err; 4625 goto err;
4621 } 4626 }
diff --git a/drivers/media/video/bt8xx/bttv-gpio.c b/drivers/media/video/bt8xx/bttv-gpio.c
index 84154c26f9c5..dce6dae5740e 100644
--- a/drivers/media/video/bt8xx/bttv-gpio.c
+++ b/drivers/media/video/bt8xx/bttv-gpio.c
@@ -106,11 +106,9 @@ int bttv_sub_add_device(struct bttv_core *core, char *name)
106 106
107int bttv_sub_del_devices(struct bttv_core *core) 107int bttv_sub_del_devices(struct bttv_core *core)
108{ 108{
109 struct bttv_sub_device *sub; 109 struct bttv_sub_device *sub, *save;
110 struct list_head *item,*save;
111 110
112 list_for_each_safe(item,save,&core->subs) { 111 list_for_each_entry_safe(sub, save, &core->subs, list) {
113 sub = list_entry(item,struct bttv_sub_device,list);
114 list_del(&sub->list); 112 list_del(&sub->list);
115 device_unregister(&sub->dev); 113 device_unregister(&sub->dev);
116 } 114 }
diff --git a/drivers/media/video/bt8xx/bttv-i2c.c b/drivers/media/video/bt8xx/bttv-i2c.c
index 0dfa49b66418..844f1762c45a 100644
--- a/drivers/media/video/bt8xx/bttv-i2c.c
+++ b/drivers/media/video/bt8xx/bttv-i2c.c
@@ -28,7 +28,6 @@
28*/ 28*/
29 29
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/init.h> 31#include <linux/init.h>
33#include <linux/delay.h> 32#include <linux/delay.h>
34 33
diff --git a/drivers/media/video/bt8xx/bttv-input.c b/drivers/media/video/bt8xx/bttv-input.c
index 4201552bc3c0..e7c521b8444a 100644
--- a/drivers/media/video/bt8xx/bttv-input.c
+++ b/drivers/media/video/bt8xx/bttv-input.c
@@ -19,7 +19,6 @@
19 */ 19 */
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/delay.h> 23#include <linux/delay.h>
25#include <linux/interrupt.h> 24#include <linux/interrupt.h>
diff --git a/drivers/media/video/bt8xx/bttv-risc.c b/drivers/media/video/bt8xx/bttv-risc.c
index e7104d9cb4bd..58986f1a5f1a 100644
--- a/drivers/media/video/bt8xx/bttv-risc.c
+++ b/drivers/media/video/bt8xx/bttv-risc.c
@@ -574,10 +574,12 @@ bttv_risc_hook(struct bttv *btv, int slot, struct btcx_riscmem *risc,
574void 574void
575bttv_dma_free(struct videobuf_queue *q,struct bttv *btv, struct bttv_buffer *buf) 575bttv_dma_free(struct videobuf_queue *q,struct bttv *btv, struct bttv_buffer *buf)
576{ 576{
577 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
578
577 BUG_ON(in_interrupt()); 579 BUG_ON(in_interrupt());
578 videobuf_waiton(&buf->vb,0,0); 580 videobuf_waiton(&buf->vb,0,0);
579 videobuf_dma_unmap(q, &buf->vb.dma); 581 videobuf_dma_unmap(q, dma);
580 videobuf_dma_free(&buf->vb.dma); 582 videobuf_dma_free(dma);
581 btcx_riscmem_free(btv->c.pci,&buf->bottom); 583 btcx_riscmem_free(btv->c.pci,&buf->bottom);
582 btcx_riscmem_free(btv->c.pci,&buf->top); 584 btcx_riscmem_free(btv->c.pci,&buf->top);
583 buf->vb.state = STATE_NEEDS_INIT; 585 buf->vb.state = STATE_NEEDS_INIT;
@@ -699,6 +701,7 @@ int
699bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf) 701bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
700{ 702{
701 const struct bttv_tvnorm *tvnorm = bttv_tvnorms + buf->tvnorm; 703 const struct bttv_tvnorm *tvnorm = bttv_tvnorms + buf->tvnorm;
704 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
702 705
703 dprintk(KERN_DEBUG 706 dprintk(KERN_DEBUG
704 "bttv%d: buffer field: %s format: %s size: %dx%d\n", 707 "bttv%d: buffer field: %s format: %s size: %dx%d\n",
@@ -716,25 +719,25 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
716 719
717 switch (buf->vb.field) { 720 switch (buf->vb.field) {
718 case V4L2_FIELD_TOP: 721 case V4L2_FIELD_TOP:
719 bttv_risc_packed(btv,&buf->top,buf->vb.dma.sglist, 722 bttv_risc_packed(btv,&buf->top,dma->sglist,
720 /* offset */ 0,bpl, 723 /* offset */ 0,bpl,
721 /* padding */ 0,/* skip_lines */ 0, 724 /* padding */ 0,/* skip_lines */ 0,
722 buf->vb.height); 725 buf->vb.height);
723 break; 726 break;
724 case V4L2_FIELD_BOTTOM: 727 case V4L2_FIELD_BOTTOM:
725 bttv_risc_packed(btv,&buf->bottom,buf->vb.dma.sglist, 728 bttv_risc_packed(btv,&buf->bottom,dma->sglist,
726 0,bpl,0,0,buf->vb.height); 729 0,bpl,0,0,buf->vb.height);
727 break; 730 break;
728 case V4L2_FIELD_INTERLACED: 731 case V4L2_FIELD_INTERLACED:
729 bttv_risc_packed(btv,&buf->top,buf->vb.dma.sglist, 732 bttv_risc_packed(btv,&buf->top,dma->sglist,
730 0,bpl,bpl,0,buf->vb.height >> 1); 733 0,bpl,bpl,0,buf->vb.height >> 1);
731 bttv_risc_packed(btv,&buf->bottom,buf->vb.dma.sglist, 734 bttv_risc_packed(btv,&buf->bottom,dma->sglist,
732 bpl,bpl,bpl,0,buf->vb.height >> 1); 735 bpl,bpl,bpl,0,buf->vb.height >> 1);
733 break; 736 break;
734 case V4L2_FIELD_SEQ_TB: 737 case V4L2_FIELD_SEQ_TB:
735 bttv_risc_packed(btv,&buf->top,buf->vb.dma.sglist, 738 bttv_risc_packed(btv,&buf->top,dma->sglist,
736 0,bpl,0,0,buf->vb.height >> 1); 739 0,bpl,0,0,buf->vb.height >> 1);
737 bttv_risc_packed(btv,&buf->bottom,buf->vb.dma.sglist, 740 bttv_risc_packed(btv,&buf->bottom,dma->sglist,
738 bpf,bpl,0,0,buf->vb.height >> 1); 741 bpf,bpl,0,0,buf->vb.height >> 1);
739 break; 742 break;
740 default: 743 default:
@@ -767,7 +770,7 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
767 bttv_calc_geo(btv,&buf->geo,buf->vb.width, 770 bttv_calc_geo(btv,&buf->geo,buf->vb.width,
768 buf->vb.height,/* both_fields */ 0, 771 buf->vb.height,/* both_fields */ 0,
769 tvnorm,&buf->crop); 772 tvnorm,&buf->crop);
770 bttv_risc_planar(btv, &buf->top, buf->vb.dma.sglist, 773 bttv_risc_planar(btv, &buf->top, dma->sglist,
771 0,buf->vb.width,0,buf->vb.height, 774 0,buf->vb.width,0,buf->vb.height,
772 uoffset,voffset,buf->fmt->hshift, 775 uoffset,voffset,buf->fmt->hshift,
773 buf->fmt->vshift,0); 776 buf->fmt->vshift,0);
@@ -776,7 +779,7 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
776 bttv_calc_geo(btv,&buf->geo,buf->vb.width, 779 bttv_calc_geo(btv,&buf->geo,buf->vb.width,
777 buf->vb.height,0, 780 buf->vb.height,0,
778 tvnorm,&buf->crop); 781 tvnorm,&buf->crop);
779 bttv_risc_planar(btv, &buf->bottom, buf->vb.dma.sglist, 782 bttv_risc_planar(btv, &buf->bottom, dma->sglist,
780 0,buf->vb.width,0,buf->vb.height, 783 0,buf->vb.width,0,buf->vb.height,
781 uoffset,voffset,buf->fmt->hshift, 784 uoffset,voffset,buf->fmt->hshift,
782 buf->fmt->vshift,0); 785 buf->fmt->vshift,0);
@@ -789,14 +792,14 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
789 ypadding = buf->vb.width; 792 ypadding = buf->vb.width;
790 cpadding = buf->vb.width >> buf->fmt->hshift; 793 cpadding = buf->vb.width >> buf->fmt->hshift;
791 bttv_risc_planar(btv,&buf->top, 794 bttv_risc_planar(btv,&buf->top,
792 buf->vb.dma.sglist, 795 dma->sglist,
793 0,buf->vb.width,ypadding,lines, 796 0,buf->vb.width,ypadding,lines,
794 uoffset,voffset, 797 uoffset,voffset,
795 buf->fmt->hshift, 798 buf->fmt->hshift,
796 buf->fmt->vshift, 799 buf->fmt->vshift,
797 cpadding); 800 cpadding);
798 bttv_risc_planar(btv,&buf->bottom, 801 bttv_risc_planar(btv,&buf->bottom,
799 buf->vb.dma.sglist, 802 dma->sglist,
800 ypadding,buf->vb.width,ypadding,lines, 803 ypadding,buf->vb.width,ypadding,lines,
801 uoffset+cpadding, 804 uoffset+cpadding,
802 voffset+cpadding, 805 voffset+cpadding,
@@ -812,7 +815,7 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
812 ypadding = buf->vb.width; 815 ypadding = buf->vb.width;
813 cpadding = buf->vb.width >> buf->fmt->hshift; 816 cpadding = buf->vb.width >> buf->fmt->hshift;
814 bttv_risc_planar(btv,&buf->top, 817 bttv_risc_planar(btv,&buf->top,
815 buf->vb.dma.sglist, 818 dma->sglist,
816 0,buf->vb.width,0,lines, 819 0,buf->vb.width,0,lines,
817 uoffset >> 1, 820 uoffset >> 1,
818 voffset >> 1, 821 voffset >> 1,
@@ -820,7 +823,7 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
820 buf->fmt->vshift, 823 buf->fmt->vshift,
821 0); 824 0);
822 bttv_risc_planar(btv,&buf->bottom, 825 bttv_risc_planar(btv,&buf->bottom,
823 buf->vb.dma.sglist, 826 dma->sglist,
824 lines * ypadding,buf->vb.width,0,lines, 827 lines * ypadding,buf->vb.width,0,lines,
825 lines * ypadding + (uoffset >> 1), 828 lines * ypadding + (uoffset >> 1),
826 lines * ypadding + (voffset >> 1), 829 lines * ypadding + (voffset >> 1),
@@ -839,10 +842,10 @@ bttv_buffer_risc(struct bttv *btv, struct bttv_buffer *buf)
839 buf->vb.field = V4L2_FIELD_SEQ_TB; 842 buf->vb.field = V4L2_FIELD_SEQ_TB;
840 bttv_calc_geo(btv,&buf->geo,tvnorm->swidth,tvnorm->sheight, 843 bttv_calc_geo(btv,&buf->geo,tvnorm->swidth,tvnorm->sheight,
841 1,tvnorm,&buf->crop); 844 1,tvnorm,&buf->crop);
842 bttv_risc_packed(btv, &buf->top, buf->vb.dma.sglist, 845 bttv_risc_packed(btv, &buf->top, dma->sglist,
843 /* offset */ 0, RAW_BPL, /* padding */ 0, 846 /* offset */ 0, RAW_BPL, /* padding */ 0,
844 /* skip_lines */ 0, RAW_LINES); 847 /* skip_lines */ 0, RAW_LINES);
845 bttv_risc_packed(btv, &buf->bottom, buf->vb.dma.sglist, 848 bttv_risc_packed(btv, &buf->bottom, dma->sglist,
846 buf->vb.size/2 , RAW_BPL, 0, 0, RAW_LINES); 849 buf->vb.size/2 , RAW_BPL, 0, 0, RAW_LINES);
847 } 850 }
848 851
diff --git a/drivers/media/video/bt8xx/bttv-vbi.c b/drivers/media/video/bt8xx/bttv-vbi.c
index 93e35de5a181..346ce019bdcb 100644
--- a/drivers/media/video/bt8xx/bttv-vbi.c
+++ b/drivers/media/video/bt8xx/bttv-vbi.c
@@ -24,7 +24,6 @@
24*/ 24*/
25 25
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/errno.h> 27#include <linux/errno.h>
29#include <linux/fs.h> 28#include <linux/fs.h>
30#include <linux/kernel.h> 29#include <linux/kernel.h>
@@ -151,13 +150,14 @@ static int vbi_buffer_prepare(struct videobuf_queue *q,
151 150
152 if (redo_dma_risc) { 151 if (redo_dma_risc) {
153 unsigned int bpl, padding, offset; 152 unsigned int bpl, padding, offset;
153 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
154 154
155 bpl = 2044; /* max. vbipack */ 155 bpl = 2044; /* max. vbipack */
156 padding = VBI_BPL - bpl; 156 padding = VBI_BPL - bpl;
157 157
158 if (fh->vbi_fmt.fmt.count[0] > 0) { 158 if (fh->vbi_fmt.fmt.count[0] > 0) {
159 rc = bttv_risc_packed(btv, &buf->top, 159 rc = bttv_risc_packed(btv, &buf->top,
160 buf->vb.dma.sglist, 160 dma->sglist,
161 /* offset */ 0, bpl, 161 /* offset */ 0, bpl,
162 padding, skip_lines0, 162 padding, skip_lines0,
163 fh->vbi_fmt.fmt.count[0]); 163 fh->vbi_fmt.fmt.count[0]);
@@ -169,7 +169,7 @@ static int vbi_buffer_prepare(struct videobuf_queue *q,
169 offset = fh->vbi_fmt.fmt.count[0] * VBI_BPL; 169 offset = fh->vbi_fmt.fmt.count[0] * VBI_BPL;
170 170
171 rc = bttv_risc_packed(btv, &buf->bottom, 171 rc = bttv_risc_packed(btv, &buf->bottom,
172 buf->vb.dma.sglist, 172 dma->sglist,
173 offset, bpl, 173 offset, bpl,
174 padding, skip_lines1, 174 padding, skip_lines1,
175 fh->vbi_fmt.fmt.count[1]); 175 fh->vbi_fmt.fmt.count[1]);
diff --git a/drivers/media/video/bt8xx/bttv.h b/drivers/media/video/bt8xx/bttv.h
index dcc847dc2486..19e75d50a107 100644
--- a/drivers/media/video/bt8xx/bttv.h
+++ b/drivers/media/video/bt8xx/bttv.h
@@ -172,6 +172,8 @@
172#define BTTV_BOARD_SSAI_ULTRASOUND 0x92 172#define BTTV_BOARD_SSAI_ULTRASOUND 0x92
173#define BTTV_BOARD_VOODOOTV_200 0x93 173#define BTTV_BOARD_VOODOOTV_200 0x93
174#define BTTV_BOARD_DVICO_FUSIONHDTV_2 0x94 174#define BTTV_BOARD_DVICO_FUSIONHDTV_2 0x94
175#define BTTV_BOARD_TYPHOON_TVTUNERPCI 0x95
176
175 177
176/* more card-specific defines */ 178/* more card-specific defines */
177#define PT2254_L_CHANNEL 0x10 179#define PT2254_L_CHANNEL 0x10
diff --git a/drivers/media/video/bt8xx/bttvp.h b/drivers/media/video/bt8xx/bttvp.h
index 5b25faca1504..0b92c35a8435 100644
--- a/drivers/media/video/bt8xx/bttvp.h
+++ b/drivers/media/video/bt8xx/bttvp.h
@@ -41,7 +41,7 @@
41#include <media/v4l2-common.h> 41#include <media/v4l2-common.h>
42 42
43#include <linux/device.h> 43#include <linux/device.h>
44#include <media/video-buf.h> 44#include <media/videobuf-dma-sg.h>
45#include <media/tuner.h> 45#include <media/tuner.h>
46#include <media/tveeprom.h> 46#include <media/tveeprom.h>
47#include <media/ir-common.h> 47#include <media/ir-common.h>
diff --git a/drivers/media/video/btcx-risc.c b/drivers/media/video/btcx-risc.c
index b4aca7249276..ce0840ccd594 100644
--- a/drivers/media/video/btcx-risc.c
+++ b/drivers/media/video/btcx-risc.c
@@ -23,7 +23,6 @@
23*/ 23*/
24 24
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/pci.h> 27#include <linux/pci.h>
29#include <linux/interrupt.h> 28#include <linux/interrupt.h>
diff --git a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c
index 7d47cbe6ad25..7f7e3d3398d0 100644
--- a/drivers/media/video/bw-qcam.c
+++ b/drivers/media/video/bw-qcam.c
@@ -104,6 +104,17 @@ static inline void write_lpdata(struct qcam_device *q, int d)
104 104
105static inline void write_lpcontrol(struct qcam_device *q, int d) 105static inline void write_lpcontrol(struct qcam_device *q, int d)
106{ 106{
107 if (d & 0x20) {
108 /* Set bidirectional mode to reverse (data in) */
109 parport_data_reverse(q->pport);
110 } else {
111 /* Set bidirectional mode to forward (data out) */
112 parport_data_forward(q->pport);
113 }
114
115 /* Now issue the regular port command, but strip out the
116 * direction flag */
117 d &= ~0x20;
107 parport_write_control(q->pport, d); 118 parport_write_control(q->pport, d);
108} 119}
109 120
@@ -344,10 +355,13 @@ static int qc_detect(struct qcam_device *q)
344 /* Be (even more) liberal in what you accept... */ 355 /* Be (even more) liberal in what you accept... */
345 356
346/* if (count > 30 && count < 200) */ 357/* if (count > 30 && count < 200) */
347 if (count > 20 && count < 300) 358 if (count > 20 && count < 400) {
348 return 1; /* found */ 359 return 1; /* found */
349 else 360 } else {
361 printk(KERN_ERR "No Quickcam found on port %s\n",
362 q->pport->name);
350 return 0; /* not found */ 363 return 0; /* not found */
364 }
351} 365}
352 366
353 367
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c
index ef5361824f87..b63cab336920 100644
--- a/drivers/media/video/cafe_ccic.c
+++ b/drivers/media/video/cafe_ccic.c
@@ -14,7 +14,6 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/fs.h> 18#include <linux/fs.h>
20#include <linux/pci.h> 19#include <linux/pci.h>
@@ -63,13 +62,13 @@ MODULE_SUPPORTED_DEVICE("Video");
63 */ 62 */
64 63
65#define MAX_DMA_BUFS 3 64#define MAX_DMA_BUFS 3
66static int alloc_bufs_at_load = 0; 65static int alloc_bufs_at_read = 0;
67module_param(alloc_bufs_at_load, bool, 0444); 66module_param(alloc_bufs_at_read, bool, 0444);
68MODULE_PARM_DESC(alloc_bufs_at_load, 67MODULE_PARM_DESC(alloc_bufs_at_read,
69 "Non-zero value causes DMA buffers to be allocated at module " 68 "Non-zero value causes DMA buffers to be allocated when the "
70 "load time. This increases the chances of successfully getting " 69 "video capture device is read, rather than at module load "
71 "those buffers, but at the cost of nailing down the memory from " 70 "time. This saves memory, but decreases the chances of "
72 "the outset."); 71 "successfully getting those buffers.");
73 72
74static int n_dma_bufs = 3; 73static int n_dma_bufs = 3;
75module_param(n_dma_bufs, uint, 0644); 74module_param(n_dma_bufs, uint, 0644);
@@ -1198,7 +1197,7 @@ static int cafe_setup_siobuf(struct cafe_camera *cam, int index)
1198 buf->v4lbuf.field = V4L2_FIELD_NONE; 1197 buf->v4lbuf.field = V4L2_FIELD_NONE;
1199 buf->v4lbuf.memory = V4L2_MEMORY_MMAP; 1198 buf->v4lbuf.memory = V4L2_MEMORY_MMAP;
1200 /* 1199 /*
1201 * Offset: must be 32-bit even on a 64-bit system. video-buf 1200 * Offset: must be 32-bit even on a 64-bit system. videobuf-dma-sg
1202 * just uses the length times the index, but the spec warns 1201 * just uses the length times the index, but the spec warns
1203 * against doing just that - vma merging problems. So we 1202 * against doing just that - vma merging problems. So we
1204 * leave a gap between each pair of buffers. 1203 * leave a gap between each pair of buffers.
@@ -1503,7 +1502,7 @@ static int cafe_v4l_release(struct inode *inode, struct file *filp)
1503 } 1502 }
1504 if (cam->users == 0) { 1503 if (cam->users == 0) {
1505 cafe_ctlr_power_down(cam); 1504 cafe_ctlr_power_down(cam);
1506 if (! alloc_bufs_at_load) 1505 if (alloc_bufs_at_read)
1507 cafe_free_dma_bufs(cam); 1506 cafe_free_dma_bufs(cam);
1508 } 1507 }
1509 mutex_unlock(&cam->s_mutex); 1508 mutex_unlock(&cam->s_mutex);
@@ -2162,7 +2161,7 @@ static int cafe_pci_probe(struct pci_dev *pdev,
2162 /* 2161 /*
2163 * If so requested, try to get our DMA buffers now. 2162 * If so requested, try to get our DMA buffers now.
2164 */ 2163 */
2165 if (alloc_bufs_at_load) { 2164 if (!alloc_bufs_at_read) {
2166 if (cafe_alloc_dma_bufs(cam, 1)) 2165 if (cafe_alloc_dma_bufs(cam, 1))
2167 cam_warn(cam, "Unable to alloc DMA buffers at load" 2166 cam_warn(cam, "Unable to alloc DMA buffers at load"
2168 " will try again later."); 2167 " will try again later.");
diff --git a/drivers/media/video/compat_ioctl32.c b/drivers/media/video/compat_ioctl32.c
index f065ad12cc61..cefd1381e8de 100644
--- a/drivers/media/video/compat_ioctl32.c
+++ b/drivers/media/video/compat_ioctl32.c
@@ -848,6 +848,8 @@ long v4l_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
848 case VIDIOCSFREQ32: 848 case VIDIOCSFREQ32:
849 case VIDIOCGAUDIO: 849 case VIDIOCGAUDIO:
850 case VIDIOCSAUDIO: 850 case VIDIOCSAUDIO:
851 case VIDIOCGVBIFMT:
852 case VIDIOCSVBIFMT:
851#endif 853#endif
852 case VIDIOC_QUERYCAP: 854 case VIDIOC_QUERYCAP:
853 case VIDIOC_ENUM_FMT: 855 case VIDIOC_ENUM_FMT:
@@ -874,7 +876,10 @@ long v4l_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)
874 case VIDIOC_ENUMINPUT: 876 case VIDIOC_ENUMINPUT:
875 case VIDIOC_ENUMINPUT32: 877 case VIDIOC_ENUMINPUT32:
876 case VIDIOC_G_CTRL: 878 case VIDIOC_G_CTRL:
879 case VIDIOC_S_CTRL:
877 case VIDIOC_S_CTRL32: 880 case VIDIOC_S_CTRL32:
881 case VIDIOC_S_FREQUENCY:
882 case VIDIOC_G_FREQUENCY:
878 case VIDIOC_QUERYCTRL: 883 case VIDIOC_QUERYCTRL:
879 case VIDIOC_G_INPUT32: 884 case VIDIOC_G_INPUT32:
880 case VIDIOC_S_INPUT32: 885 case VIDIOC_S_INPUT32:
diff --git a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c
index 78c9699eafbb..a1d02e5ce0fd 100644
--- a/drivers/media/video/cpia.c
+++ b/drivers/media/video/cpia.c
@@ -28,7 +28,6 @@
28 28
29 29
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/init.h> 31#include <linux/init.h>
33#include <linux/fs.h> 32#include <linux/fs.h>
34#include <linux/vmalloc.h> 33#include <linux/vmalloc.h>
diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c
index 92778cd1d735..e3aaba1e0e0a 100644
--- a/drivers/media/video/cpia2/cpia2_v4l.c
+++ b/drivers/media/video/cpia2/cpia2_v4l.c
@@ -37,7 +37,6 @@
37#include <linux/sched.h> 37#include <linux/sched.h>
38#include <linux/slab.h> 38#include <linux/slab.h>
39#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/moduleparam.h>
41 40
42#include "cpia2.h" 41#include "cpia2.h"
43#include "cpia2dev.h" 42#include "cpia2dev.h"
diff --git a/drivers/media/video/cx2341x.c b/drivers/media/video/cx2341x.c
index d73c86aeeaac..62304255dcae 100644
--- a/drivers/media/video/cx2341x.c
+++ b/drivers/media/video/cx2341x.c
@@ -20,7 +20,6 @@
20 20
21 21
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/errno.h> 23#include <linux/errno.h>
25#include <linux/kernel.h> 24#include <linux/kernel.h>
26#include <linux/init.h> 25#include <linux/init.h>
@@ -191,17 +190,21 @@ static int cx2341x_get_ctrl(struct cx2341x_mpeg_params *params,
191 190
192/* Map the control ID to the correct field in the cx2341x_mpeg_params 191/* Map the control ID to the correct field in the cx2341x_mpeg_params
193 struct. Return -EINVAL if the ID is unknown, else return 0. */ 192 struct. Return -EINVAL if the ID is unknown, else return 0. */
194static int cx2341x_set_ctrl(struct cx2341x_mpeg_params *params, 193static int cx2341x_set_ctrl(struct cx2341x_mpeg_params *params, int busy,
195 struct v4l2_ext_control *ctrl) 194 struct v4l2_ext_control *ctrl)
196{ 195{
197 switch (ctrl->id) { 196 switch (ctrl->id) {
198 case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: 197 case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
198 if (busy)
199 return -EBUSY;
199 params->audio_sampling_freq = ctrl->value; 200 params->audio_sampling_freq = ctrl->value;
200 break; 201 break;
201 case V4L2_CID_MPEG_AUDIO_ENCODING: 202 case V4L2_CID_MPEG_AUDIO_ENCODING:
202 params->audio_encoding = ctrl->value; 203 params->audio_encoding = ctrl->value;
203 break; 204 break;
204 case V4L2_CID_MPEG_AUDIO_L2_BITRATE: 205 case V4L2_CID_MPEG_AUDIO_L2_BITRATE:
206 if (busy)
207 return -EBUSY;
205 params->audio_l2_bitrate = ctrl->value; 208 params->audio_l2_bitrate = ctrl->value;
206 break; 209 break;
207 case V4L2_CID_MPEG_AUDIO_MODE: 210 case V4L2_CID_MPEG_AUDIO_MODE:
@@ -246,6 +249,8 @@ static int cx2341x_set_ctrl(struct cx2341x_mpeg_params *params,
246 params->video_gop_closure = ctrl->value; 249 params->video_gop_closure = ctrl->value;
247 break; 250 break;
248 case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: 251 case V4L2_CID_MPEG_VIDEO_BITRATE_MODE:
252 if (busy)
253 return -EBUSY;
249 /* MPEG-1 only allows CBR */ 254 /* MPEG-1 only allows CBR */
250 if (params->video_encoding == V4L2_MPEG_VIDEO_ENCODING_MPEG_1 && 255 if (params->video_encoding == V4L2_MPEG_VIDEO_ENCODING_MPEG_1 &&
251 ctrl->value != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR) 256 ctrl->value != V4L2_MPEG_VIDEO_BITRATE_MODE_CBR)
@@ -253,9 +258,13 @@ static int cx2341x_set_ctrl(struct cx2341x_mpeg_params *params,
253 params->video_bitrate_mode = ctrl->value; 258 params->video_bitrate_mode = ctrl->value;
254 break; 259 break;
255 case V4L2_CID_MPEG_VIDEO_BITRATE: 260 case V4L2_CID_MPEG_VIDEO_BITRATE:
261 if (busy)
262 return -EBUSY;
256 params->video_bitrate = ctrl->value; 263 params->video_bitrate = ctrl->value;
257 break; 264 break;
258 case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK: 265 case V4L2_CID_MPEG_VIDEO_BITRATE_PEAK:
266 if (busy)
267 return -EBUSY;
259 params->video_bitrate_peak = ctrl->value; 268 params->video_bitrate_peak = ctrl->value;
260 break; 269 break;
261 case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION: 270 case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION:
@@ -268,6 +277,8 @@ static int cx2341x_set_ctrl(struct cx2341x_mpeg_params *params,
268 params->video_mute_yuv = ctrl->value; 277 params->video_mute_yuv = ctrl->value;
269 break; 278 break;
270 case V4L2_CID_MPEG_STREAM_TYPE: 279 case V4L2_CID_MPEG_STREAM_TYPE:
280 if (busy)
281 return -EBUSY;
271 params->stream_type = ctrl->value; 282 params->stream_type = ctrl->value;
272 params->video_encoding = 283 params->video_encoding =
273 (params->stream_type == V4L2_MPEG_STREAM_TYPE_MPEG1_SS || 284 (params->stream_type == V4L2_MPEG_STREAM_TYPE_MPEG1_SS ||
@@ -632,7 +643,7 @@ static void cx2341x_calc_audio_properties(struct cx2341x_mpeg_params *params)
632 (params->audio_crc << 14); 643 (params->audio_crc << 14);
633} 644}
634 645
635int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, 646int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, int busy,
636 struct v4l2_ext_controls *ctrls, unsigned int cmd) 647 struct v4l2_ext_controls *ctrls, unsigned int cmd)
637{ 648{
638 int err = 0; 649 int err = 0;
@@ -664,7 +675,7 @@ int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params,
664 err = v4l2_ctrl_check(ctrl, &qctrl, menu_items); 675 err = v4l2_ctrl_check(ctrl, &qctrl, menu_items);
665 if (err) 676 if (err)
666 break; 677 break;
667 err = cx2341x_set_ctrl(params, ctrl); 678 err = cx2341x_set_ctrl(params, busy, ctrl);
668 if (err) 679 if (err)
669 break; 680 break;
670 } 681 }
diff --git a/drivers/media/video/cx23885/Kconfig b/drivers/media/video/cx23885/Kconfig
new file mode 100644
index 000000000000..72004a07b2d5
--- /dev/null
+++ b/drivers/media/video/cx23885/Kconfig
@@ -0,0 +1,20 @@
1config VIDEO_CX23885
2 tristate "Conexant cx23885 (2388x successor) support"
3 depends on DVB_CORE && VIDEO_DEV && PCI && I2C
4 select I2C_ALGOBIT
5 select FW_LOADER
6 select VIDEO_BTCX
7 select VIDEO_TUNER
8 select VIDEO_TVEEPROM
9 select VIDEO_IR
10 select VIDEOBUF_DVB
11 select DVB_TUNER_MT2131 if !DVB_FE_CUSTOMISE
12 select DVB_S5H1409 if !DVB_FE_CUSTOMISE
13 select DVB_PLL if !DVB_FE_CUSTOMISE
14 ---help---
15 This is a video4linux driver for Conexant 23885 based
16 TV cards.
17
18 To compile this driver as a module, choose M here: the
19 module will be called cx23885
20
diff --git a/drivers/media/video/cx23885/Makefile b/drivers/media/video/cx23885/Makefile
new file mode 100644
index 000000000000..665067022d2a
--- /dev/null
+++ b/drivers/media/video/cx23885/Makefile
@@ -0,0 +1,9 @@
1cx23885-objs := cx23885-cards.o cx23885-core.o cx23885-i2c.o cx23885-dvb.o
2
3obj-$(CONFIG_VIDEO_CX23885) += cx23885.o
4
5EXTRA_CFLAGS += -Idrivers/media/video
6EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core
7EXTRA_CFLAGS += -Idrivers/media/dvb/frontends
8
9EXTRA_CFLAGS += $(extra-cflags-y) $(extra-cflags-m)
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
new file mode 100644
index 000000000000..b9012acabb2f
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -0,0 +1,280 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
26
27#include "cx23885.h"
28
29/* ------------------------------------------------------------------ */
30/* board config info */
31
32struct cx23885_board cx23885_boards[] = {
33 [CX23885_BOARD_UNKNOWN] = {
34 .name = "UNKNOWN/GENERIC",
35 .input = {{
36 .type = CX23885_VMUX_COMPOSITE1,
37 .vmux = 0,
38 },{
39 .type = CX23885_VMUX_COMPOSITE2,
40 .vmux = 1,
41 },{
42 .type = CX23885_VMUX_COMPOSITE3,
43 .vmux = 2,
44 },{
45 .type = CX23885_VMUX_COMPOSITE4,
46 .vmux = 3,
47 }},
48 },
49 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
50 .name = "Hauppauge WinTV-HVR1800lp",
51 .portc = CX23885_MPEG_DVB,
52 .input = {{
53 .type = CX23885_VMUX_TELEVISION,
54 .vmux = 0,
55 .gpio0 = 0xff00,
56 },{
57 .type = CX23885_VMUX_DEBUG,
58 .vmux = 0,
59 .gpio0 = 0xff01,
60 },{
61 .type = CX23885_VMUX_COMPOSITE1,
62 .vmux = 1,
63 .gpio0 = 0xff02,
64 },{
65 .type = CX23885_VMUX_SVIDEO,
66 .vmux = 2,
67 .gpio0 = 0xff02,
68 }},
69 },
70 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
71 .name = "Hauppauge WinTV-HVR1800",
72 .portc = CX23885_MPEG_DVB,
73 .input = {{
74 .type = CX23885_VMUX_TELEVISION,
75 .vmux = 0,
76 .gpio0 = 0xff00,
77 },{
78 .type = CX23885_VMUX_DEBUG,
79 .vmux = 0,
80 .gpio0 = 0xff01,
81 },{
82 .type = CX23885_VMUX_COMPOSITE1,
83 .vmux = 1,
84 .gpio0 = 0xff02,
85 },{
86 .type = CX23885_VMUX_SVIDEO,
87 .vmux = 2,
88 .gpio0 = 0xff02,
89 }},
90 },
91 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
92 .name = "Hauppauge WinTV-HVR1250",
93 .portc = CX23885_MPEG_DVB,
94 .input = {{
95 .type = CX23885_VMUX_TELEVISION,
96 .vmux = 0,
97 .gpio0 = 0xff00,
98 },{
99 .type = CX23885_VMUX_DEBUG,
100 .vmux = 0,
101 .gpio0 = 0xff01,
102 },{
103 .type = CX23885_VMUX_COMPOSITE1,
104 .vmux = 1,
105 .gpio0 = 0xff02,
106 },{
107 .type = CX23885_VMUX_SVIDEO,
108 .vmux = 2,
109 .gpio0 = 0xff02,
110 }},
111 },
112 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
113 .name = "DViCO FusionHDTV5 Express",
114 .portb = CX23885_MPEG_DVB,
115 },
116};
117const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
118
119/* ------------------------------------------------------------------ */
120/* PCI subsystem IDs */
121
122struct cx23885_subid cx23885_subids[] = {
123 {
124 .subvendor = 0x0070,
125 .subdevice = 0x3400,
126 .card = CX23885_BOARD_UNKNOWN,
127 },{
128 .subvendor = 0x0070,
129 .subdevice = 0x7600,
130 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
131 },{
132 .subvendor = 0x0070,
133 .subdevice = 0x7800,
134 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
135 },{
136 .subvendor = 0x0070,
137 .subdevice = 0x7801,
138 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
139 },{
140 .subvendor = 0x0070,
141 .subdevice = 0x7911,
142 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
143 },{
144 .subvendor = 0x18ac,
145 .subdevice = 0xd500,
146 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
147 },
148};
149const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
150
151void cx23885_card_list(struct cx23885_dev *dev)
152{
153 int i;
154
155 if (0 == dev->pci->subsystem_vendor &&
156 0 == dev->pci->subsystem_device) {
157 printk("%s: Your board has no valid PCIe Subsystem ID and thus can't\n"
158 "%s: be autodetected. Please pass card=<n> insmod option to\n"
159 "%s: workaround that. Redirect complaints to the vendor of\n"
160 "%s: the TV card. Best regards,\n"
161 "%s: -- tux\n",
162 dev->name, dev->name, dev->name, dev->name, dev->name);
163 } else {
164 printk("%s: Your board isn't known (yet) to the driver. You can\n"
165 "%s: try to pick one of the existing card configs via\n"
166 "%s: card=<n> insmod option. Updating to the latest\n"
167 "%s: version might help as well.\n",
168 dev->name, dev->name, dev->name, dev->name);
169 }
170 printk("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
171 dev->name);
172 for (i = 0; i < cx23885_bcount; i++)
173 printk("%s: card=%d -> %s\n",
174 dev->name, i, cx23885_boards[i].name);
175}
176
177static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
178{
179 struct tveeprom tv;
180
181 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv, eeprom_data);
182
183 /* Make sure we support the board model */
184 switch (tv.model)
185 {
186 case 76601: /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual channel ATSC and MPEG2 HW Encoder */
187 case 77001: /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC and Basic analog */
188 case 78501: /* WinTV-HVR1800 (PCIe, Retail, IR, Dual channel ATSC and MPEG2 HW Encoder */
189 case 78521: /* WinTV-HVR1800 (PCIe, Retail, IR, Dual channel ATSC and MPEG2 HW Encoder */
190 break;
191 default:
192 printk("%s: warning: unknown hauppauge model #%d\n", dev->name, tv.model);
193 break;
194 }
195
196 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
197 dev->name, tv.model);
198}
199
200void cx23885_gpio_setup(struct cx23885_dev *dev)
201{
202 switch(dev->board) {
203 case CX23885_BOARD_HAUPPAUGE_HVR1250:
204 /* GPIO-0 cx24227 demodulator reset */
205 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
206 break;
207 case CX23885_BOARD_HAUPPAUGE_HVR1800:
208 /* GPIO-0 656_CLK */
209 /* GPIO-1 656_D0 */
210 /* GPIO-2 8295A Reset */
211 /* GPIO-3-10 cx23417 data0-7 */
212 /* GPIO-11-14 cx23417 addr0-3 */
213 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
214 /* GPIO-19 IR_RX */
215 // FIXME: Analog requires the tuner is brought out of reset
216 break;
217 }
218}
219
220int cx23885_ir_init(struct cx23885_dev *dev)
221{
222 switch (dev->board) {
223 case CX23885_BOARD_HAUPPAUGE_HVR1250:
224 case CX23885_BOARD_HAUPPAUGE_HVR1800:
225 /* FIXME: Implement me */
226 break;
227 }
228
229 return 0;
230}
231
232void cx23885_card_setup(struct cx23885_dev *dev)
233{
234 struct cx23885_tsport *ts1 = &dev->ts1;
235 struct cx23885_tsport *ts2 = &dev->ts2;
236
237 static u8 eeprom[256];
238
239 if (dev->i2c_bus[0].i2c_rc == 0) {
240 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
241 tveeprom_read(&dev->i2c_bus[0].i2c_client,
242 eeprom, sizeof(eeprom));
243 }
244
245 switch (dev->board) {
246 case CX23885_BOARD_HAUPPAUGE_HVR1250:
247 case CX23885_BOARD_HAUPPAUGE_HVR1800:
248 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
249 if (dev->i2c_bus[0].i2c_rc == 0)
250 hauppauge_eeprom(dev, eeprom+0x80);
251 break;
252 }
253
254 switch (dev->board) {
255 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
256 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
257 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
258 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
259 break;
260 case CX23885_BOARD_HAUPPAUGE_HVR1250:
261 case CX23885_BOARD_HAUPPAUGE_HVR1800:
262 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
263 default:
264 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
265 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
266 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
267 }
268
269}
270
271/* ------------------------------------------------------------------ */
272
273EXPORT_SYMBOL(cx23885_boards);
274
275/*
276 * Local variables:
277 * c-basic-offset: 8
278 * End:
279 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
280 */
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
new file mode 100644
index 000000000000..af16505bd2e0
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -0,0 +1,1530 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/list.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/kmod.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/delay.h>
31#include <asm/div64.h>
32
33#include "cx23885.h"
34
35MODULE_DESCRIPTION("Driver for cx23885 based TV cards");
36MODULE_AUTHOR("Steven Toth <stoth@hauppauge.com>");
37MODULE_LICENSE("GPL");
38
39static unsigned int debug = 0;
40module_param(debug,int,0644);
41MODULE_PARM_DESC(debug,"enable debug messages");
42
43static unsigned int card[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
44module_param_array(card, int, NULL, 0444);
45MODULE_PARM_DESC(card,"card type");
46
47#define dprintk(level,fmt, arg...) if (debug >= level) \
48 printk(KERN_DEBUG "%s/0: " fmt, dev->name , ## arg)
49
50static unsigned int cx23885_devcount;
51
52static DEFINE_MUTEX(devlist);
53static LIST_HEAD(cx23885_devlist);
54
55#define NO_SYNC_LINE (-1U)
56
57/*
58 * CX23885 Assumptions
59 * 1 line = 16 bytes of CDT
60 * cmds size = 80
61 * cdt size = 16 * linesize
62 * iqsize = 64
63 * maxlines = 6
64 *
65 * Address Space:
66 * 0x00000000 0x00008fff FIFO clusters
67 * 0x00010000 0x000104af Channel Management Data Structures
68 * 0x000104b0 0x000104ff Free
69 * 0x00010500 0x000108bf 15 channels * iqsize
70 * 0x000108c0 0x000108ff Free
71 * 0x00010900 0x00010e9f IQ's + Cluster Descriptor Tables
72 * 15 channels * (iqsize + (maxlines * linesize))
73 * 0x00010ea0 0x00010xxx Free
74 */
75
76struct sram_channel cx23885_sram_channels[] = {
77 [SRAM_CH01] = {
78 .name = "test ch1",
79 .cmds_start = 0x10000,
80 .ctrl_start = 0x10500,
81 .cdt = 0x10900,
82 .fifo_start = 0x3000,
83 .fifo_size = 0x1000,
84 .ptr1_reg = DMA1_PTR1,
85 .ptr2_reg = DMA1_PTR2,
86 .cnt1_reg = DMA1_CNT1,
87 .cnt2_reg = DMA1_CNT2,
88 .jumponly = 1,
89 },
90 [SRAM_CH02] = {
91 .name = "ch2",
92 .cmds_start = 0x0,
93 .ctrl_start = 0x0,
94 .cdt = 0x0,
95 .fifo_start = 0x0,
96 .fifo_size = 0x0,
97 .ptr1_reg = DMA2_PTR1,
98 .ptr2_reg = DMA2_PTR2,
99 .cnt1_reg = DMA2_CNT1,
100 .cnt2_reg = DMA2_CNT2,
101 },
102 [SRAM_CH03] = {
103 .name = "TS1 B",
104 .cmds_start = 0x100A0,
105 .ctrl_start = 0x10780,
106 .cdt = 0x10400,
107 .fifo_start = 0x5000,
108 .fifo_size = 0x1000,
109 .ptr1_reg = DMA3_PTR1,
110 .ptr2_reg = DMA3_PTR2,
111 .cnt1_reg = DMA3_CNT1,
112 .cnt2_reg = DMA3_CNT2,
113 },
114 [SRAM_CH04] = {
115 .name = "ch4",
116 .cmds_start = 0x0,
117 .ctrl_start = 0x0,
118 .cdt = 0x0,
119 .fifo_start = 0x0,
120 .fifo_size = 0x0,
121 .ptr1_reg = DMA4_PTR1,
122 .ptr2_reg = DMA4_PTR2,
123 .cnt1_reg = DMA4_CNT1,
124 .cnt2_reg = DMA4_CNT2,
125 },
126 [SRAM_CH05] = {
127 .name = "ch5",
128 .cmds_start = 0x0,
129 .ctrl_start = 0x0,
130 .cdt = 0x0,
131 .fifo_start = 0x0,
132 .fifo_size = 0x0,
133 .ptr1_reg = DMA5_PTR1,
134 .ptr2_reg = DMA5_PTR2,
135 .cnt1_reg = DMA5_CNT1,
136 .cnt2_reg = DMA5_CNT2,
137 },
138 [SRAM_CH06] = {
139 .name = "TS2 C",
140 .cmds_start = 0x10140,
141 .ctrl_start = 0x10680,
142 .cdt = 0x10480,
143 .fifo_start = 0x6000,
144 .fifo_size = 0x1000,
145 .ptr1_reg = DMA5_PTR1,
146 .ptr2_reg = DMA5_PTR2,
147 .cnt1_reg = DMA5_CNT1,
148 .cnt2_reg = DMA5_CNT2,
149 },
150 [SRAM_CH07] = {
151 .name = "ch7",
152 .cmds_start = 0x0,
153 .ctrl_start = 0x0,
154 .cdt = 0x0,
155 .fifo_start = 0x0,
156 .fifo_size = 0x0,
157 .ptr1_reg = DMA6_PTR1,
158 .ptr2_reg = DMA6_PTR2,
159 .cnt1_reg = DMA6_CNT1,
160 .cnt2_reg = DMA6_CNT2,
161 },
162 [SRAM_CH08] = {
163 .name = "ch8",
164 .cmds_start = 0x0,
165 .ctrl_start = 0x0,
166 .cdt = 0x0,
167 .fifo_start = 0x0,
168 .fifo_size = 0x0,
169 .ptr1_reg = DMA7_PTR1,
170 .ptr2_reg = DMA7_PTR2,
171 .cnt1_reg = DMA7_CNT1,
172 .cnt2_reg = DMA7_CNT2,
173 },
174 [SRAM_CH09] = {
175 .name = "ch9",
176 .cmds_start = 0x0,
177 .ctrl_start = 0x0,
178 .cdt = 0x0,
179 .fifo_start = 0x0,
180 .fifo_size = 0x0,
181 .ptr1_reg = DMA8_PTR1,
182 .ptr2_reg = DMA8_PTR2,
183 .cnt1_reg = DMA8_CNT1,
184 .cnt2_reg = DMA8_CNT2,
185 },
186};
187
188/* FIXME, these allocations will change when
189 * analog arrives. The be reviewed.
190 * CX23887 Assumptions
191 * 1 line = 16 bytes of CDT
192 * cmds size = 80
193 * cdt size = 16 * linesize
194 * iqsize = 64
195 * maxlines = 6
196 *
197 * Address Space:
198 * 0x00000000 0x00008fff FIFO clusters
199 * 0x00010000 0x000104af Channel Management Data Structures
200 * 0x000104b0 0x000104ff Free
201 * 0x00010500 0x000108bf 15 channels * iqsize
202 * 0x000108c0 0x000108ff Free
203 * 0x00010900 0x00010e9f IQ's + Cluster Descriptor Tables
204 * 15 channels * (iqsize + (maxlines * linesize))
205 * 0x00010ea0 0x00010xxx Free
206 */
207
208struct sram_channel cx23887_sram_channels[] = {
209 [SRAM_CH01] = {
210 .name = "test ch1",
211 .cmds_start = 0x0,
212 .ctrl_start = 0x0,
213 .cdt = 0x0,
214 .fifo_start = 0x0,
215 .fifo_size = 0x0,
216 .ptr1_reg = DMA1_PTR1,
217 .ptr2_reg = DMA1_PTR2,
218 .cnt1_reg = DMA1_CNT1,
219 .cnt2_reg = DMA1_CNT2,
220 },
221 [SRAM_CH02] = {
222 .name = "ch2",
223 .cmds_start = 0x0,
224 .ctrl_start = 0x0,
225 .cdt = 0x0,
226 .fifo_start = 0x0,
227 .fifo_size = 0x0,
228 .ptr1_reg = DMA2_PTR1,
229 .ptr2_reg = DMA2_PTR2,
230 .cnt1_reg = DMA2_CNT1,
231 .cnt2_reg = DMA2_CNT2,
232 },
233 [SRAM_CH03] = {
234 .name = "ch3",
235 .cmds_start = 0x0,
236 .ctrl_start = 0x0,
237 .cdt = 0x0,
238 .fifo_start = 0x0,
239 .fifo_size = 0x0,
240 .ptr1_reg = DMA3_PTR1,
241 .ptr2_reg = DMA3_PTR2,
242 .cnt1_reg = DMA3_CNT1,
243 .cnt2_reg = DMA3_CNT2,
244 },
245 [SRAM_CH04] = {
246 .name = "ch4",
247 .cmds_start = 0x0,
248 .ctrl_start = 0x0,
249 .cdt = 0x0,
250 .fifo_start = 0x0,
251 .fifo_size = 0x0,
252 .ptr1_reg = DMA4_PTR1,
253 .ptr2_reg = DMA4_PTR2,
254 .cnt1_reg = DMA4_CNT1,
255 .cnt2_reg = DMA4_CNT2,
256 },
257 [SRAM_CH05] = {
258 .name = "ch5",
259 .cmds_start = 0x0,
260 .ctrl_start = 0x0,
261 .cdt = 0x0,
262 .fifo_start = 0x0,
263 .fifo_size = 0x0,
264 .ptr1_reg = DMA5_PTR1,
265 .ptr2_reg = DMA5_PTR2,
266 .cnt1_reg = DMA5_CNT1,
267 .cnt2_reg = DMA5_CNT2,
268 },
269 [SRAM_CH06] = {
270 .name = "TS2 C",
271 .cmds_start = 0x10140,
272 .ctrl_start = 0x10680,
273 .cdt = 0x108d0,
274 .fifo_start = 0x6000,
275 .fifo_size = 0x1000,
276 .ptr1_reg = DMA5_PTR1,
277 .ptr2_reg = DMA5_PTR2,
278 .cnt1_reg = DMA5_CNT1,
279 .cnt2_reg = DMA5_CNT2,
280 },
281 [SRAM_CH07] = {
282 .name = "ch7",
283 .cmds_start = 0x0,
284 .ctrl_start = 0x0,
285 .cdt = 0x0,
286 .fifo_start = 0x0,
287 .fifo_size = 0x0,
288 .ptr1_reg = DMA6_PTR1,
289 .ptr2_reg = DMA6_PTR2,
290 .cnt1_reg = DMA6_CNT1,
291 .cnt2_reg = DMA6_CNT2,
292 },
293 [SRAM_CH08] = {
294 .name = "ch8",
295 .cmds_start = 0x0,
296 .ctrl_start = 0x0,
297 .cdt = 0x0,
298 .fifo_start = 0x0,
299 .fifo_size = 0x0,
300 .ptr1_reg = DMA7_PTR1,
301 .ptr2_reg = DMA7_PTR2,
302 .cnt1_reg = DMA7_CNT1,
303 .cnt2_reg = DMA7_CNT2,
304 },
305 [SRAM_CH09] = {
306 .name = "ch9",
307 .cmds_start = 0x0,
308 .ctrl_start = 0x0,
309 .cdt = 0x0,
310 .fifo_start = 0x0,
311 .fifo_size = 0x0,
312 .ptr1_reg = DMA8_PTR1,
313 .ptr2_reg = DMA8_PTR2,
314 .cnt1_reg = DMA8_CNT1,
315 .cnt2_reg = DMA8_CNT2,
316 },
317};
318
319static int cx23885_risc_decode(u32 risc)
320{
321 static char *instr[16] = {
322 [ RISC_SYNC >> 28 ] = "sync",
323 [ RISC_WRITE >> 28 ] = "write",
324 [ RISC_WRITEC >> 28 ] = "writec",
325 [ RISC_READ >> 28 ] = "read",
326 [ RISC_READC >> 28 ] = "readc",
327 [ RISC_JUMP >> 28 ] = "jump",
328 [ RISC_SKIP >> 28 ] = "skip",
329 [ RISC_WRITERM >> 28 ] = "writerm",
330 [ RISC_WRITECM >> 28 ] = "writecm",
331 [ RISC_WRITECR >> 28 ] = "writecr",
332 };
333 static int incr[16] = {
334 [ RISC_WRITE >> 28 ] = 3,
335 [ RISC_JUMP >> 28 ] = 3,
336 [ RISC_SKIP >> 28 ] = 1,
337 [ RISC_SYNC >> 28 ] = 1,
338 [ RISC_WRITERM >> 28 ] = 3,
339 [ RISC_WRITECM >> 28 ] = 3,
340 [ RISC_WRITECR >> 28 ] = 4,
341 };
342 static char *bits[] = {
343 "12", "13", "14", "resync",
344 "cnt0", "cnt1", "18", "19",
345 "20", "21", "22", "23",
346 "irq1", "irq2", "eol", "sol",
347 };
348 int i;
349
350 printk("0x%08x [ %s", risc,
351 instr[risc >> 28] ? instr[risc >> 28] : "INVALID");
352 for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--)
353 if (risc & (1 << (i + 12)))
354 printk(" %s", bits[i]);
355 printk(" count=%d ]\n", risc & 0xfff);
356 return incr[risc >> 28] ? incr[risc >> 28] : 1;
357}
358
359void cx23885_wakeup(struct cx23885_tsport *port,
360 struct cx23885_dmaqueue *q, u32 count)
361{
362 struct cx23885_dev *dev = port->dev;
363 struct cx23885_buffer *buf;
364 int bc;
365
366 for (bc = 0;; bc++) {
367 if (list_empty(&q->active))
368 break;
369 buf = list_entry(q->active.next,
370 struct cx23885_buffer, vb.queue);
371
372 /* count comes from the hw and is is 16bit wide --
373 * this trick handles wrap-arounds correctly for
374 * up to 32767 buffers in flight... */
375 if ((s16) (count - buf->count) < 0)
376 break;
377
378 do_gettimeofday(&buf->vb.ts);
379 dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf, buf->vb.i,
380 count, buf->count);
381 buf->vb.state = STATE_DONE;
382 list_del(&buf->vb.queue);
383 wake_up(&buf->vb.done);
384 }
385 if (list_empty(&q->active)) {
386 del_timer(&q->timeout);
387 } else {
388 mod_timer(&q->timeout, jiffies + BUFFER_TIMEOUT);
389 }
390 if (bc != 1)
391 printk("%s: %d buffers handled (should be 1)\n",
392 __FUNCTION__, bc);
393}
394void cx23885_sram_channel_dump(struct cx23885_dev *dev,
395 struct sram_channel *ch);
396
397int cx23885_sram_channel_setup(struct cx23885_dev *dev,
398 struct sram_channel *ch,
399 unsigned int bpl, u32 risc)
400{
401 unsigned int i, lines;
402 u32 cdt;
403
404 if (ch->cmds_start == 0)
405 {
406 dprintk(1, "%s() Erasing channel [%s]\n", __FUNCTION__,
407 ch->name);
408 cx_write(ch->ptr1_reg, 0);
409 cx_write(ch->ptr2_reg, 0);
410 cx_write(ch->cnt2_reg, 0);
411 cx_write(ch->cnt1_reg, 0);
412 return 0;
413 } else {
414 dprintk(1, "%s() Configuring channel [%s]\n", __FUNCTION__,
415 ch->name);
416 }
417
418 bpl = (bpl + 7) & ~7; /* alignment */
419 cdt = ch->cdt;
420 lines = ch->fifo_size / bpl;
421 if (lines > 6)
422 lines = 6;
423 BUG_ON(lines < 2);
424
425 cx_write(8 + 0, cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC) );
426 cx_write(8 + 4, cpu_to_le32(8) );
427 cx_write(8 + 8, cpu_to_le32(0) );
428
429 /* write CDT */
430 for (i = 0; i < lines; i++) {
431 dprintk(2, "%s() 0x%08x <- 0x%08x\n", __FUNCTION__, cdt + 16*i,
432 ch->fifo_start + bpl*i);
433 cx_write(cdt + 16*i, ch->fifo_start + bpl*i);
434 cx_write(cdt + 16*i + 4, 0);
435 cx_write(cdt + 16*i + 8, 0);
436 cx_write(cdt + 16*i + 12, 0);
437 }
438
439 /* write CMDS */
440 if (ch->jumponly)
441 cx_write(ch->cmds_start + 0, 8);
442 else
443 cx_write(ch->cmds_start + 0, risc);
444 cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */
445 cx_write(ch->cmds_start + 8, cdt);
446 cx_write(ch->cmds_start + 12, (lines*16) >> 3);
447 cx_write(ch->cmds_start + 16, ch->ctrl_start);
448 if (ch->jumponly)
449 cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2) );
450 else
451 cx_write(ch->cmds_start + 20, 64 >> 2);
452 for (i = 24; i < 80; i += 4)
453 cx_write(ch->cmds_start + i, 0);
454
455 /* fill registers */
456 cx_write(ch->ptr1_reg, ch->fifo_start);
457 cx_write(ch->ptr2_reg, cdt);
458 cx_write(ch->cnt2_reg, (lines*16) >> 3);
459 cx_write(ch->cnt1_reg, (bpl >> 3) -1);
460
461 dprintk(2,"[bridge %d] sram setup %s: bpl=%d lines=%d\n",
462 dev->bridge,
463 ch->name,
464 bpl,
465 lines);
466
467 return 0;
468}
469
470void cx23885_sram_channel_dump(struct cx23885_dev *dev,
471 struct sram_channel *ch)
472{
473 static char *name[] = {
474 "init risc lo",
475 "init risc hi",
476 "cdt base",
477 "cdt size",
478 "iq base",
479 "iq size",
480 "risc pc lo",
481 "risc pc hi",
482 "iq wr ptr",
483 "iq rd ptr",
484 "cdt current",
485 "pci target lo",
486 "pci target hi",
487 "line / byte",
488 };
489 u32 risc;
490 unsigned int i, j, n;
491
492 printk("%s: %s - dma channel status dump\n",
493 dev->name, ch->name);
494 for (i = 0; i < ARRAY_SIZE(name); i++)
495 printk("%s: cmds: %-15s: 0x%08x\n",
496 dev->name, name[i],
497 cx_read(ch->cmds_start + 4*i));
498
499 for (i = 0; i < 4; i++) {
500 risc = cx_read(ch->cmds_start + 4 * (i + 14));
501 printk("%s: risc%d: ", dev->name, i);
502 cx23885_risc_decode(risc);
503 }
504 for (i = 0; i < (64 >> 2); i += n) {
505 risc = cx_read(ch->ctrl_start + 4 * i);
506 /* No consideration for bits 63-32 */
507
508 printk("%s: (0x%08x) iq %x: ", dev->name,
509 ch->ctrl_start + 4 * i, i);
510 n = cx23885_risc_decode(risc);
511 for (j = 1; j < n; j++) {
512 risc = cx_read(ch->ctrl_start + 4 * (i + j));
513 printk("%s: iq %x: 0x%08x [ arg #%d ]\n",
514 dev->name, i+j, risc, j);
515 }
516 }
517
518 printk("%s: fifo: 0x%08x -> 0x%x\n",
519 dev->name, ch->fifo_start, ch->fifo_start+ch->fifo_size);
520 printk("%s: ctrl: 0x%08x -> 0x%x\n",
521 dev->name, ch->ctrl_start, ch->ctrl_start + 6*16);
522 printk("%s: ptr1_reg: 0x%08x\n",
523 dev->name, cx_read(ch->ptr1_reg));
524 printk("%s: ptr2_reg: 0x%08x\n",
525 dev->name, cx_read(ch->ptr2_reg));
526 printk("%s: cnt1_reg: 0x%08x\n",
527 dev->name, cx_read(ch->cnt1_reg));
528 printk("%s: cnt2_reg: 0x%08x\n",
529 dev->name, cx_read(ch->cnt2_reg));
530}
531
532void cx23885_risc_disasm(struct cx23885_tsport *port,
533 struct btcx_riscmem *risc)
534{
535 struct cx23885_dev *dev = port->dev;
536 unsigned int i, j, n;
537
538 printk("%s: risc disasm: %p [dma=0x%08lx]\n",
539 dev->name, risc->cpu, (unsigned long)risc->dma);
540 for (i = 0; i < (risc->size >> 2); i += n) {
541 printk("%s: %04d: ", dev->name, i);
542 n = cx23885_risc_decode(risc->cpu[i]);
543 for (j = 1; j < n; j++)
544 printk("%s: %04d: 0x%08x [ arg #%d ]\n",
545 dev->name, i + j, risc->cpu[i + j], j);
546 if (risc->cpu[i] == RISC_JUMP)
547 break;
548 }
549}
550
551void cx23885_shutdown(struct cx23885_dev *dev)
552{
553 /* disable RISC controller */
554 cx_write(DEV_CNTRL2, 0);
555
556 /* Disable all IR activity */
557 cx_write(IR_CNTRL_REG, 0);
558
559 /* Disable Video A/B activity */
560 cx_write(VID_A_DMA_CTL, 0);
561 cx_write(VID_B_DMA_CTL, 0);
562 cx_write(VID_C_DMA_CTL, 0);
563
564 /* Disable Audio activity */
565 cx_write(AUD_INT_DMA_CTL, 0);
566 cx_write(AUD_EXT_DMA_CTL, 0);
567
568 /* Disable Serial port */
569 cx_write(UART_CTL, 0);
570
571 /* Disable Interrupts */
572 cx_write(PCI_INT_MSK, 0);
573 cx_write(VID_A_INT_MSK, 0);
574 cx_write(VID_B_INT_MSK, 0);
575 cx_write(VID_C_INT_MSK, 0);
576 cx_write(AUDIO_INT_INT_MSK, 0);
577 cx_write(AUDIO_EXT_INT_MSK, 0);
578
579}
580
581void cx23885_reset(struct cx23885_dev *dev)
582{
583 dprintk(1, "%s()\n", __FUNCTION__);
584
585 cx23885_shutdown(dev);
586
587 cx_write(PCI_INT_STAT, 0xffffffff);
588 cx_write(VID_A_INT_STAT, 0xffffffff);
589 cx_write(VID_B_INT_STAT, 0xffffffff);
590 cx_write(VID_C_INT_STAT, 0xffffffff);
591 cx_write(AUDIO_INT_INT_STAT, 0xffffffff);
592 cx_write(AUDIO_EXT_INT_STAT, 0xffffffff);
593 cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000);
594
595 mdelay(100);
596
597 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH01 ], 188*4, 0);
598 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH02 ], 128, 0);
599 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH03 ], 188*4, 0);
600 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH04 ], 128, 0);
601 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH05 ], 128, 0);
602 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH06 ], 188*4, 0);
603 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH07 ], 128, 0);
604 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH08 ], 128, 0);
605 cx23885_sram_channel_setup(dev, &dev->sram_channels[ SRAM_CH09 ], 128, 0);
606
607 cx23885_gpio_setup(dev);
608}
609
610
611static int cx23885_pci_quirks(struct cx23885_dev *dev)
612{
613 dprintk(1, "%s()\n", __FUNCTION__);
614
615 /* The cx23885 bridge has a weird bug which causes NMI to be asserted
616 * when DMA begins if RDR_TLCTL0 bit4 is not cleared. It does not
617 * occur on the cx23887 bridge.
618 */
619 if(dev->bridge == CX23885_BRIDGE_885)
620 cx_clear(RDR_TLCTL0, 1 << 4);
621
622 return 0;
623}
624
625static int get_resources(struct cx23885_dev *dev)
626{
627 if (request_mem_region(pci_resource_start(dev->pci,0),
628 pci_resource_len(dev->pci,0),
629 dev->name))
630 return 0;
631
632 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx\n",
633 dev->name, (unsigned long long)pci_resource_start(dev->pci,0));
634
635 return -EBUSY;
636}
637
638static void cx23885_timeout(unsigned long data);
639int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
640 u32 reg, u32 mask, u32 value);
641
642static int cx23885_init_tsport(struct cx23885_dev *dev, struct cx23885_tsport *port, int portno)
643{
644 dprintk(1, "%s(portno=%d)\n", __FUNCTION__, portno);
645
646 /* Transport bus init dma queue - Common settings */
647 port->dma_ctl_val = 0x11; /* Enable RISC controller and Fifo */
648 port->ts_int_msk_val = 0x1111; /* TS port bits for RISC */
649
650 spin_lock_init(&port->slock);
651 port->dev = dev;
652 port->nr = portno;
653
654 INIT_LIST_HEAD(&port->mpegq.active);
655 INIT_LIST_HEAD(&port->mpegq.queued);
656 port->mpegq.timeout.function = cx23885_timeout;
657 port->mpegq.timeout.data = (unsigned long)port;
658 init_timer(&port->mpegq.timeout);
659
660 switch(portno) {
661 case 1:
662 port->reg_gpcnt = VID_B_GPCNT;
663 port->reg_gpcnt_ctl = VID_B_GPCNT_CTL;
664 port->reg_dma_ctl = VID_B_DMA_CTL;
665 port->reg_lngth = VID_B_LNGTH;
666 port->reg_hw_sop_ctrl = VID_B_HW_SOP_CTL;
667 port->reg_gen_ctrl = VID_B_GEN_CTL;
668 port->reg_bd_pkt_status = VID_B_BD_PKT_STATUS;
669 port->reg_sop_status = VID_B_SOP_STATUS;
670 port->reg_fifo_ovfl_stat = VID_B_FIFO_OVFL_STAT;
671 port->reg_vld_misc = VID_B_VLD_MISC;
672 port->reg_ts_clk_en = VID_B_TS_CLK_EN;
673 port->reg_src_sel = VID_B_SRC_SEL;
674 port->reg_ts_int_msk = VID_B_INT_MSK;
675 port->reg_ts_int_stat = VID_B_INT_STAT;
676 port->sram_chno = SRAM_CH03; /* VID_B */
677 port->pci_irqmask = 0x02; /* VID_B bit1 */
678 break;
679 case 2:
680 port->reg_gpcnt = VID_C_GPCNT;
681 port->reg_gpcnt_ctl = VID_C_GPCNT_CTL;
682 port->reg_dma_ctl = VID_C_DMA_CTL;
683 port->reg_lngth = VID_C_LNGTH;
684 port->reg_hw_sop_ctrl = VID_C_HW_SOP_CTL;
685 port->reg_gen_ctrl = VID_C_GEN_CTL;
686 port->reg_bd_pkt_status = VID_C_BD_PKT_STATUS;
687 port->reg_sop_status = VID_C_SOP_STATUS;
688 port->reg_fifo_ovfl_stat = VID_C_FIFO_OVFL_STAT;
689 port->reg_vld_misc = VID_C_VLD_MISC;
690 port->reg_ts_clk_en = VID_C_TS_CLK_EN;
691 port->reg_src_sel = 0;
692 port->reg_ts_int_msk = VID_C_INT_MSK;
693 port->reg_ts_int_stat = VID_C_INT_STAT;
694 port->sram_chno = SRAM_CH06; /* VID_C */
695 port->pci_irqmask = 0x04; /* VID_C bit2 */
696 break;
697 default:
698 BUG();
699 }
700
701 cx23885_risc_stopper(dev->pci, &port->mpegq.stopper,
702 port->reg_dma_ctl, port->dma_ctl_val, 0x00);
703
704 return 0;
705}
706
707static int cx23885_dev_setup(struct cx23885_dev *dev)
708{
709 int i;
710
711 mutex_init(&dev->lock);
712
713 atomic_inc(&dev->refcount);
714
715 dev->nr = cx23885_devcount++;
716 sprintf(dev->name, "cx23885[%d]", dev->nr);
717
718 mutex_lock(&devlist);
719 list_add_tail(&dev->devlist, &cx23885_devlist);
720 mutex_unlock(&devlist);
721
722 /* Configure the internal memory */
723 if(dev->pci->device == 0x8880) {
724 dev->bridge = CX23885_BRIDGE_887;
725 dev->sram_channels = cx23887_sram_channels;
726 } else
727 if(dev->pci->device == 0x8852) {
728 dev->bridge = CX23885_BRIDGE_885;
729 dev->sram_channels = cx23885_sram_channels;
730 } else
731 BUG();
732
733 dprintk(1, "%s() Memory configured for PCIe bridge type %d\n",
734 __FUNCTION__, dev->bridge);
735
736 /* board config */
737 dev->board = UNSET;
738 if (card[dev->nr] < cx23885_bcount)
739 dev->board = card[dev->nr];
740 for (i = 0; UNSET == dev->board && i < cx23885_idcount; i++)
741 if (dev->pci->subsystem_vendor == cx23885_subids[i].subvendor &&
742 dev->pci->subsystem_device == cx23885_subids[i].subdevice)
743 dev->board = cx23885_subids[i].card;
744 if (UNSET == dev->board) {
745 dev->board = CX23885_BOARD_UNKNOWN;
746 cx23885_card_list(dev);
747 }
748
749 dev->pci_bus = dev->pci->bus->number;
750 dev->pci_slot = PCI_SLOT(dev->pci->devfn);
751 dev->pci_irqmask = 0x001f00;
752
753 /* External Master 1 Bus */
754 dev->i2c_bus[0].nr = 0;
755 dev->i2c_bus[0].dev = dev;
756 dev->i2c_bus[0].reg_stat = I2C1_STAT;
757 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL;
758 dev->i2c_bus[0].reg_addr = I2C1_ADDR;
759 dev->i2c_bus[0].reg_rdata = I2C1_RDATA;
760 dev->i2c_bus[0].reg_wdata = I2C1_WDATA;
761 dev->i2c_bus[0].i2c_period = (0x9d << 24); /* 100kHz */
762
763 /* External Master 2 Bus */
764 dev->i2c_bus[1].nr = 1;
765 dev->i2c_bus[1].dev = dev;
766 dev->i2c_bus[1].reg_stat = I2C2_STAT;
767 dev->i2c_bus[1].reg_ctrl = I2C2_CTRL;
768 dev->i2c_bus[1].reg_addr = I2C2_ADDR;
769 dev->i2c_bus[1].reg_rdata = I2C2_RDATA;
770 dev->i2c_bus[1].reg_wdata = I2C2_WDATA;
771 dev->i2c_bus[1].i2c_period = (0x9d << 24); /* 100kHz */
772
773 /* Internal Master 3 Bus */
774 dev->i2c_bus[2].nr = 2;
775 dev->i2c_bus[2].dev = dev;
776 dev->i2c_bus[2].reg_stat = I2C3_STAT;
777 dev->i2c_bus[2].reg_ctrl = I2C3_CTRL;
778 dev->i2c_bus[2].reg_addr = I2C3_ADDR;
779 dev->i2c_bus[2].reg_rdata = I2C3_RDATA;
780 dev->i2c_bus[2].reg_wdata = I2C3_WDATA;
781 dev->i2c_bus[2].i2c_period = (0x07 << 24); /* 1.95MHz */
782
783 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
784 cx23885_init_tsport(dev, &dev->ts1, 1);
785
786 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB)
787 cx23885_init_tsport(dev, &dev->ts2, 2);
788
789 if (get_resources(dev) < 0) {
790 printk(KERN_ERR "CORE %s No more PCIe resources for "
791 "subsystem: %04x:%04x\n",
792 dev->name, dev->pci->subsystem_vendor,
793 dev->pci->subsystem_device);
794
795 cx23885_devcount--;
796 goto fail_free;
797 }
798
799 /* PCIe stuff */
800 dev->lmmio = ioremap(pci_resource_start(dev->pci,0),
801 pci_resource_len(dev->pci,0));
802
803 dev->bmmio = (u8 __iomem *)dev->lmmio;
804
805 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
806 dev->name, dev->pci->subsystem_vendor,
807 dev->pci->subsystem_device, cx23885_boards[dev->board].name,
808 dev->board, card[dev->nr] == dev->board ?
809 "insmod option" : "autodetected");
810
811 cx23885_pci_quirks(dev);
812
813 /* init hardware */
814 cx23885_reset(dev);
815
816 cx23885_i2c_register(&dev->i2c_bus[0]);
817 cx23885_i2c_register(&dev->i2c_bus[1]);
818 cx23885_i2c_register(&dev->i2c_bus[2]);
819 cx23885_call_i2c_clients (&dev->i2c_bus[0], TUNER_SET_STANDBY, NULL);
820 cx23885_card_setup(dev);
821 cx23885_ir_init(dev);
822
823 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) {
824 if (cx23885_dvb_register(&dev->ts1) < 0) {
825 printk(KERN_ERR "%s() Failed to register dvb adapters on VID_B\n",
826 __FUNCTION__);
827 }
828 }
829
830 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB) {
831 if (cx23885_dvb_register(&dev->ts2) < 0) {
832 printk(KERN_ERR "%s() Failed to register dvb adapters on VID_C\n",
833 __FUNCTION__);
834 }
835 }
836
837 return 0;
838
839fail_free:
840 kfree(dev);
841 return -ENODEV;
842}
843
844void cx23885_dev_unregister(struct cx23885_dev *dev)
845{
846 release_mem_region(pci_resource_start(dev->pci,0),
847 pci_resource_len(dev->pci,0));
848
849 if (!atomic_dec_and_test(&dev->refcount))
850 return;
851
852 if(cx23885_boards[dev->board].portb == CX23885_MPEG_DVB)
853 cx23885_dvb_unregister(&dev->ts1);
854
855 if(cx23885_boards[dev->board].portc == CX23885_MPEG_DVB)
856 cx23885_dvb_unregister(&dev->ts2);
857
858 cx23885_i2c_unregister(&dev->i2c_bus[2]);
859 cx23885_i2c_unregister(&dev->i2c_bus[1]);
860 cx23885_i2c_unregister(&dev->i2c_bus[0]);
861
862 iounmap(dev->lmmio);
863}
864
865static u32* cx23885_risc_field(u32 *rp, struct scatterlist *sglist,
866 unsigned int offset, u32 sync_line,
867 unsigned int bpl, unsigned int padding,
868 unsigned int lines)
869{
870 struct scatterlist *sg;
871 unsigned int line, todo;
872
873 /* sync instruction */
874 if (sync_line != NO_SYNC_LINE)
875 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
876
877 /* scan lines */
878 sg = sglist;
879 for (line = 0; line < lines; line++) {
880 while (offset && offset >= sg_dma_len(sg)) {
881 offset -= sg_dma_len(sg);
882 sg++;
883 }
884 if (bpl <= sg_dma_len(sg)-offset) {
885 /* fits into current chunk */
886 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
887 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
888 *(rp++)=cpu_to_le32(0); /* bits 63-32 */
889 offset+=bpl;
890 } else {
891 /* scanline needs to be split */
892 todo = bpl;
893 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
894 (sg_dma_len(sg)-offset));
895 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
896 *(rp++)=cpu_to_le32(0); /* bits 63-32 */
897 todo -= (sg_dma_len(sg)-offset);
898 offset = 0;
899 sg++;
900 while (todo > sg_dma_len(sg)) {
901 *(rp++)=cpu_to_le32(RISC_WRITE|
902 sg_dma_len(sg));
903 *(rp++)=cpu_to_le32(sg_dma_address(sg));
904 *(rp++)=cpu_to_le32(0); /* bits 63-32 */
905 todo -= sg_dma_len(sg);
906 sg++;
907 }
908 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_EOL|todo);
909 *(rp++)=cpu_to_le32(sg_dma_address(sg));
910 *(rp++)=cpu_to_le32(0); /* bits 63-32 */
911 offset += todo;
912 }
913 offset += padding;
914 }
915
916 return rp;
917}
918
919int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
920 struct scatterlist *sglist, unsigned int top_offset,
921 unsigned int bottom_offset, unsigned int bpl,
922 unsigned int padding, unsigned int lines)
923{
924 u32 instructions, fields;
925 u32 *rp;
926 int rc;
927
928 fields = 0;
929 if (UNSET != top_offset)
930 fields++;
931 if (UNSET != bottom_offset)
932 fields++;
933
934 /* estimate risc mem: worst case is one write per page border +
935 one write per scan line + syncs + jump (all 2 dwords). Padding
936 can cause next bpl to start close to a page border. First DMA
937 region may be smaller than PAGE_SIZE */
938 /* write and jump need and extra dword */
939 instructions = fields * (1 + ((bpl + padding) * lines) / PAGE_SIZE + lines);
940 instructions += 2;
941 if ((rc = btcx_riscmem_alloc(pci,risc,instructions*12)) < 0)
942 return rc;
943
944 /* write risc instructions */
945 rp = risc->cpu;
946 if (UNSET != top_offset)
947 rp = cx23885_risc_field(rp, sglist, top_offset, 0,
948 bpl, padding, lines);
949 if (UNSET != bottom_offset)
950 rp = cx23885_risc_field(rp, sglist, bottom_offset, 0x200,
951 bpl, padding, lines);
952
953 /* save pointer to jmp instruction address */
954 risc->jmp = rp;
955 BUG_ON((risc->jmp - risc->cpu + 2) * sizeof (*risc->cpu) > risc->size);
956 return 0;
957}
958
959int cx23885_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
960 struct scatterlist *sglist, unsigned int bpl,
961 unsigned int lines)
962{
963 u32 instructions;
964 u32 *rp;
965 int rc;
966
967 /* estimate risc mem: worst case is one write per page border +
968 one write per scan line + syncs + jump (all 2 dwords). Here
969 there is no padding and no sync. First DMA region may be smaller
970 than PAGE_SIZE */
971 /* Jump and write need an extra dword */
972 instructions = 1 + (bpl * lines) / PAGE_SIZE + lines;
973 instructions += 1;
974
975 if ((rc = btcx_riscmem_alloc(pci,risc,instructions*12)) < 0)
976 return rc;
977
978 /* write risc instructions */
979 rp = risc->cpu;
980 rp = cx23885_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines);
981
982 /* save pointer to jmp instruction address */
983 risc->jmp = rp;
984 BUG_ON((risc->jmp - risc->cpu + 2) * sizeof (*risc->cpu) > risc->size);
985 return 0;
986}
987
988int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
989 u32 reg, u32 mask, u32 value)
990{
991 u32 *rp;
992 int rc;
993
994 if ((rc = btcx_riscmem_alloc(pci, risc, 4*16)) < 0)
995 return rc;
996
997 /* write risc instructions */
998 rp = risc->cpu;
999 *(rp++) = cpu_to_le32(RISC_WRITECR | RISC_IRQ2);
1000 *(rp++) = cpu_to_le32(reg);
1001 *(rp++) = cpu_to_le32(value);
1002 *(rp++) = cpu_to_le32(mask);
1003 *(rp++) = cpu_to_le32(RISC_JUMP);
1004 *(rp++) = cpu_to_le32(risc->dma);
1005 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
1006 return 0;
1007}
1008
1009void cx23885_free_buffer(struct videobuf_queue *q, struct cx23885_buffer *buf)
1010{
1011 struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb);
1012
1013 BUG_ON(in_interrupt());
1014 videobuf_waiton(&buf->vb, 0, 0);
1015 videobuf_dma_unmap(q, dma);
1016 videobuf_dma_free(dma);
1017 btcx_riscmem_free((struct pci_dev *)q->dev, &buf->risc);
1018 buf->vb.state = STATE_NEEDS_INIT;
1019}
1020
1021static int cx23885_start_dma(struct cx23885_tsport *port,
1022 struct cx23885_dmaqueue *q,
1023 struct cx23885_buffer *buf)
1024{
1025 struct cx23885_dev *dev = port->dev;
1026
1027 dprintk(1, "%s() w: %d, h: %d, f: %d\n", __FUNCTION__,
1028 buf->vb.width, buf->vb.height, buf->vb.field);
1029
1030 /* setup fifo + format */
1031 cx23885_sram_channel_setup(dev,
1032 &dev->sram_channels[ port->sram_chno ],
1033 port->ts_packet_size, buf->risc.dma);
1034 if(debug > 5) {
1035 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ] );
1036 cx23885_risc_disasm(port, &buf->risc);
1037 }
1038
1039 /* write TS length to chip */
1040 cx_write(port->reg_lngth, buf->vb.width);
1041
1042 if ( (!(cx23885_boards[dev->board].portb & CX23885_MPEG_DVB)) &&
1043 (!(cx23885_boards[dev->board].portc & CX23885_MPEG_DVB)) ) {
1044 printk( "%s() Failed. Unsupported value in .portb/c (0x%08x)/(0x%08x)\n",
1045 __FUNCTION__,
1046 cx23885_boards[dev->board].portb,
1047 cx23885_boards[dev->board].portc );
1048 return -EINVAL;
1049 }
1050
1051 udelay(100);
1052
1053 /* If the port supports SRC SELECT, configure it */
1054 if(port->reg_src_sel)
1055 cx_write(port->reg_src_sel, port->src_sel_val);
1056
1057 cx_write(port->reg_hw_sop_ctrl, 0x47 << 16 | 188 << 4);
1058 cx_write(port->reg_ts_clk_en, port->ts_clk_en_val);
1059 cx_write(port->reg_vld_misc, 0x00);
1060 cx_write(port->reg_gen_ctrl, port->gen_ctrl_val);
1061 udelay(100);
1062
1063 // NOTE: this is 2 (reserved) for portb, does it matter?
1064 /* reset counter to zero */
1065 cx_write(port->reg_gpcnt_ctl, 3);
1066 q->count = 1;
1067
1068 switch(dev->bridge) {
1069 case CX23885_BRIDGE_885:
1070 case CX23885_BRIDGE_887:
1071 /* enable irqs */
1072 dprintk(1, "%s() enabling TS int's and DMA\n", __FUNCTION__ );
1073 cx_set(port->reg_ts_int_msk, port->ts_int_msk_val);
1074 cx_set(port->reg_dma_ctl, port->dma_ctl_val);
1075 cx_set(PCI_INT_MSK, dev->pci_irqmask | port->pci_irqmask);
1076 break;
1077 default:
1078 BUG();
1079 }
1080
1081 cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */
1082
1083 return 0;
1084}
1085
1086static int cx23885_stop_dma(struct cx23885_tsport *port)
1087{
1088 struct cx23885_dev *dev = port->dev;
1089 dprintk(1, "%s()\n", __FUNCTION__);
1090
1091 /* Stop interrupts and DMA */
1092 cx_clear(port->reg_ts_int_msk, port->ts_int_msk_val);
1093 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1094
1095 return 0;
1096}
1097
1098static int cx23885_restart_queue(struct cx23885_tsport *port,
1099 struct cx23885_dmaqueue *q)
1100{
1101 struct cx23885_dev *dev = port->dev;
1102 struct cx23885_buffer *buf;
1103
1104 dprintk(5, "%s()\n", __FUNCTION__);
1105 if (list_empty(&q->active))
1106 {
1107 struct cx23885_buffer *prev;
1108 prev = NULL;
1109
1110 dprintk(5, "%s() queue is empty\n", __FUNCTION__);
1111
1112 for (;;) {
1113 if (list_empty(&q->queued))
1114 return 0;
1115 buf = list_entry(q->queued.next, struct cx23885_buffer,
1116 vb.queue);
1117 if (NULL == prev) {
1118 list_del(&buf->vb.queue);
1119 list_add_tail(&buf->vb.queue, &q->active);
1120 cx23885_start_dma(port, q, buf);
1121 buf->vb.state = STATE_ACTIVE;
1122 buf->count = q->count++;
1123 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
1124 dprintk(5, "[%p/%d] restart_queue - first active\n",
1125 buf, buf->vb.i);
1126
1127 } else if (prev->vb.width == buf->vb.width &&
1128 prev->vb.height == buf->vb.height &&
1129 prev->fmt == buf->fmt) {
1130 list_del(&buf->vb.queue);
1131 list_add_tail(&buf->vb.queue, &q->active);
1132 buf->vb.state = STATE_ACTIVE;
1133 buf->count = q->count++;
1134 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
1135 prev->risc.jmp[2] = cpu_to_le32(0); /* 64 bit bits 63-32 */
1136 dprintk(5,"[%p/%d] restart_queue - move to active\n",
1137 buf, buf->vb.i);
1138 } else {
1139 return 0;
1140 }
1141 prev = buf;
1142 }
1143 return 0;
1144 }
1145
1146 buf = list_entry(q->active.next, struct cx23885_buffer, vb.queue);
1147 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
1148 buf, buf->vb.i);
1149 cx23885_start_dma(port, q, buf);
1150 list_for_each_entry(buf, &q->active, vb.queue)
1151 buf->count = q->count++;
1152 mod_timer(&q->timeout, jiffies + BUFFER_TIMEOUT);
1153 return 0;
1154}
1155
1156/* ------------------------------------------------------------------ */
1157
1158int cx23885_buf_prepare(struct videobuf_queue *q, struct cx23885_tsport *port,
1159 struct cx23885_buffer *buf, enum v4l2_field field)
1160{
1161 struct cx23885_dev *dev = port->dev;
1162 int size = port->ts_packet_size * port->ts_packet_count;
1163 int rc;
1164
1165 dprintk(1, "%s: %p\n", __FUNCTION__, buf);
1166 if (0 != buf->vb.baddr && buf->vb.bsize < size)
1167 return -EINVAL;
1168
1169 if (STATE_NEEDS_INIT == buf->vb.state) {
1170 buf->vb.width = port->ts_packet_size;
1171 buf->vb.height = port->ts_packet_count;
1172 buf->vb.size = size;
1173 buf->vb.field = field /*V4L2_FIELD_TOP*/;
1174
1175 if (0 != (rc = videobuf_iolock(q, &buf->vb, NULL)))
1176 goto fail;
1177 cx23885_risc_databuffer(dev->pci, &buf->risc,
1178 videobuf_to_dma(&buf->vb)->sglist,
1179 buf->vb.width, buf->vb.height);
1180 }
1181 buf->vb.state = STATE_PREPARED;
1182 return 0;
1183
1184 fail:
1185 cx23885_free_buffer(q, buf);
1186 return rc;
1187}
1188
1189void cx23885_buf_queue(struct cx23885_tsport *port, struct cx23885_buffer *buf)
1190{
1191 struct cx23885_buffer *prev;
1192 struct cx23885_dev *dev = port->dev;
1193 struct cx23885_dmaqueue *cx88q = &port->mpegq;
1194
1195 /* add jump to stopper */
1196 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
1197 buf->risc.jmp[1] = cpu_to_le32(cx88q->stopper.dma);
1198 buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
1199
1200 if (list_empty(&cx88q->active)) {
1201 dprintk( 1, "queue is empty - first active\n" );
1202 list_add_tail(&buf->vb.queue, &cx88q->active);
1203 cx23885_start_dma(port, cx88q, buf);
1204 buf->vb.state = STATE_ACTIVE;
1205 buf->count = cx88q->count++;
1206 mod_timer(&cx88q->timeout, jiffies + BUFFER_TIMEOUT);
1207 dprintk(1, "[%p/%d] %s - first active\n",
1208 buf, buf->vb.i, __FUNCTION__);
1209 } else {
1210 dprintk( 1, "queue is not empty - append to active\n" );
1211 prev = list_entry(cx88q->active.prev, struct cx23885_buffer,
1212 vb.queue);
1213 list_add_tail(&buf->vb.queue, &cx88q->active);
1214 buf->vb.state = STATE_ACTIVE;
1215 buf->count = cx88q->count++;
1216 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
1217 prev->risc.jmp[2] = cpu_to_le32(0); /* 64 bit bits 63-32 */
1218 dprintk( 1, "[%p/%d] %s - append to active\n",
1219 buf, buf->vb.i, __FUNCTION__);
1220 }
1221}
1222
1223/* ----------------------------------------------------------- */
1224
1225static void do_cancel_buffers(struct cx23885_tsport *port, char *reason,
1226 int restart)
1227{
1228 struct cx23885_dev *dev = port->dev;
1229 struct cx23885_dmaqueue *q = &port->mpegq;
1230 struct cx23885_buffer *buf;
1231 unsigned long flags;
1232
1233 spin_lock_irqsave(&port->slock, flags);
1234 while (!list_empty(&q->active)) {
1235 buf = list_entry(q->active.next, struct cx23885_buffer,
1236 vb.queue);
1237 list_del(&buf->vb.queue);
1238 buf->vb.state = STATE_ERROR;
1239 wake_up(&buf->vb.done);
1240 dprintk(1, "[%p/%d] %s - dma=0x%08lx\n",
1241 buf, buf->vb.i, reason, (unsigned long)buf->risc.dma);
1242 }
1243 if (restart) {
1244 dprintk(1, "restarting queue\n" );
1245 cx23885_restart_queue(port, q);
1246 }
1247 spin_unlock_irqrestore(&port->slock, flags);
1248}
1249
1250void cx23885_cancel_buffers(struct cx23885_tsport *port)
1251{
1252 struct cx23885_dev *dev = port->dev;
1253 struct cx23885_dmaqueue *q = &port->mpegq;
1254
1255 dprintk(1, "%s()\n", __FUNCTION__);
1256 del_timer_sync(&q->timeout);
1257 cx23885_stop_dma(port);
1258 do_cancel_buffers(port, "cancel", 0);
1259}
1260
1261static void cx23885_timeout(unsigned long data)
1262{
1263 struct cx23885_tsport *port = (struct cx23885_tsport *)data;
1264 struct cx23885_dev *dev = port->dev;
1265
1266 dprintk(1, "%s()\n",__FUNCTION__);
1267
1268 if (debug > 5)
1269 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
1270
1271 cx23885_stop_dma(port);
1272 do_cancel_buffers(port, "timeout", 1);
1273}
1274
1275static int cx23885_irq_ts(struct cx23885_tsport *port, u32 status)
1276{
1277 struct cx23885_dev *dev = port->dev;
1278 int handled = 0;
1279 u32 count;
1280
1281 if ( (status & VID_BC_MSK_OPC_ERR) ||
1282 (status & VID_BC_MSK_BAD_PKT) ||
1283 (status & VID_BC_MSK_SYNC) ||
1284 (status & VID_BC_MSK_OF))
1285 {
1286 if (status & VID_BC_MSK_OPC_ERR)
1287 dprintk(7, " (VID_BC_MSK_OPC_ERR 0x%08x)\n", VID_BC_MSK_OPC_ERR);
1288 if (status & VID_BC_MSK_BAD_PKT)
1289 dprintk(7, " (VID_BC_MSK_BAD_PKT 0x%08x)\n", VID_BC_MSK_BAD_PKT);
1290 if (status & VID_BC_MSK_SYNC)
1291 dprintk(7, " (VID_BC_MSK_SYNC 0x%08x)\n", VID_BC_MSK_SYNC);
1292 if (status & VID_BC_MSK_OF)
1293 dprintk(7, " (VID_BC_MSK_OF 0x%08x)\n", VID_BC_MSK_OF);
1294
1295 printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name);
1296
1297 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1298 cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
1299
1300 } else if (status & VID_BC_MSK_RISCI1) {
1301
1302 dprintk(7, " (RISCI1 0x%08x)\n", VID_BC_MSK_RISCI1);
1303
1304 spin_lock(&port->slock);
1305 count = cx_read(port->reg_gpcnt);
1306 cx23885_wakeup(port, &port->mpegq, count);
1307 spin_unlock(&port->slock);
1308
1309 } else if (status & VID_BC_MSK_RISCI2) {
1310
1311 dprintk(7, " (RISCI2 0x%08x)\n", VID_BC_MSK_RISCI2);
1312
1313 spin_lock(&port->slock);
1314 cx23885_restart_queue(port, &port->mpegq);
1315 spin_unlock(&port->slock);
1316
1317 }
1318 if (status) {
1319 cx_write(port->reg_ts_int_stat, status);
1320 handled = 1;
1321 }
1322
1323 return handled;
1324}
1325
1326static irqreturn_t cx23885_irq(int irq, void *dev_id)
1327{
1328 struct cx23885_dev *dev = dev_id;
1329 struct cx23885_tsport *ts1 = &dev->ts1;
1330 struct cx23885_tsport *ts2 = &dev->ts2;
1331 u32 pci_status, pci_mask;
1332 u32 ts1_status, ts1_mask;
1333 u32 ts2_status, ts2_mask;
1334 int ts1_count = 0, ts2_count = 0, handled = 0;
1335
1336 pci_status = cx_read(PCI_INT_STAT);
1337 pci_mask = cx_read(PCI_INT_MSK);
1338 ts1_status = cx_read(VID_B_INT_STAT);
1339 ts1_mask = cx_read(VID_B_INT_MSK);
1340 ts2_status = cx_read(VID_C_INT_STAT);
1341 ts2_mask = cx_read(VID_C_INT_MSK);
1342
1343 if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) )
1344 goto out;
1345
1346 ts1_count = cx_read(ts1->reg_gpcnt);
1347 ts2_count = cx_read(ts2->reg_gpcnt);
1348 dprintk(7, "pci_status: 0x%08x pci_mask: 0x%08x\n", pci_status, pci_mask );
1349 dprintk(7, "ts1_status: 0x%08x ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, ts1_count );
1350 dprintk(7, "ts2_status: 0x%08x ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, ts2_count );
1351
1352 if ( (pci_status & PCI_MSK_RISC_RD) ||
1353 (pci_status & PCI_MSK_RISC_WR) ||
1354 (pci_status & PCI_MSK_AL_RD) ||
1355 (pci_status & PCI_MSK_AL_WR) ||
1356 (pci_status & PCI_MSK_APB_DMA) ||
1357 (pci_status & PCI_MSK_VID_C) ||
1358 (pci_status & PCI_MSK_VID_B) ||
1359 (pci_status & PCI_MSK_VID_A) ||
1360 (pci_status & PCI_MSK_AUD_INT) ||
1361 (pci_status & PCI_MSK_AUD_EXT) )
1362 {
1363
1364 if (pci_status & PCI_MSK_RISC_RD)
1365 dprintk(7, " (PCI_MSK_RISC_RD 0x%08x)\n", PCI_MSK_RISC_RD);
1366 if (pci_status & PCI_MSK_RISC_WR)
1367 dprintk(7, " (PCI_MSK_RISC_WR 0x%08x)\n", PCI_MSK_RISC_WR);
1368 if (pci_status & PCI_MSK_AL_RD)
1369 dprintk(7, " (PCI_MSK_AL_RD 0x%08x)\n", PCI_MSK_AL_RD);
1370 if (pci_status & PCI_MSK_AL_WR)
1371 dprintk(7, " (PCI_MSK_AL_WR 0x%08x)\n", PCI_MSK_AL_WR);
1372 if (pci_status & PCI_MSK_APB_DMA)
1373 dprintk(7, " (PCI_MSK_APB_DMA 0x%08x)\n", PCI_MSK_APB_DMA);
1374 if (pci_status & PCI_MSK_VID_C)
1375 dprintk(7, " (PCI_MSK_VID_C 0x%08x)\n", PCI_MSK_VID_C);
1376 if (pci_status & PCI_MSK_VID_B)
1377 dprintk(7, " (PCI_MSK_VID_B 0x%08x)\n", PCI_MSK_VID_B);
1378 if (pci_status & PCI_MSK_VID_A)
1379 dprintk(7, " (PCI_MSK_VID_A 0x%08x)\n", PCI_MSK_VID_A);
1380 if (pci_status & PCI_MSK_AUD_INT)
1381 dprintk(7, " (PCI_MSK_AUD_INT 0x%08x)\n", PCI_MSK_AUD_INT);
1382 if (pci_status & PCI_MSK_AUD_EXT)
1383 dprintk(7, " (PCI_MSK_AUD_EXT 0x%08x)\n", PCI_MSK_AUD_EXT);
1384
1385 }
1386
1387 if (ts1_status)
1388 handled += cx23885_irq_ts(ts1, ts1_status);
1389
1390 if (ts2_status)
1391 handled += cx23885_irq_ts(ts2, ts2_status);
1392
1393 if (handled)
1394 cx_write(PCI_INT_STAT, pci_status);
1395out:
1396 return IRQ_RETVAL(handled);
1397}
1398
1399static int __devinit cx23885_initdev(struct pci_dev *pci_dev,
1400 const struct pci_device_id *pci_id)
1401{
1402 struct cx23885_dev *dev;
1403 int err;
1404
1405 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1406 if (NULL == dev)
1407 return -ENOMEM;
1408
1409 /* pci init */
1410 dev->pci = pci_dev;
1411 if (pci_enable_device(pci_dev)) {
1412 err = -EIO;
1413 goto fail_free;
1414 }
1415
1416 if (cx23885_dev_setup(dev) < 0) {
1417 err = -EINVAL;
1418 goto fail_free;
1419 }
1420
1421 /* print pci info */
1422 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
1423 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1424 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1425 "latency: %d, mmio: 0x%llx\n", dev->name,
1426 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1427 dev->pci_lat, (unsigned long long)pci_resource_start(pci_dev,0));
1428
1429 pci_set_master(pci_dev);
1430 if (!pci_dma_supported(pci_dev, 0xffffffff)) {
1431 printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1432 err = -EIO;
1433 goto fail_irq;
1434 }
1435
1436 err = request_irq(pci_dev->irq, cx23885_irq,
1437 IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
1438 if (err < 0) {
1439 printk(KERN_ERR "%s: can't get IRQ %d\n",
1440 dev->name, pci_dev->irq);
1441 goto fail_irq;
1442 }
1443
1444 pci_set_drvdata(pci_dev, dev);
1445 return 0;
1446
1447fail_irq:
1448 cx23885_dev_unregister(dev);
1449fail_free:
1450 kfree(dev);
1451 return err;
1452}
1453
1454static void __devexit cx23885_finidev(struct pci_dev *pci_dev)
1455{
1456 struct cx23885_dev *dev = pci_get_drvdata(pci_dev);
1457
1458 cx23885_shutdown(dev);
1459
1460 pci_disable_device(pci_dev);
1461
1462 /* unregister stuff */
1463 free_irq(pci_dev->irq, dev);
1464 pci_set_drvdata(pci_dev, NULL);
1465
1466 mutex_lock(&devlist);
1467 list_del(&dev->devlist);
1468 mutex_unlock(&devlist);
1469
1470 cx23885_dev_unregister(dev);
1471 kfree(dev);
1472}
1473
1474static struct pci_device_id cx23885_pci_tbl[] = {
1475 {
1476 /* CX23885 */
1477 .vendor = 0x14f1,
1478 .device = 0x8852,
1479 .subvendor = PCI_ANY_ID,
1480 .subdevice = PCI_ANY_ID,
1481 },{
1482 /* CX23887 Rev 2 */
1483 .vendor = 0x14f1,
1484 .device = 0x8880,
1485 .subvendor = PCI_ANY_ID,
1486 .subdevice = PCI_ANY_ID,
1487 },{
1488 /* --- end of list --- */
1489 }
1490};
1491MODULE_DEVICE_TABLE(pci, cx23885_pci_tbl);
1492
1493static struct pci_driver cx23885_pci_driver = {
1494 .name = "cx23885",
1495 .id_table = cx23885_pci_tbl,
1496 .probe = cx23885_initdev,
1497 .remove = __devexit_p(cx23885_finidev),
1498 /* TODO */
1499 .suspend = NULL,
1500 .resume = NULL,
1501};
1502
1503static int cx23885_init(void)
1504{
1505 printk(KERN_INFO "cx23885 driver version %d.%d.%d loaded\n",
1506 (CX23885_VERSION_CODE >> 16) & 0xff,
1507 (CX23885_VERSION_CODE >> 8) & 0xff,
1508 CX23885_VERSION_CODE & 0xff);
1509#ifdef SNAPSHOT
1510 printk(KERN_INFO "cx23885: snapshot date %04d-%02d-%02d\n",
1511 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1512#endif
1513 return pci_register_driver(&cx23885_pci_driver);
1514}
1515
1516static void cx23885_fini(void)
1517{
1518 pci_unregister_driver(&cx23885_pci_driver);
1519}
1520
1521module_init(cx23885_init);
1522module_exit(cx23885_fini);
1523
1524/* ----------------------------------------------------------- */
1525/*
1526 * Local variables:
1527 * c-basic-offset: 8
1528 * End:
1529 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1530 */
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
new file mode 100644
index 000000000000..eda8c05d0931
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -0,0 +1,213 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/fs.h>
26#include <linux/kthread.h>
27#include <linux/file.h>
28#include <linux/suspend.h>
29
30#include "cx23885.h"
31#include <media/v4l2-common.h>
32
33#include "s5h1409.h"
34#include "mt2131.h"
35#include "lgdt330x.h"
36#include "dvb-pll.h"
37
38static unsigned int debug = 0;
39
40#define dprintk(level,fmt, arg...) if (debug >= level) \
41 printk(KERN_DEBUG "%s: " fmt, dev->name, ## arg)
42
43/* ------------------------------------------------------------------ */
44
45static int dvb_buf_setup(struct videobuf_queue *q,
46 unsigned int *count, unsigned int *size)
47{
48 struct cx23885_tsport *port = q->priv_data;
49
50 port->ts_packet_size = 188 * 4;
51 port->ts_packet_count = 32;
52
53 *size = port->ts_packet_size * port->ts_packet_count;
54 *count = 32;
55 return 0;
56}
57
58static int dvb_buf_prepare(struct videobuf_queue *q,
59 struct videobuf_buffer *vb, enum v4l2_field field)
60{
61 struct cx23885_tsport *port = q->priv_data;
62 return cx23885_buf_prepare(q, port, (struct cx23885_buffer*)vb, field);
63}
64
65static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
66{
67 struct cx23885_tsport *port = q->priv_data;
68 cx23885_buf_queue(port, (struct cx23885_buffer*)vb);
69}
70
71static void dvb_buf_release(struct videobuf_queue *q,
72 struct videobuf_buffer *vb)
73{
74 cx23885_free_buffer(q, (struct cx23885_buffer*)vb);
75}
76
77static struct videobuf_queue_ops dvb_qops = {
78 .buf_setup = dvb_buf_setup,
79 .buf_prepare = dvb_buf_prepare,
80 .buf_queue = dvb_buf_queue,
81 .buf_release = dvb_buf_release,
82};
83
84static struct s5h1409_config hauppauge_generic_config = {
85 .demod_address = 0x32 >> 1,
86 .output_mode = S5H1409_SERIAL_OUTPUT,
87 .gpio = S5H1409_GPIO_ON,
88 .if_freq = 44000,
89 .inversion = S5H1409_INVERSION_OFF,
90 .status_mode = S5H1409_DEMODLOCKING
91};
92
93static struct s5h1409_config hauppauge_hvr1800lp_config = {
94 .demod_address = 0x32 >> 1,
95 .output_mode = S5H1409_SERIAL_OUTPUT,
96 .gpio = S5H1409_GPIO_OFF,
97 .if_freq = 44000,
98 .inversion = S5H1409_INVERSION_OFF,
99 .status_mode = S5H1409_DEMODLOCKING
100};
101
102static struct mt2131_config hauppauge_generic_tunerconfig = {
103 0x61
104};
105
106static struct lgdt330x_config fusionhdtv_5_express = {
107 .demod_address = 0x0e,
108 .demod_chip = LGDT3303,
109 .serial_mpeg = 0x40,
110};
111
112static int dvb_register(struct cx23885_tsport *port)
113{
114 struct cx23885_dev *dev = port->dev;
115 struct cx23885_i2c *i2c_bus = NULL;
116
117 /* init struct videobuf_dvb */
118 port->dvb.name = dev->name;
119
120 /* init frontend */
121 switch (dev->board) {
122 case CX23885_BOARD_HAUPPAUGE_HVR1250:
123 case CX23885_BOARD_HAUPPAUGE_HVR1800:
124 i2c_bus = &dev->i2c_bus[0];
125 port->dvb.frontend = dvb_attach(s5h1409_attach,
126 &hauppauge_generic_config,
127 &i2c_bus->i2c_adap);
128 if (port->dvb.frontend != NULL) {
129 dvb_attach(mt2131_attach, port->dvb.frontend,
130 &i2c_bus->i2c_adap,
131 &hauppauge_generic_tunerconfig, 0);
132 }
133 break;
134 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
135 i2c_bus = &dev->i2c_bus[0];
136 port->dvb.frontend = dvb_attach(s5h1409_attach,
137 &hauppauge_hvr1800lp_config,
138 &i2c_bus->i2c_adap);
139 if (port->dvb.frontend != NULL) {
140 dvb_attach(mt2131_attach, port->dvb.frontend,
141 &i2c_bus->i2c_adap,
142 &hauppauge_generic_tunerconfig, 0);
143 }
144 break;
145 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
146 i2c_bus = &dev->i2c_bus[0];
147 port->dvb.frontend = dvb_attach(lgdt330x_attach,
148 &fusionhdtv_5_express,
149 &i2c_bus->i2c_adap);
150 if (port->dvb.frontend != NULL) {
151 dvb_attach(dvb_pll_attach, port->dvb.frontend, 0x61,
152 &i2c_bus->i2c_adap, DVB_PLL_LG_TDVS_H06XF);
153 }
154 break;
155 default:
156 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
157 dev->name);
158 break;
159 }
160 if (NULL == port->dvb.frontend) {
161 printk("%s: frontend initialization failed\n", dev->name);
162 return -1;
163 }
164
165 /* Put the analog decoder in standby to keep it quiet */
166 cx23885_call_i2c_clients(i2c_bus, TUNER_SET_STANDBY, NULL);
167
168 /* register everything */
169 return videobuf_dvb_register(&port->dvb, THIS_MODULE, port,
170 &dev->pci->dev);
171}
172
173int cx23885_dvb_register(struct cx23885_tsport *port)
174{
175 struct cx23885_dev *dev = port->dev;
176 int err;
177
178 dprintk(1, "%s\n", __FUNCTION__);
179 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
180 dev->board,
181 dev->name,
182 dev->pci_bus,
183 dev->pci_slot);
184
185 err = -ENODEV;
186
187 /* dvb stuff */
188 printk("%s: cx23885 based dvb card\n", dev->name);
189 videobuf_queue_pci_init(&port->dvb.dvbq, &dvb_qops, dev->pci, &port->slock,
190 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
191 sizeof(struct cx23885_buffer), port);
192 err = dvb_register(port);
193 if (err != 0)
194 printk("%s() dvb_register failed err = %d\n", __FUNCTION__, err);
195
196 return err;
197}
198
199int cx23885_dvb_unregister(struct cx23885_tsport *port)
200{
201 /* dvb */
202 if(port->dvb.frontend)
203 videobuf_dvb_unregister(&port->dvb);
204
205 return 0;
206}
207
208/*
209 * Local variables:
210 * c-basic-offset: 8
211 * End:
212 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
213*/
diff --git a/drivers/media/video/cx23885/cx23885-i2c.c b/drivers/media/video/cx23885/cx23885-i2c.c
new file mode 100644
index 000000000000..b517c8b5a566
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-i2c.c
@@ -0,0 +1,382 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <asm/io.h>
27
28#include "cx23885.h"
29
30#include <media/v4l2-common.h>
31
32static unsigned int i2c_debug = 0;
33module_param(i2c_debug, int, 0644);
34MODULE_PARM_DESC(i2c_debug, "enable debug messages [i2c]");
35
36static unsigned int i2c_scan = 0;
37module_param(i2c_scan, int, 0444);
38MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
39
40#define dprintk(level,fmt, arg...) if (i2c_debug >= level) \
41 printk(KERN_DEBUG "%s: " fmt, dev->name , ## arg)
42
43#define I2C_WAIT_DELAY 32
44#define I2C_WAIT_RETRY 64
45
46#define I2C_EXTEND (1 << 3)
47#define I2C_NOSTOP (1 << 4)
48
49static inline int i2c_slave_did_ack(struct i2c_adapter *i2c_adap)
50{
51 struct cx23885_i2c *bus = i2c_adap->algo_data;
52 struct cx23885_dev *dev = bus->dev;
53 return cx_read(bus->reg_stat) & 0x01;
54}
55
56static inline int i2c_is_busy(struct i2c_adapter *i2c_adap)
57{
58 struct cx23885_i2c *bus = i2c_adap->algo_data;
59 struct cx23885_dev *dev = bus->dev;
60 return cx_read(bus->reg_stat) & 0x02 ? 1 : 0;
61}
62
63static int i2c_wait_done(struct i2c_adapter *i2c_adap)
64{
65 int count;
66
67 for (count = 0; count < I2C_WAIT_RETRY; count++) {
68 if (!i2c_is_busy(i2c_adap))
69 break;
70 udelay(I2C_WAIT_DELAY);
71 }
72
73 if (I2C_WAIT_RETRY == count)
74 return 0;
75
76 return 1;
77}
78
79static int i2c_sendbytes(struct i2c_adapter *i2c_adap,
80 const struct i2c_msg *msg, int last)
81{
82 struct cx23885_i2c *bus = i2c_adap->algo_data;
83 struct cx23885_dev *dev = bus->dev;
84 u32 wdata, addr, ctrl;
85 int retval, cnt;
86
87 dprintk(1, "%s()\n", __FUNCTION__);
88 /* Deal with i2c probe functions with zero payload */
89 if (msg->len == 0) {
90 cx_write(bus->reg_addr, msg->addr << 25);
91 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2));
92 if (!i2c_wait_done(i2c_adap))
93 return -EIO;
94 if (!i2c_slave_did_ack(i2c_adap))
95 return -EIO;
96
97 dprintk(1, "%s() returns 0\n", __FUNCTION__);
98 return 0;
99 }
100
101
102 /* dev, reg + first byte */
103 addr = (msg->addr << 25) | msg->buf[0];
104 wdata = msg->buf[0];
105 ctrl = bus->i2c_period | (1 << 12) | (1 << 2);
106
107 if (msg->len > 1)
108 ctrl |= I2C_NOSTOP | I2C_EXTEND;
109
110 cx_write(bus->reg_addr, addr);
111 cx_write(bus->reg_wdata, wdata);
112 cx_write(bus->reg_ctrl, ctrl);
113
114 retval = i2c_wait_done(i2c_adap);
115 if (retval < 0)
116 goto err;
117 if (retval == 0)
118 goto eio;
119 if (i2c_debug) {
120 printk(" <W %02x %02x", msg->addr << 1, msg->buf[0]);
121 if (!(ctrl & I2C_NOSTOP))
122 printk(" >\n");
123 }
124
125 for (cnt = 1; cnt < msg->len; cnt++ ) {
126 /* following bytes */
127 wdata = msg->buf[cnt];
128 ctrl = bus->i2c_period | (1 << 12) | (1 << 2);
129
130 if (cnt < msg->len-1 || !last)
131 ctrl |= I2C_NOSTOP | I2C_EXTEND;
132
133 cx_write(bus->reg_addr, addr);
134 cx_write(bus->reg_wdata, wdata);
135 cx_write(bus->reg_ctrl, ctrl);
136
137 retval = i2c_wait_done(i2c_adap);
138 if (retval < 0)
139 goto err;
140 if (retval == 0)
141 goto eio;
142 if (i2c_debug) {
143 printk(" %02x", msg->buf[cnt]);
144 if (!(ctrl & I2C_NOSTOP))
145 printk(" >\n");
146 }
147 }
148 return msg->len;
149
150 eio:
151 retval = -EIO;
152 err:
153 printk(" ERR: %d\n", retval);
154 return retval;
155}
156
157static int i2c_readbytes(struct i2c_adapter *i2c_adap,
158 const struct i2c_msg *msg, int last)
159{
160 struct cx23885_i2c *bus = i2c_adap->algo_data;
161 struct cx23885_dev *dev = bus->dev;
162 u32 ctrl, cnt;
163 int retval;
164
165 dprintk(1, "%s()\n", __FUNCTION__);
166
167 /* Deal with i2c probe functions with zero payload */
168 if (msg->len == 0) {
169 cx_write(bus->reg_addr, msg->addr << 25);
170 cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1);
171 if (!i2c_wait_done(i2c_adap))
172 return -EIO;
173 if (!i2c_slave_did_ack(i2c_adap))
174 return -EIO;
175
176
177 dprintk(1, "%s() returns 0\n", __FUNCTION__);
178 return 0;
179 }
180
181 for(cnt = 0; cnt < msg->len; cnt++) {
182
183 ctrl = bus->i2c_period | (1 << 12) | (1 << 2) | 1;
184
185 if (cnt < msg->len-1 || !last)
186 ctrl |= I2C_NOSTOP | I2C_EXTEND;
187
188 cx_write(bus->reg_addr, msg->addr << 25);
189 cx_write(bus->reg_ctrl, ctrl);
190
191 retval = i2c_wait_done(i2c_adap);
192 if (retval < 0)
193 goto err;
194 if (retval == 0)
195 goto eio;
196 msg->buf[cnt] = cx_read(bus->reg_rdata) & 0xff;
197 if (i2c_debug) {
198 if (!(ctrl & I2C_NOSTOP))
199 printk(" <R %02x", (msg->addr << 1) +1);
200 printk(" =%02x", msg->buf[cnt]);
201 if (!(ctrl & I2C_NOSTOP))
202 printk(" >\n");
203 }
204 }
205 return msg->len;
206
207 eio:
208 retval = -EIO;
209 err:
210 printk(" ERR: %d\n", retval);
211 return retval;
212}
213
214static int i2c_xfer(struct i2c_adapter *i2c_adap,
215 struct i2c_msg *msgs, int num)
216{
217 struct cx23885_i2c *bus = i2c_adap->algo_data;
218 struct cx23885_dev *dev = bus->dev;
219 int i, retval = 0;
220
221 dprintk(1, "%s(num = %d)\n", __FUNCTION__, num);
222
223 for (i = 0 ; i < num; i++) {
224 dprintk(1, "%s(num = %d) addr = 0x%02x len = 0x%x\n",
225 __FUNCTION__, num, msgs[i].addr, msgs[i].len);
226 if (msgs[i].flags & I2C_M_RD) {
227 /* read */
228 retval = i2c_readbytes(i2c_adap, &msgs[i], i+1 == num);
229 if (retval < 0)
230 goto err;
231 } else {
232 /* write */
233 retval = i2c_sendbytes(i2c_adap, &msgs[i], i+1 == num);
234 if (retval < 0)
235 goto err;
236 }
237 }
238 return num;
239
240 err:
241 return retval;
242}
243
244static int attach_inform(struct i2c_client *client)
245{
246 struct cx23885_dev *dev = i2c_get_adapdata(client->adapter);
247
248 dprintk(1, "%s i2c attach [addr=0x%x,client=%s]\n",
249 client->driver->driver.name, client->addr, client->name);
250
251 if (!client->driver->command)
252 return 0;
253
254 return 0;
255}
256
257static int detach_inform(struct i2c_client *client)
258{
259 struct cx23885_dev *dev = i2c_get_adapdata(client->adapter);
260
261 dprintk(1, "i2c detach [client=%s]\n", client->name);
262
263 return 0;
264}
265
266void cx23885_call_i2c_clients(struct cx23885_i2c *bus,
267 unsigned int cmd, void *arg)
268{
269 if (bus->i2c_rc != 0)
270 return;
271
272 i2c_clients_command(&bus->i2c_adap, cmd, arg);
273}
274
275static int cx23885_algo_control(struct i2c_adapter *adap,
276 unsigned int cmd, unsigned long arg)
277{
278 return 0;
279}
280
281static u32 cx23885_functionality(struct i2c_adapter *adap)
282{
283 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
284}
285
286static struct i2c_algorithm cx23885_i2c_algo_template = {
287 .master_xfer = i2c_xfer,
288 .algo_control = cx23885_algo_control,
289 .functionality = cx23885_functionality,
290};
291
292/* ----------------------------------------------------------------------- */
293
294static struct i2c_adapter cx23885_i2c_adap_template = {
295 .name = "cx23885",
296 .owner = THIS_MODULE,
297 .id = I2C_HW_B_CX23885,
298 .algo = &cx23885_i2c_algo_template,
299 .client_register = attach_inform,
300 .client_unregister = detach_inform,
301};
302
303static struct i2c_client cx23885_i2c_client_template = {
304 .name = "cx23885 internal",
305};
306
307static char *i2c_devs[128] = {
308 [ 0x1c >> 1 ] = "lgdt3303",
309 [ 0x86 >> 1 ] = "tda9887",
310 [ 0x32 >> 1 ] = "cx24227",
311 [ 0x88 >> 1 ] = "cx25837",
312 [ 0x84 >> 1 ] = "tda8295",
313 [ 0xa0 >> 1 ] = "eeprom",
314 [ 0xc0 >> 1 ] = "tuner/mt2131/tda8275",
315 [ 0xc2 >> 1 ] = "tuner/mt2131/tda8275",
316};
317
318static void do_i2c_scan(char *name, struct i2c_client *c)
319{
320 unsigned char buf;
321 int i, rc;
322
323 for (i = 0; i < 128; i++) {
324 c->addr = i;
325 rc = i2c_master_recv(c, &buf, 0);
326 if (rc < 0)
327 continue;
328 printk("%s: i2c scan: found device @ 0x%x [%s]\n",
329 name, i << 1, i2c_devs[i] ? i2c_devs[i] : "???");
330 }
331}
332
333/* init + register i2c algo-bit adapter */
334int cx23885_i2c_register(struct cx23885_i2c *bus)
335{
336 struct cx23885_dev *dev = bus->dev;
337
338 dprintk(1, "%s(bus = %d)\n", __FUNCTION__, bus->nr);
339
340 memcpy(&bus->i2c_adap, &cx23885_i2c_adap_template,
341 sizeof(bus->i2c_adap));
342 memcpy(&bus->i2c_algo, &cx23885_i2c_algo_template,
343 sizeof(bus->i2c_algo));
344 memcpy(&bus->i2c_client, &cx23885_i2c_client_template,
345 sizeof(bus->i2c_client));
346
347 bus->i2c_adap.dev.parent = &dev->pci->dev;
348
349 strlcpy(bus->i2c_adap.name, bus->dev->name,
350 sizeof(bus->i2c_adap.name));
351
352 bus->i2c_algo.data = bus;
353 bus->i2c_adap.algo_data = bus;
354 i2c_add_adapter(&bus->i2c_adap);
355
356 bus->i2c_client.adapter = &bus->i2c_adap;
357
358 if (0 == bus->i2c_rc) {
359 printk("%s: i2c bus %d registered\n", dev->name, bus->nr);
360 if (i2c_scan)
361 do_i2c_scan(dev->name, &bus->i2c_client);
362 } else
363 printk("%s: i2c bus %d register FAILED\n", dev->name, bus->nr);
364
365 return bus->i2c_rc;
366}
367
368int cx23885_i2c_unregister(struct cx23885_i2c *bus)
369{
370 i2c_del_adapter(&bus->i2c_adap);
371 return 0;
372}
373
374/* ----------------------------------------------------------------------- */
375
376EXPORT_SYMBOL(cx23885_call_i2c_clients);
377
378/*
379 * Local variables:
380 * c-basic-offset: 8
381 * End:
382 */
diff --git a/drivers/media/video/cx23885/cx23885-reg.h b/drivers/media/video/cx23885/cx23885-reg.h
new file mode 100644
index 000000000000..162169f9091b
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885-reg.h
@@ -0,0 +1,431 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX23885_REG_H_
23#define _CX23885_REG_H_
24
25/*
26Address Map
270x00000000 -> 0x00009000 TX SRAM (Fifos)
280x00010000 -> 0x00013c00 RX SRAM CMDS + CDT
29
30EACH CMDS struct is 0x80 bytes long
31
32DMAx_PTR1 = 0x03040 address of first cluster
33DMAx_PTR2 = 0x10600 address of the CDT
34DMAx_CNT1 = cluster size in (bytes >> 4) -1
35DMAx_CNT2 = total cdt size for all entries >> 3
36
37Cluster Descriptor entry = 4 DWORDS
38 DWORD 0 -> ptr to cluster
39 DWORD 1 Reserved
40 DWORD 2 Reserved
41 DWORD 3 Reserved
42
43Channel manager Data Structure entry = 20 DWORD
44 0 IntialProgramCounterLow
45 1 IntialProgramCounterHigh
46 2 ClusterDescriptorTableBase
47 3 ClusterDescriptorTableSize
48 4 InstructionQueueBase
49 5 InstructionQueueSize
50... Reserved
51 19 Reserved
52*/
53
54/* Risc Instructions */
55#define RISC_CNT_INC 0x00010000
56#define RISC_CNT_RESET 0x00030000
57#define RISC_IRQ1 0x01000000
58#define RISC_IRQ2 0x02000000
59#define RISC_EOL 0x04000000
60#define RISC_SOL 0x08000000
61#define RISC_WRITE 0x10000000
62#define RISC_SKIP 0x20000000
63#define RISC_JUMP 0x70000000
64#define RISC_SYNC 0x80000000
65#define RISC_RESYNC 0x80008000
66#define RISC_READ 0x90000000
67#define RISC_WRITERM 0xB0000000
68#define RISC_WRITECM 0xC0000000
69#define RISC_WRITECR 0xD0000000
70#define RISC_WRITEC 0x50000000
71#define RISC_READC 0xA0000000
72
73
74/* Audio and Video Core */
75#define HOST_REG1 0x00000000
76#define HOST_REG2 0x00000001
77#define HOST_REG3 0x00000002
78
79/* Chip Configuration Registers */
80#define CHIP_CTRL 0x00000100
81#define AFE_CTRL 0x00000104
82#define VID_PLL_INT_POST 0x00000108
83#define VID_PLL_FRAC 0x0000010C
84#define AUX_PLL_INT_POST 0x00000110
85#define AUX_PLL_FRAC 0x00000114
86#define SYS_PLL_INT_POST 0x00000118
87#define SYS_PLL_FRAC 0x0000011C
88#define PIN_CTRL 0x00000120
89#define AUD_IO_CTRL 0x00000124
90#define AUD_LOCK1 0x00000128
91#define AUD_LOCK2 0x0000012C
92#define POWER_CTRL 0x00000130
93#define AFE_DIAG_CTRL1 0x00000134
94#define AFE_DIAG_CTRL3 0x0000013C
95#define PLL_DIAG_CTRL 0x00000140
96#define AFE_CLK_OUT_CTRL 0x00000144
97#define DLL1_DIAG_CTRL 0x0000015C
98
99/* GPIO[23:19] Output Enable */
100#define GPIO2_OUT_EN_REG 0x00000160
101/* GPIO[23:19] Data Registers */
102#define GPIO2 0x00000164
103
104#define IFADC_CTRL 0x00000180
105
106/* Infrared Remote Registers */
107#define IR_CNTRL_REG 0x00000200
108#define IR_TXCLK_REG 0x00000204
109#define IR_RXCLK_REG 0x00000208
110#define IR_CDUTY_REG 0x0000020C
111#define IR_STAT_REG 0x00000210
112#define IR_IRQEN_REG 0x00000214
113#define IR_FILTR_REG 0x00000218
114#define IR_FIFO_REG 0x0000023C
115
116/* Video Decoder Registers */
117#define MODE_CTRL 0x00000400
118#define OUT_CTRL1 0x00000404
119#define OUT_CTRL2 0x00000408
120#define GEN_STAT 0x0000040C
121#define INT_STAT_MASK 0x00000410
122#define LUMA_CTRL 0x00000414
123#define HSCALE_CTRL 0x00000418
124#define VSCALE_CTRL 0x0000041C
125#define CHROMA_CTRL 0x00000420
126#define VBI_LINE_CTRL1 0x00000424
127#define VBI_LINE_CTRL2 0x00000428
128#define VBI_LINE_CTRL3 0x0000042C
129#define VBI_LINE_CTRL4 0x00000430
130#define VBI_LINE_CTRL5 0x00000434
131#define VBI_FC_CFG 0x00000438
132#define VBI_MISC_CFG1 0x0000043C
133#define VBI_MISC_CFG2 0x00000440
134#define VBI_PAY1 0x00000444
135#define VBI_PAY2 0x00000448
136#define VBI_CUST1_CFG1 0x0000044C
137#define VBI_CUST1_CFG2 0x00000450
138#define VBI_CUST1_CFG3 0x00000454
139#define VBI_CUST2_CFG1 0x00000458
140#define VBI_CUST2_CFG2 0x0000045C
141#define VBI_CUST2_CFG3 0x00000460
142#define VBI_CUST3_CFG1 0x00000464
143#define VBI_CUST3_CFG2 0x00000468
144#define VBI_CUST3_CFG3 0x0000046C
145#define HORIZ_TIM_CTRL 0x00000470
146#define VERT_TIM_CTRL 0x00000474
147#define SRC_COMB_CFG 0x00000478
148#define CHROMA_VBIOFF_CFG 0x0000047C
149#define FIELD_COUNT 0x00000480
150#define MISC_TIM_CTRL 0x00000484
151#define DFE_CTRL1 0x00000488
152#define DFE_CTRL2 0x0000048C
153#define DFE_CTRL3 0x00000490
154#define PLL_CTRL 0x00000494
155#define HTL_CTRL 0x00000498
156#define COMB_CTRL 0x0000049C
157#define CRUSH_CTRL 0x000004A0
158#define SOFT_RST_CTRL 0x000004A4
159#define CX885_VERSION 0x000004B4
160#define VBI_PASS_CTRL 0x000004BC
161
162/* Audio Decoder Registers */
163/* 8051 Configuration */
164#define DL_CTL 0x00000800
165#define STD_DET_STATUS 0x00000804
166#define STD_DET_CTL 0x00000808
167#define DW8051_INT 0x0000080C
168#define GENERAL_CTL 0x00000810
169#define AAGC_CTL 0x00000814
170#define DEMATRIX_CTL 0x000008CC
171#define PATH1_CTL1 0x000008D0
172#define PATH1_VOL_CTL 0x000008D4
173#define PATH1_EQ_CTL 0x000008D8
174#define PATH1_SC_CTL 0x000008DC
175#define PATH2_CTL1 0x000008E0
176#define PATH2_VOL_CTL 0x000008E4
177#define PATH2_EQ_CTL 0x000008E8
178#define PATH2_SC_CTL 0x000008EC
179
180/* Sample Rate Converter */
181#define SRC_CTL 0x000008F0
182#define SRC_LF_COEF 0x000008F4
183#define SRC1_CTL 0x000008F8
184#define SRC2_CTL 0x000008FC
185#define SRC3_CTL 0x00000900
186#define SRC4_CTL 0x00000904
187#define SRC5_CTL 0x00000908
188#define SRC6_CTL 0x0000090C
189#define BAND_OUT_SEL 0x00000910
190#define I2S_N_CTL 0x00000914
191#define I2S_OUT_CTL 0x00000918
192#define AUTOCONFIG_REG 0x000009C4
193
194/* Audio ADC Registers */
195#define DSM_CTRL1 0x00000000
196#define DSM_CTRL2 0x00000001
197#define CHP_EN_CTRL 0x00000002
198#define CHP_CLK_CTRL1 0x00000004
199#define CHP_CLK_CTRL2 0x00000005
200#define BG_REF_CTRL 0x00000006
201#define SD2_SW_CTRL1 0x00000008
202#define SD2_SW_CTRL2 0x00000009
203#define SD2_BIAS_CTRL 0x0000000A
204#define AMP_BIAS_CTRL 0x0000000C
205#define CH_PWR_CTRL1 0x0000000E
206#define CH_PWR_CTRL2 0x0000000F
207#define DSM_STATUS1 0x00000010
208#define DSM_STATUS2 0x00000011
209#define DIG_CTL1 0x00000012
210#define DIG_CTL2 0x00000013
211#define I2S_TX_CFG 0x0000001A
212
213#define DEV_CNTRL2 0x00040000
214
215#define PCI_MSK_APB_DMA (1 << 12)
216#define PCI_MSK_AL_WR (1 << 11)
217#define PCI_MSK_AL_RD (1 << 10)
218#define PCI_MSK_RISC_WR (1 << 9)
219#define PCI_MSK_RISC_RD (1 << 8)
220#define PCI_MSK_AUD_EXT (1 << 4)
221#define PCI_MSK_AUD_INT (1 << 3)
222#define PCI_MSK_VID_C (1 << 2)
223#define PCI_MSK_VID_B (1 << 1)
224#define PCI_MSK_VID_A 1
225#define PCI_INT_MSK 0x00040010
226
227#define PCI_INT_STAT 0x00040014
228#define PCI_INT_MSTAT 0x00040018
229
230#define VID_A_INT_MSK 0x00040020
231#define VID_A_INT_STAT 0x00040024
232#define VID_A_INT_MSTAT 0x00040028
233#define VID_A_INT_SSTAT 0x0004002C
234
235#define VID_B_INT_MSK 0x00040030
236#define VID_B_INT_STAT 0x00040034
237#define VID_B_INT_MSTAT 0x00040038
238#define VID_B_INT_SSTAT 0x0004003C
239
240#define VID_B_MSK_BAD_PKT (1 << 20)
241#define VID_B_MSK_OPC_ERR (1 << 16)
242#define VID_B_MSK_SYNC (1 << 12)
243#define VID_B_MSK_OF (1 << 8)
244#define VID_B_MSK_RISCI2 (1 << 4)
245#define VID_B_MSK_RISCI1 1
246
247#define VID_C_MSK_BAD_PKT (1 << 20)
248#define VID_C_MSK_OPC_ERR (1 << 16)
249#define VID_C_MSK_SYNC (1 << 12)
250#define VID_C_MSK_OF (1 << 8)
251#define VID_C_MSK_RISCI2 (1 << 4)
252#define VID_C_MSK_RISCI1 1
253
254/* A superset for testing purposes */
255#define VID_BC_MSK_BAD_PKT (1 << 20)
256#define VID_BC_MSK_OPC_ERR (1 << 16)
257#define VID_BC_MSK_SYNC (1 << 12)
258#define VID_BC_MSK_OF (1 << 8)
259#define VID_BC_MSK_RISCI2 (1 << 4)
260#define VID_BC_MSK_RISCI1 1
261
262#define VID_C_INT_MSK 0x00040040
263#define VID_C_INT_STAT 0x00040044
264#define VID_C_INT_MSTAT 0x00040048
265#define VID_C_INT_SSTAT 0x0004004C
266
267#define AUDIO_INT_INT_MSK 0x00040050
268#define AUDIO_INT_INT_STAT 0x00040054
269#define AUDIO_INT_INT_MSTAT 0x00040058
270#define AUDIO_INT_INT_SSTAT 0x0004005C
271
272#define AUDIO_EXT_INT_MSK 0x00040060
273#define AUDIO_EXT_INT_STAT 0x00040064
274#define AUDIO_EXT_INT_MSTAT 0x00040068
275#define AUDIO_EXT_INT_SSTAT 0x0004006C
276
277#define RDR_CFG0 0x00050000
278#define RDR_CFG1 0x00050004
279#define RDR_TLCTL0 0x00050318
280
281/* APB DMAC Current Buffer Pointer */
282#define DMA1_PTR1 0x00100000
283#define DMA2_PTR1 0x00100004
284#define DMA3_PTR1 0x00100008
285#define DMA4_PTR1 0x0010000C
286#define DMA5_PTR1 0x00100010
287#define DMA6_PTR1 0x00100014
288#define DMA7_PTR1 0x00100018
289#define DMA8_PTR1 0x0010001C
290
291/* APB DMAC Current Table Pointer */
292#define DMA1_PTR2 0x00100040
293#define DMA2_PTR2 0x00100044
294#define DMA3_PTR2 0x00100048
295#define DMA4_PTR2 0x0010004C
296#define DMA5_PTR2 0x00100050
297#define DMA6_PTR2 0x00100054
298#define DMA7_PTR2 0x00100058
299#define DMA8_PTR2 0x0010005C
300
301/* APB DMAC Buffer Limit */
302#define DMA1_CNT1 0x00100080
303#define DMA2_CNT1 0x00100084
304#define DMA3_CNT1 0x00100088
305#define DMA4_CNT1 0x0010008C
306#define DMA5_CNT1 0x00100090
307#define DMA6_CNT1 0x00100094
308#define DMA7_CNT1 0x00100098
309#define DMA8_CNT1 0x0010009C
310
311/* APB DMAC Table Size */
312#define DMA1_CNT2 0x001000C0
313#define DMA2_CNT2 0x001000C4
314#define DMA3_CNT2 0x001000C8
315#define DMA4_CNT2 0x001000CC
316#define DMA5_CNT2 0x001000D0
317#define DMA6_CNT2 0x001000D4
318#define DMA7_CNT2 0x001000D8
319#define DMA8_CNT2 0x001000DC
320
321/* Timer Counters */
322#define TM_CNT_LDW 0x00110000
323#define TM_CNT_UW 0x00110004
324#define TM_LMT_LDW 0x00110008
325#define TM_LMT_UW 0x0011000C
326
327/* GPIO */
328#define GP0_IO 0x00110010
329#define GPIO_ISM 0x00110014
330#define SOFT_RESET 0x0011001C
331
332/* GPIO (417 Microsoftcontroller) RW Data */
333#define MC417_RWD 0x00110020
334
335/* GPIO (417 Microsoftcontroller) Output Enable, Low Active */
336#define MC417_OEN 0x00110024
337#define MC417_CTL 0x00110028
338#define CLK_DELAY 0x00110048
339#define PAD_CTRL 0x0011004C
340
341/* Video A Interface */
342#define VID_A_GPCNT 0x00130020
343#define VBI_A_GPCNT 0x00130024
344#define VID_A_GPCNT_CTL 0x00130030
345#define VBI_A_GPCNT_CTL 0x00130034
346#define VID_A_DMA_CTL 0x00130040
347#define VID_A_VIP_CTRL 0x00130080
348#define VID_A_PIXEL_FRMT 0x00130084
349#define VID_A_VBI_CTRL 0x00130088
350
351/* Video B Interface */
352#define VID_B_DMA 0x00130100
353#define VBI_B_DMA 0x00130108
354#define VID_B_GPCNT 0x00130120
355#define VBI_B_GPCNT 0x00130124
356#define VID_B_GPCNT_CTL 0x00130134
357#define VBI_B_GPCNT_CTL 0x00130138
358#define VID_B_DMA_CTL 0x00130140
359#define VID_B_SRC_SEL 0x00130144
360#define VID_B_LNGTH 0x00130150
361#define VID_B_HW_SOP_CTL 0x00130154
362#define VID_B_GEN_CTL 0x00130158
363#define VID_B_BD_PKT_STATUS 0x0013015C
364#define VID_B_SOP_STATUS 0x00130160
365#define VID_B_FIFO_OVFL_STAT 0x00130164
366#define VID_B_VLD_MISC 0x00130168
367#define VID_B_TS_CLK_EN 0x0013016C
368#define VID_B_VIP_CTRL 0x00130180
369#define VID_B_PIXEL_FRMT 0x00130184
370
371/* Video C Interface */
372#define VID_C_GPCNT 0x00130220
373#define VID_C_GPCNT_CTL 0x00130230
374#define VBI_C_GPCNT_CTL 0x00130234
375#define VID_C_DMA_CTL 0x00130240
376#define VID_C_LNGTH 0x00130250
377#define VID_C_HW_SOP_CTL 0x00130254
378#define VID_C_GEN_CTL 0x00130258
379#define VID_C_BD_PKT_STATUS 0x0013025C
380#define VID_C_SOP_STATUS 0x00130260
381#define VID_C_FIFO_OVFL_STAT 0x00130264
382#define VID_C_VLD_MISC 0x00130268
383#define VID_C_TS_CLK_EN 0x0013026C
384
385/* Internal Audio Interface */
386#define AUD_INT_A_GPCNT 0x00140020
387#define AUD_INT_B_GPCNT 0x00140024
388#define AUD_INT_A_GPCNT_CTL 0x00140030
389#define AUD_INT_B_GPCNT_CTL 0x00140034
390#define AUD_INT_DMA_CTL 0x00140040
391#define AUD_INT_A_LNGTH 0x00140050
392#define AUD_INT_B_LNGTH 0x00140054
393#define AUD_INT_A_MODE 0x00140058
394#define AUD_INT_B_MODE 0x0014005C
395
396/* External Audio Interface */
397#define AUD_EXT_DMA 0x00140100
398#define AUD_EXT_GPCNT 0x00140120
399#define AUD_EXT_GPCNT_CTL 0x00140130
400#define AUD_EXT_DMA_CTL 0x00140140
401#define AUD_EXT_LNGTH 0x00140150
402#define AUD_EXT_A_MODE 0x00140158
403
404/* I2C Bus 1 */
405#define I2C1_ADDR 0x00180000
406#define I2C1_WDATA 0x00180004
407#define I2C1_CTRL 0x00180008
408#define I2C1_RDATA 0x0018000C
409#define I2C1_STAT 0x00180010
410
411/* I2C Bus 2 */
412#define I2C2_ADDR 0x00190000
413#define I2C2_WDATA 0x00190004
414#define I2C2_CTRL 0x00190008
415#define I2C2_RDATA 0x0019000C
416#define I2C2_STAT 0x00190010
417
418/* I2C Bus 3 */
419#define I2C3_ADDR 0x001A0000
420#define I2C3_WDATA 0x001A0004
421#define I2C3_CTRL 0x001A0008
422#define I2C3_RDATA 0x001A000C
423#define I2C3_STAT 0x001A0010
424
425/* UART */
426#define UART_CTL 0x001B0000
427#define UART_BRD 0x001B0004
428#define UART_ISR 0x001B000C
429#define UART_CNT 0x001B0010
430
431#endif /* _CX23885_REG_H_ */
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
new file mode 100644
index 000000000000..dec4dc2fcbb4
--- /dev/null
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -0,0 +1,301 @@
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@hauppauge.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/pci.h>
23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h>
25#include <linux/kdev_t.h>
26
27#include <media/v4l2-common.h>
28#include <media/tuner.h>
29#include <media/tveeprom.h>
30#include <media/videobuf-dma-sg.h>
31#include <media/videobuf-dvb.h>
32
33#include "btcx-risc.h"
34#include "cx23885-reg.h"
35
36#include <linux/version.h>
37#include <linux/mutex.h>
38
39#define CX23885_VERSION_CODE KERNEL_VERSION(0,0,1)
40
41#define UNSET (-1U)
42
43#define CX23885_MAXBOARDS 8
44
45/* Max number of inputs by card */
46#define MAX_CX23885_INPUT 8
47
48#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
49
50#define CX23885_BOARD_NOAUTO UNSET
51#define CX23885_BOARD_UNKNOWN 0
52#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
53#define CX23885_BOARD_HAUPPAUGE_HVR1800 2
54#define CX23885_BOARD_HAUPPAUGE_HVR1250 3
55#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
56
57enum cx23885_itype {
58 CX23885_VMUX_COMPOSITE1 = 1,
59 CX23885_VMUX_COMPOSITE2,
60 CX23885_VMUX_COMPOSITE3,
61 CX23885_VMUX_COMPOSITE4,
62 CX23885_VMUX_SVIDEO,
63 CX23885_VMUX_TELEVISION,
64 CX23885_VMUX_CABLE,
65 CX23885_VMUX_DVB,
66 CX23885_VMUX_DEBUG,
67 CX23885_RADIO,
68};
69
70enum cx23885_src_sel_type {
71 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
72 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
73};
74
75/* buffer for one video frame */
76struct cx23885_buffer {
77 /* common v4l buffer stuff -- must be first */
78 struct videobuf_buffer vb;
79
80 /* cx23885 specific */
81 unsigned int bpl;
82 struct btcx_riscmem risc;
83 struct cx23885_fmt *fmt;
84 u32 count;
85};
86
87struct cx23885_input {
88 enum cx23885_itype type;
89 unsigned int vmux;
90 u32 gpio0, gpio1, gpio2, gpio3;
91};
92
93typedef enum {
94 CX23885_MPEG_UNDEFINED = 0,
95 CX23885_MPEG_DVB
96} port_t;
97
98struct cx23885_board {
99 char *name;
100 port_t portb, portc;
101 struct cx23885_input input[MAX_CX23885_INPUT];
102};
103
104struct cx23885_subid {
105 u16 subvendor;
106 u16 subdevice;
107 u32 card;
108};
109
110struct cx23885_i2c {
111 struct cx23885_dev *dev;
112
113 int nr;
114
115 /* i2c i/o */
116 struct i2c_adapter i2c_adap;
117 struct i2c_algo_bit_data i2c_algo;
118 struct i2c_client i2c_client;
119 u32 i2c_rc;
120
121 /* 885 registers used for raw addess */
122 u32 i2c_period;
123 u32 reg_ctrl;
124 u32 reg_stat;
125 u32 reg_addr;
126 u32 reg_rdata;
127 u32 reg_wdata;
128};
129
130struct cx23885_dmaqueue {
131 struct list_head active;
132 struct list_head queued;
133 struct timer_list timeout;
134 struct btcx_riscmem stopper;
135 u32 count;
136};
137
138struct cx23885_tsport {
139 struct cx23885_dev *dev;
140
141 int nr;
142 int sram_chno;
143
144 struct videobuf_dvb dvb;
145
146 /* dma queues */
147 struct cx23885_dmaqueue mpegq;
148 u32 ts_packet_size;
149 u32 ts_packet_count;
150
151 int width;
152 int height;
153
154 spinlock_t slock;
155
156 /* registers */
157 u32 reg_gpcnt;
158 u32 reg_gpcnt_ctl;
159 u32 reg_dma_ctl;
160 u32 reg_lngth;
161 u32 reg_hw_sop_ctrl;
162 u32 reg_gen_ctrl;
163 u32 reg_bd_pkt_status;
164 u32 reg_sop_status;
165 u32 reg_fifo_ovfl_stat;
166 u32 reg_vld_misc;
167 u32 reg_ts_clk_en;
168 u32 reg_ts_int_msk;
169 u32 reg_ts_int_stat;
170 u32 reg_src_sel;
171
172 /* Default register vals */
173 int pci_irqmask;
174 u32 dma_ctl_val;
175 u32 ts_int_msk_val;
176 u32 gen_ctrl_val;
177 u32 ts_clk_en_val;
178 u32 src_sel_val;
179};
180
181struct cx23885_dev {
182 struct list_head devlist;
183 atomic_t refcount;
184
185 /* pci stuff */
186 struct pci_dev *pci;
187 unsigned char pci_rev, pci_lat;
188 int pci_bus, pci_slot;
189 u32 __iomem *lmmio;
190 u8 __iomem *bmmio;
191 int pci_irqmask;
192
193 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
194 struct cx23885_i2c i2c_bus[3];
195
196 int nr;
197 struct mutex lock;
198
199 /* board details */
200 unsigned int board;
201 char name[32];
202
203 struct cx23885_tsport ts1, ts2;
204
205 /* sram configuration */
206 struct sram_channel *sram_channels;
207
208 enum {
209 CX23885_BRIDGE_UNDEFINED = 0,
210 CX23885_BRIDGE_885 = 885,
211 CX23885_BRIDGE_887 = 887,
212 } bridge;
213};
214
215#define SRAM_CH01 0 /* Video A */
216#define SRAM_CH02 1 /* VBI A */
217#define SRAM_CH03 2 /* Video B */
218#define SRAM_CH04 3 /* Transport via B */
219#define SRAM_CH05 4 /* VBI B */
220#define SRAM_CH06 5 /* Video C */
221#define SRAM_CH07 6 /* Transport via C */
222#define SRAM_CH08 7 /* Audio Internal A */
223#define SRAM_CH09 8 /* Audio Internal B */
224#define SRAM_CH10 9 /* Audio External */
225#define SRAM_CH11 10 /* COMB_3D_N */
226#define SRAM_CH12 11 /* Comb 3D N1 */
227#define SRAM_CH13 12 /* Comb 3D N2 */
228#define SRAM_CH14 13 /* MOE Vid */
229#define SRAM_CH15 14 /* MOE RSLT */
230
231struct sram_channel {
232 char *name;
233 u32 cmds_start;
234 u32 ctrl_start;
235 u32 cdt;
236 u32 fifo_start;;
237 u32 fifo_size;
238 u32 ptr1_reg;
239 u32 ptr2_reg;
240 u32 cnt1_reg;
241 u32 cnt2_reg;
242 u32 jumponly;
243};
244
245/* ----------------------------------------------------------- */
246
247#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
248#define cx_write(reg,value) writel((value), dev->lmmio + ((reg)>>2))
249
250#define cx_andor(reg,mask,value) \
251 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
252 ((value) & (mask)), dev->lmmio+((reg)>>2))
253
254#define cx_set(reg,bit) cx_andor((reg),(bit),(bit))
255#define cx_clear(reg,bit) cx_andor((reg),(bit),0)
256
257extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
258 struct sram_channel *ch,
259 unsigned int bpl, u32 risc);
260
261/* ----------------------------------------------------------- */
262/* cx23885-cards.c */
263
264extern struct cx23885_board cx23885_boards[];
265extern const unsigned int cx23885_bcount;
266
267extern struct cx23885_subid cx23885_subids[];
268extern const unsigned int cx23885_idcount;
269
270extern void cx23885_card_list(struct cx23885_dev *dev);
271extern int cx23885_ir_init(struct cx23885_dev *dev);
272extern void cx23885_gpio_setup(struct cx23885_dev *dev);
273extern void cx23885_card_setup(struct cx23885_dev *dev);
274extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
275
276extern int cx23885_dvb_register(struct cx23885_tsport *port);
277extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
278
279extern int cx23885_buf_prepare(struct videobuf_queue *q,
280 struct cx23885_tsport *port,
281 struct cx23885_buffer *buf,
282 enum v4l2_field field);
283
284extern void cx23885_buf_queue(struct cx23885_tsport *port,
285 struct cx23885_buffer *buf);
286extern void cx23885_free_buffer(struct videobuf_queue *q,
287 struct cx23885_buffer *buf);
288
289/* ----------------------------------------------------------- */
290/* cx23885-i2c.c */
291extern int cx23885_i2c_register(struct cx23885_i2c *bus);
292extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
293extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
294 void *arg);
295
296/*
297 * Local variables:
298 * c-basic-offset: 8
299 * End:
300 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
301 */
diff --git a/drivers/media/video/cx25840/cx25840-audio.c b/drivers/media/video/cx25840/cx25840-audio.c
index f897c1ebd5f3..3d46a776df36 100644
--- a/drivers/media/video/cx25840/cx25840-audio.c
+++ b/drivers/media/video/cx25840/cx25840-audio.c
@@ -157,13 +157,12 @@ void cx25840_audio_set_path(struct i2c_client *client)
157{ 157{
158 struct cx25840_state *state = i2c_get_clientdata(client); 158 struct cx25840_state *state = i2c_get_clientdata(client);
159 159
160 /* assert soft reset */
161 cx25840_and_or(client, 0x810, ~0x1, 0x01);
162
160 /* stop microcontroller */ 163 /* stop microcontroller */
161 cx25840_and_or(client, 0x803, ~0x10, 0); 164 cx25840_and_or(client, 0x803, ~0x10, 0);
162 165
163 /* assert soft reset */
164 if (!state->is_cx25836)
165 cx25840_and_or(client, 0x810, ~0x1, 0x01);
166
167 /* Mute everything to prevent the PFFT! */ 166 /* Mute everything to prevent the PFFT! */
168 cx25840_write(client, 0x8d3, 0x1f); 167 cx25840_write(client, 0x8d3, 0x1f);
169 168
@@ -181,32 +180,46 @@ void cx25840_audio_set_path(struct i2c_client *client)
181 180
182 set_audclk_freq(client, state->audclk_freq); 181 set_audclk_freq(client, state->audclk_freq);
183 182
184 /* deassert soft reset */
185 if (!state->is_cx25836)
186 cx25840_and_or(client, 0x810, ~0x1, 0x00);
187
188 if (state->aud_input != CX25840_AUDIO_SERIAL) { 183 if (state->aud_input != CX25840_AUDIO_SERIAL) {
189 /* When the microcontroller detects the 184 /* When the microcontroller detects the
190 * audio format, it will unmute the lines */ 185 * audio format, it will unmute the lines */
191 cx25840_and_or(client, 0x803, ~0x10, 0x10); 186 cx25840_and_or(client, 0x803, ~0x10, 0x10);
192 } 187 }
188
189 /* deassert soft reset */
190 cx25840_and_or(client, 0x810, ~0x1, 0x00);
193} 191}
194 192
195static int get_volume(struct i2c_client *client) 193static int get_volume(struct i2c_client *client)
196{ 194{
195 struct cx25840_state *state = i2c_get_clientdata(client);
196 int vol;
197
198 if (state->unmute_volume >= 0)
199 return state->unmute_volume;
200
197 /* Volume runs +18dB to -96dB in 1/2dB steps 201 /* Volume runs +18dB to -96dB in 1/2dB steps
198 * change to fit the msp3400 -114dB to +12dB range */ 202 * change to fit the msp3400 -114dB to +12dB range */
199 203
200 /* check PATH1_VOLUME */ 204 /* check PATH1_VOLUME */
201 int vol = 228 - cx25840_read(client, 0x8d4); 205 vol = 228 - cx25840_read(client, 0x8d4);
202 vol = (vol / 2) + 23; 206 vol = (vol / 2) + 23;
203 return vol << 9; 207 return vol << 9;
204} 208}
205 209
206static void set_volume(struct i2c_client *client, int volume) 210static void set_volume(struct i2c_client *client, int volume)
207{ 211{
208 /* First convert the volume to msp3400 values (0-127) */ 212 struct cx25840_state *state = i2c_get_clientdata(client);
209 int vol = volume >> 9; 213 int vol;
214
215 if (state->unmute_volume >= 0) {
216 state->unmute_volume = volume;
217 return;
218 }
219
220 /* Convert the volume to msp3400 values (0-127) */
221 vol = volume >> 9;
222
210 /* now scale it up to cx25840 values 223 /* now scale it up to cx25840 values
211 * -114dB to -96dB maps to 0 224 * -114dB to -96dB maps to 0
212 * this should be 19, but in my testing that was 4dB too loud */ 225 * this should be 19, but in my testing that was 4dB too loud */
@@ -284,30 +297,26 @@ static void set_balance(struct i2c_client *client, int balance)
284 297
285static int get_mute(struct i2c_client *client) 298static int get_mute(struct i2c_client *client)
286{ 299{
287 /* check SRC1_MUTE_EN */ 300 struct cx25840_state *state = i2c_get_clientdata(client);
288 return cx25840_read(client, 0x8d3) & 0x2 ? 1 : 0; 301
302 return state->unmute_volume >= 0;
289} 303}
290 304
291static void set_mute(struct i2c_client *client, int mute) 305static void set_mute(struct i2c_client *client, int mute)
292{ 306{
293 struct cx25840_state *state = i2c_get_clientdata(client); 307 struct cx25840_state *state = i2c_get_clientdata(client);
294 308
295 if (state->aud_input != CX25840_AUDIO_SERIAL) { 309 if (mute && state->unmute_volume == -1) {
296 /* Must turn off microcontroller in order to mute sound. 310 int vol = get_volume(client);
297 * Not sure if this is the best method, but it does work. 311
298 * If the microcontroller is running, then it will undo any 312 set_volume(client, 0);
299 * changes to the mute register. */ 313 state->unmute_volume = vol;
300 if (mute) { 314 }
301 /* disable microcontroller */ 315 else if (!mute && state->unmute_volume != -1) {
302 cx25840_and_or(client, 0x803, ~0x10, 0x00); 316 int vol = state->unmute_volume;
303 cx25840_write(client, 0x8d3, 0x1f); 317
304 } else { 318 state->unmute_volume = -1;
305 /* enable microcontroller */ 319 set_volume(client, vol);
306 cx25840_and_or(client, 0x803, ~0x10, 0x10);
307 }
308 } else {
309 /* SRC1_MUTE_EN */
310 cx25840_and_or(client, 0x8d3, ~0x2, mute ? 0x02 : 0x00);
311 } 320 }
312} 321}
313 322
@@ -319,18 +328,18 @@ int cx25840_audio(struct i2c_client *client, unsigned int cmd, void *arg)
319 328
320 switch (cmd) { 329 switch (cmd) {
321 case VIDIOC_INT_AUDIO_CLOCK_FREQ: 330 case VIDIOC_INT_AUDIO_CLOCK_FREQ:
331 if (!state->is_cx25836)
332 cx25840_and_or(client, 0x810, ~0x1, 1);
322 if (state->aud_input != CX25840_AUDIO_SERIAL) { 333 if (state->aud_input != CX25840_AUDIO_SERIAL) {
323 cx25840_and_or(client, 0x803, ~0x10, 0); 334 cx25840_and_or(client, 0x803, ~0x10, 0);
324 cx25840_write(client, 0x8d3, 0x1f); 335 cx25840_write(client, 0x8d3, 0x1f);
325 } 336 }
326 if (!state->is_cx25836)
327 cx25840_and_or(client, 0x810, ~0x1, 1);
328 retval = set_audclk_freq(client, *(u32 *)arg); 337 retval = set_audclk_freq(client, *(u32 *)arg);
329 if (!state->is_cx25836)
330 cx25840_and_or(client, 0x810, ~0x1, 0);
331 if (state->aud_input != CX25840_AUDIO_SERIAL) { 338 if (state->aud_input != CX25840_AUDIO_SERIAL) {
332 cx25840_and_or(client, 0x803, ~0x10, 0x10); 339 cx25840_and_or(client, 0x803, ~0x10, 0x10);
333 } 340 }
341 if (!state->is_cx25836)
342 cx25840_and_or(client, 0x810, ~0x1, 0);
334 return retval; 343 return retval;
335 344
336 case VIDIOC_G_CTRL: 345 case VIDIOC_G_CTRL:
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index 67bda9f9a44b..15f191e170d2 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -34,6 +34,7 @@
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/videodev2.h> 35#include <linux/videodev2.h>
36#include <linux/i2c.h> 36#include <linux/i2c.h>
37#include <linux/delay.h>
37#include <media/v4l2-common.h> 38#include <media/v4l2-common.h>
38#include <media/v4l2-chip-ident.h> 39#include <media/v4l2-chip-ident.h>
39#include <media/cx25840.h> 40#include <media/cx25840.h>
@@ -133,7 +134,9 @@ static void init_dll1(struct i2c_client *client)
133 cx25840_write(client, 0x159, 0x23); 134 cx25840_write(client, 0x159, 0x23);
134 cx25840_write(client, 0x15a, 0x87); 135 cx25840_write(client, 0x15a, 0x87);
135 cx25840_write(client, 0x15b, 0x06); 136 cx25840_write(client, 0x15b, 0x06);
137 udelay(10);
136 cx25840_write(client, 0x159, 0xe1); 138 cx25840_write(client, 0x159, 0xe1);
139 udelay(10);
137 cx25840_write(client, 0x15a, 0x86); 140 cx25840_write(client, 0x15a, 0x86);
138 cx25840_write(client, 0x159, 0xe0); 141 cx25840_write(client, 0x159, 0xe0);
139 cx25840_write(client, 0x159, 0xe1); 142 cx25840_write(client, 0x159, 0xe1);
@@ -147,6 +150,7 @@ static void init_dll2(struct i2c_client *client)
147 cx25840_write(client, 0x15d, 0xe3); 150 cx25840_write(client, 0x15d, 0xe3);
148 cx25840_write(client, 0x15e, 0x86); 151 cx25840_write(client, 0x15e, 0x86);
149 cx25840_write(client, 0x15f, 0x06); 152 cx25840_write(client, 0x15f, 0x06);
153 udelay(10);
150 cx25840_write(client, 0x15d, 0xe1); 154 cx25840_write(client, 0x15d, 0xe1);
151 cx25840_write(client, 0x15d, 0xe0); 155 cx25840_write(client, 0x15d, 0xe0);
152 cx25840_write(client, 0x15d, 0xe1); 156 cx25840_write(client, 0x15d, 0xe1);
@@ -165,9 +169,7 @@ static void cx25836_initialize(struct i2c_client *client)
165 /* 3c. */ 169 /* 3c. */
166 cx25840_and_or(client, 0x159, ~0x02, 0x02); 170 cx25840_and_or(client, 0x159, ~0x02, 0x02);
167 /* 3d. */ 171 /* 3d. */
168 /* There should be a 10-us delay here, but since the 172 udelay(10);
169 i2c bus already has a 10-us delay we don't need to do
170 anything */
171 /* 3e. */ 173 /* 3e. */
172 cx25840_and_or(client, 0x159, ~0x02, 0x00); 174 cx25840_and_or(client, 0x159, ~0x02, 0x00);
173 /* 3f. */ 175 /* 3f. */
@@ -179,9 +181,18 @@ static void cx25836_initialize(struct i2c_client *client)
179 cx25840_and_or(client, 0x15b, ~0x1e, 0x10); 181 cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
180} 182}
181 183
182static void cx25840_initialize(struct i2c_client *client, int loadfw) 184static void cx25840_work_handler(struct work_struct *work)
183{ 185{
186 struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
187 cx25840_loadfw(state->c);
188 wake_up(&state->fw_wait);
189}
190
191static void cx25840_initialize(struct i2c_client *client)
192{
193 DEFINE_WAIT(wait);
184 struct cx25840_state *state = i2c_get_clientdata(client); 194 struct cx25840_state *state = i2c_get_clientdata(client);
195 struct workqueue_struct *q;
185 196
186 /* datasheet startup in numbered steps, refer to page 3-77 */ 197 /* datasheet startup in numbered steps, refer to page 3-77 */
187 /* 2. */ 198 /* 2. */
@@ -197,8 +208,19 @@ static void cx25840_initialize(struct i2c_client *client, int loadfw)
197 cx25840_write(client, 0x13c, 0x01); 208 cx25840_write(client, 0x13c, 0x01);
198 cx25840_write(client, 0x13c, 0x00); 209 cx25840_write(client, 0x13c, 0x00);
199 /* 5. */ 210 /* 5. */
200 if (loadfw) 211 /* Do the firmware load in a work handler to prevent.
201 cx25840_loadfw(client); 212 Otherwise the kernel is blocked waiting for the
213 bit-banging i2c interface to finish uploading the
214 firmware. */
215 INIT_WORK(&state->fw_work, cx25840_work_handler);
216 init_waitqueue_head(&state->fw_wait);
217 q = create_singlethread_workqueue("cx25840_fw");
218 prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
219 queue_work(q, &state->fw_work);
220 schedule();
221 finish_wait(&state->fw_wait, &wait);
222 destroy_workqueue(q);
223
202 /* 6. */ 224 /* 6. */
203 cx25840_write(client, 0x115, 0x8c); 225 cx25840_write(client, 0x115, 0x8c);
204 cx25840_write(client, 0x116, 0x07); 226 cx25840_write(client, 0x116, 0x07);
@@ -251,8 +273,13 @@ static void input_change(struct i2c_client *client)
251 } 273 }
252 cx25840_and_or(client, 0x401, ~0x60, 0); 274 cx25840_and_or(client, 0x401, ~0x60, 0);
253 cx25840_and_or(client, 0x401, ~0x60, 0x60); 275 cx25840_and_or(client, 0x401, ~0x60, 0x60);
276 cx25840_and_or(client, 0x810, ~0x01, 1);
254 277
255 if (std & V4L2_STD_525_60) { 278 if (state->radio) {
279 cx25840_write(client, 0x808, 0xf9);
280 cx25840_write(client, 0x80b, 0x00);
281 }
282 else if (std & V4L2_STD_525_60) {
256 /* Certain Hauppauge PVR150 models have a hardware bug 283 /* Certain Hauppauge PVR150 models have a hardware bug
257 that causes audio to drop out. For these models the 284 that causes audio to drop out. For these models the
258 audio standard must be set explicitly. 285 audio standard must be set explicitly.
@@ -281,11 +308,7 @@ static void input_change(struct i2c_client *client)
281 cx25840_write(client, 0x80b, 0x10); 308 cx25840_write(client, 0x80b, 0x10);
282 } 309 }
283 310
284 if (cx25840_read(client, 0x803) & 0x10) { 311 cx25840_and_or(client, 0x810, ~0x01, 0);
285 /* restart audio decoder microcontroller */
286 cx25840_and_or(client, 0x803, ~0x10, 0x00);
287 cx25840_and_or(client, 0x803, ~0x10, 0x10);
288 }
289} 312}
290 313
291static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input, 314static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
@@ -625,6 +648,22 @@ static int cx25840_command(struct i2c_client *client, unsigned int cmd,
625 struct v4l2_tuner *vt = arg; 648 struct v4l2_tuner *vt = arg;
626 struct v4l2_routing *route = arg; 649 struct v4l2_routing *route = arg;
627 650
651 /* ignore these commands */
652 switch (cmd) {
653 case TUNER_SET_TYPE_ADDR:
654 return 0;
655 }
656
657 if (!state->is_initialized) {
658 v4l_dbg(1, cx25840_debug, client, "cmd %08x triggered fw load\n", cmd);
659 /* initialize on first use */
660 state->is_initialized = 1;
661 if (state->is_cx25836)
662 cx25836_initialize(client);
663 else
664 cx25840_initialize(client);
665 }
666
628 switch (cmd) { 667 switch (cmd) {
629#ifdef CONFIG_VIDEO_ADV_DEBUG 668#ifdef CONFIG_VIDEO_ADV_DEBUG
630 /* ioctls to allow direct access to the 669 /* ioctls to allow direct access to the
@@ -825,7 +864,7 @@ static int cx25840_command(struct i2c_client *client, unsigned int cmd,
825 if (state->is_cx25836) 864 if (state->is_cx25836)
826 cx25836_initialize(client); 865 cx25836_initialize(client);
827 else 866 else
828 cx25840_initialize(client, 0); 867 cx25840_initialize(client);
829 break; 868 break;
830 869
831 case VIDIOC_G_CHIP_IDENT: 870 case VIDIOC_G_CHIP_IDENT:
@@ -856,17 +895,16 @@ static int cx25840_detect_client(struct i2c_adapter *adapter, int address,
856 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) 895 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
857 return 0; 896 return 0;
858 897
859 state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL); 898 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
860 if (state == 0) 899 if (client == 0)
861 return -ENOMEM; 900 return -ENOMEM;
862 901
863 client = &state->c;
864 client->addr = address; 902 client->addr = address;
865 client->adapter = adapter; 903 client->adapter = adapter;
866 client->driver = &i2c_driver_cx25840; 904 client->driver = &i2c_driver_cx25840;
867 snprintf(client->name, sizeof(client->name) - 1, "cx25840"); 905 snprintf(client->name, sizeof(client->name) - 1, "cx25840");
868 906
869 v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", address << 1); 907 v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
870 908
871 device_id = cx25840_read(client, 0x101) << 8; 909 device_id = cx25840_read(client, 0x101) << 8;
872 device_id |= cx25840_read(client, 0x100); 910 device_id |= cx25840_read(client, 0x100);
@@ -875,42 +913,44 @@ static int cx25840_detect_client(struct i2c_adapter *adapter, int address,
875 * 0x83 for the cx2583x and 0x84 for the cx2584x */ 913 * 0x83 for the cx2583x and 0x84 for the cx2584x */
876 if ((device_id & 0xff00) == 0x8300) { 914 if ((device_id & 0xff00) == 0x8300) {
877 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6; 915 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
878 state->is_cx25836 = 1;
879 } 916 }
880 else if ((device_id & 0xff00) == 0x8400) { 917 else if ((device_id & 0xff00) == 0x8400) {
881 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf); 918 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
882 state->is_cx25836 = 0;
883 } 919 }
884 else { 920 else {
885 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n"); 921 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
886 kfree(state); 922 kfree(client);
887 return 0; 923 return 0;
888 } 924 }
889 925
926 state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
927 if (state == NULL) {
928 kfree(client);
929 return -ENOMEM;
930 }
931
890 /* Note: revision '(device_id & 0x0f) == 2' was never built. The 932 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
891 marking skips from 0x1 == 22 to 0x3 == 23. */ 933 marking skips from 0x1 == 22 to 0x3 == 23. */
892 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n", 934 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
893 (device_id & 0xfff0) >> 4, 935 (device_id & 0xfff0) >> 4,
894 (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1 : (device_id & 0x0f), 936 (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1 : (device_id & 0x0f),
895 address << 1, adapter->name); 937 client->addr << 1, client->adapter->name);
896 938
897 i2c_set_clientdata(client, state); 939 i2c_set_clientdata(client, state);
940 state->c = client;
941 state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
898 state->vid_input = CX25840_COMPOSITE7; 942 state->vid_input = CX25840_COMPOSITE7;
899 state->aud_input = CX25840_AUDIO8; 943 state->aud_input = CX25840_AUDIO8;
900 state->audclk_freq = 48000; 944 state->audclk_freq = 48000;
901 state->pvr150_workaround = 0; 945 state->pvr150_workaround = 0;
902 state->audmode = V4L2_TUNER_MODE_LANG1; 946 state->audmode = V4L2_TUNER_MODE_LANG1;
947 state->unmute_volume = -1;
903 state->vbi_line_offset = 8; 948 state->vbi_line_offset = 8;
904 state->id = id; 949 state->id = id;
905 state->rev = device_id; 950 state->rev = device_id;
906 951
907 i2c_attach_client(client); 952 i2c_attach_client(client);
908 953
909 if (state->is_cx25836)
910 cx25836_initialize(client);
911 else
912 cx25840_initialize(client, 1);
913
914 return 0; 954 return 0;
915} 955}
916 956
@@ -932,6 +972,7 @@ static int cx25840_detach_client(struct i2c_client *client)
932 } 972 }
933 973
934 kfree(state); 974 kfree(state);
975 kfree(client);
935 976
936 return 0; 977 return 0;
937} 978}
@@ -1056,9 +1097,10 @@ static void log_audio_status(struct i2c_client *client)
1056 } 1097 }
1057 v4l_info(client, "Detected audio standard: %s\n", p); 1098 v4l_info(client, "Detected audio standard: %s\n", p);
1058 v4l_info(client, "Audio muted: %s\n", 1099 v4l_info(client, "Audio muted: %s\n",
1059 (mute_ctl & 0x2) ? "yes" : "no"); 1100 (state->unmute_volume >= 0) ? "yes" : "no");
1060 v4l_info(client, "Audio microcontroller: %s\n", 1101 v4l_info(client, "Audio microcontroller: %s\n",
1061 (download_ctl & 0x10) ? "running" : "stopped"); 1102 (download_ctl & 0x10) ?
1103 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1062 1104
1063 switch (audio_config >> 4) { 1105 switch (audio_config >> 4) {
1064 case 0x00: p = "undefined"; break; 1106 case 0x00: p = "undefined"; break;
diff --git a/drivers/media/video/cx25840/cx25840-core.h b/drivers/media/video/cx25840/cx25840-core.h
index f4b56d2fd6b6..ea669b1f084d 100644
--- a/drivers/media/video/cx25840/cx25840-core.h
+++ b/drivers/media/video/cx25840/cx25840-core.h
@@ -35,17 +35,21 @@ extern int cx25840_debug;
35#define CX25840_CID_ENABLE_PVR150_WORKAROUND (V4L2_CID_PRIVATE_BASE+0) 35#define CX25840_CID_ENABLE_PVR150_WORKAROUND (V4L2_CID_PRIVATE_BASE+0)
36 36
37struct cx25840_state { 37struct cx25840_state {
38 struct i2c_client c; 38 struct i2c_client *c;
39 int pvr150_workaround; 39 int pvr150_workaround;
40 int radio; 40 int radio;
41 enum cx25840_video_input vid_input; 41 enum cx25840_video_input vid_input;
42 enum cx25840_audio_input aud_input; 42 enum cx25840_audio_input aud_input;
43 u32 audclk_freq; 43 u32 audclk_freq;
44 int audmode; 44 int audmode;
45 int unmute_volume; /* -1 if not muted */
45 int vbi_line_offset; 46 int vbi_line_offset;
46 u32 id; 47 u32 id;
47 u32 rev; 48 u32 rev;
48 int is_cx25836; 49 int is_cx25836;
50 int is_initialized;
51 wait_queue_head_t fw_wait; /* wake up when the fw load is finished */
52 struct work_struct fw_work; /* work entry for fw load */
49}; 53};
50 54
51/* ----------------------------------------------------------------------- */ 55/* ----------------------------------------------------------------------- */
diff --git a/drivers/media/video/cx88/Kconfig b/drivers/media/video/cx88/Kconfig
index f750a543c961..eeb5224ca101 100644
--- a/drivers/media/video/cx88/Kconfig
+++ b/drivers/media/video/cx88/Kconfig
@@ -4,7 +4,7 @@ config VIDEO_CX88
4 select I2C_ALGOBIT 4 select I2C_ALGOBIT
5 select FW_LOADER 5 select FW_LOADER
6 select VIDEO_BTCX 6 select VIDEO_BTCX
7 select VIDEO_BUF 7 select VIDEOBUF_DMA_SG
8 select VIDEO_TUNER 8 select VIDEO_TUNER
9 select VIDEO_TVEEPROM 9 select VIDEO_TVEEPROM
10 select VIDEO_IR 10 select VIDEO_IR
@@ -46,7 +46,7 @@ config VIDEO_CX88_BLACKBIRD
46config VIDEO_CX88_DVB 46config VIDEO_CX88_DVB
47 tristate "DVB/ATSC Support for cx2388x based TV cards" 47 tristate "DVB/ATSC Support for cx2388x based TV cards"
48 depends on VIDEO_CX88 && DVB_CORE 48 depends on VIDEO_CX88 && DVB_CORE
49 select VIDEO_BUF_DVB 49 select VIDEOBUF_DVB
50 select DVB_PLL if !DVB_FE_CUSTOMISE 50 select DVB_PLL if !DVB_FE_CUSTOMISE
51 select DVB_MT352 if !DVB_FE_CUSTOMISE 51 select DVB_MT352 if !DVB_FE_CUSTOMISE
52 select DVB_ZL10353 if !DVB_FE_CUSTOMISE 52 select DVB_ZL10353 if !DVB_FE_CUSTOMISE
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c
index 2d666b56020c..90c36c5705c3 100644
--- a/drivers/media/video/cx88/cx88-alsa.c
+++ b/drivers/media/video/cx88/cx88-alsa.c
@@ -3,6 +3,7 @@
3 * Support for audio capture 3 * Support for audio capture
4 * PCI function #1 of the cx2388x. 4 * PCI function #1 of the cx2388x.
5 * 5 *
6 * (c) 2007 Trent Piepho <xyzzy@speakeasy.org>
6 * (c) 2005,2006 Ricardo Cerqueira <v4l@cerqueira.org> 7 * (c) 2005,2006 Ricardo Cerqueira <v4l@cerqueira.org>
7 * (c) 2005 Mauro Carvalho Chehab <mchehab@infradead.org> 8 * (c) 2005 Mauro Carvalho Chehab <mchehab@infradead.org>
8 * Based on a dummy cx88 module by Gerd Knorr <kraxel@bytesex.org> 9 * Based on a dummy cx88 module by Gerd Knorr <kraxel@bytesex.org>
@@ -27,7 +28,9 @@
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/device.h> 29#include <linux/device.h>
29#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/vmalloc.h>
30#include <linux/dma-mapping.h> 32#include <linux/dma-mapping.h>
33#include <linux/pci.h>
31 34
32#include <asm/delay.h> 35#include <asm/delay.h>
33#include <sound/driver.h> 36#include <sound/driver.h>
@@ -46,21 +49,16 @@
46#define dprintk_core(level,fmt, arg...) if (debug >= level) \ 49#define dprintk_core(level,fmt, arg...) if (debug >= level) \
47 printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg) 50 printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg)
48 51
49
50/**************************************************************************** 52/****************************************************************************
51 Data type declarations - Can be moded to a header file later 53 Data type declarations - Can be moded to a header file later
52 ****************************************************************************/ 54 ****************************************************************************/
53 55
54/* These can be replaced after done */
55#define MIXER_ADDR_LAST MAX_CX88_INPUT
56
57struct cx88_audio_dev { 56struct cx88_audio_dev {
58 struct cx88_core *core; 57 struct cx88_core *core;
59 struct cx88_dmaqueue q; 58 struct cx88_dmaqueue q;
60 59
61 /* pci i/o */ 60 /* pci i/o */
62 struct pci_dev *pci; 61 struct pci_dev *pci;
63 unsigned char pci_rev,pci_lat;
64 62
65 /* audio controls */ 63 /* audio controls */
66 int irq; 64 int irq;
@@ -68,24 +66,17 @@ struct cx88_audio_dev {
68 struct snd_card *card; 66 struct snd_card *card;
69 67
70 spinlock_t reg_lock; 68 spinlock_t reg_lock;
69 atomic_t count;
71 70
72 unsigned int dma_size; 71 unsigned int dma_size;
73 unsigned int period_size; 72 unsigned int period_size;
74 unsigned int num_periods; 73 unsigned int num_periods;
75 74
76 struct videobuf_dmabuf dma_risc; 75 struct videobuf_dmabuf *dma_risc;
77
78 int mixer_volume[MIXER_ADDR_LAST+1][2];
79 int capture_source[MIXER_ADDR_LAST+1][2];
80
81 long int read_count;
82 long int read_offset;
83
84 struct cx88_buffer *buf;
85 76
86 long opened; 77 struct cx88_buffer *buf;
87 struct snd_pcm_substream *substream;
88 78
79 struct snd_pcm_substream *substream;
89}; 80};
90typedef struct cx88_audio_dev snd_cx88_card_t; 81typedef struct cx88_audio_dev snd_cx88_card_t;
91 82
@@ -98,7 +89,6 @@ typedef struct cx88_audio_dev snd_cx88_card_t;
98static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 89static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
99static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 90static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
100static int enable[SNDRV_CARDS] = {1, [1 ... (SNDRV_CARDS - 1)] = 1}; 91static int enable[SNDRV_CARDS] = {1, [1 ... (SNDRV_CARDS - 1)] = 1};
101static struct snd_card *snd_cx88_cards[SNDRV_CARDS];
102 92
103module_param_array(enable, bool, NULL, 0444); 93module_param_array(enable, bool, NULL, 0444);
104MODULE_PARM_DESC(enable, "Enable cx88x soundcard. default enabled."); 94MODULE_PARM_DESC(enable, "Enable cx88x soundcard. default enabled.");
@@ -136,38 +126,39 @@ static int _cx88_start_audio_dma(snd_cx88_card_t *chip)
136 struct cx88_core *core=chip->core; 126 struct cx88_core *core=chip->core;
137 struct sram_channel *audio_ch = &cx88_sram_channels[SRAM_CH25]; 127 struct sram_channel *audio_ch = &cx88_sram_channels[SRAM_CH25];
138 128
139 129 /* Make sure RISC/FIFO are off before changing FIFO/RISC settings */
140 dprintk(1, "Starting audio DMA for %i bytes/line and %i (%i) lines at address %08x\n",buf->bpl, chip->num_periods, audio_ch->fifo_size / buf->bpl, audio_ch->fifo_start); 130 cx_clear(MO_AUD_DMACNTRL, 0x11);
141 131
142 /* setup fifo + format - out channel */ 132 /* setup fifo + format - out channel */
143 cx88_sram_channel_setup(chip->core, &cx88_sram_channels[SRAM_CH25], 133 cx88_sram_channel_setup(chip->core, audio_ch, buf->bpl, buf->risc.dma);
144 buf->bpl, buf->risc.dma);
145 134
146 /* sets bpl size */ 135 /* sets bpl size */
147 cx_write(MO_AUDD_LNGTH, buf->bpl); 136 cx_write(MO_AUDD_LNGTH, buf->bpl);
148 137
149 /* reset counter */ 138 /* reset counter */
150 cx_write(MO_AUDD_GPCNTRL,GP_COUNT_CONTROL_RESET); 139 cx_write(MO_AUDD_GPCNTRL, GP_COUNT_CONTROL_RESET);
151 140 atomic_set(&chip->count, 0);
152 dprintk(1,"Enabling IRQ, setting mask from 0x%x to 0x%x\n",chip->core->pci_irqmask,(chip->core->pci_irqmask | 0x02));
153 /* enable irqs */
154 cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | 0x02);
155 141
142 dprintk(1, "Start audio DMA, %d B/line, %d lines/FIFO, %d periods, %d "
143 "byte buffer\n", buf->bpl, cx_read(audio_ch->cmds_start + 8)>>1,
144 chip->num_periods, buf->bpl * chip->num_periods);
156 145
157 /* Enables corresponding bits at AUD_INT_STAT */ 146 /* Enables corresponding bits at AUD_INT_STAT */
158 cx_write(MO_AUD_INTMSK, 147 cx_write(MO_AUD_INTMSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
159 (1<<16)| 148 AUD_INT_DN_RISCI2 | AUD_INT_DN_RISCI1);
160 (1<<12)| 149
161 (1<<4)| 150 /* Clean any pending interrupt bits already set */
162 (1<<0) 151 cx_write(MO_AUD_INTSTAT, ~0);
163 ); 152
153 /* enable audio irqs */
154 cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | PCI_INT_AUDINT);
164 155
165 /* start dma */ 156 /* start dma */
166 cx_set(MO_DEV_CNTRL2, (1<<5)); /* Enables Risc Processor */ 157 cx_set(MO_DEV_CNTRL2, (1<<5)); /* Enables Risc Processor */
167 cx_set(MO_AUD_DMACNTRL, 0x11); /* audio downstream FIFO and RISC enable */ 158 cx_set(MO_AUD_DMACNTRL, 0x11); /* audio downstream FIFO and RISC enable */
168 159
169 if (debug) 160 if (debug)
170 cx88_sram_channel_dump(chip->core, &cx88_sram_channels[SRAM_CH25]); 161 cx88_sram_channel_dump(chip->core, audio_ch);
171 162
172 return 0; 163 return 0;
173} 164}
@@ -184,13 +175,9 @@ static int _cx88_stop_audio_dma(snd_cx88_card_t *chip)
184 cx_clear(MO_AUD_DMACNTRL, 0x11); 175 cx_clear(MO_AUD_DMACNTRL, 0x11);
185 176
186 /* disable irqs */ 177 /* disable irqs */
187 cx_clear(MO_PCI_INTMSK, 0x02); 178 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
188 cx_clear(MO_AUD_INTMSK, 179 cx_clear(MO_AUD_INTMSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
189 (1<<16)| 180 AUD_INT_DN_RISCI2 | AUD_INT_DN_RISCI1);
190 (1<<12)|
191 (1<<4)|
192 (1<<0)
193 );
194 181
195 if (debug) 182 if (debug)
196 cx88_sram_channel_dump(chip->core, &cx88_sram_channels[SRAM_CH25]); 183 cx88_sram_channel_dump(chip->core, &cx88_sram_channels[SRAM_CH25]);
@@ -198,7 +185,7 @@ static int _cx88_stop_audio_dma(snd_cx88_card_t *chip)
198 return 0; 185 return 0;
199} 186}
200 187
201#define MAX_IRQ_LOOP 10 188#define MAX_IRQ_LOOP 50
202 189
203/* 190/*
204 * BOARD Specific: IRQ dma bits 191 * BOARD Specific: IRQ dma bits
@@ -223,42 +210,32 @@ static void cx8801_aud_irq(snd_cx88_card_t *chip)
223{ 210{
224 struct cx88_core *core = chip->core; 211 struct cx88_core *core = chip->core;
225 u32 status, mask; 212 u32 status, mask;
226 u32 count;
227 213
228 status = cx_read(MO_AUD_INTSTAT); 214 status = cx_read(MO_AUD_INTSTAT);
229 mask = cx_read(MO_AUD_INTMSK); 215 mask = cx_read(MO_AUD_INTMSK);
230 if (0 == (status & mask)) { 216 if (0 == (status & mask))
231 spin_unlock(&chip->reg_lock);
232 return; 217 return;
233 }
234 cx_write(MO_AUD_INTSTAT, status); 218 cx_write(MO_AUD_INTSTAT, status);
235 if (debug > 1 || (status & mask & ~0xff)) 219 if (debug > 1 || (status & mask & ~0xff))
236 cx88_print_irqbits(core->name, "irq aud", 220 cx88_print_irqbits(core->name, "irq aud",
237 cx88_aud_irqs, ARRAY_SIZE(cx88_aud_irqs), 221 cx88_aud_irqs, ARRAY_SIZE(cx88_aud_irqs),
238 status, mask); 222 status, mask);
239 /* risc op code error */ 223 /* risc op code error */
240 if (status & (1 << 16)) { 224 if (status & AUD_INT_OPC_ERR) {
241 printk(KERN_WARNING "%s/0: audio risc op code error\n",core->name); 225 printk(KERN_WARNING "%s/1: Audio risc op code error\n",core->name);
242 cx_clear(MO_AUD_DMACNTRL, 0x11); 226 cx_clear(MO_AUD_DMACNTRL, 0x11);
243 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH25]); 227 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH25]);
244 } 228 }
245 229 if (status & AUD_INT_DN_SYNC) {
246 /* risc1 downstream */ 230 dprintk(1, "Downstream sync error\n");
247 if (status & 0x01) { 231 cx_write(MO_AUDD_GPCNTRL, GP_COUNT_CONTROL_RESET);
248 spin_lock(&chip->reg_lock); 232 return;
249 count = cx_read(MO_AUDD_GPCNT);
250 spin_unlock(&chip->reg_lock);
251 if (chip->read_count == 0)
252 chip->read_count += chip->dma_size;
253 } 233 }
254 234 /* risc1 downstream */
255 if (chip->read_count >= chip->period_size) { 235 if (status & AUD_INT_DN_RISCI1) {
256 dprintk(2, "Elapsing period\n"); 236 atomic_set(&chip->count, cx_read(MO_AUDD_GPCNT));
257 snd_pcm_period_elapsed(chip->substream); 237 snd_pcm_period_elapsed(chip->substream);
258 } 238 }
259
260 dprintk(3,"Leaving audio IRQ handler...\n");
261
262 /* FIXME: Any other status should deserve a special handling? */ 239 /* FIXME: Any other status should deserve a special handling? */
263} 240}
264 241
@@ -273,27 +250,26 @@ static irqreturn_t cx8801_irq(int irq, void *dev_id)
273 int loop, handled = 0; 250 int loop, handled = 0;
274 251
275 for (loop = 0; loop < MAX_IRQ_LOOP; loop++) { 252 for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
276 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x02); 253 status = cx_read(MO_PCI_INTSTAT) &
254 (core->pci_irqmask | PCI_INT_AUDINT);
277 if (0 == status) 255 if (0 == status)
278 goto out; 256 goto out;
279 dprintk( 3, "cx8801_irq\n" ); 257 dprintk(3, "cx8801_irq loop %d/%d, status %x\n",
280 dprintk( 3, " loop: %d/%d\n", loop, MAX_IRQ_LOOP ); 258 loop, MAX_IRQ_LOOP, status);
281 dprintk( 3, " status: %d\n", status );
282 handled = 1; 259 handled = 1;
283 cx_write(MO_PCI_INTSTAT, status); 260 cx_write(MO_PCI_INTSTAT, status);
284 261
285 if (status & 0x02) 262 if (status & core->pci_irqmask)
286 { 263 cx88_core_irq(core, status);
287 dprintk( 2, " ALSA IRQ handling\n" ); 264 if (status & PCI_INT_AUDINT)
288 cx8801_aud_irq(chip); 265 cx8801_aud_irq(chip);
289 } 266 }
290 };
291 267
292 if (MAX_IRQ_LOOP == loop) { 268 if (MAX_IRQ_LOOP == loop) {
293 dprintk( 0, "clearing mask\n" ); 269 printk(KERN_ERR
294 dprintk(1,"%s/0: irq loop -- clearing mask\n", 270 "%s/1: IRQ loop detected, disabling interrupts\n",
295 core->name); 271 core->name);
296 cx_clear(MO_PCI_INTMSK,0x02); 272 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
297 } 273 }
298 274
299 out: 275 out:
@@ -306,14 +282,15 @@ static int dsp_buffer_free(snd_cx88_card_t *chip)
306 BUG_ON(!chip->dma_size); 282 BUG_ON(!chip->dma_size);
307 283
308 dprintk(2,"Freeing buffer\n"); 284 dprintk(2,"Freeing buffer\n");
309 videobuf_pci_dma_unmap(chip->pci, &chip->dma_risc); 285 videobuf_pci_dma_unmap(chip->pci, chip->dma_risc);
310 videobuf_dma_free(&chip->dma_risc); 286 videobuf_dma_free(chip->dma_risc);
311 btcx_riscmem_free(chip->pci,&chip->buf->risc); 287 btcx_riscmem_free(chip->pci,&chip->buf->risc);
312 kfree(chip->buf); 288 kfree(chip->buf);
313 289
290 chip->dma_risc = NULL;
314 chip->dma_size = 0; 291 chip->dma_size = 0;
315 292
316 return 0; 293 return 0;
317} 294}
318 295
319/**************************************************************************** 296/****************************************************************************
@@ -323,6 +300,7 @@ static int dsp_buffer_free(snd_cx88_card_t *chip)
323/* 300/*
324 * Digital hardware definition 301 * Digital hardware definition
325 */ 302 */
303#define DEFAULT_FIFO_SIZE 4096
326static struct snd_pcm_hardware snd_cx88_digital_hw = { 304static struct snd_pcm_hardware snd_cx88_digital_hw = {
327 .info = SNDRV_PCM_INFO_MMAP | 305 .info = SNDRV_PCM_INFO_MMAP |
328 SNDRV_PCM_INFO_INTERLEAVED | 306 SNDRV_PCM_INFO_INTERLEAVED |
@@ -333,22 +311,18 @@ static struct snd_pcm_hardware snd_cx88_digital_hw = {
333 .rates = SNDRV_PCM_RATE_48000, 311 .rates = SNDRV_PCM_RATE_48000,
334 .rate_min = 48000, 312 .rate_min = 48000,
335 .rate_max = 48000, 313 .rate_max = 48000,
336 .channels_min = 1, 314 .channels_min = 2,
337 .channels_max = 2, 315 .channels_max = 2,
338 .buffer_bytes_max = (2*2048), 316 /* Analog audio output will be full of clicks and pops if there
339 .period_bytes_min = 2048, 317 are not exactly four lines in the SRAM FIFO buffer. */
340 .period_bytes_max = 2048, 318 .period_bytes_min = DEFAULT_FIFO_SIZE/4,
341 .periods_min = 2, 319 .period_bytes_max = DEFAULT_FIFO_SIZE/4,
342 .periods_max = 2, 320 .periods_min = 1,
321 .periods_max = 1024,
322 .buffer_bytes_max = (1024*1024),
343}; 323};
344 324
345/* 325/*
346 * audio pcm capture runtime free
347 */
348static void snd_card_cx88_runtime_free(struct snd_pcm_runtime *runtime)
349{
350}
351/*
352 * audio pcm capture open callback 326 * audio pcm capture open callback
353 */ 327 */
354static int snd_cx88_pcm_open(struct snd_pcm_substream *substream) 328static int snd_cx88_pcm_open(struct snd_pcm_substream *substream)
@@ -357,26 +331,24 @@ static int snd_cx88_pcm_open(struct snd_pcm_substream *substream)
357 struct snd_pcm_runtime *runtime = substream->runtime; 331 struct snd_pcm_runtime *runtime = substream->runtime;
358 int err; 332 int err;
359 333
360 if (test_and_set_bit(0, &chip->opened)) 334 err = snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS);
361 return -EBUSY;
362
363 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
364 if (err < 0) 335 if (err < 0)
365 goto _error; 336 goto _error;
366 337
367 chip->substream = substream; 338 chip->substream = substream;
368 339
369 chip->read_count = 0;
370 chip->read_offset = 0;
371
372 runtime->private_free = snd_card_cx88_runtime_free;
373 runtime->hw = snd_cx88_digital_hw; 340 runtime->hw = snd_cx88_digital_hw;
374 341
342 if (cx88_sram_channels[SRAM_CH25].fifo_size != DEFAULT_FIFO_SIZE) {
343 unsigned int bpl = cx88_sram_channels[SRAM_CH25].fifo_size / 4;
344 bpl &= ~7; /* must be multiple of 8 */
345 runtime->hw.period_bytes_min = bpl;
346 runtime->hw.period_bytes_max = bpl;
347 }
348
375 return 0; 349 return 0;
376_error: 350_error:
377 dprintk(1,"Error opening PCM!\n"); 351 dprintk(1,"Error opening PCM!\n");
378 clear_bit(0, &chip->opened);
379 smp_mb__after_clear_bit();
380 return err; 352 return err;
381} 353}
382 354
@@ -385,11 +357,6 @@ _error:
385 */ 357 */
386static int snd_cx88_close(struct snd_pcm_substream *substream) 358static int snd_cx88_close(struct snd_pcm_substream *substream)
387{ 359{
388 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
389
390 clear_bit(0, &chip->opened);
391 smp_mb__after_clear_bit();
392
393 return 0; 360 return 0;
394} 361}
395 362
@@ -400,55 +367,67 @@ static int snd_cx88_hw_params(struct snd_pcm_substream * substream,
400 struct snd_pcm_hw_params * hw_params) 367 struct snd_pcm_hw_params * hw_params)
401{ 368{
402 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); 369 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
370 struct videobuf_dmabuf *dma;
371
403 struct cx88_buffer *buf; 372 struct cx88_buffer *buf;
373 int ret;
404 374
405 if (substream->runtime->dma_area) { 375 if (substream->runtime->dma_area) {
406 dsp_buffer_free(chip); 376 dsp_buffer_free(chip);
407 substream->runtime->dma_area = NULL; 377 substream->runtime->dma_area = NULL;
408 } 378 }
409 379
410
411 chip->period_size = params_period_bytes(hw_params); 380 chip->period_size = params_period_bytes(hw_params);
412 chip->num_periods = params_periods(hw_params); 381 chip->num_periods = params_periods(hw_params);
413 chip->dma_size = chip->period_size * params_periods(hw_params); 382 chip->dma_size = chip->period_size * params_periods(hw_params);
414 383
415 BUG_ON(!chip->dma_size); 384 BUG_ON(!chip->dma_size);
385 BUG_ON(chip->num_periods & (chip->num_periods-1));
416 386
417 dprintk(1,"Setting buffer\n"); 387 buf = videobuf_pci_alloc(sizeof(*buf));
418
419 buf = kzalloc(sizeof(*buf),GFP_KERNEL);
420 if (NULL == buf) 388 if (NULL == buf)
421 return -ENOMEM; 389 return -ENOMEM;
422 390
423 buf->vb.memory = V4L2_MEMORY_MMAP; 391 buf->vb.memory = V4L2_MEMORY_MMAP;
392 buf->vb.field = V4L2_FIELD_NONE;
424 buf->vb.width = chip->period_size; 393 buf->vb.width = chip->period_size;
394 buf->bpl = chip->period_size;
425 buf->vb.height = chip->num_periods; 395 buf->vb.height = chip->num_periods;
426 buf->vb.size = chip->dma_size; 396 buf->vb.size = chip->dma_size;
427 buf->vb.field = V4L2_FIELD_NONE;
428 397
429 videobuf_dma_init(&buf->vb.dma); 398 dma=videobuf_to_dma(&buf->vb);
430 videobuf_dma_init_kernel(&buf->vb.dma,PCI_DMA_FROMDEVICE, 399 videobuf_dma_init(dma);
400 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE,
431 (PAGE_ALIGN(buf->vb.size) >> PAGE_SHIFT)); 401 (PAGE_ALIGN(buf->vb.size) >> PAGE_SHIFT));
402 if (ret < 0)
403 goto error;
432 404
433 videobuf_pci_dma_map(chip->pci,&buf->vb.dma); 405 ret = videobuf_pci_dma_map(chip->pci,dma);
406 if (ret < 0)
407 goto error;
434 408
409 ret = cx88_risc_databuffer(chip->pci, &buf->risc, dma->sglist,
410 buf->vb.width, buf->vb.height, 1);
411 if (ret < 0)
412 goto error;
435 413
436 cx88_risc_databuffer(chip->pci, &buf->risc, 414 /* Loop back to start of program */
437 buf->vb.dma.sglist, 415 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP|RISC_IRQ1|RISC_CNT_INC);
438 buf->vb.width, buf->vb.height);
439
440 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
441 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 416 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
442 417
443 buf->vb.state = STATE_PREPARED; 418 buf->vb.state = STATE_PREPARED;
444 419
445 buf->bpl = chip->period_size;
446 chip->buf = buf; 420 chip->buf = buf;
447 chip->dma_risc = buf->vb.dma; 421 chip->dma_risc = dma;
448 422
449 dprintk(1,"Buffer ready at %u\n",chip->dma_risc.nr_pages); 423 substream->runtime->dma_area = chip->dma_risc->vmalloc;
450 substream->runtime->dma_area = chip->dma_risc.vmalloc; 424 substream->runtime->dma_bytes = chip->dma_size;
425 substream->runtime->dma_addr = 0;
451 return 0; 426 return 0;
427
428error:
429 kfree(buf);
430 return ret;
452} 431}
453 432
454/* 433/*
@@ -475,7 +454,6 @@ static int snd_cx88_prepare(struct snd_pcm_substream *substream)
475 return 0; 454 return 0;
476} 455}
477 456
478
479/* 457/*
480 * trigger callback 458 * trigger callback
481 */ 459 */
@@ -484,6 +462,7 @@ static int snd_cx88_card_trigger(struct snd_pcm_substream *substream, int cmd)
484 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); 462 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
485 int err; 463 int err;
486 464
465 /* Local interrupts are already disabled by ALSA */
487 spin_lock(&chip->reg_lock); 466 spin_lock(&chip->reg_lock);
488 467
489 switch (cmd) { 468 switch (cmd) {
@@ -510,17 +489,24 @@ static snd_pcm_uframes_t snd_cx88_pointer(struct snd_pcm_substream *substream)
510{ 489{
511 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); 490 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
512 struct snd_pcm_runtime *runtime = substream->runtime; 491 struct snd_pcm_runtime *runtime = substream->runtime;
492 u16 count;
513 493
514 if (chip->read_count) { 494 count = atomic_read(&chip->count);
515 chip->read_count -= snd_pcm_lib_period_bytes(substream);
516 chip->read_offset += snd_pcm_lib_period_bytes(substream);
517 if (chip->read_offset == chip->dma_size)
518 chip->read_offset = 0;
519 }
520 495
521 dprintk(2, "Pointer time, will return %li, read %li\n",chip->read_offset,chip->read_count); 496// dprintk(2, "%s - count %d (+%u), period %d, frame %lu\n", __FUNCTION__,
522 return bytes_to_frames(runtime, chip->read_offset); 497// count, new, count & (runtime->periods-1),
498// runtime->period_size * (count & (runtime->periods-1)));
499 return runtime->period_size * (count & (runtime->periods-1));
500}
523 501
502/*
503 * page callback (needed for mmap)
504 */
505static struct page *snd_cx88_page(struct snd_pcm_substream *substream,
506 unsigned long offset)
507{
508 void *pageptr = substream->runtime->dma_area + offset;
509 return vmalloc_to_page(pageptr);
524} 510}
525 511
526/* 512/*
@@ -535,6 +521,7 @@ static struct snd_pcm_ops snd_cx88_pcm_ops = {
535 .prepare = snd_cx88_prepare, 521 .prepare = snd_cx88_prepare,
536 .trigger = snd_cx88_card_trigger, 522 .trigger = snd_cx88_card_trigger,
537 .pointer = snd_cx88_pointer, 523 .pointer = snd_cx88_pointer,
524 .page = snd_cx88_page,
538}; 525};
539 526
540/* 527/*
@@ -562,7 +549,7 @@ static int snd_cx88_capture_volume_info(struct snd_kcontrol *kcontrol,
562 struct snd_ctl_elem_info *info) 549 struct snd_ctl_elem_info *info)
563{ 550{
564 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 551 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
565 info->count = 1; 552 info->count = 2;
566 info->value.integer.min = 0; 553 info->value.integer.min = 0;
567 info->value.integer.max = 0x3f; 554 info->value.integer.max = 0x3f;
568 555
@@ -575,8 +562,12 @@ static int snd_cx88_capture_volume_get(struct snd_kcontrol *kcontrol,
575{ 562{
576 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); 563 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol);
577 struct cx88_core *core=chip->core; 564 struct cx88_core *core=chip->core;
565 int vol = 0x3f - (cx_read(AUD_VOL_CTL) & 0x3f),
566 bal = cx_read(AUD_BAL_CTL);
578 567
579 value->value.integer.value[0] = 0x3f - (cx_read(AUD_VOL_CTL) & 0x3f); 568 value->value.integer.value[(bal & 0x40) ? 0 : 1] = vol;
569 vol -= (bal & 0x3f);
570 value->value.integer.value[(bal & 0x40) ? 1 : 0] = vol < 0 ? 0 : vol;
580 571
581 return 0; 572 return 0;
582} 573}
@@ -587,16 +578,31 @@ static int snd_cx88_capture_volume_put(struct snd_kcontrol *kcontrol,
587{ 578{
588 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol); 579 snd_cx88_card_t *chip = snd_kcontrol_chip(kcontrol);
589 struct cx88_core *core=chip->core; 580 struct cx88_core *core=chip->core;
590 int v; 581 int v, b;
591 u32 old_control; 582 int changed = 0;
592 583 u32 old;
584
585 b = value->value.integer.value[1] - value->value.integer.value[0];
586 if (b < 0) {
587 v = 0x3f - value->value.integer.value[0];
588 b = (-b) | 0x40;
589 } else {
590 v = 0x3f - value->value.integer.value[1];
591 }
592 /* Do we really know this will always be called with IRQs on? */
593 spin_lock_irq(&chip->reg_lock); 593 spin_lock_irq(&chip->reg_lock);
594 old_control = 0x3f - (cx_read(AUD_VOL_CTL) & 0x3f); 594 old = cx_read(AUD_VOL_CTL);
595 v = 0x3f - (value->value.integer.value[0] & 0x3f); 595 if (v != (old & 0x3f)) {
596 cx_andor(AUD_VOL_CTL, 0x3f, v); 596 cx_write(AUD_VOL_CTL, (old & ~0x3f) | v);
597 changed = 1;
598 }
599 if (cx_read(AUD_BAL_CTL) != b) {
600 cx_write(AUD_BAL_CTL, b);
601 changed = 1;
602 }
597 spin_unlock_irq(&chip->reg_lock); 603 spin_unlock_irq(&chip->reg_lock);
598 604
599 return v != old_control; 605 return changed;
600} 606}
601 607
602static struct snd_kcontrol_new snd_cx88_capture_volume = { 608static struct snd_kcontrol_new snd_cx88_capture_volume = {
@@ -665,6 +671,7 @@ static int __devinit snd_cx88_create(struct snd_card *card,
665 snd_cx88_card_t *chip; 671 snd_cx88_card_t *chip;
666 struct cx88_core *core; 672 struct cx88_core *core;
667 int err; 673 int err;
674 unsigned char pci_lat;
668 675
669 *rchip = NULL; 676 *rchip = NULL;
670 677
@@ -709,13 +716,12 @@ static int __devinit snd_cx88_create(struct snd_card *card,
709 } 716 }
710 717
711 /* print pci info */ 718 /* print pci info */
712 pci_read_config_byte(pci, PCI_CLASS_REVISION, &chip->pci_rev); 719 pci_read_config_byte(pci, PCI_LATENCY_TIMER, &pci_lat);
713 pci_read_config_byte(pci, PCI_LATENCY_TIMER, &chip->pci_lat);
714 720
715 dprintk(1,"ALSA %s/%i: found at %s, rev: %d, irq: %d, " 721 dprintk(1,"ALSA %s/%i: found at %s, rev: %d, irq: %d, "
716 "latency: %d, mmio: 0x%llx\n", core->name, devno, 722 "latency: %d, mmio: 0x%llx\n", core->name, devno,
717 pci_name(pci), chip->pci_rev, pci->irq, 723 pci_name(pci), pci->revision, pci->irq,
718 chip->pci_lat,(unsigned long long)pci_resource_start(pci,0)); 724 pci_lat, (unsigned long long)pci_resource_start(pci,0));
719 725
720 chip->irq = pci->irq; 726 chip->irq = pci->irq;
721 synchronize_irq(chip->irq); 727 synchronize_irq(chip->irq);
@@ -753,17 +759,12 @@ static int __devinit cx88_audio_initdev(struct pci_dev *pci,
753 return (err); 759 return (err);
754 760
755 err = snd_cx88_pcm(chip, 0, "CX88 Digital"); 761 err = snd_cx88_pcm(chip, 0, "CX88 Digital");
756 762 if (err < 0)
757 if (err < 0) { 763 goto error;
758 snd_card_free(card);
759 return (err);
760 }
761 764
762 err = snd_ctl_add(card, snd_ctl_new1(&snd_cx88_capture_volume, chip)); 765 err = snd_ctl_add(card, snd_ctl_new1(&snd_cx88_capture_volume, chip));
763 if (err < 0) { 766 if (err < 0)
764 snd_card_free(card); 767 goto error;
765 return (err);
766 }
767 768
768 strcpy (card->driver, "CX88x"); 769 strcpy (card->driver, "CX88x");
769 sprintf(card->shortname, "Conexant CX%x", pci->device); 770 sprintf(card->shortname, "Conexant CX%x", pci->device);
@@ -775,16 +776,16 @@ static int __devinit cx88_audio_initdev(struct pci_dev *pci,
775 card->driver,devno); 776 card->driver,devno);
776 777
777 err = snd_card_register(card); 778 err = snd_card_register(card);
778 if (err < 0) { 779 if (err < 0)
779 snd_card_free(card); 780 goto error;
780 return (err);
781 }
782 snd_cx88_cards[devno] = card;
783
784 pci_set_drvdata(pci,card); 781 pci_set_drvdata(pci,card);
785 782
786 devno++; 783 devno++;
787 return 0; 784 return 0;
785
786error:
787 snd_card_free(card);
788 return err;
788} 789}
789/* 790/*
790 * ALSA destructor 791 * ALSA destructor
diff --git a/drivers/media/video/cx88/cx88-blackbird.c b/drivers/media/video/cx88/cx88-blackbird.c
index f2fcdb92ecce..6d6f5048d762 100644
--- a/drivers/media/video/cx88/cx88-blackbird.c
+++ b/drivers/media/video/cx88/cx88-blackbird.c
@@ -27,7 +27,6 @@
27 */ 27 */
28 28
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/fs.h> 31#include <linux/fs.h>
33#include <linux/delay.h> 32#include <linux/delay.h>
@@ -734,14 +733,14 @@ static int vidioc_querycap (struct file *file, void *priv,
734 struct cx88_core *core = dev->core; 733 struct cx88_core *core = dev->core;
735 734
736 strcpy(cap->driver, "cx88_blackbird"); 735 strcpy(cap->driver, "cx88_blackbird");
737 strlcpy(cap->card, cx88_boards[core->board].name,sizeof(cap->card)); 736 strlcpy(cap->card, core->board.name, sizeof(cap->card));
738 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); 737 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
739 cap->version = CX88_VERSION_CODE; 738 cap->version = CX88_VERSION_CODE;
740 cap->capabilities = 739 cap->capabilities =
741 V4L2_CAP_VIDEO_CAPTURE | 740 V4L2_CAP_VIDEO_CAPTURE |
742 V4L2_CAP_READWRITE | 741 V4L2_CAP_READWRITE |
743 V4L2_CAP_STREAMING; 742 V4L2_CAP_STREAMING;
744 if (UNSET != core->tuner_type) 743 if (UNSET != core->board.tuner_type)
745 cap->capabilities |= V4L2_CAP_TUNER; 744 cap->capabilities |= V4L2_CAP_TUNER;
746 return 0; 745 return 0;
747} 746}
@@ -877,7 +876,7 @@ static int vidioc_g_ext_ctrls (struct file *file, void *priv,
877 876
878 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG) 877 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
879 return -EINVAL; 878 return -EINVAL;
880 return cx2341x_ext_ctrls(&dev->params, f, VIDIOC_G_EXT_CTRLS); 879 return cx2341x_ext_ctrls(&dev->params, 0, f, VIDIOC_G_EXT_CTRLS);
881} 880}
882 881
883static int vidioc_s_ext_ctrls (struct file *file, void *priv, 882static int vidioc_s_ext_ctrls (struct file *file, void *priv,
@@ -890,7 +889,7 @@ static int vidioc_s_ext_ctrls (struct file *file, void *priv,
890 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG) 889 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
891 return -EINVAL; 890 return -EINVAL;
892 p = dev->params; 891 p = dev->params;
893 err = cx2341x_ext_ctrls(&p, f, VIDIOC_S_EXT_CTRLS); 892 err = cx2341x_ext_ctrls(&p, 0, f, VIDIOC_S_EXT_CTRLS);
894 if (!err) { 893 if (!err) {
895 err = cx2341x_update(dev, blackbird_mbox_func, &dev->params, &p); 894 err = cx2341x_update(dev, blackbird_mbox_func, &dev->params, &p);
896 dev->params = p; 895 dev->params = p;
@@ -908,7 +907,7 @@ static int vidioc_try_ext_ctrls (struct file *file, void *priv,
908 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG) 907 if (f->ctrl_class != V4L2_CTRL_CLASS_MPEG)
909 return -EINVAL; 908 return -EINVAL;
910 p = dev->params; 909 p = dev->params;
911 err = cx2341x_ext_ctrls(&p, f, VIDIOC_TRY_EXT_CTRLS); 910 err = cx2341x_ext_ctrls(&p, 0, f, VIDIOC_TRY_EXT_CTRLS);
912 911
913 return err; 912 return err;
914} 913}
@@ -990,7 +989,7 @@ static int vidioc_g_frequency (struct file *file, void *priv,
990 struct cx8802_fh *fh = priv; 989 struct cx8802_fh *fh = priv;
991 struct cx88_core *core = fh->dev->core; 990 struct cx88_core *core = fh->dev->core;
992 991
993 if (unlikely(UNSET == core->tuner_type)) 992 if (unlikely(UNSET == core->board.tuner_type))
994 return -EINVAL; 993 return -EINVAL;
995 994
996 f->type = V4L2_TUNER_ANALOG_TV; 995 f->type = V4L2_TUNER_ANALOG_TV;
@@ -1028,7 +1027,7 @@ static int vidioc_g_tuner (struct file *file, void *priv,
1028 struct cx88_core *core = ((struct cx8802_fh *)priv)->dev->core; 1027 struct cx88_core *core = ((struct cx8802_fh *)priv)->dev->core;
1029 u32 reg; 1028 u32 reg;
1030 1029
1031 if (unlikely(UNSET == core->tuner_type)) 1030 if (unlikely(UNSET == core->board.tuner_type))
1032 return -EINVAL; 1031 return -EINVAL;
1033 if (0 != t->index) 1032 if (0 != t->index)
1034 return -EINVAL; 1033 return -EINVAL;
@@ -1049,7 +1048,7 @@ static int vidioc_s_tuner (struct file *file, void *priv,
1049{ 1048{
1050 struct cx88_core *core = ((struct cx8802_fh *)priv)->dev->core; 1049 struct cx88_core *core = ((struct cx8802_fh *)priv)->dev->core;
1051 1050
1052 if (UNSET == core->tuner_type) 1051 if (UNSET == core->board.tuner_type)
1053 return -EINVAL; 1052 return -EINVAL;
1054 if (0 != t->index) 1053 if (0 != t->index)
1055 return -EINVAL; 1054 return -EINVAL;
@@ -1078,7 +1077,7 @@ static int mpeg_open(struct inode *inode, struct file *file)
1078 struct cx8802_driver *drv = NULL; 1077 struct cx8802_driver *drv = NULL;
1079 int err; 1078 int err;
1080 1079
1081 dev = cx8802_get_device(inode); 1080 dev = cx8802_get_device(inode);
1082 1081
1083 dprintk( 1, "%s\n", __FUNCTION__); 1082 dprintk( 1, "%s\n", __FUNCTION__);
1084 1083
@@ -1112,7 +1111,7 @@ static int mpeg_open(struct inode *inode, struct file *file)
1112 file->private_data = fh; 1111 file->private_data = fh;
1113 fh->dev = dev; 1112 fh->dev = dev;
1114 1113
1115 videobuf_queue_init(&fh->mpegq, &blackbird_qops, 1114 videobuf_queue_pci_init(&fh->mpegq, &blackbird_qops,
1116 dev->pci, &dev->slock, 1115 dev->pci, &dev->slock,
1117 V4L2_BUF_TYPE_VIDEO_CAPTURE, 1116 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1118 V4L2_FIELD_INTERLACED, 1117 V4L2_FIELD_INTERLACED,
@@ -1235,7 +1234,7 @@ static struct video_device cx8802_mpeg_template =
1235 .vidioc_s_tuner = vidioc_s_tuner, 1234 .vidioc_s_tuner = vidioc_s_tuner,
1236 .vidioc_s_std = vidioc_s_std, 1235 .vidioc_s_std = vidioc_s_std,
1237 .tvnorms = CX88_NORMS, 1236 .tvnorms = CX88_NORMS,
1238 .current_norm = V4L2_STD_NTSC_M, 1237 .current_norm = V4L2_STD_NTSC_M,
1239}; 1238};
1240 1239
1241/* ------------------------------------------------------------------ */ 1240/* ------------------------------------------------------------------ */
@@ -1246,7 +1245,7 @@ static int cx8802_blackbird_advise_acquire(struct cx8802_driver *drv)
1246 struct cx88_core *core = drv->core; 1245 struct cx88_core *core = drv->core;
1247 int err = 0; 1246 int err = 0;
1248 1247
1249 switch (core->board) { 1248 switch (core->boardnr) {
1250 case CX88_BOARD_HAUPPAUGE_HVR1300: 1249 case CX88_BOARD_HAUPPAUGE_HVR1300:
1251 /* By default, core setup will leave the cx22702 out of reset, on the bus. 1250 /* By default, core setup will leave the cx22702 out of reset, on the bus.
1252 * We left the hardware on power up with the cx22702 active. 1251 * We left the hardware on power up with the cx22702 active.
@@ -1268,7 +1267,7 @@ static int cx8802_blackbird_advise_release(struct cx8802_driver *drv)
1268 struct cx88_core *core = drv->core; 1267 struct cx88_core *core = drv->core;
1269 int err = 0; 1268 int err = 0;
1270 1269
1271 switch (core->board) { 1270 switch (core->boardnr) {
1272 case CX88_BOARD_HAUPPAUGE_HVR1300: 1271 case CX88_BOARD_HAUPPAUGE_HVR1300:
1273 /* Exit leaving the cx23416 on the bus */ 1272 /* Exit leaving the cx23416 on the bus */
1274 break; 1273 break;
@@ -1316,13 +1315,13 @@ static int cx8802_blackbird_probe(struct cx8802_driver *drv)
1316 1315
1317 dprintk( 1, "%s\n", __FUNCTION__); 1316 dprintk( 1, "%s\n", __FUNCTION__);
1318 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", 1317 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1319 core->board, 1318 core->boardnr,
1320 core->name, 1319 core->name,
1321 core->pci_bus, 1320 core->pci_bus,
1322 core->pci_slot); 1321 core->pci_slot);
1323 1322
1324 err = -ENODEV; 1323 err = -ENODEV;
1325 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD)) 1324 if (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))
1326 goto fail_core; 1325 goto fail_core;
1327 1326
1328 dev->width = 720; 1327 dev->width = 720;
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 6a136ddbccf8..a4eb6a87a761 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -27,10 +27,26 @@
27 27
28#include "cx88.h" 28#include "cx88.h"
29 29
30static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
31static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
32static unsigned int card[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
33
34module_param_array(tuner, int, NULL, 0444);
35module_param_array(radio, int, NULL, 0444);
36module_param_array(card, int, NULL, 0444);
37
38MODULE_PARM_DESC(tuner,"tuner type");
39MODULE_PARM_DESC(radio,"radio tuner type");
40MODULE_PARM_DESC(card,"card type");
41
42static unsigned int latency = UNSET;
43module_param(latency,int,0444);
44MODULE_PARM_DESC(latency,"pci latency timer");
45
30/* ------------------------------------------------------------------ */ 46/* ------------------------------------------------------------------ */
31/* board config info */ 47/* board config info */
32 48
33struct cx88_board cx88_boards[] = { 49static const struct cx88_board cx88_boards[] = {
34 [CX88_BOARD_UNKNOWN] = { 50 [CX88_BOARD_UNKNOWN] = {
35 .name = "UNKNOWN/GENERIC", 51 .name = "UNKNOWN/GENERIC",
36 .tuner_type = UNSET, 52 .tuner_type = UNSET,
@@ -575,35 +591,34 @@ struct cx88_board cx88_boards[] = {
575 .tuner_addr = ADDR_UNSET, 591 .tuner_addr = ADDR_UNSET,
576 .radio_addr = ADDR_UNSET, 592 .radio_addr = ADDR_UNSET,
577 .tda9887_conf = TDA9887_PRESENT, 593 .tda9887_conf = TDA9887_PRESENT,
594 /* GPIO[2] = audio source for analog audio out connector
595 * 0 = analog audio input connector
596 * 1 = CX88 audio DACs
597 *
598 * GPIO[7] = input to CX88's audio/chroma ADC
599 * 0 = FM 10.7 MHz IF
600 * 1 = Sound 4.5 MHz IF
601 *
602 * GPIO[1,5,6] = Oren 51132 pins 27,35,28 respectively
603 *
604 * GPIO[16] = Remote control input
605 */
578 .input = {{ 606 .input = {{
579 .type = CX88_VMUX_TELEVISION, 607 .type = CX88_VMUX_TELEVISION,
580 .vmux = 0, 608 .vmux = 0,
581 .gpio0 = 0x00008484, 609 .gpio0 = 0x00008484,
582 .gpio1 = 0x00000000,
583 .gpio2 = 0x00000000,
584 .gpio3 = 0x00000000,
585 },{ 610 },{
586 .type = CX88_VMUX_COMPOSITE1, 611 .type = CX88_VMUX_COMPOSITE1,
587 .vmux = 1, 612 .vmux = 1,
588 .gpio0 = 0x00008400, 613 .gpio0 = 0x00008400,
589 .gpio1 = 0x00000000,
590 .gpio2 = 0x00000000,
591 .gpio3 = 0x00000000,
592 },{ 614 },{
593 .type = CX88_VMUX_SVIDEO, 615 .type = CX88_VMUX_SVIDEO,
594 .vmux = 2, 616 .vmux = 2,
595 .gpio0 = 0x00008400, 617 .gpio0 = 0x00008400,
596 .gpio1 = 0x00000000,
597 .gpio2 = 0x00000000,
598 .gpio3 = 0x00000000,
599 }}, 618 }},
600 .radio = { 619 .radio = {
601 .type = CX88_RADIO, 620 .type = CX88_RADIO,
602 .vmux = 2, 621 .gpio0 = 0x00008404,
603 .gpio0 = 0x00008400,
604 .gpio1 = 0x00000000,
605 .gpio2 = 0x00000000,
606 .gpio3 = 0x00000000,
607 }, 622 },
608 .mpeg = CX88_MPEG_DVB, 623 .mpeg = CX88_MPEG_DVB,
609 }, 624 },
@@ -1356,12 +1371,11 @@ struct cx88_board cx88_boards[] = {
1356 }}, 1371 }},
1357 }, 1372 },
1358}; 1373};
1359const unsigned int cx88_bcount = ARRAY_SIZE(cx88_boards);
1360 1374
1361/* ------------------------------------------------------------------ */ 1375/* ------------------------------------------------------------------ */
1362/* PCI subsystem IDs */ 1376/* PCI subsystem IDs */
1363 1377
1364struct cx88_subid cx88_subids[] = { 1378static const struct cx88_subid cx88_subids[] = {
1365 { 1379 {
1366 .subvendor = 0x0070, 1380 .subvendor = 0x0070,
1367 .subdevice = 0x3400, 1381 .subdevice = 0x3400,
@@ -1667,7 +1681,6 @@ struct cx88_subid cx88_subids[] = {
1667 .card = CX88_BOARD_ADSTECH_PTV_390, 1681 .card = CX88_BOARD_ADSTECH_PTV_390,
1668 }, 1682 },
1669}; 1683};
1670const unsigned int cx88_idcount = ARRAY_SIZE(cx88_subids);
1671 1684
1672/* ----------------------------------------------------------------------- */ 1685/* ----------------------------------------------------------------------- */
1673/* some leadtek specific stuff */ 1686/* some leadtek specific stuff */
@@ -1688,12 +1701,12 @@ static void leadtek_eeprom(struct cx88_core *core, u8 *eeprom_data)
1688 return; 1701 return;
1689 } 1702 }
1690 1703
1691 core->has_radio = 1; 1704 core->board.tuner_type = (eeprom_data[6] == 0x13) ?
1692 core->tuner_type = (eeprom_data[6] == 0x13) ? 43 : 38; 1705 TUNER_PHILIPS_FM1236_MK3 : TUNER_PHILIPS_FM1216ME_MK3;
1693 1706
1694 printk(KERN_INFO "%s: Leadtek Winfast 2000XP Expert config: " 1707 printk(KERN_INFO "%s: Leadtek Winfast 2000XP Expert config: "
1695 "tuner=%d, eeprom[0]=0x%02x\n", 1708 "tuner=%d, eeprom[0]=0x%02x\n",
1696 core->name, core->tuner_type, eeprom_data[0]); 1709 core->name, core->board.tuner_type, eeprom_data[0]);
1697} 1710}
1698 1711
1699static void hauppauge_eeprom(struct cx88_core *core, u8 *eeprom_data) 1712static void hauppauge_eeprom(struct cx88_core *core, u8 *eeprom_data)
@@ -1701,9 +1714,9 @@ static void hauppauge_eeprom(struct cx88_core *core, u8 *eeprom_data)
1701 struct tveeprom tv; 1714 struct tveeprom tv;
1702 1715
1703 tveeprom_hauppauge_analog(&core->i2c_client, &tv, eeprom_data); 1716 tveeprom_hauppauge_analog(&core->i2c_client, &tv, eeprom_data);
1704 core->tuner_type = tv.tuner_type; 1717 core->board.tuner_type = tv.tuner_type;
1705 core->tuner_formats = tv.tuner_formats; 1718 core->tuner_formats = tv.tuner_formats;
1706 core->has_radio = tv.has_radio; 1719 core->board.radio.type = tv.has_radio ? CX88_RADIO : 0;
1707 1720
1708 /* Make sure we support the board model */ 1721 /* Make sure we support the board model */
1709 switch (tv.model) 1722 switch (tv.model)
@@ -1793,8 +1806,9 @@ static void gdi_eeprom(struct cx88_core *core, u8 *eeprom_data)
1793 name ? name : "unknown"); 1806 name ? name : "unknown");
1794 if (NULL == name) 1807 if (NULL == name)
1795 return; 1808 return;
1796 core->tuner_type = gdi_tuner[eeprom_data[0x0d]].id; 1809 core->board.tuner_type = gdi_tuner[eeprom_data[0x0d]].id;
1797 core->has_radio = gdi_tuner[eeprom_data[0x0d]].fm; 1810 core->board.radio.type = gdi_tuner[eeprom_data[0x0d]].fm ?
1811 CX88_RADIO : 0;
1798} 1812}
1799 1813
1800/* ----------------------------------------------------------------------- */ 1814/* ----------------------------------------------------------------------- */
@@ -1833,7 +1847,7 @@ static void dvico_fusionhdtv_hybrid_init(struct cx88_core *core)
1833 1847
1834/* ----------------------------------------------------------------------- */ 1848/* ----------------------------------------------------------------------- */
1835 1849
1836void cx88_card_list(struct cx88_core *core, struct pci_dev *pci) 1850static void cx88_card_list(struct cx88_core *core, struct pci_dev *pci)
1837{ 1851{
1838 int i; 1852 int i;
1839 1853
@@ -1854,14 +1868,14 @@ void cx88_card_list(struct cx88_core *core, struct pci_dev *pci)
1854 } 1868 }
1855 printk("%s: Here is a list of valid choices for the card=<n> insmod option:\n", 1869 printk("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1856 core->name); 1870 core->name);
1857 for (i = 0; i < cx88_bcount; i++) 1871 for (i = 0; i < ARRAY_SIZE(cx88_boards); i++)
1858 printk("%s: card=%d -> %s\n", 1872 printk("%s: card=%d -> %s\n",
1859 core->name, i, cx88_boards[i].name); 1873 core->name, i, cx88_boards[i].name);
1860} 1874}
1861 1875
1862void cx88_card_setup_pre_i2c(struct cx88_core *core) 1876static void cx88_card_setup_pre_i2c(struct cx88_core *core)
1863{ 1877{
1864 switch (core->board) { 1878 switch (core->boardnr) {
1865 case CX88_BOARD_HAUPPAUGE_HVR1300: 1879 case CX88_BOARD_HAUPPAUGE_HVR1300:
1866 /* Bring the 702 demod up before i2c scanning/attach or devices are hidden */ 1880 /* Bring the 702 demod up before i2c scanning/attach or devices are hidden */
1867 /* We leave here with the 702 on the bus */ 1881 /* We leave here with the 702 on the bus */
@@ -1875,7 +1889,7 @@ void cx88_card_setup_pre_i2c(struct cx88_core *core)
1875 } 1889 }
1876} 1890}
1877 1891
1878void cx88_card_setup(struct cx88_core *core) 1892static void cx88_card_setup(struct cx88_core *core)
1879{ 1893{
1880 static u8 eeprom[256]; 1894 static u8 eeprom[256];
1881 1895
@@ -1884,7 +1898,7 @@ void cx88_card_setup(struct cx88_core *core)
1884 tveeprom_read(&core->i2c_client,eeprom,sizeof(eeprom)); 1898 tveeprom_read(&core->i2c_client,eeprom,sizeof(eeprom));
1885 } 1899 }
1886 1900
1887 switch (core->board) { 1901 switch (core->boardnr) {
1888 case CX88_BOARD_HAUPPAUGE: 1902 case CX88_BOARD_HAUPPAUGE:
1889 case CX88_BOARD_HAUPPAUGE_ROSLYN: 1903 case CX88_BOARD_HAUPPAUGE_ROSLYN:
1890 if (0 == core->i2c_rc) 1904 if (0 == core->i2c_rc)
@@ -1928,7 +1942,7 @@ void cx88_card_setup(struct cx88_core *core)
1928 msleep(1); 1942 msleep(1);
1929 cx_set(MO_GP0_IO, 0x00000101); 1943 cx_set(MO_GP0_IO, 0x00000101);
1930 if (0 == core->i2c_rc && 1944 if (0 == core->i2c_rc &&
1931 core->board == CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID) 1945 core->boardnr == CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID)
1932 dvico_fusionhdtv_hybrid_init(core); 1946 dvico_fusionhdtv_hybrid_init(core);
1933 break; 1947 break;
1934 case CX88_BOARD_KWORLD_DVB_T: 1948 case CX88_BOARD_KWORLD_DVB_T:
@@ -1966,13 +1980,148 @@ void cx88_card_setup(struct cx88_core *core)
1966 } 1980 }
1967 break; 1981 break;
1968 } 1982 }
1969 if (cx88_boards[core->board].radio.type == CX88_RADIO)
1970 core->has_radio = 1;
1971} 1983}
1972 1984
1973/* ------------------------------------------------------------------ */ 1985/* ------------------------------------------------------------------ */
1974 1986
1975EXPORT_SYMBOL(cx88_boards); 1987static int cx88_pci_quirks(const char *name, struct pci_dev *pci)
1988{
1989 unsigned int lat = UNSET;
1990 u8 ctrl = 0;
1991 u8 value;
1992
1993 /* check pci quirks */
1994 if (pci_pci_problems & PCIPCI_TRITON) {
1995 printk(KERN_INFO "%s: quirk: PCIPCI_TRITON -- set TBFX\n",
1996 name);
1997 ctrl |= CX88X_EN_TBFX;
1998 }
1999 if (pci_pci_problems & PCIPCI_NATOMA) {
2000 printk(KERN_INFO "%s: quirk: PCIPCI_NATOMA -- set TBFX\n",
2001 name);
2002 ctrl |= CX88X_EN_TBFX;
2003 }
2004 if (pci_pci_problems & PCIPCI_VIAETBF) {
2005 printk(KERN_INFO "%s: quirk: PCIPCI_VIAETBF -- set TBFX\n",
2006 name);
2007 ctrl |= CX88X_EN_TBFX;
2008 }
2009 if (pci_pci_problems & PCIPCI_VSFX) {
2010 printk(KERN_INFO "%s: quirk: PCIPCI_VSFX -- set VSFX\n",
2011 name);
2012 ctrl |= CX88X_EN_VSFX;
2013 }
2014#ifdef PCIPCI_ALIMAGIK
2015 if (pci_pci_problems & PCIPCI_ALIMAGIK) {
2016 printk(KERN_INFO "%s: quirk: PCIPCI_ALIMAGIK -- latency fixup\n",
2017 name);
2018 lat = 0x0A;
2019 }
2020#endif
2021
2022 /* check insmod options */
2023 if (UNSET != latency)
2024 lat = latency;
2025
2026 /* apply stuff */
2027 if (ctrl) {
2028 pci_read_config_byte(pci, CX88X_DEVCTRL, &value);
2029 value |= ctrl;
2030 pci_write_config_byte(pci, CX88X_DEVCTRL, value);
2031 }
2032 if (UNSET != lat) {
2033 printk(KERN_INFO "%s: setting pci latency timer to %d\n",
2034 name, latency);
2035 pci_write_config_byte(pci, PCI_LATENCY_TIMER, latency);
2036 }
2037 return 0;
2038}
2039
2040int cx88_get_resources(const struct cx88_core *core, struct pci_dev *pci)
2041{
2042 if (request_mem_region(pci_resource_start(pci,0),
2043 pci_resource_len(pci,0),
2044 core->name))
2045 return 0;
2046 printk(KERN_ERR
2047 "%s/%d: Can't get MMIO memory @ 0x%llx, subsystem: %04x:%04x\n",
2048 core->name, PCI_FUNC(pci->devfn),
2049 (unsigned long long)pci_resource_start(pci, 0),
2050 pci->subsystem_vendor, pci->subsystem_device);
2051 return -EBUSY;
2052}
2053
2054/* Allocate and initialize the cx88 core struct. One should hold the
2055 * devlist mutex before calling this. */
2056struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr)
2057{
2058 struct cx88_core *core;
2059 int i;
2060
2061 core = kzalloc(sizeof(*core), GFP_KERNEL);
2062
2063 atomic_inc(&core->refcount);
2064 core->pci_bus = pci->bus->number;
2065 core->pci_slot = PCI_SLOT(pci->devfn);
2066 core->pci_irqmask = PCI_INT_RISC_RD_BERRINT | PCI_INT_RISC_WR_BERRINT |
2067 PCI_INT_BRDG_BERRINT | PCI_INT_SRC_DMA_BERRINT |
2068 PCI_INT_DST_DMA_BERRINT | PCI_INT_IPB_DMA_BERRINT;
2069 mutex_init(&core->lock);
2070
2071 core->nr = nr;
2072 sprintf(core->name, "cx88[%d]", core->nr);
2073 if (0 != cx88_get_resources(core, pci)) {
2074 kfree(core);
2075 return NULL;
2076 }
2077
2078 /* PCI stuff */
2079 cx88_pci_quirks(core->name, pci);
2080 core->lmmio = ioremap(pci_resource_start(pci, 0),
2081 pci_resource_len(pci, 0));
2082 core->bmmio = (u8 __iomem *)core->lmmio;
2083
2084 /* board config */
2085 core->boardnr = UNSET;
2086 if (card[core->nr] < ARRAY_SIZE(cx88_boards))
2087 core->boardnr = card[core->nr];
2088 for (i = 0; UNSET == core->boardnr && i < ARRAY_SIZE(cx88_subids); i++)
2089 if (pci->subsystem_vendor == cx88_subids[i].subvendor &&
2090 pci->subsystem_device == cx88_subids[i].subdevice)
2091 core->boardnr = cx88_subids[i].card;
2092 if (UNSET == core->boardnr) {
2093 core->boardnr = CX88_BOARD_UNKNOWN;
2094 cx88_card_list(core, pci);
2095 }
2096
2097 memcpy(&core->board, &cx88_boards[core->boardnr], sizeof(core->board));
2098
2099 printk(KERN_INFO "%s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
2100 core->name,pci->subsystem_vendor,
2101 pci->subsystem_device, core->board.name,
2102 core->boardnr, card[core->nr] == core->boardnr ?
2103 "insmod option" : "autodetected");
2104
2105 if (tuner[core->nr] != UNSET)
2106 core->board.tuner_type = tuner[core->nr];
2107 if (radio[core->nr] != UNSET)
2108 core->board.radio_type = radio[core->nr];
2109
2110 printk(KERN_INFO "%s: TV tuner type %d, Radio tuner type %d\n",
2111 core->name, core->board.tuner_type, core->board.radio_type);
2112
2113 /* init hardware */
2114 cx88_reset(core);
2115 cx88_card_setup_pre_i2c(core);
2116 cx88_i2c_init(core, pci);
2117 cx88_call_i2c_clients (core, TUNER_SET_STANDBY, NULL);
2118 cx88_card_setup(core);
2119 cx88_ir_init(core, pci);
2120
2121 return core;
2122}
2123
2124/* ------------------------------------------------------------------ */
1976 2125
1977/* 2126/*
1978 * Local variables: 2127 * Local variables:
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c
index f31ec96924b9..62e8dd24c5f5 100644
--- a/drivers/media/video/cx88/cx88-core.c
+++ b/drivers/media/video/cx88/cx88-core.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/list.h> 29#include <linux/list.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/kernel.h> 31#include <linux/kernel.h>
33#include <linux/slab.h> 32#include <linux/slab.h>
34#include <linux/kmod.h> 33#include <linux/kmod.h>
@@ -52,22 +51,6 @@ static unsigned int core_debug = 0;
52module_param(core_debug,int,0644); 51module_param(core_debug,int,0644);
53MODULE_PARM_DESC(core_debug,"enable debug messages [core]"); 52MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
54 53
55static unsigned int latency = UNSET;
56module_param(latency,int,0444);
57MODULE_PARM_DESC(latency,"pci latency timer");
58
59static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
60static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
61static unsigned int card[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
62
63module_param_array(tuner, int, NULL, 0444);
64module_param_array(radio, int, NULL, 0444);
65module_param_array(card, int, NULL, 0444);
66
67MODULE_PARM_DESC(tuner,"tuner type");
68MODULE_PARM_DESC(radio,"radio tuner type");
69MODULE_PARM_DESC(card,"card type");
70
71static unsigned int nicam = 0; 54static unsigned int nicam = 0;
72module_param(nicam,int,0644); 55module_param(nicam,int,0644);
73MODULE_PARM_DESC(nicam,"tv audio is nicam"); 56MODULE_PARM_DESC(nicam,"tv audio is nicam");
@@ -85,13 +68,15 @@ static DEFINE_MUTEX(devlist);
85 68
86#define NO_SYNC_LINE (-1U) 69#define NO_SYNC_LINE (-1U)
87 70
71/* @lpi: lines per IRQ, or 0 to not generate irqs. Note: IRQ to be
72 generated _after_ lpi lines are transferred. */
88static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist, 73static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
89 unsigned int offset, u32 sync_line, 74 unsigned int offset, u32 sync_line,
90 unsigned int bpl, unsigned int padding, 75 unsigned int bpl, unsigned int padding,
91 unsigned int lines) 76 unsigned int lines, unsigned int lpi)
92{ 77{
93 struct scatterlist *sg; 78 struct scatterlist *sg;
94 unsigned int line,todo; 79 unsigned int line,todo,sol;
95 80
96 /* sync instruction */ 81 /* sync instruction */
97 if (sync_line != NO_SYNC_LINE) 82 if (sync_line != NO_SYNC_LINE)
@@ -104,15 +89,19 @@ static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
104 offset -= sg_dma_len(sg); 89 offset -= sg_dma_len(sg);
105 sg++; 90 sg++;
106 } 91 }
92 if (lpi && line>0 && !(line % lpi))
93 sol = RISC_SOL | RISC_IRQ1 | RISC_CNT_INC;
94 else
95 sol = RISC_SOL;
107 if (bpl <= sg_dma_len(sg)-offset) { 96 if (bpl <= sg_dma_len(sg)-offset) {
108 /* fits into current chunk */ 97 /* fits into current chunk */
109 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl); 98 *(rp++)=cpu_to_le32(RISC_WRITE|sol|RISC_EOL|bpl);
110 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); 99 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
111 offset+=bpl; 100 offset+=bpl;
112 } else { 101 } else {
113 /* scanline needs to be split */ 102 /* scanline needs to be split */
114 todo = bpl; 103 todo = bpl;
115 *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL| 104 *(rp++)=cpu_to_le32(RISC_WRITE|sol|
116 (sg_dma_len(sg)-offset)); 105 (sg_dma_len(sg)-offset));
117 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); 106 *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
118 todo -= (sg_dma_len(sg)-offset); 107 todo -= (sg_dma_len(sg)-offset);
@@ -163,10 +152,10 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
163 rp = risc->cpu; 152 rp = risc->cpu;
164 if (UNSET != top_offset) 153 if (UNSET != top_offset)
165 rp = cx88_risc_field(rp, sglist, top_offset, 0, 154 rp = cx88_risc_field(rp, sglist, top_offset, 0,
166 bpl, padding, lines); 155 bpl, padding, lines, 0);
167 if (UNSET != bottom_offset) 156 if (UNSET != bottom_offset)
168 rp = cx88_risc_field(rp, sglist, bottom_offset, 0x200, 157 rp = cx88_risc_field(rp, sglist, bottom_offset, 0x200,
169 bpl, padding, lines); 158 bpl, padding, lines, 0);
170 159
171 /* save pointer to jmp instruction address */ 160 /* save pointer to jmp instruction address */
172 risc->jmp = rp; 161 risc->jmp = rp;
@@ -176,7 +165,7 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
176 165
177int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc, 166int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
178 struct scatterlist *sglist, unsigned int bpl, 167 struct scatterlist *sglist, unsigned int bpl,
179 unsigned int lines) 168 unsigned int lines, unsigned int lpi)
180{ 169{
181 u32 instructions; 170 u32 instructions;
182 u32 *rp; 171 u32 *rp;
@@ -193,7 +182,7 @@ int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
193 182
194 /* write risc instructions */ 183 /* write risc instructions */
195 rp = risc->cpu; 184 rp = risc->cpu;
196 rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines); 185 rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines, lpi);
197 186
198 /* save pointer to jmp instruction address */ 187 /* save pointer to jmp instruction address */
199 risc->jmp = rp; 188 risc->jmp = rp;
@@ -224,10 +213,12 @@ int cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
224void 213void
225cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf) 214cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf)
226{ 215{
216 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
217
227 BUG_ON(in_interrupt()); 218 BUG_ON(in_interrupt());
228 videobuf_waiton(&buf->vb,0,0); 219 videobuf_waiton(&buf->vb,0,0);
229 videobuf_dma_unmap(q, &buf->vb.dma); 220 videobuf_dma_unmap(q, dma);
230 videobuf_dma_free(&buf->vb.dma); 221 videobuf_dma_free(dma);
231 btcx_riscmem_free((struct pci_dev *)q->dev, &buf->risc); 222 btcx_riscmem_free((struct pci_dev *)q->dev, &buf->risc);
232 buf->vb.state = STATE_NEEDS_INIT; 223 buf->vb.state = STATE_NEEDS_INIT;
233} 224}
@@ -451,10 +442,13 @@ void cx88_sram_channel_dump(struct cx88_core *core,
451 printk("%s: cmds: %-12s: 0x%08x\n", 442 printk("%s: cmds: %-12s: 0x%08x\n",
452 core->name,name[i], 443 core->name,name[i],
453 cx_read(ch->cmds_start + 4*i)); 444 cx_read(ch->cmds_start + 4*i));
454 for (i = 0; i < 4; i++) { 445 for (n = 1, i = 0; i < 4; i++) {
455 risc = cx_read(ch->cmds_start + 4 * (i+11)); 446 risc = cx_read(ch->cmds_start + 4 * (i+11));
456 printk("%s: risc%d: ", core->name, i); 447 printk("%s: risc%d: ", core->name, i);
457 cx88_risc_decode(risc); 448 if (--n)
449 printk("0x%08x [ arg #%d ]\n", risc, n);
450 else
451 n = cx88_risc_decode(risc);
458 } 452 }
459 for (i = 0; i < 16; i += n) { 453 for (i = 0; i < 16; i += n) {
460 risc = cx_read(ch->ctrl_start + 4 * i); 454 risc = cx_read(ch->ctrl_start + 4 * i);
@@ -514,7 +508,7 @@ int cx88_core_irq(struct cx88_core *core, u32 status)
514{ 508{
515 int handled = 0; 509 int handled = 0;
516 510
517 if (status & (1<<18)) { 511 if (status & PCI_INT_IR_SMPINT) {
518 cx88_ir_irq(core); 512 cx88_ir_irq(core);
519 handled++; 513 handled++;
520 } 514 }
@@ -738,7 +732,7 @@ int cx88_set_scale(struct cx88_core *core, unsigned int width, unsigned int heig
738 value |= (1 << 15); 732 value |= (1 << 15);
739 value |= (1 << 16); 733 value |= (1 << 16);
740 } 734 }
741 if (INPUT(core->input)->type == CX88_VMUX_SVIDEO) 735 if (INPUT(core->input).type == CX88_VMUX_SVIDEO)
742 value |= (1 << 13) | (1 << 5); 736 value |= (1 << 13) | (1 << 5);
743 if (V4L2_FIELD_INTERLACED == field) 737 if (V4L2_FIELD_INTERLACED == field)
744 value |= (1 << 3); // VINT (interlaced vertical scaling) 738 value |= (1 << 3); // VINT (interlaced vertical scaling)
@@ -833,7 +827,7 @@ static int set_tvaudio(struct cx88_core *core)
833{ 827{
834 v4l2_std_id norm = core->tvnorm; 828 v4l2_std_id norm = core->tvnorm;
835 829
836 if (CX88_VMUX_TELEVISION != INPUT(core->input)->type) 830 if (CX88_VMUX_TELEVISION != INPUT(core->input).type)
837 return 0; 831 return 0;
838 832
839 if (V4L2_STD_PAL_BG & norm) { 833 if (V4L2_STD_PAL_BG & norm) {
@@ -997,61 +991,6 @@ int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm)
997 991
998/* ------------------------------------------------------------------ */ 992/* ------------------------------------------------------------------ */
999 993
1000static int cx88_pci_quirks(char *name, struct pci_dev *pci)
1001{
1002 unsigned int lat = UNSET;
1003 u8 ctrl = 0;
1004 u8 value;
1005
1006 /* check pci quirks */
1007 if (pci_pci_problems & PCIPCI_TRITON) {
1008 printk(KERN_INFO "%s: quirk: PCIPCI_TRITON -- set TBFX\n",
1009 name);
1010 ctrl |= CX88X_EN_TBFX;
1011 }
1012 if (pci_pci_problems & PCIPCI_NATOMA) {
1013 printk(KERN_INFO "%s: quirk: PCIPCI_NATOMA -- set TBFX\n",
1014 name);
1015 ctrl |= CX88X_EN_TBFX;
1016 }
1017 if (pci_pci_problems & PCIPCI_VIAETBF) {
1018 printk(KERN_INFO "%s: quirk: PCIPCI_VIAETBF -- set TBFX\n",
1019 name);
1020 ctrl |= CX88X_EN_TBFX;
1021 }
1022 if (pci_pci_problems & PCIPCI_VSFX) {
1023 printk(KERN_INFO "%s: quirk: PCIPCI_VSFX -- set VSFX\n",
1024 name);
1025 ctrl |= CX88X_EN_VSFX;
1026 }
1027#ifdef PCIPCI_ALIMAGIK
1028 if (pci_pci_problems & PCIPCI_ALIMAGIK) {
1029 printk(KERN_INFO "%s: quirk: PCIPCI_ALIMAGIK -- latency fixup\n",
1030 name);
1031 lat = 0x0A;
1032 }
1033#endif
1034
1035 /* check insmod options */
1036 if (UNSET != latency)
1037 lat = latency;
1038
1039 /* apply stuff */
1040 if (ctrl) {
1041 pci_read_config_byte(pci, CX88X_DEVCTRL, &value);
1042 value |= ctrl;
1043 pci_write_config_byte(pci, CX88X_DEVCTRL, value);
1044 }
1045 if (UNSET != lat) {
1046 printk(KERN_INFO "%s: setting pci latency timer to %d\n",
1047 name, latency);
1048 pci_write_config_byte(pci, PCI_LATENCY_TIMER, latency);
1049 }
1050 return 0;
1051}
1052
1053/* ------------------------------------------------------------------ */
1054
1055struct video_device *cx88_vdev_init(struct cx88_core *core, 994struct video_device *cx88_vdev_init(struct cx88_core *core,
1056 struct pci_dev *pci, 995 struct pci_dev *pci,
1057 struct video_device *template, 996 struct video_device *template,
@@ -1067,122 +1006,38 @@ struct video_device *cx88_vdev_init(struct cx88_core *core,
1067 vfd->dev = &pci->dev; 1006 vfd->dev = &pci->dev;
1068 vfd->release = video_device_release; 1007 vfd->release = video_device_release;
1069 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)", 1008 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)",
1070 core->name, type, cx88_boards[core->board].name); 1009 core->name, type, core->board.name);
1071 return vfd; 1010 return vfd;
1072} 1011}
1073 1012
1074static int get_ressources(struct cx88_core *core, struct pci_dev *pci)
1075{
1076 if (request_mem_region(pci_resource_start(pci,0),
1077 pci_resource_len(pci,0),
1078 core->name))
1079 return 0;
1080 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx\n",
1081 core->name,(unsigned long long)pci_resource_start(pci,0));
1082 return -EBUSY;
1083}
1084
1085struct cx88_core* cx88_core_get(struct pci_dev *pci) 1013struct cx88_core* cx88_core_get(struct pci_dev *pci)
1086{ 1014{
1087 struct cx88_core *core; 1015 struct cx88_core *core;
1088 struct list_head *item;
1089 int i;
1090 1016
1091 mutex_lock(&devlist); 1017 mutex_lock(&devlist);
1092 list_for_each(item,&cx88_devlist) { 1018 list_for_each_entry(core, &cx88_devlist, devlist) {
1093 core = list_entry(item, struct cx88_core, devlist);
1094 if (pci->bus->number != core->pci_bus) 1019 if (pci->bus->number != core->pci_bus)
1095 continue; 1020 continue;
1096 if (PCI_SLOT(pci->devfn) != core->pci_slot) 1021 if (PCI_SLOT(pci->devfn) != core->pci_slot)
1097 continue; 1022 continue;
1098 1023
1099 if (0 != get_ressources(core,pci)) 1024 if (0 != cx88_get_resources(core, pci)) {
1100 goto fail_unlock; 1025 mutex_unlock(&devlist);
1026 return NULL;
1027 }
1101 atomic_inc(&core->refcount); 1028 atomic_inc(&core->refcount);
1102 mutex_unlock(&devlist); 1029 mutex_unlock(&devlist);
1103 return core; 1030 return core;
1104 } 1031 }
1105 core = kzalloc(sizeof(*core),GFP_KERNEL); 1032
1106 if (NULL == core) 1033 core = cx88_core_create(pci, cx88_devcount);
1107 goto fail_unlock; 1034 if (NULL != core) {
1108 1035 cx88_devcount++;
1109 atomic_inc(&core->refcount); 1036 list_add_tail(&core->devlist, &cx88_devlist);
1110 core->pci_bus = pci->bus->number;
1111 core->pci_slot = PCI_SLOT(pci->devfn);
1112 core->pci_irqmask = 0x00fc00;
1113 mutex_init(&core->lock);
1114
1115 core->nr = cx88_devcount++;
1116 sprintf(core->name,"cx88[%d]",core->nr);
1117 if (0 != get_ressources(core,pci)) {
1118 printk(KERN_ERR "CORE %s No more PCI ressources for "
1119 "subsystem: %04x:%04x, board: %s\n",
1120 core->name,pci->subsystem_vendor,
1121 pci->subsystem_device,
1122 cx88_boards[core->board].name);
1123
1124 cx88_devcount--;
1125 goto fail_free;
1126 }
1127 list_add_tail(&core->devlist,&cx88_devlist);
1128
1129 /* PCI stuff */
1130 cx88_pci_quirks(core->name, pci);
1131 core->lmmio = ioremap(pci_resource_start(pci,0),
1132 pci_resource_len(pci,0));
1133 core->bmmio = (u8 __iomem *)core->lmmio;
1134
1135 /* board config */
1136 core->board = UNSET;
1137 if (card[core->nr] < cx88_bcount)
1138 core->board = card[core->nr];
1139 for (i = 0; UNSET == core->board && i < cx88_idcount; i++)
1140 if (pci->subsystem_vendor == cx88_subids[i].subvendor &&
1141 pci->subsystem_device == cx88_subids[i].subdevice)
1142 core->board = cx88_subids[i].card;
1143 if (UNSET == core->board) {
1144 core->board = CX88_BOARD_UNKNOWN;
1145 cx88_card_list(core,pci);
1146 } 1037 }
1147 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1148 core->name,pci->subsystem_vendor,
1149 pci->subsystem_device,cx88_boards[core->board].name,
1150 core->board, card[core->nr] == core->board ?
1151 "insmod option" : "autodetected");
1152
1153 core->tuner_type = tuner[core->nr];
1154 core->radio_type = radio[core->nr];
1155 if (UNSET == core->tuner_type)
1156 core->tuner_type = cx88_boards[core->board].tuner_type;
1157 if (UNSET == core->radio_type)
1158 core->radio_type = cx88_boards[core->board].radio_type;
1159 if (!core->tuner_addr)
1160 core->tuner_addr = cx88_boards[core->board].tuner_addr;
1161 if (!core->radio_addr)
1162 core->radio_addr = cx88_boards[core->board].radio_addr;
1163
1164 printk(KERN_INFO "TV tuner %d at 0x%02x, Radio tuner %d at 0x%02x\n",
1165 core->tuner_type, core->tuner_addr<<1,
1166 core->radio_type, core->radio_addr<<1);
1167
1168 core->tda9887_conf = cx88_boards[core->board].tda9887_conf;
1169
1170 /* init hardware */
1171 cx88_reset(core);
1172 cx88_card_setup_pre_i2c(core);
1173 cx88_i2c_init(core,pci);
1174 cx88_call_i2c_clients (core, TUNER_SET_STANDBY, NULL);
1175 cx88_card_setup(core);
1176 cx88_ir_init(core,pci);
1177 1038
1178 mutex_unlock(&devlist); 1039 mutex_unlock(&devlist);
1179 return core; 1040 return core;
1180
1181fail_free:
1182 kfree(core);
1183fail_unlock:
1184 mutex_unlock(&devlist);
1185 return NULL;
1186} 1041}
1187 1042
1188void cx88_core_put(struct cx88_core *core, struct pci_dev *pci) 1043void cx88_core_put(struct cx88_core *core, struct pci_dev *pci)
@@ -1229,6 +1084,9 @@ EXPORT_SYMBOL(cx88_vdev_init);
1229EXPORT_SYMBOL(cx88_core_get); 1084EXPORT_SYMBOL(cx88_core_get);
1230EXPORT_SYMBOL(cx88_core_put); 1085EXPORT_SYMBOL(cx88_core_put);
1231 1086
1087EXPORT_SYMBOL(cx88_ir_start);
1088EXPORT_SYMBOL(cx88_ir_stop);
1089
1232/* 1090/*
1233 * Local variables: 1091 * Local variables:
1234 * c-basic-offset: 8 1092 * c-basic-offset: 8
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index 1773b40467dc..d16e5c6d21c0 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -378,7 +378,7 @@ static int dvb_register(struct cx8802_dev *dev)
378 dev->ts_gen_cntrl = 0x0c; 378 dev->ts_gen_cntrl = 0x0c;
379 379
380 /* init frontend */ 380 /* init frontend */
381 switch (dev->core->board) { 381 switch (dev->core->boardnr) {
382 case CX88_BOARD_HAUPPAUGE_DVB_T1: 382 case CX88_BOARD_HAUPPAUGE_DVB_T1:
383 dev->dvb.frontend = dvb_attach(cx22702_attach, 383 dev->dvb.frontend = dvb_attach(cx22702_attach,
384 &connexant_refboard_config, 384 &connexant_refboard_config,
@@ -482,7 +482,7 @@ static int dvb_register(struct cx8802_dev *dev)
482 &dev->core->i2c_adap, DVB_PLL_FMD1216ME); 482 &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
483 } 483 }
484#else 484#else
485 printk("%s: built without vp3054 support\n", dev->core->name); 485 printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
486#endif 486#endif
487 break; 487 break;
488 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID: 488 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
@@ -625,12 +625,12 @@ static int dvb_register(struct cx8802_dev *dev)
625 } 625 }
626 break; 626 break;
627 default: 627 default:
628 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n", 628 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
629 dev->core->name); 629 dev->core->name);
630 break; 630 break;
631 } 631 }
632 if (NULL == dev->dvb.frontend) { 632 if (NULL == dev->dvb.frontend) {
633 printk("%s: frontend initialization failed\n",dev->core->name); 633 printk(KERN_ERR "%s/2: frontend initialization failed\n", dev->core->name);
634 return -1; 634 return -1;
635 } 635 }
636 636
@@ -653,7 +653,7 @@ static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
653 int err = 0; 653 int err = 0;
654 dprintk( 1, "%s\n", __FUNCTION__); 654 dprintk( 1, "%s\n", __FUNCTION__);
655 655
656 switch (core->board) { 656 switch (core->boardnr) {
657 case CX88_BOARD_HAUPPAUGE_HVR1300: 657 case CX88_BOARD_HAUPPAUGE_HVR1300:
658 /* We arrive here with either the cx23416 or the cx22702 658 /* We arrive here with either the cx23416 or the cx22702
659 * on the bus. Take the bus from the cx23416 and enable the 659 * on the bus. Take the bus from the cx23416 and enable the
@@ -676,7 +676,7 @@ static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
676 int err = 0; 676 int err = 0;
677 dprintk( 1, "%s\n", __FUNCTION__); 677 dprintk( 1, "%s\n", __FUNCTION__);
678 678
679 switch (core->board) { 679 switch (core->boardnr) {
680 case CX88_BOARD_HAUPPAUGE_HVR1300: 680 case CX88_BOARD_HAUPPAUGE_HVR1300:
681 /* Do Nothing, leave the cx22702 on the bus. */ 681 /* Do Nothing, leave the cx22702 on the bus. */
682 break; 682 break;
@@ -694,13 +694,13 @@ static int cx8802_dvb_probe(struct cx8802_driver *drv)
694 694
695 dprintk( 1, "%s\n", __FUNCTION__); 695 dprintk( 1, "%s\n", __FUNCTION__);
696 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", 696 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
697 core->board, 697 core->boardnr,
698 core->name, 698 core->name,
699 core->pci_bus, 699 core->pci_bus,
700 core->pci_slot); 700 core->pci_slot);
701 701
702 err = -ENODEV; 702 err = -ENODEV;
703 if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB)) 703 if (!(core->board.mpeg & CX88_MPEG_DVB))
704 goto fail_core; 704 goto fail_core;
705 705
706 /* If vp3054 isn't enabled, a stub will just return 0 */ 706 /* If vp3054 isn't enabled, a stub will just return 0 */
@@ -709,8 +709,8 @@ static int cx8802_dvb_probe(struct cx8802_driver *drv)
709 goto fail_core; 709 goto fail_core;
710 710
711 /* dvb stuff */ 711 /* dvb stuff */
712 printk("%s/2: cx2388x based dvb card\n", core->name); 712 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
713 videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops, 713 videobuf_queue_pci_init(&dev->dvb.dvbq, &dvb_qops,
714 dev->pci, &dev->slock, 714 dev->pci, &dev->slock,
715 V4L2_BUF_TYPE_VIDEO_CAPTURE, 715 V4L2_BUF_TYPE_VIDEO_CAPTURE,
716 V4L2_FIELD_TOP, 716 V4L2_FIELD_TOP,
@@ -718,7 +718,8 @@ static int cx8802_dvb_probe(struct cx8802_driver *drv)
718 dev); 718 dev);
719 err = dvb_register(dev); 719 err = dvb_register(dev);
720 if (err != 0) 720 if (err != 0)
721 printk("%s dvb_register failed err = %d\n", __FUNCTION__, err); 721 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
722 core->name, err);
722 723
723 fail_core: 724 fail_core:
724 return err; 725 return err;
@@ -747,7 +748,7 @@ static struct cx8802_driver cx8802_dvb_driver = {
747 748
748static int dvb_init(void) 749static int dvb_init(void)
749{ 750{
750 printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n", 751 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
751 (CX88_VERSION_CODE >> 16) & 0xff, 752 (CX88_VERSION_CODE >> 16) & 0xff,
752 (CX88_VERSION_CODE >> 8) & 0xff, 753 (CX88_VERSION_CODE >> 8) & 0xff,
753 CX88_VERSION_CODE & 0xff); 754 CX88_VERSION_CODE & 0xff);
diff --git a/drivers/media/video/cx88/cx88-i2c.c b/drivers/media/video/cx88/cx88-i2c.c
index 78bbcfab9670..c8b1c50625f4 100644
--- a/drivers/media/video/cx88/cx88-i2c.c
+++ b/drivers/media/video/cx88/cx88-i2c.c
@@ -28,7 +28,6 @@
28*/ 28*/
29 29
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/init.h> 31#include <linux/init.h>
33 32
34#include <asm/io.h> 33#include <asm/io.h>
@@ -108,28 +107,28 @@ static int attach_inform(struct i2c_client *client)
108 if (!client->driver->command) 107 if (!client->driver->command)
109 return 0; 108 return 0;
110 109
111 if (core->radio_type != UNSET) { 110 if (core->board.radio_type != UNSET) {
112 if ((core->radio_addr==ADDR_UNSET)||(core->radio_addr==client->addr)) { 111 if ((core->board.radio_addr==ADDR_UNSET)||(core->board.radio_addr==client->addr)) {
113 tun_setup.mode_mask = T_RADIO; 112 tun_setup.mode_mask = T_RADIO;
114 tun_setup.type = core->radio_type; 113 tun_setup.type = core->board.radio_type;
115 tun_setup.addr = core->radio_addr; 114 tun_setup.addr = core->board.radio_addr;
116 115
117 client->driver->command (client, TUNER_SET_TYPE_ADDR, &tun_setup); 116 client->driver->command (client, TUNER_SET_TYPE_ADDR, &tun_setup);
118 } 117 }
119 } 118 }
120 if (core->tuner_type != UNSET) { 119 if (core->board.tuner_type != UNSET) {
121 if ((core->tuner_addr==ADDR_UNSET)||(core->tuner_addr==client->addr)) { 120 if ((core->board.tuner_addr==ADDR_UNSET)||(core->board.tuner_addr==client->addr)) {
122 121
123 tun_setup.mode_mask = T_ANALOG_TV; 122 tun_setup.mode_mask = T_ANALOG_TV;
124 tun_setup.type = core->tuner_type; 123 tun_setup.type = core->board.tuner_type;
125 tun_setup.addr = core->tuner_addr; 124 tun_setup.addr = core->board.tuner_addr;
126 125
127 client->driver->command (client,TUNER_SET_TYPE_ADDR, &tun_setup); 126 client->driver->command (client,TUNER_SET_TYPE_ADDR, &tun_setup);
128 } 127 }
129 } 128 }
130 129
131 if (core->tda9887_conf) 130 if (core->board.tda9887_conf)
132 client->driver->command(client, TDA9887_SET_CONFIG, &core->tda9887_conf); 131 client->driver->command(client, TDA9887_SET_CONFIG, &core->board.tda9887_conf);
133 return 0; 132 return 0;
134} 133}
135 134
@@ -146,7 +145,7 @@ void cx88_call_i2c_clients(struct cx88_core *core, unsigned int cmd, void *arg)
146 if (0 != core->i2c_rc) 145 if (0 != core->i2c_rc)
147 return; 146 return;
148 147
149#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 148#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
150 if ( (core->dvbdev) && (core->dvbdev->dvb.frontend) ) { 149 if ( (core->dvbdev) && (core->dvbdev->dvb.frontend) ) {
151 if (core->dvbdev->dvb.frontend->ops.i2c_gate_ctrl) 150 if (core->dvbdev->dvb.frontend->ops.i2c_gate_ctrl)
152 core->dvbdev->dvb.frontend->ops.i2c_gate_ctrl(core->dvbdev->dvb.frontend, 1); 151 core->dvbdev->dvb.frontend->ops.i2c_gate_ctrl(core->dvbdev->dvb.frontend, 1);
@@ -204,9 +203,9 @@ int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci)
204 memcpy(&core->i2c_algo, &cx8800_i2c_algo_template, 203 memcpy(&core->i2c_algo, &cx8800_i2c_algo_template,
205 sizeof(core->i2c_algo)); 204 sizeof(core->i2c_algo));
206 205
207 if (core->tuner_type != TUNER_ABSENT) 206 if (core->board.tuner_type != TUNER_ABSENT)
208 core->i2c_adap.class |= I2C_CLASS_TV_ANALOG; 207 core->i2c_adap.class |= I2C_CLASS_TV_ANALOG;
209 if (cx88_boards[core->board].mpeg & CX88_MPEG_DVB) 208 if (core->board.mpeg & CX88_MPEG_DVB)
210 core->i2c_adap.class |= I2C_CLASS_TV_DIGITAL; 209 core->i2c_adap.class |= I2C_CLASS_TV_DIGITAL;
211 210
212 core->i2c_adap.dev.parent = &pci->dev; 211 core->i2c_adap.dev.parent = &pci->dev;
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index f5d4a565346e..e52de3968c63 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -27,7 +27,6 @@
27#include <linux/input.h> 27#include <linux/input.h>
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/moduleparam.h>
31 30
32#include "cx88.h" 31#include "cx88.h"
33#include <media/ir-common.h> 32#include <media/ir-common.h>
@@ -74,7 +73,7 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
74 73
75 /* read gpio value */ 74 /* read gpio value */
76 gpio = cx_read(ir->gpio_addr); 75 gpio = cx_read(ir->gpio_addr);
77 switch (core->board) { 76 switch (core->boardnr) {
78 case CX88_BOARD_NPGTECH_REALTV_TOP10FM: 77 case CX88_BOARD_NPGTECH_REALTV_TOP10FM:
79 /* This board apparently uses a combination of 2 GPIO 78 /* This board apparently uses a combination of 2 GPIO
80 to represent the keys. Additionally, the second GPIO 79 to represent the keys. Additionally, the second GPIO
@@ -113,7 +112,7 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
113 (gpio & ir->mask_keydown) ? " down" : "", 112 (gpio & ir->mask_keydown) ? " down" : "",
114 (gpio & ir->mask_keyup) ? " up" : ""); 113 (gpio & ir->mask_keyup) ? " up" : "");
115 114
116 if (ir->core->board == CX88_BOARD_NORWOOD_MICRO) { 115 if (ir->core->boardnr == CX88_BOARD_NORWOOD_MICRO) {
117 u32 gpio_key = cx_read(MO_GP0_IO); 116 u32 gpio_key = cx_read(MO_GP0_IO);
118 117
119 data = (data << 4) | ((gpio_key & 0xf0) >> 4); 118 data = (data << 4) | ((gpio_key & 0xf0) >> 4);
@@ -159,7 +158,7 @@ static void cx88_ir_work(struct work_struct *work)
159 mod_timer(&ir->timer, jiffies + msecs_to_jiffies(ir->polling)); 158 mod_timer(&ir->timer, jiffies + msecs_to_jiffies(ir->polling));
160} 159}
161 160
162static void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir) 161void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir)
163{ 162{
164 if (ir->polling) { 163 if (ir->polling) {
165 setup_timer(&ir->timer, ir_timer, (unsigned long)ir); 164 setup_timer(&ir->timer, ir_timer, (unsigned long)ir);
@@ -167,17 +166,17 @@ static void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir)
167 schedule_work(&ir->work); 166 schedule_work(&ir->work);
168 } 167 }
169 if (ir->sampling) { 168 if (ir->sampling) {
170 core->pci_irqmask |= (1 << 18); /* IR_SMP_INT */ 169 core->pci_irqmask |= PCI_INT_IR_SMPINT;
171 cx_write(MO_DDS_IO, 0xa80a80); /* 4 kHz sample rate */ 170 cx_write(MO_DDS_IO, 0xa80a80); /* 4 kHz sample rate */
172 cx_write(MO_DDSCFG_IO, 0x5); /* enable */ 171 cx_write(MO_DDSCFG_IO, 0x5); /* enable */
173 } 172 }
174} 173}
175 174
176static void cx88_ir_stop(struct cx88_core *core, struct cx88_IR *ir) 175void cx88_ir_stop(struct cx88_core *core, struct cx88_IR *ir)
177{ 176{
178 if (ir->sampling) { 177 if (ir->sampling) {
179 cx_write(MO_DDSCFG_IO, 0x0); 178 cx_write(MO_DDSCFG_IO, 0x0);
180 core->pci_irqmask &= ~(1 << 18); 179 core->pci_irqmask &= ~PCI_INT_IR_SMPINT;
181 } 180 }
182 181
183 if (ir->polling) { 182 if (ir->polling) {
@@ -204,7 +203,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
204 ir->input = input_dev; 203 ir->input = input_dev;
205 204
206 /* detect & configure */ 205 /* detect & configure */
207 switch (core->board) { 206 switch (core->boardnr) {
208 case CX88_BOARD_DNTV_LIVE_DVB_T: 207 case CX88_BOARD_DNTV_LIVE_DVB_T:
209 case CX88_BOARD_KWORLD_DVB_T: 208 case CX88_BOARD_KWORLD_DVB_T:
210 case CX88_BOARD_KWORLD_DVB_T_CX22702: 209 case CX88_BOARD_KWORLD_DVB_T_CX22702:
@@ -314,8 +313,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
314 } 313 }
315 314
316 /* init input device */ 315 /* init input device */
317 snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", 316 snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name);
318 cx88_boards[core->board].name);
319 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci)); 317 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci));
320 318
321 ir_input_init(input_dev, &ir->ir, ir_type, ir_codes); 319 ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
@@ -406,7 +404,7 @@ void cx88_ir_irq(struct cx88_core *core)
406 ir_dump_samples(ir->samples, ir->scount); 404 ir_dump_samples(ir->samples, ir->scount);
407 405
408 /* decode it */ 406 /* decode it */
409 switch (core->board) { 407 switch (core->boardnr) {
410 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: 408 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
411 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: 409 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
412 ircode = ir_decode_pulsedistance(ir->samples, ir->scount, 1, 4); 410 ircode = ir_decode_pulsedistance(ir->samples, ir->scount, 1, 4);
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c
index da7a6b591a67..a652f294d23d 100644
--- a/drivers/media/video/cx88/cx88-mpeg.c
+++ b/drivers/media/video/cx88/cx88-mpeg.c
@@ -23,12 +23,10 @@
23 */ 23 */
24 24
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/device.h> 27#include <linux/device.h>
29#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
31#include <linux/dma-mapping.h>
32#include <asm/delay.h> 30#include <asm/delay.h>
33 31
34#include "cx88.h" 32#include "cx88.h"
@@ -56,9 +54,9 @@ static void request_module_async(struct work_struct *work)
56{ 54{
57 struct cx8802_dev *dev=container_of(work, struct cx8802_dev, request_module_wk); 55 struct cx8802_dev *dev=container_of(work, struct cx8802_dev, request_module_wk);
58 56
59 if (cx88_boards[dev->core->board].mpeg & CX88_MPEG_DVB) 57 if (dev->core->board.mpeg & CX88_MPEG_DVB)
60 request_module("cx88-dvb"); 58 request_module("cx88-dvb");
61 if (cx88_boards[dev->core->board].mpeg & CX88_MPEG_BLACKBIRD) 59 if (dev->core->board.mpeg & CX88_MPEG_BLACKBIRD)
62 request_module("cx88-blackbird"); 60 request_module("cx88-blackbird");
63} 61}
64 62
@@ -96,7 +94,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
96 dprintk( 1, "core->active_type_id = 0x%08x\n", core->active_type_id); 94 dprintk( 1, "core->active_type_id = 0x%08x\n", core->active_type_id);
97 95
98 if ( (core->active_type_id == CX88_MPEG_DVB) && 96 if ( (core->active_type_id == CX88_MPEG_DVB) &&
99 (cx88_boards[core->board].mpeg & CX88_MPEG_DVB) ) { 97 (core->board.mpeg & CX88_MPEG_DVB) ) {
100 98
101 dprintk( 1, "cx8802_start_dma doing .dvb\n"); 99 dprintk( 1, "cx8802_start_dma doing .dvb\n");
102 /* negedge driven & software reset */ 100 /* negedge driven & software reset */
@@ -104,7 +102,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
104 udelay(100); 102 udelay(100);
105 cx_write(MO_PINMUX_IO, 0x00); 103 cx_write(MO_PINMUX_IO, 0x00);
106 cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01); 104 cx_write(TS_HW_SOP_CNTRL,0x47<<16|188<<4|0x01);
107 switch (core->board) { 105 switch (core->boardnr) {
108 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: 106 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
109 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: 107 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
110 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 108 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
@@ -125,7 +123,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
125 cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl); 123 cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);
126 udelay(100); 124 udelay(100);
127 } else if ( (core->active_type_id == CX88_MPEG_BLACKBIRD) && 125 } else if ( (core->active_type_id == CX88_MPEG_BLACKBIRD) &&
128 (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) ) { 126 (core->board.mpeg & CX88_MPEG_BLACKBIRD) ) {
129 dprintk( 1, "cx8802_start_dma doing .blackbird\n"); 127 dprintk( 1, "cx8802_start_dma doing .blackbird\n");
130 cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */ 128 cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */
131 129
@@ -139,7 +137,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
139 udelay(100); 137 udelay(100);
140 } else { 138 } else {
141 printk( "%s() Failed. Unsupported value in .mpeg (0x%08x)\n", __FUNCTION__, 139 printk( "%s() Failed. Unsupported value in .mpeg (0x%08x)\n", __FUNCTION__,
142 cx88_boards[core->board].mpeg ); 140 core->board.mpeg );
143 return -EINVAL; 141 return -EINVAL;
144 } 142 }
145 143
@@ -149,7 +147,7 @@ static int cx8802_start_dma(struct cx8802_dev *dev,
149 147
150 /* enable irqs */ 148 /* enable irqs */
151 dprintk( 1, "setting the interrupt mask\n" ); 149 dprintk( 1, "setting the interrupt mask\n" );
152 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x04); 150 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_TSINT);
153 cx_set(MO_TS_INTMSK, 0x1f0011); 151 cx_set(MO_TS_INTMSK, 0x1f0011);
154 152
155 /* start dma */ 153 /* start dma */
@@ -167,7 +165,7 @@ static int cx8802_stop_dma(struct cx8802_dev *dev)
167 cx_clear(MO_TS_DMACNTRL, 0x11); 165 cx_clear(MO_TS_DMACNTRL, 0x11);
168 166
169 /* disable irqs */ 167 /* disable irqs */
170 cx_clear(MO_PCI_INTMSK, 0x000004); 168 cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);
171 cx_clear(MO_TS_INTMSK, 0x1f0011); 169 cx_clear(MO_TS_INTMSK, 0x1f0011);
172 170
173 /* Reset the controller */ 171 /* Reset the controller */
@@ -181,43 +179,43 @@ static int cx8802_restart_queue(struct cx8802_dev *dev,
181 struct cx88_buffer *buf; 179 struct cx88_buffer *buf;
182 struct list_head *item; 180 struct list_head *item;
183 181
184 dprintk( 1, "cx8802_restart_queue\n" ); 182 dprintk( 1, "cx8802_restart_queue\n" );
185 if (list_empty(&q->active)) 183 if (list_empty(&q->active))
186 { 184 {
187 struct cx88_buffer *prev; 185 struct cx88_buffer *prev;
188 prev = NULL; 186 prev = NULL;
189 187
190 dprintk(1, "cx8802_restart_queue: queue is empty\n" ); 188 dprintk(1, "cx8802_restart_queue: queue is empty\n" );
191 189
192 for (;;) { 190 for (;;) {
193 if (list_empty(&q->queued)) 191 if (list_empty(&q->queued))
194 return 0; 192 return 0;
195 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); 193 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
196 if (NULL == prev) { 194 if (NULL == prev) {
197 list_del(&buf->vb.queue); 195 list_del(&buf->vb.queue);
198 list_add_tail(&buf->vb.queue,&q->active); 196 list_add_tail(&buf->vb.queue,&q->active);
199 cx8802_start_dma(dev, q, buf); 197 cx8802_start_dma(dev, q, buf);
200 buf->vb.state = STATE_ACTIVE; 198 buf->vb.state = STATE_ACTIVE;
201 buf->count = q->count++; 199 buf->count = q->count++;
202 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); 200 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
203 dprintk(1,"[%p/%d] restart_queue - first active\n", 201 dprintk(1,"[%p/%d] restart_queue - first active\n",
204 buf,buf->vb.i); 202 buf,buf->vb.i);
205 203
206 } else if (prev->vb.width == buf->vb.width && 204 } else if (prev->vb.width == buf->vb.width &&
207 prev->vb.height == buf->vb.height && 205 prev->vb.height == buf->vb.height &&
208 prev->fmt == buf->fmt) { 206 prev->fmt == buf->fmt) {
209 list_del(&buf->vb.queue); 207 list_del(&buf->vb.queue);
210 list_add_tail(&buf->vb.queue,&q->active); 208 list_add_tail(&buf->vb.queue,&q->active);
211 buf->vb.state = STATE_ACTIVE; 209 buf->vb.state = STATE_ACTIVE;
212 buf->count = q->count++; 210 buf->count = q->count++;
213 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 211 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
214 dprintk(1,"[%p/%d] restart_queue - move to active\n", 212 dprintk(1,"[%p/%d] restart_queue - move to active\n",
215 buf,buf->vb.i); 213 buf,buf->vb.i);
216 } else { 214 } else {
217 return 0; 215 return 0;
218 } 216 }
219 prev = buf; 217 prev = buf;
220 } 218 }
221 return 0; 219 return 0;
222 } 220 }
223 221
@@ -239,6 +237,7 @@ int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
239 struct cx88_buffer *buf, enum v4l2_field field) 237 struct cx88_buffer *buf, enum v4l2_field field)
240{ 238{
241 int size = dev->ts_packet_size * dev->ts_packet_count; 239 int size = dev->ts_packet_size * dev->ts_packet_count;
240 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
242 int rc; 241 int rc;
243 242
244 dprintk(1, "%s: %p\n", __FUNCTION__, buf); 243 dprintk(1, "%s: %p\n", __FUNCTION__, buf);
@@ -254,8 +253,8 @@ int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
254 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) 253 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
255 goto fail; 254 goto fail;
256 cx88_risc_databuffer(dev->pci, &buf->risc, 255 cx88_risc_databuffer(dev->pci, &buf->risc,
257 buf->vb.dma.sglist, 256 dma->sglist,
258 buf->vb.width, buf->vb.height); 257 buf->vb.width, buf->vb.height, 0);
259 } 258 }
260 buf->vb.state = STATE_PREPARED; 259 buf->vb.state = STATE_PREPARED;
261 return 0; 260 return 0;
@@ -414,7 +413,8 @@ static irqreturn_t cx8802_irq(int irq, void *dev_id)
414 int loop, handled = 0; 413 int loop, handled = 0;
415 414
416 for (loop = 0; loop < MAX_IRQ_LOOP; loop++) { 415 for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
417 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x04); 416 status = cx_read(MO_PCI_INTSTAT) &
417 (core->pci_irqmask | PCI_INT_TSINT);
418 if (0 == status) 418 if (0 == status)
419 goto out; 419 goto out;
420 dprintk( 1, "cx8802_irq\n" ); 420 dprintk( 1, "cx8802_irq\n" );
@@ -425,7 +425,7 @@ static irqreturn_t cx8802_irq(int irq, void *dev_id)
425 425
426 if (status & core->pci_irqmask) 426 if (status & core->pci_irqmask)
427 cx88_core_irq(core,status); 427 cx88_core_irq(core,status);
428 if (status & 0x04) 428 if (status & PCI_INT_TSINT)
429 cx8802_mpeg_irq(dev); 429 cx8802_mpeg_irq(dev);
430 }; 430 };
431 if (MAX_IRQ_LOOP == loop) { 431 if (MAX_IRQ_LOOP == loop) {
@@ -676,22 +676,24 @@ int cx8802_register_driver(struct cx8802_driver *drv)
676 struct list_head *list; 676 struct list_head *list;
677 int err = 0, i = 0; 677 int err = 0, i = 0;
678 678
679 printk(KERN_INFO "%s() ->registering driver type=%s access=%s\n", __FUNCTION__ , 679 printk(KERN_INFO
680 drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird", 680 "cx88/2: registering cx8802 driver, type: %s access: %s\n",
681 drv->hw_access == CX8802_DRVCTL_SHARED ? "shared" : "exclusive"); 681 drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird",
682 drv->hw_access == CX8802_DRVCTL_SHARED ? "shared" : "exclusive");
682 683
683 if ((err = cx8802_check_driver(drv)) != 0) { 684 if ((err = cx8802_check_driver(drv)) != 0) {
684 printk(KERN_INFO "%s() cx8802_driver is invalid\n", __FUNCTION__ ); 685 printk(KERN_ERR "cx88/2: cx8802_driver is invalid\n");
685 return err; 686 return err;
686 } 687 }
687 688
688 list_for_each(list,&cx8802_devlist) { 689 list_for_each(list,&cx8802_devlist) {
689 h = list_entry(list, struct cx8802_dev, devlist); 690 h = list_entry(list, struct cx8802_dev, devlist);
690 691
691 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d]\n", 692 printk(KERN_INFO
692 h->core->name,h->pci->subsystem_vendor, 693 "%s/2: subsystem: %04x:%04x, board: %s [card=%d]\n",
693 h->pci->subsystem_device,cx88_boards[h->core->board].name, 694 h->core->name, h->pci->subsystem_vendor,
694 h->core->board); 695 h->pci->subsystem_device, h->core->board.name,
696 h->core->boardnr);
695 697
696 /* Bring up a new struct for each driver instance */ 698 /* Bring up a new struct for each driver instance */
697 driver = kzalloc(sizeof(*drv),GFP_KERNEL); 699 driver = kzalloc(sizeof(*drv),GFP_KERNEL);
@@ -713,7 +715,9 @@ int cx8802_register_driver(struct cx8802_driver *drv)
713 list_add_tail(&driver->devlist,&h->drvlist.devlist); 715 list_add_tail(&driver->devlist,&h->drvlist.devlist);
714 mutex_unlock(&drv->core->lock); 716 mutex_unlock(&drv->core->lock);
715 } else { 717 } else {
716 printk(KERN_ERR "%s() ->probe failed err = %d\n", __FUNCTION__, err); 718 printk(KERN_ERR
719 "%s/2: cx8802 probe failed, err = %d\n",
720 h->core->name, err);
717 } 721 }
718 722
719 } 723 }
@@ -733,17 +737,20 @@ int cx8802_unregister_driver(struct cx8802_driver *drv)
733 struct list_head *list2, *q; 737 struct list_head *list2, *q;
734 int err = 0, i = 0; 738 int err = 0, i = 0;
735 739
736 printk(KERN_INFO "%s() ->unregistering driver type=%s\n", __FUNCTION__ , 740 printk(KERN_INFO
737 drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird"); 741 "cx88/2: unregistering cx8802 driver, type: %s access: %s\n",
742 drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird",
743 drv->hw_access == CX8802_DRVCTL_SHARED ? "shared" : "exclusive");
738 744
739 list_for_each(list,&cx8802_devlist) { 745 list_for_each(list,&cx8802_devlist) {
740 i++; 746 i++;
741 h = list_entry(list, struct cx8802_dev, devlist); 747 h = list_entry(list, struct cx8802_dev, devlist);
742 748
743 printk(KERN_INFO "CORE %s: subsystem: %04x:%04x, board: %s [card=%d]\n", 749 printk(KERN_INFO
744 h->core->name,h->pci->subsystem_vendor, 750 "%s/2: subsystem: %04x:%04x, board: %s [card=%d]\n",
745 h->pci->subsystem_device,cx88_boards[h->core->board].name, 751 h->core->name, h->pci->subsystem_vendor,
746 h->core->board); 752 h->pci->subsystem_device, h->core->board.name,
753 h->core->boardnr);
747 754
748 list_for_each_safe(list2, q, &h->drvlist.devlist) { 755 list_for_each_safe(list2, q, &h->drvlist.devlist) {
749 d = list_entry(list2, struct cx8802_driver, devlist); 756 d = list_entry(list2, struct cx8802_driver, devlist);
@@ -758,7 +765,8 @@ int cx8802_unregister_driver(struct cx8802_driver *drv)
758 list_del(list2); 765 list_del(list2);
759 mutex_unlock(&drv->core->lock); 766 mutex_unlock(&drv->core->lock);
760 } else 767 } else
761 printk(KERN_ERR "%s() ->remove failed err = %d\n", __FUNCTION__, err); 768 printk(KERN_ERR "%s/2: cx8802 driver remove "
769 "failed (%d)\n", h->core->name, err);
762 770
763 } 771 }
764 772
@@ -783,7 +791,7 @@ static int __devinit cx8802_probe(struct pci_dev *pci_dev,
783 printk("%s/2: cx2388x 8802 Driver Manager\n", core->name); 791 printk("%s/2: cx2388x 8802 Driver Manager\n", core->name);
784 792
785 err = -ENODEV; 793 err = -ENODEV;
786 if (!cx88_boards[core->board].mpeg) 794 if (!core->board.mpeg)
787 goto fail_core; 795 goto fail_core;
788 796
789 err = -ENOMEM; 797 err = -ENOMEM;
@@ -866,7 +874,7 @@ static struct pci_driver cx8802_pci_driver = {
866 874
867static int cx8802_init(void) 875static int cx8802_init(void)
868{ 876{
869 printk(KERN_INFO "cx2388x cx88-mpeg Driver Manager version %d.%d.%d loaded\n", 877 printk(KERN_INFO "cx88/2: cx2388x MPEG-TS Driver Manager version %d.%d.%d loaded\n",
870 (CX88_VERSION_CODE >> 16) & 0xff, 878 (CX88_VERSION_CODE >> 16) & 0xff,
871 (CX88_VERSION_CODE >> 8) & 0xff, 879 (CX88_VERSION_CODE >> 8) & 0xff,
872 CX88_VERSION_CODE & 0xff); 880 CX88_VERSION_CODE & 0xff);
diff --git a/drivers/media/video/cx88/cx88-reg.h b/drivers/media/video/cx88/cx88-reg.h
index d3bf5b17b1d4..2ec52d1cdea0 100644
--- a/drivers/media/video/cx88/cx88-reg.h
+++ b/drivers/media/video/cx88/cx88-reg.h
@@ -582,6 +582,28 @@
582/* ---------------------------------------------------------------------- */ 582/* ---------------------------------------------------------------------- */
583/* various constants */ 583/* various constants */
584 584
585// DMA
586/* Interrupt mask/status */
587#define PCI_INT_VIDINT (1 << 0)
588#define PCI_INT_AUDINT (1 << 1)
589#define PCI_INT_TSINT (1 << 2)
590#define PCI_INT_VIPINT (1 << 3)
591#define PCI_INT_HSTINT (1 << 4)
592#define PCI_INT_TM1INT (1 << 5)
593#define PCI_INT_SRCDMAINT (1 << 6)
594#define PCI_INT_DSTDMAINT (1 << 7)
595#define PCI_INT_RISC_RD_BERRINT (1 << 10)
596#define PCI_INT_RISC_WR_BERRINT (1 << 11)
597#define PCI_INT_BRDG_BERRINT (1 << 12)
598#define PCI_INT_SRC_DMA_BERRINT (1 << 13)
599#define PCI_INT_DST_DMA_BERRINT (1 << 14)
600#define PCI_INT_IPB_DMA_BERRINT (1 << 15)
601#define PCI_INT_I2CDONE (1 << 16)
602#define PCI_INT_I2CRACK (1 << 17)
603#define PCI_INT_IR_SMPINT (1 << 18)
604#define PCI_INT_GPIO_INT0 (1 << 19)
605#define PCI_INT_GPIO_INT1 (1 << 20)
606
585#define SEL_BTSC 0x01 607#define SEL_BTSC 0x01
586#define SEL_EIAJ 0x02 608#define SEL_EIAJ 0x02
587#define SEL_A2 0x04 609#define SEL_A2 0x04
@@ -590,6 +612,19 @@
590#define SEL_FMRADIO 0x20 612#define SEL_FMRADIO 0x20
591 613
592// AUD_CTL 614// AUD_CTL
615#define AUD_INT_DN_RISCI1 (1 << 0)
616#define AUD_INT_UP_RISCI1 (1 << 1)
617#define AUD_INT_RDS_DN_RISCI1 (1 << 2)
618#define AUD_INT_DN_RISCI2 (1 << 4) /* yes, 3 is skipped */
619#define AUD_INT_UP_RISCI2 (1 << 5)
620#define AUD_INT_RDS_DN_RISCI2 (1 << 6)
621#define AUD_INT_DN_SYNC (1 << 12)
622#define AUD_INT_UP_SYNC (1 << 13)
623#define AUD_INT_RDS_DN_SYNC (1 << 14)
624#define AUD_INT_OPC_ERR (1 << 16)
625#define AUD_INT_BER_IRQ (1 << 20)
626#define AUD_INT_MCHG_IRQ (1 << 21)
627
593#define EN_BTSC_FORCE_MONO 0 628#define EN_BTSC_FORCE_MONO 0
594#define EN_BTSC_FORCE_STEREO 1 629#define EN_BTSC_FORCE_STEREO 1
595#define EN_BTSC_FORCE_SAP 2 630#define EN_BTSC_FORCE_SAP 2
diff --git a/drivers/media/video/cx88/cx88-tvaudio.c b/drivers/media/video/cx88/cx88-tvaudio.c
index 1cc2d286a1cb..76e5c78d8ae4 100644
--- a/drivers/media/video/cx88/cx88-tvaudio.c
+++ b/drivers/media/video/cx88/cx88-tvaudio.c
@@ -36,7 +36,6 @@
36*/ 36*/
37 37
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/moduleparam.h>
40#include <linux/errno.h> 39#include <linux/errno.h>
41#include <linux/freezer.h> 40#include <linux/freezer.h>
42#include <linux/kernel.h> 41#include <linux/kernel.h>
@@ -62,6 +61,10 @@ static unsigned int always_analog = 0;
62module_param(always_analog,int,0644); 61module_param(always_analog,int,0644);
63MODULE_PARM_DESC(always_analog,"force analog audio out"); 62MODULE_PARM_DESC(always_analog,"force analog audio out");
64 63
64static unsigned int radio_deemphasis = 0;
65module_param(radio_deemphasis,int,0644);
66MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, "
67 "0=None, 1=50us (elsewhere), 2=75us (USA)");
65 68
66#define dprintk(fmt, arg...) if (audio_debug) \ 69#define dprintk(fmt, arg...) if (audio_debug) \
67 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) 70 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
@@ -140,7 +143,7 @@ static void set_audio_finish(struct cx88_core *core, u32 ctl)
140 cx_write(AUD_RATE_THRES_DMD, 0x000000C0); 143 cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
141 cx88_start_audio_dma(core); 144 cx88_start_audio_dma(core);
142 145
143 if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) { 146 if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
144 cx_write(AUD_I2SINPUTCNTL, 4); 147 cx_write(AUD_I2SINPUTCNTL, 4);
145 cx_write(AUD_BAUDRATE, 1); 148 cx_write(AUD_BAUDRATE, 1);
146 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */ 149 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
@@ -149,7 +152,7 @@ static void set_audio_finish(struct cx88_core *core, u32 ctl)
149 cx_write(AUD_I2SCNTL, 0); 152 cx_write(AUD_I2SCNTL, 0);
150 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ 153 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
151 } 154 }
152 if ((always_analog) || (!(cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD))) { 155 if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
153 ctl |= EN_DAC_ENABLE; 156 ctl |= EN_DAC_ENABLE;
154 cx_write(AUD_CTL, ctl); 157 cx_write(AUD_CTL, ctl);
155 } 158 }
@@ -678,6 +681,10 @@ static void set_audio_standard_FM(struct cx88_core *core,
678 }; 681 };
679 682
680 /* It is enough to leave default values? */ 683 /* It is enough to leave default values? */
684 /* No, it's not! The deemphasis registers are reset to the 75us
685 * values by default. Analyzing the spectrum of the decoded audio
686 * reveals that "no deemphasis" is the same as 75 us, while the 50 us
687 * setting results in less deemphasis. */
681 static const struct rlist fm_no_deemph[] = { 688 static const struct rlist fm_no_deemph[] = {
682 689
683 {AUD_POLYPH80SCALEFAC, 0x0003}, 690 {AUD_POLYPH80SCALEFAC, 0x0003},
@@ -688,6 +695,7 @@ static void set_audio_standard_FM(struct cx88_core *core,
688 set_audio_start(core, SEL_FMRADIO); 695 set_audio_start(core, SEL_FMRADIO);
689 696
690 switch (deemph) { 697 switch (deemph) {
698 default:
691 case FM_NO_DEEMPH: 699 case FM_NO_DEEMPH:
692 set_audio_registers(core, fm_no_deemph); 700 set_audio_registers(core, fm_no_deemph);
693 break; 701 break;
@@ -757,7 +765,7 @@ void cx88_set_tvaudio(struct cx88_core *core)
757 set_audio_standard_EIAJ(core); 765 set_audio_standard_EIAJ(core);
758 break; 766 break;
759 case WW_FM: 767 case WW_FM:
760 set_audio_standard_FM(core, FM_NO_DEEMPH); 768 set_audio_standard_FM(core, radio_deemphasis);
761 break; 769 break;
762 case WW_NONE: 770 case WW_NONE:
763 default: 771 default:
@@ -790,9 +798,9 @@ void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
790 core->astat = reg; 798 core->astat = reg;
791 799
792/* TODO 800/* TODO
793 Reading from AUD_STATUS is not enough 801 Reading from AUD_STATUS is not enough
794 for auto-detecting sap/dual-fm/nicam. 802 for auto-detecting sap/dual-fm/nicam.
795 Add some code here later. 803 Add some code here later.
796*/ 804*/
797 805
798 return; 806 return;
diff --git a/drivers/media/video/cx88/cx88-vbi.c b/drivers/media/video/cx88/cx88-vbi.c
index 86c1cf8334bc..babb08556406 100644
--- a/drivers/media/video/cx88/cx88-vbi.c
+++ b/drivers/media/video/cx88/cx88-vbi.c
@@ -2,7 +2,6 @@
2 */ 2 */
3#include <linux/kernel.h> 3#include <linux/kernel.h>
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/moduleparam.h>
6#include <linux/init.h> 5#include <linux/init.h>
7#include <linux/slab.h> 6#include <linux/slab.h>
8 7
@@ -67,7 +66,7 @@ static int cx8800_start_vbi_dma(struct cx8800_dev *dev,
67 q->count = 1; 66 q->count = 1;
68 67
69 /* enable irqs */ 68 /* enable irqs */
70 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01); 69 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
71 cx_set(MO_VID_INTMSK, 0x0f0088); 70 cx_set(MO_VID_INTMSK, 0x0f0088);
72 71
73 /* enable capture */ 72 /* enable capture */
@@ -91,7 +90,7 @@ int cx8800_stop_vbi_dma(struct cx8800_dev *dev)
91 cx_clear(VID_CAPTURE_CONTROL,0x18); 90 cx_clear(VID_CAPTURE_CONTROL,0x18);
92 91
93 /* disable irqs */ 92 /* disable irqs */
94 cx_clear(MO_PCI_INTMSK, 0x000001); 93 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
95 cx_clear(MO_VID_INTMSK, 0x0f0088); 94 cx_clear(MO_VID_INTMSK, 0x0f0088);
96 return 0; 95 return 0;
97} 96}
@@ -100,7 +99,6 @@ int cx8800_restart_vbi_queue(struct cx8800_dev *dev,
100 struct cx88_dmaqueue *q) 99 struct cx88_dmaqueue *q)
101{ 100{
102 struct cx88_buffer *buf; 101 struct cx88_buffer *buf;
103 struct list_head *item;
104 102
105 if (list_empty(&q->active)) 103 if (list_empty(&q->active))
106 return 0; 104 return 0;
@@ -109,10 +107,8 @@ int cx8800_restart_vbi_queue(struct cx8800_dev *dev,
109 dprintk(2,"restart_queue [%p/%d]: restart dma\n", 107 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
110 buf, buf->vb.i); 108 buf, buf->vb.i);
111 cx8800_start_vbi_dma(dev, q, buf); 109 cx8800_start_vbi_dma(dev, q, buf);
112 list_for_each(item,&q->active) { 110 list_for_each_entry(buf, &q->active, vb.queue)
113 buf = list_entry(item, struct cx88_buffer, vb.queue);
114 buf->count = q->count++; 111 buf->count = q->count++;
115 }
116 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); 112 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
117 return 0; 113 return 0;
118} 114}
@@ -173,6 +169,7 @@ vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
173 return -EINVAL; 169 return -EINVAL;
174 170
175 if (STATE_NEEDS_INIT == buf->vb.state) { 171 if (STATE_NEEDS_INIT == buf->vb.state) {
172 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
176 buf->vb.width = VBI_LINE_LENGTH; 173 buf->vb.width = VBI_LINE_LENGTH;
177 buf->vb.height = VBI_LINE_COUNT; 174 buf->vb.height = VBI_LINE_COUNT;
178 buf->vb.size = size; 175 buf->vb.size = size;
@@ -181,7 +178,7 @@ vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
181 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) 178 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
182 goto fail; 179 goto fail;
183 cx88_risc_buffer(dev->pci, &buf->risc, 180 cx88_risc_buffer(dev->pci, &buf->risc,
184 buf->vb.dma.sglist, 181 dma->sglist,
185 0, buf->vb.width * buf->vb.height, 182 0, buf->vb.width * buf->vb.height,
186 buf->vb.width, 0, 183 buf->vb.width, 0,
187 buf->vb.height); 184 buf->vb.height);
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c
index 06b233a7b20b..231ae6c4dd22 100644
--- a/drivers/media/video/cx88/cx88-video.c
+++ b/drivers/media/video/cx88/cx88-video.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/list.h> 29#include <linux/list.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/kmod.h> 31#include <linux/kmod.h>
33#include <linux/kernel.h> 32#include <linux/kernel.h>
34#include <linux/slab.h> 33#include <linux/slab.h>
@@ -36,7 +35,6 @@
36#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
37#include <linux/delay.h> 36#include <linux/delay.h>
38#include <linux/kthread.h> 37#include <linux/kthread.h>
39#include <linux/dma-mapping.h>
40#include <asm/div64.h> 38#include <asm/div64.h>
41 39
42#include "cx88.h" 40#include "cx88.h"
@@ -369,17 +367,17 @@ int cx88_video_mux(struct cx88_core *core, unsigned int input)
369 /* struct cx88_core *core = dev->core; */ 367 /* struct cx88_core *core = dev->core; */
370 368
371 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", 369 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
372 input, INPUT(input)->vmux, 370 input, INPUT(input).vmux,
373 INPUT(input)->gpio0,INPUT(input)->gpio1, 371 INPUT(input).gpio0,INPUT(input).gpio1,
374 INPUT(input)->gpio2,INPUT(input)->gpio3); 372 INPUT(input).gpio2,INPUT(input).gpio3);
375 core->input = input; 373 core->input = input;
376 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14); 374 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
377 cx_write(MO_GP3_IO, INPUT(input)->gpio3); 375 cx_write(MO_GP3_IO, INPUT(input).gpio3);
378 cx_write(MO_GP0_IO, INPUT(input)->gpio0); 376 cx_write(MO_GP0_IO, INPUT(input).gpio0);
379 cx_write(MO_GP1_IO, INPUT(input)->gpio1); 377 cx_write(MO_GP1_IO, INPUT(input).gpio1);
380 cx_write(MO_GP2_IO, INPUT(input)->gpio2); 378 cx_write(MO_GP2_IO, INPUT(input).gpio2);
381 379
382 switch (INPUT(input)->type) { 380 switch (INPUT(input).type) {
383 case CX88_VMUX_SVIDEO: 381 case CX88_VMUX_SVIDEO:
384 cx_set(MO_AFECFG_IO, 0x00000001); 382 cx_set(MO_AFECFG_IO, 0x00000001);
385 cx_set(MO_INPUT_FORMAT, 0x00010010); 383 cx_set(MO_INPUT_FORMAT, 0x00010010);
@@ -394,9 +392,9 @@ int cx88_video_mux(struct cx88_core *core, unsigned int input)
394 break; 392 break;
395 } 393 }
396 394
397 if (cx88_boards[core->board].mpeg & CX88_MPEG_BLACKBIRD) { 395 if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
398 /* sets sound input from external adc */ 396 /* sets sound input from external adc */
399 if (INPUT(input)->extadc) 397 if (INPUT(input).extadc)
400 cx_set(AUD_CTL, EN_I2SIN_ENABLE); 398 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
401 else 399 else
402 cx_clear(AUD_CTL, EN_I2SIN_ENABLE); 400 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
@@ -424,7 +422,7 @@ static int start_video_dma(struct cx8800_dev *dev,
424 q->count = 1; 422 q->count = 1;
425 423
426 /* enable irqs */ 424 /* enable irqs */
427 cx_set(MO_PCI_INTMSK, core->pci_irqmask | 0x01); 425 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
428 426
429 /* Enables corresponding bits at PCI_INT_STAT: 427 /* Enables corresponding bits at PCI_INT_STAT:
430 bits 0 to 4: video, audio, transport stream, VIP, Host 428 bits 0 to 4: video, audio, transport stream, VIP, Host
@@ -457,7 +455,7 @@ static int stop_video_dma(struct cx8800_dev *dev)
457 cx_clear(VID_CAPTURE_CONTROL,0x06); 455 cx_clear(VID_CAPTURE_CONTROL,0x06);
458 456
459 /* disable irqs */ 457 /* disable irqs */
460 cx_clear(MO_PCI_INTMSK, 0x000001); 458 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
461 cx_clear(MO_VID_INTMSK, 0x0f0011); 459 cx_clear(MO_VID_INTMSK, 0x0f0011);
462 return 0; 460 return 0;
463} 461}
@@ -468,17 +466,14 @@ static int restart_video_queue(struct cx8800_dev *dev,
468{ 466{
469 struct cx88_core *core = dev->core; 467 struct cx88_core *core = dev->core;
470 struct cx88_buffer *buf, *prev; 468 struct cx88_buffer *buf, *prev;
471 struct list_head *item;
472 469
473 if (!list_empty(&q->active)) { 470 if (!list_empty(&q->active)) {
474 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); 471 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
475 dprintk(2,"restart_queue [%p/%d]: restart dma\n", 472 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
476 buf, buf->vb.i); 473 buf, buf->vb.i);
477 start_video_dma(dev, q, buf); 474 start_video_dma(dev, q, buf);
478 list_for_each(item,&q->active) { 475 list_for_each_entry(buf, &q->active, vb.queue)
479 buf = list_entry(item, struct cx88_buffer, vb.queue); 476 buf->count = q->count++;
480 buf->count = q->count++;
481 }
482 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); 477 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
483 return 0; 478 return 0;
484 } 479 }
@@ -536,6 +531,7 @@ buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
536 struct cx8800_dev *dev = fh->dev; 531 struct cx8800_dev *dev = fh->dev;
537 struct cx88_core *core = dev->core; 532 struct cx88_core *core = dev->core;
538 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); 533 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
534 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
539 int rc, init_buffer = 0; 535 int rc, init_buffer = 0;
540 536
541 BUG_ON(NULL == fh->fmt); 537 BUG_ON(NULL == fh->fmt);
@@ -568,30 +564,30 @@ buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
568 switch (buf->vb.field) { 564 switch (buf->vb.field) {
569 case V4L2_FIELD_TOP: 565 case V4L2_FIELD_TOP:
570 cx88_risc_buffer(dev->pci, &buf->risc, 566 cx88_risc_buffer(dev->pci, &buf->risc,
571 buf->vb.dma.sglist, 0, UNSET, 567 dma->sglist, 0, UNSET,
572 buf->bpl, 0, buf->vb.height); 568 buf->bpl, 0, buf->vb.height);
573 break; 569 break;
574 case V4L2_FIELD_BOTTOM: 570 case V4L2_FIELD_BOTTOM:
575 cx88_risc_buffer(dev->pci, &buf->risc, 571 cx88_risc_buffer(dev->pci, &buf->risc,
576 buf->vb.dma.sglist, UNSET, 0, 572 dma->sglist, UNSET, 0,
577 buf->bpl, 0, buf->vb.height); 573 buf->bpl, 0, buf->vb.height);
578 break; 574 break;
579 case V4L2_FIELD_INTERLACED: 575 case V4L2_FIELD_INTERLACED:
580 cx88_risc_buffer(dev->pci, &buf->risc, 576 cx88_risc_buffer(dev->pci, &buf->risc,
581 buf->vb.dma.sglist, 0, buf->bpl, 577 dma->sglist, 0, buf->bpl,
582 buf->bpl, buf->bpl, 578 buf->bpl, buf->bpl,
583 buf->vb.height >> 1); 579 buf->vb.height >> 1);
584 break; 580 break;
585 case V4L2_FIELD_SEQ_TB: 581 case V4L2_FIELD_SEQ_TB:
586 cx88_risc_buffer(dev->pci, &buf->risc, 582 cx88_risc_buffer(dev->pci, &buf->risc,
587 buf->vb.dma.sglist, 583 dma->sglist,
588 0, buf->bpl * (buf->vb.height >> 1), 584 0, buf->bpl * (buf->vb.height >> 1),
589 buf->bpl, 0, 585 buf->bpl, 0,
590 buf->vb.height >> 1); 586 buf->vb.height >> 1);
591 break; 587 break;
592 case V4L2_FIELD_SEQ_BT: 588 case V4L2_FIELD_SEQ_BT:
593 cx88_risc_buffer(dev->pci, &buf->risc, 589 cx88_risc_buffer(dev->pci, &buf->risc,
594 buf->vb.dma.sglist, 590 dma->sglist,
595 buf->bpl * (buf->vb.height >> 1), 0, 591 buf->bpl * (buf->vb.height >> 1), 0,
596 buf->bpl, 0, 592 buf->bpl, 0,
597 buf->vb.height >> 1); 593 buf->vb.height >> 1);
@@ -714,12 +710,10 @@ static int video_open(struct inode *inode, struct file *file)
714 struct cx8800_dev *h,*dev = NULL; 710 struct cx8800_dev *h,*dev = NULL;
715 struct cx88_core *core; 711 struct cx88_core *core;
716 struct cx8800_fh *fh; 712 struct cx8800_fh *fh;
717 struct list_head *list;
718 enum v4l2_buf_type type = 0; 713 enum v4l2_buf_type type = 0;
719 int radio = 0; 714 int radio = 0;
720 715
721 list_for_each(list,&cx8800_devlist) { 716 list_for_each_entry(h, &cx8800_devlist, devlist) {
722 h = list_entry(list, struct cx8800_dev, devlist);
723 if (h->video_dev->minor == minor) { 717 if (h->video_dev->minor == minor) {
724 dev = h; 718 dev = h;
725 type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 719 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
@@ -754,13 +748,13 @@ static int video_open(struct inode *inode, struct file *file)
754 fh->height = 240; 748 fh->height = 240;
755 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); 749 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
756 750
757 videobuf_queue_init(&fh->vidq, &cx8800_video_qops, 751 videobuf_queue_pci_init(&fh->vidq, &cx8800_video_qops,
758 dev->pci, &dev->slock, 752 dev->pci, &dev->slock,
759 V4L2_BUF_TYPE_VIDEO_CAPTURE, 753 V4L2_BUF_TYPE_VIDEO_CAPTURE,
760 V4L2_FIELD_INTERLACED, 754 V4L2_FIELD_INTERLACED,
761 sizeof(struct cx88_buffer), 755 sizeof(struct cx88_buffer),
762 fh); 756 fh);
763 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops, 757 videobuf_queue_pci_init(&fh->vbiq, &cx8800_vbi_qops,
764 dev->pci, &dev->slock, 758 dev->pci, &dev->slock,
765 V4L2_BUF_TYPE_VBI_CAPTURE, 759 V4L2_BUF_TYPE_VBI_CAPTURE,
766 V4L2_FIELD_SEQ_TB, 760 V4L2_FIELD_SEQ_TB,
@@ -768,12 +762,11 @@ static int video_open(struct inode *inode, struct file *file)
768 fh); 762 fh);
769 763
770 if (fh->radio) { 764 if (fh->radio) {
771 int board = core->board;
772 dprintk(1,"video_open: setting radio device\n"); 765 dprintk(1,"video_open: setting radio device\n");
773 cx_write(MO_GP3_IO, cx88_boards[board].radio.gpio3); 766 cx_write(MO_GP3_IO, core->board.radio.gpio3);
774 cx_write(MO_GP0_IO, cx88_boards[board].radio.gpio0); 767 cx_write(MO_GP0_IO, core->board.radio.gpio0);
775 cx_write(MO_GP1_IO, cx88_boards[board].radio.gpio1); 768 cx_write(MO_GP1_IO, core->board.radio.gpio1);
776 cx_write(MO_GP2_IO, cx88_boards[board].radio.gpio2); 769 cx_write(MO_GP2_IO, core->board.radio.gpio2);
777 core->tvaudio = WW_FM; 770 core->tvaudio = WW_FM;
778 cx88_set_tvaudio(core); 771 cx88_set_tvaudio(core);
779 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1); 772 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
@@ -1079,8 +1072,7 @@ static int vidioc_querycap (struct file *file, void *priv,
1079 struct cx88_core *core = dev->core; 1072 struct cx88_core *core = dev->core;
1080 1073
1081 strcpy(cap->driver, "cx8800"); 1074 strcpy(cap->driver, "cx8800");
1082 strlcpy(cap->card, cx88_boards[core->board].name, 1075 strlcpy(cap->card, core->board.name, sizeof(cap->card));
1083 sizeof(cap->card));
1084 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); 1076 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1085 cap->version = CX88_VERSION_CODE; 1077 cap->version = CX88_VERSION_CODE;
1086 cap->capabilities = 1078 cap->capabilities =
@@ -1088,7 +1080,7 @@ static int vidioc_querycap (struct file *file, void *priv,
1088 V4L2_CAP_READWRITE | 1080 V4L2_CAP_READWRITE |
1089 V4L2_CAP_STREAMING | 1081 V4L2_CAP_STREAMING |
1090 V4L2_CAP_VBI_CAPTURE; 1082 V4L2_CAP_VBI_CAPTURE;
1091 if (UNSET != core->tuner_type) 1083 if (UNSET != core->board.tuner_type)
1092 cap->capabilities |= V4L2_CAP_TUNER; 1084 cap->capabilities |= V4L2_CAP_TUNER;
1093 return 0; 1085 return 0;
1094} 1086}
@@ -1108,28 +1100,9 @@ static int vidioc_enum_fmt_cap (struct file *file, void *priv,
1108#ifdef CONFIG_VIDEO_V4L1_COMPAT 1100#ifdef CONFIG_VIDEO_V4L1_COMPAT
1109static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf) 1101static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1110{ 1102{
1111 struct cx8800_fh *fh = priv; 1103 struct cx8800_fh *fh = priv;
1112 struct videobuf_queue *q;
1113 struct v4l2_requestbuffers req;
1114 unsigned int i;
1115 int err;
1116 1104
1117 q = get_queue(fh); 1105 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
1118 memset(&req,0,sizeof(req));
1119 req.type = q->type;
1120 req.count = 8;
1121 req.memory = V4L2_MEMORY_MMAP;
1122 err = videobuf_reqbufs(q,&req);
1123 if (err < 0)
1124 return err;
1125
1126 mbuf->frames = req.count;
1127 mbuf->size = 0;
1128 for (i = 0; i < mbuf->frames; i++) {
1129 mbuf->offsets[i] = q->bufs[i]->boff;
1130 mbuf->size += q->bufs[i]->bsize;
1131 }
1132 return 0;
1133} 1106}
1134#endif 1107#endif
1135 1108
@@ -1222,14 +1195,14 @@ int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
1222 n = i->index; 1195 n = i->index;
1223 if (n >= 4) 1196 if (n >= 4)
1224 return -EINVAL; 1197 return -EINVAL;
1225 if (0 == INPUT(n)->type) 1198 if (0 == INPUT(n).type)
1226 return -EINVAL; 1199 return -EINVAL;
1227 memset(i,0,sizeof(*i)); 1200 memset(i,0,sizeof(*i));
1228 i->index = n; 1201 i->index = n;
1229 i->type = V4L2_INPUT_TYPE_CAMERA; 1202 i->type = V4L2_INPUT_TYPE_CAMERA;
1230 strcpy(i->name,iname[INPUT(n)->type]); 1203 strcpy(i->name,iname[INPUT(n).type]);
1231 if ((CX88_VMUX_TELEVISION == INPUT(n)->type) || 1204 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1232 (CX88_VMUX_CABLE == INPUT(n)->type)) 1205 (CX88_VMUX_CABLE == INPUT(n).type))
1233 i->type = V4L2_INPUT_TYPE_TUNER; 1206 i->type = V4L2_INPUT_TYPE_TUNER;
1234 i->std = CX88_NORMS; 1207 i->std = CX88_NORMS;
1235 return 0; 1208 return 0;
@@ -1298,7 +1271,7 @@ static int vidioc_g_tuner (struct file *file, void *priv,
1298 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; 1271 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1299 u32 reg; 1272 u32 reg;
1300 1273
1301 if (unlikely(UNSET == core->tuner_type)) 1274 if (unlikely(UNSET == core->board.tuner_type))
1302 return -EINVAL; 1275 return -EINVAL;
1303 if (0 != t->index) 1276 if (0 != t->index)
1304 return -EINVAL; 1277 return -EINVAL;
@@ -1319,7 +1292,7 @@ static int vidioc_s_tuner (struct file *file, void *priv,
1319{ 1292{
1320 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; 1293 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1321 1294
1322 if (UNSET == core->tuner_type) 1295 if (UNSET == core->board.tuner_type)
1323 return -EINVAL; 1296 return -EINVAL;
1324 if (0 != t->index) 1297 if (0 != t->index)
1325 return -EINVAL; 1298 return -EINVAL;
@@ -1334,7 +1307,7 @@ static int vidioc_g_frequency (struct file *file, void *priv,
1334 struct cx8800_fh *fh = priv; 1307 struct cx8800_fh *fh = priv;
1335 struct cx88_core *core = fh->dev->core; 1308 struct cx88_core *core = fh->dev->core;
1336 1309
1337 if (unlikely(UNSET == core->tuner_type)) 1310 if (unlikely(UNSET == core->board.tuner_type))
1338 return -EINVAL; 1311 return -EINVAL;
1339 1312
1340 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ 1313 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
@@ -1349,7 +1322,7 @@ static int vidioc_g_frequency (struct file *file, void *priv,
1349int cx88_set_freq (struct cx88_core *core, 1322int cx88_set_freq (struct cx88_core *core,
1350 struct v4l2_frequency *f) 1323 struct v4l2_frequency *f)
1351{ 1324{
1352 if (unlikely(UNSET == core->tuner_type)) 1325 if (unlikely(UNSET == core->board.tuner_type))
1353 return -EINVAL; 1326 return -EINVAL;
1354 if (unlikely(f->tuner != 0)) 1327 if (unlikely(f->tuner != 0))
1355 return -EINVAL; 1328 return -EINVAL;
@@ -1420,8 +1393,7 @@ static int radio_querycap (struct file *file, void *priv,
1420 struct cx88_core *core = dev->core; 1393 struct cx88_core *core = dev->core;
1421 1394
1422 strcpy(cap->driver, "cx8800"); 1395 strcpy(cap->driver, "cx8800");
1423 strlcpy(cap->card, cx88_boards[core->board].name, 1396 strlcpy(cap->card, core->board.name, sizeof(cap->card));
1424 sizeof(cap->card));
1425 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); 1397 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1426 cap->version = CX88_VERSION_CODE; 1398 cap->version = CX88_VERSION_CODE;
1427 cap->capabilities = V4L2_CAP_TUNER; 1399 cap->capabilities = V4L2_CAP_TUNER;
@@ -1608,7 +1580,8 @@ static irqreturn_t cx8800_irq(int irq, void *dev_id)
1608 int loop, handled = 0; 1580 int loop, handled = 0;
1609 1581
1610 for (loop = 0; loop < 10; loop++) { 1582 for (loop = 0; loop < 10; loop++) {
1611 status = cx_read(MO_PCI_INTSTAT) & (core->pci_irqmask | 0x01); 1583 status = cx_read(MO_PCI_INTSTAT) &
1584 (core->pci_irqmask | PCI_INT_VIDINT);
1612 if (0 == status) 1585 if (0 == status)
1613 goto out; 1586 goto out;
1614 cx_write(MO_PCI_INTSTAT, status); 1587 cx_write(MO_PCI_INTSTAT, status);
@@ -1616,7 +1589,7 @@ static irqreturn_t cx8800_irq(int irq, void *dev_id)
1616 1589
1617 if (status & core->pci_irqmask) 1590 if (status & core->pci_irqmask)
1618 cx88_core_irq(core,status); 1591 cx88_core_irq(core,status);
1619 if (status & 0x01) 1592 if (status & PCI_INT_VIDINT)
1620 cx8800_vid_irq(dev); 1593 cx8800_vid_irq(dev);
1621 }; 1594 };
1622 if (10 == loop) { 1595 if (10 == loop) {
@@ -1717,6 +1690,10 @@ static struct video_device cx8800_radio_template =
1717 .vidioc_s_ctrl = vidioc_s_ctrl, 1690 .vidioc_s_ctrl = vidioc_s_ctrl,
1718 .vidioc_g_frequency = vidioc_g_frequency, 1691 .vidioc_g_frequency = vidioc_g_frequency,
1719 .vidioc_s_frequency = vidioc_s_frequency, 1692 .vidioc_s_frequency = vidioc_s_frequency,
1693#ifdef CONFIG_VIDEO_ADV_DEBUG
1694 .vidioc_g_register = vidioc_g_register,
1695 .vidioc_s_register = vidioc_s_register,
1696#endif
1720}; 1697};
1721 1698
1722/* ----------------------------------------------------------- */ 1699/* ----------------------------------------------------------- */
@@ -1818,26 +1795,32 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1818 err = request_irq(pci_dev->irq, cx8800_irq, 1795 err = request_irq(pci_dev->irq, cx8800_irq,
1819 IRQF_SHARED | IRQF_DISABLED, core->name, dev); 1796 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1820 if (err < 0) { 1797 if (err < 0) {
1821 printk(KERN_ERR "%s: can't get IRQ %d\n", 1798 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1822 core->name,pci_dev->irq); 1799 core->name,pci_dev->irq);
1823 goto fail_core; 1800 goto fail_core;
1824 } 1801 }
1825 cx_set(MO_PCI_INTMSK, core->pci_irqmask); 1802 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1826 1803
1827 /* load and configure helper modules */ 1804 /* load and configure helper modules */
1828 if (TUNER_ABSENT != core->tuner_type) 1805 if (TUNER_ABSENT != core->board.tuner_type)
1829 request_module("tuner"); 1806 request_module("tuner");
1830 1807
1831 if (cx88_boards[ core->board ].audio_chip == AUDIO_CHIP_WM8775) 1808 if (core->board.audio_chip == AUDIO_CHIP_WM8775)
1832 request_module("wm8775"); 1809 request_module("wm8775");
1833 1810
1811 switch (core->boardnr) {
1812 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1813 request_module("ir-kbd-i2c");
1814 request_module("rtc-isl1208");
1815 }
1816
1834 /* register v4l devices */ 1817 /* register v4l devices */
1835 dev->video_dev = cx88_vdev_init(core,dev->pci, 1818 dev->video_dev = cx88_vdev_init(core,dev->pci,
1836 &cx8800_video_template,"video"); 1819 &cx8800_video_template,"video");
1837 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, 1820 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1838 video_nr[core->nr]); 1821 video_nr[core->nr]);
1839 if (err < 0) { 1822 if (err < 0) {
1840 printk(KERN_INFO "%s: can't register video device\n", 1823 printk(KERN_ERR "%s/0: can't register video device\n",
1841 core->name); 1824 core->name);
1842 goto fail_unreg; 1825 goto fail_unreg;
1843 } 1826 }
@@ -1848,20 +1831,20 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1848 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, 1831 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1849 vbi_nr[core->nr]); 1832 vbi_nr[core->nr]);
1850 if (err < 0) { 1833 if (err < 0) {
1851 printk(KERN_INFO "%s/0: can't register vbi device\n", 1834 printk(KERN_ERR "%s/0: can't register vbi device\n",
1852 core->name); 1835 core->name);
1853 goto fail_unreg; 1836 goto fail_unreg;
1854 } 1837 }
1855 printk(KERN_INFO "%s/0: registered device vbi%d\n", 1838 printk(KERN_INFO "%s/0: registered device vbi%d\n",
1856 core->name,dev->vbi_dev->minor & 0x1f); 1839 core->name,dev->vbi_dev->minor & 0x1f);
1857 1840
1858 if (core->has_radio) { 1841 if (core->board.radio.type == CX88_RADIO) {
1859 dev->radio_dev = cx88_vdev_init(core,dev->pci, 1842 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1860 &cx8800_radio_template,"radio"); 1843 &cx8800_radio_template,"radio");
1861 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, 1844 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1862 radio_nr[core->nr]); 1845 radio_nr[core->nr]);
1863 if (err < 0) { 1846 if (err < 0) {
1864 printk(KERN_INFO "%s/0: can't register radio device\n", 1847 printk(KERN_ERR "%s/0: can't register radio device\n",
1865 core->name); 1848 core->name);
1866 goto fail_unreg; 1849 goto fail_unreg;
1867 } 1850 }
@@ -1881,12 +1864,12 @@ static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1881 mutex_unlock(&core->lock); 1864 mutex_unlock(&core->lock);
1882 1865
1883 /* start tvaudio thread */ 1866 /* start tvaudio thread */
1884 if (core->tuner_type != TUNER_ABSENT) { 1867 if (core->board.tuner_type != TUNER_ABSENT) {
1885 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); 1868 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
1886 if (IS_ERR(core->kthread)) { 1869 if (IS_ERR(core->kthread)) {
1887 err = PTR_ERR(core->kthread); 1870 err = PTR_ERR(core->kthread);
1888 printk(KERN_ERR "Failed to create cx88 audio thread, err=%d\n", 1871 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1889 err); 1872 core->name, err);
1890 } 1873 }
1891 } 1874 }
1892 return 0; 1875 return 0;
@@ -1937,17 +1920,19 @@ static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1937 /* stop video+vbi capture */ 1920 /* stop video+vbi capture */
1938 spin_lock(&dev->slock); 1921 spin_lock(&dev->slock);
1939 if (!list_empty(&dev->vidq.active)) { 1922 if (!list_empty(&dev->vidq.active)) {
1940 printk("%s: suspend video\n", core->name); 1923 printk("%s/0: suspend video\n", core->name);
1941 stop_video_dma(dev); 1924 stop_video_dma(dev);
1942 del_timer(&dev->vidq.timeout); 1925 del_timer(&dev->vidq.timeout);
1943 } 1926 }
1944 if (!list_empty(&dev->vbiq.active)) { 1927 if (!list_empty(&dev->vbiq.active)) {
1945 printk("%s: suspend vbi\n", core->name); 1928 printk("%s/0: suspend vbi\n", core->name);
1946 cx8800_stop_vbi_dma(dev); 1929 cx8800_stop_vbi_dma(dev);
1947 del_timer(&dev->vbiq.timeout); 1930 del_timer(&dev->vbiq.timeout);
1948 } 1931 }
1949 spin_unlock(&dev->slock); 1932 spin_unlock(&dev->slock);
1950 1933
1934 if (core->ir)
1935 cx88_ir_stop(core, core->ir);
1951 /* FIXME -- shutdown device */ 1936 /* FIXME -- shutdown device */
1952 cx88_shutdown(core); 1937 cx88_shutdown(core);
1953 1938
@@ -1968,8 +1953,8 @@ static int cx8800_resume(struct pci_dev *pci_dev)
1968 if (dev->state.disabled) { 1953 if (dev->state.disabled) {
1969 err=pci_enable_device(pci_dev); 1954 err=pci_enable_device(pci_dev);
1970 if (err) { 1955 if (err) {
1971 printk(KERN_ERR "%s: can't enable device\n", 1956 printk(KERN_ERR "%s/0: can't enable device\n",
1972 core->name); 1957 core->name);
1973 return err; 1958 return err;
1974 } 1959 }
1975 1960
@@ -1977,9 +1962,7 @@ static int cx8800_resume(struct pci_dev *pci_dev)
1977 } 1962 }
1978 err= pci_set_power_state(pci_dev, PCI_D0); 1963 err= pci_set_power_state(pci_dev, PCI_D0);
1979 if (err) { 1964 if (err) {
1980 printk(KERN_ERR "%s: can't enable device\n", 1965 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
1981 core->name);
1982
1983 pci_disable_device(pci_dev); 1966 pci_disable_device(pci_dev);
1984 dev->state.disabled = 1; 1967 dev->state.disabled = 1;
1985 1968
@@ -1989,15 +1972,19 @@ static int cx8800_resume(struct pci_dev *pci_dev)
1989 1972
1990 /* FIXME: re-initialize hardware */ 1973 /* FIXME: re-initialize hardware */
1991 cx88_reset(core); 1974 cx88_reset(core);
1975 if (core->ir)
1976 cx88_ir_start(core, core->ir);
1977
1978 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1992 1979
1993 /* restart video+vbi capture */ 1980 /* restart video+vbi capture */
1994 spin_lock(&dev->slock); 1981 spin_lock(&dev->slock);
1995 if (!list_empty(&dev->vidq.active)) { 1982 if (!list_empty(&dev->vidq.active)) {
1996 printk("%s: resume video\n", core->name); 1983 printk("%s/0: resume video\n", core->name);
1997 restart_video_queue(dev,&dev->vidq); 1984 restart_video_queue(dev,&dev->vidq);
1998 } 1985 }
1999 if (!list_empty(&dev->vbiq.active)) { 1986 if (!list_empty(&dev->vbiq.active)) {
2000 printk("%s: resume vbi\n", core->name); 1987 printk("%s/0: resume vbi\n", core->name);
2001 cx8800_restart_vbi_queue(dev,&dev->vbiq); 1988 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2002 } 1989 }
2003 spin_unlock(&dev->slock); 1990 spin_unlock(&dev->slock);
@@ -2033,7 +2020,7 @@ static struct pci_driver cx8800_pci_driver = {
2033 2020
2034static int cx8800_init(void) 2021static int cx8800_init(void)
2035{ 2022{
2036 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n", 2023 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
2037 (CX88_VERSION_CODE >> 16) & 0xff, 2024 (CX88_VERSION_CODE >> 16) & 0xff,
2038 (CX88_VERSION_CODE >> 8) & 0xff, 2025 (CX88_VERSION_CODE >> 8) & 0xff,
2039 CX88_VERSION_CODE & 0xff); 2026 CX88_VERSION_CODE & 0xff);
diff --git a/drivers/media/video/cx88/cx88-vp3054-i2c.c b/drivers/media/video/cx88/cx88-vp3054-i2c.c
index cd0877636a32..77c37889232b 100644
--- a/drivers/media/video/cx88/cx88-vp3054-i2c.c
+++ b/drivers/media/video/cx88/cx88-vp3054-i2c.c
@@ -23,7 +23,6 @@
23*/ 23*/
24 24
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h> 26#include <linux/init.h>
28 27
29#include <asm/io.h> 28#include <asm/io.h>
@@ -111,7 +110,7 @@ int vp3054_i2c_probe(struct cx8802_dev *dev)
111 struct vp3054_i2c_state *vp3054_i2c; 110 struct vp3054_i2c_state *vp3054_i2c;
112 int rc; 111 int rc;
113 112
114 if (core->board != CX88_BOARD_DNTV_LIVE_DVB_T_PRO) 113 if (core->boardnr != CX88_BOARD_DNTV_LIVE_DVB_T_PRO)
115 return 0; 114 return 0;
116 115
117 dev->card_priv = kzalloc(sizeof(*vp3054_i2c), GFP_KERNEL); 116 dev->card_priv = kzalloc(sizeof(*vp3054_i2c), GFP_KERNEL);
@@ -152,7 +151,7 @@ void vp3054_i2c_remove(struct cx8802_dev *dev)
152 struct vp3054_i2c_state *vp3054_i2c = dev->card_priv; 151 struct vp3054_i2c_state *vp3054_i2c = dev->card_priv;
153 152
154 if (vp3054_i2c == NULL || 153 if (vp3054_i2c == NULL ||
155 dev->core->board != CX88_BOARD_DNTV_LIVE_DVB_T_PRO) 154 dev->core->boardnr != CX88_BOARD_DNTV_LIVE_DVB_T_PRO)
156 return; 155 return;
157 156
158 i2c_del_adapter(&vp3054_i2c->adap); 157 i2c_del_adapter(&vp3054_i2c->adap);
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index 809126866a3e..42e0a9b8c550 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -28,11 +28,11 @@
28#include <media/v4l2-common.h> 28#include <media/v4l2-common.h>
29#include <media/tuner.h> 29#include <media/tuner.h>
30#include <media/tveeprom.h> 30#include <media/tveeprom.h>
31#include <media/video-buf.h> 31#include <media/videobuf-dma-sg.h>
32#include <media/cx2341x.h> 32#include <media/cx2341x.h>
33#include <media/audiochip.h> 33#include <media/audiochip.h>
34#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 34#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
35#include <media/video-buf-dvb.h> 35#include <media/videobuf-dvb.h>
36#endif 36#endif
37 37
38#include "btcx-risc.h" 38#include "btcx-risc.h"
@@ -226,8 +226,8 @@ enum cx88_itype {
226 226
227struct cx88_input { 227struct cx88_input {
228 enum cx88_itype type; 228 enum cx88_itype type;
229 unsigned int vmux;
230 u32 gpio0, gpio1, gpio2, gpio3; 229 u32 gpio0, gpio1, gpio2, gpio3;
230 unsigned int vmux:2;
231 unsigned int extadc:1; 231 unsigned int extadc:1;
232}; 232};
233 233
@@ -250,7 +250,7 @@ struct cx88_subid {
250 u32 card; 250 u32 card;
251}; 251};
252 252
253#define INPUT(nr) (&cx88_boards[core->board].input[nr]) 253#define INPUT(nr) (core->board.input[nr])
254 254
255/* ----------------------------------------------------------- */ 255/* ----------------------------------------------------------- */
256/* device / file handle status */ 256/* device / file handle status */
@@ -304,19 +304,14 @@ struct cx88_core {
304 u32 i2c_state, i2c_rc; 304 u32 i2c_state, i2c_rc;
305 305
306 /* config info -- analog */ 306 /* config info -- analog */
307 unsigned int board; 307 unsigned int boardnr;
308 unsigned int tuner_type; 308 struct cx88_board board;
309 unsigned int radio_type;
310 unsigned char tuner_addr;
311 unsigned char radio_addr;
312 unsigned int tda9887_conf;
313 unsigned int has_radio;
314 309
315 /* Supported V4L _STD_ tuner formats */ 310 /* Supported V4L _STD_ tuner formats */
316 unsigned int tuner_formats; 311 unsigned int tuner_formats;
317 312
318 /* config info -- dvb */ 313 /* config info -- dvb */
319#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 314#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
320 int (*prev_set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage); 315 int (*prev_set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage);
321#endif 316#endif
322 317
@@ -463,7 +458,7 @@ struct cx8802_dev {
463 int width; 458 int width;
464 int height; 459 int height;
465 460
466#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 461#if defined(CONFIG_VIDEO_CX88_DVB) || defined(CONFIG_VIDEO_CX88_DVB_MODULE)
467 /* for dvb only */ 462 /* for dvb only */
468 struct videobuf_dvb dvb; 463 struct videobuf_dvb dvb;
469 464
@@ -524,7 +519,7 @@ cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
524extern int 519extern int
525cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc, 520cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
526 struct scatterlist *sglist, unsigned int bpl, 521 struct scatterlist *sglist, unsigned int bpl,
527 unsigned int lines); 522 unsigned int lines, unsigned int lpi);
528extern int 523extern int
529cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, 524cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
530 u32 reg, u32 mask, u32 value); 525 u32 reg, u32 mask, u32 value);
@@ -585,15 +580,9 @@ extern void cx88_call_i2c_clients(struct cx88_core *core,
585/* ----------------------------------------------------------- */ 580/* ----------------------------------------------------------- */
586/* cx88-cards.c */ 581/* cx88-cards.c */
587 582
588extern struct cx88_board cx88_boards[]; 583extern int cx88_get_resources(const struct cx88_core *core,
589extern const unsigned int cx88_bcount; 584 struct pci_dev *pci);
590 585extern struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
591extern struct cx88_subid cx88_subids[];
592extern const unsigned int cx88_idcount;
593
594extern void cx88_card_list(struct cx88_core *core, struct pci_dev *pci);
595extern void cx88_card_setup(struct cx88_core *core);
596extern void cx88_card_setup_pre_i2c(struct cx88_core *core);
597 586
598/* ----------------------------------------------------------- */ 587/* ----------------------------------------------------------- */
599/* cx88-tvaudio.c */ 588/* cx88-tvaudio.c */
@@ -625,6 +614,8 @@ struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board
625int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci); 614int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
626int cx88_ir_fini(struct cx88_core *core); 615int cx88_ir_fini(struct cx88_core *core);
627void cx88_ir_irq(struct cx88_core *core); 616void cx88_ir_irq(struct cx88_core *core);
617void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir);
618void cx88_ir_stop(struct cx88_core *core, struct cx88_IR *ir);
628 619
629/* ----------------------------------------------------------- */ 620/* ----------------------------------------------------------- */
630/* cx88-mpeg.c */ 621/* cx88-mpeg.c */
diff --git a/drivers/media/video/dpc7146.c b/drivers/media/video/dpc7146.c
index 0fcc935828f8..255dae303708 100644
--- a/drivers/media/video/dpc7146.c
+++ b/drivers/media/video/dpc7146.c
@@ -92,7 +92,6 @@ static int dpc_probe(struct saa7146_dev* dev)
92{ 92{
93 struct dpc* dpc = NULL; 93 struct dpc* dpc = NULL;
94 struct i2c_client *client; 94 struct i2c_client *client;
95 struct list_head *item;
96 95
97 dpc = kzalloc(sizeof(struct dpc), GFP_KERNEL); 96 dpc = kzalloc(sizeof(struct dpc), GFP_KERNEL);
98 if( NULL == dpc ) { 97 if( NULL == dpc ) {
@@ -116,11 +115,9 @@ static int dpc_probe(struct saa7146_dev* dev)
116 } 115 }
117 116
118 /* loop through all i2c-devices on the bus and look who is there */ 117 /* loop through all i2c-devices on the bus and look who is there */
119 list_for_each(item,&dpc->i2c_adapter.clients) { 118 list_for_each_entry(client, &dpc->i2c_adapter.clients, list)
120 client = list_entry(item, struct i2c_client, list);
121 if( I2C_SAA7111A == client->addr ) 119 if( I2C_SAA7111A == client->addr )
122 dpc->saa7111a = client; 120 dpc->saa7111a = client;
123 }
124 121
125 /* check if all devices are present */ 122 /* check if all devices are present */
126 if( 0 == dpc->saa7111a ) { 123 if( 0 == dpc->saa7111a ) {
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c
index 255a47dfb84f..d3282ec62c5b 100644
--- a/drivers/media/video/em28xx/em28xx-core.c
+++ b/drivers/media/video/em28xx/em28xx-core.c
@@ -24,7 +24,6 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/list.h> 25#include <linux/list.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/usb.h> 27#include <linux/usb.h>
29#include <linux/vmalloc.h> 28#include <linux/vmalloc.h>
30 29
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c
index 55d45b0032cf..e3894b68c4ee 100644
--- a/drivers/media/video/em28xx/em28xx-input.c
+++ b/drivers/media/video/em28xx/em28xx-input.c
@@ -22,7 +22,6 @@
22 */ 22 */
23 23
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/delay.h> 26#include <linux/delay.h>
28#include <linux/interrupt.h> 27#include <linux/interrupt.h>
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 40307f3f6fe3..b8d5327c438d 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -252,10 +252,8 @@ static int em28xx_v4l2_open(struct inode *inode, struct file *filp)
252 int minor = iminor(inode); 252 int minor = iminor(inode);
253 int errCode = 0; 253 int errCode = 0;
254 struct em28xx *h,*dev = NULL; 254 struct em28xx *h,*dev = NULL;
255 struct list_head *list;
256 255
257 list_for_each(list,&em28xx_devlist) { 256 list_for_each_entry(h, &em28xx_devlist, devlist) {
258 h = list_entry(list, struct em28xx, devlist);
259 if (h->vdev->minor == minor) { 257 if (h->vdev->minor == minor) {
260 dev = h; 258 dev = h;
261 dev->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 259 dev->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
@@ -268,8 +266,6 @@ static int em28xx_v4l2_open(struct inode *inode, struct file *filp)
268 if (NULL == dev) 266 if (NULL == dev)
269 return -ENODEV; 267 return -ENODEV;
270 268
271 filp->private_data=dev;
272
273 em28xx_videodbg("open minor=%d type=%s users=%d\n", 269 em28xx_videodbg("open minor=%d type=%s users=%d\n",
274 minor,v4l2_type_names[dev->type],dev->users); 270 minor,v4l2_type_names[dev->type],dev->users);
275 271
diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c
index 585bd1fe0765..d5fef4c01c87 100644
--- a/drivers/media/video/et61x251/et61x251_core.c
+++ b/drivers/media/video/et61x251/et61x251_core.c
@@ -22,7 +22,6 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/param.h> 24#include <linux/param.h>
25#include <linux/moduleparam.h>
26#include <linux/errno.h> 25#include <linux/errno.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/device.h> 27#include <linux/device.h>
@@ -707,7 +706,8 @@ static u8 et61x251_strtou8(const char* buff, size_t len, ssize_t* count)
707 NOTE 2: buffers are PAGE_SIZE long 706 NOTE 2: buffers are PAGE_SIZE long
708*/ 707*/
709 708
710static ssize_t et61x251_show_reg(struct class_device* cd, char* buf) 709static ssize_t et61x251_show_reg(struct device* cd,
710 struct device_attribute *attr, char* buf)
711{ 711{
712 struct et61x251_device* cam; 712 struct et61x251_device* cam;
713 ssize_t count; 713 ssize_t count;
@@ -730,7 +730,8 @@ static ssize_t et61x251_show_reg(struct class_device* cd, char* buf)
730 730
731 731
732static ssize_t 732static ssize_t
733et61x251_store_reg(struct class_device* cd, const char* buf, size_t len) 733et61x251_store_reg(struct device* cd,
734 struct device_attribute *attr, const char* buf, size_t len)
734{ 735{
735 struct et61x251_device* cam; 736 struct et61x251_device* cam;
736 u8 index; 737 u8 index;
@@ -762,7 +763,8 @@ et61x251_store_reg(struct class_device* cd, const char* buf, size_t len)
762} 763}
763 764
764 765
765static ssize_t et61x251_show_val(struct class_device* cd, char* buf) 766static ssize_t et61x251_show_val(struct device* cd,
767 struct device_attribute *attr, char* buf)
766{ 768{
767 struct et61x251_device* cam; 769 struct et61x251_device* cam;
768 ssize_t count; 770 ssize_t count;
@@ -793,7 +795,8 @@ static ssize_t et61x251_show_val(struct class_device* cd, char* buf)
793 795
794 796
795static ssize_t 797static ssize_t
796et61x251_store_val(struct class_device* cd, const char* buf, size_t len) 798et61x251_store_val(struct device* cd, struct device_attribute *attr,
799 const char* buf, size_t len)
797{ 800{
798 struct et61x251_device* cam; 801 struct et61x251_device* cam;
799 u8 value; 802 u8 value;
@@ -831,7 +834,8 @@ et61x251_store_val(struct class_device* cd, const char* buf, size_t len)
831} 834}
832 835
833 836
834static ssize_t et61x251_show_i2c_reg(struct class_device* cd, char* buf) 837static ssize_t et61x251_show_i2c_reg(struct device* cd,
838 struct device_attribute *attr, char* buf)
835{ 839{
836 struct et61x251_device* cam; 840 struct et61x251_device* cam;
837 ssize_t count; 841 ssize_t count;
@@ -856,7 +860,8 @@ static ssize_t et61x251_show_i2c_reg(struct class_device* cd, char* buf)
856 860
857 861
858static ssize_t 862static ssize_t
859et61x251_store_i2c_reg(struct class_device* cd, const char* buf, size_t len) 863et61x251_store_i2c_reg(struct device* cd, struct device_attribute *attr,
864 const char* buf, size_t len)
860{ 865{
861 struct et61x251_device* cam; 866 struct et61x251_device* cam;
862 u8 index; 867 u8 index;
@@ -888,7 +893,8 @@ et61x251_store_i2c_reg(struct class_device* cd, const char* buf, size_t len)
888} 893}
889 894
890 895
891static ssize_t et61x251_show_i2c_val(struct class_device* cd, char* buf) 896static ssize_t et61x251_show_i2c_val(struct device* cd,
897 struct device_attribute *attr, char* buf)
892{ 898{
893 struct et61x251_device* cam; 899 struct et61x251_device* cam;
894 ssize_t count; 900 ssize_t count;
@@ -924,7 +930,8 @@ static ssize_t et61x251_show_i2c_val(struct class_device* cd, char* buf)
924 930
925 931
926static ssize_t 932static ssize_t
927et61x251_store_i2c_val(struct class_device* cd, const char* buf, size_t len) 933et61x251_store_i2c_val(struct device* cd, struct device_attribute *attr,
934 const char* buf, size_t len)
928{ 935{
929 struct et61x251_device* cam; 936 struct et61x251_device* cam;
930 u8 value; 937 u8 value;
@@ -967,42 +974,40 @@ et61x251_store_i2c_val(struct class_device* cd, const char* buf, size_t len)
967} 974}
968 975
969 976
970static CLASS_DEVICE_ATTR(reg, S_IRUGO | S_IWUSR, 977static DEVICE_ATTR(reg, S_IRUGO | S_IWUSR,
971 et61x251_show_reg, et61x251_store_reg); 978 et61x251_show_reg, et61x251_store_reg);
972static CLASS_DEVICE_ATTR(val, S_IRUGO | S_IWUSR, 979static DEVICE_ATTR(val, S_IRUGO | S_IWUSR,
973 et61x251_show_val, et61x251_store_val); 980 et61x251_show_val, et61x251_store_val);
974static CLASS_DEVICE_ATTR(i2c_reg, S_IRUGO | S_IWUSR, 981static DEVICE_ATTR(i2c_reg, S_IRUGO | S_IWUSR,
975 et61x251_show_i2c_reg, et61x251_store_i2c_reg); 982 et61x251_show_i2c_reg, et61x251_store_i2c_reg);
976static CLASS_DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR, 983static DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR,
977 et61x251_show_i2c_val, et61x251_store_i2c_val); 984 et61x251_show_i2c_val, et61x251_store_i2c_val);
978 985
979 986
980static int et61x251_create_sysfs(struct et61x251_device* cam) 987static int et61x251_create_sysfs(struct et61x251_device* cam)
981{ 988{
982 struct class_device *classdev = &(cam->v4ldev->class_dev); 989 struct device *classdev = &(cam->v4ldev->class_dev);
983 int err = 0; 990 int err = 0;
984 991
985 if ((err = class_device_create_file(classdev, &class_device_attr_reg))) 992 if ((err = device_create_file(classdev, &dev_attr_reg)))
986 goto err_out; 993 goto err_out;
987 if ((err = class_device_create_file(classdev, &class_device_attr_val))) 994 if ((err = device_create_file(classdev, &dev_attr_val)))
988 goto err_reg; 995 goto err_reg;
989 996
990 if (cam->sensor.sysfs_ops) { 997 if (cam->sensor.sysfs_ops) {
991 if ((err = class_device_create_file(classdev, 998 if ((err = device_create_file(classdev, &dev_attr_i2c_reg)))
992 &class_device_attr_i2c_reg)))
993 goto err_val; 999 goto err_val;
994 if ((err = class_device_create_file(classdev, 1000 if ((err = device_create_file(classdev, &dev_attr_i2c_val)))
995 &class_device_attr_i2c_val)))
996 goto err_i2c_reg; 1001 goto err_i2c_reg;
997 } 1002 }
998 1003
999err_i2c_reg: 1004err_i2c_reg:
1000 if (cam->sensor.sysfs_ops) 1005 if (cam->sensor.sysfs_ops)
1001 class_device_remove_file(classdev, &class_device_attr_i2c_reg); 1006 device_remove_file(classdev, &dev_attr_i2c_reg);
1002err_val: 1007err_val:
1003 class_device_remove_file(classdev, &class_device_attr_val); 1008 device_remove_file(classdev, &dev_attr_val);
1004err_reg: 1009err_reg:
1005 class_device_remove_file(classdev, &class_device_attr_reg); 1010 device_remove_file(classdev, &dev_attr_reg);
1006err_out: 1011err_out:
1007 return err; 1012 return err;
1008} 1013}
diff --git a/drivers/media/video/ir-kbd-i2c.c b/drivers/media/video/ir-kbd-i2c.c
index 2d709e064679..d98dd0d1e373 100644
--- a/drivers/media/video/ir-kbd-i2c.c
+++ b/drivers/media/video/ir-kbd-i2c.c
@@ -10,6 +10,8 @@
10 * Ulrich Mueller <ulrich.mueller42@web.de> 10 * Ulrich Mueller <ulrich.mueller42@web.de>
11 * modified for em2820 based USB TV tuners by 11 * modified for em2820 based USB TV tuners by
12 * Markus Rechberger <mrechberger@gmail.com> 12 * Markus Rechberger <mrechberger@gmail.com>
13 * modified for DViCO Fusion HDTV 5 RT GOLD by
14 * Chaogui Zhang <czhang1974@gmail.com>
13 * 15 *
14 * This program is free software; you can redistribute it and/or modify 16 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by 17 * it under the terms of the GNU General Public License as published by
@@ -28,7 +30,6 @@
28 */ 30 */
29 31
30#include <linux/module.h> 32#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/init.h> 33#include <linux/init.h>
33#include <linux/kernel.h> 34#include <linux/kernel.h>
34#include <linux/string.h> 35#include <linux/string.h>
@@ -142,6 +143,30 @@ static int get_key_pv951(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
142 return 1; 143 return 1;
143} 144}
144 145
146static int get_key_fusionhdtv(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
147{
148 unsigned char buf[4];
149
150 /* poll IR chip */
151 if (4 != i2c_master_recv(&ir->c,buf,4)) {
152 dprintk(1,"read error\n");
153 return -EIO;
154 }
155
156 if(buf[0] !=0 || buf[1] !=0 || buf[2] !=0 || buf[3] != 0)
157 dprintk(2, "%s: 0x%2x 0x%2x 0x%2x 0x%2x\n", __FUNCTION__,
158 buf[0], buf[1], buf[2], buf[3]);
159
160 /* no key pressed or signal from other ir remote */
161 if(buf[0] != 0x1 || buf[1] != 0xfe)
162 return 0;
163
164 *ir_key = buf[2];
165 *ir_raw = (buf[2] << 8) | buf[3];
166
167 return 1;
168}
169
145static int get_key_knc1(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) 170static int get_key_knc1(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)
146{ 171{
147 unsigned char b; 172 unsigned char b;
@@ -364,6 +389,12 @@ static int ir_attach(struct i2c_adapter *adap, int addr,
364 ir_type = IR_TYPE_OTHER; 389 ir_type = IR_TYPE_OTHER;
365 ir_codes = ir_codes_empty; 390 ir_codes = ir_codes_empty;
366 break; 391 break;
392 case 0x6b:
393 name = "FusionHDTV";
394 ir->get_key = get_key_fusionhdtv;
395 ir_type = IR_TYPE_RC5;
396 ir_codes = ir_codes_fusionhdtv_mce;
397 break;
367 case 0x7a: 398 case 0x7a:
368 case 0x47: 399 case 0x47:
369 case 0x71: 400 case 0x71:
@@ -475,7 +506,8 @@ static int ir_probe(struct i2c_adapter *adap)
475 static const int probe_bttv[] = { 0x1a, 0x18, 0x4b, 0x64, 0x30, -1}; 506 static const int probe_bttv[] = { 0x1a, 0x18, 0x4b, 0x64, 0x30, -1};
476 static const int probe_saa7134[] = { 0x7a, 0x47, 0x71, -1 }; 507 static const int probe_saa7134[] = { 0x7a, 0x47, 0x71, -1 };
477 static const int probe_em28XX[] = { 0x30, 0x47, -1 }; 508 static const int probe_em28XX[] = { 0x30, 0x47, -1 };
478 static const int probe_cx88[] = { 0x18, 0x71, -1 }; 509 static const int probe_cx88[] = { 0x18, 0x6b, 0x71, -1 };
510 static const int probe_cx23885[] = { 0x6b, -1 };
479 const int *probe = NULL; 511 const int *probe = NULL;
480 struct i2c_client c; 512 struct i2c_client c;
481 unsigned char buf; 513 unsigned char buf;
@@ -496,6 +528,8 @@ static int ir_probe(struct i2c_adapter *adap)
496 break; 528 break;
497 case I2C_HW_B_CX2388x: 529 case I2C_HW_B_CX2388x:
498 probe = probe_cx88; 530 probe = probe_cx88;
531 case I2C_HW_B_CX23885:
532 probe = probe_cx23885;
499 break; 533 break;
500 } 534 }
501 if (NULL == probe) 535 if (NULL == probe)
diff --git a/drivers/media/video/ivtv/Kconfig b/drivers/media/video/ivtv/Kconfig
index e43beb2c9cbf..854cc9c30ca9 100644
--- a/drivers/media/video/ivtv/Kconfig
+++ b/drivers/media/video/ivtv/Kconfig
@@ -14,6 +14,7 @@ config VIDEO_IVTV
14 select VIDEO_CS53L32A 14 select VIDEO_CS53L32A
15 select VIDEO_WM8775 15 select VIDEO_WM8775
16 select VIDEO_WM8739 16 select VIDEO_WM8739
17 select VIDEO_VP27SMPX
17 select VIDEO_UPD64031A 18 select VIDEO_UPD64031A
18 select VIDEO_UPD64083 19 select VIDEO_UPD64083
19 ---help--- 20 ---help---
@@ -25,3 +26,19 @@ config VIDEO_IVTV
25 26
26 To compile this driver as a module, choose M here: the 27 To compile this driver as a module, choose M here: the
27 module will be called ivtv. 28 module will be called ivtv.
29
30config VIDEO_FB_IVTV
31 tristate "Conexant cx23415 framebuffer support"
32 depends on VIDEO_IVTV && FB && EXPERIMENTAL
33 select FB_CFB_FILLRECT
34 select FB_CFB_COPYAREA
35 select FB_CFB_IMAGEBLIT
36 ---help---
37 This is a framebuffer driver for the Conexant cx23415 MPEG
38 encoder/decoder.
39
40 This is used in the Hauppauge PVR-350 card. There is a driver
41 homepage at <http://www.ivtvdriver.org>.
42
43 To compile this driver as a module, choose M here: the
44 module will be called ivtvfb.
diff --git a/drivers/media/video/ivtv/Makefile b/drivers/media/video/ivtv/Makefile
index 7e95148fbf4f..e8eefd96d897 100644
--- a/drivers/media/video/ivtv/Makefile
+++ b/drivers/media/video/ivtv/Makefile
@@ -1,7 +1,8 @@
1ivtv-objs := ivtv-audio.o ivtv-cards.o ivtv-controls.o \ 1ivtv-objs := ivtv-routing.o ivtv-cards.o ivtv-controls.o \
2 ivtv-driver.o ivtv-fileops.o ivtv-firmware.o \ 2 ivtv-driver.o ivtv-fileops.o ivtv-firmware.o \
3 ivtv-gpio.o ivtv-i2c.o ivtv-ioctl.o ivtv-irq.o \ 3 ivtv-gpio.o ivtv-i2c.o ivtv-ioctl.o ivtv-irq.o \
4 ivtv-mailbox.o ivtv-queue.o ivtv-streams.o ivtv-udma.o \ 4 ivtv-mailbox.o ivtv-queue.o ivtv-streams.o ivtv-udma.o \
5 ivtv-vbi.o ivtv-video.o ivtv-yuv.o 5 ivtv-vbi.o ivtv-yuv.o
6 6
7obj-$(CONFIG_VIDEO_IVTV) += ivtv.o 7obj-$(CONFIG_VIDEO_IVTV) += ivtv.o
8obj-$(CONFIG_VIDEO_FB_IVTV) += ivtvfb.o
diff --git a/drivers/media/video/ivtv/ivtv-audio.c b/drivers/media/video/ivtv/ivtv-audio.c
deleted file mode 100644
index d702b8b539a1..000000000000
--- a/drivers/media/video/ivtv/ivtv-audio.c
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 Audio-related ivtv functions.
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include "ivtv-driver.h"
22#include "ivtv-mailbox.h"
23#include "ivtv-i2c.h"
24#include "ivtv-gpio.h"
25#include "ivtv-cards.h"
26#include "ivtv-audio.h"
27#include <media/msp3400.h>
28#include <linux/videodev.h>
29
30/* Selects the audio input and output according to the current
31 settings. */
32int ivtv_audio_set_io(struct ivtv *itv)
33{
34 struct v4l2_routing route;
35 u32 audio_input;
36 int mux_input;
37
38 /* Determine which input to use */
39 if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags)) {
40 audio_input = itv->card->radio_input.audio_input;
41 mux_input = itv->card->radio_input.muxer_input;
42 } else {
43 audio_input = itv->card->audio_inputs[itv->audio_input].audio_input;
44 mux_input = itv->card->audio_inputs[itv->audio_input].muxer_input;
45 }
46
47 /* handle muxer chips */
48 route.input = mux_input;
49 route.output = 0;
50 ivtv_i2c_hw(itv, itv->card->hw_muxer, VIDIOC_INT_S_AUDIO_ROUTING, &route);
51
52 route.input = audio_input;
53 if (itv->card->hw_audio & IVTV_HW_MSP34XX) {
54 route.output = MSP_OUTPUT(MSP_SC_IN_DSP_SCART1);
55 }
56 return ivtv_i2c_hw(itv, itv->card->hw_audio, VIDIOC_INT_S_AUDIO_ROUTING, &route);
57}
58
59void ivtv_audio_set_route(struct ivtv *itv, struct v4l2_routing *route)
60{
61 ivtv_i2c_hw(itv, itv->card->hw_audio, VIDIOC_INT_S_AUDIO_ROUTING, route);
62}
63
64void ivtv_audio_set_audio_clock_freq(struct ivtv *itv, u8 freq)
65{
66 static u32 freqs[3] = { 44100, 48000, 32000 };
67
68 /* The audio clock of the digitizer must match the codec sample
69 rate otherwise you get some very strange effects. */
70 if (freq > 2)
71 return;
72 ivtv_call_i2c_clients(itv, VIDIOC_INT_AUDIO_CLOCK_FREQ, &freqs[freq]);
73}
74
diff --git a/drivers/media/video/ivtv/ivtv-audio.h b/drivers/media/video/ivtv/ivtv-audio.h
deleted file mode 100644
index 9c42846d8124..000000000000
--- a/drivers/media/video/ivtv/ivtv-audio.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 Audio-related ivtv functions.
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21int ivtv_audio_set_io(struct ivtv *itv);
22void ivtv_audio_set_route(struct ivtv *itv, struct v4l2_routing *route);
23void ivtv_audio_set_audio_clock_freq(struct ivtv *itv, u8 freq);
diff --git a/drivers/media/video/ivtv/ivtv-cards.c b/drivers/media/video/ivtv/ivtv-cards.c
index 8eab02083887..b6a8be622d3c 100644
--- a/drivers/media/video/ivtv/ivtv-cards.c
+++ b/drivers/media/video/ivtv/ivtv-cards.c
@@ -616,7 +616,7 @@ static const struct ivtv_card ivtv_card_gv_mvprx = {
616 .hw_video = IVTV_HW_SAA7115 | IVTV_HW_UPD64031A | IVTV_HW_UPD6408X, 616 .hw_video = IVTV_HW_SAA7115 | IVTV_HW_UPD64031A | IVTV_HW_UPD6408X,
617 .hw_audio = IVTV_HW_GPIO, 617 .hw_audio = IVTV_HW_GPIO,
618 .hw_audio_ctrl = IVTV_HW_WM8739, 618 .hw_audio_ctrl = IVTV_HW_WM8739,
619 .hw_all = IVTV_HW_GPIO | IVTV_HW_SAA7115 | IVTV_HW_TVAUDIO | 619 .hw_all = IVTV_HW_GPIO | IVTV_HW_SAA7115 | IVTV_HW_VP27SMPX |
620 IVTV_HW_TUNER | IVTV_HW_WM8739 | 620 IVTV_HW_TUNER | IVTV_HW_WM8739 |
621 IVTV_HW_UPD64031A | IVTV_HW_UPD6408X, 621 IVTV_HW_UPD64031A | IVTV_HW_UPD6408X,
622 .video_inputs = { 622 .video_inputs = {
@@ -654,7 +654,7 @@ static const struct ivtv_card ivtv_card_gv_mvprx2e = {
654 .hw_audio = IVTV_HW_GPIO, 654 .hw_audio = IVTV_HW_GPIO,
655 .hw_audio_ctrl = IVTV_HW_WM8739, 655 .hw_audio_ctrl = IVTV_HW_WM8739,
656 .hw_all = IVTV_HW_GPIO | IVTV_HW_SAA7115 | IVTV_HW_TUNER | 656 .hw_all = IVTV_HW_GPIO | IVTV_HW_SAA7115 | IVTV_HW_TUNER |
657 IVTV_HW_TVAUDIO | IVTV_HW_WM8739, 657 IVTV_HW_VP27SMPX | IVTV_HW_WM8739,
658 .video_inputs = { 658 .video_inputs = {
659 { IVTV_CARD_INPUT_VID_TUNER, 0, IVTV_SAA71XX_COMPOSITE4 }, 659 { IVTV_CARD_INPUT_VID_TUNER, 0, IVTV_SAA71XX_COMPOSITE4 },
660 { IVTV_CARD_INPUT_SVIDEO1, 1, IVTV_SAA71XX_SVIDEO0 }, 660 { IVTV_CARD_INPUT_SVIDEO1, 1, IVTV_SAA71XX_SVIDEO0 },
@@ -823,9 +823,7 @@ static const struct ivtv_card ivtv_card_dctmvtvp1 = {
823 823
824/* ------------------------------------------------------------------------- */ 824/* ------------------------------------------------------------------------- */
825 825
826#ifdef HAVE_XC3028 826/* Yuan PG600-2/GotView PCI DVD Lite cards */
827
828/* Yuan PG600-2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 cards */
829 827
830static const struct ivtv_card_pci_info ivtv_pci_pg600v2[] = { 828static const struct ivtv_card_pci_info ivtv_pci_pg600v2[] = {
831 { PCI_DEVICE_ID_IVTV16, IVTV_PCI_ID_YUAN3, 0x0600 }, 829 { PCI_DEVICE_ID_IVTV16, IVTV_PCI_ID_YUAN3, 0x0600 },
@@ -835,29 +833,87 @@ static const struct ivtv_card_pci_info ivtv_pci_pg600v2[] = {
835 833
836static const struct ivtv_card ivtv_card_pg600v2 = { 834static const struct ivtv_card ivtv_card_pg600v2 = {
837 .type = IVTV_CARD_PG600V2, 835 .type = IVTV_CARD_PG600V2,
838 .name = "Yuan PG600-2, GotView PCI DVD Lite, Club3D ZAP-TV1x01", 836 .name = "Yuan PG600-2, GotView PCI DVD Lite",
839 .v4l2_capabilities = IVTV_CAP_ENCODER, 837 .v4l2_capabilities = IVTV_CAP_ENCODER,
840 .hw_video = IVTV_HW_CX25840, 838 .hw_video = IVTV_HW_CX25840,
841 .hw_audio = IVTV_HW_CX25840, 839 .hw_audio = IVTV_HW_CX25840,
842 .hw_audio_ctrl = IVTV_HW_CX25840, 840 .hw_audio_ctrl = IVTV_HW_CX25840,
843 .hw_all = IVTV_HW_CX25840 | IVTV_HW_TUNER, 841 .hw_all = IVTV_HW_CX25840 | IVTV_HW_TUNER,
844 .video_inputs = { 842 .video_inputs = {
845 { IVTV_CARD_INPUT_VID_TUNER, 0, CX25840_COMPOSITE2 }, 843 { IVTV_CARD_INPUT_SVIDEO1, 0,
846 { IVTV_CARD_INPUT_SVIDEO1, 1,
847 CX25840_SVIDEO_LUMA3 | CX25840_SVIDEO_CHROMA4 }, 844 CX25840_SVIDEO_LUMA3 | CX25840_SVIDEO_CHROMA4 },
845 { IVTV_CARD_INPUT_COMPOSITE1, 0, CX25840_COMPOSITE1 },
848 }, 846 },
849 .audio_inputs = { 847 .audio_inputs = {
850 { IVTV_CARD_INPUT_AUD_TUNER, CX25840_AUDIO5 },
851 { IVTV_CARD_INPUT_LINE_IN1, CX25840_AUDIO_SERIAL }, 848 { IVTV_CARD_INPUT_LINE_IN1, CX25840_AUDIO_SERIAL },
852 }, 849 },
853 .radio_input = { IVTV_CARD_INPUT_AUD_TUNER, CX25840_AUDIO5 },
854 .tuners = { 850 .tuners = {
855 { .std = V4L2_STD_ALL, .tuner = TUNER_XCEIVE_XC3028 }, 851 { .std = V4L2_STD_ALL, .tuner = TUNER_XCEIVE_XC3028 },
856 }, 852 },
857 .gpio_init = { .direction = 0x1000, .initial_value = 0x1000 }, /* tuner reset */
858 .pci_list = ivtv_pci_pg600v2, 853 .pci_list = ivtv_pci_pg600v2,
859}; 854};
860#endif 855
856/* ------------------------------------------------------------------------- */
857
858/* Club3D ZAP-TV1x01 cards */
859
860static const struct ivtv_card_pci_info ivtv_pci_club3d[] = {
861 { PCI_DEVICE_ID_IVTV16, IVTV_PCI_ID_YUAN3, 0x0600 },
862 { 0, 0, 0 }
863};
864
865static const struct ivtv_card ivtv_card_club3d = {
866 .type = IVTV_CARD_CLUB3D,
867 .name = "Club3D ZAP-TV1x01",
868 .v4l2_capabilities = IVTV_CAP_ENCODER,
869 .hw_video = IVTV_HW_CX25840,
870 .hw_audio = IVTV_HW_CX25840,
871 .hw_audio_ctrl = IVTV_HW_CX25840,
872 .hw_all = IVTV_HW_CX25840 | IVTV_HW_TUNER,
873 .video_inputs = {
874 { IVTV_CARD_INPUT_SVIDEO1, 0,
875 CX25840_SVIDEO_LUMA3 | CX25840_SVIDEO_CHROMA4 },
876 { IVTV_CARD_INPUT_COMPOSITE1, 0, CX25840_COMPOSITE3 },
877 },
878 .audio_inputs = {
879 { IVTV_CARD_INPUT_LINE_IN1, CX25840_AUDIO_SERIAL },
880 },
881 .tuners = {
882 { .std = V4L2_STD_ALL, .tuner = TUNER_XCEIVE_XC3028 },
883 },
884 .pci_list = ivtv_pci_club3d,
885};
886
887/* ------------------------------------------------------------------------- */
888
889/* AVerTV MCE 116 Plus (M116) card */
890
891static const struct ivtv_card_pci_info ivtv_pci_avertv_mce116[] = {
892 { PCI_DEVICE_ID_IVTV16, IVTV_PCI_ID_AVERMEDIA, 0xc439 },
893 { 0, 0, 0 }
894};
895
896static const struct ivtv_card ivtv_card_avertv_mce116 = {
897 .type = IVTV_CARD_AVERTV_MCE116,
898 .name = "AVerTV MCE 116 Plus",
899 .v4l2_capabilities = IVTV_CAP_ENCODER,
900 .hw_video = IVTV_HW_CX25840,
901 .hw_audio = IVTV_HW_CX25840,
902 .hw_audio_ctrl = IVTV_HW_CX25840,
903 .hw_all = IVTV_HW_CX25840 | IVTV_HW_TUNER | IVTV_HW_WM8739,
904 .video_inputs = {
905 { IVTV_CARD_INPUT_SVIDEO1, 0, CX25840_SVIDEO3 },
906 { IVTV_CARD_INPUT_COMPOSITE1, 0, CX25840_COMPOSITE1 },
907 },
908 .audio_inputs = {
909 { IVTV_CARD_INPUT_LINE_IN1, CX25840_AUDIO_SERIAL, 1 },
910 },
911 .gpio_init = { .direction = 0xe000, .initial_value = 0x4000 }, /* enable line-in */
912 .tuners = {
913 { .std = V4L2_STD_ALL, .tuner = TUNER_XCEIVE_XC3028 },
914 },
915 .pci_list = ivtv_pci_avertv_mce116,
916};
861 917
862static const struct ivtv_card *ivtv_card_list[] = { 918static const struct ivtv_card *ivtv_card_list[] = {
863 &ivtv_card_pvr250, 919 &ivtv_card_pvr250,
@@ -878,9 +934,9 @@ static const struct ivtv_card *ivtv_card_list[] = {
878 &ivtv_card_gotview_pci_dvd2, 934 &ivtv_card_gotview_pci_dvd2,
879 &ivtv_card_yuan_mpc622, 935 &ivtv_card_yuan_mpc622,
880 &ivtv_card_dctmvtvp1, 936 &ivtv_card_dctmvtvp1,
881#ifdef HAVE_XC3028
882 &ivtv_card_pg600v2, 937 &ivtv_card_pg600v2,
883#endif 938 &ivtv_card_club3d,
939 &ivtv_card_avertv_mce116,
884 940
885 /* Variations of standard cards but with the same PCI IDs. 941 /* Variations of standard cards but with the same PCI IDs.
886 These cards must come last in this list. */ 942 These cards must come last in this list. */
diff --git a/drivers/media/video/ivtv/ivtv-cards.h b/drivers/media/video/ivtv/ivtv-cards.h
index 91e9e90c14a5..ff46e5ae8653 100644
--- a/drivers/media/video/ivtv/ivtv-cards.h
+++ b/drivers/media/video/ivtv/ivtv-cards.h
@@ -18,6 +18,68 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_CARDS_H
22#define IVTV_CARDS_H
23
24/* Supported cards */
25#define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
26#define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
27#define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
28 PVR150s on one PCI board) */
29#define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
30#define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
31#define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
32 cx23415 based, but does not have tv-out */
33#define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
34#define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
35#define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
36#define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
37#define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
38#define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
39#define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
40#define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
41#define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
42#define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
43#define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
44#define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
45#define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite */
46#define IVTV_CARD_CLUB3D 19 /* Club3D ZAP-TV1x01 */
47#define IVTV_CARD_AVERTV_MCE116 20 /* AVerTV MCE 116 Plus */
48#define IVTV_CARD_LAST 20
49
50/* Variants of existing cards but with the same PCI IDs. The driver
51 detects these based on other device information.
52 These cards must always come last.
53 New cards must be inserted above, and the indices of the cards below
54 must be adjusted accordingly. */
55
56/* PVR-350 V1 (uses saa7114) */
57#define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
58/* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
59#define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
60#define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
61
62/* system vendor and device IDs */
63#define PCI_VENDOR_ID_ICOMP 0x4444
64#define PCI_DEVICE_ID_IVTV15 0x0803
65#define PCI_DEVICE_ID_IVTV16 0x0016
66
67/* subsystem vendor ID */
68#define IVTV_PCI_ID_HAUPPAUGE 0x0070
69#define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
70#define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
71#define IVTV_PCI_ID_ADAPTEC 0x9005
72#define IVTV_PCI_ID_AVERMEDIA 0x1461
73#define IVTV_PCI_ID_YUAN1 0x12ab
74#define IVTV_PCI_ID_YUAN2 0xff01
75#define IVTV_PCI_ID_YUAN3 0xffab
76#define IVTV_PCI_ID_YUAN4 0xfbab
77#define IVTV_PCI_ID_DIAMONDMM 0xff92
78#define IVTV_PCI_ID_IODATA 0x10fc
79#define IVTV_PCI_ID_MELCO 0x1154
80#define IVTV_PCI_ID_GOTVIEW1 0xffac
81#define IVTV_PCI_ID_GOTVIEW2 0xffad
82
21/* hardware flags */ 83/* hardware flags */
22#define IVTV_HW_CX25840 (1 << 0) 84#define IVTV_HW_CX25840 (1 << 0)
23#define IVTV_HW_SAA7115 (1 << 1) 85#define IVTV_HW_SAA7115 (1 << 1)
@@ -33,7 +95,8 @@
33#define IVTV_HW_UPD6408X (1 << 11) 95#define IVTV_HW_UPD6408X (1 << 11)
34#define IVTV_HW_SAA717X (1 << 12) 96#define IVTV_HW_SAA717X (1 << 12)
35#define IVTV_HW_WM8739 (1 << 13) 97#define IVTV_HW_WM8739 (1 << 13)
36#define IVTV_HW_GPIO (1 << 14) 98#define IVTV_HW_VP27SMPX (1 << 14)
99#define IVTV_HW_GPIO (1 << 15)
37 100
38#define IVTV_HW_SAA711X (IVTV_HW_SAA7115 | IVTV_HW_SAA7114) 101#define IVTV_HW_SAA711X (IVTV_HW_SAA7115 | IVTV_HW_SAA7114)
39 102
@@ -205,3 +268,5 @@ int ivtv_get_output(struct ivtv *itv, u16 index, struct v4l2_output *output);
205int ivtv_get_audio_input(struct ivtv *itv, u16 index, struct v4l2_audio *input); 268int ivtv_get_audio_input(struct ivtv *itv, u16 index, struct v4l2_audio *input);
206int ivtv_get_audio_output(struct ivtv *itv, u16 index, struct v4l2_audioout *output); 269int ivtv_get_audio_output(struct ivtv *itv, u16 index, struct v4l2_audioout *output);
207const struct ivtv_card *ivtv_get_card(u16 index); 270const struct ivtv_card *ivtv_get_card(u16 index);
271
272#endif
diff --git a/drivers/media/video/ivtv/ivtv-controls.c b/drivers/media/video/ivtv/ivtv-controls.c
index 7a876c3e5b19..8c02fa661591 100644
--- a/drivers/media/video/ivtv/ivtv-controls.c
+++ b/drivers/media/video/ivtv/ivtv-controls.c
@@ -21,7 +21,7 @@
21#include "ivtv-driver.h" 21#include "ivtv-driver.h"
22#include "ivtv-cards.h" 22#include "ivtv-cards.h"
23#include "ivtv-ioctl.h" 23#include "ivtv-ioctl.h"
24#include "ivtv-audio.h" 24#include "ivtv-routing.h"
25#include "ivtv-i2c.h" 25#include "ivtv-i2c.h"
26#include "ivtv-mailbox.h" 26#include "ivtv-mailbox.h"
27#include "ivtv-controls.h" 27#include "ivtv-controls.h"
@@ -231,8 +231,10 @@ int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg)
231 } 231 }
232 IVTV_DEBUG_IOCTL("VIDIOC_S_EXT_CTRLS\n"); 232 IVTV_DEBUG_IOCTL("VIDIOC_S_EXT_CTRLS\n");
233 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG) { 233 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG) {
234 static u32 freqs[3] = { 44100, 48000, 32000 };
234 struct cx2341x_mpeg_params p = itv->params; 235 struct cx2341x_mpeg_params p = itv->params;
235 int err = cx2341x_ext_ctrls(&p, arg, cmd); 236 int err = cx2341x_ext_ctrls(&p, atomic_read(&itv->capturing), arg, cmd);
237 unsigned idx;
236 238
237 if (err) 239 if (err)
238 return err; 240 return err;
@@ -254,7 +256,11 @@ int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg)
254 } 256 }
255 itv->params = p; 257 itv->params = p;
256 itv->dualwatch_stereo_mode = p.audio_properties & 0x0300; 258 itv->dualwatch_stereo_mode = p.audio_properties & 0x0300;
257 ivtv_audio_set_audio_clock_freq(itv, p.audio_properties & 0x03); 259 idx = p.audio_properties & 0x03;
260 /* The audio clock of the digitizer must match the codec sample
261 rate otherwise you get some very strange effects. */
262 if (idx < sizeof(freqs))
263 ivtv_call_i2c_clients(itv, VIDIOC_INT_AUDIO_CLOCK_FREQ, &freqs[idx]);
258 return err; 264 return err;
259 } 265 }
260 return -EINVAL; 266 return -EINVAL;
@@ -282,7 +288,7 @@ int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg)
282 } 288 }
283 IVTV_DEBUG_IOCTL("VIDIOC_G_EXT_CTRLS\n"); 289 IVTV_DEBUG_IOCTL("VIDIOC_G_EXT_CTRLS\n");
284 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG) 290 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG)
285 return cx2341x_ext_ctrls(&itv->params, arg, cmd); 291 return cx2341x_ext_ctrls(&itv->params, 0, arg, cmd);
286 return -EINVAL; 292 return -EINVAL;
287 } 293 }
288 294
@@ -292,7 +298,7 @@ int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg)
292 298
293 IVTV_DEBUG_IOCTL("VIDIOC_TRY_EXT_CTRLS\n"); 299 IVTV_DEBUG_IOCTL("VIDIOC_TRY_EXT_CTRLS\n");
294 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG) 300 if (c->ctrl_class == V4L2_CTRL_CLASS_MPEG)
295 return cx2341x_ext_ctrls(&itv->params, arg, cmd); 301 return cx2341x_ext_ctrls(&itv->params, atomic_read(&itv->capturing), arg, cmd);
296 return -EINVAL; 302 return -EINVAL;
297 } 303 }
298 304
diff --git a/drivers/media/video/ivtv/ivtv-controls.h b/drivers/media/video/ivtv/ivtv-controls.h
index 5a11149725ad..bb8a6a5ed2bc 100644
--- a/drivers/media/video/ivtv/ivtv-controls.h
+++ b/drivers/media/video/ivtv/ivtv-controls.h
@@ -18,4 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_CONTROLS_H
22#define IVTV_CONTROLS_H
23
21int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg); 24int ivtv_control_ioctls(struct ivtv *itv, unsigned int cmd, void *arg);
25
26#endif
diff --git a/drivers/media/video/ivtv/ivtv-driver.c b/drivers/media/video/ivtv/ivtv-driver.c
index d73d433a4ff6..511a66252413 100644
--- a/drivers/media/video/ivtv/ivtv-driver.c
+++ b/drivers/media/video/ivtv/ivtv-driver.c
@@ -52,11 +52,12 @@
52#include "ivtv-ioctl.h" 52#include "ivtv-ioctl.h"
53#include "ivtv-cards.h" 53#include "ivtv-cards.h"
54#include "ivtv-vbi.h" 54#include "ivtv-vbi.h"
55#include "ivtv-audio.h" 55#include "ivtv-routing.h"
56#include "ivtv-gpio.h" 56#include "ivtv-gpio.h"
57#include "ivtv-yuv.h" 57#include "ivtv-yuv.h"
58 58
59#include <media/tveeprom.h> 59#include <media/tveeprom.h>
60#include <media/saa7115.h>
60#include <media/v4l2-chip-ident.h> 61#include <media/v4l2-chip-ident.h>
61 62
62/* var to keep track of the number of array elements in use */ 63/* var to keep track of the number of array elements in use */
@@ -86,17 +87,16 @@ static struct pci_device_id ivtv_pci_tbl[] __devinitdata = {
86 87
87MODULE_DEVICE_TABLE(pci,ivtv_pci_tbl); 88MODULE_DEVICE_TABLE(pci,ivtv_pci_tbl);
88 89
89const u32 yuv_offset[4] = {
90 IVTV_YUV_BUFFER_OFFSET,
91 IVTV_YUV_BUFFER_OFFSET_1,
92 IVTV_YUV_BUFFER_OFFSET_2,
93 IVTV_YUV_BUFFER_OFFSET_3
94};
95
96/* Parameter declarations */ 90/* Parameter declarations */
97static int cardtype[IVTV_MAX_CARDS]; 91static int cardtype[IVTV_MAX_CARDS];
98static int tuner[IVTV_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; 92static int tuner[IVTV_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1,
99static int radio[IVTV_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; 93 -1, -1, -1, -1, -1, -1, -1, -1,
94 -1, -1, -1, -1, -1, -1, -1, -1,
95 -1, -1, -1, -1, -1, -1, -1, -1 };
96static int radio[IVTV_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1,
97 -1, -1, -1, -1, -1, -1, -1, -1,
98 -1, -1, -1, -1, -1, -1, -1, -1,
99 -1, -1, -1, -1, -1, -1, -1, -1 };
100 100
101static int cardtype_c = 1; 101static int cardtype_c = 1;
102static int tuner_c = 1; 102static int tuner_c = 1;
@@ -106,6 +106,18 @@ static char secam[] = "--";
106static char ntsc[] = "-"; 106static char ntsc[] = "-";
107 107
108/* Buffers */ 108/* Buffers */
109
110/* DMA Buffers, Default size in MB allocated */
111#define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
112#define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
113#define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
114/* Exception: size in kB for this stream (MB is overkill) */
115#define IVTV_DEFAULT_ENC_PCM_BUFFERS 320
116#define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
117#define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
118/* Exception: size in kB for this stream (MB is way overkill) */
119#define IVTV_DEFAULT_DEC_VBI_BUFFERS 64
120
109static int enc_mpg_buffers = IVTV_DEFAULT_ENC_MPG_BUFFERS; 121static int enc_mpg_buffers = IVTV_DEFAULT_ENC_MPG_BUFFERS;
110static int enc_yuv_buffers = IVTV_DEFAULT_ENC_YUV_BUFFERS; 122static int enc_yuv_buffers = IVTV_DEFAULT_ENC_YUV_BUFFERS;
111static int enc_vbi_buffers = IVTV_DEFAULT_ENC_VBI_BUFFERS; 123static int enc_vbi_buffers = IVTV_DEFAULT_ENC_VBI_BUFFERS;
@@ -170,17 +182,27 @@ MODULE_PARM_DESC(cardtype,
170 "\t\t\t16 = GOTVIEW PCI DVD2 Deluxe\n" 182 "\t\t\t16 = GOTVIEW PCI DVD2 Deluxe\n"
171 "\t\t\t17 = Yuan MPC622\n" 183 "\t\t\t17 = Yuan MPC622\n"
172 "\t\t\t18 = Digital Cowboy DCT-MTVP1\n" 184 "\t\t\t18 = Digital Cowboy DCT-MTVP1\n"
173#ifdef HAVE_XC3028 185 "\t\t\t19 = Yuan PG600V2/GotView PCI DVD Lite\n"
174 "\t\t\t19 = Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01\n" 186 "\t\t\t20 = Club3D ZAP-TV1x01\n"
175#endif 187 "\t\t\t21 = AverTV MCE 116 Plus\n"
176 "\t\t\t 0 = Autodetect (default)\n" 188 "\t\t\t 0 = Autodetect (default)\n"
177 "\t\t\t-1 = Ignore this card\n\t\t"); 189 "\t\t\t-1 = Ignore this card\n\t\t");
178MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60"); 190MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60");
179MODULE_PARM_DESC(secam, "Set SECAM standard: B, G, H, D, K, L, LC"); 191MODULE_PARM_DESC(secam, "Set SECAM standard: B, G, H, D, K, L, LC");
180MODULE_PARM_DESC(ntsc, "Set NTSC standard: M, J, K"); 192MODULE_PARM_DESC(ntsc, "Set NTSC standard: M, J, K");
181MODULE_PARM_DESC(debug, 193MODULE_PARM_DESC(debug,
182 "Debug level (bitmask). Default: errors only\n" 194 "Debug level (bitmask). Default: 0\n"
183 "\t\t\t(debug = 1023 gives full debugging)"); 195 "\t\t\t 1/0x0001: warning\n"
196 "\t\t\t 2/0x0002: info\n"
197 "\t\t\t 4/0x0004: mailbox\n"
198 "\t\t\t 8/0x0008: ioctl\n"
199 "\t\t\t 16/0x0010: file\n"
200 "\t\t\t 32/0x0020: dma\n"
201 "\t\t\t 64/0x0040: irq\n"
202 "\t\t\t 128/0x0080: decoder\n"
203 "\t\t\t 256/0x0100: yuv\n"
204 "\t\t\t 512/0x0200: i2c\n"
205 "\t\t\t1024/0x0400: high volume\n");
184MODULE_PARM_DESC(ivtv_pci_latency, 206MODULE_PARM_DESC(ivtv_pci_latency,
185 "Change the PCI latency to 64 if lower: 0 = No, 1 = Yes,\n" 207 "Change the PCI latency to 64 if lower: 0 = No, 1 = Yes,\n"
186 "\t\t\tDefault: Yes"); 208 "\t\t\tDefault: Yes");
@@ -201,7 +223,7 @@ MODULE_PARM_DESC(enc_vbi_buffers,
201 "Encoder VBI Buffers (in MB)\n" 223 "Encoder VBI Buffers (in MB)\n"
202 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_ENC_VBI_BUFFERS)); 224 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_ENC_VBI_BUFFERS));
203MODULE_PARM_DESC(enc_pcm_buffers, 225MODULE_PARM_DESC(enc_pcm_buffers,
204 "Encoder PCM buffers (in MB)\n" 226 "Encoder PCM buffers (in kB)\n"
205 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_ENC_PCM_BUFFERS)); 227 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_ENC_PCM_BUFFERS));
206MODULE_PARM_DESC(dec_mpg_buffers, 228MODULE_PARM_DESC(dec_mpg_buffers,
207 "Decoder MPG buffers (in MB)\n" 229 "Decoder MPG buffers (in MB)\n"
@@ -210,7 +232,7 @@ MODULE_PARM_DESC(dec_yuv_buffers,
210 "Decoder YUV buffers (in MB)\n" 232 "Decoder YUV buffers (in MB)\n"
211 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_DEC_YUV_BUFFERS)); 233 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_DEC_YUV_BUFFERS));
212MODULE_PARM_DESC(dec_vbi_buffers, 234MODULE_PARM_DESC(dec_vbi_buffers,
213 "Decoder VBI buffers (in MB)\n" 235 "Decoder VBI buffers (in kB)\n"
214 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_DEC_VBI_BUFFERS)); 236 "\t\t\tDefault: " __stringify(IVTV_DEFAULT_DEC_VBI_BUFFERS));
215MODULE_PARM_DESC(newi2c, 237MODULE_PARM_DESC(newi2c,
216 "Use new I2C implementation\n" 238 "Use new I2C implementation\n"
@@ -540,13 +562,13 @@ static void ivtv_process_options(struct ivtv *itv)
540 const char *chipname; 562 const char *chipname;
541 int i, j; 563 int i, j;
542 564
543 itv->options.megabytes[IVTV_ENC_STREAM_TYPE_MPG] = enc_mpg_buffers; 565 itv->options.kilobytes[IVTV_ENC_STREAM_TYPE_MPG] = enc_mpg_buffers * 1024;
544 itv->options.megabytes[IVTV_ENC_STREAM_TYPE_YUV] = enc_yuv_buffers; 566 itv->options.kilobytes[IVTV_ENC_STREAM_TYPE_YUV] = enc_yuv_buffers * 1024;
545 itv->options.megabytes[IVTV_ENC_STREAM_TYPE_VBI] = enc_vbi_buffers; 567 itv->options.kilobytes[IVTV_ENC_STREAM_TYPE_VBI] = enc_vbi_buffers * 1024;
546 itv->options.megabytes[IVTV_ENC_STREAM_TYPE_PCM] = enc_pcm_buffers; 568 itv->options.kilobytes[IVTV_ENC_STREAM_TYPE_PCM] = enc_pcm_buffers;
547 itv->options.megabytes[IVTV_DEC_STREAM_TYPE_MPG] = dec_mpg_buffers; 569 itv->options.kilobytes[IVTV_DEC_STREAM_TYPE_MPG] = dec_mpg_buffers * 1024;
548 itv->options.megabytes[IVTV_DEC_STREAM_TYPE_YUV] = dec_yuv_buffers; 570 itv->options.kilobytes[IVTV_DEC_STREAM_TYPE_YUV] = dec_yuv_buffers * 1024;
549 itv->options.megabytes[IVTV_DEC_STREAM_TYPE_VBI] = dec_vbi_buffers; 571 itv->options.kilobytes[IVTV_DEC_STREAM_TYPE_VBI] = dec_vbi_buffers;
550 itv->options.cardtype = cardtype[itv->num]; 572 itv->options.cardtype = cardtype[itv->num];
551 itv->options.tuner = tuner[itv->num]; 573 itv->options.tuner = tuner[itv->num];
552 itv->options.radio = radio[itv->num]; 574 itv->options.radio = radio[itv->num];
@@ -645,7 +667,7 @@ static int __devinit ivtv_init_struct1(struct ivtv *itv)
645 cx2341x_fill_defaults(&itv->params); 667 cx2341x_fill_defaults(&itv->params);
646 itv->params.port = CX2341X_PORT_MEMORY; 668 itv->params.port = CX2341X_PORT_MEMORY;
647 itv->params.capabilities = CX2341X_CAP_HAS_SLICED_VBI; 669 itv->params.capabilities = CX2341X_CAP_HAS_SLICED_VBI;
648 init_waitqueue_head(&itv->cap_w); 670 init_waitqueue_head(&itv->eos_waitq);
649 init_waitqueue_head(&itv->event_waitq); 671 init_waitqueue_head(&itv->event_waitq);
650 init_waitqueue_head(&itv->vsync_waitq); 672 init_waitqueue_head(&itv->vsync_waitq);
651 init_waitqueue_head(&itv->dma_waitq); 673 init_waitqueue_head(&itv->dma_waitq);
@@ -691,14 +713,6 @@ static void __devinit ivtv_init_struct2(struct ivtv *itv)
691 break; 713 break;
692 itv->nof_audio_inputs = i; 714 itv->nof_audio_inputs = i;
693 715
694 /* 0x00EF = saa7114(239) 0x00F0 = saa7115(240) 0x0106 = micro */
695 if (itv->card->hw_all & (IVTV_HW_SAA7115 | IVTV_HW_SAA717X))
696 itv->digitizer = 0xF1;
697 else if (itv->card->hw_all & IVTV_HW_SAA7114)
698 itv->digitizer = 0xEF;
699 else /* cx25840 */
700 itv->digitizer = 0x140;
701
702 if (itv->card->hw_all & IVTV_HW_CX25840) { 716 if (itv->card->hw_all & IVTV_HW_CX25840) {
703 itv->vbi.sliced_size = 288; /* multiple of 16, real size = 284 */ 717 itv->vbi.sliced_size = 288; /* multiple of 16, real size = 284 */
704 } else { 718 } else {
@@ -727,6 +741,7 @@ static int ivtv_setup_pci(struct ivtv *itv, struct pci_dev *dev,
727 const struct pci_device_id *pci_id) 741 const struct pci_device_id *pci_id)
728{ 742{
729 u16 cmd; 743 u16 cmd;
744 u8 card_rev;
730 unsigned char pci_latency; 745 unsigned char pci_latency;
731 746
732 IVTV_DEBUG_INFO("Enabling pci device\n"); 747 IVTV_DEBUG_INFO("Enabling pci device\n");
@@ -773,7 +788,7 @@ static int ivtv_setup_pci(struct ivtv *itv, struct pci_dev *dev,
773 } 788 }
774 IVTV_DEBUG_INFO("Bus Mastering Enabled.\n"); 789 IVTV_DEBUG_INFO("Bus Mastering Enabled.\n");
775 790
776 pci_read_config_byte(dev, PCI_CLASS_REVISION, &itv->card_rev); 791 pci_read_config_byte(dev, PCI_CLASS_REVISION, &card_rev);
777 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &pci_latency); 792 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &pci_latency);
778 793
779 if (pci_latency < 64 && ivtv_pci_latency) { 794 if (pci_latency < 64 && ivtv_pci_latency) {
@@ -790,7 +805,7 @@ static int ivtv_setup_pci(struct ivtv *itv, struct pci_dev *dev,
790 805
791 IVTV_DEBUG_INFO("%d (rev %d) at %02x:%02x.%x, " 806 IVTV_DEBUG_INFO("%d (rev %d) at %02x:%02x.%x, "
792 "irq: %d, latency: %d, memory: 0x%lx\n", 807 "irq: %d, latency: %d, memory: 0x%lx\n",
793 itv->dev->device, itv->card_rev, dev->bus->number, 808 itv->dev->device, card_rev, dev->bus->number,
794 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), 809 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
795 itv->dev->irq, pci_latency, (unsigned long)itv->base_addr); 810 itv->dev->irq, pci_latency, (unsigned long)itv->base_addr);
796 811
@@ -808,18 +823,19 @@ static void ivtv_request_module(struct ivtv *itv, const char *name)
808 823
809static void ivtv_load_and_init_modules(struct ivtv *itv) 824static void ivtv_load_and_init_modules(struct ivtv *itv)
810{ 825{
811 struct v4l2_control ctrl;
812 u32 hw = itv->card->hw_all; 826 u32 hw = itv->card->hw_all;
813 int i; 827 int i;
814 828
815 /* load modules */ 829 /* load modules */
816#ifndef CONFIG_VIDEO_TUNER 830#ifndef CONFIG_VIDEO_TUNER
817 if (hw & IVTV_HW_TUNER) { 831 if (hw & IVTV_HW_TUNER) {
818 ivtv_request_module(itv, "tuner"); 832 if (itv->options.tuner == TUNER_XCEIVE_XC3028) {
819#ifdef HAVE_XC3028 833 IVTV_INFO("Xceive tuner not yet supported, only composite and S-Video inputs will be available\n");
820 if (itv->options.tuner == TUNER_XCEIVE_XC3028) 834 itv->tunerid = 1;
821 ivtv_request_module(itv, "xc3028-tuner"); 835 }
822#endif 836 else {
837 ivtv_request_module(itv, "tuner");
838 }
823 } 839 }
824#endif 840#endif
825#ifndef CONFIG_VIDEO_CX25840 841#ifndef CONFIG_VIDEO_CX25840
@@ -848,6 +864,10 @@ static void ivtv_load_and_init_modules(struct ivtv *itv)
848 if (hw & IVTV_HW_MSP34XX) 864 if (hw & IVTV_HW_MSP34XX)
849 ivtv_request_module(itv, "msp3400"); 865 ivtv_request_module(itv, "msp3400");
850#endif 866#endif
867#ifndef CONFIG_VIDEO_VP27SMPX
868 if (hw & IVTV_HW_VP27SMPX)
869 ivtv_request_module(itv, "vp27smpx");
870#endif
851 if (hw & IVTV_HW_TVAUDIO) 871 if (hw & IVTV_HW_TVAUDIO)
852 ivtv_request_module(itv, "tvaudio"); 872 ivtv_request_module(itv, "tvaudio");
853#ifndef CONFIG_VIDEO_WM8775 873#ifndef CONFIG_VIDEO_WM8775
@@ -888,13 +908,17 @@ static void ivtv_load_and_init_modules(struct ivtv *itv)
888 else if ((hw & IVTV_HW_UPD64031A) == 0) 908 else if ((hw & IVTV_HW_UPD64031A) == 0)
889 itv->card = ivtv_get_card(IVTV_CARD_CX23416GYC_NOGR); 909 itv->card = ivtv_get_card(IVTV_CARD_CX23416GYC_NOGR);
890 } 910 }
911 else if (itv->card->type == IVTV_CARD_GV_MVPRX ||
912 itv->card->type == IVTV_CARD_GV_MVPRX2E) {
913 struct v4l2_crystal_freq crystal_freq;
914
915 /* The crystal frequency of GVMVPRX is 24.576MHz */
916 crystal_freq.freq = SAA7115_FREQ_24_576_MHZ;
917 crystal_freq.flags = SAA7115_FREQ_FL_UCGC;
918 itv->video_dec_func(itv, VIDIOC_INT_S_CRYSTAL_FREQ, &crystal_freq);
919 }
891 920
892 if (hw & IVTV_HW_CX25840) { 921 if (hw & IVTV_HW_CX25840) {
893 /* CX25840_CID_ENABLE_PVR150_WORKAROUND */
894 ctrl.id = V4L2_CID_PRIVATE_BASE;
895 ctrl.value = itv->pvr150_workaround;
896 itv->video_dec_func(itv, VIDIOC_S_CTRL, &ctrl);
897
898 itv->vbi.raw_decoder_line_size = 1444; 922 itv->vbi.raw_decoder_line_size = 1444;
899 itv->vbi.raw_decoder_sav_odd_field = 0x20; 923 itv->vbi.raw_decoder_sav_odd_field = 0x20;
900 itv->vbi.raw_decoder_sav_even_field = 0x60; 924 itv->vbi.raw_decoder_sav_even_field = 0x60;
@@ -940,12 +964,9 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
940 const struct pci_device_id *pci_id) 964 const struct pci_device_id *pci_id)
941{ 965{
942 int retval = 0; 966 int retval = 0;
943 int video_input;
944 int yuv_buf_size; 967 int yuv_buf_size;
945 int vbi_buf_size; 968 int vbi_buf_size;
946 int fw_retry_count = 3;
947 struct ivtv *itv; 969 struct ivtv *itv;
948 struct v4l2_frequency vf;
949 970
950 spin_lock(&ivtv_cards_lock); 971 spin_lock(&ivtv_cards_lock);
951 972
@@ -982,6 +1003,8 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
982 1003
983 IVTV_DEBUG_INFO("base addr: 0x%08x\n", itv->base_addr); 1004 IVTV_DEBUG_INFO("base addr: 0x%08x\n", itv->base_addr);
984 1005
1006 mutex_lock(&itv->serialize_lock);
1007
985 /* PCI Device Setup */ 1008 /* PCI Device Setup */
986 if ((retval = ivtv_setup_pci(itv, dev, pci_id)) != 0) { 1009 if ((retval = ivtv_setup_pci(itv, dev, pci_id)) != 0) {
987 if (retval == -EIO) 1010 if (retval == -EIO)
@@ -1032,22 +1055,6 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
1032 goto free_io; 1055 goto free_io;
1033 } 1056 }
1034 1057
1035 while (--fw_retry_count > 0) {
1036 /* load firmware */
1037 if (ivtv_firmware_init(itv) == 0)
1038 break;
1039 if (fw_retry_count > 1)
1040 IVTV_WARN("Retry loading firmware\n");
1041 }
1042 if (fw_retry_count == 0) {
1043 IVTV_ERR("Error initializing firmware\n");
1044 goto free_i2c;
1045 }
1046
1047 /* Try and get firmware versions */
1048 IVTV_DEBUG_INFO("Getting firmware version..\n");
1049 ivtv_firmware_versions(itv);
1050
1051 /* Check yuv output filter table */ 1058 /* Check yuv output filter table */
1052 if (itv->has_cx23415) ivtv_yuv_filter_check(itv); 1059 if (itv->has_cx23415) ivtv_yuv_filter_check(itv);
1053 1060
@@ -1135,43 +1142,22 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
1135 if (itv->options.radio > 0) 1142 if (itv->options.radio > 0)
1136 itv->v4l2_cap |= V4L2_CAP_RADIO; 1143 itv->v4l2_cap |= V4L2_CAP_RADIO;
1137 1144
1138 if (itv->options.tuner > -1) { 1145 if (itv->options.tuner > -1 && itv->tunerid == 0) {
1139 struct tuner_setup setup; 1146 struct tuner_setup setup;
1140 1147
1141 setup.addr = ADDR_UNSET; 1148 setup.addr = ADDR_UNSET;
1142 setup.type = itv->options.tuner; 1149 setup.type = itv->options.tuner;
1143 setup.mode_mask = T_ANALOG_TV; /* matches TV tuners */ 1150 setup.mode_mask = T_ANALOG_TV; /* matches TV tuners */
1144#ifdef HAVE_XC3028
1145 setup.initmode = V4L2_TUNER_ANALOG_TV;
1146 if (itv->options.tuner == TUNER_XCEIVE_XC3028) {
1147 setup.gpio_write = ivtv_reset_tuner_gpio;
1148 setup.gpio_priv = itv;
1149 }
1150#endif
1151 ivtv_call_i2c_clients(itv, TUNER_SET_TYPE_ADDR, &setup); 1151 ivtv_call_i2c_clients(itv, TUNER_SET_TYPE_ADDR, &setup);
1152 } 1152 }
1153 1153
1154 vf.tuner = 0;
1155 vf.type = V4L2_TUNER_ANALOG_TV;
1156 vf.frequency = 6400; /* the tuner 'baseline' frequency */
1157 if (itv->std & V4L2_STD_NTSC_M) {
1158 /* Why on earth? */
1159 vf.frequency = 1076; /* ch. 4 67250*16/1000 */
1160 }
1161
1162 /* The tuner is fixed to the standard. The other inputs (e.g. S-Video) 1154 /* The tuner is fixed to the standard. The other inputs (e.g. S-Video)
1163 are not. */ 1155 are not. */
1164 itv->tuner_std = itv->std; 1156 itv->tuner_std = itv->std;
1165 1157
1166 video_input = itv->active_input; 1158 if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) {
1167 itv->active_input++; /* Force update of input */ 1159 ivtv_call_i2c_clients(itv, VIDIOC_INT_S_STD_OUTPUT, &itv->std);
1168 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_INPUT, &video_input); 1160 }
1169
1170 /* Let the VIDIOC_S_STD ioctl do all the work, keeps the code
1171 in one place. */
1172 itv->std++; /* Force full standard initialization */
1173 itv->std_out = itv->std;
1174 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_FREQUENCY, &vf);
1175 1161
1176 retval = ivtv_streams_setup(itv); 1162 retval = ivtv_streams_setup(itv);
1177 if (retval) { 1163 if (retval) {
@@ -1179,11 +1165,6 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
1179 goto free_i2c; 1165 goto free_i2c;
1180 } 1166 }
1181 1167
1182 if (itv->card->v4l2_capabilities & V4L2_CAP_VIDEO_OUTPUT) {
1183 ivtv_init_mpeg_decoder(itv);
1184 }
1185 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_STD, &itv->tuner_std);
1186
1187 IVTV_DEBUG_IRQ("Masking interrupts\n"); 1168 IVTV_DEBUG_IRQ("Masking interrupts\n");
1188 /* clear interrupt mask, effectively disabling interrupts */ 1169 /* clear interrupt mask, effectively disabling interrupts */
1189 ivtv_set_irq_mask(itv, 0xffffffff); 1170 ivtv_set_irq_mask(itv, 0xffffffff);
@@ -1195,26 +1176,8 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
1195 IVTV_ERR("Failed to register irq %d\n", retval); 1176 IVTV_ERR("Failed to register irq %d\n", retval);
1196 goto free_streams; 1177 goto free_streams;
1197 } 1178 }
1198 1179 mutex_unlock(&itv->serialize_lock);
1199 /* On a cx23416 this seems to be able to enable DMA to the chip? */
1200 if (!itv->has_cx23415)
1201 write_reg_sync(0x03, IVTV_REG_DMACONTROL);
1202
1203 /* Default interrupts enabled. For the PVR350 this includes the
1204 decoder VSYNC interrupt, which is always on. It is not only used
1205 during decoding but also by the OSD.
1206 Some old PVR250 cards had a cx23415, so testing for that is too
1207 general. Instead test if the card has video output capability. */
1208 if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT)
1209 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT | IVTV_IRQ_DEC_VSYNC);
1210 else
1211 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT);
1212
1213 if (itv->has_cx23415)
1214 ivtv_set_osd_alpha(itv);
1215
1216 IVTV_INFO("Initialized card #%d: %s\n", itv->num, itv->card_name); 1180 IVTV_INFO("Initialized card #%d: %s\n", itv->num, itv->card_name);
1217
1218 return 0; 1181 return 0;
1219 1182
1220 free_irq: 1183 free_irq:
@@ -1232,65 +1195,146 @@ static int __devinit ivtv_probe(struct pci_dev *dev,
1232 release_mem_region(itv->base_addr + IVTV_DECODER_OFFSET, IVTV_DECODER_SIZE); 1195 release_mem_region(itv->base_addr + IVTV_DECODER_OFFSET, IVTV_DECODER_SIZE);
1233 free_workqueue: 1196 free_workqueue:
1234 destroy_workqueue(itv->irq_work_queues); 1197 destroy_workqueue(itv->irq_work_queues);
1198 mutex_unlock(&itv->serialize_lock);
1235 err: 1199 err:
1236 if (retval == 0) 1200 if (retval == 0)
1237 retval = -ENODEV; 1201 retval = -ENODEV;
1238 IVTV_ERR("Error %d on initialization\n", retval); 1202 IVTV_ERR("Error %d on initialization\n", retval);
1239 1203
1204 spin_lock(&ivtv_cards_lock);
1240 kfree(ivtv_cards[ivtv_cards_active]); 1205 kfree(ivtv_cards[ivtv_cards_active]);
1241 ivtv_cards[ivtv_cards_active] = NULL; 1206 ivtv_cards[ivtv_cards_active] = NULL;
1207 spin_unlock(&ivtv_cards_lock);
1242 return retval; 1208 return retval;
1243} 1209}
1244 1210
1211int ivtv_init_on_first_open(struct ivtv *itv)
1212{
1213 struct v4l2_frequency vf;
1214 int fw_retry_count = 3;
1215 int video_input;
1216
1217 if (test_bit(IVTV_F_I_FAILED, &itv->i_flags))
1218 return -ENXIO;
1219
1220 if (test_and_set_bit(IVTV_F_I_INITED, &itv->i_flags))
1221 return 0;
1222
1223 while (--fw_retry_count > 0) {
1224 /* load firmware */
1225 if (ivtv_firmware_init(itv) == 0)
1226 break;
1227 if (fw_retry_count > 1)
1228 IVTV_WARN("Retry loading firmware\n");
1229 }
1230
1231 if (fw_retry_count == 0) {
1232 set_bit(IVTV_F_I_FAILED, &itv->i_flags);
1233 return -ENXIO;
1234 }
1235
1236 /* Try and get firmware versions */
1237 IVTV_DEBUG_INFO("Getting firmware version..\n");
1238 ivtv_firmware_versions(itv);
1239
1240 if (itv->card->hw_all & IVTV_HW_CX25840) {
1241 struct v4l2_control ctrl;
1242
1243 /* CX25840_CID_ENABLE_PVR150_WORKAROUND */
1244 ctrl.id = V4L2_CID_PRIVATE_BASE;
1245 ctrl.value = itv->pvr150_workaround;
1246 itv->video_dec_func(itv, VIDIOC_S_CTRL, &ctrl);
1247 }
1248
1249 vf.tuner = 0;
1250 vf.type = V4L2_TUNER_ANALOG_TV;
1251 vf.frequency = 6400; /* the tuner 'baseline' frequency */
1252
1253 /* Set initial frequency. For PAL/SECAM broadcasts no
1254 'default' channel exists AFAIK. */
1255 if (itv->std == V4L2_STD_NTSC_M_JP) {
1256 vf.frequency = 1460; /* ch. 1 91250*16/1000 */
1257 }
1258 else if (itv->std & V4L2_STD_NTSC_M) {
1259 vf.frequency = 1076; /* ch. 4 67250*16/1000 */
1260 }
1261
1262 video_input = itv->active_input;
1263 itv->active_input++; /* Force update of input */
1264 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_INPUT, &video_input);
1265
1266 /* Let the VIDIOC_S_STD ioctl do all the work, keeps the code
1267 in one place. */
1268 itv->std++; /* Force full standard initialization */
1269 itv->std_out = itv->std;
1270 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_FREQUENCY, &vf);
1271
1272 if (itv->card->v4l2_capabilities & V4L2_CAP_VIDEO_OUTPUT) {
1273 ivtv_init_mpeg_decoder(itv);
1274 }
1275 ivtv_v4l2_ioctls(itv, NULL, VIDIOC_S_STD, &itv->tuner_std);
1276
1277 /* On a cx23416 this seems to be able to enable DMA to the chip? */
1278 if (!itv->has_cx23415)
1279 write_reg_sync(0x03, IVTV_REG_DMACONTROL);
1280
1281 /* Default interrupts enabled. For the PVR350 this includes the
1282 decoder VSYNC interrupt, which is always on. It is not only used
1283 during decoding but also by the OSD.
1284 Some old PVR250 cards had a cx23415, so testing for that is too
1285 general. Instead test if the card has video output capability. */
1286 if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) {
1287 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT | IVTV_IRQ_DEC_VSYNC);
1288 ivtv_set_osd_alpha(itv);
1289 }
1290 else
1291 ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT);
1292 return 0;
1293}
1294
1245static void ivtv_remove(struct pci_dev *pci_dev) 1295static void ivtv_remove(struct pci_dev *pci_dev)
1246{ 1296{
1247 struct ivtv *itv = pci_get_drvdata(pci_dev); 1297 struct ivtv *itv = pci_get_drvdata(pci_dev);
1248 1298
1249 IVTV_DEBUG_INFO("Removing Card #%d\n", itv->num); 1299 IVTV_DEBUG_INFO("Removing Card #%d\n", itv->num);
1250 1300
1251 /* Stop all captures */ 1301 if (test_bit(IVTV_F_I_INITED, &itv->i_flags)) {
1252 IVTV_DEBUG_INFO("Stopping all streams\n"); 1302 /* Stop all captures */
1253 if (atomic_read(&itv->capturing) > 0) 1303 IVTV_DEBUG_INFO("Stopping all streams\n");
1254 ivtv_stop_all_captures(itv); 1304 if (atomic_read(&itv->capturing) > 0)
1255 1305 ivtv_stop_all_captures(itv);
1256 /* Stop all decoding */ 1306
1257 IVTV_DEBUG_INFO("Stopping decoding\n"); 1307 /* Stop all decoding */
1258 if (atomic_read(&itv->decoding) > 0) { 1308 IVTV_DEBUG_INFO("Stopping decoding\n");
1259 int type; 1309 if (atomic_read(&itv->decoding) > 0) {
1260 1310 int type;
1261 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) 1311
1262 type = IVTV_DEC_STREAM_TYPE_YUV; 1312 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags))
1263 else 1313 type = IVTV_DEC_STREAM_TYPE_YUV;
1264 type = IVTV_DEC_STREAM_TYPE_MPG; 1314 else
1265 ivtv_stop_v4l2_decode_stream(&itv->streams[type], 1315 type = IVTV_DEC_STREAM_TYPE_MPG;
1266 VIDEO_CMD_STOP_TO_BLACK | VIDEO_CMD_STOP_IMMEDIATELY, 0); 1316 ivtv_stop_v4l2_decode_stream(&itv->streams[type],
1317 VIDEO_CMD_STOP_TO_BLACK | VIDEO_CMD_STOP_IMMEDIATELY, 0);
1318 }
1319 ivtv_halt_firmware(itv);
1267 } 1320 }
1268 1321
1269 /* Interrupts */ 1322 /* Interrupts */
1270 IVTV_DEBUG_INFO("Disabling interrupts\n");
1271 ivtv_set_irq_mask(itv, 0xffffffff); 1323 ivtv_set_irq_mask(itv, 0xffffffff);
1272 del_timer_sync(&itv->dma_timer); 1324 del_timer_sync(&itv->dma_timer);
1273 1325
1274 /* Stop all Work Queues */ 1326 /* Stop all Work Queues */
1275 IVTV_DEBUG_INFO("Stop Work Queues\n");
1276 flush_workqueue(itv->irq_work_queues); 1327 flush_workqueue(itv->irq_work_queues);
1277 destroy_workqueue(itv->irq_work_queues); 1328 destroy_workqueue(itv->irq_work_queues);
1278 1329
1279 IVTV_DEBUG_INFO("Stopping Firmware\n");
1280 ivtv_halt_firmware(itv);
1281
1282 IVTV_DEBUG_INFO("Unregistering v4l devices\n");
1283 ivtv_streams_cleanup(itv); 1330 ivtv_streams_cleanup(itv);
1284 IVTV_DEBUG_INFO("Freeing dma resources\n");
1285 ivtv_udma_free(itv); 1331 ivtv_udma_free(itv);
1286 1332
1287 exit_ivtv_i2c(itv); 1333 exit_ivtv_i2c(itv);
1288 1334
1289 IVTV_DEBUG_INFO(" Releasing irq\n");
1290 free_irq(itv->dev->irq, (void *)itv); 1335 free_irq(itv->dev->irq, (void *)itv);
1291 ivtv_iounmap(itv); 1336 ivtv_iounmap(itv);
1292 1337
1293 IVTV_DEBUG_INFO(" Releasing mem\n");
1294 release_mem_region(itv->base_addr, IVTV_ENCODER_SIZE); 1338 release_mem_region(itv->base_addr, IVTV_ENCODER_SIZE);
1295 release_mem_region(itv->base_addr + IVTV_REG_OFFSET, IVTV_REG_SIZE); 1339 release_mem_region(itv->base_addr + IVTV_REG_OFFSET, IVTV_REG_SIZE);
1296 if (itv->has_cx23415) 1340 if (itv->has_cx23415)
@@ -1322,9 +1366,9 @@ static int module_start(void)
1322 return -1; 1366 return -1;
1323 } 1367 }
1324 1368
1325 if (ivtv_debug < 0 || ivtv_debug > 1023) { 1369 if (ivtv_debug < 0 || ivtv_debug > 2047) {
1326 ivtv_debug = 0; 1370 ivtv_debug = 0;
1327 printk(KERN_INFO "ivtv: Debug value must be >= 0 and <= 1023\n"); 1371 printk(KERN_INFO "ivtv: Debug value must be >= 0 and <= 2047\n");
1328 } 1372 }
1329 1373
1330 if (pci_register_driver(&ivtv_pci_driver)) { 1374 if (pci_register_driver(&ivtv_pci_driver)) {
@@ -1341,6 +1385,7 @@ static void module_cleanup(void)
1341 1385
1342 pci_unregister_driver(&ivtv_pci_driver); 1386 pci_unregister_driver(&ivtv_pci_driver);
1343 1387
1388 spin_lock(&ivtv_cards_lock);
1344 for (i = 0; i < ivtv_cards_active; i++) { 1389 for (i = 0; i < ivtv_cards_active; i++) {
1345 if (ivtv_cards[i] == NULL) 1390 if (ivtv_cards[i] == NULL)
1346 continue; 1391 continue;
@@ -1349,13 +1394,15 @@ static void module_cleanup(void)
1349 } 1394 }
1350 kfree(ivtv_cards[i]); 1395 kfree(ivtv_cards[i]);
1351 } 1396 }
1397 spin_unlock(&ivtv_cards_lock);
1352} 1398}
1353 1399
1354/* Note: These symbols are exported because they are used by the ivtv-fb 1400/* Note: These symbols are exported because they are used by the ivtvfb
1355 framebuffer module and an infrared module for the IR-blaster. */ 1401 framebuffer module and an infrared module for the IR-blaster. */
1356EXPORT_SYMBOL(ivtv_set_irq_mask); 1402EXPORT_SYMBOL(ivtv_set_irq_mask);
1357EXPORT_SYMBOL(ivtv_cards_active); 1403EXPORT_SYMBOL(ivtv_cards_active);
1358EXPORT_SYMBOL(ivtv_cards); 1404EXPORT_SYMBOL(ivtv_cards);
1405EXPORT_SYMBOL(ivtv_cards_lock);
1359EXPORT_SYMBOL(ivtv_api); 1406EXPORT_SYMBOL(ivtv_api);
1360EXPORT_SYMBOL(ivtv_vapi); 1407EXPORT_SYMBOL(ivtv_vapi);
1361EXPORT_SYMBOL(ivtv_vapi_result); 1408EXPORT_SYMBOL(ivtv_vapi_result);
@@ -1366,6 +1413,7 @@ EXPORT_SYMBOL(ivtv_udma_setup);
1366EXPORT_SYMBOL(ivtv_udma_unmap); 1413EXPORT_SYMBOL(ivtv_udma_unmap);
1367EXPORT_SYMBOL(ivtv_udma_alloc); 1414EXPORT_SYMBOL(ivtv_udma_alloc);
1368EXPORT_SYMBOL(ivtv_udma_prepare); 1415EXPORT_SYMBOL(ivtv_udma_prepare);
1416EXPORT_SYMBOL(ivtv_init_on_first_open);
1369 1417
1370module_init(module_start); 1418module_init(module_start);
1371module_exit(module_cleanup); 1419module_exit(module_cleanup);
diff --git a/drivers/media/video/ivtv/ivtv-driver.h b/drivers/media/video/ivtv/ivtv-driver.h
index 8abb34a35816..3bda1df63cb6 100644
--- a/drivers/media/video/ivtv/ivtv-driver.h
+++ b/drivers/media/video/ivtv/ivtv-driver.h
@@ -38,7 +38,6 @@
38 38
39#include <linux/version.h> 39#include <linux/version.h>
40#include <linux/module.h> 40#include <linux/module.h>
41#include <linux/moduleparam.h>
42#include <linux/init.h> 41#include <linux/init.h>
43#include <linux/delay.h> 42#include <linux/delay.h>
44#include <linux/sched.h> 43#include <linux/sched.h>
@@ -63,77 +62,20 @@
63#include <media/tuner.h> 62#include <media/tuner.h>
64#include <media/cx2341x.h> 63#include <media/cx2341x.h>
65 64
66/* #define HAVE_XC3028 1 */ 65#include <linux/ivtv.h>
67 66
68#include <media/ivtv.h>
69 67
68/* Memory layout */
70#define IVTV_ENCODER_OFFSET 0x00000000 69#define IVTV_ENCODER_OFFSET 0x00000000
71#define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ 70#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
72
73#define IVTV_DECODER_OFFSET 0x01000000 71#define IVTV_DECODER_OFFSET 0x01000000
74#define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */ 72#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
75
76#define IVTV_REG_OFFSET 0x02000000 73#define IVTV_REG_OFFSET 0x02000000
77#define IVTV_REG_SIZE 0x00010000 74#define IVTV_REG_SIZE 0x00010000
78 75
79/* Buffers on hardware offsets */ 76/* Maximum ivtv driver instances. Some people have a huge number of
80#define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */ 77 capture cards, so set this to a high value. */
81#define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */ 78#define IVTV_MAX_CARDS 32
82#define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
83#define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
84#define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
85
86/* Offset to filter table in firmware */
87#define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
88#define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
89
90extern const u32 yuv_offset[4];
91
92/* Maximum ivtv driver instances.
93 Based on 6 PVR500s each with two PVR15s...
94 TODO: make this dynamic. I believe it is only a global in order to support
95 ivtv-fb. There must be a better way to do that. */
96#define IVTV_MAX_CARDS 12
97
98/* Supported cards */
99#define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
100#define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
101#define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
102 PVR150s on one PCI board) */
103#define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
104#define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
105#define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
106 cx23415 based, but does not have tv-out */
107#define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
108#define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
109#define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
110#define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
111#define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
112#define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
113#define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
114#define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
115#define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
116#define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
117#define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
118#define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
119#ifdef HAVE_XC3028
120#define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */
121#define IVTV_CARD_LAST 18
122#else
123#define IVTV_CARD_LAST 17
124#endif
125
126/* Variants of existing cards but with the same PCI IDs. The driver
127 detects these based on other device information.
128 These cards must always come last.
129 New cards must be inserted above, and the indices of the cards below
130 must be adjusted accordingly. */
131
132/* PVR-350 V1 (uses saa7114) */
133#define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
134/* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
135#define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
136#define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
137 79
138#define IVTV_ENC_STREAM_TYPE_MPG 0 80#define IVTV_ENC_STREAM_TYPE_MPG 0
139#define IVTV_ENC_STREAM_TYPE_YUV 1 81#define IVTV_ENC_STREAM_TYPE_YUV 1
@@ -146,70 +88,8 @@ extern const u32 yuv_offset[4];
146#define IVTV_DEC_STREAM_TYPE_YUV 8 88#define IVTV_DEC_STREAM_TYPE_YUV 8
147#define IVTV_MAX_STREAMS 9 89#define IVTV_MAX_STREAMS 9
148 90
149#define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
150#define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
151#define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
152#define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
153#define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
154#define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
155
156#define IVTV_ENC_MEM_START 0x00000000
157#define IVTV_DEC_MEM_START 0x01000000
158
159/* system vendor and device IDs */
160#define PCI_VENDOR_ID_ICOMP 0x4444
161#define PCI_DEVICE_ID_IVTV15 0x0803
162#define PCI_DEVICE_ID_IVTV16 0x0016
163
164/* subsystem vendor ID */
165#define IVTV_PCI_ID_HAUPPAUGE 0x0070
166#define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
167#define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
168#define IVTV_PCI_ID_ADAPTEC 0x9005
169#define IVTV_PCI_ID_AVERMEDIA 0x1461
170#define IVTV_PCI_ID_YUAN1 0x12ab
171#define IVTV_PCI_ID_YUAN2 0xff01
172#define IVTV_PCI_ID_YUAN3 0xffab
173#define IVTV_PCI_ID_YUAN4 0xfbab
174#define IVTV_PCI_ID_DIAMONDMM 0xff92
175#define IVTV_PCI_ID_IODATA 0x10fc
176#define IVTV_PCI_ID_MELCO 0x1154
177#define IVTV_PCI_ID_GOTVIEW1 0xffac
178#define IVTV_PCI_ID_GOTVIEW2 0xffad
179
180/* Decoder Buffer hardware size on Chip */
181#define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */
182#define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */
183
184/* ======================================================================== */
185/* ========================== START USER SETTABLE DMA VARIABLES =========== */
186/* ======================================================================== */
187
188#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */ 91#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
189 92
190/* DMA Buffers, Default size in MB allocated */
191#define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
192#define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
193#define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
194#define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
195#define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
196#define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
197#define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
198
199/* ======================================================================== */
200/* ========================== END USER SETTABLE DMA VARIABLES ============= */
201/* ======================================================================== */
202
203/* Decoder Status Register */
204#define IVTV_DMA_ERR_LIST 0x00000010
205#define IVTV_DMA_ERR_WRITE 0x00000008
206#define IVTV_DMA_ERR_READ 0x00000004
207#define IVTV_DMA_SUCCESS_WRITE 0x00000002
208#define IVTV_DMA_SUCCESS_READ 0x00000001
209#define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
210#define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
211#define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
212
213/* DMA Registers */ 93/* DMA Registers */
214#define IVTV_REG_DMAXFER (0x0000) 94#define IVTV_REG_DMAXFER (0x0000)
215#define IVTV_REG_DMASTATUS (0x0004) 95#define IVTV_REG_DMASTATUS (0x0004)
@@ -232,44 +112,24 @@ extern const u32 yuv_offset[4];
232#define IVTV_REG_VPU (0x9058) 112#define IVTV_REG_VPU (0x9058)
233#define IVTV_REG_APU (0xA064) 113#define IVTV_REG_APU (0xA064)
234 114
235#define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
236#define IVTV_IRQ_ENC_EOS (0x1 << 30)
237#define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
238#define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
239#define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
240#define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25)
241#define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
242#define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
243#define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
244#define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
245#define IVTV_IRQ_DMA_ERR (0x1 << 18)
246#define IVTV_IRQ_DMA_WRITE (0x1 << 17)
247#define IVTV_IRQ_DMA_READ (0x1 << 16)
248#define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
249
250/* IRQ Masks */
251#define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
252 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
253
254#define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
255#define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
256
257/* i2c stuff */ 115/* i2c stuff */
258#define I2C_CLIENTS_MAX 16 116#define I2C_CLIENTS_MAX 16
259 117
260/* debugging */ 118/* debugging */
119extern int ivtv_debug;
261 120
262#define IVTV_DBGFLG_WARN (1 << 0) 121#define IVTV_DBGFLG_WARN (1 << 0)
263#define IVTV_DBGFLG_INFO (1 << 1) 122#define IVTV_DBGFLG_INFO (1 << 1)
264#define IVTV_DBGFLG_API (1 << 2) 123#define IVTV_DBGFLG_MB (1 << 2)
265#define IVTV_DBGFLG_DMA (1 << 3) 124#define IVTV_DBGFLG_IOCTL (1 << 3)
266#define IVTV_DBGFLG_IOCTL (1 << 4) 125#define IVTV_DBGFLG_FILE (1 << 4)
267#define IVTV_DBGFLG_I2C (1 << 5) 126#define IVTV_DBGFLG_DMA (1 << 5)
268#define IVTV_DBGFLG_IRQ (1 << 6) 127#define IVTV_DBGFLG_IRQ (1 << 6)
269#define IVTV_DBGFLG_DEC (1 << 7) 128#define IVTV_DBGFLG_DEC (1 << 7)
270#define IVTV_DBGFLG_YUV (1 << 8) 129#define IVTV_DBGFLG_YUV (1 << 8)
130#define IVTV_DBGFLG_I2C (1 << 9)
271/* Flag to turn on high volume debugging */ 131/* Flag to turn on high volume debugging */
272#define IVTV_DBGFLG_HIGHVOL (1 << 9) 132#define IVTV_DBGFLG_HIGHVOL (1 << 10)
273 133
274/* NOTE: extra space before comma in 'itv->num , ## args' is required for 134/* NOTE: extra space before comma in 'itv->num , ## args' is required for
275 gcc-2.95, otherwise it won't compile. */ 135 gcc-2.95, otherwise it won't compile. */
@@ -278,58 +138,37 @@ extern const u32 yuv_offset[4];
278 if ((x) & ivtv_debug) \ 138 if ((x) & ivtv_debug) \
279 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \ 139 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
280 } while (0) 140 } while (0)
281#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args) 141#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
282#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args) 142#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
283#define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args) 143#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
284#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args) 144#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
285#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args) 145#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
286#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args) 146#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
287#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args) 147#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
288#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args) 148#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
289#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args) 149#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
150#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
290 151
291#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \ 152#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
292 do { \ 153 do { \
293 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \ 154 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
294 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \ 155 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
295 } while (0) 156 } while (0)
296#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warning", fmt , ## args) 157#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
297#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info",fmt , ## args) 158#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
298#define IVTV_DEBUG_HI_API(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_API, "api", fmt , ## args) 159#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
299#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args) 160#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
300#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args) 161#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
301#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args) 162#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
302#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args) 163#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
303#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args) 164#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
304#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args) 165#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
305 166#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
306#define IVTV_FB_DEBUG(x, type, fmt, args...) \
307 do { \
308 if ((x) & ivtv_debug) \
309 printk(KERN_INFO "ivtv%d-fb " type ": " fmt, itv->num , ## args); \
310 } while (0)
311#define IVTV_FB_DEBUG_WARN(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
312#define IVTV_FB_DEBUG_INFO(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
313#define IVTV_FB_DEBUG_API(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
314#define IVTV_FB_DEBUG_DMA(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
315#define IVTV_FB_DEBUG_IOCTL(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
316#define IVTV_FB_DEBUG_I2C(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
317#define IVTV_FB_DEBUG_IRQ(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
318#define IVTV_FB_DEBUG_DEC(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
319#define IVTV_FB_DEBUG_YUV(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
320 167
321/* Standard kernel messages */ 168/* Standard kernel messages */
322#define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args) 169#define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
323#define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args) 170#define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
324#define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args) 171#define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
325#define IVTV_FB_ERR(fmt, args...) printk(KERN_ERR "ivtv%d-fb: " fmt, itv->num , ## args)
326#define IVTV_FB_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d-fb: " fmt, itv->num , ## args)
327#define IVTV_FB_INFO(fmt, args...) printk(KERN_INFO "ivtv%d-fb: " fmt, itv->num , ## args)
328
329/* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
330#define MPEG_FRAME_TYPE_IFRAME 1
331#define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
332#define MPEG_FRAME_TYPE_ALL 7
333 172
334/* output modes (cx23415 only) */ 173/* output modes (cx23415 only) */
335#define OUT_NONE 0 174#define OUT_NONE 0
@@ -340,22 +179,14 @@ extern const u32 yuv_offset[4];
340 179
341#define IVTV_MAX_PGM_INDEX (400) 180#define IVTV_MAX_PGM_INDEX (400)
342 181
343extern int ivtv_debug;
344
345
346struct ivtv_options { 182struct ivtv_options {
347 int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */ 183 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
348 int cardtype; /* force card type on load */ 184 int cardtype; /* force card type on load */
349 int tuner; /* set tuner on load */ 185 int tuner; /* set tuner on load */
350 int radio; /* enable/disable radio */ 186 int radio; /* enable/disable radio */
351 int newi2c; /* New I2C algorithm */ 187 int newi2c; /* new I2C algorithm */
352}; 188};
353 189
354#define IVTV_MBOX_DMA_START 6
355#define IVTV_MBOX_DMA_END 8
356#define IVTV_MBOX_DMA 9
357#define IVTV_MBOX_FIELD_DISPLAYED 8
358
359/* ivtv-specific mailbox template */ 190/* ivtv-specific mailbox template */
360struct ivtv_mailbox { 191struct ivtv_mailbox {
361 u32 flags; 192 u32 flags;
@@ -379,7 +210,7 @@ struct ivtv_mailbox_data {
379}; 210};
380 211
381/* per-buffer bit flags */ 212/* per-buffer bit flags */
382#define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */ 213#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
383 214
384/* per-stream, s_flags */ 215/* per-stream, s_flags */
385#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */ 216#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
@@ -400,24 +231,25 @@ struct ivtv_mailbox_data {
400#define IVTV_F_I_DMA 0 /* DMA in progress */ 231#define IVTV_F_I_DMA 0 /* DMA in progress */
401#define IVTV_F_I_UDMA 1 /* UDMA in progress */ 232#define IVTV_F_I_UDMA 1 /* UDMA in progress */
402#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */ 233#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
403#define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */ 234#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
404#define IVTV_F_I_EOS 4 /* End of encoder stream reached */ 235#define IVTV_F_I_EOS 4 /* end of encoder stream reached */
405#define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */ 236#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
406#define IVTV_F_I_DIG_RST 6 /* Reset digitizer */ 237#define IVTV_F_I_DIG_RST 6 /* reset digitizer */
407#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */ 238#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
408#define IVTV_F_I_ENC_VBI 8 /* VBI DMA */
409#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */ 239#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
410#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */ 240#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
411#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */ 241#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
412#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */ 242#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
413#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */ 243#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
414#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */ 244#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
415#define IVTV_F_I_HAVE_WORK 15 /* Used in the interrupt handler: there is work to be done */ 245#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
416#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */ 246#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
417#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */ 247#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
418#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */ 248#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
419#define IVTV_F_I_PIO 19 /* PIO in progress */ 249#define IVTV_F_I_PIO 19 /* PIO in progress */
420#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */ 250#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
251#define IVTV_F_I_INITED 21 /* set after first open */
252#define IVTV_F_I_FAILED 22 /* set if first open failed */
421 253
422/* Event notifications */ 254/* Event notifications */
423#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */ 255#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
@@ -426,7 +258,7 @@ struct ivtv_mailbox_data {
426#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */ 258#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
427 259
428/* Scatter-Gather array element, used in DMA transfers */ 260/* Scatter-Gather array element, used in DMA transfers */
429struct ivtv_SG_element { 261struct ivtv_sg_element {
430 u32 src; 262 u32 src;
431 u32 dst; 263 u32 dst;
432 u32 size; 264 u32 size;
@@ -436,9 +268,11 @@ struct ivtv_user_dma {
436 struct mutex lock; 268 struct mutex lock;
437 int page_count; 269 int page_count;
438 struct page *map[IVTV_DMA_SG_OSD_ENT]; 270 struct page *map[IVTV_DMA_SG_OSD_ENT];
271 /* Needed when dealing with highmem userspace buffers */
272 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
439 273
440 /* Base Dev SG Array for cx23415/6 */ 274 /* Base Dev SG Array for cx23415/6 */
441 struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT]; 275 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
442 dma_addr_t SG_handle; 276 dma_addr_t SG_handle;
443 int SG_length; 277 int SG_length;
444 278
@@ -458,21 +292,21 @@ struct ivtv_dma_page_info {
458struct ivtv_buffer { 292struct ivtv_buffer {
459 struct list_head list; 293 struct list_head list;
460 dma_addr_t dma_handle; 294 dma_addr_t dma_handle;
461 unsigned long b_flags; 295 unsigned short b_flags;
296 unsigned short dma_xfer_cnt;
462 char *buf; 297 char *buf;
463
464 u32 bytesused; 298 u32 bytesused;
465 u32 readpos; 299 u32 readpos;
466}; 300};
467 301
468struct ivtv_queue { 302struct ivtv_queue {
469 struct list_head list; 303 struct list_head list; /* the list of buffers in this queue */
470 u32 buffers; 304 u32 buffers; /* number of buffers in this queue */
471 u32 length; 305 u32 length; /* total number of bytes of available buffer space */
472 u32 bytesused; 306 u32 bytesused; /* total number of bytes used in this queue */
473}; 307};
474 308
475struct ivtv; /* forward reference */ 309struct ivtv; /* forward reference */
476 310
477struct ivtv_stream { 311struct ivtv_stream {
478 /* These first four fields are always set, even if the stream 312 /* These first four fields are always set, even if the stream
@@ -483,11 +317,13 @@ struct ivtv_stream {
483 int type; /* stream type */ 317 int type; /* stream type */
484 318
485 u32 id; 319 u32 id;
486 spinlock_t qlock; /* locks access to the queues */ 320 spinlock_t qlock; /* locks access to the queues */
487 unsigned long s_flags; /* status flags, see above */ 321 unsigned long s_flags; /* status flags, see above */
488 int dma; /* can be PCI_DMA_TODEVICE, 322 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
489 PCI_DMA_FROMDEVICE or 323 u32 pending_offset;
490 PCI_DMA_NONE */ 324 u32 pending_backup;
325 u64 pending_pts;
326
491 u32 dma_offset; 327 u32 dma_offset;
492 u32 dma_backup; 328 u32 dma_backup;
493 u64 dma_pts; 329 u64 dma_pts;
@@ -508,47 +344,53 @@ struct ivtv_stream {
508 struct ivtv_queue q_dma; /* waiting for DMA */ 344 struct ivtv_queue q_dma; /* waiting for DMA */
509 struct ivtv_queue q_predma; /* waiting for DMA */ 345 struct ivtv_queue q_predma; /* waiting for DMA */
510 346
347 /* DMA xfer counter, buffers belonging to the same DMA
348 xfer will have the same dma_xfer_cnt. */
349 u16 dma_xfer_cnt;
350
511 /* Base Dev SG Array for cx23415/6 */ 351 /* Base Dev SG Array for cx23415/6 */
512 struct ivtv_SG_element *SGarray; 352 struct ivtv_sg_element *sg_pending;
513 struct ivtv_SG_element *PIOarray; 353 struct ivtv_sg_element *sg_processing;
514 dma_addr_t SG_handle; 354 struct ivtv_sg_element *sg_dma;
515 int SG_length; 355 dma_addr_t sg_handle;
356 int sg_pending_size;
357 int sg_processing_size;
358 int sg_processed;
516 359
517 /* SG List of Buffers */ 360 /* SG List of Buffers */
518 struct scatterlist *SGlist; 361 struct scatterlist *SGlist;
519}; 362};
520 363
521struct ivtv_open_id { 364struct ivtv_open_id {
522 u32 open_id; 365 u32 open_id; /* unique ID for this file descriptor */
523 int type; 366 int type; /* stream type */
524 enum v4l2_priority prio; 367 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
368 enum v4l2_priority prio; /* priority */
525 struct ivtv *itv; 369 struct ivtv *itv;
526}; 370};
527 371
528#define IVTV_YUV_UPDATE_HORIZONTAL 0x01
529#define IVTV_YUV_UPDATE_VERTICAL 0x02
530
531struct yuv_frame_info 372struct yuv_frame_info
532{ 373{
533 u32 update; 374 u32 update;
534 int src_x; 375 s32 src_x;
535 int src_y; 376 s32 src_y;
536 unsigned int src_w; 377 u32 src_w;
537 unsigned int src_h; 378 u32 src_h;
538 int dst_x; 379 s32 dst_x;
539 int dst_y; 380 s32 dst_y;
540 unsigned int dst_w; 381 u32 dst_w;
541 unsigned int dst_h; 382 u32 dst_h;
542 int pan_x; 383 s32 pan_x;
543 int pan_y; 384 s32 pan_y;
544 u32 vis_w; 385 u32 vis_w;
545 u32 vis_h; 386 u32 vis_h;
546 u32 interlaced_y; 387 u32 interlaced_y;
547 u32 interlaced_uv; 388 u32 interlaced_uv;
548 int tru_x; 389 s32 tru_x;
549 u32 tru_w; 390 u32 tru_w;
550 u32 tru_h; 391 u32 tru_h;
551 u32 offset_y; 392 u32 offset_y;
393 s32 lace_mode;
552}; 394};
553 395
554#define IVTV_YUV_MODE_INTERLACED 0x00 396#define IVTV_YUV_MODE_INTERLACED 0x00
@@ -621,7 +463,6 @@ struct yuv_playback_info
621 int decode_height; 463 int decode_height;
622 464
623 int frame_interlaced; 465 int frame_interlaced;
624 int frame_interlaced_last;
625 466
626 int lace_mode; 467 int lace_mode;
627 int lace_threshold; 468 int lace_threshold;
@@ -632,6 +473,11 @@ struct yuv_playback_info
632 473
633 u32 yuv_forced_update; 474 u32 yuv_forced_update;
634 int update_frame; 475 int update_frame;
476
477 int sync_field[4]; /* Field to sync on */
478 int field_delay[4]; /* Flag to extend duration of previous frame */
479 u8 fields_lapsed; /* Counter used when delaying a frame */
480
635 struct yuv_frame_info new_frame_info[4]; 481 struct yuv_frame_info new_frame_info[4];
636 struct yuv_frame_info old_frame_info; 482 struct yuv_frame_info old_frame_info;
637 struct yuv_frame_info old_frame_info_args; 483 struct yuv_frame_info old_frame_info_args;
@@ -643,37 +489,61 @@ struct yuv_playback_info
643#define IVTV_VBI_FRAMES 32 489#define IVTV_VBI_FRAMES 32
644 490
645/* VBI data */ 491/* VBI data */
492struct vbi_cc {
493 u8 odd[2]; /* two-byte payload of odd field */
494 u8 even[2]; /* two-byte payload of even field */;
495};
496
497struct vbi_vps {
498 u8 data[5]; /* five-byte VPS payload */
499};
500
646struct vbi_info { 501struct vbi_info {
647 u32 dec_start; 502 /* VBI general data, does not change during streaming */
648 u32 enc_start, enc_size; 503
649 int fpi; 504 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
650 u32 frame; 505 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
651 u32 dma_offset; 506 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
652 u8 cc_data_odd[256]; 507 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
653 u8 cc_data_even[256]; 508 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
654 int cc_pos; 509 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
655 u8 cc_no_update; 510
656 u8 vps[5]; 511 u32 start[2]; /* start of first VBI line in the odd/even fields */
657 u8 vps_found; 512 u32 count; /* number of VBI lines per field */
658 int wss; 513 u32 raw_size; /* size of raw VBI line from the digitizer */
659 u8 wss_found; 514 u32 sliced_size; /* size of sliced VBI line from the digitizer */
660 u8 wss_no_update; 515
661 u32 raw_decoder_line_size; 516 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
662 u8 raw_decoder_sav_odd_field; 517 u32 enc_start; /* start in encoder memory of VBI capture buffers */
663 u8 raw_decoder_sav_even_field; 518 u32 enc_size; /* size of VBI capture area */
664 u32 sliced_decoder_line_size; 519 int fpi; /* number of VBI frames per interrupt */
665 u8 sliced_decoder_sav_odd_field; 520
666 u8 sliced_decoder_sav_even_field; 521 struct v4l2_format in; /* current VBI capture format */
667 struct v4l2_format in; 522 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
668 /* convenience pointer to sliced struct in vbi_in union */ 523 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
669 struct v4l2_sliced_vbi_format *sliced_in; 524
670 u32 service_set_in; 525 /* Raw VBI compatibility hack */
671 int insert_mpeg; 526
672 527 u32 frame; /* frame counter hack needed for backwards compatibility
673 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines. 528 of old VBI software */
674 One for /dev/vbi0 and one for /dev/vbi8 */ 529
675 struct v4l2_sliced_vbi_data sliced_data[36]; 530 /* Sliced VBI output data */
676 struct v4l2_sliced_vbi_data sliced_dec_data[36]; 531
532 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
533 prevent dropping CC data if they couldn't be
534 processed fast enough */
535 int cc_payload_idx; /* index in cc_payload */
536 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
537 int wss_payload; /* sliced VBI WSS payload */
538 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
539 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
540
541 /* Sliced VBI capture data */
542
543 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
544 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
545
546 /* VBI Embedding data */
677 547
678 /* Buffer for VBI data inserted into MPEG stream. 548 /* Buffer for VBI data inserted into MPEG stream.
679 The first byte is a dummy byte that's never used. 549 The first byte is a dummy byte that's never used.
@@ -690,12 +560,9 @@ struct vbi_info {
690 This pointer array will allocate 2049 bytes to store each VBI frame. */ 560 This pointer array will allocate 2049 bytes to store each VBI frame. */
691 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES]; 561 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
692 u32 sliced_mpeg_size[IVTV_VBI_FRAMES]; 562 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
693 struct ivtv_buffer sliced_mpeg_buf; 563 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
694 u32 inserted_frame; 564 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
695 565 to be inserted in the MPEG stream */
696 u32 start[2], count;
697 u32 raw_size;
698 u32 sliced_size;
699}; 566};
700 567
701/* forward declaration of struct defined in ivtv-cards.h */ 568/* forward declaration of struct defined in ivtv-cards.h */
@@ -703,131 +570,132 @@ struct ivtv_card;
703 570
704/* Struct to hold info about ivtv cards */ 571/* Struct to hold info about ivtv cards */
705struct ivtv { 572struct ivtv {
706 int num; /* board number, -1 during init! */ 573 /* General fixed card data */
707 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */ 574 int num; /* board number, -1 during init! */
708 struct pci_dev *dev; /* PCI device */ 575 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
576 struct pci_dev *dev; /* PCI device */
709 const struct ivtv_card *card; /* card information */ 577 const struct ivtv_card *card; /* card information */
710 const char *card_name; /* full name of the card */ 578 const char *card_name; /* full name of the card */
711 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */ 579 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
712 u8 is_50hz; 580 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
713 u8 is_60hz; 581 u8 nof_inputs; /* number of video inputs */
714 u8 is_out_50hz; 582 u8 nof_audio_inputs; /* number of audio inputs */
715 u8 is_out_60hz; 583 u32 v4l2_cap; /* V4L2 capabilities of card */
716 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */ 584 u32 hw_flags; /* hardware description of the board */
717 u8 nof_inputs; /* number of video inputs */ 585 int tunerid; /* userspace tuner ID for experimental Xceive tuner support */
718 u8 nof_audio_inputs; /* number of audio inputs */ 586 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
719 u32 v4l2_cap; /* V4L2 capabilities of card */ 587 /* controlling video decoder function */
720 u32 hw_flags; /* Hardware description of the board */
721
722 /* controlling Video decoder function */
723 int (*video_dec_func)(struct ivtv *, unsigned int, void *); 588 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
589 u32 base_addr; /* PCI resource base address */
590 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
591 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
592 volatile void __iomem *reg_mem; /* pointer to mapped registers */
593 struct ivtv_options options; /* user options */
594
595
596 /* High-level state info */
597 unsigned long i_flags; /* global ivtv flags */
598 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
599 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
600 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
601 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
602 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
603 u32 audio_input; /* current audio input */
604 u32 active_input; /* current video input */
605 u32 active_output; /* current video output */
606 v4l2_std_id std; /* current capture TV standard */
607 v4l2_std_id std_out; /* current TV output standard */
608 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
609 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
610 struct cx2341x_mpeg_params params; /* current encoder parameters */
611
612
613 /* Locking */
614 spinlock_t lock; /* lock access to this struct */
615 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
616
617
618 /* Streams */
619 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
620 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
621 atomic_t capturing; /* count number of active capture streams */
622 atomic_t decoding; /* count number of active decoding streams */
623
624
625 /* Interrupts & DMA */
626 u32 irqmask; /* active interrupts */
627 u32 irq_rr_idx; /* round-robin stream index */
628 struct workqueue_struct *irq_work_queues; /* workqueue for PIO/YUV/VBI actions */
629 struct work_struct irq_work_queue; /* work entry */
630 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
631 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
632 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
633 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
634 u32 dma_data_req_size; /* store size of current DMA request */
635 int dma_retries; /* current DMA retry attempt */
636 struct ivtv_user_dma udma; /* user based DMA for OSD */
637 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
638 u32 last_vsync_field; /* last seen vsync field */
639 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
640 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
641 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
642 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
643
644
645 /* Mailbox */
646 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
647 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
648 struct ivtv_api_cache api_cache[256]; /* cached API commands */
649
650
651 /* I2C */
652 struct i2c_adapter i2c_adap;
653 struct i2c_algo_bit_data i2c_algo;
654 struct i2c_client i2c_client;
655 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];/* pointers to all I2C clients */
656 int i2c_state; /* i2c bit state */
657 struct mutex i2c_bus_lock; /* lock i2c bus */
658
659
660 /* Program Index information */
661 u32 pgm_info_offset; /* start of pgm info in encoder memory */
662 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
663 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
664 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
665 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
666
667
668 /* Miscellaneous */
669 u32 open_id; /* incremented each time an open occurs, is >= 1 */
670 struct v4l2_prio_state prio; /* priority state */
671 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
672 int speed; /* current playback speed setting */
673 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
674 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
675 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
676 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
677 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
678 u16 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
679
680
681 /* VBI state info */
682 struct vbi_info vbi; /* VBI-specific data */
683
684
685 /* YUV playback */
686 struct yuv_playback_info yuv_info; /* YUV playback data */
724 687
725 struct ivtv_options options; /* User options */
726 int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
727 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */
728 int speed;
729 u8 speed_mute_audio;
730 unsigned long i_flags; /* global ivtv flags */
731 atomic_t capturing; /* count number of active capture streams */
732 atomic_t decoding; /* count number of active decoding streams */
733 u32 irq_rr_idx; /* Round-robin stream index */
734 int cur_dma_stream; /* index of stream doing DMA */
735 int cur_pio_stream; /* index of stream doing PIO */
736 u32 dma_data_req_offset;
737 u32 dma_data_req_size;
738 int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */
739 spinlock_t lock; /* lock access to this struct */
740 int search_pack_header;
741
742 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
743 struct mutex serialize_lock; /* lock used to serialize starting streams */
744
745 /* User based DMA for OSD */
746 struct ivtv_user_dma udma;
747
748 int open_id; /* incremented each time an open occurs, used as unique ID.
749 starts at 1, so 0 can be used as uninitialized value
750 in the stream->id. */
751
752 u32 base_addr;
753 u32 irqmask;
754
755 struct v4l2_prio_state prio;
756 struct workqueue_struct *irq_work_queues;
757 struct work_struct irq_work_queue;
758 struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
759
760 struct vbi_info vbi;
761
762 struct ivtv_mailbox_data enc_mbox;
763 struct ivtv_mailbox_data dec_mbox;
764 struct ivtv_api_cache api_cache[256]; /* Cached API Commands */
765
766 u8 card_rev;
767 volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
768
769 u32 pgm_info_offset;
770 u32 pgm_info_num;
771 u32 pgm_info_write_idx;
772 u32 pgm_info_read_idx;
773 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
774
775 u64 mpg_data_received;
776 u64 vbi_data_inserted;
777
778 wait_queue_head_t cap_w;
779 /* when the next decoder event arrives this queue is woken up */
780 wait_queue_head_t event_waitq;
781 /* when the next decoder vsync arrives this queue is woken up */
782 wait_queue_head_t vsync_waitq;
783 /* when the current DMA is finished this queue is woken up */
784 wait_queue_head_t dma_waitq;
785 688
786 /* OSD support */ 689 /* OSD support */
787 unsigned long osd_video_pbase; 690 unsigned long osd_video_pbase;
788 int osd_global_alpha_state; /* 0=off : 1=on */ 691 int osd_global_alpha_state; /* 1 = global alpha is on */
789 int osd_local_alpha_state; /* 0=off : 1=on */ 692 int osd_local_alpha_state; /* 1 = local alpha is on */
790 int osd_color_key_state; /* 0=off : 1=on */ 693 int osd_chroma_key_state; /* 1 = chroma-keying is on */
791 u8 osd_global_alpha; /* Current global alpha */ 694 u8 osd_global_alpha; /* current global alpha */
792 u32 osd_color_key; /* Current color key */ 695 u32 osd_chroma_key; /* current chroma key */
793 u32 osd_pixelformat; /* Current pixel format */ 696 struct v4l2_rect osd_rect; /* current OSD position and size */
794 struct v4l2_rect osd_rect; /* Current OSD position and size */ 697 struct v4l2_rect main_rect; /* current Main window position and size */
795 struct v4l2_rect main_rect; /* Current Main window position and size */ 698 struct osd_info *osd_info; /* ivtvfb private OSD info */
796
797 u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */
798
799 /* i2c */
800 struct i2c_adapter i2c_adap;
801 struct i2c_algo_bit_data i2c_algo;
802 struct i2c_client i2c_client;
803 struct mutex i2c_bus_lock;
804 int i2c_state;
805 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
806
807 /* v4l2 and User settings */
808
809 /* codec settings */
810 struct cx2341x_mpeg_params params;
811 u32 audio_input;
812 u32 active_input;
813 u32 active_output;
814 v4l2_std_id std;
815 v4l2_std_id std_out;
816 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
817 u8 audio_stereo_mode;
818 u8 audio_bilingual_mode;
819
820 /* dualwatch */
821 unsigned long dualwatch_jiffies;
822 u16 dualwatch_stereo_mode;
823
824 /* Digitizer type */
825 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
826
827 u32 lastVsyncFrame;
828
829 struct yuv_playback_info yuv_info;
830 struct osd_info *osd_info;
831}; 699};
832 700
833/* Globals */ 701/* Globals */
@@ -858,6 +726,9 @@ int ivtv_waitq(wait_queue_head_t *waitq);
858struct tveeprom; /* forward reference */ 726struct tveeprom; /* forward reference */
859void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv); 727void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
860 728
729/* First-open initialization: load firmware, init cx25840, etc. */
730int ivtv_init_on_first_open(struct ivtv *itv);
731
861/* This is a PCI post thing, where if the pci register is not read, then 732/* This is a PCI post thing, where if the pci register is not read, then
862 the write doesn't always take effect right away. By reading back the 733 the write doesn't always take effect right away. By reading back the
863 register any pending PCI writes will be performed (in order), and so 734 register any pending PCI writes will be performed (in order), and so
@@ -885,4 +756,4 @@ void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
885#define write_dec_sync(val, addr) \ 756#define write_dec_sync(val, addr) \
886 do { write_dec(val, addr); read_dec(addr); } while (0) 757 do { write_dec(val, addr); read_dec(addr); } while (0)
887 758
888#endif /* IVTV_DRIVER_H */ 759#endif
diff --git a/drivers/media/video/ivtv/ivtv-fileops.c b/drivers/media/video/ivtv/ivtv-fileops.c
index 66ea3cbc369c..da50fa4a72a5 100644
--- a/drivers/media/video/ivtv/ivtv-fileops.c
+++ b/drivers/media/video/ivtv/ivtv-fileops.c
@@ -27,10 +27,9 @@
27#include "ivtv-irq.h" 27#include "ivtv-irq.h"
28#include "ivtv-vbi.h" 28#include "ivtv-vbi.h"
29#include "ivtv-mailbox.h" 29#include "ivtv-mailbox.h"
30#include "ivtv-audio.h" 30#include "ivtv-routing.h"
31#include "ivtv-streams.h" 31#include "ivtv-streams.h"
32#include "ivtv-yuv.h" 32#include "ivtv-yuv.h"
33#include "ivtv-controls.h"
34#include "ivtv-ioctl.h" 33#include "ivtv-ioctl.h"
35#include "ivtv-cards.h" 34#include "ivtv-cards.h"
36#include <media/saa7115.h> 35#include <media/saa7115.h>
@@ -247,8 +246,9 @@ static struct ivtv_buffer *ivtv_get_buffer(struct ivtv_stream *s, int non_block,
247 /* do we have new data? */ 246 /* do we have new data? */
248 buf = ivtv_dequeue(s, &s->q_full); 247 buf = ivtv_dequeue(s, &s->q_full);
249 if (buf) { 248 if (buf) {
250 if (!test_and_clear_bit(IVTV_F_B_NEED_BUF_SWAP, &buf->b_flags)) 249 if ((buf->b_flags & IVTV_F_B_NEED_BUF_SWAP) == 0)
251 return buf; 250 return buf;
251 buf->b_flags &= ~IVTV_F_B_NEED_BUF_SWAP;
252 if (s->type == IVTV_ENC_STREAM_TYPE_MPG) 252 if (s->type == IVTV_ENC_STREAM_TYPE_MPG)
253 /* byteswap MPG data */ 253 /* byteswap MPG data */
254 ivtv_buf_swap(buf); 254 ivtv_buf_swap(buf);
@@ -258,19 +258,19 @@ static struct ivtv_buffer *ivtv_get_buffer(struct ivtv_stream *s, int non_block,
258 } 258 }
259 return buf; 259 return buf;
260 } 260 }
261 /* return if file was opened with O_NONBLOCK */
262 if (non_block) {
263 *err = -EAGAIN;
264 return NULL;
265 }
266 261
267 /* return if end of stream */ 262 /* return if end of stream */
268 if (s->type != IVTV_DEC_STREAM_TYPE_VBI && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) { 263 if (s->type != IVTV_DEC_STREAM_TYPE_VBI && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) {
269 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
270 IVTV_DEBUG_INFO("EOS %s\n", s->name); 264 IVTV_DEBUG_INFO("EOS %s\n", s->name);
271 return NULL; 265 return NULL;
272 } 266 }
273 267
268 /* return if file was opened with O_NONBLOCK */
269 if (non_block) {
270 *err = -EAGAIN;
271 return NULL;
272 }
273
274 /* wait for more data to arrive */ 274 /* wait for more data to arrive */
275 prepare_to_wait(&s->waitq, &wait, TASK_INTERRUPTIBLE); 275 prepare_to_wait(&s->waitq, &wait, TASK_INTERRUPTIBLE);
276 /* New buffers might have become available before we were added to the waitqueue */ 276 /* New buffers might have become available before we were added to the waitqueue */
@@ -378,10 +378,20 @@ static ssize_t ivtv_read(struct ivtv_stream *s, char __user *ubuf, size_t tot_co
378 int rc; 378 int rc;
379 379
380 buf = ivtv_get_buffer(s, non_block, &rc); 380 buf = ivtv_get_buffer(s, non_block, &rc);
381 if (buf == NULL && rc == -EAGAIN && tot_written) 381 /* if there is no data available... */
382 break; 382 if (buf == NULL) {
383 if (buf == NULL) 383 /* if we got data, then return that regardless */
384 if (tot_written)
385 break;
386 /* EOS condition */
387 if (rc == 0) {
388 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
389 clear_bit(IVTV_F_S_APPL_IO, &s->s_flags);
390 ivtv_release_stream(s);
391 }
392 /* set errno */
384 return rc; 393 return rc;
394 }
385 rc = ivtv_copy_buf_to_user(s, buf, ubuf + tot_written, tot_count - tot_written); 395 rc = ivtv_copy_buf_to_user(s, buf, ubuf + tot_written, tot_count - tot_written);
386 if (buf != &itv->vbi.sliced_mpeg_buf) { 396 if (buf != &itv->vbi.sliced_mpeg_buf) {
387 ivtv_enqueue(s, buf, (buf->readpos == buf->bytesused) ? &s->q_free : &s->q_io); 397 ivtv_enqueue(s, buf, (buf->readpos == buf->bytesused) ? &s->q_free : &s->q_io);
@@ -408,7 +418,7 @@ static ssize_t ivtv_read_pos(struct ivtv_stream *s, char __user *ubuf, size_t co
408 ssize_t rc = count ? ivtv_read(s, ubuf, count, non_block) : 0; 418 ssize_t rc = count ? ivtv_read(s, ubuf, count, non_block) : 0;
409 struct ivtv *itv = s->itv; 419 struct ivtv *itv = s->itv;
410 420
411 IVTV_DEBUG_HI_INFO("read %zd from %s, got %zd\n", count, s->name, rc); 421 IVTV_DEBUG_HI_FILE("read %zd from %s, got %zd\n", count, s->name, rc);
412 if (rc > 0) 422 if (rc > 0)
413 pos += rc; 423 pos += rc;
414 return rc; 424 return rc;
@@ -499,9 +509,11 @@ ssize_t ivtv_v4l2_read(struct file * filp, char __user *buf, size_t count, loff_
499 struct ivtv_stream *s = &itv->streams[id->type]; 509 struct ivtv_stream *s = &itv->streams[id->type];
500 int rc; 510 int rc;
501 511
502 IVTV_DEBUG_HI_IOCTL("read %zd bytes from %s\n", count, s->name); 512 IVTV_DEBUG_HI_FILE("read %zd bytes from %s\n", count, s->name);
503 513
514 mutex_lock(&itv->serialize_lock);
504 rc = ivtv_start_capture(id); 515 rc = ivtv_start_capture(id);
516 mutex_unlock(&itv->serialize_lock);
505 if (rc) 517 if (rc)
506 return rc; 518 return rc;
507 return ivtv_read_pos(s, buf, count, pos, filp->f_flags & O_NONBLOCK); 519 return ivtv_read_pos(s, buf, count, pos, filp->f_flags & O_NONBLOCK);
@@ -537,7 +549,7 @@ ssize_t ivtv_v4l2_write(struct file *filp, const char __user *user_buf, size_t c
537 int rc; 549 int rc;
538 DEFINE_WAIT(wait); 550 DEFINE_WAIT(wait);
539 551
540 IVTV_DEBUG_HI_IOCTL("write %zd bytes to %s\n", count, s->name); 552 IVTV_DEBUG_HI_FILE("write %zd bytes to %s\n", count, s->name);
541 553
542 if (s->type != IVTV_DEC_STREAM_TYPE_MPG && 554 if (s->type != IVTV_DEC_STREAM_TYPE_MPG &&
543 s->type != IVTV_DEC_STREAM_TYPE_YUV && 555 s->type != IVTV_DEC_STREAM_TYPE_YUV &&
@@ -551,8 +563,11 @@ ssize_t ivtv_v4l2_write(struct file *filp, const char __user *user_buf, size_t c
551 563
552 /* This stream does not need to start any decoding */ 564 /* This stream does not need to start any decoding */
553 if (s->type == IVTV_DEC_STREAM_TYPE_VOUT) { 565 if (s->type == IVTV_DEC_STREAM_TYPE_VOUT) {
566 int elems = count / sizeof(struct v4l2_sliced_vbi_data);
567
554 set_bit(IVTV_F_S_APPL_IO, &s->s_flags); 568 set_bit(IVTV_F_S_APPL_IO, &s->s_flags);
555 return ivtv_write_vbi(itv, user_buf, count); 569 ivtv_write_vbi(itv, (const struct v4l2_sliced_vbi_data *)user_buf, elems);
570 return elems * sizeof(struct v4l2_sliced_vbi_data);
556 } 571 }
557 572
558 mode = s->type == IVTV_DEC_STREAM_TYPE_MPG ? OUT_MPG : OUT_YUV; 573 mode = s->type == IVTV_DEC_STREAM_TYPE_MPG ? OUT_MPG : OUT_YUV;
@@ -612,7 +627,9 @@ retry:
612 } 627 }
613 628
614 /* Start decoder (returns 0 if already started) */ 629 /* Start decoder (returns 0 if already started) */
630 mutex_lock(&itv->serialize_lock);
615 rc = ivtv_start_decoding(id, itv->speed); 631 rc = ivtv_start_decoding(id, itv->speed);
632 mutex_unlock(&itv->serialize_lock);
616 if (rc) { 633 if (rc) {
617 IVTV_DEBUG_WARN("Failed start decode stream %s\n", s->name); 634 IVTV_DEBUG_WARN("Failed start decode stream %s\n", s->name);
618 635
@@ -645,7 +662,7 @@ retry:
645 to transfer the rest. */ 662 to transfer the rest. */
646 if (count && !(filp->f_flags & O_NONBLOCK)) 663 if (count && !(filp->f_flags & O_NONBLOCK))
647 goto retry; 664 goto retry;
648 IVTV_DEBUG_HI_INFO("Wrote %d bytes to %s (%d)\n", bytes_written, s->name, s->q_full.bytesused); 665 IVTV_DEBUG_HI_FILE("Wrote %d bytes to %s (%d)\n", bytes_written, s->name, s->q_full.bytesused);
649 return bytes_written; 666 return bytes_written;
650} 667}
651 668
@@ -657,6 +674,7 @@ unsigned int ivtv_v4l2_dec_poll(struct file *filp, poll_table *wait)
657 int res = 0; 674 int res = 0;
658 675
659 /* add stream's waitq to the poll list */ 676 /* add stream's waitq to the poll list */
677 IVTV_DEBUG_HI_FILE("Decoder poll\n");
660 poll_wait(filp, &s->waitq, wait); 678 poll_wait(filp, &s->waitq, wait);
661 679
662 set_bit(IVTV_F_I_EV_VSYNC_ENABLED, &itv->i_flags); 680 set_bit(IVTV_F_I_EV_VSYNC_ENABLED, &itv->i_flags);
@@ -679,16 +697,21 @@ unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table * wait)
679 697
680 /* Start a capture if there is none */ 698 /* Start a capture if there is none */
681 if (!eof && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) { 699 if (!eof && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) {
682 int rc = ivtv_start_capture(id); 700 int rc;
683 701
702 mutex_lock(&itv->serialize_lock);
703 rc = ivtv_start_capture(id);
704 mutex_unlock(&itv->serialize_lock);
684 if (rc) { 705 if (rc) {
685 IVTV_DEBUG_INFO("Could not start capture for %s (%d)\n", 706 IVTV_DEBUG_INFO("Could not start capture for %s (%d)\n",
686 s->name, rc); 707 s->name, rc);
687 return POLLERR; 708 return POLLERR;
688 } 709 }
710 IVTV_DEBUG_FILE("Encoder poll started capture\n");
689 } 711 }
690 712
691 /* add stream's waitq to the poll list */ 713 /* add stream's waitq to the poll list */
714 IVTV_DEBUG_HI_FILE("Encoder poll\n");
692 poll_wait(filp, &s->waitq, wait); 715 poll_wait(filp, &s->waitq, wait);
693 716
694 if (eof || s->q_full.length) 717 if (eof || s->q_full.length)
@@ -701,7 +724,7 @@ void ivtv_stop_capture(struct ivtv_open_id *id, int gop_end)
701 struct ivtv *itv = id->itv; 724 struct ivtv *itv = id->itv;
702 struct ivtv_stream *s = &itv->streams[id->type]; 725 struct ivtv_stream *s = &itv->streams[id->type];
703 726
704 IVTV_DEBUG_IOCTL("close() of %s\n", s->name); 727 IVTV_DEBUG_FILE("close() of %s\n", s->name);
705 728
706 /* 'Unclaim' this stream */ 729 /* 'Unclaim' this stream */
707 730
@@ -728,10 +751,11 @@ void ivtv_stop_capture(struct ivtv_open_id *id, int gop_end)
728 ivtv_stop_v4l2_encode_stream(s, gop_end); 751 ivtv_stop_v4l2_encode_stream(s, gop_end);
729 } 752 }
730 } 753 }
731 clear_bit(IVTV_F_S_APPL_IO, &s->s_flags); 754 if (!gop_end) {
732 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags); 755 clear_bit(IVTV_F_S_APPL_IO, &s->s_flags);
733 756 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
734 ivtv_release_stream(s); 757 ivtv_release_stream(s);
758 }
735} 759}
736 760
737static void ivtv_stop_decoding(struct ivtv_open_id *id, int flags, u64 pts) 761static void ivtv_stop_decoding(struct ivtv_open_id *id, int flags, u64 pts)
@@ -739,13 +763,14 @@ static void ivtv_stop_decoding(struct ivtv_open_id *id, int flags, u64 pts)
739 struct ivtv *itv = id->itv; 763 struct ivtv *itv = id->itv;
740 struct ivtv_stream *s = &itv->streams[id->type]; 764 struct ivtv_stream *s = &itv->streams[id->type];
741 765
742 IVTV_DEBUG_IOCTL("close() of %s\n", s->name); 766 IVTV_DEBUG_FILE("close() of %s\n", s->name);
743 767
744 /* Stop decoding */ 768 /* Stop decoding */
745 if (test_bit(IVTV_F_S_STREAMING, &s->s_flags)) { 769 if (test_bit(IVTV_F_S_STREAMING, &s->s_flags)) {
746 IVTV_DEBUG_INFO("close stopping decode\n"); 770 IVTV_DEBUG_INFO("close stopping decode\n");
747 771
748 ivtv_stop_v4l2_decode_stream(s, flags, pts); 772 ivtv_stop_v4l2_decode_stream(s, flags, pts);
773 itv->output_mode = OUT_NONE;
749 } 774 }
750 clear_bit(IVTV_F_S_APPL_IO, &s->s_flags); 775 clear_bit(IVTV_F_S_APPL_IO, &s->s_flags);
751 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags); 776 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
@@ -753,11 +778,7 @@ static void ivtv_stop_decoding(struct ivtv_open_id *id, int flags, u64 pts)
753 /* Restore registers we've changed & clean up any mess we've made */ 778 /* Restore registers we've changed & clean up any mess we've made */
754 ivtv_yuv_close(itv); 779 ivtv_yuv_close(itv);
755 } 780 }
756 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && itv->output_mode == OUT_YUV) 781 if (itv->output_mode == OUT_UDMA_YUV && id->yuv_frames)
757 itv->output_mode = OUT_NONE;
758 else if (s->type == IVTV_DEC_STREAM_TYPE_YUV && itv->output_mode == OUT_UDMA_YUV)
759 itv->output_mode = OUT_NONE;
760 else if (s->type == IVTV_DEC_STREAM_TYPE_MPG && itv->output_mode == OUT_MPG)
761 itv->output_mode = OUT_NONE; 782 itv->output_mode = OUT_NONE;
762 783
763 itv->speed = 0; 784 itv->speed = 0;
@@ -771,7 +792,7 @@ int ivtv_v4l2_close(struct inode *inode, struct file *filp)
771 struct ivtv *itv = id->itv; 792 struct ivtv *itv = id->itv;
772 struct ivtv_stream *s = &itv->streams[id->type]; 793 struct ivtv_stream *s = &itv->streams[id->type];
773 794
774 IVTV_DEBUG_IOCTL("close() of %s\n", s->name); 795 IVTV_DEBUG_FILE("close %s\n", s->name);
775 796
776 v4l2_prio_close(&itv->prio, &id->prio); 797 v4l2_prio_close(&itv->prio, &id->prio);
777 798
@@ -784,6 +805,7 @@ int ivtv_v4l2_close(struct inode *inode, struct file *filp)
784 /* 'Unclaim' this stream */ 805 /* 'Unclaim' this stream */
785 806
786 /* Stop radio */ 807 /* Stop radio */
808 mutex_lock(&itv->serialize_lock);
787 if (id->type == IVTV_ENC_STREAM_TYPE_RAD) { 809 if (id->type == IVTV_ENC_STREAM_TYPE_RAD) {
788 /* Closing radio device, return to TV mode */ 810 /* Closing radio device, return to TV mode */
789 ivtv_mute(itv); 811 ivtv_mute(itv);
@@ -809,56 +831,35 @@ int ivtv_v4l2_close(struct inode *inode, struct file *filp)
809 ivtv_stop_decoding(id, VIDEO_CMD_STOP_TO_BLACK | VIDEO_CMD_STOP_IMMEDIATELY, 0); 831 ivtv_stop_decoding(id, VIDEO_CMD_STOP_TO_BLACK | VIDEO_CMD_STOP_IMMEDIATELY, 0);
810 832
811 /* If all output streams are closed, and if the user doesn't have 833 /* If all output streams are closed, and if the user doesn't have
812 IVTV_DEC_STREAM_TYPE_VOUT open, then disable VBI on TV-out. */ 834 IVTV_DEC_STREAM_TYPE_VOUT open, then disable CC on TV-out. */
813 if (itv->output_mode == OUT_NONE && !test_bit(IVTV_F_S_APPL_IO, &s_vout->s_flags)) { 835 if (itv->output_mode == OUT_NONE && !test_bit(IVTV_F_S_APPL_IO, &s_vout->s_flags)) {
814 /* disable VBI on TV-out */ 836 /* disable CC on TV-out */
815 ivtv_disable_vbi(itv); 837 ivtv_disable_cc(itv);
816 } 838 }
817 } else { 839 } else {
818 ivtv_stop_capture(id, 0); 840 ivtv_stop_capture(id, 0);
819 } 841 }
820 kfree(id); 842 kfree(id);
843 mutex_unlock(&itv->serialize_lock);
821 return 0; 844 return 0;
822} 845}
823 846
824int ivtv_v4l2_open(struct inode *inode, struct file *filp) 847static int ivtv_serialized_open(struct ivtv_stream *s, struct file *filp)
825{ 848{
826 int x, y = 0; 849 struct ivtv *itv = s->itv;
827 struct ivtv_open_id *item; 850 struct ivtv_open_id *item;
828 struct ivtv *itv = NULL;
829 struct ivtv_stream *s = NULL;
830 int minor = iminor(inode);
831
832 /* Find which card this open was on */
833 spin_lock(&ivtv_cards_lock);
834 for (x = 0; itv == NULL && x < ivtv_cards_active; x++) {
835 /* find out which stream this open was on */
836 for (y = 0; y < IVTV_MAX_STREAMS; y++) {
837 s = &ivtv_cards[x]->streams[y];
838 if (s->v4l2dev && s->v4l2dev->minor == minor) {
839 itv = ivtv_cards[x];
840 break;
841 }
842 }
843 }
844 spin_unlock(&ivtv_cards_lock);
845 851
846 if (itv == NULL) { 852 IVTV_DEBUG_FILE("open %s\n", s->name);
847 /* Couldn't find a device registered
848 on that minor, shouldn't happen! */
849 printk(KERN_WARNING "ivtv: No ivtv device found on minor %d\n", minor);
850 return -ENXIO;
851 }
852 853
853 if (y == IVTV_DEC_STREAM_TYPE_MPG && 854 if (s->type == IVTV_DEC_STREAM_TYPE_MPG &&
854 test_bit(IVTV_F_S_CLAIMED, &itv->streams[IVTV_DEC_STREAM_TYPE_YUV].s_flags)) 855 test_bit(IVTV_F_S_CLAIMED, &itv->streams[IVTV_DEC_STREAM_TYPE_YUV].s_flags))
855 return -EBUSY; 856 return -EBUSY;
856 857
857 if (y == IVTV_DEC_STREAM_TYPE_YUV && 858 if (s->type == IVTV_DEC_STREAM_TYPE_YUV &&
858 test_bit(IVTV_F_S_CLAIMED, &itv->streams[IVTV_DEC_STREAM_TYPE_MPG].s_flags)) 859 test_bit(IVTV_F_S_CLAIMED, &itv->streams[IVTV_DEC_STREAM_TYPE_MPG].s_flags))
859 return -EBUSY; 860 return -EBUSY;
860 861
861 if (y == IVTV_DEC_STREAM_TYPE_YUV) { 862 if (s->type == IVTV_DEC_STREAM_TYPE_YUV) {
862 if (read_reg(0x82c) == 0) { 863 if (read_reg(0x82c) == 0) {
863 IVTV_ERR("Tried to open YUV output device but need to send data to mpeg decoder before it can be used\n"); 864 IVTV_ERR("Tried to open YUV output device but need to send data to mpeg decoder before it can be used\n");
864 /* return -ENODEV; */ 865 /* return -ENODEV; */
@@ -873,7 +874,7 @@ int ivtv_v4l2_open(struct inode *inode, struct file *filp)
873 return -ENOMEM; 874 return -ENOMEM;
874 } 875 }
875 item->itv = itv; 876 item->itv = itv;
876 item->type = y; 877 item->type = s->type;
877 v4l2_prio_open(&itv->prio, &item->prio); 878 v4l2_prio_open(&itv->prio, &item->prio);
878 879
879 item->open_id = itv->open_id++; 880 item->open_id = itv->open_id++;
@@ -887,12 +888,20 @@ int ivtv_v4l2_open(struct inode *inode, struct file *filp)
887 return -EBUSY; 888 return -EBUSY;
888 } 889 }
889 890
891 if (!test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags)) {
892 if (atomic_read(&itv->capturing) > 0) {
893 /* switching to radio while capture is
894 in progress is not polite */
895 kfree(item);
896 return -EBUSY;
897 }
898 }
899 /* Mark that the radio is being used. */
900 set_bit(IVTV_F_I_RADIO_USER, &itv->i_flags);
890 /* We have the radio */ 901 /* We have the radio */
891 ivtv_mute(itv); 902 ivtv_mute(itv);
892 /* Switch tuner to radio */ 903 /* Switch tuner to radio */
893 ivtv_call_i2c_clients(itv, AUDC_SET_RADIO, NULL); 904 ivtv_call_i2c_clients(itv, AUDC_SET_RADIO, NULL);
894 /* Mark that the radio is being used. */
895 set_bit(IVTV_F_I_RADIO_USER, &itv->i_flags);
896 /* Select the correct audio input (i.e. radio tuner) */ 905 /* Select the correct audio input (i.e. radio tuner) */
897 ivtv_audio_set_io(itv); 906 ivtv_audio_set_io(itv);
898 if (itv->hw_flags & IVTV_HW_SAA711X) 907 if (itv->hw_flags & IVTV_HW_SAA711X)
@@ -907,45 +916,65 @@ int ivtv_v4l2_open(struct inode *inode, struct file *filp)
907 } 916 }
908 917
909 /* YUV or MPG Decoding Mode? */ 918 /* YUV or MPG Decoding Mode? */
910 if (y == IVTV_DEC_STREAM_TYPE_MPG) 919 if (s->type == IVTV_DEC_STREAM_TYPE_MPG)
911 clear_bit(IVTV_F_I_DEC_YUV, &itv->i_flags); 920 clear_bit(IVTV_F_I_DEC_YUV, &itv->i_flags);
912 else if (y == IVTV_DEC_STREAM_TYPE_YUV) 921 else if (s->type == IVTV_DEC_STREAM_TYPE_YUV)
913 {
914 set_bit(IVTV_F_I_DEC_YUV, &itv->i_flags); 922 set_bit(IVTV_F_I_DEC_YUV, &itv->i_flags);
915 }
916
917 return 0; 923 return 0;
918} 924}
919 925
920void ivtv_mute(struct ivtv *itv) 926int ivtv_v4l2_open(struct inode *inode, struct file *filp)
921{ 927{
922 struct v4l2_control ctrl = { V4L2_CID_AUDIO_MUTE, 1 }; 928 int res, x, y = 0;
929 struct ivtv *itv = NULL;
930 struct ivtv_stream *s = NULL;
931 int minor = iminor(inode);
932
933 /* Find which card this open was on */
934 spin_lock(&ivtv_cards_lock);
935 for (x = 0; itv == NULL && x < ivtv_cards_active; x++) {
936 /* find out which stream this open was on */
937 for (y = 0; y < IVTV_MAX_STREAMS; y++) {
938 s = &ivtv_cards[x]->streams[y];
939 if (s->v4l2dev && s->v4l2dev->minor == minor) {
940 itv = ivtv_cards[x];
941 break;
942 }
943 }
944 }
945 spin_unlock(&ivtv_cards_lock);
946
947 if (itv == NULL) {
948 /* Couldn't find a device registered
949 on that minor, shouldn't happen! */
950 IVTV_WARN("No ivtv device found on minor %d\n", minor);
951 return -ENXIO;
952 }
923 953
924 /* Mute sound to avoid pop */ 954 mutex_lock(&itv->serialize_lock);
925 ivtv_control_ioctls(itv, VIDIOC_S_CTRL, &ctrl); 955 if (ivtv_init_on_first_open(itv)) {
956 IVTV_ERR("Failed to initialize on minor %d\n", minor);
957 mutex_unlock(&itv->serialize_lock);
958 return -ENXIO;
959 }
960 res = ivtv_serialized_open(s, filp);
961 mutex_unlock(&itv->serialize_lock);
962 return res;
963}
926 964
965void ivtv_mute(struct ivtv *itv)
966{
927 if (atomic_read(&itv->capturing)) 967 if (atomic_read(&itv->capturing))
928 ivtv_vapi(itv, CX2341X_ENC_MUTE_AUDIO, 1, 1); 968 ivtv_vapi(itv, CX2341X_ENC_MUTE_AUDIO, 1, 1);
929
930 IVTV_DEBUG_INFO("Mute\n"); 969 IVTV_DEBUG_INFO("Mute\n");
931} 970}
932 971
933void ivtv_unmute(struct ivtv *itv) 972void ivtv_unmute(struct ivtv *itv)
934{ 973{
935 struct v4l2_control ctrl = { V4L2_CID_AUDIO_MUTE, 0 };
936
937 /* initialize or refresh input */
938 if (atomic_read(&itv->capturing) == 0)
939 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0);
940
941 ivtv_msleep_timeout(100, 0);
942
943 if (atomic_read(&itv->capturing)) { 974 if (atomic_read(&itv->capturing)) {
975 ivtv_msleep_timeout(100, 0);
944 ivtv_vapi(itv, CX2341X_ENC_MISC, 1, 12); 976 ivtv_vapi(itv, CX2341X_ENC_MISC, 1, 12);
945 ivtv_vapi(itv, CX2341X_ENC_MUTE_AUDIO, 1, 0); 977 ivtv_vapi(itv, CX2341X_ENC_MUTE_AUDIO, 1, 0);
946 } 978 }
947
948 /* Unmute */
949 ivtv_control_ioctls(itv, VIDIOC_S_CTRL, &ctrl);
950 IVTV_DEBUG_INFO("Unmute\n"); 979 IVTV_DEBUG_INFO("Unmute\n");
951} 980}
diff --git a/drivers/media/video/ivtv/ivtv-fileops.h b/drivers/media/video/ivtv/ivtv-fileops.h
index 74a1745fabbc..2c8d5186c9c3 100644
--- a/drivers/media/video/ivtv/ivtv-fileops.h
+++ b/drivers/media/video/ivtv/ivtv-fileops.h
@@ -18,6 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_FILEOPS_H
22#define IVTV_FILEOPS_H
23
21/* Testing/Debugging */ 24/* Testing/Debugging */
22int ivtv_v4l2_open(struct inode *inode, struct file *filp); 25int ivtv_v4l2_open(struct inode *inode, struct file *filp);
23ssize_t ivtv_v4l2_read(struct file *filp, char __user *buf, size_t count, 26ssize_t ivtv_v4l2_read(struct file *filp, char __user *buf, size_t count,
@@ -42,3 +45,5 @@ int ivtv_claim_stream(struct ivtv_open_id *id, int type);
42 45
43/* Release a previously claimed stream. */ 46/* Release a previously claimed stream. */
44void ivtv_release_stream(struct ivtv_stream *s); 47void ivtv_release_stream(struct ivtv_stream *s);
48
49#endif
diff --git a/drivers/media/video/ivtv/ivtv-firmware.h b/drivers/media/video/ivtv/ivtv-firmware.h
index 8b2ffe658905..041ba94e65bc 100644
--- a/drivers/media/video/ivtv/ivtv-firmware.h
+++ b/drivers/media/video/ivtv/ivtv-firmware.h
@@ -19,7 +19,12 @@
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#ifndef IVTV_FIRMWARE_H
23#define IVTV_FIRMWARE_H
24
22int ivtv_firmware_init(struct ivtv *itv); 25int ivtv_firmware_init(struct ivtv *itv);
23void ivtv_firmware_versions(struct ivtv *itv); 26void ivtv_firmware_versions(struct ivtv *itv);
24void ivtv_halt_firmware(struct ivtv *itv); 27void ivtv_halt_firmware(struct ivtv *itv);
25void ivtv_init_mpeg_decoder(struct ivtv *itv); 28void ivtv_init_mpeg_decoder(struct ivtv *itv);
29
30#endif
diff --git a/drivers/media/video/ivtv/ivtv-gpio.c b/drivers/media/video/ivtv/ivtv-gpio.c
index 6a5a7aa66976..132fb5f71366 100644
--- a/drivers/media/video/ivtv/ivtv-gpio.c
+++ b/drivers/media/video/ivtv/ivtv-gpio.c
@@ -122,30 +122,6 @@ void ivtv_reset_ir_gpio(struct ivtv *itv)
122 write_reg(curdir, IVTV_REG_GPIO_DIR); 122 write_reg(curdir, IVTV_REG_GPIO_DIR);
123} 123}
124 124
125#ifdef HAVE_XC3028
126int ivtv_reset_tuner_gpio(enum v4l2_tuner_type mode, void *priv, int ptr)
127{
128 int curdir, curout;
129 struct ivtv *itv = (struct ivtv *) priv;
130
131 if (itv->card->type != IVTV_CARD_PG600V2 || itv->options.tuner != TUNER_XCEIVE_XC3028)
132 return -EINVAL;
133 IVTV_INFO("Resetting tuner\n");
134 curout = read_reg(IVTV_REG_GPIO_OUT);
135 curdir = read_reg(IVTV_REG_GPIO_DIR);
136 curdir |= (1 << 12); /* GPIO bit 12 */
137
138 curout &= ~(1 << 12);
139 write_reg(curout, IVTV_REG_GPIO_OUT);
140 schedule_timeout_interruptible(msecs_to_jiffies(1));
141
142 curout |= (1 << 12);
143 write_reg(curout, IVTV_REG_GPIO_OUT);
144 schedule_timeout_interruptible(msecs_to_jiffies(1));
145
146 return 0;
147}
148#endif
149 125
150void ivtv_gpio_init(struct ivtv *itv) 126void ivtv_gpio_init(struct ivtv *itv)
151{ 127{
diff --git a/drivers/media/video/ivtv/ivtv-gpio.h b/drivers/media/video/ivtv/ivtv-gpio.h
index c301d2a39346..964a265d91a9 100644
--- a/drivers/media/video/ivtv/ivtv-gpio.h
+++ b/drivers/media/video/ivtv/ivtv-gpio.h
@@ -18,8 +18,13 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_GPIO_H
22#define IVTV_GPIO_H
23
21/* GPIO stuff */ 24/* GPIO stuff */
22void ivtv_gpio_init(struct ivtv *itv); 25void ivtv_gpio_init(struct ivtv *itv);
23void ivtv_reset_ir_gpio(struct ivtv *itv); 26void ivtv_reset_ir_gpio(struct ivtv *itv);
24int ivtv_reset_tuner_gpio(enum v4l2_tuner_type mode, void *priv, int ptr); 27int ivtv_reset_tuner_gpio(void *dev, int cmd, int value);
25int ivtv_gpio(struct ivtv *itv, unsigned int command, void *arg); 28int ivtv_gpio(struct ivtv *itv, unsigned int command, void *arg);
29
30#endif
diff --git a/drivers/media/video/ivtv/ivtv-i2c.c b/drivers/media/video/ivtv/ivtv-i2c.c
index b3557435456d..285fca676a69 100644
--- a/drivers/media/video/ivtv/ivtv-i2c.c
+++ b/drivers/media/video/ivtv/ivtv-i2c.c
@@ -109,6 +109,7 @@ static const u8 hw_driverids[] = {
109 I2C_DRIVERID_UPD64083, 109 I2C_DRIVERID_UPD64083,
110 I2C_DRIVERID_SAA717X, 110 I2C_DRIVERID_SAA717X,
111 I2C_DRIVERID_WM8739, 111 I2C_DRIVERID_WM8739,
112 I2C_DRIVERID_VP27SMPX,
112 0 /* IVTV_HW_GPIO dummy driver ID */ 113 0 /* IVTV_HW_GPIO dummy driver ID */
113}; 114};
114 115
@@ -128,6 +129,7 @@ static const char * const hw_drivernames[] = {
128 "upd64083", 129 "upd64083",
129 "saa717x", 130 "saa717x",
130 "wm8739", 131 "wm8739",
132 "vp27smpx",
131 "gpio", 133 "gpio",
132}; 134};
133 135
@@ -534,14 +536,13 @@ static struct i2c_adapter ivtv_i2c_adap_template = {
534#endif 536#endif
535}; 537};
536 538
537static struct i2c_algo_bit_data ivtv_i2c_algo_template = { 539static const struct i2c_algo_bit_data ivtv_i2c_algo_template = {
538 NULL, /* ?? */ 540 .setsda = ivtv_setsda_old,
539 ivtv_setsda_old, /* setsda function */ 541 .setscl = ivtv_setscl_old,
540 ivtv_setscl_old, /* " */ 542 .getsda = ivtv_getsda_old,
541 ivtv_getsda_old, /* " */ 543 .getscl = ivtv_getscl_old,
542 ivtv_getscl_old, /* " */ 544 .udelay = 5,
543 10, /* udelay */ 545 .timeout = 200,
544 200 /* timeout */
545}; 546};
546 547
547static struct i2c_client ivtv_i2c_client_template = { 548static struct i2c_client ivtv_i2c_client_template = {
diff --git a/drivers/media/video/ivtv/ivtv-i2c.h b/drivers/media/video/ivtv/ivtv-i2c.h
index 5d210adb5c52..677c3292855e 100644
--- a/drivers/media/video/ivtv/ivtv-i2c.h
+++ b/drivers/media/video/ivtv/ivtv-i2c.h
@@ -18,6 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_I2C_H
22#define IVTV_I2C_H
23
21int ivtv_cx25840(struct ivtv *itv, unsigned int cmd, void *arg); 24int ivtv_cx25840(struct ivtv *itv, unsigned int cmd, void *arg);
22int ivtv_saa7115(struct ivtv *itv, unsigned int cmd, void *arg); 25int ivtv_saa7115(struct ivtv *itv, unsigned int cmd, void *arg);
23int ivtv_saa7127(struct ivtv *itv, unsigned int cmd, void *arg); 26int ivtv_saa7127(struct ivtv *itv, unsigned int cmd, void *arg);
@@ -34,3 +37,5 @@ void ivtv_call_i2c_clients(struct ivtv *itv, unsigned int cmd, void *arg);
34/* init + register i2c algo-bit adapter */ 37/* init + register i2c algo-bit adapter */
35int __devinit init_ivtv_i2c(struct ivtv *itv); 38int __devinit init_ivtv_i2c(struct ivtv *itv);
36void __devexit exit_ivtv_i2c(struct ivtv *itv); 39void __devexit exit_ivtv_i2c(struct ivtv *itv);
40
41#endif
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.c b/drivers/media/video/ivtv/ivtv-ioctl.c
index dfe0aedc60fd..206eee7542db 100644
--- a/drivers/media/video/ivtv/ivtv-ioctl.c
+++ b/drivers/media/video/ivtv/ivtv-ioctl.c
@@ -25,8 +25,7 @@
25#include "ivtv-queue.h" 25#include "ivtv-queue.h"
26#include "ivtv-fileops.h" 26#include "ivtv-fileops.h"
27#include "ivtv-vbi.h" 27#include "ivtv-vbi.h"
28#include "ivtv-audio.h" 28#include "ivtv-routing.h"
29#include "ivtv-video.h"
30#include "ivtv-streams.h" 29#include "ivtv-streams.h"
31#include "ivtv-yuv.h" 30#include "ivtv-yuv.h"
32#include "ivtv-ioctl.h" 31#include "ivtv-ioctl.h"
@@ -164,7 +163,7 @@ void ivtv_set_osd_alpha(struct ivtv *itv)
164{ 163{
165 ivtv_vapi(itv, CX2341X_OSD_SET_GLOBAL_ALPHA, 3, 164 ivtv_vapi(itv, CX2341X_OSD_SET_GLOBAL_ALPHA, 3,
166 itv->osd_global_alpha_state, itv->osd_global_alpha, !itv->osd_local_alpha_state); 165 itv->osd_global_alpha_state, itv->osd_global_alpha, !itv->osd_local_alpha_state);
167 ivtv_vapi(itv, CX2341X_OSD_SET_CHROMA_KEY, 2, itv->osd_color_key_state, itv->osd_color_key); 166 ivtv_vapi(itv, CX2341X_OSD_SET_CHROMA_KEY, 2, itv->osd_chroma_key_state, itv->osd_chroma_key);
168} 167}
169 168
170int ivtv_set_speed(struct ivtv *itv, int speed) 169int ivtv_set_speed(struct ivtv *itv, int speed)
@@ -427,7 +426,7 @@ static int ivtv_get_fmt(struct ivtv *itv, int streamtype, struct v4l2_format *fm
427 case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY: 426 case V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY:
428 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT)) 427 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
429 return -EINVAL; 428 return -EINVAL;
430 fmt->fmt.win.chromakey = itv->osd_color_key; 429 fmt->fmt.win.chromakey = itv->osd_chroma_key;
431 fmt->fmt.win.global_alpha = itv->osd_global_alpha; 430 fmt->fmt.win.global_alpha = itv->osd_global_alpha;
432 break; 431 break;
433 432
@@ -547,7 +546,7 @@ static int ivtv_try_or_set_fmt(struct ivtv *itv, int streamtype,
547 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT)) 546 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
548 return -EINVAL; 547 return -EINVAL;
549 if (set_fmt) { 548 if (set_fmt) {
550 itv->osd_color_key = fmt->fmt.win.chromakey; 549 itv->osd_chroma_key = fmt->fmt.win.chromakey;
551 itv->osd_global_alpha = fmt->fmt.win.global_alpha; 550 itv->osd_global_alpha = fmt->fmt.win.global_alpha;
552 ivtv_set_osd_alpha(itv); 551 ivtv_set_osd_alpha(itv);
553 } 552 }
@@ -584,9 +583,7 @@ static int ivtv_try_or_set_fmt(struct ivtv *itv, int streamtype,
584 583
585 /* set raw VBI format */ 584 /* set raw VBI format */
586 if (fmt->type == V4L2_BUF_TYPE_VBI_CAPTURE) { 585 if (fmt->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
587 if (set_fmt && streamtype == IVTV_ENC_STREAM_TYPE_VBI && 586 if (set_fmt && atomic_read(&itv->capturing) > 0) {
588 itv->vbi.sliced_in->service_set &&
589 atomic_read(&itv->capturing) > 0) {
590 return -EBUSY; 587 return -EBUSY;
591 } 588 }
592 if (set_fmt) { 589 if (set_fmt) {
@@ -624,7 +621,7 @@ static int ivtv_try_or_set_fmt(struct ivtv *itv, int streamtype,
624 return 0; 621 return 0;
625 if (set == 0) 622 if (set == 0)
626 return -EINVAL; 623 return -EINVAL;
627 if (atomic_read(&itv->capturing) > 0 && itv->vbi.sliced_in->service_set == 0) { 624 if (atomic_read(&itv->capturing) > 0) {
628 return -EBUSY; 625 return -EBUSY;
629 } 626 }
630 itv->video_dec_func(itv, VIDIOC_S_FMT, fmt); 627 itv->video_dec_func(itv, VIDIOC_S_FMT, fmt);
@@ -677,13 +674,21 @@ static int ivtv_debug_ioctls(struct file *filp, unsigned int cmd, void *arg)
677 case VIDIOC_INT_S_AUDIO_ROUTING: { 674 case VIDIOC_INT_S_AUDIO_ROUTING: {
678 struct v4l2_routing *route = arg; 675 struct v4l2_routing *route = arg;
679 676
680 ivtv_audio_set_route(itv, route); 677 ivtv_i2c_hw(itv, itv->card->hw_audio, VIDIOC_INT_S_AUDIO_ROUTING, route);
681 break; 678 break;
682 } 679 }
683 680
684 case VIDIOC_INT_RESET: 681 case VIDIOC_INT_RESET: {
685 ivtv_reset_ir_gpio(itv); 682 u32 val = *(u32 *)arg;
683
684 if ((val == 0 && itv->options.newi2c) || (val & 0x01)) {
685 ivtv_reset_ir_gpio(itv);
686 }
687 if (val & 0x02) {
688 itv->video_dec_func(itv, cmd, 0);
689 }
686 break; 690 break;
691 }
687 692
688 default: 693 default:
689 return -EINVAL; 694 return -EINVAL;
@@ -694,6 +699,7 @@ static int ivtv_debug_ioctls(struct file *filp, unsigned int cmd, void *arg)
694int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void *arg) 699int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void *arg)
695{ 700{
696 struct ivtv_open_id *id = NULL; 701 struct ivtv_open_id *id = NULL;
702 u32 data[CX2341X_MBOX_MAX_DATA];
697 703
698 if (filp) id = (struct ivtv_open_id *)filp->private_data; 704 if (filp) id = (struct ivtv_open_id *)filp->private_data;
699 705
@@ -898,6 +904,9 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
898 IVTV_DEBUG_INFO("Input unchanged\n"); 904 IVTV_DEBUG_INFO("Input unchanged\n");
899 break; 905 break;
900 } 906 }
907 if (atomic_read(&itv->capturing) > 0) {
908 return -EBUSY;
909 }
901 IVTV_DEBUG_INFO("Changing input from %d to %d\n", 910 IVTV_DEBUG_INFO("Changing input from %d to %d\n",
902 itv->active_input, inp); 911 itv->active_input, inp);
903 912
@@ -1127,12 +1136,14 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1127 memset(&enc->raw, 0, sizeof(enc->raw)); 1136 memset(&enc->raw, 0, sizeof(enc->raw));
1128 switch (enc->cmd) { 1137 switch (enc->cmd) {
1129 case V4L2_ENC_CMD_START: 1138 case V4L2_ENC_CMD_START:
1139 IVTV_DEBUG_IOCTL("V4L2_ENC_CMD_START\n");
1130 enc->flags = 0; 1140 enc->flags = 0;
1131 if (try) 1141 if (try)
1132 return 0; 1142 return 0;
1133 return ivtv_start_capture(id); 1143 return ivtv_start_capture(id);
1134 1144
1135 case V4L2_ENC_CMD_STOP: 1145 case V4L2_ENC_CMD_STOP:
1146 IVTV_DEBUG_IOCTL("V4L2_ENC_CMD_STOP\n");
1136 enc->flags &= V4L2_ENC_CMD_STOP_AT_GOP_END; 1147 enc->flags &= V4L2_ENC_CMD_STOP_AT_GOP_END;
1137 if (try) 1148 if (try)
1138 return 0; 1149 return 0;
@@ -1140,6 +1151,7 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1140 return 0; 1151 return 0;
1141 1152
1142 case V4L2_ENC_CMD_PAUSE: 1153 case V4L2_ENC_CMD_PAUSE:
1154 IVTV_DEBUG_IOCTL("V4L2_ENC_CMD_PAUSE\n");
1143 enc->flags = 0; 1155 enc->flags = 0;
1144 if (try) 1156 if (try)
1145 return 0; 1157 return 0;
@@ -1152,6 +1164,7 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1152 break; 1164 break;
1153 1165
1154 case V4L2_ENC_CMD_RESUME: 1166 case V4L2_ENC_CMD_RESUME:
1167 IVTV_DEBUG_IOCTL("V4L2_ENC_CMD_RESUME\n");
1155 enc->flags = 0; 1168 enc->flags = 0;
1156 if (try) 1169 if (try)
1157 return 0; 1170 return 0;
@@ -1163,6 +1176,7 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1163 ivtv_unmute(itv); 1176 ivtv_unmute(itv);
1164 break; 1177 break;
1165 default: 1178 default:
1179 IVTV_DEBUG_IOCTL("Unknown cmd %d\n", enc->cmd);
1166 return -EINVAL; 1180 return -EINVAL;
1167 } 1181 }
1168 break; 1182 break;
@@ -1170,22 +1184,58 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1170 1184
1171 case VIDIOC_G_FBUF: { 1185 case VIDIOC_G_FBUF: {
1172 struct v4l2_framebuffer *fb = arg; 1186 struct v4l2_framebuffer *fb = arg;
1187 int pixfmt;
1188 static u32 pixel_format[16] = {
1189 V4L2_PIX_FMT_PAL8, /* Uses a 256-entry RGB colormap */
1190 V4L2_PIX_FMT_RGB565,
1191 V4L2_PIX_FMT_RGB555,
1192 V4L2_PIX_FMT_RGB444,
1193 V4L2_PIX_FMT_RGB32,
1194 0,
1195 0,
1196 0,
1197 V4L2_PIX_FMT_PAL8, /* Uses a 256-entry YUV colormap */
1198 V4L2_PIX_FMT_YUV565,
1199 V4L2_PIX_FMT_YUV555,
1200 V4L2_PIX_FMT_YUV444,
1201 V4L2_PIX_FMT_YUV32,
1202 0,
1203 0,
1204 0,
1205 };
1173 1206
1174 memset(fb, 0, sizeof(*fb)); 1207 memset(fb, 0, sizeof(*fb));
1175 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT_OVERLAY)) 1208 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT_OVERLAY))
1176 return -EINVAL; 1209 return -EINVAL;
1177 fb->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | V4L2_FBUF_CAP_CHROMAKEY | 1210 fb->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | V4L2_FBUF_CAP_CHROMAKEY |
1178 V4L2_FBUF_CAP_LOCAL_ALPHA | V4L2_FBUF_CAP_GLOBAL_ALPHA; 1211 V4L2_FBUF_CAP_GLOBAL_ALPHA;
1179 fb->fmt.pixelformat = itv->osd_pixelformat; 1212 ivtv_vapi_result(itv, data, CX2341X_OSD_GET_STATE, 0);
1213 data[0] |= (read_reg(0x2a00) >> 7) & 0x40;
1214 pixfmt = (data[0] >> 3) & 0xf;
1215 fb->fmt.pixelformat = pixel_format[pixfmt];
1180 fb->fmt.width = itv->osd_rect.width; 1216 fb->fmt.width = itv->osd_rect.width;
1181 fb->fmt.height = itv->osd_rect.height; 1217 fb->fmt.height = itv->osd_rect.height;
1182 fb->base = (void *)itv->osd_video_pbase; 1218 fb->base = (void *)itv->osd_video_pbase;
1219 if (itv->osd_chroma_key_state)
1220 fb->flags |= V4L2_FBUF_FLAG_CHROMAKEY;
1183 if (itv->osd_global_alpha_state) 1221 if (itv->osd_global_alpha_state)
1184 fb->flags |= V4L2_FBUF_FLAG_GLOBAL_ALPHA; 1222 fb->flags |= V4L2_FBUF_FLAG_GLOBAL_ALPHA;
1185 if (itv->osd_local_alpha_state) 1223 pixfmt &= 7;
1186 fb->flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA; 1224 /* no local alpha for RGB565 or unknown formats */
1187 if (itv->osd_color_key_state) 1225 if (pixfmt == 1 || pixfmt > 4)
1188 fb->flags |= V4L2_FBUF_FLAG_CHROMAKEY; 1226 break;
1227 /* 16-bit formats have inverted local alpha */
1228 if (pixfmt == 2 || pixfmt == 3)
1229 fb->capability |= V4L2_FBUF_CAP_LOCAL_INV_ALPHA;
1230 else
1231 fb->capability |= V4L2_FBUF_CAP_LOCAL_ALPHA;
1232 if (itv->osd_local_alpha_state) {
1233 /* 16-bit formats have inverted local alpha */
1234 if (pixfmt == 2 || pixfmt == 3)
1235 fb->flags |= V4L2_FBUF_FLAG_LOCAL_INV_ALPHA;
1236 else
1237 fb->flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA;
1238 }
1189 break; 1239 break;
1190 } 1240 }
1191 1241
@@ -1195,12 +1245,22 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1195 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT_OVERLAY)) 1245 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT_OVERLAY))
1196 return -EINVAL; 1246 return -EINVAL;
1197 itv->osd_global_alpha_state = (fb->flags & V4L2_FBUF_FLAG_GLOBAL_ALPHA) != 0; 1247 itv->osd_global_alpha_state = (fb->flags & V4L2_FBUF_FLAG_GLOBAL_ALPHA) != 0;
1198 itv->osd_local_alpha_state = (fb->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) != 0; 1248 itv->osd_local_alpha_state =
1199 itv->osd_color_key_state = (fb->flags & V4L2_FBUF_FLAG_CHROMAKEY) != 0; 1249 (fb->flags & (V4L2_FBUF_FLAG_LOCAL_ALPHA|V4L2_FBUF_FLAG_LOCAL_INV_ALPHA)) != 0;
1250 itv->osd_chroma_key_state = (fb->flags & V4L2_FBUF_FLAG_CHROMAKEY) != 0;
1200 ivtv_set_osd_alpha(itv); 1251 ivtv_set_osd_alpha(itv);
1201 break; 1252 break;
1202 } 1253 }
1203 1254
1255 case VIDIOC_OVERLAY: {
1256 int *on = arg;
1257
1258 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT_OVERLAY))
1259 return -EINVAL;
1260 ivtv_vapi(itv, CX2341X_OSD_SET_STATE, 1, *on != 0);
1261 break;
1262 }
1263
1204 case VIDIOC_LOG_STATUS: 1264 case VIDIOC_LOG_STATUS:
1205 { 1265 {
1206 int has_output = itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT; 1266 int has_output = itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT;
@@ -1209,6 +1269,7 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1209 int i; 1269 int i;
1210 1270
1211 IVTV_INFO("================= START STATUS CARD #%d =================\n", itv->num); 1271 IVTV_INFO("================= START STATUS CARD #%d =================\n", itv->num);
1272 IVTV_INFO("Version: %s Card: %s\n", IVTV_VERSION, itv->card_name);
1212 if (itv->hw_flags & IVTV_HW_TVEEPROM) { 1273 if (itv->hw_flags & IVTV_HW_TVEEPROM) {
1213 struct tveeprom tv; 1274 struct tveeprom tv;
1214 1275
@@ -1217,32 +1278,72 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1217 ivtv_call_i2c_clients(itv, VIDIOC_LOG_STATUS, NULL); 1278 ivtv_call_i2c_clients(itv, VIDIOC_LOG_STATUS, NULL);
1218 ivtv_get_input(itv, itv->active_input, &vidin); 1279 ivtv_get_input(itv, itv->active_input, &vidin);
1219 ivtv_get_audio_input(itv, itv->audio_input, &audin); 1280 ivtv_get_audio_input(itv, itv->audio_input, &audin);
1220 IVTV_INFO("Video Input: %s\n", vidin.name); 1281 IVTV_INFO("Video Input: %s\n", vidin.name);
1221 IVTV_INFO("Audio Input: %s\n", audin.name); 1282 IVTV_INFO("Audio Input: %s%s\n", audin.name,
1283 (itv->dualwatch_stereo_mode & ~0x300) == 0x200 ? " (Bilingual)" : "");
1222 if (has_output) { 1284 if (has_output) {
1223 struct v4l2_output vidout; 1285 struct v4l2_output vidout;
1224 struct v4l2_audioout audout; 1286 struct v4l2_audioout audout;
1225 int mode = itv->output_mode; 1287 int mode = itv->output_mode;
1226 static const char * const output_modes[] = { 1288 static const char * const output_modes[5] = {
1227 "None", 1289 "None",
1228 "MPEG Streaming", 1290 "MPEG Streaming",
1229 "YUV Streaming", 1291 "YUV Streaming",
1230 "YUV Frames", 1292 "YUV Frames",
1231 "Passthrough", 1293 "Passthrough",
1232 }; 1294 };
1295 static const char * const audio_modes[5] = {
1296 "Stereo",
1297 "Left",
1298 "Right",
1299 "Mono",
1300 "Swapped"
1301 };
1302 static const char * const alpha_mode[4] = {
1303 "None",
1304 "Global",
1305 "Local",
1306 "Global and Local"
1307 };
1308 static const char * const pixel_format[16] = {
1309 "ARGB Indexed",
1310 "RGB 5:6:5",
1311 "ARGB 1:5:5:5",
1312 "ARGB 1:4:4:4",
1313 "ARGB 8:8:8:8",
1314 "5",
1315 "6",
1316 "7",
1317 "AYUV Indexed",
1318 "YUV 5:6:5",
1319 "AYUV 1:5:5:5",
1320 "AYUV 1:4:4:4",
1321 "AYUV 8:8:8:8",
1322 "13",
1323 "14",
1324 "15",
1325 };
1233 1326
1234 ivtv_get_output(itv, itv->active_output, &vidout); 1327 ivtv_get_output(itv, itv->active_output, &vidout);
1235 ivtv_get_audio_output(itv, 0, &audout); 1328 ivtv_get_audio_output(itv, 0, &audout);
1236 IVTV_INFO("Video Output: %s\n", vidout.name); 1329 IVTV_INFO("Video Output: %s\n", vidout.name);
1237 IVTV_INFO("Audio Output: %s\n", audout.name); 1330 IVTV_INFO("Audio Output: %s (Stereo/Bilingual: %s/%s)\n", audout.name,
1331 audio_modes[itv->audio_stereo_mode],
1332 audio_modes[itv->audio_bilingual_mode]);
1238 if (mode < 0 || mode > OUT_PASSTHROUGH) 1333 if (mode < 0 || mode > OUT_PASSTHROUGH)
1239 mode = OUT_NONE; 1334 mode = OUT_NONE;
1240 IVTV_INFO("Output Mode: %s\n", output_modes[mode]); 1335 IVTV_INFO("Output Mode: %s\n", output_modes[mode]);
1336 ivtv_vapi_result(itv, data, CX2341X_OSD_GET_STATE, 0);
1337 data[0] |= (read_reg(0x2a00) >> 7) & 0x40;
1338 IVTV_INFO("Overlay: %s, Alpha: %s, Pixel Format: %s\n",
1339 data[0] & 1 ? "On" : "Off",
1340 alpha_mode[(data[0] >> 1) & 0x3],
1341 pixel_format[(data[0] >> 3) & 0xf]);
1241 } 1342 }
1242 IVTV_INFO("Tuner: %s\n", 1343 IVTV_INFO("Tuner: %s\n",
1243 test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags) ? "Radio" : "TV"); 1344 test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags) ? "Radio" : "TV");
1244 cx2341x_log_status(&itv->params, itv->name); 1345 cx2341x_log_status(&itv->params, itv->name);
1245 IVTV_INFO("Version: %s Status flags: 0x%08lx\n", IVTV_VERSION, itv->i_flags); 1346 IVTV_INFO("Status flags: 0x%08lx\n", itv->i_flags);
1246 for (i = 0; i < IVTV_MAX_STREAMS; i++) { 1347 for (i = 0; i < IVTV_MAX_STREAMS; i++) {
1247 struct ivtv_stream *s = &itv->streams[i]; 1348 struct ivtv_stream *s = &itv->streams[i];
1248 1349
@@ -1252,7 +1353,7 @@ int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void
1252 (s->buffers - s->q_free.buffers) * 100 / s->buffers, 1353 (s->buffers - s->q_free.buffers) * 100 / s->buffers,
1253 (s->buffers * s->buf_size) / 1024, s->buffers); 1354 (s->buffers * s->buf_size) / 1024, s->buffers);
1254 } 1355 }
1255 IVTV_INFO("Read MPEG/VBI: %lld/%lld bytes\n", (long long)itv->mpg_data_received, (long long)itv->vbi_data_inserted); 1356 IVTV_INFO("Read MPG/VBI: %lld/%lld bytes\n", (long long)itv->mpg_data_received, (long long)itv->vbi_data_inserted);
1256 IVTV_INFO("================== END STATUS CARD #%d ==================\n", itv->num); 1357 IVTV_INFO("================== END STATUS CARD #%d ==================\n", itv->num);
1257 break; 1358 break;
1258 } 1359 }
@@ -1288,6 +1389,8 @@ static int ivtv_decoder_ioctls(struct file *filp, unsigned int cmd, void *arg)
1288 ivtv_release_stream(s); 1389 ivtv_release_stream(s);
1289 return -EBUSY; 1390 return -EBUSY;
1290 } 1391 }
1392 /* Mark that this file handle started the UDMA_YUV mode */
1393 id->yuv_frames = 1;
1291 if (args->y_source == NULL) 1394 if (args->y_source == NULL)
1292 return 0; 1395 return 0;
1293 return ivtv_yuv_prep_frame(itv, args); 1396 return ivtv_yuv_prep_frame(itv, args);
@@ -1396,9 +1499,9 @@ static int ivtv_decoder_ioctls(struct file *filp, unsigned int cmd, void *arg)
1396 int try = (cmd == VIDEO_TRY_COMMAND); 1499 int try = (cmd == VIDEO_TRY_COMMAND);
1397 1500
1398 if (try) 1501 if (try)
1399 IVTV_DEBUG_IOCTL("VIDEO_TRY_COMMAND\n"); 1502 IVTV_DEBUG_IOCTL("VIDEO_TRY_COMMAND %d\n", vc->cmd);
1400 else 1503 else
1401 IVTV_DEBUG_IOCTL("VIDEO_COMMAND\n"); 1504 IVTV_DEBUG_IOCTL("VIDEO_COMMAND %d\n", vc->cmd);
1402 return ivtv_video_command(itv, id, vc, try); 1505 return ivtv_video_command(itv, id, vc, try);
1403 } 1506 }
1404 1507
@@ -1429,11 +1532,15 @@ static int ivtv_decoder_ioctls(struct file *filp, unsigned int cmd, void *arg)
1429 return 0; 1532 return 0;
1430 if (nonblocking) 1533 if (nonblocking)
1431 return -EAGAIN; 1534 return -EAGAIN;
1432 /* wait for event */ 1535 /* Wait for event. Note that serialize_lock is locked,
1536 so to allow other processes to access the driver while
1537 we are waiting unlock first and later lock again. */
1538 mutex_unlock(&itv->serialize_lock);
1433 prepare_to_wait(&itv->event_waitq, &wait, TASK_INTERRUPTIBLE); 1539 prepare_to_wait(&itv->event_waitq, &wait, TASK_INTERRUPTIBLE);
1434 if ((itv->i_flags & (IVTV_F_I_EV_DEC_STOPPED|IVTV_F_I_EV_VSYNC)) == 0) 1540 if ((itv->i_flags & (IVTV_F_I_EV_DEC_STOPPED|IVTV_F_I_EV_VSYNC)) == 0)
1435 schedule(); 1541 schedule();
1436 finish_wait(&itv->event_waitq, &wait); 1542 finish_wait(&itv->event_waitq, &wait);
1543 mutex_lock(&itv->serialize_lock);
1437 if (signal_pending(current)) { 1544 if (signal_pending(current)) {
1438 /* return if a signal was received */ 1545 /* return if a signal was received */
1439 IVTV_DEBUG_INFO("User stopped wait for event\n"); 1546 IVTV_DEBUG_INFO("User stopped wait for event\n");
@@ -1470,6 +1577,7 @@ static int ivtv_v4l2_do_ioctl(struct inode *inode, struct file *filp,
1470 case VIDIOC_S_AUDOUT: 1577 case VIDIOC_S_AUDOUT:
1471 case VIDIOC_S_EXT_CTRLS: 1578 case VIDIOC_S_EXT_CTRLS:
1472 case VIDIOC_S_FBUF: 1579 case VIDIOC_S_FBUF:
1580 case VIDIOC_OVERLAY:
1473 ret = v4l2_prio_check(&itv->prio, &id->prio); 1581 ret = v4l2_prio_check(&itv->prio, &id->prio);
1474 if (ret) 1582 if (ret)
1475 return ret; 1583 return ret;
@@ -1523,6 +1631,7 @@ static int ivtv_v4l2_do_ioctl(struct inode *inode, struct file *filp,
1523 case VIDIOC_TRY_ENCODER_CMD: 1631 case VIDIOC_TRY_ENCODER_CMD:
1524 case VIDIOC_G_FBUF: 1632 case VIDIOC_G_FBUF:
1525 case VIDIOC_S_FBUF: 1633 case VIDIOC_S_FBUF:
1634 case VIDIOC_OVERLAY:
1526 if (ivtv_debug & IVTV_DBGFLG_IOCTL) { 1635 if (ivtv_debug & IVTV_DBGFLG_IOCTL) {
1527 printk(KERN_INFO "ivtv%d ioctl: ", itv->num); 1636 printk(KERN_INFO "ivtv%d ioctl: ", itv->num);
1528 v4l_printk_ioctl(cmd); 1637 v4l_printk_ioctl(cmd);
@@ -1563,12 +1672,9 @@ static int ivtv_v4l2_do_ioctl(struct inode *inode, struct file *filp,
1563 return 0; 1672 return 0;
1564} 1673}
1565 1674
1566int ivtv_v4l2_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, 1675static int ivtv_serialized_ioctl(struct ivtv *itv, struct inode *inode, struct file *filp,
1567 unsigned long arg) 1676 unsigned int cmd, unsigned long arg)
1568{ 1677{
1569 struct ivtv_open_id *id = (struct ivtv_open_id *)filp->private_data;
1570 struct ivtv *itv = id->itv;
1571
1572 /* Filter dvb ioctls that cannot be handled by video_usercopy */ 1678 /* Filter dvb ioctls that cannot be handled by video_usercopy */
1573 switch (cmd) { 1679 switch (cmd) {
1574 case VIDEO_SELECT_SOURCE: 1680 case VIDEO_SELECT_SOURCE:
@@ -1603,3 +1709,16 @@ int ivtv_v4l2_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
1603 } 1709 }
1604 return video_usercopy(inode, filp, cmd, arg, ivtv_v4l2_do_ioctl); 1710 return video_usercopy(inode, filp, cmd, arg, ivtv_v4l2_do_ioctl);
1605} 1711}
1712
1713int ivtv_v4l2_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
1714 unsigned long arg)
1715{
1716 struct ivtv_open_id *id = (struct ivtv_open_id *)filp->private_data;
1717 struct ivtv *itv = id->itv;
1718 int res;
1719
1720 mutex_lock(&itv->serialize_lock);
1721 res = ivtv_serialized_ioctl(itv, inode, filp, cmd, arg);
1722 mutex_unlock(&itv->serialize_lock);
1723 return res;
1724}
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.h b/drivers/media/video/ivtv/ivtv-ioctl.h
index cbccf7a9f65c..a03351b6853d 100644
--- a/drivers/media/video/ivtv/ivtv-ioctl.h
+++ b/drivers/media/video/ivtv/ivtv-ioctl.h
@@ -18,6 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_IOCTL_H
22#define IVTV_IOCTL_H
23
21u16 service2vbi(int type); 24u16 service2vbi(int type);
22void expand_service_set(struct v4l2_sliced_vbi_format *fmt, int is_pal); 25void expand_service_set(struct v4l2_sliced_vbi_format *fmt, int is_pal);
23u16 get_service_set(struct v4l2_sliced_vbi_format *fmt); 26u16 get_service_set(struct v4l2_sliced_vbi_format *fmt);
@@ -26,3 +29,5 @@ int ivtv_v4l2_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
26int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void *arg); 29int ivtv_v4l2_ioctls(struct ivtv *itv, struct file *filp, unsigned int cmd, void *arg);
27void ivtv_set_osd_alpha(struct ivtv *itv); 30void ivtv_set_osd_alpha(struct ivtv *itv);
28int ivtv_set_speed(struct ivtv *itv, int speed); 31int ivtv_set_speed(struct ivtv *itv, int speed);
32
33#endif
diff --git a/drivers/media/video/ivtv/ivtv-irq.c b/drivers/media/video/ivtv/ivtv-irq.c
index fcd6e7f5f121..fd1688e4757d 100644
--- a/drivers/media/video/ivtv/ivtv-irq.c
+++ b/drivers/media/video/ivtv/ivtv-irq.c
@@ -19,12 +19,9 @@
19 */ 19 */
20 20
21#include "ivtv-driver.h" 21#include "ivtv-driver.h"
22#include "ivtv-firmware.h"
23#include "ivtv-fileops.h"
24#include "ivtv-queue.h" 22#include "ivtv-queue.h"
25#include "ivtv-udma.h" 23#include "ivtv-udma.h"
26#include "ivtv-irq.h" 24#include "ivtv-irq.h"
27#include "ivtv-ioctl.h"
28#include "ivtv-mailbox.h" 25#include "ivtv-mailbox.h"
29#include "ivtv-vbi.h" 26#include "ivtv-vbi.h"
30#include "ivtv-yuv.h" 27#include "ivtv-yuv.h"
@@ -45,7 +42,6 @@ static void ivtv_pio_work_handler(struct ivtv *itv)
45{ 42{
46 struct ivtv_stream *s = &itv->streams[itv->cur_pio_stream]; 43 struct ivtv_stream *s = &itv->streams[itv->cur_pio_stream];
47 struct ivtv_buffer *buf; 44 struct ivtv_buffer *buf;
48 struct list_head *p;
49 int i = 0; 45 int i = 0;
50 46
51 IVTV_DEBUG_HI_DMA("ivtv_pio_work_handler\n"); 47 IVTV_DEBUG_HI_DMA("ivtv_pio_work_handler\n");
@@ -57,21 +53,19 @@ static void ivtv_pio_work_handler(struct ivtv *itv)
57 return; 53 return;
58 } 54 }
59 IVTV_DEBUG_HI_DMA("Process PIO %s\n", s->name); 55 IVTV_DEBUG_HI_DMA("Process PIO %s\n", s->name);
60 buf = list_entry(s->q_dma.list.next, struct ivtv_buffer, list); 56 list_for_each_entry(buf, &s->q_dma.list, list) {
61 list_for_each(p, &s->q_dma.list) { 57 u32 size = s->sg_processing[i].size & 0x3ffff;
62 struct ivtv_buffer *buf = list_entry(p, struct ivtv_buffer, list);
63 u32 size = s->PIOarray[i].size & 0x3ffff;
64 58
65 /* Copy the data from the card to the buffer */ 59 /* Copy the data from the card to the buffer */
66 if (s->type == IVTV_DEC_STREAM_TYPE_VBI) { 60 if (s->type == IVTV_DEC_STREAM_TYPE_VBI) {
67 memcpy_fromio(buf->buf, itv->dec_mem + s->PIOarray[i].src - IVTV_DECODER_OFFSET, size); 61 memcpy_fromio(buf->buf, itv->dec_mem + s->sg_processing[i].src - IVTV_DECODER_OFFSET, size);
68 } 62 }
69 else { 63 else {
70 memcpy_fromio(buf->buf, itv->enc_mem + s->PIOarray[i].src, size); 64 memcpy_fromio(buf->buf, itv->enc_mem + s->sg_processing[i].src, size);
71 } 65 }
72 if (s->PIOarray[i].size & 0x80000000)
73 break;
74 i++; 66 i++;
67 if (i == s->sg_processing_size)
68 break;
75 } 69 }
76 write_reg(IVTV_IRQ_ENC_PIO_COMPLETE, 0x44); 70 write_reg(IVTV_IRQ_ENC_PIO_COMPLETE, 0x44);
77} 71}
@@ -100,12 +94,11 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
100{ 94{
101 struct ivtv *itv = s->itv; 95 struct ivtv *itv = s->itv;
102 struct ivtv_buffer *buf; 96 struct ivtv_buffer *buf;
103 struct list_head *p;
104 u32 bytes_needed = 0; 97 u32 bytes_needed = 0;
105 u32 offset, size; 98 u32 offset, size;
106 u32 UVoffset = 0, UVsize = 0; 99 u32 UVoffset = 0, UVsize = 0;
107 int skip_bufs = s->q_predma.buffers; 100 int skip_bufs = s->q_predma.buffers;
108 int idx = s->SG_length; 101 int idx = s->sg_pending_size;
109 int rc; 102 int rc;
110 103
111 /* sanity checks */ 104 /* sanity checks */
@@ -123,7 +116,7 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
123 case IVTV_ENC_STREAM_TYPE_MPG: 116 case IVTV_ENC_STREAM_TYPE_MPG:
124 offset = data[1]; 117 offset = data[1];
125 size = data[2]; 118 size = data[2];
126 s->dma_pts = 0; 119 s->pending_pts = 0;
127 break; 120 break;
128 121
129 case IVTV_ENC_STREAM_TYPE_YUV: 122 case IVTV_ENC_STREAM_TYPE_YUV:
@@ -131,13 +124,13 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
131 size = data[2]; 124 size = data[2];
132 UVoffset = data[3]; 125 UVoffset = data[3];
133 UVsize = data[4]; 126 UVsize = data[4];
134 s->dma_pts = ((u64) data[5] << 32) | data[6]; 127 s->pending_pts = ((u64) data[5] << 32) | data[6];
135 break; 128 break;
136 129
137 case IVTV_ENC_STREAM_TYPE_PCM: 130 case IVTV_ENC_STREAM_TYPE_PCM:
138 offset = data[1] + 12; 131 offset = data[1] + 12;
139 size = data[2] - 12; 132 size = data[2] - 12;
140 s->dma_pts = read_dec(offset - 8) | 133 s->pending_pts = read_dec(offset - 8) |
141 ((u64)(read_dec(offset - 12)) << 32); 134 ((u64)(read_dec(offset - 12)) << 32);
142 if (itv->has_cx23415) 135 if (itv->has_cx23415)
143 offset += IVTV_DECODER_OFFSET; 136 offset += IVTV_DECODER_OFFSET;
@@ -150,13 +143,13 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
150 IVTV_DEBUG_INFO("VBI offset == 0\n"); 143 IVTV_DEBUG_INFO("VBI offset == 0\n");
151 return -1; 144 return -1;
152 } 145 }
153 s->dma_pts = read_enc(offset - 4) | ((u64)read_enc(offset - 8) << 32); 146 s->pending_pts = read_enc(offset - 4) | ((u64)read_enc(offset - 8) << 32);
154 break; 147 break;
155 148
156 case IVTV_DEC_STREAM_TYPE_VBI: 149 case IVTV_DEC_STREAM_TYPE_VBI:
157 size = read_dec(itv->vbi.dec_start + 4) + 8; 150 size = read_dec(itv->vbi.dec_start + 4) + 8;
158 offset = read_dec(itv->vbi.dec_start) + itv->vbi.dec_start; 151 offset = read_dec(itv->vbi.dec_start) + itv->vbi.dec_start;
159 s->dma_pts = 0; 152 s->pending_pts = 0;
160 offset += IVTV_DECODER_OFFSET; 153 offset += IVTV_DECODER_OFFSET;
161 break; 154 break;
162 default: 155 default:
@@ -165,17 +158,17 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
165 } 158 }
166 159
167 /* if this is the start of the DMA then fill in the magic cookie */ 160 /* if this is the start of the DMA then fill in the magic cookie */
168 if (s->SG_length == 0) { 161 if (s->sg_pending_size == 0 && ivtv_use_dma(s)) {
169 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM || 162 if (itv->has_cx23415 && (s->type == IVTV_ENC_STREAM_TYPE_PCM ||
170 s->type == IVTV_DEC_STREAM_TYPE_VBI)) { 163 s->type == IVTV_DEC_STREAM_TYPE_VBI)) {
171 s->dma_backup = read_dec(offset - IVTV_DECODER_OFFSET); 164 s->pending_backup = read_dec(offset - IVTV_DECODER_OFFSET);
172 write_dec_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset - IVTV_DECODER_OFFSET); 165 write_dec_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset - IVTV_DECODER_OFFSET);
173 } 166 }
174 else { 167 else {
175 s->dma_backup = read_enc(offset); 168 s->pending_backup = read_enc(offset);
176 write_enc_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset); 169 write_enc_sync(cpu_to_le32(DMA_MAGIC_COOKIE), offset);
177 } 170 }
178 s->dma_offset = offset; 171 s->pending_offset = offset;
179 } 172 }
180 173
181 bytes_needed = size; 174 bytes_needed = size;
@@ -202,18 +195,17 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
202 } 195 }
203 s->buffers_stolen = rc; 196 s->buffers_stolen = rc;
204 197
205 /* got the buffers, now fill in SGarray (DMA) */ 198 /* got the buffers, now fill in sg_pending */
206 buf = list_entry(s->q_predma.list.next, struct ivtv_buffer, list); 199 buf = list_entry(s->q_predma.list.next, struct ivtv_buffer, list);
207 memset(buf->buf, 0, 128); 200 memset(buf->buf, 0, 128);
208 list_for_each(p, &s->q_predma.list) { 201 list_for_each_entry(buf, &s->q_predma.list, list) {
209 struct ivtv_buffer *buf = list_entry(p, struct ivtv_buffer, list);
210
211 if (skip_bufs-- > 0) 202 if (skip_bufs-- > 0)
212 continue; 203 continue;
213 s->SGarray[idx].dst = cpu_to_le32(buf->dma_handle); 204 s->sg_pending[idx].dst = buf->dma_handle;
214 s->SGarray[idx].src = cpu_to_le32(offset); 205 s->sg_pending[idx].src = offset;
215 s->SGarray[idx].size = cpu_to_le32(s->buf_size); 206 s->sg_pending[idx].size = s->buf_size;
216 buf->bytesused = (size < s->buf_size) ? size : s->buf_size; 207 buf->bytesused = (size < s->buf_size) ? size : s->buf_size;
208 buf->dma_xfer_cnt = s->dma_xfer_cnt;
217 209
218 s->q_predma.bytesused += buf->bytesused; 210 s->q_predma.bytesused += buf->bytesused;
219 size -= buf->bytesused; 211 size -= buf->bytesused;
@@ -229,7 +221,7 @@ static int stream_enc_dma_append(struct ivtv_stream *s, u32 data[CX2341X_MBOX_MA
229 } 221 }
230 idx++; 222 idx++;
231 } 223 }
232 s->SG_length = idx; 224 s->sg_pending_size = idx;
233 return 0; 225 return 0;
234} 226}
235 227
@@ -251,7 +243,7 @@ static void dma_post(struct ivtv_stream *s)
251 /* Sync Buffer */ 243 /* Sync Buffer */
252 ivtv_buf_sync_for_cpu(s, buf); 244 ivtv_buf_sync_for_cpu(s, buf);
253 245
254 if (x == 0) { 246 if (x == 0 && ivtv_use_dma(s)) {
255 offset = s->dma_last_offset; 247 offset = s->dma_last_offset;
256 if (u32buf[offset / 4] != DMA_MAGIC_COOKIE) 248 if (u32buf[offset / 4] != DMA_MAGIC_COOKIE)
257 { 249 {
@@ -286,14 +278,12 @@ static void dma_post(struct ivtv_stream *s)
286 /* flag byteswap ABCD -> DCBA for MPG & VBI data outside irq */ 278 /* flag byteswap ABCD -> DCBA for MPG & VBI data outside irq */
287 if (s->type == IVTV_ENC_STREAM_TYPE_MPG || 279 if (s->type == IVTV_ENC_STREAM_TYPE_MPG ||
288 s->type == IVTV_ENC_STREAM_TYPE_VBI) 280 s->type == IVTV_ENC_STREAM_TYPE_VBI)
289 set_bit(IVTV_F_B_NEED_BUF_SWAP, &buf->b_flags); 281 buf->b_flags |= IVTV_F_B_NEED_BUF_SWAP;
290 } 282 }
291 if (buf) 283 if (buf)
292 buf->bytesused += s->dma_last_offset; 284 buf->bytesused += s->dma_last_offset;
293 if (buf && s->type == IVTV_DEC_STREAM_TYPE_VBI) { 285 if (buf && s->type == IVTV_DEC_STREAM_TYPE_VBI) {
294 list_for_each(p, &s->q_dma.list) { 286 list_for_each_entry(buf, &s->q_dma.list, list) {
295 buf = list_entry(p, struct ivtv_buffer, list);
296
297 /* Parse and Groom VBI Data */ 287 /* Parse and Groom VBI Data */
298 s->q_dma.bytesused -= buf->bytesused; 288 s->q_dma.bytesused -= buf->bytesused;
299 ivtv_process_vbi_data(itv, buf, 0, s->type); 289 ivtv_process_vbi_data(itv, buf, 0, s->type);
@@ -313,7 +303,6 @@ void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock)
313{ 303{
314 struct ivtv *itv = s->itv; 304 struct ivtv *itv = s->itv;
315 struct ivtv_buffer *buf; 305 struct ivtv_buffer *buf;
316 struct list_head *p;
317 u32 y_size = itv->params.height * itv->params.width; 306 u32 y_size = itv->params.height * itv->params.width;
318 u32 uv_offset = offset + IVTV_YUV_BUFFER_UV_OFFSET; 307 u32 uv_offset = offset + IVTV_YUV_BUFFER_UV_OFFSET;
319 int y_done = 0; 308 int y_done = 0;
@@ -322,18 +311,15 @@ void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock)
322 int idx = 0; 311 int idx = 0;
323 312
324 IVTV_DEBUG_HI_DMA("DEC PREPARE DMA %s: %08x %08x\n", s->name, s->q_predma.bytesused, offset); 313 IVTV_DEBUG_HI_DMA("DEC PREPARE DMA %s: %08x %08x\n", s->name, s->q_predma.bytesused, offset);
325 buf = list_entry(s->q_predma.list.next, struct ivtv_buffer, list); 314 list_for_each_entry(buf, &s->q_predma.list, list) {
326 list_for_each(p, &s->q_predma.list) {
327 struct ivtv_buffer *buf = list_entry(p, struct ivtv_buffer, list);
328
329 /* YUV UV Offset from Y Buffer */ 315 /* YUV UV Offset from Y Buffer */
330 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && !y_done && bytes_written >= y_size) { 316 if (s->type == IVTV_DEC_STREAM_TYPE_YUV && !y_done && bytes_written >= y_size) {
331 offset = uv_offset; 317 offset = uv_offset;
332 y_done = 1; 318 y_done = 1;
333 } 319 }
334 s->SGarray[idx].src = cpu_to_le32(buf->dma_handle); 320 s->sg_pending[idx].src = buf->dma_handle;
335 s->SGarray[idx].dst = cpu_to_le32(offset); 321 s->sg_pending[idx].dst = offset;
336 s->SGarray[idx].size = cpu_to_le32(buf->bytesused); 322 s->sg_pending[idx].size = buf->bytesused;
337 323
338 offset += buf->bytesused; 324 offset += buf->bytesused;
339 bytes_written += buf->bytesused; 325 bytes_written += buf->bytesused;
@@ -342,10 +328,7 @@ void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock)
342 ivtv_buf_sync_for_device(s, buf); 328 ivtv_buf_sync_for_device(s, buf);
343 idx++; 329 idx++;
344 } 330 }
345 s->SG_length = idx; 331 s->sg_pending_size = idx;
346
347 /* Mark last buffer size for Interrupt flag */
348 s->SGarray[s->SG_length - 1].size |= cpu_to_le32(0x80000000);
349 332
350 /* Sync Hardware SG List of buffers */ 333 /* Sync Hardware SG List of buffers */
351 ivtv_stream_sync_for_device(s); 334 ivtv_stream_sync_for_device(s);
@@ -361,6 +344,34 @@ void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock)
361 spin_unlock_irqrestore(&itv->dma_reg_lock, flags); 344 spin_unlock_irqrestore(&itv->dma_reg_lock, flags);
362} 345}
363 346
347static void ivtv_dma_enc_start_xfer(struct ivtv_stream *s)
348{
349 struct ivtv *itv = s->itv;
350
351 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src);
352 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst);
353 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000);
354 s->sg_processed++;
355 /* Sync Hardware SG List of buffers */
356 ivtv_stream_sync_for_device(s);
357 write_reg(s->sg_handle, IVTV_REG_ENCDMAADDR);
358 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER);
359}
360
361static void ivtv_dma_dec_start_xfer(struct ivtv_stream *s)
362{
363 struct ivtv *itv = s->itv;
364
365 s->sg_dma->src = cpu_to_le32(s->sg_processing[s->sg_processed].src);
366 s->sg_dma->dst = cpu_to_le32(s->sg_processing[s->sg_processed].dst);
367 s->sg_dma->size = cpu_to_le32(s->sg_processing[s->sg_processed].size | 0x80000000);
368 s->sg_processed++;
369 /* Sync Hardware SG List of buffers */
370 ivtv_stream_sync_for_device(s);
371 write_reg(s->sg_handle, IVTV_REG_DECDMAADDR);
372 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER);
373}
374
364/* start the encoder DMA */ 375/* start the encoder DMA */
365static void ivtv_dma_enc_start(struct ivtv_stream *s) 376static void ivtv_dma_enc_start(struct ivtv_stream *s)
366{ 377{
@@ -374,8 +385,7 @@ static void ivtv_dma_enc_start(struct ivtv_stream *s)
374 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused); 385 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused);
375 386
376 if (ivtv_use_dma(s)) 387 if (ivtv_use_dma(s))
377 s->SGarray[s->SG_length - 1].size = 388 s->sg_pending[s->sg_pending_size - 1].size += 256;
378 cpu_to_le32(le32_to_cpu(s->SGarray[s->SG_length - 1].size) + 256);
379 389
380 /* If this is an MPEG stream, and VBI data is also pending, then append the 390 /* If this is an MPEG stream, and VBI data is also pending, then append the
381 VBI DMA to the MPEG DMA and transfer both sets of data at once. 391 VBI DMA to the MPEG DMA and transfer both sets of data at once.
@@ -386,43 +396,39 @@ static void ivtv_dma_enc_start(struct ivtv_stream *s)
386 sure we only use the MPEG DMA to transfer the VBI DMA if both are in 396 sure we only use the MPEG DMA to transfer the VBI DMA if both are in
387 use. This way no conflicts occur. */ 397 use. This way no conflicts occur. */
388 clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags); 398 clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags);
389 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && s_vbi->SG_length && 399 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && s_vbi->sg_pending_size &&
390 s->SG_length + s_vbi->SG_length <= s->buffers) { 400 s->sg_pending_size + s_vbi->sg_pending_size <= s->buffers) {
391 ivtv_queue_move(s_vbi, &s_vbi->q_predma, NULL, &s_vbi->q_dma, s_vbi->q_predma.bytesused); 401 ivtv_queue_move(s_vbi, &s_vbi->q_predma, NULL, &s_vbi->q_dma, s_vbi->q_predma.bytesused);
392 if (ivtv_use_dma(s_vbi)) 402 if (ivtv_use_dma(s_vbi))
393 s_vbi->SGarray[s_vbi->SG_length - 1].size = cpu_to_le32(le32_to_cpu(s_vbi->SGarray[s->SG_length - 1].size) + 256); 403 s_vbi->sg_pending[s_vbi->sg_pending_size - 1].size += 256;
394 for (i = 0; i < s_vbi->SG_length; i++) { 404 for (i = 0; i < s_vbi->sg_pending_size; i++) {
395 s->SGarray[s->SG_length++] = s_vbi->SGarray[i]; 405 s->sg_pending[s->sg_pending_size++] = s_vbi->sg_pending[i];
396 } 406 }
397 itv->vbi.dma_offset = s_vbi->dma_offset; 407 s_vbi->dma_offset = s_vbi->pending_offset;
398 s_vbi->SG_length = 0; 408 s_vbi->sg_pending_size = 0;
409 s_vbi->dma_xfer_cnt++;
399 set_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags); 410 set_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags);
400 IVTV_DEBUG_HI_DMA("include DMA for %s\n", s->name); 411 IVTV_DEBUG_HI_DMA("include DMA for %s\n", s->name);
401 } 412 }
402 413
403 /* Mark last buffer size for Interrupt flag */ 414 s->dma_xfer_cnt++;
404 s->SGarray[s->SG_length - 1].size |= cpu_to_le32(0x80000000); 415 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_element) * s->sg_pending_size);
405 416 s->sg_processing_size = s->sg_pending_size;
406 if (s->type == IVTV_ENC_STREAM_TYPE_VBI) 417 s->sg_pending_size = 0;
407 set_bit(IVTV_F_I_ENC_VBI, &itv->i_flags); 418 s->sg_processed = 0;
408 else 419 s->dma_offset = s->pending_offset;
409 clear_bit(IVTV_F_I_ENC_VBI, &itv->i_flags); 420 s->dma_backup = s->pending_backup;
421 s->dma_pts = s->pending_pts;
410 422
411 if (ivtv_use_pio(s)) { 423 if (ivtv_use_pio(s)) {
412 for (i = 0; i < s->SG_length; i++) {
413 s->PIOarray[i].src = le32_to_cpu(s->SGarray[i].src);
414 s->PIOarray[i].size = le32_to_cpu(s->SGarray[i].size);
415 }
416 set_bit(IVTV_F_I_WORK_HANDLER_PIO, &itv->i_flags); 424 set_bit(IVTV_F_I_WORK_HANDLER_PIO, &itv->i_flags);
417 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); 425 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags);
418 set_bit(IVTV_F_I_PIO, &itv->i_flags); 426 set_bit(IVTV_F_I_PIO, &itv->i_flags);
419 itv->cur_pio_stream = s->type; 427 itv->cur_pio_stream = s->type;
420 } 428 }
421 else { 429 else {
422 /* Sync Hardware SG List of buffers */ 430 itv->dma_retries = 0;
423 ivtv_stream_sync_for_device(s); 431 ivtv_dma_enc_start_xfer(s);
424 write_reg(s->SG_handle, IVTV_REG_ENCDMAADDR);
425 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER);
426 set_bit(IVTV_F_I_DMA, &itv->i_flags); 432 set_bit(IVTV_F_I_DMA, &itv->i_flags);
427 itv->cur_dma_stream = s->type; 433 itv->cur_dma_stream = s->type;
428 itv->dma_timer.expires = jiffies + msecs_to_jiffies(100); 434 itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
@@ -436,10 +442,15 @@ static void ivtv_dma_dec_start(struct ivtv_stream *s)
436 442
437 if (s->q_predma.bytesused) 443 if (s->q_predma.bytesused)
438 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused); 444 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_dma, s->q_predma.bytesused);
445 s->dma_xfer_cnt++;
446 memcpy(s->sg_processing, s->sg_pending, sizeof(struct ivtv_sg_element) * s->sg_pending_size);
447 s->sg_processing_size = s->sg_pending_size;
448 s->sg_pending_size = 0;
449 s->sg_processed = 0;
450
439 IVTV_DEBUG_HI_DMA("start DMA for %s\n", s->name); 451 IVTV_DEBUG_HI_DMA("start DMA for %s\n", s->name);
440 /* put SG Handle into register 0x0c */ 452 itv->dma_retries = 0;
441 write_reg(s->SG_handle, IVTV_REG_DECDMAADDR); 453 ivtv_dma_dec_start_xfer(s);
442 write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER);
443 set_bit(IVTV_F_I_DMA, &itv->i_flags); 454 set_bit(IVTV_F_I_DMA, &itv->i_flags);
444 itv->cur_dma_stream = s->type; 455 itv->cur_dma_stream = s->type;
445 itv->dma_timer.expires = jiffies + msecs_to_jiffies(100); 456 itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
@@ -450,27 +461,44 @@ static void ivtv_irq_dma_read(struct ivtv *itv)
450{ 461{
451 struct ivtv_stream *s = NULL; 462 struct ivtv_stream *s = NULL;
452 struct ivtv_buffer *buf; 463 struct ivtv_buffer *buf;
453 int hw_stream_type; 464 int hw_stream_type = 0;
454 465
455 IVTV_DEBUG_HI_IRQ("DEC DMA READ\n"); 466 IVTV_DEBUG_HI_IRQ("DEC DMA READ\n");
456 del_timer(&itv->dma_timer); 467 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && itv->cur_dma_stream < 0) {
457 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) { 468 del_timer(&itv->dma_timer);
458 IVTV_DEBUG_WARN("DEC DMA ERROR %x\n", read_reg(IVTV_REG_DMASTATUS)); 469 return;
459 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
460 } 470 }
471
461 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags)) { 472 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags)) {
462 if (test_bit(IVTV_F_I_DEC_YUV, &itv->i_flags)) { 473 s = &itv->streams[itv->cur_dma_stream];
463 s = &itv->streams[IVTV_DEC_STREAM_TYPE_YUV]; 474 ivtv_stream_sync_for_cpu(s);
464 hw_stream_type = 2; 475
476 if (read_reg(IVTV_REG_DMASTATUS) & 0x14) {
477 IVTV_DEBUG_WARN("DEC DMA ERROR %x (xfer %d of %d, retry %d)\n",
478 read_reg(IVTV_REG_DMASTATUS),
479 s->sg_processed, s->sg_processing_size, itv->dma_retries);
480 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
481 if (itv->dma_retries == 3) {
482 /* Too many retries, give up on this frame */
483 itv->dma_retries = 0;
484 s->sg_processed = s->sg_processing_size;
485 }
486 else {
487 /* Retry, starting with the first xfer segment.
488 Just retrying the current segment is not sufficient. */
489 s->sg_processed = 0;
490 itv->dma_retries++;
491 }
465 } 492 }
466 else { 493 if (s->sg_processed < s->sg_processing_size) {
467 s = &itv->streams[IVTV_DEC_STREAM_TYPE_MPG]; 494 /* DMA next buffer */
468 hw_stream_type = 0; 495 ivtv_dma_dec_start_xfer(s);
496 return;
469 } 497 }
498 if (s->type == IVTV_DEC_STREAM_TYPE_YUV)
499 hw_stream_type = 2;
470 IVTV_DEBUG_HI_DMA("DEC DATA READ %s: %d\n", s->name, s->q_dma.bytesused); 500 IVTV_DEBUG_HI_DMA("DEC DATA READ %s: %d\n", s->name, s->q_dma.bytesused);
471 501
472 ivtv_stream_sync_for_cpu(s);
473
474 /* For some reason must kick the firmware, like PIO mode, 502 /* For some reason must kick the firmware, like PIO mode,
475 I think this tells the firmware we are done and the size 503 I think this tells the firmware we are done and the size
476 of the xfer so it can calculate what we need next. 504 of the xfer so it can calculate what we need next.
@@ -487,6 +515,7 @@ static void ivtv_irq_dma_read(struct ivtv *itv)
487 } 515 }
488 wake_up(&s->waitq); 516 wake_up(&s->waitq);
489 } 517 }
518 del_timer(&itv->dma_timer);
490 clear_bit(IVTV_F_I_UDMA, &itv->i_flags); 519 clear_bit(IVTV_F_I_UDMA, &itv->i_flags);
491 clear_bit(IVTV_F_I_DMA, &itv->i_flags); 520 clear_bit(IVTV_F_I_DMA, &itv->i_flags);
492 itv->cur_dma_stream = -1; 521 itv->cur_dma_stream = -1;
@@ -498,33 +527,46 @@ static void ivtv_irq_enc_dma_complete(struct ivtv *itv)
498 u32 data[CX2341X_MBOX_MAX_DATA]; 527 u32 data[CX2341X_MBOX_MAX_DATA];
499 struct ivtv_stream *s; 528 struct ivtv_stream *s;
500 529
501 del_timer(&itv->dma_timer);
502 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data); 530 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data);
503 IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d\n", data[0], data[1]); 531 IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d (%d)\n", data[0], data[1], itv->cur_dma_stream);
504 if (test_and_clear_bit(IVTV_F_I_ENC_VBI, &itv->i_flags)) 532 if (itv->cur_dma_stream < 0) {
505 data[1] = 3; 533 del_timer(&itv->dma_timer);
506 else if (data[1] > 2)
507 return; 534 return;
508 s = &itv->streams[ivtv_stream_map[data[1]]]; 535 }
536 s = &itv->streams[itv->cur_dma_stream];
537 ivtv_stream_sync_for_cpu(s);
538
509 if (data[0] & 0x18) { 539 if (data[0] & 0x18) {
510 IVTV_DEBUG_WARN("ENC DMA ERROR %x\n", data[0]); 540 IVTV_DEBUG_WARN("ENC DMA ERROR %x (offset %08x, xfer %d of %d, retry %d)\n", data[0],
541 s->dma_offset, s->sg_processed, s->sg_processing_size, itv->dma_retries);
511 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); 542 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
512 ivtv_vapi(itv, CX2341X_ENC_SCHED_DMA_TO_HOST, 3, 0, 0, data[1]); 543 if (itv->dma_retries == 3) {
544 /* Too many retries, give up on this frame */
545 itv->dma_retries = 0;
546 s->sg_processed = s->sg_processing_size;
547 }
548 else {
549 /* Retry, starting with the first xfer segment.
550 Just retrying the current segment is not sufficient. */
551 s->sg_processed = 0;
552 itv->dma_retries++;
553 }
554 }
555 if (s->sg_processed < s->sg_processing_size) {
556 /* DMA next buffer */
557 ivtv_dma_enc_start_xfer(s);
558 return;
513 } 559 }
514 s->SG_length = 0; 560 del_timer(&itv->dma_timer);
515 clear_bit(IVTV_F_I_DMA, &itv->i_flags); 561 clear_bit(IVTV_F_I_DMA, &itv->i_flags);
516 itv->cur_dma_stream = -1; 562 itv->cur_dma_stream = -1;
517 dma_post(s); 563 dma_post(s);
518 ivtv_stream_sync_for_cpu(s);
519 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) { 564 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) {
520 u32 tmp;
521
522 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; 565 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI];
523 tmp = s->dma_offset;
524 s->dma_offset = itv->vbi.dma_offset;
525 dma_post(s); 566 dma_post(s);
526 s->dma_offset = tmp;
527 } 567 }
568 s->sg_processing_size = 0;
569 s->sg_processed = 0;
528 wake_up(&itv->dma_waitq); 570 wake_up(&itv->dma_waitq);
529} 571}
530 572
@@ -538,8 +580,6 @@ static void ivtv_irq_enc_pio_complete(struct ivtv *itv)
538 } 580 }
539 s = &itv->streams[itv->cur_pio_stream]; 581 s = &itv->streams[itv->cur_pio_stream];
540 IVTV_DEBUG_HI_IRQ("ENC PIO COMPLETE %s\n", s->name); 582 IVTV_DEBUG_HI_IRQ("ENC PIO COMPLETE %s\n", s->name);
541 s->SG_length = 0;
542 clear_bit(IVTV_F_I_ENC_VBI, &itv->i_flags);
543 clear_bit(IVTV_F_I_PIO, &itv->i_flags); 583 clear_bit(IVTV_F_I_PIO, &itv->i_flags);
544 itv->cur_pio_stream = -1; 584 itv->cur_pio_stream = -1;
545 dma_post(s); 585 dma_post(s);
@@ -551,13 +591,8 @@ static void ivtv_irq_enc_pio_complete(struct ivtv *itv)
551 ivtv_vapi(itv, CX2341X_ENC_SCHED_DMA_TO_HOST, 3, 0, 0, 2); 591 ivtv_vapi(itv, CX2341X_ENC_SCHED_DMA_TO_HOST, 3, 0, 0, 2);
552 clear_bit(IVTV_F_I_PIO, &itv->i_flags); 592 clear_bit(IVTV_F_I_PIO, &itv->i_flags);
553 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) { 593 if (test_and_clear_bit(IVTV_F_S_DMA_HAS_VBI, &s->s_flags)) {
554 u32 tmp;
555
556 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI]; 594 s = &itv->streams[IVTV_ENC_STREAM_TYPE_VBI];
557 tmp = s->dma_offset;
558 s->dma_offset = itv->vbi.dma_offset;
559 dma_post(s); 595 dma_post(s);
560 s->dma_offset = tmp;
561 } 596 }
562 wake_up(&itv->dma_waitq); 597 wake_up(&itv->dma_waitq);
563} 598}
@@ -569,19 +604,23 @@ static void ivtv_irq_dma_err(struct ivtv *itv)
569 del_timer(&itv->dma_timer); 604 del_timer(&itv->dma_timer);
570 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data); 605 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data);
571 IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1], 606 IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1],
572 read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); 607 read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream);
608 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
573 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && 609 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) &&
574 itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) { 610 itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) {
575 struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream]; 611 struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream];
576 612
577 /* retry */ 613 /* retry */
578 write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
579 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) 614 if (s->type >= IVTV_DEC_STREAM_TYPE_MPG)
580 ivtv_dma_dec_start(s); 615 ivtv_dma_dec_start(s);
581 else 616 else
582 ivtv_dma_enc_start(s); 617 ivtv_dma_enc_start(s);
583 return; 618 return;
584 } 619 }
620 if (test_bit(IVTV_F_I_UDMA, &itv->i_flags)) {
621 ivtv_udma_start(itv);
622 return;
623 }
585 clear_bit(IVTV_F_I_UDMA, &itv->i_flags); 624 clear_bit(IVTV_F_I_UDMA, &itv->i_flags);
586 clear_bit(IVTV_F_I_DMA, &itv->i_flags); 625 clear_bit(IVTV_F_I_DMA, &itv->i_flags);
587 itv->cur_dma_stream = -1; 626 itv->cur_dma_stream = -1;
@@ -625,14 +664,12 @@ static void ivtv_irq_enc_vbi_cap(struct ivtv *itv)
625 DMA the data. Since at most four VBI DMA buffers are available, 664 DMA the data. Since at most four VBI DMA buffers are available,
626 we just drop the old requests when there are already three 665 we just drop the old requests when there are already three
627 requests queued. */ 666 requests queued. */
628 if (s->SG_length > 2) { 667 if (s->sg_pending_size > 2) {
629 struct list_head *p; 668 struct ivtv_buffer *buf;
630 list_for_each(p, &s->q_predma.list) { 669 list_for_each_entry(buf, &s->q_predma.list, list)
631 struct ivtv_buffer *buf = list_entry(p, struct ivtv_buffer, list);
632 ivtv_buf_sync_for_cpu(s, buf); 670 ivtv_buf_sync_for_cpu(s, buf);
633 }
634 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_free, 0); 671 ivtv_queue_move(s, &s->q_predma, NULL, &s->q_free, 0);
635 s->SG_length = 0; 672 s->sg_pending_size = 0;
636 } 673 }
637 /* if we can append the data, and the MPEG stream isn't capturing, 674 /* if we can append the data, and the MPEG stream isn't capturing,
638 then start a DMA request for just the VBI data. */ 675 then start a DMA request for just the VBI data. */
@@ -698,23 +735,27 @@ static void ivtv_irq_vsync(struct ivtv *itv)
698 735
699 if (0) IVTV_DEBUG_IRQ("DEC VSYNC\n"); 736 if (0) IVTV_DEBUG_IRQ("DEC VSYNC\n");
700 737
701 if (((frame ^ itv->yuv_info.lace_sync_field) == 0 && ((itv->lastVsyncFrame & 1) ^ itv->yuv_info.lace_sync_field)) || 738 if (((frame ^ itv->yuv_info.sync_field[last_dma_frame]) == 0 &&
702 (frame != (itv->lastVsyncFrame & 1) && !itv->yuv_info.frame_interlaced)) { 739 ((itv->last_vsync_field & 1) ^ itv->yuv_info.sync_field[last_dma_frame])) ||
740 (frame != (itv->last_vsync_field & 1) && !itv->yuv_info.frame_interlaced)) {
703 int next_dma_frame = last_dma_frame; 741 int next_dma_frame = last_dma_frame;
704 742
705 if (next_dma_frame >= 0 && next_dma_frame != atomic_read(&itv->yuv_info.next_fill_frame)) { 743 if (!(itv->yuv_info.frame_interlaced && itv->yuv_info.field_delay[next_dma_frame] && itv->yuv_info.fields_lapsed < 1)) {
706 write_reg(yuv_offset[next_dma_frame] >> 4, 0x82c); 744 if (next_dma_frame >= 0 && next_dma_frame != atomic_read(&itv->yuv_info.next_fill_frame)) {
707 write_reg((yuv_offset[next_dma_frame] + IVTV_YUV_BUFFER_UV_OFFSET) >> 4, 0x830); 745 write_reg(yuv_offset[next_dma_frame] >> 4, 0x82c);
708 write_reg(yuv_offset[next_dma_frame] >> 4, 0x834); 746 write_reg((yuv_offset[next_dma_frame] + IVTV_YUV_BUFFER_UV_OFFSET) >> 4, 0x830);
709 write_reg((yuv_offset[next_dma_frame] + IVTV_YUV_BUFFER_UV_OFFSET) >> 4, 0x838); 747 write_reg(yuv_offset[next_dma_frame] >> 4, 0x834);
710 next_dma_frame = (next_dma_frame + 1) & 0x3; 748 write_reg((yuv_offset[next_dma_frame] + IVTV_YUV_BUFFER_UV_OFFSET) >> 4, 0x838);
711 atomic_set(&itv->yuv_info.next_dma_frame, next_dma_frame); 749 next_dma_frame = (next_dma_frame + 1) & 0x3;
750 atomic_set(&itv->yuv_info.next_dma_frame, next_dma_frame);
751 itv->yuv_info.fields_lapsed = -1;
752 }
712 } 753 }
713 } 754 }
714 if (frame != (itv->lastVsyncFrame & 1)) { 755 if (frame != (itv->last_vsync_field & 1)) {
715 struct ivtv_stream *s = ivtv_get_output_stream(itv); 756 struct ivtv_stream *s = ivtv_get_output_stream(itv);
716 757
717 itv->lastVsyncFrame += 1; 758 itv->last_vsync_field += 1;
718 if (frame == 0) { 759 if (frame == 0) {
719 clear_bit(IVTV_F_I_VALID_DEC_TIMINGS, &itv->i_flags); 760 clear_bit(IVTV_F_I_VALID_DEC_TIMINGS, &itv->i_flags);
720 clear_bit(IVTV_F_I_EV_VSYNC_FIELD, &itv->i_flags); 761 clear_bit(IVTV_F_I_EV_VSYNC_FIELD, &itv->i_flags);
@@ -731,7 +772,10 @@ static void ivtv_irq_vsync(struct ivtv *itv)
731 wake_up(&s->waitq); 772 wake_up(&s->waitq);
732 773
733 /* Send VBI to saa7127 */ 774 /* Send VBI to saa7127 */
734 if (frame) { 775 if (frame && (itv->output_mode == OUT_PASSTHROUGH ||
776 test_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags) ||
777 test_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags) ||
778 test_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags))) {
735 set_bit(IVTV_F_I_WORK_HANDLER_VBI, &itv->i_flags); 779 set_bit(IVTV_F_I_WORK_HANDLER_VBI, &itv->i_flags);
736 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); 780 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags);
737 } 781 }
@@ -749,10 +793,12 @@ static void ivtv_irq_vsync(struct ivtv *itv)
749 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags); 793 set_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags);
750 } 794 }
751 } 795 }
796
797 itv->yuv_info.fields_lapsed ++;
752 } 798 }
753} 799}
754 800
755#define IVTV_IRQ_DMA (IVTV_IRQ_DMA_READ | IVTV_IRQ_ENC_DMA_COMPLETE | IVTV_IRQ_DMA_ERR | IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_VBI_CAP | IVTV_IRQ_DEC_DATA_REQ) 801#define IVTV_IRQ_DMA (IVTV_IRQ_DMA_READ | IVTV_IRQ_ENC_DMA_COMPLETE | IVTV_IRQ_DMA_ERR | IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_VBI_CAP | IVTV_IRQ_DEC_DATA_REQ | IVTV_IRQ_DEC_VBI_RE_INSERT)
756 802
757irqreturn_t ivtv_irq_handler(int irq, void *dev_id) 803irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
758{ 804{
@@ -777,7 +823,7 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
777 */ 823 */
778 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) { 824 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) {
779 /* vsync is enabled, see if we're in a new field */ 825 /* vsync is enabled, see if we're in a new field */
780 if ((itv->lastVsyncFrame & 1) != (read_reg(0x28c0) & 1)) { 826 if ((itv->last_vsync_field & 1) != (read_reg(0x28c0) & 1)) {
781 /* New field, looks like we missed it */ 827 /* New field, looks like we missed it */
782 IVTV_DEBUG_YUV("VSync interrupt missed %d\n",read_reg(0x28c0)>>16); 828 IVTV_DEBUG_YUV("VSync interrupt missed %d\n",read_reg(0x28c0)>>16);
783 vsync_force = 1; 829 vsync_force = 1;
@@ -831,7 +877,7 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
831 if (combo & IVTV_IRQ_ENC_EOS) { 877 if (combo & IVTV_IRQ_ENC_EOS) {
832 IVTV_DEBUG_IRQ("ENC EOS\n"); 878 IVTV_DEBUG_IRQ("ENC EOS\n");
833 set_bit(IVTV_F_I_EOS, &itv->i_flags); 879 set_bit(IVTV_F_I_EOS, &itv->i_flags);
834 wake_up(&itv->cap_w); 880 wake_up(&itv->eos_waitq);
835 } 881 }
836 882
837 if (combo & IVTV_IRQ_DEC_DATA_REQ) { 883 if (combo & IVTV_IRQ_DEC_DATA_REQ) {
@@ -853,8 +899,9 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
853 } 899 }
854 900
855 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_DMA, &itv->i_flags)) { 901 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_DMA, &itv->i_flags)) {
902 itv->irq_rr_idx++;
856 for (i = 0; i < IVTV_MAX_STREAMS; i++) { 903 for (i = 0; i < IVTV_MAX_STREAMS; i++) {
857 int idx = (i + itv->irq_rr_idx++) % IVTV_MAX_STREAMS; 904 int idx = (i + itv->irq_rr_idx) % IVTV_MAX_STREAMS;
858 struct ivtv_stream *s = &itv->streams[idx]; 905 struct ivtv_stream *s = &itv->streams[idx];
859 906
860 if (!test_and_clear_bit(IVTV_F_S_DMA_PENDING, &s->s_flags)) 907 if (!test_and_clear_bit(IVTV_F_S_DMA_PENDING, &s->s_flags))
@@ -871,8 +918,9 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
871 } 918 }
872 919
873 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_PIO, &itv->i_flags)) { 920 if ((combo & IVTV_IRQ_DMA) && !test_bit(IVTV_F_I_PIO, &itv->i_flags)) {
921 itv->irq_rr_idx++;
874 for (i = 0; i < IVTV_MAX_STREAMS; i++) { 922 for (i = 0; i < IVTV_MAX_STREAMS; i++) {
875 int idx = (i + itv->irq_rr_idx++) % IVTV_MAX_STREAMS; 923 int idx = (i + itv->irq_rr_idx) % IVTV_MAX_STREAMS;
876 struct ivtv_stream *s = &itv->streams[idx]; 924 struct ivtv_stream *s = &itv->streams[idx];
877 925
878 if (!test_and_clear_bit(IVTV_F_S_PIO_PENDING, &s->s_flags)) 926 if (!test_and_clear_bit(IVTV_F_S_PIO_PENDING, &s->s_flags))
@@ -883,8 +931,9 @@ irqreturn_t ivtv_irq_handler(int irq, void *dev_id)
883 } 931 }
884 } 932 }
885 933
886 if (test_and_clear_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags)) 934 if (test_and_clear_bit(IVTV_F_I_HAVE_WORK, &itv->i_flags)) {
887 queue_work(itv->irq_work_queues, &itv->irq_work_queue); 935 queue_work(itv->irq_work_queues, &itv->irq_work_queue);
936 }
888 937
889 spin_unlock(&itv->dma_reg_lock); 938 spin_unlock(&itv->dma_reg_lock);
890 939
diff --git a/drivers/media/video/ivtv/ivtv-irq.h b/drivers/media/video/ivtv/ivtv-irq.h
index a43348a30309..f879a5822e71 100644
--- a/drivers/media/video/ivtv/ivtv-irq.h
+++ b/drivers/media/video/ivtv/ivtv-irq.h
@@ -19,8 +19,35 @@
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#ifndef IVTV_IRQ_H
23#define IVTV_IRQ_H
24
25#define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
26#define IVTV_IRQ_ENC_EOS (0x1 << 30)
27#define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
28#define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
29#define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
30#define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25)
31#define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
32#define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
33#define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
34#define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
35#define IVTV_IRQ_DMA_ERR (0x1 << 18)
36#define IVTV_IRQ_DMA_WRITE (0x1 << 17)
37#define IVTV_IRQ_DMA_READ (0x1 << 16)
38#define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
39
40/* IRQ Masks */
41#define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
42 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
43
44#define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
45#define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
46
22irqreturn_t ivtv_irq_handler(int irq, void *dev_id); 47irqreturn_t ivtv_irq_handler(int irq, void *dev_id);
23 48
24void ivtv_irq_work_handler(struct work_struct *work); 49void ivtv_irq_work_handler(struct work_struct *work);
25void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock); 50void ivtv_dma_stream_dec_prepare(struct ivtv_stream *s, u32 offset, int lock);
26void ivtv_unfinished_dma(unsigned long arg); 51void ivtv_unfinished_dma(unsigned long arg);
52
53#endif
diff --git a/drivers/media/video/ivtv/ivtv-mailbox.c b/drivers/media/video/ivtv/ivtv-mailbox.c
index 5e3b679202ae..b05436da7136 100644
--- a/drivers/media/video/ivtv/ivtv-mailbox.c
+++ b/drivers/media/video/ivtv/ivtv-mailbox.c
@@ -225,15 +225,15 @@ static int ivtv_api_call(struct ivtv *itv, int cmd, int args, u32 data[])
225 } 225 }
226 if (args < 0 || args > CX2341X_MBOX_MAX_DATA || 226 if (args < 0 || args > CX2341X_MBOX_MAX_DATA ||
227 cmd < 0 || cmd > 255 || api_info[cmd].name == NULL) { 227 cmd < 0 || cmd > 255 || api_info[cmd].name == NULL) {
228 IVTV_ERR("Invalid API call: cmd = 0x%02x, args = %d\n", cmd, args); 228 IVTV_ERR("Invalid MB call: cmd = 0x%02x, args = %d\n", cmd, args);
229 return -EINVAL; 229 return -EINVAL;
230 } 230 }
231 231
232 if (api_info[cmd].flags & API_HIGH_VOL) { 232 if (api_info[cmd].flags & API_HIGH_VOL) {
233 IVTV_DEBUG_HI_API("API Call: %s\n", api_info[cmd].name); 233 IVTV_DEBUG_HI_MB("MB Call: %s\n", api_info[cmd].name);
234 } 234 }
235 else { 235 else {
236 IVTV_DEBUG_API("API Call: %s\n", api_info[cmd].name); 236 IVTV_DEBUG_MB("MB Call: %s\n", api_info[cmd].name);
237 } 237 }
238 238
239 /* clear possibly uninitialized part of data array */ 239 /* clear possibly uninitialized part of data array */
diff --git a/drivers/media/video/ivtv/ivtv-mailbox.h b/drivers/media/video/ivtv/ivtv-mailbox.h
index 79b8aec14370..71a54eef8fc7 100644
--- a/drivers/media/video/ivtv/ivtv-mailbox.h
+++ b/drivers/media/video/ivtv/ivtv-mailbox.h
@@ -18,8 +18,16 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_MAILBOX_H
22#define IVTV_MAILBOX_H
23
24#define IVTV_MBOX_DMA_END 8
25#define IVTV_MBOX_DMA 9
26
21void ivtv_api_get_data(struct ivtv_mailbox_data *mbox, int mb, u32 data[]); 27void ivtv_api_get_data(struct ivtv_mailbox_data *mbox, int mb, u32 data[]);
22int ivtv_api(struct ivtv *itv, int cmd, int args, u32 data[]); 28int ivtv_api(struct ivtv *itv, int cmd, int args, u32 data[]);
23int ivtv_vapi_result(struct ivtv *itv, u32 data[CX2341X_MBOX_MAX_DATA], int cmd, int args, ...); 29int ivtv_vapi_result(struct ivtv *itv, u32 data[CX2341X_MBOX_MAX_DATA], int cmd, int args, ...);
24int ivtv_vapi(struct ivtv *itv, int cmd, int args, ...); 30int ivtv_vapi(struct ivtv *itv, int cmd, int args, ...);
25int ivtv_api_func(void *priv, int cmd, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA]); 31int ivtv_api_func(void *priv, int cmd, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA]);
32
33#endif
diff --git a/drivers/media/video/ivtv/ivtv-queue.c b/drivers/media/video/ivtv/ivtv-queue.c
index a04f9387f63d..39a216713244 100644
--- a/drivers/media/video/ivtv/ivtv-queue.c
+++ b/drivers/media/video/ivtv/ivtv-queue.c
@@ -20,9 +20,7 @@
20 */ 20 */
21 21
22#include "ivtv-driver.h" 22#include "ivtv-driver.h"
23#include "ivtv-streams.h"
24#include "ivtv-queue.h" 23#include "ivtv-queue.h"
25#include "ivtv-mailbox.h"
26 24
27int ivtv_buf_copy_from_user(struct ivtv_stream *s, struct ivtv_buffer *buf, const char __user *src, int copybytes) 25int ivtv_buf_copy_from_user(struct ivtv_stream *s, struct ivtv_buffer *buf, const char __user *src, int copybytes)
28{ 26{
@@ -60,6 +58,7 @@ void ivtv_enqueue(struct ivtv_stream *s, struct ivtv_buffer *buf, struct ivtv_qu
60 buf->bytesused = 0; 58 buf->bytesused = 0;
61 buf->readpos = 0; 59 buf->readpos = 0;
62 buf->b_flags = 0; 60 buf->b_flags = 0;
61 buf->dma_xfer_cnt = 0;
63 } 62 }
64 spin_lock_irqsave(&s->qlock, flags); 63 spin_lock_irqsave(&s->qlock, flags);
65 list_add_tail(&buf->list, &q->list); 64 list_add_tail(&buf->list, &q->list);
@@ -87,7 +86,7 @@ struct ivtv_buffer *ivtv_dequeue(struct ivtv_stream *s, struct ivtv_queue *q)
87} 86}
88 87
89static void ivtv_queue_move_buf(struct ivtv_stream *s, struct ivtv_queue *from, 88static void ivtv_queue_move_buf(struct ivtv_stream *s, struct ivtv_queue *from,
90 struct ivtv_queue *to, int clear, int full) 89 struct ivtv_queue *to, int clear)
91{ 90{
92 struct ivtv_buffer *buf = list_entry(from->list.next, struct ivtv_buffer, list); 91 struct ivtv_buffer *buf = list_entry(from->list.next, struct ivtv_buffer, list);
93 92
@@ -97,13 +96,7 @@ static void ivtv_queue_move_buf(struct ivtv_stream *s, struct ivtv_queue *from,
97 from->bytesused -= buf->bytesused - buf->readpos; 96 from->bytesused -= buf->bytesused - buf->readpos;
98 /* special handling for q_free */ 97 /* special handling for q_free */
99 if (clear) 98 if (clear)
100 buf->bytesused = buf->readpos = buf->b_flags = 0; 99 buf->bytesused = buf->readpos = buf->b_flags = buf->dma_xfer_cnt = 0;
101 else if (full) {
102 /* special handling for stolen buffers, assume
103 all bytes are used. */
104 buf->bytesused = s->buf_size;
105 buf->readpos = buf->b_flags = 0;
106 }
107 to->buffers++; 100 to->buffers++;
108 to->length += s->buf_size; 101 to->length += s->buf_size;
109 to->bytesused += buf->bytesused - buf->readpos; 102 to->bytesused += buf->bytesused - buf->readpos;
@@ -112,7 +105,7 @@ static void ivtv_queue_move_buf(struct ivtv_stream *s, struct ivtv_queue *from,
112/* Move 'needed_bytes' worth of buffers from queue 'from' into queue 'to'. 105/* Move 'needed_bytes' worth of buffers from queue 'from' into queue 'to'.
113 If 'needed_bytes' == 0, then move all buffers from 'from' into 'to'. 106 If 'needed_bytes' == 0, then move all buffers from 'from' into 'to'.
114 If 'steal' != NULL, then buffers may also taken from that queue if 107 If 'steal' != NULL, then buffers may also taken from that queue if
115 needed. 108 needed, but only if 'from' is the free queue.
116 109
117 The buffer is automatically cleared if it goes to the free queue. It is 110 The buffer is automatically cleared if it goes to the free queue. It is
118 also cleared if buffers need to be taken from the 'steal' queue and 111 also cleared if buffers need to be taken from the 'steal' queue and
@@ -133,7 +126,7 @@ int ivtv_queue_move(struct ivtv_stream *s, struct ivtv_queue *from, struct ivtv_
133 int rc = 0; 126 int rc = 0;
134 int from_free = from == &s->q_free; 127 int from_free = from == &s->q_free;
135 int to_free = to == &s->q_free; 128 int to_free = to == &s->q_free;
136 int bytes_available; 129 int bytes_available, bytes_steal;
137 130
138 spin_lock_irqsave(&s->qlock, flags); 131 spin_lock_irqsave(&s->qlock, flags);
139 if (needed_bytes == 0) { 132 if (needed_bytes == 0) {
@@ -142,32 +135,47 @@ int ivtv_queue_move(struct ivtv_stream *s, struct ivtv_queue *from, struct ivtv_
142 } 135 }
143 136
144 bytes_available = from_free ? from->length : from->bytesused; 137 bytes_available = from_free ? from->length : from->bytesused;
145 bytes_available += steal ? steal->length : 0; 138 bytes_steal = (from_free && steal) ? steal->length : 0;
146 139
147 if (bytes_available < needed_bytes) { 140 if (bytes_available + bytes_steal < needed_bytes) {
148 spin_unlock_irqrestore(&s->qlock, flags); 141 spin_unlock_irqrestore(&s->qlock, flags);
149 return -ENOMEM; 142 return -ENOMEM;
150 } 143 }
144 while (bytes_available < needed_bytes) {
145 struct ivtv_buffer *buf = list_entry(steal->list.prev, struct ivtv_buffer, list);
146 u16 dma_xfer_cnt = buf->dma_xfer_cnt;
147
148 /* move buffers from the tail of the 'steal' queue to the tail of the
149 'from' queue. Always copy all the buffers with the same dma_xfer_cnt
150 value, this ensures that you do not end up with partial frame data
151 if one frame is stored in multiple buffers. */
152 while (dma_xfer_cnt == buf->dma_xfer_cnt) {
153 list_move_tail(steal->list.prev, &from->list);
154 rc++;
155 steal->buffers--;
156 steal->length -= s->buf_size;
157 steal->bytesused -= buf->bytesused - buf->readpos;
158 buf->bytesused = buf->readpos = buf->b_flags = buf->dma_xfer_cnt = 0;
159 from->buffers++;
160 from->length += s->buf_size;
161 bytes_available += s->buf_size;
162 if (list_empty(&steal->list))
163 break;
164 buf = list_entry(steal->list.prev, struct ivtv_buffer, list);
165 }
166 }
151 if (from_free) { 167 if (from_free) {
152 u32 old_length = to->length; 168 u32 old_length = to->length;
153 169
154 while (to->length - old_length < needed_bytes) { 170 while (to->length - old_length < needed_bytes) {
155 if (list_empty(&from->list)) 171 ivtv_queue_move_buf(s, from, to, 1);
156 from = steal;
157 if (from == steal)
158 rc++; /* keep track of 'stolen' buffers */
159 ivtv_queue_move_buf(s, from, to, 1, 0);
160 } 172 }
161 } 173 }
162 else { 174 else {
163 u32 old_bytesused = to->bytesused; 175 u32 old_bytesused = to->bytesused;
164 176
165 while (to->bytesused - old_bytesused < needed_bytes) { 177 while (to->bytesused - old_bytesused < needed_bytes) {
166 if (list_empty(&from->list)) 178 ivtv_queue_move_buf(s, from, to, to_free);
167 from = steal;
168 if (from == steal)
169 rc++; /* keep track of 'stolen' buffers */
170 ivtv_queue_move_buf(s, from, to, to_free, rc);
171 } 179 }
172 } 180 }
173 spin_unlock_irqrestore(&s->qlock, flags); 181 spin_unlock_irqrestore(&s->qlock, flags);
@@ -185,7 +193,7 @@ void ivtv_flush_queues(struct ivtv_stream *s)
185int ivtv_stream_alloc(struct ivtv_stream *s) 193int ivtv_stream_alloc(struct ivtv_stream *s)
186{ 194{
187 struct ivtv *itv = s->itv; 195 struct ivtv *itv = s->itv;
188 int SGsize = sizeof(struct ivtv_SG_element) * s->buffers; 196 int SGsize = sizeof(struct ivtv_sg_element) * s->buffers;
189 int i; 197 int i;
190 198
191 if (s->buffers == 0) 199 if (s->buffers == 0)
@@ -195,27 +203,33 @@ int ivtv_stream_alloc(struct ivtv_stream *s)
195 s->dma != PCI_DMA_NONE ? "DMA " : "", 203 s->dma != PCI_DMA_NONE ? "DMA " : "",
196 s->name, s->buffers, s->buf_size, s->buffers * s->buf_size / 1024); 204 s->name, s->buffers, s->buf_size, s->buffers * s->buf_size / 1024);
197 205
198 if (ivtv_might_use_pio(s)) { 206 s->sg_pending = kzalloc(SGsize, GFP_KERNEL);
199 s->PIOarray = (struct ivtv_SG_element *)kzalloc(SGsize, GFP_KERNEL); 207 if (s->sg_pending == NULL) {
200 if (s->PIOarray == NULL) { 208 IVTV_ERR("Could not allocate sg_pending for %s stream\n", s->name);
201 IVTV_ERR("Could not allocate PIOarray for %s stream\n", s->name); 209 return -ENOMEM;
202 return -ENOMEM;
203 }
204 } 210 }
211 s->sg_pending_size = 0;
205 212
206 /* Allocate DMA SG Arrays */ 213 s->sg_processing = kzalloc(SGsize, GFP_KERNEL);
207 s->SGarray = (struct ivtv_SG_element *)kzalloc(SGsize, GFP_KERNEL); 214 if (s->sg_processing == NULL) {
208 if (s->SGarray == NULL) { 215 IVTV_ERR("Could not allocate sg_processing for %s stream\n", s->name);
209 IVTV_ERR("Could not allocate SGarray for %s stream\n", s->name); 216 kfree(s->sg_pending);
210 if (ivtv_might_use_pio(s)) { 217 s->sg_pending = NULL;
211 kfree(s->PIOarray); 218 return -ENOMEM;
212 s->PIOarray = NULL; 219 }
213 } 220 s->sg_processing_size = 0;
221
222 s->sg_dma = kzalloc(sizeof(struct ivtv_sg_element), GFP_KERNEL);
223 if (s->sg_dma == NULL) {
224 IVTV_ERR("Could not allocate sg_dma for %s stream\n", s->name);
225 kfree(s->sg_pending);
226 s->sg_pending = NULL;
227 kfree(s->sg_processing);
228 s->sg_processing = NULL;
214 return -ENOMEM; 229 return -ENOMEM;
215 } 230 }
216 s->SG_length = 0;
217 if (ivtv_might_use_dma(s)) { 231 if (ivtv_might_use_dma(s)) {
218 s->SG_handle = pci_map_single(itv->dev, s->SGarray, SGsize, s->dma); 232 s->sg_handle = pci_map_single(itv->dev, s->sg_dma, sizeof(struct ivtv_sg_element), s->dma);
219 ivtv_stream_sync_for_cpu(s); 233 ivtv_stream_sync_for_cpu(s);
220 } 234 }
221 235
@@ -262,16 +276,19 @@ void ivtv_stream_free(struct ivtv_stream *s)
262 } 276 }
263 277
264 /* Free SG Array/Lists */ 278 /* Free SG Array/Lists */
265 if (s->SGarray != NULL) { 279 if (s->sg_dma != NULL) {
266 if (s->SG_handle != IVTV_DMA_UNMAPPED) { 280 if (s->sg_handle != IVTV_DMA_UNMAPPED) {
267 pci_unmap_single(s->itv->dev, s->SG_handle, 281 pci_unmap_single(s->itv->dev, s->sg_handle,
268 sizeof(struct ivtv_SG_element) * s->buffers, PCI_DMA_TODEVICE); 282 sizeof(struct ivtv_sg_element), PCI_DMA_TODEVICE);
269 s->SG_handle = IVTV_DMA_UNMAPPED; 283 s->sg_handle = IVTV_DMA_UNMAPPED;
270 } 284 }
271 kfree(s->SGarray); 285 kfree(s->sg_pending);
272 kfree(s->PIOarray); 286 kfree(s->sg_processing);
273 s->PIOarray = NULL; 287 kfree(s->sg_dma);
274 s->SGarray = NULL; 288 s->sg_pending = NULL;
275 s->SG_length = 0; 289 s->sg_processing = NULL;
290 s->sg_dma = NULL;
291 s->sg_pending_size = 0;
292 s->sg_processing_size = 0;
276 } 293 }
277} 294}
diff --git a/drivers/media/video/ivtv/ivtv-queue.h b/drivers/media/video/ivtv/ivtv-queue.h
index 2ed8d548255d..7cfc0c9ab050 100644
--- a/drivers/media/video/ivtv/ivtv-queue.h
+++ b/drivers/media/video/ivtv/ivtv-queue.h
@@ -19,6 +19,9 @@
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#ifndef IVTV_QUEUE_H
23#define IVTV_QUEUE_H
24
22#define IVTV_DMA_UNMAPPED ((u32) -1) 25#define IVTV_DMA_UNMAPPED ((u32) -1)
23#define SLICED_VBI_PIO 1 26#define SLICED_VBI_PIO 1
24 27
@@ -79,13 +82,15 @@ void ivtv_stream_free(struct ivtv_stream *s);
79static inline void ivtv_stream_sync_for_cpu(struct ivtv_stream *s) 82static inline void ivtv_stream_sync_for_cpu(struct ivtv_stream *s)
80{ 83{
81 if (ivtv_use_dma(s)) 84 if (ivtv_use_dma(s))
82 pci_dma_sync_single_for_cpu(s->itv->dev, s->SG_handle, 85 pci_dma_sync_single_for_cpu(s->itv->dev, s->sg_handle,
83 sizeof(struct ivtv_SG_element) * s->buffers, PCI_DMA_TODEVICE); 86 sizeof(struct ivtv_sg_element), PCI_DMA_TODEVICE);
84} 87}
85 88
86static inline void ivtv_stream_sync_for_device(struct ivtv_stream *s) 89static inline void ivtv_stream_sync_for_device(struct ivtv_stream *s)
87{ 90{
88 if (ivtv_use_dma(s)) 91 if (ivtv_use_dma(s))
89 pci_dma_sync_single_for_device(s->itv->dev, s->SG_handle, 92 pci_dma_sync_single_for_device(s->itv->dev, s->sg_handle,
90 sizeof(struct ivtv_SG_element) * s->buffers, PCI_DMA_TODEVICE); 93 sizeof(struct ivtv_sg_element), PCI_DMA_TODEVICE);
91} 94}
95
96#endif
diff --git a/drivers/media/video/ivtv/ivtv-routing.c b/drivers/media/video/ivtv/ivtv-routing.c
new file mode 100644
index 000000000000..398bd33033ed
--- /dev/null
+++ b/drivers/media/video/ivtv/ivtv-routing.c
@@ -0,0 +1,116 @@
1/*
2 Audio/video-routing-related ivtv functions.
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include "ivtv-driver.h"
22#include "ivtv-i2c.h"
23#include "ivtv-cards.h"
24#include "ivtv-gpio.h"
25#include "ivtv-routing.h"
26
27#include <media/msp3400.h>
28#include <media/upd64031a.h>
29#include <media/upd64083.h>
30
31/* Selects the audio input and output according to the current
32 settings. */
33void ivtv_audio_set_io(struct ivtv *itv)
34{
35 struct v4l2_routing route;
36 u32 audio_input;
37 int mux_input;
38
39 /* Determine which input to use */
40 if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags)) {
41 audio_input = itv->card->radio_input.audio_input;
42 mux_input = itv->card->radio_input.muxer_input;
43 } else {
44 audio_input = itv->card->audio_inputs[itv->audio_input].audio_input;
45 mux_input = itv->card->audio_inputs[itv->audio_input].muxer_input;
46 }
47
48 /* handle muxer chips */
49 route.input = mux_input;
50 route.output = 0;
51 ivtv_i2c_hw(itv, itv->card->hw_muxer, VIDIOC_INT_S_AUDIO_ROUTING, &route);
52
53 route.input = audio_input;
54 if (itv->card->hw_audio & IVTV_HW_MSP34XX) {
55 route.output = MSP_OUTPUT(MSP_SC_IN_DSP_SCART1);
56 }
57 ivtv_i2c_hw(itv, itv->card->hw_audio, VIDIOC_INT_S_AUDIO_ROUTING, &route);
58}
59
60/* Selects the video input and output according to the current
61 settings. */
62void ivtv_video_set_io(struct ivtv *itv)
63{
64 struct v4l2_routing route;
65 int inp = itv->active_input;
66 u32 type;
67
68 route.input = itv->card->video_inputs[inp].video_input;
69 route.output = 0;
70 itv->video_dec_func(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
71
72 type = itv->card->video_inputs[inp].video_type;
73
74 if (type == IVTV_CARD_INPUT_VID_TUNER) {
75 route.input = 0; /* Tuner */
76 } else if (type < IVTV_CARD_INPUT_COMPOSITE1) {
77 route.input = 2; /* S-Video */
78 } else {
79 route.input = 1; /* Composite */
80 }
81
82 if (itv->card->hw_video & IVTV_HW_GPIO)
83 ivtv_gpio(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
84
85 if (itv->card->hw_video & IVTV_HW_UPD64031A) {
86 if (type == IVTV_CARD_INPUT_VID_TUNER ||
87 type >= IVTV_CARD_INPUT_COMPOSITE1) {
88 /* Composite: GR on, connect to 3DYCS */
89 route.input = UPD64031A_GR_ON | UPD64031A_3DYCS_COMPOSITE;
90 } else {
91 /* S-Video: GR bypassed, turn it off */
92 route.input = UPD64031A_GR_OFF | UPD64031A_3DYCS_DISABLE;
93 }
94 route.input |= itv->card->gr_config;
95
96 ivtv_upd64031a(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
97 }
98
99 if (itv->card->hw_video & IVTV_HW_UPD6408X) {
100 route.input = UPD64083_YCS_MODE;
101 if (type > IVTV_CARD_INPUT_VID_TUNER &&
102 type < IVTV_CARD_INPUT_COMPOSITE1) {
103 /* S-Video uses YCNR mode and internal Y-ADC, the upd64031a
104 is not used. */
105 route.input |= UPD64083_YCNR_MODE;
106 }
107 else if (itv->card->hw_video & IVTV_HW_UPD64031A) {
108 /* Use upd64031a output for tuner and composite(CX23416GYC only) inputs */
109 if ((type == IVTV_CARD_INPUT_VID_TUNER)||
110 (itv->card->type == IVTV_CARD_CX23416GYC)) {
111 route.input |= UPD64083_EXT_Y_ADC;
112 }
113 }
114 ivtv_upd64083(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
115 }
116}
diff --git a/drivers/media/video/ivtv/ivtv-routing.h b/drivers/media/video/ivtv/ivtv-routing.h
new file mode 100644
index 000000000000..c72a9731ca01
--- /dev/null
+++ b/drivers/media/video/ivtv/ivtv-routing.h
@@ -0,0 +1,27 @@
1/*
2 Audio/video-routing-related ivtv functions.
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef IVTV_ROUTING_H
22#define IVTV_ROUTING_H
23
24void ivtv_audio_set_io(struct ivtv *itv);
25void ivtv_video_set_io(struct ivtv *itv);
26
27#endif
diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c
index 51df3f855031..fd135985e70f 100644
--- a/drivers/media/video/ivtv/ivtv-streams.c
+++ b/drivers/media/video/ivtv/ivtv-streams.c
@@ -35,16 +35,13 @@
35 35
36#include "ivtv-driver.h" 36#include "ivtv-driver.h"
37#include "ivtv-fileops.h" 37#include "ivtv-fileops.h"
38#include "ivtv-i2c.h"
39#include "ivtv-queue.h" 38#include "ivtv-queue.h"
40#include "ivtv-mailbox.h" 39#include "ivtv-mailbox.h"
41#include "ivtv-audio.h"
42#include "ivtv-video.h"
43#include "ivtv-vbi.h"
44#include "ivtv-ioctl.h" 40#include "ivtv-ioctl.h"
45#include "ivtv-irq.h" 41#include "ivtv-irq.h"
46#include "ivtv-streams.h" 42#include "ivtv-yuv.h"
47#include "ivtv-cards.h" 43#include "ivtv-cards.h"
44#include "ivtv-streams.h"
48 45
49static struct file_operations ivtv_v4l2_enc_fops = { 46static struct file_operations ivtv_v4l2_enc_fops = {
50 .owner = THIS_MODULE, 47 .owner = THIS_MODULE,
@@ -66,6 +63,13 @@ static struct file_operations ivtv_v4l2_dec_fops = {
66 .poll = ivtv_v4l2_dec_poll, 63 .poll = ivtv_v4l2_dec_poll,
67}; 64};
68 65
66#define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
67#define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
68#define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
69#define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
70#define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
71#define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
72
69static struct { 73static struct {
70 const char *name; 74 const char *name;
71 int vfl_type; 75 int vfl_type;
@@ -75,7 +79,7 @@ static struct {
75 struct file_operations *fops; 79 struct file_operations *fops;
76} ivtv_stream_info[] = { 80} ivtv_stream_info[] = {
77 { /* IVTV_ENC_STREAM_TYPE_MPG */ 81 { /* IVTV_ENC_STREAM_TYPE_MPG */
78 "encoder MPEG", 82 "encoder MPG",
79 VFL_TYPE_GRABBER, 0, 83 VFL_TYPE_GRABBER, 0,
80 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_VIDEO_CAPTURE, 84 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_VIDEO_CAPTURE,
81 &ivtv_v4l2_enc_fops 85 &ivtv_v4l2_enc_fops
@@ -93,7 +97,7 @@ static struct {
93 &ivtv_v4l2_enc_fops 97 &ivtv_v4l2_enc_fops
94 }, 98 },
95 { /* IVTV_ENC_STREAM_TYPE_PCM */ 99 { /* IVTV_ENC_STREAM_TYPE_PCM */
96 "encoder PCM audio", 100 "encoder PCM",
97 VFL_TYPE_GRABBER, IVTV_V4L2_ENC_PCM_OFFSET, 101 VFL_TYPE_GRABBER, IVTV_V4L2_ENC_PCM_OFFSET,
98 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_PRIVATE, 102 PCI_DMA_FROMDEVICE, 0, V4L2_BUF_TYPE_PRIVATE,
99 &ivtv_v4l2_enc_fops 103 &ivtv_v4l2_enc_fops
@@ -105,7 +109,7 @@ static struct {
105 &ivtv_v4l2_enc_fops 109 &ivtv_v4l2_enc_fops
106 }, 110 },
107 { /* IVTV_DEC_STREAM_TYPE_MPG */ 111 { /* IVTV_DEC_STREAM_TYPE_MPG */
108 "decoder MPEG", 112 "decoder MPG",
109 VFL_TYPE_GRABBER, IVTV_V4L2_DEC_MPG_OFFSET, 113 VFL_TYPE_GRABBER, IVTV_V4L2_DEC_MPG_OFFSET,
110 PCI_DMA_TODEVICE, 0, V4L2_BUF_TYPE_VIDEO_OUTPUT, 114 PCI_DMA_TODEVICE, 0, V4L2_BUF_TYPE_VIDEO_OUTPUT,
111 &ivtv_v4l2_dec_fops 115 &ivtv_v4l2_dec_fops
@@ -150,11 +154,11 @@ static void ivtv_stream_init(struct ivtv *itv, int type)
150 s->dma = ivtv_stream_info[type].dma; 154 s->dma = ivtv_stream_info[type].dma;
151 s->buf_size = itv->stream_buf_size[type]; 155 s->buf_size = itv->stream_buf_size[type];
152 if (s->buf_size) 156 if (s->buf_size)
153 s->buffers = itv->options.megabytes[type] * 1024 * 1024 / s->buf_size; 157 s->buffers = (itv->options.kilobytes[type] * 1024 + s->buf_size - 1) / s->buf_size;
154 spin_lock_init(&s->qlock); 158 spin_lock_init(&s->qlock);
155 init_waitqueue_head(&s->waitq); 159 init_waitqueue_head(&s->waitq);
156 s->id = -1; 160 s->id = -1;
157 s->SG_handle = IVTV_DMA_UNMAPPED; 161 s->sg_handle = IVTV_DMA_UNMAPPED;
158 ivtv_queue_init(&s->q_free); 162 ivtv_queue_init(&s->q_free);
159 ivtv_queue_init(&s->q_full); 163 ivtv_queue_init(&s->q_full);
160 ivtv_queue_init(&s->q_dma); 164 ivtv_queue_init(&s->q_dma);
@@ -192,7 +196,7 @@ static int ivtv_reg_dev(struct ivtv *itv, int type)
192 /* User explicitly selected 0 buffers for these streams, so don't 196 /* User explicitly selected 0 buffers for these streams, so don't
193 create them. */ 197 create them. */
194 if (minor >= 0 && ivtv_stream_info[type].dma != PCI_DMA_NONE && 198 if (minor >= 0 && ivtv_stream_info[type].dma != PCI_DMA_NONE &&
195 itv->options.megabytes[type] == 0) { 199 itv->options.kilobytes[type] == 0) {
196 IVTV_INFO("Disabled %s device\n", ivtv_stream_info[type].name); 200 IVTV_INFO("Disabled %s device\n", ivtv_stream_info[type].name);
197 return 0; 201 return 0;
198 } 202 }
@@ -238,18 +242,18 @@ static int ivtv_reg_dev(struct ivtv *itv, int type)
238 242
239 switch (vfl_type) { 243 switch (vfl_type) {
240 case VFL_TYPE_GRABBER: 244 case VFL_TYPE_GRABBER:
241 IVTV_INFO("Registered device video%d for %s (%d MB)\n", 245 IVTV_INFO("Registered device video%d for %s (%d kB)\n",
242 s->v4l2dev->minor, s->name, itv->options.megabytes[type]); 246 s->v4l2dev->minor, s->name, itv->options.kilobytes[type]);
243 break; 247 break;
244 case VFL_TYPE_RADIO: 248 case VFL_TYPE_RADIO:
245 IVTV_INFO("Registered device radio%d for %s\n", 249 IVTV_INFO("Registered device radio%d for %s\n",
246 s->v4l2dev->minor - MINOR_VFL_TYPE_RADIO_MIN, s->name); 250 s->v4l2dev->minor - MINOR_VFL_TYPE_RADIO_MIN, s->name);
247 break; 251 break;
248 case VFL_TYPE_VBI: 252 case VFL_TYPE_VBI:
249 if (itv->options.megabytes[type]) 253 if (itv->options.kilobytes[type])
250 IVTV_INFO("Registered device vbi%d for %s (%d MB)\n", 254 IVTV_INFO("Registered device vbi%d for %s (%d kB)\n",
251 s->v4l2dev->minor - MINOR_VFL_TYPE_VBI_MIN, 255 s->v4l2dev->minor - MINOR_VFL_TYPE_VBI_MIN,
252 s->name, itv->options.megabytes[type]); 256 s->name, itv->options.kilobytes[type]);
253 else 257 else
254 IVTV_INFO("Registered device vbi%d for %s\n", 258 IVTV_INFO("Registered device vbi%d for %s\n",
255 s->v4l2dev->minor - MINOR_VFL_TYPE_VBI_MIN, s->name); 259 s->v4l2dev->minor - MINOR_VFL_TYPE_VBI_MIN, s->name);
@@ -314,28 +318,9 @@ static void ivtv_vbi_setup(struct ivtv *itv)
314 int lines; 318 int lines;
315 int i; 319 int i;
316 320
317 /* If Embed then streamtype must be Program */
318 /* TODO: should we really do this? */
319 if (0 && !raw && itv->vbi.insert_mpeg) {
320 itv->params.stream_type = 0;
321
322 /* assign stream type */
323 ivtv_vapi(itv, CX2341X_ENC_SET_STREAM_TYPE, 1, itv->params.stream_type);
324 }
325
326 /* Reset VBI */ 321 /* Reset VBI */
327 ivtv_vapi(itv, CX2341X_ENC_SET_VBI_LINE, 5, 0xffff , 0, 0, 0, 0); 322 ivtv_vapi(itv, CX2341X_ENC_SET_VBI_LINE, 5, 0xffff , 0, 0, 0, 0);
328 323
329 if (itv->is_60hz) {
330 itv->vbi.count = 12;
331 itv->vbi.start[0] = 10;
332 itv->vbi.start[1] = 273;
333 } else { /* PAL/SECAM */
334 itv->vbi.count = 18;
335 itv->vbi.start[0] = 6;
336 itv->vbi.start[1] = 318;
337 }
338
339 /* setup VBI registers */ 324 /* setup VBI registers */
340 itv->video_dec_func(itv, VIDIOC_S_FMT, &itv->vbi.in); 325 itv->video_dec_func(itv, VIDIOC_S_FMT, &itv->vbi.in);
341 326
@@ -409,8 +394,8 @@ static void ivtv_vbi_setup(struct ivtv *itv)
409 if (!itv->vbi.fpi) 394 if (!itv->vbi.fpi)
410 itv->vbi.fpi = 1; 395 itv->vbi.fpi = 1;
411 396
412 IVTV_DEBUG_INFO("Setup VBI start 0x%08x frames %d fpi %d lines 0x%08x\n", 397 IVTV_DEBUG_INFO("Setup VBI start 0x%08x frames %d fpi %d\n",
413 itv->vbi.enc_start, data[1], itv->vbi.fpi, itv->digitizer); 398 itv->vbi.enc_start, data[1], itv->vbi.fpi);
414 399
415 /* select VBI lines. 400 /* select VBI lines.
416 Note that the sliced argument seems to have no effect. */ 401 Note that the sliced argument seems to have no effect. */
@@ -446,9 +431,6 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
446 if (s->v4l2dev == NULL) 431 if (s->v4l2dev == NULL)
447 return -EINVAL; 432 return -EINVAL;
448 433
449 /* Big serialization lock to ensure no two streams are started
450 simultaneously: that can give all sorts of weird results. */
451 mutex_lock(&itv->serialize_lock);
452 IVTV_DEBUG_INFO("Start encoder stream %s\n", s->name); 434 IVTV_DEBUG_INFO("Start encoder stream %s\n", s->name);
453 435
454 switch (s->type) { 436 switch (s->type) {
@@ -490,7 +472,6 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
490 0, sizeof(itv->vbi.sliced_mpeg_size)); 472 0, sizeof(itv->vbi.sliced_mpeg_size));
491 break; 473 break;
492 default: 474 default:
493 mutex_unlock(&itv->serialize_lock);
494 return -EINVAL; 475 return -EINVAL;
495 } 476 }
496 s->subtype = subtype; 477 s->subtype = subtype;
@@ -503,6 +484,8 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
503 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags); 484 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
504 485
505 if (atomic_read(&itv->capturing) == 0) { 486 if (atomic_read(&itv->capturing) == 0) {
487 int digitizer;
488
506 /* Always use frame based mode. Experiments have demonstrated that byte 489 /* Always use frame based mode. Experiments have demonstrated that byte
507 stream based mode results in dropped frames and corruption. Not often, 490 stream based mode results in dropped frames and corruption. Not often,
508 but occasionally. Many thanks go to Leonard Orb who spent a lot of 491 but occasionally. Many thanks go to Leonard Orb who spent a lot of
@@ -528,7 +511,14 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
528 ivtv_vapi(itv, CX2341X_ENC_SET_PLACEHOLDER, 12, 511 ivtv_vapi(itv, CX2341X_ENC_SET_PLACEHOLDER, 12,
529 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); 512 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
530 513
531 ivtv_vapi(itv, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, itv->digitizer, itv->digitizer); 514 if (itv->card->hw_all & (IVTV_HW_SAA7115 | IVTV_HW_SAA717X))
515 digitizer = 0xF1;
516 else if (itv->card->hw_all & IVTV_HW_SAA7114)
517 digitizer = 0xEF;
518 else /* cx25840 */
519 digitizer = 0x140;
520
521 ivtv_vapi(itv, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, digitizer, digitizer);
532 522
533 /* Setup VBI */ 523 /* Setup VBI */
534 if (itv->v4l2_cap & V4L2_CAP_VBI_CAPTURE) { 524 if (itv->v4l2_cap & V4L2_CAP_VBI_CAPTURE) {
@@ -563,16 +553,16 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
563 clear_bit(IVTV_F_I_EOS, &itv->i_flags); 553 clear_bit(IVTV_F_I_EOS, &itv->i_flags);
564 554
565 /* Initialize Digitizer for Capture */ 555 /* Initialize Digitizer for Capture */
556 itv->video_dec_func(itv, VIDIOC_STREAMOFF, 0);
557 ivtv_msleep_timeout(300, 1);
566 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0); 558 ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0);
567 559 itv->video_dec_func(itv, VIDIOC_STREAMON, 0);
568 ivtv_msleep_timeout(100, 0);
569 } 560 }
570 561
571 /* begin_capture */ 562 /* begin_capture */
572 if (ivtv_vapi(itv, CX2341X_ENC_START_CAPTURE, 2, captype, subtype)) 563 if (ivtv_vapi(itv, CX2341X_ENC_START_CAPTURE, 2, captype, subtype))
573 { 564 {
574 IVTV_DEBUG_WARN( "Error starting capture!\n"); 565 IVTV_DEBUG_WARN( "Error starting capture!\n");
575 mutex_unlock(&itv->serialize_lock);
576 return -EINVAL; 566 return -EINVAL;
577 } 567 }
578 568
@@ -588,7 +578,6 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s)
588 578
589 /* you're live! sit back and await interrupts :) */ 579 /* you're live! sit back and await interrupts :) */
590 atomic_inc(&itv->capturing); 580 atomic_inc(&itv->capturing);
591 mutex_unlock(&itv->serialize_lock);
592 return 0; 581 return 0;
593} 582}
594 583
@@ -676,10 +665,10 @@ int ivtv_start_v4l2_decode_stream(struct ivtv_stream *s, int gop_offset)
676 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags); 665 clear_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
677 666
678 /* Zero out decoder counters */ 667 /* Zero out decoder counters */
679 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_FIELD_DISPLAYED].data[0]); 668 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[0]);
680 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_FIELD_DISPLAYED].data[1]); 669 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[1]);
681 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_FIELD_DISPLAYED].data[2]); 670 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[2]);
682 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_FIELD_DISPLAYED].data[3]); 671 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA_END].data[3]);
683 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[0]); 672 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[0]);
684 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[1]); 673 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[1]);
685 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[2]); 674 writel(0, &itv->dec_mbox.mbox[IVTV_MBOX_DMA].data[2]);
@@ -720,9 +709,7 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
720 struct ivtv *itv = s->itv; 709 struct ivtv *itv = s->itv;
721 DECLARE_WAITQUEUE(wait, current); 710 DECLARE_WAITQUEUE(wait, current);
722 int cap_type; 711 int cap_type;
723 unsigned long then;
724 int stopmode; 712 int stopmode;
725 u32 data[CX2341X_MBOX_MAX_DATA];
726 713
727 if (s->v4l2dev == NULL) 714 if (s->v4l2dev == NULL)
728 return -EINVAL; 715 return -EINVAL;
@@ -764,15 +751,13 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
764 /* when: 0 = end of GOP 1 = NOW!, type: 0 = mpeg, subtype: 3 = video+audio */ 751 /* when: 0 = end of GOP 1 = NOW!, type: 0 = mpeg, subtype: 3 = video+audio */
765 ivtv_vapi(itv, CX2341X_ENC_STOP_CAPTURE, 3, stopmode, cap_type, s->subtype); 752 ivtv_vapi(itv, CX2341X_ENC_STOP_CAPTURE, 3, stopmode, cap_type, s->subtype);
766 753
767 then = jiffies;
768
769 if (!test_bit(IVTV_F_S_PASSTHROUGH, &s->s_flags)) { 754 if (!test_bit(IVTV_F_S_PASSTHROUGH, &s->s_flags)) {
770 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && gop_end) { 755 if (s->type == IVTV_ENC_STREAM_TYPE_MPG && gop_end) {
771 /* only run these if we're shutting down the last cap */ 756 /* only run these if we're shutting down the last cap */
772 unsigned long duration; 757 unsigned long duration;
758 unsigned long then = jiffies;
773 759
774 then = jiffies; 760 add_wait_queue(&itv->eos_waitq, &wait);
775 add_wait_queue(&itv->cap_w, &wait);
776 761
777 set_current_state(TASK_INTERRUPTIBLE); 762 set_current_state(TASK_INTERRUPTIBLE);
778 763
@@ -798,31 +783,12 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
798 IVTV_DEBUG_INFO("%s: EOS took %lu ms to occur.\n", s->name, duration); 783 IVTV_DEBUG_INFO("%s: EOS took %lu ms to occur.\n", s->name, duration);
799 } 784 }
800 set_current_state(TASK_RUNNING); 785 set_current_state(TASK_RUNNING);
801 remove_wait_queue(&itv->cap_w, &wait); 786 remove_wait_queue(&itv->eos_waitq, &wait);
787 set_bit(IVTV_F_S_STREAMOFF, &s->s_flags);
802 } 788 }
803 789
804 then = jiffies; 790 /* Handle any pending interrupts */
805 /* Make sure DMA is complete */ 791 ivtv_msleep_timeout(100, 1);
806 add_wait_queue(&s->waitq, &wait);
807 do {
808 /* check if DMA is pending */
809 if ((s->type == IVTV_ENC_STREAM_TYPE_MPG) && /* MPG Only */
810 (read_reg(IVTV_REG_DMASTATUS) & 0x02)) {
811 /* Check for last DMA */
812 ivtv_vapi_result(itv, data, CX2341X_ENC_GET_SEQ_END, 2, 0, 0);
813
814 if (data[0] == 1) {
815 IVTV_DEBUG_DMA("%s: Last DMA of size 0x%08x\n", s->name, data[1]);
816 break;
817 }
818 } else if (read_reg(IVTV_REG_DMASTATUS) & 0x02) {
819 break;
820 }
821 } while (!ivtv_msleep_timeout(10, 1) &&
822 then + msecs_to_jiffies(2000) > jiffies);
823
824 set_current_state(TASK_RUNNING);
825 remove_wait_queue(&s->waitq, &wait);
826 } 792 }
827 793
828 atomic_dec(&itv->capturing); 794 atomic_dec(&itv->capturing);
@@ -830,19 +796,16 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
830 /* Clear capture and no-read bits */ 796 /* Clear capture and no-read bits */
831 clear_bit(IVTV_F_S_STREAMING, &s->s_flags); 797 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
832 798
833 /* ensure these global cleanup actions are done only once */
834 mutex_lock(&itv->serialize_lock);
835
836 if (s->type == IVTV_ENC_STREAM_TYPE_VBI) 799 if (s->type == IVTV_ENC_STREAM_TYPE_VBI)
837 ivtv_set_irq_mask(itv, IVTV_IRQ_ENC_VBI_CAP); 800 ivtv_set_irq_mask(itv, IVTV_IRQ_ENC_VBI_CAP);
838 801
839 if (atomic_read(&itv->capturing) > 0) { 802 if (atomic_read(&itv->capturing) > 0) {
840 mutex_unlock(&itv->serialize_lock);
841 return 0; 803 return 0;
842 } 804 }
843 805
844 /* Set the following Interrupt mask bits for capture */ 806 /* Set the following Interrupt mask bits for capture */
845 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_CAPTURE); 807 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_CAPTURE);
808 del_timer(&itv->dma_timer);
846 809
847 /* event notification (off) */ 810 /* event notification (off) */
848 if (test_and_clear_bit(IVTV_F_I_DIG_RST, &itv->i_flags)) { 811 if (test_and_clear_bit(IVTV_F_I_DIG_RST, &itv->i_flags)) {
@@ -853,7 +816,6 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end)
853 } 816 }
854 817
855 wake_up(&s->waitq); 818 wake_up(&s->waitq);
856 mutex_unlock(&itv->serialize_lock);
857 819
858 return 0; 820 return 0;
859} 821}
@@ -900,6 +862,7 @@ int ivtv_stop_v4l2_decode_stream(struct ivtv_stream *s, int flags, u64 pts)
900 ivtv_vapi(itv, CX2341X_DEC_SET_EVENT_NOTIFICATION, 4, 0, 0, IVTV_IRQ_DEC_AUD_MODE_CHG, -1); 862 ivtv_vapi(itv, CX2341X_DEC_SET_EVENT_NOTIFICATION, 4, 0, 0, IVTV_IRQ_DEC_AUD_MODE_CHG, -1);
901 863
902 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_DECODE); 864 ivtv_set_irq_mask(itv, IVTV_IRQ_MASK_DECODE);
865 del_timer(&itv->dma_timer);
903 866
904 clear_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags); 867 clear_bit(IVTV_F_S_NEEDS_DATA, &s->s_flags);
905 clear_bit(IVTV_F_S_STREAMING, &s->s_flags); 868 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
diff --git a/drivers/media/video/ivtv/ivtv-streams.h b/drivers/media/video/ivtv/ivtv-streams.h
index 8597b75384a7..8f5f5b1c7c89 100644
--- a/drivers/media/video/ivtv/ivtv-streams.h
+++ b/drivers/media/video/ivtv/ivtv-streams.h
@@ -18,6 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_STREAMS_H
22#define IVTV_STREAMS_H
23
21int ivtv_streams_setup(struct ivtv *itv); 24int ivtv_streams_setup(struct ivtv *itv);
22void ivtv_streams_cleanup(struct ivtv *itv); 25void ivtv_streams_cleanup(struct ivtv *itv);
23 26
@@ -29,3 +32,5 @@ int ivtv_stop_v4l2_decode_stream(struct ivtv_stream *s, int flags, u64 pts);
29 32
30void ivtv_stop_all_captures(struct ivtv *itv); 33void ivtv_stop_all_captures(struct ivtv *itv);
31int ivtv_passthrough_mode(struct ivtv *itv, int enable); 34int ivtv_passthrough_mode(struct ivtv *itv, int enable);
35
36#endif
diff --git a/drivers/media/video/ivtv/ivtv-udma.c b/drivers/media/video/ivtv/ivtv-udma.c
index bd642e1aafc3..c4626d1cdf41 100644
--- a/drivers/media/video/ivtv/ivtv-udma.c
+++ b/drivers/media/video/ivtv/ivtv-udma.c
@@ -21,7 +21,6 @@
21 */ 21 */
22 22
23#include "ivtv-driver.h" 23#include "ivtv-driver.h"
24#include "ivtv-streams.h"
25#include "ivtv-udma.h" 24#include "ivtv-udma.h"
26 25
27void ivtv_udma_get_page_info(struct ivtv_dma_page_info *dma_page, unsigned long first, unsigned long size) 26void ivtv_udma_get_page_info(struct ivtv_dma_page_info *dma_page, unsigned long first, unsigned long size)
@@ -38,19 +37,37 @@ void ivtv_udma_get_page_info(struct ivtv_dma_page_info *dma_page, unsigned long
38int ivtv_udma_fill_sg_list (struct ivtv_user_dma *dma, struct ivtv_dma_page_info *dma_page, int map_offset) 37int ivtv_udma_fill_sg_list (struct ivtv_user_dma *dma, struct ivtv_dma_page_info *dma_page, int map_offset)
39{ 38{
40 int i, offset; 39 int i, offset;
40 unsigned long flags;
41
42 if (map_offset < 0)
43 return map_offset;
41 44
42 offset = dma_page->offset; 45 offset = dma_page->offset;
43 46
44 /* Fill SG Array with new values */ 47 /* Fill SG Array with new values */
45 for (i = 0; i < dma_page->page_count; i++) { 48 for (i = 0; i < dma_page->page_count; i++) {
46 if (i == dma_page->page_count - 1) { 49 unsigned int len = (i == dma_page->page_count - 1) ?
47 dma->SGlist[map_offset].length = dma_page->tail; 50 dma_page->tail : PAGE_SIZE - offset;
51
52 dma->SGlist[map_offset].length = len;
53 dma->SGlist[map_offset].offset = offset;
54 if (PageHighMem(dma->map[map_offset])) {
55 void *src;
56
57 if (dma->bouncemap[map_offset] == NULL)
58 dma->bouncemap[map_offset] = alloc_page(GFP_KERNEL);
59 if (dma->bouncemap[map_offset] == NULL)
60 return -1;
61 local_irq_save(flags);
62 src = kmap_atomic(dma->map[map_offset], KM_BOUNCE_READ) + offset;
63 memcpy(page_address(dma->bouncemap[map_offset]) + offset, src, len);
64 kunmap_atomic(src, KM_BOUNCE_READ);
65 local_irq_restore(flags);
66 dma->SGlist[map_offset].page = dma->bouncemap[map_offset];
48 } 67 }
49 else { 68 else {
50 dma->SGlist[map_offset].length = PAGE_SIZE - offset; 69 dma->SGlist[map_offset].page = dma->map[map_offset];
51 } 70 }
52 dma->SGlist[map_offset].offset = offset;
53 dma->SGlist[map_offset].page = dma->map[map_offset];
54 offset = 0; 71 offset = 0;
55 map_offset++; 72 map_offset++;
56 } 73 }
@@ -89,7 +106,7 @@ int ivtv_udma_setup(struct ivtv *itv, unsigned long ivtv_dest_addr,
89{ 106{
90 struct ivtv_dma_page_info user_dma; 107 struct ivtv_dma_page_info user_dma;
91 struct ivtv_user_dma *dma = &itv->udma; 108 struct ivtv_user_dma *dma = &itv->udma;
92 int err; 109 int i, err;
93 110
94 IVTV_DEBUG_DMA("ivtv_udma_setup, dst: 0x%08x\n", (unsigned int)ivtv_dest_addr); 111 IVTV_DEBUG_DMA("ivtv_udma_setup, dst: 0x%08x\n", (unsigned int)ivtv_dest_addr);
95 112
@@ -123,7 +140,13 @@ int ivtv_udma_setup(struct ivtv *itv, unsigned long ivtv_dest_addr,
123 dma->page_count = user_dma.page_count; 140 dma->page_count = user_dma.page_count;
124 141
125 /* Fill SG List with new values */ 142 /* Fill SG List with new values */
126 ivtv_udma_fill_sg_list(dma, &user_dma, 0); 143 if (ivtv_udma_fill_sg_list(dma, &user_dma, 0) < 0) {
144 for (i = 0; i < dma->page_count; i++) {
145 put_page(dma->map[i]);
146 }
147 dma->page_count = 0;
148 return -ENOMEM;
149 }
127 150
128 /* Map SG List */ 151 /* Map SG List */
129 dma->SG_length = pci_map_sg(itv->dev, dma->SGlist, dma->page_count, PCI_DMA_TODEVICE); 152 dma->SG_length = pci_map_sg(itv->dev, dma->SGlist, dma->page_count, PCI_DMA_TODEVICE);
@@ -166,6 +189,8 @@ void ivtv_udma_unmap(struct ivtv *itv)
166 189
167void ivtv_udma_free(struct ivtv *itv) 190void ivtv_udma_free(struct ivtv *itv)
168{ 191{
192 int i;
193
169 /* Unmap SG Array */ 194 /* Unmap SG Array */
170 if (itv->udma.SG_handle) { 195 if (itv->udma.SG_handle) {
171 pci_unmap_single(itv->dev, itv->udma.SG_handle, 196 pci_unmap_single(itv->dev, itv->udma.SG_handle,
@@ -176,6 +201,11 @@ void ivtv_udma_free(struct ivtv *itv)
176 if (itv->udma.SG_length) { 201 if (itv->udma.SG_length) {
177 pci_unmap_sg(itv->dev, itv->udma.SGlist, itv->udma.page_count, PCI_DMA_TODEVICE); 202 pci_unmap_sg(itv->dev, itv->udma.SGlist, itv->udma.page_count, PCI_DMA_TODEVICE);
178 } 203 }
204
205 for (i = 0; i < IVTV_DMA_SG_OSD_ENT; i++) {
206 if (itv->udma.bouncemap[i])
207 __free_page(itv->udma.bouncemap[i]);
208 }
179} 209}
180 210
181void ivtv_udma_start(struct ivtv *itv) 211void ivtv_udma_start(struct ivtv *itv)
diff --git a/drivers/media/video/ivtv/ivtv-udma.h b/drivers/media/video/ivtv/ivtv-udma.h
index e131bccedec0..df727e23be0a 100644
--- a/drivers/media/video/ivtv/ivtv-udma.h
+++ b/drivers/media/video/ivtv/ivtv-udma.h
@@ -18,6 +18,9 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_UDMA_H
22#define IVTV_UDMA_H
23
21/* User DMA functions */ 24/* User DMA functions */
22void ivtv_udma_get_page_info(struct ivtv_dma_page_info *dma_page, unsigned long first, unsigned long size); 25void ivtv_udma_get_page_info(struct ivtv_dma_page_info *dma_page, unsigned long first, unsigned long size);
23int ivtv_udma_fill_sg_list(struct ivtv_user_dma *dma, struct ivtv_dma_page_info *dma_page, int map_offset); 26int ivtv_udma_fill_sg_list(struct ivtv_user_dma *dma, struct ivtv_dma_page_info *dma_page, int map_offset);
@@ -41,3 +44,5 @@ static inline void ivtv_udma_sync_for_cpu(struct ivtv *itv)
41 pci_dma_sync_single_for_cpu((struct pci_dev *)itv->dev, itv->udma.SG_handle, 44 pci_dma_sync_single_for_cpu((struct pci_dev *)itv->dev, itv->udma.SG_handle,
42 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); 45 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE);
43} 46}
47
48#endif
diff --git a/drivers/media/video/ivtv/ivtv-vbi.c b/drivers/media/video/ivtv/ivtv-vbi.c
index a7282a91bd97..c151bcf5519a 100644
--- a/drivers/media/video/ivtv/ivtv-vbi.c
+++ b/drivers/media/video/ivtv/ivtv-vbi.c
@@ -18,10 +18,69 @@
18 */ 18 */
19 19
20#include "ivtv-driver.h" 20#include "ivtv-driver.h"
21#include "ivtv-video.h" 21#include "ivtv-i2c.h"
22#include "ivtv-vbi.h"
23#include "ivtv-ioctl.h" 22#include "ivtv-ioctl.h"
24#include "ivtv-queue.h" 23#include "ivtv-queue.h"
24#include "ivtv-vbi.h"
25
26static void ivtv_set_vps(struct ivtv *itv, int enabled)
27{
28 struct v4l2_sliced_vbi_data data;
29
30 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
31 return;
32 data.id = V4L2_SLICED_VPS;
33 data.field = 0;
34 data.line = enabled ? 16 : 0;
35 data.data[2] = itv->vbi.vps_payload.data[0];
36 data.data[8] = itv->vbi.vps_payload.data[1];
37 data.data[9] = itv->vbi.vps_payload.data[2];
38 data.data[10] = itv->vbi.vps_payload.data[3];
39 data.data[11] = itv->vbi.vps_payload.data[4];
40 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
41}
42
43static void ivtv_set_cc(struct ivtv *itv, int mode, const struct vbi_cc *cc)
44{
45 struct v4l2_sliced_vbi_data data;
46
47 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
48 return;
49 data.id = V4L2_SLICED_CAPTION_525;
50 data.field = 0;
51 data.line = (mode & 1) ? 21 : 0;
52 data.data[0] = cc->odd[0];
53 data.data[1] = cc->odd[1];
54 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
55 data.field = 1;
56 data.line = (mode & 2) ? 21 : 0;
57 data.data[0] = cc->even[0];
58 data.data[1] = cc->even[1];
59 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
60}
61
62static void ivtv_set_wss(struct ivtv *itv, int enabled, int mode)
63{
64 struct v4l2_sliced_vbi_data data;
65
66 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
67 return;
68 /* When using a 50 Hz system, always turn on the
69 wide screen signal with 4x3 ratio as the default.
70 Turning this signal on and off can confuse certain
71 TVs. As far as I can tell there is no reason not to
72 transmit this signal. */
73 if ((itv->std & V4L2_STD_625_50) && !enabled) {
74 enabled = 1;
75 mode = 0x08; /* 4x3 full format */
76 }
77 data.id = V4L2_SLICED_WSS_625;
78 data.field = 0;
79 data.line = enabled ? 23 : 0;
80 data.data[0] = mode & 0xff;
81 data.data[1] = (mode >> 8) & 0xff;
82 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
83}
25 84
26static int odd_parity(u8 c) 85static int odd_parity(u8 c)
27{ 86{
@@ -32,62 +91,50 @@ static int odd_parity(u8 c)
32 return c & 1; 91 return c & 1;
33} 92}
34 93
35static void passthrough_vbi_data(struct ivtv *itv, int cnt) 94void ivtv_write_vbi(struct ivtv *itv, const struct v4l2_sliced_vbi_data *sliced, size_t cnt)
36{ 95{
37 int wss = 0; 96 struct vbi_info *vi = &itv->vbi;
38 u8 cc[4] = { 0x80, 0x80, 0x80, 0x80 }; 97 struct vbi_cc cc = { .odd = { 0x80, 0x80 }, .even = { 0x80, 0x80 } };
39 u8 vps[13];
40 int found_cc = 0; 98 int found_cc = 0;
41 int found_wss = 0; 99 size_t i;
42 int found_vps = 0;
43 int cc_pos = itv->vbi.cc_pos;
44 int i;
45 100
46 for (i = 0; i < cnt; i++) { 101 for (i = 0; i < cnt; i++) {
47 struct v4l2_sliced_vbi_data *d = itv->vbi.sliced_dec_data + i; 102 const struct v4l2_sliced_vbi_data *d = sliced + i;
48 103
49 if (d->id == V4L2_SLICED_CAPTION_525 && d->line == 21) { 104 if (d->id == V4L2_SLICED_CAPTION_525 && d->line == 21) {
50 found_cc = 1;
51 if (d->field) { 105 if (d->field) {
52 cc[2] = d->data[0]; 106 cc.even[0] = d->data[0];
53 cc[3] = d->data[1]; 107 cc.even[1] = d->data[1];
54 } else { 108 } else {
55 cc[0] = d->data[0]; 109 cc.odd[0] = d->data[0];
56 cc[1] = d->data[1]; 110 cc.odd[1] = d->data[1];
57 } 111 }
112 found_cc = 1;
58 } 113 }
59 else if (d->id == V4L2_SLICED_VPS && d->line == 16 && d->field == 0) { 114 else if (d->id == V4L2_SLICED_VPS && d->line == 16 && d->field == 0) {
60 memcpy(vps, d->data, sizeof(vps)); 115 struct vbi_vps vps;
61 found_vps = 1; 116
117 vps.data[0] = d->data[2];
118 vps.data[1] = d->data[8];
119 vps.data[2] = d->data[9];
120 vps.data[3] = d->data[10];
121 vps.data[4] = d->data[11];
122 if (memcmp(&vps, &vi->vps_payload, sizeof(vps))) {
123 vi->vps_payload = vps;
124 set_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags);
125 }
62 } 126 }
63 else if (d->id == V4L2_SLICED_WSS_625 && d->line == 23 && d->field == 0) { 127 else if (d->id == V4L2_SLICED_WSS_625 && d->line == 23 && d->field == 0) {
64 wss = d->data[0] | d->data[1] << 8; 128 int wss = d->data[0] | d->data[1] << 8;
65 found_wss = 1;
66 }
67 }
68
69 if (itv->vbi.wss_found != found_wss || itv->vbi.wss != wss) {
70 itv->vbi.wss = wss;
71 itv->vbi.wss_found = found_wss;
72 set_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags);
73 }
74 129
75 if (found_vps || itv->vbi.vps_found) { 130 if (vi->wss_payload != wss) {
76 itv->vbi.vps[0] = vps[2]; 131 vi->wss_payload = wss;
77 itv->vbi.vps[1] = vps[8]; 132 set_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags);
78 itv->vbi.vps[2] = vps[9]; 133 }
79 itv->vbi.vps[3] = vps[10]; 134 }
80 itv->vbi.vps[4] = vps[11];
81 itv->vbi.vps_found = found_vps;
82 set_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags);
83 } 135 }
84 136 if (found_cc && vi->cc_payload_idx < sizeof(vi->cc_payload)) {
85 if (found_cc && cc_pos < sizeof(itv->vbi.cc_data_even)) { 137 vi->cc_payload[vi->cc_payload_idx++] = cc;
86 itv->vbi.cc_data_odd[cc_pos] = cc[0];
87 itv->vbi.cc_data_odd[cc_pos + 1] = cc[1];
88 itv->vbi.cc_data_even[cc_pos] = cc[2];
89 itv->vbi.cc_data_even[cc_pos + 1] = cc[3];
90 itv->vbi.cc_pos = cc_pos + 2;
91 set_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags); 138 set_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags);
92 } 139 }
93} 140}
@@ -163,8 +210,8 @@ static int ivtv_convert_ivtv_vbi(struct ivtv *itv, u8 *p)
163 linemask[1] = 0xf; 210 linemask[1] = 0xf;
164 p += 4; 211 p += 4;
165 } else { 212 } else {
166 /* unknown VBI data stream */ 213 /* unknown VBI data, convert to empty VBI frame */
167 return 0; 214 linemask[0] = linemask[1] = 0;
168 } 215 }
169 for (i = 0; i < 36; i++) { 216 for (i = 0; i < 36; i++) {
170 int err = 0; 217 int err = 0;
@@ -211,69 +258,6 @@ static int ivtv_convert_ivtv_vbi(struct ivtv *itv, u8 *p)
211 return line * sizeof(itv->vbi.sliced_dec_data[0]); 258 return line * sizeof(itv->vbi.sliced_dec_data[0]);
212} 259}
213 260
214ssize_t ivtv_write_vbi(struct ivtv *itv, const char __user *ubuf, size_t count)
215{
216 /* Should be a __user pointer, but sparse doesn't parse this bit correctly. */
217 const struct v4l2_sliced_vbi_data *p = (const struct v4l2_sliced_vbi_data *)ubuf;
218 u8 cc[4] = { 0x80, 0x80, 0x80, 0x80 };
219 int found_cc = 0;
220 int cc_pos = itv->vbi.cc_pos;
221
222 while (count >= sizeof(struct v4l2_sliced_vbi_data)) {
223 switch (p->id) {
224 case V4L2_SLICED_CAPTION_525:
225 if (p->line == 21) {
226 found_cc = 1;
227 if (p->field) {
228 cc[2] = p->data[0];
229 cc[3] = p->data[1];
230 } else {
231 cc[0] = p->data[0];
232 cc[1] = p->data[1];
233 }
234 }
235 break;
236
237 case V4L2_SLICED_VPS:
238 if (p->line == 16 && p->field == 0) {
239 itv->vbi.vps[0] = p->data[2];
240 itv->vbi.vps[1] = p->data[8];
241 itv->vbi.vps[2] = p->data[9];
242 itv->vbi.vps[3] = p->data[10];
243 itv->vbi.vps[4] = p->data[11];
244 itv->vbi.vps_found = 1;
245 set_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags);
246 }
247 break;
248
249 case V4L2_SLICED_WSS_625:
250 if (p->line == 23 && p->field == 0) {
251 /* No lock needed for WSS */
252 itv->vbi.wss = p->data[0] | (p->data[1] << 8);
253 itv->vbi.wss_found = 1;
254 set_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags);
255 }
256 break;
257
258 default:
259 break;
260 }
261 count -= sizeof(*p);
262 p++;
263 }
264
265 if (found_cc && cc_pos < sizeof(itv->vbi.cc_data_even)) {
266 itv->vbi.cc_data_odd[cc_pos] = cc[0];
267 itv->vbi.cc_data_odd[cc_pos + 1] = cc[1];
268 itv->vbi.cc_data_even[cc_pos] = cc[2];
269 itv->vbi.cc_data_even[cc_pos + 1] = cc[3];
270 itv->vbi.cc_pos = cc_pos + 2;
271 set_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags);
272 }
273
274 return (const char __user *)p - ubuf;
275}
276
277/* Compress raw VBI format, removes leading SAV codes and surplus space after the 261/* Compress raw VBI format, removes leading SAV codes and surplus space after the
278 field. 262 field.
279 Returns new compressed size. */ 263 Returns new compressed size. */
@@ -422,108 +406,95 @@ void ivtv_process_vbi_data(struct ivtv *itv, struct ivtv_buffer *buf,
422 memcpy(buf->buf, itv->vbi.sliced_dec_data, cnt); 406 memcpy(buf->buf, itv->vbi.sliced_dec_data, cnt);
423 buf->bytesused = cnt; 407 buf->bytesused = cnt;
424 408
425 passthrough_vbi_data(itv, cnt / sizeof(itv->vbi.sliced_dec_data[0])); 409 ivtv_write_vbi(itv, itv->vbi.sliced_dec_data,
410 cnt / sizeof(itv->vbi.sliced_dec_data[0]));
426 return; 411 return;
427 } 412 }
428} 413}
429 414
430void ivtv_disable_vbi(struct ivtv *itv) 415void ivtv_disable_cc(struct ivtv *itv)
431{ 416{
432 clear_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags); 417 struct vbi_cc cc = { .odd = { 0x80, 0x80 }, .even = { 0x80, 0x80 } };
433 clear_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags); 418
434 clear_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags); 419 clear_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags);
435 ivtv_set_wss(itv, 0, 0); 420 ivtv_set_cc(itv, 0, &cc);
436 ivtv_set_cc(itv, 0, 0, 0, 0, 0); 421 itv->vbi.cc_payload_idx = 0;
437 ivtv_set_vps(itv, 0, 0, 0, 0, 0, 0);
438 itv->vbi.vps_found = itv->vbi.wss_found = 0;
439 itv->vbi.wss = 0;
440 itv->vbi.cc_pos = 0;
441} 422}
442 423
443 424
444void ivtv_vbi_work_handler(struct ivtv *itv) 425void ivtv_vbi_work_handler(struct ivtv *itv)
445{ 426{
427 struct vbi_info *vi = &itv->vbi;
446 struct v4l2_sliced_vbi_data data; 428 struct v4l2_sliced_vbi_data data;
429 struct vbi_cc cc = { .odd = { 0x80, 0x80 }, .even = { 0x80, 0x80 } };
447 430
448 /* Lock */ 431 /* Lock */
449 if (itv->output_mode == OUT_PASSTHROUGH) { 432 if (itv->output_mode == OUT_PASSTHROUGH) {
450 /* Note: currently only the saa7115 is used in a PVR350,
451 so these commands are for now saa7115 specific. */
452 if (itv->is_50hz) { 433 if (itv->is_50hz) {
453 data.id = V4L2_SLICED_WSS_625; 434 data.id = V4L2_SLICED_WSS_625;
454 data.field = 0; 435 data.field = 0;
455 436
456 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) { 437 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) {
457 ivtv_set_wss(itv, 1, data.data[0] & 0xf); 438 ivtv_set_wss(itv, 1, data.data[0] & 0xf);
458 itv->vbi.wss_no_update = 0; 439 vi->wss_missing_cnt = 0;
459 } else if (itv->vbi.wss_no_update == 4) { 440 } else if (vi->wss_missing_cnt == 4) {
460 ivtv_set_wss(itv, 1, 0x8); /* 4x3 full format */ 441 ivtv_set_wss(itv, 1, 0x8); /* 4x3 full format */
461 } else { 442 } else {
462 itv->vbi.wss_no_update++; 443 vi->wss_missing_cnt++;
463 } 444 }
464 } 445 }
465 else { 446 else {
466 u8 c1 = 0, c2 = 0, c3 = 0, c4 = 0;
467 int mode = 0; 447 int mode = 0;
468 448
469 data.id = V4L2_SLICED_CAPTION_525; 449 data.id = V4L2_SLICED_CAPTION_525;
470 data.field = 0; 450 data.field = 0;
471 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) { 451 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) {
472 mode |= 1; 452 mode |= 1;
473 c1 = data.data[0]; 453 cc.odd[0] = data.data[0];
474 c2 = data.data[1]; 454 cc.odd[1] = data.data[1];
475 } 455 }
476 data.field = 1; 456 data.field = 1;
477 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) { 457 if (itv->video_dec_func(itv, VIDIOC_INT_G_VBI_DATA, &data) == 0) {
478 mode |= 2; 458 mode |= 2;
479 c3 = data.data[0]; 459 cc.even[0] = data.data[0];
480 c4 = data.data[1]; 460 cc.even[1] = data.data[1];
481 } 461 }
482 if (mode) { 462 if (mode) {
483 itv->vbi.cc_no_update = 0; 463 vi->cc_missing_cnt = 0;
484 ivtv_set_cc(itv, mode, c1, c2, c3, c4); 464 ivtv_set_cc(itv, mode, &cc);
485 } else if (itv->vbi.cc_no_update == 4) { 465 } else if (vi->cc_missing_cnt == 4) {
486 ivtv_set_cc(itv, 0, 0, 0, 0, 0); 466 ivtv_set_cc(itv, 0, &cc);
487 } else { 467 } else {
488 itv->vbi.cc_no_update++; 468 vi->cc_missing_cnt++;
489 } 469 }
490 } 470 }
491 return; 471 return;
492 } 472 }
493 473
494 if (test_and_clear_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags)) { 474 if (test_and_clear_bit(IVTV_F_I_UPDATE_WSS, &itv->i_flags)) {
495 /* Lock */ 475 ivtv_set_wss(itv, 1, vi->wss_payload & 0xf);
496 ivtv_set_wss(itv, itv->vbi.wss_found, itv->vbi.wss & 0xf);
497 } 476 }
498 477
499 if (test_and_clear_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags)) { 478 if (test_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags)) {
500 if (itv->vbi.cc_pos == 0) { 479 if (vi->cc_payload_idx == 0) {
501 ivtv_set_cc(itv, 3, 0x80, 0x80, 0x80, 0x80); 480 clear_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags);
481 ivtv_set_cc(itv, 3, &cc);
502 } 482 }
503 while (itv->vbi.cc_pos) { 483 while (vi->cc_payload_idx) {
504 u8 cc_odd0 = itv->vbi.cc_data_odd[0]; 484 cc = vi->cc_payload[0];
505 u8 cc_odd1 = itv->vbi.cc_data_odd[1]; 485
506 u8 cc_even0 = itv->vbi.cc_data_even[0]; 486 memcpy(vi->cc_payload, vi->cc_payload + 1,
507 u8 cc_even1 = itv->vbi.cc_data_even[1]; 487 sizeof(vi->cc_payload) - sizeof(vi->cc_payload[0]));
508 488 vi->cc_payload_idx--;
509 memcpy(itv->vbi.cc_data_odd, itv->vbi.cc_data_odd + 2, sizeof(itv->vbi.cc_data_odd) - 2); 489 if (vi->cc_payload_idx && cc.odd[0] == 0x80 && cc.odd[1] == 0x80)
510 memcpy(itv->vbi.cc_data_even, itv->vbi.cc_data_even + 2, sizeof(itv->vbi.cc_data_even) - 2);
511 itv->vbi.cc_pos -= 2;
512 if (itv->vbi.cc_pos && cc_odd0 == 0x80 && cc_odd1 == 0x80)
513 continue; 490 continue;
514 491
515 /* Send to Saa7127 */ 492 ivtv_set_cc(itv, 3, &cc);
516 ivtv_set_cc(itv, 3, cc_odd0, cc_odd1, cc_even0, cc_even1);
517 if (itv->vbi.cc_pos == 0)
518 set_bit(IVTV_F_I_UPDATE_CC, &itv->i_flags);
519 break; 493 break;
520 } 494 }
521 } 495 }
522 496
523 if (test_and_clear_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags)) { 497 if (test_and_clear_bit(IVTV_F_I_UPDATE_VPS, &itv->i_flags)) {
524 /* Lock */ 498 ivtv_set_vps(itv, 1);
525 ivtv_set_vps(itv, itv->vbi.vps_found,
526 itv->vbi.vps[0], itv->vbi.vps[1],
527 itv->vbi.vps[2], itv->vbi.vps[3], itv->vbi.vps[4]);
528 } 499 }
529} 500}
diff --git a/drivers/media/video/ivtv/ivtv-vbi.h b/drivers/media/video/ivtv/ivtv-vbi.h
index ec211b49702c..970567b9194d 100644
--- a/drivers/media/video/ivtv/ivtv-vbi.h
+++ b/drivers/media/video/ivtv/ivtv-vbi.h
@@ -17,10 +17,15 @@
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20ssize_t ivtv_write_vbi(struct ivtv *itv, const char __user *ubuf, size_t count); 20#ifndef IVTV_VBI_H
21#define IVTV_VBI_H
22
23void ivtv_write_vbi(struct ivtv *itv, const struct v4l2_sliced_vbi_data *sliced, size_t count);
21void ivtv_process_vbi_data(struct ivtv *itv, struct ivtv_buffer *buf, 24void ivtv_process_vbi_data(struct ivtv *itv, struct ivtv_buffer *buf,
22 u64 pts_stamp, int streamtype); 25 u64 pts_stamp, int streamtype);
23int ivtv_used_line(struct ivtv *itv, int line, int field); 26int ivtv_used_line(struct ivtv *itv, int line, int field);
24void ivtv_disable_vbi(struct ivtv *itv); 27void ivtv_disable_cc(struct ivtv *itv);
25void ivtv_set_vbi(unsigned long arg); 28void ivtv_set_vbi(unsigned long arg);
26void ivtv_vbi_work_handler(struct ivtv *itv); 29void ivtv_vbi_work_handler(struct ivtv *itv);
30
31#endif
diff --git a/drivers/media/video/ivtv/ivtv-version.h b/drivers/media/video/ivtv/ivtv-version.h
index 85530a3cd369..d050de2a7229 100644
--- a/drivers/media/video/ivtv/ivtv-version.h
+++ b/drivers/media/video/ivtv/ivtv-version.h
@@ -17,10 +17,15 @@
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20#ifndef IVTV_VERSION_H
21#define IVTV_VERSION_H
22
20#define IVTV_DRIVER_NAME "ivtv" 23#define IVTV_DRIVER_NAME "ivtv"
21#define IVTV_DRIVER_VERSION_MAJOR 1 24#define IVTV_DRIVER_VERSION_MAJOR 1
22#define IVTV_DRIVER_VERSION_MINOR 0 25#define IVTV_DRIVER_VERSION_MINOR 1
23#define IVTV_DRIVER_VERSION_PATCHLEVEL 0 26#define IVTV_DRIVER_VERSION_PATCHLEVEL 0
24 27
25#define IVTV_VERSION __stringify(IVTV_DRIVER_VERSION_MAJOR) "." __stringify(IVTV_DRIVER_VERSION_MINOR) "." __stringify(IVTV_DRIVER_VERSION_PATCHLEVEL) 28#define IVTV_VERSION __stringify(IVTV_DRIVER_VERSION_MAJOR) "." __stringify(IVTV_DRIVER_VERSION_MINOR) "." __stringify(IVTV_DRIVER_VERSION_PATCHLEVEL)
26#define IVTV_DRIVER_VERSION KERNEL_VERSION(IVTV_DRIVER_VERSION_MAJOR,IVTV_DRIVER_VERSION_MINOR,IVTV_DRIVER_VERSION_PATCHLEVEL) 29#define IVTV_DRIVER_VERSION KERNEL_VERSION(IVTV_DRIVER_VERSION_MAJOR,IVTV_DRIVER_VERSION_MINOR,IVTV_DRIVER_VERSION_PATCHLEVEL)
30
31#endif
diff --git a/drivers/media/video/ivtv/ivtv-video.c b/drivers/media/video/ivtv/ivtv-video.c
deleted file mode 100644
index 5858b197d510..000000000000
--- a/drivers/media/video/ivtv/ivtv-video.c
+++ /dev/null
@@ -1,142 +0,0 @@
1/*
2 saa7127 interface functions
3 Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include "ivtv-driver.h"
21#include "ivtv-video.h"
22#include "ivtv-i2c.h"
23#include "ivtv-gpio.h"
24#include "ivtv-cards.h"
25#include <media/upd64031a.h>
26#include <media/upd64083.h>
27
28void ivtv_set_vps(struct ivtv *itv, int enabled, u8 vps1, u8 vps2, u8 vps3,
29 u8 vps4, u8 vps5)
30{
31 struct v4l2_sliced_vbi_data data;
32
33 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
34 return;
35 data.id = V4L2_SLICED_VPS;
36 data.field = 0;
37 data.line = enabled ? 16 : 0;
38 data.data[4] = vps1;
39 data.data[10] = vps2;
40 data.data[11] = vps3;
41 data.data[12] = vps4;
42 data.data[13] = vps5;
43 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
44}
45
46void ivtv_set_cc(struct ivtv *itv, int mode, u8 cc1, u8 cc2, u8 cc3, u8 cc4)
47{
48 struct v4l2_sliced_vbi_data data;
49
50 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
51 return;
52 data.id = V4L2_SLICED_CAPTION_525;
53 data.field = 0;
54 data.line = (mode & 1) ? 21 : 0;
55 data.data[0] = cc1;
56 data.data[1] = cc2;
57 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
58 data.field = 1;
59 data.line = (mode & 2) ? 21 : 0;
60 data.data[0] = cc3;
61 data.data[1] = cc4;
62 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
63}
64
65void ivtv_set_wss(struct ivtv *itv, int enabled, int mode)
66{
67 struct v4l2_sliced_vbi_data data;
68
69 if (!(itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT))
70 return;
71 /* When using a 50 Hz system, always turn on the
72 wide screen signal with 4x3 ratio as the default.
73 Turning this signal on and off can confuse certain
74 TVs. As far as I can tell there is no reason not to
75 transmit this signal. */
76 if ((itv->std & V4L2_STD_625_50) && !enabled) {
77 enabled = 1;
78 mode = 0x08; /* 4x3 full format */
79 }
80 data.id = V4L2_SLICED_WSS_625;
81 data.field = 0;
82 data.line = enabled ? 23 : 0;
83 data.data[0] = mode & 0xff;
84 data.data[1] = (mode >> 8) & 0xff;
85 ivtv_saa7127(itv, VIDIOC_INT_S_VBI_DATA, &data);
86}
87
88void ivtv_video_set_io(struct ivtv *itv)
89{
90 struct v4l2_routing route;
91 int inp = itv->active_input;
92 u32 type;
93
94 route.input = itv->card->video_inputs[inp].video_input;
95 route.output = 0;
96 itv->video_dec_func(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
97
98 type = itv->card->video_inputs[inp].video_type;
99
100 if (type == IVTV_CARD_INPUT_VID_TUNER) {
101 route.input = 0; /* Tuner */
102 } else if (type < IVTV_CARD_INPUT_COMPOSITE1) {
103 route.input = 2; /* S-Video */
104 } else {
105 route.input = 1; /* Composite */
106 }
107
108 if (itv->card->hw_video & IVTV_HW_GPIO)
109 ivtv_gpio(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
110
111 if (itv->card->hw_video & IVTV_HW_UPD64031A) {
112 if (type == IVTV_CARD_INPUT_VID_TUNER ||
113 type >= IVTV_CARD_INPUT_COMPOSITE1) {
114 /* Composite: GR on, connect to 3DYCS */
115 route.input = UPD64031A_GR_ON | UPD64031A_3DYCS_COMPOSITE;
116 } else {
117 /* S-Video: GR bypassed, turn it off */
118 route.input = UPD64031A_GR_OFF | UPD64031A_3DYCS_DISABLE;
119 }
120 route.input |= itv->card->gr_config;
121
122 ivtv_upd64031a(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
123 }
124
125 if (itv->card->hw_video & IVTV_HW_UPD6408X) {
126 route.input = UPD64083_YCS_MODE;
127 if (type > IVTV_CARD_INPUT_VID_TUNER &&
128 type < IVTV_CARD_INPUT_COMPOSITE1) {
129 /* S-Video uses YCNR mode and internal Y-ADC, the upd64031a
130 is not used. */
131 route.input |= UPD64083_YCNR_MODE;
132 }
133 else if (itv->card->hw_video & IVTV_HW_UPD64031A) {
134 /* Use upd64031a output for tuner and composite(CX23416GYC only) inputs */
135 if ((type == IVTV_CARD_INPUT_VID_TUNER)||
136 (itv->card->type == IVTV_CARD_CX23416GYC)) {
137 route.input |= UPD64083_EXT_Y_ADC;
138 }
139 }
140 ivtv_upd64083(itv, VIDIOC_INT_S_VIDEO_ROUTING, &route);
141 }
142}
diff --git a/drivers/media/video/ivtv/ivtv-video.h b/drivers/media/video/ivtv/ivtv-video.h
deleted file mode 100644
index c8ade5d3c413..000000000000
--- a/drivers/media/video/ivtv/ivtv-video.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 saa7127 interface functions
3 Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20void ivtv_set_wss(struct ivtv *itv, int enabled, int mode);
21void ivtv_set_cc(struct ivtv *itv, int mode, u8 cc1, u8 cc2, u8 cc3, u8 cc4);
22void ivtv_set_vps(struct ivtv *itv, int enabled, u8 vps1, u8 vps2, u8 vps3,
23 u8 vps4, u8 vps5);
24void ivtv_video_set_io(struct ivtv *itv);
diff --git a/drivers/media/video/ivtv/ivtv-yuv.c b/drivers/media/video/ivtv/ivtv-yuv.c
index bcea09542e5a..e2288f224ab6 100644
--- a/drivers/media/video/ivtv/ivtv-yuv.c
+++ b/drivers/media/video/ivtv/ivtv-yuv.c
@@ -19,11 +19,16 @@
19 */ 19 */
20 20
21#include "ivtv-driver.h" 21#include "ivtv-driver.h"
22#include "ivtv-queue.h"
23#include "ivtv-udma.h" 22#include "ivtv-udma.h"
24#include "ivtv-irq.h"
25#include "ivtv-yuv.h" 23#include "ivtv-yuv.h"
26 24
25const u32 yuv_offset[4] = {
26 IVTV_YUV_BUFFER_OFFSET,
27 IVTV_YUV_BUFFER_OFFSET_1,
28 IVTV_YUV_BUFFER_OFFSET_2,
29 IVTV_YUV_BUFFER_OFFSET_3
30};
31
27static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, 32static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma,
28 struct ivtv_dma_frame *args) 33 struct ivtv_dma_frame *args)
29{ 34{
@@ -37,7 +42,7 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma,
37 int y_decode_height, uv_decode_height, y_size; 42 int y_decode_height, uv_decode_height, y_size;
38 int frame = atomic_read(&itv->yuv_info.next_fill_frame); 43 int frame = atomic_read(&itv->yuv_info.next_fill_frame);
39 44
40 y_buffer_offset = IVTV_DEC_MEM_START + yuv_offset[frame]; 45 y_buffer_offset = IVTV_DECODER_OFFSET + yuv_offset[frame];
41 uv_buffer_offset = y_buffer_offset + IVTV_YUV_BUFFER_UV_OFFSET; 46 uv_buffer_offset = y_buffer_offset + IVTV_YUV_BUFFER_UV_OFFSET;
42 47
43 y_decode_height = uv_decode_height = args->src.height + args->src.top; 48 y_decode_height = uv_decode_height = args->src.height + args->src.top;
@@ -83,7 +88,14 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma,
83 } 88 }
84 89
85 /* Fill & map SG List */ 90 /* Fill & map SG List */
86 ivtv_udma_fill_sg_list (dma, &uv_dma, ivtv_udma_fill_sg_list (dma, &y_dma, 0)); 91 if (ivtv_udma_fill_sg_list (dma, &uv_dma, ivtv_udma_fill_sg_list (dma, &y_dma, 0)) < 0) {
92 IVTV_DEBUG_WARN("could not allocate bounce buffers for highmem userspace buffers\n");
93 for (i = 0; i < dma->page_count; i++) {
94 put_page(dma->map[i]);
95 }
96 dma->page_count = 0;
97 return -ENOMEM;
98 }
87 dma->SG_length = pci_map_sg(itv->dev, dma->SGlist, dma->page_count, PCI_DMA_TODEVICE); 99 dma->SG_length = pci_map_sg(itv->dev, dma->SGlist, dma->page_count, PCI_DMA_TODEVICE);
88 100
89 /* Fill SG Array with new values */ 101 /* Fill SG Array with new values */
@@ -94,7 +106,7 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma,
94 if (itv->yuv_info.blanking_dmaptr) { 106 if (itv->yuv_info.blanking_dmaptr) {
95 dma->SGarray[dma->SG_length].size = cpu_to_le32(720*16); 107 dma->SGarray[dma->SG_length].size = cpu_to_le32(720*16);
96 dma->SGarray[dma->SG_length].src = cpu_to_le32(itv->yuv_info.blanking_dmaptr); 108 dma->SGarray[dma->SG_length].src = cpu_to_le32(itv->yuv_info.blanking_dmaptr);
97 dma->SGarray[dma->SG_length].dst = cpu_to_le32(IVTV_DEC_MEM_START + yuv_offset[frame]); 109 dma->SGarray[dma->SG_length].dst = cpu_to_le32(IVTV_DECODER_OFFSET + yuv_offset[frame]);
98 dma->SG_length++; 110 dma->SG_length++;
99 } 111 }
100 } 112 }
@@ -612,7 +624,6 @@ static void ivtv_yuv_handle_vertical(struct ivtv *itv, struct yuv_frame_info *wi
612 itv->yuv_info.v_filter_2 = v_filter_2; 624 itv->yuv_info.v_filter_2 = v_filter_2;
613 } 625 }
614 626
615 itv->yuv_info.frame_interlaced_last = itv->yuv_info.frame_interlaced;
616} 627}
617 628
618/* Modify the supplied coordinate information to fit the visible osd area */ 629/* Modify the supplied coordinate information to fit the visible osd area */
@@ -799,6 +810,7 @@ static u32 ivtv_yuv_window_setup (struct ivtv *itv, struct yuv_frame_info *windo
799 (itv->yuv_info.old_frame_info.src_y != window->src_y) || 810 (itv->yuv_info.old_frame_info.src_y != window->src_y) ||
800 (itv->yuv_info.old_frame_info.pan_y != window->pan_y) || 811 (itv->yuv_info.old_frame_info.pan_y != window->pan_y) ||
801 (itv->yuv_info.old_frame_info.vis_h != window->vis_h) || 812 (itv->yuv_info.old_frame_info.vis_h != window->vis_h) ||
813 (itv->yuv_info.old_frame_info.lace_mode != window->lace_mode) ||
802 (itv->yuv_info.old_frame_info.interlaced_y != window->interlaced_y) || 814 (itv->yuv_info.old_frame_info.interlaced_y != window->interlaced_y) ||
803 (itv->yuv_info.old_frame_info.interlaced_uv != window->interlaced_uv)) { 815 (itv->yuv_info.old_frame_info.interlaced_uv != window->interlaced_uv)) {
804 yuv_update |= IVTV_YUV_UPDATE_VERTICAL; 816 yuv_update |= IVTV_YUV_UPDATE_VERTICAL;
@@ -898,8 +910,21 @@ static void ivtv_yuv_init (struct ivtv *itv)
898 itv->yuv_info.decode_height = 480; 910 itv->yuv_info.decode_height = 480;
899 911
900 /* If no visible size set, assume full size */ 912 /* If no visible size set, assume full size */
901 if (!itv->yuv_info.osd_vis_w) itv->yuv_info.osd_vis_w = 720 - itv->yuv_info.osd_x_offset; 913 if (!itv->yuv_info.osd_vis_w)
902 if (!itv->yuv_info.osd_vis_h) itv->yuv_info.osd_vis_h = itv->yuv_info.decode_height - itv->yuv_info.osd_y_offset; 914 itv->yuv_info.osd_vis_w = 720 - itv->yuv_info.osd_x_offset;
915
916 if (!itv->yuv_info.osd_vis_h) {
917 itv->yuv_info.osd_vis_h = itv->yuv_info.decode_height - itv->yuv_info.osd_y_offset;
918 } else {
919 /* If output video standard has changed, requested height may
920 not be legal */
921 if (itv->yuv_info.osd_vis_h + itv->yuv_info.osd_y_offset > itv->yuv_info.decode_height) {
922 IVTV_DEBUG_WARN("Clipping yuv output - fb size (%d) exceeds video standard limit (%d)\n",
923 itv->yuv_info.osd_vis_h + itv->yuv_info.osd_y_offset,
924 itv->yuv_info.decode_height);
925 itv->yuv_info.osd_vis_h = itv->yuv_info.decode_height - itv->yuv_info.osd_y_offset;
926 }
927 }
903 928
904 /* We need a buffer for blanking when Y plane is offset - non-fatal if we can't get one */ 929 /* We need a buffer for blanking when Y plane is offset - non-fatal if we can't get one */
905 itv->yuv_info.blanking_ptr = kzalloc(720*16,GFP_KERNEL); 930 itv->yuv_info.blanking_ptr = kzalloc(720*16,GFP_KERNEL);
@@ -927,6 +952,7 @@ int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args)
927 int rc = 0; 952 int rc = 0;
928 int got_sig = 0; 953 int got_sig = 0;
929 int frame, next_fill_frame, last_fill_frame; 954 int frame, next_fill_frame, last_fill_frame;
955 int register_update = 0;
930 956
931 IVTV_DEBUG_INFO("yuv_prep_frame\n"); 957 IVTV_DEBUG_INFO("yuv_prep_frame\n");
932 958
@@ -940,6 +966,7 @@ int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args)
940 /* Buffers are full - Overwrite the last frame */ 966 /* Buffers are full - Overwrite the last frame */
941 next_fill_frame = frame; 967 next_fill_frame = frame;
942 frame = (frame - 1) & 3; 968 frame = (frame - 1) & 3;
969 register_update = itv->yuv_info.new_frame_info[frame].update;
943 } 970 }
944 971
945 /* Take a snapshot of the yuv coordinate information */ 972 /* Take a snapshot of the yuv coordinate information */
@@ -955,6 +982,9 @@ int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args)
955 itv->yuv_info.new_frame_info[frame].tru_w = args->src_width; 982 itv->yuv_info.new_frame_info[frame].tru_w = args->src_width;
956 itv->yuv_info.new_frame_info[frame].tru_h = args->src_height; 983 itv->yuv_info.new_frame_info[frame].tru_h = args->src_height;
957 984
985 /* Snapshot field order */
986 itv->yuv_info.sync_field[frame] = itv->yuv_info.lace_sync_field;
987
958 /* Are we going to offset the Y plane */ 988 /* Are we going to offset the Y plane */
959 if (args->src.height + args->src.top < 512-16) 989 if (args->src.height + args->src.top < 512-16)
960 itv->yuv_info.new_frame_info[frame].offset_y = 1; 990 itv->yuv_info.new_frame_info[frame].offset_y = 1;
@@ -970,6 +1000,7 @@ int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args)
970 itv->yuv_info.new_frame_info[frame].update = 0; 1000 itv->yuv_info.new_frame_info[frame].update = 0;
971 itv->yuv_info.new_frame_info[frame].interlaced_y = 0; 1001 itv->yuv_info.new_frame_info[frame].interlaced_y = 0;
972 itv->yuv_info.new_frame_info[frame].interlaced_uv = 0; 1002 itv->yuv_info.new_frame_info[frame].interlaced_uv = 0;
1003 itv->yuv_info.new_frame_info[frame].lace_mode = itv->yuv_info.lace_mode;
973 1004
974 if (memcmp (&itv->yuv_info.old_frame_info_args, &itv->yuv_info.new_frame_info[frame], 1005 if (memcmp (&itv->yuv_info.old_frame_info_args, &itv->yuv_info.new_frame_info[frame],
975 sizeof (itv->yuv_info.new_frame_info[frame]))) { 1006 sizeof (itv->yuv_info.new_frame_info[frame]))) {
@@ -978,6 +1009,14 @@ int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args)
978/* IVTV_DEBUG_YUV ("Requesting register update for frame %d\n",frame); */ 1009/* IVTV_DEBUG_YUV ("Requesting register update for frame %d\n",frame); */
979 } 1010 }
980 1011
1012 itv->yuv_info.new_frame_info[frame].update |= register_update;
1013
1014 /* Should this frame be delayed ? */
1015 if (itv->yuv_info.sync_field[frame] != itv->yuv_info.sync_field[(frame - 1) & 3])
1016 itv->yuv_info.field_delay[frame] = 1;
1017 else
1018 itv->yuv_info.field_delay[frame] = 0;
1019
981 /* DMA the frame */ 1020 /* DMA the frame */
982 mutex_lock(&itv->udma.lock); 1021 mutex_lock(&itv->udma.lock);
983 1022
diff --git a/drivers/media/video/ivtv/ivtv-yuv.h b/drivers/media/video/ivtv/ivtv-yuv.h
index 88972d3f77c4..f7215eeca018 100644
--- a/drivers/media/video/ivtv/ivtv-yuv.h
+++ b/drivers/media/video/ivtv/ivtv-yuv.h
@@ -18,7 +18,28 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef IVTV_YUV_H
22#define IVTV_YUV_H
23
24/* Buffers on hardware offsets */
25#define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */
26#define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */
27#define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
28#define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
29#define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
30
31/* Offset to filter table in firmware */
32#define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
33#define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
34
35#define IVTV_YUV_UPDATE_HORIZONTAL 0x01
36#define IVTV_YUV_UPDATE_VERTICAL 0x02
37
38extern const u32 yuv_offset[4];
39
21int ivtv_yuv_filter_check(struct ivtv *itv); 40int ivtv_yuv_filter_check(struct ivtv *itv);
22int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args); 41int ivtv_yuv_prep_frame(struct ivtv *itv, struct ivtv_dma_frame *args);
23void ivtv_yuv_close(struct ivtv *itv); 42void ivtv_yuv_close(struct ivtv *itv);
24void ivtv_yuv_work_handler (struct ivtv *itv); 43void ivtv_yuv_work_handler (struct ivtv *itv);
44
45#endif
diff --git a/drivers/media/video/ivtv/ivtvfb.c b/drivers/media/video/ivtv/ivtvfb.c
new file mode 100644
index 000000000000..9684048fe56c
--- /dev/null
+++ b/drivers/media/video/ivtv/ivtvfb.c
@@ -0,0 +1,1190 @@
1/*
2 On Screen Display cx23415 Framebuffer driver
3
4 This module presents the cx23415 OSD (onscreen display) framebuffer memory
5 as a standard Linux /dev/fb style framebuffer device. The framebuffer has
6 support for 8, 16 & 32 bpp packed pixel formats with alpha channel. In 16bpp
7 mode, there is a choice of a three color depths (12, 15 or 16 bits), but no
8 local alpha. The colorspace is selectable between rgb & yuv.
9 Depending on the TV standard configured in the ivtv module at load time,
10 the initial resolution is either 640x400 (NTSC) or 640x480 (PAL) at 8bpp.
11 Video timings are locked to ensure a vertical refresh rate of 50Hz (PAL)
12 or 59.94 (NTSC)
13
14 Copyright (c) 2003 Matt T. Yourst <yourst@yourst.com>
15
16 Derived from drivers/video/vesafb.c
17 Portions (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
18
19 2.6 kernel port:
20 Copyright (C) 2004 Matthias Badaire
21
22 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
23
24 Copyright (C) 2006 Ian Armstrong <ian@iarmst.demon.co.uk>
25
26 This program is free software; you can redistribute it and/or modify
27 it under the terms of the GNU General Public License as published by
28 the Free Software Foundation; either version 2 of the License, or
29 (at your option) any later version.
30
31 This program is distributed in the hope that it will be useful,
32 but WITHOUT ANY WARRANTY; without even the implied warranty of
33 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 GNU General Public License for more details.
35
36 You should have received a copy of the GNU General Public License
37 along with this program; if not, write to the Free Software
38 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 */
40
41#include <linux/module.h>
42#include <linux/kernel.h>
43#include <linux/fb.h>
44#include <linux/ivtvfb.h>
45
46#ifdef CONFIG_MTRR
47#include <asm/mtrr.h>
48#endif
49
50#include "ivtv-driver.h"
51#include "ivtv-udma.h"
52#include "ivtv-mailbox.h"
53
54/* card parameters */
55static int ivtvfb_card_id = -1;
56static int ivtvfb_debug = 0;
57static int osd_laced;
58static int osd_compat;
59static int osd_depth;
60static int osd_upper;
61static int osd_left;
62static int osd_yres;
63static int osd_xres;
64
65module_param(ivtvfb_card_id, int, 0444);
66module_param_named(debug,ivtvfb_debug, int, 0644);
67module_param(osd_laced, bool, 0444);
68module_param(osd_compat, bool, 0444);
69module_param(osd_depth, int, 0444);
70module_param(osd_upper, int, 0444);
71module_param(osd_left, int, 0444);
72module_param(osd_yres, int, 0444);
73module_param(osd_xres, int, 0444);
74
75MODULE_PARM_DESC(ivtvfb_card_id,
76 "Only use framebuffer of the specified ivtv card (0-31)\n"
77 "\t\t\tdefault -1: initialize all available framebuffers");
78
79MODULE_PARM_DESC(debug,
80 "Debug level (bitmask). Default: errors only\n"
81 "\t\t\t(debug = 3 gives full debugging)");
82
83MODULE_PARM_DESC(osd_compat,
84 "Compatibility mode - Display size is locked (use for old X drivers)\n"
85 "\t\t\t0=off\n"
86 "\t\t\t1=on\n"
87 "\t\t\tdefault off");
88
89/* Why upper, left, xres, yres, depth, laced ? To match terminology used
90 by fbset.
91 Why start at 1 for left & upper coordinate ? Because X doesn't allow 0 */
92
93MODULE_PARM_DESC(osd_laced,
94 "Interlaced mode\n"
95 "\t\t\t0=off\n"
96 "\t\t\t1=on\n"
97 "\t\t\tdefault off");
98
99MODULE_PARM_DESC(osd_depth,
100 "Bits per pixel - 8, 16, 32\n"
101 "\t\t\tdefault 8");
102
103MODULE_PARM_DESC(osd_upper,
104 "Vertical start position\n"
105 "\t\t\tdefault 0 (Centered)");
106
107MODULE_PARM_DESC(osd_left,
108 "Horizontal start position\n"
109 "\t\t\tdefault 0 (Centered)");
110
111MODULE_PARM_DESC(osd_yres,
112 "Display height\n"
113 "\t\t\tdefault 480 (PAL)\n"
114 "\t\t\t 400 (NTSC)");
115
116MODULE_PARM_DESC(osd_xres,
117 "Display width\n"
118 "\t\t\tdefault 640");
119
120MODULE_AUTHOR("Kevin Thayer, Chris Kennedy, Hans Verkuil, John Harvey, Ian Armstrong");
121MODULE_LICENSE("GPL");
122
123/* --------------------------------------------------------------------- */
124
125#define IVTVFB_DBGFLG_WARN (1 << 0)
126#define IVTVFB_DBGFLG_INFO (1 << 1)
127
128#define IVTVFB_DEBUG(x, type, fmt, args...) \
129 do { \
130 if ((x) & ivtvfb_debug) \
131 printk(KERN_INFO "ivtvfb%d " type ": " fmt, itv->num , ## args); \
132 } while (0)
133#define IVTVFB_DEBUG_WARN(fmt, args...) IVTVFB_DEBUG(IVTVFB_DBGFLG_WARN, "warning", fmt , ## args)
134#define IVTVFB_DEBUG_INFO(fmt, args...) IVTVFB_DEBUG(IVTVFB_DBGFLG_INFO, "info", fmt , ## args)
135
136/* Standard kernel messages */
137#define IVTVFB_ERR(fmt, args...) printk(KERN_ERR "ivtvfb%d: " fmt, itv->num , ## args)
138#define IVTVFB_WARN(fmt, args...) printk(KERN_WARNING "ivtvfb%d: " fmt, itv->num , ## args)
139#define IVTVFB_INFO(fmt, args...) printk(KERN_INFO "ivtvfb%d: " fmt, itv->num , ## args)
140
141/* --------------------------------------------------------------------- */
142
143#define IVTV_OSD_MAX_WIDTH 720
144#define IVTV_OSD_MAX_HEIGHT 576
145
146#define IVTV_OSD_BPP_8 0x00
147#define IVTV_OSD_BPP_16_444 0x03
148#define IVTV_OSD_BPP_16_555 0x02
149#define IVTV_OSD_BPP_16_565 0x01
150#define IVTV_OSD_BPP_32 0x04
151
152struct osd_info {
153 /* Physical base address */
154 unsigned long video_pbase;
155 /* Relative base address (relative to start of decoder memory) */
156 u32 video_rbase;
157 /* Mapped base address */
158 volatile char __iomem *video_vbase;
159 /* Buffer size */
160 u32 video_buffer_size;
161
162#ifdef CONFIG_MTRR
163 /* video_base rounded down as required by hardware MTRRs */
164 unsigned long fb_start_aligned_physaddr;
165 /* video_base rounded up as required by hardware MTRRs */
166 unsigned long fb_end_aligned_physaddr;
167#endif
168
169 /* Current osd mode */
170 int osd_mode;
171
172 /* Store the buffer offset */
173 int set_osd_coords_x;
174 int set_osd_coords_y;
175
176 /* Current dimensions (NOT VISIBLE SIZE!) */
177 int display_width;
178 int display_height;
179 int display_byte_stride;
180
181 /* Current bits per pixel */
182 int bits_per_pixel;
183 int bytes_per_pixel;
184
185 /* Frame buffer stuff */
186 struct fb_info ivtvfb_info;
187 struct fb_var_screeninfo ivtvfb_defined;
188 struct fb_fix_screeninfo ivtvfb_fix;
189};
190
191struct ivtv_osd_coords {
192 unsigned long offset;
193 unsigned long max_offset;
194 int pixel_stride;
195 int lines;
196 int x;
197 int y;
198};
199
200/* --------------------------------------------------------------------- */
201
202/* ivtv API calls for framebuffer related support */
203
204static int ivtvfb_get_framebuffer(struct ivtv *itv, u32 *fbbase,
205 u32 *fblength)
206{
207 u32 data[CX2341X_MBOX_MAX_DATA];
208 int rc;
209
210 rc = ivtv_vapi_result(itv, data, CX2341X_OSD_GET_FRAMEBUFFER, 0);
211 *fbbase = data[0];
212 *fblength = data[1];
213 return rc;
214}
215
216static int ivtvfb_get_osd_coords(struct ivtv *itv,
217 struct ivtv_osd_coords *osd)
218{
219 struct osd_info *oi = itv->osd_info;
220 u32 data[CX2341X_MBOX_MAX_DATA];
221
222 ivtv_vapi_result(itv, data, CX2341X_OSD_GET_OSD_COORDS, 0);
223
224 osd->offset = data[0] - oi->video_rbase;
225 osd->max_offset = oi->display_width * oi->display_height * 4;
226 osd->pixel_stride = data[1];
227 osd->lines = data[2];
228 osd->x = data[3];
229 osd->y = data[4];
230 return 0;
231}
232
233static int ivtvfb_set_osd_coords(struct ivtv *itv, const struct ivtv_osd_coords *osd)
234{
235 struct osd_info *oi = itv->osd_info;
236
237 oi->display_width = osd->pixel_stride;
238 oi->display_byte_stride = osd->pixel_stride * oi->bytes_per_pixel;
239 oi->set_osd_coords_x += osd->x;
240 oi->set_osd_coords_y = osd->y;
241
242 return ivtv_vapi(itv, CX2341X_OSD_SET_OSD_COORDS, 5,
243 osd->offset + oi->video_rbase,
244 osd->pixel_stride,
245 osd->lines, osd->x, osd->y);
246}
247
248static int ivtvfb_set_display_window(struct ivtv *itv, struct v4l2_rect *ivtv_window)
249{
250 int osd_height_limit = itv->is_50hz ? 576 : 480;
251
252 /* Only fail if resolution too high, otherwise fudge the start coords. */
253 if ((ivtv_window->height > osd_height_limit) || (ivtv_window->width > IVTV_OSD_MAX_WIDTH))
254 return -EINVAL;
255
256 /* Ensure we don't exceed display limits */
257 if (ivtv_window->top + ivtv_window->height > osd_height_limit) {
258 IVTVFB_DEBUG_WARN("ivtv_ioctl_fb_set_display_window - Invalid height setting (%d, %d)\n",
259 ivtv_window->top, ivtv_window->height);
260 ivtv_window->top = osd_height_limit - ivtv_window->height;
261 }
262
263 if (ivtv_window->left + ivtv_window->width > IVTV_OSD_MAX_WIDTH) {
264 IVTVFB_DEBUG_WARN("ivtv_ioctl_fb_set_display_window - Invalid width setting (%d, %d)\n",
265 ivtv_window->left, ivtv_window->width);
266 ivtv_window->left = IVTV_OSD_MAX_WIDTH - ivtv_window->width;
267 }
268
269 /* Set the OSD origin */
270 write_reg((ivtv_window->top << 16) | ivtv_window->left, 0x02a04);
271
272 /* How much to display */
273 write_reg(((ivtv_window->top+ivtv_window->height) << 16) | (ivtv_window->left+ivtv_window->width), 0x02a08);
274
275 /* Pass this info back the yuv handler */
276 itv->yuv_info.osd_vis_w = ivtv_window->width;
277 itv->yuv_info.osd_vis_h = ivtv_window->height;
278 itv->yuv_info.osd_x_offset = ivtv_window->left;
279 itv->yuv_info.osd_y_offset = ivtv_window->top;
280
281 return 0;
282}
283
284static int ivtvfb_prep_dec_dma_to_device(struct ivtv *itv,
285 unsigned long ivtv_dest_addr, void __user *userbuf,
286 int size_in_bytes)
287{
288 DEFINE_WAIT(wait);
289 int ret = 0;
290 int got_sig = 0;
291
292 mutex_lock(&itv->udma.lock);
293 /* Map User DMA */
294 if (ivtv_udma_setup(itv, ivtv_dest_addr, userbuf, size_in_bytes) <= 0) {
295 mutex_unlock(&itv->udma.lock);
296 IVTVFB_WARN("ivtvfb_prep_dec_dma_to_device, "
297 "Error with get_user_pages: %d bytes, %d pages returned\n",
298 size_in_bytes, itv->udma.page_count);
299
300 /* get_user_pages must have failed completely */
301 return -EIO;
302 }
303
304 IVTVFB_DEBUG_INFO("ivtvfb_prep_dec_dma_to_device, %d bytes, %d pages\n",
305 size_in_bytes, itv->udma.page_count);
306
307 ivtv_udma_prepare(itv);
308 prepare_to_wait(&itv->dma_waitq, &wait, TASK_INTERRUPTIBLE);
309 /* if no UDMA is pending and no UDMA is in progress, then the DMA
310 is finished */
311 while (itv->i_flags & (IVTV_F_I_UDMA_PENDING | IVTV_F_I_UDMA)) {
312 /* don't interrupt if the DMA is in progress but break off
313 a still pending DMA. */
314 got_sig = signal_pending(current);
315 if (got_sig && test_and_clear_bit(IVTV_F_I_UDMA_PENDING, &itv->i_flags))
316 break;
317 got_sig = 0;
318 schedule();
319 }
320 finish_wait(&itv->dma_waitq, &wait);
321
322 /* Unmap Last DMA Xfer */
323 ivtv_udma_unmap(itv);
324 mutex_unlock(&itv->udma.lock);
325 if (got_sig) {
326 IVTV_DEBUG_INFO("User stopped OSD\n");
327 return -EINTR;
328 }
329
330 return ret;
331}
332
333static int ivtvfb_prep_frame(struct ivtv *itv, int cmd, void __user *source,
334 unsigned long dest_offset, int count)
335{
336 DEFINE_WAIT(wait);
337 struct osd_info *oi = itv->osd_info;
338
339 /* Nothing to do */
340 if (count == 0) {
341 IVTVFB_DEBUG_WARN("ivtvfb_prep_frame: Nothing to do. count = 0\n");
342 return -EINVAL;
343 }
344
345 /* Check Total FB Size */
346 if ((dest_offset + count) > oi->video_buffer_size) {
347 IVTVFB_WARN("ivtvfb_prep_frame: Overflowing the framebuffer %ld, only %d available\n",
348 dest_offset + count, oi->video_buffer_size);
349 return -E2BIG;
350 }
351
352 /* Not fatal, but will have undesirable results */
353 if ((unsigned long)source & 3)
354 IVTVFB_WARN("ivtvfb_prep_frame: Source address not 32 bit aligned (0x%08lx)\n",
355 (unsigned long)source);
356
357 if (dest_offset & 3)
358 IVTVFB_WARN("ivtvfb_prep_frame: Dest offset not 32 bit aligned (%ld)\n", dest_offset);
359
360 if (count & 3)
361 IVTVFB_WARN("ivtvfb_prep_frame: Count not a multiple of 4 (%d)\n", count);
362
363 /* Check Source */
364 if (!access_ok(VERIFY_READ, source + dest_offset, count)) {
365 IVTVFB_WARN("Invalid userspace pointer 0x%08lx\n",
366 (unsigned long)source);
367
368 IVTVFB_DEBUG_WARN("access_ok() failed for offset 0x%08lx source 0x%08lx count %d\n",
369 dest_offset, (unsigned long)source,
370 count);
371 return -EINVAL;
372 }
373
374 /* OSD Address to send DMA to */
375 dest_offset += IVTV_DECODER_OFFSET + oi->video_rbase;
376
377 /* Fill Buffers */
378 return ivtvfb_prep_dec_dma_to_device(itv, dest_offset, source, count);
379}
380
381static int ivtvfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
382{
383 DEFINE_WAIT(wait);
384 struct ivtv *itv = (struct ivtv *)info->par;
385 int rc = 0;
386
387 switch (cmd) {
388 case FBIOGET_VBLANK: {
389 struct fb_vblank vblank;
390 u32 trace;
391
392 vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT |
393 FB_VBLANK_HAVE_VSYNC;
394 trace = read_reg(0x028c0) >> 16;
395 if (itv->is_50hz && trace > 312) trace -= 312;
396 else if (itv->is_60hz && trace > 262) trace -= 262;
397 if (trace == 1) vblank.flags |= FB_VBLANK_VSYNCING;
398 vblank.count = itv->last_vsync_field;
399 vblank.vcount = trace;
400 vblank.hcount = 0;
401 if (copy_to_user((void __user *)arg, &vblank, sizeof(vblank)))
402 return -EFAULT;
403 return 0;
404 }
405
406 case FBIO_WAITFORVSYNC:
407 prepare_to_wait(&itv->vsync_waitq, &wait, TASK_INTERRUPTIBLE);
408 if (!schedule_timeout(msecs_to_jiffies(50))) rc = -ETIMEDOUT;
409 finish_wait(&itv->vsync_waitq, &wait);
410 return rc;
411
412 case IVTVFB_IOC_DMA_FRAME: {
413 struct ivtvfb_dma_frame args;
414
415 IVTVFB_DEBUG_INFO("IVTVFB_IOC_DMA_FRAME\n");
416 if (copy_from_user(&args, (void __user *)arg, sizeof(args)))
417 return -EFAULT;
418
419 return ivtvfb_prep_frame(itv, cmd, args.source, args.dest_offset, args.count);
420 }
421
422 default:
423 IVTVFB_DEBUG_INFO("Unknown ioctl %08x\n", cmd);
424 return -EINVAL;
425 }
426 return 0;
427}
428
429/* Framebuffer device handling */
430
431static int ivtvfb_set_var(struct ivtv *itv, struct fb_var_screeninfo *var)
432{
433 struct osd_info *oi = itv->osd_info;
434 struct ivtv_osd_coords ivtv_osd;
435 struct v4l2_rect ivtv_window;
436 int osd_mode = -1;
437
438 IVTVFB_DEBUG_INFO("ivtvfb_set_var\n");
439
440 /* Select color space */
441 if (var->nonstd) /* YUV */
442 write_reg(read_reg(0x02a00) | 0x0002000, 0x02a00);
443 else /* RGB */
444 write_reg(read_reg(0x02a00) & ~0x0002000, 0x02a00);
445
446 /* Set the color mode */
447 switch (var->bits_per_pixel) {
448 case 8:
449 osd_mode = IVTV_OSD_BPP_8;
450 break;
451 case 32:
452 osd_mode = IVTV_OSD_BPP_32;
453 break;
454 case 16:
455 switch (var->green.length) {
456 case 4:
457 osd_mode = IVTV_OSD_BPP_16_444;
458 break;
459 case 5:
460 osd_mode = IVTV_OSD_BPP_16_555;
461 break;
462 case 6:
463 osd_mode = IVTV_OSD_BPP_16_565;
464 break;
465 default:
466 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid bpp\n");
467 }
468 break;
469 default:
470 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid bpp\n");
471 }
472
473 /* Change osd mode if needed.
474 Although rare, things can go wrong. The extra mode
475 change seems to help... */
476 if (osd_mode != -1 && osd_mode != oi->osd_mode) {
477 ivtv_vapi(itv, CX2341X_OSD_SET_PIXEL_FORMAT, 1, 0);
478 ivtv_vapi(itv, CX2341X_OSD_SET_PIXEL_FORMAT, 1, osd_mode);
479 oi->osd_mode = osd_mode;
480 }
481
482 oi->bits_per_pixel = var->bits_per_pixel;
483 oi->bytes_per_pixel = var->bits_per_pixel / 8;
484
485 /* Set the flicker filter */
486 switch (var->vmode & FB_VMODE_MASK) {
487 case FB_VMODE_NONINTERLACED: /* Filter on */
488 ivtv_vapi(itv, CX2341X_OSD_SET_FLICKER_STATE, 1, 1);
489 break;
490 case FB_VMODE_INTERLACED: /* Filter off */
491 ivtv_vapi(itv, CX2341X_OSD_SET_FLICKER_STATE, 1, 0);
492 break;
493 default:
494 IVTVFB_DEBUG_WARN("ivtvfb_set_var - Invalid video mode\n");
495 }
496
497 /* Read the current osd info */
498 ivtvfb_get_osd_coords(itv, &ivtv_osd);
499
500 /* Now set the OSD to the size we want */
501 ivtv_osd.pixel_stride = var->xres_virtual;
502 ivtv_osd.lines = var->yres_virtual;
503 ivtv_osd.x = 0;
504 ivtv_osd.y = 0;
505 ivtvfb_set_osd_coords(itv, &ivtv_osd);
506
507 /* Can't seem to find the right API combo for this.
508 Use another function which does what we need through direct register access. */
509 ivtv_window.width = var->xres;
510 ivtv_window.height = var->yres;
511
512 /* Minimum margin cannot be 0, as X won't allow such a mode */
513 if (!var->upper_margin) var->upper_margin++;
514 if (!var->left_margin) var->left_margin++;
515 ivtv_window.top = var->upper_margin - 1;
516 ivtv_window.left = var->left_margin - 1;
517
518 ivtvfb_set_display_window(itv, &ivtv_window);
519
520 /* Force update of yuv registers */
521 itv->yuv_info.yuv_forced_update = 1;
522
523 IVTVFB_DEBUG_INFO("Display size: %dx%d (virtual %dx%d) @ %dbpp\n",
524 var->xres, var->yres,
525 var->xres_virtual, var->yres_virtual,
526 var->bits_per_pixel);
527
528 IVTVFB_DEBUG_INFO("Display position: %d, %d\n",
529 var->left_margin, var->upper_margin);
530
531 IVTVFB_DEBUG_INFO("Display filter: %s\n",
532 (var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED ? "on" : "off");
533 IVTVFB_DEBUG_INFO("Color space: %s\n", var->nonstd ? "YUV" : "RGB");
534
535 return 0;
536}
537
538static int ivtvfb_get_fix(struct ivtv *itv, struct fb_fix_screeninfo *fix)
539{
540 struct osd_info *oi = itv->osd_info;
541
542 IVTVFB_DEBUG_INFO("ivtvfb_get_fix\n");
543 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
544 strcpy(fix->id, "cx23415 TV out");
545 fix->smem_start = oi->video_pbase;
546 fix->smem_len = oi->video_buffer_size;
547 fix->type = FB_TYPE_PACKED_PIXELS;
548 fix->visual = (oi->bits_per_pixel == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
549 fix->xpanstep = 1;
550 fix->ypanstep = 1;
551 fix->ywrapstep = 0;
552 fix->line_length = oi->display_byte_stride;
553 fix->accel = FB_ACCEL_NONE;
554 return 0;
555}
556
557/* Check the requested display mode, returning -EINVAL if we can't
558 handle it. */
559
560static int _ivtvfb_check_var(struct fb_var_screeninfo *var, struct ivtv *itv)
561{
562 struct osd_info *oi = itv->osd_info;
563 int osd_height_limit;
564 u32 pixclock, hlimit, vlimit;
565
566 IVTVFB_DEBUG_INFO("ivtvfb_check_var\n");
567
568 /* Set base references for mode calcs. */
569 if (itv->is_50hz) {
570 pixclock = 84316;
571 hlimit = 776;
572 vlimit = 591;
573 osd_height_limit = 576;
574 }
575 else {
576 pixclock = 83926;
577 hlimit = 776;
578 vlimit = 495;
579 osd_height_limit = 480;
580 }
581
582 /* Check the bits per pixel */
583 if (osd_compat) {
584 if (var->bits_per_pixel != 32) {
585 IVTVFB_DEBUG_WARN("Invalid colour mode: %d\n", var->bits_per_pixel);
586 return -EINVAL;
587 }
588 }
589
590 if (var->bits_per_pixel == 8 || var->bits_per_pixel == 32) {
591 var->transp.offset = 24;
592 var->transp.length = 8;
593 var->red.offset = 16;
594 var->red.length = 8;
595 var->green.offset = 8;
596 var->green.length = 8;
597 var->blue.offset = 0;
598 var->blue.length = 8;
599 }
600 else if (var->bits_per_pixel == 16) {
601 /* To find out the true mode, check green length */
602 switch (var->green.length) {
603 case 4:
604 var->red.offset = 8;
605 var->red.length = 4;
606 var->green.offset = 4;
607 var->green.length = 4;
608 var->blue.offset = 0;
609 var->blue.length = 4;
610 var->transp.offset = 12;
611 var->transp.length = 1;
612 break;
613 case 5:
614 var->red.offset = 10;
615 var->red.length = 5;
616 var->green.offset = 5;
617 var->green.length = 5;
618 var->blue.offset = 0;
619 var->blue.length = 5;
620 var->transp.offset = 15;
621 var->transp.length = 1;
622 break;
623 default:
624 var->red.offset = 11;
625 var->red.length = 5;
626 var->green.offset = 5;
627 var->green.length = 6;
628 var->blue.offset = 0;
629 var->blue.length = 5;
630 var->transp.offset = 0;
631 var->transp.length = 0;
632 break;
633 }
634 }
635 else {
636 IVTVFB_DEBUG_WARN("Invalid colour mode: %d\n", var->bits_per_pixel);
637 return -EINVAL;
638 }
639
640 /* Check the resolution */
641 if (osd_compat) {
642 if (var->xres != oi->ivtvfb_defined.xres ||
643 var->yres != oi->ivtvfb_defined.yres ||
644 var->xres_virtual != oi->ivtvfb_defined.xres_virtual ||
645 var->yres_virtual != oi->ivtvfb_defined.yres_virtual) {
646 IVTVFB_DEBUG_WARN("Invalid resolution: %dx%d (virtual %dx%d)\n",
647 var->xres, var->yres, var->xres_virtual, var->yres_virtual);
648 return -EINVAL;
649 }
650 }
651 else {
652 if (var->xres > IVTV_OSD_MAX_WIDTH || var->yres > osd_height_limit) {
653 IVTVFB_DEBUG_WARN("Invalid resolution: %dx%d\n",
654 var->xres, var->yres);
655 return -EINVAL;
656 }
657
658 /* Max horizontal size is 1023 @ 32bpp, 2046 & 16bpp, 4092 @ 8bpp */
659 if (var->xres_virtual > 4095 / (var->bits_per_pixel / 8) ||
660 var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8) > oi->video_buffer_size ||
661 var->xres_virtual < var->xres ||
662 var->yres_virtual < var->yres) {
663 IVTVFB_DEBUG_WARN("Invalid virtual resolution: %dx%d\n",
664 var->xres_virtual, var->yres_virtual);
665 return -EINVAL;
666 }
667 }
668
669 /* Some extra checks if in 8 bit mode */
670 if (var->bits_per_pixel == 8) {
671 /* Width must be a multiple of 4 */
672 if (var->xres & 3) {
673 IVTVFB_DEBUG_WARN("Invalid resolution for 8bpp: %d\n", var->xres);
674 return -EINVAL;
675 }
676 if (var->xres_virtual & 3) {
677 IVTVFB_DEBUG_WARN("Invalid virtual resolution for 8bpp: %d)\n", var->xres_virtual);
678 return -EINVAL;
679 }
680 }
681 else if (var->bits_per_pixel == 16) {
682 /* Width must be a multiple of 2 */
683 if (var->xres & 1) {
684 IVTVFB_DEBUG_WARN("Invalid resolution for 16bpp: %d\n", var->xres);
685 return -EINVAL;
686 }
687 if (var->xres_virtual & 1) {
688 IVTVFB_DEBUG_WARN("Invalid virtual resolution for 16bpp: %d)\n", var->xres_virtual);
689 return -EINVAL;
690 }
691 }
692
693 /* Now check the offsets */
694 if (var->xoffset >= var->xres_virtual || var->yoffset >= var->yres_virtual) {
695 IVTVFB_DEBUG_WARN("Invalid offset: %d (%d) %d (%d)\n",
696 var->xoffset, var->xres_virtual, var->yoffset, var->yres_virtual);
697 return -EINVAL;
698 }
699
700 /* Check pixel format */
701 if (var->nonstd > 1) {
702 IVTVFB_DEBUG_WARN("Invalid nonstd % d\n", var->nonstd);
703 return -EINVAL;
704 }
705
706 /* Check video mode */
707 if (((var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) &&
708 ((var->vmode & FB_VMODE_MASK) != FB_VMODE_INTERLACED)) {
709 IVTVFB_DEBUG_WARN("Invalid video mode: %d\n", var->vmode & FB_VMODE_MASK);
710 return -EINVAL;
711 }
712
713 /* Check the left & upper margins
714 If the margins are too large, just center the screen
715 (enforcing margins causes too many problems) */
716
717 if (var->left_margin + var->xres > IVTV_OSD_MAX_WIDTH + 1) {
718 var->left_margin = 1 + ((IVTV_OSD_MAX_WIDTH - var->xres) / 2);
719 }
720 if (var->upper_margin + var->yres > (itv->is_50hz ? 577 : 481)) {
721 var->upper_margin = 1 + (((itv->is_50hz ? 576 : 480) - var->yres) / 2);
722 }
723
724 /* Maintain overall 'size' for a constant refresh rate */
725 var->right_margin = hlimit - var->left_margin - var->xres;
726 var->lower_margin = vlimit - var->upper_margin - var->yres;
727
728 /* Fixed sync times */
729 var->hsync_len = 24;
730 var->vsync_len = 2;
731
732 /* Non-interlaced / interlaced mode is used to switch the OSD filter
733 on or off. Adjust the clock timings to maintain a constant
734 vertical refresh rate. */
735 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
736 var->pixclock = pixclock / 2;
737 else
738 var->pixclock = pixclock;
739
740 IVTVFB_DEBUG_INFO("Display size: %dx%d (virtual %dx%d) @ %dbpp\n",
741 var->xres, var->yres,
742 var->xres_virtual, var->yres_virtual,
743 var->bits_per_pixel);
744
745 IVTVFB_DEBUG_INFO("Display position: %d, %d\n",
746 var->left_margin, var->upper_margin);
747
748 IVTVFB_DEBUG_INFO("Display filter: %s\n",
749 (var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED ? "on" : "off");
750 IVTVFB_DEBUG_INFO("Color space: %s\n", var->nonstd ? "YUV" : "RGB");
751 return 0;
752}
753
754static int ivtvfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
755{
756 struct ivtv *itv = (struct ivtv *) info->par;
757 IVTVFB_DEBUG_INFO("ivtvfb_check_var\n");
758 return _ivtvfb_check_var(var, itv);
759}
760
761static int ivtvfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
762{
763 u32 osd_pan_index;
764 struct ivtv *itv = (struct ivtv *) info->par;
765
766 osd_pan_index = (var->xoffset + (var->yoffset * var->xres_virtual))*var->bits_per_pixel/8;
767 write_reg(osd_pan_index, 0x02A0C);
768
769 /* Pass this info back the yuv handler */
770 itv->yuv_info.osd_x_pan = var->xoffset;
771 itv->yuv_info.osd_y_pan = var->yoffset;
772 /* Force update of yuv registers */
773 itv->yuv_info.yuv_forced_update = 1;
774 return 0;
775}
776
777static int ivtvfb_set_par(struct fb_info *info)
778{
779 int rc = 0;
780 struct ivtv *itv = (struct ivtv *) info->par;
781
782 IVTVFB_DEBUG_INFO("ivtvfb_set_par\n");
783
784 rc = ivtvfb_set_var(itv, &info->var);
785 ivtvfb_pan_display(&info->var, info);
786 ivtvfb_get_fix(itv, &info->fix);
787 return rc;
788}
789
790static int ivtvfb_setcolreg(unsigned regno, unsigned red, unsigned green,
791 unsigned blue, unsigned transp,
792 struct fb_info *info)
793{
794 u32 color, *palette;
795 struct ivtv *itv = (struct ivtv *)info->par;
796
797 if (regno >= info->cmap.len)
798 return -EINVAL;
799
800 color = ((transp & 0xFF00) << 16) |((red & 0xFF00) << 8) | (green & 0xFF00) | ((blue & 0xFF00) >> 8);
801 if (info->var.bits_per_pixel <= 8) {
802 write_reg(regno, 0x02a30);
803 write_reg(color, 0x02a34);
804 return 0;
805 }
806 if (regno >= 16)
807 return -EINVAL;
808
809 palette = info->pseudo_palette;
810 if (info->var.bits_per_pixel == 16) {
811 switch (info->var.green.length) {
812 case 4:
813 color = ((red & 0xf000) >> 4) |
814 ((green & 0xf000) >> 8) |
815 ((blue & 0xf000) >> 12);
816 break;
817 case 5:
818 color = ((red & 0xf800) >> 1) |
819 ((green & 0xf800) >> 6) |
820 ((blue & 0xf800) >> 11);
821 break;
822 case 6:
823 color = (red & 0xf800 ) |
824 ((green & 0xfc00) >> 5) |
825 ((blue & 0xf800) >> 11);
826 break;
827 }
828 }
829 palette[regno] = color;
830 return 0;
831}
832
833/* We don't really support blanking. All this does is enable or
834 disable the OSD. */
835static int ivtvfb_blank(int blank_mode, struct fb_info *info)
836{
837 struct ivtv *itv = (struct ivtv *)info->par;
838
839 IVTVFB_DEBUG_INFO("Set blanking mode : %d\n", blank_mode);
840 switch (blank_mode) {
841 case FB_BLANK_UNBLANK:
842 ivtv_vapi(itv, CX2341X_OSD_SET_STATE, 1, 1);
843 break;
844 case FB_BLANK_NORMAL:
845 case FB_BLANK_HSYNC_SUSPEND:
846 case FB_BLANK_VSYNC_SUSPEND:
847 case FB_BLANK_POWERDOWN:
848 ivtv_vapi(itv, CX2341X_OSD_SET_STATE, 1, 0);
849 break;
850 }
851 return 0;
852}
853
854static struct fb_ops ivtvfb_ops = {
855 .owner = THIS_MODULE,
856 .fb_check_var = ivtvfb_check_var,
857 .fb_set_par = ivtvfb_set_par,
858 .fb_setcolreg = ivtvfb_setcolreg,
859 .fb_fillrect = cfb_fillrect,
860 .fb_copyarea = cfb_copyarea,
861 .fb_imageblit = cfb_imageblit,
862 .fb_cursor = NULL,
863 .fb_ioctl = ivtvfb_ioctl,
864 .fb_pan_display = ivtvfb_pan_display,
865 .fb_blank = ivtvfb_blank,
866};
867
868/* Initialization */
869
870
871/* Setup our initial video mode */
872static int ivtvfb_init_vidmode(struct ivtv *itv)
873{
874 struct osd_info *oi = itv->osd_info;
875 struct v4l2_rect start_window;
876 int max_height;
877
878 /* Color mode */
879
880 if (osd_compat) osd_depth = 32;
881 if (osd_depth != 8 && osd_depth != 16 && osd_depth != 32) osd_depth = 8;
882 oi->bits_per_pixel = osd_depth;
883 oi->bytes_per_pixel = oi->bits_per_pixel / 8;
884
885 /* Invalidate current osd mode to force a mode switch later */
886 oi->osd_mode = -1;
887
888 /* Horizontal size & position */
889
890 if (osd_xres > 720) osd_xres = 720;
891
892 /* Must be a multiple of 4 for 8bpp & 2 for 16bpp */
893 if (osd_depth == 8)
894 osd_xres &= ~3;
895 else if (osd_depth == 16)
896 osd_xres &= ~1;
897
898 if (osd_xres)
899 start_window.width = osd_xres;
900 else
901 start_window.width = osd_compat ? 720: 640;
902
903 /* Check horizontal start (osd_left). */
904 if (osd_left && osd_left + start_window.width > 721) {
905 IVTVFB_ERR("Invalid osd_left - assuming default\n");
906 osd_left = 0;
907 }
908
909 /* Hardware coords start at 0, user coords start at 1. */
910 osd_left--;
911
912 start_window.left = osd_left >= 0 ? osd_left : ((IVTV_OSD_MAX_WIDTH - start_window.width) / 2);
913
914 oi->display_byte_stride =
915 start_window.width * oi->bytes_per_pixel;
916
917 /* Vertical size & position */
918
919 max_height = itv->is_50hz ? 576 : 480;
920
921 if (osd_yres > max_height)
922 osd_yres = max_height;
923
924 if (osd_yres)
925 start_window.height = osd_yres;
926 else
927 start_window.height = osd_compat ? max_height : (itv->is_50hz ? 480 : 400);
928
929 /* Check vertical start (osd_upper). */
930 if (osd_upper + start_window.height > max_height + 1) {
931 IVTVFB_ERR("Invalid osd_upper - assuming default\n");
932 osd_upper = 0;
933 }
934
935 /* Hardware coords start at 0, user coords start at 1. */
936 osd_upper--;
937
938 start_window.top = osd_upper >= 0 ? osd_upper : ((max_height - start_window.height) / 2);
939
940 oi->display_width = start_window.width;
941 oi->display_height = start_window.height;
942
943 /* Generate a valid fb_var_screeninfo */
944
945 oi->ivtvfb_defined.xres = oi->display_width;
946 oi->ivtvfb_defined.yres = oi->display_height;
947 oi->ivtvfb_defined.xres_virtual = oi->display_width;
948 oi->ivtvfb_defined.yres_virtual = oi->display_height;
949 oi->ivtvfb_defined.bits_per_pixel = oi->bits_per_pixel;
950 oi->ivtvfb_defined.vmode = (osd_laced ? FB_VMODE_INTERLACED : FB_VMODE_NONINTERLACED);
951 oi->ivtvfb_defined.left_margin = start_window.left + 1;
952 oi->ivtvfb_defined.upper_margin = start_window.top + 1;
953 oi->ivtvfb_defined.accel_flags = FB_ACCEL_NONE;
954 oi->ivtvfb_defined.nonstd = 0;
955
956 /* We've filled in the most data, let the usual mode check
957 routine fill in the rest. */
958 _ivtvfb_check_var(&oi->ivtvfb_defined, itv);
959
960 /* Generate valid fb_fix_screeninfo */
961
962 ivtvfb_get_fix(itv, &oi->ivtvfb_fix);
963
964 /* Generate valid fb_info */
965
966 oi->ivtvfb_info.node = -1;
967 oi->ivtvfb_info.flags = FBINFO_FLAG_DEFAULT;
968 oi->ivtvfb_info.fbops = &ivtvfb_ops;
969 oi->ivtvfb_info.par = itv;
970 oi->ivtvfb_info.var = oi->ivtvfb_defined;
971 oi->ivtvfb_info.fix = oi->ivtvfb_fix;
972 oi->ivtvfb_info.screen_base = (u8 __iomem *)oi->video_vbase;
973 oi->ivtvfb_info.fbops = &ivtvfb_ops;
974
975 /* Supply some monitor specs. Bogus values will do for now */
976 oi->ivtvfb_info.monspecs.hfmin = 8000;
977 oi->ivtvfb_info.monspecs.hfmax = 70000;
978 oi->ivtvfb_info.monspecs.vfmin = 10;
979 oi->ivtvfb_info.monspecs.vfmax = 100;
980
981 /* Allocate color map */
982 if (fb_alloc_cmap(&oi->ivtvfb_info.cmap, 256, 1)) {
983 IVTVFB_ERR("abort, unable to alloc cmap\n");
984 return -ENOMEM;
985 }
986
987 /* Allocate the pseudo palette */
988 oi->ivtvfb_info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
989
990 if (!oi->ivtvfb_info.pseudo_palette) {
991 IVTVFB_ERR("abort, unable to alloc pseudo pallete\n");
992 return -ENOMEM;
993 }
994
995 return 0;
996}
997
998/* Find OSD buffer base & size. Add to mtrr. Zero osd buffer. */
999
1000static int ivtvfb_init_io(struct ivtv *itv)
1001{
1002 struct osd_info *oi = itv->osd_info;
1003
1004 mutex_lock(&itv->serialize_lock);
1005 if (ivtv_init_on_first_open(itv)) {
1006 mutex_unlock(&itv->serialize_lock);
1007 IVTVFB_ERR("Failed to initialize ivtv\n");
1008 return -ENXIO;
1009 }
1010 mutex_unlock(&itv->serialize_lock);
1011
1012 ivtvfb_get_framebuffer(itv, &oi->video_rbase, &oi->video_buffer_size);
1013
1014 /* The osd buffer size depends on the number of video buffers allocated
1015 on the PVR350 itself. For now we'll hardcode the smallest osd buffer
1016 size to prevent any overlap. */
1017 oi->video_buffer_size = 1704960;
1018
1019 oi->video_pbase = itv->base_addr + IVTV_DECODER_OFFSET + oi->video_rbase;
1020 oi->video_vbase = itv->dec_mem + oi->video_rbase;
1021
1022 if (!oi->video_vbase) {
1023 IVTVFB_ERR("abort, video memory 0x%x @ 0x%lx isn't mapped!\n",
1024 oi->video_buffer_size, oi->video_pbase);
1025 return -EIO;
1026 }
1027
1028 IVTVFB_INFO("Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
1029 oi->video_pbase, oi->video_vbase,
1030 oi->video_buffer_size / 1024);
1031
1032#ifdef CONFIG_MTRR
1033 {
1034 /* Find the largest power of two that maps the whole buffer */
1035 int size_shift = 31;
1036
1037 while (!(oi->video_buffer_size & (1 << size_shift))) {
1038 size_shift--;
1039 }
1040 size_shift++;
1041 oi->fb_start_aligned_physaddr = oi->video_pbase & ~((1 << size_shift) - 1);
1042 oi->fb_end_aligned_physaddr = oi->video_pbase + oi->video_buffer_size;
1043 oi->fb_end_aligned_physaddr += (1 << size_shift) - 1;
1044 oi->fb_end_aligned_physaddr &= ~((1 << size_shift) - 1);
1045 if (mtrr_add(oi->fb_start_aligned_physaddr,
1046 oi->fb_end_aligned_physaddr - oi->fb_start_aligned_physaddr,
1047 MTRR_TYPE_WRCOMB, 1) < 0) {
1048 IVTVFB_INFO("disabled mttr\n");
1049 oi->fb_start_aligned_physaddr = 0;
1050 oi->fb_end_aligned_physaddr = 0;
1051 }
1052 }
1053#endif
1054
1055 /* Blank the entire osd. */
1056 memset_io(oi->video_vbase, 0, oi->video_buffer_size);
1057
1058 return 0;
1059}
1060
1061/* Release any memory we've grabbed & remove mtrr entry */
1062static void ivtvfb_release_buffers (struct ivtv *itv)
1063{
1064 struct osd_info *oi = itv->osd_info;
1065
1066 /* Release cmap */
1067 if (oi->ivtvfb_info.cmap.len)
1068 fb_dealloc_cmap(&oi->ivtvfb_info.cmap);
1069
1070 /* Release pseudo palette */
1071 if (oi->ivtvfb_info.pseudo_palette)
1072 kfree(oi->ivtvfb_info.pseudo_palette);
1073
1074#ifdef CONFIG_MTRR
1075 if (oi->fb_end_aligned_physaddr) {
1076 mtrr_del(-1, oi->fb_start_aligned_physaddr,
1077 oi->fb_end_aligned_physaddr - oi->fb_start_aligned_physaddr);
1078 }
1079#endif
1080
1081 kfree(oi);
1082 itv->osd_info = NULL;
1083}
1084
1085/* Initialize the specified card */
1086
1087static int ivtvfb_init_card(struct ivtv *itv)
1088{
1089 int rc;
1090
1091 if (itv->osd_info) {
1092 IVTVFB_ERR("Card %d already initialised\n", ivtvfb_card_id);
1093 return -EBUSY;
1094 }
1095
1096 itv->osd_info = kzalloc(sizeof(struct osd_info), GFP_ATOMIC);
1097 if (itv->osd_info == 0) {
1098 IVTVFB_ERR("Failed to allocate memory for osd_info\n");
1099 return -ENOMEM;
1100 }
1101
1102 /* Find & setup the OSD buffer */
1103 if ((rc = ivtvfb_init_io(itv)))
1104 return rc;
1105
1106 /* Set the startup video mode information */
1107 if ((rc = ivtvfb_init_vidmode(itv))) {
1108 ivtvfb_release_buffers(itv);
1109 return rc;
1110 }
1111
1112 /* Register the framebuffer */
1113 if (register_framebuffer(&itv->osd_info->ivtvfb_info) < 0) {
1114 ivtvfb_release_buffers(itv);
1115 return -EINVAL;
1116 }
1117
1118 itv->osd_video_pbase = itv->osd_info->video_pbase;
1119
1120 /* Set the card to the requested mode */
1121 ivtvfb_set_par(&itv->osd_info->ivtvfb_info);
1122
1123 /* Set color 0 to black */
1124 write_reg(0, 0x02a30);
1125 write_reg(0, 0x02a34);
1126
1127 /* Enable the osd */
1128 ivtvfb_blank(FB_BLANK_UNBLANK, &itv->osd_info->ivtvfb_info);
1129
1130 /* Note if we're running in compatibility mode */
1131 if (osd_compat)
1132 IVTVFB_INFO("Running in compatibility mode. Display resize & mode change disabled\n");
1133
1134 /* Allocate DMA */
1135 ivtv_udma_alloc(itv);
1136 return 0;
1137
1138}
1139
1140static int __init ivtvfb_init(void)
1141{
1142 struct ivtv *itv;
1143 int i, registered = 0;
1144
1145 if (ivtvfb_card_id < -1 || ivtvfb_card_id >= IVTV_MAX_CARDS) {
1146 printk(KERN_ERR "ivtvfb: ivtvfb_card_id parameter is out of range (valid range: -1 - %d)\n",
1147 IVTV_MAX_CARDS - 1);
1148 return -EINVAL;
1149 }
1150
1151 /* Locate & initialise all cards supporting an OSD. */
1152 for (i = 0; i < ivtv_cards_active; i++) {
1153 if (ivtvfb_card_id != -1 && i != ivtvfb_card_id)
1154 continue;
1155 itv = ivtv_cards[i];
1156 if (itv && (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT)) {
1157 if (ivtvfb_init_card(itv) == 0) {
1158 IVTVFB_INFO("Framebuffer registered on ivtv card id %d\n", i);
1159 registered++;
1160 }
1161 }
1162 }
1163 if (!registered) {
1164 printk(KERN_ERR "ivtvfb: no cards found");
1165 return -ENODEV;
1166 }
1167 return 0;
1168}
1169
1170static void ivtvfb_cleanup(void)
1171{
1172 struct ivtv *itv;
1173 int i;
1174
1175 printk(KERN_INFO "ivtvfb: Unloading framebuffer module\n");
1176
1177 for (i = 0; i < ivtv_cards_active; i++) {
1178 itv = ivtv_cards[i];
1179 if (itv && (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) && itv->osd_info) {
1180 IVTVFB_DEBUG_INFO("Unregister framebuffer %d\n", i);
1181 ivtvfb_blank(FB_BLANK_POWERDOWN, &itv->osd_info->ivtvfb_info);
1182 unregister_framebuffer(&itv->osd_info->ivtvfb_info);
1183 ivtvfb_release_buffers(itv);
1184 itv->osd_video_pbase = 0;
1185 }
1186 }
1187}
1188
1189module_init(ivtvfb_init);
1190module_exit(ivtvfb_cleanup);
diff --git a/drivers/media/video/msp3400-driver.c b/drivers/media/video/msp3400-driver.c
index 11cfcf18ec34..c0c87e06259b 100644
--- a/drivers/media/video/msp3400-driver.c
+++ b/drivers/media/video/msp3400-driver.c
@@ -244,17 +244,17 @@ int msp_write_dsp(struct i2c_client *client, int addr, int val)
244 * ----------------------------------------------------------------------- */ 244 * ----------------------------------------------------------------------- */
245 245
246static int scarts[3][9] = { 246static int scarts[3][9] = {
247 /* MASK IN1 IN2 IN3 IN4 IN1_DA IN2_DA MONO MUTE */ 247 /* MASK IN1 IN2 IN3 IN4 IN1_DA IN2_DA MONO MUTE */
248 /* SCART DSP Input select */ 248 /* SCART DSP Input select */
249 { 0x0320, 0x0000, 0x0200, 0x0300, 0x0020, -1, -1, 0x0100, 0x0320 }, 249 { 0x0320, 0x0000, 0x0200, 0x0300, 0x0020, -1, -1, 0x0100, 0x0320 },
250 /* SCART1 Output select */ 250 /* SCART1 Output select */
251 { 0x0c40, 0x0440, 0x0400, 0x0000, 0x0840, 0x0c00, 0x0040, 0x0800, 0x0c40 }, 251 { 0x0c40, 0x0440, 0x0400, 0x0000, 0x0840, 0x0c00, 0x0040, 0x0800, 0x0c40 },
252 /* SCART2 Output select */ 252 /* SCART2 Output select */
253 { 0x3080, 0x1000, 0x1080, 0x2080, 0x3080, 0x0000, 0x0080, 0x2000, 0x3000 }, 253 { 0x3080, 0x1000, 0x1080, 0x2080, 0x3080, 0x0000, 0x0080, 0x2000, 0x3000 },
254}; 254};
255 255
256static char *scart_names[] = { 256static char *scart_names[] = {
257 "in1", "in2", "in3", "in4", "in1 da", "in2 da", "mono", "mute" 257 "in1", "in2", "in3", "in4", "in1 da", "in2 da", "mono", "mute"
258}; 258};
259 259
260void msp_set_scart(struct i2c_client *client, int in, int out) 260void msp_set_scart(struct i2c_client *client, int in, int out)
@@ -813,8 +813,9 @@ static int msp_attach(struct i2c_adapter *adapter, int address, int kind)
813 int msp_rom; 813 int msp_rom;
814 814
815 client = kzalloc(sizeof(*client), GFP_KERNEL); 815 client = kzalloc(sizeof(*client), GFP_KERNEL);
816 if (client == NULL) 816 if (!client)
817 return -ENOMEM; 817 return -ENOMEM;
818
818 client->addr = address; 819 client->addr = address;
819 client->adapter = adapter; 820 client->adapter = adapter;
820 client->driver = &i2c_driver; 821 client->driver = &i2c_driver;
@@ -826,14 +827,14 @@ static int msp_attach(struct i2c_adapter *adapter, int address, int kind)
826 return 0; 827 return 0;
827 } 828 }
828 829
829 state = kmalloc(sizeof(*state), GFP_KERNEL); 830 state = kzalloc(sizeof(*state), GFP_KERNEL);
830 if (state == NULL) { 831 if (!state) {
831 kfree(client); 832 kfree(client);
832 return -ENOMEM; 833 return -ENOMEM;
833 } 834 }
835
834 i2c_set_clientdata(client, state); 836 i2c_set_clientdata(client, state);
835 837
836 memset(state, 0, sizeof(*state));
837 state->v4l2_std = V4L2_STD_NTSC; 838 state->v4l2_std = V4L2_STD_NTSC;
838 state->audmode = V4L2_TUNER_MODE_STEREO; 839 state->audmode = V4L2_TUNER_MODE_STEREO;
839 state->volume = 58880; /* 0db gain */ 840 state->volume = 58880; /* 0db gain */
diff --git a/drivers/media/video/mt20xx.c b/drivers/media/video/mt20xx.c
index 7549114aaaca..f49d1f4c40db 100644
--- a/drivers/media/video/mt20xx.c
+++ b/drivers/media/video/mt20xx.c
@@ -1,13 +1,20 @@
1/* 1/*
2 *
3 * i2c tv tuner chip device driver 2 * i2c tv tuner chip device driver
4 * controls microtune tuners, mt2032 + mt2050 at the moment. 3 * controls microtune tuners, mt2032 + mt2050 at the moment.
4 *
5 * This "mt20xx" module was split apart from the original "tuner" module.
5 */ 6 */
6#include <linux/delay.h> 7#include <linux/delay.h>
7#include <linux/i2c.h> 8#include <linux/i2c.h>
8#include <linux/videodev.h> 9#include <linux/videodev.h>
9#include <linux/moduleparam.h> 10#include "tuner-i2c.h"
10#include "tuner-driver.h" 11#include "mt20xx.h"
12
13static int debug = 0;
14module_param(debug, int, 0644);
15MODULE_PARM_DESC(debug, "enable verbose debug messages");
16
17#define PREFIX "mt20xx "
11 18
12/* ---------------------------------------------------------------------- */ 19/* ---------------------------------------------------------------------- */
13 20
@@ -20,9 +27,6 @@ module_param(tv_antenna, int, 0644);
20static unsigned int radio_antenna = 0; 27static unsigned int radio_antenna = 0;
21module_param(radio_antenna, int, 0644); 28module_param(radio_antenna, int, 0644);
22 29
23/* from tuner-core.c */
24extern int tuner_debug;
25
26/* ---------------------------------------------------------------------- */ 30/* ---------------------------------------------------------------------- */
27 31
28#define MT2032 0x04 32#define MT2032 0x04
@@ -38,23 +42,34 @@ static char *microtune_part[] = {
38}; 42};
39 43
40struct microtune_priv { 44struct microtune_priv {
45 struct tuner_i2c_props i2c_props;
46
41 unsigned int xogc; 47 unsigned int xogc;
42 unsigned int radio_if2; 48 //unsigned int radio_if2;
49
50 u32 frequency;
43}; 51};
44 52
45static void microtune_release(struct i2c_client *c) 53static int microtune_release(struct dvb_frontend *fe)
46{ 54{
47 struct tuner *t = i2c_get_clientdata(c); 55 kfree(fe->tuner_priv);
56 fe->tuner_priv = NULL;
48 57
49 kfree(t->priv); 58 return 0;
50 t->priv = NULL; 59}
60
61static int microtune_get_frequency(struct dvb_frontend *fe, u32 *frequency)
62{
63 struct microtune_priv *priv = fe->tuner_priv;
64 *frequency = priv->frequency;
65 return 0;
51} 66}
52 67
53// IsSpurInBand()? 68// IsSpurInBand()?
54static int mt2032_spurcheck(struct i2c_client *c, 69static int mt2032_spurcheck(struct dvb_frontend *fe,
55 int f1, int f2, int spectrum_from,int spectrum_to) 70 int f1, int f2, int spectrum_from,int spectrum_to)
56{ 71{
57 struct tuner *t = i2c_get_clientdata(c); 72 struct microtune_priv *priv = fe->tuner_priv;
58 int n1=1,n2,f; 73 int n1=1,n2,f;
59 74
60 f1=f1/1000; //scale to kHz to avoid 32bit overflows 75 f1=f1/1000; //scale to kHz to avoid 32bit overflows
@@ -82,7 +97,7 @@ static int mt2032_spurcheck(struct i2c_client *c,
82 return 1; 97 return 1;
83} 98}
84 99
85static int mt2032_compute_freq(struct i2c_client *c, 100static int mt2032_compute_freq(struct dvb_frontend *fe,
86 unsigned int rfin, 101 unsigned int rfin,
87 unsigned int if1, unsigned int if2, 102 unsigned int if1, unsigned int if2,
88 unsigned int spectrum_from, 103 unsigned int spectrum_from,
@@ -91,7 +106,7 @@ static int mt2032_compute_freq(struct i2c_client *c,
91 int *ret_sel, 106 int *ret_sel,
92 unsigned int xogc) //all in Hz 107 unsigned int xogc) //all in Hz
93{ 108{
94 struct tuner *t = i2c_get_clientdata(c); 109 struct microtune_priv *priv = fe->tuner_priv;
95 unsigned int fref,lo1,lo1n,lo1a,s,sel,lo1freq, desired_lo1, 110 unsigned int fref,lo1,lo1n,lo1a,s,sel,lo1freq, desired_lo1,
96 desired_lo2,lo2,lo2n,lo2a,lo2num,lo2freq; 111 desired_lo2,lo2,lo2n,lo2a,lo2num,lo2freq;
97 112
@@ -141,7 +156,7 @@ static int mt2032_compute_freq(struct i2c_client *c,
141 return(-1); 156 return(-1);
142 } 157 }
143 158
144 mt2032_spurcheck(c, lo1freq, desired_lo2, spectrum_from, spectrum_to); 159 mt2032_spurcheck(fe, lo1freq, desired_lo2, spectrum_from, spectrum_to);
145 // should recalculate lo1 (one step up/down) 160 // should recalculate lo1 (one step up/down)
146 161
147 // set up MT2032 register map for transfer over i2c 162 // set up MT2032 register map for transfer over i2c
@@ -165,16 +180,16 @@ static int mt2032_compute_freq(struct i2c_client *c,
165 return 0; 180 return 0;
166} 181}
167 182
168static int mt2032_check_lo_lock(struct i2c_client *c) 183static int mt2032_check_lo_lock(struct dvb_frontend *fe)
169{ 184{
170 struct tuner *t = i2c_get_clientdata(c); 185 struct microtune_priv *priv = fe->tuner_priv;
171 int try,lock=0; 186 int try,lock=0;
172 unsigned char buf[2]; 187 unsigned char buf[2];
173 188
174 for(try=0;try<10;try++) { 189 for(try=0;try<10;try++) {
175 buf[0]=0x0e; 190 buf[0]=0x0e;
176 i2c_master_send(c,buf,1); 191 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
177 i2c_master_recv(c,buf,1); 192 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
178 tuner_dbg("mt2032 Reg.E=0x%02x\n",buf[0]); 193 tuner_dbg("mt2032 Reg.E=0x%02x\n",buf[0]);
179 lock=buf[0] &0x06; 194 lock=buf[0] &0x06;
180 195
@@ -187,15 +202,15 @@ static int mt2032_check_lo_lock(struct i2c_client *c)
187 return lock; 202 return lock;
188} 203}
189 204
190static int mt2032_optimize_vco(struct i2c_client *c,int sel,int lock) 205static int mt2032_optimize_vco(struct dvb_frontend *fe,int sel,int lock)
191{ 206{
192 struct tuner *t = i2c_get_clientdata(c); 207 struct microtune_priv *priv = fe->tuner_priv;
193 unsigned char buf[2]; 208 unsigned char buf[2];
194 int tad1; 209 int tad1;
195 210
196 buf[0]=0x0f; 211 buf[0]=0x0f;
197 i2c_master_send(c,buf,1); 212 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
198 i2c_master_recv(c,buf,1); 213 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
199 tuner_dbg("mt2032 Reg.F=0x%02x\n",buf[0]); 214 tuner_dbg("mt2032 Reg.F=0x%02x\n",buf[0]);
200 tad1=buf[0]&0x07; 215 tad1=buf[0]&0x07;
201 216
@@ -218,58 +233,57 @@ static int mt2032_optimize_vco(struct i2c_client *c,int sel,int lock)
218 233
219 buf[0]=0x0f; 234 buf[0]=0x0f;
220 buf[1]=sel; 235 buf[1]=sel;
221 i2c_master_send(c,buf,2); 236 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
222 lock=mt2032_check_lo_lock(c); 237 lock=mt2032_check_lo_lock(fe);
223 return lock; 238 return lock;
224} 239}
225 240
226 241
227static void mt2032_set_if_freq(struct i2c_client *c, unsigned int rfin, 242static void mt2032_set_if_freq(struct dvb_frontend *fe, unsigned int rfin,
228 unsigned int if1, unsigned int if2, 243 unsigned int if1, unsigned int if2,
229 unsigned int from, unsigned int to) 244 unsigned int from, unsigned int to)
230{ 245{
231 unsigned char buf[21]; 246 unsigned char buf[21];
232 int lint_try,ret,sel,lock=0; 247 int lint_try,ret,sel,lock=0;
233 struct tuner *t = i2c_get_clientdata(c); 248 struct microtune_priv *priv = fe->tuner_priv;
234 struct microtune_priv *priv = t->priv;
235 249
236 tuner_dbg("mt2032_set_if_freq rfin=%d if1=%d if2=%d from=%d to=%d\n", 250 tuner_dbg("mt2032_set_if_freq rfin=%d if1=%d if2=%d from=%d to=%d\n",
237 rfin,if1,if2,from,to); 251 rfin,if1,if2,from,to);
238 252
239 buf[0]=0; 253 buf[0]=0;
240 ret=i2c_master_send(c,buf,1); 254 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
241 i2c_master_recv(c,buf,21); 255 tuner_i2c_xfer_recv(&priv->i2c_props,buf,21);
242 256
243 buf[0]=0; 257 buf[0]=0;
244 ret=mt2032_compute_freq(c,rfin,if1,if2,from,to,&buf[1],&sel,priv->xogc); 258 ret=mt2032_compute_freq(fe,rfin,if1,if2,from,to,&buf[1],&sel,priv->xogc);
245 if (ret<0) 259 if (ret<0)
246 return; 260 return;
247 261
248 // send only the relevant registers per Rev. 1.2 262 // send only the relevant registers per Rev. 1.2
249 buf[0]=0; 263 buf[0]=0;
250 ret=i2c_master_send(c,buf,4); 264 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,4);
251 buf[5]=5; 265 buf[5]=5;
252 ret=i2c_master_send(c,buf+5,4); 266 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+5,4);
253 buf[11]=11; 267 buf[11]=11;
254 ret=i2c_master_send(c,buf+11,3); 268 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+11,3);
255 if(ret!=3) 269 if(ret!=3)
256 tuner_warn("i2c i/o error: rc == %d (should be 3)\n",ret); 270 tuner_warn("i2c i/o error: rc == %d (should be 3)\n",ret);
257 271
258 // wait for PLLs to lock (per manual), retry LINT if not. 272 // wait for PLLs to lock (per manual), retry LINT if not.
259 for(lint_try=0; lint_try<2; lint_try++) { 273 for(lint_try=0; lint_try<2; lint_try++) {
260 lock=mt2032_check_lo_lock(c); 274 lock=mt2032_check_lo_lock(fe);
261 275
262 if(optimize_vco) 276 if(optimize_vco)
263 lock=mt2032_optimize_vco(c,sel,lock); 277 lock=mt2032_optimize_vco(fe,sel,lock);
264 if(lock==6) break; 278 if(lock==6) break;
265 279
266 tuner_dbg("mt2032: re-init PLLs by LINT\n"); 280 tuner_dbg("mt2032: re-init PLLs by LINT\n");
267 buf[0]=7; 281 buf[0]=7;
268 buf[1]=0x80 +8+priv->xogc; // set LINT to re-init PLLs 282 buf[1]=0x80 +8+priv->xogc; // set LINT to re-init PLLs
269 i2c_master_send(c,buf,2); 283 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
270 mdelay(10); 284 mdelay(10);
271 buf[1]=8+priv->xogc; 285 buf[1]=8+priv->xogc;
272 i2c_master_send(c,buf,2); 286 tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
273 } 287 }
274 288
275 if (lock!=6) 289 if (lock!=6)
@@ -277,19 +291,19 @@ static void mt2032_set_if_freq(struct i2c_client *c, unsigned int rfin,
277 291
278 buf[0]=2; 292 buf[0]=2;
279 buf[1]=0x20; // LOGC for optimal phase noise 293 buf[1]=0x20; // LOGC for optimal phase noise
280 ret=i2c_master_send(c,buf,2); 294 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
281 if (ret!=2) 295 if (ret!=2)
282 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret); 296 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret);
283} 297}
284 298
285 299
286static void mt2032_set_tv_freq(struct i2c_client *c, unsigned int freq) 300static int mt2032_set_tv_freq(struct dvb_frontend *fe,
301 struct analog_parameters *params)
287{ 302{
288 struct tuner *t = i2c_get_clientdata(c);
289 int if2,from,to; 303 int if2,from,to;
290 304
291 // signal bandwidth and picture carrier 305 // signal bandwidth and picture carrier
292 if (t->std & V4L2_STD_525_60) { 306 if (params->std & V4L2_STD_525_60) {
293 // NTSC 307 // NTSC
294 from = 40750*1000; 308 from = 40750*1000;
295 to = 46750*1000; 309 to = 46750*1000;
@@ -301,32 +315,64 @@ static void mt2032_set_tv_freq(struct i2c_client *c, unsigned int freq)
301 if2 = 38900*1000; 315 if2 = 38900*1000;
302 } 316 }
303 317
304 mt2032_set_if_freq(c, freq*62500 /* freq*1000*1000/16 */, 318 mt2032_set_if_freq(fe, params->frequency*62500,
305 1090*1000*1000, if2, from, to); 319 1090*1000*1000, if2, from, to);
320
321 return 0;
306} 322}
307 323
308static void mt2032_set_radio_freq(struct i2c_client *c, unsigned int freq) 324static int mt2032_set_radio_freq(struct dvb_frontend *fe,
325 struct analog_parameters *params)
309{ 326{
310 struct tuner *t = i2c_get_clientdata(c); 327 struct microtune_priv *priv = fe->tuner_priv;
311 struct microtune_priv *priv = t->priv; 328 int if2;
312 int if2 = priv->radio_if2; 329
330 if (params->std & V4L2_STD_525_60) {
331 tuner_dbg("pinnacle ntsc\n");
332 if2 = 41300 * 1000;
333 } else {
334 tuner_dbg("pinnacle pal\n");
335 if2 = 33300 * 1000;
336 }
313 337
314 // per Manual for FM tuning: first if center freq. 1085 MHz 338 // per Manual for FM tuning: first if center freq. 1085 MHz
315 mt2032_set_if_freq(c, freq * 1000 / 16, 339 mt2032_set_if_freq(fe, params->frequency * 125 / 2,
316 1085*1000*1000,if2,if2,if2); 340 1085*1000*1000,if2,if2,if2);
341
342 return 0;
343}
344
345static int mt2032_set_params(struct dvb_frontend *fe,
346 struct analog_parameters *params)
347{
348 struct microtune_priv *priv = fe->tuner_priv;
349 int ret = -EINVAL;
350
351 switch (params->mode) {
352 case V4L2_TUNER_RADIO:
353 ret = mt2032_set_radio_freq(fe, params);
354 priv->frequency = params->frequency * 125 / 2;
355 break;
356 case V4L2_TUNER_ANALOG_TV:
357 case V4L2_TUNER_DIGITAL_TV:
358 ret = mt2032_set_tv_freq(fe, params);
359 priv->frequency = params->frequency * 62500;
360 break;
361 }
362
363 return ret;
317} 364}
318 365
319static struct tuner_operations mt2032_tuner_ops = { 366static struct dvb_tuner_ops mt2032_tuner_ops = {
320 .set_tv_freq = mt2032_set_tv_freq, 367 .set_analog_params = mt2032_set_params,
321 .set_radio_freq = mt2032_set_radio_freq, 368 .release = microtune_release,
322 .release = microtune_release, 369 .get_frequency = microtune_get_frequency,
323}; 370};
324 371
325// Initalization as described in "MT203x Programming Procedures", Rev 1.2, Feb.2001 372// Initalization as described in "MT203x Programming Procedures", Rev 1.2, Feb.2001
326static int mt2032_init(struct i2c_client *c) 373static int mt2032_init(struct dvb_frontend *fe)
327{ 374{
328 struct tuner *t = i2c_get_clientdata(c); 375 struct microtune_priv *priv = fe->tuner_priv;
329 struct microtune_priv *priv = t->priv;
330 unsigned char buf[21]; 376 unsigned char buf[21];
331 int ret,xogc,xok=0; 377 int ret,xogc,xok=0;
332 378
@@ -335,7 +381,7 @@ static int mt2032_init(struct i2c_client *c)
335 buf[2]=0xff; 381 buf[2]=0xff;
336 buf[3]=0x0f; 382 buf[3]=0x0f;
337 buf[4]=0x1f; 383 buf[4]=0x1f;
338 ret=i2c_master_send(c,buf+1,4); 384 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+1,4);
339 385
340 buf[5]=6; // Index register 6 386 buf[5]=6; // Index register 6
341 buf[6]=0xe4; 387 buf[6]=0xe4;
@@ -343,11 +389,11 @@ static int mt2032_init(struct i2c_client *c)
343 buf[8]=0xc3; 389 buf[8]=0xc3;
344 buf[9]=0x4e; 390 buf[9]=0x4e;
345 buf[10]=0xec; 391 buf[10]=0xec;
346 ret=i2c_master_send(c,buf+5,6); 392 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+5,6);
347 393
348 buf[12]=13; // Index register 13 394 buf[12]=13; // Index register 13
349 buf[13]=0x32; 395 buf[13]=0x32;
350 ret=i2c_master_send(c,buf+12,2); 396 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf+12,2);
351 397
352 // Adjust XOGC (register 7), wait for XOK 398 // Adjust XOGC (register 7), wait for XOK
353 xogc=7; 399 xogc=7;
@@ -355,8 +401,8 @@ static int mt2032_init(struct i2c_client *c)
355 tuner_dbg("mt2032: xogc = 0x%02x\n",xogc&0x07); 401 tuner_dbg("mt2032: xogc = 0x%02x\n",xogc&0x07);
356 mdelay(10); 402 mdelay(10);
357 buf[0]=0x0e; 403 buf[0]=0x0e;
358 i2c_master_send(c,buf,1); 404 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
359 i2c_master_recv(c,buf,1); 405 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
360 xok=buf[0]&0x01; 406 xok=buf[0]&0x01;
361 tuner_dbg("mt2032: xok = 0x%02x\n",xok); 407 tuner_dbg("mt2032: xok = 0x%02x\n",xok);
362 if (xok == 1) break; 408 if (xok == 1) break;
@@ -369,32 +415,32 @@ static int mt2032_init(struct i2c_client *c)
369 } 415 }
370 buf[0]=0x07; 416 buf[0]=0x07;
371 buf[1]=0x88 + xogc; 417 buf[1]=0x88 + xogc;
372 ret=i2c_master_send(c,buf,2); 418 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
373 if (ret!=2) 419 if (ret!=2)
374 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret); 420 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",ret);
375 } while (xok != 1 ); 421 } while (xok != 1 );
376 priv->xogc=xogc; 422 priv->xogc=xogc;
377 423
378 memcpy(&t->ops, &mt2032_tuner_ops, sizeof(struct tuner_operations)); 424 memcpy(&fe->ops.tuner_ops, &mt2032_tuner_ops, sizeof(struct dvb_tuner_ops));
379 425
380 return(1); 426 return(1);
381} 427}
382 428
383static void mt2050_set_antenna(struct i2c_client *c, unsigned char antenna) 429static void mt2050_set_antenna(struct dvb_frontend *fe, unsigned char antenna)
384{ 430{
385 struct tuner *t = i2c_get_clientdata(c); 431 struct microtune_priv *priv = fe->tuner_priv;
386 unsigned char buf[2]; 432 unsigned char buf[2];
387 int ret; 433 int ret;
388 434
389 buf[0] = 6; 435 buf[0] = 6;
390 buf[1] = antenna ? 0x11 : 0x10; 436 buf[1] = antenna ? 0x11 : 0x10;
391 ret=i2c_master_send(c,buf,2); 437 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2);
392 tuner_dbg("mt2050: enabled antenna connector %d\n", antenna); 438 tuner_dbg("mt2050: enabled antenna connector %d\n", antenna);
393} 439}
394 440
395static void mt2050_set_if_freq(struct i2c_client *c,unsigned int freq, unsigned int if2) 441static void mt2050_set_if_freq(struct dvb_frontend *fe,unsigned int freq, unsigned int if2)
396{ 442{
397 struct tuner *t = i2c_get_clientdata(c); 443 struct microtune_priv *priv = fe->tuner_priv;
398 unsigned int if1=1218*1000*1000; 444 unsigned int if1=1218*1000*1000;
399 unsigned int f_lo1,f_lo2,lo1,lo2,f_lo1_modulo,f_lo2_modulo,num1,num2,div1a,div1b,div2a,div2b; 445 unsigned int f_lo1,f_lo2,lo1,lo2,f_lo1_modulo,f_lo2_modulo,num1,num2,div1a,div1b,div2a,div2b;
400 int ret; 446 int ret;
@@ -426,7 +472,7 @@ static void mt2050_set_if_freq(struct i2c_client *c,unsigned int freq, unsigned
426 div2a=(lo2/8)-1; 472 div2a=(lo2/8)-1;
427 div2b=lo2-(div2a+1)*8; 473 div2b=lo2-(div2a+1)*8;
428 474
429 if (tuner_debug > 1) { 475 if (debug > 1) {
430 tuner_dbg("lo1 lo2 = %d %d\n", lo1, lo2); 476 tuner_dbg("lo1 lo2 = %d %d\n", lo1, lo2);
431 tuner_dbg("num1 num2 div1a div1b div2a div2b= %x %x %x %x %x %x\n", 477 tuner_dbg("num1 num2 div1a div1b div2a div2b= %x %x %x %x %x %x\n",
432 num1,num2,div1a,div1b,div2a,div2b); 478 num1,num2,div1a,div1b,div2a,div2b);
@@ -442,7 +488,7 @@ static void mt2050_set_if_freq(struct i2c_client *c,unsigned int freq, unsigned
442 buf[5]=div2a; 488 buf[5]=div2a;
443 if(num2!=0) buf[5]=buf[5]|0x40; 489 if(num2!=0) buf[5]=buf[5]|0x40;
444 490
445 if (tuner_debug > 1) { 491 if (debug > 1) {
446 int i; 492 int i;
447 tuner_dbg("bufs is: "); 493 tuner_dbg("bufs is: ");
448 for(i=0;i<6;i++) 494 for(i=0;i<6;i++)
@@ -450,101 +496,131 @@ static void mt2050_set_if_freq(struct i2c_client *c,unsigned int freq, unsigned
450 printk("\n"); 496 printk("\n");
451 } 497 }
452 498
453 ret=i2c_master_send(c,buf,6); 499 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,6);
454 if (ret!=6) 500 if (ret!=6)
455 tuner_warn("i2c i/o error: rc == %d (should be 6)\n",ret); 501 tuner_warn("i2c i/o error: rc == %d (should be 6)\n",ret);
456} 502}
457 503
458static void mt2050_set_tv_freq(struct i2c_client *c, unsigned int freq) 504static int mt2050_set_tv_freq(struct dvb_frontend *fe,
505 struct analog_parameters *params)
459{ 506{
460 struct tuner *t = i2c_get_clientdata(c);
461 unsigned int if2; 507 unsigned int if2;
462 508
463 if (t->std & V4L2_STD_525_60) { 509 if (params->std & V4L2_STD_525_60) {
464 // NTSC 510 // NTSC
465 if2 = 45750*1000; 511 if2 = 45750*1000;
466 } else { 512 } else {
467 // PAL 513 // PAL
468 if2 = 38900*1000; 514 if2 = 38900*1000;
469 } 515 }
470 if (V4L2_TUNER_DIGITAL_TV == t->mode) { 516 if (V4L2_TUNER_DIGITAL_TV == params->mode) {
471 // DVB (pinnacle 300i) 517 // DVB (pinnacle 300i)
472 if2 = 36150*1000; 518 if2 = 36150*1000;
473 } 519 }
474 mt2050_set_if_freq(c, freq*62500, if2); 520 mt2050_set_if_freq(fe, params->frequency*62500, if2);
475 mt2050_set_antenna(c, tv_antenna); 521 mt2050_set_antenna(fe, tv_antenna);
522
523 return 0;
476} 524}
477 525
478static void mt2050_set_radio_freq(struct i2c_client *c, unsigned int freq) 526static int mt2050_set_radio_freq(struct dvb_frontend *fe,
527 struct analog_parameters *params)
479{ 528{
480 struct tuner *t = i2c_get_clientdata(c); 529 struct microtune_priv *priv = fe->tuner_priv;
481 struct microtune_priv *priv = t->priv; 530 int if2;
482 int if2 = priv->radio_if2; 531
532 if (params->std & V4L2_STD_525_60) {
533 tuner_dbg("pinnacle ntsc\n");
534 if2 = 41300 * 1000;
535 } else {
536 tuner_dbg("pinnacle pal\n");
537 if2 = 33300 * 1000;
538 }
483 539
484 mt2050_set_if_freq(c, freq * 1000 / 16, if2); 540 mt2050_set_if_freq(fe, params->frequency * 125 / 2, if2);
485 mt2050_set_antenna(c, radio_antenna); 541 mt2050_set_antenna(fe, radio_antenna);
542
543 return 0;
486} 544}
487 545
488static struct tuner_operations mt2050_tuner_ops = { 546static int mt2050_set_params(struct dvb_frontend *fe,
489 .set_tv_freq = mt2050_set_tv_freq, 547 struct analog_parameters *params)
490 .set_radio_freq = mt2050_set_radio_freq, 548{
491 .release = microtune_release, 549 struct microtune_priv *priv = fe->tuner_priv;
550 int ret = -EINVAL;
551
552 switch (params->mode) {
553 case V4L2_TUNER_RADIO:
554 ret = mt2050_set_radio_freq(fe, params);
555 priv->frequency = params->frequency * 125 / 2;
556 break;
557 case V4L2_TUNER_ANALOG_TV:
558 case V4L2_TUNER_DIGITAL_TV:
559 ret = mt2050_set_tv_freq(fe, params);
560 priv->frequency = params->frequency * 62500;
561 break;
562 }
563
564 return ret;
565}
566
567static struct dvb_tuner_ops mt2050_tuner_ops = {
568 .set_analog_params = mt2050_set_params,
569 .release = microtune_release,
570 .get_frequency = microtune_get_frequency,
492}; 571};
493 572
494static int mt2050_init(struct i2c_client *c) 573static int mt2050_init(struct dvb_frontend *fe)
495{ 574{
496 struct tuner *t = i2c_get_clientdata(c); 575 struct microtune_priv *priv = fe->tuner_priv;
497 unsigned char buf[2]; 576 unsigned char buf[2];
498 int ret; 577 int ret;
499 578
500 buf[0]=6; 579 buf[0]=6;
501 buf[1]=0x10; 580 buf[1]=0x10;
502 ret=i2c_master_send(c,buf,2); // power 581 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2); // power
503 582
504 buf[0]=0x0f; 583 buf[0]=0x0f;
505 buf[1]=0x0f; 584 buf[1]=0x0f;
506 ret=i2c_master_send(c,buf,2); // m1lo 585 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,2); // m1lo
507 586
508 buf[0]=0x0d; 587 buf[0]=0x0d;
509 ret=i2c_master_send(c,buf,1); 588 ret=tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
510 i2c_master_recv(c,buf,1); 589 tuner_i2c_xfer_recv(&priv->i2c_props,buf,1);
511 590
512 tuner_dbg("mt2050: sro is %x\n",buf[0]); 591 tuner_dbg("mt2050: sro is %x\n",buf[0]);
513 592
514 memcpy(&t->ops, &mt2050_tuner_ops, sizeof(struct tuner_operations)); 593 memcpy(&fe->ops.tuner_ops, &mt2050_tuner_ops, sizeof(struct dvb_tuner_ops));
515 594
516 return 0; 595 return 0;
517} 596}
518 597
519int microtune_init(struct i2c_client *c) 598struct dvb_frontend *microtune_attach(struct dvb_frontend *fe,
599 struct i2c_adapter* i2c_adap,
600 u8 i2c_addr)
520{ 601{
521 struct microtune_priv *priv = NULL; 602 struct microtune_priv *priv = NULL;
522 struct tuner *t = i2c_get_clientdata(c);
523 char *name; 603 char *name;
524 unsigned char buf[21]; 604 unsigned char buf[21];
525 int company_code; 605 int company_code;
526 606
527 priv = kzalloc(sizeof(struct microtune_priv), GFP_KERNEL); 607 priv = kzalloc(sizeof(struct microtune_priv), GFP_KERNEL);
528 if (priv == NULL) 608 if (priv == NULL)
529 return -ENOMEM; 609 return NULL;
530 t->priv = priv; 610 fe->tuner_priv = priv;
611
612 priv->i2c_props.addr = i2c_addr;
613 priv->i2c_props.adap = i2c_adap;
531 614
532 priv->radio_if2 = 10700 * 1000; /* 10.7MHz - FM radio */ 615 //priv->radio_if2 = 10700 * 1000; /* 10.7MHz - FM radio */
533 616
534 memset(buf,0,sizeof(buf)); 617 memset(buf,0,sizeof(buf));
535 618
536 if (t->std & V4L2_STD_525_60) {
537 tuner_dbg("pinnacle ntsc\n");
538 priv->radio_if2 = 41300 * 1000;
539 } else {
540 tuner_dbg("pinnacle pal\n");
541 priv->radio_if2 = 33300 * 1000;
542 }
543 name = "unknown"; 619 name = "unknown";
544 620
545 i2c_master_send(c,buf,1); 621 tuner_i2c_xfer_send(&priv->i2c_props,buf,1);
546 i2c_master_recv(c,buf,21); 622 tuner_i2c_xfer_recv(&priv->i2c_props,buf,21);
547 if (tuner_debug) { 623 if (debug) {
548 int i; 624 int i;
549 tuner_dbg("MT20xx hexdump:"); 625 tuner_dbg("MT20xx hexdump:");
550 for(i=0;i<21;i++) { 626 for(i=0;i<21;i++) {
@@ -563,10 +639,10 @@ int microtune_init(struct i2c_client *c)
563 name = microtune_part[buf[0x13]]; 639 name = microtune_part[buf[0x13]];
564 switch (buf[0x13]) { 640 switch (buf[0x13]) {
565 case MT2032: 641 case MT2032:
566 mt2032_init(c); 642 mt2032_init(fe);
567 break; 643 break;
568 case MT2050: 644 case MT2050:
569 mt2050_init(c); 645 mt2050_init(fe);
570 break; 646 break;
571 default: 647 default:
572 tuner_info("microtune %s found, not (yet?) supported, sorry :-/\n", 648 tuner_info("microtune %s found, not (yet?) supported, sorry :-/\n",
@@ -574,11 +650,18 @@ int microtune_init(struct i2c_client *c)
574 return 0; 650 return 0;
575 } 651 }
576 652
577 strlcpy(c->name, name, sizeof(c->name)); 653 strlcpy(fe->ops.tuner_ops.info.name, name,
654 sizeof(fe->ops.tuner_ops.info.name));
578 tuner_info("microtune %s found, OK\n",name); 655 tuner_info("microtune %s found, OK\n",name);
579 return 0; 656 return fe;
580} 657}
581 658
659EXPORT_SYMBOL_GPL(microtune_attach);
660
661MODULE_DESCRIPTION("Microtune tuner driver");
662MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
663MODULE_LICENSE("GPL");
664
582/* 665/*
583 * Overrides for Emacs so that we follow Linus's tabbing style. 666 * Overrides for Emacs so that we follow Linus's tabbing style.
584 * --------------------------------------------------------------------------- 667 * ---------------------------------------------------------------------------
diff --git a/drivers/media/video/mt20xx.h b/drivers/media/video/mt20xx.h
new file mode 100644
index 000000000000..5e9c825d2e91
--- /dev/null
+++ b/drivers/media/video/mt20xx.h
@@ -0,0 +1,37 @@
1/*
2 This program is free software; you can redistribute it and/or modify
3 it under the terms of the GNU General Public License as published by
4 the Free Software Foundation; either version 2 of the License, or
5 (at your option) any later version.
6
7 This program is distributed in the hope that it will be useful,
8 but WITHOUT ANY WARRANTY; without even the implied warranty of
9 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 GNU General Public License for more details.
11
12 You should have received a copy of the GNU General Public License
13 along with this program; if not, write to the Free Software
14 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15*/
16
17#ifndef __MT20XX_H__
18#define __MT20XX_H__
19
20#include <linux/i2c.h>
21#include "dvb_frontend.h"
22
23#if defined(CONFIG_TUNER_MT20XX) || (defined(CONFIG_TUNER_MT20XX_MODULE) && defined(MODULE))
24extern struct dvb_frontend *microtune_attach(struct dvb_frontend *fe,
25 struct i2c_adapter* i2c_adap,
26 u8 i2c_addr);
27#else
28static inline struct dvb_frontend *microtune_attach(struct dvb_frontend *fe,
29 struct i2c_adapter* i2c_adap,
30 u8 i2c_addr)
31{
32 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
33 return NULL;
34}
35#endif
36
37#endif /* __MT20XX_H__ */
diff --git a/drivers/media/video/mxb.c b/drivers/media/video/mxb.c
index 152cc6b3e152..98ad3092a079 100644
--- a/drivers/media/video/mxb.c
+++ b/drivers/media/video/mxb.c
@@ -153,7 +153,6 @@ static int mxb_probe(struct saa7146_dev* dev)
153{ 153{
154 struct mxb* mxb = NULL; 154 struct mxb* mxb = NULL;
155 struct i2c_client *client; 155 struct i2c_client *client;
156 struct list_head *item;
157 int result; 156 int result;
158 157
159 if ((result = request_module("saa7111")) < 0) { 158 if ((result = request_module("saa7111")) < 0) {
@@ -196,8 +195,7 @@ static int mxb_probe(struct saa7146_dev* dev)
196 } 195 }
197 196
198 /* loop through all i2c-devices on the bus and look who is there */ 197 /* loop through all i2c-devices on the bus and look who is there */
199 list_for_each(item,&mxb->i2c_adapter.clients) { 198 list_for_each_entry(client, &mxb->i2c_adapter.clients, list) {
200 client = list_entry(item, struct i2c_client, list);
201 if( I2C_ADDR_TEA6420_1 == client->addr ) 199 if( I2C_ADDR_TEA6420_1 == client->addr )
202 mxb->tea6420_1 = client; 200 mxb->tea6420_1 = client;
203 if( I2C_ADDR_TEA6420_2 == client->addr ) 201 if( I2C_ADDR_TEA6420_2 == client->addr )
diff --git a/drivers/media/video/ov511.c b/drivers/media/video/ov511.c
index e5edff1059a2..9eb2562347a8 100644
--- a/drivers/media/video/ov511.c
+++ b/drivers/media/video/ov511.c
@@ -5554,41 +5554,46 @@ error:
5554 * sysfs 5554 * sysfs
5555 ***************************************************************************/ 5555 ***************************************************************************/
5556 5556
5557static inline struct usb_ov511 *cd_to_ov(struct class_device *cd) 5557static inline struct usb_ov511 *cd_to_ov(struct device *cd)
5558{ 5558{
5559 struct video_device *vdev = to_video_device(cd); 5559 struct video_device *vdev = to_video_device(cd);
5560 return video_get_drvdata(vdev); 5560 return video_get_drvdata(vdev);
5561} 5561}
5562 5562
5563static ssize_t show_custom_id(struct class_device *cd, char *buf) 5563static ssize_t show_custom_id(struct device *cd,
5564 struct device_attribute *attr, char *buf)
5564{ 5565{
5565 struct usb_ov511 *ov = cd_to_ov(cd); 5566 struct usb_ov511 *ov = cd_to_ov(cd);
5566 return sprintf(buf, "%d\n", ov->customid); 5567 return sprintf(buf, "%d\n", ov->customid);
5567} 5568}
5568static CLASS_DEVICE_ATTR(custom_id, S_IRUGO, show_custom_id, NULL); 5569static DEVICE_ATTR(custom_id, S_IRUGO, show_custom_id, NULL);
5569 5570
5570static ssize_t show_model(struct class_device *cd, char *buf) 5571static ssize_t show_model(struct device *cd,
5572 struct device_attribute *attr, char *buf)
5571{ 5573{
5572 struct usb_ov511 *ov = cd_to_ov(cd); 5574 struct usb_ov511 *ov = cd_to_ov(cd);
5573 return sprintf(buf, "%s\n", ov->desc); 5575 return sprintf(buf, "%s\n", ov->desc);
5574} 5576}
5575static CLASS_DEVICE_ATTR(model, S_IRUGO, show_model, NULL); 5577static DEVICE_ATTR(model, S_IRUGO, show_model, NULL);
5576 5578
5577static ssize_t show_bridge(struct class_device *cd, char *buf) 5579static ssize_t show_bridge(struct device *cd,
5580 struct device_attribute *attr, char *buf)
5578{ 5581{
5579 struct usb_ov511 *ov = cd_to_ov(cd); 5582 struct usb_ov511 *ov = cd_to_ov(cd);
5580 return sprintf(buf, "%s\n", symbolic(brglist, ov->bridge)); 5583 return sprintf(buf, "%s\n", symbolic(brglist, ov->bridge));
5581} 5584}
5582static CLASS_DEVICE_ATTR(bridge, S_IRUGO, show_bridge, NULL); 5585static DEVICE_ATTR(bridge, S_IRUGO, show_bridge, NULL);
5583 5586
5584static ssize_t show_sensor(struct class_device *cd, char *buf) 5587static ssize_t show_sensor(struct device *cd,
5588 struct device_attribute *attr, char *buf)
5585{ 5589{
5586 struct usb_ov511 *ov = cd_to_ov(cd); 5590 struct usb_ov511 *ov = cd_to_ov(cd);
5587 return sprintf(buf, "%s\n", symbolic(senlist, ov->sensor)); 5591 return sprintf(buf, "%s\n", symbolic(senlist, ov->sensor));
5588} 5592}
5589static CLASS_DEVICE_ATTR(sensor, S_IRUGO, show_sensor, NULL); 5593static DEVICE_ATTR(sensor, S_IRUGO, show_sensor, NULL);
5590 5594
5591static ssize_t show_brightness(struct class_device *cd, char *buf) 5595static ssize_t show_brightness(struct device *cd,
5596 struct device_attribute *attr, char *buf)
5592{ 5597{
5593 struct usb_ov511 *ov = cd_to_ov(cd); 5598 struct usb_ov511 *ov = cd_to_ov(cd);
5594 unsigned short x; 5599 unsigned short x;
@@ -5598,9 +5603,10 @@ static ssize_t show_brightness(struct class_device *cd, char *buf)
5598 sensor_get_brightness(ov, &x); 5603 sensor_get_brightness(ov, &x);
5599 return sprintf(buf, "%d\n", x >> 8); 5604 return sprintf(buf, "%d\n", x >> 8);
5600} 5605}
5601static CLASS_DEVICE_ATTR(brightness, S_IRUGO, show_brightness, NULL); 5606static DEVICE_ATTR(brightness, S_IRUGO, show_brightness, NULL);
5602 5607
5603static ssize_t show_saturation(struct class_device *cd, char *buf) 5608static ssize_t show_saturation(struct device *cd,
5609 struct device_attribute *attr, char *buf)
5604{ 5610{
5605 struct usb_ov511 *ov = cd_to_ov(cd); 5611 struct usb_ov511 *ov = cd_to_ov(cd);
5606 unsigned short x; 5612 unsigned short x;
@@ -5610,9 +5616,10 @@ static ssize_t show_saturation(struct class_device *cd, char *buf)
5610 sensor_get_saturation(ov, &x); 5616 sensor_get_saturation(ov, &x);
5611 return sprintf(buf, "%d\n", x >> 8); 5617 return sprintf(buf, "%d\n", x >> 8);
5612} 5618}
5613static CLASS_DEVICE_ATTR(saturation, S_IRUGO, show_saturation, NULL); 5619static DEVICE_ATTR(saturation, S_IRUGO, show_saturation, NULL);
5614 5620
5615static ssize_t show_contrast(struct class_device *cd, char *buf) 5621static ssize_t show_contrast(struct device *cd,
5622 struct device_attribute *attr, char *buf)
5616{ 5623{
5617 struct usb_ov511 *ov = cd_to_ov(cd); 5624 struct usb_ov511 *ov = cd_to_ov(cd);
5618 unsigned short x; 5625 unsigned short x;
@@ -5622,9 +5629,10 @@ static ssize_t show_contrast(struct class_device *cd, char *buf)
5622 sensor_get_contrast(ov, &x); 5629 sensor_get_contrast(ov, &x);
5623 return sprintf(buf, "%d\n", x >> 8); 5630 return sprintf(buf, "%d\n", x >> 8);
5624} 5631}
5625static CLASS_DEVICE_ATTR(contrast, S_IRUGO, show_contrast, NULL); 5632static DEVICE_ATTR(contrast, S_IRUGO, show_contrast, NULL);
5626 5633
5627static ssize_t show_hue(struct class_device *cd, char *buf) 5634static ssize_t show_hue(struct device *cd,
5635 struct device_attribute *attr, char *buf)
5628{ 5636{
5629 struct usb_ov511 *ov = cd_to_ov(cd); 5637 struct usb_ov511 *ov = cd_to_ov(cd);
5630 unsigned short x; 5638 unsigned short x;
@@ -5634,9 +5642,10 @@ static ssize_t show_hue(struct class_device *cd, char *buf)
5634 sensor_get_hue(ov, &x); 5642 sensor_get_hue(ov, &x);
5635 return sprintf(buf, "%d\n", x >> 8); 5643 return sprintf(buf, "%d\n", x >> 8);
5636} 5644}
5637static CLASS_DEVICE_ATTR(hue, S_IRUGO, show_hue, NULL); 5645static DEVICE_ATTR(hue, S_IRUGO, show_hue, NULL);
5638 5646
5639static ssize_t show_exposure(struct class_device *cd, char *buf) 5647static ssize_t show_exposure(struct device *cd,
5648 struct device_attribute *attr, char *buf)
5640{ 5649{
5641 struct usb_ov511 *ov = cd_to_ov(cd); 5650 struct usb_ov511 *ov = cd_to_ov(cd);
5642 unsigned char exp = 0; 5651 unsigned char exp = 0;
@@ -5646,49 +5655,49 @@ static ssize_t show_exposure(struct class_device *cd, char *buf)
5646 sensor_get_exposure(ov, &exp); 5655 sensor_get_exposure(ov, &exp);
5647 return sprintf(buf, "%d\n", exp >> 8); 5656 return sprintf(buf, "%d\n", exp >> 8);
5648} 5657}
5649static CLASS_DEVICE_ATTR(exposure, S_IRUGO, show_exposure, NULL); 5658static DEVICE_ATTR(exposure, S_IRUGO, show_exposure, NULL);
5650 5659
5651static int ov_create_sysfs(struct video_device *vdev) 5660static int ov_create_sysfs(struct video_device *vdev)
5652{ 5661{
5653 int rc; 5662 int rc;
5654 5663
5655 rc = video_device_create_file(vdev, &class_device_attr_custom_id); 5664 rc = video_device_create_file(vdev, &dev_attr_custom_id);
5656 if (rc) goto err; 5665 if (rc) goto err;
5657 rc = video_device_create_file(vdev, &class_device_attr_model); 5666 rc = video_device_create_file(vdev, &dev_attr_model);
5658 if (rc) goto err_id; 5667 if (rc) goto err_id;
5659 rc = video_device_create_file(vdev, &class_device_attr_bridge); 5668 rc = video_device_create_file(vdev, &dev_attr_bridge);
5660 if (rc) goto err_model; 5669 if (rc) goto err_model;
5661 rc = video_device_create_file(vdev, &class_device_attr_sensor); 5670 rc = video_device_create_file(vdev, &dev_attr_sensor);
5662 if (rc) goto err_bridge; 5671 if (rc) goto err_bridge;
5663 rc = video_device_create_file(vdev, &class_device_attr_brightness); 5672 rc = video_device_create_file(vdev, &dev_attr_brightness);
5664 if (rc) goto err_sensor; 5673 if (rc) goto err_sensor;
5665 rc = video_device_create_file(vdev, &class_device_attr_saturation); 5674 rc = video_device_create_file(vdev, &dev_attr_saturation);
5666 if (rc) goto err_bright; 5675 if (rc) goto err_bright;
5667 rc = video_device_create_file(vdev, &class_device_attr_contrast); 5676 rc = video_device_create_file(vdev, &dev_attr_contrast);
5668 if (rc) goto err_sat; 5677 if (rc) goto err_sat;
5669 rc = video_device_create_file(vdev, &class_device_attr_hue); 5678 rc = video_device_create_file(vdev, &dev_attr_hue);
5670 if (rc) goto err_contrast; 5679 if (rc) goto err_contrast;
5671 rc = video_device_create_file(vdev, &class_device_attr_exposure); 5680 rc = video_device_create_file(vdev, &dev_attr_exposure);
5672 if (rc) goto err_hue; 5681 if (rc) goto err_hue;
5673 5682
5674 return 0; 5683 return 0;
5675 5684
5676err_hue: 5685err_hue:
5677 video_device_remove_file(vdev, &class_device_attr_hue); 5686 video_device_remove_file(vdev, &dev_attr_hue);
5678err_contrast: 5687err_contrast:
5679 video_device_remove_file(vdev, &class_device_attr_contrast); 5688 video_device_remove_file(vdev, &dev_attr_contrast);
5680err_sat: 5689err_sat:
5681 video_device_remove_file(vdev, &class_device_attr_saturation); 5690 video_device_remove_file(vdev, &dev_attr_saturation);
5682err_bright: 5691err_bright:
5683 video_device_remove_file(vdev, &class_device_attr_brightness); 5692 video_device_remove_file(vdev, &dev_attr_brightness);
5684err_sensor: 5693err_sensor:
5685 video_device_remove_file(vdev, &class_device_attr_sensor); 5694 video_device_remove_file(vdev, &dev_attr_sensor);
5686err_bridge: 5695err_bridge:
5687 video_device_remove_file(vdev, &class_device_attr_bridge); 5696 video_device_remove_file(vdev, &dev_attr_bridge);
5688err_model: 5697err_model:
5689 video_device_remove_file(vdev, &class_device_attr_model); 5698 video_device_remove_file(vdev, &dev_attr_model);
5690err_id: 5699err_id:
5691 video_device_remove_file(vdev, &class_device_attr_custom_id); 5700 video_device_remove_file(vdev, &dev_attr_custom_id);
5692err: 5701err:
5693 return rc; 5702 return rc;
5694} 5703}
diff --git a/drivers/media/video/ov7670.c b/drivers/media/video/ov7670.c
index c4c5bd67f795..2bc6bdc9c1f2 100644
--- a/drivers/media/video/ov7670.c
+++ b/drivers/media/video/ov7670.c
@@ -12,7 +12,6 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/slab.h> 15#include <linux/slab.h>
17#include <linux/delay.h> 16#include <linux/delay.h>
18#include <linux/videodev.h> 17#include <linux/videodev.h>
diff --git a/drivers/media/video/ovcamchip/ovcamchip_core.c b/drivers/media/video/ovcamchip/ovcamchip_core.c
index 3fe9fa04cd84..8063e33f1c85 100644
--- a/drivers/media/video/ovcamchip/ovcamchip_core.c
+++ b/drivers/media/video/ovcamchip/ovcamchip_core.c
@@ -13,7 +13,6 @@
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/slab.h> 16#include <linux/slab.h>
18#include <linux/delay.h> 17#include <linux/delay.h>
19#include "ovcamchip_priv.h" 18#include "ovcamchip_priv.h"
diff --git a/drivers/media/video/planb.c b/drivers/media/video/planb.c
index 4ab1af74a970..0ef73d9d5848 100644
--- a/drivers/media/video/planb.c
+++ b/drivers/media/video/planb.c
@@ -844,21 +844,21 @@ cmd_tab_mask_end:
844/*********************************/ 844/*********************************/
845 845
846static int palette2fmt[] = { 846static int palette2fmt[] = {
847 0, 847 0,
848 PLANB_GRAY, 848 PLANB_GRAY,
849 0, 849 0,
850 0, 850 0,
851 0, 851 0,
852 PLANB_COLOUR32, 852 PLANB_COLOUR32,
853 PLANB_COLOUR15, 853 PLANB_COLOUR15,
854 0, 854 0,
855 0, 855 0,
856 0, 856 0,
857 0, 857 0,
858 0, 858 0,
859 0, 859 0,
860 0, 860 0,
861 0, 861 0,
862}; 862};
863 863
864#define PLANB_PALETTE_MAX 15 864#define PLANB_PALETTE_MAX 15
diff --git a/drivers/media/video/pvrusb2/pvrusb2-context.c b/drivers/media/video/pvrusb2/pvrusb2-context.c
index 6bbed88d7867..22719ba861ac 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-context.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-context.c
@@ -33,8 +33,10 @@ static void pvr2_context_destroy(struct pvr2_context *mp)
33{ 33{
34 if (mp->hdw) pvr2_hdw_destroy(mp->hdw); 34 if (mp->hdw) pvr2_hdw_destroy(mp->hdw);
35 pvr2_trace(PVR2_TRACE_STRUCT,"Destroying pvr_main id=%p",mp); 35 pvr2_trace(PVR2_TRACE_STRUCT,"Destroying pvr_main id=%p",mp);
36 flush_workqueue(mp->workqueue); 36 if (mp->workqueue) {
37 destroy_workqueue(mp->workqueue); 37 flush_workqueue(mp->workqueue);
38 destroy_workqueue(mp->workqueue);
39 }
38 kfree(mp); 40 kfree(mp);
39} 41}
40 42
diff --git a/drivers/media/video/pvrusb2/pvrusb2-debug.h b/drivers/media/video/pvrusb2/pvrusb2-debug.h
index d95a8588e4f8..da6441b88f31 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-debug.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-debug.h
@@ -26,32 +26,33 @@ extern int pvrusb2_debug;
26 26
27/* These are listed in *rough* order of decreasing usefulness and 27/* These are listed in *rough* order of decreasing usefulness and
28 increasing noise level. */ 28 increasing noise level. */
29#define PVR2_TRACE_INFO (1 << 0) // Normal messages 29#define PVR2_TRACE_INFO (1 << 0) /* Normal messages */
30#define PVR2_TRACE_ERROR_LEGS (1 << 1) // error messages 30#define PVR2_TRACE_ERROR_LEGS (1 << 1) /* error messages */
31#define PVR2_TRACE_TOLERANCE (1 << 2) // track tolerance-affected errors 31#define PVR2_TRACE_TOLERANCE (1 << 2) /* track tolerance-affected errors */
32#define PVR2_TRACE_TRAP (1 << 3) // Trap & report misbehavior from app 32#define PVR2_TRACE_TRAP (1 << 3) /* Trap & report app misbehavior */
33#define PVR2_TRACE_INIT (1 << 4) // misc initialization steps 33#define PVR2_TRACE_STD (1 << 4) /* Log video standard stuff */
34#define PVR2_TRACE_START_STOP (1 << 5) // Streaming start / stop 34#define PVR2_TRACE_INIT (1 << 5) /* misc initialization steps */
35#define PVR2_TRACE_CTL (1 << 6) // commit of control changes 35#define PVR2_TRACE_START_STOP (1 << 6) /* Streaming start / stop */
36#define PVR2_TRACE_DEBUG (1 << 7) // Temporary debug code 36#define PVR2_TRACE_CTL (1 << 7) /* commit of control changes */
37#define PVR2_TRACE_EEPROM (1 << 8) // eeprom parsing / report 37#define PVR2_TRACE_DEBUG (1 << 8) /* Temporary debug code */
38#define PVR2_TRACE_STRUCT (1 << 9) // internal struct creation 38#define PVR2_TRACE_EEPROM (1 << 9) /* eeprom parsing / report */
39#define PVR2_TRACE_OPEN_CLOSE (1 << 10) // application open / close 39#define PVR2_TRACE_STRUCT (1 << 10) /* internal struct creation */
40#define PVR2_TRACE_CREG (1 << 11) // Main critical region entry / exit 40#define PVR2_TRACE_OPEN_CLOSE (1 << 11) /* application open / close */
41#define PVR2_TRACE_SYSFS (1 << 12) // Sysfs driven I/O 41#define PVR2_TRACE_CREG (1 << 12) /* Main critical region entry / exit */
42#define PVR2_TRACE_FIRMWARE (1 << 13) // firmware upload actions 42#define PVR2_TRACE_SYSFS (1 << 13) /* Sysfs driven I/O */
43#define PVR2_TRACE_CHIPS (1 << 14) // chip broadcast operation 43#define PVR2_TRACE_FIRMWARE (1 << 14) /* firmware upload actions */
44#define PVR2_TRACE_I2C (1 << 15) // I2C related stuff 44#define PVR2_TRACE_CHIPS (1 << 15) /* chip broadcast operation */
45#define PVR2_TRACE_I2C_CMD (1 << 16) // Software commands to I2C modules 45#define PVR2_TRACE_I2C (1 << 16) /* I2C related stuff */
46#define PVR2_TRACE_I2C_CORE (1 << 17) // I2C core debugging 46#define PVR2_TRACE_I2C_CMD (1 << 17) /* Software commands to I2C modules */
47#define PVR2_TRACE_I2C_TRAF (1 << 18) // I2C traffic through the adapter 47#define PVR2_TRACE_I2C_CORE (1 << 18) /* I2C core debugging */
48#define PVR2_TRACE_V4LIOCTL (1 << 19) // v4l ioctl details 48#define PVR2_TRACE_I2C_TRAF (1 << 19) /* I2C traffic through the adapter */
49#define PVR2_TRACE_ENCODER (1 << 20) // mpeg2 encoder operation 49#define PVR2_TRACE_V4LIOCTL (1 << 20) /* v4l ioctl details */
50#define PVR2_TRACE_BUF_POOL (1 << 21) // Track buffer pool management 50#define PVR2_TRACE_ENCODER (1 << 21) /* mpeg2 encoder operation */
51#define PVR2_TRACE_BUF_FLOW (1 << 22) // Track buffer flow in system 51#define PVR2_TRACE_BUF_POOL (1 << 22) /* Track buffer pool management */
52#define PVR2_TRACE_DATA_FLOW (1 << 23) // Track data flow 52#define PVR2_TRACE_BUF_FLOW (1 << 23) /* Track buffer flow in system */
53#define PVR2_TRACE_DEBUGIFC (1 << 24) // Debug interface actions 53#define PVR2_TRACE_DATA_FLOW (1 << 24) /* Track data flow */
54#define PVR2_TRACE_GPIO (1 << 25) // GPIO state bit changes 54#define PVR2_TRACE_DEBUGIFC (1 << 25) /* Debug interface actions */
55#define PVR2_TRACE_GPIO (1 << 26) /* GPIO state bit changes */
55 56
56 57
57#endif /* __PVRUSB2_HDW_INTERNAL_H */ 58#endif /* __PVRUSB2_HDW_INTERNAL_H */
diff --git a/drivers/media/video/pvrusb2/pvrusb2-debugifc.c b/drivers/media/video/pvrusb2/pvrusb2-debugifc.c
index e9da9bb8f8de..6f135f4a2497 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-debugifc.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-debugifc.c
@@ -397,10 +397,22 @@ static int pvr2_debugifc_do1cmd(struct pvr2_hdw *hdw,const char *buf,
397 count -= scnt; buf += scnt; 397 count -= scnt; buf += scnt;
398 if (!wptr) return -EINVAL; 398 if (!wptr) return -EINVAL;
399 if (debugifc_match_keyword(wptr,wlen,"fetch")) { 399 if (debugifc_match_keyword(wptr,wlen,"fetch")) {
400 pvr2_hdw_cpufw_set_enabled(hdw,!0); 400 scnt = debugifc_isolate_word(buf,count,&wptr,&wlen);
401 if (scnt && wptr) {
402 count -= scnt; buf += scnt;
403 if (debugifc_match_keyword(wptr,wlen,"prom")) {
404 pvr2_hdw_cpufw_set_enabled(hdw,!0,!0);
405 } else if (debugifc_match_keyword(wptr,wlen,
406 "ram")) {
407 pvr2_hdw_cpufw_set_enabled(hdw,0,!0);
408 } else {
409 return -EINVAL;
410 }
411 }
412 pvr2_hdw_cpufw_set_enabled(hdw,0,!0);
401 return 0; 413 return 0;
402 } else if (debugifc_match_keyword(wptr,wlen,"done")) { 414 } else if (debugifc_match_keyword(wptr,wlen,"done")) {
403 pvr2_hdw_cpufw_set_enabled(hdw,0); 415 pvr2_hdw_cpufw_set_enabled(hdw,0,0);
404 return 0; 416 return 0;
405 } else { 417 } else {
406 return -EINVAL; 418 return -EINVAL;
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
index ce66ab8ff2d8..985d9ae7f5ee 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
@@ -238,6 +238,7 @@ struct pvr2_hdw {
238 // CPU firmware info (used to help find / save firmware data) 238 // CPU firmware info (used to help find / save firmware data)
239 char *fw_buffer; 239 char *fw_buffer;
240 unsigned int fw_size; 240 unsigned int fw_size;
241 int fw_cpu_flag; /* True if we are dealing with the CPU */
241 242
242 // Which subsystem pieces have been enabled / configured 243 // Which subsystem pieces have been enabled / configured
243 unsigned long subsys_enabled_mask; 244 unsigned long subsys_enabled_mask;
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
index 1311891e7ee3..27b12b4b5c88 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -492,7 +492,7 @@ static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp)
492 cs.controls = &c1; 492 cs.controls = &c1;
493 cs.count = 1; 493 cs.count = 1;
494 c1.id = cptr->info->v4l_id; 494 c1.id = cptr->info->v4l_id;
495 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs, 495 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs,
496 VIDIOC_G_EXT_CTRLS); 496 VIDIOC_G_EXT_CTRLS);
497 if (ret) return ret; 497 if (ret) return ret;
498 *vp = c1.value; 498 *vp = c1.value;
@@ -510,7 +510,7 @@ static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v)
510 cs.count = 1; 510 cs.count = 1;
511 c1.id = cptr->info->v4l_id; 511 c1.id = cptr->info->v4l_id;
512 c1.value = v; 512 c1.value = v;
513 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs, 513 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs,
514 VIDIOC_S_EXT_CTRLS); 514 VIDIOC_S_EXT_CTRLS);
515 if (ret) return ret; 515 if (ret) return ret;
516 cptr->hdw->enc_stale = !0; 516 cptr->hdw->enc_stale = !0;
@@ -1143,6 +1143,13 @@ static int pvr2_upload_firmware1(struct pvr2_hdw *hdw)
1143 fw_files_24xxx, ARRAY_SIZE(fw_files_24xxx) 1143 fw_files_24xxx, ARRAY_SIZE(fw_files_24xxx)
1144 }, 1144 },
1145 }; 1145 };
1146
1147 if ((hdw->hdw_type >= ARRAY_SIZE(fw_file_defs)) ||
1148 (!fw_file_defs[hdw->hdw_type].lst)) {
1149 hdw->fw1_state = FW1_STATE_OK;
1150 return 0;
1151 }
1152
1146 hdw->fw1_state = FW1_STATE_FAILED; // default result 1153 hdw->fw1_state = FW1_STATE_FAILED; // default result
1147 1154
1148 trace_firmware("pvr2_upload_firmware1"); 1155 trace_firmware("pvr2_upload_firmware1");
@@ -1224,6 +1231,11 @@ int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
1224 CX2341X_FIRM_ENC_FILENAME, 1231 CX2341X_FIRM_ENC_FILENAME,
1225 }; 1232 };
1226 1233
1234 if ((hdw->hdw_type != PVR2_HDW_TYPE_29XXX) &&
1235 (hdw->hdw_type != PVR2_HDW_TYPE_24XXX)) {
1236 return 0;
1237 }
1238
1227 trace_firmware("pvr2_upload_firmware2"); 1239 trace_firmware("pvr2_upload_firmware2");
1228 1240
1229 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder", 1241 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder",
@@ -1682,6 +1694,44 @@ static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw)
1682 return result == 0; 1694 return result == 0;
1683} 1695}
1684 1696
1697struct pvr2_std_hack {
1698 v4l2_std_id pat; /* Pattern to match */
1699 v4l2_std_id msk; /* Which bits we care about */
1700 v4l2_std_id std; /* What additional standards or default to set */
1701};
1702
1703/* This data structure labels specific combinations of standards from
1704 tveeprom that we'll try to recognize. If we recognize one, then assume
1705 a specified default standard to use. This is here because tveeprom only
1706 tells us about available standards not the intended default standard (if
1707 any) for the device in question. We guess the default based on what has
1708 been reported as available. Note that this is only for guessing a
1709 default - which can always be overridden explicitly - and if the user
1710 has otherwise named a default then that default will always be used in
1711 place of this table. */
1712const static struct pvr2_std_hack std_eeprom_maps[] = {
1713 { /* PAL(B/G) */
1714 .pat = V4L2_STD_B|V4L2_STD_GH,
1715 .std = V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_PAL_G,
1716 },
1717 { /* NTSC(M) */
1718 .pat = V4L2_STD_MN,
1719 .std = V4L2_STD_NTSC_M,
1720 },
1721 { /* PAL(I) */
1722 .pat = V4L2_STD_PAL_I,
1723 .std = V4L2_STD_PAL_I,
1724 },
1725 { /* SECAM(L/L') */
1726 .pat = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1727 .std = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1728 },
1729 { /* PAL(D/D1/K) */
1730 .pat = V4L2_STD_DK,
1731 .std = V4L2_STD_PAL_D/V4L2_STD_PAL_D1|V4L2_STD_PAL_K,
1732 },
1733};
1734
1685static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw) 1735static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1686{ 1736{
1687 char buf[40]; 1737 char buf[40];
@@ -1691,7 +1741,7 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1691 std1 = get_default_standard(hdw); 1741 std1 = get_default_standard(hdw);
1692 1742
1693 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom); 1743 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom);
1694 pvr2_trace(PVR2_TRACE_INIT, 1744 pvr2_trace(PVR2_TRACE_STD,
1695 "Supported video standard(s) reported by eeprom: %.*s", 1745 "Supported video standard(s) reported by eeprom: %.*s",
1696 bcnt,buf); 1746 bcnt,buf);
1697 1747
@@ -1700,7 +1750,7 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1700 std2 = std1 & ~hdw->std_mask_avail; 1750 std2 = std1 & ~hdw->std_mask_avail;
1701 if (std2) { 1751 if (std2) {
1702 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2); 1752 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2);
1703 pvr2_trace(PVR2_TRACE_INIT, 1753 pvr2_trace(PVR2_TRACE_STD,
1704 "Expanding supported video standards" 1754 "Expanding supported video standards"
1705 " to include: %.*s", 1755 " to include: %.*s",
1706 bcnt,buf); 1756 bcnt,buf);
@@ -1711,7 +1761,7 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1711 1761
1712 if (std1) { 1762 if (std1) {
1713 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1); 1763 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1);
1714 pvr2_trace(PVR2_TRACE_INIT, 1764 pvr2_trace(PVR2_TRACE_STD,
1715 "Initial video standard forced to %.*s", 1765 "Initial video standard forced to %.*s",
1716 bcnt,buf); 1766 bcnt,buf);
1717 hdw->std_mask_cur = std1; 1767 hdw->std_mask_cur = std1;
@@ -1720,12 +1770,33 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1720 return; 1770 return;
1721 } 1771 }
1722 1772
1773 {
1774 unsigned int idx;
1775 for (idx = 0; idx < ARRAY_SIZE(std_eeprom_maps); idx++) {
1776 if (std_eeprom_maps[idx].msk ?
1777 ((std_eeprom_maps[idx].pat ^
1778 hdw->std_mask_eeprom) &
1779 std_eeprom_maps[idx].msk) :
1780 (std_eeprom_maps[idx].pat !=
1781 hdw->std_mask_eeprom)) continue;
1782 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),
1783 std_eeprom_maps[idx].std);
1784 pvr2_trace(PVR2_TRACE_STD,
1785 "Initial video standard guessed as %.*s",
1786 bcnt,buf);
1787 hdw->std_mask_cur = std_eeprom_maps[idx].std;
1788 hdw->std_dirty = !0;
1789 pvr2_hdw_internal_find_stdenum(hdw);
1790 return;
1791 }
1792 }
1793
1723 if (hdw->std_enum_cnt > 1) { 1794 if (hdw->std_enum_cnt > 1) {
1724 // Autoselect the first listed standard 1795 // Autoselect the first listed standard
1725 hdw->std_enum_cur = 1; 1796 hdw->std_enum_cur = 1;
1726 hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id; 1797 hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id;
1727 hdw->std_dirty = !0; 1798 hdw->std_dirty = !0;
1728 pvr2_trace(PVR2_TRACE_INIT, 1799 pvr2_trace(PVR2_TRACE_STD,
1729 "Initial video standard auto-selected to %s", 1800 "Initial video standard auto-selected to %s",
1730 hdw->std_defs[hdw->std_enum_cur-1].name); 1801 hdw->std_defs[hdw->std_enum_cur-1].name);
1731 return; 1802 return;
@@ -1742,29 +1813,35 @@ static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
1742 unsigned int idx; 1813 unsigned int idx;
1743 struct pvr2_ctrl *cptr; 1814 struct pvr2_ctrl *cptr;
1744 int reloadFl = 0; 1815 int reloadFl = 0;
1745 if (!reloadFl) { 1816 if ((hdw->hdw_type == PVR2_HDW_TYPE_29XXX) ||
1746 reloadFl = (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints 1817 (hdw->hdw_type == PVR2_HDW_TYPE_24XXX)) {
1747 == 0); 1818 if (!reloadFl) {
1748 if (reloadFl) { 1819 reloadFl =
1749 pvr2_trace(PVR2_TRACE_INIT, 1820 (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints
1750 "USB endpoint config looks strange" 1821 == 0);
1751 "; possibly firmware needs to be loaded"); 1822 if (reloadFl) {
1823 pvr2_trace(PVR2_TRACE_INIT,
1824 "USB endpoint config looks strange"
1825 "; possibly firmware needs to be"
1826 " loaded");
1827 }
1752 } 1828 }
1753 } 1829 if (!reloadFl) {
1754 if (!reloadFl) { 1830 reloadFl = !pvr2_hdw_check_firmware(hdw);
1755 reloadFl = !pvr2_hdw_check_firmware(hdw); 1831 if (reloadFl) {
1756 if (reloadFl) { 1832 pvr2_trace(PVR2_TRACE_INIT,
1757 pvr2_trace(PVR2_TRACE_INIT, 1833 "Check for FX2 firmware failed"
1758 "Check for FX2 firmware failed" 1834 "; possibly firmware needs to be"
1759 "; possibly firmware needs to be loaded"); 1835 " loaded");
1836 }
1760 } 1837 }
1761 } 1838 if (reloadFl) {
1762 if (reloadFl) { 1839 if (pvr2_upload_firmware1(hdw) != 0) {
1763 if (pvr2_upload_firmware1(hdw) != 0) { 1840 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1764 pvr2_trace(PVR2_TRACE_ERROR_LEGS, 1841 "Failure uploading firmware1");
1765 "Failure uploading firmware1"); 1842 }
1843 return;
1766 } 1844 }
1767 return;
1768 } 1845 }
1769 hdw->fw1_state = FW1_STATE_OK; 1846 hdw->fw1_state = FW1_STATE_OK;
1770 1847
@@ -1773,17 +1850,25 @@ static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
1773 } 1850 }
1774 if (!pvr2_hdw_dev_ok(hdw)) return; 1851 if (!pvr2_hdw_dev_ok(hdw)) return;
1775 1852
1776 for (idx = 0; idx < pvr2_client_lists[hdw->hdw_type].cnt; idx++) { 1853 if (hdw->hdw_type < ARRAY_SIZE(pvr2_client_lists)) {
1777 request_module(pvr2_client_lists[hdw->hdw_type].lst[idx]); 1854 for (idx = 0;
1855 idx < pvr2_client_lists[hdw->hdw_type].cnt;
1856 idx++) {
1857 request_module(
1858 pvr2_client_lists[hdw->hdw_type].lst[idx]);
1859 }
1778 } 1860 }
1779 1861
1780 pvr2_hdw_cmd_powerup(hdw); 1862 if ((hdw->hdw_type == PVR2_HDW_TYPE_29XXX) ||
1781 if (!pvr2_hdw_dev_ok(hdw)) return; 1863 (hdw->hdw_type == PVR2_HDW_TYPE_24XXX)) {
1864 pvr2_hdw_cmd_powerup(hdw);
1865 if (!pvr2_hdw_dev_ok(hdw)) return;
1782 1866
1783 if (pvr2_upload_firmware2(hdw)){ 1867 if (pvr2_upload_firmware2(hdw)){
1784 pvr2_trace(PVR2_TRACE_ERROR_LEGS,"device unstable!!"); 1868 pvr2_trace(PVR2_TRACE_ERROR_LEGS,"device unstable!!");
1785 pvr2_hdw_render_useless(hdw); 1869 pvr2_hdw_render_useless(hdw);
1786 return; 1870 return;
1871 }
1787 } 1872 }
1788 1873
1789 // This step MUST happen after the earlier powerup step. 1874 // This step MUST happen after the earlier powerup step.
@@ -2172,6 +2257,7 @@ static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw)
2172/* Destroy hardware interaction structure */ 2257/* Destroy hardware interaction structure */
2173void pvr2_hdw_destroy(struct pvr2_hdw *hdw) 2258void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2174{ 2259{
2260 if (!hdw) return;
2175 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw); 2261 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw);
2176 if (hdw->fw_buffer) { 2262 if (hdw->fw_buffer) {
2177 kfree(hdw->fw_buffer); 2263 kfree(hdw->fw_buffer);
@@ -2478,7 +2564,7 @@ static int pvr2_hdw_commit_ctl_internal(struct pvr2_hdw *hdw)
2478 cs.count = 1; 2564 cs.count = 1;
2479 c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ; 2565 c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ;
2480 c1.value = hdw->srate_val; 2566 c1.value = hdw->srate_val;
2481 cx2341x_ext_ctrls(&hdw->enc_ctl_state,&cs,VIDIOC_S_EXT_CTRLS); 2567 cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS);
2482 } 2568 }
2483 2569
2484 /* Scan i2c core at this point - before we clear all the dirty 2570 /* Scan i2c core at this point - before we clear all the dirty
@@ -2604,7 +2690,85 @@ void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw)
2604 } while (0); LOCK_GIVE(hdw->big_lock); 2690 } while (0); LOCK_GIVE(hdw->big_lock);
2605} 2691}
2606 2692
2607void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, int enable_flag) 2693
2694/* Grab EEPROM contents, needed for direct method. */
2695#define EEPROM_SIZE 8192
2696#define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__)
2697static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw)
2698{
2699 struct i2c_msg msg[2];
2700 u8 *eeprom;
2701 u8 iadd[2];
2702 u8 addr;
2703 u16 eepromSize;
2704 unsigned int offs;
2705 int ret;
2706 int mode16 = 0;
2707 unsigned pcnt,tcnt;
2708 eeprom = kmalloc(EEPROM_SIZE,GFP_KERNEL);
2709 if (!eeprom) {
2710 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2711 "Failed to allocate memory"
2712 " required to read eeprom");
2713 return NULL;
2714 }
2715
2716 trace_eeprom("Value for eeprom addr from controller was 0x%x",
2717 hdw->eeprom_addr);
2718 addr = hdw->eeprom_addr;
2719 /* Seems that if the high bit is set, then the *real* eeprom
2720 address is shifted right now bit position (noticed this in
2721 newer PVR USB2 hardware) */
2722 if (addr & 0x80) addr >>= 1;
2723
2724 /* FX2 documentation states that a 16bit-addressed eeprom is
2725 expected if the I2C address is an odd number (yeah, this is
2726 strange but it's what they do) */
2727 mode16 = (addr & 1);
2728 eepromSize = (mode16 ? EEPROM_SIZE : 256);
2729 trace_eeprom("Examining %d byte eeprom at location 0x%x"
2730 " using %d bit addressing",eepromSize,addr,
2731 mode16 ? 16 : 8);
2732
2733 msg[0].addr = addr;
2734 msg[0].flags = 0;
2735 msg[0].len = mode16 ? 2 : 1;
2736 msg[0].buf = iadd;
2737 msg[1].addr = addr;
2738 msg[1].flags = I2C_M_RD;
2739
2740 /* We have to do the actual eeprom data fetch ourselves, because
2741 (1) we're only fetching part of the eeprom, and (2) if we were
2742 getting the whole thing our I2C driver can't grab it in one
2743 pass - which is what tveeprom is otherwise going to attempt */
2744 memset(eeprom,0,EEPROM_SIZE);
2745 for (tcnt = 0; tcnt < EEPROM_SIZE; tcnt += pcnt) {
2746 pcnt = 16;
2747 if (pcnt + tcnt > EEPROM_SIZE) pcnt = EEPROM_SIZE-tcnt;
2748 offs = tcnt + (eepromSize - EEPROM_SIZE);
2749 if (mode16) {
2750 iadd[0] = offs >> 8;
2751 iadd[1] = offs;
2752 } else {
2753 iadd[0] = offs;
2754 }
2755 msg[1].len = pcnt;
2756 msg[1].buf = eeprom+tcnt;
2757 if ((ret = i2c_transfer(&hdw->i2c_adap,
2758 msg,ARRAY_SIZE(msg))) != 2) {
2759 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2760 "eeprom fetch set offs err=%d",ret);
2761 kfree(eeprom);
2762 return NULL;
2763 }
2764 }
2765 return eeprom;
2766}
2767
2768
2769void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw,
2770 int prom_flag,
2771 int enable_flag)
2608{ 2772{
2609 int ret; 2773 int ret;
2610 u16 address; 2774 u16 address;
@@ -2618,37 +2782,59 @@ void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, int enable_flag)
2618 kfree(hdw->fw_buffer); 2782 kfree(hdw->fw_buffer);
2619 hdw->fw_buffer = NULL; 2783 hdw->fw_buffer = NULL;
2620 hdw->fw_size = 0; 2784 hdw->fw_size = 0;
2621 /* Now release the CPU. It will disconnect and 2785 if (hdw->fw_cpu_flag) {
2622 reconnect later. */ 2786 /* Now release the CPU. It will disconnect
2623 pvr2_hdw_cpureset_assert(hdw,0); 2787 and reconnect later. */
2788 pvr2_hdw_cpureset_assert(hdw,0);
2789 }
2624 break; 2790 break;
2625 } 2791 }
2626 2792
2627 pvr2_trace(PVR2_TRACE_FIRMWARE, 2793 hdw->fw_cpu_flag = (prom_flag == 0);
2628 "Preparing to suck out CPU firmware"); 2794 if (hdw->fw_cpu_flag) {
2629 hdw->fw_size = 0x2000; 2795 pvr2_trace(PVR2_TRACE_FIRMWARE,
2630 hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL); 2796 "Preparing to suck out CPU firmware");
2631 if (!hdw->fw_buffer) { 2797 hdw->fw_size = 0x2000;
2632 hdw->fw_size = 0; 2798 hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL);
2633 break; 2799 if (!hdw->fw_buffer) {
2634 } 2800 hdw->fw_size = 0;
2801 break;
2802 }
2635 2803
2636 /* We have to hold the CPU during firmware upload. */ 2804 /* We have to hold the CPU during firmware upload. */
2637 pvr2_hdw_cpureset_assert(hdw,1); 2805 pvr2_hdw_cpureset_assert(hdw,1);
2638 2806
2639 /* download the firmware from address 0000-1fff in 2048 2807 /* download the firmware from address 0000-1fff in 2048
2640 (=0x800) bytes chunk. */ 2808 (=0x800) bytes chunk. */
2641 2809
2642 pvr2_trace(PVR2_TRACE_FIRMWARE,"Grabbing CPU firmware"); 2810 pvr2_trace(PVR2_TRACE_FIRMWARE,
2643 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0); 2811 "Grabbing CPU firmware");
2644 for(address = 0; address < hdw->fw_size; address += 0x800) { 2812 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);
2645 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0xc0, 2813 for(address = 0; address < hdw->fw_size;
2646 address,0, 2814 address += 0x800) {
2647 hdw->fw_buffer+address,0x800,HZ); 2815 ret = usb_control_msg(hdw->usb_dev,pipe,
2648 if (ret < 0) break; 2816 0xa0,0xc0,
2649 } 2817 address,0,
2818 hdw->fw_buffer+address,
2819 0x800,HZ);
2820 if (ret < 0) break;
2821 }
2650 2822
2651 pvr2_trace(PVR2_TRACE_FIRMWARE,"Done grabbing CPU firmware"); 2823 pvr2_trace(PVR2_TRACE_FIRMWARE,
2824 "Done grabbing CPU firmware");
2825 } else {
2826 pvr2_trace(PVR2_TRACE_FIRMWARE,
2827 "Sucking down EEPROM contents");
2828 hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw);
2829 if (!hdw->fw_buffer) {
2830 pvr2_trace(PVR2_TRACE_FIRMWARE,
2831 "EEPROM content suck failed.");
2832 break;
2833 }
2834 hdw->fw_size = EEPROM_SIZE;
2835 pvr2_trace(PVR2_TRACE_FIRMWARE,
2836 "Done sucking down EEPROM contents");
2837 }
2652 2838
2653 } while (0); LOCK_GIVE(hdw->big_lock); 2839 } while (0); LOCK_GIVE(hdw->big_lock);
2654} 2840}
@@ -3272,7 +3458,6 @@ int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
3272 int setFl,u64 *val_ptr) 3458 int setFl,u64 *val_ptr)
3273{ 3459{
3274#ifdef CONFIG_VIDEO_ADV_DEBUG 3460#ifdef CONFIG_VIDEO_ADV_DEBUG
3275 struct list_head *item;
3276 struct pvr2_i2c_client *cp; 3461 struct pvr2_i2c_client *cp;
3277 struct v4l2_register req; 3462 struct v4l2_register req;
3278 int stat = 0; 3463 int stat = 0;
@@ -3285,8 +3470,7 @@ int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
3285 req.reg = reg_id; 3470 req.reg = reg_id;
3286 if (setFl) req.val = *val_ptr; 3471 if (setFl) req.val = *val_ptr;
3287 mutex_lock(&hdw->i2c_list_lock); do { 3472 mutex_lock(&hdw->i2c_list_lock); do {
3288 list_for_each(item,&hdw->i2c_clients) { 3473 list_for_each_entry(cp, &hdw->i2c_clients, list) {
3289 cp = list_entry(item,struct pvr2_i2c_client,list);
3290 if (!v4l2_chip_match_i2c_client( 3474 if (!v4l2_chip_match_i2c_client(
3291 cp->client, 3475 cp->client,
3292 req.match_type, req.match_chip)) { 3476 req.match_type, req.match_chip)) {
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.h b/drivers/media/video/pvrusb2/pvrusb2-hdw.h
index 4dba8d006324..e2f9d5e4cb65 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.h
@@ -197,11 +197,13 @@ void pvr2_hdw_subsys_stream_bit_chg(struct pvr2_hdw *hdw,
197unsigned long pvr2_hdw_subsys_stream_get(struct pvr2_hdw *); 197unsigned long pvr2_hdw_subsys_stream_get(struct pvr2_hdw *);
198 198
199 199
200/* Enable / disable retrieval of CPU firmware. This must be enabled before 200/* Enable / disable retrieval of CPU firmware or prom contents. This must
201 pvr2_hdw_cpufw_get() will function. Note that doing this may prevent 201 be enabled before pvr2_hdw_cpufw_get() will function. Note that doing
202 the device from running (and leaving this mode may imply a device 202 this may prevent the device from running (and leaving this mode may
203 reset). */ 203 imply a device reset). */
204void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *, int enable_flag); 204void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *,
205 int prom_flag,
206 int enable_flag);
205 207
206/* Return true if we're in a mode for retrieval CPU firmware */ 208/* Return true if we're in a mode for retrieval CPU firmware */
207int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *); 209int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *);
diff --git a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
index 6786d3c0c98b..898c9d2e4cdf 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
@@ -389,10 +389,6 @@ static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap,
389 ret = -EINVAL; 389 ret = -EINVAL;
390 goto done; 390 goto done;
391 } 391 }
392 if ((msgs[0].flags & I2C_M_NOSTART)) {
393 trace_i2c("i2c refusing I2C_M_NOSTART");
394 goto done;
395 }
396 if (msgs[0].addr < PVR2_I2C_FUNC_CNT) { 392 if (msgs[0].addr < PVR2_I2C_FUNC_CNT) {
397 funcp = hdw->i2c_func[msgs[0].addr]; 393 funcp = hdw->i2c_func[msgs[0].addr];
398 } 394 }
@@ -494,14 +490,12 @@ static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap,
494 cnt = msgs[idx].len; 490 cnt = msgs[idx].len;
495 printk(KERN_INFO 491 printk(KERN_INFO
496 "pvrusb2 i2c xfer %u/%u:" 492 "pvrusb2 i2c xfer %u/%u:"
497 " addr=0x%x len=%d %s%s", 493 " addr=0x%x len=%d %s",
498 idx+1,num, 494 idx+1,num,
499 msgs[idx].addr, 495 msgs[idx].addr,
500 cnt, 496 cnt,
501 (msgs[idx].flags & I2C_M_RD ? 497 (msgs[idx].flags & I2C_M_RD ?
502 "read" : "write"), 498 "read" : "write"));
503 (msgs[idx].flags & I2C_M_NOSTART ?
504 " nostart" : ""));
505 if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) { 499 if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) {
506 if (cnt > 8) cnt = 8; 500 if (cnt > 8) cnt = 8;
507 printk(" ["); 501 printk(" [");
@@ -534,7 +528,7 @@ static int pvr2_i2c_control(struct i2c_adapter *adapter,
534 528
535static u32 pvr2_i2c_functionality(struct i2c_adapter *adap) 529static u32 pvr2_i2c_functionality(struct i2c_adapter *adap)
536{ 530{
537 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE_DATA; 531 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
538} 532}
539 533
540static int pvr2_i2c_core_singleton(struct i2c_client *cp, 534static int pvr2_i2c_core_singleton(struct i2c_client *cp,
@@ -576,15 +570,13 @@ int pvr2_i2c_client_cmd(struct pvr2_i2c_client *cp,unsigned int cmd,void *arg)
576 570
577int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg) 571int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg)
578{ 572{
579 struct list_head *item,*nc; 573 struct pvr2_i2c_client *cp, *ncp;
580 struct pvr2_i2c_client *cp;
581 int stat = -EINVAL; 574 int stat = -EINVAL;
582 575
583 if (!hdw) return stat; 576 if (!hdw) return stat;
584 577
585 mutex_lock(&hdw->i2c_list_lock); 578 mutex_lock(&hdw->i2c_list_lock);
586 list_for_each_safe(item,nc,&hdw->i2c_clients) { 579 list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients, list) {
587 cp = list_entry(item,struct pvr2_i2c_client,list);
588 if (!cp->recv_enable) continue; 580 if (!cp->recv_enable) continue;
589 mutex_unlock(&hdw->i2c_list_lock); 581 mutex_unlock(&hdw->i2c_list_lock);
590 stat = pvr2_i2c_client_cmd(cp,cmd,arg); 582 stat = pvr2_i2c_client_cmd(cp,cmd,arg);
@@ -608,13 +600,11 @@ static int handler_check(struct pvr2_i2c_client *cp)
608 600
609void pvr2_i2c_core_status_poll(struct pvr2_hdw *hdw) 601void pvr2_i2c_core_status_poll(struct pvr2_hdw *hdw)
610{ 602{
611 struct list_head *item;
612 struct pvr2_i2c_client *cp; 603 struct pvr2_i2c_client *cp;
613 mutex_lock(&hdw->i2c_list_lock); do { 604 mutex_lock(&hdw->i2c_list_lock); do {
614 struct v4l2_tuner *vtp = &hdw->tuner_signal_info; 605 struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
615 memset(vtp,0,sizeof(*vtp)); 606 memset(vtp,0,sizeof(*vtp));
616 list_for_each(item,&hdw->i2c_clients) { 607 list_for_each_entry(cp, &hdw->i2c_clients, list) {
617 cp = list_entry(item,struct pvr2_i2c_client,list);
618 if (!cp->detected_flag) continue; 608 if (!cp->detected_flag) continue;
619 if (!cp->status_poll) continue; 609 if (!cp->status_poll) continue;
620 cp->status_poll(cp); 610 cp->status_poll(cp);
@@ -636,8 +626,7 @@ void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
636{ 626{
637 unsigned long msk; 627 unsigned long msk;
638 unsigned int idx; 628 unsigned int idx;
639 struct list_head *item,*nc; 629 struct pvr2_i2c_client *cp, *ncp;
640 struct pvr2_i2c_client *cp;
641 630
642 if (!hdw->i2c_linked) return; 631 if (!hdw->i2c_linked) return;
643 if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) { 632 if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) {
@@ -655,9 +644,7 @@ void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
655 buf = kmalloc(BUFSIZE,GFP_KERNEL); 644 buf = kmalloc(BUFSIZE,GFP_KERNEL);
656 pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT"); 645 pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT");
657 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT; 646 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT;
658 list_for_each(item,&hdw->i2c_clients) { 647 list_for_each_entry(cp, &hdw->i2c_clients, list) {
659 cp = list_entry(item,struct pvr2_i2c_client,
660 list);
661 if (!cp->detected_flag) { 648 if (!cp->detected_flag) {
662 cp->ctl_mask = 0; 649 cp->ctl_mask = 0;
663 pvr2_i2c_probe(hdw,cp); 650 pvr2_i2c_probe(hdw,cp);
@@ -693,9 +680,7 @@ void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
693 "i2c: PEND_STALE (0x%lx)", 680 "i2c: PEND_STALE (0x%lx)",
694 hdw->i2c_stale_mask); 681 hdw->i2c_stale_mask);
695 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE; 682 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE;
696 list_for_each(item,&hdw->i2c_clients) { 683 list_for_each_entry(cp, &hdw->i2c_clients, list) {
697 cp = list_entry(item,struct pvr2_i2c_client,
698 list);
699 m2 = hdw->i2c_stale_mask; 684 m2 = hdw->i2c_stale_mask;
700 m2 &= cp->ctl_mask; 685 m2 &= cp->ctl_mask;
701 m2 &= ~cp->pend_mask; 686 m2 &= ~cp->pend_mask;
@@ -716,9 +701,8 @@ void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
716 and update each one. */ 701 and update each one. */
717 pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT"); 702 pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT");
718 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT; 703 hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT;
719 list_for_each_safe(item,nc,&hdw->i2c_clients) { 704 list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients,
720 cp = list_entry(item,struct pvr2_i2c_client, 705 list) {
721 list);
722 if (!cp->handler) continue; 706 if (!cp->handler) continue;
723 if (!cp->handler->func_table->update) continue; 707 if (!cp->handler->func_table->update) continue;
724 pvr2_trace(PVR2_TRACE_I2C_CORE, 708 pvr2_trace(PVR2_TRACE_I2C_CORE,
@@ -750,10 +734,8 @@ void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
750 for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { 734 for (idx = 0, msk = 1; pm; idx++, msk <<= 1) {
751 if (!(pm & msk)) continue; 735 if (!(pm & msk)) continue;
752 pm &= ~msk; 736 pm &= ~msk;
753 list_for_each(item,&hdw->i2c_clients) { 737 list_for_each_entry(cp, &hdw->i2c_clients,
754 cp = list_entry(item, 738 list) {
755 struct pvr2_i2c_client,
756 list);
757 if (cp->pend_mask & msk) { 739 if (cp->pend_mask & msk) {
758 cp->pend_mask &= ~msk; 740 cp->pend_mask &= ~msk;
759 cp->recv_enable = !0; 741 cp->recv_enable = !0;
@@ -777,7 +759,6 @@ int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw)
777 unsigned long msk,sm,pm; 759 unsigned long msk,sm,pm;
778 unsigned int idx; 760 unsigned int idx;
779 const struct pvr2_i2c_op *opf; 761 const struct pvr2_i2c_op *opf;
780 struct list_head *item;
781 struct pvr2_i2c_client *cp; 762 struct pvr2_i2c_client *cp;
782 unsigned int pt = 0; 763 unsigned int pt = 0;
783 764
@@ -796,11 +777,9 @@ int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw)
796 } 777 }
797 if (sm) pt |= PVR2_I2C_PEND_STALE; 778 if (sm) pt |= PVR2_I2C_PEND_STALE;
798 779
799 list_for_each(item,&hdw->i2c_clients) { 780 list_for_each_entry(cp, &hdw->i2c_clients, list)
800 cp = list_entry(item,struct pvr2_i2c_client,list); 781 if (handler_check(cp))
801 if (!handler_check(cp)) continue; 782 pt |= PVR2_I2C_PEND_CLIENT;
802 pt |= PVR2_I2C_PEND_CLIENT;
803 }
804 783
805 if (pt) { 784 if (pt) {
806 mutex_lock(&hdw->i2c_list_lock); do { 785 mutex_lock(&hdw->i2c_list_lock); do {
@@ -888,12 +867,10 @@ unsigned int pvr2_i2c_report(struct pvr2_hdw *hdw,
888 char *buf,unsigned int maxlen) 867 char *buf,unsigned int maxlen)
889{ 868{
890 unsigned int ccnt,bcnt; 869 unsigned int ccnt,bcnt;
891 struct list_head *item;
892 struct pvr2_i2c_client *cp; 870 struct pvr2_i2c_client *cp;
893 ccnt = 0; 871 ccnt = 0;
894 mutex_lock(&hdw->i2c_list_lock); do { 872 mutex_lock(&hdw->i2c_list_lock); do {
895 list_for_each(item,&hdw->i2c_clients) { 873 list_for_each_entry(cp, &hdw->i2c_clients, list) {
896 cp = list_entry(item,struct pvr2_i2c_client,list);
897 bcnt = pvr2_i2c_client_describe( 874 bcnt = pvr2_i2c_client_describe(
898 cp, 875 cp,
899 (PVR2_I2C_DETAIL_HANDLER| 876 (PVR2_I2C_DETAIL_HANDLER|
@@ -931,13 +908,11 @@ static int pvr2_i2c_attach_inform(struct i2c_client *client)
931static int pvr2_i2c_detach_inform(struct i2c_client *client) 908static int pvr2_i2c_detach_inform(struct i2c_client *client)
932{ 909{
933 struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); 910 struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data);
934 struct pvr2_i2c_client *cp; 911 struct pvr2_i2c_client *cp, *ncp;
935 struct list_head *item,*nc;
936 unsigned long amask = 0; 912 unsigned long amask = 0;
937 int foundfl = 0; 913 int foundfl = 0;
938 mutex_lock(&hdw->i2c_list_lock); do { 914 mutex_lock(&hdw->i2c_list_lock); do {
939 list_for_each_safe(item,nc,&hdw->i2c_clients) { 915 list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients, list) {
940 cp = list_entry(item,struct pvr2_i2c_client,list);
941 if (cp->client == client) { 916 if (cp->client == client) {
942 trace_i2c("pvr2_i2c_detach" 917 trace_i2c("pvr2_i2c_detach"
943 " [client=%s @ 0x%x ctxt=%p]", 918 " [client=%s @ 0x%x ctxt=%p]",
diff --git a/drivers/media/video/pvrusb2/pvrusb2-main.c b/drivers/media/video/pvrusb2/pvrusb2-main.c
index 9ea41c6699bb..ca9e2789c8ca 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-main.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-main.c
@@ -24,7 +24,6 @@
24#include <linux/errno.h> 24#include <linux/errno.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/usb.h> 27#include <linux/usb.h>
29#include <linux/videodev2.h> 28#include <linux/videodev2.h>
30 29
@@ -42,6 +41,7 @@
42 41
43#define DEFAULT_DEBUG_MASK (PVR2_TRACE_ERROR_LEGS| \ 42#define DEFAULT_DEBUG_MASK (PVR2_TRACE_ERROR_LEGS| \
44 PVR2_TRACE_INFO| \ 43 PVR2_TRACE_INFO| \
44 PVR2_TRACE_STD| \
45 PVR2_TRACE_TOLERANCE| \ 45 PVR2_TRACE_TOLERANCE| \
46 PVR2_TRACE_TRAP| \ 46 PVR2_TRACE_TRAP| \
47 0) 47 0)
diff --git a/drivers/media/video/pvrusb2/pvrusb2-std.c b/drivers/media/video/pvrusb2/pvrusb2-std.c
index 81de26ba41d9..63e55bb59fcb 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-std.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-std.c
@@ -298,7 +298,7 @@ static int pvr2_std_fill(struct v4l2_standard *std,v4l2_std_id id)
298 std->id = id; 298 std->id = id;
299 bcnt = pvr2_std_id_to_str(std->name,sizeof(std->name)-1,id); 299 bcnt = pvr2_std_id_to_str(std->name,sizeof(std->name)-1,id);
300 std->name[bcnt] = 0; 300 std->name[bcnt] = 0;
301 pvr2_trace(PVR2_TRACE_INIT,"Set up standard idx=%u name=%s", 301 pvr2_trace(PVR2_TRACE_STD,"Set up standard idx=%u name=%s",
302 std->index,std->name); 302 std->index,std->name);
303 return !0; 303 return !0;
304} 304}
@@ -320,11 +320,11 @@ struct v4l2_standard *pvr2_std_create_enum(unsigned int *countptr,
320 v4l2_std_id idmsk,cmsk,fmsk; 320 v4l2_std_id idmsk,cmsk,fmsk;
321 struct v4l2_standard *stddefs; 321 struct v4l2_standard *stddefs;
322 322
323 if (pvrusb2_debug & PVR2_TRACE_INIT) { 323 if (pvrusb2_debug & PVR2_TRACE_STD) {
324 char buf[50]; 324 char buf[50];
325 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),id); 325 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),id);
326 pvr2_trace( 326 pvr2_trace(
327 PVR2_TRACE_INIT,"Mapping standards mask=0x%x (%.*s)", 327 PVR2_TRACE_STD,"Mapping standards mask=0x%x (%.*s)",
328 (int)id,bcnt,buf); 328 (int)id,bcnt,buf);
329 } 329 }
330 330
@@ -355,7 +355,7 @@ struct v4l2_standard *pvr2_std_create_enum(unsigned int *countptr,
355 bcnt,buf); 355 bcnt,buf);
356 } 356 }
357 357
358 pvr2_trace(PVR2_TRACE_INIT,"Setting up %u unique standard(s)", 358 pvr2_trace(PVR2_TRACE_STD,"Setting up %u unique standard(s)",
359 std_cnt); 359 std_cnt);
360 if (!std_cnt) return NULL; // paranoia 360 if (!std_cnt) return NULL; // paranoia
361 361
diff --git a/drivers/media/video/pvrusb2/pvrusb2-sysfs.c b/drivers/media/video/pvrusb2/pvrusb2-sysfs.c
index 7ab79baa1c8c..7a78d6b34738 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-sysfs.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-sysfs.c
@@ -33,16 +33,16 @@
33 33
34struct pvr2_sysfs { 34struct pvr2_sysfs {
35 struct pvr2_channel channel; 35 struct pvr2_channel channel;
36 struct class_device *class_dev; 36 struct device *class_dev;
37#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC 37#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC
38 struct pvr2_sysfs_debugifc *debugifc; 38 struct pvr2_sysfs_debugifc *debugifc;
39#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */ 39#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */
40 struct pvr2_sysfs_ctl_item *item_first; 40 struct pvr2_sysfs_ctl_item *item_first;
41 struct pvr2_sysfs_ctl_item *item_last; 41 struct pvr2_sysfs_ctl_item *item_last;
42 struct class_device_attribute attr_v4l_minor_number; 42 struct device_attribute attr_v4l_minor_number;
43 struct class_device_attribute attr_v4l_radio_minor_number; 43 struct device_attribute attr_v4l_radio_minor_number;
44 struct class_device_attribute attr_unit_number; 44 struct device_attribute attr_unit_number;
45 struct class_device_attribute attr_bus_info; 45 struct device_attribute attr_bus_info;
46 int v4l_minor_number_created_ok; 46 int v4l_minor_number_created_ok;
47 int v4l_radio_minor_number_created_ok; 47 int v4l_radio_minor_number_created_ok;
48 int unit_number_created_ok; 48 int unit_number_created_ok;
@@ -51,22 +51,22 @@ struct pvr2_sysfs {
51 51
52#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC 52#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC
53struct pvr2_sysfs_debugifc { 53struct pvr2_sysfs_debugifc {
54 struct class_device_attribute attr_debugcmd; 54 struct device_attribute attr_debugcmd;
55 struct class_device_attribute attr_debuginfo; 55 struct device_attribute attr_debuginfo;
56 int debugcmd_created_ok; 56 int debugcmd_created_ok;
57 int debuginfo_created_ok; 57 int debuginfo_created_ok;
58}; 58};
59#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */ 59#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */
60 60
61struct pvr2_sysfs_ctl_item { 61struct pvr2_sysfs_ctl_item {
62 struct class_device_attribute attr_name; 62 struct device_attribute attr_name;
63 struct class_device_attribute attr_type; 63 struct device_attribute attr_type;
64 struct class_device_attribute attr_min; 64 struct device_attribute attr_min;
65 struct class_device_attribute attr_max; 65 struct device_attribute attr_max;
66 struct class_device_attribute attr_enum; 66 struct device_attribute attr_enum;
67 struct class_device_attribute attr_bits; 67 struct device_attribute attr_bits;
68 struct class_device_attribute attr_val; 68 struct device_attribute attr_val;
69 struct class_device_attribute attr_custom; 69 struct device_attribute attr_custom;
70 struct pvr2_ctrl *cptr; 70 struct pvr2_ctrl *cptr;
71 struct pvr2_sysfs *chptr; 71 struct pvr2_sysfs *chptr;
72 struct pvr2_sysfs_ctl_item *item_next; 72 struct pvr2_sysfs_ctl_item *item_next;
@@ -80,13 +80,13 @@ struct pvr2_sysfs_class {
80 struct class class; 80 struct class class;
81}; 81};
82 82
83static ssize_t show_name(int id,struct class_device *class_dev,char *buf) 83static ssize_t show_name(int id,struct device *class_dev,char *buf)
84{ 84{
85 struct pvr2_ctrl *cptr; 85 struct pvr2_ctrl *cptr;
86 struct pvr2_sysfs *sfp; 86 struct pvr2_sysfs *sfp;
87 const char *name; 87 const char *name;
88 88
89 sfp = (struct pvr2_sysfs *)class_dev->class_data; 89 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
90 if (!sfp) return -EINVAL; 90 if (!sfp) return -EINVAL;
91 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 91 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
92 if (!cptr) return -EINVAL; 92 if (!cptr) return -EINVAL;
@@ -99,14 +99,14 @@ static ssize_t show_name(int id,struct class_device *class_dev,char *buf)
99 return scnprintf(buf,PAGE_SIZE,"%s\n",name); 99 return scnprintf(buf,PAGE_SIZE,"%s\n",name);
100} 100}
101 101
102static ssize_t show_type(int id,struct class_device *class_dev,char *buf) 102static ssize_t show_type(int id,struct device *class_dev,char *buf)
103{ 103{
104 struct pvr2_ctrl *cptr; 104 struct pvr2_ctrl *cptr;
105 struct pvr2_sysfs *sfp; 105 struct pvr2_sysfs *sfp;
106 const char *name; 106 const char *name;
107 enum pvr2_ctl_type tp; 107 enum pvr2_ctl_type tp;
108 108
109 sfp = (struct pvr2_sysfs *)class_dev->class_data; 109 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
110 if (!sfp) return -EINVAL; 110 if (!sfp) return -EINVAL;
111 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 111 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
112 if (!cptr) return -EINVAL; 112 if (!cptr) return -EINVAL;
@@ -126,13 +126,13 @@ static ssize_t show_type(int id,struct class_device *class_dev,char *buf)
126 return scnprintf(buf,PAGE_SIZE,"%s\n",name); 126 return scnprintf(buf,PAGE_SIZE,"%s\n",name);
127} 127}
128 128
129static ssize_t show_min(int id,struct class_device *class_dev,char *buf) 129static ssize_t show_min(int id,struct device *class_dev,char *buf)
130{ 130{
131 struct pvr2_ctrl *cptr; 131 struct pvr2_ctrl *cptr;
132 struct pvr2_sysfs *sfp; 132 struct pvr2_sysfs *sfp;
133 long val; 133 long val;
134 134
135 sfp = (struct pvr2_sysfs *)class_dev->class_data; 135 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
136 if (!sfp) return -EINVAL; 136 if (!sfp) return -EINVAL;
137 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 137 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
138 if (!cptr) return -EINVAL; 138 if (!cptr) return -EINVAL;
@@ -143,13 +143,13 @@ static ssize_t show_min(int id,struct class_device *class_dev,char *buf)
143 return scnprintf(buf,PAGE_SIZE,"%ld\n",val); 143 return scnprintf(buf,PAGE_SIZE,"%ld\n",val);
144} 144}
145 145
146static ssize_t show_max(int id,struct class_device *class_dev,char *buf) 146static ssize_t show_max(int id,struct device *class_dev,char *buf)
147{ 147{
148 struct pvr2_ctrl *cptr; 148 struct pvr2_ctrl *cptr;
149 struct pvr2_sysfs *sfp; 149 struct pvr2_sysfs *sfp;
150 long val; 150 long val;
151 151
152 sfp = (struct pvr2_sysfs *)class_dev->class_data; 152 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
153 if (!sfp) return -EINVAL; 153 if (!sfp) return -EINVAL;
154 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 154 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
155 if (!cptr) return -EINVAL; 155 if (!cptr) return -EINVAL;
@@ -160,14 +160,14 @@ static ssize_t show_max(int id,struct class_device *class_dev,char *buf)
160 return scnprintf(buf,PAGE_SIZE,"%ld\n",val); 160 return scnprintf(buf,PAGE_SIZE,"%ld\n",val);
161} 161}
162 162
163static ssize_t show_val_norm(int id,struct class_device *class_dev,char *buf) 163static ssize_t show_val_norm(int id,struct device *class_dev,char *buf)
164{ 164{
165 struct pvr2_ctrl *cptr; 165 struct pvr2_ctrl *cptr;
166 struct pvr2_sysfs *sfp; 166 struct pvr2_sysfs *sfp;
167 int val,ret; 167 int val,ret;
168 unsigned int cnt = 0; 168 unsigned int cnt = 0;
169 169
170 sfp = (struct pvr2_sysfs *)class_dev->class_data; 170 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
171 if (!sfp) return -EINVAL; 171 if (!sfp) return -EINVAL;
172 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 172 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
173 if (!cptr) return -EINVAL; 173 if (!cptr) return -EINVAL;
@@ -184,14 +184,14 @@ static ssize_t show_val_norm(int id,struct class_device *class_dev,char *buf)
184 return cnt+1; 184 return cnt+1;
185} 185}
186 186
187static ssize_t show_val_custom(int id,struct class_device *class_dev,char *buf) 187static ssize_t show_val_custom(int id,struct device *class_dev,char *buf)
188{ 188{
189 struct pvr2_ctrl *cptr; 189 struct pvr2_ctrl *cptr;
190 struct pvr2_sysfs *sfp; 190 struct pvr2_sysfs *sfp;
191 int val,ret; 191 int val,ret;
192 unsigned int cnt = 0; 192 unsigned int cnt = 0;
193 193
194 sfp = (struct pvr2_sysfs *)class_dev->class_data; 194 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
195 if (!sfp) return -EINVAL; 195 if (!sfp) return -EINVAL;
196 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 196 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
197 if (!cptr) return -EINVAL; 197 if (!cptr) return -EINVAL;
@@ -208,14 +208,14 @@ static ssize_t show_val_custom(int id,struct class_device *class_dev,char *buf)
208 return cnt+1; 208 return cnt+1;
209} 209}
210 210
211static ssize_t show_enum(int id,struct class_device *class_dev,char *buf) 211static ssize_t show_enum(int id,struct device *class_dev,char *buf)
212{ 212{
213 struct pvr2_ctrl *cptr; 213 struct pvr2_ctrl *cptr;
214 struct pvr2_sysfs *sfp; 214 struct pvr2_sysfs *sfp;
215 long val; 215 long val;
216 unsigned int bcnt,ccnt,ecnt; 216 unsigned int bcnt,ccnt,ecnt;
217 217
218 sfp = (struct pvr2_sysfs *)class_dev->class_data; 218 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
219 if (!sfp) return -EINVAL; 219 if (!sfp) return -EINVAL;
220 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 220 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
221 if (!cptr) return -EINVAL; 221 if (!cptr) return -EINVAL;
@@ -233,14 +233,14 @@ static ssize_t show_enum(int id,struct class_device *class_dev,char *buf)
233 return bcnt; 233 return bcnt;
234} 234}
235 235
236static ssize_t show_bits(int id,struct class_device *class_dev,char *buf) 236static ssize_t show_bits(int id,struct device *class_dev,char *buf)
237{ 237{
238 struct pvr2_ctrl *cptr; 238 struct pvr2_ctrl *cptr;
239 struct pvr2_sysfs *sfp; 239 struct pvr2_sysfs *sfp;
240 int valid_bits,msk; 240 int valid_bits,msk;
241 unsigned int bcnt,ccnt; 241 unsigned int bcnt,ccnt;
242 242
243 sfp = (struct pvr2_sysfs *)class_dev->class_data; 243 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
244 if (!sfp) return -EINVAL; 244 if (!sfp) return -EINVAL;
245 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id); 245 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,id);
246 if (!cptr) return -EINVAL; 246 if (!cptr) return -EINVAL;
@@ -278,23 +278,23 @@ static int store_val_any(int id,int customfl,struct pvr2_sysfs *sfp,
278 return ret; 278 return ret;
279} 279}
280 280
281static ssize_t store_val_norm(int id,struct class_device *class_dev, 281static ssize_t store_val_norm(int id,struct device *class_dev,
282 const char *buf,size_t count) 282 const char *buf,size_t count)
283{ 283{
284 struct pvr2_sysfs *sfp; 284 struct pvr2_sysfs *sfp;
285 int ret; 285 int ret;
286 sfp = (struct pvr2_sysfs *)class_dev->class_data; 286 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
287 ret = store_val_any(id,0,sfp,buf,count); 287 ret = store_val_any(id,0,sfp,buf,count);
288 if (!ret) ret = count; 288 if (!ret) ret = count;
289 return ret; 289 return ret;
290} 290}
291 291
292static ssize_t store_val_custom(int id,struct class_device *class_dev, 292static ssize_t store_val_custom(int id,struct device *class_dev,
293 const char *buf,size_t count) 293 const char *buf,size_t count)
294{ 294{
295 struct pvr2_sysfs *sfp; 295 struct pvr2_sysfs *sfp;
296 int ret; 296 int ret;
297 sfp = (struct pvr2_sysfs *)class_dev->class_data; 297 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
298 ret = store_val_any(id,1,sfp,buf,count); 298 ret = store_val_any(id,1,sfp,buf,count);
299 if (!ret) ret = count; 299 if (!ret) ret = count;
300 return ret; 300 return ret;
@@ -304,7 +304,7 @@ static ssize_t store_val_custom(int id,struct class_device *class_dev,
304 Mike Isely <isely@pobox.com> 30-April-2005 304 Mike Isely <isely@pobox.com> 30-April-2005
305 305
306 This next batch of horrible preprocessor hackery is needed because the 306 This next batch of horrible preprocessor hackery is needed because the
307 kernel's class_device_attribute mechanism fails to pass the actual 307 kernel's device_attribute mechanism fails to pass the actual
308 attribute through to the show / store functions, which means we have no 308 attribute through to the show / store functions, which means we have no
309 way to package up any attribute-specific parameters, like for example the 309 way to package up any attribute-specific parameters, like for example the
310 control id. So we work around this brain-damage by encoding the control 310 control id. So we work around this brain-damage by encoding the control
@@ -314,11 +314,13 @@ static ssize_t store_val_custom(int id,struct class_device *class_dev,
314*/ 314*/
315 315
316#define CREATE_SHOW_INSTANCE(sf_name,ctl_id) \ 316#define CREATE_SHOW_INSTANCE(sf_name,ctl_id) \
317static ssize_t sf_name##_##ctl_id(struct class_device *class_dev,char *buf) \ 317static ssize_t sf_name##_##ctl_id(struct device *class_dev, \
318struct device_attribute *attr, char *buf) \
318{ return sf_name(ctl_id,class_dev,buf); } 319{ return sf_name(ctl_id,class_dev,buf); }
319 320
320#define CREATE_STORE_INSTANCE(sf_name,ctl_id) \ 321#define CREATE_STORE_INSTANCE(sf_name,ctl_id) \
321static ssize_t sf_name##_##ctl_id(struct class_device *class_dev,const char *buf,size_t count) \ 322static ssize_t sf_name##_##ctl_id(struct device *class_dev, \
323struct device_attribute *attr, const char *buf, size_t count) \
322{ return sf_name(ctl_id,class_dev,buf,count); } 324{ return sf_name(ctl_id,class_dev,buf,count); }
323 325
324#define CREATE_BATCH(ctl_id) \ 326#define CREATE_BATCH(ctl_id) \
@@ -395,17 +397,27 @@ CREATE_BATCH(58)
395CREATE_BATCH(59) 397CREATE_BATCH(59)
396 398
397struct pvr2_sysfs_func_set { 399struct pvr2_sysfs_func_set {
398 ssize_t (*show_name)(struct class_device *,char *); 400 ssize_t (*show_name)(struct device *,
399 ssize_t (*show_type)(struct class_device *,char *); 401 struct device_attribute *attr, char *);
400 ssize_t (*show_min)(struct class_device *,char *); 402 ssize_t (*show_type)(struct device *,
401 ssize_t (*show_max)(struct class_device *,char *); 403 struct device_attribute *attr, char *);
402 ssize_t (*show_enum)(struct class_device *,char *); 404 ssize_t (*show_min)(struct device *,
403 ssize_t (*show_bits)(struct class_device *,char *); 405 struct device_attribute *attr, char *);
404 ssize_t (*show_val_norm)(struct class_device *,char *); 406 ssize_t (*show_max)(struct device *,
405 ssize_t (*store_val_norm)(struct class_device *, 407 struct device_attribute *attr, char *);
408 ssize_t (*show_enum)(struct device *,
409 struct device_attribute *attr, char *);
410 ssize_t (*show_bits)(struct device *,
411 struct device_attribute *attr, char *);
412 ssize_t (*show_val_norm)(struct device *,
413 struct device_attribute *attr, char *);
414 ssize_t (*store_val_norm)(struct device *,
415 struct device_attribute *attr,
406 const char *,size_t); 416 const char *,size_t);
407 ssize_t (*show_val_custom)(struct class_device *,char *); 417 ssize_t (*show_val_custom)(struct device *,
408 ssize_t (*store_val_custom)(struct class_device *, 418 struct device_attribute *attr, char *);
419 ssize_t (*store_val_custom)(struct device *,
420 struct device_attribute *attr,
409 const char *,size_t); 421 const char *,size_t);
410}; 422};
411 423
@@ -597,9 +609,12 @@ static void pvr2_sysfs_add_control(struct pvr2_sysfs *sfp,int ctl_id)
597} 609}
598 610
599#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC 611#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC
600static ssize_t debuginfo_show(struct class_device *,char *); 612static ssize_t debuginfo_show(struct device *, struct device_attribute *,
601static ssize_t debugcmd_show(struct class_device *,char *); 613 char *);
602static ssize_t debugcmd_store(struct class_device *,const char *,size_t count); 614static ssize_t debugcmd_show(struct device *, struct device_attribute *,
615 char *);
616static ssize_t debugcmd_store(struct device *, struct device_attribute *,
617 const char *, size_t count);
603 618
604static void pvr2_sysfs_add_debugifc(struct pvr2_sysfs *sfp) 619static void pvr2_sysfs_add_debugifc(struct pvr2_sysfs *sfp)
605{ 620{
@@ -616,16 +631,16 @@ static void pvr2_sysfs_add_debugifc(struct pvr2_sysfs *sfp)
616 dip->attr_debuginfo.attr.mode = S_IRUGO; 631 dip->attr_debuginfo.attr.mode = S_IRUGO;
617 dip->attr_debuginfo.show = debuginfo_show; 632 dip->attr_debuginfo.show = debuginfo_show;
618 sfp->debugifc = dip; 633 sfp->debugifc = dip;
619 ret = class_device_create_file(sfp->class_dev,&dip->attr_debugcmd); 634 ret = device_create_file(sfp->class_dev,&dip->attr_debugcmd);
620 if (ret < 0) { 635 if (ret < 0) {
621 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 636 printk(KERN_WARNING "%s: device_create_file error: %d\n",
622 __FUNCTION__, ret); 637 __FUNCTION__, ret);
623 } else { 638 } else {
624 dip->debugcmd_created_ok = !0; 639 dip->debugcmd_created_ok = !0;
625 } 640 }
626 ret = class_device_create_file(sfp->class_dev,&dip->attr_debuginfo); 641 ret = device_create_file(sfp->class_dev,&dip->attr_debuginfo);
627 if (ret < 0) { 642 if (ret < 0) {
628 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 643 printk(KERN_WARNING "%s: device_create_file error: %d\n",
629 __FUNCTION__, ret); 644 __FUNCTION__, ret);
630 } else { 645 } else {
631 dip->debuginfo_created_ok = !0; 646 dip->debuginfo_created_ok = !0;
@@ -637,11 +652,11 @@ static void pvr2_sysfs_tear_down_debugifc(struct pvr2_sysfs *sfp)
637{ 652{
638 if (!sfp->debugifc) return; 653 if (!sfp->debugifc) return;
639 if (sfp->debugifc->debuginfo_created_ok) { 654 if (sfp->debugifc->debuginfo_created_ok) {
640 class_device_remove_file(sfp->class_dev, 655 device_remove_file(sfp->class_dev,
641 &sfp->debugifc->attr_debuginfo); 656 &sfp->debugifc->attr_debuginfo);
642 } 657 }
643 if (sfp->debugifc->debugcmd_created_ok) { 658 if (sfp->debugifc->debugcmd_created_ok) {
644 class_device_remove_file(sfp->class_dev, 659 device_remove_file(sfp->class_dev,
645 &sfp->debugifc->attr_debugcmd); 660 &sfp->debugifc->attr_debugcmd);
646 } 661 }
647 kfree(sfp->debugifc); 662 kfree(sfp->debugifc);
@@ -683,7 +698,7 @@ static void pvr2_sysfs_class_release(struct class *class)
683} 698}
684 699
685 700
686static void pvr2_sysfs_release(struct class_device *class_dev) 701static void pvr2_sysfs_release(struct device *class_dev)
687{ 702{
688 pvr2_sysfs_trace("Releasing class_dev id=%p",class_dev); 703 pvr2_sysfs_trace("Releasing class_dev id=%p",class_dev);
689 kfree(class_dev); 704 kfree(class_dev);
@@ -698,32 +713,33 @@ static void class_dev_destroy(struct pvr2_sysfs *sfp)
698#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */ 713#endif /* CONFIG_VIDEO_PVRUSB2_DEBUGIFC */
699 pvr2_sysfs_tear_down_controls(sfp); 714 pvr2_sysfs_tear_down_controls(sfp);
700 if (sfp->bus_info_created_ok) { 715 if (sfp->bus_info_created_ok) {
701 class_device_remove_file(sfp->class_dev, 716 device_remove_file(sfp->class_dev,
702 &sfp->attr_bus_info); 717 &sfp->attr_bus_info);
703 } 718 }
704 if (sfp->v4l_minor_number_created_ok) { 719 if (sfp->v4l_minor_number_created_ok) {
705 class_device_remove_file(sfp->class_dev, 720 device_remove_file(sfp->class_dev,
706 &sfp->attr_v4l_minor_number); 721 &sfp->attr_v4l_minor_number);
707 } 722 }
708 if (sfp->v4l_radio_minor_number_created_ok) { 723 if (sfp->v4l_radio_minor_number_created_ok) {
709 class_device_remove_file(sfp->class_dev, 724 device_remove_file(sfp->class_dev,
710 &sfp->attr_v4l_radio_minor_number); 725 &sfp->attr_v4l_radio_minor_number);
711 } 726 }
712 if (sfp->unit_number_created_ok) { 727 if (sfp->unit_number_created_ok) {
713 class_device_remove_file(sfp->class_dev, 728 device_remove_file(sfp->class_dev,
714 &sfp->attr_unit_number); 729 &sfp->attr_unit_number);
715 } 730 }
716 pvr2_sysfs_trace("Destroying class_dev id=%p",sfp->class_dev); 731 pvr2_sysfs_trace("Destroying class_dev id=%p",sfp->class_dev);
717 sfp->class_dev->class_data = NULL; 732 sfp->class_dev->driver_data = NULL;
718 class_device_unregister(sfp->class_dev); 733 device_unregister(sfp->class_dev);
719 sfp->class_dev = NULL; 734 sfp->class_dev = NULL;
720} 735}
721 736
722 737
723static ssize_t v4l_minor_number_show(struct class_device *class_dev,char *buf) 738static ssize_t v4l_minor_number_show(struct device *class_dev,
739 struct device_attribute *attr, char *buf)
724{ 740{
725 struct pvr2_sysfs *sfp; 741 struct pvr2_sysfs *sfp;
726 sfp = (struct pvr2_sysfs *)class_dev->class_data; 742 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
727 if (!sfp) return -EINVAL; 743 if (!sfp) return -EINVAL;
728 return scnprintf(buf,PAGE_SIZE,"%d\n", 744 return scnprintf(buf,PAGE_SIZE,"%d\n",
729 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw, 745 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw,
@@ -731,21 +747,23 @@ static ssize_t v4l_minor_number_show(struct class_device *class_dev,char *buf)
731} 747}
732 748
733 749
734static ssize_t bus_info_show(struct class_device *class_dev,char *buf) 750static ssize_t bus_info_show(struct device *class_dev,
751 struct device_attribute *attr, char *buf)
735{ 752{
736 struct pvr2_sysfs *sfp; 753 struct pvr2_sysfs *sfp;
737 sfp = (struct pvr2_sysfs *)class_dev->class_data; 754 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
738 if (!sfp) return -EINVAL; 755 if (!sfp) return -EINVAL;
739 return scnprintf(buf,PAGE_SIZE,"%s\n", 756 return scnprintf(buf,PAGE_SIZE,"%s\n",
740 pvr2_hdw_get_bus_info(sfp->channel.hdw)); 757 pvr2_hdw_get_bus_info(sfp->channel.hdw));
741} 758}
742 759
743 760
744static ssize_t v4l_radio_minor_number_show(struct class_device *class_dev, 761static ssize_t v4l_radio_minor_number_show(struct device *class_dev,
762 struct device_attribute *attr,
745 char *buf) 763 char *buf)
746{ 764{
747 struct pvr2_sysfs *sfp; 765 struct pvr2_sysfs *sfp;
748 sfp = (struct pvr2_sysfs *)class_dev->class_data; 766 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
749 if (!sfp) return -EINVAL; 767 if (!sfp) return -EINVAL;
750 return scnprintf(buf,PAGE_SIZE,"%d\n", 768 return scnprintf(buf,PAGE_SIZE,"%d\n",
751 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw, 769 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw,
@@ -753,10 +771,11 @@ static ssize_t v4l_radio_minor_number_show(struct class_device *class_dev,
753} 771}
754 772
755 773
756static ssize_t unit_number_show(struct class_device *class_dev,char *buf) 774static ssize_t unit_number_show(struct device *class_dev,
775 struct device_attribute *attr, char *buf)
757{ 776{
758 struct pvr2_sysfs *sfp; 777 struct pvr2_sysfs *sfp;
759 sfp = (struct pvr2_sysfs *)class_dev->class_data; 778 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
760 if (!sfp) return -EINVAL; 779 if (!sfp) return -EINVAL;
761 return scnprintf(buf,PAGE_SIZE,"%d\n", 780 return scnprintf(buf,PAGE_SIZE,"%d\n",
762 pvr2_hdw_get_unit_number(sfp->channel.hdw)); 781 pvr2_hdw_get_unit_number(sfp->channel.hdw));
@@ -767,7 +786,7 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
767 struct pvr2_sysfs_class *class_ptr) 786 struct pvr2_sysfs_class *class_ptr)
768{ 787{
769 struct usb_device *usb_dev; 788 struct usb_device *usb_dev;
770 struct class_device *class_dev; 789 struct device *class_dev;
771 int ret; 790 int ret;
772 791
773 usb_dev = pvr2_hdw_get_dev(sfp->channel.hdw); 792 usb_dev = pvr2_hdw_get_dev(sfp->channel.hdw);
@@ -779,23 +798,23 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
779 798
780 class_dev->class = &class_ptr->class; 799 class_dev->class = &class_ptr->class;
781 if (pvr2_hdw_get_sn(sfp->channel.hdw)) { 800 if (pvr2_hdw_get_sn(sfp->channel.hdw)) {
782 snprintf(class_dev->class_id,BUS_ID_SIZE,"sn-%lu", 801 snprintf(class_dev->bus_id, BUS_ID_SIZE, "sn-%lu",
783 pvr2_hdw_get_sn(sfp->channel.hdw)); 802 pvr2_hdw_get_sn(sfp->channel.hdw));
784 } else if (pvr2_hdw_get_unit_number(sfp->channel.hdw) >= 0) { 803 } else if (pvr2_hdw_get_unit_number(sfp->channel.hdw) >= 0) {
785 snprintf(class_dev->class_id,BUS_ID_SIZE,"unit-%c", 804 snprintf(class_dev->bus_id, BUS_ID_SIZE, "unit-%c",
786 pvr2_hdw_get_unit_number(sfp->channel.hdw) + 'a'); 805 pvr2_hdw_get_unit_number(sfp->channel.hdw) + 'a');
787 } else { 806 } else {
788 kfree(class_dev); 807 kfree(class_dev);
789 return; 808 return;
790 } 809 }
791 810
792 class_dev->dev = &usb_dev->dev; 811 class_dev->parent = &usb_dev->dev;
793 812
794 sfp->class_dev = class_dev; 813 sfp->class_dev = class_dev;
795 class_dev->class_data = sfp; 814 class_dev->driver_data = sfp;
796 ret = class_device_register(class_dev); 815 ret = device_register(class_dev);
797 if (ret) { 816 if (ret) {
798 printk(KERN_ERR "%s: class_device_register failed\n", 817 printk(KERN_ERR "%s: device_register failed\n",
799 __FUNCTION__); 818 __FUNCTION__);
800 kfree(class_dev); 819 kfree(class_dev);
801 return; 820 return;
@@ -805,10 +824,10 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
805 sfp->attr_v4l_minor_number.attr.mode = S_IRUGO; 824 sfp->attr_v4l_minor_number.attr.mode = S_IRUGO;
806 sfp->attr_v4l_minor_number.show = v4l_minor_number_show; 825 sfp->attr_v4l_minor_number.show = v4l_minor_number_show;
807 sfp->attr_v4l_minor_number.store = NULL; 826 sfp->attr_v4l_minor_number.store = NULL;
808 ret = class_device_create_file(sfp->class_dev, 827 ret = device_create_file(sfp->class_dev,
809 &sfp->attr_v4l_minor_number); 828 &sfp->attr_v4l_minor_number);
810 if (ret < 0) { 829 if (ret < 0) {
811 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 830 printk(KERN_WARNING "%s: device_create_file error: %d\n",
812 __FUNCTION__, ret); 831 __FUNCTION__, ret);
813 } else { 832 } else {
814 sfp->v4l_minor_number_created_ok = !0; 833 sfp->v4l_minor_number_created_ok = !0;
@@ -818,10 +837,10 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
818 sfp->attr_v4l_radio_minor_number.attr.mode = S_IRUGO; 837 sfp->attr_v4l_radio_minor_number.attr.mode = S_IRUGO;
819 sfp->attr_v4l_radio_minor_number.show = v4l_radio_minor_number_show; 838 sfp->attr_v4l_radio_minor_number.show = v4l_radio_minor_number_show;
820 sfp->attr_v4l_radio_minor_number.store = NULL; 839 sfp->attr_v4l_radio_minor_number.store = NULL;
821 ret = class_device_create_file(sfp->class_dev, 840 ret = device_create_file(sfp->class_dev,
822 &sfp->attr_v4l_radio_minor_number); 841 &sfp->attr_v4l_radio_minor_number);
823 if (ret < 0) { 842 if (ret < 0) {
824 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 843 printk(KERN_WARNING "%s: device_create_file error: %d\n",
825 __FUNCTION__, ret); 844 __FUNCTION__, ret);
826 } else { 845 } else {
827 sfp->v4l_radio_minor_number_created_ok = !0; 846 sfp->v4l_radio_minor_number_created_ok = !0;
@@ -831,9 +850,9 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
831 sfp->attr_unit_number.attr.mode = S_IRUGO; 850 sfp->attr_unit_number.attr.mode = S_IRUGO;
832 sfp->attr_unit_number.show = unit_number_show; 851 sfp->attr_unit_number.show = unit_number_show;
833 sfp->attr_unit_number.store = NULL; 852 sfp->attr_unit_number.store = NULL;
834 ret = class_device_create_file(sfp->class_dev,&sfp->attr_unit_number); 853 ret = device_create_file(sfp->class_dev,&sfp->attr_unit_number);
835 if (ret < 0) { 854 if (ret < 0) {
836 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 855 printk(KERN_WARNING "%s: device_create_file error: %d\n",
837 __FUNCTION__, ret); 856 __FUNCTION__, ret);
838 } else { 857 } else {
839 sfp->unit_number_created_ok = !0; 858 sfp->unit_number_created_ok = !0;
@@ -843,10 +862,10 @@ static void class_dev_create(struct pvr2_sysfs *sfp,
843 sfp->attr_bus_info.attr.mode = S_IRUGO; 862 sfp->attr_bus_info.attr.mode = S_IRUGO;
844 sfp->attr_bus_info.show = bus_info_show; 863 sfp->attr_bus_info.show = bus_info_show;
845 sfp->attr_bus_info.store = NULL; 864 sfp->attr_bus_info.store = NULL;
846 ret = class_device_create_file(sfp->class_dev, 865 ret = device_create_file(sfp->class_dev,
847 &sfp->attr_bus_info); 866 &sfp->attr_bus_info);
848 if (ret < 0) { 867 if (ret < 0) {
849 printk(KERN_WARNING "%s: class_device_create_file error: %d\n", 868 printk(KERN_WARNING "%s: device_create_file error: %d\n",
850 __FUNCTION__, ret); 869 __FUNCTION__, ret);
851 } else { 870 } else {
852 sfp->bus_info_created_ok = !0; 871 sfp->bus_info_created_ok = !0;
@@ -886,7 +905,7 @@ struct pvr2_sysfs *pvr2_sysfs_create(struct pvr2_context *mp,
886} 905}
887 906
888 907
889static int pvr2_sysfs_hotplug(struct class_device *cd,char **envp, 908static int pvr2_sysfs_hotplug(struct device *cd,char **envp,
890 int numenvp,char *buf,int size) 909 int numenvp,char *buf,int size)
891{ 910{
892 /* Even though we don't do anything here, we still need this function 911 /* Even though we don't do anything here, we still need this function
@@ -902,8 +921,8 @@ struct pvr2_sysfs_class *pvr2_sysfs_class_create(void)
902 pvr2_sysfs_trace("Creating pvr2_sysfs_class id=%p",clp); 921 pvr2_sysfs_trace("Creating pvr2_sysfs_class id=%p",clp);
903 clp->class.name = "pvrusb2"; 922 clp->class.name = "pvrusb2";
904 clp->class.class_release = pvr2_sysfs_class_release; 923 clp->class.class_release = pvr2_sysfs_class_release;
905 clp->class.release = pvr2_sysfs_release; 924 clp->class.dev_release = pvr2_sysfs_release;
906 clp->class.uevent = pvr2_sysfs_hotplug; 925 clp->class.dev_uevent = pvr2_sysfs_hotplug;
907 if (class_register(&clp->class)) { 926 if (class_register(&clp->class)) {
908 pvr2_sysfs_trace( 927 pvr2_sysfs_trace(
909 "Registration failed for pvr2_sysfs_class id=%p",clp); 928 "Registration failed for pvr2_sysfs_class id=%p",clp);
@@ -921,32 +940,35 @@ void pvr2_sysfs_class_destroy(struct pvr2_sysfs_class *clp)
921 940
922 941
923#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC 942#ifdef CONFIG_VIDEO_PVRUSB2_DEBUGIFC
924static ssize_t debuginfo_show(struct class_device *class_dev,char *buf) 943static ssize_t debuginfo_show(struct device *class_dev,
944 struct device_attribute *attr, char *buf)
925{ 945{
926 struct pvr2_sysfs *sfp; 946 struct pvr2_sysfs *sfp;
927 sfp = (struct pvr2_sysfs *)class_dev->class_data; 947 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
928 if (!sfp) return -EINVAL; 948 if (!sfp) return -EINVAL;
929 pvr2_hdw_trigger_module_log(sfp->channel.hdw); 949 pvr2_hdw_trigger_module_log(sfp->channel.hdw);
930 return pvr2_debugifc_print_info(sfp->channel.hdw,buf,PAGE_SIZE); 950 return pvr2_debugifc_print_info(sfp->channel.hdw,buf,PAGE_SIZE);
931} 951}
932 952
933 953
934static ssize_t debugcmd_show(struct class_device *class_dev,char *buf) 954static ssize_t debugcmd_show(struct device *class_dev,
955 struct device_attribute *attr, char *buf)
935{ 956{
936 struct pvr2_sysfs *sfp; 957 struct pvr2_sysfs *sfp;
937 sfp = (struct pvr2_sysfs *)class_dev->class_data; 958 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
938 if (!sfp) return -EINVAL; 959 if (!sfp) return -EINVAL;
939 return pvr2_debugifc_print_status(sfp->channel.hdw,buf,PAGE_SIZE); 960 return pvr2_debugifc_print_status(sfp->channel.hdw,buf,PAGE_SIZE);
940} 961}
941 962
942 963
943static ssize_t debugcmd_store(struct class_device *class_dev, 964static ssize_t debugcmd_store(struct device *class_dev,
944 const char *buf,size_t count) 965 struct device_attribute *attr,
966 const char *buf, size_t count)
945{ 967{
946 struct pvr2_sysfs *sfp; 968 struct pvr2_sysfs *sfp;
947 int ret; 969 int ret;
948 970
949 sfp = (struct pvr2_sysfs *)class_dev->class_data; 971 sfp = (struct pvr2_sysfs *)class_dev->driver_data;
950 if (!sfp) return -EINVAL; 972 if (!sfp) return -EINVAL;
951 973
952 ret = pvr2_debugifc_docmd(sfp->channel.hdw,buf,count); 974 ret = pvr2_debugifc_docmd(sfp->channel.hdw,buf,count);
diff --git a/drivers/media/video/pwc/pwc-ctrl.c b/drivers/media/video/pwc/pwc-ctrl.c
index 338ced7188f2..ea53316d2111 100644
--- a/drivers/media/video/pwc/pwc-ctrl.c
+++ b/drivers/media/video/pwc/pwc-ctrl.c
@@ -1648,7 +1648,7 @@ int pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg)
1648 ARG_OUT(cmd) 1648 ARG_OUT(cmd)
1649 break; 1649 break;
1650 } 1650 }
1651 /* 1651 /*
1652 case VIDIOCPWCGVIDTABLE: 1652 case VIDIOCPWCGVIDTABLE:
1653 { 1653 {
1654 ARG_DEF(struct pwc_table_init_buffer, table); 1654 ARG_DEF(struct pwc_table_init_buffer, table);
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c
index 931b274bffca..0b67d4ec0318 100644
--- a/drivers/media/video/pwc/pwc-if.c
+++ b/drivers/media/video/pwc/pwc-if.c
@@ -64,7 +64,6 @@
64#include <linux/vmalloc.h> 64#include <linux/vmalloc.h>
65#include <linux/version.h> 65#include <linux/version.h>
66#include <asm/io.h> 66#include <asm/io.h>
67#include <linux/moduleparam.h>
68 67
69#include "pwc.h" 68#include "pwc.h"
70#include "pwc-kiara.h" 69#include "pwc-kiara.h"
@@ -127,9 +126,9 @@ static struct usb_driver pwc_driver = {
127static int default_size = PSZ_QCIF; 126static int default_size = PSZ_QCIF;
128static int default_fps = 10; 127static int default_fps = 10;
129static int default_fbufs = 3; /* Default number of frame buffers */ 128static int default_fbufs = 3; /* Default number of frame buffers */
130 int pwc_mbufs = 2; /* Default number of mmap() buffers */ 129 int pwc_mbufs = 2; /* Default number of mmap() buffers */
131#ifdef CONFIG_USB_PWC_DEBUG 130#ifdef CONFIG_USB_PWC_DEBUG
132 int pwc_trace = PWC_DEBUG_LEVEL; 131 int pwc_trace = PWC_DEBUG_LEVEL;
133#endif 132#endif
134static int power_save = 0; 133static int power_save = 0;
135static int led_on = 100, led_off = 0; /* defaults to LED that is on while in use */ 134static int led_on = 100, led_off = 0; /* defaults to LED that is on while in use */
@@ -908,31 +907,49 @@ int pwc_isoc_init(struct pwc_device *pdev)
908 return 0; 907 return 0;
909} 908}
910 909
911void pwc_isoc_cleanup(struct pwc_device *pdev) 910static void pwc_iso_stop(struct pwc_device *pdev)
912{ 911{
913 int i; 912 int i;
914 913
915 PWC_DEBUG_OPEN(">> pwc_isoc_cleanup()\n");
916 if (pdev == NULL)
917 return;
918 if (pdev->iso_init == 0)
919 return;
920
921 /* Unlinking ISOC buffers one by one */ 914 /* Unlinking ISOC buffers one by one */
922 for (i = 0; i < MAX_ISO_BUFS; i++) { 915 for (i = 0; i < MAX_ISO_BUFS; i++) {
923 struct urb *urb; 916 struct urb *urb;
924 917
925 urb = pdev->sbuf[i].urb; 918 urb = pdev->sbuf[i].urb;
926 if (urb != 0) { 919 if (urb != 0) {
927 if (pdev->iso_init) { 920 PWC_DEBUG_MEMORY("Unlinking URB %p\n", urb);
928 PWC_DEBUG_MEMORY("Unlinking URB %p\n", urb); 921 usb_kill_urb(urb);
929 usb_kill_urb(urb); 922 }
930 } 923 }
924}
925
926static void pwc_iso_free(struct pwc_device *pdev)
927{
928 int i;
929
930 /* Freeing ISOC buffers one by one */
931 for (i = 0; i < MAX_ISO_BUFS; i++) {
932 struct urb *urb;
933
934 urb = pdev->sbuf[i].urb;
935 if (urb != 0) {
931 PWC_DEBUG_MEMORY("Freeing URB\n"); 936 PWC_DEBUG_MEMORY("Freeing URB\n");
932 usb_free_urb(urb); 937 usb_free_urb(urb);
933 pdev->sbuf[i].urb = NULL; 938 pdev->sbuf[i].urb = NULL;
934 } 939 }
935 } 940 }
941}
942
943void pwc_isoc_cleanup(struct pwc_device *pdev)
944{
945 PWC_DEBUG_OPEN(">> pwc_isoc_cleanup()\n");
946 if (pdev == NULL)
947 return;
948 if (pdev->iso_init == 0)
949 return;
950
951 pwc_iso_stop(pdev);
952 pwc_iso_free(pdev);
936 953
937 /* Stop camera, but only if we are sure the camera is still there (unplug 954 /* Stop camera, but only if we are sure the camera is still there (unplug
938 is signalled by EPIPE) 955 is signalled by EPIPE)
@@ -979,20 +996,22 @@ int pwc_try_video_mode(struct pwc_device *pdev, int width, int height, int new_f
979/********* 996/*********
980 * sysfs 997 * sysfs
981 *********/ 998 *********/
982static struct pwc_device *cd_to_pwc(struct class_device *cd) 999static struct pwc_device *cd_to_pwc(struct device *cd)
983{ 1000{
984 struct video_device *vdev = to_video_device(cd); 1001 struct video_device *vdev = to_video_device(cd);
985 return video_get_drvdata(vdev); 1002 return video_get_drvdata(vdev);
986} 1003}
987 1004
988static ssize_t show_pan_tilt(struct class_device *class_dev, char *buf) 1005static ssize_t show_pan_tilt(struct device *class_dev,
1006 struct device_attribute *attr, char *buf)
989{ 1007{
990 struct pwc_device *pdev = cd_to_pwc(class_dev); 1008 struct pwc_device *pdev = cd_to_pwc(class_dev);
991 return sprintf(buf, "%d %d\n", pdev->pan_angle, pdev->tilt_angle); 1009 return sprintf(buf, "%d %d\n", pdev->pan_angle, pdev->tilt_angle);
992} 1010}
993 1011
994static ssize_t store_pan_tilt(struct class_device *class_dev, const char *buf, 1012static ssize_t store_pan_tilt(struct device *class_dev,
995 size_t count) 1013 struct device_attribute *attr,
1014 const char *buf, size_t count)
996{ 1015{
997 struct pwc_device *pdev = cd_to_pwc(class_dev); 1016 struct pwc_device *pdev = cd_to_pwc(class_dev);
998 int pan, tilt; 1017 int pan, tilt;
@@ -1008,10 +1027,11 @@ static ssize_t store_pan_tilt(struct class_device *class_dev, const char *buf,
1008 return ret; 1027 return ret;
1009 return strlen(buf); 1028 return strlen(buf);
1010} 1029}
1011static CLASS_DEVICE_ATTR(pan_tilt, S_IRUGO | S_IWUSR, show_pan_tilt, 1030static DEVICE_ATTR(pan_tilt, S_IRUGO | S_IWUSR, show_pan_tilt,
1012 store_pan_tilt); 1031 store_pan_tilt);
1013 1032
1014static ssize_t show_snapshot_button_status(struct class_device *class_dev, char *buf) 1033static ssize_t show_snapshot_button_status(struct device *class_dev,
1034 struct device_attribute *attr, char *buf)
1015{ 1035{
1016 struct pwc_device *pdev = cd_to_pwc(class_dev); 1036 struct pwc_device *pdev = cd_to_pwc(class_dev);
1017 int status = pdev->snapshot_button_status; 1037 int status = pdev->snapshot_button_status;
@@ -1019,26 +1039,26 @@ static ssize_t show_snapshot_button_status(struct class_device *class_dev, char
1019 return sprintf(buf, "%d\n", status); 1039 return sprintf(buf, "%d\n", status);
1020} 1040}
1021 1041
1022static CLASS_DEVICE_ATTR(button, S_IRUGO | S_IWUSR, show_snapshot_button_status, 1042static DEVICE_ATTR(button, S_IRUGO | S_IWUSR, show_snapshot_button_status,
1023 NULL); 1043 NULL);
1024 1044
1025static int pwc_create_sysfs_files(struct video_device *vdev) 1045static int pwc_create_sysfs_files(struct video_device *vdev)
1026{ 1046{
1027 struct pwc_device *pdev = video_get_drvdata(vdev); 1047 struct pwc_device *pdev = video_get_drvdata(vdev);
1028 int rc; 1048 int rc;
1029 1049
1030 rc = video_device_create_file(vdev, &class_device_attr_button); 1050 rc = video_device_create_file(vdev, &dev_attr_button);
1031 if (rc) 1051 if (rc)
1032 goto err; 1052 goto err;
1033 if (pdev->features & FEATURE_MOTOR_PANTILT) { 1053 if (pdev->features & FEATURE_MOTOR_PANTILT) {
1034 rc = video_device_create_file(vdev,&class_device_attr_pan_tilt); 1054 rc = video_device_create_file(vdev, &dev_attr_pan_tilt);
1035 if (rc) goto err_button; 1055 if (rc) goto err_button;
1036 } 1056 }
1037 1057
1038 return 0; 1058 return 0;
1039 1059
1040err_button: 1060err_button:
1041 video_device_remove_file(vdev, &class_device_attr_button); 1061 video_device_remove_file(vdev, &dev_attr_button);
1042err: 1062err:
1043 return rc; 1063 return rc;
1044} 1064}
@@ -1047,8 +1067,8 @@ static void pwc_remove_sysfs_files(struct video_device *vdev)
1047{ 1067{
1048 struct pwc_device *pdev = video_get_drvdata(vdev); 1068 struct pwc_device *pdev = video_get_drvdata(vdev);
1049 if (pdev->features & FEATURE_MOTOR_PANTILT) 1069 if (pdev->features & FEATURE_MOTOR_PANTILT)
1050 video_device_remove_file(vdev, &class_device_attr_pan_tilt); 1070 video_device_remove_file(vdev, &dev_attr_pan_tilt);
1051 video_device_remove_file(vdev, &class_device_attr_button); 1071 video_device_remove_file(vdev, &dev_attr_button);
1052} 1072}
1053 1073
1054#ifdef CONFIG_USB_PWC_DEBUG 1074#ifdef CONFIG_USB_PWC_DEBUG
@@ -1212,6 +1232,7 @@ static int pwc_video_close(struct inode *inode, struct file *file)
1212 1232
1213 PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev); 1233 PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev);
1214 1234
1235 lock_kernel();
1215 pdev = (struct pwc_device *)vdev->priv; 1236 pdev = (struct pwc_device *)vdev->priv;
1216 if (pdev->vopen == 0) 1237 if (pdev->vopen == 0)
1217 PWC_DEBUG_MODULE("video_close() called on closed device?\n"); 1238 PWC_DEBUG_MODULE("video_close() called on closed device?\n");
@@ -1231,7 +1252,6 @@ static int pwc_video_close(struct inode *inode, struct file *file)
1231 pwc_isoc_cleanup(pdev); 1252 pwc_isoc_cleanup(pdev);
1232 pwc_free_buffers(pdev); 1253 pwc_free_buffers(pdev);
1233 1254
1234 lock_kernel();
1235 /* Turn off LEDS and power down camera, but only when not unplugged */ 1255 /* Turn off LEDS and power down camera, but only when not unplugged */
1236 if (!pdev->unplugged) { 1256 if (!pdev->unplugged) {
1237 /* Turn LEDs off */ 1257 /* Turn LEDs off */
@@ -1277,7 +1297,7 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
1277 struct pwc_device *pdev; 1297 struct pwc_device *pdev;
1278 int noblock = file->f_flags & O_NONBLOCK; 1298 int noblock = file->f_flags & O_NONBLOCK;
1279 DECLARE_WAITQUEUE(wait, current); 1299 DECLARE_WAITQUEUE(wait, current);
1280 int bytes_to_read; 1300 int bytes_to_read, rv = 0;
1281 void *image_buffer_addr; 1301 void *image_buffer_addr;
1282 1302
1283 PWC_DEBUG_READ("pwc_video_read(vdev=0x%p, buf=%p, count=%zd) called.\n", 1303 PWC_DEBUG_READ("pwc_video_read(vdev=0x%p, buf=%p, count=%zd) called.\n",
@@ -1287,8 +1307,12 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
1287 pdev = vdev->priv; 1307 pdev = vdev->priv;
1288 if (pdev == NULL) 1308 if (pdev == NULL)
1289 return -EFAULT; 1309 return -EFAULT;
1290 if (pdev->error_status) 1310
1291 return -pdev->error_status; /* Something happened, report what. */ 1311 mutex_lock(&pdev->modlock);
1312 if (pdev->error_status) {
1313 rv = -pdev->error_status; /* Something happened, report what. */
1314 goto err_out;
1315 }
1292 1316
1293 /* In case we're doing partial reads, we don't have to wait for a frame */ 1317 /* In case we're doing partial reads, we don't have to wait for a frame */
1294 if (pdev->image_read_pos == 0) { 1318 if (pdev->image_read_pos == 0) {
@@ -1299,17 +1323,20 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
1299 if (pdev->error_status) { 1323 if (pdev->error_status) {
1300 remove_wait_queue(&pdev->frameq, &wait); 1324 remove_wait_queue(&pdev->frameq, &wait);
1301 set_current_state(TASK_RUNNING); 1325 set_current_state(TASK_RUNNING);
1302 return -pdev->error_status ; 1326 rv = -pdev->error_status ;
1327 goto err_out;
1303 } 1328 }
1304 if (noblock) { 1329 if (noblock) {
1305 remove_wait_queue(&pdev->frameq, &wait); 1330 remove_wait_queue(&pdev->frameq, &wait);
1306 set_current_state(TASK_RUNNING); 1331 set_current_state(TASK_RUNNING);
1307 return -EWOULDBLOCK; 1332 rv = -EWOULDBLOCK;
1333 goto err_out;
1308 } 1334 }
1309 if (signal_pending(current)) { 1335 if (signal_pending(current)) {
1310 remove_wait_queue(&pdev->frameq, &wait); 1336 remove_wait_queue(&pdev->frameq, &wait);
1311 set_current_state(TASK_RUNNING); 1337 set_current_state(TASK_RUNNING);
1312 return -ERESTARTSYS; 1338 rv = -ERESTARTSYS;
1339 goto err_out;
1313 } 1340 }
1314 schedule(); 1341 schedule();
1315 set_current_state(TASK_INTERRUPTIBLE); 1342 set_current_state(TASK_INTERRUPTIBLE);
@@ -1318,8 +1345,10 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
1318 set_current_state(TASK_RUNNING); 1345 set_current_state(TASK_RUNNING);
1319 1346
1320 /* Decompress and release frame */ 1347 /* Decompress and release frame */
1321 if (pwc_handle_frame(pdev)) 1348 if (pwc_handle_frame(pdev)) {
1322 return -EFAULT; 1349 rv = -EFAULT;
1350 goto err_out;
1351 }
1323 } 1352 }
1324 1353
1325 PWC_DEBUG_READ("Copying data to user space.\n"); 1354 PWC_DEBUG_READ("Copying data to user space.\n");
@@ -1334,14 +1363,20 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,
1334 image_buffer_addr = pdev->image_data; 1363 image_buffer_addr = pdev->image_data;
1335 image_buffer_addr += pdev->images[pdev->fill_image].offset; 1364 image_buffer_addr += pdev->images[pdev->fill_image].offset;
1336 image_buffer_addr += pdev->image_read_pos; 1365 image_buffer_addr += pdev->image_read_pos;
1337 if (copy_to_user(buf, image_buffer_addr, count)) 1366 if (copy_to_user(buf, image_buffer_addr, count)) {
1338 return -EFAULT; 1367 rv = -EFAULT;
1368 goto err_out;
1369 }
1339 pdev->image_read_pos += count; 1370 pdev->image_read_pos += count;
1340 if (pdev->image_read_pos >= bytes_to_read) { /* All data has been read */ 1371 if (pdev->image_read_pos >= bytes_to_read) { /* All data has been read */
1341 pdev->image_read_pos = 0; 1372 pdev->image_read_pos = 0;
1342 pwc_next_image(pdev); 1373 pwc_next_image(pdev);
1343 } 1374 }
1375 mutex_unlock(&pdev->modlock);
1344 return count; 1376 return count;
1377err_out:
1378 mutex_unlock(&pdev->modlock);
1379 return rv;
1345} 1380}
1346 1381
1347static unsigned int pwc_video_poll(struct file *file, poll_table *wait) 1382static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
@@ -1367,7 +1402,20 @@ static unsigned int pwc_video_poll(struct file *file, poll_table *wait)
1367static int pwc_video_ioctl(struct inode *inode, struct file *file, 1402static int pwc_video_ioctl(struct inode *inode, struct file *file,
1368 unsigned int cmd, unsigned long arg) 1403 unsigned int cmd, unsigned long arg)
1369{ 1404{
1370 return video_usercopy(inode, file, cmd, arg, pwc_video_do_ioctl); 1405 struct video_device *vdev = file->private_data;
1406 struct pwc_device *pdev;
1407 int r = -ENODEV;
1408
1409 if (!vdev)
1410 goto out;
1411 pdev = vdev->priv;
1412
1413 mutex_lock(&pdev->modlock);
1414 if (!pdev->unplugged)
1415 r = video_usercopy(inode, file, cmd, arg, pwc_video_do_ioctl);
1416 mutex_unlock(&pdev->modlock);
1417out:
1418 return r;
1371} 1419}
1372 1420
1373static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma) 1421static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma)
@@ -1810,7 +1858,10 @@ static void usb_pwc_disconnect(struct usb_interface *intf)
1810 wake_up_interruptible(&pdev->frameq); 1858 wake_up_interruptible(&pdev->frameq);
1811 /* Wait until device is closed */ 1859 /* Wait until device is closed */
1812 if(pdev->vopen) { 1860 if(pdev->vopen) {
1861 mutex_lock(&pdev->modlock);
1813 pdev->unplugged = 1; 1862 pdev->unplugged = 1;
1863 mutex_unlock(&pdev->modlock);
1864 pwc_iso_stop(pdev);
1814 } else { 1865 } else {
1815 /* Device is closed, so we can safely unregister it */ 1866 /* Device is closed, so we can safely unregister it */
1816 PWC_DEBUG_PROBE("Unregistering video device in disconnect().\n"); 1867 PWC_DEBUG_PROBE("Unregistering video device in disconnect().\n");
@@ -1828,7 +1879,6 @@ disconnect_out:
1828 unlock_kernel(); 1879 unlock_kernel();
1829} 1880}
1830 1881
1831
1832/* *grunt* We have to do atoi ourselves :-( */ 1882/* *grunt* We have to do atoi ourselves :-( */
1833static int pwc_atoi(const char *s) 1883static int pwc_atoi(const char *s)
1834{ 1884{
diff --git a/drivers/media/video/saa6588.c b/drivers/media/video/saa6588.c
index 92eabf88a09b..72e344a12c79 100644
--- a/drivers/media/video/saa6588.c
+++ b/drivers/media/video/saa6588.c
@@ -406,6 +406,7 @@ static int saa6588_attach(struct i2c_adapter *adap, int addr, int kind)
406 kfree(s); 406 kfree(s);
407 return -ENOMEM; 407 return -ENOMEM;
408 } 408 }
409 spin_lock_init(&s->lock);
409 s->client = client_template; 410 s->client = client_template;
410 s->block_count = 0; 411 s->block_count = 0;
411 s->wr_index = 0; 412 s->wr_index = 0;
diff --git a/drivers/media/video/saa7127.c b/drivers/media/video/saa7127.c
index 9f986930490f..e35ef321ec71 100644
--- a/drivers/media/video/saa7127.c
+++ b/drivers/media/video/saa7127.c
@@ -332,11 +332,11 @@ static int saa7127_set_vps(struct i2c_client *client, struct v4l2_sliced_vbi_dat
332 if (!enable) 332 if (!enable)
333 return 0; 333 return 0;
334 334
335 state->vps_data[0] = data->data[4]; 335 state->vps_data[0] = data->data[2];
336 state->vps_data[1] = data->data[10]; 336 state->vps_data[1] = data->data[8];
337 state->vps_data[2] = data->data[11]; 337 state->vps_data[2] = data->data[9];
338 state->vps_data[3] = data->data[12]; 338 state->vps_data[3] = data->data[10];
339 state->vps_data[4] = data->data[13]; 339 state->vps_data[4] = data->data[11];
340 v4l_dbg(1, debug, client, "Set VPS data %02x %02x %02x %02x %02x\n", 340 v4l_dbg(1, debug, client, "Set VPS data %02x %02x %02x %02x %02x\n",
341 state->vps_data[0], state->vps_data[1], 341 state->vps_data[0], state->vps_data[1],
342 state->vps_data[2], state->vps_data[3], 342 state->vps_data[2], state->vps_data[3],
diff --git a/drivers/media/video/saa7134/Kconfig b/drivers/media/video/saa7134/Kconfig
index 9f1417a4f7d2..d6d8d660196d 100644
--- a/drivers/media/video/saa7134/Kconfig
+++ b/drivers/media/video/saa7134/Kconfig
@@ -1,7 +1,7 @@
1config VIDEO_SAA7134 1config VIDEO_SAA7134
2 tristate "Philips SAA7134 support" 2 tristate "Philips SAA7134 support"
3 depends on VIDEO_DEV && PCI && I2C 3 depends on VIDEO_DEV && PCI && I2C
4 select VIDEO_BUF 4 select VIDEOBUF_DMA_SG
5 select VIDEO_IR 5 select VIDEO_IR
6 select VIDEO_TUNER 6 select VIDEO_TUNER
7 select CRC32 7 select CRC32
@@ -38,7 +38,7 @@ config VIDEO_SAA7134_OSS
38config VIDEO_SAA7134_DVB 38config VIDEO_SAA7134_DVB
39 tristate "DVB/ATSC Support for saa7134 based TV cards" 39 tristate "DVB/ATSC Support for saa7134 based TV cards"
40 depends on VIDEO_SAA7134 && DVB_CORE 40 depends on VIDEO_SAA7134 && DVB_CORE
41 select VIDEO_BUF_DVB 41 select VIDEOBUF_DVB
42 select FW_LOADER 42 select FW_LOADER
43 select DVB_PLL if !DVB_FE_CUSTOMISE 43 select DVB_PLL if !DVB_FE_CUSTOMISE
44 select DVB_MT352 if !DVB_FE_CUSTOMISE 44 select DVB_MT352 if !DVB_FE_CUSTOMISE
diff --git a/drivers/media/video/saa7134/saa7134-alsa.c b/drivers/media/video/saa7134/saa7134-alsa.c
index 3c0fc9027ad0..c6f7279669c1 100644
--- a/drivers/media/video/saa7134/saa7134-alsa.c
+++ b/drivers/media/video/saa7134/saa7134-alsa.c
@@ -20,7 +20,6 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/time.h> 21#include <linux/time.h>
22#include <linux/wait.h> 22#include <linux/wait.h>
23#include <linux/moduleparam.h>
24#include <linux/module.h> 23#include <linux/module.h>
25#include <sound/driver.h> 24#include <sound/driver.h>
26#include <sound/core.h> 25#include <sound/core.h>
@@ -313,7 +312,7 @@ static int dsp_buffer_free(struct saa7134_dev *dev)
313 dev->dmasound.blksize = 0; 312 dev->dmasound.blksize = 0;
314 dev->dmasound.bufsize = 0; 313 dev->dmasound.bufsize = 0;
315 314
316 return 0; 315 return 0;
317} 316}
318 317
319 318
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 25ec16810818..a4c192fb4e41 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -32,6 +32,7 @@ static char name_mute[] = "mute";
32static char name_radio[] = "Radio"; 32static char name_radio[] = "Radio";
33static char name_tv[] = "Television"; 33static char name_tv[] = "Television";
34static char name_tv_mono[] = "TV (mono only)"; 34static char name_tv_mono[] = "TV (mono only)";
35static char name_comp[] = "Composite";
35static char name_comp1[] = "Composite1"; 36static char name_comp1[] = "Composite1";
36static char name_comp2[] = "Composite2"; 37static char name_comp2[] = "Composite2";
37static char name_comp3[] = "Composite3"; 38static char name_comp3[] = "Composite3";
@@ -1535,12 +1536,7 @@ struct saa7134_board saa7134_boards[] = {
1535 .tv = 1, 1536 .tv = 1,
1536 .gpio = 0x00, 1537 .gpio = 0x00,
1537 },{ 1538 },{
1538 .name = name_comp1, 1539 .name = name_comp,
1539 .vmux = 0,
1540 .amux = LINE1,
1541 .gpio = 0x02,
1542 },{
1543 .name = name_comp2,
1544 .vmux = 3, 1540 .vmux = 3,
1545 .amux = LINE1, 1541 .amux = LINE1,
1546 .gpio = 0x02, 1542 .gpio = 0x02,
@@ -2771,6 +2767,7 @@ struct saa7134_board saa7134_boards[] = {
2771 .tuner_addr = ADDR_UNSET, 2767 .tuner_addr = ADDR_UNSET,
2772 .radio_addr = ADDR_UNSET, 2768 .radio_addr = ADDR_UNSET,
2773 .mpeg = SAA7134_MPEG_DVB, 2769 .mpeg = SAA7134_MPEG_DVB,
2770 .gpiomask = 1 << 21,
2774 .inputs = {{ 2771 .inputs = {{
2775 .name = name_tv, 2772 .name = name_tv,
2776 .vmux = 1, 2773 .vmux = 1,
@@ -2781,13 +2778,18 @@ struct saa7134_board saa7134_boards[] = {
2781 .vmux = 3, 2778 .vmux = 3,
2782 .amux = LINE1, 2779 .amux = LINE1,
2783 },{ 2780 },{
2784 .name = name_svideo, 2781 .name = name_comp2,
2785 .vmux = 0, 2782 .vmux = 0,
2786 .amux = LINE1, 2783 .amux = LINE1,
2784 },{
2785 .name = name_svideo,
2786 .vmux = 8,
2787 .amux = LINE1,
2787 }}, 2788 }},
2788 .radio = { 2789 .radio = {
2789 .name = name_radio, 2790 .name = name_radio,
2790 .amux = LINE1, 2791 .amux = TV,
2792 .gpio = 0x0200000,
2791 }, 2793 },
2792 }, 2794 },
2793 [SAA7134_BOARD_KWORLD_DVBT_210] = { 2795 [SAA7134_BOARD_KWORLD_DVBT_210] = {
@@ -2820,7 +2822,7 @@ struct saa7134_board saa7134_boards[] = {
2820 }, 2822 },
2821 }, 2823 },
2822 [SAA7134_BOARD_KWORLD_ATSC110] = { 2824 [SAA7134_BOARD_KWORLD_ATSC110] = {
2823 .name = "Kworld ATSC110", 2825 .name = "Kworld ATSC110/115",
2824 .audio_clock = 0x00187de7, 2826 .audio_clock = 0x00187de7,
2825 .tuner_type = TUNER_PHILIPS_TUV1236D, 2827 .tuner_type = TUNER_PHILIPS_TUV1236D,
2826 .radio_type = UNSET, 2828 .radio_type = UNSET,
@@ -2896,7 +2898,7 @@ struct saa7134_board saa7134_boards[] = {
2896 .radio_addr = ADDR_UNSET, 2898 .radio_addr = ADDR_UNSET,
2897 }, 2899 },
2898 [SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS] = { 2900 [SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS] = {
2899 .name = "LifeView FlyDVB-T Hybrid Cardbus", 2901 .name = "LifeView FlyDVB-T Hybrid Cardbus/MSI TV @nywhere A/D NB",
2900 .audio_clock = 0x00200000, 2902 .audio_clock = 0x00200000,
2901 .tuner_type = TUNER_PHILIPS_TDA8290, 2903 .tuner_type = TUNER_PHILIPS_TDA8290,
2902 .radio_type = UNSET, 2904 .radio_type = UNSET,
@@ -3534,6 +3536,22 @@ struct saa7134_board saa7134_boards[] = {
3534 .gpio = 0x3000, 3536 .gpio = 0x3000,
3535 }, 3537 },
3536 }, 3538 },
3539 [SAA7134_BOARD_AVERMEDIA_SUPER_007] = {
3540 .name = "Avermedia Super 007",
3541 .audio_clock = 0x00187de7,
3542 .tuner_type = TUNER_PHILIPS_TDA8290,
3543 .radio_type = UNSET,
3544 .tuner_addr = ADDR_UNSET,
3545 .radio_addr = ADDR_UNSET,
3546 .tuner_config = 0,
3547 .mpeg = SAA7134_MPEG_DVB,
3548 .inputs = {{
3549 .name = name_tv, /* FIXME: analog tv untested */
3550 .vmux = 1,
3551 .amux = TV,
3552 .tv = 1,
3553 }},
3554 },
3537}; 3555};
3538 3556
3539const unsigned int saa7134_bcount = ARRAY_SIZE(saa7134_boards); 3557const unsigned int saa7134_bcount = ARRAY_SIZE(saa7134_boards);
@@ -4066,6 +4084,12 @@ struct pci_device_id saa7134_pci_tbl[] = {
4066 .driver_data = SAA7134_BOARD_KWORLD_ATSC110, 4084 .driver_data = SAA7134_BOARD_KWORLD_ATSC110,
4067 },{ 4085 },{
4068 .vendor = PCI_VENDOR_ID_PHILIPS, 4086 .vendor = PCI_VENDOR_ID_PHILIPS,
4087 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, /* SAA7135HL */
4088 .subvendor = 0x17de,
4089 .subdevice = 0x7352,
4090 .driver_data = SAA7134_BOARD_KWORLD_ATSC110, /* ATSC 115 */
4091 },{
4092 .vendor = PCI_VENDOR_ID_PHILIPS,
4069 .device = PCI_DEVICE_ID_PHILIPS_SAA7134, 4093 .device = PCI_DEVICE_ID_PHILIPS_SAA7134,
4070 .subvendor = 0x1461, 4094 .subvendor = 0x1461,
4071 .subdevice = 0x7360, 4095 .subdevice = 0x7360,
@@ -4257,6 +4281,18 @@ struct pci_device_id saa7134_pci_tbl[] = {
4257 .subdevice = 0x2304, 4281 .subdevice = 0x2304,
4258 .driver_data = SAA7134_BOARD_10MOONSTVMASTER3, 4282 .driver_data = SAA7134_BOARD_10MOONSTVMASTER3,
4259 },{ 4283 },{
4284 .vendor = PCI_VENDOR_ID_PHILIPS,
4285 .device = PCI_DEVICE_ID_PHILIPS_SAA7133,
4286 .subvendor = 0x1461, /* Avermedia Technologies Inc */
4287 .subdevice = 0xf01d, /* AVerTV DVB-T Super 007 */
4288 .driver_data = SAA7134_BOARD_AVERMEDIA_SUPER_007,
4289 },{
4290 .vendor = PCI_VENDOR_ID_PHILIPS,
4291 .device = PCI_DEVICE_ID_PHILIPS_SAA7133,
4292 .subvendor = 0x4e42,
4293 .subdevice = 0x3502,
4294 .driver_data = SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS
4295 },{
4260 /* --- boards without eeprom + subsystem ID --- */ 4296 /* --- boards without eeprom + subsystem ID --- */
4261 .vendor = PCI_VENDOR_ID_PHILIPS, 4297 .vendor = PCI_VENDOR_ID_PHILIPS,
4262 .device = PCI_DEVICE_ID_PHILIPS_SAA7134, 4298 .device = PCI_DEVICE_ID_PHILIPS_SAA7134,
@@ -4564,6 +4600,7 @@ int saa7134_board_init2(struct saa7134_dev *dev)
4564 break; 4600 break;
4565 case SAA7134_BOARD_PHILIPS_TIGER: 4601 case SAA7134_BOARD_PHILIPS_TIGER:
4566 case SAA7134_BOARD_PHILIPS_TIGER_S: 4602 case SAA7134_BOARD_PHILIPS_TIGER_S:
4603 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
4567 { 4604 {
4568 u8 data[] = { 0x3c, 0x33, 0x60}; 4605 u8 data[] = { 0x3c, 0x33, 0x60};
4569 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)}; 4606 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c
index 25f84701a8e8..1a4a24471f20 100644
--- a/drivers/media/video/saa7134/saa7134-core.c
+++ b/drivers/media/video/saa7134/saa7134-core.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/kmod.h> 28#include <linux/kmod.h>
@@ -32,6 +31,7 @@
32#include <linux/delay.h> 31#include <linux/delay.h>
33#include <linux/mutex.h> 32#include <linux/mutex.h>
34#include <linux/dma-mapping.h> 33#include <linux/dma-mapping.h>
34#include <linux/pm.h>
35 35
36#include "saa7134-reg.h" 36#include "saa7134-reg.h"
37#include "saa7134.h" 37#include "saa7134.h"
@@ -237,9 +237,10 @@ int saa7134_buffer_startpage(struct saa7134_buf *buf)
237unsigned long saa7134_buffer_base(struct saa7134_buf *buf) 237unsigned long saa7134_buffer_base(struct saa7134_buf *buf)
238{ 238{
239 unsigned long base; 239 unsigned long base;
240 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
240 241
241 base = saa7134_buffer_startpage(buf) * 4096; 242 base = saa7134_buffer_startpage(buf) * 4096;
242 base += buf->vb.dma.sglist[0].offset; 243 base += dma->sglist[0].offset;
243 return base; 244 return base;
244} 245}
245 246
@@ -287,11 +288,12 @@ void saa7134_pgtable_free(struct pci_dev *pci, struct saa7134_pgtable *pt)
287 288
288void saa7134_dma_free(struct videobuf_queue *q,struct saa7134_buf *buf) 289void saa7134_dma_free(struct videobuf_queue *q,struct saa7134_buf *buf)
289{ 290{
291 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
290 BUG_ON(in_interrupt()); 292 BUG_ON(in_interrupt());
291 293
292 videobuf_waiton(&buf->vb,0,0); 294 videobuf_waiton(&buf->vb,0,0);
293 videobuf_dma_unmap(q, &buf->vb.dma); 295 videobuf_dma_unmap(q, dma);
294 videobuf_dma_free(&buf->vb.dma); 296 videobuf_dma_free(dma);
295 buf->vb.state = STATE_NEEDS_INIT; 297 buf->vb.state = STATE_NEEDS_INIT;
296} 298}
297 299
@@ -391,6 +393,32 @@ void saa7134_buffer_timeout(unsigned long data)
391 spin_unlock_irqrestore(&dev->slock,flags); 393 spin_unlock_irqrestore(&dev->slock,flags);
392} 394}
393 395
396/* resends a current buffer in queue after resume */
397
398int saa7134_buffer_requeue(struct saa7134_dev *dev,
399 struct saa7134_dmaqueue *q)
400{
401 struct saa7134_buf *buf, *next;
402
403 assert_spin_locked(&dev->slock);
404
405 buf = q->curr;
406 next = buf;
407 dprintk("buffer_requeue\n");
408
409 if (!buf)
410 return 0;
411
412 dprintk("buffer_requeue : resending active buffers \n");
413
414 if (!list_empty(&q->queue))
415 next = list_entry(q->queue.next, struct saa7134_buf,
416 vb.queue);
417 buf->activate(dev, buf, next);
418
419 return 0;
420}
421
394/* ------------------------------------------------------------------ */ 422/* ------------------------------------------------------------------ */
395 423
396int saa7134_set_dmabits(struct saa7134_dev *dev) 424int saa7134_set_dmabits(struct saa7134_dev *dev)
@@ -401,6 +429,9 @@ int saa7134_set_dmabits(struct saa7134_dev *dev)
401 429
402 assert_spin_locked(&dev->slock); 430 assert_spin_locked(&dev->slock);
403 431
432 if (dev->inresume)
433 return 0;
434
404 /* video capture -- dma 0 + video task A */ 435 /* video capture -- dma 0 + video task A */
405 if (dev->video_q.curr) { 436 if (dev->video_q.curr) {
406 task |= 0x01; 437 task |= 0x01;
@@ -560,8 +591,10 @@ static irqreturn_t saa7134_irq(int irq, void *dev_id)
560 print_irqstatus(dev,loop,report,status); 591 print_irqstatus(dev,loop,report,status);
561 592
562 593
563 if (report & SAA7134_IRQ_REPORT_RDCAP /* _INTL */) 594 if ((report & SAA7134_IRQ_REPORT_RDCAP) ||
564 saa7134_irq_video_intl(dev); 595 (report & SAA7134_IRQ_REPORT_INTL))
596 saa7134_irq_video_signalchange(dev);
597
565 598
566 if ((report & SAA7134_IRQ_REPORT_DONE_RA0) && 599 if ((report & SAA7134_IRQ_REPORT_DONE_RA0) &&
567 (status & 0x60) == 0) 600 (status & 0x60) == 0)
@@ -646,6 +679,39 @@ static irqreturn_t saa7134_irq(int irq, void *dev_id)
646/* ------------------------------------------------------------------ */ 679/* ------------------------------------------------------------------ */
647 680
648/* early init (no i2c, no irq) */ 681/* early init (no i2c, no irq) */
682
683static int saa7134_hw_enable1(struct saa7134_dev *dev)
684{
685 /* RAM FIFO config */
686 saa_writel(SAA7134_FIFO_SIZE, 0x08070503);
687 saa_writel(SAA7134_THRESHOULD, 0x02020202);
688
689 /* enable audio + video processing */
690 saa_writel(SAA7134_MAIN_CTRL,
691 SAA7134_MAIN_CTRL_VPLLE |
692 SAA7134_MAIN_CTRL_APLLE |
693 SAA7134_MAIN_CTRL_EXOSC |
694 SAA7134_MAIN_CTRL_EVFE1 |
695 SAA7134_MAIN_CTRL_EVFE2 |
696 SAA7134_MAIN_CTRL_ESFE |
697 SAA7134_MAIN_CTRL_EBDAC);
698
699 /*
700 * Initialize OSS _after_ enabling audio clock PLL and audio processing.
701 * OSS initialization writes to registers via the audio DSP; these
702 * writes will fail unless the audio clock has been started. At worst,
703 * audio will not work.
704 */
705
706 /* enable peripheral devices */
707 saa_writeb(SAA7134_SPECIAL_MODE, 0x01);
708
709 /* set vertical line numbering start (vbi needs this) */
710 saa_writeb(SAA7134_SOURCE_TIMING2, 0x20);
711
712 return 0;
713}
714
649static int saa7134_hwinit1(struct saa7134_dev *dev) 715static int saa7134_hwinit1(struct saa7134_dev *dev)
650{ 716{
651 dprintk("hwinit1\n"); 717 dprintk("hwinit1\n");
@@ -662,44 +728,16 @@ static int saa7134_hwinit1(struct saa7134_dev *dev)
662 saa7134_ts_init1(dev); 728 saa7134_ts_init1(dev);
663 saa7134_input_init1(dev); 729 saa7134_input_init1(dev);
664 730
665 /* RAM FIFO config */ 731 saa7134_hw_enable1(dev);
666 saa_writel(SAA7134_FIFO_SIZE, 0x08070503);
667 saa_writel(SAA7134_THRESHOULD,0x02020202);
668
669 /* enable audio + video processing */
670 saa_writel(SAA7134_MAIN_CTRL,
671 SAA7134_MAIN_CTRL_VPLLE |
672 SAA7134_MAIN_CTRL_APLLE |
673 SAA7134_MAIN_CTRL_EXOSC |
674 SAA7134_MAIN_CTRL_EVFE1 |
675 SAA7134_MAIN_CTRL_EVFE2 |
676 SAA7134_MAIN_CTRL_ESFE |
677 SAA7134_MAIN_CTRL_EBDAC);
678
679 /*
680 * Initialize OSS _after_ enabling audio clock PLL and audio processing.
681 * OSS initialization writes to registers via the audio DSP; these
682 * writes will fail unless the audio clock has been started. At worst,
683 * audio will not work.
684 */
685
686 /* enable peripheral devices */
687 saa_writeb(SAA7134_SPECIAL_MODE, 0x01);
688
689 /* set vertical line numbering start (vbi needs this) */
690 saa_writeb(SAA7134_SOURCE_TIMING2, 0x20);
691 732
692 return 0; 733 return 0;
693} 734}
694 735
695/* late init (with i2c + irq) */ 736/* late init (with i2c + irq) */
696static int saa7134_hwinit2(struct saa7134_dev *dev) 737static int saa7134_hw_enable2(struct saa7134_dev *dev)
697{ 738{
698 unsigned int irq2_mask;
699 dprintk("hwinit2\n");
700 739
701 saa7134_video_init2(dev); 740 unsigned int irq2_mask;
702 saa7134_tvaudio_init2(dev);
703 741
704 /* enable IRQ's */ 742 /* enable IRQ's */
705 irq2_mask = 743 irq2_mask =
@@ -725,6 +763,20 @@ static int saa7134_hwinit2(struct saa7134_dev *dev)
725 return 0; 763 return 0;
726} 764}
727 765
766static int saa7134_hwinit2(struct saa7134_dev *dev)
767{
768
769 dprintk("hwinit2\n");
770
771 saa7134_video_init2(dev);
772 saa7134_tvaudio_init2(dev);
773
774 saa7134_hw_enable2(dev);
775
776 return 0;
777}
778
779
728/* shutdown */ 780/* shutdown */
729static int saa7134_hwfini(struct saa7134_dev *dev) 781static int saa7134_hwfini(struct saa7134_dev *dev)
730{ 782{
@@ -838,7 +890,6 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
838 const struct pci_device_id *pci_id) 890 const struct pci_device_id *pci_id)
839{ 891{
840 struct saa7134_dev *dev; 892 struct saa7134_dev *dev;
841 struct list_head *item;
842 struct saa7134_mpeg_ops *mops; 893 struct saa7134_mpeg_ops *mops;
843 int err; 894 int err;
844 895
@@ -1020,15 +1071,13 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
1020 saa7134_devcount++; 1071 saa7134_devcount++;
1021 1072
1022 mutex_lock(&devlist_lock); 1073 mutex_lock(&devlist_lock);
1023 list_for_each(item,&mops_list) { 1074 list_for_each_entry(mops, &mops_list, next)
1024 mops = list_entry(item, struct saa7134_mpeg_ops, next);
1025 mpeg_ops_attach(mops, dev); 1075 mpeg_ops_attach(mops, dev);
1026 }
1027 list_add_tail(&dev->devlist,&saa7134_devlist); 1076 list_add_tail(&dev->devlist,&saa7134_devlist);
1028 mutex_unlock(&devlist_lock); 1077 mutex_unlock(&devlist_lock);
1029 1078
1030 /* check for signal */ 1079 /* check for signal */
1031 saa7134_irq_video_intl(dev); 1080 saa7134_irq_video_signalchange(dev);
1032 1081
1033 if (saa7134_dmasound_init && !dev->dmasound.priv_data) { 1082 if (saa7134_dmasound_init && !dev->dmasound.priv_data) {
1034 saa7134_dmasound_init(dev); 1083 saa7134_dmasound_init(dev);
@@ -1057,7 +1106,6 @@ static int __devinit saa7134_initdev(struct pci_dev *pci_dev,
1057static void __devexit saa7134_finidev(struct pci_dev *pci_dev) 1106static void __devexit saa7134_finidev(struct pci_dev *pci_dev)
1058{ 1107{
1059 struct saa7134_dev *dev = pci_get_drvdata(pci_dev); 1108 struct saa7134_dev *dev = pci_get_drvdata(pci_dev);
1060 struct list_head *item;
1061 struct saa7134_mpeg_ops *mops; 1109 struct saa7134_mpeg_ops *mops;
1062 1110
1063 /* Release DMA sound modules if present */ 1111 /* Release DMA sound modules if present */
@@ -1086,10 +1134,8 @@ static void __devexit saa7134_finidev(struct pci_dev *pci_dev)
1086 /* unregister */ 1134 /* unregister */
1087 mutex_lock(&devlist_lock); 1135 mutex_lock(&devlist_lock);
1088 list_del(&dev->devlist); 1136 list_del(&dev->devlist);
1089 list_for_each(item,&mops_list) { 1137 list_for_each_entry(mops, &mops_list, next)
1090 mops = list_entry(item, struct saa7134_mpeg_ops, next);
1091 mpeg_ops_detach(mops, dev); 1138 mpeg_ops_detach(mops, dev);
1092 }
1093 mutex_unlock(&devlist_lock); 1139 mutex_unlock(&devlist_lock);
1094 saa7134_devcount--; 1140 saa7134_devcount--;
1095 1141
@@ -1117,18 +1163,79 @@ static void __devexit saa7134_finidev(struct pci_dev *pci_dev)
1117 kfree(dev); 1163 kfree(dev);
1118} 1164}
1119 1165
1166static int saa7134_suspend(struct pci_dev *pci_dev , pm_message_t state)
1167{
1168
1169 struct saa7134_dev *dev = pci_get_drvdata(pci_dev);
1170
1171 /* disable overlay - apps should enable it explicitly on resume*/
1172 dev->ovenable = 0;
1173
1174 /* Disable interrupts, DMA, and rest of the chip*/
1175 saa_writel(SAA7134_IRQ1, 0);
1176 saa_writel(SAA7134_IRQ2, 0);
1177 saa_writel(SAA7134_MAIN_CTRL, 0);
1178
1179 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
1180 pci_save_state(pci_dev);
1181
1182 return 0;
1183}
1184
1185static int saa7134_resume(struct pci_dev *pci_dev)
1186{
1187
1188 struct saa7134_dev *dev = pci_get_drvdata(pci_dev);
1189 unsigned int flags;
1190
1191 pci_restore_state(pci_dev);
1192 pci_set_power_state(pci_dev, PCI_D0);
1193
1194 /* Do things that are done in saa7134_initdev ,
1195 except of initializing memory structures.*/
1196
1197 dev->inresume = 1;
1198 saa7134_board_init1(dev);
1199
1200 if (saa7134_boards[dev->board].video_out)
1201 saa7134_videoport_init(dev);
1202
1203 if (card_has_mpeg(dev))
1204 saa7134_ts_init_hw(dev);
1205
1206 saa7134_hw_enable1(dev);
1207 saa7134_set_decoder(dev);
1208 saa7134_i2c_call_clients(dev, VIDIOC_S_STD, &dev->tvnorm->id);
1209 saa7134_board_init2(dev);
1210 saa7134_hw_enable2(dev);
1211
1212 saa7134_tvaudio_setmute(dev);
1213 saa7134_tvaudio_setvolume(dev, dev->ctl_volume);
1214 saa7134_enable_i2s(dev);
1215
1216 /*resume unfinished buffer(s)*/
1217 spin_lock_irqsave(&dev->slock, flags);
1218 saa7134_buffer_requeue(dev, &dev->video_q);
1219 saa7134_buffer_requeue(dev, &dev->vbi_q);
1220 saa7134_buffer_requeue(dev, &dev->ts_q);
1221
1222 /* start DMA now*/
1223 dev->inresume = 0;
1224 saa7134_set_dmabits(dev);
1225 spin_unlock_irqrestore(&dev->slock, flags);
1226
1227 return 0;
1228}
1229
1120/* ----------------------------------------------------------- */ 1230/* ----------------------------------------------------------- */
1121 1231
1122int saa7134_ts_register(struct saa7134_mpeg_ops *ops) 1232int saa7134_ts_register(struct saa7134_mpeg_ops *ops)
1123{ 1233{
1124 struct list_head *item;
1125 struct saa7134_dev *dev; 1234 struct saa7134_dev *dev;
1126 1235
1127 mutex_lock(&devlist_lock); 1236 mutex_lock(&devlist_lock);
1128 list_for_each(item,&saa7134_devlist) { 1237 list_for_each_entry(dev, &saa7134_devlist, devlist)
1129 dev = list_entry(item, struct saa7134_dev, devlist);
1130 mpeg_ops_attach(ops, dev); 1238 mpeg_ops_attach(ops, dev);
1131 }
1132 list_add_tail(&ops->next,&mops_list); 1239 list_add_tail(&ops->next,&mops_list);
1133 mutex_unlock(&devlist_lock); 1240 mutex_unlock(&devlist_lock);
1134 return 0; 1241 return 0;
@@ -1136,15 +1243,12 @@ int saa7134_ts_register(struct saa7134_mpeg_ops *ops)
1136 1243
1137void saa7134_ts_unregister(struct saa7134_mpeg_ops *ops) 1244void saa7134_ts_unregister(struct saa7134_mpeg_ops *ops)
1138{ 1245{
1139 struct list_head *item;
1140 struct saa7134_dev *dev; 1246 struct saa7134_dev *dev;
1141 1247
1142 mutex_lock(&devlist_lock); 1248 mutex_lock(&devlist_lock);
1143 list_del(&ops->next); 1249 list_del(&ops->next);
1144 list_for_each(item,&saa7134_devlist) { 1250 list_for_each_entry(dev, &saa7134_devlist, devlist)
1145 dev = list_entry(item, struct saa7134_dev, devlist);
1146 mpeg_ops_detach(ops, dev); 1251 mpeg_ops_detach(ops, dev);
1147 }
1148 mutex_unlock(&devlist_lock); 1252 mutex_unlock(&devlist_lock);
1149} 1253}
1150 1254
@@ -1158,6 +1262,8 @@ static struct pci_driver saa7134_pci_driver = {
1158 .id_table = saa7134_pci_tbl, 1262 .id_table = saa7134_pci_tbl,
1159 .probe = saa7134_initdev, 1263 .probe = saa7134_initdev,
1160 .remove = __devexit_p(saa7134_finidev), 1264 .remove = __devexit_p(saa7134_finidev),
1265 .suspend = saa7134_suspend,
1266 .resume = saa7134_resume
1161}; 1267};
1162 1268
1163static int saa7134_init(void) 1269static int saa7134_init(void)
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c
index 1f6bd3300715..38d87332cc5d 100644
--- a/drivers/media/video/saa7134/saa7134-dvb.c
+++ b/drivers/media/video/saa7134/saa7134-dvb.c
@@ -567,6 +567,7 @@ static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config
567} 567}
568 568
569/* ------------------------------------------------------------------ */ 569/* ------------------------------------------------------------------ */
570
570static struct tda1004x_config tda827x_lifeview_config = { 571static struct tda1004x_config tda827x_lifeview_config = {
571 .demod_address = 0x08, 572 .demod_address = 0x08,
572 .invert = 1, 573 .invert = 1,
@@ -746,6 +747,7 @@ static struct tda1004x_config asus_p7131_hybrid_lna_config = {
746 .antenna_switch= 2, 747 .antenna_switch= 2,
747 .request_firmware = philips_tda1004x_request_firmware 748 .request_firmware = philips_tda1004x_request_firmware
748}; 749};
750
749static struct tda1004x_config kworld_dvb_t_210_config = { 751static struct tda1004x_config kworld_dvb_t_210_config = {
750 .demod_address = 0x08, 752 .demod_address = 0x08,
751 .invert = 1, 753 .invert = 1,
@@ -760,6 +762,22 @@ static struct tda1004x_config kworld_dvb_t_210_config = {
760 .antenna_switch= 1, 762 .antenna_switch= 1,
761 .request_firmware = philips_tda1004x_request_firmware 763 .request_firmware = philips_tda1004x_request_firmware
762}; 764};
765
766static struct tda1004x_config avermedia_super_007_config = {
767 .demod_address = 0x08,
768 .invert = 1,
769 .invert_oclk = 0,
770 .xtal_freq = TDA10046_XTAL_16M,
771 .agc_config = TDA10046_AGC_TDA827X,
772 .gpio_config = TDA10046_GP01_I,
773 .if_freq = TDA10046_FREQ_045,
774 .i2c_gate = 0x4b,
775 .tuner_address = 0x60,
776 .tuner_config = 0,
777 .antenna_switch= 1,
778 .request_firmware = philips_tda1004x_request_firmware
779};
780
763/* ------------------------------------------------------------------ 781/* ------------------------------------------------------------------
764 * special case: this card uses saa713x GPIO22 for the mode switch 782 * special case: this card uses saa713x GPIO22 for the mode switch
765 */ 783 */
@@ -832,7 +850,7 @@ static int dvb_init(struct saa7134_dev *dev)
832 dev->ts.nr_bufs = 32; 850 dev->ts.nr_bufs = 32;
833 dev->ts.nr_packets = 32*4; 851 dev->ts.nr_packets = 32*4;
834 dev->dvb.name = dev->name; 852 dev->dvb.name = dev->name;
835 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, 853 videobuf_queue_pci_init(&dev->dvb.dvbq, &saa7134_ts_qops,
836 dev->pci, &dev->slock, 854 dev->pci, &dev->slock,
837 V4L2_BUF_TYPE_VIDEO_CAPTURE, 855 V4L2_BUF_TYPE_VIDEO_CAPTURE,
838 V4L2_FIELD_ALTERNATE, 856 V4L2_FIELD_ALTERNATE,
@@ -1022,6 +1040,9 @@ static int dvb_init(struct saa7134_dev *dev)
1022 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: 1040 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
1023 configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config); 1041 configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config);
1024 break; 1042 break;
1043 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
1044 configure_tda827x_fe(dev, &avermedia_super_007_config);
1045 break;
1025 default: 1046 default:
1026 wprintk("Huh? unknown DVB card?\n"); 1047 wprintk("Huh? unknown DVB card?\n");
1027 break; 1048 break;
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c
index fc260ec8fdc2..34ca874dd7fe 100644
--- a/drivers/media/video/saa7134/saa7134-empress.c
+++ b/drivers/media/video/saa7134/saa7134-empress.c
@@ -20,7 +20,6 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/kernel.h> 23#include <linux/kernel.h>
25#include <linux/slab.h> 24#include <linux/slab.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
@@ -77,17 +76,14 @@ static int ts_init_encoder(struct saa7134_dev* dev)
77static int ts_open(struct inode *inode, struct file *file) 76static int ts_open(struct inode *inode, struct file *file)
78{ 77{
79 int minor = iminor(inode); 78 int minor = iminor(inode);
80 struct saa7134_dev *h,*dev = NULL; 79 struct saa7134_dev *dev;
81 struct list_head *list;
82 int err; 80 int err;
83 81
84 list_for_each(list,&saa7134_devlist) { 82 list_for_each_entry(dev, &saa7134_devlist, devlist)
85 h = list_entry(list, struct saa7134_dev, devlist); 83 if (dev->empress_dev && dev->empress_dev->minor == minor)
86 if (h->empress_dev && h->empress_dev->minor == minor) 84 goto found;
87 dev = h; 85 return -ENODEV;
88 } 86 found:
89 if (NULL == dev)
90 return -ENODEV;
91 87
92 dprintk("open minor=%d\n",minor); 88 dprintk("open minor=%d\n",minor);
93 err = -EBUSY; 89 err = -EBUSY;
@@ -401,7 +397,7 @@ static int empress_init(struct saa7134_dev *dev)
401 printk(KERN_INFO "%s: registered device video%d [mpeg]\n", 397 printk(KERN_INFO "%s: registered device video%d [mpeg]\n",
402 dev->name,dev->empress_dev->minor & 0x1f); 398 dev->name,dev->empress_dev->minor & 0x1f);
403 399
404 videobuf_queue_init(&dev->empress_tsq, &saa7134_ts_qops, 400 videobuf_queue_pci_init(&dev->empress_tsq, &saa7134_ts_qops,
405 dev->pci, &dev->slock, 401 dev->pci, &dev->slock,
406 V4L2_BUF_TYPE_VIDEO_CAPTURE, 402 V4L2_BUF_TYPE_VIDEO_CAPTURE,
407 V4L2_FIELD_ALTERNATE, 403 V4L2_FIELD_ALTERNATE,
diff --git a/drivers/media/video/saa7134/saa7134-i2c.c b/drivers/media/video/saa7134/saa7134-i2c.c
index 1cb8c709ca90..cc87f5855a21 100644
--- a/drivers/media/video/saa7134/saa7134-i2c.c
+++ b/drivers/media/video/saa7134/saa7134-i2c.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c
index 1b6dfd801cc1..80d2644f765a 100644
--- a/drivers/media/video/saa7134/saa7134-input.c
+++ b/drivers/media/video/saa7134/saa7134-input.c
@@ -19,7 +19,6 @@
19 */ 19 */
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/init.h> 22#include <linux/init.h>
24#include <linux/delay.h> 23#include <linux/delay.h>
25#include <linux/interrupt.h> 24#include <linux/interrupt.h>
diff --git a/drivers/media/video/saa7134/saa7134-oss.c b/drivers/media/video/saa7134/saa7134-oss.c
index 72444f039e3d..aedf04653e0e 100644
--- a/drivers/media/video/saa7134/saa7134-oss.c
+++ b/drivers/media/video/saa7134/saa7134-oss.c
@@ -25,7 +25,6 @@
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/list.h> 26#include <linux/list.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/moduleparam.h>
29#include <linux/kernel.h> 28#include <linux/kernel.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
31#include <linux/slab.h> 30#include <linux/slab.h>
@@ -240,17 +239,14 @@ static int dsp_rec_stop(struct saa7134_dev *dev)
240static int dsp_open(struct inode *inode, struct file *file) 239static int dsp_open(struct inode *inode, struct file *file)
241{ 240{
242 int minor = iminor(inode); 241 int minor = iminor(inode);
243 struct saa7134_dev *h,*dev = NULL; 242 struct saa7134_dev *dev;
244 struct list_head *list;
245 int err; 243 int err;
246 244
247 list_for_each(list,&saa7134_devlist) { 245 list_for_each_entry(dev, &saa7134_devlist, devlist)
248 h = list_entry(list, struct saa7134_dev, devlist); 246 if (dev->dmasound.minor_dsp == minor)
249 if (h->dmasound.minor_dsp == minor) 247 goto found;
250 dev = h; 248 return -ENODEV;
251 } 249 found:
252 if (NULL == dev)
253 return -ENODEV;
254 250
255 mutex_lock(&dev->dmasound.lock); 251 mutex_lock(&dev->dmasound.lock);
256 err = -EBUSY; 252 err = -EBUSY;
@@ -681,19 +677,14 @@ mixer_level(struct saa7134_dev *dev, enum saa7134_audio_in src, int level)
681static int mixer_open(struct inode *inode, struct file *file) 677static int mixer_open(struct inode *inode, struct file *file)
682{ 678{
683 int minor = iminor(inode); 679 int minor = iminor(inode);
684 struct saa7134_dev *h,*dev = NULL; 680 struct saa7134_dev *dev;
685 struct list_head *list;
686 681
687 list_for_each(list,&saa7134_devlist) { 682 list_for_each_entry(dev, &saa7134_devlist, devlist)
688 h = list_entry(list, struct saa7134_dev, devlist); 683 if (dev->dmasound.minor_mixer == minor) {
689 if (h->dmasound.minor_mixer == minor) 684 file->private_data = dev;
690 dev = h; 685 return 0;
691 } 686 }
692 if (NULL == dev) 687 return -ENODEV;
693 return -ENODEV;
694
695 file->private_data = dev;
696 return 0;
697} 688}
698 689
699static int mixer_release(struct inode *inode, struct file *file) 690static int mixer_release(struct inode *inode, struct file *file)
@@ -1023,18 +1014,14 @@ static int saa7134_oss_init(void)
1023 1014
1024static void saa7134_oss_exit(void) 1015static void saa7134_oss_exit(void)
1025{ 1016{
1026 struct saa7134_dev *dev = NULL; 1017 struct saa7134_dev *dev;
1027 struct list_head *list;
1028
1029 list_for_each(list,&saa7134_devlist) {
1030 dev = list_entry(list, struct saa7134_dev, devlist);
1031 1018
1019 list_for_each_entry(dev, &saa7134_devlist, devlist) {
1032 /* Device isn't registered by OSS, probably ALSA's */ 1020 /* Device isn't registered by OSS, probably ALSA's */
1033 if (!dev->dmasound.minor_dsp) 1021 if (!dev->dmasound.minor_dsp)
1034 continue; 1022 continue;
1035 1023
1036 oss_device_exit(dev); 1024 oss_device_exit(dev);
1037
1038 } 1025 }
1039 1026
1040 saa7134_dmasound_init = NULL; 1027 saa7134_dmasound_init = NULL;
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c
index 60a90a2617ae..4b63ad3e8466 100644
--- a/drivers/media/video/saa7134/saa7134-ts.c
+++ b/drivers/media/video/saa7134/saa7134-ts.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
@@ -93,6 +92,8 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
93 } 92 }
94 93
95 if (STATE_NEEDS_INIT == buf->vb.state) { 94 if (STATE_NEEDS_INIT == buf->vb.state) {
95 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
96
96 buf->vb.width = llength; 97 buf->vb.width = llength;
97 buf->vb.height = lines; 98 buf->vb.height = lines;
98 buf->vb.size = size; 99 buf->vb.size = size;
@@ -102,8 +103,8 @@ static int buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
102 if (err) 103 if (err)
103 goto oops; 104 goto oops;
104 err = saa7134_pgtable_build(dev->pci,buf->pt, 105 err = saa7134_pgtable_build(dev->pci,buf->pt,
105 buf->vb.dma.sglist, 106 dma->sglist,
106 buf->vb.dma.sglen, 107 dma->sglen,
107 saa7134_buffer_startpage(buf)); 108 saa7134_buffer_startpage(buf));
108 if (err) 109 if (err)
109 goto oops; 110 goto oops;
@@ -176,6 +177,22 @@ static unsigned int ts_nr_packets = 64;
176module_param(ts_nr_packets, int, 0444); 177module_param(ts_nr_packets, int, 0444);
177MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)"); 178MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)");
178 179
180int saa7134_ts_init_hw(struct saa7134_dev *dev)
181{
182 /* deactivate TS softreset */
183 saa_writeb(SAA7134_TS_SERIAL1, 0x00);
184 /* TSSOP high active, TSVAL high active, TSLOCK ignored */
185 saa_writeb(SAA7134_TS_PARALLEL, 0xec);
186 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1));
187 saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff));
188 saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff));
189 /* TSNOPIT=0, TSCOLAP=0 */
190 saa_writeb(SAA7134_TS_DMA2,
191 ((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00));
192
193 return 0;
194}
195
179int saa7134_ts_init1(struct saa7134_dev *dev) 196int saa7134_ts_init1(struct saa7134_dev *dev)
180{ 197{
181 /* sanitycheck insmod options */ 198 /* sanitycheck insmod options */
@@ -199,12 +216,7 @@ int saa7134_ts_init1(struct saa7134_dev *dev)
199 saa7134_pgtable_alloc(dev->pci,&dev->ts.pt_ts); 216 saa7134_pgtable_alloc(dev->pci,&dev->ts.pt_ts);
200 217
201 /* init TS hw */ 218 /* init TS hw */
202 saa_writeb(SAA7134_TS_SERIAL1, 0x00); /* deactivate TS softreset */ 219 saa7134_ts_init_hw(dev);
203 saa_writeb(SAA7134_TS_PARALLEL, 0xec); /* TSSOP high active, TSVAL high active, TSLOCK ignored */
204 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1));
205 saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff));
206 saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff));
207 saa_writeb(SAA7134_TS_DMA2, ((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00)); /* TSNOPIT=0, TSCOLAP=0 */
208 220
209 return 0; 221 return 0;
210} 222}
diff --git a/drivers/media/video/saa7134/saa7134-tvaudio.c b/drivers/media/video/saa7134/saa7134-tvaudio.c
index 18b4817b4aac..1b9e39a5ea47 100644
--- a/drivers/media/video/saa7134/saa7134-tvaudio.c
+++ b/drivers/media/video/saa7134/saa7134-tvaudio.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/kthread.h> 27#include <linux/kthread.h>
29#include <linux/slab.h> 28#include <linux/slab.h>
@@ -232,7 +231,7 @@ static void mute_input_7134(struct saa7134_dev *dev)
232 } 231 }
233 232
234 if (dev->hw_mute == mute && 233 if (dev->hw_mute == mute &&
235 dev->hw_input == in) { 234 dev->hw_input == in && !dev->inresume) {
236 dprintk("mute/input: nothing to do [mute=%d,input=%s]\n", 235 dprintk("mute/input: nothing to do [mute=%d,input=%s]\n",
237 mute,in->name); 236 mute,in->name);
238 return; 237 return;
@@ -877,7 +876,7 @@ static int tvaudio_thread_ddep(void *data)
877/* ------------------------------------------------------------------ */ 876/* ------------------------------------------------------------------ */
878/* common stuff + external entry points */ 877/* common stuff + external entry points */
879 878
880static void saa7134_enable_i2s(struct saa7134_dev *dev) 879void saa7134_enable_i2s(struct saa7134_dev *dev)
881{ 880{
882 int i2s_format; 881 int i2s_format;
883 882
diff --git a/drivers/media/video/saa7134/saa7134-vbi.c b/drivers/media/video/saa7134/saa7134-vbi.c
index f38366a470fa..81a2aedeff5c 100644
--- a/drivers/media/video/saa7134/saa7134-vbi.c
+++ b/drivers/media/video/saa7134/saa7134-vbi.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29 28
@@ -138,6 +137,8 @@ static int buffer_prepare(struct videobuf_queue *q,
138 saa7134_dma_free(q,buf); 137 saa7134_dma_free(q,buf);
139 138
140 if (STATE_NEEDS_INIT == buf->vb.state) { 139 if (STATE_NEEDS_INIT == buf->vb.state) {
140 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
141
141 buf->vb.width = llength; 142 buf->vb.width = llength;
142 buf->vb.height = lines; 143 buf->vb.height = lines;
143 buf->vb.size = size; 144 buf->vb.size = size;
@@ -147,8 +148,8 @@ static int buffer_prepare(struct videobuf_queue *q,
147 if (err) 148 if (err)
148 goto oops; 149 goto oops;
149 err = saa7134_pgtable_build(dev->pci,buf->pt, 150 err = saa7134_pgtable_build(dev->pci,buf->pt,
150 buf->vb.dma.sglist, 151 dma->sglist,
151 buf->vb.dma.sglen, 152 dma->sglen,
152 saa7134_buffer_startpage(buf)); 153 saa7134_buffer_startpage(buf));
153 if (err) 154 if (err)
154 goto oops; 155 goto oops;
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c
index 9985ded20950..471b92793c12 100644
--- a/drivers/media/video/saa7134/saa7134-video.c
+++ b/drivers/media/video/saa7134/saa7134-video.c
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h> 26#include <linux/kernel.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/sort.h> 28#include <linux/sort.h>
@@ -41,7 +40,7 @@
41 40
42static unsigned int video_debug = 0; 41static unsigned int video_debug = 0;
43static unsigned int gbuffers = 8; 42static unsigned int gbuffers = 8;
44static unsigned int noninterlaced = 1; 43static unsigned int noninterlaced = 0;
45static unsigned int gbufsize = 720*576*4; 44static unsigned int gbufsize = 720*576*4;
46static unsigned int gbufsize_max = 720*576*4; 45static unsigned int gbufsize_max = 720*576*4;
47static char secam[] = "--"; 46static char secam[] = "--";
@@ -541,22 +540,12 @@ void res_free(struct saa7134_dev *dev, struct saa7134_fh *fh, unsigned int bits)
541 540
542/* ------------------------------------------------------------------ */ 541/* ------------------------------------------------------------------ */
543 542
544static void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm) 543void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm)
545{ 544{
546 int luma_control,sync_control,mux;
547 545
548 dprintk("set tv norm = %s\n",norm->name); 546 dprintk("set tv norm = %s\n",norm->name);
549 dev->tvnorm = norm; 547 dev->tvnorm = norm;
550 548
551 mux = card_in(dev,dev->ctl_input).vmux;
552 luma_control = norm->luma_control;
553 sync_control = norm->sync_control;
554
555 if (mux > 5)
556 luma_control |= 0x80; /* svideo */
557 if (noninterlaced || dev->nosignal)
558 sync_control |= 0x20;
559
560 /* setup cropping */ 549 /* setup cropping */
561 dev->crop_bounds.left = norm->h_start; 550 dev->crop_bounds.left = norm->h_start;
562 dev->crop_defrect.left = norm->h_start; 551 dev->crop_defrect.left = norm->h_start;
@@ -571,6 +560,40 @@ static void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm)
571 560
572 dev->crop_current = dev->crop_defrect; 561 dev->crop_current = dev->crop_defrect;
573 562
563 saa7134_set_decoder(dev);
564
565 if (card_in(dev, dev->ctl_input).tv) {
566 if ((card(dev).tuner_type == TUNER_PHILIPS_TDA8290)
567 && ((card(dev).tuner_config == 1)
568 || (card(dev).tuner_config == 2)))
569 saa7134_set_gpio(dev, 22, 5);
570 saa7134_i2c_call_clients(dev, VIDIOC_S_STD, &norm->id);
571 }
572}
573
574static void video_mux(struct saa7134_dev *dev, int input)
575{
576 dprintk("video input = %d [%s]\n", input, card_in(dev, input).name);
577 dev->ctl_input = input;
578 set_tvnorm(dev, dev->tvnorm);
579 saa7134_tvaudio_setinput(dev, &card_in(dev, input));
580}
581
582void saa7134_set_decoder(struct saa7134_dev *dev)
583{
584 int luma_control, sync_control, mux;
585
586 struct saa7134_tvnorm *norm = dev->tvnorm;
587 mux = card_in(dev, dev->ctl_input).vmux;
588
589 luma_control = norm->luma_control;
590 sync_control = norm->sync_control;
591
592 if (mux > 5)
593 luma_control |= 0x80; /* svideo */
594 if (noninterlaced || dev->nosignal)
595 sync_control |= 0x20;
596
574 /* setup video decoder */ 597 /* setup video decoder */
575 saa_writeb(SAA7134_INCR_DELAY, 0x08); 598 saa_writeb(SAA7134_INCR_DELAY, 0x08);
576 saa_writeb(SAA7134_ANALOG_IN_CTRL1, 0xc0 | mux); 599 saa_writeb(SAA7134_ANALOG_IN_CTRL1, 0xc0 | mux);
@@ -585,9 +608,13 @@ static void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm)
585 saa_writeb(SAA7134_SYNC_CTRL, sync_control); 608 saa_writeb(SAA7134_SYNC_CTRL, sync_control);
586 saa_writeb(SAA7134_LUMA_CTRL, luma_control); 609 saa_writeb(SAA7134_LUMA_CTRL, luma_control);
587 saa_writeb(SAA7134_DEC_LUMA_BRIGHT, dev->ctl_bright); 610 saa_writeb(SAA7134_DEC_LUMA_BRIGHT, dev->ctl_bright);
588 saa_writeb(SAA7134_DEC_LUMA_CONTRAST, dev->ctl_contrast);
589 611
590 saa_writeb(SAA7134_DEC_CHROMA_SATURATION, dev->ctl_saturation); 612 saa_writeb(SAA7134_DEC_LUMA_CONTRAST,
613 dev->ctl_invert ? -dev->ctl_contrast : dev->ctl_contrast);
614
615 saa_writeb(SAA7134_DEC_CHROMA_SATURATION,
616 dev->ctl_invert ? -dev->ctl_saturation : dev->ctl_saturation);
617
591 saa_writeb(SAA7134_DEC_CHROMA_HUE, dev->ctl_hue); 618 saa_writeb(SAA7134_DEC_CHROMA_HUE, dev->ctl_hue);
592 saa_writeb(SAA7134_CHROMA_CTRL1, norm->chroma_ctrl1); 619 saa_writeb(SAA7134_CHROMA_CTRL1, norm->chroma_ctrl1);
593 saa_writeb(SAA7134_CHROMA_GAIN, norm->chroma_gain); 620 saa_writeb(SAA7134_CHROMA_GAIN, norm->chroma_gain);
@@ -601,23 +628,6 @@ static void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm)
601 saa_writeb(SAA7134_MISC_VGATE_MSB, norm->vgate_misc); 628 saa_writeb(SAA7134_MISC_VGATE_MSB, norm->vgate_misc);
602 saa_writeb(SAA7134_RAW_DATA_GAIN, 0x40); 629 saa_writeb(SAA7134_RAW_DATA_GAIN, 0x40);
603 saa_writeb(SAA7134_RAW_DATA_OFFSET, 0x80); 630 saa_writeb(SAA7134_RAW_DATA_OFFSET, 0x80);
604
605 /* only tell the tuner if this is a tv input */
606 if (card_in(dev,dev->ctl_input).tv) {
607 if ((card(dev).tuner_type == TUNER_PHILIPS_TDA8290)
608 && ((card(dev).tuner_config == 1)
609 || (card(dev).tuner_config == 2)))
610 saa7134_set_gpio(dev, 22, 5);
611 saa7134_i2c_call_clients(dev,VIDIOC_S_STD,&norm->id);
612 }
613}
614
615static void video_mux(struct saa7134_dev *dev, int input)
616{
617 dprintk("video input = %d [%s]\n",input,card_in(dev,input).name);
618 dev->ctl_input = input;
619 set_tvnorm(dev,dev->tvnorm);
620 saa7134_tvaudio_setinput(dev,&card_in(dev,input));
621} 631}
622 632
623static void set_h_prescale(struct saa7134_dev *dev, int task, int prescale) 633static void set_h_prescale(struct saa7134_dev *dev, int task, int prescale)
@@ -1038,6 +1048,8 @@ static int buffer_prepare(struct videobuf_queue *q,
1038 } 1048 }
1039 1049
1040 if (STATE_NEEDS_INIT == buf->vb.state) { 1050 if (STATE_NEEDS_INIT == buf->vb.state) {
1051 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1052
1041 buf->vb.width = fh->width; 1053 buf->vb.width = fh->width;
1042 buf->vb.height = fh->height; 1054 buf->vb.height = fh->height;
1043 buf->vb.size = size; 1055 buf->vb.size = size;
@@ -1049,8 +1061,8 @@ static int buffer_prepare(struct videobuf_queue *q,
1049 if (err) 1061 if (err)
1050 goto oops; 1062 goto oops;
1051 err = saa7134_pgtable_build(dev->pci,buf->pt, 1063 err = saa7134_pgtable_build(dev->pci,buf->pt,
1052 buf->vb.dma.sglist, 1064 dma->sglist,
1053 buf->vb.dma.sglen, 1065 dma->sglen,
1054 saa7134_buffer_startpage(buf)); 1066 saa7134_buffer_startpage(buf));
1055 if (err) 1067 if (err)
1056 goto oops; 1068 goto oops;
@@ -1273,26 +1285,24 @@ static int saa7134_resource(struct saa7134_fh *fh)
1273static int video_open(struct inode *inode, struct file *file) 1285static int video_open(struct inode *inode, struct file *file)
1274{ 1286{
1275 int minor = iminor(inode); 1287 int minor = iminor(inode);
1276 struct saa7134_dev *h,*dev = NULL; 1288 struct saa7134_dev *dev;
1277 struct saa7134_fh *fh; 1289 struct saa7134_fh *fh;
1278 struct list_head *list;
1279 enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1290 enum v4l2_buf_type type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1280 int radio = 0; 1291 int radio = 0;
1281 list_for_each(list,&saa7134_devlist) { 1292 list_for_each_entry(dev, &saa7134_devlist, devlist) {
1282 h = list_entry(list, struct saa7134_dev, devlist); 1293 if (dev->video_dev && (dev->video_dev->minor == minor))
1283 if (h->video_dev && (h->video_dev->minor == minor)) 1294 goto found;
1284 dev = h; 1295 if (dev->radio_dev && (dev->radio_dev->minor == minor)) {
1285 if (h->radio_dev && (h->radio_dev->minor == minor)) {
1286 radio = 1; 1296 radio = 1;
1287 dev = h; 1297 goto found;
1288 } 1298 }
1289 if (h->vbi_dev && (h->vbi_dev->minor == minor)) { 1299 if (dev->vbi_dev && (dev->vbi_dev->minor == minor)) {
1290 type = V4L2_BUF_TYPE_VBI_CAPTURE; 1300 type = V4L2_BUF_TYPE_VBI_CAPTURE;
1291 dev = h; 1301 goto found;
1292 } 1302 }
1293 } 1303 }
1294 if (NULL == dev) 1304 return -ENODEV;
1295 return -ENODEV; 1305 found:
1296 1306
1297 dprintk("open minor=%d radio=%d type=%s\n",minor,radio, 1307 dprintk("open minor=%d radio=%d type=%s\n",minor,radio,
1298 v4l2_type_names[type]); 1308 v4l2_type_names[type]);
@@ -1310,13 +1320,13 @@ static int video_open(struct inode *inode, struct file *file)
1310 fh->height = 576; 1320 fh->height = 576;
1311 v4l2_prio_open(&dev->prio,&fh->prio); 1321 v4l2_prio_open(&dev->prio,&fh->prio);
1312 1322
1313 videobuf_queue_init(&fh->cap, &video_qops, 1323 videobuf_queue_pci_init(&fh->cap, &video_qops,
1314 dev->pci, &dev->slock, 1324 dev->pci, &dev->slock,
1315 V4L2_BUF_TYPE_VIDEO_CAPTURE, 1325 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1316 V4L2_FIELD_INTERLACED, 1326 V4L2_FIELD_INTERLACED,
1317 sizeof(struct saa7134_buf), 1327 sizeof(struct saa7134_buf),
1318 fh); 1328 fh);
1319 videobuf_queue_init(&fh->vbi, &saa7134_vbi_qops, 1329 videobuf_queue_pci_init(&fh->vbi, &saa7134_vbi_qops,
1320 dev->pci, &dev->slock, 1330 dev->pci, &dev->slock,
1321 V4L2_BUF_TYPE_VBI_CAPTURE, 1331 V4L2_BUF_TYPE_VBI_CAPTURE,
1322 V4L2_FIELD_SEQ_TB, 1332 V4L2_FIELD_SEQ_TB,
@@ -1833,7 +1843,11 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
1833 if (res_check(fh, RESOURCE_OVERLAY)) { 1843 if (res_check(fh, RESOURCE_OVERLAY)) {
1834 spin_lock_irqsave(&dev->slock,flags); 1844 spin_lock_irqsave(&dev->slock,flags);
1835 stop_preview(dev,fh); 1845 stop_preview(dev,fh);
1846 spin_unlock_irqrestore(&dev->slock, flags);
1847
1836 set_tvnorm(dev,&tvnorms[i]); 1848 set_tvnorm(dev,&tvnorms[i]);
1849
1850 spin_lock_irqsave(&dev->slock, flags);
1837 start_preview(dev,fh); 1851 start_preview(dev,fh);
1838 spin_unlock_irqrestore(&dev->slock,flags); 1852 spin_unlock_irqrestore(&dev->slock,flags);
1839 } else 1853 } else
@@ -2138,29 +2152,7 @@ static int video_do_ioctl(struct inode *inode, struct file *file,
2138 } 2152 }
2139#ifdef CONFIG_VIDEO_V4L1_COMPAT 2153#ifdef CONFIG_VIDEO_V4L1_COMPAT
2140 case VIDIOCGMBUF: 2154 case VIDIOCGMBUF:
2141 { 2155 return videobuf_cgmbuf(saa7134_queue(fh), arg, gbuffers);
2142 struct video_mbuf *mbuf = arg;
2143 struct videobuf_queue *q;
2144 struct v4l2_requestbuffers req;
2145 unsigned int i;
2146
2147 q = saa7134_queue(fh);
2148 memset(&req,0,sizeof(req));
2149 req.type = q->type;
2150 req.count = gbuffers;
2151 req.memory = V4L2_MEMORY_MMAP;
2152 err = videobuf_reqbufs(q,&req);
2153 if (err < 0)
2154 return err;
2155 memset(mbuf,0,sizeof(*mbuf));
2156 mbuf->frames = req.count;
2157 mbuf->size = 0;
2158 for (i = 0; i < mbuf->frames; i++) {
2159 mbuf->offsets[i] = q->bufs[i]->boff;
2160 mbuf->size += q->bufs[i]->bsize;
2161 }
2162 return 0;
2163 }
2164#endif 2156#endif
2165 case VIDIOC_REQBUFS: 2157 case VIDIOC_REQBUFS:
2166 return videobuf_reqbufs(saa7134_queue(fh),arg); 2158 return videobuf_reqbufs(saa7134_queue(fh),arg);
@@ -2412,34 +2404,40 @@ int saa7134_video_init1(struct saa7134_dev *dev)
2412 dev->video_q.timeout.data = (unsigned long)(&dev->video_q); 2404 dev->video_q.timeout.data = (unsigned long)(&dev->video_q);
2413 dev->video_q.dev = dev; 2405 dev->video_q.dev = dev;
2414 2406
2415 if (saa7134_boards[dev->board].video_out) { 2407 if (saa7134_boards[dev->board].video_out)
2416 /* enable video output */ 2408 saa7134_videoport_init(dev);
2417 int vo = saa7134_boards[dev->board].video_out; 2409
2418 int video_reg; 2410 return 0;
2419 unsigned int vid_port_opts = saa7134_boards[dev->board].vid_port_opts; 2411}
2420 saa_writeb(SAA7134_VIDEO_PORT_CTRL0, video_out[vo][0]); 2412
2421 video_reg = video_out[vo][1]; 2413int saa7134_videoport_init(struct saa7134_dev *dev)
2422 if (vid_port_opts & SET_T_CODE_POLARITY_NON_INVERTED) 2414{
2423 video_reg &= ~VP_T_CODE_P_INVERTED; 2415 /* enable video output */
2424 saa_writeb(SAA7134_VIDEO_PORT_CTRL1, video_reg); 2416 int vo = saa7134_boards[dev->board].video_out;
2425 saa_writeb(SAA7134_VIDEO_PORT_CTRL2, video_out[vo][2]); 2417 int video_reg;
2426 saa_writeb(SAA7134_VIDEO_PORT_CTRL3, video_out[vo][3]); 2418 unsigned int vid_port_opts = saa7134_boards[dev->board].vid_port_opts;
2427 saa_writeb(SAA7134_VIDEO_PORT_CTRL4, video_out[vo][4]); 2419 saa_writeb(SAA7134_VIDEO_PORT_CTRL0, video_out[vo][0]);
2428 video_reg = video_out[vo][5]; 2420 video_reg = video_out[vo][1];
2429 if (vid_port_opts & SET_CLOCK_NOT_DELAYED) 2421 if (vid_port_opts & SET_T_CODE_POLARITY_NON_INVERTED)
2430 video_reg &= ~VP_CLK_CTRL2_DELAYED; 2422 video_reg &= ~VP_T_CODE_P_INVERTED;
2431 if (vid_port_opts & SET_CLOCK_INVERTED) 2423 saa_writeb(SAA7134_VIDEO_PORT_CTRL1, video_reg);
2432 video_reg |= VP_CLK_CTRL1_INVERTED; 2424 saa_writeb(SAA7134_VIDEO_PORT_CTRL2, video_out[vo][2]);
2433 saa_writeb(SAA7134_VIDEO_PORT_CTRL5, video_reg); 2425 saa_writeb(SAA7134_VIDEO_PORT_CTRL3, video_out[vo][3]);
2434 video_reg = video_out[vo][6]; 2426 saa_writeb(SAA7134_VIDEO_PORT_CTRL4, video_out[vo][4]);
2435 if (vid_port_opts & SET_VSYNC_OFF) { 2427 video_reg = video_out[vo][5];
2436 video_reg &= ~VP_VS_TYPE_MASK; 2428 if (vid_port_opts & SET_CLOCK_NOT_DELAYED)
2437 video_reg |= VP_VS_TYPE_OFF; 2429 video_reg &= ~VP_CLK_CTRL2_DELAYED;
2438 } 2430 if (vid_port_opts & SET_CLOCK_INVERTED)
2439 saa_writeb(SAA7134_VIDEO_PORT_CTRL6, video_reg); 2431 video_reg |= VP_CLK_CTRL1_INVERTED;
2440 saa_writeb(SAA7134_VIDEO_PORT_CTRL7, video_out[vo][7]); 2432 saa_writeb(SAA7134_VIDEO_PORT_CTRL5, video_reg);
2441 saa_writeb(SAA7134_VIDEO_PORT_CTRL8, video_out[vo][8]); 2433 video_reg = video_out[vo][6];
2442 } 2434 if (vid_port_opts & SET_VSYNC_OFF) {
2435 video_reg &= ~VP_VS_TYPE_MASK;
2436 video_reg |= VP_VS_TYPE_OFF;
2437 }
2438 saa_writeb(SAA7134_VIDEO_PORT_CTRL6, video_reg);
2439 saa_writeb(SAA7134_VIDEO_PORT_CTRL7, video_out[vo][7]);
2440 saa_writeb(SAA7134_VIDEO_PORT_CTRL8, video_out[vo][8]);
2443 2441
2444 return 0; 2442 return 0;
2445} 2443}
@@ -2454,7 +2452,7 @@ int saa7134_video_init2(struct saa7134_dev *dev)
2454 return 0; 2452 return 0;
2455} 2453}
2456 2454
2457void saa7134_irq_video_intl(struct saa7134_dev *dev) 2455void saa7134_irq_video_signalchange(struct saa7134_dev *dev)
2458{ 2456{
2459 static const char *st[] = { 2457 static const char *st[] = {
2460 "(no signal)", "NTSC", "PAL", "SECAM" }; 2458 "(no signal)", "NTSC", "PAL", "SECAM" };
@@ -2466,24 +2464,28 @@ void saa7134_irq_video_intl(struct saa7134_dev *dev)
2466 (st1 & 0x40) ? "not locked" : "locked", 2464 (st1 & 0x40) ? "not locked" : "locked",
2467 (st2 & 0x40) ? "no" : "yes", 2465 (st2 & 0x40) ? "no" : "yes",
2468 st[st1 & 0x03]); 2466 st[st1 & 0x03]);
2469 dev->nosignal = (st1 & 0x40) || (st2 & 0x40); 2467 dev->nosignal = (st1 & 0x40) || (st2 & 0x40) || !(st2 & 0x1);
2470 2468
2471 if (dev->nosignal) { 2469 if (dev->nosignal) {
2472 /* no video signal -> mute audio */ 2470 /* no video signal -> mute audio */
2473 if (dev->ctl_automute) 2471 if (dev->ctl_automute)
2474 dev->automute = 1; 2472 dev->automute = 1;
2475 saa7134_tvaudio_setmute(dev); 2473 saa7134_tvaudio_setmute(dev);
2476 saa_setb(SAA7134_SYNC_CTRL, 0x20);
2477 } else { 2474 } else {
2478 /* wake up tvaudio audio carrier scan thread */ 2475 /* wake up tvaudio audio carrier scan thread */
2479 saa7134_tvaudio_do_scan(dev); 2476 saa7134_tvaudio_do_scan(dev);
2480 if (!noninterlaced)
2481 saa_clearb(SAA7134_SYNC_CTRL, 0x20);
2482 } 2477 }
2478
2479 if ((st2 & 0x80) && !noninterlaced && !dev->nosignal)
2480 saa_clearb(SAA7134_SYNC_CTRL, 0x20);
2481 else
2482 saa_setb(SAA7134_SYNC_CTRL, 0x20);
2483
2483 if (dev->mops && dev->mops->signal_change) 2484 if (dev->mops && dev->mops->signal_change)
2484 dev->mops->signal_change(dev); 2485 dev->mops->signal_change(dev);
2485} 2486}
2486 2487
2488
2487void saa7134_irq_video_done(struct saa7134_dev *dev, unsigned long status) 2489void saa7134_irq_video_done(struct saa7134_dev *dev, unsigned long status)
2488{ 2490{
2489 enum v4l2_field field; 2491 enum v4l2_field field;
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
index 346255468dad..28ec6804bd5d 100644
--- a/drivers/media/video/saa7134/saa7134.h
+++ b/drivers/media/video/saa7134/saa7134.h
@@ -37,12 +37,12 @@
37#include <media/tuner.h> 37#include <media/tuner.h>
38#include <media/ir-common.h> 38#include <media/ir-common.h>
39#include <media/ir-kbd-i2c.h> 39#include <media/ir-kbd-i2c.h>
40#include <media/video-buf.h> 40#include <media/videobuf-dma-sg.h>
41#include <sound/driver.h> 41#include <sound/driver.h>
42#include <sound/core.h> 42#include <sound/core.h>
43#include <sound/pcm.h> 43#include <sound/pcm.h>
44#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 44#if defined(CONFIG_VIDEO_SAA7134_DVB) || defined(CONFIG_VIDEO_SAA7134_DVB_MODULE)
45#include <media/video-buf-dvb.h> 45#include <media/videobuf-dvb.h>
46#endif 46#endif
47 47
48#define UNSET (-1U) 48#define UNSET (-1U)
@@ -239,6 +239,7 @@ struct saa7134_format {
239#define SAA7134_BOARD_KWORLD_DVBT_210 114 239#define SAA7134_BOARD_KWORLD_DVBT_210 114
240#define SAA7134_BOARD_SABRENT_TV_PCB05 115 240#define SAA7134_BOARD_SABRENT_TV_PCB05 115
241#define SAA7134_BOARD_10MOONSTVMASTER3 116 241#define SAA7134_BOARD_10MOONSTVMASTER3 116
242#define SAA7134_BOARD_AVERMEDIA_SUPER_007 117
242 243
243#define SAA7134_MAXBOARDS 8 244#define SAA7134_MAXBOARDS 8
244#define SAA7134_INPUT_MAX 8 245#define SAA7134_INPUT_MAX 8
@@ -523,6 +524,7 @@ struct saa7134_dev {
523 unsigned int hw_mute; 524 unsigned int hw_mute;
524 int last_carrier; 525 int last_carrier;
525 int nosignal; 526 int nosignal;
527 unsigned int inresume;
526 528
527 /* SAA7134_MPEG_* */ 529 /* SAA7134_MPEG_* */
528 struct saa7134_ts ts; 530 struct saa7134_ts ts;
@@ -536,7 +538,7 @@ struct saa7134_dev {
536 struct work_struct empress_workqueue; 538 struct work_struct empress_workqueue;
537 int empress_started; 539 int empress_started;
538 540
539#if defined(CONFIG_VIDEO_BUF_DVB) || defined(CONFIG_VIDEO_BUF_DVB_MODULE) 541#if defined(CONFIG_VIDEO_SAA7134_DVB) || defined(CONFIG_VIDEO_SAA7134_DVB_MODULE)
540 /* SAA7134_MPEG_DVB only */ 542 /* SAA7134_MPEG_DVB only */
541 struct videobuf_dvb dvb; 543 struct videobuf_dvb dvb;
542 int (*original_demod_sleep)(struct dvb_frontend* fe); 544 int (*original_demod_sleep)(struct dvb_frontend* fe);
@@ -593,6 +595,9 @@ void saa7134_buffer_next(struct saa7134_dev *dev, struct saa7134_dmaqueue *q);
593void saa7134_buffer_timeout(unsigned long data); 595void saa7134_buffer_timeout(unsigned long data);
594void saa7134_dma_free(struct videobuf_queue *q,struct saa7134_buf *buf); 596void saa7134_dma_free(struct videobuf_queue *q,struct saa7134_buf *buf);
595 597
598int saa7134_buffer_requeue(struct saa7134_dev *dev,
599 struct saa7134_dmaqueue *q);
600
596int saa7134_set_dmabits(struct saa7134_dev *dev); 601int saa7134_set_dmabits(struct saa7134_dev *dev);
597 602
598extern int (*saa7134_dmasound_init)(struct saa7134_dev *dev); 603extern int (*saa7134_dmasound_init)(struct saa7134_dev *dev);
@@ -625,12 +630,16 @@ void saa7134_i2c_call_clients(struct saa7134_dev *dev,
625extern struct video_device saa7134_video_template; 630extern struct video_device saa7134_video_template;
626extern struct video_device saa7134_radio_template; 631extern struct video_device saa7134_radio_template;
627 632
633void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm);
634int saa7134_videoport_init(struct saa7134_dev *dev);
635void saa7134_set_decoder(struct saa7134_dev *dev);
636
628int saa7134_common_ioctl(struct saa7134_dev *dev, 637int saa7134_common_ioctl(struct saa7134_dev *dev,
629 unsigned int cmd, void *arg); 638 unsigned int cmd, void *arg);
630 639
631int saa7134_video_init1(struct saa7134_dev *dev); 640int saa7134_video_init1(struct saa7134_dev *dev);
632int saa7134_video_init2(struct saa7134_dev *dev); 641int saa7134_video_init2(struct saa7134_dev *dev);
633void saa7134_irq_video_intl(struct saa7134_dev *dev); 642void saa7134_irq_video_signalchange(struct saa7134_dev *dev);
634void saa7134_irq_video_done(struct saa7134_dev *dev, unsigned long status); 643void saa7134_irq_video_done(struct saa7134_dev *dev, unsigned long status);
635 644
636 645
@@ -648,6 +657,8 @@ void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status);
648int saa7134_ts_register(struct saa7134_mpeg_ops *ops); 657int saa7134_ts_register(struct saa7134_mpeg_ops *ops);
649void saa7134_ts_unregister(struct saa7134_mpeg_ops *ops); 658void saa7134_ts_unregister(struct saa7134_mpeg_ops *ops);
650 659
660int saa7134_ts_init_hw(struct saa7134_dev *dev);
661
651/* ----------------------------------------------------------- */ 662/* ----------------------------------------------------------- */
652/* saa7134-vbi.c */ 663/* saa7134-vbi.c */
653 664
@@ -676,6 +687,8 @@ int saa7134_tvaudio_do_scan(struct saa7134_dev *dev);
676 687
677int saa_dsp_writel(struct saa7134_dev *dev, int reg, u32 value); 688int saa_dsp_writel(struct saa7134_dev *dev, int reg, u32 value);
678 689
690void saa7134_enable_i2s(struct saa7134_dev *dev);
691
679/* ----------------------------------------------------------- */ 692/* ----------------------------------------------------------- */
680/* saa7134-oss.c */ 693/* saa7134-oss.c */
681 694
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c
index 36d8a455e0ec..6991e06f7651 100644
--- a/drivers/media/video/sn9c102/sn9c102_core.c
+++ b/drivers/media/video/sn9c102/sn9c102_core.c
@@ -22,7 +22,6 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/param.h> 24#include <linux/param.h>
25#include <linux/moduleparam.h>
26#include <linux/errno.h> 25#include <linux/errno.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/device.h> 27#include <linux/device.h>
@@ -1030,7 +1029,8 @@ static u16 sn9c102_strtou16(const char* buff, size_t len, ssize_t* count)
1030 NOTE 2: buffers are PAGE_SIZE long 1029 NOTE 2: buffers are PAGE_SIZE long
1031*/ 1030*/
1032 1031
1033static ssize_t sn9c102_show_reg(struct class_device* cd, char* buf) 1032static ssize_t sn9c102_show_reg(struct device* cd,
1033 struct device_attribute *attr, char* buf)
1034{ 1034{
1035 struct sn9c102_device* cam; 1035 struct sn9c102_device* cam;
1036 ssize_t count; 1036 ssize_t count;
@@ -1054,7 +1054,8 @@ static ssize_t sn9c102_show_reg(struct class_device* cd, char* buf)
1054 1054
1055 1055
1056static ssize_t 1056static ssize_t
1057sn9c102_store_reg(struct class_device* cd, const char* buf, size_t len) 1057sn9c102_store_reg(struct device* cd, struct device_attribute *attr,
1058 const char* buf, size_t len)
1058{ 1059{
1059 struct sn9c102_device* cam; 1060 struct sn9c102_device* cam;
1060 u16 index; 1061 u16 index;
@@ -1087,7 +1088,8 @@ sn9c102_store_reg(struct class_device* cd, const char* buf, size_t len)
1087} 1088}
1088 1089
1089 1090
1090static ssize_t sn9c102_show_val(struct class_device* cd, char* buf) 1091static ssize_t sn9c102_show_val(struct device* cd,
1092 struct device_attribute *attr, char* buf)
1091{ 1093{
1092 struct sn9c102_device* cam; 1094 struct sn9c102_device* cam;
1093 ssize_t count; 1095 ssize_t count;
@@ -1119,7 +1121,8 @@ static ssize_t sn9c102_show_val(struct class_device* cd, char* buf)
1119 1121
1120 1122
1121static ssize_t 1123static ssize_t
1122sn9c102_store_val(struct class_device* cd, const char* buf, size_t len) 1124sn9c102_store_val(struct device* cd, struct device_attribute *attr,
1125 const char* buf, size_t len)
1123{ 1126{
1124 struct sn9c102_device* cam; 1127 struct sn9c102_device* cam;
1125 u16 value; 1128 u16 value;
@@ -1158,7 +1161,8 @@ sn9c102_store_val(struct class_device* cd, const char* buf, size_t len)
1158} 1161}
1159 1162
1160 1163
1161static ssize_t sn9c102_show_i2c_reg(struct class_device* cd, char* buf) 1164static ssize_t sn9c102_show_i2c_reg(struct device* cd,
1165 struct device_attribute *attr, char* buf)
1162{ 1166{
1163 struct sn9c102_device* cam; 1167 struct sn9c102_device* cam;
1164 ssize_t count; 1168 ssize_t count;
@@ -1184,7 +1188,8 @@ static ssize_t sn9c102_show_i2c_reg(struct class_device* cd, char* buf)
1184 1188
1185 1189
1186static ssize_t 1190static ssize_t
1187sn9c102_store_i2c_reg(struct class_device* cd, const char* buf, size_t len) 1191sn9c102_store_i2c_reg(struct device* cd, struct device_attribute *attr,
1192 const char* buf, size_t len)
1188{ 1193{
1189 struct sn9c102_device* cam; 1194 struct sn9c102_device* cam;
1190 u16 index; 1195 u16 index;
@@ -1217,7 +1222,8 @@ sn9c102_store_i2c_reg(struct class_device* cd, const char* buf, size_t len)
1217} 1222}
1218 1223
1219 1224
1220static ssize_t sn9c102_show_i2c_val(struct class_device* cd, char* buf) 1225static ssize_t sn9c102_show_i2c_val(struct device* cd,
1226 struct device_attribute *attr, char* buf)
1221{ 1227{
1222 struct sn9c102_device* cam; 1228 struct sn9c102_device* cam;
1223 ssize_t count; 1229 ssize_t count;
@@ -1254,7 +1260,8 @@ static ssize_t sn9c102_show_i2c_val(struct class_device* cd, char* buf)
1254 1260
1255 1261
1256static ssize_t 1262static ssize_t
1257sn9c102_store_i2c_val(struct class_device* cd, const char* buf, size_t len) 1263sn9c102_store_i2c_val(struct device* cd, struct device_attribute *attr,
1264 const char* buf, size_t len)
1258{ 1265{
1259 struct sn9c102_device* cam; 1266 struct sn9c102_device* cam;
1260 u16 value; 1267 u16 value;
@@ -1299,7 +1306,8 @@ sn9c102_store_i2c_val(struct class_device* cd, const char* buf, size_t len)
1299 1306
1300 1307
1301static ssize_t 1308static ssize_t
1302sn9c102_store_green(struct class_device* cd, const char* buf, size_t len) 1309sn9c102_store_green(struct device* cd, struct device_attribute *attr,
1310 const char* buf, size_t len)
1303{ 1311{
1304 struct sn9c102_device* cam; 1312 struct sn9c102_device* cam;
1305 enum sn9c102_bridge bridge; 1313 enum sn9c102_bridge bridge;
@@ -1330,16 +1338,16 @@ sn9c102_store_green(struct class_device* cd, const char* buf, size_t len)
1330 case BRIDGE_SN9C102: 1338 case BRIDGE_SN9C102:
1331 if (value > 0x0f) 1339 if (value > 0x0f)
1332 return -EINVAL; 1340 return -EINVAL;
1333 if ((res = sn9c102_store_reg(cd, "0x11", 4)) >= 0) 1341 if ((res = sn9c102_store_reg(cd, attr, "0x11", 4)) >= 0)
1334 res = sn9c102_store_val(cd, buf, len); 1342 res = sn9c102_store_val(cd, attr, buf, len);
1335 break; 1343 break;
1336 case BRIDGE_SN9C103: 1344 case BRIDGE_SN9C103:
1337 case BRIDGE_SN9C105: 1345 case BRIDGE_SN9C105:
1338 case BRIDGE_SN9C120: 1346 case BRIDGE_SN9C120:
1339 if (value > 0x7f) 1347 if (value > 0x7f)
1340 return -EINVAL; 1348 return -EINVAL;
1341 if ((res = sn9c102_store_reg(cd, "0x07", 4)) >= 0) 1349 if ((res = sn9c102_store_reg(cd, attr, "0x07", 4)) >= 0)
1342 res = sn9c102_store_val(cd, buf, len); 1350 res = sn9c102_store_val(cd, attr, buf, len);
1343 break; 1351 break;
1344 } 1352 }
1345 1353
@@ -1348,7 +1356,8 @@ sn9c102_store_green(struct class_device* cd, const char* buf, size_t len)
1348 1356
1349 1357
1350static ssize_t 1358static ssize_t
1351sn9c102_store_blue(struct class_device* cd, const char* buf, size_t len) 1359sn9c102_store_blue(struct device* cd, struct device_attribute *attr,
1360 const char* buf, size_t len)
1352{ 1361{
1353 ssize_t res = 0; 1362 ssize_t res = 0;
1354 u16 value; 1363 u16 value;
@@ -1358,15 +1367,16 @@ sn9c102_store_blue(struct class_device* cd, const char* buf, size_t len)
1358 if (!count || value > 0x7f) 1367 if (!count || value > 0x7f)
1359 return -EINVAL; 1368 return -EINVAL;
1360 1369
1361 if ((res = sn9c102_store_reg(cd, "0x06", 4)) >= 0) 1370 if ((res = sn9c102_store_reg(cd, attr, "0x06", 4)) >= 0)
1362 res = sn9c102_store_val(cd, buf, len); 1371 res = sn9c102_store_val(cd, attr, buf, len);
1363 1372
1364 return res; 1373 return res;
1365} 1374}
1366 1375
1367 1376
1368static ssize_t 1377static ssize_t
1369sn9c102_store_red(struct class_device* cd, const char* buf, size_t len) 1378sn9c102_store_red(struct device* cd, struct device_attribute *attr,
1379 const char* buf, size_t len)
1370{ 1380{
1371 ssize_t res = 0; 1381 ssize_t res = 0;
1372 u16 value; 1382 u16 value;
@@ -1376,14 +1386,16 @@ sn9c102_store_red(struct class_device* cd, const char* buf, size_t len)
1376 if (!count || value > 0x7f) 1386 if (!count || value > 0x7f)
1377 return -EINVAL; 1387 return -EINVAL;
1378 1388
1379 if ((res = sn9c102_store_reg(cd, "0x05", 4)) >= 0) 1389 if ((res = sn9c102_store_reg(cd, attr, "0x05", 4)) >= 0)
1380 res = sn9c102_store_val(cd, buf, len); 1390 res = sn9c102_store_val(cd, attr, buf, len);
1381 1391
1382 return res; 1392 return res;
1383} 1393}
1384 1394
1385 1395
1386static ssize_t sn9c102_show_frame_header(struct class_device* cd, char* buf) 1396static ssize_t sn9c102_show_frame_header(struct device* cd,
1397 struct device_attribute *attr,
1398 char* buf)
1387{ 1399{
1388 struct sn9c102_device* cam; 1400 struct sn9c102_device* cam;
1389 ssize_t count; 1401 ssize_t count;
@@ -1402,72 +1414,63 @@ static ssize_t sn9c102_show_frame_header(struct class_device* cd, char* buf)
1402} 1414}
1403 1415
1404 1416
1405static CLASS_DEVICE_ATTR(reg, S_IRUGO | S_IWUSR, 1417static DEVICE_ATTR(reg, S_IRUGO | S_IWUSR, sn9c102_show_reg, sn9c102_store_reg);
1406 sn9c102_show_reg, sn9c102_store_reg); 1418static DEVICE_ATTR(val, S_IRUGO | S_IWUSR, sn9c102_show_val, sn9c102_store_val);
1407static CLASS_DEVICE_ATTR(val, S_IRUGO | S_IWUSR, 1419static DEVICE_ATTR(i2c_reg, S_IRUGO | S_IWUSR,
1408 sn9c102_show_val, sn9c102_store_val); 1420 sn9c102_show_i2c_reg, sn9c102_store_i2c_reg);
1409static CLASS_DEVICE_ATTR(i2c_reg, S_IRUGO | S_IWUSR, 1421static DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR,
1410 sn9c102_show_i2c_reg, sn9c102_store_i2c_reg); 1422 sn9c102_show_i2c_val, sn9c102_store_i2c_val);
1411static CLASS_DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR, 1423static DEVICE_ATTR(green, S_IWUGO, NULL, sn9c102_store_green);
1412 sn9c102_show_i2c_val, sn9c102_store_i2c_val); 1424static DEVICE_ATTR(blue, S_IWUGO, NULL, sn9c102_store_blue);
1413static CLASS_DEVICE_ATTR(green, S_IWUGO, NULL, sn9c102_store_green); 1425static DEVICE_ATTR(red, S_IWUGO, NULL, sn9c102_store_red);
1414static CLASS_DEVICE_ATTR(blue, S_IWUGO, NULL, sn9c102_store_blue); 1426static DEVICE_ATTR(frame_header, S_IRUGO, sn9c102_show_frame_header, NULL);
1415static CLASS_DEVICE_ATTR(red, S_IWUGO, NULL, sn9c102_store_red);
1416static CLASS_DEVICE_ATTR(frame_header, S_IRUGO,
1417 sn9c102_show_frame_header, NULL);
1418 1427
1419 1428
1420static int sn9c102_create_sysfs(struct sn9c102_device* cam) 1429static int sn9c102_create_sysfs(struct sn9c102_device* cam)
1421{ 1430{
1422 struct class_device *classdev = &(cam->v4ldev->class_dev); 1431 struct device *classdev = &(cam->v4ldev->class_dev);
1423 int err = 0; 1432 int err = 0;
1424 1433
1425 if ((err = class_device_create_file(classdev, &class_device_attr_reg))) 1434 if ((err = device_create_file(classdev, &dev_attr_reg)))
1426 goto err_out; 1435 goto err_out;
1427 if ((err = class_device_create_file(classdev, &class_device_attr_val))) 1436 if ((err = device_create_file(classdev, &dev_attr_val)))
1428 goto err_reg; 1437 goto err_reg;
1429 if ((err = class_device_create_file(classdev, 1438 if ((err = device_create_file(classdev, &dev_attr_frame_header)))
1430 &class_device_attr_frame_header)))
1431 goto err_val; 1439 goto err_val;
1432 1440
1433 if (cam->sensor.sysfs_ops) { 1441 if (cam->sensor.sysfs_ops) {
1434 if ((err = class_device_create_file(classdev, 1442 if ((err = device_create_file(classdev, &dev_attr_i2c_reg)))
1435 &class_device_attr_i2c_reg)))
1436 goto err_frame_header; 1443 goto err_frame_header;
1437 if ((err = class_device_create_file(classdev, 1444 if ((err = device_create_file(classdev, &dev_attr_i2c_val)))
1438 &class_device_attr_i2c_val)))
1439 goto err_i2c_reg; 1445 goto err_i2c_reg;
1440 } 1446 }
1441 1447
1442 if (cam->bridge == BRIDGE_SN9C101 || cam->bridge == BRIDGE_SN9C102) { 1448 if (cam->bridge == BRIDGE_SN9C101 || cam->bridge == BRIDGE_SN9C102) {
1443 if ((err = class_device_create_file(classdev, 1449 if ((err = device_create_file(classdev, &dev_attr_green)))
1444 &class_device_attr_green)))
1445 goto err_i2c_val; 1450 goto err_i2c_val;
1446 } else { 1451 } else {
1447 if ((err = class_device_create_file(classdev, 1452 if ((err = device_create_file(classdev, &dev_attr_blue)))
1448 &class_device_attr_blue)))
1449 goto err_i2c_val; 1453 goto err_i2c_val;
1450 if ((err = class_device_create_file(classdev, 1454 if ((err = device_create_file(classdev, &dev_attr_red)))
1451 &class_device_attr_red)))
1452 goto err_blue; 1455 goto err_blue;
1453 } 1456 }
1454 1457
1455 return 0; 1458 return 0;
1456 1459
1457err_blue: 1460err_blue:
1458 class_device_remove_file(classdev, &class_device_attr_blue); 1461 device_remove_file(classdev, &dev_attr_blue);
1459err_i2c_val: 1462err_i2c_val:
1460 if (cam->sensor.sysfs_ops) 1463 if (cam->sensor.sysfs_ops)
1461 class_device_remove_file(classdev, &class_device_attr_i2c_val); 1464 device_remove_file(classdev, &dev_attr_i2c_val);
1462err_i2c_reg: 1465err_i2c_reg:
1463 if (cam->sensor.sysfs_ops) 1466 if (cam->sensor.sysfs_ops)
1464 class_device_remove_file(classdev, &class_device_attr_i2c_reg); 1467 device_remove_file(classdev, &dev_attr_i2c_reg);
1465err_frame_header: 1468err_frame_header:
1466 class_device_remove_file(classdev, &class_device_attr_frame_header); 1469 device_remove_file(classdev, &dev_attr_frame_header);
1467err_val: 1470err_val:
1468 class_device_remove_file(classdev, &class_device_attr_val); 1471 device_remove_file(classdev, &dev_attr_val);
1469err_reg: 1472err_reg:
1470 class_device_remove_file(classdev, &class_device_attr_reg); 1473 device_remove_file(classdev, &dev_attr_reg);
1471err_out: 1474err_out:
1472 return err; 1475 return err;
1473} 1476}
diff --git a/drivers/media/video/stv680.c b/drivers/media/video/stv680.c
index 4dc5bc714b95..9e009a7ab863 100644
--- a/drivers/media/video/stv680.c
+++ b/drivers/media/video/stv680.c
@@ -499,13 +499,14 @@ exit:
499 * sysfs 499 * sysfs
500 ***************************************************************************/ 500 ***************************************************************************/
501#define stv680_file(name, variable, field) \ 501#define stv680_file(name, variable, field) \
502static ssize_t show_##name(struct class_device *class_dev, char *buf) \ 502static ssize_t show_##name(struct device *class_dev, \
503 struct device_attribute *attr, char *buf) \
503{ \ 504{ \
504 struct video_device *vdev = to_video_device(class_dev); \ 505 struct video_device *vdev = to_video_device(class_dev); \
505 struct usb_stv *stv = video_get_drvdata(vdev); \ 506 struct usb_stv *stv = video_get_drvdata(vdev); \
506 return sprintf(buf, field, stv->variable); \ 507 return sprintf(buf, field, stv->variable); \
507} \ 508} \
508static CLASS_DEVICE_ATTR(name, S_IRUGO, show_##name, NULL); 509static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL);
509 510
510stv680_file(model, camera_name, "%s\n"); 511stv680_file(model, camera_name, "%s\n");
511stv680_file(in_use, user, "%d\n"); 512stv680_file(in_use, user, "%d\n");
@@ -520,53 +521,53 @@ static int stv680_create_sysfs_files(struct video_device *vdev)
520{ 521{
521 int rc; 522 int rc;
522 523
523 rc = video_device_create_file(vdev, &class_device_attr_model); 524 rc = video_device_create_file(vdev, &dev_attr_model);
524 if (rc) goto err; 525 if (rc) goto err;
525 rc = video_device_create_file(vdev, &class_device_attr_in_use); 526 rc = video_device_create_file(vdev, &dev_attr_in_use);
526 if (rc) goto err_model; 527 if (rc) goto err_model;
527 rc = video_device_create_file(vdev, &class_device_attr_streaming); 528 rc = video_device_create_file(vdev, &dev_attr_streaming);
528 if (rc) goto err_inuse; 529 if (rc) goto err_inuse;
529 rc = video_device_create_file(vdev, &class_device_attr_palette); 530 rc = video_device_create_file(vdev, &dev_attr_palette);
530 if (rc) goto err_stream; 531 if (rc) goto err_stream;
531 rc = video_device_create_file(vdev, &class_device_attr_frames_total); 532 rc = video_device_create_file(vdev, &dev_attr_frames_total);
532 if (rc) goto err_pal; 533 if (rc) goto err_pal;
533 rc = video_device_create_file(vdev, &class_device_attr_frames_read); 534 rc = video_device_create_file(vdev, &dev_attr_frames_read);
534 if (rc) goto err_framtot; 535 if (rc) goto err_framtot;
535 rc = video_device_create_file(vdev, &class_device_attr_packets_dropped); 536 rc = video_device_create_file(vdev, &dev_attr_packets_dropped);
536 if (rc) goto err_framread; 537 if (rc) goto err_framread;
537 rc = video_device_create_file(vdev, &class_device_attr_decoding_errors); 538 rc = video_device_create_file(vdev, &dev_attr_decoding_errors);
538 if (rc) goto err_dropped; 539 if (rc) goto err_dropped;
539 540
540 return 0; 541 return 0;
541 542
542err_dropped: 543err_dropped:
543 video_device_remove_file(vdev, &class_device_attr_packets_dropped); 544 video_device_remove_file(vdev, &dev_attr_packets_dropped);
544err_framread: 545err_framread:
545 video_device_remove_file(vdev, &class_device_attr_frames_read); 546 video_device_remove_file(vdev, &dev_attr_frames_read);
546err_framtot: 547err_framtot:
547 video_device_remove_file(vdev, &class_device_attr_frames_total); 548 video_device_remove_file(vdev, &dev_attr_frames_total);
548err_pal: 549err_pal:
549 video_device_remove_file(vdev, &class_device_attr_palette); 550 video_device_remove_file(vdev, &dev_attr_palette);
550err_stream: 551err_stream:
551 video_device_remove_file(vdev, &class_device_attr_streaming); 552 video_device_remove_file(vdev, &dev_attr_streaming);
552err_inuse: 553err_inuse:
553 video_device_remove_file(vdev, &class_device_attr_in_use); 554 video_device_remove_file(vdev, &dev_attr_in_use);
554err_model: 555err_model:
555 video_device_remove_file(vdev, &class_device_attr_model); 556 video_device_remove_file(vdev, &dev_attr_model);
556err: 557err:
557 return rc; 558 return rc;
558} 559}
559 560
560static void stv680_remove_sysfs_files(struct video_device *vdev) 561static void stv680_remove_sysfs_files(struct video_device *vdev)
561{ 562{
562 video_device_remove_file(vdev, &class_device_attr_model); 563 video_device_remove_file(vdev, &dev_attr_model);
563 video_device_remove_file(vdev, &class_device_attr_in_use); 564 video_device_remove_file(vdev, &dev_attr_in_use);
564 video_device_remove_file(vdev, &class_device_attr_streaming); 565 video_device_remove_file(vdev, &dev_attr_streaming);
565 video_device_remove_file(vdev, &class_device_attr_palette); 566 video_device_remove_file(vdev, &dev_attr_palette);
566 video_device_remove_file(vdev, &class_device_attr_frames_total); 567 video_device_remove_file(vdev, &dev_attr_frames_total);
567 video_device_remove_file(vdev, &class_device_attr_frames_read); 568 video_device_remove_file(vdev, &dev_attr_frames_read);
568 video_device_remove_file(vdev, &class_device_attr_packets_dropped); 569 video_device_remove_file(vdev, &dev_attr_packets_dropped);
569 video_device_remove_file(vdev, &class_device_attr_decoding_errors); 570 video_device_remove_file(vdev, &dev_attr_decoding_errors);
570} 571}
571 572
572/******************************************************************** 573/********************************************************************
diff --git a/drivers/media/video/tcm825x.c b/drivers/media/video/tcm825x.c
new file mode 100644
index 000000000000..41cd6a0b0485
--- /dev/null
+++ b/drivers/media/video/tcm825x.c
@@ -0,0 +1,928 @@
1/*
2 * drivers/media/video/tcm825x.c
3 *
4 * TCM825X camera sensor driver.
5 *
6 * Copyright (C) 2007 Nokia Corporation.
7 *
8 * Contact: Sakari Ailus <sakari.ailus@nokia.com>
9 *
10 * Based on code from David Cohen <david.cohen@indt.org.br>
11 *
12 * This driver was based on ov9640 sensor driver from MontaVista
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * version 2 as published by the Free Software Foundation.
17 *
18 * This program is distributed in the hope that it will be useful, but
19 * WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 * General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
26 * 02110-1301 USA
27 */
28
29#include <linux/i2c.h>
30#include <media/v4l2-int-device.h>
31
32#include "tcm825x.h"
33
34/*
35 * The sensor has two fps modes: the lower one just gives half the fps
36 * at the same xclk than the high one.
37 */
38#define MAX_FPS 30
39#define MIN_FPS 8
40#define MAX_HALF_FPS (MAX_FPS / 2)
41#define HIGH_FPS_MODE_LOWER_LIMIT 14
42#define DEFAULT_FPS MAX_HALF_FPS
43
44struct tcm825x_sensor {
45 const struct tcm825x_platform_data *platform_data;
46 struct v4l2_int_device *v4l2_int_device;
47 struct i2c_client *i2c_client;
48 struct v4l2_pix_format pix;
49 struct v4l2_fract timeperframe;
50};
51
52/* list of image formats supported by TCM825X sensor */
53const static struct v4l2_fmtdesc tcm825x_formats[] = {
54 {
55 .description = "YUYV (YUV 4:2:2), packed",
56 .pixelformat = V4L2_PIX_FMT_UYVY,
57 }, {
58 /* Note: V4L2 defines RGB565 as:
59 *
60 * Byte 0 Byte 1
61 * g2 g1 g0 r4 r3 r2 r1 r0 b4 b3 b2 b1 b0 g5 g4 g3
62 *
63 * We interpret RGB565 as:
64 *
65 * Byte 0 Byte 1
66 * g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3
67 */
68 .description = "RGB565, le",
69 .pixelformat = V4L2_PIX_FMT_RGB565,
70 },
71};
72
73#define TCM825X_NUM_CAPTURE_FORMATS ARRAY_SIZE(tcm825x_formats)
74
75/*
76 * TCM825X register configuration for all combinations of pixel format and
77 * image size
78 */
79const static struct tcm825x_reg subqcif = { 0x20, TCM825X_PICSIZ };
80const static struct tcm825x_reg qcif = { 0x18, TCM825X_PICSIZ };
81const static struct tcm825x_reg cif = { 0x14, TCM825X_PICSIZ };
82const static struct tcm825x_reg qqvga = { 0x0c, TCM825X_PICSIZ };
83const static struct tcm825x_reg qvga = { 0x04, TCM825X_PICSIZ };
84const static struct tcm825x_reg vga = { 0x00, TCM825X_PICSIZ };
85
86const static struct tcm825x_reg yuv422 = { 0x00, TCM825X_PICFMT };
87const static struct tcm825x_reg rgb565 = { 0x02, TCM825X_PICFMT };
88
89/* Our own specific controls */
90#define V4L2_CID_ALC V4L2_CID_PRIVATE_BASE
91#define V4L2_CID_H_EDGE_EN V4L2_CID_PRIVATE_BASE + 1
92#define V4L2_CID_V_EDGE_EN V4L2_CID_PRIVATE_BASE + 2
93#define V4L2_CID_LENS V4L2_CID_PRIVATE_BASE + 3
94#define V4L2_CID_MAX_EXPOSURE_TIME V4L2_CID_PRIVATE_BASE + 4
95#define V4L2_CID_LAST_PRIV V4L2_CID_MAX_EXPOSURE_TIME
96
97/* Video controls */
98static struct vcontrol {
99 struct v4l2_queryctrl qc;
100 u16 reg;
101 u16 start_bit;
102} video_control[] = {
103 {
104 {
105 .id = V4L2_CID_GAIN,
106 .type = V4L2_CTRL_TYPE_INTEGER,
107 .name = "Gain",
108 .minimum = 0,
109 .maximum = 63,
110 .step = 1,
111 },
112 .reg = TCM825X_AG,
113 .start_bit = 0,
114 },
115 {
116 {
117 .id = V4L2_CID_RED_BALANCE,
118 .type = V4L2_CTRL_TYPE_INTEGER,
119 .name = "Red Balance",
120 .minimum = 0,
121 .maximum = 255,
122 .step = 1,
123 },
124 .reg = TCM825X_MRG,
125 .start_bit = 0,
126 },
127 {
128 {
129 .id = V4L2_CID_BLUE_BALANCE,
130 .type = V4L2_CTRL_TYPE_INTEGER,
131 .name = "Blue Balance",
132 .minimum = 0,
133 .maximum = 255,
134 .step = 1,
135 },
136 .reg = TCM825X_MBG,
137 .start_bit = 0,
138 },
139 {
140 {
141 .id = V4L2_CID_AUTO_WHITE_BALANCE,
142 .type = V4L2_CTRL_TYPE_BOOLEAN,
143 .name = "Auto White Balance",
144 .minimum = 0,
145 .maximum = 1,
146 .step = 0,
147 },
148 .reg = TCM825X_AWBSW,
149 .start_bit = 7,
150 },
151 {
152 {
153 .id = V4L2_CID_EXPOSURE,
154 .type = V4L2_CTRL_TYPE_INTEGER,
155 .name = "Exposure Time",
156 .minimum = 0,
157 .maximum = 0x1fff,
158 .step = 1,
159 },
160 .reg = TCM825X_ESRSPD_U,
161 .start_bit = 0,
162 },
163 {
164 {
165 .id = V4L2_CID_HFLIP,
166 .type = V4L2_CTRL_TYPE_BOOLEAN,
167 .name = "Mirror Image",
168 .minimum = 0,
169 .maximum = 1,
170 .step = 0,
171 },
172 .reg = TCM825X_H_INV,
173 .start_bit = 6,
174 },
175 {
176 {
177 .id = V4L2_CID_VFLIP,
178 .type = V4L2_CTRL_TYPE_BOOLEAN,
179 .name = "Vertical Flip",
180 .minimum = 0,
181 .maximum = 1,
182 .step = 0,
183 },
184 .reg = TCM825X_V_INV,
185 .start_bit = 7,
186 },
187 /* Private controls */
188 {
189 {
190 .id = V4L2_CID_ALC,
191 .type = V4L2_CTRL_TYPE_BOOLEAN,
192 .name = "Auto Luminance Control",
193 .minimum = 0,
194 .maximum = 1,
195 .step = 0,
196 },
197 .reg = TCM825X_ALCSW,
198 .start_bit = 7,
199 },
200 {
201 {
202 .id = V4L2_CID_H_EDGE_EN,
203 .type = V4L2_CTRL_TYPE_INTEGER,
204 .name = "Horizontal Edge Enhancement",
205 .minimum = 0,
206 .maximum = 0xff,
207 .step = 1,
208 },
209 .reg = TCM825X_HDTG,
210 .start_bit = 0,
211 },
212 {
213 {
214 .id = V4L2_CID_V_EDGE_EN,
215 .type = V4L2_CTRL_TYPE_INTEGER,
216 .name = "Vertical Edge Enhancement",
217 .minimum = 0,
218 .maximum = 0xff,
219 .step = 1,
220 },
221 .reg = TCM825X_VDTG,
222 .start_bit = 0,
223 },
224 {
225 {
226 .id = V4L2_CID_LENS,
227 .type = V4L2_CTRL_TYPE_INTEGER,
228 .name = "Lens Shading Compensation",
229 .minimum = 0,
230 .maximum = 0x3f,
231 .step = 1,
232 },
233 .reg = TCM825X_LENS,
234 .start_bit = 0,
235 },
236 {
237 {
238 .id = V4L2_CID_MAX_EXPOSURE_TIME,
239 .type = V4L2_CTRL_TYPE_INTEGER,
240 .name = "Maximum Exposure Time",
241 .minimum = 0,
242 .maximum = 0x3,
243 .step = 1,
244 },
245 .reg = TCM825X_ESRLIM,
246 .start_bit = 5,
247 },
248};
249
250
251const static struct tcm825x_reg *tcm825x_siz_reg[NUM_IMAGE_SIZES] =
252{ &subqcif, &qqvga, &qcif, &qvga, &cif, &vga };
253
254const static struct tcm825x_reg *tcm825x_fmt_reg[NUM_PIXEL_FORMATS] =
255{ &yuv422, &rgb565 };
256
257/*
258 * Read a value from a register in an TCM825X sensor device. The value is
259 * returned in 'val'.
260 * Returns zero if successful, or non-zero otherwise.
261 */
262static int tcm825x_read_reg(struct i2c_client *client, int reg)
263{
264 int err;
265 struct i2c_msg msg[2];
266 u8 reg_buf, data_buf = 0;
267
268 if (!client->adapter)
269 return -ENODEV;
270
271 msg[0].addr = client->addr;
272 msg[0].flags = 0;
273 msg[0].len = 1;
274 msg[0].buf = &reg_buf;
275 msg[1].addr = client->addr;
276 msg[1].flags = I2C_M_RD;
277 msg[1].len = 1;
278 msg[1].buf = &data_buf;
279
280 reg_buf = reg;
281
282 err = i2c_transfer(client->adapter, msg, 2);
283 if (err < 0)
284 return err;
285 return data_buf;
286}
287
288/*
289 * Write a value to a register in an TCM825X sensor device.
290 * Returns zero if successful, or non-zero otherwise.
291 */
292static int tcm825x_write_reg(struct i2c_client *client, u8 reg, u8 val)
293{
294 int err;
295 struct i2c_msg msg[1];
296 unsigned char data[2];
297
298 if (!client->adapter)
299 return -ENODEV;
300
301 msg->addr = client->addr;
302 msg->flags = 0;
303 msg->len = 2;
304 msg->buf = data;
305 data[0] = reg;
306 data[1] = val;
307 err = i2c_transfer(client->adapter, msg, 1);
308 if (err >= 0)
309 return 0;
310 return err;
311}
312
313static int __tcm825x_write_reg_mask(struct i2c_client *client,
314 u8 reg, u8 val, u8 mask)
315{
316 int rc;
317
318 /* need to do read - modify - write */
319 rc = tcm825x_read_reg(client, reg);
320 if (rc < 0)
321 return rc;
322
323 rc &= (~mask); /* Clear the masked bits */
324 val &= mask; /* Enforce mask on value */
325 val |= rc;
326
327 /* write the new value to the register */
328 rc = tcm825x_write_reg(client, reg, val);
329 if (rc)
330 return rc;
331
332 return 0;
333}
334
335#define tcm825x_write_reg_mask(client, regmask, val) \
336 __tcm825x_write_reg_mask(client, TCM825X_ADDR((regmask)), val, \
337 TCM825X_MASK((regmask)))
338
339
340/*
341 * Initialize a list of TCM825X registers.
342 * The list of registers is terminated by the pair of values
343 * { TCM825X_REG_TERM, TCM825X_VAL_TERM }.
344 * Returns zero if successful, or non-zero otherwise.
345 */
346static int tcm825x_write_default_regs(struct i2c_client *client,
347 const struct tcm825x_reg *reglist)
348{
349 int err;
350 const struct tcm825x_reg *next = reglist;
351
352 while (!((next->reg == TCM825X_REG_TERM)
353 && (next->val == TCM825X_VAL_TERM))) {
354 err = tcm825x_write_reg(client, next->reg, next->val);
355 if (err) {
356 dev_err(&client->dev, "register writing failed\n");
357 return err;
358 }
359 next++;
360 }
361
362 return 0;
363}
364
365static struct vcontrol *find_vctrl(int id)
366{
367 int i;
368
369 if (id < V4L2_CID_BASE)
370 return NULL;
371
372 for (i = 0; i < ARRAY_SIZE(video_control); i++)
373 if (video_control[i].qc.id == id)
374 return &video_control[i];
375
376 return NULL;
377}
378
379/*
380 * Find the best match for a requested image capture size. The best match
381 * is chosen as the nearest match that has the same number or fewer pixels
382 * as the requested size, or the smallest image size if the requested size
383 * has fewer pixels than the smallest image.
384 */
385static enum image_size tcm825x_find_size(struct v4l2_int_device *s,
386 unsigned int width,
387 unsigned int height)
388{
389 enum image_size isize;
390 unsigned long pixels = width * height;
391 struct tcm825x_sensor *sensor = s->priv;
392
393 for (isize = subQCIF; isize < VGA; isize++) {
394 if (tcm825x_sizes[isize + 1].height
395 * tcm825x_sizes[isize + 1].width > pixels) {
396 dev_dbg(&sensor->i2c_client->dev, "size %d\n", isize);
397
398 return isize;
399 }
400 }
401
402 dev_dbg(&sensor->i2c_client->dev, "format default VGA\n");
403
404 return VGA;
405}
406
407/*
408 * Configure the TCM825X for current image size, pixel format, and
409 * frame period. fper is the frame period (in seconds) expressed as a
410 * fraction. Returns zero if successful, or non-zero otherwise. The
411 * actual frame period is returned in fper.
412 */
413static int tcm825x_configure(struct v4l2_int_device *s)
414{
415 struct tcm825x_sensor *sensor = s->priv;
416 struct v4l2_pix_format *pix = &sensor->pix;
417 enum image_size isize = tcm825x_find_size(s, pix->width, pix->height);
418 struct v4l2_fract *fper = &sensor->timeperframe;
419 enum pixel_format pfmt;
420 int err;
421 u32 tgt_fps;
422 u8 val;
423
424 /* common register initialization */
425 err = tcm825x_write_default_regs(
426 sensor->i2c_client, sensor->platform_data->default_regs());
427 if (err)
428 return err;
429
430 /* configure image size */
431 val = tcm825x_siz_reg[isize]->val;
432 dev_dbg(&sensor->i2c_client->dev,
433 "configuring image size %d\n", isize);
434 err = tcm825x_write_reg_mask(sensor->i2c_client,
435 tcm825x_siz_reg[isize]->reg, val);
436 if (err)
437 return err;
438
439 /* configure pixel format */
440 switch (pix->pixelformat) {
441 default:
442 case V4L2_PIX_FMT_RGB565:
443 pfmt = RGB565;
444 break;
445 case V4L2_PIX_FMT_UYVY:
446 pfmt = YUV422;
447 break;
448 }
449
450 dev_dbg(&sensor->i2c_client->dev,
451 "configuring pixel format %d\n", pfmt);
452 val = tcm825x_fmt_reg[pfmt]->val;
453
454 err = tcm825x_write_reg_mask(sensor->i2c_client,
455 tcm825x_fmt_reg[pfmt]->reg, val);
456 if (err)
457 return err;
458
459 /*
460 * For frame rate < 15, the FPS reg (addr 0x02, bit 7) must be
461 * set. Frame rate will be halved from the normal.
462 */
463 tgt_fps = fper->denominator / fper->numerator;
464 if (tgt_fps <= HIGH_FPS_MODE_LOWER_LIMIT) {
465 val = tcm825x_read_reg(sensor->i2c_client, 0x02);
466 val |= 0x80;
467 tcm825x_write_reg(sensor->i2c_client, 0x02, val);
468 }
469
470 return 0;
471}
472
473static int ioctl_queryctrl(struct v4l2_int_device *s,
474 struct v4l2_queryctrl *qc)
475{
476 struct vcontrol *control;
477
478 control = find_vctrl(qc->id);
479
480 if (control == NULL)
481 return -EINVAL;
482
483 *qc = control->qc;
484
485 return 0;
486}
487
488static int ioctl_g_ctrl(struct v4l2_int_device *s,
489 struct v4l2_control *vc)
490{
491 struct tcm825x_sensor *sensor = s->priv;
492 struct i2c_client *client = sensor->i2c_client;
493 int val, r;
494 struct vcontrol *lvc;
495
496 /* exposure time is special, spread accross 2 registers */
497 if (vc->id == V4L2_CID_EXPOSURE) {
498 int val_lower, val_upper;
499
500 val_upper = tcm825x_read_reg(client,
501 TCM825X_ADDR(TCM825X_ESRSPD_U));
502 if (val_upper < 0)
503 return val_upper;
504 val_lower = tcm825x_read_reg(client,
505 TCM825X_ADDR(TCM825X_ESRSPD_L));
506 if (val_lower < 0)
507 return val_lower;
508
509 vc->value = ((val_upper & 0x1f) << 8) | (val_lower);
510 return 0;
511 }
512
513 lvc = find_vctrl(vc->id);
514 if (lvc == NULL)
515 return -EINVAL;
516
517 r = tcm825x_read_reg(client, TCM825X_ADDR(lvc->reg));
518 if (r < 0)
519 return r;
520 val = r & TCM825X_MASK(lvc->reg);
521 val >>= lvc->start_bit;
522
523 if (val < 0)
524 return val;
525
526 vc->value = val;
527 return 0;
528}
529
530static int ioctl_s_ctrl(struct v4l2_int_device *s,
531 struct v4l2_control *vc)
532{
533 struct tcm825x_sensor *sensor = s->priv;
534 struct i2c_client *client = sensor->i2c_client;
535 struct vcontrol *lvc;
536 int val = vc->value;
537
538 /* exposure time is special, spread accross 2 registers */
539 if (vc->id == V4L2_CID_EXPOSURE) {
540 int val_lower, val_upper;
541 val_lower = val & TCM825X_MASK(TCM825X_ESRSPD_L);
542 val_upper = (val >> 8) & TCM825X_MASK(TCM825X_ESRSPD_U);
543
544 if (tcm825x_write_reg_mask(client,
545 TCM825X_ESRSPD_U, val_upper))
546 return -EIO;
547
548 if (tcm825x_write_reg_mask(client,
549 TCM825X_ESRSPD_L, val_lower))
550 return -EIO;
551
552 return 0;
553 }
554
555 lvc = find_vctrl(vc->id);
556 if (lvc == NULL)
557 return -EINVAL;
558
559 val = val << lvc->start_bit;
560 if (tcm825x_write_reg_mask(client, lvc->reg, val))
561 return -EIO;
562
563 return 0;
564}
565
566static int ioctl_enum_fmt_cap(struct v4l2_int_device *s,
567 struct v4l2_fmtdesc *fmt)
568{
569 int index = fmt->index;
570
571 switch (fmt->type) {
572 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
573 if (index >= TCM825X_NUM_CAPTURE_FORMATS)
574 return -EINVAL;
575 break;
576
577 default:
578 return -EINVAL;
579 }
580
581 fmt->flags = tcm825x_formats[index].flags;
582 strlcpy(fmt->description, tcm825x_formats[index].description,
583 sizeof(fmt->description));
584 fmt->pixelformat = tcm825x_formats[index].pixelformat;
585
586 return 0;
587}
588
589static int ioctl_try_fmt_cap(struct v4l2_int_device *s,
590 struct v4l2_format *f)
591{
592 struct tcm825x_sensor *sensor = s->priv;
593 enum image_size isize;
594 int ifmt;
595 struct v4l2_pix_format *pix = &f->fmt.pix;
596
597 isize = tcm825x_find_size(s, pix->width, pix->height);
598 dev_dbg(&sensor->i2c_client->dev, "isize = %d num_capture = %lu\n",
599 isize, (unsigned long)TCM825X_NUM_CAPTURE_FORMATS);
600
601 pix->width = tcm825x_sizes[isize].width;
602 pix->height = tcm825x_sizes[isize].height;
603
604 for (ifmt = 0; ifmt < TCM825X_NUM_CAPTURE_FORMATS; ifmt++)
605 if (pix->pixelformat == tcm825x_formats[ifmt].pixelformat)
606 break;
607
608 if (ifmt == TCM825X_NUM_CAPTURE_FORMATS)
609 ifmt = 0; /* Default = YUV 4:2:2 */
610
611 pix->pixelformat = tcm825x_formats[ifmt].pixelformat;
612 pix->field = V4L2_FIELD_NONE;
613 pix->bytesperline = pix->width * TCM825X_BYTES_PER_PIXEL;
614 pix->sizeimage = pix->bytesperline * pix->height;
615 pix->priv = 0;
616 dev_dbg(&sensor->i2c_client->dev, "format = 0x%08x\n",
617 pix->pixelformat);
618
619 switch (pix->pixelformat) {
620 case V4L2_PIX_FMT_UYVY:
621 default:
622 pix->colorspace = V4L2_COLORSPACE_JPEG;
623 break;
624 case V4L2_PIX_FMT_RGB565:
625 pix->colorspace = V4L2_COLORSPACE_SRGB;
626 break;
627 }
628
629 return 0;
630}
631
632static int ioctl_s_fmt_cap(struct v4l2_int_device *s,
633 struct v4l2_format *f)
634{
635 struct tcm825x_sensor *sensor = s->priv;
636 struct v4l2_pix_format *pix = &f->fmt.pix;
637 int rval;
638
639 rval = ioctl_try_fmt_cap(s, f);
640 if (rval)
641 return rval;
642
643 rval = tcm825x_configure(s);
644
645 sensor->pix = *pix;
646
647 return rval;
648}
649
650static int ioctl_g_fmt_cap(struct v4l2_int_device *s,
651 struct v4l2_format *f)
652{
653 struct tcm825x_sensor *sensor = s->priv;
654
655 f->fmt.pix = sensor->pix;
656
657 return 0;
658}
659
660static int ioctl_g_parm(struct v4l2_int_device *s,
661 struct v4l2_streamparm *a)
662{
663 struct tcm825x_sensor *sensor = s->priv;
664 struct v4l2_captureparm *cparm = &a->parm.capture;
665
666 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
667 return -EINVAL;
668
669 memset(a, 0, sizeof(*a));
670 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
671
672 cparm->capability = V4L2_CAP_TIMEPERFRAME;
673 cparm->timeperframe = sensor->timeperframe;
674
675 return 0;
676}
677
678static int ioctl_s_parm(struct v4l2_int_device *s,
679 struct v4l2_streamparm *a)
680{
681 struct tcm825x_sensor *sensor = s->priv;
682 struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe;
683 u32 tgt_fps; /* target frames per secound */
684 int rval;
685
686 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
687 return -EINVAL;
688
689 if ((timeperframe->numerator == 0)
690 || (timeperframe->denominator == 0)) {
691 timeperframe->denominator = DEFAULT_FPS;
692 timeperframe->numerator = 1;
693 }
694
695 tgt_fps = timeperframe->denominator / timeperframe->numerator;
696
697 if (tgt_fps > MAX_FPS) {
698 timeperframe->denominator = MAX_FPS;
699 timeperframe->numerator = 1;
700 } else if (tgt_fps < MIN_FPS) {
701 timeperframe->denominator = MIN_FPS;
702 timeperframe->numerator = 1;
703 }
704
705 sensor->timeperframe = *timeperframe;
706
707 rval = tcm825x_configure(s);
708
709 return rval;
710}
711
712static int ioctl_s_power(struct v4l2_int_device *s, int on)
713{
714 struct tcm825x_sensor *sensor = s->priv;
715
716 return sensor->platform_data->power_set(on);
717}
718
719/*
720 * Given the image capture format in pix, the nominal frame period in
721 * timeperframe, calculate the required xclk frequency.
722 *
723 * TCM825X input frequency characteristics are:
724 * Minimum 11.9 MHz, Typical 24.57 MHz and maximum 25/27 MHz
725 */
726
727static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
728{
729 struct tcm825x_sensor *sensor = s->priv;
730 struct v4l2_fract *timeperframe = &sensor->timeperframe;
731 u32 tgt_xclk; /* target xclk */
732 u32 tgt_fps; /* target frames per secound */
733 int rval;
734
735 rval = sensor->platform_data->ifparm(p);
736 if (rval)
737 return rval;
738
739 tgt_fps = timeperframe->denominator / timeperframe->numerator;
740
741 tgt_xclk = (tgt_fps <= HIGH_FPS_MODE_LOWER_LIMIT) ?
742 (2457 * tgt_fps) / MAX_HALF_FPS :
743 (2457 * tgt_fps) / MAX_FPS;
744 tgt_xclk *= 10000;
745
746 tgt_xclk = min(tgt_xclk, (u32)TCM825X_XCLK_MAX);
747 tgt_xclk = max(tgt_xclk, (u32)TCM825X_XCLK_MIN);
748
749 p->u.bt656.clock_curr = tgt_xclk;
750
751 return 0;
752}
753
754static int ioctl_g_needs_reset(struct v4l2_int_device *s, void *buf)
755{
756 struct tcm825x_sensor *sensor = s->priv;
757
758 return sensor->platform_data->needs_reset(s, buf, &sensor->pix);
759}
760
761static int ioctl_reset(struct v4l2_int_device *s)
762{
763 return -EBUSY;
764}
765
766static int ioctl_init(struct v4l2_int_device *s)
767{
768 return tcm825x_configure(s);
769}
770
771static int ioctl_dev_exit(struct v4l2_int_device *s)
772{
773 return 0;
774}
775
776static int ioctl_dev_init(struct v4l2_int_device *s)
777{
778 struct tcm825x_sensor *sensor = s->priv;
779 int r;
780
781 r = tcm825x_read_reg(sensor->i2c_client, 0x01);
782 if (r < 0)
783 return r;
784 if (r == 0) {
785 dev_err(&sensor->i2c_client->dev, "device not detected\n");
786 return -EIO;
787 }
788 return 0;
789}
790
791static struct v4l2_int_ioctl_desc tcm825x_ioctl_desc[] = {
792 { vidioc_int_dev_init_num,
793 (v4l2_int_ioctl_func *)ioctl_dev_init },
794 { vidioc_int_dev_exit_num,
795 (v4l2_int_ioctl_func *)ioctl_dev_exit },
796 { vidioc_int_s_power_num,
797 (v4l2_int_ioctl_func *)ioctl_s_power },
798 { vidioc_int_g_ifparm_num,
799 (v4l2_int_ioctl_func *)ioctl_g_ifparm },
800 { vidioc_int_g_needs_reset_num,
801 (v4l2_int_ioctl_func *)ioctl_g_needs_reset },
802 { vidioc_int_reset_num,
803 (v4l2_int_ioctl_func *)ioctl_reset },
804 { vidioc_int_init_num,
805 (v4l2_int_ioctl_func *)ioctl_init },
806 { vidioc_int_enum_fmt_cap_num,
807 (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap },
808 { vidioc_int_try_fmt_cap_num,
809 (v4l2_int_ioctl_func *)ioctl_try_fmt_cap },
810 { vidioc_int_g_fmt_cap_num,
811 (v4l2_int_ioctl_func *)ioctl_g_fmt_cap },
812 { vidioc_int_s_fmt_cap_num,
813 (v4l2_int_ioctl_func *)ioctl_s_fmt_cap },
814 { vidioc_int_g_parm_num,
815 (v4l2_int_ioctl_func *)ioctl_g_parm },
816 { vidioc_int_s_parm_num,
817 (v4l2_int_ioctl_func *)ioctl_s_parm },
818 { vidioc_int_queryctrl_num,
819 (v4l2_int_ioctl_func *)ioctl_queryctrl },
820 { vidioc_int_g_ctrl_num,
821 (v4l2_int_ioctl_func *)ioctl_g_ctrl },
822 { vidioc_int_s_ctrl_num,
823 (v4l2_int_ioctl_func *)ioctl_s_ctrl },
824};
825
826static struct v4l2_int_slave tcm825x_slave = {
827 .ioctls = tcm825x_ioctl_desc,
828 .num_ioctls = ARRAY_SIZE(tcm825x_ioctl_desc),
829};
830
831static struct tcm825x_sensor tcm825x;
832
833static struct v4l2_int_device tcm825x_int_device = {
834 .module = THIS_MODULE,
835 .name = TCM825X_NAME,
836 .priv = &tcm825x,
837 .type = v4l2_int_type_slave,
838 .u = {
839 .slave = &tcm825x_slave,
840 },
841};
842
843static int tcm825x_probe(struct i2c_client *client)
844{
845 struct tcm825x_sensor *sensor = &tcm825x;
846 int rval;
847
848 if (i2c_get_clientdata(client))
849 return -EBUSY;
850
851 sensor->platform_data = client->dev.platform_data;
852
853 if (sensor->platform_data == NULL
854 && !sensor->platform_data->is_okay())
855 return -ENODEV;
856
857 sensor->v4l2_int_device = &tcm825x_int_device;
858
859 sensor->i2c_client = client;
860 i2c_set_clientdata(client, sensor);
861
862 /* Make the default capture format QVGA RGB565 */
863 sensor->pix.width = tcm825x_sizes[QVGA].width;
864 sensor->pix.height = tcm825x_sizes[QVGA].height;
865 sensor->pix.pixelformat = V4L2_PIX_FMT_RGB565;
866
867 rval = v4l2_int_device_register(sensor->v4l2_int_device);
868 if (rval)
869 i2c_set_clientdata(client, NULL);
870
871 return rval;
872}
873
874static int __exit tcm825x_remove(struct i2c_client *client)
875{
876 struct tcm825x_sensor *sensor = i2c_get_clientdata(client);
877
878 if (!client->adapter)
879 return -ENODEV; /* our client isn't attached */
880
881 v4l2_int_device_unregister(sensor->v4l2_int_device);
882 i2c_set_clientdata(client, NULL);
883
884 return 0;
885}
886
887static struct i2c_driver tcm825x_i2c_driver = {
888 .driver = {
889 .name = TCM825X_NAME,
890 },
891 .probe = tcm825x_probe,
892 .remove = __exit_p(tcm825x_remove),
893};
894
895static struct tcm825x_sensor tcm825x = {
896 .timeperframe = {
897 .numerator = 1,
898 .denominator = DEFAULT_FPS,
899 },
900};
901
902static int __init tcm825x_init(void)
903{
904 int rval;
905
906 rval = i2c_add_driver(&tcm825x_i2c_driver);
907 if (rval)
908 printk(KERN_INFO "%s: failed registering " TCM825X_NAME "\n",
909 __FUNCTION__);
910
911 return rval;
912}
913
914static void __exit tcm825x_exit(void)
915{
916 i2c_del_driver(&tcm825x_i2c_driver);
917}
918
919/*
920 * FIXME: Menelaus isn't ready (?) at module_init stage, so use
921 * late_initcall for now.
922 */
923late_initcall(tcm825x_init);
924module_exit(tcm825x_exit);
925
926MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>");
927MODULE_DESCRIPTION("TCM825x camera sensor driver");
928MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/tcm825x.h b/drivers/media/video/tcm825x.h
new file mode 100644
index 000000000000..966765b66b3a
--- /dev/null
+++ b/drivers/media/video/tcm825x.h
@@ -0,0 +1,199 @@
1/*
2 * drivers/media/video/tcm825x.h
3 *
4 * Register definitions for the TCM825X CameraChip.
5 *
6 * Author: David Cohen (david.cohen@indt.org.br)
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 *
12 * This file was based on ov9640.h from MontaVista
13 */
14
15#ifndef TCM825X_H
16#define TCM825X_H
17
18#include <linux/videodev2.h>
19
20#include <media/v4l2-int-device.h>
21
22#define TCM825X_NAME "tcm825x"
23
24#define TCM825X_MASK(x) x & 0x00ff
25#define TCM825X_ADDR(x) (x & 0xff00) >> 8
26
27/* The TCM825X I2C sensor chip has a fixed slave address of 0x3d. */
28#define TCM825X_I2C_ADDR 0x3d
29
30/*
31 * define register offsets for the TCM825X sensor chip
32 * OFFSET(8 bits) + MASK(8 bits)
33 * MASK bit 4 and 3 are used when the register uses more than one address
34 */
35#define TCM825X_FPS 0x0280
36#define TCM825X_ACF 0x0240
37#define TCM825X_DOUTBUF 0x020C
38#define TCM825X_DCLKP 0x0202
39#define TCM825X_ACFDET 0x0201
40#define TCM825X_DOUTSW 0x0380
41#define TCM825X_DATAHZ 0x0340
42#define TCM825X_PICSIZ 0x033c
43#define TCM825X_PICFMT 0x0302
44#define TCM825X_V_INV 0x0480
45#define TCM825X_H_INV 0x0440
46#define TCM825X_ESRLSW 0x0430
47#define TCM825X_V_LENGTH 0x040F
48#define TCM825X_ALCSW 0x0580
49#define TCM825X_ESRLIM 0x0560
50#define TCM825X_ESRSPD_U 0x051F
51#define TCM825X_ESRSPD_L 0x06FF
52#define TCM825X_AG 0x07FF
53#define TCM825X_ESRSPD2 0x06FF
54#define TCM825X_ALCMODE 0x0830
55#define TCM825X_ALCH 0x080F
56#define TCM825X_ALCL 0x09FF
57#define TCM825X_AWBSW 0x0A80
58#define TCM825X_MRG 0x0BFF
59#define TCM825X_MBG 0x0CFF
60#define TCM825X_GAMSW 0x0D80
61#define TCM825X_HDTG 0x0EFF
62#define TCM825X_VDTG 0x0FFF
63#define TCM825X_HDTCORE 0x10F0
64#define TCM825X_VDTCORE 0x100F
65#define TCM825X_CONT 0x11FF
66#define TCM825X_BRIGHT 0x12FF
67#define TCM825X_VHUE 0x137F
68#define TCM825X_UHUE 0x147F
69#define TCM825X_VGAIN 0x153F
70#define TCM825X_UGAIN 0x163F
71#define TCM825X_UVCORE 0x170F
72#define TCM825X_SATU 0x187F
73#define TCM825X_MHMODE 0x1980
74#define TCM825X_MHLPFSEL 0x1940
75#define TCM825X_YMODE 0x1930
76#define TCM825X_MIXHG 0x1907
77#define TCM825X_LENS 0x1A3F
78#define TCM825X_AGLIM 0x1BE0
79#define TCM825X_LENSRPOL 0x1B10
80#define TCM825X_LENSRGAIN 0x1B0F
81#define TCM825X_ES100S 0x1CFF
82#define TCM825X_ES120S 0x1DFF
83#define TCM825X_DMASK 0x1EC0
84#define TCM825X_CODESW 0x1E20
85#define TCM825X_CODESEL 0x1E10
86#define TCM825X_TESPIC 0x1E04
87#define TCM825X_PICSEL 0x1E03
88#define TCM825X_HNUM 0x20FF
89#define TCM825X_VOUTPH 0x287F
90#define TCM825X_ESROUT 0x327F
91#define TCM825X_ESROUT2 0x33FF
92#define TCM825X_AGOUT 0x34FF
93#define TCM825X_DGOUT 0x353F
94#define TCM825X_AGSLOW1 0x39C0
95#define TCM825X_FLLSMODE 0x3930
96#define TCM825X_FLLSLIM 0x390F
97#define TCM825X_DETSEL 0x3AF0
98#define TCM825X_ACDETNC 0x3A0F
99#define TCM825X_AGSLOW2 0x3BC0
100#define TCM825X_DG 0x3B3F
101#define TCM825X_REJHLEV 0x3CFF
102#define TCM825X_ALCLOCK 0x3D80
103#define TCM825X_FPSLNKSW 0x3D40
104#define TCM825X_ALCSPD 0x3D30
105#define TCM825X_REJH 0x3D03
106#define TCM825X_SHESRSW 0x3E80
107#define TCM825X_ESLIMSEL 0x3E40
108#define TCM825X_SHESRSPD 0x3E30
109#define TCM825X_ELSTEP 0x3E0C
110#define TCM825X_ELSTART 0x3E03
111#define TCM825X_AGMIN 0x3FFF
112#define TCM825X_PREGRG 0x423F
113#define TCM825X_PREGBG 0x433F
114#define TCM825X_PRERG 0x443F
115#define TCM825X_PREBG 0x453F
116#define TCM825X_MSKBR 0x477F
117#define TCM825X_MSKGR 0x487F
118#define TCM825X_MSKRB 0x497F
119#define TCM825X_MSKGB 0x4A7F
120#define TCM825X_MSKRG 0x4B7F
121#define TCM825X_MSKBG 0x4C7F
122#define TCM825X_HDTCSW 0x4D80
123#define TCM825X_VDTCSW 0x4D40
124#define TCM825X_DTCYL 0x4D3F
125#define TCM825X_HDTPSW 0x4E80
126#define TCM825X_VDTPSW 0x4E40
127#define TCM825X_DTCGAIN 0x4E3F
128#define TCM825X_DTLLIMSW 0x4F10
129#define TCM825X_DTLYLIM 0x4F0F
130#define TCM825X_YLCUTLMSK 0x5080
131#define TCM825X_YLCUTL 0x503F
132#define TCM825X_YLCUTHMSK 0x5180
133#define TCM825X_YLCUTH 0x513F
134#define TCM825X_UVSKNC 0x527F
135#define TCM825X_UVLJ 0x537F
136#define TCM825X_WBGMIN 0x54FF
137#define TCM825X_WBGMAX 0x55FF
138#define TCM825X_WBSPDUP 0x5603
139#define TCM825X_ALLAREA 0x5820
140#define TCM825X_WBLOCK 0x5810
141#define TCM825X_WB2SP 0x580F
142#define TCM825X_KIZUSW 0x5920
143#define TCM825X_PBRSW 0x5910
144#define TCM825X_ABCSW 0x5903
145#define TCM825X_PBDLV 0x5AFF
146#define TCM825X_PBC1LV 0x5BFF
147
148#define TCM825X_NUM_REGS (TCM825X_ADDR(TCM825X_PBC1LV) + 1)
149
150#define TCM825X_BYTES_PER_PIXEL 2
151
152#define TCM825X_REG_TERM 0xff /* terminating list entry for reg */
153#define TCM825X_VAL_TERM 0xff /* terminating list entry for val */
154
155/* define a structure for tcm825x register initialization values */
156struct tcm825x_reg {
157 u8 val;
158 u16 reg;
159};
160
161enum image_size { subQCIF = 0, QQVGA, QCIF, QVGA, CIF, VGA };
162enum pixel_format { YUV422 = 0, RGB565 };
163#define NUM_IMAGE_SIZES 6
164#define NUM_PIXEL_FORMATS 2
165
166#define TCM825X_XCLK_MIN 11900000
167#define TCM825X_XCLK_MAX 25000000
168
169struct capture_size {
170 unsigned long width;
171 unsigned long height;
172};
173
174struct tcm825x_platform_data {
175 /* Is the sensor usable? Doesn't yet mean it's there, but you
176 * can try! */
177 int (*is_okay)(void);
178 /* Set power state, zero is off, non-zero is on. */
179 int (*power_set)(int power);
180 /* Default registers written after power-on or reset. */
181 const struct tcm825x_reg *(*default_regs)(void);
182 int (*needs_reset)(struct v4l2_int_device *s, void *buf,
183 struct v4l2_pix_format *fmt);
184 int (*ifparm)(struct v4l2_ifparm *p);
185};
186
187/* Array of image sizes supported by TCM825X. These must be ordered from
188 * smallest image size to largest.
189 */
190const static struct capture_size tcm825x_sizes[] = {
191 { 128, 96 }, /* subQCIF */
192 { 160, 120 }, /* QQVGA */
193 { 176, 144 }, /* QCIF */
194 { 320, 240 }, /* QVGA */
195 { 352, 288 }, /* CIF */
196 { 640, 480 }, /* VGA */
197};
198
199#endif /* ifndef TCM825X_H */
diff --git a/drivers/media/video/tda8290.c b/drivers/media/video/tda8290.c
index 59cff5a3c59e..0e5cf459d3ed 100644
--- a/drivers/media/video/tda8290.c
+++ b/drivers/media/video/tda8290.c
@@ -16,21 +16,37 @@
16 You should have received a copy of the GNU General Public License 16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software 17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 This "tda8290" module was split apart from the original "tuner" module.
19*/ 21*/
20 22
21#include <linux/i2c.h> 23#include <linux/i2c.h>
22#include <linux/videodev.h>
23#include <linux/delay.h> 24#include <linux/delay.h>
24#include "tuner-driver.h" 25#include <linux/videodev.h>
26#include "tuner-i2c.h"
27#include "tda8290.h"
28
29static int debug = 0;
30module_param(debug, int, 0644);
31MODULE_PARM_DESC(debug, "enable verbose debug messages");
32
33#define PREFIX "tda8290 "
25 34
26/* ---------------------------------------------------------------------- */ 35/* ---------------------------------------------------------------------- */
27 36
28struct tda8290_priv { 37struct tda8290_priv {
38 struct tuner_i2c_props i2c_props;
39
29 unsigned char tda8290_easy_mode; 40 unsigned char tda8290_easy_mode;
30 unsigned char tda827x_lpsel; 41 unsigned char tda827x_lpsel;
31 unsigned char tda827x_addr; 42 unsigned char tda827x_addr;
32 unsigned char tda827x_ver; 43 unsigned char tda827x_ver;
33 unsigned int sgIF; 44 unsigned int sgIF;
45
46 u32 frequency;
47
48 unsigned int *lna_cfg;
49 int (*tuner_callback) (void *dev, int command,int arg);
34}; 50};
35 51
36/* ---------------------------------------------------------------------- */ 52/* ---------------------------------------------------------------------- */
@@ -79,20 +95,21 @@ static struct tda827x_data tda827x_analog[] = {
79 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} /* End */ 95 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} /* End */
80}; 96};
81 97
82static void tda827x_tune(struct i2c_client *c, u16 ifc, unsigned int freq) 98static void tda827x_set_analog_params(struct dvb_frontend *fe,
99 struct analog_parameters *params)
83{ 100{
84 unsigned char tuner_reg[8]; 101 unsigned char tuner_reg[8];
85 unsigned char reg2[2]; 102 unsigned char reg2[2];
86 u32 N; 103 u32 N;
87 int i; 104 int i;
88 struct tuner *t = i2c_get_clientdata(c); 105 struct tda8290_priv *priv = fe->tuner_priv;
89 struct tda8290_priv *priv = t->priv;
90 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags = 0}; 106 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags = 0};
107 unsigned int freq = params->frequency;
91 108
92 if (t->mode == V4L2_TUNER_RADIO) 109 if (params->mode == V4L2_TUNER_RADIO)
93 freq = freq / 1000; 110 freq = freq / 1000;
94 111
95 N = freq + ifc; 112 N = freq + priv->sgIF;
96 i = 0; 113 i = 0;
97 while (tda827x_analog[i].lomax < N) { 114 while (tda827x_analog[i].lomax < N) {
98 if(tda827x_analog[i + 1].lomax == 0) 115 if(tda827x_analog[i + 1].lomax == 0)
@@ -114,54 +131,53 @@ static void tda827x_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
114 131
115 msg.buf = tuner_reg; 132 msg.buf = tuner_reg;
116 msg.len = 8; 133 msg.len = 8;
117 i2c_transfer(c->adapter, &msg, 1); 134 i2c_transfer(priv->i2c_props.adap, &msg, 1);
118 135
119 msg.buf= reg2; 136 msg.buf= reg2;
120 msg.len = 2; 137 msg.len = 2;
121 reg2[0] = 0x80; 138 reg2[0] = 0x80;
122 reg2[1] = 0; 139 reg2[1] = 0;
123 i2c_transfer(c->adapter, &msg, 1); 140 i2c_transfer(priv->i2c_props.adap, &msg, 1);
124 141
125 reg2[0] = 0x60; 142 reg2[0] = 0x60;
126 reg2[1] = 0xbf; 143 reg2[1] = 0xbf;
127 i2c_transfer(c->adapter, &msg, 1); 144 i2c_transfer(priv->i2c_props.adap, &msg, 1);
128 145
129 reg2[0] = 0x30; 146 reg2[0] = 0x30;
130 reg2[1] = tuner_reg[4] + 0x80; 147 reg2[1] = tuner_reg[4] + 0x80;
131 i2c_transfer(c->adapter, &msg, 1); 148 i2c_transfer(priv->i2c_props.adap, &msg, 1);
132 149
133 msleep(1); 150 msleep(1);
134 reg2[0] = 0x30; 151 reg2[0] = 0x30;
135 reg2[1] = tuner_reg[4] + 4; 152 reg2[1] = tuner_reg[4] + 4;
136 i2c_transfer(c->adapter, &msg, 1); 153 i2c_transfer(priv->i2c_props.adap, &msg, 1);
137 154
138 msleep(1); 155 msleep(1);
139 reg2[0] = 0x30; 156 reg2[0] = 0x30;
140 reg2[1] = tuner_reg[4]; 157 reg2[1] = tuner_reg[4];
141 i2c_transfer(c->adapter, &msg, 1); 158 i2c_transfer(priv->i2c_props.adap, &msg, 1);
142 159
143 msleep(550); 160 msleep(550);
144 reg2[0] = 0x30; 161 reg2[0] = 0x30;
145 reg2[1] = (tuner_reg[4] & 0xfc) + tda827x_analog[i].cp ; 162 reg2[1] = (tuner_reg[4] & 0xfc) + tda827x_analog[i].cp ;
146 i2c_transfer(c->adapter, &msg, 1); 163 i2c_transfer(priv->i2c_props.adap, &msg, 1);
147 164
148 reg2[0] = 0x60; 165 reg2[0] = 0x60;
149 reg2[1] = 0x3f; 166 reg2[1] = 0x3f;
150 i2c_transfer(c->adapter, &msg, 1); 167 i2c_transfer(priv->i2c_props.adap, &msg, 1);
151 168
152 reg2[0] = 0x80; 169 reg2[0] = 0x80;
153 reg2[1] = 0x08; // Vsync en 170 reg2[1] = 0x08; // Vsync en
154 i2c_transfer(c->adapter, &msg, 1); 171 i2c_transfer(priv->i2c_props.adap, &msg, 1);
155} 172}
156 173
157static void tda827x_agcf(struct i2c_client *c) 174static void tda827x_agcf(struct dvb_frontend *fe)
158{ 175{
159 struct tuner *t = i2c_get_clientdata(c); 176 struct tda8290_priv *priv = fe->tuner_priv;
160 struct tda8290_priv *priv = t->priv;
161 unsigned char data[] = {0x80, 0x0c}; 177 unsigned char data[] = {0x80, 0x0c};
162 struct i2c_msg msg = {.addr = priv->tda827x_addr, .buf = data, 178 struct i2c_msg msg = {.addr = priv->tda827x_addr, .buf = data,
163 .flags = 0, .len = 2}; 179 .flags = 0, .len = 2};
164 i2c_transfer(c->adapter, &msg, 1); 180 i2c_transfer(priv->i2c_props.adap, &msg, 1);
165} 181}
166 182
167/* ---------------------------------------------------------------------- */ 183/* ---------------------------------------------------------------------- */
@@ -204,58 +220,64 @@ static struct tda827xa_data tda827xa_analog[] = {
204 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0} /* End */ 220 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0} /* End */
205}; 221};
206 222
207static void tda827xa_lna_gain(struct i2c_client *c, int high) 223static void tda827xa_lna_gain(struct dvb_frontend *fe, int high,
224 struct analog_parameters *params)
208{ 225{
209 struct tuner *t = i2c_get_clientdata(c); 226 struct tda8290_priv *priv = fe->tuner_priv;
210 unsigned char buf[] = {0x22, 0x01}; 227 unsigned char buf[] = {0x22, 0x01};
211 int arg; 228 int arg;
212 struct i2c_msg msg = {.addr = c->addr, .flags = 0, .buf = buf, .len = sizeof(buf)}; 229 struct i2c_msg msg = {.addr = priv->i2c_props.addr, .flags = 0, .buf = buf, .len = sizeof(buf)};
213 if (t->config) { 230
231 if ((priv->lna_cfg == NULL) || (priv->tuner_callback == NULL))
232 return;
233
234 if (*priv->lna_cfg) {
214 if (high) 235 if (high)
215 tuner_dbg("setting LNA to high gain\n"); 236 tuner_dbg("setting LNA to high gain\n");
216 else 237 else
217 tuner_dbg("setting LNA to low gain\n"); 238 tuner_dbg("setting LNA to low gain\n");
218 } 239 }
219 switch (t->config) { 240 switch (*priv->lna_cfg) {
220 case 0: /* no LNA */ 241 case 0: /* no LNA */
221 break; 242 break;
222 case 1: /* switch is GPIO 0 of tda8290 */ 243 case 1: /* switch is GPIO 0 of tda8290 */
223 case 2: 244 case 2:
224 /* turn Vsync on */ 245 /* turn Vsync on */
225 if (t->std & V4L2_STD_MN) 246 if (params->std & V4L2_STD_MN)
226 arg = 1; 247 arg = 1;
227 else 248 else
228 arg = 0; 249 arg = 0;
229 if (t->tuner_callback) 250 if (priv->tuner_callback)
230 t->tuner_callback(c->adapter->algo_data, 1, arg); 251 priv->tuner_callback(priv->i2c_props.adap->algo_data, 1, arg);
231 buf[1] = high ? 0 : 1; 252 buf[1] = high ? 0 : 1;
232 if (t->config == 2) 253 if (*priv->lna_cfg == 2)
233 buf[1] = high ? 1 : 0; 254 buf[1] = high ? 1 : 0;
234 i2c_transfer(c->adapter, &msg, 1); 255 i2c_transfer(priv->i2c_props.adap, &msg, 1);
235 break; 256 break;
236 case 3: /* switch with GPIO of saa713x */ 257 case 3: /* switch with GPIO of saa713x */
237 if (t->tuner_callback) 258 if (priv->tuner_callback)
238 t->tuner_callback(c->adapter->algo_data, 0, high); 259 priv->tuner_callback(priv->i2c_props.adap->algo_data, 0, high);
239 break; 260 break;
240 } 261 }
241} 262}
242 263
243static void tda827xa_tune(struct i2c_client *c, u16 ifc, unsigned int freq) 264static void tda827xa_set_analog_params(struct dvb_frontend *fe,
265 struct analog_parameters *params)
244{ 266{
245 unsigned char tuner_reg[11]; 267 unsigned char tuner_reg[11];
246 u32 N; 268 u32 N;
247 int i; 269 int i;
248 struct tuner *t = i2c_get_clientdata(c); 270 struct tda8290_priv *priv = fe->tuner_priv;
249 struct tda8290_priv *priv = t->priv;
250 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags = 0, .buf = tuner_reg}; 271 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags = 0, .buf = tuner_reg};
272 unsigned int freq = params->frequency;
251 273
252 tda827xa_lna_gain( c, 1); 274 tda827xa_lna_gain(fe, 1, params);
253 msleep(10); 275 msleep(10);
254 276
255 if (t->mode == V4L2_TUNER_RADIO) 277 if (params->mode == V4L2_TUNER_RADIO)
256 freq = freq / 1000; 278 freq = freq / 1000;
257 279
258 N = freq + ifc; 280 N = freq + priv->sgIF;
259 i = 0; 281 i = 0;
260 while (tda827xa_analog[i].lomax < N) { 282 while (tda827xa_analog[i].lomax < N) {
261 if(tda827xa_analog[i + 1].lomax == 0) 283 if(tda827xa_analog[i + 1].lomax == 0)
@@ -278,7 +300,7 @@ static void tda827xa_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
278 tuner_reg[9] = 0x20; 300 tuner_reg[9] = 0x20;
279 tuner_reg[10] = 0x00; 301 tuner_reg[10] = 0x00;
280 msg.len = 11; 302 msg.len = 11;
281 i2c_transfer(c->adapter, &msg, 1); 303 i2c_transfer(priv->i2c_props.adap, &msg, 1);
282 304
283 tuner_reg[0] = 0x90; 305 tuner_reg[0] = 0x90;
284 tuner_reg[1] = 0xff; 306 tuner_reg[1] = 0xff;
@@ -286,82 +308,131 @@ static void tda827xa_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
286 tuner_reg[3] = 0; 308 tuner_reg[3] = 0;
287 tuner_reg[4] = 0x99 + (priv->tda827x_lpsel << 1); 309 tuner_reg[4] = 0x99 + (priv->tda827x_lpsel << 1);
288 msg.len = 5; 310 msg.len = 5;
289 i2c_transfer(c->adapter, &msg, 1); 311 i2c_transfer(priv->i2c_props.adap, &msg, 1);
290 312
291 tuner_reg[0] = 0xa0; 313 tuner_reg[0] = 0xa0;
292 tuner_reg[1] = 0xc0; 314 tuner_reg[1] = 0xc0;
293 msg.len = 2; 315 msg.len = 2;
294 i2c_transfer(c->adapter, &msg, 1); 316 i2c_transfer(priv->i2c_props.adap, &msg, 1);
295 317
296 tuner_reg[0] = 0x30; 318 tuner_reg[0] = 0x30;
297 tuner_reg[1] = 0x10 + tda827xa_analog[i].scr; 319 tuner_reg[1] = 0x10 + tda827xa_analog[i].scr;
298 i2c_transfer(c->adapter, &msg, 1); 320 i2c_transfer(priv->i2c_props.adap, &msg, 1);
299 321
300 msg.flags = I2C_M_RD; 322 msg.flags = I2C_M_RD;
301 i2c_transfer(c->adapter, &msg, 1); 323 i2c_transfer(priv->i2c_props.adap, &msg, 1);
302 msg.flags = 0; 324 msg.flags = 0;
303 tuner_reg[1] >>= 4; 325 tuner_reg[1] >>= 4;
304 tuner_dbg("AGC2 gain is: %d\n", tuner_reg[1]); 326 tuner_dbg("AGC2 gain is: %d\n", tuner_reg[1]);
305 if (tuner_reg[1] < 1) 327 if (tuner_reg[1] < 1)
306 tda827xa_lna_gain( c, 0); 328 tda827xa_lna_gain(fe, 0, params);
307 329
308 msleep(100); 330 msleep(100);
309 tuner_reg[0] = 0x60; 331 tuner_reg[0] = 0x60;
310 tuner_reg[1] = 0x3c; 332 tuner_reg[1] = 0x3c;
311 i2c_transfer(c->adapter, &msg, 1); 333 i2c_transfer(priv->i2c_props.adap, &msg, 1);
312 334
313 msleep(163); 335 msleep(163);
314 tuner_reg[0] = 0x50; 336 tuner_reg[0] = 0x50;
315 tuner_reg[1] = 0x8f + (tda827xa_analog[i].gc3 << 4); 337 tuner_reg[1] = 0x8f + (tda827xa_analog[i].gc3 << 4);
316 i2c_transfer(c->adapter, &msg, 1); 338 i2c_transfer(priv->i2c_props.adap, &msg, 1);
317 339
318 tuner_reg[0] = 0x80; 340 tuner_reg[0] = 0x80;
319 tuner_reg[1] = 0x28; 341 tuner_reg[1] = 0x28;
320 i2c_transfer(c->adapter, &msg, 1); 342 i2c_transfer(priv->i2c_props.adap, &msg, 1);
321 343
322 tuner_reg[0] = 0xb0; 344 tuner_reg[0] = 0xb0;
323 tuner_reg[1] = 0x01; 345 tuner_reg[1] = 0x01;
324 i2c_transfer(c->adapter, &msg, 1); 346 i2c_transfer(priv->i2c_props.adap, &msg, 1);
325 347
326 tuner_reg[0] = 0xc0; 348 tuner_reg[0] = 0xc0;
327 tuner_reg[1] = 0x19 + (priv->tda827x_lpsel << 1); 349 tuner_reg[1] = 0x19 + (priv->tda827x_lpsel << 1);
328 i2c_transfer(c->adapter, &msg, 1); 350 i2c_transfer(priv->i2c_props.adap, &msg, 1);
329} 351}
330 352
331static void tda827xa_agcf(struct i2c_client *c) 353static void tda827xa_agcf(struct dvb_frontend *fe)
332{ 354{
333 struct tuner *t = i2c_get_clientdata(c); 355 struct tda8290_priv *priv = fe->tuner_priv;
334 struct tda8290_priv *priv = t->priv;
335 unsigned char data[] = {0x80, 0x2c}; 356 unsigned char data[] = {0x80, 0x2c};
336 struct i2c_msg msg = {.addr = priv->tda827x_addr, .buf = data, 357 struct i2c_msg msg = {.addr = priv->tda827x_addr, .buf = data,
337 .flags = 0, .len = 2}; 358 .flags = 0, .len = 2};
338 i2c_transfer(c->adapter, &msg, 1); 359 i2c_transfer(priv->i2c_props.adap, &msg, 1);
339} 360}
340 361
341/*---------------------------------------------------------------------*/ 362/*---------------------------------------------------------------------*/
342 363
343static void tda8290_i2c_bridge(struct i2c_client *c, int close) 364static void tda8290_i2c_bridge(struct dvb_frontend *fe, int close)
344{ 365{
366 struct tda8290_priv *priv = fe->tuner_priv;
367
345 unsigned char enable[2] = { 0x21, 0xC0 }; 368 unsigned char enable[2] = { 0x21, 0xC0 };
346 unsigned char disable[2] = { 0x21, 0x00 }; 369 unsigned char disable[2] = { 0x21, 0x00 };
347 unsigned char *msg; 370 unsigned char *msg;
348 if(close) { 371 if(close) {
349 msg = enable; 372 msg = enable;
350 i2c_master_send(c, msg, 2); 373 tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
351 /* let the bridge stabilize */ 374 /* let the bridge stabilize */
352 msleep(20); 375 msleep(20);
353 } else { 376 } else {
354 msg = disable; 377 msg = disable;
355 i2c_master_send(c, msg, 2); 378 tuner_i2c_xfer_send(&priv->i2c_props, msg, 2);
356 } 379 }
357} 380}
358 381
359/*---------------------------------------------------------------------*/ 382/*---------------------------------------------------------------------*/
360 383
361static int tda8290_tune(struct i2c_client *c, u16 ifc, unsigned int freq) 384static void set_audio(struct dvb_frontend *fe,
385 struct analog_parameters *params)
386{
387 struct tda8290_priv *priv = fe->tuner_priv;
388 char* mode;
389
390 priv->tda827x_lpsel = 0;
391 if (params->std & V4L2_STD_MN) {
392 priv->sgIF = 92;
393 priv->tda8290_easy_mode = 0x01;
394 priv->tda827x_lpsel = 1;
395 mode = "MN";
396 } else if (params->std & V4L2_STD_B) {
397 priv->sgIF = 108;
398 priv->tda8290_easy_mode = 0x02;
399 mode = "B";
400 } else if (params->std & V4L2_STD_GH) {
401 priv->sgIF = 124;
402 priv->tda8290_easy_mode = 0x04;
403 mode = "GH";
404 } else if (params->std & V4L2_STD_PAL_I) {
405 priv->sgIF = 124;
406 priv->tda8290_easy_mode = 0x08;
407 mode = "I";
408 } else if (params->std & V4L2_STD_DK) {
409 priv->sgIF = 124;
410 priv->tda8290_easy_mode = 0x10;
411 mode = "DK";
412 } else if (params->std & V4L2_STD_SECAM_L) {
413 priv->sgIF = 124;
414 priv->tda8290_easy_mode = 0x20;
415 mode = "L";
416 } else if (params->std & V4L2_STD_SECAM_LC) {
417 priv->sgIF = 20;
418 priv->tda8290_easy_mode = 0x40;
419 mode = "LC";
420 } else {
421 priv->sgIF = 124;
422 priv->tda8290_easy_mode = 0x10;
423 mode = "xx";
424 }
425
426 if (params->mode == V4L2_TUNER_RADIO)
427 priv->sgIF = 88; /* if frequency is 5.5 MHz */
428
429 tuner_dbg("setting tda8290 to system %s\n", mode);
430}
431
432static int tda8290_set_params(struct dvb_frontend *fe,
433 struct analog_parameters *params)
362{ 434{
363 struct tuner *t = i2c_get_clientdata(c); 435 struct tda8290_priv *priv = fe->tuner_priv;
364 struct tda8290_priv *priv = t->priv;
365 unsigned char soft_reset[] = { 0x00, 0x00 }; 436 unsigned char soft_reset[] = { 0x00, 0x00 };
366 unsigned char easy_mode[] = { 0x01, priv->tda8290_easy_mode }; 437 unsigned char easy_mode[] = { 0x01, priv->tda8290_easy_mode };
367 unsigned char expert_mode[] = { 0x01, 0x80 }; 438 unsigned char expert_mode[] = { 0x01, 0x80 };
@@ -384,35 +455,38 @@ static int tda8290_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
384 pll_stat; 455 pll_stat;
385 int i; 456 int i;
386 457
387 tuner_dbg("tda827xa config is 0x%02x\n", t->config); 458 set_audio(fe, params);
388 i2c_master_send(c, easy_mode, 2); 459
389 i2c_master_send(c, agc_out_on, 2); 460 if (priv->lna_cfg)
390 i2c_master_send(c, soft_reset, 2); 461 tuner_dbg("tda827xa config is 0x%02x\n", *priv->lna_cfg);
462 tuner_i2c_xfer_send(&priv->i2c_props, easy_mode, 2);
463 tuner_i2c_xfer_send(&priv->i2c_props, agc_out_on, 2);
464 tuner_i2c_xfer_send(&priv->i2c_props, soft_reset, 2);
391 msleep(1); 465 msleep(1);
392 466
393 expert_mode[1] = priv->tda8290_easy_mode + 0x80; 467 expert_mode[1] = priv->tda8290_easy_mode + 0x80;
394 i2c_master_send(c, expert_mode, 2); 468 tuner_i2c_xfer_send(&priv->i2c_props, expert_mode, 2);
395 i2c_master_send(c, gainset_off, 2); 469 tuner_i2c_xfer_send(&priv->i2c_props, gainset_off, 2);
396 i2c_master_send(c, if_agc_spd, 2); 470 tuner_i2c_xfer_send(&priv->i2c_props, if_agc_spd, 2);
397 if (priv->tda8290_easy_mode & 0x60) 471 if (priv->tda8290_easy_mode & 0x60)
398 i2c_master_send(c, adc_head_9, 2); 472 tuner_i2c_xfer_send(&priv->i2c_props, adc_head_9, 2);
399 else 473 else
400 i2c_master_send(c, adc_head_6, 2); 474 tuner_i2c_xfer_send(&priv->i2c_props, adc_head_6, 2);
401 i2c_master_send(c, pll_bw_nom, 2); 475 tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_nom, 2);
402 476
403 tda8290_i2c_bridge(c, 1); 477 tda8290_i2c_bridge(fe, 1);
404 if (priv->tda827x_ver != 0) 478 if (priv->tda827x_ver != 0)
405 tda827xa_tune(c, ifc, freq); 479 tda827xa_set_analog_params(fe, params);
406 else 480 else
407 tda827x_tune(c, ifc, freq); 481 tda827x_set_analog_params(fe, params);
408 for (i = 0; i < 3; i++) { 482 for (i = 0; i < 3; i++) {
409 i2c_master_send(c, &addr_pll_stat, 1); 483 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1);
410 i2c_master_recv(c, &pll_stat, 1); 484 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1);
411 if (pll_stat & 0x80) { 485 if (pll_stat & 0x80) {
412 i2c_master_send(c, &addr_adc_sat, 1); 486 tuner_i2c_xfer_send(&priv->i2c_props, &addr_adc_sat, 1);
413 i2c_master_recv(c, &adc_sat, 1); 487 tuner_i2c_xfer_recv(&priv->i2c_props, &adc_sat, 1);
414 i2c_master_send(c, &addr_agc_stat, 1); 488 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1);
415 i2c_master_recv(c, &agc_stat, 1); 489 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1);
416 tuner_dbg("tda8290 is locked, AGC: %d\n", agc_stat); 490 tuner_dbg("tda8290 is locked, AGC: %d\n", agc_stat);
417 break; 491 break;
418 } else { 492 } else {
@@ -424,28 +498,28 @@ static int tda8290_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
424 if ((agc_stat > 115) || (!(pll_stat & 0x80) && (adc_sat < 20))) { 498 if ((agc_stat > 115) || (!(pll_stat & 0x80) && (adc_sat < 20))) {
425 tuner_dbg("adjust gain, step 1. Agc: %d, ADC stat: %d, lock: %d\n", 499 tuner_dbg("adjust gain, step 1. Agc: %d, ADC stat: %d, lock: %d\n",
426 agc_stat, adc_sat, pll_stat & 0x80); 500 agc_stat, adc_sat, pll_stat & 0x80);
427 i2c_master_send(c, gainset_2, 2); 501 tuner_i2c_xfer_send(&priv->i2c_props, gainset_2, 2);
428 msleep(100); 502 msleep(100);
429 i2c_master_send(c, &addr_agc_stat, 1); 503 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1);
430 i2c_master_recv(c, &agc_stat, 1); 504 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1);
431 i2c_master_send(c, &addr_pll_stat, 1); 505 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1);
432 i2c_master_recv(c, &pll_stat, 1); 506 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1);
433 if ((agc_stat > 115) || !(pll_stat & 0x80)) { 507 if ((agc_stat > 115) || !(pll_stat & 0x80)) {
434 tuner_dbg("adjust gain, step 2. Agc: %d, lock: %d\n", 508 tuner_dbg("adjust gain, step 2. Agc: %d, lock: %d\n",
435 agc_stat, pll_stat & 0x80); 509 agc_stat, pll_stat & 0x80);
436 if (priv->tda827x_ver != 0) 510 if (priv->tda827x_ver != 0)
437 tda827xa_agcf(c); 511 tda827xa_agcf(fe);
438 else 512 else
439 tda827x_agcf(c); 513 tda827x_agcf(fe);
440 msleep(100); 514 msleep(100);
441 i2c_master_send(c, &addr_agc_stat, 1); 515 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1);
442 i2c_master_recv(c, &agc_stat, 1); 516 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1);
443 i2c_master_send(c, &addr_pll_stat, 1); 517 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1);
444 i2c_master_recv(c, &pll_stat, 1); 518 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1);
445 if((agc_stat > 115) || !(pll_stat & 0x80)) { 519 if((agc_stat > 115) || !(pll_stat & 0x80)) {
446 tuner_dbg("adjust gain, step 3. Agc: %d\n", agc_stat); 520 tuner_dbg("adjust gain, step 3. Agc: %d\n", agc_stat);
447 i2c_master_send(c, adc_head_12, 2); 521 tuner_i2c_xfer_send(&priv->i2c_props, adc_head_12, 2);
448 i2c_master_send(c, pll_bw_low, 2); 522 tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_low, 2);
449 msleep(100); 523 msleep(100);
450 } 524 }
451 } 525 }
@@ -453,132 +527,106 @@ static int tda8290_tune(struct i2c_client *c, u16 ifc, unsigned int freq)
453 527
454 /* l/ l' deadlock? */ 528 /* l/ l' deadlock? */
455 if(priv->tda8290_easy_mode & 0x60) { 529 if(priv->tda8290_easy_mode & 0x60) {
456 i2c_master_send(c, &addr_adc_sat, 1); 530 tuner_i2c_xfer_send(&priv->i2c_props, &addr_adc_sat, 1);
457 i2c_master_recv(c, &adc_sat, 1); 531 tuner_i2c_xfer_recv(&priv->i2c_props, &adc_sat, 1);
458 i2c_master_send(c, &addr_pll_stat, 1); 532 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1);
459 i2c_master_recv(c, &pll_stat, 1); 533 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1);
460 if ((adc_sat > 20) || !(pll_stat & 0x80)) { 534 if ((adc_sat > 20) || !(pll_stat & 0x80)) {
461 tuner_dbg("trying to resolve SECAM L deadlock\n"); 535 tuner_dbg("trying to resolve SECAM L deadlock\n");
462 i2c_master_send(c, agc_rst_on, 2); 536 tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_on, 2);
463 msleep(40); 537 msleep(40);
464 i2c_master_send(c, agc_rst_off, 2); 538 tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_off, 2);
465 } 539 }
466 } 540 }
467 541
468 tda8290_i2c_bridge(c, 0); 542 tda8290_i2c_bridge(fe, 0);
469 i2c_master_send(c, if_agc_set, 2); 543 tuner_i2c_xfer_send(&priv->i2c_props, if_agc_set, 2);
544
545 priv->frequency = (V4L2_TUNER_RADIO == params->mode) ?
546 params->frequency * 125 / 2 : params->frequency * 62500;
547
470 return 0; 548 return 0;
471} 549}
472 550
473/*---------------------------------------------------------------------*/ 551/*---------------------------------------------------------------------*/
474 552
475static void set_audio(struct tuner *t) 553static int tda8290_has_signal(struct dvb_frontend *fe)
476{ 554{
477 struct tda8290_priv *priv = t->priv; 555 struct tda8290_priv *priv = fe->tuner_priv;
478 char* mode; 556 int ret;
479 557
480 priv->tda827x_lpsel = 0; 558 unsigned char i2c_get_afc[1] = { 0x1B };
481 if (t->std & V4L2_STD_MN) { 559 unsigned char afc = 0;
482 priv->sgIF = 92;
483 priv->tda8290_easy_mode = 0x01;
484 priv->tda827x_lpsel = 1;
485 mode = "MN";
486 } else if (t->std & V4L2_STD_B) {
487 priv->sgIF = 108;
488 priv->tda8290_easy_mode = 0x02;
489 mode = "B";
490 } else if (t->std & V4L2_STD_GH) {
491 priv->sgIF = 124;
492 priv->tda8290_easy_mode = 0x04;
493 mode = "GH";
494 } else if (t->std & V4L2_STD_PAL_I) {
495 priv->sgIF = 124;
496 priv->tda8290_easy_mode = 0x08;
497 mode = "I";
498 } else if (t->std & V4L2_STD_DK) {
499 priv->sgIF = 124;
500 priv->tda8290_easy_mode = 0x10;
501 mode = "DK";
502 } else if (t->std & V4L2_STD_SECAM_L) {
503 priv->sgIF = 124;
504 priv->tda8290_easy_mode = 0x20;
505 mode = "L";
506 } else if (t->std & V4L2_STD_SECAM_LC) {
507 priv->sgIF = 20;
508 priv->tda8290_easy_mode = 0x40;
509 mode = "LC";
510 } else {
511 priv->sgIF = 124;
512 priv->tda8290_easy_mode = 0x10;
513 mode = "xx";
514 }
515 tuner_dbg("setting tda8290 to system %s\n", mode);
516}
517 560
518static void set_tv_freq(struct i2c_client *c, unsigned int freq) 561 /* for now, report based on afc status */
519{ 562 tuner_i2c_xfer_send(&priv->i2c_props, i2c_get_afc, ARRAY_SIZE(i2c_get_afc));
520 struct tuner *t = i2c_get_clientdata(c); 563 tuner_i2c_xfer_recv(&priv->i2c_props, &afc, 1);
521 struct tda8290_priv *priv = t->priv; 564
565 ret = (afc & 0x80) ? 65535 : 0;
522 566
523 set_audio(t); 567 tuner_dbg("AFC status: %d\n", ret);
524 tda8290_tune(c, priv->sgIF, freq); 568
569 return ret;
525} 570}
526 571
527static void set_radio_freq(struct i2c_client *c, unsigned int freq) 572static int tda8290_get_status(struct dvb_frontend *fe, u32 *status)
528{ 573{
529 /* if frequency is 5.5 MHz */ 574 *status = 0;
530 tda8290_tune(c, 88, freq); 575
576 if (tda8290_has_signal(fe))
577 *status = TUNER_STATUS_LOCKED;
578
579 return 0;
531} 580}
532 581
533static int has_signal(struct i2c_client *c) 582static int tda8290_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
534{ 583{
535 unsigned char i2c_get_afc[1] = { 0x1B }; 584 *strength = tda8290_has_signal(fe);
536 unsigned char afc = 0;
537 585
538 i2c_master_send(c, i2c_get_afc, ARRAY_SIZE(i2c_get_afc)); 586 return 0;
539 i2c_master_recv(c, &afc, 1);
540 return (afc & 0x80)? 65535:0;
541} 587}
542 588
543/*---------------------------------------------------------------------*/ 589/*---------------------------------------------------------------------*/
544 590
545static void standby(struct i2c_client *c) 591static int tda8290_standby(struct dvb_frontend *fe)
546{ 592{
547 struct tuner *t = i2c_get_clientdata(c); 593 struct tda8290_priv *priv = fe->tuner_priv;
548 struct tda8290_priv *priv = t->priv;
549 unsigned char cb1[] = { 0x30, 0xD0 }; 594 unsigned char cb1[] = { 0x30, 0xD0 };
550 unsigned char tda8290_standby[] = { 0x00, 0x02 }; 595 unsigned char tda8290_standby[] = { 0x00, 0x02 };
551 unsigned char tda8290_agc_tri[] = { 0x02, 0x20 }; 596 unsigned char tda8290_agc_tri[] = { 0x02, 0x20 };
552 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags=0, .buf=cb1, .len = 2}; 597 struct i2c_msg msg = {.addr = priv->tda827x_addr, .flags=0, .buf=cb1, .len = 2};
553 598
554 tda8290_i2c_bridge(c, 1); 599 tda8290_i2c_bridge(fe, 1);
555 if (priv->tda827x_ver != 0) 600 if (priv->tda827x_ver != 0)
556 cb1[1] = 0x90; 601 cb1[1] = 0x90;
557 i2c_transfer(c->adapter, &msg, 1); 602 i2c_transfer(priv->i2c_props.adap, &msg, 1);
558 tda8290_i2c_bridge(c, 0); 603 tda8290_i2c_bridge(fe, 0);
559 i2c_master_send(c, tda8290_agc_tri, 2); 604 tuner_i2c_xfer_send(&priv->i2c_props, tda8290_agc_tri, 2);
560 i2c_master_send(c, tda8290_standby, 2); 605 tuner_i2c_xfer_send(&priv->i2c_props, tda8290_standby, 2);
606
607 return 0;
561} 608}
562 609
563 610
564static void tda8290_init_if(struct i2c_client *c) 611static void tda8290_init_if(struct dvb_frontend *fe)
565{ 612{
566 struct tuner *t = i2c_get_clientdata(c); 613 struct tda8290_priv *priv = fe->tuner_priv;
614
567 unsigned char set_VS[] = { 0x30, 0x6F }; 615 unsigned char set_VS[] = { 0x30, 0x6F };
568 unsigned char set_GP00_CF[] = { 0x20, 0x01 }; 616 unsigned char set_GP00_CF[] = { 0x20, 0x01 };
569 unsigned char set_GP01_CF[] = { 0x20, 0x0B }; 617 unsigned char set_GP01_CF[] = { 0x20, 0x0B };
570 618
571 if ((t->config == 1) || (t->config == 2)) 619 if ((priv->lna_cfg) &&
572 i2c_master_send(c, set_GP00_CF, 2); 620 ((*priv->lna_cfg == 1) || (*priv->lna_cfg == 2)))
621 tuner_i2c_xfer_send(&priv->i2c_props, set_GP00_CF, 2);
573 else 622 else
574 i2c_master_send(c, set_GP01_CF, 2); 623 tuner_i2c_xfer_send(&priv->i2c_props, set_GP01_CF, 2);
575 i2c_master_send(c, set_VS, 2); 624 tuner_i2c_xfer_send(&priv->i2c_props, set_VS, 2);
576} 625}
577 626
578static void tda8290_init_tuner(struct i2c_client *c) 627static void tda8290_init_tuner(struct dvb_frontend *fe)
579{ 628{
580 struct tuner *t = i2c_get_clientdata(c); 629 struct tda8290_priv *priv = fe->tuner_priv;
581 struct tda8290_priv *priv = t->priv;
582 unsigned char tda8275_init[] = { 0x00, 0x00, 0x00, 0x40, 0xdC, 0x04, 0xAf, 630 unsigned char tda8275_init[] = { 0x00, 0x00, 0x00, 0x40, 0xdC, 0x04, 0xAf,
583 0x3F, 0x2A, 0x04, 0xFF, 0x00, 0x00, 0x40 }; 631 0x3F, 0x2A, 0x04, 0xFF, 0x00, 0x00, 0x40 };
584 unsigned char tda8275a_init[] = { 0x00, 0x00, 0x00, 0x00, 0xdC, 0x05, 0x8b, 632 unsigned char tda8275a_init[] = { 0x00, 0x00, 0x00, 0x00, 0xdC, 0x05, 0x8b,
@@ -588,33 +636,43 @@ static void tda8290_init_tuner(struct i2c_client *c)
588 if (priv->tda827x_ver != 0) 636 if (priv->tda827x_ver != 0)
589 msg.buf = tda8275a_init; 637 msg.buf = tda8275a_init;
590 638
591 tda8290_i2c_bridge(c, 1); 639 tda8290_i2c_bridge(fe, 1);
592 i2c_transfer(c->adapter, &msg, 1); 640 i2c_transfer(priv->i2c_props.adap, &msg, 1);
593 tda8290_i2c_bridge(c, 0); 641 tda8290_i2c_bridge(fe, 0);
594} 642}
595 643
596/*---------------------------------------------------------------------*/ 644/*---------------------------------------------------------------------*/
597 645
598static void tda8290_release(struct i2c_client *c) 646static int tda8290_release(struct dvb_frontend *fe)
599{ 647{
600 struct tuner *t = i2c_get_clientdata(c); 648 kfree(fe->tuner_priv);
649 fe->tuner_priv = NULL;
601 650
602 kfree(t->priv); 651 return 0;
603 t->priv = NULL;
604} 652}
605 653
606static struct tuner_operations tda8290_tuner_ops = { 654static int tda8290_get_frequency(struct dvb_frontend *fe, u32 *frequency)
607 .set_tv_freq = set_tv_freq, 655{
608 .set_radio_freq = set_radio_freq, 656 struct tda8290_priv *priv = fe->tuner_priv;
609 .has_signal = has_signal, 657 *frequency = priv->frequency;
610 .standby = standby, 658 return 0;
611 .release = tda8290_release, 659}
660
661static struct dvb_tuner_ops tda8290_tuner_ops = {
662 .sleep = tda8290_standby,
663 .set_analog_params = tda8290_set_params,
664 .release = tda8290_release,
665 .get_frequency = tda8290_get_frequency,
666 .get_status = tda8290_get_status,
667 .get_rf_strength = tda8290_get_rf_strength,
612}; 668};
613 669
614int tda8290_init(struct i2c_client *c) 670struct dvb_frontend *tda8290_attach(struct dvb_frontend *fe,
671 struct i2c_adapter* i2c_adap,
672 u8 i2c_addr,
673 struct tda8290_config *cfg)
615{ 674{
616 struct tda8290_priv *priv = NULL; 675 struct tda8290_priv *priv = NULL;
617 struct tuner *t = i2c_get_clientdata(c);
618 u8 data; 676 u8 data;
619 int i, ret, tuners_found; 677 int i, ret, tuners_found;
620 u32 tuner_addrs; 678 u32 tuner_addrs;
@@ -622,16 +680,23 @@ int tda8290_init(struct i2c_client *c)
622 680
623 priv = kzalloc(sizeof(struct tda8290_priv), GFP_KERNEL); 681 priv = kzalloc(sizeof(struct tda8290_priv), GFP_KERNEL);
624 if (priv == NULL) 682 if (priv == NULL)
625 return -ENOMEM; 683 return NULL;
626 t->priv = priv; 684 fe->tuner_priv = priv;
685
686 priv->i2c_props.addr = i2c_addr;
687 priv->i2c_props.adap = i2c_adap;
688 if (cfg) {
689 priv->lna_cfg = cfg->lna_cfg;
690 priv->tuner_callback = cfg->tuner_callback;
691 }
627 692
628 tda8290_i2c_bridge(c, 1); 693 tda8290_i2c_bridge(fe, 1);
629 /* probe for tuner chip */ 694 /* probe for tuner chip */
630 tuners_found = 0; 695 tuners_found = 0;
631 tuner_addrs = 0; 696 tuner_addrs = 0;
632 for (i=0x60; i<= 0x63; i++) { 697 for (i=0x60; i<= 0x63; i++) {
633 msg.addr = i; 698 msg.addr = i;
634 ret = i2c_transfer(c->adapter, &msg, 1); 699 ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
635 if (ret == 1) { 700 if (ret == 1) {
636 tuners_found++; 701 tuners_found++;
637 tuner_addrs = (tuner_addrs << 8) + i; 702 tuner_addrs = (tuner_addrs << 8) + i;
@@ -641,11 +706,11 @@ int tda8290_init(struct i2c_client *c)
641 behind the bridge and we choose the highest address that doesn't 706 behind the bridge and we choose the highest address that doesn't
642 give a response now 707 give a response now
643 */ 708 */
644 tda8290_i2c_bridge(c, 0); 709 tda8290_i2c_bridge(fe, 0);
645 if(tuners_found > 1) 710 if(tuners_found > 1)
646 for (i = 0; i < tuners_found; i++) { 711 for (i = 0; i < tuners_found; i++) {
647 msg.addr = tuner_addrs & 0xff; 712 msg.addr = tuner_addrs & 0xff;
648 ret = i2c_transfer(c->adapter, &msg, 1); 713 ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
649 if(ret == 1) 714 if(ret == 1)
650 tuner_addrs = tuner_addrs >> 8; 715 tuner_addrs = tuner_addrs >> 8;
651 else 716 else
@@ -653,40 +718,53 @@ int tda8290_init(struct i2c_client *c)
653 } 718 }
654 if (tuner_addrs == 0) { 719 if (tuner_addrs == 0) {
655 tuner_addrs = 0x61; 720 tuner_addrs = 0x61;
656 tuner_info ("could not clearly identify tuner address, defaulting to %x\n", 721 tuner_info("could not clearly identify tuner address, defaulting to %x\n",
657 tuner_addrs); 722 tuner_addrs);
658 } else { 723 } else {
659 tuner_addrs = tuner_addrs & 0xff; 724 tuner_addrs = tuner_addrs & 0xff;
660 tuner_info ("setting tuner address to %x\n", tuner_addrs); 725 tuner_info("setting tuner address to %x\n", tuner_addrs);
661 } 726 }
662 priv->tda827x_addr = tuner_addrs; 727 priv->tda827x_addr = tuner_addrs;
663 msg.addr = tuner_addrs; 728 msg.addr = tuner_addrs;
664 729
665 tda8290_i2c_bridge(c, 1); 730 tda8290_i2c_bridge(fe, 1);
666 ret = i2c_transfer(c->adapter, &msg, 1); 731 ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
667 if( ret != 1) 732 if( ret != 1)
668 tuner_warn ("TDA827x access failed!\n"); 733 tuner_warn("TDA827x access failed!\n");
734
735 memcpy(&fe->ops.tuner_ops, &tda8290_tuner_ops,
736 sizeof(struct dvb_tuner_ops));
737
669 if ((data & 0x3c) == 0) { 738 if ((data & 0x3c) == 0) {
670 strlcpy(c->name, "tda8290+75", sizeof(c->name)); 739 strlcpy(fe->ops.tuner_ops.info.name, "tda8290+75",
740 sizeof(fe->ops.tuner_ops.info.name));
741 fe->ops.tuner_ops.info.frequency_min = 55000000;
742 fe->ops.tuner_ops.info.frequency_max = 860000000;
743 fe->ops.tuner_ops.info.frequency_step = 250000;
671 priv->tda827x_ver = 0; 744 priv->tda827x_ver = 0;
672 } else { 745 } else {
673 strlcpy(c->name, "tda8290+75a", sizeof(c->name)); 746 strlcpy(fe->ops.tuner_ops.info.name, "tda8290+75a",
747 sizeof(fe->ops.tuner_ops.info.name));
748 fe->ops.tuner_ops.info.frequency_min = 44000000;
749 fe->ops.tuner_ops.info.frequency_max = 906000000;
750 fe->ops.tuner_ops.info.frequency_step = 62500;
674 priv->tda827x_ver = 2; 751 priv->tda827x_ver = 2;
675 } 752 }
676 tuner_info("type set to %s\n", c->name);
677
678 memcpy(&t->ops, &tda8290_tuner_ops, sizeof(struct tuner_operations));
679 753
680 priv->tda827x_lpsel = 0; 754 priv->tda827x_lpsel = 0;
681 t->mode = V4L2_TUNER_ANALOG_TV;
682 755
683 tda8290_init_tuner(c); 756 tda8290_init_tuner(fe);
684 tda8290_init_if(c); 757 tda8290_init_if(fe);
685 return 0; 758 return fe;
686} 759}
687 760
688int tda8290_probe(struct i2c_client *c) 761int tda8290_probe(struct i2c_adapter* i2c_adap, u8 i2c_addr)
689{ 762{
763 struct tuner_i2c_props i2c_props = {
764 .adap = i2c_adap,
765 .addr = i2c_addr
766 };
767
690 unsigned char soft_reset[] = { 0x00, 0x00 }; 768 unsigned char soft_reset[] = { 0x00, 0x00 };
691 unsigned char easy_mode_b[] = { 0x01, 0x02 }; 769 unsigned char easy_mode_b[] = { 0x01, 0x02 };
692 unsigned char easy_mode_g[] = { 0x01, 0x04 }; 770 unsigned char easy_mode_g[] = { 0x01, 0x04 };
@@ -694,23 +772,30 @@ int tda8290_probe(struct i2c_client *c)
694 unsigned char addr_dto_lsb = 0x07; 772 unsigned char addr_dto_lsb = 0x07;
695 unsigned char data; 773 unsigned char data;
696 774
697 i2c_master_send(c, easy_mode_b, 2); 775 tuner_i2c_xfer_send(&i2c_props, easy_mode_b, 2);
698 i2c_master_send(c, soft_reset, 2); 776 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
699 i2c_master_send(c, &addr_dto_lsb, 1); 777 tuner_i2c_xfer_send(&i2c_props, &addr_dto_lsb, 1);
700 i2c_master_recv(c, &data, 1); 778 tuner_i2c_xfer_recv(&i2c_props, &data, 1);
701 if (data == 0) { 779 if (data == 0) {
702 i2c_master_send(c, easy_mode_g, 2); 780 tuner_i2c_xfer_send(&i2c_props, easy_mode_g, 2);
703 i2c_master_send(c, soft_reset, 2); 781 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
704 i2c_master_send(c, &addr_dto_lsb, 1); 782 tuner_i2c_xfer_send(&i2c_props, &addr_dto_lsb, 1);
705 i2c_master_recv(c, &data, 1); 783 tuner_i2c_xfer_recv(&i2c_props, &data, 1);
706 if (data == 0x7b) { 784 if (data == 0x7b) {
707 return 0; 785 return 0;
708 } 786 }
709 } 787 }
710 i2c_master_send(c, restore_9886, 3); 788 tuner_i2c_xfer_send(&i2c_props, restore_9886, 3);
711 return -1; 789 return -1;
712} 790}
713 791
792EXPORT_SYMBOL_GPL(tda8290_probe);
793EXPORT_SYMBOL_GPL(tda8290_attach);
794
795MODULE_DESCRIPTION("Philips TDA8290 + TDA8275 / TDA8275a tuner driver");
796MODULE_AUTHOR("Gerd Knorr, Hartmut Hackmann");
797MODULE_LICENSE("GPL");
798
714/* 799/*
715 * Overrides for Emacs so that we follow Linus's tabbing style. 800 * Overrides for Emacs so that we follow Linus's tabbing style.
716 * --------------------------------------------------------------------------- 801 * ---------------------------------------------------------------------------
diff --git a/drivers/media/video/tda8290.h b/drivers/media/video/tda8290.h
new file mode 100644
index 000000000000..107b24b05aa1
--- /dev/null
+++ b/drivers/media/video/tda8290.h
@@ -0,0 +1,54 @@
1/*
2 This program is free software; you can redistribute it and/or modify
3 it under the terms of the GNU General Public License as published by
4 the Free Software Foundation; either version 2 of the License, or
5 (at your option) any later version.
6
7 This program is distributed in the hope that it will be useful,
8 but WITHOUT ANY WARRANTY; without even the implied warranty of
9 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 GNU General Public License for more details.
11
12 You should have received a copy of the GNU General Public License
13 along with this program; if not, write to the Free Software
14 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15*/
16
17#ifndef __TDA8290_H__
18#define __TDA8290_H__
19
20#include <linux/i2c.h>
21#include "dvb_frontend.h"
22
23struct tda8290_config
24{
25 unsigned int *lna_cfg;
26 int (*tuner_callback) (void *dev, int command,int arg);
27};
28
29#if defined(CONFIG_TUNER_TDA8290) || (defined(CONFIG_TUNER_TDA8290_MODULE) && defined(MODULE))
30extern int tda8290_probe(struct i2c_adapter* i2c_adap, u8 i2c_addr);
31
32extern struct dvb_frontend *tda8290_attach(struct dvb_frontend *fe,
33 struct i2c_adapter* i2c_adap,
34 u8 i2c_addr,
35 struct tda8290_config *cfg);
36#else
37static inline int tda8290_probe(struct i2c_adapter* i2c_adap, u8 i2c_addr)
38{
39 printk(KERN_INFO "%s: not probed - driver disabled by Kconfig\n",
40 __FUNCTION__);
41 return -EINVAL;
42}
43
44static inline struct dvb_frontend *tda8290_attach(struct dvb_frontend *fe,
45 struct i2c_adapter* i2c_adap,
46 u8 i2c_addr,
47 struct tda8290_config *cfg)
48{
49 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
50 return NULL;
51}
52#endif
53
54#endif /* __TDA8290_H__ */
diff --git a/drivers/media/video/tda9887.c b/drivers/media/video/tda9887.c
index a8f773274fe3..be5387f11afb 100644
--- a/drivers/media/video/tda9887.c
+++ b/drivers/media/video/tda9887.c
@@ -1,14 +1,12 @@
1#include <linux/module.h> 1#include <linux/module.h>
2#include <linux/moduleparam.h>
3#include <linux/kernel.h> 2#include <linux/kernel.h>
4#include <linux/i2c.h> 3#include <linux/i2c.h>
5#include <linux/types.h> 4#include <linux/types.h>
6#include <linux/videodev.h>
7#include <linux/init.h> 5#include <linux/init.h>
8#include <linux/errno.h> 6#include <linux/errno.h>
9#include <linux/slab.h> 7#include <linux/slab.h>
10#include <linux/delay.h> 8#include <linux/delay.h>
11 9#include <linux/videodev.h>
12#include <media/v4l2-common.h> 10#include <media/v4l2-common.h>
13#include <media/tuner.h> 11#include <media/tuner.h>
14#include "tuner-driver.h" 12#include "tuner-driver.h"
@@ -31,6 +29,8 @@
31 i2c_adapter_id(t->i2c.adapter), t->i2c.addr , ##arg); } while (0) 29 i2c_adapter_id(t->i2c.adapter), t->i2c.addr , ##arg); } while (0)
32 30
33struct tda9887_priv { 31struct tda9887_priv {
32 struct tuner_i2c_props i2c_props;
33
34 unsigned char data[4]; 34 unsigned char data[4];
35}; 35};
36 36
@@ -97,6 +97,8 @@ struct tvnorm {
97#define cAudioIF_6_5 0x03 // bit e0:1 97#define cAudioIF_6_5 0x03 // bit e0:1
98 98
99 99
100#define cVideoIFMask 0x1c // bit e2:4
101/* Video IF selection in TV Mode (bit B3=0) */
100#define cVideoIF_58_75 0x00 // bit e2:4 102#define cVideoIF_58_75 0x00 // bit e2:4
101#define cVideoIF_45_75 0x04 // bit e2:4 103#define cVideoIF_45_75 0x04 // bit e2:4
102#define cVideoIF_38_90 0x08 // bit e2:4 104#define cVideoIF_38_90 0x08 // bit e2:4
@@ -106,6 +108,13 @@ struct tvnorm {
106#define cRadioIF_45_75 0x18 // bit e2:4 108#define cRadioIF_45_75 0x18 // bit e2:4
107#define cRadioIF_38_90 0x1C // bit e2:4 109#define cRadioIF_38_90 0x1C // bit e2:4
108 110
111/* IF1 selection in Radio Mode (bit B3=1) */
112#define cRadioIF_33_30 0x00 // bit e2,4 (also 0x10,0x14)
113#define cRadioIF_41_30 0x04 // bit e2,4
114
115/* Output of AFC pin in radio mode when bit E7=1 */
116#define cRadioAGC_SIF 0x00 // bit e3
117#define cRadioAGC_FM 0x08 // bit e3
109 118
110#define cTunerGainNormal 0x00 // bit e5 119#define cTunerGainNormal 0x00 // bit e5
111#define cTunerGainLow 0x20 // bit e5 120#define cTunerGainLow 0x20 // bit e5
@@ -487,9 +496,13 @@ static int tda9887_set_config(struct tuner *t, char *buf)
487 if (t->tda9887_config & TDA9887_GATING_18) 496 if (t->tda9887_config & TDA9887_GATING_18)
488 buf[3] &= ~cGating_36; 497 buf[3] &= ~cGating_36;
489 498
490 if (t->tda9887_config & TDA9887_GAIN_NORMAL) { 499 if (t->mode == V4L2_TUNER_RADIO) {
491 radio_stereo.e &= ~cTunerGainLow; 500 if (t->tda9887_config & TDA9887_RIF_41_3) {
492 radio_mono.e &= ~cTunerGainLow; 501 buf[3] &= ~cVideoIFMask;
502 buf[3] |= cRadioIF_41_30;
503 }
504 if (t->tda9887_config & TDA9887_GAIN_NORMAL)
505 buf[3] &= ~cTunerGainLow;
493 } 506 }
494 507
495 return 0; 508 return 0;
@@ -499,19 +512,19 @@ static int tda9887_set_config(struct tuner *t, char *buf)
499 512
500static int tda9887_status(struct tuner *t) 513static int tda9887_status(struct tuner *t)
501{ 514{
515 struct tda9887_priv *priv = t->priv;
502 unsigned char buf[1]; 516 unsigned char buf[1];
503 int rc; 517 int rc;
504 518
505 memset(buf,0,sizeof(buf)); 519 memset(buf,0,sizeof(buf));
506 if (1 != (rc = i2c_master_recv(&t->i2c,buf,1))) 520 if (1 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props,buf,1)))
507 tda9887_info("i2c i/o error: rc == %d (should be 1)\n",rc); 521 tda9887_info("i2c i/o error: rc == %d (should be 1)\n",rc);
508 dump_read_message(t, buf); 522 dump_read_message(t, buf);
509 return 0; 523 return 0;
510} 524}
511 525
512static void tda9887_configure(struct i2c_client *client) 526static void tda9887_configure(struct tuner *t)
513{ 527{
514 struct tuner *t = i2c_get_clientdata(client);
515 struct tda9887_priv *priv = t->priv; 528 struct tda9887_priv *priv = t->priv;
516 int rc; 529 int rc;
517 530
@@ -546,7 +559,7 @@ static void tda9887_configure(struct i2c_client *client)
546 if (tuner_debug > 1) 559 if (tuner_debug > 1)
547 dump_write_message(t, priv->data); 560 dump_write_message(t, priv->data);
548 561
549 if (4 != (rc = i2c_master_send(&t->i2c,priv->data,4))) 562 if (4 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,priv->data,4)))
550 tda9887_info("i2c i/o error: rc == %d (should be 4)\n",rc); 563 tda9887_info("i2c i/o error: rc == %d (should be 4)\n",rc);
551 564
552 if (tuner_debug > 2) { 565 if (tuner_debug > 2) {
@@ -557,16 +570,15 @@ static void tda9887_configure(struct i2c_client *client)
557 570
558/* ---------------------------------------------------------------------- */ 571/* ---------------------------------------------------------------------- */
559 572
560static void tda9887_tuner_status(struct i2c_client *client) 573static void tda9887_tuner_status(struct tuner *t)
561{ 574{
562 struct tuner *t = i2c_get_clientdata(client);
563 struct tda9887_priv *priv = t->priv; 575 struct tda9887_priv *priv = t->priv;
564 tda9887_info("Data bytes: b=0x%02x c=0x%02x e=0x%02x\n", priv->data[1], priv->data[2], priv->data[3]); 576 tda9887_info("Data bytes: b=0x%02x c=0x%02x e=0x%02x\n", priv->data[1], priv->data[2], priv->data[3]);
565} 577}
566 578
567static int tda9887_get_afc(struct i2c_client *client) 579static int tda9887_get_afc(struct tuner *t)
568{ 580{
569 struct tuner *t = i2c_get_clientdata(client); 581 struct tda9887_priv *priv = t->priv;
570 static int AFC_BITS_2_kHz[] = { 582 static int AFC_BITS_2_kHz[] = {
571 -12500, -37500, -62500, -97500, 583 -12500, -37500, -62500, -97500,
572 -112500, -137500, -162500, -187500, 584 -112500, -137500, -162500, -187500,
@@ -576,26 +588,24 @@ static int tda9887_get_afc(struct i2c_client *client)
576 int afc=0; 588 int afc=0;
577 __u8 reg = 0; 589 __u8 reg = 0;
578 590
579 if (1 == i2c_master_recv(&t->i2c,&reg,1)) 591 if (1 == tuner_i2c_xfer_recv(&priv->i2c_props,&reg,1))
580 afc = AFC_BITS_2_kHz[(reg>>1)&0x0f]; 592 afc = AFC_BITS_2_kHz[(reg>>1)&0x0f];
581 593
582 return afc; 594 return afc;
583} 595}
584 596
585static void tda9887_standby(struct i2c_client *client) 597static void tda9887_standby(struct tuner *t)
586{ 598{
587 tda9887_configure(client); 599 tda9887_configure(t);
588} 600}
589 601
590static void tda9887_set_freq(struct i2c_client *client, unsigned int freq) 602static void tda9887_set_freq(struct tuner *t, unsigned int freq)
591{ 603{
592 tda9887_configure(client); 604 tda9887_configure(t);
593} 605}
594 606
595static void tda9887_release(struct i2c_client *c) 607static void tda9887_release(struct tuner *t)
596{ 608{
597 struct tuner *t = i2c_get_clientdata(c);
598
599 kfree(t->priv); 609 kfree(t->priv);
600 t->priv = NULL; 610 t->priv = NULL;
601} 611}
@@ -609,17 +619,19 @@ static struct tuner_operations tda9887_tuner_ops = {
609 .release = tda9887_release, 619 .release = tda9887_release,
610}; 620};
611 621
612int tda9887_tuner_init(struct i2c_client *c) 622int tda9887_tuner_init(struct tuner *t)
613{ 623{
614 struct tda9887_priv *priv = NULL; 624 struct tda9887_priv *priv = NULL;
615 struct tuner *t = i2c_get_clientdata(c);
616 625
617 priv = kzalloc(sizeof(struct tda9887_priv), GFP_KERNEL); 626 priv = kzalloc(sizeof(struct tda9887_priv), GFP_KERNEL);
618 if (priv == NULL) 627 if (priv == NULL)
619 return -ENOMEM; 628 return -ENOMEM;
620 t->priv = priv; 629 t->priv = priv;
621 630
622 strlcpy(c->name, "tda9887", sizeof(c->name)); 631 priv->i2c_props.addr = t->i2c.addr;
632 priv->i2c_props.adap = t->i2c.adapter;
633
634 strlcpy(t->i2c.name, "tda9887", sizeof(t->i2c.name));
623 635
624 tda9887_info("tda988[5/6/7] found @ 0x%x (%s)\n", t->i2c.addr, 636 tda9887_info("tda988[5/6/7] found @ 0x%x (%s)\n", t->i2c.addr,
625 t->i2c.driver->driver.name); 637 t->i2c.driver->driver.name);
diff --git a/drivers/media/video/tea5761.c b/drivers/media/video/tea5761.c
index ae105c2cd0ac..2150222a3860 100644
--- a/drivers/media/video/tea5761.c
+++ b/drivers/media/video/tea5761.c
@@ -8,15 +8,23 @@
8 */ 8 */
9 9
10#include <linux/i2c.h> 10#include <linux/i2c.h>
11#include <linux/videodev.h>
12#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/videodev.h>
13#include <media/tuner.h> 13#include <media/tuner.h>
14#include "tuner-driver.h" 14#include "tuner-i2c.h"
15#include "tea5761.h"
15 16
16#define PREFIX "TEA5761 " 17static int debug = 0;
18module_param(debug, int, 0644);
19MODULE_PARM_DESC(debug, "enable verbose debug messages");
17 20
18/* from tuner-core.c */ 21#define PREFIX "tea5761 "
19extern int tuner_debug; 22
23struct tea5761_priv {
24 struct tuner_i2c_props i2c_props;
25
26 u32 frequency;
27};
20 28
21/*****************************************************************************/ 29/*****************************************************************************/
22 30
@@ -114,13 +122,6 @@ extern int tuner_debug;
114 122
115/*****************************************************************************/ 123/*****************************************************************************/
116 124
117static void set_tv_freq(struct i2c_client *c, unsigned int freq)
118{
119 struct tuner *t = i2c_get_clientdata(c);
120
121 tuner_warn("This tuner doesn't support TV freq.\n");
122}
123
124#define FREQ_OFFSET 0 /* for TEA5767, it is 700 to give the right freq */ 125#define FREQ_OFFSET 0 /* for TEA5767, it is 700 to give the right freq */
125static void tea5761_status_dump(unsigned char *buffer) 126static void tea5761_status_dump(unsigned char *buffer)
126{ 127{
@@ -135,16 +136,18 @@ static void tea5761_status_dump(unsigned char *buffer)
135} 136}
136 137
137/* Freq should be specifyed at 62.5 Hz */ 138/* Freq should be specifyed at 62.5 Hz */
138static void set_radio_freq(struct i2c_client *c, unsigned int frq) 139static int set_radio_freq(struct dvb_frontend *fe,
140 struct analog_parameters *params)
139{ 141{
140 struct tuner *t = i2c_get_clientdata(c); 142 struct tea5761_priv *priv = fe->tuner_priv;
143 unsigned int frq = params->frequency;
141 unsigned char buffer[7] = {0, 0, 0, 0, 0, 0, 0 }; 144 unsigned char buffer[7] = {0, 0, 0, 0, 0, 0, 0 };
142 unsigned div; 145 unsigned div;
143 int rc; 146 int rc;
144 147
145 tuner_dbg (PREFIX "radio freq counter %d\n", frq); 148 tuner_dbg("radio freq counter %d\n", frq);
146 149
147 if (t->mode == T_STANDBY) { 150 if (params->mode == T_STANDBY) {
148 tuner_dbg("TEA5761 set to standby mode\n"); 151 tuner_dbg("TEA5761 set to standby mode\n");
149 buffer[5] |= TEA5761_TNCTRL_MU; 152 buffer[5] |= TEA5761_TNCTRL_MU;
150 } else { 153 } else {
@@ -152,10 +155,9 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq)
152 } 155 }
153 156
154 157
155 if (t->audmode == V4L2_TUNER_MODE_MONO) { 158 if (params->audmode == V4L2_TUNER_MODE_MONO) {
156 tuner_dbg("TEA5761 set to mono\n"); 159 tuner_dbg("TEA5761 set to mono\n");
157 buffer[5] |= TEA5761_TNCTRL_MST; 160 buffer[5] |= TEA5761_TNCTRL_MST;
158;
159 } else { 161 } else {
160 tuner_dbg("TEA5761 set to stereo\n"); 162 tuner_dbg("TEA5761 set to stereo\n");
161 } 163 }
@@ -164,80 +166,155 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq)
164 buffer[1] = (div >> 8) & 0x3f; 166 buffer[1] = (div >> 8) & 0x3f;
165 buffer[2] = div & 0xff; 167 buffer[2] = div & 0xff;
166 168
167 if (tuner_debug) 169 if (debug)
168 tea5761_status_dump(buffer); 170 tea5761_status_dump(buffer);
169 171
170 if (7 != (rc = i2c_master_send(c, buffer, 7))) 172 if (7 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 7)))
171 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 173 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
174
175 priv->frequency = frq * 125 / 2;
176
177 return 0;
172} 178}
173 179
174static int tea5761_signal(struct i2c_client *c) 180static int tea5761_read_status(struct dvb_frontend *fe, char *buffer)
175{ 181{
176 unsigned char buffer[16]; 182 struct tea5761_priv *priv = fe->tuner_priv;
177 int rc; 183 int rc;
178 struct tuner *t = i2c_get_clientdata(c);
179 184
180 memset(buffer, 0, sizeof(buffer)); 185 memset(buffer, 0, 16);
181 if (16 != (rc = i2c_master_recv(c, buffer, 16))) 186 if (16 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 16))) {
182 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 187 tuner_warn("i2c i/o error: rc == %d (should be 16)\n", rc);
188 return -EREMOTEIO;
189 }
190
191 return 0;
192}
193
194static inline int tea5761_signal(struct dvb_frontend *fe, const char *buffer)
195{
196 struct tea5761_priv *priv = fe->tuner_priv;
197
198 int signal = ((buffer[9] & TEA5761_TUNCHECK_LEV_MASK) << (13 - 4));
199
200 tuner_dbg("Signal strength: %d\n", signal);
201
202 return signal;
203}
204
205static inline int tea5761_stereo(struct dvb_frontend *fe, const char *buffer)
206{
207 struct tea5761_priv *priv = fe->tuner_priv;
208
209 int stereo = buffer[9] & TEA5761_TUNCHECK_STEREO;
183 210
184 return ((buffer[9] & TEA5761_TUNCHECK_LEV_MASK) << (13 - 4)); 211 tuner_dbg("Radio ST GET = %02x\n", stereo);
212
213 return (stereo ? V4L2_TUNER_SUB_STEREO : 0);
185} 214}
186 215
187static int tea5761_stereo(struct i2c_client *c) 216static int tea5761_get_status(struct dvb_frontend *fe, u32 *status)
188{ 217{
189 unsigned char buffer[16]; 218 unsigned char buffer[16];
190 int rc;
191 struct tuner *t = i2c_get_clientdata(c);
192 219
193 memset(buffer, 0, sizeof(buffer)); 220 *status = 0;
194 if (16 != (rc = i2c_master_recv(c, buffer, 16))) 221
195 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 222 if (0 == tea5761_read_status(fe, buffer)) {
223 if (tea5761_signal(fe, buffer))
224 *status = TUNER_STATUS_LOCKED;
225 if (tea5761_stereo(fe, buffer))
226 *status |= TUNER_STATUS_STEREO;
227 }
228
229 return 0;
230}
231
232static int tea5761_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
233{
234 unsigned char buffer[16];
196 235
197 rc = buffer[9] & TEA5761_TUNCHECK_STEREO; 236 *strength = 0;
198 237
199 tuner_dbg("TEA5761 radio ST GET = %02x\n", rc); 238 if (0 == tea5761_read_status(fe, buffer))
239 *strength = tea5761_signal(fe, buffer);
200 240
201 return (rc ? V4L2_TUNER_SUB_STEREO : 0); 241 return 0;
202} 242}
203 243
204int tea5761_autodetection(struct i2c_client *c) 244int tea5761_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr)
205{ 245{
206 unsigned char buffer[16]; 246 unsigned char buffer[16];
207 int rc; 247 int rc;
208 struct tuner *t = i2c_get_clientdata(c); 248 struct tuner_i2c_props i2c = { .adap = i2c_adap, .addr = i2c_addr };
209 249
210 if (16 != (rc = i2c_master_recv(c, buffer, 16))) { 250 if (16 != (rc = tuner_i2c_xfer_recv(&i2c, buffer, 16))) {
211 tuner_warn("it is not a TEA5761. Received %i chars.\n", rc); 251 printk(KERN_WARNING "it is not a TEA5761. Received %i chars.\n", rc);
212 return EINVAL; 252 return EINVAL;
213 } 253 }
214 254
215 if (!((buffer[13] != 0x2b) || (buffer[14] != 0x57) || (buffer[15] != 0x061))) { 255 if (!((buffer[13] != 0x2b) || (buffer[14] != 0x57) || (buffer[15] != 0x061))) {
216 tuner_warn("Manufacturer ID= 0x%02x, Chip ID = %02x%02x. It is not a TEA5761\n",buffer[13],buffer[14],buffer[15]); 256 printk(KERN_WARNING "Manufacturer ID= 0x%02x, Chip ID = %02x%02x. It is not a TEA5761\n",buffer[13],buffer[14],buffer[15]);
217 return EINVAL; 257 return EINVAL;
218 } 258 }
219 tuner_warn("TEA5761 detected.\n"); 259 printk(KERN_WARNING "TEA5761 detected.\n");
220 return 0; 260 return 0;
221} 261}
222 262
223static struct tuner_operations tea5761_tuner_ops = { 263static int tea5761_release(struct dvb_frontend *fe)
224 .set_tv_freq = set_tv_freq, 264{
225 .set_radio_freq = set_radio_freq, 265 kfree(fe->tuner_priv);
226 .has_signal = tea5761_signal, 266 fe->tuner_priv = NULL;
227 .is_stereo = tea5761_stereo, 267
268 return 0;
269}
270
271static int tea5761_get_frequency(struct dvb_frontend *fe, u32 *frequency)
272{
273 struct tea5761_priv *priv = fe->tuner_priv;
274 *frequency = priv->frequency;
275 return 0;
276}
277
278static struct dvb_tuner_ops tea5761_tuner_ops = {
279 .info = {
280 .name = "tea5761", // Philips TEA5761HN FM Radio
281 },
282 .set_analog_params = set_radio_freq,
283 .release = tea5761_release,
284 .get_frequency = tea5761_get_frequency,
285 .get_status = tea5761_get_status,
286 .get_rf_strength = tea5761_get_rf_strength,
228}; 287};
229 288
230int tea5761_tuner_init(struct i2c_client *c) 289struct dvb_frontend *tea5761_attach(struct dvb_frontend *fe,
290 struct i2c_adapter* i2c_adap,
291 u8 i2c_addr)
231{ 292{
232 struct tuner *t = i2c_get_clientdata(c); 293 struct tea5761_priv *priv = NULL;
233 294
234 if (tea5761_autodetection(c) == EINVAL) 295 if (tea5761_autodetection(i2c_adap, i2c_addr) == EINVAL)
235 return EINVAL; 296 return NULL;
297
298 priv = kzalloc(sizeof(struct tea5761_priv), GFP_KERNEL);
299 if (priv == NULL)
300 return NULL;
301 fe->tuner_priv = priv;
302
303 priv->i2c_props.addr = i2c_addr;
304 priv->i2c_props.adap = i2c_adap;
236 305
237 tuner_info("type set to %d (%s)\n", t->type, "Philips TEA5761HN FM Radio"); 306 memcpy(&fe->ops.tuner_ops, &tea5761_tuner_ops,
238 strlcpy(c->name, "tea5761", sizeof(c->name)); 307 sizeof(struct dvb_tuner_ops));
239 308
240 memcpy(&t->ops, &tea5761_tuner_ops, sizeof(struct tuner_operations)); 309 tuner_info("type set to %s\n", "Philips TEA5761HN FM Radio");
241 310
242 return (0); 311 return fe;
243} 312}
313
314
315EXPORT_SYMBOL_GPL(tea5761_attach);
316EXPORT_SYMBOL_GPL(tea5761_autodetection);
317
318MODULE_DESCRIPTION("Philips TEA5761 FM tuner driver");
319MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
320MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/tea5761.h b/drivers/media/video/tea5761.h
new file mode 100644
index 000000000000..73a03b427843
--- /dev/null
+++ b/drivers/media/video/tea5761.h
@@ -0,0 +1,47 @@
1/*
2 This program is free software; you can redistribute it and/or modify
3 it under the terms of the GNU General Public License as published by
4 the Free Software Foundation; either version 2 of the License, or
5 (at your option) any later version.
6
7 This program is distributed in the hope that it will be useful,
8 but WITHOUT ANY WARRANTY; without even the implied warranty of
9 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 GNU General Public License for more details.
11
12 You should have received a copy of the GNU General Public License
13 along with this program; if not, write to the Free Software
14 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15*/
16
17#ifndef __TEA5761_H__
18#define __TEA5761_H__
19
20#include <linux/i2c.h>
21#include "dvb_frontend.h"
22
23#if defined(CONFIG_TUNER_TEA5761) || (defined(CONFIG_TUNER_TEA5761_MODULE) && defined(MODULE))
24extern int tea5761_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr);
25
26extern struct dvb_frontend *tea5761_attach(struct dvb_frontend *fe,
27 struct i2c_adapter* i2c_adap,
28 u8 i2c_addr);
29#else
30static inline int tea5761_autodetection(struct i2c_adapter* i2c_adap,
31 u8 i2c_addr)
32{
33 printk(KERN_INFO "%s: not probed - driver disabled by Kconfig\n",
34 __FUNCTION__);
35 return -EINVAL;
36}
37
38static inline struct dvb_frontend *tea5761_attach(struct dvb_frontend *fe,
39 struct i2c_adapter* i2c_adap,
40 u8 i2c_addr)
41{
42 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
43 return NULL;
44}
45#endif
46
47#endif /* __TEA5761_H__ */
diff --git a/drivers/media/video/tea5767.c b/drivers/media/video/tea5767.c
index 4985d47a508f..71df419df7bc 100644
--- a/drivers/media/video/tea5767.c
+++ b/drivers/media/video/tea5767.c
@@ -11,14 +11,22 @@
11 */ 11 */
12 12
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/videodev.h>
15#include <linux/delay.h> 14#include <linux/delay.h>
16#include "tuner-driver.h" 15#include <linux/videodev.h>
16#include "tuner-i2c.h"
17#include "tea5767.h"
17 18
18#define PREFIX "TEA5767 " 19static int debug = 0;
20module_param(debug, int, 0644);
21MODULE_PARM_DESC(debug, "enable verbose debug messages");
19 22
20/* from tuner-core.c */ 23#define PREFIX "tea5767 "
21extern int tuner_debug; 24
25struct tea5767_priv {
26 struct tuner_i2c_props i2c_props;
27
28 u32 frequency;
29};
22 30
23/*****************************************************************************/ 31/*****************************************************************************/
24 32
@@ -129,13 +137,6 @@ enum tea5767_xtal_freq {
129 137
130/*****************************************************************************/ 138/*****************************************************************************/
131 139
132static void set_tv_freq(struct i2c_client *c, unsigned int freq)
133{
134 struct tuner *t = i2c_get_clientdata(c);
135
136 tuner_warn("This tuner doesn't support TV freq.\n");
137}
138
139static void tea5767_status_dump(unsigned char *buffer) 140static void tea5767_status_dump(unsigned char *buffer)
140{ 141{
141 unsigned int div, frq; 142 unsigned int div, frq;
@@ -190,14 +191,16 @@ static void tea5767_status_dump(unsigned char *buffer)
190} 191}
191 192
192/* Freq should be specifyed at 62.5 Hz */ 193/* Freq should be specifyed at 62.5 Hz */
193static void set_radio_freq(struct i2c_client *c, unsigned int frq) 194static int set_radio_freq(struct dvb_frontend *fe,
195 struct analog_parameters *params)
194{ 196{
195 struct tuner *t = i2c_get_clientdata(c); 197 struct tea5767_priv *priv = fe->tuner_priv;
198 unsigned int frq = params->frequency;
196 unsigned char buffer[5]; 199 unsigned char buffer[5];
197 unsigned div; 200 unsigned div;
198 int rc; 201 int rc;
199 202
200 tuner_dbg (PREFIX "radio freq = %d.%03d MHz\n", frq/16000,(frq/16)%1000); 203 tuner_dbg("radio freq = %d.%03d MHz\n", frq/16000,(frq/16)%1000);
201 204
202 /* Rounds freq to next decimal value - for 62.5 KHz step */ 205 /* Rounds freq to next decimal value - for 62.5 KHz step */
203 /* frq = 20*(frq/16)+radio_frq[frq%16]; */ 206 /* frq = 20*(frq/16)+radio_frq[frq%16]; */
@@ -207,7 +210,7 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq)
207 TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND; 210 TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND;
208 buffer[4] = 0; 211 buffer[4] = 0;
209 212
210 if (t->audmode == V4L2_TUNER_MODE_MONO) { 213 if (params->audmode == V4L2_TUNER_MODE_MONO) {
211 tuner_dbg("TEA5767 set to mono\n"); 214 tuner_dbg("TEA5767 set to mono\n");
212 buffer[2] |= TEA5767_MONO; 215 buffer[2] |= TEA5767_MONO;
213 } else { 216 } else {
@@ -217,26 +220,26 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq)
217 /* Should be replaced */ 220 /* Should be replaced */
218 switch (TEA5767_HIGH_LO_32768) { 221 switch (TEA5767_HIGH_LO_32768) {
219 case TEA5767_HIGH_LO_13MHz: 222 case TEA5767_HIGH_LO_13MHz:
220 tuner_dbg ("TEA5767 radio HIGH LO inject xtal @ 13 MHz\n"); 223 tuner_dbg("radio HIGH LO inject xtal @ 13 MHz\n");
221 buffer[2] |= TEA5767_HIGH_LO_INJECT; 224 buffer[2] |= TEA5767_HIGH_LO_INJECT;
222 buffer[4] |= TEA5767_PLLREF_ENABLE; 225 buffer[4] |= TEA5767_PLLREF_ENABLE;
223 div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000; 226 div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000;
224 break; 227 break;
225 case TEA5767_LOW_LO_13MHz: 228 case TEA5767_LOW_LO_13MHz:
226 tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 13 MHz\n"); 229 tuner_dbg("radio LOW LO inject xtal @ 13 MHz\n");
227 230
228 buffer[4] |= TEA5767_PLLREF_ENABLE; 231 buffer[4] |= TEA5767_PLLREF_ENABLE;
229 div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000; 232 div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000;
230 break; 233 break;
231 case TEA5767_LOW_LO_32768: 234 case TEA5767_LOW_LO_32768:
232 tuner_dbg ("TEA5767 radio LOW LO inject xtal @ 32,768 MHz\n"); 235 tuner_dbg("radio LOW LO inject xtal @ 32,768 MHz\n");
233 buffer[3] |= TEA5767_XTAL_32768; 236 buffer[3] |= TEA5767_XTAL_32768;
234 /* const 700=4000*175 Khz - to adjust freq to right value */ 237 /* const 700=4000*175 Khz - to adjust freq to right value */
235 div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15; 238 div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15;
236 break; 239 break;
237 case TEA5767_HIGH_LO_32768: 240 case TEA5767_HIGH_LO_32768:
238 default: 241 default:
239 tuner_dbg ("TEA5767 radio HIGH LO inject xtal @ 32,768 MHz\n"); 242 tuner_dbg("radio HIGH LO inject xtal @ 32,768 MHz\n");
240 243
241 buffer[2] |= TEA5767_HIGH_LO_INJECT; 244 buffer[2] |= TEA5767_HIGH_LO_INJECT;
242 buffer[3] |= TEA5767_XTAL_32768; 245 buffer[3] |= TEA5767_XTAL_32768;
@@ -246,51 +249,89 @@ static void set_radio_freq(struct i2c_client *c, unsigned int frq)
246 buffer[0] = (div >> 8) & 0x3f; 249 buffer[0] = (div >> 8) & 0x3f;
247 buffer[1] = div & 0xff; 250 buffer[1] = div & 0xff;
248 251
249 if (5 != (rc = i2c_master_send(c, buffer, 5))) 252 if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
250 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 253 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
251 254
252 if (tuner_debug) { 255 if (debug) {
253 if (5 != (rc = i2c_master_recv(c, buffer, 5))) 256 if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5)))
254 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 257 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
255 else 258 else
256 tea5767_status_dump(buffer); 259 tea5767_status_dump(buffer);
257 } 260 }
261
262 priv->frequency = frq * 125 / 2;
263
264 return 0;
258} 265}
259 266
260static int tea5767_signal(struct i2c_client *c) 267static int tea5767_read_status(struct dvb_frontend *fe, char *buffer)
261{ 268{
262 unsigned char buffer[5]; 269 struct tea5767_priv *priv = fe->tuner_priv;
263 int rc; 270 int rc;
264 struct tuner *t = i2c_get_clientdata(c);
265 271
266 memset(buffer, 0, sizeof(buffer)); 272 memset(buffer, 0, 5);
267 if (5 != (rc = i2c_master_recv(c, buffer, 5))) 273 if (5 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props, buffer, 5))) {
268 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 274 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
275 return -EREMOTEIO;
276 }
277
278 return 0;
279}
280
281static inline int tea5767_signal(struct dvb_frontend *fe, const char *buffer)
282{
283 struct tea5767_priv *priv = fe->tuner_priv;
284
285 int signal = ((buffer[3] & TEA5767_ADC_LEVEL_MASK) << 8);
286
287 tuner_dbg("Signal strength: %d\n", signal);
288
289 return signal;
290}
291
292static inline int tea5767_stereo(struct dvb_frontend *fe, const char *buffer)
293{
294 struct tea5767_priv *priv = fe->tuner_priv;
295
296 int stereo = buffer[2] & TEA5767_STEREO_MASK;
297
298 tuner_dbg("Radio ST GET = %02x\n", stereo);
269 299
270 return ((buffer[3] & TEA5767_ADC_LEVEL_MASK) << 8); 300 return (stereo ? V4L2_TUNER_SUB_STEREO : 0);
271} 301}
272 302
273static int tea5767_stereo(struct i2c_client *c) 303static int tea5767_get_status(struct dvb_frontend *fe, u32 *status)
274{ 304{
275 unsigned char buffer[5]; 305 unsigned char buffer[5];
276 int rc;
277 struct tuner *t = i2c_get_clientdata(c);
278 306
279 memset(buffer, 0, sizeof(buffer)); 307 *status = 0;
280 if (5 != (rc = i2c_master_recv(c, buffer, 5))) 308
281 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 309 if (0 == tea5767_read_status(fe, buffer)) {
310 if (tea5767_signal(fe, buffer))
311 *status = TUNER_STATUS_LOCKED;
312 if (tea5767_stereo(fe, buffer))
313 *status |= TUNER_STATUS_STEREO;
314 }
315
316 return 0;
317}
282 318
283 rc = buffer[2] & TEA5767_STEREO_MASK; 319static int tea5767_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
320{
321 unsigned char buffer[5];
284 322
285 tuner_dbg("TEA5767 radio ST GET = %02x\n", rc); 323 *strength = 0;
286 324
287 return ((buffer[2] & TEA5767_STEREO_MASK) ? V4L2_TUNER_SUB_STEREO : 0); 325 if (0 == tea5767_read_status(fe, buffer))
326 *strength = tea5767_signal(fe, buffer);
327
328 return 0;
288} 329}
289 330
290static void tea5767_standby(struct i2c_client *c) 331static int tea5767_standby(struct dvb_frontend *fe)
291{ 332{
292 unsigned char buffer[5]; 333 unsigned char buffer[5];
293 struct tuner *t = i2c_get_clientdata(c); 334 struct tea5767_priv *priv = fe->tuner_priv;
294 unsigned div, rc; 335 unsigned div, rc;
295 336
296 div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */ 337 div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */
@@ -301,25 +342,27 @@ static void tea5767_standby(struct i2c_client *c)
301 TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND | TEA5767_STDBY; 342 TEA5767_ST_NOISE_CTL | TEA5767_JAPAN_BAND | TEA5767_STDBY;
302 buffer[4] = 0; 343 buffer[4] = 0;
303 344
304 if (5 != (rc = i2c_master_send(c, buffer, 5))) 345 if (5 != (rc = tuner_i2c_xfer_send(&priv->i2c_props, buffer, 5)))
305 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc); 346 tuner_warn("i2c i/o error: rc == %d (should be 5)\n", rc);
347
348 return 0;
306} 349}
307 350
308int tea5767_autodetection(struct i2c_client *c) 351int tea5767_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr)
309{ 352{
353 struct tuner_i2c_props i2c = { .adap = i2c_adap, .addr = i2c_addr };
310 unsigned char buffer[7] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 354 unsigned char buffer[7] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
311 int rc; 355 int rc;
312 struct tuner *t = i2c_get_clientdata(c);
313 356
314 if ((rc = i2c_master_recv(c, buffer, 7))< 5) { 357 if ((rc = tuner_i2c_xfer_recv(&i2c, buffer, 7))< 5) {
315 tuner_warn("It is not a TEA5767. Received %i bytes.\n", rc); 358 printk(KERN_WARNING "It is not a TEA5767. Received %i bytes.\n", rc);
316 return EINVAL; 359 return EINVAL;
317 } 360 }
318 361
319 /* If all bytes are the same then it's a TV tuner and not a tea5767 */ 362 /* If all bytes are the same then it's a TV tuner and not a tea5767 */
320 if (buffer[0] == buffer[1] && buffer[0] == buffer[2] && 363 if (buffer[0] == buffer[1] && buffer[0] == buffer[2] &&
321 buffer[0] == buffer[3] && buffer[0] == buffer[4]) { 364 buffer[0] == buffer[3] && buffer[0] == buffer[4]) {
322 tuner_warn("All bytes are equal. It is not a TEA5767\n"); 365 printk(KERN_WARNING "All bytes are equal. It is not a TEA5767\n");
323 return EINVAL; 366 return EINVAL;
324 } 367 }
325 368
@@ -329,36 +372,74 @@ int tea5767_autodetection(struct i2c_client *c)
329 * Byte 5: bit 7:0 : == 0 372 * Byte 5: bit 7:0 : == 0
330 */ 373 */
331 if (((buffer[3] & 0x0f) != 0x00) || (buffer[4] != 0x00)) { 374 if (((buffer[3] & 0x0f) != 0x00) || (buffer[4] != 0x00)) {
332 tuner_warn("Chip ID is not zero. It is not a TEA5767\n"); 375 printk(KERN_WARNING "Chip ID is not zero. It is not a TEA5767\n");
333 return EINVAL; 376 return EINVAL;
334 } 377 }
335 378
336 /* It seems that tea5767 returns 0xff after the 5th byte */ 379 /* It seems that tea5767 returns 0xff after the 5th byte */
337 if ((buffer[5] != 0xff) || (buffer[6] != 0xff)) { 380 if ((buffer[5] != 0xff) || (buffer[6] != 0xff)) {
338 tuner_warn("Returned more than 5 bytes. It is not a TEA5767\n"); 381 printk(KERN_WARNING "Returned more than 5 bytes. It is not a TEA5767\n");
339 return EINVAL; 382 return EINVAL;
340 } 383 }
341 384
342 tuner_warn("TEA5767 detected.\n"); 385 printk(KERN_WARNING "TEA5767 detected.\n");
343 return 0; 386 return 0;
344} 387}
345 388
346static struct tuner_operations tea5767_tuner_ops = { 389static int tea5767_release(struct dvb_frontend *fe)
347 .set_tv_freq = set_tv_freq, 390{
348 .set_radio_freq = set_radio_freq, 391 kfree(fe->tuner_priv);
349 .has_signal = tea5767_signal, 392 fe->tuner_priv = NULL;
350 .is_stereo = tea5767_stereo, 393
351 .standby = tea5767_standby, 394 return 0;
395}
396
397static int tea5767_get_frequency(struct dvb_frontend *fe, u32 *frequency)
398{
399 struct tea5767_priv *priv = fe->tuner_priv;
400 *frequency = priv->frequency;
401 return 0;
402}
403
404static struct dvb_tuner_ops tea5767_tuner_ops = {
405 .info = {
406 .name = "tea5767", // Philips TEA5767HN FM Radio
407 },
408
409 .set_analog_params = set_radio_freq,
410 .sleep = tea5767_standby,
411 .release = tea5767_release,
412 .get_frequency = tea5767_get_frequency,
413 .get_status = tea5767_get_status,
414 .get_rf_strength = tea5767_get_rf_strength,
352}; 415};
353 416
354int tea5767_tuner_init(struct i2c_client *c) 417struct dvb_frontend *tea5767_attach(struct dvb_frontend *fe,
418 struct i2c_adapter* i2c_adap,
419 u8 i2c_addr)
355{ 420{
356 struct tuner *t = i2c_get_clientdata(c); 421 struct tea5767_priv *priv = NULL;
422
423 priv = kzalloc(sizeof(struct tea5767_priv), GFP_KERNEL);
424 if (priv == NULL)
425 return NULL;
426 fe->tuner_priv = priv;
427
428 priv->i2c_props.addr = i2c_addr;
429 priv->i2c_props.adap = i2c_adap;
357 430
358 tuner_info("type set to %d (%s)\n", t->type, "Philips TEA5767HN FM Radio"); 431 memcpy(&fe->ops.tuner_ops, &tea5767_tuner_ops,
359 strlcpy(c->name, "tea5767", sizeof(c->name)); 432 sizeof(struct dvb_tuner_ops));
360 433
361 memcpy(&t->ops, &tea5767_tuner_ops, sizeof(struct tuner_operations)); 434 tuner_info("type set to %s\n", "Philips TEA5767HN FM Radio");
362 435
363 return (0); 436 return fe;
364} 437}
438
439
440EXPORT_SYMBOL_GPL(tea5767_attach);
441EXPORT_SYMBOL_GPL(tea5767_autodetection);
442
443MODULE_DESCRIPTION("Philips TEA5767 FM tuner driver");
444MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
445MODULE_LICENSE("GPL");
diff --git a/drivers/media/video/tea5767.h b/drivers/media/video/tea5767.h
new file mode 100644
index 000000000000..5d78281adcc2
--- /dev/null
+++ b/drivers/media/video/tea5767.h
@@ -0,0 +1,47 @@
1/*
2 This program is free software; you can redistribute it and/or modify
3 it under the terms of the GNU General Public License as published by
4 the Free Software Foundation; either version 2 of the License, or
5 (at your option) any later version.
6
7 This program is distributed in the hope that it will be useful,
8 but WITHOUT ANY WARRANTY; without even the implied warranty of
9 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 GNU General Public License for more details.
11
12 You should have received a copy of the GNU General Public License
13 along with this program; if not, write to the Free Software
14 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15*/
16
17#ifndef __TEA5767_H__
18#define __TEA5767_H__
19
20#include <linux/i2c.h>
21#include "dvb_frontend.h"
22
23#if defined(CONFIG_TUNER_TEA5767) || (defined(CONFIG_TUNER_TEA5767_MODULE) && defined(MODULE))
24extern int tea5767_autodetection(struct i2c_adapter* i2c_adap, u8 i2c_addr);
25
26extern struct dvb_frontend *tea5767_attach(struct dvb_frontend *fe,
27 struct i2c_adapter* i2c_adap,
28 u8 i2c_addr);
29#else
30static inline int tea5767_autodetection(struct i2c_adapter* i2c_adap,
31 u8 i2c_addr)
32{
33 printk(KERN_INFO "%s: not probed - driver disabled by Kconfig\n",
34 __FUNCTION__);
35 return -EINVAL;
36}
37
38static inline struct dvb_frontend *tea5767_attach(struct dvb_frontend *fe,
39 struct i2c_adapter* i2c_adap,
40 u8 i2c_addr)
41{
42 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
43 return NULL;
44}
45#endif
46
47#endif /* __TEA5767_H__ */
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c
index e646465464a1..94843086cda9 100644
--- a/drivers/media/video/tuner-core.c
+++ b/drivers/media/video/tuner-core.c
@@ -5,7 +5,6 @@
5 */ 5 */
6 6
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/moduleparam.h>
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/string.h> 9#include <linux/string.h>
11#include <linux/timer.h> 10#include <linux/timer.h>
@@ -15,12 +14,17 @@
15#include <linux/poll.h> 14#include <linux/poll.h>
16#include <linux/i2c.h> 15#include <linux/i2c.h>
17#include <linux/types.h> 16#include <linux/types.h>
18#include <linux/videodev.h>
19#include <linux/init.h> 17#include <linux/init.h>
20 18#include <linux/videodev.h>
21#include <media/tuner.h> 19#include <media/tuner.h>
20#include <media/tuner-types.h>
22#include <media/v4l2-common.h> 21#include <media/v4l2-common.h>
23#include "tuner-driver.h" 22#include "tuner-driver.h"
23#include "mt20xx.h"
24#include "tda8290.h"
25#include "tea5761.h"
26#include "tea5767.h"
27#include "tuner-simple.h"
24 28
25#define UNSET (-1U) 29#define UNSET (-1U)
26 30
@@ -72,6 +76,51 @@ static struct i2c_client client_template;
72 76
73/* ---------------------------------------------------------------------- */ 77/* ---------------------------------------------------------------------- */
74 78
79static void fe_set_freq(struct tuner *t, unsigned int freq)
80{
81 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
82
83 struct analog_parameters params = {
84 .frequency = freq,
85 .mode = t->mode,
86 .audmode = t->audmode,
87 .std = t->std
88 };
89
90 if (NULL == fe_tuner_ops->set_analog_params) {
91 tuner_warn("Tuner frontend module has no way to set freq\n");
92 return;
93 }
94 fe_tuner_ops->set_analog_params(&t->fe, &params);
95}
96
97static void fe_release(struct tuner *t)
98{
99 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
100
101 if (fe_tuner_ops->release)
102 fe_tuner_ops->release(&t->fe);
103}
104
105static void fe_standby(struct tuner *t)
106{
107 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
108
109 if (fe_tuner_ops->sleep)
110 fe_tuner_ops->sleep(&t->fe);
111}
112
113static int fe_has_signal(struct tuner *t)
114{
115 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
116 u16 strength;
117
118 if (fe_tuner_ops->get_rf_strength)
119 fe_tuner_ops->get_rf_strength(&t->fe, &strength);
120
121 return strength;
122}
123
75/* Set tuner frequency, freq in Units of 62.5kHz = 1/16MHz */ 124/* Set tuner frequency, freq in Units of 62.5kHz = 1/16MHz */
76static void set_tv_freq(struct i2c_client *c, unsigned int freq) 125static void set_tv_freq(struct i2c_client *c, unsigned int freq)
77{ 126{
@@ -96,7 +145,7 @@ static void set_tv_freq(struct i2c_client *c, unsigned int freq)
96 else 145 else
97 freq = tv_range[1] * 16; 146 freq = tv_range[1] * 16;
98 } 147 }
99 t->ops.set_tv_freq(c, freq); 148 t->ops.set_tv_freq(t, freq);
100} 149}
101 150
102static void set_radio_freq(struct i2c_client *c, unsigned int freq) 151static void set_radio_freq(struct i2c_client *c, unsigned int freq)
@@ -123,7 +172,7 @@ static void set_radio_freq(struct i2c_client *c, unsigned int freq)
123 freq = radio_range[1] * 16000; 172 freq = radio_range[1] * 16000;
124 } 173 }
125 174
126 t->ops.set_radio_freq(c, freq); 175 t->ops.set_radio_freq(t, freq);
127} 176}
128 177
129static void set_freq(struct i2c_client *c, unsigned long freq) 178static void set_freq(struct i2c_client *c, unsigned long freq)
@@ -147,11 +196,51 @@ static void set_freq(struct i2c_client *c, unsigned long freq)
147 } 196 }
148} 197}
149 198
199static void tuner_i2c_address_check(struct tuner *t)
200{
201 if ((t->type == UNSET || t->type == TUNER_ABSENT) ||
202 ((t->i2c.addr < 0x64) || (t->i2c.addr > 0x6f)))
203 return;
204
205 tuner_warn("====================== WARNING! ======================\n");
206 tuner_warn("Support for tuners in i2c address range 0x64 thru 0x6f\n");
207 tuner_warn("will soon be dropped. This message indicates that your\n");
208 tuner_warn("hardware has a %s tuner at i2c address 0x%02x.\n",
209 t->i2c.name, t->i2c.addr);
210 tuner_warn("To ensure continued support for your device, please\n");
211 tuner_warn("send a copy of this message, along with full dmesg\n");
212 tuner_warn("output to v4l-dvb-maintainer@linuxtv.org\n");
213 tuner_warn("Please use subject line: \"obsolete tuner i2c address.\"\n");
214 tuner_warn("driver: %s, addr: 0x%02x, type: %d (%s)\n",
215 t->i2c.adapter->name, t->i2c.addr, t->type,
216 tuners[t->type].name);
217 tuner_warn("====================== WARNING! ======================\n");
218}
219
220static void attach_tda8290(struct tuner *t)
221{
222 struct tda8290_config cfg = {
223 .lna_cfg = &t->config,
224 .tuner_callback = t->tuner_callback
225 };
226 tda8290_attach(&t->fe, t->i2c.adapter, t->i2c.addr, &cfg);
227}
228
229static void attach_simple_tuner(struct tuner *t)
230{
231 struct simple_tuner_config cfg = {
232 .type = t->type,
233 .tun = &tuners[t->type]
234 };
235 simple_tuner_attach(&t->fe, t->i2c.adapter, t->i2c.addr, &cfg);
236}
237
150static void set_type(struct i2c_client *c, unsigned int type, 238static void set_type(struct i2c_client *c, unsigned int type,
151 unsigned int new_mode_mask, unsigned int new_config, 239 unsigned int new_mode_mask, unsigned int new_config,
152 int (*tuner_callback) (void *dev, int command,int arg)) 240 int (*tuner_callback) (void *dev, int command,int arg))
153{ 241{
154 struct tuner *t = i2c_get_clientdata(c); 242 struct tuner *t = i2c_get_clientdata(c);
243 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
155 unsigned char buffer[4]; 244 unsigned char buffer[4];
156 245
157 if (type == UNSET || type == TUNER_ABSENT) { 246 if (type == UNSET || type == TUNER_ABSENT) {
@@ -180,7 +269,7 @@ static void set_type(struct i2c_client *c, unsigned int type,
180 269
181 /* discard private data, in case set_type() was previously called */ 270 /* discard private data, in case set_type() was previously called */
182 if (t->ops.release) 271 if (t->ops.release)
183 t->ops.release(c); 272 t->ops.release(t);
184 else { 273 else {
185 kfree(t->priv); 274 kfree(t->priv);
186 t->priv = NULL; 275 t->priv = NULL;
@@ -188,13 +277,15 @@ static void set_type(struct i2c_client *c, unsigned int type,
188 277
189 switch (t->type) { 278 switch (t->type) {
190 case TUNER_MT2032: 279 case TUNER_MT2032:
191 microtune_init(c); 280 microtune_attach(&t->fe, t->i2c.adapter, t->i2c.addr);
192 break; 281 break;
193 case TUNER_PHILIPS_TDA8290: 282 case TUNER_PHILIPS_TDA8290:
194 tda8290_init(c); 283 {
284 attach_tda8290(t);
195 break; 285 break;
286 }
196 case TUNER_TEA5767: 287 case TUNER_TEA5767:
197 if (tea5767_tuner_init(c) == EINVAL) { 288 if (tea5767_attach(&t->fe, t->i2c.adapter, t->i2c.addr) == NULL) {
198 t->type = TUNER_ABSENT; 289 t->type = TUNER_ABSENT;
199 t->mode_mask = T_UNINITIALIZED; 290 t->mode_mask = T_UNINITIALIZED;
200 return; 291 return;
@@ -203,7 +294,7 @@ static void set_type(struct i2c_client *c, unsigned int type,
203 break; 294 break;
204#ifdef CONFIG_TUNER_TEA5761 295#ifdef CONFIG_TUNER_TEA5761
205 case TUNER_TEA5761: 296 case TUNER_TEA5761:
206 if (tea5761_tuner_init(c) == EINVAL) { 297 if (tea5761_attach(&t->fe, t->i2c.adapter, t->i2c.addr) == NULL) {
207 t->type = TUNER_ABSENT; 298 t->type = TUNER_ABSENT;
208 t->mode_mask = T_UNINITIALIZED; 299 t->mode_mask = T_UNINITIALIZED;
209 return; 300 return;
@@ -221,7 +312,7 @@ static void set_type(struct i2c_client *c, unsigned int type,
221 buffer[2] = 0x86; 312 buffer[2] = 0x86;
222 buffer[3] = 0x54; 313 buffer[3] = 0x54;
223 i2c_master_send(c, buffer, 4); 314 i2c_master_send(c, buffer, 4);
224 default_tuner_init(c); 315 attach_simple_tuner(t);
225 break; 316 break;
226 case TUNER_PHILIPS_TD1316: 317 case TUNER_PHILIPS_TD1316:
227 buffer[0] = 0x0b; 318 buffer[0] = 0x0b;
@@ -229,16 +320,28 @@ static void set_type(struct i2c_client *c, unsigned int type,
229 buffer[2] = 0x86; 320 buffer[2] = 0x86;
230 buffer[3] = 0xa4; 321 buffer[3] = 0xa4;
231 i2c_master_send(c,buffer,4); 322 i2c_master_send(c,buffer,4);
232 default_tuner_init(c); 323 attach_simple_tuner(t);
233 break; 324 break;
234 case TUNER_TDA9887: 325 case TUNER_TDA9887:
235 tda9887_tuner_init(c); 326 tda9887_tuner_init(t);
236 break; 327 break;
237 default: 328 default:
238 default_tuner_init(c); 329 attach_simple_tuner(t);
239 break; 330 break;
240 } 331 }
241 332
333 if (fe_tuner_ops->set_analog_params) {
334 strlcpy(t->i2c.name, fe_tuner_ops->info.name, sizeof(t->i2c.name));
335
336 t->ops.set_tv_freq = fe_set_freq;
337 t->ops.set_radio_freq = fe_set_freq;
338 t->ops.standby = fe_standby;
339 t->ops.release = fe_release;
340 t->ops.has_signal = fe_has_signal;
341 }
342
343 tuner_info("type set to %s\n", t->i2c.name);
344
242 if (t->mode_mask == T_UNINITIALIZED) 345 if (t->mode_mask == T_UNINITIALIZED)
243 t->mode_mask = new_mode_mask; 346 t->mode_mask = new_mode_mask;
244 347
@@ -246,6 +349,7 @@ static void set_type(struct i2c_client *c, unsigned int type,
246 tuner_dbg("%s %s I2C addr 0x%02x with type %d used for 0x%02x\n", 349 tuner_dbg("%s %s I2C addr 0x%02x with type %d used for 0x%02x\n",
247 c->adapter->name, c->driver->driver.name, c->addr << 1, type, 350 c->adapter->name, c->driver->driver.name, c->addr << 1, type,
248 t->mode_mask); 351 t->mode_mask);
352 tuner_i2c_address_check(t);
249} 353}
250 354
251/* 355/*
@@ -406,10 +510,10 @@ static int tuner_fixup_std(struct tuner *t)
406 return 0; 510 return 0;
407} 511}
408 512
409static void tuner_status(struct i2c_client *client) 513static void tuner_status(struct tuner *t)
410{ 514{
411 struct tuner *t = i2c_get_clientdata(client);
412 unsigned long freq, freq_fraction; 515 unsigned long freq, freq_fraction;
516 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
413 const char *p; 517 const char *p;
414 518
415 switch (t->mode) { 519 switch (t->mode) {
@@ -430,11 +534,20 @@ static void tuner_status(struct i2c_client *client)
430 tuner_info("Standard: 0x%08lx\n", (unsigned long)t->std); 534 tuner_info("Standard: 0x%08lx\n", (unsigned long)t->std);
431 if (t->mode != V4L2_TUNER_RADIO) 535 if (t->mode != V4L2_TUNER_RADIO)
432 return; 536 return;
537 if (fe_tuner_ops->get_status) {
538 u32 tuner_status;
539
540 fe_tuner_ops->get_status(&t->fe, &tuner_status);
541 if (tuner_status & TUNER_STATUS_LOCKED)
542 tuner_info("Tuner is locked.\n");
543 if (tuner_status & TUNER_STATUS_STEREO)
544 tuner_info("Stereo: yes\n");
545 }
433 if (t->ops.has_signal) { 546 if (t->ops.has_signal) {
434 tuner_info("Signal strength: %d\n", t->ops.has_signal(client)); 547 tuner_info("Signal strength: %d\n", t->ops.has_signal(t));
435 } 548 }
436 if (t->ops.is_stereo) { 549 if (t->ops.is_stereo) {
437 tuner_info("Stereo: %s\n", t->ops.is_stereo(client) ? "yes" : "no"); 550 tuner_info("Stereo: %s\n", t->ops.is_stereo(t) ? "yes" : "no");
438 } 551 }
439} 552}
440 553
@@ -483,7 +596,7 @@ static int tuner_attach(struct i2c_adapter *adap, int addr, int kind)
483 switch (addr) { 596 switch (addr) {
484#ifdef CONFIG_TUNER_TEA5761 597#ifdef CONFIG_TUNER_TEA5761
485 case 0x10: 598 case 0x10:
486 if (tea5761_autodetection(&t->i2c) != EINVAL) { 599 if (tea5761_autodetection(t->i2c.adapter, t->i2c.addr) != EINVAL) {
487 t->type = TUNER_TEA5761; 600 t->type = TUNER_TEA5761;
488 t->mode_mask = T_RADIO; 601 t->mode_mask = T_RADIO;
489 t->mode = T_STANDBY; 602 t->mode = T_STANDBY;
@@ -500,7 +613,7 @@ static int tuner_attach(struct i2c_adapter *adap, int addr, int kind)
500 case 0x4b: 613 case 0x4b:
501 /* If chip is not tda8290, don't register. 614 /* If chip is not tda8290, don't register.
502 since it can be tda9887*/ 615 since it can be tda9887*/
503 if (tda8290_probe(&t->i2c) == 0) { 616 if (tda8290_probe(t->i2c.adapter, t->i2c.addr) == 0) {
504 tuner_dbg("chip at addr %x is a tda8290\n", addr); 617 tuner_dbg("chip at addr %x is a tda8290\n", addr);
505 } else { 618 } else {
506 /* Default is being tda9887 */ 619 /* Default is being tda9887 */
@@ -511,7 +624,7 @@ static int tuner_attach(struct i2c_adapter *adap, int addr, int kind)
511 } 624 }
512 break; 625 break;
513 case 0x60: 626 case 0x60:
514 if (tea5767_autodetection(&t->i2c) != EINVAL) { 627 if (tea5767_autodetection(t->i2c.adapter, t->i2c.addr) != EINVAL) {
515 t->type = TUNER_TEA5767; 628 t->type = TUNER_TEA5767;
516 t->mode_mask = T_RADIO; 629 t->mode_mask = T_RADIO;
517 t->mode = T_STANDBY; 630 t->mode = T_STANDBY;
@@ -548,6 +661,28 @@ static int tuner_probe(struct i2c_adapter *adap)
548 normal_i2c[1] = I2C_CLIENT_END; 661 normal_i2c[1] = I2C_CLIENT_END;
549 } 662 }
550 663
664 /* HACK: Ignore 0x6b and 0x6f on cx88 boards.
665 * FusionHDTV5 RT Gold has an ir receiver at 0x6b
666 * and an RTC at 0x6f which can get corrupted if probed.
667 */
668 if ((adap->id == I2C_HW_B_CX2388x) ||
669 (adap->id == I2C_HW_B_CX23885)) {
670 unsigned int i = 0;
671
672 while (i < I2C_CLIENT_MAX_OPTS && ignore[i] != I2C_CLIENT_END)
673 i += 2;
674 if (i + 4 < I2C_CLIENT_MAX_OPTS) {
675 ignore[i+0] = adap->nr;
676 ignore[i+1] = 0x6b;
677 ignore[i+2] = adap->nr;
678 ignore[i+3] = 0x6f;
679 ignore[i+4] = I2C_CLIENT_END;
680 } else
681 printk(KERN_WARNING "tuner: "
682 "too many options specified "
683 "in i2c probe ignore list!\n");
684 }
685
551 default_mode_mask = T_RADIO | T_ANALOG_TV | T_DIGITAL_TV; 686 default_mode_mask = T_RADIO | T_ANALOG_TV | T_DIGITAL_TV;
552 687
553 if (adap->class & I2C_CLASS_TV_ANALOG) 688 if (adap->class & I2C_CLASS_TV_ANALOG)
@@ -568,7 +703,7 @@ static int tuner_detach(struct i2c_client *client)
568 } 703 }
569 704
570 if (t->ops.release) 705 if (t->ops.release)
571 t->ops.release(client); 706 t->ops.release(t);
572 else { 707 else {
573 kfree(t->priv); 708 kfree(t->priv);
574 } 709 }
@@ -593,7 +728,7 @@ static inline int set_mode(struct i2c_client *client, struct tuner *t, int mode,
593 if (check_mode(t, cmd) == EINVAL) { 728 if (check_mode(t, cmd) == EINVAL) {
594 t->mode = T_STANDBY; 729 t->mode = T_STANDBY;
595 if (t->ops.standby) 730 if (t->ops.standby)
596 t->ops.standby (client); 731 t->ops.standby(t);
597 return EINVAL; 732 return EINVAL;
598 } 733 }
599 return 0; 734 return 0;
@@ -615,6 +750,7 @@ static inline int check_v4l2(struct tuner *t)
615static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg) 750static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
616{ 751{
617 struct tuner *t = i2c_get_clientdata(client); 752 struct tuner *t = i2c_get_clientdata(client);
753 struct dvb_tuner_ops *fe_tuner_ops = &t->fe.ops.tuner_ops;
618 754
619 if (tuner_debug>1) 755 if (tuner_debug>1)
620 v4l_i2c_print_ioctl(&(t->i2c),cmd); 756 v4l_i2c_print_ioctl(&(t->i2c),cmd);
@@ -642,7 +778,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
642 return 0; 778 return 0;
643 t->mode = T_STANDBY; 779 t->mode = T_STANDBY;
644 if (t->ops.standby) 780 if (t->ops.standby)
645 t->ops.standby (client); 781 t->ops.standby(t);
646 break; 782 break;
647#ifdef CONFIG_VIDEO_V4L1 783#ifdef CONFIG_VIDEO_V4L1
648 case VIDIOCSAUDIO: 784 case VIDIOCSAUDIO:
@@ -701,16 +837,27 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
701 return 0; 837 return 0;
702 838
703 if (V4L2_TUNER_RADIO == t->mode) { 839 if (V4L2_TUNER_RADIO == t->mode) {
704 if (t->ops.has_signal) 840 if (fe_tuner_ops->get_status) {
705 vt->signal = t->ops.has_signal(client); 841 u32 tuner_status;
706 if (t->ops.is_stereo) { 842
707 if (t->ops.is_stereo(client)) 843 fe_tuner_ops->get_status(&t->fe, &tuner_status);
708 vt->flags |= 844 if (tuner_status & TUNER_STATUS_STEREO)
709 VIDEO_TUNER_STEREO_ON; 845 vt->flags |= VIDEO_TUNER_STEREO_ON;
710 else 846 else
711 vt->flags &= 847 vt->flags &= ~VIDEO_TUNER_STEREO_ON;
712 ~VIDEO_TUNER_STEREO_ON; 848 } else {
849 if (t->ops.is_stereo) {
850 if (t->ops.is_stereo(t))
851 vt->flags |=
852 VIDEO_TUNER_STEREO_ON;
853 else
854 vt->flags &=
855 ~VIDEO_TUNER_STEREO_ON;
856 }
713 } 857 }
858 if (t->ops.has_signal)
859 vt->signal = t->ops.has_signal(t);
860
714 vt->flags |= VIDEO_TUNER_LOW; /* Allow freqs at 62.5 Hz */ 861 vt->flags |= VIDEO_TUNER_LOW; /* Allow freqs at 62.5 Hz */
715 862
716 vt->rangelow = radio_range[0] * 16000; 863 vt->rangelow = radio_range[0] * 16000;
@@ -732,9 +879,17 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
732 if (check_v4l2(t) == EINVAL) 879 if (check_v4l2(t) == EINVAL)
733 return 0; 880 return 0;
734 881
735 if (V4L2_TUNER_RADIO == t->mode && t->ops.is_stereo) 882 if (V4L2_TUNER_RADIO == t->mode) {
736 va->mode = t->ops.is_stereo(client) 883 if (fe_tuner_ops->get_status) {
737 ? VIDEO_SOUND_STEREO : VIDEO_SOUND_MONO; 884 u32 tuner_status;
885
886 fe_tuner_ops->get_status(&t->fe, &tuner_status);
887 va->mode = (tuner_status & TUNER_STATUS_STEREO)
888 ? VIDEO_SOUND_STEREO : VIDEO_SOUND_MONO;
889 } else if (t->ops.is_stereo)
890 va->mode = t->ops.is_stereo(t)
891 ? VIDEO_SOUND_STEREO : VIDEO_SOUND_MONO;
892 }
738 return 0; 893 return 0;
739 } 894 }
740#endif 895#endif
@@ -785,6 +940,15 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
785 return 0; 940 return 0;
786 switch_v4l2(); 941 switch_v4l2();
787 f->type = t->mode; 942 f->type = t->mode;
943 if (fe_tuner_ops->get_frequency) {
944 u32 abs_freq;
945
946 fe_tuner_ops->get_frequency(&t->fe, &abs_freq);
947 f->frequency = (V4L2_TUNER_RADIO == t->mode) ?
948 (abs_freq * 2 + 125/2) / 125 :
949 (abs_freq + 62500/2) / 62500;
950 break;
951 }
788 f->frequency = (V4L2_TUNER_RADIO == t->mode) ? 952 f->frequency = (V4L2_TUNER_RADIO == t->mode) ?
789 t->radio_freq : t->tv_freq; 953 t->radio_freq : t->tv_freq;
790 break; 954 break;
@@ -799,7 +963,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
799 963
800 tuner->type = t->mode; 964 tuner->type = t->mode;
801 if (t->ops.get_afc) 965 if (t->ops.get_afc)
802 tuner->afc=t->ops.get_afc(client); 966 tuner->afc=t->ops.get_afc(t);
803 if (t->mode == V4L2_TUNER_ANALOG_TV) 967 if (t->mode == V4L2_TUNER_ANALOG_TV)
804 tuner->capability |= V4L2_TUNER_CAP_NORM; 968 tuner->capability |= V4L2_TUNER_CAP_NORM;
805 if (t->mode != V4L2_TUNER_RADIO) { 969 if (t->mode != V4L2_TUNER_RADIO) {
@@ -809,16 +973,22 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
809 } 973 }
810 974
811 /* radio mode */ 975 /* radio mode */
812 if (t->ops.has_signal)
813 tuner->signal = t->ops.has_signal(client);
814
815 tuner->rxsubchans = 976 tuner->rxsubchans =
816 V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; 977 V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
817 if (t->ops.is_stereo) { 978 if (fe_tuner_ops->get_status) {
818 tuner->rxsubchans = t->ops.is_stereo(client) ? 979 u32 tuner_status;
980
981 fe_tuner_ops->get_status(&t->fe, &tuner_status);
982 tuner->rxsubchans = (tuner_status & TUNER_STATUS_STEREO) ?
819 V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO; 983 V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO;
984 } else {
985 if (t->ops.is_stereo) {
986 tuner->rxsubchans = t->ops.is_stereo(t) ?
987 V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO;
988 }
820 } 989 }
821 990 if (t->ops.has_signal)
991 tuner->signal = t->ops.has_signal(t);
822 tuner->capability |= 992 tuner->capability |=
823 V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO; 993 V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;
824 tuner->audmode = t->audmode; 994 tuner->audmode = t->audmode;
@@ -844,7 +1014,7 @@ static int tuner_command(struct i2c_client *client, unsigned int cmd, void *arg)
844 } 1014 }
845 case VIDIOC_LOG_STATUS: 1015 case VIDIOC_LOG_STATUS:
846 if (t->ops.tuner_status) 1016 if (t->ops.tuner_status)
847 t->ops.tuner_status(client); 1017 t->ops.tuner_status(t);
848 break; 1018 break;
849 } 1019 }
850 1020
diff --git a/drivers/media/video/tuner-driver.h b/drivers/media/video/tuner-driver.h
index 0334a9125077..28a10da76d12 100644
--- a/drivers/media/video/tuner-driver.h
+++ b/drivers/media/video/tuner-driver.h
@@ -19,23 +19,27 @@
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/ 20*/
21 21
22#ifndef __TUNER_HW_H__ 22#ifndef __TUNER_DRIVER_H__
23#define __TUNER_HW_H__ 23#define __TUNER_DRIVER_H__
24 24
25#include <linux/videodev2.h> 25#include <linux/videodev2.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include "tuner-i2c.h"
28#include "dvb_frontend.h"
27 29
28extern unsigned const int tuner_count; 30extern unsigned const int tuner_count;
29 31
32struct tuner;
33
30struct tuner_operations { 34struct tuner_operations {
31 void (*set_tv_freq)(struct i2c_client *c, unsigned int freq); 35 void (*set_tv_freq)(struct tuner *t, unsigned int freq);
32 void (*set_radio_freq)(struct i2c_client *c, unsigned int freq); 36 void (*set_radio_freq)(struct tuner *t, unsigned int freq);
33 int (*has_signal)(struct i2c_client *c); 37 int (*has_signal)(struct tuner *t);
34 int (*is_stereo)(struct i2c_client *c); 38 int (*is_stereo)(struct tuner *t);
35 int (*get_afc)(struct i2c_client *c); 39 int (*get_afc)(struct tuner *t);
36 void (*tuner_status)(struct i2c_client *c); 40 void (*tuner_status)(struct tuner *t);
37 void (*standby)(struct i2c_client *c); 41 void (*standby)(struct tuner *t);
38 void (*release)(struct i2c_client *c); 42 void (*release)(struct tuner *t);
39}; 43};
40 44
41struct tuner { 45struct tuner {
@@ -49,13 +53,14 @@ struct tuner {
49 53
50 unsigned int tv_freq; /* keep track of the current settings */ 54 unsigned int tv_freq; /* keep track of the current settings */
51 unsigned int radio_freq; 55 unsigned int radio_freq;
52 u16 last_div;
53 unsigned int audmode; 56 unsigned int audmode;
54 v4l2_std_id std; 57 v4l2_std_id std;
55 58
56 int using_v4l2; 59 int using_v4l2;
57 void *priv; 60 void *priv;
58 61
62 struct dvb_frontend fe;
63
59 /* used by tda9887 */ 64 /* used by tda9887 */
60 unsigned int tda9887_config; 65 unsigned int tda9887_config;
61 66
@@ -67,20 +72,7 @@ struct tuner {
67 72
68/* ------------------------------------------------------------------------ */ 73/* ------------------------------------------------------------------------ */
69 74
70extern int default_tuner_init(struct i2c_client *c); 75extern int tda9887_tuner_init(struct tuner *t);
71
72extern int tda9887_tuner_init(struct i2c_client *c);
73
74extern int microtune_init(struct i2c_client *c);
75
76extern int tda8290_init(struct i2c_client *c);
77extern int tda8290_probe(struct i2c_client *c);
78
79extern int tea5761_tuner_init(struct i2c_client *c);
80extern int tea5761_autodetection(struct i2c_client *c);
81
82extern int tea5767_autodetection(struct i2c_client *c);
83extern int tea5767_tuner_init(struct i2c_client *c);
84 76
85/* ------------------------------------------------------------------------ */ 77/* ------------------------------------------------------------------------ */
86 78
@@ -96,7 +88,7 @@ extern int tea5767_tuner_init(struct i2c_client *c);
96 printk(KERN_DEBUG "%s %d-%04x: " fmt, t->i2c.driver->driver.name, \ 88 printk(KERN_DEBUG "%s %d-%04x: " fmt, t->i2c.driver->driver.name, \
97 i2c_adapter_id(t->i2c.adapter), t->i2c.addr , ##arg); } while (0) 89 i2c_adapter_id(t->i2c.adapter), t->i2c.addr , ##arg); } while (0)
98 90
99#endif /* __TUNER_HW_H__ */ 91#endif /* __TUNER_DRIVER_H__ */
100 92
101/* 93/*
102 * Overrides for Emacs so that we follow Linus's tabbing style. 94 * Overrides for Emacs so that we follow Linus's tabbing style.
diff --git a/drivers/media/video/tuner-i2c.h b/drivers/media/video/tuner-i2c.h
new file mode 100644
index 000000000000..159019ec3373
--- /dev/null
+++ b/drivers/media/video/tuner-i2c.h
@@ -0,0 +1,70 @@
1/*
2 tuner-i2c.h - i2c interface for different tuners
3
4 Copyright (C) 2007 Michael Krufky (mkrufky@linuxtv.org)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __TUNER_I2C_H__
22#define __TUNER_I2C_H__
23
24#include <linux/i2c.h>
25
26struct tuner_i2c_props {
27 u8 addr;
28 struct i2c_adapter *adap;
29};
30
31static inline int tuner_i2c_xfer_send(struct tuner_i2c_props *props, char *buf, int len)
32{
33 struct i2c_msg msg = { .addr = props->addr, .flags = 0,
34 .buf = buf, .len = len };
35 int ret = i2c_transfer(props->adap, &msg, 1);
36
37 return (ret == 1) ? len : ret;
38}
39
40static inline int tuner_i2c_xfer_recv(struct tuner_i2c_props *props, char *buf, int len)
41{
42 struct i2c_msg msg = { .addr = props->addr, .flags = I2C_M_RD,
43 .buf = buf, .len = len };
44 int ret = i2c_transfer(props->adap, &msg, 1);
45
46 return (ret == 1) ? len : ret;
47}
48
49#ifndef __TUNER_DRIVER_H__
50#define tuner_warn(fmt, arg...) do {\
51 printk(KERN_WARNING PREFIX "%d-%04x: " fmt, \
52 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr , ##arg); } while (0)
53#define tuner_info(fmt, arg...) do {\
54 printk(KERN_INFO PREFIX "%d-%04x: " fmt, \
55 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr , ##arg); } while (0)
56#define tuner_dbg(fmt, arg...) do {\
57 if ((debug)) \
58 printk(KERN_DEBUG PREFIX "%d-%04x: " fmt, \
59 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr , ##arg); } while (0)
60#endif /* __TUNER_DRIVER_H__ */
61
62#endif /* __TUNER_I2C_H__ */
63
64/*
65 * Overrides for Emacs so that we follow Linus's tabbing style.
66 * ---------------------------------------------------------------------------
67 * Local variables:
68 * c-basic-offset: 8
69 * End:
70 */
diff --git a/drivers/media/video/tuner-simple.c b/drivers/media/video/tuner-simple.c
index 2d57e8bc0db3..7b93d3b1f4c6 100644
--- a/drivers/media/video/tuner-simple.c
+++ b/drivers/media/video/tuner-simple.c
@@ -1,7 +1,8 @@
1/* 1/*
2 *
3 * i2c tv tuner chip device driver 2 * i2c tv tuner chip device driver
4 * controls all those simple 4-control-bytes style tuners. 3 * controls all those simple 4-control-bytes style tuners.
4 *
5 * This "tuner-simple" module was split apart from the original "tuner" module.
5 */ 6 */
6#include <linux/delay.h> 7#include <linux/delay.h>
7#include <linux/i2c.h> 8#include <linux/i2c.h>
@@ -9,7 +10,14 @@
9#include <media/tuner.h> 10#include <media/tuner.h>
10#include <media/v4l2-common.h> 11#include <media/v4l2-common.h>
11#include <media/tuner-types.h> 12#include <media/tuner-types.h>
12#include "tuner-driver.h" 13#include "tuner-i2c.h"
14#include "tuner-simple.h"
15
16static int debug = 0;
17module_param(debug, int, 0644);
18MODULE_PARM_DESC(debug, "enable verbose debug messages");
19
20#define PREFIX "tuner-simple "
13 21
14static int offset = 0; 22static int offset = 0;
15module_param(offset, int, 0664); 23module_param(offset, int, 0664);
@@ -82,59 +90,102 @@ MODULE_PARM_DESC(offset,"Allows to specify an offset for tuner");
82#define TUNER_PLL_LOCKED 0x40 90#define TUNER_PLL_LOCKED 0x40
83#define TUNER_STEREO_MK3 0x04 91#define TUNER_STEREO_MK3 0x04
84 92
93struct tuner_simple_priv {
94 u16 last_div;
95 struct tuner_i2c_props i2c_props;
96
97 unsigned int type;
98 struct tunertype *tun;
99
100 u32 frequency;
101};
102
85/* ---------------------------------------------------------------------- */ 103/* ---------------------------------------------------------------------- */
86 104
87static int tuner_getstatus(struct i2c_client *c) 105static int tuner_read_status(struct dvb_frontend *fe)
88{ 106{
107 struct tuner_simple_priv *priv = fe->tuner_priv;
89 unsigned char byte; 108 unsigned char byte;
90 109
91 if (1 != i2c_master_recv(c,&byte,1)) 110 if (1 != tuner_i2c_xfer_recv(&priv->i2c_props,&byte,1))
92 return 0; 111 return 0;
93 112
94 return byte; 113 return byte;
95} 114}
96 115
97static int tuner_signal(struct i2c_client *c) 116static inline int tuner_signal(const int status)
98{ 117{
99 return (tuner_getstatus(c) & TUNER_SIGNAL) << 13; 118 return (status & TUNER_SIGNAL) << 13;
100} 119}
101 120
102static int tuner_stereo(struct i2c_client *c) 121static inline int tuner_stereo(const int type, const int status)
103{ 122{
104 int stereo, status; 123 switch (type) {
105 struct tuner *t = i2c_get_clientdata(c);
106
107 status = tuner_getstatus (c);
108
109 switch (t->type) {
110 case TUNER_PHILIPS_FM1216ME_MK3: 124 case TUNER_PHILIPS_FM1216ME_MK3:
111 case TUNER_PHILIPS_FM1236_MK3: 125 case TUNER_PHILIPS_FM1236_MK3:
112 case TUNER_PHILIPS_FM1256_IH3: 126 case TUNER_PHILIPS_FM1256_IH3:
113 case TUNER_LG_NTSC_TAPE: 127 case TUNER_LG_NTSC_TAPE:
114 stereo = ((status & TUNER_SIGNAL) == TUNER_STEREO_MK3); 128 return ((status & TUNER_SIGNAL) == TUNER_STEREO_MK3);
115 break;
116 default: 129 default:
117 stereo = status & TUNER_STEREO; 130 return status & TUNER_STEREO;
118 } 131 }
132}
133
134static inline int tuner_islocked(const int status)
135{
136 return (status & TUNER_FL);
137}
119 138
120 return stereo; 139static inline int tuner_afcstatus(const int status)
140{
141 return (status & TUNER_AFC) - 2;
121} 142}
122 143
123 144
145static int simple_get_status(struct dvb_frontend *fe, u32 *status)
146{
147 struct tuner_simple_priv *priv = fe->tuner_priv;
148 int tuner_status = tuner_read_status(fe);
149
150 *status = 0;
151
152 if (tuner_islocked(tuner_status))
153 *status = TUNER_STATUS_LOCKED;
154 if (tuner_stereo(priv->type, tuner_status))
155 *status |= TUNER_STATUS_STEREO;
156
157 tuner_dbg("AFC Status: %d\n", tuner_afcstatus(tuner_status));
158
159 return 0;
160}
161
162static int simple_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
163{
164 struct tuner_simple_priv *priv = fe->tuner_priv;
165 int signal = tuner_signal(tuner_read_status(fe));
166
167 *strength = signal;
168
169 tuner_dbg("Signal strength: %d\n", signal);
170
171 return 0;
172}
173
124/* ---------------------------------------------------------------------- */ 174/* ---------------------------------------------------------------------- */
125 175
126static void default_set_tv_freq(struct i2c_client *c, unsigned int freq) 176static int simple_set_tv_freq(struct dvb_frontend *fe,
177 struct analog_parameters *params)
127{ 178{
128 struct tuner *t = i2c_get_clientdata(c); 179 struct tuner_simple_priv *priv = fe->tuner_priv;
129 u8 config, cb, tuneraddr; 180 u8 config, cb, tuneraddr;
130 u16 div; 181 u16 div;
131 struct tunertype *tun; 182 struct tunertype *tun;
132 u8 buffer[4]; 183 u8 buffer[4];
133 int rc, IFPCoff, i, j; 184 int rc, IFPCoff, i, j;
134 enum param_type desired_type; 185 enum param_type desired_type;
135 struct tuner_params *params; 186 struct tuner_params *t_params;
136 187
137 tun = &tuners[t->type]; 188 tun = priv->tun;
138 189
139 /* IFPCoff = Video Intermediate Frequency - Vif: 190 /* IFPCoff = Video Intermediate Frequency - Vif:
140 940 =16*58.75 NTSC/J (Japan) 191 940 =16*58.75 NTSC/J (Japan)
@@ -148,14 +199,14 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
148 171.2=16*10.70 FM Radio (at set_radio_freq) 199 171.2=16*10.70 FM Radio (at set_radio_freq)
149 */ 200 */
150 201
151 if (t->std == V4L2_STD_NTSC_M_JP) { 202 if (params->std == V4L2_STD_NTSC_M_JP) {
152 IFPCoff = 940; 203 IFPCoff = 940;
153 desired_type = TUNER_PARAM_TYPE_NTSC; 204 desired_type = TUNER_PARAM_TYPE_NTSC;
154 } else if ((t->std & V4L2_STD_MN) && 205 } else if ((params->std & V4L2_STD_MN) &&
155 !(t->std & ~V4L2_STD_MN)) { 206 !(params->std & ~V4L2_STD_MN)) {
156 IFPCoff = 732; 207 IFPCoff = 732;
157 desired_type = TUNER_PARAM_TYPE_NTSC; 208 desired_type = TUNER_PARAM_TYPE_NTSC;
158 } else if (t->std == V4L2_STD_SECAM_LC) { 209 } else if (params->std == V4L2_STD_SECAM_LC) {
159 IFPCoff = 543; 210 IFPCoff = 543;
160 desired_type = TUNER_PARAM_TYPE_SECAM; 211 desired_type = TUNER_PARAM_TYPE_SECAM;
161 } else { 212 } else {
@@ -168,49 +219,49 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
168 continue; 219 continue;
169 break; 220 break;
170 } 221 }
171 /* use default tuner_params if desired_type not available */ 222 /* use default tuner_t_params if desired_type not available */
172 if (desired_type != tun->params[j].type) { 223 if (desired_type != tun->params[j].type) {
173 tuner_dbg("IFPCoff = %d: tuner_params undefined for tuner %d\n", 224 tuner_dbg("IFPCoff = %d: tuner_t_params undefined for tuner %d\n",
174 IFPCoff,t->type); 225 IFPCoff, priv->type);
175 j = 0; 226 j = 0;
176 } 227 }
177 params = &tun->params[j]; 228 t_params = &tun->params[j];
178 229
179 for (i = 0; i < params->count; i++) { 230 for (i = 0; i < t_params->count; i++) {
180 if (freq > params->ranges[i].limit) 231 if (params->frequency > t_params->ranges[i].limit)
181 continue; 232 continue;
182 break; 233 break;
183 } 234 }
184 if (i == params->count) { 235 if (i == t_params->count) {
185 tuner_dbg("TV frequency out of range (%d > %d)", 236 tuner_dbg("TV frequency out of range (%d > %d)",
186 freq, params->ranges[i - 1].limit); 237 params->frequency, t_params->ranges[i - 1].limit);
187 freq = params->ranges[--i].limit; 238 params->frequency = t_params->ranges[--i].limit;
188 } 239 }
189 config = params->ranges[i].config; 240 config = t_params->ranges[i].config;
190 cb = params->ranges[i].cb; 241 cb = t_params->ranges[i].cb;
191 /* i == 0 -> VHF_LO 242 /* i == 0 -> VHF_LO
192 * i == 1 -> VHF_HI 243 * i == 1 -> VHF_HI
193 * i == 2 -> UHF */ 244 * i == 2 -> UHF */
194 tuner_dbg("tv: param %d, range %d\n",j,i); 245 tuner_dbg("tv: param %d, range %d\n",j,i);
195 246
196 div=freq + IFPCoff + offset; 247 div=params->frequency + IFPCoff + offset;
197 248
198 tuner_dbg("Freq= %d.%02d MHz, V_IF=%d.%02d MHz, Offset=%d.%02d MHz, div=%0d\n", 249 tuner_dbg("Freq= %d.%02d MHz, V_IF=%d.%02d MHz, Offset=%d.%02d MHz, div=%0d\n",
199 freq / 16, freq % 16 * 100 / 16, 250 params->frequency / 16, params->frequency % 16 * 100 / 16,
200 IFPCoff / 16, IFPCoff % 16 * 100 / 16, 251 IFPCoff / 16, IFPCoff % 16 * 100 / 16,
201 offset / 16, offset % 16 * 100 / 16, 252 offset / 16, offset % 16 * 100 / 16,
202 div); 253 div);
203 254
204 /* tv norm specific stuff for multi-norm tuners */ 255 /* tv norm specific stuff for multi-norm tuners */
205 switch (t->type) { 256 switch (priv->type) {
206 case TUNER_PHILIPS_SECAM: // FI1216MF 257 case TUNER_PHILIPS_SECAM: // FI1216MF
207 /* 0x01 -> ??? no change ??? */ 258 /* 0x01 -> ??? no change ??? */
208 /* 0x02 -> PAL BDGHI / SECAM L */ 259 /* 0x02 -> PAL BDGHI / SECAM L */
209 /* 0x04 -> ??? PAL others / SECAM others ??? */ 260 /* 0x04 -> ??? PAL others / SECAM others ??? */
210 cb &= ~0x03; 261 cb &= ~0x03;
211 if (t->std & V4L2_STD_SECAM_L) //also valid for V4L2_STD_SECAM 262 if (params->std & V4L2_STD_SECAM_L) //also valid for V4L2_STD_SECAM
212 cb |= PHILIPS_MF_SET_STD_L; 263 cb |= PHILIPS_MF_SET_STD_L;
213 else if (t->std & V4L2_STD_SECAM_LC) 264 else if (params->std & V4L2_STD_SECAM_LC)
214 cb |= PHILIPS_MF_SET_STD_LC; 265 cb |= PHILIPS_MF_SET_STD_LC;
215 else /* V4L2_STD_B|V4L2_STD_GH */ 266 else /* V4L2_STD_B|V4L2_STD_GH */
216 cb |= PHILIPS_MF_SET_STD_BG; 267 cb |= PHILIPS_MF_SET_STD_BG;
@@ -219,16 +270,16 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
219 case TUNER_TEMIC_4046FM5: 270 case TUNER_TEMIC_4046FM5:
220 cb &= ~0x0f; 271 cb &= ~0x0f;
221 272
222 if (t->std & V4L2_STD_PAL_BG) { 273 if (params->std & V4L2_STD_PAL_BG) {
223 cb |= TEMIC_SET_PAL_BG; 274 cb |= TEMIC_SET_PAL_BG;
224 275
225 } else if (t->std & V4L2_STD_PAL_I) { 276 } else if (params->std & V4L2_STD_PAL_I) {
226 cb |= TEMIC_SET_PAL_I; 277 cb |= TEMIC_SET_PAL_I;
227 278
228 } else if (t->std & V4L2_STD_PAL_DK) { 279 } else if (params->std & V4L2_STD_PAL_DK) {
229 cb |= TEMIC_SET_PAL_DK; 280 cb |= TEMIC_SET_PAL_DK;
230 281
231 } else if (t->std & V4L2_STD_SECAM_L) { 282 } else if (params->std & V4L2_STD_SECAM_L) {
232 cb |= TEMIC_SET_PAL_L; 283 cb |= TEMIC_SET_PAL_L;
233 284
234 } 285 }
@@ -237,13 +288,13 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
237 case TUNER_PHILIPS_FQ1216ME: 288 case TUNER_PHILIPS_FQ1216ME:
238 cb &= ~0x0f; 289 cb &= ~0x0f;
239 290
240 if (t->std & (V4L2_STD_PAL_BG|V4L2_STD_PAL_DK)) { 291 if (params->std & (V4L2_STD_PAL_BG|V4L2_STD_PAL_DK)) {
241 cb |= PHILIPS_SET_PAL_BGDK; 292 cb |= PHILIPS_SET_PAL_BGDK;
242 293
243 } else if (t->std & V4L2_STD_PAL_I) { 294 } else if (params->std & V4L2_STD_PAL_I) {
244 cb |= PHILIPS_SET_PAL_I; 295 cb |= PHILIPS_SET_PAL_I;
245 296
246 } else if (t->std & V4L2_STD_SECAM_L) { 297 } else if (params->std & V4L2_STD_SECAM_L) {
247 cb |= PHILIPS_SET_PAL_L; 298 cb |= PHILIPS_SET_PAL_L;
248 299
249 } 300 }
@@ -255,7 +306,7 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
255 /* 0x02 -> NTSC antenna input 1 */ 306 /* 0x02 -> NTSC antenna input 1 */
256 /* 0x03 -> NTSC antenna input 2 */ 307 /* 0x03 -> NTSC antenna input 2 */
257 cb &= ~0x03; 308 cb &= ~0x03;
258 if (!(t->std & V4L2_STD_ATSC)) 309 if (!(params->std & V4L2_STD_ATSC))
259 cb |= 2; 310 cb |= 2;
260 /* FIXME: input */ 311 /* FIXME: input */
261 break; 312 break;
@@ -275,23 +326,23 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
275 buffer[2] = 0x17; 326 buffer[2] = 0x17;
276 buffer[3] = 0x00; 327 buffer[3] = 0x00;
277 cb &= ~0x40; 328 cb &= ~0x40;
278 if (t->std & V4L2_STD_ATSC) { 329 if (params->std & V4L2_STD_ATSC) {
279 cb |= 0x40; 330 cb |= 0x40;
280 buffer[1] = 0x04; 331 buffer[1] = 0x04;
281 } 332 }
282 /* set to the correct mode (analog or digital) */ 333 /* set to the correct mode (analog or digital) */
283 tuneraddr = c->addr; 334 tuneraddr = priv->i2c_props.addr;
284 c->addr = 0x0a; 335 priv->i2c_props.addr = 0x0a;
285 if (2 != (rc = i2c_master_send(c,&buffer[0],2))) 336 if (2 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,&buffer[0],2)))
286 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc); 337 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc);
287 if (2 != (rc = i2c_master_send(c,&buffer[2],2))) 338 if (2 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,&buffer[2],2)))
288 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc); 339 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc);
289 c->addr = tuneraddr; 340 priv->i2c_props.addr = tuneraddr;
290 /* FIXME: input */ 341 /* FIXME: input */
291 break; 342 break;
292 } 343 }
293 344
294 if (params->cb_first_if_lower_freq && div < t->last_div) { 345 if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
295 buffer[0] = config; 346 buffer[0] = config;
296 buffer[1] = cb; 347 buffer[1] = cb;
297 buffer[2] = (div>>8) & 0x7f; 348 buffer[2] = (div>>8) & 0x7f;
@@ -302,53 +353,53 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
302 buffer[2] = config; 353 buffer[2] = config;
303 buffer[3] = cb; 354 buffer[3] = cb;
304 } 355 }
305 t->last_div = div; 356 priv->last_div = div;
306 if (params->has_tda9887) { 357 if (t_params->has_tda9887) {
307 int config = 0; 358 int config = 0;
308 int is_secam_l = (t->std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) && 359 int is_secam_l = (params->std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)) &&
309 !(t->std & ~(V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC)); 360 !(params->std & ~(V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC));
310 361
311 if (t->std == V4L2_STD_SECAM_LC) { 362 if (params->std == V4L2_STD_SECAM_LC) {
312 if (params->port1_active ^ params->port1_invert_for_secam_lc) 363 if (t_params->port1_active ^ t_params->port1_invert_for_secam_lc)
313 config |= TDA9887_PORT1_ACTIVE; 364 config |= TDA9887_PORT1_ACTIVE;
314 if (params->port2_active ^ params->port2_invert_for_secam_lc) 365 if (t_params->port2_active ^ t_params->port2_invert_for_secam_lc)
315 config |= TDA9887_PORT2_ACTIVE; 366 config |= TDA9887_PORT2_ACTIVE;
316 } 367 }
317 else { 368 else {
318 if (params->port1_active) 369 if (t_params->port1_active)
319 config |= TDA9887_PORT1_ACTIVE; 370 config |= TDA9887_PORT1_ACTIVE;
320 if (params->port2_active) 371 if (t_params->port2_active)
321 config |= TDA9887_PORT2_ACTIVE; 372 config |= TDA9887_PORT2_ACTIVE;
322 } 373 }
323 if (params->intercarrier_mode) 374 if (t_params->intercarrier_mode)
324 config |= TDA9887_INTERCARRIER; 375 config |= TDA9887_INTERCARRIER;
325 if (is_secam_l) { 376 if (is_secam_l) {
326 if (i == 0 && params->default_top_secam_low) 377 if (i == 0 && t_params->default_top_secam_low)
327 config |= TDA9887_TOP(params->default_top_secam_low); 378 config |= TDA9887_TOP(t_params->default_top_secam_low);
328 else if (i == 1 && params->default_top_secam_mid) 379 else if (i == 1 && t_params->default_top_secam_mid)
329 config |= TDA9887_TOP(params->default_top_secam_mid); 380 config |= TDA9887_TOP(t_params->default_top_secam_mid);
330 else if (params->default_top_secam_high) 381 else if (t_params->default_top_secam_high)
331 config |= TDA9887_TOP(params->default_top_secam_high); 382 config |= TDA9887_TOP(t_params->default_top_secam_high);
332 } 383 }
333 else { 384 else {
334 if (i == 0 && params->default_top_low) 385 if (i == 0 && t_params->default_top_low)
335 config |= TDA9887_TOP(params->default_top_low); 386 config |= TDA9887_TOP(t_params->default_top_low);
336 else if (i == 1 && params->default_top_mid) 387 else if (i == 1 && t_params->default_top_mid)
337 config |= TDA9887_TOP(params->default_top_mid); 388 config |= TDA9887_TOP(t_params->default_top_mid);
338 else if (params->default_top_high) 389 else if (t_params->default_top_high)
339 config |= TDA9887_TOP(params->default_top_high); 390 config |= TDA9887_TOP(t_params->default_top_high);
340 } 391 }
341 if (params->default_pll_gating_18) 392 if (t_params->default_pll_gating_18)
342 config |= TDA9887_GATING_18; 393 config |= TDA9887_GATING_18;
343 i2c_clients_command(c->adapter, TDA9887_SET_CONFIG, &config); 394 i2c_clients_command(priv->i2c_props.adap, TDA9887_SET_CONFIG, &config);
344 } 395 }
345 tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", 396 tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
346 buffer[0],buffer[1],buffer[2],buffer[3]); 397 buffer[0],buffer[1],buffer[2],buffer[3]);
347 398
348 if (4 != (rc = i2c_master_send(c,buffer,4))) 399 if (4 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,buffer,4)))
349 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc); 400 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc);
350 401
351 switch (t->type) { 402 switch (priv->type) {
352 case TUNER_LG_TDVS_H06XF: 403 case TUNER_LG_TDVS_H06XF:
353 /* Set the Auxiliary Byte. */ 404 /* Set the Auxiliary Byte. */
354 buffer[0] = buffer[2]; 405 buffer[0] = buffer[2];
@@ -357,7 +408,7 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
357 buffer[1] = 0x20; 408 buffer[1] = 0x20;
358 tuner_dbg("tv 0x%02x 0x%02x\n",buffer[0],buffer[1]); 409 tuner_dbg("tv 0x%02x 0x%02x\n",buffer[0],buffer[1]);
359 410
360 if (2 != (rc = i2c_master_send(c,buffer,2))) 411 if (2 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,buffer,2)))
361 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc); 412 tuner_warn("i2c i/o error: rc == %d (should be 2)\n",rc);
362 break; 413 break;
363 case TUNER_MICROTUNE_4042FI5: 414 case TUNER_MICROTUNE_4042FI5:
@@ -369,8 +420,8 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
369 /* Wait until the PLL locks */ 420 /* Wait until the PLL locks */
370 for (;;) { 421 for (;;) {
371 if (time_after(jiffies,timeout)) 422 if (time_after(jiffies,timeout))
372 return; 423 return 0;
373 if (1 != (rc = i2c_master_recv(c,&status_byte,1))) { 424 if (1 != (rc = tuner_i2c_xfer_recv(&priv->i2c_props,&status_byte,1))) {
374 tuner_warn("i2c i/o read error: rc == %d (should be 1)\n",rc); 425 tuner_warn("i2c i/o read error: rc == %d (should be 1)\n",rc);
375 break; 426 break;
376 } 427 }
@@ -388,68 +439,86 @@ static void default_set_tv_freq(struct i2c_client *c, unsigned int freq)
388 tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n", 439 tuner_dbg("tv 0x%02x 0x%02x 0x%02x 0x%02x\n",
389 buffer[0],buffer[1],buffer[2],buffer[3]); 440 buffer[0],buffer[1],buffer[2],buffer[3]);
390 441
391 if (4 != (rc = i2c_master_send(c,buffer,4))) 442 if (4 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,buffer,4)))
392 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc); 443 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc);
393 break; 444 break;
394 } 445 }
395 } 446 }
447 return 0;
396} 448}
397 449
398static void default_set_radio_freq(struct i2c_client *c, unsigned int freq) 450static int simple_set_radio_freq(struct dvb_frontend *fe,
451 struct analog_parameters *params)
399{ 452{
400 struct tunertype *tun; 453 struct tunertype *tun;
401 struct tuner *t = i2c_get_clientdata(c); 454 struct tuner_simple_priv *priv = fe->tuner_priv;
402 u8 buffer[4]; 455 u8 buffer[4];
403 u16 div; 456 u16 div;
404 int rc, j; 457 int rc, j;
405 enum param_type desired_type = TUNER_PARAM_TYPE_RADIO; 458 struct tuner_params *t_params;
406 struct tuner_params *params; 459 unsigned int freq = params->frequency;
407 460
408 tun = &tuners[t->type]; 461 tun = priv->tun;
409 462
410 for (j = 0; j < tun->count-1; j++) { 463 for (j = tun->count-1; j > 0; j--)
411 if (desired_type != tun->params[j].type) 464 if (tun->params[j].type == TUNER_PARAM_TYPE_RADIO)
412 continue; 465 break;
466 /* default t_params (j=0) will be used if desired type wasn't found */
467 t_params = &tun->params[j];
468
469 /* Select Radio 1st IF used */
470 switch (t_params->radio_if) {
471 case 0: /* 10.7 MHz */
472 freq += (unsigned int)(10.7*16000);
473 break;
474 case 1: /* 33.3 MHz */
475 freq += (unsigned int)(33.3*16000);
413 break; 476 break;
477 case 2: /* 41.3 MHz */
478 freq += (unsigned int)(41.3*16000);
479 break;
480 default:
481 tuner_warn("Unsupported radio_if value %d\n", t_params->radio_if);
482 return 0;
414 } 483 }
415 /* use default tuner_params if desired_type not available */
416 if (desired_type != tun->params[j].type)
417 j = 0;
418
419 div = (20 * freq / 16000) + (int)(20*10.7); /* IF 10.7 MHz */
420 params = &tun->params[j];
421 buffer[2] = (params->ranges[0].config & ~TUNER_RATIO_MASK) | TUNER_RATIO_SELECT_50; /* 50 kHz step */
422 484
423 switch (t->type) { 485 /* Bandswitch byte */
486 switch (priv->type) {
424 case TUNER_TENA_9533_DI: 487 case TUNER_TENA_9533_DI:
425 case TUNER_YMEC_TVF_5533MF: 488 case TUNER_YMEC_TVF_5533MF:
426 tuner_dbg ("This tuner doesn't have FM. Most cards has a TEA5767 for FM\n"); 489 tuner_dbg("This tuner doesn't have FM. Most cards have a TEA5767 for FM\n");
427 return; 490 return 0;
428 case TUNER_PHILIPS_FM1216ME_MK3: 491 case TUNER_PHILIPS_FM1216ME_MK3:
429 case TUNER_PHILIPS_FM1236_MK3: 492 case TUNER_PHILIPS_FM1236_MK3:
430 case TUNER_PHILIPS_FMD1216ME_MK3: 493 case TUNER_PHILIPS_FMD1216ME_MK3:
431 case TUNER_LG_NTSC_TAPE: 494 case TUNER_LG_NTSC_TAPE:
495 case TUNER_PHILIPS_FM1256_IH3:
432 buffer[3] = 0x19; 496 buffer[3] = 0x19;
433 break; 497 break;
434 case TUNER_TNF_5335MF: 498 case TUNER_TNF_5335MF:
435 buffer[3] = 0x11; 499 buffer[3] = 0x11;
436 break; 500 break;
437 case TUNER_PHILIPS_FM1256_IH3:
438 div = (20 * freq) / 16000 + (int)(33.3 * 20); /* IF 33.3 MHz */
439 buffer[3] = 0x19;
440 break;
441 case TUNER_LG_PAL_FM: 501 case TUNER_LG_PAL_FM:
442 buffer[3] = 0xa5; 502 buffer[3] = 0xa5;
443 break; 503 break;
444 case TUNER_MICROTUNE_4049FM5: 504 case TUNER_THOMSON_DTT761X:
445 div = (20 * freq) / 16000 + (int)(33.3 * 20); /* IF 33.3 MHz */ 505 buffer[3] = 0x39;
446 buffer[3] = 0xa4;
447 break; 506 break;
507 case TUNER_MICROTUNE_4049FM5:
448 default: 508 default:
449 buffer[3] = 0xa4; 509 buffer[3] = 0xa4;
450 break; 510 break;
451 } 511 }
452 if (params->cb_first_if_lower_freq && div < t->last_div) { 512
513 buffer[2] = (t_params->ranges[0].config & ~TUNER_RATIO_MASK) |
514 TUNER_RATIO_SELECT_50; /* 50 kHz step */
515
516 /* Convert from 1/16 kHz V4L steps to 1/20 MHz (=50 kHz) PLL steps
517 freq * (1 Mhz / 16000 V4L steps) * (20 PLL steps / 1 MHz) =
518 freq * (1/800) */
519 div = (freq + 400) / 800;
520
521 if (t_params->cb_first_if_lower_freq && div < priv->last_div) {
453 buffer[0] = buffer[2]; 522 buffer[0] = buffer[2];
454 buffer[1] = buffer[3]; 523 buffer[1] = buffer[3];
455 buffer[2] = (div>>8) & 0x7f; 524 buffer[2] = (div>>8) & 0x7f;
@@ -461,46 +530,108 @@ static void default_set_radio_freq(struct i2c_client *c, unsigned int freq)
461 530
462 tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n", 531 tuner_dbg("radio 0x%02x 0x%02x 0x%02x 0x%02x\n",
463 buffer[0],buffer[1],buffer[2],buffer[3]); 532 buffer[0],buffer[1],buffer[2],buffer[3]);
464 t->last_div = div; 533 priv->last_div = div;
465 534
466 if (params->has_tda9887) { 535 if (t_params->has_tda9887) {
467 int config = 0; 536 int config = 0;
468 if (params->port1_active && !params->port1_fm_high_sensitivity) 537 if (t_params->port1_active && !t_params->port1_fm_high_sensitivity)
469 config |= TDA9887_PORT1_ACTIVE; 538 config |= TDA9887_PORT1_ACTIVE;
470 if (params->port2_active && !params->port2_fm_high_sensitivity) 539 if (t_params->port2_active && !t_params->port2_fm_high_sensitivity)
471 config |= TDA9887_PORT2_ACTIVE; 540 config |= TDA9887_PORT2_ACTIVE;
472 if (params->intercarrier_mode) 541 if (t_params->intercarrier_mode)
473 config |= TDA9887_INTERCARRIER; 542 config |= TDA9887_INTERCARRIER;
474/* if (params->port1_set_for_fm_mono) 543/* if (t_params->port1_set_for_fm_mono)
475 config &= ~TDA9887_PORT1_ACTIVE;*/ 544 config &= ~TDA9887_PORT1_ACTIVE;*/
476 if (params->fm_gain_normal) 545 if (t_params->fm_gain_normal)
477 config |= TDA9887_GAIN_NORMAL; 546 config |= TDA9887_GAIN_NORMAL;
478 i2c_clients_command(c->adapter, TDA9887_SET_CONFIG, &config); 547 if (t_params->radio_if == 2)
548 config |= TDA9887_RIF_41_3;
549 i2c_clients_command(priv->i2c_props.adap, TDA9887_SET_CONFIG, &config);
479 } 550 }
480 if (4 != (rc = i2c_master_send(c,buffer,4))) 551 if (4 != (rc = tuner_i2c_xfer_send(&priv->i2c_props,buffer,4)))
481 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc); 552 tuner_warn("i2c i/o error: rc == %d (should be 4)\n",rc);
553
554 return 0;
482} 555}
483 556
484static struct tuner_operations simple_tuner_ops = { 557static int simple_set_params(struct dvb_frontend *fe,
485 .set_tv_freq = default_set_tv_freq, 558 struct analog_parameters *params)
486 .set_radio_freq = default_set_radio_freq, 559{
487 .has_signal = tuner_signal, 560 struct tuner_simple_priv *priv = fe->tuner_priv;
488 .is_stereo = tuner_stereo, 561 int ret = -EINVAL;
562
563 switch (params->mode) {
564 case V4L2_TUNER_RADIO:
565 ret = simple_set_radio_freq(fe, params);
566 priv->frequency = params->frequency * 125 / 2;
567 break;
568 case V4L2_TUNER_ANALOG_TV:
569 case V4L2_TUNER_DIGITAL_TV:
570 ret = simple_set_tv_freq(fe, params);
571 priv->frequency = params->frequency * 62500;
572 break;
573 }
574
575 return ret;
576}
577
578
579static int simple_release(struct dvb_frontend *fe)
580{
581 kfree(fe->tuner_priv);
582 fe->tuner_priv = NULL;
583
584 return 0;
585}
586
587static int simple_get_frequency(struct dvb_frontend *fe, u32 *frequency)
588{
589 struct tuner_simple_priv *priv = fe->tuner_priv;
590 *frequency = priv->frequency;
591 return 0;
592}
593
594static struct dvb_tuner_ops simple_tuner_ops = {
595 .set_analog_params = simple_set_params,
596 .release = simple_release,
597 .get_frequency = simple_get_frequency,
598 .get_status = simple_get_status,
599 .get_rf_strength = simple_get_rf_strength,
489}; 600};
490 601
491int default_tuner_init(struct i2c_client *c) 602struct dvb_frontend *simple_tuner_attach(struct dvb_frontend *fe,
603 struct i2c_adapter *i2c_adap,
604 u8 i2c_addr,
605 struct simple_tuner_config *cfg)
492{ 606{
493 struct tuner *t = i2c_get_clientdata(c); 607 struct tuner_simple_priv *priv = NULL;
494 608
495 tuner_info("type set to %d (%s)\n", 609 priv = kzalloc(sizeof(struct tuner_simple_priv), GFP_KERNEL);
496 t->type, tuners[t->type].name); 610 if (priv == NULL)
497 strlcpy(c->name, tuners[t->type].name, sizeof(c->name)); 611 return NULL;
612 fe->tuner_priv = priv;
498 613
499 memcpy(&t->ops, &simple_tuner_ops, sizeof(struct tuner_operations)); 614 priv->i2c_props.addr = i2c_addr;
615 priv->i2c_props.adap = i2c_adap;
616 priv->type = cfg->type;
617 priv->tun = cfg->tun;
500 618
501 return 0; 619 memcpy(&fe->ops.tuner_ops, &simple_tuner_ops, sizeof(struct dvb_tuner_ops));
620
621 tuner_info("type set to %d (%s)\n", cfg->type, cfg->tun->name);
622
623 strlcpy(fe->ops.tuner_ops.info.name, cfg->tun->name, sizeof(fe->ops.tuner_ops.info.name));
624
625 return fe;
502} 626}
503 627
628
629EXPORT_SYMBOL_GPL(simple_tuner_attach);
630
631MODULE_DESCRIPTION("Simple 4-control-bytes style tuner driver");
632MODULE_AUTHOR("Ralph Metzler, Gerd Knorr, Gunther Mayer");
633MODULE_LICENSE("GPL");
634
504/* 635/*
505 * Overrides for Emacs so that we follow Linus's tabbing style. 636 * Overrides for Emacs so that we follow Linus's tabbing style.
506 * --------------------------------------------------------------------------- 637 * ---------------------------------------------------------------------------
diff --git a/drivers/media/video/tuner-simple.h b/drivers/media/video/tuner-simple.h
new file mode 100644
index 000000000000..9089939a8c02
--- /dev/null
+++ b/drivers/media/video/tuner-simple.h
@@ -0,0 +1,46 @@
1/*
2 This program is free software; you can redistribute it and/or modify
3 it under the terms of the GNU General Public License as published by
4 the Free Software Foundation; either version 2 of the License, or
5 (at your option) any later version.
6
7 This program is distributed in the hope that it will be useful,
8 but WITHOUT ANY WARRANTY; without even the implied warranty of
9 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 GNU General Public License for more details.
11
12 You should have received a copy of the GNU General Public License
13 along with this program; if not, write to the Free Software
14 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
15*/
16
17#ifndef __TUNER_SIMPLE_H__
18#define __TUNER_SIMPLE_H__
19
20#include <linux/i2c.h>
21#include "dvb_frontend.h"
22
23struct simple_tuner_config
24{
25 /* chip type */
26 unsigned int type;
27 struct tunertype *tun;
28};
29
30#if defined(CONFIG_TUNER_SIMPLE) || (defined(CONFIG_TUNER_SIMPLE_MODULE) && defined(MODULE))
31extern struct dvb_frontend *simple_tuner_attach(struct dvb_frontend *fe,
32 struct i2c_adapter *i2c_adap,
33 u8 i2c_addr,
34 struct simple_tuner_config *cfg);
35#else
36static inline struct dvb_frontend *simple_tuner_attach(struct dvb_frontend *fe,
37 struct i2c_adapter *i2c_adap,
38 u8 i2c_addr,
39 struct simple_tuner_config *cfg)
40{
41 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __FUNCTION__);
42 return NULL;
43}
44#endif
45
46#endif /* __TUNER_SIMPLE_H__ */
diff --git a/drivers/media/video/tuner-types.c b/drivers/media/video/tuner-types.c
index 417f642b4359..c6a7934bd5a6 100644
--- a/drivers/media/video/tuner-types.c
+++ b/drivers/media/video/tuner-types.c
@@ -652,6 +652,7 @@ static struct tuner_params tuner_microtune_4049_fm5_params[] = {
652 .port1_invert_for_secam_lc = 1, 652 .port1_invert_for_secam_lc = 1,
653 .default_pll_gating_18 = 1, 653 .default_pll_gating_18 = 1,
654 .fm_gain_normal=1, 654 .fm_gain_normal=1,
655 .radio_if = 1, /* 33.3 MHz */
655 }, 656 },
656}; 657};
657 658
@@ -670,6 +671,9 @@ static struct tuner_params tuner_panasonic_vp27_params[] = {
670 .count = ARRAY_SIZE(tuner_panasonic_vp27_ntsc_ranges), 671 .count = ARRAY_SIZE(tuner_panasonic_vp27_ntsc_ranges),
671 .has_tda9887 = 1, 672 .has_tda9887 = 1,
672 .intercarrier_mode = 1, 673 .intercarrier_mode = 1,
674 .default_top_low = -3,
675 .default_top_mid = -3,
676 .default_top_high = -3,
673 }, 677 },
674}; 678};
675 679
@@ -730,6 +734,7 @@ static struct tuner_params tuner_philips_fm1256_ih3_params[] = {
730 .type = TUNER_PARAM_TYPE_PAL, 734 .type = TUNER_PARAM_TYPE_PAL,
731 .ranges = tuner_fm1236_mk3_ntsc_ranges, 735 .ranges = tuner_fm1236_mk3_ntsc_ranges,
732 .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges), 736 .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
737 .radio_if = 1, /* 33.3 MHz */
733 }, 738 },
734}; 739};
735 740
@@ -856,6 +861,9 @@ static struct tuner_params tuner_thomson_dtt761x_params[] = {
856 .type = TUNER_PARAM_TYPE_NTSC, 861 .type = TUNER_PARAM_TYPE_NTSC,
857 .ranges = tuner_thomson_dtt761x_ntsc_ranges, 862 .ranges = tuner_thomson_dtt761x_ntsc_ranges,
858 .count = ARRAY_SIZE(tuner_thomson_dtt761x_ntsc_ranges), 863 .count = ARRAY_SIZE(tuner_thomson_dtt761x_ntsc_ranges),
864 .has_tda9887 = 1,
865 .fm_gain_normal = 1,
866 .radio_if = 2, /* 41.3 MHz */
859 }, 867 },
860}; 868};
861 869
diff --git a/drivers/media/video/tvaudio.c b/drivers/media/video/tvaudio.c
index cffb011590e3..a19cdcc17ef7 100644
--- a/drivers/media/video/tvaudio.c
+++ b/drivers/media/video/tvaudio.c
@@ -15,7 +15,6 @@
15 */ 15 */
16 16
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
21#include <linux/string.h> 20#include <linux/string.h>
diff --git a/drivers/media/video/tveeprom.c b/drivers/media/video/tveeprom.c
index fdc3def437b1..4b2c4034f5b3 100644
--- a/drivers/media/video/tveeprom.c
+++ b/drivers/media/video/tveeprom.c
@@ -30,7 +30,6 @@
30 30
31 31
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/errno.h> 33#include <linux/errno.h>
35#include <linux/kernel.h> 34#include <linux/kernel.h>
36#include <linux/init.h> 35#include <linux/init.h>
diff --git a/drivers/media/video/tvmixer.c b/drivers/media/video/tvmixer.c
index 3ae5a9cd2e28..9fa5b702e073 100644
--- a/drivers/media/video/tvmixer.c
+++ b/drivers/media/video/tvmixer.c
@@ -2,7 +2,6 @@
2 */ 2 */
3 3
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/moduleparam.h>
6#include <linux/kernel.h> 5#include <linux/kernel.h>
7#include <linux/string.h> 6#include <linux/string.h>
8#include <linux/timer.h> 7#include <linux/timer.h>
@@ -238,13 +237,10 @@ static const struct file_operations tvmixer_fops = {
238 237
239static int tvmixer_adapters(struct i2c_adapter *adap) 238static int tvmixer_adapters(struct i2c_adapter *adap)
240{ 239{
241 struct list_head *item;
242 struct i2c_client *client; 240 struct i2c_client *client;
243 241
244 list_for_each(item,&adap->clients) { 242 list_for_each_entry(client, &adap->clients, list)
245 client = list_entry(item, struct i2c_client, list);
246 tvmixer_clients(client); 243 tvmixer_clients(client);
247 }
248 return 0; 244 return 0;
249} 245}
250 246
diff --git a/drivers/media/video/usbvision/usbvision-core.c b/drivers/media/video/usbvision/usbvision-core.c
index 5b1e346df206..c7d5f9ed22d7 100644
--- a/drivers/media/video/usbvision/usbvision-core.c
+++ b/drivers/media/video/usbvision/usbvision-core.c
@@ -45,7 +45,6 @@
45#include <media/tuner.h> 45#include <media/tuner.h>
46#include <media/audiochip.h> 46#include <media/audiochip.h>
47 47
48#include <linux/moduleparam.h>
49#include <linux/workqueue.h> 48#include <linux/workqueue.h>
50 49
51#ifdef CONFIG_KMOD 50#ifdef CONFIG_KMOD
diff --git a/drivers/media/video/usbvision/usbvision-i2c.c b/drivers/media/video/usbvision/usbvision-i2c.c
index 025be555194f..c66aef63916f 100644
--- a/drivers/media/video/usbvision/usbvision-i2c.c
+++ b/drivers/media/video/usbvision/usbvision-i2c.c
@@ -134,8 +134,6 @@ static inline int usb_find_address(struct i2c_adapter *i2c_adap,
134 addr = (msg->addr << 1); 134 addr = (msg->addr << 1);
135 if (flags & I2C_M_RD) 135 if (flags & I2C_M_RD)
136 addr |= 1; 136 addr |= 1;
137 if (flags & I2C_M_REV_DIR_ADDR)
138 addr ^= 1;
139 137
140 add[0] = addr; 138 add[0] = addr;
141 if (flags & I2C_M_RD) 139 if (flags & I2C_M_RD)
@@ -192,7 +190,7 @@ static int algo_control(struct i2c_adapter *adapter, unsigned int cmd, unsigned
192 190
193static u32 functionality(struct i2c_adapter *adap) 191static u32 functionality(struct i2c_adapter *adap)
194{ 192{
195 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; 193 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
196} 194}
197 195
198 196
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c
index 0cb006f2943d..e2f3c01cfa13 100644
--- a/drivers/media/video/usbvision/usbvision-video.c
+++ b/drivers/media/video/usbvision/usbvision-video.c
@@ -68,7 +68,6 @@
68#include <media/tuner.h> 68#include <media/tuner.h>
69#include <media/audiochip.h> 69#include <media/audiochip.h>
70 70
71#include <linux/moduleparam.h>
72#include <linux/workqueue.h> 71#include <linux/workqueue.h>
73 72
74#ifdef CONFIG_KMOD 73#ifdef CONFIG_KMOD
@@ -183,20 +182,22 @@ MODULE_ALIAS(DRIVER_ALIAS);
183 182
184#define YES_NO(x) ((x) ? "Yes" : "No") 183#define YES_NO(x) ((x) ? "Yes" : "No")
185 184
186static inline struct usb_usbvision *cd_to_usbvision(struct class_device *cd) 185static inline struct usb_usbvision *cd_to_usbvision(struct device *cd)
187{ 186{
188 struct video_device *vdev = 187 struct video_device *vdev =
189 container_of(cd, struct video_device, class_dev); 188 container_of(cd, struct video_device, class_dev);
190 return video_get_drvdata(vdev); 189 return video_get_drvdata(vdev);
191} 190}
192 191
193static ssize_t show_version(struct class_device *cd, char *buf) 192static ssize_t show_version(struct device *cd,
193 struct device_attribute *attr, char *buf)
194{ 194{
195 return sprintf(buf, "%s\n", USBVISION_VERSION_STRING); 195 return sprintf(buf, "%s\n", USBVISION_VERSION_STRING);
196} 196}
197static CLASS_DEVICE_ATTR(version, S_IRUGO, show_version, NULL); 197static DEVICE_ATTR(version, S_IRUGO, show_version, NULL);
198 198
199static ssize_t show_model(struct class_device *cd, char *buf) 199static ssize_t show_model(struct device *cd,
200 struct device_attribute *attr, char *buf)
200{ 201{
201 struct video_device *vdev = 202 struct video_device *vdev =
202 container_of(cd, struct video_device, class_dev); 203 container_of(cd, struct video_device, class_dev);
@@ -204,9 +205,10 @@ static ssize_t show_model(struct class_device *cd, char *buf)
204 return sprintf(buf, "%s\n", 205 return sprintf(buf, "%s\n",
205 usbvision_device_data[usbvision->DevModel].ModelString); 206 usbvision_device_data[usbvision->DevModel].ModelString);
206} 207}
207static CLASS_DEVICE_ATTR(model, S_IRUGO, show_model, NULL); 208static DEVICE_ATTR(model, S_IRUGO, show_model, NULL);
208 209
209static ssize_t show_hue(struct class_device *cd, char *buf) 210static ssize_t show_hue(struct device *cd,
211 struct device_attribute *attr, char *buf)
210{ 212{
211 struct video_device *vdev = 213 struct video_device *vdev =
212 container_of(cd, struct video_device, class_dev); 214 container_of(cd, struct video_device, class_dev);
@@ -218,9 +220,10 @@ static ssize_t show_hue(struct class_device *cd, char *buf)
218 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl); 220 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl);
219 return sprintf(buf, "%d\n", ctrl.value); 221 return sprintf(buf, "%d\n", ctrl.value);
220} 222}
221static CLASS_DEVICE_ATTR(hue, S_IRUGO, show_hue, NULL); 223static DEVICE_ATTR(hue, S_IRUGO, show_hue, NULL);
222 224
223static ssize_t show_contrast(struct class_device *cd, char *buf) 225static ssize_t show_contrast(struct device *cd,
226 struct device_attribute *attr, char *buf)
224{ 227{
225 struct video_device *vdev = 228 struct video_device *vdev =
226 container_of(cd, struct video_device, class_dev); 229 container_of(cd, struct video_device, class_dev);
@@ -232,9 +235,10 @@ static ssize_t show_contrast(struct class_device *cd, char *buf)
232 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl); 235 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl);
233 return sprintf(buf, "%d\n", ctrl.value); 236 return sprintf(buf, "%d\n", ctrl.value);
234} 237}
235static CLASS_DEVICE_ATTR(contrast, S_IRUGO, show_contrast, NULL); 238static DEVICE_ATTR(contrast, S_IRUGO, show_contrast, NULL);
236 239
237static ssize_t show_brightness(struct class_device *cd, char *buf) 240static ssize_t show_brightness(struct device *cd,
241 struct device_attribute *attr, char *buf)
238{ 242{
239 struct video_device *vdev = 243 struct video_device *vdev =
240 container_of(cd, struct video_device, class_dev); 244 container_of(cd, struct video_device, class_dev);
@@ -246,9 +250,10 @@ static ssize_t show_brightness(struct class_device *cd, char *buf)
246 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl); 250 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl);
247 return sprintf(buf, "%d\n", ctrl.value); 251 return sprintf(buf, "%d\n", ctrl.value);
248} 252}
249static CLASS_DEVICE_ATTR(brightness, S_IRUGO, show_brightness, NULL); 253static DEVICE_ATTR(brightness, S_IRUGO, show_brightness, NULL);
250 254
251static ssize_t show_saturation(struct class_device *cd, char *buf) 255static ssize_t show_saturation(struct device *cd,
256 struct device_attribute *attr, char *buf)
252{ 257{
253 struct video_device *vdev = 258 struct video_device *vdev =
254 container_of(cd, struct video_device, class_dev); 259 container_of(cd, struct video_device, class_dev);
@@ -260,9 +265,10 @@ static ssize_t show_saturation(struct class_device *cd, char *buf)
260 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl); 265 call_i2c_clients(usbvision, VIDIOC_G_CTRL, &ctrl);
261 return sprintf(buf, "%d\n", ctrl.value); 266 return sprintf(buf, "%d\n", ctrl.value);
262} 267}
263static CLASS_DEVICE_ATTR(saturation, S_IRUGO, show_saturation, NULL); 268static DEVICE_ATTR(saturation, S_IRUGO, show_saturation, NULL);
264 269
265static ssize_t show_streaming(struct class_device *cd, char *buf) 270static ssize_t show_streaming(struct device *cd,
271 struct device_attribute *attr, char *buf)
266{ 272{
267 struct video_device *vdev = 273 struct video_device *vdev =
268 container_of(cd, struct video_device, class_dev); 274 container_of(cd, struct video_device, class_dev);
@@ -270,9 +276,10 @@ static ssize_t show_streaming(struct class_device *cd, char *buf)
270 return sprintf(buf, "%s\n", 276 return sprintf(buf, "%s\n",
271 YES_NO(usbvision->streaming==Stream_On?1:0)); 277 YES_NO(usbvision->streaming==Stream_On?1:0));
272} 278}
273static CLASS_DEVICE_ATTR(streaming, S_IRUGO, show_streaming, NULL); 279static DEVICE_ATTR(streaming, S_IRUGO, show_streaming, NULL);
274 280
275static ssize_t show_compression(struct class_device *cd, char *buf) 281static ssize_t show_compression(struct device *cd,
282 struct device_attribute *attr, char *buf)
276{ 283{
277 struct video_device *vdev = 284 struct video_device *vdev =
278 container_of(cd, struct video_device, class_dev); 285 container_of(cd, struct video_device, class_dev);
@@ -280,16 +287,17 @@ static ssize_t show_compression(struct class_device *cd, char *buf)
280 return sprintf(buf, "%s\n", 287 return sprintf(buf, "%s\n",
281 YES_NO(usbvision->isocMode==ISOC_MODE_COMPRESS)); 288 YES_NO(usbvision->isocMode==ISOC_MODE_COMPRESS));
282} 289}
283static CLASS_DEVICE_ATTR(compression, S_IRUGO, show_compression, NULL); 290static DEVICE_ATTR(compression, S_IRUGO, show_compression, NULL);
284 291
285static ssize_t show_device_bridge(struct class_device *cd, char *buf) 292static ssize_t show_device_bridge(struct device *cd,
293 struct device_attribute *attr, char *buf)
286{ 294{
287 struct video_device *vdev = 295 struct video_device *vdev =
288 container_of(cd, struct video_device, class_dev); 296 container_of(cd, struct video_device, class_dev);
289 struct usb_usbvision *usbvision = video_get_drvdata(vdev); 297 struct usb_usbvision *usbvision = video_get_drvdata(vdev);
290 return sprintf(buf, "%d\n", usbvision->bridgeType); 298 return sprintf(buf, "%d\n", usbvision->bridgeType);
291} 299}
292static CLASS_DEVICE_ATTR(bridge, S_IRUGO, show_device_bridge, NULL); 300static DEVICE_ATTR(bridge, S_IRUGO, show_device_bridge, NULL);
293 301
294static void usbvision_create_sysfs(struct video_device *vdev) 302static void usbvision_create_sysfs(struct video_device *vdev)
295{ 303{
@@ -297,40 +305,40 @@ static void usbvision_create_sysfs(struct video_device *vdev)
297 if (!vdev) 305 if (!vdev)
298 return; 306 return;
299 do { 307 do {
300 res=class_device_create_file(&vdev->class_dev, 308 res = device_create_file(&vdev->class_dev,
301 &class_device_attr_version); 309 &dev_attr_version);
302 if (res<0) 310 if (res<0)
303 break; 311 break;
304 res=class_device_create_file(&vdev->class_dev, 312 res = device_create_file(&vdev->class_dev,
305 &class_device_attr_model); 313 &dev_attr_model);
306 if (res<0) 314 if (res<0)
307 break; 315 break;
308 res=class_device_create_file(&vdev->class_dev, 316 res = device_create_file(&vdev->class_dev,
309 &class_device_attr_hue); 317 &dev_attr_hue);
310 if (res<0) 318 if (res<0)
311 break; 319 break;
312 res=class_device_create_file(&vdev->class_dev, 320 res = device_create_file(&vdev->class_dev,
313 &class_device_attr_contrast); 321 &dev_attr_contrast);
314 if (res<0) 322 if (res<0)
315 break; 323 break;
316 res=class_device_create_file(&vdev->class_dev, 324 res = device_create_file(&vdev->class_dev,
317 &class_device_attr_brightness); 325 &dev_attr_brightness);
318 if (res<0) 326 if (res<0)
319 break; 327 break;
320 res=class_device_create_file(&vdev->class_dev, 328 res = device_create_file(&vdev->class_dev,
321 &class_device_attr_saturation); 329 &dev_attr_saturation);
322 if (res<0) 330 if (res<0)
323 break; 331 break;
324 res=class_device_create_file(&vdev->class_dev, 332 res = device_create_file(&vdev->class_dev,
325 &class_device_attr_streaming); 333 &dev_attr_streaming);
326 if (res<0) 334 if (res<0)
327 break; 335 break;
328 res=class_device_create_file(&vdev->class_dev, 336 res = device_create_file(&vdev->class_dev,
329 &class_device_attr_compression); 337 &dev_attr_compression);
330 if (res<0) 338 if (res<0)
331 break; 339 break;
332 res=class_device_create_file(&vdev->class_dev, 340 res = device_create_file(&vdev->class_dev,
333 &class_device_attr_bridge); 341 &dev_attr_bridge);
334 if (res>=0) 342 if (res>=0)
335 return; 343 return;
336 } while (0); 344 } while (0);
@@ -341,24 +349,24 @@ static void usbvision_create_sysfs(struct video_device *vdev)
341static void usbvision_remove_sysfs(struct video_device *vdev) 349static void usbvision_remove_sysfs(struct video_device *vdev)
342{ 350{
343 if (vdev) { 351 if (vdev) {
344 class_device_remove_file(&vdev->class_dev, 352 device_remove_file(&vdev->class_dev,
345 &class_device_attr_version); 353 &dev_attr_version);
346 class_device_remove_file(&vdev->class_dev, 354 device_remove_file(&vdev->class_dev,
347 &class_device_attr_model); 355 &dev_attr_model);
348 class_device_remove_file(&vdev->class_dev, 356 device_remove_file(&vdev->class_dev,
349 &class_device_attr_hue); 357 &dev_attr_hue);
350 class_device_remove_file(&vdev->class_dev, 358 device_remove_file(&vdev->class_dev,
351 &class_device_attr_contrast); 359 &dev_attr_contrast);
352 class_device_remove_file(&vdev->class_dev, 360 device_remove_file(&vdev->class_dev,
353 &class_device_attr_brightness); 361 &dev_attr_brightness);
354 class_device_remove_file(&vdev->class_dev, 362 device_remove_file(&vdev->class_dev,
355 &class_device_attr_saturation); 363 &dev_attr_saturation);
356 class_device_remove_file(&vdev->class_dev, 364 device_remove_file(&vdev->class_dev,
357 &class_device_attr_streaming); 365 &dev_attr_streaming);
358 class_device_remove_file(&vdev->class_dev, 366 device_remove_file(&vdev->class_dev,
359 &class_device_attr_compression); 367 &dev_attr_compression);
360 class_device_remove_file(&vdev->class_dev, 368 device_remove_file(&vdev->class_dev,
361 &class_device_attr_bridge); 369 &dev_attr_bridge);
362 } 370 }
363} 371}
364 372
diff --git a/drivers/media/video/v4l1-compat.c b/drivers/media/video/v4l1-compat.c
index ede8543818bf..9eac65f34bff 100644
--- a/drivers/media/video/v4l1-compat.c
+++ b/drivers/media/video/v4l1-compat.c
@@ -19,7 +19,6 @@
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/types.h> 22#include <linux/types.h>
24#include <linux/kernel.h> 23#include <linux/kernel.h>
25#include <linux/sched.h> 24#include <linux/sched.h>
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c
index d2915d3530ea..c3440b280d20 100644
--- a/drivers/media/video/v4l2-common.c
+++ b/drivers/media/video/v4l2-common.c
@@ -65,11 +65,6 @@
65#include <linux/kmod.h> 65#include <linux/kmod.h>
66#endif 66#endif
67 67
68#if defined(CONFIG_UST) || defined(CONFIG_UST_MODULE)
69#include <linux/ust.h>
70#endif
71
72
73#include <linux/videodev.h> 68#include <linux/videodev.h>
74 69
75MODULE_AUTHOR("Bill Dirks, Justin Schoeman, Gerd Knorr"); 70MODULE_AUTHOR("Bill Dirks, Justin Schoeman, Gerd Knorr");
@@ -716,6 +711,7 @@ int v4l2_ctrl_query_fill(struct v4l2_queryctrl *qctrl, s32 min, s32 max, s32 ste
716 case V4L2_CID_AUDIO_MUTE: 711 case V4L2_CID_AUDIO_MUTE:
717 case V4L2_CID_AUDIO_LOUDNESS: 712 case V4L2_CID_AUDIO_LOUDNESS:
718 case V4L2_CID_MPEG_AUDIO_MUTE: 713 case V4L2_CID_MPEG_AUDIO_MUTE:
714 case V4L2_CID_MPEG_VIDEO_MUTE:
719 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE: 715 case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE:
720 case V4L2_CID_MPEG_VIDEO_PULLDOWN: 716 case V4L2_CID_MPEG_VIDEO_PULLDOWN:
721 qctrl->type = V4L2_CTRL_TYPE_BOOLEAN; 717 qctrl->type = V4L2_CTRL_TYPE_BOOLEAN;
diff --git a/drivers/media/video/v4l2-int-device.c b/drivers/media/video/v4l2-int-device.c
new file mode 100644
index 000000000000..8b4ef530a3a8
--- /dev/null
+++ b/drivers/media/video/v4l2-int-device.c
@@ -0,0 +1,158 @@
1/*
2 * drivers/media/video/v4l2-int-device.c
3 *
4 * V4L2 internal ioctl interface.
5 *
6 * Copyright (C) 2007 Nokia Corporation.
7 *
8 * Contact: Sakari Ailus <sakari.ailus@nokia.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 */
24
25#include <linux/kernel.h>
26#include <linux/list.h>
27#include <linux/sort.h>
28#include <linux/string.h>
29
30#include <media/v4l2-int-device.h>
31
32static DEFINE_MUTEX(mutex);
33static LIST_HEAD(int_list);
34
35static void v4l2_int_device_try_attach_all(void)
36{
37 struct v4l2_int_device *m, *s;
38
39 list_for_each_entry(m, &int_list, head) {
40 if (m->type != v4l2_int_type_master)
41 continue;
42
43 list_for_each_entry(s, &int_list, head) {
44 if (s->type != v4l2_int_type_slave)
45 continue;
46
47 /* Slave is connected? */
48 if (s->u.slave->master)
49 continue;
50
51 /* Slave wants to attach to master? */
52 if (s->u.slave->attach_to[0] != 0
53 && strncmp(m->name, s->u.slave->attach_to,
54 V4L2NAMESIZE))
55 continue;
56
57 if (!try_module_get(m->module))
58 continue;
59
60 if (m->u.master->attach(m, s)) {
61 module_put(m->module);
62 continue;
63 }
64
65 s->u.slave->master = m;
66 }
67 }
68}
69
70static int ioctl_sort_cmp(const void *a, const void *b)
71{
72 const struct v4l2_int_ioctl_desc *d1 = a, *d2 = b;
73
74 if (d1->num > d2->num)
75 return 1;
76
77 if (d1->num < d2->num)
78 return -1;
79
80 return 0;
81}
82
83int v4l2_int_device_register(struct v4l2_int_device *d)
84{
85 if (d->type == v4l2_int_type_slave)
86 sort(d->u.slave->ioctls, d->u.slave->num_ioctls,
87 sizeof(struct v4l2_int_ioctl_desc),
88 &ioctl_sort_cmp, NULL);
89 mutex_lock(&mutex);
90 list_add(&d->head, &int_list);
91 v4l2_int_device_try_attach_all();
92 mutex_unlock(&mutex);
93
94 return 0;
95}
96EXPORT_SYMBOL_GPL(v4l2_int_device_register);
97
98void v4l2_int_device_unregister(struct v4l2_int_device *d)
99{
100 mutex_lock(&mutex);
101 list_del(&d->head);
102 if (d->type == v4l2_int_type_slave
103 && d->u.slave->master != NULL) {
104 d->u.slave->master->u.master->detach(d);
105 module_put(d->u.slave->master->module);
106 d->u.slave->master = NULL;
107 }
108 mutex_unlock(&mutex);
109}
110EXPORT_SYMBOL_GPL(v4l2_int_device_unregister);
111
112/* Adapted from search_extable in extable.c. */
113static v4l2_int_ioctl_func *find_ioctl(struct v4l2_int_slave *slave, int cmd,
114 v4l2_int_ioctl_func *no_such_ioctl)
115{
116 const struct v4l2_int_ioctl_desc *first = slave->ioctls;
117 const struct v4l2_int_ioctl_desc *last =
118 first + slave->num_ioctls - 1;
119
120 while (first <= last) {
121 const struct v4l2_int_ioctl_desc *mid;
122
123 mid = (last - first) / 2 + first;
124
125 if (mid->num < cmd)
126 first = mid + 1;
127 else if (mid->num > cmd)
128 last = mid - 1;
129 else
130 return mid->func;
131 }
132
133 return no_such_ioctl;
134}
135
136static int no_such_ioctl_0(struct v4l2_int_device *d)
137{
138 return -ENOIOCTLCMD;
139}
140
141int v4l2_int_ioctl_0(struct v4l2_int_device *d, int cmd)
142{
143 return ((v4l2_int_ioctl_func_0 *)
144 find_ioctl(d->u.slave, cmd,
145 (v4l2_int_ioctl_func *)no_such_ioctl_0))(d);
146}
147
148static int no_such_ioctl_1(struct v4l2_int_device *d, void *arg)
149{
150 return -ENOIOCTLCMD;
151}
152
153int v4l2_int_ioctl_1(struct v4l2_int_device *d, int cmd, void *arg)
154{
155 return ((v4l2_int_ioctl_func_1 *)
156 find_ioctl(d->u.slave, cmd,
157 (v4l2_int_ioctl_func *)no_such_ioctl_1))(d, arg);
158}
diff --git a/drivers/media/video/video-buf-dvb.c b/drivers/media/video/video-buf-dvb.c
deleted file mode 100644
index e617925ba31e..000000000000
--- a/drivers/media/video/video-buf-dvb.c
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 *
3 * some helper function for simple DVB cards which simply DMA the
4 * complete transport stream and let the computer sort everything else
5 * (i.e. we are using the software demux, ...). Also uses the
6 * video-buf to manage DMA buffers.
7 *
8 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/fs.h>
21#include <linux/kthread.h>
22#include <linux/file.h>
23#include <linux/freezer.h>
24
25#include <media/video-buf.h>
26#include <media/video-buf-dvb.h>
27
28/* ------------------------------------------------------------------ */
29
30MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
31MODULE_LICENSE("GPL");
32
33static unsigned int debug = 0;
34module_param(debug, int, 0644);
35MODULE_PARM_DESC(debug,"enable debug messages");
36
37#define dprintk(fmt, arg...) if (debug) \
38 printk(KERN_DEBUG "%s/dvb: " fmt, dvb->name , ## arg)
39
40/* ------------------------------------------------------------------ */
41
42static int videobuf_dvb_thread(void *data)
43{
44 struct videobuf_dvb *dvb = data;
45 struct videobuf_buffer *buf;
46 unsigned long flags;
47 int err;
48
49 dprintk("dvb thread started\n");
50 set_freezable();
51 videobuf_read_start(&dvb->dvbq);
52
53 for (;;) {
54 /* fetch next buffer */
55 buf = list_entry(dvb->dvbq.stream.next,
56 struct videobuf_buffer, stream);
57 list_del(&buf->stream);
58 err = videobuf_waiton(buf,0,1);
59 BUG_ON(0 != err);
60
61 /* no more feeds left or stop_feed() asked us to quit */
62 if (0 == dvb->nfeeds)
63 break;
64 if (kthread_should_stop())
65 break;
66 try_to_freeze();
67
68 /* feed buffer data to demux */
69 if (buf->state == STATE_DONE)
70 dvb_dmx_swfilter(&dvb->demux, buf->dma.vmalloc,
71 buf->size);
72
73 /* requeue buffer */
74 list_add_tail(&buf->stream,&dvb->dvbq.stream);
75 spin_lock_irqsave(dvb->dvbq.irqlock,flags);
76 dvb->dvbq.ops->buf_queue(&dvb->dvbq,buf);
77 spin_unlock_irqrestore(dvb->dvbq.irqlock,flags);
78 }
79
80 videobuf_read_stop(&dvb->dvbq);
81 dprintk("dvb thread stopped\n");
82
83 /* Hmm, linux becomes *very* unhappy without this ... */
84 while (!kthread_should_stop()) {
85 set_current_state(TASK_INTERRUPTIBLE);
86 schedule();
87 }
88 return 0;
89}
90
91static int videobuf_dvb_start_feed(struct dvb_demux_feed *feed)
92{
93 struct dvb_demux *demux = feed->demux;
94 struct videobuf_dvb *dvb = demux->priv;
95 int rc;
96
97 if (!demux->dmx.frontend)
98 return -EINVAL;
99
100 mutex_lock(&dvb->lock);
101 dvb->nfeeds++;
102 rc = dvb->nfeeds;
103
104 if (NULL != dvb->thread)
105 goto out;
106 dvb->thread = kthread_run(videobuf_dvb_thread,
107 dvb, "%s dvb", dvb->name);
108 if (IS_ERR(dvb->thread)) {
109 rc = PTR_ERR(dvb->thread);
110 dvb->thread = NULL;
111 }
112
113out:
114 mutex_unlock(&dvb->lock);
115 return rc;
116}
117
118static int videobuf_dvb_stop_feed(struct dvb_demux_feed *feed)
119{
120 struct dvb_demux *demux = feed->demux;
121 struct videobuf_dvb *dvb = demux->priv;
122 int err = 0;
123
124 mutex_lock(&dvb->lock);
125 dvb->nfeeds--;
126 if (0 == dvb->nfeeds && NULL != dvb->thread) {
127 // FIXME: cx8802_cancel_buffers(dev);
128 err = kthread_stop(dvb->thread);
129 dvb->thread = NULL;
130 }
131 mutex_unlock(&dvb->lock);
132 return err;
133}
134
135/* ------------------------------------------------------------------ */
136
137int videobuf_dvb_register(struct videobuf_dvb *dvb,
138 struct module *module,
139 void *adapter_priv,
140 struct device *device)
141{
142 int result;
143
144 mutex_init(&dvb->lock);
145
146 /* register adapter */
147 result = dvb_register_adapter(&dvb->adapter, dvb->name, module, device);
148 if (result < 0) {
149 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
150 dvb->name, result);
151 goto fail_adapter;
152 }
153 dvb->adapter.priv = adapter_priv;
154
155 /* register frontend */
156 result = dvb_register_frontend(&dvb->adapter, dvb->frontend);
157 if (result < 0) {
158 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
159 dvb->name, result);
160 goto fail_frontend;
161 }
162
163 /* register demux stuff */
164 dvb->demux.dmx.capabilities =
165 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
166 DMX_MEMORY_BASED_FILTERING;
167 dvb->demux.priv = dvb;
168 dvb->demux.filternum = 256;
169 dvb->demux.feednum = 256;
170 dvb->demux.start_feed = videobuf_dvb_start_feed;
171 dvb->demux.stop_feed = videobuf_dvb_stop_feed;
172 result = dvb_dmx_init(&dvb->demux);
173 if (result < 0) {
174 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
175 dvb->name, result);
176 goto fail_dmx;
177 }
178
179 dvb->dmxdev.filternum = 256;
180 dvb->dmxdev.demux = &dvb->demux.dmx;
181 dvb->dmxdev.capabilities = 0;
182 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
183 if (result < 0) {
184 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
185 dvb->name, result);
186 goto fail_dmxdev;
187 }
188
189 dvb->fe_hw.source = DMX_FRONTEND_0;
190 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
191 if (result < 0) {
192 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
193 dvb->name, result);
194 goto fail_fe_hw;
195 }
196
197 dvb->fe_mem.source = DMX_MEMORY_FE;
198 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
199 if (result < 0) {
200 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
201 dvb->name, result);
202 goto fail_fe_mem;
203 }
204
205 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
206 if (result < 0) {
207 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
208 dvb->name, result);
209 goto fail_fe_conn;
210 }
211
212 /* register network adapter */
213 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
214 return 0;
215
216fail_fe_conn:
217 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
218fail_fe_mem:
219 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
220fail_fe_hw:
221 dvb_dmxdev_release(&dvb->dmxdev);
222fail_dmxdev:
223 dvb_dmx_release(&dvb->demux);
224fail_dmx:
225 dvb_unregister_frontend(dvb->frontend);
226fail_frontend:
227 dvb_frontend_detach(dvb->frontend);
228 dvb_unregister_adapter(&dvb->adapter);
229fail_adapter:
230 return result;
231}
232
233void videobuf_dvb_unregister(struct videobuf_dvb *dvb)
234{
235 dvb_net_release(&dvb->net);
236 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
237 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
238 dvb_dmxdev_release(&dvb->dmxdev);
239 dvb_dmx_release(&dvb->demux);
240 dvb_unregister_frontend(dvb->frontend);
241 dvb_frontend_detach(dvb->frontend);
242 dvb_unregister_adapter(&dvb->adapter);
243}
244
245EXPORT_SYMBOL(videobuf_dvb_register);
246EXPORT_SYMBOL(videobuf_dvb_unregister);
247
248/* ------------------------------------------------------------------ */
249/*
250 * Local variables:
251 * c-basic-offset: 8
252 * compile-command: "make DVB=1"
253 * End:
254 */
255
diff --git a/drivers/media/video/video-buf.c b/drivers/media/video/video-buf.c
deleted file mode 100644
index a32dfbe0585a..000000000000
--- a/drivers/media/video/video-buf.c
+++ /dev/null
@@ -1,1425 +0,0 @@
1/*
2 *
3 * generic helper functions for video4linux capture buffers, to handle
4 * memory management and PCI DMA.
5 * Right now, bttv, saa7134, saa7146 and cx88 use it.
6 *
7 * The functions expect the hardware being able to scatter gatter
8 * (i.e. the buffers are not linear in physical memory, but fragmented
9 * into PAGE_SIZE chunks). They also assume the driver does not need
10 * to touch the video data.
11 *
12 * device specific map/unmap/sync stuff now are mapped as operations
13 * to allow its usage by USB and virtual devices.
14 *
15 * (c) 2001-2004 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
16 * (c) 2006 Mauro Carvalho Chehab <mchehab@infradead.org>
17 * (c) 2006 Ted Walther and John Sokol
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 */
24
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/vmalloc.h>
29#include <linux/pagemap.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <linux/interrupt.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35
36#include <media/video-buf.h>
37
38#define MAGIC_DMABUF 0x19721112
39#define MAGIC_BUFFER 0x20040302
40#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
41 { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
42
43static int debug = 0;
44module_param(debug, int, 0644);
45
46MODULE_DESCRIPTION("helper module to manage video4linux pci dma buffers");
47MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
48MODULE_LICENSE("GPL");
49
50#define dprintk(level, fmt, arg...) if (debug >= level) \
51 printk(KERN_DEBUG "vbuf: " fmt , ## arg)
52
53struct scatterlist*
54videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages)
55{
56 struct scatterlist *sglist;
57 struct page *pg;
58 int i;
59
60 sglist = kcalloc(nr_pages, sizeof(struct scatterlist), GFP_KERNEL);
61 if (NULL == sglist)
62 return NULL;
63 for (i = 0; i < nr_pages; i++, virt += PAGE_SIZE) {
64 pg = vmalloc_to_page(virt);
65 if (NULL == pg)
66 goto err;
67 BUG_ON(PageHighMem(pg));
68 sglist[i].page = pg;
69 sglist[i].length = PAGE_SIZE;
70 }
71 return sglist;
72
73 err:
74 kfree(sglist);
75 return NULL;
76}
77
78struct scatterlist*
79videobuf_pages_to_sg(struct page **pages, int nr_pages, int offset)
80{
81 struct scatterlist *sglist;
82 int i = 0;
83
84 if (NULL == pages[0])
85 return NULL;
86 sglist = kcalloc(nr_pages, sizeof(*sglist), GFP_KERNEL);
87 if (NULL == sglist)
88 return NULL;
89
90 if (NULL == pages[0])
91 goto nopage;
92 if (PageHighMem(pages[0]))
93 /* DMA to highmem pages might not work */
94 goto highmem;
95 sglist[0].page = pages[0];
96 sglist[0].offset = offset;
97 sglist[0].length = PAGE_SIZE - offset;
98 for (i = 1; i < nr_pages; i++) {
99 if (NULL == pages[i])
100 goto nopage;
101 if (PageHighMem(pages[i]))
102 goto highmem;
103 sglist[i].page = pages[i];
104 sglist[i].length = PAGE_SIZE;
105 }
106 return sglist;
107
108 nopage:
109 dprintk(2,"sgl: oops - no page\n");
110 kfree(sglist);
111 return NULL;
112
113 highmem:
114 dprintk(2,"sgl: oops - highmem page\n");
115 kfree(sglist);
116 return NULL;
117}
118
119/* --------------------------------------------------------------------- */
120
121void videobuf_dma_init(struct videobuf_dmabuf *dma)
122{
123 memset(dma,0,sizeof(*dma));
124 dma->magic = MAGIC_DMABUF;
125}
126
127int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
128 unsigned long data, unsigned long size)
129{
130 unsigned long first,last;
131 int err, rw = 0;
132
133 dma->direction = direction;
134 switch (dma->direction) {
135 case PCI_DMA_FROMDEVICE: rw = READ; break;
136 case PCI_DMA_TODEVICE: rw = WRITE; break;
137 default: BUG();
138 }
139
140 first = (data & PAGE_MASK) >> PAGE_SHIFT;
141 last = ((data+size-1) & PAGE_MASK) >> PAGE_SHIFT;
142 dma->offset = data & ~PAGE_MASK;
143 dma->nr_pages = last-first+1;
144 dma->pages = kmalloc(dma->nr_pages * sizeof(struct page*),
145 GFP_KERNEL);
146 if (NULL == dma->pages)
147 return -ENOMEM;
148 dprintk(1,"init user [0x%lx+0x%lx => %d pages]\n",
149 data,size,dma->nr_pages);
150
151 dma->varea = (void *) data;
152
153 down_read(&current->mm->mmap_sem);
154 err = get_user_pages(current,current->mm,
155 data & PAGE_MASK, dma->nr_pages,
156 rw == READ, 1, /* force */
157 dma->pages, NULL);
158 up_read(&current->mm->mmap_sem);
159 if (err != dma->nr_pages) {
160 dma->nr_pages = (err >= 0) ? err : 0;
161 dprintk(1,"get_user_pages: err=%d [%d]\n",err,dma->nr_pages);
162 return err < 0 ? err : -EINVAL;
163 }
164 return 0;
165}
166
167int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
168 int nr_pages)
169{
170 dprintk(1,"init kernel [%d pages]\n",nr_pages);
171 dma->direction = direction;
172 dma->vmalloc = vmalloc_32(nr_pages << PAGE_SHIFT);
173 if (NULL == dma->vmalloc) {
174 dprintk(1,"vmalloc_32(%d pages) failed\n",nr_pages);
175 return -ENOMEM;
176 }
177 dprintk(1,"vmalloc is at addr 0x%08lx, size=%d\n",
178 (unsigned long)dma->vmalloc,
179 nr_pages << PAGE_SHIFT);
180 memset(dma->vmalloc,0,nr_pages << PAGE_SHIFT);
181 dma->nr_pages = nr_pages;
182 return 0;
183}
184
185int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
186 dma_addr_t addr, int nr_pages)
187{
188 dprintk(1,"init overlay [%d pages @ bus 0x%lx]\n",
189 nr_pages,(unsigned long)addr);
190 dma->direction = direction;
191 if (0 == addr)
192 return -EINVAL;
193
194 dma->bus_addr = addr;
195 dma->nr_pages = nr_pages;
196 return 0;
197}
198
199int videobuf_dma_map(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
200{
201 void *dev=q->dev;
202
203 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
204 BUG_ON(0 == dma->nr_pages);
205
206 if (dma->pages) {
207 dma->sglist = videobuf_pages_to_sg(dma->pages, dma->nr_pages,
208 dma->offset);
209 }
210 if (dma->vmalloc) {
211 dma->sglist = videobuf_vmalloc_to_sg
212 (dma->vmalloc,dma->nr_pages);
213 }
214 if (dma->bus_addr) {
215 dma->sglist = kmalloc(sizeof(struct scatterlist), GFP_KERNEL);
216 if (NULL != dma->sglist) {
217 dma->sglen = 1;
218 sg_dma_address(&dma->sglist[0]) = dma->bus_addr & PAGE_MASK;
219 dma->sglist[0].offset = dma->bus_addr & ~PAGE_MASK;
220 sg_dma_len(&dma->sglist[0]) = dma->nr_pages * PAGE_SIZE;
221 }
222 }
223 if (NULL == dma->sglist) {
224 dprintk(1,"scatterlist is NULL\n");
225 return -ENOMEM;
226 }
227 if (!dma->bus_addr) {
228 if (q->ops->vb_map_sg) {
229 dma->sglen = q->ops->vb_map_sg(dev,dma->sglist,
230 dma->nr_pages, dma->direction);
231 }
232 if (0 == dma->sglen) {
233 printk(KERN_WARNING
234 "%s: videobuf_map_sg failed\n",__FUNCTION__);
235 kfree(dma->sglist);
236 dma->sglist = NULL;
237 dma->sglen = 0;
238 return -EIO;
239 }
240 }
241 return 0;
242}
243
244int videobuf_dma_sync(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
245{
246 void *dev=q->dev;
247
248 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
249 BUG_ON(!dma->sglen);
250
251 if (!dma->bus_addr && q->ops->vb_dma_sync_sg)
252 q->ops->vb_dma_sync_sg(dev,dma->sglist,dma->nr_pages,
253 dma->direction);
254
255 return 0;
256}
257
258int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
259{
260 void *dev=q->dev;
261
262 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
263 if (!dma->sglen)
264 return 0;
265
266 if (!dma->bus_addr && q->ops->vb_unmap_sg)
267 q->ops->vb_unmap_sg(dev,dma->sglist,dma->nr_pages,
268 dma->direction);
269 kfree(dma->sglist);
270 dma->sglist = NULL;
271 dma->sglen = 0;
272 return 0;
273}
274
275int videobuf_dma_free(struct videobuf_dmabuf *dma)
276{
277 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
278 BUG_ON(dma->sglen);
279
280 if (dma->pages) {
281 int i;
282 for (i=0; i < dma->nr_pages; i++)
283 page_cache_release(dma->pages[i]);
284 kfree(dma->pages);
285 dma->pages = NULL;
286 }
287
288 vfree(dma->vmalloc);
289 dma->vmalloc = NULL;
290 dma->varea = NULL;
291
292 if (dma->bus_addr) {
293 dma->bus_addr = 0;
294 }
295 dma->direction = PCI_DMA_NONE;
296 return 0;
297}
298
299/* --------------------------------------------------------------------- */
300
301void* videobuf_alloc(unsigned int size)
302{
303 struct videobuf_buffer *vb;
304
305 vb = kzalloc(size,GFP_KERNEL);
306 if (NULL != vb) {
307 videobuf_dma_init(&vb->dma);
308 init_waitqueue_head(&vb->done);
309 vb->magic = MAGIC_BUFFER;
310 }
311 return vb;
312}
313
314int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr)
315{
316 int retval = 0;
317 DECLARE_WAITQUEUE(wait, current);
318
319 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
320 add_wait_queue(&vb->done, &wait);
321 while (vb->state == STATE_ACTIVE || vb->state == STATE_QUEUED) {
322 if (non_blocking) {
323 retval = -EAGAIN;
324 break;
325 }
326 set_current_state(intr ? TASK_INTERRUPTIBLE
327 : TASK_UNINTERRUPTIBLE);
328 if (vb->state == STATE_ACTIVE || vb->state == STATE_QUEUED)
329 schedule();
330 set_current_state(TASK_RUNNING);
331 if (intr && signal_pending(current)) {
332 dprintk(1,"buffer waiton: -EINTR\n");
333 retval = -EINTR;
334 break;
335 }
336 }
337 remove_wait_queue(&vb->done, &wait);
338 return retval;
339}
340
341int
342videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
343 struct v4l2_framebuffer *fbuf)
344{
345 int err,pages;
346 dma_addr_t bus;
347
348 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
349 switch (vb->memory) {
350 case V4L2_MEMORY_MMAP:
351 case V4L2_MEMORY_USERPTR:
352 if (0 == vb->baddr) {
353 /* no userspace addr -- kernel bounce buffer */
354 pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
355 err = videobuf_dma_init_kernel(&vb->dma,PCI_DMA_FROMDEVICE,
356 pages);
357 if (0 != err)
358 return err;
359 } else {
360 /* dma directly to userspace */
361 err = videobuf_dma_init_user(&vb->dma,PCI_DMA_FROMDEVICE,
362 vb->baddr,vb->bsize);
363 if (0 != err)
364 return err;
365 }
366 break;
367 case V4L2_MEMORY_OVERLAY:
368 if (NULL == fbuf)
369 return -EINVAL;
370 /* FIXME: need sanity checks for vb->boff */
371 /*
372 * Using a double cast to avoid compiler warnings when
373 * building for PAE. Compiler doesn't like direct casting
374 * of a 32 bit ptr to 64 bit integer.
375 */
376 bus = (dma_addr_t)(unsigned long)fbuf->base + vb->boff;
377 pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
378 err = videobuf_dma_init_overlay(&vb->dma,PCI_DMA_FROMDEVICE,
379 bus, pages);
380 if (0 != err)
381 return err;
382 break;
383 default:
384 BUG();
385 }
386 err = videobuf_dma_map(q,&vb->dma);
387 if (0 != err)
388 return err;
389
390 return 0;
391}
392
393/* --------------------------------------------------------------------- */
394
395void videobuf_queue_pci(struct videobuf_queue* q)
396{
397 /* If not specified, defaults to PCI map sg */
398 if (!q->ops->vb_map_sg)
399 q->ops->vb_map_sg=(vb_map_sg_t *)pci_map_sg;
400
401 if (!q->ops->vb_dma_sync_sg)
402 q->ops->vb_dma_sync_sg=(vb_map_sg_t *)pci_dma_sync_sg_for_cpu;
403 if (!q->ops->vb_unmap_sg)
404 q->ops->vb_unmap_sg=(vb_map_sg_t *)pci_unmap_sg;
405}
406
407int videobuf_pci_dma_map(struct pci_dev *pci,struct videobuf_dmabuf *dma)
408{
409 struct videobuf_queue q;
410 struct videobuf_queue_ops qops;
411
412 q.dev=pci;
413 qops.vb_map_sg=(vb_map_sg_t *)pci_map_sg;
414 qops.vb_unmap_sg=(vb_map_sg_t *)pci_unmap_sg;
415 q.ops = &qops;
416
417 return (videobuf_dma_map(&q,dma));
418}
419
420int videobuf_pci_dma_unmap(struct pci_dev *pci,struct videobuf_dmabuf *dma)
421{
422 struct videobuf_queue q;
423 struct videobuf_queue_ops qops;
424
425 q.dev=pci;
426 qops.vb_map_sg=(vb_map_sg_t *)pci_map_sg;
427 qops.vb_unmap_sg=(vb_map_sg_t *)pci_unmap_sg;
428 q.ops = &qops;
429
430 return (videobuf_dma_unmap(&q,dma));
431}
432
433void videobuf_queue_init(struct videobuf_queue* q,
434 struct videobuf_queue_ops *ops,
435 void *dev,
436 spinlock_t *irqlock,
437 enum v4l2_buf_type type,
438 enum v4l2_field field,
439 unsigned int msize,
440 void *priv)
441{
442 memset(q,0,sizeof(*q));
443 q->irqlock = irqlock;
444 q->dev = dev;
445 q->type = type;
446 q->field = field;
447 q->msize = msize;
448 q->ops = ops;
449 q->priv_data = priv;
450
451 videobuf_queue_pci(q);
452
453 mutex_init(&q->lock);
454 INIT_LIST_HEAD(&q->stream);
455}
456
457int
458videobuf_queue_is_busy(struct videobuf_queue *q)
459{
460 int i;
461
462 if (q->streaming) {
463 dprintk(1,"busy: streaming active\n");
464 return 1;
465 }
466 if (q->reading) {
467 dprintk(1,"busy: pending read #1\n");
468 return 1;
469 }
470 if (q->read_buf) {
471 dprintk(1,"busy: pending read #2\n");
472 return 1;
473 }
474 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
475 if (NULL == q->bufs[i])
476 continue;
477 if (q->bufs[i]->map) {
478 dprintk(1,"busy: buffer #%d mapped\n",i);
479 return 1;
480 }
481 if (q->bufs[i]->state == STATE_QUEUED) {
482 dprintk(1,"busy: buffer #%d queued\n",i);
483 return 1;
484 }
485 if (q->bufs[i]->state == STATE_ACTIVE) {
486 dprintk(1,"busy: buffer #%d avtive\n",i);
487 return 1;
488 }
489 }
490 return 0;
491}
492
493void
494videobuf_queue_cancel(struct videobuf_queue *q)
495{
496 unsigned long flags=0;
497 int i;
498
499 /* remove queued buffers from list */
500 if (q->irqlock)
501 spin_lock_irqsave(q->irqlock,flags);
502 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
503 if (NULL == q->bufs[i])
504 continue;
505 if (q->bufs[i]->state == STATE_QUEUED) {
506 list_del(&q->bufs[i]->queue);
507 q->bufs[i]->state = STATE_ERROR;
508 }
509 }
510 if (q->irqlock)
511 spin_unlock_irqrestore(q->irqlock,flags);
512
513 /* free all buffers + clear queue */
514 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
515 if (NULL == q->bufs[i])
516 continue;
517 q->ops->buf_release(q,q->bufs[i]);
518 }
519 INIT_LIST_HEAD(&q->stream);
520}
521
522/* --------------------------------------------------------------------- */
523
524enum v4l2_field
525videobuf_next_field(struct videobuf_queue *q)
526{
527 enum v4l2_field field = q->field;
528
529 BUG_ON(V4L2_FIELD_ANY == field);
530
531 if (V4L2_FIELD_ALTERNATE == field) {
532 if (V4L2_FIELD_TOP == q->last) {
533 field = V4L2_FIELD_BOTTOM;
534 q->last = V4L2_FIELD_BOTTOM;
535 } else {
536 field = V4L2_FIELD_TOP;
537 q->last = V4L2_FIELD_TOP;
538 }
539 }
540 return field;
541}
542
543void
544videobuf_status(struct v4l2_buffer *b, struct videobuf_buffer *vb,
545 enum v4l2_buf_type type)
546{
547 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
548
549 b->index = vb->i;
550 b->type = type;
551
552 b->memory = vb->memory;
553 switch (b->memory) {
554 case V4L2_MEMORY_MMAP:
555 b->m.offset = vb->boff;
556 b->length = vb->bsize;
557 break;
558 case V4L2_MEMORY_USERPTR:
559 b->m.userptr = vb->baddr;
560 b->length = vb->bsize;
561 break;
562 case V4L2_MEMORY_OVERLAY:
563 b->m.offset = vb->boff;
564 break;
565 }
566
567 b->flags = 0;
568 if (vb->map)
569 b->flags |= V4L2_BUF_FLAG_MAPPED;
570
571 switch (vb->state) {
572 case STATE_PREPARED:
573 case STATE_QUEUED:
574 case STATE_ACTIVE:
575 b->flags |= V4L2_BUF_FLAG_QUEUED;
576 break;
577 case STATE_DONE:
578 case STATE_ERROR:
579 b->flags |= V4L2_BUF_FLAG_DONE;
580 break;
581 case STATE_NEEDS_INIT:
582 case STATE_IDLE:
583 /* nothing */
584 break;
585 }
586
587 if (vb->input != UNSET) {
588 b->flags |= V4L2_BUF_FLAG_INPUT;
589 b->input = vb->input;
590 }
591
592 b->field = vb->field;
593 b->timestamp = vb->ts;
594 b->bytesused = vb->size;
595 b->sequence = vb->field_count >> 1;
596}
597
598int
599videobuf_reqbufs(struct videobuf_queue *q,
600 struct v4l2_requestbuffers *req)
601{
602 unsigned int size,count;
603 int retval;
604
605 if (req->type != q->type) {
606 dprintk(1,"reqbufs: queue type invalid\n");
607 return -EINVAL;
608 }
609 if (req->count < 1) {
610 dprintk(1,"reqbufs: count invalid (%d)\n",req->count);
611 return -EINVAL;
612 }
613 if (req->memory != V4L2_MEMORY_MMAP &&
614 req->memory != V4L2_MEMORY_USERPTR &&
615 req->memory != V4L2_MEMORY_OVERLAY) {
616 dprintk(1,"reqbufs: memory type invalid\n");
617 return -EINVAL;
618 }
619
620 if (q->streaming) {
621 dprintk(1,"reqbufs: streaming already exists\n");
622 return -EBUSY;
623 }
624 if (!list_empty(&q->stream)) {
625 dprintk(1,"reqbufs: stream running\n");
626 return -EBUSY;
627 }
628
629 mutex_lock(&q->lock);
630 count = req->count;
631 if (count > VIDEO_MAX_FRAME)
632 count = VIDEO_MAX_FRAME;
633 size = 0;
634 q->ops->buf_setup(q,&count,&size);
635 size = PAGE_ALIGN(size);
636 dprintk(1,"reqbufs: bufs=%d, size=0x%x [%d pages total]\n",
637 count, size, (count*size)>>PAGE_SHIFT);
638
639 retval = videobuf_mmap_setup(q,count,size,req->memory);
640 if (retval < 0) {
641 dprintk(1,"reqbufs: mmap setup returned %d\n",retval);
642 goto done;
643 }
644
645 req->count = count;
646
647 done:
648 mutex_unlock(&q->lock);
649 return retval;
650}
651
652int
653videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b)
654{
655 if (unlikely(b->type != q->type)) {
656 dprintk(1,"querybuf: Wrong type.\n");
657 return -EINVAL;
658 }
659 if (unlikely(b->index < 0 || b->index >= VIDEO_MAX_FRAME)) {
660 dprintk(1,"querybuf: index out of range.\n");
661 return -EINVAL;
662 }
663 if (unlikely(NULL == q->bufs[b->index])) {
664 dprintk(1,"querybuf: buffer is null.\n");
665 return -EINVAL;
666 }
667 videobuf_status(b,q->bufs[b->index],q->type);
668 return 0;
669}
670
671int
672videobuf_qbuf(struct videobuf_queue *q,
673 struct v4l2_buffer *b)
674{
675 struct videobuf_buffer *buf;
676 enum v4l2_field field;
677 unsigned long flags=0;
678 int retval;
679
680 mutex_lock(&q->lock);
681 retval = -EBUSY;
682 if (q->reading) {
683 dprintk(1,"qbuf: Reading running...\n");
684 goto done;
685 }
686 retval = -EINVAL;
687 if (b->type != q->type) {
688 dprintk(1,"qbuf: Wrong type.\n");
689 goto done;
690 }
691 if (b->index < 0 || b->index >= VIDEO_MAX_FRAME) {
692 dprintk(1,"qbuf: index out of range.\n");
693 goto done;
694 }
695 buf = q->bufs[b->index];
696 if (NULL == buf) {
697 dprintk(1,"qbuf: buffer is null.\n");
698 goto done;
699 }
700 MAGIC_CHECK(buf->magic,MAGIC_BUFFER);
701 if (buf->memory != b->memory) {
702 dprintk(1,"qbuf: memory type is wrong.\n");
703 goto done;
704 }
705 if (buf->state != STATE_NEEDS_INIT && buf->state != STATE_IDLE) {
706 dprintk(1,"qbuf: buffer is already queued or active.\n");
707 goto done;
708 }
709
710 if (b->flags & V4L2_BUF_FLAG_INPUT) {
711 if (b->input >= q->inputs) {
712 dprintk(1,"qbuf: wrong input.\n");
713 goto done;
714 }
715 buf->input = b->input;
716 } else {
717 buf->input = UNSET;
718 }
719
720 switch (b->memory) {
721 case V4L2_MEMORY_MMAP:
722 if (0 == buf->baddr) {
723 dprintk(1,"qbuf: mmap requested but buffer addr is zero!\n");
724 goto done;
725 }
726 break;
727 case V4L2_MEMORY_USERPTR:
728 if (b->length < buf->bsize) {
729 dprintk(1,"qbuf: buffer length is not enough\n");
730 goto done;
731 }
732 if (STATE_NEEDS_INIT != buf->state && buf->baddr != b->m.userptr)
733 q->ops->buf_release(q,buf);
734 buf->baddr = b->m.userptr;
735 break;
736 case V4L2_MEMORY_OVERLAY:
737 buf->boff = b->m.offset;
738 break;
739 default:
740 dprintk(1,"qbuf: wrong memory type\n");
741 goto done;
742 }
743
744 dprintk(1,"qbuf: requesting next field\n");
745 field = videobuf_next_field(q);
746 retval = q->ops->buf_prepare(q,buf,field);
747 if (0 != retval) {
748 dprintk(1,"qbuf: buffer_prepare returned %d\n",retval);
749 goto done;
750 }
751
752 list_add_tail(&buf->stream,&q->stream);
753 if (q->streaming) {
754 if (q->irqlock)
755 spin_lock_irqsave(q->irqlock,flags);
756 q->ops->buf_queue(q,buf);
757 if (q->irqlock)
758 spin_unlock_irqrestore(q->irqlock,flags);
759 }
760 dprintk(1,"qbuf: succeded\n");
761 retval = 0;
762
763 done:
764 mutex_unlock(&q->lock);
765 return retval;
766}
767
768int
769videobuf_dqbuf(struct videobuf_queue *q,
770 struct v4l2_buffer *b, int nonblocking)
771{
772 struct videobuf_buffer *buf;
773 int retval;
774
775 mutex_lock(&q->lock);
776 retval = -EBUSY;
777 if (q->reading) {
778 dprintk(1,"dqbuf: Reading running...\n");
779 goto done;
780 }
781 retval = -EINVAL;
782 if (b->type != q->type) {
783 dprintk(1,"dqbuf: Wrong type.\n");
784 goto done;
785 }
786 if (list_empty(&q->stream)) {
787 dprintk(1,"dqbuf: stream running\n");
788 goto done;
789 }
790 buf = list_entry(q->stream.next, struct videobuf_buffer, stream);
791 retval = videobuf_waiton(buf, nonblocking, 1);
792 if (retval < 0) {
793 dprintk(1,"dqbuf: waiton returned %d\n",retval);
794 goto done;
795 }
796 switch (buf->state) {
797 case STATE_ERROR:
798 dprintk(1,"dqbuf: state is error\n");
799 retval = -EIO;
800 videobuf_dma_sync(q,&buf->dma);
801 buf->state = STATE_IDLE;
802 break;
803 case STATE_DONE:
804 dprintk(1,"dqbuf: state is done\n");
805 videobuf_dma_sync(q,&buf->dma);
806 buf->state = STATE_IDLE;
807 break;
808 default:
809 dprintk(1,"dqbuf: state invalid\n");
810 retval = -EINVAL;
811 goto done;
812 }
813 list_del(&buf->stream);
814 memset(b,0,sizeof(*b));
815 videobuf_status(b,buf,q->type);
816
817 done:
818 mutex_unlock(&q->lock);
819 return retval;
820}
821
822int videobuf_streamon(struct videobuf_queue *q)
823{
824 struct videobuf_buffer *buf;
825 struct list_head *list;
826 unsigned long flags=0;
827 int retval;
828
829 mutex_lock(&q->lock);
830 retval = -EBUSY;
831 if (q->reading)
832 goto done;
833 retval = 0;
834 if (q->streaming)
835 goto done;
836 q->streaming = 1;
837 if (q->irqlock)
838 spin_lock_irqsave(q->irqlock,flags);
839 list_for_each(list,&q->stream) {
840 buf = list_entry(list, struct videobuf_buffer, stream);
841 if (buf->state == STATE_PREPARED)
842 q->ops->buf_queue(q,buf);
843 }
844 if (q->irqlock)
845 spin_unlock_irqrestore(q->irqlock,flags);
846
847 done:
848 mutex_unlock(&q->lock);
849 return retval;
850}
851
852int videobuf_streamoff(struct videobuf_queue *q)
853{
854 int retval = -EINVAL;
855
856 mutex_lock(&q->lock);
857 if (!q->streaming)
858 goto done;
859 videobuf_queue_cancel(q);
860 q->streaming = 0;
861 retval = 0;
862
863 done:
864 mutex_unlock(&q->lock);
865 return retval;
866}
867
868static ssize_t
869videobuf_read_zerocopy(struct videobuf_queue *q, char __user *data,
870 size_t count, loff_t *ppos)
871{
872 enum v4l2_field field;
873 unsigned long flags=0;
874 int retval;
875
876 /* setup stuff */
877 q->read_buf = videobuf_alloc(q->msize);
878 if (NULL == q->read_buf)
879 return -ENOMEM;
880
881 q->read_buf->memory = V4L2_MEMORY_USERPTR;
882 q->read_buf->baddr = (unsigned long)data;
883 q->read_buf->bsize = count;
884 field = videobuf_next_field(q);
885 retval = q->ops->buf_prepare(q,q->read_buf,field);
886 if (0 != retval)
887 goto done;
888
889 /* start capture & wait */
890 if (q->irqlock)
891 spin_lock_irqsave(q->irqlock,flags);
892 q->ops->buf_queue(q,q->read_buf);
893 if (q->irqlock)
894 spin_unlock_irqrestore(q->irqlock,flags);
895 retval = videobuf_waiton(q->read_buf,0,0);
896 if (0 == retval) {
897 videobuf_dma_sync(q,&q->read_buf->dma);
898 if (STATE_ERROR == q->read_buf->state)
899 retval = -EIO;
900 else
901 retval = q->read_buf->size;
902 }
903
904 done:
905 /* cleanup */
906 q->ops->buf_release(q,q->read_buf);
907 kfree(q->read_buf);
908 q->read_buf = NULL;
909 return retval;
910}
911
912ssize_t videobuf_read_one(struct videobuf_queue *q,
913 char __user *data, size_t count, loff_t *ppos,
914 int nonblocking)
915{
916 enum v4l2_field field;
917 unsigned long flags=0;
918 unsigned size, nbufs, bytes;
919 int retval;
920
921 mutex_lock(&q->lock);
922
923 nbufs = 1; size = 0;
924 q->ops->buf_setup(q,&nbufs,&size);
925 if (NULL == q->read_buf &&
926 count >= size &&
927 !nonblocking) {
928 retval = videobuf_read_zerocopy(q,data,count,ppos);
929 if (retval >= 0 || retval == -EIO)
930 /* ok, all done */
931 goto done;
932 /* fallback to kernel bounce buffer on failures */
933 }
934
935 if (NULL == q->read_buf) {
936 /* need to capture a new frame */
937 retval = -ENOMEM;
938 q->read_buf = videobuf_alloc(q->msize);
939 dprintk(1,"video alloc=0x%p\n", q->read_buf);
940 if (NULL == q->read_buf)
941 goto done;
942 q->read_buf->memory = V4L2_MEMORY_USERPTR;
943 q->read_buf->bsize = count; /* preferred size */
944 field = videobuf_next_field(q);
945 retval = q->ops->buf_prepare(q,q->read_buf,field);
946 if (0 != retval) {
947 kfree (q->read_buf);
948 q->read_buf = NULL;
949 goto done;
950 }
951 if (q->irqlock)
952 spin_lock_irqsave(q->irqlock,flags);
953 q->ops->buf_queue(q,q->read_buf);
954 if (q->irqlock)
955 spin_unlock_irqrestore(q->irqlock,flags);
956 q->read_off = 0;
957 }
958
959 /* wait until capture is done */
960 retval = videobuf_waiton(q->read_buf, nonblocking, 1);
961 if (0 != retval)
962 goto done;
963 videobuf_dma_sync(q,&q->read_buf->dma);
964
965 if (STATE_ERROR == q->read_buf->state) {
966 /* catch I/O errors */
967 q->ops->buf_release(q,q->read_buf);
968 kfree(q->read_buf);
969 q->read_buf = NULL;
970 retval = -EIO;
971 goto done;
972 }
973
974 /* copy to userspace */
975 bytes = count;
976 if (bytes > q->read_buf->size - q->read_off)
977 bytes = q->read_buf->size - q->read_off;
978 retval = -EFAULT;
979 if (copy_to_user(data, q->read_buf->dma.vmalloc+q->read_off, bytes))
980 goto done;
981
982 retval = bytes;
983 q->read_off += bytes;
984 if (q->read_off == q->read_buf->size) {
985 /* all data copied, cleanup */
986 q->ops->buf_release(q,q->read_buf);
987 kfree(q->read_buf);
988 q->read_buf = NULL;
989 }
990
991 done:
992 mutex_unlock(&q->lock);
993 return retval;
994}
995
996int videobuf_read_start(struct videobuf_queue *q)
997{
998 enum v4l2_field field;
999 unsigned long flags=0;
1000 int count = 0, size = 0;
1001 int err, i;
1002
1003 q->ops->buf_setup(q,&count,&size);
1004 if (count < 2)
1005 count = 2;
1006 if (count > VIDEO_MAX_FRAME)
1007 count = VIDEO_MAX_FRAME;
1008 size = PAGE_ALIGN(size);
1009
1010 err = videobuf_mmap_setup(q, count, size, V4L2_MEMORY_USERPTR);
1011 if (err)
1012 return err;
1013 for (i = 0; i < count; i++) {
1014 field = videobuf_next_field(q);
1015 err = q->ops->buf_prepare(q,q->bufs[i],field);
1016 if (err)
1017 return err;
1018 list_add_tail(&q->bufs[i]->stream, &q->stream);
1019 }
1020 if (q->irqlock)
1021 spin_lock_irqsave(q->irqlock,flags);
1022 for (i = 0; i < count; i++)
1023 q->ops->buf_queue(q,q->bufs[i]);
1024 if (q->irqlock)
1025 spin_unlock_irqrestore(q->irqlock,flags);
1026 q->reading = 1;
1027 return 0;
1028}
1029
1030void videobuf_read_stop(struct videobuf_queue *q)
1031{
1032 int i;
1033
1034 videobuf_queue_cancel(q);
1035 videobuf_mmap_free(q);
1036 INIT_LIST_HEAD(&q->stream);
1037 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
1038 if (NULL == q->bufs[i])
1039 continue;
1040 kfree(q->bufs[i]);
1041 q->bufs[i] = NULL;
1042 }
1043 q->read_buf = NULL;
1044 q->reading = 0;
1045}
1046
1047ssize_t videobuf_read_stream(struct videobuf_queue *q,
1048 char __user *data, size_t count, loff_t *ppos,
1049 int vbihack, int nonblocking)
1050{
1051 unsigned int *fc, bytes;
1052 int err, retval;
1053 unsigned long flags=0;
1054
1055 dprintk(2,"%s\n",__FUNCTION__);
1056 mutex_lock(&q->lock);
1057 retval = -EBUSY;
1058 if (q->streaming)
1059 goto done;
1060 if (!q->reading) {
1061 retval = videobuf_read_start(q);
1062 if (retval < 0)
1063 goto done;
1064 }
1065
1066 retval = 0;
1067 while (count > 0) {
1068 /* get / wait for data */
1069 if (NULL == q->read_buf) {
1070 q->read_buf = list_entry(q->stream.next,
1071 struct videobuf_buffer,
1072 stream);
1073 list_del(&q->read_buf->stream);
1074 q->read_off = 0;
1075 }
1076 err = videobuf_waiton(q->read_buf, nonblocking, 1);
1077 if (err < 0) {
1078 if (0 == retval)
1079 retval = err;
1080 break;
1081 }
1082
1083 if (q->read_buf->state == STATE_DONE) {
1084 if (vbihack) {
1085 /* dirty, undocumented hack -- pass the frame counter
1086 * within the last four bytes of each vbi data block.
1087 * We need that one to maintain backward compatibility
1088 * to all vbi decoding software out there ... */
1089 fc = (unsigned int*)q->read_buf->dma.vmalloc;
1090 fc += (q->read_buf->size>>2) -1;
1091 *fc = q->read_buf->field_count >> 1;
1092 dprintk(1,"vbihack: %d\n",*fc);
1093 }
1094
1095 /* copy stuff */
1096 bytes = count;
1097 if (bytes > q->read_buf->size - q->read_off)
1098 bytes = q->read_buf->size - q->read_off;
1099 if (copy_to_user(data + retval,
1100 q->read_buf->dma.vmalloc + q->read_off,
1101 bytes)) {
1102 if (0 == retval)
1103 retval = -EFAULT;
1104 break;
1105 }
1106 count -= bytes;
1107 retval += bytes;
1108 q->read_off += bytes;
1109 } else {
1110 /* some error */
1111 q->read_off = q->read_buf->size;
1112 if (0 == retval)
1113 retval = -EIO;
1114 }
1115
1116 /* requeue buffer when done with copying */
1117 if (q->read_off == q->read_buf->size) {
1118 list_add_tail(&q->read_buf->stream,
1119 &q->stream);
1120 if (q->irqlock)
1121 spin_lock_irqsave(q->irqlock,flags);
1122 q->ops->buf_queue(q,q->read_buf);
1123 if (q->irqlock)
1124 spin_unlock_irqrestore(q->irqlock,flags);
1125 q->read_buf = NULL;
1126 }
1127 if (retval < 0)
1128 break;
1129 }
1130
1131 done:
1132 mutex_unlock(&q->lock);
1133 return retval;
1134}
1135
1136unsigned int videobuf_poll_stream(struct file *file,
1137 struct videobuf_queue *q,
1138 poll_table *wait)
1139{
1140 struct videobuf_buffer *buf = NULL;
1141 unsigned int rc = 0;
1142
1143 mutex_lock(&q->lock);
1144 if (q->streaming) {
1145 if (!list_empty(&q->stream))
1146 buf = list_entry(q->stream.next,
1147 struct videobuf_buffer, stream);
1148 } else {
1149 if (!q->reading)
1150 videobuf_read_start(q);
1151 if (!q->reading) {
1152 rc = POLLERR;
1153 } else if (NULL == q->read_buf) {
1154 q->read_buf = list_entry(q->stream.next,
1155 struct videobuf_buffer,
1156 stream);
1157 list_del(&q->read_buf->stream);
1158 q->read_off = 0;
1159 }
1160 buf = q->read_buf;
1161 }
1162 if (!buf)
1163 rc = POLLERR;
1164
1165 if (0 == rc) {
1166 poll_wait(file, &buf->done, wait);
1167 if (buf->state == STATE_DONE ||
1168 buf->state == STATE_ERROR)
1169 rc = POLLIN|POLLRDNORM;
1170 }
1171 mutex_unlock(&q->lock);
1172 return rc;
1173}
1174
1175/* --------------------------------------------------------------------- */
1176
1177static void
1178videobuf_vm_open(struct vm_area_struct *vma)
1179{
1180 struct videobuf_mapping *map = vma->vm_private_data;
1181
1182 dprintk(2,"vm_open %p [count=%d,vma=%08lx-%08lx]\n",map,
1183 map->count,vma->vm_start,vma->vm_end);
1184 map->count++;
1185}
1186
1187static void
1188videobuf_vm_close(struct vm_area_struct *vma)
1189{
1190 struct videobuf_mapping *map = vma->vm_private_data;
1191 struct videobuf_queue *q = map->q;
1192 int i;
1193
1194 dprintk(2,"vm_close %p [count=%d,vma=%08lx-%08lx]\n",map,
1195 map->count,vma->vm_start,vma->vm_end);
1196
1197 map->count--;
1198 if (0 == map->count) {
1199 dprintk(1,"munmap %p q=%p\n",map,q);
1200 mutex_lock(&q->lock);
1201 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
1202 if (NULL == q->bufs[i])
1203 continue;
1204 if (q->bufs[i])
1205 ;
1206 if (q->bufs[i]->map != map)
1207 continue;
1208 q->bufs[i]->map = NULL;
1209 q->bufs[i]->baddr = 0;
1210 q->ops->buf_release(q,q->bufs[i]);
1211 }
1212 mutex_unlock(&q->lock);
1213 kfree(map);
1214 }
1215 return;
1216}
1217
1218/*
1219 * Get a anonymous page for the mapping. Make sure we can DMA to that
1220 * memory location with 32bit PCI devices (i.e. don't use highmem for
1221 * now ...). Bounce buffers don't work very well for the data rates
1222 * video capture has.
1223 */
1224static struct page*
1225videobuf_vm_nopage(struct vm_area_struct *vma, unsigned long vaddr,
1226 int *type)
1227{
1228 struct page *page;
1229
1230 dprintk(3,"nopage: fault @ %08lx [vma %08lx-%08lx]\n",
1231 vaddr,vma->vm_start,vma->vm_end);
1232 if (vaddr > vma->vm_end)
1233 return NOPAGE_SIGBUS;
1234 page = alloc_page(GFP_USER | __GFP_DMA32);
1235 if (!page)
1236 return NOPAGE_OOM;
1237 clear_user_page(page_address(page), vaddr, page);
1238 if (type)
1239 *type = VM_FAULT_MINOR;
1240 return page;
1241}
1242
1243static struct vm_operations_struct videobuf_vm_ops =
1244{
1245 .open = videobuf_vm_open,
1246 .close = videobuf_vm_close,
1247 .nopage = videobuf_vm_nopage,
1248};
1249
1250int videobuf_mmap_setup(struct videobuf_queue *q,
1251 unsigned int bcount, unsigned int bsize,
1252 enum v4l2_memory memory)
1253{
1254 unsigned int i;
1255 int err;
1256
1257 err = videobuf_mmap_free(q);
1258 if (0 != err)
1259 return err;
1260
1261 for (i = 0; i < bcount; i++) {
1262 q->bufs[i] = videobuf_alloc(q->msize);
1263 q->bufs[i]->i = i;
1264 q->bufs[i]->input = UNSET;
1265 q->bufs[i]->memory = memory;
1266 q->bufs[i]->bsize = bsize;
1267 switch (memory) {
1268 case V4L2_MEMORY_MMAP:
1269 q->bufs[i]->boff = bsize * i;
1270 break;
1271 case V4L2_MEMORY_USERPTR:
1272 case V4L2_MEMORY_OVERLAY:
1273 /* nothing */
1274 break;
1275 }
1276 }
1277 dprintk(1,"mmap setup: %d buffers, %d bytes each\n",
1278 bcount,bsize);
1279 return 0;
1280}
1281
1282int videobuf_mmap_free(struct videobuf_queue *q)
1283{
1284 int i;
1285
1286 for (i = 0; i < VIDEO_MAX_FRAME; i++)
1287 if (q->bufs[i] && q->bufs[i]->map)
1288 return -EBUSY;
1289 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
1290 if (NULL == q->bufs[i])
1291 continue;
1292 q->ops->buf_release(q,q->bufs[i]);
1293 kfree(q->bufs[i]);
1294 q->bufs[i] = NULL;
1295 }
1296 return 0;
1297}
1298
1299int videobuf_mmap_mapper(struct videobuf_queue *q,
1300 struct vm_area_struct *vma)
1301{
1302 struct videobuf_mapping *map;
1303 unsigned int first,last,size,i;
1304 int retval;
1305
1306 mutex_lock(&q->lock);
1307 retval = -EINVAL;
1308 if (!(vma->vm_flags & VM_WRITE)) {
1309 dprintk(1,"mmap app bug: PROT_WRITE please\n");
1310 goto done;
1311 }
1312 if (!(vma->vm_flags & VM_SHARED)) {
1313 dprintk(1,"mmap app bug: MAP_SHARED please\n");
1314 goto done;
1315 }
1316
1317 /* look for first buffer to map */
1318 for (first = 0; first < VIDEO_MAX_FRAME; first++) {
1319 if (NULL == q->bufs[first])
1320 continue;
1321 if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
1322 continue;
1323 if (q->bufs[first]->boff == (vma->vm_pgoff << PAGE_SHIFT))
1324 break;
1325 }
1326 if (VIDEO_MAX_FRAME == first) {
1327 dprintk(1,"mmap app bug: offset invalid [offset=0x%lx]\n",
1328 (vma->vm_pgoff << PAGE_SHIFT));
1329 goto done;
1330 }
1331
1332 /* look for last buffer to map */
1333 for (size = 0, last = first; last < VIDEO_MAX_FRAME; last++) {
1334 if (NULL == q->bufs[last])
1335 continue;
1336 if (V4L2_MEMORY_MMAP != q->bufs[last]->memory)
1337 continue;
1338 if (q->bufs[last]->map) {
1339 retval = -EBUSY;
1340 goto done;
1341 }
1342 size += q->bufs[last]->bsize;
1343 if (size == (vma->vm_end - vma->vm_start))
1344 break;
1345 }
1346 if (VIDEO_MAX_FRAME == last) {
1347 dprintk(1,"mmap app bug: size invalid [size=0x%lx]\n",
1348 (vma->vm_end - vma->vm_start));
1349 goto done;
1350 }
1351
1352 /* create mapping + update buffer list */
1353 retval = -ENOMEM;
1354 map = kmalloc(sizeof(struct videobuf_mapping),GFP_KERNEL);
1355 if (NULL == map)
1356 goto done;
1357 for (size = 0, i = first; i <= last; size += q->bufs[i++]->bsize) {
1358 q->bufs[i]->map = map;
1359 q->bufs[i]->baddr = vma->vm_start + size;
1360 }
1361 map->count = 1;
1362 map->start = vma->vm_start;
1363 map->end = vma->vm_end;
1364 map->q = q;
1365 vma->vm_ops = &videobuf_vm_ops;
1366 vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
1367 vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */
1368 vma->vm_private_data = map;
1369 dprintk(1,"mmap %p: q=%p %08lx-%08lx pgoff %08lx bufs %d-%d\n",
1370 map,q,vma->vm_start,vma->vm_end,vma->vm_pgoff,first,last);
1371 retval = 0;
1372
1373 done:
1374 mutex_unlock(&q->lock);
1375 return retval;
1376}
1377
1378/* --------------------------------------------------------------------- */
1379
1380EXPORT_SYMBOL_GPL(videobuf_vmalloc_to_sg);
1381
1382EXPORT_SYMBOL_GPL(videobuf_dma_init);
1383EXPORT_SYMBOL_GPL(videobuf_dma_init_user);
1384EXPORT_SYMBOL_GPL(videobuf_dma_init_kernel);
1385EXPORT_SYMBOL_GPL(videobuf_dma_init_overlay);
1386EXPORT_SYMBOL_GPL(videobuf_dma_map);
1387EXPORT_SYMBOL_GPL(videobuf_dma_sync);
1388EXPORT_SYMBOL_GPL(videobuf_dma_unmap);
1389EXPORT_SYMBOL_GPL(videobuf_dma_free);
1390
1391EXPORT_SYMBOL_GPL(videobuf_pci_dma_map);
1392EXPORT_SYMBOL_GPL(videobuf_pci_dma_unmap);
1393
1394EXPORT_SYMBOL_GPL(videobuf_alloc);
1395EXPORT_SYMBOL_GPL(videobuf_waiton);
1396EXPORT_SYMBOL_GPL(videobuf_iolock);
1397
1398EXPORT_SYMBOL_GPL(videobuf_queue_init);
1399EXPORT_SYMBOL_GPL(videobuf_queue_cancel);
1400EXPORT_SYMBOL_GPL(videobuf_queue_is_busy);
1401
1402EXPORT_SYMBOL_GPL(videobuf_next_field);
1403EXPORT_SYMBOL_GPL(videobuf_status);
1404EXPORT_SYMBOL_GPL(videobuf_reqbufs);
1405EXPORT_SYMBOL_GPL(videobuf_querybuf);
1406EXPORT_SYMBOL_GPL(videobuf_qbuf);
1407EXPORT_SYMBOL_GPL(videobuf_dqbuf);
1408EXPORT_SYMBOL_GPL(videobuf_streamon);
1409EXPORT_SYMBOL_GPL(videobuf_streamoff);
1410
1411EXPORT_SYMBOL_GPL(videobuf_read_start);
1412EXPORT_SYMBOL_GPL(videobuf_read_stop);
1413EXPORT_SYMBOL_GPL(videobuf_read_stream);
1414EXPORT_SYMBOL_GPL(videobuf_read_one);
1415EXPORT_SYMBOL_GPL(videobuf_poll_stream);
1416
1417EXPORT_SYMBOL_GPL(videobuf_mmap_setup);
1418EXPORT_SYMBOL_GPL(videobuf_mmap_free);
1419EXPORT_SYMBOL_GPL(videobuf_mmap_mapper);
1420
1421/*
1422 * Local variables:
1423 * c-basic-offset: 8
1424 * End:
1425 */
diff --git a/drivers/media/video/videobuf-core.c b/drivers/media/video/videobuf-core.c
new file mode 100644
index 000000000000..c606332512b6
--- /dev/null
+++ b/drivers/media/video/videobuf-core.c
@@ -0,0 +1,1006 @@
1/*
2 * generic helper functions for handling video4linux capture buffers
3 *
4 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
5 *
6 * Highly based on video-buf written originally by:
7 * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org>
8 * (c) 2006 Mauro Carvalho Chehab, <mchehab@infradead.org>
9 * (c) 2006 Ted Walther and John Sokol
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/slab.h>
20#include <linux/interrupt.h>
21
22#include <media/videobuf-core.h>
23
24#define MAGIC_BUFFER 0x20070728
25#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
26 { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
27
28static int debug = 0;
29module_param(debug, int, 0644);
30
31MODULE_DESCRIPTION("helper module to manage video4linux buffers");
32MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
33MODULE_LICENSE("GPL");
34
35#define dprintk(level, fmt, arg...) if (debug >= level) \
36 printk(KERN_DEBUG "vbuf: " fmt , ## arg)
37
38/* --------------------------------------------------------------------- */
39
40#define CALL(q, f, arg...) \
41 ( (q->int_ops->f)? q->int_ops->f(arg) : 0)
42
43void* videobuf_alloc(struct videobuf_queue* q)
44{
45 struct videobuf_buffer *vb;
46
47 BUG_ON (q->msize<sizeof(*vb));
48
49 if (!q->int_ops || !q->int_ops->alloc) {
50 printk(KERN_ERR "No specific ops defined!\n");
51 BUG();
52 }
53
54 vb = q->int_ops->alloc(q->msize);
55
56 if (NULL != vb) {
57 init_waitqueue_head(&vb->done);
58 vb->magic = MAGIC_BUFFER;
59 }
60
61 return vb;
62}
63
64int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr)
65{
66 int retval = 0;
67 DECLARE_WAITQUEUE(wait, current);
68
69 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
70 add_wait_queue(&vb->done, &wait);
71 while (vb->state == STATE_ACTIVE || vb->state == STATE_QUEUED) {
72 if (non_blocking) {
73 retval = -EAGAIN;
74 break;
75 }
76 set_current_state(intr ? TASK_INTERRUPTIBLE
77 : TASK_UNINTERRUPTIBLE);
78 if (vb->state == STATE_ACTIVE || vb->state == STATE_QUEUED)
79 schedule();
80 set_current_state(TASK_RUNNING);
81 if (intr && signal_pending(current)) {
82 dprintk(1,"buffer waiton: -EINTR\n");
83 retval = -EINTR;
84 break;
85 }
86 }
87 remove_wait_queue(&vb->done, &wait);
88 return retval;
89}
90
91int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
92 struct v4l2_framebuffer *fbuf)
93{
94 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
95 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
96
97 /* FIXME: This is required to avoid OOPS on some cases, since mmap_mapper()
98 method should be called before _iolock.
99 On some cases, the mmap_mapper() is called only after scheduling.
100
101 However, this way is just too dirty! Better to wait for some event.
102 */
103 schedule_timeout(HZ);
104
105 return CALL(q,iolock,q,vb,fbuf);
106}
107
108/* --------------------------------------------------------------------- */
109
110
111void videobuf_queue_core_init(struct videobuf_queue* q,
112 struct videobuf_queue_ops *ops,
113 void *dev,
114 spinlock_t *irqlock,
115 enum v4l2_buf_type type,
116 enum v4l2_field field,
117 unsigned int msize,
118 void *priv,
119 struct videobuf_qtype_ops *int_ops)
120{
121 memset(q,0,sizeof(*q));
122 q->irqlock = irqlock;
123 q->dev = dev;
124 q->type = type;
125 q->field = field;
126 q->msize = msize;
127 q->ops = ops;
128 q->priv_data = priv;
129 q->int_ops = int_ops;
130
131 /* All buffer operations are mandatory */
132 BUG_ON (!q->ops->buf_setup);
133 BUG_ON (!q->ops->buf_prepare);
134 BUG_ON (!q->ops->buf_queue);
135 BUG_ON (!q->ops->buf_release);
136
137 /* Having implementations for abstract methods are mandatory */
138 BUG_ON (!q->int_ops);
139
140 mutex_init(&q->lock);
141 INIT_LIST_HEAD(&q->stream);
142}
143
144int videobuf_queue_is_busy(struct videobuf_queue *q)
145{
146 int i;
147
148 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
149
150 if (q->streaming) {
151 dprintk(1,"busy: streaming active\n");
152 return 1;
153 }
154 if (q->reading) {
155 dprintk(1,"busy: pending read #1\n");
156 return 1;
157 }
158 if (q->read_buf) {
159 dprintk(1,"busy: pending read #2\n");
160 return 1;
161 }
162 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
163 if (NULL == q->bufs[i])
164 continue;
165 if (q->bufs[i]->map) {
166 dprintk(1,"busy: buffer #%d mapped\n",i);
167 return 1;
168 }
169 if (q->bufs[i]->state == STATE_QUEUED) {
170 dprintk(1,"busy: buffer #%d queued\n",i);
171 return 1;
172 }
173 if (q->bufs[i]->state == STATE_ACTIVE) {
174 dprintk(1,"busy: buffer #%d avtive\n",i);
175 return 1;
176 }
177 }
178 return 0;
179}
180
181void videobuf_queue_cancel(struct videobuf_queue *q)
182{
183 unsigned long flags=0;
184 int i;
185
186 /* remove queued buffers from list */
187 if (q->irqlock)
188 spin_lock_irqsave(q->irqlock,flags);
189 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
190 if (NULL == q->bufs[i])
191 continue;
192 if (q->bufs[i]->state == STATE_QUEUED) {
193 list_del(&q->bufs[i]->queue);
194 q->bufs[i]->state = STATE_ERROR;
195 }
196 }
197 if (q->irqlock)
198 spin_unlock_irqrestore(q->irqlock,flags);
199
200 /* free all buffers + clear queue */
201 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
202 if (NULL == q->bufs[i])
203 continue;
204 q->ops->buf_release(q,q->bufs[i]);
205 }
206 INIT_LIST_HEAD(&q->stream);
207}
208
209/* --------------------------------------------------------------------- */
210
211enum v4l2_field videobuf_next_field(struct videobuf_queue *q)
212{
213 enum v4l2_field field = q->field;
214
215 BUG_ON(V4L2_FIELD_ANY == field);
216
217 if (V4L2_FIELD_ALTERNATE == field) {
218 if (V4L2_FIELD_TOP == q->last) {
219 field = V4L2_FIELD_BOTTOM;
220 q->last = V4L2_FIELD_BOTTOM;
221 } else {
222 field = V4L2_FIELD_TOP;
223 q->last = V4L2_FIELD_TOP;
224 }
225 }
226 return field;
227}
228
229static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b,
230 struct videobuf_buffer *vb, enum v4l2_buf_type type)
231{
232 MAGIC_CHECK(vb->magic,MAGIC_BUFFER);
233 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
234
235 b->index = vb->i;
236 b->type = type;
237
238 b->memory = vb->memory;
239 switch (b->memory) {
240 case V4L2_MEMORY_MMAP:
241 b->m.offset = vb->boff;
242 b->length = vb->bsize;
243 break;
244 case V4L2_MEMORY_USERPTR:
245 b->m.userptr = vb->baddr;
246 b->length = vb->bsize;
247 break;
248 case V4L2_MEMORY_OVERLAY:
249 b->m.offset = vb->boff;
250 break;
251 }
252
253 b->flags = 0;
254 if (vb->map)
255 b->flags |= V4L2_BUF_FLAG_MAPPED;
256
257 switch (vb->state) {
258 case STATE_PREPARED:
259 case STATE_QUEUED:
260 case STATE_ACTIVE:
261 b->flags |= V4L2_BUF_FLAG_QUEUED;
262 break;
263 case STATE_DONE:
264 case STATE_ERROR:
265 b->flags |= V4L2_BUF_FLAG_DONE;
266 break;
267 case STATE_NEEDS_INIT:
268 case STATE_IDLE:
269 /* nothing */
270 break;
271 }
272
273 if (vb->input != UNSET) {
274 b->flags |= V4L2_BUF_FLAG_INPUT;
275 b->input = vb->input;
276 }
277
278 b->field = vb->field;
279 b->timestamp = vb->ts;
280 b->bytesused = vb->size;
281 b->sequence = vb->field_count >> 1;
282}
283
284int videobuf_reqbufs(struct videobuf_queue *q,
285 struct v4l2_requestbuffers *req)
286{
287 unsigned int size,count;
288 int retval;
289
290 if (req->type != q->type) {
291 dprintk(1,"reqbufs: queue type invalid\n");
292 return -EINVAL;
293 }
294 if (req->count < 1) {
295 dprintk(1,"reqbufs: count invalid (%d)\n",req->count);
296 return -EINVAL;
297 }
298 if (req->memory != V4L2_MEMORY_MMAP &&
299 req->memory != V4L2_MEMORY_USERPTR &&
300 req->memory != V4L2_MEMORY_OVERLAY) {
301 dprintk(1,"reqbufs: memory type invalid\n");
302 return -EINVAL;
303 }
304
305 mutex_lock(&q->lock);
306 if (q->streaming) {
307 dprintk(1,"reqbufs: streaming already exists\n");
308 retval = -EBUSY;
309 goto done;
310 }
311 if (!list_empty(&q->stream)) {
312 dprintk(1,"reqbufs: stream running\n");
313 retval = -EBUSY;
314 goto done;
315 }
316
317 count = req->count;
318 if (count > VIDEO_MAX_FRAME)
319 count = VIDEO_MAX_FRAME;
320 size = 0;
321 q->ops->buf_setup(q,&count,&size);
322 size = PAGE_ALIGN(size);
323 dprintk(1,"reqbufs: bufs=%d, size=0x%x [%d pages total]\n",
324 count, size, (count*size)>>PAGE_SHIFT);
325
326 retval = videobuf_mmap_setup(q,count,size,req->memory);
327 if (retval < 0) {
328 dprintk(1,"reqbufs: mmap setup returned %d\n",retval);
329 goto done;
330 }
331
332 req->count = retval;
333
334 done:
335 mutex_unlock(&q->lock);
336 return retval;
337}
338
339int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b)
340{
341 if (unlikely(b->type != q->type)) {
342 dprintk(1,"querybuf: Wrong type.\n");
343 return -EINVAL;
344 }
345 if (unlikely(b->index < 0 || b->index >= VIDEO_MAX_FRAME)) {
346 dprintk(1,"querybuf: index out of range.\n");
347 return -EINVAL;
348 }
349 if (unlikely(NULL == q->bufs[b->index])) {
350 dprintk(1,"querybuf: buffer is null.\n");
351 return -EINVAL;
352 }
353 videobuf_status(q,b,q->bufs[b->index],q->type);
354 return 0;
355}
356
357int videobuf_qbuf(struct videobuf_queue *q,
358 struct v4l2_buffer *b)
359{
360 struct videobuf_buffer *buf;
361 enum v4l2_field field;
362 unsigned long flags=0;
363 int retval;
364
365 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
366
367 if (b->memory == V4L2_MEMORY_MMAP)
368 down_read(&current->mm->mmap_sem);
369
370 mutex_lock(&q->lock);
371 retval = -EBUSY;
372 if (q->reading) {
373 dprintk(1,"qbuf: Reading running...\n");
374 goto done;
375 }
376 retval = -EINVAL;
377 if (b->type != q->type) {
378 dprintk(1,"qbuf: Wrong type.\n");
379 goto done;
380 }
381 if (b->index < 0 || b->index >= VIDEO_MAX_FRAME) {
382 dprintk(1,"qbuf: index out of range.\n");
383 goto done;
384 }
385 buf = q->bufs[b->index];
386 if (NULL == buf) {
387 dprintk(1,"qbuf: buffer is null.\n");
388 goto done;
389 }
390 MAGIC_CHECK(buf->magic,MAGIC_BUFFER);
391 if (buf->memory != b->memory) {
392 dprintk(1,"qbuf: memory type is wrong.\n");
393 goto done;
394 }
395 if (buf->state != STATE_NEEDS_INIT && buf->state != STATE_IDLE) {
396 dprintk(1,"qbuf: buffer is already queued or active.\n");
397 goto done;
398 }
399
400 if (b->flags & V4L2_BUF_FLAG_INPUT) {
401 if (b->input >= q->inputs) {
402 dprintk(1,"qbuf: wrong input.\n");
403 goto done;
404 }
405 buf->input = b->input;
406 } else {
407 buf->input = UNSET;
408 }
409
410 switch (b->memory) {
411 case V4L2_MEMORY_MMAP:
412 if (0 == buf->baddr) {
413 dprintk(1,"qbuf: mmap requested but buffer addr is zero!\n");
414 goto done;
415 }
416 break;
417 case V4L2_MEMORY_USERPTR:
418 if (b->length < buf->bsize) {
419 dprintk(1,"qbuf: buffer length is not enough\n");
420 goto done;
421 }
422 if (STATE_NEEDS_INIT != buf->state && buf->baddr != b->m.userptr)
423 q->ops->buf_release(q,buf);
424 buf->baddr = b->m.userptr;
425 break;
426 case V4L2_MEMORY_OVERLAY:
427 buf->boff = b->m.offset;
428 break;
429 default:
430 dprintk(1,"qbuf: wrong memory type\n");
431 goto done;
432 }
433
434 dprintk(1,"qbuf: requesting next field\n");
435 field = videobuf_next_field(q);
436 retval = q->ops->buf_prepare(q,buf,field);
437 if (0 != retval) {
438 dprintk(1,"qbuf: buffer_prepare returned %d\n",retval);
439 goto done;
440 }
441
442 list_add_tail(&buf->stream,&q->stream);
443 if (q->streaming) {
444 if (q->irqlock)
445 spin_lock_irqsave(q->irqlock,flags);
446 q->ops->buf_queue(q,buf);
447 if (q->irqlock)
448 spin_unlock_irqrestore(q->irqlock,flags);
449 }
450 dprintk(1,"qbuf: succeded\n");
451 retval = 0;
452
453 done:
454 mutex_unlock(&q->lock);
455
456 if (b->memory == V4L2_MEMORY_MMAP)
457 up_read(&current->mm->mmap_sem);
458
459 return retval;
460}
461
462int videobuf_dqbuf(struct videobuf_queue *q,
463 struct v4l2_buffer *b, int nonblocking)
464{
465 struct videobuf_buffer *buf;
466 int retval;
467
468 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
469
470 mutex_lock(&q->lock);
471 retval = -EBUSY;
472 if (q->reading) {
473 dprintk(1,"dqbuf: Reading running...\n");
474 goto done;
475 }
476 retval = -EINVAL;
477 if (b->type != q->type) {
478 dprintk(1,"dqbuf: Wrong type.\n");
479 goto done;
480 }
481 if (list_empty(&q->stream)) {
482 dprintk(1,"dqbuf: stream running\n");
483 goto done;
484 }
485 buf = list_entry(q->stream.next, struct videobuf_buffer, stream);
486 retval = videobuf_waiton(buf, nonblocking, 1);
487 if (retval < 0) {
488 dprintk(1,"dqbuf: waiton returned %d\n",retval);
489 goto done;
490 }
491 switch (buf->state) {
492 case STATE_ERROR:
493 dprintk(1,"dqbuf: state is error\n");
494 retval = -EIO;
495 CALL(q,sync,q, buf);
496 buf->state = STATE_IDLE;
497 break;
498 case STATE_DONE:
499 dprintk(1,"dqbuf: state is done\n");
500 CALL(q,sync,q, buf);
501 buf->state = STATE_IDLE;
502 break;
503 default:
504 dprintk(1,"dqbuf: state invalid\n");
505 retval = -EINVAL;
506 goto done;
507 }
508 list_del(&buf->stream);
509 memset(b,0,sizeof(*b));
510 videobuf_status(q,b,buf,q->type);
511
512 done:
513 mutex_unlock(&q->lock);
514 return retval;
515}
516
517int videobuf_streamon(struct videobuf_queue *q)
518{
519 struct videobuf_buffer *buf;
520 unsigned long flags=0;
521 int retval;
522
523 mutex_lock(&q->lock);
524 retval = -EBUSY;
525 if (q->reading)
526 goto done;
527 retval = 0;
528 if (q->streaming)
529 goto done;
530 q->streaming = 1;
531 if (q->irqlock)
532 spin_lock_irqsave(q->irqlock,flags);
533 list_for_each_entry(buf, &q->stream, stream)
534 if (buf->state == STATE_PREPARED)
535 q->ops->buf_queue(q,buf);
536 if (q->irqlock)
537 spin_unlock_irqrestore(q->irqlock,flags);
538
539 done:
540 mutex_unlock(&q->lock);
541 return retval;
542}
543
544int videobuf_streamoff(struct videobuf_queue *q)
545{
546 int retval = -EINVAL;
547
548 mutex_lock(&q->lock);
549 if (!q->streaming)
550 goto done;
551 videobuf_queue_cancel(q);
552 q->streaming = 0;
553 retval = 0;
554
555 done:
556 mutex_unlock(&q->lock);
557 return retval;
558}
559
560static ssize_t videobuf_read_zerocopy(struct videobuf_queue *q,
561 char __user *data,
562 size_t count, loff_t *ppos)
563{
564 enum v4l2_field field;
565 unsigned long flags=0;
566 int retval;
567
568 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
569
570 /* setup stuff */
571 q->read_buf = videobuf_alloc(q);
572 if (NULL == q->read_buf)
573 return -ENOMEM;
574
575 q->read_buf->memory = V4L2_MEMORY_USERPTR;
576 q->read_buf->baddr = (unsigned long)data;
577 q->read_buf->bsize = count;
578
579 field = videobuf_next_field(q);
580 retval = q->ops->buf_prepare(q,q->read_buf,field);
581 if (0 != retval)
582 goto done;
583
584 /* start capture & wait */
585 if (q->irqlock)
586 spin_lock_irqsave(q->irqlock,flags);
587 q->ops->buf_queue(q,q->read_buf);
588 if (q->irqlock)
589 spin_unlock_irqrestore(q->irqlock,flags);
590 retval = videobuf_waiton(q->read_buf,0,0);
591 if (0 == retval) {
592 CALL(q,sync,q,q->read_buf);
593 if (STATE_ERROR == q->read_buf->state)
594 retval = -EIO;
595 else
596 retval = q->read_buf->size;
597 }
598
599 done:
600 /* cleanup */
601 q->ops->buf_release(q,q->read_buf);
602 kfree(q->read_buf);
603 q->read_buf = NULL;
604 return retval;
605}
606
607ssize_t videobuf_read_one(struct videobuf_queue *q,
608 char __user *data, size_t count, loff_t *ppos,
609 int nonblocking)
610{
611 enum v4l2_field field;
612 unsigned long flags=0;
613 unsigned size, nbufs;
614 int retval;
615
616 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
617
618 mutex_lock(&q->lock);
619
620 nbufs = 1; size = 0;
621 q->ops->buf_setup(q,&nbufs,&size);
622
623 if (NULL == q->read_buf &&
624 count >= size &&
625 !nonblocking) {
626 retval = videobuf_read_zerocopy(q,data,count,ppos);
627 if (retval >= 0 || retval == -EIO)
628 /* ok, all done */
629 goto done;
630 /* fallback to kernel bounce buffer on failures */
631 }
632
633 if (NULL == q->read_buf) {
634 /* need to capture a new frame */
635 retval = -ENOMEM;
636 q->read_buf = videobuf_alloc(q);
637
638 dprintk(1,"video alloc=0x%p\n", q->read_buf);
639 if (NULL == q->read_buf)
640 goto done;
641 q->read_buf->memory = V4L2_MEMORY_USERPTR;
642 q->read_buf->bsize = count; /* preferred size */
643 field = videobuf_next_field(q);
644 retval = q->ops->buf_prepare(q,q->read_buf,field);
645
646 if (0 != retval) {
647 kfree (q->read_buf);
648 q->read_buf = NULL;
649 goto done;
650 }
651 if (q->irqlock)
652 spin_lock_irqsave(q->irqlock,flags);
653
654 q->ops->buf_queue(q,q->read_buf);
655 if (q->irqlock)
656 spin_unlock_irqrestore(q->irqlock,flags);
657 q->read_off = 0;
658 }
659
660 /* wait until capture is done */
661 retval = videobuf_waiton(q->read_buf, nonblocking, 1);
662 if (0 != retval)
663 goto done;
664
665 CALL(q,sync,q,q->read_buf);
666
667 if (STATE_ERROR == q->read_buf->state) {
668 /* catch I/O errors */
669 q->ops->buf_release(q,q->read_buf);
670 kfree(q->read_buf);
671 q->read_buf = NULL;
672 retval = -EIO;
673 goto done;
674 }
675
676 /* Copy to userspace */
677 retval=CALL(q,copy_to_user,q,data,count,nonblocking);
678 if (retval<0)
679 goto done;
680
681 q->read_off += retval;
682 if (q->read_off == q->read_buf->size) {
683 /* all data copied, cleanup */
684 q->ops->buf_release(q,q->read_buf);
685 kfree(q->read_buf);
686 q->read_buf = NULL;
687 }
688
689 done:
690 mutex_unlock(&q->lock);
691 return retval;
692}
693
694int videobuf_read_start(struct videobuf_queue *q)
695{
696 enum v4l2_field field;
697 unsigned long flags=0;
698 unsigned int count = 0, size = 0;
699 int err, i;
700
701 q->ops->buf_setup(q,&count,&size);
702 if (count < 2)
703 count = 2;
704 if (count > VIDEO_MAX_FRAME)
705 count = VIDEO_MAX_FRAME;
706 size = PAGE_ALIGN(size);
707
708 err = videobuf_mmap_setup(q, count, size, V4L2_MEMORY_USERPTR);
709 if (err < 0)
710 return err;
711
712 count = err;
713
714 for (i = 0; i < count; i++) {
715 field = videobuf_next_field(q);
716 err = q->ops->buf_prepare(q,q->bufs[i],field);
717 if (err)
718 return err;
719 list_add_tail(&q->bufs[i]->stream, &q->stream);
720 }
721 if (q->irqlock)
722 spin_lock_irqsave(q->irqlock,flags);
723 for (i = 0; i < count; i++)
724 q->ops->buf_queue(q,q->bufs[i]);
725 if (q->irqlock)
726 spin_unlock_irqrestore(q->irqlock,flags);
727 q->reading = 1;
728 return 0;
729}
730
731void videobuf_read_stop(struct videobuf_queue *q)
732{
733 int i;
734
735 videobuf_queue_cancel(q);
736 videobuf_mmap_free(q);
737 INIT_LIST_HEAD(&q->stream);
738 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
739 if (NULL == q->bufs[i])
740 continue;
741 kfree(q->bufs[i]);
742 q->bufs[i] = NULL;
743 }
744 q->read_buf = NULL;
745 q->reading = 0;
746}
747
748ssize_t videobuf_read_stream(struct videobuf_queue *q,
749 char __user *data, size_t count, loff_t *ppos,
750 int vbihack, int nonblocking)
751{
752 int rc, retval;
753 unsigned long flags=0;
754
755 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
756
757 dprintk(2,"%s\n",__FUNCTION__);
758 mutex_lock(&q->lock);
759 retval = -EBUSY;
760 if (q->streaming)
761 goto done;
762 if (!q->reading) {
763 retval = videobuf_read_start(q);
764 if (retval < 0)
765 goto done;
766 }
767
768 retval = 0;
769 while (count > 0) {
770 /* get / wait for data */
771 if (NULL == q->read_buf) {
772 q->read_buf = list_entry(q->stream.next,
773 struct videobuf_buffer,
774 stream);
775 list_del(&q->read_buf->stream);
776 q->read_off = 0;
777 }
778 rc = videobuf_waiton(q->read_buf, nonblocking, 1);
779 if (rc < 0) {
780 if (0 == retval)
781 retval = rc;
782 break;
783 }
784
785 if (q->read_buf->state == STATE_DONE) {
786 rc = CALL (q,copy_stream, q, data + retval, count,
787 retval, vbihack, nonblocking);
788 if (rc < 0) {
789 retval = rc;
790 break;
791 }
792 retval += rc;
793 count -= rc;
794 q->read_off += rc;
795 } else {
796 /* some error */
797 q->read_off = q->read_buf->size;
798 if (0 == retval)
799 retval = -EIO;
800 }
801
802 /* requeue buffer when done with copying */
803 if (q->read_off == q->read_buf->size) {
804 list_add_tail(&q->read_buf->stream,
805 &q->stream);
806 if (q->irqlock)
807 spin_lock_irqsave(q->irqlock,flags);
808 q->ops->buf_queue(q,q->read_buf);
809 if (q->irqlock)
810 spin_unlock_irqrestore(q->irqlock,flags);
811 q->read_buf = NULL;
812 }
813 if (retval < 0)
814 break;
815 }
816
817 done:
818 mutex_unlock(&q->lock);
819 return retval;
820}
821
822unsigned int videobuf_poll_stream(struct file *file,
823 struct videobuf_queue *q,
824 poll_table *wait)
825{
826 struct videobuf_buffer *buf = NULL;
827 unsigned int rc = 0;
828
829 mutex_lock(&q->lock);
830 if (q->streaming) {
831 if (!list_empty(&q->stream))
832 buf = list_entry(q->stream.next,
833 struct videobuf_buffer, stream);
834 } else {
835 if (!q->reading)
836 videobuf_read_start(q);
837 if (!q->reading) {
838 rc = POLLERR;
839 } else if (NULL == q->read_buf) {
840 q->read_buf = list_entry(q->stream.next,
841 struct videobuf_buffer,
842 stream);
843 list_del(&q->read_buf->stream);
844 q->read_off = 0;
845 }
846 buf = q->read_buf;
847 }
848 if (!buf)
849 rc = POLLERR;
850
851 if (0 == rc) {
852 poll_wait(file, &buf->done, wait);
853 if (buf->state == STATE_DONE ||
854 buf->state == STATE_ERROR)
855 rc = POLLIN|POLLRDNORM;
856 }
857 mutex_unlock(&q->lock);
858 return rc;
859}
860
861int videobuf_mmap_setup(struct videobuf_queue *q,
862 unsigned int bcount, unsigned int bsize,
863 enum v4l2_memory memory)
864{
865 unsigned int i;
866 int err;
867
868 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
869
870 err = videobuf_mmap_free(q);
871 if (0 != err)
872 return err;
873
874 /* Allocate and initialize buffers */
875 for (i = 0; i < bcount; i++) {
876 q->bufs[i] = videobuf_alloc(q);
877
878 if (q->bufs[i] == NULL)
879 break;
880
881 q->bufs[i]->i = i;
882 q->bufs[i]->input = UNSET;
883 q->bufs[i]->memory = memory;
884 q->bufs[i]->bsize = bsize;
885 switch (memory) {
886 case V4L2_MEMORY_MMAP:
887 q->bufs[i]->boff = bsize * i;
888 break;
889 case V4L2_MEMORY_USERPTR:
890 case V4L2_MEMORY_OVERLAY:
891 /* nothing */
892 break;
893 }
894 }
895
896 if (!i)
897 return -ENOMEM;
898
899 dprintk(1,"mmap setup: %d buffers, %d bytes each\n",
900 i, bsize);
901
902 return i;
903}
904
905int videobuf_mmap_free(struct videobuf_queue *q)
906{
907 int i;
908 int rc;
909
910 if (!q)
911 return 0;
912
913 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
914
915 rc = CALL(q,mmap_free,q);
916 if (rc<0)
917 return rc;
918
919 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
920 if (NULL == q->bufs[i])
921 continue;
922 q->ops->buf_release(q,q->bufs[i]);
923 kfree(q->bufs[i]);
924 q->bufs[i] = NULL;
925 }
926
927 return rc;
928}
929
930int videobuf_mmap_mapper(struct videobuf_queue *q,
931 struct vm_area_struct *vma)
932{
933 int retval;
934
935 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
936
937 mutex_lock(&q->lock);
938 retval=CALL(q,mmap_mapper,q,vma);
939 mutex_unlock(&q->lock);
940
941 return retval;
942}
943
944#ifdef CONFIG_VIDEO_V4L1_COMPAT
945int videobuf_cgmbuf(struct videobuf_queue *q,
946 struct video_mbuf *mbuf, int count)
947{
948 struct v4l2_requestbuffers req;
949 int rc,i;
950
951 MAGIC_CHECK(q->int_ops->magic,MAGIC_QTYPE_OPS);
952
953 memset(&req,0,sizeof(req));
954 req.type = q->type;
955 req.count = count;
956 req.memory = V4L2_MEMORY_MMAP;
957 rc = videobuf_reqbufs(q,&req);
958 if (rc < 0)
959 return rc;
960
961 mbuf->frames = req.count;
962 mbuf->size = 0;
963 for (i = 0; i < mbuf->frames; i++) {
964 mbuf->offsets[i] = q->bufs[i]->boff;
965 mbuf->size += q->bufs[i]->bsize;
966 }
967
968 return 0;
969}
970#endif
971
972/* --------------------------------------------------------------------- */
973
974EXPORT_SYMBOL_GPL(videobuf_waiton);
975EXPORT_SYMBOL_GPL(videobuf_iolock);
976
977EXPORT_SYMBOL_GPL(videobuf_alloc);
978
979EXPORT_SYMBOL_GPL(videobuf_queue_core_init);
980EXPORT_SYMBOL_GPL(videobuf_queue_cancel);
981EXPORT_SYMBOL_GPL(videobuf_queue_is_busy);
982
983EXPORT_SYMBOL_GPL(videobuf_next_field);
984EXPORT_SYMBOL_GPL(videobuf_reqbufs);
985EXPORT_SYMBOL_GPL(videobuf_querybuf);
986EXPORT_SYMBOL_GPL(videobuf_qbuf);
987EXPORT_SYMBOL_GPL(videobuf_dqbuf);
988EXPORT_SYMBOL_GPL(videobuf_cgmbuf);
989EXPORT_SYMBOL_GPL(videobuf_streamon);
990EXPORT_SYMBOL_GPL(videobuf_streamoff);
991
992EXPORT_SYMBOL_GPL(videobuf_read_start);
993EXPORT_SYMBOL_GPL(videobuf_read_stop);
994EXPORT_SYMBOL_GPL(videobuf_read_stream);
995EXPORT_SYMBOL_GPL(videobuf_read_one);
996EXPORT_SYMBOL_GPL(videobuf_poll_stream);
997
998EXPORT_SYMBOL_GPL(videobuf_mmap_setup);
999EXPORT_SYMBOL_GPL(videobuf_mmap_free);
1000EXPORT_SYMBOL_GPL(videobuf_mmap_mapper);
1001
1002/*
1003 * Local variables:
1004 * c-basic-offset: 8
1005 * End:
1006 */
diff --git a/drivers/media/video/videobuf-dma-sg.c b/drivers/media/video/videobuf-dma-sg.c
new file mode 100644
index 000000000000..8bb7fdd306d6
--- /dev/null
+++ b/drivers/media/video/videobuf-dma-sg.c
@@ -0,0 +1,726 @@
1/*
2 * helper functions for PCI DMA video4linux capture buffers
3 *
4 * The functions expect the hardware being able to scatter gatter
5 * (i.e. the buffers are not linear in physical memory, but fragmented
6 * into PAGE_SIZE chunks). They also assume the driver does not need
7 * to touch the video data.
8 *
9 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
10 *
11 * Highly based on video-buf written originally by:
12 * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org>
13 * (c) 2006 Mauro Carvalho Chehab, <mchehab@infradead.org>
14 * (c) 2006 Ted Walther and John Sokol
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2
19 */
20
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26
27#include <linux/pci.h>
28#include <linux/vmalloc.h>
29#include <linux/pagemap.h>
30#include <asm/page.h>
31#include <asm/pgtable.h>
32
33#include <media/videobuf-dma-sg.h>
34
35#define MAGIC_DMABUF 0x19721112
36#define MAGIC_SG_MEM 0x17890714
37
38#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
39 { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
40
41static int debug = 0;
42module_param(debug, int, 0644);
43
44MODULE_DESCRIPTION("helper module to manage video4linux pci dma sg buffers");
45MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
46MODULE_LICENSE("GPL");
47
48#define dprintk(level, fmt, arg...) if (debug >= level) \
49 printk(KERN_DEBUG "vbuf-sg: " fmt , ## arg)
50
51/* --------------------------------------------------------------------- */
52
53struct scatterlist*
54videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages)
55{
56 struct scatterlist *sglist;
57 struct page *pg;
58 int i;
59
60 sglist = kcalloc(nr_pages, sizeof(struct scatterlist), GFP_KERNEL);
61 if (NULL == sglist)
62 return NULL;
63 for (i = 0; i < nr_pages; i++, virt += PAGE_SIZE) {
64 pg = vmalloc_to_page(virt);
65 if (NULL == pg)
66 goto err;
67 BUG_ON(PageHighMem(pg));
68 sglist[i].page = pg;
69 sglist[i].length = PAGE_SIZE;
70 }
71 return sglist;
72
73 err:
74 kfree(sglist);
75 return NULL;
76}
77
78struct scatterlist*
79videobuf_pages_to_sg(struct page **pages, int nr_pages, int offset)
80{
81 struct scatterlist *sglist;
82 int i = 0;
83
84 if (NULL == pages[0])
85 return NULL;
86 sglist = kcalloc(nr_pages, sizeof(*sglist), GFP_KERNEL);
87 if (NULL == sglist)
88 return NULL;
89
90 if (NULL == pages[0])
91 goto nopage;
92 if (PageHighMem(pages[0]))
93 /* DMA to highmem pages might not work */
94 goto highmem;
95 sglist[0].page = pages[0];
96 sglist[0].offset = offset;
97 sglist[0].length = PAGE_SIZE - offset;
98 for (i = 1; i < nr_pages; i++) {
99 if (NULL == pages[i])
100 goto nopage;
101 if (PageHighMem(pages[i]))
102 goto highmem;
103 sglist[i].page = pages[i];
104 sglist[i].length = PAGE_SIZE;
105 }
106 return sglist;
107
108 nopage:
109 dprintk(2,"sgl: oops - no page\n");
110 kfree(sglist);
111 return NULL;
112
113 highmem:
114 dprintk(2,"sgl: oops - highmem page\n");
115 kfree(sglist);
116 return NULL;
117}
118
119/* --------------------------------------------------------------------- */
120
121struct videobuf_dmabuf *videobuf_to_dma (struct videobuf_buffer *buf)
122{
123 struct videbuf_pci_sg_memory *mem=buf->priv;
124 BUG_ON (!mem);
125
126 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
127
128 return &mem->dma;
129}
130
131void videobuf_dma_init(struct videobuf_dmabuf *dma)
132{
133 memset(dma,0,sizeof(*dma));
134 dma->magic = MAGIC_DMABUF;
135}
136
137static int videobuf_dma_init_user_locked(struct videobuf_dmabuf *dma,
138 int direction, unsigned long data, unsigned long size)
139{
140 unsigned long first,last;
141 int err, rw = 0;
142
143 dma->direction = direction;
144 switch (dma->direction) {
145 case PCI_DMA_FROMDEVICE: rw = READ; break;
146 case PCI_DMA_TODEVICE: rw = WRITE; break;
147 default: BUG();
148 }
149
150 first = (data & PAGE_MASK) >> PAGE_SHIFT;
151 last = ((data+size-1) & PAGE_MASK) >> PAGE_SHIFT;
152 dma->offset = data & ~PAGE_MASK;
153 dma->nr_pages = last-first+1;
154 dma->pages = kmalloc(dma->nr_pages * sizeof(struct page*),
155 GFP_KERNEL);
156 if (NULL == dma->pages)
157 return -ENOMEM;
158 dprintk(1,"init user [0x%lx+0x%lx => %d pages]\n",
159 data,size,dma->nr_pages);
160
161 dma->varea = (void *) data;
162
163
164 err = get_user_pages(current,current->mm,
165 data & PAGE_MASK, dma->nr_pages,
166 rw == READ, 1, /* force */
167 dma->pages, NULL);
168
169 if (err != dma->nr_pages) {
170 dma->nr_pages = (err >= 0) ? err : 0;
171 dprintk(1,"get_user_pages: err=%d [%d]\n",err,dma->nr_pages);
172 return err < 0 ? err : -EINVAL;
173 }
174 return 0;
175}
176
177int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
178 unsigned long data, unsigned long size)
179{
180 int ret;
181 down_read(&current->mm->mmap_sem);
182 ret = videobuf_dma_init_user_locked(dma, direction, data, size);
183 up_read(&current->mm->mmap_sem);
184
185 return ret;
186}
187
188int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
189 int nr_pages)
190{
191 dprintk(1,"init kernel [%d pages]\n",nr_pages);
192 dma->direction = direction;
193 dma->vmalloc = vmalloc_32(nr_pages << PAGE_SHIFT);
194 if (NULL == dma->vmalloc) {
195 dprintk(1,"vmalloc_32(%d pages) failed\n",nr_pages);
196 return -ENOMEM;
197 }
198 dprintk(1,"vmalloc is at addr 0x%08lx, size=%d\n",
199 (unsigned long)dma->vmalloc,
200 nr_pages << PAGE_SHIFT);
201 memset(dma->vmalloc,0,nr_pages << PAGE_SHIFT);
202 dma->nr_pages = nr_pages;
203 return 0;
204}
205
206int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
207 dma_addr_t addr, int nr_pages)
208{
209 dprintk(1,"init overlay [%d pages @ bus 0x%lx]\n",
210 nr_pages,(unsigned long)addr);
211 dma->direction = direction;
212 if (0 == addr)
213 return -EINVAL;
214
215 dma->bus_addr = addr;
216 dma->nr_pages = nr_pages;
217 return 0;
218}
219
220int videobuf_dma_map(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
221{
222 void *dev=q->dev;
223
224 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
225 BUG_ON(0 == dma->nr_pages);
226
227 if (dma->pages) {
228 dma->sglist = videobuf_pages_to_sg(dma->pages, dma->nr_pages,
229 dma->offset);
230 }
231 if (dma->vmalloc) {
232 dma->sglist = videobuf_vmalloc_to_sg
233 (dma->vmalloc,dma->nr_pages);
234 }
235 if (dma->bus_addr) {
236 dma->sglist = kmalloc(sizeof(struct scatterlist), GFP_KERNEL);
237 if (NULL != dma->sglist) {
238 dma->sglen = 1;
239 sg_dma_address(&dma->sglist[0]) = dma->bus_addr & PAGE_MASK;
240 dma->sglist[0].offset = dma->bus_addr & ~PAGE_MASK;
241 sg_dma_len(&dma->sglist[0]) = dma->nr_pages * PAGE_SIZE;
242 }
243 }
244 if (NULL == dma->sglist) {
245 dprintk(1,"scatterlist is NULL\n");
246 return -ENOMEM;
247 }
248 if (!dma->bus_addr) {
249 dma->sglen = pci_map_sg(dev,dma->sglist,
250 dma->nr_pages, dma->direction);
251 if (0 == dma->sglen) {
252 printk(KERN_WARNING
253 "%s: videobuf_map_sg failed\n",__FUNCTION__);
254 kfree(dma->sglist);
255 dma->sglist = NULL;
256 dma->sglen = 0;
257 return -EIO;
258 }
259 }
260 return 0;
261}
262
263int videobuf_dma_sync(struct videobuf_queue *q,struct videobuf_dmabuf *dma)
264{
265 void *dev=q->dev;
266
267 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
268 BUG_ON(!dma->sglen);
269
270 pci_dma_sync_sg_for_cpu (dev,dma->sglist,dma->nr_pages,dma->direction);
271 return 0;
272}
273
274int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma)
275{
276 void *dev=q->dev;
277
278 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
279 if (!dma->sglen)
280 return 0;
281
282 pci_unmap_sg (dev,dma->sglist,dma->nr_pages,dma->direction);
283
284 kfree(dma->sglist);
285 dma->sglist = NULL;
286 dma->sglen = 0;
287 return 0;
288}
289
290int videobuf_dma_free(struct videobuf_dmabuf *dma)
291{
292 MAGIC_CHECK(dma->magic,MAGIC_DMABUF);
293 BUG_ON(dma->sglen);
294
295 if (dma->pages) {
296 int i;
297 for (i=0; i < dma->nr_pages; i++)
298 page_cache_release(dma->pages[i]);
299 kfree(dma->pages);
300 dma->pages = NULL;
301 }
302
303 vfree(dma->vmalloc);
304 dma->vmalloc = NULL;
305 dma->varea = NULL;
306
307 if (dma->bus_addr) {
308 dma->bus_addr = 0;
309 }
310 dma->direction = PCI_DMA_NONE;
311 return 0;
312}
313
314/* --------------------------------------------------------------------- */
315
316int videobuf_pci_dma_map(struct pci_dev *pci,struct videobuf_dmabuf *dma)
317{
318 struct videobuf_queue q;
319
320 q.dev=pci;
321
322 return (videobuf_dma_map(&q,dma));
323}
324
325int videobuf_pci_dma_unmap(struct pci_dev *pci,struct videobuf_dmabuf *dma)
326{
327 struct videobuf_queue q;
328
329 q.dev=pci;
330
331 return (videobuf_dma_unmap(&q,dma));
332}
333
334/* --------------------------------------------------------------------- */
335
336static void
337videobuf_vm_open(struct vm_area_struct *vma)
338{
339 struct videobuf_mapping *map = vma->vm_private_data;
340
341 dprintk(2,"vm_open %p [count=%d,vma=%08lx-%08lx]\n",map,
342 map->count,vma->vm_start,vma->vm_end);
343 map->count++;
344}
345
346static void
347videobuf_vm_close(struct vm_area_struct *vma)
348{
349 struct videobuf_mapping *map = vma->vm_private_data;
350 struct videobuf_queue *q = map->q;
351 struct videbuf_pci_sg_memory *mem;
352 int i;
353
354 dprintk(2,"vm_close %p [count=%d,vma=%08lx-%08lx]\n",map,
355 map->count,vma->vm_start,vma->vm_end);
356
357 map->count--;
358 if (0 == map->count) {
359 dprintk(1,"munmap %p q=%p\n",map,q);
360 mutex_lock(&q->lock);
361 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
362 if (NULL == q->bufs[i])
363 continue;
364 mem=q->bufs[i]->priv;
365
366 if (!mem)
367 continue;
368
369 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
370
371 if (q->bufs[i]->map != map)
372 continue;
373 q->bufs[i]->map = NULL;
374 q->bufs[i]->baddr = 0;
375 q->ops->buf_release(q,q->bufs[i]);
376 }
377 mutex_unlock(&q->lock);
378 kfree(map);
379 }
380 return;
381}
382
383/*
384 * Get a anonymous page for the mapping. Make sure we can DMA to that
385 * memory location with 32bit PCI devices (i.e. don't use highmem for
386 * now ...). Bounce buffers don't work very well for the data rates
387 * video capture has.
388 */
389static struct page*
390videobuf_vm_nopage(struct vm_area_struct *vma, unsigned long vaddr,
391 int *type)
392{
393 struct page *page;
394
395 dprintk(3,"nopage: fault @ %08lx [vma %08lx-%08lx]\n",
396 vaddr,vma->vm_start,vma->vm_end);
397 if (vaddr > vma->vm_end)
398 return NOPAGE_SIGBUS;
399 page = alloc_page(GFP_USER | __GFP_DMA32);
400 if (!page)
401 return NOPAGE_OOM;
402 clear_user_page(page_address(page), vaddr, page);
403 if (type)
404 *type = VM_FAULT_MINOR;
405 return page;
406}
407
408static struct vm_operations_struct videobuf_vm_ops =
409{
410 .open = videobuf_vm_open,
411 .close = videobuf_vm_close,
412 .nopage = videobuf_vm_nopage,
413};
414
415/* ---------------------------------------------------------------------
416 * PCI handlers for the generic methods
417 */
418
419/* Allocated area consists on 3 parts:
420 struct video_buffer
421 struct <driver>_buffer (cx88_buffer, saa7134_buf, ...)
422 struct videobuf_pci_sg_memory
423 */
424
425static void *__videobuf_alloc(size_t size)
426{
427 struct videbuf_pci_sg_memory *mem;
428 struct videobuf_buffer *vb;
429
430 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
431
432 mem = vb->priv = ((char *)vb)+size;
433 mem->magic=MAGIC_SG_MEM;
434
435 videobuf_dma_init(&mem->dma);
436
437 dprintk(1,"%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
438 __FUNCTION__,vb,(long)sizeof(*vb),(long)size-sizeof(*vb),
439 mem,(long)sizeof(*mem));
440
441 return vb;
442}
443
444static int __videobuf_iolock (struct videobuf_queue* q,
445 struct videobuf_buffer *vb,
446 struct v4l2_framebuffer *fbuf)
447{
448 int err,pages;
449 dma_addr_t bus;
450 struct videbuf_pci_sg_memory *mem=vb->priv;
451 BUG_ON(!mem);
452
453 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
454
455 switch (vb->memory) {
456 case V4L2_MEMORY_MMAP:
457 case V4L2_MEMORY_USERPTR:
458 if (0 == vb->baddr) {
459 /* no userspace addr -- kernel bounce buffer */
460 pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
461 err = videobuf_dma_init_kernel( &mem->dma,
462 PCI_DMA_FROMDEVICE,
463 pages );
464 if (0 != err)
465 return err;
466 } else if (vb->memory == V4L2_MEMORY_USERPTR) {
467 /* dma directly to userspace */
468 err = videobuf_dma_init_user( &mem->dma,
469 PCI_DMA_FROMDEVICE,
470 vb->baddr,vb->bsize );
471 if (0 != err)
472 return err;
473 } else {
474 /* NOTE: HACK: videobuf_iolock on V4L2_MEMORY_MMAP
475 buffers can only be called from videobuf_qbuf
476 we take current->mm->mmap_sem there, to prevent
477 locking inversion, so don't take it here */
478
479 err = videobuf_dma_init_user_locked(&mem->dma,
480 PCI_DMA_FROMDEVICE,
481 vb->baddr, vb->bsize);
482 if (0 != err)
483 return err;
484 }
485 break;
486 case V4L2_MEMORY_OVERLAY:
487 if (NULL == fbuf)
488 return -EINVAL;
489 /* FIXME: need sanity checks for vb->boff */
490 /*
491 * Using a double cast to avoid compiler warnings when
492 * building for PAE. Compiler doesn't like direct casting
493 * of a 32 bit ptr to 64 bit integer.
494 */
495 bus = (dma_addr_t)(unsigned long)fbuf->base + vb->boff;
496 pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
497 err = videobuf_dma_init_overlay(&mem->dma,PCI_DMA_FROMDEVICE,
498 bus, pages);
499 if (0 != err)
500 return err;
501 break;
502 default:
503 BUG();
504 }
505 err = videobuf_dma_map(q,&mem->dma);
506 if (0 != err)
507 return err;
508
509 return 0;
510}
511
512static int __videobuf_sync(struct videobuf_queue *q,
513 struct videobuf_buffer *buf)
514{
515 struct videbuf_pci_sg_memory *mem=buf->priv;
516 BUG_ON (!mem);
517 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
518
519 return videobuf_dma_sync(q,&mem->dma);
520}
521
522static int __videobuf_mmap_free(struct videobuf_queue *q)
523{
524 int i;
525
526 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
527 if (q->bufs[i]) {
528 if (q->bufs[i]->map)
529 return -EBUSY;
530 }
531 }
532
533 return 0;
534}
535
536static int __videobuf_mmap_mapper(struct videobuf_queue *q,
537 struct vm_area_struct *vma)
538{
539 struct videbuf_pci_sg_memory *mem;
540 struct videobuf_mapping *map;
541 unsigned int first,last,size,i;
542 int retval;
543
544 retval = -EINVAL;
545 if (!(vma->vm_flags & VM_WRITE)) {
546 dprintk(1,"mmap app bug: PROT_WRITE please\n");
547 goto done;
548 }
549 if (!(vma->vm_flags & VM_SHARED)) {
550 dprintk(1,"mmap app bug: MAP_SHARED please\n");
551 goto done;
552 }
553
554 /* look for first buffer to map */
555 for (first = 0; first < VIDEO_MAX_FRAME; first++) {
556 if (NULL == q->bufs[first])
557 continue;
558 mem=q->bufs[first]->priv;
559 BUG_ON (!mem);
560 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
561
562 if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
563 continue;
564 if (q->bufs[first]->boff == (vma->vm_pgoff << PAGE_SHIFT))
565 break;
566 }
567 if (VIDEO_MAX_FRAME == first) {
568 dprintk(1,"mmap app bug: offset invalid [offset=0x%lx]\n",
569 (vma->vm_pgoff << PAGE_SHIFT));
570 goto done;
571 }
572
573 /* look for last buffer to map */
574 for (size = 0, last = first; last < VIDEO_MAX_FRAME; last++) {
575 if (NULL == q->bufs[last])
576 continue;
577 if (V4L2_MEMORY_MMAP != q->bufs[last]->memory)
578 continue;
579 if (q->bufs[last]->map) {
580 retval = -EBUSY;
581 goto done;
582 }
583 size += q->bufs[last]->bsize;
584 if (size == (vma->vm_end - vma->vm_start))
585 break;
586 }
587 if (VIDEO_MAX_FRAME == last) {
588 dprintk(1,"mmap app bug: size invalid [size=0x%lx]\n",
589 (vma->vm_end - vma->vm_start));
590 goto done;
591 }
592
593 /* create mapping + update buffer list */
594 retval = -ENOMEM;
595 map = kmalloc(sizeof(struct videobuf_mapping),GFP_KERNEL);
596 if (NULL == map)
597 goto done;
598 for (size = 0, i = first; i <= last; size += q->bufs[i++]->bsize) {
599 q->bufs[i]->map = map;
600 q->bufs[i]->baddr = vma->vm_start + size;
601 }
602 map->count = 1;
603 map->start = vma->vm_start;
604 map->end = vma->vm_end;
605 map->q = q;
606 vma->vm_ops = &videobuf_vm_ops;
607 vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
608 vma->vm_flags &= ~VM_IO; /* using shared anonymous pages */
609 vma->vm_private_data = map;
610 dprintk(1,"mmap %p: q=%p %08lx-%08lx pgoff %08lx bufs %d-%d\n",
611 map,q,vma->vm_start,vma->vm_end,vma->vm_pgoff,first,last);
612 retval = 0;
613
614 done:
615 return retval;
616}
617
618static int __videobuf_copy_to_user ( struct videobuf_queue *q,
619 char __user *data, size_t count,
620 int nonblocking )
621{
622 struct videbuf_pci_sg_memory *mem=q->read_buf->priv;
623 BUG_ON (!mem);
624 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
625
626 /* copy to userspace */
627 if (count > q->read_buf->size - q->read_off)
628 count = q->read_buf->size - q->read_off;
629
630 if (copy_to_user(data, mem->dma.vmalloc+q->read_off, count))
631 return -EFAULT;
632
633 return count;
634}
635
636static int __videobuf_copy_stream ( struct videobuf_queue *q,
637 char __user *data, size_t count, size_t pos,
638 int vbihack, int nonblocking )
639{
640 unsigned int *fc;
641 struct videbuf_pci_sg_memory *mem=q->read_buf->priv;
642 BUG_ON (!mem);
643 MAGIC_CHECK(mem->magic,MAGIC_SG_MEM);
644
645 if (vbihack) {
646 /* dirty, undocumented hack -- pass the frame counter
647 * within the last four bytes of each vbi data block.
648 * We need that one to maintain backward compatibility
649 * to all vbi decoding software out there ... */
650 fc = (unsigned int*)mem->dma.vmalloc;
651 fc += (q->read_buf->size>>2) -1;
652 *fc = q->read_buf->field_count >> 1;
653 dprintk(1,"vbihack: %d\n",*fc);
654 }
655
656 /* copy stuff using the common method */
657 count = __videobuf_copy_to_user (q,data,count,nonblocking);
658
659 if ( (count==-EFAULT) && (0 == pos) )
660 return -EFAULT;
661
662 return count;
663}
664
665static struct videobuf_qtype_ops pci_ops = {
666 .magic = MAGIC_QTYPE_OPS,
667
668 .alloc = __videobuf_alloc,
669 .iolock = __videobuf_iolock,
670 .sync = __videobuf_sync,
671 .mmap_free = __videobuf_mmap_free,
672 .mmap_mapper = __videobuf_mmap_mapper,
673 .copy_to_user = __videobuf_copy_to_user,
674 .copy_stream = __videobuf_copy_stream,
675};
676
677void *videobuf_pci_alloc (size_t size)
678{
679 struct videobuf_queue q;
680
681 /* Required to make generic handler to call __videobuf_alloc */
682 q.int_ops=&pci_ops;
683
684 q.msize=size;
685
686 return videobuf_alloc (&q);
687}
688
689void videobuf_queue_pci_init(struct videobuf_queue* q,
690 struct videobuf_queue_ops *ops,
691 void *dev,
692 spinlock_t *irqlock,
693 enum v4l2_buf_type type,
694 enum v4l2_field field,
695 unsigned int msize,
696 void *priv)
697{
698 videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
699 priv, &pci_ops);
700}
701
702/* --------------------------------------------------------------------- */
703
704EXPORT_SYMBOL_GPL(videobuf_vmalloc_to_sg);
705
706EXPORT_SYMBOL_GPL(videobuf_to_dma);
707EXPORT_SYMBOL_GPL(videobuf_dma_init);
708EXPORT_SYMBOL_GPL(videobuf_dma_init_user);
709EXPORT_SYMBOL_GPL(videobuf_dma_init_kernel);
710EXPORT_SYMBOL_GPL(videobuf_dma_init_overlay);
711EXPORT_SYMBOL_GPL(videobuf_dma_map);
712EXPORT_SYMBOL_GPL(videobuf_dma_sync);
713EXPORT_SYMBOL_GPL(videobuf_dma_unmap);
714EXPORT_SYMBOL_GPL(videobuf_dma_free);
715
716EXPORT_SYMBOL_GPL(videobuf_pci_dma_map);
717EXPORT_SYMBOL_GPL(videobuf_pci_dma_unmap);
718EXPORT_SYMBOL_GPL(videobuf_pci_alloc);
719
720EXPORT_SYMBOL_GPL(videobuf_queue_pci_init);
721
722/*
723 * Local variables:
724 * c-basic-offset: 8
725 * End:
726 */
diff --git a/drivers/media/video/videobuf-dvb.c b/drivers/media/video/videobuf-dvb.c
new file mode 100644
index 000000000000..880317e04a02
--- /dev/null
+++ b/drivers/media/video/videobuf-dvb.c
@@ -0,0 +1,256 @@
1/*
2 *
3 * some helper function for simple DVB cards which simply DMA the
4 * complete transport stream and let the computer sort everything else
5 * (i.e. we are using the software demux, ...). Also uses the
6 * video-buf to manage DMA buffers.
7 *
8 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/fs.h>
21#include <linux/kthread.h>
22#include <linux/file.h>
23#include <linux/freezer.h>
24
25#include <media/videobuf-dma-sg.h>
26#include <media/videobuf-dvb.h>
27
28/* ------------------------------------------------------------------ */
29
30MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
31MODULE_LICENSE("GPL");
32
33static unsigned int debug = 0;
34module_param(debug, int, 0644);
35MODULE_PARM_DESC(debug,"enable debug messages");
36
37#define dprintk(fmt, arg...) if (debug) \
38 printk(KERN_DEBUG "%s/dvb: " fmt, dvb->name , ## arg)
39
40/* ------------------------------------------------------------------ */
41
42static int videobuf_dvb_thread(void *data)
43{
44 struct videobuf_dvb *dvb = data;
45 struct videobuf_buffer *buf;
46 unsigned long flags;
47 int err;
48 struct videobuf_dmabuf *dma;
49
50 dprintk("dvb thread started\n");
51 set_freezable();
52 videobuf_read_start(&dvb->dvbq);
53
54 for (;;) {
55 /* fetch next buffer */
56 buf = list_entry(dvb->dvbq.stream.next,
57 struct videobuf_buffer, stream);
58 list_del(&buf->stream);
59 err = videobuf_waiton(buf,0,1);
60
61 /* no more feeds left or stop_feed() asked us to quit */
62 if (0 == dvb->nfeeds)
63 break;
64 if (kthread_should_stop())
65 break;
66 try_to_freeze();
67
68 /* feed buffer data to demux */
69 dma=videobuf_to_dma(buf);
70 if (buf->state == STATE_DONE)
71 dvb_dmx_swfilter(&dvb->demux, dma->vmalloc,
72 buf->size);
73
74 /* requeue buffer */
75 list_add_tail(&buf->stream,&dvb->dvbq.stream);
76 spin_lock_irqsave(dvb->dvbq.irqlock,flags);
77 dvb->dvbq.ops->buf_queue(&dvb->dvbq,buf);
78 spin_unlock_irqrestore(dvb->dvbq.irqlock,flags);
79 }
80
81 videobuf_read_stop(&dvb->dvbq);
82 dprintk("dvb thread stopped\n");
83
84 /* Hmm, linux becomes *very* unhappy without this ... */
85 while (!kthread_should_stop()) {
86 set_current_state(TASK_INTERRUPTIBLE);
87 schedule();
88 }
89 return 0;
90}
91
92static int videobuf_dvb_start_feed(struct dvb_demux_feed *feed)
93{
94 struct dvb_demux *demux = feed->demux;
95 struct videobuf_dvb *dvb = demux->priv;
96 int rc;
97
98 if (!demux->dmx.frontend)
99 return -EINVAL;
100
101 mutex_lock(&dvb->lock);
102 dvb->nfeeds++;
103 rc = dvb->nfeeds;
104
105 if (NULL != dvb->thread)
106 goto out;
107 dvb->thread = kthread_run(videobuf_dvb_thread,
108 dvb, "%s dvb", dvb->name);
109 if (IS_ERR(dvb->thread)) {
110 rc = PTR_ERR(dvb->thread);
111 dvb->thread = NULL;
112 }
113
114out:
115 mutex_unlock(&dvb->lock);
116 return rc;
117}
118
119static int videobuf_dvb_stop_feed(struct dvb_demux_feed *feed)
120{
121 struct dvb_demux *demux = feed->demux;
122 struct videobuf_dvb *dvb = demux->priv;
123 int err = 0;
124
125 mutex_lock(&dvb->lock);
126 dvb->nfeeds--;
127 if (0 == dvb->nfeeds && NULL != dvb->thread) {
128 // FIXME: cx8802_cancel_buffers(dev);
129 err = kthread_stop(dvb->thread);
130 dvb->thread = NULL;
131 }
132 mutex_unlock(&dvb->lock);
133 return err;
134}
135
136/* ------------------------------------------------------------------ */
137
138int videobuf_dvb_register(struct videobuf_dvb *dvb,
139 struct module *module,
140 void *adapter_priv,
141 struct device *device)
142{
143 int result;
144
145 mutex_init(&dvb->lock);
146
147 /* register adapter */
148 result = dvb_register_adapter(&dvb->adapter, dvb->name, module, device);
149 if (result < 0) {
150 printk(KERN_WARNING "%s: dvb_register_adapter failed (errno = %d)\n",
151 dvb->name, result);
152 goto fail_adapter;
153 }
154 dvb->adapter.priv = adapter_priv;
155
156 /* register frontend */
157 result = dvb_register_frontend(&dvb->adapter, dvb->frontend);
158 if (result < 0) {
159 printk(KERN_WARNING "%s: dvb_register_frontend failed (errno = %d)\n",
160 dvb->name, result);
161 goto fail_frontend;
162 }
163
164 /* register demux stuff */
165 dvb->demux.dmx.capabilities =
166 DMX_TS_FILTERING | DMX_SECTION_FILTERING |
167 DMX_MEMORY_BASED_FILTERING;
168 dvb->demux.priv = dvb;
169 dvb->demux.filternum = 256;
170 dvb->demux.feednum = 256;
171 dvb->demux.start_feed = videobuf_dvb_start_feed;
172 dvb->demux.stop_feed = videobuf_dvb_stop_feed;
173 result = dvb_dmx_init(&dvb->demux);
174 if (result < 0) {
175 printk(KERN_WARNING "%s: dvb_dmx_init failed (errno = %d)\n",
176 dvb->name, result);
177 goto fail_dmx;
178 }
179
180 dvb->dmxdev.filternum = 256;
181 dvb->dmxdev.demux = &dvb->demux.dmx;
182 dvb->dmxdev.capabilities = 0;
183 result = dvb_dmxdev_init(&dvb->dmxdev, &dvb->adapter);
184 if (result < 0) {
185 printk(KERN_WARNING "%s: dvb_dmxdev_init failed (errno = %d)\n",
186 dvb->name, result);
187 goto fail_dmxdev;
188 }
189
190 dvb->fe_hw.source = DMX_FRONTEND_0;
191 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_hw);
192 if (result < 0) {
193 printk(KERN_WARNING "%s: add_frontend failed (DMX_FRONTEND_0, errno = %d)\n",
194 dvb->name, result);
195 goto fail_fe_hw;
196 }
197
198 dvb->fe_mem.source = DMX_MEMORY_FE;
199 result = dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->fe_mem);
200 if (result < 0) {
201 printk(KERN_WARNING "%s: add_frontend failed (DMX_MEMORY_FE, errno = %d)\n",
202 dvb->name, result);
203 goto fail_fe_mem;
204 }
205
206 result = dvb->demux.dmx.connect_frontend(&dvb->demux.dmx, &dvb->fe_hw);
207 if (result < 0) {
208 printk(KERN_WARNING "%s: connect_frontend failed (errno = %d)\n",
209 dvb->name, result);
210 goto fail_fe_conn;
211 }
212
213 /* register network adapter */
214 dvb_net_init(&dvb->adapter, &dvb->net, &dvb->demux.dmx);
215 return 0;
216
217fail_fe_conn:
218 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
219fail_fe_mem:
220 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
221fail_fe_hw:
222 dvb_dmxdev_release(&dvb->dmxdev);
223fail_dmxdev:
224 dvb_dmx_release(&dvb->demux);
225fail_dmx:
226 dvb_unregister_frontend(dvb->frontend);
227fail_frontend:
228 dvb_frontend_detach(dvb->frontend);
229 dvb_unregister_adapter(&dvb->adapter);
230fail_adapter:
231 return result;
232}
233
234void videobuf_dvb_unregister(struct videobuf_dvb *dvb)
235{
236 dvb_net_release(&dvb->net);
237 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_mem);
238 dvb->demux.dmx.remove_frontend(&dvb->demux.dmx, &dvb->fe_hw);
239 dvb_dmxdev_release(&dvb->dmxdev);
240 dvb_dmx_release(&dvb->demux);
241 dvb_unregister_frontend(dvb->frontend);
242 dvb_frontend_detach(dvb->frontend);
243 dvb_unregister_adapter(&dvb->adapter);
244}
245
246EXPORT_SYMBOL(videobuf_dvb_register);
247EXPORT_SYMBOL(videobuf_dvb_unregister);
248
249/* ------------------------------------------------------------------ */
250/*
251 * Local variables:
252 * c-basic-offset: 8
253 * compile-command: "make DVB=1"
254 * End:
255 */
256
diff --git a/drivers/media/video/videobuf-vmalloc.c b/drivers/media/video/videobuf-vmalloc.c
new file mode 100644
index 000000000000..2e3689a12a28
--- /dev/null
+++ b/drivers/media/video/videobuf-vmalloc.c
@@ -0,0 +1,370 @@
1/*
2 * helper functions for vmalloc video4linux capture buffers
3 *
4 * The functions expect the hardware being able to scatter gatter
5 * (i.e. the buffers are not linear in physical memory, but fragmented
6 * into PAGE_SIZE chunks). They also assume the driver does not need
7 * to touch the video data.
8 *
9 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/slab.h>
20#include <linux/interrupt.h>
21
22#include <linux/pci.h>
23#include <linux/vmalloc.h>
24#include <linux/pagemap.h>
25#include <asm/page.h>
26#include <asm/pgtable.h>
27
28#include <media/videobuf-vmalloc.h>
29
30#define MAGIC_DMABUF 0x17760309
31#define MAGIC_VMAL_MEM 0x18221223
32
33#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \
34 { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); }
35
36static int debug = 0;
37module_param(debug, int, 0644);
38
39MODULE_DESCRIPTION("helper module to manage video4linux vmalloc buffers");
40MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
41MODULE_LICENSE("GPL");
42
43#define dprintk(level, fmt, arg...) if (debug >= level) \
44 printk(KERN_DEBUG "vbuf-sg: " fmt , ## arg)
45
46
47/***************************************************************************/
48
49static void
50videobuf_vm_open(struct vm_area_struct *vma)
51{
52 struct videobuf_mapping *map = vma->vm_private_data;
53
54 dprintk(2,"vm_open %p [count=%d,vma=%08lx-%08lx]\n",map,
55 map->count,vma->vm_start,vma->vm_end);
56
57 map->count++;
58}
59
60static void
61videobuf_vm_close(struct vm_area_struct *vma)
62{
63 struct videobuf_mapping *map = vma->vm_private_data;
64 struct videobuf_queue *q = map->q;
65 int i;
66
67 dprintk(2,"vm_close %p [count=%d,vma=%08lx-%08lx]\n",map,
68 map->count,vma->vm_start,vma->vm_end);
69
70 map->count--;
71 if (0 == map->count) {
72 dprintk(1,"munmap %p q=%p\n",map,q);
73 mutex_lock(&q->lock);
74 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
75 if (NULL == q->bufs[i])
76 continue;
77
78 if (q->bufs[i]->map != map)
79 continue;
80
81 q->ops->buf_release(q,q->bufs[i]);
82
83 q->bufs[i]->map = NULL;
84 q->bufs[i]->baddr = 0;
85 }
86 mutex_unlock(&q->lock);
87 kfree(map);
88 }
89 return;
90}
91
92static struct vm_operations_struct videobuf_vm_ops =
93{
94 .open = videobuf_vm_open,
95 .close = videobuf_vm_close,
96};
97
98/* ---------------------------------------------------------------------
99 * vmalloc handlers for the generic methods
100 */
101
102/* Allocated area consists on 3 parts:
103 struct video_buffer
104 struct <driver>_buffer (cx88_buffer, saa7134_buf, ...)
105 struct videobuf_pci_sg_memory
106 */
107
108static void *__videobuf_alloc(size_t size)
109{
110 struct videbuf_vmalloc_memory *mem;
111 struct videobuf_buffer *vb;
112
113 vb = kzalloc(size+sizeof(*mem),GFP_KERNEL);
114
115 mem = vb->priv = ((char *)vb)+size;
116 mem->magic=MAGIC_VMAL_MEM;
117
118 dprintk(1,"%s: allocated at %p(%ld+%ld) & %p(%ld)\n",
119 __FUNCTION__,vb,(long)sizeof(*vb),(long)size-sizeof(*vb),
120 mem,(long)sizeof(*mem));
121
122 return vb;
123}
124
125static int __videobuf_iolock (struct videobuf_queue* q,
126 struct videobuf_buffer *vb,
127 struct v4l2_framebuffer *fbuf)
128{
129 int pages;
130
131 struct videbuf_vmalloc_memory *mem=vb->priv;
132
133
134 BUG_ON(!mem);
135
136 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
137
138 pages = PAGE_ALIGN(vb->size) >> PAGE_SHIFT;
139
140 /* Currently, doesn't support V4L2_MEMORY_OVERLAY */
141 if ((vb->memory != V4L2_MEMORY_MMAP) &&
142 (vb->memory != V4L2_MEMORY_USERPTR) ) {
143 printk(KERN_ERR "Method currently unsupported.\n");
144 return -EINVAL;
145 }
146
147 /* FIXME: should be tested with kernel mmap mem */
148 mem->vmalloc=vmalloc_user (PAGE_ALIGN(vb->size));
149 if (NULL == mem->vmalloc) {
150 printk(KERN_ERR "vmalloc (%d pages) failed\n",pages);
151 return -ENOMEM;
152 }
153
154 dprintk(1,"vmalloc is at addr 0x%08lx, size=%d\n",
155 (unsigned long)mem->vmalloc,
156 pages << PAGE_SHIFT);
157
158 /* It seems that some kernel versions need to do remap *after*
159 the mmap() call
160 */
161 if (mem->vma) {
162 int retval=remap_vmalloc_range(mem->vma, mem->vmalloc,0);
163 kfree(mem->vma);
164 mem->vma=NULL;
165 if (retval<0) {
166 dprintk(1,"mmap app bug: remap_vmalloc_range area %p error %d\n",
167 mem->vmalloc,retval);
168 return retval;
169 }
170 }
171
172 return 0;
173}
174
175static int __videobuf_sync(struct videobuf_queue *q,
176 struct videobuf_buffer *buf)
177{
178 return 0;
179}
180
181static int __videobuf_mmap_free(struct videobuf_queue *q)
182{
183 unsigned int i;
184
185 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
186 if (q->bufs[i]) {
187 if (q->bufs[i]->map)
188 return -EBUSY;
189 }
190 }
191
192 return 0;
193}
194
195static int __videobuf_mmap_mapper(struct videobuf_queue *q,
196 struct vm_area_struct *vma)
197{
198 struct videbuf_vmalloc_memory *mem;
199 struct videobuf_mapping *map;
200 unsigned int first;
201 int retval;
202 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
203
204 if (! (vma->vm_flags & VM_WRITE) || ! (vma->vm_flags & VM_SHARED))
205 return -EINVAL;
206
207 /* look for first buffer to map */
208 for (first = 0; first < VIDEO_MAX_FRAME; first++) {
209 if (NULL == q->bufs[first])
210 continue;
211
212 if (V4L2_MEMORY_MMAP != q->bufs[first]->memory)
213 continue;
214 if (q->bufs[first]->boff == offset)
215 break;
216 }
217 if (VIDEO_MAX_FRAME == first) {
218 dprintk(1,"mmap app bug: offset invalid [offset=0x%lx]\n",
219 (vma->vm_pgoff << PAGE_SHIFT));
220 return -EINVAL;
221 }
222
223 /* create mapping + update buffer list */
224 map = q->bufs[first]->map = kmalloc(sizeof(struct videobuf_mapping),GFP_KERNEL);
225 if (NULL == map)
226 return -ENOMEM;
227
228 map->start = vma->vm_start;
229 map->end = vma->vm_end;
230 map->q = q;
231
232 q->bufs[first]->baddr = vma->vm_start;
233
234 vma->vm_ops = &videobuf_vm_ops;
235 vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
236 vma->vm_private_data = map;
237
238 mem=q->bufs[first]->priv;
239 BUG_ON (!mem);
240 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
241
242 /* Try to remap memory */
243 retval=remap_vmalloc_range(vma, mem->vmalloc,0);
244 if (retval<0) {
245 dprintk(1,"mmap: postponing remap_vmalloc_range\n");
246
247 mem->vma=kmalloc(sizeof(*vma),GFP_KERNEL);
248 if (!mem->vma) {
249 kfree(map);
250 q->bufs[first]->map=NULL;
251 return -ENOMEM;
252 }
253 memcpy(mem->vma,vma,sizeof(*vma));
254 }
255
256 dprintk(1,"mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n",
257 map,q,vma->vm_start,vma->vm_end,
258 (long int) q->bufs[first]->bsize,
259 vma->vm_pgoff,first);
260
261 videobuf_vm_open(vma);
262
263 return (0);
264}
265
266static int __videobuf_copy_to_user ( struct videobuf_queue *q,
267 char __user *data, size_t count,
268 int nonblocking )
269{
270 struct videbuf_vmalloc_memory *mem=q->read_buf->priv;
271 BUG_ON (!mem);
272 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
273
274 BUG_ON (!mem->vmalloc);
275
276 /* copy to userspace */
277 if (count > q->read_buf->size - q->read_off)
278 count = q->read_buf->size - q->read_off;
279
280 if (copy_to_user(data, mem->vmalloc+q->read_off, count))
281 return -EFAULT;
282
283 return count;
284}
285
286static int __videobuf_copy_stream ( struct videobuf_queue *q,
287 char __user *data, size_t count, size_t pos,
288 int vbihack, int nonblocking )
289{
290 unsigned int *fc;
291 struct videbuf_vmalloc_memory *mem=q->read_buf->priv;
292 BUG_ON (!mem);
293 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
294
295 if (vbihack) {
296 /* dirty, undocumented hack -- pass the frame counter
297 * within the last four bytes of each vbi data block.
298 * We need that one to maintain backward compatibility
299 * to all vbi decoding software out there ... */
300 fc = (unsigned int*)mem->vmalloc;
301 fc += (q->read_buf->size>>2) -1;
302 *fc = q->read_buf->field_count >> 1;
303 dprintk(1,"vbihack: %d\n",*fc);
304 }
305
306 /* copy stuff using the common method */
307 count = __videobuf_copy_to_user (q,data,count,nonblocking);
308
309 if ( (count==-EFAULT) && (0 == pos) )
310 return -EFAULT;
311
312 return count;
313}
314
315static struct videobuf_qtype_ops qops = {
316 .magic = MAGIC_QTYPE_OPS,
317
318 .alloc = __videobuf_alloc,
319 .iolock = __videobuf_iolock,
320 .sync = __videobuf_sync,
321 .mmap_free = __videobuf_mmap_free,
322 .mmap_mapper = __videobuf_mmap_mapper,
323 .copy_to_user = __videobuf_copy_to_user,
324 .copy_stream = __videobuf_copy_stream,
325};
326
327void videobuf_queue_vmalloc_init(struct videobuf_queue* q,
328 struct videobuf_queue_ops *ops,
329 void *dev,
330 spinlock_t *irqlock,
331 enum v4l2_buf_type type,
332 enum v4l2_field field,
333 unsigned int msize,
334 void *priv)
335{
336 videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,
337 priv, &qops);
338}
339
340EXPORT_SYMBOL_GPL(videobuf_queue_vmalloc_init);
341
342void *videobuf_to_vmalloc (struct videobuf_buffer *buf)
343{
344 struct videbuf_vmalloc_memory *mem=buf->priv;
345 BUG_ON (!mem);
346 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
347
348 return mem->vmalloc;
349}
350EXPORT_SYMBOL_GPL(videobuf_to_vmalloc);
351
352void videobuf_vmalloc_free (struct videobuf_buffer *buf)
353{
354 struct videbuf_vmalloc_memory *mem=buf->priv;
355 BUG_ON (!mem);
356
357 MAGIC_CHECK(mem->magic,MAGIC_VMAL_MEM);
358
359 vfree(mem->vmalloc);
360 mem->vmalloc=NULL;
361
362 return;
363}
364EXPORT_SYMBOL_GPL(videobuf_vmalloc_free);
365
366/*
367 * Local variables:
368 * c-basic-offset: 8
369 * End:
370 */
diff --git a/drivers/media/video/videodev.c b/drivers/media/video/videodev.c
index b876aca69c73..8d8e517b344f 100644
--- a/drivers/media/video/videodev.c
+++ b/drivers/media/video/videodev.c
@@ -54,15 +54,14 @@
54 * sysfs stuff 54 * sysfs stuff
55 */ 55 */
56 56
57static ssize_t show_name(struct class_device *cd, char *buf) 57static ssize_t show_name(struct device *cd,
58 struct device_attribute *attr, char *buf)
58{ 59{
59 struct video_device *vfd = container_of(cd, struct video_device, 60 struct video_device *vfd = container_of(cd, struct video_device,
60 class_dev); 61 class_dev);
61 return sprintf(buf,"%.*s\n",(int)sizeof(vfd->name),vfd->name); 62 return sprintf(buf, "%.*s\n", (int)sizeof(vfd->name), vfd->name);
62} 63}
63 64
64static CLASS_DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
65
66struct video_device *video_device_alloc(void) 65struct video_device *video_device_alloc(void)
67{ 66{
68 struct video_device *vfd; 67 struct video_device *vfd;
@@ -76,7 +75,7 @@ void video_device_release(struct video_device *vfd)
76 kfree(vfd); 75 kfree(vfd);
77} 76}
78 77
79static void video_release(struct class_device *cd) 78static void video_release(struct device *cd)
80{ 79{
81 struct video_device *vfd = container_of(cd, struct video_device, 80 struct video_device *vfd = container_of(cd, struct video_device,
82 class_dev); 81 class_dev);
@@ -89,9 +88,15 @@ static void video_release(struct class_device *cd)
89 vfd->release(vfd); 88 vfd->release(vfd);
90} 89}
91 90
91static struct device_attribute video_device_attrs[] = {
92 __ATTR(name, S_IRUGO, show_name, NULL),
93 __ATTR_NULL
94};
95
92static struct class video_class = { 96static struct class video_class = {
93 .name = VIDEO_NAME, 97 .name = VIDEO_NAME,
94 .release = video_release, 98 .dev_attrs = video_device_attrs,
99 .dev_release = video_release,
95}; 100};
96 101
97/* 102/*
@@ -448,7 +453,7 @@ static int __video_do_ioctl(struct inode *inode, struct file *file,
448 if (cmd == VIDIOCGMBUF) { 453 if (cmd == VIDIOCGMBUF) {
449 struct video_mbuf *p=arg; 454 struct video_mbuf *p=arg;
450 455
451 memset(p,0,sizeof(p)); 456 memset(p, 0, sizeof(*p));
452 457
453 if (!vfd->vidiocgmbuf) 458 if (!vfd->vidiocgmbuf)
454 return ret; 459 return ret;
@@ -1753,22 +1758,16 @@ int video_register_device(struct video_device *vfd, int type, int nr)
1753 /* sysfs class */ 1758 /* sysfs class */
1754 memset(&vfd->class_dev, 0x00, sizeof(vfd->class_dev)); 1759 memset(&vfd->class_dev, 0x00, sizeof(vfd->class_dev));
1755 if (vfd->dev) 1760 if (vfd->dev)
1756 vfd->class_dev.dev = vfd->dev; 1761 vfd->class_dev.parent = vfd->dev;
1757 vfd->class_dev.class = &video_class; 1762 vfd->class_dev.class = &video_class;
1758 vfd->class_dev.devt = MKDEV(VIDEO_MAJOR, vfd->minor); 1763 vfd->class_dev.devt = MKDEV(VIDEO_MAJOR, vfd->minor);
1759 sprintf(vfd->class_dev.class_id, "%s%d", name_base, i - base); 1764 sprintf(vfd->class_dev.bus_id, "%s%d", name_base, i - base);
1760 ret = class_device_register(&vfd->class_dev); 1765 ret = device_register(&vfd->class_dev);
1761 if (ret < 0) { 1766 if (ret < 0) {
1762 printk(KERN_ERR "%s: class_device_register failed\n", 1767 printk(KERN_ERR "%s: device_register failed\n",
1763 __FUNCTION__); 1768 __FUNCTION__);
1764 goto fail_minor; 1769 goto fail_minor;
1765 } 1770 }
1766 ret = class_device_create_file(&vfd->class_dev, &class_device_attr_name);
1767 if (ret < 0) {
1768 printk(KERN_ERR "%s: class_device_create_file 'name' failed\n",
1769 __FUNCTION__);
1770 goto fail_classdev;
1771 }
1772 1771
1773#if 1 1772#if 1
1774 /* needed until all drivers are fixed */ 1773 /* needed until all drivers are fixed */
@@ -1779,8 +1778,6 @@ int video_register_device(struct video_device *vfd, int type, int nr)
1779#endif 1778#endif
1780 return 0; 1779 return 0;
1781 1780
1782fail_classdev:
1783 class_device_unregister(&vfd->class_dev);
1784fail_minor: 1781fail_minor:
1785 mutex_lock(&videodev_lock); 1782 mutex_lock(&videodev_lock);
1786 video_device[vfd->minor] = NULL; 1783 video_device[vfd->minor] = NULL;
@@ -1804,7 +1801,7 @@ void video_unregister_device(struct video_device *vfd)
1804 panic("videodev: bad unregister"); 1801 panic("videodev: bad unregister");
1805 1802
1806 video_device[vfd->minor]=NULL; 1803 video_device[vfd->minor]=NULL;
1807 class_device_unregister(&vfd->class_dev); 1804 device_unregister(&vfd->class_dev);
1808 mutex_unlock(&videodev_lock); 1805 mutex_unlock(&videodev_lock);
1809} 1806}
1810 1807
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c
index a0c1647a2ba4..9a03dc82c6ca 100644
--- a/drivers/media/video/vino.c
+++ b/drivers/media/video/vino.c
@@ -28,7 +28,6 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/mm.h> 30#include <linux/mm.h>
31#include <linux/moduleparam.h>
32#include <linux/time.h> 31#include <linux/time.h>
33#include <linux/version.h> 32#include <linux/version.h>
34 33
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c
index f6d3a9460ccc..b532aa280a1b 100644
--- a/drivers/media/video/vivi.c
+++ b/drivers/media/video/vivi.c
@@ -33,7 +33,7 @@
33#include <linux/videodev.h> 33#include <linux/videodev.h>
34#endif 34#endif
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <media/video-buf.h> 36#include <media/videobuf-vmalloc.h>
37#include <media/v4l2-common.h> 37#include <media/v4l2-common.h>
38#include <linux/kthread.h> 38#include <linux/kthread.h>
39#include <linux/highmem.h> 39#include <linux/highmem.h>
@@ -145,7 +145,6 @@ struct vivi_buffer {
145 struct videobuf_buffer vb; 145 struct videobuf_buffer vb;
146 146
147 struct vivi_fmt *fmt; 147 struct vivi_fmt *fmt;
148
149}; 148};
150 149
151struct vivi_dmaqueue { 150struct vivi_dmaqueue {
@@ -171,7 +170,6 @@ struct vivi_dev {
171 int users; 170 int users;
172 171
173 /* various device info */ 172 /* various device info */
174 unsigned int resources;
175 struct video_device vfd; 173 struct video_device vfd;
176 174
177 struct vivi_dmaqueue vidq; 175 struct vivi_dmaqueue vidq;
@@ -230,9 +228,8 @@ static u8 bars[8][3] = {
230#define TSTAMP_MAX_Y TSTAMP_MIN_Y+15 228#define TSTAMP_MAX_Y TSTAMP_MIN_Y+15
231#define TSTAMP_MIN_X 64 229#define TSTAMP_MIN_X 64
232 230
233
234static void gen_line(char *basep,int inipos,int wmax, 231static void gen_line(char *basep,int inipos,int wmax,
235 int hmax, int line, char *timestr) 232 int hmax, int line, int count, char *timestr)
236{ 233{
237 int w,i,j,pos=inipos,y; 234 int w,i,j,pos=inipos,y;
238 char *p,*s; 235 char *p,*s;
@@ -243,9 +240,10 @@ static void gen_line(char *basep,int inipos,int wmax,
243 240
244 /* Generate a standard color bar pattern */ 241 /* Generate a standard color bar pattern */
245 for (w=0;w<wmax;w++) { 242 for (w=0;w<wmax;w++) {
246 r=bars[w*7/wmax][0]; 243 int colorpos=((w+count)*8/(wmax+1)) % 8;
247 g=bars[w*7/wmax][1]; 244 r=bars[colorpos][0];
248 b=bars[w*7/wmax][2]; 245 g=bars[colorpos][1];
246 b=bars[colorpos][2];
249 247
250 for (color=0;color<4;color++) { 248 for (color=0;color<4;color++) {
251 p=basep+pos; 249 p=basep+pos;
@@ -326,27 +324,27 @@ static void vivi_fillbuff(struct vivi_dev *dev,struct vivi_buffer *buf)
326 int hmax = buf->vb.height; 324 int hmax = buf->vb.height;
327 int wmax = buf->vb.width; 325 int wmax = buf->vb.width;
328 struct timeval ts; 326 struct timeval ts;
329 char *tmpbuf; 327 char *tmpbuf = kmalloc(wmax*2,GFP_KERNEL);
330 328 void *vbuf=videobuf_to_vmalloc (&buf->vb);
331 if (buf->vb.dma.varea) { 329 /* FIXME: move to dev struct */
332 tmpbuf=kmalloc (wmax*2, GFP_KERNEL); 330 static int mv_count=0;
333 } else {
334 tmpbuf=buf->vb.dma.vmalloc;
335 }
336 331
332 if (!tmpbuf)
333 return;
337 334
338 for (h=0;h<hmax;h++) { 335 for (h=0;h<hmax;h++) {
339 if (buf->vb.dma.varea) { 336 gen_line(tmpbuf,0,wmax,hmax,h,mv_count,
340 gen_line(tmpbuf,0,wmax,hmax,h,dev->timestr); 337 dev->timestr);
341 /* FIXME: replacing to __copy_to_user */ 338 /* FIXME: replacing to __copy_to_user */
342 if (copy_to_user(buf->vb.dma.varea+pos,tmpbuf,wmax*2)!=0) 339 if (copy_to_user(vbuf+pos,tmpbuf,wmax*2)!=0)
343 dprintk(2,"vivifill copy_to_user failed.\n"); 340 dprintk(2,"vivifill copy_to_user failed.\n");
344 } else {
345 gen_line(tmpbuf,pos,wmax,hmax,h,dev->timestr);
346 }
347 pos += wmax*2; 341 pos += wmax*2;
348 } 342 }
349 343
344 mv_count++;
345
346 kfree(tmpbuf);
347
350 /* Updates stream time */ 348 /* Updates stream time */
351 349
352 dev->us+=jiffies_to_usecs(jiffies-dev->jiffies); 350 dev->us+=jiffies_to_usecs(jiffies-dev->jiffies);
@@ -369,7 +367,7 @@ static void vivi_fillbuff(struct vivi_dev *dev,struct vivi_buffer *buf)
369 dev->h,dev->m,dev->s,(dev->us+500)/1000); 367 dev->h,dev->m,dev->s,(dev->us+500)/1000);
370 368
371 dprintk(2,"vivifill at %s: Buffer 0x%08lx size= %d\n",dev->timestr, 369 dprintk(2,"vivifill at %s: Buffer 0x%08lx size= %d\n",dev->timestr,
372 (unsigned long)buf->vb.dma.varea,pos); 370 (unsigned long)tmpbuf,pos);
373 371
374 /* Advice that buffer was filled */ 372 /* Advice that buffer was filled */
375 buf->vb.state = STATE_DONE; 373 buf->vb.state = STATE_DONE;
@@ -509,7 +507,6 @@ static void vivi_stop_thread(struct vivi_dmaqueue *dma_q)
509static int restart_video_queue(struct vivi_dmaqueue *dma_q) 507static int restart_video_queue(struct vivi_dmaqueue *dma_q)
510{ 508{
511 struct vivi_buffer *buf, *prev; 509 struct vivi_buffer *buf, *prev;
512 struct list_head *item;
513 510
514 dprintk(1,"%s dma_q=0x%08lx\n",__FUNCTION__,(unsigned long)dma_q); 511 dprintk(1,"%s dma_q=0x%08lx\n",__FUNCTION__,(unsigned long)dma_q);
515 512
@@ -523,9 +520,7 @@ static int restart_video_queue(struct vivi_dmaqueue *dma_q)
523// vivi_start_thread(dma_q); 520// vivi_start_thread(dma_q);
524 521
525 /* cancel all outstanding capture / vbi requests */ 522 /* cancel all outstanding capture / vbi requests */
526 list_for_each(item,&dma_q->active) { 523 list_for_each_entry_safe(buf, prev, &dma_q->active, vb.queue) {
527 buf = list_entry(item, struct vivi_buffer, vb.queue);
528
529 list_del(&buf->vb.queue); 524 list_del(&buf->vb.queue);
530 buf->vb.state = STATE_ERROR; 525 buf->vb.state = STATE_ERROR;
531 wake_up(&buf->vb.done); 526 wake_up(&buf->vb.done);
@@ -597,8 +592,12 @@ buffer_setup(struct videobuf_queue *vq, unsigned int *count, unsigned int *size)
597 592
598 if (0 == *count) 593 if (0 == *count)
599 *count = 32; 594 *count = 32;
595
600 while (*size * *count > vid_limit * 1024 * 1024) 596 while (*size * *count > vid_limit * 1024 * 1024)
601 (*count)--; 597 (*count)--;
598
599 dprintk(1,"%s, count=%d, size=%d\n",__FUNCTION__,*count, *size);
600
602 return 0; 601 return 0;
603} 602}
604 603
@@ -609,10 +608,8 @@ static void free_buffer(struct videobuf_queue *vq, struct vivi_buffer *buf)
609 if (in_interrupt()) 608 if (in_interrupt())
610 BUG(); 609 BUG();
611 610
612
613 videobuf_waiton(&buf->vb,0,0); 611 videobuf_waiton(&buf->vb,0,0);
614 videobuf_dma_unmap(vq, &buf->vb.dma); 612 videobuf_vmalloc_free(&buf->vb);
615 videobuf_dma_free(&buf->vb.dma);
616 buf->vb.state = STATE_NEEDS_INIT; 613 buf->vb.state = STATE_NEEDS_INIT;
617} 614}
618 615
@@ -626,7 +623,7 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,
626 struct vivi_buffer *buf = container_of(vb,struct vivi_buffer,vb); 623 struct vivi_buffer *buf = container_of(vb,struct vivi_buffer,vb);
627 int rc, init_buffer = 0; 624 int rc, init_buffer = 0;
628 625
629// dprintk(1,"%s, field=%d\n",__FUNCTION__,field); 626 dprintk(1,"%s, field=%d\n",__FUNCTION__,field);
630 627
631 BUG_ON(NULL == fh->fmt); 628 BUG_ON(NULL == fh->fmt);
632 if (fh->width < 48 || fh->width > norm_maxw() || 629 if (fh->width < 48 || fh->width > norm_maxw() ||
@@ -718,54 +715,14 @@ static void buffer_release(struct videobuf_queue *vq, struct videobuf_buffer *vb
718 free_buffer(vq,buf); 715 free_buffer(vq,buf);
719} 716}
720 717
721
722static struct videobuf_queue_ops vivi_video_qops = { 718static struct videobuf_queue_ops vivi_video_qops = {
723 .buf_setup = buffer_setup, 719 .buf_setup = buffer_setup,
724 .buf_prepare = buffer_prepare, 720 .buf_prepare = buffer_prepare,
725 .buf_queue = buffer_queue, 721 .buf_queue = buffer_queue,
726 .buf_release = buffer_release, 722 .buf_release = buffer_release,
727
728 /* Non-pci handling routines */
729// .vb_map_sg = vivi_map_sg,
730// .vb_dma_sync_sg = vivi_dma_sync_sg,
731// .vb_unmap_sg = vivi_unmap_sg,
732}; 723};
733 724
734/* ------------------------------------------------------------------ 725/* ------------------------------------------------------------------
735 IOCTL handling
736 ------------------------------------------------------------------*/
737
738
739static int res_get(struct vivi_dev *dev, struct vivi_fh *fh)
740{
741 /* is it free? */
742 mutex_lock(&dev->lock);
743 if (dev->resources) {
744 /* no, someone else uses it */
745 mutex_unlock(&dev->lock);
746 return 0;
747 }
748 /* it's free, grab it */
749 dev->resources =1;
750 dprintk(1,"res: get\n");
751 mutex_unlock(&dev->lock);
752 return 1;
753}
754
755static int res_locked(struct vivi_dev *dev)
756{
757 return (dev->resources);
758}
759
760static void res_free(struct vivi_dev *dev, struct vivi_fh *fh)
761{
762 mutex_lock(&dev->lock);
763 dev->resources = 0;
764 dprintk(1,"res: put\n");
765 mutex_lock(&dev->lock);
766}
767
768/* ------------------------------------------------------------------
769 IOCTL vidioc handling 726 IOCTL vidioc handling
770 ------------------------------------------------------------------*/ 727 ------------------------------------------------------------------*/
771static int vidioc_querycap (struct file *file, void *priv, 728static int vidioc_querycap (struct file *file, void *priv,
@@ -825,8 +782,7 @@ static int vidioc_try_fmt_cap (struct file *file, void *priv,
825 field = f->fmt.pix.field; 782 field = f->fmt.pix.field;
826 783
827 if (field == V4L2_FIELD_ANY) { 784 if (field == V4L2_FIELD_ANY) {
828// field=V4L2_FIELD_INTERLACED; 785 field=V4L2_FIELD_INTERLACED;
829 field=V4L2_FIELD_SEQ_TB;
830 } else if (V4L2_FIELD_INTERLACED != field) { 786 } else if (V4L2_FIELD_INTERLACED != field) {
831 dprintk(1,"Field type invalid.\n"); 787 dprintk(1,"Field type invalid.\n");
832 return -EINVAL; 788 return -EINVAL;
@@ -904,57 +860,33 @@ static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
904static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf) 860static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
905{ 861{
906 struct vivi_fh *fh=priv; 862 struct vivi_fh *fh=priv;
907 struct videobuf_queue *q=&fh->vb_vidq;
908 struct v4l2_requestbuffers req;
909 unsigned int i;
910 int ret;
911
912 req.type = q->type;
913 req.count = 8;
914 req.memory = V4L2_MEMORY_MMAP;
915 ret = videobuf_reqbufs(q,&req);
916 if (ret < 0)
917 return (ret);
918 863
919 mbuf->frames = req.count; 864 return videobuf_cgmbuf (&fh->vb_vidq, mbuf, 8);
920 mbuf->size = 0;
921 for (i = 0; i < mbuf->frames; i++) {
922 mbuf->offsets[i] = q->bufs[i]->boff;
923 mbuf->size += q->bufs[i]->bsize;
924 }
925 return (0);
926} 865}
927#endif 866#endif
928 867
929static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) 868static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
930{ 869{
931 struct vivi_fh *fh=priv; 870 struct vivi_fh *fh=priv;
932 struct vivi_dev *dev = fh->dev;
933 871
934 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 872 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
935 return -EINVAL; 873 return -EINVAL;
936 if (i != fh->type) 874 if (i != fh->type)
937 return -EINVAL; 875 return -EINVAL;
938 876
939 if (!res_get(dev,fh)) 877 return videobuf_streamon(&fh->vb_vidq);
940 return -EBUSY;
941 return (videobuf_streamon(&fh->vb_vidq));
942} 878}
943 879
944static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) 880static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
945{ 881{
946 struct vivi_fh *fh=priv; 882 struct vivi_fh *fh=priv;
947 struct vivi_dev *dev = fh->dev;
948 883
949 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 884 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
950 return -EINVAL; 885 return -EINVAL;
951 if (i != fh->type) 886 if (i != fh->type)
952 return -EINVAL; 887 return -EINVAL;
953 888
954 videobuf_streamoff(&fh->vb_vidq); 889 return videobuf_streamoff(&fh->vb_vidq);
955 res_free(dev,fh);
956
957 return (0);
958} 890}
959 891
960static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *i) 892static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *i)
@@ -1047,31 +979,25 @@ static int vidioc_s_ctrl (struct file *file, void *priv,
1047static int vivi_open(struct inode *inode, struct file *file) 979static int vivi_open(struct inode *inode, struct file *file)
1048{ 980{
1049 int minor = iminor(inode); 981 int minor = iminor(inode);
1050 struct vivi_dev *h,*dev = NULL; 982 struct vivi_dev *dev;
1051 struct vivi_fh *fh; 983 struct vivi_fh *fh;
1052 struct list_head *list;
1053 enum v4l2_buf_type type = 0;
1054 int i; 984 int i;
1055 985
1056 printk(KERN_DEBUG "vivi: open called (minor=%d)\n",minor); 986 printk(KERN_DEBUG "vivi: open called (minor=%d)\n",minor);
1057 987
1058 list_for_each(list,&vivi_devlist) { 988 list_for_each_entry(dev, &vivi_devlist, vivi_devlist)
1059 h = list_entry(list, struct vivi_dev, vivi_devlist); 989 if (dev->vfd.minor == minor)
1060 if (h->vfd.minor == minor) { 990 goto found;
1061 dev = h; 991 return -ENODEV;
1062 type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 992found:
1063 }
1064 }
1065 if (NULL == dev)
1066 return -ENODEV;
1067 993
1068 994
1069 995
1070 /* If more than one user, mutex should be added */ 996 /* If more than one user, mutex should be added */
1071 dev->users++; 997 dev->users++;
1072 998
1073 dprintk(1,"open minor=%d type=%s users=%d\n", 999 dprintk(1, "open minor=%d type=%s users=%d\n", minor,
1074 minor,v4l2_type_names[type],dev->users); 1000 v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users);
1075 1001
1076 /* allocate + initialize per filehandle data */ 1002 /* allocate + initialize per filehandle data */
1077 fh = kzalloc(sizeof(*fh),GFP_KERNEL); 1003 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
@@ -1106,7 +1032,7 @@ static int vivi_open(struct inode *inode, struct file *file)
1106 sprintf(dev->timestr,"%02d:%02d:%02d:%03d", 1032 sprintf(dev->timestr,"%02d:%02d:%02d:%03d",
1107 dev->h,dev->m,dev->s,(dev->us+500)/1000); 1033 dev->h,dev->m,dev->s,(dev->us+500)/1000);
1108 1034
1109 videobuf_queue_init(&fh->vb_vidq, &vivi_video_qops, 1035 videobuf_queue_vmalloc_init(&fh->vb_vidq, &vivi_video_qops,
1110 NULL, NULL, 1036 NULL, NULL,
1111 fh->type, 1037 fh->type,
1112 V4L2_FIELD_INTERLACED, 1038 V4L2_FIELD_INTERLACED,
@@ -1121,9 +1047,7 @@ vivi_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1121 struct vivi_fh *fh = file->private_data; 1047 struct vivi_fh *fh = file->private_data;
1122 1048
1123 if (fh->type==V4L2_BUF_TYPE_VIDEO_CAPTURE) { 1049 if (fh->type==V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1124 if (res_locked(fh->dev)) 1050 return videobuf_read_stream(&fh->vb_vidq, data, count, ppos, 0,
1125 return -EBUSY;
1126 return videobuf_read_one(&fh->vb_vidq, data, count, ppos,
1127 file->f_flags & O_NONBLOCK); 1051 file->f_flags & O_NONBLOCK);
1128 } 1052 }
1129 return 0; 1053 return 0;
@@ -1133,31 +1057,14 @@ static unsigned int
1133vivi_poll(struct file *file, struct poll_table_struct *wait) 1057vivi_poll(struct file *file, struct poll_table_struct *wait)
1134{ 1058{
1135 struct vivi_fh *fh = file->private_data; 1059 struct vivi_fh *fh = file->private_data;
1136 struct vivi_buffer *buf; 1060 struct videobuf_queue *q = &fh->vb_vidq;
1137 1061
1138 dprintk(1,"%s\n",__FUNCTION__); 1062 dprintk(1,"%s\n",__FUNCTION__);
1139 1063
1140 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type) 1064 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type)
1141 return POLLERR; 1065 return POLLERR;
1142 1066
1143 if (res_get(fh->dev,fh)) { 1067 return videobuf_poll_stream(file, q, wait);
1144 dprintk(1,"poll: mmap interface\n");
1145 /* streaming capture */
1146 if (list_empty(&fh->vb_vidq.stream))
1147 return POLLERR;
1148 buf = list_entry(fh->vb_vidq.stream.next,struct vivi_buffer,vb.stream);
1149 } else {
1150 dprintk(1,"poll: read() interface\n");
1151 /* read() capture */
1152 buf = (struct vivi_buffer*)fh->vb_vidq.read_buf;
1153 if (NULL == buf)
1154 return POLLERR;
1155 }
1156 poll_wait(file, &buf->vb.done, wait);
1157 if (buf->vb.state == STATE_DONE ||
1158 buf->vb.state == STATE_ERROR)
1159 return POLLIN|POLLRDNORM;
1160 return 0;
1161} 1068}
1162 1069
1163static int vivi_release(struct inode *inode, struct file *file) 1070static int vivi_release(struct inode *inode, struct file *file)
@@ -1205,7 +1112,7 @@ static const struct file_operations vivi_fops = {
1205 .read = vivi_read, 1112 .read = vivi_read,
1206 .poll = vivi_poll, 1113 .poll = vivi_poll,
1207 .ioctl = video_ioctl2, /* V4L2 ioctl handler */ 1114 .ioctl = video_ioctl2, /* V4L2 ioctl handler */
1208 .mmap = vivi_mmap, 1115 .mmap = vivi_mmap,
1209 .llseek = no_llseek, 1116 .llseek = no_llseek,
1210}; 1117};
1211 1118
diff --git a/drivers/media/video/vp27smpx.c b/drivers/media/video/vp27smpx.c
new file mode 100644
index 000000000000..63002e0ac764
--- /dev/null
+++ b/drivers/media/video/vp27smpx.c
@@ -0,0 +1,212 @@
1/*
2 * vp27smpx - driver version 0.0.1
3 *
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
5 *
6 * Based on a tvaudio patch from Takahiro Adachi <tadachi@tadachi-net.com>
7 * and Kazuhiko Kawakami <kazz-0@mail.goo.ne.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/ioctl.h>
27#include <asm/uaccess.h>
28#include <linux/i2c.h>
29#include <linux/i2c-id.h>
30#include <linux/videodev.h>
31#include <media/v4l2-common.h>
32#include <media/v4l2-chip-ident.h>
33
34MODULE_DESCRIPTION("vp27smpx driver");
35MODULE_AUTHOR("Hans Verkuil");
36MODULE_LICENSE("GPL");
37
38static unsigned short normal_i2c[] = { 0xb6 >> 1, I2C_CLIENT_END };
39
40
41I2C_CLIENT_INSMOD;
42
43/* ----------------------------------------------------------------------- */
44
45struct vp27smpx_state {
46 int radio;
47 u32 audmode;
48};
49
50static void vp27smpx_set_audmode(struct i2c_client *client, u32 audmode)
51{
52 struct vp27smpx_state *state = i2c_get_clientdata(client);
53 u8 data[3] = { 0x00, 0x00, 0x04 };
54
55 switch (audmode) {
56 case V4L2_TUNER_MODE_MONO:
57 case V4L2_TUNER_MODE_LANG1:
58 break;
59 case V4L2_TUNER_MODE_STEREO:
60 case V4L2_TUNER_MODE_LANG1_LANG2:
61 data[1] = 0x01;
62 break;
63 case V4L2_TUNER_MODE_LANG2:
64 data[1] = 0x02;
65 break;
66 }
67
68 if (i2c_master_send(client, data, sizeof(data)) != sizeof(data)) {
69 v4l_err(client, "%s: I/O error setting audmode\n", client->name);
70 }
71 else {
72 state->audmode = audmode;
73 }
74}
75
76static int vp27smpx_command(struct i2c_client *client, unsigned int cmd,
77 void *arg)
78{
79 struct vp27smpx_state *state = i2c_get_clientdata(client);
80 struct v4l2_tuner *vt = arg;
81
82 switch (cmd) {
83 case AUDC_SET_RADIO:
84 state->radio = 1;
85 break;
86
87 case VIDIOC_S_STD:
88 state->radio = 0;
89 break;
90
91 case VIDIOC_S_TUNER:
92 if (!state->radio)
93 vp27smpx_set_audmode(client, vt->audmode);
94 break;
95
96 case VIDIOC_G_TUNER:
97 if (state->radio)
98 break;
99 vt->audmode = state->audmode;
100 vt->capability = V4L2_TUNER_CAP_STEREO |
101 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
102 vt->rxsubchans = V4L2_TUNER_SUB_MONO;
103 break;
104
105 case VIDIOC_G_CHIP_IDENT:
106 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_VP27SMPX, 0);
107
108 case VIDIOC_LOG_STATUS:
109 v4l_info(client, "Audio Mode: %u%s\n", state->audmode,
110 state->radio ? " (Radio)" : "");
111 break;
112
113 default:
114 return -EINVAL;
115 }
116 return 0;
117}
118
119/* ----------------------------------------------------------------------- */
120
121/* i2c implementation */
122
123/*
124 * Generic i2c probe
125 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
126 */
127
128static struct i2c_driver i2c_driver;
129
130static int vp27smpx_attach(struct i2c_adapter *adapter, int address, int kind)
131{
132 struct i2c_client *client;
133 struct vp27smpx_state *state;
134
135 /* Check if the adapter supports the needed features */
136 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
137 return 0;
138
139 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
140 if (client == 0)
141 return -ENOMEM;
142
143 client->addr = address;
144 client->adapter = adapter;
145 client->driver = &i2c_driver;
146 snprintf(client->name, sizeof(client->name) - 1, "vp27smpx");
147
148 v4l_info(client, "chip found @ 0x%x (%s)\n", address << 1, adapter->name);
149
150 state = kzalloc(sizeof(struct vp27smpx_state), GFP_KERNEL);
151 if (state == NULL) {
152 kfree(client);
153 return -ENOMEM;
154 }
155 state->audmode = V4L2_TUNER_MODE_STEREO;
156 i2c_set_clientdata(client, state);
157
158 /* initialize vp27smpx */
159 vp27smpx_set_audmode(client, state->audmode);
160 i2c_attach_client(client);
161
162 return 0;
163}
164
165static int vp27smpx_probe(struct i2c_adapter *adapter)
166{
167 if (adapter->class & I2C_CLASS_TV_ANALOG)
168 return i2c_probe(adapter, &addr_data, vp27smpx_attach);
169 return 0;
170}
171
172static int vp27smpx_detach(struct i2c_client *client)
173{
174 struct vp27smpx_state *state = i2c_get_clientdata(client);
175 int err;
176
177 err = i2c_detach_client(client);
178 if (err) {
179 return err;
180 }
181 kfree(state);
182 kfree(client);
183
184 return 0;
185}
186
187/* ----------------------------------------------------------------------- */
188
189/* i2c implementation */
190static struct i2c_driver i2c_driver = {
191 .driver = {
192 .name = "vp27smpx",
193 },
194 .id = I2C_DRIVERID_VP27SMPX,
195 .attach_adapter = vp27smpx_probe,
196 .detach_client = vp27smpx_detach,
197 .command = vp27smpx_command,
198};
199
200
201static int __init vp27smpx_init_module(void)
202{
203 return i2c_add_driver(&i2c_driver);
204}
205
206static void __exit vp27smpx_cleanup_module(void)
207{
208 i2c_del_driver(&i2c_driver);
209}
210
211module_init(vp27smpx_init_module);
212module_exit(vp27smpx_cleanup_module);
diff --git a/drivers/media/video/w9968cf.c b/drivers/media/video/w9968cf.c
index 8f31613b9903..5a1b5f5a7d46 100644
--- a/drivers/media/video/w9968cf.c
+++ b/drivers/media/video/w9968cf.c
@@ -42,7 +42,6 @@
42#include <asm/page.h> 42#include <asm/page.h>
43#include <asm/uaccess.h> 43#include <asm/uaccess.h>
44#include <linux/page-flags.h> 44#include <linux/page-flags.h>
45#include <linux/moduleparam.h>
46 45
47#include "w9968cf.h" 46#include "w9968cf.h"
48#include "w9968cf_decoder.h" 47#include "w9968cf_decoder.h"
@@ -2680,7 +2679,7 @@ static int w9968cf_open(struct inode* inode, struct file* filp)
2680 2679
2681 /* This the only safe way to prevent race conditions with disconnect */ 2680 /* This the only safe way to prevent race conditions with disconnect */
2682 if (!down_read_trylock(&w9968cf_disconnect)) 2681 if (!down_read_trylock(&w9968cf_disconnect))
2683 return -ERESTARTSYS; 2682 return -EAGAIN;
2684 2683
2685 cam = (struct w9968cf_device*)video_get_drvdata(video_devdata(filp)); 2684 cam = (struct w9968cf_device*)video_get_drvdata(video_devdata(filp));
2686 2685
diff --git a/drivers/media/video/zc0301/zc0301_core.c b/drivers/media/video/zc0301/zc0301_core.c
index 703b741e46df..08a93c31c0a0 100644
--- a/drivers/media/video/zc0301/zc0301_core.c
+++ b/drivers/media/video/zc0301/zc0301_core.c
@@ -26,7 +26,6 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/param.h> 28#include <linux/param.h>
29#include <linux/moduleparam.h>
30#include <linux/errno.h> 29#include <linux/errno.h>
31#include <linux/slab.h> 30#include <linux/slab.h>
32#include <linux/device.h> 31#include <linux/device.h>
@@ -656,7 +655,7 @@ static int zc0301_open(struct inode* inode, struct file* filp)
656 int err = 0; 655 int err = 0;
657 656
658 if (!down_read_trylock(&zc0301_dev_lock)) 657 if (!down_read_trylock(&zc0301_dev_lock))
659 return -ERESTARTSYS; 658 return -EAGAIN;
660 659
661 cam = video_get_drvdata(video_devdata(filp)); 660 cam = video_get_drvdata(video_devdata(filp));
662 661
diff --git a/drivers/media/video/zoran_card.c b/drivers/media/video/zoran_card.c
index 73162a3a61dd..48da36a15fca 100644
--- a/drivers/media/video/zoran_card.c
+++ b/drivers/media/video/zoran_card.c
@@ -64,15 +64,15 @@
64extern const struct zoran_format zoran_formats[]; 64extern const struct zoran_format zoran_formats[];
65 65
66static int card[BUZ_MAX] = { -1, -1, -1, -1 }; 66static int card[BUZ_MAX] = { -1, -1, -1, -1 };
67module_param_array(card, int, NULL, 0); 67module_param_array(card, int, NULL, 0444);
68MODULE_PARM_DESC(card, "The type of card"); 68MODULE_PARM_DESC(card, "The type of card");
69 69
70static int encoder[BUZ_MAX] = { -1, -1, -1, -1 }; 70static int encoder[BUZ_MAX] = { -1, -1, -1, -1 };
71module_param_array(encoder, int, NULL, 0); 71module_param_array(encoder, int, NULL, 0444);
72MODULE_PARM_DESC(encoder, "i2c TV encoder"); 72MODULE_PARM_DESC(encoder, "i2c TV encoder");
73 73
74static int decoder[BUZ_MAX] = { -1, -1, -1, -1 }; 74static int decoder[BUZ_MAX] = { -1, -1, -1, -1 };
75module_param_array(decoder, int, NULL, 0); 75module_param_array(decoder, int, NULL, 0444);
76MODULE_PARM_DESC(decoder, "i2c TV decoder"); 76MODULE_PARM_DESC(decoder, "i2c TV decoder");
77 77
78/* 78/*
@@ -84,29 +84,31 @@ MODULE_PARM_DESC(decoder, "i2c TV decoder");
84 */ 84 */
85 85
86static unsigned long vidmem = 0; /* Video memory base address */ 86static unsigned long vidmem = 0; /* Video memory base address */
87module_param(vidmem, ulong, 0); 87module_param(vidmem, ulong, 0444);
88MODULE_PARM_DESC(vidmem, "Default video memory base address");
88 89
89/* 90/*
90 Default input and video norm at startup of the driver. 91 Default input and video norm at startup of the driver.
91*/ 92*/
92 93
93static int default_input = 0; /* 0=Composite, 1=S-Video */ 94static unsigned int default_input = 0; /* 0=Composite, 1=S-Video */
94module_param(default_input, int, 0); 95module_param(default_input, uint, 0444);
95MODULE_PARM_DESC(default_input, 96MODULE_PARM_DESC(default_input,
96 "Default input (0=Composite, 1=S-Video, 2=Internal)"); 97 "Default input (0=Composite, 1=S-Video, 2=Internal)");
97 98
98static int default_mux = 1; /* 6 Eyes input selection */ 99static int default_mux = 1; /* 6 Eyes input selection */
99module_param(default_mux, int, 0); 100module_param(default_mux, int, 0644);
100MODULE_PARM_DESC(default_mux, 101MODULE_PARM_DESC(default_mux,
101 "Default 6 Eyes mux setting (Input selection)"); 102 "Default 6 Eyes mux setting (Input selection)");
102 103
103static int default_norm = 0; /* 0=PAL, 1=NTSC 2=SECAM */ 104static int default_norm = 0; /* 0=PAL, 1=NTSC 2=SECAM */
104module_param(default_norm, int, 0); 105module_param(default_norm, int, 0444);
105MODULE_PARM_DESC(default_norm, "Default norm (0=PAL, 1=NTSC, 2=SECAM)"); 106MODULE_PARM_DESC(default_norm, "Default norm (0=PAL, 1=NTSC, 2=SECAM)");
106 107
107static int video_nr = -1; /* /dev/videoN, -1 for autodetect */ 108/* /dev/videoN, -1 for autodetect */
108module_param(video_nr, int, 0); 109static int video_nr[BUZ_MAX] = {-1, -1, -1, -1};
109MODULE_PARM_DESC(video_nr, "video device number"); 110module_param_array(video_nr, int, NULL, 0444);
111MODULE_PARM_DESC(video_nr, "video device number (-1=Auto)");
110 112
111/* 113/*
112 Number and size of grab buffers for Video 4 Linux 114 Number and size of grab buffers for Video 4 Linux
@@ -127,28 +129,27 @@ MODULE_PARM_DESC(video_nr, "video device number");
127 129
128int v4l_nbufs = 2; 130int v4l_nbufs = 2;
129int v4l_bufsize = 128; /* Everybody should be able to work with this setting */ 131int v4l_bufsize = 128; /* Everybody should be able to work with this setting */
130module_param(v4l_nbufs, int, 0); 132module_param(v4l_nbufs, int, 0644);
131MODULE_PARM_DESC(v4l_nbufs, "Maximum number of V4L buffers to use"); 133MODULE_PARM_DESC(v4l_nbufs, "Maximum number of V4L buffers to use");
132module_param(v4l_bufsize, int, 0); 134module_param(v4l_bufsize, int, 0644);
133MODULE_PARM_DESC(v4l_bufsize, "Maximum size per V4L buffer (in kB)"); 135MODULE_PARM_DESC(v4l_bufsize, "Maximum size per V4L buffer (in kB)");
134 136
135int jpg_nbufs = 32; 137int jpg_nbufs = 32;
136int jpg_bufsize = 512; /* max size for 100% quality full-PAL frame */ 138int jpg_bufsize = 512; /* max size for 100% quality full-PAL frame */
137module_param(jpg_nbufs, int, 0); 139module_param(jpg_nbufs, int, 0644);
138MODULE_PARM_DESC(jpg_nbufs, "Maximum number of JPG buffers to use"); 140MODULE_PARM_DESC(jpg_nbufs, "Maximum number of JPG buffers to use");
139module_param(jpg_bufsize, int, 0); 141module_param(jpg_bufsize, int, 0644);
140MODULE_PARM_DESC(jpg_bufsize, "Maximum size per JPG buffer (in kB)"); 142MODULE_PARM_DESC(jpg_bufsize, "Maximum size per JPG buffer (in kB)");
141 143
142int pass_through = 0; /* 1=Pass through TV signal when device is not used */ 144int pass_through = 0; /* 1=Pass through TV signal when device is not used */
143 /* 0=Show color bar when device is not used (LML33: only if lml33dpath=1) */ 145 /* 0=Show color bar when device is not used (LML33: only if lml33dpath=1) */
144module_param(pass_through, int, 0); 146module_param(pass_through, int, 0644);
145MODULE_PARM_DESC(pass_through, 147MODULE_PARM_DESC(pass_through,
146 "Pass TV signal through to TV-out when idling"); 148 "Pass TV signal through to TV-out when idling");
147 149
148static int debug = 1; 150int zr36067_debug = 1;
149int *zr_debug = &debug; 151module_param_named(debug, zr36067_debug, int, 0644);
150module_param(debug, int, 0); 152MODULE_PARM_DESC(debug, "Debug level (0-5)");
151MODULE_PARM_DESC(debug, "Debug level (0-4)");
152 153
153MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver"); 154MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver");
154MODULE_AUTHOR("Serguei Miridonov"); 155MODULE_AUTHOR("Serguei Miridonov");
@@ -161,12 +162,6 @@ static struct pci_device_id zr36067_pci_tbl[] = {
161}; 162};
162MODULE_DEVICE_TABLE(pci, zr36067_pci_tbl); 163MODULE_DEVICE_TABLE(pci, zr36067_pci_tbl);
163 164
164#define dprintk(num, format, args...) \
165 do { \
166 if (*zr_debug >= num) \
167 printk(format, ##args); \
168 } while (0)
169
170int zoran_num; /* number of Buzs in use */ 165int zoran_num; /* number of Buzs in use */
171struct zoran zoran[BUZ_MAX]; 166struct zoran zoran[BUZ_MAX];
172 167
@@ -1075,7 +1070,7 @@ test_interrupts (struct zoran *zr)
1075 if (timeout) { 1070 if (timeout) {
1076 dprintk(1, ": time spent: %d\n", 1 * HZ - timeout); 1071 dprintk(1, ": time spent: %d\n", 1 * HZ - timeout);
1077 } 1072 }
1078 if (*zr_debug > 1) 1073 if (zr36067_debug > 1)
1079 print_interrupts(zr); 1074 print_interrupts(zr);
1080 btwrite(icr, ZR36057_ICR); 1075 btwrite(icr, ZR36057_ICR);
1081} 1076}
@@ -1121,7 +1116,14 @@ zr36057_init (struct zoran *zr)
1121 zr->timing = zr->card.tvn[zr->norm]; 1116 zr->timing = zr->card.tvn[zr->norm];
1122 } 1117 }
1123 1118
1124 zr->input = default_input = (default_input ? 1 : 0); 1119 if (default_input > zr->card.inputs-1) {
1120 dprintk(1,
1121 KERN_WARNING
1122 "%s: default_input value %d out of range (0-%d)\n",
1123 ZR_DEVNAME(zr), default_input, zr->card.inputs-1);
1124 default_input = 0;
1125 }
1126 zr->input = default_input;
1125 1127
1126 /* Should the following be reset at every open ? */ 1128 /* Should the following be reset at every open ? */
1127 zr->hue = 32768; 1129 zr->hue = 32768;
@@ -1153,12 +1155,12 @@ zr36057_init (struct zoran *zr)
1153 */ 1155 */
1154 memcpy(zr->video_dev, &zoran_template, sizeof(zoran_template)); 1156 memcpy(zr->video_dev, &zoran_template, sizeof(zoran_template));
1155 strcpy(zr->video_dev->name, ZR_DEVNAME(zr)); 1157 strcpy(zr->video_dev->name, ZR_DEVNAME(zr));
1156 err = video_register_device(zr->video_dev, VFL_TYPE_GRABBER, video_nr); 1158 err = video_register_device(zr->video_dev, VFL_TYPE_GRABBER, video_nr[zr->id]);
1157 if (err < 0) 1159 if (err < 0)
1158 goto exit_unregister; 1160 goto exit_unregister;
1159 1161
1160 zoran_init_hardware(zr); 1162 zoran_init_hardware(zr);
1161 if (*zr_debug > 2) 1163 if (zr36067_debug > 2)
1162 detect_guest_activity(zr); 1164 detect_guest_activity(zr);
1163 test_interrupts(zr); 1165 test_interrupts(zr);
1164 if (!pass_through) { 1166 if (!pass_through) {
@@ -1620,7 +1622,7 @@ init_dc10_cards (void)
1620 } 1622 }
1621 1623
1622 /* random nonsense */ 1624 /* random nonsense */
1623 dprintk(5, KERN_DEBUG "Jotti is een held!\n"); 1625 dprintk(6, KERN_DEBUG "Jotti is een held!\n");
1624 1626
1625 /* some mainboards might not do PCI-PCI data transfer well */ 1627 /* some mainboards might not do PCI-PCI data transfer well */
1626 if (pci_pci_problems & (PCIPCI_FAIL|PCIAGP_FAIL|PCIPCI_ALIMAGIK)) { 1628 if (pci_pci_problems & (PCIPCI_FAIL|PCIAGP_FAIL|PCIPCI_ALIMAGIK)) {
diff --git a/drivers/media/video/zoran_card.h b/drivers/media/video/zoran_card.h
index ad997c30bee5..8444ca0a5f3f 100644
--- a/drivers/media/video/zoran_card.h
+++ b/drivers/media/video/zoran_card.h
@@ -30,6 +30,14 @@
30#ifndef __ZORAN_CARD_H__ 30#ifndef __ZORAN_CARD_H__
31#define __ZORAN_CARD_H__ 31#define __ZORAN_CARD_H__
32 32
33extern int zr36067_debug;
34
35#define dprintk(num, format, args...) \
36 do { \
37 if (zr36067_debug >= num) \
38 printk(format, ##args); \
39 } while (0)
40
33/* Anybody who uses more than four? */ 41/* Anybody who uses more than four? */
34#define BUZ_MAX 4 42#define BUZ_MAX 4
35extern int zoran_num; 43extern int zoran_num;
diff --git a/drivers/media/video/zoran_device.c b/drivers/media/video/zoran_device.c
index ba2f4ed29483..68c7c505587e 100644
--- a/drivers/media/video/zoran_device.c
+++ b/drivers/media/video/zoran_device.c
@@ -52,6 +52,7 @@
52#include "videocodec.h" 52#include "videocodec.h"
53#include "zoran.h" 53#include "zoran.h"
54#include "zoran_device.h" 54#include "zoran_device.h"
55#include "zoran_card.h"
55 56
56#define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \ 57#define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \
57 ZR36057_ISR_GIRQ1 | \ 58 ZR36057_ISR_GIRQ1 | \
@@ -59,14 +60,6 @@
59 60
60extern const struct zoran_format zoran_formats[]; 61extern const struct zoran_format zoran_formats[];
61 62
62extern int *zr_debug;
63
64#define dprintk(num, format, args...) \
65 do { \
66 if (*zr_debug >= num) \
67 printk(format, ##args); \
68 } while (0)
69
70static int lml33dpath = 0; /* 1 will use digital path in capture 63static int lml33dpath = 0; /* 1 will use digital path in capture
71 * mode instead of analog. It can be 64 * mode instead of analog. It can be
72 * used for picture adjustments using 65 * used for picture adjustments using
@@ -76,7 +69,7 @@ static int lml33dpath = 0; /* 1 will use digital path in capture
76 * load on Bt819 input, there will be 69 * load on Bt819 input, there will be
77 * some image imperfections */ 70 * some image imperfections */
78 71
79module_param(lml33dpath, bool, 0); 72module_param(lml33dpath, bool, 0644);
80MODULE_PARM_DESC(lml33dpath, 73MODULE_PARM_DESC(lml33dpath,
81 "Use digital path capture mode (on LML33 cards)"); 74 "Use digital path capture mode (on LML33 cards)");
82 75
@@ -174,7 +167,7 @@ post_office_read (struct zoran *zr,
174static void 167static void
175dump_guests (struct zoran *zr) 168dump_guests (struct zoran *zr)
176{ 169{
177 if (*zr_debug > 2) { 170 if (zr36067_debug > 2) {
178 int i, guest[8]; 171 int i, guest[8];
179 172
180 for (i = 1; i < 8; i++) { // Don't read jpeg codec here 173 for (i = 1; i < 8; i++) { // Don't read jpeg codec here
@@ -1271,7 +1264,7 @@ error_handler (struct zoran *zr,
1271 zr->num_errors++; 1264 zr->num_errors++;
1272 1265
1273 /* Report error */ 1266 /* Report error */
1274 if (*zr_debug > 1 && zr->num_errors <= 8) { 1267 if (zr36067_debug > 1 && zr->num_errors <= 8) {
1275 long frame; 1268 long frame;
1276 frame = 1269 frame =
1277 zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME]; 1270 zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
@@ -1531,7 +1524,7 @@ zoran_irq (int irq,
1531 1524
1532 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS || 1525 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
1533 zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) { 1526 zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
1534 if (*zr_debug > 1 && 1527 if (zr36067_debug > 1 &&
1535 (!zr->frame_num || zr->JPEG_error)) { 1528 (!zr->frame_num || zr->JPEG_error)) {
1536 printk(KERN_INFO 1529 printk(KERN_INFO
1537 "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n", 1530 "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n",
@@ -1568,7 +1561,7 @@ zoran_irq (int irq,
1568 zr->JPEG_missed; 1561 zr->JPEG_missed;
1569 } 1562 }
1570 1563
1571 if (*zr_debug > 2 && zr->frame_num < 6) { 1564 if (zr36067_debug > 2 && zr->frame_num < 6) {
1572 int i; 1565 int i;
1573 printk("%s: seq=%ld stat_com:", 1566 printk("%s: seq=%ld stat_com:",
1574 ZR_DEVNAME(zr), zr->jpg_seq_num); 1567 ZR_DEVNAME(zr), zr->jpg_seq_num);
diff --git a/drivers/media/video/zoran_driver.c b/drivers/media/video/zoran_driver.c
index 72a037b75d63..1c14fa2bd411 100644
--- a/drivers/media/video/zoran_driver.c
+++ b/drivers/media/video/zoran_driver.c
@@ -200,14 +200,6 @@ const struct zoran_format zoran_formats[] = {
200// RJ: Test only - want to test BUZ_USE_HIMEM even when CONFIG_BIGPHYS_AREA is defined 200// RJ: Test only - want to test BUZ_USE_HIMEM even when CONFIG_BIGPHYS_AREA is defined
201 201
202 202
203extern int *zr_debug;
204
205#define dprintk(num, format, args...) \
206 do { \
207 if (*zr_debug >= num) \
208 printk(format, ##args); \
209 } while (0)
210
211extern int v4l_nbufs; 203extern int v4l_nbufs;
212extern int v4l_bufsize; 204extern int v4l_bufsize;
213extern int jpg_nbufs; 205extern int jpg_nbufs;
@@ -215,8 +207,8 @@ extern int jpg_bufsize;
215extern int pass_through; 207extern int pass_through;
216 208
217static int lock_norm = 0; /* 1=Don't change TV standard (norm) */ 209static int lock_norm = 0; /* 1=Don't change TV standard (norm) */
218module_param(lock_norm, int, 0); 210module_param(lock_norm, int, 0644);
219MODULE_PARM_DESC(lock_norm, "Users can't change norm"); 211MODULE_PARM_DESC(lock_norm, "Prevent norm changes (1 = ignore, >1 = fail)");
220 212
221#ifdef CONFIG_VIDEO_V4L2 213#ifdef CONFIG_VIDEO_V4L2
222 /* small helper function for calculating buffersizes for v4l2 214 /* small helper function for calculating buffersizes for v4l2
@@ -347,10 +339,7 @@ v4l_fbuffer_alloc (struct file *file)
347 if (fh->v4l_buffers.buffer_size <= MAX_KMALLOC_MEM) { 339 if (fh->v4l_buffers.buffer_size <= MAX_KMALLOC_MEM) {
348 /* Use kmalloc */ 340 /* Use kmalloc */
349 341
350 mem = 342 mem = kmalloc(fh->v4l_buffers.buffer_size, GFP_KERNEL);
351 (unsigned char *) kmalloc(fh->v4l_buffers.
352 buffer_size,
353 GFP_KERNEL);
354 if (mem == 0) { 343 if (mem == 0) {
355 dprintk(1, 344 dprintk(1,
356 KERN_ERR 345 KERN_ERR
@@ -1106,12 +1095,10 @@ jpg_sync (struct file *file,
1106 frame = zr->jpg_pend[zr->jpg_que_tail & BUZ_MASK_FRAME]; 1095 frame = zr->jpg_pend[zr->jpg_que_tail & BUZ_MASK_FRAME];
1107 1096
1108 /* buffer should now be in BUZ_STATE_DONE */ 1097 /* buffer should now be in BUZ_STATE_DONE */
1109 if (*zr_debug > 0) 1098 if (zr->jpg_buffers.buffer[frame].state != BUZ_STATE_DONE)
1110 if (zr->jpg_buffers.buffer[frame].state != BUZ_STATE_DONE) 1099 dprintk(2,
1111 dprintk(2, 1100 KERN_ERR "%s: jpg_sync() - internal state error\n",
1112 KERN_ERR 1101 ZR_DEVNAME(zr));
1113 "%s: jpg_sync() - internal state error\n",
1114 ZR_DEVNAME(zr));
1115 1102
1116 *bs = zr->jpg_buffers.buffer[frame].bs; 1103 *bs = zr->jpg_buffers.buffer[frame].bs;
1117 bs->frame = frame; 1104 bs->frame = frame;
@@ -1389,7 +1376,7 @@ zoran_close (struct inode *inode,
1389 /* disable interrupts */ 1376 /* disable interrupts */
1390 btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR); 1377 btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
1391 1378
1392 if (*zr_debug > 1) 1379 if (zr36067_debug > 1)
1393 print_interrupts(zr); 1380 print_interrupts(zr);
1394 1381
1395 /* Overlay off */ 1382 /* Overlay off */
@@ -3206,7 +3193,7 @@ zoran_do_ioctl (struct inode *inode,
3206 "%s: VIDIOC_QUERYBUF - index=%d, type=%d\n", 3193 "%s: VIDIOC_QUERYBUF - index=%d, type=%d\n",
3207 ZR_DEVNAME(zr), buf->index, buf->type); 3194 ZR_DEVNAME(zr), buf->index, buf->type);
3208 3195
3209 memset(buf, 0, sizeof(buf)); 3196 memset(buf, 0, sizeof(*buf));
3210 buf->type = type; 3197 buf->type = type;
3211 buf->index = index; 3198 buf->index = index;
3212 3199
diff --git a/drivers/media/video/zoran_procfs.c b/drivers/media/video/zoran_procfs.c
index 446ae8d5c3df..328ed6e7ac6a 100644
--- a/drivers/media/video/zoran_procfs.c
+++ b/drivers/media/video/zoran_procfs.c
@@ -48,14 +48,7 @@
48#include "videocodec.h" 48#include "videocodec.h"
49#include "zoran.h" 49#include "zoran.h"
50#include "zoran_procfs.h" 50#include "zoran_procfs.h"
51 51#include "zoran_card.h"
52extern int *zr_debug;
53
54#define dprintk(num, format, args...) \
55 do { \
56 if (*zr_debug >= num) \
57 printk(format, ##args); \
58 } while (0)
59 52
60#ifdef CONFIG_PROC_FS 53#ifdef CONFIG_PROC_FS
61struct procfs_params_zr36067 { 54struct procfs_params_zr36067 {
diff --git a/drivers/media/video/zr36016.c b/drivers/media/video/zr36016.c
index 62f77584fb85..dd084555da8f 100644
--- a/drivers/media/video/zr36016.c
+++ b/drivers/media/video/zr36016.c
@@ -38,11 +38,11 @@
38 #include<linux/videodev.h> */ 38 #include<linux/videodev.h> */
39 39
40/* I/O commands, error codes */ 40/* I/O commands, error codes */
41#include<asm/io.h> 41#include <asm/io.h>
42//#include<errno.h> 42//#include<errno.h>
43 43
44/* v4l API */ 44/* v4l API */
45#include<linux/videodev.h> 45#include <linux/videodev.h>
46 46
47/* headerfile of this module */ 47/* headerfile of this module */
48#include"zr36016.h" 48#include"zr36016.h"
diff --git a/drivers/media/video/zr36050.c b/drivers/media/video/zr36050.c
index a6bbd125631c..9f622e00c479 100644
--- a/drivers/media/video/zr36050.c
+++ b/drivers/media/video/zr36050.c
@@ -38,14 +38,14 @@
38 #include<linux/videodev.h> */ 38 #include<linux/videodev.h> */
39 39
40/* I/O commands, error codes */ 40/* I/O commands, error codes */
41#include<asm/io.h> 41#include <asm/io.h>
42//#include<errno.h> 42//#include<errno.h>
43 43
44/* headerfile of this module */ 44/* headerfile of this module */
45#include"zr36050.h" 45#include "zr36050.h"
46 46
47/* codec io API */ 47/* codec io API */
48#include"videocodec.h" 48#include "videocodec.h"
49 49
50/* it doesn't make sense to have more than 20 or so, 50/* it doesn't make sense to have more than 20 or so,
51 just to prevent some unwanted loops */ 51 just to prevent some unwanted loops */
diff --git a/drivers/media/video/zr36060.c b/drivers/media/video/zr36060.c
index 97c8f9b9dc12..1ef14fef08e6 100644
--- a/drivers/media/video/zr36060.c
+++ b/drivers/media/video/zr36060.c
@@ -38,14 +38,14 @@
38 #include<linux/videodev.h> */ 38 #include<linux/videodev.h> */
39 39
40/* I/O commands, error codes */ 40/* I/O commands, error codes */
41#include<asm/io.h> 41#include <asm/io.h>
42//#include<errno.h> 42//#include<errno.h>
43 43
44/* headerfile of this module */ 44/* headerfile of this module */
45#include"zr36060.h" 45#include "zr36060.h"
46 46
47/* codec io API */ 47/* codec io API */
48#include"videocodec.h" 48#include "videocodec.h"
49 49
50/* it doesn't make sense to have more than 20 or so, 50/* it doesn't make sense to have more than 20 or so,
51 just to prevent some unwanted loops */ 51 just to prevent some unwanted loops */
diff --git a/drivers/misc/msi-laptop.c b/drivers/misc/msi-laptop.c
index 349be934db7c..83679c762925 100644
--- a/drivers/misc/msi-laptop.c
+++ b/drivers/misc/msi-laptop.c
@@ -283,7 +283,7 @@ static struct platform_device *msipf_device;
283 283
284/* Initialization */ 284/* Initialization */
285 285
286static int dmi_check_cb(struct dmi_system_id *id) 286static int dmi_check_cb(const struct dmi_system_id *id)
287{ 287{
288 printk("msi-laptop: Identified laptop model '%s'.\n", id->ident); 288 printk("msi-laptop: Identified laptop model '%s'.\n", id->ident);
289 return 0; 289 return 0;
diff --git a/drivers/misc/sony-laptop.c b/drivers/misc/sony-laptop.c
index d38ddce592c0..e73a71f04bb4 100644
--- a/drivers/misc/sony-laptop.c
+++ b/drivers/misc/sony-laptop.c
@@ -807,7 +807,7 @@ static struct sony_nc_event *sony_nc_events;
807/* Vaio C* --maybe also FE*, N* and AR* ?-- special init sequence 807/* Vaio C* --maybe also FE*, N* and AR* ?-- special init sequence
808 * for Fn keys 808 * for Fn keys
809 */ 809 */
810static int sony_nc_C_enable(struct dmi_system_id *id) 810static int sony_nc_C_enable(const struct dmi_system_id *id)
811{ 811{
812 int result = 0; 812 int result = 0;
813 813
@@ -845,7 +845,7 @@ static struct sony_nc_event sony_C_events[] = {
845}; 845};
846 846
847/* SNC-only model map */ 847/* SNC-only model map */
848static struct dmi_system_id sony_nc_ids[] = { 848static const struct dmi_system_id sony_nc_ids[] = {
849 { 849 {
850 .ident = "Sony Vaio FE Series", 850 .ident = "Sony Vaio FE Series",
851 .callback = sony_nc_C_enable, 851 .callback = sony_nc_C_enable,
diff --git a/drivers/misc/thinkpad_acpi.c b/drivers/misc/thinkpad_acpi.c
index 0222bbaf7b76..6c0b2f0a51ab 100644
--- a/drivers/misc/thinkpad_acpi.c
+++ b/drivers/misc/thinkpad_acpi.c
@@ -4448,7 +4448,7 @@ static void ibm_exit(struct ibm_struct *ibm)
4448 4448
4449static void __init get_thinkpad_model_data(struct thinkpad_id_data *tp) 4449static void __init get_thinkpad_model_data(struct thinkpad_id_data *tp)
4450{ 4450{
4451 struct dmi_device *dev = NULL; 4451 const struct dmi_device *dev = NULL;
4452 char ec_fw_string[18]; 4452 char ec_fw_string[18];
4453 4453
4454 if (!tp) 4454 if (!tp)
diff --git a/drivers/mmc/card/Kconfig b/drivers/mmc/card/Kconfig
index a49cb9737cd8..aa8a4e461942 100644
--- a/drivers/mmc/card/Kconfig
+++ b/drivers/mmc/card/Kconfig
@@ -32,3 +32,10 @@ config MMC_BLOCK_BOUNCE
32 32
33 If unsure, say Y here. 33 If unsure, say Y here.
34 34
35config SDIO_UART
36 tristate "SDIO UART/GPS class support"
37 depends on MMC
38 help
39 SDIO function driver for SDIO cards that implements the UART
40 class, as well as the GPS class which appears like a UART.
41
diff --git a/drivers/mmc/card/Makefile b/drivers/mmc/card/Makefile
index cf8c939867f5..fc5a784cfa1a 100644
--- a/drivers/mmc/card/Makefile
+++ b/drivers/mmc/card/Makefile
@@ -9,3 +9,5 @@ endif
9obj-$(CONFIG_MMC_BLOCK) += mmc_block.o 9obj-$(CONFIG_MMC_BLOCK) += mmc_block.o
10mmc_block-objs := block.o queue.o 10mmc_block-objs := block.o queue.o
11 11
12obj-$(CONFIG_SDIO_UART) += sdio_uart.o
13
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 93fe2e5dd616..e38d5a3b2a89 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -151,17 +151,19 @@ static u32 mmc_sd_num_wr_blocks(struct mmc_card *card)
151 151
152 cmd.opcode = MMC_APP_CMD; 152 cmd.opcode = MMC_APP_CMD;
153 cmd.arg = card->rca << 16; 153 cmd.arg = card->rca << 16;
154 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 154 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC;
155 155
156 err = mmc_wait_for_cmd(card->host, &cmd, 0); 156 err = mmc_wait_for_cmd(card->host, &cmd, 0);
157 if ((err != MMC_ERR_NONE) || !(cmd.resp[0] & R1_APP_CMD)) 157 if (err)
158 return (u32)-1;
159 if (!mmc_host_is_spi(card->host) && !(cmd.resp[0] & R1_APP_CMD))
158 return (u32)-1; 160 return (u32)-1;
159 161
160 memset(&cmd, 0, sizeof(struct mmc_command)); 162 memset(&cmd, 0, sizeof(struct mmc_command));
161 163
162 cmd.opcode = SD_APP_SEND_NUM_WR_BLKS; 164 cmd.opcode = SD_APP_SEND_NUM_WR_BLKS;
163 cmd.arg = 0; 165 cmd.arg = 0;
164 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 166 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
165 167
166 memset(&data, 0, sizeof(struct mmc_data)); 168 memset(&data, 0, sizeof(struct mmc_data));
167 169
@@ -192,7 +194,7 @@ static u32 mmc_sd_num_wr_blocks(struct mmc_card *card)
192 194
193 mmc_wait_for_req(card->host, &mrq); 195 mmc_wait_for_req(card->host, &mrq);
194 196
195 if (cmd.error != MMC_ERR_NONE || data.error != MMC_ERR_NONE) 197 if (cmd.error || data.error)
196 return (u32)-1; 198 return (u32)-1;
197 199
198 blocks = ntohl(blocks); 200 blocks = ntohl(blocks);
@@ -220,17 +222,15 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
220 brq.cmd.arg = req->sector; 222 brq.cmd.arg = req->sector;
221 if (!mmc_card_blockaddr(card)) 223 if (!mmc_card_blockaddr(card))
222 brq.cmd.arg <<= 9; 224 brq.cmd.arg <<= 9;
223 brq.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 225 brq.cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
224 brq.data.blksz = 1 << md->block_bits; 226 brq.data.blksz = 1 << md->block_bits;
225 brq.stop.opcode = MMC_STOP_TRANSMISSION; 227 brq.stop.opcode = MMC_STOP_TRANSMISSION;
226 brq.stop.arg = 0; 228 brq.stop.arg = 0;
227 brq.stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 229 brq.stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
228 brq.data.blocks = req->nr_sectors >> (md->block_bits - 9); 230 brq.data.blocks = req->nr_sectors >> (md->block_bits - 9);
229 if (brq.data.blocks > card->host->max_blk_count) 231 if (brq.data.blocks > card->host->max_blk_count)
230 brq.data.blocks = card->host->max_blk_count; 232 brq.data.blocks = card->host->max_blk_count;
231 233
232 mmc_set_data_timeout(&brq.data, card, rq_data_dir(req) != READ);
233
234 /* 234 /*
235 * If the host doesn't support multiple block writes, force 235 * If the host doesn't support multiple block writes, force
236 * block writes to single block. SD cards are excepted from 236 * block writes to single block. SD cards are excepted from
@@ -243,8 +243,12 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
243 brq.data.blocks = 1; 243 brq.data.blocks = 1;
244 244
245 if (brq.data.blocks > 1) { 245 if (brq.data.blocks > 1) {
246 brq.data.flags |= MMC_DATA_MULTI; 246 /* SPI multiblock writes terminate using a special
247 brq.mrq.stop = &brq.stop; 247 * token, not a STOP_TRANSMISSION request.
248 */
249 if (!mmc_host_is_spi(card->host)
250 || rq_data_dir(req) == READ)
251 brq.mrq.stop = &brq.stop;
248 readcmd = MMC_READ_MULTIPLE_BLOCK; 252 readcmd = MMC_READ_MULTIPLE_BLOCK;
249 writecmd = MMC_WRITE_MULTIPLE_BLOCK; 253 writecmd = MMC_WRITE_MULTIPLE_BLOCK;
250 } else { 254 } else {
@@ -261,6 +265,8 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
261 brq.data.flags |= MMC_DATA_WRITE; 265 brq.data.flags |= MMC_DATA_WRITE;
262 } 266 }
263 267
268 mmc_set_data_timeout(&brq.data, card);
269
264 brq.data.sg = mq->sg; 270 brq.data.sg = mq->sg;
265 brq.data.sg_len = mmc_queue_map_sg(mq); 271 brq.data.sg_len = mmc_queue_map_sg(mq);
266 272
@@ -302,7 +308,7 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
302 goto cmd_err; 308 goto cmd_err;
303 } 309 }
304 310
305 if (rq_data_dir(req) != READ) { 311 if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) {
306 do { 312 do {
307 int err; 313 int err;
308 314
@@ -510,7 +516,7 @@ mmc_blk_set_blksize(struct mmc_blk_data *md, struct mmc_card *card)
510 mmc_claim_host(card->host); 516 mmc_claim_host(card->host);
511 cmd.opcode = MMC_SET_BLOCKLEN; 517 cmd.opcode = MMC_SET_BLOCKLEN;
512 cmd.arg = 1 << md->block_bits; 518 cmd.arg = 1 << md->block_bits;
513 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 519 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC;
514 err = mmc_wait_for_cmd(card->host, &cmd, 5); 520 err = mmc_wait_for_cmd(card->host, &cmd, 5);
515 mmc_release_host(card->host); 521 mmc_release_host(card->host);
516 522
diff --git a/drivers/mmc/card/sdio_uart.c b/drivers/mmc/card/sdio_uart.c
new file mode 100644
index 000000000000..d552de683110
--- /dev/null
+++ b/drivers/mmc/card/sdio_uart.c
@@ -0,0 +1,1158 @@
1/*
2 * linux/drivers/mmc/card/sdio_uart.c - SDIO UART/GPS driver
3 *
4 * Based on drivers/serial/8250.c and drivers/serial/serial_core.c
5 * by Russell King.
6 *
7 * Author: Nicolas Pitre
8 * Created: June 15, 2007
9 * Copyright: MontaVista Software, Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17/*
18 * Note: Although this driver assumes a 16550A-like UART implementation,
19 * it is not possible to leverage the common 8250/16550 driver, nor the
20 * core UART infrastructure, as they assumes direct access to the hardware
21 * registers, often under a spinlock. This is not possible in the SDIO
22 * context as SDIO access functions must be able to sleep.
23 *
24 * Because we need to lock the SDIO host to ensure an exclusive access to
25 * the card, we simply rely on that lock to also prevent and serialize
26 * concurrent access to the same port.
27 */
28
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <linux/mutex.h>
33#include <linux/serial_reg.h>
34#include <linux/circ_buf.h>
35#include <linux/gfp.h>
36#include <linux/tty.h>
37#include <linux/tty_flip.h>
38
39#include <linux/mmc/core.h>
40#include <linux/mmc/card.h>
41#include <linux/mmc/sdio_func.h>
42#include <linux/mmc/sdio_ids.h>
43
44
45#define UART_NR 8 /* Number of UARTs this driver can handle */
46
47
48#define UART_XMIT_SIZE PAGE_SIZE
49#define WAKEUP_CHARS 256
50
51#define circ_empty(circ) ((circ)->head == (circ)->tail)
52#define circ_clear(circ) ((circ)->head = (circ)->tail = 0)
53
54#define circ_chars_pending(circ) \
55 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
56
57#define circ_chars_free(circ) \
58 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
59
60
61struct uart_icount {
62 __u32 cts;
63 __u32 dsr;
64 __u32 rng;
65 __u32 dcd;
66 __u32 rx;
67 __u32 tx;
68 __u32 frame;
69 __u32 overrun;
70 __u32 parity;
71 __u32 brk;
72};
73
74struct sdio_uart_port {
75 struct kref kref;
76 struct tty_struct *tty;
77 unsigned int index;
78 unsigned int opened;
79 struct mutex open_lock;
80 struct sdio_func *func;
81 struct mutex func_lock;
82 struct task_struct *in_sdio_uart_irq;
83 unsigned int regs_offset;
84 struct circ_buf xmit;
85 spinlock_t write_lock;
86 struct uart_icount icount;
87 unsigned int uartclk;
88 unsigned int mctrl;
89 unsigned int read_status_mask;
90 unsigned int ignore_status_mask;
91 unsigned char x_char;
92 unsigned char ier;
93 unsigned char lcr;
94};
95
96static struct sdio_uart_port *sdio_uart_table[UART_NR];
97static DEFINE_SPINLOCK(sdio_uart_table_lock);
98
99static int sdio_uart_add_port(struct sdio_uart_port *port)
100{
101 int index, ret = -EBUSY;
102
103 kref_init(&port->kref);
104 mutex_init(&port->open_lock);
105 mutex_init(&port->func_lock);
106 spin_lock_init(&port->write_lock);
107
108 spin_lock(&sdio_uart_table_lock);
109 for (index = 0; index < UART_NR; index++) {
110 if (!sdio_uart_table[index]) {
111 port->index = index;
112 sdio_uart_table[index] = port;
113 ret = 0;
114 break;
115 }
116 }
117 spin_unlock(&sdio_uart_table_lock);
118
119 return ret;
120}
121
122static struct sdio_uart_port *sdio_uart_port_get(unsigned index)
123{
124 struct sdio_uart_port *port;
125
126 if (index >= UART_NR)
127 return NULL;
128
129 spin_lock(&sdio_uart_table_lock);
130 port = sdio_uart_table[index];
131 if (port)
132 kref_get(&port->kref);
133 spin_unlock(&sdio_uart_table_lock);
134
135 return port;
136}
137
138static void sdio_uart_port_destroy(struct kref *kref)
139{
140 struct sdio_uart_port *port =
141 container_of(kref, struct sdio_uart_port, kref);
142 kfree(port);
143}
144
145static void sdio_uart_port_put(struct sdio_uart_port *port)
146{
147 kref_put(&port->kref, sdio_uart_port_destroy);
148}
149
150static void sdio_uart_port_remove(struct sdio_uart_port *port)
151{
152 struct sdio_func *func;
153
154 BUG_ON(sdio_uart_table[port->index] != port);
155
156 spin_lock(&sdio_uart_table_lock);
157 sdio_uart_table[port->index] = NULL;
158 spin_unlock(&sdio_uart_table_lock);
159
160 /*
161 * We're killing a port that potentially still is in use by
162 * the tty layer. Be careful to prevent any further access
163 * to the SDIO function and arrange for the tty layer to
164 * give up on that port ASAP.
165 * Beware: the lock ordering is critical.
166 */
167 mutex_lock(&port->open_lock);
168 mutex_lock(&port->func_lock);
169 func = port->func;
170 sdio_claim_host(func);
171 port->func = NULL;
172 mutex_unlock(&port->func_lock);
173 if (port->opened)
174 tty_hangup(port->tty);
175 mutex_unlock(&port->open_lock);
176 sdio_release_irq(func);
177 sdio_disable_func(func);
178 sdio_release_host(func);
179
180 sdio_uart_port_put(port);
181}
182
183static int sdio_uart_claim_func(struct sdio_uart_port *port)
184{
185 mutex_lock(&port->func_lock);
186 if (unlikely(!port->func)) {
187 mutex_unlock(&port->func_lock);
188 return -ENODEV;
189 }
190 if (likely(port->in_sdio_uart_irq != current))
191 sdio_claim_host(port->func);
192 mutex_unlock(&port->func_lock);
193 return 0;
194}
195
196static inline void sdio_uart_release_func(struct sdio_uart_port *port)
197{
198 if (likely(port->in_sdio_uart_irq != current))
199 sdio_release_host(port->func);
200}
201
202static inline unsigned int sdio_in(struct sdio_uart_port *port, int offset)
203{
204 unsigned char c;
205 c = sdio_readb(port->func, port->regs_offset + offset, NULL);
206 return c;
207}
208
209static inline void sdio_out(struct sdio_uart_port *port, int offset, int value)
210{
211 sdio_writeb(port->func, value, port->regs_offset + offset, NULL);
212}
213
214static unsigned int sdio_uart_get_mctrl(struct sdio_uart_port *port)
215{
216 unsigned char status;
217 unsigned int ret;
218
219 status = sdio_in(port, UART_MSR);
220
221 ret = 0;
222 if (status & UART_MSR_DCD)
223 ret |= TIOCM_CAR;
224 if (status & UART_MSR_RI)
225 ret |= TIOCM_RNG;
226 if (status & UART_MSR_DSR)
227 ret |= TIOCM_DSR;
228 if (status & UART_MSR_CTS)
229 ret |= TIOCM_CTS;
230 return ret;
231}
232
233static void sdio_uart_write_mctrl(struct sdio_uart_port *port, unsigned int mctrl)
234{
235 unsigned char mcr = 0;
236
237 if (mctrl & TIOCM_RTS)
238 mcr |= UART_MCR_RTS;
239 if (mctrl & TIOCM_DTR)
240 mcr |= UART_MCR_DTR;
241 if (mctrl & TIOCM_OUT1)
242 mcr |= UART_MCR_OUT1;
243 if (mctrl & TIOCM_OUT2)
244 mcr |= UART_MCR_OUT2;
245 if (mctrl & TIOCM_LOOP)
246 mcr |= UART_MCR_LOOP;
247
248 sdio_out(port, UART_MCR, mcr);
249}
250
251static inline void sdio_uart_update_mctrl(struct sdio_uart_port *port,
252 unsigned int set, unsigned int clear)
253{
254 unsigned int old;
255
256 old = port->mctrl;
257 port->mctrl = (old & ~clear) | set;
258 if (old != port->mctrl)
259 sdio_uart_write_mctrl(port, port->mctrl);
260}
261
262#define sdio_uart_set_mctrl(port, x) sdio_uart_update_mctrl(port, x, 0)
263#define sdio_uart_clear_mctrl(port, x) sdio_uart_update_mctrl(port, 0, x)
264
265static void sdio_uart_change_speed(struct sdio_uart_port *port,
266 struct ktermios *termios,
267 struct ktermios *old)
268{
269 unsigned char cval, fcr = 0;
270 unsigned int baud, quot;
271
272 switch (termios->c_cflag & CSIZE) {
273 case CS5:
274 cval = UART_LCR_WLEN5;
275 break;
276 case CS6:
277 cval = UART_LCR_WLEN6;
278 break;
279 case CS7:
280 cval = UART_LCR_WLEN7;
281 break;
282 default:
283 case CS8:
284 cval = UART_LCR_WLEN8;
285 break;
286 }
287
288 if (termios->c_cflag & CSTOPB)
289 cval |= UART_LCR_STOP;
290 if (termios->c_cflag & PARENB)
291 cval |= UART_LCR_PARITY;
292 if (!(termios->c_cflag & PARODD))
293 cval |= UART_LCR_EPAR;
294
295 for (;;) {
296 baud = tty_termios_baud_rate(termios);
297 if (baud == 0)
298 baud = 9600; /* Special case: B0 rate. */
299 if (baud <= port->uartclk)
300 break;
301 /*
302 * Oops, the quotient was zero. Try again with the old
303 * baud rate if possible, otherwise default to 9600.
304 */
305 termios->c_cflag &= ~CBAUD;
306 if (old) {
307 termios->c_cflag |= old->c_cflag & CBAUD;
308 old = NULL;
309 } else
310 termios->c_cflag |= B9600;
311 }
312 quot = (2 * port->uartclk + baud) / (2 * baud);
313
314 if (baud < 2400)
315 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
316 else
317 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
318
319 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
320 if (termios->c_iflag & INPCK)
321 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
322 if (termios->c_iflag & (BRKINT | PARMRK))
323 port->read_status_mask |= UART_LSR_BI;
324
325 /*
326 * Characters to ignore
327 */
328 port->ignore_status_mask = 0;
329 if (termios->c_iflag & IGNPAR)
330 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
331 if (termios->c_iflag & IGNBRK) {
332 port->ignore_status_mask |= UART_LSR_BI;
333 /*
334 * If we're ignoring parity and break indicators,
335 * ignore overruns too (for real raw support).
336 */
337 if (termios->c_iflag & IGNPAR)
338 port->ignore_status_mask |= UART_LSR_OE;
339 }
340
341 /*
342 * ignore all characters if CREAD is not set
343 */
344 if ((termios->c_cflag & CREAD) == 0)
345 port->ignore_status_mask |= UART_LSR_DR;
346
347 /*
348 * CTS flow control flag and modem status interrupts
349 */
350 port->ier &= ~UART_IER_MSI;
351 if ((termios->c_cflag & CRTSCTS) || !(termios->c_cflag & CLOCAL))
352 port->ier |= UART_IER_MSI;
353
354 port->lcr = cval;
355
356 sdio_out(port, UART_IER, port->ier);
357 sdio_out(port, UART_LCR, cval | UART_LCR_DLAB);
358 sdio_out(port, UART_DLL, quot & 0xff);
359 sdio_out(port, UART_DLM, quot >> 8);
360 sdio_out(port, UART_LCR, cval);
361 sdio_out(port, UART_FCR, fcr);
362
363 sdio_uart_write_mctrl(port, port->mctrl);
364}
365
366static void sdio_uart_start_tx(struct sdio_uart_port *port)
367{
368 if (!(port->ier & UART_IER_THRI)) {
369 port->ier |= UART_IER_THRI;
370 sdio_out(port, UART_IER, port->ier);
371 }
372}
373
374static void sdio_uart_stop_tx(struct sdio_uart_port *port)
375{
376 if (port->ier & UART_IER_THRI) {
377 port->ier &= ~UART_IER_THRI;
378 sdio_out(port, UART_IER, port->ier);
379 }
380}
381
382static void sdio_uart_stop_rx(struct sdio_uart_port *port)
383{
384 port->ier &= ~UART_IER_RLSI;
385 port->read_status_mask &= ~UART_LSR_DR;
386 sdio_out(port, UART_IER, port->ier);
387}
388
389static void sdio_uart_receive_chars(struct sdio_uart_port *port, int *status)
390{
391 struct tty_struct *tty = port->tty;
392 unsigned int ch, flag;
393 int max_count = 256;
394
395 do {
396 ch = sdio_in(port, UART_RX);
397 flag = TTY_NORMAL;
398 port->icount.rx++;
399
400 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
401 UART_LSR_FE | UART_LSR_OE))) {
402 /*
403 * For statistics only
404 */
405 if (*status & UART_LSR_BI) {
406 *status &= ~(UART_LSR_FE | UART_LSR_PE);
407 port->icount.brk++;
408 } else if (*status & UART_LSR_PE)
409 port->icount.parity++;
410 else if (*status & UART_LSR_FE)
411 port->icount.frame++;
412 if (*status & UART_LSR_OE)
413 port->icount.overrun++;
414
415 /*
416 * Mask off conditions which should be ignored.
417 */
418 *status &= port->read_status_mask;
419 if (*status & UART_LSR_BI) {
420 flag = TTY_BREAK;
421 } else if (*status & UART_LSR_PE)
422 flag = TTY_PARITY;
423 else if (*status & UART_LSR_FE)
424 flag = TTY_FRAME;
425 }
426
427 if ((*status & port->ignore_status_mask & ~UART_LSR_OE) == 0)
428 tty_insert_flip_char(tty, ch, flag);
429
430 /*
431 * Overrun is special. Since it's reported immediately,
432 * it doesn't affect the current character.
433 */
434 if (*status & ~port->ignore_status_mask & UART_LSR_OE)
435 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
436
437 *status = sdio_in(port, UART_LSR);
438 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
439 tty_flip_buffer_push(tty);
440}
441
442static void sdio_uart_transmit_chars(struct sdio_uart_port *port)
443{
444 struct circ_buf *xmit = &port->xmit;
445 int count;
446
447 if (port->x_char) {
448 sdio_out(port, UART_TX, port->x_char);
449 port->icount.tx++;
450 port->x_char = 0;
451 return;
452 }
453 if (circ_empty(xmit) || port->tty->stopped || port->tty->hw_stopped) {
454 sdio_uart_stop_tx(port);
455 return;
456 }
457
458 count = 16;
459 do {
460 sdio_out(port, UART_TX, xmit->buf[xmit->tail]);
461 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
462 port->icount.tx++;
463 if (circ_empty(xmit))
464 break;
465 } while (--count > 0);
466
467 if (circ_chars_pending(xmit) < WAKEUP_CHARS)
468 tty_wakeup(port->tty);
469
470 if (circ_empty(xmit))
471 sdio_uart_stop_tx(port);
472}
473
474static void sdio_uart_check_modem_status(struct sdio_uart_port *port)
475{
476 int status;
477
478 status = sdio_in(port, UART_MSR);
479
480 if ((status & UART_MSR_ANY_DELTA) == 0)
481 return;
482
483 if (status & UART_MSR_TERI)
484 port->icount.rng++;
485 if (status & UART_MSR_DDSR)
486 port->icount.dsr++;
487 if (status & UART_MSR_DDCD)
488 port->icount.dcd++;
489 if (status & UART_MSR_DCTS) {
490 port->icount.cts++;
491 if (port->tty->termios->c_cflag & CRTSCTS) {
492 int cts = (status & UART_MSR_CTS);
493 if (port->tty->hw_stopped) {
494 if (cts) {
495 port->tty->hw_stopped = 0;
496 sdio_uart_start_tx(port);
497 tty_wakeup(port->tty);
498 }
499 } else {
500 if (!cts) {
501 port->tty->hw_stopped = 1;
502 sdio_uart_stop_tx(port);
503 }
504 }
505 }
506 }
507}
508
509/*
510 * This handles the interrupt from one port.
511 */
512static void sdio_uart_irq(struct sdio_func *func)
513{
514 struct sdio_uart_port *port = sdio_get_drvdata(func);
515 unsigned int iir, lsr;
516
517 /*
518 * In a few places sdio_uart_irq() is called directly instead of
519 * waiting for the actual interrupt to be raised and the SDIO IRQ
520 * thread scheduled in order to reduce latency. However, some
521 * interaction with the tty core may end up calling us back
522 * (serial echo, flow control, etc.) through those same places
523 * causing undesirable effects. Let's stop the recursion here.
524 */
525 if (unlikely(port->in_sdio_uart_irq == current))
526 return;
527
528 iir = sdio_in(port, UART_IIR);
529 if (iir & UART_IIR_NO_INT)
530 return;
531
532 port->in_sdio_uart_irq = current;
533 lsr = sdio_in(port, UART_LSR);
534 if (lsr & UART_LSR_DR)
535 sdio_uart_receive_chars(port, &lsr);
536 sdio_uart_check_modem_status(port);
537 if (lsr & UART_LSR_THRE)
538 sdio_uart_transmit_chars(port);
539 port->in_sdio_uart_irq = NULL;
540}
541
542static int sdio_uart_startup(struct sdio_uart_port *port)
543{
544 unsigned long page;
545 int ret;
546
547 /*
548 * Set the TTY IO error marker - we will only clear this
549 * once we have successfully opened the port.
550 */
551 set_bit(TTY_IO_ERROR, &port->tty->flags);
552
553 /* Initialise and allocate the transmit buffer. */
554 page = __get_free_page(GFP_KERNEL);
555 if (!page)
556 return -ENOMEM;
557 port->xmit.buf = (unsigned char *)page;
558 circ_clear(&port->xmit);
559
560 ret = sdio_uart_claim_func(port);
561 if (ret)
562 goto err1;
563 ret = sdio_enable_func(port->func);
564 if (ret)
565 goto err2;
566 ret = sdio_claim_irq(port->func, sdio_uart_irq);
567 if (ret)
568 goto err3;
569
570 /*
571 * Clear the FIFO buffers and disable them.
572 * (they will be reenabled in sdio_change_speed())
573 */
574 sdio_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
575 sdio_out(port, UART_FCR, UART_FCR_ENABLE_FIFO |
576 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
577 sdio_out(port, UART_FCR, 0);
578
579 /*
580 * Clear the interrupt registers.
581 */
582 (void) sdio_in(port, UART_LSR);
583 (void) sdio_in(port, UART_RX);
584 (void) sdio_in(port, UART_IIR);
585 (void) sdio_in(port, UART_MSR);
586
587 /*
588 * Now, initialize the UART
589 */
590 sdio_out(port, UART_LCR, UART_LCR_WLEN8);
591
592 port->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
593 port->mctrl = TIOCM_OUT2;
594
595 sdio_uart_change_speed(port, port->tty->termios, NULL);
596
597 if (port->tty->termios->c_cflag & CBAUD)
598 sdio_uart_set_mctrl(port, TIOCM_RTS | TIOCM_DTR);
599
600 if (port->tty->termios->c_cflag & CRTSCTS)
601 if (!(sdio_uart_get_mctrl(port) & TIOCM_CTS))
602 port->tty->hw_stopped = 1;
603
604 clear_bit(TTY_IO_ERROR, &port->tty->flags);
605
606 /* Kick the IRQ handler once while we're still holding the host lock */
607 sdio_uart_irq(port->func);
608
609 sdio_uart_release_func(port);
610 return 0;
611
612err3:
613 sdio_disable_func(port->func);
614err2:
615 sdio_uart_release_func(port);
616err1:
617 free_page((unsigned long)port->xmit.buf);
618 return ret;
619}
620
621static void sdio_uart_shutdown(struct sdio_uart_port *port)
622{
623 int ret;
624
625 ret = sdio_uart_claim_func(port);
626 if (ret)
627 goto skip;
628
629 sdio_uart_stop_rx(port);
630
631 /* TODO: wait here for TX FIFO to drain */
632
633 /* Turn off DTR and RTS early. */
634 if (port->tty->termios->c_cflag & HUPCL)
635 sdio_uart_clear_mctrl(port, TIOCM_DTR | TIOCM_RTS);
636
637 /* Disable interrupts from this port */
638 sdio_release_irq(port->func);
639 port->ier = 0;
640 sdio_out(port, UART_IER, 0);
641
642 sdio_uart_clear_mctrl(port, TIOCM_OUT2);
643
644 /* Disable break condition and FIFOs. */
645 port->lcr &= ~UART_LCR_SBC;
646 sdio_out(port, UART_LCR, port->lcr);
647 sdio_out(port, UART_FCR, UART_FCR_ENABLE_FIFO |
648 UART_FCR_CLEAR_RCVR |
649 UART_FCR_CLEAR_XMIT);
650 sdio_out(port, UART_FCR, 0);
651
652 sdio_disable_func(port->func);
653
654 sdio_uart_release_func(port);
655
656skip:
657 /* Free the transmit buffer page. */
658 free_page((unsigned long)port->xmit.buf);
659}
660
661static int sdio_uart_open (struct tty_struct *tty, struct file * filp)
662{
663 struct sdio_uart_port *port;
664 int ret;
665
666 port = sdio_uart_port_get(tty->index);
667 if (!port)
668 return -ENODEV;
669
670 mutex_lock(&port->open_lock);
671
672 /*
673 * Make sure not to mess up with a dead port
674 * which has not been closed yet.
675 */
676 if (tty->driver_data && tty->driver_data != port) {
677 mutex_unlock(&port->open_lock);
678 sdio_uart_port_put(port);
679 return -EBUSY;
680 }
681
682 if (!port->opened) {
683 tty->driver_data = port;
684 port->tty = tty;
685 ret = sdio_uart_startup(port);
686 if (ret) {
687 tty->driver_data = NULL;
688 port->tty = NULL;
689 mutex_unlock(&port->open_lock);
690 sdio_uart_port_put(port);
691 return ret;
692 }
693 }
694 port->opened++;
695 mutex_unlock(&port->open_lock);
696 return 0;
697}
698
699static void sdio_uart_close(struct tty_struct *tty, struct file * filp)
700{
701 struct sdio_uart_port *port = tty->driver_data;
702
703 if (!port)
704 return;
705
706 mutex_lock(&port->open_lock);
707 BUG_ON(!port->opened);
708
709 /*
710 * This is messy. The tty layer calls us even when open()
711 * returned an error. Ignore this close request if tty->count
712 * is larger than port->count.
713 */
714 if (tty->count > port->opened) {
715 mutex_unlock(&port->open_lock);
716 return;
717 }
718
719 if (--port->opened == 0) {
720 tty->closing = 1;
721 sdio_uart_shutdown(port);
722 tty_ldisc_flush(tty);
723 port->tty = NULL;
724 tty->driver_data = NULL;
725 tty->closing = 0;
726 }
727 mutex_unlock(&port->open_lock);
728 sdio_uart_port_put(port);
729}
730
731static int sdio_uart_write(struct tty_struct * tty, const unsigned char *buf,
732 int count)
733{
734 struct sdio_uart_port *port = tty->driver_data;
735 struct circ_buf *circ = &port->xmit;
736 int c, ret = 0;
737
738 if (!port->func)
739 return -ENODEV;
740
741 spin_lock(&port->write_lock);
742 while (1) {
743 c = CIRC_SPACE_TO_END(circ->head, circ->tail, UART_XMIT_SIZE);
744 if (count < c)
745 c = count;
746 if (c <= 0)
747 break;
748 memcpy(circ->buf + circ->head, buf, c);
749 circ->head = (circ->head + c) & (UART_XMIT_SIZE - 1);
750 buf += c;
751 count -= c;
752 ret += c;
753 }
754 spin_unlock(&port->write_lock);
755
756 if ( !(port->ier & UART_IER_THRI)) {
757 int err = sdio_uart_claim_func(port);
758 if (!err) {
759 sdio_uart_start_tx(port);
760 sdio_uart_irq(port->func);
761 sdio_uart_release_func(port);
762 } else
763 ret = err;
764 }
765
766 return ret;
767}
768
769static int sdio_uart_write_room(struct tty_struct *tty)
770{
771 struct sdio_uart_port *port = tty->driver_data;
772 return port ? circ_chars_free(&port->xmit) : 0;
773}
774
775static int sdio_uart_chars_in_buffer(struct tty_struct *tty)
776{
777 struct sdio_uart_port *port = tty->driver_data;
778 return port ? circ_chars_pending(&port->xmit) : 0;
779}
780
781static void sdio_uart_send_xchar(struct tty_struct *tty, char ch)
782{
783 struct sdio_uart_port *port = tty->driver_data;
784
785 port->x_char = ch;
786 if (ch && !(port->ier & UART_IER_THRI)) {
787 if (sdio_uart_claim_func(port) != 0)
788 return;
789 sdio_uart_start_tx(port);
790 sdio_uart_irq(port->func);
791 sdio_uart_release_func(port);
792 }
793}
794
795static void sdio_uart_throttle(struct tty_struct *tty)
796{
797 struct sdio_uart_port *port = tty->driver_data;
798
799 if (!I_IXOFF(tty) && !(tty->termios->c_cflag & CRTSCTS))
800 return;
801
802 if (sdio_uart_claim_func(port) != 0)
803 return;
804
805 if (I_IXOFF(tty)) {
806 port->x_char = STOP_CHAR(tty);
807 sdio_uart_start_tx(port);
808 }
809
810 if (tty->termios->c_cflag & CRTSCTS)
811 sdio_uart_clear_mctrl(port, TIOCM_RTS);
812
813 sdio_uart_irq(port->func);
814 sdio_uart_release_func(port);
815}
816
817static void sdio_uart_unthrottle(struct tty_struct *tty)
818{
819 struct sdio_uart_port *port = tty->driver_data;
820
821 if (!I_IXOFF(tty) && !(tty->termios->c_cflag & CRTSCTS))
822 return;
823
824 if (sdio_uart_claim_func(port) != 0)
825 return;
826
827 if (I_IXOFF(tty)) {
828 if (port->x_char) {
829 port->x_char = 0;
830 } else {
831 port->x_char = START_CHAR(tty);
832 sdio_uart_start_tx(port);
833 }
834 }
835
836 if (tty->termios->c_cflag & CRTSCTS)
837 sdio_uart_set_mctrl(port, TIOCM_RTS);
838
839 sdio_uart_irq(port->func);
840 sdio_uart_release_func(port);
841}
842
843static void sdio_uart_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
844{
845 struct sdio_uart_port *port = tty->driver_data;
846 unsigned int cflag = tty->termios->c_cflag;
847
848#define RELEVANT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
849
850 if ((cflag ^ old_termios->c_cflag) == 0 &&
851 RELEVANT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0)
852 return;
853
854 if (sdio_uart_claim_func(port) != 0)
855 return;
856
857 sdio_uart_change_speed(port, tty->termios, old_termios);
858
859 /* Handle transition to B0 status */
860 if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD))
861 sdio_uart_clear_mctrl(port, TIOCM_RTS | TIOCM_DTR);
862
863 /* Handle transition away from B0 status */
864 if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) {
865 unsigned int mask = TIOCM_DTR;
866 if (!(cflag & CRTSCTS) || !test_bit(TTY_THROTTLED, &tty->flags))
867 mask |= TIOCM_RTS;
868 sdio_uart_set_mctrl(port, mask);
869 }
870
871 /* Handle turning off CRTSCTS */
872 if ((old_termios->c_cflag & CRTSCTS) && !(cflag & CRTSCTS)) {
873 tty->hw_stopped = 0;
874 sdio_uart_start_tx(port);
875 }
876
877 /* Handle turning on CRTSCTS */
878 if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) {
879 if (!(sdio_uart_get_mctrl(port) & TIOCM_CTS)) {
880 tty->hw_stopped = 1;
881 sdio_uart_stop_tx(port);
882 }
883 }
884
885 sdio_uart_release_func(port);
886}
887
888static void sdio_uart_break_ctl(struct tty_struct *tty, int break_state)
889{
890 struct sdio_uart_port *port = tty->driver_data;
891
892 if (sdio_uart_claim_func(port) != 0)
893 return;
894
895 if (break_state == -1)
896 port->lcr |= UART_LCR_SBC;
897 else
898 port->lcr &= ~UART_LCR_SBC;
899 sdio_out(port, UART_LCR, port->lcr);
900
901 sdio_uart_release_func(port);
902}
903
904static int sdio_uart_tiocmget(struct tty_struct *tty, struct file *file)
905{
906 struct sdio_uart_port *port = tty->driver_data;
907 int result;
908
909 result = sdio_uart_claim_func(port);
910 if (!result) {
911 result = port->mctrl | sdio_uart_get_mctrl(port);
912 sdio_uart_release_func(port);
913 }
914
915 return result;
916}
917
918static int sdio_uart_tiocmset(struct tty_struct *tty, struct file *file,
919 unsigned int set, unsigned int clear)
920{
921 struct sdio_uart_port *port = tty->driver_data;
922 int result;
923
924 result =sdio_uart_claim_func(port);
925 if(!result) {
926 sdio_uart_update_mctrl(port, set, clear);
927 sdio_uart_release_func(port);
928 }
929
930 return result;
931}
932
933static int sdio_uart_read_proc(char *page, char **start, off_t off,
934 int count, int *eof, void *data)
935{
936 int i, len = 0;
937 off_t begin = 0;
938
939 len += sprintf(page, "serinfo:1.0 driver%s%s revision:%s\n",
940 "", "", "");
941 for (i = 0; i < UART_NR && len < PAGE_SIZE - 96; i++) {
942 struct sdio_uart_port *port = sdio_uart_port_get(i);
943 if (port) {
944 len += sprintf(page+len, "%d: uart:SDIO", i);
945 if(capable(CAP_SYS_ADMIN)) {
946 len += sprintf(page + len, " tx:%d rx:%d",
947 port->icount.tx, port->icount.rx);
948 if (port->icount.frame)
949 len += sprintf(page + len, " fe:%d",
950 port->icount.frame);
951 if (port->icount.parity)
952 len += sprintf(page + len, " pe:%d",
953 port->icount.parity);
954 if (port->icount.brk)
955 len += sprintf(page + len, " brk:%d",
956 port->icount.brk);
957 if (port->icount.overrun)
958 len += sprintf(page + len, " oe:%d",
959 port->icount.overrun);
960 if (port->icount.cts)
961 len += sprintf(page + len, " cts:%d",
962 port->icount.cts);
963 if (port->icount.dsr)
964 len += sprintf(page + len, " dsr:%d",
965 port->icount.dsr);
966 if (port->icount.rng)
967 len += sprintf(page + len, " rng:%d",
968 port->icount.rng);
969 if (port->icount.dcd)
970 len += sprintf(page + len, " dcd:%d",
971 port->icount.dcd);
972 }
973 strcat(page, "\n");
974 len++;
975 sdio_uart_port_put(port);
976 }
977
978 if (len + begin > off + count)
979 goto done;
980 if (len + begin < off) {
981 begin += len;
982 len = 0;
983 }
984 }
985 *eof = 1;
986
987done:
988 if (off >= len + begin)
989 return 0;
990 *start = page + (off - begin);
991 return (count < begin + len - off) ? count : (begin + len - off);
992}
993
994static const struct tty_operations sdio_uart_ops = {
995 .open = sdio_uart_open,
996 .close = sdio_uart_close,
997 .write = sdio_uart_write,
998 .write_room = sdio_uart_write_room,
999 .chars_in_buffer = sdio_uart_chars_in_buffer,
1000 .send_xchar = sdio_uart_send_xchar,
1001 .throttle = sdio_uart_throttle,
1002 .unthrottle = sdio_uart_unthrottle,
1003 .set_termios = sdio_uart_set_termios,
1004 .break_ctl = sdio_uart_break_ctl,
1005 .tiocmget = sdio_uart_tiocmget,
1006 .tiocmset = sdio_uart_tiocmset,
1007 .read_proc = sdio_uart_read_proc,
1008};
1009
1010static struct tty_driver *sdio_uart_tty_driver;
1011
1012static int sdio_uart_probe(struct sdio_func *func,
1013 const struct sdio_device_id *id)
1014{
1015 struct sdio_uart_port *port;
1016 int ret;
1017
1018 port = kzalloc(sizeof(struct sdio_uart_port), GFP_KERNEL);
1019 if (!port)
1020 return -ENOMEM;
1021
1022 if (func->class == SDIO_CLASS_UART) {
1023 printk(KERN_WARNING "%s: need info on UART class basic setup\n",
1024 sdio_func_id(func));
1025 kfree(port);
1026 return -ENOSYS;
1027 } else if (func->class == SDIO_CLASS_GPS) {
1028 /*
1029 * We need tuple 0x91. It contains SUBTPL_SIOREG
1030 * and SUBTPL_RCVCAPS.
1031 */
1032 struct sdio_func_tuple *tpl;
1033 for (tpl = func->tuples; tpl; tpl = tpl->next) {
1034 if (tpl->code != 0x91)
1035 continue;
1036 if (tpl->size < 10)
1037 continue;
1038 if (tpl->data[1] == 0) /* SUBTPL_SIOREG */
1039 break;
1040 }
1041 if (!tpl) {
1042 printk(KERN_WARNING
1043 "%s: can't find tuple 0x91 subtuple 0 (SUBTPL_SIOREG) for GPS class\n",
1044 sdio_func_id(func));
1045 kfree(port);
1046 return -EINVAL;
1047 }
1048 printk(KERN_DEBUG "%s: Register ID = 0x%02x, Exp ID = 0x%02x\n",
1049 sdio_func_id(func), tpl->data[2], tpl->data[3]);
1050 port->regs_offset = (tpl->data[4] << 0) |
1051 (tpl->data[5] << 8) |
1052 (tpl->data[6] << 16);
1053 printk(KERN_DEBUG "%s: regs offset = 0x%x\n",
1054 sdio_func_id(func), port->regs_offset);
1055 port->uartclk = tpl->data[7] * 115200;
1056 if (port->uartclk == 0)
1057 port->uartclk = 115200;
1058 printk(KERN_DEBUG "%s: clk %d baudcode %u 4800-div %u\n",
1059 sdio_func_id(func), port->uartclk,
1060 tpl->data[7], tpl->data[8] | (tpl->data[9] << 8));
1061 } else {
1062 kfree(port);
1063 return -EINVAL;
1064 }
1065
1066 port->func = func;
1067 sdio_set_drvdata(func, port);
1068
1069 ret = sdio_uart_add_port(port);
1070 if (ret) {
1071 kfree(port);
1072 } else {
1073 struct device *dev;
1074 dev = tty_register_device(sdio_uart_tty_driver, port->index, &func->dev);
1075 if (IS_ERR(dev)) {
1076 sdio_uart_port_remove(port);
1077 ret = PTR_ERR(dev);
1078 }
1079 }
1080
1081 return ret;
1082}
1083
1084static void sdio_uart_remove(struct sdio_func *func)
1085{
1086 struct sdio_uart_port *port = sdio_get_drvdata(func);
1087
1088 tty_unregister_device(sdio_uart_tty_driver, port->index);
1089 sdio_uart_port_remove(port);
1090}
1091
1092static const struct sdio_device_id sdio_uart_ids[] = {
1093 { SDIO_DEVICE_CLASS(SDIO_CLASS_UART) },
1094 { SDIO_DEVICE_CLASS(SDIO_CLASS_GPS) },
1095 { /* end: all zeroes */ },
1096};
1097
1098MODULE_DEVICE_TABLE(sdio, sdio_uart_ids);
1099
1100static struct sdio_driver sdio_uart_driver = {
1101 .probe = sdio_uart_probe,
1102 .remove = sdio_uart_remove,
1103 .name = "sdio_uart",
1104 .id_table = sdio_uart_ids,
1105};
1106
1107static int __init sdio_uart_init(void)
1108{
1109 int ret;
1110 struct tty_driver *tty_drv;
1111
1112 sdio_uart_tty_driver = tty_drv = alloc_tty_driver(UART_NR);
1113 if (!tty_drv)
1114 return -ENOMEM;
1115
1116 tty_drv->owner = THIS_MODULE;
1117 tty_drv->driver_name = "sdio_uart";
1118 tty_drv->name = "ttySDIO";
1119 tty_drv->major = 0; /* dynamically allocated */
1120 tty_drv->minor_start = 0;
1121 tty_drv->type = TTY_DRIVER_TYPE_SERIAL;
1122 tty_drv->subtype = SERIAL_TYPE_NORMAL;
1123 tty_drv->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
1124 tty_drv->init_termios = tty_std_termios;
1125 tty_drv->init_termios.c_cflag = B4800 | CS8 | CREAD | HUPCL | CLOCAL;
1126 tty_drv->init_termios.c_ispeed = 4800;
1127 tty_drv->init_termios.c_ospeed = 4800;
1128 tty_set_operations(tty_drv, &sdio_uart_ops);
1129
1130 ret = tty_register_driver(tty_drv);
1131 if (ret)
1132 goto err1;
1133
1134 ret = sdio_register_driver(&sdio_uart_driver);
1135 if (ret)
1136 goto err2;
1137
1138 return 0;
1139
1140err2:
1141 tty_unregister_driver(tty_drv);
1142err1:
1143 put_tty_driver(tty_drv);
1144 return ret;
1145}
1146
1147static void __exit sdio_uart_exit(void)
1148{
1149 sdio_unregister_driver(&sdio_uart_driver);
1150 tty_unregister_driver(sdio_uart_tty_driver);
1151 put_tty_driver(sdio_uart_tty_driver);
1152}
1153
1154module_init(sdio_uart_init);
1155module_exit(sdio_uart_exit);
1156
1157MODULE_AUTHOR("Nicolas Pitre");
1158MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/core/Makefile b/drivers/mmc/core/Makefile
index 3fdd08c7f143..4985807257a8 100644
--- a/drivers/mmc/core/Makefile
+++ b/drivers/mmc/core/Makefile
@@ -8,5 +8,7 @@ endif
8 8
9obj-$(CONFIG_MMC) += mmc_core.o 9obj-$(CONFIG_MMC) += mmc_core.o
10mmc_core-y := core.o sysfs.o bus.o host.o \ 10mmc_core-y := core.o sysfs.o bus.o host.o \
11 mmc.o mmc_ops.o sd.o sd_ops.o 11 mmc.o mmc_ops.o sd.o sd_ops.o \
12 sdio.o sdio_ops.o sdio_bus.o \
13 sdio_cis.o sdio_io.o sdio_irq.o
12 14
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 817a79462b3d..8d6f6014870f 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -19,6 +19,7 @@
19 19
20#include "sysfs.h" 20#include "sysfs.h"
21#include "core.h" 21#include "core.h"
22#include "sdio_cis.h"
22#include "bus.h" 23#include "bus.h"
23 24
24#define dev_to_mmc_card(d) container_of(d, struct mmc_card, dev) 25#define dev_to_mmc_card(d) container_of(d, struct mmc_card, dev)
@@ -34,6 +35,8 @@ static ssize_t mmc_type_show(struct device *dev,
34 return sprintf(buf, "MMC\n"); 35 return sprintf(buf, "MMC\n");
35 case MMC_TYPE_SD: 36 case MMC_TYPE_SD:
36 return sprintf(buf, "SD\n"); 37 return sprintf(buf, "SD\n");
38 case MMC_TYPE_SDIO:
39 return sprintf(buf, "SDIO\n");
37 default: 40 default:
38 return -EFAULT; 41 return -EFAULT;
39 } 42 }
@@ -59,28 +62,34 @@ mmc_bus_uevent(struct device *dev, char **envp, int num_envp, char *buf,
59 int buf_size) 62 int buf_size)
60{ 63{
61 struct mmc_card *card = dev_to_mmc_card(dev); 64 struct mmc_card *card = dev_to_mmc_card(dev);
62 int retval = 0, i = 0, length = 0; 65 const char *type;
63 66 int i = 0, length = 0;
64#define add_env(fmt,val) do { \
65 retval = add_uevent_var(envp, num_envp, &i, \
66 buf, buf_size, &length, \
67 fmt, val); \
68 if (retval) \
69 return retval; \
70} while (0);
71 67
72 switch (card->type) { 68 switch (card->type) {
73 case MMC_TYPE_MMC: 69 case MMC_TYPE_MMC:
74 add_env("MMC_TYPE=%s", "MMC"); 70 type = "MMC";
75 break; 71 break;
76 case MMC_TYPE_SD: 72 case MMC_TYPE_SD:
77 add_env("MMC_TYPE=%s", "SD"); 73 type = "SD";
74 break;
75 case MMC_TYPE_SDIO:
76 type = "SDIO";
78 break; 77 break;
78 default:
79 type = NULL;
79 } 80 }
80 81
81 add_env("MMC_NAME=%s", mmc_card_name(card)); 82 if (type) {
83 if (add_uevent_var(envp, num_envp, &i,
84 buf, buf_size, &length,
85 "MMC_TYPE=%s", type))
86 return -ENOMEM;
87 }
82 88
83#undef add_env 89 if (add_uevent_var(envp, num_envp, &i,
90 buf, buf_size, &length,
91 "MMC_NAME=%s", mmc_card_name(card)))
92 return -ENOMEM;
84 93
85 envp[i] = NULL; 94 envp[i] = NULL;
86 95
@@ -176,6 +185,11 @@ static void mmc_release_card(struct device *dev)
176{ 185{
177 struct mmc_card *card = dev_to_mmc_card(dev); 186 struct mmc_card *card = dev_to_mmc_card(dev);
178 187
188 sdio_free_common_cis(card);
189
190 if (card->info)
191 kfree(card->info);
192
179 kfree(card); 193 kfree(card);
180} 194}
181 195
@@ -221,15 +235,25 @@ int mmc_add_card(struct mmc_card *card)
221 if (mmc_card_blockaddr(card)) 235 if (mmc_card_blockaddr(card))
222 type = "SDHC"; 236 type = "SDHC";
223 break; 237 break;
238 case MMC_TYPE_SDIO:
239 type = "SDIO";
240 break;
224 default: 241 default:
225 type = "?"; 242 type = "?";
226 break; 243 break;
227 } 244 }
228 245
229 printk(KERN_INFO "%s: new %s%s card at address %04x\n", 246 if (mmc_host_is_spi(card->host)) {
230 mmc_hostname(card->host), 247 printk(KERN_INFO "%s: new %s%s card on SPI\n",
231 mmc_card_highspeed(card) ? "high speed " : "", 248 mmc_hostname(card->host),
232 type, card->rca); 249 mmc_card_highspeed(card) ? "high speed " : "",
250 type);
251 } else {
252 printk(KERN_INFO "%s: new %s%s card at address %04x\n",
253 mmc_hostname(card->host),
254 mmc_card_highspeed(card) ? "high speed " : "",
255 type, card->rca);
256 }
233 257
234 card->dev.uevent_suppress = 1; 258 card->dev.uevent_suppress = 1;
235 259
@@ -261,8 +285,13 @@ int mmc_add_card(struct mmc_card *card)
261void mmc_remove_card(struct mmc_card *card) 285void mmc_remove_card(struct mmc_card *card)
262{ 286{
263 if (mmc_card_present(card)) { 287 if (mmc_card_present(card)) {
264 printk(KERN_INFO "%s: card %04x removed\n", 288 if (mmc_host_is_spi(card->host)) {
265 mmc_hostname(card->host), card->rca); 289 printk(KERN_INFO "%s: SPI card removed\n",
290 mmc_hostname(card->host));
291 } else {
292 printk(KERN_INFO "%s: card %04x removed\n",
293 mmc_hostname(card->host), card->rca);
294 }
266 295
267 if (card->host->bus_ops->sysfs_remove) 296 if (card->host->bus_ops->sysfs_remove)
268 card->host->bus_ops->sysfs_remove(card->host, card); 297 card->host->bus_ops->sysfs_remove(card->host, card);
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index bfd2ae5bd669..09435e0ec680 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -18,6 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/pagemap.h> 19#include <linux/pagemap.h>
20#include <linux/err.h> 20#include <linux/err.h>
21#include <linux/leds.h>
21#include <asm/scatterlist.h> 22#include <asm/scatterlist.h>
22#include <linux/scatterlist.h> 23#include <linux/scatterlist.h>
23 24
@@ -29,16 +30,27 @@
29#include "core.h" 30#include "core.h"
30#include "bus.h" 31#include "bus.h"
31#include "host.h" 32#include "host.h"
33#include "sdio_bus.h"
32 34
33#include "mmc_ops.h" 35#include "mmc_ops.h"
34#include "sd_ops.h" 36#include "sd_ops.h"
37#include "sdio_ops.h"
35 38
36extern int mmc_attach_mmc(struct mmc_host *host, u32 ocr); 39extern int mmc_attach_mmc(struct mmc_host *host, u32 ocr);
37extern int mmc_attach_sd(struct mmc_host *host, u32 ocr); 40extern int mmc_attach_sd(struct mmc_host *host, u32 ocr);
41extern int mmc_attach_sdio(struct mmc_host *host, u32 ocr);
38 42
39static struct workqueue_struct *workqueue; 43static struct workqueue_struct *workqueue;
40 44
41/* 45/*
46 * Enabling software CRCs on the data blocks can be a significant (30%)
47 * performance cost, and for other reasons may not always be desired.
48 * So we allow it it to be disabled.
49 */
50int use_spi_crc = 1;
51module_param(use_spi_crc, bool, 0);
52
53/*
42 * Internal function. Schedule delayed work in the MMC work queue. 54 * Internal function. Schedule delayed work in the MMC work queue.
43 */ 55 */
44static int mmc_schedule_delayed_work(struct delayed_work *work, 56static int mmc_schedule_delayed_work(struct delayed_work *work,
@@ -68,6 +80,11 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
68 struct mmc_command *cmd = mrq->cmd; 80 struct mmc_command *cmd = mrq->cmd;
69 int err = cmd->error; 81 int err = cmd->error;
70 82
83 if (err && cmd->retries && mmc_host_is_spi(host)) {
84 if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND)
85 cmd->retries = 0;
86 }
87
71 if (err && cmd->retries) { 88 if (err && cmd->retries) {
72 pr_debug("%s: req failed (CMD%u): %d, retrying...\n", 89 pr_debug("%s: req failed (CMD%u): %d, retrying...\n",
73 mmc_hostname(host), cmd->opcode, err); 90 mmc_hostname(host), cmd->opcode, err);
@@ -76,6 +93,8 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
76 cmd->error = 0; 93 cmd->error = 0;
77 host->ops->request(host, mrq); 94 host->ops->request(host, mrq);
78 } else { 95 } else {
96 led_trigger_event(host->led, LED_OFF);
97
79 pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", 98 pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n",
80 mmc_hostname(host), cmd->opcode, err, 99 mmc_hostname(host), cmd->opcode, err,
81 cmd->resp[0], cmd->resp[1], 100 cmd->resp[0], cmd->resp[1],
@@ -118,7 +137,7 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
118 "tsac %d ms nsac %d\n", 137 "tsac %d ms nsac %d\n",
119 mmc_hostname(host), mrq->data->blksz, 138 mmc_hostname(host), mrq->data->blksz,
120 mrq->data->blocks, mrq->data->flags, 139 mrq->data->blocks, mrq->data->flags,
121 mrq->data->timeout_ns / 10000000, 140 mrq->data->timeout_ns / 1000000,
122 mrq->data->timeout_clks); 141 mrq->data->timeout_clks);
123 } 142 }
124 143
@@ -130,6 +149,8 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
130 149
131 WARN_ON(!host->claimed); 150 WARN_ON(!host->claimed);
132 151
152 led_trigger_event(host->led, LED_FULL);
153
133 mrq->cmd->error = 0; 154 mrq->cmd->error = 0;
134 mrq->cmd->mrq = mrq; 155 mrq->cmd->mrq = mrq;
135 if (mrq->data) { 156 if (mrq->data) {
@@ -199,7 +220,7 @@ int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries
199{ 220{
200 struct mmc_request mrq; 221 struct mmc_request mrq;
201 222
202 BUG_ON(!host->claimed); 223 WARN_ON(!host->claimed);
203 224
204 memset(&mrq, 0, sizeof(struct mmc_request)); 225 memset(&mrq, 0, sizeof(struct mmc_request));
205 226
@@ -220,17 +241,24 @@ EXPORT_SYMBOL(mmc_wait_for_cmd);
220 * mmc_set_data_timeout - set the timeout for a data command 241 * mmc_set_data_timeout - set the timeout for a data command
221 * @data: data phase for command 242 * @data: data phase for command
222 * @card: the MMC card associated with the data transfer 243 * @card: the MMC card associated with the data transfer
223 * @write: flag to differentiate reads from writes
224 * 244 *
225 * Computes the data timeout parameters according to the 245 * Computes the data timeout parameters according to the
226 * correct algorithm given the card type. 246 * correct algorithm given the card type.
227 */ 247 */
228void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card, 248void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card)
229 int write)
230{ 249{
231 unsigned int mult; 250 unsigned int mult;
232 251
233 /* 252 /*
253 * SDIO cards only define an upper 1 s limit on access.
254 */
255 if (mmc_card_sdio(card)) {
256 data->timeout_ns = 1000000000;
257 data->timeout_clks = 0;
258 return;
259 }
260
261 /*
234 * SD cards use a 100 multiplier rather than 10 262 * SD cards use a 100 multiplier rather than 10
235 */ 263 */
236 mult = mmc_card_sd(card) ? 100 : 10; 264 mult = mmc_card_sd(card) ? 100 : 10;
@@ -239,7 +267,7 @@ void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card,
239 * Scale up the multiplier (and therefore the timeout) by 267 * Scale up the multiplier (and therefore the timeout) by
240 * the r2w factor for writes. 268 * the r2w factor for writes.
241 */ 269 */
242 if (write) 270 if (data->flags & MMC_DATA_WRITE)
243 mult <<= card->csd.r2w_factor; 271 mult <<= card->csd.r2w_factor;
244 272
245 data->timeout_ns = card->csd.tacc_ns * mult; 273 data->timeout_ns = card->csd.tacc_ns * mult;
@@ -255,7 +283,7 @@ void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card,
255 timeout_us += data->timeout_clks * 1000 / 283 timeout_us += data->timeout_clks * 1000 /
256 (card->host->ios.clock / 1000); 284 (card->host->ios.clock / 1000);
257 285
258 if (write) 286 if (data->flags & MMC_DATA_WRITE)
259 limit_us = 250000; 287 limit_us = 250000;
260 else 288 else
261 limit_us = 100000; 289 limit_us = 100000;
@@ -272,15 +300,20 @@ void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card,
272EXPORT_SYMBOL(mmc_set_data_timeout); 300EXPORT_SYMBOL(mmc_set_data_timeout);
273 301
274/** 302/**
275 * mmc_claim_host - exclusively claim a host 303 * __mmc_claim_host - exclusively claim a host
276 * @host: mmc host to claim 304 * @host: mmc host to claim
305 * @abort: whether or not the operation should be aborted
277 * 306 *
278 * Claim a host for a set of operations. 307 * Claim a host for a set of operations. If @abort is non null and
308 * dereference a non-zero value then this will return prematurely with
309 * that non-zero value without acquiring the lock. Returns zero
310 * with the lock held otherwise.
279 */ 311 */
280void mmc_claim_host(struct mmc_host *host) 312int __mmc_claim_host(struct mmc_host *host, atomic_t *abort)
281{ 313{
282 DECLARE_WAITQUEUE(wait, current); 314 DECLARE_WAITQUEUE(wait, current);
283 unsigned long flags; 315 unsigned long flags;
316 int stop;
284 317
285 might_sleep(); 318 might_sleep();
286 319
@@ -288,19 +321,24 @@ void mmc_claim_host(struct mmc_host *host)
288 spin_lock_irqsave(&host->lock, flags); 321 spin_lock_irqsave(&host->lock, flags);
289 while (1) { 322 while (1) {
290 set_current_state(TASK_UNINTERRUPTIBLE); 323 set_current_state(TASK_UNINTERRUPTIBLE);
291 if (!host->claimed) 324 stop = abort ? atomic_read(abort) : 0;
325 if (stop || !host->claimed)
292 break; 326 break;
293 spin_unlock_irqrestore(&host->lock, flags); 327 spin_unlock_irqrestore(&host->lock, flags);
294 schedule(); 328 schedule();
295 spin_lock_irqsave(&host->lock, flags); 329 spin_lock_irqsave(&host->lock, flags);
296 } 330 }
297 set_current_state(TASK_RUNNING); 331 set_current_state(TASK_RUNNING);
298 host->claimed = 1; 332 if (!stop)
333 host->claimed = 1;
334 else
335 wake_up(&host->wq);
299 spin_unlock_irqrestore(&host->lock, flags); 336 spin_unlock_irqrestore(&host->lock, flags);
300 remove_wait_queue(&host->wq, &wait); 337 remove_wait_queue(&host->wq, &wait);
338 return stop;
301} 339}
302 340
303EXPORT_SYMBOL(mmc_claim_host); 341EXPORT_SYMBOL(__mmc_claim_host);
304 342
305/** 343/**
306 * mmc_release_host - release a host 344 * mmc_release_host - release a host
@@ -313,7 +351,7 @@ void mmc_release_host(struct mmc_host *host)
313{ 351{
314 unsigned long flags; 352 unsigned long flags;
315 353
316 BUG_ON(!host->claimed); 354 WARN_ON(!host->claimed);
317 355
318 spin_lock_irqsave(&host->lock, flags); 356 spin_lock_irqsave(&host->lock, flags);
319 host->claimed = 0; 357 host->claimed = 0;
@@ -433,19 +471,32 @@ static void mmc_power_up(struct mmc_host *host)
433 int bit = fls(host->ocr_avail) - 1; 471 int bit = fls(host->ocr_avail) - 1;
434 472
435 host->ios.vdd = bit; 473 host->ios.vdd = bit;
436 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; 474 if (mmc_host_is_spi(host)) {
437 host->ios.chip_select = MMC_CS_DONTCARE; 475 host->ios.chip_select = MMC_CS_HIGH;
476 host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
477 } else {
478 host->ios.chip_select = MMC_CS_DONTCARE;
479 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
480 }
438 host->ios.power_mode = MMC_POWER_UP; 481 host->ios.power_mode = MMC_POWER_UP;
439 host->ios.bus_width = MMC_BUS_WIDTH_1; 482 host->ios.bus_width = MMC_BUS_WIDTH_1;
440 host->ios.timing = MMC_TIMING_LEGACY; 483 host->ios.timing = MMC_TIMING_LEGACY;
441 mmc_set_ios(host); 484 mmc_set_ios(host);
442 485
443 mmc_delay(1); 486 /*
487 * This delay should be sufficient to allow the power supply
488 * to reach the minimum voltage.
489 */
490 mmc_delay(2);
444 491
445 host->ios.clock = host->f_min; 492 host->ios.clock = host->f_min;
446 host->ios.power_mode = MMC_POWER_ON; 493 host->ios.power_mode = MMC_POWER_ON;
447 mmc_set_ios(host); 494 mmc_set_ios(host);
448 495
496 /*
497 * This delay must be at least 74 clock sizes, or 1 ms, or the
498 * time required to reach a stable voltage.
499 */
449 mmc_delay(2); 500 mmc_delay(2);
450} 501}
451 502
@@ -453,8 +504,10 @@ static void mmc_power_off(struct mmc_host *host)
453{ 504{
454 host->ios.clock = 0; 505 host->ios.clock = 0;
455 host->ios.vdd = 0; 506 host->ios.vdd = 0;
456 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; 507 if (!mmc_host_is_spi(host)) {
457 host->ios.chip_select = MMC_CS_DONTCARE; 508 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
509 host->ios.chip_select = MMC_CS_DONTCARE;
510 }
458 host->ios.power_mode = MMC_POWER_OFF; 511 host->ios.power_mode = MMC_POWER_OFF;
459 host->ios.bus_width = MMC_BUS_WIDTH_1; 512 host->ios.bus_width = MMC_BUS_WIDTH_1;
460 host->ios.timing = MMC_TIMING_LEGACY; 513 host->ios.timing = MMC_TIMING_LEGACY;
@@ -511,7 +564,7 @@ void mmc_attach_bus(struct mmc_host *host, const struct mmc_bus_ops *ops)
511 BUG_ON(!host); 564 BUG_ON(!host);
512 BUG_ON(!ops); 565 BUG_ON(!ops);
513 566
514 BUG_ON(!host->claimed); 567 WARN_ON(!host->claimed);
515 568
516 spin_lock_irqsave(&host->lock, flags); 569 spin_lock_irqsave(&host->lock, flags);
517 570
@@ -535,8 +588,8 @@ void mmc_detach_bus(struct mmc_host *host)
535 588
536 BUG_ON(!host); 589 BUG_ON(!host);
537 590
538 BUG_ON(!host->claimed); 591 WARN_ON(!host->claimed);
539 BUG_ON(!host->bus_ops); 592 WARN_ON(!host->bus_ops);
540 593
541 spin_lock_irqsave(&host->lock, flags); 594 spin_lock_irqsave(&host->lock, flags);
542 595
@@ -564,7 +617,7 @@ void mmc_detect_change(struct mmc_host *host, unsigned long delay)
564#ifdef CONFIG_MMC_DEBUG 617#ifdef CONFIG_MMC_DEBUG
565 unsigned long flags; 618 unsigned long flags;
566 spin_lock_irqsave(&host->lock, flags); 619 spin_lock_irqsave(&host->lock, flags);
567 BUG_ON(host->removed); 620 WARN_ON(host->removed);
568 spin_unlock_irqrestore(&host->lock, flags); 621 spin_unlock_irqrestore(&host->lock, flags);
569#endif 622#endif
570 623
@@ -597,24 +650,38 @@ void mmc_rescan(struct work_struct *work)
597 650
598 mmc_send_if_cond(host, host->ocr_avail); 651 mmc_send_if_cond(host, host->ocr_avail);
599 652
653 /*
654 * First we search for SDIO...
655 */
656 err = mmc_send_io_op_cond(host, 0, &ocr);
657 if (!err) {
658 if (mmc_attach_sdio(host, ocr))
659 mmc_power_off(host);
660 return;
661 }
662
663 /*
664 * ...then normal SD...
665 */
600 err = mmc_send_app_op_cond(host, 0, &ocr); 666 err = mmc_send_app_op_cond(host, 0, &ocr);
601 if (err == MMC_ERR_NONE) { 667 if (!err) {
602 if (mmc_attach_sd(host, ocr)) 668 if (mmc_attach_sd(host, ocr))
603 mmc_power_off(host); 669 mmc_power_off(host);
604 } else { 670 return;
605 /* 671 }
606 * If we fail to detect any SD cards then try 672
607 * searching for MMC cards. 673 /*
608 */ 674 * ...and finally MMC.
609 err = mmc_send_op_cond(host, 0, &ocr); 675 */
610 if (err == MMC_ERR_NONE) { 676 err = mmc_send_op_cond(host, 0, &ocr);
611 if (mmc_attach_mmc(host, ocr)) 677 if (!err) {
612 mmc_power_off(host); 678 if (mmc_attach_mmc(host, ocr))
613 } else {
614 mmc_power_off(host); 679 mmc_power_off(host);
615 mmc_release_host(host); 680 return;
616 }
617 } 681 }
682
683 mmc_release_host(host);
684 mmc_power_off(host);
618 } else { 685 } else {
619 if (host->bus_ops->detect && !host->bus_dead) 686 if (host->bus_ops->detect && !host->bus_dead)
620 host->bus_ops->detect(host); 687 host->bus_ops->detect(host);
@@ -725,22 +792,38 @@ static int __init mmc_init(void)
725 return -ENOMEM; 792 return -ENOMEM;
726 793
727 ret = mmc_register_bus(); 794 ret = mmc_register_bus();
728 if (ret == 0) { 795 if (ret)
729 ret = mmc_register_host_class(); 796 goto destroy_workqueue;
730 if (ret) 797
731 mmc_unregister_bus(); 798 ret = mmc_register_host_class();
732 } 799 if (ret)
800 goto unregister_bus;
801
802 ret = sdio_register_bus();
803 if (ret)
804 goto unregister_host_class;
805
806 return 0;
807
808unregister_host_class:
809 mmc_unregister_host_class();
810unregister_bus:
811 mmc_unregister_bus();
812destroy_workqueue:
813 destroy_workqueue(workqueue);
814
733 return ret; 815 return ret;
734} 816}
735 817
736static void __exit mmc_exit(void) 818static void __exit mmc_exit(void)
737{ 819{
820 sdio_unregister_bus();
738 mmc_unregister_host_class(); 821 mmc_unregister_host_class();
739 mmc_unregister_bus(); 822 mmc_unregister_bus();
740 destroy_workqueue(workqueue); 823 destroy_workqueue(workqueue);
741} 824}
742 825
743module_init(mmc_init); 826subsys_initcall(mmc_init);
744module_exit(mmc_exit); 827module_exit(mmc_exit);
745 828
746MODULE_LICENSE("GPL"); 829MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index bb2774af9ea9..39daf2fb5dc4 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -48,5 +48,7 @@ void mmc_rescan(struct work_struct *work);
48void mmc_start_host(struct mmc_host *host); 48void mmc_start_host(struct mmc_host *host);
49void mmc_stop_host(struct mmc_host *host); 49void mmc_stop_host(struct mmc_host *host);
50 50
51extern int use_spi_crc;
52
51#endif 53#endif
52 54
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 2c7ce8f43a9a..64fbc9759a30 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -15,6 +15,7 @@
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/idr.h> 16#include <linux/idr.h>
17#include <linux/pagemap.h> 17#include <linux/pagemap.h>
18#include <linux/leds.h>
18 19
19#include <linux/mmc/host.h> 20#include <linux/mmc/host.h>
20 21
@@ -100,6 +101,9 @@ int mmc_add_host(struct mmc_host *host)
100{ 101{
101 int err; 102 int err;
102 103
104 WARN_ON((host->caps & MMC_CAP_SDIO_IRQ) &&
105 !host->ops->enable_sdio_irq);
106
103 if (!idr_pre_get(&mmc_host_idr, GFP_KERNEL)) 107 if (!idr_pre_get(&mmc_host_idr, GFP_KERNEL))
104 return -ENOMEM; 108 return -ENOMEM;
105 109
@@ -112,6 +116,8 @@ int mmc_add_host(struct mmc_host *host)
112 snprintf(host->class_dev.bus_id, BUS_ID_SIZE, 116 snprintf(host->class_dev.bus_id, BUS_ID_SIZE,
113 "mmc%d", host->index); 117 "mmc%d", host->index);
114 118
119 led_trigger_register_simple(host->class_dev.bus_id, &host->led);
120
115 err = device_add(&host->class_dev); 121 err = device_add(&host->class_dev);
116 if (err) 122 if (err)
117 return err; 123 return err;
@@ -137,6 +143,8 @@ void mmc_remove_host(struct mmc_host *host)
137 143
138 device_del(&host->class_dev); 144 device_del(&host->class_dev);
139 145
146 led_trigger_unregister(host->led);
147
140 spin_lock(&mmc_host_lock); 148 spin_lock(&mmc_host_lock);
141 idr_remove(&mmc_host_idr, host->index); 149 idr_remove(&mmc_host_idr, host->index);
142 spin_unlock(&mmc_host_lock); 150 spin_unlock(&mmc_host_lock);
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 21d7f48e1d4e..65fe28860f54 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -161,13 +161,12 @@ static int mmc_read_ext_csd(struct mmc_card *card)
161{ 161{
162 int err; 162 int err;
163 u8 *ext_csd; 163 u8 *ext_csd;
164 unsigned int ext_csd_struct;
164 165
165 BUG_ON(!card); 166 BUG_ON(!card);
166 167
167 err = MMC_ERR_FAILED;
168
169 if (card->csd.mmca_vsn < CSD_SPEC_VER_4) 168 if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
170 return MMC_ERR_NONE; 169 return 0;
171 170
172 /* 171 /*
173 * As the ext_csd is so large and mostly unused, we don't store the 172 * As the ext_csd is so large and mostly unused, we don't store the
@@ -176,13 +175,19 @@ static int mmc_read_ext_csd(struct mmc_card *card)
176 ext_csd = kmalloc(512, GFP_KERNEL); 175 ext_csd = kmalloc(512, GFP_KERNEL);
177 if (!ext_csd) { 176 if (!ext_csd) {
178 printk(KERN_ERR "%s: could not allocate a buffer to " 177 printk(KERN_ERR "%s: could not allocate a buffer to "
179 "receive the ext_csd. mmc v4 cards will be " 178 "receive the ext_csd.\n", mmc_hostname(card->host));
180 "treated as v3.\n", mmc_hostname(card->host)); 179 return -ENOMEM;
181 return MMC_ERR_FAILED;
182 } 180 }
183 181
184 err = mmc_send_ext_csd(card, ext_csd); 182 err = mmc_send_ext_csd(card, ext_csd);
185 if (err != MMC_ERR_NONE) { 183 if (err) {
184 /*
185 * We all hosts that cannot perform the command
186 * to fail more gracefully
187 */
188 if (err != -EINVAL)
189 goto out;
190
186 /* 191 /*
187 * High capacity cards should have this "magic" size 192 * High capacity cards should have this "magic" size
188 * stored in their CSD. 193 * stored in their CSD.
@@ -197,18 +202,29 @@ static int mmc_read_ext_csd(struct mmc_card *card)
197 "EXT_CSD, performance might " 202 "EXT_CSD, performance might "
198 "suffer.\n", 203 "suffer.\n",
199 mmc_hostname(card->host)); 204 mmc_hostname(card->host));
200 err = MMC_ERR_NONE; 205 err = 0;
201 } 206 }
207
202 goto out; 208 goto out;
203 } 209 }
204 210
205 card->ext_csd.sectors = 211 ext_csd_struct = ext_csd[EXT_CSD_REV];
206 ext_csd[EXT_CSD_SEC_CNT + 0] << 0 | 212 if (ext_csd_struct > 2) {
207 ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | 213 printk(KERN_ERR "%s: unrecognised EXT_CSD structure "
208 ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | 214 "version %d\n", mmc_hostname(card->host),
209 ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 215 ext_csd_struct);
210 if (card->ext_csd.sectors) 216 return -EINVAL;
211 mmc_card_set_blockaddr(card); 217 }
218
219 if (ext_csd_struct >= 2) {
220 card->ext_csd.sectors =
221 ext_csd[EXT_CSD_SEC_CNT + 0] << 0 |
222 ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
223 ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
224 ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
225 if (card->ext_csd.sectors)
226 mmc_card_set_blockaddr(card);
227 }
212 228
213 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 229 switch (ext_csd[EXT_CSD_CARD_TYPE]) {
214 case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26: 230 case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
@@ -246,7 +262,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
246 unsigned int max_dtr; 262 unsigned int max_dtr;
247 263
248 BUG_ON(!host); 264 BUG_ON(!host);
249 BUG_ON(!host->claimed); 265 WARN_ON(!host->claimed);
250 266
251 /* 267 /*
252 * Since we're changing the OCR value, we seem to 268 * Since we're changing the OCR value, we seem to
@@ -258,19 +274,33 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
258 274
259 /* The extra bit indicates that we support high capacity */ 275 /* The extra bit indicates that we support high capacity */
260 err = mmc_send_op_cond(host, ocr | (1 << 30), NULL); 276 err = mmc_send_op_cond(host, ocr | (1 << 30), NULL);
261 if (err != MMC_ERR_NONE) 277 if (err)
262 goto err; 278 goto err;
263 279
264 /* 280 /*
281 * For SPI, enable CRC as appropriate.
282 */
283 if (mmc_host_is_spi(host)) {
284 err = mmc_spi_set_crc(host, use_spi_crc);
285 if (err)
286 goto err;
287 }
288
289 /*
265 * Fetch CID from card. 290 * Fetch CID from card.
266 */ 291 */
267 err = mmc_all_send_cid(host, cid); 292 if (mmc_host_is_spi(host))
268 if (err != MMC_ERR_NONE) 293 err = mmc_send_cid(host, cid);
294 else
295 err = mmc_all_send_cid(host, cid);
296 if (err)
269 goto err; 297 goto err;
270 298
271 if (oldcard) { 299 if (oldcard) {
272 if (memcmp(cid, oldcard->raw_cid, sizeof(cid)) != 0) 300 if (memcmp(cid, oldcard->raw_cid, sizeof(cid)) != 0) {
301 err = -ENOENT;
273 goto err; 302 goto err;
303 }
274 304
275 card = oldcard; 305 card = oldcard;
276 } else { 306 } else {
@@ -278,8 +308,10 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
278 * Allocate card structure. 308 * Allocate card structure.
279 */ 309 */
280 card = mmc_alloc_card(host); 310 card = mmc_alloc_card(host);
281 if (IS_ERR(card)) 311 if (IS_ERR(card)) {
312 err = PTR_ERR(card);
282 goto err; 313 goto err;
314 }
283 315
284 card->type = MMC_TYPE_MMC; 316 card->type = MMC_TYPE_MMC;
285 card->rca = 1; 317 card->rca = 1;
@@ -287,43 +319,47 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
287 } 319 }
288 320
289 /* 321 /*
290 * Set card RCA. 322 * For native busses: set card RCA and quit open drain mode.
291 */ 323 */
292 err = mmc_set_relative_addr(card); 324 if (!mmc_host_is_spi(host)) {
293 if (err != MMC_ERR_NONE) 325 err = mmc_set_relative_addr(card);
294 goto free_card; 326 if (err)
327 goto free_card;
295 328
296 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL); 329 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
330 }
297 331
298 if (!oldcard) { 332 if (!oldcard) {
299 /* 333 /*
300 * Fetch CSD from card. 334 * Fetch CSD from card.
301 */ 335 */
302 err = mmc_send_csd(card, card->raw_csd); 336 err = mmc_send_csd(card, card->raw_csd);
303 if (err != MMC_ERR_NONE) 337 if (err)
304 goto free_card; 338 goto free_card;
305 339
306 err = mmc_decode_csd(card); 340 err = mmc_decode_csd(card);
307 if (err < 0) 341 if (err)
308 goto free_card; 342 goto free_card;
309 err = mmc_decode_cid(card); 343 err = mmc_decode_cid(card);
310 if (err < 0) 344 if (err)
311 goto free_card; 345 goto free_card;
312 } 346 }
313 347
314 /* 348 /*
315 * Select card, as all following commands rely on that. 349 * Select card, as all following commands rely on that.
316 */ 350 */
317 err = mmc_select_card(card); 351 if (!mmc_host_is_spi(host)) {
318 if (err != MMC_ERR_NONE) 352 err = mmc_select_card(card);
319 goto free_card; 353 if (err)
354 goto free_card;
355 }
320 356
321 if (!oldcard) { 357 if (!oldcard) {
322 /* 358 /*
323 * Fetch and process extened CSD. 359 * Fetch and process extended CSD.
324 */ 360 */
325 err = mmc_read_ext_csd(card); 361 err = mmc_read_ext_csd(card);
326 if (err != MMC_ERR_NONE) 362 if (err)
327 goto free_card; 363 goto free_card;
328 } 364 }
329 365
@@ -334,7 +370,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
334 (host->caps & MMC_CAP_MMC_HIGHSPEED)) { 370 (host->caps & MMC_CAP_MMC_HIGHSPEED)) {
335 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, 371 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
336 EXT_CSD_HS_TIMING, 1); 372 EXT_CSD_HS_TIMING, 1);
337 if (err != MMC_ERR_NONE) 373 if (err)
338 goto free_card; 374 goto free_card;
339 375
340 mmc_card_set_highspeed(card); 376 mmc_card_set_highspeed(card);
@@ -363,7 +399,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
363 (host->caps & MMC_CAP_4_BIT_DATA)) { 399 (host->caps & MMC_CAP_4_BIT_DATA)) {
364 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, 400 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
365 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4); 401 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
366 if (err != MMC_ERR_NONE) 402 if (err)
367 goto free_card; 403 goto free_card;
368 404
369 mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); 405 mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
@@ -372,14 +408,14 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
372 if (!oldcard) 408 if (!oldcard)
373 host->card = card; 409 host->card = card;
374 410
375 return MMC_ERR_NONE; 411 return 0;
376 412
377free_card: 413free_card:
378 if (!oldcard) 414 if (!oldcard)
379 mmc_remove_card(card); 415 mmc_remove_card(card);
380err: 416err:
381 417
382 return MMC_ERR_FAILED; 418 return err;
383} 419}
384 420
385/* 421/*
@@ -413,7 +449,7 @@ static void mmc_detect(struct mmc_host *host)
413 449
414 mmc_release_host(host); 450 mmc_release_host(host);
415 451
416 if (err != MMC_ERR_NONE) { 452 if (err) {
417 mmc_remove(host); 453 mmc_remove(host);
418 454
419 mmc_claim_host(host); 455 mmc_claim_host(host);
@@ -480,7 +516,8 @@ static void mmc_suspend(struct mmc_host *host)
480 BUG_ON(!host->card); 516 BUG_ON(!host->card);
481 517
482 mmc_claim_host(host); 518 mmc_claim_host(host);
483 mmc_deselect_cards(host); 519 if (!mmc_host_is_spi(host))
520 mmc_deselect_cards(host);
484 host->card->state &= ~MMC_STATE_HIGHSPEED; 521 host->card->state &= ~MMC_STATE_HIGHSPEED;
485 mmc_release_host(host); 522 mmc_release_host(host);
486} 523}
@@ -502,7 +539,7 @@ static void mmc_resume(struct mmc_host *host)
502 err = mmc_init_card(host, host->ocr, host->card); 539 err = mmc_init_card(host, host->ocr, host->card);
503 mmc_release_host(host); 540 mmc_release_host(host);
504 541
505 if (err != MMC_ERR_NONE) { 542 if (err) {
506 mmc_remove(host); 543 mmc_remove(host);
507 544
508 mmc_claim_host(host); 545 mmc_claim_host(host);
@@ -536,11 +573,20 @@ int mmc_attach_mmc(struct mmc_host *host, u32 ocr)
536 int err; 573 int err;
537 574
538 BUG_ON(!host); 575 BUG_ON(!host);
539 BUG_ON(!host->claimed); 576 WARN_ON(!host->claimed);
540 577
541 mmc_attach_bus(host, &mmc_ops); 578 mmc_attach_bus(host, &mmc_ops);
542 579
543 /* 580 /*
581 * We need to get OCR a different way for SPI.
582 */
583 if (mmc_host_is_spi(host)) {
584 err = mmc_spi_read_ocr(host, 1, &ocr);
585 if (err)
586 goto err;
587 }
588
589 /*
544 * Sanity check the voltages that the card claims to 590 * Sanity check the voltages that the card claims to
545 * support. 591 * support.
546 */ 592 */
@@ -565,7 +611,7 @@ int mmc_attach_mmc(struct mmc_host *host, u32 ocr)
565 * Detect and init the card. 611 * Detect and init the card.
566 */ 612 */
567 err = mmc_init_card(host, host->ocr, NULL); 613 err = mmc_init_card(host, host->ocr, NULL);
568 if (err != MMC_ERR_NONE) 614 if (err)
569 goto err; 615 goto err;
570 616
571 mmc_release_host(host); 617 mmc_release_host(host);
@@ -587,6 +633,6 @@ err:
587 printk(KERN_ERR "%s: error %d whilst initialising MMC card\n", 633 printk(KERN_ERR "%s: error %d whilst initialising MMC card\n",
588 mmc_hostname(host), err); 634 mmc_hostname(host), err);
589 635
590 return 0; 636 return err;
591} 637}
592 638
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 913e75f00843..bf4bc6adcfef 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -40,10 +40,10 @@ static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card)
40 } 40 }
41 41
42 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES); 42 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
43 if (err != MMC_ERR_NONE) 43 if (err)
44 return err; 44 return err;
45 45
46 return MMC_ERR_NONE; 46 return 0;
47} 47}
48 48
49int mmc_select_card(struct mmc_card *card) 49int mmc_select_card(struct mmc_card *card)
@@ -63,23 +63,36 @@ int mmc_go_idle(struct mmc_host *host)
63 int err; 63 int err;
64 struct mmc_command cmd; 64 struct mmc_command cmd;
65 65
66 mmc_set_chip_select(host, MMC_CS_HIGH); 66 /*
67 67 * Non-SPI hosts need to prevent chipselect going active during
68 mmc_delay(1); 68 * GO_IDLE; that would put chips into SPI mode. Remind them of
69 * that in case of hardware that won't pull up DAT3/nCS otherwise.
70 *
71 * SPI hosts ignore ios.chip_select; it's managed according to
72 * rules that must accomodate non-MMC slaves which this layer
73 * won't even know about.
74 */
75 if (!mmc_host_is_spi(host)) {
76 mmc_set_chip_select(host, MMC_CS_HIGH);
77 mmc_delay(1);
78 }
69 79
70 memset(&cmd, 0, sizeof(struct mmc_command)); 80 memset(&cmd, 0, sizeof(struct mmc_command));
71 81
72 cmd.opcode = MMC_GO_IDLE_STATE; 82 cmd.opcode = MMC_GO_IDLE_STATE;
73 cmd.arg = 0; 83 cmd.arg = 0;
74 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC; 84 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_NONE | MMC_CMD_BC;
75 85
76 err = mmc_wait_for_cmd(host, &cmd, 0); 86 err = mmc_wait_for_cmd(host, &cmd, 0);
77 87
78 mmc_delay(1); 88 mmc_delay(1);
79 89
80 mmc_set_chip_select(host, MMC_CS_DONTCARE); 90 if (!mmc_host_is_spi(host)) {
91 mmc_set_chip_select(host, MMC_CS_DONTCARE);
92 mmc_delay(1);
93 }
81 94
82 mmc_delay(1); 95 host->use_spi_crc = 0;
83 96
84 return err; 97 return err;
85} 98}
@@ -94,23 +107,33 @@ int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
94 memset(&cmd, 0, sizeof(struct mmc_command)); 107 memset(&cmd, 0, sizeof(struct mmc_command));
95 108
96 cmd.opcode = MMC_SEND_OP_COND; 109 cmd.opcode = MMC_SEND_OP_COND;
97 cmd.arg = ocr; 110 cmd.arg = mmc_host_is_spi(host) ? 0 : ocr;
98 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 111 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R3 | MMC_CMD_BCR;
99 112
100 for (i = 100; i; i--) { 113 for (i = 100; i; i--) {
101 err = mmc_wait_for_cmd(host, &cmd, 0); 114 err = mmc_wait_for_cmd(host, &cmd, 0);
102 if (err != MMC_ERR_NONE) 115 if (err)
103 break; 116 break;
104 117
105 if (cmd.resp[0] & MMC_CARD_BUSY || ocr == 0) 118 /* if we're just probing, do a single pass */
119 if (ocr == 0)
106 break; 120 break;
107 121
108 err = MMC_ERR_TIMEOUT; 122 /* otherwise wait until reset completes */
123 if (mmc_host_is_spi(host)) {
124 if (!(cmd.resp[0] & R1_SPI_IDLE))
125 break;
126 } else {
127 if (cmd.resp[0] & MMC_CARD_BUSY)
128 break;
129 }
130
131 err = -ETIMEDOUT;
109 132
110 mmc_delay(10); 133 mmc_delay(10);
111 } 134 }
112 135
113 if (rocr) 136 if (rocr && !mmc_host_is_spi(host))
114 *rocr = cmd.resp[0]; 137 *rocr = cmd.resp[0];
115 138
116 return err; 139 return err;
@@ -131,12 +154,12 @@ int mmc_all_send_cid(struct mmc_host *host, u32 *cid)
131 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR; 154 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
132 155
133 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES); 156 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
134 if (err != MMC_ERR_NONE) 157 if (err)
135 return err; 158 return err;
136 159
137 memcpy(cid, cmd.resp, sizeof(u32) * 4); 160 memcpy(cid, cmd.resp, sizeof(u32) * 4);
138 161
139 return MMC_ERR_NONE; 162 return 0;
140} 163}
141 164
142int mmc_set_relative_addr(struct mmc_card *card) 165int mmc_set_relative_addr(struct mmc_card *card)
@@ -154,46 +177,52 @@ int mmc_set_relative_addr(struct mmc_card *card)
154 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 177 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
155 178
156 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); 179 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES);
157 if (err != MMC_ERR_NONE) 180 if (err)
158 return err; 181 return err;
159 182
160 return MMC_ERR_NONE; 183 return 0;
161} 184}
162 185
163int mmc_send_csd(struct mmc_card *card, u32 *csd) 186static int
187mmc_send_cxd_native(struct mmc_host *host, u32 arg, u32 *cxd, int opcode)
164{ 188{
165 int err; 189 int err;
166 struct mmc_command cmd; 190 struct mmc_command cmd;
167 191
168 BUG_ON(!card); 192 BUG_ON(!host);
169 BUG_ON(!card->host); 193 BUG_ON(!cxd);
170 BUG_ON(!csd);
171 194
172 memset(&cmd, 0, sizeof(struct mmc_command)); 195 memset(&cmd, 0, sizeof(struct mmc_command));
173 196
174 cmd.opcode = MMC_SEND_CSD; 197 cmd.opcode = opcode;
175 cmd.arg = card->rca << 16; 198 cmd.arg = arg;
176 cmd.flags = MMC_RSP_R2 | MMC_CMD_AC; 199 cmd.flags = MMC_RSP_R2 | MMC_CMD_AC;
177 200
178 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); 201 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
179 if (err != MMC_ERR_NONE) 202 if (err)
180 return err; 203 return err;
181 204
182 memcpy(csd, cmd.resp, sizeof(u32) * 4); 205 memcpy(cxd, cmd.resp, sizeof(u32) * 4);
183 206
184 return MMC_ERR_NONE; 207 return 0;
185} 208}
186 209
187int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd) 210static int
211mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
212 u32 opcode, void *buf, unsigned len)
188{ 213{
189 struct mmc_request mrq; 214 struct mmc_request mrq;
190 struct mmc_command cmd; 215 struct mmc_command cmd;
191 struct mmc_data data; 216 struct mmc_data data;
192 struct scatterlist sg; 217 struct scatterlist sg;
218 void *data_buf;
193 219
194 BUG_ON(!card); 220 /* dma onto stack is unsafe/nonportable, but callers to this
195 BUG_ON(!card->host); 221 * routine normally provide temporary on-stack buffers ...
196 BUG_ON(!ext_csd); 222 */
223 data_buf = kmalloc(len, GFP_KERNEL);
224 if (data_buf == NULL)
225 return -ENOMEM;
197 226
198 memset(&mrq, 0, sizeof(struct mmc_request)); 227 memset(&mrq, 0, sizeof(struct mmc_request));
199 memset(&cmd, 0, sizeof(struct mmc_command)); 228 memset(&cmd, 0, sizeof(struct mmc_command));
@@ -202,28 +231,99 @@ int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd)
202 mrq.cmd = &cmd; 231 mrq.cmd = &cmd;
203 mrq.data = &data; 232 mrq.data = &data;
204 233
205 cmd.opcode = MMC_SEND_EXT_CSD; 234 cmd.opcode = opcode;
206 cmd.arg = 0; 235 cmd.arg = 0;
207 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
208 236
209 data.blksz = 512; 237 /* NOTE HACK: the MMC_RSP_SPI_R1 is always correct here, but we
238 * rely on callers to never use this with "native" calls for reading
239 * CSD or CID. Native versions of those commands use the R2 type,
240 * not R1 plus a data block.
241 */
242 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
243
244 data.blksz = len;
210 data.blocks = 1; 245 data.blocks = 1;
211 data.flags = MMC_DATA_READ; 246 data.flags = MMC_DATA_READ;
212 data.sg = &sg; 247 data.sg = &sg;
213 data.sg_len = 1; 248 data.sg_len = 1;
214 249
215 sg_init_one(&sg, ext_csd, 512); 250 sg_init_one(&sg, data_buf, len);
216 251
217 mmc_set_data_timeout(&data, card, 0); 252 if (card)
253 mmc_set_data_timeout(&data, card);
218 254
219 mmc_wait_for_req(card->host, &mrq); 255 mmc_wait_for_req(host, &mrq);
220 256
221 if (cmd.error != MMC_ERR_NONE) 257 memcpy(buf, data_buf, len);
258 kfree(data_buf);
259
260 if (cmd.error)
222 return cmd.error; 261 return cmd.error;
223 if (data.error != MMC_ERR_NONE) 262 if (data.error)
224 return data.error; 263 return data.error;
225 264
226 return MMC_ERR_NONE; 265 return 0;
266}
267
268int mmc_send_csd(struct mmc_card *card, u32 *csd)
269{
270 if (!mmc_host_is_spi(card->host))
271 return mmc_send_cxd_native(card->host, card->rca << 16,
272 csd, MMC_SEND_CSD);
273
274 return mmc_send_cxd_data(card, card->host, MMC_SEND_CSD, csd, 16);
275}
276
277int mmc_send_cid(struct mmc_host *host, u32 *cid)
278{
279 if (!mmc_host_is_spi(host)) {
280 if (!host->card)
281 return -EINVAL;
282 return mmc_send_cxd_native(host, host->card->rca << 16,
283 cid, MMC_SEND_CID);
284 }
285
286 return mmc_send_cxd_data(NULL, host, MMC_SEND_CID, cid, 16);
287}
288
289int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd)
290{
291 return mmc_send_cxd_data(card, card->host, MMC_SEND_EXT_CSD,
292 ext_csd, 512);
293}
294
295int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp)
296{
297 struct mmc_command cmd;
298 int err;
299
300 memset(&cmd, 0, sizeof(struct mmc_command));
301
302 cmd.opcode = MMC_SPI_READ_OCR;
303 cmd.arg = highcap ? (1 << 30) : 0;
304 cmd.flags = MMC_RSP_SPI_R3;
305
306 err = mmc_wait_for_cmd(host, &cmd, 0);
307
308 *ocrp = cmd.resp[1];
309 return err;
310}
311
312int mmc_spi_set_crc(struct mmc_host *host, int use_crc)
313{
314 struct mmc_command cmd;
315 int err;
316
317 memset(&cmd, 0, sizeof(struct mmc_command));
318
319 cmd.opcode = MMC_SPI_CRC_ON_OFF;
320 cmd.flags = MMC_RSP_SPI_R1;
321 cmd.arg = use_crc;
322
323 err = mmc_wait_for_cmd(host, &cmd, 0);
324 if (!err)
325 host->use_spi_crc = use_crc;
326 return err;
227} 327}
228 328
229int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value) 329int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value)
@@ -241,13 +341,13 @@ int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value)
241 (index << 16) | 341 (index << 16) |
242 (value << 8) | 342 (value << 8) |
243 set; 343 set;
244 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC; 344 cmd.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
245 345
246 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); 346 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES);
247 if (err != MMC_ERR_NONE) 347 if (err)
248 return err; 348 return err;
249 349
250 return MMC_ERR_NONE; 350 return 0;
251} 351}
252 352
253int mmc_send_status(struct mmc_card *card, u32 *status) 353int mmc_send_status(struct mmc_card *card, u32 *status)
@@ -261,16 +361,20 @@ int mmc_send_status(struct mmc_card *card, u32 *status)
261 memset(&cmd, 0, sizeof(struct mmc_command)); 361 memset(&cmd, 0, sizeof(struct mmc_command));
262 362
263 cmd.opcode = MMC_SEND_STATUS; 363 cmd.opcode = MMC_SEND_STATUS;
264 cmd.arg = card->rca << 16; 364 if (!mmc_host_is_spi(card->host))
265 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 365 cmd.arg = card->rca << 16;
366 cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC;
266 367
267 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); 368 err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES);
268 if (err != MMC_ERR_NONE) 369 if (err)
269 return err; 370 return err;
270 371
372 /* NOTE: callers are required to understand the difference
373 * between "native" and SPI format status words!
374 */
271 if (status) 375 if (status)
272 *status = cmd.resp[0]; 376 *status = cmd.resp[0];
273 377
274 return MMC_ERR_NONE; 378 return 0;
275} 379}
276 380
diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h
index 76d09a93c5d6..17854bf7cf0d 100644
--- a/drivers/mmc/core/mmc_ops.h
+++ b/drivers/mmc/core/mmc_ops.h
@@ -22,6 +22,9 @@ int mmc_send_csd(struct mmc_card *card, u32 *csd);
22int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd); 22int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd);
23int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value); 23int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value);
24int mmc_send_status(struct mmc_card *card, u32 *status); 24int mmc_send_status(struct mmc_card *card, u32 *status);
25int mmc_send_cid(struct mmc_host *host, u32 *cid);
26int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp);
27int mmc_spi_set_crc(struct mmc_host *host, int use_crc);
25 28
26#endif 29#endif
27 30
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 1edc62b1e5c6..d1c1e0f592f1 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -166,8 +166,6 @@ static int mmc_decode_scr(struct mmc_card *card)
166 unsigned int scr_struct; 166 unsigned int scr_struct;
167 u32 resp[4]; 167 u32 resp[4];
168 168
169 BUG_ON(!mmc_card_sd(card));
170
171 resp[3] = card->raw_scr[1]; 169 resp[3] = card->raw_scr[1];
172 resp[2] = card->raw_scr[0]; 170 resp[2] = card->raw_scr[0];
173 171
@@ -193,30 +191,38 @@ static int mmc_read_switch(struct mmc_card *card)
193 u8 *status; 191 u8 *status;
194 192
195 if (card->scr.sda_vsn < SCR_SPEC_VER_1) 193 if (card->scr.sda_vsn < SCR_SPEC_VER_1)
196 return MMC_ERR_NONE; 194 return 0;
197 195
198 if (!(card->csd.cmdclass & CCC_SWITCH)) { 196 if (!(card->csd.cmdclass & CCC_SWITCH)) {
199 printk(KERN_WARNING "%s: card lacks mandatory switch " 197 printk(KERN_WARNING "%s: card lacks mandatory switch "
200 "function, performance might suffer.\n", 198 "function, performance might suffer.\n",
201 mmc_hostname(card->host)); 199 mmc_hostname(card->host));
202 return MMC_ERR_NONE; 200 return 0;
203 } 201 }
204 202
205 err = MMC_ERR_FAILED; 203 err = -EIO;
206 204
207 status = kmalloc(64, GFP_KERNEL); 205 status = kmalloc(64, GFP_KERNEL);
208 if (!status) { 206 if (!status) {
209 printk(KERN_ERR "%s: could not allocate a buffer for " 207 printk(KERN_ERR "%s: could not allocate a buffer for "
210 "switch capabilities.\n", mmc_hostname(card->host)); 208 "switch capabilities.\n", mmc_hostname(card->host));
211 return err; 209 return -ENOMEM;
212 } 210 }
213 211
214 err = mmc_sd_switch(card, 0, 0, 1, status); 212 err = mmc_sd_switch(card, 0, 0, 1, status);
215 if (err != MMC_ERR_NONE) { 213 if (err) {
214 /*
215 * We all hosts that cannot perform the command
216 * to fail more gracefully
217 */
218 if (err != -EINVAL)
219 goto out;
220
216 printk(KERN_WARNING "%s: problem reading switch " 221 printk(KERN_WARNING "%s: problem reading switch "
217 "capabilities, performance might suffer.\n", 222 "capabilities, performance might suffer.\n",
218 mmc_hostname(card->host)); 223 mmc_hostname(card->host));
219 err = MMC_ERR_NONE; 224 err = 0;
225
220 goto out; 226 goto out;
221 } 227 }
222 228
@@ -238,28 +244,28 @@ static int mmc_switch_hs(struct mmc_card *card)
238 u8 *status; 244 u8 *status;
239 245
240 if (card->scr.sda_vsn < SCR_SPEC_VER_1) 246 if (card->scr.sda_vsn < SCR_SPEC_VER_1)
241 return MMC_ERR_NONE; 247 return 0;
242 248
243 if (!(card->csd.cmdclass & CCC_SWITCH)) 249 if (!(card->csd.cmdclass & CCC_SWITCH))
244 return MMC_ERR_NONE; 250 return 0;
245 251
246 if (!(card->host->caps & MMC_CAP_SD_HIGHSPEED)) 252 if (!(card->host->caps & MMC_CAP_SD_HIGHSPEED))
247 return MMC_ERR_NONE; 253 return 0;
248 254
249 if (card->sw_caps.hs_max_dtr == 0) 255 if (card->sw_caps.hs_max_dtr == 0)
250 return MMC_ERR_NONE; 256 return 0;
251 257
252 err = MMC_ERR_FAILED; 258 err = -EIO;
253 259
254 status = kmalloc(64, GFP_KERNEL); 260 status = kmalloc(64, GFP_KERNEL);
255 if (!status) { 261 if (!status) {
256 printk(KERN_ERR "%s: could not allocate a buffer for " 262 printk(KERN_ERR "%s: could not allocate a buffer for "
257 "switch capabilities.\n", mmc_hostname(card->host)); 263 "switch capabilities.\n", mmc_hostname(card->host));
258 return err; 264 return -ENOMEM;
259 } 265 }
260 266
261 err = mmc_sd_switch(card, 1, 0, 1, status); 267 err = mmc_sd_switch(card, 1, 0, 1, status);
262 if (err != MMC_ERR_NONE) 268 if (err)
263 goto out; 269 goto out;
264 270
265 if ((status[16] & 0xF) != 1) { 271 if ((status[16] & 0xF) != 1) {
@@ -292,7 +298,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
292 unsigned int max_dtr; 298 unsigned int max_dtr;
293 299
294 BUG_ON(!host); 300 BUG_ON(!host);
295 BUG_ON(!host->claimed); 301 WARN_ON(!host->claimed);
296 302
297 /* 303 /*
298 * Since we're changing the OCR value, we seem to 304 * Since we're changing the OCR value, we seem to
@@ -309,23 +315,37 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
309 * block-addressed SDHC cards. 315 * block-addressed SDHC cards.
310 */ 316 */
311 err = mmc_send_if_cond(host, ocr); 317 err = mmc_send_if_cond(host, ocr);
312 if (err == MMC_ERR_NONE) 318 if (!err)
313 ocr |= 1 << 30; 319 ocr |= 1 << 30;
314 320
315 err = mmc_send_app_op_cond(host, ocr, NULL); 321 err = mmc_send_app_op_cond(host, ocr, NULL);
316 if (err != MMC_ERR_NONE) 322 if (err)
317 goto err; 323 goto err;
318 324
319 /* 325 /*
326 * For SPI, enable CRC as appropriate.
327 */
328 if (mmc_host_is_spi(host)) {
329 err = mmc_spi_set_crc(host, use_spi_crc);
330 if (err)
331 goto err;
332 }
333
334 /*
320 * Fetch CID from card. 335 * Fetch CID from card.
321 */ 336 */
322 err = mmc_all_send_cid(host, cid); 337 if (mmc_host_is_spi(host))
323 if (err != MMC_ERR_NONE) 338 err = mmc_send_cid(host, cid);
339 else
340 err = mmc_all_send_cid(host, cid);
341 if (err)
324 goto err; 342 goto err;
325 343
326 if (oldcard) { 344 if (oldcard) {
327 if (memcmp(cid, oldcard->raw_cid, sizeof(cid)) != 0) 345 if (memcmp(cid, oldcard->raw_cid, sizeof(cid)) != 0) {
346 err = -ENOENT;
328 goto err; 347 goto err;
348 }
329 349
330 card = oldcard; 350 card = oldcard;
331 } else { 351 } else {
@@ -333,32 +353,36 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
333 * Allocate card structure. 353 * Allocate card structure.
334 */ 354 */
335 card = mmc_alloc_card(host); 355 card = mmc_alloc_card(host);
336 if (IS_ERR(card)) 356 if (IS_ERR(card)) {
357 err = PTR_ERR(card);
337 goto err; 358 goto err;
359 }
338 360
339 card->type = MMC_TYPE_SD; 361 card->type = MMC_TYPE_SD;
340 memcpy(card->raw_cid, cid, sizeof(card->raw_cid)); 362 memcpy(card->raw_cid, cid, sizeof(card->raw_cid));
341 } 363 }
342 364
343 /* 365 /*
344 * Set card RCA. 366 * For native busses: get card RCA and quit open drain mode.
345 */ 367 */
346 err = mmc_send_relative_addr(host, &card->rca); 368 if (!mmc_host_is_spi(host)) {
347 if (err != MMC_ERR_NONE) 369 err = mmc_send_relative_addr(host, &card->rca);
348 goto free_card; 370 if (err)
371 goto free_card;
349 372
350 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL); 373 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
374 }
351 375
352 if (!oldcard) { 376 if (!oldcard) {
353 /* 377 /*
354 * Fetch CSD from card. 378 * Fetch CSD from card.
355 */ 379 */
356 err = mmc_send_csd(card, card->raw_csd); 380 err = mmc_send_csd(card, card->raw_csd);
357 if (err != MMC_ERR_NONE) 381 if (err)
358 goto free_card; 382 goto free_card;
359 383
360 err = mmc_decode_csd(card); 384 err = mmc_decode_csd(card);
361 if (err < 0) 385 if (err)
362 goto free_card; 386 goto free_card;
363 387
364 mmc_decode_cid(card); 388 mmc_decode_cid(card);
@@ -367,16 +391,18 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
367 /* 391 /*
368 * Select card, as all following commands rely on that. 392 * Select card, as all following commands rely on that.
369 */ 393 */
370 err = mmc_select_card(card); 394 if (!mmc_host_is_spi(host)) {
371 if (err != MMC_ERR_NONE) 395 err = mmc_select_card(card);
372 goto free_card; 396 if (err)
397 goto free_card;
398 }
373 399
374 if (!oldcard) { 400 if (!oldcard) {
375 /* 401 /*
376 * Fetch SCR from card. 402 * Fetch SCR from card.
377 */ 403 */
378 err = mmc_app_send_scr(card, card->raw_scr); 404 err = mmc_app_send_scr(card, card->raw_scr);
379 if (err != MMC_ERR_NONE) 405 if (err)
380 goto free_card; 406 goto free_card;
381 407
382 err = mmc_decode_scr(card); 408 err = mmc_decode_scr(card);
@@ -387,7 +413,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
387 * Fetch switch information from card. 413 * Fetch switch information from card.
388 */ 414 */
389 err = mmc_read_switch(card); 415 err = mmc_read_switch(card);
390 if (err != MMC_ERR_NONE) 416 if (err)
391 goto free_card; 417 goto free_card;
392 } 418 }
393 419
@@ -395,7 +421,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
395 * Attempt to change to high-speed (if supported) 421 * Attempt to change to high-speed (if supported)
396 */ 422 */
397 err = mmc_switch_hs(card); 423 err = mmc_switch_hs(card);
398 if (err != MMC_ERR_NONE) 424 if (err)
399 goto free_card; 425 goto free_card;
400 426
401 /* 427 /*
@@ -418,7 +444,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
418 if ((host->caps & MMC_CAP_4_BIT_DATA) && 444 if ((host->caps & MMC_CAP_4_BIT_DATA) &&
419 (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) { 445 (card->scr.bus_widths & SD_SCR_BUS_WIDTH_4)) {
420 err = mmc_app_set_bus_width(card, MMC_BUS_WIDTH_4); 446 err = mmc_app_set_bus_width(card, MMC_BUS_WIDTH_4);
421 if (err != MMC_ERR_NONE) 447 if (err)
422 goto free_card; 448 goto free_card;
423 449
424 mmc_set_bus_width(host, MMC_BUS_WIDTH_4); 450 mmc_set_bus_width(host, MMC_BUS_WIDTH_4);
@@ -442,14 +468,14 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
442 if (!oldcard) 468 if (!oldcard)
443 host->card = card; 469 host->card = card;
444 470
445 return MMC_ERR_NONE; 471 return 0;
446 472
447free_card: 473free_card:
448 if (!oldcard) 474 if (!oldcard)
449 mmc_remove_card(card); 475 mmc_remove_card(card);
450err: 476err:
451 477
452 return MMC_ERR_FAILED; 478 return err;
453} 479}
454 480
455/* 481/*
@@ -483,7 +509,7 @@ static void mmc_sd_detect(struct mmc_host *host)
483 509
484 mmc_release_host(host); 510 mmc_release_host(host);
485 511
486 if (err != MMC_ERR_NONE) { 512 if (err) {
487 mmc_sd_remove(host); 513 mmc_sd_remove(host);
488 514
489 mmc_claim_host(host); 515 mmc_claim_host(host);
@@ -552,7 +578,8 @@ static void mmc_sd_suspend(struct mmc_host *host)
552 BUG_ON(!host->card); 578 BUG_ON(!host->card);
553 579
554 mmc_claim_host(host); 580 mmc_claim_host(host);
555 mmc_deselect_cards(host); 581 if (!mmc_host_is_spi(host))
582 mmc_deselect_cards(host);
556 host->card->state &= ~MMC_STATE_HIGHSPEED; 583 host->card->state &= ~MMC_STATE_HIGHSPEED;
557 mmc_release_host(host); 584 mmc_release_host(host);
558} 585}
@@ -574,7 +601,7 @@ static void mmc_sd_resume(struct mmc_host *host)
574 err = mmc_sd_init_card(host, host->ocr, host->card); 601 err = mmc_sd_init_card(host, host->ocr, host->card);
575 mmc_release_host(host); 602 mmc_release_host(host);
576 603
577 if (err != MMC_ERR_NONE) { 604 if (err) {
578 mmc_sd_remove(host); 605 mmc_sd_remove(host);
579 606
580 mmc_claim_host(host); 607 mmc_claim_host(host);
@@ -608,11 +635,22 @@ int mmc_attach_sd(struct mmc_host *host, u32 ocr)
608 int err; 635 int err;
609 636
610 BUG_ON(!host); 637 BUG_ON(!host);
611 BUG_ON(!host->claimed); 638 WARN_ON(!host->claimed);
612 639
613 mmc_attach_bus(host, &mmc_sd_ops); 640 mmc_attach_bus(host, &mmc_sd_ops);
614 641
615 /* 642 /*
643 * We need to get OCR a different way for SPI.
644 */
645 if (mmc_host_is_spi(host)) {
646 mmc_go_idle(host);
647
648 err = mmc_spi_read_ocr(host, 0, &ocr);
649 if (err)
650 goto err;
651 }
652
653 /*
616 * Sanity check the voltages that the card claims to 654 * Sanity check the voltages that the card claims to
617 * support. 655 * support.
618 */ 656 */
@@ -644,7 +682,7 @@ int mmc_attach_sd(struct mmc_host *host, u32 ocr)
644 * Detect and init the card. 682 * Detect and init the card.
645 */ 683 */
646 err = mmc_sd_init_card(host, host->ocr, NULL); 684 err = mmc_sd_init_card(host, host->ocr, NULL);
647 if (err != MMC_ERR_NONE) 685 if (err)
648 goto err; 686 goto err;
649 687
650 mmc_release_host(host); 688 mmc_release_host(host);
@@ -666,6 +704,6 @@ err:
666 printk(KERN_ERR "%s: error %d whilst initialising SD card\n", 704 printk(KERN_ERR "%s: error %d whilst initialising SD card\n",
667 mmc_hostname(host), err); 705 mmc_hostname(host), err);
668 706
669 return 0; 707 return err;
670} 708}
671 709
diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c
index 342f340ebc25..ee4029a24efd 100644
--- a/drivers/mmc/core/sd_ops.c
+++ b/drivers/mmc/core/sd_ops.c
@@ -33,21 +33,21 @@ static int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card)
33 33
34 if (card) { 34 if (card) {
35 cmd.arg = card->rca << 16; 35 cmd.arg = card->rca << 16;
36 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 36 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC;
37 } else { 37 } else {
38 cmd.arg = 0; 38 cmd.arg = 0;
39 cmd.flags = MMC_RSP_R1 | MMC_CMD_BCR; 39 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_BCR;
40 } 40 }
41 41
42 err = mmc_wait_for_cmd(host, &cmd, 0); 42 err = mmc_wait_for_cmd(host, &cmd, 0);
43 if (err != MMC_ERR_NONE) 43 if (err)
44 return err; 44 return err;
45 45
46 /* Check that card supported application commands */ 46 /* Check that card supported application commands */
47 if (!(cmd.resp[0] & R1_APP_CMD)) 47 if (!mmc_host_is_spi(host) && !(cmd.resp[0] & R1_APP_CMD))
48 return MMC_ERR_FAILED; 48 return -EOPNOTSUPP;
49 49
50 return MMC_ERR_NONE; 50 return 0;
51} 51}
52 52
53/** 53/**
@@ -73,7 +73,7 @@ int mmc_wait_for_app_cmd(struct mmc_host *host, struct mmc_card *card,
73 BUG_ON(!cmd); 73 BUG_ON(!cmd);
74 BUG_ON(retries < 0); 74 BUG_ON(retries < 0);
75 75
76 err = MMC_ERR_INVALID; 76 err = -EIO;
77 77
78 /* 78 /*
79 * We have to resend MMC_APP_CMD for each attempt so 79 * We have to resend MMC_APP_CMD for each attempt so
@@ -83,8 +83,14 @@ int mmc_wait_for_app_cmd(struct mmc_host *host, struct mmc_card *card,
83 memset(&mrq, 0, sizeof(struct mmc_request)); 83 memset(&mrq, 0, sizeof(struct mmc_request));
84 84
85 err = mmc_app_cmd(host, card); 85 err = mmc_app_cmd(host, card);
86 if (err != MMC_ERR_NONE) 86 if (err) {
87 /* no point in retrying; no APP commands allowed */
88 if (mmc_host_is_spi(host)) {
89 if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND)
90 break;
91 }
87 continue; 92 continue;
93 }
88 94
89 memset(&mrq, 0, sizeof(struct mmc_request)); 95 memset(&mrq, 0, sizeof(struct mmc_request));
90 96
@@ -97,8 +103,14 @@ int mmc_wait_for_app_cmd(struct mmc_host *host, struct mmc_card *card,
97 mmc_wait_for_req(host, &mrq); 103 mmc_wait_for_req(host, &mrq);
98 104
99 err = cmd->error; 105 err = cmd->error;
100 if (cmd->error == MMC_ERR_NONE) 106 if (!cmd->error)
101 break; 107 break;
108
109 /* no point in retrying illegal APP commands */
110 if (mmc_host_is_spi(host)) {
111 if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND)
112 break;
113 }
102 } 114 }
103 115
104 return err; 116 return err;
@@ -127,14 +139,14 @@ int mmc_app_set_bus_width(struct mmc_card *card, int width)
127 cmd.arg = SD_BUS_WIDTH_4; 139 cmd.arg = SD_BUS_WIDTH_4;
128 break; 140 break;
129 default: 141 default:
130 return MMC_ERR_INVALID; 142 return -EINVAL;
131 } 143 }
132 144
133 err = mmc_wait_for_app_cmd(card->host, card, &cmd, MMC_CMD_RETRIES); 145 err = mmc_wait_for_app_cmd(card->host, card, &cmd, MMC_CMD_RETRIES);
134 if (err != MMC_ERR_NONE) 146 if (err)
135 return err; 147 return err;
136 148
137 return MMC_ERR_NONE; 149 return 0;
138} 150}
139 151
140int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) 152int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
@@ -147,23 +159,36 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
147 memset(&cmd, 0, sizeof(struct mmc_command)); 159 memset(&cmd, 0, sizeof(struct mmc_command));
148 160
149 cmd.opcode = SD_APP_OP_COND; 161 cmd.opcode = SD_APP_OP_COND;
150 cmd.arg = ocr; 162 if (mmc_host_is_spi(host))
151 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR; 163 cmd.arg = ocr & (1 << 30); /* SPI only defines one bit */
164 else
165 cmd.arg = ocr;
166 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R3 | MMC_CMD_BCR;
152 167
153 for (i = 100; i; i--) { 168 for (i = 100; i; i--) {
154 err = mmc_wait_for_app_cmd(host, NULL, &cmd, MMC_CMD_RETRIES); 169 err = mmc_wait_for_app_cmd(host, NULL, &cmd, MMC_CMD_RETRIES);
155 if (err != MMC_ERR_NONE) 170 if (err)
156 break; 171 break;
157 172
158 if (cmd.resp[0] & MMC_CARD_BUSY || ocr == 0) 173 /* if we're just probing, do a single pass */
174 if (ocr == 0)
159 break; 175 break;
160 176
161 err = MMC_ERR_TIMEOUT; 177 /* otherwise wait until reset completes */
178 if (mmc_host_is_spi(host)) {
179 if (!(cmd.resp[0] & R1_SPI_IDLE))
180 break;
181 } else {
182 if (cmd.resp[0] & MMC_CARD_BUSY)
183 break;
184 }
185
186 err = -ETIMEDOUT;
162 187
163 mmc_delay(10); 188 mmc_delay(10);
164 } 189 }
165 190
166 if (rocr) 191 if (rocr && !mmc_host_is_spi(host))
167 *rocr = cmd.resp[0]; 192 *rocr = cmd.resp[0];
168 193
169 return err; 194 return err;
@@ -174,6 +199,7 @@ int mmc_send_if_cond(struct mmc_host *host, u32 ocr)
174 struct mmc_command cmd; 199 struct mmc_command cmd;
175 int err; 200 int err;
176 static const u8 test_pattern = 0xAA; 201 static const u8 test_pattern = 0xAA;
202 u8 result_pattern;
177 203
178 /* 204 /*
179 * To support SD 2.0 cards, we must always invoke SD_SEND_IF_COND 205 * To support SD 2.0 cards, we must always invoke SD_SEND_IF_COND
@@ -182,16 +208,21 @@ int mmc_send_if_cond(struct mmc_host *host, u32 ocr)
182 */ 208 */
183 cmd.opcode = SD_SEND_IF_COND; 209 cmd.opcode = SD_SEND_IF_COND;
184 cmd.arg = ((ocr & 0xFF8000) != 0) << 8 | test_pattern; 210 cmd.arg = ((ocr & 0xFF8000) != 0) << 8 | test_pattern;
185 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR; 211 cmd.flags = MMC_RSP_SPI_R7 | MMC_RSP_R7 | MMC_CMD_BCR;
186 212
187 err = mmc_wait_for_cmd(host, &cmd, 0); 213 err = mmc_wait_for_cmd(host, &cmd, 0);
188 if (err != MMC_ERR_NONE) 214 if (err)
189 return err; 215 return err;
190 216
191 if ((cmd.resp[0] & 0xFF) != test_pattern) 217 if (mmc_host_is_spi(host))
192 return MMC_ERR_FAILED; 218 result_pattern = cmd.resp[1] & 0xFF;
219 else
220 result_pattern = cmd.resp[0] & 0xFF;
221
222 if (result_pattern != test_pattern)
223 return -EIO;
193 224
194 return MMC_ERR_NONE; 225 return 0;
195} 226}
196 227
197int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca) 228int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca)
@@ -209,12 +240,12 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca)
209 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR; 240 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
210 241
211 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES); 242 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
212 if (err != MMC_ERR_NONE) 243 if (err)
213 return err; 244 return err;
214 245
215 *rca = cmd.resp[0] >> 16; 246 *rca = cmd.resp[0] >> 16;
216 247
217 return MMC_ERR_NONE; 248 return 0;
218} 249}
219 250
220int mmc_app_send_scr(struct mmc_card *card, u32 *scr) 251int mmc_app_send_scr(struct mmc_card *card, u32 *scr)
@@ -229,8 +260,10 @@ int mmc_app_send_scr(struct mmc_card *card, u32 *scr)
229 BUG_ON(!card->host); 260 BUG_ON(!card->host);
230 BUG_ON(!scr); 261 BUG_ON(!scr);
231 262
263 /* NOTE: caller guarantees scr is heap-allocated */
264
232 err = mmc_app_cmd(card->host, card); 265 err = mmc_app_cmd(card->host, card);
233 if (err != MMC_ERR_NONE) 266 if (err)
234 return err; 267 return err;
235 268
236 memset(&mrq, 0, sizeof(struct mmc_request)); 269 memset(&mrq, 0, sizeof(struct mmc_request));
@@ -242,7 +275,7 @@ int mmc_app_send_scr(struct mmc_card *card, u32 *scr)
242 275
243 cmd.opcode = SD_APP_SEND_SCR; 276 cmd.opcode = SD_APP_SEND_SCR;
244 cmd.arg = 0; 277 cmd.arg = 0;
245 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 278 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
246 279
247 data.blksz = 8; 280 data.blksz = 8;
248 data.blocks = 1; 281 data.blocks = 1;
@@ -252,19 +285,19 @@ int mmc_app_send_scr(struct mmc_card *card, u32 *scr)
252 285
253 sg_init_one(&sg, scr, 8); 286 sg_init_one(&sg, scr, 8);
254 287
255 mmc_set_data_timeout(&data, card, 0); 288 mmc_set_data_timeout(&data, card);
256 289
257 mmc_wait_for_req(card->host, &mrq); 290 mmc_wait_for_req(card->host, &mrq);
258 291
259 if (cmd.error != MMC_ERR_NONE) 292 if (cmd.error)
260 return cmd.error; 293 return cmd.error;
261 if (data.error != MMC_ERR_NONE) 294 if (data.error)
262 return data.error; 295 return data.error;
263 296
264 scr[0] = ntohl(scr[0]); 297 scr[0] = ntohl(scr[0]);
265 scr[1] = ntohl(scr[1]); 298 scr[1] = ntohl(scr[1]);
266 299
267 return MMC_ERR_NONE; 300 return 0;
268} 301}
269 302
270int mmc_sd_switch(struct mmc_card *card, int mode, int group, 303int mmc_sd_switch(struct mmc_card *card, int mode, int group,
@@ -278,6 +311,8 @@ int mmc_sd_switch(struct mmc_card *card, int mode, int group,
278 BUG_ON(!card); 311 BUG_ON(!card);
279 BUG_ON(!card->host); 312 BUG_ON(!card->host);
280 313
314 /* NOTE: caller guarantees resp is heap-allocated */
315
281 mode = !!mode; 316 mode = !!mode;
282 value &= 0xF; 317 value &= 0xF;
283 318
@@ -292,7 +327,7 @@ int mmc_sd_switch(struct mmc_card *card, int mode, int group,
292 cmd.arg = mode << 31 | 0x00FFFFFF; 327 cmd.arg = mode << 31 | 0x00FFFFFF;
293 cmd.arg &= ~(0xF << (group * 4)); 328 cmd.arg &= ~(0xF << (group * 4));
294 cmd.arg |= value << (group * 4); 329 cmd.arg |= value << (group * 4);
295 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 330 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
296 331
297 data.blksz = 64; 332 data.blksz = 64;
298 data.blocks = 1; 333 data.blocks = 1;
@@ -302,15 +337,15 @@ int mmc_sd_switch(struct mmc_card *card, int mode, int group,
302 337
303 sg_init_one(&sg, resp, 64); 338 sg_init_one(&sg, resp, 64);
304 339
305 mmc_set_data_timeout(&data, card, 0); 340 mmc_set_data_timeout(&data, card);
306 341
307 mmc_wait_for_req(card->host, &mrq); 342 mmc_wait_for_req(card->host, &mrq);
308 343
309 if (cmd.error != MMC_ERR_NONE) 344 if (cmd.error)
310 return cmd.error; 345 return cmd.error;
311 if (data.error != MMC_ERR_NONE) 346 if (data.error)
312 return data.error; 347 return data.error;
313 348
314 return MMC_ERR_NONE; 349 return 0;
315} 350}
316 351
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
new file mode 100644
index 000000000000..87a50f456efc
--- /dev/null
+++ b/drivers/mmc/core/sdio.c
@@ -0,0 +1,395 @@
1/*
2 * linux/drivers/mmc/sdio.c
3 *
4 * Copyright 2006-2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#include <linux/err.h>
13
14#include <linux/mmc/host.h>
15#include <linux/mmc/card.h>
16#include <linux/mmc/sdio.h>
17#include <linux/mmc/sdio_func.h>
18
19#include "core.h"
20#include "bus.h"
21#include "sdio_bus.h"
22#include "mmc_ops.h"
23#include "sd_ops.h"
24#include "sdio_ops.h"
25#include "sdio_cis.h"
26
27static int sdio_read_fbr(struct sdio_func *func)
28{
29 int ret;
30 unsigned char data;
31
32 ret = mmc_io_rw_direct(func->card, 0, 0,
33 SDIO_FBR_BASE(func->num) + SDIO_FBR_STD_IF, 0, &data);
34 if (ret)
35 goto out;
36
37 data &= 0x0f;
38
39 if (data == 0x0f) {
40 ret = mmc_io_rw_direct(func->card, 0, 0,
41 SDIO_FBR_BASE(func->num) + SDIO_FBR_STD_IF_EXT, 0, &data);
42 if (ret)
43 goto out;
44 }
45
46 func->class = data;
47
48out:
49 return ret;
50}
51
52static int sdio_init_func(struct mmc_card *card, unsigned int fn)
53{
54 int ret;
55 struct sdio_func *func;
56
57 BUG_ON(fn > SDIO_MAX_FUNCS);
58
59 func = sdio_alloc_func(card);
60 if (IS_ERR(func))
61 return PTR_ERR(func);
62
63 func->num = fn;
64
65 ret = sdio_read_fbr(func);
66 if (ret)
67 goto fail;
68
69 ret = sdio_read_func_cis(func);
70 if (ret)
71 goto fail;
72
73 card->sdio_func[fn - 1] = func;
74
75 return 0;
76
77fail:
78 /*
79 * It is okay to remove the function here even though we hold
80 * the host lock as we haven't registered the device yet.
81 */
82 sdio_remove_func(func);
83 return ret;
84}
85
86static int sdio_read_cccr(struct mmc_card *card)
87{
88 int ret;
89 int cccr_vsn;
90 unsigned char data;
91
92 memset(&card->cccr, 0, sizeof(struct sdio_cccr));
93
94 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_CCCR, 0, &data);
95 if (ret)
96 goto out;
97
98 cccr_vsn = data & 0x0f;
99
100 if (cccr_vsn > SDIO_CCCR_REV_1_20) {
101 printk(KERN_ERR "%s: unrecognised CCCR structure version %d\n",
102 mmc_hostname(card->host), cccr_vsn);
103 return -EINVAL;
104 }
105
106 card->cccr.sdio_vsn = (data & 0xf0) >> 4;
107
108 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_CAPS, 0, &data);
109 if (ret)
110 goto out;
111
112 if (data & SDIO_CCCR_CAP_SMB)
113 card->cccr.multi_block = 1;
114 if (data & SDIO_CCCR_CAP_LSC)
115 card->cccr.low_speed = 1;
116 if (data & SDIO_CCCR_CAP_4BLS)
117 card->cccr.wide_bus = 1;
118
119 if (cccr_vsn >= SDIO_CCCR_REV_1_10) {
120 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_POWER, 0, &data);
121 if (ret)
122 goto out;
123
124 if (data & SDIO_POWER_SMPC)
125 card->cccr.high_power = 1;
126 }
127
128 if (cccr_vsn >= SDIO_CCCR_REV_1_20) {
129 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_SPEED, 0, &data);
130 if (ret)
131 goto out;
132
133 if (data & SDIO_SPEED_SHS)
134 card->cccr.high_speed = 1;
135 }
136
137out:
138 return ret;
139}
140
141static int sdio_enable_wide(struct mmc_card *card)
142{
143 int ret;
144 u8 ctrl;
145
146 if (!(card->host->caps & MMC_CAP_4_BIT_DATA))
147 return 0;
148
149 if (card->cccr.low_speed && !card->cccr.wide_bus)
150 return 0;
151
152 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_IF, 0, &ctrl);
153 if (ret)
154 return ret;
155
156 ctrl |= SDIO_BUS_WIDTH_4BIT;
157
158 ret = mmc_io_rw_direct(card, 1, 0, SDIO_CCCR_IF, ctrl, NULL);
159 if (ret)
160 return ret;
161
162 mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
163
164 return 0;
165}
166
167/*
168 * Host is being removed. Free up the current card.
169 */
170static void mmc_sdio_remove(struct mmc_host *host)
171{
172 int i;
173
174 BUG_ON(!host);
175 BUG_ON(!host->card);
176
177 for (i = 0;i < host->card->sdio_funcs;i++) {
178 if (host->card->sdio_func[i]) {
179 sdio_remove_func(host->card->sdio_func[i]);
180 host->card->sdio_func[i] = NULL;
181 }
182 }
183
184 mmc_remove_card(host->card);
185 host->card = NULL;
186}
187
188/*
189 * Card detection callback from host.
190 */
191static void mmc_sdio_detect(struct mmc_host *host)
192{
193 int err;
194
195 BUG_ON(!host);
196 BUG_ON(!host->card);
197
198 mmc_claim_host(host);
199
200 /*
201 * Just check if our card has been removed.
202 */
203 err = mmc_select_card(host->card);
204
205 mmc_release_host(host);
206
207 if (err) {
208 mmc_sdio_remove(host);
209
210 mmc_claim_host(host);
211 mmc_detach_bus(host);
212 mmc_release_host(host);
213 }
214}
215
216
217static const struct mmc_bus_ops mmc_sdio_ops = {
218 .remove = mmc_sdio_remove,
219 .detect = mmc_sdio_detect,
220};
221
222
223/*
224 * Starting point for SDIO card init.
225 */
226int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
227{
228 int err;
229 int i, funcs;
230 struct mmc_card *card;
231
232 BUG_ON(!host);
233 WARN_ON(!host->claimed);
234
235 mmc_attach_bus(host, &mmc_sdio_ops);
236
237 /*
238 * Sanity check the voltages that the card claims to
239 * support.
240 */
241 if (ocr & 0x7F) {
242 printk(KERN_WARNING "%s: card claims to support voltages "
243 "below the defined range. These will be ignored.\n",
244 mmc_hostname(host));
245 ocr &= ~0x7F;
246 }
247
248 if (ocr & MMC_VDD_165_195) {
249 printk(KERN_WARNING "%s: SDIO card claims to support the "
250 "incompletely defined 'low voltage range'. This "
251 "will be ignored.\n", mmc_hostname(host));
252 ocr &= ~MMC_VDD_165_195;
253 }
254
255 host->ocr = mmc_select_voltage(host, ocr);
256
257 /*
258 * Can we support the voltage(s) of the card(s)?
259 */
260 if (!host->ocr) {
261 err = -EINVAL;
262 goto err;
263 }
264
265 /*
266 * Inform the card of the voltage
267 */
268 err = mmc_send_io_op_cond(host, host->ocr, &ocr);
269 if (err)
270 goto err;
271
272 /*
273 * For SPI, enable CRC as appropriate.
274 */
275 if (mmc_host_is_spi(host)) {
276 err = mmc_spi_set_crc(host, use_spi_crc);
277 if (err)
278 goto err;
279 }
280
281 /*
282 * The number of functions on the card is encoded inside
283 * the ocr.
284 */
285 funcs = (ocr & 0x70000000) >> 28;
286
287 /*
288 * Allocate card structure.
289 */
290 card = mmc_alloc_card(host);
291 if (IS_ERR(card)) {
292 err = PTR_ERR(card);
293 goto err;
294 }
295
296 card->type = MMC_TYPE_SDIO;
297 card->sdio_funcs = funcs;
298
299 host->card = card;
300
301 /*
302 * For native busses: set card RCA and quit open drain mode.
303 */
304 if (!mmc_host_is_spi(host)) {
305 err = mmc_send_relative_addr(host, &card->rca);
306 if (err)
307 goto remove;
308
309 mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
310 }
311
312 /*
313 * Select card, as all following commands rely on that.
314 */
315 if (!mmc_host_is_spi(host)) {
316 err = mmc_select_card(card);
317 if (err)
318 goto remove;
319 }
320
321 /*
322 * Read the common registers.
323 */
324 err = sdio_read_cccr(card);
325 if (err)
326 goto remove;
327
328 /*
329 * Read the common CIS tuples.
330 */
331 err = sdio_read_common_cis(card);
332 if (err)
333 goto remove;
334
335 /*
336 * No support for high-speed yet, so just set
337 * the card's maximum speed.
338 */
339 mmc_set_clock(host, card->cis.max_dtr);
340
341 /*
342 * Switch to wider bus (if supported).
343 */
344 err = sdio_enable_wide(card);
345 if (err)
346 goto remove;
347
348 /*
349 * Initialize (but don't add) all present functions.
350 */
351 for (i = 0;i < funcs;i++) {
352 err = sdio_init_func(host->card, i + 1);
353 if (err)
354 goto remove;
355 }
356
357 mmc_release_host(host);
358
359 /*
360 * First add the card to the driver model...
361 */
362 err = mmc_add_card(host->card);
363 if (err)
364 goto remove_added;
365
366 /*
367 * ...then the SDIO functions.
368 */
369 for (i = 0;i < funcs;i++) {
370 err = sdio_add_func(host->card->sdio_func[i]);
371 if (err)
372 goto remove_added;
373 }
374
375 return 0;
376
377
378remove_added:
379 /* Remove without lock if the device has been added. */
380 mmc_sdio_remove(host);
381 mmc_claim_host(host);
382remove:
383 /* And with lock if it hasn't been added. */
384 if (host->card)
385 mmc_sdio_remove(host);
386err:
387 mmc_detach_bus(host);
388 mmc_release_host(host);
389
390 printk(KERN_ERR "%s: error %d whilst initialising SDIO card\n",
391 mmc_hostname(host), err);
392
393 return err;
394}
395
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
new file mode 100644
index 000000000000..0713a8c71e54
--- /dev/null
+++ b/drivers/mmc/core/sdio_bus.c
@@ -0,0 +1,270 @@
1/*
2 * linux/drivers/mmc/core/sdio_bus.c
3 *
4 * Copyright 2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 *
11 * SDIO function driver model
12 */
13
14#include <linux/device.h>
15#include <linux/err.h>
16
17#include <linux/mmc/card.h>
18#include <linux/mmc/sdio_func.h>
19
20#include "sdio_cis.h"
21#include "sdio_bus.h"
22
23#define dev_to_sdio_func(d) container_of(d, struct sdio_func, dev)
24#define to_sdio_driver(d) container_of(d, struct sdio_driver, drv)
25
26/* show configuration fields */
27#define sdio_config_attr(field, format_string) \
28static ssize_t \
29field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
30{ \
31 struct sdio_func *func; \
32 \
33 func = dev_to_sdio_func (dev); \
34 return sprintf (buf, format_string, func->field); \
35}
36
37sdio_config_attr(class, "0x%02x\n");
38sdio_config_attr(vendor, "0x%04x\n");
39sdio_config_attr(device, "0x%04x\n");
40
41static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
42{
43 struct sdio_func *func = dev_to_sdio_func (dev);
44
45 return sprintf(buf, "sdio:c%02Xv%04Xd%04X\n",
46 func->class, func->vendor, func->device);
47}
48
49static struct device_attribute sdio_dev_attrs[] = {
50 __ATTR_RO(class),
51 __ATTR_RO(vendor),
52 __ATTR_RO(device),
53 __ATTR_RO(modalias),
54 __ATTR_NULL,
55};
56
57static const struct sdio_device_id *sdio_match_one(struct sdio_func *func,
58 const struct sdio_device_id *id)
59{
60 if (id->class != (__u8)SDIO_ANY_ID && id->class != func->class)
61 return NULL;
62 if (id->vendor != (__u16)SDIO_ANY_ID && id->vendor != func->vendor)
63 return NULL;
64 if (id->device != (__u16)SDIO_ANY_ID && id->device != func->device)
65 return NULL;
66 return id;
67}
68
69static const struct sdio_device_id *sdio_match_device(struct sdio_func *func,
70 struct sdio_driver *sdrv)
71{
72 const struct sdio_device_id *ids;
73
74 ids = sdrv->id_table;
75
76 if (ids) {
77 while (ids->class || ids->vendor || ids->device) {
78 if (sdio_match_one(func, ids))
79 return ids;
80 ids++;
81 }
82 }
83
84 return NULL;
85}
86
87static int sdio_bus_match(struct device *dev, struct device_driver *drv)
88{
89 struct sdio_func *func = dev_to_sdio_func(dev);
90 struct sdio_driver *sdrv = to_sdio_driver(drv);
91
92 if (sdio_match_device(func, sdrv))
93 return 1;
94
95 return 0;
96}
97
98static int
99sdio_bus_uevent(struct device *dev, char **envp, int num_envp, char *buf,
100 int buf_size)
101{
102 struct sdio_func *func = dev_to_sdio_func(dev);
103 int i = 0, length = 0;
104
105 if (add_uevent_var(envp, num_envp, &i,
106 buf, buf_size, &length,
107 "SDIO_CLASS=%02X", func->class))
108 return -ENOMEM;
109
110 if (add_uevent_var(envp, num_envp, &i,
111 buf, buf_size, &length,
112 "SDIO_ID=%04X:%04X", func->vendor, func->device))
113 return -ENOMEM;
114
115 if (add_uevent_var(envp, num_envp, &i,
116 buf, buf_size, &length,
117 "MODALIAS=sdio:c%02Xv%04Xd%04X",
118 func->class, func->vendor, func->device))
119 return -ENOMEM;
120
121 envp[i] = NULL;
122
123 return 0;
124}
125
126static int sdio_bus_probe(struct device *dev)
127{
128 struct sdio_driver *drv = to_sdio_driver(dev->driver);
129 struct sdio_func *func = dev_to_sdio_func(dev);
130 const struct sdio_device_id *id;
131 int ret;
132
133 id = sdio_match_device(func, drv);
134 if (!id)
135 return -ENODEV;
136
137 /* Set the default block size so the driver is sure it's something
138 * sensible. */
139 sdio_claim_host(func);
140 ret = sdio_set_block_size(func, 0);
141 sdio_release_host(func);
142 if (ret)
143 return ret;
144
145 return drv->probe(func, id);
146}
147
148static int sdio_bus_remove(struct device *dev)
149{
150 struct sdio_driver *drv = to_sdio_driver(dev->driver);
151 struct sdio_func *func = dev_to_sdio_func(dev);
152
153 drv->remove(func);
154
155 if (func->irq_handler) {
156 printk(KERN_WARNING "WARNING: driver %s did not remove "
157 "its interrupt handler!\n", drv->name);
158 sdio_claim_host(func);
159 sdio_release_irq(func);
160 sdio_release_host(func);
161 }
162
163 return 0;
164}
165
166static struct bus_type sdio_bus_type = {
167 .name = "sdio",
168 .dev_attrs = sdio_dev_attrs,
169 .match = sdio_bus_match,
170 .uevent = sdio_bus_uevent,
171 .probe = sdio_bus_probe,
172 .remove = sdio_bus_remove,
173};
174
175int sdio_register_bus(void)
176{
177 return bus_register(&sdio_bus_type);
178}
179
180void sdio_unregister_bus(void)
181{
182 bus_unregister(&sdio_bus_type);
183}
184
185/**
186 * sdio_register_driver - register a function driver
187 * @drv: SDIO function driver
188 */
189int sdio_register_driver(struct sdio_driver *drv)
190{
191 drv->drv.name = drv->name;
192 drv->drv.bus = &sdio_bus_type;
193 return driver_register(&drv->drv);
194}
195EXPORT_SYMBOL_GPL(sdio_register_driver);
196
197/**
198 * sdio_unregister_driver - unregister a function driver
199 * @drv: SDIO function driver
200 */
201void sdio_unregister_driver(struct sdio_driver *drv)
202{
203 drv->drv.bus = &sdio_bus_type;
204 driver_unregister(&drv->drv);
205}
206EXPORT_SYMBOL_GPL(sdio_unregister_driver);
207
208static void sdio_release_func(struct device *dev)
209{
210 struct sdio_func *func = dev_to_sdio_func(dev);
211
212 sdio_free_func_cis(func);
213
214 if (func->info)
215 kfree(func->info);
216
217 kfree(func);
218}
219
220/*
221 * Allocate and initialise a new SDIO function structure.
222 */
223struct sdio_func *sdio_alloc_func(struct mmc_card *card)
224{
225 struct sdio_func *func;
226
227 func = kzalloc(sizeof(struct sdio_func), GFP_KERNEL);
228 if (!func)
229 return ERR_PTR(-ENOMEM);
230
231 func->card = card;
232
233 device_initialize(&func->dev);
234
235 func->dev.parent = &card->dev;
236 func->dev.bus = &sdio_bus_type;
237 func->dev.release = sdio_release_func;
238
239 return func;
240}
241
242/*
243 * Register a new SDIO function with the driver model.
244 */
245int sdio_add_func(struct sdio_func *func)
246{
247 int ret;
248
249 snprintf(func->dev.bus_id, sizeof(func->dev.bus_id),
250 "%s:%d", mmc_card_id(func->card), func->num);
251
252 ret = device_add(&func->dev);
253 if (ret == 0)
254 sdio_func_set_present(func);
255
256 return ret;
257}
258
259/*
260 * Unregister a SDIO function with the driver model, and
261 * (eventually) free it.
262 */
263void sdio_remove_func(struct sdio_func *func)
264{
265 if (sdio_func_present(func))
266 device_del(&func->dev);
267
268 put_device(&func->dev);
269}
270
diff --git a/drivers/mmc/core/sdio_bus.h b/drivers/mmc/core/sdio_bus.h
new file mode 100644
index 000000000000..567a76821ba7
--- /dev/null
+++ b/drivers/mmc/core/sdio_bus.h
@@ -0,0 +1,22 @@
1/*
2 * linux/drivers/mmc/core/sdio_bus.h
3 *
4 * Copyright 2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11#ifndef _MMC_CORE_SDIO_BUS_H
12#define _MMC_CORE_SDIO_BUS_H
13
14struct sdio_func *sdio_alloc_func(struct mmc_card *card);
15int sdio_add_func(struct sdio_func *func);
16void sdio_remove_func(struct sdio_func *func);
17
18int sdio_register_bus(void);
19void sdio_unregister_bus(void);
20
21#endif
22
diff --git a/drivers/mmc/core/sdio_cis.c b/drivers/mmc/core/sdio_cis.c
new file mode 100644
index 000000000000..d5e51b1c7b3f
--- /dev/null
+++ b/drivers/mmc/core/sdio_cis.c
@@ -0,0 +1,346 @@
1/*
2 * linux/drivers/mmc/core/sdio_cis.c
3 *
4 * Author: Nicolas Pitre
5 * Created: June 11, 2007
6 * Copyright: MontaVista Software Inc.
7 *
8 * Copyright 2007 Pierre Ossman
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/kernel.h>
17
18#include <linux/mmc/host.h>
19#include <linux/mmc/card.h>
20#include <linux/mmc/sdio.h>
21#include <linux/mmc/sdio_func.h>
22
23#include "sdio_cis.h"
24#include "sdio_ops.h"
25
26static int cistpl_vers_1(struct mmc_card *card, struct sdio_func *func,
27 const unsigned char *buf, unsigned size)
28{
29 unsigned i, nr_strings;
30 char **buffer, *string;
31
32 buf += 2;
33 size -= 2;
34
35 nr_strings = 0;
36 for (i = 0; i < size; i++) {
37 if (buf[i] == 0xff)
38 break;
39 if (buf[i] == 0)
40 nr_strings++;
41 }
42
43 if (buf[i-1] != '\0') {
44 printk(KERN_WARNING "SDIO: ignoring broken CISTPL_VERS_1\n");
45 return 0;
46 }
47
48 size = i;
49
50 buffer = kzalloc(sizeof(char*) * nr_strings + size, GFP_KERNEL);
51 if (!buffer)
52 return -ENOMEM;
53
54 string = (char*)(buffer + nr_strings);
55
56 for (i = 0; i < nr_strings; i++) {
57 buffer[i] = string;
58 strcpy(string, buf);
59 string += strlen(string) + 1;
60 buf += strlen(buf) + 1;
61 }
62
63 if (func) {
64 func->num_info = nr_strings;
65 func->info = (const char**)buffer;
66 } else {
67 card->num_info = nr_strings;
68 card->info = (const char**)buffer;
69 }
70
71 return 0;
72}
73
74static int cistpl_manfid(struct mmc_card *card, struct sdio_func *func,
75 const unsigned char *buf, unsigned size)
76{
77 unsigned int vendor, device;
78
79 /* TPLMID_MANF */
80 vendor = buf[0] | (buf[1] << 8);
81
82 /* TPLMID_CARD */
83 device = buf[2] | (buf[3] << 8);
84
85 if (func) {
86 func->vendor = vendor;
87 func->device = device;
88 } else {
89 card->cis.vendor = vendor;
90 card->cis.device = device;
91 }
92
93 return 0;
94}
95
96static const unsigned char speed_val[16] =
97 { 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
98static const unsigned int speed_unit[8] =
99 { 10000, 100000, 1000000, 10000000, 0, 0, 0, 0 };
100
101static int cistpl_funce_common(struct mmc_card *card,
102 const unsigned char *buf, unsigned size)
103{
104 if (size < 0x04 || buf[0] != 0)
105 return -EINVAL;
106
107 /* TPLFE_FN0_BLK_SIZE */
108 card->cis.blksize = buf[1] | (buf[2] << 8);
109
110 /* TPLFE_MAX_TRAN_SPEED */
111 card->cis.max_dtr = speed_val[(buf[3] >> 3) & 15] *
112 speed_unit[buf[3] & 7];
113
114 return 0;
115}
116
117static int cistpl_funce_func(struct sdio_func *func,
118 const unsigned char *buf, unsigned size)
119{
120 unsigned vsn;
121 unsigned min_size;
122
123 vsn = func->card->cccr.sdio_vsn;
124 min_size = (vsn == SDIO_SDIO_REV_1_00) ? 28 : 42;
125
126 if (size < min_size || buf[0] != 1)
127 return -EINVAL;
128
129 /* TPLFE_MAX_BLK_SIZE */
130 func->max_blksize = buf[12] | (buf[13] << 8);
131
132 return 0;
133}
134
135static int cistpl_funce(struct mmc_card *card, struct sdio_func *func,
136 const unsigned char *buf, unsigned size)
137{
138 int ret;
139
140 /*
141 * There should be two versions of the CISTPL_FUNCE tuple,
142 * one for the common CIS (function 0) and a version used by
143 * the individual function's CIS (1-7). Yet, the later has a
144 * different length depending on the SDIO spec version.
145 */
146 if (func)
147 ret = cistpl_funce_func(func, buf, size);
148 else
149 ret = cistpl_funce_common(card, buf, size);
150
151 if (ret) {
152 printk(KERN_ERR "%s: bad CISTPL_FUNCE size %u "
153 "type %u\n", mmc_hostname(card->host), size, buf[0]);
154 return ret;
155 }
156
157 return 0;
158}
159
160typedef int (tpl_parse_t)(struct mmc_card *, struct sdio_func *,
161 const unsigned char *, unsigned);
162
163struct cis_tpl {
164 unsigned char code;
165 unsigned char min_size;
166 tpl_parse_t *parse;
167};
168
169static const struct cis_tpl cis_tpl_list[] = {
170 { 0x15, 3, cistpl_vers_1 },
171 { 0x20, 4, cistpl_manfid },
172 { 0x21, 2, /* cistpl_funcid */ },
173 { 0x22, 0, cistpl_funce },
174};
175
176static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
177{
178 int ret;
179 struct sdio_func_tuple *this, **prev;
180 unsigned i, ptr = 0;
181
182 /*
183 * Note that this works for the common CIS (function number 0) as
184 * well as a function's CIS * since SDIO_CCCR_CIS and SDIO_FBR_CIS
185 * have the same offset.
186 */
187 for (i = 0; i < 3; i++) {
188 unsigned char x, fn;
189
190 if (func)
191 fn = func->num;
192 else
193 fn = 0;
194
195 ret = mmc_io_rw_direct(card, 0, 0,
196 SDIO_FBR_BASE(fn) + SDIO_FBR_CIS + i, 0, &x);
197 if (ret)
198 return ret;
199 ptr |= x << (i * 8);
200 }
201
202 if (func)
203 prev = &func->tuples;
204 else
205 prev = &card->tuples;
206
207 BUG_ON(*prev);
208
209 do {
210 unsigned char tpl_code, tpl_link;
211
212 ret = mmc_io_rw_direct(card, 0, 0, ptr++, 0, &tpl_code);
213 if (ret)
214 break;
215
216 /* 0xff means we're done */
217 if (tpl_code == 0xff)
218 break;
219
220 ret = mmc_io_rw_direct(card, 0, 0, ptr++, 0, &tpl_link);
221 if (ret)
222 break;
223
224 this = kmalloc(sizeof(*this) + tpl_link, GFP_KERNEL);
225 if (!this)
226 return -ENOMEM;
227
228 for (i = 0; i < tpl_link; i++) {
229 ret = mmc_io_rw_direct(card, 0, 0,
230 ptr + i, 0, &this->data[i]);
231 if (ret)
232 break;
233 }
234 if (ret) {
235 kfree(this);
236 break;
237 }
238
239 for (i = 0; i < ARRAY_SIZE(cis_tpl_list); i++)
240 if (cis_tpl_list[i].code == tpl_code)
241 break;
242 if (i >= ARRAY_SIZE(cis_tpl_list)) {
243 /* this tuple is unknown to the core */
244 this->next = NULL;
245 this->code = tpl_code;
246 this->size = tpl_link;
247 *prev = this;
248 prev = &this->next;
249 printk(KERN_DEBUG
250 "%s: queuing CIS tuple 0x%02x length %u\n",
251 mmc_hostname(card->host), tpl_code, tpl_link);
252 } else {
253 const struct cis_tpl *tpl = cis_tpl_list + i;
254 if (tpl_link < tpl->min_size) {
255 printk(KERN_ERR
256 "%s: bad CIS tuple 0x%02x (length = %u, expected >= %u)\n",
257 mmc_hostname(card->host),
258 tpl_code, tpl_link, tpl->min_size);
259 ret = -EINVAL;
260 } else if (tpl->parse) {
261 ret = tpl->parse(card, func,
262 this->data, tpl_link);
263 }
264 kfree(this);
265 }
266
267 ptr += tpl_link;
268 } while (!ret);
269
270 /*
271 * Link in all unknown tuples found in the common CIS so that
272 * drivers don't have to go digging in two places.
273 */
274 if (func)
275 *prev = card->tuples;
276
277 return ret;
278}
279
280int sdio_read_common_cis(struct mmc_card *card)
281{
282 return sdio_read_cis(card, NULL);
283}
284
285void sdio_free_common_cis(struct mmc_card *card)
286{
287 struct sdio_func_tuple *tuple, *victim;
288
289 tuple = card->tuples;
290
291 while (tuple) {
292 victim = tuple;
293 tuple = tuple->next;
294 kfree(victim);
295 }
296
297 card->tuples = NULL;
298}
299
300int sdio_read_func_cis(struct sdio_func *func)
301{
302 int ret;
303
304 ret = sdio_read_cis(func->card, func);
305 if (ret)
306 return ret;
307
308 /*
309 * Since we've linked to tuples in the card structure,
310 * we must make sure we have a reference to it.
311 */
312 get_device(&func->card->dev);
313
314 /*
315 * Vendor/device id is optional for function CIS, so
316 * copy it from the card structure as needed.
317 */
318 if (func->vendor == 0) {
319 func->vendor = func->card->cis.vendor;
320 func->device = func->card->cis.device;
321 }
322
323 return 0;
324}
325
326void sdio_free_func_cis(struct sdio_func *func)
327{
328 struct sdio_func_tuple *tuple, *victim;
329
330 tuple = func->tuples;
331
332 while (tuple && tuple != func->card->tuples) {
333 victim = tuple;
334 tuple = tuple->next;
335 kfree(victim);
336 }
337
338 func->tuples = NULL;
339
340 /*
341 * We have now removed the link to the tuples in the
342 * card structure, so remove the reference.
343 */
344 put_device(&func->card->dev);
345}
346
diff --git a/drivers/mmc/core/sdio_cis.h b/drivers/mmc/core/sdio_cis.h
new file mode 100644
index 000000000000..4d903c2e425e
--- /dev/null
+++ b/drivers/mmc/core/sdio_cis.h
@@ -0,0 +1,23 @@
1/*
2 * linux/drivers/mmc/core/sdio_cis.h
3 *
4 * Author: Nicolas Pitre
5 * Created: June 11, 2007
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
12 */
13
14#ifndef _MMC_SDIO_CIS_H
15#define _MMC_SDIO_CIS_H
16
17int sdio_read_common_cis(struct mmc_card *card);
18void sdio_free_common_cis(struct mmc_card *card);
19
20int sdio_read_func_cis(struct sdio_func *func);
21void sdio_free_func_cis(struct sdio_func *func);
22
23#endif
diff --git a/drivers/mmc/core/sdio_io.c b/drivers/mmc/core/sdio_io.c
new file mode 100644
index 000000000000..625b92ce9cef
--- /dev/null
+++ b/drivers/mmc/core/sdio_io.c
@@ -0,0 +1,548 @@
1/*
2 * linux/drivers/mmc/core/sdio_io.c
3 *
4 * Copyright 2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#include <linux/mmc/host.h>
13#include <linux/mmc/card.h>
14#include <linux/mmc/sdio.h>
15#include <linux/mmc/sdio_func.h>
16
17#include "sdio_ops.h"
18
19/**
20 * sdio_claim_host - exclusively claim a bus for a certain SDIO function
21 * @func: SDIO function that will be accessed
22 *
23 * Claim a bus for a set of operations. The SDIO function given
24 * is used to figure out which bus is relevant.
25 */
26void sdio_claim_host(struct sdio_func *func)
27{
28 BUG_ON(!func);
29 BUG_ON(!func->card);
30
31 mmc_claim_host(func->card->host);
32}
33EXPORT_SYMBOL_GPL(sdio_claim_host);
34
35/**
36 * sdio_release_host - release a bus for a certain SDIO function
37 * @func: SDIO function that was accessed
38 *
39 * Release a bus, allowing others to claim the bus for their
40 * operations.
41 */
42void sdio_release_host(struct sdio_func *func)
43{
44 BUG_ON(!func);
45 BUG_ON(!func->card);
46
47 mmc_release_host(func->card->host);
48}
49EXPORT_SYMBOL_GPL(sdio_release_host);
50
51/**
52 * sdio_enable_func - enables a SDIO function for usage
53 * @func: SDIO function to enable
54 *
55 * Powers up and activates a SDIO function so that register
56 * access is possible.
57 */
58int sdio_enable_func(struct sdio_func *func)
59{
60 int ret;
61 unsigned char reg;
62 unsigned long timeout;
63
64 BUG_ON(!func);
65 BUG_ON(!func->card);
66
67 pr_debug("SDIO: Enabling device %s...\n", sdio_func_id(func));
68
69 ret = mmc_io_rw_direct(func->card, 0, 0, SDIO_CCCR_IOEx, 0, &reg);
70 if (ret)
71 goto err;
72
73 reg |= 1 << func->num;
74
75 ret = mmc_io_rw_direct(func->card, 1, 0, SDIO_CCCR_IOEx, reg, NULL);
76 if (ret)
77 goto err;
78
79 /*
80 * FIXME: This should timeout based on information in the CIS,
81 * but we don't have card to parse that yet.
82 */
83 timeout = jiffies + HZ;
84
85 while (1) {
86 ret = mmc_io_rw_direct(func->card, 0, 0, SDIO_CCCR_IORx, 0, &reg);
87 if (ret)
88 goto err;
89 if (reg & (1 << func->num))
90 break;
91 ret = -ETIME;
92 if (time_after(jiffies, timeout))
93 goto err;
94 }
95
96 pr_debug("SDIO: Enabled device %s\n", sdio_func_id(func));
97
98 return 0;
99
100err:
101 pr_debug("SDIO: Failed to enable device %s\n", sdio_func_id(func));
102 return ret;
103}
104EXPORT_SYMBOL_GPL(sdio_enable_func);
105
106/**
107 * sdio_disable_func - disable a SDIO function
108 * @func: SDIO function to disable
109 *
110 * Powers down and deactivates a SDIO function. Register access
111 * to this function will fail until the function is reenabled.
112 */
113int sdio_disable_func(struct sdio_func *func)
114{
115 int ret;
116 unsigned char reg;
117
118 BUG_ON(!func);
119 BUG_ON(!func->card);
120
121 pr_debug("SDIO: Disabling device %s...\n", sdio_func_id(func));
122
123 ret = mmc_io_rw_direct(func->card, 0, 0, SDIO_CCCR_IOEx, 0, &reg);
124 if (ret)
125 goto err;
126
127 reg &= ~(1 << func->num);
128
129 ret = mmc_io_rw_direct(func->card, 1, 0, SDIO_CCCR_IOEx, reg, NULL);
130 if (ret)
131 goto err;
132
133 pr_debug("SDIO: Disabled device %s\n", sdio_func_id(func));
134
135 return 0;
136
137err:
138 pr_debug("SDIO: Failed to disable device %s\n", sdio_func_id(func));
139 return -EIO;
140}
141EXPORT_SYMBOL_GPL(sdio_disable_func);
142
143/**
144 * sdio_set_block_size - set the block size of an SDIO function
145 * @func: SDIO function to change
146 * @blksz: new block size or 0 to use the default.
147 *
148 * The default block size is the largest supported by both the function
149 * and the host, with a maximum of 512 to ensure that arbitrarily sized
150 * data transfer use the optimal (least) number of commands.
151 *
152 * A driver may call this to override the default block size set by the
153 * core. This can be used to set a block size greater than the maximum
154 * that reported by the card; it is the driver's responsibility to ensure
155 * it uses a value that the card supports.
156 *
157 * Returns 0 on success, -EINVAL if the host does not support the
158 * requested block size, or -EIO (etc.) if one of the resultant FBR block
159 * size register writes failed.
160 *
161 */
162int sdio_set_block_size(struct sdio_func *func, unsigned blksz)
163{
164 int ret;
165
166 if (blksz > func->card->host->max_blk_size)
167 return -EINVAL;
168
169 if (blksz == 0) {
170 blksz = min(min(
171 func->max_blksize,
172 func->card->host->max_blk_size),
173 512u);
174 }
175
176 ret = mmc_io_rw_direct(func->card, 1, 0,
177 SDIO_FBR_BASE(func->num) + SDIO_FBR_BLKSIZE,
178 blksz & 0xff, NULL);
179 if (ret)
180 return ret;
181 ret = mmc_io_rw_direct(func->card, 1, 0,
182 SDIO_FBR_BASE(func->num) + SDIO_FBR_BLKSIZE + 1,
183 (blksz >> 8) & 0xff, NULL);
184 if (ret)
185 return ret;
186 func->cur_blksize = blksz;
187 return 0;
188}
189
190EXPORT_SYMBOL_GPL(sdio_set_block_size);
191
192/* Split an arbitrarily sized data transfer into several
193 * IO_RW_EXTENDED commands. */
194static int sdio_io_rw_ext_helper(struct sdio_func *func, int write,
195 unsigned addr, int incr_addr, u8 *buf, unsigned size)
196{
197 unsigned remainder = size;
198 unsigned max_blocks;
199 int ret;
200
201 /* Do the bulk of the transfer using block mode (if supported). */
202 if (func->card->cccr.multi_block) {
203 /* Blocks per command is limited by host count, host transfer
204 * size (we only use a single sg entry) and the maximum for
205 * IO_RW_EXTENDED of 511 blocks. */
206 max_blocks = min(min(
207 func->card->host->max_blk_count,
208 func->card->host->max_seg_size / func->cur_blksize),
209 511u);
210
211 while (remainder > func->cur_blksize) {
212 unsigned blocks;
213
214 blocks = remainder / func->cur_blksize;
215 if (blocks > max_blocks)
216 blocks = max_blocks;
217 size = blocks * func->cur_blksize;
218
219 ret = mmc_io_rw_extended(func->card, write,
220 func->num, addr, incr_addr, buf,
221 blocks, func->cur_blksize);
222 if (ret)
223 return ret;
224
225 remainder -= size;
226 buf += size;
227 if (incr_addr)
228 addr += size;
229 }
230 }
231
232 /* Write the remainder using byte mode. */
233 while (remainder > 0) {
234 size = remainder;
235 if (size > func->cur_blksize)
236 size = func->cur_blksize;
237 if (size > 512)
238 size = 512; /* maximum size for byte mode */
239
240 ret = mmc_io_rw_extended(func->card, write, func->num, addr,
241 incr_addr, buf, 1, size);
242 if (ret)
243 return ret;
244
245 remainder -= size;
246 buf += size;
247 if (incr_addr)
248 addr += size;
249 }
250 return 0;
251}
252
253/**
254 * sdio_readb - read a single byte from a SDIO function
255 * @func: SDIO function to access
256 * @addr: address to read
257 * @err_ret: optional status value from transfer
258 *
259 * Reads a single byte from the address space of a given SDIO
260 * function. If there is a problem reading the address, 0xff
261 * is returned and @err_ret will contain the error code.
262 */
263unsigned char sdio_readb(struct sdio_func *func, unsigned int addr,
264 int *err_ret)
265{
266 int ret;
267 unsigned char val;
268
269 BUG_ON(!func);
270
271 if (err_ret)
272 *err_ret = 0;
273
274 ret = mmc_io_rw_direct(func->card, 0, func->num, addr, 0, &val);
275 if (ret) {
276 if (err_ret)
277 *err_ret = ret;
278 return 0xFF;
279 }
280
281 return val;
282}
283EXPORT_SYMBOL_GPL(sdio_readb);
284
285/**
286 * sdio_writeb - write a single byte to a SDIO function
287 * @func: SDIO function to access
288 * @b: byte to write
289 * @addr: address to write to
290 * @err_ret: optional status value from transfer
291 *
292 * Writes a single byte to the address space of a given SDIO
293 * function. @err_ret will contain the status of the actual
294 * transfer.
295 */
296void sdio_writeb(struct sdio_func *func, unsigned char b, unsigned int addr,
297 int *err_ret)
298{
299 int ret;
300
301 BUG_ON(!func);
302
303 ret = mmc_io_rw_direct(func->card, 1, func->num, addr, b, NULL);
304 if (err_ret)
305 *err_ret = ret;
306}
307EXPORT_SYMBOL_GPL(sdio_writeb);
308
309/**
310 * sdio_memcpy_fromio - read a chunk of memory from a SDIO function
311 * @func: SDIO function to access
312 * @dst: buffer to store the data
313 * @addr: address to begin reading from
314 * @count: number of bytes to read
315 *
316 * Reads from the address space of a given SDIO function. Return
317 * value indicates if the transfer succeeded or not.
318 */
319int sdio_memcpy_fromio(struct sdio_func *func, void *dst,
320 unsigned int addr, int count)
321{
322 return sdio_io_rw_ext_helper(func, 0, addr, 1, dst, count);
323}
324EXPORT_SYMBOL_GPL(sdio_memcpy_fromio);
325
326/**
327 * sdio_memcpy_toio - write a chunk of memory to a SDIO function
328 * @func: SDIO function to access
329 * @addr: address to start writing to
330 * @src: buffer that contains the data to write
331 * @count: number of bytes to write
332 *
333 * Writes to the address space of a given SDIO function. Return
334 * value indicates if the transfer succeeded or not.
335 */
336int sdio_memcpy_toio(struct sdio_func *func, unsigned int addr,
337 void *src, int count)
338{
339 return sdio_io_rw_ext_helper(func, 1, addr, 1, src, count);
340}
341EXPORT_SYMBOL_GPL(sdio_memcpy_toio);
342
343/**
344 * sdio_readsb - read from a FIFO on a SDIO function
345 * @func: SDIO function to access
346 * @dst: buffer to store the data
347 * @addr: address of (single byte) FIFO
348 * @count: number of bytes to read
349 *
350 * Reads from the specified FIFO of a given SDIO function. Return
351 * value indicates if the transfer succeeded or not.
352 */
353int sdio_readsb(struct sdio_func *func, void *dst, unsigned int addr,
354 int count)
355{
356 return sdio_io_rw_ext_helper(func, 0, addr, 0, dst, count);
357}
358
359EXPORT_SYMBOL_GPL(sdio_readsb);
360
361/**
362 * sdio_writesb - write to a FIFO of a SDIO function
363 * @func: SDIO function to access
364 * @addr: address of (single byte) FIFO
365 * @src: buffer that contains the data to write
366 * @count: number of bytes to write
367 *
368 * Writes to the specified FIFO of a given SDIO function. Return
369 * value indicates if the transfer succeeded or not.
370 */
371int sdio_writesb(struct sdio_func *func, unsigned int addr, void *src,
372 int count)
373{
374 return sdio_io_rw_ext_helper(func, 1, addr, 0, src, count);
375}
376EXPORT_SYMBOL_GPL(sdio_writesb);
377
378/**
379 * sdio_readw - read a 16 bit integer from a SDIO function
380 * @func: SDIO function to access
381 * @addr: address to read
382 * @err_ret: optional status value from transfer
383 *
384 * Reads a 16 bit integer from the address space of a given SDIO
385 * function. If there is a problem reading the address, 0xffff
386 * is returned and @err_ret will contain the error code.
387 */
388unsigned short sdio_readw(struct sdio_func *func, unsigned int addr,
389 int *err_ret)
390{
391 int ret;
392
393 if (err_ret)
394 *err_ret = 0;
395
396 ret = sdio_memcpy_fromio(func, func->tmpbuf, addr, 2);
397 if (ret) {
398 if (err_ret)
399 *err_ret = ret;
400 return 0xFFFF;
401 }
402
403 return le16_to_cpu(*(u16*)func->tmpbuf);
404}
405EXPORT_SYMBOL_GPL(sdio_readw);
406
407/**
408 * sdio_writew - write a 16 bit integer to a SDIO function
409 * @func: SDIO function to access
410 * @b: integer to write
411 * @addr: address to write to
412 * @err_ret: optional status value from transfer
413 *
414 * Writes a 16 bit integer to the address space of a given SDIO
415 * function. @err_ret will contain the status of the actual
416 * transfer.
417 */
418void sdio_writew(struct sdio_func *func, unsigned short b, unsigned int addr,
419 int *err_ret)
420{
421 int ret;
422
423 *(u16*)func->tmpbuf = cpu_to_le16(b);
424
425 ret = sdio_memcpy_toio(func, addr, func->tmpbuf, 2);
426 if (err_ret)
427 *err_ret = ret;
428}
429EXPORT_SYMBOL_GPL(sdio_writew);
430
431/**
432 * sdio_readl - read a 32 bit integer from a SDIO function
433 * @func: SDIO function to access
434 * @addr: address to read
435 * @err_ret: optional status value from transfer
436 *
437 * Reads a 32 bit integer from the address space of a given SDIO
438 * function. If there is a problem reading the address,
439 * 0xffffffff is returned and @err_ret will contain the error
440 * code.
441 */
442unsigned long sdio_readl(struct sdio_func *func, unsigned int addr,
443 int *err_ret)
444{
445 int ret;
446
447 if (err_ret)
448 *err_ret = 0;
449
450 ret = sdio_memcpy_fromio(func, func->tmpbuf, addr, 4);
451 if (ret) {
452 if (err_ret)
453 *err_ret = ret;
454 return 0xFFFFFFFF;
455 }
456
457 return le32_to_cpu(*(u32*)func->tmpbuf);
458}
459EXPORT_SYMBOL_GPL(sdio_readl);
460
461/**
462 * sdio_writel - write a 32 bit integer to a SDIO function
463 * @func: SDIO function to access
464 * @b: integer to write
465 * @addr: address to write to
466 * @err_ret: optional status value from transfer
467 *
468 * Writes a 32 bit integer to the address space of a given SDIO
469 * function. @err_ret will contain the status of the actual
470 * transfer.
471 */
472void sdio_writel(struct sdio_func *func, unsigned long b, unsigned int addr,
473 int *err_ret)
474{
475 int ret;
476
477 *(u32*)func->tmpbuf = cpu_to_le32(b);
478
479 ret = sdio_memcpy_toio(func, addr, func->tmpbuf, 4);
480 if (err_ret)
481 *err_ret = ret;
482}
483EXPORT_SYMBOL_GPL(sdio_writel);
484
485/**
486 * sdio_f0_readb - read a single byte from SDIO function 0
487 * @func: an SDIO function of the card
488 * @addr: address to read
489 * @err_ret: optional status value from transfer
490 *
491 * Reads a single byte from the address space of SDIO function 0.
492 * If there is a problem reading the address, 0xff is returned
493 * and @err_ret will contain the error code.
494 */
495unsigned char sdio_f0_readb(struct sdio_func *func, unsigned int addr,
496 int *err_ret)
497{
498 int ret;
499 unsigned char val;
500
501 BUG_ON(!func);
502
503 if (err_ret)
504 *err_ret = 0;
505
506 ret = mmc_io_rw_direct(func->card, 0, 0, addr, 0, &val);
507 if (ret) {
508 if (err_ret)
509 *err_ret = ret;
510 return 0xFF;
511 }
512
513 return val;
514}
515EXPORT_SYMBOL_GPL(sdio_f0_readb);
516
517/**
518 * sdio_f0_writeb - write a single byte to SDIO function 0
519 * @func: an SDIO function of the card
520 * @b: byte to write
521 * @addr: address to write to
522 * @err_ret: optional status value from transfer
523 *
524 * Writes a single byte to the address space of SDIO function 0.
525 * @err_ret will contain the status of the actual transfer.
526 *
527 * Only writes to the vendor specific CCCR registers (0xF0 -
528 * 0xFF) are permiited; @err_ret will be set to -EINVAL for *
529 * writes outside this range.
530 */
531void sdio_f0_writeb(struct sdio_func *func, unsigned char b, unsigned int addr,
532 int *err_ret)
533{
534 int ret;
535
536 BUG_ON(!func);
537
538 if (addr < 0xF0 || addr > 0xFF) {
539 if (err_ret)
540 *err_ret = -EINVAL;
541 return;
542 }
543
544 ret = mmc_io_rw_direct(func->card, 1, 0, addr, b, NULL);
545 if (err_ret)
546 *err_ret = ret;
547}
548EXPORT_SYMBOL_GPL(sdio_f0_writeb);
diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c
new file mode 100644
index 000000000000..3bd3021f5e80
--- /dev/null
+++ b/drivers/mmc/core/sdio_irq.c
@@ -0,0 +1,267 @@
1/*
2 * linux/drivers/mmc/core/sdio_irq.c
3 *
4 * Author: Nicolas Pitre
5 * Created: June 18, 2007
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/kthread.h>
17#include <linux/wait.h>
18#include <linux/delay.h>
19
20#include <linux/mmc/core.h>
21#include <linux/mmc/host.h>
22#include <linux/mmc/card.h>
23#include <linux/mmc/sdio.h>
24#include <linux/mmc/sdio_func.h>
25
26#include "sdio_ops.h"
27
28static int process_sdio_pending_irqs(struct mmc_card *card)
29{
30 int i, ret, count;
31 unsigned char pending;
32
33 ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_INTx, 0, &pending);
34 if (ret) {
35 printk(KERN_DEBUG "%s: error %d reading SDIO_CCCR_INTx\n",
36 mmc_card_id(card), ret);
37 return ret;
38 }
39
40 count = 0;
41 for (i = 1; i <= 7; i++) {
42 if (pending & (1 << i)) {
43 struct sdio_func *func = card->sdio_func[i - 1];
44 if (!func) {
45 printk(KERN_WARNING "%s: pending IRQ for "
46 "non-existant function\n",
47 mmc_card_id(card));
48 ret = -EINVAL;
49 } else if (func->irq_handler) {
50 func->irq_handler(func);
51 count++;
52 } else {
53 printk(KERN_WARNING "%s: pending IRQ with no handler\n",
54 sdio_func_id(func));
55 ret = -EINVAL;
56 }
57 }
58 }
59
60 if (count)
61 return count;
62
63 return ret;
64}
65
66static int sdio_irq_thread(void *_host)
67{
68 struct mmc_host *host = _host;
69 struct sched_param param = { .sched_priority = 1 };
70 unsigned long period, idle_period;
71 int ret;
72
73 sched_setscheduler(current, SCHED_FIFO, &param);
74
75 /*
76 * We want to allow for SDIO cards to work even on non SDIO
77 * aware hosts. One thing that non SDIO host cannot do is
78 * asynchronous notification of pending SDIO card interrupts
79 * hence we poll for them in that case.
80 */
81 idle_period = msecs_to_jiffies(10);
82 period = (host->caps & MMC_CAP_SDIO_IRQ) ?
83 MAX_SCHEDULE_TIMEOUT : idle_period;
84
85 pr_debug("%s: IRQ thread started (poll period = %lu jiffies)\n",
86 mmc_hostname(host), period);
87
88 do {
89 /*
90 * We claim the host here on drivers behalf for a couple
91 * reasons:
92 *
93 * 1) it is already needed to retrieve the CCCR_INTx;
94 * 2) we want the driver(s) to clear the IRQ condition ASAP;
95 * 3) we need to control the abort condition locally.
96 *
97 * Just like traditional hard IRQ handlers, we expect SDIO
98 * IRQ handlers to be quick and to the point, so that the
99 * holding of the host lock does not cover too much work
100 * that doesn't require that lock to be held.
101 */
102 ret = __mmc_claim_host(host, &host->sdio_irq_thread_abort);
103 if (ret)
104 break;
105 ret = process_sdio_pending_irqs(host->card);
106 mmc_release_host(host);
107
108 /*
109 * Give other threads a chance to run in the presence of
110 * errors. FIXME: determine if due to card removal and
111 * possibly exit this thread if so.
112 */
113 if (ret < 0)
114 ssleep(1);
115
116 /*
117 * Adaptive polling frequency based on the assumption
118 * that an interrupt will be closely followed by more.
119 * This has a substantial benefit for network devices.
120 */
121 if (!(host->caps & MMC_CAP_SDIO_IRQ)) {
122 if (ret > 0)
123 period /= 2;
124 else {
125 period++;
126 if (period > idle_period)
127 period = idle_period;
128 }
129 }
130
131 set_task_state(current, TASK_INTERRUPTIBLE);
132 if (host->caps & MMC_CAP_SDIO_IRQ)
133 host->ops->enable_sdio_irq(host, 1);
134 if (!kthread_should_stop())
135 schedule_timeout(period);
136 set_task_state(current, TASK_RUNNING);
137 } while (!kthread_should_stop());
138
139 if (host->caps & MMC_CAP_SDIO_IRQ)
140 host->ops->enable_sdio_irq(host, 0);
141
142 pr_debug("%s: IRQ thread exiting with code %d\n",
143 mmc_hostname(host), ret);
144
145 return ret;
146}
147
148static int sdio_card_irq_get(struct mmc_card *card)
149{
150 struct mmc_host *host = card->host;
151
152 WARN_ON(!host->claimed);
153
154 if (!host->sdio_irqs++) {
155 atomic_set(&host->sdio_irq_thread_abort, 0);
156 host->sdio_irq_thread =
157 kthread_run(sdio_irq_thread, host, "ksdiorqd");
158 if (IS_ERR(host->sdio_irq_thread)) {
159 int err = PTR_ERR(host->sdio_irq_thread);
160 host->sdio_irqs--;
161 return err;
162 }
163 }
164
165 return 0;
166}
167
168static int sdio_card_irq_put(struct mmc_card *card)
169{
170 struct mmc_host *host = card->host;
171
172 WARN_ON(!host->claimed);
173 BUG_ON(host->sdio_irqs < 1);
174
175 if (!--host->sdio_irqs) {
176 atomic_set(&host->sdio_irq_thread_abort, 1);
177 kthread_stop(host->sdio_irq_thread);
178 }
179
180 return 0;
181}
182
183/**
184 * sdio_claim_irq - claim the IRQ for a SDIO function
185 * @func: SDIO function
186 * @handler: IRQ handler callback
187 *
188 * Claim and activate the IRQ for the given SDIO function. The provided
189 * handler will be called when that IRQ is asserted. The host is always
190 * claimed already when the handler is called so the handler must not
191 * call sdio_claim_host() nor sdio_release_host().
192 */
193int sdio_claim_irq(struct sdio_func *func, sdio_irq_handler_t *handler)
194{
195 int ret;
196 unsigned char reg;
197
198 BUG_ON(!func);
199 BUG_ON(!func->card);
200
201 pr_debug("SDIO: Enabling IRQ for %s...\n", sdio_func_id(func));
202
203 if (func->irq_handler) {
204 pr_debug("SDIO: IRQ for %s already in use.\n", sdio_func_id(func));
205 return -EBUSY;
206 }
207
208 ret = mmc_io_rw_direct(func->card, 0, 0, SDIO_CCCR_IENx, 0, &reg);
209 if (ret)
210 return ret;
211
212 reg |= 1 << func->num;
213
214 reg |= 1; /* Master interrupt enable */
215
216 ret = mmc_io_rw_direct(func->card, 1, 0, SDIO_CCCR_IENx, reg, NULL);
217 if (ret)
218 return ret;
219
220 func->irq_handler = handler;
221 ret = sdio_card_irq_get(func->card);
222 if (ret)
223 func->irq_handler = NULL;
224
225 return ret;
226}
227EXPORT_SYMBOL_GPL(sdio_claim_irq);
228
229/**
230 * sdio_release_irq - release the IRQ for a SDIO function
231 * @func: SDIO function
232 *
233 * Disable and release the IRQ for the given SDIO function.
234 */
235int sdio_release_irq(struct sdio_func *func)
236{
237 int ret;
238 unsigned char reg;
239
240 BUG_ON(!func);
241 BUG_ON(!func->card);
242
243 pr_debug("SDIO: Disabling IRQ for %s...\n", sdio_func_id(func));
244
245 if (func->irq_handler) {
246 func->irq_handler = NULL;
247 sdio_card_irq_put(func->card);
248 }
249
250 ret = mmc_io_rw_direct(func->card, 0, 0, SDIO_CCCR_IENx, 0, &reg);
251 if (ret)
252 return ret;
253
254 reg &= ~(1 << func->num);
255
256 /* Disable master interrupt with the last function interrupt */
257 if (!(reg & 0xFE))
258 reg = 0;
259
260 ret = mmc_io_rw_direct(func->card, 1, 0, SDIO_CCCR_IENx, reg, NULL);
261 if (ret)
262 return ret;
263
264 return 0;
265}
266EXPORT_SYMBOL_GPL(sdio_release_irq);
267
diff --git a/drivers/mmc/core/sdio_ops.c b/drivers/mmc/core/sdio_ops.c
new file mode 100644
index 000000000000..4d289b275031
--- /dev/null
+++ b/drivers/mmc/core/sdio_ops.c
@@ -0,0 +1,176 @@
1/*
2 * linux/drivers/mmc/sdio_ops.c
3 *
4 * Copyright 2006-2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#include <asm/scatterlist.h>
13#include <linux/scatterlist.h>
14
15#include <linux/mmc/host.h>
16#include <linux/mmc/card.h>
17#include <linux/mmc/mmc.h>
18#include <linux/mmc/sdio.h>
19
20#include "core.h"
21
22int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr)
23{
24 struct mmc_command cmd;
25 int i, err = 0;
26
27 BUG_ON(!host);
28
29 memset(&cmd, 0, sizeof(struct mmc_command));
30
31 cmd.opcode = SD_IO_SEND_OP_COND;
32 cmd.arg = ocr;
33 cmd.flags = MMC_RSP_SPI_R4 | MMC_RSP_R4 | MMC_CMD_BCR;
34
35 for (i = 100; i; i--) {
36 err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
37 if (err)
38 break;
39
40 /* if we're just probing, do a single pass */
41 if (ocr == 0)
42 break;
43
44 /* otherwise wait until reset completes */
45 if (mmc_host_is_spi(host)) {
46 /*
47 * Both R1_SPI_IDLE and MMC_CARD_BUSY indicate
48 * an initialized card under SPI, but some cards
49 * (Marvell's) only behave when looking at this
50 * one.
51 */
52 if (cmd.resp[1] & MMC_CARD_BUSY)
53 break;
54 } else {
55 if (cmd.resp[0] & MMC_CARD_BUSY)
56 break;
57 }
58
59 err = -ETIMEDOUT;
60
61 mmc_delay(10);
62 }
63
64 if (rocr)
65 *rocr = cmd.resp[mmc_host_is_spi(host) ? 1 : 0];
66
67 return err;
68}
69
70int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
71 unsigned addr, u8 in, u8* out)
72{
73 struct mmc_command cmd;
74 int err;
75
76 BUG_ON(!card);
77 BUG_ON(fn > 7);
78
79 memset(&cmd, 0, sizeof(struct mmc_command));
80
81 cmd.opcode = SD_IO_RW_DIRECT;
82 cmd.arg = write ? 0x80000000 : 0x00000000;
83 cmd.arg |= fn << 28;
84 cmd.arg |= (write && out) ? 0x08000000 : 0x00000000;
85 cmd.arg |= addr << 9;
86 cmd.arg |= in;
87 cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC;
88
89 err = mmc_wait_for_cmd(card->host, &cmd, 0);
90 if (err)
91 return err;
92
93 if (mmc_host_is_spi(card->host)) {
94 /* host driver already reported errors */
95 } else {
96 if (cmd.resp[0] & R5_ERROR)
97 return -EIO;
98 if (cmd.resp[0] & R5_FUNCTION_NUMBER)
99 return -EINVAL;
100 if (cmd.resp[0] & R5_OUT_OF_RANGE)
101 return -ERANGE;
102 }
103
104 if (out) {
105 if (mmc_host_is_spi(card->host))
106 *out = (cmd.resp[0] >> 8) & 0xFF;
107 else
108 *out = cmd.resp[0] & 0xFF;
109 }
110
111 return 0;
112}
113
114int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
115 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz)
116{
117 struct mmc_request mrq;
118 struct mmc_command cmd;
119 struct mmc_data data;
120 struct scatterlist sg;
121
122 BUG_ON(!card);
123 BUG_ON(fn > 7);
124 BUG_ON(blocks == 1 && blksz > 512);
125 WARN_ON(blocks == 0);
126 WARN_ON(blksz == 0);
127
128 memset(&mrq, 0, sizeof(struct mmc_request));
129 memset(&cmd, 0, sizeof(struct mmc_command));
130 memset(&data, 0, sizeof(struct mmc_data));
131
132 mrq.cmd = &cmd;
133 mrq.data = &data;
134
135 cmd.opcode = SD_IO_RW_EXTENDED;
136 cmd.arg = write ? 0x80000000 : 0x00000000;
137 cmd.arg |= fn << 28;
138 cmd.arg |= incr_addr ? 0x04000000 : 0x00000000;
139 cmd.arg |= addr << 9;
140 if (blocks == 1 && blksz <= 512)
141 cmd.arg |= (blksz == 512) ? 0 : blksz; /* byte mode */
142 else
143 cmd.arg |= 0x08000000 | blocks; /* block mode */
144 cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
145
146 data.blksz = blksz;
147 data.blocks = blocks;
148 data.flags = write ? MMC_DATA_WRITE : MMC_DATA_READ;
149 data.sg = &sg;
150 data.sg_len = 1;
151
152 sg_init_one(&sg, buf, blksz * blocks);
153
154 mmc_set_data_timeout(&data, card);
155
156 mmc_wait_for_req(card->host, &mrq);
157
158 if (cmd.error)
159 return cmd.error;
160 if (data.error)
161 return data.error;
162
163 if (mmc_host_is_spi(card->host)) {
164 /* host driver already reported errors */
165 } else {
166 if (cmd.resp[0] & R5_ERROR)
167 return -EIO;
168 if (cmd.resp[0] & R5_FUNCTION_NUMBER)
169 return -EINVAL;
170 if (cmd.resp[0] & R5_OUT_OF_RANGE)
171 return -ERANGE;
172 }
173
174 return 0;
175}
176
diff --git a/drivers/mmc/core/sdio_ops.h b/drivers/mmc/core/sdio_ops.h
new file mode 100644
index 000000000000..e2e74b0d17d8
--- /dev/null
+++ b/drivers/mmc/core/sdio_ops.h
@@ -0,0 +1,22 @@
1/*
2 * linux/drivers/mmc/sdio_ops.c
3 *
4 * Copyright 2006-2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#ifndef _MMC_SDIO_OPS_H
13#define _MMC_SDIO_OPS_H
14
15int mmc_send_io_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr);
16int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
17 unsigned addr, u8 in, u8* out);
18int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
19 unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz);
20
21#endif
22
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index e23082fe88d0..5fef6783c716 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -35,6 +35,23 @@ config MMC_SDHCI
35 35
36 If unsure, say N. 36 If unsure, say N.
37 37
38config MMC_RICOH_MMC
39 tristate "Ricoh MMC Controller Disabler (EXPERIMENTAL)"
40 depends on PCI && EXPERIMENTAL && MMC_SDHCI
41 help
42 This selects the disabler for the Ricoh MMC Controller. This
43 proprietary controller is unnecessary because the SDHCI driver
44 supports MMC cards on the SD controller, but if it is not
45 disabled, it will steal the MMC cards away - rendering them
46 useless. It is safe to select this driver even if you don't
47 have a Ricoh based card reader.
48
49
50 To compile this driver as a module, choose M here:
51 the module will be called ricoh_mmc.
52
53 If unsure, say Y.
54
38config MMC_OMAP 55config MMC_OMAP
39 tristate "TI OMAP Multimedia Card Interface support" 56 tristate "TI OMAP Multimedia Card Interface support"
40 depends on ARCH_OMAP 57 depends on ARCH_OMAP
@@ -100,3 +117,16 @@ config MMC_TIFM_SD
100 To compile this driver as a module, choose M here: the 117 To compile this driver as a module, choose M here: the
101 module will be called tifm_sd. 118 module will be called tifm_sd.
102 119
120config MMC_SPI
121 tristate "MMC/SD over SPI (EXPERIMENTAL)"
122 depends on MMC && SPI_MASTER && !HIGHMEM && EXPERIMENTAL
123 select CRC7
124 select CRC_ITU_T
125 help
126 Some systems accss MMC/SD cards using a SPI controller instead of
127 using a "native" MMC/SD controller. This has a disadvantage of
128 being relatively high overhead, but a compensating advantage of
129 working on many systems without dedicated MMC/SD controllers.
130
131 If unsure, or if your system has no SPI master driver, say N.
132
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 6685f64345b4..3877c87e6da2 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -10,9 +10,11 @@ obj-$(CONFIG_MMC_ARMMMCI) += mmci.o
10obj-$(CONFIG_MMC_PXA) += pxamci.o 10obj-$(CONFIG_MMC_PXA) += pxamci.o
11obj-$(CONFIG_MMC_IMX) += imxmmc.o 11obj-$(CONFIG_MMC_IMX) += imxmmc.o
12obj-$(CONFIG_MMC_SDHCI) += sdhci.o 12obj-$(CONFIG_MMC_SDHCI) += sdhci.o
13obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o
13obj-$(CONFIG_MMC_WBSD) += wbsd.o 14obj-$(CONFIG_MMC_WBSD) += wbsd.o
14obj-$(CONFIG_MMC_AU1X) += au1xmmc.o 15obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
15obj-$(CONFIG_MMC_OMAP) += omap.o 16obj-$(CONFIG_MMC_OMAP) += omap.o
16obj-$(CONFIG_MMC_AT91) += at91_mci.o 17obj-$(CONFIG_MMC_AT91) += at91_mci.o
17obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o 18obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
19obj-$(CONFIG_MMC_SPI) += mmc_spi.o
18 20
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index 955ea60583b5..6ba98a49612d 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -328,7 +328,7 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
328 data = cmd->data; 328 data = cmd->data;
329 if (!data) return; 329 if (!data) return;
330 330
331 if (cmd->data->flags & MMC_DATA_MULTI) { 331 if (cmd->data->blocks > 1) {
332 pr_debug("multiple write : wait for BLKE...\n"); 332 pr_debug("multiple write : wait for BLKE...\n");
333 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE); 333 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
334 } else 334 } else
@@ -428,6 +428,14 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
428 } 428 }
429 429
430 if (data) { 430 if (data) {
431
432 if ( data->blksz & 0x3 ) {
433 pr_debug("Unsupported block size\n");
434 cmd->error = -EINVAL;
435 mmc_request_done(host->mmc, host->request);
436 return;
437 }
438
431 block_length = data->blksz; 439 block_length = data->blksz;
432 blocks = data->blocks; 440 blocks = data->blocks;
433 441
@@ -439,7 +447,7 @@ static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command
439 447
440 if (data->flags & MMC_DATA_STREAM) 448 if (data->flags & MMC_DATA_STREAM)
441 cmdr |= AT91_MCI_TRTYP_STREAM; 449 cmdr |= AT91_MCI_TRTYP_STREAM;
442 if (data->flags & MMC_DATA_MULTI) 450 if (data->blocks > 1)
443 cmdr |= AT91_MCI_TRTYP_MULTIPLE; 451 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
444 } 452 }
445 else { 453 else {
@@ -577,24 +585,22 @@ static void at91_mci_completed_command(struct at91mci_host *host)
577 AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE | 585 AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
578 AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) { 586 AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
579 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) { 587 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
580 cmd->error = MMC_ERR_NONE; 588 cmd->error = 0;
581 } 589 }
582 else { 590 else {
583 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE)) 591 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
584 cmd->error = MMC_ERR_TIMEOUT; 592 cmd->error = -ETIMEDOUT;
585 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE)) 593 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
586 cmd->error = MMC_ERR_BADCRC; 594 cmd->error = -EILSEQ;
587 else if (status & (AT91_MCI_OVRE | AT91_MCI_UNRE))
588 cmd->error = MMC_ERR_FIFO;
589 else 595 else
590 cmd->error = MMC_ERR_FAILED; 596 cmd->error = -EIO;
591 597
592 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n", 598 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
593 cmd->error, cmd->opcode, cmd->retries); 599 cmd->error, cmd->opcode, cmd->retries);
594 } 600 }
595 } 601 }
596 else 602 else
597 cmd->error = MMC_ERR_NONE; 603 cmd->error = 0;
598 604
599 at91_mci_process_next(host); 605 at91_mci_process_next(host);
600} 606}
@@ -836,7 +842,6 @@ static int __init at91_mci_probe(struct platform_device *pdev)
836 mmc->f_min = 375000; 842 mmc->f_min = 375000;
837 mmc->f_max = 25000000; 843 mmc->f_max = 25000000;
838 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 844 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
839 mmc->caps = MMC_CAP_BYTEBLOCK;
840 845
841 mmc->max_blk_size = 4095; 846 mmc->max_blk_size = 4095;
842 mmc->max_blk_count = mmc->max_req_size; 847 mmc->max_blk_count = mmc->max_req_size;
diff --git a/drivers/mmc/host/au1xmmc.c b/drivers/mmc/host/au1xmmc.c
index 34c99d4ea041..92c4d0dfee43 100644
--- a/drivers/mmc/host/au1xmmc.c
+++ b/drivers/mmc/host/au1xmmc.c
@@ -186,7 +186,7 @@ static void au1xmmc_tasklet_finish(unsigned long param)
186} 186}
187 187
188static int au1xmmc_send_command(struct au1xmmc_host *host, int wait, 188static int au1xmmc_send_command(struct au1xmmc_host *host, int wait,
189 struct mmc_command *cmd, unsigned int flags) 189 struct mmc_command *cmd, struct mmc_data *data)
190{ 190{
191 u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT); 191 u32 mmccmd = (cmd->opcode << SD_CMD_CI_SHIFT);
192 192
@@ -208,19 +208,21 @@ static int au1xmmc_send_command(struct au1xmmc_host *host, int wait,
208 default: 208 default:
209 printk(KERN_INFO "au1xmmc: unhandled response type %02x\n", 209 printk(KERN_INFO "au1xmmc: unhandled response type %02x\n",
210 mmc_resp_type(cmd)); 210 mmc_resp_type(cmd));
211 return MMC_ERR_INVALID; 211 return -EINVAL;
212 } 212 }
213 213
214 if (flags & MMC_DATA_READ) { 214 if (data) {
215 if (flags & MMC_DATA_MULTI) 215 if (flags & MMC_DATA_READ) {
216 mmccmd |= SD_CMD_CT_4; 216 if (data->blocks > 1)
217 else 217 mmccmd |= SD_CMD_CT_4;
218 mmccmd |= SD_CMD_CT_2; 218 else
219 } else if (flags & MMC_DATA_WRITE) { 219 mmccmd |= SD_CMD_CT_2;
220 if (flags & MMC_DATA_MULTI) 220 } else if (flags & MMC_DATA_WRITE) {
221 mmccmd |= SD_CMD_CT_3; 221 if (data->blocks > 1)
222 else 222 mmccmd |= SD_CMD_CT_3;
223 mmccmd |= SD_CMD_CT_1; 223 else
224 mmccmd |= SD_CMD_CT_1;
225 }
224 } 226 }
225 227
226 au_writel(cmd->arg, HOST_CMDARG(host)); 228 au_writel(cmd->arg, HOST_CMDARG(host));
@@ -253,7 +255,7 @@ static int au1xmmc_send_command(struct au1xmmc_host *host, int wait,
253 IRQ_ON(host, SD_CONFIG_CR); 255 IRQ_ON(host, SD_CONFIG_CR);
254 } 256 }
255 257
256 return MMC_ERR_NONE; 258 return 0;
257} 259}
258 260
259static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status) 261static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
@@ -278,7 +280,7 @@ static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
278 while((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB)) 280 while((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB))
279 status = au_readl(HOST_STATUS(host)); 281 status = au_readl(HOST_STATUS(host));
280 282
281 data->error = MMC_ERR_NONE; 283 data->error = 0;
282 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir); 284 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir);
283 285
284 /* Process any errors */ 286 /* Process any errors */
@@ -288,14 +290,14 @@ static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
288 crc |= ((status & 0x07) == 0x02) ? 0 : 1; 290 crc |= ((status & 0x07) == 0x02) ? 0 : 1;
289 291
290 if (crc) 292 if (crc)
291 data->error = MMC_ERR_BADCRC; 293 data->error = -EILSEQ;
292 294
293 /* Clear the CRC bits */ 295 /* Clear the CRC bits */
294 au_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host)); 296 au_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host));
295 297
296 data->bytes_xfered = 0; 298 data->bytes_xfered = 0;
297 299
298 if (data->error == MMC_ERR_NONE) { 300 if (!data->error) {
299 if (host->flags & HOST_F_DMA) { 301 if (host->flags & HOST_F_DMA) {
300 u32 chan = DMA_CHANNEL(host); 302 u32 chan = DMA_CHANNEL(host);
301 303
@@ -475,7 +477,7 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
475 return; 477 return;
476 478
477 cmd = mrq->cmd; 479 cmd = mrq->cmd;
478 cmd->error = MMC_ERR_NONE; 480 cmd->error = 0;
479 481
480 if (cmd->flags & MMC_RSP_PRESENT) { 482 if (cmd->flags & MMC_RSP_PRESENT) {
481 if (cmd->flags & MMC_RSP_136) { 483 if (cmd->flags & MMC_RSP_136) {
@@ -512,11 +514,11 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
512 /* Figure out errors */ 514 /* Figure out errors */
513 515
514 if (status & (SD_STATUS_SC | SD_STATUS_WC | SD_STATUS_RC)) 516 if (status & (SD_STATUS_SC | SD_STATUS_WC | SD_STATUS_RC))
515 cmd->error = MMC_ERR_BADCRC; 517 cmd->error = -EILSEQ;
516 518
517 trans = host->flags & (HOST_F_XMIT | HOST_F_RECV); 519 trans = host->flags & (HOST_F_XMIT | HOST_F_RECV);
518 520
519 if (!trans || cmd->error != MMC_ERR_NONE) { 521 if (!trans || cmd->error) {
520 522
521 IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA|SD_CONFIG_RF); 523 IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA|SD_CONFIG_RF);
522 tasklet_schedule(&host->finish_task); 524 tasklet_schedule(&host->finish_task);
@@ -589,7 +591,7 @@ au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
589 data->sg_len, host->dma.dir); 591 data->sg_len, host->dma.dir);
590 592
591 if (host->dma.len == 0) 593 if (host->dma.len == 0)
592 return MMC_ERR_TIMEOUT; 594 return -ETIMEDOUT;
593 595
594 au_writel(data->blksz - 1, HOST_BLKSIZE(host)); 596 au_writel(data->blksz - 1, HOST_BLKSIZE(host));
595 597
@@ -640,11 +642,11 @@ au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
640 //IRQ_ON(host, SD_CONFIG_RA|SD_CONFIG_RF); 642 //IRQ_ON(host, SD_CONFIG_RA|SD_CONFIG_RF);
641 } 643 }
642 644
643 return MMC_ERR_NONE; 645 return 0;
644 646
645 dataerr: 647 dataerr:
646 dma_unmap_sg(mmc_dev(host->mmc),data->sg,data->sg_len,host->dma.dir); 648 dma_unmap_sg(mmc_dev(host->mmc),data->sg,data->sg_len,host->dma.dir);
647 return MMC_ERR_TIMEOUT; 649 return -ETIMEDOUT;
648} 650}
649 651
650/* static void au1xmmc_request 652/* static void au1xmmc_request
@@ -656,7 +658,7 @@ static void au1xmmc_request(struct mmc_host* mmc, struct mmc_request* mrq)
656 658
657 struct au1xmmc_host *host = mmc_priv(mmc); 659 struct au1xmmc_host *host = mmc_priv(mmc);
658 unsigned int flags = 0; 660 unsigned int flags = 0;
659 int ret = MMC_ERR_NONE; 661 int ret = 0;
660 662
661 WARN_ON(irqs_disabled()); 663 WARN_ON(irqs_disabled());
662 WARN_ON(host->status != HOST_S_IDLE); 664 WARN_ON(host->status != HOST_S_IDLE);
@@ -672,10 +674,10 @@ static void au1xmmc_request(struct mmc_host* mmc, struct mmc_request* mrq)
672 ret = au1xmmc_prepare_data(host, mrq->data); 674 ret = au1xmmc_prepare_data(host, mrq->data);
673 } 675 }
674 676
675 if (ret == MMC_ERR_NONE) 677 if (!ret)
676 ret = au1xmmc_send_command(host, 0, mrq->cmd, flags); 678 ret = au1xmmc_send_command(host, 0, mrq->cmd, mrq->data);
677 679
678 if (ret != MMC_ERR_NONE) { 680 if (ret) {
679 mrq->cmd->error = ret; 681 mrq->cmd->error = ret;
680 au1xmmc_finish_request(host); 682 au1xmmc_finish_request(host);
681 } 683 }
@@ -764,10 +766,10 @@ static irqreturn_t au1xmmc_irq(int irq, void *dev_id)
764 766
765 if (host->mrq && (status & STATUS_TIMEOUT)) { 767 if (host->mrq && (status & STATUS_TIMEOUT)) {
766 if (status & SD_STATUS_RAT) 768 if (status & SD_STATUS_RAT)
767 host->mrq->cmd->error = MMC_ERR_TIMEOUT; 769 host->mrq->cmd->error = -ETIMEDOUT;
768 770
769 else if (status & SD_STATUS_DT) 771 else if (status & SD_STATUS_DT)
770 host->mrq->data->error = MMC_ERR_TIMEOUT; 772 host->mrq->data->error = -ETIMEDOUT;
771 773
772 /* In PIO mode, interrupts might still be enabled */ 774 /* In PIO mode, interrupts might still be enabled */
773 IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH); 775 IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH);
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index 54bfc9f25596..6ebc41e7592c 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -428,11 +428,11 @@ static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat)
428 if ( stat & STATUS_ERR_MASK ) { 428 if ( stat & STATUS_ERR_MASK ) {
429 dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat); 429 dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat);
430 if(stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) 430 if(stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR))
431 data->error = MMC_ERR_BADCRC; 431 data->error = -EILSEQ;
432 else if(stat & STATUS_TIME_OUT_READ) 432 else if(stat & STATUS_TIME_OUT_READ)
433 data->error = MMC_ERR_TIMEOUT; 433 data->error = -ETIMEDOUT;
434 else 434 else
435 data->error = MMC_ERR_FAILED; 435 data->error = -EIO;
436 } else { 436 } else {
437 data->bytes_xfered = host->dma_size; 437 data->bytes_xfered = host->dma_size;
438 } 438 }
@@ -458,10 +458,10 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
458 458
459 if (stat & STATUS_TIME_OUT_RESP) { 459 if (stat & STATUS_TIME_OUT_RESP) {
460 dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); 460 dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n");
461 cmd->error = MMC_ERR_TIMEOUT; 461 cmd->error = -ETIMEDOUT;
462 } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 462 } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
463 dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); 463 dev_dbg(mmc_dev(host->mmc), "cmd crc error\n");
464 cmd->error = MMC_ERR_BADCRC; 464 cmd->error = -EILSEQ;
465 } 465 }
466 466
467 if(cmd->flags & MMC_RSP_PRESENT) { 467 if(cmd->flags & MMC_RSP_PRESENT) {
@@ -482,7 +482,7 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
482 dev_dbg(mmc_dev(host->mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n", 482 dev_dbg(mmc_dev(host->mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n",
483 cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], cmd->error); 483 cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], cmd->error);
484 484
485 if (data && (cmd->error == MMC_ERR_NONE) && !(stat & STATUS_ERR_MASK)) { 485 if (data && !cmd->error && !(stat & STATUS_ERR_MASK)) {
486 if (host->req->data->flags & MMC_DATA_WRITE) { 486 if (host->req->data->flags & MMC_DATA_WRITE) {
487 487
488 /* Wait for FIFO to be empty before starting DMA write */ 488 /* Wait for FIFO to be empty before starting DMA write */
@@ -491,7 +491,7 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)
491 if(imxmci_busy_wait_for_status(host, &stat, 491 if(imxmci_busy_wait_for_status(host, &stat,
492 STATUS_APPL_BUFF_FE, 492 STATUS_APPL_BUFF_FE,
493 40, "imxmci_cmd_done DMA WR") < 0) { 493 40, "imxmci_cmd_done DMA WR") < 0) {
494 cmd->error = MMC_ERR_FIFO; 494 cmd->error = -EIO;
495 imxmci_finish_data(host, stat); 495 imxmci_finish_data(host, stat);
496 if(host->req) 496 if(host->req)
497 imxmci_finish_request(host, host->req); 497 imxmci_finish_request(host, host->req);
@@ -884,9 +884,21 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
884 } 884 }
885} 885}
886 886
887static int imxmci_get_ro(struct mmc_host *mmc)
888{
889 struct imxmci_host *host = mmc_priv(mmc);
890
891 if (host->pdata && host->pdata->get_ro)
892 return host->pdata->get_ro(mmc_dev(mmc));
893 /* Host doesn't support read only detection so assume writeable */
894 return 0;
895}
896
897
887static const struct mmc_host_ops imxmci_ops = { 898static const struct mmc_host_ops imxmci_ops = {
888 .request = imxmci_request, 899 .request = imxmci_request,
889 .set_ios = imxmci_set_ios, 900 .set_ios = imxmci_set_ios,
901 .get_ro = imxmci_get_ro,
890}; 902};
891 903
892static struct resource *platform_device_resource(struct platform_device *dev, unsigned int mask, int nr) 904static struct resource *platform_device_resource(struct platform_device *dev, unsigned int mask, int nr)
@@ -913,7 +925,7 @@ static void imxmci_check_status(unsigned long data)
913{ 925{
914 struct imxmci_host *host = (struct imxmci_host *)data; 926 struct imxmci_host *host = (struct imxmci_host *)data;
915 927
916 if( host->pdata->card_present() != host->present ) { 928 if( host->pdata->card_present(mmc_dev(host->mmc)) != host->present ) {
917 host->present ^= 1; 929 host->present ^= 1;
918 dev_info(mmc_dev(host->mmc), "card %s\n", 930 dev_info(mmc_dev(host->mmc), "card %s\n",
919 host->present ? "inserted" : "removed"); 931 host->present ? "inserted" : "removed");
@@ -963,7 +975,7 @@ static int imxmci_probe(struct platform_device *pdev)
963 mmc->f_min = 150000; 975 mmc->f_min = 150000;
964 mmc->f_max = CLK_RATE/2; 976 mmc->f_max = CLK_RATE/2;
965 mmc->ocr_avail = MMC_VDD_32_33; 977 mmc->ocr_avail = MMC_VDD_32_33;
966 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_BYTEBLOCK; 978 mmc->caps = MMC_CAP_4_BIT_DATA;
967 979
968 /* MMC core transfer sizes tunable parameters */ 980 /* MMC core transfer sizes tunable parameters */
969 mmc->max_hw_segs = 64; 981 mmc->max_hw_segs = 64;
@@ -1022,7 +1034,7 @@ static int imxmci_probe(struct platform_device *pdev)
1022 if (ret) 1034 if (ret)
1023 goto out; 1035 goto out;
1024 1036
1025 host->present = host->pdata->card_present(); 1037 host->present = host->pdata->card_present(mmc_dev(mmc));
1026 init_timer(&host->timer); 1038 init_timer(&host->timer);
1027 host->timer.data = (unsigned long)host; 1039 host->timer.data = (unsigned long)host;
1028 host->timer.function = imxmci_check_status; 1040 host->timer.function = imxmci_check_status;
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
new file mode 100644
index 000000000000..f30327bba6f6
--- /dev/null
+++ b/drivers/mmc/host/mmc_spi.c
@@ -0,0 +1,1408 @@
1/*
2 * mmc_spi.c - Access SD/MMC cards through SPI master controllers
3 *
4 * (C) Copyright 2005, Intec Automation,
5 * Mike Lavender (mike@steroidmicros)
6 * (C) Copyright 2006-2007, David Brownell
7 * (C) Copyright 2007, Axis Communications,
8 * Hans-Peter Nilsson (hp@axis.com)
9 * (C) Copyright 2007, ATRON electronic GmbH,
10 * Jan Nikitenko <jan.nikitenko@gmail.com>
11 *
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/hrtimer.h>
28#include <linux/delay.h>
29#include <linux/blkdev.h>
30#include <linux/dma-mapping.h>
31#include <linux/crc7.h>
32#include <linux/crc-itu-t.h>
33
34#include <linux/mmc/host.h>
35#include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */
36
37#include <linux/spi/spi.h>
38#include <linux/spi/mmc_spi.h>
39
40#include <asm/unaligned.h>
41
42
43/* NOTES:
44 *
45 * - For now, we won't try to interoperate with a real mmc/sd/sdio
46 * controller, although some of them do have hardware support for
47 * SPI protocol. The main reason for such configs would be mmc-ish
48 * cards like DataFlash, which don't support that "native" protocol.
49 *
50 * We don't have a "DataFlash/MMC/SD/SDIO card slot" abstraction to
51 * switch between driver stacks, and in any case if "native" mode
52 * is available, it will be faster and hence preferable.
53 *
54 * - MMC depends on a different chipselect management policy than the
55 * SPI interface currently supports for shared bus segments: it needs
56 * to issue multiple spi_message requests with the chipselect active,
57 * using the results of one message to decide the next one to issue.
58 *
59 * Pending updates to the programming interface, this driver expects
60 * that it not share the bus with other drivers (precluding conflicts).
61 *
62 * - We tell the controller to keep the chipselect active from the
63 * beginning of an mmc_host_ops.request until the end. So beware
64 * of SPI controller drivers that mis-handle the cs_change flag!
65 *
66 * However, many cards seem OK with chipselect flapping up/down
67 * during that time ... at least on unshared bus segments.
68 */
69
70
71/*
72 * Local protocol constants, internal to data block protocols.
73 */
74
75/* Response tokens used to ack each block written: */
76#define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
77#define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
78#define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
79#define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
80
81/* Read and write blocks start with these tokens and end with crc;
82 * on error, read tokens act like a subset of R2_SPI_* values.
83 */
84#define SPI_TOKEN_SINGLE 0xfe /* single block r/w, multiblock read */
85#define SPI_TOKEN_MULTI_WRITE 0xfc /* multiblock write */
86#define SPI_TOKEN_STOP_TRAN 0xfd /* terminate multiblock write */
87
88#define MMC_SPI_BLOCKSIZE 512
89
90
91/* These fixed timeouts come from the latest SD specs, which say to ignore
92 * the CSD values. The R1B value is for card erase (e.g. the "I forgot the
93 * card's password" scenario); it's mostly applied to STOP_TRANSMISSION after
94 * reads which takes nowhere near that long. Older cards may be able to use
95 * shorter timeouts ... but why bother?
96 */
97#define readblock_timeout ktime_set(0, 100 * 1000 * 1000)
98#define writeblock_timeout ktime_set(0, 250 * 1000 * 1000)
99#define r1b_timeout ktime_set(3, 0)
100
101
102/****************************************************************************/
103
104/*
105 * Local Data Structures
106 */
107
108/* "scratch" is per-{command,block} data exchanged with the card */
109struct scratch {
110 u8 status[29];
111 u8 data_token;
112 __be16 crc_val;
113};
114
115struct mmc_spi_host {
116 struct mmc_host *mmc;
117 struct spi_device *spi;
118
119 unsigned char power_mode;
120 u16 powerup_msecs;
121
122 struct mmc_spi_platform_data *pdata;
123
124 /* for bulk data transfers */
125 struct spi_transfer token, t, crc, early_status;
126 struct spi_message m;
127
128 /* for status readback */
129 struct spi_transfer status;
130 struct spi_message readback;
131
132 /* underlying DMA-aware controller, or null */
133 struct device *dma_dev;
134
135 /* buffer used for commands and for message "overhead" */
136 struct scratch *data;
137 dma_addr_t data_dma;
138
139 /* Specs say to write ones most of the time, even when the card
140 * has no need to read its input data; and many cards won't care.
141 * This is our source of those ones.
142 */
143 void *ones;
144 dma_addr_t ones_dma;
145};
146
147
148/****************************************************************************/
149
150/*
151 * MMC-over-SPI protocol glue, used by the MMC stack interface
152 */
153
154static inline int mmc_cs_off(struct mmc_spi_host *host)
155{
156 /* chipselect will always be inactive after setup() */
157 return spi_setup(host->spi);
158}
159
160static int
161mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len)
162{
163 int status;
164
165 if (len > sizeof(*host->data)) {
166 WARN_ON(1);
167 return -EIO;
168 }
169
170 host->status.len = len;
171
172 if (host->dma_dev)
173 dma_sync_single_for_device(host->dma_dev,
174 host->data_dma, sizeof(*host->data),
175 DMA_FROM_DEVICE);
176
177 status = spi_sync(host->spi, &host->readback);
178 if (status == 0)
179 status = host->readback.status;
180
181 if (host->dma_dev)
182 dma_sync_single_for_cpu(host->dma_dev,
183 host->data_dma, sizeof(*host->data),
184 DMA_FROM_DEVICE);
185
186 return status;
187}
188
189static int
190mmc_spi_skip(struct mmc_spi_host *host, ktime_t timeout, unsigned n, u8 byte)
191{
192 u8 *cp = host->data->status;
193
194 timeout = ktime_add(timeout, ktime_get());
195
196 while (1) {
197 int status;
198 unsigned i;
199
200 status = mmc_spi_readbytes(host, n);
201 if (status < 0)
202 return status;
203
204 for (i = 0; i < n; i++) {
205 if (cp[i] != byte)
206 return cp[i];
207 }
208
209 /* REVISIT investigate msleep() to avoid busy-wait I/O
210 * in at least some cases.
211 */
212 if (ktime_to_ns(ktime_sub(ktime_get(), timeout)) > 0)
213 break;
214 }
215 return -ETIMEDOUT;
216}
217
218static inline int
219mmc_spi_wait_unbusy(struct mmc_spi_host *host, ktime_t timeout)
220{
221 return mmc_spi_skip(host, timeout, sizeof(host->data->status), 0);
222}
223
224static int mmc_spi_readtoken(struct mmc_spi_host *host)
225{
226 return mmc_spi_skip(host, readblock_timeout, 1, 0xff);
227}
228
229
230/*
231 * Note that for SPI, cmd->resp[0] is not the same data as "native" protocol
232 * hosts return! The low byte holds R1_SPI bits. The next byte may hold
233 * R2_SPI bits ... for SEND_STATUS, or after data read errors.
234 *
235 * cmd->resp[1] holds any four-byte response, for R3 (READ_OCR) and on
236 * newer cards R7 (IF_COND).
237 */
238
239static char *maptype(struct mmc_command *cmd)
240{
241 switch (mmc_spi_resp_type(cmd)) {
242 case MMC_RSP_SPI_R1: return "R1";
243 case MMC_RSP_SPI_R1B: return "R1B";
244 case MMC_RSP_SPI_R2: return "R2/R5";
245 case MMC_RSP_SPI_R3: return "R3/R4/R7";
246 default: return "?";
247 }
248}
249
250/* return zero, else negative errno after setting cmd->error */
251static int mmc_spi_response_get(struct mmc_spi_host *host,
252 struct mmc_command *cmd, int cs_on)
253{
254 u8 *cp = host->data->status;
255 u8 *end = cp + host->t.len;
256 int value = 0;
257 char tag[32];
258
259 snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s",
260 cmd->opcode, maptype(cmd));
261
262 /* Except for data block reads, the whole response will already
263 * be stored in the scratch buffer. It's somewhere after the
264 * command and the first byte we read after it. We ignore that
265 * first byte. After STOP_TRANSMISSION command it may include
266 * two data bits, but otherwise it's all ones.
267 */
268 cp += 8;
269 while (cp < end && *cp == 0xff)
270 cp++;
271
272 /* Data block reads (R1 response types) may need more data... */
273 if (cp == end) {
274 unsigned i;
275
276 cp = host->data->status;
277
278 /* Card sends N(CR) (== 1..8) bytes of all-ones then one
279 * status byte ... and we already scanned 2 bytes.
280 *
281 * REVISIT block read paths use nasty byte-at-a-time I/O
282 * so it can always DMA directly into the target buffer.
283 * It'd probably be better to memcpy() the first chunk and
284 * avoid extra i/o calls...
285 */
286 for (i = 2; i < 9; i++) {
287 value = mmc_spi_readbytes(host, 1);
288 if (value < 0)
289 goto done;
290 if (*cp != 0xff)
291 goto checkstatus;
292 }
293 value = -ETIMEDOUT;
294 goto done;
295 }
296
297checkstatus:
298 if (*cp & 0x80) {
299 dev_dbg(&host->spi->dev, "%s: INVALID RESPONSE, %02x\n",
300 tag, *cp);
301 value = -EBADR;
302 goto done;
303 }
304
305 cmd->resp[0] = *cp++;
306 cmd->error = 0;
307
308 /* Status byte: the entire seven-bit R1 response. */
309 if (cmd->resp[0] != 0) {
310 if ((R1_SPI_PARAMETER | R1_SPI_ADDRESS
311 | R1_SPI_ILLEGAL_COMMAND)
312 & cmd->resp[0])
313 value = -EINVAL;
314 else if (R1_SPI_COM_CRC & cmd->resp[0])
315 value = -EILSEQ;
316 else if ((R1_SPI_ERASE_SEQ | R1_SPI_ERASE_RESET)
317 & cmd->resp[0])
318 value = -EIO;
319 /* else R1_SPI_IDLE, "it's resetting" */
320 }
321
322 switch (mmc_spi_resp_type(cmd)) {
323
324 /* SPI R1B == R1 + busy; STOP_TRANSMISSION (for multiblock reads)
325 * and less-common stuff like various erase operations.
326 */
327 case MMC_RSP_SPI_R1B:
328 /* maybe we read all the busy tokens already */
329 while (cp < end && *cp == 0)
330 cp++;
331 if (cp == end)
332 mmc_spi_wait_unbusy(host, r1b_timeout);
333 break;
334
335 /* SPI R2 == R1 + second status byte; SEND_STATUS
336 * SPI R5 == R1 + data byte; IO_RW_DIRECT
337 */
338 case MMC_RSP_SPI_R2:
339 cmd->resp[0] |= *cp << 8;
340 break;
341
342 /* SPI R3, R4, or R7 == R1 + 4 bytes */
343 case MMC_RSP_SPI_R3:
344 cmd->resp[1] = be32_to_cpu(get_unaligned((u32 *)cp));
345 break;
346
347 /* SPI R1 == just one status byte */
348 case MMC_RSP_SPI_R1:
349 break;
350
351 default:
352 dev_dbg(&host->spi->dev, "bad response type %04x\n",
353 mmc_spi_resp_type(cmd));
354 if (value >= 0)
355 value = -EINVAL;
356 goto done;
357 }
358
359 if (value < 0)
360 dev_dbg(&host->spi->dev, "%s: resp %04x %08x\n",
361 tag, cmd->resp[0], cmd->resp[1]);
362
363 /* disable chipselect on errors and some success cases */
364 if (value >= 0 && cs_on)
365 return value;
366done:
367 if (value < 0)
368 cmd->error = value;
369 mmc_cs_off(host);
370 return value;
371}
372
373/* Issue command and read its response.
374 * Returns zero on success, negative for error.
375 *
376 * On error, caller must cope with mmc core retry mechanism. That
377 * means immediate low-level resubmit, which affects the bus lock...
378 */
379static int
380mmc_spi_command_send(struct mmc_spi_host *host,
381 struct mmc_request *mrq,
382 struct mmc_command *cmd, int cs_on)
383{
384 struct scratch *data = host->data;
385 u8 *cp = data->status;
386 u32 arg = cmd->arg;
387 int status;
388 struct spi_transfer *t;
389
390 /* We can handle most commands (except block reads) in one full
391 * duplex I/O operation before either starting the next transfer
392 * (data block or command) or else deselecting the card.
393 *
394 * First, write 7 bytes:
395 * - an all-ones byte to ensure the card is ready
396 * - opcode byte (plus start and transmission bits)
397 * - four bytes of big-endian argument
398 * - crc7 (plus end bit) ... always computed, it's cheap
399 *
400 * We init the whole buffer to all-ones, which is what we need
401 * to write while we're reading (later) response data.
402 */
403 memset(cp++, 0xff, sizeof(data->status));
404
405 *cp++ = 0x40 | cmd->opcode;
406 *cp++ = (u8)(arg >> 24);
407 *cp++ = (u8)(arg >> 16);
408 *cp++ = (u8)(arg >> 8);
409 *cp++ = (u8)arg;
410 *cp++ = (crc7(0, &data->status[1], 5) << 1) | 0x01;
411
412 /* Then, read up to 13 bytes (while writing all-ones):
413 * - N(CR) (== 1..8) bytes of all-ones
414 * - status byte (for all response types)
415 * - the rest of the response, either:
416 * + nothing, for R1 or R1B responses
417 * + second status byte, for R2 responses
418 * + four data bytes, for R3 and R7 responses
419 *
420 * Finally, read some more bytes ... in the nice cases we know in
421 * advance how many, and reading 1 more is always OK:
422 * - N(EC) (== 0..N) bytes of all-ones, before deselect/finish
423 * - N(RC) (== 1..N) bytes of all-ones, before next command
424 * - N(WR) (== 1..N) bytes of all-ones, before data write
425 *
426 * So in those cases one full duplex I/O of at most 21 bytes will
427 * handle the whole command, leaving the card ready to receive a
428 * data block or new command. We do that whenever we can, shaving
429 * CPU and IRQ costs (especially when using DMA or FIFOs).
430 *
431 * There are two other cases, where it's not generally practical
432 * to rely on a single I/O:
433 *
434 * - R1B responses need at least N(EC) bytes of all-zeroes.
435 *
436 * In this case we can *try* to fit it into one I/O, then
437 * maybe read more data later.
438 *
439 * - Data block reads are more troublesome, since a variable
440 * number of padding bytes precede the token and data.
441 * + N(CX) (== 0..8) bytes of all-ones, before CSD or CID
442 * + N(AC) (== 1..many) bytes of all-ones
443 *
444 * In this case we currently only have minimal speedups here:
445 * when N(CR) == 1 we can avoid I/O in response_get().
446 */
447 if (cs_on && (mrq->data->flags & MMC_DATA_READ)) {
448 cp += 2; /* min(N(CR)) + status */
449 /* R1 */
450 } else {
451 cp += 10; /* max(N(CR)) + status + min(N(RC),N(WR)) */
452 if (cmd->flags & MMC_RSP_SPI_S2) /* R2/R5 */
453 cp++;
454 else if (cmd->flags & MMC_RSP_SPI_B4) /* R3/R4/R7 */
455 cp += 4;
456 else if (cmd->flags & MMC_RSP_BUSY) /* R1B */
457 cp = data->status + sizeof(data->status);
458 /* else: R1 (most commands) */
459 }
460
461 dev_dbg(&host->spi->dev, " mmc_spi: CMD%d, resp %s\n",
462 cmd->opcode, maptype(cmd));
463
464 /* send command, leaving chipselect active */
465 spi_message_init(&host->m);
466
467 t = &host->t;
468 memset(t, 0, sizeof(*t));
469 t->tx_buf = t->rx_buf = data->status;
470 t->tx_dma = t->rx_dma = host->data_dma;
471 t->len = cp - data->status;
472 t->cs_change = 1;
473 spi_message_add_tail(t, &host->m);
474
475 if (host->dma_dev) {
476 host->m.is_dma_mapped = 1;
477 dma_sync_single_for_device(host->dma_dev,
478 host->data_dma, sizeof(*host->data),
479 DMA_BIDIRECTIONAL);
480 }
481 status = spi_sync(host->spi, &host->m);
482 if (status == 0)
483 status = host->m.status;
484
485 if (host->dma_dev)
486 dma_sync_single_for_cpu(host->dma_dev,
487 host->data_dma, sizeof(*host->data),
488 DMA_BIDIRECTIONAL);
489 if (status < 0) {
490 dev_dbg(&host->spi->dev, " ... write returned %d\n", status);
491 cmd->error = status;
492 return status;
493 }
494
495 /* after no-data commands and STOP_TRANSMISSION, chipselect off */
496 return mmc_spi_response_get(host, cmd, cs_on);
497}
498
499/* Build data message with up to four separate transfers. For TX, we
500 * start by writing the data token. And in most cases, we finish with
501 * a status transfer.
502 *
503 * We always provide TX data for data and CRC. The MMC/SD protocol
504 * requires us to write ones; but Linux defaults to writing zeroes;
505 * so we explicitly initialize it to all ones on RX paths.
506 *
507 * We also handle DMA mapping, so the underlying SPI controller does
508 * not need to (re)do it for each message.
509 */
510static void
511mmc_spi_setup_data_message(
512 struct mmc_spi_host *host,
513 int multiple,
514 enum dma_data_direction direction)
515{
516 struct spi_transfer *t;
517 struct scratch *scratch = host->data;
518 dma_addr_t dma = host->data_dma;
519
520 spi_message_init(&host->m);
521 if (dma)
522 host->m.is_dma_mapped = 1;
523
524 /* for reads, readblock() skips 0xff bytes before finding
525 * the token; for writes, this transfer issues that token.
526 */
527 if (direction == DMA_TO_DEVICE) {
528 t = &host->token;
529 memset(t, 0, sizeof(*t));
530 t->len = 1;
531 if (multiple)
532 scratch->data_token = SPI_TOKEN_MULTI_WRITE;
533 else
534 scratch->data_token = SPI_TOKEN_SINGLE;
535 t->tx_buf = &scratch->data_token;
536 if (dma)
537 t->tx_dma = dma + offsetof(struct scratch, data_token);
538 spi_message_add_tail(t, &host->m);
539 }
540
541 /* Body of transfer is buffer, then CRC ...
542 * either TX-only, or RX with TX-ones.
543 */
544 t = &host->t;
545 memset(t, 0, sizeof(*t));
546 t->tx_buf = host->ones;
547 t->tx_dma = host->ones_dma;
548 /* length and actual buffer info are written later */
549 spi_message_add_tail(t, &host->m);
550
551 t = &host->crc;
552 memset(t, 0, sizeof(*t));
553 t->len = 2;
554 if (direction == DMA_TO_DEVICE) {
555 /* the actual CRC may get written later */
556 t->tx_buf = &scratch->crc_val;
557 if (dma)
558 t->tx_dma = dma + offsetof(struct scratch, crc_val);
559 } else {
560 t->tx_buf = host->ones;
561 t->tx_dma = host->ones_dma;
562 t->rx_buf = &scratch->crc_val;
563 if (dma)
564 t->rx_dma = dma + offsetof(struct scratch, crc_val);
565 }
566 spi_message_add_tail(t, &host->m);
567
568 /*
569 * A single block read is followed by N(EC) [0+] all-ones bytes
570 * before deselect ... don't bother.
571 *
572 * Multiblock reads are followed by N(AC) [1+] all-ones bytes before
573 * the next block is read, or a STOP_TRANSMISSION is issued. We'll
574 * collect that single byte, so readblock() doesn't need to.
575 *
576 * For a write, the one-byte data response follows immediately, then
577 * come zero or more busy bytes, then N(WR) [1+] all-ones bytes.
578 * Then single block reads may deselect, and multiblock ones issue
579 * the next token (next data block, or STOP_TRAN). We can try to
580 * minimize I/O ops by using a single read to collect end-of-busy.
581 */
582 if (multiple || direction == DMA_TO_DEVICE) {
583 t = &host->early_status;
584 memset(t, 0, sizeof(*t));
585 t->len = (direction == DMA_TO_DEVICE)
586 ? sizeof(scratch->status)
587 : 1;
588 t->tx_buf = host->ones;
589 t->tx_dma = host->ones_dma;
590 t->rx_buf = scratch->status;
591 if (dma)
592 t->rx_dma = dma + offsetof(struct scratch, status);
593 t->cs_change = 1;
594 spi_message_add_tail(t, &host->m);
595 }
596}
597
598/*
599 * Write one block:
600 * - caller handled preceding N(WR) [1+] all-ones bytes
601 * - data block
602 * + token
603 * + data bytes
604 * + crc16
605 * - an all-ones byte ... card writes a data-response byte
606 * - followed by N(EC) [0+] all-ones bytes, card writes zero/'busy'
607 *
608 * Return negative errno, else success.
609 */
610static int
611mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t)
612{
613 struct spi_device *spi = host->spi;
614 int status, i;
615 struct scratch *scratch = host->data;
616
617 if (host->mmc->use_spi_crc)
618 scratch->crc_val = cpu_to_be16(
619 crc_itu_t(0, t->tx_buf, t->len));
620 if (host->dma_dev)
621 dma_sync_single_for_device(host->dma_dev,
622 host->data_dma, sizeof(*scratch),
623 DMA_BIDIRECTIONAL);
624
625 status = spi_sync(spi, &host->m);
626 if (status == 0)
627 status = host->m.status;
628
629 if (status != 0) {
630 dev_dbg(&spi->dev, "write error (%d)\n", status);
631 return status;
632 }
633
634 if (host->dma_dev)
635 dma_sync_single_for_cpu(host->dma_dev,
636 host->data_dma, sizeof(*scratch),
637 DMA_BIDIRECTIONAL);
638
639 /*
640 * Get the transmission data-response reply. It must follow
641 * immediately after the data block we transferred. This reply
642 * doesn't necessarily tell whether the write operation succeeded;
643 * it just says if the transmission was ok and whether *earlier*
644 * writes succeeded; see the standard.
645 */
646 switch (SPI_MMC_RESPONSE_CODE(scratch->status[0])) {
647 case SPI_RESPONSE_ACCEPTED:
648 status = 0;
649 break;
650 case SPI_RESPONSE_CRC_ERR:
651 /* host shall then issue MMC_STOP_TRANSMISSION */
652 status = -EILSEQ;
653 break;
654 case SPI_RESPONSE_WRITE_ERR:
655 /* host shall then issue MMC_STOP_TRANSMISSION,
656 * and should MMC_SEND_STATUS to sort it out
657 */
658 status = -EIO;
659 break;
660 default:
661 status = -EPROTO;
662 break;
663 }
664 if (status != 0) {
665 dev_dbg(&spi->dev, "write error %02x (%d)\n",
666 scratch->status[0], status);
667 return status;
668 }
669
670 t->tx_buf += t->len;
671 if (host->dma_dev)
672 t->tx_dma += t->len;
673
674 /* Return when not busy. If we didn't collect that status yet,
675 * we'll need some more I/O.
676 */
677 for (i = 1; i < sizeof(scratch->status); i++) {
678 if (scratch->status[i] != 0)
679 return 0;
680 }
681 return mmc_spi_wait_unbusy(host, writeblock_timeout);
682}
683
684/*
685 * Read one block:
686 * - skip leading all-ones bytes ... either
687 * + N(AC) [1..f(clock,CSD)] usually, else
688 * + N(CX) [0..8] when reading CSD or CID
689 * - data block
690 * + token ... if error token, no data or crc
691 * + data bytes
692 * + crc16
693 *
694 * After single block reads, we're done; N(EC) [0+] all-ones bytes follow
695 * before dropping chipselect.
696 *
697 * For multiblock reads, caller either reads the next block or issues a
698 * STOP_TRANSMISSION command.
699 */
700static int
701mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t)
702{
703 struct spi_device *spi = host->spi;
704 int status;
705 struct scratch *scratch = host->data;
706
707 /* At least one SD card sends an all-zeroes byte when N(CX)
708 * applies, before the all-ones bytes ... just cope with that.
709 */
710 status = mmc_spi_readbytes(host, 1);
711 if (status < 0)
712 return status;
713 status = scratch->status[0];
714 if (status == 0xff || status == 0)
715 status = mmc_spi_readtoken(host);
716
717 if (status == SPI_TOKEN_SINGLE) {
718 if (host->dma_dev) {
719 dma_sync_single_for_device(host->dma_dev,
720 host->data_dma, sizeof(*scratch),
721 DMA_BIDIRECTIONAL);
722 dma_sync_single_for_device(host->dma_dev,
723 t->rx_dma, t->len,
724 DMA_FROM_DEVICE);
725 }
726
727 status = spi_sync(spi, &host->m);
728 if (status == 0)
729 status = host->m.status;
730
731 if (host->dma_dev) {
732 dma_sync_single_for_cpu(host->dma_dev,
733 host->data_dma, sizeof(*scratch),
734 DMA_BIDIRECTIONAL);
735 dma_sync_single_for_cpu(host->dma_dev,
736 t->rx_dma, t->len,
737 DMA_FROM_DEVICE);
738 }
739
740 } else {
741 dev_dbg(&spi->dev, "read error %02x (%d)\n", status, status);
742
743 /* we've read extra garbage, timed out, etc */
744 if (status < 0)
745 return status;
746
747 /* low four bits are an R2 subset, fifth seems to be
748 * vendor specific ... map them all to generic error..
749 */
750 return -EIO;
751 }
752
753 if (host->mmc->use_spi_crc) {
754 u16 crc = crc_itu_t(0, t->rx_buf, t->len);
755
756 be16_to_cpus(&scratch->crc_val);
757 if (scratch->crc_val != crc) {
758 dev_dbg(&spi->dev, "read - crc error: crc_val=0x%04x, "
759 "computed=0x%04x len=%d\n",
760 scratch->crc_val, crc, t->len);
761 return -EILSEQ;
762 }
763 }
764
765 t->rx_buf += t->len;
766 if (host->dma_dev)
767 t->rx_dma += t->len;
768
769 return 0;
770}
771
772/*
773 * An MMC/SD data stage includes one or more blocks, optional CRCs,
774 * and inline handshaking. That handhaking makes it unlike most
775 * other SPI protocol stacks.
776 */
777static void
778mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd,
779 struct mmc_data *data, u32 blk_size)
780{
781 struct spi_device *spi = host->spi;
782 struct device *dma_dev = host->dma_dev;
783 struct spi_transfer *t;
784 enum dma_data_direction direction;
785 struct scatterlist *sg;
786 unsigned n_sg;
787 int multiple = (data->blocks > 1);
788
789 if (data->flags & MMC_DATA_READ)
790 direction = DMA_FROM_DEVICE;
791 else
792 direction = DMA_TO_DEVICE;
793 mmc_spi_setup_data_message(host, multiple, direction);
794 t = &host->t;
795
796 /* Handle scatterlist segments one at a time, with synch for
797 * each 512-byte block
798 */
799 for (sg = data->sg, n_sg = data->sg_len; n_sg; n_sg--, sg++) {
800 int status = 0;
801 dma_addr_t dma_addr = 0;
802 void *kmap_addr;
803 unsigned length = sg->length;
804 enum dma_data_direction dir = direction;
805
806 /* set up dma mapping for controller drivers that might
807 * use DMA ... though they may fall back to PIO
808 */
809 if (dma_dev) {
810 /* never invalidate whole *shared* pages ... */
811 if ((sg->offset != 0 || length != PAGE_SIZE)
812 && dir == DMA_FROM_DEVICE)
813 dir = DMA_BIDIRECTIONAL;
814
815 dma_addr = dma_map_page(dma_dev, sg->page, 0,
816 PAGE_SIZE, dir);
817 if (direction == DMA_TO_DEVICE)
818 t->tx_dma = dma_addr + sg->offset;
819 else
820 t->rx_dma = dma_addr + sg->offset;
821 }
822
823 /* allow pio too; we don't allow highmem */
824 kmap_addr = kmap(sg->page);
825 if (direction == DMA_TO_DEVICE)
826 t->tx_buf = kmap_addr + sg->offset;
827 else
828 t->rx_buf = kmap_addr + sg->offset;
829
830 /* transfer each block, and update request status */
831 while (length) {
832 t->len = min(length, blk_size);
833
834 dev_dbg(&host->spi->dev,
835 " mmc_spi: %s block, %d bytes\n",
836 (direction == DMA_TO_DEVICE)
837 ? "write"
838 : "read",
839 t->len);
840
841 if (direction == DMA_TO_DEVICE)
842 status = mmc_spi_writeblock(host, t);
843 else
844 status = mmc_spi_readblock(host, t);
845 if (status < 0)
846 break;
847
848 data->bytes_xfered += t->len;
849 length -= t->len;
850
851 if (!multiple)
852 break;
853 }
854
855 /* discard mappings */
856 if (direction == DMA_FROM_DEVICE)
857 flush_kernel_dcache_page(sg->page);
858 kunmap(sg->page);
859 if (dma_dev)
860 dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir);
861
862 if (status < 0) {
863 data->error = status;
864 dev_dbg(&spi->dev, "%s status %d\n",
865 (direction == DMA_TO_DEVICE)
866 ? "write" : "read",
867 status);
868 break;
869 }
870 }
871
872 /* NOTE some docs describe an MMC-only SET_BLOCK_COUNT (CMD23) that
873 * can be issued before multiblock writes. Unlike its more widely
874 * documented analogue for SD cards (SET_WR_BLK_ERASE_COUNT, ACMD23),
875 * that can affect the STOP_TRAN logic. Complete (and current)
876 * MMC specs should sort that out before Linux starts using CMD23.
877 */
878 if (direction == DMA_TO_DEVICE && multiple) {
879 struct scratch *scratch = host->data;
880 int tmp;
881 const unsigned statlen = sizeof(scratch->status);
882
883 dev_dbg(&spi->dev, " mmc_spi: STOP_TRAN\n");
884
885 /* Tweak the per-block message we set up earlier by morphing
886 * it to hold single buffer with the token followed by some
887 * all-ones bytes ... skip N(BR) (0..1), scan the rest for
888 * "not busy any longer" status, and leave chip selected.
889 */
890 INIT_LIST_HEAD(&host->m.transfers);
891 list_add(&host->early_status.transfer_list,
892 &host->m.transfers);
893
894 memset(scratch->status, 0xff, statlen);
895 scratch->status[0] = SPI_TOKEN_STOP_TRAN;
896
897 host->early_status.tx_buf = host->early_status.rx_buf;
898 host->early_status.tx_dma = host->early_status.rx_dma;
899 host->early_status.len = statlen;
900
901 if (host->dma_dev)
902 dma_sync_single_for_device(host->dma_dev,
903 host->data_dma, sizeof(*scratch),
904 DMA_BIDIRECTIONAL);
905
906 tmp = spi_sync(spi, &host->m);
907 if (tmp == 0)
908 tmp = host->m.status;
909
910 if (host->dma_dev)
911 dma_sync_single_for_cpu(host->dma_dev,
912 host->data_dma, sizeof(*scratch),
913 DMA_BIDIRECTIONAL);
914
915 if (tmp < 0) {
916 if (!data->error)
917 data->error = tmp;
918 return;
919 }
920
921 /* Ideally we collected "not busy" status with one I/O,
922 * avoiding wasteful byte-at-a-time scanning... but more
923 * I/O is often needed.
924 */
925 for (tmp = 2; tmp < statlen; tmp++) {
926 if (scratch->status[tmp] != 0)
927 return;
928 }
929 tmp = mmc_spi_wait_unbusy(host, writeblock_timeout);
930 if (tmp < 0 && !data->error)
931 data->error = tmp;
932 }
933}
934
935/****************************************************************************/
936
937/*
938 * MMC driver implementation -- the interface to the MMC stack
939 */
940
941static void mmc_spi_request(struct mmc_host *mmc, struct mmc_request *mrq)
942{
943 struct mmc_spi_host *host = mmc_priv(mmc);
944 int status = -EINVAL;
945
946#ifdef DEBUG
947 /* MMC core and layered drivers *MUST* issue SPI-aware commands */
948 {
949 struct mmc_command *cmd;
950 int invalid = 0;
951
952 cmd = mrq->cmd;
953 if (!mmc_spi_resp_type(cmd)) {
954 dev_dbg(&host->spi->dev, "bogus command\n");
955 cmd->error = -EINVAL;
956 invalid = 1;
957 }
958
959 cmd = mrq->stop;
960 if (cmd && !mmc_spi_resp_type(cmd)) {
961 dev_dbg(&host->spi->dev, "bogus STOP command\n");
962 cmd->error = -EINVAL;
963 invalid = 1;
964 }
965
966 if (invalid) {
967 dump_stack();
968 mmc_request_done(host->mmc, mrq);
969 return;
970 }
971 }
972#endif
973
974 /* issue command; then optionally data and stop */
975 status = mmc_spi_command_send(host, mrq, mrq->cmd, mrq->data != NULL);
976 if (status == 0 && mrq->data) {
977 mmc_spi_data_do(host, mrq->cmd, mrq->data, mrq->data->blksz);
978 if (mrq->stop)
979 status = mmc_spi_command_send(host, mrq, mrq->stop, 0);
980 else
981 mmc_cs_off(host);
982 }
983
984 mmc_request_done(host->mmc, mrq);
985}
986
987/* See Section 6.4.1, in SD "Simplified Physical Layer Specification 2.0"
988 *
989 * NOTE that here we can't know that the card has just been powered up;
990 * not all MMC/SD sockets support power switching.
991 *
992 * FIXME when the card is still in SPI mode, e.g. from a previous kernel,
993 * this doesn't seem to do the right thing at all...
994 */
995static void mmc_spi_initsequence(struct mmc_spi_host *host)
996{
997 /* Try to be very sure any previous command has completed;
998 * wait till not-busy, skip debris from any old commands.
999 */
1000 mmc_spi_wait_unbusy(host, r1b_timeout);
1001 mmc_spi_readbytes(host, 10);
1002
1003 /*
1004 * Do a burst with chipselect active-high. We need to do this to
1005 * meet the requirement of 74 clock cycles with both chipselect
1006 * and CMD (MOSI) high before CMD0 ... after the card has been
1007 * powered up to Vdd(min), and so is ready to take commands.
1008 *
1009 * Some cards are particularly needy of this (e.g. Viking "SD256")
1010 * while most others don't seem to care.
1011 *
1012 * Note that this is one of the places MMC/SD plays games with the
1013 * SPI protocol. Another is that when chipselect is released while
1014 * the card returns BUSY status, the clock must issue several cycles
1015 * with chipselect high before the card will stop driving its output.
1016 */
1017 host->spi->mode |= SPI_CS_HIGH;
1018 if (spi_setup(host->spi) != 0) {
1019 /* Just warn; most cards work without it. */
1020 dev_warn(&host->spi->dev,
1021 "can't change chip-select polarity\n");
1022 host->spi->mode &= ~SPI_CS_HIGH;
1023 } else {
1024 mmc_spi_readbytes(host, 18);
1025
1026 host->spi->mode &= ~SPI_CS_HIGH;
1027 if (spi_setup(host->spi) != 0) {
1028 /* Wot, we can't get the same setup we had before? */
1029 dev_err(&host->spi->dev,
1030 "can't restore chip-select polarity\n");
1031 }
1032 }
1033}
1034
1035static char *mmc_powerstring(u8 power_mode)
1036{
1037 switch (power_mode) {
1038 case MMC_POWER_OFF: return "off";
1039 case MMC_POWER_UP: return "up";
1040 case MMC_POWER_ON: return "on";
1041 }
1042 return "?";
1043}
1044
1045static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1046{
1047 struct mmc_spi_host *host = mmc_priv(mmc);
1048
1049 if (host->power_mode != ios->power_mode) {
1050 int canpower;
1051
1052 canpower = host->pdata && host->pdata->setpower;
1053
1054 dev_dbg(&host->spi->dev, "mmc_spi: power %s (%d)%s\n",
1055 mmc_powerstring(ios->power_mode),
1056 ios->vdd,
1057 canpower ? ", can switch" : "");
1058
1059 /* switch power on/off if possible, accounting for
1060 * max 250msec powerup time if needed.
1061 */
1062 if (canpower) {
1063 switch (ios->power_mode) {
1064 case MMC_POWER_OFF:
1065 case MMC_POWER_UP:
1066 host->pdata->setpower(&host->spi->dev,
1067 ios->vdd);
1068 if (ios->power_mode == MMC_POWER_UP)
1069 msleep(host->powerup_msecs);
1070 }
1071 }
1072
1073 /* See 6.4.1 in the simplified SD card physical spec 2.0 */
1074 if (ios->power_mode == MMC_POWER_ON)
1075 mmc_spi_initsequence(host);
1076
1077 /* If powering down, ground all card inputs to avoid power
1078 * delivery from data lines! On a shared SPI bus, this
1079 * will probably be temporary; 6.4.2 of the simplified SD
1080 * spec says this must last at least 1msec.
1081 *
1082 * - Clock low means CPOL 0, e.g. mode 0
1083 * - MOSI low comes from writing zero
1084 * - Chipselect is usually active low...
1085 */
1086 if (canpower && ios->power_mode == MMC_POWER_OFF) {
1087 int mres;
1088
1089 host->spi->mode &= ~(SPI_CPOL|SPI_CPHA);
1090 mres = spi_setup(host->spi);
1091 if (mres < 0)
1092 dev_dbg(&host->spi->dev,
1093 "switch to SPI mode 0 failed\n");
1094
1095 if (spi_w8r8(host->spi, 0x00) < 0)
1096 dev_dbg(&host->spi->dev,
1097 "put spi signals to low failed\n");
1098
1099 /*
1100 * Now clock should be low due to spi mode 0;
1101 * MOSI should be low because of written 0x00;
1102 * chipselect should be low (it is active low)
1103 * power supply is off, so now MMC is off too!
1104 *
1105 * FIXME no, chipselect can be high since the
1106 * device is inactive and SPI_CS_HIGH is clear...
1107 */
1108 msleep(10);
1109 if (mres == 0) {
1110 host->spi->mode |= (SPI_CPOL|SPI_CPHA);
1111 mres = spi_setup(host->spi);
1112 if (mres < 0)
1113 dev_dbg(&host->spi->dev,
1114 "switch back to SPI mode 3"
1115 " failed\n");
1116 }
1117 }
1118
1119 host->power_mode = ios->power_mode;
1120 }
1121
1122 if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) {
1123 int status;
1124
1125 host->spi->max_speed_hz = ios->clock;
1126 status = spi_setup(host->spi);
1127 dev_dbg(&host->spi->dev,
1128 "mmc_spi: clock to %d Hz, %d\n",
1129 host->spi->max_speed_hz, status);
1130 }
1131}
1132
1133static int mmc_spi_get_ro(struct mmc_host *mmc)
1134{
1135 struct mmc_spi_host *host = mmc_priv(mmc);
1136
1137 if (host->pdata && host->pdata->get_ro)
1138 return host->pdata->get_ro(mmc->parent);
1139 /* board doesn't support read only detection; assume writeable */
1140 return 0;
1141}
1142
1143
1144static const struct mmc_host_ops mmc_spi_ops = {
1145 .request = mmc_spi_request,
1146 .set_ios = mmc_spi_set_ios,
1147 .get_ro = mmc_spi_get_ro,
1148};
1149
1150
1151/****************************************************************************/
1152
1153/*
1154 * SPI driver implementation
1155 */
1156
1157static irqreturn_t
1158mmc_spi_detect_irq(int irq, void *mmc)
1159{
1160 struct mmc_spi_host *host = mmc_priv(mmc);
1161 u16 delay_msec = max(host->pdata->detect_delay, (u16)100);
1162
1163 mmc_detect_change(mmc, msecs_to_jiffies(delay_msec));
1164 return IRQ_HANDLED;
1165}
1166
1167static int mmc_spi_probe(struct spi_device *spi)
1168{
1169 void *ones;
1170 struct mmc_host *mmc;
1171 struct mmc_spi_host *host;
1172 int status;
1173
1174 /* MMC and SD specs only seem to care that sampling is on the
1175 * rising edge ... meaning SPI modes 0 or 3. So either SPI mode
1176 * should be legit. We'll use mode 0 since it seems to be a
1177 * bit less troublesome on some hardware ... unclear why.
1178 */
1179 spi->mode = SPI_MODE_0;
1180 spi->bits_per_word = 8;
1181
1182 status = spi_setup(spi);
1183 if (status < 0) {
1184 dev_dbg(&spi->dev, "needs SPI mode %02x, %d KHz; %d\n",
1185 spi->mode, spi->max_speed_hz / 1000,
1186 status);
1187 return status;
1188 }
1189
1190 /* We can use the bus safely iff nobody else will interfere with
1191 * us. That is, either we have the experimental exclusive access
1192 * primitives ... or else there's nobody to share it with.
1193 */
1194 if (spi->master->num_chipselect > 1) {
1195 struct device *parent = spi->dev.parent;
1196
1197 /* If there are multiple devices on this bus, we
1198 * can't proceed.
1199 */
1200 spin_lock(&parent->klist_children.k_lock);
1201 if (parent->klist_children.k_list.next
1202 != parent->klist_children.k_list.prev)
1203 status = -EMLINK;
1204 else
1205 status = 0;
1206 spin_unlock(&parent->klist_children.k_lock);
1207 if (status < 0) {
1208 dev_err(&spi->dev, "can't share SPI bus\n");
1209 return status;
1210 }
1211
1212 /* REVISIT we can't guarantee another device won't
1213 * be added later. It's uncommon though ... for now,
1214 * work as if this is safe.
1215 */
1216 dev_warn(&spi->dev, "ASSUMING unshared SPI bus!\n");
1217 }
1218
1219 /* We need a supply of ones to transmit. This is the only time
1220 * the CPU touches these, so cache coherency isn't a concern.
1221 *
1222 * NOTE if many systems use more than one MMC-over-SPI connector
1223 * it'd save some memory to share this. That's evidently rare.
1224 */
1225 status = -ENOMEM;
1226 ones = kmalloc(MMC_SPI_BLOCKSIZE, GFP_KERNEL);
1227 if (!ones)
1228 goto nomem;
1229 memset(ones, 0xff, MMC_SPI_BLOCKSIZE);
1230
1231 mmc = mmc_alloc_host(sizeof(*host), &spi->dev);
1232 if (!mmc)
1233 goto nomem;
1234
1235 mmc->ops = &mmc_spi_ops;
1236 mmc->max_blk_size = MMC_SPI_BLOCKSIZE;
1237
1238 /* As long as we keep track of the number of successfully
1239 * transmitted blocks, we're good for multiwrite.
1240 */
1241 mmc->caps = MMC_CAP_SPI | MMC_CAP_MULTIWRITE;
1242
1243 /* SPI doesn't need the lowspeed device identification thing for
1244 * MMC or SD cards, since it never comes up in open drain mode.
1245 * That's good; some SPI masters can't handle very low speeds!
1246 *
1247 * However, low speed SDIO cards need not handle over 400 KHz;
1248 * that's the only reason not to use a few MHz for f_min (until
1249 * the upper layer reads the target frequency from the CSD).
1250 */
1251 mmc->f_min = 400000;
1252 mmc->f_max = spi->max_speed_hz;
1253
1254 host = mmc_priv(mmc);
1255 host->mmc = mmc;
1256 host->spi = spi;
1257
1258 host->ones = ones;
1259
1260 /* Platform data is used to hook up things like card sensing
1261 * and power switching gpios.
1262 */
1263 host->pdata = spi->dev.platform_data;
1264 if (host->pdata)
1265 mmc->ocr_avail = host->pdata->ocr_mask;
1266 if (!mmc->ocr_avail) {
1267 dev_warn(&spi->dev, "ASSUMING 3.2-3.4 V slot power\n");
1268 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
1269 }
1270 if (host->pdata && host->pdata->setpower) {
1271 host->powerup_msecs = host->pdata->powerup_msecs;
1272 if (!host->powerup_msecs || host->powerup_msecs > 250)
1273 host->powerup_msecs = 250;
1274 }
1275
1276 dev_set_drvdata(&spi->dev, mmc);
1277
1278 /* preallocate dma buffers */
1279 host->data = kmalloc(sizeof(*host->data), GFP_KERNEL);
1280 if (!host->data)
1281 goto fail_nobuf1;
1282
1283 if (spi->master->cdev.dev->dma_mask) {
1284 struct device *dev = spi->master->cdev.dev;
1285
1286 host->dma_dev = dev;
1287 host->ones_dma = dma_map_single(dev, ones,
1288 MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE);
1289 host->data_dma = dma_map_single(dev, host->data,
1290 sizeof(*host->data), DMA_BIDIRECTIONAL);
1291
1292 /* REVISIT in theory those map operations can fail... */
1293
1294 dma_sync_single_for_cpu(host->dma_dev,
1295 host->data_dma, sizeof(*host->data),
1296 DMA_BIDIRECTIONAL);
1297 }
1298
1299 /* setup message for status/busy readback */
1300 spi_message_init(&host->readback);
1301 host->readback.is_dma_mapped = (host->dma_dev != NULL);
1302
1303 spi_message_add_tail(&host->status, &host->readback);
1304 host->status.tx_buf = host->ones;
1305 host->status.tx_dma = host->ones_dma;
1306 host->status.rx_buf = &host->data->status;
1307 host->status.rx_dma = host->data_dma + offsetof(struct scratch, status);
1308 host->status.cs_change = 1;
1309
1310 /* register card detect irq */
1311 if (host->pdata && host->pdata->init) {
1312 status = host->pdata->init(&spi->dev, mmc_spi_detect_irq, mmc);
1313 if (status != 0)
1314 goto fail_glue_init;
1315 }
1316
1317 status = mmc_add_host(mmc);
1318 if (status != 0)
1319 goto fail_add_host;
1320
1321 dev_info(&spi->dev, "SD/MMC host %s%s%s%s\n",
1322 mmc->class_dev.bus_id,
1323 host->dma_dev ? "" : ", no DMA",
1324 (host->pdata && host->pdata->get_ro)
1325 ? "" : ", no WP",
1326 (host->pdata && host->pdata->setpower)
1327 ? "" : ", no poweroff");
1328 return 0;
1329
1330fail_add_host:
1331 mmc_remove_host (mmc);
1332fail_glue_init:
1333 if (host->dma_dev)
1334 dma_unmap_single(host->dma_dev, host->data_dma,
1335 sizeof(*host->data), DMA_BIDIRECTIONAL);
1336 kfree(host->data);
1337
1338fail_nobuf1:
1339 mmc_free_host(mmc);
1340 dev_set_drvdata(&spi->dev, NULL);
1341
1342nomem:
1343 kfree(ones);
1344 return status;
1345}
1346
1347
1348static int __devexit mmc_spi_remove(struct spi_device *spi)
1349{
1350 struct mmc_host *mmc = dev_get_drvdata(&spi->dev);
1351 struct mmc_spi_host *host;
1352
1353 if (mmc) {
1354 host = mmc_priv(mmc);
1355
1356 /* prevent new mmc_detect_change() calls */
1357 if (host->pdata && host->pdata->exit)
1358 host->pdata->exit(&spi->dev, mmc);
1359
1360 mmc_remove_host(mmc);
1361
1362 if (host->dma_dev) {
1363 dma_unmap_single(host->dma_dev, host->ones_dma,
1364 MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE);
1365 dma_unmap_single(host->dma_dev, host->data_dma,
1366 sizeof(*host->data), DMA_BIDIRECTIONAL);
1367 }
1368
1369 kfree(host->data);
1370 kfree(host->ones);
1371
1372 spi->max_speed_hz = mmc->f_max;
1373 mmc_free_host(mmc);
1374 dev_set_drvdata(&spi->dev, NULL);
1375 }
1376 return 0;
1377}
1378
1379
1380static struct spi_driver mmc_spi_driver = {
1381 .driver = {
1382 .name = "mmc_spi",
1383 .bus = &spi_bus_type,
1384 .owner = THIS_MODULE,
1385 },
1386 .probe = mmc_spi_probe,
1387 .remove = __devexit_p(mmc_spi_remove),
1388};
1389
1390
1391static int __init mmc_spi_init(void)
1392{
1393 return spi_register_driver(&mmc_spi_driver);
1394}
1395module_init(mmc_spi_init);
1396
1397
1398static void __exit mmc_spi_exit(void)
1399{
1400 spi_unregister_driver(&mmc_spi_driver);
1401}
1402module_exit(mmc_spi_exit);
1403
1404
1405MODULE_AUTHOR("Mike Lavender, David Brownell, "
1406 "Hans-Peter Nilsson, Jan Nikitenko");
1407MODULE_DESCRIPTION("SPI SD/MMC host driver");
1408MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index be730c0a0352..d0eb0a2abf4d 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -16,6 +16,7 @@
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/highmem.h> 18#include <linux/highmem.h>
19#include <linux/log2.h>
19#include <linux/mmc/host.h> 20#include <linux/mmc/host.h>
20#include <linux/amba/bus.h> 21#include <linux/amba/bus.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
@@ -154,11 +155,11 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
154 } 155 }
155 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { 156 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
156 if (status & MCI_DATACRCFAIL) 157 if (status & MCI_DATACRCFAIL)
157 data->error = MMC_ERR_BADCRC; 158 data->error = -EILSEQ;
158 else if (status & MCI_DATATIMEOUT) 159 else if (status & MCI_DATATIMEOUT)
159 data->error = MMC_ERR_TIMEOUT; 160 data->error = -ETIMEDOUT;
160 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) 161 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
161 data->error = MMC_ERR_FIFO; 162 data->error = -EIO;
162 status |= MCI_DATAEND; 163 status |= MCI_DATAEND;
163 164
164 /* 165 /*
@@ -193,12 +194,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
193 cmd->resp[3] = readl(base + MMCIRESPONSE3); 194 cmd->resp[3] = readl(base + MMCIRESPONSE3);
194 195
195 if (status & MCI_CMDTIMEOUT) { 196 if (status & MCI_CMDTIMEOUT) {
196 cmd->error = MMC_ERR_TIMEOUT; 197 cmd->error = -ETIMEDOUT;
197 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) { 198 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
198 cmd->error = MMC_ERR_BADCRC; 199 cmd->error = -EILSEQ;
199 } 200 }
200 201
201 if (!cmd->data || cmd->error != MMC_ERR_NONE) { 202 if (!cmd->data || cmd->error) {
202 if (host->data) 203 if (host->data)
203 mmci_stop_data(host); 204 mmci_stop_data(host);
204 mmci_request_end(host, cmd->mrq); 205 mmci_request_end(host, cmd->mrq);
@@ -391,6 +392,14 @@ static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
391 392
392 WARN_ON(host->mrq != NULL); 393 WARN_ON(host->mrq != NULL);
393 394
395 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
396 printk(KERN_ERR "%s: Unsupported block size (%d bytes)\n",
397 mmc_hostname(mmc), mrq->data->blksz);
398 mrq->cmd->error = -EINVAL;
399 mmc_request_done(mmc, mrq);
400 return;
401 }
402
394 spin_lock_irq(&host->lock); 403 spin_lock_irq(&host->lock);
395 404
396 host->mrq = mrq; 405 host->mrq = mrq;
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 0cf97edc5f58..60a67dfcda6a 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -263,7 +263,7 @@ mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
263 enum dma_data_direction dma_data_dir; 263 enum dma_data_direction dma_data_dir;
264 264
265 BUG_ON(host->dma_ch < 0); 265 BUG_ON(host->dma_ch < 0);
266 if (data->error != MMC_ERR_NONE) 266 if (data->error)
267 omap_stop_dma(host->dma_ch); 267 omap_stop_dma(host->dma_ch);
268 /* Release DMA channel lazily */ 268 /* Release DMA channel lazily */
269 mod_timer(&host->dma_timer, jiffies + HZ); 269 mod_timer(&host->dma_timer, jiffies + HZ);
@@ -368,7 +368,7 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
368 } 368 }
369 } 369 }
370 370
371 if (host->data == NULL || cmd->error != MMC_ERR_NONE) { 371 if (host->data == NULL || cmd->error) {
372 host->mrq = NULL; 372 host->mrq = NULL;
373 clk_disable(host->fclk); 373 clk_disable(host->fclk);
374 mmc_request_done(host->mmc, cmd->mrq); 374 mmc_request_done(host->mmc, cmd->mrq);
@@ -475,14 +475,14 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
475 if (status & OMAP_MMC_STAT_DATA_TOUT) { 475 if (status & OMAP_MMC_STAT_DATA_TOUT) {
476 dev_dbg(mmc_dev(host->mmc), "data timeout\n"); 476 dev_dbg(mmc_dev(host->mmc), "data timeout\n");
477 if (host->data) { 477 if (host->data) {
478 host->data->error |= MMC_ERR_TIMEOUT; 478 host->data->error = -ETIMEDOUT;
479 transfer_error = 1; 479 transfer_error = 1;
480 } 480 }
481 } 481 }
482 482
483 if (status & OMAP_MMC_STAT_DATA_CRC) { 483 if (status & OMAP_MMC_STAT_DATA_CRC) {
484 if (host->data) { 484 if (host->data) {
485 host->data->error |= MMC_ERR_BADCRC; 485 host->data->error = -EILSEQ;
486 dev_dbg(mmc_dev(host->mmc), 486 dev_dbg(mmc_dev(host->mmc),
487 "data CRC error, bytes left %d\n", 487 "data CRC error, bytes left %d\n",
488 host->total_bytes_left); 488 host->total_bytes_left);
@@ -504,7 +504,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
504 dev_err(mmc_dev(host->mmc), 504 dev_err(mmc_dev(host->mmc),
505 "command timeout, CMD %d\n", 505 "command timeout, CMD %d\n",
506 host->cmd->opcode); 506 host->cmd->opcode);
507 host->cmd->error = MMC_ERR_TIMEOUT; 507 host->cmd->error = -ETIMEDOUT;
508 end_command = 1; 508 end_command = 1;
509 } 509 }
510 } 510 }
@@ -514,7 +514,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
514 dev_err(mmc_dev(host->mmc), 514 dev_err(mmc_dev(host->mmc),
515 "command CRC error (CMD%d, arg 0x%08x)\n", 515 "command CRC error (CMD%d, arg 0x%08x)\n",
516 host->cmd->opcode, host->cmd->arg); 516 host->cmd->opcode, host->cmd->arg);
517 host->cmd->error = MMC_ERR_BADCRC; 517 host->cmd->error = -EILSEQ;
518 end_command = 1; 518 end_command = 1;
519 } else 519 } else
520 dev_err(mmc_dev(host->mmc), 520 dev_err(mmc_dev(host->mmc),
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index ff960334b337..657901eecfce 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -142,6 +142,10 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
142 host->dma_dir); 142 host->dma_dir);
143 143
144 for (i = 0; i < host->dma_len; i++) { 144 for (i = 0; i < host->dma_len; i++) {
145 unsigned int length = sg_dma_len(&data->sg[i]);
146 host->sg_cpu[i].dcmd = dcmd | length;
147 if (length & 31 && !(data->flags & MMC_DATA_READ))
148 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
145 if (data->flags & MMC_DATA_READ) { 149 if (data->flags & MMC_DATA_READ) {
146 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO; 150 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
147 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); 151 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
@@ -149,7 +153,6 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
149 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]); 153 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
150 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO; 154 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
151 } 155 }
152 host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
153 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) * 156 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
154 sizeof(struct pxa_dma_desc); 157 sizeof(struct pxa_dma_desc);
155 } 158 }
@@ -226,7 +229,7 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
226 } 229 }
227 230
228 if (stat & STAT_TIME_OUT_RESPONSE) { 231 if (stat & STAT_TIME_OUT_RESPONSE) {
229 cmd->error = MMC_ERR_TIMEOUT; 232 cmd->error = -ETIMEDOUT;
230 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 233 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
231#ifdef CONFIG_PXA27x 234#ifdef CONFIG_PXA27x
232 /* 235 /*
@@ -239,11 +242,11 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
239 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); 242 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
240 } else 243 } else
241#endif 244#endif
242 cmd->error = MMC_ERR_BADCRC; 245 cmd->error = -EILSEQ;
243 } 246 }
244 247
245 pxamci_disable_irq(host, END_CMD_RES); 248 pxamci_disable_irq(host, END_CMD_RES);
246 if (host->data && cmd->error == MMC_ERR_NONE) { 249 if (host->data && !cmd->error) {
247 pxamci_enable_irq(host, DATA_TRAN_DONE); 250 pxamci_enable_irq(host, DATA_TRAN_DONE);
248 } else { 251 } else {
249 pxamci_finish_request(host, host->mrq); 252 pxamci_finish_request(host, host->mrq);
@@ -264,9 +267,9 @@ static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
264 host->dma_dir); 267 host->dma_dir);
265 268
266 if (stat & STAT_READ_TIME_OUT) 269 if (stat & STAT_READ_TIME_OUT)
267 data->error = MMC_ERR_TIMEOUT; 270 data->error = -ETIMEDOUT;
268 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR)) 271 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
269 data->error = MMC_ERR_BADCRC; 272 data->error = -EILSEQ;
270 273
271 /* 274 /*
272 * There appears to be a hardware design bug here. There seems to 275 * There appears to be a hardware design bug here. There seems to
@@ -274,7 +277,7 @@ static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
274 * This means that if there was an error on any block, we mark all 277 * This means that if there was an error on any block, we mark all
275 * data blocks as being in error. 278 * data blocks as being in error.
276 */ 279 */
277 if (data->error == MMC_ERR_NONE) 280 if (!data->error)
278 data->bytes_xfered = data->blocks * data->blksz; 281 data->bytes_xfered = data->blocks * data->blksz;
279 else 282 else
280 data->bytes_xfered = 0; 283 data->bytes_xfered = 0;
@@ -284,7 +287,7 @@ static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
284 host->data = NULL; 287 host->data = NULL;
285 if (host->mrq->stop) { 288 if (host->mrq->stop) {
286 pxamci_stop_clock(host); 289 pxamci_stop_clock(host);
287 pxamci_start_cmd(host, host->mrq->stop, 0); 290 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
288 } else { 291 } else {
289 pxamci_finish_request(host, host->mrq); 292 pxamci_finish_request(host, host->mrq);
290 } 293 }
@@ -298,7 +301,7 @@ static irqreturn_t pxamci_irq(int irq, void *devid)
298 unsigned int ireg; 301 unsigned int ireg;
299 int handled = 0; 302 int handled = 0;
300 303
301 ireg = readl(host->base + MMC_I_REG); 304 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
302 305
303 if (ireg) { 306 if (ireg) {
304 unsigned stat = readl(host->base + MMC_STAT); 307 unsigned stat = readl(host->base + MMC_STAT);
@@ -309,6 +312,10 @@ static irqreturn_t pxamci_irq(int irq, void *devid)
309 handled |= pxamci_cmd_done(host, stat); 312 handled |= pxamci_cmd_done(host, stat);
310 if (ireg & DATA_TRAN_DONE) 313 if (ireg & DATA_TRAN_DONE)
311 handled |= pxamci_data_done(host, stat); 314 handled |= pxamci_data_done(host, stat);
315 if (ireg & SDIO_INT) {
316 mmc_signal_sdio_irq(host->mmc);
317 handled = 1;
318 }
312 } 319 }
313 320
314 return IRQ_RETVAL(handled); 321 return IRQ_RETVAL(handled);
@@ -382,20 +389,46 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
382 host->cmdat |= CMDAT_INIT; 389 host->cmdat |= CMDAT_INIT;
383 } 390 }
384 391
392 if (ios->bus_width == MMC_BUS_WIDTH_4)
393 host->cmdat |= CMDAT_SD_4DAT;
394 else
395 host->cmdat &= ~CMDAT_SD_4DAT;
396
385 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n", 397 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
386 host->clkrt, host->cmdat); 398 host->clkrt, host->cmdat);
387} 399}
388 400
401static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
402{
403 struct pxamci_host *pxa_host = mmc_priv(host);
404
405 if (enable)
406 pxamci_enable_irq(pxa_host, SDIO_INT);
407 else
408 pxamci_disable_irq(pxa_host, SDIO_INT);
409}
410
389static const struct mmc_host_ops pxamci_ops = { 411static const struct mmc_host_ops pxamci_ops = {
390 .request = pxamci_request, 412 .request = pxamci_request,
391 .get_ro = pxamci_get_ro, 413 .get_ro = pxamci_get_ro,
392 .set_ios = pxamci_set_ios, 414 .set_ios = pxamci_set_ios,
415 .enable_sdio_irq = pxamci_enable_sdio_irq,
393}; 416};
394 417
395static void pxamci_dma_irq(int dma, void *devid) 418static void pxamci_dma_irq(int dma, void *devid)
396{ 419{
397 printk(KERN_ERR "DMA%d: IRQ???\n", dma); 420 struct pxamci_host *host = devid;
398 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; 421 int dcsr = DCSR(dma);
422 DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
423
424 if (dcsr & DCSR_ENDINTR) {
425 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
426 } else {
427 printk(KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n",
428 mmc_hostname(host->mmc), dma, dcsr);
429 host->data->error = -EIO;
430 pxamci_data_done(host, 0);
431 }
399} 432}
400 433
401static irqreturn_t pxamci_detect_irq(int irq, void *devid) 434static irqreturn_t pxamci_detect_irq(int irq, void *devid)
@@ -444,9 +477,9 @@ static int pxamci_probe(struct platform_device *pdev)
444 mmc->max_seg_size = PAGE_SIZE; 477 mmc->max_seg_size = PAGE_SIZE;
445 478
446 /* 479 /*
447 * Block length register is 10 bits. 480 * Block length register is only 10 bits before PXA27x.
448 */ 481 */
449 mmc->max_blk_size = 1023; 482 mmc->max_blk_size = (cpu_is_pxa21x() || cpu_is_pxa25x()) ? 1023 : 2048;
450 483
451 /* 484 /*
452 * Block count register is 16 bits. 485 * Block count register is 16 bits.
@@ -460,6 +493,12 @@ static int pxamci_probe(struct platform_device *pdev)
460 mmc->ocr_avail = host->pdata ? 493 mmc->ocr_avail = host->pdata ?
461 host->pdata->ocr_mask : 494 host->pdata->ocr_mask :
462 MMC_VDD_32_33|MMC_VDD_33_34; 495 MMC_VDD_32_33|MMC_VDD_33_34;
496 mmc->caps = 0;
497 host->cmdat = 0;
498 if (!cpu_is_pxa21x() && !cpu_is_pxa25x()) {
499 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
500 host->cmdat |= CMDAT_SDIO_INT_EN;
501 }
463 502
464 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL); 503 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
465 if (!host->sg_cpu) { 504 if (!host->sg_cpu) {
diff --git a/drivers/mmc/host/pxamci.h b/drivers/mmc/host/pxamci.h
index df17c281278a..3153e779d46a 100644
--- a/drivers/mmc/host/pxamci.h
+++ b/drivers/mmc/host/pxamci.h
@@ -25,6 +25,8 @@
25#define SPI_EN (1 << 0) 25#define SPI_EN (1 << 0)
26 26
27#define MMC_CMDAT 0x0010 27#define MMC_CMDAT 0x0010
28#define CMDAT_SDIO_INT_EN (1 << 11)
29#define CMDAT_SD_4DAT (1 << 8)
28#define CMDAT_DMAEN (1 << 7) 30#define CMDAT_DMAEN (1 << 7)
29#define CMDAT_INIT (1 << 6) 31#define CMDAT_INIT (1 << 6)
30#define CMDAT_BUSY (1 << 5) 32#define CMDAT_BUSY (1 << 5)
diff --git a/drivers/mmc/host/ricoh_mmc.c b/drivers/mmc/host/ricoh_mmc.c
new file mode 100644
index 000000000000..1e8704533bc5
--- /dev/null
+++ b/drivers/mmc/host/ricoh_mmc.c
@@ -0,0 +1,151 @@
1/*
2 * ricoh_mmc.c - Dummy driver to disable the Rioch MMC controller.
3 *
4 * Copyright (C) 2007 Philip Langdale, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12/*
13 * This is a conceptually ridiculous driver, but it is required by the way
14 * the Ricoh multi-function R5C832 works. This chip implements firewire
15 * and four different memory card controllers. Two of those controllers are
16 * an SDHCI controller and a proprietary MMC controller. The linux SDHCI
17 * driver supports MMC cards but the chip detects MMC cards in hardware
18 * and directs them to the MMC controller - so the SDHCI driver never sees
19 * them. To get around this, we must disable the useless MMC controller.
20 * At that point, the SDHCI controller will start seeing them. As a bonus,
21 * a detection event occurs immediately, even if the MMC card is already
22 * in the reader.
23 *
24 * The relevant registers live on the firewire function, so this is unavoidably
25 * ugly. Such is life.
26 */
27
28#include <linux/pci.h>
29
30#define DRIVER_NAME "ricoh-mmc"
31
32static const struct pci_device_id pci_ids[] __devinitdata = {
33 {
34 .vendor = PCI_VENDOR_ID_RICOH,
35 .device = PCI_DEVICE_ID_RICOH_R5C843,
36 .subvendor = PCI_ANY_ID,
37 .subdevice = PCI_ANY_ID,
38 },
39 { /* end: all zeroes */ },
40};
41
42MODULE_DEVICE_TABLE(pci, pci_ids);
43
44static int __devinit ricoh_mmc_probe(struct pci_dev *pdev,
45 const struct pci_device_id *ent)
46{
47 u8 rev;
48
49 struct pci_dev *fw_dev = NULL;
50
51 BUG_ON(pdev == NULL);
52 BUG_ON(ent == NULL);
53
54 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
55
56 printk(KERN_INFO DRIVER_NAME
57 ": Ricoh MMC controller found at %s [%04x:%04x] (rev %x)\n",
58 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
59 (int)rev);
60
61 while ((fw_dev = pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, fw_dev))) {
62 if (PCI_SLOT(pdev->devfn) == PCI_SLOT(fw_dev->devfn) &&
63 pdev->bus == fw_dev->bus) {
64 u8 write_enable;
65 u8 disable;
66
67 pci_read_config_byte(fw_dev, 0xCB, &disable);
68 if (disable & 0x02) {
69 printk(KERN_INFO DRIVER_NAME
70 ": Controller already disabled. Nothing to do.\n");
71 return -ENODEV;
72 }
73
74 pci_read_config_byte(fw_dev, 0xCA, &write_enable);
75 pci_write_config_byte(fw_dev, 0xCA, 0x57);
76 pci_write_config_byte(fw_dev, 0xCB, disable | 0x02);
77 pci_write_config_byte(fw_dev, 0xCA, write_enable);
78
79 pci_set_drvdata(pdev, fw_dev);
80
81 printk(KERN_INFO DRIVER_NAME
82 ": Controller is now disabled.\n");
83
84 break;
85 }
86 }
87
88 if (pci_get_drvdata(pdev) == NULL) {
89 printk(KERN_WARNING DRIVER_NAME
90 ": Main firewire function not found. Cannot disable controller.\n");
91 return -ENODEV;
92 }
93
94 return 0;
95}
96
97static void __devexit ricoh_mmc_remove(struct pci_dev *pdev)
98{
99 u8 write_enable;
100 u8 disable;
101 struct pci_dev *fw_dev = NULL;
102
103 fw_dev = pci_get_drvdata(pdev);
104 BUG_ON(fw_dev == NULL);
105
106 pci_read_config_byte(fw_dev, 0xCA, &write_enable);
107 pci_read_config_byte(fw_dev, 0xCB, &disable);
108 pci_write_config_byte(fw_dev, 0xCA, 0x57);
109 pci_write_config_byte(fw_dev, 0xCB, disable & ~0x02);
110 pci_write_config_byte(fw_dev, 0xCA, write_enable);
111
112 printk(KERN_INFO DRIVER_NAME
113 ": Controller is now re-enabled.\n");
114
115 pci_set_drvdata(pdev, NULL);
116}
117
118static struct pci_driver ricoh_mmc_driver = {
119 .name = DRIVER_NAME,
120 .id_table = pci_ids,
121 .probe = ricoh_mmc_probe,
122 .remove = __devexit_p(ricoh_mmc_remove),
123};
124
125/*****************************************************************************\
126 * *
127 * Driver init/exit *
128 * *
129\*****************************************************************************/
130
131static int __init ricoh_mmc_drv_init(void)
132{
133 printk(KERN_INFO DRIVER_NAME
134 ": Ricoh MMC Controller disabling driver\n");
135 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Philip Langdale\n");
136
137 return pci_register_driver(&ricoh_mmc_driver);
138}
139
140static void __exit ricoh_mmc_drv_exit(void)
141{
142 pci_unregister_driver(&ricoh_mmc_driver);
143}
144
145module_init(ricoh_mmc_drv_init);
146module_exit(ricoh_mmc_drv_exit);
147
148MODULE_AUTHOR("Philip Langdale <philipl@alumni.utexas.net>");
149MODULE_DESCRIPTION("Ricoh MMC Controller disabling driver");
150MODULE_LICENSE("GPL");
151
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 20a7d89e01ba..b397121b947d 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -25,8 +25,6 @@
25#define DBG(f, x...) \ 25#define DBG(f, x...) \
26 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 26 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
27 27
28static unsigned int debug_nodma = 0;
29static unsigned int debug_forcedma = 0;
30static unsigned int debug_quirks = 0; 28static unsigned int debug_quirks = 0;
31 29
32#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) 30#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
@@ -35,6 +33,7 @@ static unsigned int debug_quirks = 0;
35#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) 33#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
36#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) 34#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
37#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) 35#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
36#define SDHCI_QUIRK_BROKEN_DMA (1<<5)
38 37
39static const struct pci_device_id pci_ids[] __devinitdata = { 38static const struct pci_device_id pci_ids[] __devinitdata = {
40 { 39 {
@@ -68,7 +67,8 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
68 .device = PCI_DEVICE_ID_ENE_CB712_SD, 67 .device = PCI_DEVICE_ID_ENE_CB712_SD,
69 .subvendor = PCI_ANY_ID, 68 .subvendor = PCI_ANY_ID,
70 .subdevice = PCI_ANY_ID, 69 .subdevice = PCI_ANY_ID,
71 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE, 70 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
71 SDHCI_QUIRK_BROKEN_DMA,
72 }, 72 },
73 73
74 { 74 {
@@ -76,7 +76,8 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
76 .device = PCI_DEVICE_ID_ENE_CB712_SD_2, 76 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
77 .subvendor = PCI_ANY_ID, 77 .subvendor = PCI_ANY_ID,
78 .subdevice = PCI_ANY_ID, 78 .subdevice = PCI_ANY_ID,
79 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE, 79 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
80 SDHCI_QUIRK_BROKEN_DMA,
80 }, 81 },
81 82
82 { 83 {
@@ -132,7 +133,7 @@ static void sdhci_dumpregs(struct sdhci_host *host)
132 readb(host->ioaddr + SDHCI_POWER_CONTROL), 133 readb(host->ioaddr + SDHCI_POWER_CONTROL),
133 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL)); 134 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
134 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 135 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
135 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL), 136 readb(host->ioaddr + SDHCI_WAKE_UP_CONTROL),
136 readw(host->ioaddr + SDHCI_CLOCK_CONTROL)); 137 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
137 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 138 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
138 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL), 139 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
@@ -481,16 +482,16 @@ static void sdhci_finish_data(struct sdhci_host *host)
481 * Controller doesn't count down when in single block mode. 482 * Controller doesn't count down when in single block mode.
482 */ 483 */
483 if (data->blocks == 1) 484 if (data->blocks == 1)
484 blocks = (data->error == MMC_ERR_NONE) ? 0 : 1; 485 blocks = (data->error == 0) ? 0 : 1;
485 else 486 else
486 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT); 487 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
487 data->bytes_xfered = data->blksz * (data->blocks - blocks); 488 data->bytes_xfered = data->blksz * (data->blocks - blocks);
488 489
489 if ((data->error == MMC_ERR_NONE) && blocks) { 490 if (!data->error && blocks) {
490 printk(KERN_ERR "%s: Controller signalled completion even " 491 printk(KERN_ERR "%s: Controller signalled completion even "
491 "though there were blocks left.\n", 492 "though there were blocks left.\n",
492 mmc_hostname(host->mmc)); 493 mmc_hostname(host->mmc));
493 data->error = MMC_ERR_FAILED; 494 data->error = -EIO;
494 } 495 }
495 496
496 if (data->stop) { 497 if (data->stop) {
@@ -498,7 +499,7 @@ static void sdhci_finish_data(struct sdhci_host *host)
498 * The controller needs a reset of internal state machines 499 * The controller needs a reset of internal state machines
499 * upon error conditions. 500 * upon error conditions.
500 */ 501 */
501 if (data->error != MMC_ERR_NONE) { 502 if (data->error) {
502 sdhci_reset(host, SDHCI_RESET_CMD); 503 sdhci_reset(host, SDHCI_RESET_CMD);
503 sdhci_reset(host, SDHCI_RESET_DATA); 504 sdhci_reset(host, SDHCI_RESET_DATA);
504 } 505 }
@@ -533,7 +534,7 @@ static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
533 printk(KERN_ERR "%s: Controller never released " 534 printk(KERN_ERR "%s: Controller never released "
534 "inhibit bit(s).\n", mmc_hostname(host->mmc)); 535 "inhibit bit(s).\n", mmc_hostname(host->mmc));
535 sdhci_dumpregs(host); 536 sdhci_dumpregs(host);
536 cmd->error = MMC_ERR_FAILED; 537 cmd->error = -EIO;
537 tasklet_schedule(&host->finish_tasklet); 538 tasklet_schedule(&host->finish_tasklet);
538 return; 539 return;
539 } 540 }
@@ -554,7 +555,7 @@ static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
554 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 555 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
555 printk(KERN_ERR "%s: Unsupported response type!\n", 556 printk(KERN_ERR "%s: Unsupported response type!\n",
556 mmc_hostname(host->mmc)); 557 mmc_hostname(host->mmc));
557 cmd->error = MMC_ERR_INVALID; 558 cmd->error = -EINVAL;
558 tasklet_schedule(&host->finish_tasklet); 559 tasklet_schedule(&host->finish_tasklet);
559 return; 560 return;
560 } 561 }
@@ -601,7 +602,7 @@ static void sdhci_finish_command(struct sdhci_host *host)
601 } 602 }
602 } 603 }
603 604
604 host->cmd->error = MMC_ERR_NONE; 605 host->cmd->error = 0;
605 606
606 if (host->data && host->data_early) 607 if (host->data && host->data_early)
607 sdhci_finish_data(host); 608 sdhci_finish_data(host);
@@ -722,7 +723,7 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
722 host->mrq = mrq; 723 host->mrq = mrq;
723 724
724 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { 725 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
725 host->mrq->cmd->error = MMC_ERR_TIMEOUT; 726 host->mrq->cmd->error = -ENOMEDIUM;
726 tasklet_schedule(&host->finish_tasklet); 727 tasklet_schedule(&host->finish_tasklet);
727 } else 728 } else
728 sdhci_send_command(host, mrq->cmd); 729 sdhci_send_command(host, mrq->cmd);
@@ -800,10 +801,35 @@ static int sdhci_get_ro(struct mmc_host *mmc)
800 return !(present & SDHCI_WRITE_PROTECT); 801 return !(present & SDHCI_WRITE_PROTECT);
801} 802}
802 803
804static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
805{
806 struct sdhci_host *host;
807 unsigned long flags;
808 u32 ier;
809
810 host = mmc_priv(mmc);
811
812 spin_lock_irqsave(&host->lock, flags);
813
814 ier = readl(host->ioaddr + SDHCI_INT_ENABLE);
815
816 ier &= ~SDHCI_INT_CARD_INT;
817 if (enable)
818 ier |= SDHCI_INT_CARD_INT;
819
820 writel(ier, host->ioaddr + SDHCI_INT_ENABLE);
821 writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);
822
823 mmiowb();
824
825 spin_unlock_irqrestore(&host->lock, flags);
826}
827
803static const struct mmc_host_ops sdhci_ops = { 828static const struct mmc_host_ops sdhci_ops = {
804 .request = sdhci_request, 829 .request = sdhci_request,
805 .set_ios = sdhci_set_ios, 830 .set_ios = sdhci_set_ios,
806 .get_ro = sdhci_get_ro, 831 .get_ro = sdhci_get_ro,
832 .enable_sdio_irq = sdhci_enable_sdio_irq,
807}; 833};
808 834
809/*****************************************************************************\ 835/*****************************************************************************\
@@ -831,7 +857,7 @@ static void sdhci_tasklet_card(unsigned long param)
831 sdhci_reset(host, SDHCI_RESET_CMD); 857 sdhci_reset(host, SDHCI_RESET_CMD);
832 sdhci_reset(host, SDHCI_RESET_DATA); 858 sdhci_reset(host, SDHCI_RESET_DATA);
833 859
834 host->mrq->cmd->error = MMC_ERR_FAILED; 860 host->mrq->cmd->error = -ENOMEDIUM;
835 tasklet_schedule(&host->finish_tasklet); 861 tasklet_schedule(&host->finish_tasklet);
836 } 862 }
837 } 863 }
@@ -859,9 +885,9 @@ static void sdhci_tasklet_finish(unsigned long param)
859 * The controller needs a reset of internal state machines 885 * The controller needs a reset of internal state machines
860 * upon error conditions. 886 * upon error conditions.
861 */ 887 */
862 if ((mrq->cmd->error != MMC_ERR_NONE) || 888 if (mrq->cmd->error ||
863 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) || 889 (mrq->data && (mrq->data->error ||
864 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) { 890 (mrq->data->stop && mrq->data->stop->error)))) {
865 891
866 /* Some controllers need this kick or reset won't work here */ 892 /* Some controllers need this kick or reset won't work here */
867 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { 893 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
@@ -906,13 +932,13 @@ static void sdhci_timeout_timer(unsigned long data)
906 sdhci_dumpregs(host); 932 sdhci_dumpregs(host);
907 933
908 if (host->data) { 934 if (host->data) {
909 host->data->error = MMC_ERR_TIMEOUT; 935 host->data->error = -ETIMEDOUT;
910 sdhci_finish_data(host); 936 sdhci_finish_data(host);
911 } else { 937 } else {
912 if (host->cmd) 938 if (host->cmd)
913 host->cmd->error = MMC_ERR_TIMEOUT; 939 host->cmd->error = -ETIMEDOUT;
914 else 940 else
915 host->mrq->cmd->error = MMC_ERR_TIMEOUT; 941 host->mrq->cmd->error = -ETIMEDOUT;
916 942
917 tasklet_schedule(&host->finish_tasklet); 943 tasklet_schedule(&host->finish_tasklet);
918 } 944 }
@@ -941,13 +967,12 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
941 } 967 }
942 968
943 if (intmask & SDHCI_INT_TIMEOUT) 969 if (intmask & SDHCI_INT_TIMEOUT)
944 host->cmd->error = MMC_ERR_TIMEOUT; 970 host->cmd->error = -ETIMEDOUT;
945 else if (intmask & SDHCI_INT_CRC) 971 else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
946 host->cmd->error = MMC_ERR_BADCRC; 972 SDHCI_INT_INDEX))
947 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX)) 973 host->cmd->error = -EILSEQ;
948 host->cmd->error = MMC_ERR_FAILED;
949 974
950 if (host->cmd->error != MMC_ERR_NONE) 975 if (host->cmd->error)
951 tasklet_schedule(&host->finish_tasklet); 976 tasklet_schedule(&host->finish_tasklet);
952 else if (intmask & SDHCI_INT_RESPONSE) 977 else if (intmask & SDHCI_INT_RESPONSE)
953 sdhci_finish_command(host); 978 sdhci_finish_command(host);
@@ -974,13 +999,11 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
974 } 999 }
975 1000
976 if (intmask & SDHCI_INT_DATA_TIMEOUT) 1001 if (intmask & SDHCI_INT_DATA_TIMEOUT)
977 host->data->error = MMC_ERR_TIMEOUT; 1002 host->data->error = -ETIMEDOUT;
978 else if (intmask & SDHCI_INT_DATA_CRC) 1003 else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
979 host->data->error = MMC_ERR_BADCRC; 1004 host->data->error = -EILSEQ;
980 else if (intmask & SDHCI_INT_DATA_END_BIT)
981 host->data->error = MMC_ERR_FAILED;
982 1005
983 if (host->data->error != MMC_ERR_NONE) 1006 if (host->data->error)
984 sdhci_finish_data(host); 1007 sdhci_finish_data(host);
985 else { 1008 else {
986 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 1009 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
@@ -1015,6 +1038,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
1015 irqreturn_t result; 1038 irqreturn_t result;
1016 struct sdhci_host* host = dev_id; 1039 struct sdhci_host* host = dev_id;
1017 u32 intmask; 1040 u32 intmask;
1041 int cardint = 0;
1018 1042
1019 spin_lock(&host->lock); 1043 spin_lock(&host->lock);
1020 1044
@@ -1059,6 +1083,11 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
1059 1083
1060 intmask &= ~SDHCI_INT_BUS_POWER; 1084 intmask &= ~SDHCI_INT_BUS_POWER;
1061 1085
1086 if (intmask & SDHCI_INT_CARD_INT)
1087 cardint = 1;
1088
1089 intmask &= ~SDHCI_INT_CARD_INT;
1090
1062 if (intmask) { 1091 if (intmask) {
1063 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", 1092 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1064 mmc_hostname(host->mmc), intmask); 1093 mmc_hostname(host->mmc), intmask);
@@ -1073,6 +1102,12 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
1073out: 1102out:
1074 spin_unlock(&host->lock); 1103 spin_unlock(&host->lock);
1075 1104
1105 /*
1106 * We have to delay this as it calls back into the driver.
1107 */
1108 if (cardint)
1109 mmc_signal_sdio_irq(host->mmc);
1110
1076 return result; 1111 return result;
1077} 1112}
1078 1113
@@ -1258,20 +1293,26 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1258 1293
1259 caps = readl(host->ioaddr + SDHCI_CAPABILITIES); 1294 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1260 1295
1261 if (debug_nodma) 1296 if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1262 DBG("DMA forced off\n");
1263 else if (debug_forcedma) {
1264 DBG("DMA forced on\n");
1265 host->flags |= SDHCI_USE_DMA;
1266 } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1267 host->flags |= SDHCI_USE_DMA; 1297 host->flags |= SDHCI_USE_DMA;
1268 else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1269 DBG("Controller doesn't have DMA interface\n");
1270 else if (!(caps & SDHCI_CAN_DO_DMA)) 1298 else if (!(caps & SDHCI_CAN_DO_DMA))
1271 DBG("Controller doesn't have DMA capability\n"); 1299 DBG("Controller doesn't have DMA capability\n");
1272 else 1300 else
1273 host->flags |= SDHCI_USE_DMA; 1301 host->flags |= SDHCI_USE_DMA;
1274 1302
1303 if ((chip->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1304 (host->flags & SDHCI_USE_DMA)) {
1305 DBG("Disabling DMA as it is marked broken");
1306 host->flags &= ~SDHCI_USE_DMA;
1307 }
1308
1309 if (((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1310 (host->flags & SDHCI_USE_DMA)) {
1311 printk(KERN_WARNING "%s: Will use DMA "
1312 "mode even though HW doesn't fully "
1313 "claim to support it.\n", host->slot_descr);
1314 }
1315
1275 if (host->flags & SDHCI_USE_DMA) { 1316 if (host->flags & SDHCI_USE_DMA) {
1276 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { 1317 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1277 printk(KERN_WARNING "%s: No suitable DMA available. " 1318 printk(KERN_WARNING "%s: No suitable DMA available. "
@@ -1312,7 +1353,7 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1312 mmc->ops = &sdhci_ops; 1353 mmc->ops = &sdhci_ops;
1313 mmc->f_min = host->max_clk / 256; 1354 mmc->f_min = host->max_clk / 256;
1314 mmc->f_max = host->max_clk; 1355 mmc->f_max = host->max_clk;
1315 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; 1356 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_SDIO_IRQ;
1316 1357
1317 if (caps & SDHCI_CAN_DO_HISPD) 1358 if (caps & SDHCI_CAN_DO_HISPD)
1318 mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1359 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
@@ -1565,14 +1606,10 @@ static void __exit sdhci_drv_exit(void)
1565module_init(sdhci_drv_init); 1606module_init(sdhci_drv_init);
1566module_exit(sdhci_drv_exit); 1607module_exit(sdhci_drv_exit);
1567 1608
1568module_param(debug_nodma, uint, 0444);
1569module_param(debug_forcedma, uint, 0444);
1570module_param(debug_quirks, uint, 0444); 1609module_param(debug_quirks, uint, 0444);
1571 1610
1572MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); 1611MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1573MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver"); 1612MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1574MODULE_LICENSE("GPL"); 1613MODULE_LICENSE("GPL");
1575 1614
1576MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1577MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1578MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 1615MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index e28987d6d2eb..05195ea900f4 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -81,7 +81,7 @@
81 81
82#define SDHCI_BLOCK_GAP_CONTROL 0x2A 82#define SDHCI_BLOCK_GAP_CONTROL 0x2A
83 83
84#define SDHCI_WALK_UP_CONTROL 0x2B 84#define SDHCI_WAKE_UP_CONTROL 0x2B
85 85
86#define SDHCI_CLOCK_CONTROL 0x2C 86#define SDHCI_CLOCK_CONTROL 0x2C
87#define SDHCI_DIVIDER_SHIFT 8 87#define SDHCI_DIVIDER_SHIFT 8
diff --git a/drivers/mmc/host/tifm_sd.c b/drivers/mmc/host/tifm_sd.c
index 8b736e968447..9b904795eb77 100644
--- a/drivers/mmc/host/tifm_sd.c
+++ b/drivers/mmc/host/tifm_sd.c
@@ -16,6 +16,7 @@
16#include <linux/mmc/host.h> 16#include <linux/mmc/host.h>
17#include <linux/highmem.h> 17#include <linux/highmem.h>
18#include <linux/scatterlist.h> 18#include <linux/scatterlist.h>
19#include <linux/log2.h>
19#include <asm/io.h> 20#include <asm/io.h>
20 21
21#define DRIVER_NAME "tifm_sd" 22#define DRIVER_NAME "tifm_sd"
@@ -404,14 +405,14 @@ static void tifm_sd_check_status(struct tifm_sd *host)
404 struct tifm_dev *sock = host->dev; 405 struct tifm_dev *sock = host->dev;
405 struct mmc_command *cmd = host->req->cmd; 406 struct mmc_command *cmd = host->req->cmd;
406 407
407 if (cmd->error != MMC_ERR_NONE) 408 if (cmd->error)
408 goto finish_request; 409 goto finish_request;
409 410
410 if (!(host->cmd_flags & CMD_READY)) 411 if (!(host->cmd_flags & CMD_READY))
411 return; 412 return;
412 413
413 if (cmd->data) { 414 if (cmd->data) {
414 if (cmd->data->error != MMC_ERR_NONE) { 415 if (cmd->data->error) {
415 if ((host->cmd_flags & SCMD_ACTIVE) 416 if ((host->cmd_flags & SCMD_ACTIVE)
416 && !(host->cmd_flags & SCMD_READY)) 417 && !(host->cmd_flags & SCMD_READY))
417 return; 418 return;
@@ -504,7 +505,7 @@ static void tifm_sd_card_event(struct tifm_dev *sock)
504{ 505{
505 struct tifm_sd *host; 506 struct tifm_sd *host;
506 unsigned int host_status = 0; 507 unsigned int host_status = 0;
507 int cmd_error = MMC_ERR_NONE; 508 int cmd_error = 0;
508 struct mmc_command *cmd = NULL; 509 struct mmc_command *cmd = NULL;
509 unsigned long flags; 510 unsigned long flags;
510 511
@@ -521,15 +522,15 @@ static void tifm_sd_card_event(struct tifm_dev *sock)
521 writel(host_status & TIFM_MMCSD_ERRMASK, 522 writel(host_status & TIFM_MMCSD_ERRMASK,
522 sock->addr + SOCK_MMCSD_STATUS); 523 sock->addr + SOCK_MMCSD_STATUS);
523 if (host_status & TIFM_MMCSD_CTO) 524 if (host_status & TIFM_MMCSD_CTO)
524 cmd_error = MMC_ERR_TIMEOUT; 525 cmd_error = -ETIMEDOUT;
525 else if (host_status & TIFM_MMCSD_CCRC) 526 else if (host_status & TIFM_MMCSD_CCRC)
526 cmd_error = MMC_ERR_BADCRC; 527 cmd_error = -EILSEQ;
527 528
528 if (cmd->data) { 529 if (cmd->data) {
529 if (host_status & TIFM_MMCSD_DTO) 530 if (host_status & TIFM_MMCSD_DTO)
530 cmd->data->error = MMC_ERR_TIMEOUT; 531 cmd->data->error = -ETIMEDOUT;
531 else if (host_status & TIFM_MMCSD_DCRC) 532 else if (host_status & TIFM_MMCSD_DCRC)
532 cmd->data->error = MMC_ERR_BADCRC; 533 cmd->data->error = -EILSEQ;
533 } 534 }
534 535
535 writel(TIFM_FIFO_INT_SETALL, 536 writel(TIFM_FIFO_INT_SETALL,
@@ -626,14 +627,21 @@ static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
626 627
627 spin_lock_irqsave(&sock->lock, flags); 628 spin_lock_irqsave(&sock->lock, flags);
628 if (host->eject) { 629 if (host->eject) {
629 spin_unlock_irqrestore(&sock->lock, flags); 630 mrq->cmd->error = -ENOMEDIUM;
630 goto err_out; 631 goto err_out;
631 } 632 }
632 633
633 if (host->req) { 634 if (host->req) {
634 printk(KERN_ERR "%s : unfinished request detected\n", 635 printk(KERN_ERR "%s : unfinished request detected\n",
635 sock->dev.bus_id); 636 sock->dev.bus_id);
636 spin_unlock_irqrestore(&sock->lock, flags); 637 mrq->cmd->error = -ETIMEDOUT;
638 goto err_out;
639 }
640
641 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
642 printk(KERN_ERR "%s: Unsupported block size (%d bytes)\n",
643 sock->dev.bus_id, mrq->data->blksz);
644 mrq->cmd->error = -EINVAL;
637 goto err_out; 645 goto err_out;
638 } 646 }
639 647
@@ -722,7 +730,7 @@ static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
722 return; 730 return;
723 731
724err_out: 732err_out:
725 mrq->cmd->error = MMC_ERR_TIMEOUT; 733 spin_unlock_irqrestore(&sock->lock, flags);
726 mmc_request_done(mmc, mrq); 734 mmc_request_done(mmc, mrq);
727} 735}
728 736
@@ -1012,9 +1020,9 @@ static void tifm_sd_remove(struct tifm_dev *sock)
1012 writel(TIFM_FIFO_INT_SETALL, 1020 writel(TIFM_FIFO_INT_SETALL,
1013 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 1021 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1014 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 1022 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
1015 host->req->cmd->error = MMC_ERR_TIMEOUT; 1023 host->req->cmd->error = -ENOMEDIUM;
1016 if (host->req->stop) 1024 if (host->req->stop)
1017 host->req->stop->error = MMC_ERR_TIMEOUT; 1025 host->req->stop->error = -ENOMEDIUM;
1018 tasklet_schedule(&host->finish_tasklet); 1026 tasklet_schedule(&host->finish_tasklet);
1019 } 1027 }
1020 spin_unlock_irqrestore(&sock->lock, flags); 1028 spin_unlock_irqrestore(&sock->lock, flags);
diff --git a/drivers/mmc/host/wbsd.c b/drivers/mmc/host/wbsd.c
index 9bf2a877113b..80db11c05f2a 100644
--- a/drivers/mmc/host/wbsd.c
+++ b/drivers/mmc/host/wbsd.c
@@ -317,7 +317,7 @@ static inline void wbsd_get_short_reply(struct wbsd_host *host,
317 * Correct response type? 317 * Correct response type?
318 */ 318 */
319 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) { 319 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
320 cmd->error = MMC_ERR_INVALID; 320 cmd->error = -EILSEQ;
321 return; 321 return;
322 } 322 }
323 323
@@ -337,7 +337,7 @@ static inline void wbsd_get_long_reply(struct wbsd_host *host,
337 * Correct response type? 337 * Correct response type?
338 */ 338 */
339 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) { 339 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
340 cmd->error = MMC_ERR_INVALID; 340 cmd->error = -EILSEQ;
341 return; 341 return;
342 } 342 }
343 343
@@ -372,7 +372,7 @@ static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
372 for (i = 3; i >= 0; i--) 372 for (i = 3; i >= 0; i--)
373 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR); 373 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
374 374
375 cmd->error = MMC_ERR_NONE; 375 cmd->error = 0;
376 376
377 /* 377 /*
378 * Wait for the request to complete. 378 * Wait for the request to complete.
@@ -392,13 +392,13 @@ static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
392 392
393 /* Card removed? */ 393 /* Card removed? */
394 if (isr & WBSD_INT_CARD) 394 if (isr & WBSD_INT_CARD)
395 cmd->error = MMC_ERR_TIMEOUT; 395 cmd->error = -ENOMEDIUM;
396 /* Timeout? */ 396 /* Timeout? */
397 else if (isr & WBSD_INT_TIMEOUT) 397 else if (isr & WBSD_INT_TIMEOUT)
398 cmd->error = MMC_ERR_TIMEOUT; 398 cmd->error = -ETIMEDOUT;
399 /* CRC? */ 399 /* CRC? */
400 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC)) 400 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
401 cmd->error = MMC_ERR_BADCRC; 401 cmd->error = -EILSEQ;
402 /* All ok */ 402 /* All ok */
403 else { 403 else {
404 if (cmd->flags & MMC_RSP_136) 404 if (cmd->flags & MMC_RSP_136)
@@ -585,7 +585,7 @@ static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
585 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH); 585 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
586 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF); 586 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
587 } else { 587 } else {
588 data->error = MMC_ERR_INVALID; 588 data->error = -EINVAL;
589 return; 589 return;
590 } 590 }
591 591
@@ -607,7 +607,7 @@ static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
607 */ 607 */
608 BUG_ON(size > 0x10000); 608 BUG_ON(size > 0x10000);
609 if (size > 0x10000) { 609 if (size > 0x10000) {
610 data->error = MMC_ERR_INVALID; 610 data->error = -EINVAL;
611 return; 611 return;
612 } 612 }
613 613
@@ -669,7 +669,7 @@ static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
669 } 669 }
670 } 670 }
671 671
672 data->error = MMC_ERR_NONE; 672 data->error = 0;
673} 673}
674 674
675static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data) 675static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
@@ -724,8 +724,8 @@ static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
724 "%d bytes left.\n", 724 "%d bytes left.\n",
725 mmc_hostname(host->mmc), count); 725 mmc_hostname(host->mmc), count);
726 726
727 if (data->error == MMC_ERR_NONE) 727 if (!data->error)
728 data->error = MMC_ERR_FAILED; 728 data->error = -EIO;
729 } else { 729 } else {
730 /* 730 /*
731 * Transfer data from DMA buffer to 731 * Transfer data from DMA buffer to
@@ -735,7 +735,7 @@ static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
735 wbsd_dma_to_sg(host, data); 735 wbsd_dma_to_sg(host, data);
736 } 736 }
737 737
738 if (data->error != MMC_ERR_NONE) { 738 if (data->error) {
739 if (data->bytes_xfered) 739 if (data->bytes_xfered)
740 data->bytes_xfered -= data->blksz; 740 data->bytes_xfered -= data->blksz;
741 } 741 }
@@ -767,11 +767,10 @@ static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
767 host->mrq = mrq; 767 host->mrq = mrq;
768 768
769 /* 769 /*
770 * If there is no card in the slot then 770 * Check that there is actually a card in the slot.
771 * timeout immediatly.
772 */ 771 */
773 if (!(host->flags & WBSD_FCARD_PRESENT)) { 772 if (!(host->flags & WBSD_FCARD_PRESENT)) {
774 cmd->error = MMC_ERR_TIMEOUT; 773 cmd->error = -ENOMEDIUM;
775 goto done; 774 goto done;
776 } 775 }
777 776
@@ -807,7 +806,7 @@ static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
807 "supported by this controller.\n", 806 "supported by this controller.\n",
808 mmc_hostname(host->mmc), cmd->opcode); 807 mmc_hostname(host->mmc), cmd->opcode);
809#endif 808#endif
810 cmd->error = MMC_ERR_INVALID; 809 cmd->error = -EINVAL;
811 810
812 goto done; 811 goto done;
813 }; 812 };
@@ -819,7 +818,7 @@ static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
819 if (cmd->data) { 818 if (cmd->data) {
820 wbsd_prepare_data(host, cmd->data); 819 wbsd_prepare_data(host, cmd->data);
821 820
822 if (cmd->data->error != MMC_ERR_NONE) 821 if (cmd->data->error)
823 goto done; 822 goto done;
824 } 823 }
825 824
@@ -830,7 +829,7 @@ static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
830 * will be finished after the data has 829 * will be finished after the data has
831 * transfered. 830 * transfered.
832 */ 831 */
833 if (cmd->data && (cmd->error == MMC_ERR_NONE)) { 832 if (cmd->data && !cmd->error) {
834 /* 833 /*
835 * Dirty fix for hardware bug. 834 * Dirty fix for hardware bug.
836 */ 835 */
@@ -1033,7 +1032,7 @@ static void wbsd_tasklet_card(unsigned long param)
1033 mmc_hostname(host->mmc)); 1032 mmc_hostname(host->mmc));
1034 wbsd_reset(host); 1033 wbsd_reset(host);
1035 1034
1036 host->mrq->cmd->error = MMC_ERR_FAILED; 1035 host->mrq->cmd->error = -ENOMEDIUM;
1037 tasklet_schedule(&host->finish_tasklet); 1036 tasklet_schedule(&host->finish_tasklet);
1038 } 1037 }
1039 1038
@@ -1097,7 +1096,7 @@ static void wbsd_tasklet_crc(unsigned long param)
1097 1096
1098 DBGF("CRC error\n"); 1097 DBGF("CRC error\n");
1099 1098
1100 data->error = MMC_ERR_BADCRC; 1099 data->error = -EILSEQ;
1101 1100
1102 tasklet_schedule(&host->finish_tasklet); 1101 tasklet_schedule(&host->finish_tasklet);
1103 1102
@@ -1121,7 +1120,7 @@ static void wbsd_tasklet_timeout(unsigned long param)
1121 1120
1122 DBGF("Timeout\n"); 1121 DBGF("Timeout\n");
1123 1122
1124 data->error = MMC_ERR_TIMEOUT; 1123 data->error = -ETIMEDOUT;
1125 1124
1126 tasklet_schedule(&host->finish_tasklet); 1125 tasklet_schedule(&host->finish_tasklet);
1127 1126
@@ -1220,7 +1219,7 @@ static int __devinit wbsd_alloc_mmc(struct device *dev)
1220 mmc->f_min = 375000; 1219 mmc->f_min = 375000;
1221 mmc->f_max = 24000000; 1220 mmc->f_max = 24000000;
1222 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1221 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1223 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; 1222 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
1224 1223
1225 spin_lock_init(&host->lock); 1224 spin_lock_init(&host->lock);
1226 1225
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index d590a99930fa..2305cc450a45 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -45,7 +45,7 @@
45 45
46#include "cpqphp.h" 46#include "cpqphp.h"
47#include "cpqphp_nvram.h" 47#include "cpqphp_nvram.h"
48#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */ 48#include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */
49 49
50 50
51/* Global variables */ 51/* Global variables */
diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_pci.c
index fc7c74d72595..3f6cd20e95d2 100644
--- a/drivers/pci/hotplug/cpqphp_pci.c
+++ b/drivers/pci/hotplug/cpqphp_pci.c
@@ -37,7 +37,7 @@
37#include "../pci.h" 37#include "../pci.h"
38#include "cpqphp.h" 38#include "cpqphp.h"
39#include "cpqphp_nvram.h" 39#include "cpqphp_nvram.h"
40#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */ 40#include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */
41 41
42 42
43u8 cpqhp_nic_irq; 43u8 cpqhp_nic_irq;
diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c
index 0316eeaaeb29..a90c28d0c69d 100644
--- a/drivers/pci/hotplug/ibmphp_core.c
+++ b/drivers/pci/hotplug/ibmphp_core.c
@@ -35,7 +35,7 @@
35#include <linux/delay.h> 35#include <linux/delay.h>
36#include <linux/wait.h> 36#include <linux/wait.h>
37#include "../pci.h" 37#include "../pci.h"
38#include "../../../arch/i386/pci/pci.h" /* for struct irq_routing_table */ 38#include "../../../arch/x86/pci/pci.h" /* for struct irq_routing_table */
39#include "ibmphp.h" 39#include "ibmphp.h"
40 40
41#define attn_on(sl) ibmphp_hpc_writeslot (sl, HPC_SLOT_ATTNON) 41#define attn_on(sl) ibmphp_hpc_writeslot (sl, HPC_SLOT_ATTNON)
diff --git a/drivers/pnp/pnpbios/core.c b/drivers/pnp/pnpbios/core.c
index 0691f473e9d4..4e9fd37cff35 100644
--- a/drivers/pnp/pnpbios/core.c
+++ b/drivers/pnp/pnpbios/core.c
@@ -500,7 +500,7 @@ static int __init pnpbios_probe_system(void)
500 return 0; 500 return 0;
501} 501}
502 502
503static int __init exploding_pnp_bios(struct dmi_system_id *d) 503static int __init exploding_pnp_bios(const struct dmi_system_id *d)
504{ 504{
505 printk(KERN_WARNING "%s detected. Disabling PnPBIOS\n", d->ident); 505 printk(KERN_WARNING "%s detected. Disabling PnPBIOS\n", d->ident);
506 return 0; 506 return 0;
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c
index d32c60dbdd82..571320ab9e1a 100644
--- a/drivers/s390/block/dasd_diag.c
+++ b/drivers/s390/block/dasd_diag.c
@@ -472,14 +472,13 @@ dasd_diag_build_cp(struct dasd_device * device, struct request *req)
472 struct dasd_ccw_req *cqr; 472 struct dasd_ccw_req *cqr;
473 struct dasd_diag_req *dreq; 473 struct dasd_diag_req *dreq;
474 struct dasd_diag_bio *dbio; 474 struct dasd_diag_bio *dbio;
475 struct bio *bio; 475 struct req_iterator iter;
476 struct bio_vec *bv; 476 struct bio_vec *bv;
477 char *dst; 477 char *dst;
478 unsigned int count, datasize; 478 unsigned int count, datasize;
479 sector_t recid, first_rec, last_rec; 479 sector_t recid, first_rec, last_rec;
480 unsigned int blksize, off; 480 unsigned int blksize, off;
481 unsigned char rw_cmd; 481 unsigned char rw_cmd;
482 int i;
483 482
484 if (rq_data_dir(req) == READ) 483 if (rq_data_dir(req) == READ)
485 rw_cmd = MDSK_READ_REQ; 484 rw_cmd = MDSK_READ_REQ;
@@ -493,13 +492,11 @@ dasd_diag_build_cp(struct dasd_device * device, struct request *req)
493 last_rec = (req->sector + req->nr_sectors - 1) >> device->s2b_shift; 492 last_rec = (req->sector + req->nr_sectors - 1) >> device->s2b_shift;
494 /* Check struct bio and count the number of blocks for the request. */ 493 /* Check struct bio and count the number of blocks for the request. */
495 count = 0; 494 count = 0;
496 rq_for_each_bio(bio, req) { 495 rq_for_each_segment(bv, req, iter) {
497 bio_for_each_segment(bv, bio, i) { 496 if (bv->bv_len & (blksize - 1))
498 if (bv->bv_len & (blksize - 1)) 497 /* Fba can only do full blocks. */
499 /* Fba can only do full blocks. */ 498 return ERR_PTR(-EINVAL);
500 return ERR_PTR(-EINVAL); 499 count += bv->bv_len >> (device->s2b_shift + 9);
501 count += bv->bv_len >> (device->s2b_shift + 9);
502 }
503 } 500 }
504 /* Paranoia. */ 501 /* Paranoia. */
505 if (count != last_rec - first_rec + 1) 502 if (count != last_rec - first_rec + 1)
@@ -516,18 +513,16 @@ dasd_diag_build_cp(struct dasd_device * device, struct request *req)
516 dreq->block_count = count; 513 dreq->block_count = count;
517 dbio = dreq->bio; 514 dbio = dreq->bio;
518 recid = first_rec; 515 recid = first_rec;
519 rq_for_each_bio(bio, req) { 516 rq_for_each_segment(bv, req, iter) {
520 bio_for_each_segment(bv, bio, i) { 517 dst = page_address(bv->bv_page) + bv->bv_offset;
521 dst = page_address(bv->bv_page) + bv->bv_offset; 518 for (off = 0; off < bv->bv_len; off += blksize) {
522 for (off = 0; off < bv->bv_len; off += blksize) { 519 memset(dbio, 0, sizeof (struct dasd_diag_bio));
523 memset(dbio, 0, sizeof (struct dasd_diag_bio)); 520 dbio->type = rw_cmd;
524 dbio->type = rw_cmd; 521 dbio->block_number = recid + 1;
525 dbio->block_number = recid + 1; 522 dbio->buffer = dst;
526 dbio->buffer = dst; 523 dbio++;
527 dbio++; 524 dst += blksize;
528 dst += blksize; 525 recid++;
529 recid++;
530 }
531 } 526 }
532 } 527 }
533 cqr->retries = DIAG_MAX_RETRIES; 528 cqr->retries = DIAG_MAX_RETRIES;
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index ea63ba7828f9..44adf8496bda 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -1176,7 +1176,7 @@ dasd_eckd_build_cp(struct dasd_device * device, struct request *req)
1176 struct LO_eckd_data *LO_data; 1176 struct LO_eckd_data *LO_data;
1177 struct dasd_ccw_req *cqr; 1177 struct dasd_ccw_req *cqr;
1178 struct ccw1 *ccw; 1178 struct ccw1 *ccw;
1179 struct bio *bio; 1179 struct req_iterator iter;
1180 struct bio_vec *bv; 1180 struct bio_vec *bv;
1181 char *dst; 1181 char *dst;
1182 unsigned int blksize, blk_per_trk, off; 1182 unsigned int blksize, blk_per_trk, off;
@@ -1185,7 +1185,6 @@ dasd_eckd_build_cp(struct dasd_device * device, struct request *req)
1185 sector_t first_trk, last_trk; 1185 sector_t first_trk, last_trk;
1186 unsigned int first_offs, last_offs; 1186 unsigned int first_offs, last_offs;
1187 unsigned char cmd, rcmd; 1187 unsigned char cmd, rcmd;
1188 int i;
1189 1188
1190 private = (struct dasd_eckd_private *) device->private; 1189 private = (struct dasd_eckd_private *) device->private;
1191 if (rq_data_dir(req) == READ) 1190 if (rq_data_dir(req) == READ)
@@ -1206,18 +1205,15 @@ dasd_eckd_build_cp(struct dasd_device * device, struct request *req)
1206 /* Check struct bio and count the number of blocks for the request. */ 1205 /* Check struct bio and count the number of blocks for the request. */
1207 count = 0; 1206 count = 0;
1208 cidaw = 0; 1207 cidaw = 0;
1209 rq_for_each_bio(bio, req) { 1208 rq_for_each_segment(bv, req, iter) {
1210 bio_for_each_segment(bv, bio, i) { 1209 if (bv->bv_len & (blksize - 1))
1211 if (bv->bv_len & (blksize - 1)) 1210 /* Eckd can only do full blocks. */
1212 /* Eckd can only do full blocks. */ 1211 return ERR_PTR(-EINVAL);
1213 return ERR_PTR(-EINVAL); 1212 count += bv->bv_len >> (device->s2b_shift + 9);
1214 count += bv->bv_len >> (device->s2b_shift + 9);
1215#if defined(CONFIG_64BIT) 1213#if defined(CONFIG_64BIT)
1216 if (idal_is_needed (page_address(bv->bv_page), 1214 if (idal_is_needed (page_address(bv->bv_page), bv->bv_len))
1217 bv->bv_len)) 1215 cidaw += bv->bv_len >> (device->s2b_shift + 9);
1218 cidaw += bv->bv_len >> (device->s2b_shift + 9);
1219#endif 1216#endif
1220 }
1221 } 1217 }
1222 /* Paranoia. */ 1218 /* Paranoia. */
1223 if (count != last_rec - first_rec + 1) 1219 if (count != last_rec - first_rec + 1)
@@ -1257,7 +1253,7 @@ dasd_eckd_build_cp(struct dasd_device * device, struct request *req)
1257 locate_record(ccw++, LO_data++, first_trk, first_offs + 1, 1253 locate_record(ccw++, LO_data++, first_trk, first_offs + 1,
1258 last_rec - recid + 1, cmd, device, blksize); 1254 last_rec - recid + 1, cmd, device, blksize);
1259 } 1255 }
1260 rq_for_each_bio(bio, req) bio_for_each_segment(bv, bio, i) { 1256 rq_for_each_segment(bv, req, iter) {
1261 dst = page_address(bv->bv_page) + bv->bv_offset; 1257 dst = page_address(bv->bv_page) + bv->bv_offset;
1262 if (dasd_page_cache) { 1258 if (dasd_page_cache) {
1263 char *copy = kmem_cache_alloc(dasd_page_cache, 1259 char *copy = kmem_cache_alloc(dasd_page_cache,
@@ -1328,12 +1324,12 @@ dasd_eckd_free_cp(struct dasd_ccw_req *cqr, struct request *req)
1328{ 1324{
1329 struct dasd_eckd_private *private; 1325 struct dasd_eckd_private *private;
1330 struct ccw1 *ccw; 1326 struct ccw1 *ccw;
1331 struct bio *bio; 1327 struct req_iterator iter;
1332 struct bio_vec *bv; 1328 struct bio_vec *bv;
1333 char *dst, *cda; 1329 char *dst, *cda;
1334 unsigned int blksize, blk_per_trk, off; 1330 unsigned int blksize, blk_per_trk, off;
1335 sector_t recid; 1331 sector_t recid;
1336 int i, status; 1332 int status;
1337 1333
1338 if (!dasd_page_cache) 1334 if (!dasd_page_cache)
1339 goto out; 1335 goto out;
@@ -1346,7 +1342,7 @@ dasd_eckd_free_cp(struct dasd_ccw_req *cqr, struct request *req)
1346 ccw++; 1342 ccw++;
1347 if (private->uses_cdl == 0 || recid > 2*blk_per_trk) 1343 if (private->uses_cdl == 0 || recid > 2*blk_per_trk)
1348 ccw++; 1344 ccw++;
1349 rq_for_each_bio(bio, req) bio_for_each_segment(bv, bio, i) { 1345 rq_for_each_segment(bv, req, iter) {
1350 dst = page_address(bv->bv_page) + bv->bv_offset; 1346 dst = page_address(bv->bv_page) + bv->bv_offset;
1351 for (off = 0; off < bv->bv_len; off += blksize) { 1347 for (off = 0; off < bv->bv_len; off += blksize) {
1352 /* Skip locate record. */ 1348 /* Skip locate record. */
diff --git a/drivers/s390/block/dasd_fba.c b/drivers/s390/block/dasd_fba.c
index da16ead8aff2..1d95822e0b8e 100644
--- a/drivers/s390/block/dasd_fba.c
+++ b/drivers/s390/block/dasd_fba.c
@@ -234,14 +234,13 @@ dasd_fba_build_cp(struct dasd_device * device, struct request *req)
234 struct LO_fba_data *LO_data; 234 struct LO_fba_data *LO_data;
235 struct dasd_ccw_req *cqr; 235 struct dasd_ccw_req *cqr;
236 struct ccw1 *ccw; 236 struct ccw1 *ccw;
237 struct bio *bio; 237 struct req_iterator iter;
238 struct bio_vec *bv; 238 struct bio_vec *bv;
239 char *dst; 239 char *dst;
240 int count, cidaw, cplength, datasize; 240 int count, cidaw, cplength, datasize;
241 sector_t recid, first_rec, last_rec; 241 sector_t recid, first_rec, last_rec;
242 unsigned int blksize, off; 242 unsigned int blksize, off;
243 unsigned char cmd; 243 unsigned char cmd;
244 int i;
245 244
246 private = (struct dasd_fba_private *) device->private; 245 private = (struct dasd_fba_private *) device->private;
247 if (rq_data_dir(req) == READ) { 246 if (rq_data_dir(req) == READ) {
@@ -257,18 +256,15 @@ dasd_fba_build_cp(struct dasd_device * device, struct request *req)
257 /* Check struct bio and count the number of blocks for the request. */ 256 /* Check struct bio and count the number of blocks for the request. */
258 count = 0; 257 count = 0;
259 cidaw = 0; 258 cidaw = 0;
260 rq_for_each_bio(bio, req) { 259 rq_for_each_segment(bv, req, iter) {
261 bio_for_each_segment(bv, bio, i) { 260 if (bv->bv_len & (blksize - 1))
262 if (bv->bv_len & (blksize - 1)) 261 /* Fba can only do full blocks. */
263 /* Fba can only do full blocks. */ 262 return ERR_PTR(-EINVAL);
264 return ERR_PTR(-EINVAL); 263 count += bv->bv_len >> (device->s2b_shift + 9);
265 count += bv->bv_len >> (device->s2b_shift + 9);
266#if defined(CONFIG_64BIT) 264#if defined(CONFIG_64BIT)
267 if (idal_is_needed (page_address(bv->bv_page), 265 if (idal_is_needed (page_address(bv->bv_page), bv->bv_len))
268 bv->bv_len)) 266 cidaw += bv->bv_len / blksize;
269 cidaw += bv->bv_len / blksize;
270#endif 267#endif
271 }
272 } 268 }
273 /* Paranoia. */ 269 /* Paranoia. */
274 if (count != last_rec - first_rec + 1) 270 if (count != last_rec - first_rec + 1)
@@ -304,7 +300,7 @@ dasd_fba_build_cp(struct dasd_device * device, struct request *req)
304 locate_record(ccw++, LO_data++, rq_data_dir(req), 0, count); 300 locate_record(ccw++, LO_data++, rq_data_dir(req), 0, count);
305 } 301 }
306 recid = first_rec; 302 recid = first_rec;
307 rq_for_each_bio(bio, req) bio_for_each_segment(bv, bio, i) { 303 rq_for_each_segment(bv, req, iter) {
308 dst = page_address(bv->bv_page) + bv->bv_offset; 304 dst = page_address(bv->bv_page) + bv->bv_offset;
309 if (dasd_page_cache) { 305 if (dasd_page_cache) {
310 char *copy = kmem_cache_alloc(dasd_page_cache, 306 char *copy = kmem_cache_alloc(dasd_page_cache,
@@ -359,11 +355,11 @@ dasd_fba_free_cp(struct dasd_ccw_req *cqr, struct request *req)
359{ 355{
360 struct dasd_fba_private *private; 356 struct dasd_fba_private *private;
361 struct ccw1 *ccw; 357 struct ccw1 *ccw;
362 struct bio *bio; 358 struct req_iterator iter;
363 struct bio_vec *bv; 359 struct bio_vec *bv;
364 char *dst, *cda; 360 char *dst, *cda;
365 unsigned int blksize, off; 361 unsigned int blksize, off;
366 int i, status; 362 int status;
367 363
368 if (!dasd_page_cache) 364 if (!dasd_page_cache)
369 goto out; 365 goto out;
@@ -374,7 +370,7 @@ dasd_fba_free_cp(struct dasd_ccw_req *cqr, struct request *req)
374 ccw++; 370 ccw++;
375 if (private->rdc_data.mode.bits.data_chain != 0) 371 if (private->rdc_data.mode.bits.data_chain != 0)
376 ccw++; 372 ccw++;
377 rq_for_each_bio(bio, req) bio_for_each_segment(bv, bio, i) { 373 rq_for_each_segment(bv, req, iter) {
378 dst = page_address(bv->bv_page) + bv->bv_offset; 374 dst = page_address(bv->bv_page) + bv->bv_offset;
379 for (off = 0; off < bv->bv_len; off += blksize) { 375 for (off = 0; off < bv->bv_len; off += blksize) {
380 /* Skip locate record. */ 376 /* Skip locate record. */
diff --git a/drivers/s390/block/dcssblk.c b/drivers/s390/block/dcssblk.c
index 4d8798bacf97..859f870552e3 100644
--- a/drivers/s390/block/dcssblk.c
+++ b/drivers/s390/block/dcssblk.c
@@ -674,10 +674,10 @@ dcssblk_make_request(struct request_queue *q, struct bio *bio)
674 } 674 }
675 bytes_done += bvec->bv_len; 675 bytes_done += bvec->bv_len;
676 } 676 }
677 bio_endio(bio, bytes_done, 0); 677 bio_endio(bio, 0);
678 return 0; 678 return 0;
679fail: 679fail:
680 bio_io_error(bio, bio->bi_size); 680 bio_io_error(bio);
681 return 0; 681 return 0;
682} 682}
683 683
diff --git a/drivers/s390/block/xpram.c b/drivers/s390/block/xpram.c
index 354a060e5bec..0fbacc8b1063 100644
--- a/drivers/s390/block/xpram.c
+++ b/drivers/s390/block/xpram.c
@@ -230,12 +230,10 @@ static int xpram_make_request(struct request_queue *q, struct bio *bio)
230 } 230 }
231 } 231 }
232 set_bit(BIO_UPTODATE, &bio->bi_flags); 232 set_bit(BIO_UPTODATE, &bio->bi_flags);
233 bytes = bio->bi_size; 233 bio_end_io(bio, 0);
234 bio->bi_size = 0;
235 bio->bi_end_io(bio, bytes, 0);
236 return 0; 234 return 0;
237fail: 235fail:
238 bio_io_error(bio, bio->bi_size); 236 bio_io_error(bio);
239 return 0; 237 return 0;
240} 238}
241 239
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c
index 80e7a537e7d2..5b47e9cce75f 100644
--- a/drivers/s390/char/tape_34xx.c
+++ b/drivers/s390/char/tape_34xx.c
@@ -1134,21 +1134,18 @@ tape_34xx_bread(struct tape_device *device, struct request *req)
1134{ 1134{
1135 struct tape_request *request; 1135 struct tape_request *request;
1136 struct ccw1 *ccw; 1136 struct ccw1 *ccw;
1137 int count = 0, i; 1137 int count = 0;
1138 unsigned off; 1138 unsigned off;
1139 char *dst; 1139 char *dst;
1140 struct bio_vec *bv; 1140 struct bio_vec *bv;
1141 struct bio *bio; 1141 struct req_iterator iter;
1142 struct tape_34xx_block_id * start_block; 1142 struct tape_34xx_block_id * start_block;
1143 1143
1144 DBF_EVENT(6, "xBREDid:"); 1144 DBF_EVENT(6, "xBREDid:");
1145 1145
1146 /* Count the number of blocks for the request. */ 1146 /* Count the number of blocks for the request. */
1147 rq_for_each_bio(bio, req) { 1147 rq_for_each_segment(bv, req, iter)
1148 bio_for_each_segment(bv, bio, i) { 1148 count += bv->bv_len >> (TAPEBLOCK_HSEC_S2B + 9);
1149 count += bv->bv_len >> (TAPEBLOCK_HSEC_S2B + 9);
1150 }
1151 }
1152 1149
1153 /* Allocate the ccw request. */ 1150 /* Allocate the ccw request. */
1154 request = tape_alloc_request(3+count+1, 8); 1151 request = tape_alloc_request(3+count+1, 8);
@@ -1175,18 +1172,15 @@ tape_34xx_bread(struct tape_device *device, struct request *req)
1175 ccw = tape_ccw_cc(ccw, NOP, 0, NULL); 1172 ccw = tape_ccw_cc(ccw, NOP, 0, NULL);
1176 ccw = tape_ccw_cc(ccw, NOP, 0, NULL); 1173 ccw = tape_ccw_cc(ccw, NOP, 0, NULL);
1177 1174
1178 rq_for_each_bio(bio, req) { 1175 rq_for_each_segment(bv, req, iter) {
1179 bio_for_each_segment(bv, bio, i) { 1176 dst = kmap(bv->bv_page) + bv->bv_offset;
1180 dst = kmap(bv->bv_page) + bv->bv_offset; 1177 for (off = 0; off < bv->bv_len; off += TAPEBLOCK_HSEC_SIZE) {
1181 for (off = 0; off < bv->bv_len; 1178 ccw->flags = CCW_FLAG_CC;
1182 off += TAPEBLOCK_HSEC_SIZE) { 1179 ccw->cmd_code = READ_FORWARD;
1183 ccw->flags = CCW_FLAG_CC; 1180 ccw->count = TAPEBLOCK_HSEC_SIZE;
1184 ccw->cmd_code = READ_FORWARD; 1181 set_normalized_cda(ccw, (void*) __pa(dst));
1185 ccw->count = TAPEBLOCK_HSEC_SIZE; 1182 ccw++;
1186 set_normalized_cda(ccw, (void*) __pa(dst)); 1183 dst += TAPEBLOCK_HSEC_SIZE;
1187 ccw++;
1188 dst += TAPEBLOCK_HSEC_SIZE;
1189 }
1190 } 1184 }
1191 } 1185 }
1192 1186
diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c
index 7e2b2ab49264..9f244c591eeb 100644
--- a/drivers/s390/char/tape_3590.c
+++ b/drivers/s390/char/tape_3590.c
@@ -623,21 +623,19 @@ tape_3590_bread(struct tape_device *device, struct request *req)
623{ 623{
624 struct tape_request *request; 624 struct tape_request *request;
625 struct ccw1 *ccw; 625 struct ccw1 *ccw;
626 int count = 0, start_block, i; 626 int count = 0, start_block;
627 unsigned off; 627 unsigned off;
628 char *dst; 628 char *dst;
629 struct bio_vec *bv; 629 struct bio_vec *bv;
630 struct bio *bio; 630 struct req_iterator iter;
631 631
632 DBF_EVENT(6, "xBREDid:"); 632 DBF_EVENT(6, "xBREDid:");
633 start_block = req->sector >> TAPEBLOCK_HSEC_S2B; 633 start_block = req->sector >> TAPEBLOCK_HSEC_S2B;
634 DBF_EVENT(6, "start_block = %i\n", start_block); 634 DBF_EVENT(6, "start_block = %i\n", start_block);
635 635
636 rq_for_each_bio(bio, req) { 636 rq_for_each_segment(bv, req, iter)
637 bio_for_each_segment(bv, bio, i) { 637 count += bv->bv_len >> (TAPEBLOCK_HSEC_S2B + 9);
638 count += bv->bv_len >> (TAPEBLOCK_HSEC_S2B + 9); 638
639 }
640 }
641 request = tape_alloc_request(2 + count + 1, 4); 639 request = tape_alloc_request(2 + count + 1, 4);
642 if (IS_ERR(request)) 640 if (IS_ERR(request))
643 return request; 641 return request;
@@ -653,21 +651,18 @@ tape_3590_bread(struct tape_device *device, struct request *req)
653 */ 651 */
654 ccw = tape_ccw_cc(ccw, NOP, 0, NULL); 652 ccw = tape_ccw_cc(ccw, NOP, 0, NULL);
655 653
656 rq_for_each_bio(bio, req) { 654 rq_for_each_segment(bv, req, iter) {
657 bio_for_each_segment(bv, bio, i) { 655 dst = page_address(bv->bv_page) + bv->bv_offset;
658 dst = page_address(bv->bv_page) + bv->bv_offset; 656 for (off = 0; off < bv->bv_len; off += TAPEBLOCK_HSEC_SIZE) {
659 for (off = 0; off < bv->bv_len; 657 ccw->flags = CCW_FLAG_CC;
660 off += TAPEBLOCK_HSEC_SIZE) { 658 ccw->cmd_code = READ_FORWARD;
661 ccw->flags = CCW_FLAG_CC; 659 ccw->count = TAPEBLOCK_HSEC_SIZE;
662 ccw->cmd_code = READ_FORWARD; 660 set_normalized_cda(ccw, (void *) __pa(dst));
663 ccw->count = TAPEBLOCK_HSEC_SIZE; 661 ccw++;
664 set_normalized_cda(ccw, (void *) __pa(dst)); 662 dst += TAPEBLOCK_HSEC_SIZE;
665 ccw++;
666 dst += TAPEBLOCK_HSEC_SIZE;
667 }
668 if (off > bv->bv_len)
669 BUG();
670 } 663 }
664 if (off > bv->bv_len)
665 BUG();
671 } 666 }
672 ccw = tape_ccw_end(ccw, NOP, 0, NULL); 667 ccw = tape_ccw_end(ccw, NOP, 0, NULL);
673 DBF_EVENT(6, "xBREDccwg\n"); 668 DBF_EVENT(6, "xBREDccwg\n");
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index a417a6ff9f97..604f4d717933 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -263,25 +263,12 @@ static int scsi_merge_bio(struct request *rq, struct bio *bio)
263 bio->bi_rw |= (1 << BIO_RW); 263 bio->bi_rw |= (1 << BIO_RW);
264 blk_queue_bounce(q, &bio); 264 blk_queue_bounce(q, &bio);
265 265
266 if (!rq->bio) 266 return blk_rq_append_bio(q, rq, bio);
267 blk_rq_bio_prep(q, rq, bio);
268 else if (!ll_back_merge_fn(q, rq, bio))
269 return -EINVAL;
270 else {
271 rq->biotail->bi_next = bio;
272 rq->biotail = bio;
273 }
274
275 return 0;
276} 267}
277 268
278static int scsi_bi_endio(struct bio *bio, unsigned int bytes_done, int error) 269static void scsi_bi_endio(struct bio *bio, int error)
279{ 270{
280 if (bio->bi_size)
281 return 1;
282
283 bio_put(bio); 271 bio_put(bio);
284 return 0;
285} 272}
286 273
287/** 274/**
@@ -337,7 +324,7 @@ static int scsi_req_map_sg(struct request *rq, struct scatterlist *sgl,
337 if (bio->bi_vcnt >= nr_vecs) { 324 if (bio->bi_vcnt >= nr_vecs) {
338 err = scsi_merge_bio(rq, bio); 325 err = scsi_merge_bio(rq, bio);
339 if (err) { 326 if (err) {
340 bio_endio(bio, bio->bi_size, 0); 327 bio_endio(bio, 0);
341 goto free_bios; 328 goto free_bios;
342 } 329 }
343 bio = NULL; 330 bio = NULL;
@@ -359,7 +346,7 @@ free_bios:
359 /* 346 /*
360 * call endio instead of bio_put incase it was bounced 347 * call endio instead of bio_put incase it was bounced
361 */ 348 */
362 bio_endio(bio, bio->bi_size, 0); 349 bio_endio(bio, 0);
363 } 350 }
364 351
365 return err; 352 return err;
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index 66c92bc36f3d..6f475b609864 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -86,10 +86,8 @@ static void bfin_serial_stop_tx(struct uart_port *port)
86{ 86{
87 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 87 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
88 88
89#ifdef CONFIG_BF54x
90 while (!(UART_GET_LSR(uart) & TEMT)) 89 while (!(UART_GET_LSR(uart) & TEMT))
91 continue; 90 continue;
92#endif
93 91
94#ifdef CONFIG_SERIAL_BFIN_DMA 92#ifdef CONFIG_SERIAL_BFIN_DMA
95 disable_dma(uart->tx_dma_channel); 93 disable_dma(uart->tx_dma_channel);
@@ -128,8 +126,8 @@ static void bfin_serial_start_tx(struct uart_port *port)
128 ier = UART_GET_IER(uart); 126 ier = UART_GET_IER(uart);
129 ier |= ETBEI; 127 ier |= ETBEI;
130 UART_PUT_IER(uart, ier); 128 UART_PUT_IER(uart, ier);
131 bfin_serial_tx_chars(uart);
132#endif 129#endif
130 bfin_serial_tx_chars(uart);
133#endif 131#endif
134} 132}
135 133
@@ -139,18 +137,21 @@ static void bfin_serial_start_tx(struct uart_port *port)
139static void bfin_serial_stop_rx(struct uart_port *port) 137static void bfin_serial_stop_rx(struct uart_port *port)
140{ 138{
141 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 139 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
140#ifdef CONFIG_KGDB_UART
141 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
142#endif
142#ifdef CONFIG_BF54x 143#ifdef CONFIG_BF54x
143 UART_CLEAR_IER(uart, ERBFI); 144 UART_CLEAR_IER(uart, ERBFI);
144#else 145#else
145 unsigned short ier; 146 unsigned short ier;
146 147
147 ier = UART_GET_IER(uart); 148 ier = UART_GET_IER(uart);
148#ifdef CONFIG_KGDB_UART
149 if (uart->port.line != CONFIG_KGDB_UART_PORT)
150#endif
151 ier &= ~ERBFI; 149 ier &= ~ERBFI;
152 UART_PUT_IER(uart, ier); 150 UART_PUT_IER(uart, ier);
153#endif 151#endif
152#ifdef CONFIG_KGDB_UART
153 }
154#endif
154} 155}
155 156
156/* 157/*
@@ -173,12 +174,15 @@ void kgdb_put_debug_char(int chr)
173 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; 174 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
174 175
175 while (!(UART_GET_LSR(uart) & THRE)) { 176 while (!(UART_GET_LSR(uart) & THRE)) {
176 __builtin_bfin_ssync(); 177 SSYNC();
177 } 178 }
179
180#ifndef CONFIG_BF54x
178 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); 181 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
179 __builtin_bfin_ssync(); 182 SSYNC();
183#endif
180 UART_PUT_CHAR(uart, (unsigned char)chr); 184 UART_PUT_CHAR(uart, (unsigned char)chr);
181 __builtin_bfin_ssync(); 185 SSYNC();
182} 186}
183 187
184int kgdb_get_debug_char(void) 188int kgdb_get_debug_char(void)
@@ -192,12 +196,14 @@ int kgdb_get_debug_char(void)
192 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; 196 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
193 197
194 while(!(UART_GET_LSR(uart) & DR)) { 198 while(!(UART_GET_LSR(uart) & DR)) {
195 __builtin_bfin_ssync(); 199 SSYNC();
196 } 200 }
201#ifndef CONFIG_BF54x
197 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB)); 202 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
198 __builtin_bfin_ssync(); 203 SSYNC();
204#endif
199 chr = UART_GET_CHAR(uart); 205 chr = UART_GET_CHAR(uart);
200 __builtin_bfin_ssync(); 206 SSYNC();
201 207
202 return chr; 208 return chr;
203} 209}
@@ -225,12 +231,10 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
225{ 231{
226 struct tty_struct *tty = uart->port.info->tty; 232 struct tty_struct *tty = uart->port.info->tty;
227 unsigned int status, ch, flg; 233 unsigned int status, ch, flg;
234 static int in_break = 0;
228#ifdef CONFIG_KGDB_UART 235#ifdef CONFIG_KGDB_UART
229 struct pt_regs *regs = get_irq_regs(); 236 struct pt_regs *regs = get_irq_regs();
230#endif 237#endif
231#ifdef BF533_FAMILY
232 static int in_break = 0;
233#endif
234 238
235 status = UART_GET_LSR(uart); 239 status = UART_GET_LSR(uart);
236 ch = UART_GET_CHAR(uart); 240 ch = UART_GET_CHAR(uart);
@@ -256,29 +260,30 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
256 } 260 }
257 } 261 }
258#endif 262#endif
259 263
260#ifdef BF533_FAMILY 264 if (ANOMALY_05000230) {
261 /* The BF533 family of processors have a nice misbehavior where 265 /* The BF533 family of processors have a nice misbehavior where
262 * they continuously generate characters for a "single" break. 266 * they continuously generate characters for a "single" break.
263 * We have to basically ignore this flood until the "next" valid 267 * We have to basically ignore this flood until the "next" valid
264 * character comes across. All other Blackfin families operate 268 * character comes across. All other Blackfin families operate
265 * properly though. 269 * properly though.
266 */ 270 * Note: While Anomaly 05000230 does not directly address this,
267 if (in_break) { 271 * the changes that went in for it also fixed this issue.
268 if (ch != 0) { 272 */
269 in_break = 0; 273 if (in_break) {
270 ch = UART_GET_CHAR(uart); 274 if (ch != 0) {
271 if (bfin_revid() < 5) 275 in_break = 0;
276 ch = UART_GET_CHAR(uart);
277 if (bfin_revid() < 5)
278 return;
279 } else
272 return; 280 return;
273 } else 281 }
274 return;
275 } 282 }
276#endif
277 283
278 if (status & BI) { 284 if (status & BI) {
279#ifdef BF533_FAMILY 285 if (ANOMALY_05000230)
280 in_break = 1; 286 in_break = 1;
281#endif
282 uart->port.icount.brk++; 287 uart->port.icount.brk++;
283 if (uart_handle_break(&uart->port)) 288 if (uart_handle_break(&uart->port))
284 goto ignore_char; 289 goto ignore_char;
@@ -697,17 +702,19 @@ static int bfin_serial_startup(struct uart_port *port)
697 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; 702 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
698 add_timer(&(uart->rx_dma_timer)); 703 add_timer(&(uart->rx_dma_timer));
699#else 704#else
705 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
706 "BFIN_UART_RX", uart)) {
700# ifdef CONFIG_KGDB_UART 707# ifdef CONFIG_KGDB_UART
701 if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq 708 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
702# else
703 if (request_irq
704# endif 709# endif
705 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
706 "BFIN_UART_RX", uart)) {
707 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n"); 710 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
708 return -EBUSY; 711 return -EBUSY;
712# ifdef CONFIG_KGDB_UART
713 }
714# endif
709 } 715 }
710 716
717
711 if (request_irq 718 if (request_irq
712 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED, 719 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
713 "BFIN_UART_TX", uart)) { 720 "BFIN_UART_TX", uart)) {
@@ -962,30 +969,6 @@ static void __init bfin_serial_init_ports(void)
962} 969}
963 970
964#ifdef CONFIG_SERIAL_BFIN_CONSOLE 971#ifdef CONFIG_SERIAL_BFIN_CONSOLE
965static void bfin_serial_console_putchar(struct uart_port *port, int ch)
966{
967 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
968 while (!(UART_GET_LSR(uart) & THRE))
969 barrier();
970 UART_PUT_CHAR(uart, ch);
971 SSYNC();
972}
973
974/*
975 * Interrupts are disabled on entering
976 */
977static void
978bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
979{
980 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
981 int flags = 0;
982
983 spin_lock_irqsave(&uart->port.lock, flags);
984 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
985 spin_unlock_irqrestore(&uart->port.lock, flags);
986
987}
988
989/* 972/*
990 * If the port was already initialised (eg, by a boot loader), 973 * If the port was already initialised (eg, by a boot loader),
991 * try to determine the current setup. 974 * try to determine the current setup.
@@ -1038,19 +1021,25 @@ bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1038 } 1021 }
1039 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits); 1022 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1040} 1023}
1024#endif
1025
1026#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1027static struct uart_driver bfin_serial_reg;
1041 1028
1042static int __init 1029static int __init
1043bfin_serial_console_setup(struct console *co, char *options) 1030bfin_serial_console_setup(struct console *co, char *options)
1044{ 1031{
1045 struct bfin_serial_port *uart; 1032 struct bfin_serial_port *uart;
1033# ifdef CONFIG_SERIAL_BFIN_CONSOLE
1046 int baud = 57600; 1034 int baud = 57600;
1047 int bits = 8; 1035 int bits = 8;
1048 int parity = 'n'; 1036 int parity = 'n';
1049#ifdef CONFIG_SERIAL_BFIN_CTSRTS 1037# ifdef CONFIG_SERIAL_BFIN_CTSRTS
1050 int flow = 'r'; 1038 int flow = 'r';
1051#else 1039# else
1052 int flow = 'n'; 1040 int flow = 'n';
1053#endif 1041# endif
1042# endif
1054 1043
1055 /* 1044 /*
1056 * Check whether an invalid uart number has been specified, and 1045 * Check whether an invalid uart number has been specified, and
@@ -1061,15 +1050,45 @@ bfin_serial_console_setup(struct console *co, char *options)
1061 co->index = 0; 1050 co->index = 0;
1062 uart = &bfin_serial_ports[co->index]; 1051 uart = &bfin_serial_ports[co->index];
1063 1052
1053# ifdef CONFIG_SERIAL_BFIN_CONSOLE
1064 if (options) 1054 if (options)
1065 uart_parse_options(options, &baud, &parity, &bits, &flow); 1055 uart_parse_options(options, &baud, &parity, &bits, &flow);
1066 else 1056 else
1067 bfin_serial_console_get_options(uart, &baud, &parity, &bits); 1057 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1068 1058
1069 return uart_set_options(&uart->port, co, baud, parity, bits, flow); 1059 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1060# else
1061 return 0;
1062# endif
1063}
1064#endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1065 defined (CONFIG_EARLY_PRINTK) */
1066
1067#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1068static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1069{
1070 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1071 while (!(UART_GET_LSR(uart) & THRE))
1072 barrier();
1073 UART_PUT_CHAR(uart, ch);
1074 SSYNC();
1075}
1076
1077/*
1078 * Interrupts are disabled on entering
1079 */
1080static void
1081bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1082{
1083 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1084 int flags = 0;
1085
1086 spin_lock_irqsave(&uart->port.lock, flags);
1087 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1088 spin_unlock_irqrestore(&uart->port.lock, flags);
1089
1070} 1090}
1071 1091
1072static struct uart_driver bfin_serial_reg;
1073static struct console bfin_serial_console = { 1092static struct console bfin_serial_console = {
1074 .name = BFIN_SERIAL_NAME, 1093 .name = BFIN_SERIAL_NAME,
1075 .write = bfin_serial_console_write, 1094 .write = bfin_serial_console_write,
@@ -1095,7 +1114,64 @@ console_initcall(bfin_serial_rs_console_init);
1095#define BFIN_SERIAL_CONSOLE &bfin_serial_console 1114#define BFIN_SERIAL_CONSOLE &bfin_serial_console
1096#else 1115#else
1097#define BFIN_SERIAL_CONSOLE NULL 1116#define BFIN_SERIAL_CONSOLE NULL
1098#endif 1117#endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1118
1119
1120#ifdef CONFIG_EARLY_PRINTK
1121static __init void early_serial_putc(struct uart_port *port, int ch)
1122{
1123 unsigned timeout = 0xffff;
1124 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1125
1126 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1127 cpu_relax();
1128 UART_PUT_CHAR(uart, ch);
1129}
1130
1131static __init void early_serial_write(struct console *con, const char *s,
1132 unsigned int n)
1133{
1134 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1135 unsigned int i;
1136
1137 for (i = 0; i < n; i++, s++) {
1138 if (*s == '\n')
1139 early_serial_putc(&uart->port, '\r');
1140 early_serial_putc(&uart->port, *s);
1141 }
1142}
1143
1144static struct __init console bfin_early_serial_console = {
1145 .name = "early_BFuart",
1146 .write = early_serial_write,
1147 .device = uart_console_device,
1148 .flags = CON_PRINTBUFFER,
1149 .setup = bfin_serial_console_setup,
1150 .index = -1,
1151 .data = &bfin_serial_reg,
1152};
1153
1154struct console __init *bfin_earlyserial_init(unsigned int port,
1155 unsigned int cflag)
1156{
1157 struct bfin_serial_port *uart;
1158 struct ktermios t;
1159
1160 if (port == -1 || port >= nr_ports)
1161 port = 0;
1162 bfin_serial_init_ports();
1163 bfin_early_serial_console.index = port;
1164 uart = &bfin_serial_ports[port];
1165 t.c_cflag = cflag;
1166 t.c_iflag = 0;
1167 t.c_oflag = 0;
1168 t.c_lflag = ICANON;
1169 t.c_line = port;
1170 bfin_serial_set_termios(&uart->port, &t, &t);
1171 return &bfin_early_serial_console;
1172}
1173
1174#endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1099 1175
1100static struct uart_driver bfin_serial_reg = { 1176static struct uart_driver bfin_serial_reg = {
1101 .owner = THIS_MODULE, 1177 .owner = THIS_MODULE,
@@ -1182,7 +1258,7 @@ static int __init bfin_serial_init(void)
1182 int ret; 1258 int ret;
1183#ifdef CONFIG_KGDB_UART 1259#ifdef CONFIG_KGDB_UART
1184 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT]; 1260 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1185 struct termios t; 1261 struct ktermios t;
1186#endif 1262#endif
1187 1263
1188 pr_info("Serial: Blackfin serial driver\n"); 1264 pr_info("Serial: Blackfin serial driver\n");
@@ -1199,11 +1275,15 @@ static int __init bfin_serial_init(void)
1199 } 1275 }
1200#ifdef CONFIG_KGDB_UART 1276#ifdef CONFIG_KGDB_UART
1201 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) { 1277 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1202 request_irq(uart->port.irq, bfin_serial_int, 1278 request_irq(uart->port.irq, bfin_serial_rx_int,
1203 IRQF_DISABLED, "BFIN_UART_RX", uart); 1279 IRQF_DISABLED, "BFIN_UART_RX", uart);
1204 pr_info("Request irq for kgdb uart port\n"); 1280 pr_info("Request irq for kgdb uart port\n");
1281#ifdef CONFIG_BF54x
1282 UART_SET_IER(uart, ERBFI);
1283#else
1205 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI); 1284 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1206 __builtin_bfin_ssync(); 1285#endif
1286 SSYNC();
1207 t.c_cflag = CS8|B57600; 1287 t.c_cflag = CS8|B57600;
1208 t.c_iflag = 0; 1288 t.c_iflag = 0;
1209 t.c_oflag = 0; 1289 t.c_oflag = 0;
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 805e5fc5f5db..4db17f75f4f1 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -237,7 +237,7 @@ static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
237static int remote_wakeup_is_broken(struct uhci_hcd *uhci) 237static int remote_wakeup_is_broken(struct uhci_hcd *uhci)
238{ 238{
239 int port; 239 int port;
240 char *sys_info; 240 const char *sys_info;
241 static char bad_Asus_board[] = "A7V8X"; 241 static char bad_Asus_board[] = "A7V8X";
242 242
243 /* One of Asus's motherboards has a bug which causes it to 243 /* One of Asus's motherboards has a bug which causes it to
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 2580f5fa2486..9609a6c676be 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
24 To have support for your specific LCD panel you will have to 24 To have support for your specific LCD panel you will have to
25 select the proper drivers which depend on this option. 25 select the proper drivers which depend on this option.
26 26
27config LCD_LTV350QV
28 tristate "Samsung LTV350QV LCD Panel"
29 depends on LCD_CLASS_DEVICE && SPI_MASTER
30 default n
31 help
32 If you have a Samsung LTV350QV LCD panel, say y to include a
33 power control driver for it. The panel starts up in power
34 off state, so you need this driver in order to see any
35 output.
36
37 The LTV350QV panel is present on all ATSTK1000 boards.
38
27# 39#
28# Backlight 40# Backlight
29# 41#
@@ -39,12 +51,13 @@ config BACKLIGHT_CLASS_DEVICE
39 select the proper drivers which depend on this option. 51 select the proper drivers which depend on this option.
40 52
41config BACKLIGHT_CORGI 53config BACKLIGHT_CORGI
42 tristate "Sharp Corgi Backlight Driver (SL Series)" 54 tristate "Generic (aka Sharp Corgi) Backlight Driver"
43 depends on BACKLIGHT_CLASS_DEVICE && PXA_SHARPSL 55 depends on BACKLIGHT_CLASS_DEVICE
44 default y 56 default n
45 help 57 help
46 If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y to enable the 58 Say y to enable the generic platform backlight driver previously
47 backlight driver. 59 known as the Corgi backlight driver. If you have a Sharp Zaurus
60 SL-C7xx, SL-Cxx00 or SL-6000x say y. Most users can say n.
48 61
49config BACKLIGHT_LOCOMO 62config BACKLIGHT_LOCOMO
50 tristate "Sharp LOCOMO LCD/Backlight Driver" 63 tristate "Sharp LOCOMO LCD/Backlight Driver"
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index c6e2266f63e2..965a78b18118 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -1,6 +1,8 @@
1# Backlight & LCD drivers 1# Backlight & LCD drivers
2 2
3obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o 3obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o
4obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
5
4obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o 6obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
5obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o 7obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o
6obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o 8obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index b26de8cf3112..4840fe217e4d 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -164,7 +164,7 @@ static ssize_t backlight_show_actual_brightness(struct device *dev,
164 return rc; 164 return rc;
165} 165}
166 166
167struct class *backlight_class; 167static struct class *backlight_class;
168 168
169static void bl_device_release(struct device *dev) 169static void bl_device_release(struct device *dev)
170{ 170{
diff --git a/drivers/video/backlight/corgi_bl.c b/drivers/video/backlight/corgi_bl.c
index ce00e18a4e5d..4d4d037e3ec9 100644
--- a/drivers/video/backlight/corgi_bl.c
+++ b/drivers/video/backlight/corgi_bl.c
@@ -18,13 +18,11 @@
18#include <linux/mutex.h> 18#include <linux/mutex.h>
19#include <linux/fb.h> 19#include <linux/fb.h>
20#include <linux/backlight.h> 20#include <linux/backlight.h>
21#include <asm/arch/sharpsl.h>
22#include <asm/hardware/sharpsl_pm.h>
23 21
24static int corgibl_intensity; 22static int corgibl_intensity;
25static struct backlight_properties corgibl_data; 23static struct backlight_properties corgibl_data;
26static struct backlight_device *corgi_backlight_device; 24static struct backlight_device *corgi_backlight_device;
27static struct corgibl_machinfo *bl_machinfo; 25static struct generic_bl_info *bl_machinfo;
28 26
29static unsigned long corgibl_flags; 27static unsigned long corgibl_flags;
30#define CORGIBL_SUSPENDED 0x01 28#define CORGIBL_SUSPENDED 0x01
@@ -32,7 +30,6 @@ static unsigned long corgibl_flags;
32 30
33static int corgibl_send_intensity(struct backlight_device *bd) 31static int corgibl_send_intensity(struct backlight_device *bd)
34{ 32{
35 void (*corgi_kick_batt)(void);
36 int intensity = bd->props.brightness; 33 int intensity = bd->props.brightness;
37 34
38 if (bd->props.power != FB_BLANK_UNBLANK) 35 if (bd->props.power != FB_BLANK_UNBLANK)
@@ -48,11 +45,8 @@ static int corgibl_send_intensity(struct backlight_device *bd)
48 45
49 corgibl_intensity = intensity; 46 corgibl_intensity = intensity;
50 47
51 corgi_kick_batt = symbol_get(sharpsl_battery_kick); 48 if (bl_machinfo->kick_battery)
52 if (corgi_kick_batt) { 49 bl_machinfo->kick_battery();
53 corgi_kick_batt();
54 symbol_put(sharpsl_battery_kick);
55 }
56 50
57 return 0; 51 return 0;
58} 52}
@@ -107,13 +101,17 @@ static struct backlight_ops corgibl_ops = {
107 101
108static int corgibl_probe(struct platform_device *pdev) 102static int corgibl_probe(struct platform_device *pdev)
109{ 103{
110 struct corgibl_machinfo *machinfo = pdev->dev.platform_data; 104 struct generic_bl_info *machinfo = pdev->dev.platform_data;
105 const char *name = "generic-bl";
111 106
112 bl_machinfo = machinfo; 107 bl_machinfo = machinfo;
113 if (!machinfo->limit_mask) 108 if (!machinfo->limit_mask)
114 machinfo->limit_mask = -1; 109 machinfo->limit_mask = -1;
115 110
116 corgi_backlight_device = backlight_device_register ("corgi-bl", 111 if (machinfo->name)
112 name = machinfo->name;
113
114 corgi_backlight_device = backlight_device_register (name,
117 &pdev->dev, NULL, &corgibl_ops); 115 &pdev->dev, NULL, &corgibl_ops);
118 if (IS_ERR (corgi_backlight_device)) 116 if (IS_ERR (corgi_backlight_device))
119 return PTR_ERR (corgi_backlight_device); 117 return PTR_ERR (corgi_backlight_device);
@@ -149,7 +147,7 @@ static struct platform_driver corgibl_driver = {
149 .suspend = corgibl_suspend, 147 .suspend = corgibl_suspend,
150 .resume = corgibl_resume, 148 .resume = corgibl_resume,
151 .driver = { 149 .driver = {
152 .name = "corgi-bl", 150 .name = "generic-bl",
153 }, 151 },
154}; 152};
155 153
diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c
index b7904da51b23..92e201e81fbd 100644
--- a/drivers/video/backlight/cr_bllcd.c
+++ b/drivers/video/backlight/cr_bllcd.c
@@ -171,13 +171,11 @@ static struct lcd_ops cr_lcd_ops = {
171 171
172static int cr_backlight_probe(struct platform_device *pdev) 172static int cr_backlight_probe(struct platform_device *pdev)
173{ 173{
174 struct backlight_device *bdp;
175 struct lcd_device *ldp;
174 struct cr_panel *crp; 176 struct cr_panel *crp;
175 u8 dev_en; 177 u8 dev_en;
176 178
177 crp = kzalloc(sizeof(*crp), GFP_KERNEL);
178 if (crp == NULL)
179 return -ENOMEM;
180
181 lpc_dev = pci_get_device(PCI_VENDOR_ID_INTEL, 179 lpc_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
182 CRVML_DEVICE_LPC, NULL); 180 CRVML_DEVICE_LPC, NULL);
183 if (!lpc_dev) { 181 if (!lpc_dev) {
@@ -193,27 +191,34 @@ static int cr_backlight_probe(struct platform_device *pdev)
193 return -ENODEV; 191 return -ENODEV;
194 } 192 }
195 193
196 crp->cr_backlight_device = backlight_device_register("cr-backlight", 194 bdp = backlight_device_register("cr-backlight",
197 &pdev->dev, NULL, 195 &pdev->dev, NULL, &cr_backlight_ops);
198 &cr_backlight_ops); 196 if (IS_ERR(bdp)) {
199 if (IS_ERR(crp->cr_backlight_device)) {
200 pci_dev_put(lpc_dev); 197 pci_dev_put(lpc_dev);
201 return PTR_ERR(crp->cr_backlight_device); 198 return PTR_ERR(bdp);
202 } 199 }
203 200
204 crp->cr_lcd_device = lcd_device_register("cr-lcd", 201 ldp = lcd_device_register("cr-lcd", &pdev->dev, NULL, &cr_lcd_ops);
205 &pdev->dev, NULL, 202 if (IS_ERR(ldp)) {
206 &cr_lcd_ops); 203 backlight_device_unregister(bdp);
207
208 if (IS_ERR(crp->cr_lcd_device)) {
209 pci_dev_put(lpc_dev); 204 pci_dev_put(lpc_dev);
210 return PTR_ERR(crp->cr_backlight_device); 205 return PTR_ERR(bdp);
211 } 206 }
212 207
213 pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR, 208 pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR,
214 &gpio_bar); 209 &gpio_bar);
215 gpio_bar &= ~0x3F; 210 gpio_bar &= ~0x3F;
216 211
212 crp = kzalloc(sizeof(*crp), GFP_KERNEL);
213 if (!crp) {
214 lcd_device_unregister(ldp);
215 backlight_device_unregister(bdp);
216 pci_dev_put(lpc_dev);
217 return -ENOMEM;
218 }
219
220 crp->cr_backlight_device = bdp;
221 crp->cr_lcd_device = ldp;
217 crp->cr_backlight_device->props.power = FB_BLANK_UNBLANK; 222 crp->cr_backlight_device->props.power = FB_BLANK_UNBLANK;
218 crp->cr_backlight_device->props.brightness = 0; 223 crp->cr_backlight_device->props.brightness = 0;
219 crp->cr_backlight_device->props.max_brightness = 0; 224 crp->cr_backlight_device->props.max_brightness = 0;
diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c
index 6f652c65fae1..299fd318dd45 100644
--- a/drivers/video/backlight/lcd.c
+++ b/drivers/video/backlight/lcd.c
@@ -149,7 +149,7 @@ static ssize_t lcd_show_max_contrast(struct device *dev,
149 return sprintf(buf, "%d\n", ld->props.max_contrast); 149 return sprintf(buf, "%d\n", ld->props.max_contrast);
150} 150}
151 151
152struct class *lcd_class; 152static struct class *lcd_class;
153 153
154static void lcd_device_release(struct device *dev) 154static void lcd_device_release(struct device *dev)
155{ 155{
diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
new file mode 100644
index 000000000000..2eb206bf73e6
--- /dev/null
+++ b/drivers/video/backlight/ltv350qv.c
@@ -0,0 +1,330 @@
1/*
2 * Power control for Samsung LTV350QV Quarter VGA LCD Panel
3 *
4 * Copyright (C) 2006, 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/fb.h>
13#include <linux/init.h>
14#include <linux/lcd.h>
15#include <linux/module.h>
16#include <linux/spi/spi.h>
17
18#include "ltv350qv.h"
19
20#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
21
22struct ltv350qv {
23 struct spi_device *spi;
24 u8 *buffer;
25 int power;
26 struct lcd_device *ld;
27};
28
29/*
30 * The power-on and power-off sequences are taken from the
31 * LTV350QV-F04 data sheet from Samsung. The register definitions are
32 * taken from the S6F2002 command list also from Samsung. Both
33 * documents are distributed with the AVR32 Linux BSP CD from Atmel.
34 *
35 * There's still some voodoo going on here, but it's a lot better than
36 * in the first incarnation of the driver where all we had was the raw
37 * numbers from the initialization sequence.
38 */
39static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
40{
41 struct spi_message msg;
42 struct spi_transfer index_xfer = {
43 .len = 3,
44 .cs_change = 1,
45 };
46 struct spi_transfer value_xfer = {
47 .len = 3,
48 };
49
50 spi_message_init(&msg);
51
52 /* register index */
53 lcd->buffer[0] = LTV_OPC_INDEX;
54 lcd->buffer[1] = 0x00;
55 lcd->buffer[2] = reg & 0x7f;
56 index_xfer.tx_buf = lcd->buffer;
57 spi_message_add_tail(&index_xfer, &msg);
58
59 /* register value */
60 lcd->buffer[4] = LTV_OPC_DATA;
61 lcd->buffer[5] = val >> 8;
62 lcd->buffer[6] = val;
63 value_xfer.tx_buf = lcd->buffer + 4;
64 spi_message_add_tail(&value_xfer, &msg);
65
66 return spi_sync(lcd->spi, &msg);
67}
68
69/* The comments are taken straight from the data sheet */
70static int ltv350qv_power_on(struct ltv350qv *lcd)
71{
72 int ret;
73
74 /* Power On Reset Display off State */
75 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
76 goto err;
77 msleep(15);
78
79 /* Power Setting Function 1 */
80 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
81 goto err;
82 if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
83 goto err_power1;
84
85 /* Power Setting Function 2 */
86 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
87 LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
88 | LTV_SUPPLY_CURRENT(5)))
89 goto err_power2;
90
91 msleep(55);
92
93 /* Instruction Setting */
94 ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
95 LTV_NMD | LTV_REV | LTV_NL(0x1d));
96 ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
97 LTV_DS_SAME | LTV_CHS_480
98 | LTV_DF_RGB | LTV_RGB_BGR);
99 ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
100 LTV_VSPL_ACTIVE_LOW
101 | LTV_HSPL_ACTIVE_LOW
102 | LTV_DPL_SAMPLE_RISING
103 | LTV_EPL_ACTIVE_LOW
104 | LTV_SS_RIGHT_TO_LEFT);
105 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
106 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
107 LTV_NW_INV_1LINE | LTV_FWI(3));
108 ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
109 ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
110 ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
111 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
112 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
113 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
114 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
115 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
116 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
117 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
118 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
119 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
120 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
121 if (ret)
122 goto err_settings;
123
124 /* Wait more than 2 frames */
125 msleep(20);
126
127 /* Display On Sequence */
128 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
129 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
130 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
131 | LTV_SUPPLY_CURRENT(5));
132 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
133 LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
134 if (ret)
135 goto err_disp_on;
136
137 /* Display should now be ON. Phew. */
138 return 0;
139
140err_disp_on:
141 /*
142 * Try to recover. Error handling probably isn't very useful
143 * at this point, just make a best effort to switch the panel
144 * off.
145 */
146 ltv350qv_write_reg(lcd, LTV_PWRCTL1,
147 LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
148 | LTV_SUPPLY_CURRENT(5));
149 ltv350qv_write_reg(lcd, LTV_GATECTL2,
150 LTV_NW_INV_1LINE | LTV_FWI(3));
151err_settings:
152err_power2:
153err_power1:
154 ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
155 msleep(1);
156err:
157 ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
158 return -EIO;
159}
160
161static int ltv350qv_power_off(struct ltv350qv *lcd)
162{
163 int ret;
164
165 /* Display Off Sequence */
166 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
167 LTV_VCOM_DISABLE
168 | LTV_DRIVE_CURRENT(5)
169 | LTV_SUPPLY_CURRENT(5));
170 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
171 LTV_NW_INV_1LINE | LTV_FWI(3));
172
173 /* Power down setting 1 */
174 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
175
176 /* Wait at least 1 ms */
177 msleep(1);
178
179 /* Power down setting 2 */
180 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
181
182 /*
183 * No point in trying to recover here. If we can't switch the
184 * panel off, what are we supposed to do other than inform the
185 * user about the failure?
186 */
187 if (ret)
188 return -EIO;
189
190 /* Display power should now be OFF */
191 return 0;
192}
193
194static int ltv350qv_power(struct ltv350qv *lcd, int power)
195{
196 int ret = 0;
197
198 if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
199 ret = ltv350qv_power_on(lcd);
200 else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
201 ret = ltv350qv_power_off(lcd);
202
203 if (!ret)
204 lcd->power = power;
205
206 return ret;
207}
208
209static int ltv350qv_set_power(struct lcd_device *ld, int power)
210{
211 struct ltv350qv *lcd = lcd_get_data(ld);
212
213 return ltv350qv_power(lcd, power);
214}
215
216static int ltv350qv_get_power(struct lcd_device *ld)
217{
218 struct ltv350qv *lcd = lcd_get_data(ld);
219
220 return lcd->power;
221}
222
223static struct lcd_ops ltv_ops = {
224 .get_power = ltv350qv_get_power,
225 .set_power = ltv350qv_set_power,
226};
227
228static int __devinit ltv350qv_probe(struct spi_device *spi)
229{
230 struct ltv350qv *lcd;
231 struct lcd_device *ld;
232 int ret;
233
234 lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
235 if (!lcd)
236 return -ENOMEM;
237
238 lcd->spi = spi;
239 lcd->power = FB_BLANK_POWERDOWN;
240 lcd->buffer = kzalloc(8, GFP_KERNEL);
241
242 ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
243 if (IS_ERR(ld)) {
244 ret = PTR_ERR(ld);
245 goto out_free_lcd;
246 }
247 lcd->ld = ld;
248
249 ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
250 if (ret)
251 goto out_unregister;
252
253 dev_set_drvdata(&spi->dev, lcd);
254
255 return 0;
256
257out_unregister:
258 lcd_device_unregister(ld);
259out_free_lcd:
260 kfree(lcd);
261 return ret;
262}
263
264static int __devexit ltv350qv_remove(struct spi_device *spi)
265{
266 struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
267
268 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
269 lcd_device_unregister(lcd->ld);
270 kfree(lcd);
271
272 return 0;
273}
274
275#ifdef CONFIG_PM
276static int ltv350qv_suspend(struct spi_device *spi, pm_message_t state)
277{
278 struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
279
280 return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
281}
282
283static int ltv350qv_resume(struct spi_device *spi)
284{
285 struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
286
287 return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
288}
289#else
290#define ltv350qv_suspend NULL
291#define ltv350qv_resume NULL
292#endif
293
294/* Power down all displays on reboot, poweroff or halt */
295static void ltv350qv_shutdown(struct spi_device *spi)
296{
297 struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
298
299 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
300}
301
302static struct spi_driver ltv350qv_driver = {
303 .driver = {
304 .name = "ltv350qv",
305 .bus = &spi_bus_type,
306 .owner = THIS_MODULE,
307 },
308
309 .probe = ltv350qv_probe,
310 .remove = __devexit_p(ltv350qv_remove),
311 .shutdown = ltv350qv_shutdown,
312 .suspend = ltv350qv_suspend,
313 .resume = ltv350qv_resume,
314};
315
316static int __init ltv350qv_init(void)
317{
318 return spi_register_driver(&ltv350qv_driver);
319}
320
321static void __exit ltv350qv_exit(void)
322{
323 spi_unregister_driver(&ltv350qv_driver);
324}
325module_init(ltv350qv_init);
326module_exit(ltv350qv_exit);
327
328MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
329MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
330MODULE_LICENSE("GPL");
diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
new file mode 100644
index 000000000000..189112e3fc7a
--- /dev/null
+++ b/drivers/video/backlight/ltv350qv.h
@@ -0,0 +1,95 @@
1/*
2 * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
3 *
4 * Copyright (C) 2006, 2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __LTV350QV_H
11#define __LTV350QV_H
12
13#define LTV_OPC_INDEX 0x74
14#define LTV_OPC_DATA 0x76
15
16#define LTV_ID 0x00 /* ID Read */
17#define LTV_IFCTL 0x01 /* Display Interface Control */
18#define LTV_DATACTL 0x02 /* Display Data Control */
19#define LTV_ENTRY_MODE 0x03 /* Entry Mode */
20#define LTV_GATECTL1 0x04 /* Gate Control 1 */
21#define LTV_GATECTL2 0x05 /* Gate Control 2 */
22#define LTV_VBP 0x06 /* Vertical Back Porch */
23#define LTV_HBP 0x07 /* Horizontal Back Porch */
24#define LTV_SOTCTL 0x08 /* Source Output Timing Control */
25#define LTV_PWRCTL1 0x09 /* Power Control 1 */
26#define LTV_PWRCTL2 0x0a /* Power Control 2 */
27#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */
28
29/* Bit definitions for LTV_IFCTL */
30#define LTV_IM (1 << 15)
31#define LTV_NMD (1 << 14)
32#define LTV_SSMD (1 << 13)
33#define LTV_REV (1 << 7)
34#define LTV_NL(x) (((x) & 0x001f) << 0)
35
36/* Bit definitions for LTV_DATACTL */
37#define LTV_DS_SAME (0 << 12)
38#define LTV_DS_D_TO_S (1 << 12)
39#define LTV_DS_S_TO_D (2 << 12)
40#define LTV_CHS_384 (0 << 9)
41#define LTV_CHS_480 (1 << 9)
42#define LTV_CHS_492 (2 << 9)
43#define LTV_DF_RGB (0 << 6)
44#define LTV_DF_RGBX (1 << 6)
45#define LTV_DF_XRGB (2 << 6)
46#define LTV_RGB_RGB (0 << 2)
47#define LTV_RGB_BGR (1 << 2)
48#define LTV_RGB_GRB (2 << 2)
49#define LTV_RGB_RBG (3 << 2)
50
51/* Bit definitions for LTV_ENTRY_MODE */
52#define LTV_VSPL_ACTIVE_LOW (0 << 15)
53#define LTV_VSPL_ACTIVE_HIGH (1 << 15)
54#define LTV_HSPL_ACTIVE_LOW (0 << 14)
55#define LTV_HSPL_ACTIVE_HIGH (1 << 14)
56#define LTV_DPL_SAMPLE_RISING (0 << 13)
57#define LTV_DPL_SAMPLE_FALLING (1 << 13)
58#define LTV_EPL_ACTIVE_LOW (0 << 12)
59#define LTV_EPL_ACTIVE_HIGH (1 << 12)
60#define LTV_SS_LEFT_TO_RIGHT (0 << 8)
61#define LTV_SS_RIGHT_TO_LEFT (1 << 8)
62#define LTV_STB (1 << 1)
63
64/* Bit definitions for LTV_GATECTL1 */
65#define LTV_CLW(x) (((x) & 0x0007) << 12)
66#define LTV_GAON (1 << 5)
67#define LTV_SDR (1 << 3)
68
69/* Bit definitions for LTV_GATECTL2 */
70#define LTV_NW_INV_FRAME (0 << 14)
71#define LTV_NW_INV_1LINE (1 << 14)
72#define LTV_NW_INV_2LINE (2 << 14)
73#define LTV_DSC (1 << 12)
74#define LTV_GIF (1 << 8)
75#define LTV_FHN (1 << 7)
76#define LTV_FTI(x) (((x) & 0x0003) << 4)
77#define LTV_FWI(x) (((x) & 0x0003) << 0)
78
79/* Bit definitions for LTV_SOTCTL */
80#define LTV_SDT(x) (((x) & 0x0007) << 10)
81#define LTV_EQ(x) (((x) & 0x0007) << 2)
82
83/* Bit definitions for LTV_PWRCTL1 */
84#define LTV_VCOM_DISABLE (1 << 14)
85#define LTV_VCOMOUT_ENABLE (1 << 11)
86#define LTV_POWER_ON (1 << 9)
87#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */
88#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */
89
90/* Bit definitions for LTV_PWRCTL2 */
91#define LTV_VCOML_ENABLE (1 << 13)
92#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */
93#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */
94
95#endif /* __LTV350QV_H */
diff --git a/drivers/video/imacfb.c b/drivers/video/imacfb.c
index 18ea4a549105..6455fd2a39f2 100644
--- a/drivers/video/imacfb.c
+++ b/drivers/video/imacfb.c
@@ -58,7 +58,7 @@ static int model = M_UNKNOWN;
58static int manual_height; 58static int manual_height;
59static int manual_width; 59static int manual_width;
60 60
61static int set_system(struct dmi_system_id *id) 61static int set_system(const struct dmi_system_id *id)
62{ 62{
63 printk(KERN_INFO "imacfb: %s detected - set system to %ld\n", 63 printk(KERN_INFO "imacfb: %s detected - set system to %ld\n",
64 id->ident, (long)id->driver_data); 64 id->ident, (long)id->driver_data);
diff --git a/fs/bio.c b/fs/bio.c
index 29a44c1b64c6..5f604f269dfa 100644
--- a/fs/bio.c
+++ b/fs/bio.c
@@ -798,13 +798,9 @@ void bio_unmap_user(struct bio *bio)
798 bio_put(bio); 798 bio_put(bio);
799} 799}
800 800
801static int bio_map_kern_endio(struct bio *bio, unsigned int bytes_done, int err) 801static void bio_map_kern_endio(struct bio *bio, int err)
802{ 802{
803 if (bio->bi_size)
804 return 1;
805
806 bio_put(bio); 803 bio_put(bio);
807 return 0;
808} 804}
809 805
810 806
@@ -1002,34 +998,26 @@ void bio_check_pages_dirty(struct bio *bio)
1002/** 998/**
1003 * bio_endio - end I/O on a bio 999 * bio_endio - end I/O on a bio
1004 * @bio: bio 1000 * @bio: bio
1005 * @bytes_done: number of bytes completed
1006 * @error: error, if any 1001 * @error: error, if any
1007 * 1002 *
1008 * Description: 1003 * Description:
1009 * bio_endio() will end I/O on @bytes_done number of bytes. This may be 1004 * bio_endio() will end I/O on the whole bio. bio_endio() is the
1010 * just a partial part of the bio, or it may be the whole bio. bio_endio() 1005 * preferred way to end I/O on a bio, it takes care of clearing
1011 * is the preferred way to end I/O on a bio, it takes care of decrementing 1006 * BIO_UPTODATE on error. @error is 0 on success, and and one of the
1012 * bi_size and clearing BIO_UPTODATE on error. @error is 0 on success, and 1007 * established -Exxxx (-EIO, for instance) error values in case
1013 * and one of the established -Exxxx (-EIO, for instance) error values in 1008 * something went wrong. Noone should call bi_end_io() directly on a
1014 * case something went wrong. Noone should call bi_end_io() directly on 1009 * bio unless they own it and thus know that it has an end_io
1015 * a bio unless they own it and thus know that it has an end_io function. 1010 * function.
1016 **/ 1011 **/
1017void bio_endio(struct bio *bio, unsigned int bytes_done, int error) 1012void bio_endio(struct bio *bio, int error)
1018{ 1013{
1019 if (error) 1014 if (error)
1020 clear_bit(BIO_UPTODATE, &bio->bi_flags); 1015 clear_bit(BIO_UPTODATE, &bio->bi_flags);
1021 1016 else if (!test_bit(BIO_UPTODATE, &bio->bi_flags))
1022 if (unlikely(bytes_done > bio->bi_size)) { 1017 error = -EIO;
1023 printk("%s: want %u bytes done, only %u left\n", __FUNCTION__,
1024 bytes_done, bio->bi_size);
1025 bytes_done = bio->bi_size;
1026 }
1027
1028 bio->bi_size -= bytes_done;
1029 bio->bi_sector += (bytes_done >> 9);
1030 1018
1031 if (bio->bi_end_io) 1019 if (bio->bi_end_io)
1032 bio->bi_end_io(bio, bytes_done, error); 1020 bio->bi_end_io(bio, error);
1033} 1021}
1034 1022
1035void bio_pair_release(struct bio_pair *bp) 1023void bio_pair_release(struct bio_pair *bp)
@@ -1037,37 +1025,29 @@ void bio_pair_release(struct bio_pair *bp)
1037 if (atomic_dec_and_test(&bp->cnt)) { 1025 if (atomic_dec_and_test(&bp->cnt)) {
1038 struct bio *master = bp->bio1.bi_private; 1026 struct bio *master = bp->bio1.bi_private;
1039 1027
1040 bio_endio(master, master->bi_size, bp->error); 1028 bio_endio(master, bp->error);
1041 mempool_free(bp, bp->bio2.bi_private); 1029 mempool_free(bp, bp->bio2.bi_private);
1042 } 1030 }
1043} 1031}
1044 1032
1045static int bio_pair_end_1(struct bio * bi, unsigned int done, int err) 1033static void bio_pair_end_1(struct bio *bi, int err)
1046{ 1034{
1047 struct bio_pair *bp = container_of(bi, struct bio_pair, bio1); 1035 struct bio_pair *bp = container_of(bi, struct bio_pair, bio1);
1048 1036
1049 if (err) 1037 if (err)
1050 bp->error = err; 1038 bp->error = err;
1051 1039
1052 if (bi->bi_size)
1053 return 1;
1054
1055 bio_pair_release(bp); 1040 bio_pair_release(bp);
1056 return 0;
1057} 1041}
1058 1042
1059static int bio_pair_end_2(struct bio * bi, unsigned int done, int err) 1043static void bio_pair_end_2(struct bio *bi, int err)
1060{ 1044{
1061 struct bio_pair *bp = container_of(bi, struct bio_pair, bio2); 1045 struct bio_pair *bp = container_of(bi, struct bio_pair, bio2);
1062 1046
1063 if (err) 1047 if (err)
1064 bp->error = err; 1048 bp->error = err;
1065 1049
1066 if (bi->bi_size)
1067 return 1;
1068
1069 bio_pair_release(bp); 1050 bio_pair_release(bp);
1070 return 0;
1071} 1051}
1072 1052
1073/* 1053/*
diff --git a/fs/block_dev.c b/fs/block_dev.c
index 2980eabe5779..6339a30879b7 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -172,7 +172,7 @@ blkdev_direct_IO(int rw, struct kiocb *iocb, const struct iovec *iov,
172} 172}
173 173
174#if 0 174#if 0
175static int blk_end_aio(struct bio *bio, unsigned int bytes_done, int error) 175static void blk_end_aio(struct bio *bio, int error)
176{ 176{
177 struct kiocb *iocb = bio->bi_private; 177 struct kiocb *iocb = bio->bi_private;
178 atomic_t *bio_count = &iocb->ki_bio_count; 178 atomic_t *bio_count = &iocb->ki_bio_count;
diff --git a/fs/buffer.c b/fs/buffer.c
index 0e5ec371ce72..75b51dfa5e03 100644
--- a/fs/buffer.c
+++ b/fs/buffer.c
@@ -2634,13 +2634,10 @@ sector_t generic_block_bmap(struct address_space *mapping, sector_t block,
2634 return tmp.b_blocknr; 2634 return tmp.b_blocknr;
2635} 2635}
2636 2636
2637static int end_bio_bh_io_sync(struct bio *bio, unsigned int bytes_done, int err) 2637static void end_bio_bh_io_sync(struct bio *bio, int err)
2638{ 2638{
2639 struct buffer_head *bh = bio->bi_private; 2639 struct buffer_head *bh = bio->bi_private;
2640 2640
2641 if (bio->bi_size)
2642 return 1;
2643
2644 if (err == -EOPNOTSUPP) { 2641 if (err == -EOPNOTSUPP) {
2645 set_bit(BIO_EOPNOTSUPP, &bio->bi_flags); 2642 set_bit(BIO_EOPNOTSUPP, &bio->bi_flags);
2646 set_bit(BH_Eopnotsupp, &bh->b_state); 2643 set_bit(BH_Eopnotsupp, &bh->b_state);
@@ -2648,7 +2645,6 @@ static int end_bio_bh_io_sync(struct bio *bio, unsigned int bytes_done, int err)
2648 2645
2649 bh->b_end_io(bh, test_bit(BIO_UPTODATE, &bio->bi_flags)); 2646 bh->b_end_io(bh, test_bit(BIO_UPTODATE, &bio->bi_flags));
2650 bio_put(bio); 2647 bio_put(bio);
2651 return 0;
2652} 2648}
2653 2649
2654int submit_bh(int rw, struct buffer_head * bh) 2650int submit_bh(int rw, struct buffer_head * bh)
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index d917e4a26a43..9c3fd07f35e0 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -21,7 +21,6 @@
21#include <linux/if.h> 21#include <linux/if.h>
22#include <linux/if_bridge.h> 22#include <linux/if_bridge.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/hdreg.h>
25#include <linux/raid/md.h> 24#include <linux/raid/md.h>
26#include <linux/kd.h> 25#include <linux/kd.h>
27#include <linux/dirent.h> 26#include <linux/dirent.h>
@@ -33,12 +32,10 @@
33#include <linux/vt.h> 32#include <linux/vt.h>
34#include <linux/fs.h> 33#include <linux/fs.h>
35#include <linux/file.h> 34#include <linux/file.h>
36#include <linux/fd.h>
37#include <linux/ppp_defs.h> 35#include <linux/ppp_defs.h>
38#include <linux/if_ppp.h> 36#include <linux/if_ppp.h>
39#include <linux/if_pppox.h> 37#include <linux/if_pppox.h>
40#include <linux/mtio.h> 38#include <linux/mtio.h>
41#include <linux/cdrom.h>
42#include <linux/auto_fs.h> 39#include <linux/auto_fs.h>
43#include <linux/auto_fs4.h> 40#include <linux/auto_fs4.h>
44#include <linux/tty.h> 41#include <linux/tty.h>
@@ -48,7 +45,6 @@
48#include <linux/netdevice.h> 45#include <linux/netdevice.h>
49#include <linux/raw.h> 46#include <linux/raw.h>
50#include <linux/smb_fs.h> 47#include <linux/smb_fs.h>
51#include <linux/blkpg.h>
52#include <linux/blkdev.h> 48#include <linux/blkdev.h>
53#include <linux/elevator.h> 49#include <linux/elevator.h>
54#include <linux/rtc.h> 50#include <linux/rtc.h>
@@ -62,7 +58,6 @@
62#include <linux/i2c-dev.h> 58#include <linux/i2c-dev.h>
63#include <linux/wireless.h> 59#include <linux/wireless.h>
64#include <linux/atalk.h> 60#include <linux/atalk.h>
65#include <linux/blktrace_api.h>
66#include <linux/loop.h> 61#include <linux/loop.h>
67 62
68#include <net/bluetooth/bluetooth.h> 63#include <net/bluetooth/bluetooth.h>
@@ -667,53 +662,6 @@ out:
667#endif 662#endif
668 663
669#ifdef CONFIG_BLOCK 664#ifdef CONFIG_BLOCK
670struct hd_geometry32 {
671 unsigned char heads;
672 unsigned char sectors;
673 unsigned short cylinders;
674 u32 start;
675};
676
677static int hdio_getgeo(unsigned int fd, unsigned int cmd, unsigned long arg)
678{
679 mm_segment_t old_fs = get_fs();
680 struct hd_geometry geo;
681 struct hd_geometry32 __user *ugeo;
682 int err;
683
684 set_fs (KERNEL_DS);
685 err = sys_ioctl(fd, HDIO_GETGEO, (unsigned long)&geo);
686 set_fs (old_fs);
687 ugeo = compat_ptr(arg);
688 if (!err) {
689 err = copy_to_user (ugeo, &geo, 4);
690 err |= __put_user (geo.start, &ugeo->start);
691 if (err)
692 err = -EFAULT;
693 }
694 return err;
695}
696
697static int hdio_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
698{
699 mm_segment_t old_fs = get_fs();
700 unsigned long kval;
701 unsigned int __user *uvp;
702 int error;
703
704 set_fs(KERNEL_DS);
705 error = sys_ioctl(fd, cmd, (long)&kval);
706 set_fs(old_fs);
707
708 if(error == 0) {
709 uvp = compat_ptr(arg);
710 if(put_user(kval, uvp))
711 error = -EFAULT;
712 }
713 return error;
714}
715
716
717typedef struct sg_io_hdr32 { 665typedef struct sg_io_hdr32 {
718 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */ 666 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
719 compat_int_t dxfer_direction; /* [i] data transfer direction */ 667 compat_int_t dxfer_direction; /* [i] data transfer direction */
@@ -1088,108 +1036,6 @@ static int mt_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
1088 return err ? -EFAULT: 0; 1036 return err ? -EFAULT: 0;
1089} 1037}
1090 1038
1091struct cdrom_read_audio32 {
1092 union cdrom_addr addr;
1093 u8 addr_format;
1094 compat_int_t nframes;
1095 compat_caddr_t buf;
1096};
1097
1098struct cdrom_generic_command32 {
1099 unsigned char cmd[CDROM_PACKET_SIZE];
1100 compat_caddr_t buffer;
1101 compat_uint_t buflen;
1102 compat_int_t stat;
1103 compat_caddr_t sense;
1104 unsigned char data_direction;
1105 compat_int_t quiet;
1106 compat_int_t timeout;
1107 compat_caddr_t reserved[1];
1108};
1109
1110static int cdrom_do_read_audio(unsigned int fd, unsigned int cmd, unsigned long arg)
1111{
1112 struct cdrom_read_audio __user *cdread_audio;
1113 struct cdrom_read_audio32 __user *cdread_audio32;
1114 __u32 data;
1115 void __user *datap;
1116
1117 cdread_audio = compat_alloc_user_space(sizeof(*cdread_audio));
1118 cdread_audio32 = compat_ptr(arg);
1119
1120 if (copy_in_user(&cdread_audio->addr,
1121 &cdread_audio32->addr,
1122 (sizeof(*cdread_audio32) -
1123 sizeof(compat_caddr_t))))
1124 return -EFAULT;
1125
1126 if (get_user(data, &cdread_audio32->buf))
1127 return -EFAULT;
1128 datap = compat_ptr(data);
1129 if (put_user(datap, &cdread_audio->buf))
1130 return -EFAULT;
1131
1132 return sys_ioctl(fd, cmd, (unsigned long) cdread_audio);
1133}
1134
1135static int cdrom_do_generic_command(unsigned int fd, unsigned int cmd, unsigned long arg)
1136{
1137 struct cdrom_generic_command __user *cgc;
1138 struct cdrom_generic_command32 __user *cgc32;
1139 u32 data;
1140 unsigned char dir;
1141 int itmp;
1142
1143 cgc = compat_alloc_user_space(sizeof(*cgc));
1144 cgc32 = compat_ptr(arg);
1145
1146 if (copy_in_user(&cgc->cmd, &cgc32->cmd, sizeof(cgc->cmd)) ||
1147 get_user(data, &cgc32->buffer) ||
1148 put_user(compat_ptr(data), &cgc->buffer) ||
1149 copy_in_user(&cgc->buflen, &cgc32->buflen,
1150 (sizeof(unsigned int) + sizeof(int))) ||
1151 get_user(data, &cgc32->sense) ||
1152 put_user(compat_ptr(data), &cgc->sense) ||
1153 get_user(dir, &cgc32->data_direction) ||
1154 put_user(dir, &cgc->data_direction) ||
1155 get_user(itmp, &cgc32->quiet) ||
1156 put_user(itmp, &cgc->quiet) ||
1157 get_user(itmp, &cgc32->timeout) ||
1158 put_user(itmp, &cgc->timeout) ||
1159 get_user(data, &cgc32->reserved[0]) ||
1160 put_user(compat_ptr(data), &cgc->reserved[0]))
1161 return -EFAULT;
1162
1163 return sys_ioctl(fd, cmd, (unsigned long) cgc);
1164}
1165
1166static int cdrom_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
1167{
1168 int err;
1169
1170 switch(cmd) {
1171 case CDROMREADAUDIO:
1172 err = cdrom_do_read_audio(fd, cmd, arg);
1173 break;
1174
1175 case CDROM_SEND_PACKET:
1176 err = cdrom_do_generic_command(fd, cmd, arg);
1177 break;
1178
1179 default:
1180 do {
1181 static int count;
1182 if (++count <= 20)
1183 printk("cdrom_ioctl: Unknown cmd fd(%d) "
1184 "cmd(%08x) arg(%08x)\n",
1185 (int)fd, (unsigned int)cmd, (unsigned int)arg);
1186 } while(0);
1187 err = -EINVAL;
1188 break;
1189 };
1190
1191 return err;
1192}
1193#endif /* CONFIG_BLOCK */ 1039#endif /* CONFIG_BLOCK */
1194 1040
1195#ifdef CONFIG_VT 1041#ifdef CONFIG_VT
@@ -1535,71 +1381,11 @@ ret_einval(unsigned int fd, unsigned int cmd, unsigned long arg)
1535 return -EINVAL; 1381 return -EINVAL;
1536} 1382}
1537 1383
1538#ifdef CONFIG_BLOCK
1539static int broken_blkgetsize(unsigned int fd, unsigned int cmd, unsigned long arg)
1540{
1541 /* The mkswap binary hard codes it to Intel value :-((( */
1542 return w_long(fd, BLKGETSIZE, arg);
1543}
1544
1545struct blkpg_ioctl_arg32 {
1546 compat_int_t op;
1547 compat_int_t flags;
1548 compat_int_t datalen;
1549 compat_caddr_t data;
1550};
1551
1552static int blkpg_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
1553{
1554 struct blkpg_ioctl_arg32 __user *ua32 = compat_ptr(arg);
1555 struct blkpg_ioctl_arg __user *a = compat_alloc_user_space(sizeof(*a));
1556 compat_caddr_t udata;
1557 compat_int_t n;
1558 int err;
1559
1560 err = get_user(n, &ua32->op);
1561 err |= put_user(n, &a->op);
1562 err |= get_user(n, &ua32->flags);
1563 err |= put_user(n, &a->flags);
1564 err |= get_user(n, &ua32->datalen);
1565 err |= put_user(n, &a->datalen);
1566 err |= get_user(udata, &ua32->data);
1567 err |= put_user(compat_ptr(udata), &a->data);
1568 if (err)
1569 return err;
1570
1571 return sys_ioctl(fd, cmd, (unsigned long)a);
1572}
1573#endif
1574
1575static int ioc_settimeout(unsigned int fd, unsigned int cmd, unsigned long arg) 1384static int ioc_settimeout(unsigned int fd, unsigned int cmd, unsigned long arg)
1576{ 1385{
1577 return rw_long(fd, AUTOFS_IOC_SETTIMEOUT, arg); 1386 return rw_long(fd, AUTOFS_IOC_SETTIMEOUT, arg);
1578} 1387}
1579 1388
1580#ifdef CONFIG_BLOCK
1581/* Fix sizeof(sizeof()) breakage */
1582#define BLKBSZGET_32 _IOR(0x12,112,int)
1583#define BLKBSZSET_32 _IOW(0x12,113,int)
1584#define BLKGETSIZE64_32 _IOR(0x12,114,int)
1585
1586static int do_blkbszget(unsigned int fd, unsigned int cmd, unsigned long arg)
1587{
1588 return sys_ioctl(fd, BLKBSZGET, (unsigned long)compat_ptr(arg));
1589}
1590
1591static int do_blkbszset(unsigned int fd, unsigned int cmd, unsigned long arg)
1592{
1593 return sys_ioctl(fd, BLKBSZSET, (unsigned long)compat_ptr(arg));
1594}
1595
1596static int do_blkgetsize64(unsigned int fd, unsigned int cmd,
1597 unsigned long arg)
1598{
1599 return sys_ioctl(fd, BLKGETSIZE64, (unsigned long)compat_ptr(arg));
1600}
1601#endif
1602
1603/* Bluetooth ioctls */ 1389/* Bluetooth ioctls */
1604#define HCIUARTSETPROTO _IOW('U', 200, int) 1390#define HCIUARTSETPROTO _IOW('U', 200, int)
1605#define HCIUARTGETPROTO _IOR('U', 201, int) 1391#define HCIUARTGETPROTO _IOR('U', 201, int)
@@ -1619,333 +1405,6 @@ static int do_blkgetsize64(unsigned int fd, unsigned int cmd,
1619#define HIDPGETCONNLIST _IOR('H', 210, int) 1405#define HIDPGETCONNLIST _IOR('H', 210, int)
1620#define HIDPGETCONNINFO _IOR('H', 211, int) 1406#define HIDPGETCONNINFO _IOR('H', 211, int)
1621 1407
1622#ifdef CONFIG_BLOCK
1623struct floppy_struct32 {
1624 compat_uint_t size;
1625 compat_uint_t sect;
1626 compat_uint_t head;
1627 compat_uint_t track;
1628 compat_uint_t stretch;
1629 unsigned char gap;
1630 unsigned char rate;
1631 unsigned char spec1;
1632 unsigned char fmt_gap;
1633 const compat_caddr_t name;
1634};
1635
1636struct floppy_drive_params32 {
1637 char cmos;
1638 compat_ulong_t max_dtr;
1639 compat_ulong_t hlt;
1640 compat_ulong_t hut;
1641 compat_ulong_t srt;
1642 compat_ulong_t spinup;
1643 compat_ulong_t spindown;
1644 unsigned char spindown_offset;
1645 unsigned char select_delay;
1646 unsigned char rps;
1647 unsigned char tracks;
1648 compat_ulong_t timeout;
1649 unsigned char interleave_sect;
1650 struct floppy_max_errors max_errors;
1651 char flags;
1652 char read_track;
1653 short autodetect[8];
1654 compat_int_t checkfreq;
1655 compat_int_t native_format;
1656};
1657
1658struct floppy_drive_struct32 {
1659 signed char flags;
1660 compat_ulong_t spinup_date;
1661 compat_ulong_t select_date;
1662 compat_ulong_t first_read_date;
1663 short probed_format;
1664 short track;
1665 short maxblock;
1666 short maxtrack;
1667 compat_int_t generation;
1668 compat_int_t keep_data;
1669 compat_int_t fd_ref;
1670 compat_int_t fd_device;
1671 compat_int_t last_checked;
1672 compat_caddr_t dmabuf;
1673 compat_int_t bufblocks;
1674};
1675
1676struct floppy_fdc_state32 {
1677 compat_int_t spec1;
1678 compat_int_t spec2;
1679 compat_int_t dtr;
1680 unsigned char version;
1681 unsigned char dor;
1682 compat_ulong_t address;
1683 unsigned int rawcmd:2;
1684 unsigned int reset:1;
1685 unsigned int need_configure:1;
1686 unsigned int perp_mode:2;
1687 unsigned int has_fifo:1;
1688 unsigned int driver_version;
1689 unsigned char track[4];
1690};
1691
1692struct floppy_write_errors32 {
1693 unsigned int write_errors;
1694 compat_ulong_t first_error_sector;
1695 compat_int_t first_error_generation;
1696 compat_ulong_t last_error_sector;
1697 compat_int_t last_error_generation;
1698 compat_uint_t badness;
1699};
1700
1701#define FDSETPRM32 _IOW(2, 0x42, struct floppy_struct32)
1702#define FDDEFPRM32 _IOW(2, 0x43, struct floppy_struct32)
1703#define FDGETPRM32 _IOR(2, 0x04, struct floppy_struct32)
1704#define FDSETDRVPRM32 _IOW(2, 0x90, struct floppy_drive_params32)
1705#define FDGETDRVPRM32 _IOR(2, 0x11, struct floppy_drive_params32)
1706#define FDGETDRVSTAT32 _IOR(2, 0x12, struct floppy_drive_struct32)
1707#define FDPOLLDRVSTAT32 _IOR(2, 0x13, struct floppy_drive_struct32)
1708#define FDGETFDCSTAT32 _IOR(2, 0x15, struct floppy_fdc_state32)
1709#define FDWERRORGET32 _IOR(2, 0x17, struct floppy_write_errors32)
1710
1711static struct {
1712 unsigned int cmd32;
1713 unsigned int cmd;
1714} fd_ioctl_trans_table[] = {
1715 { FDSETPRM32, FDSETPRM },
1716 { FDDEFPRM32, FDDEFPRM },
1717 { FDGETPRM32, FDGETPRM },
1718 { FDSETDRVPRM32, FDSETDRVPRM },
1719 { FDGETDRVPRM32, FDGETDRVPRM },
1720 { FDGETDRVSTAT32, FDGETDRVSTAT },
1721 { FDPOLLDRVSTAT32, FDPOLLDRVSTAT },
1722 { FDGETFDCSTAT32, FDGETFDCSTAT },
1723 { FDWERRORGET32, FDWERRORGET }
1724};
1725
1726#define NR_FD_IOCTL_TRANS ARRAY_SIZE(fd_ioctl_trans_table)
1727
1728static int fd_ioctl_trans(unsigned int fd, unsigned int cmd, unsigned long arg)
1729{
1730 mm_segment_t old_fs = get_fs();
1731 void *karg = NULL;
1732 unsigned int kcmd = 0;
1733 int i, err;
1734
1735 for (i = 0; i < NR_FD_IOCTL_TRANS; i++)
1736 if (cmd == fd_ioctl_trans_table[i].cmd32) {
1737 kcmd = fd_ioctl_trans_table[i].cmd;
1738 break;
1739 }
1740 if (!kcmd)
1741 return -EINVAL;
1742
1743 switch (cmd) {
1744 case FDSETPRM32:
1745 case FDDEFPRM32:
1746 case FDGETPRM32:
1747 {
1748 compat_uptr_t name;
1749 struct floppy_struct32 __user *uf;
1750 struct floppy_struct *f;
1751
1752 uf = compat_ptr(arg);
1753 f = karg = kmalloc(sizeof(struct floppy_struct), GFP_KERNEL);
1754 if (!karg)
1755 return -ENOMEM;
1756 if (cmd == FDGETPRM32)
1757 break;
1758 err = __get_user(f->size, &uf->size);
1759 err |= __get_user(f->sect, &uf->sect);
1760 err |= __get_user(f->head, &uf->head);
1761 err |= __get_user(f->track, &uf->track);
1762 err |= __get_user(f->stretch, &uf->stretch);
1763 err |= __get_user(f->gap, &uf->gap);
1764 err |= __get_user(f->rate, &uf->rate);
1765 err |= __get_user(f->spec1, &uf->spec1);
1766 err |= __get_user(f->fmt_gap, &uf->fmt_gap);
1767 err |= __get_user(name, &uf->name);
1768 f->name = compat_ptr(name);
1769 if (err) {
1770 err = -EFAULT;
1771 goto out;
1772 }
1773 break;
1774 }
1775 case FDSETDRVPRM32:
1776 case FDGETDRVPRM32:
1777 {
1778 struct floppy_drive_params32 __user *uf;
1779 struct floppy_drive_params *f;
1780
1781 uf = compat_ptr(arg);
1782 f = karg = kmalloc(sizeof(struct floppy_drive_params), GFP_KERNEL);
1783 if (!karg)
1784 return -ENOMEM;
1785 if (cmd == FDGETDRVPRM32)
1786 break;
1787 err = __get_user(f->cmos, &uf->cmos);
1788 err |= __get_user(f->max_dtr, &uf->max_dtr);
1789 err |= __get_user(f->hlt, &uf->hlt);
1790 err |= __get_user(f->hut, &uf->hut);
1791 err |= __get_user(f->srt, &uf->srt);
1792 err |= __get_user(f->spinup, &uf->spinup);
1793 err |= __get_user(f->spindown, &uf->spindown);
1794 err |= __get_user(f->spindown_offset, &uf->spindown_offset);
1795 err |= __get_user(f->select_delay, &uf->select_delay);
1796 err |= __get_user(f->rps, &uf->rps);
1797 err |= __get_user(f->tracks, &uf->tracks);
1798 err |= __get_user(f->timeout, &uf->timeout);
1799 err |= __get_user(f->interleave_sect, &uf->interleave_sect);
1800 err |= __copy_from_user(&f->max_errors, &uf->max_errors, sizeof(f->max_errors));
1801 err |= __get_user(f->flags, &uf->flags);
1802 err |= __get_user(f->read_track, &uf->read_track);
1803 err |= __copy_from_user(f->autodetect, uf->autodetect, sizeof(f->autodetect));
1804 err |= __get_user(f->checkfreq, &uf->checkfreq);
1805 err |= __get_user(f->native_format, &uf->native_format);
1806 if (err) {
1807 err = -EFAULT;
1808 goto out;
1809 }
1810 break;
1811 }
1812 case FDGETDRVSTAT32:
1813 case FDPOLLDRVSTAT32:
1814 karg = kmalloc(sizeof(struct floppy_drive_struct), GFP_KERNEL);
1815 if (!karg)
1816 return -ENOMEM;
1817 break;
1818 case FDGETFDCSTAT32:
1819 karg = kmalloc(sizeof(struct floppy_fdc_state), GFP_KERNEL);
1820 if (!karg)
1821 return -ENOMEM;
1822 break;
1823 case FDWERRORGET32:
1824 karg = kmalloc(sizeof(struct floppy_write_errors), GFP_KERNEL);
1825 if (!karg)
1826 return -ENOMEM;
1827 break;
1828 default:
1829 return -EINVAL;
1830 }
1831 set_fs (KERNEL_DS);
1832 err = sys_ioctl (fd, kcmd, (unsigned long)karg);
1833 set_fs (old_fs);
1834 if (err)
1835 goto out;
1836 switch (cmd) {
1837 case FDGETPRM32:
1838 {
1839 struct floppy_struct *f = karg;
1840 struct floppy_struct32 __user *uf = compat_ptr(arg);
1841
1842 err = __put_user(f->size, &uf->size);
1843 err |= __put_user(f->sect, &uf->sect);
1844 err |= __put_user(f->head, &uf->head);
1845 err |= __put_user(f->track, &uf->track);
1846 err |= __put_user(f->stretch, &uf->stretch);
1847 err |= __put_user(f->gap, &uf->gap);
1848 err |= __put_user(f->rate, &uf->rate);
1849 err |= __put_user(f->spec1, &uf->spec1);
1850 err |= __put_user(f->fmt_gap, &uf->fmt_gap);
1851 err |= __put_user((u64)f->name, (compat_caddr_t __user *)&uf->name);
1852 break;
1853 }
1854 case FDGETDRVPRM32:
1855 {
1856 struct floppy_drive_params32 __user *uf;
1857 struct floppy_drive_params *f = karg;
1858
1859 uf = compat_ptr(arg);
1860 err = __put_user(f->cmos, &uf->cmos);
1861 err |= __put_user(f->max_dtr, &uf->max_dtr);
1862 err |= __put_user(f->hlt, &uf->hlt);
1863 err |= __put_user(f->hut, &uf->hut);
1864 err |= __put_user(f->srt, &uf->srt);
1865 err |= __put_user(f->spinup, &uf->spinup);
1866 err |= __put_user(f->spindown, &uf->spindown);
1867 err |= __put_user(f->spindown_offset, &uf->spindown_offset);
1868 err |= __put_user(f->select_delay, &uf->select_delay);
1869 err |= __put_user(f->rps, &uf->rps);
1870 err |= __put_user(f->tracks, &uf->tracks);
1871 err |= __put_user(f->timeout, &uf->timeout);
1872 err |= __put_user(f->interleave_sect, &uf->interleave_sect);
1873 err |= __copy_to_user(&uf->max_errors, &f->max_errors, sizeof(f->max_errors));
1874 err |= __put_user(f->flags, &uf->flags);
1875 err |= __put_user(f->read_track, &uf->read_track);
1876 err |= __copy_to_user(uf->autodetect, f->autodetect, sizeof(f->autodetect));
1877 err |= __put_user(f->checkfreq, &uf->checkfreq);
1878 err |= __put_user(f->native_format, &uf->native_format);
1879 break;
1880 }
1881 case FDGETDRVSTAT32:
1882 case FDPOLLDRVSTAT32:
1883 {
1884 struct floppy_drive_struct32 __user *uf;
1885 struct floppy_drive_struct *f = karg;
1886
1887 uf = compat_ptr(arg);
1888 err = __put_user(f->flags, &uf->flags);
1889 err |= __put_user(f->spinup_date, &uf->spinup_date);
1890 err |= __put_user(f->select_date, &uf->select_date);
1891 err |= __put_user(f->first_read_date, &uf->first_read_date);
1892 err |= __put_user(f->probed_format, &uf->probed_format);
1893 err |= __put_user(f->track, &uf->track);
1894 err |= __put_user(f->maxblock, &uf->maxblock);
1895 err |= __put_user(f->maxtrack, &uf->maxtrack);
1896 err |= __put_user(f->generation, &uf->generation);
1897 err |= __put_user(f->keep_data, &uf->keep_data);
1898 err |= __put_user(f->fd_ref, &uf->fd_ref);
1899 err |= __put_user(f->fd_device, &uf->fd_device);
1900 err |= __put_user(f->last_checked, &uf->last_checked);
1901 err |= __put_user((u64)f->dmabuf, &uf->dmabuf);
1902 err |= __put_user((u64)f->bufblocks, &uf->bufblocks);
1903 break;
1904 }
1905 case FDGETFDCSTAT32:
1906 {
1907 struct floppy_fdc_state32 __user *uf;
1908 struct floppy_fdc_state *f = karg;
1909
1910 uf = compat_ptr(arg);
1911 err = __put_user(f->spec1, &uf->spec1);
1912 err |= __put_user(f->spec2, &uf->spec2);
1913 err |= __put_user(f->dtr, &uf->dtr);
1914 err |= __put_user(f->version, &uf->version);
1915 err |= __put_user(f->dor, &uf->dor);
1916 err |= __put_user(f->address, &uf->address);
1917 err |= __copy_to_user((char __user *)&uf->address + sizeof(uf->address),
1918 (char *)&f->address + sizeof(f->address), sizeof(int));
1919 err |= __put_user(f->driver_version, &uf->driver_version);
1920 err |= __copy_to_user(uf->track, f->track, sizeof(f->track));
1921 break;
1922 }
1923 case FDWERRORGET32:
1924 {
1925 struct floppy_write_errors32 __user *uf;
1926 struct floppy_write_errors *f = karg;
1927
1928 uf = compat_ptr(arg);
1929 err = __put_user(f->write_errors, &uf->write_errors);
1930 err |= __put_user(f->first_error_sector, &uf->first_error_sector);
1931 err |= __put_user(f->first_error_generation, &uf->first_error_generation);
1932 err |= __put_user(f->last_error_sector, &uf->last_error_sector);
1933 err |= __put_user(f->last_error_generation, &uf->last_error_generation);
1934 err |= __put_user(f->badness, &uf->badness);
1935 break;
1936 }
1937 default:
1938 break;
1939 }
1940 if (err)
1941 err = -EFAULT;
1942
1943out:
1944 kfree(karg);
1945 return err;
1946}
1947#endif
1948
1949struct mtd_oob_buf32 { 1408struct mtd_oob_buf32 {
1950 u_int32_t start; 1409 u_int32_t start;
1951 u_int32_t length; 1410 u_int32_t length;
@@ -2505,60 +1964,6 @@ COMPATIBLE_IOCTL(FIONREAD) /* This is also TIOCINQ */
2505/* 0x00 */ 1964/* 0x00 */
2506COMPATIBLE_IOCTL(FIBMAP) 1965COMPATIBLE_IOCTL(FIBMAP)
2507COMPATIBLE_IOCTL(FIGETBSZ) 1966COMPATIBLE_IOCTL(FIGETBSZ)
2508/* 0x03 -- HD/IDE ioctl's used by hdparm and friends.
2509 * Some need translations, these do not.
2510 */
2511COMPATIBLE_IOCTL(HDIO_GET_IDENTITY)
2512COMPATIBLE_IOCTL(HDIO_DRIVE_TASK)
2513COMPATIBLE_IOCTL(HDIO_DRIVE_CMD)
2514ULONG_IOCTL(HDIO_SET_MULTCOUNT)
2515ULONG_IOCTL(HDIO_SET_UNMASKINTR)
2516ULONG_IOCTL(HDIO_SET_KEEPSETTINGS)
2517ULONG_IOCTL(HDIO_SET_32BIT)
2518ULONG_IOCTL(HDIO_SET_NOWERR)
2519ULONG_IOCTL(HDIO_SET_DMA)
2520ULONG_IOCTL(HDIO_SET_PIO_MODE)
2521ULONG_IOCTL(HDIO_SET_NICE)
2522ULONG_IOCTL(HDIO_SET_WCACHE)
2523ULONG_IOCTL(HDIO_SET_ACOUSTIC)
2524ULONG_IOCTL(HDIO_SET_BUSSTATE)
2525ULONG_IOCTL(HDIO_SET_ADDRESS)
2526COMPATIBLE_IOCTL(HDIO_SCAN_HWIF)
2527/* 0x330 is reserved -- it used to be HDIO_GETGEO_BIG */
2528COMPATIBLE_IOCTL(0x330)
2529/* 0x02 -- Floppy ioctls */
2530COMPATIBLE_IOCTL(FDMSGON)
2531COMPATIBLE_IOCTL(FDMSGOFF)
2532COMPATIBLE_IOCTL(FDSETEMSGTRESH)
2533COMPATIBLE_IOCTL(FDFLUSH)
2534COMPATIBLE_IOCTL(FDWERRORCLR)
2535COMPATIBLE_IOCTL(FDSETMAXERRS)
2536COMPATIBLE_IOCTL(FDGETMAXERRS)
2537COMPATIBLE_IOCTL(FDGETDRVTYP)
2538COMPATIBLE_IOCTL(FDEJECT)
2539COMPATIBLE_IOCTL(FDCLRPRM)
2540COMPATIBLE_IOCTL(FDFMTBEG)
2541COMPATIBLE_IOCTL(FDFMTEND)
2542COMPATIBLE_IOCTL(FDRESET)
2543COMPATIBLE_IOCTL(FDTWADDLE)
2544COMPATIBLE_IOCTL(FDFMTTRK)
2545COMPATIBLE_IOCTL(FDRAWCMD)
2546/* 0x12 */
2547#ifdef CONFIG_BLOCK
2548COMPATIBLE_IOCTL(BLKRASET)
2549COMPATIBLE_IOCTL(BLKROSET)
2550COMPATIBLE_IOCTL(BLKROGET)
2551COMPATIBLE_IOCTL(BLKRRPART)
2552COMPATIBLE_IOCTL(BLKFLSBUF)
2553COMPATIBLE_IOCTL(BLKSECTSET)
2554COMPATIBLE_IOCTL(BLKSSZGET)
2555COMPATIBLE_IOCTL(BLKTRACESTART)
2556COMPATIBLE_IOCTL(BLKTRACESTOP)
2557COMPATIBLE_IOCTL(BLKTRACESETUP)
2558COMPATIBLE_IOCTL(BLKTRACETEARDOWN)
2559ULONG_IOCTL(BLKRASET)
2560ULONG_IOCTL(BLKFRASET)
2561#endif
2562/* RAID */ 1967/* RAID */
2563COMPATIBLE_IOCTL(RAID_VERSION) 1968COMPATIBLE_IOCTL(RAID_VERSION)
2564COMPATIBLE_IOCTL(GET_ARRAY_INFO) 1969COMPATIBLE_IOCTL(GET_ARRAY_INFO)
@@ -2806,50 +2211,6 @@ COMPATIBLE_IOCTL(PPGETMODE)
2806COMPATIBLE_IOCTL(PPGETPHASE) 2211COMPATIBLE_IOCTL(PPGETPHASE)
2807COMPATIBLE_IOCTL(PPGETFLAGS) 2212COMPATIBLE_IOCTL(PPGETFLAGS)
2808COMPATIBLE_IOCTL(PPSETFLAGS) 2213COMPATIBLE_IOCTL(PPSETFLAGS)
2809/* CDROM stuff */
2810COMPATIBLE_IOCTL(CDROMPAUSE)
2811COMPATIBLE_IOCTL(CDROMRESUME)
2812COMPATIBLE_IOCTL(CDROMPLAYMSF)
2813COMPATIBLE_IOCTL(CDROMPLAYTRKIND)
2814COMPATIBLE_IOCTL(CDROMREADTOCHDR)
2815COMPATIBLE_IOCTL(CDROMREADTOCENTRY)
2816COMPATIBLE_IOCTL(CDROMSTOP)
2817COMPATIBLE_IOCTL(CDROMSTART)
2818COMPATIBLE_IOCTL(CDROMEJECT)
2819COMPATIBLE_IOCTL(CDROMVOLCTRL)
2820COMPATIBLE_IOCTL(CDROMSUBCHNL)
2821ULONG_IOCTL(CDROMEJECT_SW)
2822COMPATIBLE_IOCTL(CDROMMULTISESSION)
2823COMPATIBLE_IOCTL(CDROM_GET_MCN)
2824COMPATIBLE_IOCTL(CDROMRESET)
2825COMPATIBLE_IOCTL(CDROMVOLREAD)
2826COMPATIBLE_IOCTL(CDROMSEEK)
2827COMPATIBLE_IOCTL(CDROMPLAYBLK)
2828COMPATIBLE_IOCTL(CDROMCLOSETRAY)
2829ULONG_IOCTL(CDROM_SET_OPTIONS)
2830ULONG_IOCTL(CDROM_CLEAR_OPTIONS)
2831ULONG_IOCTL(CDROM_SELECT_SPEED)
2832ULONG_IOCTL(CDROM_SELECT_DISC)
2833ULONG_IOCTL(CDROM_MEDIA_CHANGED)
2834ULONG_IOCTL(CDROM_DRIVE_STATUS)
2835COMPATIBLE_IOCTL(CDROM_DISC_STATUS)
2836COMPATIBLE_IOCTL(CDROM_CHANGER_NSLOTS)
2837ULONG_IOCTL(CDROM_LOCKDOOR)
2838ULONG_IOCTL(CDROM_DEBUG)
2839COMPATIBLE_IOCTL(CDROM_GET_CAPABILITY)
2840/* Ignore cdrom.h about these next 5 ioctls, they absolutely do
2841 * not take a struct cdrom_read, instead they take a struct cdrom_msf
2842 * which is compatible.
2843 */
2844COMPATIBLE_IOCTL(CDROMREADMODE2)
2845COMPATIBLE_IOCTL(CDROMREADMODE1)
2846COMPATIBLE_IOCTL(CDROMREADRAW)
2847COMPATIBLE_IOCTL(CDROMREADCOOKED)
2848COMPATIBLE_IOCTL(CDROMREADALL)
2849/* DVD ioctls */
2850COMPATIBLE_IOCTL(DVD_READ_STRUCT)
2851COMPATIBLE_IOCTL(DVD_WRITE_STRUCT)
2852COMPATIBLE_IOCTL(DVD_AUTH)
2853/* pktcdvd */ 2214/* pktcdvd */
2854COMPATIBLE_IOCTL(PACKET_CTRL_CMD) 2215COMPATIBLE_IOCTL(PACKET_CTRL_CMD)
2855/* Big A */ 2216/* Big A */
@@ -3335,33 +2696,6 @@ HANDLE_IOCTL(SIOCGSTAMP, do_siocgstamp)
3335HANDLE_IOCTL(SIOCGSTAMPNS, do_siocgstampns) 2696HANDLE_IOCTL(SIOCGSTAMPNS, do_siocgstampns)
3336#endif 2697#endif
3337#ifdef CONFIG_BLOCK 2698#ifdef CONFIG_BLOCK
3338HANDLE_IOCTL(HDIO_GETGEO, hdio_getgeo)
3339HANDLE_IOCTL(BLKRAGET, w_long)
3340HANDLE_IOCTL(BLKGETSIZE, w_long)
3341HANDLE_IOCTL(0x1260, broken_blkgetsize)
3342HANDLE_IOCTL(BLKFRAGET, w_long)
3343HANDLE_IOCTL(BLKSECTGET, w_long)
3344HANDLE_IOCTL(BLKPG, blkpg_ioctl_trans)
3345HANDLE_IOCTL(HDIO_GET_UNMASKINTR, hdio_ioctl_trans)
3346HANDLE_IOCTL(HDIO_GET_MULTCOUNT, hdio_ioctl_trans)
3347HANDLE_IOCTL(HDIO_GET_KEEPSETTINGS, hdio_ioctl_trans)
3348HANDLE_IOCTL(HDIO_GET_32BIT, hdio_ioctl_trans)
3349HANDLE_IOCTL(HDIO_GET_NOWERR, hdio_ioctl_trans)
3350HANDLE_IOCTL(HDIO_GET_DMA, hdio_ioctl_trans)
3351HANDLE_IOCTL(HDIO_GET_NICE, hdio_ioctl_trans)
3352HANDLE_IOCTL(HDIO_GET_WCACHE, hdio_ioctl_trans)
3353HANDLE_IOCTL(HDIO_GET_ACOUSTIC, hdio_ioctl_trans)
3354HANDLE_IOCTL(HDIO_GET_ADDRESS, hdio_ioctl_trans)
3355HANDLE_IOCTL(HDIO_GET_BUSSTATE, hdio_ioctl_trans)
3356HANDLE_IOCTL(FDSETPRM32, fd_ioctl_trans)
3357HANDLE_IOCTL(FDDEFPRM32, fd_ioctl_trans)
3358HANDLE_IOCTL(FDGETPRM32, fd_ioctl_trans)
3359HANDLE_IOCTL(FDSETDRVPRM32, fd_ioctl_trans)
3360HANDLE_IOCTL(FDGETDRVPRM32, fd_ioctl_trans)
3361HANDLE_IOCTL(FDGETDRVSTAT32, fd_ioctl_trans)
3362HANDLE_IOCTL(FDPOLLDRVSTAT32, fd_ioctl_trans)
3363HANDLE_IOCTL(FDGETFDCSTAT32, fd_ioctl_trans)
3364HANDLE_IOCTL(FDWERRORGET32, fd_ioctl_trans)
3365HANDLE_IOCTL(SG_IO,sg_ioctl_trans) 2699HANDLE_IOCTL(SG_IO,sg_ioctl_trans)
3366HANDLE_IOCTL(SG_GET_REQUEST_TABLE, sg_grt_trans) 2700HANDLE_IOCTL(SG_GET_REQUEST_TABLE, sg_grt_trans)
3367#endif 2701#endif
@@ -3372,8 +2706,6 @@ HANDLE_IOCTL(PPPIOCSACTIVE32, ppp_sock_fprog_ioctl_trans)
3372#ifdef CONFIG_BLOCK 2706#ifdef CONFIG_BLOCK
3373HANDLE_IOCTL(MTIOCGET32, mt_ioctl_trans) 2707HANDLE_IOCTL(MTIOCGET32, mt_ioctl_trans)
3374HANDLE_IOCTL(MTIOCPOS32, mt_ioctl_trans) 2708HANDLE_IOCTL(MTIOCPOS32, mt_ioctl_trans)
3375HANDLE_IOCTL(CDROMREADAUDIO, cdrom_ioctl_trans)
3376HANDLE_IOCTL(CDROM_SEND_PACKET, cdrom_ioctl_trans)
3377#endif 2709#endif
3378#define AUTOFS_IOC_SETTIMEOUT32 _IOWR(0x93,0x64,unsigned int) 2710#define AUTOFS_IOC_SETTIMEOUT32 _IOWR(0x93,0x64,unsigned int)
3379HANDLE_IOCTL(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout) 2711HANDLE_IOCTL(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout)
@@ -3414,9 +2746,6 @@ HANDLE_IOCTL(SONET_GETFRAMING, do_atm_ioctl)
3414HANDLE_IOCTL(SONET_GETFRSENSE, do_atm_ioctl) 2746HANDLE_IOCTL(SONET_GETFRSENSE, do_atm_ioctl)
3415/* block stuff */ 2747/* block stuff */
3416#ifdef CONFIG_BLOCK 2748#ifdef CONFIG_BLOCK
3417HANDLE_IOCTL(BLKBSZGET_32, do_blkbszget)
3418HANDLE_IOCTL(BLKBSZSET_32, do_blkbszset)
3419HANDLE_IOCTL(BLKGETSIZE64_32, do_blkgetsize64)
3420/* Raw devices */ 2749/* Raw devices */
3421HANDLE_IOCTL(RAW_SETBIND, raw_ioctl) 2750HANDLE_IOCTL(RAW_SETBIND, raw_ioctl)
3422HANDLE_IOCTL(RAW_GETBIND, raw_ioctl) 2751HANDLE_IOCTL(RAW_GETBIND, raw_ioctl)
diff --git a/fs/direct-io.c b/fs/direct-io.c
index 901dc55e9f54..b5928a7b6a5a 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -264,15 +264,12 @@ static int dio_bio_complete(struct dio *dio, struct bio *bio);
264/* 264/*
265 * Asynchronous IO callback. 265 * Asynchronous IO callback.
266 */ 266 */
267static int dio_bio_end_aio(struct bio *bio, unsigned int bytes_done, int error) 267static void dio_bio_end_aio(struct bio *bio, int error)
268{ 268{
269 struct dio *dio = bio->bi_private; 269 struct dio *dio = bio->bi_private;
270 unsigned long remaining; 270 unsigned long remaining;
271 unsigned long flags; 271 unsigned long flags;
272 272
273 if (bio->bi_size)
274 return 1;
275
276 /* cleanup the bio */ 273 /* cleanup the bio */
277 dio_bio_complete(dio, bio); 274 dio_bio_complete(dio, bio);
278 275
@@ -287,8 +284,6 @@ static int dio_bio_end_aio(struct bio *bio, unsigned int bytes_done, int error)
287 aio_complete(dio->iocb, ret, 0); 284 aio_complete(dio->iocb, ret, 0);
288 kfree(dio); 285 kfree(dio);
289 } 286 }
290
291 return 0;
292} 287}
293 288
294/* 289/*
@@ -298,21 +293,17 @@ static int dio_bio_end_aio(struct bio *bio, unsigned int bytes_done, int error)
298 * During I/O bi_private points at the dio. After I/O, bi_private is used to 293 * During I/O bi_private points at the dio. After I/O, bi_private is used to
299 * implement a singly-linked list of completed BIOs, at dio->bio_list. 294 * implement a singly-linked list of completed BIOs, at dio->bio_list.
300 */ 295 */
301static int dio_bio_end_io(struct bio *bio, unsigned int bytes_done, int error) 296static void dio_bio_end_io(struct bio *bio, int error)
302{ 297{
303 struct dio *dio = bio->bi_private; 298 struct dio *dio = bio->bi_private;
304 unsigned long flags; 299 unsigned long flags;
305 300
306 if (bio->bi_size)
307 return 1;
308
309 spin_lock_irqsave(&dio->bio_lock, flags); 301 spin_lock_irqsave(&dio->bio_lock, flags);
310 bio->bi_private = dio->bio_list; 302 bio->bi_private = dio->bio_list;
311 dio->bio_list = bio; 303 dio->bio_list = bio;
312 if (--dio->refcount == 1 && dio->waiter) 304 if (--dio->refcount == 1 && dio->waiter)
313 wake_up_process(dio->waiter); 305 wake_up_process(dio->waiter);
314 spin_unlock_irqrestore(&dio->bio_lock, flags); 306 spin_unlock_irqrestore(&dio->bio_lock, flags);
315 return 0;
316} 307}
317 308
318static int 309static int
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c
index a4b142a6a2c7..8d23b0b38717 100644
--- a/fs/fs-writeback.c
+++ b/fs/fs-writeback.c
@@ -14,6 +14,7 @@
14 */ 14 */
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/module.h>
17#include <linux/spinlock.h> 18#include <linux/spinlock.h>
18#include <linux/sched.h> 19#include <linux/sched.h>
19#include <linux/fs.h> 20#include <linux/fs.h>
diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c
index f916b9740c75..2473e2a86d1b 100644
--- a/fs/gfs2/super.c
+++ b/fs/gfs2/super.c
@@ -160,11 +160,9 @@ int gfs2_check_sb(struct gfs2_sbd *sdp, struct gfs2_sb_host *sb, int silent)
160} 160}
161 161
162 162
163static int end_bio_io_page(struct bio *bio, unsigned int bytes_done, int error) 163static void end_bio_io_page(struct bio *bio, int error)
164{ 164{
165 struct page *page = bio->bi_private; 165 struct page *page = bio->bi_private;
166 if (bio->bi_size)
167 return 1;
168 166
169 if (!error) 167 if (!error)
170 SetPageUptodate(page); 168 SetPageUptodate(page);
diff --git a/fs/jfs/jfs_logmgr.c b/fs/jfs/jfs_logmgr.c
index de3e4a506dbc..57c3b8ac36bf 100644
--- a/fs/jfs/jfs_logmgr.c
+++ b/fs/jfs/jfs_logmgr.c
@@ -2200,16 +2200,13 @@ static int lbmIOWait(struct lbuf * bp, int flag)
2200 * 2200 *
2201 * executed at INTIODONE level 2201 * executed at INTIODONE level
2202 */ 2202 */
2203static int lbmIODone(struct bio *bio, unsigned int bytes_done, int error) 2203static void lbmIODone(struct bio *bio, int error)
2204{ 2204{
2205 struct lbuf *bp = bio->bi_private; 2205 struct lbuf *bp = bio->bi_private;
2206 struct lbuf *nextbp, *tail; 2206 struct lbuf *nextbp, *tail;
2207 struct jfs_log *log; 2207 struct jfs_log *log;
2208 unsigned long flags; 2208 unsigned long flags;
2209 2209
2210 if (bio->bi_size)
2211 return 1;
2212
2213 /* 2210 /*
2214 * get back jfs buffer bound to the i/o buffer 2211 * get back jfs buffer bound to the i/o buffer
2215 */ 2212 */
diff --git a/fs/jfs/jfs_metapage.c b/fs/jfs/jfs_metapage.c
index 62e96be02acf..1332adc0b9fa 100644
--- a/fs/jfs/jfs_metapage.c
+++ b/fs/jfs/jfs_metapage.c
@@ -280,14 +280,10 @@ static void last_read_complete(struct page *page)
280 unlock_page(page); 280 unlock_page(page);
281} 281}
282 282
283static int metapage_read_end_io(struct bio *bio, unsigned int bytes_done, 283static void metapage_read_end_io(struct bio *bio, int err)
284 int err)
285{ 284{
286 struct page *page = bio->bi_private; 285 struct page *page = bio->bi_private;
287 286
288 if (bio->bi_size)
289 return 1;
290
291 if (!test_bit(BIO_UPTODATE, &bio->bi_flags)) { 287 if (!test_bit(BIO_UPTODATE, &bio->bi_flags)) {
292 printk(KERN_ERR "metapage_read_end_io: I/O error\n"); 288 printk(KERN_ERR "metapage_read_end_io: I/O error\n");
293 SetPageError(page); 289 SetPageError(page);
@@ -341,16 +337,12 @@ static void last_write_complete(struct page *page)
341 end_page_writeback(page); 337 end_page_writeback(page);
342} 338}
343 339
344static int metapage_write_end_io(struct bio *bio, unsigned int bytes_done, 340static void metapage_write_end_io(struct bio *bio, int err)
345 int err)
346{ 341{
347 struct page *page = bio->bi_private; 342 struct page *page = bio->bi_private;
348 343
349 BUG_ON(!PagePrivate(page)); 344 BUG_ON(!PagePrivate(page));
350 345
351 if (bio->bi_size)
352 return 1;
353
354 if (! test_bit(BIO_UPTODATE, &bio->bi_flags)) { 346 if (! test_bit(BIO_UPTODATE, &bio->bi_flags)) {
355 printk(KERN_ERR "metapage_write_end_io: I/O error\n"); 347 printk(KERN_ERR "metapage_write_end_io: I/O error\n");
356 SetPageError(page); 348 SetPageError(page);
diff --git a/fs/mpage.c b/fs/mpage.c
index c1698f2291aa..b1c3e5890508 100644
--- a/fs/mpage.c
+++ b/fs/mpage.c
@@ -39,14 +39,11 @@
39 * status of that page is hard. See end_buffer_async_read() for the details. 39 * status of that page is hard. See end_buffer_async_read() for the details.
40 * There is no point in duplicating all that complexity. 40 * There is no point in duplicating all that complexity.
41 */ 41 */
42static int mpage_end_io_read(struct bio *bio, unsigned int bytes_done, int err) 42static void mpage_end_io_read(struct bio *bio, int err)
43{ 43{
44 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 44 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
45 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1; 45 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1;
46 46
47 if (bio->bi_size)
48 return 1;
49
50 do { 47 do {
51 struct page *page = bvec->bv_page; 48 struct page *page = bvec->bv_page;
52 49
@@ -62,17 +59,13 @@ static int mpage_end_io_read(struct bio *bio, unsigned int bytes_done, int err)
62 unlock_page(page); 59 unlock_page(page);
63 } while (bvec >= bio->bi_io_vec); 60 } while (bvec >= bio->bi_io_vec);
64 bio_put(bio); 61 bio_put(bio);
65 return 0;
66} 62}
67 63
68static int mpage_end_io_write(struct bio *bio, unsigned int bytes_done, int err) 64static void mpage_end_io_write(struct bio *bio, int err)
69{ 65{
70 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 66 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
71 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1; 67 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1;
72 68
73 if (bio->bi_size)
74 return 1;
75
76 do { 69 do {
77 struct page *page = bvec->bv_page; 70 struct page *page = bvec->bv_page;
78 71
@@ -87,7 +80,6 @@ static int mpage_end_io_write(struct bio *bio, unsigned int bytes_done, int err)
87 end_page_writeback(page); 80 end_page_writeback(page);
88 } while (bvec >= bio->bi_io_vec); 81 } while (bvec >= bio->bi_io_vec);
89 bio_put(bio); 82 bio_put(bio);
90 return 0;
91} 83}
92 84
93static struct bio *mpage_bio_submit(int rw, struct bio *bio) 85static struct bio *mpage_bio_submit(int rw, struct bio *bio)
diff --git a/fs/ocfs2/cluster/heartbeat.c b/fs/ocfs2/cluster/heartbeat.c
index 2bd7f788cf34..da2c2b442b49 100644
--- a/fs/ocfs2/cluster/heartbeat.c
+++ b/fs/ocfs2/cluster/heartbeat.c
@@ -217,7 +217,6 @@ static void o2hb_wait_on_io(struct o2hb_region *reg,
217} 217}
218 218
219static int o2hb_bio_end_io(struct bio *bio, 219static int o2hb_bio_end_io(struct bio *bio,
220 unsigned int bytes_done,
221 int error) 220 int error)
222{ 221{
223 struct o2hb_bio_wait_ctxt *wc = bio->bi_private; 222 struct o2hb_bio_wait_ctxt *wc = bio->bi_private;
@@ -227,9 +226,6 @@ static int o2hb_bio_end_io(struct bio *bio,
227 wc->wc_error = error; 226 wc->wc_error = error;
228 } 227 }
229 228
230 if (bio->bi_size)
231 return 1;
232
233 o2hb_bio_wait_dec(wc, 1); 229 o2hb_bio_wait_dec(wc, 1);
234 bio_put(bio); 230 bio_put(bio);
235 return 0; 231 return 0;
diff --git a/fs/xfs/linux-2.6/xfs_aops.c b/fs/xfs/linux-2.6/xfs_aops.c
index 5f152f60d74d..3f13519436af 100644
--- a/fs/xfs/linux-2.6/xfs_aops.c
+++ b/fs/xfs/linux-2.6/xfs_aops.c
@@ -326,14 +326,10 @@ xfs_iomap_valid(
326STATIC int 326STATIC int
327xfs_end_bio( 327xfs_end_bio(
328 struct bio *bio, 328 struct bio *bio,
329 unsigned int bytes_done,
330 int error) 329 int error)
331{ 330{
332 xfs_ioend_t *ioend = bio->bi_private; 331 xfs_ioend_t *ioend = bio->bi_private;
333 332
334 if (bio->bi_size)
335 return 1;
336
337 ASSERT(atomic_read(&bio->bi_cnt) >= 1); 333 ASSERT(atomic_read(&bio->bi_cnt) >= 1);
338 ioend->io_error = test_bit(BIO_UPTODATE, &bio->bi_flags) ? 0 : error; 334 ioend->io_error = test_bit(BIO_UPTODATE, &bio->bi_flags) ? 0 : error;
339 335
diff --git a/fs/xfs/linux-2.6/xfs_buf.c b/fs/xfs/linux-2.6/xfs_buf.c
index b0f0e58866de..6a75f4d984a1 100644
--- a/fs/xfs/linux-2.6/xfs_buf.c
+++ b/fs/xfs/linux-2.6/xfs_buf.c
@@ -1106,16 +1106,12 @@ _xfs_buf_ioend(
1106STATIC int 1106STATIC int
1107xfs_buf_bio_end_io( 1107xfs_buf_bio_end_io(
1108 struct bio *bio, 1108 struct bio *bio,
1109 unsigned int bytes_done,
1110 int error) 1109 int error)
1111{ 1110{
1112 xfs_buf_t *bp = (xfs_buf_t *)bio->bi_private; 1111 xfs_buf_t *bp = (xfs_buf_t *)bio->bi_private;
1113 unsigned int blocksize = bp->b_target->bt_bsize; 1112 unsigned int blocksize = bp->b_target->bt_bsize;
1114 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1; 1113 struct bio_vec *bvec = bio->bi_io_vec + bio->bi_vcnt - 1;
1115 1114
1116 if (bio->bi_size)
1117 return 1;
1118
1119 if (!test_bit(BIO_UPTODATE, &bio->bi_flags)) 1115 if (!test_bit(BIO_UPTODATE, &bio->bi_flags))
1120 bp->b_error = EIO; 1116 bp->b_error = EIO;
1121 1117
diff --git a/include/asm-arm/arch-imx/mmc.h b/include/asm-arm/arch-imx/mmc.h
index 84c726934ace..4712f354dcca 100644
--- a/include/asm-arm/arch-imx/mmc.h
+++ b/include/asm-arm/arch-imx/mmc.h
@@ -3,8 +3,11 @@
3 3
4#include <linux/mmc/host.h> 4#include <linux/mmc/host.h>
5 5
6struct device;
7
6struct imxmmc_platform_data { 8struct imxmmc_platform_data {
7 int (*card_present)(void); 9 int (*card_present)(struct device *);
10 int (*get_ro)(struct device *);
8}; 11};
9 12
10extern void imx_set_mmc_info(struct imxmmc_platform_data *info); 13extern void imx_set_mmc_info(struct imxmmc_platform_data *info);
diff --git a/include/asm-arm/arch-pxa/sharpsl.h b/include/asm-arm/arch-pxa/sharpsl.h
index 94cb4982af82..2b0fe773213a 100644
--- a/include/asm-arm/arch-pxa/sharpsl.h
+++ b/include/asm-arm/arch-pxa/sharpsl.h
@@ -25,12 +25,6 @@ struct corgits_machinfo {
25/* 25/*
26 * SharpSL Backlight 26 * SharpSL Backlight
27 */ 27 */
28struct corgibl_machinfo {
29 int max_intensity;
30 int default_intensity;
31 int limit_mask;
32 void (*set_bl_intensity)(int intensity);
33};
34extern void corgibl_limit_intensity(int limit); 28extern void corgibl_limit_intensity(int limit);
35 29
36 30
diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
index 0215965dc586..7dbd603c38cc 100644
--- a/include/asm-avr32/arch-at32ap/board.h
+++ b/include/asm-avr32/arch-at32ap/board.h
@@ -6,6 +6,8 @@
6 6
7#include <linux/types.h> 7#include <linux/types.h>
8 8
9#define GPIO_PIN_NONE (-1)
10
9/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ 11/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
10void at32_add_system_devices(void); 12void at32_add_system_devices(void);
11 13
@@ -36,6 +38,12 @@ struct platform_device *
36at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, 38at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
37 unsigned long fbmem_start, unsigned long fbmem_len); 39 unsigned long fbmem_start, unsigned long fbmem_len);
38 40
41struct usba_platform_data {
42 int vbus_pin;
43};
44struct platform_device *
45at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
46
39/* depending on what's hooked up, not all SSC pins will be used */ 47/* depending on what's hooked up, not all SSC pins will be used */
40#define ATMEL_SSC_TK 0x01 48#define ATMEL_SSC_TK 0x01
41#define ATMEL_SSC_TF 0x02 49#define ATMEL_SSC_TF 0x02
diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
index 9930871decde..b1abe6b4e4ef 100644
--- a/include/asm-avr32/arch-at32ap/portmux.h
+++ b/include/asm-avr32/arch-at32ap/portmux.h
@@ -19,6 +19,7 @@
19#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ 19#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
20#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ 20#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */
21#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ 21#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */
22#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */
22 23
23void at32_select_periph(unsigned int pin, unsigned int periph, 24void at32_select_periph(unsigned int pin, unsigned int periph,
24 unsigned long flags); 25 unsigned long flags);
diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
index 07152b7fd9c9..c98eea44a70a 100644
--- a/include/asm-avr32/arch-at32ap/smc.h
+++ b/include/asm-avr32/arch-at32ap/smc.h
@@ -15,22 +15,50 @@
15/* 15/*
16 * All timing parameters are in nanoseconds. 16 * All timing parameters are in nanoseconds.
17 */ 17 */
18struct smc_timing {
19 /* Delay from address valid to assertion of given strobe */
20 int ncs_read_setup;
21 int nrd_setup;
22 int ncs_write_setup;
23 int nwe_setup;
24
25 /* Pulse length of given strobe */
26 int ncs_read_pulse;
27 int nrd_pulse;
28 int ncs_write_pulse;
29 int nwe_pulse;
30
31 /* Total cycle length of given operation */
32 int read_cycle;
33 int write_cycle;
34
35 /* Minimal recovery times, will extend cycle if needed */
36 int ncs_read_recover;
37 int nrd_recover;
38 int ncs_write_recover;
39 int nwe_recover;
40};
41
42/*
43 * All timing parameters are in clock cycles.
44 */
18struct smc_config { 45struct smc_config {
46
19 /* Delay from address valid to assertion of given strobe */ 47 /* Delay from address valid to assertion of given strobe */
20 u16 ncs_read_setup; 48 u8 ncs_read_setup;
21 u16 nrd_setup; 49 u8 nrd_setup;
22 u16 ncs_write_setup; 50 u8 ncs_write_setup;
23 u16 nwe_setup; 51 u8 nwe_setup;
24 52
25 /* Pulse length of given strobe */ 53 /* Pulse length of given strobe */
26 u16 ncs_read_pulse; 54 u8 ncs_read_pulse;
27 u16 nrd_pulse; 55 u8 nrd_pulse;
28 u16 ncs_write_pulse; 56 u8 ncs_write_pulse;
29 u16 nwe_pulse; 57 u8 nwe_pulse;
30 58
31 /* Total cycle length of given operation */ 59 /* Total cycle length of given operation */
32 u16 read_cycle; 60 u8 read_cycle;
33 u16 write_cycle; 61 u8 write_cycle;
34 62
35 /* Bus width in bytes */ 63 /* Bus width in bytes */
36 u8 bus_width; 64 u8 bus_width;
@@ -76,6 +104,9 @@ struct smc_config {
76 unsigned int tdf_mode:1; 104 unsigned int tdf_mode:1;
77}; 105};
78 106
107extern void smc_set_timing(struct smc_config *config,
108 const struct smc_timing *timing);
109
79extern int smc_set_configuration(int cs, const struct smc_config *config); 110extern int smc_set_configuration(int cs, const struct smc_config *config);
80extern struct smc_config *smc_get_configuration(int cs); 111extern struct smc_config *smc_get_configuration(int cs);
81 112
diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
index 21bb60bbb9a1..81e342636ac4 100644
--- a/include/asm-avr32/dma-mapping.h
+++ b/include/asm-avr32/dma-mapping.h
@@ -264,7 +264,11 @@ static inline void
264dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, 264dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
265 size_t size, enum dma_data_direction direction) 265 size_t size, enum dma_data_direction direction)
266{ 266{
267 dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); 267 /*
268 * No need to do anything since the CPU isn't supposed to
269 * touch this memory after we flushed it at mapping- or
270 * sync-for-device time.
271 */
268} 272}
269 273
270static inline void 274static inline void
@@ -309,12 +313,11 @@ static inline void
309dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 313dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
310 int nents, enum dma_data_direction direction) 314 int nents, enum dma_data_direction direction)
311{ 315{
312 int i; 316 /*
313 317 * No need to do anything since the CPU isn't supposed to
314 for (i = 0; i < nents; i++) { 318 * touch this memory after we flushed it at mapping- or
315 dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, 319 * sync-for-device time.
316 sg[i].length, direction); 320 */
317 }
318} 321}
319 322
320static inline void 323static inline void
diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
index a8236bacc878..dc2d527cef41 100644
--- a/include/asm-avr32/system.h
+++ b/include/asm-avr32/system.h
@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
73 73
74extern void __xchg_called_with_bad_pointer(void); 74extern void __xchg_called_with_bad_pointer(void);
75 75
76#ifdef __CHECKER__ 76static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
77extern unsigned long __builtin_xchg(void *ptr, unsigned long x); 77{
78#endif 78 u32 ret;
79 79
80#define xchg_u32(val, m) __builtin_xchg((void *)m, val) 80 asm volatile("xchg %[ret], %[m], %[val]"
81 : [ret] "=&r"(ret), "=m"(*m)
82 : "m"(*m), [m] "r"(m), [val] "r"(val)
83 : "memory");
84 return ret;
85}
81 86
82static inline unsigned long __xchg(unsigned long x, 87static inline unsigned long __xchg(unsigned long x,
83 volatile void *ptr, 88 volatile void *ptr,
diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
index 3b4e35b55c82..de09009593f8 100644
--- a/include/asm-avr32/unistd.h
+++ b/include/asm-avr32/unistd.h
@@ -303,6 +303,19 @@
303#ifdef __KERNEL__ 303#ifdef __KERNEL__
304#define NR_syscalls 282 304#define NR_syscalls 282
305 305
306/* Old stuff */
307#define __IGNORE_uselib
308#define __IGNORE_mmap
309
310/* NUMA stuff */
311#define __IGNORE_mbind
312#define __IGNORE_get_mempolicy
313#define __IGNORE_set_mempolicy
314#define __IGNORE_migrate_pages
315#define __IGNORE_move_pages
316
317/* SMP stuff */
318#define __IGNORE_getcpu
306 319
307#define __ARCH_WANT_IPC_PARSE_VERSION 320#define __ARCH_WANT_IPC_PARSE_VERSION
308#define __ARCH_WANT_STAT64 321#define __ARCH_WANT_STAT64
diff --git a/include/asm-blackfin/bfin5xx_spi.h b/include/asm-blackfin/bfin5xx_spi.h
index 95c1c952e7c1..f617d8765451 100644
--- a/include/asm-blackfin/bfin5xx_spi.h
+++ b/include/asm-blackfin/bfin5xx_spi.h
@@ -21,8 +21,6 @@
21#ifndef _SPI_CHANNEL_H_ 21#ifndef _SPI_CHANNEL_H_
22#define _SPI_CHANNEL_H_ 22#define _SPI_CHANNEL_H_
23 23
24#define SPI0_REGBASE 0xffc00500
25
26#define SPI_READ 0 24#define SPI_READ 0
27#define SPI_WRITE 1 25#define SPI_WRITE 1
28 26
diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h
index 25b934b7f829..984b74f0a2ec 100644
--- a/include/asm-blackfin/blackfin.h
+++ b/include/asm-blackfin/blackfin.h
@@ -11,78 +11,57 @@
11#define HI(con32) (((con32) >> 16) & 0xFFFF) 11#define HI(con32) (((con32) >> 16) & 0xFFFF)
12#define hi(con32) (((con32) >> 16) & 0xFFFF) 12#define hi(con32) (((con32) >> 16) & 0xFFFF)
13 13
14#include <asm/mach/blackfin.h> 14#include <asm/mach/anomaly.h>
15#include <asm/bfin-global.h>
16 15
17#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
18 17
19/* SSYNC implementation for C file */ 18/* SSYNC implementation for C file */
20#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244) 19static inline void SSYNC(void)
21static inline void SSYNC (void)
22{
23 int _tmp;
24 __asm__ __volatile__ ("cli %0;\n\t"
25 "nop;nop;\n\t"
26 "ssync;\n\t"
27 "sti %0;\n\t"
28 :"=d"(_tmp):);
29}
30#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
31static inline void SSYNC (void)
32{ 20{
33 int _tmp; 21 int _tmp;
34 __asm__ __volatile__ ("cli %0;\n\t" 22 if (ANOMALY_05000312)
35 "ssync;\n\t" 23 __asm__ __volatile__(
36 "sti %0;\n\t" 24 "cli %0;"
37 :"=d"(_tmp):); 25 "nop;"
26 "nop;"
27 "ssync;"
28 "sti %0;"
29 : "=d" (_tmp)
30 );
31 else if (ANOMALY_05000244)
32 __asm__ __volatile__(
33 "nop;"
34 "nop;"
35 "nop;"
36 "ssync;"
37 );
38 else
39 __asm__ __volatile__("ssync;");
38} 40}
39#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
40static inline void SSYNC (void)
41{
42 __asm__ __volatile__ ("nop; nop; nop;\n\t"
43 "ssync;\n\t"
44 ::);
45}
46#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
47static inline void SSYNC (void)
48{
49 __asm__ __volatile__ ("ssync;\n\t");
50}
51#endif
52 41
53/* CSYNC implementation for C file */ 42/* CSYNC implementation for C file */
54#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244) 43static inline void CSYNC(void)
55static inline void CSYNC (void)
56{
57 int _tmp;
58 __asm__ __volatile__ ("cli %0;\n\t"
59 "nop;nop;\n\t"
60 "csync;\n\t"
61 "sti %0;\n\t"
62 :"=d"(_tmp):);
63}
64#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
65static inline void CSYNC (void)
66{ 44{
67 int _tmp; 45 int _tmp;
68 __asm__ __volatile__ ("cli %0;\n\t" 46 if (ANOMALY_05000312)
69 "csync;\n\t" 47 __asm__ __volatile__(
70 "sti %0;\n\t" 48 "cli %0;"
71 :"=d"(_tmp):); 49 "nop;"
72} 50 "nop;"
73#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244) 51 "csync;"
74static inline void CSYNC (void) 52 "sti %0;"
75{ 53 : "=d" (_tmp)
76 __asm__ __volatile__ ("nop; nop; nop;\n\t" 54 );
77 "ssync;\n\t" 55 else if (ANOMALY_05000244)
78 ::); 56 __asm__ __volatile__(
57 "nop;"
58 "nop;"
59 "nop;"
60 "csync;"
61 );
62 else
63 __asm__ __volatile__("csync;");
79} 64}
80#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
81static inline void CSYNC (void)
82{
83 __asm__ __volatile__ ("csync;\n\t");
84}
85#endif
86 65
87#else /* __ASSEMBLY__ */ 66#else /* __ASSEMBLY__ */
88 67
@@ -91,19 +70,15 @@ static inline void CSYNC (void)
91#define ssync(x) SSYNC(x) 70#define ssync(x) SSYNC(x)
92#define csync(x) CSYNC(x) 71#define csync(x) CSYNC(x)
93 72
94#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244) 73#if ANOMALY_05000312
95#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch; 74#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
96#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch; 75#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
97 76
98#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244) 77#elif ANOMALY_05000244
99#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
100#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
101
102#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
103#define SSYNC(scratch) nop; nop; nop; SSYNC; 78#define SSYNC(scratch) nop; nop; nop; SSYNC;
104#define CSYNC(scratch) nop; nop; nop; CSYNC; 79#define CSYNC(scratch) nop; nop; nop; CSYNC;
105 80
106#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244) 81#else
107#define SSYNC(scratch) SSYNC; 82#define SSYNC(scratch) SSYNC;
108#define CSYNC(scratch) CSYNC; 83#define CSYNC(scratch) CSYNC;
109 84
@@ -111,4 +86,7 @@ static inline void CSYNC (void)
111 86
112#endif /* __ASSEMBLY__ */ 87#endif /* __ASSEMBLY__ */
113 88
89#include <asm/mach/blackfin.h>
90#include <asm/bfin-global.h>
91
114#endif /* _BLACKFIN_H_ */ 92#endif /* _BLACKFIN_H_ */
diff --git a/include/asm-blackfin/cacheflush.h b/include/asm-blackfin/cacheflush.h
index e5e000de3c36..d81a77545a04 100644
--- a/include/asm-blackfin/cacheflush.h
+++ b/include/asm-blackfin/cacheflush.h
@@ -48,9 +48,9 @@ extern void blackfin_dflush_page(void *);
48 48
49static inline void flush_icache_range(unsigned start, unsigned end) 49static inline void flush_icache_range(unsigned start, unsigned end)
50{ 50{
51#if defined(CONFIG_BLKFIN_DCACHE) && defined(CONFIG_BLKFIN_CACHE) 51#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE)
52 52
53# if defined(CONFIG_BLKFIN_WT) 53# if defined(CONFIG_BFIN_WT)
54 blackfin_icache_flush_range((start), (end)); 54 blackfin_icache_flush_range((start), (end));
55# else 55# else
56 blackfin_icache_dcache_flush_range((start), (end)); 56 blackfin_icache_dcache_flush_range((start), (end));
@@ -58,10 +58,10 @@ static inline void flush_icache_range(unsigned start, unsigned end)
58 58
59#else 59#else
60 60
61# if defined(CONFIG_BLKFIN_CACHE) 61# if defined(CONFIG_BFIN_ICACHE)
62 blackfin_icache_flush_range((start), (end)); 62 blackfin_icache_flush_range((start), (end));
63# endif 63# endif
64# if defined(CONFIG_BLKFIN_DCACHE) 64# if defined(CONFIG_BFIN_DCACHE)
65 blackfin_dcache_flush_range((start), (end)); 65 blackfin_dcache_flush_range((start), (end));
66# endif 66# endif
67 67
@@ -74,12 +74,12 @@ do { memcpy(dst, src, len); \
74} while (0) 74} while (0)
75#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len) 75#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
76 76
77#if defined(CONFIG_BLKFIN_DCACHE) 77#if defined(CONFIG_BFIN_DCACHE)
78# define invalidate_dcache_range(start,end) blackfin_dcache_invalidate_range((start), (end)) 78# define invalidate_dcache_range(start,end) blackfin_dcache_invalidate_range((start), (end))
79#else 79#else
80# define invalidate_dcache_range(start,end) do { } while (0) 80# define invalidate_dcache_range(start,end) do { } while (0)
81#endif 81#endif
82#if defined(CONFIG_BLKFIN_DCACHE) && defined(CONFIG_BLKFIN_WB) 82#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_WB)
83# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end)) 83# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
84# define flush_dcache_page(page) blackfin_dflush_page(page_address(page)) 84# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
85#else 85#else
@@ -87,4 +87,4 @@ do { memcpy(dst, src, len); \
87# define flush_dcache_page(page) do { } while (0) 87# define flush_dcache_page(page) do { } while (0)
88#endif 88#endif
89 89
90#endif /* _BLACKFIN_CACHEFLUSH_H */ 90#endif /* _BLACKFIN_ICACHEFLUSH_H */
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h
index e0dd56bfa4c7..06828d77a58f 100644
--- a/include/asm-blackfin/cplb.h
+++ b/include/asm-blackfin/cplb.h
@@ -1,17 +1,100 @@
1/************************************************************************ 1/*
2 * File: include/asm-blackfin/cplb.h
3 * Based on: include/asm-blackfin/mach-bf537/bf537.h
4 * Author: Robin Getz <rgetz@blackfin.uclinux.org>
2 * 5 *
3 * cplb.h 6 * Created: 2000
7 * Description: Common CPLB definitions for CPLB init
4 * 8 *
5 * (c) Copyright 2002-2003 Analog Devices, Inc. All rights reserved. 9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
6 * 11 *
7 ************************************************************************/ 12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
8 13 *
9/* Defines necessary for cplb initialisation routines. */ 14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
10 29
11#ifndef _CPLB_H 30#ifndef _CPLB_H
12#define _CPLB_H 31#define _CPLB_H
13 32
14# include <asm/blackfin.h> 33#include <asm/blackfin.h>
34#include <asm/mach/anomaly.h>
35
36#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
37#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
38#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
39#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
40
41/*Use the menuconfig cache policy here - CONFIG_BFIN_WT/CONFIG_BFIN_WB*/
42
43#if ANOMALY_05000158
44#define ANOMALY_05000158_WORKAROUND 0x200
45#else
46#define ANOMALY_05000158_WORKAROUND 0x0
47#endif
48
49#define CPLB_COMMON (CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
50
51#ifdef CONFIG_BFIN_WB /*Write Back Policy */
52#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_COMMON)
53#else /*Write Through */
54#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
55#endif
56
57#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
58#define L2_MEMORY (CPLB_COMMON)
59#define SDRAM_DNON_CHBL (CPLB_COMMON)
60#define SDRAM_EBIU (CPLB_COMMON)
61#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
62
63#define SIZE_1K 0x00000400 /* 1K */
64#define SIZE_4K 0x00001000 /* 4K */
65#define SIZE_1M 0x00100000 /* 1M */
66#define SIZE_4M 0x00400000 /* 4M */
67
68#define MAX_CPLBS (16 * 2)
69
70#define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
71 ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M)
72
73/*
74* Number of required data CPLB switchtable entries
75* MEMSIZE / 4 (we mostly install 4M page size CPLBs
76* approx 16 for smaller 1MB page size CPLBs for allignment purposes
77* 1 for L1 Data Memory
78* possibly 1 for L2 Data Memory
79* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
80* 1 for ASYNC Memory
81*/
82
83
84#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \
85 + ASYNC_MEMORY_CPLB_COVERAGE) * 2)
86
87/*
88* Number of required instruction CPLB switchtable entries
89* MEMSIZE / 4 (we mostly install 4M page size CPLBs
90* approx 12 for smaller 1MB page size CPLBs for allignment purposes
91* 1 for L1 Instruction Memory
92* possibly 1 for L2 Instruction Memory
93* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
94*/
95
96#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2)
97
15 98
16#define CPLB_ENABLE_ICACHE_P 0 99#define CPLB_ENABLE_ICACHE_P 0
17#define CPLB_ENABLE_DCACHE_P 1 100#define CPLB_ENABLE_DCACHE_P 1
@@ -39,8 +122,6 @@
39#define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT 122#define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT
40#define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY 123#define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY
41 124
42#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
43
44#define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID 125#define CPLB_I_PAGE_MGMT CPLB_LOCK | CPLB_VALID
45#define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID 126#define CPLB_D_PAGE_MGMT CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
46#define CPLB_DNOCACHE CPLB_ALL_ACCESS | CPLB_VALID 127#define CPLB_DNOCACHE CPLB_ALL_ACCESS | CPLB_VALID
diff --git a/include/asm-blackfin/dma.h b/include/asm-blackfin/dma.h
index be0d913e5516..b42a531e7a1b 100644
--- a/include/asm-blackfin/dma.h
+++ b/include/asm-blackfin/dma.h
@@ -152,6 +152,7 @@ struct dma_channel {
152/* functions to set register mode */ 152/* functions to set register mode */
153void set_dma_start_addr(unsigned int channel, unsigned long addr); 153void set_dma_start_addr(unsigned int channel, unsigned long addr);
154void set_dma_next_desc_addr(unsigned int channel, unsigned long addr); 154void set_dma_next_desc_addr(unsigned int channel, unsigned long addr);
155void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr);
155void set_dma_x_count(unsigned int channel, unsigned short x_count); 156void set_dma_x_count(unsigned int channel, unsigned short x_count);
156void set_dma_x_modify(unsigned int channel, short x_modify); 157void set_dma_x_modify(unsigned int channel, short x_modify);
157void set_dma_y_count(unsigned int channel, unsigned short y_count); 158void set_dma_y_count(unsigned int channel, unsigned short y_count);
@@ -159,6 +160,7 @@ void set_dma_y_modify(unsigned int channel, short y_modify);
159void set_dma_config(unsigned int channel, unsigned short config); 160void set_dma_config(unsigned int channel, unsigned short config);
160unsigned short set_bfin_dma_config(char direction, char flow_mode, 161unsigned short set_bfin_dma_config(char direction, char flow_mode,
161 char intr_mode, char dma_mode, char width); 162 char intr_mode, char dma_mode, char width);
163void set_dma_curr_addr(unsigned int channel, unsigned long addr);
162 164
163/* get curr status for polling */ 165/* get curr status for polling */
164unsigned short get_dma_curr_irqstat(unsigned int channel); 166unsigned short get_dma_curr_irqstat(unsigned int channel);
diff --git a/include/asm-blackfin/early_printk.h b/include/asm-blackfin/early_printk.h
new file mode 100644
index 000000000000..110f1c1f845c
--- /dev/null
+++ b/include/asm-blackfin/early_printk.h
@@ -0,0 +1,28 @@
1/*
2 * File: include/asm-blackfin/early_printk.h
3 * Author: Robin Getz <rgetz@blackfin.uclinux.org
4 *
5 * Created: 14Aug2007
6 * Description: function prototpyes for early printk
7 *
8 * Modified:
9 * Copyright 2004-2007 Analog Devices Inc.
10 *
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#ifdef CONFIG_EARLY_PRINTK
25extern int setup_early_printk(char *);
26#else
27#define setup_early_printk(fmt) do { } while (0)
28#endif /* CONFIG_EARLY_PRINTK */
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index 7480cfa7e2d6..dd203cd93796 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -144,6 +144,24 @@
144 144
145#ifdef BF533_FAMILY 145#ifdef BF533_FAMILY
146#define MAX_BLACKFIN_GPIOS 16 146#define MAX_BLACKFIN_GPIOS 16
147
148#define GPIO_PF0 0
149#define GPIO_PF1 1
150#define GPIO_PF2 2
151#define GPIO_PF3 3
152#define GPIO_PF4 4
153#define GPIO_PF5 5
154#define GPIO_PF6 6
155#define GPIO_PF7 7
156#define GPIO_PF8 8
157#define GPIO_PF9 9
158#define GPIO_PF10 10
159#define GPIO_PF11 11
160#define GPIO_PF12 12
161#define GPIO_PF13 13
162#define GPIO_PF14 14
163#define GPIO_PF15 15
164
147#endif 165#endif
148 166
149#ifdef BF537_FAMILY 167#ifdef BF537_FAMILY
@@ -421,6 +439,19 @@ unsigned short gpio_get_value(unsigned short gpio);
421void gpio_direction_input(unsigned short gpio); 439void gpio_direction_input(unsigned short gpio);
422void gpio_direction_output(unsigned short gpio); 440void gpio_direction_output(unsigned short gpio);
423 441
442#include <asm-generic/gpio.h> /* cansleep wrappers */
443#include <asm/irq.h>
444
445static inline int gpio_to_irq(unsigned gpio)
446{
447 return (gpio + GPIO_IRQ_BASE);
448}
449
450static inline int irq_to_gpio(unsigned irq)
451{
452 return (irq - GPIO_IRQ_BASE);
453}
454
424#endif /* __ASSEMBLY__ */ 455#endif /* __ASSEMBLY__ */
425 456
426#endif /* __ARCH_BLACKFIN_GPIO_H__ */ 457#endif /* __ARCH_BLACKFIN_GPIO_H__ */
diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
index 142cb333db29..525179bf43d7 100644
--- a/include/asm-blackfin/io.h
+++ b/include/asm-blackfin/io.h
@@ -115,21 +115,21 @@ static inline unsigned int readl(const volatile void __iomem *addr)
115 115
116#ifndef __ASSEMBLY__ 116#ifndef __ASSEMBLY__
117 117
118extern void outsb(void __iomem *port, const void *addr, unsigned short count); 118extern void outsb(unsigned long port, const void *addr, unsigned long count);
119extern void outsw(void __iomem *port, const void *addr, unsigned short count); 119extern void outsw(unsigned long port, const void *addr, unsigned long count);
120extern void outsl(void __iomem *port, const void *addr, unsigned short count); 120extern void outsl(unsigned long port, const void *addr, unsigned long count);
121 121
122extern void insb(const void __iomem *port, void *addr, unsigned short count); 122extern void insb(unsigned long port, void *addr, unsigned long count);
123extern void insw(const void __iomem *port, void *addr, unsigned short count); 123extern void insw(unsigned long port, void *addr, unsigned long count);
124extern void insl(const void __iomem *port, void *addr, unsigned short count); 124extern void insl(unsigned long port, void *addr, unsigned long count);
125 125
126extern void dma_outsb(void __iomem *port, const void *addr, unsigned short count); 126extern void dma_outsb(unsigned long port, const void *addr, unsigned short count);
127extern void dma_outsw(void __iomem *port, const void *addr, unsigned short count); 127extern void dma_outsw(unsigned long port, const void *addr, unsigned short count);
128extern void dma_outsl(void __iomem *port, const void *addr, unsigned short count); 128extern void dma_outsl(unsigned long port, const void *addr, unsigned short count);
129 129
130extern void dma_insb(const void __iomem *port, void *addr, unsigned short count); 130extern void dma_insb(unsigned long port, void *addr, unsigned short count);
131extern void dma_insw(const void __iomem *port, void *addr, unsigned short count); 131extern void dma_insw(unsigned long port, void *addr, unsigned short count);
132extern void dma_insl(const void __iomem *port, void *addr, unsigned short count); 132extern void dma_insl(unsigned long port, void *addr, unsigned short count);
133 133
134/* 134/*
135 * Map some physical address range into the kernel address space. 135 * Map some physical address range into the kernel address space.
diff --git a/include/asm-blackfin/ioctls.h b/include/asm-blackfin/ioctls.h
index 8356204151db..895e3173165d 100644
--- a/include/asm-blackfin/ioctls.h
+++ b/include/asm-blackfin/ioctls.h
@@ -47,8 +47,13 @@
47#define TIOCSBRK 0x5427 /* BSD compatibility */ 47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */ 48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */ 49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54/* Get Pty Number (of pty-mux device) */
55#define TIOCGPTN _IOR('T', 0x30, unsigned int)
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
52 57
53#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ 58#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
54#define FIOCLEX 0x5451 59#define FIOCLEX 0x5451
diff --git a/include/asm-blackfin/irq_handler.h b/include/asm-blackfin/irq_handler.h
index d830f0a49a1c..139b5208f9d8 100644
--- a/include/asm-blackfin/irq_handler.h
+++ b/include/asm-blackfin/irq_handler.h
@@ -1,13 +1,15 @@
1#ifndef _IRQ_HANDLER_H 1#ifndef _IRQ_HANDLER_H
2#define _IRQ_HANDLER_H 2#define _IRQ_HANDLER_H
3 3
4#include <linux/types.h>
5#include <linux/linkage.h>
6
4/* BASE LEVEL interrupt handler routines */ 7/* BASE LEVEL interrupt handler routines */
5asmlinkage void evt_emulation(void);
6asmlinkage void evt_exception(void); 8asmlinkage void evt_exception(void);
7asmlinkage void trap(void); 9asmlinkage void trap(void);
8asmlinkage void evt_ivhw(void); 10asmlinkage void evt_ivhw(void);
9asmlinkage void evt_timer(void); 11asmlinkage void evt_timer(void);
10asmlinkage void evt_evt2(void); 12asmlinkage void evt_nmi(void);
11asmlinkage void evt_evt7(void); 13asmlinkage void evt_evt7(void);
12asmlinkage void evt_evt8(void); 14asmlinkage void evt_evt8(void);
13asmlinkage void evt_evt9(void); 15asmlinkage void evt_evt9(void);
@@ -18,5 +20,14 @@ asmlinkage void evt_evt13(void);
18asmlinkage void evt_soft_int1(void); 20asmlinkage void evt_soft_int1(void);
19asmlinkage void evt_system_call(void); 21asmlinkage void evt_system_call(void);
20asmlinkage void init_exception_buff(void); 22asmlinkage void init_exception_buff(void);
23asmlinkage void trap_c(struct pt_regs *fp);
24asmlinkage void ex_replaceable(void);
25asmlinkage void early_trap(void);
26
27extern void *ex_table[];
28extern void return_from_exception(void);
29
30extern int bfin_request_exception(unsigned int exception, void (*handler)(void));
31extern int bfin_free_exception(unsigned int exception, void (*handler)(void));
21 32
22#endif 33#endif
diff --git a/include/asm-blackfin/kgdb.h b/include/asm-blackfin/kgdb.h
index 532bd9052004..0f73847fd6bc 100644
--- a/include/asm-blackfin/kgdb.h
+++ b/include/asm-blackfin/kgdb.h
@@ -179,5 +179,6 @@ enum regnames {
179#define STATDA1 0x80 179#define STATDA1 0x80
180 180
181extern void kgdb_print(const char *fmt, ...); 181extern void kgdb_print(const char *fmt, ...);
182extern void init_kgdb_uart(void);
182 183
183#endif 184#endif
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
new file mode 100644
index 000000000000..991db986cd4b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -0,0 +1,41 @@
1/*
2 * File: include/asm-blackfin/mach-bf527/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
7 */
8
9/* This file shoule be up to date with:
10 * - Revision A, May 30, 2007; ADSP-BF527 Blackfin Processor Anomaly List
11 */
12
13#ifndef _MACH_ANOMALY_H_
14#define _MACH_ANOMALY_H_
15
16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
17#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
19#define ANOMALY_05000119 (1)
20/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
21#define ANOMALY_05000122 (1)
22/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
23#define ANOMALY_05000245 (1)
24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
25#define ANOMALY_05000265 (1)
26/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
27#define ANOMALY_05000301 (1)
28/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
29#define ANOMALY_05000312 (1)
30/* Incorrect Access of OTP_STATUS During otp_write() Function */
31#define ANOMALY_05000328 (1)
32/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
33#define ANOMALY_05000337 (1)
34/* TWI Does Not Operate Correctly Under Certain Signal Termination Conditions */
35#define ANOMALY_05000342 (1)
36/* Boot ROM Kernel Incorrectly Alters Reset Value of USB Register */
37#define ANOMALY_05000347 (1)
38
39/* Anomalies that don't exist on this proc */
40#define ANOMALY_05000323 (0)
41#endif
diff --git a/include/asm-blackfin/mach-bf527/defBF52x_base.h b/include/asm-blackfin/mach-bf527/defBF52x_base.h
index 0b2fb5036ed0..b1ff67db01f8 100644
--- a/include/asm-blackfin/mach-bf527/defBF52x_base.h
+++ b/include/asm-blackfin/mach-bf527/defBF52x_base.h
@@ -102,6 +102,7 @@
102 102
103 103
104/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 104/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
105#define SPI0_REGBASE 0xFFC00500
105#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 106#define SPI_CTL 0xFFC00500 /* SPI Control Register */
106#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 107#define SPI_FLG 0xFFC00504 /* SPI Flag register */
107#define SPI_STAT 0xFFC00508 /* SPI Status register */ 108#define SPI_STAT 0xFFC00508 /* SPI Status register */
@@ -480,6 +481,7 @@
480 481
481 482
482/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ 483/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
484#define TWI0_REGBASE 0xFFC01400
483#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ 485#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */
484#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */ 486#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */
485#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */ 487#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index 7302f290b93d..f36ff5af1b91 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -1,247 +1,259 @@
1/* 1/*
2 * File: include/asm-blackfin/mach-bf533/anomaly.h 2 * File: include/asm-blackfin/mach-bf533/anomaly.h
3 * Based on: 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * Author:
5 * 4 *
6 * Created: 5 * Copyright (C) 2004-2007 Analog Devices Inc.
7 * Description: 6 * Licensed under the GPL-2 or later.
8 *
9 * Rev:
10 *
11 * Modified:
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
18 * any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING.
27 * If not, write to the Free Software Foundation,
28 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */ 7 */
30 8
31/* This file shoule be up to date with: 9/* This file shoule be up to date with:
32 * - Revision U, May 17, 2006; ADSP-BF533 Blackfin Processor Anomaly List 10 * - Revision X, March 23, 2007; ADSP-BF533 Blackfin Processor Anomaly List
33 * - Revision Y, May 17, 2006; ADSP-BF532 Blackfin Processor Anomaly List 11 * - Revision AB, March 23, 2007; ADSP-BF532 Blackfin Processor Anomaly List
34 * - Revision T, May 17, 2006; ADSP-BF531 Blackfin Processor Anomaly List 12 * - Revision W, March 23, 2007; ADSP-BF531 Blackfin Processor Anomaly List
35 */ 13 */
36 14
37#ifndef _MACH_ANOMALY_H_ 15#ifndef _MACH_ANOMALY_H_
38#define _MACH_ANOMALY_H_ 16#define _MACH_ANOMALY_H_
39 17
40/* We do not support 0.1 or 0.2 silicon - sorry */ 18/* We do not support 0.1 or 0.2 silicon - sorry */
41#if (defined(CONFIG_BF_REV_0_1) || defined(CONFIG_BF_REV_0_2)) 19#if __SILICON_REVISION__ < 3
42#error Kernel will not work on BF533 Version 0.1 or 0.2 20# error Kernel will not work on BF533 silicon version 0.0, 0.1, or 0.2
43#endif 21#endif
44 22
45/* Issues that are common to 0.5, 0.4, and 0.3 silicon */ 23#if defined(__ADSPBF531__)
46#if (defined(CONFIG_BF_REV_0_5) || defined(CONFIG_BF_REV_0_4) \ 24# define ANOMALY_BF531 1
47 || defined(CONFIG_BF_REV_0_3)) 25#else
48#define ANOMALY_05000074 /* A multi issue instruction with dsp32shiftimm in 26# define ANOMALY_BF531 0
49 slot1 and store of a P register in slot 2 is not 27#endif
50 supported */ 28#if defined(__ADSPBF532__)
51#define ANOMALY_05000105 /* Watchpoint Status Register (WPSTAT) bits are set on 29# define ANOMALY_BF532 1
52 every corresponding match */ 30#else
53#define ANOMALY_05000119 /* DMA_RUN bit is not valid after a Peripheral Receive 31# define ANOMALY_BF532 0
54 Channel DMA stops */ 32#endif
55#define ANOMALY_05000122 /* Rx.H can not be used to access 16-bit System MMR 33#if defined(__ADSPBF533__)
56 registers. */ 34# define ANOMALY_BF533 1
57#define ANOMALY_05000166 /* PPI Data Lengths Between 8 and 16 do not zero out 35#else
58 upper bits*/ 36# define ANOMALY_BF533 0
59#define ANOMALY_05000167 /* Turning Serial Ports on With External Frame Syncs */ 37#endif
60#define ANOMALY_05000180 /* PPI_DELAY not functional in PPI modes with 0 frame
61 syncs */
62#define ANOMALY_05000208 /* VSTAT status bit in PLL_STAT register is not
63 functional */
64#define ANOMALY_05000219 /* NMI event at boot time results in unpredictable
65 state */
66#define ANOMALY_05000229 /* SPI Slave Boot Mode modifies registers */
67#define ANOMALY_05000272 /* Certain data cache write through modes fail for
68 VDDint <=0.9V */
69#define ANOMALY_05000273 /* Writes to Synchronous SDRAM memory may be lost */
70#define ANOMALY_05000277 /* Writes to a flag data register one SCLK cycle after
71 an edge is detected may clear interrupt */
72#define ANOMALY_05000278 /* Disabling Peripherals with DMA running may cause
73 DMA system instability */
74#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context is
75 not restored */
76#define ANOMALY_05000282 /* Memory DMA corruption with 32-bit data and traffic
77 control */
78#define ANOMALY_05000283 /* A system MMR write is stalled indefinitely when
79 killed in a particular stage*/
80#define ANOMALY_05000311 /* Erroneous flag pin operations under specific
81 sequences */
82#define ANOMALY_05000312 /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC
83 registers are interrupted */
84#define ANOMALY_05000313 /* PPI Is Level-Sensitive on First Transfer */
85#define ANOMALY_05000315 /* Killed System MMR Write Completes Erroneously On
86 * Next System MMR Access */
87#define ANOMALY_05000319 /* Internal Voltage Regulator Values of 1.05V, 1.10V
88 * and 1.15V Not Allowed for LQFP Packages */
89#endif /* Issues that are common to 0.5, 0.4, and 0.3 silicon */
90 38
91/* These issues only occur on 0.3 or 0.4 BF533 */ 39/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */
92#if (defined(CONFIG_BF_REV_0_4) || defined(CONFIG_BF_REV_0_3)) 40#define ANOMALY_05000074 (1)
93#define ANOMALY_05000099 /* UART Line Status Register (UART_LSR) bits are not 41/* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */
94 updated at the same time. */ 42#define ANOMALY_05000099 (__SILICON_REVISION__ < 5)
95#define ANOMALY_05000158 /* Boot fails when data cache enabled: Data from a Data 43/* Watchpoint Status Register (WPSTAT) Bits Are Set on Every Corresponding Match */
96 Cache Fill can be corrupted after or during 44#define ANOMALY_05000105 (1)
97 Instruction DMA if certain core stalls exist */ 45/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
98#define ANOMALY_05000179 /* PPI_COUNT cannot be programmed to 0 in General 46#define ANOMALY_05000119 (1)
99 Purpose TX or RX modes */ 47/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
100#define ANOMALY_05000198 /* Failing SYSTEM MMR accesses when stalled by 48#define ANOMALY_05000122 (1)
101 preceding memory read */ 49/* Instruction DMA Can Cause Data Cache Fills to Fail (Boot Implications) */
102#define ANOMALY_05000200 /* SPORT TFS and DT are incorrectly driven during 50#define ANOMALY_05000158 (__SILICON_REVISION__ < 5)
103 inactive channels in certain conditions */ 51/* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */
104#define ANOMALY_05000202 /* Possible infinite stall with specific dual dag 52#define ANOMALY_05000166 (1)
105 situation */ 53/* Turning Serial Ports on with External Frame Syncs */
106#define ANOMALY_05000215 /* UART TX Interrupt masked erroneously */ 54#define ANOMALY_05000167 (1)
107#define ANOMALY_05000225 /* Incorrect pulse-width of UART start-bit */ 55/* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */
108#define ANOMALY_05000227 /* Scratchpad memory bank reads may return incorrect 56#define ANOMALY_05000179 (__SILICON_REVISION__ < 5)
109 data*/ 57/* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */
110#define ANOMALY_05000230 /* UART Receiver is less robust against Baudrate 58#define ANOMALY_05000180 (1)
111 Differences in certain Conditions */ 59/* Timer Pin Limitations for PPI TX Modes with External Frame Syncs */
112#define ANOMALY_05000231 /* UART STB bit incorrectly affects receiver setting */ 60#define ANOMALY_05000183 (__SILICON_REVISION__ < 4)
113#define ANOMALY_05000242 /* DF bit in PLL_CTL register does not respond to 61/* False Protection Exceptions */
114 hardware reset */ 62#define ANOMALY_05000189 (__SILICON_REVISION__ < 4)
115#define ANOMALY_05000244 /* With instruction cache enabled, a CSYNC or SSYNC or 63/* False I/O Pin Interrupts on Edge-Sensitive Inputs When Polarity Setting Is Changed */
116 IDLE around a Change of Control causes 64#define ANOMALY_05000193 (__SILICON_REVISION__ < 4)
117 unpredictable results */ 65/* Restarting SPORT in Specific Modes May Cause Data Corruption */
118#define ANOMALY_05000245 /* Spurious Hardware Error from an access in the 66#define ANOMALY_05000194 (__SILICON_REVISION__ < 4)
119 shadow of a conditional branch */ 67/* Failing MMR Accesses When Stalled by Preceding Memory Read */
120#define ANOMALY_05000246 /* Data CPLB's should prevent spurious hardware 68#define ANOMALY_05000198 (__SILICON_REVISION__ < 5)
121 errors */ 69/* Current DMA Address Shows Wrong Value During Carry Fix */
122#define ANOMALY_05000253 /* Maximum external clock speed for Timers */ 70#define ANOMALY_05000199 (__SILICON_REVISION__ < 4)
123#define ANOMALY_05000255 /* Entering Hibernate Mode with RTC Seconds event 71/* SPORT TFS and DT Are Incorrectly Driven During Inactive Channels in Certain Conditions */
124 interrupt not functional */ 72#define ANOMALY_05000200 (__SILICON_REVISION__ < 5)
125#define ANOMALY_05000257 /* An interrupt or exception during short Hardware 73/* Receive Frame Sync Not Ignored During Active Frames in SPORT Multi-Channel Mode */
126 loops may cause the instruction fetch unit to 74#define ANOMALY_05000201 (__SILICON_REVISION__ < 4)
127 malfunction */ 75/* Possible Infinite Stall with Specific Dual-DAG Situation */
128#define ANOMALY_05000258 /* Instruction Cache is corrupted when bit 9 and 12 of 76#define ANOMALY_05000202 (__SILICON_REVISION__ < 5)
129 the ICPLB Data registers differ */ 77/* Specific Sequence That Can Cause DMA Error or DMA Stopping */
130#define ANOMALY_05000260 /* ICPLB_STATUS MMR register may be corrupted */ 78#define ANOMALY_05000203 (__SILICON_REVISION__ < 4)
131#define ANOMALY_05000261 /* DCPLB_FAULT_ADDR MMR register may be corrupted */ 79/* Incorrect data read with write-through cache and allocate cache lines on reads only mode */
132#define ANOMALY_05000262 /* Stores to data cache may be lost */ 80#define ANOMALY_05000204 (__SILICON_REVISION__ < 4 && ANOMALY_BF533)
133#define ANOMALY_05000263 /* Hardware loop corrupted when taking an ICPLB exception */ 81/* Recovery from "Brown-Out" Condition */
134#define ANOMALY_05000264 /* A Sync instruction (CSYNC, SSYNC) or an IDLE 82#define ANOMALY_05000207 (__SILICON_REVISION__ < 4)
135 instruction will cause an infinite stall in the 83/* VSTAT Status Bit in PLL_STAT Register Is Not Functional */
136 second to last instruction in a hardware loop */ 84#define ANOMALY_05000208 (1)
137#define ANOMALY_05000265 /* Sensitivity to noise with slow input edge rates on 85/* Speed Path in Computational Unit Affects Certain Instructions */
138 SPORT external receive and transmit clocks. */ 86#define ANOMALY_05000209 (__SILICON_REVISION__ < 4)
139#define ANOMALY_05000269 /* High I/O activity causes the output voltage of the 87/* UART TX Interrupt Masked Erroneously */
140 internal voltage regulator (VDDint) to increase. */ 88#define ANOMALY_05000215 (__SILICON_REVISION__ < 5)
141#define ANOMALY_05000270 /* High I/O activity causes the output voltage of the 89/* NMI Event at Boot Time Results in Unpredictable State */
142 internal voltage regulator (VDDint) to decrease */ 90#define ANOMALY_05000219 (1)
143#endif /* issues only occur on 0.3 or 0.4 BF533 */ 91/* Incorrect Pulse-Width of UART Start Bit */
92#define ANOMALY_05000225 (__SILICON_REVISION__ < 5)
93/* Scratchpad Memory Bank Reads May Return Incorrect Data */
94#define ANOMALY_05000227 (__SILICON_REVISION__ < 5)
95/* SPI Slave Boot Mode Modifies Registers from Reset Value */
96#define ANOMALY_05000229 (1)
97/* UART Receiver is Less Robust Against Baudrate Differences in Certain Conditions */
98#define ANOMALY_05000230 (__SILICON_REVISION__ < 5)
99/* UART STB Bit Incorrectly Affects Receiver Setting */
100#define ANOMALY_05000231 (__SILICON_REVISION__ < 5)
101/* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */
102#define ANOMALY_05000233 (__SILICON_REVISION__ < 4)
103/* Incorrect Revision Number in DSPID Register */
104#define ANOMALY_05000234 (__SILICON_REVISION__ == 4)
105/* DF Bit in PLL_CTL Register Does Not Respond to Hardware Reset */
106#define ANOMALY_05000242 (__SILICON_REVISION__ < 4)
107/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
108#define ANOMALY_05000244 (__SILICON_REVISION__ < 5)
109/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
110#define ANOMALY_05000245 (1)
111/* Data CPLBs Should Prevent Spurious Hardware Errors */
112#define ANOMALY_05000246 (__SILICON_REVISION__ < 5)
113/* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */
114#define ANOMALY_05000250 (__SILICON_REVISION__ == 4)
115/* Maximum External Clock Speed for Timers */
116#define ANOMALY_05000253 (__SILICON_REVISION__ < 5)
117/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
118#define ANOMALY_05000254 (__SILICON_REVISION__ > 4)
119/* Entering Hibernate State with RTC Seconds Interrupt Not Functional */
120#define ANOMALY_05000255 (__SILICON_REVISION__ < 5)
121/* Interrupt/Exception During Short Hardware Loop May Cause Bad Instruction Fetches */
122#define ANOMALY_05000257 (__SILICON_REVISION__ < 5)
123/* Instruction Cache Is Corrupted When Bits 9 and 12 of the ICPLB Data Registers Differ */
124#define ANOMALY_05000258 (__SILICON_REVISION__ < 5)
125/* ICPLB_STATUS MMR Register May Be Corrupted */
126#define ANOMALY_05000260 (__SILICON_REVISION__ < 5)
127/* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */
128#define ANOMALY_05000261 (__SILICON_REVISION__ < 5)
129/* Stores To Data Cache May Be Lost */
130#define ANOMALY_05000262 (__SILICON_REVISION__ < 5)
131/* Hardware Loop Corrupted When Taking an ICPLB Exception */
132#define ANOMALY_05000263 (__SILICON_REVISION__ < 5)
133/* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */
134#define ANOMALY_05000264 (__SILICON_REVISION__ < 5)
135/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
136#define ANOMALY_05000265 (__SILICON_REVISION__ < 5)
137/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Increase */
138#define ANOMALY_05000269 (__SILICON_REVISION__ < 5)
139/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
140#define ANOMALY_05000270 (__SILICON_REVISION__ < 5)
141/* Spontaneous Reset of Internal Voltage Regulator */
142#define ANOMALY_05000271 (__SILICON_REVISION__ < 4)
143/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
144#define ANOMALY_05000272 (1)
145/* Writes to Synchronous SDRAM Memory May Be Lost */
146#define ANOMALY_05000273 (1)
147/* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */
148#define ANOMALY_05000276 (1)
149/* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */
150#define ANOMALY_05000277 (1)
151/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
152#define ANOMALY_05000278 (1)
153/* False Hardware Error Exception When ISR Context Is Not Restored */
154#define ANOMALY_05000281 (1)
155/* Memory DMA Corruption with 32-Bit Data and Traffic Control */
156#define ANOMALY_05000282 (1)
157/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
158#define ANOMALY_05000283 (1)
159/* SPORTs May Receive Bad Data If FIFOs Fill Up */
160#define ANOMALY_05000288 (1)
161/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
162#define ANOMALY_05000301 (1)
163/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
164#define ANOMALY_05000302 (__SILICON_REVISION__ < 5)
165/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */
166#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
167/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
168#define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
169/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
170#define ANOMALY_05000310 (1)
171/* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */
172#define ANOMALY_05000311 (1)
173/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
174#define ANOMALY_05000312 (1)
175/* PPI Is Level-Sensitive on First Transfer */
176#define ANOMALY_05000313 (1)
177/* Killed System MMR Write Completes Erroneously On Next System MMR Access */
178#define ANOMALY_05000315 (1)
179/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
180#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532)
144 181
145/* These issues are only on 0.4 silicon */ 182/* These anomalies have been "phased" out of analog.com anomaly sheets and are
146#if (defined(CONFIG_BF_REV_0_4)) 183 * here to show running on older silicon just isn't feasible.
147#define ANOMALY_05000234 /* Incorrect Revision Number in DSPID Register */ 184 */
148#define ANOMALY_05000250 /* Incorrect Bit-Shift of Data Word in Multichannel
149 (TDM) */
150#endif /* issues are only on 0.4 silicon */
151 185
152/* These issues are only on 0.3 silicon */ 186/* Watchpoints (Hardware Breakpoints) are not supported */
153#if defined(CONFIG_BF_REV_0_3) 187#define ANOMALY_05000067 (__SILICON_REVISION__ < 3)
154#define ANOMALY_05000183 /* Timer Pin limitations for PPI TX Modes with 188/* Reserved bits in SYSCFG register not set at power on */
155 External Frame Syncs */ 189#define ANOMALY_05000109 (__SILICON_REVISION__ < 3)
156#define ANOMALY_05000189 /* False Protection Exceptions caused by Speculative 190/* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */
157 Instruction or Data Fetches, or by Fetches at the 191#define ANOMALY_05000116 (__SILICON_REVISION__ < 3)
158 boundary of reserved memory space */ 192/* DTEST_COMMAND initiated memory access may be incorrect if data cache or DMA is active */
159#define ANOMALY_05000193 /* False Flag Pin Interrupts on Edge Sensitive Inputs 193#define ANOMALY_05000123 (__SILICON_REVISION__ < 3)
160 when polarity setting is changed */ 194/* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1, or 1:1 */
161#define ANOMALY_05000194 /* Sport Restarting in specific modes may cause data 195#define ANOMALY_05000124 (__SILICON_REVISION__ < 3)
162 corruption */ 196/* Erroneous exception when enabling cache */
163#define ANOMALY_05000199 /* DMA current address shows wrong value during carry 197#define ANOMALY_05000125 (__SILICON_REVISION__ < 3)
164 fix */ 198/* SPI clock polarity and phase bits incorrect during booting */
165#define ANOMALY_05000201 /* Receive frame sync not ignored during active 199#define ANOMALY_05000126 (__SILICON_REVISION__ < 3)
166 frames in sport MCM */ 200/* DMEM_CONTROL is not set on Reset */
167#define ANOMALY_05000203 /* Specific sequence that can cause DMA error or DMA 201#define ANOMALY_05000137 (__SILICON_REVISION__ < 3)
168 stopping */ 202/* SPI boot will not complete if there is a zero fill block in the loader file */
169#if defined(CONFIG_BF533) 203#define ANOMALY_05000138 (__SILICON_REVISION__ < 3)
170#define ANOMALY_05000204 /* Incorrect data read with write-through cache and 204/* Allowing the SPORT RX FIFO to fill will cause an overflow */
171 allocate cache lines on reads only mode */ 205#define ANOMALY_05000140 (__SILICON_REVISION__ < 3)
172#endif /* CONFIG_BF533 */ 206/* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */
173#define ANOMALY_05000207 /* Recovery from "brown-out" condition */ 207#define ANOMALY_05000141 (__SILICON_REVISION__ < 3)
174#define ANOMALY_05000209 /* Speed-Path in computational unit affects certain 208/* Interrupts may be lost when a programmable input flag is configured to be edge sensitive */
175 instructions */ 209#define ANOMALY_05000142 (__SILICON_REVISION__ < 3)
176#define ANOMALY_05000233 /* PPI_FS3 is not driven in 2 or 3 internal Frame 210/* A read from external memory may return a wrong value with data cache enabled */
177 Sync Transmit Mode */ 211#define ANOMALY_05000143 (__SILICON_REVISION__ < 3)
178#define ANOMALY_05000271 /* Spontaneous reset of Internal Voltage Regulator */ 212/* DMA and TESTSET conflict when both are accessing external memory */
179#endif /* only on 0.3 silicon */ 213#define ANOMALY_05000144 (__SILICON_REVISION__ < 3)
214/* In PWM_OUT mode, you must enable the PPI block to generate a waveform from PPI_CLK */
215#define ANOMALY_05000145 (__SILICON_REVISION__ < 3)
216/* MDMA may lose the first few words of a descriptor chain */
217#define ANOMALY_05000146 (__SILICON_REVISION__ < 3)
218/* The source MDMA descriptor may stop with a DMA Error */
219#define ANOMALY_05000147 (__SILICON_REVISION__ < 3)
220/* When booting from a 16-bit asynchronous memory device, the upper 8-bits of each word must be 0x00 */
221#define ANOMALY_05000148 (__SILICON_REVISION__ < 3)
222/* Frame Delay in SPORT Multichannel Mode */
223#define ANOMALY_05000153 (__SILICON_REVISION__ < 3)
224/* SPORT TFS signal is active in Multi-channel mode outside of valid channels */
225#define ANOMALY_05000154 (__SILICON_REVISION__ < 3)
226/* Timer1 can not be used for PWMOUT mode when a certain PPI mode is in use */
227#define ANOMALY_05000155 (__SILICON_REVISION__ < 3)
228/* A killed 32-bit System MMR write will lead to the next system MMR access thinking it should be 32-bit. */
229#define ANOMALY_05000157 (__SILICON_REVISION__ < 3)
230/* SPORT transmit data is not gated by external frame sync in certain conditions */
231#define ANOMALY_05000163 (__SILICON_REVISION__ < 3)
232/* SDRAM auto-refresh and subsequent Power Ups */
233#define ANOMALY_05000168 (__SILICON_REVISION__ < 3)
234/* DATA CPLB page miss can result in lost write-through cache data writes */
235#define ANOMALY_05000169 (__SILICON_REVISION__ < 3)
236/* DMA vs Core accesses to external memory */
237#define ANOMALY_05000173 (__SILICON_REVISION__ < 3)
238/* Cache Fill Buffer Data lost */
239#define ANOMALY_05000174 (__SILICON_REVISION__ < 3)
240/* Overlapping Sequencer and Memory Stalls */
241#define ANOMALY_05000175 (__SILICON_REVISION__ < 3)
242/* Multiplication of (-1) by (-1) followed by an accumulator saturation */
243#define ANOMALY_05000176 (__SILICON_REVISION__ < 3)
244/* Disabling the PPI resets the PPI configuration registers */
245#define ANOMALY_05000181 (__SILICON_REVISION__ < 3)
246/* PPI TX Mode with 2 External Frame Syncs */
247#define ANOMALY_05000185 (__SILICON_REVISION__ < 3)
248/* PPI does not invert the Driving PPICLK edge in Transmit Modes */
249#define ANOMALY_05000191 (__SILICON_REVISION__ < 3)
250/* In PPI Transmit Modes with External Frame Syncs POLC */
251#define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
252/* Internal Voltage Regulator may not start up */
253#define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
180 254
181#if defined(CONFIG_BF_REV_0_2) 255/* Anomalies that don't exist on this proc */
182#define ANOMALY_05000067 /* Watchpoints (Hardware Breakpoints) are not 256#define ANOMALY_05000266 (0)
183 * supported */ 257#define ANOMALY_05000323 (0)
184#define ANOMALY_05000109 /* Reserved bits in SYSCFG register not set at
185 * power on */
186#define ANOMALY_05000116 /* Trace Buffers may record discontinuities into
187 * emulation mode and/or exception, NMI, reset
188 * handlers */
189#define ANOMALY_05000123 /* DTEST_COMMAND initiated memory access may be
190 * incorrect if data cache or DMA is active */
191#define ANOMALY_05000124 /* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1,
192 * or 1:1 */
193#define ANOMALY_05000125 /* Erroneous exception when enabling cache */
194#define ANOMALY_05000126 /* SPI clock polarity and phase bits incorrect
195 * during booting */
196#define ANOMALY_05000137 /* DMEM_CONTROL is not set on Reset */
197#define ANOMALY_05000138 /* SPI boot will not complete if there is a zero fill
198 * block in the loader file */
199#define ANOMALY_05000140 /* Allowing the SPORT RX FIFO to fill will cause an
200 * overflow */
201#define ANOMALY_05000141 /* An Infinite Stall occurs with a particular sequence
202 * of consecutive dual dag events */
203#define ANOMALY_05000142 /* Interrupts may be lost when a programmable input
204 * flag is configured to be edge sensitive */
205#define ANOMALY_05000143 /* A read from external memory may return a wrong
206 * value with data cache enabled */
207#define ANOMALY_05000144 /* DMA and TESTSET conflict when both are accessing
208 * external memory */
209#define ANOMALY_05000145 /* In PWM_OUT mode, you must enable the PPI block to
210 * generate a waveform from PPI_CLK */
211#define ANOMALY_05000146 /* MDMA may lose the first few words of a descriptor
212 * chain */
213#define ANOMALY_05000147 /* The source MDMA descriptor may stop with a DMA
214 * Error */
215#define ANOMALY_05000148 /* When booting from a 16-bit asynchronous memory
216 * device, the upper 8-bits of each word must be
217 * 0x00 */
218#define ANOMALY_05000153 /* Frame Delay in SPORT Multichannel Mode */
219#define ANOMALY_05000154 /* SPORT TFS signal is active in Multi-channel mode
220 * outside of valid channels */
221#define ANOMALY_05000155 /* Timer1 can not be used for PWMOUT mode when a
222 * certain PPI mode is in use */
223#define ANOMALY_05000157 /* A killed 32-bit System MMR write will lead to
224 * the next system MMR access thinking it should be
225 * 32-bit. */
226#define ANOMALY_05000163 /* SPORT transmit data is not gated by external frame
227 * sync in certain conditions */
228#define ANOMALY_05000168 /* SDRAM auto-refresh and subsequent Power Ups */
229#define ANOMALY_05000169 /* DATA CPLB page miss can result in lost
230 * write-through cache data writes */
231#define ANOMALY_05000173 /* DMA vs Core accesses to external memory */
232#define ANOMALY_05000174 /* Cache Fill Buffer Data lost */
233#define ANOMALY_05000175 /* Overlapping Sequencer and Memory Stalls */
234#define ANOMALY_05000176 /* Multiplication of (-1) by (-1) followed by an
235 * accumulator saturation */
236#define ANOMALY_05000181 /* Disabling the PPI resets the PPI configuration
237 * registers */
238#define ANOMALY_05000185 /* PPI TX Mode with 2 External Frame Syncs */
239#define ANOMALY_05000191 /* PPI does not invert the Driving PPICLK edge in
240 * Transmit Modes */
241#define ANOMALY_05000192 /* In PPI Transmit Modes with External Frame Syncs
242 * POLC */
243#define ANOMALY_05000206 /* Internal Voltage Regulator may not start up */
244 258
245#endif 259#endif
246
247#endif /* _MACH_ANOMALY_H_ */
diff --git a/include/asm-blackfin/mach-bf533/bf533.h b/include/asm-blackfin/mach-bf533/bf533.h
index 185fc1284858..12a416931991 100644
--- a/include/asm-blackfin/mach-bf533/bf533.h
+++ b/include/asm-blackfin/mach-bf533/bf533.h
@@ -52,12 +52,12 @@
52/***************************/ 52/***************************/
53 53
54 54
55#define BLKFIN_DSUBBANKS 4 55#define BFIN_DSUBBANKS 4
56#define BLKFIN_DWAYS 2 56#define BFIN_DWAYS 2
57#define BLKFIN_DLINES 64 57#define BFIN_DLINES 64
58#define BLKFIN_ISUBBANKS 4 58#define BFIN_ISUBBANKS 4
59#define BLKFIN_IWAYS 4 59#define BFIN_IWAYS 4
60#define BLKFIN_ILINES 32 60#define BFIN_ILINES 32
61 61
62#define WAY0_L 0x1 62#define WAY0_L 0x1
63#define WAY1_L 0x2 63#define WAY1_L 0x2
@@ -141,97 +141,6 @@
141 141
142#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) 142#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
143 143
144#define MAX_VC 650000000
145#define MIN_VC 50000000
146
147#ifdef CONFIG_BFIN_KERNEL_CLOCK
148/********************************PLL Settings **************************************/
149#if (CONFIG_VCO_MULT < 0)
150#error "VCO Multiplier is less than 0. Please select a different value"
151#endif
152
153#if (CONFIG_VCO_MULT == 0)
154#error "VCO Multiplier should be greater than 0. Please select a different value"
155#endif
156
157#if (CONFIG_VCO_MULT > 64)
158#error "VCO Multiplier is more than 64. Please select a different value"
159#endif
160
161#ifndef CONFIG_CLKIN_HALF
162#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
163#else
164#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
165#endif
166
167#ifndef CONFIG_PLL_BYPASS
168#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
169#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
170#else
171#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
172#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
173#endif
174
175#if (CONFIG_SCLK_DIV < 1)
176#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
177#endif
178
179#if (CONFIG_SCLK_DIV > 15)
180#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
181#endif
182
183#if (CONFIG_CCLK_DIV != 1)
184#if (CONFIG_CCLK_DIV != 2)
185#if (CONFIG_CCLK_DIV != 4)
186#if (CONFIG_CCLK_DIV != 8)
187#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value"
188#endif
189#endif
190#endif
191#endif
192
193#if (CONFIG_VCO_HZ > MAX_VC)
194#error "VCO selected is more than maximum value. Please change the VCO multipler"
195#endif
196
197#if (CONFIG_SCLK_HZ > 133000000)
198#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
199#endif
200
201#if (CONFIG_SCLK_HZ < 27000000)
202#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
203#endif
204
205#if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ)
206#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ)
207#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
208#error "Please select sclk less than cclk"
209#endif
210#endif
211#endif
212
213#if (CONFIG_CCLK_DIV == 1)
214#define CONFIG_CCLK_ACT_DIV CCLK_DIV1
215#endif
216#if (CONFIG_CCLK_DIV == 2)
217#define CONFIG_CCLK_ACT_DIV CCLK_DIV2
218#endif
219#if (CONFIG_CCLK_DIV == 4)
220#define CONFIG_CCLK_ACT_DIV CCLK_DIV4
221#endif
222#if (CONFIG_CCLK_DIV == 8)
223#define CONFIG_CCLK_ACT_DIV CCLK_DIV8
224#endif
225#ifndef CONFIG_CCLK_ACT_DIV
226#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly
227#endif
228
229#if defined(ANOMALY_05000273) && (CONFIG_CCLK_DIV == 1)
230#error ANOMALY 05000273, please make sure CCLK is at least 2x SCLK
231#endif
232
233#endif /* CONFIG_BFIN_KERNEL_CLOCK */
234
235#ifdef CONFIG_BF533 144#ifdef CONFIG_BF533
236#define CPU "BF533" 145#define CPU "BF533"
237#define CPUID 0x027a5000 146#define CPUID 0x027a5000
@@ -249,58 +158,4 @@
249#define CPUID 0x0 158#define CPUID 0x0
250#endif 159#endif
251 160
252#if (CONFIG_MEM_SIZE % 4)
253#error "SDRAM mem size must be multible of 4MB"
254#endif
255
256#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
257#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
258#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
259#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
260
261/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/
262
263#define ANOMALY_05000158_WORKAROUND 0x200
264#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */
265#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_DIRTY \
266 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
267#else /*Write Through */
268#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_DIRTY \
269 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
270#endif
271
272#define L1_DMEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
273#define SDRAM_DNON_CHBL (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY)
274#define SDRAM_EBIU (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY)
275#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
276
277#define SIZE_1K 0x00000400 /* 1K */
278#define SIZE_4K 0x00001000 /* 4K */
279#define SIZE_1M 0x00100000 /* 1M */
280#define SIZE_4M 0x00400000 /* 4M */
281
282#define MAX_CPLBS (16 * 2)
283
284/*
285* Number of required data CPLB switchtable entries
286* MEMSIZE / 4 (we mostly install 4M page size CPLBs
287* approx 16 for smaller 1MB page size CPLBs for allignment purposes
288* 1 for L1 Data Memory
289* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
290* 1 for ASYNC Memory
291*/
292
293
294#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1) * 2)
295
296/*
297* Number of required instruction CPLB switchtable entries
298* MEMSIZE / 4 (we mostly install 4M page size CPLBs
299* approx 12 for smaller 1MB page size CPLBs for allignment purposes
300* 1 for L1 Instruction Memory
301* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
302*/
303
304#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1) * 2)
305
306#endif /* __MACH_BF533_H__ */ 161#endif /* __MACH_BF533_H__ */
diff --git a/include/asm-blackfin/mach-bf533/blackfin.h b/include/asm-blackfin/mach-bf533/blackfin.h
index e4384491e972..f3b240abf170 100644
--- a/include/asm-blackfin/mach-bf533/blackfin.h
+++ b/include/asm-blackfin/mach-bf533/blackfin.h
@@ -38,7 +38,7 @@
38#include "defBF532.h" 38#include "defBF532.h"
39#include "anomaly.h" 39#include "anomaly.h"
40 40
41#if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) 41#if !defined(__ASSEMBLY__)
42#include "cdefBF532.h" 42#include "cdefBF532.h"
43#endif 43#endif
44 44
diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h b/include/asm-blackfin/mach-bf533/cdefBF532.h
index 74f967b235e2..c803e14b529c 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -30,11 +30,9 @@
30 30
31#ifndef _CDEF_BF532_H 31#ifndef _CDEF_BF532_H
32#define _CDEF_BF532_H 32#define _CDEF_BF532_H
33/* 33
34#if !defined(__ADSPLPBLACKFIN__) 34#include <asm/blackfin.h>
35#warning cdefBF532.h should only be included for 532 compatible chips. 35
36#endif
37*/
38/*include all Core registers and bit definitions*/ 36/*include all Core registers and bit definitions*/
39#include "defBF532.h" 37#include "defBF532.h"
40 38
@@ -65,7 +63,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
65 bfin_write32(SIC_IWR, IWR_ENABLE(0)); 63 bfin_write32(SIC_IWR, IWR_ENABLE(0));
66 64
67 bfin_write16(VR_CTL, val); 65 bfin_write16(VR_CTL, val);
68 __builtin_bfin_ssync(); 66 SSYNC();
69 67
70 local_irq_save(flags); 68 local_irq_save(flags);
71 asm("IDLE;"); 69 asm("IDLE;");
@@ -132,10 +130,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
132/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */ 130/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
133#define bfin_read_FIO_DIR() bfin_read16(FIO_DIR) 131#define bfin_read_FIO_DIR() bfin_read16(FIO_DIR)
134#define bfin_write_FIO_DIR(val) bfin_write16(FIO_DIR,val) 132#define bfin_write_FIO_DIR(val) bfin_write16(FIO_DIR,val)
135#define bfin_read_FIO_FLAG_C() bfin_read16(FIO_FLAG_C)
136#define bfin_write_FIO_FLAG_C(val) bfin_write16(FIO_FLAG_C,val)
137#define bfin_read_FIO_FLAG_S() bfin_read16(FIO_FLAG_S)
138#define bfin_write_FIO_FLAG_S(val) bfin_write16(FIO_FLAG_S,val)
139#define bfin_read_FIO_MASKA_C() bfin_read16(FIO_MASKA_C) 133#define bfin_read_FIO_MASKA_C() bfin_read16(FIO_MASKA_C)
140#define bfin_write_FIO_MASKA_C(val) bfin_write16(FIO_MASKA_C,val) 134#define bfin_write_FIO_MASKA_C(val) bfin_write16(FIO_MASKA_C,val)
141#define bfin_read_FIO_MASKA_S() bfin_read16(FIO_MASKA_S) 135#define bfin_read_FIO_MASKA_S() bfin_read16(FIO_MASKA_S)
@@ -152,10 +146,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
152#define bfin_write_FIO_BOTH(val) bfin_write16(FIO_BOTH,val) 146#define bfin_write_FIO_BOTH(val) bfin_write16(FIO_BOTH,val)
153#define bfin_read_FIO_INEN() bfin_read16(FIO_INEN) 147#define bfin_read_FIO_INEN() bfin_read16(FIO_INEN)
154#define bfin_write_FIO_INEN(val) bfin_write16(FIO_INEN,val) 148#define bfin_write_FIO_INEN(val) bfin_write16(FIO_INEN,val)
155#define bfin_read_FIO_FLAG_D() bfin_read16(FIO_FLAG_D)
156#define bfin_write_FIO_FLAG_D(val) bfin_write16(FIO_FLAG_D,val)
157#define bfin_read_FIO_FLAG_T() bfin_read16(FIO_FLAG_T)
158#define bfin_write_FIO_FLAG_T(val) bfin_write16(FIO_FLAG_T,val)
159#define bfin_read_FIO_MASKA_D() bfin_read16(FIO_MASKA_D) 149#define bfin_read_FIO_MASKA_D() bfin_read16(FIO_MASKA_D)
160#define bfin_write_FIO_MASKA_D(val) bfin_write16(FIO_MASKA_D,val) 150#define bfin_write_FIO_MASKA_D(val) bfin_write16(FIO_MASKA_D,val)
161#define bfin_read_FIO_MASKA_T() bfin_read16(FIO_MASKA_T) 151#define bfin_read_FIO_MASKA_T() bfin_read16(FIO_MASKA_T)
@@ -165,6 +155,50 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
165#define bfin_read_FIO_MASKB_T() bfin_read16(FIO_MASKB_T) 155#define bfin_read_FIO_MASKB_T() bfin_read16(FIO_MASKB_T)
166#define bfin_write_FIO_MASKB_T(val) bfin_write16(FIO_MASKB_T,val) 156#define bfin_write_FIO_MASKB_T(val) bfin_write16(FIO_MASKB_T,val)
167 157
158
159#if ANOMALY_05000311
160#define BFIN_WRITE_FIO_FLAG(name) \
161static __inline__ void bfin_write_FIO_FLAG_ ## name (unsigned short val)\
162{\
163 unsigned long flags;\
164 local_irq_save(flags);\
165 bfin_write16(FIO_FLAG_ ## name,val);\
166 bfin_read_CHIPID();\
167 local_irq_restore(flags);\
168}
169BFIN_WRITE_FIO_FLAG(D)
170BFIN_WRITE_FIO_FLAG(C)
171BFIN_WRITE_FIO_FLAG(S)
172BFIN_WRITE_FIO_FLAG(T)
173
174#define BFIN_READ_FIO_FLAG(name) \
175static __inline__ unsigned short bfin_read_FIO_FLAG_ ## name (void)\
176{\
177 unsigned long flags;\
178 unsigned short ret;\
179 local_irq_save(flags);\
180 ret = bfin_read16(FIO_FLAG_ ## name);\
181 bfin_read_CHIPID();\
182 local_irq_restore(flags);\
183 return ret;\
184}
185BFIN_READ_FIO_FLAG(D)
186BFIN_READ_FIO_FLAG(C)
187BFIN_READ_FIO_FLAG(S)
188BFIN_READ_FIO_FLAG(T)
189
190#else
191#define bfin_write_FIO_FLAG_D(val) bfin_write16(FIO_FLAG_D,val)
192#define bfin_write_FIO_FLAG_C(val) bfin_write16(FIO_FLAG_C,val)
193#define bfin_write_FIO_FLAG_S(val) bfin_write16(FIO_FLAG_S,val)
194#define bfin_write_FIO_FLAG_T(val) bfin_write16(FIO_FLAG_T,val)
195#define bfin_read_FIO_FLAG_T() bfin_read16(FIO_FLAG_T)
196#define bfin_read_FIO_FLAG_C() bfin_read16(FIO_FLAG_C)
197#define bfin_read_FIO_FLAG_S() bfin_read16(FIO_FLAG_S)
198#define bfin_read_FIO_FLAG_D() bfin_read16(FIO_FLAG_D)
199#endif
200
201
168/* DMA Controller */ 202/* DMA Controller */
169#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG) 203#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
170#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG,val) 204#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG,val)
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 6a3cf93f8b57..37134aaf9954 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -104,6 +104,7 @@
104#define UART_GCTL 0xFFC00424 /* Global Control Register */ 104#define UART_GCTL 0xFFC00424 /* Global Control Register */
105 105
106/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 106/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
107#define SPI0_REGBASE 0xFFC00500
107#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 108#define SPI_CTL 0xFFC00500 /* SPI Control Register */
108#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 109#define SPI_FLG 0xFFC00504 /* SPI Flag register */
109#define SPI_STAT 0xFFC00508 /* SPI Status register */ 110#define SPI_STAT 0xFFC00508 /* SPI Status register */
@@ -928,7 +929,7 @@
928#define GM 0x00000008 /* When RDBR full, get more (=1) data or discard (=0) incoming Data */ 929#define GM 0x00000008 /* When RDBR full, get more (=1) data or discard (=0) incoming Data */
929#define PSSE 0x00000010 /* Enable (=1) Slave-Select input for Master. */ 930#define PSSE 0x00000010 /* Enable (=1) Slave-Select input for Master. */
930#define EMISO 0x00000020 /* Enable (=1) MISO pin as an output. */ 931#define EMISO 0x00000020 /* Enable (=1) MISO pin as an output. */
931#define SPI_LEN 0x00000100 /* Word length (0 => 8 bits, 1 => 16 bits) */ 932#define SIZE 0x00000100 /* Word length (0 => 8 bits, 1 => 16 bits) */
932#define LSBF 0x00000200 /* Data format (0 => MSB sent/received first 1 => LSB sent/received first) */ 933#define LSBF 0x00000200 /* Data format (0 => MSB sent/received first 1 => LSB sent/received first) */
933#define CPHA 0x00000400 /* Clock phase (0 => SPICLK starts toggling in middle of xfer, 1 => SPICLK toggles at the beginning of xfer. */ 934#define CPHA 0x00000400 /* Clock phase (0 => SPICLK starts toggling in middle of xfer, 1 => SPICLK toggles at the beginning of xfer. */
934#define CPOL 0x00000800 /* Clock polarity (0 => active-high, 1 => active-low) */ 935#define CPOL 0x00000800 /* Clock polarity (0 => active-high, 1 => active-low) */
diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h
index 9879e68e315c..452fb825d891 100644
--- a/include/asm-blackfin/mach-bf533/irq.h
+++ b/include/asm-blackfin/mach-bf533/irq.h
@@ -128,6 +128,8 @@ Core Emulation **
128#define IRQ_PF14 47 128#define IRQ_PF14 47
129#define IRQ_PF15 48 129#define IRQ_PF15 48
130 130
131#define GPIO_IRQ_BASE IRQ_PF0
132
131#ifdef CONFIG_IRQCHIP_DEMUX_GPIO 133#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
132#define NR_IRQS (IRQ_PF15+1) 134#define NR_IRQS (IRQ_PF15+1)
133#else 135#else
diff --git a/include/asm-blackfin/mach-bf533/mem_map.h b/include/asm-blackfin/mach-bf533/mem_map.h
index e84baa3e939d..94d8c4062eb7 100644
--- a/include/asm-blackfin/mach-bf533/mem_map.h
+++ b/include/asm-blackfin/mach-bf533/mem_map.h
@@ -51,10 +51,10 @@
51 51
52/* Level 1 Memory */ 52/* Level 1 Memory */
53 53
54#ifdef CONFIG_BLKFIN_CACHE 54#ifdef CONFIG_BFIN_ICACHE
55#define BLKFIN_ICACHESIZE (16*1024) 55#define BFIN_ICACHESIZE (16*1024)
56#else 56#else
57#define BLKFIN_ICACHESIZE (0*1024) 57#define BFIN_ICACHESIZE (0*1024)
58#endif 58#endif
59 59
60/* Memory Map for ADSP-BF533 processors */ 60/* Memory Map for ADSP-BF533 processors */
@@ -64,35 +64,35 @@
64#define L1_DATA_A_START 0xFF800000 64#define L1_DATA_A_START 0xFF800000
65#define L1_DATA_B_START 0xFF900000 65#define L1_DATA_B_START 0xFF900000
66 66
67#ifdef CONFIG_BLKFIN_CACHE 67#ifdef CONFIG_BFIN_ICACHE
68#define L1_CODE_LENGTH (0x14000 - 0x4000) 68#define L1_CODE_LENGTH (0x14000 - 0x4000)
69#else 69#else
70#define L1_CODE_LENGTH 0x14000 70#define L1_CODE_LENGTH 0x14000
71#endif 71#endif
72 72
73#ifdef CONFIG_BLKFIN_DCACHE 73#ifdef CONFIG_BFIN_DCACHE
74 74
75#ifdef CONFIG_BLKFIN_DCACHE_BANKA 75#ifdef CONFIG_BFIN_DCACHE_BANKA
76#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 76#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
77#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 77#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
78#define L1_DATA_B_LENGTH 0x8000 78#define L1_DATA_B_LENGTH 0x8000
79#define BLKFIN_DCACHESIZE (16*1024) 79#define BFIN_DCACHESIZE (16*1024)
80#define BLKFIN_DSUPBANKS 1 80#define BFIN_DSUPBANKS 1
81#else 81#else
82#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 82#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
83#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 83#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
84#define L1_DATA_B_LENGTH (0x8000 - 0x4000) 84#define L1_DATA_B_LENGTH (0x8000 - 0x4000)
85#define BLKFIN_DCACHESIZE (32*1024) 85#define BFIN_DCACHESIZE (32*1024)
86#define BLKFIN_DSUPBANKS 2 86#define BFIN_DSUPBANKS 2
87#endif 87#endif
88 88
89#else 89#else
90#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 90#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
91#define L1_DATA_A_LENGTH 0x8000 91#define L1_DATA_A_LENGTH 0x8000
92#define L1_DATA_B_LENGTH 0x8000 92#define L1_DATA_B_LENGTH 0x8000
93#define BLKFIN_DCACHESIZE (0*1024) 93#define BFIN_DCACHESIZE (0*1024)
94#define BLKFIN_DSUPBANKS 0 94#define BFIN_DSUPBANKS 0
95#endif /*CONFIG_BLKFIN_DCACHE*/ 95#endif /*CONFIG_BFIN_DCACHE*/
96#endif 96#endif
97 97
98/* Memory Map for ADSP-BF532 processors */ 98/* Memory Map for ADSP-BF532 processors */
@@ -102,36 +102,36 @@
102#define L1_DATA_A_START 0xFF804000 102#define L1_DATA_A_START 0xFF804000
103#define L1_DATA_B_START 0xFF904000 103#define L1_DATA_B_START 0xFF904000
104 104
105#ifdef CONFIG_BLKFIN_CACHE 105#ifdef CONFIG_BFIN_ICACHE
106#define L1_CODE_LENGTH (0xC000 - 0x4000) 106#define L1_CODE_LENGTH (0xC000 - 0x4000)
107#else 107#else
108#define L1_CODE_LENGTH 0xC000 108#define L1_CODE_LENGTH 0xC000
109#endif 109#endif
110 110
111#ifdef CONFIG_BLKFIN_DCACHE 111#ifdef CONFIG_BFIN_DCACHE
112 112
113#ifdef CONFIG_BLKFIN_DCACHE_BANKA 113#ifdef CONFIG_BFIN_DCACHE_BANKA
114#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 114#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
115#define L1_DATA_A_LENGTH (0x4000 - 0x4000) 115#define L1_DATA_A_LENGTH (0x4000 - 0x4000)
116#define L1_DATA_B_LENGTH 0x4000 116#define L1_DATA_B_LENGTH 0x4000
117#define BLKFIN_DCACHESIZE (16*1024) 117#define BFIN_DCACHESIZE (16*1024)
118#define BLKFIN_DSUPBANKS 1 118#define BFIN_DSUPBANKS 1
119 119
120#else 120#else
121#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 121#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
122#define L1_DATA_A_LENGTH (0x4000 - 0x4000) 122#define L1_DATA_A_LENGTH (0x4000 - 0x4000)
123#define L1_DATA_B_LENGTH (0x4000 - 0x4000) 123#define L1_DATA_B_LENGTH (0x4000 - 0x4000)
124#define BLKFIN_DCACHESIZE (32*1024) 124#define BFIN_DCACHESIZE (32*1024)
125#define BLKFIN_DSUPBANKS 2 125#define BFIN_DSUPBANKS 2
126#endif 126#endif
127 127
128#else 128#else
129#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 129#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
130#define L1_DATA_A_LENGTH 0x4000 130#define L1_DATA_A_LENGTH 0x4000
131#define L1_DATA_B_LENGTH 0x4000 131#define L1_DATA_B_LENGTH 0x4000
132#define BLKFIN_DCACHESIZE (0*1024) 132#define BFIN_DCACHESIZE (0*1024)
133#define BLKFIN_DSUPBANKS 0 133#define BFIN_DSUPBANKS 0
134#endif /*CONFIG_BLKFIN_DCACHE*/ 134#endif /*CONFIG_BFIN_DCACHE*/
135#endif 135#endif
136 136
137/* Memory Map for ADSP-BF531 processors */ 137/* Memory Map for ADSP-BF531 processors */
@@ -144,16 +144,16 @@
144#define L1_DATA_B_LENGTH 0x0000 144#define L1_DATA_B_LENGTH 0x0000
145 145
146 146
147#ifdef CONFIG_BLKFIN_DCACHE 147#ifdef CONFIG_BFIN_DCACHE
148#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 148#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
149#define L1_DATA_A_LENGTH (0x4000 - 0x4000) 149#define L1_DATA_A_LENGTH (0x4000 - 0x4000)
150#define BLKFIN_DCACHESIZE (16*1024) 150#define BFIN_DCACHESIZE (16*1024)
151#define BLKFIN_DSUPBANKS 1 151#define BFIN_DSUPBANKS 1
152#else 152#else
153#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 153#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
154#define L1_DATA_A_LENGTH 0x4000 154#define L1_DATA_A_LENGTH 0x4000
155#define BLKFIN_DCACHESIZE (0*1024) 155#define BFIN_DCACHESIZE (0*1024)
156#define BLKFIN_DSUPBANKS 0 156#define BFIN_DSUPBANKS 0
157#endif 157#endif
158 158
159#endif 159#endif
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index 4453e614c3b1..2b66ecf489f7 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -1,139 +1,144 @@
1
2/* 1/*
3 * File: include/asm-blackfin/mach-bf537/anomaly.h 2 * File: include/asm-blackfin/mach-bf537/anomaly.h
4 * Based on: 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
5 * Author:
6 *
7 * Created:
8 * Description:
9 *
10 * Rev:
11 *
12 * Modified:
13 *
14 *
15 * Bugs: Enter bugs at http://blackfin.uclinux.org/
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2, or (at your option)
20 * any later version.
21 * 4 *
22 * This program is distributed in the hope that it will be useful, 5 * Copyright (C) 2004-2007 Analog Devices Inc.
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 6 * Licensed under the GPL-2 or later.
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; see the file COPYING.
29 * If not, write to the Free Software Foundation,
30 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 */ 7 */
32 8
33/* This file shoule be up to date with: 9/* This file shoule be up to date with:
34 * - Revision J, June 1, 2006; ADSP-BF537 Blackfin Processor Anomaly List 10 * - Revision M, March 13, 2007; ADSP-BF537 Blackfin Processor Anomaly List
35 * - Revision I, June 1, 2006; ADSP-BF536 Blackfin Processor Anomaly List 11 * - Revision L, March 13, 2007; ADSP-BF536 Blackfin Processor Anomaly List
36 * - Revision J, June 1, 2006; ADSP-BF534 Blackfin Processor Anomaly List 12 * - Revision M, March 13, 2007; ADSP-BF534 Blackfin Processor Anomaly List
37 */ 13 */
38 14
39#ifndef _MACH_ANOMALY_H_ 15#ifndef _MACH_ANOMALY_H_
40#define _MACH_ANOMALY_H_ 16#define _MACH_ANOMALY_H_
41 17
42/* We do not support 0.1 silicon - sorry */ 18/* We do not support 0.1 silicon - sorry */
43#if (defined(CONFIG_BF_REV_0_1)) 19#if __SILICON_REVISION__ < 2
44#error Kernel will not work on BF537/6/4 Version 0.1 20# error Kernel will not work on BF537 silicon version 0.0 or 0.1
45#endif 21#endif
46 22
47#if (defined(CONFIG_BF_REV_0_3) || defined(CONFIG_BF_REV_0_2)) 23#if defined(__ADSPBF534__)
48#define ANOMALY_05000074 /* A multi issue instruction with dsp32shiftimm in 24# define ANOMALY_BF534 1
49 slot1 and store of a P register in slot 2 is not 25#else
50 supported */ 26# define ANOMALY_BF534 0
51#define ANOMALY_05000119 /* DMA_RUN bit is not valid after a Peripheral Receive
52 Channel DMA stops */
53#define ANOMALY_05000122 /* Rx.H can not be used to access 16-bit System MMR
54 registers. */
55#define ANOMALY_05000166 /* PPI Data Lengths Between 8 and 16 do not zero out
56 upper bits*/
57#define ANOMALY_05000180 /* PPI_DELAY not functional in PPI modes with 0 frame
58 syncs */
59#if (defined(CONFIG_BF537) || defined(CONFIG_BF536))
60#define ANOMALY_05000247 /* CLKIN Buffer Output Enable Reset Behavior Is
61 Changed */
62#endif
63#define ANOMALY_05000265 /* Sensitivity to noise with slow input edge rates on
64 SPORT external receive and transmit clocks. */
65#define ANOMALY_05000272 /* Certain data cache write through modes fail for
66 VDDint <=0.9V */
67#define ANOMALY_05000273 /* Writes to Synchronous SDRAM memory may be lost */
68#define ANOMALY_05000277 /* Writes to a flag data register one SCLK cycle after
69 an edge is detected may clear interrupt */
70#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context is
71 not restored */
72#define ANOMALY_05000282 /* Memory DMA corruption with 32-bit data and traffic
73 control */
74#define ANOMALY_05000283 /* A system MMR write is stalled indefinitely when
75 killed in a particular stage*/
76#define ANOMALY_05000310 /* False hardware errors caused by fetches at the
77 * boundary of reserved memory */
78#define ANOMALY_05000312 /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC
79 registers are interrupted */
80#define ANOMALY_05000313 /* PPI is level sensitive on first transfer */
81#define ANOMALY_05000322 /* EMAC RMII mode at 10-Base-T speed: RX frames not
82 * received properly */
83#endif 27#endif
84 28#if defined(__ADSPBF536__)
85#if defined(CONFIG_BF_REV_0_2) 29# define ANOMALY_BF536 1
86#define ANOMALY_05000244 /* With instruction cache enabled, a CSYNC or SSYNC or 30#else
87 IDLE around a Change of Control causes 31# define ANOMALY_BF536 0
88 unpredictable results */
89#define ANOMALY_05000250 /* Incorrect Bit-Shift of Data Word in Multichannel
90 (TDM) */
91#if (defined(CONFIG_BF537) || defined(CONFIG_BF536))
92#define ANOMALY_05000252 /* EMAC Tx DMA error after an early frame abort */
93#endif 32#endif
94#define ANOMALY_05000253 /* Maximum external clock speed for Timers */ 33#if defined(__ADSPBF537__)
95#define ANOMALY_05000255 /* Entering Hibernate Mode with RTC Seconds event 34# define ANOMALY_BF537 1
96 interrupt not functional */ 35#else
97#if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) 36# define ANOMALY_BF537 0
98#define ANOMALY_05000256 /* EMAC MDIO input latched on wrong MDC edge */
99#endif 37#endif
100#define ANOMALY_05000257 /* An interrupt or exception during short Hardware
101 loops may cause the instruction fetch unit to
102 malfunction */
103#define ANOMALY_05000258 /* Instruction Cache is corrupted when bit 9 and 12 of
104 the ICPLB Data registers differ */
105#define ANOMALY_05000260 /* ICPLB_STATUS MMR register may be corrupted */
106#define ANOMALY_05000261 /* DCPLB_FAULT_ADDR MMR register may be corrupted */
107#define ANOMALY_05000262 /* Stores to data cache may be lost */
108#define ANOMALY_05000263 /* Hardware loop corrupted when taking an ICPLB exception */
109#define ANOMALY_05000264 /* A Sync instruction (CSYNC, SSYNC) or an IDLE
110 instruction will cause an infinite stall in the
111 second to last instruction in a hardware loop */
112#define ANOMALY_05000268 /* Memory DMA error when peripheral DMA is running
113 and non-zero DEB_TRAFFIC_PERIOD value */
114#define ANOMALY_05000270 /* High I/O activity causes the output voltage of the
115 internal voltage regulator (VDDint) to decrease */
116#define ANOMALY_05000277 /* Writes to a flag data register one SCLK cycle after
117 an edge is detected may clear interrupt */
118#define ANOMALY_05000278 /* Disabling Peripherals with DMA running may cause
119 DMA system instability */
120#define ANOMALY_05000280 /* SPI Master boot mode does not work well with
121 Atmel Dataflash devices */
122#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context
123 * is not restored */
124#define ANOMALY_05000282 /* Memory DMA corruption with 32-bit data and traffic
125 * control */
126#define ANOMALY_05000283 /* System MMR Write Is Stalled Indefinitely When
127 * Killed in a Particular Stage */
128#define ANOMALY_05000285 /* New Feature: EMAC TX DMA Word Alignment
129 * (Not Available On Older Silicon) */
130#define ANOMALY_05000288 /* SPORTs may receive bad data if FIFOs fill up */
131#define ANOMALY_05000315 /* Killed System MMR Write Completes Erroneously
132 * On Next System MMR Access */
133#define ANOMALY_05000316 /* EMAC RMII mode: collisions occur in Full Duplex
134 * mode */
135#define ANOMALY_05000321 /* EMAC RMII mode: TX frames in half duplex fail with
136 * status No Carrier */
137#endif /* CONFIG_BF_REV_0_2 */
138 38
139#endif /* _MACH_ANOMALY_H_ */ 39/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
40#define ANOMALY_05000074 (1)
41/* DMA_RUN bit is not valid after a Peripheral Receive Channel DMA stops */
42#define ANOMALY_05000119 (1)
43/* Rx.H cannot be used to access 16-bit System MMR registers */
44#define ANOMALY_05000122 (1)
45/* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */
46#define ANOMALY_05000157 (__SILICON_REVISION__ < 2)
47/* PPI_DELAY not functional in PPI modes with 0 frame syncs */
48#define ANOMALY_05000180 (1)
49/* Instruction Cache Is Not Functional */
50#define ANOMALY_05000237 (__SILICON_REVISION__ < 2)
51/* If i-cache is on, CSYNC/SSYNC/IDLE around Change of Control causes failures */
52#define ANOMALY_05000244 (__SILICON_REVISION__ < 3)
53/* Spurious Hardware Error from an access in the shadow of a conditional branch */
54#define ANOMALY_05000245 (1)
55/* CLKIN Buffer Output Enable Reset Behavior Is Changed */
56#define ANOMALY_05000247 (1)
57/* Incorrect Bit-Shift of Data Word in Multichannel (TDM) mode in certain conditions */
58#define ANOMALY_05000250 (__SILICON_REVISION__ < 3)
59/* EMAC Tx DMA error after an early frame abort */
60#define ANOMALY_05000252 (__SILICON_REVISION__ < 3)
61/* Maximum external clock speed for Timers */
62#define ANOMALY_05000253 (__SILICON_REVISION__ < 3)
63/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT mode with external clock */
64#define ANOMALY_05000254 (__SILICON_REVISION__ > 2)
65/* Entering Hibernate Mode with RTC Seconds event interrupt not functional */
66#define ANOMALY_05000255 (__SILICON_REVISION__ < 3)
67/* EMAC MDIO input latched on wrong MDC edge */
68#define ANOMALY_05000256 (__SILICON_REVISION__ < 3)
69/* Interrupt/Exception during short hardware loop may cause bad instruction fetches */
70#define ANOMALY_05000257 (__SILICON_REVISION__ < 3)
71/* Instruction Cache is corrupted when bits 9 and 12 of the ICPLB Data registers differ */
72#define ANOMALY_05000258 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ == 1) || __SILICON_REVISION__ == 2)
73/* ICPLB_STATUS MMR register may be corrupted */
74#define ANOMALY_05000260 (__SILICON_REVISION__ == 2)
75/* DCPLB_FAULT_ADDR MMR register may be corrupted */
76#define ANOMALY_05000261 (__SILICON_REVISION__ < 3)
77/* Stores to data cache may be lost */
78#define ANOMALY_05000262 (__SILICON_REVISION__ < 3)
79/* Hardware loop corrupted when taking an ICPLB exception */
80#define ANOMALY_05000263 (__SILICON_REVISION__ == 2)
81/* CSYNC/SSYNC/IDLE causes infinite stall in second to last instruction in hardware loop */
82#define ANOMALY_05000264 (__SILICON_REVISION__ < 3)
83/* Sensitivity to noise with slow input edge rates on external SPORT TX and RX clocks */
84#define ANOMALY_05000265 (1)
85/* Memory DMA error when peripheral DMA is running with non-zero DEB_TRAFFIC_PERIOD */
86#define ANOMALY_05000268 (__SILICON_REVISION__ < 3)
87/* High I/O activity causes output voltage of internal voltage regulator (VDDint) to decrease */
88#define ANOMALY_05000270 (__SILICON_REVISION__ < 3)
89/* Certain data cache write through modes fail for VDDint <=0.9V */
90#define ANOMALY_05000272 (1)
91/* Writes to Synchronous SDRAM memory may be lost */
92#define ANOMALY_05000273 (__SILICON_REVISION__ < 3)
93/* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */
94#define ANOMALY_05000277 (__SILICON_REVISION__ < 3)
95/* Disabling Peripherals with DMA running may cause DMA system instability */
96#define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2))
97/* SPI Master boot mode does not work well with Atmel Data flash devices */
98#define ANOMALY_05000280 (1)
99/* False Hardware Error Exception when ISR context is not restored */
100#define ANOMALY_05000281 (__SILICON_REVISION__ < 3)
101/* Memory DMA corruption with 32-bit data and traffic control */
102#define ANOMALY_05000282 (__SILICON_REVISION__ < 3)
103/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
104#define ANOMALY_05000283 (__SILICON_REVISION__ < 3)
105/* New Feature: EMAC TX DMA Word Alignment (Not Available On Older Silicon) */
106#define ANOMALY_05000285 (__SILICON_REVISION__ < 3)
107/* SPORTs may receive bad data if FIFOs fill up */
108#define ANOMALY_05000288 (__SILICON_REVISION__ < 3)
109/* Memory to memory DMA source/destination descriptors must be in same memory space */
110#define ANOMALY_05000301 (1)
111/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
112#define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
113/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */
114#define ANOMALY_05000305 (__SILICON_REVISION__ < 3)
115/* SCKELOW Bit Does Not Maintain State Through Hibernate */
116#define ANOMALY_05000307 (__SILICON_REVISION__ < 3)
117/* Writing UART_THR while UART clock is disabled sends erroneous start bit */
118#define ANOMALY_05000309 (__SILICON_REVISION__ < 3)
119/* False hardware errors caused by fetches at the boundary of reserved memory */
120#define ANOMALY_05000310 (1)
121/* Errors when SSYNC, CSYNC, or loads to LT, LB and LC registers are interrupted */
122#define ANOMALY_05000312 (1)
123/* PPI is level sensitive on first transfer */
124#define ANOMALY_05000313 (1)
125/* Killed System MMR Write Completes Erroneously On Next System MMR Access */
126#define ANOMALY_05000315 (__SILICON_REVISION__ < 3)
127/* EMAC RMII mode: collisions occur in Full Duplex mode */
128#define ANOMALY_05000316 (__SILICON_REVISION__ < 3)
129/* EMAC RMII mode: TX frames in half duplex fail with status No Carrier */
130#define ANOMALY_05000321 (__SILICON_REVISION__ < 3)
131/* EMAC RMII mode at 10-Base-T speed: RX frames not received properly */
132#define ANOMALY_05000322 (1)
133
134/* Anomalies that don't exist on this proc */
135#define ANOMALY_05000125 (0)
136#define ANOMALY_05000158 (0)
137#define ANOMALY_05000183 (0)
138#define ANOMALY_05000198 (0)
139#define ANOMALY_05000230 (0)
140#define ANOMALY_05000266 (0)
141#define ANOMALY_05000311 (0)
142#define ANOMALY_05000323 (0)
143
144#endif
diff --git a/include/asm-blackfin/mach-bf537/bf537.h b/include/asm-blackfin/mach-bf537/bf537.h
index b8924cd7730c..cfe2a221112e 100644
--- a/include/asm-blackfin/mach-bf537/bf537.h
+++ b/include/asm-blackfin/mach-bf537/bf537.h
@@ -62,12 +62,12 @@
62/***************************/ 62/***************************/
63 63
64 64
65#define BLKFIN_DSUBBANKS 4 65#define BFIN_DSUBBANKS 4
66#define BLKFIN_DWAYS 2 66#define BFIN_DWAYS 2
67#define BLKFIN_DLINES 64 67#define BFIN_DLINES 64
68#define BLKFIN_ISUBBANKS 4 68#define BFIN_ISUBBANKS 4
69#define BLKFIN_IWAYS 4 69#define BFIN_IWAYS 4
70#define BLKFIN_ILINES 32 70#define BFIN_ILINES 32
71 71
72#define WAY0_L 0x1 72#define WAY0_L 0x1
73#define WAY1_L 0x2 73#define WAY1_L 0x2
@@ -121,97 +121,6 @@
121 121
122#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) 122#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
123 123
124#define MAX_VC 650000000
125#define MIN_VC 50000000
126
127/********************************PLL Settings **************************************/
128#ifdef CONFIG_BFIN_KERNEL_CLOCK
129#if (CONFIG_VCO_MULT < 0)
130#error "VCO Multiplier is less than 0. Please select a different value"
131#endif
132
133#if (CONFIG_VCO_MULT == 0)
134#error "VCO Multiplier should be greater than 0. Please select a different value"
135#endif
136
137#if (CONFIG_VCO_MULT > 64)
138#error "VCO Multiplier is more than 64. Please select a different value"
139#endif
140
141#ifndef CONFIG_CLKIN_HALF
142#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
143#else
144#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
145#endif
146
147#ifndef CONFIG_PLL_BYPASS
148#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
149#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
150#else
151#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
152#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
153#endif
154
155#if (CONFIG_SCLK_DIV < 1)
156#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
157#endif
158
159#if (CONFIG_SCLK_DIV > 15)
160#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
161#endif
162
163#if (CONFIG_CCLK_DIV != 1)
164#if (CONFIG_CCLK_DIV != 2)
165#if (CONFIG_CCLK_DIV != 4)
166#if (CONFIG_CCLK_DIV != 8)
167#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value"
168#endif
169#endif
170#endif
171#endif
172
173#if (CONFIG_VCO_HZ > MAX_VC)
174#error "VCO selected is more than maximum value. Please change the VCO multipler"
175#endif
176
177#if (CONFIG_SCLK_HZ > 133000000)
178#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
179#endif
180
181#if (CONFIG_SCLK_HZ < 27000000)
182#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
183#endif
184
185#if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ)
186#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ)
187#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
188#error "Please select sclk less than cclk"
189#endif
190#endif
191#endif
192
193#if (CONFIG_CCLK_DIV == 1)
194#define CONFIG_CCLK_ACT_DIV CCLK_DIV1
195#endif
196#if (CONFIG_CCLK_DIV == 2)
197#define CONFIG_CCLK_ACT_DIV CCLK_DIV2
198#endif
199#if (CONFIG_CCLK_DIV == 4)
200#define CONFIG_CCLK_ACT_DIV CCLK_DIV4
201#endif
202#if (CONFIG_CCLK_DIV == 8)
203#define CONFIG_CCLK_ACT_DIV CCLK_DIV8
204#endif
205#ifndef CONFIG_CCLK_ACT_DIV
206#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly
207#endif
208
209#if defined(ANOMALY_05000273) && (CONFIG_CCLK_DIV == 1)
210#error ANOMALY 05000273, please make sure CCLK is at least 2x SCLK
211#endif
212
213#endif /* CONFIG_BFIN_KERNEL_CLOCK */
214
215#ifdef CONFIG_BF537 124#ifdef CONFIG_BF537
216#define CPU "BF537" 125#define CPU "BF537"
217#define CPUID 0x027c8000 126#define CPUID 0x027c8000
@@ -229,59 +138,4 @@
229#define CPUID 0x0 138#define CPUID 0x0
230#endif 139#endif
231 140
232#if (CONFIG_MEM_SIZE % 4)
233#error "SDRAM mem size must be multible of 4MB"
234#endif
235
236#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
237#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
238#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
239#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
240
241/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/
242
243#define ANOMALY_05000158_WORKAROUND 0x200
244#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */
245#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_DIRTY \
246 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
247#else /*Write Through */
248#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW \
249 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
250#endif
251
252
253#define L1_DMEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY )
254#define SDRAM_DNON_CHBL (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
255#define SDRAM_EBIU (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
256#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY )
257
258#define SIZE_1K 0x00000400 /* 1K */
259#define SIZE_4K 0x00001000 /* 4K */
260#define SIZE_1M 0x00100000 /* 1M */
261#define SIZE_4M 0x00400000 /* 4M */
262
263#define MAX_CPLBS (16 * 2)
264
265/*
266* Number of required data CPLB switchtable entries
267* MEMSIZE / 4 (we mostly install 4M page size CPLBs
268* approx 16 for smaller 1MB page size CPLBs for allignment purposes
269* 1 for L1 Data Memory
270* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
271* 1 for ASYNC Memory
272*/
273
274
275#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1) * 2)
276
277/*
278* Number of required instruction CPLB switchtable entries
279* MEMSIZE / 4 (we mostly install 4M page size CPLBs
280* approx 12 for smaller 1MB page size CPLBs for allignment purposes
281* 1 for L1 Instruction Memory
282* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
283*/
284
285#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1) * 2)
286
287#endif /* __MACH_BF537_H__ */ 141#endif /* __MACH_BF537_H__ */
diff --git a/include/asm-blackfin/mach-bf537/blackfin.h b/include/asm-blackfin/mach-bf537/blackfin.h
index bbd97051ec9c..53fcfa3408d0 100644
--- a/include/asm-blackfin/mach-bf537/blackfin.h
+++ b/include/asm-blackfin/mach-bf537/blackfin.h
@@ -43,7 +43,7 @@
43#include "defBF537.h" 43#include "defBF537.h"
44#endif 44#endif
45 45
46#if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) 46#if !defined(__ASSEMBLY__)
47#include "cdefBF534.h" 47#include "cdefBF534.h"
48 48
49/* UART 0*/ 49/* UART 0*/
@@ -143,284 +143,6 @@
143#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) 143#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
144#define STOPCK_OFF STOPCK 144#define STOPCK_OFF STOPCK
145 145
146/* FIO USE PORT F*/
147#ifdef CONFIG_BF537_PORT_F
148#define bfin_read_PORT_FER() bfin_read_PORTF_FER()
149#define bfin_write_PORT_FER(val) bfin_write_PORTF_FER(val)
150#define bfin_read_FIO_FLAG_D() bfin_read_PORTFIO()
151#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTFIO(val)
152#define bfin_read_FIO_FLAG_C() bfin_read_PORTFIO_CLEAR()
153#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTFIO_CLEAR(val)
154#define bfin_read_FIO_FLAG_S() bfin_read_PORTFIO_SET()
155#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTFIO_SET(val)
156#define bfin_read_FIO_FLAG_T() bfin_read_PORTFIO_TOGGLE()
157#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTFIO_TOGGLE(val)
158#define bfin_read_FIO_MASKA_D() bfin_read_PORTFIO_MASKA()
159#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTFIO_MASKA(val)
160#define bfin_read_FIO_MASKA_C() bfin_read_PORTFIO_MASKA_CLEAR()
161#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTFIO_MASKA_CLEAR(val)
162#define bfin_read_FIO_MASKA_S() bfin_read_PORTFIO_MASKA_SET()
163#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTFIO_MASKA_SET(val)
164#define bfin_read_FIO_MASKA_T() bfin_read_PORTFIO_MASKA_TOGGLE()
165#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTFIO_MASKA_TOGGLE(val)
166#define bfin_read_FIO_MASKB_D() bfin_read_PORTFIO_MASKB()
167#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTFIO_MASKB(val)
168#define bfin_read_FIO_MASKB_C() bfin_read_PORTFIO_MASKB_CLEAR()
169#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTFIO_MASKB_CLEAR(val)
170#define bfin_read_FIO_MASKB_S() bfin_read_PORTFIO_MASKB_SET()
171#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTFIO_MASKB_SET(val)
172#define bfin_read_FIO_MASKB_T() bfin_read_PORTFIO_MASKB_TOGGLE()
173#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTFIO_MASKB_TOGGLE(val)
174#define bfin_read_FIO_DIR() bfin_read_PORTFIO_DIR()
175#define bfin_write_FIO_DIR(val) bfin_write_PORTFIO_DIR(val)
176#define bfin_read_FIO_POLAR() bfin_read_PORTFIO_POLAR()
177#define bfin_write_FIO_POLAR(val) bfin_write_PORTFIO_POLAR(val)
178#define bfin_read_FIO_EDGE() bfin_read_PORTFIO_EDGE()
179#define bfin_write_FIO_EDGE(val) bfin_write_PORTFIO_EDGE(val)
180#define bfin_read_FIO_BOTH() bfin_read_PORTFIO_BOTH()
181#define bfin_write_FIO_BOTH(val) bfin_write_PORTFIO_BOTH(val)
182#define bfin_read_FIO_INEN() bfin_read_PORTFIO_INEN()
183#define bfin_write_FIO_INEN(val) bfin_write_PORTFIO_INEN(val)
184
185#define bfin_read_FIO_FLAG_D() bfin_read_PORTFIO()
186#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTFIO(val)
187#define FIO_FLAG_D PORTFIO
188#define bfin_read_FIO_FLAG_C() bfin_read_PORTFIO_CLEAR()
189#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTFIO_CLEAR(val)
190#define FIO_FLAG_C PORTFIO_CLEAR
191#define bfin_read_FIO_FLAG_S() bfin_read_PORTFIO_SET()
192#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTFIO_SET(val)
193#define FIO_FLAG_S PORTFIO_SET
194#define bfin_read_FIO_FLAG_T() bfin_read_PORTFIO_TOGGLE()
195#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTFIO_TOGGLE(val)
196#define FIO_FLAG_T PORTFIO_TOGGLE
197#define bfin_read_FIO_MASKA_D() bfin_read_PORTFIO_MASKA()
198#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTFIO_MASKA(val)
199#define FIO_MASKA_D PORTFIO_MASKA
200#define bfin_read_FIO_MASKA_C() bfin_read_PORTFIO_MASKA_CLEAR()
201#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTFIO_MASKA_CLEAR(val)
202#define FIO_MASKA_C PORTFIO_MASKA_CLEAR
203#define bfin_read_FIO_MASKA_S() bfin_read_PORTFIO_MASKA_SET()
204#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTFIO_MASKA_SET(val)
205#define FIO_MASKA_S PORTFIO_MASKA_SET
206#define bfin_read_FIO_MASKA_T() bfin_read_PORTFIO_MASKA_TOGGLE()
207#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTFIO_MASKA_TOGGLE(val)
208#define FIO_MASKA_T PORTFIO_MASKA_TOGGLE
209#define bfin_read_FIO_MASKB_D() bfin_read_PORTFIO_MASKB()
210#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTFIO_MASKB(val)
211#define FIO_MASKB_D PORTFIO_MASKB
212#define bfin_read_FIO_MASKB_C() bfin_read_PORTFIO_MASKB_CLEAR()
213#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTFIO_MASKB_CLEAR(val)
214#define FIO_MASKB_C PORTFIO_MASKB_CLEAR
215#define bfin_read_FIO_MASKB_S() bfin_read_PORTFIO_MASKB_SET()
216#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTFIO_MASKB_SET(val)
217#define FIO_MASKB_S PORTFIO_MASKB_SET
218#define bfin_read_FIO_MASKB_T() bfin_read_PORTFIO_MASKB_TOGGLE()
219#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTFIO_MASKB_TOGGLE(val)
220#define FIO_MASKB_T PORTFIO_MASKB_TOGGLE
221#define bfin_read_FIO_DIR() bfin_read_PORTFIO_DIR()
222#define bfin_write_FIO_DIR(val) bfin_write_PORTFIO_DIR(val)
223#define FIO_DIR PORTFIO_DIR
224#define bfin_read_FIO_POLAR() bfin_read_PORTFIO_POLAR()
225#define bfin_write_FIO_POLAR(val) bfin_write_PORTFIO_POLAR(val)
226#define FIO_POLAR PORTFIO_POLAR
227#define bfin_read_FIO_EDGE() bfin_read_PORTFIO_EDGE()
228#define bfin_write_FIO_EDGE(val) bfin_write_PORTFIO_EDGE(val)
229#define FIO_EDGE PORTFIO_EDGE
230#define bfin_read_FIO_BOTH() bfin_read_PORTFIO_BOTH()
231#define bfin_write_FIO_BOTH(val) bfin_write_PORTFIO_BOTH(val)
232#define FIO_BOTH PORTFIO_BOTH
233#define bfin_read_FIO_INEN() bfin_read_PORTFIO_INEN()
234#define bfin_write_FIO_INEN(val) bfin_write_PORTFIO_INEN(val)
235#define FIO_INEN PORTFIO_INEN
236#endif
237
238/* FIO USE PORT G*/
239#ifdef CONFIG_BF537_PORT_G
240#define bfin_read_PORT_FER() bfin_read_PORTG_FER()
241#define bfin_write_PORT_FER(val) bfin_write_PORTG_FER(val)
242#define bfin_read_FIO_FLAG_D() bfin_read_PORTGIO()
243#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTGIO(val)
244#define bfin_read_FIO_FLAG_C() bfin_read_PORTGIO_CLEAR()
245#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTGIO_CLEAR(val)
246#define bfin_read_FIO_FLAG_S() bfin_read_PORTGIO_SET()
247#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTGIO_SET(val)
248#define bfin_read_FIO_FLAG_T() bfin_read_PORTGIO_TOGGLE()
249#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTGIO_TOGGLE(val)
250#define bfin_read_FIO_MASKA_D() bfin_read_PORTGIO_MASKA()
251#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTGIO_MASKA(val)
252#define bfin_read_FIO_MASKA_C() bfin_read_PORTGIO_MASKA_CLEAR()
253#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTGIO_MASKA_CLEAR(val)
254#define bfin_read_FIO_MASKA_S() bfin_read_PORTGIO_MASKA_SET()
255#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTGIO_MASKA_SET(val)
256#define bfin_read_FIO_MASKA_T() bfin_read_PORTGIO_MASKA_TOGGLE()
257#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTGIO_MASKA_TOGGLE(val)
258#define bfin_read_FIO_MASKB_D() bfin_read_PORTGIO_MASKB()
259#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTGIO_MASKB(val)
260#define bfin_read_FIO_MASKB_C() bfin_read_PORTGIO_MASKB_CLEAR()
261#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTGIO_MASKB_CLEAR(val)
262#define bfin_read_FIO_MASKB_S() bfin_read_PORTGIO_MASKB_SET()
263#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTGIO_MASKB_SET(val)
264#define bfin_read_FIO_MASKB_T() bfin_read_PORTGIO_MASKB_TOGGLE()
265#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTGIO_MASKB_TOGGLE(val)
266#define bfin_read_FIO_DIR() bfin_read_PORTGIO_DIR()
267#define bfin_write_FIO_DIR(val) bfin_write_PORTGIO_DIR(val)
268#define bfin_read_FIO_POLAR() bfin_read_PORTGIO_POLAR()
269#define bfin_write_FIO_POLAR(val) bfin_write_PORTGIO_POLAR(val)
270#define bfin_read_FIO_EDGE() bfin_read_PORTGIO_EDGE()
271#define bfin_write_FIO_EDGE(val) bfin_write_PORTGIO_EDGE(val)
272#define bfin_read_FIO_BOTH() bfin_read_PORTGIO_BOTH()
273#define bfin_write_FIO_BOTH(val) bfin_write_PORTGIO_BOTH(val)
274#define bfin_read_FIO_INEN() bfin_read_PORTGIO_INEN()
275#define bfin_write_FIO_INEN(val) bfin_write_PORTGIO_INEN(val)
276
277#define bfin_read_FIO_FLAG_D() bfin_read_PORTGIO()
278#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTGIO(val)
279#define FIO_FLAG_D PORTGIO
280#define bfin_read_FIO_FLAG_C() bfin_read_PORTGIO_CLEAR()
281#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTGIO_CLEAR(val)
282#define FIO_FLAG_C PORTGIO_CLEAR
283#define bfin_read_FIO_FLAG_S() bfin_read_PORTGIO_SET()
284#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTGIO_SET(val)
285#define FIO_FLAG_S PORTGIO_SET
286#define bfin_read_FIO_FLAG_T() bfin_read_PORTGIO_TOGGLE()
287#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTGIO_TOGGLE(val)
288#define FIO_FLAG_T PORTGIO_TOGGLE
289#define bfin_read_FIO_MASKA_D() bfin_read_PORTGIO_MASKA()
290#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTGIO_MASKA(val)
291#define FIO_MASKA_D PORTGIO_MASKA
292#define bfin_read_FIO_MASKA_C() bfin_read_PORTGIO_MASKA_CLEAR()
293#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTGIO_MASKA_CLEAR(val)
294#define FIO_MASKA_C PORTGIO_MASKA_CLEAR
295#define bfin_read_FIO_MASKA_S() bfin_read_PORTGIO_MASKA_SET()
296#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTGIO_MASKA_SET(val)
297#define FIO_MASKA_S PORTGIO_MASKA_SET
298#define bfin_read_FIO_MASKA_T() bfin_read_PORTGIO_MASKA_TOGGLE()
299#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTGIO_MASKA_TOGGLE(val)
300#define FIO_MASKA_T PORTGIO_MASKA_TOGGLE
301#define bfin_read_FIO_MASKB_D() bfin_read_PORTGIO_MASKB()
302#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTGIO_MASKB(val)
303#define FIO_MASKB_D PORTGIO_MASKB
304#define bfin_read_FIO_MASKB_C() bfin_read_PORTGIO_MASKB_CLEAR()
305#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTGIO_MASKB_CLEAR(val)
306#define FIO_MASKB_C PORTGIO_MASKB_CLEAR
307#define bfin_read_FIO_MASKB_S() bfin_read_PORTGIO_MASKB_SET()
308#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTGIO_MASKB_SET(val)
309#define FIO_MASKB_S PORTGIO_MASKB_SET
310#define bfin_read_FIO_MASKB_T() bfin_read_PORTGIO_MASKB_TOGGLE()
311#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTGIO_MASKB_TOGGLE(val)
312#define FIO_MASKB_T PORTGIO_MASKB_TOGGLE
313#define bfin_read_FIO_DIR() bfin_read_PORTGIO_DIR()
314#define bfin_write_FIO_DIR(val) bfin_write_PORTGIO_DIR(val)
315#define FIO_DIR PORTGIO_DIR
316#define bfin_read_FIO_POLAR() bfin_read_PORTGIO_POLAR()
317#define bfin_write_FIO_POLAR(val) bfin_write_PORTGIO_POLAR(val)
318#define FIO_POLAR PORTGIO_POLAR
319#define bfin_read_FIO_EDGE() bfin_read_PORTGIO_EDGE()
320#define bfin_write_FIO_EDGE(val) bfin_write_PORTGIO_EDGE(val)
321#define FIO_EDGE PORTGIO_EDGE
322#define bfin_read_FIO_BOTH() bfin_read_PORTGIO_BOTH()
323#define bfin_write_FIO_BOTH(val) bfin_write_PORTGIO_BOTH(val)
324#define FIO_BOTH PORTGIO_BOTH
325#define bfin_read_FIO_INEN() bfin_read_PORTGIO_INEN()
326#define bfin_write_FIO_INEN(val) bfin_write_PORTGIO_INEN(val)
327#define FIO_INEN PORTGIO_INEN
328
329#endif
330
331/* FIO USE PORT H*/
332#ifdef CONFIG_BF537_PORT_H
333#define bfin_read_PORT_FER() bfin_read_PORTH_FER()
334#define bfin_write_PORT_FER(val) bfin_write_PORTH_FER(val)
335#define bfin_read_FIO_FLAG_D() bfin_read_PORTHIO()
336#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTHIO(val)
337#define bfin_read_FIO_FLAG_C() bfin_read_PORTHIO_CLEAR()
338#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTHIO_CLEAR(val)
339#define bfin_read_FIO_FLAG_S() bfin_read_PORTHIO_SET()
340#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTHIO_SET(val)
341#define bfin_read_FIO_FLAG_T() bfin_read_PORTHIO_TOGGLE()
342#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTHIO_TOGGLE(val)
343#define bfin_read_FIO_MASKA_D() bfin_read_PORTHIO_MASKA()
344#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTHIO_MASKA(val)
345#define bfin_read_FIO_MASKA_C() bfin_read_PORTHIO_MASKA_CLEAR()
346#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTHIO_MASKA_CLEAR(val)
347#define bfin_read_FIO_MASKA_S() bfin_read_PORTHIO_MASKA_SET()
348#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTHIO_MASKA_SET(val)
349#define bfin_read_FIO_MASKA_T() bfin_read_PORTHIO_MASKA_TOGGLE()
350#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTHIO_MASKA_TOGGLE(val)
351#define bfin_read_FIO_MASKB_D() bfin_read_PORTHIO_MASKB()
352#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTHIO_MASKB(val)
353#define bfin_read_FIO_MASKB_C() bfin_read_PORTHIO_MASKB_CLEAR()
354#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTHIO_MASKB_CLEAR(val)
355#define bfin_read_FIO_MASKB_S() bfin_read_PORTHIO_MASKB_SET()
356#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTHIO_MASKB_SET(val)
357#define bfin_read_FIO_MASKB_T() bfin_read_PORTHIO_MASKB_TOGGLE()
358#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTHIO_MASKB_TOGGLE(val)
359#define bfin_read_FIO_DIR() bfin_read_PORTHIO_DIR()
360#define bfin_write_FIO_DIR(val) bfin_write_PORTHIO_DIR(val)
361#define bfin_read_FIO_POLAR() bfin_read_PORTHIO_POLAR()
362#define bfin_write_FIO_POLAR(val) bfin_write_PORTHIO_POLAR(val)
363#define bfin_read_FIO_EDGE() bfin_read_PORTHIO_EDGE()
364#define bfin_write_FIO_EDGE(val) bfin_write_PORTHIO_EDGE(val)
365#define bfin_read_FIO_BOTH() bfin_read_PORTHIO_BOTH()
366#define bfin_write_FIO_BOTH(val) bfin_write_PORTHIO_BOTH(val)
367#define bfin_read_FIO_INEN() bfin_read_PORTHIO_INEN()
368#define bfin_write_FIO_INEN(val) bfin_write_PORTHIO_INEN(val)
369
370#define bfin_read_FIO_FLAG_D() bfin_read_PORTHIO()
371#define bfin_write_FIO_FLAG_D(val) bfin_write_PORTHIO(val)
372#define FIO_FLAG_D PORTHIO
373#define bfin_read_FIO_FLAG_C() bfin_read_PORTHIO_CLEAR()
374#define bfin_write_FIO_FLAG_C(val) bfin_write_PORTHIO_CLEAR(val)
375#define FIO_FLAG_C PORTHIO_CLEAR
376#define bfin_read_FIO_FLAG_S() bfin_read_PORTHIO_SET()
377#define bfin_write_FIO_FLAG_S(val) bfin_write_PORTHIO_SET(val)
378#define FIO_FLAG_S PORTHIO_SET
379#define bfin_read_FIO_FLAG_T() bfin_read_PORTHIO_TOGGLE()
380#define bfin_write_FIO_FLAG_T(val) bfin_write_PORTHIO_TOGGLE(val)
381#define FIO_FLAG_T PORTHIO_TOGGLE
382#define bfin_read_FIO_MASKA_D() bfin_read_PORTHIO_MASKA()
383#define bfin_write_FIO_MASKA_D(val) bfin_write_PORTHIO_MASKA(val)
384#define FIO_MASKA_D PORTHIO_MASKA
385#define bfin_read_FIO_MASKA_C() bfin_read_PORTHIO_MASKA_CLEAR()
386#define bfin_write_FIO_MASKA_C(val) bfin_write_PORTHIO_MASKA_CLEAR(val)
387#define FIO_MASKA_C PORTHIO_MASKA_CLEAR
388#define bfin_read_FIO_MASKA_S() bfin_read_PORTHIO_MASKA_SET()
389#define bfin_write_FIO_MASKA_S(val) bfin_write_PORTHIO_MASKA_SET(val)
390#define FIO_MASKA_S PORTHIO_MASKA_SET
391#define bfin_read_FIO_MASKA_T() bfin_read_PORTHIO_MASKA_TOGGLE()
392#define bfin_write_FIO_MASKA_T(val) bfin_write_PORTHIO_MASKA_TOGGLE(val)
393#define FIO_MASKA_T PORTHIO_MASKA_TOGGLE
394#define bfin_read_FIO_MASKB_D() bfin_read_PORTHIO_MASKB()
395#define bfin_write_FIO_MASKB_D(val) bfin_write_PORTHIO_MASKB(val)
396#define FIO_MASKB_D PORTHIO_MASKB
397#define bfin_read_FIO_MASKB_C() bfin_read_PORTHIO_MASKB_CLEAR()
398#define bfin_write_FIO_MASKB_C(val) bfin_write_PORTHIO_MASKB_CLEAR(val)
399#define FIO_MASKB_C PORTHIO_MASKB_CLEAR
400#define bfin_read_FIO_MASKB_S() bfin_read_PORTHIO_MASKB_SET()
401#define bfin_write_FIO_MASKB_S(val) bfin_write_PORTHIO_MASKB_SET(val)
402#define FIO_MASKB_S PORTHIO_MASKB_SET
403#define bfin_read_FIO_MASKB_T() bfin_read_PORTHIO_MASKB_TOGGLE()
404#define bfin_write_FIO_MASKB_T(val) bfin_write_PORTHIO_MASKB_TOGGLE(val)
405#define FIO_MASKB_T PORTHIO_MASKB_TOGGLE
406#define bfin_read_FIO_DIR() bfin_read_PORTHIO_DIR()
407#define bfin_write_FIO_DIR(val) bfin_write_PORTHIO_DIR(val)
408#define FIO_DIR PORTHIO_DIR
409#define bfin_read_FIO_POLAR() bfin_read_PORTHIO_POLAR()
410#define bfin_write_FIO_POLAR(val) bfin_write_PORTHIO_POLAR(val)
411#define FIO_POLAR PORTHIO_POLAR
412#define bfin_read_FIO_EDGE() bfin_read_PORTHIO_EDGE()
413#define bfin_write_FIO_EDGE(val) bfin_write_PORTHIO_EDGE(val)
414#define FIO_EDGE PORTHIO_EDGE
415#define bfin_read_FIO_BOTH() bfin_read_PORTHIO_BOTH()
416#define bfin_write_FIO_BOTH(val) bfin_write_PORTHIO_BOTH(val)
417#define FIO_BOTH PORTHIO_BOTH
418#define bfin_read_FIO_INEN() bfin_read_PORTHIO_INEN()
419#define bfin_write_FIO_INEN(val) bfin_write_PORTHIO_INEN(val)
420#define FIO_INEN PORTHIO_INEN
421
422#endif
423
424/* PLL_DIV Masks */ 146/* PLL_DIV Masks */
425#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ 147#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
426#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ 148#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 84e58fa73dce..78227bc855df 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -32,6 +32,8 @@
32#ifndef _CDEF_BF534_H 32#ifndef _CDEF_BF534_H
33#define _CDEF_BF534_H 33#define _CDEF_BF534_H
34 34
35#include <asm/blackfin.h>
36
35/* Include all Core registers and bit definitions */ 37/* Include all Core registers and bit definitions */
36#include "defBF534.h" 38#include "defBF534.h"
37 39
@@ -57,7 +59,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
57 bfin_write32(SIC_IWR, IWR_ENABLE(0)); 59 bfin_write32(SIC_IWR, IWR_ENABLE(0));
58 60
59 bfin_write16(VR_CTL, val); 61 bfin_write16(VR_CTL, val);
60 __builtin_bfin_ssync(); 62 SSYNC();
61 63
62 local_irq_save(flags); 64 local_irq_save(flags);
63 asm("IDLE;"); 65 asm("IDLE;");
diff --git a/include/asm-blackfin/mach-bf537/defBF534.h b/include/asm-blackfin/mach-bf537/defBF534.h
index 1859f2fee5a7..d0d80d3152ba 100644
--- a/include/asm-blackfin/mach-bf537/defBF534.h
+++ b/include/asm-blackfin/mach-bf537/defBF534.h
@@ -86,6 +86,7 @@
86#define UART0_GCTL 0xFFC00424 /* Global Control Register */ 86#define UART0_GCTL 0xFFC00424 /* Global Control Register */
87 87
88/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 88/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
89#define SPI0_REGBASE 0xFFC00500
89#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 90#define SPI_CTL 0xFFC00500 /* SPI Control Register */
90#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 91#define SPI_FLG 0xFFC00504 /* SPI Flag register */
91#define SPI_STAT 0xFFC00508 /* SPI Status register */ 92#define SPI_STAT 0xFFC00508 /* SPI Status register */
@@ -456,6 +457,7 @@
456#define PPI_FRAME 0xFFC01010 /* PPI Frame Length Register */ 457#define PPI_FRAME 0xFFC01010 /* PPI Frame Length Register */
457 458
458/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ 459/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
460#define TWI0_REGBASE 0xFFC01400
459#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ 461#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */
460#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */ 462#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */
461#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */ 463#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */
@@ -1165,7 +1167,7 @@
1165#define GM 0x0008 /* Get More (When RDBR Full, Overwrite/Discard*) */ 1167#define GM 0x0008 /* Get More (When RDBR Full, Overwrite/Discard*) */
1166#define PSSE 0x0010 /* Slave-Select Input Enable */ 1168#define PSSE 0x0010 /* Slave-Select Input Enable */
1167#define EMISO 0x0020 /* Enable MISO As Output */ 1169#define EMISO 0x0020 /* Enable MISO As Output */
1168#define SPI_SIZE 0x0100 /* Size of Words (16/8* Bits) */ 1170#define SIZE 0x0100 /* Size of Words (16/8* Bits) */
1169#define LSBF 0x0200 /* LSB First */ 1171#define LSBF 0x0200 /* LSB First */
1170#define CPHA 0x0400 /* Clock Phase */ 1172#define CPHA 0x0400 /* Clock Phase */
1171#define CPOL 0x0800 /* Clock Polarity */ 1173#define CPOL 0x0800 /* Clock Polarity */
diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h
index 8af2a832ef6b..36c44bc1a917 100644
--- a/include/asm-blackfin/mach-bf537/irq.h
+++ b/include/asm-blackfin/mach-bf537/irq.h
@@ -160,6 +160,8 @@ Core Emulation **
160#define IRQ_PH14 96 160#define IRQ_PH14 96
161#define IRQ_PH15 97 161#define IRQ_PH15 97
162 162
163#define GPIO_IRQ_BASE IRQ_PF0
164
163#ifdef CONFIG_IRQCHIP_DEMUX_GPIO 165#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
164#define NR_IRQS (IRQ_PH15+1) 166#define NR_IRQS (IRQ_PH15+1)
165#else 167#else
diff --git a/include/asm-blackfin/mach-bf537/mem_map.h b/include/asm-blackfin/mach-bf537/mem_map.h
index 2a808c1202bf..18759e38eaae 100644
--- a/include/asm-blackfin/mach-bf537/mem_map.h
+++ b/include/asm-blackfin/mach-bf537/mem_map.h
@@ -52,10 +52,10 @@
52 52
53/* Memory Map for ADSP-BF537 processors */ 53/* Memory Map for ADSP-BF537 processors */
54 54
55#ifdef CONFIG_BLKFIN_CACHE 55#ifdef CONFIG_BFIN_ICACHE
56#define BLKFIN_ICACHESIZE (16*1024) 56#define BFIN_ICACHESIZE (16*1024)
57#else 57#else
58#define BLKFIN_ICACHESIZE (0*1024) 58#define BFIN_ICACHESIZE (0*1024)
59#endif 59#endif
60 60
61 61
@@ -66,29 +66,29 @@
66 66
67#define L1_CODE_LENGTH 0xC000 67#define L1_CODE_LENGTH 0xC000
68 68
69#ifdef CONFIG_BLKFIN_DCACHE 69#ifdef CONFIG_BFIN_DCACHE
70 70
71#ifdef CONFIG_BLKFIN_DCACHE_BANKA 71#ifdef CONFIG_BFIN_DCACHE_BANKA
72#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 72#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
73#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 73#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
74#define L1_DATA_B_LENGTH 0x8000 74#define L1_DATA_B_LENGTH 0x8000
75#define BLKFIN_DCACHESIZE (16*1024) 75#define BFIN_DCACHESIZE (16*1024)
76#define BLKFIN_DSUPBANKS 1 76#define BFIN_DSUPBANKS 1
77#else 77#else
78#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 78#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
79#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 79#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
80#define L1_DATA_B_LENGTH (0x8000 - 0x4000) 80#define L1_DATA_B_LENGTH (0x8000 - 0x4000)
81#define BLKFIN_DCACHESIZE (32*1024) 81#define BFIN_DCACHESIZE (32*1024)
82#define BLKFIN_DSUPBANKS 2 82#define BFIN_DSUPBANKS 2
83#endif 83#endif
84 84
85#else 85#else
86#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 86#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
87#define L1_DATA_A_LENGTH 0x8000 87#define L1_DATA_A_LENGTH 0x8000
88#define L1_DATA_B_LENGTH 0x8000 88#define L1_DATA_B_LENGTH 0x8000
89#define BLKFIN_DCACHESIZE (0*1024) 89#define BFIN_DCACHESIZE (0*1024)
90#define BLKFIN_DSUPBANKS 0 90#define BFIN_DSUPBANKS 0
91#endif /*CONFIG_BLKFIN_DCACHE*/ 91#endif /*CONFIG_BFIN_DCACHE*/
92 92
93#endif /*CONFIG_BF537*/ 93#endif /*CONFIG_BF537*/
94 94
@@ -102,30 +102,30 @@
102#define L1_CODE_LENGTH 0xC000 102#define L1_CODE_LENGTH 0xC000
103 103
104 104
105#ifdef CONFIG_BLKFIN_DCACHE 105#ifdef CONFIG_BFIN_DCACHE
106 106
107#ifdef CONFIG_BLKFIN_DCACHE_BANKA 107#ifdef CONFIG_BFIN_DCACHE_BANKA
108#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 108#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
109#define L1_DATA_A_LENGTH (0x4000 - 0x4000) 109#define L1_DATA_A_LENGTH (0x4000 - 0x4000)
110#define L1_DATA_B_LENGTH 0x4000 110#define L1_DATA_B_LENGTH 0x4000
111#define BLKFIN_DCACHESIZE (16*1024) 111#define BFIN_DCACHESIZE (16*1024)
112#define BLKFIN_DSUPBANKS 1 112#define BFIN_DSUPBANKS 1
113 113
114#else 114#else
115#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 115#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
116#define L1_DATA_A_LENGTH (0x4000 - 0x4000) 116#define L1_DATA_A_LENGTH (0x4000 - 0x4000)
117#define L1_DATA_B_LENGTH (0x4000 - 0x4000) 117#define L1_DATA_B_LENGTH (0x4000 - 0x4000)
118#define BLKFIN_DCACHESIZE (32*1024) 118#define BFIN_DCACHESIZE (32*1024)
119#define BLKFIN_DSUPBANKS 2 119#define BFIN_DSUPBANKS 2
120#endif 120#endif
121 121
122#else 122#else
123#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 123#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
124#define L1_DATA_A_LENGTH 0x4000 124#define L1_DATA_A_LENGTH 0x4000
125#define L1_DATA_B_LENGTH 0x4000 125#define L1_DATA_B_LENGTH 0x4000
126#define BLKFIN_DCACHESIZE (0*1024) 126#define BFIN_DCACHESIZE (0*1024)
127#define BLKFIN_DSUPBANKS 0 127#define BFIN_DSUPBANKS 0
128#endif /*CONFIG_BLKFIN_DCACHE*/ 128#endif /*CONFIG_BFIN_DCACHE*/
129 129
130#endif 130#endif
131 131
@@ -138,30 +138,30 @@
138 138
139#define L1_CODE_LENGTH 0xC000 139#define L1_CODE_LENGTH 0xC000
140 140
141#ifdef CONFIG_BLKFIN_DCACHE 141#ifdef CONFIG_BFIN_DCACHE
142 142
143#ifdef CONFIG_BLKFIN_DCACHE_BANKA 143#ifdef CONFIG_BFIN_DCACHE_BANKA
144#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 144#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
145#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 145#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
146#define L1_DATA_B_LENGTH 0x8000 146#define L1_DATA_B_LENGTH 0x8000
147#define BLKFIN_DCACHESIZE (16*1024) 147#define BFIN_DCACHESIZE (16*1024)
148#define BLKFIN_DSUPBANKS 1 148#define BFIN_DSUPBANKS 1
149 149
150#else 150#else
151#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 151#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
152#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 152#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
153#define L1_DATA_B_LENGTH (0x8000 - 0x4000) 153#define L1_DATA_B_LENGTH (0x8000 - 0x4000)
154#define BLKFIN_DCACHESIZE (32*1024) 154#define BFIN_DCACHESIZE (32*1024)
155#define BLKFIN_DSUPBANKS 2 155#define BFIN_DSUPBANKS 2
156#endif 156#endif
157 157
158#else 158#else
159#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 159#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
160#define L1_DATA_A_LENGTH 0x8000 160#define L1_DATA_A_LENGTH 0x8000
161#define L1_DATA_B_LENGTH 0x8000 161#define L1_DATA_B_LENGTH 0x8000
162#define BLKFIN_DCACHESIZE (0*1024) 162#define BFIN_DCACHESIZE (0*1024)
163#define BLKFIN_DSUPBANKS 0 163#define BFIN_DSUPBANKS 0
164#endif /*CONFIG_BLKFIN_DCACHE*/ 164#endif /*CONFIG_BFIN_DCACHE*/
165 165
166#endif 166#endif
167 167
diff --git a/include/asm-blackfin/mach-bf537/portmux.h b/include/asm-blackfin/mach-bf537/portmux.h
index ae6c53b28452..5a3f7d3bf73d 100644
--- a/include/asm-blackfin/mach-bf537/portmux.h
+++ b/include/asm-blackfin/mach-bf537/portmux.h
@@ -99,7 +99,7 @@
99#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(PORT_PJ8) | P_FUNCT(0)) 99#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(PORT_PJ8) | P_FUNCT(0))
100#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(PORT_PJ9) | P_FUNCT(0)) 100#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(PORT_PJ9) | P_FUNCT(0))
101#define P_SPORT0_TFS (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(0)) 101#define P_SPORT0_TFS (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(0))
102#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1)) 102#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(0))
103#define P_CAN0_RX (P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(1)) 103#define P_CAN0_RX (P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(1))
104#define P_CAN0_TX (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(1)) 104#define P_CAN0_TX (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(1))
105#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(1)) 105#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(1))
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h
index aca1d4ba145c..c5b63759cdee 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/include/asm-blackfin/mach-bf548/anomaly.h
@@ -1,74 +1,85 @@
1
2/* 1/*
3 * File: include/asm-blackfin/mach-bf548/anomaly.h 2 * File: include/asm-blackfin/mach-bf548/anomaly.h
4 * Based on: 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
5 * Author:
6 *
7 * Created:
8 * Description:
9 *
10 * Rev:
11 *
12 * Modified:
13 *
14 *
15 * Bugs: Enter bugs at http://blackfin.uclinux.org/
16 * 4 *
17 * This program is free software; you can redistribute it and/or modify 5 * Copyright (C) 2004-2007 Analog Devices Inc.
18 * it under the terms of the GNU General Public License as published by 6 * Licensed under the GPL-2 or later.
19 * the Free Software Foundation; either version 2, or (at your option) 7 */
20 * any later version. 8
21 * 9/* This file shoule be up to date with:
22 * This program is distributed in the hope that it will be useful, 10 * - Revision C, July 16, 2007; ADSP-BF549 Silicon Anomaly List
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; see the file COPYING.
29 * If not, write to the Free Software Foundation,
30 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 */ 11 */
32 12
33#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
34#define _MACH_ANOMALY_H_ 14#define _MACH_ANOMALY_H_
35#define ANOMALY_05000074 /* A multi issue instruction with dsp32shiftimm in
36 slot1 and store of a P register in slot 2 is not
37 supported */
38#define ANOMALY_05000119 /* DMA_RUN bit is not valid after a Peripheral Receive
39 Channel DMA stops */
40#define ANOMALY_05000122 /* Rx.H can not be used to access 16-bit System MMR
41 registers. */
42#define ANOMALY_05000245 /* Spurious Hardware Error from an Access in the
43 Shadow of a Conditional Branch */
44#define ANOMALY_05000255 /* Entering Hibernate Mode with RTC Seconds event
45 interrupt not functional */
46#define ANOMALY_05000265 /* Sensitivity to noise with slow input edge rates on
47 SPORT external receive and transmit clocks. */
48#define ANOMALY_05000272 /* Certain data cache write through modes fail for
49 VDDint <=0.9V */
50#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context is
51 not restored */
52#define ANOMALY_05000310 /* False Hardware Errors Caused by Fetches at the
53 Boundary of Reserved Memory */
54#define ANOMALY_05000312 /* Errors When SSYNC, CSYNC, or Loads to LT, LB and
55 LC Registers Are Interrupted */
56#define ANOMALY_05000324 /* TWI Slave Boot Mode Is Not Functional */
57#define ANOMALY_05000325 /* External FIFO Boot Mode Is Not Functional */
58#define ANOMALY_05000327 /* Data Lost When Core and DMA Accesses Are Made to
59 the USB FIFO Simultaneously */
60#define ANOMALY_05000328 /* Incorrect Access of OTP_STATUS During otp_write()
61 function */
62#define ANOMALY_05000329 /* Synchronous Burst Flash Boot Mode Is Not Functional
63 */
64#define ANOMALY_05000330 /* Host DMA Boot Mode Is Not Functional */
65#define ANOMALY_05000334 /* Inadequate Timing Margins on DDR DQS to DQ and DQM
66 Skew */
67#define ANOMALY_05000335 /* Inadequate Rotary Debounce Logic Duration */
68#define ANOMALY_05000336 /* Phantom Interrupt Occurs After First Configuration
69 of Host DMA Port */
70#define ANOMALY_05000337 /* Disallowed Configuration Prevents Subsequent
71 Allowed Configuration on Host DMA Port */
72#define ANOMALY_05000338 /* Slave-Mode SPI0 MISO Failure With CPHA = 0 */
73 15
74#endif /* _MACH_ANOMALY_H_ */ 16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */
17#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
19#define ANOMALY_05000119 (1)
20/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
21#define ANOMALY_05000122 (1)
22/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
23#define ANOMALY_05000245 (1)
24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
25#define ANOMALY_05000265 (1)
26/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
27#define ANOMALY_05000272 (1)
28/* False Hardware Error Exception when ISR context is not restored */
29#define ANOMALY_05000281 (1)
30/* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
31#define ANOMALY_05000304 (1)
32/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
33#define ANOMALY_05000310 (1)
34/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
35#define ANOMALY_05000312 (1)
36/* TWI Slave Boot Mode Is Not Functional */
37#define ANOMALY_05000324 (1)
38/* External FIFO Boot Mode Is Not Functional */
39#define ANOMALY_05000325 (1)
40/* Data Lost When Core and DMA Accesses Are Made to the USB FIFO Simultaneously */
41#define ANOMALY_05000327 (1)
42/* Incorrect Access of OTP_STATUS During otp_write() Function */
43#define ANOMALY_05000328 (1)
44/* Synchronous Burst Flash Boot Mode Is Not Functional */
45#define ANOMALY_05000329 (1)
46/* Host DMA Boot Mode Is Not Functional */
47#define ANOMALY_05000330 (1)
48/* Inadequate Timing Margins on DDR DQS to DQ and DQM Skew */
49#define ANOMALY_05000334 (1)
50/* Inadequate Rotary Debounce Logic Duration */
51#define ANOMALY_05000335 (1)
52/* Phantom Interrupt Occurs After First Configuration of Host DMA Port */
53#define ANOMALY_05000336 (1)
54/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
55#define ANOMALY_05000337 (1)
56/* Slave-Mode SPI0 MISO Failure With CPHA = 0 */
57#define ANOMALY_05000338 (1)
58/* If Memory Reads Are Enabled on SDH or HOSTDP, Other DMAC1 Peripherals Cannot Read */
59#define ANOMALY_05000340 (1)
60/* Boot Host Wait (HWAIT) and Boot Host Wait Alternate (HWAITA) Signals Are Swapped */
61#define ANOMALY_05000344 (1)
62/* USB Calibration Value Is Not Intialized */
63#define ANOMALY_05000346 (1)
64/* Boot ROM Kernel Incorrectly Alters Reset Value of USB Register */
65#define ANOMALY_05000347 (1)
66/* Data Lost when Core Reads SDH Data FIFO */
67#define ANOMALY_05000349 (1)
68/* PLL Status Register Is Inaccurate */
69#define ANOMALY_05000351 (1)
70
71/* Anomalies that don't exist on this proc */
72#define ANOMALY_05000125 (0)
73#define ANOMALY_05000158 (0)
74#define ANOMALY_05000183 (0)
75#define ANOMALY_05000198 (0)
76#define ANOMALY_05000230 (0)
77#define ANOMALY_05000244 (0)
78#define ANOMALY_05000261 (0)
79#define ANOMALY_05000263 (0)
80#define ANOMALY_05000266 (0)
81#define ANOMALY_05000273 (0)
82#define ANOMALY_05000311 (0)
83#define ANOMALY_05000323 (0)
84
85#endif
diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h
index 9498313a2cb7..7e6d349beb08 100644
--- a/include/asm-blackfin/mach-bf548/bf548.h
+++ b/include/asm-blackfin/mach-bf548/bf548.h
@@ -52,12 +52,12 @@
52/***************************/ 52/***************************/
53 53
54 54
55#define BLKFIN_DSUBBANKS 4 55#define BFIN_DSUBBANKS 4
56#define BLKFIN_DWAYS 2 56#define BFIN_DWAYS 2
57#define BLKFIN_DLINES 64 57#define BFIN_DLINES 64
58#define BLKFIN_ISUBBANKS 4 58#define BFIN_ISUBBANKS 4
59#define BLKFIN_IWAYS 4 59#define BFIN_IWAYS 4
60#define BLKFIN_ILINES 32 60#define BFIN_ILINES 32
61 61
62#define WAY0_L 0x1 62#define WAY0_L 0x1
63#define WAY1_L 0x2 63#define WAY1_L 0x2
@@ -106,93 +106,6 @@
106 106
107#define AMGCTLVAL (V_AMBEN | V_AMCKEN) 107#define AMGCTLVAL (V_AMBEN | V_AMCKEN)
108 108
109#define MAX_VC 650000000
110#define MIN_VC 50000000
111
112/********************************PLL Settings **************************************/
113#ifdef CONFIG_BFIN_KERNEL_CLOCK
114#if (CONFIG_VCO_MULT < 0)
115#error "VCO Multiplier is less than 0. Please select a different value"
116#endif
117
118#if (CONFIG_VCO_MULT == 0)
119#error "VCO Multiplier should be greater than 0. Please select a different value"
120#endif
121
122#if (CONFIG_VCO_MULT > 64)
123#error "VCO Multiplier is more than 64. Please select a different value"
124#endif
125
126#ifndef CONFIG_CLKIN_HALF
127#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
128#else
129#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
130#endif
131
132#ifndef CONFIG_PLL_BYPASS
133#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
134#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
135#else
136#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
137#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
138#endif
139
140#if (CONFIG_SCLK_DIV < 1)
141#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
142#endif
143
144#if (CONFIG_SCLK_DIV > 15)
145#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
146#endif
147
148#if (CONFIG_CCLK_DIV != 1)
149#if (CONFIG_CCLK_DIV != 2)
150#if (CONFIG_CCLK_DIV != 4)
151#if (CONFIG_CCLK_DIV != 8)
152#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value"
153#endif
154#endif
155#endif
156#endif
157
158#if (CONFIG_VCO_HZ > MAX_VC)
159#error "VCO selected is more than maximum value. Please change the VCO multipler"
160#endif
161
162#if (CONFIG_SCLK_HZ > 133000000)
163#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
164#endif
165
166#if (CONFIG_SCLK_HZ < 27000000)
167#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
168#endif
169
170#if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ)
171#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ)
172#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
173#error "Please select sclk less than cclk"
174#endif
175#endif
176#endif
177
178#if (CONFIG_CCLK_DIV == 1)
179#define CONFIG_CCLK_ACT_DIV CCLK_DIV1
180#endif
181#if (CONFIG_CCLK_DIV == 2)
182#define CONFIG_CCLK_ACT_DIV CCLK_DIV2
183#endif
184#if (CONFIG_CCLK_DIV == 4)
185#define CONFIG_CCLK_ACT_DIV CCLK_DIV4
186#endif
187#if (CONFIG_CCLK_DIV == 8)
188#define CONFIG_CCLK_ACT_DIV CCLK_DIV8
189#endif
190#ifndef CONFIG_CCLK_ACT_DIV
191#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly
192#endif
193
194#endif /* CONFIG_BFIN_KERNEL_CLOCK */
195
196#ifdef CONFIG_BF542 109#ifdef CONFIG_BF542
197#define CPU "BF542" 110#define CPU "BF542"
198#define CPUID 0x027c8000 111#define CPUID 0x027c8000
@@ -213,59 +126,4 @@
213#define CPUID 0x0 126#define CPUID 0x0
214#endif 127#endif
215 128
216#if (CONFIG_MEM_SIZE % 4)
217#error "SDRAM mem size must be multible of 4MB"
218#endif
219
220#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
221#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
222#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
223#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
224
225/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/
226
227#define ANOMALY_05000158_WORKAROUND 0x200
228#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */
229#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_DIRTY \
230 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
231#else /*Write Through */
232#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW \
233 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
234#endif
235
236
237#define L1_DMEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY )
238#define SDRAM_DNON_CHBL (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
239#define SDRAM_EBIU (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY )
240#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY )
241
242#define SIZE_1K 0x00000400 /* 1K */
243#define SIZE_4K 0x00001000 /* 4K */
244#define SIZE_1M 0x00100000 /* 1M */
245#define SIZE_4M 0x00400000 /* 4M */
246
247#define MAX_CPLBS (16 * 2)
248
249/*
250* Number of required data CPLB switchtable entries
251* MEMSIZE / 4 (we mostly install 4M page size CPLBs
252* approx 16 for smaller 1MB page size CPLBs for allignment purposes
253* 1 for L1 Data Memory
254* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
255* 1 for ASYNC Memory
256*/
257
258
259#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1) * 2)
260
261/*
262* Number of required instruction CPLB switchtable entries
263* MEMSIZE / 4 (we mostly install 4M page size CPLBs
264* approx 12 for smaller 1MB page size CPLBs for allignment purposes
265* 1 for L1 Instruction Memory
266* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
267*/
268
269#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1) * 2)
270
271#endif /* __MACH_BF48_H__ */ 129#endif /* __MACH_BF48_H__ */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 2f4afc90db11..f21a1620e6bd 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -1,5 +1,6 @@
1#include <linux/serial.h> 1#include <linux/serial.h>
2#include <asm/dma.h> 2#include <asm/dma.h>
3#include <asm/portmux.h>
3 4
4#define NR_PORTS 4 5#define NR_PORTS 4
5 6
@@ -143,50 +144,48 @@ struct bfin_serial_res bfin_serial_resource[] = {
143 144
144int nr_ports = ARRAY_SIZE(bfin_serial_resource); 145int nr_ports = ARRAY_SIZE(bfin_serial_resource);
145 146
147#define DRIVER_NAME "bfin-uart"
148
146static void bfin_serial_hw_init(struct bfin_serial_port *uart) 149static void bfin_serial_hw_init(struct bfin_serial_port *uart)
147{ 150{
148#ifdef CONFIG_SERIAL_BFIN_UART0 151#ifdef CONFIG_SERIAL_BFIN_UART0
149 /* Enable UART0 RX and TX on pin 7 & 8 of PORT E */ 152 peripheral_request(P_UART0_TX, DRIVER_NAME);
150 bfin_write_PORTE_FER(0x180 | bfin_read_PORTE_FER()); 153 peripheral_request(P_UART0_RX, DRIVER_NAME);
151 bfin_write_PORTE_MUX(0x3C000 | bfin_read_PORTE_MUX());
152#endif 154#endif
153 155
154#ifdef CONFIG_SERIAL_BFIN_UART1 156#ifdef CONFIG_SERIAL_BFIN_UART1
155 /* Enable UART1 RX and TX on pin 0 & 1 of PORT H */ 157 peripheral_request(P_UART1_TX, DRIVER_NAME);
156 bfin_write_PORTH_FER(0x3 | bfin_read_PORTH_FER()); 158 peripheral_request(P_UART1_RX, DRIVER_NAME);
157 bfin_write_PORTH_MUX(~0xF & bfin_read_PORTH_MUX()); 159
158#ifdef CONFIG_BFIN_UART1_CTSRTS 160#ifdef CONFIG_BFIN_UART1_CTSRTS
159 /* Enable UART1 RTS and CTS on pin 9 & 10 of PORT E */ 161 peripheral_request(P_UART1_RTS, DRIVER_NAME);
160 bfin_write_PORTE_FER(0x600 | bfin_read_PORTE_FER()); 162 peripheral_request(P_UART1_CTS DRIVER_NAME);
161 bfin_write_PORTE_MUX(~0x3C0000 & bfin_read_PORTE_MUX());
162#endif 163#endif
163#endif 164#endif
164 165
165#ifdef CONFIG_SERIAL_BFIN_UART2 166#ifdef CONFIG_SERIAL_BFIN_UART2
166 /* Enable UART2 RX and TX on pin 4 & 5 of PORT B */ 167 peripheral_request(P_UART2_TX, DRIVER_NAME);
167 bfin_write_PORTB_FER(0x30 | bfin_read_PORTB_FER()); 168 peripheral_request(P_UART2_RX, DRIVER_NAME);
168 bfin_write_PORTB_MUX(~0xF00 & bfin_read_PORTB_MUX());
169#endif 169#endif
170 170
171#ifdef CONFIG_SERIAL_BFIN_UART3 171#ifdef CONFIG_SERIAL_BFIN_UART3
172 /* Enable UART3 RX and TX on pin 6 & 7 of PORT B */ 172 peripheral_request(P_UART3_TX, DRIVER_NAME);
173 bfin_write_PORTB_FER(0xC0 | bfin_read_PORTB_FER()); 173 peripheral_request(P_UART3_RX, DRIVER_NAME);
174 bfin_write_PORTB_MUX(~0xF000 | bfin_read_PORTB_MUX()); 174
175#ifdef CONFIG_BFIN_UART3_CTSRTS 175#ifdef CONFIG_BFIN_UART3_CTSRTS
176 /* Enable UART3 RTS and CTS on pin 2 & 3 of PORT B */ 176 peripheral_request(P_UART3_RTS, DRIVER_NAME);
177 bfin_write_PORTB_FER(0xC | bfin_read_PORTB_FER()); 177 peripheral_request(P_UART3_CTS DRIVER_NAME);
178 bfin_write_PORTB_MUX(~0xF0 | bfin_read_PORTB_MUX());
179#endif 178#endif
180#endif 179#endif
181 SSYNC(); 180 SSYNC();
182#ifdef CONFIG_SERIAL_BFIN_CTSRTS 181#ifdef CONFIG_SERIAL_BFIN_CTSRTS
183 if (uart->cts_pin >= 0) { 182 if (uart->cts_pin >= 0) {
184 gpio_request(uart->cts_pin, NULL); 183 gpio_request(uart->cts_pin, DRIVER_NAME);
185 gpio_direction_input(uart->cts_pin); 184 gpio_direction_input(uart->cts_pin);
186 } 185 }
187 186
188 if (uart->rts_pin >= 0) { 187 if (uart->rts_pin >= 0) {
189 gpio_request(uart->rts_pin, NULL); 188 gpio_request(uart->rts_pin, DRIVER_NAME);
190 gpio_direction_output(uart->rts_pin); 189 gpio_direction_output(uart->rts_pin);
191 } 190 }
192#endif 191#endif
diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h
index 791218fe7d94..19e84dd4c99c 100644
--- a/include/asm-blackfin/mach-bf548/blackfin.h
+++ b/include/asm-blackfin/mach-bf548/blackfin.h
@@ -54,7 +54,7 @@
54#include "defBF549.h" 54#include "defBF549.h"
55#endif 55#endif
56 56
57#if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) 57#if !defined(__ASSEMBLY__)
58#ifdef CONFIG_BF542 58#ifdef CONFIG_BF542
59#include "cdefBF542.h" 59#include "cdefBF542.h"
60#endif 60#endif
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
index cdf29e75ea59..aefab3f618c1 100644
--- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h
@@ -31,6 +31,8 @@
31#ifndef _CDEF_BF54X_H 31#ifndef _CDEF_BF54X_H
32#define _CDEF_BF54X_H 32#define _CDEF_BF54X_H
33 33
34#include <asm/blackfin.h>
35
34#include "defBF54x_base.h" 36#include "defBF54x_base.h"
35#include <asm/system.h> 37#include <asm/system.h>
36 38
@@ -60,7 +62,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
60 bfin_write32(SIC_IWR2, 0); 62 bfin_write32(SIC_IWR2, 0);
61 63
62 bfin_write16(VR_CTL, val); 64 bfin_write16(VR_CTL, val);
63 __builtin_bfin_ssync(); 65 SSYNC();
64 66
65 local_irq_save(flags); 67 local_irq_save(flags);
66 asm("IDLE;"); 68 asm("IDLE;");
diff --git a/include/asm-blackfin/mach-bf548/defBF544.h b/include/asm-blackfin/mach-bf548/defBF544.h
index dd955dcd39b8..760307e34b9e 100644
--- a/include/asm-blackfin/mach-bf548/defBF544.h
+++ b/include/asm-blackfin/mach-bf548/defBF544.h
@@ -81,6 +81,7 @@
81 81
82/* Two Wire Interface Registers (TWI1) */ 82/* Two Wire Interface Registers (TWI1) */
83 83
84#define TWI1_REGBASE 0xffc02200
84#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ 85#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */
85#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ 86#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */
86#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ 87#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */
diff --git a/include/asm-blackfin/mach-bf548/defBF548.h b/include/asm-blackfin/mach-bf548/defBF548.h
index 8d4214e0807c..70af33c963b0 100644
--- a/include/asm-blackfin/mach-bf548/defBF548.h
+++ b/include/asm-blackfin/mach-bf548/defBF548.h
@@ -120,6 +120,7 @@
120 120
121/* Two Wire Interface Registers (TWI1) */ 121/* Two Wire Interface Registers (TWI1) */
122 122
123#define TWI1_REGBASE 0xffc02200
123#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ 124#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */
124#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ 125#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */
125#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ 126#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */
@@ -139,6 +140,7 @@
139 140
140/* SPI2 Registers */ 141/* SPI2 Registers */
141 142
143#define SPI2_REGBASE 0xffc02400
142#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ 144#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */
143#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ 145#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */
144#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ 146#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */
diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h
index c2f4734da48d..50b3fe55ef0c 100644
--- a/include/asm-blackfin/mach-bf548/defBF549.h
+++ b/include/asm-blackfin/mach-bf548/defBF549.h
@@ -121,6 +121,7 @@
121 121
122/* Two Wire Interface Registers (TWI1) */ 122/* Two Wire Interface Registers (TWI1) */
123 123
124#define TWI1_REGBASE 0xffc02200
124#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ 125#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */
125#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ 126#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */
126#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ 127#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */
@@ -140,6 +141,7 @@
140 141
141/* SPI2 Registers */ 142/* SPI2 Registers */
142 143
144#define SPI2_REGBASE 0xffc02400
143#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ 145#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */
144#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ 146#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */
145#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ 147#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index 895ddd40a838..e2632db74baa 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -109,6 +109,7 @@
109 109
110/* SPI0 Registers */ 110/* SPI0 Registers */
111 111
112#define SPI0_REGBASE 0xffc00500
112#define SPI0_CTL 0xffc00500 /* SPI0 Control Register */ 113#define SPI0_CTL 0xffc00500 /* SPI0 Control Register */
113#define SPI0_FLG 0xffc00504 /* SPI0 Flag Register */ 114#define SPI0_FLG 0xffc00504 /* SPI0 Flag Register */
114#define SPI0_STAT 0xffc00508 /* SPI0 Status Register */ 115#define SPI0_STAT 0xffc00508 /* SPI0 Status Register */
@@ -121,6 +122,7 @@
121 122
122/* Two Wire Interface Registers (TWI0) */ 123/* Two Wire Interface Registers (TWI0) */
123 124
125#define TWI0_REGBASE 0xffc00700
124#define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */ 126#define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */
125#define TWI0_CONTROL 0xffc00704 /* TWI Control Register */ 127#define TWI0_CONTROL 0xffc00704 /* TWI Control Register */
126#define TWI0_SLAVE_CTRL 0xffc00708 /* TWI Slave Mode Control Register */ 128#define TWI0_SLAVE_CTRL 0xffc00708 /* TWI Slave Mode Control Register */
@@ -978,6 +980,7 @@
978 980
979/* SPI1 Registers */ 981/* SPI1 Registers */
980 982
983#define SPI1_REGBASE 0xffc02300
981#define SPI1_CTL 0xffc02300 /* SPI1 Control Register */ 984#define SPI1_CTL 0xffc02300 /* SPI1 Control Register */
982#define SPI1_FLG 0xffc02304 /* SPI1 Flag Register */ 985#define SPI1_FLG 0xffc02304 /* SPI1 Flag Register */
983#define SPI1_STAT 0xffc02308 /* SPI1 Status Register */ 986#define SPI1_STAT 0xffc02308 /* SPI1 Status Register */
diff --git a/include/asm-blackfin/mach-bf548/gpio.h b/include/asm-blackfin/mach-bf548/gpio.h
index dbf66bcabe35..cb8b0f15c9a6 100644
--- a/include/asm-blackfin/mach-bf548/gpio.h
+++ b/include/asm-blackfin/mach-bf548/gpio.h
@@ -209,8 +209,3 @@ struct gpio_port_t {
209 unsigned short dummy7; 209 unsigned short dummy7;
210 unsigned int port_mux; 210 unsigned int port_mux;
211}; 211};
212
213int gpio_request(unsigned short gpio, const char *label);
214void peripheral_free(unsigned short per);
215int peripheral_request_list(unsigned short per[], const char *label);
216void peripheral_free_list(unsigned short per[]);
diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h
index e548d3cd81e3..3b08cf9bd6f3 100644
--- a/include/asm-blackfin/mach-bf548/irq.h
+++ b/include/asm-blackfin/mach-bf548/irq.h
@@ -55,287 +55,288 @@ Events (highest priority) EMU 0
55 55
56/* The ABSTRACT IRQ definitions */ 56/* The ABSTRACT IRQ definitions */
57/** the first seven of the following are fixed, the rest you change if you need to **/ 57/** the first seven of the following are fixed, the rest you change if you need to **/
58#define IRQ_EMU 0 /* Emulation */ 58#define IRQ_EMU 0 /* Emulation */
59#define IRQ_RST 1 /* reset */ 59#define IRQ_RST 1 /* reset */
60#define IRQ_NMI 2 /* Non Maskable */ 60#define IRQ_NMI 2 /* Non Maskable */
61#define IRQ_EVX 3 /* Exception */ 61#define IRQ_EVX 3 /* Exception */
62#define IRQ_UNUSED 4 /* - unused interrupt*/ 62#define IRQ_UNUSED 4 /* - unused interrupt*/
63#define IRQ_HWERR 5 /* Hardware Error */ 63#define IRQ_HWERR 5 /* Hardware Error */
64#define IRQ_CORETMR 6 /* Core timer */ 64#define IRQ_CORETMR 6 /* Core timer */
65 65
66#define BFIN_IRQ(x) ((x) + 7) 66#define BFIN_IRQ(x) ((x) + 7)
67 67
68#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */ 68#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */
69#define IRQ_DMAC0_ERR BFIN_IRQ(1) /* DMAC0 Status Interrupt */ 69#define IRQ_DMAC0_ERROR BFIN_IRQ(1) /* DMAC0 Status Interrupt */
70#define IRQ_EPPI0_ERR BFIN_IRQ(2) /* EPPI0 Error Interrupt */ 70#define IRQ_EPPI0_ERROR BFIN_IRQ(2) /* EPPI0 Error Interrupt */
71#define IRQ_SPORT0_ERR BFIN_IRQ(3) /* SPORT0 Error Interrupt */ 71#define IRQ_SPORT0_ERROR BFIN_IRQ(3) /* SPORT0 Error Interrupt */
72#define IRQ_SPORT1_ERR BFIN_IRQ(4) /* SPORT1 Error Interrupt */ 72#define IRQ_SPORT1_ERROR BFIN_IRQ(4) /* SPORT1 Error Interrupt */
73#define IRQ_SPI0_ERR BFIN_IRQ(5) /* SPI0 Status(Error) Interrupt */ 73#define IRQ_SPI0_ERROR BFIN_IRQ(5) /* SPI0 Status(Error) Interrupt */
74#define IRQ_UART0_ERR BFIN_IRQ(6) /* UART0 Status(Error) Interrupt */ 74#define IRQ_UART0_ERROR BFIN_IRQ(6) /* UART0 Status(Error) Interrupt */
75#define IRQ_RTC BFIN_IRQ(7) /* RTC Interrupt */ 75#define IRQ_RTC BFIN_IRQ(7) /* RTC Interrupt */
76#define IRQ_EPPI0 BFIN_IRQ(8) /* EPPI0 Interrupt (DMA12) */ 76#define IRQ_EPPI0 BFIN_IRQ(8) /* EPPI0 Interrupt (DMA12) */
77#define IRQ_SPORT0_RX BFIN_IRQ(9) /* SPORT0 RX Interrupt (DMA0) */ 77#define IRQ_SPORT0_RX BFIN_IRQ(9) /* SPORT0 RX Interrupt (DMA0) */
78#define IRQ_SPORT0_TX BFIN_IRQ(10) /* SPORT0 TX Interrupt (DMA1) */ 78#define IRQ_SPORT0_TX BFIN_IRQ(10) /* SPORT0 TX Interrupt (DMA1) */
79#define IRQ_SPORT1_RX BFIN_IRQ(11) /* SPORT1 RX Interrupt (DMA2) */ 79#define IRQ_SPORT1_RX BFIN_IRQ(11) /* SPORT1 RX Interrupt (DMA2) */
80#define IRQ_SPORT1_TX BFIN_IRQ(12) /* SPORT1 TX Interrupt (DMA3) */ 80#define IRQ_SPORT1_TX BFIN_IRQ(12) /* SPORT1 TX Interrupt (DMA3) */
81#define IRQ_SPI0 BFIN_IRQ(13) /* SPI0 Interrupt (DMA4) */ 81#define IRQ_SPI0 BFIN_IRQ(13) /* SPI0 Interrupt (DMA4) */
82#define IRQ_UART0_RX BFIN_IRQ(14) /* UART0 RX Interrupt (DMA6) */ 82#define IRQ_UART0_RX BFIN_IRQ(14) /* UART0 RX Interrupt (DMA6) */
83#define IRQ_UART0_TX BFIN_IRQ(15) /* UART0 TX Interrupt (DMA7) */ 83#define IRQ_UART0_TX BFIN_IRQ(15) /* UART0 TX Interrupt (DMA7) */
84#define IRQ_TIMER8 BFIN_IRQ(16) /* TIMER 8 Interrupt */ 84#define IRQ_TIMER8 BFIN_IRQ(16) /* TIMER 8 Interrupt */
85#define IRQ_TIMER9 BFIN_IRQ(17) /* TIMER 9 Interrupt */ 85#define IRQ_TIMER9 BFIN_IRQ(17) /* TIMER 9 Interrupt */
86#define IRQ_TIMER10 BFIN_IRQ(18) /* TIMER 10 Interrupt */ 86#define IRQ_TIMER10 BFIN_IRQ(18) /* TIMER 10 Interrupt */
87#define IRQ_PINT0 BFIN_IRQ(19) /* PINT0 Interrupt */ 87#define IRQ_PINT0 BFIN_IRQ(19) /* PINT0 Interrupt */
88#define IRQ_PINT1 BFIN_IRQ(20) /* PINT1 Interrupt */ 88#define IRQ_PINT1 BFIN_IRQ(20) /* PINT1 Interrupt */
89#define IRQ_MDMAS0 BFIN_IRQ(21) /* MDMA Stream 0 Interrupt */ 89#define IRQ_MDMAS0 BFIN_IRQ(21) /* MDMA Stream 0 Interrupt */
90#define IRQ_MDMAS1 BFIN_IRQ(22) /* MDMA Stream 1 Interrupt */ 90#define IRQ_MDMAS1 BFIN_IRQ(22) /* MDMA Stream 1 Interrupt */
91#define IRQ_WATCHDOG BFIN_IRQ(23) /* Watchdog Interrupt */ 91#define IRQ_WATCHDOG BFIN_IRQ(23) /* Watchdog Interrupt */
92#define IRQ_DMAC1_ERR BFIN_IRQ(24) /* DMAC1 Status (Error) Interrupt */ 92#define IRQ_DMAC1_ERROR BFIN_IRQ(24) /* DMAC1 Status (Error) Interrupt */
93#define IRQ_SPORT2_ERR BFIN_IRQ(25) /* SPORT2 Error Interrupt */ 93#define IRQ_SPORT2_ERROR BFIN_IRQ(25) /* SPORT2 Error Interrupt */
94#define IRQ_SPORT3_ERR BFIN_IRQ(26) /* SPORT3 Error Interrupt */ 94#define IRQ_SPORT3_ERROR BFIN_IRQ(26) /* SPORT3 Error Interrupt */
95#define IRQ_MXVR_DATA BFIN_IRQ(27) /* MXVR Data Interrupt */ 95#define IRQ_MXVR_DATA BFIN_IRQ(27) /* MXVR Data Interrupt */
96#define IRQ_SPI1_ERR BFIN_IRQ(28) /* SPI1 Status (Error) Interrupt */ 96#define IRQ_SPI1_ERROR BFIN_IRQ(28) /* SPI1 Status (Error) Interrupt */
97#define IRQ_SPI2_ERR BFIN_IRQ(29) /* SPI2 Status (Error) Interrupt */ 97#define IRQ_SPI2_ERROR BFIN_IRQ(29) /* SPI2 Status (Error) Interrupt */
98#define IRQ_UART1_ERR BFIN_IRQ(30) /* UART1 Status (Error) Interrupt */ 98#define IRQ_UART1_ERROR BFIN_IRQ(30) /* UART1 Status (Error) Interrupt */
99#define IRQ_UART2_ERR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */ 99#define IRQ_UART2_ERROR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */
100#define IRQ_CAN0_ERR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */ 100#define IRQ_CAN0_ERROR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */
101#define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */ 101#define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */
102#define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */ 102#define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */
103#define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */ 103#define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */
104#define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */ 104#define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */
105#define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ 105#define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */
106#define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ 106#define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */
107#define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */ 107#define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */
108#define IRQ_SPI2 BFIN_IRQ(40) /* SPI2 (DMA23) Interrupt */ 108#define IRQ_SPI2 BFIN_IRQ(40) /* SPI2 (DMA23) Interrupt */
109#define IRQ_UART1_RX BFIN_IRQ(41) /* UART1 RX (DMA8) Interrupt */ 109#define IRQ_UART1_RX BFIN_IRQ(41) /* UART1 RX (DMA8) Interrupt */
110#define IRQ_UART1_TX BFIN_IRQ(42) /* UART1 TX (DMA9) Interrupt */ 110#define IRQ_UART1_TX BFIN_IRQ(42) /* UART1 TX (DMA9) Interrupt */
111#define IRQ_ATAPI_RX BFIN_IRQ(43) /* ATAPI RX (DMA10) Interrupt */ 111#define IRQ_ATAPI_RX BFIN_IRQ(43) /* ATAPI RX (DMA10) Interrupt */
112#define IRQ_ATAPI_TX BFIN_IRQ(44) /* ATAPI TX (DMA11) Interrupt */ 112#define IRQ_ATAPI_TX BFIN_IRQ(44) /* ATAPI TX (DMA11) Interrupt */
113#define IRQ_TWI0 BFIN_IRQ(45) /* TWI0 Interrupt */ 113#define IRQ_TWI0 BFIN_IRQ(45) /* TWI0 Interrupt */
114#define IRQ_TWI1 BFIN_IRQ(46) /* TWI1 Interrupt */ 114#define IRQ_TWI1 BFIN_IRQ(46) /* TWI1 Interrupt */
115#define IRQ_TWI IRQ_TWI0 /* TWI Interrupt */ 115#define IRQ_CAN0_RX BFIN_IRQ(47) /* CAN0 Receive Interrupt */
116#define IRQ_CAN0_RX BFIN_IRQ(47) /* CAN0 Receive Interrupt */ 116#define IRQ_CAN0_TX BFIN_IRQ(48) /* CAN0 Transmit Interrupt */
117#define IRQ_CAN0_TX BFIN_IRQ(48) /* CAN0 Transmit Interrupt */ 117#define IRQ_MDMAS2 BFIN_IRQ(49) /* MDMA Stream 2 Interrupt */
118#define IRQ_MDMAS2 BFIN_IRQ(49) /* MDMA Stream 2 Interrupt */ 118#define IRQ_MDMAS3 BFIN_IRQ(50) /* MDMA Stream 3 Interrupt */
119#define IRQ_MDMAS3 BFIN_IRQ(50) /* MDMA Stream 3 Interrupt */ 119#define IRQ_MXVR_ERROR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */
120#define IRQ_MXVR_ERR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ 120#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */
121#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ 121#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */
122#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ 122#define IRQ_EPP1_ERROR BFIN_IRQ(54) /* EPPI1 Error Interrupt */
123#define IRQ_EPP1_ERR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ 123#define IRQ_EPP2_ERROR BFIN_IRQ(55) /* EPPI2 Error Interrupt */
124#define IRQ_EPP2_ERR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ 124#define IRQ_UART3_ERROR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */
125#define IRQ_UART3_ERR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ 125#define IRQ_HOST_ERROR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */
126#define IRQ_HOST_ERR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ 126#define IRQ_PIXC_ERROR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */
127#define IRQ_PIXC_ERR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ 127#define IRQ_NFC_ERROR BFIN_IRQ(60) /* NFC Error Interrupt */
128#define IRQ_NFC_ERR BFIN_IRQ(60) /* NFC Error Interrupt */ 128#define IRQ_ATAPI_ERROR BFIN_IRQ(61) /* ATAPI Error Interrupt */
129#define IRQ_ATAPI_ERR BFIN_IRQ(61) /* ATAPI Error Interrupt */ 129#define IRQ_CAN1_ERROR BFIN_IRQ(62) /* CAN1 Status (Error) Interrupt */
130#define IRQ_CAN1_ERR BFIN_IRQ(62) /* CAN1 Status (Error) Interrupt */ 130#define IRQ_HS_DMA_ERROR BFIN_IRQ(63) /* Handshake DMA Status Interrupt */
131#define IRQ_HS_DMA_ERR BFIN_IRQ(63) /* Handshake DMA Status Interrupt */ 131#define IRQ_PIXC_IN0 BFIN_IRQ(64) /* PIXC IN0 (DMA15) Interrupt */
132#define IRQ_PIXC_IN0 BFIN_IRQ(64) /* PIXC IN0 (DMA15) Interrupt */ 132#define IRQ_PIXC_IN1 BFIN_IRQ(65) /* PIXC IN1 (DMA16) Interrupt */
133#define IRQ_PIXC_IN1 BFIN_IRQ(65) /* PIXC IN1 (DMA16) Interrupt */ 133#define IRQ_PIXC_OUT BFIN_IRQ(66) /* PIXC OUT (DMA17) Interrupt */
134#define IRQ_PIXC_OUT BFIN_IRQ(66) /* PIXC OUT (DMA17) Interrupt */ 134#define IRQ_SDH BFIN_IRQ(67) /* SDH/NFC (DMA22) Interrupt */
135#define IRQ_SDH BFIN_IRQ(67) /* SDH/NFC (DMA22) Interrupt */ 135#define IRQ_CNT BFIN_IRQ(68) /* CNT Interrupt */
136#define IRQ_CNT BFIN_IRQ(68) /* CNT Interrupt */ 136#define IRQ_KEY BFIN_IRQ(69) /* KEY Interrupt */
137#define IRQ_KEY BFIN_IRQ(69) /* KEY Interrupt */ 137#define IRQ_CAN1_RX BFIN_IRQ(70) /* CAN1 RX Interrupt */
138#define IRQ_CAN1_RX BFIN_IRQ(70) /* CAN1 RX Interrupt */ 138#define IRQ_CAN1_TX BFIN_IRQ(71) /* CAN1 TX Interrupt */
139#define IRQ_CAN1_TX BFIN_IRQ(71) /* CAN1 TX Interrupt */ 139#define IRQ_SDH_MASK0 BFIN_IRQ(72) /* SDH Mask 0 Interrupt */
140#define IRQ_SDH_MASK0 BFIN_IRQ(72) /* SDH Mask 0 Interrupt */ 140#define IRQ_SDH_MASK1 BFIN_IRQ(73) /* SDH Mask 1 Interrupt */
141#define IRQ_SDH_MASK1 BFIN_IRQ(73) /* SDH Mask 1 Interrupt */ 141#define IRQ_USB_INT0 BFIN_IRQ(75) /* USB INT0 Interrupt */
142#define IRQ_USB_INT0 BFIN_IRQ(75) /* USB INT0 Interrupt */ 142#define IRQ_USB_INT1 BFIN_IRQ(76) /* USB INT1 Interrupt */
143#define IRQ_USB_INT1 BFIN_IRQ(76) /* USB INT1 Interrupt */ 143#define IRQ_USB_INT2 BFIN_IRQ(77) /* USB INT2 Interrupt */
144#define IRQ_USB_INT2 BFIN_IRQ(77) /* USB INT2 Interrupt */ 144#define IRQ_USB_DMA BFIN_IRQ(78) /* USB DMA Interrupt */
145#define IRQ_USB_DMA BFIN_IRQ(78) /* USB DMA Interrupt */ 145#define IRQ_OPTSEC BFIN_IRQ(79) /* OTPSEC Interrupt */
146#define IRQ_OPTSEC BFIN_IRQ(79) /* OTPSEC Interrupt */ 146#define IRQ_TIMER0 BFIN_IRQ(86) /* Timer 0 Interrupt */
147#define IRQ_TIMER0 BFIN_IRQ(86) /* Timer 0 Interrupt */ 147#define IRQ_TIMER1 BFIN_IRQ(87) /* Timer 1 Interrupt */
148#define IRQ_TIMER1 BFIN_IRQ(87) /* Timer 1 Interrupt */ 148#define IRQ_TIMER2 BFIN_IRQ(88) /* Timer 2 Interrupt */
149#define IRQ_TIMER2 BFIN_IRQ(88) /* Timer 2 Interrupt */ 149#define IRQ_TIMER3 BFIN_IRQ(89) /* Timer 3 Interrupt */
150#define IRQ_TIMER3 BFIN_IRQ(89) /* Timer 3 Interrupt */ 150#define IRQ_TIMER4 BFIN_IRQ(90) /* Timer 4 Interrupt */
151#define IRQ_TIMER4 BFIN_IRQ(90) /* Timer 4 Interrupt */ 151#define IRQ_TIMER5 BFIN_IRQ(91) /* Timer 5 Interrupt */
152#define IRQ_TIMER5 BFIN_IRQ(91) /* Timer 5 Interrupt */ 152#define IRQ_TIMER6 BFIN_IRQ(92) /* Timer 6 Interrupt */
153#define IRQ_TIMER6 BFIN_IRQ(92) /* Timer 6 Interrupt */ 153#define IRQ_TIMER7 BFIN_IRQ(93) /* Timer 7 Interrupt */
154#define IRQ_TIMER7 BFIN_IRQ(93) /* Timer 7 Interrupt */ 154#define IRQ_PINT2 BFIN_IRQ(94) /* PINT2 Interrupt */
155#define IRQ_PINT2 BFIN_IRQ(94) /* PINT2 Interrupt */ 155#define IRQ_PINT3 BFIN_IRQ(95) /* PINT3 Interrupt */
156#define IRQ_PINT3 BFIN_IRQ(95) /* PINT3 Interrupt */ 156
157 157#define SYS_IRQS IRQ_PINT3
158#define SYS_IRQS IRQ_PINT3 158
159 159#define BFIN_PA_IRQ(x) ((x) + SYS_IRQS + 1)
160#define BFIN_PA_IRQ(x) ((x) + SYS_IRQS + 1) 160#define IRQ_PA0 BFIN_PA_IRQ(0)
161#define IRQ_PA0 BFIN_PA_IRQ(0) 161#define IRQ_PA1 BFIN_PA_IRQ(1)
162#define IRQ_PA1 BFIN_PA_IRQ(1) 162#define IRQ_PA2 BFIN_PA_IRQ(2)
163#define IRQ_PA2 BFIN_PA_IRQ(2) 163#define IRQ_PA3 BFIN_PA_IRQ(3)
164#define IRQ_PA3 BFIN_PA_IRQ(3) 164#define IRQ_PA4 BFIN_PA_IRQ(4)
165#define IRQ_PA4 BFIN_PA_IRQ(4) 165#define IRQ_PA5 BFIN_PA_IRQ(5)
166#define IRQ_PA5 BFIN_PA_IRQ(5) 166#define IRQ_PA6 BFIN_PA_IRQ(6)
167#define IRQ_PA6 BFIN_PA_IRQ(6) 167#define IRQ_PA7 BFIN_PA_IRQ(7)
168#define IRQ_PA7 BFIN_PA_IRQ(7) 168#define IRQ_PA8 BFIN_PA_IRQ(8)
169#define IRQ_PA8 BFIN_PA_IRQ(8) 169#define IRQ_PA9 BFIN_PA_IRQ(9)
170#define IRQ_PA9 BFIN_PA_IRQ(9) 170#define IRQ_PA10 BFIN_PA_IRQ(10)
171#define IRQ_PA10 BFIN_PA_IRQ(10) 171#define IRQ_PA11 BFIN_PA_IRQ(11)
172#define IRQ_PA11 BFIN_PA_IRQ(11) 172#define IRQ_PA12 BFIN_PA_IRQ(12)
173#define IRQ_PA12 BFIN_PA_IRQ(12) 173#define IRQ_PA13 BFIN_PA_IRQ(13)
174#define IRQ_PA13 BFIN_PA_IRQ(13) 174#define IRQ_PA14 BFIN_PA_IRQ(14)
175#define IRQ_PA14 BFIN_PA_IRQ(14) 175#define IRQ_PA15 BFIN_PA_IRQ(15)
176#define IRQ_PA15 BFIN_PA_IRQ(15) 176
177 177#define BFIN_PB_IRQ(x) ((x) + IRQ_PA15 + 1)
178#define BFIN_PB_IRQ(x) ((x) + IRQ_PA15 + 1) 178#define IRQ_PB0 BFIN_PB_IRQ(0)
179#define IRQ_PB0 BFIN_PB_IRQ(0) 179#define IRQ_PB1 BFIN_PB_IRQ(1)
180#define IRQ_PB1 BFIN_PB_IRQ(1) 180#define IRQ_PB2 BFIN_PB_IRQ(2)
181#define IRQ_PB2 BFIN_PB_IRQ(2) 181#define IRQ_PB3 BFIN_PB_IRQ(3)
182#define IRQ_PB3 BFIN_PB_IRQ(3) 182#define IRQ_PB4 BFIN_PB_IRQ(4)
183#define IRQ_PB4 BFIN_PB_IRQ(4) 183#define IRQ_PB5 BFIN_PB_IRQ(5)
184#define IRQ_PB5 BFIN_PB_IRQ(5) 184#define IRQ_PB6 BFIN_PB_IRQ(6)
185#define IRQ_PB6 BFIN_PB_IRQ(6) 185#define IRQ_PB7 BFIN_PB_IRQ(7)
186#define IRQ_PB7 BFIN_PB_IRQ(7) 186#define IRQ_PB8 BFIN_PB_IRQ(8)
187#define IRQ_PB8 BFIN_PB_IRQ(8) 187#define IRQ_PB9 BFIN_PB_IRQ(9)
188#define IRQ_PB9 BFIN_PB_IRQ(9) 188#define IRQ_PB10 BFIN_PB_IRQ(10)
189#define IRQ_PB10 BFIN_PB_IRQ(10) 189#define IRQ_PB11 BFIN_PB_IRQ(11)
190#define IRQ_PB11 BFIN_PB_IRQ(11) 190#define IRQ_PB12 BFIN_PB_IRQ(12)
191#define IRQ_PB12 BFIN_PB_IRQ(12) 191#define IRQ_PB13 BFIN_PB_IRQ(13)
192#define IRQ_PB13 BFIN_PB_IRQ(13) 192#define IRQ_PB14 BFIN_PB_IRQ(14)
193#define IRQ_PB14 BFIN_PB_IRQ(14) 193#define IRQ_PB15 BFIN_PB_IRQ(15) /* N/A */
194#define IRQ_PB15 BFIN_PB_IRQ(15) /* N/A */ 194
195 195#define BFIN_PC_IRQ(x) ((x) + IRQ_PB15 + 1)
196#define BFIN_PC_IRQ(x) ((x) + IRQ_PB15 + 1) 196#define IRQ_PC0 BFIN_PC_IRQ(0)
197#define IRQ_PC0 BFIN_PC_IRQ(0) 197#define IRQ_PC1 BFIN_PC_IRQ(1)
198#define IRQ_PC1 BFIN_PC_IRQ(1) 198#define IRQ_PC2 BFIN_PC_IRQ(2)
199#define IRQ_PC2 BFIN_PC_IRQ(2) 199#define IRQ_PC3 BFIN_PC_IRQ(3)
200#define IRQ_PC3 BFIN_PC_IRQ(3) 200#define IRQ_PC4 BFIN_PC_IRQ(4)
201#define IRQ_PC4 BFIN_PC_IRQ(4) 201#define IRQ_PC5 BFIN_PC_IRQ(5)
202#define IRQ_PC5 BFIN_PC_IRQ(5) 202#define IRQ_PC6 BFIN_PC_IRQ(6)
203#define IRQ_PC6 BFIN_PC_IRQ(6) 203#define IRQ_PC7 BFIN_PC_IRQ(7)
204#define IRQ_PC7 BFIN_PC_IRQ(7) 204#define IRQ_PC8 BFIN_PC_IRQ(8)
205#define IRQ_PC8 BFIN_PC_IRQ(8) 205#define IRQ_PC9 BFIN_PC_IRQ(9)
206#define IRQ_PC9 BFIN_PC_IRQ(9) 206#define IRQ_PC10 BFIN_PC_IRQ(10)
207#define IRQ_PC10 BFIN_PC_IRQ(10) 207#define IRQ_PC11 BFIN_PC_IRQ(11)
208#define IRQ_PC11 BFIN_PC_IRQ(11) 208#define IRQ_PC12 BFIN_PC_IRQ(12)
209#define IRQ_PC12 BFIN_PC_IRQ(12) 209#define IRQ_PC13 BFIN_PC_IRQ(13)
210#define IRQ_PC13 BFIN_PC_IRQ(13) 210#define IRQ_PC14 BFIN_PC_IRQ(14) /* N/A */
211#define IRQ_PC14 BFIN_PC_IRQ(14) /* N/A */ 211#define IRQ_PC15 BFIN_PC_IRQ(15) /* N/A */
212#define IRQ_PC15 BFIN_PC_IRQ(15) /* N/A */ 212
213 213#define BFIN_PD_IRQ(x) ((x) + IRQ_PC15 + 1)
214#define BFIN_PD_IRQ(x) ((x) + IRQ_PC15 + 1) 214#define IRQ_PD0 BFIN_PD_IRQ(0)
215#define IRQ_PD0 BFIN_PD_IRQ(0) 215#define IRQ_PD1 BFIN_PD_IRQ(1)
216#define IRQ_PD1 BFIN_PD_IRQ(1) 216#define IRQ_PD2 BFIN_PD_IRQ(2)
217#define IRQ_PD2 BFIN_PD_IRQ(2) 217#define IRQ_PD3 BFIN_PD_IRQ(3)
218#define IRQ_PD3 BFIN_PD_IRQ(3) 218#define IRQ_PD4 BFIN_PD_IRQ(4)
219#define IRQ_PD4 BFIN_PD_IRQ(4) 219#define IRQ_PD5 BFIN_PD_IRQ(5)
220#define IRQ_PD5 BFIN_PD_IRQ(5) 220#define IRQ_PD6 BFIN_PD_IRQ(6)
221#define IRQ_PD6 BFIN_PD_IRQ(6) 221#define IRQ_PD7 BFIN_PD_IRQ(7)
222#define IRQ_PD7 BFIN_PD_IRQ(7) 222#define IRQ_PD8 BFIN_PD_IRQ(8)
223#define IRQ_PD8 BFIN_PD_IRQ(8) 223#define IRQ_PD9 BFIN_PD_IRQ(9)
224#define IRQ_PD9 BFIN_PD_IRQ(9) 224#define IRQ_PD10 BFIN_PD_IRQ(10)
225#define IRQ_PD10 BFIN_PD_IRQ(10) 225#define IRQ_PD11 BFIN_PD_IRQ(11)
226#define IRQ_PD11 BFIN_PD_IRQ(11) 226#define IRQ_PD12 BFIN_PD_IRQ(12)
227#define IRQ_PD12 BFIN_PD_IRQ(12) 227#define IRQ_PD13 BFIN_PD_IRQ(13)
228#define IRQ_PD13 BFIN_PD_IRQ(13) 228#define IRQ_PD14 BFIN_PD_IRQ(14)
229#define IRQ_PD14 BFIN_PD_IRQ(14) 229#define IRQ_PD15 BFIN_PD_IRQ(15)
230#define IRQ_PD15 BFIN_PD_IRQ(15) 230
231 231#define BFIN_PE_IRQ(x) ((x) + IRQ_PD15 + 1)
232#define BFIN_PE_IRQ(x) ((x) + IRQ_PD15 + 1) 232#define IRQ_PE0 BFIN_PE_IRQ(0)
233#define IRQ_PE0 BFIN_PE_IRQ(0) 233#define IRQ_PE1 BFIN_PE_IRQ(1)
234#define IRQ_PE1 BFIN_PE_IRQ(1) 234#define IRQ_PE2 BFIN_PE_IRQ(2)
235#define IRQ_PE2 BFIN_PE_IRQ(2) 235#define IRQ_PE3 BFIN_PE_IRQ(3)
236#define IRQ_PE3 BFIN_PE_IRQ(3) 236#define IRQ_PE4 BFIN_PE_IRQ(4)
237#define IRQ_PE4 BFIN_PE_IRQ(4) 237#define IRQ_PE5 BFIN_PE_IRQ(5)
238#define IRQ_PE5 BFIN_PE_IRQ(5) 238#define IRQ_PE6 BFIN_PE_IRQ(6)
239#define IRQ_PE6 BFIN_PE_IRQ(6) 239#define IRQ_PE7 BFIN_PE_IRQ(7)
240#define IRQ_PE7 BFIN_PE_IRQ(7) 240#define IRQ_PE8 BFIN_PE_IRQ(8)
241#define IRQ_PE8 BFIN_PE_IRQ(8) 241#define IRQ_PE9 BFIN_PE_IRQ(9)
242#define IRQ_PE9 BFIN_PE_IRQ(9) 242#define IRQ_PE10 BFIN_PE_IRQ(10)
243#define IRQ_PE10 BFIN_PE_IRQ(10) 243#define IRQ_PE11 BFIN_PE_IRQ(11)
244#define IRQ_PE11 BFIN_PE_IRQ(11) 244#define IRQ_PE12 BFIN_PE_IRQ(12)
245#define IRQ_PE12 BFIN_PE_IRQ(12) 245#define IRQ_PE13 BFIN_PE_IRQ(13)
246#define IRQ_PE13 BFIN_PE_IRQ(13) 246#define IRQ_PE14 BFIN_PE_IRQ(14)
247#define IRQ_PE14 BFIN_PE_IRQ(14) 247#define IRQ_PE15 BFIN_PE_IRQ(15)
248#define IRQ_PE15 BFIN_PE_IRQ(15) 248
249 249#define BFIN_PF_IRQ(x) ((x) + IRQ_PE15 + 1)
250#define BFIN_PF_IRQ(x) ((x) + IRQ_PE15 + 1) 250#define IRQ_PF0 BFIN_PF_IRQ(0)
251#define IRQ_PF0 BFIN_PF_IRQ(0) 251#define IRQ_PF1 BFIN_PF_IRQ(1)
252#define IRQ_PF1 BFIN_PF_IRQ(1) 252#define IRQ_PF2 BFIN_PF_IRQ(2)
253#define IRQ_PF2 BFIN_PF_IRQ(2) 253#define IRQ_PF3 BFIN_PF_IRQ(3)
254#define IRQ_PF3 BFIN_PF_IRQ(3) 254#define IRQ_PF4 BFIN_PF_IRQ(4)
255#define IRQ_PF4 BFIN_PF_IRQ(4) 255#define IRQ_PF5 BFIN_PF_IRQ(5)
256#define IRQ_PF5 BFIN_PF_IRQ(5) 256#define IRQ_PF6 BFIN_PF_IRQ(6)
257#define IRQ_PF6 BFIN_PF_IRQ(6) 257#define IRQ_PF7 BFIN_PF_IRQ(7)
258#define IRQ_PF7 BFIN_PF_IRQ(7) 258#define IRQ_PF8 BFIN_PF_IRQ(8)
259#define IRQ_PF8 BFIN_PF_IRQ(8) 259#define IRQ_PF9 BFIN_PF_IRQ(9)
260#define IRQ_PF9 BFIN_PF_IRQ(9) 260#define IRQ_PF10 BFIN_PF_IRQ(10)
261#define IRQ_PF10 BFIN_PF_IRQ(10) 261#define IRQ_PF11 BFIN_PF_IRQ(11)
262#define IRQ_PF11 BFIN_PF_IRQ(11) 262#define IRQ_PF12 BFIN_PF_IRQ(12)
263#define IRQ_PF12 BFIN_PF_IRQ(12) 263#define IRQ_PF13 BFIN_PF_IRQ(13)
264#define IRQ_PF13 BFIN_PF_IRQ(13) 264#define IRQ_PF14 BFIN_PF_IRQ(14)
265#define IRQ_PF14 BFIN_PF_IRQ(14) 265#define IRQ_PF15 BFIN_PF_IRQ(15)
266#define IRQ_PF15 BFIN_PF_IRQ(15) 266
267 267#define BFIN_PG_IRQ(x) ((x) + IRQ_PF15 + 1)
268#define BFIN_PG_IRQ(x) ((x) + IRQ_PF15 + 1) 268#define IRQ_PG0 BFIN_PG_IRQ(0)
269#define IRQ_PG0 BFIN_PG_IRQ(0) 269#define IRQ_PG1 BFIN_PG_IRQ(1)
270#define IRQ_PG1 BFIN_PG_IRQ(1) 270#define IRQ_PG2 BFIN_PG_IRQ(2)
271#define IRQ_PG2 BFIN_PG_IRQ(2) 271#define IRQ_PG3 BFIN_PG_IRQ(3)
272#define IRQ_PG3 BFIN_PG_IRQ(3) 272#define IRQ_PG4 BFIN_PG_IRQ(4)
273#define IRQ_PG4 BFIN_PG_IRQ(4) 273#define IRQ_PG5 BFIN_PG_IRQ(5)
274#define IRQ_PG5 BFIN_PG_IRQ(5) 274#define IRQ_PG6 BFIN_PG_IRQ(6)
275#define IRQ_PG6 BFIN_PG_IRQ(6) 275#define IRQ_PG7 BFIN_PG_IRQ(7)
276#define IRQ_PG7 BFIN_PG_IRQ(7) 276#define IRQ_PG8 BFIN_PG_IRQ(8)
277#define IRQ_PG8 BFIN_PG_IRQ(8) 277#define IRQ_PG9 BFIN_PG_IRQ(9)
278#define IRQ_PG9 BFIN_PG_IRQ(9) 278#define IRQ_PG10 BFIN_PG_IRQ(10)
279#define IRQ_PG10 BFIN_PG_IRQ(10) 279#define IRQ_PG11 BFIN_PG_IRQ(11)
280#define IRQ_PG11 BFIN_PG_IRQ(11) 280#define IRQ_PG12 BFIN_PG_IRQ(12)
281#define IRQ_PG12 BFIN_PG_IRQ(12) 281#define IRQ_PG13 BFIN_PG_IRQ(13)
282#define IRQ_PG13 BFIN_PG_IRQ(13) 282#define IRQ_PG14 BFIN_PG_IRQ(14)
283#define IRQ_PG14 BFIN_PG_IRQ(14) 283#define IRQ_PG15 BFIN_PG_IRQ(15)
284#define IRQ_PG15 BFIN_PG_IRQ(15) 284
285 285#define BFIN_PH_IRQ(x) ((x) + IRQ_PG15 + 1)
286#define BFIN_PH_IRQ(x) ((x) + IRQ_PG15 + 1) 286#define IRQ_PH0 BFIN_PH_IRQ(0)
287#define IRQ_PH0 BFIN_PH_IRQ(0) 287#define IRQ_PH1 BFIN_PH_IRQ(1)
288#define IRQ_PH1 BFIN_PH_IRQ(1) 288#define IRQ_PH2 BFIN_PH_IRQ(2)
289#define IRQ_PH2 BFIN_PH_IRQ(2) 289#define IRQ_PH3 BFIN_PH_IRQ(3)
290#define IRQ_PH3 BFIN_PH_IRQ(3) 290#define IRQ_PH4 BFIN_PH_IRQ(4)
291#define IRQ_PH4 BFIN_PH_IRQ(4) 291#define IRQ_PH5 BFIN_PH_IRQ(5)
292#define IRQ_PH5 BFIN_PH_IRQ(5) 292#define IRQ_PH6 BFIN_PH_IRQ(6)
293#define IRQ_PH6 BFIN_PH_IRQ(6) 293#define IRQ_PH7 BFIN_PH_IRQ(7)
294#define IRQ_PH7 BFIN_PH_IRQ(7) 294#define IRQ_PH8 BFIN_PH_IRQ(8)
295#define IRQ_PH8 BFIN_PH_IRQ(8) 295#define IRQ_PH9 BFIN_PH_IRQ(9)
296#define IRQ_PH9 BFIN_PH_IRQ(9) 296#define IRQ_PH10 BFIN_PH_IRQ(10)
297#define IRQ_PH10 BFIN_PH_IRQ(10) 297#define IRQ_PH11 BFIN_PH_IRQ(11)
298#define IRQ_PH11 BFIN_PH_IRQ(11) 298#define IRQ_PH12 BFIN_PH_IRQ(12)
299#define IRQ_PH12 BFIN_PH_IRQ(12) 299#define IRQ_PH13 BFIN_PH_IRQ(13)
300#define IRQ_PH13 BFIN_PH_IRQ(13) 300#define IRQ_PH14 BFIN_PH_IRQ(14) /* N/A */
301#define IRQ_PH14 BFIN_PH_IRQ(14) /* N/A */ 301#define IRQ_PH15 BFIN_PH_IRQ(15) /* N/A */
302#define IRQ_PH15 BFIN_PH_IRQ(15) /* N/A */ 302
303 303#define BFIN_PI_IRQ(x) ((x) + IRQ_PH15 + 1)
304#define BFIN_PI_IRQ(x) ((x) + IRQ_PH15 + 1) 304#define IRQ_PI0 BFIN_PI_IRQ(0)
305#define IRQ_PI0 BFIN_PI_IRQ(0) 305#define IRQ_PI1 BFIN_PI_IRQ(1)
306#define IRQ_PI1 BFIN_PI_IRQ(1) 306#define IRQ_PI2 BFIN_PI_IRQ(2)
307#define IRQ_PI2 BFIN_PI_IRQ(2) 307#define IRQ_PI3 BFIN_PI_IRQ(3)
308#define IRQ_PI3 BFIN_PI_IRQ(3) 308#define IRQ_PI4 BFIN_PI_IRQ(4)
309#define IRQ_PI4 BFIN_PI_IRQ(4) 309#define IRQ_PI5 BFIN_PI_IRQ(5)
310#define IRQ_PI5 BFIN_PI_IRQ(5) 310#define IRQ_PI6 BFIN_PI_IRQ(6)
311#define IRQ_PI6 BFIN_PI_IRQ(6) 311#define IRQ_PI7 BFIN_PI_IRQ(7)
312#define IRQ_PI7 BFIN_PI_IRQ(7) 312#define IRQ_PI8 BFIN_PI_IRQ(8)
313#define IRQ_PI8 BFIN_PI_IRQ(8) 313#define IRQ_PI9 BFIN_PI_IRQ(9)
314#define IRQ_PI9 BFIN_PI_IRQ(9) 314#define IRQ_PI10 BFIN_PI_IRQ(10)
315#define IRQ_PI10 BFIN_PI_IRQ(10) 315#define IRQ_PI11 BFIN_PI_IRQ(11)
316#define IRQ_PI11 BFIN_PI_IRQ(11) 316#define IRQ_PI12 BFIN_PI_IRQ(12)
317#define IRQ_PI12 BFIN_PI_IRQ(12) 317#define IRQ_PI13 BFIN_PI_IRQ(13)
318#define IRQ_PI13 BFIN_PI_IRQ(13) 318#define IRQ_PI14 BFIN_PI_IRQ(14)
319#define IRQ_PI14 BFIN_PI_IRQ(14) 319#define IRQ_PI15 BFIN_PI_IRQ(15)
320#define IRQ_PI15 BFIN_PI_IRQ(15) 320
321 321#define BFIN_PJ_IRQ(x) ((x) + IRQ_PI15 + 1)
322#define BFIN_PJ_IRQ(x) ((x) + IRQ_PI15 + 1) 322#define IRQ_PJ0 BFIN_PJ_IRQ(0)
323#define IRQ_PJ0 BFIN_PJ_IRQ(0) 323#define IRQ_PJ1 BFIN_PJ_IRQ(1)
324#define IRQ_PJ1 BFIN_PJ_IRQ(1) 324#define IRQ_PJ2 BFIN_PJ_IRQ(2)
325#define IRQ_PJ2 BFIN_PJ_IRQ(2) 325#define IRQ_PJ3 BFIN_PJ_IRQ(3)
326#define IRQ_PJ3 BFIN_PJ_IRQ(3) 326#define IRQ_PJ4 BFIN_PJ_IRQ(4)
327#define IRQ_PJ4 BFIN_PJ_IRQ(4) 327#define IRQ_PJ5 BFIN_PJ_IRQ(5)
328#define IRQ_PJ5 BFIN_PJ_IRQ(5) 328#define IRQ_PJ6 BFIN_PJ_IRQ(6)
329#define IRQ_PJ6 BFIN_PJ_IRQ(6) 329#define IRQ_PJ7 BFIN_PJ_IRQ(7)
330#define IRQ_PJ7 BFIN_PJ_IRQ(7) 330#define IRQ_PJ8 BFIN_PJ_IRQ(8)
331#define IRQ_PJ8 BFIN_PJ_IRQ(8) 331#define IRQ_PJ9 BFIN_PJ_IRQ(9)
332#define IRQ_PJ9 BFIN_PJ_IRQ(9) 332#define IRQ_PJ10 BFIN_PJ_IRQ(10)
333#define IRQ_PJ10 BFIN_PJ_IRQ(10) 333#define IRQ_PJ11 BFIN_PJ_IRQ(11)
334#define IRQ_PJ11 BFIN_PJ_IRQ(11) 334#define IRQ_PJ12 BFIN_PJ_IRQ(12)
335#define IRQ_PJ12 BFIN_PJ_IRQ(12) 335#define IRQ_PJ13 BFIN_PJ_IRQ(13)
336#define IRQ_PJ13 BFIN_PJ_IRQ(13) 336#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */
337#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */ 337#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */
338#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */ 338
339#define GPIO_IRQ_BASE IRQ_PA0
339 340
340#ifdef CONFIG_IRQCHIP_DEMUX_GPIO 341#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
341#define NR_IRQS (IRQ_PJ15+1) 342#define NR_IRQS (IRQ_PJ15+1)
@@ -343,6 +344,34 @@ Events (highest priority) EMU 0
343#define NR_IRQS (SYS_IRQS+1) 344#define NR_IRQS (SYS_IRQS+1)
344#endif 345#endif
345 346
347/* For compatibility reasons with existing code */
348
349#define IRQ_DMAC0_ERR IRQ_DMAC0_ERROR
350#define IRQ_EPPI0_ERR IRQ_EPPI0_ERROR
351#define IRQ_SPORT0_ERR IRQ_SPORT0_ERROR
352#define IRQ_SPORT1_ERR IRQ_SPORT1_ERROR
353#define IRQ_SPI0_ERR IRQ_SPI0_ERROR
354#define IRQ_UART0_ERR IRQ_UART0_ERROR
355#define IRQ_DMAC1_ERR IRQ_DMAC1_ERROR
356#define IRQ_SPORT2_ERR IRQ_SPORT2_ERROR
357#define IRQ_SPORT3_ERR IRQ_SPORT3_ERROR
358#define IRQ_SPI1_ERR IRQ_SPI1_ERROR
359#define IRQ_SPI2_ERR IRQ_SPI2_ERROR
360#define IRQ_UART1_ERR IRQ_UART1_ERROR
361#define IRQ_UART2_ERR IRQ_UART2_ERROR
362#define IRQ_CAN0_ERR IRQ_CAN0_ERROR
363#define IRQ_MXVR_ERR IRQ_MXVR_ERROR
364#define IRQ_EPP1_ERR IRQ_EPP1_ERROR
365#define IRQ_EPP2_ERR IRQ_EPP2_ERROR
366#define IRQ_UART3_ERR IRQ_UART3_ERROR
367#define IRQ_HOST_ERR IRQ_HOST_ERROR
368#define IRQ_PIXC_ERR IRQ_PIXC_ERROR
369#define IRQ_NFC_ERR IRQ_NFC_ERROR
370#define IRQ_ATAPI_ERR IRQ_ATAPI_ERROR
371#define IRQ_CAN1_ERR IRQ_CAN1_ERROR
372#define IRQ_HS_DMA_ERR IRQ_HS_DMA_ERROR
373
374
346#define IVG7 7 375#define IVG7 7
347#define IVG8 8 376#define IVG8 8
348#define IVG9 9 377#define IVG9 9
diff --git a/include/asm-blackfin/mach-bf548/mem_map.h b/include/asm-blackfin/mach-bf548/mem_map.h
index 72d80e8a6e81..ec1597e31831 100644
--- a/include/asm-blackfin/mach-bf548/mem_map.h
+++ b/include/asm-blackfin/mach-bf548/mem_map.h
@@ -51,10 +51,10 @@
51/* Level 1 Memory */ 51/* Level 1 Memory */
52 52
53/* Memory Map for ADSP-BF548 processors */ 53/* Memory Map for ADSP-BF548 processors */
54#ifdef CONFIG_BLKFIN_ICACHE 54#ifdef CONFIG_BFIN_ICACHE
55#define BLKFIN_ICACHESIZE (16*1024) 55#define BFIN_ICACHESIZE (16*1024)
56#else 56#else
57#define BLKFIN_ICACHESIZE (0*1024) 57#define BFIN_ICACHESIZE (0*1024)
58#endif 58#endif
59 59
60#define L1_CODE_START 0xFFA00000 60#define L1_CODE_START 0xFFA00000
@@ -63,29 +63,29 @@
63 63
64#define L1_CODE_LENGTH 0xC000 64#define L1_CODE_LENGTH 0xC000
65 65
66#ifdef CONFIG_BLKFIN_DCACHE 66#ifdef CONFIG_BFIN_DCACHE
67 67
68#ifdef CONFIG_BLKFIN_DCACHE_BANKA 68#ifdef CONFIG_BFIN_DCACHE_BANKA
69#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 69#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
70#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 70#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
71#define L1_DATA_B_LENGTH 0x8000 71#define L1_DATA_B_LENGTH 0x8000
72#define BLKFIN_DCACHESIZE (16*1024) 72#define BFIN_DCACHESIZE (16*1024)
73#define BLKFIN_DSUPBANKS 1 73#define BFIN_DSUPBANKS 1
74#else 74#else
75#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 75#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
76#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 76#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
77#define L1_DATA_B_LENGTH (0x8000 - 0x4000) 77#define L1_DATA_B_LENGTH (0x8000 - 0x4000)
78#define BLKFIN_DCACHESIZE (32*1024) 78#define BFIN_DCACHESIZE (32*1024)
79#define BLKFIN_DSUPBANKS 2 79#define BFIN_DSUPBANKS 2
80#endif 80#endif
81 81
82#else 82#else
83#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 83#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
84#define L1_DATA_A_LENGTH 0x8000 84#define L1_DATA_A_LENGTH 0x8000
85#define L1_DATA_B_LENGTH 0x8000 85#define L1_DATA_B_LENGTH 0x8000
86#define BLKFIN_DCACHESIZE (0*1024) 86#define BFIN_DCACHESIZE (0*1024)
87#define BLKFIN_DSUPBANKS 0 87#define BFIN_DSUPBANKS 0
88#endif /*CONFIG_BLKFIN_DCACHE*/ 88#endif /*CONFIG_BFIN_DCACHE*/
89 89
90/* Scratch Pad Memory */ 90/* Scratch Pad Memory */
91 91
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h
index f5b32d66517d..bed956456884 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/include/asm-blackfin/mach-bf561/anomaly.h
@@ -1,184 +1,256 @@
1
2/* 1/*
3 * File: include/asm-blackfin/mach-bf561/anomaly.h 2 * File: include/asm-blackfin/mach-bf561/anomaly.h
4 * Based on: 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
5 * Author:
6 *
7 * Created:
8 * Description:
9 *
10 * Rev:
11 *
12 * Modified:
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * 4 *
16 * This program is free software; you can redistribute it and/or modify 5 * Copyright (C) 2004-2007 Analog Devices Inc.
17 * it under the terms of the GNU General Public License as published by 6 * Licensed under the GPL-2 or later.
18 * the Free Software Foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; see the file COPYING.
28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */ 7 */
31 8
32/* This file shoule be up to date with: 9/* This file shoule be up to date with:
33 * - Revision L, 10Aug2006; ADSP-BF561 Silicon Anomaly List 10 * - Revision N, March 28, 2007; ADSP-BF561 Silicon Anomaly List
34 */ 11 */
35 12
36#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
37#define _MACH_ANOMALY_H_ 14#define _MACH_ANOMALY_H_
38 15
39/* We do not support 0.1 or 0.4 silicon - sorry */ 16/* We do not support 0.1, 0.2, or 0.4 silicon - sorry */
40#if (defined(CONFIG_BF_REV_0_1) || defined(CONFIG_BF_REV_0_2) || defined(CONFIG_BF_REV_0_4)) 17#if __SILICON_REVISION__ < 3 || __SILICON_REVISION__ == 4
41#error Kernel will not work on BF561 Version 0.1, 0.2, or 0.4 18# error Kernel will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4
42#endif 19#endif
43 20
44/* Issues that are common to 0.5 and 0.3 silicon */ 21/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */
45#if (defined(CONFIG_BF_REV_0_5) || defined(CONFIG_BF_REV_0_3)) 22#define ANOMALY_05000074 (1)
46#define ANOMALY_05000074 /* A multi issue instruction with dsp32shiftimm in 23/* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */
47 slot1 and store of a P register in slot 2 is not 24#define ANOMALY_05000099 (__SILICON_REVISION__ < 5)
48 supported */ 25/* Trace Buffers may contain errors in emulation mode and/or exception, NMI, reset handlers */
49#define ANOMALY_05000099 /* UART Line Status Register (UART_LSR) bits are not 26#define ANOMALY_05000116 (__SILICON_REVISION__ < 3)
50 updated at the same time. */ 27/* Testset instructions restricted to 32-bit aligned memory locations */
51#define ANOMALY_05000120 /* Testset instructions restricted to 32-bit aligned 28#define ANOMALY_05000120 (1)
52 memory locations */ 29/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
53#define ANOMALY_05000122 /* Rx.H cannot be used to access 16-bit System MMR 30#define ANOMALY_05000122 (1)
54 registers */ 31/* Erroneous exception when enabling cache */
55#define ANOMALY_05000127 /* Signbits instruction not functional under certain 32#define ANOMALY_05000125 (__SILICON_REVISION__ < 3)
56 conditions */ 33/* Signbits instruction not functional under certain conditions */
57#define ANOMALY_05000149 /* IMDMA S1/D1 channel may stall */ 34#define ANOMALY_05000127 (1)
58#define ANOMALY_05000166 /* PPI Data Lengths Between 8 and 16 do not zero out 35/* Two bits in the Watchpoint Status Register (WPSTAT) are swapped */
59 upper bits */ 36#define ANOMALY_05000134 (__SILICON_REVISION__ < 3)
60#define ANOMALY_05000167 /* Turning Serial Ports on With External Frame Syncs */ 37/* Enable wires from the Data Watchpoint Address Control Register (WPDACTL) are swapped */
61#define ANOMALY_05000180 /* PPI_DELAY not functional in PPI modes with 0 frame 38#define ANOMALY_05000135 (__SILICON_REVISION__ < 3)
62 syncs */ 39/* Stall in multi-unit DMA operations */
63#define ANOMALY_05000182 /* IMDMA does not operate to full speed for 600MHz 40#define ANOMALY_05000136 (__SILICON_REVISION__ < 3)
64 and higher devices */ 41/* Allowing the SPORT RX FIFO to fill will cause an overflow */
65#define ANOMALY_05000187 /* IMDMA Corrupted Data after a Halt */ 42#define ANOMALY_05000140 (__SILICON_REVISION__ < 3)
66#define ANOMALY_05000190 /* PPI not functional at core voltage < 1Volt */ 43/* Infinite Stall may occur with a particular sequence of consecutive dual dag events */
67#define ANOMALY_05000208 /* VSTAT status bit in PLL_STAT register is not 44#define ANOMALY_05000141 (__SILICON_REVISION__ < 3)
68 functional */ 45/* Interrupts may be lost when a programmable input flag is configured to be edge sensitive */
69#define ANOMALY_05000245 /* Spurious Hardware Error from an access in the 46#define ANOMALY_05000142 (__SILICON_REVISION__ < 3)
70 shadow of a conditional branch */ 47/* DMA and TESTSET conflict when both are accessing external memory */
71#define ANOMALY_05000257 /* Interrupt/Exception during short hardware loop 48#define ANOMALY_05000144 (__SILICON_REVISION__ < 3)
72 may cause bad instruction fetches */ 49/* In PWM_OUT mode, you must enable the PPI block to generate a waveform from PPI_CLK */
73#define ANOMALY_05000265 /* Sensitivity to noise with slow input edge rates on 50#define ANOMALY_05000145 (__SILICON_REVISION__ < 3)
74 external SPORT TX and RX clocks */ 51/* MDMA may lose the first few words of a descriptor chain */
75#define ANOMALY_05000267 /* IMDMA may corrupt data under certain conditions */ 52#define ANOMALY_05000146 (__SILICON_REVISION__ < 3)
76#define ANOMALY_05000269 /* High I/O activity causes output voltage of internal 53/* Source MDMA descriptor may stop with a DMA Error near beginning of descriptor fetch */
77 voltage regulator (VDDint) to increase */ 54#define ANOMALY_05000147 (__SILICON_REVISION__ < 3)
78#define ANOMALY_05000270 /* High I/O activity causes output voltage of internal 55/* IMDMA S1/D1 channel may stall */
79 voltage regulator (VDDint) to decrease */ 56#define ANOMALY_05000149 (1)
80#define ANOMALY_05000272 /* Certain data cache write through modes fail for 57/* DMA engine may lose data due to incorrect handshaking */
81 VDDint <=0.9V */ 58#define ANOMALY_05000150 (__SILICON_REVISION__ < 3)
82#define ANOMALY_05000274 /* Data cache write back to external synchronous memory 59/* DMA stalls when all three controllers read data from the same source */
83 may be lost */ 60#define ANOMALY_05000151 (__SILICON_REVISION__ < 3)
84#define ANOMALY_05000275 /* PPI Timing and sampling informaton updates */ 61/* Execution stall when executing in L2 and doing external accesses */
85#define ANOMALY_05000312 /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC 62#define ANOMALY_05000152 (__SILICON_REVISION__ < 3)
86 registers are interrupted */ 63/* Frame Delay in SPORT Multichannel Mode */
64#define ANOMALY_05000153 (__SILICON_REVISION__ < 3)
65/* SPORT TFS signal stays active in multichannel mode outside of valid channels */
66#define ANOMALY_05000154 (__SILICON_REVISION__ < 3)
67/* Timers in PWM-Out Mode with PPI GP Receive (Input) Mode with 0 Frame Syncs */
68#define ANOMALY_05000156 (__SILICON_REVISION__ < 4)
69/* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */
70#define ANOMALY_05000157 (__SILICON_REVISION__ < 3)
71/* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1, or 1:1 */
72#define ANOMALY_05000159 (__SILICON_REVISION__ < 3)
73/* A read from external memory may return a wrong value with data cache enabled */
74#define ANOMALY_05000160 (__SILICON_REVISION__ < 3)
75/* Data Cache Fill data can be corrupted after/during Instruction DMA if certain core stalls exist */
76#define ANOMALY_05000161 (__SILICON_REVISION__ < 3)
77/* DMEM_CONTROL<12> is not set on Reset */
78#define ANOMALY_05000162 (__SILICON_REVISION__ < 3)
79/* SPORT transmit data is not gated by external frame sync in certain conditions */
80#define ANOMALY_05000163 (__SILICON_REVISION__ < 3)
81/* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */
82#define ANOMALY_05000166 (1)
83/* Turning Serial Ports on with External Frame Syncs */
84#define ANOMALY_05000167 (1)
85/* SDRAM auto-refresh and subsequent Power Ups */
86#define ANOMALY_05000168 (__SILICON_REVISION__ < 5)
87/* DATA CPLB page miss can result in lost write-through cache data writes */
88#define ANOMALY_05000169 (__SILICON_REVISION__ < 5)
89/* Boot-ROM code modifies SICA_IWRx wakeup registers */
90#define ANOMALY_05000171 (__SILICON_REVISION__ < 5)
91/* DSPID register values incorrect */
92#define ANOMALY_05000172 (__SILICON_REVISION__ < 3)
93/* DMA vs Core accesses to external memory */
94#define ANOMALY_05000173 (__SILICON_REVISION__ < 3)
95/* Cache Fill Buffer Data lost */
96#define ANOMALY_05000174 (__SILICON_REVISION__ < 5)
97/* Overlapping Sequencer and Memory Stalls */
98#define ANOMALY_05000175 (__SILICON_REVISION__ < 5)
99/* Multiplication of (-1) by (-1) followed by an accumulator saturation */
100#define ANOMALY_05000176 (__SILICON_REVISION__ < 5)
101/* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */
102#define ANOMALY_05000179 (__SILICON_REVISION__ < 5)
103/* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */
104#define ANOMALY_05000180 (1)
105/* Disabling the PPI resets the PPI configuration registers */
106#define ANOMALY_05000181 (__SILICON_REVISION__ < 5)
107/* IMDMA does not operate to full speed for 600MHz and higher devices */
108#define ANOMALY_05000182 (1)
109/* Timer Pin limitations for PPI TX Modes with External Frame Syncs */
110#define ANOMALY_05000184 (__SILICON_REVISION__ < 5)
111/* PPI TX Mode with 2 External Frame Syncs */
112#define ANOMALY_05000185 (__SILICON_REVISION__ < 5)
113/* PPI packing with Data Length greater than 8 bits (not a meaningful mode) */
114#define ANOMALY_05000186 (__SILICON_REVISION__ < 5)
115/* IMDMA Corrupted Data after a Halt */
116#define ANOMALY_05000187 (1)
117/* IMDMA Restrictions on Descriptor and Buffer Placement in Memory */
118#define ANOMALY_05000188 (__SILICON_REVISION__ < 5)
119/* False Protection Exceptions */
120#define ANOMALY_05000189 (__SILICON_REVISION__ < 5)
121/* PPI not functional at core voltage < 1Volt */
122#define ANOMALY_05000190 (1)
123/* PPI does not invert the Driving PPICLK edge in Transmit Modes */
124#define ANOMALY_05000191 (__SILICON_REVISION__ < 3)
125/* False I/O Pin Interrupts on Edge-Sensitive Inputs When Polarity Setting Is Changed */
126#define ANOMALY_05000193 (__SILICON_REVISION__ < 5)
127/* Restarting SPORT in Specific Modes May Cause Data Corruption */
128#define ANOMALY_05000194 (__SILICON_REVISION__ < 5)
129/* Failing MMR Accesses When Stalled by Preceding Memory Read */
130#define ANOMALY_05000198 (__SILICON_REVISION__ < 5)
131/* Current DMA Address Shows Wrong Value During Carry Fix */
132#define ANOMALY_05000199 (__SILICON_REVISION__ < 5)
133/* SPORT TFS and DT Are Incorrectly Driven During Inactive Channels in Certain Conditions */
134#define ANOMALY_05000200 (__SILICON_REVISION__ < 5)
135/* Possible Infinite Stall with Specific Dual-DAG Situation */
136#define ANOMALY_05000202 (__SILICON_REVISION__ < 5)
137/* Incorrect data read with write-through cache and allocate cache lines on reads only mode */
138#define ANOMALY_05000204 (__SILICON_REVISION__ < 5)
139/* Specific sequence that can cause DMA error or DMA stopping */
140#define ANOMALY_05000205 (__SILICON_REVISION__ < 5)
141/* Recovery from "Brown-Out" Condition */
142#define ANOMALY_05000207 (__SILICON_REVISION__ < 5)
143/* VSTAT Status Bit in PLL_STAT Register Is Not Functional */
144#define ANOMALY_05000208 (1)
145/* Speed Path in Computational Unit Affects Certain Instructions */
146#define ANOMALY_05000209 (__SILICON_REVISION__ < 5)
147/* UART TX Interrupt Masked Erroneously */
148#define ANOMALY_05000215 (__SILICON_REVISION__ < 5)
149/* NMI Event at Boot Time Results in Unpredictable State */
150#define ANOMALY_05000219 (__SILICON_REVISION__ < 5)
151/* Data Corruption with Cached External Memory and Non-Cached On-Chip L2 Memory */
152#define ANOMALY_05000220 (__SILICON_REVISION__ < 5)
153/* Incorrect Pulse-Width of UART Start Bit */
154#define ANOMALY_05000225 (__SILICON_REVISION__ < 5)
155/* Scratchpad Memory Bank Reads May Return Incorrect Data */
156#define ANOMALY_05000227 (__SILICON_REVISION__ < 5)
157/* UART Receiver is Less Robust Against Baudrate Differences in Certain Conditions */
158#define ANOMALY_05000230 (__SILICON_REVISION__ < 5)
159/* UART STB Bit Incorrectly Affects Receiver Setting */
160#define ANOMALY_05000231 (__SILICON_REVISION__ < 5)
161/* SPORT data transmit lines are incorrectly driven in multichannel mode */
162#define ANOMALY_05000232 (__SILICON_REVISION__ < 5)
163/* DF Bit in PLL_CTL Register Does Not Respond to Hardware Reset */
164#define ANOMALY_05000242 (__SILICON_REVISION__ < 5)
165/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
166#define ANOMALY_05000244 (__SILICON_REVISION__ < 5)
167/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
168#define ANOMALY_05000245 (__SILICON_REVISION__ < 5)
169/* TESTSET operation forces stall on the other core */
170#define ANOMALY_05000248 (__SILICON_REVISION__ < 5)
171/* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */
172#define ANOMALY_05000250 (__SILICON_REVISION__ > 2 && __SILICON_REVISION__ < 5)
173/* Exception Not Generated for MMR Accesses in Reserved Region */
174#define ANOMALY_05000251 (__SILICON_REVISION__ < 5)
175/* Maximum External Clock Speed for Timers */
176#define ANOMALY_05000253 (__SILICON_REVISION__ < 5)
177/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
178#define ANOMALY_05000254 (__SILICON_REVISION__ > 3)
179/* Interrupt/Exception During Short Hardware Loop May Cause Bad Instruction Fetches */
180#define ANOMALY_05000257 (__SILICON_REVISION__ < 5)
181/* Instruction Cache Is Corrupted When Bits 9 and 12 of the ICPLB Data Registers Differ */
182#define ANOMALY_05000258 (__SILICON_REVISION__ < 5)
183/* ICPLB_STATUS MMR Register May Be Corrupted */
184#define ANOMALY_05000260 (__SILICON_REVISION__ < 5)
185/* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */
186#define ANOMALY_05000261 (__SILICON_REVISION__ < 5)
187/* Stores To Data Cache May Be Lost */
188#define ANOMALY_05000262 (__SILICON_REVISION__ < 5)
189/* Hardware Loop Corrupted When Taking an ICPLB Exception */
190#define ANOMALY_05000263 (__SILICON_REVISION__ < 5)
191/* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */
192#define ANOMALY_05000264 (__SILICON_REVISION__ < 5)
193/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
194#define ANOMALY_05000265 (__SILICON_REVISION__ < 5)
195/* IMDMA destination IRQ status must be read prior to using IMDMA */
196#define ANOMALY_05000266 (__SILICON_REVISION__ > 3)
197/* IMDMA may corrupt data under certain conditions */
198#define ANOMALY_05000267 (1)
199/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Increase */
200#define ANOMALY_05000269 (1)
201/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
202#define ANOMALY_05000270 (1)
203/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
204#define ANOMALY_05000272 (1)
205/* Data cache write back to external synchronous memory may be lost */
206#define ANOMALY_05000274 (1)
207/* PPI Timing and Sampling Information Updates */
208#define ANOMALY_05000275 (__SILICON_REVISION__ > 2)
209/* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */
210#define ANOMALY_05000276 (__SILICON_REVISION__ < 5)
211/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
212#define ANOMALY_05000278 (__SILICON_REVISION__ < 5)
213/* False Hardware Error Exception When ISR Context Is Not Restored */
214#define ANOMALY_05000281 (__SILICON_REVISION__ < 5)
215/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
216#define ANOMALY_05000283 (1)
217/* A read will receive incorrect data under certain conditions */
218#define ANOMALY_05000287 (__SILICON_REVISION__ < 5)
219/* SPORTs May Receive Bad Data If FIFOs Fill Up */
220#define ANOMALY_05000288 (__SILICON_REVISION__ < 5)
221/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
222#define ANOMALY_05000301 (1)
223/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
224#define ANOMALY_05000302 (1)
225/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */
226#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
227/* SCKELOW Bit Does Not Maintain State Through Hibernate */
228#define ANOMALY_05000307 (__SILICON_REVISION__ < 5)
229/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
230#define ANOMALY_05000310 (1)
231/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
232#define ANOMALY_05000312 (1)
233/* PPI Is Level-Sensitive on First Transfer */
234#define ANOMALY_05000313 (1)
235/* Killed System MMR Write Completes Erroneously On Next System MMR Access */
236#define ANOMALY_05000315 (1)
237/* PF2 Output Remains Asserted After SPI Master Boot */
238#define ANOMALY_05000320 (__SILICON_REVISION__ > 3)
239/* Erroneous GPIO Flag Pin Operations Under Specific Sequences */
240#define ANOMALY_05000323 (1)
241/* SPORT Secondary Receive Channel Not Functional When Word Length Exceeds 16 Bits */
242#define ANOMALY_05000326 (__SILICON_REVISION__ > 3)
243/* New Feature: 24-Bit SPI Boot Mode Support (Not Available On Older Silicon) */
244#define ANOMALY_05000331 (__SILICON_REVISION__ < 5)
245/* New Feature: Slave SPI Boot Mode Supported (Not Available On Older Silicon) */
246#define ANOMALY_05000332 (__SILICON_REVISION__ < 5)
247/* Flag Data Register Writes One SCLK Cycle After Edge Is Detected May Clear Interrupt Status */
248#define ANOMALY_05000333 (__SILICON_REVISION__ < 5)
87 249
88#endif /* (defined(CONFIG_BF_REV_0_5) || defined(CONFIG_BF_REV_0_3)) */ 250/* Anomalies that don't exist on this proc */
251#define ANOMALY_05000158 (0)
252#define ANOMALY_05000183 (0)
253#define ANOMALY_05000273 (0)
254#define ANOMALY_05000311 (0)
89 255
90#if (defined(CONFIG_BF_REV_0_5))
91#define ANOMALY_05000254 /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT
92 mode with external clock */
93#define ANOMALY_05000266 /* IMDMA destination IRQ status must be read prior to
94 using IMDMA */
95#endif 256#endif
96
97#if (defined(CONFIG_BF_REV_0_3))
98#define ANOMALY_05000156 /* Timers in PWM-Out Mode with PPI GP Receive (Input)
99 Mode with 0 Frame Syncs */
100#define ANOMALY_05000168 /* SDRAM auto-refresh and subsequent Power Ups */
101#define ANOMALY_05000169 /* DATA CPLB page miss can result in lost write-through
102 cache data writes */
103#define ANOMALY_05000171 /* Boot-ROM code modifies SICA_IWRx wakeup registers */
104#define ANOMALY_05000174 /* Cache Fill Buffer Data lost */
105#define ANOMALY_05000175 /* Overlapping Sequencer and Memory Stalls */
106#define ANOMALY_05000176 /* Multiplication of (-1) by (-1) followed by an
107 accumulator saturation */
108#define ANOMALY_05000179 /* PPI_COUNT cannot be programmed to 0 in General
109 Purpose TX or RX modes */
110#define ANOMALY_05000181 /* Disabling the PPI resets the PPI configuration
111 registers */
112#define ANOMALY_05000184 /* Timer Pin limitations for PPI TX Modes with
113 External Frame Syncs */
114#define ANOMALY_05000185 /* PPI TX Mode with 2 External Frame Syncs */
115#define ANOMALY_05000186 /* PPI packing with Data Length greater than 8 bits
116 (not a meaningful mode) */
117#define ANOMALY_05000188 /* IMDMA Restrictions on Descriptor and Buffer
118 Placement in Memory */
119#define ANOMALY_05000189 /* False Protection Exception */
120#define ANOMALY_05000193 /* False Flag Pin Interrupts on Edge Sensitive Inputs
121 when polarity setting is changed */
122#define ANOMALY_05000194 /* Restarting SPORT in specific modes may cause data
123 corruption */
124#define ANOMALY_05000198 /* Failing MMR accesses when stalled by preceding
125 memory read */
126#define ANOMALY_05000199 /* DMA current address shows wrong value during carry
127 fix */
128#define ANOMALY_05000200 /* SPORT TFS and DT are incorrectly driven during
129 inactive channels in certain conditions */
130#define ANOMALY_05000202 /* Possible infinite stall with specific dual-DAG
131 situation */
132#define ANOMALY_05000204 /* Incorrect data read with write-through cache and
133 allocate cache lines on reads only mode */
134#define ANOMALY_05000205 /* Specific sequence that can cause DMA error or DMA
135 stopping */
136#define ANOMALY_05000207 /* Recovery from "brown-out" condition */
137#define ANOMALY_05000209 /* Speed-Path in computational unit affects certain
138 instructions */
139#define ANOMALY_05000215 /* UART TX Interrupt masked erroneously */
140#define ANOMALY_05000219 /* NMI event at boot time results in unpredictable
141 state */
142#define ANOMALY_05000220 /* Data Corruption with Cached External Memory and
143 Non-Cached On-Chip L2 Memory */
144#define ANOMALY_05000225 /* Incorrect pulse-width of UART start-bit */
145#define ANOMALY_05000227 /* Scratchpad memory bank reads may return incorrect
146 data */
147#define ANOMALY_05000230 /* UART Receiver is less robust against Baudrate
148 Differences in certain Conditions */
149#define ANOMALY_05000231 /* UART STB bit incorrectly affects receiver setting */
150#define ANOMALY_05000232 /* SPORT data transmit lines are incorrectly driven in
151 multichannel mode */
152#define ANOMALY_05000242 /* DF bit in PLL_CTL register does not respond to
153 hardware reset */
154#define ANOMALY_05000244 /* If i-cache is on, CSYNC/SSYNC/IDLE around Change of
155 Control causes failures */
156#define ANOMALY_05000248 /* TESTSET operation forces stall on the other core */
157#define ANOMALY_05000250 /* Incorrect Bit-Shift of Data Word in Multichannel
158 (TDM) mode in certain conditions */
159#define ANOMALY_05000251 /* Exception not generated for MMR accesses in
160 reserved region */
161#define ANOMALY_05000253 /* Maximum external clock speed for Timers */
162#define ANOMALY_05000258 /* Instruction Cache is corrupted when bits 9 and 12
163 of the ICPLB Data registers differ */
164#define ANOMALY_05000260 /* ICPLB_STATUS MMR register may be corrupted */
165#define ANOMALY_05000261 /* DCPLB_FAULT_ADDR MMR register may be corrupted */
166#define ANOMALY_05000262 /* Stores to data cache may be lost */
167#define ANOMALY_05000263 /* Hardware loop corrupted when taking an ICPLB
168 exception */
169#define ANOMALY_05000264 /* CSYNC/SSYNC/IDLE causes infinite stall in second
170 to last instruction in hardware loop */
171#define ANOMALY_05000276 /* Timing requirements change for External Frame
172 Sync PPI Modes with non-zero PPI_DELAY */
173#define ANOMALY_05000278 /* Disabling Peripherals with DMA running may cause
174 DMA system instability */
175#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context is
176 not restored */
177#define ANOMALY_05000283 /* An MMR write is stalled indefinitely when killed
178 in a particular stage */
179#define ANOMALY_05000287 /* A read will receive incorrect data under certain
180 conditions */
181#define ANOMALY_05000288 /* SPORTs may receive bad data if FIFOs fill up */
182#endif
183
184#endif /* _MACH_ANOMALY_H_ */
diff --git a/include/asm-blackfin/mach-bf561/bf561.h b/include/asm-blackfin/mach-bf561/bf561.h
index 96a5d3a47e45..17e1d5dcef02 100644
--- a/include/asm-blackfin/mach-bf561/bf561.h
+++ b/include/asm-blackfin/mach-bf561/bf561.h
@@ -73,13 +73,13 @@
73 */ 73 */
74 74
75 75
76#define BLKFIN_ISUBBANKS 4 76#define BFIN_ISUBBANKS 4
77#define BLKFIN_IWAYS 4 77#define BFIN_IWAYS 4
78#define BLKFIN_ILINES 32 78#define BFIN_ILINES 32
79 79
80#define BLKFIN_DSUBBANKS 4 80#define BFIN_DSUBBANKS 4
81#define BLKFIN_DWAYS 2 81#define BFIN_DWAYS 2
82#define BLKFIN_DLINES 64 82#define BFIN_DLINES 64
83 83
84#define WAY0_L 0x1 84#define WAY0_L 0x1
85#define WAY1_L 0x2 85#define WAY1_L 0x2
@@ -230,93 +230,6 @@
230 230
231#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO | V_B0PEN | V_B1PEN | V_B2PEN | V_B3PEN | 0x0002) 231#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO | V_B0PEN | V_B1PEN | V_B2PEN | V_B3PEN | 0x0002)
232 232
233#define MAX_VC 600000000
234#define MIN_VC 50000000
235
236/******************************* PLL Settings ********************************/
237#ifdef CONFIG_BFIN_KERNEL_CLOCK
238#if (CONFIG_VCO_MULT < 0)
239#error "VCO Multiplier is less than 0. Please select a different value"
240#endif
241
242#if (CONFIG_VCO_MULT == 0)
243#error "VCO Multiplier should be greater than 0. Please select a different value"
244#endif
245
246#ifndef CONFIG_CLKIN_HALF
247#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
248#else
249#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
250#endif
251
252#ifndef CONFIG_PLL_BYPASS
253#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
254#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
255#else
256#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
257#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
258#endif
259
260#if (CONFIG_SCLK_DIV < 1)
261#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
262#endif
263
264#if (CONFIG_SCLK_DIV > 15)
265#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value"
266#endif
267
268#if (CONFIG_CCLK_DIV != 1)
269#if (CONFIG_CCLK_DIV != 2)
270#if (CONFIG_CCLK_DIV != 4)
271#if (CONFIG_CCLK_DIV != 8)
272#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value"
273#endif
274#endif
275#endif
276#endif
277
278#if (CONFIG_VCO_HZ > MAX_VC)
279#error "VCO selected is more than maximum value. Please change the VCO multipler"
280#endif
281
282#if (CONFIG_SCLK_HZ > 133000000)
283#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
284#endif
285
286#if (CONFIG_SCLK_HZ < 27000000)
287#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
288#endif
289
290#if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ)
291#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ)
292#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
293#error "Please select sclk less than cclk"
294#endif
295#endif
296#endif
297
298#if (CONFIG_CCLK_DIV == 1)
299#define CONFIG_CCLK_ACT_DIV CCLK_DIV1
300#endif
301#if (CONFIG_CCLK_DIV == 2)
302#define CONFIG_CCLK_ACT_DIV CCLK_DIV2
303#endif
304#if (CONFIG_CCLK_DIV == 4)
305#define CONFIG_CCLK_ACT_DIV CCLK_DIV4
306#endif
307#if (CONFIG_CCLK_DIV == 8)
308#define CONFIG_CCLK_ACT_DIV CCLK_DIV8
309#endif
310#ifndef CONFIG_CCLK_ACT_DIV
311#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly
312#endif
313
314#if defined(ANOMALY_05000273) && (CONFIG_CCLK_DIV == 1)
315#error ANOMALY 05000273, please make sure CCLK is at least 2x SCLK
316#endif
317
318#endif /* CONFIG_BFIN_KERNEL_CLOCK */
319
320#ifdef CONFIG_BF561 233#ifdef CONFIG_BF561
321#define CPU "BF561" 234#define CPU "BF561"
322#define CPUID 0x027bb000 235#define CPUID 0x027bb000
@@ -326,83 +239,4 @@
326#define CPUID 0x0 239#define CPUID 0x0
327#endif 240#endif
328 241
329#if (CONFIG_MEM_SIZE % 4)
330#error "SDRAM memory size must be a multiple of 4MB!"
331#endif
332#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
333#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
334#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
335#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
336
337/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/
338
339#define ANOMALY_05000158_WORKAROUND 0x200
340#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */
341#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_DIRTY \
342 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
343#else /*Write Through */
344#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_DIRTY \
345 | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
346#endif
347
348
349#define L1_DMEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
350#define SDRAM_DNON_CHBL (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY)
351#define SDRAM_EBIU (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY)
352#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
353
354#define L2_MEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY)
355
356#define SIZE_1K 0x00000400 /* 1K */
357#define SIZE_4K 0x00001000 /* 4K */
358#define SIZE_1M 0x00100000 /* 1M */
359#define SIZE_4M 0x00400000 /* 4M */
360
361#define MAX_CPLBS (16 * 2)
362
363/*
364* Number of required data CPLB switchtable entries
365* MEMSIZE / 4 (we mostly install 4M page size CPLBs
366* approx 16 for smaller 1MB page size CPLBs for allignment purposes
367* 1 for L1 Data Memory
368* 1 for L2 Data Memory
369* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
370* 64 for ASYNC Memory
371*/
372
373
374#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 + 64) * 2)
375
376/*
377* Number of required instruction CPLB switchtable entries
378* MEMSIZE / 4 (we mostly install 4M page size CPLBs
379* approx 12 for smaller 1MB page size CPLBs for allignment purposes
380* 1 for L1 Instruction Memory
381* 1 for L2 Instruction Memory
382* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
383*/
384
385#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2)
386
387#if 0 /* comment by mhfan */
388/* Event Vector Table Address */
389#define EVT_EMULATION_ADDR 0xffe02000
390#define EVT_RESET_ADDR 0xffe02004
391#define EVT_NMI_ADDR 0xffe02008
392#define EVT_EXCEPTION_ADDR 0xffe0200c
393#define EVT_GLOBAL_INT_ENB_ADDR 0xffe02010
394#define EVT_HARDWARE_ERROR_ADDR 0xffe02014
395#define EVT_TIMER_ADDR 0xffe02018
396#define EVT_IVG7_ADDR 0xffe0201c
397#define EVT_IVG8_ADDR 0xffe02020
398#define EVT_IVG9_ADDR 0xffe02024
399#define EVT_IVG10_ADDR 0xffe02028
400#define EVT_IVG11_ADDR 0xffe0202c
401#define EVT_IVG12_ADDR 0xffe02030
402#define EVT_IVG13_ADDR 0xffe02034
403#define EVT_IVG14_ADDR 0xffe02038
404#define EVT_IVG15_ADDR 0xffe0203c
405#define EVT_OVERRIDE_ADDR 0xffe02100
406#endif /* comment by mhfan */
407
408#endif /* __MACH_BF561_H__ */ 242#endif /* __MACH_BF561_H__ */
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h
index 2537c845e8b0..562aee39895c 100644
--- a/include/asm-blackfin/mach-bf561/blackfin.h
+++ b/include/asm-blackfin/mach-bf561/blackfin.h
@@ -38,7 +38,7 @@
38#include "defBF561.h" 38#include "defBF561.h"
39#include "anomaly.h" 39#include "anomaly.h"
40 40
41#if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) 41#if !defined(__ASSEMBLY__)
42#include "cdefBF561.h" 42#include "cdefBF561.h"
43#endif 43#endif
44 44
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 73d4d65249cd..d667816486c0 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -31,11 +31,8 @@
31#ifndef _CDEF_BF561_H 31#ifndef _CDEF_BF561_H
32#define _CDEF_BF561_H 32#define _CDEF_BF561_H
33 33
34/* 34#include <asm/blackfin.h>
35#if !defined(__ADSPBF561__) 35
36#warning cdefBF561.h should only be included for BF561 chip.
37#endif
38*/
39/* include all Core registers and bit definitions */ 36/* include all Core registers and bit definitions */
40#include "defBF561.h" 37#include "defBF561.h"
41 38
@@ -67,7 +64,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
67 bfin_write32(SICA_IWR1, 0); 64 bfin_write32(SICA_IWR1, 0);
68 65
69 bfin_write16(VR_CTL, val); 66 bfin_write16(VR_CTL, val);
70 __builtin_bfin_ssync(); 67 SSYNC();
71 68
72 local_irq_save(flags); 69 local_irq_save(flags);
73 asm("IDLE;"); 70 asm("IDLE;");
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 0f2dc6e6335b..bf7dc4e00065 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -120,6 +120,7 @@
120#define UART_GCTL 0xFFC00424 /* Global Control Register */ 120#define UART_GCTL 0xFFC00424 /* Global Control Register */
121 121
122/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 122/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
123#define SPI0_REGBASE 0xFFC00500
123#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 124#define SPI_CTL 0xFFC00500 /* SPI Control Register */
124#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 125#define SPI_FLG 0xFFC00504 /* SPI Flag register */
125#define SPI_STAT 0xFFC00508 /* SPI Status register */ 126#define SPI_STAT 0xFFC00508 /* SPI Status register */
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h
index a753ce720d74..12789927db3d 100644
--- a/include/asm-blackfin/mach-bf561/irq.h
+++ b/include/asm-blackfin/mach-bf561/irq.h
@@ -289,6 +289,8 @@
289#define IRQ_PF46 119 289#define IRQ_PF46 119
290#define IRQ_PF47 120 290#define IRQ_PF47 120
291 291
292#define GPIO_IRQ_BASE IRQ_PF0
293
292#ifdef CONFIG_IRQCHIP_DEMUX_GPIO 294#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
293#define NR_IRQS (IRQ_PF47 + 1) 295#define NR_IRQS (IRQ_PF47 + 1)
294#else 296#else
diff --git a/include/asm-blackfin/mach-bf561/mem_map.h b/include/asm-blackfin/mach-bf561/mem_map.h
index ebac9a8d838d..f7ac09cf2c3d 100644
--- a/include/asm-blackfin/mach-bf561/mem_map.h
+++ b/include/asm-blackfin/mach-bf561/mem_map.h
@@ -21,10 +21,10 @@
21 21
22/* Level 1 Memory */ 22/* Level 1 Memory */
23 23
24#ifdef CONFIG_BLKFIN_CACHE 24#ifdef CONFIG_BFIN_ICACHE
25#define BLKFIN_ICACHESIZE (16*1024) 25#define BFIN_ICACHESIZE (16*1024)
26#else 26#else
27#define BLKFIN_ICACHESIZE (0*1024) 27#define BFIN_ICACHESIZE (0*1024)
28#endif 28#endif
29 29
30/* Memory Map for ADSP-BF561 processors */ 30/* Memory Map for ADSP-BF561 processors */
@@ -36,29 +36,29 @@
36 36
37#define L1_CODE_LENGTH 0x4000 37#define L1_CODE_LENGTH 0x4000
38 38
39#ifdef CONFIG_BLKFIN_DCACHE 39#ifdef CONFIG_BFIN_DCACHE
40 40
41#ifdef CONFIG_BLKFIN_DCACHE_BANKA 41#ifdef CONFIG_BFIN_DCACHE_BANKA
42#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) 42#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
43#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 43#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
44#define L1_DATA_B_LENGTH 0x8000 44#define L1_DATA_B_LENGTH 0x8000
45#define BLKFIN_DCACHESIZE (16*1024) 45#define BFIN_DCACHESIZE (16*1024)
46#define BLKFIN_DSUPBANKS 1 46#define BFIN_DSUPBANKS 1
47#else 47#else
48#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) 48#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
49#define L1_DATA_A_LENGTH (0x8000 - 0x4000) 49#define L1_DATA_A_LENGTH (0x8000 - 0x4000)
50#define L1_DATA_B_LENGTH (0x8000 - 0x4000) 50#define L1_DATA_B_LENGTH (0x8000 - 0x4000)
51#define BLKFIN_DCACHESIZE (32*1024) 51#define BFIN_DCACHESIZE (32*1024)
52#define BLKFIN_DSUPBANKS 2 52#define BFIN_DSUPBANKS 2
53#endif 53#endif
54 54
55#else 55#else
56#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) 56#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
57#define L1_DATA_A_LENGTH 0x8000 57#define L1_DATA_A_LENGTH 0x8000
58#define L1_DATA_B_LENGTH 0x8000 58#define L1_DATA_B_LENGTH 0x8000
59#define BLKFIN_DCACHESIZE (0*1024) 59#define BFIN_DCACHESIZE (0*1024)
60#define BLKFIN_DSUPBANKS 0 60#define BFIN_DSUPBANKS 0
61#endif /*CONFIG_BLKFIN_DCACHE*/ 61#endif /*CONFIG_BFIN_DCACHE*/
62#endif 62#endif
63 63
64/* Level 2 Memory */ 64/* Level 2 Memory */
diff --git a/include/asm-blackfin/mach-bf561/portmux.h b/include/asm-blackfin/mach-bf561/portmux.h
index 10d11d5ffe23..132ad31665e3 100644
--- a/include/asm-blackfin/mach-bf561/portmux.h
+++ b/include/asm-blackfin/mach-bf561/portmux.h
@@ -81,7 +81,7 @@
81#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PF1)) 81#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PF1))
82#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PF0)) 82#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PF0))
83#define P_SPI0_MOSI (P_DONTCARE) 83#define P_SPI0_MOSI (P_DONTCARE)
84#define P_SPI0_MIS0 (P_DONTCARE) 84#define P_SPI0_MISO (P_DONTCARE)
85#define P_SPI0_SCK (P_DONTCARE) 85#define P_SPI0_SCK (P_DONTCARE)
86 86
87#endif /* _MACH_PORTMUX_H_ */ 87#endif /* _MACH_PORTMUX_H_ */
diff --git a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
index 94ed381e5606..ede210eca4ec 100644
--- a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
@@ -39,7 +39,7 @@
39#define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS) 39#define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS)
40#define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val) 40#define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val)
41#define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL) 41#define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL)
42#ifdef ANOMALY_05000125 42#if ANOMALY_05000125
43extern void bfin_write_DMEM_CONTROL(unsigned int val); 43extern void bfin_write_DMEM_CONTROL(unsigned int val);
44#else 44#else
45#define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val) 45#define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val)
@@ -129,7 +129,7 @@ extern void bfin_write_DMEM_CONTROL(unsigned int val);
129#define DTEST_DATA3 0xFFE0040C 129#define DTEST_DATA3 0xFFE0040C
130*/ 130*/
131#define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) 131#define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL)
132#ifdef ANOMALY_05000125 132#if ANOMALY_05000125
133extern void bfin_write_IMEM_CONTROL(unsigned int val); 133extern void bfin_write_IMEM_CONTROL(unsigned int val);
134#else 134#else
135#define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val) 135#define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val)
diff --git a/include/asm-blackfin/mach-common/clocks.h b/include/asm-blackfin/mach-common/clocks.h
new file mode 100644
index 000000000000..033bba92d61c
--- /dev/null
+++ b/include/asm-blackfin/mach-common/clocks.h
@@ -0,0 +1,70 @@
1/*
2 * File: include/asm-blackfin/mach-common/clocks.h
3 * Based on: include/asm-blackfin/mach-bf537/bf537.h
4 * Author: Robin Getz <rgetz@blackfin.uclinux.org>
5 *
6 * Created: 25Jul07
7 * Description: Common Clock definitions for various kernel files
8 *
9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#ifndef _BFIN_CLOCKS_H
31#define _BFIN_CLOCKS_H
32
33#ifdef CONFIG_CCLK_DIV_1
34# define CONFIG_CCLK_ACT_DIV CCLK_DIV1
35# define CONFIG_CCLK_DIV 1
36#endif
37
38#ifdef CONFIG_CCLK_DIV_2
39# define CONFIG_CCLK_ACT_DIV CCLK_DIV2
40# define CONFIG_CCLK_DIV 2
41#endif
42
43#ifdef CONFIG_CCLK_DIV_4
44# define CONFIG_CCLK_ACT_DIV CCLK_DIV4
45# define CONFIG_CCLK_DIV 4
46#endif
47
48#ifdef CONFIG_CCLK_DIV_8
49# define CONFIG_CCLK_ACT_DIV CCLK_DIV8
50# define CONFIG_CCLK_DIV 8
51#endif
52
53#ifndef CONFIG_PLL_BYPASS
54# ifndef CONFIG_CLKIN_HALF
55# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
56# else
57# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2)
58# endif
59
60# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV)
61# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV)
62
63#else
64# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ)
65# define CONFIG_CCLK_HZ (CONFIG_CLKIN_HZ)
66# define CONFIG_SCLK_HZ (CONFIG_CLKIN_HZ)
67# define CONFIG_VCO_MULT 0
68#endif
69
70#endif
diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h
index be1ece8c0c27..c1d8c4a78fcf 100644
--- a/include/asm-blackfin/mach-common/def_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h
@@ -33,81 +33,77 @@
33 33
34#include <asm/mach/anomaly.h> 34#include <asm/mach/anomaly.h>
35 35
36/*#if !defined(__ADSPLPBLACKFIN__)
37#warning def_LPBlackfin.h should only be included for 532 compatible chips.
38#endif
39*/
40
41#define MK_BMSK_(x) (1<<x) 36#define MK_BMSK_(x) (1<<x)
42 37
43#if defined(ANOMALY_05000198) 38#ifndef __ASSEMBLY__
44
45#define bfin_read8(addr) ({ unsigned char __v; \
46 __asm__ __volatile__ ("NOP;\n\t" \
47 "%0 = b[%1] (z);\n\t" \
48 : "=d"(__v) : "a"(addr)); \
49 __v; })
50
51#define bfin_read16(addr) ({ unsigned __v; \
52 __asm__ __volatile__ ("NOP;\n\t"\
53 "%0 = w[%1] (z);\n\t"\
54 : "=d"(__v) : "a"(addr)); (unsigned short)__v; })
55
56#define bfin_read32(addr) ({ unsigned __v; \
57 __asm__ __volatile__ ("NOP;\n\t"\
58 "%0 = [%1];\n\t"\
59 : "=d"(__v) : "a"(addr)); __v; })
60
61#define bfin_write8(addr, val) ({ \
62 __asm__ __volatile__ ("NOP;\n\t" \
63 "b[%0] = %1;\n\t" \
64 : : "a"(addr), "d"(val) : "memory");})
65 39
66#define bfin_write16(addr,val) ({\ 40#include <linux/types.h>
67 __asm__ __volatile__ ("NOP;\n\t"\
68 "w[%0] = %1;\n\t"\
69 : : "a"(addr) , "d"(val) : "memory");})
70
71#define bfin_write32(addr,val) ({\
72 __asm__ __volatile__ ("NOP;\n\t"\
73 "[%0] = %1;\n\t"\
74 : : "a"(addr) , "d"(val) : "memory");})
75 41
42#if ANOMALY_05000198
43# define NOP_PAD_ANOMALY_05000198 "nop;"
76#else 44#else
77 45# define NOP_PAD_ANOMALY_05000198
78#define bfin_read8(addr) ({ unsigned char __v; \
79 __asm__ __volatile__ ( \
80 "%0 = b[%1] (z);\n\t" \
81 :"=d"(__v) : "a"(addr)); \
82 __v; })
83
84#define bfin_read16(addr) ({ unsigned __v; \
85 __asm__ __volatile__ (\
86 "%0 = w[%1] (z);\n\t"\
87 : "=d"(__v) : "a"(addr)); (unsigned short)__v; })
88
89#define bfin_read32(addr) ({ unsigned __v; \
90 __asm__ __volatile__ (\
91 "%0 = [%1];\n\t"\
92 : "=d"(__v) : "a"(addr)); __v; })
93
94#define bfin_write8(addr, val) ({ \
95 __asm__ __volatile__ ( \
96 "b[%0] = %1; \n\t" \
97 ::"a"(addr), "d"(val) : "memory");})
98
99#define bfin_write16(addr,val) ({\
100 __asm__ __volatile__ (\
101 "w[%0] = %1;\n\t"\
102 : : "a"(addr) , "d"(val) : "memory");})
103
104#define bfin_write32(addr,val) ({\
105 __asm__ __volatile__ (\
106 "[%0] = %1;\n\t"\
107 : : "a"(addr) , "d"(val) : "memory");})
108
109#endif 46#endif
110 47
48#define bfin_read8(addr) ({ \
49 uint8_t __v; \
50 __asm__ __volatile__( \
51 NOP_PAD_ANOMALY_05000198 \
52 "%0 = b[%1] (z);" \
53 : "=d" (__v) \
54 : "a" (addr) \
55 ); \
56 __v; })
57
58#define bfin_read16(addr) ({ \
59 uint16_t __v; \
60 __asm__ __volatile__( \
61 NOP_PAD_ANOMALY_05000198 \
62 "%0 = w[%1] (z);" \
63 : "=d" (__v) \
64 : "a" (addr) \
65 ); \
66 __v; })
67
68#define bfin_read32(addr) ({ \
69 uint32_t __v; \
70 __asm__ __volatile__( \
71 NOP_PAD_ANOMALY_05000198 \
72 "%0 = [%1];" \
73 : "=d" (__v) \
74 : "a" (addr) \
75 ); \
76 __v; })
77
78#define bfin_write8(addr, val) \
79 __asm__ __volatile__( \
80 NOP_PAD_ANOMALY_05000198 \
81 "b[%0] = %1;" \
82 : \
83 : "a" (addr), "d" (val) \
84 : "memory" \
85 )
86
87#define bfin_write16(addr, val) \
88 __asm__ __volatile__( \
89 NOP_PAD_ANOMALY_05000198 \
90 "w[%0] = %1;" \
91 : \
92 : "a" (addr), "d" (val) \
93 : "memory" \
94 )
95
96#define bfin_write32(addr, val) \
97 __asm__ __volatile__( \
98 NOP_PAD_ANOMALY_05000198 \
99 "[%0] = %1;" \
100 : \
101 : "a" (addr), "d" (val) \
102 : "memory" \
103 )
104
105#endif /* __ASSEMBLY__ */
106
111/************************************************** 107/**************************************************
112 * System Register Bits 108 * System Register Bits
113 **************************************************/ 109 **************************************************/
@@ -643,6 +639,7 @@
643#define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access 639#define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access
644 * allowed (user mode) 640 * allowed (user mode)
645 */ 641 */
642
646#define PAGE_SIZE_1KB 0x00000000 /* 1 KB page size */ 643#define PAGE_SIZE_1KB 0x00000000 /* 1 KB page size */
647#define PAGE_SIZE_4KB 0x00010000 /* 4 KB page size */ 644#define PAGE_SIZE_4KB 0x00010000 /* 4 KB page size */
648#define PAGE_SIZE_1MB 0x00020000 /* 1 MB page size */ 645#define PAGE_SIZE_1MB 0x00020000 /* 1 MB page size */
@@ -675,6 +672,8 @@
675 */ 672 */
676#define CPLB_WT 0x00004000 /* 0=write-back, 1=write-through */ 673#define CPLB_WT 0x00004000 /* 0=write-back, 1=write-through */
677 674
675#define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
676
678/* TBUFCTL Masks */ 677/* TBUFCTL Masks */
679#define TBUFPWR 0x0001 678#define TBUFPWR 0x0001
680#define TBUFEN 0x0002 679#define TBUFEN 0x0002
diff --git a/include/asm-blackfin/pgtable.h b/include/asm-blackfin/pgtable.h
index 5a8f9e431c40..b11b114689c0 100644
--- a/include/asm-blackfin/pgtable.h
+++ b/include/asm-blackfin/pgtable.h
@@ -4,7 +4,7 @@
4#include <asm-generic/4level-fixup.h> 4#include <asm-generic/4level-fixup.h>
5 5
6#include <asm/page.h> 6#include <asm/page.h>
7#include <asm/cplb.h> 7#include <asm/mach-common/def_LPBlackfin.h>
8 8
9typedef pte_t *pte_addr_t; 9typedef pte_t *pte_addr_t;
10/* 10/*
diff --git a/include/asm-blackfin/reboot.h b/include/asm-blackfin/reboot.h
new file mode 100644
index 000000000000..6d448b5f5985
--- /dev/null
+++ b/include/asm-blackfin/reboot.h
@@ -0,0 +1,20 @@
1/*
2 * include/asm-blackfin/reboot.h - shutdown/reboot header
3 *
4 * Copyright 2004-2007 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_REBOOT_H__
10#define __ASM_REBOOT_H__
11
12/* optional board specific hooks */
13extern void native_machine_restart(char *cmd);
14extern void native_machine_halt(void);
15extern void native_machine_power_off(void);
16
17/* common reboot workarounds */
18extern void bfin_gpio_reset_spi0_ssel1(void);
19
20#endif
diff --git a/include/asm-blackfin/system.h b/include/asm-blackfin/system.h
index 5e5f1a0566c0..2b3d47d0bbb6 100644
--- a/include/asm-blackfin/system.h
+++ b/include/asm-blackfin/system.h
@@ -36,6 +36,7 @@
36 36
37#include <linux/linkage.h> 37#include <linux/linkage.h>
38#include <linux/compiler.h> 38#include <linux/compiler.h>
39#include <asm/mach/anomaly.h>
39 40
40/* 41/*
41 * Interrupt configuring macros. 42 * Interrupt configuring macros.
@@ -43,53 +44,60 @@
43 44
44extern unsigned long irq_flags; 45extern unsigned long irq_flags;
45 46
46#define local_irq_enable() do { \ 47#define local_irq_enable() \
47 __asm__ __volatile__ ( \ 48 __asm__ __volatile__( \
48 "sti %0;" \ 49 "sti %0;" \
49 ::"d"(irq_flags)); \ 50 : \
50} while (0) 51 : "d" (irq_flags) \
52 )
51 53
52#define local_irq_disable() do { \ 54#define local_irq_disable() \
53 int _tmp_dummy; \ 55 do { \
54 __asm__ __volatile__ ( \ 56 int __tmp_dummy; \
55 "cli %0;" \ 57 __asm__ __volatile__( \
56 :"=d" (_tmp_dummy):); \ 58 "cli %0;" \
57} while (0) 59 : "=d" (__tmp_dummy) \
60 ); \
61 } while (0)
58 62
59#if defined(ANOMALY_05000244) && defined (CONFIG_BLKFIN_CACHE) 63#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
60#define idle_with_irq_disabled() do { \ 64# define NOP_PAD_ANOMALY_05000244 "nop; nop;"
61 __asm__ __volatile__ ( \
62 "nop; nop;\n" \
63 ".align 8;\n" \
64 "sti %0; idle;\n" \
65 ::"d" (irq_flags)); \
66} while (0)
67#else 65#else
68#define idle_with_irq_disabled() do { \ 66# define NOP_PAD_ANOMALY_05000244
69 __asm__ __volatile__ ( \
70 ".align 8;\n" \
71 "sti %0; idle;\n" \
72 ::"d" (irq_flags)); \
73} while (0)
74#endif 67#endif
75 68
69#define idle_with_irq_disabled() \
70 __asm__ __volatile__( \
71 NOP_PAD_ANOMALY_05000244 \
72 ".align 8;" \
73 "sti %0;" \
74 "idle;" \
75 : \
76 : "d" (irq_flags) \
77 )
78
76#ifdef CONFIG_DEBUG_HWERR 79#ifdef CONFIG_DEBUG_HWERR
77#define __save_and_cli(x) do { \ 80# define __save_and_cli(x) \
78 __asm__ __volatile__ ( \ 81 __asm__ __volatile__( \
79 "cli %0;\n\tsti %1;" \ 82 "cli %0;" \
80 :"=&d"(x): "d" (0x3F)); \ 83 "sti %1;" \
81} while (0) 84 : "=&d" (x) \
85 : "d" (0x3F) \
86 )
82#else 87#else
83#define __save_and_cli(x) do { \ 88# define __save_and_cli(x) \
84 __asm__ __volatile__ ( \ 89 __asm__ __volatile__( \
85 "cli %0;" \ 90 "cli %0;" \
86 :"=&d"(x):); \ 91 : "=&d" (x) \
87} while (0) 92 )
88#endif 93#endif
89 94
90#define local_save_flags(x) asm volatile ("cli %0;" \ 95#define local_save_flags(x) \
91 "sti %0;" \ 96 __asm__ __volatile__( \
92 :"=d"(x):); 97 "cli %0;" \
98 "sti %0;" \
99 : "=d" (x) \
100 )
93 101
94#ifdef CONFIG_DEBUG_HWERR 102#ifdef CONFIG_DEBUG_HWERR
95#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0) 103#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
@@ -97,10 +105,11 @@ extern unsigned long irq_flags;
97#define irqs_enabled_from_flags(x) ((x) != 0x1f) 105#define irqs_enabled_from_flags(x) ((x) != 0x1f)
98#endif 106#endif
99 107
100#define local_irq_restore(x) do { \ 108#define local_irq_restore(x) \
101 if (irqs_enabled_from_flags(x)) \ 109 do { \
102 local_irq_enable (); \ 110 if (irqs_enabled_from_flags(x)) \
103} while (0) 111 local_irq_enable(); \
112 } while (0)
104 113
105/* For spinlocks etc */ 114/* For spinlocks etc */
106#define local_irq_save(x) __save_and_cli(x) 115#define local_irq_save(x) __save_and_cli(x)
diff --git a/include/asm-blackfin/termbits.h b/include/asm-blackfin/termbits.h
index 4eac38de8ce1..f37feb7cf895 100644
--- a/include/asm-blackfin/termbits.h
+++ b/include/asm-blackfin/termbits.h
@@ -140,6 +140,7 @@ struct ktermios {
140#define HUPCL 0002000 140#define HUPCL 0002000
141#define CLOCAL 0004000 141#define CLOCAL 0004000
142#define CBAUDEX 0010000 142#define CBAUDEX 0010000
143#define BOTHER 0010000
143#define B57600 0010001 144#define B57600 0010001
144#define B115200 0010002 145#define B115200 0010002
145#define B230400 0010003 146#define B230400 0010003
@@ -155,10 +156,12 @@ struct ktermios {
155#define B3000000 0010015 156#define B3000000 0010015
156#define B3500000 0010016 157#define B3500000 0010016
157#define B4000000 0010017 158#define B4000000 0010017
158#define CIBAUD 002003600000 /* input baud rate (not used) */ 159#define CIBAUD 002003600000 /* input baud rate */
159#define CMSPAR 010000000000 /* mark or space (stick) parity */ 160#define CMSPAR 010000000000 /* mark or space (stick) parity */
160#define CRTSCTS 020000000000 /* flow control */ 161#define CRTSCTS 020000000000 /* flow control */
161 162
163#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
164
162/* c_lflag bits */ 165/* c_lflag bits */
163#define ISIG 0000001 166#define ISIG 0000001
164#define ICANON 0000002 167#define ICANON 0000002
diff --git a/include/asm-blackfin/termios.h b/include/asm-blackfin/termios.h
index 5c41478a51c6..e31fe859650b 100644
--- a/include/asm-blackfin/termios.h
+++ b/include/asm-blackfin/termios.h
@@ -98,8 +98,14 @@ struct termio {
98 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ 98 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
99}) 99})
100 100
101#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) 101#define user_termios_to_kernel_termios(k, u) \
102#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) 102 copy_from_user(k, u, sizeof(struct termios2))
103#define kernel_termios_to_user_termios(u, k) \
104 copy_to_user(u, k, sizeof(struct termios2))
105#define user_termios_to_kernel_termios_1(k, u) \
106 copy_from_user(k, u, sizeof(struct termios))
107#define kernel_termios_to_user_termios_1(u, k) \
108 copy_to_user(u, k, sizeof(struct termios))
103 109
104#endif /* __KERNEL__ */ 110#endif /* __KERNEL__ */
105 111
diff --git a/include/asm-blackfin/trace.h b/include/asm-blackfin/trace.h
index 9c2474c9a589..6313aace9d59 100644
--- a/include/asm-blackfin/trace.h
+++ b/include/asm-blackfin/trace.h
@@ -6,23 +6,46 @@
6#ifndef _BLACKFIN_TRACE_ 6#ifndef _BLACKFIN_TRACE_
7#define _BLACKFIN_TRACE_ 7#define _BLACKFIN_TRACE_
8 8
9/* Normally, we use ON, but you can't turn on software expansion until
10 * interrupts subsystem is ready
11 */
12
13#define BFIN_TRACE_INIT ((CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION << 4) | 0x03)
14#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
15#define BFIN_TRACE_ON (BFIN_TRACE_INIT | (CONFIG_DEBUG_BFIN_HWTRACE_EXPAND << 2))
16#else
17#define BFIN_TRACE_ON (BFIN_TRACE_INIT)
18#endif
19
9#ifndef __ASSEMBLY__ 20#ifndef __ASSEMBLY__
21extern unsigned long trace_buff_offset;
22extern unsigned long software_trace_buff[];
23
10/* Trace Macros for C files */ 24/* Trace Macros for C files */
11 25
26#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
27
12#define trace_buffer_save(x) \ 28#define trace_buffer_save(x) \
13 do { \ 29 do { \
14 (x) = bfin_read_TBUFCTL(); \ 30 (x) = bfin_read_TBUFCTL(); \
15 bfin_write_TBUFCTL((x) & ~TBUFEN); \ 31 bfin_write_TBUFCTL((x) & ~TBUFEN); \
16 } while (0) 32 } while (0)
17 33
18#define trace_buffer_restore(x) \ 34#define trace_buffer_restore(x) \
19 do { \ 35 do { \
20 bfin_write_TBUFCTL((x)); \ 36 bfin_write_TBUFCTL((x)); \
21 } while (0) 37 } while (0)
38#else /* DEBUG_BFIN_HWTRACE_ON */
39
40#define trace_buffer_save(x)
41#define trace_buffer_restore(x)
42#endif /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
22 43
23#else 44#else
24/* Trace Macros for Assembly files */ 45/* Trace Macros for Assembly files */
25 46
47#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
48
26#define TRACE_BUFFER_START(preg, dreg) trace_buffer_start(preg, dreg) 49#define TRACE_BUFFER_START(preg, dreg) trace_buffer_start(preg, dreg)
27#define TRACE_BUFFER_STOP(preg, dreg) trace_buffer_stop(preg, dreg) 50#define TRACE_BUFFER_STOP(preg, dreg) trace_buffer_stop(preg, dreg)
28 51
@@ -32,12 +55,26 @@
32 dreg = 0x1; \ 55 dreg = 0x1; \
33 [preg] = dreg; 56 [preg] = dreg;
34 57
35#define trace_buffer_start(preg, dreg) \ 58#define trace_buffer_start(preg, dreg) \
36 preg.L = LO(TBUFCTL); \ 59 preg.L = LO(TBUFCTL); \
37 preg.H = HI(TBUFCTL); \ 60 preg.H = HI(TBUFCTL); \
38 dreg = 0x13; \ 61 dreg = BFIN_TRACE_ON; \
62 [preg] = dreg;
63
64#define trace_buffer_init(preg, dreg) \
65 preg.L = LO(TBUFCTL); \
66 preg.H = HI(TBUFCTL); \
67 dreg = BFIN_TRACE_INIT; \
39 [preg] = dreg; 68 [preg] = dreg;
40 69
70#else /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
71
72#define trace_buffer_stop(preg, dreg)
73#define trace_buffer_start(preg, dreg)
74#define trace_buffer_init(preg, dreg)
75
76#endif /* CONFIG_DEBUG_BFIN_HWTRACE_ON */
77
41#ifdef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE 78#ifdef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE
42# define DEBUG_START_HWTRACE(preg, dreg) trace_buffer_start(preg, dreg) 79# define DEBUG_START_HWTRACE(preg, dreg) trace_buffer_start(preg, dreg)
43# define DEBUG_STOP_HWTRACE(preg, dreg) trace_buffer_stop(preg, dreg) 80# define DEBUG_STOP_HWTRACE(preg, dreg) trace_buffer_stop(preg, dreg)
diff --git a/include/asm-i386/Kbuild b/include/asm-i386/Kbuild
deleted file mode 100644
index cbf6e8f1087b..000000000000
--- a/include/asm-i386/Kbuild
+++ /dev/null
@@ -1,12 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += boot.h
4header-y += debugreg.h
5header-y += ldt.h
6header-y += msr-index.h
7header-y += ptrace-abi.h
8header-y += ucontext.h
9
10unifdef-y += msr.h
11unifdef-y += mtrr.h
12unifdef-y += vm86.h
diff --git a/include/asm-i386/k8.h b/include/asm-i386/k8.h
deleted file mode 100644
index dfd88a6e6040..000000000000
--- a/include/asm-i386/k8.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-x86_64/k8.h>
diff --git a/include/asm-i386/pci-direct.h b/include/asm-i386/pci-direct.h
deleted file mode 100644
index 4f6738b08206..000000000000
--- a/include/asm-i386/pci-direct.h
+++ /dev/null
@@ -1 +0,0 @@
1#include "asm-x86_64/pci-direct.h"
diff --git a/include/asm-i386/stacktrace.h b/include/asm-i386/stacktrace.h
deleted file mode 100644
index 7d1f6a5cbfca..000000000000
--- a/include/asm-i386/stacktrace.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-x86_64/stacktrace.h>
diff --git a/include/asm-i386/termios.h b/include/asm-i386/termios.h
deleted file mode 100644
index f520b7c16fa2..000000000000
--- a/include/asm-i386/termios.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef _I386_TERMIOS_H
2#define _I386_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43#include <linux/module.h>
44
45/* intr=^C quit=^\ erase=del kill=^U
46 eof=^D vtime=\0 vmin=\1 sxtc=\0
47 start=^Q stop=^S susp=^Z eol=\0
48 reprint=^R discard=^U werase=^W lnext=^V
49 eol2=\0
50*/
51#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
52
53/*
54 * Translate a "termio" structure into a "termios". Ugh.
55 */
56#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
57 unsigned short __tmp; \
58 get_user(__tmp,&(termio)->x); \
59 *(unsigned short *) &(termios)->x = __tmp; \
60}
61
62#define user_termio_to_kernel_termios(termios, termio) \
63({ \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
68 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
69})
70
71/*
72 * Translate a "termios" structure into a "termio". Ugh.
73 */
74#define kernel_termios_to_user_termio(termio, termios) \
75({ \
76 put_user((termios)->c_iflag, &(termio)->c_iflag); \
77 put_user((termios)->c_oflag, &(termio)->c_oflag); \
78 put_user((termios)->c_cflag, &(termio)->c_cflag); \
79 put_user((termios)->c_lflag, &(termio)->c_lflag); \
80 put_user((termios)->c_line, &(termio)->c_line); \
81 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
82})
83
84#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
86#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
87#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
88
89#endif /* __KERNEL__ */
90
91#endif /* _I386_TERMIOS_H */
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 0b3ff9c48409..0bb7a93b7a5e 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -123,10 +123,10 @@
123/* 123/*
124 * 64-bit address conversions 124 * 64-bit address conversions
125 */ 125 */
126#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) 126#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
127#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) 127#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
128#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 128#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
129#define PHYS_TO_XKPHYS(cm,a) (_CONST64_(0x8000000000000000) | \ 129#define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \
130 ((cm)<<59) | (a)) 130 ((cm)<<59) | (a))
131 131
132/* 132/*
diff --git a/include/asm-mips/arc/hinv.h b/include/asm-mips/arc/hinv.h
deleted file mode 100644
index ee792bf04002..000000000000
--- a/include/asm-mips/arc/hinv.h
+++ /dev/null
@@ -1,174 +0,0 @@
1/*
2 * ARCS hardware/memory inventory/configuration and system ID definitions.
3 */
4#ifndef _ASM_ARC_HINV_H
5#define _ASM_ARC_HINV_H
6
7#include <asm/arc/types.h>
8
9/* configuration query defines */
10typedef enum configclass {
11 SystemClass,
12 ProcessorClass,
13 CacheClass,
14#ifndef _NT_PROM
15 MemoryClass,
16 AdapterClass,
17 ControllerClass,
18 PeripheralClass
19#else /* _NT_PROM */
20 AdapterClass,
21 ControllerClass,
22 PeripheralClass,
23 MemoryClass
24#endif /* _NT_PROM */
25} CONFIGCLASS;
26
27typedef enum configtype {
28 ARC,
29 CPU,
30 FPU,
31 PrimaryICache,
32 PrimaryDCache,
33 SecondaryICache,
34 SecondaryDCache,
35 SecondaryCache,
36#ifndef _NT_PROM
37 Memory,
38#endif
39 EISAAdapter,
40 TCAdapter,
41 SCSIAdapter,
42 DTIAdapter,
43 MultiFunctionAdapter,
44 DiskController,
45 TapeController,
46 CDROMController,
47 WORMController,
48 SerialController,
49 NetworkController,
50 DisplayController,
51 ParallelController,
52 PointerController,
53 KeyboardController,
54 AudioController,
55 OtherController,
56 DiskPeripheral,
57 FloppyDiskPeripheral,
58 TapePeripheral,
59 ModemPeripheral,
60 MonitorPeripheral,
61 PrinterPeripheral,
62 PointerPeripheral,
63 KeyboardPeripheral,
64 TerminalPeripheral,
65 LinePeripheral,
66 NetworkPeripheral,
67#ifdef _NT_PROM
68 Memory,
69#endif
70 OtherPeripheral,
71
72 /* new stuff for IP30 */
73 /* added without moving anything */
74 /* except ANONYMOUS. */
75
76 XTalkAdapter,
77 PCIAdapter,
78 GIOAdapter,
79 TPUAdapter,
80
81 Anonymous
82} CONFIGTYPE;
83
84typedef enum {
85 Failed = 1,
86 ReadOnly = 2,
87 Removable = 4,
88 ConsoleIn = 8,
89 ConsoleOut = 16,
90 Input = 32,
91 Output = 64
92} IDENTIFIERFLAG;
93
94#ifndef NULL /* for GetChild(NULL); */
95#define NULL 0
96#endif
97
98union key_u {
99 struct {
100#ifdef _MIPSEB
101 unsigned char c_bsize; /* block size in lines */
102 unsigned char c_lsize; /* line size in bytes/tag */
103 unsigned short c_size; /* cache size in 4K pages */
104#else /* _MIPSEL */
105 unsigned short c_size; /* cache size in 4K pages */
106 unsigned char c_lsize; /* line size in bytes/tag */
107 unsigned char c_bsize; /* block size in lines */
108#endif /* _MIPSEL */
109 } cache;
110 ULONG FullKey;
111};
112
113#if _MIPS_SIM == _ABI64
114#define SGI_ARCS_VERS 64 /* sgi 64-bit version */
115#define SGI_ARCS_REV 0 /* rev .00 */
116#else
117#define SGI_ARCS_VERS 1 /* first version */
118#define SGI_ARCS_REV 10 /* rev .10, 3/04/92 */
119#endif
120
121typedef struct component {
122 CONFIGCLASS Class;
123 CONFIGTYPE Type;
124 IDENTIFIERFLAG Flags;
125 USHORT Version;
126 USHORT Revision;
127 ULONG Key;
128 ULONG AffinityMask;
129 ULONG ConfigurationDataSize;
130 ULONG IdentifierLength;
131 char *Identifier;
132} COMPONENT;
133
134/* internal structure that holds pathname parsing data */
135struct cfgdata {
136 char *name; /* full name */
137 int minlen; /* minimum length to match */
138 CONFIGTYPE type; /* type of token */
139};
140
141/* System ID */
142typedef struct systemid {
143 CHAR VendorId[8];
144 CHAR ProductId[8];
145} SYSTEMID;
146
147/* memory query functions */
148typedef enum memorytype {
149 ExceptionBlock,
150 SPBPage, /* ARCS == SystemParameterBlock */
151#ifndef _NT_PROM
152 FreeContiguous,
153 FreeMemory,
154 BadMemory,
155 LoadedProgram,
156 FirmwareTemporary,
157 FirmwarePermanent
158#else /* _NT_PROM */
159 FreeMemory,
160 BadMemory,
161 LoadedProgram,
162 FirmwareTemporary,
163 FirmwarePermanent,
164 FreeContiguous
165#endif /* _NT_PROM */
166} MEMORYTYPE;
167
168typedef struct memorydescriptor {
169 MEMORYTYPE Type;
170 LONG BasePage;
171 LONG PageCount;
172} MEMORYDESCRIPTOR;
173
174#endif /* _ASM_ARC_HINV_H */
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index 838eb3144d81..12e17581b823 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -21,11 +21,11 @@
21 21
22#ifndef CAT 22#ifndef CAT
23#ifdef __STDC__ 23#ifdef __STDC__
24#define __CAT(str1,str2) str1##str2 24#define __CAT(str1, str2) str1##str2
25#else 25#else
26#define __CAT(str1,str2) str1/**/str2 26#define __CAT(str1, str2) str1/**/str2
27#endif 27#endif
28#define CAT(str1,str2) __CAT(str1,str2) 28#define CAT(str1, str2) __CAT(str1, str2)
29#endif 29#endif
30 30
31/* 31/*
@@ -51,9 +51,9 @@
51#define LEAF(symbol) \ 51#define LEAF(symbol) \
52 .globl symbol; \ 52 .globl symbol; \
53 .align 2; \ 53 .align 2; \
54 .type symbol,@function; \ 54 .type symbol, @function; \
55 .ent symbol,0; \ 55 .ent symbol, 0; \
56symbol: .frame sp,0,ra 56symbol: .frame sp, 0, ra
57 57
58/* 58/*
59 * NESTED - declare nested routine entry point 59 * NESTED - declare nested routine entry point
@@ -61,8 +61,8 @@ symbol: .frame sp,0,ra
61#define NESTED(symbol, framesize, rpc) \ 61#define NESTED(symbol, framesize, rpc) \
62 .globl symbol; \ 62 .globl symbol; \
63 .align 2; \ 63 .align 2; \
64 .type symbol,@function; \ 64 .type symbol, @function; \
65 .ent symbol,0; \ 65 .ent symbol, 0; \
66symbol: .frame sp, framesize, rpc 66symbol: .frame sp, framesize, rpc
67 67
68/* 68/*
@@ -70,7 +70,7 @@ symbol: .frame sp, framesize, rpc
70 */ 70 */
71#define END(function) \ 71#define END(function) \
72 .end function; \ 72 .end function; \
73 .size function,.-function 73 .size function, .-function
74 74
75/* 75/*
76 * EXPORT - export definition of symbol 76 * EXPORT - export definition of symbol
@@ -84,7 +84,7 @@ symbol:
84 */ 84 */
85#define FEXPORT(symbol) \ 85#define FEXPORT(symbol) \
86 .globl symbol; \ 86 .globl symbol; \
87 .type symbol,@function; \ 87 .type symbol, @function; \
88symbol: 88symbol:
89 89
90/* 90/*
@@ -97,7 +97,7 @@ symbol = value
97#define PANIC(msg) \ 97#define PANIC(msg) \
98 .set push; \ 98 .set push; \
99 .set reorder; \ 99 .set reorder; \
100 PTR_LA a0,8f; \ 100 PTR_LA a0, 8f; \
101 jal panic; \ 101 jal panic; \
1029: b 9b; \ 1029: b 9b; \
103 .set pop; \ 103 .set pop; \
@@ -110,7 +110,7 @@ symbol = value
110#define PRINT(string) \ 110#define PRINT(string) \
111 .set push; \ 111 .set push; \
112 .set reorder; \ 112 .set reorder; \
113 PTR_LA a0,8f; \ 113 PTR_LA a0, 8f; \
114 jal printk; \ 114 jal printk; \
115 .set pop; \ 115 .set pop; \
116 TEXT(string) 116 TEXT(string)
@@ -146,19 +146,19 @@ symbol = value
146#define PREF(hint,addr) \ 146#define PREF(hint,addr) \
147 .set push; \ 147 .set push; \
148 .set mips4; \ 148 .set mips4; \
149 pref hint,addr; \ 149 pref hint, addr; \
150 .set pop 150 .set pop
151 151
152#define PREFX(hint,addr) \ 152#define PREFX(hint,addr) \
153 .set push; \ 153 .set push; \
154 .set mips4; \ 154 .set mips4; \
155 prefx hint,addr; \ 155 prefx hint, addr; \
156 .set pop 156 .set pop
157 157
158#else /* !CONFIG_CPU_HAS_PREFETCH */ 158#else /* !CONFIG_CPU_HAS_PREFETCH */
159 159
160#define PREF(hint,addr) 160#define PREF(hint, addr)
161#define PREFX(hint,addr) 161#define PREFX(hint, addr)
162 162
163#endif /* !CONFIG_CPU_HAS_PREFETCH */ 163#endif /* !CONFIG_CPU_HAS_PREFETCH */
164 164
@@ -166,43 +166,43 @@ symbol = value
166 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs. 166 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
167 */ 167 */
168#if (_MIPS_ISA == _MIPS_ISA_MIPS1) 168#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
169#define MOVN(rd,rs,rt) \ 169#define MOVN(rd, rs, rt) \
170 .set push; \ 170 .set push; \
171 .set reorder; \ 171 .set reorder; \
172 beqz rt,9f; \ 172 beqz rt, 9f; \
173 move rd,rs; \ 173 move rd, rs; \
174 .set pop; \ 174 .set pop; \
1759: 1759:
176#define MOVZ(rd,rs,rt) \ 176#define MOVZ(rd, rs, rt) \
177 .set push; \ 177 .set push; \
178 .set reorder; \ 178 .set reorder; \
179 bnez rt,9f; \ 179 bnez rt, 9f; \
180 move rd,rs; \ 180 move rd, rs; \
181 .set pop; \ 181 .set pop; \
1829: 1829:
183#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */ 183#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
184#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) 184#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
185#define MOVN(rd,rs,rt) \ 185#define MOVN(rd, rs, rt) \
186 .set push; \ 186 .set push; \
187 .set noreorder; \ 187 .set noreorder; \
188 bnezl rt,9f; \ 188 bnezl rt, 9f; \
189 move rd,rs; \ 189 move rd, rs; \
190 .set pop; \ 190 .set pop; \
1919: 1919:
192#define MOVZ(rd,rs,rt) \ 192#define MOVZ(rd, rs, rt) \
193 .set push; \ 193 .set push; \
194 .set noreorder; \ 194 .set noreorder; \
195 beqzl rt,9f; \ 195 beqzl rt, 9f; \
196 move rd,rs; \ 196 move rd, rs; \
197 .set pop; \ 197 .set pop; \
1989: 1989:
199#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */ 199#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
200#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \ 200#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
201 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64) 201 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
202#define MOVN(rd,rs,rt) \ 202#define MOVN(rd, rs, rt) \
203 movn rd,rs,rt 203 movn rd, rs, rt
204#define MOVZ(rd,rs,rt) \ 204#define MOVZ(rd, rs, rt) \
205 movz rd,rs,rt 205 movz rd, rs, rt
206#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */ 206#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */
207 207
208/* 208/*
@@ -396,6 +396,6 @@ symbol = value
396#define MTC0 dmtc0 396#define MTC0 dmtc0
397#endif 397#endif
398 398
399#define SSNOP sll zero,zero,1 399#define SSNOP sll zero, zero, 1
400 400
401#endif /* __ASM_ASM_H */ 401#endif /* __ASM_ASM_H */
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index c5f20df780e9..7a881755800f 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -56,27 +56,27 @@
56 * Temporary until all gas have MT ASE support 56 * Temporary until all gas have MT ASE support
57 */ 57 */
58 .macro DMT reg=0 58 .macro DMT reg=0
59 .word (0x41600bc1 | (\reg << 16)) 59 .word 0x41600bc1 | (\reg << 16)
60 .endm 60 .endm
61 61
62 .macro EMT reg=0 62 .macro EMT reg=0
63 .word (0x41600be1 | (\reg << 16)) 63 .word 0x41600be1 | (\reg << 16)
64 .endm 64 .endm
65 65
66 .macro DVPE reg=0 66 .macro DVPE reg=0
67 .word (0x41600001 | (\reg << 16)) 67 .word 0x41600001 | (\reg << 16)
68 .endm 68 .endm
69 69
70 .macro EVPE reg=0 70 .macro EVPE reg=0
71 .word (0x41600021 | (\reg << 16)) 71 .word 0x41600021 | (\reg << 16)
72 .endm 72 .endm
73 73
74 .macro MFTR rt=0, rd=0, u=0, sel=0 74 .macro MFTR rt=0, rd=0, u=0, sel=0
75 .word (0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)) 75 .word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
76 .endm 76 .endm
77 77
78 .macro MTTR rt=0, rd=0, u=0, sel=0 78 .macro MTTR rt=0, rd=0, u=0, sel=0
79 .word (0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)) 79 .word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
80 .endm 80 .endm
81 81
82#endif /* _ASM_ASMMACRO_H */ 82#endif /* _ASM_ASMMACRO_H */
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 7d8003769a44..a798d6299a79 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -39,7 +39,7 @@ typedef struct { volatile int counter; } atomic_t;
39 * 39 *
40 * Atomically sets the value of @v to @i. 40 * Atomically sets the value of @v to @i.
41 */ 41 */
42#define atomic_set(v,i) ((v)->counter = (i)) 42#define atomic_set(v, i) ((v)->counter = (i))
43 43
44/* 44/*
45 * atomic_add - add integer to atomic variable 45 * atomic_add - add integer to atomic variable
@@ -335,8 +335,8 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
335} 335}
336#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 336#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
337 337
338#define atomic_dec_return(v) atomic_sub_return(1,(v)) 338#define atomic_dec_return(v) atomic_sub_return(1, (v))
339#define atomic_inc_return(v) atomic_add_return(1,(v)) 339#define atomic_inc_return(v) atomic_add_return(1, (v))
340 340
341/* 341/*
342 * atomic_sub_and_test - subtract value from variable and test result 342 * atomic_sub_and_test - subtract value from variable and test result
@@ -347,7 +347,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
347 * true if the result is zero, or false for all 347 * true if the result is zero, or false for all
348 * other cases. 348 * other cases.
349 */ 349 */
350#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) 350#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
351 351
352/* 352/*
353 * atomic_inc_and_test - increment and test 353 * atomic_inc_and_test - increment and test
@@ -381,7 +381,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
381 * 381 *
382 * Atomically increments @v by 1. 382 * Atomically increments @v by 1.
383 */ 383 */
384#define atomic_inc(v) atomic_add(1,(v)) 384#define atomic_inc(v) atomic_add(1, (v))
385 385
386/* 386/*
387 * atomic_dec - decrement and test 387 * atomic_dec - decrement and test
@@ -389,7 +389,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
389 * 389 *
390 * Atomically decrements @v by 1. 390 * Atomically decrements @v by 1.
391 */ 391 */
392#define atomic_dec(v) atomic_sub(1,(v)) 392#define atomic_dec(v) atomic_sub(1, (v))
393 393
394/* 394/*
395 * atomic_add_negative - add and test if negative 395 * atomic_add_negative - add and test if negative
@@ -400,7 +400,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
400 * if the result is negative, or false when 400 * if the result is negative, or false when
401 * result is greater than or equal to zero. 401 * result is greater than or equal to zero.
402 */ 402 */
403#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0) 403#define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0)
404 404
405#ifdef CONFIG_64BIT 405#ifdef CONFIG_64BIT
406 406
@@ -420,7 +420,7 @@ typedef struct { volatile long counter; } atomic64_t;
420 * @v: pointer of type atomic64_t 420 * @v: pointer of type atomic64_t
421 * @i: required value 421 * @i: required value
422 */ 422 */
423#define atomic64_set(v,i) ((v)->counter = (i)) 423#define atomic64_set(v, i) ((v)->counter = (i))
424 424
425/* 425/*
426 * atomic64_add - add integer to atomic variable 426 * atomic64_add - add integer to atomic variable
@@ -718,8 +718,8 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
718 718
719#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 719#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
720 720
721#define atomic64_dec_return(v) atomic64_sub_return(1,(v)) 721#define atomic64_dec_return(v) atomic64_sub_return(1, (v))
722#define atomic64_inc_return(v) atomic64_add_return(1,(v)) 722#define atomic64_inc_return(v) atomic64_add_return(1, (v))
723 723
724/* 724/*
725 * atomic64_sub_and_test - subtract value from variable and test result 725 * atomic64_sub_and_test - subtract value from variable and test result
@@ -730,7 +730,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
730 * true if the result is zero, or false for all 730 * true if the result is zero, or false for all
731 * other cases. 731 * other cases.
732 */ 732 */
733#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) 733#define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0)
734 734
735/* 735/*
736 * atomic64_inc_and_test - increment and test 736 * atomic64_inc_and_test - increment and test
@@ -764,7 +764,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
764 * 764 *
765 * Atomically increments @v by 1. 765 * Atomically increments @v by 1.
766 */ 766 */
767#define atomic64_inc(v) atomic64_add(1,(v)) 767#define atomic64_inc(v) atomic64_add(1, (v))
768 768
769/* 769/*
770 * atomic64_dec - decrement and test 770 * atomic64_dec - decrement and test
@@ -772,7 +772,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
772 * 772 *
773 * Atomically decrements @v by 1. 773 * Atomically decrements @v by 1.
774 */ 774 */
775#define atomic64_dec(v) atomic64_sub(1,(v)) 775#define atomic64_dec(v) atomic64_sub(1, (v))
776 776
777/* 777/*
778 * atomic64_add_negative - add and test if negative 778 * atomic64_add_negative - add and test if negative
@@ -783,7 +783,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
783 * if the result is negative, or false when 783 * if the result is negative, or false when
784 * result is greater than or equal to zero. 784 * result is greater than or equal to zero.
785 */ 785 */
786#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0) 786#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)
787 787
788#endif /* CONFIG_64BIT */ 788#endif /* CONFIG_64BIT */
789 789
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 148bc79557f1..899357a72ac4 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -19,14 +19,14 @@
19#include <asm/sgidefs.h> 19#include <asm/sgidefs.h>
20#include <asm/war.h> 20#include <asm/war.h>
21 21
22#if (_MIPS_SZLONG == 32) 22#if _MIPS_SZLONG == 32
23#define SZLONG_LOG 5 23#define SZLONG_LOG 5
24#define SZLONG_MASK 31UL 24#define SZLONG_MASK 31UL
25#define __LL "ll " 25#define __LL "ll "
26#define __SC "sc " 26#define __SC "sc "
27#define __INS "ins " 27#define __INS "ins "
28#define __EXT "ext " 28#define __EXT "ext "
29#elif (_MIPS_SZLONG == 64) 29#elif _MIPS_SZLONG == 64
30#define SZLONG_LOG 6 30#define SZLONG_LOG 6
31#define SZLONG_MASK 63UL 31#define SZLONG_MASK 63UL
32#define __LL "lld " 32#define __LL "lld "
@@ -461,7 +461,7 @@ static inline int __ilog2(unsigned long x)
461 int lz; 461 int lz;
462 462
463 if (sizeof(x) == 4) { 463 if (sizeof(x) == 4) {
464 __asm__ ( 464 __asm__(
465 " .set push \n" 465 " .set push \n"
466 " .set mips32 \n" 466 " .set mips32 \n"
467 " clz %0, %1 \n" 467 " clz %0, %1 \n"
@@ -474,7 +474,7 @@ static inline int __ilog2(unsigned long x)
474 474
475 BUG_ON(sizeof(x) != 8); 475 BUG_ON(sizeof(x) != 8);
476 476
477 __asm__ ( 477 __asm__(
478 " .set push \n" 478 " .set push \n"
479 " .set mips64 \n" 479 " .set mips64 \n"
480 " dclz %0, %1 \n" 480 " dclz %0, %1 \n"
@@ -508,7 +508,7 @@ static inline unsigned long __ffs(unsigned long word)
508 */ 508 */
509static inline int fls(int word) 509static inline int fls(int word)
510{ 510{
511 __asm__ ("clz %0, %1" : "=r" (word) : "r" (word)); 511 __asm__("clz %0, %1" : "=r" (word) : "r" (word));
512 512
513 return 32 - word; 513 return 32 - word;
514} 514}
@@ -516,7 +516,7 @@ static inline int fls(int word)
516#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64) 516#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64)
517static inline int fls64(__u64 word) 517static inline int fls64(__u64 word)
518{ 518{
519 __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word)); 519 __asm__("dclz %0, %1" : "=r" (word) : "r" (word));
520 520
521 return 64 - word; 521 return 64 - word;
522} 522}
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index c0f052b37b9e..b2dd9b33de8f 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -15,21 +15,19 @@
15#include <asm/setup.h> 15#include <asm/setup.h>
16 16
17/* 17/*
18 * The MACH_GROUP_ IDs are the equivalent to PCI vendor IDs; the remaining 18 * The MACH_ IDs are sort of equivalent to PCI product IDs. As such the
19 * MACH_ values equivalent to product IDs. As such the numbers do not 19 * numbers do not necessarily reflect technical relations or similarities
20 * necessarily reflect technical relations or similarities between systems. 20 * between systems.
21 */ 21 */
22 22
23/* 23/*
24 * Valid machtype values for group unknown 24 * Valid machtype values for group unknown
25 */ 25 */
26#define MACH_GROUP_UNKNOWN 0 /* whatever... */
27#define MACH_UNKNOWN 0 /* whatever... */ 26#define MACH_UNKNOWN 0 /* whatever... */
28 27
29/* 28/*
30 * Valid machtype values for group JAZZ 29 * Valid machtype values for group JAZZ
31 */ 30 */
32#define MACH_GROUP_JAZZ 1 /* Jazz */
33#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */ 31#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
34#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */ 32#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
35#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */ 33#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
@@ -37,7 +35,6 @@
37/* 35/*
38 * Valid machtype for group DEC 36 * Valid machtype for group DEC
39 */ 37 */
40#define MACH_GROUP_DEC 2 /* Digital Equipment */
41#define MACH_DSUNKNOWN 0 38#define MACH_DSUNKNOWN 0
42#define MACH_DS23100 1 /* DECstation 2100 or 3100 */ 39#define MACH_DS23100 1 /* DECstation 2100 or 3100 */
43#define MACH_DS5100 2 /* DECsystem 5100 */ 40#define MACH_DS5100 2 /* DECsystem 5100 */
@@ -53,26 +50,22 @@
53/* 50/*
54 * Valid machtype for group ARC 51 * Valid machtype for group ARC
55 */ 52 */
56#define MACH_GROUP_ARC 3 /* Deskstation */
57#define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */ 53#define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */
58#define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */ 54#define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */
59 55
60/* 56/*
61 * Valid machtype for group SNI_RM 57 * Valid machtype for group SNI_RM
62 */ 58 */
63#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
64#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */ 59#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
65 60
66/* 61/*
67 * Valid machtype for group ACN 62 * Valid machtype for group ACN
68 */ 63 */
69#define MACH_GROUP_ACN 5
70#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */ 64#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */
71 65
72/* 66/*
73 * Valid machtype for group SGI 67 * Valid machtype for group SGI
74 */ 68 */
75#define MACH_GROUP_SGI 6 /* Silicon Graphics */
76#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */ 69#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
77#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */ 70#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
78#define MACH_SGI_IP28 2 /* Indigo2 Impact */ 71#define MACH_SGI_IP28 2 /* Indigo2 Impact */
@@ -82,26 +75,22 @@
82/* 75/*
83 * Valid machtype for group COBALT 76 * Valid machtype for group COBALT
84 */ 77 */
85#define MACH_GROUP_COBALT 7 /* Cobalt servers */
86#define MACH_COBALT_27 0 /* Proto "27" hardware */ 78#define MACH_COBALT_27 0 /* Proto "27" hardware */
87 79
88/* 80/*
89 * Valid machtype for group BAGET 81 * Valid machtype for group BAGET
90 */ 82 */
91#define MACH_GROUP_BAGET 9 /* Baget */
92#define MACH_BAGET201 0 /* BT23-201 */ 83#define MACH_BAGET201 0 /* BT23-201 */
93#define MACH_BAGET202 1 /* BT23-202 */ 84#define MACH_BAGET202 1 /* BT23-202 */
94 85
95/* 86/*
96 * Cosine boards. 87 * Cosine boards.
97 */ 88 */
98#define MACH_GROUP_COSINE 10 /* CoSine Orion */
99#define MACH_COSINE_ORION 0 89#define MACH_COSINE_ORION 0
100 90
101/* 91/*
102 * Valid machtype for group MOMENCO 92 * Valid machtype for group MOMENCO
103 */ 93 */
104#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */
105#define MACH_MOMENCO_OCELOT 0 94#define MACH_MOMENCO_OCELOT 0
106#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */ 95#define MACH_MOMENCO_OCELOT_G 1 /* no more supported (may 2007) */
107#define MACH_MOMENCO_OCELOT_C 2 /* no more supported (jun 2007) */ 96#define MACH_MOMENCO_OCELOT_C 2 /* no more supported (jun 2007) */
@@ -111,7 +100,6 @@
111/* 100/*
112 * Valid machtype for group PHILIPS 101 * Valid machtype for group PHILIPS
113 */ 102 */
114#define MACH_GROUP_PHILIPS 14
115#define MACH_PHILIPS_NINO 0 /* Nino */ 103#define MACH_PHILIPS_NINO 0 /* Nino */
116#define MACH_PHILIPS_VELO 1 /* Velo */ 104#define MACH_PHILIPS_VELO 1 /* Velo */
117#define MACH_PHILIPS_JBS 2 /* JBS */ 105#define MACH_PHILIPS_JBS 2 /* JBS */
@@ -120,13 +108,11 @@
120/* 108/*
121 * Valid machtype for group SIBYTE 109 * Valid machtype for group SIBYTE
122 */ 110 */
123#define MACH_GROUP_SIBYTE 16 /* Sibyte / Broadcom */
124#define MACH_SWARM 0 111#define MACH_SWARM 0
125 112
126/* 113/*
127 * Valid machtypes for group Toshiba 114 * Valid machtypes for group Toshiba
128 */ 115 */
129#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */
130#define MACH_PALLAS 0 116#define MACH_PALLAS 0
131#define MACH_TOPAS 1 117#define MACH_TOPAS 1
132#define MACH_JMR 2 118#define MACH_JMR 2
@@ -138,7 +124,6 @@
138/* 124/*
139 * Valid machtype for group Alchemy 125 * Valid machtype for group Alchemy
140 */ 126 */
141#define MACH_GROUP_ALCHEMY 18 /* AMD Alchemy */
142#define MACH_PB1000 0 /* Au1000-based eval board */ 127#define MACH_PB1000 0 /* Au1000-based eval board */
143#define MACH_PB1100 1 /* Au1100-based eval board */ 128#define MACH_PB1100 1 /* Au1100-based eval board */
144#define MACH_PB1500 2 /* Au1500-based eval board */ 129#define MACH_PB1500 2 /* Au1500-based eval board */
@@ -160,7 +145,6 @@
160 * FIXME: MACH_GROUPs should be by _MANUFACTURER_ of * the device, not by 145 * FIXME: MACH_GROUPs should be by _MANUFACTURER_ of * the device, not by
161 * technical properties, so no new additions to this group. 146 * technical properties, so no new additions to this group.
162 */ 147 */
163#define MACH_GROUP_NEC_VR41XX 19
164#define MACH_NEC_OSPREY 0 /* Osprey eval board */ 148#define MACH_NEC_OSPREY 0 /* Osprey eval board */
165#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */ 149#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */
166#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */ 150#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */
@@ -171,32 +155,33 @@
171#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */ 155#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */
172#define MACH_NEC_CMBVR4133 8 /* CMB VR4133 Board */ 156#define MACH_NEC_CMBVR4133 8 /* CMB VR4133 Board */
173 157
174#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
175#define MACH_HP_LASERJET 1 158#define MACH_HP_LASERJET 1
176 159
177/* 160/*
161 * Valid machtype for group LASAT
162 */
163#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
164#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
165
166/*
178 * Valid machtype for group TITAN 167 * Valid machtype for group TITAN
179 */ 168 */
180#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
181#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ 169#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
182#define MACH_TITAN_EXCITE 2 /* Basler eXcite */ 170#define MACH_TITAN_EXCITE 2 /* Basler eXcite */
183 171
184/* 172/*
185 * Valid machtype for group NEC EMMA2RH 173 * Valid machtype for group NEC EMMA2RH
186 */ 174 */
187#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
188#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */ 175#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
189 176
190/* 177/*
191 * Valid machtype for group LEMOTE 178 * Valid machtype for group LEMOTE
192 */ 179 */
193#define MACH_GROUP_LEMOTE 27
194#define MACH_LEMOTE_FULONG 0 180#define MACH_LEMOTE_FULONG 0
195 181
196/* 182/*
197 * Valid machtype for group PMC-MSP 183 * Valid machtype for group PMC-MSP
198 */ 184 */
199#define MACH_GROUP_MSP 26 /* PMC-Sierra MSP boards/CPUs */
200#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */ 185#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */
201#define MACH_MSP4200_GW 1 /* PMC-Sierra MSP4200 Gateway demo */ 186#define MACH_MSP4200_GW 1 /* PMC-Sierra MSP4200 Gateway demo */
202#define MACH_MSP4200_FPGA 2 /* PMC-Sierra MSP4200 Emulation */ 187#define MACH_MSP4200_FPGA 2 /* PMC-Sierra MSP4200 Emulation */
@@ -205,15 +190,19 @@
205#define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */ 190#define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */
206#define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */ 191#define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */
207 192
208#define MACH_GROUP_WINDRIVER 28 /* Windriver boards */
209#define MACH_WRPPMC 1 193#define MACH_WRPPMC 1
210 194
195/*
196 * Valid machtype for group Broadcom
197 */
198#define MACH_GROUP_BRCM 23 /* Broadcom */
199#define MACH_BCM47XX 1 /* Broadcom BCM47XX */
200
211#define CL_SIZE COMMAND_LINE_SIZE 201#define CL_SIZE COMMAND_LINE_SIZE
212 202
213const char *get_system_type(void); 203const char *get_system_type(void);
214 204
215extern unsigned long mips_machtype; 205extern unsigned long mips_machtype;
216extern unsigned long mips_machgroup;
217 206
218#define BOOT_MEM_MAP_MAX 32 207#define BOOT_MEM_MAP_MAX 32
219#define BOOT_MEM_RAM 1 208#define BOOT_MEM_RAM 1
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index eee83cbdf2b0..fe7dc2d59b69 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -65,9 +65,9 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
65 65
66#endif /* __GNUC__ */ 66#endif /* __GNUC__ */
67 67
68#if defined (__MIPSEB__) 68#if defined(__MIPSEB__)
69# include <linux/byteorder/big_endian.h> 69# include <linux/byteorder/big_endian.h>
70#elif defined (__MIPSEL__) 70#elif defined(__MIPSEL__)
71# include <linux/byteorder/little_endian.h> 71# include <linux/byteorder/little_endian.h>
72#else 72#else
73# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" 73# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
diff --git a/include/asm-mips/cmpxchg.h b/include/asm-mips/cmpxchg.h
index c5b4708e003b..a5ec0e5dc5b8 100644
--- a/include/asm-mips/cmpxchg.h
+++ b/include/asm-mips/cmpxchg.h
@@ -72,7 +72,7 @@
72 */ 72 */
73extern void __cmpxchg_called_with_bad_pointer(void); 73extern void __cmpxchg_called_with_bad_pointer(void);
74 74
75#define __cmpxchg(ptr,old,new,barrier) \ 75#define __cmpxchg(ptr, old, new, barrier) \
76({ \ 76({ \
77 __typeof__(ptr) __ptr = (ptr); \ 77 __typeof__(ptr) __ptr = (ptr); \
78 __typeof__(*(ptr)) __old = (old); \ 78 __typeof__(*(ptr)) __old = (old); \
@@ -102,6 +102,6 @@ extern void __cmpxchg_called_with_bad_pointer(void);
102}) 102})
103 103
104#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb()) 104#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
105#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,) 105#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, )
106 106
107#endif /* __ASM_CMPXCHG_H */ 107#endif /* __ASM_CMPXCHG_H */
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index d95a83e3e1d7..f6bd308f047f 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -9,11 +9,14 @@
9#ifndef __ASM_CPU_FEATURES_H 9#ifndef __ASM_CPU_FEATURES_H
10#define __ASM_CPU_FEATURES_H 10#define __ASM_CPU_FEATURES_H
11 11
12
13#include <asm/cpu.h> 12#include <asm/cpu.h>
14#include <asm/cpu-info.h> 13#include <asm/cpu-info.h>
15#include <cpu-feature-overrides.h> 14#include <cpu-feature-overrides.h>
16 15
16#ifndef current_cpu_type
17#define current_cpu_type() current_cpu_data.cputype
18#endif
19
17/* 20/*
18 * SMP assumption: Options of CPU 0 are a superset of all processors. 21 * SMP assumption: Options of CPU 0 are a superset of all processors.
19 * This is true for all known MIPS systems. 22 * This is true for all known MIPS systems.
@@ -35,9 +38,6 @@
35#ifndef cpu_has_tx39_cache 38#ifndef cpu_has_tx39_cache
36#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE) 39#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE)
37#endif 40#endif
38#ifndef cpu_has_sb1_cache
39#define cpu_has_sb1_cache (cpu_data[0].options & MIPS_CPU_SB1_CACHE)
40#endif
41#ifndef cpu_has_fpu 41#ifndef cpu_has_fpu
42#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) 42#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
43#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) 43#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 22fe8453fcc7..94f1c8172360 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -14,10 +14,6 @@
14 14
15#include <asm/cache.h> 15#include <asm/cache.h>
16 16
17#ifdef CONFIG_SGI_IP27
18#include <asm/sn/types.h>
19#endif
20
21/* 17/*
22 * Descriptor for a cache 18 * Descriptor for a cache
23 */ 19 */
@@ -43,20 +39,6 @@ struct cache_desc {
43struct cpuinfo_mips { 39struct cpuinfo_mips {
44 unsigned long udelay_val; 40 unsigned long udelay_val;
45 unsigned long asid_cache; 41 unsigned long asid_cache;
46#if defined(CONFIG_SGI_IP27)
47// cpuid_t p_cpuid; /* PROM assigned cpuid */
48 cnodeid_t p_nodeid; /* my node ID in compact-id-space */
49 nasid_t p_nasid; /* my node ID in numa-as-id-space */
50 unsigned char p_slice; /* Physical position on node board */
51#endif
52#if 0
53 unsigned long loops_per_sec;
54 unsigned long ipi_count;
55 unsigned long irq_attempt[NR_IRQS];
56 unsigned long smp_local_irq_count;
57 unsigned long prof_multiplier;
58 unsigned long prof_counter;
59#endif
60 42
61 /* 43 /*
62 * Capability and feature descriptor structure for MIPS CPU 44 * Capability and feature descriptor structure for MIPS CPU
@@ -92,4 +74,7 @@ extern struct cpuinfo_mips cpu_data[];
92extern void cpu_probe(void); 74extern void cpu_probe(void);
93extern void cpu_report(void); 75extern void cpu_report(void);
94 76
77extern const char *__cpu_name[];
78#define cpu_name_string() __cpu_name[smp_processor_id()]
79
95#endif /* __ASM_CPU_INFO_H */ 80#endif /* __ASM_CPU_INFO_H */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 3857358fb6de..54fc18a4e5a8 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -106,6 +106,13 @@
106#define PRID_IMP_SR71000 0x0400 106#define PRID_IMP_SR71000 0x0400
107 107
108/* 108/*
109 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
110 */
111
112#define PRID_IMP_BCM4710 0x4000
113#define PRID_IMP_BCM3302 0x9000
114
115/*
109 * Definitions for 7:0 on legacy processors 116 * Definitions for 7:0 on legacy processors
110 */ 117 */
111 118
@@ -150,75 +157,55 @@
150 157
151#define FPIR_IMP_NONE 0x0000 158#define FPIR_IMP_NONE 0x0000
152 159
153#define CPU_UNKNOWN 0 160enum cpu_type_enum {
154#define CPU_R2000 1 161 CPU_UNKNOWN,
155#define CPU_R3000 2 162
156#define CPU_R3000A 3 163 /*
157#define CPU_R3041 4 164 * R2000 class processors
158#define CPU_R3051 5 165 */
159#define CPU_R3052 6 166 CPU_R2000, CPU_R3000, CPU_R3000A, CPU_R3041, CPU_R3051, CPU_R3052,
160#define CPU_R3081 7 167 CPU_R3081, CPU_R3081E,
161#define CPU_R3081E 8 168
162#define CPU_R4000PC 9 169 /*
163#define CPU_R4000SC 10 170 * R6000 class processors
164#define CPU_R4000MC 11 171 */
165#define CPU_R4200 12 172 CPU_R6000, CPU_R6000A,
166#define CPU_R4400PC 13 173
167#define CPU_R4400SC 14 174 /*
168#define CPU_R4400MC 15 175 * R4000 class processors
169#define CPU_R4600 16 176 */
170#define CPU_R6000 17 177 CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310,
171#define CPU_R6000A 18 178 CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650,
172#define CPU_R8000 19 179 CPU_R4700, CPU_R5000, CPU_R5000A, CPU_R5500, CPU_NEVADA, CPU_R5432,
173#define CPU_R10000 20 180 CPU_R10000, CPU_R12000, CPU_R14000, CPU_VR41XX, CPU_VR4111, CPU_VR4121,
174#define CPU_R12000 21 181 CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
175#define CPU_R4300 22 182 CPU_SR71000, CPU_RM9000, CPU_TX49XX,
176#define CPU_R4650 23 183
177#define CPU_R4700 24 184 /*
178#define CPU_R5000 25 185 * R8000 class processors
179#define CPU_R5000A 26 186 */
180#define CPU_R4640 27 187 CPU_R8000,
181#define CPU_NEVADA 28 188
182#define CPU_RM7000 29 189 /*
183#define CPU_R5432 30 190 * TX3900 class processors
184#define CPU_4KC 31 191 */
185#define CPU_5KC 32 192 CPU_TX3912, CPU_TX3922, CPU_TX3927,
186#define CPU_R4310 33 193
187#define CPU_SB1 34 194 /*
188#define CPU_TX3912 35 195 * MIPS32 class processors
189#define CPU_TX3922 36 196 */
190#define CPU_TX3927 37 197 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
191#define CPU_AU1000 38 198 CPU_AU1100, CPU_AU1200, CPU_AU1500, CPU_AU1550, CPU_PR4450,
192#define CPU_4KEC 39 199 CPU_BCM3302, CPU_BCM4710,
193#define CPU_4KSC 40 200
194#define CPU_VR41XX 41 201 /*
195#define CPU_R5500 42 202 * MIPS64 class processors
196#define CPU_TX49XX 43 203 */
197#define CPU_AU1500 44 204 CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
198#define CPU_20KC 45 205
199#define CPU_VR4111 46 206 CPU_LAST
200#define CPU_VR4121 47 207};
201#define CPU_VR4122 48 208
202#define CPU_VR4131 49
203#define CPU_VR4181 50
204#define CPU_VR4181A 51
205#define CPU_AU1100 52
206#define CPU_SR71000 53
207#define CPU_RM9000 54
208#define CPU_25KF 55
209#define CPU_VR4133 56
210#define CPU_AU1550 57
211#define CPU_24K 58
212#define CPU_AU1200 59
213#define CPU_34K 60
214#define CPU_PR4450 61
215#define CPU_SB1A 62
216#define CPU_74K 63
217#define CPU_R14000 64
218#define CPU_LOONGSON1 65
219#define CPU_LOONGSON2 66
220
221#define CPU_LAST 66
222 209
223/* 210/*
224 * ISA Level encodings 211 * ISA Level encodings
@@ -247,24 +234,23 @@
247#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */ 234#define MIPS_CPU_3K_CACHE 0x00000004 /* R3000-style caches */
248#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */ 235#define MIPS_CPU_4K_CACHE 0x00000008 /* R4000-style caches */
249#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */ 236#define MIPS_CPU_TX39_CACHE 0x00000010 /* TX3900-style caches */
250#define MIPS_CPU_SB1_CACHE 0x00000020 /* SB1-style caches */ 237#define MIPS_CPU_FPU 0x00000020 /* CPU has FPU */
251#define MIPS_CPU_FPU 0x00000040 /* CPU has FPU */ 238#define MIPS_CPU_32FPR 0x00000040 /* 32 dbl. prec. FP registers */
252#define MIPS_CPU_32FPR 0x00000080 /* 32 dbl. prec. FP registers */ 239#define MIPS_CPU_COUNTER 0x00000080 /* Cycle count/compare */
253#define MIPS_CPU_COUNTER 0x00000100 /* Cycle count/compare */ 240#define MIPS_CPU_WATCH 0x00000100 /* watchpoint registers */
254#define MIPS_CPU_WATCH 0x00000200 /* watchpoint registers */ 241#define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */
255#define MIPS_CPU_DIVEC 0x00000400 /* dedicated interrupt vector */ 242#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */
256#define MIPS_CPU_VCE 0x00000800 /* virt. coherence conflict possible */ 243#define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */
257#define MIPS_CPU_CACHE_CDEX_P 0x00001000 /* Create_Dirty_Exclusive CACHE op */ 244#define MIPS_CPU_CACHE_CDEX_S 0x00001000 /* ... same for seconary cache ... */
258#define MIPS_CPU_CACHE_CDEX_S 0x00002000 /* ... same for seconary cache ... */ 245#define MIPS_CPU_MCHECK 0x00002000 /* Machine check exception */
259#define MIPS_CPU_MCHECK 0x00004000 /* Machine check exception */ 246#define MIPS_CPU_EJTAG 0x00004000 /* EJTAG exception */
260#define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ 247#define MIPS_CPU_NOFPUEX 0x00008000 /* no FPU exception */
261#define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ 248#define MIPS_CPU_LLSC 0x00010000 /* CPU has ll/sc instructions */
262#define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ 249#define MIPS_CPU_INCLUSIVE_CACHES 0x00020000 /* P-cache subset enforced */
263#define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */ 250#define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */
264#define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ 251#define MIPS_CPU_VINT 0x00080000 /* CPU supports MIPSR2 vectored interrupts */
265#define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ 252#define MIPS_CPU_VEIC 0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */
266#define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ 253#define MIPS_CPU_ULRI 0x00200000 /* CPU has ULRI feature */
267#define MIPS_CPU_ULRI 0x00400000 /* CPU has ULRI feature */
268 254
269/* 255/*
270 * CPU ASE encodings 256 * CPU ASE encodings
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index 223d156efb9f..fab32131e9b4 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -81,7 +81,7 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
81 81
82#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val 82#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
83 83
84#define udelay(usecs) __udelay((usecs),__udelay_val) 84#define udelay(usecs) __udelay((usecs), __udelay_val)
85 85
86/* make sure "usecs *= ..." in udelay do not overflow. */ 86/* make sure "usecs *= ..." in udelay do not overflow. */
87#if HZ >= 1000 87#if HZ >= 1000
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index e7d95d48177d..766f91ad5cd3 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -319,7 +319,7 @@ do { \
319struct task_struct; 319struct task_struct;
320 320
321extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); 321extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs);
322extern int dump_task_regs (struct task_struct *, elf_gregset_t *); 322extern int dump_task_regs(struct task_struct *, elf_gregset_t *);
323extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 323extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
324 324
325#define ELF_CORE_COPY_REGS(elf_regs, regs) \ 325#define ELF_CORE_COPY_REGS(elf_regs, regs) \
diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h
index 02c8a13fc894..f27b96cfac2e 100644
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -60,8 +60,8 @@ enum fixed_addresses {
60 __end_of_fixed_addresses 60 __end_of_fixed_addresses
61}; 61};
62 62
63extern void __set_fixmap (enum fixed_addresses idx, 63extern void __set_fixmap(enum fixed_addresses idx,
64 unsigned long phys, pgprot_t flags); 64 unsigned long phys, pgprot_t flags);
65 65
66#define set_fixmap(idx, phys) \ 66#define set_fixmap(idx, phys) \
67 __set_fixmap(idx, phys, PAGE_KERNEL) 67 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/include/asm-mips/floppy.h b/include/asm-mips/floppy.h
index aa1ef8b352cc..a62d0990c8ae 100644
--- a/include/asm-mips/floppy.h
+++ b/include/asm-mips/floppy.h
@@ -10,9 +10,11 @@
10#ifndef _ASM_FLOPPY_H 10#ifndef _ASM_FLOPPY_H
11#define _ASM_FLOPPY_H 11#define _ASM_FLOPPY_H
12 12
13#include <linux/dma-mapping.h>
14
13static inline void fd_cacheflush(char * addr, long size) 15static inline void fd_cacheflush(char * addr, long size)
14{ 16{
15 dma_cache_wback_inv((unsigned long)addr,size); 17 dma_cache_sync(NULL, addr, size, DMA_BIDIRECTIONAL);
16} 18}
17 19
18#define MAX_BUFFER_SECTORS 24 20#define MAX_BUFFER_SECTORS 24
@@ -47,7 +49,7 @@ static inline void fd_cacheflush(char * addr, long size)
47 * Actually this needs to be a bit more complicated since the so much different 49 * Actually this needs to be a bit more complicated since the so much different
48 * hardware available with MIPS CPUs ... 50 * hardware available with MIPS CPUs ...
49 */ 51 */
50#define CROSS_64KB(a,s) ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64) 52#define CROSS_64KB(a, s) ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64)
51 53
52#define EXTRA_FLOPPY_PARAMS 54#define EXTRA_FLOPPY_PARAMS
53 55
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index b623882bce19..3e7e30d4f418 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -75,7 +75,7 @@
75} 75}
76 76
77static inline int 77static inline int
78futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 78futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
79{ 79{
80 int op = (encoded_op >> 28) & 7; 80 int op = (encoded_op >> 28) & 7;
81 int cmp = (encoded_op >> 24) & 15; 81 int cmp = (encoded_op >> 24) & 15;
diff --git a/include/asm-mips/fw/arc/hinv.h b/include/asm-mips/fw/arc/hinv.h
new file mode 100644
index 000000000000..e6ff4add04e2
--- /dev/null
+++ b/include/asm-mips/fw/arc/hinv.h
@@ -0,0 +1,175 @@
1/*
2 * ARCS hardware/memory inventory/configuration and system ID definitions.
3 */
4#ifndef _ASM_ARC_HINV_H
5#define _ASM_ARC_HINV_H
6
7#include <asm/sgidefs.h>
8#include <asm/fw/arc/types.h>
9
10/* configuration query defines */
11typedef enum configclass {
12 SystemClass,
13 ProcessorClass,
14 CacheClass,
15#ifndef _NT_PROM
16 MemoryClass,
17 AdapterClass,
18 ControllerClass,
19 PeripheralClass
20#else /* _NT_PROM */
21 AdapterClass,
22 ControllerClass,
23 PeripheralClass,
24 MemoryClass
25#endif /* _NT_PROM */
26} CONFIGCLASS;
27
28typedef enum configtype {
29 ARC,
30 CPU,
31 FPU,
32 PrimaryICache,
33 PrimaryDCache,
34 SecondaryICache,
35 SecondaryDCache,
36 SecondaryCache,
37#ifndef _NT_PROM
38 Memory,
39#endif
40 EISAAdapter,
41 TCAdapter,
42 SCSIAdapter,
43 DTIAdapter,
44 MultiFunctionAdapter,
45 DiskController,
46 TapeController,
47 CDROMController,
48 WORMController,
49 SerialController,
50 NetworkController,
51 DisplayController,
52 ParallelController,
53 PointerController,
54 KeyboardController,
55 AudioController,
56 OtherController,
57 DiskPeripheral,
58 FloppyDiskPeripheral,
59 TapePeripheral,
60 ModemPeripheral,
61 MonitorPeripheral,
62 PrinterPeripheral,
63 PointerPeripheral,
64 KeyboardPeripheral,
65 TerminalPeripheral,
66 LinePeripheral,
67 NetworkPeripheral,
68#ifdef _NT_PROM
69 Memory,
70#endif
71 OtherPeripheral,
72
73 /* new stuff for IP30 */
74 /* added without moving anything */
75 /* except ANONYMOUS. */
76
77 XTalkAdapter,
78 PCIAdapter,
79 GIOAdapter,
80 TPUAdapter,
81
82 Anonymous
83} CONFIGTYPE;
84
85typedef enum {
86 Failed = 1,
87 ReadOnly = 2,
88 Removable = 4,
89 ConsoleIn = 8,
90 ConsoleOut = 16,
91 Input = 32,
92 Output = 64
93} IDENTIFIERFLAG;
94
95#ifndef NULL /* for GetChild(NULL); */
96#define NULL 0
97#endif
98
99union key_u {
100 struct {
101#ifdef _MIPSEB
102 unsigned char c_bsize; /* block size in lines */
103 unsigned char c_lsize; /* line size in bytes/tag */
104 unsigned short c_size; /* cache size in 4K pages */
105#else /* _MIPSEL */
106 unsigned short c_size; /* cache size in 4K pages */
107 unsigned char c_lsize; /* line size in bytes/tag */
108 unsigned char c_bsize; /* block size in lines */
109#endif /* _MIPSEL */
110 } cache;
111 ULONG FullKey;
112};
113
114#if _MIPS_SIM == _MIPS_SIM_ABI64
115#define SGI_ARCS_VERS 64 /* sgi 64-bit version */
116#define SGI_ARCS_REV 0 /* rev .00 */
117#else
118#define SGI_ARCS_VERS 1 /* first version */
119#define SGI_ARCS_REV 10 /* rev .10, 3/04/92 */
120#endif
121
122typedef struct component {
123 CONFIGCLASS Class;
124 CONFIGTYPE Type;
125 IDENTIFIERFLAG Flags;
126 USHORT Version;
127 USHORT Revision;
128 ULONG Key;
129 ULONG AffinityMask;
130 ULONG ConfigurationDataSize;
131 ULONG IdentifierLength;
132 char *Identifier;
133} COMPONENT;
134
135/* internal structure that holds pathname parsing data */
136struct cfgdata {
137 char *name; /* full name */
138 int minlen; /* minimum length to match */
139 CONFIGTYPE type; /* type of token */
140};
141
142/* System ID */
143typedef struct systemid {
144 CHAR VendorId[8];
145 CHAR ProductId[8];
146} SYSTEMID;
147
148/* memory query functions */
149typedef enum memorytype {
150 ExceptionBlock,
151 SPBPage, /* ARCS == SystemParameterBlock */
152#ifndef _NT_PROM
153 FreeContiguous,
154 FreeMemory,
155 BadMemory,
156 LoadedProgram,
157 FirmwareTemporary,
158 FirmwarePermanent
159#else /* _NT_PROM */
160 FreeMemory,
161 BadMemory,
162 LoadedProgram,
163 FirmwareTemporary,
164 FirmwarePermanent,
165 FreeContiguous
166#endif /* _NT_PROM */
167} MEMORYTYPE;
168
169typedef struct memorydescriptor {
170 MEMORYTYPE Type;
171 LONG BasePage;
172 LONG PageCount;
173} MEMORYDESCRIPTOR;
174
175#endif /* _ASM_ARC_HINV_H */
diff --git a/include/asm-mips/arc/types.h b/include/asm-mips/fw/arc/types.h
index b9adcd6f0860..b9adcd6f0860 100644
--- a/include/asm-mips/arc/types.h
+++ b/include/asm-mips/fw/arc/types.h
diff --git a/include/asm-mips/fw/cfe/cfe_api.h b/include/asm-mips/fw/cfe/cfe_api.h
new file mode 100644
index 000000000000..41cf050b6810
--- /dev/null
+++ b/include/asm-mips/fw/cfe/cfe_api.h
@@ -0,0 +1,185 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/* *********************************************************************
20 *
21 * Broadcom Common Firmware Environment (CFE)
22 *
23 * Device function prototypes File: cfe_api.h
24 *
25 * This file contains declarations for doing callbacks to
26 * cfe from an application. It should be the only header
27 * needed by the application to use this library
28 *
29 * Authors: Mitch Lichtenberg, Chris Demetriou
30 *
31 ********************************************************************* */
32
33#ifndef CFE_API_H
34#define CFE_API_H
35
36/*
37 * Apply customizations here for different OSes. These need to:
38 * * typedef uint64_t, int64_t, intptr_t, uintptr_t.
39 * * define cfe_strlen() if use of an existing function is desired.
40 * * define CFE_API_IMPL_NAMESPACE if API functions are to use
41 * names in the implementation namespace.
42 * Also, optionally, if the build environment does not do so automatically,
43 * CFE_API_* can be defined here as desired.
44 */
45/* Begin customization. */
46#include <linux/types.h>
47#include <linux/string.h>
48
49typedef long intptr_t;
50
51#define cfe_strlen strlen
52
53#define CFE_API_ALL
54#define CFE_API_STRLEN_CUSTOM
55/* End customization. */
56
57
58/* *********************************************************************
59 * Constants
60 ********************************************************************* */
61
62/* Seal indicating CFE's presence, passed to user program. */
63#define CFE_EPTSEAL 0x43464531
64
65#define CFE_MI_RESERVED 0 /* memory is reserved, do not use */
66#define CFE_MI_AVAILABLE 1 /* memory is available */
67
68#define CFE_FLG_WARMSTART 0x00000001
69#define CFE_FLG_FULL_ARENA 0x00000001
70#define CFE_FLG_ENV_PERMANENT 0x00000001
71
72#define CFE_CPU_CMD_START 1
73#define CFE_CPU_CMD_STOP 0
74
75#define CFE_STDHANDLE_CONSOLE 0
76
77#define CFE_DEV_NETWORK 1
78#define CFE_DEV_DISK 2
79#define CFE_DEV_FLASH 3
80#define CFE_DEV_SERIAL 4
81#define CFE_DEV_CPU 5
82#define CFE_DEV_NVRAM 6
83#define CFE_DEV_CLOCK 7
84#define CFE_DEV_OTHER 8
85#define CFE_DEV_MASK 0x0F
86
87#define CFE_CACHE_FLUSH_D 1
88#define CFE_CACHE_INVAL_I 2
89#define CFE_CACHE_INVAL_D 4
90#define CFE_CACHE_INVAL_L2 8
91
92#define CFE_FWI_64BIT 0x00000001
93#define CFE_FWI_32BIT 0x00000002
94#define CFE_FWI_RELOC 0x00000004
95#define CFE_FWI_UNCACHED 0x00000008
96#define CFE_FWI_MULTICPU 0x00000010
97#define CFE_FWI_FUNCSIM 0x00000020
98#define CFE_FWI_RTLSIM 0x00000040
99
100typedef struct {
101 int64_t fwi_version; /* major, minor, eco version */
102 int64_t fwi_totalmem; /* total installed mem */
103 int64_t fwi_flags; /* various flags */
104 int64_t fwi_boardid; /* board ID */
105 int64_t fwi_bootarea_va; /* VA of boot area */
106 int64_t fwi_bootarea_pa; /* PA of boot area */
107 int64_t fwi_bootarea_size; /* size of boot area */
108} cfe_fwinfo_t;
109
110
111/*
112 * cfe_strlen is handled specially: If already defined, it has been
113 * overridden in this environment with a standard strlen-like function.
114 */
115#ifdef cfe_strlen
116# define CFE_API_STRLEN_CUSTOM
117#else
118# ifdef CFE_API_IMPL_NAMESPACE
119# define cfe_strlen(a) __cfe_strlen(a)
120# endif
121int cfe_strlen(char *name);
122#endif
123
124/*
125 * Defines and prototypes for functions which take no arguments.
126 */
127#ifdef CFE_API_IMPL_NAMESPACE
128int64_t __cfe_getticks(void);
129#define cfe_getticks() __cfe_getticks()
130#else
131int64_t cfe_getticks(void);
132#endif
133
134/*
135 * Defines and prototypes for the rest of the functions.
136 */
137#ifdef CFE_API_IMPL_NAMESPACE
138#define cfe_close(a) __cfe_close(a)
139#define cfe_cpu_start(a, b, c, d, e) __cfe_cpu_start(a, b, c, d, e)
140#define cfe_cpu_stop(a) __cfe_cpu_stop(a)
141#define cfe_enumenv(a, b, d, e, f) __cfe_enumenv(a, b, d, e, f)
142#define cfe_enummem(a, b, c, d, e) __cfe_enummem(a, b, c, d, e)
143#define cfe_exit(a, b) __cfe_exit(a, b)
144#define cfe_flushcache(a) __cfe_cacheflush(a)
145#define cfe_getdevinfo(a) __cfe_getdevinfo(a)
146#define cfe_getenv(a, b, c) __cfe_getenv(a, b, c)
147#define cfe_getfwinfo(a) __cfe_getfwinfo(a)
148#define cfe_getstdhandle(a) __cfe_getstdhandle(a)
149#define cfe_init(a, b) __cfe_init(a, b)
150#define cfe_inpstat(a) __cfe_inpstat(a)
151#define cfe_ioctl(a, b, c, d, e, f) __cfe_ioctl(a, b, c, d, e, f)
152#define cfe_open(a) __cfe_open(a)
153#define cfe_read(a, b, c) __cfe_read(a, b, c)
154#define cfe_readblk(a, b, c, d) __cfe_readblk(a, b, c, d)
155#define cfe_setenv(a, b) __cfe_setenv(a, b)
156#define cfe_write(a, b, c) __cfe_write(a, b, c)
157#define cfe_writeblk(a, b, c, d __cfe_writeblk(a, b, c, d)
158#endif /* CFE_API_IMPL_NAMESPACE */
159
160int cfe_close(int handle);
161int cfe_cpu_start(int cpu, void (*fn) (void), long sp, long gp, long a1);
162int cfe_cpu_stop(int cpu);
163int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);
164int cfe_enummem(int idx, int flags, uint64_t * start, uint64_t * length,
165 uint64_t * type);
166int cfe_exit(int warm, int status);
167int cfe_flushcache(int flg);
168int cfe_getdevinfo(char *name);
169int cfe_getenv(char *name, char *dest, int destlen);
170int cfe_getfwinfo(cfe_fwinfo_t * info);
171int cfe_getstdhandle(int flg);
172int cfe_init(uint64_t handle, uint64_t ept);
173int cfe_inpstat(int handle);
174int cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
175 int length, int *retlen, uint64_t offset);
176int cfe_open(char *name);
177int cfe_read(int handle, unsigned char *buffer, int length);
178int cfe_readblk(int handle, int64_t offset, unsigned char *buffer,
179 int length);
180int cfe_setenv(char *name, char *val);
181int cfe_write(int handle, unsigned char *buffer, int length);
182int cfe_writeblk(int handle, int64_t offset, unsigned char *buffer,
183 int length);
184
185#endif /* CFE_API_H */
diff --git a/arch/mips/sibyte/cfe/cfe_error.h b/include/asm-mips/fw/cfe/cfe_error.h
index 975f00002cbe..975f00002cbe 100644
--- a/arch/mips/sibyte/cfe/cfe_error.h
+++ b/include/asm-mips/fw/cfe/cfe_error.h
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 6a5fa32f615b..2de638f84c86 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -10,11 +10,12 @@
10#ifndef _ASM_HAZARDS_H 10#ifndef _ASM_HAZARDS_H
11#define _ASM_HAZARDS_H 11#define _ASM_HAZARDS_H
12 12
13
14#ifdef __ASSEMBLY__ 13#ifdef __ASSEMBLY__
15#define ASMMACRO(name, code...) .macro name; code; .endm 14#define ASMMACRO(name, code...) .macro name; code; .endm
16#else 15#else
17 16
17#include <asm/cpu-features.h>
18
18#define ASMMACRO(name, code...) \ 19#define ASMMACRO(name, code...) \
19__asm__(".macro " #name "; " #code "; .endm"); \ 20__asm__(".macro " #name "; " #code "; .endm"); \
20 \ 21 \
@@ -86,6 +87,57 @@ do { \
86 : "=r" (tmp)); \ 87 : "=r" (tmp)); \
87} while (0) 88} while (0)
88 89
90#elif defined(CONFIG_CPU_MIPSR1)
91
92/*
93 * These are slightly complicated by the fact that we guarantee R1 kernels to
94 * run fine on R2 processors.
95 */
96ASMMACRO(mtc0_tlbw_hazard,
97 _ssnop; _ssnop; _ehb
98 )
99ASMMACRO(tlbw_use_hazard,
100 _ssnop; _ssnop; _ssnop; _ehb
101 )
102ASMMACRO(tlb_probe_hazard,
103 _ssnop; _ssnop; _ssnop; _ehb
104 )
105ASMMACRO(irq_enable_hazard,
106 _ssnop; _ssnop; _ssnop; _ehb
107 )
108ASMMACRO(irq_disable_hazard,
109 _ssnop; _ssnop; _ssnop; _ehb
110 )
111ASMMACRO(back_to_back_c0_hazard,
112 _ssnop; _ssnop; _ssnop; _ehb
113 )
114/*
115 * gcc has a tradition of misscompiling the previous construct using the
116 * address of a label as argument to inline assembler. Gas otoh has the
117 * annoying difference between la and dla which are only usable for 32-bit
118 * rsp. 64-bit code, so can't be used without conditional compilation.
119 * The alterantive is switching the assembler to 64-bit code which happens
120 * to work right even for 32-bit code ...
121 */
122#define __instruction_hazard() \
123do { \
124 unsigned long tmp; \
125 \
126 __asm__ __volatile__( \
127 " .set mips64r2 \n" \
128 " dla %0, 1f \n" \
129 " jr.hb %0 \n" \
130 " .set mips0 \n" \
131 "1: \n" \
132 : "=r" (tmp)); \
133} while (0)
134
135#define instruction_hazard() \
136do { \
137 if (cpu_has_mips_r2) \
138 __instruction_hazard(); \
139} while (0)
140
89#elif defined(CONFIG_CPU_R10000) 141#elif defined(CONFIG_CPU_R10000)
90 142
91/* 143/*
@@ -193,7 +245,7 @@ ASMMACRO(enable_fpu_hazard,
193 .set mips64; 245 .set mips64;
194 .set noreorder; 246 .set noreorder;
195 _ssnop; 247 _ssnop;
196 bnezl $0,.+4; 248 bnezl $0, .+4;
197 _ssnop; 249 _ssnop;
198 .set pop 250 .set pop
199) 251)
diff --git a/include/asm-mips/hw_irq.h b/include/asm-mips/hw_irq.h
index 458d9fdc76bf..aca05a43a97b 100644
--- a/include/asm-mips/hw_irq.h
+++ b/include/asm-mips/hw_irq.h
@@ -8,15 +8,8 @@
8#ifndef __ASM_HW_IRQ_H 8#ifndef __ASM_HW_IRQ_H
9#define __ASM_HW_IRQ_H 9#define __ASM_HW_IRQ_H
10 10
11#include <linux/profile.h>
12#include <asm/atomic.h> 11#include <asm/atomic.h>
13 12
14extern void disable_8259A_irq(unsigned int irq);
15extern void enable_8259A_irq(unsigned int irq);
16extern int i8259A_irq_pending(unsigned int irq);
17extern void make_8259A_irq(unsigned int irq);
18extern void init_8259A(int aeoi);
19
20extern atomic_t irq_err_count; 13extern atomic_t irq_err_count;
21 14
22/* 15/*
diff --git a/include/asm-mips/i8253.h b/include/asm-mips/i8253.h
new file mode 100644
index 000000000000..8f689d7df6b1
--- /dev/null
+++ b/include/asm-mips/i8253.h
@@ -0,0 +1,30 @@
1/*
2 * Machine specific IO port address definition for generic.
3 * Written by Osamu Tomita <tomita@cinet.co.jp>
4 */
5#ifndef _MACH_IO_PORTS_H
6#define _MACH_IO_PORTS_H
7
8/* i8253A PIT registers */
9#define PIT_MODE 0x43
10#define PIT_CH0 0x40
11#define PIT_CH2 0x42
12
13/* i8259A PIC registers */
14#define PIC_MASTER_CMD 0x20
15#define PIC_MASTER_IMR 0x21
16#define PIC_MASTER_ISR PIC_MASTER_CMD
17#define PIC_MASTER_POLL PIC_MASTER_ISR
18#define PIC_MASTER_OCW3 PIC_MASTER_ISR
19#define PIC_SLAVE_CMD 0xa0
20#define PIC_SLAVE_IMR 0xa1
21
22/* i8259A PIC related value */
23#define PIC_CASCADE_IR 2
24#define MASTER_ICW4_DEFAULT 0x01
25#define SLAVE_ICW4_DEFAULT 0x01
26#define PIC_ICW4_AEOI 2
27
28extern void setup_pit_timer(void);
29
30#endif /* !_MACH_IO_PORTS_H */
diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h
index e88a01607fea..8572a2d90484 100644
--- a/include/asm-mips/i8259.h
+++ b/include/asm-mips/i8259.h
@@ -37,9 +37,8 @@
37 37
38extern spinlock_t i8259A_lock; 38extern spinlock_t i8259A_lock;
39 39
40extern void init_8259A(int auto_eoi); 40extern int i8259A_irq_pending(unsigned int irq);
41extern void enable_8259A_irq(unsigned int irq); 41extern void make_8259A_irq(unsigned int irq);
42extern void disable_8259A_irq(unsigned int irq);
43 42
44extern void init_i8259_irqs(void); 43extern void init_i8259_irqs(void);
45 44
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
index 92d90f75a636..cc88aed23f0f 100644
--- a/include/asm-mips/inventory.h
+++ b/include/asm-mips/inventory.h
@@ -17,8 +17,8 @@ typedef struct inventory_s {
17 17
18extern int inventory_items; 18extern int inventory_items;
19 19
20extern void add_to_inventory (int class, int type, int controller, int unit, int state); 20extern void add_to_inventory(int class, int type, int controller, int unit, int state);
21extern int dump_inventory_to_user (void __user *userbuf, int size); 21extern int dump_inventory_to_user(void __user *userbuf, int size);
22extern int __init init_inventory(void); 22extern int __init init_inventory(void);
23 23
24#endif /* __ASM_INVENTORY_H */ 24#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 7ba92890ea13..2cd8323c8586 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -40,11 +40,11 @@
40 * hardware. An example use would be for flash memory that's used for 40 * hardware. An example use would be for flash memory that's used for
41 * execute in place. 41 * execute in place.
42 */ 42 */
43# define __raw_ioswabb(a,x) (x) 43# define __raw_ioswabb(a, x) (x)
44# define __raw_ioswabw(a,x) (x) 44# define __raw_ioswabw(a, x) (x)
45# define __raw_ioswabl(a,x) (x) 45# define __raw_ioswabl(a, x) (x)
46# define __raw_ioswabq(a,x) (x) 46# define __raw_ioswabq(a, x) (x)
47# define ____raw_ioswabq(a,x) (x) 47# define ____raw_ioswabq(a, x) (x)
48 48
49/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ 49/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
50 50
@@ -561,9 +561,9 @@ extern void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
561extern void (*_dma_cache_wback)(unsigned long start, unsigned long size); 561extern void (*_dma_cache_wback)(unsigned long start, unsigned long size);
562extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); 562extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
563 563
564#define dma_cache_wback_inv(start, size) _dma_cache_wback_inv(start,size) 564#define dma_cache_wback_inv(start, size) _dma_cache_wback_inv(start, size)
565#define dma_cache_wback(start, size) _dma_cache_wback(start,size) 565#define dma_cache_wback(start, size) _dma_cache_wback(start, size)
566#define dma_cache_inv(start, size) _dma_cache_inv(start,size) 566#define dma_cache_inv(start, size) _dma_cache_inv(start, size)
567 567
568#else /* Sane hardware */ 568#else /* Sane hardware */
569 569
@@ -587,7 +587,7 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
587#define __CSR_32_ADJUST 0 587#define __CSR_32_ADJUST 0
588#endif 588#endif
589 589
590#define csr_out32(v,a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) 590#define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v))
591#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) 591#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST))
592 592
593/* 593/*
diff --git a/include/asm-mips/ioctl.h b/include/asm-mips/ioctl.h
index 2036fcb9f117..85067e248a83 100644
--- a/include/asm-mips/ioctl.h
+++ b/include/asm-mips/ioctl.h
@@ -54,7 +54,7 @@
54#define _IOC_IN 0x80000000 54#define _IOC_IN 0x80000000
55#define _IOC_INOUT (IOC_IN|IOC_OUT) 55#define _IOC_INOUT (IOC_IN|IOC_OUT)
56 56
57#define _IOC(dir,type,nr,size) \ 57#define _IOC(dir, type, nr, size) \
58 (((dir) << _IOC_DIRSHIFT) | \ 58 (((dir) << _IOC_DIRSHIFT) | \
59 ((type) << _IOC_TYPESHIFT) | \ 59 ((type) << _IOC_TYPESHIFT) | \
60 ((nr) << _IOC_NRSHIFT) | \ 60 ((nr) << _IOC_NRSHIFT) | \
@@ -68,13 +68,13 @@ extern unsigned int __invalid_size_argument_for_IOC;
68 sizeof(t) : __invalid_size_argument_for_IOC) 68 sizeof(t) : __invalid_size_argument_for_IOC)
69 69
70/* used to create numbers */ 70/* used to create numbers */
71#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) 71#define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0)
72#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) 72#define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), (_IOC_TYPECHECK(size)))
73#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) 73#define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size)))
74#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) 74#define _IOWR(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size)))
75#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) 75#define _IOR_BAD(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof(size))
76#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) 76#define _IOW_BAD(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof(size))
77#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) 77#define _IOWR_BAD(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, (type), (nr), sizeof(size))
78 78
79 79
80/* used to decode them.. */ 80/* used to decode them.. */
diff --git a/include/asm-mips/ioctls.h b/include/asm-mips/ioctls.h
index 5097cbf183a9..3f04a995ec54 100644
--- a/include/asm-mips/ioctls.h
+++ b/include/asm-mips/ioctls.h
@@ -77,12 +77,12 @@
77#define TIOCSBRK 0x5427 /* BSD compatibility */ 77#define TIOCSBRK 0x5427 /* BSD compatibility */
78#define TIOCCBRK 0x5428 /* BSD compatibility */ 78#define TIOCCBRK 0x5428 /* BSD compatibility */
79#define TIOCGSID 0x7416 /* Return the session ID of FD */ 79#define TIOCGSID 0x7416 /* Return the session ID of FD */
80#define TCGETS2 _IOR('T',0x2A, struct termios2) 80#define TCGETS2 _IOR('T', 0x2A, struct termios2)
81#define TCSETS2 _IOW('T',0x2B, struct termios2) 81#define TCSETS2 _IOW('T', 0x2B, struct termios2)
82#define TCSETSW2 _IOW('T',0x2C, struct termios2) 82#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
83#define TCSETSF2 _IOW('T',0x2D, struct termios2) 83#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
84#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 84#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
85#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 85#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
86 86
87/* I hope the range from 0x5480 on is free ... */ 87/* I hope the range from 0x5480 on is free ... */
88#define TIOCSCTTY 0x5480 /* become controlling tty */ 88#define TIOCSCTTY 0x5480 /* become controlling tty */
diff --git a/include/asm-mips/ip32/machine.h b/include/asm-mips/ip32/machine.h
deleted file mode 100644
index 1b631b8da6f8..000000000000
--- a/include/asm-mips/ip32/machine.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * machine.h -- Machine/group probing for ip32
3 *
4 * Copyright (C) 2001 Keith M Wesolowski
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10#ifndef _ASM_IP32_MACHINE_H
11#define _ASM_IP32_MACHINE_H
12
13
14#ifdef CONFIG_SGI_IP32
15
16#define SGI_MACH_O2 0x3201
17
18#endif /* CONFIG_SGI_IP32 */
19
20#endif /* _ASM_SGI_MACHINE_H */
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 2cb52cf8bd4e..a58f0eecc68f 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -46,6 +46,38 @@ static inline void smtc_im_ack_irq(unsigned int irq)
46 46
47#endif /* CONFIG_MIPS_MT_SMTC */ 47#endif /* CONFIG_MIPS_MT_SMTC */
48 48
49#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
50#include <linux/cpumask.h>
51
52extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity);
53extern void smtc_forward_irq(unsigned int irq);
54
55/*
56 * IRQ affinity hook invoked at the beginning of interrupt dispatch
57 * if option is enabled.
58 *
59 * Up through Linux 2.6.22 (at least) cpumask operations are very
60 * inefficient on MIPS. Initial prototypes of SMTC IRQ affinity
61 * used a "fast path" per-IRQ-descriptor cache of affinity information
62 * to reduce latency. As there is a project afoot to optimize the
63 * cpumask implementations, this version is optimistically assuming
64 * that cpumask.h macro overhead is reasonable during interrupt dispatch.
65 */
66#define IRQ_AFFINITY_HOOK(irq) \
67do { \
68 if (!cpu_isset(smp_processor_id(), irq_desc[irq].affinity)) { \
69 smtc_forward_irq(irq); \
70 irq_exit(); \
71 return; \
72 } \
73} while (0)
74
75#else /* Not doing SMTC affinity */
76
77#define IRQ_AFFINITY_HOOK(irq) do { } while (0)
78
79#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
80
49#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP 81#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
50 82
51/* 83/*
@@ -56,13 +88,27 @@ static inline void smtc_im_ack_irq(unsigned int irq)
56 */ 88 */
57#define __DO_IRQ_SMTC_HOOK(irq) \ 89#define __DO_IRQ_SMTC_HOOK(irq) \
58do { \ 90do { \
91 IRQ_AFFINITY_HOOK(irq); \
59 if (irq_hwmask[irq] & 0x0000ff00) \ 92 if (irq_hwmask[irq] & 0x0000ff00) \
60 write_c0_tccontext(read_c0_tccontext() & \ 93 write_c0_tccontext(read_c0_tccontext() & \
61 ~(irq_hwmask[irq] & 0x0000ff00)); \ 94 ~(irq_hwmask[irq] & 0x0000ff00)); \
95} while (0)
96
97#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) \
98do { \
99 if (irq_hwmask[irq] & 0x0000ff00) \
100 write_c0_tccontext(read_c0_tccontext() & \
101 ~(irq_hwmask[irq] & 0x0000ff00)); \
62} while (0) 102} while (0)
103
63#else 104#else
64 105
65#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0) 106#define __DO_IRQ_SMTC_HOOK(irq) \
107do { \
108 IRQ_AFFINITY_HOOK(irq); \
109} while (0)
110#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) do { } while (0)
111
66#endif 112#endif
67 113
68/* 114/*
@@ -81,6 +127,23 @@ do { \
81 irq_exit(); \ 127 irq_exit(); \
82} while (0) 128} while (0)
83 129
130#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
131/*
132 * To avoid inefficient and in some cases pathological re-checking of
133 * IRQ affinity, we have this variant that skips the affinity check.
134 */
135
136
137#define do_IRQ_no_affinity(irq) \
138do { \
139 irq_enter(); \
140 __NO_AFFINITY_IRQ_SMTC_HOOK(irq); \
141 generic_handle_irq(irq); \
142 irq_exit(); \
143} while (0)
144
145#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
146
84extern void arch_init_irq(void); 147extern void arch_init_irq(void);
85extern void spurious_interrupt(void); 148extern void spurious_interrupt(void);
86 149
diff --git a/include/asm-mips/irq_gt641xx.h b/include/asm-mips/irq_gt641xx.h
new file mode 100644
index 000000000000..f9a7c3ac2e66
--- /dev/null
+++ b/include/asm-mips/irq_gt641xx.h
@@ -0,0 +1,60 @@
1/*
2 * Galileo/Marvell GT641xx IRQ definitions.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#ifndef _ASM_IRQ_GT641XX_H
21#define _ASM_IRQ_GT641XX_H
22
23#ifndef GT641XX_IRQ_BASE
24#define GT641XX_IRQ_BASE 8
25#endif
26
27#define GT641XX_MEMORY_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 1)
28#define GT641XX_DMA_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 2)
29#define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 3)
30#define GT641XX_DMA0_IRQ (GT641XX_IRQ_BASE + 4)
31#define GT641XX_DMA1_IRQ (GT641XX_IRQ_BASE + 5)
32#define GT641XX_DMA2_IRQ (GT641XX_IRQ_BASE + 6)
33#define GT641XX_DMA3_IRQ (GT641XX_IRQ_BASE + 7)
34#define GT641XX_TIMER0_IRQ (GT641XX_IRQ_BASE + 8)
35#define GT641XX_TIMER1_IRQ (GT641XX_IRQ_BASE + 9)
36#define GT641XX_TIMER2_IRQ (GT641XX_IRQ_BASE + 10)
37#define GT641XX_TIMER3_IRQ (GT641XX_IRQ_BASE + 11)
38#define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 12)
39#define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 13)
40#define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 14)
41#define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 15)
42#define GT641XX_PCI_0_ADDRESS_ERROR_IRQ (GT641XX_IRQ_BASE + 16)
43#define GT641XX_MEMORY_ERROR_IRQ (GT641XX_IRQ_BASE + 17)
44#define GT641XX_PCI_0_MASTER_ABORT_IRQ (GT641XX_IRQ_BASE + 18)
45#define GT641XX_PCI_0_TARGET_ABORT_IRQ (GT641XX_IRQ_BASE + 19)
46#define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ (GT641XX_IRQ_BASE + 20)
47#define GT641XX_CPU_INT0_IRQ (GT641XX_IRQ_BASE + 21)
48#define GT641XX_CPU_INT1_IRQ (GT641XX_IRQ_BASE + 22)
49#define GT641XX_CPU_INT2_IRQ (GT641XX_IRQ_BASE + 23)
50#define GT641XX_CPU_INT3_IRQ (GT641XX_IRQ_BASE + 24)
51#define GT641XX_CPU_INT4_IRQ (GT641XX_IRQ_BASE + 25)
52#define GT641XX_PCI_INT0_IRQ (GT641XX_IRQ_BASE + 26)
53#define GT641XX_PCI_INT1_IRQ (GT641XX_IRQ_BASE + 27)
54#define GT641XX_PCI_INT2_IRQ (GT641XX_IRQ_BASE + 28)
55#define GT641XX_PCI_INT3_IRQ (GT641XX_IRQ_BASE + 29)
56
57extern void gt641xx_irq_dispatch(void);
58extern void gt641xx_irq_init(void);
59
60#endif /* _ASM_IRQ_GT641XX_H */
diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h
index e459fa05db83..881e8866501d 100644
--- a/include/asm-mips/irqflags.h
+++ b/include/asm-mips/irqflags.h
@@ -16,7 +16,7 @@
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <asm/hazards.h> 17#include <asm/hazards.h>
18 18
19__asm__ ( 19__asm__(
20 " .macro raw_local_irq_enable \n" 20 " .macro raw_local_irq_enable \n"
21 " .set push \n" 21 " .set push \n"
22 " .set reorder \n" 22 " .set reorder \n"
@@ -65,7 +65,7 @@ static inline void raw_local_irq_enable(void)
65 * 65 *
66 * Workaround: mask EXL bit of the result or place a nop before mfc0. 66 * Workaround: mask EXL bit of the result or place a nop before mfc0.
67 */ 67 */
68__asm__ ( 68__asm__(
69 " .macro raw_local_irq_disable\n" 69 " .macro raw_local_irq_disable\n"
70 " .set push \n" 70 " .set push \n"
71 " .set noat \n" 71 " .set noat \n"
@@ -96,7 +96,7 @@ static inline void raw_local_irq_disable(void)
96 : "memory"); 96 : "memory");
97} 97}
98 98
99__asm__ ( 99__asm__(
100 " .macro raw_local_save_flags flags \n" 100 " .macro raw_local_save_flags flags \n"
101 " .set push \n" 101 " .set push \n"
102 " .set reorder \n" 102 " .set reorder \n"
@@ -113,7 +113,7 @@ __asm__ __volatile__( \
113 "raw_local_save_flags %0" \ 113 "raw_local_save_flags %0" \
114 : "=r" (x)) 114 : "=r" (x))
115 115
116__asm__ ( 116__asm__(
117 " .macro raw_local_irq_save result \n" 117 " .macro raw_local_irq_save result \n"
118 " .set push \n" 118 " .set push \n"
119 " .set reorder \n" 119 " .set reorder \n"
@@ -145,7 +145,7 @@ __asm__ __volatile__( \
145 : /* no inputs */ \ 145 : /* no inputs */ \
146 : "memory") 146 : "memory")
147 147
148__asm__ ( 148__asm__(
149 " .macro raw_local_irq_restore flags \n" 149 " .macro raw_local_irq_restore flags \n"
150 " .set push \n" 150 " .set push \n"
151 " .set noreorder \n" 151 " .set noreorder \n"
diff --git a/include/asm-mips/jazz.h b/include/asm-mips/jazz.h
index 81cbf004fd13..83f449dec95e 100644
--- a/include/asm-mips/jazz.h
+++ b/include/asm-mips/jazz.h
@@ -185,37 +185,25 @@ typedef struct {
185#define JAZZ_IO_IRQ_ENABLE 0xe0010002 185#define JAZZ_IO_IRQ_ENABLE 0xe0010002
186 186
187/* 187/*
188 * JAZZ interrupt enable bits
189 */
190#define JAZZ_IE_PARALLEL (1 << 0)
191#define JAZZ_IE_FLOPPY (1 << 1)
192#define JAZZ_IE_SOUND (1 << 2)
193#define JAZZ_IE_VIDEO (1 << 3)
194#define JAZZ_IE_ETHERNET (1 << 4)
195#define JAZZ_IE_SCSI (1 << 5)
196#define JAZZ_IE_KEYBOARD (1 << 6)
197#define JAZZ_IE_MOUSE (1 << 7)
198#define JAZZ_IE_SERIAL1 (1 << 8)
199#define JAZZ_IE_SERIAL2 (1 << 9)
200
201/*
202 * JAZZ Interrupt Level definitions 188 * JAZZ Interrupt Level definitions
203 * 189 *
204 * This is somewhat broken. For reasons which nobody can remember anymore 190 * This is somewhat broken. For reasons which nobody can remember anymore
205 * we remap the Jazz interrupts to the usual ISA style interrupt numbers. 191 * we remap the Jazz interrupts to the usual ISA style interrupt numbers.
206 */ 192 */
207#define JAZZ_PARALLEL_IRQ 16 193#define JAZZ_IRQ_START 24
208#define JAZZ_FLOPPY_IRQ 17 194#define JAZZ_IRQ_END (24 + 9)
209#define JAZZ_SOUND_IRQ 18 195#define JAZZ_PARALLEL_IRQ (JAZZ_IRQ_START + 0)
210#define JAZZ_VIDEO_IRQ 19 196#define JAZZ_FLOPPY_IRQ (JAZZ_IRQ_START + 1)
211#define JAZZ_ETHERNET_IRQ 20 197#define JAZZ_SOUND_IRQ (JAZZ_IRQ_START + 2)
212#define JAZZ_SCSI_IRQ 21 198#define JAZZ_VIDEO_IRQ (JAZZ_IRQ_START + 3)
213#define JAZZ_KEYBOARD_IRQ 22 199#define JAZZ_ETHERNET_IRQ (JAZZ_IRQ_START + 4)
214#define JAZZ_MOUSE_IRQ 23 200#define JAZZ_SCSI_IRQ (JAZZ_IRQ_START + 5)
215#define JAZZ_SERIAL1_IRQ 24 201#define JAZZ_KEYBOARD_IRQ (JAZZ_IRQ_START + 6)
216#define JAZZ_SERIAL2_IRQ 25 202#define JAZZ_MOUSE_IRQ (JAZZ_IRQ_START + 7)
217 203#define JAZZ_SERIAL1_IRQ (JAZZ_IRQ_START + 8)
218#define JAZZ_TIMER_IRQ 31 204#define JAZZ_SERIAL2_IRQ (JAZZ_IRQ_START + 9)
205
206#define JAZZ_TIMER_IRQ (MIPS_CPU_IRQ_BASE+6)
219 207
220 208
221/* 209/*
diff --git a/include/asm-mips/jazzdma.h b/include/asm-mips/jazzdma.h
index 0a205b77e505..8bb37bba68f0 100644
--- a/include/asm-mips/jazzdma.h
+++ b/include/asm-mips/jazzdma.h
@@ -7,7 +7,6 @@
7/* 7/*
8 * Prototypes and macros 8 * Prototypes and macros
9 */ 9 */
10extern void vdma_init(void);
11extern unsigned long vdma_alloc(unsigned long paddr, unsigned long size); 10extern unsigned long vdma_alloc(unsigned long paddr, unsigned long size);
12extern int vdma_free(unsigned long laddr); 11extern int vdma_free(unsigned long laddr);
13extern int vdma_remap(unsigned long laddr, unsigned long paddr, 12extern int vdma_remap(unsigned long laddr, unsigned long paddr,
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
index 4be2f25f70dd..211bcf47fffb 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/jmr3927/tx3927.h
@@ -53,23 +53,23 @@ struct tx3927_dma_reg {
53#include <asm/byteorder.h> 53#include <asm/byteorder.h>
54 54
55#ifdef __BIG_ENDIAN 55#ifdef __BIG_ENDIAN
56#define endian_def_s2(e1,e2) \ 56#define endian_def_s2(e1, e2) \
57 volatile unsigned short e1,e2 57 volatile unsigned short e1, e2
58#define endian_def_sb2(e1,e2,e3) \ 58#define endian_def_sb2(e1, e2, e3) \
59 volatile unsigned short e1;volatile unsigned char e2,e3 59 volatile unsigned short e1;volatile unsigned char e2, e3
60#define endian_def_b2s(e1,e2,e3) \ 60#define endian_def_b2s(e1, e2, e3) \
61 volatile unsigned char e1,e2;volatile unsigned short e3 61 volatile unsigned char e1, e2;volatile unsigned short e3
62#define endian_def_b4(e1,e2,e3,e4) \ 62#define endian_def_b4(e1, e2, e3, e4) \
63 volatile unsigned char e1,e2,e3,e4 63 volatile unsigned char e1, e2, e3, e4
64#else 64#else
65#define endian_def_s2(e1,e2) \ 65#define endian_def_s2(e1, e2) \
66 volatile unsigned short e2,e1 66 volatile unsigned short e2, e1
67#define endian_def_sb2(e1,e2,e3) \ 67#define endian_def_sb2(e1, e2, e3) \
68 volatile unsigned char e3,e2;volatile unsigned short e1 68 volatile unsigned char e3, e2;volatile unsigned short e1
69#define endian_def_b2s(e1,e2,e3) \ 69#define endian_def_b2s(e1, e2, e3) \
70 volatile unsigned short e3;volatile unsigned char e2,e1 70 volatile unsigned short e3;volatile unsigned char e2, e1
71#define endian_def_b4(e1,e2,e3,e4) \ 71#define endian_def_b4(e1, e2, e3, e4) \
72 volatile unsigned char e4,e3,e2,e1 72 volatile unsigned char e4, e3, e2, e1
73#endif 73#endif
74 74
75struct tx3927_pcic_reg { 75struct tx3927_pcic_reg {
diff --git a/include/asm-mips/lasat/ds1603.h b/include/asm-mips/lasat/ds1603.h
new file mode 100644
index 000000000000..edcd7544b358
--- /dev/null
+++ b/include/asm-mips/lasat/ds1603.h
@@ -0,0 +1,18 @@
1#include <asm/addrspace.h>
2
3/* Lasat 100 */
4#define DS1603_REG_100 (KSEG1ADDR(0x1c810000))
5#define DS1603_RST_100 (1 << 2)
6#define DS1603_CLK_100 (1 << 0)
7#define DS1603_DATA_SHIFT_100 1
8#define DS1603_DATA_100 (1 << DS1603_DATA_SHIFT_100)
9
10/* Lasat 200 */
11#define DS1603_REG_200 (KSEG1ADDR(0x11000000))
12#define DS1603_RST_200 (1 << 3)
13#define DS1603_CLK_200 (1 << 4)
14#define DS1603_DATA_200 (1 << 5)
15
16#define DS1603_DATA_REG_200 (DS1603_REG_200 + 0x10000)
17#define DS1603_DATA_READ_SHIFT_200 9
18#define DS1603_DATA_READ_200 (1 << DS1603_DATA_READ_SHIFT_200)
diff --git a/include/asm-mips/lasat/eeprom.h b/include/asm-mips/lasat/eeprom.h
new file mode 100644
index 000000000000..3dac203697fa
--- /dev/null
+++ b/include/asm-mips/lasat/eeprom.h
@@ -0,0 +1,17 @@
1#include <asm/addrspace.h>
2
3/* lasat 100 */
4#define AT93C_REG_100 KSEG1ADDR(0x1c810000)
5#define AT93C_RDATA_REG_100 AT93C_REG_100
6#define AT93C_RDATA_SHIFT_100 4
7#define AT93C_WDATA_SHIFT_100 4
8#define AT93C_CS_M_100 (1 << 5)
9#define AT93C_CLK_M_100 (1 << 3)
10
11/* lasat 200 */
12#define AT93C_REG_200 KSEG1ADDR(0x11000000)
13#define AT93C_RDATA_REG_200 (AT93C_REG_200+0x10000)
14#define AT93C_RDATA_SHIFT_200 8
15#define AT93C_WDATA_SHIFT_200 2
16#define AT93C_CS_M_200 (1 << 0)
17#define AT93C_CLK_M_200 (1 << 1)
diff --git a/include/asm-mips/lasat/head.h b/include/asm-mips/lasat/head.h
new file mode 100644
index 000000000000..f5589f31a197
--- /dev/null
+++ b/include/asm-mips/lasat/head.h
@@ -0,0 +1,22 @@
1/*
2 * Image header stuff
3 */
4#ifndef _HEAD_H
5#define _HEAD_H
6
7#define LASAT_K_MAGIC0_VAL 0xfedeabba
8#define LASAT_K_MAGIC1_VAL 0x00bedead
9
10#ifndef _LANGUAGE_ASSEMBLY
11#include <linux/types.h>
12struct bootloader_header {
13 u32 magic[2];
14 u32 version;
15 u32 image_start;
16 u32 image_size;
17 u32 kernel_start;
18 u32 kernel_entry;
19};
20#endif
21
22#endif /* _HEAD_H */
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
new file mode 100644
index 000000000000..ea04d9262edc
--- /dev/null
+++ b/include/asm-mips/lasat/lasat.h
@@ -0,0 +1,256 @@
1/*
2 * lasat.h
3 *
4 * Thomas Horsten <thh@lasat.com>
5 * Copyright (C) 2000 LASAT Networks A/S.
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * Configuration for LASAT boards, loads the appropriate include files.
21 */
22#ifndef _LASAT_H
23#define _LASAT_H
24
25#ifndef _LANGUAGE_ASSEMBLY
26
27extern struct lasat_misc {
28 volatile u32 *reset_reg;
29 volatile u32 *flash_wp_reg;
30 u32 flash_wp_bit;
31} *lasat_misc;
32
33enum lasat_mtdparts {
34 LASAT_MTD_BOOTLOADER,
35 LASAT_MTD_SERVICE,
36 LASAT_MTD_NORMAL,
37 LASAT_MTD_CONFIG,
38 LASAT_MTD_FS,
39 LASAT_MTD_LAST
40};
41
42/*
43 * The format of the data record in the EEPROM.
44 * See Documentation/LASAT/eeprom.txt for a detailed description
45 * of the fields in this struct, and the LASAT Hardware Configuration
46 * field specification for a detailed description of the config
47 * field.
48 */
49#include <linux/types.h>
50
51#define LASAT_EEPROM_VERSION 7
52struct lasat_eeprom_struct {
53 unsigned int version;
54 unsigned int cfg[3];
55 unsigned char hwaddr[6];
56 unsigned char print_partno[12];
57 unsigned char term0;
58 unsigned char print_serial[14];
59 unsigned char term1;
60 unsigned char prod_partno[12];
61 unsigned char term2;
62 unsigned char prod_serial[14];
63 unsigned char term3;
64 unsigned char passwd_hash[16];
65 unsigned char pwdnull;
66 unsigned char vendid;
67 unsigned char ts_ref;
68 unsigned char ts_signoff;
69 unsigned char reserved[11];
70 unsigned char debugaccess;
71 unsigned short prid;
72 unsigned int serviceflag;
73 unsigned int ipaddr;
74 unsigned int netmask;
75 unsigned int crc32;
76};
77
78struct lasat_eeprom_struct_pre7 {
79 unsigned int version;
80 unsigned int flags[3];
81 unsigned char hwaddr0[6];
82 unsigned char hwaddr1[6];
83 unsigned char print_partno[9];
84 unsigned char term0;
85 unsigned char print_serial[14];
86 unsigned char term1;
87 unsigned char prod_partno[9];
88 unsigned char term2;
89 unsigned char prod_serial[14];
90 unsigned char term3;
91 unsigned char passwd_hash[24];
92 unsigned char pwdnull;
93 unsigned char vendor;
94 unsigned char ts_ref;
95 unsigned char ts_signoff;
96 unsigned char reserved[6];
97 unsigned int writecount;
98 unsigned int ipaddr;
99 unsigned int netmask;
100 unsigned int crc32;
101};
102
103/* Configuration descriptor encoding - see the doc for details */
104
105#define LASAT_W0_DSCTYPE(v) (((v)) & 0xf)
106#define LASAT_W0_BMID(v) (((v) >> 0x04) & 0xf)
107#define LASAT_W0_CPUTYPE(v) (((v) >> 0x08) & 0xf)
108#define LASAT_W0_BUSSPEED(v) (((v) >> 0x0c) & 0xf)
109#define LASAT_W0_CPUCLK(v) (((v) >> 0x10) & 0xf)
110#define LASAT_W0_SDRAMBANKSZ(v) (((v) >> 0x14) & 0xf)
111#define LASAT_W0_SDRAMBANKS(v) (((v) >> 0x18) & 0xf)
112#define LASAT_W0_L2CACHE(v) (((v) >> 0x1c) & 0xf)
113
114#define LASAT_W1_EDHAC(v) (((v)) & 0xf)
115#define LASAT_W1_HIFN(v) (((v) >> 0x04) & 0x1)
116#define LASAT_W1_ISDN(v) (((v) >> 0x05) & 0x1)
117#define LASAT_W1_IDE(v) (((v) >> 0x06) & 0x1)
118#define LASAT_W1_HDLC(v) (((v) >> 0x07) & 0x1)
119#define LASAT_W1_USVERSION(v) (((v) >> 0x08) & 0x1)
120#define LASAT_W1_4MACS(v) (((v) >> 0x09) & 0x1)
121#define LASAT_W1_EXTSERIAL(v) (((v) >> 0x0a) & 0x1)
122#define LASAT_W1_FLASHSIZE(v) (((v) >> 0x0c) & 0xf)
123#define LASAT_W1_PCISLOTS(v) (((v) >> 0x10) & 0xf)
124#define LASAT_W1_PCI1OPT(v) (((v) >> 0x14) & 0xf)
125#define LASAT_W1_PCI2OPT(v) (((v) >> 0x18) & 0xf)
126#define LASAT_W1_PCI3OPT(v) (((v) >> 0x1c) & 0xf)
127
128/* Routines specific to LASAT boards */
129
130#define LASAT_BMID_MASQUERADE2 0
131#define LASAT_BMID_MASQUERADEPRO 1
132#define LASAT_BMID_SAFEPIPE25 2
133#define LASAT_BMID_SAFEPIPE50 3
134#define LASAT_BMID_SAFEPIPE100 4
135#define LASAT_BMID_SAFEPIPE5000 5
136#define LASAT_BMID_SAFEPIPE7000 6
137#define LASAT_BMID_SAFEPIPE1000 7
138#if 0
139#define LASAT_BMID_SAFEPIPE30 7
140#define LASAT_BMID_SAFEPIPE5100 8
141#define LASAT_BMID_SAFEPIPE7100 9
142#endif
143#define LASAT_BMID_UNKNOWN 0xf
144#define LASAT_MAX_BMID_NAMES 9 /* no larger than 15! */
145
146#define LASAT_HAS_EDHAC (1 << 0)
147#define LASAT_EDHAC_FAST (1 << 1)
148#define LASAT_HAS_EADI (1 << 2)
149#define LASAT_HAS_HIFN (1 << 3)
150#define LASAT_HAS_ISDN (1 << 4)
151#define LASAT_HAS_LEASEDLINE_IF (1 << 5)
152#define LASAT_HAS_HDC (1 << 6)
153
154#define LASAT_PRID_MASQUERADE2 0
155#define LASAT_PRID_MASQUERADEPRO 1
156#define LASAT_PRID_SAFEPIPE25 2
157#define LASAT_PRID_SAFEPIPE50 3
158#define LASAT_PRID_SAFEPIPE100 4
159#define LASAT_PRID_SAFEPIPE5000 5
160#define LASAT_PRID_SAFEPIPE7000 6
161#define LASAT_PRID_SAFEPIPE30 7
162#define LASAT_PRID_SAFEPIPE5100 8
163#define LASAT_PRID_SAFEPIPE7100 9
164
165#define LASAT_PRID_SAFEPIPE1110 10
166#define LASAT_PRID_SAFEPIPE3020 11
167#define LASAT_PRID_SAFEPIPE3030 12
168#define LASAT_PRID_SAFEPIPE5020 13
169#define LASAT_PRID_SAFEPIPE5030 14
170#define LASAT_PRID_SAFEPIPE1120 15
171#define LASAT_PRID_SAFEPIPE1130 16
172#define LASAT_PRID_SAFEPIPE6010 17
173#define LASAT_PRID_SAFEPIPE6110 18
174#define LASAT_PRID_SAFEPIPE6210 19
175#define LASAT_PRID_SAFEPIPE1020 20
176#define LASAT_PRID_SAFEPIPE1040 21
177#define LASAT_PRID_SAFEPIPE1060 22
178
179struct lasat_info {
180 unsigned int li_cpu_hz;
181 unsigned int li_bus_hz;
182 unsigned int li_bmid;
183 unsigned int li_memsize;
184 unsigned int li_flash_size;
185 unsigned int li_prid;
186 unsigned char li_bmstr[16];
187 unsigned char li_namestr[32];
188 unsigned char li_typestr[16];
189 /* Info on the Flash layout */
190 unsigned int li_flash_base;
191 unsigned long li_flashpart_base[LASAT_MTD_LAST];
192 unsigned long li_flashpart_size[LASAT_MTD_LAST];
193 struct lasat_eeprom_struct li_eeprom_info;
194 unsigned int li_eeprom_upgrade_version;
195 unsigned int li_debugaccess;
196};
197
198extern struct lasat_info lasat_board_info;
199
200static inline unsigned long lasat_flash_partition_start(int partno)
201{
202 if (partno < 0 || partno >= LASAT_MTD_LAST)
203 return 0;
204
205 return lasat_board_info.li_flashpart_base[partno];
206}
207
208static inline unsigned long lasat_flash_partition_size(int partno)
209{
210 if (partno < 0 || partno >= LASAT_MTD_LAST)
211 return 0;
212
213 return lasat_board_info.li_flashpart_size[partno];
214}
215
216/* Called from setup() to initialize the global board_info struct */
217extern int lasat_init_board_info(void);
218
219/* Write the modified EEPROM info struct */
220extern void lasat_write_eeprom_info(void);
221
222#define N_MACHTYPES 2
223/* for calibration of delays */
224
225/* the lasat_ndelay function is necessary because it is used at an
226 * early stage of the boot process where ndelay is not calibrated.
227 * It is used for the bit-banging rtc and eeprom drivers */
228
229#include <linux/delay.h>
230
231/* calculating with the slowest board with 100 MHz clock */
232#define LASAT_100_DIVIDER 20
233/* All 200's run at 250 MHz clock */
234#define LASAT_200_DIVIDER 8
235
236extern unsigned int lasat_ndelay_divider;
237
238static inline void lasat_ndelay(unsigned int ns)
239{
240 __delay(ns / lasat_ndelay_divider);
241}
242
243#endif /* !defined (_LANGUAGE_ASSEMBLY) */
244
245#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
246#define LASAT_SERVICEMODE_MAGIC_2 0xfedeabba
247
248/* Lasat 100 boards */
249#define LASAT_GT_BASE (KSEG1ADDR(0x14000000))
250
251/* Lasat 200 boards */
252#define Vrc5074_PHYS_BASE 0x1fa00000
253#define Vrc5074_BASE (KSEG1ADDR(Vrc5074_PHYS_BASE))
254#define PCI_WINDOW1 0x1a000000
255
256#endif /* _LASAT_H */
diff --git a/include/asm-mips/lasat/lasatint.h b/include/asm-mips/lasat/lasatint.h
new file mode 100644
index 000000000000..065474feeccc
--- /dev/null
+++ b/include/asm-mips/lasat/lasatint.h
@@ -0,0 +1,12 @@
1#define LASATINT_END 16
2
3/* lasat 100 */
4#define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000))
5#define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000))
6#define LASATINT_MASK_SHIFT_100 0
7
8/* lasat 200 */
9#define LASAT_INT_STATUS_REG_200 (KSEG1ADDR(0x1104003c))
10#define LASAT_INT_MASK_REG_200 (KSEG1ADDR(0x1104003c))
11#define LASATINT_MASK_SHIFT_200 16
12
diff --git a/include/asm-mips/lasat/picvue.h b/include/asm-mips/lasat/picvue.h
new file mode 100644
index 000000000000..42a492edc40e
--- /dev/null
+++ b/include/asm-mips/lasat/picvue.h
@@ -0,0 +1,15 @@
1/* Lasat 100 */
2#define PVC_REG_100 KSEG1ADDR(0x1c820000)
3#define PVC_DATA_SHIFT_100 0
4#define PVC_DATA_M_100 0xFF
5#define PVC_E_100 (1 << 8)
6#define PVC_RW_100 (1 << 9)
7#define PVC_RS_100 (1 << 10)
8
9/* Lasat 200 */
10#define PVC_REG_200 KSEG1ADDR(0x11000000)
11#define PVC_DATA_SHIFT_200 24
12#define PVC_DATA_M_200 (0xFF << PVC_DATA_SHIFT_200)
13#define PVC_E_200 (1 << 16)
14#define PVC_RW_200 (1 << 17)
15#define PVC_RS_200 (1 << 18)
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
new file mode 100644
index 000000000000..bafe68b10614
--- /dev/null
+++ b/include/asm-mips/lasat/serial.h
@@ -0,0 +1,13 @@
1#include <asm/lasat/lasat.h>
2
3/* Lasat 100 boards serial configuration */
4#define LASAT_BASE_BAUD_100 (7372800 / 16)
5#define LASAT_UART_REGS_BASE_100 0x1c8b0000
6#define LASAT_UART_REGS_SHIFT_100 2
7#define LASATINT_UART_100 8
8
9/* * LASAT 200 boards serial configuration */
10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
12#define LASAT_UART_REGS_SHIFT_200 3
13#define LASATINT_UART_200 13
diff --git a/include/asm-mips/linkage.h b/include/asm-mips/linkage.h
index b6185d3cfe68..e9a940d1b0c6 100644
--- a/include/asm-mips/linkage.h
+++ b/include/asm-mips/linkage.h
@@ -5,4 +5,6 @@
5#include <asm/asm.h> 5#include <asm/asm.h>
6#endif 6#endif
7 7
8#define __weak __attribute__((weak))
9
8#endif 10#endif
diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h
index f9a5ce5c9af1..f96fd59e0845 100644
--- a/include/asm-mips/local.h
+++ b/include/asm-mips/local.h
@@ -15,10 +15,10 @@ typedef struct
15#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) } 15#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) }
16 16
17#define local_read(l) atomic_long_read(&(l)->a) 17#define local_read(l) atomic_long_read(&(l)->a)
18#define local_set(l,i) atomic_long_set(&(l)->a, (i)) 18#define local_set(l, i) atomic_long_set(&(l)->a, (i))
19 19
20#define local_add(i,l) atomic_long_add((i),(&(l)->a)) 20#define local_add(i, l) atomic_long_add((i), (&(l)->a))
21#define local_sub(i,l) atomic_long_sub((i),(&(l)->a)) 21#define local_sub(i, l) atomic_long_sub((i), (&(l)->a))
22#define local_inc(l) atomic_long_inc(&(l)->a) 22#define local_inc(l) atomic_long_inc(&(l)->a)
23#define local_dec(l) atomic_long_dec(&(l)->a) 23#define local_dec(l) atomic_long_dec(&(l)->a)
24 24
@@ -117,7 +117,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
117 117
118#define local_cmpxchg(l, o, n) \ 118#define local_cmpxchg(l, o, n) \
119 ((long)cmpxchg_local(&((l)->a.counter), (o), (n))) 119 ((long)cmpxchg_local(&((l)->a.counter), (o), (n)))
120#define local_xchg(l, n) (xchg_local(&((l)->a.counter),(n))) 120#define local_xchg(l, n) (xchg_local(&((l)->a.counter), (n)))
121 121
122/** 122/**
123 * local_add_unless - add unless the number is a given value 123 * local_add_unless - add unless the number is a given value
@@ -138,8 +138,8 @@ static __inline__ long local_sub_return(long i, local_t * l)
138}) 138})
139#define local_inc_not_zero(l) local_add_unless((l), 1, 0) 139#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
140 140
141#define local_dec_return(l) local_sub_return(1,(l)) 141#define local_dec_return(l) local_sub_return(1, (l))
142#define local_inc_return(l) local_add_return(1,(l)) 142#define local_inc_return(l) local_add_return(1, (l))
143 143
144/* 144/*
145 * local_sub_and_test - subtract value from variable and test result 145 * local_sub_and_test - subtract value from variable and test result
@@ -150,7 +150,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
150 * true if the result is zero, or false for all 150 * true if the result is zero, or false for all
151 * other cases. 151 * other cases.
152 */ 152 */
153#define local_sub_and_test(i,l) (local_sub_return((i), (l)) == 0) 153#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0)
154 154
155/* 155/*
156 * local_inc_and_test - increment and test 156 * local_inc_and_test - increment and test
@@ -181,7 +181,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
181 * if the result is negative, or false when 181 * if the result is negative, or false when
182 * result is greater than or equal to zero. 182 * result is greater than or equal to zero.
183 */ 183 */
184#define local_add_negative(i,l) (local_add_return(i, (l)) < 0) 184#define local_add_negative(i, l) (local_add_return(i, (l)) < 0)
185 185
186/* Use these for per-cpu local_t variables: on some archs they are 186/* Use these for per-cpu local_t variables: on some archs they are
187 * much more efficient than these naive implementations. Note they take 187 * much more efficient than these naive implementations. Note they take
@@ -190,8 +190,8 @@ static __inline__ long local_sub_return(long i, local_t * l)
190 190
191#define __local_inc(l) ((l)->a.counter++) 191#define __local_inc(l) ((l)->a.counter++)
192#define __local_dec(l) ((l)->a.counter++) 192#define __local_dec(l) ((l)->a.counter++)
193#define __local_add(i,l) ((l)->a.counter+=(i)) 193#define __local_add(i, l) ((l)->a.counter+=(i))
194#define __local_sub(i,l) ((l)->a.counter-=(i)) 194#define __local_sub(i, l) ((l)->a.counter-=(i))
195 195
196/* Need to disable preemption for the cpu local counters otherwise we could 196/* Need to disable preemption for the cpu local counters otherwise we could
197 still access a variable of a previous CPU in a non atomic way. */ 197 still access a variable of a previous CPU in a non atomic way. */
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 58fca8a5a9a6..10f613f23c33 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -951,25 +951,25 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
951/* Programmable Counters 0 and 1 */ 951/* Programmable Counters 0 and 1 */
952#define SYS_BASE 0xB1900000 952#define SYS_BASE 0xB1900000
953#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14) 953#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
954 #define SYS_CNTRL_E1S (1<<23) 954# define SYS_CNTRL_E1S (1<<23)
955 #define SYS_CNTRL_T1S (1<<20) 955# define SYS_CNTRL_T1S (1<<20)
956 #define SYS_CNTRL_M21 (1<<19) 956# define SYS_CNTRL_M21 (1<<19)
957 #define SYS_CNTRL_M11 (1<<18) 957# define SYS_CNTRL_M11 (1<<18)
958 #define SYS_CNTRL_M01 (1<<17) 958# define SYS_CNTRL_M01 (1<<17)
959 #define SYS_CNTRL_C1S (1<<16) 959# define SYS_CNTRL_C1S (1<<16)
960 #define SYS_CNTRL_BP (1<<14) 960# define SYS_CNTRL_BP (1<<14)
961 #define SYS_CNTRL_EN1 (1<<13) 961# define SYS_CNTRL_EN1 (1<<13)
962 #define SYS_CNTRL_BT1 (1<<12) 962# define SYS_CNTRL_BT1 (1<<12)
963 #define SYS_CNTRL_EN0 (1<<11) 963# define SYS_CNTRL_EN0 (1<<11)
964 #define SYS_CNTRL_BT0 (1<<10) 964# define SYS_CNTRL_BT0 (1<<10)
965 #define SYS_CNTRL_E0 (1<<8) 965# define SYS_CNTRL_E0 (1<<8)
966 #define SYS_CNTRL_E0S (1<<7) 966# define SYS_CNTRL_E0S (1<<7)
967 #define SYS_CNTRL_32S (1<<5) 967# define SYS_CNTRL_32S (1<<5)
968 #define SYS_CNTRL_T0S (1<<4) 968# define SYS_CNTRL_T0S (1<<4)
969 #define SYS_CNTRL_M20 (1<<3) 969# define SYS_CNTRL_M20 (1<<3)
970 #define SYS_CNTRL_M10 (1<<2) 970# define SYS_CNTRL_M10 (1<<2)
971 #define SYS_CNTRL_M00 (1<<1) 971# define SYS_CNTRL_M00 (1<<1)
972 #define SYS_CNTRL_C0S (1<<0) 972# define SYS_CNTRL_C0S (1<<0)
973 973
974/* Programmable Counter 0 Registers */ 974/* Programmable Counter 0 Registers */
975#define SYS_TOYTRIM (SYS_BASE + 0) 975#define SYS_TOYTRIM (SYS_BASE + 0)
@@ -989,34 +989,34 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
989 989
990/* I2S Controller */ 990/* I2S Controller */
991#define I2S_DATA 0xB1000000 991#define I2S_DATA 0xB1000000
992 #define I2S_DATA_MASK (0xffffff) 992# define I2S_DATA_MASK (0xffffff)
993#define I2S_CONFIG 0xB1000004 993#define I2S_CONFIG 0xB1000004
994 #define I2S_CONFIG_XU (1<<25) 994# define I2S_CONFIG_XU (1<<25)
995 #define I2S_CONFIG_XO (1<<24) 995# define I2S_CONFIG_XO (1<<24)
996 #define I2S_CONFIG_RU (1<<23) 996# define I2S_CONFIG_RU (1<<23)
997 #define I2S_CONFIG_RO (1<<22) 997# define I2S_CONFIG_RO (1<<22)
998 #define I2S_CONFIG_TR (1<<21) 998# define I2S_CONFIG_TR (1<<21)
999 #define I2S_CONFIG_TE (1<<20) 999# define I2S_CONFIG_TE (1<<20)
1000 #define I2S_CONFIG_TF (1<<19) 1000# define I2S_CONFIG_TF (1<<19)
1001 #define I2S_CONFIG_RR (1<<18) 1001# define I2S_CONFIG_RR (1<<18)
1002 #define I2S_CONFIG_RE (1<<17) 1002# define I2S_CONFIG_RE (1<<17)
1003 #define I2S_CONFIG_RF (1<<16) 1003# define I2S_CONFIG_RF (1<<16)
1004 #define I2S_CONFIG_PD (1<<11) 1004# define I2S_CONFIG_PD (1<<11)
1005 #define I2S_CONFIG_LB (1<<10) 1005# define I2S_CONFIG_LB (1<<10)
1006 #define I2S_CONFIG_IC (1<<9) 1006# define I2S_CONFIG_IC (1<<9)
1007 #define I2S_CONFIG_FM_BIT 7 1007# define I2S_CONFIG_FM_BIT 7
1008 #define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT) 1008# define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT)
1009 #define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT) 1009# define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT)
1010 #define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT) 1010# define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT)
1011 #define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT) 1011# define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT)
1012 #define I2S_CONFIG_TN (1<<6) 1012# define I2S_CONFIG_TN (1<<6)
1013 #define I2S_CONFIG_RN (1<<5) 1013# define I2S_CONFIG_RN (1<<5)
1014 #define I2S_CONFIG_SZ_BIT 0 1014# define I2S_CONFIG_SZ_BIT 0
1015 #define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT) 1015# define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT)
1016 1016
1017#define I2S_CONTROL 0xB1000008 1017#define I2S_CONTROL 0xB1000008
1018 #define I2S_CONTROL_D (1<<1) 1018# define I2S_CONTROL_D (1<<1)
1019 #define I2S_CONTROL_CE (1<<0) 1019# define I2S_CONTROL_CE (1<<0)
1020 1020
1021/* USB Host Controller */ 1021/* USB Host Controller */
1022#ifndef USB_OHCI_LEN 1022#ifndef USB_OHCI_LEN
@@ -1034,38 +1034,38 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1034#define USBD_EP5RD 0xB0200014 1034#define USBD_EP5RD 0xB0200014
1035#define USBD_INTEN 0xB0200018 1035#define USBD_INTEN 0xB0200018
1036#define USBD_INTSTAT 0xB020001C 1036#define USBD_INTSTAT 0xB020001C
1037 #define USBDEV_INT_SOF (1<<12) 1037# define USBDEV_INT_SOF (1<<12)
1038 #define USBDEV_INT_HF_BIT 6 1038# define USBDEV_INT_HF_BIT 6
1039 #define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT) 1039# define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT)
1040 #define USBDEV_INT_CMPLT_BIT 0 1040# define USBDEV_INT_CMPLT_BIT 0
1041 #define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT) 1041# define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
1042#define USBD_CONFIG 0xB0200020 1042#define USBD_CONFIG 0xB0200020
1043#define USBD_EP0CS 0xB0200024 1043#define USBD_EP0CS 0xB0200024
1044#define USBD_EP2CS 0xB0200028 1044#define USBD_EP2CS 0xB0200028
1045#define USBD_EP3CS 0xB020002C 1045#define USBD_EP3CS 0xB020002C
1046#define USBD_EP4CS 0xB0200030 1046#define USBD_EP4CS 0xB0200030
1047#define USBD_EP5CS 0xB0200034 1047#define USBD_EP5CS 0xB0200034
1048 #define USBDEV_CS_SU (1<<14) 1048# define USBDEV_CS_SU (1<<14)
1049 #define USBDEV_CS_NAK (1<<13) 1049# define USBDEV_CS_NAK (1<<13)
1050 #define USBDEV_CS_ACK (1<<12) 1050# define USBDEV_CS_ACK (1<<12)
1051 #define USBDEV_CS_BUSY (1<<11) 1051# define USBDEV_CS_BUSY (1<<11)
1052 #define USBDEV_CS_TSIZE_BIT 1 1052# define USBDEV_CS_TSIZE_BIT 1
1053 #define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT) 1053# define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
1054 #define USBDEV_CS_STALL (1<<0) 1054# define USBDEV_CS_STALL (1<<0)
1055#define USBD_EP0RDSTAT 0xB0200040 1055#define USBD_EP0RDSTAT 0xB0200040
1056#define USBD_EP0WRSTAT 0xB0200044 1056#define USBD_EP0WRSTAT 0xB0200044
1057#define USBD_EP2WRSTAT 0xB0200048 1057#define USBD_EP2WRSTAT 0xB0200048
1058#define USBD_EP3WRSTAT 0xB020004C 1058#define USBD_EP3WRSTAT 0xB020004C
1059#define USBD_EP4RDSTAT 0xB0200050 1059#define USBD_EP4RDSTAT 0xB0200050
1060#define USBD_EP5RDSTAT 0xB0200054 1060#define USBD_EP5RDSTAT 0xB0200054
1061 #define USBDEV_FSTAT_FLUSH (1<<6) 1061# define USBDEV_FSTAT_FLUSH (1<<6)
1062 #define USBDEV_FSTAT_UF (1<<5) 1062# define USBDEV_FSTAT_UF (1<<5)
1063 #define USBDEV_FSTAT_OF (1<<4) 1063# define USBDEV_FSTAT_OF (1<<4)
1064 #define USBDEV_FSTAT_FCNT_BIT 0 1064# define USBDEV_FSTAT_FCNT_BIT 0
1065 #define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT) 1065# define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
1066#define USBD_ENABLE 0xB0200058 1066#define USBD_ENABLE 0xB0200058
1067 #define USBDEV_ENABLE (1<<1) 1067# define USBDEV_ENABLE (1<<1)
1068 #define USBDEV_CE (1<<0) 1068# define USBDEV_CE (1<<0)
1069 1069
1070#endif /* !CONFIG_SOC_AU1200 */ 1070#endif /* !CONFIG_SOC_AU1200 */
1071 1071
@@ -1073,55 +1073,55 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1073 1073
1074/* 4 byte offsets from AU1000_ETH_BASE */ 1074/* 4 byte offsets from AU1000_ETH_BASE */
1075#define MAC_CONTROL 0x0 1075#define MAC_CONTROL 0x0
1076 #define MAC_RX_ENABLE (1<<2) 1076# define MAC_RX_ENABLE (1<<2)
1077 #define MAC_TX_ENABLE (1<<3) 1077# define MAC_TX_ENABLE (1<<3)
1078 #define MAC_DEF_CHECK (1<<5) 1078# define MAC_DEF_CHECK (1<<5)
1079 #define MAC_SET_BL(X) (((X)&0x3)<<6) 1079# define MAC_SET_BL(X) (((X)&0x3)<<6)
1080 #define MAC_AUTO_PAD (1<<8) 1080# define MAC_AUTO_PAD (1<<8)
1081 #define MAC_DISABLE_RETRY (1<<10) 1081# define MAC_DISABLE_RETRY (1<<10)
1082 #define MAC_DISABLE_BCAST (1<<11) 1082# define MAC_DISABLE_BCAST (1<<11)
1083 #define MAC_LATE_COL (1<<12) 1083# define MAC_LATE_COL (1<<12)
1084 #define MAC_HASH_MODE (1<<13) 1084# define MAC_HASH_MODE (1<<13)
1085 #define MAC_HASH_ONLY (1<<15) 1085# define MAC_HASH_ONLY (1<<15)
1086 #define MAC_PASS_ALL (1<<16) 1086# define MAC_PASS_ALL (1<<16)
1087 #define MAC_INVERSE_FILTER (1<<17) 1087# define MAC_INVERSE_FILTER (1<<17)
1088 #define MAC_PROMISCUOUS (1<<18) 1088# define MAC_PROMISCUOUS (1<<18)
1089 #define MAC_PASS_ALL_MULTI (1<<19) 1089# define MAC_PASS_ALL_MULTI (1<<19)
1090 #define MAC_FULL_DUPLEX (1<<20) 1090# define MAC_FULL_DUPLEX (1<<20)
1091 #define MAC_NORMAL_MODE 0 1091# define MAC_NORMAL_MODE 0
1092 #define MAC_INT_LOOPBACK (1<<21) 1092# define MAC_INT_LOOPBACK (1<<21)
1093 #define MAC_EXT_LOOPBACK (1<<22) 1093# define MAC_EXT_LOOPBACK (1<<22)
1094 #define MAC_DISABLE_RX_OWN (1<<23) 1094# define MAC_DISABLE_RX_OWN (1<<23)
1095 #define MAC_BIG_ENDIAN (1<<30) 1095# define MAC_BIG_ENDIAN (1<<30)
1096 #define MAC_RX_ALL (1<<31) 1096# define MAC_RX_ALL (1<<31)
1097#define MAC_ADDRESS_HIGH 0x4 1097#define MAC_ADDRESS_HIGH 0x4
1098#define MAC_ADDRESS_LOW 0x8 1098#define MAC_ADDRESS_LOW 0x8
1099#define MAC_MCAST_HIGH 0xC 1099#define MAC_MCAST_HIGH 0xC
1100#define MAC_MCAST_LOW 0x10 1100#define MAC_MCAST_LOW 0x10
1101#define MAC_MII_CNTRL 0x14 1101#define MAC_MII_CNTRL 0x14
1102 #define MAC_MII_BUSY (1<<0) 1102# define MAC_MII_BUSY (1<<0)
1103 #define MAC_MII_READ 0 1103# define MAC_MII_READ 0
1104 #define MAC_MII_WRITE (1<<1) 1104# define MAC_MII_WRITE (1<<1)
1105 #define MAC_SET_MII_SELECT_REG(X) (((X)&0x1f)<<6) 1105# define MAC_SET_MII_SELECT_REG(X) (((X)&0x1f)<<6)
1106 #define MAC_SET_MII_SELECT_PHY(X) (((X)&0x1f)<<11) 1106# define MAC_SET_MII_SELECT_PHY(X) (((X)&0x1f)<<11)
1107#define MAC_MII_DATA 0x18 1107#define MAC_MII_DATA 0x18
1108#define MAC_FLOW_CNTRL 0x1C 1108#define MAC_FLOW_CNTRL 0x1C
1109 #define MAC_FLOW_CNTRL_BUSY (1<<0) 1109# define MAC_FLOW_CNTRL_BUSY (1<<0)
1110 #define MAC_FLOW_CNTRL_ENABLE (1<<1) 1110# define MAC_FLOW_CNTRL_ENABLE (1<<1)
1111 #define MAC_PASS_CONTROL (1<<2) 1111# define MAC_PASS_CONTROL (1<<2)
1112 #define MAC_SET_PAUSE(X) (((X)&0xffff)<<16) 1112# define MAC_SET_PAUSE(X) (((X)&0xffff)<<16)
1113#define MAC_VLAN1_TAG 0x20 1113#define MAC_VLAN1_TAG 0x20
1114#define MAC_VLAN2_TAG 0x24 1114#define MAC_VLAN2_TAG 0x24
1115 1115
1116/* Ethernet Controller Enable */ 1116/* Ethernet Controller Enable */
1117 1117
1118 #define MAC_EN_CLOCK_ENABLE (1<<0) 1118# define MAC_EN_CLOCK_ENABLE (1<<0)
1119 #define MAC_EN_RESET0 (1<<1) 1119# define MAC_EN_RESET0 (1<<1)
1120 #define MAC_EN_TOSS (0<<2) 1120# define MAC_EN_TOSS (0<<2)
1121 #define MAC_EN_CACHEABLE (1<<3) 1121# define MAC_EN_CACHEABLE (1<<3)
1122 #define MAC_EN_RESET1 (1<<4) 1122# define MAC_EN_RESET1 (1<<4)
1123 #define MAC_EN_RESET2 (1<<5) 1123# define MAC_EN_RESET2 (1<<5)
1124 #define MAC_DMA_RESET (1<<6) 1124# define MAC_DMA_RESET (1<<6)
1125 1125
1126/* Ethernet Controller DMA Channels */ 1126/* Ethernet Controller DMA Channels */
1127 1127
@@ -1129,22 +1129,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1129#define MAC1_TX_DMA_ADDR 0xB4004200 1129#define MAC1_TX_DMA_ADDR 0xB4004200
1130/* offsets from MAC_TX_RING_ADDR address */ 1130/* offsets from MAC_TX_RING_ADDR address */
1131#define MAC_TX_BUFF0_STATUS 0x0 1131#define MAC_TX_BUFF0_STATUS 0x0
1132 #define TX_FRAME_ABORTED (1<<0) 1132# define TX_FRAME_ABORTED (1<<0)
1133 #define TX_JAB_TIMEOUT (1<<1) 1133# define TX_JAB_TIMEOUT (1<<1)
1134 #define TX_NO_CARRIER (1<<2) 1134# define TX_NO_CARRIER (1<<2)
1135 #define TX_LOSS_CARRIER (1<<3) 1135# define TX_LOSS_CARRIER (1<<3)
1136 #define TX_EXC_DEF (1<<4) 1136# define TX_EXC_DEF (1<<4)
1137 #define TX_LATE_COLL_ABORT (1<<5) 1137# define TX_LATE_COLL_ABORT (1<<5)
1138 #define TX_EXC_COLL (1<<6) 1138# define TX_EXC_COLL (1<<6)
1139 #define TX_UNDERRUN (1<<7) 1139# define TX_UNDERRUN (1<<7)
1140 #define TX_DEFERRED (1<<8) 1140# define TX_DEFERRED (1<<8)
1141 #define TX_LATE_COLL (1<<9) 1141# define TX_LATE_COLL (1<<9)
1142 #define TX_COLL_CNT_MASK (0xF<<10) 1142# define TX_COLL_CNT_MASK (0xF<<10)
1143 #define TX_PKT_RETRY (1<<31) 1143# define TX_PKT_RETRY (1<<31)
1144#define MAC_TX_BUFF0_ADDR 0x4 1144#define MAC_TX_BUFF0_ADDR 0x4
1145 #define TX_DMA_ENABLE (1<<0) 1145# define TX_DMA_ENABLE (1<<0)
1146 #define TX_T_DONE (1<<1) 1146# define TX_T_DONE (1<<1)
1147 #define TX_GET_DMA_BUFFER(X) (((X)>>2)&0x3) 1147# define TX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
1148#define MAC_TX_BUFF0_LEN 0x8 1148#define MAC_TX_BUFF0_LEN 0x8
1149#define MAC_TX_BUFF1_STATUS 0x10 1149#define MAC_TX_BUFF1_STATUS 0x10
1150#define MAC_TX_BUFF1_ADDR 0x14 1150#define MAC_TX_BUFF1_ADDR 0x14
@@ -1160,34 +1160,34 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1160#define MAC1_RX_DMA_ADDR 0xB4004300 1160#define MAC1_RX_DMA_ADDR 0xB4004300
1161/* offsets from MAC_RX_RING_ADDR */ 1161/* offsets from MAC_RX_RING_ADDR */
1162#define MAC_RX_BUFF0_STATUS 0x0 1162#define MAC_RX_BUFF0_STATUS 0x0
1163 #define RX_FRAME_LEN_MASK 0x3fff 1163# define RX_FRAME_LEN_MASK 0x3fff
1164 #define RX_WDOG_TIMER (1<<14) 1164# define RX_WDOG_TIMER (1<<14)
1165 #define RX_RUNT (1<<15) 1165# define RX_RUNT (1<<15)
1166 #define RX_OVERLEN (1<<16) 1166# define RX_OVERLEN (1<<16)
1167 #define RX_COLL (1<<17) 1167# define RX_COLL (1<<17)
1168 #define RX_ETHER (1<<18) 1168# define RX_ETHER (1<<18)
1169 #define RX_MII_ERROR (1<<19) 1169# define RX_MII_ERROR (1<<19)
1170 #define RX_DRIBBLING (1<<20) 1170# define RX_DRIBBLING (1<<20)
1171 #define RX_CRC_ERROR (1<<21) 1171# define RX_CRC_ERROR (1<<21)
1172 #define RX_VLAN1 (1<<22) 1172# define RX_VLAN1 (1<<22)
1173 #define RX_VLAN2 (1<<23) 1173# define RX_VLAN2 (1<<23)
1174 #define RX_LEN_ERROR (1<<24) 1174# define RX_LEN_ERROR (1<<24)
1175 #define RX_CNTRL_FRAME (1<<25) 1175# define RX_CNTRL_FRAME (1<<25)
1176 #define RX_U_CNTRL_FRAME (1<<26) 1176# define RX_U_CNTRL_FRAME (1<<26)
1177 #define RX_MCAST_FRAME (1<<27) 1177# define RX_MCAST_FRAME (1<<27)
1178 #define RX_BCAST_FRAME (1<<28) 1178# define RX_BCAST_FRAME (1<<28)
1179 #define RX_FILTER_FAIL (1<<29) 1179# define RX_FILTER_FAIL (1<<29)
1180 #define RX_PACKET_FILTER (1<<30) 1180# define RX_PACKET_FILTER (1<<30)
1181 #define RX_MISSED_FRAME (1<<31) 1181# define RX_MISSED_FRAME (1<<31)
1182 1182
1183 #define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \ 1183# define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \
1184 RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \ 1184 RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
1185 RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) 1185 RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
1186#define MAC_RX_BUFF0_ADDR 0x4 1186#define MAC_RX_BUFF0_ADDR 0x4
1187 #define RX_DMA_ENABLE (1<<0) 1187# define RX_DMA_ENABLE (1<<0)
1188 #define RX_T_DONE (1<<1) 1188# define RX_T_DONE (1<<1)
1189 #define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3) 1189# define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
1190 #define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0) 1190# define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0)
1191#define MAC_RX_BUFF1_STATUS 0x10 1191#define MAC_RX_BUFF1_STATUS 0x10
1192#define MAC_RX_BUFF1_ADDR 0x14 1192#define MAC_RX_BUFF1_ADDR 0x14
1193#define MAC_RX_BUFF2_STATUS 0x20 1193#define MAC_RX_BUFF2_STATUS 0x20
@@ -1298,44 +1298,44 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1298 1298
1299/* SSIO */ 1299/* SSIO */
1300#define SSI0_STATUS 0xB1600000 1300#define SSI0_STATUS 0xB1600000
1301 #define SSI_STATUS_BF (1<<4) 1301# define SSI_STATUS_BF (1<<4)
1302 #define SSI_STATUS_OF (1<<3) 1302# define SSI_STATUS_OF (1<<3)
1303 #define SSI_STATUS_UF (1<<2) 1303# define SSI_STATUS_UF (1<<2)
1304 #define SSI_STATUS_D (1<<1) 1304# define SSI_STATUS_D (1<<1)
1305 #define SSI_STATUS_B (1<<0) 1305# define SSI_STATUS_B (1<<0)
1306#define SSI0_INT 0xB1600004 1306#define SSI0_INT 0xB1600004
1307 #define SSI_INT_OI (1<<3) 1307# define SSI_INT_OI (1<<3)
1308 #define SSI_INT_UI (1<<2) 1308# define SSI_INT_UI (1<<2)
1309 #define SSI_INT_DI (1<<1) 1309# define SSI_INT_DI (1<<1)
1310#define SSI0_INT_ENABLE 0xB1600008 1310#define SSI0_INT_ENABLE 0xB1600008
1311 #define SSI_INTE_OIE (1<<3) 1311# define SSI_INTE_OIE (1<<3)
1312 #define SSI_INTE_UIE (1<<2) 1312# define SSI_INTE_UIE (1<<2)
1313 #define SSI_INTE_DIE (1<<1) 1313# define SSI_INTE_DIE (1<<1)
1314#define SSI0_CONFIG 0xB1600020 1314#define SSI0_CONFIG 0xB1600020
1315 #define SSI_CONFIG_AO (1<<24) 1315# define SSI_CONFIG_AO (1<<24)
1316 #define SSI_CONFIG_DO (1<<23) 1316# define SSI_CONFIG_DO (1<<23)
1317 #define SSI_CONFIG_ALEN_BIT 20 1317# define SSI_CONFIG_ALEN_BIT 20
1318 #define SSI_CONFIG_ALEN_MASK (0x7<<20) 1318# define SSI_CONFIG_ALEN_MASK (0x7<<20)
1319 #define SSI_CONFIG_DLEN_BIT 16 1319# define SSI_CONFIG_DLEN_BIT 16
1320 #define SSI_CONFIG_DLEN_MASK (0x7<<16) 1320# define SSI_CONFIG_DLEN_MASK (0x7<<16)
1321 #define SSI_CONFIG_DD (1<<11) 1321# define SSI_CONFIG_DD (1<<11)
1322 #define SSI_CONFIG_AD (1<<10) 1322# define SSI_CONFIG_AD (1<<10)
1323 #define SSI_CONFIG_BM_BIT 8 1323# define SSI_CONFIG_BM_BIT 8
1324 #define SSI_CONFIG_BM_MASK (0x3<<8) 1324# define SSI_CONFIG_BM_MASK (0x3<<8)
1325 #define SSI_CONFIG_CE (1<<7) 1325# define SSI_CONFIG_CE (1<<7)
1326 #define SSI_CONFIG_DP (1<<6) 1326# define SSI_CONFIG_DP (1<<6)
1327 #define SSI_CONFIG_DL (1<<5) 1327# define SSI_CONFIG_DL (1<<5)
1328 #define SSI_CONFIG_EP (1<<4) 1328# define SSI_CONFIG_EP (1<<4)
1329#define SSI0_ADATA 0xB1600024 1329#define SSI0_ADATA 0xB1600024
1330 #define SSI_AD_D (1<<24) 1330# define SSI_AD_D (1<<24)
1331 #define SSI_AD_ADDR_BIT 16 1331# define SSI_AD_ADDR_BIT 16
1332 #define SSI_AD_ADDR_MASK (0xff<<16) 1332# define SSI_AD_ADDR_MASK (0xff<<16)
1333 #define SSI_AD_DATA_BIT 0 1333# define SSI_AD_DATA_BIT 0
1334 #define SSI_AD_DATA_MASK (0xfff<<0) 1334# define SSI_AD_DATA_MASK (0xfff<<0)
1335#define SSI0_CLKDIV 0xB1600028 1335#define SSI0_CLKDIV 0xB1600028
1336#define SSI0_CONTROL 0xB1600100 1336#define SSI0_CONTROL 0xB1600100
1337 #define SSI_CONTROL_CD (1<<1) 1337# define SSI_CONTROL_CD (1<<1)
1338 #define SSI_CONTROL_E (1<<0) 1338# define SSI_CONTROL_E (1<<0)
1339 1339
1340/* SSI1 */ 1340/* SSI1 */
1341#define SSI1_STATUS 0xB1680000 1341#define SSI1_STATUS 0xB1680000
@@ -1401,75 +1401,75 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1401#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14) 1401#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14)
1402#define IR_INT_CLEAR (IRDA_BASE+0x18) 1402#define IR_INT_CLEAR (IRDA_BASE+0x18)
1403#define IR_CONFIG_1 (IRDA_BASE+0x20) 1403#define IR_CONFIG_1 (IRDA_BASE+0x20)
1404 #define IR_RX_INVERT_LED (1<<0) 1404# define IR_RX_INVERT_LED (1<<0)
1405 #define IR_TX_INVERT_LED (1<<1) 1405# define IR_TX_INVERT_LED (1<<1)
1406 #define IR_ST (1<<2) 1406# define IR_ST (1<<2)
1407 #define IR_SF (1<<3) 1407# define IR_SF (1<<3)
1408 #define IR_SIR (1<<4) 1408# define IR_SIR (1<<4)
1409 #define IR_MIR (1<<5) 1409# define IR_MIR (1<<5)
1410 #define IR_FIR (1<<6) 1410# define IR_FIR (1<<6)
1411 #define IR_16CRC (1<<7) 1411# define IR_16CRC (1<<7)
1412 #define IR_TD (1<<8) 1412# define IR_TD (1<<8)
1413 #define IR_RX_ALL (1<<9) 1413# define IR_RX_ALL (1<<9)
1414 #define IR_DMA_ENABLE (1<<10) 1414# define IR_DMA_ENABLE (1<<10)
1415 #define IR_RX_ENABLE (1<<11) 1415# define IR_RX_ENABLE (1<<11)
1416 #define IR_TX_ENABLE (1<<12) 1416# define IR_TX_ENABLE (1<<12)
1417 #define IR_LOOPBACK (1<<14) 1417# define IR_LOOPBACK (1<<14)
1418 #define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \ 1418# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \
1419 IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) 1419 IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
1420#define IR_SIR_FLAGS (IRDA_BASE+0x24) 1420#define IR_SIR_FLAGS (IRDA_BASE+0x24)
1421#define IR_ENABLE (IRDA_BASE+0x28) 1421#define IR_ENABLE (IRDA_BASE+0x28)
1422 #define IR_RX_STATUS (1<<9) 1422# define IR_RX_STATUS (1<<9)
1423 #define IR_TX_STATUS (1<<10) 1423# define IR_TX_STATUS (1<<10)
1424#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C) 1424#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C)
1425#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30) 1425#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30)
1426#define IR_MAX_PKT_LEN (IRDA_BASE+0x34) 1426#define IR_MAX_PKT_LEN (IRDA_BASE+0x34)
1427#define IR_RX_BYTE_CNT (IRDA_BASE+0x38) 1427#define IR_RX_BYTE_CNT (IRDA_BASE+0x38)
1428#define IR_CONFIG_2 (IRDA_BASE+0x3C) 1428#define IR_CONFIG_2 (IRDA_BASE+0x3C)
1429 #define IR_MODE_INV (1<<0) 1429# define IR_MODE_INV (1<<0)
1430 #define IR_ONE_PIN (1<<1) 1430# define IR_ONE_PIN (1<<1)
1431#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40) 1431#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40)
1432 1432
1433/* GPIO */ 1433/* GPIO */
1434#define SYS_PINFUNC 0xB190002C 1434#define SYS_PINFUNC 0xB190002C
1435 #define SYS_PF_USB (1<<15) /* 2nd USB device/host */ 1435# define SYS_PF_USB (1<<15) /* 2nd USB device/host */
1436 #define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */ 1436# define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */
1437 #define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */ 1437# define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */
1438 #define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */ 1438# define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */
1439 #define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */ 1439# define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */
1440 #define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */ 1440# define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */
1441 #define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */ 1441# define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */
1442 #define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */ 1442# define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */
1443 #define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */ 1443# define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */
1444 #define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */ 1444# define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */
1445 #define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */ 1445# define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */
1446 #define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */ 1446# define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */
1447 #define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */ 1447# define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */
1448 #define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */ 1448# define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */
1449 #define SYS_PF_A97 (1<<1) /* AC97/SSL1 */ 1449# define SYS_PF_A97 (1<<1) /* AC97/SSL1 */
1450 #define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */ 1450# define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */
1451 1451
1452/* Au1100 Only */ 1452/* Au1100 Only */
1453 #define SYS_PF_PC (1<<18) /* PCMCIA/GPIO[207:204] */ 1453# define SYS_PF_PC (1<<18) /* PCMCIA/GPIO[207:204] */
1454 #define SYS_PF_LCD (1<<17) /* extern lcd/GPIO[203:200] */ 1454# define SYS_PF_LCD (1<<17) /* extern lcd/GPIO[203:200] */
1455 #define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */ 1455# define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */
1456 #define SYS_PF_EX0 (1<<9) /* gpio2/clock */ 1456# define SYS_PF_EX0 (1<<9) /* gpio2/clock */
1457 1457
1458/* Au1550 Only. Redefines lots of pins */ 1458/* Au1550 Only. Redefines lots of pins */
1459 #define SYS_PF_PSC2_MASK (7 << 17) 1459# define SYS_PF_PSC2_MASK (7 << 17)
1460 #define SYS_PF_PSC2_AC97 (0) 1460# define SYS_PF_PSC2_AC97 (0)
1461 #define SYS_PF_PSC2_SPI (0) 1461# define SYS_PF_PSC2_SPI (0)
1462 #define SYS_PF_PSC2_I2S (1 << 17) 1462# define SYS_PF_PSC2_I2S (1 << 17)
1463 #define SYS_PF_PSC2_SMBUS (3 << 17) 1463# define SYS_PF_PSC2_SMBUS (3 << 17)
1464 #define SYS_PF_PSC2_GPIO (7 << 17) 1464# define SYS_PF_PSC2_GPIO (7 << 17)
1465 #define SYS_PF_PSC3_MASK (7 << 20) 1465# define SYS_PF_PSC3_MASK (7 << 20)
1466 #define SYS_PF_PSC3_AC97 (0) 1466# define SYS_PF_PSC3_AC97 (0)
1467 #define SYS_PF_PSC3_SPI (0) 1467# define SYS_PF_PSC3_SPI (0)
1468 #define SYS_PF_PSC3_I2S (1 << 20) 1468# define SYS_PF_PSC3_I2S (1 << 20)
1469 #define SYS_PF_PSC3_SMBUS (3 << 20) 1469# define SYS_PF_PSC3_SMBUS (3 << 20)
1470 #define SYS_PF_PSC3_GPIO (7 << 20) 1470# define SYS_PF_PSC3_GPIO (7 << 20)
1471 #define SYS_PF_PSC1_S1 (1 << 1) 1471# define SYS_PF_PSC1_S1 (1 << 1)
1472 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) 1472# define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
1473 1473
1474/* Au1200 Only */ 1474/* Au1200 Only */
1475#ifdef CONFIG_SOC_AU1200 1475#ifdef CONFIG_SOC_AU1200
@@ -1530,104 +1530,104 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1530 1530
1531/* Clock Controller */ 1531/* Clock Controller */
1532#define SYS_FREQCTRL0 0xB1900020 1532#define SYS_FREQCTRL0 0xB1900020
1533 #define SYS_FC_FRDIV2_BIT 22 1533# define SYS_FC_FRDIV2_BIT 22
1534 #define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT) 1534# define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT)
1535 #define SYS_FC_FE2 (1<<21) 1535# define SYS_FC_FE2 (1<<21)
1536 #define SYS_FC_FS2 (1<<20) 1536# define SYS_FC_FS2 (1<<20)
1537 #define SYS_FC_FRDIV1_BIT 12 1537# define SYS_FC_FRDIV1_BIT 12
1538 #define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT) 1538# define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT)
1539 #define SYS_FC_FE1 (1<<11) 1539# define SYS_FC_FE1 (1<<11)
1540 #define SYS_FC_FS1 (1<<10) 1540# define SYS_FC_FS1 (1<<10)
1541 #define SYS_FC_FRDIV0_BIT 2 1541# define SYS_FC_FRDIV0_BIT 2
1542 #define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT) 1542# define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT)
1543 #define SYS_FC_FE0 (1<<1) 1543# define SYS_FC_FE0 (1<<1)
1544 #define SYS_FC_FS0 (1<<0) 1544# define SYS_FC_FS0 (1<<0)
1545#define SYS_FREQCTRL1 0xB1900024 1545#define SYS_FREQCTRL1 0xB1900024
1546 #define SYS_FC_FRDIV5_BIT 22 1546# define SYS_FC_FRDIV5_BIT 22
1547 #define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT) 1547# define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT)
1548 #define SYS_FC_FE5 (1<<21) 1548# define SYS_FC_FE5 (1<<21)
1549 #define SYS_FC_FS5 (1<<20) 1549# define SYS_FC_FS5 (1<<20)
1550 #define SYS_FC_FRDIV4_BIT 12 1550# define SYS_FC_FRDIV4_BIT 12
1551 #define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT) 1551# define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT)
1552 #define SYS_FC_FE4 (1<<11) 1552# define SYS_FC_FE4 (1<<11)
1553 #define SYS_FC_FS4 (1<<10) 1553# define SYS_FC_FS4 (1<<10)
1554 #define SYS_FC_FRDIV3_BIT 2 1554# define SYS_FC_FRDIV3_BIT 2
1555 #define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT) 1555# define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT)
1556 #define SYS_FC_FE3 (1<<1) 1556# define SYS_FC_FE3 (1<<1)
1557 #define SYS_FC_FS3 (1<<0) 1557# define SYS_FC_FS3 (1<<0)
1558#define SYS_CLKSRC 0xB1900028 1558#define SYS_CLKSRC 0xB1900028
1559 #define SYS_CS_ME1_BIT 27 1559# define SYS_CS_ME1_BIT 27
1560 #define SYS_CS_ME1_MASK (0x7<<SYS_CS_ME1_BIT) 1560# define SYS_CS_ME1_MASK (0x7<<SYS_CS_ME1_BIT)
1561 #define SYS_CS_DE1 (1<<26) 1561# define SYS_CS_DE1 (1<<26)
1562 #define SYS_CS_CE1 (1<<25) 1562# define SYS_CS_CE1 (1<<25)
1563 #define SYS_CS_ME0_BIT 22 1563# define SYS_CS_ME0_BIT 22
1564 #define SYS_CS_ME0_MASK (0x7<<SYS_CS_ME0_BIT) 1564# define SYS_CS_ME0_MASK (0x7<<SYS_CS_ME0_BIT)
1565 #define SYS_CS_DE0 (1<<21) 1565# define SYS_CS_DE0 (1<<21)
1566 #define SYS_CS_CE0 (1<<20) 1566# define SYS_CS_CE0 (1<<20)
1567 #define SYS_CS_MI2_BIT 17 1567# define SYS_CS_MI2_BIT 17
1568 #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT) 1568# define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT)
1569 #define SYS_CS_DI2 (1<<16) 1569# define SYS_CS_DI2 (1<<16)
1570 #define SYS_CS_CI2 (1<<15) 1570# define SYS_CS_CI2 (1<<15)
1571#ifdef CONFIG_SOC_AU1100 1571#ifdef CONFIG_SOC_AU1100
1572 #define SYS_CS_ML_BIT 7 1572# define SYS_CS_ML_BIT 7
1573 #define SYS_CS_ML_MASK (0x7<<SYS_CS_ML_BIT) 1573# define SYS_CS_ML_MASK (0x7<<SYS_CS_ML_BIT)
1574 #define SYS_CS_DL (1<<6) 1574# define SYS_CS_DL (1<<6)
1575 #define SYS_CS_CL (1<<5) 1575# define SYS_CS_CL (1<<5)
1576#else 1576#else
1577 #define SYS_CS_MUH_BIT 12 1577# define SYS_CS_MUH_BIT 12
1578 #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT) 1578# define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT)
1579 #define SYS_CS_DUH (1<<11) 1579# define SYS_CS_DUH (1<<11)
1580 #define SYS_CS_CUH (1<<10) 1580# define SYS_CS_CUH (1<<10)
1581 #define SYS_CS_MUD_BIT 7 1581# define SYS_CS_MUD_BIT 7
1582 #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT) 1582# define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT)
1583 #define SYS_CS_DUD (1<<6) 1583# define SYS_CS_DUD (1<<6)
1584 #define SYS_CS_CUD (1<<5) 1584# define SYS_CS_CUD (1<<5)
1585#endif 1585#endif
1586 #define SYS_CS_MIR_BIT 2 1586# define SYS_CS_MIR_BIT 2
1587 #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT) 1587# define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT)
1588 #define SYS_CS_DIR (1<<1) 1588# define SYS_CS_DIR (1<<1)
1589 #define SYS_CS_CIR (1<<0) 1589# define SYS_CS_CIR (1<<0)
1590 1590
1591 #define SYS_CS_MUX_AUX 0x1 1591# define SYS_CS_MUX_AUX 0x1
1592 #define SYS_CS_MUX_FQ0 0x2 1592# define SYS_CS_MUX_FQ0 0x2
1593 #define SYS_CS_MUX_FQ1 0x3 1593# define SYS_CS_MUX_FQ1 0x3
1594 #define SYS_CS_MUX_FQ2 0x4 1594# define SYS_CS_MUX_FQ2 0x4
1595 #define SYS_CS_MUX_FQ3 0x5 1595# define SYS_CS_MUX_FQ3 0x5
1596 #define SYS_CS_MUX_FQ4 0x6 1596# define SYS_CS_MUX_FQ4 0x6
1597 #define SYS_CS_MUX_FQ5 0x7 1597# define SYS_CS_MUX_FQ5 0x7
1598#define SYS_CPUPLL 0xB1900060 1598#define SYS_CPUPLL 0xB1900060
1599#define SYS_AUXPLL 0xB1900064 1599#define SYS_AUXPLL 0xB1900064
1600 1600
1601/* AC97 Controller */ 1601/* AC97 Controller */
1602#define AC97C_CONFIG 0xB0000000 1602#define AC97C_CONFIG 0xB0000000
1603 #define AC97C_RECV_SLOTS_BIT 13 1603# define AC97C_RECV_SLOTS_BIT 13
1604 #define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT) 1604# define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
1605 #define AC97C_XMIT_SLOTS_BIT 3 1605# define AC97C_XMIT_SLOTS_BIT 3
1606 #define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT) 1606# define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
1607 #define AC97C_SG (1<<2) 1607# define AC97C_SG (1<<2)
1608 #define AC97C_SYNC (1<<1) 1608# define AC97C_SYNC (1<<1)
1609 #define AC97C_RESET (1<<0) 1609# define AC97C_RESET (1<<0)
1610#define AC97C_STATUS 0xB0000004 1610#define AC97C_STATUS 0xB0000004
1611 #define AC97C_XU (1<<11) 1611# define AC97C_XU (1<<11)
1612 #define AC97C_XO (1<<10) 1612# define AC97C_XO (1<<10)
1613 #define AC97C_RU (1<<9) 1613# define AC97C_RU (1<<9)
1614 #define AC97C_RO (1<<8) 1614# define AC97C_RO (1<<8)
1615 #define AC97C_READY (1<<7) 1615# define AC97C_READY (1<<7)
1616 #define AC97C_CP (1<<6) 1616# define AC97C_CP (1<<6)
1617 #define AC97C_TR (1<<5) 1617# define AC97C_TR (1<<5)
1618 #define AC97C_TE (1<<4) 1618# define AC97C_TE (1<<4)
1619 #define AC97C_TF (1<<3) 1619# define AC97C_TF (1<<3)
1620 #define AC97C_RR (1<<2) 1620# define AC97C_RR (1<<2)
1621 #define AC97C_RE (1<<1) 1621# define AC97C_RE (1<<1)
1622 #define AC97C_RF (1<<0) 1622# define AC97C_RF (1<<0)
1623#define AC97C_DATA 0xB0000008 1623#define AC97C_DATA 0xB0000008
1624#define AC97C_CMD 0xB000000C 1624#define AC97C_CMD 0xB000000C
1625 #define AC97C_WD_BIT 16 1625# define AC97C_WD_BIT 16
1626 #define AC97C_READ (1<<7) 1626# define AC97C_READ (1<<7)
1627 #define AC97C_INDEX_MASK 0x7f 1627# define AC97C_INDEX_MASK 0x7f
1628#define AC97C_CNTRL 0xB0000010 1628#define AC97C_CNTRL 0xB0000010
1629 #define AC97C_RS (1<<1) 1629# define AC97C_RS (1<<1)
1630 #define AC97C_CE (1<<0) 1630# define AC97C_CE (1<<0)
1631 1631
1632 1632
1633/* Secure Digital (SD) Controller */ 1633/* Secure Digital (SD) Controller */
@@ -1636,12 +1636,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1636#define SD1_XMIT_FIFO 0xB0680000 1636#define SD1_XMIT_FIFO 0xB0680000
1637#define SD1_RECV_FIFO 0xB0680004 1637#define SD1_RECV_FIFO 0xB0680004
1638 1638
1639#if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) 1639#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
1640/* Au1500 PCI Controller */ 1640/* Au1500 PCI Controller */
1641#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr 1641#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
1642#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0) 1642#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0)
1643#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4) 1643#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4)
1644 #define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27)) 1644# define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
1645#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8) 1645#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8)
1646#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC) 1646#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC)
1647#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10) 1647#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10)
diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
index eeb0c3115b6a..93d507cea518 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
@@ -199,7 +199,7 @@ typedef volatile struct au1xxx_ddma_desc {
199#define DSCR_CMD0_ALWAYS 31 199#define DSCR_CMD0_ALWAYS 31
200#define DSCR_NDEV_IDS 32 200#define DSCR_NDEV_IDS 32
201/* THis macro is used to find/create custom device types */ 201/* THis macro is used to find/create custom device types */
202#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF)) 202#define DSCR_DEV2CUSTOM_ID(x, d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
203#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF) 203#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
204 204
205 205
@@ -373,14 +373,14 @@ void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
373 Some compatibilty macros -- 373 Some compatibilty macros --
374 Needed to make changes to API without breaking existing drivers 374 Needed to make changes to API without breaking existing drivers
375*/ 375*/
376#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) 376#define au1xxx_dbdma_put_source(chanid, buf, nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
377#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) 377#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
378#define put_source_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) 378#define put_source_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags)
379 379
380 380
381#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) 381#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
382#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) 382#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
383#define put_dest_flags(chanid,buf,nbytes,flags) au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) 383#define put_dest_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags)
384 384
385/* 385/*
386 * Flags for the put_source/put_dest functions. 386 * Flags for the put_source/put_dest functions.
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index 4663e8b415c9..aef0edbfe4c6 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -136,7 +136,7 @@ void auide_outl(u32 addr, unsigned long port);
136void auide_outsw(unsigned long port, void *addr, u32 count); 136void auide_outsw(unsigned long port, void *addr, u32 count);
137void auide_outsl(unsigned long port, void *addr, u32 count); 137void auide_outsl(unsigned long port, void *addr, u32 count);
138static void auide_tune_drive(ide_drive_t *drive, byte pio); 138static void auide_tune_drive(ide_drive_t *drive, byte pio);
139static int auide_tune_chipset (ide_drive_t *drive, u8 speed); 139static int auide_tune_chipset(ide_drive_t *drive, u8 speed);
140static int auide_ddma_init( _auide_hwif *auide ); 140static int auide_ddma_init( _auide_hwif *auide );
141static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif); 141static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif);
142int __init auide_probe(void); 142int __init auide_probe(void);
diff --git a/include/asm-mips/mach-au1x00/war.h b/include/asm-mips/mach-au1x00/war.h
new file mode 100644
index 000000000000..dd57d03d68ba
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_AU1X00_WAR_H
9#define __ASM_MIPS_MACH_AU1X00_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_AU1X00_WAR_H */
diff --git a/include/asm-mips/mach-bcm47xx/bcm47xx.h b/include/asm-mips/mach-bcm47xx/bcm47xx.h
new file mode 100644
index 000000000000..d008f47a28bd
--- /dev/null
+++ b/include/asm-mips/mach-bcm47xx/bcm47xx.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#ifndef __ASM_BCM47XX_H
20#define __ASM_BCM47XX_H
21
22/* SSB bus */
23extern struct ssb_bus ssb_bcm47xx;
24
25#endif /* __ASM_BCM47XX_H */
diff --git a/include/asm-mips/mach-bcm47xx/gpio.h b/include/asm-mips/mach-bcm47xx/gpio.h
new file mode 100644
index 000000000000..cfc8f4d618ce
--- /dev/null
+++ b/include/asm-mips/mach-bcm47xx/gpio.h
@@ -0,0 +1,59 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
7 */
8
9#ifndef __BCM47XX_GPIO_H
10#define __BCM47XX_GPIO_H
11
12#define BCM47XX_EXTIF_GPIO_LINES 5
13#define BCM47XX_CHIPCO_GPIO_LINES 16
14
15extern int bcm47xx_gpio_to_irq(unsigned gpio);
16extern int bcm47xx_gpio_get_value(unsigned gpio);
17extern void bcm47xx_gpio_set_value(unsigned gpio, int value);
18extern int bcm47xx_gpio_direction_input(unsigned gpio);
19extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
20
21static inline int gpio_request(unsigned gpio, const char *label)
22{
23 return 0;
24}
25
26static inline void gpio_free(unsigned gpio)
27{
28}
29
30static inline int gpio_to_irq(unsigned gpio)
31{
32 return bcm47xx_gpio_to_irq(gpio);
33}
34
35static inline int gpio_get_value(unsigned gpio)
36{
37 return bcm47xx_gpio_get_value(gpio);
38}
39
40static inline void gpio_set_value(unsigned gpio, int value)
41{
42 bcm47xx_gpio_set_value(gpio, value);
43}
44
45static inline int gpio_direction_input(unsigned gpio)
46{
47 return bcm47xx_gpio_direction_input(gpio);
48}
49
50static inline int gpio_direction_output(unsigned gpio, int value)
51{
52 return bcm47xx_gpio_direction_output(gpio, value);
53}
54
55
56/* cansleep wrappers */
57#include <asm-generic/gpio.h>
58
59#endif /* __BCM47XX_GPIO_H */
diff --git a/include/asm-mips/mach-bcm47xx/war.h b/include/asm-mips/mach-bcm47xx/war.h
new file mode 100644
index 000000000000..4a2b7986b582
--- /dev/null
+++ b/include/asm-mips/mach-bcm47xx/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
9#define __ASM_MIPS_MACH_BCM947XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h
index 9c9d2b998ca4..a79e7caf3a86 100644
--- a/include/asm-mips/mach-cobalt/cobalt.h
+++ b/include/asm-mips/mach-cobalt/cobalt.h
@@ -12,71 +12,16 @@
12#ifndef __ASM_COBALT_H 12#ifndef __ASM_COBALT_H
13#define __ASM_COBALT_H 13#define __ASM_COBALT_H
14 14
15#include <irq.h>
16
17/*
18 * i8259 legacy interrupts used on Cobalt:
19 *
20 * 8 - RTC
21 * 9 - PCI
22 * 14 - IDE0
23 * 15 - IDE1
24 */
25#define COBALT_QUBE_SLOT_IRQ 9
26
27/*
28 * CPU IRQs are 16 ... 23
29 */
30#define COBALT_CPU_IRQ MIPS_CPU_IRQ_BASE
31
32#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2)
33#define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3)
34#define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3)
35#define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4)
36#define COBALT_ETH1_IRQ (COBALT_CPU_IRQ + 4)
37#define COBALT_SERIAL_IRQ (COBALT_CPU_IRQ + 5)
38#define COBALT_SCSI_IRQ (COBALT_CPU_IRQ + 5)
39#define COBALT_VIA_IRQ (COBALT_CPU_IRQ + 6) /* Chained to VIA ISA bridge */
40
41/* 15/*
42 * PCI configuration space manifest constants. These are wired into 16 * The Cobalt board ID information.
43 * the board layout according to the PCI spec to enable the software
44 * to probe the hardware configuration space in a well defined manner.
45 *
46 * The PCI_DEVSHFT() macro transforms these values into numbers
47 * suitable for passing as the dev parameter to the various
48 * pcibios_read/write_config routines.
49 */ 17 */
50#define COBALT_PCICONF_CPU 0x06 18extern int cobalt_board_id;
51#define COBALT_PCICONF_ETH0 0x07
52#define COBALT_PCICONF_RAQSCSI 0x08
53#define COBALT_PCICONF_VIA 0x09
54#define COBALT_PCICONF_PCISLOT 0x0A
55#define COBALT_PCICONF_ETH1 0x0C
56
57 19
58/*
59 * The Cobalt board id information. The boards have an ID number wired
60 * into the VIA that is available in the high nibble of register 94.
61 * This register is available in the VIA configuration space through the
62 * interface routines qube_pcibios_read/write_config. See cobalt/pci.c
63 */
64#define VIA_COBALT_BRD_ID_REG 0x94
65#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char) (reg) >> 4)
66#define COBALT_BRD_ID_QUBE1 0x3 20#define COBALT_BRD_ID_QUBE1 0x3
67#define COBALT_BRD_ID_RAQ1 0x4 21#define COBALT_BRD_ID_RAQ1 0x4
68#define COBALT_BRD_ID_QUBE2 0x5 22#define COBALT_BRD_ID_QUBE2 0x5
69#define COBALT_BRD_ID_RAQ2 0x6 23#define COBALT_BRD_ID_RAQ2 0x6
70 24
71extern int cobalt_board_id;
72
73#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
74# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
75# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */
76# define COBALT_LED_WEB (1 << 2) /* RaQ */
77# define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */
78# define COBALT_LED_RESET 0x0f
79
80#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK) 25#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
81# define COBALT_KEY_CLEAR (1 << 1) 26# define COBALT_KEY_CLEAR (1 << 1)
82# define COBALT_KEY_LEFT (1 << 2) 27# define COBALT_KEY_LEFT (1 << 2)
@@ -87,6 +32,4 @@ extern int cobalt_board_id;
87# define COBALT_KEY_SELECT (1 << 7) 32# define COBALT_KEY_SELECT (1 << 7)
88# define COBALT_KEY_MASK 0xfe 33# define COBALT_KEY_MASK 0xfe
89 34
90#define COBALT_UART ((volatile unsigned char *) CKSEG1ADDR(0x1c800000))
91
92#endif /* __ASM_COBALT_H */ 35#endif /* __ASM_COBALT_H */
diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
index d38f069d9e95..b3314cf53194 100644
--- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
@@ -14,7 +14,6 @@
14#define cpu_has_3k_cache 0 14#define cpu_has_3k_cache 0
15#define cpu_has_4k_cache 1 15#define cpu_has_4k_cache 1
16#define cpu_has_tx39_cache 0 16#define cpu_has_tx39_cache 0
17#define cpu_has_sb1_cache 0
18#define cpu_has_fpu 1 17#define cpu_has_fpu 1
19#define cpu_has_32fpr 1 18#define cpu_has_32fpr 1
20#define cpu_has_counter 1 19#define cpu_has_counter 1
diff --git a/include/asm-mips/mach-cobalt/irq.h b/include/asm-mips/mach-cobalt/irq.h
new file mode 100644
index 000000000000..179d0e850b59
--- /dev/null
+++ b/include/asm-mips/mach-cobalt/irq.h
@@ -0,0 +1,58 @@
1/*
2 * Cobalt IRQ definitions.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1997 Cobalt Microserver
9 * Copyright (C) 1997, 2003 Ralf Baechle
10 * Copyright (C) 2001-2003 Liam Davies (ldavies@agile.tv)
11 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
12 */
13#ifndef _ASM_COBALT_IRQ_H
14#define _ASM_COBALT_IRQ_H
15
16/*
17 * i8259 interrupts used on Cobalt:
18 *
19 * 8 - RTC
20 * 9 - PCI slot
21 * 14 - IDE0
22 * 15 - IDE1(no connector on board)
23 */
24#define I8259A_IRQ_BASE 0
25
26#define PCISLOT_IRQ (I8259A_IRQ_BASE + 9)
27
28/*
29 * CPU interrupts used on Cobalt:
30 *
31 * 0 - Software interrupt 0 (unused)
32 * 1 - Software interrupt 0 (unused)
33 * 2 - cascade GT64111
34 * 3 - ethernet or SCSI host controller
35 * 4 - ethernet
36 * 5 - 16550 UART
37 * 6 - cascade i8259
38 * 7 - CP0 counter (unused)
39 */
40#define MIPS_CPU_IRQ_BASE 16
41
42#define GT641XX_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2)
43#define RAQ2_SCSI_IRQ (MIPS_CPU_IRQ_BASE + 3)
44#define ETH0_IRQ (MIPS_CPU_IRQ_BASE + 3)
45#define QUBE1_ETH0_IRQ (MIPS_CPU_IRQ_BASE + 4)
46#define ETH1_IRQ (MIPS_CPU_IRQ_BASE + 4)
47#define SERIAL_IRQ (MIPS_CPU_IRQ_BASE + 5)
48#define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5)
49#define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6)
50
51
52#define GT641XX_IRQ_BASE 24
53
54#include <asm/irq_gt641xx.h>
55
56#define NR_IRQS (GT641XX_PCI_INT3_IRQ + 1)
57
58#endif /* _ASM_COBALT_IRQ_H */
diff --git a/include/asm-mips/mach-cobalt/war.h b/include/asm-mips/mach-cobalt/war.h
new file mode 100644
index 000000000000..97884fd18ac0
--- /dev/null
+++ b/include/asm-mips/mach-cobalt/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_COBALT_WAR_H
9#define __ASM_MIPS_MACH_COBALT_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_COBALT_WAR_H */
diff --git a/include/asm-mips/mach-dec/war.h b/include/asm-mips/mach-dec/war.h
new file mode 100644
index 000000000000..ca5e2ef909ad
--- /dev/null
+++ b/include/asm-mips/mach-dec/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_DEC_WAR_H
9#define __ASM_MIPS_MACH_DEC_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_DEC_WAR_H */
diff --git a/include/asm-mips/mach-emma2rh/war.h b/include/asm-mips/mach-emma2rh/war.h
new file mode 100644
index 000000000000..b660a4c30e6a
--- /dev/null
+++ b/include/asm-mips/mach-emma2rh/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_EMMA2RH_WAR_H
9#define __ASM_MIPS_MACH_EMMA2RH_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_EMMA2RH_WAR_H */
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h
index 07f4322c235d..107104c3cd12 100644
--- a/include/asm-mips/mach-excite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h
@@ -34,6 +34,11 @@
34#define cpu_has_nofpuex 0 34#define cpu_has_nofpuex 0
35#define cpu_has_64bits 1 35#define cpu_has_64bits 1
36 36
37#define cpu_has_mips32r1 0
38#define cpu_has_mips32r2 0
39#define cpu_has_mips64r1 0
40#define cpu_has_mips64r2 0
41
37#define cpu_has_inclusive_pcaches 0 42#define cpu_has_inclusive_pcaches 0
38 43
39#define cpu_dcache_line_size() 32 44#define cpu_dcache_line_size() 32
diff --git a/include/asm-mips/mach-excite/war.h b/include/asm-mips/mach-excite/war.h
new file mode 100644
index 000000000000..1f82180c1598
--- /dev/null
+++ b/include/asm-mips/mach-excite/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_EXCITE_WAR_H
9#define __ASM_MIPS_MACH_EXCITE_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 1
21#define ICACHE_REFILLS_WORKAROUND_WAR 1
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_EXCITE_WAR_H */
diff --git a/include/asm-mips/mach-generic/mangle-port.h b/include/asm-mips/mach-generic/mangle-port.h
index 6e1b0c075de7..f49dc990214b 100644
--- a/include/asm-mips/mach-generic/mangle-port.h
+++ b/include/asm-mips/mach-generic/mangle-port.h
@@ -27,25 +27,25 @@
27 */ 27 */
28#if defined(CONFIG_SWAP_IO_SPACE) 28#if defined(CONFIG_SWAP_IO_SPACE)
29 29
30# define ioswabb(a,x) (x) 30# define ioswabb(a, x) (x)
31# define __mem_ioswabb(a,x) (x) 31# define __mem_ioswabb(a, x) (x)
32# define ioswabw(a,x) le16_to_cpu(x) 32# define ioswabw(a, x) le16_to_cpu(x)
33# define __mem_ioswabw(a,x) (x) 33# define __mem_ioswabw(a, x) (x)
34# define ioswabl(a,x) le32_to_cpu(x) 34# define ioswabl(a, x) le32_to_cpu(x)
35# define __mem_ioswabl(a,x) (x) 35# define __mem_ioswabl(a, x) (x)
36# define ioswabq(a,x) le64_to_cpu(x) 36# define ioswabq(a, x) le64_to_cpu(x)
37# define __mem_ioswabq(a,x) (x) 37# define __mem_ioswabq(a, x) (x)
38 38
39#else 39#else
40 40
41# define ioswabb(a,x) (x) 41# define ioswabb(a, x) (x)
42# define __mem_ioswabb(a,x) (x) 42# define __mem_ioswabb(a, x) (x)
43# define ioswabw(a,x) (x) 43# define ioswabw(a, x) (x)
44# define __mem_ioswabw(a,x) cpu_to_le16(x) 44# define __mem_ioswabw(a, x) cpu_to_le16(x)
45# define ioswabl(a,x) (x) 45# define ioswabl(a, x) (x)
46# define __mem_ioswabl(a,x) cpu_to_le32(x) 46# define __mem_ioswabl(a, x) cpu_to_le32(x)
47# define ioswabq(a,x) (x) 47# define ioswabq(a, x) (x)
48# define __mem_ioswabq(a,x) cpu_to_le32(x) 48# define __mem_ioswabq(a, x) cpu_to_le32(x)
49 49
50#endif 50#endif
51 51
diff --git a/include/asm-mips/mach-ip22/war.h b/include/asm-mips/mach-ip22/war.h
new file mode 100644
index 000000000000..a44fa9656a82
--- /dev/null
+++ b/include/asm-mips/mach-ip22/war.h
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_IP22_WAR_H
9#define __ASM_MIPS_MACH_IP22_WAR_H
10
11/*
12 * R4600 CPU modules for the Indy come with both V1.7 and V2.0 processors.
13 */
14
15#define R4600_V1_INDEX_ICACHEOP_WAR 1
16#define R4600_V1_HIT_CACHEOP_WAR 1
17#define R4600_V2_HIT_CACHEOP_WAR 1
18#define R5432_CP0_INTERRUPT_WAR 0
19#define BCM1250_M3_WAR 0
20#define SIBYTE_1956_WAR 0
21#define MIPS4K_ICACHE_REFILL_WAR 0
22#define MIPS_CACHE_SYNC_WAR 0
23#define TX49XX_ICACHE_INDEX_INV_WAR 0
24#define RM9000_CDEX_SMP_WAR 0
25#define ICACHE_REFILLS_WORKAROUND_WAR 0
26#define R10000_LLSC_WAR 0
27#define MIPS34K_MISSED_ITLB_WAR 0
28
29#endif /* __ASM_MIPS_MACH_IP22_WAR_H */
diff --git a/include/asm-mips/mach-ip27/irq.h b/include/asm-mips/mach-ip27/irq.h
index 25f0c3f39adf..cf4384bfa846 100644
--- a/include/asm-mips/mach-ip27/irq.h
+++ b/include/asm-mips/mach-ip27/irq.h
@@ -17,4 +17,6 @@
17 */ 17 */
18#define NR_IRQS 256 18#define NR_IRQS 256
19 19
20#include_next <irq.h>
21
20#endif /* __ASM_MACH_IP27_IRQ_H */ 22#endif /* __ASM_MACH_IP27_IRQ_H */
diff --git a/include/asm-mips/mach-ip27/mangle-port.h b/include/asm-mips/mach-ip27/mangle-port.h
index d615312a451a..f6e4912ea062 100644
--- a/include/asm-mips/mach-ip27/mangle-port.h
+++ b/include/asm-mips/mach-ip27/mangle-port.h
@@ -13,13 +13,13 @@
13#define __swizzle_addr_l(port) (port) 13#define __swizzle_addr_l(port) (port)
14#define __swizzle_addr_q(port) (port) 14#define __swizzle_addr_q(port) (port)
15 15
16# define ioswabb(a,x) (x) 16# define ioswabb(a, x) (x)
17# define __mem_ioswabb(a,x) (x) 17# define __mem_ioswabb(a, x) (x)
18# define ioswabw(a,x) (x) 18# define ioswabw(a, x) (x)
19# define __mem_ioswabw(a,x) cpu_to_le16(x) 19# define __mem_ioswabw(a, x) cpu_to_le16(x)
20# define ioswabl(a,x) (x) 20# define ioswabl(a, x) (x)
21# define __mem_ioswabl(a,x) cpu_to_le32(x) 21# define __mem_ioswabl(a, x) cpu_to_le32(x)
22# define ioswabq(a,x) (x) 22# define ioswabq(a, x) (x)
23# define __mem_ioswabq(a,x) cpu_to_le32(x) 23# define __mem_ioswabq(a, x) cpu_to_le32(x)
24 24
25#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */ 25#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip27/topology.h b/include/asm-mips/mach-ip27/topology.h
index 61d9be3f3175..372291f53fb9 100644
--- a/include/asm-mips/mach-ip27/topology.h
+++ b/include/asm-mips/mach-ip27/topology.h
@@ -2,9 +2,27 @@
2#define _ASM_MACH_TOPOLOGY_H 1 2#define _ASM_MACH_TOPOLOGY_H 1
3 3
4#include <asm/sn/hub.h> 4#include <asm/sn/hub.h>
5#include <asm/sn/types.h>
5#include <asm/mmzone.h> 6#include <asm/mmzone.h>
6 7
7#define cpu_to_node(cpu) (cpu_data[(cpu)].p_nodeid) 8struct cpuinfo_ip27 {
9// cpuid_t p_cpuid; /* PROM assigned cpuid */
10 cnodeid_t p_nodeid; /* my node ID in compact-id-space */
11 nasid_t p_nasid; /* my node ID in numa-as-id-space */
12 unsigned char p_slice; /* Physical position on node board */
13#if 0
14 unsigned long loops_per_sec;
15 unsigned long ipi_count;
16 unsigned long irq_attempt[NR_IRQS];
17 unsigned long smp_local_irq_count;
18 unsigned long prof_multiplier;
19 unsigned long prof_counter;
20#endif
21};
22
23extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
24
25#define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid)
8#define parent_node(node) (node) 26#define parent_node(node) (node)
9#define node_to_cpumask(node) (hub_data(node)->h_cpus) 27#define node_to_cpumask(node) (hub_data(node)->h_cpus)
10#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node))) 28#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
diff --git a/include/asm-mips/mach-ip27/war.h b/include/asm-mips/mach-ip27/war.h
new file mode 100644
index 000000000000..e2ddcc9b1fff
--- /dev/null
+++ b/include/asm-mips/mach-ip27/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_IP27_WAR_H
9#define __ASM_MIPS_MACH_IP27_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 1
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_IP27_WAR_H */
diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/include/asm-mips/mach-ip32/kmalloc.h
index f6198a21fba1..b1e0be60f720 100644
--- a/include/asm-mips/mach-ip32/kmalloc.h
+++ b/include/asm-mips/mach-ip32/kmalloc.h
@@ -2,7 +2,7 @@
2#define __ASM_MACH_IP32_KMALLOC_H 2#define __ASM_MACH_IP32_KMALLOC_H
3 3
4 4
5#if defined(CONFIG_CPU_R5000) || defined (CONFIG_CPU_RM7000) 5#if defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_RM7000)
6#define ARCH_KMALLOC_MINALIGN 32 6#define ARCH_KMALLOC_MINALIGN 32
7#else 7#else
8#define ARCH_KMALLOC_MINALIGN 128 8#define ARCH_KMALLOC_MINALIGN 128
diff --git a/include/asm-mips/mach-ip32/mangle-port.h b/include/asm-mips/mach-ip32/mangle-port.h
index 81320eb55324..f1d0f1756a9f 100644
--- a/include/asm-mips/mach-ip32/mangle-port.h
+++ b/include/asm-mips/mach-ip32/mangle-port.h
@@ -14,13 +14,13 @@
14#define __swizzle_addr_l(port) (port) 14#define __swizzle_addr_l(port) (port)
15#define __swizzle_addr_q(port) (port) 15#define __swizzle_addr_q(port) (port)
16 16
17# define ioswabb(a,x) (x) 17# define ioswabb(a, x) (x)
18# define __mem_ioswabb(a,x) (x) 18# define __mem_ioswabb(a, x) (x)
19# define ioswabw(a,x) (x) 19# define ioswabw(a, x) (x)
20# define __mem_ioswabw(a,x) cpu_to_le16(x) 20# define __mem_ioswabw(a, x) cpu_to_le16(x)
21# define ioswabl(a,x) (x) 21# define ioswabl(a, x) (x)
22# define __mem_ioswabl(a,x) cpu_to_le32(x) 22# define __mem_ioswabl(a, x) cpu_to_le32(x)
23# define ioswabq(a,x) (x) 23# define ioswabq(a, x) (x)
24# define __mem_ioswabq(a,x) cpu_to_le32(x) 24# define __mem_ioswabq(a, x) cpu_to_le32(x)
25 25
26#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ 26#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-ip32/war.h b/include/asm-mips/mach-ip32/war.h
new file mode 100644
index 000000000000..d194056dcd7a
--- /dev/null
+++ b/include/asm-mips/mach-ip32/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_IP32_WAR_H
9#define __ASM_MIPS_MACH_IP32_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 1
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_IP32_WAR_H */
diff --git a/include/asm-mips/mach-jazz/mc146818rtc.h b/include/asm-mips/mach-jazz/mc146818rtc.h
index f44fdba1998b..987f727afe25 100644
--- a/include/asm-mips/mach-jazz/mc146818rtc.h
+++ b/include/asm-mips/mach-jazz/mc146818rtc.h
@@ -4,12 +4,15 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1998, 2001, 03 by Ralf Baechle 6 * Copyright (C) 1998, 2001, 03 by Ralf Baechle
7 * Copyright (C) 2007 Thomas Bogendoerfer
7 * 8 *
8 * RTC routines for Jazz style attached Dallas chip. 9 * RTC routines for Jazz style attached Dallas chip.
9 */ 10 */
10#ifndef __ASM_MACH_JAZZ_MC146818RTC_H 11#ifndef __ASM_MACH_JAZZ_MC146818RTC_H
11#define __ASM_MACH_JAZZ_MC146818RTC_H 12#define __ASM_MACH_JAZZ_MC146818RTC_H
12 13
14#include <linux/delay.h>
15
13#include <asm/io.h> 16#include <asm/io.h>
14#include <asm/jazz.h> 17#include <asm/jazz.h>
15 18
@@ -19,16 +22,17 @@
19static inline unsigned char CMOS_READ(unsigned long addr) 22static inline unsigned char CMOS_READ(unsigned long addr)
20{ 23{
21 outb_p(addr, RTC_PORT(0)); 24 outb_p(addr, RTC_PORT(0));
22 25 return *(volatile char *)JAZZ_RTC_BASE;
23 return *(char *)JAZZ_RTC_BASE;
24} 26}
25 27
26static inline void CMOS_WRITE(unsigned char data, unsigned long addr) 28static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
27{ 29{
28 outb_p(addr, RTC_PORT(0)); 30 outb_p(addr, RTC_PORT(0));
29 *(char *)JAZZ_RTC_BASE = data; 31 *(volatile char *)JAZZ_RTC_BASE = data;
30} 32}
31 33
32#define RTC_ALWAYS_BCD 0 34#define RTC_ALWAYS_BCD 0
33 35
36#define mc146818_decode_year(year) ((year) + 1980)
37
34#endif /* __ASM_MACH_JAZZ_MC146818RTC_H */ 38#endif /* __ASM_MACH_JAZZ_MC146818RTC_H */
diff --git a/include/asm-mips/mach-jazz/war.h b/include/asm-mips/mach-jazz/war.h
new file mode 100644
index 000000000000..6158ee861bfd
--- /dev/null
+++ b/include/asm-mips/mach-jazz/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_JAZZ_WAR_H
9#define __ASM_MIPS_MACH_JAZZ_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_JAZZ_WAR_H */
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-jmr3927/mangle-port.h
index 501a202631b5..11bffcd1043b 100644
--- a/include/asm-mips/mach-jmr3927/mangle-port.h
+++ b/include/asm-mips/mach-jmr3927/mangle-port.h
@@ -6,13 +6,13 @@ extern unsigned long __swizzle_addr_b(unsigned long port);
6#define __swizzle_addr_l(port) (port) 6#define __swizzle_addr_l(port) (port)
7#define __swizzle_addr_q(port) (port) 7#define __swizzle_addr_q(port) (port)
8 8
9#define ioswabb(a,x) (x) 9#define ioswabb(a, x) (x)
10#define __mem_ioswabb(a,x) (x) 10#define __mem_ioswabb(a, x) (x)
11#define ioswabw(a,x) le16_to_cpu(x) 11#define ioswabw(a, x) le16_to_cpu(x)
12#define __mem_ioswabw(a,x) (x) 12#define __mem_ioswabw(a, x) (x)
13#define ioswabl(a,x) le32_to_cpu(x) 13#define ioswabl(a, x) le32_to_cpu(x)
14#define __mem_ioswabl(a,x) (x) 14#define __mem_ioswabl(a, x) (x)
15#define ioswabq(a,x) le64_to_cpu(x) 15#define ioswabq(a, x) le64_to_cpu(x)
16#define __mem_ioswabq(a,x) (x) 16#define __mem_ioswabq(a, x) (x)
17 17
18#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */ 18#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-jmr3927/war.h b/include/asm-mips/mach-jmr3927/war.h
new file mode 100644
index 000000000000..1ff55fb3fbcb
--- /dev/null
+++ b/include/asm-mips/mach-jmr3927/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H
9#define __ASM_MIPS_MACH_JMR3927_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */
diff --git a/include/asm-mips/mach-lasat/mach-gt64120.h b/include/asm-mips/mach-lasat/mach-gt64120.h
new file mode 100644
index 000000000000..1a9ad45cc135
--- /dev/null
+++ b/include/asm-mips/mach-lasat/mach-gt64120.h
@@ -0,0 +1,27 @@
1/*
2 * This is a direct copy of the ev96100.h file, with a global
3 * search and replace. The numbers are the same.
4 *
5 * The reason I'm duplicating this is so that the 64120/96100
6 * defines won't be confusing in the source code.
7 */
8#ifndef _ASM_GT64120_LASAT_GT64120_DEP_H
9#define _ASM_GT64120_LASAT_GT64120_DEP_H
10
11/*
12 * GT64120 config space base address on Lasat 100
13 */
14#define GT64120_BASE (KSEG1ADDR(0x14000000))
15
16/*
17 * PCI Bus allocation
18 *
19 * (Guessing ...)
20 */
21#define GT_PCI_MEM_BASE 0x12000000UL
22#define GT_PCI_MEM_SIZE 0x02000000UL
23#define GT_PCI_IO_BASE 0x10000000UL
24#define GT_PCI_IO_SIZE 0x02000000UL
25#define GT_ISA_IO_BASE PCI_IO_BASE
26
27#endif /* _ASM_GT64120_LASAT_GT64120_DEP_H */
diff --git a/include/asm-mips/mach-lasat/war.h b/include/asm-mips/mach-lasat/war.h
new file mode 100644
index 000000000000..bb1e0325c9be
--- /dev/null
+++ b/include/asm-mips/mach-lasat/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_LASAT_WAR_H
9#define __ASM_MIPS_MACH_LASAT_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_LASAT_WAR_H */
diff --git a/include/asm-mips/mach-lemote/war.h b/include/asm-mips/mach-lemote/war.h
new file mode 100644
index 000000000000..05f89e0f2a11
--- /dev/null
+++ b/include/asm-mips/mach-lemote/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_LEMOTE_WAR_H
9#define __ASM_MIPS_MACH_LEMOTE_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_LEMOTE_WAR_H */
diff --git a/include/asm-mips/mach-mips/mach-gt64120.h b/include/asm-mips/mach-mips/mach-gt64120.h
index 511f7cf3a6be..0f863148f3b6 100644
--- a/include/asm-mips/mach-mips/mach-gt64120.h
+++ b/include/asm-mips/mach-mips/mach-gt64120.h
@@ -16,13 +16,4 @@ extern unsigned long _pcictrl_gt64120;
16 */ 16 */
17#define GT64120_BASE _pcictrl_gt64120 17#define GT64120_BASE _pcictrl_gt64120
18 18
19/*
20 * PCI Bus allocation
21 */
22#define GT_PCI_MEM_BASE 0x12000000UL
23#define GT_PCI_MEM_SIZE 0x02000000UL
24#define GT_PCI_IO_BASE 0x10000000UL
25#define GT_PCI_IO_SIZE 0x02000000UL
26#define GT_ISA_IO_BASE PCI_IO_BASE
27
28#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */ 19#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */
diff --git a/include/asm-mips/mach-mips/war.h b/include/asm-mips/mach-mips/war.h
new file mode 100644
index 000000000000..7c6931d5f45f
--- /dev/null
+++ b/include/asm-mips/mach-mips/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_MIPS_WAR_H
9#define __ASM_MIPS_MACH_MIPS_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 1
18#define MIPS_CACHE_SYNC_WAR 1
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 1
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */
diff --git a/include/asm-mips/mach-mipssim/war.h b/include/asm-mips/mach-mipssim/war.h
new file mode 100644
index 000000000000..c8a74a3515e0
--- /dev/null
+++ b/include/asm-mips/mach-mipssim/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_MIPSSIM_WAR_H
9#define __ASM_MIPS_MACH_MIPSSIM_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_MIPSSIM_WAR_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/include/asm-mips/mach-pb1x00/pb1000.h
index 50c1e413a688..b52e0e7ee3fb 100644
--- a/include/asm-mips/mach-pb1x00/pb1000.h
+++ b/include/asm-mips/mach-pb1x00/pb1000.h
@@ -32,38 +32,38 @@
32#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) 32#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
33 33
34#define PB1000_PCR 0xBE000000 34#define PB1000_PCR 0xBE000000
35 #define PCR_SLOT_0_VPP0 (1<<0) 35# define PCR_SLOT_0_VPP0 (1<<0)
36 #define PCR_SLOT_0_VPP1 (1<<1) 36# define PCR_SLOT_0_VPP1 (1<<1)
37 #define PCR_SLOT_0_VCC0 (1<<2) 37# define PCR_SLOT_0_VCC0 (1<<2)
38 #define PCR_SLOT_0_VCC1 (1<<3) 38# define PCR_SLOT_0_VCC1 (1<<3)
39 #define PCR_SLOT_0_RST (1<<4) 39# define PCR_SLOT_0_RST (1<<4)
40 40
41 #define PCR_SLOT_1_VPP0 (1<<8) 41# define PCR_SLOT_1_VPP0 (1<<8)
42 #define PCR_SLOT_1_VPP1 (1<<9) 42# define PCR_SLOT_1_VPP1 (1<<9)
43 #define PCR_SLOT_1_VCC0 (1<<10) 43# define PCR_SLOT_1_VCC0 (1<<10)
44 #define PCR_SLOT_1_VCC1 (1<<11) 44# define PCR_SLOT_1_VCC1 (1<<11)
45 #define PCR_SLOT_1_RST (1<<12) 45# define PCR_SLOT_1_RST (1<<12)
46 46
47#define PB1000_MDR 0xBE000004 47#define PB1000_MDR 0xBE000004
48 #define MDR_PI (1<<5) /* pcmcia int latch */ 48# define MDR_PI (1<<5) /* pcmcia int latch */
49 #define MDR_EPI (1<<14) /* enable pcmcia int */ 49# define MDR_EPI (1<<14) /* enable pcmcia int */
50 #define MDR_CPI (1<<15) /* clear pcmcia int */ 50# define MDR_CPI (1<<15) /* clear pcmcia int */
51 51
52#define PB1000_ACR1 0xBE000008 52#define PB1000_ACR1 0xBE000008
53 #define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ 53# define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */
54 #define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ 54# define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */
55 #define ACR1_SLOT_0_READY (1<<2) /* ready */ 55# define ACR1_SLOT_0_READY (1<<2) /* ready */
56 #define ACR1_SLOT_0_STATUS (1<<3) /* status change */ 56# define ACR1_SLOT_0_STATUS (1<<3) /* status change */
57 #define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */ 57# define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */
58 #define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */ 58# define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */
59 #define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */ 59# define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */
60 #define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */ 60# define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */
61 #define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */ 61# define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */
62 #define ACR1_SLOT_1_READY (1<<10) /* ready */ 62# define ACR1_SLOT_1_READY (1<<10) /* ready */
63 #define ACR1_SLOT_1_STATUS (1<<11) /* status change */ 63# define ACR1_SLOT_1_STATUS (1<<11) /* status change */
64 #define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */ 64# define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */
65 #define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */ 65# define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */
66 #define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */ 66# define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
67 67
68#define CPLD_AUX0 0xBE00000C 68#define CPLD_AUX0 0xBE00000C
69#define CPLD_AUX1 0xBE000010 69#define CPLD_AUX1 0xBE000010
diff --git a/include/asm-mips/mach-pb1x00/pb1100.h b/include/asm-mips/mach-pb1x00/pb1100.h
index 4c5a1cd01841..63aa3926b297 100644
--- a/include/asm-mips/mach-pb1x00/pb1100.h
+++ b/include/asm-mips/mach-pb1x00/pb1100.h
@@ -29,44 +29,44 @@
29 29
30#define PB1100_IDENT 0xAE000000 30#define PB1100_IDENT 0xAE000000
31#define BOARD_STATUS_REG 0xAE000004 31#define BOARD_STATUS_REG 0xAE000004
32 #define PB1100_ROM_SEL (1<<15) 32# define PB1100_ROM_SEL (1<<15)
33 #define PB1100_ROM_SIZ (1<<14) 33# define PB1100_ROM_SIZ (1<<14)
34 #define PB1100_SWAP_BOOT (1<<13) 34# define PB1100_SWAP_BOOT (1<<13)
35 #define PB1100_FLASH_WP (1<<12) 35# define PB1100_FLASH_WP (1<<12)
36 #define PB1100_ROM_H_STS (1<<11) 36# define PB1100_ROM_H_STS (1<<11)
37 #define PB1100_ROM_L_STS (1<<10) 37# define PB1100_ROM_L_STS (1<<10)
38 #define PB1100_FLASH_H_STS (1<<9) 38# define PB1100_FLASH_H_STS (1<<9)
39 #define PB1100_FLASH_L_STS (1<<8) 39# define PB1100_FLASH_L_STS (1<<8)
40 #define PB1100_SRAM_SIZ (1<<7) 40# define PB1100_SRAM_SIZ (1<<7)
41 #define PB1100_TSC_BUSY (1<<6) 41# define PB1100_TSC_BUSY (1<<6)
42 #define PB1100_PCMCIA_VS_MASK (3<<4) 42# define PB1100_PCMCIA_VS_MASK (3<<4)
43 #define PB1100_RS232_CD (1<<3) 43# define PB1100_RS232_CD (1<<3)
44 #define PB1100_RS232_CTS (1<<2) 44# define PB1100_RS232_CTS (1<<2)
45 #define PB1100_RS232_DSR (1<<1) 45# define PB1100_RS232_DSR (1<<1)
46 #define PB1100_RS232_RI (1<<0) 46# define PB1100_RS232_RI (1<<0)
47 47
48#define PB1100_IRDA_RS232 0xAE00000C 48#define PB1100_IRDA_RS232 0xAE00000C
49 #define PB1100_IRDA_FULL (0<<14) /* full power */ 49# define PB1100_IRDA_FULL (0<<14) /* full power */
50 #define PB1100_IRDA_SHUTDOWN (1<<14) 50# define PB1100_IRDA_SHUTDOWN (1<<14)
51 #define PB1100_IRDA_TT (2<<14) /* 2/3 power */ 51# define PB1100_IRDA_TT (2<<14) /* 2/3 power */
52 #define PB1100_IRDA_OT (3<<14) /* 1/3 power */ 52# define PB1100_IRDA_OT (3<<14) /* 1/3 power */
53 #define PB1100_IRDA_FIR (1<<13) 53# define PB1100_IRDA_FIR (1<<13)
54 54
55#define PCMCIA_BOARD_REG 0xAE000010 55#define PCMCIA_BOARD_REG 0xAE000010
56 #define PB1100_SD_WP1_RO (1<<15) /* read only */ 56# define PB1100_SD_WP1_RO (1<<15) /* read only */
57 #define PB1100_SD_WP0_RO (1<<14) /* read only */ 57# define PB1100_SD_WP0_RO (1<<14) /* read only */
58 #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */ 58# define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
59 #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */ 59# define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
60 #define PB1100_SEL_SD_CONN1 (1<<9) 60# define PB1100_SEL_SD_CONN1 (1<<9)
61 #define PB1100_SEL_SD_CONN0 (1<<8) 61# define PB1100_SEL_SD_CONN0 (1<<8)
62 #define PC_DEASSERT_RST (1<<7) 62# define PC_DEASSERT_RST (1<<7)
63 #define PC_DRV_EN (1<<4) 63# define PC_DRV_EN (1<<4)
64 64
65#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ 65#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
66 66
67#define PB1100_RST_VDDI 0xAE00001C 67#define PB1100_RST_VDDI 0xAE00001C
68 #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */ 68# define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
69 #define PB1100_VDDI_MASK (0x1F) 69# define PB1100_VDDI_MASK (0x1F)
70 70
71#define PB1100_LEDS 0xAE000018 71#define PB1100_LEDS 0xAE000018
72 72
diff --git a/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
index 57102fa9da51..bdde00c9199b 100644
--- a/include/asm-mips/mach-pnx8550/kernel-entry-init.h
+++ b/include/asm-mips/mach-pnx8550/kernel-entry-init.h
@@ -44,7 +44,7 @@ cache_begin: li t0, (1<<28)
44 mfc0 t0, CP0_CONFIG, 7 44 mfc0 t0, CP0_CONFIG, 7
45 HAZARD_CP0 45 HAZARD_CP0
46 46
47 and t0,~((1<<19) | (1<<20)) /* TLB/MAP cleared */ 47 and t0, ~((1<<19) | (1<<20)) /* TLB/MAP cleared */
48 mtc0 t0, CP0_CONFIG, 7 48 mtc0 t0, CP0_CONFIG, 7
49 HAZARD_CP0 49 HAZARD_CP0
50 50
@@ -200,10 +200,10 @@ pr4450_instr_cache_invalidated:
200 200
201 icache_invd_loop: 201 icache_invd_loop:
202 /* 9 == register t1 */ 202 /* 9 == register t1 */
203 .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \ 203 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
204 (0 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY0 */ 204 (0 * ICACHE_SET_SIZE) /* invalidate inst cache WAY0 */
205 .word (CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \ 205 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
206 (1 * ICACHE_SET_SIZE)) /* invalidate inst cache WAY1 */ 206 (1 * ICACHE_SET_SIZE) /* invalidate inst cache WAY1 */
207 207
208 addiu t1, t1, ICACHE_LINE_SIZE /* T1 = next cache line index */ 208 addiu t1, t1, ICACHE_LINE_SIZE /* T1 = next cache line index */
209 bne t2, zero, icache_invd_loop /* T2 = 0 if all sets invalidated */ 209 bne t2, zero, icache_invd_loop /* T2 = 0 if all sets invalidated */
@@ -235,14 +235,14 @@ pr4450_instr_cache_invalidated:
235 235
236 dcache_wbinvd_loop: 236 dcache_wbinvd_loop:
237 /* 9 == register t1 */ 237 /* 9 == register t1 */
238 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 238 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
239 (0 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY0 */ 239 (0 * DCACHE_SET_SIZE) /* writeback/invalidate WAY0 */
240 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 240 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
241 (1 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY1 */ 241 (1 * DCACHE_SET_SIZE) /* writeback/invalidate WAY1 */
242 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 242 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
243 (2 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY2 */ 243 (2 * DCACHE_SET_SIZE) /* writeback/invalidate WAY2 */
244 .word (CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 244 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
245 (3 * DCACHE_SET_SIZE)) /* writeback/invalidate WAY3 */ 245 (3 * DCACHE_SET_SIZE) /* writeback/invalidate WAY3 */
246 246
247 addiu t1, t1, DCACHE_LINE_SIZE /* T1 = next data cache line index */ 247 addiu t1, t1, DCACHE_LINE_SIZE /* T1 = next data cache line index */
248 bne t2, zero, dcache_wbinvd_loop /* T2 = 0 when wbinvd entire cache */ 248 bne t2, zero, dcache_wbinvd_loop /* T2 = 0 when wbinvd entire cache */
diff --git a/include/asm-mips/mach-pnx8550/uart.h b/include/asm-mips/mach-pnx8550/uart.h
index 814a7a15ab49..ad7608d44874 100644
--- a/include/asm-mips/mach-pnx8550/uart.h
+++ b/include/asm-mips/mach-pnx8550/uart.h
@@ -15,7 +15,7 @@
15 15
16/* early macros needed for prom/kgdb */ 16/* early macros needed for prom/kgdb */
17 17
18#define ip3106_lcr(base,port) *(volatile u32 *)(base+(port*0x1000) + 0x000) 18#define ip3106_lcr(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x000)
19#define ip3106_mcr(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x004) 19#define ip3106_mcr(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x004)
20#define ip3106_baud(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x008) 20#define ip3106_baud(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x008)
21#define ip3106_cfg(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x00C) 21#define ip3106_cfg(base, port) *(volatile u32 *)(base+(port*0x1000) + 0x00C)
diff --git a/include/asm-mips/mach-pnx8550/war.h b/include/asm-mips/mach-pnx8550/war.h
new file mode 100644
index 000000000000..d0458dd082f9
--- /dev/null
+++ b/include/asm-mips/mach-pnx8550/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_PNX8550_WAR_H
9#define __ASM_MIPS_MACH_PNX8550_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */
diff --git a/include/asm-mips/mach-qemu/war.h b/include/asm-mips/mach-qemu/war.h
new file mode 100644
index 000000000000..0eaf0c548a47
--- /dev/null
+++ b/include/asm-mips/mach-qemu/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_QEMU_WAR_H
9#define __ASM_MIPS_MACH_QEMU_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_QEMU_WAR_H */
diff --git a/include/asm-mips/mach-rm/war.h b/include/asm-mips/mach-rm/war.h
new file mode 100644
index 000000000000..948d3129a114
--- /dev/null
+++ b/include/asm-mips/mach-rm/war.h
@@ -0,0 +1,29 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_RM_WAR_H
9#define __ASM_MIPS_MACH_RM_WAR_H
10
11/*
12 * The RM200C seems to have been shipped only with V2.0 R4600s
13 */
14
15#define R4600_V1_INDEX_ICACHEOP_WAR 0
16#define R4600_V1_HIT_CACHEOP_WAR 0
17#define R4600_V2_HIT_CACHEOP_WAR 1
18#define R5432_CP0_INTERRUPT_WAR 0
19#define BCM1250_M3_WAR 0
20#define SIBYTE_1956_WAR 0
21#define MIPS4K_ICACHE_REFILL_WAR 0
22#define MIPS_CACHE_SYNC_WAR 0
23#define TX49XX_ICACHE_INDEX_INV_WAR 0
24#define RM9000_CDEX_SMP_WAR 0
25#define ICACHE_REFILLS_WORKAROUND_WAR 0
26#define R10000_LLSC_WAR 0
27#define MIPS34K_MISSED_ITLB_WAR 0
28
29#endif /* __ASM_MIPS_MACH_RM_WAR_H */
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
index 63d5bf649af1..1c1f92415b9a 100644
--- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
@@ -9,7 +9,7 @@
9#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H 9#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
10 10
11/* 11/*
12 * Sibyte are MIPS64 processors weired to a specific configuration 12 * Sibyte are MIPS64 processors wired to a specific configuration
13 */ 13 */
14#define cpu_has_watch 1 14#define cpu_has_watch 1
15#define cpu_has_mips16 0 15#define cpu_has_mips16 0
@@ -33,6 +33,11 @@
33#define cpu_has_nofpuex 0 33#define cpu_has_nofpuex 0
34#define cpu_has_64bits 1 34#define cpu_has_64bits 1
35 35
36#define cpu_has_mips32r1 1
37#define cpu_has_mips32r2 0
38#define cpu_has_mips64r1 1
39#define cpu_has_mips64r2 0
40
36#define cpu_has_inclusive_pcaches 0 41#define cpu_has_inclusive_pcaches 0
37 42
38#define cpu_dcache_line_size() 32 43#define cpu_dcache_line_size() 32
diff --git a/include/asm-mips/mach-sibyte/war.h b/include/asm-mips/mach-sibyte/war.h
new file mode 100644
index 000000000000..7950ef4f032c
--- /dev/null
+++ b/include/asm-mips/mach-sibyte/war.h
@@ -0,0 +1,37 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_SIBYTE_WAR_H
9#define __ASM_MIPS_MACH_SIBYTE_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15
16#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
18
19#define BCM1250_M3_WAR 1
20#define SIBYTE_1956_WAR 1
21
22#else
23
24#define BCM1250_M3_WAR 0
25#define SIBYTE_1956_WAR 0
26
27#endif
28
29#define MIPS4K_ICACHE_REFILL_WAR 0
30#define MIPS_CACHE_SYNC_WAR 0
31#define TX49XX_ICACHE_INDEX_INV_WAR 0
32#define RM9000_CDEX_SMP_WAR 0
33#define ICACHE_REFILLS_WORKAROUND_WAR 0
34#define R10000_LLSC_WAR 0
35#define MIPS34K_MISSED_ITLB_WAR 0
36
37#endif /* __ASM_MIPS_MACH_SIBYTE_WAR_H */
diff --git a/include/asm-mips/mach-tx49xx/war.h b/include/asm-mips/mach-tx49xx/war.h
new file mode 100644
index 000000000000..39b5d1177c57
--- /dev/null
+++ b/include/asm-mips/mach-tx49xx/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_TX49XX_WAR_H
9#define __ASM_MIPS_MACH_TX49XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 1
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_TX49XX_WAR_H */
diff --git a/include/asm-mips/mach-vr41xx/war.h b/include/asm-mips/mach-vr41xx/war.h
new file mode 100644
index 000000000000..56a38926412a
--- /dev/null
+++ b/include/asm-mips/mach-vr41xx/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_VR41XX_WAR_H
9#define __ASM_MIPS_MACH_VR41XX_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_VR41XX_WAR_H */
diff --git a/include/asm-mips/mach-wrppmc/mach-gt64120.h b/include/asm-mips/mach-wrppmc/mach-gt64120.h
index ba9205a04582..00d8bf6164a9 100644
--- a/include/asm-mips/mach-wrppmc/mach-gt64120.h
+++ b/include/asm-mips/mach-wrppmc/mach-gt64120.h
@@ -43,7 +43,6 @@
43#define GT_PCI_MEM_SIZE 0x02000000UL 43#define GT_PCI_MEM_SIZE 0x02000000UL
44#define GT_PCI_IO_BASE 0x11000000UL 44#define GT_PCI_IO_BASE 0x11000000UL
45#define GT_PCI_IO_SIZE 0x02000000UL 45#define GT_PCI_IO_SIZE 0x02000000UL
46#define GT_ISA_IO_BASE PCI_IO_BASE
47 46
48/* 47/*
49 * PCI interrupts will come in on either the INTA or INTD interrups lines, 48 * PCI interrupts will come in on either the INTA or INTD interrups lines,
diff --git a/include/asm-mips/mach-wrppmc/war.h b/include/asm-mips/mach-wrppmc/war.h
new file mode 100644
index 000000000000..ac48629bb1ce
--- /dev/null
+++ b/include/asm-mips/mach-wrppmc/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_WRPPMC_WAR_H
9#define __ASM_MIPS_MACH_WRPPMC_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 1
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_WRPPMC_WAR_H */
diff --git a/include/asm-mips/mach-yosemite/war.h b/include/asm-mips/mach-yosemite/war.h
new file mode 100644
index 000000000000..e5c6d53efc86
--- /dev/null
+++ b/include/asm-mips/mach-yosemite/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */
8#ifndef __ASM_MIPS_MACH_YOSEMITE_WAR_H
9#define __ASM_MIPS_MACH_YOSEMITE_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 1
21#define ICACHE_REFILLS_WORKAROUND_WAR 1
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MIPS_MACH_YOSEMITE_WAR_H */
diff --git a/include/asm-mips/mc146818-time.h b/include/asm-mips/mc146818-time.h
index 41ac8d363c67..cdc379a0a94e 100644
--- a/include/asm-mips/mc146818-time.h
+++ b/include/asm-mips/mc146818-time.h
@@ -63,8 +63,8 @@ static inline int mc146818_set_rtc_mmss(unsigned long nowtime)
63 BIN_TO_BCD(real_seconds); 63 BIN_TO_BCD(real_seconds);
64 BIN_TO_BCD(real_minutes); 64 BIN_TO_BCD(real_minutes);
65 } 65 }
66 CMOS_WRITE(real_seconds,RTC_SECONDS); 66 CMOS_WRITE(real_seconds, RTC_SECONDS);
67 CMOS_WRITE(real_minutes,RTC_MINUTES); 67 CMOS_WRITE(real_minutes, RTC_MINUTES);
68 } else { 68 } else {
69 printk(KERN_WARNING 69 printk(KERN_WARNING
70 "set_rtc_mmss: can't update from %d to %d\n", 70 "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/include/asm-mips/mips-boards/bonito64.h b/include/asm-mips/mips-boards/bonito64.h
index dc3fc32eedd8..a0f04bb99c99 100644
--- a/include/asm-mips/mips-boards/bonito64.h
+++ b/include/asm-mips/mips-boards/bonito64.h
@@ -387,7 +387,7 @@ extern unsigned long _pcictrl_bonito_pcicfg;
387#define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 387#define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000
388#define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 388#define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12
389#define BONITO_PCIMAP_PCIMAP_2 0x00040000 389#define BONITO_PCIMAP_PCIMAP_2 0x00040000
390#define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 390#define BONITO_PCIMAP_WIN(WIN, ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
391 391
392#define BONITO_PCIMAP_WINSIZE (1<<26) 392#define BONITO_PCIMAP_WINSIZE (1<<26)
393#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) 393#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1))
@@ -412,19 +412,19 @@ extern unsigned long _pcictrl_bonito_pcicfg;
412 412
413#define BONITO_PCIMEMBASECFG_ASHIFT 23 413#define BONITO_PCIMEMBASECFG_ASHIFT 23
414#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff 414#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff
415#define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) 415#define BONITO_PCIMEMBASECFGSIZE(WIN, SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)
416#define BONITO_PCIMEMBASECFGBASE(WIN,BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) 416#define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS)
417 417
418#define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) 418#define BONITO_PCIMEMBASECFG_SIZE(WIN, CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK)
419 419
420 420
421#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 421#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
422#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 422#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
423#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) 423#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
424 424
425#define BONITO_PCITOPHYS(WIN,ADDR,CFG) ( \ 425#define BONITO_PCITOPHYS(WIN, ADDR, CFG) ( \
426 (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \ 426 (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG)))) | \
427 (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \ 427 (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG)) \
428 ) 428 )
429 429
430/* PCICmd */ 430/* PCICmd */
diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h
index eec91001bb65..93bf4e51b8a4 100644
--- a/include/asm-mips/mips-boards/malta.h
+++ b/include/asm-mips/mips-boards/malta.h
@@ -72,7 +72,7 @@ static inline unsigned long get_msc_port_base(unsigned long reg)
72 72
73#define SMSC_CONFIG_ACTIVATE_ENABLE 1 73#define SMSC_CONFIG_ACTIVATE_ENABLE 1
74 74
75#define SMSC_WRITE(x,a) outb(x,a) 75#define SMSC_WRITE(x, a) outb(x, a)
76 76
77#define MALTA_JMPRS_REG 0x1f000210 77#define MALTA_JMPRS_REG 0x1f000210
78 78
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
index 294bca12cd3f..5a2f8a3a6a1f 100644
--- a/include/asm-mips/mipsmtregs.h
+++ b/include/asm-mips/mipsmtregs.h
@@ -41,27 +41,27 @@
41 * Macros for use in assembly language code 41 * Macros for use in assembly language code
42 */ 42 */
43 43
44#define CP0_MVPCONTROL $0,1 44#define CP0_MVPCONTROL $0, 1
45#define CP0_MVPCONF0 $0,2 45#define CP0_MVPCONF0 $0, 2
46#define CP0_MVPCONF1 $0,3 46#define CP0_MVPCONF1 $0, 3
47#define CP0_VPECONTROL $1,1 47#define CP0_VPECONTROL $1, 1
48#define CP0_VPECONF0 $1,2 48#define CP0_VPECONF0 $1, 2
49#define CP0_VPECONF1 $1,3 49#define CP0_VPECONF1 $1, 3
50#define CP0_YQMASK $1,4 50#define CP0_YQMASK $1, 4
51#define CP0_VPESCHEDULE $1,5 51#define CP0_VPESCHEDULE $1, 5
52#define CP0_VPESCHEFBK $1,6 52#define CP0_VPESCHEFBK $1, 6
53#define CP0_TCSTATUS $2,1 53#define CP0_TCSTATUS $2, 1
54#define CP0_TCBIND $2,2 54#define CP0_TCBIND $2, 2
55#define CP0_TCRESTART $2,3 55#define CP0_TCRESTART $2, 3
56#define CP0_TCHALT $2,4 56#define CP0_TCHALT $2, 4
57#define CP0_TCCONTEXT $2,5 57#define CP0_TCCONTEXT $2, 5
58#define CP0_TCSCHEDULE $2,6 58#define CP0_TCSCHEDULE $2, 6
59#define CP0_TCSCHEFBK $2,7 59#define CP0_TCSCHEFBK $2, 7
60#define CP0_SRSCONF0 $6,1 60#define CP0_SRSCONF0 $6, 1
61#define CP0_SRSCONF1 $6,2 61#define CP0_SRSCONF1 $6, 2
62#define CP0_SRSCONF2 $6,3 62#define CP0_SRSCONF2 $6, 3
63#define CP0_SRSCONF3 $6,4 63#define CP0_SRSCONF3 $6, 4
64#define CP0_SRSCONF4 $6,5 64#define CP0_SRSCONF4 $6, 5
65 65
66#endif 66#endif
67 67
@@ -291,7 +291,7 @@ static inline void ehb(void)
291 __res; \ 291 __res; \
292}) 292})
293 293
294#define mftr(rt,u,sel) \ 294#define mftr(rt, u, sel) \
295({ \ 295({ \
296 unsigned long __res; \ 296 unsigned long __res; \
297 \ 297 \
@@ -315,7 +315,7 @@ do { \
315 : : "r" (v)); \ 315 : : "r" (v)); \
316} while (0) 316} while (0)
317 317
318#define mttc0(rd,sel,v) \ 318#define mttc0(rd, sel, v) \
319({ \ 319({ \
320 __asm__ __volatile__( \ 320 __asm__ __volatile__( \
321 " .set push \n" \ 321 " .set push \n" \
@@ -330,7 +330,7 @@ do { \
330}) 330})
331 331
332 332
333#define mttr(rd,u,sel,v) \ 333#define mttr(rd, u, sel, v) \
334({ \ 334({ \
335 __asm__ __volatile__( \ 335 __asm__ __volatile__( \
336 "mttr %0," #rd ", " #u ", " #sel \ 336 "mttr %0," #rd ", " #u ", " #sel \
@@ -362,7 +362,7 @@ do { \
362#define write_vpe_c0_config1(val) mttc0(16, 1, val) 362#define write_vpe_c0_config1(val) mttc0(16, 1, val)
363#define read_vpe_c0_config7() mftc0(16, 7) 363#define read_vpe_c0_config7() mftc0(16, 7)
364#define write_vpe_c0_config7(val) mttc0(16, 7, val) 364#define write_vpe_c0_config7(val) mttc0(16, 7, val)
365#define read_vpe_c0_ebase() mftc0(15,1) 365#define read_vpe_c0_ebase() mftc0(15, 1)
366#define write_vpe_c0_ebase(val) mttc0(15, 1, val) 366#define write_vpe_c0_ebase(val) mttc0(15, 1, val)
367#define write_vpe_c0_compare(val) mttc0(11, 0, val) 367#define write_vpe_c0_compare(val) mttc0(11, 0, val)
368#define read_vpe_c0_badvaddr() mftc0(8, 0) 368#define read_vpe_c0_badvaddr() mftc0(8, 0)
@@ -372,15 +372,15 @@ do { \
372 372
373/* TC */ 373/* TC */
374#define read_tc_c0_tcstatus() mftc0(2, 1) 374#define read_tc_c0_tcstatus() mftc0(2, 1)
375#define write_tc_c0_tcstatus(val) mttc0(2,1,val) 375#define write_tc_c0_tcstatus(val) mttc0(2, 1, val)
376#define read_tc_c0_tcbind() mftc0(2, 2) 376#define read_tc_c0_tcbind() mftc0(2, 2)
377#define write_tc_c0_tcbind(val) mttc0(2,2,val) 377#define write_tc_c0_tcbind(val) mttc0(2, 2, val)
378#define read_tc_c0_tcrestart() mftc0(2, 3) 378#define read_tc_c0_tcrestart() mftc0(2, 3)
379#define write_tc_c0_tcrestart(val) mttc0(2,3,val) 379#define write_tc_c0_tcrestart(val) mttc0(2, 3, val)
380#define read_tc_c0_tchalt() mftc0(2, 4) 380#define read_tc_c0_tchalt() mftc0(2, 4)
381#define write_tc_c0_tchalt(val) mttc0(2,4,val) 381#define write_tc_c0_tchalt(val) mttc0(2, 4, val)
382#define read_tc_c0_tccontext() mftc0(2, 5) 382#define read_tc_c0_tccontext() mftc0(2, 5)
383#define write_tc_c0_tccontext(val) mttc0(2,5,val) 383#define write_tc_c0_tccontext(val) mttc0(2, 5, val)
384 384
385/* GPR */ 385/* GPR */
386#define read_tc_gpr_sp() mftgpr(29) 386#define read_tc_gpr_sp() mftgpr(29)
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 18f47f1e8cd5..aa17f658f73c 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -981,7 +981,7 @@ do { \
981#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) 981#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
982 982
983/* MIPSR2 */ 983/* MIPSR2 */
984#define read_c0_hwrena() __read_32bit_c0_register($7,0) 984#define read_c0_hwrena() __read_32bit_c0_register($7, 0)
985#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) 985#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val)
986 986
987#define read_c0_intctl() __read_32bit_c0_register($12, 1) 987#define read_c0_intctl() __read_32bit_c0_register($12, 1)
@@ -993,7 +993,7 @@ do { \
993#define read_c0_srsmap() __read_32bit_c0_register($12, 3) 993#define read_c0_srsmap() __read_32bit_c0_register($12, 3)
994#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val) 994#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val)
995 995
996#define read_c0_ebase() __read_32bit_c0_register($15,1) 996#define read_c0_ebase() __read_32bit_c0_register($15, 1)
997#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) 997#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val)
998 998
999/* 999/*
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 65024ffd7879..0c4f245eaeb2 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -107,7 +107,7 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
107 107
108#else /* CONFIG_MIPS_MT_SMTC */ 108#else /* CONFIG_MIPS_MT_SMTC */
109 109
110#define get_new_mmu_context(mm,cpu) smtc_get_new_mmu_context((mm),(cpu)) 110#define get_new_mmu_context(mm, cpu) smtc_get_new_mmu_context((mm), (cpu))
111 111
112#endif /* CONFIG_MIPS_MT_SMTC */ 112#endif /* CONFIG_MIPS_MT_SMTC */
113 113
@@ -120,7 +120,7 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
120{ 120{
121 int i; 121 int i;
122 122
123 for (i = 0; i < num_online_cpus(); i++) 123 for_each_online_cpu(i)
124 cpu_context(i, mm) = 0; 124 cpu_context(i, mm) = 0;
125 125
126 return 0; 126 return 0;
@@ -191,7 +191,7 @@ static inline void destroy_context(struct mm_struct *mm)
191{ 191{
192} 192}
193 193
194#define deactivate_mm(tsk,mm) do { } while (0) 194#define deactivate_mm(tsk, mm) do { } while (0)
195 195
196/* 196/*
197 * After we have set current->mm to a new value, this activates 197 * After we have set current->mm to a new value, this activates
@@ -284,7 +284,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
284 int i; 284 int i;
285 285
286 /* SMTC shares the TLB (and ASIDs) across VPEs */ 286 /* SMTC shares the TLB (and ASIDs) across VPEs */
287 for (i = 0; i < num_online_cpus(); i++) { 287 for_each_online_cpu(i) {
288 if((smtc_status & SMTC_TLB_SHARED) 288 if((smtc_status & SMTC_TLB_SHARED)
289 || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id)) 289 || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id))
290 cpu_context(i, mm) = 0; 290 cpu_context(i, mm) = 0;
diff --git a/include/asm-mips/nile4.h b/include/asm-mips/nile4.h
new file mode 100644
index 000000000000..c3ca959aa4d9
--- /dev/null
+++ b/include/asm-mips/nile4.h
@@ -0,0 +1,310 @@
1/*
2 * asm-mips/nile4.h -- NEC Vrc-5074 Nile 4 definitions
3 *
4 * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
5 * Sony Software Development Center Europe (SDCE), Brussels
6 *
7 * This file is based on the following documentation:
8 *
9 * NEC Vrc 5074 System Controller Data Sheet, June 1998
10 */
11
12#ifndef _ASM_NILE4_H
13#define _ASM_NILE4_H
14
15#define NILE4_BASE 0xbfa00000
16#define NILE4_SIZE 0x00200000 /* 2 MB */
17
18
19 /*
20 * Physical Device Address Registers (PDARs)
21 */
22
23#define NILE4_SDRAM0 0x0000 /* SDRAM Bank 0 [R/W] */
24#define NILE4_SDRAM1 0x0008 /* SDRAM Bank 1 [R/W] */
25#define NILE4_DCS2 0x0010 /* Device Chip-Select 2 [R/W] */
26#define NILE4_DCS3 0x0018 /* Device Chip-Select 3 [R/W] */
27#define NILE4_DCS4 0x0020 /* Device Chip-Select 4 [R/W] */
28#define NILE4_DCS5 0x0028 /* Device Chip-Select 5 [R/W] */
29#define NILE4_DCS6 0x0030 /* Device Chip-Select 6 [R/W] */
30#define NILE4_DCS7 0x0038 /* Device Chip-Select 7 [R/W] */
31#define NILE4_DCS8 0x0040 /* Device Chip-Select 8 [R/W] */
32#define NILE4_PCIW0 0x0060 /* PCI Address Window 0 [R/W] */
33#define NILE4_PCIW1 0x0068 /* PCI Address Window 1 [R/W] */
34#define NILE4_INTCS 0x0070 /* Controller Internal Registers and Devices */
35 /* [R/W] */
36#define NILE4_BOOTCS 0x0078 /* Boot ROM Chip-Select [R/W] */
37
38
39 /*
40 * CPU Interface Registers
41 */
42
43#define NILE4_CPUSTAT 0x0080 /* CPU Status [R/W] */
44#define NILE4_INTCTRL 0x0088 /* Interrupt Control [R/W] */
45#define NILE4_INTSTAT0 0x0090 /* Interrupt Status 0 [R] */
46#define NILE4_INTSTAT1 0x0098 /* Interrupt Status 1 and CPU Interrupt */
47 /* Enable [R/W] */
48#define NILE4_INTCLR 0x00A0 /* Interrupt Clear [R/W] */
49#define NILE4_INTPPES 0x00A8 /* PCI Interrupt Control [R/W] */
50
51
52 /*
53 * Memory-Interface Registers
54 */
55
56#define NILE4_MEMCTRL 0x00C0 /* Memory Control */
57#define NILE4_ACSTIME 0x00C8 /* Memory Access Timing [R/W] */
58#define NILE4_CHKERR 0x00D0 /* Memory Check Error Status [R] */
59
60
61 /*
62 * PCI-Bus Registers
63 */
64
65#define NILE4_PCICTRL 0x00E0 /* PCI Control [R/W] */
66#define NILE4_PCIARB 0x00E8 /* PCI Arbiter [R/W] */
67#define NILE4_PCIINIT0 0x00F0 /* PCI Master (Initiator) 0 [R/W] */
68#define NILE4_PCIINIT1 0x00F8 /* PCI Master (Initiator) 1 [R/W] */
69#define NILE4_PCIERR 0x00B8 /* PCI Error [R/W] */
70
71
72 /*
73 * Local-Bus Registers
74 */
75
76#define NILE4_LCNFG 0x0100 /* Local Bus Configuration [R/W] */
77#define NILE4_LCST2 0x0110 /* Local Bus Chip-Select Timing 2 [R/W] */
78#define NILE4_LCST3 0x0118 /* Local Bus Chip-Select Timing 3 [R/W] */
79#define NILE4_LCST4 0x0120 /* Local Bus Chip-Select Timing 4 [R/W] */
80#define NILE4_LCST5 0x0128 /* Local Bus Chip-Select Timing 5 [R/W] */
81#define NILE4_LCST6 0x0130 /* Local Bus Chip-Select Timing 6 [R/W] */
82#define NILE4_LCST7 0x0138 /* Local Bus Chip-Select Timing 7 [R/W] */
83#define NILE4_LCST8 0x0140 /* Local Bus Chip-Select Timing 8 [R/W] */
84#define NILE4_DCSFN 0x0150 /* Device Chip-Select Muxing and Output */
85 /* Enables [R/W] */
86#define NILE4_DCSIO 0x0158 /* Device Chip-Selects As I/O Bits [R/W] */
87#define NILE4_BCST 0x0178 /* Local Boot Chip-Select Timing [R/W] */
88
89
90 /*
91 * DMA Registers
92 */
93
94#define NILE4_DMACTRL0 0x0180 /* DMA Control 0 [R/W] */
95#define NILE4_DMASRCA0 0x0188 /* DMA Source Address 0 [R/W] */
96#define NILE4_DMADESA0 0x0190 /* DMA Destination Address 0 [R/W] */
97#define NILE4_DMACTRL1 0x0198 /* DMA Control 1 [R/W] */
98#define NILE4_DMASRCA1 0x01A0 /* DMA Source Address 1 [R/W] */
99#define NILE4_DMADESA1 0x01A8 /* DMA Destination Address 1 [R/W] */
100
101
102 /*
103 * Timer Registers
104 */
105
106#define NILE4_T0CTRL 0x01C0 /* SDRAM Refresh Control [R/W] */
107#define NILE4_T0CNTR 0x01C8 /* SDRAM Refresh Counter [R/W] */
108#define NILE4_T1CTRL 0x01D0 /* CPU-Bus Read Time-Out Control [R/W] */
109#define NILE4_T1CNTR 0x01D8 /* CPU-Bus Read Time-Out Counter [R/W] */
110#define NILE4_T2CTRL 0x01E0 /* General-Purpose Timer Control [R/W] */
111#define NILE4_T2CNTR 0x01E8 /* General-Purpose Timer Counter [R/W] */
112#define NILE4_T3CTRL 0x01F0 /* Watchdog Timer Control [R/W] */
113#define NILE4_T3CNTR 0x01F8 /* Watchdog Timer Counter [R/W] */
114
115
116 /*
117 * PCI Configuration Space Registers
118 */
119
120#define NILE4_PCI_BASE 0x0200
121
122#define NILE4_VID 0x0200 /* PCI Vendor ID [R] */
123#define NILE4_DID 0x0202 /* PCI Device ID [R] */
124#define NILE4_PCICMD 0x0204 /* PCI Command [R/W] */
125#define NILE4_PCISTS 0x0206 /* PCI Status [R/W] */
126#define NILE4_REVID 0x0208 /* PCI Revision ID [R] */
127#define NILE4_CLASS 0x0209 /* PCI Class Code [R] */
128#define NILE4_CLSIZ 0x020C /* PCI Cache Line Size [R/W] */
129#define NILE4_MLTIM 0x020D /* PCI Latency Timer [R/W] */
130#define NILE4_HTYPE 0x020E /* PCI Header Type [R] */
131#define NILE4_BIST 0x020F /* BIST [R] (unimplemented) */
132#define NILE4_BARC 0x0210 /* PCI Base Address Register Control [R/W] */
133#define NILE4_BAR0 0x0218 /* PCI Base Address Register 0 [R/W] */
134#define NILE4_BAR1 0x0220 /* PCI Base Address Register 1 [R/W] */
135#define NILE4_CIS 0x0228 /* PCI Cardbus CIS Pointer [R] */
136 /* (unimplemented) */
137#define NILE4_SSVID 0x022C /* PCI Sub-System Vendor ID [R/W] */
138#define NILE4_SSID 0x022E /* PCI Sub-System ID [R/W] */
139#define NILE4_ROM 0x0230 /* Expansion ROM Base Address [R] */
140 /* (unimplemented) */
141#define NILE4_INTLIN 0x023C /* PCI Interrupt Line [R/W] */
142#define NILE4_INTPIN 0x023D /* PCI Interrupt Pin [R] */
143#define NILE4_MINGNT 0x023E /* PCI Min_Gnt [R] (unimplemented) */
144#define NILE4_MAXLAT 0x023F /* PCI Max_Lat [R] (unimplemented) */
145#define NILE4_BAR2 0x0240 /* PCI Base Address Register 2 [R/W] */
146#define NILE4_BAR3 0x0248 /* PCI Base Address Register 3 [R/W] */
147#define NILE4_BAR4 0x0250 /* PCI Base Address Register 4 [R/W] */
148#define NILE4_BAR5 0x0258 /* PCI Base Address Register 5 [R/W] */
149#define NILE4_BAR6 0x0260 /* PCI Base Address Register 6 [R/W] */
150#define NILE4_BAR7 0x0268 /* PCI Base Address Register 7 [R/W] */
151#define NILE4_BAR8 0x0270 /* PCI Base Address Register 8 [R/W] */
152#define NILE4_BARB 0x0278 /* PCI Base Address Register BOOT [R/W] */
153
154
155 /*
156 * Serial-Port Registers
157 */
158
159#define NILE4_UART_BASE 0x0300
160
161#define NILE4_UARTRBR 0x0300 /* UART Receiver Data Buffer [R] */
162#define NILE4_UARTTHR 0x0300 /* UART Transmitter Data Holding [W] */
163#define NILE4_UARTIER 0x0308 /* UART Interrupt Enable [R/W] */
164#define NILE4_UARTDLL 0x0300 /* UART Divisor Latch LSB [R/W] */
165#define NILE4_UARTDLM 0x0308 /* UART Divisor Latch MSB [R/W] */
166#define NILE4_UARTIIR 0x0310 /* UART Interrupt ID [R] */
167#define NILE4_UARTFCR 0x0310 /* UART FIFO Control [W] */
168#define NILE4_UARTLCR 0x0318 /* UART Line Control [R/W] */
169#define NILE4_UARTMCR 0x0320 /* UART Modem Control [R/W] */
170#define NILE4_UARTLSR 0x0328 /* UART Line Status [R/W] */
171#define NILE4_UARTMSR 0x0330 /* UART Modem Status [R/W] */
172#define NILE4_UARTSCR 0x0338 /* UART Scratch [R/W] */
173
174#define NILE4_UART_BASE_BAUD 520833 /* 100 MHz / 12 / 16 */
175
176
177 /*
178 * Interrupt Lines
179 */
180
181#define NILE4_INT_CPCE 0 /* CPU-Interface Parity-Error Interrupt */
182#define NILE4_INT_CNTD 1 /* CPU No-Target Decode Interrupt */
183#define NILE4_INT_MCE 2 /* Memory-Check Error Interrupt */
184#define NILE4_INT_DMA 3 /* DMA Controller Interrupt */
185#define NILE4_INT_UART 4 /* UART Interrupt */
186#define NILE4_INT_WDOG 5 /* Watchdog Timer Interrupt */
187#define NILE4_INT_GPT 6 /* General-Purpose Timer Interrupt */
188#define NILE4_INT_LBRTD 7 /* Local-Bus Ready Timer Interrupt */
189#define NILE4_INT_INTA 8 /* PCI Interrupt Signal INTA# */
190#define NILE4_INT_INTB 9 /* PCI Interrupt Signal INTB# */
191#define NILE4_INT_INTC 10 /* PCI Interrupt Signal INTC# */
192#define NILE4_INT_INTD 11 /* PCI Interrupt Signal INTD# */
193#define NILE4_INT_INTE 12 /* PCI Interrupt Signal INTE# (ISA cascade) */
194#define NILE4_INT_RESV 13 /* Reserved */
195#define NILE4_INT_PCIS 14 /* PCI SERR# Interrupt */
196#define NILE4_INT_PCIE 15 /* PCI Internal Error Interrupt */
197
198
199 /*
200 * Nile 4 Register Access
201 */
202
203static inline void nile4_sync(void)
204{
205 volatile u32 *p = (volatile u32 *)0xbfc00000;
206 (void)(*p);
207}
208
209static inline void nile4_out32(u32 offset, u32 val)
210{
211 *(volatile u32 *)(NILE4_BASE+offset) = val;
212 nile4_sync();
213}
214
215static inline u32 nile4_in32(u32 offset)
216{
217 u32 val = *(volatile u32 *)(NILE4_BASE+offset);
218 nile4_sync();
219 return val;
220}
221
222static inline void nile4_out16(u32 offset, u16 val)
223{
224 *(volatile u16 *)(NILE4_BASE+offset) = val;
225 nile4_sync();
226}
227
228static inline u16 nile4_in16(u32 offset)
229{
230 u16 val = *(volatile u16 *)(NILE4_BASE+offset);
231 nile4_sync();
232 return val;
233}
234
235static inline void nile4_out8(u32 offset, u8 val)
236{
237 *(volatile u8 *)(NILE4_BASE+offset) = val;
238 nile4_sync();
239}
240
241static inline u8 nile4_in8(u32 offset)
242{
243 u8 val = *(volatile u8 *)(NILE4_BASE+offset);
244 nile4_sync();
245 return val;
246}
247
248
249 /*
250 * Physical Device Address Registers
251 */
252
253extern void nile4_set_pdar(u32 pdar, u32 phys, u32 size, int width,
254 int on_memory_bus, int visible);
255
256
257 /*
258 * PCI Master Registers
259 */
260
261#define NILE4_PCICMD_IACK 0 /* PCI Interrupt Acknowledge */
262#define NILE4_PCICMD_IO 1 /* PCI I/O Space */
263#define NILE4_PCICMD_MEM 3 /* PCI Memory Space */
264#define NILE4_PCICMD_CFG 5 /* PCI Configuration Space */
265
266
267 /*
268 * PCI Address Spaces
269 *
270 * Note that these are multiplexed using PCIINIT[01]!
271 */
272
273#define NILE4_PCI_IO_BASE 0xa6000000
274#define NILE4_PCI_MEM_BASE 0xa8000000
275#define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE
276#define NILE4_PCI_IACK_BASE NILE4_PCI_IO_BASE
277
278
279extern void nile4_set_pmr(u32 pmr, u32 type, u32 addr);
280
281
282 /*
283 * Interrupt Programming
284 */
285
286#define NUM_I8259_INTERRUPTS 16
287#define NUM_NILE4_INTERRUPTS 16
288
289#define IRQ_I8259_CASCADE NILE4_INT_INTE
290#define is_i8259_irq(irq) ((irq) < NUM_I8259_INTERRUPTS)
291#define nile4_to_irq(n) ((n)+NUM_I8259_INTERRUPTS)
292#define irq_to_nile4(n) ((n)-NUM_I8259_INTERRUPTS)
293
294extern void nile4_map_irq(int nile4_irq, int cpu_irq);
295extern void nile4_map_irq_all(int cpu_irq);
296extern void nile4_enable_irq(unsigned int nile4_irq);
297extern void nile4_disable_irq(unsigned int nile4_irq);
298extern void nile4_disable_irq_all(void);
299extern u16 nile4_get_irq_stat(int cpu_irq);
300extern void nile4_enable_irq_output(int cpu_irq);
301extern void nile4_disable_irq_output(int cpu_irq);
302extern void nile4_set_pci_irq_polarity(int pci_irq, int high);
303extern void nile4_set_pci_irq_level_or_edge(int pci_irq, int level);
304extern void nile4_clear_irq(int nile4_irq);
305extern void nile4_clear_irq_mask(u32 mask);
306extern u8 nile4_i8259_iack(void);
307extern void nile4_dump_irq_status(void); /* Debug */
308
309#endif
310
diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
index 8c08fa904b2c..c2394f8b0fe1 100644
--- a/include/asm-mips/paccess.h
+++ b/include/asm-mips/paccess.h
@@ -25,13 +25,13 @@
25extern asmlinkage void handle_ibe(void); 25extern asmlinkage void handle_ibe(void);
26extern asmlinkage void handle_dbe(void); 26extern asmlinkage void handle_dbe(void);
27 27
28#define put_dbe(x,ptr) __put_dbe((x),(ptr),sizeof(*(ptr))) 28#define put_dbe(x, ptr) __put_dbe((x), (ptr), sizeof(*(ptr)))
29#define get_dbe(x,ptr) __get_dbe((x),(ptr),sizeof(*(ptr))) 29#define get_dbe(x, ptr) __get_dbe((x), (ptr), sizeof(*(ptr)))
30 30
31struct __large_pstruct { unsigned long buf[100]; }; 31struct __large_pstruct { unsigned long buf[100]; };
32#define __mp(x) (*(struct __large_pstruct *)(x)) 32#define __mp(x) (*(struct __large_pstruct *)(x))
33 33
34#define __get_dbe(x,ptr,size) \ 34#define __get_dbe(x, ptr, size) \
35({ \ 35({ \
36 long __gu_err; \ 36 long __gu_err; \
37 __typeof__(*(ptr)) __gu_val; \ 37 __typeof__(*(ptr)) __gu_val; \
@@ -70,7 +70,7 @@ struct __large_pstruct { unsigned long buf[100]; };
70 70
71extern void __get_dbe_unknown(void); 71extern void __get_dbe_unknown(void);
72 72
73#define __put_dbe(x,ptr,size) \ 73#define __put_dbe(x, ptr, size) \
74({ \ 74({ \
75 long __pu_err; \ 75 long __pu_err; \
76 __typeof__(*(ptr)) __pu_val; \ 76 __typeof__(*(ptr)) __pu_val; \
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index e3301e54d559..d2ea983bec06 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -153,7 +153,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
153 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) 153 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
154#endif 154#endif
155#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) 155#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
156#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) 156#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
157 157
158#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 158#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
159 159
diff --git a/include/asm-mips/parport.h b/include/asm-mips/parport.h
index a742e04e82de..f52656826cce 100644
--- a/include/asm-mips/parport.h
+++ b/include/asm-mips/parport.h
@@ -6,10 +6,10 @@
6#ifndef _ASM_PARPORT_H 6#ifndef _ASM_PARPORT_H
7#define _ASM_PARPORT_H 7#define _ASM_PARPORT_H
8 8
9static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); 9static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma);
10static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) 10static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
11{ 11{
12 return parport_pc_find_isa_ports (autoirq, autodma); 12 return parport_pc_find_isa_ports(autoirq, autodma);
13} 13}
14 14
15#endif /* _ASM_PARPORT_H */ 15#endif /* _ASM_PARPORT_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 4fcc185cb2d1..301ff2f28012 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -150,8 +150,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
150 return root; 150 return root;
151} 151}
152 152
153#ifdef CONFIG_PCI_DOMAINS
154
155#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 153#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
156 154
157static inline int pci_proc_domain(struct pci_bus *bus) 155static inline int pci_proc_domain(struct pci_bus *bus)
@@ -160,8 +158,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
160 return hose->need_domain_info; 158 return hose->need_domain_info;
161} 159}
162 160
163#endif /* CONFIG_PCI_DOMAINS */
164
165#endif /* __KERNEL__ */ 161#endif /* __KERNEL__ */
166 162
167/* implement the pci_ DMA API in terms of the generic device dma_ one */ 163/* implement the pci_ DMA API in terms of the generic device dma_ one */
diff --git a/include/asm-mips/pci/bridge.h b/include/asm-mips/pci/bridge.h
index 0c45e7598f3f..b84feebf2cef 100644
--- a/include/asm-mips/pci/bridge.h
+++ b/include/asm-mips/pci/bridge.h
@@ -360,7 +360,7 @@ typedef struct bridge_err_cmdword_s {
360#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 /* Type 0 Cfg Func Offset (1..7) */ 360#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 /* Type 0 Cfg Func Offset (1..7) */
361#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+\ 361#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+\
362 (s)*BRIDGE_TYPE0_CFG_SLOT_OFF) 362 (s)*BRIDGE_TYPE0_CFG_SLOT_OFF)
363#define BRIDGE_TYPE0_CFG_DEVF(s,f) (BRIDGE_TYPE0_CFG_DEV0+\ 363#define BRIDGE_TYPE0_CFG_DEVF(s, f) (BRIDGE_TYPE0_CFG_DEV0+\
364 (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\ 364 (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+\
365 (f)*BRIDGE_TYPE0_CFG_FUNC_OFF) 365 (f)*BRIDGE_TYPE0_CFG_FUNC_OFF)
366 366
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index 9fb57c035213..81b72122207a 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -95,7 +95,7 @@ static inline void pte_free(struct page *pte)
95 __free_pages(pte, PTE_ORDER); 95 __free_pages(pte, PTE_ORDER);
96} 96}
97 97
98#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 98#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
99 99
100#ifdef CONFIG_32BIT 100#ifdef CONFIG_32BIT
101 101
@@ -104,7 +104,7 @@ static inline void pte_free(struct page *pte)
104 * inside the pgd, so has no extra memory associated with it. 104 * inside the pgd, so has no extra memory associated with it.
105 */ 105 */
106#define pmd_free(x) do { } while (0) 106#define pmd_free(x) do { } while (0)
107#define __pmd_free_tlb(tlb,x) do { } while (0) 107#define __pmd_free_tlb(tlb, x) do { } while (0)
108 108
109#endif 109#endif
110 110
@@ -125,7 +125,7 @@ static inline void pmd_free(pmd_t *pmd)
125 free_pages((unsigned long)pmd, PMD_ORDER); 125 free_pages((unsigned long)pmd, PMD_ORDER);
126} 126}
127 127
128#define __pmd_free_tlb(tlb,x) pmd_free(x) 128#define __pmd_free_tlb(tlb, x) pmd_free(x)
129 129
130#endif 130#endif
131 131
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 59c865deb0c7..a0947092d0e0 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -140,7 +140,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
140#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 140#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
141 141
142/* to find an entry in a page-table-directory */ 142/* to find an entry in a page-table-directory */
143#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 143#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
144 144
145/* Find an entry in the third-level page table.. */ 145/* Find an entry in the third-level page table.. */
146#define __pte_offset(address) \ 146#define __pte_offset(address) \
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 49f5a1a2dfcd..943515f0ef87 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -104,7 +104,7 @@
104#define VMALLOC_START MAP_BASE 104#define VMALLOC_START MAP_BASE
105#define VMALLOC_END \ 105#define VMALLOC_END \
106 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE) 106 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
107#if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) && \ 107#if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
108 VMALLOC_START != CKSSEG 108 VMALLOC_START != CKSSEG
109/* Load modules into 32bit-compatible segment. */ 109/* Load modules into 32bit-compatible segment. */
110#define MODULE_START CKSSEG 110#define MODULE_START CKSSEG
@@ -193,7 +193,7 @@ static inline void pud_clear(pud_t *pudp)
193#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 193#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
194 194
195/* to find an entry in a page-table-directory */ 195/* to find an entry in a page-table-directory */
196#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 196#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
197 197
198static inline unsigned long pud_page_vaddr(pud_t pud) 198static inline unsigned long pud_page_vaddr(pud_t pud)
199{ 199{
@@ -237,7 +237,7 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
237 237
238#define __swp_type(x) (((x).val >> 32) & 0xff) 238#define __swp_type(x) (((x).val >> 32) & 0xff)
239#define __swp_offset(x) ((x).val >> 40) 239#define __swp_offset(x) ((x).val >> 40)
240#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) }) 240#define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
241#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 241#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
242#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 242#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
243 243
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index d2ee28156743..17a7703a2969 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -103,7 +103,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
103 } 103 }
104 } 104 }
105} 105}
106#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 106#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
107 107
108static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 108static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
109{ 109{
@@ -140,7 +140,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
140 } 140 }
141#endif 141#endif
142} 142}
143#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 143#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
144 144
145static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 145static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
146{ 146{
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
index 4aaaff670361..8121a9a75bfd 100644
--- a/include/asm-mips/prctl.h
+++ b/include/asm-mips/prctl.h
@@ -36,6 +36,6 @@ struct prda {
36 36
37#define t_sys prda_sys 37#define t_sys prda_sys
38 38
39ptrdiff_t prctl (int op, int v1, int v2); 39ptrdiff_t prctl(int op, int v1, int v2);
40 40
41#endif 41#endif
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h
index 531caf44560c..487ced4a40de 100644
--- a/include/asm-mips/qemu.h
+++ b/include/asm-mips/qemu.h
@@ -12,7 +12,7 @@
12 * Interrupt numbers 12 * Interrupt numbers
13 */ 13 */
14#define Q_PIC_IRQ_BASE 0 14#define Q_PIC_IRQ_BASE 0
15#define Q_COUNT_COMPARE_IRQ 16 15#define Q_COUNT_COMPARE_IRQ 23
16 16
17/* 17/*
18 * Qemu clock rate. Unlike on real MIPS this has no relation to the 18 * Qemu clock rate. Unlike on real MIPS this has no relation to the
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 3c8e3c8d1a9a..2b8466ffd3ca 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -354,7 +354,7 @@ static inline void blast_##pfx##cache##lsize(void) \
354 \ 354 \
355 for (ws = 0; ws < ws_end; ws += ws_inc) \ 355 for (ws = 0; ws < ws_end; ws += ws_inc) \
356 for (addr = start; addr < end; addr += lsize * 32) \ 356 for (addr = start; addr < end; addr += lsize * 32) \
357 cache##lsize##_unroll32(addr|ws,indexop); \ 357 cache##lsize##_unroll32(addr|ws, indexop); \
358 \ 358 \
359 __##pfx##flush_epilogue \ 359 __##pfx##flush_epilogue \
360} \ 360} \
@@ -367,7 +367,7 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \
367 __##pfx##flush_prologue \ 367 __##pfx##flush_prologue \
368 \ 368 \
369 do { \ 369 do { \
370 cache##lsize##_unroll32(start,hitop); \ 370 cache##lsize##_unroll32(start, hitop); \
371 start += lsize * 32; \ 371 start += lsize * 32; \
372 } while (start < end); \ 372 } while (start < end); \
373 \ 373 \
@@ -388,7 +388,7 @@ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page)
388 \ 388 \
389 for (ws = 0; ws < ws_end; ws += ws_inc) \ 389 for (ws = 0; ws < ws_end; ws += ws_inc) \
390 for (addr = start; addr < end; addr += lsize * 32) \ 390 for (addr = start; addr < end; addr += lsize * 32) \
391 cache##lsize##_unroll32(addr|ws,indexop); \ 391 cache##lsize##_unroll32(addr|ws, indexop); \
392 \ 392 \
393 __##pfx##flush_epilogue \ 393 __##pfx##flush_epilogue \
394} 394}
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index 3d6aa7c7ea81..080daa77f867 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -46,23 +46,23 @@ struct semaphore {
46} 46}
47 47
48#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ 48#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
49 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 49 struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
50 50
51#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1) 51#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
52#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0) 52#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0)
53 53
54static inline void sema_init (struct semaphore *sem, int val) 54static inline void sema_init(struct semaphore *sem, int val)
55{ 55{
56 atomic_set(&sem->count, val); 56 atomic_set(&sem->count, val);
57 init_waitqueue_head(&sem->wait); 57 init_waitqueue_head(&sem->wait);
58} 58}
59 59
60static inline void init_MUTEX (struct semaphore *sem) 60static inline void init_MUTEX(struct semaphore *sem)
61{ 61{
62 sema_init(sem, 1); 62 sema_init(sem, 1);
63} 63}
64 64
65static inline void init_MUTEX_LOCKED (struct semaphore *sem) 65static inline void init_MUTEX_LOCKED(struct semaphore *sem)
66{ 66{
67 sema_init(sem, 0); 67 sema_init(sem, 0);
68} 68}
diff --git a/include/asm-mips/sgiarcs.h b/include/asm-mips/sgiarcs.h
index 439bce7daa3a..721327f88601 100644
--- a/include/asm-mips/sgiarcs.h
+++ b/include/asm-mips/sgiarcs.h
@@ -13,7 +13,7 @@
13#define _ASM_SGIARCS_H 13#define _ASM_SGIARCS_H
14 14
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/arc/types.h> 16#include <asm/fw/arc/types.h>
17 17
18/* Various ARCS error codes. */ 18/* Various ARCS error codes. */
19#define PROM_ESUCCESS 0x00 19#define PROM_ESUCCESS 0x00
@@ -369,8 +369,8 @@ struct linux_smonblock {
369#if defined(CONFIG_64BIT) && defined(CONFIG_ARC32) 369#if defined(CONFIG_64BIT) && defined(CONFIG_ARC32)
370 370
371#define __arc_clobbers \ 371#define __arc_clobbers \
372 "$2","$3" /* ... */, "$8","$9","$10","$11", \ 372 "$2", "$3" /* ... */, "$8", "$9", "$10", "$11", \
373 "$12","$13","$14","$15","$16","$24","$25","$31" 373 "$12", "$13", "$14", "$15", "$16", "$24", "$25", "$31"
374 374
375#define ARC_CALL0(dest) \ 375#define ARC_CALL0(dest) \
376({ long __res; \ 376({ long __res; \
@@ -382,11 +382,11 @@ struct linux_smonblock {
382 "move\t%0, $2" \ 382 "move\t%0, $2" \
383 : "=r" (__res), "=r" (__vec) \ 383 : "=r" (__res), "=r" (__vec) \
384 : "1" (__vec) \ 384 : "1" (__vec) \
385 : __arc_clobbers, "$4","$5","$6","$7"); \ 385 : __arc_clobbers, "$4", "$5", "$6", "$7"); \
386 (unsigned long) __res; \ 386 (unsigned long) __res; \
387}) 387})
388 388
389#define ARC_CALL1(dest,a1) \ 389#define ARC_CALL1(dest, a1) \
390({ long __res; \ 390({ long __res; \
391 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 391 register signed int __a1 __asm__("$4") = (int) (long) (a1); \
392 long __vec = (long) romvec->dest; \ 392 long __vec = (long) romvec->dest; \
@@ -397,11 +397,11 @@ struct linux_smonblock {
397 "move\t%0, $2" \ 397 "move\t%0, $2" \
398 : "=r" (__res), "=r" (__vec) \ 398 : "=r" (__res), "=r" (__vec) \
399 : "1" (__vec), "r" (__a1) \ 399 : "1" (__vec), "r" (__a1) \
400 : __arc_clobbers, "$5","$6","$7"); \ 400 : __arc_clobbers, "$5", "$6", "$7"); \
401 (unsigned long) __res; \ 401 (unsigned long) __res; \
402}) 402})
403 403
404#define ARC_CALL2(dest,a1,a2) \ 404#define ARC_CALL2(dest, a1, a2) \
405({ long __res; \ 405({ long __res; \
406 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 406 register signed int __a1 __asm__("$4") = (int) (long) (a1); \
407 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 407 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
@@ -413,11 +413,11 @@ struct linux_smonblock {
413 "move\t%0, $2" \ 413 "move\t%0, $2" \
414 : "=r" (__res), "=r" (__vec) \ 414 : "=r" (__res), "=r" (__vec) \
415 : "1" (__vec), "r" (__a1), "r" (__a2) \ 415 : "1" (__vec), "r" (__a1), "r" (__a2) \
416 : __arc_clobbers, "$6","$7"); \ 416 : __arc_clobbers, "$6", "$7"); \
417 __res; \ 417 __res; \
418}) 418})
419 419
420#define ARC_CALL3(dest,a1,a2,a3) \ 420#define ARC_CALL3(dest, a1, a2, a3) \
421({ long __res; \ 421({ long __res; \
422 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 422 register signed int __a1 __asm__("$4") = (int) (long) (a1); \
423 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 423 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
@@ -434,7 +434,7 @@ struct linux_smonblock {
434 __res; \ 434 __res; \
435}) 435})
436 436
437#define ARC_CALL4(dest,a1,a2,a3,a4) \ 437#define ARC_CALL4(dest, a1, a2, a3, a4) \
438({ long __res; \ 438({ long __res; \
439 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 439 register signed int __a1 __asm__("$4") = (int) (long) (a1); \
440 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 440 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
@@ -453,7 +453,7 @@ struct linux_smonblock {
453 __res; \ 453 __res; \
454}) 454})
455 455
456#define ARC_CALL5(dest,a1,a2,a3,a4,a5) \ 456#define ARC_CALL5(dest, a1, a2, a3, a4, a5) \
457({ long __res; \ 457({ long __res; \
458 register signed int __a1 __asm__("$4") = (int) (long) (a1); \ 458 register signed int __a1 __asm__("$4") = (int) (long) (a1); \
459 register signed int __a2 __asm__("$5") = (int) (long) (a2); \ 459 register signed int __a2 __asm__("$5") = (int) (long) (a2); \
@@ -468,8 +468,8 @@ struct linux_smonblock {
468 "daddu\t$29, 32\n\t" \ 468 "daddu\t$29, 32\n\t" \
469 "move\t%0, $2" \ 469 "move\t%0, $2" \
470 : "=r" (__res), "=r" (__vec) \ 470 : "=r" (__res), "=r" (__vec) \
471 : "1" (__vec), \ 471 : "1" (__vec), \
472 "r" (__a1), "r" (__a2), "r" (__a3), "r" (__a4), \ 472 "r" (__a1), "r" (__a2), "r" (__a3), "r" (__a4), \
473 "r" (__a5) \ 473 "r" (__a5) \
474 : __arc_clobbers); \ 474 : __arc_clobbers); \
475 __res; \ 475 __res; \
@@ -488,7 +488,7 @@ struct linux_smonblock {
488 __res; \ 488 __res; \
489}) 489})
490 490
491#define ARC_CALL1(dest,a1) \ 491#define ARC_CALL1(dest, a1) \
492({ long __res; \ 492({ long __res; \
493 long __a1 = (long) (a1); \ 493 long __a1 = (long) (a1); \
494 long (*__vec)(long) = (void *) romvec->dest; \ 494 long (*__vec)(long) = (void *) romvec->dest; \
@@ -497,7 +497,7 @@ struct linux_smonblock {
497 __res; \ 497 __res; \
498}) 498})
499 499
500#define ARC_CALL2(dest,a1,a2) \ 500#define ARC_CALL2(dest, a1, a2) \
501({ long __res; \ 501({ long __res; \
502 long __a1 = (long) (a1); \ 502 long __a1 = (long) (a1); \
503 long __a2 = (long) (a2); \ 503 long __a2 = (long) (a2); \
@@ -507,7 +507,7 @@ struct linux_smonblock {
507 __res; \ 507 __res; \
508}) 508})
509 509
510#define ARC_CALL3(dest,a1,a2,a3) \ 510#define ARC_CALL3(dest, a1, a2, a3) \
511({ long __res; \ 511({ long __res; \
512 long __a1 = (long) (a1); \ 512 long __a1 = (long) (a1); \
513 long __a2 = (long) (a2); \ 513 long __a2 = (long) (a2); \
@@ -518,7 +518,7 @@ struct linux_smonblock {
518 __res; \ 518 __res; \
519}) 519})
520 520
521#define ARC_CALL4(dest,a1,a2,a3,a4) \ 521#define ARC_CALL4(dest, a1, a2, a3, a4) \
522({ long __res; \ 522({ long __res; \
523 long __a1 = (long) (a1); \ 523 long __a1 = (long) (a1); \
524 long __a2 = (long) (a2); \ 524 long __a2 = (long) (a2); \
@@ -530,7 +530,7 @@ struct linux_smonblock {
530 __res; \ 530 __res; \
531}) 531})
532 532
533#define ARC_CALL5(dest,a1,a2,a3,a4,a5) \ 533#define ARC_CALL5(dest, a1, a2, a3, a4, a5) \
534({ long __res; \ 534({ long __res; \
535 long __a1 = (long) (a1); \ 535 long __a1 = (long) (a1); \
536 long __a2 = (long) (a2); \ 536 long __a2 = (long) (a2); \
diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/include/asm-mips/sibyte/bcm1480_int.h
index c0d5206020fd..6109557c14e9 100644
--- a/include/asm-mips/sibyte/bcm1480_int.h
+++ b/include/asm-mips/sibyte/bcm1480_int.h
@@ -157,7 +157,7 @@
157 * Mask values for each interrupt 157 * Mask values for each interrupt
158 */ 158 */
159 159
160#define _BCM1480_INT_MASK(w,n) _SB_MAKEMASK(w,((n) & 0x3F)) 160#define _BCM1480_INT_MASK(w, n) _SB_MAKEMASK(w, ((n) & 0x3F))
161#define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F)) 161#define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F))
162#define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6) 162#define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6)
163 163
@@ -196,7 +196,7 @@
196#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH) 196#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH)
197#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW) 197#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW)
198#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH) 198#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH)
199#define M_BCM1480_INT_MBOX_ALL _BCM1480_INT_MASK(8,K_BCM1480_INT_MBOX_0_0) 199#define M_BCM1480_INT_MBOX_ALL _BCM1480_INT_MASK(8, K_BCM1480_INT_MBOX_0_0)
200#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0) 200#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0)
201#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1) 201#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1)
202#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2) 202#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2)
@@ -269,9 +269,9 @@
269 */ 269 */
270 270
271#define S_BCM1480_INT_HT_INTMSG 0 271#define S_BCM1480_INT_HT_INTMSG 0
272#define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3,S_BCM1480_INT_HT_INTMSG) 272#define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3, S_BCM1480_INT_HT_INTMSG)
273#define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTMSG) 273#define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTMSG)
274#define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTMSG,M_BCM1480_INT_HT_INTMSG) 274#define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTMSG, M_BCM1480_INT_HT_INTMSG)
275 275
276#define K_BCM1480_INT_HT_INTMSG_FIXED 0 276#define K_BCM1480_INT_HT_INTMSG_FIXED 0
277#define K_BCM1480_INT_HT_INTMSG_ARBITRATED 1 277#define K_BCM1480_INT_HT_INTMSG_ARBITRATED 1
@@ -291,14 +291,14 @@
291#define V_BCM1480_INT_HT_LOGICALDEST M_BCM1480_INT_HT_DESTMODE 291#define V_BCM1480_INT_HT_LOGICALDEST M_BCM1480_INT_HT_DESTMODE
292 292
293#define S_BCM1480_INT_HT_INTDEST 5 293#define S_BCM1480_INT_HT_INTDEST 5
294#define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8,S_BCM1480_INT_HT_INTDEST) 294#define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8, S_BCM1480_INT_HT_INTDEST)
295#define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTDEST) 295#define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTDEST)
296#define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_INTDEST,M_BCM1480_INT_HT_INTDEST) 296#define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTDEST, M_BCM1480_INT_HT_INTDEST)
297 297
298#define S_BCM1480_INT_HT_VECTOR 13 298#define S_BCM1480_INT_HT_VECTOR 13
299#define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8,S_BCM1480_INT_HT_VECTOR) 299#define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8, S_BCM1480_INT_HT_VECTOR)
300#define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x,S_BCM1480_INT_HT_VECTOR) 300#define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_VECTOR)
301#define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x,S_BCM1480_INT_HT_VECTOR,M_BCM1480_INT_HT_VECTOR) 301#define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_VECTOR, M_BCM1480_INT_HT_VECTOR)
302 302
303/* 303/*
304 * Vector prefix (Table 4-7) 304 * Vector prefix (Table 4-7)
diff --git a/include/asm-mips/sibyte/bcm1480_l2c.h b/include/asm-mips/sibyte/bcm1480_l2c.h
index 886b099565e6..fd75817f7ac4 100644
--- a/include/asm-mips/sibyte/bcm1480_l2c.h
+++ b/include/asm-mips/sibyte/bcm1480_l2c.h
@@ -40,22 +40,22 @@
40 */ 40 */
41 41
42#define S_BCM1480_L2C_MGMT_INDEX 5 42#define S_BCM1480_L2C_MGMT_INDEX 5
43#define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_MGMT_INDEX) 43#define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_MGMT_INDEX)
44#define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_INDEX) 44#define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX)
45#define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_INDEX,M_BCM1480_L2C_MGMT_INDEX) 45#define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C_MGMT_INDEX)
46 46
47#define S_BCM1480_L2C_MGMT_WAY 17 47#define S_BCM1480_L2C_MGMT_WAY 17
48#define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_MGMT_WAY) 48#define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_MGMT_WAY)
49#define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_WAY) 49#define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY)
50#define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_WAY,M_BCM1480_L2C_MGMT_WAY) 50#define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_MGMT_WAY)
51 51
52#define M_BCM1480_L2C_MGMT_DIRTY _SB_MAKEMASK1(20) 52#define M_BCM1480_L2C_MGMT_DIRTY _SB_MAKEMASK1(20)
53#define M_BCM1480_L2C_MGMT_VALID _SB_MAKEMASK1(21) 53#define M_BCM1480_L2C_MGMT_VALID _SB_MAKEMASK1(21)
54 54
55#define S_BCM1480_L2C_MGMT_ECC_DIAG 22 55#define S_BCM1480_L2C_MGMT_ECC_DIAG 22
56#define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_BCM1480_L2C_MGMT_ECC_DIAG) 56#define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2, S_BCM1480_L2C_MGMT_ECC_DIAG)
57#define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG) 57#define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG)
58#define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_MGMT_ECC_DIAG,M_BCM1480_L2C_MGMT_ECC_DIAG) 58#define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_L2C_MGMT_ECC_DIAG)
59 59
60#define A_BCM1480_L2C_MGMT_TAG_BASE 0x00D0000000 60#define A_BCM1480_L2C_MGMT_TAG_BASE 0x00D0000000
61 61
@@ -68,36 +68,36 @@
68 */ 68 */
69 69
70#define S_BCM1480_L2C_TAG_MBZ 0 70#define S_BCM1480_L2C_TAG_MBZ 0
71#define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5,S_BCM1480_L2C_TAG_MBZ) 71#define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5, S_BCM1480_L2C_TAG_MBZ)
72 72
73#define S_BCM1480_L2C_TAG_INDEX 5 73#define S_BCM1480_L2C_TAG_INDEX 5
74#define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12,S_BCM1480_L2C_TAG_INDEX) 74#define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_TAG_INDEX)
75#define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_INDEX) 75#define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX)
76#define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_INDEX,M_BCM1480_L2C_TAG_INDEX) 76#define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_TAG_INDEX)
77 77
78/* Note that index bit 16 is also tag bit 40 */ 78/* Note that index bit 16 is also tag bit 40 */
79#define S_BCM1480_L2C_TAG_TAG 17 79#define S_BCM1480_L2C_TAG_TAG 17
80#define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23,S_BCM1480_L2C_TAG_TAG) 80#define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23, S_BCM1480_L2C_TAG_TAG)
81#define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_TAG) 81#define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG)
82#define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_TAG,M_BCM1480_L2C_TAG_TAG) 82#define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TAG_TAG)
83 83
84#define S_BCM1480_L2C_TAG_ECC 40 84#define S_BCM1480_L2C_TAG_ECC 40
85#define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6,S_BCM1480_L2C_TAG_ECC) 85#define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6, S_BCM1480_L2C_TAG_ECC)
86#define V_BCM1480_L2C_TAG_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_ECC) 86#define V_BCM1480_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_ECC)
87#define G_BCM1480_L2C_TAG_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_ECC,M_BCM1480_L2C_TAG_ECC) 87#define G_BCM1480_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_ECC, M_BCM1480_L2C_TAG_ECC)
88 88
89#define S_BCM1480_L2C_TAG_WAY 46 89#define S_BCM1480_L2C_TAG_WAY 46
90#define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3,S_BCM1480_L2C_TAG_WAY) 90#define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_TAG_WAY)
91#define V_BCM1480_L2C_TAG_WAY(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_TAG_WAY) 91#define V_BCM1480_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_WAY)
92#define G_BCM1480_L2C_TAG_WAY(x) _SB_GETVALUE(x,S_BCM1480_L2C_TAG_WAY,M_BCM1480_L2C_TAG_WAY) 92#define G_BCM1480_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_WAY, M_BCM1480_L2C_TAG_WAY)
93 93
94#define M_BCM1480_L2C_TAG_DIRTY _SB_MAKEMASK1(49) 94#define M_BCM1480_L2C_TAG_DIRTY _SB_MAKEMASK1(49)
95#define M_BCM1480_L2C_TAG_VALID _SB_MAKEMASK1(50) 95#define M_BCM1480_L2C_TAG_VALID _SB_MAKEMASK1(50)
96 96
97#define S_BCM1480_L2C_DATA_ECC 51 97#define S_BCM1480_L2C_DATA_ECC 51
98#define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10,S_BCM1480_L2C_DATA_ECC) 98#define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10, S_BCM1480_L2C_DATA_ECC)
99#define V_BCM1480_L2C_DATA_ECC(x) _SB_MAKEVALUE(x,S_BCM1480_L2C_DATA_ECC) 99#define V_BCM1480_L2C_DATA_ECC(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_DATA_ECC)
100#define G_BCM1480_L2C_DATA_ECC(x) _SB_GETVALUE(x,S_BCM1480_L2C_DATA_ECC,M_BCM1480_L2C_DATA_ECC) 100#define G_BCM1480_L2C_DATA_ECC(x) _SB_GETVALUE(x, S_BCM1480_L2C_DATA_ECC, M_BCM1480_L2C_DATA_ECC)
101 101
102 102
103/* 103/*
@@ -105,24 +105,24 @@
105 */ 105 */
106 106
107#define S_BCM1480_L2C_MISC0_WAY_REMOTE 0 107#define S_BCM1480_L2C_MISC0_WAY_REMOTE 0
108#define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_REMOTE) 108#define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK(8, S_BCM1480_L2C_MISC0_WAY_REMOTE)
109#define G_BCM1480_L2C_MISC0_WAY_REMOTE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_REMOTE,M_BCM1480_L2C_MISC0_WAY_REMOTE) 109#define G_BCM1480_L2C_MISC0_WAY_REMOTE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_REMOTE, M_BCM1480_L2C_MISC0_WAY_REMOTE)
110 110
111#define S_BCM1480_L2C_MISC0_WAY_LOCAL 8 111#define S_BCM1480_L2C_MISC0_WAY_LOCAL 8
112#define M_BCM1480_L2C_MISC0_WAY_LOCAL _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_LOCAL) 112#define M_BCM1480_L2C_MISC0_WAY_LOCAL _SB_MAKEMASK(8, S_BCM1480_L2C_MISC0_WAY_LOCAL)
113#define G_BCM1480_L2C_MISC0_WAY_LOCAL(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_LOCAL,M_BCM1480_L2C_MISC0_WAY_LOCAL) 113#define G_BCM1480_L2C_MISC0_WAY_LOCAL(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_LOCAL, M_BCM1480_L2C_MISC0_WAY_LOCAL)
114 114
115#define S_BCM1480_L2C_MISC0_WAY_ENABLE 16 115#define S_BCM1480_L2C_MISC0_WAY_ENABLE 16
116#define M_BCM1480_L2C_MISC0_WAY_ENABLE _SB_MAKEMASK(8,S_BCM1480_L2C_MISC0_WAY_ENABLE) 116#define M_BCM1480_L2C_MISC0_WAY_ENABLE _SB_MAKEMASK(8, S_BCM1480_L2C_MISC0_WAY_ENABLE)
117#define G_BCM1480_L2C_MISC0_WAY_ENABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_WAY_ENABLE,M_BCM1480_L2C_MISC0_WAY_ENABLE) 117#define G_BCM1480_L2C_MISC0_WAY_ENABLE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_WAY_ENABLE, M_BCM1480_L2C_MISC0_WAY_ENABLE)
118 118
119#define S_BCM1480_L2C_MISC0_CACHE_DISABLE 24 119#define S_BCM1480_L2C_MISC0_CACHE_DISABLE 24
120#define M_BCM1480_L2C_MISC0_CACHE_DISABLE _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_DISABLE) 120#define M_BCM1480_L2C_MISC0_CACHE_DISABLE _SB_MAKEMASK(2, S_BCM1480_L2C_MISC0_CACHE_DISABLE)
121#define G_BCM1480_L2C_MISC0_CACHE_DISABLE(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_DISABLE,M_BCM1480_L2C_MISC0_CACHE_DISABLE) 121#define G_BCM1480_L2C_MISC0_CACHE_DISABLE(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_CACHE_DISABLE, M_BCM1480_L2C_MISC0_CACHE_DISABLE)
122 122
123#define S_BCM1480_L2C_MISC0_CACHE_QUAD 26 123#define S_BCM1480_L2C_MISC0_CACHE_QUAD 26
124#define M_BCM1480_L2C_MISC0_CACHE_QUAD _SB_MAKEMASK(2,S_BCM1480_L2C_MISC0_CACHE_QUAD) 124#define M_BCM1480_L2C_MISC0_CACHE_QUAD _SB_MAKEMASK(2, S_BCM1480_L2C_MISC0_CACHE_QUAD)
125#define G_BCM1480_L2C_MISC0_CACHE_QUAD(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC0_CACHE_QUAD,M_BCM1480_L2C_MISC0_CACHE_QUAD) 125#define G_BCM1480_L2C_MISC0_CACHE_QUAD(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC0_CACHE_QUAD, M_BCM1480_L2C_MISC0_CACHE_QUAD)
126 126
127#define S_BCM1480_L2C_MISC0_MC_PRIORITY 30 127#define S_BCM1480_L2C_MISC0_MC_PRIORITY 30
128#define M_BCM1480_L2C_MISC0_MC_PRIORITY _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_MC_PRIORITY) 128#define M_BCM1480_L2C_MISC0_MC_PRIORITY _SB_MAKEMASK1(S_BCM1480_L2C_MISC0_MC_PRIORITY)
@@ -136,24 +136,24 @@
136 */ 136 */
137 137
138#define S_BCM1480_L2C_MISC1_WAY_AGENT_0 0 138#define S_BCM1480_L2C_MISC1_WAY_AGENT_0 0
139#define M_BCM1480_L2C_MISC1_WAY_AGENT_0 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_0) 139#define M_BCM1480_L2C_MISC1_WAY_AGENT_0 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC1_WAY_AGENT_0)
140#define G_BCM1480_L2C_MISC1_WAY_AGENT_0(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_0,M_BCM1480_L2C_MISC1_WAY_AGENT_0) 140#define G_BCM1480_L2C_MISC1_WAY_AGENT_0(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_0, M_BCM1480_L2C_MISC1_WAY_AGENT_0)
141 141
142#define S_BCM1480_L2C_MISC1_WAY_AGENT_1 8 142#define S_BCM1480_L2C_MISC1_WAY_AGENT_1 8
143#define M_BCM1480_L2C_MISC1_WAY_AGENT_1 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_1) 143#define M_BCM1480_L2C_MISC1_WAY_AGENT_1 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC1_WAY_AGENT_1)
144#define G_BCM1480_L2C_MISC1_WAY_AGENT_1(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_1,M_BCM1480_L2C_MISC1_WAY_AGENT_1) 144#define G_BCM1480_L2C_MISC1_WAY_AGENT_1(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_1, M_BCM1480_L2C_MISC1_WAY_AGENT_1)
145 145
146#define S_BCM1480_L2C_MISC1_WAY_AGENT_2 16 146#define S_BCM1480_L2C_MISC1_WAY_AGENT_2 16
147#define M_BCM1480_L2C_MISC1_WAY_AGENT_2 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_2) 147#define M_BCM1480_L2C_MISC1_WAY_AGENT_2 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC1_WAY_AGENT_2)
148#define G_BCM1480_L2C_MISC1_WAY_AGENT_2(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_2,M_BCM1480_L2C_MISC1_WAY_AGENT_2) 148#define G_BCM1480_L2C_MISC1_WAY_AGENT_2(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_2, M_BCM1480_L2C_MISC1_WAY_AGENT_2)
149 149
150#define S_BCM1480_L2C_MISC1_WAY_AGENT_3 24 150#define S_BCM1480_L2C_MISC1_WAY_AGENT_3 24
151#define M_BCM1480_L2C_MISC1_WAY_AGENT_3 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_3) 151#define M_BCM1480_L2C_MISC1_WAY_AGENT_3 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC1_WAY_AGENT_3)
152#define G_BCM1480_L2C_MISC1_WAY_AGENT_3(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_3,M_BCM1480_L2C_MISC1_WAY_AGENT_3) 152#define G_BCM1480_L2C_MISC1_WAY_AGENT_3(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_3, M_BCM1480_L2C_MISC1_WAY_AGENT_3)
153 153
154#define S_BCM1480_L2C_MISC1_WAY_AGENT_4 32 154#define S_BCM1480_L2C_MISC1_WAY_AGENT_4 32
155#define M_BCM1480_L2C_MISC1_WAY_AGENT_4 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC1_WAY_AGENT_4) 155#define M_BCM1480_L2C_MISC1_WAY_AGENT_4 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC1_WAY_AGENT_4)
156#define G_BCM1480_L2C_MISC1_WAY_AGENT_4(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC1_WAY_AGENT_4,M_BCM1480_L2C_MISC1_WAY_AGENT_4) 156#define G_BCM1480_L2C_MISC1_WAY_AGENT_4(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC1_WAY_AGENT_4, M_BCM1480_L2C_MISC1_WAY_AGENT_4)
157 157
158 158
159/* 159/*
@@ -161,16 +161,16 @@
161 */ 161 */
162 162
163#define S_BCM1480_L2C_MISC2_WAY_AGENT_8 0 163#define S_BCM1480_L2C_MISC2_WAY_AGENT_8 0
164#define M_BCM1480_L2C_MISC2_WAY_AGENT_8 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_8) 164#define M_BCM1480_L2C_MISC2_WAY_AGENT_8 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC2_WAY_AGENT_8)
165#define G_BCM1480_L2C_MISC2_WAY_AGENT_8(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_8,M_BCM1480_L2C_MISC2_WAY_AGENT_8) 165#define G_BCM1480_L2C_MISC2_WAY_AGENT_8(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_8, M_BCM1480_L2C_MISC2_WAY_AGENT_8)
166 166
167#define S_BCM1480_L2C_MISC2_WAY_AGENT_9 8 167#define S_BCM1480_L2C_MISC2_WAY_AGENT_9 8
168#define M_BCM1480_L2C_MISC2_WAY_AGENT_9 _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_9) 168#define M_BCM1480_L2C_MISC2_WAY_AGENT_9 _SB_MAKEMASK(8, S_BCM1480_L2C_MISC2_WAY_AGENT_9)
169#define G_BCM1480_L2C_MISC2_WAY_AGENT_9(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_9,M_BCM1480_L2C_MISC2_WAY_AGENT_9) 169#define G_BCM1480_L2C_MISC2_WAY_AGENT_9(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_9, M_BCM1480_L2C_MISC2_WAY_AGENT_9)
170 170
171#define S_BCM1480_L2C_MISC2_WAY_AGENT_A 16 171#define S_BCM1480_L2C_MISC2_WAY_AGENT_A 16
172#define M_BCM1480_L2C_MISC2_WAY_AGENT_A _SB_MAKEMASK(8,S_BCM1480_L2C_MISC2_WAY_AGENT_A) 172#define M_BCM1480_L2C_MISC2_WAY_AGENT_A _SB_MAKEMASK(8, S_BCM1480_L2C_MISC2_WAY_AGENT_A)
173#define G_BCM1480_L2C_MISC2_WAY_AGENT_A(x) _SB_GETVALUE(x,S_BCM1480_L2C_MISC2_WAY_AGENT_A,M_BCM1480_L2C_MISC2_WAY_AGENT_A) 173#define G_BCM1480_L2C_MISC2_WAY_AGENT_A(x) _SB_GETVALUE(x, S_BCM1480_L2C_MISC2_WAY_AGENT_A, M_BCM1480_L2C_MISC2_WAY_AGENT_A)
174 174
175 175
176#endif /* _BCM1480_L2C_H */ 176#endif /* _BCM1480_L2C_H */
diff --git a/include/asm-mips/sibyte/bcm1480_mc.h b/include/asm-mips/sibyte/bcm1480_mc.h
index a6a437451da4..f26a41a82b59 100644
--- a/include/asm-mips/sibyte/bcm1480_mc.h
+++ b/include/asm-mips/sibyte/bcm1480_mc.h
@@ -40,27 +40,27 @@
40 */ 40 */
41 41
42#define S_BCM1480_MC_INTLV0 0 42#define S_BCM1480_MC_INTLV0 0
43#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0) 43#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV0)
44#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0) 44#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0)
45#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0) 45#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0)
46#define V_BCM1480_MC_INTLV0_DEFAULT V_BCM1480_MC_INTLV0(0) 46#define V_BCM1480_MC_INTLV0_DEFAULT V_BCM1480_MC_INTLV0(0)
47 47
48#define S_BCM1480_MC_INTLV1 8 48#define S_BCM1480_MC_INTLV1 8
49#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1) 49#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV1)
50#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1) 50#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1)
51#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1) 51#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1)
52#define V_BCM1480_MC_INTLV1_DEFAULT V_BCM1480_MC_INTLV1(0) 52#define V_BCM1480_MC_INTLV1_DEFAULT V_BCM1480_MC_INTLV1(0)
53 53
54#define S_BCM1480_MC_INTLV2 16 54#define S_BCM1480_MC_INTLV2 16
55#define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV2) 55#define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV2)
56#define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV2) 56#define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2)
57#define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV2,M_BCM1480_MC_INTLV2) 57#define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV2)
58#define V_BCM1480_MC_INTLV2_DEFAULT V_BCM1480_MC_INTLV2(0) 58#define V_BCM1480_MC_INTLV2_DEFAULT V_BCM1480_MC_INTLV2(0)
59 59
60#define S_BCM1480_MC_CS_MODE 32 60#define S_BCM1480_MC_CS_MODE 32
61#define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8,S_BCM1480_MC_CS_MODE) 61#define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8, S_BCM1480_MC_CS_MODE)
62#define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS_MODE) 62#define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE)
63#define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_CS_MODE,M_BCM1480_MC_CS_MODE) 63#define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_MODE)
64#define V_BCM1480_MC_CS_MODE_DEFAULT V_BCM1480_MC_CS_MODE(0) 64#define V_BCM1480_MC_CS_MODE_DEFAULT V_BCM1480_MC_CS_MODE(0)
65 65
66#define V_BCM1480_MC_CONFIG_DEFAULT (V_BCM1480_MC_INTLV0_DEFAULT | \ 66#define V_BCM1480_MC_CONFIG_DEFAULT (V_BCM1480_MC_INTLV0_DEFAULT | \
@@ -81,131 +81,131 @@
81 */ 81 */
82 82
83#define S_BCM1480_MC_CS0_START 0 83#define S_BCM1480_MC_CS0_START 0
84#define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12,S_BCM1480_MC_CS0_START) 84#define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12, S_BCM1480_MC_CS0_START)
85#define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_START) 85#define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START)
86#define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_START,M_BCM1480_MC_CS0_START) 86#define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS0_START)
87 87
88#define S_BCM1480_MC_CS1_START 16 88#define S_BCM1480_MC_CS1_START 16
89#define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12,S_BCM1480_MC_CS1_START) 89#define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12, S_BCM1480_MC_CS1_START)
90#define V_BCM1480_MC_CS1_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_START) 90#define V_BCM1480_MC_CS1_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS1_START)
91#define G_BCM1480_MC_CS1_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_START,M_BCM1480_MC_CS1_START) 91#define G_BCM1480_MC_CS1_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS1_START, M_BCM1480_MC_CS1_START)
92 92
93#define S_BCM1480_MC_CS2_START 32 93#define S_BCM1480_MC_CS2_START 32
94#define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12,S_BCM1480_MC_CS2_START) 94#define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12, S_BCM1480_MC_CS2_START)
95#define V_BCM1480_MC_CS2_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_START) 95#define V_BCM1480_MC_CS2_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS2_START)
96#define G_BCM1480_MC_CS2_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_START,M_BCM1480_MC_CS2_START) 96#define G_BCM1480_MC_CS2_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS2_START, M_BCM1480_MC_CS2_START)
97 97
98#define S_BCM1480_MC_CS3_START 48 98#define S_BCM1480_MC_CS3_START 48
99#define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12,S_BCM1480_MC_CS3_START) 99#define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12, S_BCM1480_MC_CS3_START)
100#define V_BCM1480_MC_CS3_START(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_START) 100#define V_BCM1480_MC_CS3_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS3_START)
101#define G_BCM1480_MC_CS3_START(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_START,M_BCM1480_MC_CS3_START) 101#define G_BCM1480_MC_CS3_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS3_START, M_BCM1480_MC_CS3_START)
102 102
103/* 103/*
104 * Chip Select End Address Register (Table 83) 104 * Chip Select End Address Register (Table 83)
105 */ 105 */
106 106
107#define S_BCM1480_MC_CS0_END 0 107#define S_BCM1480_MC_CS0_END 0
108#define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12,S_BCM1480_MC_CS0_END) 108#define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12, S_BCM1480_MC_CS0_END)
109#define V_BCM1480_MC_CS0_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0_END) 109#define V_BCM1480_MC_CS0_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_END)
110#define G_BCM1480_MC_CS0_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0_END,M_BCM1480_MC_CS0_END) 110#define G_BCM1480_MC_CS0_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_END, M_BCM1480_MC_CS0_END)
111 111
112#define S_BCM1480_MC_CS1_END 16 112#define S_BCM1480_MC_CS1_END 16
113#define M_BCM1480_MC_CS1_END _SB_MAKEMASK(12,S_BCM1480_MC_CS1_END) 113#define M_BCM1480_MC_CS1_END _SB_MAKEMASK(12, S_BCM1480_MC_CS1_END)
114#define V_BCM1480_MC_CS1_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS1_END) 114#define V_BCM1480_MC_CS1_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS1_END)
115#define G_BCM1480_MC_CS1_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS1_END,M_BCM1480_MC_CS1_END) 115#define G_BCM1480_MC_CS1_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS1_END, M_BCM1480_MC_CS1_END)
116 116
117#define S_BCM1480_MC_CS2_END 32 117#define S_BCM1480_MC_CS2_END 32
118#define M_BCM1480_MC_CS2_END _SB_MAKEMASK(12,S_BCM1480_MC_CS2_END) 118#define M_BCM1480_MC_CS2_END _SB_MAKEMASK(12, S_BCM1480_MC_CS2_END)
119#define V_BCM1480_MC_CS2_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS2_END) 119#define V_BCM1480_MC_CS2_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS2_END)
120#define G_BCM1480_MC_CS2_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS2_END,M_BCM1480_MC_CS2_END) 120#define G_BCM1480_MC_CS2_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS2_END, M_BCM1480_MC_CS2_END)
121 121
122#define S_BCM1480_MC_CS3_END 48 122#define S_BCM1480_MC_CS3_END 48
123#define M_BCM1480_MC_CS3_END _SB_MAKEMASK(12,S_BCM1480_MC_CS3_END) 123#define M_BCM1480_MC_CS3_END _SB_MAKEMASK(12, S_BCM1480_MC_CS3_END)
124#define V_BCM1480_MC_CS3_END(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS3_END) 124#define V_BCM1480_MC_CS3_END(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS3_END)
125#define G_BCM1480_MC_CS3_END(x) _SB_GETVALUE(x,S_BCM1480_MC_CS3_END,M_BCM1480_MC_CS3_END) 125#define G_BCM1480_MC_CS3_END(x) _SB_GETVALUE(x, S_BCM1480_MC_CS3_END, M_BCM1480_MC_CS3_END)
126 126
127/* 127/*
128 * Row Address Bit Select Register 0 (Table 84) 128 * Row Address Bit Select Register 0 (Table 84)
129 */ 129 */
130 130
131#define S_BCM1480_MC_ROW00 0 131#define S_BCM1480_MC_ROW00 0
132#define M_BCM1480_MC_ROW00 _SB_MAKEMASK(6,S_BCM1480_MC_ROW00) 132#define M_BCM1480_MC_ROW00 _SB_MAKEMASK(6, S_BCM1480_MC_ROW00)
133#define V_BCM1480_MC_ROW00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW00) 133#define V_BCM1480_MC_ROW00(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW00)
134#define G_BCM1480_MC_ROW00(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW00,M_BCM1480_MC_ROW00) 134#define G_BCM1480_MC_ROW00(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW00, M_BCM1480_MC_ROW00)
135 135
136#define S_BCM1480_MC_ROW01 8 136#define S_BCM1480_MC_ROW01 8
137#define M_BCM1480_MC_ROW01 _SB_MAKEMASK(6,S_BCM1480_MC_ROW01) 137#define M_BCM1480_MC_ROW01 _SB_MAKEMASK(6, S_BCM1480_MC_ROW01)
138#define V_BCM1480_MC_ROW01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW01) 138#define V_BCM1480_MC_ROW01(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW01)
139#define G_BCM1480_MC_ROW01(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW01,M_BCM1480_MC_ROW01) 139#define G_BCM1480_MC_ROW01(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW01, M_BCM1480_MC_ROW01)
140 140
141#define S_BCM1480_MC_ROW02 16 141#define S_BCM1480_MC_ROW02 16
142#define M_BCM1480_MC_ROW02 _SB_MAKEMASK(6,S_BCM1480_MC_ROW02) 142#define M_BCM1480_MC_ROW02 _SB_MAKEMASK(6, S_BCM1480_MC_ROW02)
143#define V_BCM1480_MC_ROW02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW02) 143#define V_BCM1480_MC_ROW02(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW02)
144#define G_BCM1480_MC_ROW02(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW02,M_BCM1480_MC_ROW02) 144#define G_BCM1480_MC_ROW02(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW02, M_BCM1480_MC_ROW02)
145 145
146#define S_BCM1480_MC_ROW03 24 146#define S_BCM1480_MC_ROW03 24
147#define M_BCM1480_MC_ROW03 _SB_MAKEMASK(6,S_BCM1480_MC_ROW03) 147#define M_BCM1480_MC_ROW03 _SB_MAKEMASK(6, S_BCM1480_MC_ROW03)
148#define V_BCM1480_MC_ROW03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW03) 148#define V_BCM1480_MC_ROW03(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW03)
149#define G_BCM1480_MC_ROW03(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW03,M_BCM1480_MC_ROW03) 149#define G_BCM1480_MC_ROW03(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW03, M_BCM1480_MC_ROW03)
150 150
151#define S_BCM1480_MC_ROW04 32 151#define S_BCM1480_MC_ROW04 32
152#define M_BCM1480_MC_ROW04 _SB_MAKEMASK(6,S_BCM1480_MC_ROW04) 152#define M_BCM1480_MC_ROW04 _SB_MAKEMASK(6, S_BCM1480_MC_ROW04)
153#define V_BCM1480_MC_ROW04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW04) 153#define V_BCM1480_MC_ROW04(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW04)
154#define G_BCM1480_MC_ROW04(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW04,M_BCM1480_MC_ROW04) 154#define G_BCM1480_MC_ROW04(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW04, M_BCM1480_MC_ROW04)
155 155
156#define S_BCM1480_MC_ROW05 40 156#define S_BCM1480_MC_ROW05 40
157#define M_BCM1480_MC_ROW05 _SB_MAKEMASK(6,S_BCM1480_MC_ROW05) 157#define M_BCM1480_MC_ROW05 _SB_MAKEMASK(6, S_BCM1480_MC_ROW05)
158#define V_BCM1480_MC_ROW05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW05) 158#define V_BCM1480_MC_ROW05(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW05)
159#define G_BCM1480_MC_ROW05(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW05,M_BCM1480_MC_ROW05) 159#define G_BCM1480_MC_ROW05(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW05, M_BCM1480_MC_ROW05)
160 160
161#define S_BCM1480_MC_ROW06 48 161#define S_BCM1480_MC_ROW06 48
162#define M_BCM1480_MC_ROW06 _SB_MAKEMASK(6,S_BCM1480_MC_ROW06) 162#define M_BCM1480_MC_ROW06 _SB_MAKEMASK(6, S_BCM1480_MC_ROW06)
163#define V_BCM1480_MC_ROW06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW06) 163#define V_BCM1480_MC_ROW06(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW06)
164#define G_BCM1480_MC_ROW06(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW06,M_BCM1480_MC_ROW06) 164#define G_BCM1480_MC_ROW06(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW06, M_BCM1480_MC_ROW06)
165 165
166#define S_BCM1480_MC_ROW07 56 166#define S_BCM1480_MC_ROW07 56
167#define M_BCM1480_MC_ROW07 _SB_MAKEMASK(6,S_BCM1480_MC_ROW07) 167#define M_BCM1480_MC_ROW07 _SB_MAKEMASK(6, S_BCM1480_MC_ROW07)
168#define V_BCM1480_MC_ROW07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW07) 168#define V_BCM1480_MC_ROW07(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW07)
169#define G_BCM1480_MC_ROW07(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW07,M_BCM1480_MC_ROW07) 169#define G_BCM1480_MC_ROW07(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW07, M_BCM1480_MC_ROW07)
170 170
171/* 171/*
172 * Row Address Bit Select Register 1 (Table 85) 172 * Row Address Bit Select Register 1 (Table 85)
173 */ 173 */
174 174
175#define S_BCM1480_MC_ROW08 0 175#define S_BCM1480_MC_ROW08 0
176#define M_BCM1480_MC_ROW08 _SB_MAKEMASK(6,S_BCM1480_MC_ROW08) 176#define M_BCM1480_MC_ROW08 _SB_MAKEMASK(6, S_BCM1480_MC_ROW08)
177#define V_BCM1480_MC_ROW08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW08) 177#define V_BCM1480_MC_ROW08(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW08)
178#define G_BCM1480_MC_ROW08(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW08,M_BCM1480_MC_ROW08) 178#define G_BCM1480_MC_ROW08(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW08, M_BCM1480_MC_ROW08)
179 179
180#define S_BCM1480_MC_ROW09 8 180#define S_BCM1480_MC_ROW09 8
181#define M_BCM1480_MC_ROW09 _SB_MAKEMASK(6,S_BCM1480_MC_ROW09) 181#define M_BCM1480_MC_ROW09 _SB_MAKEMASK(6, S_BCM1480_MC_ROW09)
182#define V_BCM1480_MC_ROW09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW09) 182#define V_BCM1480_MC_ROW09(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW09)
183#define G_BCM1480_MC_ROW09(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW09,M_BCM1480_MC_ROW09) 183#define G_BCM1480_MC_ROW09(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW09, M_BCM1480_MC_ROW09)
184 184
185#define S_BCM1480_MC_ROW10 16 185#define S_BCM1480_MC_ROW10 16
186#define M_BCM1480_MC_ROW10 _SB_MAKEMASK(6,S_BCM1480_MC_ROW10) 186#define M_BCM1480_MC_ROW10 _SB_MAKEMASK(6, S_BCM1480_MC_ROW10)
187#define V_BCM1480_MC_ROW10(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW10) 187#define V_BCM1480_MC_ROW10(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW10)
188#define G_BCM1480_MC_ROW10(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW10,M_BCM1480_MC_ROW10) 188#define G_BCM1480_MC_ROW10(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW10, M_BCM1480_MC_ROW10)
189 189
190#define S_BCM1480_MC_ROW11 24 190#define S_BCM1480_MC_ROW11 24
191#define M_BCM1480_MC_ROW11 _SB_MAKEMASK(6,S_BCM1480_MC_ROW11) 191#define M_BCM1480_MC_ROW11 _SB_MAKEMASK(6, S_BCM1480_MC_ROW11)
192#define V_BCM1480_MC_ROW11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW11) 192#define V_BCM1480_MC_ROW11(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW11)
193#define G_BCM1480_MC_ROW11(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW11,M_BCM1480_MC_ROW11) 193#define G_BCM1480_MC_ROW11(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW11, M_BCM1480_MC_ROW11)
194 194
195#define S_BCM1480_MC_ROW12 32 195#define S_BCM1480_MC_ROW12 32
196#define M_BCM1480_MC_ROW12 _SB_MAKEMASK(6,S_BCM1480_MC_ROW12) 196#define M_BCM1480_MC_ROW12 _SB_MAKEMASK(6, S_BCM1480_MC_ROW12)
197#define V_BCM1480_MC_ROW12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW12) 197#define V_BCM1480_MC_ROW12(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW12)
198#define G_BCM1480_MC_ROW12(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW12,M_BCM1480_MC_ROW12) 198#define G_BCM1480_MC_ROW12(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW12, M_BCM1480_MC_ROW12)
199 199
200#define S_BCM1480_MC_ROW13 40 200#define S_BCM1480_MC_ROW13 40
201#define M_BCM1480_MC_ROW13 _SB_MAKEMASK(6,S_BCM1480_MC_ROW13) 201#define M_BCM1480_MC_ROW13 _SB_MAKEMASK(6, S_BCM1480_MC_ROW13)
202#define V_BCM1480_MC_ROW13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW13) 202#define V_BCM1480_MC_ROW13(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW13)
203#define G_BCM1480_MC_ROW13(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW13,M_BCM1480_MC_ROW13) 203#define G_BCM1480_MC_ROW13(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW13, M_BCM1480_MC_ROW13)
204 204
205#define S_BCM1480_MC_ROW14 48 205#define S_BCM1480_MC_ROW14 48
206#define M_BCM1480_MC_ROW14 _SB_MAKEMASK(6,S_BCM1480_MC_ROW14) 206#define M_BCM1480_MC_ROW14 _SB_MAKEMASK(6, S_BCM1480_MC_ROW14)
207#define V_BCM1480_MC_ROW14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ROW14) 207#define V_BCM1480_MC_ROW14(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ROW14)
208#define G_BCM1480_MC_ROW14(x) _SB_GETVALUE(x,S_BCM1480_MC_ROW14,M_BCM1480_MC_ROW14) 208#define G_BCM1480_MC_ROW14(x) _SB_GETVALUE(x, S_BCM1480_MC_ROW14, M_BCM1480_MC_ROW14)
209 209
210#define K_BCM1480_MC_ROWX_BIT_SPACING 8 210#define K_BCM1480_MC_ROWX_BIT_SPACING 8
211 211
@@ -214,80 +214,80 @@
214 */ 214 */
215 215
216#define S_BCM1480_MC_COL00 0 216#define S_BCM1480_MC_COL00 0
217#define M_BCM1480_MC_COL00 _SB_MAKEMASK(6,S_BCM1480_MC_COL00) 217#define M_BCM1480_MC_COL00 _SB_MAKEMASK(6, S_BCM1480_MC_COL00)
218#define V_BCM1480_MC_COL00(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL00) 218#define V_BCM1480_MC_COL00(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL00)
219#define G_BCM1480_MC_COL00(x) _SB_GETVALUE(x,S_BCM1480_MC_COL00,M_BCM1480_MC_COL00) 219#define G_BCM1480_MC_COL00(x) _SB_GETVALUE(x, S_BCM1480_MC_COL00, M_BCM1480_MC_COL00)
220 220
221#define S_BCM1480_MC_COL01 8 221#define S_BCM1480_MC_COL01 8
222#define M_BCM1480_MC_COL01 _SB_MAKEMASK(6,S_BCM1480_MC_COL01) 222#define M_BCM1480_MC_COL01 _SB_MAKEMASK(6, S_BCM1480_MC_COL01)
223#define V_BCM1480_MC_COL01(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL01) 223#define V_BCM1480_MC_COL01(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL01)
224#define G_BCM1480_MC_COL01(x) _SB_GETVALUE(x,S_BCM1480_MC_COL01,M_BCM1480_MC_COL01) 224#define G_BCM1480_MC_COL01(x) _SB_GETVALUE(x, S_BCM1480_MC_COL01, M_BCM1480_MC_COL01)
225 225
226#define S_BCM1480_MC_COL02 16 226#define S_BCM1480_MC_COL02 16
227#define M_BCM1480_MC_COL02 _SB_MAKEMASK(6,S_BCM1480_MC_COL02) 227#define M_BCM1480_MC_COL02 _SB_MAKEMASK(6, S_BCM1480_MC_COL02)
228#define V_BCM1480_MC_COL02(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL02) 228#define V_BCM1480_MC_COL02(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL02)
229#define G_BCM1480_MC_COL02(x) _SB_GETVALUE(x,S_BCM1480_MC_COL02,M_BCM1480_MC_COL02) 229#define G_BCM1480_MC_COL02(x) _SB_GETVALUE(x, S_BCM1480_MC_COL02, M_BCM1480_MC_COL02)
230 230
231#define S_BCM1480_MC_COL03 24 231#define S_BCM1480_MC_COL03 24
232#define M_BCM1480_MC_COL03 _SB_MAKEMASK(6,S_BCM1480_MC_COL03) 232#define M_BCM1480_MC_COL03 _SB_MAKEMASK(6, S_BCM1480_MC_COL03)
233#define V_BCM1480_MC_COL03(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL03) 233#define V_BCM1480_MC_COL03(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL03)
234#define G_BCM1480_MC_COL03(x) _SB_GETVALUE(x,S_BCM1480_MC_COL03,M_BCM1480_MC_COL03) 234#define G_BCM1480_MC_COL03(x) _SB_GETVALUE(x, S_BCM1480_MC_COL03, M_BCM1480_MC_COL03)
235 235
236#define S_BCM1480_MC_COL04 32 236#define S_BCM1480_MC_COL04 32
237#define M_BCM1480_MC_COL04 _SB_MAKEMASK(6,S_BCM1480_MC_COL04) 237#define M_BCM1480_MC_COL04 _SB_MAKEMASK(6, S_BCM1480_MC_COL04)
238#define V_BCM1480_MC_COL04(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL04) 238#define V_BCM1480_MC_COL04(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL04)
239#define G_BCM1480_MC_COL04(x) _SB_GETVALUE(x,S_BCM1480_MC_COL04,M_BCM1480_MC_COL04) 239#define G_BCM1480_MC_COL04(x) _SB_GETVALUE(x, S_BCM1480_MC_COL04, M_BCM1480_MC_COL04)
240 240
241#define S_BCM1480_MC_COL05 40 241#define S_BCM1480_MC_COL05 40
242#define M_BCM1480_MC_COL05 _SB_MAKEMASK(6,S_BCM1480_MC_COL05) 242#define M_BCM1480_MC_COL05 _SB_MAKEMASK(6, S_BCM1480_MC_COL05)
243#define V_BCM1480_MC_COL05(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL05) 243#define V_BCM1480_MC_COL05(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL05)
244#define G_BCM1480_MC_COL05(x) _SB_GETVALUE(x,S_BCM1480_MC_COL05,M_BCM1480_MC_COL05) 244#define G_BCM1480_MC_COL05(x) _SB_GETVALUE(x, S_BCM1480_MC_COL05, M_BCM1480_MC_COL05)
245 245
246#define S_BCM1480_MC_COL06 48 246#define S_BCM1480_MC_COL06 48
247#define M_BCM1480_MC_COL06 _SB_MAKEMASK(6,S_BCM1480_MC_COL06) 247#define M_BCM1480_MC_COL06 _SB_MAKEMASK(6, S_BCM1480_MC_COL06)
248#define V_BCM1480_MC_COL06(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL06) 248#define V_BCM1480_MC_COL06(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL06)
249#define G_BCM1480_MC_COL06(x) _SB_GETVALUE(x,S_BCM1480_MC_COL06,M_BCM1480_MC_COL06) 249#define G_BCM1480_MC_COL06(x) _SB_GETVALUE(x, S_BCM1480_MC_COL06, M_BCM1480_MC_COL06)
250 250
251#define S_BCM1480_MC_COL07 56 251#define S_BCM1480_MC_COL07 56
252#define M_BCM1480_MC_COL07 _SB_MAKEMASK(6,S_BCM1480_MC_COL07) 252#define M_BCM1480_MC_COL07 _SB_MAKEMASK(6, S_BCM1480_MC_COL07)
253#define V_BCM1480_MC_COL07(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL07) 253#define V_BCM1480_MC_COL07(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL07)
254#define G_BCM1480_MC_COL07(x) _SB_GETVALUE(x,S_BCM1480_MC_COL07,M_BCM1480_MC_COL07) 254#define G_BCM1480_MC_COL07(x) _SB_GETVALUE(x, S_BCM1480_MC_COL07, M_BCM1480_MC_COL07)
255 255
256/* 256/*
257 * Column Address Bit Select Register 1 (Table 87) 257 * Column Address Bit Select Register 1 (Table 87)
258 */ 258 */
259 259
260#define S_BCM1480_MC_COL08 0 260#define S_BCM1480_MC_COL08 0
261#define M_BCM1480_MC_COL08 _SB_MAKEMASK(6,S_BCM1480_MC_COL08) 261#define M_BCM1480_MC_COL08 _SB_MAKEMASK(6, S_BCM1480_MC_COL08)
262#define V_BCM1480_MC_COL08(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL08) 262#define V_BCM1480_MC_COL08(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL08)
263#define G_BCM1480_MC_COL08(x) _SB_GETVALUE(x,S_BCM1480_MC_COL08,M_BCM1480_MC_COL08) 263#define G_BCM1480_MC_COL08(x) _SB_GETVALUE(x, S_BCM1480_MC_COL08, M_BCM1480_MC_COL08)
264 264
265#define S_BCM1480_MC_COL09 8 265#define S_BCM1480_MC_COL09 8
266#define M_BCM1480_MC_COL09 _SB_MAKEMASK(6,S_BCM1480_MC_COL09) 266#define M_BCM1480_MC_COL09 _SB_MAKEMASK(6, S_BCM1480_MC_COL09)
267#define V_BCM1480_MC_COL09(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL09) 267#define V_BCM1480_MC_COL09(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL09)
268#define G_BCM1480_MC_COL09(x) _SB_GETVALUE(x,S_BCM1480_MC_COL09,M_BCM1480_MC_COL09) 268#define G_BCM1480_MC_COL09(x) _SB_GETVALUE(x, S_BCM1480_MC_COL09, M_BCM1480_MC_COL09)
269 269
270#define S_BCM1480_MC_COL10 16 /* not a valid position, must be prog as 0 */ 270#define S_BCM1480_MC_COL10 16 /* not a valid position, must be prog as 0 */
271 271
272#define S_BCM1480_MC_COL11 24 272#define S_BCM1480_MC_COL11 24
273#define M_BCM1480_MC_COL11 _SB_MAKEMASK(6,S_BCM1480_MC_COL11) 273#define M_BCM1480_MC_COL11 _SB_MAKEMASK(6, S_BCM1480_MC_COL11)
274#define V_BCM1480_MC_COL11(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL11) 274#define V_BCM1480_MC_COL11(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL11)
275#define G_BCM1480_MC_COL11(x) _SB_GETVALUE(x,S_BCM1480_MC_COL11,M_BCM1480_MC_COL11) 275#define G_BCM1480_MC_COL11(x) _SB_GETVALUE(x, S_BCM1480_MC_COL11, M_BCM1480_MC_COL11)
276 276
277#define S_BCM1480_MC_COL12 32 277#define S_BCM1480_MC_COL12 32
278#define M_BCM1480_MC_COL12 _SB_MAKEMASK(6,S_BCM1480_MC_COL12) 278#define M_BCM1480_MC_COL12 _SB_MAKEMASK(6, S_BCM1480_MC_COL12)
279#define V_BCM1480_MC_COL12(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL12) 279#define V_BCM1480_MC_COL12(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL12)
280#define G_BCM1480_MC_COL12(x) _SB_GETVALUE(x,S_BCM1480_MC_COL12,M_BCM1480_MC_COL12) 280#define G_BCM1480_MC_COL12(x) _SB_GETVALUE(x, S_BCM1480_MC_COL12, M_BCM1480_MC_COL12)
281 281
282#define S_BCM1480_MC_COL13 40 282#define S_BCM1480_MC_COL13 40
283#define M_BCM1480_MC_COL13 _SB_MAKEMASK(6,S_BCM1480_MC_COL13) 283#define M_BCM1480_MC_COL13 _SB_MAKEMASK(6, S_BCM1480_MC_COL13)
284#define V_BCM1480_MC_COL13(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL13) 284#define V_BCM1480_MC_COL13(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL13)
285#define G_BCM1480_MC_COL13(x) _SB_GETVALUE(x,S_BCM1480_MC_COL13,M_BCM1480_MC_COL13) 285#define G_BCM1480_MC_COL13(x) _SB_GETVALUE(x, S_BCM1480_MC_COL13, M_BCM1480_MC_COL13)
286 286
287#define S_BCM1480_MC_COL14 48 287#define S_BCM1480_MC_COL14 48
288#define M_BCM1480_MC_COL14 _SB_MAKEMASK(6,S_BCM1480_MC_COL14) 288#define M_BCM1480_MC_COL14 _SB_MAKEMASK(6, S_BCM1480_MC_COL14)
289#define V_BCM1480_MC_COL14(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COL14) 289#define V_BCM1480_MC_COL14(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COL14)
290#define G_BCM1480_MC_COL14(x) _SB_GETVALUE(x,S_BCM1480_MC_COL14,M_BCM1480_MC_COL14) 290#define G_BCM1480_MC_COL14(x) _SB_GETVALUE(x, S_BCM1480_MC_COL14, M_BCM1480_MC_COL14)
291 291
292#define K_BCM1480_MC_COLX_BIT_SPACING 8 292#define K_BCM1480_MC_COLX_BIT_SPACING 8
293 293
@@ -296,38 +296,38 @@
296 */ 296 */
297 297
298#define S_BCM1480_MC_CS01_BANK0 0 298#define S_BCM1480_MC_CS01_BANK0 0
299#define M_BCM1480_MC_CS01_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK0) 299#define M_BCM1480_MC_CS01_BANK0 _SB_MAKEMASK(6, S_BCM1480_MC_CS01_BANK0)
300#define V_BCM1480_MC_CS01_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK0) 300#define V_BCM1480_MC_CS01_BANK0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK0)
301#define G_BCM1480_MC_CS01_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK0,M_BCM1480_MC_CS01_BANK0) 301#define G_BCM1480_MC_CS01_BANK0(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK0, M_BCM1480_MC_CS01_BANK0)
302 302
303#define S_BCM1480_MC_CS01_BANK1 8 303#define S_BCM1480_MC_CS01_BANK1 8
304#define M_BCM1480_MC_CS01_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK1) 304#define M_BCM1480_MC_CS01_BANK1 _SB_MAKEMASK(6, S_BCM1480_MC_CS01_BANK1)
305#define V_BCM1480_MC_CS01_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK1) 305#define V_BCM1480_MC_CS01_BANK1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK1)
306#define G_BCM1480_MC_CS01_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK1,M_BCM1480_MC_CS01_BANK1) 306#define G_BCM1480_MC_CS01_BANK1(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK1, M_BCM1480_MC_CS01_BANK1)
307 307
308#define S_BCM1480_MC_CS01_BANK2 16 308#define S_BCM1480_MC_CS01_BANK2 16
309#define M_BCM1480_MC_CS01_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS01_BANK2) 309#define M_BCM1480_MC_CS01_BANK2 _SB_MAKEMASK(6, S_BCM1480_MC_CS01_BANK2)
310#define V_BCM1480_MC_CS01_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS01_BANK2) 310#define V_BCM1480_MC_CS01_BANK2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS01_BANK2)
311#define G_BCM1480_MC_CS01_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS01_BANK2,M_BCM1480_MC_CS01_BANK2) 311#define G_BCM1480_MC_CS01_BANK2(x) _SB_GETVALUE(x, S_BCM1480_MC_CS01_BANK2, M_BCM1480_MC_CS01_BANK2)
312 312
313/* 313/*
314 * CS2 and CS3 Bank Address Bit Select Register (Table 89) 314 * CS2 and CS3 Bank Address Bit Select Register (Table 89)
315 */ 315 */
316 316
317#define S_BCM1480_MC_CS23_BANK0 0 317#define S_BCM1480_MC_CS23_BANK0 0
318#define M_BCM1480_MC_CS23_BANK0 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK0) 318#define M_BCM1480_MC_CS23_BANK0 _SB_MAKEMASK(6, S_BCM1480_MC_CS23_BANK0)
319#define V_BCM1480_MC_CS23_BANK0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK0) 319#define V_BCM1480_MC_CS23_BANK0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK0)
320#define G_BCM1480_MC_CS23_BANK0(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK0,M_BCM1480_MC_CS23_BANK0) 320#define G_BCM1480_MC_CS23_BANK0(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK0, M_BCM1480_MC_CS23_BANK0)
321 321
322#define S_BCM1480_MC_CS23_BANK1 8 322#define S_BCM1480_MC_CS23_BANK1 8
323#define M_BCM1480_MC_CS23_BANK1 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK1) 323#define M_BCM1480_MC_CS23_BANK1 _SB_MAKEMASK(6, S_BCM1480_MC_CS23_BANK1)
324#define V_BCM1480_MC_CS23_BANK1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK1) 324#define V_BCM1480_MC_CS23_BANK1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK1)
325#define G_BCM1480_MC_CS23_BANK1(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK1,M_BCM1480_MC_CS23_BANK1) 325#define G_BCM1480_MC_CS23_BANK1(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK1, M_BCM1480_MC_CS23_BANK1)
326 326
327#define S_BCM1480_MC_CS23_BANK2 16 327#define S_BCM1480_MC_CS23_BANK2 16
328#define M_BCM1480_MC_CS23_BANK2 _SB_MAKEMASK(6,S_BCM1480_MC_CS23_BANK2) 328#define M_BCM1480_MC_CS23_BANK2 _SB_MAKEMASK(6, S_BCM1480_MC_CS23_BANK2)
329#define V_BCM1480_MC_CS23_BANK2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS23_BANK2) 329#define V_BCM1480_MC_CS23_BANK2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS23_BANK2)
330#define G_BCM1480_MC_CS23_BANK2(x) _SB_GETVALUE(x,S_BCM1480_MC_CS23_BANK2,M_BCM1480_MC_CS23_BANK2) 330#define G_BCM1480_MC_CS23_BANK2(x) _SB_GETVALUE(x, S_BCM1480_MC_CS23_BANK2, M_BCM1480_MC_CS23_BANK2)
331 331
332#define K_BCM1480_MC_CSXX_BANKX_BIT_SPACING 8 332#define K_BCM1480_MC_CSXX_BANKX_BIT_SPACING 8
333 333
@@ -336,9 +336,9 @@
336 */ 336 */
337 337
338#define S_BCM1480_MC_COMMAND 0 338#define S_BCM1480_MC_COMMAND 0
339#define M_BCM1480_MC_COMMAND _SB_MAKEMASK(4,S_BCM1480_MC_COMMAND) 339#define M_BCM1480_MC_COMMAND _SB_MAKEMASK(4, S_BCM1480_MC_COMMAND)
340#define V_BCM1480_MC_COMMAND(x) _SB_MAKEVALUE(x,S_BCM1480_MC_COMMAND) 340#define V_BCM1480_MC_COMMAND(x) _SB_MAKEVALUE(x, S_BCM1480_MC_COMMAND)
341#define G_BCM1480_MC_COMMAND(x) _SB_GETVALUE(x,S_BCM1480_MC_COMMAND,M_BCM1480_MC_COMMAND) 341#define G_BCM1480_MC_COMMAND(x) _SB_GETVALUE(x, S_BCM1480_MC_COMMAND, M_BCM1480_MC_COMMAND)
342 342
343#define K_BCM1480_MC_COMMAND_EMRS 0 343#define K_BCM1480_MC_COMMAND_EMRS 0
344#define K_BCM1480_MC_COMMAND_MRS 1 344#define K_BCM1480_MC_COMMAND_MRS 1
@@ -382,9 +382,9 @@
382#define M_BCM1480_MC_CS6 _SB_MAKEMASK1(10) 382#define M_BCM1480_MC_CS6 _SB_MAKEMASK1(10)
383#define M_BCM1480_MC_CS7 _SB_MAKEMASK1(11) 383#define M_BCM1480_MC_CS7 _SB_MAKEMASK1(11)
384 384
385#define M_BCM1480_MC_CS _SB_MAKEMASK(8,S_BCM1480_MC_CS0) 385#define M_BCM1480_MC_CS _SB_MAKEMASK(8, S_BCM1480_MC_CS0)
386#define V_BCM1480_MC_CS(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CS0) 386#define V_BCM1480_MC_CS(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0)
387#define G_BCM1480_MC_CS(x) _SB_GETVALUE(x,S_BCM1480_MC_CS0,M_BCM1480_MC_CS0) 387#define G_BCM1480_MC_CS(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0, M_BCM1480_MC_CS0)
388 388
389#define M_BCM1480_MC_CMD_ACTIVE _SB_MAKEMASK1(16) 389#define M_BCM1480_MC_CMD_ACTIVE _SB_MAKEMASK1(16)
390 390
@@ -393,21 +393,21 @@
393 */ 393 */
394 394
395#define S_BCM1480_MC_EMODE 0 395#define S_BCM1480_MC_EMODE 0
396#define M_BCM1480_MC_EMODE _SB_MAKEMASK(15,S_BCM1480_MC_EMODE) 396#define M_BCM1480_MC_EMODE _SB_MAKEMASK(15, S_BCM1480_MC_EMODE)
397#define V_BCM1480_MC_EMODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_EMODE) 397#define V_BCM1480_MC_EMODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_EMODE)
398#define G_BCM1480_MC_EMODE(x) _SB_GETVALUE(x,S_BCM1480_MC_EMODE,M_BCM1480_MC_EMODE) 398#define G_BCM1480_MC_EMODE(x) _SB_GETVALUE(x, S_BCM1480_MC_EMODE, M_BCM1480_MC_EMODE)
399#define V_BCM1480_MC_EMODE_DEFAULT V_BCM1480_MC_EMODE(0) 399#define V_BCM1480_MC_EMODE_DEFAULT V_BCM1480_MC_EMODE(0)
400 400
401#define S_BCM1480_MC_MODE 16 401#define S_BCM1480_MC_MODE 16
402#define M_BCM1480_MC_MODE _SB_MAKEMASK(15,S_BCM1480_MC_MODE) 402#define M_BCM1480_MC_MODE _SB_MAKEMASK(15, S_BCM1480_MC_MODE)
403#define V_BCM1480_MC_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MODE) 403#define V_BCM1480_MC_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_MODE)
404#define G_BCM1480_MC_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_MODE,M_BCM1480_MC_MODE) 404#define G_BCM1480_MC_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_MODE, M_BCM1480_MC_MODE)
405#define V_BCM1480_MC_MODE_DEFAULT V_BCM1480_MC_MODE(0) 405#define V_BCM1480_MC_MODE_DEFAULT V_BCM1480_MC_MODE(0)
406 406
407#define S_BCM1480_MC_DRAM_TYPE 32 407#define S_BCM1480_MC_DRAM_TYPE 32
408#define M_BCM1480_MC_DRAM_TYPE _SB_MAKEMASK(4,S_BCM1480_MC_DRAM_TYPE) 408#define M_BCM1480_MC_DRAM_TYPE _SB_MAKEMASK(4, S_BCM1480_MC_DRAM_TYPE)
409#define V_BCM1480_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DRAM_TYPE) 409#define V_BCM1480_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DRAM_TYPE)
410#define G_BCM1480_MC_DRAM_TYPE(x) _SB_GETVALUE(x,S_BCM1480_MC_DRAM_TYPE,M_BCM1480_MC_DRAM_TYPE) 410#define G_BCM1480_MC_DRAM_TYPE(x) _SB_GETVALUE(x, S_BCM1480_MC_DRAM_TYPE, M_BCM1480_MC_DRAM_TYPE)
411 411
412#define K_BCM1480_MC_DRAM_TYPE_JEDEC 0 412#define K_BCM1480_MC_DRAM_TYPE_JEDEC 0
413#define K_BCM1480_MC_DRAM_TYPE_FCRAM 1 413#define K_BCM1480_MC_DRAM_TYPE_FCRAM 1
@@ -431,9 +431,9 @@
431#define M_BCM1480_MC_ECC_DISABLE _SB_MAKEMASK1(39) 431#define M_BCM1480_MC_ECC_DISABLE _SB_MAKEMASK1(39)
432 432
433#define S_BCM1480_MC_PG_POLICY 40 433#define S_BCM1480_MC_PG_POLICY 40
434#define M_BCM1480_MC_PG_POLICY _SB_MAKEMASK(2,S_BCM1480_MC_PG_POLICY) 434#define M_BCM1480_MC_PG_POLICY _SB_MAKEMASK(2, S_BCM1480_MC_PG_POLICY)
435#define V_BCM1480_MC_PG_POLICY(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PG_POLICY) 435#define V_BCM1480_MC_PG_POLICY(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PG_POLICY)
436#define G_BCM1480_MC_PG_POLICY(x) _SB_GETVALUE(x,S_BCM1480_MC_PG_POLICY,M_BCM1480_MC_PG_POLICY) 436#define G_BCM1480_MC_PG_POLICY(x) _SB_GETVALUE(x, S_BCM1480_MC_PG_POLICY, M_BCM1480_MC_PG_POLICY)
437 437
438#define K_BCM1480_MC_PG_POLICY_CLOSED 0 438#define K_BCM1480_MC_PG_POLICY_CLOSED 0
439#define K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK 1 439#define K_BCM1480_MC_PG_POLICY_CAS_TIME_CHK 1
@@ -454,16 +454,16 @@
454 */ 454 */
455 455
456#define S_BCM1480_MC_CLK_RATIO 0 456#define S_BCM1480_MC_CLK_RATIO 0
457#define M_BCM1480_MC_CLK_RATIO _SB_MAKEMASK(6,S_BCM1480_MC_CLK_RATIO) 457#define M_BCM1480_MC_CLK_RATIO _SB_MAKEMASK(6, S_BCM1480_MC_CLK_RATIO)
458#define V_BCM1480_MC_CLK_RATIO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CLK_RATIO) 458#define V_BCM1480_MC_CLK_RATIO(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CLK_RATIO)
459#define G_BCM1480_MC_CLK_RATIO(x) _SB_GETVALUE(x,S_BCM1480_MC_CLK_RATIO,M_BCM1480_MC_CLK_RATIO) 459#define G_BCM1480_MC_CLK_RATIO(x) _SB_GETVALUE(x, S_BCM1480_MC_CLK_RATIO, M_BCM1480_MC_CLK_RATIO)
460 460
461#define V_BCM1480_MC_CLK_RATIO_DEFAULT V_BCM1480_MC_CLK_RATIO(10) 461#define V_BCM1480_MC_CLK_RATIO_DEFAULT V_BCM1480_MC_CLK_RATIO(10)
462 462
463#define S_BCM1480_MC_REF_RATE 8 463#define S_BCM1480_MC_REF_RATE 8
464#define M_BCM1480_MC_REF_RATE _SB_MAKEMASK(8,S_BCM1480_MC_REF_RATE) 464#define M_BCM1480_MC_REF_RATE _SB_MAKEMASK(8, S_BCM1480_MC_REF_RATE)
465#define V_BCM1480_MC_REF_RATE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_REF_RATE) 465#define V_BCM1480_MC_REF_RATE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_REF_RATE)
466#define G_BCM1480_MC_REF_RATE(x) _SB_GETVALUE(x,S_BCM1480_MC_REF_RATE,M_BCM1480_MC_REF_RATE) 466#define G_BCM1480_MC_REF_RATE(x) _SB_GETVALUE(x, S_BCM1480_MC_REF_RATE, M_BCM1480_MC_REF_RATE)
467 467
468#define K_BCM1480_MC_REF_RATE_100MHz 0x31 468#define K_BCM1480_MC_REF_RATE_100MHz 0x31
469#define K_BCM1480_MC_REF_RATE_200MHz 0x62 469#define K_BCM1480_MC_REF_RATE_200MHz 0x62
@@ -519,20 +519,20 @@
519#define M_BCM1480_MC_CS_ODD_ODT_EN _SB_MAKEMASK1(32) 519#define M_BCM1480_MC_CS_ODD_ODT_EN _SB_MAKEMASK1(32)
520 520
521#define S_BCM1480_MC_ODT0 0 521#define S_BCM1480_MC_ODT0 0
522#define M_BCM1480_MC_ODT0 _SB_MAKEMASK(8,S_BCM1480_MC_ODT0) 522#define M_BCM1480_MC_ODT0 _SB_MAKEMASK(8, S_BCM1480_MC_ODT0)
523#define V_BCM1480_MC_ODT0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ODT0) 523#define V_BCM1480_MC_ODT0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT0)
524 524
525#define S_BCM1480_MC_ODT2 8 525#define S_BCM1480_MC_ODT2 8
526#define M_BCM1480_MC_ODT2 _SB_MAKEMASK(8,S_BCM1480_MC_ODT2) 526#define M_BCM1480_MC_ODT2 _SB_MAKEMASK(8, S_BCM1480_MC_ODT2)
527#define V_BCM1480_MC_ODT2(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ODT2) 527#define V_BCM1480_MC_ODT2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT2)
528 528
529#define S_BCM1480_MC_ODT4 16 529#define S_BCM1480_MC_ODT4 16
530#define M_BCM1480_MC_ODT4 _SB_MAKEMASK(8,S_BCM1480_MC_ODT4) 530#define M_BCM1480_MC_ODT4 _SB_MAKEMASK(8, S_BCM1480_MC_ODT4)
531#define V_BCM1480_MC_ODT4(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ODT4) 531#define V_BCM1480_MC_ODT4(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT4)
532 532
533#define S_BCM1480_MC_ODT6 24 533#define S_BCM1480_MC_ODT6 24
534#define M_BCM1480_MC_ODT6 _SB_MAKEMASK(8,S_BCM1480_MC_ODT6) 534#define M_BCM1480_MC_ODT6 _SB_MAKEMASK(8, S_BCM1480_MC_ODT6)
535#define V_BCM1480_MC_ODT6(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ODT6) 535#define V_BCM1480_MC_ODT6(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ODT6)
536#endif 536#endif
537 537
538/* 538/*
@@ -540,70 +540,70 @@
540 */ 540 */
541 541
542#define S_BCM1480_MC_ADDR_COARSE_ADJ 0 542#define S_BCM1480_MC_ADDR_COARSE_ADJ 0
543#define M_BCM1480_MC_ADDR_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_ADDR_COARSE_ADJ) 543#define M_BCM1480_MC_ADDR_COARSE_ADJ _SB_MAKEMASK(6, S_BCM1480_MC_ADDR_COARSE_ADJ)
544#define V_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ) 544#define V_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_COARSE_ADJ)
545#define G_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_COARSE_ADJ,M_BCM1480_MC_ADDR_COARSE_ADJ) 545#define G_BCM1480_MC_ADDR_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_COARSE_ADJ, M_BCM1480_MC_ADDR_COARSE_ADJ)
546#define V_BCM1480_MC_ADDR_COARSE_ADJ_DEFAULT V_BCM1480_MC_ADDR_COARSE_ADJ(0x0) 546#define V_BCM1480_MC_ADDR_COARSE_ADJ_DEFAULT V_BCM1480_MC_ADDR_COARSE_ADJ(0x0)
547 547
548#if SIBYTE_HDR_FEATURE(1480, PASS2) 548#if SIBYTE_HDR_FEATURE(1480, PASS2)
549#define S_BCM1480_MC_ADDR_FREQ_RANGE 8 549#define S_BCM1480_MC_ADDR_FREQ_RANGE 8
550#define M_BCM1480_MC_ADDR_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FREQ_RANGE) 550#define M_BCM1480_MC_ADDR_FREQ_RANGE _SB_MAKEMASK(4, S_BCM1480_MC_ADDR_FREQ_RANGE)
551#define V_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE) 551#define V_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_FREQ_RANGE)
552#define G_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FREQ_RANGE,M_BCM1480_MC_ADDR_FREQ_RANGE) 552#define G_BCM1480_MC_ADDR_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_FREQ_RANGE, M_BCM1480_MC_ADDR_FREQ_RANGE)
553#define V_BCM1480_MC_ADDR_FREQ_RANGE_DEFAULT V_BCM1480_MC_ADDR_FREQ_RANGE(0x4) 553#define V_BCM1480_MC_ADDR_FREQ_RANGE_DEFAULT V_BCM1480_MC_ADDR_FREQ_RANGE(0x4)
554#endif 554#endif
555 555
556#define S_BCM1480_MC_ADDR_FINE_ADJ 8 556#define S_BCM1480_MC_ADDR_FINE_ADJ 8
557#define M_BCM1480_MC_ADDR_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_ADDR_FINE_ADJ) 557#define M_BCM1480_MC_ADDR_FINE_ADJ _SB_MAKEMASK(4, S_BCM1480_MC_ADDR_FINE_ADJ)
558#define V_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ) 558#define V_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ADDR_FINE_ADJ)
559#define G_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_ADDR_FINE_ADJ,M_BCM1480_MC_ADDR_FINE_ADJ) 559#define G_BCM1480_MC_ADDR_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_ADDR_FINE_ADJ, M_BCM1480_MC_ADDR_FINE_ADJ)
560#define V_BCM1480_MC_ADDR_FINE_ADJ_DEFAULT V_BCM1480_MC_ADDR_FINE_ADJ(0x8) 560#define V_BCM1480_MC_ADDR_FINE_ADJ_DEFAULT V_BCM1480_MC_ADDR_FINE_ADJ(0x8)
561 561
562#define S_BCM1480_MC_DQI_COARSE_ADJ 16 562#define S_BCM1480_MC_DQI_COARSE_ADJ 16
563#define M_BCM1480_MC_DQI_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQI_COARSE_ADJ) 563#define M_BCM1480_MC_DQI_COARSE_ADJ _SB_MAKEMASK(6, S_BCM1480_MC_DQI_COARSE_ADJ)
564#define V_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ) 564#define V_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_COARSE_ADJ)
565#define G_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_COARSE_ADJ,M_BCM1480_MC_DQI_COARSE_ADJ) 565#define G_BCM1480_MC_DQI_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_COARSE_ADJ, M_BCM1480_MC_DQI_COARSE_ADJ)
566#define V_BCM1480_MC_DQI_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQI_COARSE_ADJ(0x0) 566#define V_BCM1480_MC_DQI_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQI_COARSE_ADJ(0x0)
567 567
568#if SIBYTE_HDR_FEATURE(1480, PASS2) 568#if SIBYTE_HDR_FEATURE(1480, PASS2)
569#define S_BCM1480_MC_DQI_FREQ_RANGE 24 569#define S_BCM1480_MC_DQI_FREQ_RANGE 24
570#define M_BCM1480_MC_DQI_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FREQ_RANGE) 570#define M_BCM1480_MC_DQI_FREQ_RANGE _SB_MAKEMASK(4, S_BCM1480_MC_DQI_FREQ_RANGE)
571#define V_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE) 571#define V_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_FREQ_RANGE)
572#define G_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FREQ_RANGE,M_BCM1480_MC_DQI_FREQ_RANGE) 572#define G_BCM1480_MC_DQI_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_FREQ_RANGE, M_BCM1480_MC_DQI_FREQ_RANGE)
573#define V_BCM1480_MC_DQI_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQI_FREQ_RANGE(0x4) 573#define V_BCM1480_MC_DQI_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQI_FREQ_RANGE(0x4)
574#endif 574#endif
575 575
576#define S_BCM1480_MC_DQI_FINE_ADJ 24 576#define S_BCM1480_MC_DQI_FINE_ADJ 24
577#define M_BCM1480_MC_DQI_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQI_FINE_ADJ) 577#define M_BCM1480_MC_DQI_FINE_ADJ _SB_MAKEMASK(4, S_BCM1480_MC_DQI_FINE_ADJ)
578#define V_BCM1480_MC_DQI_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ) 578#define V_BCM1480_MC_DQI_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQI_FINE_ADJ)
579#define G_BCM1480_MC_DQI_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQI_FINE_ADJ,M_BCM1480_MC_DQI_FINE_ADJ) 579#define G_BCM1480_MC_DQI_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQI_FINE_ADJ, M_BCM1480_MC_DQI_FINE_ADJ)
580#define V_BCM1480_MC_DQI_FINE_ADJ_DEFAULT V_BCM1480_MC_DQI_FINE_ADJ(0x8) 580#define V_BCM1480_MC_DQI_FINE_ADJ_DEFAULT V_BCM1480_MC_DQI_FINE_ADJ(0x8)
581 581
582#define S_BCM1480_MC_DQO_COARSE_ADJ 32 582#define S_BCM1480_MC_DQO_COARSE_ADJ 32
583#define M_BCM1480_MC_DQO_COARSE_ADJ _SB_MAKEMASK(6,S_BCM1480_MC_DQO_COARSE_ADJ) 583#define M_BCM1480_MC_DQO_COARSE_ADJ _SB_MAKEMASK(6, S_BCM1480_MC_DQO_COARSE_ADJ)
584#define V_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ) 584#define V_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_COARSE_ADJ)
585#define G_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_COARSE_ADJ,M_BCM1480_MC_DQO_COARSE_ADJ) 585#define G_BCM1480_MC_DQO_COARSE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_COARSE_ADJ, M_BCM1480_MC_DQO_COARSE_ADJ)
586#define V_BCM1480_MC_DQO_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQO_COARSE_ADJ(0x0) 586#define V_BCM1480_MC_DQO_COARSE_ADJ_DEFAULT V_BCM1480_MC_DQO_COARSE_ADJ(0x0)
587 587
588#if SIBYTE_HDR_FEATURE(1480, PASS2) 588#if SIBYTE_HDR_FEATURE(1480, PASS2)
589#define S_BCM1480_MC_DQO_FREQ_RANGE 40 589#define S_BCM1480_MC_DQO_FREQ_RANGE 40
590#define M_BCM1480_MC_DQO_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FREQ_RANGE) 590#define M_BCM1480_MC_DQO_FREQ_RANGE _SB_MAKEMASK(4, S_BCM1480_MC_DQO_FREQ_RANGE)
591#define V_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE) 591#define V_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_FREQ_RANGE)
592#define G_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FREQ_RANGE,M_BCM1480_MC_DQO_FREQ_RANGE) 592#define G_BCM1480_MC_DQO_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_FREQ_RANGE, M_BCM1480_MC_DQO_FREQ_RANGE)
593#define V_BCM1480_MC_DQO_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQO_FREQ_RANGE(0x4) 593#define V_BCM1480_MC_DQO_FREQ_RANGE_DEFAULT V_BCM1480_MC_DQO_FREQ_RANGE(0x4)
594#endif 594#endif
595 595
596#define S_BCM1480_MC_DQO_FINE_ADJ 40 596#define S_BCM1480_MC_DQO_FINE_ADJ 40
597#define M_BCM1480_MC_DQO_FINE_ADJ _SB_MAKEMASK(4,S_BCM1480_MC_DQO_FINE_ADJ) 597#define M_BCM1480_MC_DQO_FINE_ADJ _SB_MAKEMASK(4, S_BCM1480_MC_DQO_FINE_ADJ)
598#define V_BCM1480_MC_DQO_FINE_ADJ(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ) 598#define V_BCM1480_MC_DQO_FINE_ADJ(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DQO_FINE_ADJ)
599#define G_BCM1480_MC_DQO_FINE_ADJ(x) _SB_GETVALUE(x,S_BCM1480_MC_DQO_FINE_ADJ,M_BCM1480_MC_DQO_FINE_ADJ) 599#define G_BCM1480_MC_DQO_FINE_ADJ(x) _SB_GETVALUE(x, S_BCM1480_MC_DQO_FINE_ADJ, M_BCM1480_MC_DQO_FINE_ADJ)
600#define V_BCM1480_MC_DQO_FINE_ADJ_DEFAULT V_BCM1480_MC_DQO_FINE_ADJ(0x8) 600#define V_BCM1480_MC_DQO_FINE_ADJ_DEFAULT V_BCM1480_MC_DQO_FINE_ADJ(0x8)
601 601
602#if SIBYTE_HDR_FEATURE(1480, PASS2) 602#if SIBYTE_HDR_FEATURE(1480, PASS2)
603#define S_BCM1480_MC_DLL_PDSEL 44 603#define S_BCM1480_MC_DLL_PDSEL 44
604#define M_BCM1480_MC_DLL_PDSEL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_PDSEL) 604#define M_BCM1480_MC_DLL_PDSEL _SB_MAKEMASK(2, S_BCM1480_MC_DLL_PDSEL)
605#define V_BCM1480_MC_DLL_PDSEL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_PDSEL) 605#define V_BCM1480_MC_DLL_PDSEL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_PDSEL)
606#define G_BCM1480_MC_DLL_PDSEL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_PDSEL,M_BCM1480_MC_DLL_PDSEL) 606#define G_BCM1480_MC_DLL_PDSEL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_PDSEL, M_BCM1480_MC_DLL_PDSEL)
607#define V_BCM1480_MC_DLL_DEFAULT_PDSEL V_BCM1480_MC_DLL_PDSEL(0x0) 607#define V_BCM1480_MC_DLL_DEFAULT_PDSEL V_BCM1480_MC_DLL_PDSEL(0x0)
608 608
609#define M_BCM1480_MC_DLL_REGBYPASS _SB_MAKEMASK1(46) 609#define M_BCM1480_MC_DLL_REGBYPASS _SB_MAKEMASK1(46)
@@ -611,38 +611,38 @@
611#endif 611#endif
612 612
613#define S_BCM1480_MC_DLL_DEFAULT 48 613#define S_BCM1480_MC_DLL_DEFAULT 48
614#define M_BCM1480_MC_DLL_DEFAULT _SB_MAKEMASK(6,S_BCM1480_MC_DLL_DEFAULT) 614#define M_BCM1480_MC_DLL_DEFAULT _SB_MAKEMASK(6, S_BCM1480_MC_DLL_DEFAULT)
615#define V_BCM1480_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_DEFAULT) 615#define V_BCM1480_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_DEFAULT)
616#define G_BCM1480_MC_DLL_DEFAULT(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_DEFAULT,M_BCM1480_MC_DLL_DEFAULT) 616#define G_BCM1480_MC_DLL_DEFAULT(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_DEFAULT, M_BCM1480_MC_DLL_DEFAULT)
617#define V_BCM1480_MC_DLL_DEFAULT_DEFAULT V_BCM1480_MC_DLL_DEFAULT(0x10) 617#define V_BCM1480_MC_DLL_DEFAULT_DEFAULT V_BCM1480_MC_DLL_DEFAULT(0x10)
618 618
619#if SIBYTE_HDR_FEATURE(1480, PASS2) 619#if SIBYTE_HDR_FEATURE(1480, PASS2)
620#define S_BCM1480_MC_DLL_REGCTRL 54 620#define S_BCM1480_MC_DLL_REGCTRL 54
621#define M_BCM1480_MC_DLL_REGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_REGCTRL) 621#define M_BCM1480_MC_DLL_REGCTRL _SB_MAKEMASK(2, S_BCM1480_MC_DLL_REGCTRL)
622#define V_BCM1480_MC_DLL_REGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_REGCTRL) 622#define V_BCM1480_MC_DLL_REGCTRL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_REGCTRL)
623#define G_BCM1480_MC_DLL_REGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_REGCTRL,M_BCM1480_MC_DLL_REGCTRL) 623#define G_BCM1480_MC_DLL_REGCTRL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_REGCTRL, M_BCM1480_MC_DLL_REGCTRL)
624#define V_BCM1480_MC_DLL_DEFAULT_REGCTRL V_BCM1480_MC_DLL_REGCTRL(0x0) 624#define V_BCM1480_MC_DLL_DEFAULT_REGCTRL V_BCM1480_MC_DLL_REGCTRL(0x0)
625#endif 625#endif
626 626
627#if SIBYTE_HDR_FEATURE(1480, PASS2) 627#if SIBYTE_HDR_FEATURE(1480, PASS2)
628#define S_BCM1480_MC_DLL_FREQ_RANGE 56 628#define S_BCM1480_MC_DLL_FREQ_RANGE 56
629#define M_BCM1480_MC_DLL_FREQ_RANGE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_FREQ_RANGE) 629#define M_BCM1480_MC_DLL_FREQ_RANGE _SB_MAKEMASK(4, S_BCM1480_MC_DLL_FREQ_RANGE)
630#define V_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE) 630#define V_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_FREQ_RANGE)
631#define G_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_FREQ_RANGE,M_BCM1480_MC_DLL_FREQ_RANGE) 631#define G_BCM1480_MC_DLL_FREQ_RANGE(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_FREQ_RANGE, M_BCM1480_MC_DLL_FREQ_RANGE)
632#define V_BCM1480_MC_DLL_FREQ_RANGE_DEFAULT V_BCM1480_MC_DLL_FREQ_RANGE(0x4) 632#define V_BCM1480_MC_DLL_FREQ_RANGE_DEFAULT V_BCM1480_MC_DLL_FREQ_RANGE(0x4)
633#endif 633#endif
634 634
635#define S_BCM1480_MC_DLL_STEP_SIZE 56 635#define S_BCM1480_MC_DLL_STEP_SIZE 56
636#define M_BCM1480_MC_DLL_STEP_SIZE _SB_MAKEMASK(4,S_BCM1480_MC_DLL_STEP_SIZE) 636#define M_BCM1480_MC_DLL_STEP_SIZE _SB_MAKEMASK(4, S_BCM1480_MC_DLL_STEP_SIZE)
637#define V_BCM1480_MC_DLL_STEP_SIZE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE) 637#define V_BCM1480_MC_DLL_STEP_SIZE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_STEP_SIZE)
638#define G_BCM1480_MC_DLL_STEP_SIZE(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_STEP_SIZE,M_BCM1480_MC_DLL_STEP_SIZE) 638#define G_BCM1480_MC_DLL_STEP_SIZE(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_STEP_SIZE, M_BCM1480_MC_DLL_STEP_SIZE)
639#define V_BCM1480_MC_DLL_STEP_SIZE_DEFAULT V_BCM1480_MC_DLL_STEP_SIZE(0x8) 639#define V_BCM1480_MC_DLL_STEP_SIZE_DEFAULT V_BCM1480_MC_DLL_STEP_SIZE(0x8)
640 640
641#if SIBYTE_HDR_FEATURE(1480, PASS2) 641#if SIBYTE_HDR_FEATURE(1480, PASS2)
642#define S_BCM1480_MC_DLL_BGCTRL 60 642#define S_BCM1480_MC_DLL_BGCTRL 60
643#define M_BCM1480_MC_DLL_BGCTRL _SB_MAKEMASK(2,S_BCM1480_MC_DLL_BGCTRL) 643#define M_BCM1480_MC_DLL_BGCTRL _SB_MAKEMASK(2, S_BCM1480_MC_DLL_BGCTRL)
644#define V_BCM1480_MC_DLL_BGCTRL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_DLL_BGCTRL) 644#define V_BCM1480_MC_DLL_BGCTRL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_DLL_BGCTRL)
645#define G_BCM1480_MC_DLL_BGCTRL(x) _SB_GETVALUE(x,S_BCM1480_MC_DLL_BGCTRL,M_BCM1480_MC_DLL_BGCTRL) 645#define G_BCM1480_MC_DLL_BGCTRL(x) _SB_GETVALUE(x, S_BCM1480_MC_DLL_BGCTRL, M_BCM1480_MC_DLL_BGCTRL)
646#define V_BCM1480_MC_DLL_DEFAULT_BGCTRL V_BCM1480_MC_DLL_BGCTRL(0x0) 646#define V_BCM1480_MC_DLL_DEFAULT_BGCTRL V_BCM1480_MC_DLL_BGCTRL(0x0)
647#endif 647#endif
648 648
@@ -653,37 +653,37 @@
653 */ 653 */
654 654
655#define S_BCM1480_MC_RTT_BYP_PULLDOWN 0 655#define S_BCM1480_MC_RTT_BYP_PULLDOWN 0
656#define M_BCM1480_MC_RTT_BYP_PULLDOWN _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLDOWN) 656#define M_BCM1480_MC_RTT_BYP_PULLDOWN _SB_MAKEMASK(3, S_BCM1480_MC_RTT_BYP_PULLDOWN)
657#define V_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN) 657#define V_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_RTT_BYP_PULLDOWN)
658#define G_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLDOWN,M_BCM1480_MC_RTT_BYP_PULLDOWN) 658#define G_BCM1480_MC_RTT_BYP_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_RTT_BYP_PULLDOWN, M_BCM1480_MC_RTT_BYP_PULLDOWN)
659 659
660#define S_BCM1480_MC_RTT_BYP_PULLUP 6 660#define S_BCM1480_MC_RTT_BYP_PULLUP 6
661#define M_BCM1480_MC_RTT_BYP_PULLUP _SB_MAKEMASK(3,S_BCM1480_MC_RTT_BYP_PULLUP) 661#define M_BCM1480_MC_RTT_BYP_PULLUP _SB_MAKEMASK(3, S_BCM1480_MC_RTT_BYP_PULLUP)
662#define V_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP) 662#define V_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_RTT_BYP_PULLUP)
663#define G_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_RTT_BYP_PULLUP,M_BCM1480_MC_RTT_BYP_PULLUP) 663#define G_BCM1480_MC_RTT_BYP_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_RTT_BYP_PULLUP, M_BCM1480_MC_RTT_BYP_PULLUP)
664 664
665#define M_BCM1480_MC_RTT_BYPASS _SB_MAKEMASK1(8) 665#define M_BCM1480_MC_RTT_BYPASS _SB_MAKEMASK1(8)
666#define M_BCM1480_MC_RTT_COMP_MOV_AVG _SB_MAKEMASK1(9) 666#define M_BCM1480_MC_RTT_COMP_MOV_AVG _SB_MAKEMASK1(9)
667 667
668#define S_BCM1480_MC_PVT_BYP_C1_PULLDOWN 10 668#define S_BCM1480_MC_PVT_BYP_C1_PULLDOWN 10
669#define M_BCM1480_MC_PVT_BYP_C1_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN) 669#define M_BCM1480_MC_PVT_BYP_C1_PULLDOWN _SB_MAKEMASK(4, S_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
670#define V_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN) 670#define V_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
671#define G_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLDOWN,M_BCM1480_MC_PVT_BYP_C1_PULLDOWN) 671#define G_BCM1480_MC_PVT_BYP_C1_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLDOWN, M_BCM1480_MC_PVT_BYP_C1_PULLDOWN)
672 672
673#define S_BCM1480_MC_PVT_BYP_C1_PULLUP 15 673#define S_BCM1480_MC_PVT_BYP_C1_PULLUP 15
674#define M_BCM1480_MC_PVT_BYP_C1_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C1_PULLUP) 674#define M_BCM1480_MC_PVT_BYP_C1_PULLUP _SB_MAKEMASK(4, S_BCM1480_MC_PVT_BYP_C1_PULLUP)
675#define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP) 675#define V_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLUP)
676#define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C1_PULLUP,M_BCM1480_MC_PVT_BYP_C1_PULLUP) 676#define G_BCM1480_MC_PVT_BYP_C1_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C1_PULLUP, M_BCM1480_MC_PVT_BYP_C1_PULLUP)
677 677
678#define S_BCM1480_MC_PVT_BYP_C2_PULLDOWN 20 678#define S_BCM1480_MC_PVT_BYP_C2_PULLDOWN 20
679#define M_BCM1480_MC_PVT_BYP_C2_PULLDOWN _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN) 679#define M_BCM1480_MC_PVT_BYP_C2_PULLDOWN _SB_MAKEMASK(4, S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
680#define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN) 680#define V_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
681#define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLDOWN,M_BCM1480_MC_PVT_BYP_C2_PULLDOWN) 681#define G_BCM1480_MC_PVT_BYP_C2_PULLDOWN(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLDOWN, M_BCM1480_MC_PVT_BYP_C2_PULLDOWN)
682 682
683#define S_BCM1480_MC_PVT_BYP_C2_PULLUP 25 683#define S_BCM1480_MC_PVT_BYP_C2_PULLUP 25
684#define M_BCM1480_MC_PVT_BYP_C2_PULLUP _SB_MAKEMASK(4,S_BCM1480_MC_PVT_BYP_C2_PULLUP) 684#define M_BCM1480_MC_PVT_BYP_C2_PULLUP _SB_MAKEMASK(4, S_BCM1480_MC_PVT_BYP_C2_PULLUP)
685#define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP) 685#define V_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLUP)
686#define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_GETVALUE(x,S_BCM1480_MC_PVT_BYP_C2_PULLUP,M_BCM1480_MC_PVT_BYP_C2_PULLUP) 686#define G_BCM1480_MC_PVT_BYP_C2_PULLUP(x) _SB_GETVALUE(x, S_BCM1480_MC_PVT_BYP_C2_PULLUP, M_BCM1480_MC_PVT_BYP_C2_PULLUP)
687 687
688#define M_BCM1480_MC_PVT_BYPASS _SB_MAKEMASK1(30) 688#define M_BCM1480_MC_PVT_BYPASS _SB_MAKEMASK1(30)
689#define M_BCM1480_MC_PVT_COMP_MOV_AVG _SB_MAKEMASK1(31) 689#define M_BCM1480_MC_PVT_COMP_MOV_AVG _SB_MAKEMASK1(31)
@@ -703,111 +703,111 @@
703 */ 703 */
704 704
705#define S_BCM1480_MC_DATA_INVERT 0 705#define S_BCM1480_MC_DATA_INVERT 0
706#define M_DATA_ECC_INVERT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_INVERT) 706#define M_DATA_ECC_INVERT _SB_MAKEMASK(64, S_BCM1480_MC_ECC_INVERT)
707 707
708/* 708/*
709 * ECC Test ECC Register (Table 96) 709 * ECC Test ECC Register (Table 96)
710 */ 710 */
711 711
712#define S_BCM1480_MC_ECC_INVERT 0 712#define S_BCM1480_MC_ECC_INVERT 0
713#define M_BCM1480_MC_ECC_INVERT _SB_MAKEMASK(8,S_BCM1480_MC_ECC_INVERT) 713#define M_BCM1480_MC_ECC_INVERT _SB_MAKEMASK(8, S_BCM1480_MC_ECC_INVERT)
714 714
715/* 715/*
716 * SDRAM Timing Register (Table 97) 716 * SDRAM Timing Register (Table 97)
717 */ 717 */
718 718
719#define S_BCM1480_MC_tRCD 0 719#define S_BCM1480_MC_tRCD 0
720#define M_BCM1480_MC_tRCD _SB_MAKEMASK(4,S_BCM1480_MC_tRCD) 720#define M_BCM1480_MC_tRCD _SB_MAKEMASK(4, S_BCM1480_MC_tRCD)
721#define V_BCM1480_MC_tRCD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCD) 721#define V_BCM1480_MC_tRCD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCD)
722#define G_BCM1480_MC_tRCD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCD,M_BCM1480_MC_tRCD) 722#define G_BCM1480_MC_tRCD(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCD, M_BCM1480_MC_tRCD)
723#define K_BCM1480_MC_tRCD_DEFAULT 3 723#define K_BCM1480_MC_tRCD_DEFAULT 3
724#define V_BCM1480_MC_tRCD_DEFAULT V_BCM1480_MC_tRCD(K_BCM1480_MC_tRCD_DEFAULT) 724#define V_BCM1480_MC_tRCD_DEFAULT V_BCM1480_MC_tRCD(K_BCM1480_MC_tRCD_DEFAULT)
725 725
726#define S_BCM1480_MC_tCL 4 726#define S_BCM1480_MC_tCL 4
727#define M_BCM1480_MC_tCL _SB_MAKEMASK(4,S_BCM1480_MC_tCL) 727#define M_BCM1480_MC_tCL _SB_MAKEMASK(4, S_BCM1480_MC_tCL)
728#define V_BCM1480_MC_tCL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCL) 728#define V_BCM1480_MC_tCL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tCL)
729#define G_BCM1480_MC_tCL(x) _SB_GETVALUE(x,S_BCM1480_MC_tCL,M_BCM1480_MC_tCL) 729#define G_BCM1480_MC_tCL(x) _SB_GETVALUE(x, S_BCM1480_MC_tCL, M_BCM1480_MC_tCL)
730#define K_BCM1480_MC_tCL_DEFAULT 2 730#define K_BCM1480_MC_tCL_DEFAULT 2
731#define V_BCM1480_MC_tCL_DEFAULT V_BCM1480_MC_tCL(K_BCM1480_MC_tCL_DEFAULT) 731#define V_BCM1480_MC_tCL_DEFAULT V_BCM1480_MC_tCL(K_BCM1480_MC_tCL_DEFAULT)
732 732
733#define M_BCM1480_MC_tCrDh _SB_MAKEMASK1(8) 733#define M_BCM1480_MC_tCrDh _SB_MAKEMASK1(8)
734 734
735#define S_BCM1480_MC_tWR 9 735#define S_BCM1480_MC_tWR 9
736#define M_BCM1480_MC_tWR _SB_MAKEMASK(3,S_BCM1480_MC_tWR) 736#define M_BCM1480_MC_tWR _SB_MAKEMASK(3, S_BCM1480_MC_tWR)
737#define V_BCM1480_MC_tWR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tWR) 737#define V_BCM1480_MC_tWR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tWR)
738#define G_BCM1480_MC_tWR(x) _SB_GETVALUE(x,S_BCM1480_MC_tWR,M_BCM1480_MC_tWR) 738#define G_BCM1480_MC_tWR(x) _SB_GETVALUE(x, S_BCM1480_MC_tWR, M_BCM1480_MC_tWR)
739#define K_BCM1480_MC_tWR_DEFAULT 2 739#define K_BCM1480_MC_tWR_DEFAULT 2
740#define V_BCM1480_MC_tWR_DEFAULT V_BCM1480_MC_tWR(K_BCM1480_MC_tWR_DEFAULT) 740#define V_BCM1480_MC_tWR_DEFAULT V_BCM1480_MC_tWR(K_BCM1480_MC_tWR_DEFAULT)
741 741
742#define S_BCM1480_MC_tCwD 12 742#define S_BCM1480_MC_tCwD 12
743#define M_BCM1480_MC_tCwD _SB_MAKEMASK(4,S_BCM1480_MC_tCwD) 743#define M_BCM1480_MC_tCwD _SB_MAKEMASK(4, S_BCM1480_MC_tCwD)
744#define V_BCM1480_MC_tCwD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tCwD) 744#define V_BCM1480_MC_tCwD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tCwD)
745#define G_BCM1480_MC_tCwD(x) _SB_GETVALUE(x,S_BCM1480_MC_tCwD,M_BCM1480_MC_tCwD) 745#define G_BCM1480_MC_tCwD(x) _SB_GETVALUE(x, S_BCM1480_MC_tCwD, M_BCM1480_MC_tCwD)
746#define K_BCM1480_MC_tCwD_DEFAULT 1 746#define K_BCM1480_MC_tCwD_DEFAULT 1
747#define V_BCM1480_MC_tCwD_DEFAULT V_BCM1480_MC_tCwD(K_BCM1480_MC_tCwD_DEFAULT) 747#define V_BCM1480_MC_tCwD_DEFAULT V_BCM1480_MC_tCwD(K_BCM1480_MC_tCwD_DEFAULT)
748 748
749#define S_BCM1480_MC_tRP 16 749#define S_BCM1480_MC_tRP 16
750#define M_BCM1480_MC_tRP _SB_MAKEMASK(4,S_BCM1480_MC_tRP) 750#define M_BCM1480_MC_tRP _SB_MAKEMASK(4, S_BCM1480_MC_tRP)
751#define V_BCM1480_MC_tRP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRP) 751#define V_BCM1480_MC_tRP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRP)
752#define G_BCM1480_MC_tRP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRP,M_BCM1480_MC_tRP) 752#define G_BCM1480_MC_tRP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRP, M_BCM1480_MC_tRP)
753#define K_BCM1480_MC_tRP_DEFAULT 4 753#define K_BCM1480_MC_tRP_DEFAULT 4
754#define V_BCM1480_MC_tRP_DEFAULT V_BCM1480_MC_tRP(K_BCM1480_MC_tRP_DEFAULT) 754#define V_BCM1480_MC_tRP_DEFAULT V_BCM1480_MC_tRP(K_BCM1480_MC_tRP_DEFAULT)
755 755
756#define S_BCM1480_MC_tRRD 20 756#define S_BCM1480_MC_tRRD 20
757#define M_BCM1480_MC_tRRD _SB_MAKEMASK(4,S_BCM1480_MC_tRRD) 757#define M_BCM1480_MC_tRRD _SB_MAKEMASK(4, S_BCM1480_MC_tRRD)
758#define V_BCM1480_MC_tRRD(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRRD) 758#define V_BCM1480_MC_tRRD(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRRD)
759#define G_BCM1480_MC_tRRD(x) _SB_GETVALUE(x,S_BCM1480_MC_tRRD,M_BCM1480_MC_tRRD) 759#define G_BCM1480_MC_tRRD(x) _SB_GETVALUE(x, S_BCM1480_MC_tRRD, M_BCM1480_MC_tRRD)
760#define K_BCM1480_MC_tRRD_DEFAULT 2 760#define K_BCM1480_MC_tRRD_DEFAULT 2
761#define V_BCM1480_MC_tRRD_DEFAULT V_BCM1480_MC_tRRD(K_BCM1480_MC_tRRD_DEFAULT) 761#define V_BCM1480_MC_tRRD_DEFAULT V_BCM1480_MC_tRRD(K_BCM1480_MC_tRRD_DEFAULT)
762 762
763#define S_BCM1480_MC_tRCw 24 763#define S_BCM1480_MC_tRCw 24
764#define M_BCM1480_MC_tRCw _SB_MAKEMASK(5,S_BCM1480_MC_tRCw) 764#define M_BCM1480_MC_tRCw _SB_MAKEMASK(5, S_BCM1480_MC_tRCw)
765#define V_BCM1480_MC_tRCw(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCw) 765#define V_BCM1480_MC_tRCw(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCw)
766#define G_BCM1480_MC_tRCw(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCw,M_BCM1480_MC_tRCw) 766#define G_BCM1480_MC_tRCw(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCw, M_BCM1480_MC_tRCw)
767#define K_BCM1480_MC_tRCw_DEFAULT 10 767#define K_BCM1480_MC_tRCw_DEFAULT 10
768#define V_BCM1480_MC_tRCw_DEFAULT V_BCM1480_MC_tRCw(K_BCM1480_MC_tRCw_DEFAULT) 768#define V_BCM1480_MC_tRCw_DEFAULT V_BCM1480_MC_tRCw(K_BCM1480_MC_tRCw_DEFAULT)
769 769
770#define S_BCM1480_MC_tRCr 32 770#define S_BCM1480_MC_tRCr 32
771#define M_BCM1480_MC_tRCr _SB_MAKEMASK(5,S_BCM1480_MC_tRCr) 771#define M_BCM1480_MC_tRCr _SB_MAKEMASK(5, S_BCM1480_MC_tRCr)
772#define V_BCM1480_MC_tRCr(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRCr) 772#define V_BCM1480_MC_tRCr(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRCr)
773#define G_BCM1480_MC_tRCr(x) _SB_GETVALUE(x,S_BCM1480_MC_tRCr,M_BCM1480_MC_tRCr) 773#define G_BCM1480_MC_tRCr(x) _SB_GETVALUE(x, S_BCM1480_MC_tRCr, M_BCM1480_MC_tRCr)
774#define K_BCM1480_MC_tRCr_DEFAULT 9 774#define K_BCM1480_MC_tRCr_DEFAULT 9
775#define V_BCM1480_MC_tRCr_DEFAULT V_BCM1480_MC_tRCr(K_BCM1480_MC_tRCr_DEFAULT) 775#define V_BCM1480_MC_tRCr_DEFAULT V_BCM1480_MC_tRCr(K_BCM1480_MC_tRCr_DEFAULT)
776 776
777#if SIBYTE_HDR_FEATURE(1480, PASS2) 777#if SIBYTE_HDR_FEATURE(1480, PASS2)
778#define S_BCM1480_MC_tFAW 40 778#define S_BCM1480_MC_tFAW 40
779#define M_BCM1480_MC_tFAW _SB_MAKEMASK(6,S_BCM1480_MC_tFAW) 779#define M_BCM1480_MC_tFAW _SB_MAKEMASK(6, S_BCM1480_MC_tFAW)
780#define V_BCM1480_MC_tFAW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFAW) 780#define V_BCM1480_MC_tFAW(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tFAW)
781#define G_BCM1480_MC_tFAW(x) _SB_GETVALUE(x,S_BCM1480_MC_tFAW,M_BCM1480_MC_tFAW) 781#define G_BCM1480_MC_tFAW(x) _SB_GETVALUE(x, S_BCM1480_MC_tFAW, M_BCM1480_MC_tFAW)
782#define K_BCM1480_MC_tFAW_DEFAULT 0 782#define K_BCM1480_MC_tFAW_DEFAULT 0
783#define V_BCM1480_MC_tFAW_DEFAULT V_BCM1480_MC_tFAW(K_BCM1480_MC_tFAW_DEFAULT) 783#define V_BCM1480_MC_tFAW_DEFAULT V_BCM1480_MC_tFAW(K_BCM1480_MC_tFAW_DEFAULT)
784#endif 784#endif
785 785
786#define S_BCM1480_MC_tRFC 48 786#define S_BCM1480_MC_tRFC 48
787#define M_BCM1480_MC_tRFC _SB_MAKEMASK(7,S_BCM1480_MC_tRFC) 787#define M_BCM1480_MC_tRFC _SB_MAKEMASK(7, S_BCM1480_MC_tRFC)
788#define V_BCM1480_MC_tRFC(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRFC) 788#define V_BCM1480_MC_tRFC(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRFC)
789#define G_BCM1480_MC_tRFC(x) _SB_GETVALUE(x,S_BCM1480_MC_tRFC,M_BCM1480_MC_tRFC) 789#define G_BCM1480_MC_tRFC(x) _SB_GETVALUE(x, S_BCM1480_MC_tRFC, M_BCM1480_MC_tRFC)
790#define K_BCM1480_MC_tRFC_DEFAULT 12 790#define K_BCM1480_MC_tRFC_DEFAULT 12
791#define V_BCM1480_MC_tRFC_DEFAULT V_BCM1480_MC_tRFC(K_BCM1480_MC_tRFC_DEFAULT) 791#define V_BCM1480_MC_tRFC_DEFAULT V_BCM1480_MC_tRFC(K_BCM1480_MC_tRFC_DEFAULT)
792 792
793#define S_BCM1480_MC_tFIFO 56 793#define S_BCM1480_MC_tFIFO 56
794#define M_BCM1480_MC_tFIFO _SB_MAKEMASK(2,S_BCM1480_MC_tFIFO) 794#define M_BCM1480_MC_tFIFO _SB_MAKEMASK(2, S_BCM1480_MC_tFIFO)
795#define V_BCM1480_MC_tFIFO(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tFIFO) 795#define V_BCM1480_MC_tFIFO(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tFIFO)
796#define G_BCM1480_MC_tFIFO(x) _SB_GETVALUE(x,S_BCM1480_MC_tFIFO,M_BCM1480_MC_tFIFO) 796#define G_BCM1480_MC_tFIFO(x) _SB_GETVALUE(x, S_BCM1480_MC_tFIFO, M_BCM1480_MC_tFIFO)
797#define K_BCM1480_MC_tFIFO_DEFAULT 0 797#define K_BCM1480_MC_tFIFO_DEFAULT 0
798#define V_BCM1480_MC_tFIFO_DEFAULT V_BCM1480_MC_tFIFO(K_BCM1480_MC_tFIFO_DEFAULT) 798#define V_BCM1480_MC_tFIFO_DEFAULT V_BCM1480_MC_tFIFO(K_BCM1480_MC_tFIFO_DEFAULT)
799 799
800#define S_BCM1480_MC_tW2R 58 800#define S_BCM1480_MC_tW2R 58
801#define M_BCM1480_MC_tW2R _SB_MAKEMASK(2,S_BCM1480_MC_tW2R) 801#define M_BCM1480_MC_tW2R _SB_MAKEMASK(2, S_BCM1480_MC_tW2R)
802#define V_BCM1480_MC_tW2R(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2R) 802#define V_BCM1480_MC_tW2R(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tW2R)
803#define G_BCM1480_MC_tW2R(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2R,M_BCM1480_MC_tW2R) 803#define G_BCM1480_MC_tW2R(x) _SB_GETVALUE(x, S_BCM1480_MC_tW2R, M_BCM1480_MC_tW2R)
804#define K_BCM1480_MC_tW2R_DEFAULT 1 804#define K_BCM1480_MC_tW2R_DEFAULT 1
805#define V_BCM1480_MC_tW2R_DEFAULT V_BCM1480_MC_tW2R(K_BCM1480_MC_tW2R_DEFAULT) 805#define V_BCM1480_MC_tW2R_DEFAULT V_BCM1480_MC_tW2R(K_BCM1480_MC_tW2R_DEFAULT)
806 806
807#define S_BCM1480_MC_tR2W 60 807#define S_BCM1480_MC_tR2W 60
808#define M_BCM1480_MC_tR2W _SB_MAKEMASK(2,S_BCM1480_MC_tR2W) 808#define M_BCM1480_MC_tR2W _SB_MAKEMASK(2, S_BCM1480_MC_tR2W)
809#define V_BCM1480_MC_tR2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tR2W) 809#define V_BCM1480_MC_tR2W(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tR2W)
810#define G_BCM1480_MC_tR2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tR2W,M_BCM1480_MC_tR2W) 810#define G_BCM1480_MC_tR2W(x) _SB_GETVALUE(x, S_BCM1480_MC_tR2W, M_BCM1480_MC_tR2W)
811#define K_BCM1480_MC_tR2W_DEFAULT 0 811#define K_BCM1480_MC_tR2W_DEFAULT 0
812#define V_BCM1480_MC_tR2W_DEFAULT V_BCM1480_MC_tR2W(K_BCM1480_MC_tR2W_DEFAULT) 812#define V_BCM1480_MC_tR2W_DEFAULT V_BCM1480_MC_tR2W(K_BCM1480_MC_tR2W_DEFAULT)
813 813
@@ -835,30 +835,30 @@
835#if SIBYTE_HDR_FEATURE(1480, PASS2) 835#if SIBYTE_HDR_FEATURE(1480, PASS2)
836 836
837#define S_BCM1480_MC_tAL 0 837#define S_BCM1480_MC_tAL 0
838#define M_BCM1480_MC_tAL _SB_MAKEMASK(4,S_BCM1480_MC_tAL) 838#define M_BCM1480_MC_tAL _SB_MAKEMASK(4, S_BCM1480_MC_tAL)
839#define V_BCM1480_MC_tAL(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tAL) 839#define V_BCM1480_MC_tAL(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tAL)
840#define G_BCM1480_MC_tAL(x) _SB_GETVALUE(x,S_BCM1480_MC_tAL,M_BCM1480_MC_tAL) 840#define G_BCM1480_MC_tAL(x) _SB_GETVALUE(x, S_BCM1480_MC_tAL, M_BCM1480_MC_tAL)
841#define K_BCM1480_MC_tAL_DEFAULT 0 841#define K_BCM1480_MC_tAL_DEFAULT 0
842#define V_BCM1480_MC_tAL_DEFAULT V_BCM1480_MC_tAL(K_BCM1480_MC_tAL_DEFAULT) 842#define V_BCM1480_MC_tAL_DEFAULT V_BCM1480_MC_tAL(K_BCM1480_MC_tAL_DEFAULT)
843 843
844#define S_BCM1480_MC_tRTP 4 844#define S_BCM1480_MC_tRTP 4
845#define M_BCM1480_MC_tRTP _SB_MAKEMASK(3,S_BCM1480_MC_tRTP) 845#define M_BCM1480_MC_tRTP _SB_MAKEMASK(3, S_BCM1480_MC_tRTP)
846#define V_BCM1480_MC_tRTP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRTP) 846#define V_BCM1480_MC_tRTP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRTP)
847#define G_BCM1480_MC_tRTP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRTP,M_BCM1480_MC_tRTP) 847#define G_BCM1480_MC_tRTP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRTP, M_BCM1480_MC_tRTP)
848#define K_BCM1480_MC_tRTP_DEFAULT 2 848#define K_BCM1480_MC_tRTP_DEFAULT 2
849#define V_BCM1480_MC_tRTP_DEFAULT V_BCM1480_MC_tRTP(K_BCM1480_MC_tRTP_DEFAULT) 849#define V_BCM1480_MC_tRTP_DEFAULT V_BCM1480_MC_tRTP(K_BCM1480_MC_tRTP_DEFAULT)
850 850
851#define S_BCM1480_MC_tW2W 8 851#define S_BCM1480_MC_tW2W 8
852#define M_BCM1480_MC_tW2W _SB_MAKEMASK(2,S_BCM1480_MC_tW2W) 852#define M_BCM1480_MC_tW2W _SB_MAKEMASK(2, S_BCM1480_MC_tW2W)
853#define V_BCM1480_MC_tW2W(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tW2W) 853#define V_BCM1480_MC_tW2W(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tW2W)
854#define G_BCM1480_MC_tW2W(x) _SB_GETVALUE(x,S_BCM1480_MC_tW2W,M_BCM1480_MC_tW2W) 854#define G_BCM1480_MC_tW2W(x) _SB_GETVALUE(x, S_BCM1480_MC_tW2W, M_BCM1480_MC_tW2W)
855#define K_BCM1480_MC_tW2W_DEFAULT 0 855#define K_BCM1480_MC_tW2W_DEFAULT 0
856#define V_BCM1480_MC_tW2W_DEFAULT V_BCM1480_MC_tW2W(K_BCM1480_MC_tW2W_DEFAULT) 856#define V_BCM1480_MC_tW2W_DEFAULT V_BCM1480_MC_tW2W(K_BCM1480_MC_tW2W_DEFAULT)
857 857
858#define S_BCM1480_MC_tRAP 12 858#define S_BCM1480_MC_tRAP 12
859#define M_BCM1480_MC_tRAP _SB_MAKEMASK(4,S_BCM1480_MC_tRAP) 859#define M_BCM1480_MC_tRAP _SB_MAKEMASK(4, S_BCM1480_MC_tRAP)
860#define V_BCM1480_MC_tRAP(x) _SB_MAKEVALUE(x,S_BCM1480_MC_tRAP) 860#define V_BCM1480_MC_tRAP(x) _SB_MAKEVALUE(x, S_BCM1480_MC_tRAP)
861#define G_BCM1480_MC_tRAP(x) _SB_GETVALUE(x,S_BCM1480_MC_tRAP,M_BCM1480_MC_tRAP) 861#define G_BCM1480_MC_tRAP(x) _SB_GETVALUE(x, S_BCM1480_MC_tRAP, M_BCM1480_MC_tRAP)
862#define K_BCM1480_MC_tRAP_DEFAULT 0 862#define K_BCM1480_MC_tRAP_DEFAULT 0
863#define V_BCM1480_MC_tRAP_DEFAULT V_BCM1480_MC_tRAP(K_BCM1480_MC_tRAP_DEFAULT) 863#define V_BCM1480_MC_tRAP_DEFAULT V_BCM1480_MC_tRAP(K_BCM1480_MC_tRAP_DEFAULT)
864 864
@@ -875,30 +875,30 @@
875 */ 875 */
876 876
877#define S_BCM1480_MC_BLK_SET_MARK 8 877#define S_BCM1480_MC_BLK_SET_MARK 8
878#define M_BCM1480_MC_BLK_SET_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_SET_MARK) 878#define M_BCM1480_MC_BLK_SET_MARK _SB_MAKEMASK(4, S_BCM1480_MC_BLK_SET_MARK)
879#define V_BCM1480_MC_BLK_SET_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_SET_MARK) 879#define V_BCM1480_MC_BLK_SET_MARK(x) _SB_MAKEVALUE(x, S_BCM1480_MC_BLK_SET_MARK)
880#define G_BCM1480_MC_BLK_SET_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_SET_MARK,M_BCM1480_MC_BLK_SET_MARK) 880#define G_BCM1480_MC_BLK_SET_MARK(x) _SB_GETVALUE(x, S_BCM1480_MC_BLK_SET_MARK, M_BCM1480_MC_BLK_SET_MARK)
881 881
882#define S_BCM1480_MC_BLK_CLR_MARK 12 882#define S_BCM1480_MC_BLK_CLR_MARK 12
883#define M_BCM1480_MC_BLK_CLR_MARK _SB_MAKEMASK(4,S_BCM1480_MC_BLK_CLR_MARK) 883#define M_BCM1480_MC_BLK_CLR_MARK _SB_MAKEMASK(4, S_BCM1480_MC_BLK_CLR_MARK)
884#define V_BCM1480_MC_BLK_CLR_MARK(x) _SB_MAKEVALUE(x,S_BCM1480_MC_BLK_CLR_MARK) 884#define V_BCM1480_MC_BLK_CLR_MARK(x) _SB_MAKEVALUE(x, S_BCM1480_MC_BLK_CLR_MARK)
885#define G_BCM1480_MC_BLK_CLR_MARK(x) _SB_GETVALUE(x,S_BCM1480_MC_BLK_CLR_MARK,M_BCM1480_MC_BLK_CLR_MARK) 885#define G_BCM1480_MC_BLK_CLR_MARK(x) _SB_GETVALUE(x, S_BCM1480_MC_BLK_CLR_MARK, M_BCM1480_MC_BLK_CLR_MARK)
886 886
887#define M_BCM1480_MC_PKT_PRIORITY _SB_MAKEMASK1(16) 887#define M_BCM1480_MC_PKT_PRIORITY _SB_MAKEMASK1(16)
888 888
889#define S_BCM1480_MC_MAX_AGE 20 889#define S_BCM1480_MC_MAX_AGE 20
890#define M_BCM1480_MC_MAX_AGE _SB_MAKEMASK(4,S_BCM1480_MC_MAX_AGE) 890#define M_BCM1480_MC_MAX_AGE _SB_MAKEMASK(4, S_BCM1480_MC_MAX_AGE)
891#define V_BCM1480_MC_MAX_AGE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_MAX_AGE) 891#define V_BCM1480_MC_MAX_AGE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_MAX_AGE)
892#define G_BCM1480_MC_MAX_AGE(x) _SB_GETVALUE(x,S_BCM1480_MC_MAX_AGE,M_BCM1480_MC_MAX_AGE) 892#define G_BCM1480_MC_MAX_AGE(x) _SB_GETVALUE(x, S_BCM1480_MC_MAX_AGE, M_BCM1480_MC_MAX_AGE)
893 893
894#define M_BCM1480_MC_BERR_DISABLE _SB_MAKEMASK1(29) 894#define M_BCM1480_MC_BERR_DISABLE _SB_MAKEMASK1(29)
895#define M_BCM1480_MC_FORCE_SEQ _SB_MAKEMASK1(30) 895#define M_BCM1480_MC_FORCE_SEQ _SB_MAKEMASK1(30)
896#define M_BCM1480_MC_VGEN _SB_MAKEMASK1(32) 896#define M_BCM1480_MC_VGEN _SB_MAKEMASK1(32)
897 897
898#define S_BCM1480_MC_SLEW 33 898#define S_BCM1480_MC_SLEW 33
899#define M_BCM1480_MC_SLEW _SB_MAKEMASK(2,S_BCM1480_MC_SLEW) 899#define M_BCM1480_MC_SLEW _SB_MAKEMASK(2, S_BCM1480_MC_SLEW)
900#define V_BCM1480_MC_SLEW(x) _SB_MAKEVALUE(x,S_BCM1480_MC_SLEW) 900#define V_BCM1480_MC_SLEW(x) _SB_MAKEVALUE(x, S_BCM1480_MC_SLEW)
901#define G_BCM1480_MC_SLEW(x) _SB_GETVALUE(x,S_BCM1480_MC_SLEW,M_BCM1480_MC_SLEW) 901#define G_BCM1480_MC_SLEW(x) _SB_GETVALUE(x, S_BCM1480_MC_SLEW, M_BCM1480_MC_SLEW)
902 902
903#define M_BCM1480_MC_SSTL_VOLTAGE _SB_MAKEMASK1(35) 903#define M_BCM1480_MC_SSTL_VOLTAGE _SB_MAKEMASK1(35)
904 904
@@ -907,19 +907,19 @@
907 */ 907 */
908 908
909#define S_BCM1480_MC_INTLV0 0 909#define S_BCM1480_MC_INTLV0 0
910#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV0) 910#define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV0)
911#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV0) 911#define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0)
912#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV0,M_BCM1480_MC_INTLV0) 912#define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0)
913 913
914#define S_BCM1480_MC_INTLV1 8 914#define S_BCM1480_MC_INTLV1 8
915#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6,S_BCM1480_MC_INTLV1) 915#define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV1)
916#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV1) 916#define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1)
917#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV1,M_BCM1480_MC_INTLV1) 917#define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1)
918 918
919#define S_BCM1480_MC_INTLV_MODE 16 919#define S_BCM1480_MC_INTLV_MODE 16
920#define M_BCM1480_MC_INTLV_MODE _SB_MAKEMASK(3,S_BCM1480_MC_INTLV_MODE) 920#define M_BCM1480_MC_INTLV_MODE _SB_MAKEMASK(3, S_BCM1480_MC_INTLV_MODE)
921#define V_BCM1480_MC_INTLV_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_MC_INTLV_MODE) 921#define V_BCM1480_MC_INTLV_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV_MODE)
922#define G_BCM1480_MC_INTLV_MODE(x) _SB_GETVALUE(x,S_BCM1480_MC_INTLV_MODE,M_BCM1480_MC_INTLV_MODE) 922#define G_BCM1480_MC_INTLV_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV_MODE, M_BCM1480_MC_INTLV_MODE)
923 923
924#define K_BCM1480_MC_INTLV_MODE_NONE 0x0 924#define K_BCM1480_MC_INTLV_MODE_NONE 0x0
925#define K_BCM1480_MC_INTLV_MODE_01 0x1 925#define K_BCM1480_MC_INTLV_MODE_01 0x1
@@ -938,9 +938,9 @@
938 */ 938 */
939 939
940#define S_BCM1480_MC_ECC_ERR_ADDR 0 940#define S_BCM1480_MC_ECC_ERR_ADDR 0
941#define M_BCM1480_MC_ECC_ERR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_ERR_ADDR) 941#define M_BCM1480_MC_ECC_ERR_ADDR _SB_MAKEMASK(37, S_BCM1480_MC_ECC_ERR_ADDR)
942#define V_BCM1480_MC_ECC_ERR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR) 942#define V_BCM1480_MC_ECC_ERR_ADDR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_ERR_ADDR)
943#define G_BCM1480_MC_ECC_ERR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_ERR_ADDR,M_BCM1480_MC_ECC_ERR_ADDR) 943#define G_BCM1480_MC_ECC_ERR_ADDR(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_ERR_ADDR, M_BCM1480_MC_ECC_ERR_ADDR)
944 944
945#if SIBYTE_HDR_FEATURE(1480, PASS2) 945#if SIBYTE_HDR_FEATURE(1480, PASS2)
946#define M_BCM1480_MC_ECC_ERR_RMW _SB_MAKEMASK1(60) 946#define M_BCM1480_MC_ECC_ERR_RMW _SB_MAKEMASK1(60)
@@ -955,27 +955,27 @@
955 */ 955 */
956 956
957#define S_BCM1480_MC_ECC_CORR_ADDR 0 957#define S_BCM1480_MC_ECC_CORR_ADDR 0
958#define M_BCM1480_MC_ECC_CORR_ADDR _SB_MAKEMASK(37,S_BCM1480_MC_ECC_CORR_ADDR) 958#define M_BCM1480_MC_ECC_CORR_ADDR _SB_MAKEMASK(37, S_BCM1480_MC_ECC_CORR_ADDR)
959#define V_BCM1480_MC_ECC_CORR_ADDR(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR) 959#define V_BCM1480_MC_ECC_CORR_ADDR(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_CORR_ADDR)
960#define G_BCM1480_MC_ECC_CORR_ADDR(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORR_ADDR,M_BCM1480_MC_ECC_CORR_ADDR) 960#define G_BCM1480_MC_ECC_CORR_ADDR(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_CORR_ADDR, M_BCM1480_MC_ECC_CORR_ADDR)
961 961
962/* 962/*
963 * Global ECC Correction Register (Table 103) 963 * Global ECC Correction Register (Table 103)
964 */ 964 */
965 965
966#define S_BCM1480_MC_ECC_CORRECT 0 966#define S_BCM1480_MC_ECC_CORRECT 0
967#define M_BCM1480_MC_ECC_CORRECT _SB_MAKEMASK(64,S_BCM1480_MC_ECC_CORRECT) 967#define M_BCM1480_MC_ECC_CORRECT _SB_MAKEMASK(64, S_BCM1480_MC_ECC_CORRECT)
968#define V_BCM1480_MC_ECC_CORRECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_ECC_CORRECT) 968#define V_BCM1480_MC_ECC_CORRECT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_ECC_CORRECT)
969#define G_BCM1480_MC_ECC_CORRECT(x) _SB_GETVALUE(x,S_BCM1480_MC_ECC_CORRECT,M_BCM1480_MC_ECC_CORRECT) 969#define G_BCM1480_MC_ECC_CORRECT(x) _SB_GETVALUE(x, S_BCM1480_MC_ECC_CORRECT, M_BCM1480_MC_ECC_CORRECT)
970 970
971/* 971/*
972 * Global ECC Performance Counters Control Register (Table 104) 972 * Global ECC Performance Counters Control Register (Table 104)
973 */ 973 */
974 974
975#define S_BCM1480_MC_CHANNEL_SELECT 0 975#define S_BCM1480_MC_CHANNEL_SELECT 0
976#define M_BCM1480_MC_CHANNEL_SELECT _SB_MAKEMASK(4,S_BCM1480_MC_CHANNEL_SELECT) 976#define M_BCM1480_MC_CHANNEL_SELECT _SB_MAKEMASK(4, S_BCM1480_MC_CHANNEL_SELECT)
977#define V_BCM1480_MC_CHANNEL_SELECT(x) _SB_MAKEVALUE(x,S_BCM1480_MC_CHANNEL_SELECT) 977#define V_BCM1480_MC_CHANNEL_SELECT(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CHANNEL_SELECT)
978#define G_BCM1480_MC_CHANNEL_SELECT(x) _SB_GETVALUE(x,S_BCM1480_MC_CHANNEL_SELECT,M_BCM1480_MC_CHANNEL_SELECT) 978#define G_BCM1480_MC_CHANNEL_SELECT(x) _SB_GETVALUE(x, S_BCM1480_MC_CHANNEL_SELECT, M_BCM1480_MC_CHANNEL_SELECT)
979#define K_BCM1480_MC_CHANNEL_SELECT_0 0x1 979#define K_BCM1480_MC_CHANNEL_SELECT_0 0x1
980#define K_BCM1480_MC_CHANNEL_SELECT_1 0x2 980#define K_BCM1480_MC_CHANNEL_SELECT_1 0x2
981#define K_BCM1480_MC_CHANNEL_SELECT_2 0x4 981#define K_BCM1480_MC_CHANNEL_SELECT_2 0x4
diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h
index c34d36b6b8c2..b4077bb72611 100644
--- a/include/asm-mips/sibyte/bcm1480_regs.h
+++ b/include/asm-mips/sibyte/bcm1480_regs.h
@@ -87,7 +87,7 @@
87#define BCM1480_MC_REGISTER_SPACING 0x1000 87#define BCM1480_MC_REGISTER_SPACING 0x1000
88 88
89#define A_BCM1480_MC_BASE(ctlid) (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING) 89#define A_BCM1480_MC_BASE(ctlid) (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING)
90#define A_BCM1480_MC_REGISTER(ctlid,reg) (A_BCM1480_MC_BASE(ctlid)+(reg)) 90#define A_BCM1480_MC_REGISTER(ctlid, reg) (A_BCM1480_MC_BASE(ctlid)+(reg))
91 91
92#define R_BCM1480_MC_CONFIG 0x0000000100 92#define R_BCM1480_MC_CONFIG 0x0000000100
93#define R_BCM1480_MC_CS_START 0x0000000120 93#define R_BCM1480_MC_CS_START 0x0000000120
@@ -327,7 +327,7 @@
327#define BCM1480_SCD_NUM_WDOGS 4 327#define BCM1480_SCD_NUM_WDOGS 4
328 328
329#define A_BCM1480_SCD_WDOG_BASE(w) (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100) 329#define A_BCM1480_SCD_WDOG_BASE(w) (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100)
330#define A_BCM1480_SCD_WDOG_REGISTER(w,r) (A_BCM1480_SCD_WDOG_BASE(w) + (r)) 330#define A_BCM1480_SCD_WDOG_REGISTER(w, r) (A_BCM1480_SCD_WDOG_BASE(w) + (r))
331 331
332#define A_BCM1480_SCD_WDOG_INIT_2 0x0010022050 332#define A_BCM1480_SCD_WDOG_INIT_2 0x0010022050
333#define A_BCM1480_SCD_WDOG_CNT_2 0x0010022058 333#define A_BCM1480_SCD_WDOG_CNT_2 0x0010022058
@@ -372,7 +372,7 @@
372#define BCM1480_IMR_REGISTER_SPACING_SHIFT 13 372#define BCM1480_IMR_REGISTER_SPACING_SHIFT 13
373 373
374#define A_BCM1480_IMR_MAPPER(cpu) (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING) 374#define A_BCM1480_IMR_MAPPER(cpu) (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)
375#define A_BCM1480_IMR_REGISTER(cpu,reg) (A_BCM1480_IMR_MAPPER(cpu)+(reg)) 375#define A_BCM1480_IMR_REGISTER(cpu, reg) (A_BCM1480_IMR_MAPPER(cpu)+(reg))
376 376
377/* Most IMR registers are 128 bits, implemented as non-contiguous 377/* Most IMR registers are 128 bits, implemented as non-contiguous
378 64-bit registers high (_H) and low (_L) */ 378 64-bit registers high (_H) and low (_L) */
@@ -413,7 +413,7 @@
413 413
414#define A_BCM1480_IMR_ALIAS_MAILBOX(cpu) (A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE + \ 414#define A_BCM1480_IMR_ALIAS_MAILBOX(cpu) (A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE + \
415 (cpu)*BCM1480_IMR_ALIAS_MAILBOX_SPACING) 415 (cpu)*BCM1480_IMR_ALIAS_MAILBOX_SPACING)
416#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER(cpu,reg) (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg)) 416#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER(cpu, reg) (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg))
417 417
418#define R_BCM1480_IMR_ALIAS_MAILBOX_0 0x0000 /* 0x0x0 */ 418#define R_BCM1480_IMR_ALIAS_MAILBOX_0 0x0000 /* 0x0x0 */
419#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET 0x0008 /* 0x0x8 */ 419#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET 0x0008 /* 0x0x8 */
@@ -427,7 +427,7 @@
427#define R_BCM1480_IMR_MAILBOX_SET 0x08 427#define R_BCM1480_IMR_MAILBOX_SET 0x08
428#define R_BCM1480_IMR_MAILBOX_CLR 0x10 428#define R_BCM1480_IMR_MAILBOX_CLR 0x10
429#define R_BCM1480_IMR_MAILBOX_NUM_SPACING 0x20 429#define R_BCM1480_IMR_MAILBOX_NUM_SPACING 0x20
430#define A_BCM1480_MAILBOX_REGISTER(num,reg,cpu) \ 430#define A_BCM1480_MAILBOX_REGISTER(num, reg, cpu) \
431 (A_BCM1480_IMR_CPU0_BASE + \ 431 (A_BCM1480_IMR_CPU0_BASE + \
432 (num * R_BCM1480_IMR_MAILBOX_NUM_SPACING) + \ 432 (num * R_BCM1480_IMR_MAILBOX_NUM_SPACING) + \
433 (cpu * BCM1480_IMR_REGISTER_SPACING) + \ 433 (cpu * BCM1480_IMR_REGISTER_SPACING) + \
@@ -550,7 +550,7 @@
550#define BCM1480_HR_REGISTER_SPACING 0x80000 550#define BCM1480_HR_REGISTER_SPACING 0x80000
551 551
552#define A_BCM1480_HR_BASE(idx) (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING)) 552#define A_BCM1480_HR_BASE(idx) (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING))
553#define A_BCM1480_HR_REGISTER(idx,reg) (A_BCM1480_HR_BASE(idx) + (reg)) 553#define A_BCM1480_HR_REGISTER(idx, reg) (A_BCM1480_HR_BASE(idx) + (reg))
554 554
555#define R_BCM1480_HR_CFG 0x0000000000 555#define R_BCM1480_HR_CFG 0x0000000000
556 556
@@ -599,9 +599,9 @@
599#define BCM1480_PM_NUM_CHANNELS 32 599#define BCM1480_PM_NUM_CHANNELS 32
600 600
601#define A_BCM1480_PMI_LCL_BASE(idx) (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING)) 601#define A_BCM1480_PMI_LCL_BASE(idx) (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
602#define A_BCM1480_PMI_LCL_REGISTER(idx,reg) (A_BCM1480_PMI_LCL_BASE(idx) + (reg)) 602#define A_BCM1480_PMI_LCL_REGISTER(idx, reg) (A_BCM1480_PMI_LCL_BASE(idx) + (reg))
603#define A_BCM1480_PMO_LCL_BASE(idx) (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING)) 603#define A_BCM1480_PMO_LCL_BASE(idx) (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
604#define A_BCM1480_PMO_LCL_REGISTER(idx,reg) (A_BCM1480_PMO_LCL_BASE(idx) + (reg)) 604#define A_BCM1480_PMO_LCL_REGISTER(idx, reg) (A_BCM1480_PMO_LCL_BASE(idx) + (reg))
605 605
606#define BCM1480_PM_INT_PACKING 8 606#define BCM1480_PM_INT_PACKING 8
607#define BCM1480_PM_INT_FUNCTION_SPACING 0x40 607#define BCM1480_PM_INT_FUNCTION_SPACING 0x40
@@ -721,7 +721,7 @@
721#define BCM1480_HSP_REGISTER_SPACING 0x80000 721#define BCM1480_HSP_REGISTER_SPACING 0x80000
722 722
723#define A_BCM1480_HSP_BASE(idx) (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING)) 723#define A_BCM1480_HSP_BASE(idx) (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING))
724#define A_BCM1480_HSP_REGISTER(idx,reg) (A_BCM1480_HSP_BASE(idx) + (reg)) 724#define A_BCM1480_HSP_REGISTER(idx, reg) (A_BCM1480_HSP_BASE(idx) + (reg))
725 725
726#define R_BCM1480_HSP_RX_SPI4_CFG_0 0x0000000000 726#define R_BCM1480_HSP_RX_SPI4_CFG_0 0x0000000000
727#define R_BCM1480_HSP_RX_SPI4_CFG_1 0x0000000008 727#define R_BCM1480_HSP_RX_SPI4_CFG_1 0x0000000008
diff --git a/include/asm-mips/sibyte/bcm1480_scd.h b/include/asm-mips/sibyte/bcm1480_scd.h
index 6111d6dcf117..25ef24cbb92a 100644
--- a/include/asm-mips/sibyte/bcm1480_scd.h
+++ b/include/asm-mips/sibyte/bcm1480_scd.h
@@ -99,22 +99,22 @@
99#define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5) 99#define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5)
100 100
101#define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6) 101#define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6)
102#define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV) 102#define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_PLL_DIV)
103#define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_PLL_DIV) 103#define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV)
104#define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_PLL_DIV,M_BCM1480_SYS_PLL_DIV) 104#define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PLL_DIV)
105 105
106#define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11) 106#define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11)
107#define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV) 107#define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_SW_DIV)
108#define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_SW_DIV) 108#define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV)
109#define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x,S_BCM1480_SYS_SW_DIV,M_BCM1480_SYS_SW_DIV) 109#define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_DIV)
110 110
111#define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) 111#define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
112#define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17) 112#define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17)
113 113
114#define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18) 114#define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18)
115#define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE) 115#define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2, S_BCM1480_SYS_BOOT_MODE)
116#define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_BOOT_MODE) 116#define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE)
117#define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_BCM1480_SYS_BOOT_MODE,M_BCM1480_SYS_BOOT_MODE) 117#define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_BOOT_MODE)
118#define K_BCM1480_SYS_BOOT_MODE_ROM32 0 118#define K_BCM1480_SYS_BOOT_MODE_ROM32 0
119#define K_BCM1480_SYS_BOOT_MODE_ROM8 1 119#define K_BCM1480_SYS_BOOT_MODE_ROM8 1
120#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2 120#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2
@@ -129,16 +129,16 @@
129#define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25) 129#define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25)
130 130
131#define S_BCM1480_SYS_CONFIG 26 131#define S_BCM1480_SYS_CONFIG 26
132#define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG) 132#define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6, S_BCM1480_SYS_CONFIG)
133#define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_CONFIG) 133#define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG)
134#define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x,S_BCM1480_SYS_CONFIG,M_BCM1480_SYS_CONFIG) 134#define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CONFIG)
135 135
136#define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32,15) 136#define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32, 15)
137 137
138#define S_BCM1480_SYS_NODEID 47 138#define S_BCM1480_SYS_NODEID 47
139#define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID) 139#define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4, S_BCM1480_SYS_NODEID)
140#define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x,S_BCM1480_SYS_NODEID) 140#define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID)
141#define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x,S_BCM1480_SYS_NODEID,M_BCM1480_SYS_NODEID) 141#define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NODEID)
142 142
143#define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51) 143#define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51)
144#define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52) 144#define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52)
@@ -196,9 +196,9 @@
196#define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0) 196#define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0)
197 197
198#define S_BCM1480_SCD_WDOG_RESET_TYPE 2 198#define S_BCM1480_SCD_WDOG_RESET_TYPE 2
199#define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE) 199#define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5, S_BCM1480_SCD_WDOG_RESET_TYPE)
200#define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE) 200#define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE)
201#define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE,M_BCM1480_SCD_WDOG_RESET_TYPE) 201#define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE, M_BCM1480_SCD_WDOG_RESET_TYPE)
202 202
203#define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */ 203#define K_BCM1480_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */
204#define K_BCM1480_SCD_WDOG_RESET_SOFT 1 204#define K_BCM1480_SCD_WDOG_RESET_SOFT 1
@@ -244,24 +244,24 @@
244 */ 244 */
245 245
246#define S_SPC_CFG_SRC4 32 246#define S_SPC_CFG_SRC4 32
247#define M_SPC_CFG_SRC4 _SB_MAKEMASK(8,S_SPC_CFG_SRC4) 247#define M_SPC_CFG_SRC4 _SB_MAKEMASK(8, S_SPC_CFG_SRC4)
248#define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC4) 248#define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC4)
249#define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x,S_SPC_CFG_SRC4,M_SPC_CFG_SRC4) 249#define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x, S_SPC_CFG_SRC4, M_SPC_CFG_SRC4)
250 250
251#define S_SPC_CFG_SRC5 40 251#define S_SPC_CFG_SRC5 40
252#define M_SPC_CFG_SRC5 _SB_MAKEMASK(8,S_SPC_CFG_SRC5) 252#define M_SPC_CFG_SRC5 _SB_MAKEMASK(8, S_SPC_CFG_SRC5)
253#define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC5) 253#define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC5)
254#define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x,S_SPC_CFG_SRC5,M_SPC_CFG_SRC5) 254#define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x, S_SPC_CFG_SRC5, M_SPC_CFG_SRC5)
255 255
256#define S_SPC_CFG_SRC6 48 256#define S_SPC_CFG_SRC6 48
257#define M_SPC_CFG_SRC6 _SB_MAKEMASK(8,S_SPC_CFG_SRC6) 257#define M_SPC_CFG_SRC6 _SB_MAKEMASK(8, S_SPC_CFG_SRC6)
258#define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC6) 258#define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC6)
259#define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x,S_SPC_CFG_SRC6,M_SPC_CFG_SRC6) 259#define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x, S_SPC_CFG_SRC6, M_SPC_CFG_SRC6)
260 260
261#define S_SPC_CFG_SRC7 56 261#define S_SPC_CFG_SRC7 56
262#define M_SPC_CFG_SRC7 _SB_MAKEMASK(8,S_SPC_CFG_SRC7) 262#define M_SPC_CFG_SRC7 _SB_MAKEMASK(8, S_SPC_CFG_SRC7)
263#define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC7) 263#define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC7)
264#define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x,S_SPC_CFG_SRC7,M_SPC_CFG_SRC7) 264#define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x, S_SPC_CFG_SRC7, M_SPC_CFG_SRC7)
265 265
266/* 266/*
267 * System Performance Counter Control Register (Table 32) 267 * System Performance Counter Control Register (Table 32)
@@ -281,9 +281,9 @@
281 */ 281 */
282 282
283#define S_BCM1480_SPC_CNT_COUNT 0 283#define S_BCM1480_SPC_CNT_COUNT 0
284#define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40,S_BCM1480_SPC_CNT_COUNT) 284#define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40, S_BCM1480_SPC_CNT_COUNT)
285#define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x,S_BCM1480_SPC_CNT_COUNT) 285#define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x, S_BCM1480_SPC_CNT_COUNT)
286#define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x,S_BCM1480_SPC_CNT_COUNT,M_BCM1480_SPC_CNT_COUNT) 286#define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x, S_BCM1480_SPC_CNT_COUNT, M_BCM1480_SPC_CNT_COUNT)
287 287
288#define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40) 288#define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40)
289 289
@@ -322,13 +322,13 @@
322 * slightly different. 322 * slightly different.
323 */ 323 */
324 324
325#define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4,0) 325#define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4, 0)
326#define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40,0) 326#define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40, 0)
327 327
328#define S_BCM1480_ATRAP_CFG_CNT 0 328#define S_BCM1480_ATRAP_CFG_CNT 0
329#define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_BCM1480_ATRAP_CFG_CNT) 329#define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_BCM1480_ATRAP_CFG_CNT)
330#define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CNT) 330#define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CNT)
331#define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CNT,M_BCM1480_ATRAP_CFG_CNT) 331#define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CNT, M_BCM1480_ATRAP_CFG_CNT)
332 332
333#define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) 333#define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3)
334#define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4) 334#define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4)
@@ -337,9 +337,9 @@
337#define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) 337#define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7)
338 338
339#define S_BCM1480_ATRAP_CFG_AGENTID 8 339#define S_BCM1480_ATRAP_CFG_AGENTID 8
340#define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_BCM1480_ATRAP_CFG_AGENTID) 340#define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_BCM1480_ATRAP_CFG_AGENTID)
341#define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID) 341#define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID)
342#define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_AGENTID,M_BCM1480_ATRAP_CFG_AGENTID) 342#define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID, M_BCM1480_ATRAP_CFG_AGENTID)
343 343
344 344
345#define K_BCM1480_BUS_AGENT_CPU0 0 345#define K_BCM1480_BUS_AGENT_CPU0 0
@@ -354,9 +354,9 @@
354#define K_BCM1480_BUS_AGENT_PM 10 354#define K_BCM1480_BUS_AGENT_PM 10
355 355
356#define S_BCM1480_ATRAP_CFG_CATTR 12 356#define S_BCM1480_ATRAP_CFG_CATTR 12
357#define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2,S_BCM1480_ATRAP_CFG_CATTR) 357#define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2, S_BCM1480_ATRAP_CFG_CATTR)
358#define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_BCM1480_ATRAP_CFG_CATTR) 358#define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CATTR)
359#define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_BCM1480_ATRAP_CFG_CATTR,M_BCM1480_ATRAP_CFG_CATTR) 359#define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CATTR, M_BCM1480_ATRAP_CFG_CATTR)
360 360
361#define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0 361#define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0
362#define K_BCM1480_ATRAP_CFG_CATTR_UNC 1 362#define K_BCM1480_ATRAP_CFG_CATTR_UNC 1
@@ -382,9 +382,9 @@
382#define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25) 382#define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25)
383 383
384#define S_BCM1480_SCD_TRSEQ_SWFUNC 26 384#define S_BCM1480_SCD_TRSEQ_SWFUNC 26
385#define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2,S_BCM1480_SCD_TRSEQ_SWFUNC) 385#define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2, S_BCM1480_SCD_TRSEQ_SWFUNC)
386#define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC) 386#define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC)
387#define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRSEQ_SWFUNC,M_BCM1480_SCD_TRSEQ_SWFUNC) 387#define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC, M_BCM1480_SCD_TRSEQ_SWFUNC)
388 388
389/* 389/*
390 * Trace Control Register (Table 49) 390 * Trace Control Register (Table 49)
@@ -395,9 +395,9 @@
395 */ 395 */
396 396
397#define S_BCM1480_SCD_TRACE_CFG_MODE 16 397#define S_BCM1480_SCD_TRACE_CFG_MODE 16
398#define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2,S_BCM1480_SCD_TRACE_CFG_MODE) 398#define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2, S_BCM1480_SCD_TRACE_CFG_MODE)
399#define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE) 399#define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE)
400#define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x,S_BCM1480_SCD_TRACE_CFG_MODE,M_BCM1480_SCD_TRACE_CFG_MODE) 400#define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE, M_BCM1480_SCD_TRACE_CFG_MODE)
401 401
402#define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0 402#define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0
403#define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1 403#define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1
diff --git a/include/asm-mips/sibyte/board.h b/include/asm-mips/sibyte/board.h
index 73bce901a378..da198a1c8c81 100644
--- a/include/asm-mips/sibyte/board.h
+++ b/include/asm-mips/sibyte/board.h
@@ -41,7 +41,7 @@
41#ifdef __ASSEMBLY__ 41#ifdef __ASSEMBLY__
42 42
43#ifdef LEDS_PHYS 43#ifdef LEDS_PHYS
44#define setleds(t0,t1,c0,c1,c2,c3) \ 44#define setleds(t0, t1, c0, c1, c2, c3) \
45 li t0, (LEDS_PHYS|0xa0000000); \ 45 li t0, (LEDS_PHYS|0xa0000000); \
46 li t1, c0; \ 46 li t1, c0; \
47 sb t1, 0x18(t0); \ 47 sb t1, 0x18(t0); \
@@ -52,7 +52,7 @@
52 li t1, c3; \ 52 li t1, c3; \
53 sb t1, 0x00(t0) 53 sb t1, 0x00(t0)
54#else 54#else
55#define setleds(t0,t1,c0,c1,c2,c3) 55#define setleds(t0, t1, c0, c1, c2, c3)
56#endif /* LEDS_PHYS */ 56#endif /* LEDS_PHYS */
57 57
58#else 58#else
diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
index a885491217c1..09365f9111fa 100644
--- a/include/asm-mips/sibyte/sb1250_defs.h
+++ b/include/asm-mips/sibyte/sb1250_defs.h
@@ -232,18 +232,18 @@
232 * Make a mask for 'v' bits at position 'n' 232 * Make a mask for 'v' bits at position 'n'
233 */ 233 */
234 234
235#define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n)) 235#define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
236#define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n)) 236#define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
237 237
238/* 238/*
239 * Make a value at 'v' at bit position 'n' 239 * Make a value at 'v' at bit position 'n'
240 */ 240 */
241 241
242#define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n)) 242#define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
243#define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n)) 243#define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
244 244
245#define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n)) 245#define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
246#define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n)) 246#define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
247 247
248/* 248/*
249 * Macros to read/write on-chip registers 249 * Macros to read/write on-chip registers
@@ -252,7 +252,7 @@
252 252
253 253
254#if defined(__mips64) && !defined(__ASSEMBLY__) 254#if defined(__mips64) && !defined(__ASSEMBLY__)
255#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) 255#define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
256#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) 256#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
257#endif /* __ASSEMBLY__ */ 257#endif /* __ASSEMBLY__ */
258 258
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h
index e6145f524fbd..bad56171d747 100644
--- a/include/asm-mips/sibyte/sb1250_dma.h
+++ b/include/asm-mips/sibyte/sb1250_dma.h
@@ -57,9 +57,9 @@
57#define M_DMA_RESERVED1 _SB_MAKEMASK1(2) 57#define M_DMA_RESERVED1 _SB_MAKEMASK1(2)
58 58
59#define S_DMA_DESC_TYPE _SB_MAKE64(1) 59#define S_DMA_DESC_TYPE _SB_MAKE64(1)
60#define M_DMA_DESC_TYPE _SB_MAKEMASK(2,S_DMA_DESC_TYPE) 60#define M_DMA_DESC_TYPE _SB_MAKEMASK(2, S_DMA_DESC_TYPE)
61#define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x,S_DMA_DESC_TYPE) 61#define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x, S_DMA_DESC_TYPE)
62#define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x,S_DMA_DESC_TYPE,M_DMA_DESC_TYPE) 62#define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x, S_DMA_DESC_TYPE, M_DMA_DESC_TYPE)
63 63
64#define K_DMA_DESC_TYPE_RING_AL 0 64#define K_DMA_DESC_TYPE_RING_AL 0
65#define K_DMA_DESC_TYPE_CHAIN_AL 1 65#define K_DMA_DESC_TYPE_CHAIN_AL 1
@@ -76,24 +76,24 @@
76#define M_DMA_TDX_EN _SB_MAKEMASK1(7) 76#define M_DMA_TDX_EN _SB_MAKEMASK1(7)
77 77
78#define S_DMA_INT_PKTCNT _SB_MAKE64(8) 78#define S_DMA_INT_PKTCNT _SB_MAKE64(8)
79#define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT) 79#define M_DMA_INT_PKTCNT _SB_MAKEMASK(8, S_DMA_INT_PKTCNT)
80#define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x,S_DMA_INT_PKTCNT) 80#define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x, S_DMA_INT_PKTCNT)
81#define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x,S_DMA_INT_PKTCNT,M_DMA_INT_PKTCNT) 81#define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x, S_DMA_INT_PKTCNT, M_DMA_INT_PKTCNT)
82 82
83#define S_DMA_RINGSZ _SB_MAKE64(16) 83#define S_DMA_RINGSZ _SB_MAKE64(16)
84#define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ) 84#define M_DMA_RINGSZ _SB_MAKEMASK(16, S_DMA_RINGSZ)
85#define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x,S_DMA_RINGSZ) 85#define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x, S_DMA_RINGSZ)
86#define G_DMA_RINGSZ(x) _SB_GETVALUE(x,S_DMA_RINGSZ,M_DMA_RINGSZ) 86#define G_DMA_RINGSZ(x) _SB_GETVALUE(x, S_DMA_RINGSZ, M_DMA_RINGSZ)
87 87
88#define S_DMA_HIGH_WATERMARK _SB_MAKE64(32) 88#define S_DMA_HIGH_WATERMARK _SB_MAKE64(32)
89#define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK) 89#define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16, S_DMA_HIGH_WATERMARK)
90#define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_HIGH_WATERMARK) 90#define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_HIGH_WATERMARK)
91#define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x,S_DMA_HIGH_WATERMARK,M_DMA_HIGH_WATERMARK) 91#define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x, S_DMA_HIGH_WATERMARK, M_DMA_HIGH_WATERMARK)
92 92
93#define S_DMA_LOW_WATERMARK _SB_MAKE64(48) 93#define S_DMA_LOW_WATERMARK _SB_MAKE64(48)
94#define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK) 94#define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16, S_DMA_LOW_WATERMARK)
95#define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x,S_DMA_LOW_WATERMARK) 95#define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_LOW_WATERMARK)
96#define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x,S_DMA_LOW_WATERMARK,M_DMA_LOW_WATERMARK) 96#define G_DMA_LOW_WATERMARK(x) _SB_GETVALUE(x, S_DMA_LOW_WATERMARK, M_DMA_LOW_WATERMARK)
97 97
98/* 98/*
99 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) 99 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
@@ -116,37 +116,37 @@
116#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7) 116#define M_DMA_TX_FC_PAUSE_EN _SB_MAKEMASK1(7)
117#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 117#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
118 118
119#define M_DMA_MBZ1 _SB_MAKEMASK(6,15) 119#define M_DMA_MBZ1 _SB_MAKEMASK(6, 15)
120 120
121#define S_DMA_HDR_SIZE _SB_MAKE64(21) 121#define S_DMA_HDR_SIZE _SB_MAKE64(21)
122#define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE) 122#define M_DMA_HDR_SIZE _SB_MAKEMASK(9, S_DMA_HDR_SIZE)
123#define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_HDR_SIZE) 123#define V_DMA_HDR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_HDR_SIZE)
124#define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x,S_DMA_HDR_SIZE,M_DMA_HDR_SIZE) 124#define G_DMA_HDR_SIZE(x) _SB_GETVALUE(x, S_DMA_HDR_SIZE, M_DMA_HDR_SIZE)
125 125
126#define M_DMA_MBZ2 _SB_MAKEMASK(5,32) 126#define M_DMA_MBZ2 _SB_MAKEMASK(5, 32)
127 127
128#define S_DMA_ASICXFR_SIZE _SB_MAKE64(37) 128#define S_DMA_ASICXFR_SIZE _SB_MAKE64(37)
129#define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE) 129#define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9, S_DMA_ASICXFR_SIZE)
130#define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x,S_DMA_ASICXFR_SIZE) 130#define V_DMA_ASICXFR_SIZE(x) _SB_MAKEVALUE(x, S_DMA_ASICXFR_SIZE)
131#define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x,S_DMA_ASICXFR_SIZE,M_DMA_ASICXFR_SIZE) 131#define G_DMA_ASICXFR_SIZE(x) _SB_GETVALUE(x, S_DMA_ASICXFR_SIZE, M_DMA_ASICXFR_SIZE)
132 132
133#define S_DMA_INT_TIMEOUT _SB_MAKE64(48) 133#define S_DMA_INT_TIMEOUT _SB_MAKE64(48)
134#define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT) 134#define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16, S_DMA_INT_TIMEOUT)
135#define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x,S_DMA_INT_TIMEOUT) 135#define V_DMA_INT_TIMEOUT(x) _SB_MAKEVALUE(x, S_DMA_INT_TIMEOUT)
136#define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x,S_DMA_INT_TIMEOUT,M_DMA_INT_TIMEOUT) 136#define G_DMA_INT_TIMEOUT(x) _SB_GETVALUE(x, S_DMA_INT_TIMEOUT, M_DMA_INT_TIMEOUT)
137 137
138/* 138/*
139 * Ethernet and Serial DMA Descriptor base address (Table 7-6) 139 * Ethernet and Serial DMA Descriptor base address (Table 7-6)
140 */ 140 */
141 141
142#define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4,0) 142#define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK(4, 0)
143 143
144 144
145/* 145/*
146 * ASIC Mode Base Address (Table 7-7) 146 * ASIC Mode Base Address (Table 7-7)
147 */ 147 */
148 148
149#define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20,0) 149#define M_DMA_ASIC_BASE_MBZ _SB_MAKEMASK(20, 0)
150 150
151/* 151/*
152 * DMA Descriptor Count Registers (Table 7-8) 152 * DMA Descriptor Count Registers (Table 7-8)
@@ -160,9 +160,9 @@
160 */ 160 */
161 161
162#define S_DMA_CURDSCR_ADDR _SB_MAKE64(0) 162#define S_DMA_CURDSCR_ADDR _SB_MAKE64(0)
163#define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40,S_DMA_CURDSCR_ADDR) 163#define M_DMA_CURDSCR_ADDR _SB_MAKEMASK(40, S_DMA_CURDSCR_ADDR)
164#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40) 164#define S_DMA_CURDSCR_COUNT _SB_MAKE64(40)
165#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16,S_DMA_CURDSCR_COUNT) 165#define M_DMA_CURDSCR_COUNT _SB_MAKEMASK(16, S_DMA_CURDSCR_COUNT)
166 166
167#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 167#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
168#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56) 168#define M_DMA_TX_CH_PAUSE_ON _SB_MAKEMASK1(56)
@@ -173,12 +173,12 @@
173 */ 173 */
174#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 174#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
175#define S_DMA_OODLOST_RX _SB_MAKE64(0) 175#define S_DMA_OODLOST_RX _SB_MAKE64(0)
176#define M_DMA_OODLOST_RX _SB_MAKEMASK(16,S_DMA_OODLOST_RX) 176#define M_DMA_OODLOST_RX _SB_MAKEMASK(16, S_DMA_OODLOST_RX)
177#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x,S_DMA_OODLOST_RX,M_DMA_OODLOST_RX) 177#define G_DMA_OODLOST_RX(x) _SB_GETVALUE(x, S_DMA_OODLOST_RX, M_DMA_OODLOST_RX)
178 178
179#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16) 179#define S_DMA_EOP_COUNT_RX _SB_MAKE64(16)
180#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8,S_DMA_EOP_COUNT_RX) 180#define M_DMA_EOP_COUNT_RX _SB_MAKEMASK(8, S_DMA_EOP_COUNT_RX)
181#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x,S_DMA_EOP_COUNT_RX,M_DMA_EOP_COUNT_RX) 181#define G_DMA_EOP_COUNT_RX(x) _SB_GETVALUE(x, S_DMA_EOP_COUNT_RX, M_DMA_EOP_COUNT_RX)
182#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 182#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
183 183
184/* ********************************************************************* 184/* *********************************************************************
@@ -190,39 +190,39 @@
190 */ 190 */
191 191
192#define S_DMA_DSCRA_OFFSET _SB_MAKE64(0) 192#define S_DMA_DSCRA_OFFSET _SB_MAKE64(0)
193#define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5,S_DMA_DSCRA_OFFSET) 193#define M_DMA_DSCRA_OFFSET _SB_MAKEMASK(5, S_DMA_DSCRA_OFFSET)
194#define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_OFFSET) 194#define V_DMA_DSCRA_OFFSET(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_OFFSET)
195#define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x,S_DMA_DSCRA_OFFSET,M_DMA_DSCRA_OFFSET) 195#define G_DMA_DSCRA_OFFSET(x) _SB_GETVALUE(x, S_DMA_DSCRA_OFFSET, M_DMA_DSCRA_OFFSET)
196 196
197/* Note: Don't shift the address over, just mask it with the mask below */ 197/* Note: Don't shift the address over, just mask it with the mask below */
198#define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5) 198#define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5)
199#define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35,S_DMA_DSCRA_A_ADDR) 199#define M_DMA_DSCRA_A_ADDR _SB_MAKEMASK(35, S_DMA_DSCRA_A_ADDR)
200 200
201#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR) 201#define M_DMA_DSCRA_A_ADDR_OFFSET (M_DMA_DSCRA_OFFSET | M_DMA_DSCRA_A_ADDR)
202 202
203#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 203#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
204#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0) 204#define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0)
205#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40,S_DMA_DSCRA_A_ADDR_UA) 205#define M_DMA_DSCRA_A_ADDR_UA _SB_MAKEMASK(40, S_DMA_DSCRA_A_ADDR_UA)
206#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 206#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
207 207
208#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40) 208#define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40)
209#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9,S_DMA_DSCRA_A_SIZE) 209#define M_DMA_DSCRA_A_SIZE _SB_MAKEMASK(9, S_DMA_DSCRA_A_SIZE)
210#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_A_SIZE) 210#define V_DMA_DSCRA_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_A_SIZE)
211#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRA_A_SIZE,M_DMA_DSCRA_A_SIZE) 211#define G_DMA_DSCRA_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRA_A_SIZE, M_DMA_DSCRA_A_SIZE)
212 212
213#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 213#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
214#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40) 214#define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40)
215#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8,S_DMA_DSCRA_DSCR_CNT) 215#define M_DMA_DSCRA_DSCR_CNT _SB_MAKEMASK(8, S_DMA_DSCRA_DSCR_CNT)
216#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x,S_DMA_DSCRA_DSCR_CNT,M_DMA_DSCRA_DSCR_CNT) 216#define G_DMA_DSCRA_DSCR_CNT(x) _SB_GETVALUE(x, S_DMA_DSCRA_DSCR_CNT, M_DMA_DSCRA_DSCR_CNT)
217#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 217#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
218 218
219#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49) 219#define M_DMA_DSCRA_INTERRUPT _SB_MAKEMASK1(49)
220#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50) 220#define M_DMA_DSCRA_OFFSETB _SB_MAKEMASK1(50)
221 221
222#define S_DMA_DSCRA_STATUS _SB_MAKE64(51) 222#define S_DMA_DSCRA_STATUS _SB_MAKE64(51)
223#define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13,S_DMA_DSCRA_STATUS) 223#define M_DMA_DSCRA_STATUS _SB_MAKEMASK(13, S_DMA_DSCRA_STATUS)
224#define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRA_STATUS) 224#define V_DMA_DSCRA_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRA_STATUS)
225#define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRA_STATUS,M_DMA_DSCRA_STATUS) 225#define G_DMA_DSCRA_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRA_STATUS, M_DMA_DSCRA_STATUS)
226 226
227/* 227/*
228 * Descriptor doubleword "B" (Table 7-13) 228 * Descriptor doubleword "B" (Table 7-13)
@@ -230,49 +230,49 @@
230 230
231 231
232#define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0) 232#define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0)
233#define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4,S_DMA_DSCRB_OPTIONS) 233#define M_DMA_DSCRB_OPTIONS _SB_MAKEMASK(4, S_DMA_DSCRB_OPTIONS)
234#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_OPTIONS) 234#define V_DMA_DSCRB_OPTIONS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_OPTIONS)
235#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x,S_DMA_DSCRB_OPTIONS,M_DMA_DSCRB_OPTIONS) 235#define G_DMA_DSCRB_OPTIONS(x) _SB_GETVALUE(x, S_DMA_DSCRB_OPTIONS, M_DMA_DSCRB_OPTIONS)
236 236
237#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 237#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
238#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8) 238#define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8)
239#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_A_SIZE) 239#define M_DMA_DSCRB_A_SIZE _SB_MAKEMASK(14, S_DMA_DSCRB_A_SIZE)
240#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_A_SIZE) 240#define V_DMA_DSCRB_A_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_A_SIZE)
241#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_A_SIZE,M_DMA_DSCRB_A_SIZE) 241#define G_DMA_DSCRB_A_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_A_SIZE, M_DMA_DSCRB_A_SIZE)
242#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 242#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
243 243
244#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10) 244#define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10)
245 245
246/* Note: Don't shift the address over, just mask it with the mask below */ 246/* Note: Don't shift the address over, just mask it with the mask below */
247#define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5) 247#define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5)
248#define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35,S_DMA_DSCRB_B_ADDR) 248#define M_DMA_DSCRB_B_ADDR _SB_MAKEMASK(35, S_DMA_DSCRB_B_ADDR)
249 249
250#define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40) 250#define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40)
251#define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9,S_DMA_DSCRB_B_SIZE) 251#define M_DMA_DSCRB_B_SIZE _SB_MAKEMASK(9, S_DMA_DSCRB_B_SIZE)
252#define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_B_SIZE) 252#define V_DMA_DSCRB_B_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_B_SIZE)
253#define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_B_SIZE,M_DMA_DSCRB_B_SIZE) 253#define G_DMA_DSCRB_B_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_B_SIZE, M_DMA_DSCRB_B_SIZE)
254 254
255#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49) 255#define M_DMA_DSCRB_B_VALID _SB_MAKEMASK1(49)
256 256
257#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 257#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
258#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48) 258#define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48)
259#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2,S_DMA_DSCRB_PKT_SIZE_MSB) 259#define M_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKEMASK(2, S_DMA_DSCRB_PKT_SIZE_MSB)
260#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB) 260#define V_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB)
261#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE_MSB,M_DMA_DSCRB_PKT_SIZE_MSB) 261#define G_DMA_DSCRB_PKT_SIZE_MSB(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE_MSB, M_DMA_DSCRB_PKT_SIZE_MSB)
262#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 262#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
263 263
264#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50) 264#define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50)
265#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14,S_DMA_DSCRB_PKT_SIZE) 265#define M_DMA_DSCRB_PKT_SIZE _SB_MAKEMASK(14, S_DMA_DSCRB_PKT_SIZE)
266#define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_PKT_SIZE) 266#define V_DMA_DSCRB_PKT_SIZE(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_PKT_SIZE)
267#define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x,S_DMA_DSCRB_PKT_SIZE,M_DMA_DSCRB_PKT_SIZE) 267#define G_DMA_DSCRB_PKT_SIZE(x) _SB_GETVALUE(x, S_DMA_DSCRB_PKT_SIZE, M_DMA_DSCRB_PKT_SIZE)
268 268
269/* 269/*
270 * from pass2 some bits in dscr_b are also used for rx status 270 * from pass2 some bits in dscr_b are also used for rx status
271 */ 271 */
272#define S_DMA_DSCRB_STATUS _SB_MAKE64(0) 272#define S_DMA_DSCRB_STATUS _SB_MAKE64(0)
273#define M_DMA_DSCRB_STATUS _SB_MAKEMASK(1,S_DMA_DSCRB_STATUS) 273#define M_DMA_DSCRB_STATUS _SB_MAKEMASK(1, S_DMA_DSCRB_STATUS)
274#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) 274#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x, S_DMA_DSCRB_STATUS)
275#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) 275#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x, S_DMA_DSCRB_STATUS, M_DMA_DSCRB_STATUS)
276 276
277/* 277/*
278 * Ethernet Descriptor Status Bits (Table 7-15) 278 * Ethernet Descriptor Status Bits (Table 7-15)
@@ -293,14 +293,14 @@
293#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 293#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
294 294
295#define S_DMA_ETHRX_RXCH 53 295#define S_DMA_ETHRX_RXCH 53
296#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2,S_DMA_ETHRX_RXCH) 296#define M_DMA_ETHRX_RXCH _SB_MAKEMASK(2, S_DMA_ETHRX_RXCH)
297#define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_RXCH) 297#define V_DMA_ETHRX_RXCH(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_RXCH)
298#define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x,S_DMA_ETHRX_RXCH,M_DMA_ETHRX_RXCH) 298#define G_DMA_ETHRX_RXCH(x) _SB_GETVALUE(x, S_DMA_ETHRX_RXCH, M_DMA_ETHRX_RXCH)
299 299
300#define S_DMA_ETHRX_PKTTYPE 55 300#define S_DMA_ETHRX_PKTTYPE 55
301#define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3,S_DMA_ETHRX_PKTTYPE) 301#define M_DMA_ETHRX_PKTTYPE _SB_MAKEMASK(3, S_DMA_ETHRX_PKTTYPE)
302#define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x,S_DMA_ETHRX_PKTTYPE) 302#define V_DMA_ETHRX_PKTTYPE(x) _SB_MAKEVALUE(x, S_DMA_ETHRX_PKTTYPE)
303#define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x,S_DMA_ETHRX_PKTTYPE,M_DMA_ETHRX_PKTTYPE) 303#define G_DMA_ETHRX_PKTTYPE(x) _SB_GETVALUE(x, S_DMA_ETHRX_PKTTYPE, M_DMA_ETHRX_PKTTYPE)
304 304
305#define K_DMA_ETHRX_PKTTYPE_IPV4 0 305#define K_DMA_ETHRX_PKTTYPE_IPV4 0
306#define K_DMA_ETHRX_PKTTYPE_ARPV4 1 306#define K_DMA_ETHRX_PKTTYPE_ARPV4 1
@@ -385,21 +385,21 @@
385 * Register: DM_DSCR_BASE_3 385 * Register: DM_DSCR_BASE_3
386 */ 386 */
387 387
388#define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(4,0) 388#define M_DM_DSCR_BASE_MBZ _SB_MAKEMASK(4, 0)
389 389
390/* Note: Just mask the base address and then OR it in. */ 390/* Note: Just mask the base address and then OR it in. */
391#define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4) 391#define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4)
392#define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36,S_DM_DSCR_BASE_ADDR) 392#define M_DM_DSCR_BASE_ADDR _SB_MAKEMASK(36, S_DM_DSCR_BASE_ADDR)
393 393
394#define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40) 394#define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40)
395#define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16,S_DM_DSCR_BASE_RINGSZ) 395#define M_DM_DSCR_BASE_RINGSZ _SB_MAKEMASK(16, S_DM_DSCR_BASE_RINGSZ)
396#define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_RINGSZ) 396#define V_DM_DSCR_BASE_RINGSZ(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_RINGSZ)
397#define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_RINGSZ,M_DM_DSCR_BASE_RINGSZ) 397#define G_DM_DSCR_BASE_RINGSZ(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_RINGSZ, M_DM_DSCR_BASE_RINGSZ)
398 398
399#define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56) 399#define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56)
400#define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3,S_DM_DSCR_BASE_PRIORITY) 400#define M_DM_DSCR_BASE_PRIORITY _SB_MAKEMASK(3, S_DM_DSCR_BASE_PRIORITY)
401#define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x,S_DM_DSCR_BASE_PRIORITY) 401#define V_DM_DSCR_BASE_PRIORITY(x) _SB_MAKEVALUE(x, S_DM_DSCR_BASE_PRIORITY)
402#define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x,S_DM_DSCR_BASE_PRIORITY,M_DM_DSCR_BASE_PRIORITY) 402#define G_DM_DSCR_BASE_PRIORITY(x) _SB_GETVALUE(x, S_DM_DSCR_BASE_PRIORITY, M_DM_DSCR_BASE_PRIORITY)
403 403
404#define K_DM_DSCR_BASE_PRIORITY_1 0 404#define K_DM_DSCR_BASE_PRIORITY_1 0
405#define K_DM_DSCR_BASE_PRIORITY_2 1 405#define K_DM_DSCR_BASE_PRIORITY_2 1
@@ -429,12 +429,12 @@
429 */ 429 */
430 430
431#define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0) 431#define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0)
432#define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40,S_DM_CUR_DSCR_DSCR_ADDR) 432#define M_DM_CUR_DSCR_DSCR_ADDR _SB_MAKEMASK(40, S_DM_CUR_DSCR_DSCR_ADDR)
433 433
434#define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48) 434#define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48)
435#define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16,S_DM_CUR_DSCR_DSCR_COUNT) 435#define M_DM_CUR_DSCR_DSCR_COUNT _SB_MAKEMASK(16, S_DM_CUR_DSCR_DSCR_COUNT)
436#define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT) 436#define V_DM_CUR_DSCR_DSCR_COUNT(r) _SB_MAKEVALUE(r, S_DM_CUR_DSCR_DSCR_COUNT)
437#define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r,S_DM_CUR_DSCR_DSCR_COUNT,\ 437#define G_DM_CUR_DSCR_DSCR_COUNT(r) _SB_GETVALUE(r, S_DM_CUR_DSCR_DSCR_COUNT,\
438 M_DM_CUR_DSCR_DSCR_COUNT) 438 M_DM_CUR_DSCR_DSCR_COUNT)
439 439
440 440
@@ -447,15 +447,15 @@
447 * Register: DM_PARTIAL_3 447 * Register: DM_PARTIAL_3
448 */ 448 */
449#define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0) 449#define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0)
450#define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32,S_DM_PARTIAL_CRC_PARTIAL) 450#define M_DM_PARTIAL_CRC_PARTIAL _SB_MAKEMASK(32, S_DM_PARTIAL_CRC_PARTIAL)
451#define V_DM_PARTIAL_CRC_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_CRC_PARTIAL) 451#define V_DM_PARTIAL_CRC_PARTIAL(r) _SB_MAKEVALUE(r, S_DM_PARTIAL_CRC_PARTIAL)
452#define G_DM_PARTIAL_CRC_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_CRC_PARTIAL,\ 452#define G_DM_PARTIAL_CRC_PARTIAL(r) _SB_GETVALUE(r, S_DM_PARTIAL_CRC_PARTIAL,\
453 M_DM_PARTIAL_CRC_PARTIAL) 453 M_DM_PARTIAL_CRC_PARTIAL)
454 454
455#define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32) 455#define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32)
456#define M_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKEMASK(16,S_DM_PARTIAL_TCPCS_PARTIAL) 456#define M_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKEMASK(16, S_DM_PARTIAL_TCPCS_PARTIAL)
457#define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL) 457#define V_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_MAKEVALUE(r, S_DM_PARTIAL_TCPCS_PARTIAL)
458#define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r,S_DM_PARTIAL_TCPCS_PARTIAL,\ 458#define G_DM_PARTIAL_TCPCS_PARTIAL(r) _SB_GETVALUE(r, S_DM_PARTIAL_TCPCS_PARTIAL,\
459 M_DM_PARTIAL_TCPCS_PARTIAL) 459 M_DM_PARTIAL_TCPCS_PARTIAL)
460 460
461#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48) 461#define M_DM_PARTIAL_ODD_BYTE _SB_MAKEMASK1(48)
@@ -469,15 +469,15 @@
469 * Register: CRC_DEF_1 469 * Register: CRC_DEF_1
470 */ 470 */
471#define S_CRC_DEF_CRC_INIT _SB_MAKE64(0) 471#define S_CRC_DEF_CRC_INIT _SB_MAKE64(0)
472#define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32,S_CRC_DEF_CRC_INIT) 472#define M_CRC_DEF_CRC_INIT _SB_MAKEMASK(32, S_CRC_DEF_CRC_INIT)
473#define V_CRC_DEF_CRC_INIT(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_INIT) 473#define V_CRC_DEF_CRC_INIT(r) _SB_MAKEVALUE(r, S_CRC_DEF_CRC_INIT)
474#define G_CRC_DEF_CRC_INIT(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_INIT,\ 474#define G_CRC_DEF_CRC_INIT(r) _SB_GETVALUE(r, S_CRC_DEF_CRC_INIT,\
475 M_CRC_DEF_CRC_INIT) 475 M_CRC_DEF_CRC_INIT)
476 476
477#define S_CRC_DEF_CRC_POLY _SB_MAKE64(32) 477#define S_CRC_DEF_CRC_POLY _SB_MAKE64(32)
478#define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32,S_CRC_DEF_CRC_POLY) 478#define M_CRC_DEF_CRC_POLY _SB_MAKEMASK(32, S_CRC_DEF_CRC_POLY)
479#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r,S_CRC_DEF_CRC_POLY) 479#define V_CRC_DEF_CRC_POLY(r) _SB_MAKEVALUE(r, S_CRC_DEF_CRC_POLY)
480#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r,S_CRC_DEF_CRC_POLY,\ 480#define G_CRC_DEF_CRC_POLY(r) _SB_GETVALUE(r, S_CRC_DEF_CRC_POLY,\
481 M_CRC_DEF_CRC_POLY) 481 M_CRC_DEF_CRC_POLY)
482#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 482#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
483 483
@@ -489,21 +489,21 @@
489 * Register: CTCP_DEF_1 489 * Register: CTCP_DEF_1
490 */ 490 */
491#define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0) 491#define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0)
492#define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32,S_CTCP_DEF_CRC_TXOR) 492#define M_CTCP_DEF_CRC_TXOR _SB_MAKEMASK(32, S_CTCP_DEF_CRC_TXOR)
493#define V_CTCP_DEF_CRC_TXOR(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_TXOR) 493#define V_CTCP_DEF_CRC_TXOR(r) _SB_MAKEVALUE(r, S_CTCP_DEF_CRC_TXOR)
494#define G_CTCP_DEF_CRC_TXOR(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_TXOR,\ 494#define G_CTCP_DEF_CRC_TXOR(r) _SB_GETVALUE(r, S_CTCP_DEF_CRC_TXOR,\
495 M_CTCP_DEF_CRC_TXOR) 495 M_CTCP_DEF_CRC_TXOR)
496 496
497#define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32) 497#define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32)
498#define M_CTCP_DEF_TCPCS_INIT _SB_MAKEMASK(16,S_CTCP_DEF_TCPCS_INIT) 498#define M_CTCP_DEF_TCPCS_INIT _SB_MAKEMASK(16, S_CTCP_DEF_TCPCS_INIT)
499#define V_CTCP_DEF_TCPCS_INIT(r) _SB_MAKEVALUE(r,S_CTCP_DEF_TCPCS_INIT) 499#define V_CTCP_DEF_TCPCS_INIT(r) _SB_MAKEVALUE(r, S_CTCP_DEF_TCPCS_INIT)
500#define G_CTCP_DEF_TCPCS_INIT(r) _SB_GETVALUE(r,S_CTCP_DEF_TCPCS_INIT,\ 500#define G_CTCP_DEF_TCPCS_INIT(r) _SB_GETVALUE(r, S_CTCP_DEF_TCPCS_INIT,\
501 M_CTCP_DEF_TCPCS_INIT) 501 M_CTCP_DEF_TCPCS_INIT)
502 502
503#define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48) 503#define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48)
504#define M_CTCP_DEF_CRC_WIDTH _SB_MAKEMASK(2,S_CTCP_DEF_CRC_WIDTH) 504#define M_CTCP_DEF_CRC_WIDTH _SB_MAKEMASK(2, S_CTCP_DEF_CRC_WIDTH)
505#define V_CTCP_DEF_CRC_WIDTH(r) _SB_MAKEVALUE(r,S_CTCP_DEF_CRC_WIDTH) 505#define V_CTCP_DEF_CRC_WIDTH(r) _SB_MAKEVALUE(r, S_CTCP_DEF_CRC_WIDTH)
506#define G_CTCP_DEF_CRC_WIDTH(r) _SB_GETVALUE(r,S_CTCP_DEF_CRC_WIDTH,\ 506#define G_CTCP_DEF_CRC_WIDTH(r) _SB_GETVALUE(r, S_CTCP_DEF_CRC_WIDTH,\
507 M_CTCP_DEF_CRC_WIDTH) 507 M_CTCP_DEF_CRC_WIDTH)
508 508
509#define K_CTCP_DEF_CRC_WIDTH_4 0 509#define K_CTCP_DEF_CRC_WIDTH_4 0
@@ -519,7 +519,7 @@
519 */ 519 */
520 520
521#define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0) 521#define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0)
522#define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40,S_DM_DSCRA_DST_ADDR) 522#define M_DM_DSCRA_DST_ADDR _SB_MAKEMASK(40, S_DM_DSCRA_DST_ADDR)
523 523
524#define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40) 524#define M_DM_DSCRA_UN_DEST _SB_MAKEMASK1(40)
525#define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41) 525#define M_DM_DSCRA_UN_SRC _SB_MAKEMASK1(41)
@@ -529,30 +529,30 @@
529#endif /* up to 1250 PASS1 */ 529#endif /* up to 1250 PASS1 */
530 530
531#define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44) 531#define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44)
532#define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2,S_DM_DSCRA_DIR_DEST) 532#define M_DM_DSCRA_DIR_DEST _SB_MAKEMASK(2, S_DM_DSCRA_DIR_DEST)
533#define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_DEST) 533#define V_DM_DSCRA_DIR_DEST(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_DEST)
534#define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_DEST,M_DM_DSCRA_DIR_DEST) 534#define G_DM_DSCRA_DIR_DEST(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_DEST, M_DM_DSCRA_DIR_DEST)
535 535
536#define K_DM_DSCRA_DIR_DEST_INCR 0 536#define K_DM_DSCRA_DIR_DEST_INCR 0
537#define K_DM_DSCRA_DIR_DEST_DECR 1 537#define K_DM_DSCRA_DIR_DEST_DECR 1
538#define K_DM_DSCRA_DIR_DEST_CONST 2 538#define K_DM_DSCRA_DIR_DEST_CONST 2
539 539
540#define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR,S_DM_DSCRA_DIR_DEST) 540#define V_DM_DSCRA_DIR_DEST_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_INCR, S_DM_DSCRA_DIR_DEST)
541#define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR,S_DM_DSCRA_DIR_DEST) 541#define V_DM_DSCRA_DIR_DEST_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_DECR, S_DM_DSCRA_DIR_DEST)
542#define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST,S_DM_DSCRA_DIR_DEST) 542#define V_DM_DSCRA_DIR_DEST_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_DEST_CONST, S_DM_DSCRA_DIR_DEST)
543 543
544#define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46) 544#define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46)
545#define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2,S_DM_DSCRA_DIR_SRC) 545#define M_DM_DSCRA_DIR_SRC _SB_MAKEMASK(2, S_DM_DSCRA_DIR_SRC)
546#define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x,S_DM_DSCRA_DIR_SRC) 546#define V_DM_DSCRA_DIR_SRC(x) _SB_MAKEVALUE(x, S_DM_DSCRA_DIR_SRC)
547#define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x,S_DM_DSCRA_DIR_SRC,M_DM_DSCRA_DIR_SRC) 547#define G_DM_DSCRA_DIR_SRC(x) _SB_GETVALUE(x, S_DM_DSCRA_DIR_SRC, M_DM_DSCRA_DIR_SRC)
548 548
549#define K_DM_DSCRA_DIR_SRC_INCR 0 549#define K_DM_DSCRA_DIR_SRC_INCR 0
550#define K_DM_DSCRA_DIR_SRC_DECR 1 550#define K_DM_DSCRA_DIR_SRC_DECR 1
551#define K_DM_DSCRA_DIR_SRC_CONST 2 551#define K_DM_DSCRA_DIR_SRC_CONST 2
552 552
553#define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR,S_DM_DSCRA_DIR_SRC) 553#define V_DM_DSCRA_DIR_SRC_INCR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_INCR, S_DM_DSCRA_DIR_SRC)
554#define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR,S_DM_DSCRA_DIR_SRC) 554#define V_DM_DSCRA_DIR_SRC_DECR _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_DECR, S_DM_DSCRA_DIR_SRC)
555#define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST,S_DM_DSCRA_DIR_SRC) 555#define V_DM_DSCRA_DIR_SRC_CONST _SB_MAKEVALUE(K_DM_DSCRA_DIR_SRC_CONST, S_DM_DSCRA_DIR_SRC)
556 556
557 557
558#define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48) 558#define M_DM_DSCRA_ZERO_MEM _SB_MAKEMASK1(48)
@@ -576,19 +576,19 @@
576#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61) 576#define M_DM_DSCRA_CRC_XBIT _SB_MAKEMASK1(61)
577#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 577#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
578 578
579#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3,61) 579#define M_DM_DSCRA_RESERVED2 _SB_MAKEMASK(3, 61)
580 580
581/* 581/*
582 * Data Mover Descriptor Doubleword "B" (Table 7-25) 582 * Data Mover Descriptor Doubleword "B" (Table 7-25)
583 */ 583 */
584 584
585#define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0) 585#define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0)
586#define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40,S_DM_DSCRB_SRC_ADDR) 586#define M_DM_DSCRB_SRC_ADDR _SB_MAKEMASK(40, S_DM_DSCRB_SRC_ADDR)
587 587
588#define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40) 588#define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40)
589#define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20,S_DM_DSCRB_SRC_LENGTH) 589#define M_DM_DSCRB_SRC_LENGTH _SB_MAKEMASK(20, S_DM_DSCRB_SRC_LENGTH)
590#define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x,S_DM_DSCRB_SRC_LENGTH) 590#define V_DM_DSCRB_SRC_LENGTH(x) _SB_MAKEVALUE(x, S_DM_DSCRB_SRC_LENGTH)
591#define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x,S_DM_DSCRB_SRC_LENGTH,M_DM_DSCRB_SRC_LENGTH) 591#define G_DM_DSCRB_SRC_LENGTH(x) _SB_GETVALUE(x, S_DM_DSCRB_SRC_LENGTH, M_DM_DSCRB_SRC_LENGTH)
592 592
593 593
594#endif 594#endif
diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h
index 1b5cbc5c6454..94e9c7c8e783 100644
--- a/include/asm-mips/sibyte/sb1250_genbus.h
+++ b/include/asm-mips/sibyte/sb1250_genbus.h
@@ -11,7 +11,7 @@
11 * 11 *
12 ********************************************************************* 12 *********************************************************************
13 * 13 *
14 * Copyright 2000,2001,2002,2003 14 * Copyright 2000, 2001, 2002, 2003
15 * Broadcom Corporation. All rights reserved. 15 * Broadcom Corporation. All rights reserved.
16 * 16 *
17 * This program is free software; you can redistribute it and/or 17 * This program is free software; you can redistribute it and/or
@@ -47,7 +47,7 @@
47#define M_IO_ENA_RDY _SB_MAKEMASK1(S_IO_ENA_RDY) 47#define M_IO_ENA_RDY _SB_MAKEMASK1(S_IO_ENA_RDY)
48 48
49#define S_IO_WIDTH_SEL 2 49#define S_IO_WIDTH_SEL 2
50#define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL) 50#define M_IO_WIDTH_SEL _SB_MAKEMASK(2, S_IO_WIDTH_SEL)
51#define K_IO_WIDTH_SEL_1 0 51#define K_IO_WIDTH_SEL_1 0
52#define K_IO_WIDTH_SEL_2 1 52#define K_IO_WIDTH_SEL_2 1
53#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ 53#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
@@ -55,8 +55,8 @@
55#define K_IO_WIDTH_SEL_1L 2 55#define K_IO_WIDTH_SEL_1L 2
56#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 56#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
57#define K_IO_WIDTH_SEL_4 3 57#define K_IO_WIDTH_SEL_4 3
58#define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x,S_IO_WIDTH_SEL) 58#define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL)
59#define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x,S_IO_WIDTH_SEL,M_IO_WIDTH_SEL) 59#define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL)
60 60
61#define S_IO_PARITY_ENA 4 61#define S_IO_PARITY_ENA 4
62#define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA) 62#define M_IO_PARITY_ENA _SB_MAKEMASK1(S_IO_PARITY_ENA)
@@ -71,18 +71,18 @@
71#define M_IO_NONMUX _SB_MAKEMASK1(S_IO_NONMUX) 71#define M_IO_NONMUX _SB_MAKEMASK1(S_IO_NONMUX)
72 72
73#define S_IO_TIMEOUT 8 73#define S_IO_TIMEOUT 8
74#define M_IO_TIMEOUT _SB_MAKEMASK(8,S_IO_TIMEOUT) 74#define M_IO_TIMEOUT _SB_MAKEMASK(8, S_IO_TIMEOUT)
75#define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x,S_IO_TIMEOUT) 75#define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT)
76#define G_IO_TIMEOUT(x) _SB_GETVALUE(x,S_IO_TIMEOUT,M_IO_TIMEOUT) 76#define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT)
77 77
78/* 78/*
79 * Generic Bus Region Size register (Table 11-5) 79 * Generic Bus Region Size register (Table 11-5)
80 */ 80 */
81 81
82#define S_IO_MULT_SIZE 0 82#define S_IO_MULT_SIZE 0
83#define M_IO_MULT_SIZE _SB_MAKEMASK(12,S_IO_MULT_SIZE) 83#define M_IO_MULT_SIZE _SB_MAKEMASK(12, S_IO_MULT_SIZE)
84#define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x,S_IO_MULT_SIZE) 84#define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE)
85#define G_IO_MULT_SIZE(x) _SB_GETVALUE(x,S_IO_MULT_SIZE,M_IO_MULT_SIZE) 85#define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE)
86 86
87#define S_IO_REGSIZE 16 /* # bits to shift size for this reg */ 87#define S_IO_REGSIZE 16 /* # bits to shift size for this reg */
88 88
@@ -91,9 +91,9 @@
91 */ 91 */
92 92
93#define S_IO_START_ADDR 0 93#define S_IO_START_ADDR 0
94#define M_IO_START_ADDR _SB_MAKEMASK(14,S_IO_START_ADDR) 94#define M_IO_START_ADDR _SB_MAKEMASK(14, S_IO_START_ADDR)
95#define V_IO_START_ADDR(x) _SB_MAKEVALUE(x,S_IO_START_ADDR) 95#define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR)
96#define G_IO_START_ADDR(x) _SB_GETVALUE(x,S_IO_START_ADDR,M_IO_START_ADDR) 96#define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR)
97 97
98#define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */ 98#define S_IO_ADDRBASE 16 /* # bits to shift addr for this reg */
99 99
@@ -105,9 +105,9 @@
105 */ 105 */
106 106
107#define S_IO_ALE_WIDTH 0 107#define S_IO_ALE_WIDTH 0
108#define M_IO_ALE_WIDTH _SB_MAKEMASK(3,S_IO_ALE_WIDTH) 108#define M_IO_ALE_WIDTH _SB_MAKEMASK(3, S_IO_ALE_WIDTH)
109#define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_ALE_WIDTH) 109#define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_ALE_WIDTH)
110#define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x,S_IO_ALE_WIDTH,M_IO_ALE_WIDTH) 110#define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x, S_IO_ALE_WIDTH, M_IO_ALE_WIDTH)
111 111
112#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ 112#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
113 || SIBYTE_HDR_FEATURE_CHIP(1480) 113 || SIBYTE_HDR_FEATURE_CHIP(1480)
@@ -115,27 +115,27 @@
115#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 115#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
116 116
117#define S_IO_ALE_TO_CS 4 117#define S_IO_ALE_TO_CS 4
118#define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS) 118#define M_IO_ALE_TO_CS _SB_MAKEMASK(2, S_IO_ALE_TO_CS)
119#define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_CS) 119#define V_IO_ALE_TO_CS(x) _SB_MAKEVALUE(x, S_IO_ALE_TO_CS)
120#define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x,S_IO_ALE_TO_CS,M_IO_ALE_TO_CS) 120#define G_IO_ALE_TO_CS(x) _SB_GETVALUE(x, S_IO_ALE_TO_CS, M_IO_ALE_TO_CS)
121 121
122#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ 122#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
123 || SIBYTE_HDR_FEATURE_CHIP(1480) 123 || SIBYTE_HDR_FEATURE_CHIP(1480)
124#define S_IO_BURST_WIDTH _SB_MAKE64(6) 124#define S_IO_BURST_WIDTH _SB_MAKE64(6)
125#define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH) 125#define M_IO_BURST_WIDTH _SB_MAKEMASK(2, S_IO_BURST_WIDTH)
126#define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x,S_IO_BURST_WIDTH) 126#define V_IO_BURST_WIDTH(x) _SB_MAKEVALUE(x, S_IO_BURST_WIDTH)
127#define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x,S_IO_BURST_WIDTH,M_IO_BURST_WIDTH) 127#define G_IO_BURST_WIDTH(x) _SB_GETVALUE(x, S_IO_BURST_WIDTH, M_IO_BURST_WIDTH)
128#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 128#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
129 129
130#define S_IO_CS_WIDTH 8 130#define S_IO_CS_WIDTH 8
131#define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH) 131#define M_IO_CS_WIDTH _SB_MAKEMASK(5, S_IO_CS_WIDTH)
132#define V_IO_CS_WIDTH(x) _SB_MAKEVALUE(x,S_IO_CS_WIDTH) 132#define V_IO_CS_WIDTH(x) _SB_MAKEVALUE(x, S_IO_CS_WIDTH)
133#define G_IO_CS_WIDTH(x) _SB_GETVALUE(x,S_IO_CS_WIDTH,M_IO_CS_WIDTH) 133#define G_IO_CS_WIDTH(x) _SB_GETVALUE(x, S_IO_CS_WIDTH, M_IO_CS_WIDTH)
134 134
135#define S_IO_RDY_SMPLE 13 135#define S_IO_RDY_SMPLE 13
136#define M_IO_RDY_SMPLE _SB_MAKEMASK(3,S_IO_RDY_SMPLE) 136#define M_IO_RDY_SMPLE _SB_MAKEMASK(3, S_IO_RDY_SMPLE)
137#define V_IO_RDY_SMPLE(x) _SB_MAKEVALUE(x,S_IO_RDY_SMPLE) 137#define V_IO_RDY_SMPLE(x) _SB_MAKEVALUE(x, S_IO_RDY_SMPLE)
138#define G_IO_RDY_SMPLE(x) _SB_GETVALUE(x,S_IO_RDY_SMPLE,M_IO_RDY_SMPLE) 138#define G_IO_RDY_SMPLE(x) _SB_GETVALUE(x, S_IO_RDY_SMPLE, M_IO_RDY_SMPLE)
139 139
140 140
141/* 141/*
@@ -143,9 +143,9 @@
143 */ 143 */
144 144
145#define S_IO_ALE_TO_WRITE 0 145#define S_IO_ALE_TO_WRITE 0
146#define M_IO_ALE_TO_WRITE _SB_MAKEMASK(3,S_IO_ALE_TO_WRITE) 146#define M_IO_ALE_TO_WRITE _SB_MAKEMASK(3, S_IO_ALE_TO_WRITE)
147#define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x,S_IO_ALE_TO_WRITE) 147#define V_IO_ALE_TO_WRITE(x) _SB_MAKEVALUE(x, S_IO_ALE_TO_WRITE)
148#define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x,S_IO_ALE_TO_WRITE,M_IO_ALE_TO_WRITE) 148#define G_IO_ALE_TO_WRITE(x) _SB_GETVALUE(x, S_IO_ALE_TO_WRITE, M_IO_ALE_TO_WRITE)
149 149
150#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \ 150#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
151 || SIBYTE_HDR_FEATURE_CHIP(1480) 151 || SIBYTE_HDR_FEATURE_CHIP(1480)
@@ -153,30 +153,30 @@
153#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 153#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
154 154
155#define S_IO_WRITE_WIDTH 4 155#define S_IO_WRITE_WIDTH 4
156#define M_IO_WRITE_WIDTH _SB_MAKEMASK(4,S_IO_WRITE_WIDTH) 156#define M_IO_WRITE_WIDTH _SB_MAKEMASK(4, S_IO_WRITE_WIDTH)
157#define V_IO_WRITE_WIDTH(x) _SB_MAKEVALUE(x,S_IO_WRITE_WIDTH) 157#define V_IO_WRITE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_WRITE_WIDTH)
158#define G_IO_WRITE_WIDTH(x) _SB_GETVALUE(x,S_IO_WRITE_WIDTH,M_IO_WRITE_WIDTH) 158#define G_IO_WRITE_WIDTH(x) _SB_GETVALUE(x, S_IO_WRITE_WIDTH, M_IO_WRITE_WIDTH)
159 159
160#define S_IO_IDLE_CYCLE 8 160#define S_IO_IDLE_CYCLE 8
161#define M_IO_IDLE_CYCLE _SB_MAKEMASK(4,S_IO_IDLE_CYCLE) 161#define M_IO_IDLE_CYCLE _SB_MAKEMASK(4, S_IO_IDLE_CYCLE)
162#define V_IO_IDLE_CYCLE(x) _SB_MAKEVALUE(x,S_IO_IDLE_CYCLE) 162#define V_IO_IDLE_CYCLE(x) _SB_MAKEVALUE(x, S_IO_IDLE_CYCLE)
163#define G_IO_IDLE_CYCLE(x) _SB_GETVALUE(x,S_IO_IDLE_CYCLE,M_IO_IDLE_CYCLE) 163#define G_IO_IDLE_CYCLE(x) _SB_GETVALUE(x, S_IO_IDLE_CYCLE, M_IO_IDLE_CYCLE)
164 164
165#define S_IO_OE_TO_CS 12 165#define S_IO_OE_TO_CS 12
166#define M_IO_OE_TO_CS _SB_MAKEMASK(2,S_IO_OE_TO_CS) 166#define M_IO_OE_TO_CS _SB_MAKEMASK(2, S_IO_OE_TO_CS)
167#define V_IO_OE_TO_CS(x) _SB_MAKEVALUE(x,S_IO_OE_TO_CS) 167#define V_IO_OE_TO_CS(x) _SB_MAKEVALUE(x, S_IO_OE_TO_CS)
168#define G_IO_OE_TO_CS(x) _SB_GETVALUE(x,S_IO_OE_TO_CS,M_IO_OE_TO_CS) 168#define G_IO_OE_TO_CS(x) _SB_GETVALUE(x, S_IO_OE_TO_CS, M_IO_OE_TO_CS)
169 169
170#define S_IO_CS_TO_OE 14 170#define S_IO_CS_TO_OE 14
171#define M_IO_CS_TO_OE _SB_MAKEMASK(2,S_IO_CS_TO_OE) 171#define M_IO_CS_TO_OE _SB_MAKEMASK(2, S_IO_CS_TO_OE)
172#define V_IO_CS_TO_OE(x) _SB_MAKEVALUE(x,S_IO_CS_TO_OE) 172#define V_IO_CS_TO_OE(x) _SB_MAKEVALUE(x, S_IO_CS_TO_OE)
173#define G_IO_CS_TO_OE(x) _SB_GETVALUE(x,S_IO_CS_TO_OE,M_IO_CS_TO_OE) 173#define G_IO_CS_TO_OE(x) _SB_GETVALUE(x, S_IO_CS_TO_OE, M_IO_CS_TO_OE)
174 174
175/* 175/*
176 * Generic Bus Interrupt Status Register (Table 11-9) 176 * Generic Bus Interrupt Status Register (Table 11-9)
177 */ 177 */
178 178
179#define M_IO_CS_ERR_INT _SB_MAKEMASK(0,8) 179#define M_IO_CS_ERR_INT _SB_MAKEMASK(0, 8)
180#define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0) 180#define M_IO_CS0_ERR_INT _SB_MAKEMASK1(0)
181#define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1) 181#define M_IO_CS1_ERR_INT _SB_MAKEMASK1(1)
182#define M_IO_CS2_ERR_INT _SB_MAKEMASK1(2) 182#define M_IO_CS2_ERR_INT _SB_MAKEMASK1(2)
@@ -200,116 +200,116 @@
200 */ 200 */
201 201
202#define S_IO_SLEW0 0 202#define S_IO_SLEW0 0
203#define M_IO_SLEW0 _SB_MAKEMASK(2,S_IO_SLEW0) 203#define M_IO_SLEW0 _SB_MAKEMASK(2, S_IO_SLEW0)
204#define V_IO_SLEW0(x) _SB_MAKEVALUE(x,S_IO_SLEW0) 204#define V_IO_SLEW0(x) _SB_MAKEVALUE(x, S_IO_SLEW0)
205#define G_IO_SLEW0(x) _SB_GETVALUE(x,S_IO_SLEW0,M_IO_SLEW0) 205#define G_IO_SLEW0(x) _SB_GETVALUE(x, S_IO_SLEW0, M_IO_SLEW0)
206 206
207#define S_IO_DRV_A 2 207#define S_IO_DRV_A 2
208#define M_IO_DRV_A _SB_MAKEMASK(2,S_IO_DRV_A) 208#define M_IO_DRV_A _SB_MAKEMASK(2, S_IO_DRV_A)
209#define V_IO_DRV_A(x) _SB_MAKEVALUE(x,S_IO_DRV_A) 209#define V_IO_DRV_A(x) _SB_MAKEVALUE(x, S_IO_DRV_A)
210#define G_IO_DRV_A(x) _SB_GETVALUE(x,S_IO_DRV_A,M_IO_DRV_A) 210#define G_IO_DRV_A(x) _SB_GETVALUE(x, S_IO_DRV_A, M_IO_DRV_A)
211 211
212#define S_IO_DRV_B 6 212#define S_IO_DRV_B 6
213#define M_IO_DRV_B _SB_MAKEMASK(2,S_IO_DRV_B) 213#define M_IO_DRV_B _SB_MAKEMASK(2, S_IO_DRV_B)
214#define V_IO_DRV_B(x) _SB_MAKEVALUE(x,S_IO_DRV_B) 214#define V_IO_DRV_B(x) _SB_MAKEVALUE(x, S_IO_DRV_B)
215#define G_IO_DRV_B(x) _SB_GETVALUE(x,S_IO_DRV_B,M_IO_DRV_B) 215#define G_IO_DRV_B(x) _SB_GETVALUE(x, S_IO_DRV_B, M_IO_DRV_B)
216 216
217#define S_IO_DRV_C 10 217#define S_IO_DRV_C 10
218#define M_IO_DRV_C _SB_MAKEMASK(2,S_IO_DRV_C) 218#define M_IO_DRV_C _SB_MAKEMASK(2, S_IO_DRV_C)
219#define V_IO_DRV_C(x) _SB_MAKEVALUE(x,S_IO_DRV_C) 219#define V_IO_DRV_C(x) _SB_MAKEVALUE(x, S_IO_DRV_C)
220#define G_IO_DRV_C(x) _SB_GETVALUE(x,S_IO_DRV_C,M_IO_DRV_C) 220#define G_IO_DRV_C(x) _SB_GETVALUE(x, S_IO_DRV_C, M_IO_DRV_C)
221 221
222#define S_IO_DRV_D 14 222#define S_IO_DRV_D 14
223#define M_IO_DRV_D _SB_MAKEMASK(2,S_IO_DRV_D) 223#define M_IO_DRV_D _SB_MAKEMASK(2, S_IO_DRV_D)
224#define V_IO_DRV_D(x) _SB_MAKEVALUE(x,S_IO_DRV_D) 224#define V_IO_DRV_D(x) _SB_MAKEVALUE(x, S_IO_DRV_D)
225#define G_IO_DRV_D(x) _SB_GETVALUE(x,S_IO_DRV_D,M_IO_DRV_D) 225#define G_IO_DRV_D(x) _SB_GETVALUE(x, S_IO_DRV_D, M_IO_DRV_D)
226 226
227/* 227/*
228 * Generic Bus Output Drive Control Register 1 (Table 14-19) 228 * Generic Bus Output Drive Control Register 1 (Table 14-19)
229 */ 229 */
230 230
231#define S_IO_DRV_E 2 231#define S_IO_DRV_E 2
232#define M_IO_DRV_E _SB_MAKEMASK(2,S_IO_DRV_E) 232#define M_IO_DRV_E _SB_MAKEMASK(2, S_IO_DRV_E)
233#define V_IO_DRV_E(x) _SB_MAKEVALUE(x,S_IO_DRV_E) 233#define V_IO_DRV_E(x) _SB_MAKEVALUE(x, S_IO_DRV_E)
234#define G_IO_DRV_E(x) _SB_GETVALUE(x,S_IO_DRV_E,M_IO_DRV_E) 234#define G_IO_DRV_E(x) _SB_GETVALUE(x, S_IO_DRV_E, M_IO_DRV_E)
235 235
236#define S_IO_DRV_F 6 236#define S_IO_DRV_F 6
237#define M_IO_DRV_F _SB_MAKEMASK(2,S_IO_DRV_F) 237#define M_IO_DRV_F _SB_MAKEMASK(2, S_IO_DRV_F)
238#define V_IO_DRV_F(x) _SB_MAKEVALUE(x,S_IO_DRV_F) 238#define V_IO_DRV_F(x) _SB_MAKEVALUE(x, S_IO_DRV_F)
239#define G_IO_DRV_F(x) _SB_GETVALUE(x,S_IO_DRV_F,M_IO_DRV_F) 239#define G_IO_DRV_F(x) _SB_GETVALUE(x, S_IO_DRV_F, M_IO_DRV_F)
240 240
241#define S_IO_SLEW1 8 241#define S_IO_SLEW1 8
242#define M_IO_SLEW1 _SB_MAKEMASK(2,S_IO_SLEW1) 242#define M_IO_SLEW1 _SB_MAKEMASK(2, S_IO_SLEW1)
243#define V_IO_SLEW1(x) _SB_MAKEVALUE(x,S_IO_SLEW1) 243#define V_IO_SLEW1(x) _SB_MAKEVALUE(x, S_IO_SLEW1)
244#define G_IO_SLEW1(x) _SB_GETVALUE(x,S_IO_SLEW1,M_IO_SLEW1) 244#define G_IO_SLEW1(x) _SB_GETVALUE(x, S_IO_SLEW1, M_IO_SLEW1)
245 245
246#define S_IO_DRV_G 10 246#define S_IO_DRV_G 10
247#define M_IO_DRV_G _SB_MAKEMASK(2,S_IO_DRV_G) 247#define M_IO_DRV_G _SB_MAKEMASK(2, S_IO_DRV_G)
248#define V_IO_DRV_G(x) _SB_MAKEVALUE(x,S_IO_DRV_G) 248#define V_IO_DRV_G(x) _SB_MAKEVALUE(x, S_IO_DRV_G)
249#define G_IO_DRV_G(x) _SB_GETVALUE(x,S_IO_DRV_G,M_IO_DRV_G) 249#define G_IO_DRV_G(x) _SB_GETVALUE(x, S_IO_DRV_G, M_IO_DRV_G)
250 250
251#define S_IO_SLEW2 12 251#define S_IO_SLEW2 12
252#define M_IO_SLEW2 _SB_MAKEMASK(2,S_IO_SLEW2) 252#define M_IO_SLEW2 _SB_MAKEMASK(2, S_IO_SLEW2)
253#define V_IO_SLEW2(x) _SB_MAKEVALUE(x,S_IO_SLEW2) 253#define V_IO_SLEW2(x) _SB_MAKEVALUE(x, S_IO_SLEW2)
254#define G_IO_SLEW2(x) _SB_GETVALUE(x,S_IO_SLEW2,M_IO_SLEW2) 254#define G_IO_SLEW2(x) _SB_GETVALUE(x, S_IO_SLEW2, M_IO_SLEW2)
255 255
256#define S_IO_DRV_H 14 256#define S_IO_DRV_H 14
257#define M_IO_DRV_H _SB_MAKEMASK(2,S_IO_DRV_H) 257#define M_IO_DRV_H _SB_MAKEMASK(2, S_IO_DRV_H)
258#define V_IO_DRV_H(x) _SB_MAKEVALUE(x,S_IO_DRV_H) 258#define V_IO_DRV_H(x) _SB_MAKEVALUE(x, S_IO_DRV_H)
259#define G_IO_DRV_H(x) _SB_GETVALUE(x,S_IO_DRV_H,M_IO_DRV_H) 259#define G_IO_DRV_H(x) _SB_GETVALUE(x, S_IO_DRV_H, M_IO_DRV_H)
260 260
261/* 261/*
262 * Generic Bus Output Drive Control Register 2 (Table 14-20) 262 * Generic Bus Output Drive Control Register 2 (Table 14-20)
263 */ 263 */
264 264
265#define S_IO_DRV_J 2 265#define S_IO_DRV_J 2
266#define M_IO_DRV_J _SB_MAKEMASK(2,S_IO_DRV_J) 266#define M_IO_DRV_J _SB_MAKEMASK(2, S_IO_DRV_J)
267#define V_IO_DRV_J(x) _SB_MAKEVALUE(x,S_IO_DRV_J) 267#define V_IO_DRV_J(x) _SB_MAKEVALUE(x, S_IO_DRV_J)
268#define G_IO_DRV_J(x) _SB_GETVALUE(x,S_IO_DRV_J,M_IO_DRV_J) 268#define G_IO_DRV_J(x) _SB_GETVALUE(x, S_IO_DRV_J, M_IO_DRV_J)
269 269
270#define S_IO_DRV_K 6 270#define S_IO_DRV_K 6
271#define M_IO_DRV_K _SB_MAKEMASK(2,S_IO_DRV_K) 271#define M_IO_DRV_K _SB_MAKEMASK(2, S_IO_DRV_K)
272#define V_IO_DRV_K(x) _SB_MAKEVALUE(x,S_IO_DRV_K) 272#define V_IO_DRV_K(x) _SB_MAKEVALUE(x, S_IO_DRV_K)
273#define G_IO_DRV_K(x) _SB_GETVALUE(x,S_IO_DRV_K,M_IO_DRV_K) 273#define G_IO_DRV_K(x) _SB_GETVALUE(x, S_IO_DRV_K, M_IO_DRV_K)
274 274
275#define S_IO_DRV_L 10 275#define S_IO_DRV_L 10
276#define M_IO_DRV_L _SB_MAKEMASK(2,S_IO_DRV_L) 276#define M_IO_DRV_L _SB_MAKEMASK(2, S_IO_DRV_L)
277#define V_IO_DRV_L(x) _SB_MAKEVALUE(x,S_IO_DRV_L) 277#define V_IO_DRV_L(x) _SB_MAKEVALUE(x, S_IO_DRV_L)
278#define G_IO_DRV_L(x) _SB_GETVALUE(x,S_IO_DRV_L,M_IO_DRV_L) 278#define G_IO_DRV_L(x) _SB_GETVALUE(x, S_IO_DRV_L, M_IO_DRV_L)
279 279
280#define S_IO_DRV_M 14 280#define S_IO_DRV_M 14
281#define M_IO_DRV_M _SB_MAKEMASK(2,S_IO_DRV_M) 281#define M_IO_DRV_M _SB_MAKEMASK(2, S_IO_DRV_M)
282#define V_IO_DRV_M(x) _SB_MAKEVALUE(x,S_IO_DRV_M) 282#define V_IO_DRV_M(x) _SB_MAKEVALUE(x, S_IO_DRV_M)
283#define G_IO_DRV_M(x) _SB_GETVALUE(x,S_IO_DRV_M,M_IO_DRV_M) 283#define G_IO_DRV_M(x) _SB_GETVALUE(x, S_IO_DRV_M, M_IO_DRV_M)
284 284
285/* 285/*
286 * Generic Bus Output Drive Control Register 3 (Table 14-21) 286 * Generic Bus Output Drive Control Register 3 (Table 14-21)
287 */ 287 */
288 288
289#define S_IO_SLEW3 0 289#define S_IO_SLEW3 0
290#define M_IO_SLEW3 _SB_MAKEMASK(2,S_IO_SLEW3) 290#define M_IO_SLEW3 _SB_MAKEMASK(2, S_IO_SLEW3)
291#define V_IO_SLEW3(x) _SB_MAKEVALUE(x,S_IO_SLEW3) 291#define V_IO_SLEW3(x) _SB_MAKEVALUE(x, S_IO_SLEW3)
292#define G_IO_SLEW3(x) _SB_GETVALUE(x,S_IO_SLEW3,M_IO_SLEW3) 292#define G_IO_SLEW3(x) _SB_GETVALUE(x, S_IO_SLEW3, M_IO_SLEW3)
293 293
294#define S_IO_DRV_N 2 294#define S_IO_DRV_N 2
295#define M_IO_DRV_N _SB_MAKEMASK(2,S_IO_DRV_N) 295#define M_IO_DRV_N _SB_MAKEMASK(2, S_IO_DRV_N)
296#define V_IO_DRV_N(x) _SB_MAKEVALUE(x,S_IO_DRV_N) 296#define V_IO_DRV_N(x) _SB_MAKEVALUE(x, S_IO_DRV_N)
297#define G_IO_DRV_N(x) _SB_GETVALUE(x,S_IO_DRV_N,M_IO_DRV_N) 297#define G_IO_DRV_N(x) _SB_GETVALUE(x, S_IO_DRV_N, M_IO_DRV_N)
298 298
299#define S_IO_DRV_P 6 299#define S_IO_DRV_P 6
300#define M_IO_DRV_P _SB_MAKEMASK(2,S_IO_DRV_P) 300#define M_IO_DRV_P _SB_MAKEMASK(2, S_IO_DRV_P)
301#define V_IO_DRV_P(x) _SB_MAKEVALUE(x,S_IO_DRV_P) 301#define V_IO_DRV_P(x) _SB_MAKEVALUE(x, S_IO_DRV_P)
302#define G_IO_DRV_P(x) _SB_GETVALUE(x,S_IO_DRV_P,M_IO_DRV_P) 302#define G_IO_DRV_P(x) _SB_GETVALUE(x, S_IO_DRV_P, M_IO_DRV_P)
303 303
304#define S_IO_DRV_Q 10 304#define S_IO_DRV_Q 10
305#define M_IO_DRV_Q _SB_MAKEMASK(2,S_IO_DRV_Q) 305#define M_IO_DRV_Q _SB_MAKEMASK(2, S_IO_DRV_Q)
306#define V_IO_DRV_Q(x) _SB_MAKEVALUE(x,S_IO_DRV_Q) 306#define V_IO_DRV_Q(x) _SB_MAKEVALUE(x, S_IO_DRV_Q)
307#define G_IO_DRV_Q(x) _SB_GETVALUE(x,S_IO_DRV_Q,M_IO_DRV_Q) 307#define G_IO_DRV_Q(x) _SB_GETVALUE(x, S_IO_DRV_Q, M_IO_DRV_Q)
308 308
309#define S_IO_DRV_R 14 309#define S_IO_DRV_R 14
310#define M_IO_DRV_R _SB_MAKEMASK(2,S_IO_DRV_R) 310#define M_IO_DRV_R _SB_MAKEMASK(2, S_IO_DRV_R)
311#define V_IO_DRV_R(x) _SB_MAKEVALUE(x,S_IO_DRV_R) 311#define V_IO_DRV_R(x) _SB_MAKEVALUE(x, S_IO_DRV_R)
312#define G_IO_DRV_R(x) _SB_GETVALUE(x,S_IO_DRV_R,M_IO_DRV_R) 312#define G_IO_DRV_R(x) _SB_GETVALUE(x, S_IO_DRV_R, M_IO_DRV_R)
313 313
314 314
315/* 315/*
@@ -329,9 +329,9 @@
329 329
330#if SIBYTE_HDR_FEATURE_CHIP(1480) 330#if SIBYTE_HDR_FEATURE_CHIP(1480)
331#define S_PCMCIA_MODE 16 331#define S_PCMCIA_MODE 16
332#define M_PCMCIA_MODE _SB_MAKEMASK(3,S_PCMCIA_MODE) 332#define M_PCMCIA_MODE _SB_MAKEMASK(3, S_PCMCIA_MODE)
333#define V_PCMCIA_MODE(x) _SB_MAKEVALUE(x,S_PCMCIA_MODE) 333#define V_PCMCIA_MODE(x) _SB_MAKEVALUE(x, S_PCMCIA_MODE)
334#define G_PCMCIA_MODE(x) _SB_GETVALUE(x,S_PCMCIA_MODE,M_PCMCIA_MODE) 334#define G_PCMCIA_MODE(x) _SB_GETVALUE(x, S_PCMCIA_MODE, M_PCMCIA_MODE)
335 335
336#define K_PCMCIA_MODE_PCMA_NOB 0 /* standard PCMCIA "A", no "B" */ 336#define K_PCMCIA_MODE_PCMA_NOB 0 /* standard PCMCIA "A", no "B" */
337#define K_PCMCIA_MODE_IDEA_NOB 1 /* IDE "A", no "B" */ 337#define K_PCMCIA_MODE_IDEA_NOB 1 /* IDE "A", no "B" */
@@ -369,49 +369,49 @@
369#define K_GPIO_INTR_SPLIT 3 369#define K_GPIO_INTR_SPLIT 3
370 370
371#define S_GPIO_INTR_TYPEX(n) (((n)/2)*2) 371#define S_GPIO_INTR_TYPEX(n) (((n)/2)*2)
372#define M_GPIO_INTR_TYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_TYPEX(n)) 372#define M_GPIO_INTR_TYPEX(n) _SB_MAKEMASK(2, S_GPIO_INTR_TYPEX(n))
373#define V_GPIO_INTR_TYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPEX(n)) 373#define V_GPIO_INTR_TYPEX(n, x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPEX(n))
374#define G_GPIO_INTR_TYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_TYPEX(n),M_GPIO_INTR_TYPEX(n)) 374#define G_GPIO_INTR_TYPEX(n, x) _SB_GETVALUE(x, S_GPIO_INTR_TYPEX(n), M_GPIO_INTR_TYPEX(n))
375 375
376#define S_GPIO_INTR_TYPE0 0 376#define S_GPIO_INTR_TYPE0 0
377#define M_GPIO_INTR_TYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE0) 377#define M_GPIO_INTR_TYPE0 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE0)
378#define V_GPIO_INTR_TYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE0) 378#define V_GPIO_INTR_TYPE0(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE0)
379#define G_GPIO_INTR_TYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE0,M_GPIO_INTR_TYPE0) 379#define G_GPIO_INTR_TYPE0(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE0, M_GPIO_INTR_TYPE0)
380 380
381#define S_GPIO_INTR_TYPE2 2 381#define S_GPIO_INTR_TYPE2 2
382#define M_GPIO_INTR_TYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE2) 382#define M_GPIO_INTR_TYPE2 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE2)
383#define V_GPIO_INTR_TYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE2) 383#define V_GPIO_INTR_TYPE2(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE2)
384#define G_GPIO_INTR_TYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE2,M_GPIO_INTR_TYPE2) 384#define G_GPIO_INTR_TYPE2(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE2, M_GPIO_INTR_TYPE2)
385 385
386#define S_GPIO_INTR_TYPE4 4 386#define S_GPIO_INTR_TYPE4 4
387#define M_GPIO_INTR_TYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE4) 387#define M_GPIO_INTR_TYPE4 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE4)
388#define V_GPIO_INTR_TYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE4) 388#define V_GPIO_INTR_TYPE4(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE4)
389#define G_GPIO_INTR_TYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE4,M_GPIO_INTR_TYPE4) 389#define G_GPIO_INTR_TYPE4(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE4, M_GPIO_INTR_TYPE4)
390 390
391#define S_GPIO_INTR_TYPE6 6 391#define S_GPIO_INTR_TYPE6 6
392#define M_GPIO_INTR_TYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE6) 392#define M_GPIO_INTR_TYPE6 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE6)
393#define V_GPIO_INTR_TYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE6) 393#define V_GPIO_INTR_TYPE6(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE6)
394#define G_GPIO_INTR_TYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE6,M_GPIO_INTR_TYPE6) 394#define G_GPIO_INTR_TYPE6(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE6, M_GPIO_INTR_TYPE6)
395 395
396#define S_GPIO_INTR_TYPE8 8 396#define S_GPIO_INTR_TYPE8 8
397#define M_GPIO_INTR_TYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE8) 397#define M_GPIO_INTR_TYPE8 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE8)
398#define V_GPIO_INTR_TYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE8) 398#define V_GPIO_INTR_TYPE8(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE8)
399#define G_GPIO_INTR_TYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE8,M_GPIO_INTR_TYPE8) 399#define G_GPIO_INTR_TYPE8(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE8, M_GPIO_INTR_TYPE8)
400 400
401#define S_GPIO_INTR_TYPE10 10 401#define S_GPIO_INTR_TYPE10 10
402#define M_GPIO_INTR_TYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE10) 402#define M_GPIO_INTR_TYPE10 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE10)
403#define V_GPIO_INTR_TYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE10) 403#define V_GPIO_INTR_TYPE10(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE10)
404#define G_GPIO_INTR_TYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE10,M_GPIO_INTR_TYPE10) 404#define G_GPIO_INTR_TYPE10(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE10, M_GPIO_INTR_TYPE10)
405 405
406#define S_GPIO_INTR_TYPE12 12 406#define S_GPIO_INTR_TYPE12 12
407#define M_GPIO_INTR_TYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE12) 407#define M_GPIO_INTR_TYPE12 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE12)
408#define V_GPIO_INTR_TYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE12) 408#define V_GPIO_INTR_TYPE12(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE12)
409#define G_GPIO_INTR_TYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE12,M_GPIO_INTR_TYPE12) 409#define G_GPIO_INTR_TYPE12(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE12, M_GPIO_INTR_TYPE12)
410 410
411#define S_GPIO_INTR_TYPE14 14 411#define S_GPIO_INTR_TYPE14 14
412#define M_GPIO_INTR_TYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_TYPE14) 412#define M_GPIO_INTR_TYPE14 _SB_MAKEMASK(2, S_GPIO_INTR_TYPE14)
413#define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_TYPE14) 413#define V_GPIO_INTR_TYPE14(x) _SB_MAKEVALUE(x, S_GPIO_INTR_TYPE14)
414#define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_TYPE14,M_GPIO_INTR_TYPE14) 414#define G_GPIO_INTR_TYPE14(x) _SB_GETVALUE(x, S_GPIO_INTR_TYPE14, M_GPIO_INTR_TYPE14)
415 415
416#if SIBYTE_HDR_FEATURE_CHIP(1480) 416#if SIBYTE_HDR_FEATURE_CHIP(1480)
417 417
@@ -425,49 +425,49 @@
425#define K_GPIO_INTR_UNPRED2 3 425#define K_GPIO_INTR_UNPRED2 3
426 426
427#define S_GPIO_INTR_ATYPEX(n) (((n)/2)*2) 427#define S_GPIO_INTR_ATYPEX(n) (((n)/2)*2)
428#define M_GPIO_INTR_ATYPEX(n) _SB_MAKEMASK(2,S_GPIO_INTR_ATYPEX(n)) 428#define M_GPIO_INTR_ATYPEX(n) _SB_MAKEMASK(2, S_GPIO_INTR_ATYPEX(n))
429#define V_GPIO_INTR_ATYPEX(n,x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPEX(n)) 429#define V_GPIO_INTR_ATYPEX(n, x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPEX(n))
430#define G_GPIO_INTR_ATYPEX(n,x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPEX(n),M_GPIO_INTR_ATYPEX(n)) 430#define G_GPIO_INTR_ATYPEX(n, x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPEX(n), M_GPIO_INTR_ATYPEX(n))
431 431
432#define S_GPIO_INTR_ATYPE0 0 432#define S_GPIO_INTR_ATYPE0 0
433#define M_GPIO_INTR_ATYPE0 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE0) 433#define M_GPIO_INTR_ATYPE0 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE0)
434#define V_GPIO_INTR_ATYPE0(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE0) 434#define V_GPIO_INTR_ATYPE0(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE0)
435#define G_GPIO_INTR_ATYPE0(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE0,M_GPIO_INTR_ATYPE0) 435#define G_GPIO_INTR_ATYPE0(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE0, M_GPIO_INTR_ATYPE0)
436 436
437#define S_GPIO_INTR_ATYPE2 2 437#define S_GPIO_INTR_ATYPE2 2
438#define M_GPIO_INTR_ATYPE2 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE2) 438#define M_GPIO_INTR_ATYPE2 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE2)
439#define V_GPIO_INTR_ATYPE2(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE2) 439#define V_GPIO_INTR_ATYPE2(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE2)
440#define G_GPIO_INTR_ATYPE2(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE2,M_GPIO_INTR_ATYPE2) 440#define G_GPIO_INTR_ATYPE2(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE2, M_GPIO_INTR_ATYPE2)
441 441
442#define S_GPIO_INTR_ATYPE4 4 442#define S_GPIO_INTR_ATYPE4 4
443#define M_GPIO_INTR_ATYPE4 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE4) 443#define M_GPIO_INTR_ATYPE4 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE4)
444#define V_GPIO_INTR_ATYPE4(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE4) 444#define V_GPIO_INTR_ATYPE4(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE4)
445#define G_GPIO_INTR_ATYPE4(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE4,M_GPIO_INTR_ATYPE4) 445#define G_GPIO_INTR_ATYPE4(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE4, M_GPIO_INTR_ATYPE4)
446 446
447#define S_GPIO_INTR_ATYPE6 6 447#define S_GPIO_INTR_ATYPE6 6
448#define M_GPIO_INTR_ATYPE6 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE6) 448#define M_GPIO_INTR_ATYPE6 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE6)
449#define V_GPIO_INTR_ATYPE6(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE6) 449#define V_GPIO_INTR_ATYPE6(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE6)
450#define G_GPIO_INTR_ATYPE6(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE6,M_GPIO_INTR_ATYPE6) 450#define G_GPIO_INTR_ATYPE6(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE6, M_GPIO_INTR_ATYPE6)
451 451
452#define S_GPIO_INTR_ATYPE8 8 452#define S_GPIO_INTR_ATYPE8 8
453#define M_GPIO_INTR_ATYPE8 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE8) 453#define M_GPIO_INTR_ATYPE8 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE8)
454#define V_GPIO_INTR_ATYPE8(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE8) 454#define V_GPIO_INTR_ATYPE8(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE8)
455#define G_GPIO_INTR_ATYPE8(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE8,M_GPIO_INTR_ATYPE8) 455#define G_GPIO_INTR_ATYPE8(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE8, M_GPIO_INTR_ATYPE8)
456 456
457#define S_GPIO_INTR_ATYPE10 10 457#define S_GPIO_INTR_ATYPE10 10
458#define M_GPIO_INTR_ATYPE10 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE10) 458#define M_GPIO_INTR_ATYPE10 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE10)
459#define V_GPIO_INTR_ATYPE10(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE10) 459#define V_GPIO_INTR_ATYPE10(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE10)
460#define G_GPIO_INTR_ATYPE10(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE10,M_GPIO_INTR_ATYPE10) 460#define G_GPIO_INTR_ATYPE10(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE10, M_GPIO_INTR_ATYPE10)
461 461
462#define S_GPIO_INTR_ATYPE12 12 462#define S_GPIO_INTR_ATYPE12 12
463#define M_GPIO_INTR_ATYPE12 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE12) 463#define M_GPIO_INTR_ATYPE12 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE12)
464#define V_GPIO_INTR_ATYPE12(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE12) 464#define V_GPIO_INTR_ATYPE12(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE12)
465#define G_GPIO_INTR_ATYPE12(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE12,M_GPIO_INTR_ATYPE12) 465#define G_GPIO_INTR_ATYPE12(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE12, M_GPIO_INTR_ATYPE12)
466 466
467#define S_GPIO_INTR_ATYPE14 14 467#define S_GPIO_INTR_ATYPE14 14
468#define M_GPIO_INTR_ATYPE14 _SB_MAKEMASK(2,S_GPIO_INTR_ATYPE14) 468#define M_GPIO_INTR_ATYPE14 _SB_MAKEMASK(2, S_GPIO_INTR_ATYPE14)
469#define V_GPIO_INTR_ATYPE14(x) _SB_MAKEVALUE(x,S_GPIO_INTR_ATYPE14) 469#define V_GPIO_INTR_ATYPE14(x) _SB_MAKEVALUE(x, S_GPIO_INTR_ATYPE14)
470#define G_GPIO_INTR_ATYPE14(x) _SB_GETVALUE(x,S_GPIO_INTR_ATYPE14,M_GPIO_INTR_ATYPE14) 470#define G_GPIO_INTR_ATYPE14(x) _SB_GETVALUE(x, S_GPIO_INTR_ATYPE14, M_GPIO_INTR_ATYPE14)
471#endif 471#endif
472 472
473 473
diff --git a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h
index 94e8299b0a2a..f2850b4bcfd4 100644
--- a/include/asm-mips/sibyte/sb1250_int.h
+++ b/include/asm-mips/sibyte/sb1250_int.h
@@ -10,7 +10,7 @@
10 * 10 *
11 ********************************************************************* 11 *********************************************************************
12 * 12 *
13 * Copyright 2000,2001,2002,2003 13 * Copyright 2000, 2001, 2002, 2003
14 * Broadcom Corporation. All rights reserved. 14 * Broadcom Corporation. All rights reserved.
15 * 15 *
16 * This program is free software; you can redistribute it and/or 16 * This program is free software; you can redistribute it and/or
@@ -150,7 +150,7 @@
150#define M_INT_MBOX_1 _SB_MAKEMASK1(K_INT_MBOX_1) 150#define M_INT_MBOX_1 _SB_MAKEMASK1(K_INT_MBOX_1)
151#define M_INT_MBOX_2 _SB_MAKEMASK1(K_INT_MBOX_2) 151#define M_INT_MBOX_2 _SB_MAKEMASK1(K_INT_MBOX_2)
152#define M_INT_MBOX_3 _SB_MAKEMASK1(K_INT_MBOX_3) 152#define M_INT_MBOX_3 _SB_MAKEMASK1(K_INT_MBOX_3)
153#define M_INT_MBOX_ALL _SB_MAKEMASK(4,K_INT_MBOX_0) 153#define M_INT_MBOX_ALL _SB_MAKEMASK(4, K_INT_MBOX_0)
154#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 154#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
155#define M_INT_CYCLE_CP0_INT _SB_MAKEMASK1(K_INT_CYCLE_CP0_INT) 155#define M_INT_CYCLE_CP0_INT _SB_MAKEMASK1(K_INT_CYCLE_CP0_INT)
156#define M_INT_CYCLE_CP1_INT _SB_MAKEMASK1(K_INT_CYCLE_CP1_INT) 156#define M_INT_CYCLE_CP1_INT _SB_MAKEMASK1(K_INT_CYCLE_CP1_INT)
@@ -208,9 +208,9 @@
208 */ 208 */
209 209
210#define S_INT_LDT_INTMSG 0 210#define S_INT_LDT_INTMSG 0
211#define M_INT_LDT_INTMSG _SB_MAKEMASK(3,S_INT_LDT_INTMSG) 211#define M_INT_LDT_INTMSG _SB_MAKEMASK(3, S_INT_LDT_INTMSG)
212#define V_INT_LDT_INTMSG(x) _SB_MAKEVALUE(x,S_INT_LDT_INTMSG) 212#define V_INT_LDT_INTMSG(x) _SB_MAKEVALUE(x, S_INT_LDT_INTMSG)
213#define G_INT_LDT_INTMSG(x) _SB_GETVALUE(x,S_INT_LDT_INTMSG,M_INT_LDT_INTMSG) 213#define G_INT_LDT_INTMSG(x) _SB_GETVALUE(x, S_INT_LDT_INTMSG, M_INT_LDT_INTMSG)
214 214
215#define K_INT_LDT_INTMSG_FIXED 0 215#define K_INT_LDT_INTMSG_FIXED 0
216#define K_INT_LDT_INTMSG_ARBITRATED 1 216#define K_INT_LDT_INTMSG_ARBITRATED 1
@@ -228,14 +228,14 @@
228#define M_INT_LDT_LOGICALDEST _SB_MAKEMASK1(4) 228#define M_INT_LDT_LOGICALDEST _SB_MAKEMASK1(4)
229 229
230#define S_INT_LDT_INTDEST 5 230#define S_INT_LDT_INTDEST 5
231#define M_INT_LDT_INTDEST _SB_MAKEMASK(10,S_INT_LDT_INTDEST) 231#define M_INT_LDT_INTDEST _SB_MAKEMASK(10, S_INT_LDT_INTDEST)
232#define V_INT_LDT_INTDEST(x) _SB_MAKEVALUE(x,S_INT_LDT_INTDEST) 232#define V_INT_LDT_INTDEST(x) _SB_MAKEVALUE(x, S_INT_LDT_INTDEST)
233#define G_INT_LDT_INTDEST(x) _SB_GETVALUE(x,S_INT_LDT_INTDEST,M_INT_LDT_INTDEST) 233#define G_INT_LDT_INTDEST(x) _SB_GETVALUE(x, S_INT_LDT_INTDEST, M_INT_LDT_INTDEST)
234 234
235#define S_INT_LDT_VECTOR 13 235#define S_INT_LDT_VECTOR 13
236#define M_INT_LDT_VECTOR _SB_MAKEMASK(8,S_INT_LDT_VECTOR) 236#define M_INT_LDT_VECTOR _SB_MAKEMASK(8, S_INT_LDT_VECTOR)
237#define V_INT_LDT_VECTOR(x) _SB_MAKEVALUE(x,S_INT_LDT_VECTOR) 237#define V_INT_LDT_VECTOR(x) _SB_MAKEVALUE(x, S_INT_LDT_VECTOR)
238#define G_INT_LDT_VECTOR(x) _SB_GETVALUE(x,S_INT_LDT_VECTOR,M_INT_LDT_VECTOR) 238#define G_INT_LDT_VECTOR(x) _SB_GETVALUE(x, S_INT_LDT_VECTOR, M_INT_LDT_VECTOR)
239 239
240/* 240/*
241 * Vector format (Table 4-6) 241 * Vector format (Table 4-6)
diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h
index 842f205094af..6554dcf05cfe 100644
--- a/include/asm-mips/sibyte/sb1250_l2c.h
+++ b/include/asm-mips/sibyte/sb1250_l2c.h
@@ -40,27 +40,27 @@
40 */ 40 */
41 41
42#define S_L2C_TAG_MBZ 0 42#define S_L2C_TAG_MBZ 0
43#define M_L2C_TAG_MBZ _SB_MAKEMASK(5,S_L2C_TAG_MBZ) 43#define M_L2C_TAG_MBZ _SB_MAKEMASK(5, S_L2C_TAG_MBZ)
44 44
45#define S_L2C_TAG_INDEX 5 45#define S_L2C_TAG_INDEX 5
46#define M_L2C_TAG_INDEX _SB_MAKEMASK(12,S_L2C_TAG_INDEX) 46#define M_L2C_TAG_INDEX _SB_MAKEMASK(12, S_L2C_TAG_INDEX)
47#define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x,S_L2C_TAG_INDEX) 47#define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX)
48#define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x,S_L2C_TAG_INDEX,M_L2C_TAG_INDEX) 48#define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX)
49 49
50#define S_L2C_TAG_TAG 17 50#define S_L2C_TAG_TAG 17
51#define M_L2C_TAG_TAG _SB_MAKEMASK(23,S_L2C_TAG_TAG) 51#define M_L2C_TAG_TAG _SB_MAKEMASK(23, S_L2C_TAG_TAG)
52#define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x,S_L2C_TAG_TAG) 52#define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG)
53#define G_L2C_TAG_TAG(x) _SB_GETVALUE(x,S_L2C_TAG_TAG,M_L2C_TAG_TAG) 53#define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG)
54 54
55#define S_L2C_TAG_ECC 40 55#define S_L2C_TAG_ECC 40
56#define M_L2C_TAG_ECC _SB_MAKEMASK(6,S_L2C_TAG_ECC) 56#define M_L2C_TAG_ECC _SB_MAKEMASK(6, S_L2C_TAG_ECC)
57#define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x,S_L2C_TAG_ECC) 57#define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC)
58#define G_L2C_TAG_ECC(x) _SB_GETVALUE(x,S_L2C_TAG_ECC,M_L2C_TAG_ECC) 58#define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC)
59 59
60#define S_L2C_TAG_WAY 46 60#define S_L2C_TAG_WAY 46
61#define M_L2C_TAG_WAY _SB_MAKEMASK(2,S_L2C_TAG_WAY) 61#define M_L2C_TAG_WAY _SB_MAKEMASK(2, S_L2C_TAG_WAY)
62#define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x,S_L2C_TAG_WAY) 62#define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY)
63#define G_L2C_TAG_WAY(x) _SB_GETVALUE(x,S_L2C_TAG_WAY,M_L2C_TAG_WAY) 63#define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY)
64 64
65#define M_L2C_TAG_DIRTY _SB_MAKEMASK1(48) 65#define M_L2C_TAG_DIRTY _SB_MAKEMASK1(48)
66#define M_L2C_TAG_VALID _SB_MAKEMASK1(49) 66#define M_L2C_TAG_VALID _SB_MAKEMASK1(49)
@@ -70,32 +70,32 @@
70 */ 70 */
71 71
72#define S_L2C_MGMT_INDEX 5 72#define S_L2C_MGMT_INDEX 5
73#define M_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_L2C_MGMT_INDEX) 73#define M_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_L2C_MGMT_INDEX)
74#define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x,S_L2C_MGMT_INDEX) 74#define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX)
75#define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x,S_L2C_MGMT_INDEX,M_L2C_MGMT_INDEX) 75#define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX)
76 76
77#define S_L2C_MGMT_QUADRANT 15 77#define S_L2C_MGMT_QUADRANT 15
78#define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2,S_L2C_MGMT_QUADRANT) 78#define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2, S_L2C_MGMT_QUADRANT)
79#define V_L2C_MGMT_QUADRANT(x) _SB_MAKEVALUE(x,S_L2C_MGMT_QUADRANT) 79#define V_L2C_MGMT_QUADRANT(x) _SB_MAKEVALUE(x, S_L2C_MGMT_QUADRANT)
80#define G_L2C_MGMT_QUADRANT(x) _SB_GETVALUE(x,S_L2C_MGMT_QUADRANT,M_L2C_MGMT_QUADRANT) 80#define G_L2C_MGMT_QUADRANT(x) _SB_GETVALUE(x, S_L2C_MGMT_QUADRANT, M_L2C_MGMT_QUADRANT)
81 81
82#define S_L2C_MGMT_HALF 16 82#define S_L2C_MGMT_HALF 16
83#define M_L2C_MGMT_HALF _SB_MAKEMASK(1,S_L2C_MGMT_HALF) 83#define M_L2C_MGMT_HALF _SB_MAKEMASK(1, S_L2C_MGMT_HALF)
84 84
85#define S_L2C_MGMT_WAY 17 85#define S_L2C_MGMT_WAY 17
86#define M_L2C_MGMT_WAY _SB_MAKEMASK(2,S_L2C_MGMT_WAY) 86#define M_L2C_MGMT_WAY _SB_MAKEMASK(2, S_L2C_MGMT_WAY)
87#define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x,S_L2C_MGMT_WAY) 87#define V_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_L2C_MGMT_WAY)
88#define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x,S_L2C_MGMT_WAY,M_L2C_MGMT_WAY) 88#define G_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_L2C_MGMT_WAY, M_L2C_MGMT_WAY)
89 89
90#define S_L2C_MGMT_ECC_DIAG 21 90#define S_L2C_MGMT_ECC_DIAG 21
91#define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2,S_L2C_MGMT_ECC_DIAG) 91#define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2, S_L2C_MGMT_ECC_DIAG)
92#define V_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_ECC_DIAG) 92#define V_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_L2C_MGMT_ECC_DIAG)
93#define G_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x,S_L2C_MGMT_ECC_DIAG,M_L2C_MGMT_ECC_DIAG) 93#define G_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_L2C_MGMT_ECC_DIAG, M_L2C_MGMT_ECC_DIAG)
94 94
95#define S_L2C_MGMT_TAG 23 95#define S_L2C_MGMT_TAG 23
96#define M_L2C_MGMT_TAG _SB_MAKEMASK(4,S_L2C_MGMT_TAG) 96#define M_L2C_MGMT_TAG _SB_MAKEMASK(4, S_L2C_MGMT_TAG)
97#define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x,S_L2C_MGMT_TAG) 97#define V_L2C_MGMT_TAG(x) _SB_MAKEVALUE(x, S_L2C_MGMT_TAG)
98#define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x,S_L2C_MGMT_TAG,M_L2C_MGMT_TAG) 98#define G_L2C_MGMT_TAG(x) _SB_GETVALUE(x, S_L2C_MGMT_TAG, M_L2C_MGMT_TAG)
99 99
100#define M_L2C_MGMT_DIRTY _SB_MAKEMASK1(19) 100#define M_L2C_MGMT_DIRTY _SB_MAKEMASK1(19)
101#define M_L2C_MGMT_VALID _SB_MAKEMASK1(20) 101#define M_L2C_MGMT_VALID _SB_MAKEMASK1(20)
@@ -111,9 +111,9 @@
111 * L2 Read Misc. register (A_L2_READ_MISC) 111 * L2 Read Misc. register (A_L2_READ_MISC)
112 */ 112 */
113#define S_L2C_MISC_NO_WAY 10 113#define S_L2C_MISC_NO_WAY 10
114#define M_L2C_MISC_NO_WAY _SB_MAKEMASK(4,S_L2C_MISC_NO_WAY) 114#define M_L2C_MISC_NO_WAY _SB_MAKEMASK(4, S_L2C_MISC_NO_WAY)
115#define V_L2C_MISC_NO_WAY(x) _SB_MAKEVALUE(x,S_L2C_MISC_NO_WAY) 115#define V_L2C_MISC_NO_WAY(x) _SB_MAKEVALUE(x, S_L2C_MISC_NO_WAY)
116#define G_L2C_MISC_NO_WAY(x) _SB_GETVALUE(x,S_L2C_MISC_NO_WAY,M_L2C_MISC_NO_WAY) 116#define G_L2C_MISC_NO_WAY(x) _SB_GETVALUE(x, S_L2C_MISC_NO_WAY, M_L2C_MISC_NO_WAY)
117 117
118#define M_L2C_MISC_ECC_CLEANUP_DIS _SB_MAKEMASK1(9) 118#define M_L2C_MISC_ECC_CLEANUP_DIS _SB_MAKEMASK1(9)
119#define M_L2C_MISC_MC_PRIO_LOW _SB_MAKEMASK1(8) 119#define M_L2C_MISC_MC_PRIO_LOW _SB_MAKEMASK1(8)
diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h
index 7092535d1108..081e8b1c4ad0 100644
--- a/include/asm-mips/sibyte/sb1250_ldt.h
+++ b/include/asm-mips/sibyte/sb1250_ldt.h
@@ -10,7 +10,7 @@
10 * 10 *
11 ********************************************************************* 11 *********************************************************************
12 * 12 *
13 * Copyright 2000,2001,2002,2003 13 * Copyright 2000, 2001, 2002, 2003
14 * Broadcom Corporation. All rights reserved. 14 * Broadcom Corporation. All rights reserved.
15 * 15 *
16 * This program is free software; you can redistribute it and/or 16 * This program is free software; you can redistribute it and/or
@@ -81,14 +81,14 @@
81 */ 81 */
82 82
83#define S_LDT_DEVICEID_VENDOR 0 83#define S_LDT_DEVICEID_VENDOR 0
84#define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR) 84#define M_LDT_DEVICEID_VENDOR _SB_MAKEMASK_32(16, S_LDT_DEVICEID_VENDOR)
85#define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR) 85#define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR)
86#define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR) 86#define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR)
87 87
88#define S_LDT_DEVICEID_DEVICEID 16 88#define S_LDT_DEVICEID_DEVICEID 16
89#define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID) 89#define M_LDT_DEVICEID_DEVICEID _SB_MAKEMASK_32(16, S_LDT_DEVICEID_DEVICEID)
90#define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID) 90#define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID)
91#define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID) 91#define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVICEID)
92 92
93 93
94/* 94/*
@@ -111,14 +111,14 @@
111 */ 111 */
112 112
113#define S_LDT_CLASSREV_REV 0 113#define S_LDT_CLASSREV_REV 0
114#define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV) 114#define M_LDT_CLASSREV_REV _SB_MAKEMASK_32(8, S_LDT_CLASSREV_REV)
115#define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV) 115#define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV)
116#define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV) 116#define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV)
117 117
118#define S_LDT_CLASSREV_CLASS 8 118#define S_LDT_CLASSREV_CLASS 8
119#define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS) 119#define M_LDT_CLASSREV_CLASS _SB_MAKEMASK_32(24, S_LDT_CLASSREV_CLASS)
120#define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS) 120#define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS)
121#define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS) 121#define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS)
122 122
123#define K_LDT_REV 0x01 123#define K_LDT_REV 0x01
124#define K_LDT_CLASS 0x060000 124#define K_LDT_CLASS 0x060000
@@ -128,26 +128,26 @@
128 */ 128 */
129 129
130#define S_LDT_DEVHDR_CLINESZ 0 130#define S_LDT_DEVHDR_CLINESZ 0
131#define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ) 131#define M_LDT_DEVHDR_CLINESZ _SB_MAKEMASK_32(8, S_LDT_DEVHDR_CLINESZ)
132#define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ) 132#define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ)
133#define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ) 133#define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_CLINESZ, M_LDT_DEVHDR_CLINESZ)
134 134
135#define S_LDT_DEVHDR_LATTMR 8 135#define S_LDT_DEVHDR_LATTMR 8
136#define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR) 136#define M_LDT_DEVHDR_LATTMR _SB_MAKEMASK_32(8, S_LDT_DEVHDR_LATTMR)
137#define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR) 137#define V_LDT_DEVHDR_LATTMR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_LATTMR)
138#define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR) 138#define G_LDT_DEVHDR_LATTMR(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_LATTMR, M_LDT_DEVHDR_LATTMR)
139 139
140#define S_LDT_DEVHDR_HDRTYPE 16 140#define S_LDT_DEVHDR_HDRTYPE 16
141#define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE) 141#define M_LDT_DEVHDR_HDRTYPE _SB_MAKEMASK_32(8, S_LDT_DEVHDR_HDRTYPE)
142#define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE) 142#define V_LDT_DEVHDR_HDRTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_HDRTYPE)
143#define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE) 143#define G_LDT_DEVHDR_HDRTYPE(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_HDRTYPE, M_LDT_DEVHDR_HDRTYPE)
144 144
145#define K_LDT_DEVHDR_HDRTYPE_TYPE1 1 145#define K_LDT_DEVHDR_HDRTYPE_TYPE1 1
146 146
147#define S_LDT_DEVHDR_BIST 24 147#define S_LDT_DEVHDR_BIST 24
148#define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST) 148#define M_LDT_DEVHDR_BIST _SB_MAKEMASK_32(8, S_LDT_DEVHDR_BIST)
149#define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST) 149#define V_LDT_DEVHDR_BIST(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_BIST)
150#define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST) 150#define G_LDT_DEVHDR_BIST(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_BIST, M_LDT_DEVHDR_BIST)
151 151
152 152
153 153
@@ -170,9 +170,9 @@
170#define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24) 170#define M_LDT_STATUS_MSTRDPARERR _SB_MAKEMASK1_32(24)
171 171
172#define S_LDT_STATUS_DEVSELTIMING 25 172#define S_LDT_STATUS_DEVSELTIMING 25
173#define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING) 173#define M_LDT_STATUS_DEVSELTIMING _SB_MAKEMASK_32(2, S_LDT_STATUS_DEVSELTIMING)
174#define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING) 174#define V_LDT_STATUS_DEVSELTIMING(x) _SB_MAKEVALUE_32(x, S_LDT_STATUS_DEVSELTIMING)
175#define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING) 175#define G_LDT_STATUS_DEVSELTIMING(x) _SB_GETVALUE_32(x, S_LDT_STATUS_DEVSELTIMING, M_LDT_STATUS_DEVSELTIMING)
176 176
177#define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27) 177#define M_LDT_STATUS_SIGDTGTABORT _SB_MAKEMASK1_32(27)
178#define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28) 178#define M_LDT_STATUS_RCVDTGTABORT _SB_MAKEMASK1_32(28)
@@ -208,9 +208,9 @@
208#define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17) 208#define M_LDT_CMD_DOUBLEENDED _SB_MAKEMASK1_32(17)
209 209
210#define S_LDT_CMD_CAPTYPE 29 210#define S_LDT_CMD_CAPTYPE 29
211#define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE) 211#define M_LDT_CMD_CAPTYPE _SB_MAKEMASK_32(3, S_LDT_CMD_CAPTYPE)
212#define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE) 212#define V_LDT_CMD_CAPTYPE(x) _SB_MAKEVALUE_32(x, S_LDT_CMD_CAPTYPE)
213#define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE) 213#define G_LDT_CMD_CAPTYPE(x) _SB_GETVALUE_32(x, S_LDT_CMD_CAPTYPE, M_LDT_CMD_CAPTYPE)
214 214
215/* 215/*
216 * LDT link control register (Table 8-18), and (Table 8-19) 216 * LDT link control register (Table 8-18), and (Table 8-19)
@@ -225,35 +225,35 @@
225#define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7) 225#define M_LDT_LINKCTRL_XMITOFF _SB_MAKEMASK1_32(7)
226 226
227#define S_LDT_LINKCTRL_CRCERR 8 227#define S_LDT_LINKCTRL_CRCERR 8
228#define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR) 228#define M_LDT_LINKCTRL_CRCERR _SB_MAKEMASK_32(4, S_LDT_LINKCTRL_CRCERR)
229#define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR) 229#define V_LDT_LINKCTRL_CRCERR(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_CRCERR)
230#define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR) 230#define G_LDT_LINKCTRL_CRCERR(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_CRCERR, M_LDT_LINKCTRL_CRCERR)
231 231
232#define S_LDT_LINKCTRL_MAXIN 16 232#define S_LDT_LINKCTRL_MAXIN 16
233#define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN) 233#define M_LDT_LINKCTRL_MAXIN _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_MAXIN)
234#define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN) 234#define V_LDT_LINKCTRL_MAXIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXIN)
235#define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN) 235#define G_LDT_LINKCTRL_MAXIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXIN, M_LDT_LINKCTRL_MAXIN)
236 236
237#define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19) 237#define M_LDT_LINKCTRL_DWFCLN _SB_MAKEMASK1_32(19)
238 238
239#define S_LDT_LINKCTRL_MAXOUT 20 239#define S_LDT_LINKCTRL_MAXOUT 20
240#define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT) 240#define M_LDT_LINKCTRL_MAXOUT _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_MAXOUT)
241#define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT) 241#define V_LDT_LINKCTRL_MAXOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_MAXOUT)
242#define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT) 242#define G_LDT_LINKCTRL_MAXOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_MAXOUT, M_LDT_LINKCTRL_MAXOUT)
243 243
244#define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23) 244#define M_LDT_LINKCTRL_DWFCOUT _SB_MAKEMASK1_32(23)
245 245
246#define S_LDT_LINKCTRL_WIDTHIN 24 246#define S_LDT_LINKCTRL_WIDTHIN 24
247#define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN) 247#define M_LDT_LINKCTRL_WIDTHIN _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_WIDTHIN)
248#define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN) 248#define V_LDT_LINKCTRL_WIDTHIN(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN)
249#define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN) 249#define G_LDT_LINKCTRL_WIDTHIN(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHIN, M_LDT_LINKCTRL_WIDTHIN)
250 250
251#define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27) 251#define M_LDT_LINKCTRL_DWFCLIN_EN _SB_MAKEMASK1_32(27)
252 252
253#define S_LDT_LINKCTRL_WIDTHOUT 28 253#define S_LDT_LINKCTRL_WIDTHOUT 28
254#define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT) 254#define M_LDT_LINKCTRL_WIDTHOUT _SB_MAKEMASK_32(3, S_LDT_LINKCTRL_WIDTHOUT)
255#define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT) 255#define V_LDT_LINKCTRL_WIDTHOUT(x) _SB_MAKEVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT)
256#define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT) 256#define G_LDT_LINKCTRL_WIDTHOUT(x) _SB_GETVALUE_32(x, S_LDT_LINKCTRL_WIDTHOUT, M_LDT_LINKCTRL_WIDTHOUT)
257 257
258#define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31) 258#define M_LDT_LINKCTRL_DWFCOUT_EN _SB_MAKEMASK1_32(31)
259 259
@@ -262,9 +262,9 @@
262 */ 262 */
263 263
264#define S_LDT_LINKFREQ_FREQ 8 264#define S_LDT_LINKFREQ_FREQ 8
265#define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ) 265#define M_LDT_LINKFREQ_FREQ _SB_MAKEMASK_32(4, S_LDT_LINKFREQ_FREQ)
266#define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ) 266#define V_LDT_LINKFREQ_FREQ(x) _SB_MAKEVALUE_32(x, S_LDT_LINKFREQ_FREQ)
267#define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ) 267#define G_LDT_LINKFREQ_FREQ(x) _SB_GETVALUE_32(x, S_LDT_LINKFREQ_FREQ, M_LDT_LINKFREQ_FREQ)
268 268
269#define K_LDT_LINKFREQ_200MHZ 0 269#define K_LDT_LINKFREQ_200MHZ 0
270#define K_LDT_LINKFREQ_300MHZ 1 270#define K_LDT_LINKFREQ_300MHZ 1
@@ -293,16 +293,16 @@
293 293
294 294
295#define S_LDT_SRICMD_RXMARGIN 20 295#define S_LDT_SRICMD_RXMARGIN 20
296#define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN) 296#define M_LDT_SRICMD_RXMARGIN _SB_MAKEMASK_32(5, S_LDT_SRICMD_RXMARGIN)
297#define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN) 297#define V_LDT_SRICMD_RXMARGIN(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_RXMARGIN)
298#define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN) 298#define G_LDT_SRICMD_RXMARGIN(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_RXMARGIN, M_LDT_SRICMD_RXMARGIN)
299 299
300#define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25) 300#define M_LDT_SRICMD_LDTPLLCOMPAT _SB_MAKEMASK1_32(25)
301 301
302#define S_LDT_SRICMD_TXINITIALOFFSET 28 302#define S_LDT_SRICMD_TXINITIALOFFSET 28
303#define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET) 303#define M_LDT_SRICMD_TXINITIALOFFSET _SB_MAKEMASK_32(3, S_LDT_SRICMD_TXINITIALOFFSET)
304#define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET) 304#define V_LDT_SRICMD_TXINITIALOFFSET(x) _SB_MAKEVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET)
305#define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET) 305#define G_LDT_SRICMD_TXINITIALOFFSET(x) _SB_GETVALUE_32(x, S_LDT_SRICMD_TXINITIALOFFSET, M_LDT_SRICMD_TXINITIALOFFSET)
306 306
307#define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31) 307#define M_LDT_SRICMD_LINKFREQDIRECT _SB_MAKEMASK1_32(31)
308 308
@@ -340,73 +340,73 @@
340 */ 340 */
341 341
342#define S_LDT_SRICTRL_NEEDRESP 0 342#define S_LDT_SRICTRL_NEEDRESP 0
343#define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP) 343#define M_LDT_SRICTRL_NEEDRESP _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDRESP)
344#define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP) 344#define V_LDT_SRICTRL_NEEDRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDRESP)
345#define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP) 345#define G_LDT_SRICTRL_NEEDRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDRESP, M_LDT_SRICTRL_NEEDRESP)
346 346
347#define S_LDT_SRICTRL_NEEDNPREQ 2 347#define S_LDT_SRICTRL_NEEDNPREQ 2
348#define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ) 348#define M_LDT_SRICTRL_NEEDNPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDNPREQ)
349#define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ) 349#define V_LDT_SRICTRL_NEEDNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ)
350#define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ) 350#define G_LDT_SRICTRL_NEEDNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDNPREQ, M_LDT_SRICTRL_NEEDNPREQ)
351 351
352#define S_LDT_SRICTRL_NEEDPREQ 4 352#define S_LDT_SRICTRL_NEEDPREQ 4
353#define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ) 353#define M_LDT_SRICTRL_NEEDPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_NEEDPREQ)
354#define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ) 354#define V_LDT_SRICTRL_NEEDPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ)
355#define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ) 355#define G_LDT_SRICTRL_NEEDPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_NEEDPREQ, M_LDT_SRICTRL_NEEDPREQ)
356 356
357#define S_LDT_SRICTRL_WANTRESP 8 357#define S_LDT_SRICTRL_WANTRESP 8
358#define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP) 358#define M_LDT_SRICTRL_WANTRESP _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTRESP)
359#define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP) 359#define V_LDT_SRICTRL_WANTRESP(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTRESP)
360#define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP) 360#define G_LDT_SRICTRL_WANTRESP(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTRESP, M_LDT_SRICTRL_WANTRESP)
361 361
362#define S_LDT_SRICTRL_WANTNPREQ 10 362#define S_LDT_SRICTRL_WANTNPREQ 10
363#define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ) 363#define M_LDT_SRICTRL_WANTNPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTNPREQ)
364#define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ) 364#define V_LDT_SRICTRL_WANTNPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ)
365#define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ) 365#define G_LDT_SRICTRL_WANTNPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTNPREQ, M_LDT_SRICTRL_WANTNPREQ)
366 366
367#define S_LDT_SRICTRL_WANTPREQ 12 367#define S_LDT_SRICTRL_WANTPREQ 12
368#define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ) 368#define M_LDT_SRICTRL_WANTPREQ _SB_MAKEMASK_32(2, S_LDT_SRICTRL_WANTPREQ)
369#define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ) 369#define V_LDT_SRICTRL_WANTPREQ(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_WANTPREQ)
370#define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ) 370#define G_LDT_SRICTRL_WANTPREQ(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_WANTPREQ, M_LDT_SRICTRL_WANTPREQ)
371 371
372#define S_LDT_SRICTRL_BUFRELSPACE 16 372#define S_LDT_SRICTRL_BUFRELSPACE 16
373#define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE) 373#define M_LDT_SRICTRL_BUFRELSPACE _SB_MAKEMASK_32(4, S_LDT_SRICTRL_BUFRELSPACE)
374#define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE) 374#define V_LDT_SRICTRL_BUFRELSPACE(x) _SB_MAKEVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE)
375#define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE) 375#define G_LDT_SRICTRL_BUFRELSPACE(x) _SB_GETVALUE_32(x, S_LDT_SRICTRL_BUFRELSPACE, M_LDT_SRICTRL_BUFRELSPACE)
376 376
377/* 377/*
378 * LDT SRI Transmit Buffer Count register (Table 8-26) 378 * LDT SRI Transmit Buffer Count register (Table 8-26)
379 */ 379 */
380 380
381#define S_LDT_TXBUFCNT_PCMD 0 381#define S_LDT_TXBUFCNT_PCMD 0
382#define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD) 382#define M_LDT_TXBUFCNT_PCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_PCMD)
383#define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD) 383#define V_LDT_TXBUFCNT_PCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PCMD)
384#define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD) 384#define G_LDT_TXBUFCNT_PCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PCMD, M_LDT_TXBUFCNT_PCMD)
385 385
386#define S_LDT_TXBUFCNT_PDATA 4 386#define S_LDT_TXBUFCNT_PDATA 4
387#define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA) 387#define M_LDT_TXBUFCNT_PDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_PDATA)
388#define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA) 388#define V_LDT_TXBUFCNT_PDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_PDATA)
389#define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA) 389#define G_LDT_TXBUFCNT_PDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_PDATA, M_LDT_TXBUFCNT_PDATA)
390 390
391#define S_LDT_TXBUFCNT_NPCMD 8 391#define S_LDT_TXBUFCNT_NPCMD 8
392#define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD) 392#define M_LDT_TXBUFCNT_NPCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_NPCMD)
393#define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD) 393#define V_LDT_TXBUFCNT_NPCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPCMD)
394#define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD) 394#define G_LDT_TXBUFCNT_NPCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPCMD, M_LDT_TXBUFCNT_NPCMD)
395 395
396#define S_LDT_TXBUFCNT_NPDATA 12 396#define S_LDT_TXBUFCNT_NPDATA 12
397#define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA) 397#define M_LDT_TXBUFCNT_NPDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_NPDATA)
398#define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA) 398#define V_LDT_TXBUFCNT_NPDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_NPDATA)
399#define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA) 399#define G_LDT_TXBUFCNT_NPDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_NPDATA, M_LDT_TXBUFCNT_NPDATA)
400 400
401#define S_LDT_TXBUFCNT_RCMD 16 401#define S_LDT_TXBUFCNT_RCMD 16
402#define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD) 402#define M_LDT_TXBUFCNT_RCMD _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_RCMD)
403#define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD) 403#define V_LDT_TXBUFCNT_RCMD(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RCMD)
404#define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD) 404#define G_LDT_TXBUFCNT_RCMD(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RCMD, M_LDT_TXBUFCNT_RCMD)
405 405
406#define S_LDT_TXBUFCNT_RDATA 20 406#define S_LDT_TXBUFCNT_RDATA 20
407#define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA) 407#define M_LDT_TXBUFCNT_RDATA _SB_MAKEMASK_32(4, S_LDT_TXBUFCNT_RDATA)
408#define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA) 408#define V_LDT_TXBUFCNT_RDATA(x) _SB_MAKEVALUE_32(x, S_LDT_TXBUFCNT_RDATA)
409#define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA) 409#define G_LDT_TXBUFCNT_RDATA(x) _SB_GETVALUE_32(x, S_LDT_TXBUFCNT_RDATA, M_LDT_TXBUFCNT_RDATA)
410 410
411#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 411#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
412/* 412/*
@@ -414,9 +414,9 @@
414 */ 414 */
415 415
416#define S_LDT_ADDSTATUS_TGTDONE 0 416#define S_LDT_ADDSTATUS_TGTDONE 0
417#define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE) 417#define M_LDT_ADDSTATUS_TGTDONE _SB_MAKEMASK_32(8, S_LDT_ADDSTATUS_TGTDONE)
418#define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE) 418#define V_LDT_ADDSTATUS_TGTDONE(x) _SB_MAKEVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE)
419#define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE) 419#define G_LDT_ADDSTATUS_TGTDONE(x) _SB_GETVALUE_32(x, S_LDT_ADDSTATUS_TGTDONE, M_LDT_ADDSTATUS_TGTDONE)
420#endif /* 1250 PASS2 || 112x PASS1 */ 420#endif /* 1250 PASS2 || 112x PASS1 */
421 421
422#endif 422#endif
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 833c8b59d687..b6faf08ca81d 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -55,8 +55,8 @@
55#define M_MAC_BURST_EN _SB_MAKEMASK1(5) 55#define M_MAC_BURST_EN _SB_MAKEMASK1(5)
56 56
57#define S_MAC_TX_PAUSE _SB_MAKE64(6) 57#define S_MAC_TX_PAUSE _SB_MAKE64(6)
58#define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE) 58#define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3, S_MAC_TX_PAUSE)
59#define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x,S_MAC_TX_PAUSE) 59#define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x, S_MAC_TX_PAUSE)
60 60
61#define K_MAC_TX_PAUSE_CNT_512 0 61#define K_MAC_TX_PAUSE_CNT_512 0
62#define K_MAC_TX_PAUSE_CNT_1K 1 62#define K_MAC_TX_PAUSE_CNT_1K 1
@@ -76,7 +76,7 @@
76#define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K) 76#define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K)
77#define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K) 77#define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K)
78 78
79#define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) 79#define M_MAC_RESERVED1 _SB_MAKEMASK(8, 9)
80 80
81#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) 81#define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17)
82 82
@@ -91,15 +91,15 @@
91#define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24) 91#define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24)
92#define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25) 92#define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25)
93 93
94#define M_MAC_RESERVED3 _SB_MAKEMASK(6,26) 94#define M_MAC_RESERVED3 _SB_MAKEMASK(6, 26)
95 95
96#define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32) 96#define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32)
97#define M_MAC_HDX_EN _SB_MAKEMASK1(33) 97#define M_MAC_HDX_EN _SB_MAKEMASK1(33)
98 98
99#define S_MAC_SPEED_SEL _SB_MAKE64(34) 99#define S_MAC_SPEED_SEL _SB_MAKE64(34)
100#define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL) 100#define M_MAC_SPEED_SEL _SB_MAKEMASK(2, S_MAC_SPEED_SEL)
101#define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x,S_MAC_SPEED_SEL) 101#define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x, S_MAC_SPEED_SEL)
102#define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL) 102#define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x, S_MAC_SPEED_SEL, M_MAC_SPEED_SEL)
103 103
104#define K_MAC_SPEED_SEL_10MBPS 0 104#define K_MAC_SPEED_SEL_10MBPS 0
105#define K_MAC_SPEED_SEL_100MBPS 1 105#define K_MAC_SPEED_SEL_100MBPS 1
@@ -117,9 +117,9 @@
117#define M_MAC_SS_EN _SB_MAKEMASK1(39) 117#define M_MAC_SS_EN _SB_MAKEMASK1(39)
118 118
119#define S_MAC_BYPASS_CFG _SB_MAKE64(40) 119#define S_MAC_BYPASS_CFG _SB_MAKE64(40)
120#define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG) 120#define M_MAC_BYPASS_CFG _SB_MAKEMASK(2, S_MAC_BYPASS_CFG)
121#define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG) 121#define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_CFG)
122#define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG) 122#define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_CFG, M_MAC_BYPASS_CFG)
123 123
124#define K_MAC_BYPASS_GMII 0 124#define K_MAC_BYPASS_GMII 0
125#define K_MAC_BYPASS_ENCODED 1 125#define K_MAC_BYPASS_ENCODED 1
@@ -138,9 +138,9 @@
138#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 138#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
139 139
140#define S_MAC_BYPASS_IFG _SB_MAKE64(46) 140#define S_MAC_BYPASS_IFG _SB_MAKE64(46)
141#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) 141#define M_MAC_BYPASS_IFG _SB_MAKEMASK(8, S_MAC_BYPASS_IFG)
142#define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG) 142#define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_IFG)
143#define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG) 143#define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_IFG, M_MAC_BYPASS_IFG)
144 144
145#define K_MAC_FC_CMD_DISABLED 0 145#define K_MAC_FC_CMD_DISABLED 0
146#define K_MAC_FC_CMD_ENABLED 1 146#define K_MAC_FC_CMD_ENABLED 1
@@ -153,14 +153,14 @@
153#define M_MAC_FC_SEL _SB_MAKEMASK1(54) 153#define M_MAC_FC_SEL _SB_MAKEMASK1(54)
154 154
155#define S_MAC_FC_CMD _SB_MAKE64(55) 155#define S_MAC_FC_CMD _SB_MAKE64(55)
156#define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD) 156#define M_MAC_FC_CMD _SB_MAKEMASK(2, S_MAC_FC_CMD)
157#define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x,S_MAC_FC_CMD) 157#define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x, S_MAC_FC_CMD)
158#define G_MAC_FC_CMD(x) _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD) 158#define G_MAC_FC_CMD(x) _SB_GETVALUE(x, S_MAC_FC_CMD, M_MAC_FC_CMD)
159 159
160#define S_MAC_RX_CH_SEL _SB_MAKE64(57) 160#define S_MAC_RX_CH_SEL _SB_MAKE64(57)
161#define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL) 161#define M_MAC_RX_CH_SEL _SB_MAKEMASK(7, S_MAC_RX_CH_SEL)
162#define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL) 162#define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x, S_MAC_RX_CH_SEL)
163#define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL) 163#define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x, S_MAC_RX_CH_SEL, M_MAC_RX_CH_SEL)
164 164
165 165
166/* 166/*
@@ -202,14 +202,14 @@
202 */ 202 */
203 203
204#define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0) 204#define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0)
205#define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0) 205#define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4, S_MAC_TXD_WEIGHT0)
206#define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0) 206#define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x, S_MAC_TXD_WEIGHT0)
207#define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0) 207#define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT0, M_MAC_TXD_WEIGHT0)
208 208
209#define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4) 209#define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4)
210#define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1) 210#define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4, S_MAC_TXD_WEIGHT1)
211#define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1) 211#define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x, S_MAC_TXD_WEIGHT1)
212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1) 212#define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x, S_MAC_TXD_WEIGHT1, M_MAC_TXD_WEIGHT1)
213 213
214/* 214/*
215 * MAC Fifo Threshhold registers (Table 9-14) 215 * MAC Fifo Threshhold registers (Table 9-14)
@@ -221,50 +221,50 @@
221#define S_MAC_TX_WR_THRSH _SB_MAKE64(0) 221#define S_MAC_TX_WR_THRSH _SB_MAKE64(0)
222#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 222#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
223/* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 223/* XXX: Can't enable, as it has the same name as a pass2+ define below. */
224/* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */ 224/* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6, S_MAC_TX_WR_THRSH) */
225#endif /* up to 1250 PASS1 */ 225#endif /* up to 1250 PASS1 */
226#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 226#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
227#define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH) 227#define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7, S_MAC_TX_WR_THRSH)
228#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 228#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
229#define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH) 229#define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_WR_THRSH)
230#define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH) 230#define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_WR_THRSH, M_MAC_TX_WR_THRSH)
231 231
232#define S_MAC_TX_RD_THRSH _SB_MAKE64(8) 232#define S_MAC_TX_RD_THRSH _SB_MAKE64(8)
233#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 233#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
234/* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 234/* XXX: Can't enable, as it has the same name as a pass2+ define below. */
235/* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */ 235/* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6, S_MAC_TX_RD_THRSH) */
236#endif /* up to 1250 PASS1 */ 236#endif /* up to 1250 PASS1 */
237#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 237#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
238#define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH) 238#define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7, S_MAC_TX_RD_THRSH)
239#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 239#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
240#define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH) 240#define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_RD_THRSH)
241#define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH) 241#define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_RD_THRSH, M_MAC_TX_RD_THRSH)
242 242
243#define S_MAC_TX_RL_THRSH _SB_MAKE64(16) 243#define S_MAC_TX_RL_THRSH _SB_MAKE64(16)
244#define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH) 244#define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4, S_MAC_TX_RL_THRSH)
245#define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH) 245#define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_TX_RL_THRSH)
246#define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH) 246#define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x, S_MAC_TX_RL_THRSH, M_MAC_TX_RL_THRSH)
247 247
248#define S_MAC_RX_PL_THRSH _SB_MAKE64(24) 248#define S_MAC_RX_PL_THRSH _SB_MAKE64(24)
249#define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH) 249#define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6, S_MAC_RX_PL_THRSH)
250#define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH) 250#define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_PL_THRSH)
251#define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH) 251#define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_PL_THRSH, M_MAC_RX_PL_THRSH)
252 252
253#define S_MAC_RX_RD_THRSH _SB_MAKE64(32) 253#define S_MAC_RX_RD_THRSH _SB_MAKE64(32)
254#define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH) 254#define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6, S_MAC_RX_RD_THRSH)
255#define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH) 255#define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_RD_THRSH)
256#define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH) 256#define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_RD_THRSH, M_MAC_RX_RD_THRSH)
257 257
258#define S_MAC_RX_RL_THRSH _SB_MAKE64(40) 258#define S_MAC_RX_RL_THRSH _SB_MAKE64(40)
259#define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH) 259#define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6, S_MAC_RX_RL_THRSH)
260#define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH) 260#define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x, S_MAC_RX_RL_THRSH)
261#define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH) 261#define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x, S_MAC_RX_RL_THRSH, M_MAC_RX_RL_THRSH)
262 262
263#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 263#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
264#define S_MAC_ENC_FC_THRSH _SB_MAKE64(56) 264#define S_MAC_ENC_FC_THRSH _SB_MAKE64(56)
265#define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH) 265#define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6, S_MAC_ENC_FC_THRSH)
266#define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH) 266#define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x, S_MAC_ENC_FC_THRSH)
267#define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH) 267#define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x, S_MAC_ENC_FC_THRSH, M_MAC_ENC_FC_THRSH)
268#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 268#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
269 269
270/* 270/*
@@ -276,51 +276,51 @@
276 276
277/* XXXCGD: ??? Unused in pass2? */ 277/* XXXCGD: ??? Unused in pass2? */
278#define S_MAC_IFG_RX _SB_MAKE64(0) 278#define S_MAC_IFG_RX _SB_MAKE64(0)
279#define M_MAC_IFG_RX _SB_MAKEMASK(6,S_MAC_IFG_RX) 279#define M_MAC_IFG_RX _SB_MAKEMASK(6, S_MAC_IFG_RX)
280#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) 280#define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x, S_MAC_IFG_RX)
281#define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) 281#define G_MAC_IFG_RX(x) _SB_GETVALUE(x, S_MAC_IFG_RX, M_MAC_IFG_RX)
282 282
283#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 283#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
284#define S_MAC_PRE_LEN _SB_MAKE64(0) 284#define S_MAC_PRE_LEN _SB_MAKE64(0)
285#define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) 285#define M_MAC_PRE_LEN _SB_MAKEMASK(6, S_MAC_PRE_LEN)
286#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) 286#define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x, S_MAC_PRE_LEN)
287#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) 287#define G_MAC_PRE_LEN(x) _SB_GETVALUE(x, S_MAC_PRE_LEN, M_MAC_PRE_LEN)
288#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 288#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
289 289
290#define S_MAC_IFG_TX _SB_MAKE64(6) 290#define S_MAC_IFG_TX _SB_MAKE64(6)
291#define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) 291#define M_MAC_IFG_TX _SB_MAKEMASK(6, S_MAC_IFG_TX)
292#define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x,S_MAC_IFG_TX) 292#define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x, S_MAC_IFG_TX)
293#define G_MAC_IFG_TX(x) _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX) 293#define G_MAC_IFG_TX(x) _SB_GETVALUE(x, S_MAC_IFG_TX, M_MAC_IFG_TX)
294 294
295#define S_MAC_IFG_THRSH _SB_MAKE64(12) 295#define S_MAC_IFG_THRSH _SB_MAKE64(12)
296#define M_MAC_IFG_THRSH _SB_MAKEMASK(6,S_MAC_IFG_THRSH) 296#define M_MAC_IFG_THRSH _SB_MAKEMASK(6, S_MAC_IFG_THRSH)
297#define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x,S_MAC_IFG_THRSH) 297#define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x, S_MAC_IFG_THRSH)
298#define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH) 298#define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x, S_MAC_IFG_THRSH, M_MAC_IFG_THRSH)
299 299
300#define S_MAC_BACKOFF_SEL _SB_MAKE64(18) 300#define S_MAC_BACKOFF_SEL _SB_MAKE64(18)
301#define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL) 301#define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4, S_MAC_BACKOFF_SEL)
302#define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL) 302#define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x, S_MAC_BACKOFF_SEL)
303#define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL) 303#define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x, S_MAC_BACKOFF_SEL, M_MAC_BACKOFF_SEL)
304 304
305#define S_MAC_LFSR_SEED _SB_MAKE64(22) 305#define S_MAC_LFSR_SEED _SB_MAKE64(22)
306#define M_MAC_LFSR_SEED _SB_MAKEMASK(8,S_MAC_LFSR_SEED) 306#define M_MAC_LFSR_SEED _SB_MAKEMASK(8, S_MAC_LFSR_SEED)
307#define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x,S_MAC_LFSR_SEED) 307#define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x, S_MAC_LFSR_SEED)
308#define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED) 308#define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x, S_MAC_LFSR_SEED, M_MAC_LFSR_SEED)
309 309
310#define S_MAC_SLOT_SIZE _SB_MAKE64(30) 310#define S_MAC_SLOT_SIZE _SB_MAKE64(30)
311#define M_MAC_SLOT_SIZE _SB_MAKEMASK(10,S_MAC_SLOT_SIZE) 311#define M_MAC_SLOT_SIZE _SB_MAKEMASK(10, S_MAC_SLOT_SIZE)
312#define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE) 312#define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x, S_MAC_SLOT_SIZE)
313#define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE) 313#define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x, S_MAC_SLOT_SIZE, M_MAC_SLOT_SIZE)
314 314
315#define S_MAC_MIN_FRAMESZ _SB_MAKE64(40) 315#define S_MAC_MIN_FRAMESZ _SB_MAKE64(40)
316#define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ) 316#define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8, S_MAC_MIN_FRAMESZ)
317#define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ) 317#define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x, S_MAC_MIN_FRAMESZ)
318#define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ) 318#define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x, S_MAC_MIN_FRAMESZ, M_MAC_MIN_FRAMESZ)
319 319
320#define S_MAC_MAX_FRAMESZ _SB_MAKE64(48) 320#define S_MAC_MAX_FRAMESZ _SB_MAKE64(48)
321#define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ) 321#define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16, S_MAC_MAX_FRAMESZ)
322#define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ) 322#define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x, S_MAC_MAX_FRAMESZ)
323#define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ) 323#define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x, S_MAC_MAX_FRAMESZ, M_MAC_MAX_FRAMESZ)
324 324
325/* 325/*
326 * These constants are used to configure the fields within the Frame 326 * These constants are used to configure the fields within the Frame
@@ -377,20 +377,20 @@
377 */ 377 */
378 378
379#define S_MAC_VLAN_TAG _SB_MAKE64(0) 379#define S_MAC_VLAN_TAG _SB_MAKE64(0)
380#define M_MAC_VLAN_TAG _SB_MAKEMASK(32,S_MAC_VLAN_TAG) 380#define M_MAC_VLAN_TAG _SB_MAKEMASK(32, S_MAC_VLAN_TAG)
381#define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG) 381#define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x, S_MAC_VLAN_TAG)
382#define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG) 382#define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x, S_MAC_VLAN_TAG, M_MAC_VLAN_TAG)
383 383
384#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 384#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
385#define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32) 385#define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32)
386#define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET) 386#define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8, S_MAC_TX_PKT_OFFSET)
387#define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET) 387#define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_TX_PKT_OFFSET)
388#define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET) 388#define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x, S_MAC_TX_PKT_OFFSET, M_MAC_TX_PKT_OFFSET)
389 389
390#define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40) 390#define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40)
391#define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET) 391#define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8, S_MAC_TX_CRC_OFFSET)
392#define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET) 392#define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_TX_CRC_OFFSET)
393#define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET) 393#define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x, S_MAC_TX_CRC_OFFSET, M_MAC_TX_CRC_OFFSET)
394 394
395#define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48) 395#define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48)
396#endif /* 1250 PASS3 || 112x PASS1 */ 396#endif /* 1250 PASS3 || 112x PASS1 */
@@ -425,7 +425,7 @@
425 * is that you'll use one of the "S_" things above 425 * is that you'll use one of the "S_" things above
426 * and pass just the six bits to a DMA-channel-specific ISR 426 * and pass just the six bits to a DMA-channel-specific ISR
427 */ 427 */
428#define M_MAC_INT_CHANNEL _SB_MAKEMASK(8,0) 428#define M_MAC_INT_CHANNEL _SB_MAKEMASK(8, 0)
429#define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0) 429#define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0)
430#define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1) 430#define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1)
431#define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2) 431#define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2)
@@ -440,19 +440,19 @@
440 * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see 440 * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see
441 * also DMA_TX/DMA_RX in sb_regs.h). 441 * also DMA_TX/DMA_RX in sb_regs.h).
442 */ 442 */
443#define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH) 443#define S_MAC_STATUS_CH_OFFSET(ch, txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH)
444 444
445#define M_MAC_STATUS_CHANNEL(ch,txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx)) 445#define M_MAC_STATUS_CHANNEL(ch, txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8, 0), S_MAC_STATUS_CH_OFFSET(ch, txrx))
446#define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 446#define M_MAC_STATUS_EOP_COUNT(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT, S_MAC_STATUS_CH_OFFSET(ch, txrx))
447#define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 447#define M_MAC_STATUS_EOP_TIMER(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER, S_MAC_STATUS_CH_OFFSET(ch, txrx))
448#define M_MAC_STATUS_EOP_SEEN(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 448#define M_MAC_STATUS_EOP_SEEN(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN, S_MAC_STATUS_CH_OFFSET(ch, txrx))
449#define M_MAC_STATUS_HWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 449#define M_MAC_STATUS_HWM(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_HWM, S_MAC_STATUS_CH_OFFSET(ch, txrx))
450#define M_MAC_STATUS_LWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 450#define M_MAC_STATUS_LWM(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_LWM, S_MAC_STATUS_CH_OFFSET(ch, txrx))
451#define M_MAC_STATUS_DSCR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 451#define M_MAC_STATUS_DSCR(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR, S_MAC_STATUS_CH_OFFSET(ch, txrx))
452#define M_MAC_STATUS_ERR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 452#define M_MAC_STATUS_ERR(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_ERR, S_MAC_STATUS_CH_OFFSET(ch, txrx))
453#define M_MAC_STATUS_DZERO(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 453#define M_MAC_STATUS_DZERO(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO, S_MAC_STATUS_CH_OFFSET(ch, txrx))
454#define M_MAC_STATUS_DROP(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 454#define M_MAC_STATUS_DROP(ch, txrx) _SB_MAKEVALUE(M_MAC_INT_DROP, S_MAC_STATUS_CH_OFFSET(ch, txrx))
455#define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40) 455#define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7, 0), 40)
456 456
457 457
458#define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40) 458#define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40)
@@ -467,9 +467,9 @@
467#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 467#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
468 468
469#define S_MAC_COUNTER_ADDR _SB_MAKE64(47) 469#define S_MAC_COUNTER_ADDR _SB_MAKE64(47)
470#define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR) 470#define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5, S_MAC_COUNTER_ADDR)
471#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) 471#define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x, S_MAC_COUNTER_ADDR)
472#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) 472#define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x, S_MAC_COUNTER_ADDR, M_MAC_COUNTER_ADDR)
473 473
474#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 474#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
475#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) 475#define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52)
@@ -483,24 +483,24 @@
483 */ 483 */
484 484
485#define S_MAC_TX_WRPTR _SB_MAKE64(0) 485#define S_MAC_TX_WRPTR _SB_MAKE64(0)
486#define M_MAC_TX_WRPTR _SB_MAKEMASK(6,S_MAC_TX_WRPTR) 486#define M_MAC_TX_WRPTR _SB_MAKEMASK(6, S_MAC_TX_WRPTR)
487#define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_WRPTR) 487#define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x, S_MAC_TX_WRPTR)
488#define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR) 488#define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x, S_MAC_TX_WRPTR, M_MAC_TX_WRPTR)
489 489
490#define S_MAC_TX_RDPTR _SB_MAKE64(8) 490#define S_MAC_TX_RDPTR _SB_MAKE64(8)
491#define M_MAC_TX_RDPTR _SB_MAKEMASK(6,S_MAC_TX_RDPTR) 491#define M_MAC_TX_RDPTR _SB_MAKEMASK(6, S_MAC_TX_RDPTR)
492#define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_RDPTR) 492#define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x, S_MAC_TX_RDPTR)
493#define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR) 493#define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x, S_MAC_TX_RDPTR, M_MAC_TX_RDPTR)
494 494
495#define S_MAC_RX_WRPTR _SB_MAKE64(16) 495#define S_MAC_RX_WRPTR _SB_MAKE64(16)
496#define M_MAC_RX_WRPTR _SB_MAKEMASK(6,S_MAC_RX_WRPTR) 496#define M_MAC_RX_WRPTR _SB_MAKEMASK(6, S_MAC_RX_WRPTR)
497#define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_WRPTR) 497#define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x, S_MAC_RX_WRPTR)
498#define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR) 498#define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x, S_MAC_RX_WRPTR, M_MAC_TX_WRPTR)
499 499
500#define S_MAC_RX_RDPTR _SB_MAKE64(24) 500#define S_MAC_RX_RDPTR _SB_MAKE64(24)
501#define M_MAC_RX_RDPTR _SB_MAKEMASK(6,S_MAC_RX_RDPTR) 501#define M_MAC_RX_RDPTR _SB_MAKEMASK(6, S_MAC_RX_RDPTR)
502#define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_RDPTR) 502#define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x, S_MAC_RX_RDPTR)
503#define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR) 503#define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x, S_MAC_RX_RDPTR, M_MAC_TX_RDPTR)
504 504
505/* 505/*
506 * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register] 506 * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register]
@@ -510,14 +510,14 @@
510 */ 510 */
511 511
512#define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0) 512#define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0)
513#define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER) 513#define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6, S_MAC_TX_EOP_COUNTER)
514#define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER) 514#define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x, S_MAC_TX_EOP_COUNTER)
515#define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER) 515#define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_TX_EOP_COUNTER, M_MAC_TX_EOP_COUNTER)
516 516
517#define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8) 517#define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8)
518#define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER) 518#define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6, S_MAC_RX_EOP_COUNTER)
519#define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER) 519#define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x, S_MAC_RX_EOP_COUNTER)
520#define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER) 520#define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x, S_MAC_RX_EOP_COUNTER, M_MAC_RX_EOP_COUNTER)
521 521
522/* 522/*
523 * MAC Recieve Address Filter Exact Match Registers (Table 9-21) 523 * MAC Recieve Address Filter Exact Match Registers (Table 9-21)
@@ -565,24 +565,24 @@
565#define S_TYPECFG_TYPESIZE _SB_MAKE64(16) 565#define S_TYPECFG_TYPESIZE _SB_MAKE64(16)
566 566
567#define S_TYPECFG_TYPE0 _SB_MAKE64(0) 567#define S_TYPECFG_TYPE0 _SB_MAKE64(0)
568#define M_TYPECFG_TYPE0 _SB_MAKEMASK(16,S_TYPECFG_TYPE0) 568#define M_TYPECFG_TYPE0 _SB_MAKEMASK(16, S_TYPECFG_TYPE0)
569#define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE0) 569#define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE0)
570#define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0) 570#define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x, S_TYPECFG_TYPE0, M_TYPECFG_TYPE0)
571 571
572#define S_TYPECFG_TYPE1 _SB_MAKE64(0) 572#define S_TYPECFG_TYPE1 _SB_MAKE64(0)
573#define M_TYPECFG_TYPE1 _SB_MAKEMASK(16,S_TYPECFG_TYPE1) 573#define M_TYPECFG_TYPE1 _SB_MAKEMASK(16, S_TYPECFG_TYPE1)
574#define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE1) 574#define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE1)
575#define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1) 575#define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x, S_TYPECFG_TYPE1, M_TYPECFG_TYPE1)
576 576
577#define S_TYPECFG_TYPE2 _SB_MAKE64(0) 577#define S_TYPECFG_TYPE2 _SB_MAKE64(0)
578#define M_TYPECFG_TYPE2 _SB_MAKEMASK(16,S_TYPECFG_TYPE2) 578#define M_TYPECFG_TYPE2 _SB_MAKEMASK(16, S_TYPECFG_TYPE2)
579#define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE2) 579#define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE2)
580#define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2) 580#define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x, S_TYPECFG_TYPE2, M_TYPECFG_TYPE2)
581 581
582#define S_TYPECFG_TYPE3 _SB_MAKE64(0) 582#define S_TYPECFG_TYPE3 _SB_MAKE64(0)
583#define M_TYPECFG_TYPE3 _SB_MAKEMASK(16,S_TYPECFG_TYPE3) 583#define M_TYPECFG_TYPE3 _SB_MAKEMASK(16, S_TYPECFG_TYPE3)
584#define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE3) 584#define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x, S_TYPECFG_TYPE3)
585#define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3) 585#define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x, S_TYPECFG_TYPE3, M_TYPECFG_TYPE3)
586 586
587/* 587/*
588 * MAC Receive Address Filter Control Registers (Table 9-24) 588 * MAC Receive Address Filter Control Registers (Table 9-24)
@@ -603,28 +603,28 @@
603#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 603#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
604 604
605#define S_MAC_IPHDR_OFFSET _SB_MAKE64(8) 605#define S_MAC_IPHDR_OFFSET _SB_MAKE64(8)
606#define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET) 606#define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8, S_MAC_IPHDR_OFFSET)
607#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) 607#define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_IPHDR_OFFSET)
608#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) 608#define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x, S_MAC_IPHDR_OFFSET, M_MAC_IPHDR_OFFSET)
609 609
610#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 610#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
611#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) 611#define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16)
612#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) 612#define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8, S_MAC_RX_CRC_OFFSET)
613#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) 613#define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_RX_CRC_OFFSET)
614#define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET) 614#define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x, S_MAC_RX_CRC_OFFSET, M_MAC_RX_CRC_OFFSET)
615 615
616#define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24) 616#define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24)
617#define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET) 617#define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8, S_MAC_RX_PKT_OFFSET)
618#define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET) 618#define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x, S_MAC_RX_PKT_OFFSET)
619#define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET) 619#define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x, S_MAC_RX_PKT_OFFSET, M_MAC_RX_PKT_OFFSET)
620 620
621#define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32) 621#define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32)
622#define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33) 622#define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33)
623 623
624#define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34) 624#define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34)
625#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) 625#define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8, S_MAC_RX_CH_MSN_SEL)
626#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) 626#define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x, S_MAC_RX_CH_MSN_SEL)
627#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) 627#define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x, S_MAC_RX_CH_MSN_SEL, M_MAC_RX_CH_MSN_SEL)
628#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 628#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
629 629
630/* 630/*
diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h
index 4fe848ffbc31..1eb1b5a88736 100644
--- a/include/asm-mips/sibyte/sb1250_mc.h
+++ b/include/asm-mips/sibyte/sb1250_mc.h
@@ -10,7 +10,7 @@
10 * 10 *
11 ********************************************************************* 11 *********************************************************************
12 * 12 *
13 * Copyright 2000,2001,2002,2003 13 * Copyright 2000, 2001, 2002, 2003
14 * Broadcom Corporation. All rights reserved. 14 * Broadcom Corporation. All rights reserved.
15 * 15 *
16 * This program is free software; you can redistribute it and/or 16 * This program is free software; you can redistribute it and/or
@@ -40,73 +40,73 @@
40 */ 40 */
41 41
42#define S_MC_RESERVED0 0 42#define S_MC_RESERVED0 0
43#define M_MC_RESERVED0 _SB_MAKEMASK(8,S_MC_RESERVED0) 43#define M_MC_RESERVED0 _SB_MAKEMASK(8, S_MC_RESERVED0)
44 44
45#define S_MC_CHANNEL_SEL 8 45#define S_MC_CHANNEL_SEL 8
46#define M_MC_CHANNEL_SEL _SB_MAKEMASK(8,S_MC_CHANNEL_SEL) 46#define M_MC_CHANNEL_SEL _SB_MAKEMASK(8, S_MC_CHANNEL_SEL)
47#define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x,S_MC_CHANNEL_SEL) 47#define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL)
48#define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x,S_MC_CHANNEL_SEL,M_MC_CHANNEL_SEL) 48#define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL)
49 49
50#define S_MC_BANK0_MAP 16 50#define S_MC_BANK0_MAP 16
51#define M_MC_BANK0_MAP _SB_MAKEMASK(4,S_MC_BANK0_MAP) 51#define M_MC_BANK0_MAP _SB_MAKEMASK(4, S_MC_BANK0_MAP)
52#define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK0_MAP) 52#define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP)
53#define G_MC_BANK0_MAP(x) _SB_GETVALUE(x,S_MC_BANK0_MAP,M_MC_BANK0_MAP) 53#define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP)
54 54
55#define K_MC_BANK0_MAP_DEFAULT 0x00 55#define K_MC_BANK0_MAP_DEFAULT 0x00
56#define V_MC_BANK0_MAP_DEFAULT V_MC_BANK0_MAP(K_MC_BANK0_MAP_DEFAULT) 56#define V_MC_BANK0_MAP_DEFAULT V_MC_BANK0_MAP(K_MC_BANK0_MAP_DEFAULT)
57 57
58#define S_MC_BANK1_MAP 20 58#define S_MC_BANK1_MAP 20
59#define M_MC_BANK1_MAP _SB_MAKEMASK(4,S_MC_BANK1_MAP) 59#define M_MC_BANK1_MAP _SB_MAKEMASK(4, S_MC_BANK1_MAP)
60#define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK1_MAP) 60#define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP)
61#define G_MC_BANK1_MAP(x) _SB_GETVALUE(x,S_MC_BANK1_MAP,M_MC_BANK1_MAP) 61#define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP)
62 62
63#define K_MC_BANK1_MAP_DEFAULT 0x08 63#define K_MC_BANK1_MAP_DEFAULT 0x08
64#define V_MC_BANK1_MAP_DEFAULT V_MC_BANK1_MAP(K_MC_BANK1_MAP_DEFAULT) 64#define V_MC_BANK1_MAP_DEFAULT V_MC_BANK1_MAP(K_MC_BANK1_MAP_DEFAULT)
65 65
66#define S_MC_BANK2_MAP 24 66#define S_MC_BANK2_MAP 24
67#define M_MC_BANK2_MAP _SB_MAKEMASK(4,S_MC_BANK2_MAP) 67#define M_MC_BANK2_MAP _SB_MAKEMASK(4, S_MC_BANK2_MAP)
68#define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK2_MAP) 68#define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP)
69#define G_MC_BANK2_MAP(x) _SB_GETVALUE(x,S_MC_BANK2_MAP,M_MC_BANK2_MAP) 69#define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP)
70 70
71#define K_MC_BANK2_MAP_DEFAULT 0x09 71#define K_MC_BANK2_MAP_DEFAULT 0x09
72#define V_MC_BANK2_MAP_DEFAULT V_MC_BANK2_MAP(K_MC_BANK2_MAP_DEFAULT) 72#define V_MC_BANK2_MAP_DEFAULT V_MC_BANK2_MAP(K_MC_BANK2_MAP_DEFAULT)
73 73
74#define S_MC_BANK3_MAP 28 74#define S_MC_BANK3_MAP 28
75#define M_MC_BANK3_MAP _SB_MAKEMASK(4,S_MC_BANK3_MAP) 75#define M_MC_BANK3_MAP _SB_MAKEMASK(4, S_MC_BANK3_MAP)
76#define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x,S_MC_BANK3_MAP) 76#define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP)
77#define G_MC_BANK3_MAP(x) _SB_GETVALUE(x,S_MC_BANK3_MAP,M_MC_BANK3_MAP) 77#define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP)
78 78
79#define K_MC_BANK3_MAP_DEFAULT 0x0C 79#define K_MC_BANK3_MAP_DEFAULT 0x0C
80#define V_MC_BANK3_MAP_DEFAULT V_MC_BANK3_MAP(K_MC_BANK3_MAP_DEFAULT) 80#define V_MC_BANK3_MAP_DEFAULT V_MC_BANK3_MAP(K_MC_BANK3_MAP_DEFAULT)
81 81
82#define M_MC_RESERVED1 _SB_MAKEMASK(8,32) 82#define M_MC_RESERVED1 _SB_MAKEMASK(8, 32)
83 83
84#define S_MC_QUEUE_SIZE 40 84#define S_MC_QUEUE_SIZE 40
85#define M_MC_QUEUE_SIZE _SB_MAKEMASK(4,S_MC_QUEUE_SIZE) 85#define M_MC_QUEUE_SIZE _SB_MAKEMASK(4, S_MC_QUEUE_SIZE)
86#define V_MC_QUEUE_SIZE(x) _SB_MAKEVALUE(x,S_MC_QUEUE_SIZE) 86#define V_MC_QUEUE_SIZE(x) _SB_MAKEVALUE(x, S_MC_QUEUE_SIZE)
87#define G_MC_QUEUE_SIZE(x) _SB_GETVALUE(x,S_MC_QUEUE_SIZE,M_MC_QUEUE_SIZE) 87#define G_MC_QUEUE_SIZE(x) _SB_GETVALUE(x, S_MC_QUEUE_SIZE, M_MC_QUEUE_SIZE)
88#define V_MC_QUEUE_SIZE_DEFAULT V_MC_QUEUE_SIZE(0x0A) 88#define V_MC_QUEUE_SIZE_DEFAULT V_MC_QUEUE_SIZE(0x0A)
89 89
90#define S_MC_AGE_LIMIT 44 90#define S_MC_AGE_LIMIT 44
91#define M_MC_AGE_LIMIT _SB_MAKEMASK(4,S_MC_AGE_LIMIT) 91#define M_MC_AGE_LIMIT _SB_MAKEMASK(4, S_MC_AGE_LIMIT)
92#define V_MC_AGE_LIMIT(x) _SB_MAKEVALUE(x,S_MC_AGE_LIMIT) 92#define V_MC_AGE_LIMIT(x) _SB_MAKEVALUE(x, S_MC_AGE_LIMIT)
93#define G_MC_AGE_LIMIT(x) _SB_GETVALUE(x,S_MC_AGE_LIMIT,M_MC_AGE_LIMIT) 93#define G_MC_AGE_LIMIT(x) _SB_GETVALUE(x, S_MC_AGE_LIMIT, M_MC_AGE_LIMIT)
94#define V_MC_AGE_LIMIT_DEFAULT V_MC_AGE_LIMIT(8) 94#define V_MC_AGE_LIMIT_DEFAULT V_MC_AGE_LIMIT(8)
95 95
96#define S_MC_WR_LIMIT 48 96#define S_MC_WR_LIMIT 48
97#define M_MC_WR_LIMIT _SB_MAKEMASK(4,S_MC_WR_LIMIT) 97#define M_MC_WR_LIMIT _SB_MAKEMASK(4, S_MC_WR_LIMIT)
98#define V_MC_WR_LIMIT(x) _SB_MAKEVALUE(x,S_MC_WR_LIMIT) 98#define V_MC_WR_LIMIT(x) _SB_MAKEVALUE(x, S_MC_WR_LIMIT)
99#define G_MC_WR_LIMIT(x) _SB_GETVALUE(x,S_MC_WR_LIMIT,M_MC_WR_LIMIT) 99#define G_MC_WR_LIMIT(x) _SB_GETVALUE(x, S_MC_WR_LIMIT, M_MC_WR_LIMIT)
100#define V_MC_WR_LIMIT_DEFAULT V_MC_WR_LIMIT(5) 100#define V_MC_WR_LIMIT_DEFAULT V_MC_WR_LIMIT(5)
101 101
102#define M_MC_IOB1HIGHPRIORITY _SB_MAKEMASK1(52) 102#define M_MC_IOB1HIGHPRIORITY _SB_MAKEMASK1(52)
103 103
104#define M_MC_RESERVED2 _SB_MAKEMASK(3,53) 104#define M_MC_RESERVED2 _SB_MAKEMASK(3, 53)
105 105
106#define S_MC_CS_MODE 56 106#define S_MC_CS_MODE 56
107#define M_MC_CS_MODE _SB_MAKEMASK(4,S_MC_CS_MODE) 107#define M_MC_CS_MODE _SB_MAKEMASK(4, S_MC_CS_MODE)
108#define V_MC_CS_MODE(x) _SB_MAKEVALUE(x,S_MC_CS_MODE) 108#define V_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_MC_CS_MODE)
109#define G_MC_CS_MODE(x) _SB_GETVALUE(x,S_MC_CS_MODE,M_MC_CS_MODE) 109#define G_MC_CS_MODE(x) _SB_GETVALUE(x, S_MC_CS_MODE, M_MC_CS_MODE)
110 110
111#define K_MC_CS_MODE_MSB_CS 0 111#define K_MC_CS_MODE_MSB_CS 0
112#define K_MC_CS_MODE_INTLV_CS 15 112#define K_MC_CS_MODE_INTLV_CS 15
@@ -138,9 +138,9 @@
138 */ 138 */
139 139
140#define S_MC_CLK_RATIO 0 140#define S_MC_CLK_RATIO 0
141#define M_MC_CLK_RATIO _SB_MAKEMASK(4,S_MC_CLK_RATIO) 141#define M_MC_CLK_RATIO _SB_MAKEMASK(4, S_MC_CLK_RATIO)
142#define V_MC_CLK_RATIO(x) _SB_MAKEVALUE(x,S_MC_CLK_RATIO) 142#define V_MC_CLK_RATIO(x) _SB_MAKEVALUE(x, S_MC_CLK_RATIO)
143#define G_MC_CLK_RATIO(x) _SB_GETVALUE(x,S_MC_CLK_RATIO,M_MC_CLK_RATIO) 143#define G_MC_CLK_RATIO(x) _SB_GETVALUE(x, S_MC_CLK_RATIO, M_MC_CLK_RATIO)
144 144
145#define K_MC_CLK_RATIO_2X 4 145#define K_MC_CLK_RATIO_2X 4
146#define K_MC_CLK_RATIO_25X 5 146#define K_MC_CLK_RATIO_25X 5
@@ -158,9 +158,9 @@
158#define V_MC_CLK_RATIO_DEFAULT V_MC_CLK_RATIO_25X 158#define V_MC_CLK_RATIO_DEFAULT V_MC_CLK_RATIO_25X
159 159
160#define S_MC_REF_RATE 8 160#define S_MC_REF_RATE 8
161#define M_MC_REF_RATE _SB_MAKEMASK(8,S_MC_REF_RATE) 161#define M_MC_REF_RATE _SB_MAKEMASK(8, S_MC_REF_RATE)
162#define V_MC_REF_RATE(x) _SB_MAKEVALUE(x,S_MC_REF_RATE) 162#define V_MC_REF_RATE(x) _SB_MAKEVALUE(x, S_MC_REF_RATE)
163#define G_MC_REF_RATE(x) _SB_GETVALUE(x,S_MC_REF_RATE,M_MC_REF_RATE) 163#define G_MC_REF_RATE(x) _SB_GETVALUE(x, S_MC_REF_RATE, M_MC_REF_RATE)
164 164
165#define K_MC_REF_RATE_100MHz 0x62 165#define K_MC_REF_RATE_100MHz 0x62
166#define K_MC_REF_RATE_133MHz 0x81 166#define K_MC_REF_RATE_133MHz 0x81
@@ -172,21 +172,21 @@
172#define V_MC_REF_RATE_DEFAULT V_MC_REF_RATE_100MHz 172#define V_MC_REF_RATE_DEFAULT V_MC_REF_RATE_100MHz
173 173
174#define S_MC_CLOCK_DRIVE 16 174#define S_MC_CLOCK_DRIVE 16
175#define M_MC_CLOCK_DRIVE _SB_MAKEMASK(4,S_MC_CLOCK_DRIVE) 175#define M_MC_CLOCK_DRIVE _SB_MAKEMASK(4, S_MC_CLOCK_DRIVE)
176#define V_MC_CLOCK_DRIVE(x) _SB_MAKEVALUE(x,S_MC_CLOCK_DRIVE) 176#define V_MC_CLOCK_DRIVE(x) _SB_MAKEVALUE(x, S_MC_CLOCK_DRIVE)
177#define G_MC_CLOCK_DRIVE(x) _SB_GETVALUE(x,S_MC_CLOCK_DRIVE,M_MC_CLOCK_DRIVE) 177#define G_MC_CLOCK_DRIVE(x) _SB_GETVALUE(x, S_MC_CLOCK_DRIVE, M_MC_CLOCK_DRIVE)
178#define V_MC_CLOCK_DRIVE_DEFAULT V_MC_CLOCK_DRIVE(0xF) 178#define V_MC_CLOCK_DRIVE_DEFAULT V_MC_CLOCK_DRIVE(0xF)
179 179
180#define S_MC_DATA_DRIVE 20 180#define S_MC_DATA_DRIVE 20
181#define M_MC_DATA_DRIVE _SB_MAKEMASK(4,S_MC_DATA_DRIVE) 181#define M_MC_DATA_DRIVE _SB_MAKEMASK(4, S_MC_DATA_DRIVE)
182#define V_MC_DATA_DRIVE(x) _SB_MAKEVALUE(x,S_MC_DATA_DRIVE) 182#define V_MC_DATA_DRIVE(x) _SB_MAKEVALUE(x, S_MC_DATA_DRIVE)
183#define G_MC_DATA_DRIVE(x) _SB_GETVALUE(x,S_MC_DATA_DRIVE,M_MC_DATA_DRIVE) 183#define G_MC_DATA_DRIVE(x) _SB_GETVALUE(x, S_MC_DATA_DRIVE, M_MC_DATA_DRIVE)
184#define V_MC_DATA_DRIVE_DEFAULT V_MC_DATA_DRIVE(0x0) 184#define V_MC_DATA_DRIVE_DEFAULT V_MC_DATA_DRIVE(0x0)
185 185
186#define S_MC_ADDR_DRIVE 24 186#define S_MC_ADDR_DRIVE 24
187#define M_MC_ADDR_DRIVE _SB_MAKEMASK(4,S_MC_ADDR_DRIVE) 187#define M_MC_ADDR_DRIVE _SB_MAKEMASK(4, S_MC_ADDR_DRIVE)
188#define V_MC_ADDR_DRIVE(x) _SB_MAKEVALUE(x,S_MC_ADDR_DRIVE) 188#define V_MC_ADDR_DRIVE(x) _SB_MAKEVALUE(x, S_MC_ADDR_DRIVE)
189#define G_MC_ADDR_DRIVE(x) _SB_GETVALUE(x,S_MC_ADDR_DRIVE,M_MC_ADDR_DRIVE) 189#define G_MC_ADDR_DRIVE(x) _SB_GETVALUE(x, S_MC_ADDR_DRIVE, M_MC_ADDR_DRIVE)
190#define V_MC_ADDR_DRIVE_DEFAULT V_MC_ADDR_DRIVE(0x0) 190#define V_MC_ADDR_DRIVE_DEFAULT V_MC_ADDR_DRIVE(0x0)
191 191
192#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) 192#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1)
@@ -196,27 +196,27 @@
196#define M_MC_DLL_BYPASS _SB_MAKEMASK1(31) 196#define M_MC_DLL_BYPASS _SB_MAKEMASK1(31)
197 197
198#define S_MC_DQI_SKEW 32 198#define S_MC_DQI_SKEW 32
199#define M_MC_DQI_SKEW _SB_MAKEMASK(8,S_MC_DQI_SKEW) 199#define M_MC_DQI_SKEW _SB_MAKEMASK(8, S_MC_DQI_SKEW)
200#define V_MC_DQI_SKEW(x) _SB_MAKEVALUE(x,S_MC_DQI_SKEW) 200#define V_MC_DQI_SKEW(x) _SB_MAKEVALUE(x, S_MC_DQI_SKEW)
201#define G_MC_DQI_SKEW(x) _SB_GETVALUE(x,S_MC_DQI_SKEW,M_MC_DQI_SKEW) 201#define G_MC_DQI_SKEW(x) _SB_GETVALUE(x, S_MC_DQI_SKEW, M_MC_DQI_SKEW)
202#define V_MC_DQI_SKEW_DEFAULT V_MC_DQI_SKEW(0) 202#define V_MC_DQI_SKEW_DEFAULT V_MC_DQI_SKEW(0)
203 203
204#define S_MC_DQO_SKEW 40 204#define S_MC_DQO_SKEW 40
205#define M_MC_DQO_SKEW _SB_MAKEMASK(8,S_MC_DQO_SKEW) 205#define M_MC_DQO_SKEW _SB_MAKEMASK(8, S_MC_DQO_SKEW)
206#define V_MC_DQO_SKEW(x) _SB_MAKEVALUE(x,S_MC_DQO_SKEW) 206#define V_MC_DQO_SKEW(x) _SB_MAKEVALUE(x, S_MC_DQO_SKEW)
207#define G_MC_DQO_SKEW(x) _SB_GETVALUE(x,S_MC_DQO_SKEW,M_MC_DQO_SKEW) 207#define G_MC_DQO_SKEW(x) _SB_GETVALUE(x, S_MC_DQO_SKEW, M_MC_DQO_SKEW)
208#define V_MC_DQO_SKEW_DEFAULT V_MC_DQO_SKEW(0) 208#define V_MC_DQO_SKEW_DEFAULT V_MC_DQO_SKEW(0)
209 209
210#define S_MC_ADDR_SKEW 48 210#define S_MC_ADDR_SKEW 48
211#define M_MC_ADDR_SKEW _SB_MAKEMASK(8,S_MC_ADDR_SKEW) 211#define M_MC_ADDR_SKEW _SB_MAKEMASK(8, S_MC_ADDR_SKEW)
212#define V_MC_ADDR_SKEW(x) _SB_MAKEVALUE(x,S_MC_ADDR_SKEW) 212#define V_MC_ADDR_SKEW(x) _SB_MAKEVALUE(x, S_MC_ADDR_SKEW)
213#define G_MC_ADDR_SKEW(x) _SB_GETVALUE(x,S_MC_ADDR_SKEW,M_MC_ADDR_SKEW) 213#define G_MC_ADDR_SKEW(x) _SB_GETVALUE(x, S_MC_ADDR_SKEW, M_MC_ADDR_SKEW)
214#define V_MC_ADDR_SKEW_DEFAULT V_MC_ADDR_SKEW(0x0F) 214#define V_MC_ADDR_SKEW_DEFAULT V_MC_ADDR_SKEW(0x0F)
215 215
216#define S_MC_DLL_DEFAULT 56 216#define S_MC_DLL_DEFAULT 56
217#define M_MC_DLL_DEFAULT _SB_MAKEMASK(8,S_MC_DLL_DEFAULT) 217#define M_MC_DLL_DEFAULT _SB_MAKEMASK(8, S_MC_DLL_DEFAULT)
218#define V_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x,S_MC_DLL_DEFAULT) 218#define V_MC_DLL_DEFAULT(x) _SB_MAKEVALUE(x, S_MC_DLL_DEFAULT)
219#define G_MC_DLL_DEFAULT(x) _SB_GETVALUE(x,S_MC_DLL_DEFAULT,M_MC_DLL_DEFAULT) 219#define G_MC_DLL_DEFAULT(x) _SB_GETVALUE(x, S_MC_DLL_DEFAULT, M_MC_DLL_DEFAULT)
220#define V_MC_DLL_DEFAULT_DEFAULT V_MC_DLL_DEFAULT(0x10) 220#define V_MC_DLL_DEFAULT_DEFAULT V_MC_DLL_DEFAULT(0x10)
221 221
222#define V_MC_CLKCONFIG_DEFAULT V_MC_DLL_DEFAULT_DEFAULT | \ 222#define V_MC_CLKCONFIG_DEFAULT V_MC_DLL_DEFAULT_DEFAULT | \
@@ -235,9 +235,9 @@
235 */ 235 */
236 236
237#define S_MC_COMMAND 0 237#define S_MC_COMMAND 0
238#define M_MC_COMMAND _SB_MAKEMASK(4,S_MC_COMMAND) 238#define M_MC_COMMAND _SB_MAKEMASK(4, S_MC_COMMAND)
239#define V_MC_COMMAND(x) _SB_MAKEVALUE(x,S_MC_COMMAND) 239#define V_MC_COMMAND(x) _SB_MAKEVALUE(x, S_MC_COMMAND)
240#define G_MC_COMMAND(x) _SB_GETVALUE(x,S_MC_COMMAND,M_MC_COMMAND) 240#define G_MC_COMMAND(x) _SB_GETVALUE(x, S_MC_COMMAND, M_MC_COMMAND)
241 241
242#define K_MC_COMMAND_EMRS 0 242#define K_MC_COMMAND_EMRS 0
243#define K_MC_COMMAND_MRS 1 243#define K_MC_COMMAND_MRS 1
@@ -267,21 +267,21 @@
267 */ 267 */
268 268
269#define S_MC_EMODE 0 269#define S_MC_EMODE 0
270#define M_MC_EMODE _SB_MAKEMASK(15,S_MC_EMODE) 270#define M_MC_EMODE _SB_MAKEMASK(15, S_MC_EMODE)
271#define V_MC_EMODE(x) _SB_MAKEVALUE(x,S_MC_EMODE) 271#define V_MC_EMODE(x) _SB_MAKEVALUE(x, S_MC_EMODE)
272#define G_MC_EMODE(x) _SB_GETVALUE(x,S_MC_EMODE,M_MC_EMODE) 272#define G_MC_EMODE(x) _SB_GETVALUE(x, S_MC_EMODE, M_MC_EMODE)
273#define V_MC_EMODE_DEFAULT V_MC_EMODE(0) 273#define V_MC_EMODE_DEFAULT V_MC_EMODE(0)
274 274
275#define S_MC_MODE 16 275#define S_MC_MODE 16
276#define M_MC_MODE _SB_MAKEMASK(15,S_MC_MODE) 276#define M_MC_MODE _SB_MAKEMASK(15, S_MC_MODE)
277#define V_MC_MODE(x) _SB_MAKEVALUE(x,S_MC_MODE) 277#define V_MC_MODE(x) _SB_MAKEVALUE(x, S_MC_MODE)
278#define G_MC_MODE(x) _SB_GETVALUE(x,S_MC_MODE,M_MC_MODE) 278#define G_MC_MODE(x) _SB_GETVALUE(x, S_MC_MODE, M_MC_MODE)
279#define V_MC_MODE_DEFAULT V_MC_MODE(0x22) 279#define V_MC_MODE_DEFAULT V_MC_MODE(0x22)
280 280
281#define S_MC_DRAM_TYPE 32 281#define S_MC_DRAM_TYPE 32
282#define M_MC_DRAM_TYPE _SB_MAKEMASK(3,S_MC_DRAM_TYPE) 282#define M_MC_DRAM_TYPE _SB_MAKEMASK(3, S_MC_DRAM_TYPE)
283#define V_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x,S_MC_DRAM_TYPE) 283#define V_MC_DRAM_TYPE(x) _SB_MAKEVALUE(x, S_MC_DRAM_TYPE)
284#define G_MC_DRAM_TYPE(x) _SB_GETVALUE(x,S_MC_DRAM_TYPE,M_MC_DRAM_TYPE) 284#define G_MC_DRAM_TYPE(x) _SB_GETVALUE(x, S_MC_DRAM_TYPE, M_MC_DRAM_TYPE)
285 285
286#define K_MC_DRAM_TYPE_JEDEC 0 286#define K_MC_DRAM_TYPE_JEDEC 0
287#define K_MC_DRAM_TYPE_FCRAM 1 287#define K_MC_DRAM_TYPE_FCRAM 1
@@ -309,16 +309,16 @@
309#define M_MC_r2rIDLE_TWOCYCLES _SB_MAKEMASK1(62) 309#define M_MC_r2rIDLE_TWOCYCLES _SB_MAKEMASK1(62)
310 310
311#define S_MC_tFIFO 56 311#define S_MC_tFIFO 56
312#define M_MC_tFIFO _SB_MAKEMASK(4,S_MC_tFIFO) 312#define M_MC_tFIFO _SB_MAKEMASK(4, S_MC_tFIFO)
313#define V_MC_tFIFO(x) _SB_MAKEVALUE(x,S_MC_tFIFO) 313#define V_MC_tFIFO(x) _SB_MAKEVALUE(x, S_MC_tFIFO)
314#define G_MC_tFIFO(x) _SB_GETVALUE(x,S_MC_tFIFO,M_MC_tFIFO) 314#define G_MC_tFIFO(x) _SB_GETVALUE(x, S_MC_tFIFO, M_MC_tFIFO)
315#define K_MC_tFIFO_DEFAULT 1 315#define K_MC_tFIFO_DEFAULT 1
316#define V_MC_tFIFO_DEFAULT V_MC_tFIFO(K_MC_tFIFO_DEFAULT) 316#define V_MC_tFIFO_DEFAULT V_MC_tFIFO(K_MC_tFIFO_DEFAULT)
317 317
318#define S_MC_tRFC 52 318#define S_MC_tRFC 52
319#define M_MC_tRFC _SB_MAKEMASK(4,S_MC_tRFC) 319#define M_MC_tRFC _SB_MAKEMASK(4, S_MC_tRFC)
320#define V_MC_tRFC(x) _SB_MAKEVALUE(x,S_MC_tRFC) 320#define V_MC_tRFC(x) _SB_MAKEVALUE(x, S_MC_tRFC)
321#define G_MC_tRFC(x) _SB_GETVALUE(x,S_MC_tRFC,M_MC_tRFC) 321#define G_MC_tRFC(x) _SB_GETVALUE(x, S_MC_tRFC, M_MC_tRFC)
322#define K_MC_tRFC_DEFAULT 12 322#define K_MC_tRFC_DEFAULT 12
323#define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT) 323#define V_MC_tRFC_DEFAULT V_MC_tRFC(K_MC_tRFC_DEFAULT)
324 324
@@ -327,44 +327,44 @@
327#endif 327#endif
328 328
329#define S_MC_tCwCr 40 329#define S_MC_tCwCr 40
330#define M_MC_tCwCr _SB_MAKEMASK(4,S_MC_tCwCr) 330#define M_MC_tCwCr _SB_MAKEMASK(4, S_MC_tCwCr)
331#define V_MC_tCwCr(x) _SB_MAKEVALUE(x,S_MC_tCwCr) 331#define V_MC_tCwCr(x) _SB_MAKEVALUE(x, S_MC_tCwCr)
332#define G_MC_tCwCr(x) _SB_GETVALUE(x,S_MC_tCwCr,M_MC_tCwCr) 332#define G_MC_tCwCr(x) _SB_GETVALUE(x, S_MC_tCwCr, M_MC_tCwCr)
333#define K_MC_tCwCr_DEFAULT 4 333#define K_MC_tCwCr_DEFAULT 4
334#define V_MC_tCwCr_DEFAULT V_MC_tCwCr(K_MC_tCwCr_DEFAULT) 334#define V_MC_tCwCr_DEFAULT V_MC_tCwCr(K_MC_tCwCr_DEFAULT)
335 335
336#define S_MC_tRCr 28 336#define S_MC_tRCr 28
337#define M_MC_tRCr _SB_MAKEMASK(4,S_MC_tRCr) 337#define M_MC_tRCr _SB_MAKEMASK(4, S_MC_tRCr)
338#define V_MC_tRCr(x) _SB_MAKEVALUE(x,S_MC_tRCr) 338#define V_MC_tRCr(x) _SB_MAKEVALUE(x, S_MC_tRCr)
339#define G_MC_tRCr(x) _SB_GETVALUE(x,S_MC_tRCr,M_MC_tRCr) 339#define G_MC_tRCr(x) _SB_GETVALUE(x, S_MC_tRCr, M_MC_tRCr)
340#define K_MC_tRCr_DEFAULT 9 340#define K_MC_tRCr_DEFAULT 9
341#define V_MC_tRCr_DEFAULT V_MC_tRCr(K_MC_tRCr_DEFAULT) 341#define V_MC_tRCr_DEFAULT V_MC_tRCr(K_MC_tRCr_DEFAULT)
342 342
343#define S_MC_tRCw 24 343#define S_MC_tRCw 24
344#define M_MC_tRCw _SB_MAKEMASK(4,S_MC_tRCw) 344#define M_MC_tRCw _SB_MAKEMASK(4, S_MC_tRCw)
345#define V_MC_tRCw(x) _SB_MAKEVALUE(x,S_MC_tRCw) 345#define V_MC_tRCw(x) _SB_MAKEVALUE(x, S_MC_tRCw)
346#define G_MC_tRCw(x) _SB_GETVALUE(x,S_MC_tRCw,M_MC_tRCw) 346#define G_MC_tRCw(x) _SB_GETVALUE(x, S_MC_tRCw, M_MC_tRCw)
347#define K_MC_tRCw_DEFAULT 10 347#define K_MC_tRCw_DEFAULT 10
348#define V_MC_tRCw_DEFAULT V_MC_tRCw(K_MC_tRCw_DEFAULT) 348#define V_MC_tRCw_DEFAULT V_MC_tRCw(K_MC_tRCw_DEFAULT)
349 349
350#define S_MC_tRRD 20 350#define S_MC_tRRD 20
351#define M_MC_tRRD _SB_MAKEMASK(4,S_MC_tRRD) 351#define M_MC_tRRD _SB_MAKEMASK(4, S_MC_tRRD)
352#define V_MC_tRRD(x) _SB_MAKEVALUE(x,S_MC_tRRD) 352#define V_MC_tRRD(x) _SB_MAKEVALUE(x, S_MC_tRRD)
353#define G_MC_tRRD(x) _SB_GETVALUE(x,S_MC_tRRD,M_MC_tRRD) 353#define G_MC_tRRD(x) _SB_GETVALUE(x, S_MC_tRRD, M_MC_tRRD)
354#define K_MC_tRRD_DEFAULT 2 354#define K_MC_tRRD_DEFAULT 2
355#define V_MC_tRRD_DEFAULT V_MC_tRRD(K_MC_tRRD_DEFAULT) 355#define V_MC_tRRD_DEFAULT V_MC_tRRD(K_MC_tRRD_DEFAULT)
356 356
357#define S_MC_tRP 16 357#define S_MC_tRP 16
358#define M_MC_tRP _SB_MAKEMASK(4,S_MC_tRP) 358#define M_MC_tRP _SB_MAKEMASK(4, S_MC_tRP)
359#define V_MC_tRP(x) _SB_MAKEVALUE(x,S_MC_tRP) 359#define V_MC_tRP(x) _SB_MAKEVALUE(x, S_MC_tRP)
360#define G_MC_tRP(x) _SB_GETVALUE(x,S_MC_tRP,M_MC_tRP) 360#define G_MC_tRP(x) _SB_GETVALUE(x, S_MC_tRP, M_MC_tRP)
361#define K_MC_tRP_DEFAULT 4 361#define K_MC_tRP_DEFAULT 4
362#define V_MC_tRP_DEFAULT V_MC_tRP(K_MC_tRP_DEFAULT) 362#define V_MC_tRP_DEFAULT V_MC_tRP(K_MC_tRP_DEFAULT)
363 363
364#define S_MC_tCwD 8 364#define S_MC_tCwD 8
365#define M_MC_tCwD _SB_MAKEMASK(4,S_MC_tCwD) 365#define M_MC_tCwD _SB_MAKEMASK(4, S_MC_tCwD)
366#define V_MC_tCwD(x) _SB_MAKEVALUE(x,S_MC_tCwD) 366#define V_MC_tCwD(x) _SB_MAKEVALUE(x, S_MC_tCwD)
367#define G_MC_tCwD(x) _SB_GETVALUE(x,S_MC_tCwD,M_MC_tCwD) 367#define G_MC_tCwD(x) _SB_GETVALUE(x, S_MC_tCwD, M_MC_tCwD)
368#define K_MC_tCwD_DEFAULT 1 368#define K_MC_tCwD_DEFAULT 1
369#define V_MC_tCwD_DEFAULT V_MC_tCwD(K_MC_tCwD_DEFAULT) 369#define V_MC_tCwD_DEFAULT V_MC_tCwD(K_MC_tCwD_DEFAULT)
370 370
@@ -372,16 +372,16 @@
372#define M_MC_tCrDh M_tCrDh 372#define M_MC_tCrDh M_tCrDh
373 373
374#define S_MC_tCrD 4 374#define S_MC_tCrD 4
375#define M_MC_tCrD _SB_MAKEMASK(3,S_MC_tCrD) 375#define M_MC_tCrD _SB_MAKEMASK(3, S_MC_tCrD)
376#define V_MC_tCrD(x) _SB_MAKEVALUE(x,S_MC_tCrD) 376#define V_MC_tCrD(x) _SB_MAKEVALUE(x, S_MC_tCrD)
377#define G_MC_tCrD(x) _SB_GETVALUE(x,S_MC_tCrD,M_MC_tCrD) 377#define G_MC_tCrD(x) _SB_GETVALUE(x, S_MC_tCrD, M_MC_tCrD)
378#define K_MC_tCrD_DEFAULT 2 378#define K_MC_tCrD_DEFAULT 2
379#define V_MC_tCrD_DEFAULT V_MC_tCrD(K_MC_tCrD_DEFAULT) 379#define V_MC_tCrD_DEFAULT V_MC_tCrD(K_MC_tCrD_DEFAULT)
380 380
381#define S_MC_tRCD 0 381#define S_MC_tRCD 0
382#define M_MC_tRCD _SB_MAKEMASK(4,S_MC_tRCD) 382#define M_MC_tRCD _SB_MAKEMASK(4, S_MC_tRCD)
383#define V_MC_tRCD(x) _SB_MAKEVALUE(x,S_MC_tRCD) 383#define V_MC_tRCD(x) _SB_MAKEVALUE(x, S_MC_tRCD)
384#define G_MC_tRCD(x) _SB_GETVALUE(x,S_MC_tRCD,M_MC_tRCD) 384#define G_MC_tRCD(x) _SB_GETVALUE(x, S_MC_tRCD, M_MC_tRCD)
385#define K_MC_tRCD_DEFAULT 3 385#define K_MC_tRCD_DEFAULT 3
386#define V_MC_tRCD_DEFAULT V_MC_tRCD(K_MC_tRCD_DEFAULT) 386#define V_MC_tRCD_DEFAULT V_MC_tRCD(K_MC_tRCD_DEFAULT)
387 387
@@ -409,76 +409,76 @@
409 */ 409 */
410 410
411#define S_MC_CS0_START 0 411#define S_MC_CS0_START 0
412#define M_MC_CS0_START _SB_MAKEMASK(16,S_MC_CS0_START) 412#define M_MC_CS0_START _SB_MAKEMASK(16, S_MC_CS0_START)
413#define V_MC_CS0_START(x) _SB_MAKEVALUE(x,S_MC_CS0_START) 413#define V_MC_CS0_START(x) _SB_MAKEVALUE(x, S_MC_CS0_START)
414#define G_MC_CS0_START(x) _SB_GETVALUE(x,S_MC_CS0_START,M_MC_CS0_START) 414#define G_MC_CS0_START(x) _SB_GETVALUE(x, S_MC_CS0_START, M_MC_CS0_START)
415 415
416#define S_MC_CS1_START 16 416#define S_MC_CS1_START 16
417#define M_MC_CS1_START _SB_MAKEMASK(16,S_MC_CS1_START) 417#define M_MC_CS1_START _SB_MAKEMASK(16, S_MC_CS1_START)
418#define V_MC_CS1_START(x) _SB_MAKEVALUE(x,S_MC_CS1_START) 418#define V_MC_CS1_START(x) _SB_MAKEVALUE(x, S_MC_CS1_START)
419#define G_MC_CS1_START(x) _SB_GETVALUE(x,S_MC_CS1_START,M_MC_CS1_START) 419#define G_MC_CS1_START(x) _SB_GETVALUE(x, S_MC_CS1_START, M_MC_CS1_START)
420 420
421#define S_MC_CS2_START 32 421#define S_MC_CS2_START 32
422#define M_MC_CS2_START _SB_MAKEMASK(16,S_MC_CS2_START) 422#define M_MC_CS2_START _SB_MAKEMASK(16, S_MC_CS2_START)
423#define V_MC_CS2_START(x) _SB_MAKEVALUE(x,S_MC_CS2_START) 423#define V_MC_CS2_START(x) _SB_MAKEVALUE(x, S_MC_CS2_START)
424#define G_MC_CS2_START(x) _SB_GETVALUE(x,S_MC_CS2_START,M_MC_CS2_START) 424#define G_MC_CS2_START(x) _SB_GETVALUE(x, S_MC_CS2_START, M_MC_CS2_START)
425 425
426#define S_MC_CS3_START 48 426#define S_MC_CS3_START 48
427#define M_MC_CS3_START _SB_MAKEMASK(16,S_MC_CS3_START) 427#define M_MC_CS3_START _SB_MAKEMASK(16, S_MC_CS3_START)
428#define V_MC_CS3_START(x) _SB_MAKEVALUE(x,S_MC_CS3_START) 428#define V_MC_CS3_START(x) _SB_MAKEVALUE(x, S_MC_CS3_START)
429#define G_MC_CS3_START(x) _SB_GETVALUE(x,S_MC_CS3_START,M_MC_CS3_START) 429#define G_MC_CS3_START(x) _SB_GETVALUE(x, S_MC_CS3_START, M_MC_CS3_START)
430 430
431/* 431/*
432 * Chip Select End Address Register (Table 6-18) 432 * Chip Select End Address Register (Table 6-18)
433 */ 433 */
434 434
435#define S_MC_CS0_END 0 435#define S_MC_CS0_END 0
436#define M_MC_CS0_END _SB_MAKEMASK(16,S_MC_CS0_END) 436#define M_MC_CS0_END _SB_MAKEMASK(16, S_MC_CS0_END)
437#define V_MC_CS0_END(x) _SB_MAKEVALUE(x,S_MC_CS0_END) 437#define V_MC_CS0_END(x) _SB_MAKEVALUE(x, S_MC_CS0_END)
438#define G_MC_CS0_END(x) _SB_GETVALUE(x,S_MC_CS0_END,M_MC_CS0_END) 438#define G_MC_CS0_END(x) _SB_GETVALUE(x, S_MC_CS0_END, M_MC_CS0_END)
439 439
440#define S_MC_CS1_END 16 440#define S_MC_CS1_END 16
441#define M_MC_CS1_END _SB_MAKEMASK(16,S_MC_CS1_END) 441#define M_MC_CS1_END _SB_MAKEMASK(16, S_MC_CS1_END)
442#define V_MC_CS1_END(x) _SB_MAKEVALUE(x,S_MC_CS1_END) 442#define V_MC_CS1_END(x) _SB_MAKEVALUE(x, S_MC_CS1_END)
443#define G_MC_CS1_END(x) _SB_GETVALUE(x,S_MC_CS1_END,M_MC_CS1_END) 443#define G_MC_CS1_END(x) _SB_GETVALUE(x, S_MC_CS1_END, M_MC_CS1_END)
444 444
445#define S_MC_CS2_END 32 445#define S_MC_CS2_END 32
446#define M_MC_CS2_END _SB_MAKEMASK(16,S_MC_CS2_END) 446#define M_MC_CS2_END _SB_MAKEMASK(16, S_MC_CS2_END)
447#define V_MC_CS2_END(x) _SB_MAKEVALUE(x,S_MC_CS2_END) 447#define V_MC_CS2_END(x) _SB_MAKEVALUE(x, S_MC_CS2_END)
448#define G_MC_CS2_END(x) _SB_GETVALUE(x,S_MC_CS2_END,M_MC_CS2_END) 448#define G_MC_CS2_END(x) _SB_GETVALUE(x, S_MC_CS2_END, M_MC_CS2_END)
449 449
450#define S_MC_CS3_END 48 450#define S_MC_CS3_END 48
451#define M_MC_CS3_END _SB_MAKEMASK(16,S_MC_CS3_END) 451#define M_MC_CS3_END _SB_MAKEMASK(16, S_MC_CS3_END)
452#define V_MC_CS3_END(x) _SB_MAKEVALUE(x,S_MC_CS3_END) 452#define V_MC_CS3_END(x) _SB_MAKEVALUE(x, S_MC_CS3_END)
453#define G_MC_CS3_END(x) _SB_GETVALUE(x,S_MC_CS3_END,M_MC_CS3_END) 453#define G_MC_CS3_END(x) _SB_GETVALUE(x, S_MC_CS3_END, M_MC_CS3_END)
454 454
455/* 455/*
456 * Chip Select Interleave Register (Table 6-19) 456 * Chip Select Interleave Register (Table 6-19)
457 */ 457 */
458 458
459#define S_MC_INTLV_RESERVED 0 459#define S_MC_INTLV_RESERVED 0
460#define M_MC_INTLV_RESERVED _SB_MAKEMASK(5,S_MC_INTLV_RESERVED) 460#define M_MC_INTLV_RESERVED _SB_MAKEMASK(5, S_MC_INTLV_RESERVED)
461 461
462#define S_MC_INTERLEAVE 7 462#define S_MC_INTERLEAVE 7
463#define M_MC_INTERLEAVE _SB_MAKEMASK(18,S_MC_INTERLEAVE) 463#define M_MC_INTERLEAVE _SB_MAKEMASK(18, S_MC_INTERLEAVE)
464#define V_MC_INTERLEAVE(x) _SB_MAKEVALUE(x,S_MC_INTERLEAVE) 464#define V_MC_INTERLEAVE(x) _SB_MAKEVALUE(x, S_MC_INTERLEAVE)
465 465
466#define S_MC_INTLV_MBZ 25 466#define S_MC_INTLV_MBZ 25
467#define M_MC_INTLV_MBZ _SB_MAKEMASK(39,S_MC_INTLV_MBZ) 467#define M_MC_INTLV_MBZ _SB_MAKEMASK(39, S_MC_INTLV_MBZ)
468 468
469/* 469/*
470 * Row Address Bits Register (Table 6-20) 470 * Row Address Bits Register (Table 6-20)
471 */ 471 */
472 472
473#define S_MC_RAS_RESERVED 0 473#define S_MC_RAS_RESERVED 0
474#define M_MC_RAS_RESERVED _SB_MAKEMASK(5,S_MC_RAS_RESERVED) 474#define M_MC_RAS_RESERVED _SB_MAKEMASK(5, S_MC_RAS_RESERVED)
475 475
476#define S_MC_RAS_SELECT 12 476#define S_MC_RAS_SELECT 12
477#define M_MC_RAS_SELECT _SB_MAKEMASK(25,S_MC_RAS_SELECT) 477#define M_MC_RAS_SELECT _SB_MAKEMASK(25, S_MC_RAS_SELECT)
478#define V_MC_RAS_SELECT(x) _SB_MAKEVALUE(x,S_MC_RAS_SELECT) 478#define V_MC_RAS_SELECT(x) _SB_MAKEVALUE(x, S_MC_RAS_SELECT)
479 479
480#define S_MC_RAS_MBZ 37 480#define S_MC_RAS_MBZ 37
481#define M_MC_RAS_MBZ _SB_MAKEMASK(27,S_MC_RAS_MBZ) 481#define M_MC_RAS_MBZ _SB_MAKEMASK(27, S_MC_RAS_MBZ)
482 482
483 483
484/* 484/*
@@ -486,14 +486,14 @@
486 */ 486 */
487 487
488#define S_MC_CAS_RESERVED 0 488#define S_MC_CAS_RESERVED 0
489#define M_MC_CAS_RESERVED _SB_MAKEMASK(5,S_MC_CAS_RESERVED) 489#define M_MC_CAS_RESERVED _SB_MAKEMASK(5, S_MC_CAS_RESERVED)
490 490
491#define S_MC_CAS_SELECT 5 491#define S_MC_CAS_SELECT 5
492#define M_MC_CAS_SELECT _SB_MAKEMASK(18,S_MC_CAS_SELECT) 492#define M_MC_CAS_SELECT _SB_MAKEMASK(18, S_MC_CAS_SELECT)
493#define V_MC_CAS_SELECT(x) _SB_MAKEVALUE(x,S_MC_CAS_SELECT) 493#define V_MC_CAS_SELECT(x) _SB_MAKEVALUE(x, S_MC_CAS_SELECT)
494 494
495#define S_MC_CAS_MBZ 23 495#define S_MC_CAS_MBZ 23
496#define M_MC_CAS_MBZ _SB_MAKEMASK(41,S_MC_CAS_MBZ) 496#define M_MC_CAS_MBZ _SB_MAKEMASK(41, S_MC_CAS_MBZ)
497 497
498 498
499/* 499/*
@@ -501,14 +501,14 @@
501 */ 501 */
502 502
503#define S_MC_BA_RESERVED 0 503#define S_MC_BA_RESERVED 0
504#define M_MC_BA_RESERVED _SB_MAKEMASK(5,S_MC_BA_RESERVED) 504#define M_MC_BA_RESERVED _SB_MAKEMASK(5, S_MC_BA_RESERVED)
505 505
506#define S_MC_BA_SELECT 5 506#define S_MC_BA_SELECT 5
507#define M_MC_BA_SELECT _SB_MAKEMASK(20,S_MC_BA_SELECT) 507#define M_MC_BA_SELECT _SB_MAKEMASK(20, S_MC_BA_SELECT)
508#define V_MC_BA_SELECT(x) _SB_MAKEVALUE(x,S_MC_BA_SELECT) 508#define V_MC_BA_SELECT(x) _SB_MAKEVALUE(x, S_MC_BA_SELECT)
509 509
510#define S_MC_BA_MBZ 25 510#define S_MC_BA_MBZ 25
511#define M_MC_BA_MBZ _SB_MAKEMASK(39,S_MC_BA_MBZ) 511#define M_MC_BA_MBZ _SB_MAKEMASK(39, S_MC_BA_MBZ)
512 512
513/* 513/*
514 * Chip Select Attribute Register (Table 6-23) 514 * Chip Select Attribute Register (Table 6-23)
@@ -520,31 +520,31 @@
520#define K_MC_CS_ATTR_OPEN 3 520#define K_MC_CS_ATTR_OPEN 3
521 521
522#define S_MC_CS0_PAGE 0 522#define S_MC_CS0_PAGE 0
523#define M_MC_CS0_PAGE _SB_MAKEMASK(2,S_MC_CS0_PAGE) 523#define M_MC_CS0_PAGE _SB_MAKEMASK(2, S_MC_CS0_PAGE)
524#define V_MC_CS0_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS0_PAGE) 524#define V_MC_CS0_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS0_PAGE)
525#define G_MC_CS0_PAGE(x) _SB_GETVALUE(x,S_MC_CS0_PAGE,M_MC_CS0_PAGE) 525#define G_MC_CS0_PAGE(x) _SB_GETVALUE(x, S_MC_CS0_PAGE, M_MC_CS0_PAGE)
526 526
527#define S_MC_CS1_PAGE 16 527#define S_MC_CS1_PAGE 16
528#define M_MC_CS1_PAGE _SB_MAKEMASK(2,S_MC_CS1_PAGE) 528#define M_MC_CS1_PAGE _SB_MAKEMASK(2, S_MC_CS1_PAGE)
529#define V_MC_CS1_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS1_PAGE) 529#define V_MC_CS1_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS1_PAGE)
530#define G_MC_CS1_PAGE(x) _SB_GETVALUE(x,S_MC_CS1_PAGE,M_MC_CS1_PAGE) 530#define G_MC_CS1_PAGE(x) _SB_GETVALUE(x, S_MC_CS1_PAGE, M_MC_CS1_PAGE)
531 531
532#define S_MC_CS2_PAGE 32 532#define S_MC_CS2_PAGE 32
533#define M_MC_CS2_PAGE _SB_MAKEMASK(2,S_MC_CS2_PAGE) 533#define M_MC_CS2_PAGE _SB_MAKEMASK(2, S_MC_CS2_PAGE)
534#define V_MC_CS2_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS2_PAGE) 534#define V_MC_CS2_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS2_PAGE)
535#define G_MC_CS2_PAGE(x) _SB_GETVALUE(x,S_MC_CS2_PAGE,M_MC_CS2_PAGE) 535#define G_MC_CS2_PAGE(x) _SB_GETVALUE(x, S_MC_CS2_PAGE, M_MC_CS2_PAGE)
536 536
537#define S_MC_CS3_PAGE 48 537#define S_MC_CS3_PAGE 48
538#define M_MC_CS3_PAGE _SB_MAKEMASK(2,S_MC_CS3_PAGE) 538#define M_MC_CS3_PAGE _SB_MAKEMASK(2, S_MC_CS3_PAGE)
539#define V_MC_CS3_PAGE(x) _SB_MAKEVALUE(x,S_MC_CS3_PAGE) 539#define V_MC_CS3_PAGE(x) _SB_MAKEVALUE(x, S_MC_CS3_PAGE)
540#define G_MC_CS3_PAGE(x) _SB_GETVALUE(x,S_MC_CS3_PAGE,M_MC_CS3_PAGE) 540#define G_MC_CS3_PAGE(x) _SB_GETVALUE(x, S_MC_CS3_PAGE, M_MC_CS3_PAGE)
541 541
542/* 542/*
543 * ECC Test ECC Register (Table 6-25) 543 * ECC Test ECC Register (Table 6-25)
544 */ 544 */
545 545
546#define S_MC_ECC_INVERT 0 546#define S_MC_ECC_INVERT 0
547#define M_MC_ECC_INVERT _SB_MAKEMASK(8,S_MC_ECC_INVERT) 547#define M_MC_ECC_INVERT _SB_MAKEMASK(8, S_MC_ECC_INVERT)
548 548
549 549
550#endif 550#endif
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index 220b7e94f1bf..8f53ec817a5e 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -66,7 +66,7 @@
66#define MC_REGISTER_SPACING 0x1000 66#define MC_REGISTER_SPACING 0x1000
67 67
68#define A_MC_BASE(ctlid) ((ctlid)*MC_REGISTER_SPACING+A_MC_BASE_0) 68#define A_MC_BASE(ctlid) ((ctlid)*MC_REGISTER_SPACING+A_MC_BASE_0)
69#define A_MC_REGISTER(ctlid,reg) (A_MC_BASE(ctlid)+(reg)) 69#define A_MC_REGISTER(ctlid, reg) (A_MC_BASE(ctlid)+(reg))
70 70
71#define R_MC_CONFIG 0x0000000100 71#define R_MC_CONFIG 0x0000000100
72#define R_MC_DRAMCMD 0x0000000120 72#define R_MC_DRAMCMD 0x0000000120
@@ -173,23 +173,23 @@
173 173
174#define R_MAC_DMA_CHANNELS 0x800 /* Relative to A_MAC_CHANNEL_BASE */ 174#define R_MAC_DMA_CHANNELS 0x800 /* Relative to A_MAC_CHANNEL_BASE */
175 175
176#define A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan) \ 176#define A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) \
177 ((A_MAC_CHANNEL_BASE(macnum)) + \ 177 ((A_MAC_CHANNEL_BASE(macnum)) + \
178 R_MAC_DMA_CHANNELS + \ 178 R_MAC_DMA_CHANNELS + \
179 (MAC_DMA_TXRX_SPACING*(txrx)) + \ 179 (MAC_DMA_TXRX_SPACING*(txrx)) + \
180 (MAC_DMA_CHANNEL_SPACING*(chan))) 180 (MAC_DMA_CHANNEL_SPACING*(chan)))
181 181
182#define R_MAC_DMA_CHANNEL_BASE(txrx,chan) \ 182#define R_MAC_DMA_CHANNEL_BASE(txrx, chan) \
183 (R_MAC_DMA_CHANNELS + \ 183 (R_MAC_DMA_CHANNELS + \
184 (MAC_DMA_TXRX_SPACING*(txrx)) + \ 184 (MAC_DMA_TXRX_SPACING*(txrx)) + \
185 (MAC_DMA_CHANNEL_SPACING*(chan))) 185 (MAC_DMA_CHANNEL_SPACING*(chan)))
186 186
187#define A_MAC_DMA_REGISTER(macnum,txrx,chan,reg) \ 187#define A_MAC_DMA_REGISTER(macnum, txrx, chan, reg) \
188 (A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan) + \ 188 (A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) + \
189 (reg)) 189 (reg))
190 190
191#define R_MAC_DMA_REGISTER(txrx,chan,reg) \ 191#define R_MAC_DMA_REGISTER(txrx, chan, reg) \
192 (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \ 192 (R_MAC_DMA_CHANNEL_BASE(txrx, chan) + \
193 (reg)) 193 (reg))
194 194
195/* 195/*
@@ -415,8 +415,8 @@
415 R_SER_DMA_CHANNELS + \ 415 R_SER_DMA_CHANNELS + \
416 (SER_DMA_TXRX_SPACING*(txrx))) 416 (SER_DMA_TXRX_SPACING*(txrx)))
417 417
418#define A_SER_DMA_REGISTER(sernum,txrx,reg) \ 418#define A_SER_DMA_REGISTER(sernum, txrx, reg) \
419 (A_SER_DMA_CHANNEL_BASE(sernum,txrx) + \ 419 (A_SER_DMA_CHANNEL_BASE(sernum, txrx) + \
420 (reg)) 420 (reg))
421 421
422 422
@@ -499,7 +499,7 @@
499 499
500#define IO_EXT_REGISTER_SPACING 8 500#define IO_EXT_REGISTER_SPACING 8
501#define A_IO_EXT_CS_BASE(cs) (A_IO_EXT_CFG_BASE+IO_EXT_REGISTER_SPACING*(cs)) 501#define A_IO_EXT_CS_BASE(cs) (A_IO_EXT_CFG_BASE+IO_EXT_REGISTER_SPACING*(cs))
502#define R_IO_EXT_REG(reg,cs) ((cs)*IO_EXT_REGISTER_SPACING + (reg)) 502#define R_IO_EXT_REG(reg, cs) ((cs)*IO_EXT_REGISTER_SPACING + (reg))
503 503
504#define R_IO_EXT_CFG 0x0000 504#define R_IO_EXT_CFG 0x0000
505#define R_IO_EXT_MULT_SIZE 0x0100 505#define R_IO_EXT_MULT_SIZE 0x0100
@@ -587,7 +587,7 @@
587#define A_SMB_1 0x0010060008 587#define A_SMB_1 0x0010060008
588#define SMB_REGISTER_SPACING 0x8 588#define SMB_REGISTER_SPACING 0x8
589#define A_SMB_BASE(idx) (A_SMB_0+(idx)*SMB_REGISTER_SPACING) 589#define A_SMB_BASE(idx) (A_SMB_0+(idx)*SMB_REGISTER_SPACING)
590#define A_SMB_REGISTER(idx,reg) (A_SMB_BASE(idx)+(reg)) 590#define A_SMB_REGISTER(idx, reg) (A_SMB_BASE(idx)+(reg))
591 591
592#define R_SMB_XTRA 0x0000000000 592#define R_SMB_XTRA 0x0000000000
593#define R_SMB_FREQ 0x0000000010 593#define R_SMB_FREQ 0x0000000010
@@ -611,7 +611,7 @@
611#define SCD_WDOG_SPACING 0x100 611#define SCD_WDOG_SPACING 0x100
612#define SCD_NUM_WDOGS 2 612#define SCD_NUM_WDOGS 2
613#define A_SCD_WDOG_BASE(w) (A_SCD_WDOG_0+SCD_WDOG_SPACING*(w)) 613#define A_SCD_WDOG_BASE(w) (A_SCD_WDOG_0+SCD_WDOG_SPACING*(w))
614#define A_SCD_WDOG_REGISTER(w,r) (A_SCD_WDOG_BASE(w) + (r)) 614#define A_SCD_WDOG_REGISTER(w, r) (A_SCD_WDOG_BASE(w) + (r))
615 615
616#define R_SCD_WDOG_INIT 0x0000000000 616#define R_SCD_WDOG_INIT 0x0000000000
617#define R_SCD_WDOG_CNT 0x0000000008 617#define R_SCD_WDOG_CNT 0x0000000008
@@ -635,7 +635,7 @@
635#define A_SCD_TIMER_3 0x0010020178 635#define A_SCD_TIMER_3 0x0010020178
636#define SCD_NUM_TIMERS 4 636#define SCD_NUM_TIMERS 4
637#define A_SCD_TIMER_BASE(w) (A_SCD_TIMER_0+0x08*((w)&1)+0x100*(((w)&2)>>1)) 637#define A_SCD_TIMER_BASE(w) (A_SCD_TIMER_0+0x08*((w)&1)+0x100*(((w)&2)>>1))
638#define A_SCD_TIMER_REGISTER(w,r) (A_SCD_TIMER_BASE(w) + (r)) 638#define A_SCD_TIMER_REGISTER(w, r) (A_SCD_TIMER_BASE(w) + (r))
639 639
640#define R_SCD_TIMER_INIT 0x0000000000 640#define R_SCD_TIMER_INIT 0x0000000000
641#define R_SCD_TIMER_CNT 0x0000000010 641#define R_SCD_TIMER_CNT 0x0000000010
@@ -714,7 +714,7 @@
714#define IMR_REGISTER_SPACING_SHIFT 13 714#define IMR_REGISTER_SPACING_SHIFT 13
715 715
716#define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING) 716#define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE+(cpu)*IMR_REGISTER_SPACING)
717#define A_IMR_REGISTER(cpu,reg) (A_IMR_MAPPER(cpu)+(reg)) 717#define A_IMR_REGISTER(cpu, reg) (A_IMR_MAPPER(cpu)+(reg))
718 718
719#define R_IMR_INTERRUPT_DIAG 0x0010 719#define R_IMR_INTERRUPT_DIAG 0x0010
720#define R_IMR_INTERRUPT_LDT 0x0018 720#define R_IMR_INTERRUPT_LDT 0x0018
@@ -821,7 +821,7 @@
821#define DM_REGISTER_SPACING 0x20 821#define DM_REGISTER_SPACING 0x20
822#define DM_NUM_CHANNELS 4 822#define DM_NUM_CHANNELS 4
823#define A_DM_BASE(idx) (A_DM_0 + ((idx) * DM_REGISTER_SPACING)) 823#define A_DM_BASE(idx) (A_DM_0 + ((idx) * DM_REGISTER_SPACING))
824#define A_DM_REGISTER(idx,reg) (A_DM_BASE(idx) + (reg)) 824#define A_DM_REGISTER(idx, reg) (A_DM_BASE(idx) + (reg))
825 825
826#define R_DM_DSCR_BASE 0x0000000000 826#define R_DM_DSCR_BASE 0x0000000000
827#define R_DM_DSCR_COUNT 0x0000000008 827#define R_DM_DSCR_COUNT 0x0000000008
@@ -843,7 +843,7 @@
843#define DM_CRC_REGISTER_SPACING 0x10 843#define DM_CRC_REGISTER_SPACING 0x10
844#define DM_CRC_NUM_CHANNELS 2 844#define DM_CRC_NUM_CHANNELS 2
845#define A_DM_CRC_BASE(idx) (A_DM_CRC_0 + ((idx) * DM_CRC_REGISTER_SPACING)) 845#define A_DM_CRC_BASE(idx) (A_DM_CRC_0 + ((idx) * DM_CRC_REGISTER_SPACING))
846#define A_DM_CRC_REGISTER(idx,reg) (A_DM_CRC_BASE(idx) + (reg)) 846#define A_DM_CRC_REGISTER(idx, reg) (A_DM_CRC_BASE(idx) + (reg))
847 847
848#define R_CRC_DEF_0 0x00 848#define R_CRC_DEF_0 0x00
849#define R_CTCP_DEF_0 0x08 849#define R_CTCP_DEF_0 0x08
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index 9ea3da367ab6..e49c3e89b5ee 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -42,12 +42,12 @@
42 * System Revision Register (Table 4-1) 42 * System Revision Register (Table 4-1)
43 */ 43 */
44 44
45#define M_SYS_RESERVED _SB_MAKEMASK(8,0) 45#define M_SYS_RESERVED _SB_MAKEMASK(8, 0)
46 46
47#define S_SYS_REVISION _SB_MAKE64(8) 47#define S_SYS_REVISION _SB_MAKE64(8)
48#define M_SYS_REVISION _SB_MAKEMASK(8,S_SYS_REVISION) 48#define M_SYS_REVISION _SB_MAKEMASK(8, S_SYS_REVISION)
49#define V_SYS_REVISION(x) _SB_MAKEVALUE(x,S_SYS_REVISION) 49#define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION)
50#define G_SYS_REVISION(x) _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION) 50#define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION)
51 51
52#define K_SYS_REVISION_BCM1250_PASS1 0x01 52#define K_SYS_REVISION_BCM1250_PASS1 0x01
53 53
@@ -94,9 +94,9 @@
94 94
95/*Cache size - 23:20 of revision register*/ 95/*Cache size - 23:20 of revision register*/
96#define S_SYS_L2C_SIZE _SB_MAKE64(20) 96#define S_SYS_L2C_SIZE _SB_MAKE64(20)
97#define M_SYS_L2C_SIZE _SB_MAKEMASK(4,S_SYS_L2C_SIZE) 97#define M_SYS_L2C_SIZE _SB_MAKEMASK(4, S_SYS_L2C_SIZE)
98#define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x,S_SYS_L2C_SIZE) 98#define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE)
99#define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x,S_SYS_L2C_SIZE,M_SYS_L2C_SIZE) 99#define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE)
100 100
101#define K_SYS_L2C_SIZE_1MB 0 101#define K_SYS_L2C_SIZE_1MB 0
102#define K_SYS_L2C_SIZE_512KB 5 102#define K_SYS_L2C_SIZE_512KB 5
@@ -110,16 +110,16 @@
110 110
111/* Number of CPU cores, bits 27:24 of revision register*/ 111/* Number of CPU cores, bits 27:24 of revision register*/
112#define S_SYS_NUM_CPUS _SB_MAKE64(24) 112#define S_SYS_NUM_CPUS _SB_MAKE64(24)
113#define M_SYS_NUM_CPUS _SB_MAKEMASK(4,S_SYS_NUM_CPUS) 113#define M_SYS_NUM_CPUS _SB_MAKEMASK(4, S_SYS_NUM_CPUS)
114#define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x,S_SYS_NUM_CPUS) 114#define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS)
115#define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x,S_SYS_NUM_CPUS,M_SYS_NUM_CPUS) 115#define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS)
116 116
117 117
118/* XXX: discourage people from using these constants. */ 118/* XXX: discourage people from using these constants. */
119#define S_SYS_PART _SB_MAKE64(16) 119#define S_SYS_PART _SB_MAKE64(16)
120#define M_SYS_PART _SB_MAKEMASK(16,S_SYS_PART) 120#define M_SYS_PART _SB_MAKEMASK(16, S_SYS_PART)
121#define V_SYS_PART(x) _SB_MAKEVALUE(x,S_SYS_PART) 121#define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART)
122#define G_SYS_PART(x) _SB_GETVALUE(x,S_SYS_PART,M_SYS_PART) 122#define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART)
123 123
124/* XXX: discourage people from using these constants. */ 124/* XXX: discourage people from using these constants. */
125#define K_SYS_PART_SB1250 0x1250 125#define K_SYS_PART_SB1250 0x1250
@@ -131,9 +131,9 @@
131 131
132/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */ 132/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field. */
133#define S_SYS_SOC_TYPE _SB_MAKE64(16) 133#define S_SYS_SOC_TYPE _SB_MAKE64(16)
134#define M_SYS_SOC_TYPE _SB_MAKEMASK(4,S_SYS_SOC_TYPE) 134#define M_SYS_SOC_TYPE _SB_MAKEMASK(4, S_SYS_SOC_TYPE)
135#define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x,S_SYS_SOC_TYPE) 135#define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE)
136#define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x,S_SYS_SOC_TYPE,M_SYS_SOC_TYPE) 136#define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE)
137 137
138#define K_SYS_SOC_TYPE_BCM1250 0x0 138#define K_SYS_SOC_TYPE_BCM1250 0x0
139#define K_SYS_SOC_TYPE_BCM1120 0x1 139#define K_SYS_SOC_TYPE_BCM1120 0x1
@@ -170,9 +170,9 @@
170#endif 170#endif
171 171
172#define S_SYS_WID _SB_MAKE64(32) 172#define S_SYS_WID _SB_MAKE64(32)
173#define M_SYS_WID _SB_MAKEMASK(32,S_SYS_WID) 173#define M_SYS_WID _SB_MAKEMASK(32, S_SYS_WID)
174#define V_SYS_WID(x) _SB_MAKEVALUE(x,S_SYS_WID) 174#define V_SYS_WID(x) _SB_MAKEVALUE(x, S_SYS_WID)
175#define G_SYS_WID(x) _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID) 175#define G_SYS_WID(x) _SB_GETVALUE(x, S_SYS_WID, M_SYS_WID)
176 176
177/* 177/*
178 * System Manufacturing Register 178 * System Manufacturing Register
@@ -182,36 +182,36 @@
182#if SIBYTE_HDR_FEATURE_1250_112x 182#if SIBYTE_HDR_FEATURE_1250_112x
183/* Wafer ID: bits 31:0 */ 183/* Wafer ID: bits 31:0 */
184#define S_SYS_WAFERID1_200 _SB_MAKE64(0) 184#define S_SYS_WAFERID1_200 _SB_MAKE64(0)
185#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) 185#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32, S_SYS_WAFERID1_200)
186#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200) 186#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID1_200)
187#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200) 187#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x, S_SYS_WAFERID1_200, M_SYS_WAFERID1_200)
188 188
189#define S_SYS_BIN _SB_MAKE64(32) 189#define S_SYS_BIN _SB_MAKE64(32)
190#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) 190#define M_SYS_BIN _SB_MAKEMASK(4, S_SYS_BIN)
191#define V_SYS_BIN(x) _SB_MAKEVALUE(x,S_SYS_BIN) 191#define V_SYS_BIN(x) _SB_MAKEVALUE(x, S_SYS_BIN)
192#define G_SYS_BIN(x) _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) 192#define G_SYS_BIN(x) _SB_GETVALUE(x, S_SYS_BIN, M_SYS_BIN)
193 193
194/* Wafer ID: bits 39:36 */ 194/* Wafer ID: bits 39:36 */
195#define S_SYS_WAFERID2_200 _SB_MAKE64(36) 195#define S_SYS_WAFERID2_200 _SB_MAKE64(36)
196#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200) 196#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4, S_SYS_WAFERID2_200)
197#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200) 197#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID2_200)
198#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200) 198#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x, S_SYS_WAFERID2_200, M_SYS_WAFERID2_200)
199 199
200/* Wafer ID: bits 39:0 */ 200/* Wafer ID: bits 39:0 */
201#define S_SYS_WAFERID_300 _SB_MAKE64(0) 201#define S_SYS_WAFERID_300 _SB_MAKE64(0)
202#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300) 202#define M_SYS_WAFERID_300 _SB_MAKEMASK(40, S_SYS_WAFERID_300)
203#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300) 203#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x, S_SYS_WAFERID_300)
204#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300) 204#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x, S_SYS_WAFERID_300, M_SYS_WAFERID_300)
205 205
206#define S_SYS_XPOS _SB_MAKE64(40) 206#define S_SYS_XPOS _SB_MAKE64(40)
207#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS) 207#define M_SYS_XPOS _SB_MAKEMASK(6, S_SYS_XPOS)
208#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS) 208#define V_SYS_XPOS(x) _SB_MAKEVALUE(x, S_SYS_XPOS)
209#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS) 209#define G_SYS_XPOS(x) _SB_GETVALUE(x, S_SYS_XPOS, M_SYS_XPOS)
210 210
211#define S_SYS_YPOS _SB_MAKE64(46) 211#define S_SYS_YPOS _SB_MAKE64(46)
212#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) 212#define M_SYS_YPOS _SB_MAKEMASK(6, S_SYS_YPOS)
213#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) 213#define V_SYS_YPOS(x) _SB_MAKEVALUE(x, S_SYS_YPOS)
214#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) 214#define G_SYS_YPOS(x) _SB_GETVALUE(x, S_SYS_YPOS, M_SYS_YPOS)
215#endif 215#endif
216 216
217 217
@@ -227,9 +227,9 @@
227#define M_SYS_IOB1_DIV _SB_MAKEMASK1(6) 227#define M_SYS_IOB1_DIV _SB_MAKEMASK1(6)
228 228
229#define S_SYS_PLL_DIV _SB_MAKE64(7) 229#define S_SYS_PLL_DIV _SB_MAKE64(7)
230#define M_SYS_PLL_DIV _SB_MAKEMASK(5,S_SYS_PLL_DIV) 230#define M_SYS_PLL_DIV _SB_MAKEMASK(5, S_SYS_PLL_DIV)
231#define V_SYS_PLL_DIV(x) _SB_MAKEVALUE(x,S_SYS_PLL_DIV) 231#define V_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_SYS_PLL_DIV)
232#define G_SYS_PLL_DIV(x) _SB_GETVALUE(x,S_SYS_PLL_DIV,M_SYS_PLL_DIV) 232#define G_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_SYS_PLL_DIV, M_SYS_PLL_DIV)
233 233
234#define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12) 234#define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12)
235#define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13) 235#define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13)
@@ -238,9 +238,9 @@
238#define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) 238#define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16)
239 239
240#define S_SYS_BOOT_MODE _SB_MAKE64(17) 240#define S_SYS_BOOT_MODE _SB_MAKE64(17)
241#define M_SYS_BOOT_MODE _SB_MAKEMASK(2,S_SYS_BOOT_MODE) 241#define M_SYS_BOOT_MODE _SB_MAKEMASK(2, S_SYS_BOOT_MODE)
242#define V_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x,S_SYS_BOOT_MODE) 242#define V_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_SYS_BOOT_MODE)
243#define G_SYS_BOOT_MODE(x) _SB_GETVALUE(x,S_SYS_BOOT_MODE,M_SYS_BOOT_MODE) 243#define G_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_SYS_BOOT_MODE, M_SYS_BOOT_MODE)
244#define K_SYS_BOOT_MODE_ROM32 0 244#define K_SYS_BOOT_MODE_ROM32 0
245#define K_SYS_BOOT_MODE_ROM8 1 245#define K_SYS_BOOT_MODE_ROM8 1
246#define K_SYS_BOOT_MODE_SMBUS_SMALL 2 246#define K_SYS_BOOT_MODE_SMBUS_SMALL 2
@@ -255,9 +255,9 @@
255#define M_SYS_GEN_PARITY_EN _SB_MAKEMASK1(25) 255#define M_SYS_GEN_PARITY_EN _SB_MAKEMASK1(25)
256 256
257#define S_SYS_CONFIG 26 257#define S_SYS_CONFIG 26
258#define M_SYS_CONFIG _SB_MAKEMASK(6,S_SYS_CONFIG) 258#define M_SYS_CONFIG _SB_MAKEMASK(6, S_SYS_CONFIG)
259#define V_SYS_CONFIG(x) _SB_MAKEVALUE(x,S_SYS_CONFIG) 259#define V_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_SYS_CONFIG)
260#define G_SYS_CONFIG(x) _SB_GETVALUE(x,S_SYS_CONFIG,M_SYS_CONFIG) 260#define G_SYS_CONFIG(x) _SB_GETVALUE(x, S_SYS_CONFIG, M_SYS_CONFIG)
261 261
262/* The following bits are writeable by JTAG only. */ 262/* The following bits are writeable by JTAG only. */
263 263
@@ -265,20 +265,20 @@
265#define M_SYS_CLKSTEP _SB_MAKEMASK1(33) 265#define M_SYS_CLKSTEP _SB_MAKEMASK1(33)
266 266
267#define S_SYS_CLKCOUNT 34 267#define S_SYS_CLKCOUNT 34
268#define M_SYS_CLKCOUNT _SB_MAKEMASK(8,S_SYS_CLKCOUNT) 268#define M_SYS_CLKCOUNT _SB_MAKEMASK(8, S_SYS_CLKCOUNT)
269#define V_SYS_CLKCOUNT(x) _SB_MAKEVALUE(x,S_SYS_CLKCOUNT) 269#define V_SYS_CLKCOUNT(x) _SB_MAKEVALUE(x, S_SYS_CLKCOUNT)
270#define G_SYS_CLKCOUNT(x) _SB_GETVALUE(x,S_SYS_CLKCOUNT,M_SYS_CLKCOUNT) 270#define G_SYS_CLKCOUNT(x) _SB_GETVALUE(x, S_SYS_CLKCOUNT, M_SYS_CLKCOUNT)
271 271
272#define M_SYS_PLL_BYPASS _SB_MAKEMASK1(42) 272#define M_SYS_PLL_BYPASS _SB_MAKEMASK1(42)
273 273
274#define S_SYS_PLL_IREF 43 274#define S_SYS_PLL_IREF 43
275#define M_SYS_PLL_IREF _SB_MAKEMASK(2,S_SYS_PLL_IREF) 275#define M_SYS_PLL_IREF _SB_MAKEMASK(2, S_SYS_PLL_IREF)
276 276
277#define S_SYS_PLL_VCO 45 277#define S_SYS_PLL_VCO 45
278#define M_SYS_PLL_VCO _SB_MAKEMASK(2,S_SYS_PLL_VCO) 278#define M_SYS_PLL_VCO _SB_MAKEMASK(2, S_SYS_PLL_VCO)
279 279
280#define S_SYS_PLL_VREG 47 280#define S_SYS_PLL_VREG 47
281#define M_SYS_PLL_VREG _SB_MAKEMASK(2,S_SYS_PLL_VREG) 281#define M_SYS_PLL_VREG _SB_MAKEMASK(2, S_SYS_PLL_VREG)
282 282
283#define M_SYS_MEM_RESET _SB_MAKEMASK1(49) 283#define M_SYS_MEM_RESET _SB_MAKEMASK1(49)
284#define M_SYS_L2C_RESET _SB_MAKEMASK1(50) 284#define M_SYS_L2C_RESET _SB_MAKEMASK1(50)
@@ -314,13 +314,13 @@
314 */ 314 */
315 315
316#define S_MBOX_INT_3 0 316#define S_MBOX_INT_3 0
317#define M_MBOX_INT_3 _SB_MAKEMASK(16,S_MBOX_INT_3) 317#define M_MBOX_INT_3 _SB_MAKEMASK(16, S_MBOX_INT_3)
318#define S_MBOX_INT_2 16 318#define S_MBOX_INT_2 16
319#define M_MBOX_INT_2 _SB_MAKEMASK(16,S_MBOX_INT_2) 319#define M_MBOX_INT_2 _SB_MAKEMASK(16, S_MBOX_INT_2)
320#define S_MBOX_INT_1 32 320#define S_MBOX_INT_1 32
321#define M_MBOX_INT_1 _SB_MAKEMASK(16,S_MBOX_INT_1) 321#define M_MBOX_INT_1 _SB_MAKEMASK(16, S_MBOX_INT_1)
322#define S_MBOX_INT_0 48 322#define S_MBOX_INT_0 48
323#define M_MBOX_INT_0 _SB_MAKEMASK(16,S_MBOX_INT_0) 323#define M_MBOX_INT_0 _SB_MAKEMASK(16, S_MBOX_INT_0)
324 324
325/* 325/*
326 * Watchdog Registers (Table 4-8) (Table 4-9) (Table 4-10) 326 * Watchdog Registers (Table 4-8) (Table 4-9) (Table 4-10)
@@ -330,18 +330,18 @@
330#define V_SCD_WDOG_FREQ 1000000 330#define V_SCD_WDOG_FREQ 1000000
331 331
332#define S_SCD_WDOG_INIT 0 332#define S_SCD_WDOG_INIT 0
333#define M_SCD_WDOG_INIT _SB_MAKEMASK(23,S_SCD_WDOG_INIT) 333#define M_SCD_WDOG_INIT _SB_MAKEMASK(23, S_SCD_WDOG_INIT)
334 334
335#define S_SCD_WDOG_CNT 0 335#define S_SCD_WDOG_CNT 0
336#define M_SCD_WDOG_CNT _SB_MAKEMASK(23,S_SCD_WDOG_CNT) 336#define M_SCD_WDOG_CNT _SB_MAKEMASK(23, S_SCD_WDOG_CNT)
337 337
338#define S_SCD_WDOG_ENABLE 0 338#define S_SCD_WDOG_ENABLE 0
339#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(S_SCD_WDOG_ENABLE) 339#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(S_SCD_WDOG_ENABLE)
340 340
341#define S_SCD_WDOG_RESET_TYPE 2 341#define S_SCD_WDOG_RESET_TYPE 2
342#define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3,S_SCD_WDOG_RESET_TYPE) 342#define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3, S_SCD_WDOG_RESET_TYPE)
343#define V_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x,S_SCD_WDOG_RESET_TYPE) 343#define V_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_SCD_WDOG_RESET_TYPE)
344#define G_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x,S_SCD_WDOG_RESET_TYPE,M_SCD_WDOG_RESET_TYPE) 344#define G_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_SCD_WDOG_RESET_TYPE, M_SCD_WDOG_RESET_TYPE)
345 345
346#define K_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */ 346#define K_SCD_WDOG_RESET_FULL 0 /* actually, (x & 1) == 0 */
347#define K_SCD_WDOG_RESET_SOFT 1 347#define K_SCD_WDOG_RESET_SOFT 1
@@ -363,15 +363,15 @@
363#define V_SCD_TIMER_FREQ 1000000 363#define V_SCD_TIMER_FREQ 1000000
364 364
365#define S_SCD_TIMER_INIT 0 365#define S_SCD_TIMER_INIT 0
366#define M_SCD_TIMER_INIT _SB_MAKEMASK(23,S_SCD_TIMER_INIT) 366#define M_SCD_TIMER_INIT _SB_MAKEMASK(23, S_SCD_TIMER_INIT)
367#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT) 367#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_INIT)
368#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT) 368#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x, S_SCD_TIMER_INIT, M_SCD_TIMER_INIT)
369 369
370#define V_SCD_TIMER_WIDTH 23 370#define V_SCD_TIMER_WIDTH 23
371#define S_SCD_TIMER_CNT 0 371#define S_SCD_TIMER_CNT 0
372#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT) 372#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH, S_SCD_TIMER_CNT)
373#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT) 373#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_CNT)
374#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT) 374#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x, S_SCD_TIMER_CNT, M_SCD_TIMER_CNT)
375 375
376#define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0) 376#define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0)
377#define M_SCD_TIMER_MODE _SB_MAKEMASK1(1) 377#define M_SCD_TIMER_MODE _SB_MAKEMASK1(1)
@@ -382,24 +382,24 @@
382 */ 382 */
383 383
384#define S_SPC_CFG_SRC0 0 384#define S_SPC_CFG_SRC0 0
385#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0) 385#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8, S_SPC_CFG_SRC0)
386#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC0) 386#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC0)
387#define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x,S_SPC_CFG_SRC0,M_SPC_CFG_SRC0) 387#define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x, S_SPC_CFG_SRC0, M_SPC_CFG_SRC0)
388 388
389#define S_SPC_CFG_SRC1 8 389#define S_SPC_CFG_SRC1 8
390#define M_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_SPC_CFG_SRC1) 390#define M_SPC_CFG_SRC1 _SB_MAKEMASK(8, S_SPC_CFG_SRC1)
391#define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC1) 391#define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC1)
392#define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x,S_SPC_CFG_SRC1,M_SPC_CFG_SRC1) 392#define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x, S_SPC_CFG_SRC1, M_SPC_CFG_SRC1)
393 393
394#define S_SPC_CFG_SRC2 16 394#define S_SPC_CFG_SRC2 16
395#define M_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_SPC_CFG_SRC2) 395#define M_SPC_CFG_SRC2 _SB_MAKEMASK(8, S_SPC_CFG_SRC2)
396#define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC2) 396#define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC2)
397#define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x,S_SPC_CFG_SRC2,M_SPC_CFG_SRC2) 397#define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x, S_SPC_CFG_SRC2, M_SPC_CFG_SRC2)
398 398
399#define S_SPC_CFG_SRC3 24 399#define S_SPC_CFG_SRC3 24
400#define M_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_SPC_CFG_SRC3) 400#define M_SPC_CFG_SRC3 _SB_MAKEMASK(8, S_SPC_CFG_SRC3)
401#define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x,S_SPC_CFG_SRC3) 401#define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC3)
402#define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x,S_SPC_CFG_SRC3,M_SPC_CFG_SRC3) 402#define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x, S_SPC_CFG_SRC3, M_SPC_CFG_SRC3)
403 403
404#if SIBYTE_HDR_FEATURE_1250_112x 404#if SIBYTE_HDR_FEATURE_1250_112x
405#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32) 405#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32)
@@ -412,57 +412,57 @@
412 */ 412 */
413 413
414#define S_SCD_BERR_TID 8 414#define S_SCD_BERR_TID 8
415#define M_SCD_BERR_TID _SB_MAKEMASK(10,S_SCD_BERR_TID) 415#define M_SCD_BERR_TID _SB_MAKEMASK(10, S_SCD_BERR_TID)
416#define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x,S_SCD_BERR_TID) 416#define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x, S_SCD_BERR_TID)
417#define G_SCD_BERR_TID(x) _SB_GETVALUE(x,S_SCD_BERR_TID,M_SCD_BERR_TID) 417#define G_SCD_BERR_TID(x) _SB_GETVALUE(x, S_SCD_BERR_TID, M_SCD_BERR_TID)
418 418
419#define S_SCD_BERR_RID 18 419#define S_SCD_BERR_RID 18
420#define M_SCD_BERR_RID _SB_MAKEMASK(4,S_SCD_BERR_RID) 420#define M_SCD_BERR_RID _SB_MAKEMASK(4, S_SCD_BERR_RID)
421#define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x,S_SCD_BERR_RID) 421#define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x, S_SCD_BERR_RID)
422#define G_SCD_BERR_RID(x) _SB_GETVALUE(x,S_SCD_BERR_RID,M_SCD_BERR_RID) 422#define G_SCD_BERR_RID(x) _SB_GETVALUE(x, S_SCD_BERR_RID, M_SCD_BERR_RID)
423 423
424#define S_SCD_BERR_DCODE 22 424#define S_SCD_BERR_DCODE 22
425#define M_SCD_BERR_DCODE _SB_MAKEMASK(3,S_SCD_BERR_DCODE) 425#define M_SCD_BERR_DCODE _SB_MAKEMASK(3, S_SCD_BERR_DCODE)
426#define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x,S_SCD_BERR_DCODE) 426#define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x, S_SCD_BERR_DCODE)
427#define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x,S_SCD_BERR_DCODE,M_SCD_BERR_DCODE) 427#define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x, S_SCD_BERR_DCODE, M_SCD_BERR_DCODE)
428 428
429#define M_SCD_BERR_MULTERRS _SB_MAKEMASK1(30) 429#define M_SCD_BERR_MULTERRS _SB_MAKEMASK1(30)
430 430
431 431
432#define S_SCD_L2ECC_CORR_D 0 432#define S_SCD_L2ECC_CORR_D 0
433#define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_D) 433#define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_D)
434#define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_D) 434#define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_D)
435#define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_D,M_SCD_L2ECC_CORR_D) 435#define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_D, M_SCD_L2ECC_CORR_D)
436 436
437#define S_SCD_L2ECC_BAD_D 8 437#define S_SCD_L2ECC_BAD_D 8
438#define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_D) 438#define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_D)
439#define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_D) 439#define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_D)
440#define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_D,M_SCD_L2ECC_BAD_D) 440#define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_D, M_SCD_L2ECC_BAD_D)
441 441
442#define S_SCD_L2ECC_CORR_T 16 442#define S_SCD_L2ECC_CORR_T 16
443#define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_T) 443#define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_T)
444#define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_T) 444#define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_T)
445#define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_CORR_T,M_SCD_L2ECC_CORR_T) 445#define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_T, M_SCD_L2ECC_CORR_T)
446 446
447#define S_SCD_L2ECC_BAD_T 24 447#define S_SCD_L2ECC_BAD_T 24
448#define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_T) 448#define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_T)
449#define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_T) 449#define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_T)
450#define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x,S_SCD_L2ECC_BAD_T,M_SCD_L2ECC_BAD_T) 450#define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_T, M_SCD_L2ECC_BAD_T)
451 451
452#define S_SCD_MEM_ECC_CORR 0 452#define S_SCD_MEM_ECC_CORR 0
453#define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8,S_SCD_MEM_ECC_CORR) 453#define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8, S_SCD_MEM_ECC_CORR)
454#define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_CORR) 454#define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_CORR)
455#define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_CORR,M_SCD_MEM_ECC_CORR) 455#define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_CORR, M_SCD_MEM_ECC_CORR)
456 456
457#define S_SCD_MEM_ECC_BAD 8 457#define S_SCD_MEM_ECC_BAD 8
458#define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8,S_SCD_MEM_ECC_BAD) 458#define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8, S_SCD_MEM_ECC_BAD)
459#define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x,S_SCD_MEM_ECC_BAD) 459#define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_BAD)
460#define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x,S_SCD_MEM_ECC_BAD,M_SCD_MEM_ECC_BAD) 460#define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_BAD, M_SCD_MEM_ECC_BAD)
461 461
462#define S_SCD_MEM_BUSERR 16 462#define S_SCD_MEM_BUSERR 16
463#define M_SCD_MEM_BUSERR _SB_MAKEMASK(8,S_SCD_MEM_BUSERR) 463#define M_SCD_MEM_BUSERR _SB_MAKEMASK(8, S_SCD_MEM_BUSERR)
464#define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x,S_SCD_MEM_BUSERR) 464#define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x, S_SCD_MEM_BUSERR)
465#define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x,S_SCD_MEM_BUSERR,M_SCD_MEM_BUSERR) 465#define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x, S_SCD_MEM_BUSERR, M_SCD_MEM_BUSERR)
466 466
467 467
468/* 468/*
@@ -470,13 +470,13 @@
470 */ 470 */
471 471
472#if SIBYTE_HDR_FEATURE_1250_112x 472#if SIBYTE_HDR_FEATURE_1250_112x
473#define M_ATRAP_INDEX _SB_MAKEMASK(4,0) 473#define M_ATRAP_INDEX _SB_MAKEMASK(4, 0)
474#define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0) 474#define M_ATRAP_ADDRESS _SB_MAKEMASK(40, 0)
475 475
476#define S_ATRAP_CFG_CNT 0 476#define S_ATRAP_CFG_CNT 0
477#define M_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_ATRAP_CFG_CNT) 477#define M_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_ATRAP_CFG_CNT)
478#define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CNT) 478#define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CNT)
479#define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x,S_ATRAP_CFG_CNT,M_ATRAP_CFG_CNT) 479#define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_ATRAP_CFG_CNT, M_ATRAP_CFG_CNT)
480 480
481#define M_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) 481#define M_ATRAP_CFG_WRITE _SB_MAKEMASK1(3)
482#define M_ATRAP_CFG_ALL _SB_MAKEMASK1(4) 482#define M_ATRAP_CFG_ALL _SB_MAKEMASK1(4)
@@ -485,9 +485,9 @@
485#define M_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) 485#define M_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7)
486 486
487#define S_ATRAP_CFG_AGENTID 8 487#define S_ATRAP_CFG_AGENTID 8
488#define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_ATRAP_CFG_AGENTID) 488#define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_ATRAP_CFG_AGENTID)
489#define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_AGENTID) 489#define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_AGENTID)
490#define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x,S_ATRAP_CFG_AGENTID,M_ATRAP_CFG_AGENTID) 490#define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_ATRAP_CFG_AGENTID, M_ATRAP_CFG_AGENTID)
491 491
492#define K_BUS_AGENT_CPU0 0 492#define K_BUS_AGENT_CPU0 0
493#define K_BUS_AGENT_CPU1 1 493#define K_BUS_AGENT_CPU1 1
@@ -498,9 +498,9 @@
498#define K_BUS_AGENT_MC 7 498#define K_BUS_AGENT_MC 7
499 499
500#define S_ATRAP_CFG_CATTR 12 500#define S_ATRAP_CFG_CATTR 12
501#define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3,S_ATRAP_CFG_CATTR) 501#define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3, S_ATRAP_CFG_CATTR)
502#define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x,S_ATRAP_CFG_CATTR) 502#define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CATTR)
503#define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x,S_ATRAP_CFG_CATTR,M_ATRAP_CFG_CATTR) 503#define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_ATRAP_CFG_CATTR, M_ATRAP_CFG_CATTR)
504 504
505#define K_ATRAP_CFG_CATTR_IGNORE 0 505#define K_ATRAP_CFG_CATTR_IGNORE 0
506#define K_ATRAP_CFG_CATTR_UNC 1 506#define K_ATRAP_CFG_CATTR_UNC 1
@@ -541,18 +541,18 @@
541#endif /* 1480 */ 541#endif /* 1480 */
542#endif /* 1250/112x */ 542#endif /* 1250/112x */
543 543
544#define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_SCD_TRACE_CFG_CUR_ADDR) 544#define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8, S_SCD_TRACE_CFG_CUR_ADDR)
545#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR) 545#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR)
546#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR) 546#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR, M_SCD_TRACE_CFG_CUR_ADDR)
547 547
548/* 548/*
549 * Trace Event registers 549 * Trace Event registers
550 */ 550 */
551 551
552#define S_SCD_TREVT_ADDR_MATCH 0 552#define S_SCD_TREVT_ADDR_MATCH 0
553#define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4,S_SCD_TREVT_ADDR_MATCH) 553#define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4, S_SCD_TREVT_ADDR_MATCH)
554#define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x,S_SCD_TREVT_ADDR_MATCH) 554#define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x, S_SCD_TREVT_ADDR_MATCH)
555#define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x,S_SCD_TREVT_ADDR_MATCH,M_SCD_TREVT_ADDR_MATCH) 555#define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x, S_SCD_TREVT_ADDR_MATCH, M_SCD_TREVT_ADDR_MATCH)
556 556
557#define M_SCD_TREVT_REQID_MATCH _SB_MAKEMASK1(4) 557#define M_SCD_TREVT_REQID_MATCH _SB_MAKEMASK1(4)
558#define M_SCD_TREVT_DATAID_MATCH _SB_MAKEMASK1(5) 558#define M_SCD_TREVT_DATAID_MATCH _SB_MAKEMASK1(5)
@@ -563,48 +563,48 @@
563#define M_SCD_TREVT_READ _SB_MAKEMASK1(11) 563#define M_SCD_TREVT_READ _SB_MAKEMASK1(11)
564 564
565#define S_SCD_TREVT_REQID 12 565#define S_SCD_TREVT_REQID 12
566#define M_SCD_TREVT_REQID _SB_MAKEMASK(4,S_SCD_TREVT_REQID) 566#define M_SCD_TREVT_REQID _SB_MAKEMASK(4, S_SCD_TREVT_REQID)
567#define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_REQID) 567#define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_REQID)
568#define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x,S_SCD_TREVT_REQID,M_SCD_TREVT_REQID) 568#define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x, S_SCD_TREVT_REQID, M_SCD_TREVT_REQID)
569 569
570#define S_SCD_TREVT_RESPID 16 570#define S_SCD_TREVT_RESPID 16
571#define M_SCD_TREVT_RESPID _SB_MAKEMASK(4,S_SCD_TREVT_RESPID) 571#define M_SCD_TREVT_RESPID _SB_MAKEMASK(4, S_SCD_TREVT_RESPID)
572#define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_RESPID) 572#define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_RESPID)
573#define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x,S_SCD_TREVT_RESPID,M_SCD_TREVT_RESPID) 573#define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x, S_SCD_TREVT_RESPID, M_SCD_TREVT_RESPID)
574 574
575#define S_SCD_TREVT_DATAID 20 575#define S_SCD_TREVT_DATAID 20
576#define M_SCD_TREVT_DATAID _SB_MAKEMASK(4,S_SCD_TREVT_DATAID) 576#define M_SCD_TREVT_DATAID _SB_MAKEMASK(4, S_SCD_TREVT_DATAID)
577#define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x,S_SCD_TREVT_DATAID) 577#define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_DATAID)
578#define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x,S_SCD_TREVT_DATAID,M_SCD_TREVT_DATID) 578#define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x, S_SCD_TREVT_DATAID, M_SCD_TREVT_DATID)
579 579
580#define S_SCD_TREVT_COUNT 24 580#define S_SCD_TREVT_COUNT 24
581#define M_SCD_TREVT_COUNT _SB_MAKEMASK(8,S_SCD_TREVT_COUNT) 581#define M_SCD_TREVT_COUNT _SB_MAKEMASK(8, S_SCD_TREVT_COUNT)
582#define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x,S_SCD_TREVT_COUNT) 582#define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x, S_SCD_TREVT_COUNT)
583#define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x,S_SCD_TREVT_COUNT,M_SCD_TREVT_COUNT) 583#define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x, S_SCD_TREVT_COUNT, M_SCD_TREVT_COUNT)
584 584
585/* 585/*
586 * Trace Sequence registers 586 * Trace Sequence registers
587 */ 587 */
588 588
589#define S_SCD_TRSEQ_EVENT4 0 589#define S_SCD_TRSEQ_EVENT4 0
590#define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT4) 590#define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT4)
591#define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT4) 591#define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT4)
592#define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT4,M_SCD_TRSEQ_EVENT4) 592#define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT4, M_SCD_TRSEQ_EVENT4)
593 593
594#define S_SCD_TRSEQ_EVENT3 4 594#define S_SCD_TRSEQ_EVENT3 4
595#define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT3) 595#define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT3)
596#define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT3) 596#define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT3)
597#define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT3,M_SCD_TRSEQ_EVENT3) 597#define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT3, M_SCD_TRSEQ_EVENT3)
598 598
599#define S_SCD_TRSEQ_EVENT2 8 599#define S_SCD_TRSEQ_EVENT2 8
600#define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT2) 600#define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT2)
601#define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT2) 601#define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT2)
602#define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT2,M_SCD_TRSEQ_EVENT2) 602#define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT2, M_SCD_TRSEQ_EVENT2)
603 603
604#define S_SCD_TRSEQ_EVENT1 12 604#define S_SCD_TRSEQ_EVENT1 12
605#define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT1) 605#define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT1)
606#define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT1) 606#define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT1)
607#define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT1,M_SCD_TRSEQ_EVENT1) 607#define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT1, M_SCD_TRSEQ_EVENT1)
608 608
609#define K_SCD_TRSEQ_E0 0 609#define K_SCD_TRSEQ_E0 0
610#define K_SCD_TRSEQ_E1 1 610#define K_SCD_TRSEQ_E1 1
@@ -629,9 +629,9 @@
629 V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED)) 629 V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED))
630 630
631#define S_SCD_TRSEQ_FUNCTION 16 631#define S_SCD_TRSEQ_FUNCTION 16
632#define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4,S_SCD_TRSEQ_FUNCTION) 632#define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4, S_SCD_TRSEQ_FUNCTION)
633#define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x,S_SCD_TRSEQ_FUNCTION) 633#define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_FUNCTION)
634#define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x,S_SCD_TRSEQ_FUNCTION,M_SCD_TRSEQ_FUNCTION) 634#define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x, S_SCD_TRSEQ_FUNCTION, M_SCD_TRSEQ_FUNCTION)
635 635
636#define K_SCD_TRSEQ_FUNC_NOP 0 636#define K_SCD_TRSEQ_FUNC_NOP 0
637#define K_SCD_TRSEQ_FUNC_START 1 637#define K_SCD_TRSEQ_FUNC_START 1
diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h
index 279a912213cd..04769923cf1e 100644
--- a/include/asm-mips/sibyte/sb1250_smbus.h
+++ b/include/asm-mips/sibyte/sb1250_smbus.h
@@ -41,16 +41,16 @@
41 */ 41 */
42 42
43#define S_SMB_FREQ_DIV 0 43#define S_SMB_FREQ_DIV 0
44#define M_SMB_FREQ_DIV _SB_MAKEMASK(13,S_SMB_FREQ_DIV) 44#define M_SMB_FREQ_DIV _SB_MAKEMASK(13, S_SMB_FREQ_DIV)
45#define V_SMB_FREQ_DIV(x) _SB_MAKEVALUE(x,S_SMB_FREQ_DIV) 45#define V_SMB_FREQ_DIV(x) _SB_MAKEVALUE(x, S_SMB_FREQ_DIV)
46 46
47#define K_SMB_FREQ_400KHZ 0x1F 47#define K_SMB_FREQ_400KHZ 0x1F
48#define K_SMB_FREQ_100KHZ 0x7D 48#define K_SMB_FREQ_100KHZ 0x7D
49#define K_SMB_FREQ_10KHZ 1250 49#define K_SMB_FREQ_10KHZ 1250
50 50
51#define S_SMB_CMD 0 51#define S_SMB_CMD 0
52#define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD) 52#define M_SMB_CMD _SB_MAKEMASK(8, S_SMB_CMD)
53#define V_SMB_CMD(x) _SB_MAKEVALUE(x,S_SMB_CMD) 53#define V_SMB_CMD(x) _SB_MAKEVALUE(x, S_SMB_CMD)
54 54
55/* 55/*
56 * SMBus control register (Table 14-4) 56 * SMBus control register (Table 14-4)
@@ -61,7 +61,7 @@
61 61
62#define S_SMB_DATA_OUT 4 62#define S_SMB_DATA_OUT 4
63#define M_SMB_DATA_OUT _SB_MAKEMASK1(S_SMB_DATA_OUT) 63#define M_SMB_DATA_OUT _SB_MAKEMASK1(S_SMB_DATA_OUT)
64#define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x,S_SMB_DATA_OUT) 64#define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x, S_SMB_DATA_OUT)
65 65
66#define M_SMB_DATA_DIR _SB_MAKEMASK1(5) 66#define M_SMB_DATA_DIR _SB_MAKEMASK1(5)
67#define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR 67#define M_SMB_DATA_DIR_OUTPUT M_SMB_DATA_DIR
@@ -79,35 +79,35 @@
79#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 79#if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
80#define S_SMB_SCL_IN 5 80#define S_SMB_SCL_IN 5
81#define M_SMB_SCL_IN _SB_MAKEMASK1(S_SMB_SCL_IN) 81#define M_SMB_SCL_IN _SB_MAKEMASK1(S_SMB_SCL_IN)
82#define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x,S_SMB_SCL_IN) 82#define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x, S_SMB_SCL_IN)
83#define G_SMB_SCL_IN(x) _SB_GETVALUE(x,S_SMB_SCL_IN,M_SMB_SCL_IN) 83#define G_SMB_SCL_IN(x) _SB_GETVALUE(x, S_SMB_SCL_IN, M_SMB_SCL_IN)
84#endif /* 1250 PASS3 || 112x PASS1 || 1480 */ 84#endif /* 1250 PASS3 || 112x PASS1 || 1480 */
85 85
86#define S_SMB_REF 6 86#define S_SMB_REF 6
87#define M_SMB_REF _SB_MAKEMASK1(S_SMB_REF) 87#define M_SMB_REF _SB_MAKEMASK1(S_SMB_REF)
88#define V_SMB_REF(x) _SB_MAKEVALUE(x,S_SMB_REF) 88#define V_SMB_REF(x) _SB_MAKEVALUE(x, S_SMB_REF)
89#define G_SMB_REF(x) _SB_GETVALUE(x,S_SMB_REF,M_SMB_REF) 89#define G_SMB_REF(x) _SB_GETVALUE(x, S_SMB_REF, M_SMB_REF)
90 90
91#define S_SMB_DATA_IN 7 91#define S_SMB_DATA_IN 7
92#define M_SMB_DATA_IN _SB_MAKEMASK1(S_SMB_DATA_IN) 92#define M_SMB_DATA_IN _SB_MAKEMASK1(S_SMB_DATA_IN)
93#define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x,S_SMB_DATA_IN) 93#define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x, S_SMB_DATA_IN)
94#define G_SMB_DATA_IN(x) _SB_GETVALUE(x,S_SMB_DATA_IN,M_SMB_DATA_IN) 94#define G_SMB_DATA_IN(x) _SB_GETVALUE(x, S_SMB_DATA_IN, M_SMB_DATA_IN)
95 95
96/* 96/*
97 * SMBus Start/Command registers (Table 14-9) 97 * SMBus Start/Command registers (Table 14-9)
98 */ 98 */
99 99
100#define S_SMB_ADDR 0 100#define S_SMB_ADDR 0
101#define M_SMB_ADDR _SB_MAKEMASK(7,S_SMB_ADDR) 101#define M_SMB_ADDR _SB_MAKEMASK(7, S_SMB_ADDR)
102#define V_SMB_ADDR(x) _SB_MAKEVALUE(x,S_SMB_ADDR) 102#define V_SMB_ADDR(x) _SB_MAKEVALUE(x, S_SMB_ADDR)
103#define G_SMB_ADDR(x) _SB_GETVALUE(x,S_SMB_ADDR,M_SMB_ADDR) 103#define G_SMB_ADDR(x) _SB_GETVALUE(x, S_SMB_ADDR, M_SMB_ADDR)
104 104
105#define M_SMB_QDATA _SB_MAKEMASK1(7) 105#define M_SMB_QDATA _SB_MAKEMASK1(7)
106 106
107#define S_SMB_TT 8 107#define S_SMB_TT 8
108#define M_SMB_TT _SB_MAKEMASK(3,S_SMB_TT) 108#define M_SMB_TT _SB_MAKEMASK(3, S_SMB_TT)
109#define V_SMB_TT(x) _SB_MAKEVALUE(x,S_SMB_TT) 109#define V_SMB_TT(x) _SB_MAKEVALUE(x, S_SMB_TT)
110#define G_SMB_TT(x) _SB_GETVALUE(x,S_SMB_TT,M_SMB_TT) 110#define G_SMB_TT(x) _SB_GETVALUE(x, S_SMB_TT, M_SMB_TT)
111 111
112#define K_SMB_TT_WR1BYTE 0 112#define K_SMB_TT_WR1BYTE 0
113#define K_SMB_TT_WR2BYTE 1 113#define K_SMB_TT_WR2BYTE 1
@@ -134,12 +134,12 @@
134 */ 134 */
135 135
136#define S_SMB_LB 0 136#define S_SMB_LB 0
137#define M_SMB_LB _SB_MAKEMASK(8,S_SMB_LB) 137#define M_SMB_LB _SB_MAKEMASK(8, S_SMB_LB)
138#define V_SMB_LB(x) _SB_MAKEVALUE(x,S_SMB_LB) 138#define V_SMB_LB(x) _SB_MAKEVALUE(x, S_SMB_LB)
139 139
140#define S_SMB_MB 8 140#define S_SMB_MB 8
141#define M_SMB_MB _SB_MAKEMASK(8,S_SMB_MB) 141#define M_SMB_MB _SB_MAKEMASK(8, S_SMB_MB)
142#define V_SMB_MB(x) _SB_MAKEVALUE(x,S_SMB_MB) 142#define V_SMB_MB(x) _SB_MAKEVALUE(x, S_SMB_MB)
143 143
144 144
145/* 145/*
@@ -147,22 +147,22 @@
147 */ 147 */
148 148
149#define S_SPEC_PEC 0 149#define S_SPEC_PEC 0
150#define M_SPEC_PEC _SB_MAKEMASK(8,S_SPEC_PEC) 150#define M_SPEC_PEC _SB_MAKEMASK(8, S_SPEC_PEC)
151#define V_SPEC_MB(x) _SB_MAKEVALUE(x,S_SPEC_PEC) 151#define V_SPEC_MB(x) _SB_MAKEVALUE(x, S_SPEC_PEC)
152 152
153 153
154#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480) 154#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
155 155
156#define S_SMB_CMDH 8 156#define S_SMB_CMDH 8
157#define M_SMB_CMDH _SB_MAKEMASK(8,S_SMB_CMDH) 157#define M_SMB_CMDH _SB_MAKEMASK(8, S_SMB_CMDH)
158#define V_SMB_CMDH(x) _SB_MAKEVALUE(x,S_SMB_CMDH) 158#define V_SMB_CMDH(x) _SB_MAKEVALUE(x, S_SMB_CMDH)
159 159
160#define M_SMB_EXTEND _SB_MAKEMASK1(14) 160#define M_SMB_EXTEND _SB_MAKEMASK1(14)
161 161
162#define S_SMB_DFMT 8 162#define S_SMB_DFMT 8
163#define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT) 163#define M_SMB_DFMT _SB_MAKEMASK(3, S_SMB_DFMT)
164#define V_SMB_DFMT(x) _SB_MAKEVALUE(x,S_SMB_DFMT) 164#define V_SMB_DFMT(x) _SB_MAKEVALUE(x, S_SMB_DFMT)
165#define G_SMB_DFMT(x) _SB_GETVALUE(x,S_SMB_DFMT,M_SMB_DFMT) 165#define G_SMB_DFMT(x) _SB_GETVALUE(x, S_SMB_DFMT, M_SMB_DFMT)
166 166
167#define K_SMB_DFMT_1BYTE 0 167#define K_SMB_DFMT_1BYTE 0
168#define K_SMB_DFMT_2BYTE 1 168#define K_SMB_DFMT_2BYTE 1
@@ -183,9 +183,9 @@
183#define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED) 183#define V_SMB_DFMT_RESERVED V_SMB_DFMT(K_SMB_DFMT_RESERVED)
184 184
185#define S_SMB_AFMT 11 185#define S_SMB_AFMT 11
186#define M_SMB_AFMT _SB_MAKEMASK(2,S_SMB_AFMT) 186#define M_SMB_AFMT _SB_MAKEMASK(2, S_SMB_AFMT)
187#define V_SMB_AFMT(x) _SB_MAKEVALUE(x,S_SMB_AFMT) 187#define V_SMB_AFMT(x) _SB_MAKEVALUE(x, S_SMB_AFMT)
188#define G_SMB_AFMT(x) _SB_GETVALUE(x,S_SMB_AFMT,M_SMB_AFMT) 188#define G_SMB_AFMT(x) _SB_GETVALUE(x, S_SMB_AFMT, M_SMB_AFMT)
189 189
190#define K_SMB_AFMT_NONE 0 190#define K_SMB_AFMT_NONE 0
191#define K_SMB_AFMT_ADDR 1 191#define K_SMB_AFMT_ADDR 1
diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h
index dd154ac505d8..d4b8558e0bf1 100644
--- a/include/asm-mips/sibyte/sb1250_syncser.h
+++ b/include/asm-mips/sibyte/sb1250_syncser.h
@@ -43,8 +43,8 @@
43#define M_SYNCSER_MSB_FIRST _SB_MAKEMASK1(1) 43#define M_SYNCSER_MSB_FIRST _SB_MAKEMASK1(1)
44 44
45#define S_SYNCSER_FLAG_NUM 2 45#define S_SYNCSER_FLAG_NUM 2
46#define M_SYNCSER_FLAG_NUM _SB_MAKEMASK(4,S_SYNCSER_FLAG_NUM) 46#define M_SYNCSER_FLAG_NUM _SB_MAKEMASK(4, S_SYNCSER_FLAG_NUM)
47#define V_SYNCSER_FLAG_NUM _SB_MAKEVALUE(x,S_SYNCSER_FLAG_NUM) 47#define V_SYNCSER_FLAG_NUM _SB_MAKEVALUE(x, S_SYNCSER_FLAG_NUM)
48 48
49#define M_SYNCSER_FLAG_EN _SB_MAKEMASK1(6) 49#define M_SYNCSER_FLAG_EN _SB_MAKEMASK1(6)
50#define M_SYNCSER_HDLC_EN _SB_MAKEMASK1(7) 50#define M_SYNCSER_HDLC_EN _SB_MAKEMASK1(7)
@@ -59,8 +59,8 @@
59#define M_SYNCSER_RXCLK_EXT _SB_MAKEMASK1(1) 59#define M_SYNCSER_RXCLK_EXT _SB_MAKEMASK1(1)
60 60
61#define S_SYNCSER_RXSYNC_DLY 2 61#define S_SYNCSER_RXSYNC_DLY 2
62#define M_SYNCSER_RXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_RXSYNC_DLY) 62#define M_SYNCSER_RXSYNC_DLY _SB_MAKEMASK(2, S_SYNCSER_RXSYNC_DLY)
63#define V_SYNCSER_RXSYNC_DLY(x) _SB_MAKEVALUE(x,S_SYNCSER_RXSYNC_DLY) 63#define V_SYNCSER_RXSYNC_DLY(x) _SB_MAKEVALUE(x, S_SYNCSER_RXSYNC_DLY)
64 64
65#define M_SYNCSER_RXSYNC_LOW _SB_MAKEMASK1(4) 65#define M_SYNCSER_RXSYNC_LOW _SB_MAKEMASK1(4)
66#define M_SYNCSER_RXSTRB_LOW _SB_MAKEMASK1(5) 66#define M_SYNCSER_RXSTRB_LOW _SB_MAKEMASK1(5)
@@ -72,8 +72,8 @@
72#define M_SYNCSER_TXCLK_EXT _SB_MAKEMASK1(9) 72#define M_SYNCSER_TXCLK_EXT _SB_MAKEMASK1(9)
73 73
74#define S_SYNCSER_TXSYNC_DLY 10 74#define S_SYNCSER_TXSYNC_DLY 10
75#define M_SYNCSER_TXSYNC_DLY _SB_MAKEMASK(2,S_SYNCSER_TXSYNC_DLY) 75#define M_SYNCSER_TXSYNC_DLY _SB_MAKEMASK(2, S_SYNCSER_TXSYNC_DLY)
76#define V_SYNCSER_TXSYNC_DLY(x) _SB_MAKEVALUE(x,S_SYNCSER_TXSYNC_DLY) 76#define V_SYNCSER_TXSYNC_DLY(x) _SB_MAKEVALUE(x, S_SYNCSER_TXSYNC_DLY)
77 77
78#define M_SYNCSER_TXSYNC_LOW _SB_MAKEMASK1(12) 78#define M_SYNCSER_TXSYNC_LOW _SB_MAKEMASK1(12)
79#define M_SYNCSER_TXSTRB_LOW _SB_MAKEMASK1(13) 79#define M_SYNCSER_TXSTRB_LOW _SB_MAKEMASK1(13)
@@ -137,8 +137,8 @@
137#define M_SYNCSER_SEQ_BYTE _SB_MAKEMASK1(1) 137#define M_SYNCSER_SEQ_BYTE _SB_MAKEMASK1(1)
138 138
139#define S_SYNCSER_SEQ_COUNT 2 139#define S_SYNCSER_SEQ_COUNT 2
140#define M_SYNCSER_SEQ_COUNT _SB_MAKEMASK(4,S_SYNCSER_SEQ_COUNT) 140#define M_SYNCSER_SEQ_COUNT _SB_MAKEMASK(4, S_SYNCSER_SEQ_COUNT)
141#define V_SYNCSER_SEQ_COUNT(x) _SB_MAKEVALUE(x,S_SYNCSER_SEQ_COUNT) 141#define V_SYNCSER_SEQ_COUNT(x) _SB_MAKEVALUE(x, S_SYNCSER_SEQ_COUNT)
142 142
143#define M_SYNCSER_SEQ_ENABLE _SB_MAKEMASK1(6) 143#define M_SYNCSER_SEQ_ENABLE _SB_MAKEMASK1(6)
144#define M_SYNCSER_SEQ_STROBE _SB_MAKEMASK1(7) 144#define M_SYNCSER_SEQ_STROBE _SB_MAKEMASK1(7)
diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
index cf74fedcbef1..d835bf280140 100644
--- a/include/asm-mips/sibyte/sb1250_uart.h
+++ b/include/asm-mips/sibyte/sb1250_uart.h
@@ -46,8 +46,8 @@
46 */ 46 */
47 47
48#define S_DUART_BITS_PER_CHAR 0 48#define S_DUART_BITS_PER_CHAR 0
49#define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR) 49#define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2, S_DUART_BITS_PER_CHAR)
50#define V_DUART_BITS_PER_CHAR(x) _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR) 50#define V_DUART_BITS_PER_CHAR(x) _SB_MAKEVALUE(x, S_DUART_BITS_PER_CHAR)
51 51
52#define K_DUART_BITS_PER_CHAR_RSV0 0 52#define K_DUART_BITS_PER_CHAR_RSV0 0
53#define K_DUART_BITS_PER_CHAR_RSV1 1 53#define K_DUART_BITS_PER_CHAR_RSV1 1
@@ -64,8 +64,8 @@
64#define M_DUART_PARITY_TYPE_ODD _SB_MAKEMASK1(2) 64#define M_DUART_PARITY_TYPE_ODD _SB_MAKEMASK1(2)
65 65
66#define S_DUART_PARITY_MODE 3 66#define S_DUART_PARITY_MODE 3
67#define M_DUART_PARITY_MODE _SB_MAKEMASK(2,S_DUART_PARITY_MODE) 67#define M_DUART_PARITY_MODE _SB_MAKEMASK(2, S_DUART_PARITY_MODE)
68#define V_DUART_PARITY_MODE(x) _SB_MAKEVALUE(x,S_DUART_PARITY_MODE) 68#define V_DUART_PARITY_MODE(x) _SB_MAKEVALUE(x, S_DUART_PARITY_MODE)
69 69
70#define K_DUART_PARITY_MODE_ADD 0 70#define K_DUART_PARITY_MODE_ADD 0
71#define K_DUART_PARITY_MODE_ADD_FIXED 1 71#define K_DUART_PARITY_MODE_ADD_FIXED 1
@@ -89,7 +89,7 @@
89 * Register: DUART_MODE_REG_2_B 89 * Register: DUART_MODE_REG_2_B
90 */ 90 */
91 91
92#define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3,0) /* ignored */ 92#define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3, 0) /* ignored */
93 93
94#define M_DUART_STOP_BIT_LEN_2 _SB_MAKEMASK1(3) 94#define M_DUART_STOP_BIT_LEN_2 _SB_MAKEMASK1(3)
95#define M_DUART_STOP_BIT_LEN_1 0 95#define M_DUART_STOP_BIT_LEN_1 0
@@ -100,8 +100,8 @@
100#define M_DUART_MODE_RESERVED2 _SB_MAKEMASK1(5) /* must be zero */ 100#define M_DUART_MODE_RESERVED2 _SB_MAKEMASK1(5) /* must be zero */
101 101
102#define S_DUART_CHAN_MODE 6 102#define S_DUART_CHAN_MODE 6
103#define M_DUART_CHAN_MODE _SB_MAKEMASK(2,S_DUART_CHAN_MODE) 103#define M_DUART_CHAN_MODE _SB_MAKEMASK(2, S_DUART_CHAN_MODE)
104#define V_DUART_CHAN_MODE(x) _SB_MAKEVALUE(x,S_DUART_CHAN_MODE) 104#define V_DUART_CHAN_MODE(x) _SB_MAKEVALUE(x, S_DUART_CHAN_MODE)
105 105
106#define K_DUART_CHAN_MODE_NORMAL 0 106#define K_DUART_CHAN_MODE_NORMAL 0
107#define K_DUART_CHAN_MODE_LCL_LOOP 2 107#define K_DUART_CHAN_MODE_LCL_LOOP 2
@@ -123,8 +123,8 @@
123#define M_DUART_TX_DIS _SB_MAKEMASK1(3) 123#define M_DUART_TX_DIS _SB_MAKEMASK1(3)
124 124
125#define S_DUART_MISC_CMD 4 125#define S_DUART_MISC_CMD 4
126#define M_DUART_MISC_CMD _SB_MAKEMASK(3,S_DUART_MISC_CMD) 126#define M_DUART_MISC_CMD _SB_MAKEMASK(3, S_DUART_MISC_CMD)
127#define V_DUART_MISC_CMD(x) _SB_MAKEVALUE(x,S_DUART_MISC_CMD) 127#define V_DUART_MISC_CMD(x) _SB_MAKEVALUE(x, S_DUART_MISC_CMD)
128 128
129#define K_DUART_MISC_CMD_NOACTION0 0 129#define K_DUART_MISC_CMD_NOACTION0 0
130#define K_DUART_MISC_CMD_NOACTION1 1 130#define K_DUART_MISC_CMD_NOACTION1 1
@@ -168,7 +168,7 @@
168 * Register: DUART_CLK_SEL_B 168 * Register: DUART_CLK_SEL_B
169 */ 169 */
170 170
171#define M_DUART_CLK_COUNTER _SB_MAKEMASK(12,0) 171#define M_DUART_CLK_COUNTER _SB_MAKEMASK(12, 0)
172#define V_DUART_BAUD_RATE(x) (100000000/((x)*20)-1) 172#define V_DUART_BAUD_RATE(x) (100000000/((x)*20)-1)
173 173
174/* 174/*
@@ -179,8 +179,8 @@
179 * Register: DUART_TX_HOLD_B 179 * Register: DUART_TX_HOLD_B
180 */ 180 */
181 181
182#define M_DUART_RX_DATA _SB_MAKEMASK(8,0) 182#define M_DUART_RX_DATA _SB_MAKEMASK(8, 0)
183#define M_DUART_TX_DATA _SB_MAKEMASK(8,0) 183#define M_DUART_TX_DATA _SB_MAKEMASK(8, 0)
184 184
185/* 185/*
186 * DUART Input Port Register (Table 10-10) 186 * DUART Input Port Register (Table 10-10)
@@ -202,10 +202,10 @@
202 */ 202 */
203 203
204#define S_DUART_IN_PIN_VAL 0 204#define S_DUART_IN_PIN_VAL 0
205#define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL) 205#define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4, S_DUART_IN_PIN_VAL)
206 206
207#define S_DUART_IN_PIN_CHNG 4 207#define S_DUART_IN_PIN_CHNG 4
208#define M_DUART_IN_PIN_CHNG _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG) 208#define M_DUART_IN_PIN_CHNG _SB_MAKEMASK(4, S_DUART_IN_PIN_CHNG)
209 209
210 210
211/* 211/*
@@ -217,7 +217,7 @@
217#define M_DUART_OPC2_SEL _SB_MAKEMASK1(1) 217#define M_DUART_OPC2_SEL _SB_MAKEMASK1(1)
218#define M_DUART_OPCR_RESERVED1 _SB_MAKEMASK1(2) /* must be zero */ 218#define M_DUART_OPCR_RESERVED1 _SB_MAKEMASK1(2) /* must be zero */
219#define M_DUART_OPC3_SEL _SB_MAKEMASK1(3) 219#define M_DUART_OPC3_SEL _SB_MAKEMASK1(3)
220#define M_DUART_OPCR_RESERVED2 _SB_MAKEMASK(4,4) /* must be zero */ 220#define M_DUART_OPCR_RESERVED2 _SB_MAKEMASK(4, 4) /* must be zero */
221 221
222/* 222/*
223 * DUART Aux Control Register (Table 10-15) 223 * DUART Aux Control Register (Table 10-15)
@@ -228,7 +228,7 @@
228#define M_DUART_IP1_CHNG_ENA _SB_MAKEMASK1(1) 228#define M_DUART_IP1_CHNG_ENA _SB_MAKEMASK1(1)
229#define M_DUART_IP2_CHNG_ENA _SB_MAKEMASK1(2) 229#define M_DUART_IP2_CHNG_ENA _SB_MAKEMASK1(2)
230#define M_DUART_IP3_CHNG_ENA _SB_MAKEMASK1(3) 230#define M_DUART_IP3_CHNG_ENA _SB_MAKEMASK1(3)
231#define M_DUART_ACR_RESERVED _SB_MAKEMASK(4,4) 231#define M_DUART_ACR_RESERVED _SB_MAKEMASK(4, 4)
232 232
233#define M_DUART_CTS_CHNG_ENA _SB_MAKEMASK1(0) 233#define M_DUART_CTS_CHNG_ENA _SB_MAKEMASK1(0)
234#define M_DUART_CIN_CHNG_ENA _SB_MAKEMASK1(2) 234#define M_DUART_CIN_CHNG_ENA _SB_MAKEMASK1(2)
@@ -242,18 +242,18 @@
242 242
243#define S_DUART_ISR_RX_A 1 243#define S_DUART_ISR_RX_A 1
244#define M_DUART_ISR_RX_A _SB_MAKEMASK1(S_DUART_ISR_RX_A) 244#define M_DUART_ISR_RX_A _SB_MAKEMASK1(S_DUART_ISR_RX_A)
245#define V_DUART_ISR_RX_A(x) _SB_MAKEVALUE(x,S_DUART_ISR_RX_A) 245#define V_DUART_ISR_RX_A(x) _SB_MAKEVALUE(x, S_DUART_ISR_RX_A)
246#define G_DUART_ISR_RX_A(x) _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A) 246#define G_DUART_ISR_RX_A(x) _SB_GETVALUE(x, S_DUART_ISR_RX_A, M_DUART_ISR_RX_A)
247 247
248#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2) 248#define M_DUART_ISR_BRK_A _SB_MAKEMASK1(2)
249#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3) 249#define M_DUART_ISR_IN_A _SB_MAKEMASK1(3)
250#define M_DUART_ISR_ALL_A _SB_MAKEMASK(4,0) 250#define M_DUART_ISR_ALL_A _SB_MAKEMASK(4, 0)
251 251
252#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4) 252#define M_DUART_ISR_TX_B _SB_MAKEMASK1(4)
253#define M_DUART_ISR_RX_B _SB_MAKEMASK1(5) 253#define M_DUART_ISR_RX_B _SB_MAKEMASK1(5)
254#define M_DUART_ISR_BRK_B _SB_MAKEMASK1(6) 254#define M_DUART_ISR_BRK_B _SB_MAKEMASK1(6)
255#define M_DUART_ISR_IN_B _SB_MAKEMASK1(7) 255#define M_DUART_ISR_IN_B _SB_MAKEMASK1(7)
256#define M_DUART_ISR_ALL_B _SB_MAKEMASK(4,4) 256#define M_DUART_ISR_ALL_B _SB_MAKEMASK(4, 4)
257 257
258/* 258/*
259 * DUART Channel A Interrupt Status Register (Table 10-17) 259 * DUART Channel A Interrupt Status Register (Table 10-17)
@@ -266,8 +266,8 @@
266#define M_DUART_ISR_RX _SB_MAKEMASK1(1) 266#define M_DUART_ISR_RX _SB_MAKEMASK1(1)
267#define M_DUART_ISR_BRK _SB_MAKEMASK1(2) 267#define M_DUART_ISR_BRK _SB_MAKEMASK1(2)
268#define M_DUART_ISR_IN _SB_MAKEMASK1(3) 268#define M_DUART_ISR_IN _SB_MAKEMASK1(3)
269#define M_DUART_ISR_ALL _SB_MAKEMASK(4,0) 269#define M_DUART_ISR_ALL _SB_MAKEMASK(4, 0)
270#define M_DUART_ISR_RESERVED _SB_MAKEMASK(4,4) 270#define M_DUART_ISR_RESERVED _SB_MAKEMASK(4, 4)
271 271
272/* 272/*
273 * DUART Interrupt Mask Register (Table 10-19) 273 * DUART Interrupt Mask Register (Table 10-19)
@@ -278,13 +278,13 @@
278#define M_DUART_IMR_RX_A _SB_MAKEMASK1(1) 278#define M_DUART_IMR_RX_A _SB_MAKEMASK1(1)
279#define M_DUART_IMR_BRK_A _SB_MAKEMASK1(2) 279#define M_DUART_IMR_BRK_A _SB_MAKEMASK1(2)
280#define M_DUART_IMR_IN_A _SB_MAKEMASK1(3) 280#define M_DUART_IMR_IN_A _SB_MAKEMASK1(3)
281#define M_DUART_IMR_ALL_A _SB_MAKEMASK(4,0) 281#define M_DUART_IMR_ALL_A _SB_MAKEMASK(4, 0)
282 282
283#define M_DUART_IMR_TX_B _SB_MAKEMASK1(4) 283#define M_DUART_IMR_TX_B _SB_MAKEMASK1(4)
284#define M_DUART_IMR_RX_B _SB_MAKEMASK1(5) 284#define M_DUART_IMR_RX_B _SB_MAKEMASK1(5)
285#define M_DUART_IMR_BRK_B _SB_MAKEMASK1(6) 285#define M_DUART_IMR_BRK_B _SB_MAKEMASK1(6)
286#define M_DUART_IMR_IN_B _SB_MAKEMASK1(7) 286#define M_DUART_IMR_IN_B _SB_MAKEMASK1(7)
287#define M_DUART_IMR_ALL_B _SB_MAKEMASK(4,4) 287#define M_DUART_IMR_ALL_B _SB_MAKEMASK(4, 4)
288 288
289/* 289/*
290 * DUART Channel A Interrupt Mask Register (Table 10-20) 290 * DUART Channel A Interrupt Mask Register (Table 10-20)
@@ -297,8 +297,8 @@
297#define M_DUART_IMR_RX _SB_MAKEMASK1(1) 297#define M_DUART_IMR_RX _SB_MAKEMASK1(1)
298#define M_DUART_IMR_BRK _SB_MAKEMASK1(2) 298#define M_DUART_IMR_BRK _SB_MAKEMASK1(2)
299#define M_DUART_IMR_IN _SB_MAKEMASK1(3) 299#define M_DUART_IMR_IN _SB_MAKEMASK1(3)
300#define M_DUART_IMR_ALL _SB_MAKEMASK(4,0) 300#define M_DUART_IMR_ALL _SB_MAKEMASK(4, 0)
301#define M_DUART_IMR_RESERVED _SB_MAKEMASK(4,4) 301#define M_DUART_IMR_RESERVED _SB_MAKEMASK(4, 4)
302 302
303 303
304/* 304/*
@@ -310,7 +310,7 @@
310#define M_DUART_SET_OPR1 _SB_MAKEMASK1(1) 310#define M_DUART_SET_OPR1 _SB_MAKEMASK1(1)
311#define M_DUART_SET_OPR2 _SB_MAKEMASK1(2) 311#define M_DUART_SET_OPR2 _SB_MAKEMASK1(2)
312#define M_DUART_SET_OPR3 _SB_MAKEMASK1(3) 312#define M_DUART_SET_OPR3 _SB_MAKEMASK1(3)
313#define M_DUART_OPSR_RESERVED _SB_MAKEMASK(4,4) 313#define M_DUART_OPSR_RESERVED _SB_MAKEMASK(4, 4)
314 314
315/* 315/*
316 * DUART Output Port Clear Register (Table 10-23) 316 * DUART Output Port Clear Register (Table 10-23)
@@ -321,7 +321,7 @@
321#define M_DUART_CLR_OPR1 _SB_MAKEMASK1(1) 321#define M_DUART_CLR_OPR1 _SB_MAKEMASK1(1)
322#define M_DUART_CLR_OPR2 _SB_MAKEMASK1(2) 322#define M_DUART_CLR_OPR2 _SB_MAKEMASK1(2)
323#define M_DUART_CLR_OPR3 _SB_MAKEMASK1(3) 323#define M_DUART_CLR_OPR3 _SB_MAKEMASK1(3)
324#define M_DUART_OPCR_RESERVED _SB_MAKEMASK(4,4) 324#define M_DUART_OPCR_RESERVED _SB_MAKEMASK(4, 4)
325 325
326/* 326/*
327 * DUART Output Port RTS Register (Table 10-24) 327 * DUART Output Port RTS Register (Table 10-24)
@@ -332,7 +332,7 @@
332#define M_DUART_OUT_PIN_SET1 _SB_MAKEMASK1(1) 332#define M_DUART_OUT_PIN_SET1 _SB_MAKEMASK1(1)
333#define M_DUART_OUT_PIN_CLR0 _SB_MAKEMASK1(2) 333#define M_DUART_OUT_PIN_CLR0 _SB_MAKEMASK1(2)
334#define M_DUART_OUT_PIN_CLR1 _SB_MAKEMASK1(3) 334#define M_DUART_OUT_PIN_CLR1 _SB_MAKEMASK1(3)
335#define M_DUART_OPRR_RESERVED _SB_MAKEMASK(4,4) 335#define M_DUART_OPRR_RESERVED _SB_MAKEMASK(4, 4)
336 336
337#define M_DUART_OUT_PIN_SET(chan) \ 337#define M_DUART_OUT_PIN_SET(chan) \
338 (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1) 338 (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
@@ -345,14 +345,14 @@
345 */ 345 */
346 346
347#define S_DUART_SIG_FULL _SB_MAKE64(0) 347#define S_DUART_SIG_FULL _SB_MAKE64(0)
348#define M_DUART_SIG_FULL _SB_MAKEMASK(4,S_DUART_SIG_FULL) 348#define M_DUART_SIG_FULL _SB_MAKEMASK(4, S_DUART_SIG_FULL)
349#define V_DUART_SIG_FULL(x) _SB_MAKEVALUE(x,S_DUART_SIG_FULL) 349#define V_DUART_SIG_FULL(x) _SB_MAKEVALUE(x, S_DUART_SIG_FULL)
350#define G_DUART_SIG_FULL(x) _SB_GETVALUE(x,S_DUART_SIG_FULL,M_DUART_SIG_FULL) 350#define G_DUART_SIG_FULL(x) _SB_GETVALUE(x, S_DUART_SIG_FULL, M_DUART_SIG_FULL)
351 351
352#define S_DUART_INT_TIME _SB_MAKE64(4) 352#define S_DUART_INT_TIME _SB_MAKE64(4)
353#define M_DUART_INT_TIME _SB_MAKEMASK(4,S_DUART_INT_TIME) 353#define M_DUART_INT_TIME _SB_MAKEMASK(4, S_DUART_INT_TIME)
354#define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x,S_DUART_INT_TIME) 354#define V_DUART_INT_TIME(x) _SB_MAKEVALUE(x, S_DUART_INT_TIME)
355#define G_DUART_INT_TIME(x) _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME) 355#define G_DUART_INT_TIME(x) _SB_GETVALUE(x, S_DUART_INT_TIME, M_DUART_INT_TIME)
356#endif /* 1250 PASS2 || 112x PASS1 || 1480 */ 356#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
357 357
358 358
diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
index 2e32949bd674..96e28f18dad1 100644
--- a/include/asm-mips/siginfo.h
+++ b/include/asm-mips/siginfo.h
@@ -106,8 +106,8 @@ typedef struct siginfo {
106#undef SI_TIMER 106#undef SI_TIMER
107#undef SI_MESGQ 107#undef SI_MESGQ
108#define SI_ASYNCIO -2 /* sent by AIO completion */ 108#define SI_ASYNCIO -2 /* sent by AIO completion */
109#define SI_TIMER __SI_CODE(__SI_TIMER,-3) /* sent by timer expiration */ 109#define SI_TIMER __SI_CODE(__SI_TIMER, -3) /* sent by timer expiration */
110#define SI_MESGQ __SI_CODE(__SI_MESGQ,-4) /* sent by real time mesq state change */ 110#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) /* sent by real time mesq state change */
111 111
112#ifdef __KERNEL__ 112#ifdef __KERNEL__
113 113
diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h
index 67c4fe52bb42..0cd719fabb51 100644
--- a/include/asm-mips/sim.h
+++ b/include/asm-mips/sim.h
@@ -18,7 +18,7 @@
18#ifdef CONFIG_32BIT 18#ifdef CONFIG_32BIT
19 19
20#define save_static_function(symbol) \ 20#define save_static_function(symbol) \
21__asm__ ( \ 21__asm__( \
22 ".text\n\t" \ 22 ".text\n\t" \
23 ".globl\t" #symbol "\n\t" \ 23 ".globl\t" #symbol "\n\t" \
24 ".align\t2\n\t" \ 24 ".align\t2\n\t" \
@@ -46,7 +46,7 @@ __asm__ ( \
46#ifdef CONFIG_64BIT 46#ifdef CONFIG_64BIT
47 47
48#define save_static_function(symbol) \ 48#define save_static_function(symbol) \
49__asm__ ( \ 49__asm__( \
50 ".text\n\t" \ 50 ".text\n\t" \
51 ".globl\t" #symbol "\n\t" \ 51 ".globl\t" #symbol "\n\t" \
52 ".align\t2\n\t" \ 52 ".align\t2\n\t" \
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 13aef6af422c..dc770025a9b0 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -60,6 +60,15 @@ extern cpumask_t phys_cpu_present_map;
60 */ 60 */
61extern void core_send_ipi(int cpu, unsigned int action); 61extern void core_send_ipi(int cpu, unsigned int action);
62 62
63static inline void core_send_ipi_mask(cpumask_t mask, unsigned int action)
64{
65 unsigned int i;
66
67 for_each_cpu_mask(i, mask)
68 core_send_ipi(i, action);
69}
70
71
63/* 72/*
64 * Firmware CPU startup hook 73 * Firmware CPU startup hook
65 */ 74 */
diff --git a/include/asm-mips/smtc_ipi.h b/include/asm-mips/smtc_ipi.h
index a52a4a7a36e0..e09131a6127d 100644
--- a/include/asm-mips/smtc_ipi.h
+++ b/include/asm-mips/smtc_ipi.h
@@ -34,6 +34,7 @@ struct smtc_ipi {
34 34
35#define LINUX_SMP_IPI 1 35#define LINUX_SMP_IPI 1
36#define SMTC_CLOCK_TICK 2 36#define SMTC_CLOCK_TICK 2
37#define IRQ_AFFINITY_IPI 3
37 38
38/* 39/*
39 * A queue of IPI messages 40 * A queue of IPI messages
diff --git a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
index 8fa0af6b68d2..fec9bdd34913 100644
--- a/include/asm-mips/sn/addrs.h
+++ b/include/asm-mips/sn/addrs.h
@@ -50,7 +50,7 @@
50#define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK) 50#define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK)
51 51
52#define CHANGE_ADDR_NASID(_pa, _nasid) \ 52#define CHANGE_ADDR_NASID(_pa, _nasid) \
53 ((UINT64_CAST (_pa) & ~NASID_MASK) | \ 53 ((UINT64_CAST(_pa) & ~NASID_MASK) | \
54 (UINT64_CAST(_nasid) << NASID_SHFT)) 54 (UINT64_CAST(_nasid) << NASID_SHFT))
55 55
56 56
@@ -75,7 +75,7 @@
75 75
76 76
77#define RAW_NODE_SWIN_BASE(nasid, widget) \ 77#define RAW_NODE_SWIN_BASE(nasid, widget) \
78 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) 78 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
79 79
80#define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff)) 80#define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff))
81 81
@@ -192,31 +192,31 @@
192#define BDDIR_ENTRY_LO(_pa) ((HSPEC_BASE + \ 192#define BDDIR_ENTRY_LO(_pa) ((HSPEC_BASE + \
193 NODE_ADDRSPACE_SIZE * 3 / 4 + \ 193 NODE_ADDRSPACE_SIZE * 3 / 4 + \
194 0x200) | \ 194 0x200) | \
195 UINT64_CAST (_pa) & NASID_MASK | \ 195 UINT64_CAST(_pa) & NASID_MASK | \
196 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \ 196 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \
197 UINT64_CAST (_pa) >> 3 & 0x1f << 4) 197 UINT64_CAST(_pa) >> 3 & 0x1f << 4)
198 198
199#define BDDIR_ENTRY_HI(_pa) ((HSPEC_BASE + \ 199#define BDDIR_ENTRY_HI(_pa) ((HSPEC_BASE + \
200 NODE_ADDRSPACE_SIZE * 3 / 4 + \ 200 NODE_ADDRSPACE_SIZE * 3 / 4 + \
201 0x208) | \ 201 0x208) | \
202 UINT64_CAST (_pa) & NASID_MASK | \ 202 UINT64_CAST(_pa) & NASID_MASK | \
203 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \ 203 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \
204 UINT64_CAST (_pa) >> 3 & 0x1f << 4) 204 UINT64_CAST(_pa) >> 3 & 0x1f << 4)
205 205
206#define BDPRT_ENTRY(_pa, _rgn) ((HSPEC_BASE + \ 206#define BDPRT_ENTRY(_pa, _rgn) ((HSPEC_BASE + \
207 NODE_ADDRSPACE_SIZE * 3 / 4) | \ 207 NODE_ADDRSPACE_SIZE * 3 / 4) | \
208 UINT64_CAST (_pa) & NASID_MASK | \ 208 UINT64_CAST(_pa) & NASID_MASK | \
209 UINT64_CAST (_pa) >> 2 & BDDIR_UPPER_MASK | \ 209 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \
210 (_rgn) << 3) 210 (_rgn) << 3)
211#define BDPRT_ENTRY_ADDR(_pa,_rgn) (BDPRT_ENTRY((_pa),(_rgn))) 211#define BDPRT_ENTRY_ADDR(_pa, _rgn) (BDPRT_ENTRY((_pa), (_rgn)))
212#define BDPRT_ENTRY_S(_pa,_rgn,_val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn))=(_val)) 212#define BDPRT_ENTRY_S(_pa, _rgn, _val) (*(__psunsigned_t *)BDPRT_ENTRY((_pa), (_rgn))=(_val))
213#define BDPRT_ENTRY_L(_pa,_rgn) (*(__psunsigned_t *)BDPRT_ENTRY((_pa),(_rgn))) 213#define BDPRT_ENTRY_L(_pa, _rgn) (*(__psunsigned_t *)BDPRT_ENTRY((_pa), (_rgn)))
214 214
215#define BDECC_ENTRY(_pa) ((HSPEC_BASE + \ 215#define BDECC_ENTRY(_pa) ((HSPEC_BASE + \
216 NODE_ADDRSPACE_SIZE / 2) | \ 216 NODE_ADDRSPACE_SIZE / 2) | \
217 UINT64_CAST (_pa) & NASID_MASK | \ 217 UINT64_CAST(_pa) & NASID_MASK | \
218 UINT64_CAST (_pa) >> 2 & BDECC_UPPER_MASK | \ 218 UINT64_CAST(_pa) >> 2 & BDECC_UPPER_MASK | \
219 UINT64_CAST (_pa) >> 3 & 3) 219 UINT64_CAST(_pa) >> 3 & 3)
220 220
221/* 221/*
222 * Macro to convert a back door directory or protection address into the 222 * Macro to convert a back door directory or protection address into the
@@ -225,16 +225,16 @@
225#define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0) 225#define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0)
226#define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0) 226#define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0)
227 227
228#define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ 228#define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
229 (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2 | \ 229 (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2 | \
230 (UINT64_CAST (_ba) & 0x1f << 4) << 3) 230 (UINT64_CAST(_ba) & 0x1f << 4) << 3)
231 231
232#define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ 232#define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
233 (UINT64_CAST (_ba) & BDDIR_UPPER_MASK)<<2) 233 (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2)
234 234
235#define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ 235#define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \
236 (UINT64_CAST (_ba) & BDECC_UPPER_MASK)<<2 | \ 236 (UINT64_CAST(_ba) & BDECC_UPPER_MASK)<<2 | \
237 (UINT64_CAST (_ba) & 3) << 3) 237 (UINT64_CAST(_ba) & 3) << 3)
238#endif /* CONFIG_SGI_IP27 */ 238#endif /* CONFIG_SGI_IP27 */
239 239
240 240
@@ -282,7 +282,7 @@
282 * the base of the register space. 282 * the base of the register space.
283 */ 283 */
284#define HUB_REG_PTR(_base, _off) \ 284#define HUB_REG_PTR(_base, _off) \
285 (HUBREG_CAST ((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) 285 (HUBREG_CAST((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
286 286
287#define HUB_REG_PTR_L(_base, _off) \ 287#define HUB_REG_PTR_L(_base, _off) \
288 HUB_L(HUB_REG_PTR((_base), (_off))) 288 HUB_L(HUB_REG_PTR((_base), (_off)))
diff --git a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h
index da523de628be..bd75945e10ff 100644
--- a/include/asm-mips/sn/arch.h
+++ b/include/asm-mips/sn/arch.h
@@ -19,8 +19,8 @@
19 19
20typedef u64 hubreg_t; 20typedef u64 hubreg_t;
21 21
22#define cputonasid(cpu) (cpu_data[(cpu)].p_nasid) 22#define cputonasid(cpu) (sn_cpu_info[(cpu)].p_nasid)
23#define cputoslice(cpu) (cpu_data[(cpu)].p_slice) 23#define cputoslice(cpu) (sn_cpu_info[(cpu)].p_slice)
24#define makespnum(_nasid, _slice) \ 24#define makespnum(_nasid, _slice) \
25 (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice)) 25 (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice))
26 26
diff --git a/include/asm-mips/sn/io.h b/include/asm-mips/sn/io.h
index ab2fa8cd2627..24c6775fbb0f 100644
--- a/include/asm-mips/sn/io.h
+++ b/include/asm-mips/sn/io.h
@@ -9,7 +9,7 @@
9#ifndef _ASM_SN_IO_H 9#ifndef _ASM_SN_IO_H
10#define _ASM_SN_IO_H 10#define _ASM_SN_IO_H
11 11
12#if defined (CONFIG_SGI_IP27) 12#if defined(CONFIG_SGI_IP27)
13#include <asm/sn/sn0/hubio.h> 13#include <asm/sn/sn0/hubio.h>
14#endif 14#endif
15 15
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index 82aeb9e322db..96cfd2ab1bcd 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -51,8 +51,8 @@
51 51
52#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35) 52#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35)
53#include <asm/sn/agent.h> 53#include <asm/sn/agent.h>
54#include <asm/arc/types.h> 54#include <asm/fw/arc/types.h>
55#include <asm/arc/hinv.h> 55#include <asm/fw/arc/hinv.h>
56#if defined(CONFIG_SGI_IP35) 56#if defined(CONFIG_SGI_IP35)
57// The hack file has to be before vector and after sn0_fru.... 57// The hack file has to be before vector and after sn0_fru....
58#include <asm/hack.h> 58#include <asm/hack.h>
@@ -405,7 +405,7 @@ typedef struct kl_config_hdr {
405#define KLTYPE(_x) ((_x) & KLTYPE_MASK) 405#define KLTYPE(_x) ((_x) & KLTYPE_MASK)
406#define IS_MIO_PRESENT(l) ((l->brd_type == KLTYPE_BASEIO) && \ 406#define IS_MIO_PRESENT(l) ((l->brd_type == KLTYPE_BASEIO) && \
407 (l->brd_flags & SECOND_NIC_PRESENT)) 407 (l->brd_flags & SECOND_NIC_PRESENT))
408#define IS_MIO_IOC3(l,n) (IS_MIO_PRESENT(l) && (n > 2)) 408#define IS_MIO_IOC3(l, n) (IS_MIO_PRESENT(l) && (n > 2))
409 409
410/* 410/*
411 * board structures 411 * board structures
diff --git a/include/asm-mips/sn/kldir.h b/include/asm-mips/sn/kldir.h
index 0573cbffc104..1327e12e9645 100644
--- a/include/asm-mips/sn/kldir.h
+++ b/include/asm-mips/sn/kldir.h
@@ -140,7 +140,7 @@
140 */ 140 */
141#define SYMMON_STACK_SIZE 0x8000 141#define SYMMON_STACK_SIZE 0x8000
142 142
143#if defined (PROM) 143#if defined(PROM)
144 144
145/* 145/*
146 * These defines are prom version dependent. No code other than the IP27 146 * These defines are prom version dependent. No code other than the IP27
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 9e8cc52910f6..b06190093bbc 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -91,7 +91,7 @@
91 : RAW_NODE_SWIN_BASE(nasid, widget)) 91 : RAW_NODE_SWIN_BASE(nasid, widget))
92#else /* __ASSEMBLY__ */ 92#else /* __ASSEMBLY__ */
93#define NODE_SWIN_BASE(nasid, widget) \ 93#define NODE_SWIN_BASE(nasid, widget) \
94 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) 94 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
95#endif /* __ASSEMBLY__ */ 95#endif /* __ASSEMBLY__ */
96 96
97/* 97/*
@@ -106,7 +106,7 @@
106#define BWIN_WIDGET_MASK 0x7 106#define BWIN_WIDGET_MASK 0x7
107#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) 107#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
108#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ 108#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \
109 (UINT64_CAST (bigwin) << BWIN_SIZE_BITS)) 109 (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
110 110
111#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) 111#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
112#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) 112#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
@@ -259,7 +259,7 @@
259 * CACHE_ERR_SP_PTR could either contain an address to the stack, or 259 * CACHE_ERR_SP_PTR could either contain an address to the stack, or
260 * the stack could start at CACHE_ERR_SP_PTR 260 * the stack could start at CACHE_ERR_SP_PTR
261 */ 261 */
262#if defined (HUB_ERR_STS_WAR) 262#if defined(HUB_ERR_STS_WAR)
263#define CACHE_ERR_EFRAME 0x480 263#define CACHE_ERR_EFRAME 0x480
264#else /* HUB_ERR_STS_WAR */ 264#else /* HUB_ERR_STS_WAR */
265#define CACHE_ERR_EFRAME 0x400 265#define CACHE_ERR_EFRAME 0x400
@@ -275,7 +275,7 @@
275 275
276#define _ARCSPROM 276#define _ARCSPROM
277 277
278#if defined (HUB_ERR_STS_WAR) 278#if defined(HUB_ERR_STS_WAR)
279 279
280#define ERR_STS_WAR_REGISTER IIO_IIBUSERR 280#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
281#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) 281#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR)
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index ddaf36a1e389..4d43dbb7f8b8 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -194,17 +194,17 @@ extern unsigned int sni_brd_type;
194#define PCIMT_INT_ACKNOWLEDGE 0xba000000 194#define PCIMT_INT_ACKNOWLEDGE 0xba000000
195 195
196/* board specific init functions */ 196/* board specific init functions */
197extern void sni_a20r_init (void); 197extern void sni_a20r_init(void);
198extern void sni_pcit_init (void); 198extern void sni_pcit_init(void);
199extern void sni_rm200_init (void); 199extern void sni_rm200_init(void);
200extern void sni_pcimt_init (void); 200extern void sni_pcimt_init(void);
201 201
202/* board specific irq init functions */ 202/* board specific irq init functions */
203extern void sni_a20r_irq_init (void); 203extern void sni_a20r_irq_init(void);
204extern void sni_pcit_irq_init (void); 204extern void sni_pcit_irq_init(void);
205extern void sni_pcit_cplus_irq_init (void); 205extern void sni_pcit_cplus_irq_init(void);
206extern void sni_rm200_irq_init (void); 206extern void sni_rm200_irq_init(void);
207extern void sni_pcimt_irq_init (void); 207extern void sni_pcimt_irq_init(void);
208 208
209/* timer inits */ 209/* timer inits */
210extern void sni_cpu_time_init(void); 210extern void sni_cpu_time_init(void);
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index ed33366b85b8..fb41a8d76392 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -91,14 +91,14 @@
91#else 91#else
92 MFC0 k0, CP0_CONTEXT 92 MFC0 k0, CP0_CONTEXT
93#endif 93#endif
94#if defined(CONFIG_BUILD_ELF64) || (defined(CONFIG_64BIT) && __GNUC__ < 4) 94#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
95 lui k1, %hi(kernelsp)
96#else
95 lui k1, %highest(kernelsp) 97 lui k1, %highest(kernelsp)
96 daddiu k1, %higher(kernelsp) 98 daddiu k1, %higher(kernelsp)
97 dsll k1, 16 99 dsll k1, 16
98 daddiu k1, %hi(kernelsp) 100 daddiu k1, %hi(kernelsp)
99 dsll k1, 16 101 dsll k1, 16
100#else
101 lui k1, %hi(kernelsp)
102#endif 102#endif
103 LONG_SRL k0, PTEBASE_SHIFT 103 LONG_SRL k0, PTEBASE_SHIFT
104 LONG_ADDU k1, k0 104 LONG_ADDU k1, k0
@@ -116,14 +116,14 @@
116 .endm 116 .endm
117#else 117#else
118 .macro get_saved_sp /* Uniprocessor variation */ 118 .macro get_saved_sp /* Uniprocessor variation */
119#if defined(CONFIG_BUILD_ELF64) || (defined(CONFIG_64BIT) && __GNUC__ < 4) 119#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
120 lui k1, %hi(kernelsp)
121#else
120 lui k1, %highest(kernelsp) 122 lui k1, %highest(kernelsp)
121 daddiu k1, %higher(kernelsp) 123 daddiu k1, %higher(kernelsp)
122 dsll k1, k1, 16 124 dsll k1, k1, 16
123 daddiu k1, %hi(kernelsp) 125 daddiu k1, %hi(kernelsp)
124 dsll k1, k1, 16 126 dsll k1, k1, 16
125#else
126 lui k1, %hi(kernelsp)
127#endif 127#endif
128 LONG_L k1, %lo(kernelsp)(k1) 128 LONG_L k1, %lo(kernelsp)(k1)
129 .endm 129 .endm
@@ -393,11 +393,11 @@
393 * and disable interrupts only for the 393 * and disable interrupts only for the
394 * current TC, using the TCStatus register. 394 * current TC, using the TCStatus register.
395 */ 395 */
396 mfc0 t0,CP0_TCSTATUS 396 mfc0 t0, CP0_TCSTATUS
397 /* Fortunately CU 0 is in the same place in both registers */ 397 /* Fortunately CU 0 is in the same place in both registers */
398 /* Set TCU0, TMX, TKSU (for later inversion) and IXMT */ 398 /* Set TCU0, TMX, TKSU (for later inversion) and IXMT */
399 li t1, ST0_CU0 | 0x08001c00 399 li t1, ST0_CU0 | 0x08001c00
400 or t0,t1 400 or t0, t1
401 /* Clear TKSU, leave IXMT */ 401 /* Clear TKSU, leave IXMT */
402 xori t0, 0x00001800 402 xori t0, 0x00001800
403 mtc0 t0, CP0_TCSTATUS 403 mtc0 t0, CP0_TCSTATUS
@@ -429,11 +429,11 @@
429 * current TC, using the TCStatus register. 429 * current TC, using the TCStatus register.
430 */ 430 */
431 _ehb 431 _ehb
432 mfc0 t0,CP0_TCSTATUS 432 mfc0 t0, CP0_TCSTATUS
433 /* Fortunately CU 0 is in the same place in both registers */ 433 /* Fortunately CU 0 is in the same place in both registers */
434 /* Set TCU0, TKSU (for later inversion) and IXMT */ 434 /* Set TCU0, TKSU (for later inversion) and IXMT */
435 li t1, ST0_CU0 | 0x08001c00 435 li t1, ST0_CU0 | 0x08001c00
436 or t0,t1 436 or t0, t1
437 /* Clear TKSU *and* IXMT */ 437 /* Clear TKSU *and* IXMT */
438 xori t0, 0x00001c00 438 xori t0, 0x00001c00
439 mtc0 t0, CP0_TCSTATUS 439 mtc0 t0, CP0_TCSTATUS
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 480b574e2483..90e4b403f531 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -62,7 +62,7 @@ do { \
62#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) 62#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
63#endif 63#endif
64 64
65#define switch_to(prev,next,last) \ 65#define switch_to(prev, next, last) \
66do { \ 66do { \
67 __mips_mt_fpaff_switch_to(prev); \ 67 __mips_mt_fpaff_switch_to(prev); \
68 if (cpu_has_dsp) \ 68 if (cpu_has_dsp) \
@@ -193,13 +193,13 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
193 return x; 193 return x;
194} 194}
195 195
196#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) 196#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
197 197
198extern void set_handler (unsigned long offset, void *addr, unsigned long len); 198extern void set_handler(unsigned long offset, void *addr, unsigned long len);
199extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len); 199extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
200 200
201typedef void (*vi_handler_t)(void); 201typedef void (*vi_handler_t)(void);
202extern void *set_vi_handler (int n, vi_handler_t addr); 202extern void *set_vi_handler(int n, vi_handler_t addr);
203 203
204extern void *set_except_vector(int n, void *addr); 204extern void *set_except_vector(int n, void *addr);
205extern unsigned long ebase; 205extern unsigned long ebase;
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index a632cef830a2..35555bd5c52d 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -26,15 +26,13 @@
26extern spinlock_t rtc_lock; 26extern spinlock_t rtc_lock;
27 27
28/* 28/*
29 * RTC ops. By default, they point to no-RTC functions. 29 * RTC ops. By default, they point to weak no-op RTC functions.
30 * rtc_mips_get_time - mktime(year, mon, day, hour, min, sec) in seconds.
31 * rtc_mips_set_time - reverse the above translation and set time to RTC. 30 * rtc_mips_set_time - reverse the above translation and set time to RTC.
32 * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need 31 * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
33 * to be set. Used by RTC sync-up. 32 * to be set. Used by RTC sync-up.
34 */ 33 */
35extern unsigned long (*rtc_mips_get_time)(void); 34extern int rtc_mips_set_time(unsigned long);
36extern int (*rtc_mips_set_time)(unsigned long); 35extern int rtc_mips_set_mmss(unsigned long);
37extern int (*rtc_mips_set_mmss)(unsigned long);
38 36
39/* 37/*
40 * Timer interrupt functions. 38 * Timer interrupt functions.
@@ -51,35 +49,15 @@ extern void (*mips_timer_ack)(void);
51extern struct clocksource clocksource_mips; 49extern struct clocksource clocksource_mips;
52 50
53/* 51/*
54 * to_tm() converts system time back to (year, mon, day, hour, min, sec).
55 * It is intended to help implement rtc_set_time() functions.
56 * Copied from PPC implementation.
57 */
58extern void to_tm(unsigned long tim, struct rtc_time *tm);
59
60/*
61 * high-level timer interrupt routines.
62 */
63extern irqreturn_t timer_interrupt(int irq, void *dev_id);
64
65/*
66 * the corresponding low-level timer interrupt routine.
67 */
68extern asmlinkage void ll_timer_interrupt(int irq);
69
70/*
71 * profiling and process accouting is done separately in local_timer_interrupt 52 * profiling and process accouting is done separately in local_timer_interrupt
72 */ 53 */
73extern void local_timer_interrupt(int irq, void *dev_id); 54extern void local_timer_interrupt(int irq, void *dev_id);
74extern asmlinkage void ll_local_timer_interrupt(int irq);
75 55
76/* 56/*
77 * board specific routines required by time_init(). 57 * board specific routines required by time_init().
78 * board_time_init is defaulted to NULL and can remain so.
79 * plat_timer_setup must be setup properly in machine setup routine.
80 */ 58 */
81struct irqaction; 59struct irqaction;
82extern void (*board_time_init)(void); 60extern void plat_time_init(void);
83extern void plat_timer_setup(struct irqaction *irq); 61extern void plat_timer_setup(struct irqaction *irq);
84 62
85/* 63/*
@@ -89,4 +67,15 @@ extern void plat_timer_setup(struct irqaction *irq);
89 */ 67 */
90extern unsigned int mips_hpt_frequency; 68extern unsigned int mips_hpt_frequency;
91 69
70/*
71 * The performance counter IRQ on MIPS is a close relative to the timer IRQ
72 * so it lives here.
73 */
74extern int (*perf_irq)(void);
75
76/*
77 * Initialize the calling CPU's compare interrupt as clockevent device
78 */
79extern void mips_clockevent_init(void);
80
92#endif /* _ASM_TIME_H */ 81#endif /* _ASM_TIME_H */
diff --git a/include/asm-mips/timex.h b/include/asm-mips/timex.h
index b80de8e0fbbd..87c68ae76ff8 100644
--- a/include/asm-mips/timex.h
+++ b/include/asm-mips/timex.h
@@ -48,7 +48,7 @@
48 48
49typedef unsigned int cycles_t; 49typedef unsigned int cycles_t;
50 50
51static inline cycles_t get_cycles (void) 51static inline cycles_t get_cycles(void)
52{ 52{
53 return read_c0_count(); 53 return read_c0_count();
54} 54}
diff --git a/include/asm-mips/tlbflush.h b/include/asm-mips/tlbflush.h
index 276be77c3e85..730e841fb08a 100644
--- a/include/asm-mips/tlbflush.h
+++ b/include/asm-mips/tlbflush.h
@@ -37,10 +37,10 @@ extern void flush_tlb_one(unsigned long vaddr);
37 37
38#define flush_tlb_all() local_flush_tlb_all() 38#define flush_tlb_all() local_flush_tlb_all()
39#define flush_tlb_mm(mm) local_flush_tlb_mm(mm) 39#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
40#define flush_tlb_range(vma,vmaddr,end) local_flush_tlb_range(vma, vmaddr, end) 40#define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, end)
41#define flush_tlb_kernel_range(vmaddr,end) \ 41#define flush_tlb_kernel_range(vmaddr,end) \
42 local_flush_tlb_kernel_range(vmaddr, end) 42 local_flush_tlb_kernel_range(vmaddr, end)
43#define flush_tlb_page(vma,page) local_flush_tlb_page(vma, page) 43#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
44#define flush_tlb_one(vaddr) local_flush_tlb_one(vaddr) 44#define flush_tlb_one(vaddr) local_flush_tlb_one(vaddr)
45 45
46#endif /* CONFIG_SMP */ 46#endif /* CONFIG_SMP */
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/tx4927/toshiba_rbtx4927.h
index a60649569c2c..b188a659ce02 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/tx4927/toshiba_rbtx4927.h
@@ -28,24 +28,20 @@
28#define __ASM_TX4927_TOSHIBA_RBTX4927_H 28#define __ASM_TX4927_TOSHIBA_RBTX4927_H
29 29
30#include <asm/tx4927/tx4927.h> 30#include <asm/tx4927/tx4927.h>
31#include <asm/tx4927/tx4927_mips.h>
32#ifdef CONFIG_PCI 31#ifdef CONFIG_PCI
33#include <asm/tx4927/tx4927_pci.h> 32#include <asm/tx4927/tx4927_pci.h>
34#endif 33#endif
35 34
36#define TOSHIBA_RBTX4927_WR08(a,b) do { TX4927_WR08(a,b); wbflush(); } while ( 0 )
37
38
39#ifdef CONFIG_PCI 35#ifdef CONFIG_PCI
40#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO 36#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
41#else 37#else
42#define TBTX4927_ISA_IO_OFFSET 0 38#define TBTX4927_ISA_IO_OFFSET 0
43#endif 39#endif
44 40
45#define RBTX4927_SW_RESET_DO 0xbc00f000 41#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
46#define RBTX4927_SW_RESET_DO_SET 0x01 42#define RBTX4927_SW_RESET_DO_SET 0x01
47 43
48#define RBTX4927_SW_RESET_ENABLE 0xbc00f002 44#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
49#define RBTX4927_SW_RESET_ENABLE_SET 0x01 45#define RBTX4927_SW_RESET_ENABLE_SET 0x01
50 46
51 47
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
index 4bd4368e188c..193e80a17c12 100644
--- a/include/asm-mips/tx4927/tx4927.h
+++ b/include/asm-mips/tx4927/tx4927.h
@@ -27,447 +27,8 @@
27#ifndef __ASM_TX4927_TX4927_H 27#ifndef __ASM_TX4927_TX4927_H
28#define __ASM_TX4927_TX4927_H 28#define __ASM_TX4927_TX4927_H
29 29
30#include <asm/tx4927/tx4927_mips.h>
31#include <asm/txx9irq.h> 30#include <asm/txx9irq.h>
32 31
33/*
34 This register naming came from the integrated CPU/controller name TX4927
35 followed by the device name from table 4.2.2 on page 4-3 and then followed
36 by the register name from table 4.2.3 on pages 4-4 to 4-8. The manaul
37 used was "TMPR4927BT Preliminary Rev 0.1 20.Jul.2001".
38 */
39
40#define TX4927_SIO_0_BASE
41
42/* TX4927 controller */
43#define TX4927_BASE 0xfff1f0000
44#define TX4927_BASE 0xfff1f0000
45#define TX4927_LIMIT 0xfff1fffff
46
47
48/* TX4927 SDRAM controller (64-bit registers) */
49#define TX4927_SDRAMC_BASE 0x8000
50#define TX4927_SDRAMC_SDCCR0 0x8000
51#define TX4927_SDRAMC_SDCCR1 0x8008
52#define TX4927_SDRAMC_SDCCR2 0x8010
53#define TX4927_SDRAMC_SDCCR3 0x8018
54#define TX4927_SDRAMC_SDCTR 0x8040
55#define TX4927_SDRAMC_SDCMD 0x8058
56#define TX4927_SDRAMC_LIMIT 0x8fff
57
58
59/* TX4927 external bus controller (64-bit registers) */
60#define TX4927_EBUSC_BASE 0x9000
61#define TX4927_EBUSC_EBCCR0 0x9000
62#define TX4927_EBUSC_EBCCR1 0x9008
63#define TX4927_EBUSC_EBCCR2 0x9010
64#define TX4927_EBUSC_EBCCR3 0x9018
65#define TX4927_EBUSC_EBCCR4 0x9020
66#define TX4927_EBUSC_EBCCR5 0x9028
67#define TX4927_EBUSC_EBCCR6 0x9030
68#define TX4927_EBUSC_EBCCR7 0x9008
69#define TX4927_EBUSC_LIMIT 0x9fff
70
71
72/* TX4927 SDRRAM Error Check Correction (64-bit registers) */
73#define TX4927_ECC_BASE 0xa000
74#define TX4927_ECC_ECCCR 0xa000
75#define TX4927_ECC_ECCSR 0xa008
76#define TX4927_ECC_LIMIT 0xafff
77
78
79/* TX4927 DMA Controller (64-bit registers) */
80#define TX4927_DMAC_BASE 0xb000
81#define TX4927_DMAC_TBD 0xb000
82#define TX4927_DMAC_LIMIT 0xbfff
83
84
85/* TX4927 PCI Controller (32-bit registers) */
86#define TX4927_PCIC_BASE 0xd000
87#define TX4927_PCIC_TBD 0xb000
88#define TX4927_PCIC_LIMIT 0xdfff
89
90
91/* TX4927 Configuration registers (64-bit registers) */
92#define TX4927_CONFIG_BASE 0xe000
93#define TX4927_CONFIG_CCFG 0xe000
94#define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
95#define TX4927_CONFIG_CCFG_WDRST BM_41_41
96#define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
97#define TX4927_CONFIG_CCFG_BCFG BM_39_32
98#define TX4927_CONFIG_CCFG_RESERVED_27_31 BM_31_27
99#define TX4927_CONFIG_CCFG_GTOT BM_26_25
100#define TX4927_CONFIG_CCFG_GTOT_4096 BM_26_25
101#define TX4927_CONFIG_CCFG_GTOT_2048 BM_26_26
102#define TX4927_CONFIG_CCFG_GTOT_1024 BM_25_25
103#define TX4927_CONFIG_CCFG_GTOT_0512 (~BM_26_25)
104#define TX4927_CONFIG_CCFG_TINTDIS BM_24_24
105#define TX4927_CONFIG_CCFG_PCI66 BM_23_23
106#define TX4927_CONFIG_CCFG_PCIMODE BM_22_22
107#define TX4927_CONFIG_CCFG_RESERVED_20_21 BM_21_20
108#define TX4927_CONFIG_CCFG_DIVMODE BM_19_17
109#define TX4927_CONFIG_CCFG_DIVMODE_2_0 BM_19_19
110#define TX4927_CONFIG_CCFG_DIVMODE_3_0 (BM_19_19|BM_17_17)
111#define TX4927_CONFIG_CCFG_DIVMODE_4_0 BM_19_18
112#define TX4927_CONFIG_CCFG_DIVMODE_2_5 BM_19_17
113#define TX4927_CONFIG_CCFG_DIVMODE_8_0 (~BM_19_17)
114#define TX4927_CONFIG_CCFG_DIVMODE_12_0 BM_17_17
115#define TX4927_CONFIG_CCFG_DIVMODE_16_0 BM_18_18
116#define TX4927_CONFIG_CCFG_DIVMODE_10_0 BM_18_17
117#define TX4927_CONFIG_CCFG_BEOW BM_16_16
118#define TX4927_CONFIG_CCFG_WR BM_15_15
119#define TX4927_CONFIG_CCFG_TOE BM_14_14
120#define TX4927_CONFIG_CCFG_PCIARB BM_13_13
121#define TX4927_CONFIG_CCFG_PCIDIVMODE BM_12_11
122#define TX4927_CONFIG_CCFG_RESERVED_08_10 BM_10_08
123#define TX4927_CONFIG_CCFG_SYSSP BM_07_06
124#define TX4927_CONFIG_CCFG_RESERVED_03_05 BM_05_03
125#define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
126#define TX4927_CONFIG_CCFG_ARMODE BM_01_01
127#define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
128#define TX4927_CONFIG_REVID 0xe008
129#define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
130#define TX4927_CONFIG_REVID_PCODE BM_16_31
131#define TX4927_CONFIG_REVID_MJERREV BM_12_15
132#define TX4927_CONFIG_REVID_MINEREV BM_08_11
133#define TX4927_CONFIG_REVID_MJREV BM_04_07
134#define TX4927_CONFIG_REVID_MINREV BM_00_03
135#define TX4927_CONFIG_PCFG 0xe010
136#define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
137#define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
138#define TX4927_CONFIG_PCFG_DRVCB BM_55_55
139#define TX4927_CONFIG_PCFG_DRVDQM BM_54_54
140#define TX4927_CONFIG_PCFG_DRVADDR BM_53_53
141#define TX4927_CONFIG_PCFG_DRVCKE BM_52_52
142#define TX4927_CONFIG_PCFG_DRVRAS BM_51_51
143#define TX4927_CONFIG_PCFG_DRVCAS BM_50_50
144#define TX4927_CONFIG_PCFG_DRVWE BM_49_49
145#define TX4927_CONFIG_PCFG_DRVCS3 BM_48_48
146#define TX4927_CONFIG_PCFG_DRVCS2 BM_47_47
147#define TX4927_CONFIG_PCFG_DRVCS1 BM_46_4k
148#define TX4927_CONFIG_PCFG_DRVCS0 BM_45_45
149#define TX4927_CONFIG_PCFG_DRVCK3 BM_44_44
150#define TX4927_CONFIG_PCFG_DRVCK2 BM_43_43
151#define TX4927_CONFIG_PCFG_DRVCK1 BM_42_42
152#define TX4927_CONFIG_PCFG_DRVCK0 BM_41_41
153#define TX4927_CONFIG_PCFG_DRVCKIN BM_40_40
154#define TX4927_CONFIG_PCFG_RESERVED_33_39 BM_33_39
155#define TX4927_CONFIG_PCFG_BYPASS_PLL BM_32_32
156#define TX4927_CONFIG_PCFG_RESERVED_30_31 BM_30_31
157#define TX4927_CONFIG_PCFG_SDCLKDLY BM_28_29
158#define TX4927_CONFIG_PCFG_SDCLKDLY_DELAY_1 (~BM_28_29)
159#define TX4927_CONFIG_PCFG_SDCLKDLY_DELAY_2 BM_28_28
160#define TX4927_CONFIG_PCFG_SDCLKDLY_DELAY_3 BM_29_29
161#define TX4927_CONFIG_PCFG_SDCLKDLY_DELAY_4 BM_28_29
162#define TX4927_CONFIG_PCFG_SYSCLKEN BM_27_27
163#define TX4927_CONFIG_PCFG_SDCLKEN3 BM_26_26
164#define TX4927_CONFIG_PCFG_SDCLKEN2 BM_25_25
165#define TX4927_CONFIG_PCFG_SDCLKEN1 BM_24_24
166#define TX4927_CONFIG_PCFG_SDCLKEN0 BM_23_23
167#define TX4927_CONFIG_PCFG_SDCLKINEN BM_22_22
168#define TX4927_CONFIG_PCFG_PCICLKEN5 BM_21_21
169#define TX4927_CONFIG_PCFG_PCICLKEN4 BM_20_20
170#define TX4927_CONFIG_PCFG_PCICLKEN3 BM_19_19
171#define TX4927_CONFIG_PCFG_PCICLKEN2 BM_18_18
172#define TX4927_CONFIG_PCFG_PCICLKEN1 BM_17_17
173#define TX4927_CONFIG_PCFG_PCICLKEN0 BM_16_16
174#define TX4927_CONFIG_PCFG_RESERVED_10_15 BM_10_15
175#define TX4927_CONFIG_PCFG_SEL2 BM_09_09
176#define TX4927_CONFIG_PCFG_SEL1 BM_08_08
177#define TX4927_CONFIG_PCFG_DMASEL3 BM_06_07
178#define TX4927_CONFIG_PCFG_DMASEL3_DMAREQ3 (~BM_06_07)
179#define TX4927_CONFIG_PCFG_DMASEL3_SIO0 BM_06_06
180#define TX4927_CONFIG_PCFG_DMASEL3_ACLC3 BM_07_07
181#define TX4927_CONFIG_PCFG_DMASEL3_ACLC1 BM_06_07
182#define TX4927_CONFIG_PCFG_DMASEL2 BM_06_07
183#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_0_DMAREQ2 (~BM_06_07)
184#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_0_SIO0 BM_06_06
185#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_0_RESERVED_10 BM_07_07
186#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_0_RESERVED_11 BM_06_07
187#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_1_ACLC1 (~BM_06_07)
188#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_1_SIO0 BM_06_06
189#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_1_ACLC2 BM_07_07
190#define TX4927_CONFIG_PCFG_DMASEL2_SEL2_1_ACLC0 BM_06_07
191#define TX4927_CONFIG_PCFG_DMASEL1 BM_02_03
192#define TX4927_CONFIG_PCFG_DMASEL1_DMAREQ1 (~BM_02_03)
193#define TX4927_CONFIG_PCFG_DMASEL1_SIO1 BM_02_02
194#define TX4927_CONFIG_PCFG_DMASEL1_ACLC1 BM_03_03
195#define TX4927_CONFIG_PCFG_DMASEL1_ACLC3 BM_02_03
196#define TX4927_CONFIG_PCFG_DMASEL0 BM_00_01
197#define TX4927_CONFIG_PCFG_DMASEL0_DMAREQ0 (~BM_00_01)
198#define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
199#define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
200#define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
201#define TX4927_CONFIG_TOEA 0xe018
202#define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
203#define TX4927_CONFIG_TOEA_TOEA BM_00_35
204#define TX4927_CONFIG_CLKCTR 0xe020
205#define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
206#define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
207#define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
208#define TX4927_CONFIG_CLKCTR_DMACKD BM_23_23
209#define TX4927_CONFIG_CLKCTR_PCICKD BM_22_22
210#define TX4927_CONFIG_CLKCTR_SET_21 BM_21_21
211#define TX4927_CONFIG_CLKCTR_TM0CKD BM_20_20
212#define TX4927_CONFIG_CLKCTR_TM1CKD BM_19_19
213#define TX4927_CONFIG_CLKCTR_TM2CKD BM_18_18
214#define TX4927_CONFIG_CLKCTR_SIO0CKD BM_17_17
215#define TX4927_CONFIG_CLKCTR_SIO1CKD BM_16_16
216#define TX4927_CONFIG_CLKCTR_RESERVED_10_15 BM_10_15
217#define TX4927_CONFIG_CLKCTR_ACLRST BM_09_09
218#define TX4927_CONFIG_CLKCTR_PIORST BM_08_08
219#define TX4927_CONFIG_CLKCTR_DMARST BM_07_07
220#define TX4927_CONFIG_CLKCTR_PCIRST BM_06_06
221#define TX4927_CONFIG_CLKCTR_RESERVED_05_05 BM_05_05
222#define TX4927_CONFIG_CLKCTR_TM0RST BM_04_04
223#define TX4927_CONFIG_CLKCTR_TM1RST BM_03_03
224#define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
225#define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
226#define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
227#define TX4927_CONFIG_GARBC 0xe030
228#define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
229#define TX4927_CONFIG_GARBC_SET_09 BM_09_09
230#define TX4927_CONFIG_GARBC_ARBMD BM_08_08
231#define TX4927_CONFIG_GARBC_RESERVED_06_07 BM_06_07
232#define TX4927_CONFIG_GARBC_PRIORITY_H1 BM_04_05
233#define TX4927_CONFIG_GARBC_PRIORITY_H1_PCI (~BM_04_05)
234#define TX4927_CONFIG_GARBC_PRIORITY_H1_PDMAC BM_04_04
235#define TX4927_CONFIG_GARBC_PRIORITY_H1_DMAC BM_05_05
236#define TX4927_CONFIG_GARBC_PRIORITY_H1_BAD_VALUE BM_04_05
237#define TX4927_CONFIG_GARBC_PRIORITY_H2 BM_02_03
238#define TX4927_CONFIG_GARBC_PRIORITY_H2_PCI (~BM_02_03)
239#define TX4927_CONFIG_GARBC_PRIORITY_H2_PDMAC BM_02_02
240#define TX4927_CONFIG_GARBC_PRIORITY_H2_DMAC BM_03_03
241#define TX4927_CONFIG_GARBC_PRIORITY_H2_BAD_VALUE BM_02_03
242#define TX4927_CONFIG_GARBC_PRIORITY_H3 BM_00_01
243#define TX4927_CONFIG_GARBC_PRIORITY_H3_PCI (~BM_00_01)
244#define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
245#define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
246#define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
247#define TX4927_CONFIG_RAMP 0xe048
248#define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
249#define TX4927_CONFIG_RAMP_RAMP BM_00_19
250#define TX4927_CONFIG_LIMIT 0xefff
251
252
253/* TX4927 Timer 0 (32-bit registers) */
254#define TX4927_TMR0_BASE 0xf000
255#define TX4927_TMR0_TMTCR0 0xf000
256#define TX4927_TMR0_TMTISR0 0xf004
257#define TX4927_TMR0_TMCPRA0 0xf008
258#define TX4927_TMR0_TMCPRB0 0xf00c
259#define TX4927_TMR0_TMITMR0 0xf010
260#define TX4927_TMR0_TMCCDR0 0xf020
261#define TX4927_TMR0_TMPGMR0 0xf030
262#define TX4927_TMR0_TMTRR0 0xf0f0
263#define TX4927_TMR0_LIMIT 0xf0ff
264
265
266/* TX4927 Timer 1 (32-bit registers) */
267#define TX4927_TMR1_BASE 0xf100
268#define TX4927_TMR1_TMTCR1 0xf100
269#define TX4927_TMR1_TMTISR1 0xf104
270#define TX4927_TMR1_TMCPRA1 0xf108
271#define TX4927_TMR1_TMCPRB1 0xf10c
272#define TX4927_TMR1_TMITMR1 0xf110
273#define TX4927_TMR1_TMCCDR1 0xf120
274#define TX4927_TMR1_TMPGMR1 0xf130
275#define TX4927_TMR1_TMTRR1 0xf1f0
276#define TX4927_TMR1_LIMIT 0xf1ff
277
278
279/* TX4927 Timer 2 (32-bit registers) */
280#define TX4927_TMR2_BASE 0xf200
281#define TX4927_TMR2_TMTCR2 0xf200
282#define TX4927_TMR2_TMTISR2 0xf204
283#define TX4927_TMR2_TMCPRA2 0xf208
284#define TX4927_TMR2_TMITMR2 0xf210
285#define TX4927_TMR2_TMCCDR2 0xf220
286#define TX4927_TMR2_TMWTMR2 0xf240
287#define TX4927_TMR2_TMTRR2 0xf2f0
288#define TX4927_TMR2_LIMIT 0xf2ff
289
290
291/* TX4927 serial port 0 (32-bit registers) */
292#define TX4927_SIO0_BASE 0xf300
293#define TX4927_SIO0_SILCR0 0xf300
294#define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31
295#define TX4927_SIO0_SILCR0_RWUB BM_15_15
296#define TX4927_SIO0_SILCR0_TWUB BM_14_14
297#define TX4927_SIO0_SILCR0_UODE BM_13_13
298#define TX4927_SIO0_SILCR0_RESERVED_07_12 BM_07_12
299#define TX4927_SIO0_SILCR0_SCS BM_05_06
300#define TX4927_SIO0_SILCR0_SCS_IMBUSCLK_IC (~BM_05_06)
301#define TX4927_SIO0_SILCR0_SCS_IMBUSCLK_BRG BM_05_05
302#define TX4927_SIO0_SILCR0_SCS_SCLK_EC BM_06_06
303#define TX4927_SIO0_SILCR0_SCS_SCLK_BRG BM_05_06
304#define TX4927_SIO0_SILCR0_UEPS BM_04_04
305#define TX4927_SIO0_SILCR0_UPEN BM_03_03
306#define TX4927_SIO0_SILCR0_USBL BM_02_02
307#define TX4927_SIO0_SILCR0_UMODE BM_00_01
308#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT BM_00_01
309#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01)
310#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01
311#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01
312#define TX4927_SIO0_SIDICR0 0xf304
313#define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31
314#define TX4927_SIO0_SIDICR0_TDE BM_15_15
315#define TX4927_SIO0_SIDICR0_RDE BM_14_14
316#define TX4927_SIO0_SIDICR0_TIE BM_13_13
317#define TX4927_SIO0_SIDICR0_RIE BM_12_12
318#define TX4927_SIO0_SIDICR0_SPIE BM_11_11
319#define TX4927_SIO0_SIDICR0_CTSAC BM_09_10
320#define TX4927_SIO0_SIDICR0_CTSAC_NONE (~BM_09_10)
321#define TX4927_SIO0_SIDICR0_CTSAC_RISE BM_09_09
322#define TX4927_SIO0_SIDICR0_CTSAC_FALL BM_10_10
323#define TX4927_SIO0_SIDICR0_CTSAC_BOTH BM_09_10
324#define TX4927_SIO0_SIDICR0_RESERVED_06_08 BM_06_08
325#define TX4927_SIO0_SIDICR0_STIE BM_00_05
326#define TX4927_SIO0_SIDICR0_STIE_NONE (~BM_00_05)
327#define TX4927_SIO0_SIDICR0_STIE_OERS BM_05_05
328#define TX4927_SIO0_SIDICR0_STIE_CTSAC BM_04_04
329#define TX4927_SIO0_SIDICR0_STIE_RBRKD BM_03_03
330#define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02
331#define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01
332#define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00
333#define TX4927_SIO0_SIDISR0 0xf308
334#define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31
335#define TX4927_SIO0_SIDISR0_UBRK BM_15_15
336#define TX4927_SIO0_SIDISR0_UVALID BM_14_14
337#define TX4927_SIO0_SIDISR0_UFER BM_13_13
338#define TX4927_SIO0_SIDISR0_UPER BM_12_12
339#define TX4927_SIO0_SIDISR0_UOER BM_11_11
340#define TX4927_SIO0_SIDISR0_ERI BM_10_10
341#define TX4927_SIO0_SIDISR0_TOUT BM_09_09
342#define TX4927_SIO0_SIDISR0_TDIS BM_08_08
343#define TX4927_SIO0_SIDISR0_RDIS BM_07_07
344#define TX4927_SIO0_SIDISR0_STIS BM_06_06
345#define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05
346#define TX4927_SIO0_SIDISR0_RFDN BM_00_04
347#define TX4927_SIO0_SISCISR0 0xf30c
348#define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31
349#define TX4927_SIO0_SISCISR0_OERS BM_05_05
350#define TX4927_SIO0_SISCISR0_CTSS BM_04_04
351#define TX4927_SIO0_SISCISR0_RBRKD BM_03_03
352#define TX4927_SIO0_SISCISR0_TRDY BM_02_02
353#define TX4927_SIO0_SISCISR0_TXALS BM_01_01
354#define TX4927_SIO0_SISCISR0_UBRKD BM_00_00
355#define TX4927_SIO0_SIFCR0 0xf310
356#define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31
357#define TX4927_SIO0_SIFCR0_SWRST BM_16_31
358#define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14
359#define TX4927_SIO0_SIFCR0_RDIL BM_16_31
360#define TX4927_SIO0_SIFCR0_RDIL_BYTES_1 (~BM_07_08)
361#define TX4927_SIO0_SIFCR0_RDIL_BYTES_4 BM_07_07
362#define TX4927_SIO0_SIFCR0_RDIL_BYTES_8 BM_08_08
363#define TX4927_SIO0_SIFCR0_RDIL_BYTES_12 BM_07_08
364#define TX4927_SIO0_SIFCR0_RESERVED_05_06 BM_05_06
365#define TX4927_SIO0_SIFCR0_TDIL BM_03_04
366#define TX4927_SIO0_SIFCR0_TDIL_BYTES_1 (~BM_03_04)
367#define TX4927_SIO0_SIFCR0_TDIL_BYTES_4 BM_03_03
368#define TX4927_SIO0_SIFCR0_TDIL_BYTES_8 BM_04_04
369#define TX4927_SIO0_SIFCR0_TDIL_BYTES_0 BM_03_04
370#define TX4927_SIO0_SIFCR0_TFRST BM_02_02
371#define TX4927_SIO0_SIFCR0_RFRST BM_01_01
372#define TX4927_SIO0_SIFCR0_FRSTE BM_00_00
373#define TX4927_SIO0_SIFLCR0 0xf314
374#define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31
375#define TX4927_SIO0_SIFLCR0_RCS BM_12_12
376#define TX4927_SIO0_SIFLCR0_TES BM_11_11
377#define TX4927_SIO0_SIFLCR0_RESERVED_10_10 BM_10_10
378#define TX4927_SIO0_SIFLCR0_RTSSC BM_09_09
379#define TX4927_SIO0_SIFLCR0_RSDE BM_08_08
380#define TX4927_SIO0_SIFLCR0_TSDE BM_07_07
381#define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06
382#define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04
383#define TX4927_SIO0_SIFLCR0_TBRK BM_00_00
384#define TX4927_SIO0_SIBGR0 0xf318
385#define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31
386#define TX4927_SIO0_SIBGR0_BCLK BM_08_09
387#define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09)
388#define TX4927_SIO0_SIBGR0_BCLK_T2 BM_08_08
389#define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09
390#define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09
391#define TX4927_SIO0_SIBGR0_BRD BM_00_07
392#define TX4927_SIO0_SITFIF00 0xf31c
393#define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31
394#define TX4927_SIO0_SITFIF00_TXD BM_00_07
395#define TX4927_SIO0_SIRFIFO0 0xf320
396#define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31
397#define TX4927_SIO0_SIRFIFO0_RXD BM_00_07
398#define TX4927_SIO0_SIRFIFO0 0xf320
399#define TX4927_SIO0_LIMIT 0xf3ff
400
401
402/* TX4927 serial port 1 (32-bit registers) */
403#define TX4927_SIO1_BASE 0xf400
404#define TX4927_SIO1_SILCR1 0xf400
405#define TX4927_SIO1_SIDICR1 0xf404
406#define TX4927_SIO1_SIDISR1 0xf408
407#define TX4927_SIO1_SISCISR1 0xf40c
408#define TX4927_SIO1_SIFCR1 0xf410
409#define TX4927_SIO1_SIFLCR1 0xf414
410#define TX4927_SIO1_SIBGR1 0xf418
411#define TX4927_SIO1_SITFIF01 0xf41c
412#define TX4927_SIO1_SIRFIFO1 0xf420
413#define TX4927_SIO1_LIMIT 0xf4ff
414
415
416/* TX4927 parallel port (32-bit registers) */
417#define TX4927_PIO_BASE 0xf500
418#define TX4927_PIO_PIOD0 0xf500
419#define TX4927_PIO_PIODI 0xf504
420#define TX4927_PIO_PIODIR 0xf508
421#define TX4927_PIO_PIOOD 0xf50c
422#define TX4927_PIO_LIMIT 0xf50f
423
424
425/* TX4927 AC-link controller (32-bit registers) */
426#define TX4927_ACLC_BASE 0xf700
427#define TX4927_ACLC_ACCTLEN 0xf700
428#define TX4927_ACLC_ACCTLDIS 0xf704
429#define TX4927_ACLC_ACREGACC 0xf708
430#define TX4927_ACLC_ACINTSTS 0xf710
431#define TX4927_ACLC_ACINTMSTS 0xf714
432#define TX4927_ACLC_ACINTEN 0xf718
433#define TX4927_ACLC_ACINTDIS 0xf71c
434#define TX4927_ACLC_ACSEMAPH 0xf720
435#define TX4927_ACLC_ACGPIDAT 0xf740
436#define TX4927_ACLC_ACGPODAT 0xf744
437#define TX4927_ACLC_ACSLTEN 0xf748
438#define TX4927_ACLC_ACSLTDIS 0xf74c
439#define TX4927_ACLC_ACFIFOSTS 0xf750
440#define TX4927_ACLC_ACDMASTS 0xf780
441#define TX4927_ACLC_ACDMASEL 0xf784
442#define TX4927_ACLC_ACAUDODAT 0xf7a0
443#define TX4927_ACLC_ACSURRDAT 0xf7a4
444#define TX4927_ACLC_ACCENTDAT 0xf7a8
445#define TX4927_ACLC_ACLFEDAT 0xf7ac
446#define TX4927_ACLC_ACAUDIDAT 0xf7b0
447#define TX4927_ACLC_ACMODODAT 0xf7b8
448#define TX4927_ACLC_ACMODIDAT 0xf7bc
449#define TX4927_ACLC_ACREVID 0xf7fc
450#define TX4927_ACLC_LIMIT 0xf7ff
451
452
453#define TX4927_REG(x) ((TX4927_BASE)+(x))
454
455#define TX4927_RD08( reg ) (*(vu08*)(reg))
456#define TX4927_WR08( reg, val ) ((*(vu08*)(reg))=(val))
457
458#define TX4927_RD16( reg ) (*(vu16*)(reg))
459#define TX4927_WR16( reg, val ) ((*(vu16*)(reg))=(val))
460
461#define TX4927_RD32( reg ) (*(vu32*)(reg))
462#define TX4927_WR32( reg, val ) ((*(vu32*)(reg))=(val))
463
464#define TX4927_RD64( reg ) (*(vu64*)(reg))
465#define TX4927_WR64( reg, val ) ((*(vu64*)(reg))=(val))
466
467#define TX4927_RD( reg ) TX4927_RD32( reg )
468#define TX4927_WR( reg, val ) TX4927_WR32( reg, val )
469
470
471#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE 32#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
472#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1) 33#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
473 34
diff --git a/include/asm-mips/tx4927/tx4927_mips.h b/include/asm-mips/tx4927/tx4927_mips.h
deleted file mode 100644
index 242ab93bf2e2..000000000000
--- a/include/asm-mips/tx4927/tx4927_mips.h
+++ /dev/null
@@ -1,4177 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2002 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_TX4927_TX4927_MIPS_H
28#define __ASM_TX4927_TX4927_MIPS_H
29
30#ifndef __ASSEMBLY__
31
32static inline void asm_wait(void)
33{
34 __asm__(".set\tmips3\n\t"
35 "wait\n\t"
36 ".set\tmips0");
37}
38
39#define reg_rd08(r) ((u8 )(*((vu8 *)(r))))
40#define reg_rd16(r) ((u16)(*((vu16*)(r))))
41#define reg_rd32(r) ((u32)(*((vu32*)(r))))
42#define reg_rd64(r) ((u64)(*((vu64*)(r))))
43
44#define reg_wr08(r,v) ((*((vu8 *)(r)))=((u8 )(v)))
45#define reg_wr16(r,v) ((*((vu16*)(r)))=((u16)(v)))
46#define reg_wr32(r,v) ((*((vu32*)(r)))=((u32)(v)))
47#define reg_wr64(r,v) ((*((vu64*)(r)))=((u64)(v)))
48
49typedef volatile __signed char vs8;
50typedef volatile unsigned char vu8;
51
52typedef volatile __signed short vs16;
53typedef volatile unsigned short vu16;
54
55typedef volatile __signed int vs32;
56typedef volatile unsigned int vu32;
57
58typedef s8 s08;
59typedef vs8 vs08;
60
61typedef u8 u08;
62typedef vu8 vu08;
63
64
65#if (_MIPS_SZLONG == 64)
66
67typedef volatile __signed__ long vs64;
68typedef volatile unsigned long vu64;
69
70#else
71
72typedef volatile __signed__ long long vs64;
73typedef volatile unsigned long long vu64;
74
75#endif
76
77
78#define BM_00_00 0x0000000000000001
79#define BM_01_00 0x0000000000000003
80#define BM_00_01 BM_01_00
81#define BM_02_00 0x0000000000000007
82#define BM_00_02 BM_02_00
83#define BM_03_00 0x000000000000000f
84#define BM_00_03 BM_03_00
85#define BM_04_00 0x000000000000001f
86#define BM_00_04 BM_04_00
87#define BM_05_00 0x000000000000003f
88#define BM_00_05 BM_05_00
89#define BM_06_00 0x000000000000007f
90#define BM_00_06 BM_06_00
91#define BM_07_00 0x00000000000000ff
92#define BM_00_07 BM_07_00
93#define BM_08_00 0x00000000000001ff
94#define BM_00_08 BM_08_00
95#define BM_09_00 0x00000000000003ff
96#define BM_00_09 BM_09_00
97#define BM_10_00 0x00000000000007ff
98#define BM_00_10 BM_10_00
99#define BM_11_00 0x0000000000000fff
100#define BM_00_11 BM_11_00
101#define BM_12_00 0x0000000000001fff
102#define BM_00_12 BM_12_00
103#define BM_13_00 0x0000000000003fff
104#define BM_00_13 BM_13_00
105#define BM_14_00 0x0000000000007fff
106#define BM_00_14 BM_14_00
107#define BM_15_00 0x000000000000ffff
108#define BM_00_15 BM_15_00
109#define BM_16_00 0x000000000001ffff
110#define BM_00_16 BM_16_00
111#define BM_17_00 0x000000000003ffff
112#define BM_00_17 BM_17_00
113#define BM_18_00 0x000000000007ffff
114#define BM_00_18 BM_18_00
115#define BM_19_00 0x00000000000fffff
116#define BM_00_19 BM_19_00
117#define BM_20_00 0x00000000001fffff
118#define BM_00_20 BM_20_00
119#define BM_21_00 0x00000000003fffff
120#define BM_00_21 BM_21_00
121#define BM_22_00 0x00000000007fffff
122#define BM_00_22 BM_22_00
123#define BM_23_00 0x0000000000ffffff
124#define BM_00_23 BM_23_00
125#define BM_24_00 0x0000000001ffffff
126#define BM_00_24 BM_24_00
127#define BM_25_00 0x0000000003ffffff
128#define BM_00_25 BM_25_00
129#define BM_26_00 0x0000000007ffffff
130#define BM_00_26 BM_26_00
131#define BM_27_00 0x000000000fffffff
132#define BM_00_27 BM_27_00
133#define BM_28_00 0x000000001fffffff
134#define BM_00_28 BM_28_00
135#define BM_29_00 0x000000003fffffff
136#define BM_00_29 BM_29_00
137#define BM_30_00 0x000000007fffffff
138#define BM_00_30 BM_30_00
139#define BM_31_00 0x00000000ffffffff
140#define BM_00_31 BM_31_00
141#define BM_32_00 0x00000001ffffffff
142#define BM_00_32 BM_32_00
143#define BM_33_00 0x00000003ffffffff
144#define BM_00_33 BM_33_00
145#define BM_34_00 0x00000007ffffffff
146#define BM_00_34 BM_34_00
147#define BM_35_00 0x0000000fffffffff
148#define BM_00_35 BM_35_00
149#define BM_36_00 0x0000001fffffffff
150#define BM_00_36 BM_36_00
151#define BM_37_00 0x0000003fffffffff
152#define BM_00_37 BM_37_00
153#define BM_38_00 0x0000007fffffffff
154#define BM_00_38 BM_38_00
155#define BM_39_00 0x000000ffffffffff
156#define BM_00_39 BM_39_00
157#define BM_40_00 0x000001ffffffffff
158#define BM_00_40 BM_40_00
159#define BM_41_00 0x000003ffffffffff
160#define BM_00_41 BM_41_00
161#define BM_42_00 0x000007ffffffffff
162#define BM_00_42 BM_42_00
163#define BM_43_00 0x00000fffffffffff
164#define BM_00_43 BM_43_00
165#define BM_44_00 0x00001fffffffffff
166#define BM_00_44 BM_44_00
167#define BM_45_00 0x00003fffffffffff
168#define BM_00_45 BM_45_00
169#define BM_46_00 0x00007fffffffffff
170#define BM_00_46 BM_46_00
171#define BM_47_00 0x0000ffffffffffff
172#define BM_00_47 BM_47_00
173#define BM_48_00 0x0001ffffffffffff
174#define BM_00_48 BM_48_00
175#define BM_49_00 0x0003ffffffffffff
176#define BM_00_49 BM_49_00
177#define BM_50_00 0x0007ffffffffffff
178#define BM_00_50 BM_50_00
179#define BM_51_00 0x000fffffffffffff
180#define BM_00_51 BM_51_00
181#define BM_52_00 0x001fffffffffffff
182#define BM_00_52 BM_52_00
183#define BM_53_00 0x003fffffffffffff
184#define BM_00_53 BM_53_00
185#define BM_54_00 0x007fffffffffffff
186#define BM_00_54 BM_54_00
187#define BM_55_00 0x00ffffffffffffff
188#define BM_00_55 BM_55_00
189#define BM_56_00 0x01ffffffffffffff
190#define BM_00_56 BM_56_00
191#define BM_57_00 0x03ffffffffffffff
192#define BM_00_57 BM_57_00
193#define BM_58_00 0x07ffffffffffffff
194#define BM_00_58 BM_58_00
195#define BM_59_00 0x0fffffffffffffff
196#define BM_00_59 BM_59_00
197#define BM_60_00 0x1fffffffffffffff
198#define BM_00_60 BM_60_00
199#define BM_61_00 0x3fffffffffffffff
200#define BM_00_61 BM_61_00
201#define BM_62_00 0x7fffffffffffffff
202#define BM_00_62 BM_62_00
203#define BM_63_00 0xffffffffffffffff
204#define BM_00_63 BM_63_00
205#define BM_01_01 0x0000000000000002
206#define BM_02_01 0x0000000000000006
207#define BM_01_02 BM_02_01
208#define BM_03_01 0x000000000000000e
209#define BM_01_03 BM_03_01
210#define BM_04_01 0x000000000000001e
211#define BM_01_04 BM_04_01
212#define BM_05_01 0x000000000000003e
213#define BM_01_05 BM_05_01
214#define BM_06_01 0x000000000000007e
215#define BM_01_06 BM_06_01
216#define BM_07_01 0x00000000000000fe
217#define BM_01_07 BM_07_01
218#define BM_08_01 0x00000000000001fe
219#define BM_01_08 BM_08_01
220#define BM_09_01 0x00000000000003fe
221#define BM_01_09 BM_09_01
222#define BM_10_01 0x00000000000007fe
223#define BM_01_10 BM_10_01
224#define BM_11_01 0x0000000000000ffe
225#define BM_01_11 BM_11_01
226#define BM_12_01 0x0000000000001ffe
227#define BM_01_12 BM_12_01
228#define BM_13_01 0x0000000000003ffe
229#define BM_01_13 BM_13_01
230#define BM_14_01 0x0000000000007ffe
231#define BM_01_14 BM_14_01
232#define BM_15_01 0x000000000000fffe
233#define BM_01_15 BM_15_01
234#define BM_16_01 0x000000000001fffe
235#define BM_01_16 BM_16_01
236#define BM_17_01 0x000000000003fffe
237#define BM_01_17 BM_17_01
238#define BM_18_01 0x000000000007fffe
239#define BM_01_18 BM_18_01
240#define BM_19_01 0x00000000000ffffe
241#define BM_01_19 BM_19_01
242#define BM_20_01 0x00000000001ffffe
243#define BM_01_20 BM_20_01
244#define BM_21_01 0x00000000003ffffe
245#define BM_01_21 BM_21_01
246#define BM_22_01 0x00000000007ffffe
247#define BM_01_22 BM_22_01
248#define BM_23_01 0x0000000000fffffe
249#define BM_01_23 BM_23_01
250#define BM_24_01 0x0000000001fffffe
251#define BM_01_24 BM_24_01
252#define BM_25_01 0x0000000003fffffe
253#define BM_01_25 BM_25_01
254#define BM_26_01 0x0000000007fffffe
255#define BM_01_26 BM_26_01
256#define BM_27_01 0x000000000ffffffe
257#define BM_01_27 BM_27_01
258#define BM_28_01 0x000000001ffffffe
259#define BM_01_28 BM_28_01
260#define BM_29_01 0x000000003ffffffe
261#define BM_01_29 BM_29_01
262#define BM_30_01 0x000000007ffffffe
263#define BM_01_30 BM_30_01
264#define BM_31_01 0x00000000fffffffe
265#define BM_01_31 BM_31_01
266#define BM_32_01 0x00000001fffffffe
267#define BM_01_32 BM_32_01
268#define BM_33_01 0x00000003fffffffe
269#define BM_01_33 BM_33_01
270#define BM_34_01 0x00000007fffffffe
271#define BM_01_34 BM_34_01
272#define BM_35_01 0x0000000ffffffffe
273#define BM_01_35 BM_35_01
274#define BM_36_01 0x0000001ffffffffe
275#define BM_01_36 BM_36_01
276#define BM_37_01 0x0000003ffffffffe
277#define BM_01_37 BM_37_01
278#define BM_38_01 0x0000007ffffffffe
279#define BM_01_38 BM_38_01
280#define BM_39_01 0x000000fffffffffe
281#define BM_01_39 BM_39_01
282#define BM_40_01 0x000001fffffffffe
283#define BM_01_40 BM_40_01
284#define BM_41_01 0x000003fffffffffe
285#define BM_01_41 BM_41_01
286#define BM_42_01 0x000007fffffffffe
287#define BM_01_42 BM_42_01
288#define BM_43_01 0x00000ffffffffffe
289#define BM_01_43 BM_43_01
290#define BM_44_01 0x00001ffffffffffe
291#define BM_01_44 BM_44_01
292#define BM_45_01 0x00003ffffffffffe
293#define BM_01_45 BM_45_01
294#define BM_46_01 0x00007ffffffffffe
295#define BM_01_46 BM_46_01
296#define BM_47_01 0x0000fffffffffffe
297#define BM_01_47 BM_47_01
298#define BM_48_01 0x0001fffffffffffe
299#define BM_01_48 BM_48_01
300#define BM_49_01 0x0003fffffffffffe
301#define BM_01_49 BM_49_01
302#define BM_50_01 0x0007fffffffffffe
303#define BM_01_50 BM_50_01
304#define BM_51_01 0x000ffffffffffffe
305#define BM_01_51 BM_51_01
306#define BM_52_01 0x001ffffffffffffe
307#define BM_01_52 BM_52_01
308#define BM_53_01 0x003ffffffffffffe
309#define BM_01_53 BM_53_01
310#define BM_54_01 0x007ffffffffffffe
311#define BM_01_54 BM_54_01
312#define BM_55_01 0x00fffffffffffffe
313#define BM_01_55 BM_55_01
314#define BM_56_01 0x01fffffffffffffe
315#define BM_01_56 BM_56_01
316#define BM_57_01 0x03fffffffffffffe
317#define BM_01_57 BM_57_01
318#define BM_58_01 0x07fffffffffffffe
319#define BM_01_58 BM_58_01
320#define BM_59_01 0x0ffffffffffffffe
321#define BM_01_59 BM_59_01
322#define BM_60_01 0x1ffffffffffffffe
323#define BM_01_60 BM_60_01
324#define BM_61_01 0x3ffffffffffffffe
325#define BM_01_61 BM_61_01
326#define BM_62_01 0x7ffffffffffffffe
327#define BM_01_62 BM_62_01
328#define BM_63_01 0xfffffffffffffffe
329#define BM_01_63 BM_63_01
330#define BM_02_02 0x0000000000000004
331#define BM_03_02 0x000000000000000c
332#define BM_02_03 BM_03_02
333#define BM_04_02 0x000000000000001c
334#define BM_02_04 BM_04_02
335#define BM_05_02 0x000000000000003c
336#define BM_02_05 BM_05_02
337#define BM_06_02 0x000000000000007c
338#define BM_02_06 BM_06_02
339#define BM_07_02 0x00000000000000fc
340#define BM_02_07 BM_07_02
341#define BM_08_02 0x00000000000001fc
342#define BM_02_08 BM_08_02
343#define BM_09_02 0x00000000000003fc
344#define BM_02_09 BM_09_02
345#define BM_10_02 0x00000000000007fc
346#define BM_02_10 BM_10_02
347#define BM_11_02 0x0000000000000ffc
348#define BM_02_11 BM_11_02
349#define BM_12_02 0x0000000000001ffc
350#define BM_02_12 BM_12_02
351#define BM_13_02 0x0000000000003ffc
352#define BM_02_13 BM_13_02
353#define BM_14_02 0x0000000000007ffc
354#define BM_02_14 BM_14_02
355#define BM_15_02 0x000000000000fffc
356#define BM_02_15 BM_15_02
357#define BM_16_02 0x000000000001fffc
358#define BM_02_16 BM_16_02
359#define BM_17_02 0x000000000003fffc
360#define BM_02_17 BM_17_02
361#define BM_18_02 0x000000000007fffc
362#define BM_02_18 BM_18_02
363#define BM_19_02 0x00000000000ffffc
364#define BM_02_19 BM_19_02
365#define BM_20_02 0x00000000001ffffc
366#define BM_02_20 BM_20_02
367#define BM_21_02 0x00000000003ffffc
368#define BM_02_21 BM_21_02
369#define BM_22_02 0x00000000007ffffc
370#define BM_02_22 BM_22_02
371#define BM_23_02 0x0000000000fffffc
372#define BM_02_23 BM_23_02
373#define BM_24_02 0x0000000001fffffc
374#define BM_02_24 BM_24_02
375#define BM_25_02 0x0000000003fffffc
376#define BM_02_25 BM_25_02
377#define BM_26_02 0x0000000007fffffc
378#define BM_02_26 BM_26_02
379#define BM_27_02 0x000000000ffffffc
380#define BM_02_27 BM_27_02
381#define BM_28_02 0x000000001ffffffc
382#define BM_02_28 BM_28_02
383#define BM_29_02 0x000000003ffffffc
384#define BM_02_29 BM_29_02
385#define BM_30_02 0x000000007ffffffc
386#define BM_02_30 BM_30_02
387#define BM_31_02 0x00000000fffffffc
388#define BM_02_31 BM_31_02
389#define BM_32_02 0x00000001fffffffc
390#define BM_02_32 BM_32_02
391#define BM_33_02 0x00000003fffffffc
392#define BM_02_33 BM_33_02
393#define BM_34_02 0x00000007fffffffc
394#define BM_02_34 BM_34_02
395#define BM_35_02 0x0000000ffffffffc
396#define BM_02_35 BM_35_02
397#define BM_36_02 0x0000001ffffffffc
398#define BM_02_36 BM_36_02
399#define BM_37_02 0x0000003ffffffffc
400#define BM_02_37 BM_37_02
401#define BM_38_02 0x0000007ffffffffc
402#define BM_02_38 BM_38_02
403#define BM_39_02 0x000000fffffffffc
404#define BM_02_39 BM_39_02
405#define BM_40_02 0x000001fffffffffc
406#define BM_02_40 BM_40_02
407#define BM_41_02 0x000003fffffffffc
408#define BM_02_41 BM_41_02
409#define BM_42_02 0x000007fffffffffc
410#define BM_02_42 BM_42_02
411#define BM_43_02 0x00000ffffffffffc
412#define BM_02_43 BM_43_02
413#define BM_44_02 0x00001ffffffffffc
414#define BM_02_44 BM_44_02
415#define BM_45_02 0x00003ffffffffffc
416#define BM_02_45 BM_45_02
417#define BM_46_02 0x00007ffffffffffc
418#define BM_02_46 BM_46_02
419#define BM_47_02 0x0000fffffffffffc
420#define BM_02_47 BM_47_02
421#define BM_48_02 0x0001fffffffffffc
422#define BM_02_48 BM_48_02
423#define BM_49_02 0x0003fffffffffffc
424#define BM_02_49 BM_49_02
425#define BM_50_02 0x0007fffffffffffc
426#define BM_02_50 BM_50_02
427#define BM_51_02 0x000ffffffffffffc
428#define BM_02_51 BM_51_02
429#define BM_52_02 0x001ffffffffffffc
430#define BM_02_52 BM_52_02
431#define BM_53_02 0x003ffffffffffffc
432#define BM_02_53 BM_53_02
433#define BM_54_02 0x007ffffffffffffc
434#define BM_02_54 BM_54_02
435#define BM_55_02 0x00fffffffffffffc
436#define BM_02_55 BM_55_02
437#define BM_56_02 0x01fffffffffffffc
438#define BM_02_56 BM_56_02
439#define BM_57_02 0x03fffffffffffffc
440#define BM_02_57 BM_57_02
441#define BM_58_02 0x07fffffffffffffc
442#define BM_02_58 BM_58_02
443#define BM_59_02 0x0ffffffffffffffc
444#define BM_02_59 BM_59_02
445#define BM_60_02 0x1ffffffffffffffc
446#define BM_02_60 BM_60_02
447#define BM_61_02 0x3ffffffffffffffc
448#define BM_02_61 BM_61_02
449#define BM_62_02 0x7ffffffffffffffc
450#define BM_02_62 BM_62_02
451#define BM_63_02 0xfffffffffffffffc
452#define BM_02_63 BM_63_02
453#define BM_03_03 0x0000000000000008
454#define BM_04_03 0x0000000000000018
455#define BM_03_04 BM_04_03
456#define BM_05_03 0x0000000000000038
457#define BM_03_05 BM_05_03
458#define BM_06_03 0x0000000000000078
459#define BM_03_06 BM_06_03
460#define BM_07_03 0x00000000000000f8
461#define BM_03_07 BM_07_03
462#define BM_08_03 0x00000000000001f8
463#define BM_03_08 BM_08_03
464#define BM_09_03 0x00000000000003f8
465#define BM_03_09 BM_09_03
466#define BM_10_03 0x00000000000007f8
467#define BM_03_10 BM_10_03
468#define BM_11_03 0x0000000000000ff8
469#define BM_03_11 BM_11_03
470#define BM_12_03 0x0000000000001ff8
471#define BM_03_12 BM_12_03
472#define BM_13_03 0x0000000000003ff8
473#define BM_03_13 BM_13_03
474#define BM_14_03 0x0000000000007ff8
475#define BM_03_14 BM_14_03
476#define BM_15_03 0x000000000000fff8
477#define BM_03_15 BM_15_03
478#define BM_16_03 0x000000000001fff8
479#define BM_03_16 BM_16_03
480#define BM_17_03 0x000000000003fff8
481#define BM_03_17 BM_17_03
482#define BM_18_03 0x000000000007fff8
483#define BM_03_18 BM_18_03
484#define BM_19_03 0x00000000000ffff8
485#define BM_03_19 BM_19_03
486#define BM_20_03 0x00000000001ffff8
487#define BM_03_20 BM_20_03
488#define BM_21_03 0x00000000003ffff8
489#define BM_03_21 BM_21_03
490#define BM_22_03 0x00000000007ffff8
491#define BM_03_22 BM_22_03
492#define BM_23_03 0x0000000000fffff8
493#define BM_03_23 BM_23_03
494#define BM_24_03 0x0000000001fffff8
495#define BM_03_24 BM_24_03
496#define BM_25_03 0x0000000003fffff8
497#define BM_03_25 BM_25_03
498#define BM_26_03 0x0000000007fffff8
499#define BM_03_26 BM_26_03
500#define BM_27_03 0x000000000ffffff8
501#define BM_03_27 BM_27_03
502#define BM_28_03 0x000000001ffffff8
503#define BM_03_28 BM_28_03
504#define BM_29_03 0x000000003ffffff8
505#define BM_03_29 BM_29_03
506#define BM_30_03 0x000000007ffffff8
507#define BM_03_30 BM_30_03
508#define BM_31_03 0x00000000fffffff8
509#define BM_03_31 BM_31_03
510#define BM_32_03 0x00000001fffffff8
511#define BM_03_32 BM_32_03
512#define BM_33_03 0x00000003fffffff8
513#define BM_03_33 BM_33_03
514#define BM_34_03 0x00000007fffffff8
515#define BM_03_34 BM_34_03
516#define BM_35_03 0x0000000ffffffff8
517#define BM_03_35 BM_35_03
518#define BM_36_03 0x0000001ffffffff8
519#define BM_03_36 BM_36_03
520#define BM_37_03 0x0000003ffffffff8
521#define BM_03_37 BM_37_03
522#define BM_38_03 0x0000007ffffffff8
523#define BM_03_38 BM_38_03
524#define BM_39_03 0x000000fffffffff8
525#define BM_03_39 BM_39_03
526#define BM_40_03 0x000001fffffffff8
527#define BM_03_40 BM_40_03
528#define BM_41_03 0x000003fffffffff8
529#define BM_03_41 BM_41_03
530#define BM_42_03 0x000007fffffffff8
531#define BM_03_42 BM_42_03
532#define BM_43_03 0x00000ffffffffff8
533#define BM_03_43 BM_43_03
534#define BM_44_03 0x00001ffffffffff8
535#define BM_03_44 BM_44_03
536#define BM_45_03 0x00003ffffffffff8
537#define BM_03_45 BM_45_03
538#define BM_46_03 0x00007ffffffffff8
539#define BM_03_46 BM_46_03
540#define BM_47_03 0x0000fffffffffff8
541#define BM_03_47 BM_47_03
542#define BM_48_03 0x0001fffffffffff8
543#define BM_03_48 BM_48_03
544#define BM_49_03 0x0003fffffffffff8
545#define BM_03_49 BM_49_03
546#define BM_50_03 0x0007fffffffffff8
547#define BM_03_50 BM_50_03
548#define BM_51_03 0x000ffffffffffff8
549#define BM_03_51 BM_51_03
550#define BM_52_03 0x001ffffffffffff8
551#define BM_03_52 BM_52_03
552#define BM_53_03 0x003ffffffffffff8
553#define BM_03_53 BM_53_03
554#define BM_54_03 0x007ffffffffffff8
555#define BM_03_54 BM_54_03
556#define BM_55_03 0x00fffffffffffff8
557#define BM_03_55 BM_55_03
558#define BM_56_03 0x01fffffffffffff8
559#define BM_03_56 BM_56_03
560#define BM_57_03 0x03fffffffffffff8
561#define BM_03_57 BM_57_03
562#define BM_58_03 0x07fffffffffffff8
563#define BM_03_58 BM_58_03
564#define BM_59_03 0x0ffffffffffffff8
565#define BM_03_59 BM_59_03
566#define BM_60_03 0x1ffffffffffffff8
567#define BM_03_60 BM_60_03
568#define BM_61_03 0x3ffffffffffffff8
569#define BM_03_61 BM_61_03
570#define BM_62_03 0x7ffffffffffffff8
571#define BM_03_62 BM_62_03
572#define BM_63_03 0xfffffffffffffff8
573#define BM_03_63 BM_63_03
574#define BM_04_04 0x0000000000000010
575#define BM_05_04 0x0000000000000030
576#define BM_04_05 BM_05_04
577#define BM_06_04 0x0000000000000070
578#define BM_04_06 BM_06_04
579#define BM_07_04 0x00000000000000f0
580#define BM_04_07 BM_07_04
581#define BM_08_04 0x00000000000001f0
582#define BM_04_08 BM_08_04
583#define BM_09_04 0x00000000000003f0
584#define BM_04_09 BM_09_04
585#define BM_10_04 0x00000000000007f0
586#define BM_04_10 BM_10_04
587#define BM_11_04 0x0000000000000ff0
588#define BM_04_11 BM_11_04
589#define BM_12_04 0x0000000000001ff0
590#define BM_04_12 BM_12_04
591#define BM_13_04 0x0000000000003ff0
592#define BM_04_13 BM_13_04
593#define BM_14_04 0x0000000000007ff0
594#define BM_04_14 BM_14_04
595#define BM_15_04 0x000000000000fff0
596#define BM_04_15 BM_15_04
597#define BM_16_04 0x000000000001fff0
598#define BM_04_16 BM_16_04
599#define BM_17_04 0x000000000003fff0
600#define BM_04_17 BM_17_04
601#define BM_18_04 0x000000000007fff0
602#define BM_04_18 BM_18_04
603#define BM_19_04 0x00000000000ffff0
604#define BM_04_19 BM_19_04
605#define BM_20_04 0x00000000001ffff0
606#define BM_04_20 BM_20_04
607#define BM_21_04 0x00000000003ffff0
608#define BM_04_21 BM_21_04
609#define BM_22_04 0x00000000007ffff0
610#define BM_04_22 BM_22_04
611#define BM_23_04 0x0000000000fffff0
612#define BM_04_23 BM_23_04
613#define BM_24_04 0x0000000001fffff0
614#define BM_04_24 BM_24_04
615#define BM_25_04 0x0000000003fffff0
616#define BM_04_25 BM_25_04
617#define BM_26_04 0x0000000007fffff0
618#define BM_04_26 BM_26_04
619#define BM_27_04 0x000000000ffffff0
620#define BM_04_27 BM_27_04
621#define BM_28_04 0x000000001ffffff0
622#define BM_04_28 BM_28_04
623#define BM_29_04 0x000000003ffffff0
624#define BM_04_29 BM_29_04
625#define BM_30_04 0x000000007ffffff0
626#define BM_04_30 BM_30_04
627#define BM_31_04 0x00000000fffffff0
628#define BM_04_31 BM_31_04
629#define BM_32_04 0x00000001fffffff0
630#define BM_04_32 BM_32_04
631#define BM_33_04 0x00000003fffffff0
632#define BM_04_33 BM_33_04
633#define BM_34_04 0x00000007fffffff0
634#define BM_04_34 BM_34_04
635#define BM_35_04 0x0000000ffffffff0
636#define BM_04_35 BM_35_04
637#define BM_36_04 0x0000001ffffffff0
638#define BM_04_36 BM_36_04
639#define BM_37_04 0x0000003ffffffff0
640#define BM_04_37 BM_37_04
641#define BM_38_04 0x0000007ffffffff0
642#define BM_04_38 BM_38_04
643#define BM_39_04 0x000000fffffffff0
644#define BM_04_39 BM_39_04
645#define BM_40_04 0x000001fffffffff0
646#define BM_04_40 BM_40_04
647#define BM_41_04 0x000003fffffffff0
648#define BM_04_41 BM_41_04
649#define BM_42_04 0x000007fffffffff0
650#define BM_04_42 BM_42_04
651#define BM_43_04 0x00000ffffffffff0
652#define BM_04_43 BM_43_04
653#define BM_44_04 0x00001ffffffffff0
654#define BM_04_44 BM_44_04
655#define BM_45_04 0x00003ffffffffff0
656#define BM_04_45 BM_45_04
657#define BM_46_04 0x00007ffffffffff0
658#define BM_04_46 BM_46_04
659#define BM_47_04 0x0000fffffffffff0
660#define BM_04_47 BM_47_04
661#define BM_48_04 0x0001fffffffffff0
662#define BM_04_48 BM_48_04
663#define BM_49_04 0x0003fffffffffff0
664#define BM_04_49 BM_49_04
665#define BM_50_04 0x0007fffffffffff0
666#define BM_04_50 BM_50_04
667#define BM_51_04 0x000ffffffffffff0
668#define BM_04_51 BM_51_04
669#define BM_52_04 0x001ffffffffffff0
670#define BM_04_52 BM_52_04
671#define BM_53_04 0x003ffffffffffff0
672#define BM_04_53 BM_53_04
673#define BM_54_04 0x007ffffffffffff0
674#define BM_04_54 BM_54_04
675#define BM_55_04 0x00fffffffffffff0
676#define BM_04_55 BM_55_04
677#define BM_56_04 0x01fffffffffffff0
678#define BM_04_56 BM_56_04
679#define BM_57_04 0x03fffffffffffff0
680#define BM_04_57 BM_57_04
681#define BM_58_04 0x07fffffffffffff0
682#define BM_04_58 BM_58_04
683#define BM_59_04 0x0ffffffffffffff0
684#define BM_04_59 BM_59_04
685#define BM_60_04 0x1ffffffffffffff0
686#define BM_04_60 BM_60_04
687#define BM_61_04 0x3ffffffffffffff0
688#define BM_04_61 BM_61_04
689#define BM_62_04 0x7ffffffffffffff0
690#define BM_04_62 BM_62_04
691#define BM_63_04 0xfffffffffffffff0
692#define BM_04_63 BM_63_04
693#define BM_05_05 0x0000000000000020
694#define BM_06_05 0x0000000000000060
695#define BM_05_06 BM_06_05
696#define BM_07_05 0x00000000000000e0
697#define BM_05_07 BM_07_05
698#define BM_08_05 0x00000000000001e0
699#define BM_05_08 BM_08_05
700#define BM_09_05 0x00000000000003e0
701#define BM_05_09 BM_09_05
702#define BM_10_05 0x00000000000007e0
703#define BM_05_10 BM_10_05
704#define BM_11_05 0x0000000000000fe0
705#define BM_05_11 BM_11_05
706#define BM_12_05 0x0000000000001fe0
707#define BM_05_12 BM_12_05
708#define BM_13_05 0x0000000000003fe0
709#define BM_05_13 BM_13_05
710#define BM_14_05 0x0000000000007fe0
711#define BM_05_14 BM_14_05
712#define BM_15_05 0x000000000000ffe0
713#define BM_05_15 BM_15_05
714#define BM_16_05 0x000000000001ffe0
715#define BM_05_16 BM_16_05
716#define BM_17_05 0x000000000003ffe0
717#define BM_05_17 BM_17_05
718#define BM_18_05 0x000000000007ffe0
719#define BM_05_18 BM_18_05
720#define BM_19_05 0x00000000000fffe0
721#define BM_05_19 BM_19_05
722#define BM_20_05 0x00000000001fffe0
723#define BM_05_20 BM_20_05
724#define BM_21_05 0x00000000003fffe0
725#define BM_05_21 BM_21_05
726#define BM_22_05 0x00000000007fffe0
727#define BM_05_22 BM_22_05
728#define BM_23_05 0x0000000000ffffe0
729#define BM_05_23 BM_23_05
730#define BM_24_05 0x0000000001ffffe0
731#define BM_05_24 BM_24_05
732#define BM_25_05 0x0000000003ffffe0
733#define BM_05_25 BM_25_05
734#define BM_26_05 0x0000000007ffffe0
735#define BM_05_26 BM_26_05
736#define BM_27_05 0x000000000fffffe0
737#define BM_05_27 BM_27_05
738#define BM_28_05 0x000000001fffffe0
739#define BM_05_28 BM_28_05
740#define BM_29_05 0x000000003fffffe0
741#define BM_05_29 BM_29_05
742#define BM_30_05 0x000000007fffffe0
743#define BM_05_30 BM_30_05
744#define BM_31_05 0x00000000ffffffe0
745#define BM_05_31 BM_31_05
746#define BM_32_05 0x00000001ffffffe0
747#define BM_05_32 BM_32_05
748#define BM_33_05 0x00000003ffffffe0
749#define BM_05_33 BM_33_05
750#define BM_34_05 0x00000007ffffffe0
751#define BM_05_34 BM_34_05
752#define BM_35_05 0x0000000fffffffe0
753#define BM_05_35 BM_35_05
754#define BM_36_05 0x0000001fffffffe0
755#define BM_05_36 BM_36_05
756#define BM_37_05 0x0000003fffffffe0
757#define BM_05_37 BM_37_05
758#define BM_38_05 0x0000007fffffffe0
759#define BM_05_38 BM_38_05
760#define BM_39_05 0x000000ffffffffe0
761#define BM_05_39 BM_39_05
762#define BM_40_05 0x000001ffffffffe0
763#define BM_05_40 BM_40_05
764#define BM_41_05 0x000003ffffffffe0
765#define BM_05_41 BM_41_05
766#define BM_42_05 0x000007ffffffffe0
767#define BM_05_42 BM_42_05
768#define BM_43_05 0x00000fffffffffe0
769#define BM_05_43 BM_43_05
770#define BM_44_05 0x00001fffffffffe0
771#define BM_05_44 BM_44_05
772#define BM_45_05 0x00003fffffffffe0
773#define BM_05_45 BM_45_05
774#define BM_46_05 0x00007fffffffffe0
775#define BM_05_46 BM_46_05
776#define BM_47_05 0x0000ffffffffffe0
777#define BM_05_47 BM_47_05
778#define BM_48_05 0x0001ffffffffffe0
779#define BM_05_48 BM_48_05
780#define BM_49_05 0x0003ffffffffffe0
781#define BM_05_49 BM_49_05
782#define BM_50_05 0x0007ffffffffffe0
783#define BM_05_50 BM_50_05
784#define BM_51_05 0x000fffffffffffe0
785#define BM_05_51 BM_51_05
786#define BM_52_05 0x001fffffffffffe0
787#define BM_05_52 BM_52_05
788#define BM_53_05 0x003fffffffffffe0
789#define BM_05_53 BM_53_05
790#define BM_54_05 0x007fffffffffffe0
791#define BM_05_54 BM_54_05
792#define BM_55_05 0x00ffffffffffffe0
793#define BM_05_55 BM_55_05
794#define BM_56_05 0x01ffffffffffffe0
795#define BM_05_56 BM_56_05
796#define BM_57_05 0x03ffffffffffffe0
797#define BM_05_57 BM_57_05
798#define BM_58_05 0x07ffffffffffffe0
799#define BM_05_58 BM_58_05
800#define BM_59_05 0x0fffffffffffffe0
801#define BM_05_59 BM_59_05
802#define BM_60_05 0x1fffffffffffffe0
803#define BM_05_60 BM_60_05
804#define BM_61_05 0x3fffffffffffffe0
805#define BM_05_61 BM_61_05
806#define BM_62_05 0x7fffffffffffffe0
807#define BM_05_62 BM_62_05
808#define BM_63_05 0xffffffffffffffe0
809#define BM_05_63 BM_63_05
810#define BM_06_06 0x0000000000000040
811#define BM_07_06 0x00000000000000c0
812#define BM_06_07 BM_07_06
813#define BM_08_06 0x00000000000001c0
814#define BM_06_08 BM_08_06
815#define BM_09_06 0x00000000000003c0
816#define BM_06_09 BM_09_06
817#define BM_10_06 0x00000000000007c0
818#define BM_06_10 BM_10_06
819#define BM_11_06 0x0000000000000fc0
820#define BM_06_11 BM_11_06
821#define BM_12_06 0x0000000000001fc0
822#define BM_06_12 BM_12_06
823#define BM_13_06 0x0000000000003fc0
824#define BM_06_13 BM_13_06
825#define BM_14_06 0x0000000000007fc0
826#define BM_06_14 BM_14_06
827#define BM_15_06 0x000000000000ffc0
828#define BM_06_15 BM_15_06
829#define BM_16_06 0x000000000001ffc0
830#define BM_06_16 BM_16_06
831#define BM_17_06 0x000000000003ffc0
832#define BM_06_17 BM_17_06
833#define BM_18_06 0x000000000007ffc0
834#define BM_06_18 BM_18_06
835#define BM_19_06 0x00000000000fffc0
836#define BM_06_19 BM_19_06
837#define BM_20_06 0x00000000001fffc0
838#define BM_06_20 BM_20_06
839#define BM_21_06 0x00000000003fffc0
840#define BM_06_21 BM_21_06
841#define BM_22_06 0x00000000007fffc0
842#define BM_06_22 BM_22_06
843#define BM_23_06 0x0000000000ffffc0
844#define BM_06_23 BM_23_06
845#define BM_24_06 0x0000000001ffffc0
846#define BM_06_24 BM_24_06
847#define BM_25_06 0x0000000003ffffc0
848#define BM_06_25 BM_25_06
849#define BM_26_06 0x0000000007ffffc0
850#define BM_06_26 BM_26_06
851#define BM_27_06 0x000000000fffffc0
852#define BM_06_27 BM_27_06
853#define BM_28_06 0x000000001fffffc0
854#define BM_06_28 BM_28_06
855#define BM_29_06 0x000000003fffffc0
856#define BM_06_29 BM_29_06
857#define BM_30_06 0x000000007fffffc0
858#define BM_06_30 BM_30_06
859#define BM_31_06 0x00000000ffffffc0
860#define BM_06_31 BM_31_06
861#define BM_32_06 0x00000001ffffffc0
862#define BM_06_32 BM_32_06
863#define BM_33_06 0x00000003ffffffc0
864#define BM_06_33 BM_33_06
865#define BM_34_06 0x00000007ffffffc0
866#define BM_06_34 BM_34_06
867#define BM_35_06 0x0000000fffffffc0
868#define BM_06_35 BM_35_06
869#define BM_36_06 0x0000001fffffffc0
870#define BM_06_36 BM_36_06
871#define BM_37_06 0x0000003fffffffc0
872#define BM_06_37 BM_37_06
873#define BM_38_06 0x0000007fffffffc0
874#define BM_06_38 BM_38_06
875#define BM_39_06 0x000000ffffffffc0
876#define BM_06_39 BM_39_06
877#define BM_40_06 0x000001ffffffffc0
878#define BM_06_40 BM_40_06
879#define BM_41_06 0x000003ffffffffc0
880#define BM_06_41 BM_41_06
881#define BM_42_06 0x000007ffffffffc0
882#define BM_06_42 BM_42_06
883#define BM_43_06 0x00000fffffffffc0
884#define BM_06_43 BM_43_06
885#define BM_44_06 0x00001fffffffffc0
886#define BM_06_44 BM_44_06
887#define BM_45_06 0x00003fffffffffc0
888#define BM_06_45 BM_45_06
889#define BM_46_06 0x00007fffffffffc0
890#define BM_06_46 BM_46_06
891#define BM_47_06 0x0000ffffffffffc0
892#define BM_06_47 BM_47_06
893#define BM_48_06 0x0001ffffffffffc0
894#define BM_06_48 BM_48_06
895#define BM_49_06 0x0003ffffffffffc0
896#define BM_06_49 BM_49_06
897#define BM_50_06 0x0007ffffffffffc0
898#define BM_06_50 BM_50_06
899#define BM_51_06 0x000fffffffffffc0
900#define BM_06_51 BM_51_06
901#define BM_52_06 0x001fffffffffffc0
902#define BM_06_52 BM_52_06
903#define BM_53_06 0x003fffffffffffc0
904#define BM_06_53 BM_53_06
905#define BM_54_06 0x007fffffffffffc0
906#define BM_06_54 BM_54_06
907#define BM_55_06 0x00ffffffffffffc0
908#define BM_06_55 BM_55_06
909#define BM_56_06 0x01ffffffffffffc0
910#define BM_06_56 BM_56_06
911#define BM_57_06 0x03ffffffffffffc0
912#define BM_06_57 BM_57_06
913#define BM_58_06 0x07ffffffffffffc0
914#define BM_06_58 BM_58_06
915#define BM_59_06 0x0fffffffffffffc0
916#define BM_06_59 BM_59_06
917#define BM_60_06 0x1fffffffffffffc0
918#define BM_06_60 BM_60_06
919#define BM_61_06 0x3fffffffffffffc0
920#define BM_06_61 BM_61_06
921#define BM_62_06 0x7fffffffffffffc0
922#define BM_06_62 BM_62_06
923#define BM_63_06 0xffffffffffffffc0
924#define BM_06_63 BM_63_06
925#define BM_07_07 0x0000000000000080
926#define BM_08_07 0x0000000000000180
927#define BM_07_08 BM_08_07
928#define BM_09_07 0x0000000000000380
929#define BM_07_09 BM_09_07
930#define BM_10_07 0x0000000000000780
931#define BM_07_10 BM_10_07
932#define BM_11_07 0x0000000000000f80
933#define BM_07_11 BM_11_07
934#define BM_12_07 0x0000000000001f80
935#define BM_07_12 BM_12_07
936#define BM_13_07 0x0000000000003f80
937#define BM_07_13 BM_13_07
938#define BM_14_07 0x0000000000007f80
939#define BM_07_14 BM_14_07
940#define BM_15_07 0x000000000000ff80
941#define BM_07_15 BM_15_07
942#define BM_16_07 0x000000000001ff80
943#define BM_07_16 BM_16_07
944#define BM_17_07 0x000000000003ff80
945#define BM_07_17 BM_17_07
946#define BM_18_07 0x000000000007ff80
947#define BM_07_18 BM_18_07
948#define BM_19_07 0x00000000000fff80
949#define BM_07_19 BM_19_07
950#define BM_20_07 0x00000000001fff80
951#define BM_07_20 BM_20_07
952#define BM_21_07 0x00000000003fff80
953#define BM_07_21 BM_21_07
954#define BM_22_07 0x00000000007fff80
955#define BM_07_22 BM_22_07
956#define BM_23_07 0x0000000000ffff80
957#define BM_07_23 BM_23_07
958#define BM_24_07 0x0000000001ffff80
959#define BM_07_24 BM_24_07
960#define BM_25_07 0x0000000003ffff80
961#define BM_07_25 BM_25_07
962#define BM_26_07 0x0000000007ffff80
963#define BM_07_26 BM_26_07
964#define BM_27_07 0x000000000fffff80
965#define BM_07_27 BM_27_07
966#define BM_28_07 0x000000001fffff80
967#define BM_07_28 BM_28_07
968#define BM_29_07 0x000000003fffff80
969#define BM_07_29 BM_29_07
970#define BM_30_07 0x000000007fffff80
971#define BM_07_30 BM_30_07
972#define BM_31_07 0x00000000ffffff80
973#define BM_07_31 BM_31_07
974#define BM_32_07 0x00000001ffffff80
975#define BM_07_32 BM_32_07
976#define BM_33_07 0x00000003ffffff80
977#define BM_07_33 BM_33_07
978#define BM_34_07 0x00000007ffffff80
979#define BM_07_34 BM_34_07
980#define BM_35_07 0x0000000fffffff80
981#define BM_07_35 BM_35_07
982#define BM_36_07 0x0000001fffffff80
983#define BM_07_36 BM_36_07
984#define BM_37_07 0x0000003fffffff80
985#define BM_07_37 BM_37_07
986#define BM_38_07 0x0000007fffffff80
987#define BM_07_38 BM_38_07
988#define BM_39_07 0x000000ffffffff80
989#define BM_07_39 BM_39_07
990#define BM_40_07 0x000001ffffffff80
991#define BM_07_40 BM_40_07
992#define BM_41_07 0x000003ffffffff80
993#define BM_07_41 BM_41_07
994#define BM_42_07 0x000007ffffffff80
995#define BM_07_42 BM_42_07
996#define BM_43_07 0x00000fffffffff80
997#define BM_07_43 BM_43_07
998#define BM_44_07 0x00001fffffffff80
999#define BM_07_44 BM_44_07
1000#define BM_45_07 0x00003fffffffff80
1001#define BM_07_45 BM_45_07
1002#define BM_46_07 0x00007fffffffff80
1003#define BM_07_46 BM_46_07
1004#define BM_47_07 0x0000ffffffffff80
1005#define BM_07_47 BM_47_07
1006#define BM_48_07 0x0001ffffffffff80
1007#define BM_07_48 BM_48_07
1008#define BM_49_07 0x0003ffffffffff80
1009#define BM_07_49 BM_49_07
1010#define BM_50_07 0x0007ffffffffff80
1011#define BM_07_50 BM_50_07
1012#define BM_51_07 0x000fffffffffff80
1013#define BM_07_51 BM_51_07
1014#define BM_52_07 0x001fffffffffff80
1015#define BM_07_52 BM_52_07
1016#define BM_53_07 0x003fffffffffff80
1017#define BM_07_53 BM_53_07
1018#define BM_54_07 0x007fffffffffff80
1019#define BM_07_54 BM_54_07
1020#define BM_55_07 0x00ffffffffffff80
1021#define BM_07_55 BM_55_07
1022#define BM_56_07 0x01ffffffffffff80
1023#define BM_07_56 BM_56_07
1024#define BM_57_07 0x03ffffffffffff80
1025#define BM_07_57 BM_57_07
1026#define BM_58_07 0x07ffffffffffff80
1027#define BM_07_58 BM_58_07
1028#define BM_59_07 0x0fffffffffffff80
1029#define BM_07_59 BM_59_07
1030#define BM_60_07 0x1fffffffffffff80
1031#define BM_07_60 BM_60_07
1032#define BM_61_07 0x3fffffffffffff80
1033#define BM_07_61 BM_61_07
1034#define BM_62_07 0x7fffffffffffff80
1035#define BM_07_62 BM_62_07
1036#define BM_63_07 0xffffffffffffff80
1037#define BM_07_63 BM_63_07
1038#define BM_08_08 0x0000000000000100
1039#define BM_09_08 0x0000000000000300
1040#define BM_08_09 BM_09_08
1041#define BM_10_08 0x0000000000000700
1042#define BM_08_10 BM_10_08
1043#define BM_11_08 0x0000000000000f00
1044#define BM_08_11 BM_11_08
1045#define BM_12_08 0x0000000000001f00
1046#define BM_08_12 BM_12_08
1047#define BM_13_08 0x0000000000003f00
1048#define BM_08_13 BM_13_08
1049#define BM_14_08 0x0000000000007f00
1050#define BM_08_14 BM_14_08
1051#define BM_15_08 0x000000000000ff00
1052#define BM_08_15 BM_15_08
1053#define BM_16_08 0x000000000001ff00
1054#define BM_08_16 BM_16_08
1055#define BM_17_08 0x000000000003ff00
1056#define BM_08_17 BM_17_08
1057#define BM_18_08 0x000000000007ff00
1058#define BM_08_18 BM_18_08
1059#define BM_19_08 0x00000000000fff00
1060#define BM_08_19 BM_19_08
1061#define BM_20_08 0x00000000001fff00
1062#define BM_08_20 BM_20_08
1063#define BM_21_08 0x00000000003fff00
1064#define BM_08_21 BM_21_08
1065#define BM_22_08 0x00000000007fff00
1066#define BM_08_22 BM_22_08
1067#define BM_23_08 0x0000000000ffff00
1068#define BM_08_23 BM_23_08
1069#define BM_24_08 0x0000000001ffff00
1070#define BM_08_24 BM_24_08
1071#define BM_25_08 0x0000000003ffff00
1072#define BM_08_25 BM_25_08
1073#define BM_26_08 0x0000000007ffff00
1074#define BM_08_26 BM_26_08
1075#define BM_27_08 0x000000000fffff00
1076#define BM_08_27 BM_27_08
1077#define BM_28_08 0x000000001fffff00
1078#define BM_08_28 BM_28_08
1079#define BM_29_08 0x000000003fffff00
1080#define BM_08_29 BM_29_08
1081#define BM_30_08 0x000000007fffff00
1082#define BM_08_30 BM_30_08
1083#define BM_31_08 0x00000000ffffff00
1084#define BM_08_31 BM_31_08
1085#define BM_32_08 0x00000001ffffff00
1086#define BM_08_32 BM_32_08
1087#define BM_33_08 0x00000003ffffff00
1088#define BM_08_33 BM_33_08
1089#define BM_34_08 0x00000007ffffff00
1090#define BM_08_34 BM_34_08
1091#define BM_35_08 0x0000000fffffff00
1092#define BM_08_35 BM_35_08
1093#define BM_36_08 0x0000001fffffff00
1094#define BM_08_36 BM_36_08
1095#define BM_37_08 0x0000003fffffff00
1096#define BM_08_37 BM_37_08
1097#define BM_38_08 0x0000007fffffff00
1098#define BM_08_38 BM_38_08
1099#define BM_39_08 0x000000ffffffff00
1100#define BM_08_39 BM_39_08
1101#define BM_40_08 0x000001ffffffff00
1102#define BM_08_40 BM_40_08
1103#define BM_41_08 0x000003ffffffff00
1104#define BM_08_41 BM_41_08
1105#define BM_42_08 0x000007ffffffff00
1106#define BM_08_42 BM_42_08
1107#define BM_43_08 0x00000fffffffff00
1108#define BM_08_43 BM_43_08
1109#define BM_44_08 0x00001fffffffff00
1110#define BM_08_44 BM_44_08
1111#define BM_45_08 0x00003fffffffff00
1112#define BM_08_45 BM_45_08
1113#define BM_46_08 0x00007fffffffff00
1114#define BM_08_46 BM_46_08
1115#define BM_47_08 0x0000ffffffffff00
1116#define BM_08_47 BM_47_08
1117#define BM_48_08 0x0001ffffffffff00
1118#define BM_08_48 BM_48_08
1119#define BM_49_08 0x0003ffffffffff00
1120#define BM_08_49 BM_49_08
1121#define BM_50_08 0x0007ffffffffff00
1122#define BM_08_50 BM_50_08
1123#define BM_51_08 0x000fffffffffff00
1124#define BM_08_51 BM_51_08
1125#define BM_52_08 0x001fffffffffff00
1126#define BM_08_52 BM_52_08
1127#define BM_53_08 0x003fffffffffff00
1128#define BM_08_53 BM_53_08
1129#define BM_54_08 0x007fffffffffff00
1130#define BM_08_54 BM_54_08
1131#define BM_55_08 0x00ffffffffffff00
1132#define BM_08_55 BM_55_08
1133#define BM_56_08 0x01ffffffffffff00
1134#define BM_08_56 BM_56_08
1135#define BM_57_08 0x03ffffffffffff00
1136#define BM_08_57 BM_57_08
1137#define BM_58_08 0x07ffffffffffff00
1138#define BM_08_58 BM_58_08
1139#define BM_59_08 0x0fffffffffffff00
1140#define BM_08_59 BM_59_08
1141#define BM_60_08 0x1fffffffffffff00
1142#define BM_08_60 BM_60_08
1143#define BM_61_08 0x3fffffffffffff00
1144#define BM_08_61 BM_61_08
1145#define BM_62_08 0x7fffffffffffff00
1146#define BM_08_62 BM_62_08
1147#define BM_63_08 0xffffffffffffff00
1148#define BM_08_63 BM_63_08
1149#define BM_09_09 0x0000000000000200
1150#define BM_10_09 0x0000000000000600
1151#define BM_09_10 BM_10_09
1152#define BM_11_09 0x0000000000000e00
1153#define BM_09_11 BM_11_09
1154#define BM_12_09 0x0000000000001e00
1155#define BM_09_12 BM_12_09
1156#define BM_13_09 0x0000000000003e00
1157#define BM_09_13 BM_13_09
1158#define BM_14_09 0x0000000000007e00
1159#define BM_09_14 BM_14_09
1160#define BM_15_09 0x000000000000fe00
1161#define BM_09_15 BM_15_09
1162#define BM_16_09 0x000000000001fe00
1163#define BM_09_16 BM_16_09
1164#define BM_17_09 0x000000000003fe00
1165#define BM_09_17 BM_17_09
1166#define BM_18_09 0x000000000007fe00
1167#define BM_09_18 BM_18_09
1168#define BM_19_09 0x00000000000ffe00
1169#define BM_09_19 BM_19_09
1170#define BM_20_09 0x00000000001ffe00
1171#define BM_09_20 BM_20_09
1172#define BM_21_09 0x00000000003ffe00
1173#define BM_09_21 BM_21_09
1174#define BM_22_09 0x00000000007ffe00
1175#define BM_09_22 BM_22_09
1176#define BM_23_09 0x0000000000fffe00
1177#define BM_09_23 BM_23_09
1178#define BM_24_09 0x0000000001fffe00
1179#define BM_09_24 BM_24_09
1180#define BM_25_09 0x0000000003fffe00
1181#define BM_09_25 BM_25_09
1182#define BM_26_09 0x0000000007fffe00
1183#define BM_09_26 BM_26_09
1184#define BM_27_09 0x000000000ffffe00
1185#define BM_09_27 BM_27_09
1186#define BM_28_09 0x000000001ffffe00
1187#define BM_09_28 BM_28_09
1188#define BM_29_09 0x000000003ffffe00
1189#define BM_09_29 BM_29_09
1190#define BM_30_09 0x000000007ffffe00
1191#define BM_09_30 BM_30_09
1192#define BM_31_09 0x00000000fffffe00
1193#define BM_09_31 BM_31_09
1194#define BM_32_09 0x00000001fffffe00
1195#define BM_09_32 BM_32_09
1196#define BM_33_09 0x00000003fffffe00
1197#define BM_09_33 BM_33_09
1198#define BM_34_09 0x00000007fffffe00
1199#define BM_09_34 BM_34_09
1200#define BM_35_09 0x0000000ffffffe00
1201#define BM_09_35 BM_35_09
1202#define BM_36_09 0x0000001ffffffe00
1203#define BM_09_36 BM_36_09
1204#define BM_37_09 0x0000003ffffffe00
1205#define BM_09_37 BM_37_09
1206#define BM_38_09 0x0000007ffffffe00
1207#define BM_09_38 BM_38_09
1208#define BM_39_09 0x000000fffffffe00
1209#define BM_09_39 BM_39_09
1210#define BM_40_09 0x000001fffffffe00
1211#define BM_09_40 BM_40_09
1212#define BM_41_09 0x000003fffffffe00
1213#define BM_09_41 BM_41_09
1214#define BM_42_09 0x000007fffffffe00
1215#define BM_09_42 BM_42_09
1216#define BM_43_09 0x00000ffffffffe00
1217#define BM_09_43 BM_43_09
1218#define BM_44_09 0x00001ffffffffe00
1219#define BM_09_44 BM_44_09
1220#define BM_45_09 0x00003ffffffffe00
1221#define BM_09_45 BM_45_09
1222#define BM_46_09 0x00007ffffffffe00
1223#define BM_09_46 BM_46_09
1224#define BM_47_09 0x0000fffffffffe00
1225#define BM_09_47 BM_47_09
1226#define BM_48_09 0x0001fffffffffe00
1227#define BM_09_48 BM_48_09
1228#define BM_49_09 0x0003fffffffffe00
1229#define BM_09_49 BM_49_09
1230#define BM_50_09 0x0007fffffffffe00
1231#define BM_09_50 BM_50_09
1232#define BM_51_09 0x000ffffffffffe00
1233#define BM_09_51 BM_51_09
1234#define BM_52_09 0x001ffffffffffe00
1235#define BM_09_52 BM_52_09
1236#define BM_53_09 0x003ffffffffffe00
1237#define BM_09_53 BM_53_09
1238#define BM_54_09 0x007ffffffffffe00
1239#define BM_09_54 BM_54_09
1240#define BM_55_09 0x00fffffffffffe00
1241#define BM_09_55 BM_55_09
1242#define BM_56_09 0x01fffffffffffe00
1243#define BM_09_56 BM_56_09
1244#define BM_57_09 0x03fffffffffffe00
1245#define BM_09_57 BM_57_09
1246#define BM_58_09 0x07fffffffffffe00
1247#define BM_09_58 BM_58_09
1248#define BM_59_09 0x0ffffffffffffe00
1249#define BM_09_59 BM_59_09
1250#define BM_60_09 0x1ffffffffffffe00
1251#define BM_09_60 BM_60_09
1252#define BM_61_09 0x3ffffffffffffe00
1253#define BM_09_61 BM_61_09
1254#define BM_62_09 0x7ffffffffffffe00
1255#define BM_09_62 BM_62_09
1256#define BM_63_09 0xfffffffffffffe00
1257#define BM_09_63 BM_63_09
1258#define BM_10_10 0x0000000000000400
1259#define BM_11_10 0x0000000000000c00
1260#define BM_10_11 BM_11_10
1261#define BM_12_10 0x0000000000001c00
1262#define BM_10_12 BM_12_10
1263#define BM_13_10 0x0000000000003c00
1264#define BM_10_13 BM_13_10
1265#define BM_14_10 0x0000000000007c00
1266#define BM_10_14 BM_14_10
1267#define BM_15_10 0x000000000000fc00
1268#define BM_10_15 BM_15_10
1269#define BM_16_10 0x000000000001fc00
1270#define BM_10_16 BM_16_10
1271#define BM_17_10 0x000000000003fc00
1272#define BM_10_17 BM_17_10
1273#define BM_18_10 0x000000000007fc00
1274#define BM_10_18 BM_18_10
1275#define BM_19_10 0x00000000000ffc00
1276#define BM_10_19 BM_19_10
1277#define BM_20_10 0x00000000001ffc00
1278#define BM_10_20 BM_20_10
1279#define BM_21_10 0x00000000003ffc00
1280#define BM_10_21 BM_21_10
1281#define BM_22_10 0x00000000007ffc00
1282#define BM_10_22 BM_22_10
1283#define BM_23_10 0x0000000000fffc00
1284#define BM_10_23 BM_23_10
1285#define BM_24_10 0x0000000001fffc00
1286#define BM_10_24 BM_24_10
1287#define BM_25_10 0x0000000003fffc00
1288#define BM_10_25 BM_25_10
1289#define BM_26_10 0x0000000007fffc00
1290#define BM_10_26 BM_26_10
1291#define BM_27_10 0x000000000ffffc00
1292#define BM_10_27 BM_27_10
1293#define BM_28_10 0x000000001ffffc00
1294#define BM_10_28 BM_28_10
1295#define BM_29_10 0x000000003ffffc00
1296#define BM_10_29 BM_29_10
1297#define BM_30_10 0x000000007ffffc00
1298#define BM_10_30 BM_30_10
1299#define BM_31_10 0x00000000fffffc00
1300#define BM_10_31 BM_31_10
1301#define BM_32_10 0x00000001fffffc00
1302#define BM_10_32 BM_32_10
1303#define BM_33_10 0x00000003fffffc00
1304#define BM_10_33 BM_33_10
1305#define BM_34_10 0x00000007fffffc00
1306#define BM_10_34 BM_34_10
1307#define BM_35_10 0x0000000ffffffc00
1308#define BM_10_35 BM_35_10
1309#define BM_36_10 0x0000001ffffffc00
1310#define BM_10_36 BM_36_10
1311#define BM_37_10 0x0000003ffffffc00
1312#define BM_10_37 BM_37_10
1313#define BM_38_10 0x0000007ffffffc00
1314#define BM_10_38 BM_38_10
1315#define BM_39_10 0x000000fffffffc00
1316#define BM_10_39 BM_39_10
1317#define BM_40_10 0x000001fffffffc00
1318#define BM_10_40 BM_40_10
1319#define BM_41_10 0x000003fffffffc00
1320#define BM_10_41 BM_41_10
1321#define BM_42_10 0x000007fffffffc00
1322#define BM_10_42 BM_42_10
1323#define BM_43_10 0x00000ffffffffc00
1324#define BM_10_43 BM_43_10
1325#define BM_44_10 0x00001ffffffffc00
1326#define BM_10_44 BM_44_10
1327#define BM_45_10 0x00003ffffffffc00
1328#define BM_10_45 BM_45_10
1329#define BM_46_10 0x00007ffffffffc00
1330#define BM_10_46 BM_46_10
1331#define BM_47_10 0x0000fffffffffc00
1332#define BM_10_47 BM_47_10
1333#define BM_48_10 0x0001fffffffffc00
1334#define BM_10_48 BM_48_10
1335#define BM_49_10 0x0003fffffffffc00
1336#define BM_10_49 BM_49_10
1337#define BM_50_10 0x0007fffffffffc00
1338#define BM_10_50 BM_50_10
1339#define BM_51_10 0x000ffffffffffc00
1340#define BM_10_51 BM_51_10
1341#define BM_52_10 0x001ffffffffffc00
1342#define BM_10_52 BM_52_10
1343#define BM_53_10 0x003ffffffffffc00
1344#define BM_10_53 BM_53_10
1345#define BM_54_10 0x007ffffffffffc00
1346#define BM_10_54 BM_54_10
1347#define BM_55_10 0x00fffffffffffc00
1348#define BM_10_55 BM_55_10
1349#define BM_56_10 0x01fffffffffffc00
1350#define BM_10_56 BM_56_10
1351#define BM_57_10 0x03fffffffffffc00
1352#define BM_10_57 BM_57_10
1353#define BM_58_10 0x07fffffffffffc00
1354#define BM_10_58 BM_58_10
1355#define BM_59_10 0x0ffffffffffffc00
1356#define BM_10_59 BM_59_10
1357#define BM_60_10 0x1ffffffffffffc00
1358#define BM_10_60 BM_60_10
1359#define BM_61_10 0x3ffffffffffffc00
1360#define BM_10_61 BM_61_10
1361#define BM_62_10 0x7ffffffffffffc00
1362#define BM_10_62 BM_62_10
1363#define BM_63_10 0xfffffffffffffc00
1364#define BM_10_63 BM_63_10
1365#define BM_11_11 0x0000000000000800
1366#define BM_12_11 0x0000000000001800
1367#define BM_11_12 BM_12_11
1368#define BM_13_11 0x0000000000003800
1369#define BM_11_13 BM_13_11
1370#define BM_14_11 0x0000000000007800
1371#define BM_11_14 BM_14_11
1372#define BM_15_11 0x000000000000f800
1373#define BM_11_15 BM_15_11
1374#define BM_16_11 0x000000000001f800
1375#define BM_11_16 BM_16_11
1376#define BM_17_11 0x000000000003f800
1377#define BM_11_17 BM_17_11
1378#define BM_18_11 0x000000000007f800
1379#define BM_11_18 BM_18_11
1380#define BM_19_11 0x00000000000ff800
1381#define BM_11_19 BM_19_11
1382#define BM_20_11 0x00000000001ff800
1383#define BM_11_20 BM_20_11
1384#define BM_21_11 0x00000000003ff800
1385#define BM_11_21 BM_21_11
1386#define BM_22_11 0x00000000007ff800
1387#define BM_11_22 BM_22_11
1388#define BM_23_11 0x0000000000fff800
1389#define BM_11_23 BM_23_11
1390#define BM_24_11 0x0000000001fff800
1391#define BM_11_24 BM_24_11
1392#define BM_25_11 0x0000000003fff800
1393#define BM_11_25 BM_25_11
1394#define BM_26_11 0x0000000007fff800
1395#define BM_11_26 BM_26_11
1396#define BM_27_11 0x000000000ffff800
1397#define BM_11_27 BM_27_11
1398#define BM_28_11 0x000000001ffff800
1399#define BM_11_28 BM_28_11
1400#define BM_29_11 0x000000003ffff800
1401#define BM_11_29 BM_29_11
1402#define BM_30_11 0x000000007ffff800
1403#define BM_11_30 BM_30_11
1404#define BM_31_11 0x00000000fffff800
1405#define BM_11_31 BM_31_11
1406#define BM_32_11 0x00000001fffff800
1407#define BM_11_32 BM_32_11
1408#define BM_33_11 0x00000003fffff800
1409#define BM_11_33 BM_33_11
1410#define BM_34_11 0x00000007fffff800
1411#define BM_11_34 BM_34_11
1412#define BM_35_11 0x0000000ffffff800
1413#define BM_11_35 BM_35_11
1414#define BM_36_11 0x0000001ffffff800
1415#define BM_11_36 BM_36_11
1416#define BM_37_11 0x0000003ffffff800
1417#define BM_11_37 BM_37_11
1418#define BM_38_11 0x0000007ffffff800
1419#define BM_11_38 BM_38_11
1420#define BM_39_11 0x000000fffffff800
1421#define BM_11_39 BM_39_11
1422#define BM_40_11 0x000001fffffff800
1423#define BM_11_40 BM_40_11
1424#define BM_41_11 0x000003fffffff800
1425#define BM_11_41 BM_41_11
1426#define BM_42_11 0x000007fffffff800
1427#define BM_11_42 BM_42_11
1428#define BM_43_11 0x00000ffffffff800
1429#define BM_11_43 BM_43_11
1430#define BM_44_11 0x00001ffffffff800
1431#define BM_11_44 BM_44_11
1432#define BM_45_11 0x00003ffffffff800
1433#define BM_11_45 BM_45_11
1434#define BM_46_11 0x00007ffffffff800
1435#define BM_11_46 BM_46_11
1436#define BM_47_11 0x0000fffffffff800
1437#define BM_11_47 BM_47_11
1438#define BM_48_11 0x0001fffffffff800
1439#define BM_11_48 BM_48_11
1440#define BM_49_11 0x0003fffffffff800
1441#define BM_11_49 BM_49_11
1442#define BM_50_11 0x0007fffffffff800
1443#define BM_11_50 BM_50_11
1444#define BM_51_11 0x000ffffffffff800
1445#define BM_11_51 BM_51_11
1446#define BM_52_11 0x001ffffffffff800
1447#define BM_11_52 BM_52_11
1448#define BM_53_11 0x003ffffffffff800
1449#define BM_11_53 BM_53_11
1450#define BM_54_11 0x007ffffffffff800
1451#define BM_11_54 BM_54_11
1452#define BM_55_11 0x00fffffffffff800
1453#define BM_11_55 BM_55_11
1454#define BM_56_11 0x01fffffffffff800
1455#define BM_11_56 BM_56_11
1456#define BM_57_11 0x03fffffffffff800
1457#define BM_11_57 BM_57_11
1458#define BM_58_11 0x07fffffffffff800
1459#define BM_11_58 BM_58_11
1460#define BM_59_11 0x0ffffffffffff800
1461#define BM_11_59 BM_59_11
1462#define BM_60_11 0x1ffffffffffff800
1463#define BM_11_60 BM_60_11
1464#define BM_61_11 0x3ffffffffffff800
1465#define BM_11_61 BM_61_11
1466#define BM_62_11 0x7ffffffffffff800
1467#define BM_11_62 BM_62_11
1468#define BM_63_11 0xfffffffffffff800
1469#define BM_11_63 BM_63_11
1470#define BM_12_12 0x0000000000001000
1471#define BM_13_12 0x0000000000003000
1472#define BM_12_13 BM_13_12
1473#define BM_14_12 0x0000000000007000
1474#define BM_12_14 BM_14_12
1475#define BM_15_12 0x000000000000f000
1476#define BM_12_15 BM_15_12
1477#define BM_16_12 0x000000000001f000
1478#define BM_12_16 BM_16_12
1479#define BM_17_12 0x000000000003f000
1480#define BM_12_17 BM_17_12
1481#define BM_18_12 0x000000000007f000
1482#define BM_12_18 BM_18_12
1483#define BM_19_12 0x00000000000ff000
1484#define BM_12_19 BM_19_12
1485#define BM_20_12 0x00000000001ff000
1486#define BM_12_20 BM_20_12
1487#define BM_21_12 0x00000000003ff000
1488#define BM_12_21 BM_21_12
1489#define BM_22_12 0x00000000007ff000
1490#define BM_12_22 BM_22_12
1491#define BM_23_12 0x0000000000fff000
1492#define BM_12_23 BM_23_12
1493#define BM_24_12 0x0000000001fff000
1494#define BM_12_24 BM_24_12
1495#define BM_25_12 0x0000000003fff000
1496#define BM_12_25 BM_25_12
1497#define BM_26_12 0x0000000007fff000
1498#define BM_12_26 BM_26_12
1499#define BM_27_12 0x000000000ffff000
1500#define BM_12_27 BM_27_12
1501#define BM_28_12 0x000000001ffff000
1502#define BM_12_28 BM_28_12
1503#define BM_29_12 0x000000003ffff000
1504#define BM_12_29 BM_29_12
1505#define BM_30_12 0x000000007ffff000
1506#define BM_12_30 BM_30_12
1507#define BM_31_12 0x00000000fffff000
1508#define BM_12_31 BM_31_12
1509#define BM_32_12 0x00000001fffff000
1510#define BM_12_32 BM_32_12
1511#define BM_33_12 0x00000003fffff000
1512#define BM_12_33 BM_33_12
1513#define BM_34_12 0x00000007fffff000
1514#define BM_12_34 BM_34_12
1515#define BM_35_12 0x0000000ffffff000
1516#define BM_12_35 BM_35_12
1517#define BM_36_12 0x0000001ffffff000
1518#define BM_12_36 BM_36_12
1519#define BM_37_12 0x0000003ffffff000
1520#define BM_12_37 BM_37_12
1521#define BM_38_12 0x0000007ffffff000
1522#define BM_12_38 BM_38_12
1523#define BM_39_12 0x000000fffffff000
1524#define BM_12_39 BM_39_12
1525#define BM_40_12 0x000001fffffff000
1526#define BM_12_40 BM_40_12
1527#define BM_41_12 0x000003fffffff000
1528#define BM_12_41 BM_41_12
1529#define BM_42_12 0x000007fffffff000
1530#define BM_12_42 BM_42_12
1531#define BM_43_12 0x00000ffffffff000
1532#define BM_12_43 BM_43_12
1533#define BM_44_12 0x00001ffffffff000
1534#define BM_12_44 BM_44_12
1535#define BM_45_12 0x00003ffffffff000
1536#define BM_12_45 BM_45_12
1537#define BM_46_12 0x00007ffffffff000
1538#define BM_12_46 BM_46_12
1539#define BM_47_12 0x0000fffffffff000
1540#define BM_12_47 BM_47_12
1541#define BM_48_12 0x0001fffffffff000
1542#define BM_12_48 BM_48_12
1543#define BM_49_12 0x0003fffffffff000
1544#define BM_12_49 BM_49_12
1545#define BM_50_12 0x0007fffffffff000
1546#define BM_12_50 BM_50_12
1547#define BM_51_12 0x000ffffffffff000
1548#define BM_12_51 BM_51_12
1549#define BM_52_12 0x001ffffffffff000
1550#define BM_12_52 BM_52_12
1551#define BM_53_12 0x003ffffffffff000
1552#define BM_12_53 BM_53_12
1553#define BM_54_12 0x007ffffffffff000
1554#define BM_12_54 BM_54_12
1555#define BM_55_12 0x00fffffffffff000
1556#define BM_12_55 BM_55_12
1557#define BM_56_12 0x01fffffffffff000
1558#define BM_12_56 BM_56_12
1559#define BM_57_12 0x03fffffffffff000
1560#define BM_12_57 BM_57_12
1561#define BM_58_12 0x07fffffffffff000
1562#define BM_12_58 BM_58_12
1563#define BM_59_12 0x0ffffffffffff000
1564#define BM_12_59 BM_59_12
1565#define BM_60_12 0x1ffffffffffff000
1566#define BM_12_60 BM_60_12
1567#define BM_61_12 0x3ffffffffffff000
1568#define BM_12_61 BM_61_12
1569#define BM_62_12 0x7ffffffffffff000
1570#define BM_12_62 BM_62_12
1571#define BM_63_12 0xfffffffffffff000
1572#define BM_12_63 BM_63_12
1573#define BM_13_13 0x0000000000002000
1574#define BM_14_13 0x0000000000006000
1575#define BM_13_14 BM_14_13
1576#define BM_15_13 0x000000000000e000
1577#define BM_13_15 BM_15_13
1578#define BM_16_13 0x000000000001e000
1579#define BM_13_16 BM_16_13
1580#define BM_17_13 0x000000000003e000
1581#define BM_13_17 BM_17_13
1582#define BM_18_13 0x000000000007e000
1583#define BM_13_18 BM_18_13
1584#define BM_19_13 0x00000000000fe000
1585#define BM_13_19 BM_19_13
1586#define BM_20_13 0x00000000001fe000
1587#define BM_13_20 BM_20_13
1588#define BM_21_13 0x00000000003fe000
1589#define BM_13_21 BM_21_13
1590#define BM_22_13 0x00000000007fe000
1591#define BM_13_22 BM_22_13
1592#define BM_23_13 0x0000000000ffe000
1593#define BM_13_23 BM_23_13
1594#define BM_24_13 0x0000000001ffe000
1595#define BM_13_24 BM_24_13
1596#define BM_25_13 0x0000000003ffe000
1597#define BM_13_25 BM_25_13
1598#define BM_26_13 0x0000000007ffe000
1599#define BM_13_26 BM_26_13
1600#define BM_27_13 0x000000000fffe000
1601#define BM_13_27 BM_27_13
1602#define BM_28_13 0x000000001fffe000
1603#define BM_13_28 BM_28_13
1604#define BM_29_13 0x000000003fffe000
1605#define BM_13_29 BM_29_13
1606#define BM_30_13 0x000000007fffe000
1607#define BM_13_30 BM_30_13
1608#define BM_31_13 0x00000000ffffe000
1609#define BM_13_31 BM_31_13
1610#define BM_32_13 0x00000001ffffe000
1611#define BM_13_32 BM_32_13
1612#define BM_33_13 0x00000003ffffe000
1613#define BM_13_33 BM_33_13
1614#define BM_34_13 0x00000007ffffe000
1615#define BM_13_34 BM_34_13
1616#define BM_35_13 0x0000000fffffe000
1617#define BM_13_35 BM_35_13
1618#define BM_36_13 0x0000001fffffe000
1619#define BM_13_36 BM_36_13
1620#define BM_37_13 0x0000003fffffe000
1621#define BM_13_37 BM_37_13
1622#define BM_38_13 0x0000007fffffe000
1623#define BM_13_38 BM_38_13
1624#define BM_39_13 0x000000ffffffe000
1625#define BM_13_39 BM_39_13
1626#define BM_40_13 0x000001ffffffe000
1627#define BM_13_40 BM_40_13
1628#define BM_41_13 0x000003ffffffe000
1629#define BM_13_41 BM_41_13
1630#define BM_42_13 0x000007ffffffe000
1631#define BM_13_42 BM_42_13
1632#define BM_43_13 0x00000fffffffe000
1633#define BM_13_43 BM_43_13
1634#define BM_44_13 0x00001fffffffe000
1635#define BM_13_44 BM_44_13
1636#define BM_45_13 0x00003fffffffe000
1637#define BM_13_45 BM_45_13
1638#define BM_46_13 0x00007fffffffe000
1639#define BM_13_46 BM_46_13
1640#define BM_47_13 0x0000ffffffffe000
1641#define BM_13_47 BM_47_13
1642#define BM_48_13 0x0001ffffffffe000
1643#define BM_13_48 BM_48_13
1644#define BM_49_13 0x0003ffffffffe000
1645#define BM_13_49 BM_49_13
1646#define BM_50_13 0x0007ffffffffe000
1647#define BM_13_50 BM_50_13
1648#define BM_51_13 0x000fffffffffe000
1649#define BM_13_51 BM_51_13
1650#define BM_52_13 0x001fffffffffe000
1651#define BM_13_52 BM_52_13
1652#define BM_53_13 0x003fffffffffe000
1653#define BM_13_53 BM_53_13
1654#define BM_54_13 0x007fffffffffe000
1655#define BM_13_54 BM_54_13
1656#define BM_55_13 0x00ffffffffffe000
1657#define BM_13_55 BM_55_13
1658#define BM_56_13 0x01ffffffffffe000
1659#define BM_13_56 BM_56_13
1660#define BM_57_13 0x03ffffffffffe000
1661#define BM_13_57 BM_57_13
1662#define BM_58_13 0x07ffffffffffe000
1663#define BM_13_58 BM_58_13
1664#define BM_59_13 0x0fffffffffffe000
1665#define BM_13_59 BM_59_13
1666#define BM_60_13 0x1fffffffffffe000
1667#define BM_13_60 BM_60_13
1668#define BM_61_13 0x3fffffffffffe000
1669#define BM_13_61 BM_61_13
1670#define BM_62_13 0x7fffffffffffe000
1671#define BM_13_62 BM_62_13
1672#define BM_63_13 0xffffffffffffe000
1673#define BM_13_63 BM_63_13
1674#define BM_14_14 0x0000000000004000
1675#define BM_15_14 0x000000000000c000
1676#define BM_14_15 BM_15_14
1677#define BM_16_14 0x000000000001c000
1678#define BM_14_16 BM_16_14
1679#define BM_17_14 0x000000000003c000
1680#define BM_14_17 BM_17_14
1681#define BM_18_14 0x000000000007c000
1682#define BM_14_18 BM_18_14
1683#define BM_19_14 0x00000000000fc000
1684#define BM_14_19 BM_19_14
1685#define BM_20_14 0x00000000001fc000
1686#define BM_14_20 BM_20_14
1687#define BM_21_14 0x00000000003fc000
1688#define BM_14_21 BM_21_14
1689#define BM_22_14 0x00000000007fc000
1690#define BM_14_22 BM_22_14
1691#define BM_23_14 0x0000000000ffc000
1692#define BM_14_23 BM_23_14
1693#define BM_24_14 0x0000000001ffc000
1694#define BM_14_24 BM_24_14
1695#define BM_25_14 0x0000000003ffc000
1696#define BM_14_25 BM_25_14
1697#define BM_26_14 0x0000000007ffc000
1698#define BM_14_26 BM_26_14
1699#define BM_27_14 0x000000000fffc000
1700#define BM_14_27 BM_27_14
1701#define BM_28_14 0x000000001fffc000
1702#define BM_14_28 BM_28_14
1703#define BM_29_14 0x000000003fffc000
1704#define BM_14_29 BM_29_14
1705#define BM_30_14 0x000000007fffc000
1706#define BM_14_30 BM_30_14
1707#define BM_31_14 0x00000000ffffc000
1708#define BM_14_31 BM_31_14
1709#define BM_32_14 0x00000001ffffc000
1710#define BM_14_32 BM_32_14
1711#define BM_33_14 0x00000003ffffc000
1712#define BM_14_33 BM_33_14
1713#define BM_34_14 0x00000007ffffc000
1714#define BM_14_34 BM_34_14
1715#define BM_35_14 0x0000000fffffc000
1716#define BM_14_35 BM_35_14
1717#define BM_36_14 0x0000001fffffc000
1718#define BM_14_36 BM_36_14
1719#define BM_37_14 0x0000003fffffc000
1720#define BM_14_37 BM_37_14
1721#define BM_38_14 0x0000007fffffc000
1722#define BM_14_38 BM_38_14
1723#define BM_39_14 0x000000ffffffc000
1724#define BM_14_39 BM_39_14
1725#define BM_40_14 0x000001ffffffc000
1726#define BM_14_40 BM_40_14
1727#define BM_41_14 0x000003ffffffc000
1728#define BM_14_41 BM_41_14
1729#define BM_42_14 0x000007ffffffc000
1730#define BM_14_42 BM_42_14
1731#define BM_43_14 0x00000fffffffc000
1732#define BM_14_43 BM_43_14
1733#define BM_44_14 0x00001fffffffc000
1734#define BM_14_44 BM_44_14
1735#define BM_45_14 0x00003fffffffc000
1736#define BM_14_45 BM_45_14
1737#define BM_46_14 0x00007fffffffc000
1738#define BM_14_46 BM_46_14
1739#define BM_47_14 0x0000ffffffffc000
1740#define BM_14_47 BM_47_14
1741#define BM_48_14 0x0001ffffffffc000
1742#define BM_14_48 BM_48_14
1743#define BM_49_14 0x0003ffffffffc000
1744#define BM_14_49 BM_49_14
1745#define BM_50_14 0x0007ffffffffc000
1746#define BM_14_50 BM_50_14
1747#define BM_51_14 0x000fffffffffc000
1748#define BM_14_51 BM_51_14
1749#define BM_52_14 0x001fffffffffc000
1750#define BM_14_52 BM_52_14
1751#define BM_53_14 0x003fffffffffc000
1752#define BM_14_53 BM_53_14
1753#define BM_54_14 0x007fffffffffc000
1754#define BM_14_54 BM_54_14
1755#define BM_55_14 0x00ffffffffffc000
1756#define BM_14_55 BM_55_14
1757#define BM_56_14 0x01ffffffffffc000
1758#define BM_14_56 BM_56_14
1759#define BM_57_14 0x03ffffffffffc000
1760#define BM_14_57 BM_57_14
1761#define BM_58_14 0x07ffffffffffc000
1762#define BM_14_58 BM_58_14
1763#define BM_59_14 0x0fffffffffffc000
1764#define BM_14_59 BM_59_14
1765#define BM_60_14 0x1fffffffffffc000
1766#define BM_14_60 BM_60_14
1767#define BM_61_14 0x3fffffffffffc000
1768#define BM_14_61 BM_61_14
1769#define BM_62_14 0x7fffffffffffc000
1770#define BM_14_62 BM_62_14
1771#define BM_63_14 0xffffffffffffc000
1772#define BM_14_63 BM_63_14
1773#define BM_15_15 0x0000000000008000
1774#define BM_16_15 0x0000000000018000
1775#define BM_15_16 BM_16_15
1776#define BM_17_15 0x0000000000038000
1777#define BM_15_17 BM_17_15
1778#define BM_18_15 0x0000000000078000
1779#define BM_15_18 BM_18_15
1780#define BM_19_15 0x00000000000f8000
1781#define BM_15_19 BM_19_15
1782#define BM_20_15 0x00000000001f8000
1783#define BM_15_20 BM_20_15
1784#define BM_21_15 0x00000000003f8000
1785#define BM_15_21 BM_21_15
1786#define BM_22_15 0x00000000007f8000
1787#define BM_15_22 BM_22_15
1788#define BM_23_15 0x0000000000ff8000
1789#define BM_15_23 BM_23_15
1790#define BM_24_15 0x0000000001ff8000
1791#define BM_15_24 BM_24_15
1792#define BM_25_15 0x0000000003ff8000
1793#define BM_15_25 BM_25_15
1794#define BM_26_15 0x0000000007ff8000
1795#define BM_15_26 BM_26_15
1796#define BM_27_15 0x000000000fff8000
1797#define BM_15_27 BM_27_15
1798#define BM_28_15 0x000000001fff8000
1799#define BM_15_28 BM_28_15
1800#define BM_29_15 0x000000003fff8000
1801#define BM_15_29 BM_29_15
1802#define BM_30_15 0x000000007fff8000
1803#define BM_15_30 BM_30_15
1804#define BM_31_15 0x00000000ffff8000
1805#define BM_15_31 BM_31_15
1806#define BM_32_15 0x00000001ffff8000
1807#define BM_15_32 BM_32_15
1808#define BM_33_15 0x00000003ffff8000
1809#define BM_15_33 BM_33_15
1810#define BM_34_15 0x00000007ffff8000
1811#define BM_15_34 BM_34_15
1812#define BM_35_15 0x0000000fffff8000
1813#define BM_15_35 BM_35_15
1814#define BM_36_15 0x0000001fffff8000
1815#define BM_15_36 BM_36_15
1816#define BM_37_15 0x0000003fffff8000
1817#define BM_15_37 BM_37_15
1818#define BM_38_15 0x0000007fffff8000
1819#define BM_15_38 BM_38_15
1820#define BM_39_15 0x000000ffffff8000
1821#define BM_15_39 BM_39_15
1822#define BM_40_15 0x000001ffffff8000
1823#define BM_15_40 BM_40_15
1824#define BM_41_15 0x000003ffffff8000
1825#define BM_15_41 BM_41_15
1826#define BM_42_15 0x000007ffffff8000
1827#define BM_15_42 BM_42_15
1828#define BM_43_15 0x00000fffffff8000
1829#define BM_15_43 BM_43_15
1830#define BM_44_15 0x00001fffffff8000
1831#define BM_15_44 BM_44_15
1832#define BM_45_15 0x00003fffffff8000
1833#define BM_15_45 BM_45_15
1834#define BM_46_15 0x00007fffffff8000
1835#define BM_15_46 BM_46_15
1836#define BM_47_15 0x0000ffffffff8000
1837#define BM_15_47 BM_47_15
1838#define BM_48_15 0x0001ffffffff8000
1839#define BM_15_48 BM_48_15
1840#define BM_49_15 0x0003ffffffff8000
1841#define BM_15_49 BM_49_15
1842#define BM_50_15 0x0007ffffffff8000
1843#define BM_15_50 BM_50_15
1844#define BM_51_15 0x000fffffffff8000
1845#define BM_15_51 BM_51_15
1846#define BM_52_15 0x001fffffffff8000
1847#define BM_15_52 BM_52_15
1848#define BM_53_15 0x003fffffffff8000
1849#define BM_15_53 BM_53_15
1850#define BM_54_15 0x007fffffffff8000
1851#define BM_15_54 BM_54_15
1852#define BM_55_15 0x00ffffffffff8000
1853#define BM_15_55 BM_55_15
1854#define BM_56_15 0x01ffffffffff8000
1855#define BM_15_56 BM_56_15
1856#define BM_57_15 0x03ffffffffff8000
1857#define BM_15_57 BM_57_15
1858#define BM_58_15 0x07ffffffffff8000
1859#define BM_15_58 BM_58_15
1860#define BM_59_15 0x0fffffffffff8000
1861#define BM_15_59 BM_59_15
1862#define BM_60_15 0x1fffffffffff8000
1863#define BM_15_60 BM_60_15
1864#define BM_61_15 0x3fffffffffff8000
1865#define BM_15_61 BM_61_15
1866#define BM_62_15 0x7fffffffffff8000
1867#define BM_15_62 BM_62_15
1868#define BM_63_15 0xffffffffffff8000
1869#define BM_15_63 BM_63_15
1870#define BM_16_16 0x0000000000010000
1871#define BM_17_16 0x0000000000030000
1872#define BM_16_17 BM_17_16
1873#define BM_18_16 0x0000000000070000
1874#define BM_16_18 BM_18_16
1875#define BM_19_16 0x00000000000f0000
1876#define BM_16_19 BM_19_16
1877#define BM_20_16 0x00000000001f0000
1878#define BM_16_20 BM_20_16
1879#define BM_21_16 0x00000000003f0000
1880#define BM_16_21 BM_21_16
1881#define BM_22_16 0x00000000007f0000
1882#define BM_16_22 BM_22_16
1883#define BM_23_16 0x0000000000ff0000
1884#define BM_16_23 BM_23_16
1885#define BM_24_16 0x0000000001ff0000
1886#define BM_16_24 BM_24_16
1887#define BM_25_16 0x0000000003ff0000
1888#define BM_16_25 BM_25_16
1889#define BM_26_16 0x0000000007ff0000
1890#define BM_16_26 BM_26_16
1891#define BM_27_16 0x000000000fff0000
1892#define BM_16_27 BM_27_16
1893#define BM_28_16 0x000000001fff0000
1894#define BM_16_28 BM_28_16
1895#define BM_29_16 0x000000003fff0000
1896#define BM_16_29 BM_29_16
1897#define BM_30_16 0x000000007fff0000
1898#define BM_16_30 BM_30_16
1899#define BM_31_16 0x00000000ffff0000
1900#define BM_16_31 BM_31_16
1901#define BM_32_16 0x00000001ffff0000
1902#define BM_16_32 BM_32_16
1903#define BM_33_16 0x00000003ffff0000
1904#define BM_16_33 BM_33_16
1905#define BM_34_16 0x00000007ffff0000
1906#define BM_16_34 BM_34_16
1907#define BM_35_16 0x0000000fffff0000
1908#define BM_16_35 BM_35_16
1909#define BM_36_16 0x0000001fffff0000
1910#define BM_16_36 BM_36_16
1911#define BM_37_16 0x0000003fffff0000
1912#define BM_16_37 BM_37_16
1913#define BM_38_16 0x0000007fffff0000
1914#define BM_16_38 BM_38_16
1915#define BM_39_16 0x000000ffffff0000
1916#define BM_16_39 BM_39_16
1917#define BM_40_16 0x000001ffffff0000
1918#define BM_16_40 BM_40_16
1919#define BM_41_16 0x000003ffffff0000
1920#define BM_16_41 BM_41_16
1921#define BM_42_16 0x000007ffffff0000
1922#define BM_16_42 BM_42_16
1923#define BM_43_16 0x00000fffffff0000
1924#define BM_16_43 BM_43_16
1925#define BM_44_16 0x00001fffffff0000
1926#define BM_16_44 BM_44_16
1927#define BM_45_16 0x00003fffffff0000
1928#define BM_16_45 BM_45_16
1929#define BM_46_16 0x00007fffffff0000
1930#define BM_16_46 BM_46_16
1931#define BM_47_16 0x0000ffffffff0000
1932#define BM_16_47 BM_47_16
1933#define BM_48_16 0x0001ffffffff0000
1934#define BM_16_48 BM_48_16
1935#define BM_49_16 0x0003ffffffff0000
1936#define BM_16_49 BM_49_16
1937#define BM_50_16 0x0007ffffffff0000
1938#define BM_16_50 BM_50_16
1939#define BM_51_16 0x000fffffffff0000
1940#define BM_16_51 BM_51_16
1941#define BM_52_16 0x001fffffffff0000
1942#define BM_16_52 BM_52_16
1943#define BM_53_16 0x003fffffffff0000
1944#define BM_16_53 BM_53_16
1945#define BM_54_16 0x007fffffffff0000
1946#define BM_16_54 BM_54_16
1947#define BM_55_16 0x00ffffffffff0000
1948#define BM_16_55 BM_55_16
1949#define BM_56_16 0x01ffffffffff0000
1950#define BM_16_56 BM_56_16
1951#define BM_57_16 0x03ffffffffff0000
1952#define BM_16_57 BM_57_16
1953#define BM_58_16 0x07ffffffffff0000
1954#define BM_16_58 BM_58_16
1955#define BM_59_16 0x0fffffffffff0000
1956#define BM_16_59 BM_59_16
1957#define BM_60_16 0x1fffffffffff0000
1958#define BM_16_60 BM_60_16
1959#define BM_61_16 0x3fffffffffff0000
1960#define BM_16_61 BM_61_16
1961#define BM_62_16 0x7fffffffffff0000
1962#define BM_16_62 BM_62_16
1963#define BM_63_16 0xffffffffffff0000
1964#define BM_16_63 BM_63_16
1965#define BM_17_17 0x0000000000020000
1966#define BM_18_17 0x0000000000060000
1967#define BM_17_18 BM_18_17
1968#define BM_19_17 0x00000000000e0000
1969#define BM_17_19 BM_19_17
1970#define BM_20_17 0x00000000001e0000
1971#define BM_17_20 BM_20_17
1972#define BM_21_17 0x00000000003e0000
1973#define BM_17_21 BM_21_17
1974#define BM_22_17 0x00000000007e0000
1975#define BM_17_22 BM_22_17
1976#define BM_23_17 0x0000000000fe0000
1977#define BM_17_23 BM_23_17
1978#define BM_24_17 0x0000000001fe0000
1979#define BM_17_24 BM_24_17
1980#define BM_25_17 0x0000000003fe0000
1981#define BM_17_25 BM_25_17
1982#define BM_26_17 0x0000000007fe0000
1983#define BM_17_26 BM_26_17
1984#define BM_27_17 0x000000000ffe0000
1985#define BM_17_27 BM_27_17
1986#define BM_28_17 0x000000001ffe0000
1987#define BM_17_28 BM_28_17
1988#define BM_29_17 0x000000003ffe0000
1989#define BM_17_29 BM_29_17
1990#define BM_30_17 0x000000007ffe0000
1991#define BM_17_30 BM_30_17
1992#define BM_31_17 0x00000000fffe0000
1993#define BM_17_31 BM_31_17
1994#define BM_32_17 0x00000001fffe0000
1995#define BM_17_32 BM_32_17
1996#define BM_33_17 0x00000003fffe0000
1997#define BM_17_33 BM_33_17
1998#define BM_34_17 0x00000007fffe0000
1999#define BM_17_34 BM_34_17
2000#define BM_35_17 0x0000000ffffe0000
2001#define BM_17_35 BM_35_17
2002#define BM_36_17 0x0000001ffffe0000
2003#define BM_17_36 BM_36_17
2004#define BM_37_17 0x0000003ffffe0000
2005#define BM_17_37 BM_37_17
2006#define BM_38_17 0x0000007ffffe0000
2007#define BM_17_38 BM_38_17
2008#define BM_39_17 0x000000fffffe0000
2009#define BM_17_39 BM_39_17
2010#define BM_40_17 0x000001fffffe0000
2011#define BM_17_40 BM_40_17
2012#define BM_41_17 0x000003fffffe0000
2013#define BM_17_41 BM_41_17
2014#define BM_42_17 0x000007fffffe0000
2015#define BM_17_42 BM_42_17
2016#define BM_43_17 0x00000ffffffe0000
2017#define BM_17_43 BM_43_17
2018#define BM_44_17 0x00001ffffffe0000
2019#define BM_17_44 BM_44_17
2020#define BM_45_17 0x00003ffffffe0000
2021#define BM_17_45 BM_45_17
2022#define BM_46_17 0x00007ffffffe0000
2023#define BM_17_46 BM_46_17
2024#define BM_47_17 0x0000fffffffe0000
2025#define BM_17_47 BM_47_17
2026#define BM_48_17 0x0001fffffffe0000
2027#define BM_17_48 BM_48_17
2028#define BM_49_17 0x0003fffffffe0000
2029#define BM_17_49 BM_49_17
2030#define BM_50_17 0x0007fffffffe0000
2031#define BM_17_50 BM_50_17
2032#define BM_51_17 0x000ffffffffe0000
2033#define BM_17_51 BM_51_17
2034#define BM_52_17 0x001ffffffffe0000
2035#define BM_17_52 BM_52_17
2036#define BM_53_17 0x003ffffffffe0000
2037#define BM_17_53 BM_53_17
2038#define BM_54_17 0x007ffffffffe0000
2039#define BM_17_54 BM_54_17
2040#define BM_55_17 0x00fffffffffe0000
2041#define BM_17_55 BM_55_17
2042#define BM_56_17 0x01fffffffffe0000
2043#define BM_17_56 BM_56_17
2044#define BM_57_17 0x03fffffffffe0000
2045#define BM_17_57 BM_57_17
2046#define BM_58_17 0x07fffffffffe0000
2047#define BM_17_58 BM_58_17
2048#define BM_59_17 0x0ffffffffffe0000
2049#define BM_17_59 BM_59_17
2050#define BM_60_17 0x1ffffffffffe0000
2051#define BM_17_60 BM_60_17
2052#define BM_61_17 0x3ffffffffffe0000
2053#define BM_17_61 BM_61_17
2054#define BM_62_17 0x7ffffffffffe0000
2055#define BM_17_62 BM_62_17
2056#define BM_63_17 0xfffffffffffe0000
2057#define BM_17_63 BM_63_17
2058#define BM_18_18 0x0000000000040000
2059#define BM_19_18 0x00000000000c0000
2060#define BM_18_19 BM_19_18
2061#define BM_20_18 0x00000000001c0000
2062#define BM_18_20 BM_20_18
2063#define BM_21_18 0x00000000003c0000
2064#define BM_18_21 BM_21_18
2065#define BM_22_18 0x00000000007c0000
2066#define BM_18_22 BM_22_18
2067#define BM_23_18 0x0000000000fc0000
2068#define BM_18_23 BM_23_18
2069#define BM_24_18 0x0000000001fc0000
2070#define BM_18_24 BM_24_18
2071#define BM_25_18 0x0000000003fc0000
2072#define BM_18_25 BM_25_18
2073#define BM_26_18 0x0000000007fc0000
2074#define BM_18_26 BM_26_18
2075#define BM_27_18 0x000000000ffc0000
2076#define BM_18_27 BM_27_18
2077#define BM_28_18 0x000000001ffc0000
2078#define BM_18_28 BM_28_18
2079#define BM_29_18 0x000000003ffc0000
2080#define BM_18_29 BM_29_18
2081#define BM_30_18 0x000000007ffc0000
2082#define BM_18_30 BM_30_18
2083#define BM_31_18 0x00000000fffc0000
2084#define BM_18_31 BM_31_18
2085#define BM_32_18 0x00000001fffc0000
2086#define BM_18_32 BM_32_18
2087#define BM_33_18 0x00000003fffc0000
2088#define BM_18_33 BM_33_18
2089#define BM_34_18 0x00000007fffc0000
2090#define BM_18_34 BM_34_18
2091#define BM_35_18 0x0000000ffffc0000
2092#define BM_18_35 BM_35_18
2093#define BM_36_18 0x0000001ffffc0000
2094#define BM_18_36 BM_36_18
2095#define BM_37_18 0x0000003ffffc0000
2096#define BM_18_37 BM_37_18
2097#define BM_38_18 0x0000007ffffc0000
2098#define BM_18_38 BM_38_18
2099#define BM_39_18 0x000000fffffc0000
2100#define BM_18_39 BM_39_18
2101#define BM_40_18 0x000001fffffc0000
2102#define BM_18_40 BM_40_18
2103#define BM_41_18 0x000003fffffc0000
2104#define BM_18_41 BM_41_18
2105#define BM_42_18 0x000007fffffc0000
2106#define BM_18_42 BM_42_18
2107#define BM_43_18 0x00000ffffffc0000
2108#define BM_18_43 BM_43_18
2109#define BM_44_18 0x00001ffffffc0000
2110#define BM_18_44 BM_44_18
2111#define BM_45_18 0x00003ffffffc0000
2112#define BM_18_45 BM_45_18
2113#define BM_46_18 0x00007ffffffc0000
2114#define BM_18_46 BM_46_18
2115#define BM_47_18 0x0000fffffffc0000
2116#define BM_18_47 BM_47_18
2117#define BM_48_18 0x0001fffffffc0000
2118#define BM_18_48 BM_48_18
2119#define BM_49_18 0x0003fffffffc0000
2120#define BM_18_49 BM_49_18
2121#define BM_50_18 0x0007fffffffc0000
2122#define BM_18_50 BM_50_18
2123#define BM_51_18 0x000ffffffffc0000
2124#define BM_18_51 BM_51_18
2125#define BM_52_18 0x001ffffffffc0000
2126#define BM_18_52 BM_52_18
2127#define BM_53_18 0x003ffffffffc0000
2128#define BM_18_53 BM_53_18
2129#define BM_54_18 0x007ffffffffc0000
2130#define BM_18_54 BM_54_18
2131#define BM_55_18 0x00fffffffffc0000
2132#define BM_18_55 BM_55_18
2133#define BM_56_18 0x01fffffffffc0000
2134#define BM_18_56 BM_56_18
2135#define BM_57_18 0x03fffffffffc0000
2136#define BM_18_57 BM_57_18
2137#define BM_58_18 0x07fffffffffc0000
2138#define BM_18_58 BM_58_18
2139#define BM_59_18 0x0ffffffffffc0000
2140#define BM_18_59 BM_59_18
2141#define BM_60_18 0x1ffffffffffc0000
2142#define BM_18_60 BM_60_18
2143#define BM_61_18 0x3ffffffffffc0000
2144#define BM_18_61 BM_61_18
2145#define BM_62_18 0x7ffffffffffc0000
2146#define BM_18_62 BM_62_18
2147#define BM_63_18 0xfffffffffffc0000
2148#define BM_18_63 BM_63_18
2149#define BM_19_19 0x0000000000080000
2150#define BM_20_19 0x0000000000180000
2151#define BM_19_20 BM_20_19
2152#define BM_21_19 0x0000000000380000
2153#define BM_19_21 BM_21_19
2154#define BM_22_19 0x0000000000780000
2155#define BM_19_22 BM_22_19
2156#define BM_23_19 0x0000000000f80000
2157#define BM_19_23 BM_23_19
2158#define BM_24_19 0x0000000001f80000
2159#define BM_19_24 BM_24_19
2160#define BM_25_19 0x0000000003f80000
2161#define BM_19_25 BM_25_19
2162#define BM_26_19 0x0000000007f80000
2163#define BM_19_26 BM_26_19
2164#define BM_27_19 0x000000000ff80000
2165#define BM_19_27 BM_27_19
2166#define BM_28_19 0x000000001ff80000
2167#define BM_19_28 BM_28_19
2168#define BM_29_19 0x000000003ff80000
2169#define BM_19_29 BM_29_19
2170#define BM_30_19 0x000000007ff80000
2171#define BM_19_30 BM_30_19
2172#define BM_31_19 0x00000000fff80000
2173#define BM_19_31 BM_31_19
2174#define BM_32_19 0x00000001fff80000
2175#define BM_19_32 BM_32_19
2176#define BM_33_19 0x00000003fff80000
2177#define BM_19_33 BM_33_19
2178#define BM_34_19 0x00000007fff80000
2179#define BM_19_34 BM_34_19
2180#define BM_35_19 0x0000000ffff80000
2181#define BM_19_35 BM_35_19
2182#define BM_36_19 0x0000001ffff80000
2183#define BM_19_36 BM_36_19
2184#define BM_37_19 0x0000003ffff80000
2185#define BM_19_37 BM_37_19
2186#define BM_38_19 0x0000007ffff80000
2187#define BM_19_38 BM_38_19
2188#define BM_39_19 0x000000fffff80000
2189#define BM_19_39 BM_39_19
2190#define BM_40_19 0x000001fffff80000
2191#define BM_19_40 BM_40_19
2192#define BM_41_19 0x000003fffff80000
2193#define BM_19_41 BM_41_19
2194#define BM_42_19 0x000007fffff80000
2195#define BM_19_42 BM_42_19
2196#define BM_43_19 0x00000ffffff80000
2197#define BM_19_43 BM_43_19
2198#define BM_44_19 0x00001ffffff80000
2199#define BM_19_44 BM_44_19
2200#define BM_45_19 0x00003ffffff80000
2201#define BM_19_45 BM_45_19
2202#define BM_46_19 0x00007ffffff80000
2203#define BM_19_46 BM_46_19
2204#define BM_47_19 0x0000fffffff80000
2205#define BM_19_47 BM_47_19
2206#define BM_48_19 0x0001fffffff80000
2207#define BM_19_48 BM_48_19
2208#define BM_49_19 0x0003fffffff80000
2209#define BM_19_49 BM_49_19
2210#define BM_50_19 0x0007fffffff80000
2211#define BM_19_50 BM_50_19
2212#define BM_51_19 0x000ffffffff80000
2213#define BM_19_51 BM_51_19
2214#define BM_52_19 0x001ffffffff80000
2215#define BM_19_52 BM_52_19
2216#define BM_53_19 0x003ffffffff80000
2217#define BM_19_53 BM_53_19
2218#define BM_54_19 0x007ffffffff80000
2219#define BM_19_54 BM_54_19
2220#define BM_55_19 0x00fffffffff80000
2221#define BM_19_55 BM_55_19
2222#define BM_56_19 0x01fffffffff80000
2223#define BM_19_56 BM_56_19
2224#define BM_57_19 0x03fffffffff80000
2225#define BM_19_57 BM_57_19
2226#define BM_58_19 0x07fffffffff80000
2227#define BM_19_58 BM_58_19
2228#define BM_59_19 0x0ffffffffff80000
2229#define BM_19_59 BM_59_19
2230#define BM_60_19 0x1ffffffffff80000
2231#define BM_19_60 BM_60_19
2232#define BM_61_19 0x3ffffffffff80000
2233#define BM_19_61 BM_61_19
2234#define BM_62_19 0x7ffffffffff80000
2235#define BM_19_62 BM_62_19
2236#define BM_63_19 0xfffffffffff80000
2237#define BM_19_63 BM_63_19
2238#define BM_20_20 0x0000000000100000
2239#define BM_21_20 0x0000000000300000
2240#define BM_20_21 BM_21_20
2241#define BM_22_20 0x0000000000700000
2242#define BM_20_22 BM_22_20
2243#define BM_23_20 0x0000000000f00000
2244#define BM_20_23 BM_23_20
2245#define BM_24_20 0x0000000001f00000
2246#define BM_20_24 BM_24_20
2247#define BM_25_20 0x0000000003f00000
2248#define BM_20_25 BM_25_20
2249#define BM_26_20 0x0000000007f00000
2250#define BM_20_26 BM_26_20
2251#define BM_27_20 0x000000000ff00000
2252#define BM_20_27 BM_27_20
2253#define BM_28_20 0x000000001ff00000
2254#define BM_20_28 BM_28_20
2255#define BM_29_20 0x000000003ff00000
2256#define BM_20_29 BM_29_20
2257#define BM_30_20 0x000000007ff00000
2258#define BM_20_30 BM_30_20
2259#define BM_31_20 0x00000000fff00000
2260#define BM_20_31 BM_31_20
2261#define BM_32_20 0x00000001fff00000
2262#define BM_20_32 BM_32_20
2263#define BM_33_20 0x00000003fff00000
2264#define BM_20_33 BM_33_20
2265#define BM_34_20 0x00000007fff00000
2266#define BM_20_34 BM_34_20
2267#define BM_35_20 0x0000000ffff00000
2268#define BM_20_35 BM_35_20
2269#define BM_36_20 0x0000001ffff00000
2270#define BM_20_36 BM_36_20
2271#define BM_37_20 0x0000003ffff00000
2272#define BM_20_37 BM_37_20
2273#define BM_38_20 0x0000007ffff00000
2274#define BM_20_38 BM_38_20
2275#define BM_39_20 0x000000fffff00000
2276#define BM_20_39 BM_39_20
2277#define BM_40_20 0x000001fffff00000
2278#define BM_20_40 BM_40_20
2279#define BM_41_20 0x000003fffff00000
2280#define BM_20_41 BM_41_20
2281#define BM_42_20 0x000007fffff00000
2282#define BM_20_42 BM_42_20
2283#define BM_43_20 0x00000ffffff00000
2284#define BM_20_43 BM_43_20
2285#define BM_44_20 0x00001ffffff00000
2286#define BM_20_44 BM_44_20
2287#define BM_45_20 0x00003ffffff00000
2288#define BM_20_45 BM_45_20
2289#define BM_46_20 0x00007ffffff00000
2290#define BM_20_46 BM_46_20
2291#define BM_47_20 0x0000fffffff00000
2292#define BM_20_47 BM_47_20
2293#define BM_48_20 0x0001fffffff00000
2294#define BM_20_48 BM_48_20
2295#define BM_49_20 0x0003fffffff00000
2296#define BM_20_49 BM_49_20
2297#define BM_50_20 0x0007fffffff00000
2298#define BM_20_50 BM_50_20
2299#define BM_51_20 0x000ffffffff00000
2300#define BM_20_51 BM_51_20
2301#define BM_52_20 0x001ffffffff00000
2302#define BM_20_52 BM_52_20
2303#define BM_53_20 0x003ffffffff00000
2304#define BM_20_53 BM_53_20
2305#define BM_54_20 0x007ffffffff00000
2306#define BM_20_54 BM_54_20
2307#define BM_55_20 0x00fffffffff00000
2308#define BM_20_55 BM_55_20
2309#define BM_56_20 0x01fffffffff00000
2310#define BM_20_56 BM_56_20
2311#define BM_57_20 0x03fffffffff00000
2312#define BM_20_57 BM_57_20
2313#define BM_58_20 0x07fffffffff00000
2314#define BM_20_58 BM_58_20
2315#define BM_59_20 0x0ffffffffff00000
2316#define BM_20_59 BM_59_20
2317#define BM_60_20 0x1ffffffffff00000
2318#define BM_20_60 BM_60_20
2319#define BM_61_20 0x3ffffffffff00000
2320#define BM_20_61 BM_61_20
2321#define BM_62_20 0x7ffffffffff00000
2322#define BM_20_62 BM_62_20
2323#define BM_63_20 0xfffffffffff00000
2324#define BM_20_63 BM_63_20
2325#define BM_21_21 0x0000000000200000
2326#define BM_22_21 0x0000000000600000
2327#define BM_21_22 BM_22_21
2328#define BM_23_21 0x0000000000e00000
2329#define BM_21_23 BM_23_21
2330#define BM_24_21 0x0000000001e00000
2331#define BM_21_24 BM_24_21
2332#define BM_25_21 0x0000000003e00000
2333#define BM_21_25 BM_25_21
2334#define BM_26_21 0x0000000007e00000
2335#define BM_21_26 BM_26_21
2336#define BM_27_21 0x000000000fe00000
2337#define BM_21_27 BM_27_21
2338#define BM_28_21 0x000000001fe00000
2339#define BM_21_28 BM_28_21
2340#define BM_29_21 0x000000003fe00000
2341#define BM_21_29 BM_29_21
2342#define BM_30_21 0x000000007fe00000
2343#define BM_21_30 BM_30_21
2344#define BM_31_21 0x00000000ffe00000
2345#define BM_21_31 BM_31_21
2346#define BM_32_21 0x00000001ffe00000
2347#define BM_21_32 BM_32_21
2348#define BM_33_21 0x00000003ffe00000
2349#define BM_21_33 BM_33_21
2350#define BM_34_21 0x00000007ffe00000
2351#define BM_21_34 BM_34_21
2352#define BM_35_21 0x0000000fffe00000
2353#define BM_21_35 BM_35_21
2354#define BM_36_21 0x0000001fffe00000
2355#define BM_21_36 BM_36_21
2356#define BM_37_21 0x0000003fffe00000
2357#define BM_21_37 BM_37_21
2358#define BM_38_21 0x0000007fffe00000
2359#define BM_21_38 BM_38_21
2360#define BM_39_21 0x000000ffffe00000
2361#define BM_21_39 BM_39_21
2362#define BM_40_21 0x000001ffffe00000
2363#define BM_21_40 BM_40_21
2364#define BM_41_21 0x000003ffffe00000
2365#define BM_21_41 BM_41_21
2366#define BM_42_21 0x000007ffffe00000
2367#define BM_21_42 BM_42_21
2368#define BM_43_21 0x00000fffffe00000
2369#define BM_21_43 BM_43_21
2370#define BM_44_21 0x00001fffffe00000
2371#define BM_21_44 BM_44_21
2372#define BM_45_21 0x00003fffffe00000
2373#define BM_21_45 BM_45_21
2374#define BM_46_21 0x00007fffffe00000
2375#define BM_21_46 BM_46_21
2376#define BM_47_21 0x0000ffffffe00000
2377#define BM_21_47 BM_47_21
2378#define BM_48_21 0x0001ffffffe00000
2379#define BM_21_48 BM_48_21
2380#define BM_49_21 0x0003ffffffe00000
2381#define BM_21_49 BM_49_21
2382#define BM_50_21 0x0007ffffffe00000
2383#define BM_21_50 BM_50_21
2384#define BM_51_21 0x000fffffffe00000
2385#define BM_21_51 BM_51_21
2386#define BM_52_21 0x001fffffffe00000
2387#define BM_21_52 BM_52_21
2388#define BM_53_21 0x003fffffffe00000
2389#define BM_21_53 BM_53_21
2390#define BM_54_21 0x007fffffffe00000
2391#define BM_21_54 BM_54_21
2392#define BM_55_21 0x00ffffffffe00000
2393#define BM_21_55 BM_55_21
2394#define BM_56_21 0x01ffffffffe00000
2395#define BM_21_56 BM_56_21
2396#define BM_57_21 0x03ffffffffe00000
2397#define BM_21_57 BM_57_21
2398#define BM_58_21 0x07ffffffffe00000
2399#define BM_21_58 BM_58_21
2400#define BM_59_21 0x0fffffffffe00000
2401#define BM_21_59 BM_59_21
2402#define BM_60_21 0x1fffffffffe00000
2403#define BM_21_60 BM_60_21
2404#define BM_61_21 0x3fffffffffe00000
2405#define BM_21_61 BM_61_21
2406#define BM_62_21 0x7fffffffffe00000
2407#define BM_21_62 BM_62_21
2408#define BM_63_21 0xffffffffffe00000
2409#define BM_21_63 BM_63_21
2410#define BM_22_22 0x0000000000400000
2411#define BM_23_22 0x0000000000c00000
2412#define BM_22_23 BM_23_22
2413#define BM_24_22 0x0000000001c00000
2414#define BM_22_24 BM_24_22
2415#define BM_25_22 0x0000000003c00000
2416#define BM_22_25 BM_25_22
2417#define BM_26_22 0x0000000007c00000
2418#define BM_22_26 BM_26_22
2419#define BM_27_22 0x000000000fc00000
2420#define BM_22_27 BM_27_22
2421#define BM_28_22 0x000000001fc00000
2422#define BM_22_28 BM_28_22
2423#define BM_29_22 0x000000003fc00000
2424#define BM_22_29 BM_29_22
2425#define BM_30_22 0x000000007fc00000
2426#define BM_22_30 BM_30_22
2427#define BM_31_22 0x00000000ffc00000
2428#define BM_22_31 BM_31_22
2429#define BM_32_22 0x00000001ffc00000
2430#define BM_22_32 BM_32_22
2431#define BM_33_22 0x00000003ffc00000
2432#define BM_22_33 BM_33_22
2433#define BM_34_22 0x00000007ffc00000
2434#define BM_22_34 BM_34_22
2435#define BM_35_22 0x0000000fffc00000
2436#define BM_22_35 BM_35_22
2437#define BM_36_22 0x0000001fffc00000
2438#define BM_22_36 BM_36_22
2439#define BM_37_22 0x0000003fffc00000
2440#define BM_22_37 BM_37_22
2441#define BM_38_22 0x0000007fffc00000
2442#define BM_22_38 BM_38_22
2443#define BM_39_22 0x000000ffffc00000
2444#define BM_22_39 BM_39_22
2445#define BM_40_22 0x000001ffffc00000
2446#define BM_22_40 BM_40_22
2447#define BM_41_22 0x000003ffffc00000
2448#define BM_22_41 BM_41_22
2449#define BM_42_22 0x000007ffffc00000
2450#define BM_22_42 BM_42_22
2451#define BM_43_22 0x00000fffffc00000
2452#define BM_22_43 BM_43_22
2453#define BM_44_22 0x00001fffffc00000
2454#define BM_22_44 BM_44_22
2455#define BM_45_22 0x00003fffffc00000
2456#define BM_22_45 BM_45_22
2457#define BM_46_22 0x00007fffffc00000
2458#define BM_22_46 BM_46_22
2459#define BM_47_22 0x0000ffffffc00000
2460#define BM_22_47 BM_47_22
2461#define BM_48_22 0x0001ffffffc00000
2462#define BM_22_48 BM_48_22
2463#define BM_49_22 0x0003ffffffc00000
2464#define BM_22_49 BM_49_22
2465#define BM_50_22 0x0007ffffffc00000
2466#define BM_22_50 BM_50_22
2467#define BM_51_22 0x000fffffffc00000
2468#define BM_22_51 BM_51_22
2469#define BM_52_22 0x001fffffffc00000
2470#define BM_22_52 BM_52_22
2471#define BM_53_22 0x003fffffffc00000
2472#define BM_22_53 BM_53_22
2473#define BM_54_22 0x007fffffffc00000
2474#define BM_22_54 BM_54_22
2475#define BM_55_22 0x00ffffffffc00000
2476#define BM_22_55 BM_55_22
2477#define BM_56_22 0x01ffffffffc00000
2478#define BM_22_56 BM_56_22
2479#define BM_57_22 0x03ffffffffc00000
2480#define BM_22_57 BM_57_22
2481#define BM_58_22 0x07ffffffffc00000
2482#define BM_22_58 BM_58_22
2483#define BM_59_22 0x0fffffffffc00000
2484#define BM_22_59 BM_59_22
2485#define BM_60_22 0x1fffffffffc00000
2486#define BM_22_60 BM_60_22
2487#define BM_61_22 0x3fffffffffc00000
2488#define BM_22_61 BM_61_22
2489#define BM_62_22 0x7fffffffffc00000
2490#define BM_22_62 BM_62_22
2491#define BM_63_22 0xffffffffffc00000
2492#define BM_22_63 BM_63_22
2493#define BM_23_23 0x0000000000800000
2494#define BM_24_23 0x0000000001800000
2495#define BM_23_24 BM_24_23
2496#define BM_25_23 0x0000000003800000
2497#define BM_23_25 BM_25_23
2498#define BM_26_23 0x0000000007800000
2499#define BM_23_26 BM_26_23
2500#define BM_27_23 0x000000000f800000
2501#define BM_23_27 BM_27_23
2502#define BM_28_23 0x000000001f800000
2503#define BM_23_28 BM_28_23
2504#define BM_29_23 0x000000003f800000
2505#define BM_23_29 BM_29_23
2506#define BM_30_23 0x000000007f800000
2507#define BM_23_30 BM_30_23
2508#define BM_31_23 0x00000000ff800000
2509#define BM_23_31 BM_31_23
2510#define BM_32_23 0x00000001ff800000
2511#define BM_23_32 BM_32_23
2512#define BM_33_23 0x00000003ff800000
2513#define BM_23_33 BM_33_23
2514#define BM_34_23 0x00000007ff800000
2515#define BM_23_34 BM_34_23
2516#define BM_35_23 0x0000000fff800000
2517#define BM_23_35 BM_35_23
2518#define BM_36_23 0x0000001fff800000
2519#define BM_23_36 BM_36_23
2520#define BM_37_23 0x0000003fff800000
2521#define BM_23_37 BM_37_23
2522#define BM_38_23 0x0000007fff800000
2523#define BM_23_38 BM_38_23
2524#define BM_39_23 0x000000ffff800000
2525#define BM_23_39 BM_39_23
2526#define BM_40_23 0x000001ffff800000
2527#define BM_23_40 BM_40_23
2528#define BM_41_23 0x000003ffff800000
2529#define BM_23_41 BM_41_23
2530#define BM_42_23 0x000007ffff800000
2531#define BM_23_42 BM_42_23
2532#define BM_43_23 0x00000fffff800000
2533#define BM_23_43 BM_43_23
2534#define BM_44_23 0x00001fffff800000
2535#define BM_23_44 BM_44_23
2536#define BM_45_23 0x00003fffff800000
2537#define BM_23_45 BM_45_23
2538#define BM_46_23 0x00007fffff800000
2539#define BM_23_46 BM_46_23
2540#define BM_47_23 0x0000ffffff800000
2541#define BM_23_47 BM_47_23
2542#define BM_48_23 0x0001ffffff800000
2543#define BM_23_48 BM_48_23
2544#define BM_49_23 0x0003ffffff800000
2545#define BM_23_49 BM_49_23
2546#define BM_50_23 0x0007ffffff800000
2547#define BM_23_50 BM_50_23
2548#define BM_51_23 0x000fffffff800000
2549#define BM_23_51 BM_51_23
2550#define BM_52_23 0x001fffffff800000
2551#define BM_23_52 BM_52_23
2552#define BM_53_23 0x003fffffff800000
2553#define BM_23_53 BM_53_23
2554#define BM_54_23 0x007fffffff800000
2555#define BM_23_54 BM_54_23
2556#define BM_55_23 0x00ffffffff800000
2557#define BM_23_55 BM_55_23
2558#define BM_56_23 0x01ffffffff800000
2559#define BM_23_56 BM_56_23
2560#define BM_57_23 0x03ffffffff800000
2561#define BM_23_57 BM_57_23
2562#define BM_58_23 0x07ffffffff800000
2563#define BM_23_58 BM_58_23
2564#define BM_59_23 0x0fffffffff800000
2565#define BM_23_59 BM_59_23
2566#define BM_60_23 0x1fffffffff800000
2567#define BM_23_60 BM_60_23
2568#define BM_61_23 0x3fffffffff800000
2569#define BM_23_61 BM_61_23
2570#define BM_62_23 0x7fffffffff800000
2571#define BM_23_62 BM_62_23
2572#define BM_63_23 0xffffffffff800000
2573#define BM_23_63 BM_63_23
2574#define BM_24_24 0x0000000001000000
2575#define BM_25_24 0x0000000003000000
2576#define BM_24_25 BM_25_24
2577#define BM_26_24 0x0000000007000000
2578#define BM_24_26 BM_26_24
2579#define BM_27_24 0x000000000f000000
2580#define BM_24_27 BM_27_24
2581#define BM_28_24 0x000000001f000000
2582#define BM_24_28 BM_28_24
2583#define BM_29_24 0x000000003f000000
2584#define BM_24_29 BM_29_24
2585#define BM_30_24 0x000000007f000000
2586#define BM_24_30 BM_30_24
2587#define BM_31_24 0x00000000ff000000
2588#define BM_24_31 BM_31_24
2589#define BM_32_24 0x00000001ff000000
2590#define BM_24_32 BM_32_24
2591#define BM_33_24 0x00000003ff000000
2592#define BM_24_33 BM_33_24
2593#define BM_34_24 0x00000007ff000000
2594#define BM_24_34 BM_34_24
2595#define BM_35_24 0x0000000fff000000
2596#define BM_24_35 BM_35_24
2597#define BM_36_24 0x0000001fff000000
2598#define BM_24_36 BM_36_24
2599#define BM_37_24 0x0000003fff000000
2600#define BM_24_37 BM_37_24
2601#define BM_38_24 0x0000007fff000000
2602#define BM_24_38 BM_38_24
2603#define BM_39_24 0x000000ffff000000
2604#define BM_24_39 BM_39_24
2605#define BM_40_24 0x000001ffff000000
2606#define BM_24_40 BM_40_24
2607#define BM_41_24 0x000003ffff000000
2608#define BM_24_41 BM_41_24
2609#define BM_42_24 0x000007ffff000000
2610#define BM_24_42 BM_42_24
2611#define BM_43_24 0x00000fffff000000
2612#define BM_24_43 BM_43_24
2613#define BM_44_24 0x00001fffff000000
2614#define BM_24_44 BM_44_24
2615#define BM_45_24 0x00003fffff000000
2616#define BM_24_45 BM_45_24
2617#define BM_46_24 0x00007fffff000000
2618#define BM_24_46 BM_46_24
2619#define BM_47_24 0x0000ffffff000000
2620#define BM_24_47 BM_47_24
2621#define BM_48_24 0x0001ffffff000000
2622#define BM_24_48 BM_48_24
2623#define BM_49_24 0x0003ffffff000000
2624#define BM_24_49 BM_49_24
2625#define BM_50_24 0x0007ffffff000000
2626#define BM_24_50 BM_50_24
2627#define BM_51_24 0x000fffffff000000
2628#define BM_24_51 BM_51_24
2629#define BM_52_24 0x001fffffff000000
2630#define BM_24_52 BM_52_24
2631#define BM_53_24 0x003fffffff000000
2632#define BM_24_53 BM_53_24
2633#define BM_54_24 0x007fffffff000000
2634#define BM_24_54 BM_54_24
2635#define BM_55_24 0x00ffffffff000000
2636#define BM_24_55 BM_55_24
2637#define BM_56_24 0x01ffffffff000000
2638#define BM_24_56 BM_56_24
2639#define BM_57_24 0x03ffffffff000000
2640#define BM_24_57 BM_57_24
2641#define BM_58_24 0x07ffffffff000000
2642#define BM_24_58 BM_58_24
2643#define BM_59_24 0x0fffffffff000000
2644#define BM_24_59 BM_59_24
2645#define BM_60_24 0x1fffffffff000000
2646#define BM_24_60 BM_60_24
2647#define BM_61_24 0x3fffffffff000000
2648#define BM_24_61 BM_61_24
2649#define BM_62_24 0x7fffffffff000000
2650#define BM_24_62 BM_62_24
2651#define BM_63_24 0xffffffffff000000
2652#define BM_24_63 BM_63_24
2653#define BM_25_25 0x0000000002000000
2654#define BM_26_25 0x0000000006000000
2655#define BM_25_26 BM_26_25
2656#define BM_27_25 0x000000000e000000
2657#define BM_25_27 BM_27_25
2658#define BM_28_25 0x000000001e000000
2659#define BM_25_28 BM_28_25
2660#define BM_29_25 0x000000003e000000
2661#define BM_25_29 BM_29_25
2662#define BM_30_25 0x000000007e000000
2663#define BM_25_30 BM_30_25
2664#define BM_31_25 0x00000000fe000000
2665#define BM_25_31 BM_31_25
2666#define BM_32_25 0x00000001fe000000
2667#define BM_25_32 BM_32_25
2668#define BM_33_25 0x00000003fe000000
2669#define BM_25_33 BM_33_25
2670#define BM_34_25 0x00000007fe000000
2671#define BM_25_34 BM_34_25
2672#define BM_35_25 0x0000000ffe000000
2673#define BM_25_35 BM_35_25
2674#define BM_36_25 0x0000001ffe000000
2675#define BM_25_36 BM_36_25
2676#define BM_37_25 0x0000003ffe000000
2677#define BM_25_37 BM_37_25
2678#define BM_38_25 0x0000007ffe000000
2679#define BM_25_38 BM_38_25
2680#define BM_39_25 0x000000fffe000000
2681#define BM_25_39 BM_39_25
2682#define BM_40_25 0x000001fffe000000
2683#define BM_25_40 BM_40_25
2684#define BM_41_25 0x000003fffe000000
2685#define BM_25_41 BM_41_25
2686#define BM_42_25 0x000007fffe000000
2687#define BM_25_42 BM_42_25
2688#define BM_43_25 0x00000ffffe000000
2689#define BM_25_43 BM_43_25
2690#define BM_44_25 0x00001ffffe000000
2691#define BM_25_44 BM_44_25
2692#define BM_45_25 0x00003ffffe000000
2693#define BM_25_45 BM_45_25
2694#define BM_46_25 0x00007ffffe000000
2695#define BM_25_46 BM_46_25
2696#define BM_47_25 0x0000fffffe000000
2697#define BM_25_47 BM_47_25
2698#define BM_48_25 0x0001fffffe000000
2699#define BM_25_48 BM_48_25
2700#define BM_49_25 0x0003fffffe000000
2701#define BM_25_49 BM_49_25
2702#define BM_50_25 0x0007fffffe000000
2703#define BM_25_50 BM_50_25
2704#define BM_51_25 0x000ffffffe000000
2705#define BM_25_51 BM_51_25
2706#define BM_52_25 0x001ffffffe000000
2707#define BM_25_52 BM_52_25
2708#define BM_53_25 0x003ffffffe000000
2709#define BM_25_53 BM_53_25
2710#define BM_54_25 0x007ffffffe000000
2711#define BM_25_54 BM_54_25
2712#define BM_55_25 0x00fffffffe000000
2713#define BM_25_55 BM_55_25
2714#define BM_56_25 0x01fffffffe000000
2715#define BM_25_56 BM_56_25
2716#define BM_57_25 0x03fffffffe000000
2717#define BM_25_57 BM_57_25
2718#define BM_58_25 0x07fffffffe000000
2719#define BM_25_58 BM_58_25
2720#define BM_59_25 0x0ffffffffe000000
2721#define BM_25_59 BM_59_25
2722#define BM_60_25 0x1ffffffffe000000
2723#define BM_25_60 BM_60_25
2724#define BM_61_25 0x3ffffffffe000000
2725#define BM_25_61 BM_61_25
2726#define BM_62_25 0x7ffffffffe000000
2727#define BM_25_62 BM_62_25
2728#define BM_63_25 0xfffffffffe000000
2729#define BM_25_63 BM_63_25
2730#define BM_26_26 0x0000000004000000
2731#define BM_27_26 0x000000000c000000
2732#define BM_26_27 BM_27_26
2733#define BM_28_26 0x000000001c000000
2734#define BM_26_28 BM_28_26
2735#define BM_29_26 0x000000003c000000
2736#define BM_26_29 BM_29_26
2737#define BM_30_26 0x000000007c000000
2738#define BM_26_30 BM_30_26
2739#define BM_31_26 0x00000000fc000000
2740#define BM_26_31 BM_31_26
2741#define BM_32_26 0x00000001fc000000
2742#define BM_26_32 BM_32_26
2743#define BM_33_26 0x00000003fc000000
2744#define BM_26_33 BM_33_26
2745#define BM_34_26 0x00000007fc000000
2746#define BM_26_34 BM_34_26
2747#define BM_35_26 0x0000000ffc000000
2748#define BM_26_35 BM_35_26
2749#define BM_36_26 0x0000001ffc000000
2750#define BM_26_36 BM_36_26
2751#define BM_37_26 0x0000003ffc000000
2752#define BM_26_37 BM_37_26
2753#define BM_38_26 0x0000007ffc000000
2754#define BM_26_38 BM_38_26
2755#define BM_39_26 0x000000fffc000000
2756#define BM_26_39 BM_39_26
2757#define BM_40_26 0x000001fffc000000
2758#define BM_26_40 BM_40_26
2759#define BM_41_26 0x000003fffc000000
2760#define BM_26_41 BM_41_26
2761#define BM_42_26 0x000007fffc000000
2762#define BM_26_42 BM_42_26
2763#define BM_43_26 0x00000ffffc000000
2764#define BM_26_43 BM_43_26
2765#define BM_44_26 0x00001ffffc000000
2766#define BM_26_44 BM_44_26
2767#define BM_45_26 0x00003ffffc000000
2768#define BM_26_45 BM_45_26
2769#define BM_46_26 0x00007ffffc000000
2770#define BM_26_46 BM_46_26
2771#define BM_47_26 0x0000fffffc000000
2772#define BM_26_47 BM_47_26
2773#define BM_48_26 0x0001fffffc000000
2774#define BM_26_48 BM_48_26
2775#define BM_49_26 0x0003fffffc000000
2776#define BM_26_49 BM_49_26
2777#define BM_50_26 0x0007fffffc000000
2778#define BM_26_50 BM_50_26
2779#define BM_51_26 0x000ffffffc000000
2780#define BM_26_51 BM_51_26
2781#define BM_52_26 0x001ffffffc000000
2782#define BM_26_52 BM_52_26
2783#define BM_53_26 0x003ffffffc000000
2784#define BM_26_53 BM_53_26
2785#define BM_54_26 0x007ffffffc000000
2786#define BM_26_54 BM_54_26
2787#define BM_55_26 0x00fffffffc000000
2788#define BM_26_55 BM_55_26
2789#define BM_56_26 0x01fffffffc000000
2790#define BM_26_56 BM_56_26
2791#define BM_57_26 0x03fffffffc000000
2792#define BM_26_57 BM_57_26
2793#define BM_58_26 0x07fffffffc000000
2794#define BM_26_58 BM_58_26
2795#define BM_59_26 0x0ffffffffc000000
2796#define BM_26_59 BM_59_26
2797#define BM_60_26 0x1ffffffffc000000
2798#define BM_26_60 BM_60_26
2799#define BM_61_26 0x3ffffffffc000000
2800#define BM_26_61 BM_61_26
2801#define BM_62_26 0x7ffffffffc000000
2802#define BM_26_62 BM_62_26
2803#define BM_63_26 0xfffffffffc000000
2804#define BM_26_63 BM_63_26
2805#define BM_27_27 0x0000000008000000
2806#define BM_28_27 0x0000000018000000
2807#define BM_27_28 BM_28_27
2808#define BM_29_27 0x0000000038000000
2809#define BM_27_29 BM_29_27
2810#define BM_30_27 0x0000000078000000
2811#define BM_27_30 BM_30_27
2812#define BM_31_27 0x00000000f8000000
2813#define BM_27_31 BM_31_27
2814#define BM_32_27 0x00000001f8000000
2815#define BM_27_32 BM_32_27
2816#define BM_33_27 0x00000003f8000000
2817#define BM_27_33 BM_33_27
2818#define BM_34_27 0x00000007f8000000
2819#define BM_27_34 BM_34_27
2820#define BM_35_27 0x0000000ff8000000
2821#define BM_27_35 BM_35_27
2822#define BM_36_27 0x0000001ff8000000
2823#define BM_27_36 BM_36_27
2824#define BM_37_27 0x0000003ff8000000
2825#define BM_27_37 BM_37_27
2826#define BM_38_27 0x0000007ff8000000
2827#define BM_27_38 BM_38_27
2828#define BM_39_27 0x000000fff8000000
2829#define BM_27_39 BM_39_27
2830#define BM_40_27 0x000001fff8000000
2831#define BM_27_40 BM_40_27
2832#define BM_41_27 0x000003fff8000000
2833#define BM_27_41 BM_41_27
2834#define BM_42_27 0x000007fff8000000
2835#define BM_27_42 BM_42_27
2836#define BM_43_27 0x00000ffff8000000
2837#define BM_27_43 BM_43_27
2838#define BM_44_27 0x00001ffff8000000
2839#define BM_27_44 BM_44_27
2840#define BM_45_27 0x00003ffff8000000
2841#define BM_27_45 BM_45_27
2842#define BM_46_27 0x00007ffff8000000
2843#define BM_27_46 BM_46_27
2844#define BM_47_27 0x0000fffff8000000
2845#define BM_27_47 BM_47_27
2846#define BM_48_27 0x0001fffff8000000
2847#define BM_27_48 BM_48_27
2848#define BM_49_27 0x0003fffff8000000
2849#define BM_27_49 BM_49_27
2850#define BM_50_27 0x0007fffff8000000
2851#define BM_27_50 BM_50_27
2852#define BM_51_27 0x000ffffff8000000
2853#define BM_27_51 BM_51_27
2854#define BM_52_27 0x001ffffff8000000
2855#define BM_27_52 BM_52_27
2856#define BM_53_27 0x003ffffff8000000
2857#define BM_27_53 BM_53_27
2858#define BM_54_27 0x007ffffff8000000
2859#define BM_27_54 BM_54_27
2860#define BM_55_27 0x00fffffff8000000
2861#define BM_27_55 BM_55_27
2862#define BM_56_27 0x01fffffff8000000
2863#define BM_27_56 BM_56_27
2864#define BM_57_27 0x03fffffff8000000
2865#define BM_27_57 BM_57_27
2866#define BM_58_27 0x07fffffff8000000
2867#define BM_27_58 BM_58_27
2868#define BM_59_27 0x0ffffffff8000000
2869#define BM_27_59 BM_59_27
2870#define BM_60_27 0x1ffffffff8000000
2871#define BM_27_60 BM_60_27
2872#define BM_61_27 0x3ffffffff8000000
2873#define BM_27_61 BM_61_27
2874#define BM_62_27 0x7ffffffff8000000
2875#define BM_27_62 BM_62_27
2876#define BM_63_27 0xfffffffff8000000
2877#define BM_27_63 BM_63_27
2878#define BM_28_28 0x0000000010000000
2879#define BM_29_28 0x0000000030000000
2880#define BM_28_29 BM_29_28
2881#define BM_30_28 0x0000000070000000
2882#define BM_28_30 BM_30_28
2883#define BM_31_28 0x00000000f0000000
2884#define BM_28_31 BM_31_28
2885#define BM_32_28 0x00000001f0000000
2886#define BM_28_32 BM_32_28
2887#define BM_33_28 0x00000003f0000000
2888#define BM_28_33 BM_33_28
2889#define BM_34_28 0x00000007f0000000
2890#define BM_28_34 BM_34_28
2891#define BM_35_28 0x0000000ff0000000
2892#define BM_28_35 BM_35_28
2893#define BM_36_28 0x0000001ff0000000
2894#define BM_28_36 BM_36_28
2895#define BM_37_28 0x0000003ff0000000
2896#define BM_28_37 BM_37_28
2897#define BM_38_28 0x0000007ff0000000
2898#define BM_28_38 BM_38_28
2899#define BM_39_28 0x000000fff0000000
2900#define BM_28_39 BM_39_28
2901#define BM_40_28 0x000001fff0000000
2902#define BM_28_40 BM_40_28
2903#define BM_41_28 0x000003fff0000000
2904#define BM_28_41 BM_41_28
2905#define BM_42_28 0x000007fff0000000
2906#define BM_28_42 BM_42_28
2907#define BM_43_28 0x00000ffff0000000
2908#define BM_28_43 BM_43_28
2909#define BM_44_28 0x00001ffff0000000
2910#define BM_28_44 BM_44_28
2911#define BM_45_28 0x00003ffff0000000
2912#define BM_28_45 BM_45_28
2913#define BM_46_28 0x00007ffff0000000
2914#define BM_28_46 BM_46_28
2915#define BM_47_28 0x0000fffff0000000
2916#define BM_28_47 BM_47_28
2917#define BM_48_28 0x0001fffff0000000
2918#define BM_28_48 BM_48_28
2919#define BM_49_28 0x0003fffff0000000
2920#define BM_28_49 BM_49_28
2921#define BM_50_28 0x0007fffff0000000
2922#define BM_28_50 BM_50_28
2923#define BM_51_28 0x000ffffff0000000
2924#define BM_28_51 BM_51_28
2925#define BM_52_28 0x001ffffff0000000
2926#define BM_28_52 BM_52_28
2927#define BM_53_28 0x003ffffff0000000
2928#define BM_28_53 BM_53_28
2929#define BM_54_28 0x007ffffff0000000
2930#define BM_28_54 BM_54_28
2931#define BM_55_28 0x00fffffff0000000
2932#define BM_28_55 BM_55_28
2933#define BM_56_28 0x01fffffff0000000
2934#define BM_28_56 BM_56_28
2935#define BM_57_28 0x03fffffff0000000
2936#define BM_28_57 BM_57_28
2937#define BM_58_28 0x07fffffff0000000
2938#define BM_28_58 BM_58_28
2939#define BM_59_28 0x0ffffffff0000000
2940#define BM_28_59 BM_59_28
2941#define BM_60_28 0x1ffffffff0000000
2942#define BM_28_60 BM_60_28
2943#define BM_61_28 0x3ffffffff0000000
2944#define BM_28_61 BM_61_28
2945#define BM_62_28 0x7ffffffff0000000
2946#define BM_28_62 BM_62_28
2947#define BM_63_28 0xfffffffff0000000
2948#define BM_28_63 BM_63_28
2949#define BM_29_29 0x0000000020000000
2950#define BM_30_29 0x0000000060000000
2951#define BM_29_30 BM_30_29
2952#define BM_31_29 0x00000000e0000000
2953#define BM_29_31 BM_31_29
2954#define BM_32_29 0x00000001e0000000
2955#define BM_29_32 BM_32_29
2956#define BM_33_29 0x00000003e0000000
2957#define BM_29_33 BM_33_29
2958#define BM_34_29 0x00000007e0000000
2959#define BM_29_34 BM_34_29
2960#define BM_35_29 0x0000000fe0000000
2961#define BM_29_35 BM_35_29
2962#define BM_36_29 0x0000001fe0000000
2963#define BM_29_36 BM_36_29
2964#define BM_37_29 0x0000003fe0000000
2965#define BM_29_37 BM_37_29
2966#define BM_38_29 0x0000007fe0000000
2967#define BM_29_38 BM_38_29
2968#define BM_39_29 0x000000ffe0000000
2969#define BM_29_39 BM_39_29
2970#define BM_40_29 0x000001ffe0000000
2971#define BM_29_40 BM_40_29
2972#define BM_41_29 0x000003ffe0000000
2973#define BM_29_41 BM_41_29
2974#define BM_42_29 0x000007ffe0000000
2975#define BM_29_42 BM_42_29
2976#define BM_43_29 0x00000fffe0000000
2977#define BM_29_43 BM_43_29
2978#define BM_44_29 0x00001fffe0000000
2979#define BM_29_44 BM_44_29
2980#define BM_45_29 0x00003fffe0000000
2981#define BM_29_45 BM_45_29
2982#define BM_46_29 0x00007fffe0000000
2983#define BM_29_46 BM_46_29
2984#define BM_47_29 0x0000ffffe0000000
2985#define BM_29_47 BM_47_29
2986#define BM_48_29 0x0001ffffe0000000
2987#define BM_29_48 BM_48_29
2988#define BM_49_29 0x0003ffffe0000000
2989#define BM_29_49 BM_49_29
2990#define BM_50_29 0x0007ffffe0000000
2991#define BM_29_50 BM_50_29
2992#define BM_51_29 0x000fffffe0000000
2993#define BM_29_51 BM_51_29
2994#define BM_52_29 0x001fffffe0000000
2995#define BM_29_52 BM_52_29
2996#define BM_53_29 0x003fffffe0000000
2997#define BM_29_53 BM_53_29
2998#define BM_54_29 0x007fffffe0000000
2999#define BM_29_54 BM_54_29
3000#define BM_55_29 0x00ffffffe0000000
3001#define BM_29_55 BM_55_29
3002#define BM_56_29 0x01ffffffe0000000
3003#define BM_29_56 BM_56_29
3004#define BM_57_29 0x03ffffffe0000000
3005#define BM_29_57 BM_57_29
3006#define BM_58_29 0x07ffffffe0000000
3007#define BM_29_58 BM_58_29
3008#define BM_59_29 0x0fffffffe0000000
3009#define BM_29_59 BM_59_29
3010#define BM_60_29 0x1fffffffe0000000
3011#define BM_29_60 BM_60_29
3012#define BM_61_29 0x3fffffffe0000000
3013#define BM_29_61 BM_61_29
3014#define BM_62_29 0x7fffffffe0000000
3015#define BM_29_62 BM_62_29
3016#define BM_63_29 0xffffffffe0000000
3017#define BM_29_63 BM_63_29
3018#define BM_30_30 0x0000000040000000
3019#define BM_31_30 0x00000000c0000000
3020#define BM_30_31 BM_31_30
3021#define BM_32_30 0x00000001c0000000
3022#define BM_30_32 BM_32_30
3023#define BM_33_30 0x00000003c0000000
3024#define BM_30_33 BM_33_30
3025#define BM_34_30 0x00000007c0000000
3026#define BM_30_34 BM_34_30
3027#define BM_35_30 0x0000000fc0000000
3028#define BM_30_35 BM_35_30
3029#define BM_36_30 0x0000001fc0000000
3030#define BM_30_36 BM_36_30
3031#define BM_37_30 0x0000003fc0000000
3032#define BM_30_37 BM_37_30
3033#define BM_38_30 0x0000007fc0000000
3034#define BM_30_38 BM_38_30
3035#define BM_39_30 0x000000ffc0000000
3036#define BM_30_39 BM_39_30
3037#define BM_40_30 0x000001ffc0000000
3038#define BM_30_40 BM_40_30
3039#define BM_41_30 0x000003ffc0000000
3040#define BM_30_41 BM_41_30
3041#define BM_42_30 0x000007ffc0000000
3042#define BM_30_42 BM_42_30
3043#define BM_43_30 0x00000fffc0000000
3044#define BM_30_43 BM_43_30
3045#define BM_44_30 0x00001fffc0000000
3046#define BM_30_44 BM_44_30
3047#define BM_45_30 0x00003fffc0000000
3048#define BM_30_45 BM_45_30
3049#define BM_46_30 0x00007fffc0000000
3050#define BM_30_46 BM_46_30
3051#define BM_47_30 0x0000ffffc0000000
3052#define BM_30_47 BM_47_30
3053#define BM_48_30 0x0001ffffc0000000
3054#define BM_30_48 BM_48_30
3055#define BM_49_30 0x0003ffffc0000000
3056#define BM_30_49 BM_49_30
3057#define BM_50_30 0x0007ffffc0000000
3058#define BM_30_50 BM_50_30
3059#define BM_51_30 0x000fffffc0000000
3060#define BM_30_51 BM_51_30
3061#define BM_52_30 0x001fffffc0000000
3062#define BM_30_52 BM_52_30
3063#define BM_53_30 0x003fffffc0000000
3064#define BM_30_53 BM_53_30
3065#define BM_54_30 0x007fffffc0000000
3066#define BM_30_54 BM_54_30
3067#define BM_55_30 0x00ffffffc0000000
3068#define BM_30_55 BM_55_30
3069#define BM_56_30 0x01ffffffc0000000
3070#define BM_30_56 BM_56_30
3071#define BM_57_30 0x03ffffffc0000000
3072#define BM_30_57 BM_57_30
3073#define BM_58_30 0x07ffffffc0000000
3074#define BM_30_58 BM_58_30
3075#define BM_59_30 0x0fffffffc0000000
3076#define BM_30_59 BM_59_30
3077#define BM_60_30 0x1fffffffc0000000
3078#define BM_30_60 BM_60_30
3079#define BM_61_30 0x3fffffffc0000000
3080#define BM_30_61 BM_61_30
3081#define BM_62_30 0x7fffffffc0000000
3082#define BM_30_62 BM_62_30
3083#define BM_63_30 0xffffffffc0000000
3084#define BM_30_63 BM_63_30
3085#define BM_31_31 0x0000000080000000
3086#define BM_32_31 0x0000000180000000
3087#define BM_31_32 BM_32_31
3088#define BM_33_31 0x0000000380000000
3089#define BM_31_33 BM_33_31
3090#define BM_34_31 0x0000000780000000
3091#define BM_31_34 BM_34_31
3092#define BM_35_31 0x0000000f80000000
3093#define BM_31_35 BM_35_31
3094#define BM_36_31 0x0000001f80000000
3095#define BM_31_36 BM_36_31
3096#define BM_37_31 0x0000003f80000000
3097#define BM_31_37 BM_37_31
3098#define BM_38_31 0x0000007f80000000
3099#define BM_31_38 BM_38_31
3100#define BM_39_31 0x000000ff80000000
3101#define BM_31_39 BM_39_31
3102#define BM_40_31 0x000001ff80000000
3103#define BM_31_40 BM_40_31
3104#define BM_41_31 0x000003ff80000000
3105#define BM_31_41 BM_41_31
3106#define BM_42_31 0x000007ff80000000
3107#define BM_31_42 BM_42_31
3108#define BM_43_31 0x00000fff80000000
3109#define BM_31_43 BM_43_31
3110#define BM_44_31 0x00001fff80000000
3111#define BM_31_44 BM_44_31
3112#define BM_45_31 0x00003fff80000000
3113#define BM_31_45 BM_45_31
3114#define BM_46_31 0x00007fff80000000
3115#define BM_31_46 BM_46_31
3116#define BM_47_31 0x0000ffff80000000
3117#define BM_31_47 BM_47_31
3118#define BM_48_31 0x0001ffff80000000
3119#define BM_31_48 BM_48_31
3120#define BM_49_31 0x0003ffff80000000
3121#define BM_31_49 BM_49_31
3122#define BM_50_31 0x0007ffff80000000
3123#define BM_31_50 BM_50_31
3124#define BM_51_31 0x000fffff80000000
3125#define BM_31_51 BM_51_31
3126#define BM_52_31 0x001fffff80000000
3127#define BM_31_52 BM_52_31
3128#define BM_53_31 0x003fffff80000000
3129#define BM_31_53 BM_53_31
3130#define BM_54_31 0x007fffff80000000
3131#define BM_31_54 BM_54_31
3132#define BM_55_31 0x00ffffff80000000
3133#define BM_31_55 BM_55_31
3134#define BM_56_31 0x01ffffff80000000
3135#define BM_31_56 BM_56_31
3136#define BM_57_31 0x03ffffff80000000
3137#define BM_31_57 BM_57_31
3138#define BM_58_31 0x07ffffff80000000
3139#define BM_31_58 BM_58_31
3140#define BM_59_31 0x0fffffff80000000
3141#define BM_31_59 BM_59_31
3142#define BM_60_31 0x1fffffff80000000
3143#define BM_31_60 BM_60_31
3144#define BM_61_31 0x3fffffff80000000
3145#define BM_31_61 BM_61_31
3146#define BM_62_31 0x7fffffff80000000
3147#define BM_31_62 BM_62_31
3148#define BM_63_31 0xffffffff80000000
3149#define BM_31_63 BM_63_31
3150#define BM_32_32 0x0000000100000000
3151#define BM_33_32 0x0000000300000000
3152#define BM_32_33 BM_33_32
3153#define BM_34_32 0x0000000700000000
3154#define BM_32_34 BM_34_32
3155#define BM_35_32 0x0000000f00000000
3156#define BM_32_35 BM_35_32
3157#define BM_36_32 0x0000001f00000000
3158#define BM_32_36 BM_36_32
3159#define BM_37_32 0x0000003f00000000
3160#define BM_32_37 BM_37_32
3161#define BM_38_32 0x0000007f00000000
3162#define BM_32_38 BM_38_32
3163#define BM_39_32 0x000000ff00000000
3164#define BM_32_39 BM_39_32
3165#define BM_40_32 0x000001ff00000000
3166#define BM_32_40 BM_40_32
3167#define BM_41_32 0x000003ff00000000
3168#define BM_32_41 BM_41_32
3169#define BM_42_32 0x000007ff00000000
3170#define BM_32_42 BM_42_32
3171#define BM_43_32 0x00000fff00000000
3172#define BM_32_43 BM_43_32
3173#define BM_44_32 0x00001fff00000000
3174#define BM_32_44 BM_44_32
3175#define BM_45_32 0x00003fff00000000
3176#define BM_32_45 BM_45_32
3177#define BM_46_32 0x00007fff00000000
3178#define BM_32_46 BM_46_32
3179#define BM_47_32 0x0000ffff00000000
3180#define BM_32_47 BM_47_32
3181#define BM_48_32 0x0001ffff00000000
3182#define BM_32_48 BM_48_32
3183#define BM_49_32 0x0003ffff00000000
3184#define BM_32_49 BM_49_32
3185#define BM_50_32 0x0007ffff00000000
3186#define BM_32_50 BM_50_32
3187#define BM_51_32 0x000fffff00000000
3188#define BM_32_51 BM_51_32
3189#define BM_52_32 0x001fffff00000000
3190#define BM_32_52 BM_52_32
3191#define BM_53_32 0x003fffff00000000
3192#define BM_32_53 BM_53_32
3193#define BM_54_32 0x007fffff00000000
3194#define BM_32_54 BM_54_32
3195#define BM_55_32 0x00ffffff00000000
3196#define BM_32_55 BM_55_32
3197#define BM_56_32 0x01ffffff00000000
3198#define BM_32_56 BM_56_32
3199#define BM_57_32 0x03ffffff00000000
3200#define BM_32_57 BM_57_32
3201#define BM_58_32 0x07ffffff00000000
3202#define BM_32_58 BM_58_32
3203#define BM_59_32 0x0fffffff00000000
3204#define BM_32_59 BM_59_32
3205#define BM_60_32 0x1fffffff00000000
3206#define BM_32_60 BM_60_32
3207#define BM_61_32 0x3fffffff00000000
3208#define BM_32_61 BM_61_32
3209#define BM_62_32 0x7fffffff00000000
3210#define BM_32_62 BM_62_32
3211#define BM_63_32 0xffffffff00000000
3212#define BM_32_63 BM_63_32
3213#define BM_33_33 0x0000000200000000
3214#define BM_34_33 0x0000000600000000
3215#define BM_33_34 BM_34_33
3216#define BM_35_33 0x0000000e00000000
3217#define BM_33_35 BM_35_33
3218#define BM_36_33 0x0000001e00000000
3219#define BM_33_36 BM_36_33
3220#define BM_37_33 0x0000003e00000000
3221#define BM_33_37 BM_37_33
3222#define BM_38_33 0x0000007e00000000
3223#define BM_33_38 BM_38_33
3224#define BM_39_33 0x000000fe00000000
3225#define BM_33_39 BM_39_33
3226#define BM_40_33 0x000001fe00000000
3227#define BM_33_40 BM_40_33
3228#define BM_41_33 0x000003fe00000000
3229#define BM_33_41 BM_41_33
3230#define BM_42_33 0x000007fe00000000
3231#define BM_33_42 BM_42_33
3232#define BM_43_33 0x00000ffe00000000
3233#define BM_33_43 BM_43_33
3234#define BM_44_33 0x00001ffe00000000
3235#define BM_33_44 BM_44_33
3236#define BM_45_33 0x00003ffe00000000
3237#define BM_33_45 BM_45_33
3238#define BM_46_33 0x00007ffe00000000
3239#define BM_33_46 BM_46_33
3240#define BM_47_33 0x0000fffe00000000
3241#define BM_33_47 BM_47_33
3242#define BM_48_33 0x0001fffe00000000
3243#define BM_33_48 BM_48_33
3244#define BM_49_33 0x0003fffe00000000
3245#define BM_33_49 BM_49_33
3246#define BM_50_33 0x0007fffe00000000
3247#define BM_33_50 BM_50_33
3248#define BM_51_33 0x000ffffe00000000
3249#define BM_33_51 BM_51_33
3250#define BM_52_33 0x001ffffe00000000
3251#define BM_33_52 BM_52_33
3252#define BM_53_33 0x003ffffe00000000
3253#define BM_33_53 BM_53_33
3254#define BM_54_33 0x007ffffe00000000
3255#define BM_33_54 BM_54_33
3256#define BM_55_33 0x00fffffe00000000
3257#define BM_33_55 BM_55_33
3258#define BM_56_33 0x01fffffe00000000
3259#define BM_33_56 BM_56_33
3260#define BM_57_33 0x03fffffe00000000
3261#define BM_33_57 BM_57_33
3262#define BM_58_33 0x07fffffe00000000
3263#define BM_33_58 BM_58_33
3264#define BM_59_33 0x0ffffffe00000000
3265#define BM_33_59 BM_59_33
3266#define BM_60_33 0x1ffffffe00000000
3267#define BM_33_60 BM_60_33
3268#define BM_61_33 0x3ffffffe00000000
3269#define BM_33_61 BM_61_33
3270#define BM_62_33 0x7ffffffe00000000
3271#define BM_33_62 BM_62_33
3272#define BM_63_33 0xfffffffe00000000
3273#define BM_33_63 BM_63_33
3274#define BM_34_34 0x0000000400000000
3275#define BM_35_34 0x0000000c00000000
3276#define BM_34_35 BM_35_34
3277#define BM_36_34 0x0000001c00000000
3278#define BM_34_36 BM_36_34
3279#define BM_37_34 0x0000003c00000000
3280#define BM_34_37 BM_37_34
3281#define BM_38_34 0x0000007c00000000
3282#define BM_34_38 BM_38_34
3283#define BM_39_34 0x000000fc00000000
3284#define BM_34_39 BM_39_34
3285#define BM_40_34 0x000001fc00000000
3286#define BM_34_40 BM_40_34
3287#define BM_41_34 0x000003fc00000000
3288#define BM_34_41 BM_41_34
3289#define BM_42_34 0x000007fc00000000
3290#define BM_34_42 BM_42_34
3291#define BM_43_34 0x00000ffc00000000
3292#define BM_34_43 BM_43_34
3293#define BM_44_34 0x00001ffc00000000
3294#define BM_34_44 BM_44_34
3295#define BM_45_34 0x00003ffc00000000
3296#define BM_34_45 BM_45_34
3297#define BM_46_34 0x00007ffc00000000
3298#define BM_34_46 BM_46_34
3299#define BM_47_34 0x0000fffc00000000
3300#define BM_34_47 BM_47_34
3301#define BM_48_34 0x0001fffc00000000
3302#define BM_34_48 BM_48_34
3303#define BM_49_34 0x0003fffc00000000
3304#define BM_34_49 BM_49_34
3305#define BM_50_34 0x0007fffc00000000
3306#define BM_34_50 BM_50_34
3307#define BM_51_34 0x000ffffc00000000
3308#define BM_34_51 BM_51_34
3309#define BM_52_34 0x001ffffc00000000
3310#define BM_34_52 BM_52_34
3311#define BM_53_34 0x003ffffc00000000
3312#define BM_34_53 BM_53_34
3313#define BM_54_34 0x007ffffc00000000
3314#define BM_34_54 BM_54_34
3315#define BM_55_34 0x00fffffc00000000
3316#define BM_34_55 BM_55_34
3317#define BM_56_34 0x01fffffc00000000
3318#define BM_34_56 BM_56_34
3319#define BM_57_34 0x03fffffc00000000
3320#define BM_34_57 BM_57_34
3321#define BM_58_34 0x07fffffc00000000
3322#define BM_34_58 BM_58_34
3323#define BM_59_34 0x0ffffffc00000000
3324#define BM_34_59 BM_59_34
3325#define BM_60_34 0x1ffffffc00000000
3326#define BM_34_60 BM_60_34
3327#define BM_61_34 0x3ffffffc00000000
3328#define BM_34_61 BM_61_34
3329#define BM_62_34 0x7ffffffc00000000
3330#define BM_34_62 BM_62_34
3331#define BM_63_34 0xfffffffc00000000
3332#define BM_34_63 BM_63_34
3333#define BM_35_35 0x0000000800000000
3334#define BM_36_35 0x0000001800000000
3335#define BM_35_36 BM_36_35
3336#define BM_37_35 0x0000003800000000
3337#define BM_35_37 BM_37_35
3338#define BM_38_35 0x0000007800000000
3339#define BM_35_38 BM_38_35
3340#define BM_39_35 0x000000f800000000
3341#define BM_35_39 BM_39_35
3342#define BM_40_35 0x000001f800000000
3343#define BM_35_40 BM_40_35
3344#define BM_41_35 0x000003f800000000
3345#define BM_35_41 BM_41_35
3346#define BM_42_35 0x000007f800000000
3347#define BM_35_42 BM_42_35
3348#define BM_43_35 0x00000ff800000000
3349#define BM_35_43 BM_43_35
3350#define BM_44_35 0x00001ff800000000
3351#define BM_35_44 BM_44_35
3352#define BM_45_35 0x00003ff800000000
3353#define BM_35_45 BM_45_35
3354#define BM_46_35 0x00007ff800000000
3355#define BM_35_46 BM_46_35
3356#define BM_47_35 0x0000fff800000000
3357#define BM_35_47 BM_47_35
3358#define BM_48_35 0x0001fff800000000
3359#define BM_35_48 BM_48_35
3360#define BM_49_35 0x0003fff800000000
3361#define BM_35_49 BM_49_35
3362#define BM_50_35 0x0007fff800000000
3363#define BM_35_50 BM_50_35
3364#define BM_51_35 0x000ffff800000000
3365#define BM_35_51 BM_51_35
3366#define BM_52_35 0x001ffff800000000
3367#define BM_35_52 BM_52_35
3368#define BM_53_35 0x003ffff800000000
3369#define BM_35_53 BM_53_35
3370#define BM_54_35 0x007ffff800000000
3371#define BM_35_54 BM_54_35
3372#define BM_55_35 0x00fffff800000000
3373#define BM_35_55 BM_55_35
3374#define BM_56_35 0x01fffff800000000
3375#define BM_35_56 BM_56_35
3376#define BM_57_35 0x03fffff800000000
3377#define BM_35_57 BM_57_35
3378#define BM_58_35 0x07fffff800000000
3379#define BM_35_58 BM_58_35
3380#define BM_59_35 0x0ffffff800000000
3381#define BM_35_59 BM_59_35
3382#define BM_60_35 0x1ffffff800000000
3383#define BM_35_60 BM_60_35
3384#define BM_61_35 0x3ffffff800000000
3385#define BM_35_61 BM_61_35
3386#define BM_62_35 0x7ffffff800000000
3387#define BM_35_62 BM_62_35
3388#define BM_63_35 0xfffffff800000000
3389#define BM_35_63 BM_63_35
3390#define BM_36_36 0x0000001000000000
3391#define BM_37_36 0x0000003000000000
3392#define BM_36_37 BM_37_36
3393#define BM_38_36 0x0000007000000000
3394#define BM_36_38 BM_38_36
3395#define BM_39_36 0x000000f000000000
3396#define BM_36_39 BM_39_36
3397#define BM_40_36 0x000001f000000000
3398#define BM_36_40 BM_40_36
3399#define BM_41_36 0x000003f000000000
3400#define BM_36_41 BM_41_36
3401#define BM_42_36 0x000007f000000000
3402#define BM_36_42 BM_42_36
3403#define BM_43_36 0x00000ff000000000
3404#define BM_36_43 BM_43_36
3405#define BM_44_36 0x00001ff000000000
3406#define BM_36_44 BM_44_36
3407#define BM_45_36 0x00003ff000000000
3408#define BM_36_45 BM_45_36
3409#define BM_46_36 0x00007ff000000000
3410#define BM_36_46 BM_46_36
3411#define BM_47_36 0x0000fff000000000
3412#define BM_36_47 BM_47_36
3413#define BM_48_36 0x0001fff000000000
3414#define BM_36_48 BM_48_36
3415#define BM_49_36 0x0003fff000000000
3416#define BM_36_49 BM_49_36
3417#define BM_50_36 0x0007fff000000000
3418#define BM_36_50 BM_50_36
3419#define BM_51_36 0x000ffff000000000
3420#define BM_36_51 BM_51_36
3421#define BM_52_36 0x001ffff000000000
3422#define BM_36_52 BM_52_36
3423#define BM_53_36 0x003ffff000000000
3424#define BM_36_53 BM_53_36
3425#define BM_54_36 0x007ffff000000000
3426#define BM_36_54 BM_54_36
3427#define BM_55_36 0x00fffff000000000
3428#define BM_36_55 BM_55_36
3429#define BM_56_36 0x01fffff000000000
3430#define BM_36_56 BM_56_36
3431#define BM_57_36 0x03fffff000000000
3432#define BM_36_57 BM_57_36
3433#define BM_58_36 0x07fffff000000000
3434#define BM_36_58 BM_58_36
3435#define BM_59_36 0x0ffffff000000000
3436#define BM_36_59 BM_59_36
3437#define BM_60_36 0x1ffffff000000000
3438#define BM_36_60 BM_60_36
3439#define BM_61_36 0x3ffffff000000000
3440#define BM_36_61 BM_61_36
3441#define BM_62_36 0x7ffffff000000000
3442#define BM_36_62 BM_62_36
3443#define BM_63_36 0xfffffff000000000
3444#define BM_36_63 BM_63_36
3445#define BM_37_37 0x0000002000000000
3446#define BM_38_37 0x0000006000000000
3447#define BM_37_38 BM_38_37
3448#define BM_39_37 0x000000e000000000
3449#define BM_37_39 BM_39_37
3450#define BM_40_37 0x000001e000000000
3451#define BM_37_40 BM_40_37
3452#define BM_41_37 0x000003e000000000
3453#define BM_37_41 BM_41_37
3454#define BM_42_37 0x000007e000000000
3455#define BM_37_42 BM_42_37
3456#define BM_43_37 0x00000fe000000000
3457#define BM_37_43 BM_43_37
3458#define BM_44_37 0x00001fe000000000
3459#define BM_37_44 BM_44_37
3460#define BM_45_37 0x00003fe000000000
3461#define BM_37_45 BM_45_37
3462#define BM_46_37 0x00007fe000000000
3463#define BM_37_46 BM_46_37
3464#define BM_47_37 0x0000ffe000000000
3465#define BM_37_47 BM_47_37
3466#define BM_48_37 0x0001ffe000000000
3467#define BM_37_48 BM_48_37
3468#define BM_49_37 0x0003ffe000000000
3469#define BM_37_49 BM_49_37
3470#define BM_50_37 0x0007ffe000000000
3471#define BM_37_50 BM_50_37
3472#define BM_51_37 0x000fffe000000000
3473#define BM_37_51 BM_51_37
3474#define BM_52_37 0x001fffe000000000
3475#define BM_37_52 BM_52_37
3476#define BM_53_37 0x003fffe000000000
3477#define BM_37_53 BM_53_37
3478#define BM_54_37 0x007fffe000000000
3479#define BM_37_54 BM_54_37
3480#define BM_55_37 0x00ffffe000000000
3481#define BM_37_55 BM_55_37
3482#define BM_56_37 0x01ffffe000000000
3483#define BM_37_56 BM_56_37
3484#define BM_57_37 0x03ffffe000000000
3485#define BM_37_57 BM_57_37
3486#define BM_58_37 0x07ffffe000000000
3487#define BM_37_58 BM_58_37
3488#define BM_59_37 0x0fffffe000000000
3489#define BM_37_59 BM_59_37
3490#define BM_60_37 0x1fffffe000000000
3491#define BM_37_60 BM_60_37
3492#define BM_61_37 0x3fffffe000000000
3493#define BM_37_61 BM_61_37
3494#define BM_62_37 0x7fffffe000000000
3495#define BM_37_62 BM_62_37
3496#define BM_63_37 0xffffffe000000000
3497#define BM_37_63 BM_63_37
3498#define BM_38_38 0x0000004000000000
3499#define BM_39_38 0x000000c000000000
3500#define BM_38_39 BM_39_38
3501#define BM_40_38 0x000001c000000000
3502#define BM_38_40 BM_40_38
3503#define BM_41_38 0x000003c000000000
3504#define BM_38_41 BM_41_38
3505#define BM_42_38 0x000007c000000000
3506#define BM_38_42 BM_42_38
3507#define BM_43_38 0x00000fc000000000
3508#define BM_38_43 BM_43_38
3509#define BM_44_38 0x00001fc000000000
3510#define BM_38_44 BM_44_38
3511#define BM_45_38 0x00003fc000000000
3512#define BM_38_45 BM_45_38
3513#define BM_46_38 0x00007fc000000000
3514#define BM_38_46 BM_46_38
3515#define BM_47_38 0x0000ffc000000000
3516#define BM_38_47 BM_47_38
3517#define BM_48_38 0x0001ffc000000000
3518#define BM_38_48 BM_48_38
3519#define BM_49_38 0x0003ffc000000000
3520#define BM_38_49 BM_49_38
3521#define BM_50_38 0x0007ffc000000000
3522#define BM_38_50 BM_50_38
3523#define BM_51_38 0x000fffc000000000
3524#define BM_38_51 BM_51_38
3525#define BM_52_38 0x001fffc000000000
3526#define BM_38_52 BM_52_38
3527#define BM_53_38 0x003fffc000000000
3528#define BM_38_53 BM_53_38
3529#define BM_54_38 0x007fffc000000000
3530#define BM_38_54 BM_54_38
3531#define BM_55_38 0x00ffffc000000000
3532#define BM_38_55 BM_55_38
3533#define BM_56_38 0x01ffffc000000000
3534#define BM_38_56 BM_56_38
3535#define BM_57_38 0x03ffffc000000000
3536#define BM_38_57 BM_57_38
3537#define BM_58_38 0x07ffffc000000000
3538#define BM_38_58 BM_58_38
3539#define BM_59_38 0x0fffffc000000000
3540#define BM_38_59 BM_59_38
3541#define BM_60_38 0x1fffffc000000000
3542#define BM_38_60 BM_60_38
3543#define BM_61_38 0x3fffffc000000000
3544#define BM_38_61 BM_61_38
3545#define BM_62_38 0x7fffffc000000000
3546#define BM_38_62 BM_62_38
3547#define BM_63_38 0xffffffc000000000
3548#define BM_38_63 BM_63_38
3549#define BM_39_39 0x0000008000000000
3550#define BM_40_39 0x0000018000000000
3551#define BM_39_40 BM_40_39
3552#define BM_41_39 0x0000038000000000
3553#define BM_39_41 BM_41_39
3554#define BM_42_39 0x0000078000000000
3555#define BM_39_42 BM_42_39
3556#define BM_43_39 0x00000f8000000000
3557#define BM_39_43 BM_43_39
3558#define BM_44_39 0x00001f8000000000
3559#define BM_39_44 BM_44_39
3560#define BM_45_39 0x00003f8000000000
3561#define BM_39_45 BM_45_39
3562#define BM_46_39 0x00007f8000000000
3563#define BM_39_46 BM_46_39
3564#define BM_47_39 0x0000ff8000000000
3565#define BM_39_47 BM_47_39
3566#define BM_48_39 0x0001ff8000000000
3567#define BM_39_48 BM_48_39
3568#define BM_49_39 0x0003ff8000000000
3569#define BM_39_49 BM_49_39
3570#define BM_50_39 0x0007ff8000000000
3571#define BM_39_50 BM_50_39
3572#define BM_51_39 0x000fff8000000000
3573#define BM_39_51 BM_51_39
3574#define BM_52_39 0x001fff8000000000
3575#define BM_39_52 BM_52_39
3576#define BM_53_39 0x003fff8000000000
3577#define BM_39_53 BM_53_39
3578#define BM_54_39 0x007fff8000000000
3579#define BM_39_54 BM_54_39
3580#define BM_55_39 0x00ffff8000000000
3581#define BM_39_55 BM_55_39
3582#define BM_56_39 0x01ffff8000000000
3583#define BM_39_56 BM_56_39
3584#define BM_57_39 0x03ffff8000000000
3585#define BM_39_57 BM_57_39
3586#define BM_58_39 0x07ffff8000000000
3587#define BM_39_58 BM_58_39
3588#define BM_59_39 0x0fffff8000000000
3589#define BM_39_59 BM_59_39
3590#define BM_60_39 0x1fffff8000000000
3591#define BM_39_60 BM_60_39
3592#define BM_61_39 0x3fffff8000000000
3593#define BM_39_61 BM_61_39
3594#define BM_62_39 0x7fffff8000000000
3595#define BM_39_62 BM_62_39
3596#define BM_63_39 0xffffff8000000000
3597#define BM_39_63 BM_63_39
3598#define BM_40_40 0x0000010000000000
3599#define BM_41_40 0x0000030000000000
3600#define BM_40_41 BM_41_40
3601#define BM_42_40 0x0000070000000000
3602#define BM_40_42 BM_42_40
3603#define BM_43_40 0x00000f0000000000
3604#define BM_40_43 BM_43_40
3605#define BM_44_40 0x00001f0000000000
3606#define BM_40_44 BM_44_40
3607#define BM_45_40 0x00003f0000000000
3608#define BM_40_45 BM_45_40
3609#define BM_46_40 0x00007f0000000000
3610#define BM_40_46 BM_46_40
3611#define BM_47_40 0x0000ff0000000000
3612#define BM_40_47 BM_47_40
3613#define BM_48_40 0x0001ff0000000000
3614#define BM_40_48 BM_48_40
3615#define BM_49_40 0x0003ff0000000000
3616#define BM_40_49 BM_49_40
3617#define BM_50_40 0x0007ff0000000000
3618#define BM_40_50 BM_50_40
3619#define BM_51_40 0x000fff0000000000
3620#define BM_40_51 BM_51_40
3621#define BM_52_40 0x001fff0000000000
3622#define BM_40_52 BM_52_40
3623#define BM_53_40 0x003fff0000000000
3624#define BM_40_53 BM_53_40
3625#define BM_54_40 0x007fff0000000000
3626#define BM_40_54 BM_54_40
3627#define BM_55_40 0x00ffff0000000000
3628#define BM_40_55 BM_55_40
3629#define BM_56_40 0x01ffff0000000000
3630#define BM_40_56 BM_56_40
3631#define BM_57_40 0x03ffff0000000000
3632#define BM_40_57 BM_57_40
3633#define BM_58_40 0x07ffff0000000000
3634#define BM_40_58 BM_58_40
3635#define BM_59_40 0x0fffff0000000000
3636#define BM_40_59 BM_59_40
3637#define BM_60_40 0x1fffff0000000000
3638#define BM_40_60 BM_60_40
3639#define BM_61_40 0x3fffff0000000000
3640#define BM_40_61 BM_61_40
3641#define BM_62_40 0x7fffff0000000000
3642#define BM_40_62 BM_62_40
3643#define BM_63_40 0xffffff0000000000
3644#define BM_40_63 BM_63_40
3645#define BM_41_41 0x0000020000000000
3646#define BM_42_41 0x0000060000000000
3647#define BM_41_42 BM_42_41
3648#define BM_43_41 0x00000e0000000000
3649#define BM_41_43 BM_43_41
3650#define BM_44_41 0x00001e0000000000
3651#define BM_41_44 BM_44_41
3652#define BM_45_41 0x00003e0000000000
3653#define BM_41_45 BM_45_41
3654#define BM_46_41 0x00007e0000000000
3655#define BM_41_46 BM_46_41
3656#define BM_47_41 0x0000fe0000000000
3657#define BM_41_47 BM_47_41
3658#define BM_48_41 0x0001fe0000000000
3659#define BM_41_48 BM_48_41
3660#define BM_49_41 0x0003fe0000000000
3661#define BM_41_49 BM_49_41
3662#define BM_50_41 0x0007fe0000000000
3663#define BM_41_50 BM_50_41
3664#define BM_51_41 0x000ffe0000000000
3665#define BM_41_51 BM_51_41
3666#define BM_52_41 0x001ffe0000000000
3667#define BM_41_52 BM_52_41
3668#define BM_53_41 0x003ffe0000000000
3669#define BM_41_53 BM_53_41
3670#define BM_54_41 0x007ffe0000000000
3671#define BM_41_54 BM_54_41
3672#define BM_55_41 0x00fffe0000000000
3673#define BM_41_55 BM_55_41
3674#define BM_56_41 0x01fffe0000000000
3675#define BM_41_56 BM_56_41
3676#define BM_57_41 0x03fffe0000000000
3677#define BM_41_57 BM_57_41
3678#define BM_58_41 0x07fffe0000000000
3679#define BM_41_58 BM_58_41
3680#define BM_59_41 0x0ffffe0000000000
3681#define BM_41_59 BM_59_41
3682#define BM_60_41 0x1ffffe0000000000
3683#define BM_41_60 BM_60_41
3684#define BM_61_41 0x3ffffe0000000000
3685#define BM_41_61 BM_61_41
3686#define BM_62_41 0x7ffffe0000000000
3687#define BM_41_62 BM_62_41
3688#define BM_63_41 0xfffffe0000000000
3689#define BM_41_63 BM_63_41
3690#define BM_42_42 0x0000040000000000
3691#define BM_43_42 0x00000c0000000000
3692#define BM_42_43 BM_43_42
3693#define BM_44_42 0x00001c0000000000
3694#define BM_42_44 BM_44_42
3695#define BM_45_42 0x00003c0000000000
3696#define BM_42_45 BM_45_42
3697#define BM_46_42 0x00007c0000000000
3698#define BM_42_46 BM_46_42
3699#define BM_47_42 0x0000fc0000000000
3700#define BM_42_47 BM_47_42
3701#define BM_48_42 0x0001fc0000000000
3702#define BM_42_48 BM_48_42
3703#define BM_49_42 0x0003fc0000000000
3704#define BM_42_49 BM_49_42
3705#define BM_50_42 0x0007fc0000000000
3706#define BM_42_50 BM_50_42
3707#define BM_51_42 0x000ffc0000000000
3708#define BM_42_51 BM_51_42
3709#define BM_52_42 0x001ffc0000000000
3710#define BM_42_52 BM_52_42
3711#define BM_53_42 0x003ffc0000000000
3712#define BM_42_53 BM_53_42
3713#define BM_54_42 0x007ffc0000000000
3714#define BM_42_54 BM_54_42
3715#define BM_55_42 0x00fffc0000000000
3716#define BM_42_55 BM_55_42
3717#define BM_56_42 0x01fffc0000000000
3718#define BM_42_56 BM_56_42
3719#define BM_57_42 0x03fffc0000000000
3720#define BM_42_57 BM_57_42
3721#define BM_58_42 0x07fffc0000000000
3722#define BM_42_58 BM_58_42
3723#define BM_59_42 0x0ffffc0000000000
3724#define BM_42_59 BM_59_42
3725#define BM_60_42 0x1ffffc0000000000
3726#define BM_42_60 BM_60_42
3727#define BM_61_42 0x3ffffc0000000000
3728#define BM_42_61 BM_61_42
3729#define BM_62_42 0x7ffffc0000000000
3730#define BM_42_62 BM_62_42
3731#define BM_63_42 0xfffffc0000000000
3732#define BM_42_63 BM_63_42
3733#define BM_43_43 0x0000080000000000
3734#define BM_44_43 0x0000180000000000
3735#define BM_43_44 BM_44_43
3736#define BM_45_43 0x0000380000000000
3737#define BM_43_45 BM_45_43
3738#define BM_46_43 0x0000780000000000
3739#define BM_43_46 BM_46_43
3740#define BM_47_43 0x0000f80000000000
3741#define BM_43_47 BM_47_43
3742#define BM_48_43 0x0001f80000000000
3743#define BM_43_48 BM_48_43
3744#define BM_49_43 0x0003f80000000000
3745#define BM_43_49 BM_49_43
3746#define BM_50_43 0x0007f80000000000
3747#define BM_43_50 BM_50_43
3748#define BM_51_43 0x000ff80000000000
3749#define BM_43_51 BM_51_43
3750#define BM_52_43 0x001ff80000000000
3751#define BM_43_52 BM_52_43
3752#define BM_53_43 0x003ff80000000000
3753#define BM_43_53 BM_53_43
3754#define BM_54_43 0x007ff80000000000
3755#define BM_43_54 BM_54_43
3756#define BM_55_43 0x00fff80000000000
3757#define BM_43_55 BM_55_43
3758#define BM_56_43 0x01fff80000000000
3759#define BM_43_56 BM_56_43
3760#define BM_57_43 0x03fff80000000000
3761#define BM_43_57 BM_57_43
3762#define BM_58_43 0x07fff80000000000
3763#define BM_43_58 BM_58_43
3764#define BM_59_43 0x0ffff80000000000
3765#define BM_43_59 BM_59_43
3766#define BM_60_43 0x1ffff80000000000
3767#define BM_43_60 BM_60_43
3768#define BM_61_43 0x3ffff80000000000
3769#define BM_43_61 BM_61_43
3770#define BM_62_43 0x7ffff80000000000
3771#define BM_43_62 BM_62_43
3772#define BM_63_43 0xfffff80000000000
3773#define BM_43_63 BM_63_43
3774#define BM_44_44 0x0000100000000000
3775#define BM_45_44 0x0000300000000000
3776#define BM_44_45 BM_45_44
3777#define BM_46_44 0x0000700000000000
3778#define BM_44_46 BM_46_44
3779#define BM_47_44 0x0000f00000000000
3780#define BM_44_47 BM_47_44
3781#define BM_48_44 0x0001f00000000000
3782#define BM_44_48 BM_48_44
3783#define BM_49_44 0x0003f00000000000
3784#define BM_44_49 BM_49_44
3785#define BM_50_44 0x0007f00000000000
3786#define BM_44_50 BM_50_44
3787#define BM_51_44 0x000ff00000000000
3788#define BM_44_51 BM_51_44
3789#define BM_52_44 0x001ff00000000000
3790#define BM_44_52 BM_52_44
3791#define BM_53_44 0x003ff00000000000
3792#define BM_44_53 BM_53_44
3793#define BM_54_44 0x007ff00000000000
3794#define BM_44_54 BM_54_44
3795#define BM_55_44 0x00fff00000000000
3796#define BM_44_55 BM_55_44
3797#define BM_56_44 0x01fff00000000000
3798#define BM_44_56 BM_56_44
3799#define BM_57_44 0x03fff00000000000
3800#define BM_44_57 BM_57_44
3801#define BM_58_44 0x07fff00000000000
3802#define BM_44_58 BM_58_44
3803#define BM_59_44 0x0ffff00000000000
3804#define BM_44_59 BM_59_44
3805#define BM_60_44 0x1ffff00000000000
3806#define BM_44_60 BM_60_44
3807#define BM_61_44 0x3ffff00000000000
3808#define BM_44_61 BM_61_44
3809#define BM_62_44 0x7ffff00000000000
3810#define BM_44_62 BM_62_44
3811#define BM_63_44 0xfffff00000000000
3812#define BM_44_63 BM_63_44
3813#define BM_45_45 0x0000200000000000
3814#define BM_46_45 0x0000600000000000
3815#define BM_45_46 BM_46_45
3816#define BM_47_45 0x0000e00000000000
3817#define BM_45_47 BM_47_45
3818#define BM_48_45 0x0001e00000000000
3819#define BM_45_48 BM_48_45
3820#define BM_49_45 0x0003e00000000000
3821#define BM_45_49 BM_49_45
3822#define BM_50_45 0x0007e00000000000
3823#define BM_45_50 BM_50_45
3824#define BM_51_45 0x000fe00000000000
3825#define BM_45_51 BM_51_45
3826#define BM_52_45 0x001fe00000000000
3827#define BM_45_52 BM_52_45
3828#define BM_53_45 0x003fe00000000000
3829#define BM_45_53 BM_53_45
3830#define BM_54_45 0x007fe00000000000
3831#define BM_45_54 BM_54_45
3832#define BM_55_45 0x00ffe00000000000
3833#define BM_45_55 BM_55_45
3834#define BM_56_45 0x01ffe00000000000
3835#define BM_45_56 BM_56_45
3836#define BM_57_45 0x03ffe00000000000
3837#define BM_45_57 BM_57_45
3838#define BM_58_45 0x07ffe00000000000
3839#define BM_45_58 BM_58_45
3840#define BM_59_45 0x0fffe00000000000
3841#define BM_45_59 BM_59_45
3842#define BM_60_45 0x1fffe00000000000
3843#define BM_45_60 BM_60_45
3844#define BM_61_45 0x3fffe00000000000
3845#define BM_45_61 BM_61_45
3846#define BM_62_45 0x7fffe00000000000
3847#define BM_45_62 BM_62_45
3848#define BM_63_45 0xffffe00000000000
3849#define BM_45_63 BM_63_45
3850#define BM_46_46 0x0000400000000000
3851#define BM_47_46 0x0000c00000000000
3852#define BM_46_47 BM_47_46
3853#define BM_48_46 0x0001c00000000000
3854#define BM_46_48 BM_48_46
3855#define BM_49_46 0x0003c00000000000
3856#define BM_46_49 BM_49_46
3857#define BM_50_46 0x0007c00000000000
3858#define BM_46_50 BM_50_46
3859#define BM_51_46 0x000fc00000000000
3860#define BM_46_51 BM_51_46
3861#define BM_52_46 0x001fc00000000000
3862#define BM_46_52 BM_52_46
3863#define BM_53_46 0x003fc00000000000
3864#define BM_46_53 BM_53_46
3865#define BM_54_46 0x007fc00000000000
3866#define BM_46_54 BM_54_46
3867#define BM_55_46 0x00ffc00000000000
3868#define BM_46_55 BM_55_46
3869#define BM_56_46 0x01ffc00000000000
3870#define BM_46_56 BM_56_46
3871#define BM_57_46 0x03ffc00000000000
3872#define BM_46_57 BM_57_46
3873#define BM_58_46 0x07ffc00000000000
3874#define BM_46_58 BM_58_46
3875#define BM_59_46 0x0fffc00000000000
3876#define BM_46_59 BM_59_46
3877#define BM_60_46 0x1fffc00000000000
3878#define BM_46_60 BM_60_46
3879#define BM_61_46 0x3fffc00000000000
3880#define BM_46_61 BM_61_46
3881#define BM_62_46 0x7fffc00000000000
3882#define BM_46_62 BM_62_46
3883#define BM_63_46 0xffffc00000000000
3884#define BM_46_63 BM_63_46
3885#define BM_47_47 0x0000800000000000
3886#define BM_48_47 0x0001800000000000
3887#define BM_47_48 BM_48_47
3888#define BM_49_47 0x0003800000000000
3889#define BM_47_49 BM_49_47
3890#define BM_50_47 0x0007800000000000
3891#define BM_47_50 BM_50_47
3892#define BM_51_47 0x000f800000000000
3893#define BM_47_51 BM_51_47
3894#define BM_52_47 0x001f800000000000
3895#define BM_47_52 BM_52_47
3896#define BM_53_47 0x003f800000000000
3897#define BM_47_53 BM_53_47
3898#define BM_54_47 0x007f800000000000
3899#define BM_47_54 BM_54_47
3900#define BM_55_47 0x00ff800000000000
3901#define BM_47_55 BM_55_47
3902#define BM_56_47 0x01ff800000000000
3903#define BM_47_56 BM_56_47
3904#define BM_57_47 0x03ff800000000000
3905#define BM_47_57 BM_57_47
3906#define BM_58_47 0x07ff800000000000
3907#define BM_47_58 BM_58_47
3908#define BM_59_47 0x0fff800000000000
3909#define BM_47_59 BM_59_47
3910#define BM_60_47 0x1fff800000000000
3911#define BM_47_60 BM_60_47
3912#define BM_61_47 0x3fff800000000000
3913#define BM_47_61 BM_61_47
3914#define BM_62_47 0x7fff800000000000
3915#define BM_47_62 BM_62_47
3916#define BM_63_47 0xffff800000000000
3917#define BM_47_63 BM_63_47
3918#define BM_48_48 0x0001000000000000
3919#define BM_49_48 0x0003000000000000
3920#define BM_48_49 BM_49_48
3921#define BM_50_48 0x0007000000000000
3922#define BM_48_50 BM_50_48
3923#define BM_51_48 0x000f000000000000
3924#define BM_48_51 BM_51_48
3925#define BM_52_48 0x001f000000000000
3926#define BM_48_52 BM_52_48
3927#define BM_53_48 0x003f000000000000
3928#define BM_48_53 BM_53_48
3929#define BM_54_48 0x007f000000000000
3930#define BM_48_54 BM_54_48
3931#define BM_55_48 0x00ff000000000000
3932#define BM_48_55 BM_55_48
3933#define BM_56_48 0x01ff000000000000
3934#define BM_48_56 BM_56_48
3935#define BM_57_48 0x03ff000000000000
3936#define BM_48_57 BM_57_48
3937#define BM_58_48 0x07ff000000000000
3938#define BM_48_58 BM_58_48
3939#define BM_59_48 0x0fff000000000000
3940#define BM_48_59 BM_59_48
3941#define BM_60_48 0x1fff000000000000
3942#define BM_48_60 BM_60_48
3943#define BM_61_48 0x3fff000000000000
3944#define BM_48_61 BM_61_48
3945#define BM_62_48 0x7fff000000000000
3946#define BM_48_62 BM_62_48
3947#define BM_63_48 0xffff000000000000
3948#define BM_48_63 BM_63_48
3949#define BM_49_49 0x0002000000000000
3950#define BM_50_49 0x0006000000000000
3951#define BM_49_50 BM_50_49
3952#define BM_51_49 0x000e000000000000
3953#define BM_49_51 BM_51_49
3954#define BM_52_49 0x001e000000000000
3955#define BM_49_52 BM_52_49
3956#define BM_53_49 0x003e000000000000
3957#define BM_49_53 BM_53_49
3958#define BM_54_49 0x007e000000000000
3959#define BM_49_54 BM_54_49
3960#define BM_55_49 0x00fe000000000000
3961#define BM_49_55 BM_55_49
3962#define BM_56_49 0x01fe000000000000
3963#define BM_49_56 BM_56_49
3964#define BM_57_49 0x03fe000000000000
3965#define BM_49_57 BM_57_49
3966#define BM_58_49 0x07fe000000000000
3967#define BM_49_58 BM_58_49
3968#define BM_59_49 0x0ffe000000000000
3969#define BM_49_59 BM_59_49
3970#define BM_60_49 0x1ffe000000000000
3971#define BM_49_60 BM_60_49
3972#define BM_61_49 0x3ffe000000000000
3973#define BM_49_61 BM_61_49
3974#define BM_62_49 0x7ffe000000000000
3975#define BM_49_62 BM_62_49
3976#define BM_63_49 0xfffe000000000000
3977#define BM_49_63 BM_63_49
3978#define BM_50_50 0x0004000000000000
3979#define BM_51_50 0x000c000000000000
3980#define BM_50_51 BM_51_50
3981#define BM_52_50 0x001c000000000000
3982#define BM_50_52 BM_52_50
3983#define BM_53_50 0x003c000000000000
3984#define BM_50_53 BM_53_50
3985#define BM_54_50 0x007c000000000000
3986#define BM_50_54 BM_54_50
3987#define BM_55_50 0x00fc000000000000
3988#define BM_50_55 BM_55_50
3989#define BM_56_50 0x01fc000000000000
3990#define BM_50_56 BM_56_50
3991#define BM_57_50 0x03fc000000000000
3992#define BM_50_57 BM_57_50
3993#define BM_58_50 0x07fc000000000000
3994#define BM_50_58 BM_58_50
3995#define BM_59_50 0x0ffc000000000000
3996#define BM_50_59 BM_59_50
3997#define BM_60_50 0x1ffc000000000000
3998#define BM_50_60 BM_60_50
3999#define BM_61_50 0x3ffc000000000000
4000#define BM_50_61 BM_61_50
4001#define BM_62_50 0x7ffc000000000000
4002#define BM_50_62 BM_62_50
4003#define BM_63_50 0xfffc000000000000
4004#define BM_50_63 BM_63_50
4005#define BM_51_51 0x0008000000000000
4006#define BM_52_51 0x0018000000000000
4007#define BM_51_52 BM_52_51
4008#define BM_53_51 0x0038000000000000
4009#define BM_51_53 BM_53_51
4010#define BM_54_51 0x0078000000000000
4011#define BM_51_54 BM_54_51
4012#define BM_55_51 0x00f8000000000000
4013#define BM_51_55 BM_55_51
4014#define BM_56_51 0x01f8000000000000
4015#define BM_51_56 BM_56_51
4016#define BM_57_51 0x03f8000000000000
4017#define BM_51_57 BM_57_51
4018#define BM_58_51 0x07f8000000000000
4019#define BM_51_58 BM_58_51
4020#define BM_59_51 0x0ff8000000000000
4021#define BM_51_59 BM_59_51
4022#define BM_60_51 0x1ff8000000000000
4023#define BM_51_60 BM_60_51
4024#define BM_61_51 0x3ff8000000000000
4025#define BM_51_61 BM_61_51
4026#define BM_62_51 0x7ff8000000000000
4027#define BM_51_62 BM_62_51
4028#define BM_63_51 0xfff8000000000000
4029#define BM_51_63 BM_63_51
4030#define BM_52_52 0x0010000000000000
4031#define BM_53_52 0x0030000000000000
4032#define BM_52_53 BM_53_52
4033#define BM_54_52 0x0070000000000000
4034#define BM_52_54 BM_54_52
4035#define BM_55_52 0x00f0000000000000
4036#define BM_52_55 BM_55_52
4037#define BM_56_52 0x01f0000000000000
4038#define BM_52_56 BM_56_52
4039#define BM_57_52 0x03f0000000000000
4040#define BM_52_57 BM_57_52
4041#define BM_58_52 0x07f0000000000000
4042#define BM_52_58 BM_58_52
4043#define BM_59_52 0x0ff0000000000000
4044#define BM_52_59 BM_59_52
4045#define BM_60_52 0x1ff0000000000000
4046#define BM_52_60 BM_60_52
4047#define BM_61_52 0x3ff0000000000000
4048#define BM_52_61 BM_61_52
4049#define BM_62_52 0x7ff0000000000000
4050#define BM_52_62 BM_62_52
4051#define BM_63_52 0xfff0000000000000
4052#define BM_52_63 BM_63_52
4053#define BM_53_53 0x0020000000000000
4054#define BM_54_53 0x0060000000000000
4055#define BM_53_54 BM_54_53
4056#define BM_55_53 0x00e0000000000000
4057#define BM_53_55 BM_55_53
4058#define BM_56_53 0x01e0000000000000
4059#define BM_53_56 BM_56_53
4060#define BM_57_53 0x03e0000000000000
4061#define BM_53_57 BM_57_53
4062#define BM_58_53 0x07e0000000000000
4063#define BM_53_58 BM_58_53
4064#define BM_59_53 0x0fe0000000000000
4065#define BM_53_59 BM_59_53
4066#define BM_60_53 0x1fe0000000000000
4067#define BM_53_60 BM_60_53
4068#define BM_61_53 0x3fe0000000000000
4069#define BM_53_61 BM_61_53
4070#define BM_62_53 0x7fe0000000000000
4071#define BM_53_62 BM_62_53
4072#define BM_63_53 0xffe0000000000000
4073#define BM_53_63 BM_63_53
4074#define BM_54_54 0x0040000000000000
4075#define BM_55_54 0x00c0000000000000
4076#define BM_54_55 BM_55_54
4077#define BM_56_54 0x01c0000000000000
4078#define BM_54_56 BM_56_54
4079#define BM_57_54 0x03c0000000000000
4080#define BM_54_57 BM_57_54
4081#define BM_58_54 0x07c0000000000000
4082#define BM_54_58 BM_58_54
4083#define BM_59_54 0x0fc0000000000000
4084#define BM_54_59 BM_59_54
4085#define BM_60_54 0x1fc0000000000000
4086#define BM_54_60 BM_60_54
4087#define BM_61_54 0x3fc0000000000000
4088#define BM_54_61 BM_61_54
4089#define BM_62_54 0x7fc0000000000000
4090#define BM_54_62 BM_62_54
4091#define BM_63_54 0xffc0000000000000
4092#define BM_54_63 BM_63_54
4093#define BM_55_55 0x0080000000000000
4094#define BM_56_55 0x0180000000000000
4095#define BM_55_56 BM_56_55
4096#define BM_57_55 0x0380000000000000
4097#define BM_55_57 BM_57_55
4098#define BM_58_55 0x0780000000000000
4099#define BM_55_58 BM_58_55
4100#define BM_59_55 0x0f80000000000000
4101#define BM_55_59 BM_59_55
4102#define BM_60_55 0x1f80000000000000
4103#define BM_55_60 BM_60_55
4104#define BM_61_55 0x3f80000000000000
4105#define BM_55_61 BM_61_55
4106#define BM_62_55 0x7f80000000000000
4107#define BM_55_62 BM_62_55
4108#define BM_63_55 0xff80000000000000
4109#define BM_55_63 BM_63_55
4110#define BM_56_56 0x0100000000000000
4111#define BM_57_56 0x0300000000000000
4112#define BM_56_57 BM_57_56
4113#define BM_58_56 0x0700000000000000
4114#define BM_56_58 BM_58_56
4115#define BM_59_56 0x0f00000000000000
4116#define BM_56_59 BM_59_56
4117#define BM_60_56 0x1f00000000000000
4118#define BM_56_60 BM_60_56
4119#define BM_61_56 0x3f00000000000000
4120#define BM_56_61 BM_61_56
4121#define BM_62_56 0x7f00000000000000
4122#define BM_56_62 BM_62_56
4123#define BM_63_56 0xff00000000000000
4124#define BM_56_63 BM_63_56
4125#define BM_57_57 0x0200000000000000
4126#define BM_58_57 0x0600000000000000
4127#define BM_57_58 BM_58_57
4128#define BM_59_57 0x0e00000000000000
4129#define BM_57_59 BM_59_57
4130#define BM_60_57 0x1e00000000000000
4131#define BM_57_60 BM_60_57
4132#define BM_61_57 0x3e00000000000000
4133#define BM_57_61 BM_61_57
4134#define BM_62_57 0x7e00000000000000
4135#define BM_57_62 BM_62_57
4136#define BM_63_57 0xfe00000000000000
4137#define BM_57_63 BM_63_57
4138#define BM_58_58 0x0400000000000000
4139#define BM_59_58 0x0c00000000000000
4140#define BM_58_59 BM_59_58
4141#define BM_60_58 0x1c00000000000000
4142#define BM_58_60 BM_60_58
4143#define BM_61_58 0x3c00000000000000
4144#define BM_58_61 BM_61_58
4145#define BM_62_58 0x7c00000000000000
4146#define BM_58_62 BM_62_58
4147#define BM_63_58 0xfc00000000000000
4148#define BM_58_63 BM_63_58
4149#define BM_59_59 0x0800000000000000
4150#define BM_60_59 0x1800000000000000
4151#define BM_59_60 BM_60_59
4152#define BM_61_59 0x3800000000000000
4153#define BM_59_61 BM_61_59
4154#define BM_62_59 0x7800000000000000
4155#define BM_59_62 BM_62_59
4156#define BM_63_59 0xf800000000000000
4157#define BM_59_63 BM_63_59
4158#define BM_60_60 0x1000000000000000
4159#define BM_61_60 0x3000000000000000
4160#define BM_60_61 BM_61_60
4161#define BM_62_60 0x7000000000000000
4162#define BM_60_62 BM_62_60
4163#define BM_63_60 0xf000000000000000
4164#define BM_60_63 BM_63_60
4165#define BM_61_61 0x2000000000000000
4166#define BM_62_61 0x6000000000000000
4167#define BM_61_62 BM_62_61
4168#define BM_63_61 0xe000000000000000
4169#define BM_61_63 BM_63_61
4170#define BM_62_62 0x4000000000000000
4171#define BM_63_62 0xc000000000000000
4172#define BM_62_63 BM_63_62
4173#define BM_63_63 0x8000000000000000
4174
4175#endif
4176
4177#endif /* __ASM_TX4927_TX4927_MIPS_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h
index b14acb575be2..b180488dcdc4 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/tx4938/rbtx4938.h
@@ -153,7 +153,7 @@
153#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR) 153#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
154#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n)) 154#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
155#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n)) 155#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
156#define RBTX4938_IRQ_IRC_DMA(ch,n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch,n)) 156#define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
157#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO) 157#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
158#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC) 158#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
159#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC) 159#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h
index afdb19813ca1..650b010761f9 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/tx4938/tx4938.h
@@ -16,7 +16,7 @@
16#include <asm/tx4938/tx4938_mips.h> 16#include <asm/tx4938/tx4938_mips.h>
17 17
18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr)) 18#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
19#define tx4938_write_nfmc(b,addr) (*(volatile unsigned int *)(addr)) = (b) 19#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
20 20
21#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG 21#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
22 22
@@ -84,27 +84,27 @@
84#include <asm/byteorder.h> 84#include <asm/byteorder.h>
85 85
86#ifdef __BIG_ENDIAN 86#ifdef __BIG_ENDIAN
87#define endian_def_l2(e1,e2) \ 87#define endian_def_l2(e1, e2) \
88 volatile unsigned long e1,e2 88 volatile unsigned long e1, e2
89#define endian_def_s2(e1,e2) \ 89#define endian_def_s2(e1, e2) \
90 volatile unsigned short e1,e2 90 volatile unsigned short e1, e2
91#define endian_def_sb2(e1,e2,e3) \ 91#define endian_def_sb2(e1, e2, e3) \
92 volatile unsigned short e1;volatile unsigned char e2,e3 92 volatile unsigned short e1;volatile unsigned char e2, e3
93#define endian_def_b2s(e1,e2,e3) \ 93#define endian_def_b2s(e1, e2, e3) \
94 volatile unsigned char e1,e2;volatile unsigned short e3 94 volatile unsigned char e1, e2;volatile unsigned short e3
95#define endian_def_b4(e1,e2,e3,e4) \ 95#define endian_def_b4(e1, e2, e3, e4) \
96 volatile unsigned char e1,e2,e3,e4 96 volatile unsigned char e1, e2, e3, e4
97#else 97#else
98#define endian_def_l2(e1,e2) \ 98#define endian_def_l2(e1, e2) \
99 volatile unsigned long e2,e1 99 volatile unsigned long e2, e1
100#define endian_def_s2(e1,e2) \ 100#define endian_def_s2(e1, e2) \
101 volatile unsigned short e2,e1 101 volatile unsigned short e2, e1
102#define endian_def_sb2(e1,e2,e3) \ 102#define endian_def_sb2(e1, e2, e3) \
103 volatile unsigned char e3,e2;volatile unsigned short e1 103 volatile unsigned char e3, e2;volatile unsigned short e1
104#define endian_def_b2s(e1,e2,e3) \ 104#define endian_def_b2s(e1, e2, e3) \
105 volatile unsigned short e3;volatile unsigned char e2,e1 105 volatile unsigned short e3;volatile unsigned char e2, e1
106#define endian_def_b4(e1,e2,e3,e4) \ 106#define endian_def_b4(e1, e2, e3, e4) \
107 volatile unsigned char e4,e3,e2,e1 107 volatile unsigned char e4, e3, e2, e1
108#endif 108#endif
109 109
110 110
@@ -354,7 +354,7 @@ struct tx4938_ccfg_reg {
354#define TX4938_NUM_IR_SIO 2 354#define TX4938_NUM_IR_SIO 2
355#define TX4938_IR_SIO(n) (8 + (n)) 355#define TX4938_IR_SIO(n) (8 + (n))
356#define TX4938_NUM_IR_DMA 4 356#define TX4938_NUM_IR_DMA 4
357#define TX4938_IR_DMA(ch,n) ((ch ? 27 : 10) + (n)) /* 10-13,27-30 */ 357#define TX4938_IR_DMA(ch, n) ((ch ? 27 : 10) + (n)) /* 10-13, 27-30 */
358#define TX4938_IR_PIO 14 358#define TX4938_IR_PIO 14
359#define TX4938_IR_PDMAC 15 359#define TX4938_IR_PDMAC 15
360#define TX4938_IR_PCIC 16 360#define TX4938_IR_PCIC 16
diff --git a/include/asm-mips/tx4938/tx4938_mips.h b/include/asm-mips/tx4938/tx4938_mips.h
index 5f8498fef005..f346ff58b947 100644
--- a/include/asm-mips/tx4938/tx4938_mips.h
+++ b/include/asm-mips/tx4938/tx4938_mips.h
@@ -19,10 +19,10 @@
19#define reg_rd32(r) ((u32)(*((vu32*)(r)))) 19#define reg_rd32(r) ((u32)(*((vu32*)(r))))
20#define reg_rd64(r) ((u64)(*((vu64*)(r)))) 20#define reg_rd64(r) ((u64)(*((vu64*)(r))))
21 21
22#define reg_wr08(r,v) ((*((vu8 *)(r)))=((u8 )(v))) 22#define reg_wr08(r, v) ((*((vu8 *)(r)))=((u8 )(v)))
23#define reg_wr16(r,v) ((*((vu16*)(r)))=((u16)(v))) 23#define reg_wr16(r, v) ((*((vu16*)(r)))=((u16)(v)))
24#define reg_wr32(r,v) ((*((vu32*)(r)))=((u32)(v))) 24#define reg_wr32(r, v) ((*((vu32*)(r)))=((u32)(v)))
25#define reg_wr64(r,v) ((*((vu64*)(r)))=((u64)(v))) 25#define reg_wr64(r, v) ((*((vu64*)(r)))=((u64)(v)))
26 26
27typedef volatile __signed char vs8; 27typedef volatile __signed char vs8;
28typedef volatile unsigned char vu8; 28typedef volatile unsigned char vu8;
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index b25511787ee0..c30c718994c9 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -63,7 +63,7 @@
63#define get_fs() (current_thread_info()->addr_limit) 63#define get_fs() (current_thread_info()->addr_limit)
64#define set_fs(x) (current_thread_info()->addr_limit = (x)) 64#define set_fs(x) (current_thread_info()->addr_limit = (x))
65 65
66#define segment_eq(a,b) ((a).seg == (b).seg) 66#define segment_eq(a, b) ((a).seg == (b).seg)
67 67
68 68
69/* 69/*
@@ -108,7 +108,7 @@
108 (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) 108 (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0)
109 109
110#define access_ok(type, addr, size) \ 110#define access_ok(type, addr, size) \
111 likely(__access_ok((unsigned long)(addr), (size),__access_mask)) 111 likely(__access_ok((unsigned long)(addr), (size), __access_mask))
112 112
113/* 113/*
114 * put_user: - Write a simple value into user space. 114 * put_user: - Write a simple value into user space.
@@ -127,7 +127,7 @@
127 * Returns zero on success, or -EFAULT on error. 127 * Returns zero on success, or -EFAULT on error.
128 */ 128 */
129#define put_user(x,ptr) \ 129#define put_user(x,ptr) \
130 __put_user_check((x),(ptr),sizeof(*(ptr))) 130 __put_user_check((x), (ptr), sizeof(*(ptr)))
131 131
132/* 132/*
133 * get_user: - Get a simple variable from user space. 133 * get_user: - Get a simple variable from user space.
@@ -147,7 +147,7 @@
147 * On error, the variable @x is set to zero. 147 * On error, the variable @x is set to zero.
148 */ 148 */
149#define get_user(x,ptr) \ 149#define get_user(x,ptr) \
150 __get_user_check((x),(ptr),sizeof(*(ptr))) 150 __get_user_check((x), (ptr), sizeof(*(ptr)))
151 151
152/* 152/*
153 * __put_user: - Write a simple value into user space, with less checking. 153 * __put_user: - Write a simple value into user space, with less checking.
@@ -169,7 +169,7 @@
169 * Returns zero on success, or -EFAULT on error. 169 * Returns zero on success, or -EFAULT on error.
170 */ 170 */
171#define __put_user(x,ptr) \ 171#define __put_user(x,ptr) \
172 __put_user_nocheck((x),(ptr),sizeof(*(ptr))) 172 __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
173 173
174/* 174/*
175 * __get_user: - Get a simple variable from user space, with less checking. 175 * __get_user: - Get a simple variable from user space, with less checking.
@@ -192,7 +192,7 @@
192 * On error, the variable @x is set to zero. 192 * On error, the variable @x is set to zero.
193 */ 193 */
194#define __get_user(x,ptr) \ 194#define __get_user(x,ptr) \
195 __get_user_nocheck((x),(ptr),sizeof(*(ptr))) 195 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
196 196
197struct __large_struct { unsigned long buf[100]; }; 197struct __large_struct { unsigned long buf[100]; };
198#define __m(x) (*(struct __large_struct __user *)(x)) 198#define __m(x) (*(struct __large_struct __user *)(x))
@@ -221,7 +221,7 @@ do { \
221 } \ 221 } \
222} while (0) 222} while (0)
223 223
224#define __get_user_nocheck(x,ptr,size) \ 224#define __get_user_nocheck(x, ptr, size) \
225({ \ 225({ \
226 long __gu_err; \ 226 long __gu_err; \
227 \ 227 \
@@ -229,7 +229,7 @@ do { \
229 __gu_err; \ 229 __gu_err; \
230}) 230})
231 231
232#define __get_user_check(x,ptr,size) \ 232#define __get_user_check(x, ptr, size) \
233({ \ 233({ \
234 long __gu_err = -EFAULT; \ 234 long __gu_err = -EFAULT; \
235 const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ 235 const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
@@ -300,7 +300,7 @@ do { \
300#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr) 300#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr)
301#endif 301#endif
302 302
303#define __put_user_nocheck(x,ptr,size) \ 303#define __put_user_nocheck(x, ptr, size) \
304({ \ 304({ \
305 __typeof__(*(ptr)) __pu_val; \ 305 __typeof__(*(ptr)) __pu_val; \
306 long __pu_err = 0; \ 306 long __pu_err = 0; \
@@ -316,7 +316,7 @@ do { \
316 __pu_err; \ 316 __pu_err; \
317}) 317})
318 318
319#define __put_user_check(x,ptr,size) \ 319#define __put_user_check(x, ptr, size) \
320({ \ 320({ \
321 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ 321 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
322 __typeof__(*(ptr)) __pu_val = (x); \ 322 __typeof__(*(ptr)) __pu_val = (x); \
@@ -389,11 +389,11 @@ extern void __put_user_unknown(void);
389 389
390extern size_t __copy_user(void *__to, const void *__from, size_t __n); 390extern size_t __copy_user(void *__to, const void *__from, size_t __n);
391 391
392#define __invoke_copy_to_user(to,from,n) \ 392#define __invoke_copy_to_user(to, from, n) \
393({ \ 393({ \
394 register void __user *__cu_to_r __asm__ ("$4"); \ 394 register void __user *__cu_to_r __asm__("$4"); \
395 register const void *__cu_from_r __asm__ ("$5"); \ 395 register const void *__cu_from_r __asm__("$5"); \
396 register long __cu_len_r __asm__ ("$6"); \ 396 register long __cu_len_r __asm__("$6"); \
397 \ 397 \
398 __cu_to_r = (to); \ 398 __cu_to_r = (to); \
399 __cu_from_r = (from); \ 399 __cu_from_r = (from); \
@@ -421,7 +421,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
421 * Returns number of bytes that could not be copied. 421 * Returns number of bytes that could not be copied.
422 * On success, this will be zero. 422 * On success, this will be zero.
423 */ 423 */
424#define __copy_to_user(to,from,n) \ 424#define __copy_to_user(to, from, n) \
425({ \ 425({ \
426 void __user *__cu_to; \ 426 void __user *__cu_to; \
427 const void *__cu_from; \ 427 const void *__cu_from; \
@@ -437,7 +437,7 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
437 437
438extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); 438extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
439 439
440#define __copy_to_user_inatomic(to,from,n) \ 440#define __copy_to_user_inatomic(to, from, n) \
441({ \ 441({ \
442 void __user *__cu_to; \ 442 void __user *__cu_to; \
443 const void *__cu_from; \ 443 const void *__cu_from; \
@@ -450,7 +450,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
450 __cu_len; \ 450 __cu_len; \
451}) 451})
452 452
453#define __copy_from_user_inatomic(to,from,n) \ 453#define __copy_from_user_inatomic(to, from, n) \
454({ \ 454({ \
455 void *__cu_to; \ 455 void *__cu_to; \
456 const void __user *__cu_from; \ 456 const void __user *__cu_from; \
@@ -477,7 +477,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
477 * Returns number of bytes that could not be copied. 477 * Returns number of bytes that could not be copied.
478 * On success, this will be zero. 478 * On success, this will be zero.
479 */ 479 */
480#define copy_to_user(to,from,n) \ 480#define copy_to_user(to, from, n) \
481({ \ 481({ \
482 void __user *__cu_to; \ 482 void __user *__cu_to; \
483 const void *__cu_from; \ 483 const void *__cu_from; \
@@ -493,11 +493,11 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
493 __cu_len; \ 493 __cu_len; \
494}) 494})
495 495
496#define __invoke_copy_from_user(to,from,n) \ 496#define __invoke_copy_from_user(to, from, n) \
497({ \ 497({ \
498 register void *__cu_to_r __asm__ ("$4"); \ 498 register void *__cu_to_r __asm__("$4"); \
499 register const void __user *__cu_from_r __asm__ ("$5"); \ 499 register const void __user *__cu_from_r __asm__("$5"); \
500 register long __cu_len_r __asm__ ("$6"); \ 500 register long __cu_len_r __asm__("$6"); \
501 \ 501 \
502 __cu_to_r = (to); \ 502 __cu_to_r = (to); \
503 __cu_from_r = (from); \ 503 __cu_from_r = (from); \
@@ -516,11 +516,11 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
516 __cu_len_r; \ 516 __cu_len_r; \
517}) 517})
518 518
519#define __invoke_copy_from_user_inatomic(to,from,n) \ 519#define __invoke_copy_from_user_inatomic(to, from, n) \
520({ \ 520({ \
521 register void *__cu_to_r __asm__ ("$4"); \ 521 register void *__cu_to_r __asm__("$4"); \
522 register const void __user *__cu_from_r __asm__ ("$5"); \ 522 register const void __user *__cu_from_r __asm__("$5"); \
523 register long __cu_len_r __asm__ ("$6"); \ 523 register long __cu_len_r __asm__("$6"); \
524 \ 524 \
525 __cu_to_r = (to); \ 525 __cu_to_r = (to); \
526 __cu_from_r = (from); \ 526 __cu_from_r = (from); \
@@ -556,7 +556,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
556 * If some data could not be copied, this function will pad the copied 556 * If some data could not be copied, this function will pad the copied
557 * data to the requested size using zero bytes. 557 * data to the requested size using zero bytes.
558 */ 558 */
559#define __copy_from_user(to,from,n) \ 559#define __copy_from_user(to, from, n) \
560({ \ 560({ \
561 void *__cu_to; \ 561 void *__cu_to; \
562 const void __user *__cu_from; \ 562 const void __user *__cu_from; \
@@ -587,7 +587,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
587 * If some data could not be copied, this function will pad the copied 587 * If some data could not be copied, this function will pad the copied
588 * data to the requested size using zero bytes. 588 * data to the requested size using zero bytes.
589 */ 589 */
590#define copy_from_user(to,from,n) \ 590#define copy_from_user(to, from, n) \
591({ \ 591({ \
592 void *__cu_to; \ 592 void *__cu_to; \
593 const void __user *__cu_from; \ 593 const void __user *__cu_from; \
@@ -605,7 +605,7 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
605 605
606#define __copy_in_user(to, from, n) __copy_from_user(to, from, n) 606#define __copy_in_user(to, from, n) __copy_from_user(to, from, n)
607 607
608#define copy_in_user(to,from,n) \ 608#define copy_in_user(to, from, n) \
609({ \ 609({ \
610 void __user *__cu_to; \ 610 void __user *__cu_to; \
611 const void __user *__cu_from; \ 611 const void __user *__cu_from; \
diff --git a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h
index a0042563838a..3249049e93aa 100644
--- a/include/asm-mips/unaligned.h
+++ b/include/asm-mips/unaligned.h
@@ -3,12 +3,27 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1996, 1999, 2000, 2001, 2003 by Ralf Baechle 6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
8 */ 7 */
9#ifndef _ASM_UNALIGNED_H 8#ifndef __ASM_GENERIC_UNALIGNED_H
10#define _ASM_UNALIGNED_H 9#define __ASM_GENERIC_UNALIGNED_H
11 10
12#include <asm-generic/unaligned.h> 11#include <linux/compiler.h>
13 12
14#endif /* _ASM_UNALIGNED_H */ 13#define get_unaligned(ptr) \
14({ \
15 struct __packed { \
16 typeof(*(ptr)) __v; \
17 } *__p = (void *) (ptr); \
18 __p->__v; \
19})
20
21#define put_unaligned(val, ptr) \
22do { \
23 struct __packed { \
24 typeof(*(ptr)) __v; \
25 } *__p = (void *) (ptr); \
26 __p->__v = (val); \
27} while(0)
28
29#endif /* __ASM_GENERIC_UNALIGNED_H */
diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h
index c1dd0b10bc27..f4cff7e4fa8a 100644
--- a/include/asm-mips/vga.h
+++ b/include/asm-mips/vga.h
@@ -13,10 +13,10 @@
13 * access the videoram directly without any black magic. 13 * access the videoram directly without any black magic.
14 */ 14 */
15 15
16#define VGA_MAP_MEM(x,s) (0xb0000000L + (unsigned long)(x)) 16#define VGA_MAP_MEM(x, s) (0xb0000000L + (unsigned long)(x))
17 17
18#define vga_readb(x) (*(x)) 18#define vga_readb(x) (*(x))
19#define vga_writeb(x,y) (*(y) = (x)) 19#define vga_writeb(x, y) (*(y) = (x))
20 20
21#define VT_BUF_HAVE_RW 21#define VT_BUF_HAVE_RW
22/* 22/*
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index c0715d0a6b28..d2808edfd4e9 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -3,20 +3,22 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2002, 2004 by Ralf Baechle 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle
7 */ 7 */
8#ifndef _ASM_WAR_H 8#ifndef _ASM_WAR_H
9#define _ASM_WAR_H 9#define _ASM_WAR_H
10 10
11#include <war.h>
11 12
12/* 13/*
13 * Another R4600 erratum. Due to the lack of errata information the exact 14 * Another R4600 erratum. Due to the lack of errata information the exact
14 * technical details aren't known. I've experimentally found that disabling 15 * technical details aren't known. I've experimentally found that disabling
15 * interrupts during indexed I-cache flushes seems to be sufficient to deal 16 * interrupts during indexed I-cache flushes seems to be sufficient to deal
16 * with the issue. 17 * with the issue.
17 *
18 * #define R4600_V1_INDEX_ICACHEOP_WAR 1
19 */ 18 */
19#ifndef R4600_V1_INDEX_ICACHEOP_WAR
20#error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform
21#endif
20 22
21/* 23/*
22 * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: 24 * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
@@ -43,9 +45,10 @@
43 * nop 45 * nop
44 * nop 46 * nop
45 * cache Hit_Writeback_Invalidate_D 47 * cache Hit_Writeback_Invalidate_D
46 *
47 * #define R4600_V1_HIT_CACHEOP_WAR 1
48 */ 48 */
49#ifndef R4600_V1_HIT_CACHEOP_WAR
50#error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform
51#endif
49 52
50 53
51/* 54/*
@@ -58,32 +61,11 @@
58 * by a load instruction to an uncached address to empty the response buffer." 61 * by a load instruction to an uncached address to empty the response buffer."
59 * (Revision 2.0 device errata from IDT available on http://www.idt.com/ 62 * (Revision 2.0 device errata from IDT available on http://www.idt.com/
60 * in .pdf format.) 63 * in .pdf format.)
61 *
62 * #define R4600_V2_HIT_CACHEOP_WAR 1
63 */
64
65/*
66 * R4600 CPU modules for the Indy come with both V1.7 and V2.0 processors.
67 */
68#ifdef CONFIG_SGI_IP22
69
70#define R4600_V1_INDEX_ICACHEOP_WAR 1
71#define R4600_V1_HIT_CACHEOP_WAR 1
72#define R4600_V2_HIT_CACHEOP_WAR 1
73
74#endif
75
76/*
77 * But the RM200C seems to have been shipped only with V2.0 R4600s
78 */ 64 */
79#ifdef CONFIG_SNI_RM 65#ifndef R4600_V2_HIT_CACHEOP_WAR
80 66#error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform
81#define R4600_V2_HIT_CACHEOP_WAR 1
82
83#endif 67#endif
84 68
85#ifdef CONFIG_CPU_R5432
86
87/* 69/*
88 * When an interrupt happens on a CP0 register read instruction, CPU may 70 * When an interrupt happens on a CP0 register read instruction, CPU may
89 * lock up or read corrupted values of CP0 registers after it enters 71 * lock up or read corrupted values of CP0 registers after it enters
@@ -93,13 +75,10 @@
93 * first thing in the exception handler, which breaks one of the 75 * first thing in the exception handler, which breaks one of the
94 * pre-conditions for this problem. 76 * pre-conditions for this problem.
95 */ 77 */
96#define R5432_CP0_INTERRUPT_WAR 1 78#ifndef R5432_CP0_INTERRUPT_WAR
97 79#error Check setting of R5432_CP0_INTERRUPT_WAR for your platform
98#endif 80#endif
99 81
100#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
101 defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
102
103/* 82/*
104 * Workaround for the Sibyte M3 errata the text of which can be found at 83 * Workaround for the Sibyte M3 errata the text of which can be found at
105 * 84 *
@@ -110,13 +89,15 @@
110 * will just return and take the exception again if the information was 89 * will just return and take the exception again if the information was
111 * found to be inconsistent. 90 * found to be inconsistent.
112 */ 91 */
113#define BCM1250_M3_WAR 1 92#ifndef BCM1250_M3_WAR
93#error Check setting of BCM1250_M3_WAR for your platform
94#endif
114 95
115/* 96/*
116 * This is a DUART workaround related to glitches around register accesses 97 * This is a DUART workaround related to glitches around register accesses
117 */ 98 */
118#define SIBYTE_1956_WAR 1 99#ifndef SIBYTE_1956_WAR
119 100#error Check setting of SIBYTE_1956_WAR for your platform
120#endif 101#endif
121 102
122/* 103/*
@@ -131,9 +112,8 @@
131 * Affects: 112 * Affects:
132 * MIPS 4K RTL revision <3.0, PRID revision <4 113 * MIPS 4K RTL revision <3.0, PRID revision <4
133 */ 114 */
134#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_ATLAS) || \ 115#ifndef MIPS4K_ICACHE_REFILL_WAR
135 defined(CONFIG_MIPS_SEAD) 116#error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform
136#define MIPS4K_ICACHE_REFILL_WAR 1
137#endif 117#endif
138 118
139/* 119/*
@@ -151,9 +131,8 @@
151 * MIPS 5Kc,5Kf RTL revision <2.3, PRID revision <8 131 * MIPS 5Kc,5Kf RTL revision <2.3, PRID revision <8
152 * MIPS 20Kc RTL revision <4.0, PRID revision <? 132 * MIPS 20Kc RTL revision <4.0, PRID revision <?
153 */ 133 */
154#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_ATLAS) || \ 134#ifndef MIPS_CACHE_SYNC_WAR
155 defined(CONFIG_MIPS_SEAD) 135#error Check setting of MIPS_CACHE_SYNC_WAR for your platform
156#define MIPS_CACHE_SYNC_WAR 1
157#endif 136#endif
158 137
159/* 138/*
@@ -163,16 +142,16 @@
163 * 142 *
164 * Workaround: do two phase flushing for Index_Invalidate_I 143 * Workaround: do two phase flushing for Index_Invalidate_I
165 */ 144 */
166#ifdef CONFIG_CPU_TX49XX 145#ifndef TX49XX_ICACHE_INDEX_INV_WAR
167#define TX49XX_ICACHE_INDEX_INV_WAR 1 146#error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform
168#endif 147#endif
169 148
170/* 149/*
171 * On the RM9000 there is a problem which makes the CreateDirtyExclusive 150 * On the RM9000 there is a problem which makes the CreateDirtyExclusive
172 * eache operation unusable on SMP systems. 151 * eache operation unusable on SMP systems.
173 */ 152 */
174#if defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_BASLER_EXCITE) 153#ifndef RM9000_CDEX_SMP_WAR
175#define RM9000_CDEX_SMP_WAR 1 154#error Check setting of RM9000_CDEX_SMP_WAR for your platform
176#endif 155#endif
177 156
178/* 157/*
@@ -181,69 +160,23 @@
181 * I-cache line worth of instructions being fetched may case spurious 160 * I-cache line worth of instructions being fetched may case spurious
182 * exceptions. 161 * exceptions.
183 */ 162 */
184#if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MIPS_ATLAS) || \ 163#ifndef ICACHE_REFILLS_WORKAROUND_WAR
185 defined(CONFIG_MIPS_MALTA) || defined(CONFIG_PMC_YOSEMITE) || \ 164#error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform
186 defined(CONFIG_SGI_IP32) || defined(CONFIG_WR_PPMC)
187#define ICACHE_REFILLS_WORKAROUND_WAR 1
188#endif 165#endif
189 166
190/* 167/*
191 * On the R10000 upto version 2.6 (not sure about 2.7) there is a bug that 168 * On the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
192 * may cause ll / sc and lld / scd sequences to execute non-atomically. 169 * may cause ll / sc and lld / scd sequences to execute non-atomically.
193 */ 170 */
194#ifdef CONFIG_SGI_IP27 171#ifndef R10000_LLSC_WAR
195#define R10000_LLSC_WAR 1 172#error Check setting of R10000_LLSC_WAR for your platform
196#endif 173#endif
197 174
198/* 175/*
199 * 34K core erratum: "Problems Executing the TLBR Instruction" 176 * 34K core erratum: "Problems Executing the TLBR Instruction"
200 */ 177 */
201#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \
202 defined(CONFIG_PMC_MSP7120_FPGA)
203#define MIPS34K_MISSED_ITLB_WAR 1
204#endif
205
206/*
207 * Workarounds default to off
208 */
209#ifndef ICACHE_REFILLS_WORKAROUND_WAR
210#define ICACHE_REFILLS_WORKAROUND_WAR 0
211#endif
212#ifndef R4600_V1_INDEX_ICACHEOP_WAR
213#define R4600_V1_INDEX_ICACHEOP_WAR 0
214#endif
215#ifndef R4600_V1_HIT_CACHEOP_WAR
216#define R4600_V1_HIT_CACHEOP_WAR 0
217#endif
218#ifndef R4600_V2_HIT_CACHEOP_WAR
219#define R4600_V2_HIT_CACHEOP_WAR 0
220#endif
221#ifndef R5432_CP0_INTERRUPT_WAR
222#define R5432_CP0_INTERRUPT_WAR 0
223#endif
224#ifndef BCM1250_M3_WAR
225#define BCM1250_M3_WAR 0
226#endif
227#ifndef SIBYTE_1956_WAR
228#define SIBYTE_1956_WAR 0
229#endif
230#ifndef MIPS4K_ICACHE_REFILL_WAR
231#define MIPS4K_ICACHE_REFILL_WAR 0
232#endif
233#ifndef MIPS_CACHE_SYNC_WAR
234#define MIPS_CACHE_SYNC_WAR 0
235#endif
236#ifndef TX49XX_ICACHE_INDEX_INV_WAR
237#define TX49XX_ICACHE_INDEX_INV_WAR 0
238#endif
239#ifndef RM9000_CDEX_SMP_WAR
240#define RM9000_CDEX_SMP_WAR 0
241#endif
242#ifndef R10000_LLSC_WAR
243#define R10000_LLSC_WAR 0
244#endif
245#ifndef MIPS34K_MISSED_ITLB_WAR 178#ifndef MIPS34K_MISSED_ITLB_WAR
246#define MIPS34K_MISSED_ITLB_WAR 0 179#error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform
247#endif 180#endif
248 181
249#endif /* _ASM_WAR_H */ 182#endif /* _ASM_WAR_H */
diff --git a/include/asm-mips/xtalk/xtalk.h b/include/asm-mips/xtalk/xtalk.h
index 4a60f27c8817..79bac882a739 100644
--- a/include/asm-mips/xtalk/xtalk.h
+++ b/include/asm-mips/xtalk/xtalk.h
@@ -45,7 +45,7 @@ typedef struct xtalk_piomap_s *xtalk_piomap_t;
45#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0) 45#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0)
46#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS) 46#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS)
47#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT)) 47#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT))
48#define XIO_PACK(p,o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS)) 48#define XIO_PACK(p, o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS))
49 49
50#endif /* !__ASSEMBLY__ */ 50#endif /* !__ASSEMBLY__ */
51 51
diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h
index 0ec78f66cea4..e245f2a3cd78 100644
--- a/include/asm-sh/mpc1211/mc146818rtc.h
+++ b/include/asm-sh/mpc1211/mc146818rtc.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * MPC1211 uses PC/AT style RTC definitions. 2 * MPC1211 uses PC/AT style RTC definitions.
3 */ 3 */
4#include <asm-i386/mc146818rtc.h> 4#include <asm-x86/mc146818rtc_32.h>
5 5
6 6
diff --git a/include/asm-x86/8253pit.h b/include/asm-x86/8253pit.h
new file mode 100644
index 000000000000..d3c2b38a6618
--- /dev/null
+++ b/include/asm-x86/8253pit.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "8253pit_32.h"
3#else
4# include "8253pit_64.h"
5#endif
diff --git a/include/asm-i386/8253pit.h b/include/asm-x86/8253pit_32.h
index 96c7c3592daf..96c7c3592daf 100644
--- a/include/asm-i386/8253pit.h
+++ b/include/asm-x86/8253pit_32.h
diff --git a/include/asm-x86_64/8253pit.h b/include/asm-x86/8253pit_64.h
index 285f78488ccb..285f78488ccb 100644
--- a/include/asm-x86_64/8253pit.h
+++ b/include/asm-x86/8253pit_64.h
diff --git a/include/asm-x86/Kbuild b/include/asm-x86/Kbuild
new file mode 100644
index 000000000000..c5e43cb39874
--- /dev/null
+++ b/include/asm-x86/Kbuild
@@ -0,0 +1,88 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += boot.h
4header-y += bootsetup.h
5header-y += debugreg_32.h
6header-y += debugreg_64.h
7header-y += debugreg.h
8header-y += ldt_32.h
9header-y += ldt_64.h
10header-y += ldt.h
11header-y += msr-index.h
12header-y += prctl.h
13header-y += ptrace-abi_32.h
14header-y += ptrace-abi_64.h
15header-y += ptrace-abi.h
16header-y += sigcontext32.h
17header-y += ucontext_32.h
18header-y += ucontext_64.h
19header-y += ucontext.h
20header-y += vsyscall32.h
21
22unifdef-y += a.out_32.h
23unifdef-y += a.out_64.h
24unifdef-y += auxvec_32.h
25unifdef-y += auxvec_64.h
26unifdef-y += byteorder_32.h
27unifdef-y += byteorder_64.h
28unifdef-y += elf_32.h
29unifdef-y += elf_64.h
30unifdef-y += errno_32.h
31unifdef-y += errno_64.h
32unifdef-y += ioctls_32.h
33unifdef-y += ioctls_64.h
34unifdef-y += ipcbuf_32.h
35unifdef-y += ipcbuf_64.h
36unifdef-y += mce.h
37unifdef-y += mman_32.h
38unifdef-y += mman_64.h
39unifdef-y += msgbuf_32.h
40unifdef-y += msgbuf_64.h
41unifdef-y += msr_32.h
42unifdef-y += msr_64.h
43unifdef-y += msr.h
44unifdef-y += mtrr_32.h
45unifdef-y += mtrr_64.h
46unifdef-y += mtrr.h
47unifdef-y += page_32.h
48unifdef-y += page_64.h
49unifdef-y += param_32.h
50unifdef-y += param_64.h
51unifdef-y += posix_types_32.h
52unifdef-y += posix_types_64.h
53unifdef-y += ptrace_32.h
54unifdef-y += ptrace_64.h
55unifdef-y += resource_32.h
56unifdef-y += resource_64.h
57unifdef-y += sembuf_32.h
58unifdef-y += sembuf_64.h
59unifdef-y += setup_32.h
60unifdef-y += setup_64.h
61unifdef-y += shmbuf_32.h
62unifdef-y += shmbuf_64.h
63unifdef-y += shmparam_32.h
64unifdef-y += shmparam_64.h
65unifdef-y += sigcontext_32.h
66unifdef-y += sigcontext_64.h
67unifdef-y += siginfo_32.h
68unifdef-y += siginfo_64.h
69unifdef-y += signal_32.h
70unifdef-y += signal_64.h
71unifdef-y += sockios_32.h
72unifdef-y += sockios_64.h
73unifdef-y += stat_32.h
74unifdef-y += stat_64.h
75unifdef-y += statfs_32.h
76unifdef-y += statfs_64.h
77unifdef-y += termbits_32.h
78unifdef-y += termbits_64.h
79unifdef-y += termios_32.h
80unifdef-y += termios_64.h
81unifdef-y += types_32.h
82unifdef-y += types_64.h
83unifdef-y += unistd_32.h
84unifdef-y += unistd_64.h
85unifdef-y += user_32.h
86unifdef-y += user_64.h
87unifdef-y += vm86.h
88unifdef-y += vsyscall.h
diff --git a/include/asm-x86/a.out.h b/include/asm-x86/a.out.h
new file mode 100644
index 000000000000..5bc9b1d3b227
--- /dev/null
+++ b/include/asm-x86/a.out.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "a.out_32.h"
4# else
5# include "a.out_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "a.out_32.h"
10# else
11# include "a.out_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/a.out.h b/include/asm-x86/a.out_32.h
index 851a60f8258c..851a60f8258c 100644
--- a/include/asm-i386/a.out.h
+++ b/include/asm-x86/a.out_32.h
diff --git a/include/asm-x86_64/a.out.h b/include/asm-x86/a.out_64.h
index e789300e41a5..e789300e41a5 100644
--- a/include/asm-x86_64/a.out.h
+++ b/include/asm-x86/a.out_64.h
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h
new file mode 100644
index 000000000000..0693689d4146
--- /dev/null
+++ b/include/asm-x86/acpi.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "acpi_32.h"
3#else
4# include "acpi_64.h"
5#endif
diff --git a/include/asm-i386/acpi.h b/include/asm-x86/acpi_32.h
index 125179adf044..125179adf044 100644
--- a/include/asm-i386/acpi.h
+++ b/include/asm-x86/acpi_32.h
diff --git a/include/asm-x86_64/acpi.h b/include/asm-x86/acpi_64.h
index 98173357dd89..98173357dd89 100644
--- a/include/asm-x86_64/acpi.h
+++ b/include/asm-x86/acpi_64.h
diff --git a/include/asm-x86/agp.h b/include/asm-x86/agp.h
new file mode 100644
index 000000000000..9348f1e4f6f1
--- /dev/null
+++ b/include/asm-x86/agp.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "agp_32.h"
3#else
4# include "agp_64.h"
5#endif
diff --git a/include/asm-i386/agp.h b/include/asm-x86/agp_32.h
index 6af173dbf123..6af173dbf123 100644
--- a/include/asm-i386/agp.h
+++ b/include/asm-x86/agp_32.h
diff --git a/include/asm-x86_64/agp.h b/include/asm-x86/agp_64.h
index de338666f3f9..de338666f3f9 100644
--- a/include/asm-x86_64/agp.h
+++ b/include/asm-x86/agp_64.h
diff --git a/include/asm-x86/alternative-asm.i b/include/asm-x86/alternative-asm.i
new file mode 100644
index 000000000000..4f360cd3c888
--- /dev/null
+++ b/include/asm-x86/alternative-asm.i
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "alternative-asm_32.i"
3#else
4# include "alternative-asm_64.i"
5#endif
diff --git a/include/asm-i386/alternative-asm.i b/include/asm-x86/alternative-asm_32.i
index f0510209ccbe..f0510209ccbe 100644
--- a/include/asm-i386/alternative-asm.i
+++ b/include/asm-x86/alternative-asm_32.i
diff --git a/include/asm-x86_64/alternative-asm.i b/include/asm-x86/alternative-asm_64.i
index 0b3f1a2bb2cb..0b3f1a2bb2cb 100644
--- a/include/asm-x86_64/alternative-asm.i
+++ b/include/asm-x86/alternative-asm_64.i
diff --git a/include/asm-x86/alternative.h b/include/asm-x86/alternative.h
new file mode 100644
index 000000000000..9eef6a32a130
--- /dev/null
+++ b/include/asm-x86/alternative.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "alternative_32.h"
3#else
4# include "alternative_64.h"
5#endif
diff --git a/include/asm-i386/alternative.h b/include/asm-x86/alternative_32.h
index bda6c810c0f4..bda6c810c0f4 100644
--- a/include/asm-i386/alternative.h
+++ b/include/asm-x86/alternative_32.h
diff --git a/include/asm-x86_64/alternative.h b/include/asm-x86/alternative_64.h
index ab161e810151..ab161e810151 100644
--- a/include/asm-x86_64/alternative.h
+++ b/include/asm-x86/alternative_64.h
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
new file mode 100644
index 000000000000..9fbcc0bd2ac4
--- /dev/null
+++ b/include/asm-x86/apic.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "apic_32.h"
3#else
4# include "apic_64.h"
5#endif
diff --git a/include/asm-i386/apic.h b/include/asm-x86/apic_32.h
index 4091b33dcb10..4091b33dcb10 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-x86/apic_32.h
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86/apic_64.h
index 85125ef3c414..85125ef3c414 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86/apic_64.h
diff --git a/include/asm-x86/apicdef.h b/include/asm-x86/apicdef.h
new file mode 100644
index 000000000000..4542c220bf4d
--- /dev/null
+++ b/include/asm-x86/apicdef.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "apicdef_32.h"
3#else
4# include "apicdef_64.h"
5#endif
diff --git a/include/asm-i386/apicdef.h b/include/asm-x86/apicdef_32.h
index 9f6995341fdc..9f6995341fdc 100644
--- a/include/asm-i386/apicdef.h
+++ b/include/asm-x86/apicdef_32.h
diff --git a/include/asm-x86_64/apicdef.h b/include/asm-x86/apicdef_64.h
index 1dd40067c67c..1dd40067c67c 100644
--- a/include/asm-x86_64/apicdef.h
+++ b/include/asm-x86/apicdef_64.h
diff --git a/include/asm-i386/arch_hooks.h b/include/asm-x86/arch_hooks.h
index a8c1fca9726d..a8c1fca9726d 100644
--- a/include/asm-i386/arch_hooks.h
+++ b/include/asm-x86/arch_hooks.h
diff --git a/include/asm-x86/atomic.h b/include/asm-x86/atomic.h
new file mode 100644
index 000000000000..4e1b8873c474
--- /dev/null
+++ b/include/asm-x86/atomic.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "atomic_32.h"
3#else
4# include "atomic_64.h"
5#endif
diff --git a/include/asm-i386/atomic.h b/include/asm-x86/atomic_32.h
index 437aac801711..437aac801711 100644
--- a/include/asm-i386/atomic.h
+++ b/include/asm-x86/atomic_32.h
diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86/atomic_64.h
index f2e64634fa48..f2e64634fa48 100644
--- a/include/asm-x86_64/atomic.h
+++ b/include/asm-x86/atomic_64.h
diff --git a/include/asm-x86/auxvec.h b/include/asm-x86/auxvec.h
new file mode 100644
index 000000000000..7ff866f829ca
--- /dev/null
+++ b/include/asm-x86/auxvec.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "auxvec_32.h"
4# else
5# include "auxvec_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "auxvec_32.h"
10# else
11# include "auxvec_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/auxvec.h b/include/asm-x86/auxvec_32.h
index 395e13016bfb..395e13016bfb 100644
--- a/include/asm-i386/auxvec.h
+++ b/include/asm-x86/auxvec_32.h
diff --git a/include/asm-x86_64/auxvec.h b/include/asm-x86/auxvec_64.h
index 1d5ab0d03950..1d5ab0d03950 100644
--- a/include/asm-x86_64/auxvec.h
+++ b/include/asm-x86/auxvec_64.h
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
new file mode 100644
index 000000000000..07e3f6d4fe47
--- /dev/null
+++ b/include/asm-x86/bitops.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "bitops_32.h"
3#else
4# include "bitops_64.h"
5#endif
diff --git a/include/asm-i386/bitops.h b/include/asm-x86/bitops_32.h
index a20fe9822f60..a20fe9822f60 100644
--- a/include/asm-i386/bitops.h
+++ b/include/asm-x86/bitops_32.h
diff --git a/include/asm-x86_64/bitops.h b/include/asm-x86/bitops_64.h
index d4dbbe5f7bd9..d4dbbe5f7bd9 100644
--- a/include/asm-x86_64/bitops.h
+++ b/include/asm-x86/bitops_64.h
diff --git a/include/asm-i386/boot.h b/include/asm-x86/boot.h
index ed8affbf96cb..ed8affbf96cb 100644
--- a/include/asm-i386/boot.h
+++ b/include/asm-x86/boot.h
diff --git a/include/asm-i386/bootparam.h b/include/asm-x86/bootparam.h
index b91b01783e4b..b91b01783e4b 100644
--- a/include/asm-i386/bootparam.h
+++ b/include/asm-x86/bootparam.h
diff --git a/include/asm-x86_64/bootsetup.h b/include/asm-x86/bootsetup.h
index 7b1c3ad155fd..7b1c3ad155fd 100644
--- a/include/asm-x86_64/bootsetup.h
+++ b/include/asm-x86/bootsetup.h
diff --git a/include/asm-x86/bug.h b/include/asm-x86/bug.h
new file mode 100644
index 000000000000..c655d7f3a5e0
--- /dev/null
+++ b/include/asm-x86/bug.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "bug_32.h"
3#else
4# include "bug_64.h"
5#endif
diff --git a/include/asm-i386/bug.h b/include/asm-x86/bug_32.h
index b0fd78ca2619..b0fd78ca2619 100644
--- a/include/asm-i386/bug.h
+++ b/include/asm-x86/bug_32.h
diff --git a/include/asm-x86_64/bug.h b/include/asm-x86/bug_64.h
index 682606414913..682606414913 100644
--- a/include/asm-x86_64/bug.h
+++ b/include/asm-x86/bug_64.h
diff --git a/include/asm-x86/bugs.h b/include/asm-x86/bugs.h
new file mode 100644
index 000000000000..ddf42d36dd50
--- /dev/null
+++ b/include/asm-x86/bugs.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "bugs_32.h"
3#else
4# include "bugs_64.h"
5#endif
diff --git a/include/asm-i386/bugs.h b/include/asm-x86/bugs_32.h
index d28979ff73be..d28979ff73be 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-x86/bugs_32.h
diff --git a/include/asm-x86_64/bugs.h b/include/asm-x86/bugs_64.h
index b33dc04d8f42..b33dc04d8f42 100644
--- a/include/asm-x86_64/bugs.h
+++ b/include/asm-x86/bugs_64.h
diff --git a/include/asm-x86/byteorder.h b/include/asm-x86/byteorder.h
new file mode 100644
index 000000000000..eb14b1870ed7
--- /dev/null
+++ b/include/asm-x86/byteorder.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "byteorder_32.h"
4# else
5# include "byteorder_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "byteorder_32.h"
10# else
11# include "byteorder_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/byteorder.h b/include/asm-x86/byteorder_32.h
index a45470a8b74a..a45470a8b74a 100644
--- a/include/asm-i386/byteorder.h
+++ b/include/asm-x86/byteorder_32.h
diff --git a/include/asm-x86_64/byteorder.h b/include/asm-x86/byteorder_64.h
index 5e86c868c75e..5e86c868c75e 100644
--- a/include/asm-x86_64/byteorder.h
+++ b/include/asm-x86/byteorder_64.h
diff --git a/include/asm-x86/cache.h b/include/asm-x86/cache.h
new file mode 100644
index 000000000000..c36d190ac9d8
--- /dev/null
+++ b/include/asm-x86/cache.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "cache_32.h"
3#else
4# include "cache_64.h"
5#endif
diff --git a/include/asm-i386/cache.h b/include/asm-x86/cache_32.h
index 57c62f414158..57c62f414158 100644
--- a/include/asm-i386/cache.h
+++ b/include/asm-x86/cache_32.h
diff --git a/include/asm-x86_64/cache.h b/include/asm-x86/cache_64.h
index 052df758ae61..052df758ae61 100644
--- a/include/asm-x86_64/cache.h
+++ b/include/asm-x86/cache_64.h
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h
new file mode 100644
index 000000000000..e2df3b55034a
--- /dev/null
+++ b/include/asm-x86/cacheflush.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "cacheflush_32.h"
3#else
4# include "cacheflush_64.h"
5#endif
diff --git a/include/asm-i386/cacheflush.h b/include/asm-x86/cacheflush_32.h
index 74e03c8f2e51..74e03c8f2e51 100644
--- a/include/asm-i386/cacheflush.h
+++ b/include/asm-x86/cacheflush_32.h
diff --git a/include/asm-x86_64/cacheflush.h b/include/asm-x86/cacheflush_64.h
index ab1cb5c7dc92..ab1cb5c7dc92 100644
--- a/include/asm-x86_64/cacheflush.h
+++ b/include/asm-x86/cacheflush_64.h
diff --git a/include/asm-x86_64/calgary.h b/include/asm-x86/calgary.h
index 67f60406e2d8..67f60406e2d8 100644
--- a/include/asm-x86_64/calgary.h
+++ b/include/asm-x86/calgary.h
diff --git a/include/asm-x86_64/calling.h b/include/asm-x86/calling.h
index 6f4f63af96e1..6f4f63af96e1 100644
--- a/include/asm-x86_64/calling.h
+++ b/include/asm-x86/calling.h
diff --git a/include/asm-x86/checksum.h b/include/asm-x86/checksum.h
new file mode 100644
index 000000000000..848850fd7d62
--- /dev/null
+++ b/include/asm-x86/checksum.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "checksum_32.h"
3#else
4# include "checksum_64.h"
5#endif
diff --git a/include/asm-i386/checksum.h b/include/asm-x86/checksum_32.h
index 75194abbe8ee..75194abbe8ee 100644
--- a/include/asm-i386/checksum.h
+++ b/include/asm-x86/checksum_32.h
diff --git a/include/asm-x86_64/checksum.h b/include/asm-x86/checksum_64.h
index 419fe88a0342..419fe88a0342 100644
--- a/include/asm-x86_64/checksum.h
+++ b/include/asm-x86/checksum_64.h
diff --git a/include/asm-x86/cmpxchg.h b/include/asm-x86/cmpxchg.h
new file mode 100644
index 000000000000..a460fa088d4c
--- /dev/null
+++ b/include/asm-x86/cmpxchg.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "cmpxchg_32.h"
3#else
4# include "cmpxchg_64.h"
5#endif
diff --git a/include/asm-i386/cmpxchg.h b/include/asm-x86/cmpxchg_32.h
index f86ede28f6dc..f86ede28f6dc 100644
--- a/include/asm-i386/cmpxchg.h
+++ b/include/asm-x86/cmpxchg_32.h
diff --git a/include/asm-x86_64/cmpxchg.h b/include/asm-x86/cmpxchg_64.h
index 5e182062e6ec..5e182062e6ec 100644
--- a/include/asm-x86_64/cmpxchg.h
+++ b/include/asm-x86/cmpxchg_64.h
diff --git a/include/asm-x86_64/compat.h b/include/asm-x86/compat.h
index 53cb96b68a62..53cb96b68a62 100644
--- a/include/asm-x86_64/compat.h
+++ b/include/asm-x86/compat.h
diff --git a/include/asm-i386/cpu.h b/include/asm-x86/cpu.h
index 9d914e1e4aad..9d914e1e4aad 100644
--- a/include/asm-i386/cpu.h
+++ b/include/asm-x86/cpu.h
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
new file mode 100644
index 000000000000..b7160a4598d7
--- /dev/null
+++ b/include/asm-x86/cpufeature.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "cpufeature_32.h"
3#else
4# include "cpufeature_64.h"
5#endif
diff --git a/include/asm-i386/cpufeature.h b/include/asm-x86/cpufeature_32.h
index 7b3aa28ebc6e..7b3aa28ebc6e 100644
--- a/include/asm-i386/cpufeature.h
+++ b/include/asm-x86/cpufeature_32.h
diff --git a/include/asm-x86/cpufeature_64.h b/include/asm-x86/cpufeature_64.h
new file mode 100644
index 000000000000..2983501e8b3e
--- /dev/null
+++ b/include/asm-x86/cpufeature_64.h
@@ -0,0 +1,30 @@
1/*
2 * cpufeature_32.h
3 *
4 * Defines x86 CPU feature bits
5 */
6
7#ifndef __ASM_X8664_CPUFEATURE_H
8#define __ASM_X8664_CPUFEATURE_H
9
10#include <asm/cpufeature_32.h>
11
12#undef cpu_has_vme
13#define cpu_has_vme 0
14
15#undef cpu_has_pae
16#define cpu_has_pae ___BUG___
17
18#undef cpu_has_mp
19#define cpu_has_mp 1 /* XXX */
20
21#undef cpu_has_k6_mtrr
22#define cpu_has_k6_mtrr 0
23
24#undef cpu_has_cyrix_arr
25#define cpu_has_cyrix_arr 0
26
27#undef cpu_has_centaur_mcr
28#define cpu_has_centaur_mcr 0
29
30#endif /* __ASM_X8664_CPUFEATURE_H */
diff --git a/include/asm-x86/cputime.h b/include/asm-x86/cputime.h
new file mode 100644
index 000000000000..87c37cf6b707
--- /dev/null
+++ b/include/asm-x86/cputime.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "cputime_32.h"
3#else
4# include "cputime_64.h"
5#endif
diff --git a/include/asm-i386/cputime.h b/include/asm-x86/cputime_32.h
index 398ed7cd171d..398ed7cd171d 100644
--- a/include/asm-i386/cputime.h
+++ b/include/asm-x86/cputime_32.h
diff --git a/include/asm-x86_64/cputime.h b/include/asm-x86/cputime_64.h
index a07012dc5a3c..a07012dc5a3c 100644
--- a/include/asm-x86_64/cputime.h
+++ b/include/asm-x86/cputime_64.h
diff --git a/include/asm-x86/current.h b/include/asm-x86/current.h
new file mode 100644
index 000000000000..d2526d3f7346
--- /dev/null
+++ b/include/asm-x86/current.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "current_32.h"
3#else
4# include "current_64.h"
5#endif
diff --git a/include/asm-i386/current.h b/include/asm-x86/current_32.h
index d35248539912..d35248539912 100644
--- a/include/asm-i386/current.h
+++ b/include/asm-x86/current_32.h
diff --git a/include/asm-x86_64/current.h b/include/asm-x86/current_64.h
index bc8adecee66d..bc8adecee66d 100644
--- a/include/asm-x86_64/current.h
+++ b/include/asm-x86/current_64.h
diff --git a/include/asm-x86/debugreg.h b/include/asm-x86/debugreg.h
new file mode 100644
index 000000000000..b6ce7e4fa002
--- /dev/null
+++ b/include/asm-x86/debugreg.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "debugreg_32.h"
4# else
5# include "debugreg_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "debugreg_32.h"
10# else
11# include "debugreg_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/debugreg.h b/include/asm-x86/debugreg_32.h
index f0b2b06ae0f7..f0b2b06ae0f7 100644
--- a/include/asm-i386/debugreg.h
+++ b/include/asm-x86/debugreg_32.h
diff --git a/include/asm-x86_64/debugreg.h b/include/asm-x86/debugreg_64.h
index bd1aab1d8c4a..bd1aab1d8c4a 100644
--- a/include/asm-x86_64/debugreg.h
+++ b/include/asm-x86/debugreg_64.h
diff --git a/include/asm-x86/delay.h b/include/asm-x86/delay.h
new file mode 100644
index 000000000000..10f2c71d622b
--- /dev/null
+++ b/include/asm-x86/delay.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "delay_32.h"
3#else
4# include "delay_64.h"
5#endif
diff --git a/include/asm-i386/delay.h b/include/asm-x86/delay_32.h
index 9ae5e3782ed8..9ae5e3782ed8 100644
--- a/include/asm-i386/delay.h
+++ b/include/asm-x86/delay_32.h
diff --git a/include/asm-x86_64/delay.h b/include/asm-x86/delay_64.h
index c2669f1f5529..c2669f1f5529 100644
--- a/include/asm-x86_64/delay.h
+++ b/include/asm-x86/delay_64.h
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h
new file mode 100644
index 000000000000..6065c5092265
--- /dev/null
+++ b/include/asm-x86/desc.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "desc_32.h"
3#else
4# include "desc_64.h"
5#endif
diff --git a/include/asm-i386/desc.h b/include/asm-x86/desc_32.h
index c547403f341d..c547403f341d 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-x86/desc_32.h
diff --git a/include/asm-x86_64/desc.h b/include/asm-x86/desc_64.h
index ac991b5ca0fd..ac991b5ca0fd 100644
--- a/include/asm-x86_64/desc.h
+++ b/include/asm-x86/desc_64.h
diff --git a/include/asm-x86_64/desc_defs.h b/include/asm-x86/desc_defs.h
index 089004070099..089004070099 100644
--- a/include/asm-x86_64/desc_defs.h
+++ b/include/asm-x86/desc_defs.h
diff --git a/include/asm-x86/device.h b/include/asm-x86/device.h
new file mode 100644
index 000000000000..e2bcf7c7dcee
--- /dev/null
+++ b/include/asm-x86/device.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "device_32.h"
3#else
4# include "device_64.h"
5#endif
diff --git a/include/asm-i386/device.h b/include/asm-x86/device_32.h
index 849604c70e6b..849604c70e6b 100644
--- a/include/asm-i386/device.h
+++ b/include/asm-x86/device_32.h
diff --git a/include/asm-x86_64/device.h b/include/asm-x86/device_64.h
index 3afa03f33a36..3afa03f33a36 100644
--- a/include/asm-x86_64/device.h
+++ b/include/asm-x86/device_64.h
diff --git a/include/asm-x86/div64.h b/include/asm-x86/div64.h
new file mode 100644
index 000000000000..8ac7da6ca284
--- /dev/null
+++ b/include/asm-x86/div64.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "div64_32.h"
3#else
4# include "div64_64.h"
5#endif
diff --git a/include/asm-i386/div64.h b/include/asm-x86/div64_32.h
index 438e980068bd..438e980068bd 100644
--- a/include/asm-i386/div64.h
+++ b/include/asm-x86/div64_32.h
diff --git a/include/asm-x86_64/div64.h b/include/asm-x86/div64_64.h
index 6cd978cefb28..6cd978cefb28 100644
--- a/include/asm-x86_64/div64.h
+++ b/include/asm-x86/div64_64.h
diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h
new file mode 100644
index 000000000000..58f790f4df52
--- /dev/null
+++ b/include/asm-x86/dma-mapping.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "dma-mapping_32.h"
3#else
4# include "dma-mapping_64.h"
5#endif
diff --git a/include/asm-i386/dma-mapping.h b/include/asm-x86/dma-mapping_32.h
index f1d72d177f68..f1d72d177f68 100644
--- a/include/asm-i386/dma-mapping.h
+++ b/include/asm-x86/dma-mapping_32.h
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86/dma-mapping_64.h
index 6897e2a436e5..6897e2a436e5 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86/dma-mapping_64.h
diff --git a/include/asm-x86/dma.h b/include/asm-x86/dma.h
new file mode 100644
index 000000000000..9f936c61a4e5
--- /dev/null
+++ b/include/asm-x86/dma.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "dma_32.h"
3#else
4# include "dma_64.h"
5#endif
diff --git a/include/asm-i386/dma.h b/include/asm-x86/dma_32.h
index d23aac8e1a50..d23aac8e1a50 100644
--- a/include/asm-i386/dma.h
+++ b/include/asm-x86/dma_32.h
diff --git a/include/asm-x86_64/dma.h b/include/asm-x86/dma_64.h
index a37c16f06289..a37c16f06289 100644
--- a/include/asm-x86_64/dma.h
+++ b/include/asm-x86/dma_64.h
diff --git a/include/asm-x86/dmi.h b/include/asm-x86/dmi.h
new file mode 100644
index 000000000000..c9e4e8ebc270
--- /dev/null
+++ b/include/asm-x86/dmi.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "dmi_32.h"
3#else
4# include "dmi_64.h"
5#endif
diff --git a/include/asm-i386/dmi.h b/include/asm-x86/dmi_32.h
index 38d4eeb7fc7e..38d4eeb7fc7e 100644
--- a/include/asm-i386/dmi.h
+++ b/include/asm-x86/dmi_32.h
diff --git a/include/asm-x86_64/dmi.h b/include/asm-x86/dmi_64.h
index d02e32e3c3f0..d02e32e3c3f0 100644
--- a/include/asm-x86_64/dmi.h
+++ b/include/asm-x86/dmi_64.h
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h
new file mode 100644
index 000000000000..b3cbb0ccae18
--- /dev/null
+++ b/include/asm-x86/dwarf2.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "dwarf2_32.h"
3#else
4# include "dwarf2_64.h"
5#endif
diff --git a/include/asm-i386/dwarf2.h b/include/asm-x86/dwarf2_32.h
index 6d66398a307d..6d66398a307d 100644
--- a/include/asm-i386/dwarf2.h
+++ b/include/asm-x86/dwarf2_32.h
diff --git a/include/asm-x86_64/dwarf2.h b/include/asm-x86/dwarf2_64.h
index eedc08526b0b..eedc08526b0b 100644
--- a/include/asm-x86_64/dwarf2.h
+++ b/include/asm-x86/dwarf2_64.h
diff --git a/include/asm-x86/e820.h b/include/asm-x86/e820.h
new file mode 100644
index 000000000000..5d4d2183e5db
--- /dev/null
+++ b/include/asm-x86/e820.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "e820_32.h"
3#else
4# include "e820_64.h"
5#endif
diff --git a/include/asm-i386/e820.h b/include/asm-x86/e820_32.h
index cf67dbb1db79..cf67dbb1db79 100644
--- a/include/asm-i386/e820.h
+++ b/include/asm-x86/e820_32.h
diff --git a/include/asm-x86_64/e820.h b/include/asm-x86/e820_64.h
index 3486e701bd86..3486e701bd86 100644
--- a/include/asm-x86_64/e820.h
+++ b/include/asm-x86/e820_64.h
diff --git a/include/asm-x86/edac.h b/include/asm-x86/edac.h
new file mode 100644
index 000000000000..f8b888e140b0
--- /dev/null
+++ b/include/asm-x86/edac.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "edac_32.h"
3#else
4# include "edac_64.h"
5#endif
diff --git a/include/asm-i386/edac.h b/include/asm-x86/edac_32.h
index 3e7dd0ab68ce..3e7dd0ab68ce 100644
--- a/include/asm-i386/edac.h
+++ b/include/asm-x86/edac_32.h
diff --git a/include/asm-x86_64/edac.h b/include/asm-x86/edac_64.h
index cad1cd42b4ee..cad1cd42b4ee 100644
--- a/include/asm-x86_64/edac.h
+++ b/include/asm-x86/edac_64.h
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
new file mode 100644
index 000000000000..ed6bb6e546b9
--- /dev/null
+++ b/include/asm-x86/elf.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "elf_32.h"
4# else
5# include "elf_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "elf_32.h"
10# else
11# include "elf_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/elf.h b/include/asm-x86/elf_32.h
index b32df3a332da..b32df3a332da 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-x86/elf_32.h
diff --git a/include/asm-x86_64/elf.h b/include/asm-x86/elf_64.h
index b4fbe47f6ccd..b4fbe47f6ccd 100644
--- a/include/asm-x86_64/elf.h
+++ b/include/asm-x86/elf_64.h
diff --git a/include/asm-i386/emergency-restart.h b/include/asm-x86/emergency-restart.h
index 680c39563345..680c39563345 100644
--- a/include/asm-i386/emergency-restart.h
+++ b/include/asm-x86/emergency-restart.h
diff --git a/include/asm-x86/errno.h b/include/asm-x86/errno.h
new file mode 100644
index 000000000000..9d511be8e573
--- /dev/null
+++ b/include/asm-x86/errno.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "errno_32.h"
4# else
5# include "errno_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "errno_32.h"
10# else
11# include "errno_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/errno.h b/include/asm-x86/errno_32.h
index 969b34374728..969b34374728 100644
--- a/include/asm-i386/errno.h
+++ b/include/asm-x86/errno_32.h
diff --git a/include/asm-x86_64/errno.h b/include/asm-x86/errno_64.h
index 311182129e32..311182129e32 100644
--- a/include/asm-x86_64/errno.h
+++ b/include/asm-x86/errno_64.h
diff --git a/include/asm-x86/fb.h b/include/asm-x86/fb.h
new file mode 100644
index 000000000000..238c7ca45877
--- /dev/null
+++ b/include/asm-x86/fb.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "fb_32.h"
3#else
4# include "fb_64.h"
5#endif
diff --git a/include/asm-i386/fb.h b/include/asm-x86/fb_32.h
index d1c6297d4a61..d1c6297d4a61 100644
--- a/include/asm-i386/fb.h
+++ b/include/asm-x86/fb_32.h
diff --git a/include/asm-x86_64/fb.h b/include/asm-x86/fb_64.h
index 60548e651d12..60548e651d12 100644
--- a/include/asm-x86_64/fb.h
+++ b/include/asm-x86/fb_64.h
diff --git a/include/asm-i386/fcntl.h b/include/asm-x86/fcntl.h
index 46ab12db5739..46ab12db5739 100644
--- a/include/asm-i386/fcntl.h
+++ b/include/asm-x86/fcntl.h
diff --git a/include/asm-x86/fixmap.h b/include/asm-x86/fixmap.h
new file mode 100644
index 000000000000..382eb271a892
--- /dev/null
+++ b/include/asm-x86/fixmap.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "fixmap_32.h"
3#else
4# include "fixmap_64.h"
5#endif
diff --git a/include/asm-i386/fixmap.h b/include/asm-x86/fixmap_32.h
index 249e753ac805..249e753ac805 100644
--- a/include/asm-i386/fixmap.h
+++ b/include/asm-x86/fixmap_32.h
diff --git a/include/asm-x86_64/fixmap.h b/include/asm-x86/fixmap_64.h
index cdfbe4a6ae6f..cdfbe4a6ae6f 100644
--- a/include/asm-x86_64/fixmap.h
+++ b/include/asm-x86/fixmap_64.h
diff --git a/include/asm-x86/floppy.h b/include/asm-x86/floppy.h
new file mode 100644
index 000000000000..aecbb6dca21d
--- /dev/null
+++ b/include/asm-x86/floppy.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "floppy_32.h"
3#else
4# include "floppy_64.h"
5#endif
diff --git a/include/asm-i386/floppy.h b/include/asm-x86/floppy_32.h
index 44ef2f55a8e9..44ef2f55a8e9 100644
--- a/include/asm-i386/floppy.h
+++ b/include/asm-x86/floppy_32.h
diff --git a/include/asm-x86_64/floppy.h b/include/asm-x86/floppy_64.h
index 6ea13c3806f3..6ea13c3806f3 100644
--- a/include/asm-x86_64/floppy.h
+++ b/include/asm-x86/floppy_64.h
diff --git a/include/asm-x86_64/fpu32.h b/include/asm-x86/fpu32.h
index 4153db5c0c31..4153db5c0c31 100644
--- a/include/asm-x86_64/fpu32.h
+++ b/include/asm-x86/fpu32.h
diff --git a/include/asm-i386/frame.i b/include/asm-x86/frame.i
index 03620251ae17..03620251ae17 100644
--- a/include/asm-i386/frame.i
+++ b/include/asm-x86/frame.i
diff --git a/include/asm-x86/futex.h b/include/asm-x86/futex.h
new file mode 100644
index 000000000000..1f4610e0c613
--- /dev/null
+++ b/include/asm-x86/futex.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "futex_32.h"
3#else
4# include "futex_64.h"
5#endif
diff --git a/include/asm-i386/futex.h b/include/asm-x86/futex_32.h
index 438ef0ec7101..438ef0ec7101 100644
--- a/include/asm-i386/futex.h
+++ b/include/asm-x86/futex_32.h
diff --git a/include/asm-x86_64/futex.h b/include/asm-x86/futex_64.h
index 5cdfb08013c3..5cdfb08013c3 100644
--- a/include/asm-x86_64/futex.h
+++ b/include/asm-x86/futex_64.h
diff --git a/include/asm-x86/genapic.h b/include/asm-x86/genapic.h
new file mode 100644
index 000000000000..d48bee663a6f
--- /dev/null
+++ b/include/asm-x86/genapic.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "genapic_32.h"
3#else
4# include "genapic_64.h"
5#endif
diff --git a/include/asm-i386/genapic.h b/include/asm-x86/genapic_32.h
index 33e3ffe1766c..33e3ffe1766c 100644
--- a/include/asm-i386/genapic.h
+++ b/include/asm-x86/genapic_32.h
diff --git a/include/asm-x86_64/genapic.h b/include/asm-x86/genapic_64.h
index d7e516ccbaa4..d7e516ccbaa4 100644
--- a/include/asm-x86_64/genapic.h
+++ b/include/asm-x86/genapic_64.h
diff --git a/include/asm-i386/geode.h b/include/asm-x86/geode.h
index 6da4bbbea3dc..6da4bbbea3dc 100644
--- a/include/asm-i386/geode.h
+++ b/include/asm-x86/geode.h
diff --git a/include/asm-x86/hardirq.h b/include/asm-x86/hardirq.h
new file mode 100644
index 000000000000..314434d664e7
--- /dev/null
+++ b/include/asm-x86/hardirq.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "hardirq_32.h"
3#else
4# include "hardirq_64.h"
5#endif
diff --git a/include/asm-i386/hardirq.h b/include/asm-x86/hardirq_32.h
index 0e358dc405f8..0e358dc405f8 100644
--- a/include/asm-i386/hardirq.h
+++ b/include/asm-x86/hardirq_32.h
diff --git a/include/asm-x86_64/hardirq.h b/include/asm-x86/hardirq_64.h
index 95d5e090ed89..95d5e090ed89 100644
--- a/include/asm-x86_64/hardirq.h
+++ b/include/asm-x86/hardirq_64.h
diff --git a/include/asm-i386/highmem.h b/include/asm-x86/highmem.h
index 13cdcd66fff2..13cdcd66fff2 100644
--- a/include/asm-i386/highmem.h
+++ b/include/asm-x86/highmem.h
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
new file mode 100644
index 000000000000..9eff48601254
--- /dev/null
+++ b/include/asm-x86/hpet.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "hpet_32.h"
3#else
4# include "hpet_64.h"
5#endif
diff --git a/include/asm-i386/hpet.h b/include/asm-x86/hpet_32.h
index c82dc7ed96b3..c82dc7ed96b3 100644
--- a/include/asm-i386/hpet.h
+++ b/include/asm-x86/hpet_32.h
diff --git a/include/asm-x86/hpet_64.h b/include/asm-x86/hpet_64.h
new file mode 100644
index 000000000000..fd4decac93a8
--- /dev/null
+++ b/include/asm-x86/hpet_64.h
@@ -0,0 +1,18 @@
1#ifndef _ASM_X8664_HPET_H
2#define _ASM_X8664_HPET_H 1
3
4#include <asm/hpet_32.h>
5
6#define HPET_TICK_RATE (HZ * 100000UL)
7
8extern int hpet_rtc_timer_init(void);
9extern int hpet_arch_init(void);
10extern int hpet_timer_stop_set_go(unsigned long tick);
11extern int hpet_reenable(void);
12extern unsigned int hpet_calibrate_tsc(void);
13
14extern int hpet_use_timer;
15extern unsigned long hpet_period;
16extern unsigned long hpet_tick;
17
18#endif
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
new file mode 100644
index 000000000000..bf025399d939
--- /dev/null
+++ b/include/asm-x86/hw_irq.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "hw_irq_32.h"
3#else
4# include "hw_irq_64.h"
5#endif
diff --git a/include/asm-i386/hw_irq.h b/include/asm-x86/hw_irq_32.h
index 0bedbdf5e907..0bedbdf5e907 100644
--- a/include/asm-i386/hw_irq.h
+++ b/include/asm-x86/hw_irq_32.h
diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86/hw_irq_64.h
index 09dfc18a6dd0..09dfc18a6dd0 100644
--- a/include/asm-x86_64/hw_irq.h
+++ b/include/asm-x86/hw_irq_64.h
diff --git a/include/asm-i386/hypertransport.h b/include/asm-x86/hypertransport.h
index c16c6ff4bdd7..c16c6ff4bdd7 100644
--- a/include/asm-i386/hypertransport.h
+++ b/include/asm-x86/hypertransport.h
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
new file mode 100644
index 000000000000..a8bbed349664
--- /dev/null
+++ b/include/asm-x86/i387.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "i387_32.h"
3#else
4# include "i387_64.h"
5#endif
diff --git a/include/asm-i386/i387.h b/include/asm-x86/i387_32.h
index cdd1e248e3b4..cdd1e248e3b4 100644
--- a/include/asm-i386/i387.h
+++ b/include/asm-x86/i387_32.h
diff --git a/include/asm-x86_64/i387.h b/include/asm-x86/i387_64.h
index 0217b74cc9fc..0217b74cc9fc 100644
--- a/include/asm-x86_64/i387.h
+++ b/include/asm-x86/i387_64.h
diff --git a/include/asm-x86/i8253.h b/include/asm-x86/i8253.h
new file mode 100644
index 000000000000..b2a4f995a33f
--- /dev/null
+++ b/include/asm-x86/i8253.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "i8253_32.h"
3#else
4# include "i8253_64.h"
5#endif
diff --git a/include/asm-i386/i8253.h b/include/asm-x86/i8253_32.h
index 7577d058d86e..7577d058d86e 100644
--- a/include/asm-i386/i8253.h
+++ b/include/asm-x86/i8253_32.h
diff --git a/include/asm-x86_64/i8253.h b/include/asm-x86/i8253_64.h
index 015d8df07690..015d8df07690 100644
--- a/include/asm-x86_64/i8253.h
+++ b/include/asm-x86/i8253_64.h
diff --git a/include/asm-i386/i8259.h b/include/asm-x86/i8259.h
index 29d8f9a6b3fc..29d8f9a6b3fc 100644
--- a/include/asm-i386/i8259.h
+++ b/include/asm-x86/i8259.h
diff --git a/include/asm-x86_64/ia32.h b/include/asm-x86/ia32.h
index 0190b7c4e319..0190b7c4e319 100644
--- a/include/asm-x86_64/ia32.h
+++ b/include/asm-x86/ia32.h
diff --git a/include/asm-x86_64/ia32_unistd.h b/include/asm-x86/ia32_unistd.h
index 5b52ce507338..5b52ce507338 100644
--- a/include/asm-x86_64/ia32_unistd.h
+++ b/include/asm-x86/ia32_unistd.h
diff --git a/include/asm-i386/ide.h b/include/asm-x86/ide.h
index e7817a3d6578..e7817a3d6578 100644
--- a/include/asm-i386/ide.h
+++ b/include/asm-x86/ide.h
diff --git a/include/asm-x86_64/idle.h b/include/asm-x86/idle.h
index 6bd47dcf2067..6bd47dcf2067 100644
--- a/include/asm-x86_64/idle.h
+++ b/include/asm-x86/idle.h
diff --git a/include/asm-x86/intel_arch_perfmon.h b/include/asm-x86/intel_arch_perfmon.h
new file mode 100644
index 000000000000..4f6d4e6bf57e
--- /dev/null
+++ b/include/asm-x86/intel_arch_perfmon.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "intel_arch_perfmon_32.h"
3#else
4# include "intel_arch_perfmon_64.h"
5#endif
diff --git a/include/asm-i386/intel_arch_perfmon.h b/include/asm-x86/intel_arch_perfmon_32.h
index b52cd60a075b..b52cd60a075b 100644
--- a/include/asm-i386/intel_arch_perfmon.h
+++ b/include/asm-x86/intel_arch_perfmon_32.h
diff --git a/include/asm-x86_64/intel_arch_perfmon.h b/include/asm-x86/intel_arch_perfmon_64.h
index 8633331420ec..8633331420ec 100644
--- a/include/asm-x86_64/intel_arch_perfmon.h
+++ b/include/asm-x86/intel_arch_perfmon_64.h
diff --git a/include/asm-x86/io.h b/include/asm-x86/io.h
new file mode 100644
index 000000000000..5a58b176dd61
--- /dev/null
+++ b/include/asm-x86/io.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "io_32.h"
3#else
4# include "io_64.h"
5#endif
diff --git a/include/asm-i386/io.h b/include/asm-x86/io_32.h
index e8e0bd641120..e8e0bd641120 100644
--- a/include/asm-i386/io.h
+++ b/include/asm-x86/io_32.h
diff --git a/include/asm-x86_64/io.h b/include/asm-x86/io_64.h
index 7475095c5061..7475095c5061 100644
--- a/include/asm-x86_64/io.h
+++ b/include/asm-x86/io_64.h
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
new file mode 100644
index 000000000000..88494966beeb
--- /dev/null
+++ b/include/asm-x86/io_apic.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "io_apic_32.h"
3#else
4# include "io_apic_64.h"
5#endif
diff --git a/include/asm-i386/io_apic.h b/include/asm-x86/io_apic_32.h
index dbe734ddf2af..dbe734ddf2af 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-x86/io_apic_32.h
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86/io_apic_64.h
index d9f2e54324d5..d9f2e54324d5 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86/io_apic_64.h
diff --git a/include/asm-i386/ioctl.h b/include/asm-x86/ioctl.h
index b279fe06dfe5..b279fe06dfe5 100644
--- a/include/asm-i386/ioctl.h
+++ b/include/asm-x86/ioctl.h
diff --git a/include/asm-x86/ioctls.h b/include/asm-x86/ioctls.h
new file mode 100644
index 000000000000..1e0fd48f18bc
--- /dev/null
+++ b/include/asm-x86/ioctls.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ioctls_32.h"
4# else
5# include "ioctls_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ioctls_32.h"
10# else
11# include "ioctls_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ioctls.h b/include/asm-x86/ioctls_32.h
index ef5878762dc9..ef5878762dc9 100644
--- a/include/asm-i386/ioctls.h
+++ b/include/asm-x86/ioctls_32.h
diff --git a/include/asm-x86_64/ioctls.h b/include/asm-x86/ioctls_64.h
index 3fc0b15a0d7e..3fc0b15a0d7e 100644
--- a/include/asm-x86_64/ioctls.h
+++ b/include/asm-x86/ioctls_64.h
diff --git a/include/asm-x86_64/iommu.h b/include/asm-x86/iommu.h
index 5af471f228ee..5af471f228ee 100644
--- a/include/asm-x86_64/iommu.h
+++ b/include/asm-x86/iommu.h
diff --git a/include/asm-i386/ipc.h b/include/asm-x86/ipc.h
index a46e3d9c2a3f..a46e3d9c2a3f 100644
--- a/include/asm-i386/ipc.h
+++ b/include/asm-x86/ipc.h
diff --git a/include/asm-x86/ipcbuf.h b/include/asm-x86/ipcbuf.h
new file mode 100644
index 000000000000..eb2e448c6e28
--- /dev/null
+++ b/include/asm-x86/ipcbuf.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ipcbuf_32.h"
4# else
5# include "ipcbuf_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ipcbuf_32.h"
10# else
11# include "ipcbuf_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ipcbuf.h b/include/asm-x86/ipcbuf_32.h
index 0dcad4f84c2a..0dcad4f84c2a 100644
--- a/include/asm-i386/ipcbuf.h
+++ b/include/asm-x86/ipcbuf_32.h
diff --git a/include/asm-x86_64/ipcbuf.h b/include/asm-x86/ipcbuf_64.h
index 470cf85e3ba8..470cf85e3ba8 100644
--- a/include/asm-x86_64/ipcbuf.h
+++ b/include/asm-x86/ipcbuf_64.h
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86/ipi.h
index a7c75ea408a8..a7c75ea408a8 100644
--- a/include/asm-x86_64/ipi.h
+++ b/include/asm-x86/ipi.h
diff --git a/include/asm-x86/irq.h b/include/asm-x86/irq.h
new file mode 100644
index 000000000000..7ba905465a53
--- /dev/null
+++ b/include/asm-x86/irq.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "irq_32.h"
3#else
4# include "irq_64.h"
5#endif
diff --git a/include/asm-i386/irq.h b/include/asm-x86/irq_32.h
index 36f310632c49..36f310632c49 100644
--- a/include/asm-i386/irq.h
+++ b/include/asm-x86/irq_32.h
diff --git a/include/asm-x86_64/irq.h b/include/asm-x86/irq_64.h
index 5006c6e75656..5006c6e75656 100644
--- a/include/asm-x86_64/irq.h
+++ b/include/asm-x86/irq_64.h
diff --git a/include/asm-x86/irq_regs.h b/include/asm-x86/irq_regs.h
new file mode 100644
index 000000000000..89c898ab298b
--- /dev/null
+++ b/include/asm-x86/irq_regs.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "irq_regs_32.h"
3#else
4# include "irq_regs_64.h"
5#endif
diff --git a/include/asm-i386/irq_regs.h b/include/asm-x86/irq_regs_32.h
index 3368b20c0b48..3368b20c0b48 100644
--- a/include/asm-i386/irq_regs.h
+++ b/include/asm-x86/irq_regs_32.h
diff --git a/include/asm-x86_64/irq_regs.h b/include/asm-x86/irq_regs_64.h
index 3dd9c0b70270..3dd9c0b70270 100644
--- a/include/asm-x86_64/irq_regs.h
+++ b/include/asm-x86/irq_regs_64.h
diff --git a/include/asm-x86/irqflags.h b/include/asm-x86/irqflags.h
new file mode 100644
index 000000000000..1b695ff52687
--- /dev/null
+++ b/include/asm-x86/irqflags.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "irqflags_32.h"
3#else
4# include "irqflags_64.h"
5#endif
diff --git a/include/asm-i386/irqflags.h b/include/asm-x86/irqflags_32.h
index eff8585cb741..eff8585cb741 100644
--- a/include/asm-i386/irqflags.h
+++ b/include/asm-x86/irqflags_32.h
diff --git a/include/asm-x86_64/irqflags.h b/include/asm-x86/irqflags_64.h
index 86e70fe23659..86e70fe23659 100644
--- a/include/asm-x86_64/irqflags.h
+++ b/include/asm-x86/irqflags_64.h
diff --git a/include/asm-i386/ist.h b/include/asm-x86/ist.h
index ef2003ebc6f9..ef2003ebc6f9 100644
--- a/include/asm-i386/ist.h
+++ b/include/asm-x86/ist.h
diff --git a/include/asm-x86_64/k8.h b/include/asm-x86/k8.h
index 699dd6961eda..699dd6961eda 100644
--- a/include/asm-x86_64/k8.h
+++ b/include/asm-x86/k8.h
diff --git a/include/asm-x86/kdebug.h b/include/asm-x86/kdebug.h
new file mode 100644
index 000000000000..38479106c259
--- /dev/null
+++ b/include/asm-x86/kdebug.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "kdebug_32.h"
3#else
4# include "kdebug_64.h"
5#endif
diff --git a/include/asm-i386/kdebug.h b/include/asm-x86/kdebug_32.h
index a185b5f73e7f..a185b5f73e7f 100644
--- a/include/asm-i386/kdebug.h
+++ b/include/asm-x86/kdebug_32.h
diff --git a/include/asm-x86_64/kdebug.h b/include/asm-x86/kdebug_64.h
index d7e2bcf49e4f..d7e2bcf49e4f 100644
--- a/include/asm-x86_64/kdebug.h
+++ b/include/asm-x86/kdebug_64.h
diff --git a/include/asm-x86/kexec.h b/include/asm-x86/kexec.h
new file mode 100644
index 000000000000..718ddbfb9516
--- /dev/null
+++ b/include/asm-x86/kexec.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "kexec_32.h"
3#else
4# include "kexec_64.h"
5#endif
diff --git a/include/asm-i386/kexec.h b/include/asm-x86/kexec_32.h
index 4b9dc9e6b701..4b9dc9e6b701 100644
--- a/include/asm-i386/kexec.h
+++ b/include/asm-x86/kexec_32.h
diff --git a/include/asm-x86_64/kexec.h b/include/asm-x86/kexec_64.h
index 738e581b67f8..738e581b67f8 100644
--- a/include/asm-x86_64/kexec.h
+++ b/include/asm-x86/kexec_64.h
diff --git a/include/asm-x86/kmap_types.h b/include/asm-x86/kmap_types.h
new file mode 100644
index 000000000000..e4ec724b298e
--- /dev/null
+++ b/include/asm-x86/kmap_types.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "kmap_types_32.h"
3#else
4# include "kmap_types_64.h"
5#endif
diff --git a/include/asm-i386/kmap_types.h b/include/asm-x86/kmap_types_32.h
index 806aae3c5338..806aae3c5338 100644
--- a/include/asm-i386/kmap_types.h
+++ b/include/asm-x86/kmap_types_32.h
diff --git a/include/asm-x86_64/kmap_types.h b/include/asm-x86/kmap_types_64.h
index 7486338c6cea..7486338c6cea 100644
--- a/include/asm-x86_64/kmap_types.h
+++ b/include/asm-x86/kmap_types_64.h
diff --git a/include/asm-x86/kprobes.h b/include/asm-x86/kprobes.h
new file mode 100644
index 000000000000..b7bbd25ba2a6
--- /dev/null
+++ b/include/asm-x86/kprobes.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "kprobes_32.h"
3#else
4# include "kprobes_64.h"
5#endif
diff --git a/include/asm-i386/kprobes.h b/include/asm-x86/kprobes_32.h
index 06f7303c30ca..06f7303c30ca 100644
--- a/include/asm-i386/kprobes.h
+++ b/include/asm-x86/kprobes_32.h
diff --git a/include/asm-x86_64/kprobes.h b/include/asm-x86/kprobes_64.h
index 7db825403e01..7db825403e01 100644
--- a/include/asm-x86_64/kprobes.h
+++ b/include/asm-x86/kprobes_64.h
diff --git a/include/asm-x86/ldt.h b/include/asm-x86/ldt.h
new file mode 100644
index 000000000000..3d9cc20d2ba4
--- /dev/null
+++ b/include/asm-x86/ldt.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ldt_32.h"
4# else
5# include "ldt_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ldt_32.h"
10# else
11# include "ldt_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ldt.h b/include/asm-x86/ldt_32.h
index e9d3de1dee6c..e9d3de1dee6c 100644
--- a/include/asm-i386/ldt.h
+++ b/include/asm-x86/ldt_32.h
diff --git a/include/asm-x86_64/ldt.h b/include/asm-x86/ldt_64.h
index 9ef647b890d2..9ef647b890d2 100644
--- a/include/asm-x86_64/ldt.h
+++ b/include/asm-x86/ldt_64.h
diff --git a/include/asm-x86/linkage.h b/include/asm-x86/linkage.h
new file mode 100644
index 000000000000..94b257fa8701
--- /dev/null
+++ b/include/asm-x86/linkage.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "linkage_32.h"
3#else
4# include "linkage_64.h"
5#endif
diff --git a/include/asm-i386/linkage.h b/include/asm-x86/linkage_32.h
index f4a6ebac0247..f4a6ebac0247 100644
--- a/include/asm-i386/linkage.h
+++ b/include/asm-x86/linkage_32.h
diff --git a/include/asm-x86_64/linkage.h b/include/asm-x86/linkage_64.h
index b5f39d0189ce..b5f39d0189ce 100644
--- a/include/asm-x86_64/linkage.h
+++ b/include/asm-x86/linkage_64.h
diff --git a/include/asm-x86/local.h b/include/asm-x86/local.h
new file mode 100644
index 000000000000..c7a1b1c66c96
--- /dev/null
+++ b/include/asm-x86/local.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "local_32.h"
3#else
4# include "local_64.h"
5#endif
diff --git a/include/asm-i386/local.h b/include/asm-x86/local_32.h
index 6e85975b9ed2..6e85975b9ed2 100644
--- a/include/asm-i386/local.h
+++ b/include/asm-x86/local_32.h
diff --git a/include/asm-x86_64/local.h b/include/asm-x86/local_64.h
index e87492bb0693..e87492bb0693 100644
--- a/include/asm-x86_64/local.h
+++ b/include/asm-x86/local_64.h
diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-x86/mach-bigsmp/mach_apic.h
index ebd319f838ab..ebd319f838ab 100644
--- a/include/asm-i386/mach-bigsmp/mach_apic.h
+++ b/include/asm-x86/mach-bigsmp/mach_apic.h
diff --git a/include/asm-i386/mach-bigsmp/mach_apicdef.h b/include/asm-x86/mach-bigsmp/mach_apicdef.h
index a58ab5a75c8c..a58ab5a75c8c 100644
--- a/include/asm-i386/mach-bigsmp/mach_apicdef.h
+++ b/include/asm-x86/mach-bigsmp/mach_apicdef.h
diff --git a/include/asm-i386/mach-bigsmp/mach_ipi.h b/include/asm-x86/mach-bigsmp/mach_ipi.h
index 9404c535b7ec..9404c535b7ec 100644
--- a/include/asm-i386/mach-bigsmp/mach_ipi.h
+++ b/include/asm-x86/mach-bigsmp/mach_ipi.h
diff --git a/include/asm-i386/mach-bigsmp/mach_mpspec.h b/include/asm-x86/mach-bigsmp/mach_mpspec.h
index 6b5dadcf1d0e..6b5dadcf1d0e 100644
--- a/include/asm-i386/mach-bigsmp/mach_mpspec.h
+++ b/include/asm-x86/mach-bigsmp/mach_mpspec.h
diff --git a/include/asm-i386/mach-default/apm.h b/include/asm-x86/mach-default/apm.h
index 1f730b8bd1fd..1f730b8bd1fd 100644
--- a/include/asm-i386/mach-default/apm.h
+++ b/include/asm-x86/mach-default/apm.h
diff --git a/include/asm-i386/mach-default/bios_ebda.h b/include/asm-x86/mach-default/bios_ebda.h
index 9cbd9a668af8..9cbd9a668af8 100644
--- a/include/asm-i386/mach-default/bios_ebda.h
+++ b/include/asm-x86/mach-default/bios_ebda.h
diff --git a/include/asm-i386/mach-default/do_timer.h b/include/asm-x86/mach-default/do_timer.h
index 23ecda0b28a0..23ecda0b28a0 100644
--- a/include/asm-i386/mach-default/do_timer.h
+++ b/include/asm-x86/mach-default/do_timer.h
diff --git a/include/asm-i386/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
index bc861469bdba..bc861469bdba 100644
--- a/include/asm-i386/mach-default/entry_arch.h
+++ b/include/asm-x86/mach-default/entry_arch.h
diff --git a/include/asm-i386/mach-default/io_ports.h b/include/asm-x86/mach-default/io_ports.h
index 48540ba97166..48540ba97166 100644
--- a/include/asm-i386/mach-default/io_ports.h
+++ b/include/asm-x86/mach-default/io_ports.h
diff --git a/include/asm-i386/mach-default/irq_vectors.h b/include/asm-x86/mach-default/irq_vectors.h
index 881c63ca61ad..881c63ca61ad 100644
--- a/include/asm-i386/mach-default/irq_vectors.h
+++ b/include/asm-x86/mach-default/irq_vectors.h
diff --git a/include/asm-i386/mach-default/irq_vectors_limits.h b/include/asm-x86/mach-default/irq_vectors_limits.h
index a90c7a60109f..a90c7a60109f 100644
--- a/include/asm-i386/mach-default/irq_vectors_limits.h
+++ b/include/asm-x86/mach-default/irq_vectors_limits.h
diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index 6db1c3babe9a..6db1c3babe9a 100644
--- a/include/asm-i386/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
diff --git a/include/asm-i386/mach-default/mach_apicdef.h b/include/asm-x86/mach-default/mach_apicdef.h
index 7bcb350c3ee8..7bcb350c3ee8 100644
--- a/include/asm-i386/mach-default/mach_apicdef.h
+++ b/include/asm-x86/mach-default/mach_apicdef.h
diff --git a/include/asm-i386/mach-default/mach_ipi.h b/include/asm-x86/mach-default/mach_ipi.h
index 0dba244c86db..0dba244c86db 100644
--- a/include/asm-i386/mach-default/mach_ipi.h
+++ b/include/asm-x86/mach-default/mach_ipi.h
diff --git a/include/asm-i386/mach-default/mach_mpparse.h b/include/asm-x86/mach-default/mach_mpparse.h
index 1d3832482580..1d3832482580 100644
--- a/include/asm-i386/mach-default/mach_mpparse.h
+++ b/include/asm-x86/mach-default/mach_mpparse.h
diff --git a/include/asm-i386/mach-default/mach_mpspec.h b/include/asm-x86/mach-default/mach_mpspec.h
index 51c9a9775932..51c9a9775932 100644
--- a/include/asm-i386/mach-default/mach_mpspec.h
+++ b/include/asm-x86/mach-default/mach_mpspec.h
diff --git a/include/asm-i386/mach-default/mach_reboot.h b/include/asm-x86/mach-default/mach_reboot.h
index e23fd9fbebb3..e23fd9fbebb3 100644
--- a/include/asm-i386/mach-default/mach_reboot.h
+++ b/include/asm-x86/mach-default/mach_reboot.h
diff --git a/include/asm-i386/mach-default/mach_time.h b/include/asm-x86/mach-default/mach_time.h
index 31eb5de6f3dc..31eb5de6f3dc 100644
--- a/include/asm-i386/mach-default/mach_time.h
+++ b/include/asm-x86/mach-default/mach_time.h
diff --git a/include/asm-i386/mach-default/mach_timer.h b/include/asm-x86/mach-default/mach_timer.h
index 807992fd4171..807992fd4171 100644
--- a/include/asm-i386/mach-default/mach_timer.h
+++ b/include/asm-x86/mach-default/mach_timer.h
diff --git a/include/asm-i386/mach-default/mach_traps.h b/include/asm-x86/mach-default/mach_traps.h
index 625438b8a6eb..625438b8a6eb 100644
--- a/include/asm-i386/mach-default/mach_traps.h
+++ b/include/asm-x86/mach-default/mach_traps.h
diff --git a/include/asm-i386/mach-default/mach_wakecpu.h b/include/asm-x86/mach-default/mach_wakecpu.h
index 3ebb17893aa5..3ebb17893aa5 100644
--- a/include/asm-i386/mach-default/mach_wakecpu.h
+++ b/include/asm-x86/mach-default/mach_wakecpu.h
diff --git a/include/asm-i386/mach-default/pci-functions.h b/include/asm-x86/mach-default/pci-functions.h
index ed0bab427354..ed0bab427354 100644
--- a/include/asm-i386/mach-default/pci-functions.h
+++ b/include/asm-x86/mach-default/pci-functions.h
diff --git a/include/asm-i386/mach-default/setup_arch.h b/include/asm-x86/mach-default/setup_arch.h
index 605e3ccb991b..605e3ccb991b 100644
--- a/include/asm-i386/mach-default/setup_arch.h
+++ b/include/asm-x86/mach-default/setup_arch.h
diff --git a/include/asm-i386/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h
index 7f45f6311059..7f45f6311059 100644
--- a/include/asm-i386/mach-default/smpboot_hooks.h
+++ b/include/asm-x86/mach-default/smpboot_hooks.h
diff --git a/include/asm-i386/mach-es7000/mach_apic.h b/include/asm-x86/mach-es7000/mach_apic.h
index caec64be516d..caec64be516d 100644
--- a/include/asm-i386/mach-es7000/mach_apic.h
+++ b/include/asm-x86/mach-es7000/mach_apic.h
diff --git a/include/asm-i386/mach-es7000/mach_apicdef.h b/include/asm-x86/mach-es7000/mach_apicdef.h
index a58ab5a75c8c..a58ab5a75c8c 100644
--- a/include/asm-i386/mach-es7000/mach_apicdef.h
+++ b/include/asm-x86/mach-es7000/mach_apicdef.h
diff --git a/include/asm-i386/mach-es7000/mach_ipi.h b/include/asm-x86/mach-es7000/mach_ipi.h
index 5e61bd220b06..5e61bd220b06 100644
--- a/include/asm-i386/mach-es7000/mach_ipi.h
+++ b/include/asm-x86/mach-es7000/mach_ipi.h
diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-x86/mach-es7000/mach_mpparse.h
index 8aa10547b4b1..8aa10547b4b1 100644
--- a/include/asm-i386/mach-es7000/mach_mpparse.h
+++ b/include/asm-x86/mach-es7000/mach_mpparse.h
diff --git a/include/asm-i386/mach-es7000/mach_mpspec.h b/include/asm-x86/mach-es7000/mach_mpspec.h
index b1f5039d4506..b1f5039d4506 100644
--- a/include/asm-i386/mach-es7000/mach_mpspec.h
+++ b/include/asm-x86/mach-es7000/mach_mpspec.h
diff --git a/include/asm-i386/mach-es7000/mach_wakecpu.h b/include/asm-x86/mach-es7000/mach_wakecpu.h
index 84ff58314501..84ff58314501 100644
--- a/include/asm-i386/mach-es7000/mach_wakecpu.h
+++ b/include/asm-x86/mach-es7000/mach_wakecpu.h
diff --git a/include/asm-i386/mach-generic/irq_vectors_limits.h b/include/asm-x86/mach-generic/irq_vectors_limits.h
index 890ce3f5e09a..890ce3f5e09a 100644
--- a/include/asm-i386/mach-generic/irq_vectors_limits.h
+++ b/include/asm-x86/mach-generic/irq_vectors_limits.h
diff --git a/include/asm-i386/mach-generic/mach_apic.h b/include/asm-x86/mach-generic/mach_apic.h
index a236e7021528..a236e7021528 100644
--- a/include/asm-i386/mach-generic/mach_apic.h
+++ b/include/asm-x86/mach-generic/mach_apic.h
diff --git a/include/asm-i386/mach-generic/mach_apicdef.h b/include/asm-x86/mach-generic/mach_apicdef.h
index 28ed98972ca8..28ed98972ca8 100644
--- a/include/asm-i386/mach-generic/mach_apicdef.h
+++ b/include/asm-x86/mach-generic/mach_apicdef.h
diff --git a/include/asm-i386/mach-generic/mach_ipi.h b/include/asm-x86/mach-generic/mach_ipi.h
index 441b0fe3ed1d..441b0fe3ed1d 100644
--- a/include/asm-i386/mach-generic/mach_ipi.h
+++ b/include/asm-x86/mach-generic/mach_ipi.h
diff --git a/include/asm-i386/mach-generic/mach_mpparse.h b/include/asm-x86/mach-generic/mach_mpparse.h
index dbd9fce54f4d..dbd9fce54f4d 100644
--- a/include/asm-i386/mach-generic/mach_mpparse.h
+++ b/include/asm-x86/mach-generic/mach_mpparse.h
diff --git a/include/asm-i386/mach-generic/mach_mpspec.h b/include/asm-x86/mach-generic/mach_mpspec.h
index 9ef0b941bb22..9ef0b941bb22 100644
--- a/include/asm-i386/mach-generic/mach_mpspec.h
+++ b/include/asm-x86/mach-generic/mach_mpspec.h
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-x86/mach-numaq/mach_apic.h
index 5e5e7dd2692e..5e5e7dd2692e 100644
--- a/include/asm-i386/mach-numaq/mach_apic.h
+++ b/include/asm-x86/mach-numaq/mach_apic.h
diff --git a/include/asm-i386/mach-numaq/mach_apicdef.h b/include/asm-x86/mach-numaq/mach_apicdef.h
index bf439d0690f5..bf439d0690f5 100644
--- a/include/asm-i386/mach-numaq/mach_apicdef.h
+++ b/include/asm-x86/mach-numaq/mach_apicdef.h
diff --git a/include/asm-i386/mach-numaq/mach_ipi.h b/include/asm-x86/mach-numaq/mach_ipi.h
index c6044488e9e6..c6044488e9e6 100644
--- a/include/asm-i386/mach-numaq/mach_ipi.h
+++ b/include/asm-x86/mach-numaq/mach_ipi.h
diff --git a/include/asm-i386/mach-numaq/mach_mpparse.h b/include/asm-x86/mach-numaq/mach_mpparse.h
index 51bbac8fc0c2..51bbac8fc0c2 100644
--- a/include/asm-i386/mach-numaq/mach_mpparse.h
+++ b/include/asm-x86/mach-numaq/mach_mpparse.h
diff --git a/include/asm-i386/mach-numaq/mach_mpspec.h b/include/asm-x86/mach-numaq/mach_mpspec.h
index dffb09856f8f..dffb09856f8f 100644
--- a/include/asm-i386/mach-numaq/mach_mpspec.h
+++ b/include/asm-x86/mach-numaq/mach_mpspec.h
diff --git a/include/asm-i386/mach-numaq/mach_wakecpu.h b/include/asm-x86/mach-numaq/mach_wakecpu.h
index 00530041a991..00530041a991 100644
--- a/include/asm-i386/mach-numaq/mach_wakecpu.h
+++ b/include/asm-x86/mach-numaq/mach_wakecpu.h
diff --git a/include/asm-i386/mach-summit/irq_vectors_limits.h b/include/asm-x86/mach-summit/irq_vectors_limits.h
index 890ce3f5e09a..890ce3f5e09a 100644
--- a/include/asm-i386/mach-summit/irq_vectors_limits.h
+++ b/include/asm-x86/mach-summit/irq_vectors_limits.h
diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-x86/mach-summit/mach_apic.h
index 732f776aab8e..732f776aab8e 100644
--- a/include/asm-i386/mach-summit/mach_apic.h
+++ b/include/asm-x86/mach-summit/mach_apic.h
diff --git a/include/asm-i386/mach-summit/mach_apicdef.h b/include/asm-x86/mach-summit/mach_apicdef.h
index a58ab5a75c8c..a58ab5a75c8c 100644
--- a/include/asm-i386/mach-summit/mach_apicdef.h
+++ b/include/asm-x86/mach-summit/mach_apicdef.h
diff --git a/include/asm-i386/mach-summit/mach_ipi.h b/include/asm-x86/mach-summit/mach_ipi.h
index 9404c535b7ec..9404c535b7ec 100644
--- a/include/asm-i386/mach-summit/mach_ipi.h
+++ b/include/asm-x86/mach-summit/mach_ipi.h
diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-x86/mach-summit/mach_mpparse.h
index c2520539d934..c2520539d934 100644
--- a/include/asm-i386/mach-summit/mach_mpparse.h
+++ b/include/asm-x86/mach-summit/mach_mpparse.h
diff --git a/include/asm-i386/mach-summit/mach_mpspec.h b/include/asm-x86/mach-summit/mach_mpspec.h
index bd765523511a..bd765523511a 100644
--- a/include/asm-i386/mach-summit/mach_mpspec.h
+++ b/include/asm-x86/mach-summit/mach_mpspec.h
diff --git a/include/asm-i386/mach-visws/cobalt.h b/include/asm-x86/mach-visws/cobalt.h
index 33c36225a042..33c36225a042 100644
--- a/include/asm-i386/mach-visws/cobalt.h
+++ b/include/asm-x86/mach-visws/cobalt.h
diff --git a/include/asm-i386/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h
index b183fa6d83d9..b183fa6d83d9 100644
--- a/include/asm-i386/mach-visws/entry_arch.h
+++ b/include/asm-x86/mach-visws/entry_arch.h
diff --git a/include/asm-i386/mach-visws/irq_vectors.h b/include/asm-x86/mach-visws/irq_vectors.h
index cb572d8db505..cb572d8db505 100644
--- a/include/asm-i386/mach-visws/irq_vectors.h
+++ b/include/asm-x86/mach-visws/irq_vectors.h
diff --git a/include/asm-i386/mach-visws/lithium.h b/include/asm-x86/mach-visws/lithium.h
index d443e68d0066..d443e68d0066 100644
--- a/include/asm-i386/mach-visws/lithium.h
+++ b/include/asm-x86/mach-visws/lithium.h
diff --git a/include/asm-i386/mach-visws/mach_apic.h b/include/asm-x86/mach-visws/mach_apic.h
index efac6f0d139f..efac6f0d139f 100644
--- a/include/asm-i386/mach-visws/mach_apic.h
+++ b/include/asm-x86/mach-visws/mach_apic.h
diff --git a/include/asm-i386/mach-visws/mach_apicdef.h b/include/asm-x86/mach-visws/mach_apicdef.h
index 826cfa97d778..826cfa97d778 100644
--- a/include/asm-i386/mach-visws/mach_apicdef.h
+++ b/include/asm-x86/mach-visws/mach_apicdef.h
diff --git a/include/asm-i386/mach-visws/piix4.h b/include/asm-x86/mach-visws/piix4.h
index 83ea4f46e419..83ea4f46e419 100644
--- a/include/asm-i386/mach-visws/piix4.h
+++ b/include/asm-x86/mach-visws/piix4.h
diff --git a/include/asm-i386/mach-visws/setup_arch.h b/include/asm-x86/mach-visws/setup_arch.h
index 33f700ef6831..33f700ef6831 100644
--- a/include/asm-i386/mach-visws/setup_arch.h
+++ b/include/asm-x86/mach-visws/setup_arch.h
diff --git a/include/asm-i386/mach-visws/smpboot_hooks.h b/include/asm-x86/mach-visws/smpboot_hooks.h
index d926471fa359..d926471fa359 100644
--- a/include/asm-i386/mach-visws/smpboot_hooks.h
+++ b/include/asm-x86/mach-visws/smpboot_hooks.h
diff --git a/include/asm-i386/mach-voyager/do_timer.h b/include/asm-x86/mach-voyager/do_timer.h
index bc2b58926308..bc2b58926308 100644
--- a/include/asm-i386/mach-voyager/do_timer.h
+++ b/include/asm-x86/mach-voyager/do_timer.h
diff --git a/include/asm-i386/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h
index 4a1e1e8c10b6..4a1e1e8c10b6 100644
--- a/include/asm-i386/mach-voyager/entry_arch.h
+++ b/include/asm-x86/mach-voyager/entry_arch.h
diff --git a/include/asm-i386/mach-voyager/irq_vectors.h b/include/asm-x86/mach-voyager/irq_vectors.h
index 165421f5821c..165421f5821c 100644
--- a/include/asm-i386/mach-voyager/irq_vectors.h
+++ b/include/asm-x86/mach-voyager/irq_vectors.h
diff --git a/include/asm-i386/mach-voyager/setup_arch.h b/include/asm-x86/mach-voyager/setup_arch.h
index 84d01ad33459..84d01ad33459 100644
--- a/include/asm-i386/mach-voyager/setup_arch.h
+++ b/include/asm-x86/mach-voyager/setup_arch.h
diff --git a/include/asm-x86_64/mach_apic.h b/include/asm-x86/mach_apic.h
index 7b7115a0c1c9..7b7115a0c1c9 100644
--- a/include/asm-x86_64/mach_apic.h
+++ b/include/asm-x86/mach_apic.h
diff --git a/include/asm-i386/math_emu.h b/include/asm-x86/math_emu.h
index a4b0aa3320e6..a4b0aa3320e6 100644
--- a/include/asm-i386/math_emu.h
+++ b/include/asm-x86/math_emu.h
diff --git a/include/asm-x86/mc146818rtc.h b/include/asm-x86/mc146818rtc.h
new file mode 100644
index 000000000000..5c2bb66caf17
--- /dev/null
+++ b/include/asm-x86/mc146818rtc.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mc146818rtc_32.h"
3#else
4# include "mc146818rtc_64.h"
5#endif
diff --git a/include/asm-i386/mc146818rtc.h b/include/asm-x86/mc146818rtc_32.h
index 1613b42eaf58..1613b42eaf58 100644
--- a/include/asm-i386/mc146818rtc.h
+++ b/include/asm-x86/mc146818rtc_32.h
diff --git a/include/asm-x86_64/mc146818rtc.h b/include/asm-x86/mc146818rtc_64.h
index d6e3009430c1..d6e3009430c1 100644
--- a/include/asm-x86_64/mc146818rtc.h
+++ b/include/asm-x86/mc146818rtc_64.h
diff --git a/include/asm-i386/mca.h b/include/asm-x86/mca.h
index 09adf2eac4dc..09adf2eac4dc 100644
--- a/include/asm-i386/mca.h
+++ b/include/asm-x86/mca.h
diff --git a/include/asm-i386/mca_dma.h b/include/asm-x86/mca_dma.h
index fbb1f3b71279..fbb1f3b71279 100644
--- a/include/asm-i386/mca_dma.h
+++ b/include/asm-x86/mca_dma.h
diff --git a/include/asm-x86/mce.h b/include/asm-x86/mce.h
new file mode 100644
index 000000000000..cc8ca389912e
--- /dev/null
+++ b/include/asm-x86/mce.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mce_32.h"
3#else
4# include "mce_64.h"
5#endif
diff --git a/include/asm-i386/mce.h b/include/asm-x86/mce_32.h
index d56d89742e8f..d56d89742e8f 100644
--- a/include/asm-i386/mce.h
+++ b/include/asm-x86/mce_32.h
diff --git a/include/asm-x86_64/mce.h b/include/asm-x86/mce_64.h
index 7bc030a1996d..7bc030a1996d 100644
--- a/include/asm-x86_64/mce.h
+++ b/include/asm-x86/mce_64.h
diff --git a/include/asm-x86/mman.h b/include/asm-x86/mman.h
new file mode 100644
index 000000000000..322db07e82c3
--- /dev/null
+++ b/include/asm-x86/mman.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "mman_32.h"
4# else
5# include "mman_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "mman_32.h"
10# else
11# include "mman_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/mman.h b/include/asm-x86/mman_32.h
index 8fd9d7ab7faf..8fd9d7ab7faf 100644
--- a/include/asm-i386/mman.h
+++ b/include/asm-x86/mman_32.h
diff --git a/include/asm-x86_64/mman.h b/include/asm-x86/mman_64.h
index dd5cb0534d37..dd5cb0534d37 100644
--- a/include/asm-x86_64/mman.h
+++ b/include/asm-x86/mman_64.h
diff --git a/include/asm-x86_64/mmsegment.h b/include/asm-x86/mmsegment.h
index d3f80c996330..d3f80c996330 100644
--- a/include/asm-x86_64/mmsegment.h
+++ b/include/asm-x86/mmsegment.h
diff --git a/include/asm-x86/mmu.h b/include/asm-x86/mmu.h
new file mode 100644
index 000000000000..9c628cd70e23
--- /dev/null
+++ b/include/asm-x86/mmu.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mmu_32.h"
3#else
4# include "mmu_64.h"
5#endif
diff --git a/include/asm-i386/mmu.h b/include/asm-x86/mmu_32.h
index 8358dd3df7aa..8358dd3df7aa 100644
--- a/include/asm-i386/mmu.h
+++ b/include/asm-x86/mmu_32.h
diff --git a/include/asm-x86_64/mmu.h b/include/asm-x86/mmu_64.h
index d2cd4a9d984d..d2cd4a9d984d 100644
--- a/include/asm-x86_64/mmu.h
+++ b/include/asm-x86/mmu_64.h
diff --git a/include/asm-x86/mmu_context.h b/include/asm-x86/mmu_context.h
new file mode 100644
index 000000000000..6598450da6c6
--- /dev/null
+++ b/include/asm-x86/mmu_context.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mmu_context_32.h"
3#else
4# include "mmu_context_64.h"
5#endif
diff --git a/include/asm-i386/mmu_context.h b/include/asm-x86/mmu_context_32.h
index 7eb0b0b1fb3c..7eb0b0b1fb3c 100644
--- a/include/asm-i386/mmu_context.h
+++ b/include/asm-x86/mmu_context_32.h
diff --git a/include/asm-x86_64/mmu_context.h b/include/asm-x86/mmu_context_64.h
index 0cce83a78378..0cce83a78378 100644
--- a/include/asm-x86_64/mmu_context.h
+++ b/include/asm-x86/mmu_context_64.h
diff --git a/include/asm-i386/mmx.h b/include/asm-x86/mmx.h
index 46b71da99869..46b71da99869 100644
--- a/include/asm-i386/mmx.h
+++ b/include/asm-x86/mmx.h
diff --git a/include/asm-x86/mmzone.h b/include/asm-x86/mmzone.h
new file mode 100644
index 000000000000..64217ea16a36
--- /dev/null
+++ b/include/asm-x86/mmzone.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mmzone_32.h"
3#else
4# include "mmzone_64.h"
5#endif
diff --git a/include/asm-i386/mmzone.h b/include/asm-x86/mmzone_32.h
index 118e9812778f..118e9812778f 100644
--- a/include/asm-i386/mmzone.h
+++ b/include/asm-x86/mmzone_32.h
diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86/mmzone_64.h
index 19a89377b123..19a89377b123 100644
--- a/include/asm-x86_64/mmzone.h
+++ b/include/asm-x86/mmzone_64.h
diff --git a/include/asm-x86/module.h b/include/asm-x86/module.h
new file mode 100644
index 000000000000..2b2f18d8a531
--- /dev/null
+++ b/include/asm-x86/module.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "module_32.h"
3#else
4# include "module_64.h"
5#endif
diff --git a/include/asm-i386/module.h b/include/asm-x86/module_32.h
index 7e5fda6c3976..7e5fda6c3976 100644
--- a/include/asm-i386/module.h
+++ b/include/asm-x86/module_32.h
diff --git a/include/asm-x86_64/module.h b/include/asm-x86/module_64.h
index 67f8f69fa7b1..67f8f69fa7b1 100644
--- a/include/asm-x86_64/module.h
+++ b/include/asm-x86/module_64.h
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
new file mode 100644
index 000000000000..8f268e8fd2e9
--- /dev/null
+++ b/include/asm-x86/mpspec.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mpspec_32.h"
3#else
4# include "mpspec_64.h"
5#endif
diff --git a/include/asm-i386/mpspec.h b/include/asm-x86/mpspec_32.h
index f21349399d14..f21349399d14 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-x86/mpspec_32.h
diff --git a/include/asm-x86_64/mpspec.h b/include/asm-x86/mpspec_64.h
index 017fddb61dc5..017fddb61dc5 100644
--- a/include/asm-x86_64/mpspec.h
+++ b/include/asm-x86/mpspec_64.h
diff --git a/include/asm-i386/mpspec_def.h b/include/asm-x86/mpspec_def.h
index 13bafb16e7af..13bafb16e7af 100644
--- a/include/asm-i386/mpspec_def.h
+++ b/include/asm-x86/mpspec_def.h
diff --git a/include/asm-x86/msgbuf.h b/include/asm-x86/msgbuf.h
new file mode 100644
index 000000000000..154f7d64e862
--- /dev/null
+++ b/include/asm-x86/msgbuf.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "msgbuf_32.h"
4# else
5# include "msgbuf_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "msgbuf_32.h"
10# else
11# include "msgbuf_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/msgbuf.h b/include/asm-x86/msgbuf_32.h
index b8d659c157ae..b8d659c157ae 100644
--- a/include/asm-i386/msgbuf.h
+++ b/include/asm-x86/msgbuf_32.h
diff --git a/include/asm-x86_64/msgbuf.h b/include/asm-x86/msgbuf_64.h
index cd6f95dd54da..cd6f95dd54da 100644
--- a/include/asm-x86_64/msgbuf.h
+++ b/include/asm-x86/msgbuf_64.h
diff --git a/include/asm-i386/msidef.h b/include/asm-x86/msidef.h
index 5b8acddb70fb..5b8acddb70fb 100644
--- a/include/asm-i386/msidef.h
+++ b/include/asm-x86/msidef.h
diff --git a/include/asm-i386/msr-index.h b/include/asm-x86/msr-index.h
index a02eb2991349..a02eb2991349 100644
--- a/include/asm-i386/msr-index.h
+++ b/include/asm-x86/msr-index.h
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h
new file mode 100644
index 000000000000..2f87ce007002
--- /dev/null
+++ b/include/asm-x86/msr.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "msr_32.h"
4# else
5# include "msr_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "msr_32.h"
10# else
11# include "msr_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/msr.h b/include/asm-x86/msr_32.h
index df21ea049369..df21ea049369 100644
--- a/include/asm-i386/msr.h
+++ b/include/asm-x86/msr_32.h
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86/msr_64.h
index d5c55b80da54..d5c55b80da54 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86/msr_64.h
diff --git a/include/asm-x86/mtrr.h b/include/asm-x86/mtrr.h
new file mode 100644
index 000000000000..34f633b3e00c
--- /dev/null
+++ b/include/asm-x86/mtrr.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "mtrr_32.h"
4# else
5# include "mtrr_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "mtrr_32.h"
10# else
11# include "mtrr_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/mtrr.h b/include/asm-x86/mtrr_32.h
index 7e9c7ccbdcfe..7e9c7ccbdcfe 100644
--- a/include/asm-i386/mtrr.h
+++ b/include/asm-x86/mtrr_32.h
diff --git a/include/asm-x86_64/mtrr.h b/include/asm-x86/mtrr_64.h
index b557c486bef8..b557c486bef8 100644
--- a/include/asm-x86_64/mtrr.h
+++ b/include/asm-x86/mtrr_64.h
diff --git a/include/asm-x86/mutex.h b/include/asm-x86/mutex.h
new file mode 100644
index 000000000000..a731b9c573a6
--- /dev/null
+++ b/include/asm-x86/mutex.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "mutex_32.h"
3#else
4# include "mutex_64.h"
5#endif
diff --git a/include/asm-i386/mutex.h b/include/asm-x86/mutex_32.h
index 7a17d9e58ad6..7a17d9e58ad6 100644
--- a/include/asm-i386/mutex.h
+++ b/include/asm-x86/mutex_32.h
diff --git a/include/asm-x86_64/mutex.h b/include/asm-x86/mutex_64.h
index 6c2949a3c677..6c2949a3c677 100644
--- a/include/asm-x86_64/mutex.h
+++ b/include/asm-x86/mutex_64.h
diff --git a/include/asm-x86/namei.h b/include/asm-x86/namei.h
new file mode 100644
index 000000000000..732f8f0b3dcd
--- /dev/null
+++ b/include/asm-x86/namei.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "namei_32.h"
3#else
4# include "namei_64.h"
5#endif
diff --git a/include/asm-i386/namei.h b/include/asm-x86/namei_32.h
index 814865088617..814865088617 100644
--- a/include/asm-i386/namei.h
+++ b/include/asm-x86/namei_32.h
diff --git a/include/asm-x86_64/namei.h b/include/asm-x86/namei_64.h
index bef239f5318f..bef239f5318f 100644
--- a/include/asm-x86_64/namei.h
+++ b/include/asm-x86/namei_64.h
diff --git a/include/asm-x86/nmi.h b/include/asm-x86/nmi.h
new file mode 100644
index 000000000000..53ccac14cead
--- /dev/null
+++ b/include/asm-x86/nmi.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "nmi_32.h"
3#else
4# include "nmi_64.h"
5#endif
diff --git a/include/asm-i386/nmi.h b/include/asm-x86/nmi_32.h
index 70a958a8e381..70a958a8e381 100644
--- a/include/asm-i386/nmi.h
+++ b/include/asm-x86/nmi_32.h
diff --git a/include/asm-x86_64/nmi.h b/include/asm-x86/nmi_64.h
index 65b6acf3bb59..65b6acf3bb59 100644
--- a/include/asm-x86_64/nmi.h
+++ b/include/asm-x86/nmi_64.h
diff --git a/include/asm-x86/numa.h b/include/asm-x86/numa.h
new file mode 100644
index 000000000000..27da400d3138
--- /dev/null
+++ b/include/asm-x86/numa.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "numa_32.h"
3#else
4# include "numa_64.h"
5#endif
diff --git a/include/asm-i386/numa.h b/include/asm-x86/numa_32.h
index 96fcb157db1d..96fcb157db1d 100644
--- a/include/asm-i386/numa.h
+++ b/include/asm-x86/numa_32.h
diff --git a/include/asm-x86_64/numa.h b/include/asm-x86/numa_64.h
index 933ff11ece15..933ff11ece15 100644
--- a/include/asm-x86_64/numa.h
+++ b/include/asm-x86/numa_64.h
diff --git a/include/asm-i386/numaq.h b/include/asm-x86/numaq.h
index 38f710dc37f2..38f710dc37f2 100644
--- a/include/asm-i386/numaq.h
+++ b/include/asm-x86/numaq.h
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
new file mode 100644
index 000000000000..a757eb26141d
--- /dev/null
+++ b/include/asm-x86/page.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "page_32.h"
4# else
5# include "page_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "page_32.h"
10# else
11# include "page_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/page.h b/include/asm-x86/page_32.h
index 80ecc66b6d86..80ecc66b6d86 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-x86/page_32.h
diff --git a/include/asm-x86_64/page.h b/include/asm-x86/page_64.h
index 88adf1afb0a2..88adf1afb0a2 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86/page_64.h
diff --git a/include/asm-x86/param.h b/include/asm-x86/param.h
new file mode 100644
index 000000000000..640851bab124
--- /dev/null
+++ b/include/asm-x86/param.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "param_32.h"
4# else
5# include "param_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "param_32.h"
10# else
11# include "param_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/param.h b/include/asm-x86/param_32.h
index 21b32466fcdc..21b32466fcdc 100644
--- a/include/asm-i386/param.h
+++ b/include/asm-x86/param_32.h
diff --git a/include/asm-x86_64/param.h b/include/asm-x86/param_64.h
index a728786c3c7c..a728786c3c7c 100644
--- a/include/asm-x86_64/param.h
+++ b/include/asm-x86/param_64.h
diff --git a/include/asm-i386/paravirt.h b/include/asm-x86/paravirt.h
index 9fa3fa9e62d1..9fa3fa9e62d1 100644
--- a/include/asm-i386/paravirt.h
+++ b/include/asm-x86/paravirt.h
diff --git a/include/asm-x86/parport.h b/include/asm-x86/parport.h
new file mode 100644
index 000000000000..2a31157349c9
--- /dev/null
+++ b/include/asm-x86/parport.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "parport_32.h"
3#else
4# include "parport_64.h"
5#endif
diff --git a/include/asm-i386/parport.h b/include/asm-x86/parport_32.h
index fa0e321e498e..fa0e321e498e 100644
--- a/include/asm-i386/parport.h
+++ b/include/asm-x86/parport_32.h
diff --git a/include/asm-x86_64/parport.h b/include/asm-x86/parport_64.h
index 7135ef977c96..7135ef977c96 100644
--- a/include/asm-x86_64/parport.h
+++ b/include/asm-x86/parport_64.h
diff --git a/include/asm-x86_64/pci-direct.h b/include/asm-x86/pci-direct.h
index 6823fa4f1afa..6823fa4f1afa 100644
--- a/include/asm-x86_64/pci-direct.h
+++ b/include/asm-x86/pci-direct.h
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
new file mode 100644
index 000000000000..a8cac8c2cde7
--- /dev/null
+++ b/include/asm-x86/pci.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "pci_32.h"
3#else
4# include "pci_64.h"
5#endif
diff --git a/include/asm-i386/pci.h b/include/asm-x86/pci_32.h
index 4fcacc711385..4fcacc711385 100644
--- a/include/asm-i386/pci.h
+++ b/include/asm-x86/pci_32.h
diff --git a/include/asm-x86_64/pci.h b/include/asm-x86/pci_64.h
index 5da8cb0c0599..5da8cb0c0599 100644
--- a/include/asm-x86_64/pci.h
+++ b/include/asm-x86/pci_64.h
diff --git a/include/asm-x86_64/pda.h b/include/asm-x86/pda.h
index 5642634843c4..5642634843c4 100644
--- a/include/asm-x86_64/pda.h
+++ b/include/asm-x86/pda.h
diff --git a/include/asm-x86/percpu.h b/include/asm-x86/percpu.h
new file mode 100644
index 000000000000..a1aaad274cca
--- /dev/null
+++ b/include/asm-x86/percpu.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "percpu_32.h"
3#else
4# include "percpu_64.h"
5#endif
diff --git a/include/asm-i386/percpu.h b/include/asm-x86/percpu_32.h
index a7ebd436f3cc..a7ebd436f3cc 100644
--- a/include/asm-i386/percpu.h
+++ b/include/asm-x86/percpu_32.h
diff --git a/include/asm-x86_64/percpu.h b/include/asm-x86/percpu_64.h
index 5abd48270101..5abd48270101 100644
--- a/include/asm-x86_64/percpu.h
+++ b/include/asm-x86/percpu_64.h
diff --git a/include/asm-x86/pgalloc.h b/include/asm-x86/pgalloc.h
new file mode 100644
index 000000000000..5886eed05886
--- /dev/null
+++ b/include/asm-x86/pgalloc.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "pgalloc_32.h"
3#else
4# include "pgalloc_64.h"
5#endif
diff --git a/include/asm-i386/pgalloc.h b/include/asm-x86/pgalloc_32.h
index f2fc33ceb9f2..f2fc33ceb9f2 100644
--- a/include/asm-i386/pgalloc.h
+++ b/include/asm-x86/pgalloc_32.h
diff --git a/include/asm-x86_64/pgalloc.h b/include/asm-x86/pgalloc_64.h
index 8bb564687860..8bb564687860 100644
--- a/include/asm-x86_64/pgalloc.h
+++ b/include/asm-x86/pgalloc_64.h
diff --git a/include/asm-i386/pgtable-2level-defs.h b/include/asm-x86/pgtable-2level-defs.h
index 0f71c9f13da4..0f71c9f13da4 100644
--- a/include/asm-i386/pgtable-2level-defs.h
+++ b/include/asm-x86/pgtable-2level-defs.h
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-x86/pgtable-2level.h
index 84b03cf56a79..84b03cf56a79 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
diff --git a/include/asm-i386/pgtable-3level-defs.h b/include/asm-x86/pgtable-3level-defs.h
index c0df89f66e8b..c0df89f66e8b 100644
--- a/include/asm-i386/pgtable-3level-defs.h
+++ b/include/asm-x86/pgtable-3level-defs.h
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index 948a33414118..948a33414118 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
new file mode 100644
index 000000000000..1039140652af
--- /dev/null
+++ b/include/asm-x86/pgtable.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "pgtable_32.h"
3#else
4# include "pgtable_64.h"
5#endif
diff --git a/include/asm-i386/pgtable.h b/include/asm-x86/pgtable_32.h
index c7fefa6b12fd..c7fefa6b12fd 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-x86/pgtable_32.h
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86/pgtable_64.h
index 57dd6b3107ea..57dd6b3107ea 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86/pgtable_64.h
diff --git a/include/asm-i386/poll.h b/include/asm-x86/poll.h
index c98509d3149e..c98509d3149e 100644
--- a/include/asm-i386/poll.h
+++ b/include/asm-x86/poll.h
diff --git a/include/asm-x86/posix_types.h b/include/asm-x86/posix_types.h
new file mode 100644
index 000000000000..bb7133dc155d
--- /dev/null
+++ b/include/asm-x86/posix_types.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "posix_types_32.h"
4# else
5# include "posix_types_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "posix_types_32.h"
10# else
11# include "posix_types_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/posix_types.h b/include/asm-x86/posix_types_32.h
index 133e31e7dfde..133e31e7dfde 100644
--- a/include/asm-i386/posix_types.h
+++ b/include/asm-x86/posix_types_32.h
diff --git a/include/asm-x86_64/posix_types.h b/include/asm-x86/posix_types_64.h
index 9926aa43775b..9926aa43775b 100644
--- a/include/asm-x86_64/posix_types.h
+++ b/include/asm-x86/posix_types_64.h
diff --git a/include/asm-x86_64/prctl.h b/include/asm-x86/prctl.h
index 52952adef1ca..52952adef1ca 100644
--- a/include/asm-x86_64/prctl.h
+++ b/include/asm-x86/prctl.h
diff --git a/include/asm-i386/processor-cyrix.h b/include/asm-x86/processor-cyrix.h
index 97568ada1f97..97568ada1f97 100644
--- a/include/asm-i386/processor-cyrix.h
+++ b/include/asm-x86/processor-cyrix.h
diff --git a/include/asm-i386/processor-flags.h b/include/asm-x86/processor-flags.h
index 5404e90edd57..5404e90edd57 100644
--- a/include/asm-i386/processor-flags.h
+++ b/include/asm-x86/processor-flags.h
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
new file mode 100644
index 000000000000..46e1c04e309c
--- /dev/null
+++ b/include/asm-x86/processor.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "processor_32.h"
3#else
4# include "processor_64.h"
5#endif
diff --git a/include/asm-i386/processor.h b/include/asm-x86/processor_32.h
index 3845fe72383e..3845fe72383e 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-x86/processor_32.h
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86/processor_64.h
index 31f579b828f2..31f579b828f2 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86/processor_64.h
diff --git a/include/asm-x86_64/proto.h b/include/asm-x86/proto.h
index 31f20ad65876..31f20ad65876 100644
--- a/include/asm-x86_64/proto.h
+++ b/include/asm-x86/proto.h
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h
new file mode 100644
index 000000000000..6824c49def1c
--- /dev/null
+++ b/include/asm-x86/ptrace-abi.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ptrace-abi_32.h"
4# else
5# include "ptrace-abi_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ptrace-abi_32.h"
10# else
11# include "ptrace-abi_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ptrace-abi.h b/include/asm-x86/ptrace-abi_32.h
index a44901817a26..a44901817a26 100644
--- a/include/asm-i386/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi_32.h
diff --git a/include/asm-x86_64/ptrace-abi.h b/include/asm-x86/ptrace-abi_64.h
index 19184b0806b1..19184b0806b1 100644
--- a/include/asm-x86_64/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi_64.h
diff --git a/include/asm-x86/ptrace.h b/include/asm-x86/ptrace.h
new file mode 100644
index 000000000000..bc4d64a87689
--- /dev/null
+++ b/include/asm-x86/ptrace.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ptrace_32.h"
4# else
5# include "ptrace_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ptrace_32.h"
10# else
11# include "ptrace_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ptrace.h b/include/asm-x86/ptrace_32.h
index 6002597b9e12..6002597b9e12 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-x86/ptrace_32.h
diff --git a/include/asm-x86_64/ptrace.h b/include/asm-x86/ptrace_64.h
index 7f166ccb0606..7f166ccb0606 100644
--- a/include/asm-x86_64/ptrace.h
+++ b/include/asm-x86/ptrace_64.h
diff --git a/include/asm-i386/reboot.h b/include/asm-x86/reboot.h
index e9e3ffc22c07..e9e3ffc22c07 100644
--- a/include/asm-i386/reboot.h
+++ b/include/asm-x86/reboot.h
diff --git a/include/asm-i386/reboot_fixups.h b/include/asm-x86/reboot_fixups.h
index 0cb7d87c2b68..0cb7d87c2b68 100644
--- a/include/asm-i386/reboot_fixups.h
+++ b/include/asm-x86/reboot_fixups.h
diff --git a/include/asm-x86/required-features.h b/include/asm-x86/required-features.h
new file mode 100644
index 000000000000..8b64f3ea2b78
--- /dev/null
+++ b/include/asm-x86/required-features.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "required-features_32.h"
3#else
4# include "required-features_64.h"
5#endif
diff --git a/include/asm-i386/required-features.h b/include/asm-x86/required-features_32.h
index 618feb98f9f5..618feb98f9f5 100644
--- a/include/asm-i386/required-features.h
+++ b/include/asm-x86/required-features_32.h
diff --git a/include/asm-x86_64/required-features.h b/include/asm-x86/required-features_64.h
index e80d5761b00a..e80d5761b00a 100644
--- a/include/asm-x86_64/required-features.h
+++ b/include/asm-x86/required-features_64.h
diff --git a/include/asm-x86/resource.h b/include/asm-x86/resource.h
new file mode 100644
index 000000000000..732410a8c02a
--- /dev/null
+++ b/include/asm-x86/resource.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "resource_32.h"
4# else
5# include "resource_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "resource_32.h"
10# else
11# include "resource_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/resource.h b/include/asm-x86/resource_32.h
index 6c1ea37c7718..6c1ea37c7718 100644
--- a/include/asm-i386/resource.h
+++ b/include/asm-x86/resource_32.h
diff --git a/include/asm-x86_64/resource.h b/include/asm-x86/resource_64.h
index f40b40623234..f40b40623234 100644
--- a/include/asm-x86_64/resource.h
+++ b/include/asm-x86/resource_64.h
diff --git a/include/asm-x86/resume-trace.h b/include/asm-x86/resume-trace.h
new file mode 100644
index 000000000000..9b6dd093a9f7
--- /dev/null
+++ b/include/asm-x86/resume-trace.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "resume-trace_32.h"
3#else
4# include "resume-trace_64.h"
5#endif
diff --git a/include/asm-i386/resume-trace.h b/include/asm-x86/resume-trace_32.h
index ec9cfd656230..ec9cfd656230 100644
--- a/include/asm-i386/resume-trace.h
+++ b/include/asm-x86/resume-trace_32.h
diff --git a/include/asm-x86_64/resume-trace.h b/include/asm-x86/resume-trace_64.h
index 34bf998fdf62..34bf998fdf62 100644
--- a/include/asm-x86_64/resume-trace.h
+++ b/include/asm-x86/resume-trace_64.h
diff --git a/include/asm-x86_64/rio.h b/include/asm-x86/rio.h
index c7350f6d2015..c7350f6d2015 100644
--- a/include/asm-x86_64/rio.h
+++ b/include/asm-x86/rio.h
diff --git a/include/asm-x86/rtc.h b/include/asm-x86/rtc.h
new file mode 100644
index 000000000000..1f0c98eb2e38
--- /dev/null
+++ b/include/asm-x86/rtc.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "rtc_32.h"
3#else
4# include "rtc_64.h"
5#endif
diff --git a/include/asm-i386/rtc.h b/include/asm-x86/rtc_32.h
index ffd02109a0e5..ffd02109a0e5 100644
--- a/include/asm-i386/rtc.h
+++ b/include/asm-x86/rtc_32.h
diff --git a/include/asm-x86_64/rtc.h b/include/asm-x86/rtc_64.h
index 18ed713ac7de..18ed713ac7de 100644
--- a/include/asm-x86_64/rtc.h
+++ b/include/asm-x86/rtc_64.h
diff --git a/include/asm-x86/rwlock.h b/include/asm-x86/rwlock.h
new file mode 100644
index 000000000000..a3be7d8364af
--- /dev/null
+++ b/include/asm-x86/rwlock.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "rwlock_32.h"
3#else
4# include "rwlock_64.h"
5#endif
diff --git a/include/asm-i386/rwlock.h b/include/asm-x86/rwlock_32.h
index c3e5db32fa48..c3e5db32fa48 100644
--- a/include/asm-i386/rwlock.h
+++ b/include/asm-x86/rwlock_32.h
diff --git a/include/asm-x86_64/rwlock.h b/include/asm-x86/rwlock_64.h
index 72aeebed920b..72aeebed920b 100644
--- a/include/asm-x86_64/rwlock.h
+++ b/include/asm-x86/rwlock_64.h
diff --git a/include/asm-i386/rwsem.h b/include/asm-x86/rwsem.h
index 041906f3c6df..041906f3c6df 100644
--- a/include/asm-i386/rwsem.h
+++ b/include/asm-x86/rwsem.h
diff --git a/include/asm-x86/scatterlist.h b/include/asm-x86/scatterlist.h
new file mode 100644
index 000000000000..3a1e76257a27
--- /dev/null
+++ b/include/asm-x86/scatterlist.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "scatterlist_32.h"
3#else
4# include "scatterlist_64.h"
5#endif
diff --git a/include/asm-i386/scatterlist.h b/include/asm-x86/scatterlist_32.h
index d7e45a8f1aae..d7e45a8f1aae 100644
--- a/include/asm-i386/scatterlist.h
+++ b/include/asm-x86/scatterlist_32.h
diff --git a/include/asm-x86_64/scatterlist.h b/include/asm-x86/scatterlist_64.h
index eaf7ada27e14..eaf7ada27e14 100644
--- a/include/asm-x86_64/scatterlist.h
+++ b/include/asm-x86/scatterlist_64.h
diff --git a/include/asm-x86/seccomp.h b/include/asm-x86/seccomp.h
new file mode 100644
index 000000000000..c62e58a5a90d
--- /dev/null
+++ b/include/asm-x86/seccomp.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "seccomp_32.h"
3#else
4# include "seccomp_64.h"
5#endif
diff --git a/include/asm-i386/seccomp.h b/include/asm-x86/seccomp_32.h
index 18da19e89bff..18da19e89bff 100644
--- a/include/asm-i386/seccomp.h
+++ b/include/asm-x86/seccomp_32.h
diff --git a/include/asm-x86_64/seccomp.h b/include/asm-x86/seccomp_64.h
index 553af65a2287..553af65a2287 100644
--- a/include/asm-x86_64/seccomp.h
+++ b/include/asm-x86/seccomp_64.h
diff --git a/include/asm-x86/sections.h b/include/asm-x86/sections.h
new file mode 100644
index 000000000000..ae6c69d9be3f
--- /dev/null
+++ b/include/asm-x86/sections.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "sections_32.h"
3#else
4# include "sections_64.h"
5#endif
diff --git a/include/asm-i386/sections.h b/include/asm-x86/sections_32.h
index 2dcbb92918b2..2dcbb92918b2 100644
--- a/include/asm-i386/sections.h
+++ b/include/asm-x86/sections_32.h
diff --git a/include/asm-x86_64/sections.h b/include/asm-x86/sections_64.h
index c746d9f1e70c..c746d9f1e70c 100644
--- a/include/asm-x86_64/sections.h
+++ b/include/asm-x86/sections_64.h
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
new file mode 100644
index 000000000000..605068280e28
--- /dev/null
+++ b/include/asm-x86/segment.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "segment_32.h"
3#else
4# include "segment_64.h"
5#endif
diff --git a/include/asm-i386/segment.h b/include/asm-x86/segment_32.h
index 597a47c2515f..597a47c2515f 100644
--- a/include/asm-i386/segment.h
+++ b/include/asm-x86/segment_32.h
diff --git a/include/asm-x86_64/segment.h b/include/asm-x86/segment_64.h
index 04b8ab21328f..04b8ab21328f 100644
--- a/include/asm-x86_64/segment.h
+++ b/include/asm-x86/segment_64.h
diff --git a/include/asm-x86/semaphore.h b/include/asm-x86/semaphore.h
new file mode 100644
index 000000000000..572c0b67a6b0
--- /dev/null
+++ b/include/asm-x86/semaphore.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "semaphore_32.h"
3#else
4# include "semaphore_64.h"
5#endif
diff --git a/include/asm-i386/semaphore.h b/include/asm-x86/semaphore_32.h
index 4e34a468c383..4e34a468c383 100644
--- a/include/asm-i386/semaphore.h
+++ b/include/asm-x86/semaphore_32.h
diff --git a/include/asm-x86_64/semaphore.h b/include/asm-x86/semaphore_64.h
index 1194888536b9..1194888536b9 100644
--- a/include/asm-x86_64/semaphore.h
+++ b/include/asm-x86/semaphore_64.h
diff --git a/include/asm-x86/sembuf.h b/include/asm-x86/sembuf.h
new file mode 100644
index 000000000000..e42c971e383f
--- /dev/null
+++ b/include/asm-x86/sembuf.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "sembuf_32.h"
4# else
5# include "sembuf_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "sembuf_32.h"
10# else
11# include "sembuf_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/sembuf.h b/include/asm-x86/sembuf_32.h
index 323835166c14..323835166c14 100644
--- a/include/asm-i386/sembuf.h
+++ b/include/asm-x86/sembuf_32.h
diff --git a/include/asm-x86_64/sembuf.h b/include/asm-x86/sembuf_64.h
index 63b52925ae2a..63b52925ae2a 100644
--- a/include/asm-x86_64/sembuf.h
+++ b/include/asm-x86/sembuf_64.h
diff --git a/include/asm-x86/serial.h b/include/asm-x86/serial.h
new file mode 100644
index 000000000000..cf1b05227b29
--- /dev/null
+++ b/include/asm-x86/serial.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "serial_32.h"
3#else
4# include "serial_64.h"
5#endif
diff --git a/include/asm-i386/serial.h b/include/asm-x86/serial_32.h
index bd67480ca109..bd67480ca109 100644
--- a/include/asm-i386/serial.h
+++ b/include/asm-x86/serial_32.h
diff --git a/include/asm-x86_64/serial.h b/include/asm-x86/serial_64.h
index b0496e0d72a6..b0496e0d72a6 100644
--- a/include/asm-x86_64/serial.h
+++ b/include/asm-x86/serial_64.h
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
new file mode 100644
index 000000000000..81c0d98bb1c8
--- /dev/null
+++ b/include/asm-x86/setup.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "setup_32.h"
4# else
5# include "setup_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "setup_32.h"
10# else
11# include "setup_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/setup.h b/include/asm-x86/setup_32.h
index 7862fe858a9e..7862fe858a9e 100644
--- a/include/asm-i386/setup.h
+++ b/include/asm-x86/setup_32.h
diff --git a/include/asm-x86_64/setup.h b/include/asm-x86/setup_64.h
index eaeff73d6c10..eaeff73d6c10 100644
--- a/include/asm-x86_64/setup.h
+++ b/include/asm-x86/setup_64.h
diff --git a/include/asm-x86/shmbuf.h b/include/asm-x86/shmbuf.h
new file mode 100644
index 000000000000..e85f1cb11217
--- /dev/null
+++ b/include/asm-x86/shmbuf.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "shmbuf_32.h"
4# else
5# include "shmbuf_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "shmbuf_32.h"
10# else
11# include "shmbuf_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/shmbuf.h b/include/asm-x86/shmbuf_32.h
index d1cdc3cb079b..d1cdc3cb079b 100644
--- a/include/asm-i386/shmbuf.h
+++ b/include/asm-x86/shmbuf_32.h
diff --git a/include/asm-x86_64/shmbuf.h b/include/asm-x86/shmbuf_64.h
index 5a6d6dda7c48..5a6d6dda7c48 100644
--- a/include/asm-x86_64/shmbuf.h
+++ b/include/asm-x86/shmbuf_64.h
diff --git a/include/asm-x86/shmparam.h b/include/asm-x86/shmparam.h
new file mode 100644
index 000000000000..165627cc5345
--- /dev/null
+++ b/include/asm-x86/shmparam.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "shmparam_32.h"
4# else
5# include "shmparam_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "shmparam_32.h"
10# else
11# include "shmparam_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/shmparam.h b/include/asm-x86/shmparam_32.h
index 786243a5b319..786243a5b319 100644
--- a/include/asm-i386/shmparam.h
+++ b/include/asm-x86/shmparam_32.h
diff --git a/include/asm-x86_64/shmparam.h b/include/asm-x86/shmparam_64.h
index d7021620dcb7..d7021620dcb7 100644
--- a/include/asm-x86_64/shmparam.h
+++ b/include/asm-x86/shmparam_64.h
diff --git a/include/asm-x86/sigcontext.h b/include/asm-x86/sigcontext.h
new file mode 100644
index 000000000000..0d16ceff1599
--- /dev/null
+++ b/include/asm-x86/sigcontext.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "sigcontext_32.h"
4# else
5# include "sigcontext_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "sigcontext_32.h"
10# else
11# include "sigcontext_64.h"
12# endif
13#endif
diff --git a/include/asm-x86_64/sigcontext32.h b/include/asm-x86/sigcontext32.h
index 3d657038ab7c..3d657038ab7c 100644
--- a/include/asm-x86_64/sigcontext32.h
+++ b/include/asm-x86/sigcontext32.h
diff --git a/include/asm-i386/sigcontext.h b/include/asm-x86/sigcontext_32.h
index aaef089a7787..aaef089a7787 100644
--- a/include/asm-i386/sigcontext.h
+++ b/include/asm-x86/sigcontext_32.h
diff --git a/include/asm-x86_64/sigcontext.h b/include/asm-x86/sigcontext_64.h
index b4e40236666c..b4e40236666c 100644
--- a/include/asm-x86_64/sigcontext.h
+++ b/include/asm-x86/sigcontext_64.h
diff --git a/include/asm-x86/siginfo.h b/include/asm-x86/siginfo.h
new file mode 100644
index 000000000000..0b8e4bb47d25
--- /dev/null
+++ b/include/asm-x86/siginfo.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "siginfo_32.h"
4# else
5# include "siginfo_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "siginfo_32.h"
10# else
11# include "siginfo_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/siginfo.h b/include/asm-x86/siginfo_32.h
index fe18f98fccfa..fe18f98fccfa 100644
--- a/include/asm-i386/siginfo.h
+++ b/include/asm-x86/siginfo_32.h
diff --git a/include/asm-x86_64/siginfo.h b/include/asm-x86/siginfo_64.h
index d09a1e6e7246..d09a1e6e7246 100644
--- a/include/asm-x86_64/siginfo.h
+++ b/include/asm-x86/siginfo_64.h
diff --git a/include/asm-x86/signal.h b/include/asm-x86/signal.h
new file mode 100644
index 000000000000..bf5a63f457da
--- /dev/null
+++ b/include/asm-x86/signal.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "signal_32.h"
4# else
5# include "signal_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "signal_32.h"
10# else
11# include "signal_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/signal.h b/include/asm-x86/signal_32.h
index c3e8adec5918..c3e8adec5918 100644
--- a/include/asm-i386/signal.h
+++ b/include/asm-x86/signal_32.h
diff --git a/include/asm-x86_64/signal.h b/include/asm-x86/signal_64.h
index 4581f978b299..4581f978b299 100644
--- a/include/asm-x86_64/signal.h
+++ b/include/asm-x86/signal_64.h
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
new file mode 100644
index 000000000000..f2e8319a6b0b
--- /dev/null
+++ b/include/asm-x86/smp.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "smp_32.h"
3#else
4# include "smp_64.h"
5#endif
diff --git a/include/asm-i386/smp.h b/include/asm-x86/smp_32.h
index 1f73bde165b1..1f73bde165b1 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-x86/smp_32.h
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86/smp_64.h
index 3f303d2365ed..3f303d2365ed 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86/smp_64.h
diff --git a/include/asm-i386/socket.h b/include/asm-x86/socket.h
index 99ca648b94c5..99ca648b94c5 100644
--- a/include/asm-i386/socket.h
+++ b/include/asm-x86/socket.h
diff --git a/include/asm-x86/sockios.h b/include/asm-x86/sockios.h
new file mode 100644
index 000000000000..5a134fc70b9c
--- /dev/null
+++ b/include/asm-x86/sockios.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "sockios_32.h"
4# else
5# include "sockios_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "sockios_32.h"
10# else
11# include "sockios_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/sockios.h b/include/asm-x86/sockios_32.h
index ff528c7d255c..ff528c7d255c 100644
--- a/include/asm-i386/sockios.h
+++ b/include/asm-x86/sockios_32.h
diff --git a/include/asm-x86_64/sockios.h b/include/asm-x86/sockios_64.h
index d726ba2513e3..d726ba2513e3 100644
--- a/include/asm-x86_64/sockios.h
+++ b/include/asm-x86/sockios_64.h
diff --git a/include/asm-x86/sparsemem.h b/include/asm-x86/sparsemem.h
new file mode 100644
index 000000000000..3f203b1d9ee8
--- /dev/null
+++ b/include/asm-x86/sparsemem.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "sparsemem_32.h"
3#else
4# include "sparsemem_64.h"
5#endif
diff --git a/include/asm-i386/sparsemem.h b/include/asm-x86/sparsemem_32.h
index cfeed990585f..cfeed990585f 100644
--- a/include/asm-i386/sparsemem.h
+++ b/include/asm-x86/sparsemem_32.h
diff --git a/include/asm-x86_64/sparsemem.h b/include/asm-x86/sparsemem_64.h
index dabb16714a71..dabb16714a71 100644
--- a/include/asm-x86_64/sparsemem.h
+++ b/include/asm-x86/sparsemem_64.h
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
new file mode 100644
index 000000000000..d74d85e71dcb
--- /dev/null
+++ b/include/asm-x86/spinlock.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "spinlock_32.h"
3#else
4# include "spinlock_64.h"
5#endif
diff --git a/include/asm-i386/spinlock.h b/include/asm-x86/spinlock_32.h
index d3bcebed60ca..d3bcebed60ca 100644
--- a/include/asm-i386/spinlock.h
+++ b/include/asm-x86/spinlock_32.h
diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86/spinlock_64.h
index 88bf981e73cf..88bf981e73cf 100644
--- a/include/asm-x86_64/spinlock.h
+++ b/include/asm-x86/spinlock_64.h
diff --git a/include/asm-i386/spinlock_types.h b/include/asm-x86/spinlock_types.h
index 4da9345c1500..4da9345c1500 100644
--- a/include/asm-i386/spinlock_types.h
+++ b/include/asm-x86/spinlock_types.h
diff --git a/include/asm-i386/srat.h b/include/asm-x86/srat.h
index 165ab4bdc02b..165ab4bdc02b 100644
--- a/include/asm-i386/srat.h
+++ b/include/asm-x86/srat.h
diff --git a/include/asm-x86_64/stacktrace.h b/include/asm-x86/stacktrace.h
index 6f0b54594307..6f0b54594307 100644
--- a/include/asm-x86_64/stacktrace.h
+++ b/include/asm-x86/stacktrace.h
diff --git a/include/asm-x86/stat.h b/include/asm-x86/stat.h
new file mode 100644
index 000000000000..3ff6b50ef833
--- /dev/null
+++ b/include/asm-x86/stat.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "stat_32.h"
4# else
5# include "stat_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "stat_32.h"
10# else
11# include "stat_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/stat.h b/include/asm-x86/stat_32.h
index 67eae78323ba..67eae78323ba 100644
--- a/include/asm-i386/stat.h
+++ b/include/asm-x86/stat_32.h
diff --git a/include/asm-x86_64/stat.h b/include/asm-x86/stat_64.h
index fd9f00d560f8..fd9f00d560f8 100644
--- a/include/asm-x86_64/stat.h
+++ b/include/asm-x86/stat_64.h
diff --git a/include/asm-x86/statfs.h b/include/asm-x86/statfs.h
new file mode 100644
index 000000000000..327fb5d7a148
--- /dev/null
+++ b/include/asm-x86/statfs.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "statfs_32.h"
4# else
5# include "statfs_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "statfs_32.h"
10# else
11# include "statfs_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/statfs.h b/include/asm-x86/statfs_32.h
index 24972c175132..24972c175132 100644
--- a/include/asm-i386/statfs.h
+++ b/include/asm-x86/statfs_32.h
diff --git a/include/asm-x86_64/statfs.h b/include/asm-x86/statfs_64.h
index b3f4718af30b..b3f4718af30b 100644
--- a/include/asm-x86_64/statfs.h
+++ b/include/asm-x86/statfs_64.h
diff --git a/include/asm-x86/string.h b/include/asm-x86/string.h
new file mode 100644
index 000000000000..6dfd6d9373a0
--- /dev/null
+++ b/include/asm-x86/string.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "string_32.h"
3#else
4# include "string_64.h"
5#endif
diff --git a/include/asm-i386/string.h b/include/asm-x86/string_32.h
index a9b64453bdf5..a9b64453bdf5 100644
--- a/include/asm-i386/string.h
+++ b/include/asm-x86/string_32.h
diff --git a/include/asm-x86_64/string.h b/include/asm-x86/string_64.h
index e583da7918fb..e583da7918fb 100644
--- a/include/asm-x86_64/string.h
+++ b/include/asm-x86/string_64.h
diff --git a/include/asm-x86/suspend.h b/include/asm-x86/suspend.h
new file mode 100644
index 000000000000..9bd521fe4570
--- /dev/null
+++ b/include/asm-x86/suspend.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "suspend_32.h"
3#else
4# include "suspend_64.h"
5#endif
diff --git a/include/asm-i386/suspend.h b/include/asm-x86/suspend_32.h
index a2520732ffd6..a2520732ffd6 100644
--- a/include/asm-i386/suspend.h
+++ b/include/asm-x86/suspend_32.h
diff --git a/include/asm-x86_64/suspend.h b/include/asm-x86/suspend_64.h
index b897e8cb55fb..b897e8cb55fb 100644
--- a/include/asm-x86_64/suspend.h
+++ b/include/asm-x86/suspend_64.h
diff --git a/include/asm-x86_64/swiotlb.h b/include/asm-x86/swiotlb.h
index f9c589539a82..f9c589539a82 100644
--- a/include/asm-x86_64/swiotlb.h
+++ b/include/asm-x86/swiotlb.h
diff --git a/include/asm-i386/sync_bitops.h b/include/asm-x86/sync_bitops.h
index cbce08a2d135..cbce08a2d135 100644
--- a/include/asm-i386/sync_bitops.h
+++ b/include/asm-x86/sync_bitops.h
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
new file mode 100644
index 000000000000..692562b48f2a
--- /dev/null
+++ b/include/asm-x86/system.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "system_32.h"
3#else
4# include "system_64.h"
5#endif
diff --git a/include/asm-i386/system.h b/include/asm-x86/system_32.h
index d69ba937e092..d69ba937e092 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-x86/system_32.h
diff --git a/include/asm-x86_64/system.h b/include/asm-x86/system_64.h
index 02175aa1d16a..02175aa1d16a 100644
--- a/include/asm-x86_64/system.h
+++ b/include/asm-x86/system_64.h
diff --git a/include/asm-x86_64/tce.h b/include/asm-x86/tce.h
index cd955d3d112f..cd955d3d112f 100644
--- a/include/asm-x86_64/tce.h
+++ b/include/asm-x86/tce.h
diff --git a/include/asm-x86/termbits.h b/include/asm-x86/termbits.h
new file mode 100644
index 000000000000..69f3080e2a1d
--- /dev/null
+++ b/include/asm-x86/termbits.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "termbits_32.h"
4# else
5# include "termbits_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "termbits_32.h"
10# else
11# include "termbits_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/termbits.h b/include/asm-x86/termbits_32.h
index a21700352e7b..a21700352e7b 100644
--- a/include/asm-i386/termbits.h
+++ b/include/asm-x86/termbits_32.h
diff --git a/include/asm-x86_64/termbits.h b/include/asm-x86/termbits_64.h
index 7405756dd41b..7405756dd41b 100644
--- a/include/asm-x86_64/termbits.h
+++ b/include/asm-x86/termbits_64.h
diff --git a/include/asm-x86/termios.h b/include/asm-x86/termios.h
new file mode 100644
index 000000000000..a4f4ae20a591
--- /dev/null
+++ b/include/asm-x86/termios.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "termios_32.h"
4# else
5# include "termios_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "termios_32.h"
10# else
11# include "termios_64.h"
12# endif
13#endif
diff --git a/include/asm-x86/termios_32.h b/include/asm-x86/termios_32.h
new file mode 100644
index 000000000000..6fdb2c841b73
--- /dev/null
+++ b/include/asm-x86/termios_32.h
@@ -0,0 +1,90 @@
1#ifndef _I386_TERMIOS_H
2#define _I386_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
84#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
85#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
86#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87
88#endif /* __KERNEL__ */
89
90#endif /* _I386_TERMIOS_H */
diff --git a/include/asm-x86_64/termios.h b/include/asm-x86/termios_64.h
index 35ee59b78329..35ee59b78329 100644
--- a/include/asm-x86_64/termios.h
+++ b/include/asm-x86/termios_64.h
diff --git a/include/asm-i386/therm_throt.h b/include/asm-x86/therm_throt.h
index 399bf6026b16..399bf6026b16 100644
--- a/include/asm-i386/therm_throt.h
+++ b/include/asm-x86/therm_throt.h
diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h
new file mode 100644
index 000000000000..d5fd12f2abdb
--- /dev/null
+++ b/include/asm-x86/thread_info.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "thread_info_32.h"
3#else
4# include "thread_info_64.h"
5#endif
diff --git a/include/asm-i386/thread_info.h b/include/asm-x86/thread_info_32.h
index 22a8cbcd35e2..22a8cbcd35e2 100644
--- a/include/asm-i386/thread_info.h
+++ b/include/asm-x86/thread_info_32.h
diff --git a/include/asm-x86_64/thread_info.h b/include/asm-x86/thread_info_64.h
index beae2bfb62ca..beae2bfb62ca 100644
--- a/include/asm-x86_64/thread_info.h
+++ b/include/asm-x86/thread_info_64.h
diff --git a/include/asm-i386/time.h b/include/asm-x86/time.h
index eac011366dc2..eac011366dc2 100644
--- a/include/asm-i386/time.h
+++ b/include/asm-x86/time.h
diff --git a/include/asm-i386/timer.h b/include/asm-x86/timer.h
index 0db7e994fb8b..0db7e994fb8b 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-x86/timer.h
diff --git a/include/asm-x86/timex.h b/include/asm-x86/timex.h
new file mode 100644
index 000000000000..d01c18cfccef
--- /dev/null
+++ b/include/asm-x86/timex.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "timex_32.h"
3#else
4# include "timex_64.h"
5#endif
diff --git a/include/asm-i386/timex.h b/include/asm-x86/timex_32.h
index 3666044409f0..3666044409f0 100644
--- a/include/asm-i386/timex.h
+++ b/include/asm-x86/timex_32.h
diff --git a/include/asm-x86_64/timex.h b/include/asm-x86/timex_64.h
index 6ed21f44d308..6ed21f44d308 100644
--- a/include/asm-x86_64/timex.h
+++ b/include/asm-x86/timex_64.h
diff --git a/include/asm-x86/tlb.h b/include/asm-x86/tlb.h
new file mode 100644
index 000000000000..7d55c3762b43
--- /dev/null
+++ b/include/asm-x86/tlb.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "tlb_32.h"
3#else
4# include "tlb_64.h"
5#endif
diff --git a/include/asm-i386/tlb.h b/include/asm-x86/tlb_32.h
index c006c5c92bea..c006c5c92bea 100644
--- a/include/asm-i386/tlb.h
+++ b/include/asm-x86/tlb_32.h
diff --git a/include/asm-x86_64/tlb.h b/include/asm-x86/tlb_64.h
index cd4c3c590a0e..cd4c3c590a0e 100644
--- a/include/asm-x86_64/tlb.h
+++ b/include/asm-x86/tlb_64.h
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
new file mode 100644
index 000000000000..9af4cc83a1af
--- /dev/null
+++ b/include/asm-x86/tlbflush.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "tlbflush_32.h"
3#else
4# include "tlbflush_64.h"
5#endif
diff --git a/include/asm-i386/tlbflush.h b/include/asm-x86/tlbflush_32.h
index a50fa6741486..a50fa6741486 100644
--- a/include/asm-i386/tlbflush.h
+++ b/include/asm-x86/tlbflush_32.h
diff --git a/include/asm-x86_64/tlbflush.h b/include/asm-x86/tlbflush_64.h
index 888eb4abdd07..888eb4abdd07 100644
--- a/include/asm-x86_64/tlbflush.h
+++ b/include/asm-x86/tlbflush_64.h
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
new file mode 100644
index 000000000000..b10fde9798ea
--- /dev/null
+++ b/include/asm-x86/topology.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "topology_32.h"
3#else
4# include "topology_64.h"
5#endif
diff --git a/include/asm-i386/topology.h b/include/asm-x86/topology_32.h
index 19b2dafd0c81..19b2dafd0c81 100644
--- a/include/asm-i386/topology.h
+++ b/include/asm-x86/topology_32.h
diff --git a/include/asm-x86_64/topology.h b/include/asm-x86/topology_64.h
index 36e52fba7960..36e52fba7960 100644
--- a/include/asm-x86_64/topology.h
+++ b/include/asm-x86/topology_64.h
diff --git a/include/asm-i386/tsc.h b/include/asm-x86/tsc.h
index a4d806610b7f..a4d806610b7f 100644
--- a/include/asm-i386/tsc.h
+++ b/include/asm-x86/tsc.h
diff --git a/include/asm-x86/types.h b/include/asm-x86/types.h
new file mode 100644
index 000000000000..a777a9b83974
--- /dev/null
+++ b/include/asm-x86/types.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "types_32.h"
4# else
5# include "types_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "types_32.h"
10# else
11# include "types_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/types.h b/include/asm-x86/types_32.h
index ad0a55bd782f..ad0a55bd782f 100644
--- a/include/asm-i386/types.h
+++ b/include/asm-x86/types_32.h
diff --git a/include/asm-x86_64/types.h b/include/asm-x86/types_64.h
index 2d4491aae281..2d4491aae281 100644
--- a/include/asm-x86_64/types.h
+++ b/include/asm-x86/types_64.h
diff --git a/include/asm-x86/uaccess.h b/include/asm-x86/uaccess.h
new file mode 100644
index 000000000000..9fefd2947e78
--- /dev/null
+++ b/include/asm-x86/uaccess.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "uaccess_32.h"
3#else
4# include "uaccess_64.h"
5#endif
diff --git a/include/asm-i386/uaccess.h b/include/asm-x86/uaccess_32.h
index d2a4f7be9c2c..d2a4f7be9c2c 100644
--- a/include/asm-i386/uaccess.h
+++ b/include/asm-x86/uaccess_32.h
diff --git a/include/asm-x86_64/uaccess.h b/include/asm-x86/uaccess_64.h
index f4ce8768ad44..f4ce8768ad44 100644
--- a/include/asm-x86_64/uaccess.h
+++ b/include/asm-x86/uaccess_64.h
diff --git a/include/asm-x86/ucontext.h b/include/asm-x86/ucontext.h
new file mode 100644
index 000000000000..175c8cb59731
--- /dev/null
+++ b/include/asm-x86/ucontext.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "ucontext_32.h"
4# else
5# include "ucontext_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "ucontext_32.h"
10# else
11# include "ucontext_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/ucontext.h b/include/asm-x86/ucontext_32.h
index b0db36925f55..b0db36925f55 100644
--- a/include/asm-i386/ucontext.h
+++ b/include/asm-x86/ucontext_32.h
diff --git a/include/asm-x86_64/ucontext.h b/include/asm-x86/ucontext_64.h
index 159a3da9e112..159a3da9e112 100644
--- a/include/asm-x86_64/ucontext.h
+++ b/include/asm-x86/ucontext_64.h
diff --git a/include/asm-x86/unaligned.h b/include/asm-x86/unaligned.h
new file mode 100644
index 000000000000..68067150fbcb
--- /dev/null
+++ b/include/asm-x86/unaligned.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "unaligned_32.h"
3#else
4# include "unaligned_64.h"
5#endif
diff --git a/include/asm-i386/unaligned.h b/include/asm-x86/unaligned_32.h
index 7acd7957621e..7acd7957621e 100644
--- a/include/asm-i386/unaligned.h
+++ b/include/asm-x86/unaligned_32.h
diff --git a/include/asm-x86_64/unaligned.h b/include/asm-x86/unaligned_64.h
index d4bf78dc6f39..d4bf78dc6f39 100644
--- a/include/asm-x86_64/unaligned.h
+++ b/include/asm-x86/unaligned_64.h
diff --git a/include/asm-x86/unistd.h b/include/asm-x86/unistd.h
new file mode 100644
index 000000000000..2a58ed3e51d8
--- /dev/null
+++ b/include/asm-x86/unistd.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "unistd_32.h"
4# else
5# include "unistd_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "unistd_32.h"
10# else
11# include "unistd_64.h"
12# endif
13#endif
diff --git a/include/asm-i386/unistd.h b/include/asm-x86/unistd_32.h
index 9b15545eb9b5..9b15545eb9b5 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-x86/unistd_32.h
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86/unistd_64.h
index fc4e73f5f1fa..fc4e73f5f1fa 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86/unistd_64.h
diff --git a/include/asm-x86/unwind.h b/include/asm-x86/unwind.h
new file mode 100644
index 000000000000..7e4d7ad55208
--- /dev/null
+++ b/include/asm-x86/unwind.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "unwind_32.h"
3#else
4# include "unwind_64.h"
5#endif
diff --git a/include/asm-i386/unwind.h b/include/asm-x86/unwind_32.h
index 43c70c3de2f9..43c70c3de2f9 100644
--- a/include/asm-i386/unwind.h
+++ b/include/asm-x86/unwind_32.h
diff --git a/include/asm-x86_64/unwind.h b/include/asm-x86/unwind_64.h
index 02710f6a4560..02710f6a4560 100644
--- a/include/asm-x86_64/unwind.h
+++ b/include/asm-x86/unwind_64.h
diff --git a/include/asm-x86/user.h b/include/asm-x86/user.h
new file mode 100644
index 000000000000..484715abe74a
--- /dev/null
+++ b/include/asm-x86/user.h
@@ -0,0 +1,13 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32
3# include "user_32.h"
4# else
5# include "user_64.h"
6# endif
7#else
8# ifdef __i386__
9# include "user_32.h"
10# else
11# include "user_64.h"
12# endif
13#endif
diff --git a/include/asm-x86_64/user32.h b/include/asm-x86/user32.h
index f769872debea..f769872debea 100644
--- a/include/asm-x86_64/user32.h
+++ b/include/asm-x86/user32.h
diff --git a/include/asm-i386/user.h b/include/asm-x86/user_32.h
index 0e85d2a5e33a..0e85d2a5e33a 100644
--- a/include/asm-i386/user.h
+++ b/include/asm-x86/user_32.h
diff --git a/include/asm-x86_64/user.h b/include/asm-x86/user_64.h
index 12785c649ac5..12785c649ac5 100644
--- a/include/asm-x86_64/user.h
+++ b/include/asm-x86/user_64.h
diff --git a/include/asm-i386/vga.h b/include/asm-x86/vga.h
index 0ecf68ac03aa..0ecf68ac03aa 100644
--- a/include/asm-i386/vga.h
+++ b/include/asm-x86/vga.h
diff --git a/include/asm-x86_64/vgtod.h b/include/asm-x86/vgtod.h
index 3301f0929342..3301f0929342 100644
--- a/include/asm-x86_64/vgtod.h
+++ b/include/asm-x86/vgtod.h
diff --git a/include/asm-i386/vic.h b/include/asm-x86/vic.h
index 53100f353612..53100f353612 100644
--- a/include/asm-i386/vic.h
+++ b/include/asm-x86/vic.h
diff --git a/include/asm-i386/vm86.h b/include/asm-x86/vm86.h
index a5edf517b992..a5edf517b992 100644
--- a/include/asm-i386/vm86.h
+++ b/include/asm-x86/vm86.h
diff --git a/include/asm-i386/vmi.h b/include/asm-x86/vmi.h
index eb8bd892c01e..eb8bd892c01e 100644
--- a/include/asm-i386/vmi.h
+++ b/include/asm-x86/vmi.h
diff --git a/include/asm-i386/vmi_time.h b/include/asm-x86/vmi_time.h
index 478188130328..478188130328 100644
--- a/include/asm-i386/vmi_time.h
+++ b/include/asm-x86/vmi_time.h
diff --git a/include/asm-i386/voyager.h b/include/asm-x86/voyager.h
index 91a9932937ab..91a9932937ab 100644
--- a/include/asm-i386/voyager.h
+++ b/include/asm-x86/voyager.h
diff --git a/include/asm-x86_64/vsyscall.h b/include/asm-x86/vsyscall.h
index 3b8ceb4af2cf..3b8ceb4af2cf 100644
--- a/include/asm-x86_64/vsyscall.h
+++ b/include/asm-x86/vsyscall.h
diff --git a/include/asm-x86_64/vsyscall32.h b/include/asm-x86/vsyscall32.h
index c631c082f8f7..c631c082f8f7 100644
--- a/include/asm-x86_64/vsyscall32.h
+++ b/include/asm-x86/vsyscall32.h
diff --git a/include/asm-i386/xen/hypercall.h b/include/asm-x86/xen/hypercall.h
index bc0ee7d961ca..bc0ee7d961ca 100644
--- a/include/asm-i386/xen/hypercall.h
+++ b/include/asm-x86/xen/hypercall.h
diff --git a/include/asm-i386/xen/hypervisor.h b/include/asm-x86/xen/hypervisor.h
index 8e15dd28c91f..8e15dd28c91f 100644
--- a/include/asm-i386/xen/hypervisor.h
+++ b/include/asm-x86/xen/hypervisor.h
diff --git a/include/asm-i386/xen/interface.h b/include/asm-x86/xen/interface.h
index 165c3968e138..165c3968e138 100644
--- a/include/asm-i386/xen/interface.h
+++ b/include/asm-x86/xen/interface.h
diff --git a/include/asm-x86/xor.h b/include/asm-x86/xor.h
new file mode 100644
index 000000000000..11b3bb86e17b
--- /dev/null
+++ b/include/asm-x86/xor.h
@@ -0,0 +1,5 @@
1#ifdef CONFIG_X86_32
2# include "xor_32.h"
3#else
4# include "xor_64.h"
5#endif
diff --git a/include/asm-i386/xor.h b/include/asm-x86/xor_32.h
index 23c86cef3b25..23c86cef3b25 100644
--- a/include/asm-i386/xor.h
+++ b/include/asm-x86/xor_32.h
diff --git a/include/asm-x86_64/xor.h b/include/asm-x86/xor_64.h
index f942fcc21831..f942fcc21831 100644
--- a/include/asm-x86_64/xor.h
+++ b/include/asm-x86/xor_64.h
diff --git a/include/asm-x86_64/Kbuild b/include/asm-x86_64/Kbuild
deleted file mode 100644
index 75a2deffca68..000000000000
--- a/include/asm-x86_64/Kbuild
+++ /dev/null
@@ -1,21 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3ALTARCH := i386
4ARCHDEF := defined __x86_64__
5ALTARCHDEF := defined __i386__
6
7header-y += boot.h
8header-y += bootsetup.h
9header-y += debugreg.h
10header-y += ldt.h
11header-y += msr-index.h
12header-y += prctl.h
13header-y += ptrace-abi.h
14header-y += sigcontext32.h
15header-y += ucontext.h
16header-y += vsyscall32.h
17
18unifdef-y += mce.h
19unifdef-y += msr.h
20unifdef-y += mtrr.h
21unifdef-y += vsyscall.h
diff --git a/include/asm-x86_64/boot.h b/include/asm-x86_64/boot.h
deleted file mode 100644
index 3c46cea8db7f..000000000000
--- a/include/asm-x86_64/boot.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/boot.h>
diff --git a/include/asm-x86_64/bootparam.h b/include/asm-x86_64/bootparam.h
deleted file mode 100644
index aa82e5238d82..000000000000
--- a/include/asm-x86_64/bootparam.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/bootparam.h>
diff --git a/include/asm-x86_64/cpu.h b/include/asm-x86_64/cpu.h
deleted file mode 100644
index 8eea076525a4..000000000000
--- a/include/asm-x86_64/cpu.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/cpu.h>
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
deleted file mode 100644
index 8baefc3beb2e..000000000000
--- a/include/asm-x86_64/cpufeature.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * cpufeature.h
3 *
4 * Defines x86 CPU feature bits
5 */
6
7#ifndef __ASM_X8664_CPUFEATURE_H
8#define __ASM_X8664_CPUFEATURE_H
9
10#include <asm-i386/cpufeature.h>
11
12#undef cpu_has_vme
13#define cpu_has_vme 0
14
15#undef cpu_has_pae
16#define cpu_has_pae ___BUG___
17
18#undef cpu_has_mp
19#define cpu_has_mp 1 /* XXX */
20
21#undef cpu_has_k6_mtrr
22#define cpu_has_k6_mtrr 0
23
24#undef cpu_has_cyrix_arr
25#define cpu_has_cyrix_arr 0
26
27#undef cpu_has_centaur_mcr
28#define cpu_has_centaur_mcr 0
29
30#endif /* __ASM_X8664_CPUFEATURE_H */
diff --git a/include/asm-x86_64/emergency-restart.h b/include/asm-x86_64/emergency-restart.h
deleted file mode 100644
index 680c39563345..000000000000
--- a/include/asm-x86_64/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4extern void machine_emergency_restart(void);
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-x86_64/fcntl.h b/include/asm-x86_64/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-x86_64/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-x86_64/hpet.h b/include/asm-x86_64/hpet.h
deleted file mode 100644
index 79bb950f82c5..000000000000
--- a/include/asm-x86_64/hpet.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_X8664_HPET_H
2#define _ASM_X8664_HPET_H 1
3
4#include <asm-i386/hpet.h>
5
6#define HPET_TICK_RATE (HZ * 100000UL)
7
8extern int hpet_rtc_timer_init(void);
9extern int hpet_arch_init(void);
10extern int hpet_timer_stop_set_go(unsigned long tick);
11extern int hpet_reenable(void);
12extern unsigned int hpet_calibrate_tsc(void);
13
14extern int hpet_use_timer;
15extern unsigned long hpet_period;
16extern unsigned long hpet_tick;
17
18#endif
diff --git a/include/asm-x86_64/hypertransport.h b/include/asm-x86_64/hypertransport.h
deleted file mode 100644
index 5cbf9fa5e0b5..000000000000
--- a/include/asm-x86_64/hypertransport.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/hypertransport.h>
diff --git a/include/asm-x86_64/ide.h b/include/asm-x86_64/ide.h
deleted file mode 100644
index 4cef0ef61878..000000000000
--- a/include/asm-x86_64/ide.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/ide.h>
diff --git a/include/asm-x86_64/ioctl.h b/include/asm-x86_64/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-x86_64/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-x86_64/ist.h b/include/asm-x86_64/ist.h
deleted file mode 100644
index 338857ecbc68..000000000000
--- a/include/asm-x86_64/ist.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/ist.h>
diff --git a/include/asm-x86_64/msidef.h b/include/asm-x86_64/msidef.h
deleted file mode 100644
index 083ad5827e48..000000000000
--- a/include/asm-x86_64/msidef.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/msidef.h>
diff --git a/include/asm-x86_64/msr-index.h b/include/asm-x86_64/msr-index.h
deleted file mode 100644
index d77a63f1ddf2..000000000000
--- a/include/asm-x86_64/msr-index.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/msr-index.h>
diff --git a/include/asm-x86_64/node.h b/include/asm-x86_64/node.h
deleted file mode 100644
index 0ee6f88db048..000000000000
--- a/include/asm-x86_64/node.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/node.h>
diff --git a/include/asm-x86_64/poll.h b/include/asm-x86_64/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-x86_64/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-x86_64/processor-flags.h b/include/asm-x86_64/processor-flags.h
deleted file mode 100644
index ec99a57b2c6a..000000000000
--- a/include/asm-x86_64/processor-flags.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/processor-flags.h>
diff --git a/include/asm-x86_64/socket.h b/include/asm-x86_64/socket.h
deleted file mode 100644
index 90af60cf3c0e..000000000000
--- a/include/asm-x86_64/socket.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-x86_64/spinlock_types.h b/include/asm-x86_64/spinlock_types.h
deleted file mode 100644
index 4da9345c1500..000000000000
--- a/include/asm-x86_64/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 unsigned int slock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 1 }
13
14typedef struct {
15 unsigned int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
19
20#endif
diff --git a/include/asm-x86_64/therm_throt.h b/include/asm-x86_64/therm_throt.h
deleted file mode 100644
index 5aac059007ba..000000000000
--- a/include/asm-x86_64/therm_throt.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/therm_throt.h>
diff --git a/include/asm-x86_64/tsc.h b/include/asm-x86_64/tsc.h
deleted file mode 100644
index d66ba6ef25f6..000000000000
--- a/include/asm-x86_64/tsc.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-i386/tsc.h>
diff --git a/include/asm-x86_64/vga.h b/include/asm-x86_64/vga.h
deleted file mode 100644
index 0ecf68ac03aa..000000000000
--- a/include/asm-x86_64/vga.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Access to VGA videoram
3 *
4 * (c) 1998 Martin Mares <mj@ucw.cz>
5 */
6
7#ifndef _LINUX_ASM_VGA_H_
8#define _LINUX_ASM_VGA_H_
9
10/*
11 * On the PC, we can just recalculate addresses and then
12 * access the videoram directly without any black magic.
13 */
14
15#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x)
16
17#define vga_readb(x) (*(x))
18#define vga_writeb(x,y) (*(y) = (x))
19
20#endif
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index c897c7b03858..1ee9488ca2e4 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -92,4 +92,13 @@ static inline void * bl_get_data(struct backlight_device *bl_dev)
92 return dev_get_drvdata(&bl_dev->dev); 92 return dev_get_drvdata(&bl_dev->dev);
93} 93}
94 94
95struct generic_bl_info {
96 const char *name;
97 int max_intensity;
98 int default_intensity;
99 int limit_mask;
100 void (*set_bl_intensity)(int intensity);
101 void (*kick_battery)(void);
102};
103
95#endif 104#endif
diff --git a/include/linux/bio.h b/include/linux/bio.h
index 1ddef34f43c3..089a8bc55dd4 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -64,7 +64,7 @@ struct bio_vec {
64 64
65struct bio_set; 65struct bio_set;
66struct bio; 66struct bio;
67typedef int (bio_end_io_t) (struct bio *, unsigned int, int); 67typedef void (bio_end_io_t) (struct bio *, int);
68typedef void (bio_destructor_t) (struct bio *); 68typedef void (bio_destructor_t) (struct bio *);
69 69
70/* 70/*
@@ -226,7 +226,7 @@ struct bio {
226#define BIO_SEG_BOUNDARY(q, b1, b2) \ 226#define BIO_SEG_BOUNDARY(q, b1, b2) \
227 BIOVEC_SEG_BOUNDARY((q), __BVEC_END((b1)), __BVEC_START((b2))) 227 BIOVEC_SEG_BOUNDARY((q), __BVEC_END((b1)), __BVEC_START((b2)))
228 228
229#define bio_io_error(bio, bytes) bio_endio((bio), (bytes), -EIO) 229#define bio_io_error(bio) bio_endio((bio), -EIO)
230 230
231/* 231/*
232 * drivers should not use the __ version unless they _really_ want to 232 * drivers should not use the __ version unless they _really_ want to
@@ -286,7 +286,7 @@ extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *);
286extern void bio_put(struct bio *); 286extern void bio_put(struct bio *);
287extern void bio_free(struct bio *, struct bio_set *); 287extern void bio_free(struct bio *, struct bio_set *);
288 288
289extern void bio_endio(struct bio *, unsigned int, int); 289extern void bio_endio(struct bio *, int);
290struct request_queue; 290struct request_queue;
291extern int bio_phys_segments(struct request_queue *, struct bio *); 291extern int bio_phys_segments(struct request_queue *, struct bio *);
292extern int bio_hw_segments(struct request_queue *, struct bio *); 292extern int bio_hw_segments(struct request_queue *, struct bio *);
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index b126c6f68e27..95be0ac57e76 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -1,6 +1,8 @@
1#ifndef _LINUX_BLKDEV_H 1#ifndef _LINUX_BLKDEV_H
2#define _LINUX_BLKDEV_H 2#define _LINUX_BLKDEV_H
3 3
4#ifdef CONFIG_BLOCK
5
4#include <linux/sched.h> 6#include <linux/sched.h>
5#include <linux/major.h> 7#include <linux/major.h>
6#include <linux/genhd.h> 8#include <linux/genhd.h>
@@ -32,8 +34,6 @@
32) 34)
33#endif 35#endif
34 36
35#ifdef CONFIG_BLOCK
36
37struct scsi_ioctl_command; 37struct scsi_ioctl_command;
38 38
39struct request_queue; 39struct request_queue;
@@ -471,7 +471,6 @@ struct request_queue
471 int orderr, ordcolor; 471 int orderr, ordcolor;
472 struct request pre_flush_rq, bar_rq, post_flush_rq; 472 struct request pre_flush_rq, bar_rq, post_flush_rq;
473 struct request *orig_bar_rq; 473 struct request *orig_bar_rq;
474 unsigned int bi_size;
475 474
476 struct mutex sysfs_lock; 475 struct mutex sysfs_lock;
477 476
@@ -637,10 +636,23 @@ static inline void blk_queue_bounce(struct request_queue *q, struct bio **bio)
637} 636}
638#endif /* CONFIG_MMU */ 637#endif /* CONFIG_MMU */
639 638
640#define rq_for_each_bio(_bio, rq) \ 639struct req_iterator {
640 int i;
641 struct bio *bio;
642};
643
644/* This should not be used directly - use rq_for_each_segment */
645#define __rq_for_each_bio(_bio, rq) \
641 if ((rq->bio)) \ 646 if ((rq->bio)) \
642 for (_bio = (rq)->bio; _bio; _bio = _bio->bi_next) 647 for (_bio = (rq)->bio; _bio; _bio = _bio->bi_next)
643 648
649#define rq_for_each_segment(bvl, _rq, _iter) \
650 __rq_for_each_bio(_iter.bio, _rq) \
651 bio_for_each_segment(bvl, _iter.bio, _iter.i)
652
653#define rq_iter_last(rq, _iter) \
654 (_iter.bio->bi_next == NULL && _iter.i == _iter.bio->bi_vcnt-1)
655
644extern int blk_register_queue(struct gendisk *disk); 656extern int blk_register_queue(struct gendisk *disk);
645extern void blk_unregister_queue(struct gendisk *disk); 657extern void blk_unregister_queue(struct gendisk *disk);
646extern void register_disk(struct gendisk *dev); 658extern void register_disk(struct gendisk *dev);
@@ -662,8 +674,8 @@ extern int sg_scsi_ioctl(struct file *, struct request_queue *,
662/* 674/*
663 * Temporary export, until SCSI gets fixed up. 675 * Temporary export, until SCSI gets fixed up.
664 */ 676 */
665extern int ll_back_merge_fn(struct request_queue *, struct request *, 677extern int blk_rq_append_bio(struct request_queue *q, struct request *rq,
666 struct bio *); 678 struct bio *bio);
667 679
668/* 680/*
669 * A queue has just exitted congestion. Note this in the global counter of 681 * A queue has just exitted congestion. Note this in the global counter of
@@ -810,7 +822,6 @@ static inline struct request *blk_map_queue_find_tag(struct blk_queue_tag *bqt,
810 return bqt->tag_index[tag]; 822 return bqt->tag_index[tag];
811} 823}
812 824
813extern void blk_rq_bio_prep(struct request_queue *, struct request *, struct bio *);
814extern int blkdev_issue_flush(struct block_device *, sector_t *); 825extern int blkdev_issue_flush(struct block_device *, sector_t *);
815 826
816#define MAX_PHYS_SEGMENTS 128 827#define MAX_PHYS_SEGMENTS 128
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index 7b5d56b82b59..2e105a12fe29 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -142,10 +142,14 @@ struct blk_user_trace_setup {
142 u32 pid; 142 u32 pid;
143}; 143};
144 144
145#ifdef __KERNEL__
145#if defined(CONFIG_BLK_DEV_IO_TRACE) 146#if defined(CONFIG_BLK_DEV_IO_TRACE)
146extern int blk_trace_ioctl(struct block_device *, unsigned, char __user *); 147extern int blk_trace_ioctl(struct block_device *, unsigned, char __user *);
147extern void blk_trace_shutdown(struct request_queue *); 148extern void blk_trace_shutdown(struct request_queue *);
148extern void __blk_add_trace(struct blk_trace *, sector_t, int, int, u32, int, int, void *); 149extern void __blk_add_trace(struct blk_trace *, sector_t, int, int, u32, int, int, void *);
150extern int do_blk_trace_setup(struct request_queue *q,
151 struct block_device *bdev, struct blk_user_trace_setup *buts);
152
149 153
150/** 154/**
151 * blk_add_trace_rq - Add a trace for a request oriented action 155 * blk_add_trace_rq - Add a trace for a request oriented action
@@ -286,6 +290,12 @@ static inline void blk_add_trace_remap(struct request_queue *q, struct bio *bio,
286#define blk_add_trace_generic(q, rq, rw, what) do { } while (0) 290#define blk_add_trace_generic(q, rq, rw, what) do { } while (0)
287#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0) 291#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0)
288#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0) 292#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0)
293static inline int do_blk_trace_setup(struct request_queue *q,
294 struct block_device *bdev,
295 struct blk_user_trace_setup *buts)
296{
297 return 0;
298}
289#endif /* CONFIG_BLK_DEV_IO_TRACE */ 299#endif /* CONFIG_BLK_DEV_IO_TRACE */
290 300#endif /* __KERNEL__ */
291#endif 301#endif
diff --git a/include/linux/dmi.h b/include/linux/dmi.h
index b8ac7b01c45e..00fc7a9c35ec 100644
--- a/include/linux/dmi.h
+++ b/include/linux/dmi.h
@@ -54,7 +54,7 @@ struct dmi_strmatch {
54}; 54};
55 55
56struct dmi_system_id { 56struct dmi_system_id {
57 int (*callback)(struct dmi_system_id *); 57 int (*callback)(const struct dmi_system_id *);
58 const char *ident; 58 const char *ident;
59 struct dmi_strmatch matches[4]; 59 struct dmi_strmatch matches[4];
60 void *driver_data; 60 void *driver_data;
@@ -71,22 +71,22 @@ struct dmi_device {
71 71
72#ifdef CONFIG_DMI 72#ifdef CONFIG_DMI
73 73
74extern int dmi_check_system(struct dmi_system_id *list); 74extern int dmi_check_system(const struct dmi_system_id *list);
75extern char * dmi_get_system_info(int field); 75extern const char * dmi_get_system_info(int field);
76extern struct dmi_device * dmi_find_device(int type, const char *name, 76extern const struct dmi_device * dmi_find_device(int type, const char *name,
77 struct dmi_device *from); 77 const struct dmi_device *from);
78extern void dmi_scan_machine(void); 78extern void dmi_scan_machine(void);
79extern int dmi_get_year(int field); 79extern int dmi_get_year(int field);
80extern int dmi_name_in_vendors(char *str); 80extern int dmi_name_in_vendors(const char *str);
81 81
82#else 82#else
83 83
84static inline int dmi_check_system(struct dmi_system_id *list) { return 0; } 84static inline int dmi_check_system(const struct dmi_system_id *list) { return 0; }
85static inline char * dmi_get_system_info(int field) { return NULL; } 85static inline const char * dmi_get_system_info(int field) { return NULL; }
86static inline struct dmi_device * dmi_find_device(int type, const char *name, 86static inline const struct dmi_device * dmi_find_device(int type, const char *name,
87 struct dmi_device *from) { return NULL; } 87 const struct dmi_device *from) { return NULL; }
88static inline int dmi_get_year(int year) { return 0; } 88static inline int dmi_get_year(int year) { return 0; }
89static inline int dmi_name_in_vendors(char *s) { return 0; } 89static inline int dmi_name_in_vendors(const char *s) { return 0; }
90 90
91#endif 91#endif
92 92
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index b69014865714..a271b67a8e2d 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -119,6 +119,7 @@
119#define I2C_DRIVERID_WM8750 90 /* Wolfson WM8750 audio codec */ 119#define I2C_DRIVERID_WM8750 90 /* Wolfson WM8750 audio codec */
120#define I2C_DRIVERID_WM8753 91 /* Wolfson WM8753 audio codec */ 120#define I2C_DRIVERID_WM8753 91 /* Wolfson WM8753 audio codec */
121#define I2C_DRIVERID_LM4857 92 /* LM4857 Audio Amplifier */ 121#define I2C_DRIVERID_LM4857 92 /* LM4857 Audio Amplifier */
122#define I2C_DRIVERID_VP27SMPX 93 /* Panasonic VP27s tuner internal MPX */
122 123
123#define I2C_DRIVERID_I2CDEV 900 124#define I2C_DRIVERID_I2CDEV 900
124#define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */ 125#define I2C_DRIVERID_ARP 902 /* SMBus ARP Client */
@@ -196,6 +197,7 @@
196#define I2C_HW_B_EM28XX 0x01001f /* em28xx video capture cards */ 197#define I2C_HW_B_EM28XX 0x01001f /* em28xx video capture cards */
197#define I2C_HW_B_CX2341X 0x010020 /* Conexant CX2341X MPEG encoder cards */ 198#define I2C_HW_B_CX2341X 0x010020 /* Conexant CX2341X MPEG encoder cards */
198#define I2C_HW_B_INTELFB 0x010021 /* intel framebuffer driver */ 199#define I2C_HW_B_INTELFB 0x010021 /* intel framebuffer driver */
200#define I2C_HW_B_CX23885 0x010022 /* conexant 23885 based tv cards (bus1) */
199 201
200/* --- PCF 8584 based algorithms */ 202/* --- PCF 8584 based algorithms */
201#define I2C_HW_P_LP 0x020000 /* Parallel port interface */ 203#define I2C_HW_P_LP 0x020000 /* Parallel port interface */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index b9f66c10caa0..85d448b4abec 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -634,7 +634,7 @@ typedef struct ide_drive_s {
634 634
635 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ 635 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
636 unsigned int cyl; /* "real" number of cyls */ 636 unsigned int cyl; /* "real" number of cyls */
637 unsigned int drive_data; /* use by tuneproc/selectproc */ 637 unsigned int drive_data; /* used by set_pio_mode/selectproc */
638 unsigned int failures; /* current failure count */ 638 unsigned int failures; /* current failure count */
639 unsigned int max_failures; /* maximum allowed failure count */ 639 unsigned int max_failures; /* maximum allowed failure count */
640 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ 640 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
@@ -702,10 +702,10 @@ typedef struct hwif_s {
702#if 0 702#if 0
703 ide_hwif_ops_t *hwifops; 703 ide_hwif_ops_t *hwifops;
704#else 704#else
705 /* routine to tune PIO mode for drives */ 705 /* routine to set PIO mode for drives */
706 void (*tuneproc)(ide_drive_t *, u8); 706 void (*set_pio_mode)(ide_drive_t *, const u8);
707 /* routine to retune DMA modes for drives */ 707 /* routine to retune DMA modes for drives */
708 int (*speedproc)(ide_drive_t *, u8); 708 int (*speedproc)(ide_drive_t *, const u8);
709 /* tweaks hardware to select drive */ 709 /* tweaks hardware to select drive */
710 void (*selectproc)(ide_drive_t *); 710 void (*selectproc)(ide_drive_t *);
711 /* chipset polling based on hba specifics */ 711 /* chipset polling based on hba specifics */
@@ -723,6 +723,7 @@ typedef struct hwif_s {
723 /* driver soft-power interface */ 723 /* driver soft-power interface */
724 int (*busproc)(ide_drive_t *, int); 724 int (*busproc)(ide_drive_t *, int);
725#endif 725#endif
726 u8 (*mdma_filter)(ide_drive_t *);
726 u8 (*udma_filter)(ide_drive_t *); 727 u8 (*udma_filter)(ide_drive_t *);
727 728
728 void (*ata_input_data)(ide_drive_t *, void *, u32); 729 void (*ata_input_data)(ide_drive_t *, void *, u32);
@@ -1255,6 +1256,12 @@ enum {
1255 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), 1256 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1256 /* don't use conservative PIO "downgrade" */ 1257 /* don't use conservative PIO "downgrade" */
1257 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3), 1258 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1259 /* use PIO8/9 for prefetch off/on */
1260 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1261 /* use PIO6/7 for fast-devsel off/on */
1262 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1263 /* use 100-102 and 200-202 PIO values to set DMA modes */
1264 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1258}; 1265};
1259 1266
1260typedef struct ide_pci_device_s { 1267typedef struct ide_pci_device_s {
@@ -1295,7 +1302,14 @@ int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1295#ifdef CONFIG_BLK_DEV_IDEDMA 1302#ifdef CONFIG_BLK_DEV_IDEDMA
1296int __ide_dma_bad_drive(ide_drive_t *); 1303int __ide_dma_bad_drive(ide_drive_t *);
1297int __ide_dma_good_drive(ide_drive_t *); 1304int __ide_dma_good_drive(ide_drive_t *);
1298u8 ide_max_dma_mode(ide_drive_t *); 1305
1306u8 ide_find_dma_mode(ide_drive_t *, u8);
1307
1308static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1309{
1310 return ide_find_dma_mode(drive, XFER_UDMA_6);
1311}
1312
1299int ide_tune_dma(ide_drive_t *); 1313int ide_tune_dma(ide_drive_t *);
1300void ide_dma_off(ide_drive_t *); 1314void ide_dma_off(ide_drive_t *);
1301void ide_dma_verbose(ide_drive_t *); 1315void ide_dma_verbose(ide_drive_t *);
@@ -1321,6 +1335,7 @@ extern void ide_dma_timeout(ide_drive_t *);
1321#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */ 1335#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1322 1336
1323#else 1337#else
1338static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1324static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } 1339static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1325static inline int ide_tune_dma(ide_drive_t *drive) { return 0; } 1340static inline int ide_tune_dma(ide_drive_t *drive) { return 0; }
1326static inline void ide_dma_off(ide_drive_t *drive) { ; } 1341static inline void ide_dma_off(ide_drive_t *drive) { ; }
@@ -1337,11 +1352,13 @@ extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1337extern void ide_acpi_get_timing(ide_hwif_t *hwif); 1352extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1338extern void ide_acpi_push_timing(ide_hwif_t *hwif); 1353extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1339extern void ide_acpi_init(ide_hwif_t *hwif); 1354extern void ide_acpi_init(ide_hwif_t *hwif);
1355extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1340#else 1356#else
1341static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } 1357static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1342static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } 1358static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1343static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } 1359static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1344static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } 1360static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1361static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1345#endif 1362#endif
1346 1363
1347extern int ide_hwif_request_regions(ide_hwif_t *hwif); 1364extern int ide_hwif_request_regions(ide_hwif_t *hwif);
@@ -1367,7 +1384,6 @@ static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1367} 1384}
1368 1385
1369/* ide-lib.c */ 1386/* ide-lib.c */
1370u8 ide_rate_filter(ide_drive_t *, u8);
1371extern char *ide_xfer_verbose(u8 xfer_rate); 1387extern char *ide_xfer_verbose(u8 xfer_rate);
1372extern void ide_toggle_bounce(ide_drive_t *drive, int on); 1388extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1373extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); 1389extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
@@ -1404,6 +1420,12 @@ unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1404u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); 1420u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1405extern const ide_pio_timings_t ide_pio_timings[6]; 1421extern const ide_pio_timings_t ide_pio_timings[6];
1406 1422
1423void ide_set_pio(ide_drive_t *, u8);
1424
1425static inline void ide_set_max_pio(ide_drive_t *drive)
1426{
1427 ide_set_pio(drive, 255);
1428}
1407 1429
1408extern spinlock_t ide_lock; 1430extern spinlock_t ide_lock;
1409extern struct mutex ide_cfg_mtx; 1431extern struct mutex ide_cfg_mtx;
diff --git a/include/linux/ivtv.h b/include/linux/ivtv.h
new file mode 100644
index 000000000000..794b8daa9378
--- /dev/null
+++ b/include/linux/ivtv.h
@@ -0,0 +1,72 @@
1/*
2 Public ivtv API header
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __LINUX_IVTV_H__
22#define __LINUX_IVTV_H__
23
24#ifdef __KERNEL__
25#include <linux/compiler.h> /* need __user */
26#else
27#define __user
28#endif
29#include <linux/types.h>
30
31/* ivtv knows several distinct output modes: MPEG streaming,
32 YUV streaming, YUV updates through user DMA and the passthrough
33 mode.
34
35 In order to clearly tell the driver that we are in user DMA
36 YUV mode you need to call IVTV_IOC_DMA_FRAME with y_source == NULL
37 first (althrough if you don't then the first time
38 DMA_FRAME is called the mode switch is done automatically).
39
40 When you close the file handle the user DMA mode is exited again.
41
42 While in one mode, you cannot use another mode (EBUSY is returned).
43
44 All this means that if you want to change the YUV interlacing
45 for the user DMA YUV mode you first need to do call IVTV_IOC_DMA_FRAME
46 with y_source == NULL before you can set the correct format using
47 VIDIOC_S_FMT.
48
49 Eventually all this should be replaced with a proper V4L2 API,
50 but for now we have to do it this way. */
51
52struct ivtv_dma_frame {
53 enum v4l2_buf_type type; /* V4L2_BUF_TYPE_VIDEO_OUTPUT */
54 __u32 pixelformat; /* 0 == same as destination */
55 void __user *y_source; /* if NULL and type == V4L2_BUF_TYPE_VIDEO_OUTPUT,
56 then just switch to user DMA YUV output mode */
57 void __user *uv_source; /* Unused for RGB pixelformats */
58 struct v4l2_rect src;
59 struct v4l2_rect dst;
60 __u32 src_width;
61 __u32 src_height;
62};
63
64#define IVTV_IOC_DMA_FRAME _IOW ('V', BASE_VIDIOC_PRIVATE+0, struct ivtv_dma_frame)
65
66/* These are the VBI types as they appear in the embedded VBI private packets. */
67#define IVTV_SLICED_TYPE_TELETEXT_B (1)
68#define IVTV_SLICED_TYPE_CAPTION_525 (4)
69#define IVTV_SLICED_TYPE_WSS_625 (5)
70#define IVTV_SLICED_TYPE_VPS (7)
71
72#endif /* _LINUX_IVTV_H */
diff --git a/include/linux/ivtvfb.h b/include/linux/ivtvfb.h
new file mode 100644
index 000000000000..e980ba62ddcc
--- /dev/null
+++ b/include/linux/ivtvfb.h
@@ -0,0 +1,42 @@
1/*
2 On Screen Display cx23415 Framebuffer driver
3
4 Copyright (C) 2006, 2007 Ian Armstrong <ian@iarmst.demon.co.uk>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __LINUX_IVTVFB_H__
22#define __LINUX_IVTVFB_H__
23
24#ifdef __KERNEL__
25#include <linux/compiler.h> /* need __user */
26#else
27#define __user
28#endif
29#include <linux/types.h>
30
31/* Framebuffer external API */
32
33struct ivtvfb_dma_frame {
34 void __user *source;
35 unsigned long dest_offset;
36 int count;
37};
38
39#define IVTVFB_IOC_DMA_FRAME _IOW('V', BASE_VIDIOC_PRIVATE+0, struct ivtvfb_dma_frame)
40#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t)
41
42#endif
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index badf702fcff4..0d508ac17d64 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -55,7 +55,28 @@ struct sd_switch_caps {
55 unsigned int hs_max_dtr; 55 unsigned int hs_max_dtr;
56}; 56};
57 57
58struct sdio_cccr {
59 unsigned int sdio_vsn;
60 unsigned int sd_vsn;
61 unsigned int multi_block:1,
62 low_speed:1,
63 wide_bus:1,
64 high_power:1,
65 high_speed:1;
66};
67
68struct sdio_cis {
69 unsigned short vendor;
70 unsigned short device;
71 unsigned short blksize;
72 unsigned int max_dtr;
73};
74
58struct mmc_host; 75struct mmc_host;
76struct sdio_func;
77struct sdio_func_tuple;
78
79#define SDIO_MAX_FUNCS 7
59 80
60/* 81/*
61 * MMC device 82 * MMC device
@@ -67,11 +88,13 @@ struct mmc_card {
67 unsigned int type; /* card type */ 88 unsigned int type; /* card type */
68#define MMC_TYPE_MMC 0 /* MMC card */ 89#define MMC_TYPE_MMC 0 /* MMC card */
69#define MMC_TYPE_SD 1 /* SD card */ 90#define MMC_TYPE_SD 1 /* SD card */
91#define MMC_TYPE_SDIO 2 /* SDIO card */
70 unsigned int state; /* (our) card state */ 92 unsigned int state; /* (our) card state */
71#define MMC_STATE_PRESENT (1<<0) /* present in sysfs */ 93#define MMC_STATE_PRESENT (1<<0) /* present in sysfs */
72#define MMC_STATE_READONLY (1<<1) /* card is read-only */ 94#define MMC_STATE_READONLY (1<<1) /* card is read-only */
73#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */ 95#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */
74#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */ 96#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
97
75 u32 raw_cid[4]; /* raw card CID */ 98 u32 raw_cid[4]; /* raw card CID */
76 u32 raw_csd[4]; /* raw card CSD */ 99 u32 raw_csd[4]; /* raw card CSD */
77 u32 raw_scr[2]; /* raw card SCR */ 100 u32 raw_scr[2]; /* raw card SCR */
@@ -80,10 +103,19 @@ struct mmc_card {
80 struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */ 103 struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */
81 struct sd_scr scr; /* extra SD information */ 104 struct sd_scr scr; /* extra SD information */
82 struct sd_switch_caps sw_caps; /* switch (CMD6) caps */ 105 struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
106
107 unsigned int sdio_funcs; /* number of SDIO functions */
108 struct sdio_cccr cccr; /* common card info */
109 struct sdio_cis cis; /* common tuple info */
110 struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
111 unsigned num_info; /* number of info strings */
112 const char **info; /* info strings */
113 struct sdio_func_tuple *tuples; /* unknown common tuples */
83}; 114};
84 115
85#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC) 116#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC)
86#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD) 117#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD)
118#define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO)
87 119
88#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) 120#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
89#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) 121#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 63a80ea61124..d0c3abed74c2 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -25,14 +25,20 @@ struct mmc_command {
25#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 25#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
26#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 26#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
27#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 27#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
28#define MMC_CMD_MASK (3 << 5) /* command type */ 28
29#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
29#define MMC_CMD_AC (0 << 5) 30#define MMC_CMD_AC (0 << 5)
30#define MMC_CMD_ADTC (1 << 5) 31#define MMC_CMD_ADTC (1 << 5)
31#define MMC_CMD_BC (2 << 5) 32#define MMC_CMD_BC (2 << 5)
32#define MMC_CMD_BCR (3 << 5) 33#define MMC_CMD_BCR (3 << 5)
33 34
35#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
36#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
37#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
38#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
39
34/* 40/*
35 * These are the response types, and correspond to valid bit 41 * These are the native response types, and correspond to valid bit
36 * patterns of the above flags. One additional valid pattern 42 * patterns of the above flags. One additional valid pattern
37 * is all zeros, which means we don't expect a response. 43 * is all zeros, which means we don't expect a response.
38 */ 44 */
@@ -41,12 +47,30 @@ struct mmc_command {
41#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY) 47#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
42#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 48#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
43#define MMC_RSP_R3 (MMC_RSP_PRESENT) 49#define MMC_RSP_R3 (MMC_RSP_PRESENT)
50#define MMC_RSP_R4 (MMC_RSP_PRESENT)
51#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
44#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 52#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
45#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 53#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
46 54
47#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE)) 55#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
48 56
49/* 57/*
58 * These are the SPI response types for MMC, SD, and SDIO cards.
59 * Commands return R1, with maybe more info. Zero is an error type;
60 * callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
61 */
62#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
63#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
64#define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
65#define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
66#define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
67#define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
68#define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
69
70#define mmc_spi_resp_type(cmd) ((cmd)->flags & \
71 (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4))
72
73/*
50 * These are the command types. 74 * These are the command types.
51 */ 75 */
52#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK) 76#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK)
@@ -54,12 +78,19 @@ struct mmc_command {
54 unsigned int retries; /* max number of retries */ 78 unsigned int retries; /* max number of retries */
55 unsigned int error; /* command error */ 79 unsigned int error; /* command error */
56 80
57#define MMC_ERR_NONE 0 81/*
58#define MMC_ERR_TIMEOUT 1 82 * Standard errno values are used for errors, but some have specific
59#define MMC_ERR_BADCRC 2 83 * meaning in the MMC layer:
60#define MMC_ERR_FIFO 3 84 *
61#define MMC_ERR_FAILED 4 85 * ETIMEDOUT Card took too long to respond
62#define MMC_ERR_INVALID 5 86 * EILSEQ Basic format problem with the received or sent data
87 * (e.g. CRC check failed, incorrect opcode in response
88 * or bad end bit)
89 * EINVAL Request cannot be performed because of restrictions
90 * in hardware and/or the driver
91 * ENOMEDIUM Host can determine that the slot is empty and is
92 * actively failing requests
93 */
63 94
64 struct mmc_data *data; /* data segment associated with cmd */ 95 struct mmc_data *data; /* data segment associated with cmd */
65 struct mmc_request *mrq; /* associated request */ 96 struct mmc_request *mrq; /* associated request */
@@ -76,7 +107,6 @@ struct mmc_data {
76#define MMC_DATA_WRITE (1 << 8) 107#define MMC_DATA_WRITE (1 << 8)
77#define MMC_DATA_READ (1 << 9) 108#define MMC_DATA_READ (1 << 9)
78#define MMC_DATA_STREAM (1 << 10) 109#define MMC_DATA_STREAM (1 << 10)
79#define MMC_DATA_MULTI (1 << 11)
80 110
81 unsigned int bytes_xfered; 111 unsigned int bytes_xfered;
82 112
@@ -104,9 +134,20 @@ extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
104extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *, 134extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
105 struct mmc_command *, int); 135 struct mmc_command *, int);
106 136
107extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int); 137extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
108 138
109extern void mmc_claim_host(struct mmc_host *host); 139extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort);
110extern void mmc_release_host(struct mmc_host *host); 140extern void mmc_release_host(struct mmc_host *host);
111 141
142/**
143 * mmc_claim_host - exclusively claim a host
144 * @host: mmc host to claim
145 *
146 * Claim a host for a set of operations.
147 */
148static inline void mmc_claim_host(struct mmc_host *host)
149{
150 __mmc_claim_host(host, NULL);
151}
152
112#endif 153#endif
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index b1350dfd3e91..125eee1407ff 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -10,6 +10,8 @@
10#ifndef LINUX_MMC_HOST_H 10#ifndef LINUX_MMC_HOST_H
11#define LINUX_MMC_HOST_H 11#define LINUX_MMC_HOST_H
12 12
13#include <linux/leds.h>
14
13#include <linux/mmc/core.h> 15#include <linux/mmc/core.h>
14 16
15struct mmc_ios { 17struct mmc_ios {
@@ -51,6 +53,7 @@ struct mmc_host_ops {
51 void (*request)(struct mmc_host *host, struct mmc_request *req); 53 void (*request)(struct mmc_host *host, struct mmc_request *req);
52 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 54 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
53 int (*get_ro)(struct mmc_host *host); 55 int (*get_ro)(struct mmc_host *host);
56 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
54}; 57};
55 58
56struct mmc_card; 59struct mmc_card;
@@ -87,9 +90,10 @@ struct mmc_host {
87 90
88#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 91#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
89#define MMC_CAP_MULTIWRITE (1 << 1) /* Can accurately report bytes sent to card on error */ 92#define MMC_CAP_MULTIWRITE (1 << 1) /* Can accurately report bytes sent to card on error */
90#define MMC_CAP_BYTEBLOCK (1 << 2) /* Can do non-log2 block sizes */ 93#define MMC_CAP_MMC_HIGHSPEED (1 << 2) /* Can do MMC high-speed timing */
91#define MMC_CAP_MMC_HIGHSPEED (1 << 3) /* Can do MMC high-speed timing */ 94#define MMC_CAP_SD_HIGHSPEED (1 << 3) /* Can do SD high-speed timing */
92#define MMC_CAP_SD_HIGHSPEED (1 << 4) /* Can do SD high-speed timing */ 95#define MMC_CAP_SDIO_IRQ (1 << 4) /* Can signal pending SDIO IRQs */
96#define MMC_CAP_SPI (1 << 5) /* Talks only SPI protocols */
93 97
94 /* host specific block data */ 98 /* host specific block data */
95 unsigned int max_seg_size; /* see blk_queue_max_segment_size */ 99 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
@@ -106,6 +110,14 @@ struct mmc_host {
106 struct mmc_ios ios; /* current io bus settings */ 110 struct mmc_ios ios; /* current io bus settings */
107 u32 ocr; /* the current OCR setting */ 111 u32 ocr; /* the current OCR setting */
108 112
113 /* group bitfields together to minimize padding */
114 unsigned int use_spi_crc:1;
115 unsigned int claimed:1; /* host exclusively claimed */
116 unsigned int bus_dead:1; /* bus has been released */
117#ifdef CONFIG_MMC_DEBUG
118 unsigned int removed:1; /* host is being removed */
119#endif
120
109 unsigned int mode; /* current card mode of host */ 121 unsigned int mode; /* current card mode of host */
110#define MMC_MODE_MMC 0 122#define MMC_MODE_MMC 0
111#define MMC_MODE_SD 1 123#define MMC_MODE_SD 1
@@ -113,16 +125,19 @@ struct mmc_host {
113 struct mmc_card *card; /* device attached to this host */ 125 struct mmc_card *card; /* device attached to this host */
114 126
115 wait_queue_head_t wq; 127 wait_queue_head_t wq;
116 unsigned int claimed:1; /* host exclusively claimed */
117 128
118 struct delayed_work detect; 129 struct delayed_work detect;
119#ifdef CONFIG_MMC_DEBUG
120 unsigned int removed:1; /* host is being removed */
121#endif
122 130
123 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 131 const struct mmc_bus_ops *bus_ops; /* current bus driver */
124 unsigned int bus_refs; /* reference counter */ 132 unsigned int bus_refs; /* reference counter */
125 unsigned int bus_dead:1; /* bus has been released */ 133
134 unsigned int sdio_irqs;
135 struct task_struct *sdio_irq_thread;
136 atomic_t sdio_irq_thread_abort;
137
138#ifdef CONFIG_LEDS_TRIGGERS
139 struct led_trigger *led; /* activity led */
140#endif
126 141
127 unsigned long private[0] ____cacheline_aligned; 142 unsigned long private[0] ____cacheline_aligned;
128}; 143};
@@ -137,6 +152,8 @@ static inline void *mmc_priv(struct mmc_host *host)
137 return (void *)host->private; 152 return (void *)host->private;
138} 153}
139 154
155#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
156
140#define mmc_dev(x) ((x)->parent) 157#define mmc_dev(x) ((x)->parent)
141#define mmc_classdev(x) (&(x)->class_dev) 158#define mmc_classdev(x) (&(x)->class_dev)
142#define mmc_hostname(x) ((x)->class_dev.bus_id) 159#define mmc_hostname(x) ((x)->class_dev.bus_id)
@@ -147,5 +164,11 @@ extern int mmc_resume_host(struct mmc_host *);
147extern void mmc_detect_change(struct mmc_host *, unsigned long delay); 164extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
148extern void mmc_request_done(struct mmc_host *, struct mmc_request *); 165extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
149 166
167static inline void mmc_signal_sdio_irq(struct mmc_host *host)
168{
169 host->ops->enable_sdio_irq(host, 0);
170 wake_up_process(host->sdio_irq_thread);
171}
172
150#endif 173#endif
151 174
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index e3ed9b95040e..4236fbf0b6fb 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -27,7 +27,7 @@
27 27
28/* Standard MMC commands (4.1) type argument response */ 28/* Standard MMC commands (4.1) type argument response */
29 /* class 1 */ 29 /* class 1 */
30#define MMC_GO_IDLE_STATE 0 /* bc */ 30#define MMC_GO_IDLE_STATE 0 /* bc */
31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ 31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
32#define MMC_ALL_SEND_CID 2 /* bcr R2 */ 32#define MMC_ALL_SEND_CID 2 /* bcr R2 */
33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ 33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
@@ -39,8 +39,10 @@
39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ 39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ 40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */ 41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ 42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ 43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
44#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
45#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
44 46
45 /* class 2 */ 47 /* class 2 */
46#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ 48#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
@@ -90,15 +92,15 @@
90 */ 92 */
91 93
92/* 94/*
93 MMC status in R1 95 MMC status in R1, for native mode (SPI bits are different)
94 Type 96 Type
95 e : error bit 97 e : error bit
96 s : status bit 98 s : status bit
97 r : detected and set for the actual command response 99 r : detected and set for the actual command response
98 x : detected and set during command execution. the host must poll 100 x : detected and set during command execution. the host must poll
99 the card by sending status command in order to read these bits. 101 the card by sending status command in order to read these bits.
100 Clear condition 102 Clear condition
101 a : according to the card state 103 a : according to the card state
102 b : always related to the previous command. Reception of 104 b : always related to the previous command. Reception of
103 a valid command will clear it (with a delay of one command) 105 a valid command will clear it (with a delay of one command)
104 c : clear by read 106 c : clear by read
@@ -124,10 +126,33 @@
124#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ 126#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
125#define R1_ERASE_RESET (1 << 13) /* sr, c */ 127#define R1_ERASE_RESET (1 << 13) /* sr, c */
126#define R1_STATUS(x) (x & 0xFFFFE000) 128#define R1_STATUS(x) (x & 0xFFFFE000)
127#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ 129#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
128#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ 130#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
129#define R1_APP_CMD (1 << 5) /* sr, c */ 131#define R1_APP_CMD (1 << 5) /* sr, c */
130 132
133/*
134 * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
135 * R1 is the low order byte; R2 is the next highest byte, when present.
136 */
137#define R1_SPI_IDLE (1 << 0)
138#define R1_SPI_ERASE_RESET (1 << 1)
139#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
140#define R1_SPI_COM_CRC (1 << 3)
141#define R1_SPI_ERASE_SEQ (1 << 4)
142#define R1_SPI_ADDRESS (1 << 5)
143#define R1_SPI_PARAMETER (1 << 6)
144/* R1 bit 7 is always zero */
145#define R2_SPI_CARD_LOCKED (1 << 8)
146#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
147#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
148#define R2_SPI_ERROR (1 << 10)
149#define R2_SPI_CC_ERROR (1 << 11)
150#define R2_SPI_CARD_ECC_ERROR (1 << 12)
151#define R2_SPI_WP_VIOLATION (1 << 13)
152#define R2_SPI_ERASE_PARAM (1 << 14)
153#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
154#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
155
131/* These are unpacked versions of the actual responses */ 156/* These are unpacked versions of the actual responses */
132 157
133struct _mmc_csd { 158struct _mmc_csd {
@@ -182,6 +207,7 @@ struct _mmc_csd {
182 */ 207 */
183#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ 208#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
184 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ 209 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
210 /* (and for SPI, CMD58,59) */
185#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ 211#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
186 /* (CMD11) */ 212 /* (CMD11) */
187#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ 213#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
@@ -227,6 +253,7 @@ struct _mmc_csd {
227#define EXT_CSD_BUS_WIDTH 183 /* R/W */ 253#define EXT_CSD_BUS_WIDTH 183 /* R/W */
228#define EXT_CSD_HS_TIMING 185 /* R/W */ 254#define EXT_CSD_HS_TIMING 185 /* R/W */
229#define EXT_CSD_CARD_TYPE 196 /* RO */ 255#define EXT_CSD_CARD_TYPE 196 /* RO */
256#define EXT_CSD_REV 192 /* RO */
230#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 257#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
231 258
232/* 259/*
diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h
new file mode 100644
index 000000000000..47ba464f5170
--- /dev/null
+++ b/include/linux/mmc/sdio.h
@@ -0,0 +1,159 @@
1/*
2 * include/linux/mmc/sdio.h
3 *
4 * Copyright 2006-2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#ifndef MMC_SDIO_H
13#define MMC_SDIO_H
14
15/* SDIO commands type argument response */
16#define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */
17#define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */
18#define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */
19
20/*
21 * SD_IO_RW_DIRECT argument format:
22 *
23 * [31] R/W flag
24 * [30:28] Function number
25 * [27] RAW flag
26 * [25:9] Register address
27 * [7:0] Data
28 */
29
30/*
31 * SD_IO_RW_EXTENDED argument format:
32 *
33 * [31] R/W flag
34 * [30:28] Function number
35 * [27] Block mode
36 * [26] Increment address
37 * [25:9] Register address
38 * [8:0] Byte/block count
39 */
40
41/*
42 SDIO status in R5
43 Type
44 e : error bit
45 s : status bit
46 r : detected and set for the actual command response
47 x : detected and set during command execution. the host must poll
48 the card by sending status command in order to read these bits.
49 Clear condition
50 a : according to the card state
51 b : always related to the previous command. Reception of
52 a valid command will clear it (with a delay of one command)
53 c : clear by read
54 */
55
56#define R5_COM_CRC_ERROR (1 << 15) /* er, b */
57#define R5_ILLEGAL_COMMAND (1 << 14) /* er, b */
58#define R5_ERROR (1 << 11) /* erx, c */
59#define R5_FUNCTION_NUMBER (1 << 9) /* er, c */
60#define R5_OUT_OF_RANGE (1 << 8) /* er, c */
61#define R5_STATUS(x) (x & 0xCB00)
62#define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */
63
64/*
65 * Card Common Control Registers (CCCR)
66 */
67
68#define SDIO_CCCR_CCCR 0x00
69
70#define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */
71#define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */
72#define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */
73
74#define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */
75#define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */
76#define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */
77#define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */
78
79#define SDIO_CCCR_SD 0x01
80
81#define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
82#define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */
83#define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */
84
85#define SDIO_CCCR_IOEx 0x02
86#define SDIO_CCCR_IORx 0x03
87
88#define SDIO_CCCR_IENx 0x04 /* Function/Master Interrupt Enable */
89#define SDIO_CCCR_INTx 0x05 /* Function Interrupt Pending */
90
91#define SDIO_CCCR_ABORT 0x06 /* function abort/card reset */
92
93#define SDIO_CCCR_IF 0x07 /* bus interface controls */
94
95#define SDIO_BUS_WIDTH_1BIT 0x00
96#define SDIO_BUS_WIDTH_4BIT 0x02
97
98#define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */
99
100#define SDIO_CCCR_CAPS 0x08
101
102#define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */
103#define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */
104#define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */
105#define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */
106#define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */
107#define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */
108#define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */
109#define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */
110
111#define SDIO_CCCR_CIS 0x09 /* common CIS pointer (3 bytes) */
112
113/* Following 4 regs are valid only if SBS is set */
114#define SDIO_CCCR_SUSPEND 0x0c
115#define SDIO_CCCR_SELx 0x0d
116#define SDIO_CCCR_EXECx 0x0e
117#define SDIO_CCCR_READYx 0x0f
118
119#define SDIO_CCCR_BLKSIZE 0x10
120
121#define SDIO_CCCR_POWER 0x12
122
123#define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */
124#define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */
125
126#define SDIO_CCCR_SPEED 0x13
127
128#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
129#define SDIO_SPEED_EHS 0x02 /* Enable High-Speed mode */
130
131/*
132 * Function Basic Registers (FBR)
133 */
134
135#define SDIO_FBR_BASE(f) ((f) * 0x100) /* base of function f's FBRs */
136
137#define SDIO_FBR_STD_IF 0x00
138
139#define SDIO_FBR_SUPPORTS_CSA 0x40 /* supports Code Storage Area */
140#define SDIO_FBR_ENABLE_CSA 0x80 /* enable Code Storage Area */
141
142#define SDIO_FBR_STD_IF_EXT 0x01
143
144#define SDIO_FBR_POWER 0x02
145
146#define SDIO_FBR_POWER_SPS 0x01 /* Supports Power Selection */
147#define SDIO_FBR_POWER_EPS 0x02 /* Enable (low) Power Selection */
148
149#define SDIO_FBR_CIS 0x09 /* CIS pointer (3 bytes) */
150
151
152#define SDIO_FBR_CSA 0x0C /* CSA pointer (3 bytes) */
153
154#define SDIO_FBR_CSA_DATA 0x0F
155
156#define SDIO_FBR_BLKSIZE 0x10 /* block size (2 bytes) */
157
158#endif
159
diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h
new file mode 100644
index 000000000000..b050f4d7b41f
--- /dev/null
+++ b/include/linux/mmc/sdio_func.h
@@ -0,0 +1,153 @@
1/*
2 * include/linux/mmc/sdio_func.h
3 *
4 * Copyright 2007 Pierre Ossman
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#ifndef MMC_SDIO_FUNC_H
13#define MMC_SDIO_FUNC_H
14
15#include <linux/device.h>
16#include <linux/mod_devicetable.h>
17
18struct mmc_card;
19struct sdio_func;
20
21typedef void (sdio_irq_handler_t)(struct sdio_func *);
22
23/*
24 * SDIO function CIS tuple (unknown to the core)
25 */
26struct sdio_func_tuple {
27 struct sdio_func_tuple *next;
28 unsigned char code;
29 unsigned char size;
30 unsigned char data[0];
31};
32
33/*
34 * SDIO function devices
35 */
36struct sdio_func {
37 struct mmc_card *card; /* the card this device belongs to */
38 struct device dev; /* the device */
39 sdio_irq_handler_t *irq_handler; /* IRQ callback */
40 unsigned int num; /* function number */
41
42 unsigned char class; /* standard interface class */
43 unsigned short vendor; /* vendor id */
44 unsigned short device; /* device id */
45
46 unsigned max_blksize; /* maximum block size */
47 unsigned cur_blksize; /* current block size */
48
49 unsigned int state; /* function state */
50#define SDIO_STATE_PRESENT (1<<0) /* present in sysfs */
51
52 u8 tmpbuf[4]; /* DMA:able scratch buffer */
53
54 unsigned num_info; /* number of info strings */
55 const char **info; /* info strings */
56
57 struct sdio_func_tuple *tuples;
58};
59
60#define sdio_func_present(f) ((f)->state & SDIO_STATE_PRESENT)
61
62#define sdio_func_set_present(f) ((f)->state |= SDIO_STATE_PRESENT)
63
64#define sdio_func_id(f) ((f)->dev.bus_id)
65
66#define sdio_get_drvdata(f) dev_get_drvdata(&(f)->dev)
67#define sdio_set_drvdata(f,d) dev_set_drvdata(&(f)->dev, d)
68
69/*
70 * SDIO function device driver
71 */
72struct sdio_driver {
73 char *name;
74 const struct sdio_device_id *id_table;
75
76 int (*probe)(struct sdio_func *, const struct sdio_device_id *);
77 void (*remove)(struct sdio_func *);
78
79 struct device_driver drv;
80};
81
82/**
83 * SDIO_DEVICE - macro used to describe a specific SDIO device
84 * @vend: the 16 bit manufacturer code
85 * @dev: the 16 bit function id
86 *
87 * This macro is used to create a struct sdio_device_id that matches a
88 * specific device. The class field will be set to SDIO_ANY_ID.
89 */
90#define SDIO_DEVICE(vend,dev) \
91 .class = SDIO_ANY_ID, \
92 .vendor = (vend), .device = (dev)
93
94/**
95 * SDIO_DEVICE_CLASS - macro used to describe a specific SDIO device class
96 * @dev_class: the 8 bit standard interface code
97 *
98 * This macro is used to create a struct sdio_device_id that matches a
99 * specific standard SDIO function type. The vendor and device fields will
100 * be set to SDIO_ANY_ID.
101 */
102#define SDIO_DEVICE_CLASS(dev_class) \
103 .class = (dev_class), \
104 .vendor = SDIO_ANY_ID, .device = SDIO_ANY_ID
105
106extern int sdio_register_driver(struct sdio_driver *);
107extern void sdio_unregister_driver(struct sdio_driver *);
108
109/*
110 * SDIO I/O operations
111 */
112extern void sdio_claim_host(struct sdio_func *func);
113extern void sdio_release_host(struct sdio_func *func);
114
115extern int sdio_enable_func(struct sdio_func *func);
116extern int sdio_disable_func(struct sdio_func *func);
117
118extern int sdio_set_block_size(struct sdio_func *func, unsigned blksz);
119
120extern int sdio_claim_irq(struct sdio_func *func, sdio_irq_handler_t *handler);
121extern int sdio_release_irq(struct sdio_func *func);
122
123extern unsigned char sdio_readb(struct sdio_func *func,
124 unsigned int addr, int *err_ret);
125extern unsigned short sdio_readw(struct sdio_func *func,
126 unsigned int addr, int *err_ret);
127extern unsigned long sdio_readl(struct sdio_func *func,
128 unsigned int addr, int *err_ret);
129
130extern int sdio_memcpy_fromio(struct sdio_func *func, void *dst,
131 unsigned int addr, int count);
132extern int sdio_readsb(struct sdio_func *func, void *dst,
133 unsigned int addr, int count);
134
135extern void sdio_writeb(struct sdio_func *func, unsigned char b,
136 unsigned int addr, int *err_ret);
137extern void sdio_writew(struct sdio_func *func, unsigned short b,
138 unsigned int addr, int *err_ret);
139extern void sdio_writel(struct sdio_func *func, unsigned long b,
140 unsigned int addr, int *err_ret);
141
142extern int sdio_memcpy_toio(struct sdio_func *func, unsigned int addr,
143 void *src, int count);
144extern int sdio_writesb(struct sdio_func *func, unsigned int addr,
145 void *src, int count);
146
147extern unsigned char sdio_f0_readb(struct sdio_func *func,
148 unsigned int addr, int *err_ret);
149extern void sdio_f0_writeb(struct sdio_func *func, unsigned char b,
150 unsigned int addr, int *err_ret);
151
152#endif
153
diff --git a/include/linux/mmc/sdio_ids.h b/include/linux/mmc/sdio_ids.h
new file mode 100644
index 000000000000..09306d47ff5e
--- /dev/null
+++ b/include/linux/mmc/sdio_ids.h
@@ -0,0 +1,23 @@
1/*
2 * SDIO Classes, Interface Types, Manufacturer IDs, etc.
3 */
4
5#ifndef MMC_SDIO_IDS_H
6#define MMC_SDIO_IDS_H
7
8/*
9 * Standard SDIO Function Interfaces
10 */
11
12#define SDIO_CLASS_NONE 0x00 /* Not a SDIO standard interface */
13#define SDIO_CLASS_UART 0x01 /* standard UART interface */
14#define SDIO_CLASS_BT_A 0x02 /* Type-A BlueTooth std interface */
15#define SDIO_CLASS_BT_B 0x03 /* Type-B BlueTooth std interface */
16#define SDIO_CLASS_GPS 0x04 /* GPS standard interface */
17#define SDIO_CLASS_CAMERA 0x05 /* Camera standard interface */
18#define SDIO_CLASS_PHS 0x06 /* PHS standard interface */
19#define SDIO_CLASS_WLAN 0x07 /* WLAN interface */
20#define SDIO_CLASS_ATA 0x08 /* Embedded SDIO-ATA std interface */
21
22
23#endif
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index 0c522e6b0917..74523d999f7a 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -340,6 +340,17 @@ struct parisc_device_id {
340#define PA_HVERSION_ANY_ID 0xffff 340#define PA_HVERSION_ANY_ID 0xffff
341#define PA_SVERSION_ANY_ID 0xffffffff 341#define PA_SVERSION_ANY_ID 0xffffffff
342 342
343/* SDIO */
344
345#define SDIO_ANY_ID (~0)
346
347struct sdio_device_id {
348 __u8 class; /* Standard interface or SDIO_ANY_ID */
349 __u16 vendor; /* Vendor or SDIO_ANY_ID */
350 __u16 device; /* Device ID or SDIO_ANY_ID */
351 kernel_ulong_t driver_data; /* Data private to the driver */
352};
353
343/* SSB core, see drivers/ssb/ */ 354/* SSB core, see drivers/ssb/ */
344struct ssb_device_id { 355struct ssb_device_id {
345 __u16 vendor; 356 __u16 vendor;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 27363bf29791..8acae4eeaa76 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1471,6 +1471,8 @@
1471#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476 1471#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476
1472#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 1472#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478
1473#define PCI_DEVICE_ID_RICOH_R5C822 0x0822 1473#define PCI_DEVICE_ID_RICOH_R5C822 0x0822
1474#define PCI_DEVICE_ID_RICOH_R5C832 0x0832
1475#define PCI_DEVICE_ID_RICOH_R5C843 0x0843
1474 1476
1475#define PCI_VENDOR_ID_DLINK 0x1186 1477#define PCI_VENDOR_ID_DLINK 0x1186
1476#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 1478#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00
@@ -1736,6 +1738,11 @@
1736 1738
1737#define PCI_VENDOR_ID_RADISYS 0x1331 1739#define PCI_VENDOR_ID_RADISYS 0x1331
1738 1740
1741#define PCI_VENDOR_ID_MICRO_MEMORY 0x1332
1742#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN 0x5415
1743#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN 0x5425
1744#define PCI_DEVICE_ID_MICRO_MEMORY_6155 0x6155
1745
1739#define PCI_VENDOR_ID_DOMEX 0x134a 1746#define PCI_VENDOR_ID_DOMEX 0x134a
1740#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 1747#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
1741 1748
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
new file mode 100644
index 000000000000..e9bbe3ebd721
--- /dev/null
+++ b/include/linux/spi/mmc_spi.h
@@ -0,0 +1,33 @@
1#ifndef __LINUX_SPI_MMC_SPI_H
2#define __LINUX_SPI_MMC_SPI_H
3
4struct device;
5struct mmc_host;
6
7/* Put this in platform_data of a device being used to manage an MMC/SD
8 * card slot. (Modeled after PXA mmc glue; see that for usage examples.)
9 *
10 * REVISIT This is not a spi-specific notion. Any card slot should be
11 * able to handle it. If the MMC core doesn't adopt this kind of notion,
12 * switch the "struct device *" parameters over to "struct spi_device *".
13 */
14struct mmc_spi_platform_data {
15 /* driver activation and (optional) card detect irq hookup */
16 int (*init)(struct device *,
17 irqreturn_t (*)(int, void *),
18 void *);
19 void (*exit)(struct device *, void *);
20
21 /* sense switch on sd cards */
22 int (*get_ro)(struct device *);
23
24 /* how long to debounce card detect, in msecs */
25 u16 detect_delay;
26
27 /* power management */
28 u16 powerup_msecs; /* delay of up to 250 msec */
29 u32 ocr_mask; /* available voltages */
30 void (*setpower)(struct device *, unsigned int maskval);
31};
32
33#endif /* __LINUX_SPI_MMC_SPI_H */
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 665f85f2a3af..edf681a7fd8f 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -221,7 +221,7 @@ extern void swap_unplug_io_fn(struct backing_dev_info *, struct page *);
221/* linux/mm/page_io.c */ 221/* linux/mm/page_io.c */
222extern int swap_readpage(struct file *, struct page *); 222extern int swap_readpage(struct file *, struct page *);
223extern int swap_writepage(struct page *page, struct writeback_control *wbc); 223extern int swap_writepage(struct page *page, struct writeback_control *wbc);
224extern int end_swap_bio_read(struct bio *bio, unsigned int bytes_done, int err); 224extern void end_swap_bio_read(struct bio *bio, int err);
225 225
226/* linux/mm/swap_state.c */ 226/* linux/mm/swap_state.c */
227extern struct address_space swapper_space; 227extern struct address_space swapper_space;
diff --git a/include/linux/umem.h b/include/linux/umem.h
deleted file mode 100644
index f36ebfc32bf6..000000000000
--- a/include/linux/umem.h
+++ /dev/null
@@ -1,138 +0,0 @@
1
2/*
3 * This file contains defines for the
4 * Micro Memory MM5415
5 * family PCI Memory Module with Battery Backup.
6 *
7 * Copyright Micro Memory INC 2001. All rights reserved.
8 * Release under the terms of the GNU GENERAL PUBLIC LICENSE version 2.
9 * See the file COPYING.
10 */
11
12#ifndef _DRIVERS_BLOCK_MM_H
13#define _DRIVERS_BLOCK_MM_H
14
15
16#define IRQ_TIMEOUT (1 * HZ)
17
18/* CSR register definition */
19#define MEMCTRLSTATUS_MAGIC 0x00
20#define MM_MAGIC_VALUE (unsigned char)0x59
21
22#define MEMCTRLSTATUS_BATTERY 0x04
23#define BATTERY_1_DISABLED 0x01
24#define BATTERY_1_FAILURE 0x02
25#define BATTERY_2_DISABLED 0x04
26#define BATTERY_2_FAILURE 0x08
27
28#define MEMCTRLSTATUS_MEMORY 0x07
29#define MEM_128_MB 0xfe
30#define MEM_256_MB 0xfc
31#define MEM_512_MB 0xf8
32#define MEM_1_GB 0xf0
33#define MEM_2_GB 0xe0
34
35#define MEMCTRLCMD_LEDCTRL 0x08
36#define LED_REMOVE 2
37#define LED_FAULT 4
38#define LED_POWER 6
39#define LED_FLIP 255
40#define LED_OFF 0x00
41#define LED_ON 0x01
42#define LED_FLASH_3_5 0x02
43#define LED_FLASH_7_0 0x03
44#define LED_POWER_ON 0x00
45#define LED_POWER_OFF 0x01
46#define USER_BIT1 0x01
47#define USER_BIT2 0x02
48
49#define MEMORY_INITIALIZED USER_BIT1
50
51#define MEMCTRLCMD_ERRCTRL 0x0C
52#define EDC_NONE_DEFAULT 0x00
53#define EDC_NONE 0x01
54#define EDC_STORE_READ 0x02
55#define EDC_STORE_CORRECT 0x03
56
57#define MEMCTRLCMD_ERRCNT 0x0D
58#define MEMCTRLCMD_ERRSTATUS 0x0E
59
60#define ERROR_DATA_LOG 0x20
61#define ERROR_ADDR_LOG 0x28
62#define ERROR_COUNT 0x3D
63#define ERROR_SYNDROME 0x3E
64#define ERROR_CHECK 0x3F
65
66#define DMA_PCI_ADDR 0x40
67#define DMA_LOCAL_ADDR 0x48
68#define DMA_TRANSFER_SIZE 0x50
69#define DMA_DESCRIPTOR_ADDR 0x58
70#define DMA_SEMAPHORE_ADDR 0x60
71#define DMA_STATUS_CTRL 0x68
72#define DMASCR_GO 0x00001
73#define DMASCR_TRANSFER_READ 0x00002
74#define DMASCR_CHAIN_EN 0x00004
75#define DMASCR_SEM_EN 0x00010
76#define DMASCR_DMA_COMP_EN 0x00020
77#define DMASCR_CHAIN_COMP_EN 0x00040
78#define DMASCR_ERR_INT_EN 0x00080
79#define DMASCR_PARITY_INT_EN 0x00100
80#define DMASCR_ANY_ERR 0x00800
81#define DMASCR_MBE_ERR 0x01000
82#define DMASCR_PARITY_ERR_REP 0x02000
83#define DMASCR_PARITY_ERR_DET 0x04000
84#define DMASCR_SYSTEM_ERR_SIG 0x08000
85#define DMASCR_TARGET_ABT 0x10000
86#define DMASCR_MASTER_ABT 0x20000
87#define DMASCR_DMA_COMPLETE 0x40000
88#define DMASCR_CHAIN_COMPLETE 0x80000
89
90/*
913.SOME PCs HAVE HOST BRIDGES WHICH APPARENTLY DO NOT CORRECTLY HANDLE
92READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA
93TRANSFERS. IN OTHER SYSTEMS THESE COMMAND CODES WILL CAUSE THE HOST BRIDGE
94TO ALLOW LONGER BURSTS DURING DMA READ OPERATIONS. THE UPPER FOUR BITS
95(31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6,
96AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING
97DMA READ OPERATIONS.
98*/
99#define DMASCR_READ 0x60000000
100#define DMASCR_READLINE 0xE0000000
101#define DMASCR_READMULTI 0xC0000000
102
103
104#define DMASCR_ERROR_MASK (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR | DMASCR_ANY_ERR)
105#define DMASCR_HARD_ERROR (DMASCR_MASTER_ABT | DMASCR_TARGET_ABT | DMASCR_SYSTEM_ERR_SIG | DMASCR_PARITY_ERR_DET | DMASCR_MBE_ERR)
106
107#define WINDOWMAP_WINNUM 0x7B
108
109#define DMA_READ_FROM_HOST 0
110#define DMA_WRITE_TO_HOST 1
111
112struct mm_dma_desc {
113 __le64 pci_addr;
114 __le64 local_addr;
115 __le32 transfer_size;
116 u32 zero1;
117 __le64 next_desc_addr;
118 __le64 sem_addr;
119 __le32 control_bits;
120 u32 zero2;
121
122 dma_addr_t data_dma_handle;
123
124 /* Copy of the bits */
125 __le64 sem_control_bits;
126} __attribute__((aligned(8)));
127
128#define PCI_VENDOR_ID_MICRO_MEMORY 0x1332
129#define PCI_DEVICE_ID_MICRO_MEMORY_5415CN 0x5415
130#define PCI_DEVICE_ID_MICRO_MEMORY_5425CN 0x5425
131#define PCI_DEVICE_ID_MICRO_MEMORY_6155 0x6155
132
133/* bits for card->flags */
134#define UM_FLAG_DMA_IN_REGS 1
135#define UM_FLAG_NO_BYTE_STATUS 2
136#define UM_FLAG_NO_BATTREG 4
137#define UM_FLAG_NO_BATT 8
138#endif
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index ae9b24c12f6a..1f503e94eff1 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -271,6 +271,7 @@ struct v4l2_pix_format
271 271
272/* Pixel format FOURCC depth Description */ 272/* Pixel format FOURCC depth Description */
273#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R','G','B','1') /* 8 RGB-3-3-2 */ 273#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R','G','B','1') /* 8 RGB-3-3-2 */
274#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R','4','4','4') /* 16 xxxxrrrr ggggbbbb */
274#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R','G','B','O') /* 16 RGB-5-5-5 */ 275#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R','G','B','O') /* 16 RGB-5-5-5 */
275#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R','G','B','P') /* 16 RGB-5-6-5 */ 276#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R','G','B','P') /* 16 RGB-5-6-5 */
276#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16 RGB-5-5-5 BE */ 277#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16 RGB-5-5-5 BE */
@@ -280,6 +281,7 @@ struct v4l2_pix_format
280#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B','G','R','4') /* 32 BGR-8-8-8-8 */ 281#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B','G','R','4') /* 32 BGR-8-8-8-8 */
281#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R','G','B','4') /* 32 RGB-8-8-8-8 */ 282#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R','G','B','4') /* 32 RGB-8-8-8-8 */
282#define V4L2_PIX_FMT_GREY v4l2_fourcc('G','R','E','Y') /* 8 Greyscale */ 283#define V4L2_PIX_FMT_GREY v4l2_fourcc('G','R','E','Y') /* 8 Greyscale */
284#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P','A','L','8') /* 8 8-bit palette */
283#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y','V','U','9') /* 9 YVU 4:1:0 */ 285#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y','V','U','9') /* 9 YVU 4:1:0 */
284#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y','V','1','2') /* 12 YVU 4:2:0 */ 286#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y','V','1','2') /* 12 YVU 4:2:0 */
285#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y','U','Y','V') /* 16 YUV 4:2:2 */ 287#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y','U','Y','V') /* 16 YUV 4:2:2 */
@@ -287,6 +289,10 @@ struct v4l2_pix_format
287#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16 YVU422 planar */ 289#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16 YVU422 planar */
288#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16 YVU411 planar */ 290#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16 YVU411 planar */
289#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y','4','1','P') /* 12 YUV 4:1:1 */ 291#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y','4','1','P') /* 12 YUV 4:1:1 */
292#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y','4','4','4') /* 16 xxxxyyyy uuuuvvvv */
293#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y','U','V','O') /* 16 YUV-5-5-5 */
294#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y','U','V','P') /* 16 YUV-5-6-5 */
295#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y','U','V','4') /* 32 YUV-8-8-8-8 */
290 296
291/* two planes -- one Y, one Cr + Cb interleaved */ 297/* two planes -- one Y, one Cr + Cb interleaved */
292#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N','V','1','2') /* 12 Y/CbCr 4:2:0 */ 298#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N','V','1','2') /* 12 Y/CbCr 4:2:0 */
@@ -298,7 +304,6 @@ struct v4l2_pix_format
298#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */ 304#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */
299#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */ 305#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */
300#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H','M','1','2') /* 8 YUV 4:2:0 16x16 macroblocks */ 306#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H','M','1','2') /* 8 YUV 4:2:0 16x16 macroblocks */
301#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R','4','4','4') /* 16 xxxxrrrr ggggbbbb */
302 307
303/* see http://www.siliconimaging.com/RGB%20Bayer.htm */ 308/* see http://www.siliconimaging.com/RGB%20Bayer.htm */
304#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B','A','8','1') /* 8 BGBG.. GRGR.. */ 309#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B','A','8','1') /* 8 BGBG.. GRGR.. */
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index b4af6bcb7b7a..c7c3337c3a88 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -5,6 +5,7 @@
5#define WRITEBACK_H 5#define WRITEBACK_H
6 6
7#include <linux/sched.h> 7#include <linux/sched.h>
8#include <linux/fs.h>
8 9
9struct backing_dev_info; 10struct backing_dev_info;
10 11
diff --git a/include/media/cx2341x.h b/include/media/cx2341x.h
index 38c12fed7535..af8071d7620d 100644
--- a/include/media/cx2341x.h
+++ b/include/media/cx2341x.h
@@ -91,7 +91,7 @@ int cx2341x_update(void *priv, cx2341x_mbox_func func,
91int cx2341x_ctrl_query(struct cx2341x_mpeg_params *params, 91int cx2341x_ctrl_query(struct cx2341x_mpeg_params *params,
92 struct v4l2_queryctrl *qctrl); 92 struct v4l2_queryctrl *qctrl);
93const char **cx2341x_ctrl_get_menu(u32 id); 93const char **cx2341x_ctrl_get_menu(u32 id);
94int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, 94int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, int busy,
95 struct v4l2_ext_controls *ctrls, unsigned int cmd); 95 struct v4l2_ext_controls *ctrls, unsigned int cmd);
96void cx2341x_fill_defaults(struct cx2341x_mpeg_params *p); 96void cx2341x_fill_defaults(struct cx2341x_mpeg_params *p);
97void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix); 97void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix);
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index 9807a7c15830..7a785fa77212 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -140,6 +140,7 @@ extern IR_KEYTAB_TYPE ir_codes_budget_ci_old[IR_KEYTAB_SIZE];
140extern IR_KEYTAB_TYPE ir_codes_asus_pc39[IR_KEYTAB_SIZE]; 140extern IR_KEYTAB_TYPE ir_codes_asus_pc39[IR_KEYTAB_SIZE];
141extern IR_KEYTAB_TYPE ir_codes_encore_enltv[IR_KEYTAB_SIZE]; 141extern IR_KEYTAB_TYPE ir_codes_encore_enltv[IR_KEYTAB_SIZE];
142extern IR_KEYTAB_TYPE ir_codes_tt_1500[IR_KEYTAB_SIZE]; 142extern IR_KEYTAB_TYPE ir_codes_tt_1500[IR_KEYTAB_SIZE];
143extern IR_KEYTAB_TYPE ir_codes_fusionhdtv_mce[IR_KEYTAB_SIZE];
143 144
144#endif 145#endif
145 146
diff --git a/include/media/ivtv.h b/include/media/ivtv.h
deleted file mode 100644
index 412b48ea8eda..000000000000
--- a/include/media/ivtv.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 Public ivtv API header
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef _LINUX_IVTV_H
22#define _LINUX_IVTV_H
23
24/* ivtv knows several distinct output modes: MPEG streaming,
25 YUV streaming, YUV updates through user DMA and the passthrough
26 mode.
27
28 In order to clearly tell the driver that we are in user DMA
29 YUV mode you need to call IVTV_IOC_DMA_FRAME with y_source == NULL
30 first (althrough if you don't then the first time
31 DMA_FRAME is called the mode switch is done automatically).
32
33 When you close the file handle the user DMA mode is exited again.
34
35 While in one mode, you cannot use another mode (EBUSY is returned).
36
37 All this means that if you want to change the YUV interlacing
38 for the user DMA YUV mode you first need to do call IVTV_IOC_DMA_FRAME
39 with y_source == NULL before you can set the correct format using
40 VIDIOC_S_FMT.
41
42 Eventually all this should be replaced with a proper V4L2 API,
43 but for now we have to do it this way. */
44
45struct ivtv_dma_frame {
46 enum v4l2_buf_type type; /* V4L2_BUF_TYPE_VIDEO_OUTPUT */
47 __u32 pixelformat; /* 0 == same as destination */
48 void __user *y_source; /* if NULL and type == V4L2_BUF_TYPE_VIDEO_OUTPUT,
49 then just switch to user DMA YUV output mode */
50 void __user *uv_source; /* Unused for RGB pixelformats */
51 struct v4l2_rect src;
52 struct v4l2_rect dst;
53 __u32 src_width;
54 __u32 src_height;
55};
56
57#define IVTV_IOC_DMA_FRAME _IOW ('V', BASE_VIDIOC_PRIVATE+0, struct ivtv_dma_frame)
58
59/* These are the VBI types as they appear in the embedded VBI private packets. */
60#define IVTV_SLICED_TYPE_TELETEXT_B (1)
61#define IVTV_SLICED_TYPE_CAPTION_525 (4)
62#define IVTV_SLICED_TYPE_WSS_625 (5)
63#define IVTV_SLICED_TYPE_VPS (7)
64
65#endif /* _LINUX_IVTV_H */
diff --git a/include/media/saa7146.h b/include/media/saa7146.h
index 67703249b245..cd3ff2c29d5e 100644
--- a/include/media/saa7146.h
+++ b/include/media/saa7146.h
@@ -146,7 +146,6 @@ struct saa7146_dev
146 146
147/* from saa7146_i2c.c */ 147/* from saa7146_i2c.c */
148int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate); 148int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate);
149int saa7146_i2c_transfer(struct saa7146_dev *saa, const struct i2c_msg *msgs, int num, int retries);
150 149
151/* from saa7146_core.c */ 150/* from saa7146_core.c */
152extern struct list_head saa7146_devices; 151extern struct list_head saa7146_devices;
diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h
index cce20ed5cf6c..e49f7e156061 100644
--- a/include/media/saa7146_vv.h
+++ b/include/media/saa7146_vv.h
@@ -4,7 +4,7 @@
4#include <linux/videodev.h> 4#include <linux/videodev.h>
5#include <media/v4l2-common.h> 5#include <media/v4l2-common.h>
6#include <media/saa7146.h> 6#include <media/saa7146.h>
7#include <media/video-buf.h> 7#include <media/videobuf-dma-sg.h>
8 8
9#define MAX_SAA7146_CAPTURE_BUFFERS 32 /* arbitrary */ 9#define MAX_SAA7146_CAPTURE_BUFFERS 32 /* arbitrary */
10#define BUFFER_TIMEOUT (HZ/2) /* 0.5 seconds */ 10#define BUFFER_TIMEOUT (HZ/2) /* 0.5 seconds */
diff --git a/include/media/tuner-types.h b/include/media/tuner-types.h
index e5ad3fcfe984..b201371416a0 100644
--- a/include/media/tuner-types.h
+++ b/include/media/tuner-types.h
@@ -79,6 +79,10 @@ struct tuner_params {
79 /* Select 18% (or according to datasheet 0%) L standard PLL gating, 79 /* Select 18% (or according to datasheet 0%) L standard PLL gating,
80 vs the driver default of 36%. */ 80 vs the driver default of 36%. */
81 unsigned int default_pll_gating_18:1; 81 unsigned int default_pll_gating_18:1;
82 /* IF to use in radio mode. Tuners with a separate radio IF filter
83 seem to use 10.7, while those without use 33.3 for PAL/SECAM tuners
84 and 41.3 for NTSC tuners. 0 = 10.7, 1 = 33.3, 2 = 41.3 */
85 unsigned int radio_if:2;
82 /* Default tda9887 TOP value in dB for the low band. Default is 0. 86 /* Default tda9887 TOP value in dB for the low band. Default is 0.
83 Range: -16:+15 */ 87 Range: -16:+15 */
84 signed int default_top_low:5; 88 signed int default_top_low:5;
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 160381c72e4b..c03dceb92605 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -146,6 +146,7 @@ extern int tuner_debug;
146#define TDA9887_AUTOMUTE (1<<18) 146#define TDA9887_AUTOMUTE (1<<18)
147#define TDA9887_GATING_18 (1<<19) 147#define TDA9887_GATING_18 (1<<19)
148#define TDA9887_GAIN_NORMAL (1<<20) 148#define TDA9887_GAIN_NORMAL (1<<20)
149#define TDA9887_RIF_41_3 (1<<21) /* radio IF1 41.3 vs 33.3 */
149 150
150#ifdef __KERNEL__ 151#ifdef __KERNEL__
151 152
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h
index 09d16c4f00f7..8ae42c41dd08 100644
--- a/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@ -65,6 +65,9 @@ enum {
65 V4L2_IDENT_CX23415 = 415, 65 V4L2_IDENT_CX23415 = 415,
66 V4L2_IDENT_CX23416 = 416, 66 V4L2_IDENT_CX23416 = 416,
67 67
68 /* module vp27smpx: just ident 2700 */
69 V4L2_IDENT_VP27SMPX = 2700,
70
68 /* module wm8739: just ident 8739 */ 71 /* module wm8739: just ident 8739 */
69 V4L2_IDENT_WM8739 = 8739, 72 V4L2_IDENT_WM8739 = 8739,
70 73
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index 17f8f3a2f0a3..e75d5e6c4cea 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -23,8 +23,6 @@
23#include <linux/videodev2.h> 23#include <linux/videodev2.h>
24#endif 24#endif
25 25
26#include <linux/fs.h>
27
28#define VIDEO_MAJOR 81 26#define VIDEO_MAJOR 81
29/* Minor device allocation */ 27/* Minor device allocation */
30#define MINOR_VFL_TYPE_GRABBER_MIN 0 28#define MINOR_VFL_TYPE_GRABBER_MIN 0
@@ -88,8 +86,11 @@ struct video_device
88 /* device ops */ 86 /* device ops */
89 const struct file_operations *fops; 87 const struct file_operations *fops;
90 88
89 /* sysfs */
90 struct device class_dev; /* v4l device */
91 struct device *dev; /* device parent */
92
91 /* device info */ 93 /* device info */
92 struct device *dev;
93 char name[32]; 94 char name[32];
94 int type; /* v4l1 */ 95 int type; /* v4l1 */
95 int type2; /* v4l2 */ 96 int type2; /* v4l2 */
@@ -334,7 +335,6 @@ void *priv;
334 /* for videodev.c intenal usage -- please don't touch */ 335 /* for videodev.c intenal usage -- please don't touch */
335 int users; /* video_exclusive_{open|close} ... */ 336 int users; /* video_exclusive_{open|close} ... */
336 struct mutex lock; /* ... helper function uses these */ 337 struct mutex lock; /* ... helper function uses these */
337 struct class_device class_dev; /* sysfs */
338}; 338};
339 339
340/* Class-dev to video-device */ 340/* Class-dev to video-device */
@@ -362,18 +362,18 @@ extern int video_usercopy(struct inode *inode, struct file *file,
362 362
363static inline int __must_check 363static inline int __must_check
364video_device_create_file(struct video_device *vfd, 364video_device_create_file(struct video_device *vfd,
365 struct class_device_attribute *attr) 365 struct device_attribute *attr)
366{ 366{
367 int ret = class_device_create_file(&vfd->class_dev, attr); 367 int ret = device_create_file(&vfd->class_dev, attr);
368 if (ret < 0) 368 if (ret < 0)
369 printk(KERN_WARNING "%s error: %d\n", __FUNCTION__, ret); 369 printk(KERN_WARNING "%s error: %d\n", __FUNCTION__, ret);
370 return ret; 370 return ret;
371} 371}
372static inline void 372static inline void
373video_device_remove_file(struct video_device *vfd, 373video_device_remove_file(struct video_device *vfd,
374 struct class_device_attribute *attr) 374 struct device_attribute *attr)
375{ 375{
376 class_device_remove_file(&vfd->class_dev, attr); 376 device_remove_file(&vfd->class_dev, attr);
377} 377}
378 378
379#endif /* CONFIG_VIDEO_V4L1_COMPAT */ 379#endif /* CONFIG_VIDEO_V4L1_COMPAT */
diff --git a/include/media/v4l2-int-device.h b/include/media/v4l2-int-device.h
new file mode 100644
index 000000000000..066ebfc4f983
--- /dev/null
+++ b/include/media/v4l2-int-device.h
@@ -0,0 +1,278 @@
1/*
2 * include/media/v4l2-int-device.h
3 *
4 * V4L2 internal ioctl interface.
5 *
6 * Copyright (C) 2007 Nokia Corporation.
7 *
8 * Contact: Sakari Ailus <sakari.ailus@nokia.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 */
24
25#ifndef V4L2_INT_DEVICE_H
26#define V4L2_INT_DEVICE_H
27
28#include <linux/module.h>
29#include <media/v4l2-common.h>
30
31#define V4L2NAMESIZE 32
32
33/*
34 *
35 * The internal V4L2 device interface core.
36 *
37 */
38
39enum v4l2_int_type {
40 v4l2_int_type_master = 1,
41 v4l2_int_type_slave
42};
43
44struct v4l2_int_device;
45
46struct v4l2_int_master {
47 int (*attach)(struct v4l2_int_device *master,
48 struct v4l2_int_device *slave);
49 void (*detach)(struct v4l2_int_device *master);
50};
51
52typedef int (v4l2_int_ioctl_func)(struct v4l2_int_device *);
53typedef int (v4l2_int_ioctl_func_0)(struct v4l2_int_device *);
54typedef int (v4l2_int_ioctl_func_1)(struct v4l2_int_device *, void *);
55
56struct v4l2_int_ioctl_desc {
57 int num;
58 v4l2_int_ioctl_func *func;
59};
60
61struct v4l2_int_slave {
62 /* Don't touch master. */
63 struct v4l2_int_device *master;
64
65 char attach_to[V4L2NAMESIZE];
66
67 int num_ioctls;
68 struct v4l2_int_ioctl_desc *ioctls;
69};
70
71struct v4l2_int_device {
72 /* Don't touch head. */
73 struct list_head head;
74
75 struct module *module;
76
77 char name[V4L2NAMESIZE];
78
79 enum v4l2_int_type type;
80 union {
81 struct v4l2_int_master *master;
82 struct v4l2_int_slave *slave;
83 } u;
84
85 void *priv;
86};
87
88int v4l2_int_device_register(struct v4l2_int_device *d);
89void v4l2_int_device_unregister(struct v4l2_int_device *d);
90
91int v4l2_int_ioctl_0(struct v4l2_int_device *d, int cmd);
92int v4l2_int_ioctl_1(struct v4l2_int_device *d, int cmd, void *arg);
93
94/*
95 *
96 * Types and definitions for IOCTL commands.
97 *
98 */
99
100/* Slave interface type. */
101enum v4l2_if_type {
102 /*
103 * Parallel 8-, 10- or 12-bit interface, used by for example
104 * on certain image sensors.
105 */
106 V4L2_IF_TYPE_BT656,
107};
108
109enum v4l2_if_type_bt656_mode {
110 /*
111 * Modes without Bt synchronisation codes. Separate
112 * synchronisation signal lines are used.
113 */
114 V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT,
115 V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT,
116 V4L2_IF_TYPE_BT656_MODE_NOBT_12BIT,
117 /*
118 * Use Bt synchronisation codes. The vertical and horizontal
119 * synchronisation is done based on synchronisation codes.
120 */
121 V4L2_IF_TYPE_BT656_MODE_BT_8BIT,
122 V4L2_IF_TYPE_BT656_MODE_BT_10BIT,
123};
124
125struct v4l2_if_type_bt656 {
126 /*
127 * 0: Frame begins when vsync is high.
128 * 1: Frame begins when vsync changes from low to high.
129 */
130 unsigned frame_start_on_rising_vs:1;
131 /* Use Bt synchronisation codes for sync correction. */
132 unsigned bt_sync_correct:1;
133 /* Swap every two adjacent image data elements. */
134 unsigned swap:1;
135 /* Inverted latch clock polarity from slave. */
136 unsigned latch_clk_inv:1;
137 /* Hs polarity. 0 is active high, 1 active low. */
138 unsigned nobt_hs_inv:1;
139 /* Vs polarity. 0 is active high, 1 active low. */
140 unsigned nobt_vs_inv:1;
141 enum v4l2_if_type_bt656_mode mode;
142 /* Minimum accepted bus clock for slave (in Hz). */
143 u32 clock_min;
144 /* Maximum accepted bus clock for slave. */
145 u32 clock_max;
146 /*
147 * Current wish of the slave. May only change in response to
148 * ioctls that affect image capture.
149 */
150 u32 clock_curr;
151};
152
153struct v4l2_ifparm {
154 enum v4l2_if_type if_type;
155 union {
156 struct v4l2_if_type_bt656 bt656;
157 } u;
158};
159
160/* IOCTL command numbers. */
161enum v4l2_int_ioctl_num {
162 /*
163 *
164 * "Proper" V4L ioctls, as in struct video_device.
165 *
166 */
167 vidioc_int_enum_fmt_cap_num = 1,
168 vidioc_int_g_fmt_cap_num,
169 vidioc_int_s_fmt_cap_num,
170 vidioc_int_try_fmt_cap_num,
171 vidioc_int_queryctrl_num,
172 vidioc_int_g_ctrl_num,
173 vidioc_int_s_ctrl_num,
174 vidioc_int_g_parm_num,
175 vidioc_int_s_parm_num,
176
177 /*
178 *
179 * Strictly internal ioctls.
180 *
181 */
182 /* Initialise the device when slave attaches to the master. */
183 vidioc_int_dev_init_num = 1000,
184 /* Delinitialise the device at slave detach. */
185 vidioc_int_dev_exit_num,
186 /* Set device power state: 0 is off, non-zero is on. */
187 vidioc_int_s_power_num,
188 /* Get slave interface parameters. */
189 vidioc_int_g_ifparm_num,
190 /* Does the slave need to be reset after VIDIOC_DQBUF? */
191 vidioc_int_g_needs_reset_num,
192
193 /*
194 *
195 * VIDIOC_INT_* ioctls.
196 *
197 */
198 /* VIDIOC_INT_RESET */
199 vidioc_int_reset_num,
200 /* VIDIOC_INT_INIT */
201 vidioc_int_init_num,
202 /* VIDIOC_INT_G_CHIP_IDENT */
203 vidioc_int_g_chip_ident_num,
204
205 /*
206 *
207 * Start of private ioctls.
208 *
209 */
210 vidioc_int_priv_start_num = 2000,
211};
212
213/*
214 *
215 * IOCTL wrapper functions for better type checking.
216 *
217 */
218
219#define V4L2_INT_WRAPPER_0(name) \
220 static inline int vidioc_int_##name(struct v4l2_int_device *d) \
221 { \
222 return v4l2_int_ioctl_0(d, vidioc_int_##name##_num); \
223 } \
224 \
225 static inline struct v4l2_int_ioctl_desc \
226 vidioc_int_##name##_cb(int (*func) \
227 (struct v4l2_int_device *)) \
228 { \
229 struct v4l2_int_ioctl_desc desc; \
230 \
231 desc.num = vidioc_int_##name##_num; \
232 desc.func = (v4l2_int_ioctl_func *)func; \
233 \
234 return desc; \
235 }
236
237#define V4L2_INT_WRAPPER_1(name, arg_type, asterisk) \
238 static inline int vidioc_int_##name(struct v4l2_int_device *d, \
239 arg_type asterisk arg) \
240 { \
241 return v4l2_int_ioctl_1(d, vidioc_int_##name##_num, \
242 (void *)(unsigned long)arg); \
243 } \
244 \
245 static inline struct v4l2_int_ioctl_desc \
246 vidioc_int_##name##_cb(int (*func) \
247 (struct v4l2_int_device *, \
248 arg_type asterisk)) \
249 { \
250 struct v4l2_int_ioctl_desc desc; \
251 \
252 desc.num = vidioc_int_##name##_num; \
253 desc.func = (v4l2_int_ioctl_func *)func; \
254 \
255 return desc; \
256 }
257
258V4L2_INT_WRAPPER_1(enum_fmt_cap, struct v4l2_fmtdesc, *);
259V4L2_INT_WRAPPER_1(g_fmt_cap, struct v4l2_format, *);
260V4L2_INT_WRAPPER_1(s_fmt_cap, struct v4l2_format, *);
261V4L2_INT_WRAPPER_1(try_fmt_cap, struct v4l2_format, *);
262V4L2_INT_WRAPPER_1(queryctrl, struct v4l2_queryctrl, *);
263V4L2_INT_WRAPPER_1(g_ctrl, struct v4l2_control, *);
264V4L2_INT_WRAPPER_1(s_ctrl, struct v4l2_control, *);
265V4L2_INT_WRAPPER_1(g_parm, struct v4l2_streamparm, *);
266V4L2_INT_WRAPPER_1(s_parm, struct v4l2_streamparm, *);
267
268V4L2_INT_WRAPPER_0(dev_init);
269V4L2_INT_WRAPPER_0(dev_exit);
270V4L2_INT_WRAPPER_1(s_power, int, );
271V4L2_INT_WRAPPER_1(g_ifparm, struct v4l2_ifparm, *);
272V4L2_INT_WRAPPER_1(g_needs_reset, void, *);
273
274V4L2_INT_WRAPPER_0(reset);
275V4L2_INT_WRAPPER_0(init);
276V4L2_INT_WRAPPER_1(g_chip_ident, int, *);
277
278#endif
diff --git a/include/media/video-buf.h b/include/media/video-buf.h
deleted file mode 100644
index d6f079476db3..000000000000
--- a/include/media/video-buf.h
+++ /dev/null
@@ -1,289 +0,0 @@
1/*
2 *
3 * generic helper functions for video4linux capture buffers, to handle
4 * memory management and PCI DMA.
5 * Right now, bttv, saa7134, saa7146 and cx88 use it.
6 *
7 * The functions expect the hardware being able to scatter gatter
8 * (i.e. the buffers are not linear in physical memory, but fragmented
9 * into PAGE_SIZE chunks). They also assume the driver does not need
10 * to touch the video data.
11 *
12 * device specific map/unmap/sync stuff now are mapped as file operations
13 * to allow its usage by USB and virtual devices.
14 *
15 * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org>
16 * (c) 2006 Mauro Carvalho Chehab, <mchehab@infradead.org>
17 * (c) 2006 Ted Walther and John Sokol
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 */
24
25#include <linux/videodev2.h>
26#include <linux/poll.h>
27
28#define UNSET (-1U)
29
30/* --------------------------------------------------------------------- */
31
32/*
33 * Return a scatterlist for some page-aligned vmalloc()'ed memory
34 * block (NULL on errors). Memory for the scatterlist is allocated
35 * using kmalloc. The caller must free the memory.
36 */
37struct scatterlist* videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages);
38
39/*
40 * Return a scatterlist for a an array of userpages (NULL on errors).
41 * Memory for the scatterlist is allocated using kmalloc. The caller
42 * must free the memory.
43 */
44struct scatterlist* videobuf_pages_to_sg(struct page **pages, int nr_pages,
45 int offset);
46
47struct videobuf_buffer;
48struct videobuf_queue;
49
50/* --------------------------------------------------------------------- */
51
52/*
53 * A small set of helper functions to manage buffers (both userland
54 * and kernel) for DMA.
55 *
56 * videobuf_dma_init_*()
57 * creates a buffer. The userland version takes a userspace
58 * pointer + length. The kernel version just wants the size and
59 * does memory allocation too using vmalloc_32().
60 *
61 * videobuf_dma_*()
62 * see Documentation/DMA-mapping.txt, these functions to
63 * basically the same. The map function does also build a
64 * scatterlist for the buffer (and unmap frees it ...)
65 *
66 * videobuf_dma_free()
67 * no comment ...
68 *
69 */
70
71struct videobuf_dmabuf {
72 u32 magic;
73
74 /* for userland buffer */
75 int offset;
76 struct page **pages;
77
78 /* for kernel buffers */
79 void *vmalloc;
80
81 /* Stores the userspace pointer to vmalloc area */
82 void *varea;
83
84 /* for overlay buffers (pci-pci dma) */
85 dma_addr_t bus_addr;
86
87 /* common */
88 struct scatterlist *sglist;
89 int sglen;
90 int nr_pages;
91 int direction;
92};
93
94void videobuf_dma_init(struct videobuf_dmabuf *dma);
95int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
96 unsigned long data, unsigned long size);
97int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
98 int nr_pages);
99int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
100 dma_addr_t addr, int nr_pages);
101int videobuf_dma_free(struct videobuf_dmabuf *dma);
102
103int videobuf_dma_map(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
104int videobuf_dma_sync(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
105int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
106
107 /*FIXME: these variants are used only on *-alsa code, where videobuf is
108 * used without queue
109 */
110int videobuf_pci_dma_map(struct pci_dev *pci,struct videobuf_dmabuf *dma);
111int videobuf_pci_dma_unmap(struct pci_dev *pci,struct videobuf_dmabuf *dma);
112
113/* --------------------------------------------------------------------- */
114
115/*
116 * A small set of helper functions to manage video4linux buffers.
117 *
118 * struct videobuf_buffer holds the data structures used by the helper
119 * functions, additionally some commonly used fields for v4l buffers
120 * (width, height, lists, waitqueue) are in there. That struct should
121 * be used as first element in the drivers buffer struct.
122 *
123 * about the mmap helpers (videobuf_mmap_*):
124 *
125 * The mmaper function allows to map any subset of contingous buffers.
126 * This includes one mmap() call for all buffers (which the original
127 * video4linux API uses) as well as one mmap() for every single buffer
128 * (which v4l2 uses).
129 *
130 * If there is a valid mapping for a buffer, buffer->baddr/bsize holds
131 * userspace address + size which can be feeded into the
132 * videobuf_dma_init_user function listed above.
133 *
134 */
135
136struct videobuf_mapping {
137 unsigned int count;
138 unsigned long start;
139 unsigned long end;
140 struct videobuf_queue *q;
141};
142
143enum videobuf_state {
144 STATE_NEEDS_INIT = 0,
145 STATE_PREPARED = 1,
146 STATE_QUEUED = 2,
147 STATE_ACTIVE = 3,
148 STATE_DONE = 4,
149 STATE_ERROR = 5,
150 STATE_IDLE = 6,
151};
152
153struct videobuf_buffer {
154 unsigned int i;
155 u32 magic;
156
157 /* info about the buffer */
158 unsigned int width;
159 unsigned int height;
160 unsigned int bytesperline; /* use only if != 0 */
161 unsigned long size;
162 unsigned int input;
163 enum v4l2_field field;
164 enum videobuf_state state;
165 struct videobuf_dmabuf dma;
166 struct list_head stream; /* QBUF/DQBUF list */
167
168 /* for mmap'ed buffers */
169 enum v4l2_memory memory;
170 size_t boff; /* buffer offset (mmap + overlay) */
171 size_t bsize; /* buffer size */
172 unsigned long baddr; /* buffer addr (userland ptr!) */
173 struct videobuf_mapping *map;
174
175 /* touched by irq handler */
176 struct list_head queue;
177 wait_queue_head_t done;
178 unsigned int field_count;
179 struct timeval ts;
180};
181
182typedef int (vb_map_sg_t)(void *dev,struct scatterlist *sglist,int nr_pages,
183 int direction);
184
185
186struct videobuf_queue_ops {
187 int (*buf_setup)(struct videobuf_queue *q,
188 unsigned int *count, unsigned int *size);
189 int (*buf_prepare)(struct videobuf_queue *q,
190 struct videobuf_buffer *vb,
191 enum v4l2_field field);
192 void (*buf_queue)(struct videobuf_queue *q,
193 struct videobuf_buffer *vb);
194 void (*buf_release)(struct videobuf_queue *q,
195 struct videobuf_buffer *vb);
196
197 /* Helper operations - device dependent.
198 * If null, videobuf_init defaults all to PCI handling
199 */
200
201 vb_map_sg_t *vb_map_sg;
202 vb_map_sg_t *vb_dma_sync_sg;
203 vb_map_sg_t *vb_unmap_sg;
204};
205
206struct videobuf_queue {
207 struct mutex lock;
208 spinlock_t *irqlock;
209 void *dev; /* on pci, points to struct pci_dev */
210
211 enum v4l2_buf_type type;
212 unsigned int inputs; /* for V4L2_BUF_FLAG_INPUT */
213 unsigned int msize;
214 enum v4l2_field field;
215 enum v4l2_field last; /* for field=V4L2_FIELD_ALTERNATE */
216 struct videobuf_buffer *bufs[VIDEO_MAX_FRAME];
217 struct videobuf_queue_ops *ops;
218
219 /* capture via mmap() + ioctl(QBUF/DQBUF) */
220 unsigned int streaming;
221 struct list_head stream;
222
223 /* capture via read() */
224 unsigned int reading;
225 unsigned int read_off;
226 struct videobuf_buffer *read_buf;
227
228 /* driver private data */
229 void *priv_data;
230};
231
232void* videobuf_alloc(unsigned int size);
233int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr);
234int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
235 struct v4l2_framebuffer *fbuf);
236
237/* Maps fops to PCI stuff */
238void videobuf_queue_pci(struct videobuf_queue* q);
239
240void videobuf_queue_init(struct videobuf_queue *q,
241 struct videobuf_queue_ops *ops,
242 void *dev,
243 spinlock_t *irqlock,
244 enum v4l2_buf_type type,
245 enum v4l2_field field,
246 unsigned int msize,
247 void *priv);
248int videobuf_queue_is_busy(struct videobuf_queue *q);
249void videobuf_queue_cancel(struct videobuf_queue *q);
250
251enum v4l2_field videobuf_next_field(struct videobuf_queue *q);
252void videobuf_status(struct v4l2_buffer *b, struct videobuf_buffer *vb,
253 enum v4l2_buf_type type);
254int videobuf_reqbufs(struct videobuf_queue *q,
255 struct v4l2_requestbuffers *req);
256int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b);
257int videobuf_qbuf(struct videobuf_queue *q,
258 struct v4l2_buffer *b);
259int videobuf_dqbuf(struct videobuf_queue *q,
260 struct v4l2_buffer *b, int nonblocking);
261int videobuf_streamon(struct videobuf_queue *q);
262int videobuf_streamoff(struct videobuf_queue *q);
263
264int videobuf_read_start(struct videobuf_queue *q);
265void videobuf_read_stop(struct videobuf_queue *q);
266ssize_t videobuf_read_stream(struct videobuf_queue *q,
267 char __user *data, size_t count, loff_t *ppos,
268 int vbihack, int nonblocking);
269ssize_t videobuf_read_one(struct videobuf_queue *q,
270 char __user *data, size_t count, loff_t *ppos,
271 int nonblocking);
272unsigned int videobuf_poll_stream(struct file *file,
273 struct videobuf_queue *q,
274 poll_table *wait);
275
276int videobuf_mmap_setup(struct videobuf_queue *q,
277 unsigned int bcount, unsigned int bsize,
278 enum v4l2_memory memory);
279int videobuf_mmap_free(struct videobuf_queue *q);
280int videobuf_mmap_mapper(struct videobuf_queue *q,
281 struct vm_area_struct *vma);
282
283/* --------------------------------------------------------------------- */
284
285/*
286 * Local variables:
287 * c-basic-offset: 8
288 * End:
289 */
diff --git a/include/media/videobuf-core.h b/include/media/videobuf-core.h
new file mode 100644
index 000000000000..9fa09fb800a1
--- /dev/null
+++ b/include/media/videobuf-core.h
@@ -0,0 +1,236 @@
1/*
2 * generic helper functions for handling video4linux capture buffers
3 *
4 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
5 *
6 * Highly based on video-buf written originally by:
7 * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org>
8 * (c) 2006 Mauro Carvalho Chehab, <mchehab@infradead.org>
9 * (c) 2006 Ted Walther and John Sokol
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2
14 */
15
16#include <linux/poll.h>
17#ifdef CONFIG_VIDEO_V4L1_COMPAT
18#include <linux/videodev.h>
19#endif
20#include <linux/videodev2.h>
21
22#define UNSET (-1U)
23
24
25struct videobuf_buffer;
26struct videobuf_queue;
27
28/* --------------------------------------------------------------------- */
29
30/*
31 * A small set of helper functions to manage video4linux buffers.
32 *
33 * struct videobuf_buffer holds the data structures used by the helper
34 * functions, additionally some commonly used fields for v4l buffers
35 * (width, height, lists, waitqueue) are in there. That struct should
36 * be used as first element in the drivers buffer struct.
37 *
38 * about the mmap helpers (videobuf_mmap_*):
39 *
40 * The mmaper function allows to map any subset of contingous buffers.
41 * This includes one mmap() call for all buffers (which the original
42 * video4linux API uses) as well as one mmap() for every single buffer
43 * (which v4l2 uses).
44 *
45 * If there is a valid mapping for a buffer, buffer->baddr/bsize holds
46 * userspace address + size which can be feeded into the
47 * videobuf_dma_init_user function listed above.
48 *
49 */
50
51struct videobuf_mapping {
52 unsigned int count;
53 unsigned long start;
54 unsigned long end;
55 struct videobuf_queue *q;
56};
57
58enum videobuf_state {
59 STATE_NEEDS_INIT = 0,
60 STATE_PREPARED = 1,
61 STATE_QUEUED = 2,
62 STATE_ACTIVE = 3,
63 STATE_DONE = 4,
64 STATE_ERROR = 5,
65 STATE_IDLE = 6,
66};
67
68struct videobuf_buffer {
69 unsigned int i;
70 u32 magic;
71
72 /* info about the buffer */
73 unsigned int width;
74 unsigned int height;
75 unsigned int bytesperline; /* use only if != 0 */
76 unsigned long size;
77 unsigned int input;
78 enum v4l2_field field;
79 enum videobuf_state state;
80 struct list_head stream; /* QBUF/DQBUF list */
81
82 /* touched by irq handler */
83 struct list_head queue;
84 wait_queue_head_t done;
85 unsigned int field_count;
86 struct timeval ts;
87
88 /* Memory type */
89 enum v4l2_memory memory;
90
91 /* buffer size */
92 size_t bsize;
93
94 /* buffer offset (mmap + overlay) */
95 size_t boff;
96
97 /* buffer addr (userland ptr!) */
98 unsigned long baddr;
99
100 /* for mmap'ed buffers */
101 struct videobuf_mapping *map;
102
103 /* Private pointer to allow specific methods to store their data */
104 int privsize;
105 void *priv;
106};
107
108struct videobuf_queue_ops {
109 int (*buf_setup)(struct videobuf_queue *q,
110 unsigned int *count, unsigned int *size);
111 int (*buf_prepare)(struct videobuf_queue *q,
112 struct videobuf_buffer *vb,
113 enum v4l2_field field);
114 void (*buf_queue)(struct videobuf_queue *q,
115 struct videobuf_buffer *vb);
116 void (*buf_release)(struct videobuf_queue *q,
117 struct videobuf_buffer *vb);
118};
119
120#define MAGIC_QTYPE_OPS 0x12261003
121
122/* Helper operations - device type dependent */
123struct videobuf_qtype_ops {
124 u32 magic;
125
126 void* (*alloc) (size_t size);
127 int (*iolock) (struct videobuf_queue* q,
128 struct videobuf_buffer *vb,
129 struct v4l2_framebuffer *fbuf);
130 int (*mmap) (struct videobuf_queue *q,
131 unsigned int *count,
132 unsigned int *size,
133 enum v4l2_memory memory);
134 int (*sync) (struct videobuf_queue* q,
135 struct videobuf_buffer *buf);
136 int (*copy_to_user) (struct videobuf_queue *q,
137 char __user *data,
138 size_t count,
139 int nonblocking);
140 int (*copy_stream) (struct videobuf_queue *q,
141 char __user *data,
142 size_t count,
143 size_t pos,
144 int vbihack,
145 int nonblocking);
146 int (*mmap_free) (struct videobuf_queue *q);
147 int (*mmap_mapper) (struct videobuf_queue *q,
148 struct vm_area_struct *vma);
149};
150
151struct videobuf_queue {
152 struct mutex lock;
153 spinlock_t *irqlock;
154 void *dev; /* on pci, points to struct pci_dev */
155
156 enum v4l2_buf_type type;
157 unsigned int inputs; /* for V4L2_BUF_FLAG_INPUT */
158 unsigned int msize;
159 enum v4l2_field field;
160 enum v4l2_field last; /* for field=V4L2_FIELD_ALTERNATE */
161 struct videobuf_buffer *bufs[VIDEO_MAX_FRAME];
162 struct videobuf_queue_ops *ops;
163 struct videobuf_qtype_ops *int_ops;
164
165 /* capture via mmap() + ioctl(QBUF/DQBUF) */
166 unsigned int streaming;
167 struct list_head stream;
168
169 /* capture via read() */
170 unsigned int reading;
171 unsigned int read_off;
172 struct videobuf_buffer *read_buf;
173
174 /* driver private data */
175 void *priv_data;
176};
177
178int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr);
179int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb,
180 struct v4l2_framebuffer *fbuf);
181
182void *videobuf_alloc(struct videobuf_queue* q);
183
184void videobuf_queue_core_init(struct videobuf_queue *q,
185 struct videobuf_queue_ops *ops,
186 void *dev,
187 spinlock_t *irqlock,
188 enum v4l2_buf_type type,
189 enum v4l2_field field,
190 unsigned int msize,
191 void *priv,
192 struct videobuf_qtype_ops *int_ops);
193int videobuf_queue_is_busy(struct videobuf_queue *q);
194void videobuf_queue_cancel(struct videobuf_queue *q);
195
196enum v4l2_field videobuf_next_field(struct videobuf_queue *q);
197int videobuf_reqbufs(struct videobuf_queue *q,
198 struct v4l2_requestbuffers *req);
199int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b);
200int videobuf_qbuf(struct videobuf_queue *q,
201 struct v4l2_buffer *b);
202int videobuf_dqbuf(struct videobuf_queue *q,
203 struct v4l2_buffer *b, int nonblocking);
204#ifdef CONFIG_VIDEO_V4L1_COMPAT
205int videobuf_cgmbuf(struct videobuf_queue *q,
206 struct video_mbuf *mbuf, int count);
207#endif
208int videobuf_streamon(struct videobuf_queue *q);
209int videobuf_streamoff(struct videobuf_queue *q);
210
211int videobuf_read_start(struct videobuf_queue *q);
212void videobuf_read_stop(struct videobuf_queue *q);
213ssize_t videobuf_read_stream(struct videobuf_queue *q,
214 char __user *data, size_t count, loff_t *ppos,
215 int vbihack, int nonblocking);
216ssize_t videobuf_read_one(struct videobuf_queue *q,
217 char __user *data, size_t count, loff_t *ppos,
218 int nonblocking);
219unsigned int videobuf_poll_stream(struct file *file,
220 struct videobuf_queue *q,
221 poll_table *wait);
222
223int videobuf_mmap_setup(struct videobuf_queue *q,
224 unsigned int bcount, unsigned int bsize,
225 enum v4l2_memory memory);
226int videobuf_mmap_free(struct videobuf_queue *q);
227int videobuf_mmap_mapper(struct videobuf_queue *q,
228 struct vm_area_struct *vma);
229
230/* --------------------------------------------------------------------- */
231
232/*
233 * Local variables:
234 * c-basic-offset: 8
235 * End:
236 */
diff --git a/include/media/videobuf-dma-sg.h b/include/media/videobuf-dma-sg.h
new file mode 100644
index 000000000000..38105031db23
--- /dev/null
+++ b/include/media/videobuf-dma-sg.h
@@ -0,0 +1,122 @@
1/*
2 * helper functions for PCI DMA video4linux capture buffers
3 *
4 * The functions expect the hardware being able to scatter gatter
5 * (i.e. the buffers are not linear in physical memory, but fragmented
6 * into PAGE_SIZE chunks). They also assume the driver does not need
7 * to touch the video data.
8 *
9 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
10 *
11 * Highly based on video-buf written originally by:
12 * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org>
13 * (c) 2006 Mauro Carvalho Chehab, <mchehab@infradead.org>
14 * (c) 2006 Ted Walther and John Sokol
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2
19 */
20
21#include <media/videobuf-core.h>
22
23/* --------------------------------------------------------------------- */
24
25/*
26 * Return a scatterlist for some page-aligned vmalloc()'ed memory
27 * block (NULL on errors). Memory for the scatterlist is allocated
28 * using kmalloc. The caller must free the memory.
29 */
30struct scatterlist* videobuf_vmalloc_to_sg(unsigned char *virt, int nr_pages);
31
32/*
33 * Return a scatterlist for a an array of userpages (NULL on errors).
34 * Memory for the scatterlist is allocated using kmalloc. The caller
35 * must free the memory.
36 */
37struct scatterlist* videobuf_pages_to_sg(struct page **pages, int nr_pages,
38 int offset);
39
40/* --------------------------------------------------------------------- */
41
42/*
43 * A small set of helper functions to manage buffers (both userland
44 * and kernel) for DMA.
45 *
46 * videobuf_dma_init_*()
47 * creates a buffer. The userland version takes a userspace
48 * pointer + length. The kernel version just wants the size and
49 * does memory allocation too using vmalloc_32().
50 *
51 * videobuf_dma_*()
52 * see Documentation/DMA-mapping.txt, these functions to
53 * basically the same. The map function does also build a
54 * scatterlist for the buffer (and unmap frees it ...)
55 *
56 * videobuf_dma_free()
57 * no comment ...
58 *
59 */
60
61struct videobuf_dmabuf {
62 u32 magic;
63
64 /* for userland buffer */
65 int offset;
66 struct page **pages;
67
68 /* for kernel buffers */
69 void *vmalloc;
70
71 /* Stores the userspace pointer to vmalloc area */
72 void *varea;
73
74 /* for overlay buffers (pci-pci dma) */
75 dma_addr_t bus_addr;
76
77 /* common */
78 struct scatterlist *sglist;
79 int sglen;
80 int nr_pages;
81 int direction;
82};
83
84struct videbuf_pci_sg_memory
85{
86 u32 magic;
87
88 /* for mmap'ed buffers */
89 struct videobuf_dmabuf dma;
90};
91
92void videobuf_dma_init(struct videobuf_dmabuf *dma);
93int videobuf_dma_init_user(struct videobuf_dmabuf *dma, int direction,
94 unsigned long data, unsigned long size);
95int videobuf_dma_init_kernel(struct videobuf_dmabuf *dma, int direction,
96 int nr_pages);
97int videobuf_dma_init_overlay(struct videobuf_dmabuf *dma, int direction,
98 dma_addr_t addr, int nr_pages);
99int videobuf_dma_free(struct videobuf_dmabuf *dma);
100
101int videobuf_dma_map(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
102int videobuf_dma_sync(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
103int videobuf_dma_unmap(struct videobuf_queue* q,struct videobuf_dmabuf *dma);
104struct videobuf_dmabuf *videobuf_to_dma (struct videobuf_buffer *buf);
105
106void *videobuf_pci_alloc (size_t size);
107
108void videobuf_queue_pci_init(struct videobuf_queue* q,
109 struct videobuf_queue_ops *ops,
110 void *dev,
111 spinlock_t *irqlock,
112 enum v4l2_buf_type type,
113 enum v4l2_field field,
114 unsigned int msize,
115 void *priv);
116
117 /*FIXME: these variants are used only on *-alsa code, where videobuf is
118 * used without queue
119 */
120int videobuf_pci_dma_map(struct pci_dev *pci,struct videobuf_dmabuf *dma);
121int videobuf_pci_dma_unmap(struct pci_dev *pci,struct videobuf_dmabuf *dma);
122
diff --git a/include/media/video-buf-dvb.h b/include/media/videobuf-dvb.h
index 8233cafdeef6..8233cafdeef6 100644
--- a/include/media/video-buf-dvb.h
+++ b/include/media/videobuf-dvb.h
diff --git a/include/media/videobuf-vmalloc.h b/include/media/videobuf-vmalloc.h
new file mode 100644
index 000000000000..26a8958d23d1
--- /dev/null
+++ b/include/media/videobuf-vmalloc.h
@@ -0,0 +1,41 @@
1/*
2 * helper functions for vmalloc capture buffers
3 *
4 * The functions expect the hardware being able to scatter gatter
5 * (i.e. the buffers are not linear in physical memory, but fragmented
6 * into PAGE_SIZE chunks). They also assume the driver does not need
7 * to touch the video data.
8 *
9 * (c) 2007 Mauro Carvalho Chehab, <mchehab@infradead.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2
14 */
15
16#include <media/videobuf-core.h>
17
18/* --------------------------------------------------------------------- */
19
20struct videbuf_vmalloc_memory
21{
22 u32 magic;
23
24 void *vmalloc;
25
26 /* remap_vmalloc_range seems to need to run after mmap() on some cases */
27 struct vm_area_struct *vma;
28};
29
30void videobuf_queue_vmalloc_init(struct videobuf_queue* q,
31 struct videobuf_queue_ops *ops,
32 void *dev,
33 spinlock_t *irqlock,
34 enum v4l2_buf_type type,
35 enum v4l2_field field,
36 unsigned int msize,
37 void *priv);
38
39void *videobuf_to_vmalloc (struct videobuf_buffer *buf);
40
41void videobuf_vmalloc_free (struct videobuf_buffer *buf);
diff --git a/kernel/sched.c b/kernel/sched.c
index 6107a0cd6325..6c10fa796ca0 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -61,6 +61,7 @@
61#include <linux/delayacct.h> 61#include <linux/delayacct.h>
62#include <linux/reciprocal_div.h> 62#include <linux/reciprocal_div.h>
63#include <linux/unistd.h> 63#include <linux/unistd.h>
64#include <linux/pagemap.h>
64 65
65#include <asm/tlb.h> 66#include <asm/tlb.h>
66 67
diff --git a/mm/bounce.c b/mm/bounce.c
index 179fe38a2416..3b549bf31f7d 100644
--- a/mm/bounce.c
+++ b/mm/bounce.c
@@ -140,26 +140,19 @@ static void bounce_end_io(struct bio *bio, mempool_t *pool, int err)
140 mempool_free(bvec->bv_page, pool); 140 mempool_free(bvec->bv_page, pool);
141 } 141 }
142 142
143 bio_endio(bio_orig, bio_orig->bi_size, err); 143 bio_endio(bio_orig, err);
144 bio_put(bio); 144 bio_put(bio);
145} 145}
146 146
147static int bounce_end_io_write(struct bio *bio, unsigned int bytes_done, int err) 147static void bounce_end_io_write(struct bio *bio, int err)
148{ 148{
149 if (bio->bi_size)
150 return 1;
151
152 bounce_end_io(bio, page_pool, err); 149 bounce_end_io(bio, page_pool, err);
153 return 0;
154} 150}
155 151
156static int bounce_end_io_write_isa(struct bio *bio, unsigned int bytes_done, int err) 152static void bounce_end_io_write_isa(struct bio *bio, int err)
157{ 153{
158 if (bio->bi_size)
159 return 1;
160 154
161 bounce_end_io(bio, isa_page_pool, err); 155 bounce_end_io(bio, isa_page_pool, err);
162 return 0;
163} 156}
164 157
165static void __bounce_end_io_read(struct bio *bio, mempool_t *pool, int err) 158static void __bounce_end_io_read(struct bio *bio, mempool_t *pool, int err)
@@ -172,22 +165,14 @@ static void __bounce_end_io_read(struct bio *bio, mempool_t *pool, int err)
172 bounce_end_io(bio, pool, err); 165 bounce_end_io(bio, pool, err);
173} 166}
174 167
175static int bounce_end_io_read(struct bio *bio, unsigned int bytes_done, int err) 168static void bounce_end_io_read(struct bio *bio, int err)
176{ 169{
177 if (bio->bi_size)
178 return 1;
179
180 __bounce_end_io_read(bio, page_pool, err); 170 __bounce_end_io_read(bio, page_pool, err);
181 return 0;
182} 171}
183 172
184static int bounce_end_io_read_isa(struct bio *bio, unsigned int bytes_done, int err) 173static void bounce_end_io_read_isa(struct bio *bio, int err)
185{ 174{
186 if (bio->bi_size)
187 return 1;
188
189 __bounce_end_io_read(bio, isa_page_pool, err); 175 __bounce_end_io_read(bio, isa_page_pool, err);
190 return 0;
191} 176}
192 177
193static void __blk_queue_bounce(struct request_queue *q, struct bio **bio_orig, 178static void __blk_queue_bounce(struct request_queue *q, struct bio **bio_orig,
diff --git a/mm/page_io.c b/mm/page_io.c
index dbffec0d78c9..3b97f6850273 100644
--- a/mm/page_io.c
+++ b/mm/page_io.c
@@ -44,14 +44,11 @@ static struct bio *get_swap_bio(gfp_t gfp_flags, pgoff_t index,
44 return bio; 44 return bio;
45} 45}
46 46
47static int end_swap_bio_write(struct bio *bio, unsigned int bytes_done, int err) 47static void end_swap_bio_write(struct bio *bio, int err)
48{ 48{
49 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 49 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
50 struct page *page = bio->bi_io_vec[0].bv_page; 50 struct page *page = bio->bi_io_vec[0].bv_page;
51 51
52 if (bio->bi_size)
53 return 1;
54
55 if (!uptodate) { 52 if (!uptodate) {
56 SetPageError(page); 53 SetPageError(page);
57 /* 54 /*
@@ -71,17 +68,13 @@ static int end_swap_bio_write(struct bio *bio, unsigned int bytes_done, int err)
71 } 68 }
72 end_page_writeback(page); 69 end_page_writeback(page);
73 bio_put(bio); 70 bio_put(bio);
74 return 0;
75} 71}
76 72
77int end_swap_bio_read(struct bio *bio, unsigned int bytes_done, int err) 73void end_swap_bio_read(struct bio *bio, int err)
78{ 74{
79 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); 75 const int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags);
80 struct page *page = bio->bi_io_vec[0].bv_page; 76 struct page *page = bio->bi_io_vec[0].bv_page;
81 77
82 if (bio->bi_size)
83 return 1;
84
85 if (!uptodate) { 78 if (!uptodate) {
86 SetPageError(page); 79 SetPageError(page);
87 ClearPageUptodate(page); 80 ClearPageUptodate(page);
@@ -94,7 +87,6 @@ int end_swap_bio_read(struct bio *bio, unsigned int bytes_done, int err)
94 } 87 }
95 unlock_page(page); 88 unlock_page(page);
96 bio_put(bio); 89 bio_put(bio);
97 return 0;
98} 90}
99 91
100/* 92/*
diff --git a/mm/readahead.c b/mm/readahead.c
index 39bf45d43320..be20c9d699d3 100644
--- a/mm/readahead.c
+++ b/mm/readahead.c
@@ -15,6 +15,7 @@
15#include <linux/backing-dev.h> 15#include <linux/backing-dev.h>
16#include <linux/task_io_accounting_ops.h> 16#include <linux/task_io_accounting_ops.h>
17#include <linux/pagevec.h> 17#include <linux/pagevec.h>
18#include <linux/pagemap.h>
18 19
19void default_unplug_io_fn(struct backing_dev_info *bdi, struct page *page) 20void default_unplug_io_fn(struct backing_dev_info *bdi, struct page *page)
20{ 21{
diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
index f7844f6aa487..663158627155 100755
--- a/scripts/checkstack.pl
+++ b/scripts/checkstack.pl
@@ -12,6 +12,7 @@
12# sh64 port by Paul Mundt 12# sh64 port by Paul Mundt
13# Random bits by Matt Mackall <mpm@selenic.com> 13# Random bits by Matt Mackall <mpm@selenic.com>
14# M68k port by Geert Uytterhoeven and Andreas Schwab 14# M68k port by Geert Uytterhoeven and Andreas Schwab
15# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
15# 16#
16# Usage: 17# Usage:
17# objdump -d vmlinux | stackcheck.pl [arch] 18# objdump -d vmlinux | stackcheck.pl [arch]
@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
37 if ($arch eq 'arm') { 38 if ($arch eq 'arm') {
38 #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 39 #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64
39 $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; 40 $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
41 } elsif ($arch eq 'avr32') {
42 #8000008a: 20 1d sub sp,4
43 #80000ca8: fa cd 05 b0 sub sp,sp,1456
44 $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
40 } elsif ($arch =~ /^i[3456]86$/) { 45 } elsif ($arch =~ /^i[3456]86$/) {
41 #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp 46 #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp
42 $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; 47 $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o;
diff --git a/scripts/checksyscalls.sh b/scripts/checksyscalls.sh
index 0dcc01ce45a6..366f8c7f62bf 100755
--- a/scripts/checksyscalls.sh
+++ b/scripts/checksyscalls.sh
@@ -119,5 +119,5 @@ sed -n -e '/^\#define/ { s/[^_]*__NR_\([^[:space:]]*\).*/\
119\#endif/p }' $1 119\#endif/p }' $1
120} 120}
121 121
122(ignore_list && syscall_list ${srctree}/include/asm-i386/unistd.h) | \ 122(ignore_list && syscall_list ${srctree}/include/asm-x86/unistd_32.h) | \
123$* -E -x c - > /dev/null 123$* -E -x c - > /dev/null
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index 895ba3ac6208..36e3754db53a 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -484,6 +484,21 @@ static int do_parisc_entry(const char *filename, struct parisc_device_id *id,
484 return 1; 484 return 1;
485} 485}
486 486
487/* Looks like: sdio:cNvNdN. */
488static int do_sdio_entry(const char *filename,
489 struct sdio_device_id *id, char *alias)
490{
491 id->class = TO_NATIVE(id->class);
492 id->vendor = TO_NATIVE(id->vendor);
493 id->device = TO_NATIVE(id->device);
494
495 strcpy(alias, "sdio:");
496 ADD(alias, "c", id->class != (__u8)SDIO_ANY_ID, id->class);
497 ADD(alias, "v", id->vendor != (__u16)SDIO_ANY_ID, id->vendor);
498 ADD(alias, "d", id->device != (__u16)SDIO_ANY_ID, id->device);
499 return 1;
500}
501
487/* Looks like: ssb:vNidNrevN. */ 502/* Looks like: ssb:vNidNrevN. */
488static int do_ssb_entry(const char *filename, 503static int do_ssb_entry(const char *filename,
489 struct ssb_device_id *id, char *alias) 504 struct ssb_device_id *id, char *alias)
@@ -614,6 +629,10 @@ void handle_moddevtable(struct module *mod, struct elf_info *info,
614 do_table(symval, sym->st_size, 629 do_table(symval, sym->st_size,
615 sizeof(struct parisc_device_id), "parisc", 630 sizeof(struct parisc_device_id), "parisc",
616 do_parisc_entry, mod); 631 do_parisc_entry, mod);
632 else if (sym_is(symname, "__mod_sdio_device_table"))
633 do_table(symval, sym->st_size,
634 sizeof(struct sdio_device_id), "sdio",
635 do_sdio_entry, mod);
617 else if (sym_is(symname, "__mod_ssb_device_table")) 636 else if (sym_is(symname, "__mod_ssb_device_table"))
618 do_table(symval, sym->st_size, 637 do_table(symval, sym->st_size,
619 sizeof(struct ssb_device_id), "ssb", 638 sizeof(struct ssb_device_id), "ssb",
diff --git a/scripts/namespace.pl b/scripts/namespace.pl
index f34373853ef8..c6e88c652c2f 100755
--- a/scripts/namespace.pl
+++ b/scripts/namespace.pl
@@ -105,7 +105,7 @@ sub linux_objects
105 if (/.*\.o$/ && 105 if (/.*\.o$/ &&
106 ! ( 106 ! (
107 m:/built-in.o$: 107 m:/built-in.o$:
108 || m:arch/i386/kernel/vsyscall-syms.o$: 108 || m:arch/x86/kernel/vsyscall-syms.o$:
109 || m:arch/ia64/ia32/ia32.o$: 109 || m:arch/ia64/ia32/ia32.o$:
110 || m:arch/ia64/kernel/gate-syms.o$: 110 || m:arch/ia64/kernel/gate-syms.o$:
111 || m:arch/ia64/lib/__divdi3.o$: 111 || m:arch/ia64/lib/__divdi3.o$:
@@ -328,9 +328,9 @@ sub list_multiply_defined
328 } 328 }
329 # Special case for i386 entry code 329 # Special case for i386 entry code
330 if ($#{$def{$name}} == 1 && $name =~ /^__kernel_/ && 330 if ($#{$def{$name}} == 1 && $name =~ /^__kernel_/ &&
331 $def{$name}[0] eq "arch/i386/kernel/vsyscall-int80.o" && 331 $def{$name}[0] eq "arch/x86/kernel/vsyscall-int80_32.o" &&
332 $def{$name}[1] eq "arch/i386/kernel/vsyscall-sysenter.o") { 332 $def{$name}[1] eq "arch/x86/kernel/vsyscall-sysenter_32.o") {
333 &drop_def("arch/i386/kernel/vsyscall-sysenter.o", $name); 333 &drop_def("arch/x86/kernel/vsyscall-sysenter_32.o", $name);
334 next; 334 next;
335 } 335 }
336 printf "$name is multiply defined in :-\n"; 336 printf "$name is multiply defined in :-\n";