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-rw-r--r--Documentation/hwmon/it871
-rw-r--r--drivers/hwmon/it87.c20
2 files changed, 16 insertions, 5 deletions
diff --git a/Documentation/hwmon/it87 b/Documentation/hwmon/it87
index 659315d98e00..f9ba96c0ac4a 100644
--- a/Documentation/hwmon/it87
+++ b/Documentation/hwmon/it87
@@ -86,7 +86,6 @@ The IT8712F and IT8716F additionally feature VID inputs, used to report
86the Vcore voltage of the processor. The early IT8712F have 5 VID pins, 86the Vcore voltage of the processor. The early IT8712F have 5 VID pins,
87the IT8716F and late IT8712F have 6. They are shared with other functions 87the IT8716F and late IT8712F have 6. They are shared with other functions
88though, so the functionality may not be available on a given system. 88though, so the functionality may not be available on a given system.
89The driver dumbly assume it is there.
90 89
91The IT8718F and IT8720F also features VID inputs (up to 8 pins) but the value 90The IT8718F and IT8720F also features VID inputs (up to 8 pins) but the value
92is stored in the Super-I/O configuration space. Due to technical limitations, 91is stored in the Super-I/O configuration space. Due to technical limitations,
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index a3749cb0f181..2f782e3f9a2b 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -124,6 +124,7 @@ superio_exit(void)
124#define IT87_BASE_REG 0x60 124#define IT87_BASE_REG 0x60
125 125
126/* Logical device 7 registers (IT8712F and later) */ 126/* Logical device 7 registers (IT8712F and later) */
127#define IT87_SIO_GPIO3_REG 0x27
127#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ 128#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
128#define IT87_SIO_VID_REG 0xfc /* VID value */ 129#define IT87_SIO_VID_REG 0xfc /* VID value */
129 130
@@ -244,6 +245,7 @@ struct it87_sio_data {
244 /* Values read from Super-I/O config space */ 245 /* Values read from Super-I/O config space */
245 u8 revision; 246 u8 revision;
246 u8 vid_value; 247 u8 vid_value;
248 u8 skip_vid;
247 /* Values set based on DMI strings */ 249 /* Values set based on DMI strings */
248 u8 skip_pwm; 250 u8 skip_pwm;
249}; 251};
@@ -1028,11 +1030,22 @@ static int __init it87_find(unsigned short *address,
1028 chip_type, *address, sio_data->revision); 1030 chip_type, *address, sio_data->revision);
1029 1031
1030 /* Read GPIO config and VID value from LDN 7 (GPIO) */ 1032 /* Read GPIO config and VID value from LDN 7 (GPIO) */
1031 if (sio_data->type != it87) { 1033 if (sio_data->type == it87) {
1034 /* The IT8705F doesn't have VID pins at all */
1035 sio_data->skip_vid = 1;
1036 } else {
1032 int reg; 1037 int reg;
1033 1038
1034 superio_select(GPIO); 1039 superio_select(GPIO);
1035 if (sio_data->type == it8718 || sio_data->type == it8720) 1040 /* We need at least 4 VID pins */
1041 reg = superio_inb(IT87_SIO_GPIO3_REG);
1042 if (reg & 0x0f) {
1043 pr_info("it87: VID is disabled (pins used for GPIO)\n");
1044 sio_data->skip_vid = 1;
1045 }
1046
1047 if ((sio_data->type == it8718 || sio_data->type == it8720)
1048 && !(sio_data->skip_vid))
1036 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 1049 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1037 1050
1038 reg = superio_inb(IT87_SIO_PINX2_REG); 1051 reg = superio_inb(IT87_SIO_PINX2_REG);
@@ -1236,8 +1249,7 @@ static int __devinit it87_probe(struct platform_device *pdev)
1236 } 1249 }
1237 } 1250 }
1238 1251
1239 if (data->type == it8712 || data->type == it8716 1252 if (!sio_data->skip_vid) {
1240 || data->type == it8718 || data->type == it8720) {
1241 data->vrm = vid_which_vrm(); 1253 data->vrm = vid_which_vrm();
1242 /* VID reading from Super-I/O config space if available */ 1254 /* VID reading from Super-I/O config space if available */
1243 data->vid = sio_data->vid_value; 1255 data->vid = sio_data->vid_value;