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-rw-r--r--arch/arm/mach-pxa/generic.c2
-rw-r--r--arch/arm/mach-pxa/gpio.c14
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h74
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa-regs.h72
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h2
-rw-r--r--arch/arm/mach-pxa/lpd270.c1
-rw-r--r--arch/arm/mach-pxa/lubbock.c1
-rw-r--r--arch/arm/mach-pxa/mainstone.c1
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c3
9 files changed, 83 insertions, 87 deletions
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index dc870dd93697..3126a35aa002 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -26,8 +26,8 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28 28
29#include <mach/pxa-regs.h>
30#include <mach/reset.h> 29#include <mach/reset.h>
30#include <mach/gpio.h>
31#include <mach/pxa2xx-gpio.h> 31#include <mach/pxa2xx-gpio.h>
32 32
33#include "generic.h" 33#include "generic.h"
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index c9d9c702c7d5..9a33eb07fe0a 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -18,16 +18,12 @@
18#include <linux/sysdev.h> 18#include <linux/sysdev.h>
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <asm/gpio.h> 21#include <mach/gpio.h>
22#include <mach/hardware.h>
23#include <mach/pxa-regs.h>
24 22
25#include "generic.h" 23#define GPIO0_BASE (GPIO_REGS_VIRT + 0x0000)
26 24#define GPIO1_BASE (GPIO_REGS_VIRT + 0x0004)
27#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000)) 25#define GPIO2_BASE (GPIO_REGS_VIRT + 0x0008)
28#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004)) 26#define GPIO3_BASE (GPIO_REGS_VIRT + 0x0100)
29#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
30#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
31 27
32#define GPLR_OFFSET 0x00 28#define GPLR_OFFSET 0x00
33#define GPDR_OFFSET 0x0C 29#define GPDR_OFFSET 0x0C
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index c7ac3d62d34d..be4900ea32da 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -24,12 +24,80 @@
24#ifndef __ASM_ARCH_PXA_GPIO_H 24#ifndef __ASM_ARCH_PXA_GPIO_H
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <mach/pxa-regs.h> 27#include <mach/irqs.h>
28#include <asm/irq.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30
31#include <asm-generic/gpio.h> 29#include <asm-generic/gpio.h>
32 30
31#define GPIO_REGS_VIRT io_p2v(0x40E00000)
32
33#define BANK_OFF(n) (((n) > 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
35
36/* GPIO Pin Level Registers */
37#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
38#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
39#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
40#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
41
42/* GPIO Pin Direction Registers */
43#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
44#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
45#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
46#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
47
48/* GPIO Pin Output Set Registers */
49#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
50#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
51#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
52#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
53
54/* GPIO Pin Output Clear Registers */
55#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
56#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
57#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
58#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
59
60/* GPIO Rising Edge Detect Registers */
61#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
62#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
63#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
64#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
65
66/* GPIO Falling Edge Detect Registers */
67#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
68#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
69#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
70#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
71
72/* GPIO Edge Detect Status Registers */
73#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
74#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
75#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
76#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
77
78/* GPIO Alternate Function Select Registers */
79#define GAFR0_L GPIO_REG(0x0054)
80#define GAFR0_U GPIO_REG(0x0058)
81#define GAFR1_L GPIO_REG(0x005C)
82#define GAFR1_U GPIO_REG(0x0060)
83#define GAFR2_L GPIO_REG(0x0064)
84#define GAFR2_U GPIO_REG(0x0068)
85#define GAFR3_L GPIO_REG(0x006C)
86#define GAFR3_U GPIO_REG(0x0070)
87
88/* More handy macros. The argument is a literal GPIO number. */
89
90#define GPIO_bit(x) (1 << ((x) & 0x1f))
91
92#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
93#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
94#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
95#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
96#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
97#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
98#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
100
33 101
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). 102/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space. 103 * Those cases currently cause holes in the GPIO number space.
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 7d8db197615c..f06122262fe7 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -129,76 +129,4 @@
129#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ 129#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
130#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ 130#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
131 131
132/*
133 * General Purpose I/O
134 */
135
136#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */
137#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */
138#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */
139
140#define GPDR0 __REG(0x40E0000C) /* GPIO Pin Direction Register GPIO<31:0> */
141#define GPDR1 __REG(0x40E00010) /* GPIO Pin Direction Register GPIO<63:32> */
142#define GPDR2 __REG(0x40E00014) /* GPIO Pin Direction Register GPIO<80:64> */
143
144#define GPSR0 __REG(0x40E00018) /* GPIO Pin Output Set Register GPIO<31:0> */
145#define GPSR1 __REG(0x40E0001C) /* GPIO Pin Output Set Register GPIO<63:32> */
146#define GPSR2 __REG(0x40E00020) /* GPIO Pin Output Set Register GPIO<80:64> */
147
148#define GPCR0 __REG(0x40E00024) /* GPIO Pin Output Clear Register GPIO<31:0> */
149#define GPCR1 __REG(0x40E00028) /* GPIO Pin Output Clear Register GPIO <63:32> */
150#define GPCR2 __REG(0x40E0002C) /* GPIO Pin Output Clear Register GPIO <80:64> */
151
152#define GRER0 __REG(0x40E00030) /* GPIO Rising-Edge Detect Register GPIO<31:0> */
153#define GRER1 __REG(0x40E00034) /* GPIO Rising-Edge Detect Register GPIO<63:32> */
154#define GRER2 __REG(0x40E00038) /* GPIO Rising-Edge Detect Register GPIO<80:64> */
155
156#define GFER0 __REG(0x40E0003C) /* GPIO Falling-Edge Detect Register GPIO<31:0> */
157#define GFER1 __REG(0x40E00040) /* GPIO Falling-Edge Detect Register GPIO<63:32> */
158#define GFER2 __REG(0x40E00044) /* GPIO Falling-Edge Detect Register GPIO<80:64> */
159
160#define GEDR0 __REG(0x40E00048) /* GPIO Edge Detect Status Register GPIO<31:0> */
161#define GEDR1 __REG(0x40E0004C) /* GPIO Edge Detect Status Register GPIO<63:32> */
162#define GEDR2 __REG(0x40E00050) /* GPIO Edge Detect Status Register GPIO<80:64> */
163
164#define GAFR0_L __REG(0x40E00054) /* GPIO Alternate Function Select Register GPIO<15:0> */
165#define GAFR0_U __REG(0x40E00058) /* GPIO Alternate Function Select Register GPIO<31:16> */
166#define GAFR1_L __REG(0x40E0005C) /* GPIO Alternate Function Select Register GPIO<47:32> */
167#define GAFR1_U __REG(0x40E00060) /* GPIO Alternate Function Select Register GPIO<63:48> */
168#define GAFR2_L __REG(0x40E00064) /* GPIO Alternate Function Select Register GPIO<79:64> */
169#define GAFR2_U __REG(0x40E00068) /* GPIO Alternate Function Select Register GPIO<95-80> */
170#define GAFR3_L __REG(0x40E0006C) /* GPIO Alternate Function Select Register GPIO<111:96> */
171#define GAFR3_U __REG(0x40E00070) /* GPIO Alternate Function Select Register GPIO<127:112> */
172
173#define GPLR3 __REG(0x40E00100) /* GPIO Pin-Level Register GPIO<127:96> */
174#define GPDR3 __REG(0x40E0010C) /* GPIO Pin Direction Register GPIO<127:96> */
175#define GPSR3 __REG(0x40E00118) /* GPIO Pin Output Set Register GPIO<127:96> */
176#define GPCR3 __REG(0x40E00124) /* GPIO Pin Output Clear Register GPIO<127:96> */
177#define GRER3 __REG(0x40E00130) /* GPIO Rising-Edge Detect Register GPIO<127:96> */
178#define GFER3 __REG(0x40E0013C) /* GPIO Falling-Edge Detect Register GPIO<127:96> */
179#define GEDR3 __REG(0x40E00148) /* GPIO Edge Detect Status Register GPIO<127:96> */
180
181/* More handy macros. The argument is a literal GPIO number. */
182
183#define GPIO_bit(x) (1 << ((x) & 0x1f))
184
185#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
186#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3)
187#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3)
188#define _GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3)
189#define _GRER(x) __REG2(0x40E00030, ((x) & 0x60) >> 3)
190#define _GFER(x) __REG2(0x40E0003C, ((x) & 0x60) >> 3)
191#define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3)
192#define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2)
193
194#define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3))
195#define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3))
196#define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3))
197#define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3))
198#define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3))
199#define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3))
200#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
201#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
202 ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
203
204#endif 132#endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
index d83393e25273..1209c44aa6f1 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
@@ -3,6 +3,8 @@
3 3
4#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h 4#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h
5 5
6#include <mach/gpio.h>
7
6/* GPIO alternate function assignments */ 8/* GPIO alternate function assignments */
7 9
8#define GPIO1_RST 1 /* reset */ 10#define GPIO1_RST 1 /* reset */
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 5ca9c5c4807e..d64395f26a3e 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -39,6 +39,7 @@
39#include <asm/mach/flash.h> 39#include <asm/mach/flash.h>
40 40
41#include <mach/pxa27x.h> 41#include <mach/pxa27x.h>
42#include <mach/gpio.h>
42#include <mach/lpd270.h> 43#include <mach/lpd270.h>
43#include <mach/audio.h> 44#include <mach/audio.h>
44#include <mach/pxafb.h> 45#include <mach/pxafb.h>
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index e0c264a1f436..03a43ea148a9 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -42,6 +42,7 @@
42#include <asm/hardware/sa1111.h> 42#include <asm/hardware/sa1111.h>
43 43
44#include <mach/pxa25x.h> 44#include <mach/pxa25x.h>
45#include <mach/gpio.h>
45#include <mach/audio.h> 46#include <mach/audio.h>
46#include <mach/lubbock.h> 47#include <mach/lubbock.h>
47#include <mach/udc.h> 48#include <mach/udc.h>
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 673f838f8f02..a6c8429e975f 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -42,6 +42,7 @@
42#include <asm/mach/flash.h> 42#include <asm/mach/flash.h>
43 43
44#include <mach/pxa27x.h> 44#include <mach/pxa27x.h>
45#include <mach/gpio.h>
45#include <mach/mainstone.h> 46#include <mach/mainstone.h>
46#include <mach/audio.h> 47#include <mach/audio.h>
47#include <mach/pxafb.h> 48#include <mach/pxafb.h>
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 33626de8cbf6..9d23b731d39b 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -18,8 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20 20
21#include <mach/hardware.h> 21#include <mach/gpio.h>
22#include <mach/pxa-regs.h>
23#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
24#include <mach/mfp-pxa2xx.h> 23#include <mach/mfp-pxa2xx.h>
25 24
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 01:19:43 -0500