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-rw-r--r--drivers/pci/quirks.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index a778c84d04a9..15a8ab7ea911 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2017,6 +2017,28 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
2017 PCI_DEVICE_ID_NX2_5709S, 2017 PCI_DEVICE_ID_NX2_5709S,
2018 quirk_brcm_570x_limit_vpd); 2018 quirk_brcm_570x_limit_vpd);
2019 2019
2020/* Originally in EDAC sources for i82875P:
2021 * Intel tells BIOS developers to hide device 6 which
2022 * configures the overflow device access containing
2023 * the DRBs - this is where we expose device 6.
2024 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
2025 */
2026static void __devinit quirk_unhide_mch_dev6(struct pci_dev *dev)
2027{
2028 u8 reg;
2029
2030 if (pci_read_config_byte(dev, 0xF4, &reg) == 0 && !(reg & 0x02)) {
2031 dev_info(&dev->dev, "Enabling MCH 'Overflow' Device\n");
2032 pci_write_config_byte(dev, 0xF4, reg | 0x02);
2033 }
2034}
2035
2036DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB,
2037 quirk_unhide_mch_dev6);
2038DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB,
2039 quirk_unhide_mch_dev6);
2040
2041
2020#ifdef CONFIG_PCI_MSI 2042#ifdef CONFIG_PCI_MSI
2021/* Some chipsets do not support MSI. We cannot easily rely on setting 2043/* Some chipsets do not support MSI. We cannot easily rely on setting
2022 * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually 2044 * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually