diff options
-rw-r--r-- | drivers/net/bfin_mac.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index 4006a5dea654..ee398196ea80 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c | |||
@@ -412,20 +412,26 @@ static void bf537_adjust_link(struct net_device *dev) | |||
412 | spin_unlock_irqrestore(&lp->lock, flags); | 412 | spin_unlock_irqrestore(&lp->lock, flags); |
413 | } | 413 | } |
414 | 414 | ||
415 | /* MDC = 2.5 MHz */ | ||
416 | #define MDC_CLK 2500000 | ||
417 | |||
415 | static int mii_probe(struct net_device *dev) | 418 | static int mii_probe(struct net_device *dev) |
416 | { | 419 | { |
417 | struct bf537mac_local *lp = netdev_priv(dev); | 420 | struct bf537mac_local *lp = netdev_priv(dev); |
418 | struct phy_device *phydev = NULL; | 421 | struct phy_device *phydev = NULL; |
419 | unsigned short sysctl; | 422 | unsigned short sysctl; |
420 | int i; | 423 | int i; |
424 | u32 sclk, mdc_div; | ||
421 | 425 | ||
422 | /* Enable PHY output early */ | 426 | /* Enable PHY output early */ |
423 | if (!(bfin_read_VR_CTL() & PHYCLKOE)) | 427 | if (!(bfin_read_VR_CTL() & PHYCLKOE)) |
424 | bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE); | 428 | bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE); |
425 | 429 | ||
426 | /* MDC = 2.5 MHz */ | 430 | sclk = get_sclk(); |
431 | mdc_div = ((sclk / MDC_CLK) / 2) - 1; | ||
432 | |||
427 | sysctl = bfin_read_EMAC_SYSCTL(); | 433 | sysctl = bfin_read_EMAC_SYSCTL(); |
428 | sysctl |= SET_MDCDIV(24); | 434 | sysctl |= SET_MDCDIV(mdc_div); |
429 | bfin_write_EMAC_SYSCTL(sysctl); | 435 | bfin_write_EMAC_SYSCTL(sysctl); |
430 | 436 | ||
431 | /* search for connect PHY device */ | 437 | /* search for connect PHY device */ |
@@ -477,8 +483,10 @@ static int mii_probe(struct net_device *dev) | |||
477 | lp->phydev = phydev; | 483 | lp->phydev = phydev; |
478 | 484 | ||
479 | printk(KERN_INFO "%s: attached PHY driver [%s] " | 485 | printk(KERN_INFO "%s: attached PHY driver [%s] " |
480 | "(mii_bus:phy_addr=%s, irq=%d)\n", | 486 | "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)" |
481 | DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq); | 487 | "@sclk=%dMHz)\n", |
488 | DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq, | ||
489 | MDC_CLK, mdc_div, sclk/1000000); | ||
482 | 490 | ||
483 | return 0; | 491 | return 0; |
484 | } | 492 | } |