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-rw-r--r--drivers/mmc/host/sdhci-of.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c
index 2b0756934f49..3439fc118904 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of.c
@@ -48,6 +48,8 @@ struct sdhci_of_host {
48#define ESDHC_CLOCK_HCKEN 0x00000002 48#define ESDHC_CLOCK_HCKEN 0x00000002
49#define ESDHC_CLOCK_IPGEN 0x00000001 49#define ESDHC_CLOCK_IPGEN 0x00000001
50 50
51#define ESDHC_HOST_CONTROL_RES 0x05
52
51static u32 esdhc_readl(struct sdhci_host *host, int reg) 53static u32 esdhc_readl(struct sdhci_host *host, int reg)
52{ 54{
53 return in_be32(host->ioaddr + reg); 55 return in_be32(host->ioaddr + reg);
@@ -109,6 +111,10 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
109 int base = reg & ~0x3; 111 int base = reg & ~0x3;
110 int shift = (reg & 0x3) * 8; 112 int shift = (reg & 0x3) * 8;
111 113
114 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
115 if (reg == SDHCI_HOST_CONTROL)
116 val &= ~ESDHC_HOST_CONTROL_RES;
117
112 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); 118 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
113} 119}
114 120