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-rw-r--r--Documentation/powerpc/dts-bindings/fsl/dma.txt34
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/esdhc.txt24
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/ssi.txt2
-rw-r--r--arch/powerpc/Kconfig74
-rw-r--r--arch/powerpc/Kconfig.debug2
-rw-r--r--arch/powerpc/Makefile4
-rw-r--r--arch/powerpc/boot/Makefile9
-rw-r--r--arch/powerpc/boot/cuboot-amigaone.c35
-rw-r--r--arch/powerpc/boot/dts/amigaone.dts173
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts28
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts49
-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts254
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts364
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts364
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts2
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts52
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts63
-rw-r--r--arch/powerpc/boot/dts/media5200.dts318
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts42
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts38
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_36b.dts787
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts2
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts182
-rw-r--r--arch/powerpc/boot/dts/pcm032.dts392
-rw-r--r--arch/powerpc/boot/dts/redwood.dts244
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts32
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts9
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts124
-rw-r--r--arch/powerpc/boot/serial.c3
-rwxr-xr-xarch/powerpc/boot/wrapper7
-rw-r--r--arch/powerpc/configs/44x/canyonlands_defconfig266
-rw-r--r--arch/powerpc/configs/44x/redwood_defconfig1176
-rw-r--r--arch/powerpc/configs/86xx/gef_ppc9a_defconfig1889
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc310_defconfig1613
-rw-r--r--arch/powerpc/configs/amigaone_defconfig1636
-rw-r--r--arch/powerpc/configs/mpc5200_defconfig71
-rw-r--r--arch/powerpc/include/asm/bootx.h2
-rw-r--r--arch/powerpc/include/asm/code-patching.h4
-rw-r--r--arch/powerpc/include/asm/cputable.h4
-rw-r--r--arch/powerpc/include/asm/dbell.h43
-rw-r--r--arch/powerpc/include/asm/elf.h14
-rw-r--r--arch/powerpc/include/asm/ftrace.h39
-rw-r--r--arch/powerpc/include/asm/highmem.h12
-rw-r--r--arch/powerpc/include/asm/hw_irq.h2
-rw-r--r--arch/powerpc/include/asm/io.h6
-rw-r--r--arch/powerpc/include/asm/kvm.h2
-rw-r--r--arch/powerpc/include/asm/machdep.h4
-rw-r--r--arch/powerpc/include/asm/mmu-44x.h2
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h (renamed from arch/powerpc/include/asm/mmu-fsl-booke.h)66
-rw-r--r--arch/powerpc/include/asm/mmu.h10
-rw-r--r--arch/powerpc/include/asm/mpc52xx.h1
-rw-r--r--arch/powerpc/include/asm/page.h6
-rw-r--r--arch/powerpc/include/asm/page_32.h4
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h410
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-4k.h (renamed from arch/powerpc/include/asm/pgtable-4k.h)55
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-64k.h42
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h116
-rw-r--r--arch/powerpc/include/asm/pgtable.h84
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h73
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h6
-rw-r--r--arch/powerpc/include/asm/ps3av.h2
-rw-r--r--arch/powerpc/include/asm/ps3fb.h1
-rw-r--r--arch/powerpc/include/asm/pte-40x.h64
-rw-r--r--arch/powerpc/include/asm/pte-44x.h102
-rw-r--r--arch/powerpc/include/asm/pte-8xx.h64
-rw-r--r--arch/powerpc/include/asm/pte-fsl-booke.h48
-rw-r--r--arch/powerpc/include/asm/pte-hash32.h49
-rw-r--r--arch/powerpc/include/asm/pte-hash64-4k.h20
-rw-r--r--arch/powerpc/include/asm/pte-hash64-64k.h (renamed from arch/powerpc/include/asm/pgtable-64k.h)132
-rw-r--r--arch/powerpc/include/asm/pte-hash64.h47
-rw-r--r--arch/powerpc/include/asm/reg.h2
-rw-r--r--arch/powerpc/include/asm/reg_booke.h2
-rw-r--r--arch/powerpc/include/asm/spu_info.h3
-rw-r--r--arch/powerpc/include/asm/swab.h2
-rw-r--r--arch/powerpc/include/asm/system.h2
-rw-r--r--arch/powerpc/include/asm/thread_info.h11
-rw-r--r--arch/powerpc/include/asm/udbg.h1
-rw-r--r--arch/powerpc/kernel/Makefile12
-rw-r--r--arch/powerpc/kernel/align.c2
-rw-r--r--arch/powerpc/kernel/asm-offsets.c3
-rw-r--r--arch/powerpc/kernel/cpu_setup_44x.S1
-rw-r--r--arch/powerpc/kernel/cpu_setup_fsl_booke.S31
-rw-r--r--arch/powerpc/kernel/cputable.c157
-rw-r--r--arch/powerpc/kernel/crash_dump.c2
-rw-r--r--arch/powerpc/kernel/dbell.c44
-rw-r--r--arch/powerpc/kernel/entry_32.S129
-rw-r--r--arch/powerpc/kernel/entry_64.S89
-rw-r--r--arch/powerpc/kernel/ftrace.c222
-rw-r--r--arch/powerpc/kernel/head_32.S7
-rw-r--r--arch/powerpc/kernel/head_64.S6
-rw-r--r--arch/powerpc/kernel/head_booke.h19
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S101
-rw-r--r--arch/powerpc/kernel/irq.c4
-rw-r--r--arch/powerpc/kernel/module_64.c2
-rw-r--r--arch/powerpc/kernel/pci-common.c43
-rw-r--r--arch/powerpc/kernel/pci_32.c36
-rw-r--r--arch/powerpc/kernel/pci_64.c19
-rw-r--r--arch/powerpc/kernel/process.c58
-rw-r--r--arch/powerpc/kernel/prom.c6
-rw-r--r--arch/powerpc/kernel/prom_init.c2
-rw-r--r--arch/powerpc/kernel/prom_init_check.sh2
-rw-r--r--arch/powerpc/kernel/rtas.c10
-rw-r--r--arch/powerpc/kernel/setup_64.c7
-rw-r--r--arch/powerpc/kernel/signal.h10
-rw-r--r--arch/powerpc/kernel/traps.c79
-rw-r--r--arch/powerpc/kernel/udbg.c7
-rw-r--r--arch/powerpc/kernel/udbg_16550.c60
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S1
-rw-r--r--arch/powerpc/lib/dma-noncoherent.c303
-rw-r--r--arch/powerpc/lib/feature-fixups.c4
-rw-r--r--arch/powerpc/math-emu/Makefile5
-rw-r--r--arch/powerpc/mm/Makefile4
-rw-r--r--arch/powerpc/mm/fault.c46
-rw-r--r--arch/powerpc/mm/fsl_booke_mmu.c95
-rw-r--r--arch/powerpc/mm/gup.c16
-rw-r--r--arch/powerpc/mm/hash_utils_64.c5
-rw-r--r--arch/powerpc/mm/mem.c33
-rw-r--r--arch/powerpc/mm/mmap.c64
-rw-r--r--arch/powerpc/mm/numa.c174
-rw-r--r--arch/powerpc/mm/pgtable.c131
-rw-r--r--arch/powerpc/mm/pgtable_32.c14
-rw-r--r--arch/powerpc/mm/pgtable_64.c25
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S44
-rw-r--r--arch/powerpc/oprofile/op_model_7450.c21
-rw-r--r--arch/powerpc/platforms/44x/Kconfig19
-rw-r--r--arch/powerpc/platforms/44x/ppc44x_simple.c1
-rw-r--r--arch/powerpc/platforms/512x/Kconfig4
-rw-r--r--arch/powerpc/platforms/52xx/Kconfig15
-rw-r--r--arch/powerpc/platforms/52xx/Makefile3
-rw-r--r--arch/powerpc/platforms/52xx/media5200.c273
-rw-r--r--arch/powerpc/platforms/52xx/mpc5200_simple.c4
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_common.c40
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_gpio.c85
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_gpt.c396
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c170
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/83xx/mpc831x_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c10
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/usb.c3
-rw-r--r--arch/powerpc/platforms/85xx/ksi8560.c2
-rw-r--r--arch/powerpc/platforms/85xx/smp.c43
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig20
-rw-r--r--arch/powerpc/platforms/86xx/Makefile2
-rw-r--r--arch/powerpc/platforms/86xx/gef_gpio.c36
-rw-r--r--arch/powerpc/platforms/86xx/gef_ppc9a.c223
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc310.c234
-rw-r--r--arch/powerpc/platforms/Kconfig37
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype22
-rw-r--r--arch/powerpc/platforms/Makefile1
-rw-r--r--arch/powerpc/platforms/amigaone/Kconfig18
-rw-r--r--arch/powerpc/platforms/amigaone/Makefile1
-rw-r--r--arch/powerpc/platforms/amigaone/setup.c170
-rw-r--r--arch/powerpc/platforms/cell/Kconfig33
-rw-r--r--arch/powerpc/platforms/cell/Makefile2
-rw-r--r--arch/powerpc/platforms/cell/io-workarounds.c4
-rw-r--r--arch/powerpc/platforms/cell/qpace_setup.c2
-rw-r--r--arch/powerpc/platforms/cell/spu_fault.c48
-rw-r--r--arch/powerpc/platforms/cell/spufs/context.c4
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c20
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c5
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c3
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h8
-rw-r--r--arch/powerpc/platforms/chrp/Kconfig2
-rw-r--r--arch/powerpc/platforms/chrp/pegasos_eth.c72
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/iseries/Kconfig2
-rw-r--r--arch/powerpc/platforms/iseries/irq.c2
-rw-r--r--arch/powerpc/platforms/iseries/setup.c2
-rw-r--r--arch/powerpc/platforms/maple/Kconfig2
-rw-r--r--arch/powerpc/platforms/pasemi/Kconfig2
-rw-r--r--arch/powerpc/platforms/powermac/Kconfig2
-rw-r--r--arch/powerpc/platforms/powermac/cpufreq_64.c5
-rw-r--r--arch/powerpc/platforms/powermac/pic.h2
-rw-r--r--arch/powerpc/platforms/powermac/setup.c3
-rw-r--r--arch/powerpc/platforms/prep/Kconfig2
-rw-r--r--arch/powerpc/platforms/ps3/Kconfig2
-rw-r--r--arch/powerpc/platforms/ps3/mm.c4
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig7
-rw-r--r--arch/powerpc/platforms/pseries/Makefile2
-rw-r--r--arch/powerpc/platforms/pseries/eeh_driver.c68
-rw-r--r--arch/powerpc/platforms/pseries/msi.c248
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c2
-rw-r--r--arch/powerpc/sysdev/cpm2.c4
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c244
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c4
-rw-r--r--arch/powerpc/sysdev/ipic.c6
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c2
-rw-r--r--arch/x86/include/asm/ftrace.h25
-rw-r--r--arch/x86/kernel/dumpstack.c1
-rw-r--r--arch/x86/kernel/ftrace.c75
-rw-r--r--drivers/i2c/busses/i2c-mpc.c9
-rw-r--r--drivers/macintosh/therm_adt746x.c4
-rw-r--r--drivers/net/fec_mpc52xx.c6
-rw-r--r--drivers/ps3/ps3av.c16
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c14
-rw-r--r--drivers/serial/mpc52xx_uart.c40
-rw-r--r--drivers/spi/xilinx_spi.c9
-rw-r--r--drivers/watchdog/Kconfig2
-rw-r--r--include/linux/ftrace.h24
-rw-r--r--include/linux/pci_ids.h8
-rw-r--r--kernel/trace/trace_functions_graph.c75
-rw-r--r--lib/lmb.c42
218 files changed, 15034 insertions, 2532 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index cc453110fc46..0732cdd05ba1 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -35,30 +35,30 @@ Example:
35 #address-cells = <1>; 35 #address-cells = <1>;
36 #size-cells = <1>; 36 #size-cells = <1>;
37 compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; 37 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
38 reg = <82a8 4>; 38 reg = <0x82a8 4>;
39 ranges = <0 8100 1a4>; 39 ranges = <0 0x8100 0x1a4>;
40 interrupt-parent = <&ipic>; 40 interrupt-parent = <&ipic>;
41 interrupts = <47 8>; 41 interrupts = <71 8>;
42 cell-index = <0>; 42 cell-index = <0>;
43 dma-channel@0 { 43 dma-channel@0 {
44 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 44 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 cell-index = <0>; 45 cell-index = <0>;
46 reg = <0 80>; 46 reg = <0 0x80>;
47 }; 47 };
48 dma-channel@80 { 48 dma-channel@80 {
49 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 49 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
50 cell-index = <1>; 50 cell-index = <1>;
51 reg = <80 80>; 51 reg = <0x80 0x80>;
52 }; 52 };
53 dma-channel@100 { 53 dma-channel@100 {
54 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 54 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
55 cell-index = <2>; 55 cell-index = <2>;
56 reg = <100 80>; 56 reg = <0x100 0x80>;
57 }; 57 };
58 dma-channel@180 { 58 dma-channel@180 {
59 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 59 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
60 cell-index = <3>; 60 cell-index = <3>;
61 reg = <180 80>; 61 reg = <0x180 0x80>;
62 }; 62 };
63 }; 63 };
64 64
@@ -93,36 +93,36 @@ Example:
93 #address-cells = <1>; 93 #address-cells = <1>;
94 #size-cells = <1>; 94 #size-cells = <1>;
95 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; 95 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
96 reg = <21300 4>; 96 reg = <0x21300 4>;
97 ranges = <0 21100 200>; 97 ranges = <0 0x21100 0x200>;
98 cell-index = <0>; 98 cell-index = <0>;
99 dma-channel@0 { 99 dma-channel@0 {
100 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 100 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
101 reg = <0 80>; 101 reg = <0 0x80>;
102 cell-index = <0>; 102 cell-index = <0>;
103 interrupt-parent = <&mpic>; 103 interrupt-parent = <&mpic>;
104 interrupts = <14 2>; 104 interrupts = <20 2>;
105 }; 105 };
106 dma-channel@80 { 106 dma-channel@80 {
107 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 107 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
108 reg = <80 80>; 108 reg = <0x80 0x80>;
109 cell-index = <1>; 109 cell-index = <1>;
110 interrupt-parent = <&mpic>; 110 interrupt-parent = <&mpic>;
111 interrupts = <15 2>; 111 interrupts = <21 2>;
112 }; 112 };
113 dma-channel@100 { 113 dma-channel@100 {
114 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 114 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
115 reg = <100 80>; 115 reg = <0x100 0x80>;
116 cell-index = <2>; 116 cell-index = <2>;
117 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
118 interrupts = <16 2>; 118 interrupts = <22 2>;
119 }; 119 };
120 dma-channel@180 { 120 dma-channel@180 {
121 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; 121 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
122 reg = <180 80>; 122 reg = <0x180 0x80>;
123 cell-index = <3>; 123 cell-index = <3>;
124 interrupt-parent = <&mpic>; 124 interrupt-parent = <&mpic>;
125 interrupts = <17 2>; 125 interrupts = <23 2>;
126 }; 126 };
127 }; 127 };
128 128
diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
new file mode 100644
index 000000000000..600846557763
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
@@ -0,0 +1,24 @@
1* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3The Enhanced Secure Digital Host Controller provides an interface
4for MMC, SD, and SDIO types of memory cards.
5
6Required properties:
7 - compatible : should be
8 "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
9 "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
10 - reg : should contain eSDHC registers location and length.
11 - interrupts : should contain eSDHC interrupt.
12 - interrupt-parent : interrupt source phandle.
13 - clock-frequency : specifies eSDHC base clock frequency.
14
15Example:
16
17sdhci@2e000 {
18 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
19 reg = <0x2e000 0x1000>;
20 interrupts = <42 0x8>;
21 interrupt-parent = <&ipic>;
22 /* Filled in by U-Boot */
23 clock-frequency = <0>;
24};
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index a2d963998a65..731332288931 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -30,6 +30,8 @@ Required properties:
30- fsl,capture-dma: phandle to a node for the DMA channel to use for 30- fsl,capture-dma: phandle to a node for the DMA channel to use for
31 capture (recording) of audio. This is typically dictated 31 capture (recording) of audio. This is typically dictated
32 by SOC design. See the notes below. 32 by SOC design. See the notes below.
33- fsl,fifo-depth: the number of elements in the transmit and receive FIFOs.
34 This number is the maximum allowed value for SFCSR[TFWM0].
33 35
34Optional properties: 36Optional properties:
35- codec-handle : phandle to a 'codec' node that defines an audio 37- codec-handle : phandle to a 'codec' node that defines an audio
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 74cc312c347c..ad6b1c084fe3 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -111,6 +111,7 @@ config PPC
111 select HAVE_FTRACE_MCOUNT_RECORD 111 select HAVE_FTRACE_MCOUNT_RECORD
112 select HAVE_DYNAMIC_FTRACE 112 select HAVE_DYNAMIC_FTRACE
113 select HAVE_FUNCTION_TRACER 113 select HAVE_FUNCTION_TRACER
114 select HAVE_FUNCTION_GRAPH_TRACER
114 select ARCH_WANT_OPTIONAL_GPIOLIB 115 select ARCH_WANT_OPTIONAL_GPIOLIB
115 select HAVE_IDE 116 select HAVE_IDE
116 select HAVE_IOREMAP_PROT 117 select HAVE_IOREMAP_PROT
@@ -312,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
312 313
313config KEXEC 314config KEXEC
314 bool "kexec system call (EXPERIMENTAL)" 315 bool "kexec system call (EXPERIMENTAL)"
315 depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL 316 depends on BOOK3S && EXPERIMENTAL
316 help 317 help
317 kexec is a system call that implements the ability to shutdown your 318 kexec is a system call that implements the ability to shutdown your
318 current kernel, and to start another kernel. It is like a reboot 319 current kernel, and to start another kernel. It is like a reboot
@@ -409,6 +410,18 @@ config PPC_HAS_HASH_64K
409 depends on PPC64 410 depends on PPC64
410 default n 411 default n
411 412
413config STDBINUTILS
414 bool "Using standard binutils settings"
415 depends on 44x
416 default y
417 help
418 Turning this option off allows you to select 256KB PAGE_SIZE on 44x.
419 Note, that kernel will be able to run only those applications,
420 which had been compiled using binutils later than 2.17.50.0.3 with
421 '-zmax-page-size' set to 256K (the default is 64K). Or, if using
422 the older binutils, you can patch them with a trivial patch, which
423 changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000.
424
412choice 425choice
413 prompt "Page size" 426 prompt "Page size"
414 default PPC_4K_PAGES 427 default PPC_4K_PAGES
@@ -444,6 +457,19 @@ config PPC_64K_PAGES
444 bool "64k page size" if 44x || PPC_STD_MMU_64 457 bool "64k page size" if 44x || PPC_STD_MMU_64
445 select PPC_HAS_HASH_64K if PPC_STD_MMU_64 458 select PPC_HAS_HASH_64K if PPC_STD_MMU_64
446 459
460config PPC_256K_PAGES
461 bool "256k page size" if 44x
462 depends on !STDBINUTILS && (!SHMEM || BROKEN)
463 help
464 Make the page size 256k.
465
466 As the ELF standard only requires alignment to support page
467 sizes up to 64k, you will need to compile all of your user
468 space applications with a non-standard binutils settings
469 (see the STDBINUTILS description for details).
470
471 Say N unless you know what you are doing.
472
447endchoice 473endchoice
448 474
449config FORCE_MAX_ZONEORDER 475config FORCE_MAX_ZONEORDER
@@ -456,6 +482,8 @@ config FORCE_MAX_ZONEORDER
456 default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES 482 default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
457 range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES 483 range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
458 default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES 484 default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
485 range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES
486 default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES
459 range 11 64 487 range 11 64
460 default "11" 488 default "11"
461 help 489 help
@@ -594,6 +622,7 @@ config FSL_SOC
594config FSL_PCI 622config FSL_PCI
595 bool 623 bool
596 select PPC_INDIRECT_PCI 624 select PPC_INDIRECT_PCI
625 select PCI_QUIRKS
597 626
598config 4xx_SOC 627config 4xx_SOC
599 bool 628 bool
@@ -730,6 +759,22 @@ config LOWMEM_SIZE
730 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 759 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
731 default "0x30000000" 760 default "0x30000000"
732 761
762config LOWMEM_CAM_NUM_BOOL
763 bool "Set number of CAMs to use to map low memory"
764 depends on ADVANCED_OPTIONS && FSL_BOOKE
765 help
766 This option allows you to set the maximum number of CAM slots that
767 will be used to map low memory. There are a limited number of slots
768 available and even more limited number that will fit in the L1 MMU.
769 However, using more entries will allow mapping more low memory. This
770 can be useful in optimizing the layout of kernel virtual memory.
771
772 Say N here unless you know what you are doing.
773
774config LOWMEM_CAM_NUM
775 int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
776 default 3
777
733config RELOCATABLE 778config RELOCATABLE
734 bool "Build a relocatable kernel (EXPERIMENTAL)" 779 bool "Build a relocatable kernel (EXPERIMENTAL)"
735 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE 780 depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
@@ -794,7 +839,7 @@ config PHYSICAL_START
794 839
795config PHYSICAL_ALIGN 840config PHYSICAL_ALIGN
796 hex 841 hex
797 default "0x10000000" if FSL_BOOKE 842 default "0x04000000" if FSL_BOOKE
798 help 843 help
799 This value puts the alignment restrictions on physical address 844 This value puts the alignment restrictions on physical address
800 where kernel is loaded and run from. Kernel is compiled for an 845 where kernel is loaded and run from. Kernel is compiled for an
@@ -815,31 +860,6 @@ config TASK_SIZE
815 default "0x80000000" if PPC_PREP || PPC_8xx 860 default "0x80000000" if PPC_PREP || PPC_8xx
816 default "0xc0000000" 861 default "0xc0000000"
817 862
818config CONSISTENT_START_BOOL
819 bool "Set custom consistent memory pool address"
820 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
821 help
822 This option allows you to set the base virtual address
823 of the consistent memory pool. This pool of virtual
824 memory is used to make consistent memory allocations.
825
826config CONSISTENT_START
827 hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
828 default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx)
829 default "0xff100000" if NOT_COHERENT_CACHE
830
831config CONSISTENT_SIZE_BOOL
832 bool "Set custom consistent memory pool size"
833 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
834 help
835 This option allows you to set the size of the
836 consistent memory pool. This pool of virtual memory
837 is used to make consistent memory allocations.
838
839config CONSISTENT_SIZE
840 hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
841 default "0x00200000" if NOT_COHERENT_CACHE
842
843config PIN_TLB 863config PIN_TLB
844 bool "Pinned Kernel TLBs (860 ONLY)" 864 bool "Pinned Kernel TLBs (860 ONLY)"
845 depends on ADVANCED_OPTIONS && 8xx 865 depends on ADVANCED_OPTIONS && 8xx
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 08f7cc0a1953..22091bbfdc9b 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -129,7 +129,7 @@ config BDI_SWITCH
129 129
130config BOOTX_TEXT 130config BOOTX_TEXT
131 bool "Support for early boot text console (BootX or OpenFirmware only)" 131 bool "Support for early boot text console (BootX or OpenFirmware only)"
132 depends on PPC_OF && PPC_MULTIPLATFORM 132 depends on PPC_OF && PPC_BOOK3S
133 help 133 help
134 Say Y here to see progress messages from the boot firmware in text 134 Say Y here to see progress messages from the boot firmware in text
135 mode. Requires either BootX or Open Firmware. 135 mode. Requires either BootX or Open Firmware.
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 72d17f50e54f..551fc58c05cf 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -147,8 +147,8 @@ core-y += arch/powerpc/kernel/ \
147 arch/powerpc/mm/ \ 147 arch/powerpc/mm/ \
148 arch/powerpc/lib/ \ 148 arch/powerpc/lib/ \
149 arch/powerpc/sysdev/ \ 149 arch/powerpc/sysdev/ \
150 arch/powerpc/platforms/ 150 arch/powerpc/platforms/ \
151core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/ 151 arch/powerpc/math-emu/
152core-$(CONFIG_XMON) += arch/powerpc/xmon/ 152core-$(CONFIG_XMON) += arch/powerpc/xmon/
153core-$(CONFIG_KVM) += arch/powerpc/kvm/ 153core-$(CONFIG_KVM) += arch/powerpc/kvm/
154 154
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e84df338ea29..4458abb67c51 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
70 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ 70 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
71 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ 71 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
72 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ 72 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
73 cuboot-acadia.c 73 cuboot-acadia.c cuboot-amigaone.c
74src-boot := $(src-wlib) $(src-plat) empty.c 74src-boot := $(src-wlib) $(src-plat) empty.c
75 75
76src-boot := $(addprefix $(obj)/, $(src-boot)) 76src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -235,7 +235,9 @@ image-$(CONFIG_PPC_ADDER875) += cuImage.adder875-uboot \
235 dtbImage.adder875-redboot 235 dtbImage.adder875-redboot
236 236
237# Board ports in arch/powerpc/platform/52xx/Kconfig 237# Board ports in arch/powerpc/platform/52xx/Kconfig
238image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 cuImage.lite5200b 238image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 lite5200.dtb
239image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b lite5200b.dtb
240image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200 media5200.dtb
239 241
240# Board ports in arch/powerpc/platform/82xx/Kconfig 242# Board ports in arch/powerpc/platform/82xx/Kconfig
241image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads 243image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads
@@ -274,6 +276,9 @@ image-$(CONFIG_STORCENTER) += cuImage.storcenter
274image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 276image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
275image-$(CONFIG_PPC_C2K) += cuImage.c2k 277image-$(CONFIG_PPC_C2K) += cuImage.c2k
276 278
279# Board port in arch/powerpc/platform/amigaone/Kconfig
280image-$(CONFIG_AMIGAONE) += cuImage.amigaone
281
277# For 32-bit powermacs, build the COFF and miboot images 282# For 32-bit powermacs, build the COFF and miboot images
278# as well as the ELF images. 283# as well as the ELF images.
279ifeq ($(CONFIG_PPC32),y) 284ifeq ($(CONFIG_PPC32),y)
diff --git a/arch/powerpc/boot/cuboot-amigaone.c b/arch/powerpc/boot/cuboot-amigaone.c
new file mode 100644
index 000000000000..d5029674030b
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-amigaone.c
@@ -0,0 +1,35 @@
1/*
2 * Old U-boot compatibility for AmigaOne
3 *
4 * Author: Gerhard Pircher (gerhard_pircher@gmx.net)
5 *
6 * Based on cuboot-83xx.c
7 * Copyright (c) 2007 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14#include "ops.h"
15#include "stdio.h"
16#include "cuboot.h"
17
18#include "ppcboot.h"
19
20static bd_t bd;
21
22static void platform_fixups(void)
23{
24 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
25 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
26}
27
28void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
29 unsigned long r6, unsigned long r7)
30{
31 CUBOOT_INIT();
32 fdt_init(_dtb_start);
33 serial_console_init();
34 platform_ops.fixups = platform_fixups;
35}
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts
new file mode 100644
index 000000000000..26549fca2ed4
--- /dev/null
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -0,0 +1,173 @@
1/*
2 * AmigaOne Device Tree Source
3 *
4 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "AmigaOne";
16 compatible = "eyetech,amigaone";
17 coherency-off;
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 cpus {
22 #cpus = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 cpu@0 {
27 device_type = "cpu";
28 reg = <0>;
29 d-cache-line-size = <32>; // 32 bytes
30 i-cache-line-size = <32>; // 32 bytes
31 d-cache-size = <32768>; // L1, 32K
32 i-cache-size = <32768>; // L1, 32K
33 timebase-frequency = <0>; // 33.3 MHz, from U-boot
34 clock-frequency = <0>; // From U-boot
35 bus-frequency = <0>; // From U-boot
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <0 0>; // From U-boot
42 };
43
44 pci@80000000 {
45 device_type = "pci";
46 compatible = "mai-logic,articia-s";
47 bus-frequency = <33333333>;
48 bus-range = <0 0xff>;
49 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
50 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory
51 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA)
52 // Configuration address and data register.
53 reg = <0xfec00cf8 4
54 0xfee00cfc 4>;
55 8259-interrupt-acknowledge = <0xfef00000>;
56 // Do not define a interrupt-parent here, if there is no
57 // interrupt-map property.
58 #address-cells = <3>;
59 #size-cells = <2>;
60
61 isa@7 {
62 device_type = "isa";
63 compatible = "pciclass,0601";
64 vendor-id = <0x00001106>;
65 device-id = <0x00000686>;
66 revision-id = <0x00000010>;
67 class-code = <0x00060100>;
68 subsystem-id = <0>;
69 subsystem-vendor-id = <0>;
70 devsel-speed = <0x00000001>;
71 min-grant = <0>;
72 max-latency = <0>;
73 /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
74 ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
75 interrupt-parent = <&i8259>;
76 #interrupt-cells = <2>;
77 #address-cells = <2>;
78 #size-cells = <1>;
79
80 dma-controller@0 {
81 compatible = "pnpPNP,200";
82 reg = <1 0x00000000 0x00000020
83 1 0x00000080 0x00000010
84 1 0x000000c0 0x00000020>;
85 };
86
87 i8259: interrupt-controller@20 {
88 device_type = "interrupt-controller";
89 compatible = "pnpPNP,000";
90 interrupt-controller;
91 reg = <1 0x00000020 0x00000002
92 1 0x000000a0 0x00000002
93 1 0x000004d0 0x00000002>;
94 reserved-interrupts = <2>;
95 #interrupt-cells = <2>;
96 };
97
98 timer@40 {
99 // Also adds pcspkr to platform devices.
100 compatible = "pnpPNP,100";
101 reg = <1 0x00000040 0x00000020>;
102 };
103
104 8042@60 {
105 device_type = "8042";
106 reg = <1 0x00000060 0x00000001
107 1 0x00000064 0x00000001>;
108 interrupts = <1 3 12 3>;
109 #address-cells = <1>;
110 #size-cells = <0>;
111
112 keyboard@0 {
113 compatible = "pnpPNP,303";
114 reg = <0>;
115 };
116
117 mouse@1 {
118 compatible = "pnpPNP,f03";
119 reg = <1>;
120 };
121 };
122
123 rtc@70 {
124 compatible = "pnpPNP,b00";
125 reg = <1 0x00000070 0x00000002>;
126 interrupts = <8 3>;
127 };
128
129 serial@3f8 {
130 device_type = "serial";
131 compatible = "pnpPNP,501","pnpPNP,500";
132 reg = <1 0x000003f8 0x00000008>;
133 interrupts = <4 3>;
134 clock-frequency = <1843200>;
135 current-speed = <115200>;
136 };
137
138 serial@2f8 {
139 device_type = "serial";
140 compatible = "pnpPNP,501","pnpPNP,500";
141 reg = <1 0x000002f8 0x00000008>;
142 interrupts = <3 3>;
143 clock-frequency = <1843200>;
144 current-speed = <115200>;
145 };
146
147 parallel@378 {
148 device_type = "parallel";
149 // No ECP support for now, otherwise add "pnpPNP,401".
150 compatible = "pnpPNP,400";
151 reg = <1 0x00000378 0x00000003
152 1 0x00000778 0x00000003>;
153 };
154
155 fdc@3f0 {
156 device_type = "fdc";
157 compatible = "pnpPNP,700";
158 reg = <1 0x000003f0 0x00000008>;
159 interrupts = <6 3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 disk@0 {
164 reg = <0>;
165 };
166 };
167 };
168 };
169
170 chosen {
171 linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
172 };
173};
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 8b5ba8261a36..540ec3241f72 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -142,6 +142,20 @@
142 /*RXDE*/ 0x5 0x4>; 142 /*RXDE*/ 0x5 0x4>;
143 }; 143 };
144 144
145 USB0: ehci@bffd0400 {
146 compatible = "ibm,usb-ehci-460ex", "usb-ehci";
147 interrupt-parent = <&UIC2>;
148 interrupts = <0x1d 4>;
149 reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
150 };
151
152 USB1: usb@bffd0000 {
153 compatible = "ohci-le";
154 reg = <4 0xbffd0000 0x60>;
155 interrupt-parent = <&UIC2>;
156 interrupts = <0x1e 4>;
157 };
158
145 POB0: opb { 159 POB0: opb {
146 compatible = "ibm,opb-460ex", "ibm,opb"; 160 compatible = "ibm,opb-460ex", "ibm,opb";
147 #address-cells = <1>; 161 #address-cells = <1>;
@@ -245,6 +259,20 @@
245 reg = <0xef600700 0x00000014>; 259 reg = <0xef600700 0x00000014>;
246 interrupt-parent = <&UIC0>; 260 interrupt-parent = <&UIC0>;
247 interrupts = <0x2 0x4>; 261 interrupts = <0x2 0x4>;
262 #address-cells = <1>;
263 #size-cells = <0>;
264 rtc@68 {
265 compatible = "stm,m41t80";
266 reg = <0x68>;
267 interrupt-parent = <&UIC2>;
268 interrupts = <0x19 0x8>;
269 };
270 sttm@48 {
271 compatible = "ad,ad7414";
272 reg = <0x48>;
273 interrupt-parent = <&UIC1>;
274 interrupts = <0x14 0x8>;
275 };
248 }; 276 };
249 277
250 IIC1: i2c@ef600800 { 278 IIC1: i2c@ef600800 {
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2f74cc4e093e..cee8080aa245 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -17,6 +17,7 @@
17 compatible = "schindler,cm5200"; 17 compatible = "schindler,cm5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,7 +67,6 @@
66 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
@@ -74,84 +74,76 @@
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
75 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
76 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
77 interrupt-parent = <&mpc5200_pic>;
78 }; 77 };
79 78
80 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
83 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
84 interrupt-parent = <&mpc5200_pic>;
85 }; 83 };
86 84
87 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
90 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
91 interrupt-parent = <&mpc5200_pic>;
92 }; 89 };
93 90
94 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
97 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 95 };
100 96
101 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
104 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
105 interrupt-parent = <&mpc5200_pic>;
106 }; 101 };
107 102
108 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
110 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
111 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 107 };
114 108
115 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
118 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
119 interrupt-parent = <&mpc5200_pic>;
120 }; 113 };
121 114
122 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
123 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
124 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
125 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
126 interrupt-parent = <&mpc5200_pic>;
127 }; 119 };
128 120
129 gpio@b00 { 121 gpio_simple: gpio@b00 {
130 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 122 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
131 reg = <0xb00 0x40>; 123 reg = <0xb00 0x40>;
132 interrupts = <1 7 0>; 124 interrupts = <1 7 0>;
133 interrupt-parent = <&mpc5200_pic>; 125 gpio-controller;
126 #gpio-cells = <2>;
134 }; 127 };
135 128
136 gpio@c00 { 129 gpio_wkup: gpio@c00 {
137 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 130 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
138 reg = <0xc00 0x40>; 131 reg = <0xc00 0x40>;
139 interrupts = <1 8 0 0 3 0>; 132 interrupts = <1 8 0 0 3 0>;
140 interrupt-parent = <&mpc5200_pic>; 133 gpio-controller;
134 #gpio-cells = <2>;
141 }; 135 };
142 136
143 spi@f00 { 137 spi@f00 {
144 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 138 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
145 reg = <0xf00 0x20>; 139 reg = <0xf00 0x20>;
146 interrupts = <2 13 0 2 14 0>; 140 interrupts = <2 13 0 2 14 0>;
147 interrupt-parent = <&mpc5200_pic>;
148 }; 141 };
149 142
150 usb@1000 { 143 usb@1000 {
151 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 144 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
152 reg = <0x1000 0xff>; 145 reg = <0x1000 0xff>;
153 interrupts = <2 6 0>; 146 interrupts = <2 6 0>;
154 interrupt-parent = <&mpc5200_pic>;
155 }; 147 };
156 148
157 dma-controller@1200 { 149 dma-controller@1200 {
@@ -161,7 +153,6 @@
161 3 4 0 3 5 0 3 6 0 3 7 0 153 3 4 0 3 5 0 3 6 0 3 7 0
162 3 8 0 3 9 0 3 10 0 3 11 0 154 3 8 0 3 9 0 3 10 0 3 11 0
163 3 12 0 3 13 0 3 14 0 3 15 0>; 155 3 12 0 3 13 0 3 14 0 3 15 0>;
164 interrupt-parent = <&mpc5200_pic>;
165 }; 156 };
166 157
167 xlb@1f00 { 158 xlb@1f00 {
@@ -170,48 +161,34 @@
170 }; 161 };
171 162
172 serial@2000 { // PSC1 163 serial@2000 { // PSC1
173 device_type = "serial";
174 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 164 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
175 port-number = <0>; // Logical port assignment
176 reg = <0x2000 0x100>; 165 reg = <0x2000 0x100>;
177 interrupts = <2 1 0>; 166 interrupts = <2 1 0>;
178 interrupt-parent = <&mpc5200_pic>;
179 }; 167 };
180 168
181 serial@2200 { // PSC2 169 serial@2200 { // PSC2
182 device_type = "serial"; 170 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
183 compatible = "fsl,mpc5200-psc-uart";
184 port-number = <1>; // Logical port assignment
185 reg = <0x2200 0x100>; 171 reg = <0x2200 0x100>;
186 interrupts = <2 2 0>; 172 interrupts = <2 2 0>;
187 interrupt-parent = <&mpc5200_pic>;
188 }; 173 };
189 174
190 serial@2400 { // PSC3 175 serial@2400 { // PSC3
191 device_type = "serial"; 176 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
192 compatible = "fsl,mpc5200-psc-uart";
193 port-number = <2>; // Logical port assignment
194 reg = <0x2400 0x100>; 177 reg = <0x2400 0x100>;
195 interrupts = <2 3 0>; 178 interrupts = <2 3 0>;
196 interrupt-parent = <&mpc5200_pic>;
197 }; 179 };
198 180
199 serial@2c00 { // PSC6 181 serial@2c00 { // PSC6
200 device_type = "serial";
201 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 182 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
202 port-number = <5>; // Logical port assignment
203 reg = <0x2c00 0x100>; 183 reg = <0x2c00 0x100>;
204 interrupts = <2 4 0>; 184 interrupts = <2 4 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 185 };
207 186
208 ethernet@3000 { 187 ethernet@3000 {
209 device_type = "network";
210 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 188 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
211 reg = <0x3000 0x400>; 189 reg = <0x3000 0x400>;
212 local-mac-address = [ 00 00 00 00 00 00 ]; 190 local-mac-address = [ 00 00 00 00 00 00 ];
213 interrupts = <2 5 0>; 191 interrupts = <2 5 0>;
214 interrupt-parent = <&mpc5200_pic>;
215 phy-handle = <&phy0>; 192 phy-handle = <&phy0>;
216 }; 193 };
217 194
@@ -221,10 +198,8 @@
221 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 198 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
222 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 199 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
223 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 200 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
224 interrupt-parent = <&mpc5200_pic>;
225 201
226 phy0: ethernet-phy@0 { 202 phy0: ethernet-phy@0 {
227 device_type = "ethernet-phy";
228 reg = <0>; 203 reg = <0>;
229 }; 204 };
230 }; 205 };
@@ -235,7 +210,6 @@
235 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 210 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
236 reg = <0x3d40 0x40>; 211 reg = <0x3d40 0x40>;
237 interrupts = <2 16 0>; 212 interrupts = <2 16 0>;
238 interrupt-parent = <&mpc5200_pic>;
239 fsl5200-clocking; 213 fsl5200-clocking;
240 }; 214 };
241 215
@@ -245,9 +219,8 @@
245 }; 219 };
246 }; 220 };
247 221
248 lpb { 222 localbus {
249 model = "fsl,lpb"; 223 compatible = "fsl,mpc5200b-lpb","simple-bus";
250 compatible = "fsl,lpb";
251 #address-cells = <2>; 224 #address-cells = <2>;
252 #size-cells = <1>; 225 #size-cells = <1>;
253 ranges = <0 0 0xfc000000 0x2000000>; 226 ranges = <0 0 0xfc000000 0x2000000>;
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
new file mode 100644
index 000000000000..4c36186ef946
--- /dev/null
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -0,0 +1,254 @@
1/*
2 * Digsy MTC board Device Tree Source
3 *
4 * Copyright (C) 2009 Semihalf
5 *
6 * Based on the CM5200 by M. Balakowicz
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "intercontrol,digsy-mtc";
18 compatible = "intercontrol,digsy-mtc";
19 #address-cells = <1>;
20 #size-cells = <1>;
21 interrupt-parent = <&mpc5200_pic>;
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 PowerPC,5200@0 {
28 device_type = "cpu";
29 reg = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <0x4000>; // L1, 16K
33 i-cache-size = <0x4000>; // L1, 16K
34 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; // from bootloader
37 };
38 };
39
40 memory {
41 device_type = "memory";
42 reg = <0x00000000 0x02000000>; // 32MB
43 };
44
45 soc5200@f0000000 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "fsl,mpc5200b-immr";
49 ranges = <0 0xf0000000 0x0000c000>;
50 reg = <0xf0000000 0x00000100>;
51 bus-frequency = <0>; // from bootloader
52 system-frequency = <0>; // from bootloader
53
54 cdm@200 {
55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
56 reg = <0x200 0x38>;
57 };
58
59 mpc5200_pic: interrupt-controller@500 {
60 // 5200 interrupts are encoded into two levels;
61 interrupt-controller;
62 #interrupt-cells = <3>;
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>;
65 };
66
67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 reg = <0x600 0x10>;
70 interrupts = <1 9 0>;
71 fsl,has-wdt;
72 };
73
74 timer@610 { // General Purpose Timer
75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 reg = <0x610 0x10>;
77 interrupts = <1 10 0>;
78 };
79
80 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>;
83 interrupts = <1 11 0>;
84 };
85
86 timer@630 { // General Purpose Timer
87 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
88 reg = <0x630 0x10>;
89 interrupts = <1 12 0>;
90 };
91
92 timer@640 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <0x640 0x10>;
95 interrupts = <1 13 0>;
96 };
97
98 timer@650 { // General Purpose Timer
99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
100 reg = <0x650 0x10>;
101 interrupts = <1 14 0>;
102 };
103
104 timer@660 { // General Purpose Timer
105 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
106 reg = <0x660 0x10>;
107 interrupts = <1 15 0>;
108 };
109
110 timer@670 { // General Purpose Timer
111 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
112 reg = <0x670 0x10>;
113 interrupts = <1 16 0>;
114 };
115
116 gpio_simple: gpio@b00 {
117 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
118 reg = <0xb00 0x40>;
119 interrupts = <1 7 0>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 };
123
124 gpio_wkup: gpio@c00 {
125 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
126 reg = <0xc00 0x40>;
127 interrupts = <1 8 0 0 3 0>;
128 gpio-controller;
129 #gpio-cells = <2>;
130 };
131
132 spi@f00 {
133 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
134 reg = <0xf00 0x20>;
135 interrupts = <2 13 0 2 14 0>;
136 };
137
138 usb@1000 {
139 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
140 reg = <0x1000 0xff>;
141 interrupts = <2 6 0>;
142 };
143
144 dma-controller@1200 {
145 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
146 reg = <0x1200 0x80>;
147 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
148 3 4 0 3 5 0 3 6 0 3 7 0
149 3 8 0 3 9 0 3 10 0 3 11 0
150 3 12 0 3 13 0 3 14 0 3 15 0>;
151 };
152
153 xlb@1f00 {
154 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
155 reg = <0x1f00 0x100>;
156 };
157
158 serial@2600 { // PSC4
159 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
160 reg = <0x2600 0x100>;
161 interrupts = <2 11 0>;
162 };
163
164 serial@2800 { // PSC5
165 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
166 reg = <0x2800 0x100>;
167 interrupts = <2 12 0>;
168 };
169
170 ethernet@3000 {
171 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
172 reg = <0x3000 0x400>;
173 local-mac-address = [ 00 00 00 00 00 00 ];
174 interrupts = <2 5 0>;
175 phy-handle = <&phy0>;
176 };
177
178 mdio@3000 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
182 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
183 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
184
185 phy0: ethernet-phy@0 {
186 reg = <0>;
187 };
188 };
189
190 ata@3a00 {
191 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
192 reg = <0x3a00 0x100>;
193 interrupts = <2 7 0>;
194 };
195
196 i2c@3d00 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
200 reg = <0x3d00 0x40>;
201 interrupts = <2 15 0>;
202 fsl5200-clocking;
203
204 rtc@50 {
205 compatible = "at,24c08";
206 reg = <0x50>;
207 };
208
209 rtc@68 {
210 compatible = "dallas,ds1339";
211 reg = <0x68>;
212 };
213 };
214
215 sram@8000 {
216 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
217 reg = <0x8000 0x4000>;
218 };
219 };
220
221 lpb {
222 compatible = "fsl,mpc5200b-lpb","simple-bus";
223 #address-cells = <2>;
224 #size-cells = <1>;
225 ranges = <0 0 0xff000000 0x1000000>;
226
227 // 16-bit flash device at LocalPlus Bus CS0
228 flash@0,0 {
229 compatible = "cfi-flash";
230 reg = <0 0 0x1000000>;
231 bank-width = <2>;
232 device-width = <2>;
233 #size-cells = <1>;
234 #address-cells = <1>;
235
236 partition@0 {
237 label = "kernel";
238 reg = <0x0 0x00200000>;
239 };
240 partition@200000 {
241 label = "root";
242 reg = <0x00200000 0x00300000>;
243 };
244 partition@500000 {
245 label = "user";
246 reg = <0x00500000 0x00a00000>;
247 };
248 partition@f00000 {
249 label = "u-boot";
250 reg = <0x00f00000 0x100000>;
251 };
252 };
253 };
254};
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
new file mode 100644
index 000000000000..0ddfdfc7ab5f
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -0,0 +1,364 @@
1/*
2 * GE Fanuc PPC9A Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_PPC9A";
25 compatible = "gef,ppc9a";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 /* flash@0,0 is a mirror of part of the memory in flash@1,0
88 flash@0,0 {
89 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
90 reg = <0x0 0x0 0x1000000>;
91 bank-width = <4>;
92 device-width = <2>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 partition@0 {
96 label = "firmware";
97 reg = <0x0 0x1000000>;
98 read-only;
99 };
100 };
101 */
102
103 flash@1,0 {
104 compatible = "gef,ppc9a-paged-flash", "cfi-flash";
105 reg = <0x1 0x0 0x8000000>;
106 bank-width = <4>;
107 device-width = <2>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 partition@0 {
111 label = "user";
112 reg = <0x0 0x7800000>;
113 };
114 partition@7800000 {
115 label = "firmware";
116 reg = <0x7800000 0x800000>;
117 read-only;
118 };
119 };
120
121 fpga@4,0 {
122 compatible = "gef,ppc9a-fpga-regs";
123 reg = <0x4 0x0 0x40>;
124 };
125
126 wdt@4,2000 {
127 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
128 "gef,fpga-wdt";
129 reg = <0x4 0x2000 0x8>;
130 interrupts = <0x1a 0x4>;
131 interrupt-parent = <&gef_pic>;
132 };
133 /* Second watchdog available, driver currently supports one.
134 wdt@4,2010 {
135 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
136 "gef,fpga-wdt";
137 reg = <0x4 0x2010 0x8>;
138 interrupts = <0x1b 0x4>;
139 interrupt-parent = <&gef_pic>;
140 };
141 */
142 gef_pic: pic@4,4000 {
143 #interrupt-cells = <1>;
144 interrupt-controller;
145 compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
146 reg = <0x4 0x4000 0x20>;
147 interrupts = <0x8
148 0x9>;
149 interrupt-parent = <&mpic>;
150
151 };
152 gef_gpio: gpio@7,14000 {
153 #gpio-cells = <2>;
154 compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
155 reg = <0x7 0x14000 0x24>;
156 gpio-controller;
157 };
158 };
159
160 soc@fef00000 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 #interrupt-cells = <2>;
164 compatible = "fsl,mpc8641-soc", "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 hwmon@48 {
179 compatible = "national,lm92";
180 reg = <0x48>;
181 };
182
183 hwmon@4c {
184 compatible = "adi,adt7461";
185 reg = <0x4c>;
186 };
187
188 rtc@51 {
189 compatible = "epson,rx8581";
190 reg = <0x00000051>;
191 };
192
193 eti@6b {
194 compatible = "dallas,ds1682";
195 reg = <0x6b>;
196 };
197 };
198
199 i2c2: i2c@3100 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl-i2c";
203 reg = <0x3100 0x100>;
204 interrupts = <0x2b 0x2>;
205 interrupt-parent = <&mpic>;
206 dfsrr;
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 mdio@24520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-mdio";
254 reg = <0x24520 0x20>;
255
256 phy0: ethernet-phy@0 {
257 interrupt-parent = <&gef_pic>;
258 interrupts = <0x9 0x4>;
259 reg = <1>;
260 };
261 phy2: ethernet-phy@2 {
262 interrupt-parent = <&gef_pic>;
263 interrupts = <0x8 0x4>;
264 reg = <3>;
265 };
266 };
267
268 enet0: ethernet@24000 {
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
275 interrupt-parent = <&mpic>;
276 phy-handle = <&phy0>;
277 phy-connection-type = "gmii";
278 };
279
280 enet1: ethernet@26000 {
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x26000 0x1000>;
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
287 interrupt-parent = <&mpic>;
288 phy-handle = <&phy2>;
289 phy-connection-type = "gmii";
290 };
291
292 serial0: serial@4500 {
293 cell-index = <0>;
294 device_type = "serial";
295 compatible = "ns16550";
296 reg = <0x4500 0x100>;
297 clock-frequency = <0>;
298 interrupts = <0x2a 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 serial1: serial@4600 {
303 cell-index = <1>;
304 device_type = "serial";
305 compatible = "ns16550";
306 reg = <0x4600 0x100>;
307 clock-frequency = <0>;
308 interrupts = <0x1c 0x2>;
309 interrupt-parent = <&mpic>;
310 };
311
312 mpic: pic@40000 {
313 clock-frequency = <0>;
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x40000 0x40000>;
318 compatible = "chrp,open-pic";
319 device_type = "open-pic";
320 };
321
322 global-utilities@e0000 {
323 compatible = "fsl,mpc8641-guts";
324 reg = <0xe0000 0x1000>;
325 fsl,has-rstcr;
326 };
327 };
328
329 pci0: pcie@fef08000 {
330 compatible = "fsl,mpc8641-pcie";
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 reg = <0xfef08000 0x1000>;
336 bus-range = <0x0 0xff>;
337 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
338 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
339 clock-frequency = <33333333>;
340 interrupt-parent = <&mpic>;
341 interrupts = <0x18 0x2>;
342 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343 interrupt-map = <
344 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
345 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
346 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
347 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
348 >;
349
350 pcie@0 {
351 reg = <0 0 0 0 0>;
352 #size-cells = <2>;
353 #address-cells = <3>;
354 device_type = "pci";
355 ranges = <0x02000000 0x0 0x80000000
356 0x02000000 0x0 0x80000000
357 0x0 0x40000000
358
359 0x01000000 0x0 0x00000000
360 0x01000000 0x0 0x00000000
361 0x0 0x00400000>;
362 };
363 };
364};
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
new file mode 100644
index 000000000000..09eeb438216b
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -0,0 +1,364 @@
1/*
2 * GE Fanuc SBC310 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC310";
25 compatible = "gef,sbc310";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe0000000 0x08000000 // Paged Flash 0
80 2 0 0xe8000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00010000>; // FPGA
83
84 /* flash@0,0 is a mirror of part of the memory in flash@1,0
85 flash@0,0 {
86 compatible = "cfi-flash";
87 reg = <0 0 0x01000000>;
88 bank-width = <2>;
89 device-width = <2>;
90 #address-cells = <1>;
91 #size-cells = <1>;
92 partition@0 {
93 label = "firmware";
94 reg = <0x00000000 0x01000000>;
95 read-only;
96 };
97 };
98 */
99
100 flash@1,0 {
101 compatible = "cfi-flash";
102 reg = <1 0 0x8000000>;
103 bank-width = <2>;
104 device-width = <2>;
105 #address-cells = <1>;
106 #size-cells = <1>;
107 partition@0 {
108 label = "user";
109 reg = <0x00000000 0x07800000>;
110 };
111 partition@7800000 {
112 label = "firmware";
113 reg = <0x07800000 0x00800000>;
114 read-only;
115 };
116 };
117
118 fpga@4,0 {
119 compatible = "gef,fpga-regs";
120 reg = <0x4 0x0 0x40>;
121 };
122
123 wdt@4,2000 {
124 #interrupt-cells = <2>;
125 device_type = "watchdog";
126 compatible = "gef,fpga-wdt";
127 reg = <0x4 0x2000 0x8>;
128 interrupts = <0x1a 0x4>;
129 interrupt-parent = <&gef_pic>;
130 };
131/*
132 wdt@4,2010 {
133 #interrupt-cells = <2>;
134 device_type = "watchdog";
135 compatible = "gef,fpga-wdt";
136 reg = <0x4 0x2010 0x8>;
137 interrupts = <0x1b 0x4>;
138 interrupt-parent = <&gef_pic>;
139 };
140*/
141 gef_pic: pic@4,4000 {
142 #interrupt-cells = <1>;
143 interrupt-controller;
144 compatible = "gef,fpga-pic";
145 reg = <0x4 0x4000 0x20>;
146 interrupts = <0x8
147 0x9>;
148 interrupt-parent = <&mpic>;
149
150 };
151 gef_gpio: gpio@4,8000 {
152 #gpio-cells = <2>;
153 compatible = "gef,sbc310-gpio";
154 reg = <0x4 0x8000 0x24>;
155 gpio-controller;
156 };
157 };
158
159 soc@fef00000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 #interrupt-cells = <2>;
163 device_type = "soc";
164 compatible = "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 rtc@51 {
179 compatible = "epson,rx8581";
180 reg = <0x00000051>;
181 };
182 };
183
184 i2c2: i2c@3100 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl-i2c";
188 reg = <0x3100 0x100>;
189 interrupts = <0x2b 0x2>;
190 interrupt-parent = <&mpic>;
191 dfsrr;
192
193 hwmon@48 {
194 compatible = "national,lm92";
195 reg = <0x48>;
196 };
197
198 hwmon@4c {
199 compatible = "adi,adt7461";
200 reg = <0x4c>;
201 };
202
203 eti@6b {
204 compatible = "dallas,ds1682";
205 reg = <0x6b>;
206 };
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 mdio@24520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-mdio";
254 reg = <0x24520 0x20>;
255
256 phy0: ethernet-phy@0 {
257 interrupt-parent = <&gef_pic>;
258 interrupts = <0x9 0x4>;
259 reg = <1>;
260 };
261 phy2: ethernet-phy@2 {
262 interrupt-parent = <&gef_pic>;
263 interrupts = <0x8 0x4>;
264 reg = <3>;
265 };
266 };
267
268 enet0: ethernet@24000 {
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
275 interrupt-parent = <&mpic>;
276 phy-handle = <&phy0>;
277 phy-connection-type = "gmii";
278 };
279
280 enet1: ethernet@26000 {
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x26000 0x1000>;
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
287 interrupt-parent = <&mpic>;
288 phy-handle = <&phy2>;
289 phy-connection-type = "gmii";
290 };
291
292 serial0: serial@4500 {
293 cell-index = <0>;
294 device_type = "serial";
295 compatible = "ns16550";
296 reg = <0x4500 0x100>;
297 clock-frequency = <0>;
298 interrupts = <0x2a 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 serial1: serial@4600 {
303 cell-index = <1>;
304 device_type = "serial";
305 compatible = "ns16550";
306 reg = <0x4600 0x100>;
307 clock-frequency = <0>;
308 interrupts = <0x1c 0x2>;
309 interrupt-parent = <&mpic>;
310 };
311
312 mpic: pic@40000 {
313 clock-frequency = <0>;
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x40000 0x40000>;
318 compatible = "chrp,open-pic";
319 device_type = "open-pic";
320 };
321
322 global-utilities@e0000 {
323 compatible = "fsl,mpc8641-guts";
324 reg = <0xe0000 0x1000>;
325 fsl,has-rstcr;
326 };
327 };
328
329 pci0: pcie@fef08000 {
330 compatible = "fsl,mpc8641-pcie";
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 reg = <0xfef08000 0x1000>;
336 bus-range = <0x0 0xff>;
337 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
338 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
339 clock-frequency = <33333333>;
340 interrupt-parent = <&mpic>;
341 interrupts = <0x18 0x2>;
342 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343 interrupt-map = <
344 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
345 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
346 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
347 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
348 >;
349
350 pcie@0 {
351 reg = <0 0 0 0 0>;
352 #size-cells = <2>;
353 #address-cells = <3>;
354 device_type = "pci";
355 ranges = <0x02000000 0x0 0x80000000
356 0x02000000 0x0 0x80000000
357 0x0 0x40000000
358
359 0x01000000 0x0 0x00000000
360 0x01000000 0x0 0x00000000
361 0x0 0x00400000>;
362 };
363 };
364};
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index e78c355c7bac..714175ccb2a4 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -71,7 +71,7 @@
71 #address-cells = <2>; 71 #address-cells = <2>;
72 #size-cells = <1>; 72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus"; 73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xf8005000 0x1000>; 74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>; 75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
77 77
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 3f7a5dce8de0..de30b3f9eb26 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -17,6 +17,7 @@
17 compatible = "fsl,lite5200"; 17 compatible = "fsl,lite5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -58,96 +59,74 @@
58 // 5200 interrupts are encoded into two levels; 59 // 5200 interrupts are encoded into two levels;
59 interrupt-controller; 60 interrupt-controller;
60 #interrupt-cells = <3>; 61 #interrupt-cells = <3>;
61 device_type = "interrupt-controller";
62 compatible = "fsl,mpc5200-pic"; 62 compatible = "fsl,mpc5200-pic";
63 reg = <0x500 0x80>; 63 reg = <0x500 0x80>;
64 }; 64 };
65 65
66 timer@600 { // General Purpose Timer 66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200-gpt";
68 cell-index = <0>;
69 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
70 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
71 interrupt-parent = <&mpc5200_pic>;
72 fsl,has-wdt; 70 fsl,has-wdt;
73 }; 71 };
74 72
75 timer@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
76 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
77 cell-index = <1>;
78 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
79 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
80 interrupt-parent = <&mpc5200_pic>;
81 }; 77 };
82 78
83 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
84 compatible = "fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200-gpt";
85 cell-index = <2>;
86 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
87 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
88 interrupt-parent = <&mpc5200_pic>;
89 }; 83 };
90 84
91 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200-gpt";
93 cell-index = <3>;
94 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
95 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 }; 89 };
98 90
99 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200-gpt";
101 cell-index = <4>;
102 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
103 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
104 interrupt-parent = <&mpc5200_pic>;
105 }; 95 };
106 96
107 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
109 cell-index = <5>;
110 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
111 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 101 };
114 102
115 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
116 compatible = "fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200-gpt";
117 cell-index = <6>;
118 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
119 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
120 interrupt-parent = <&mpc5200_pic>;
121 }; 107 };
122 108
123 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
124 compatible = "fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200-gpt";
125 cell-index = <7>;
126 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
127 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
128 interrupt-parent = <&mpc5200_pic>;
129 }; 113 };
130 114
131 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200-rtc";
133 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
134 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 }; 119 };
137 120
138 can@900 { 121 can@900 {
139 compatible = "fsl,mpc5200-mscan"; 122 compatible = "fsl,mpc5200-mscan";
140 cell-index = <0>;
141 interrupts = <2 17 0>; 123 interrupts = <2 17 0>;
142 interrupt-parent = <&mpc5200_pic>;
143 reg = <0x900 0x80>; 124 reg = <0x900 0x80>;
144 }; 125 };
145 126
146 can@980 { 127 can@980 {
147 compatible = "fsl,mpc5200-mscan"; 128 compatible = "fsl,mpc5200-mscan";
148 cell-index = <1>;
149 interrupts = <2 18 0>; 129 interrupts = <2 18 0>;
150 interrupt-parent = <&mpc5200_pic>;
151 reg = <0x980 0x80>; 130 reg = <0x980 0x80>;
152 }; 131 };
153 132
@@ -155,39 +134,33 @@
155 compatible = "fsl,mpc5200-gpio"; 134 compatible = "fsl,mpc5200-gpio";
156 reg = <0xb00 0x40>; 135 reg = <0xb00 0x40>;
157 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
158 interrupt-parent = <&mpc5200_pic>;
159 }; 137 };
160 138
161 gpio@c00 { 139 gpio@c00 {
162 compatible = "fsl,mpc5200-gpio-wkup"; 140 compatible = "fsl,mpc5200-gpio-wkup";
163 reg = <0xc00 0x40>; 141 reg = <0xc00 0x40>;
164 interrupts = <1 8 0 0 3 0>; 142 interrupts = <1 8 0 0 3 0>;
165 interrupt-parent = <&mpc5200_pic>;
166 }; 143 };
167 144
168 spi@f00 { 145 spi@f00 {
169 compatible = "fsl,mpc5200-spi"; 146 compatible = "fsl,mpc5200-spi";
170 reg = <0xf00 0x20>; 147 reg = <0xf00 0x20>;
171 interrupts = <2 13 0 2 14 0>; 148 interrupts = <2 13 0 2 14 0>;
172 interrupt-parent = <&mpc5200_pic>;
173 }; 149 };
174 150
175 usb@1000 { 151 usb@1000 {
176 compatible = "fsl,mpc5200-ohci","ohci-be"; 152 compatible = "fsl,mpc5200-ohci","ohci-be";
177 reg = <0x1000 0xff>; 153 reg = <0x1000 0xff>;
178 interrupts = <2 6 0>; 154 interrupts = <2 6 0>;
179 interrupt-parent = <&mpc5200_pic>;
180 }; 155 };
181 156
182 dma-controller@1200 { 157 dma-controller@1200 {
183 device_type = "dma-controller";
184 compatible = "fsl,mpc5200-bestcomm"; 158 compatible = "fsl,mpc5200-bestcomm";
185 reg = <0x1200 0x80>; 159 reg = <0x1200 0x80>;
186 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 160 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
187 3 4 0 3 5 0 3 6 0 3 7 0 161 3 4 0 3 5 0 3 6 0 3 7 0
188 3 8 0 3 9 0 3 10 0 3 11 0 162 3 8 0 3 9 0 3 10 0 3 11 0
189 3 12 0 3 13 0 3 14 0 3 15 0>; 163 3 12 0 3 13 0 3 14 0 3 15 0>;
190 interrupt-parent = <&mpc5200_pic>;
191 }; 164 };
192 165
193 xlb@1f00 { 166 xlb@1f00 {
@@ -196,13 +169,10 @@
196 }; 169 };
197 170
198 serial@2000 { // PSC1 171 serial@2000 { // PSC1
199 device_type = "serial";
200 compatible = "fsl,mpc5200-psc-uart"; 172 compatible = "fsl,mpc5200-psc-uart";
201 port-number = <0>; // Logical port assignment
202 cell-index = <0>; 173 cell-index = <0>;
203 reg = <0x2000 0x100>; 174 reg = <0x2000 0x100>;
204 interrupts = <2 1 0>; 175 interrupts = <2 1 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 176 };
207 177
208 // PSC2 in ac97 mode example 178 // PSC2 in ac97 mode example
@@ -211,7 +181,6 @@
211 // cell-index = <1>; 181 // cell-index = <1>;
212 // reg = <0x2200 0x100>; 182 // reg = <0x2200 0x100>;
213 // interrupts = <2 2 0>; 183 // interrupts = <2 2 0>;
214 // interrupt-parent = <&mpc5200_pic>;
215 //}; 184 //};
216 185
217 // PSC3 in CODEC mode example 186 // PSC3 in CODEC mode example
@@ -220,27 +189,22 @@
220 // cell-index = <2>; 189 // cell-index = <2>;
221 // reg = <0x2400 0x100>; 190 // reg = <0x2400 0x100>;
222 // interrupts = <2 3 0>; 191 // interrupts = <2 3 0>;
223 // interrupt-parent = <&mpc5200_pic>;
224 //}; 192 //};
225 193
226 // PSC4 in uart mode example 194 // PSC4 in uart mode example
227 //serial@2600 { // PSC4 195 //serial@2600 { // PSC4
228 // device_type = "serial";
229 // compatible = "fsl,mpc5200-psc-uart"; 196 // compatible = "fsl,mpc5200-psc-uart";
230 // cell-index = <3>; 197 // cell-index = <3>;
231 // reg = <0x2600 0x100>; 198 // reg = <0x2600 0x100>;
232 // interrupts = <2 11 0>; 199 // interrupts = <2 11 0>;
233 // interrupt-parent = <&mpc5200_pic>;
234 //}; 200 //};
235 201
236 // PSC5 in uart mode example 202 // PSC5 in uart mode example
237 //serial@2800 { // PSC5 203 //serial@2800 { // PSC5
238 // device_type = "serial";
239 // compatible = "fsl,mpc5200-psc-uart"; 204 // compatible = "fsl,mpc5200-psc-uart";
240 // cell-index = <4>; 205 // cell-index = <4>;
241 // reg = <0x2800 0x100>; 206 // reg = <0x2800 0x100>;
242 // interrupts = <2 12 0>; 207 // interrupts = <2 12 0>;
243 // interrupt-parent = <&mpc5200_pic>;
244 //}; 208 //};
245 209
246 // PSC6 in spi mode example 210 // PSC6 in spi mode example
@@ -249,16 +213,13 @@
249 // cell-index = <5>; 213 // cell-index = <5>;
250 // reg = <0x2c00 0x100>; 214 // reg = <0x2c00 0x100>;
251 // interrupts = <2 4 0>; 215 // interrupts = <2 4 0>;
252 // interrupt-parent = <&mpc5200_pic>;
253 //}; 216 //};
254 217
255 ethernet@3000 { 218 ethernet@3000 {
256 device_type = "network";
257 compatible = "fsl,mpc5200-fec"; 219 compatible = "fsl,mpc5200-fec";
258 reg = <0x3000 0x400>; 220 reg = <0x3000 0x400>;
259 local-mac-address = [ 00 00 00 00 00 00 ]; 221 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <2 5 0>; 222 interrupts = <2 5 0>;
261 interrupt-parent = <&mpc5200_pic>;
262 phy-handle = <&phy0>; 223 phy-handle = <&phy0>;
263 }; 224 };
264 225
@@ -268,30 +229,24 @@
268 compatible = "fsl,mpc5200-mdio"; 229 compatible = "fsl,mpc5200-mdio";
269 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 230 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
270 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 231 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
271 interrupt-parent = <&mpc5200_pic>;
272 232
273 phy0: ethernet-phy@1 { 233 phy0: ethernet-phy@1 {
274 device_type = "ethernet-phy";
275 reg = <1>; 234 reg = <1>;
276 }; 235 };
277 }; 236 };
278 237
279 ata@3a00 { 238 ata@3a00 {
280 device_type = "ata";
281 compatible = "fsl,mpc5200-ata"; 239 compatible = "fsl,mpc5200-ata";
282 reg = <0x3a00 0x100>; 240 reg = <0x3a00 0x100>;
283 interrupts = <2 7 0>; 241 interrupts = <2 7 0>;
284 interrupt-parent = <&mpc5200_pic>;
285 }; 242 };
286 243
287 i2c@3d00 { 244 i2c@3d00 {
288 #address-cells = <1>; 245 #address-cells = <1>;
289 #size-cells = <0>; 246 #size-cells = <0>;
290 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 247 compatible = "fsl,mpc5200-i2c","fsl-i2c";
291 cell-index = <0>;
292 reg = <0x3d00 0x40>; 248 reg = <0x3d00 0x40>;
293 interrupts = <2 15 0>; 249 interrupts = <2 15 0>;
294 interrupt-parent = <&mpc5200_pic>;
295 fsl5200-clocking; 250 fsl5200-clocking;
296 }; 251 };
297 252
@@ -299,14 +254,12 @@
299 #address-cells = <1>; 254 #address-cells = <1>;
300 #size-cells = <0>; 255 #size-cells = <0>;
301 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 256 compatible = "fsl,mpc5200-i2c","fsl-i2c";
302 cell-index = <1>;
303 reg = <0x3d40 0x40>; 257 reg = <0x3d40 0x40>;
304 interrupts = <2 16 0>; 258 interrupts = <2 16 0>;
305 interrupt-parent = <&mpc5200_pic>;
306 fsl5200-clocking; 259 fsl5200-clocking;
307 }; 260 };
308 sram@8000 { 261 sram@8000 {
309 compatible = "fsl,mpc5200-sram","sram"; 262 compatible = "fsl,mpc5200-sram";
310 reg = <0x8000 0x4000>; 263 reg = <0x8000 0x4000>;
311 }; 264 };
312 }; 265 };
@@ -325,7 +278,6 @@
325 0xc000 0 0 4 &mpc5200_pic 0 0 3>; 278 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
326 clock-frequency = <0>; // From boot loader 279 clock-frequency = <0>; // From boot loader
327 interrupts = <2 8 0 2 9 0 2 10 0>; 280 interrupts = <2 8 0 2 9 0 2 10 0>;
328 interrupt-parent = <&mpc5200_pic>;
329 bus-range = <0 0>; 281 bus-range = <0 0>;
330 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 282 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
331 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 283 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 63e3bb48e843..c63e3566479e 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -17,6 +17,7 @@
17 compatible = "fsl,lite5200b"; 17 compatible = "fsl,lite5200b";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -58,136 +59,112 @@
58 // 5200 interrupts are encoded into two levels; 59 // 5200 interrupts are encoded into two levels;
59 interrupt-controller; 60 interrupt-controller;
60 #interrupt-cells = <3>; 61 #interrupt-cells = <3>;
61 device_type = "interrupt-controller";
62 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 62 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
63 reg = <0x500 0x80>; 63 reg = <0x500 0x80>;
64 }; 64 };
65 65
66 timer@600 { // General Purpose Timer 66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
68 cell-index = <0>;
69 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
70 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
71 interrupt-parent = <&mpc5200_pic>;
72 fsl,has-wdt; 70 fsl,has-wdt;
73 }; 71 };
74 72
75 timer@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
76 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
77 cell-index = <1>;
78 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
79 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
80 interrupt-parent = <&mpc5200_pic>;
81 }; 77 };
82 78
83 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
84 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
85 cell-index = <2>;
86 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
87 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
88 interrupt-parent = <&mpc5200_pic>;
89 }; 83 };
90 84
91 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
93 cell-index = <3>;
94 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
95 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 }; 89 };
98 90
99 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 cell-index = <4>;
102 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
103 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
104 interrupt-parent = <&mpc5200_pic>;
105 }; 95 };
106 96
107 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
109 cell-index = <5>;
110 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
111 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
112 interrupt-parent = <&mpc5200_pic>;
113 }; 101 };
114 102
115 timer@660 { // General Purpose Timer 103 timer@660 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 cell-index = <6>;
118 reg = <0x660 0x10>; 105 reg = <0x660 0x10>;
119 interrupts = <1 15 0>; 106 interrupts = <1 15 0>;
120 interrupt-parent = <&mpc5200_pic>;
121 }; 107 };
122 108
123 timer@670 { // General Purpose Timer 109 timer@670 { // General Purpose Timer
124 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
125 cell-index = <7>;
126 reg = <0x670 0x10>; 111 reg = <0x670 0x10>;
127 interrupts = <1 16 0>; 112 interrupts = <1 16 0>;
128 interrupt-parent = <&mpc5200_pic>;
129 }; 113 };
130 114
131 rtc@800 { // Real time clock 115 rtc@800 { // Real time clock
132 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 116 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
133 reg = <0x800 0x100>; 117 reg = <0x800 0x100>;
134 interrupts = <1 5 0 1 6 0>; 118 interrupts = <1 5 0 1 6 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 }; 119 };
137 120
138 can@900 { 121 can@900 {
139 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 122 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
140 cell-index = <0>;
141 interrupts = <2 17 0>; 123 interrupts = <2 17 0>;
142 interrupt-parent = <&mpc5200_pic>;
143 reg = <0x900 0x80>; 124 reg = <0x900 0x80>;
144 }; 125 };
145 126
146 can@980 { 127 can@980 {
147 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 128 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
148 cell-index = <1>;
149 interrupts = <2 18 0>; 129 interrupts = <2 18 0>;
150 interrupt-parent = <&mpc5200_pic>;
151 reg = <0x980 0x80>; 130 reg = <0x980 0x80>;
152 }; 131 };
153 132
154 gpio@b00 { 133 gpio_simple: gpio@b00 {
155 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
156 reg = <0xb00 0x40>; 135 reg = <0xb00 0x40>;
157 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
158 interrupt-parent = <&mpc5200_pic>; 137 gpio-controller;
138 #gpio-cells = <2>;
159 }; 139 };
160 140
161 gpio@c00 { 141 gpio_wkup: gpio@c00 {
162 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 142 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
163 reg = <0xc00 0x40>; 143 reg = <0xc00 0x40>;
164 interrupts = <1 8 0 0 3 0>; 144 interrupts = <1 8 0 0 3 0>;
165 interrupt-parent = <&mpc5200_pic>; 145 gpio-controller;
146 #gpio-cells = <2>;
166 }; 147 };
167 148
168 spi@f00 { 149 spi@f00 {
169 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 150 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
170 reg = <0xf00 0x20>; 151 reg = <0xf00 0x20>;
171 interrupts = <2 13 0 2 14 0>; 152 interrupts = <2 13 0 2 14 0>;
172 interrupt-parent = <&mpc5200_pic>;
173 }; 153 };
174 154
175 usb@1000 { 155 usb@1000 {
176 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 156 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
177 reg = <0x1000 0xff>; 157 reg = <0x1000 0xff>;
178 interrupts = <2 6 0>; 158 interrupts = <2 6 0>;
179 interrupt-parent = <&mpc5200_pic>;
180 }; 159 };
181 160
182 dma-controller@1200 { 161 dma-controller@1200 {
183 device_type = "dma-controller";
184 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
185 reg = <0x1200 0x80>; 163 reg = <0x1200 0x80>;
186 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
187 3 4 0 3 5 0 3 6 0 3 7 0 165 3 4 0 3 5 0 3 6 0 3 7 0
188 3 8 0 3 9 0 3 10 0 3 11 0 166 3 8 0 3 9 0 3 10 0 3 11 0
189 3 12 0 3 13 0 3 14 0 3 15 0>; 167 3 12 0 3 13 0 3 14 0 3 15 0>;
190 interrupt-parent = <&mpc5200_pic>;
191 }; 168 };
192 169
193 xlb@1f00 { 170 xlb@1f00 {
@@ -196,13 +173,10 @@
196 }; 173 };
197 174
198 serial@2000 { // PSC1 175 serial@2000 { // PSC1
199 device_type = "serial";
200 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 176 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
201 port-number = <0>; // Logical port assignment
202 cell-index = <0>; 177 cell-index = <0>;
203 reg = <0x2000 0x100>; 178 reg = <0x2000 0x100>;
204 interrupts = <2 1 0>; 179 interrupts = <2 1 0>;
205 interrupt-parent = <&mpc5200_pic>;
206 }; 180 };
207 181
208 // PSC2 in ac97 mode example 182 // PSC2 in ac97 mode example
@@ -211,7 +185,6 @@
211 // cell-index = <1>; 185 // cell-index = <1>;
212 // reg = <0x2200 0x100>; 186 // reg = <0x2200 0x100>;
213 // interrupts = <2 2 0>; 187 // interrupts = <2 2 0>;
214 // interrupt-parent = <&mpc5200_pic>;
215 //}; 188 //};
216 189
217 // PSC3 in CODEC mode example 190 // PSC3 in CODEC mode example
@@ -220,27 +193,22 @@
220 // cell-index = <2>; 193 // cell-index = <2>;
221 // reg = <0x2400 0x100>; 194 // reg = <0x2400 0x100>;
222 // interrupts = <2 3 0>; 195 // interrupts = <2 3 0>;
223 // interrupt-parent = <&mpc5200_pic>;
224 //}; 196 //};
225 197
226 // PSC4 in uart mode example 198 // PSC4 in uart mode example
227 //serial@2600 { // PSC4 199 //serial@2600 { // PSC4
228 // device_type = "serial";
229 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 200 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
230 // cell-index = <3>; 201 // cell-index = <3>;
231 // reg = <0x2600 0x100>; 202 // reg = <0x2600 0x100>;
232 // interrupts = <2 11 0>; 203 // interrupts = <2 11 0>;
233 // interrupt-parent = <&mpc5200_pic>;
234 //}; 204 //};
235 205
236 // PSC5 in uart mode example 206 // PSC5 in uart mode example
237 //serial@2800 { // PSC5 207 //serial@2800 { // PSC5
238 // device_type = "serial";
239 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 208 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
240 // cell-index = <4>; 209 // cell-index = <4>;
241 // reg = <0x2800 0x100>; 210 // reg = <0x2800 0x100>;
242 // interrupts = <2 12 0>; 211 // interrupts = <2 12 0>;
243 // interrupt-parent = <&mpc5200_pic>;
244 //}; 212 //};
245 213
246 // PSC6 in spi mode example 214 // PSC6 in spi mode example
@@ -249,49 +217,40 @@
249 // cell-index = <5>; 217 // cell-index = <5>;
250 // reg = <0x2c00 0x100>; 218 // reg = <0x2c00 0x100>;
251 // interrupts = <2 4 0>; 219 // interrupts = <2 4 0>;
252 // interrupt-parent = <&mpc5200_pic>;
253 //}; 220 //};
254 221
255 ethernet@3000 { 222 ethernet@3000 {
256 device_type = "network";
257 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 223 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
258 reg = <0x3000 0x400>; 224 reg = <0x3000 0x400>;
259 local-mac-address = [ 00 00 00 00 00 00 ]; 225 local-mac-address = [ 00 00 00 00 00 00 ];
260 interrupts = <2 5 0>; 226 interrupts = <2 5 0>;
261 interrupt-parent = <&mpc5200_pic>;
262 phy-handle = <&phy0>; 227 phy-handle = <&phy0>;
263 }; 228 };
264 229
265 mdio@3000 { 230 mdio@3000 {
266 #address-cells = <1>; 231 #address-cells = <1>;
267 #size-cells = <0>; 232 #size-cells = <0>;
268 compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; 233 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
269 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 234 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
270 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 235 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
271 interrupt-parent = <&mpc5200_pic>;
272 236
273 phy0: ethernet-phy@0 { 237 phy0: ethernet-phy@0 {
274 device_type = "ethernet-phy";
275 reg = <0>; 238 reg = <0>;
276 }; 239 };
277 }; 240 };
278 241
279 ata@3a00 { 242 ata@3a00 {
280 device_type = "ata";
281 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 243 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
282 reg = <0x3a00 0x100>; 244 reg = <0x3a00 0x100>;
283 interrupts = <2 7 0>; 245 interrupts = <2 7 0>;
284 interrupt-parent = <&mpc5200_pic>;
285 }; 246 };
286 247
287 i2c@3d00 { 248 i2c@3d00 {
288 #address-cells = <1>; 249 #address-cells = <1>;
289 #size-cells = <0>; 250 #size-cells = <0>;
290 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 251 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
291 cell-index = <0>;
292 reg = <0x3d00 0x40>; 252 reg = <0x3d00 0x40>;
293 interrupts = <2 15 0>; 253 interrupts = <2 15 0>;
294 interrupt-parent = <&mpc5200_pic>;
295 fsl5200-clocking; 254 fsl5200-clocking;
296 }; 255 };
297 256
@@ -299,14 +258,13 @@
299 #address-cells = <1>; 258 #address-cells = <1>;
300 #size-cells = <0>; 259 #size-cells = <0>;
301 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 260 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
302 cell-index = <1>;
303 reg = <0x3d40 0x40>; 261 reg = <0x3d40 0x40>;
304 interrupts = <2 16 0>; 262 interrupts = <2 16 0>;
305 interrupt-parent = <&mpc5200_pic>;
306 fsl5200-clocking; 263 fsl5200-clocking;
307 }; 264 };
265
308 sram@8000 { 266 sram@8000 {
309 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; 267 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
310 reg = <0x8000 0x4000>; 268 reg = <0x8000 0x4000>;
311 }; 269 };
312 }; 270 };
@@ -330,7 +288,6 @@
330 0xc800 0 0 4 &mpc5200_pic 0 0 3>; 288 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
331 clock-frequency = <0>; // From boot loader 289 clock-frequency = <0>; // From boot loader
332 interrupts = <2 8 0 2 9 0 2 10 0>; 290 interrupts = <2 8 0 2 9 0 2 10 0>;
333 interrupt-parent = <&mpc5200_pic>;
334 bus-range = <0 0>; 291 bus-range = <0 0>;
335 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 292 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
336 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 293 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
new file mode 100644
index 000000000000..e297d8b41875
--- /dev/null
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -0,0 +1,318 @@
1/*
2 * Freescale Media5200 board Device Tree Source
3 *
4 * Copyright 2009 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
6 * Steven Cavanagh <scavanagh@secretlab.ca>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "fsl,media5200";
18 compatible = "fsl,media5200";
19 #address-cells = <1>;
20 #size-cells = <1>;
21 interrupt-parent = <&mpc5200_pic>;
22
23 aliases {
24 console = &console;
25 ethernet0 = &eth0;
26 };
27
28 chosen {
29 linux,stdout-path = &console;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,5200@0 {
37 device_type = "cpu";
38 reg = <0>;
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <0x4000>; // L1, 16K
42 i-cache-size = <0x4000>; // L1, 16K
43 timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot
44 bus-frequency = <132000000>; // 132 MHz
45 clock-frequency = <396000000>; // 396 MHz
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x08000000>; // 128MB RAM
52 };
53
54 soc@f0000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "fsl,mpc5200b-immr";
58 ranges = <0 0xf0000000 0x0000c000>;
59 reg = <0xf0000000 0x00000100>;
60 bus-frequency = <132000000>;// 132 MHz
61 system-frequency = <0>; // from bootloader
62
63 cdm@200 {
64 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
65 reg = <0x200 0x38>;
66 };
67
68 mpc5200_pic: interrupt-controller@500 {
69 // 5200 interrupts are encoded into two levels;
70 interrupt-controller;
71 #interrupt-cells = <3>;
72 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
73 reg = <0x500 0x80>;
74 };
75
76 timer@600 { // General Purpose Timer
77 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
78 reg = <0x600 0x10>;
79 interrupts = <1 9 0>;
80 fsl,has-wdt;
81 };
82
83 timer@610 { // General Purpose Timer
84 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
85 reg = <0x610 0x10>;
86 interrupts = <1 10 0>;
87 };
88
89 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
91 reg = <0x620 0x10>;
92 interrupts = <1 11 0>;
93 };
94
95 timer@630 { // General Purpose Timer
96 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
97 reg = <0x630 0x10>;
98 interrupts = <1 12 0>;
99 };
100
101 timer@640 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x640 0x10>;
104 interrupts = <1 13 0>;
105 };
106
107 timer@650 { // General Purpose Timer
108 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
109 reg = <0x650 0x10>;
110 interrupts = <1 14 0>;
111 };
112
113 timer@660 { // General Purpose Timer
114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
115 reg = <0x660 0x10>;
116 interrupts = <1 15 0>;
117 };
118
119 timer@670 { // General Purpose Timer
120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
121 reg = <0x670 0x10>;
122 interrupts = <1 16 0>;
123 };
124
125 rtc@800 { // Real time clock
126 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
127 reg = <0x800 0x100>;
128 interrupts = <1 5 0 1 6 0>;
129 };
130
131 can@900 {
132 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
133 interrupts = <2 17 0>;
134 reg = <0x900 0x80>;
135 };
136
137 can@980 {
138 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
139 interrupts = <2 18 0>;
140 reg = <0x980 0x80>;
141 };
142
143 gpio_simple: gpio@b00 {
144 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
145 reg = <0xb00 0x40>;
146 interrupts = <1 7 0>;
147 gpio-controller;
148 #gpio-cells = <2>;
149 };
150
151 gpio_wkup: gpio@c00 {
152 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
153 reg = <0xc00 0x40>;
154 interrupts = <1 8 0 0 3 0>;
155 gpio-controller;
156 #gpio-cells = <2>;
157 };
158
159 spi@f00 {
160 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
161 reg = <0xf00 0x20>;
162 interrupts = <2 13 0 2 14 0>;
163 };
164
165 usb@1000 {
166 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
167 reg = <0x1000 0x100>;
168 interrupts = <2 6 0>;
169 };
170
171 dma-controller@1200 {
172 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
173 reg = <0x1200 0x80>;
174 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
175 3 4 0 3 5 0 3 6 0 3 7 0
176 3 8 0 3 9 0 3 10 0 3 11 0
177 3 12 0 3 13 0 3 14 0 3 15 0>;
178 };
179
180 xlb@1f00 {
181 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
182 reg = <0x1f00 0x100>;
183 };
184
185 // PSC6 in uart mode
186 console: serial@2c00 { // PSC6
187 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
188 cell-index = <5>;
189 port-number = <0>; // Logical port assignment
190 reg = <0x2c00 0x100>;
191 interrupts = <2 4 0>;
192 };
193
194 eth0: ethernet@3000 {
195 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
196 reg = <0x3000 0x400>;
197 local-mac-address = [ 00 00 00 00 00 00 ];
198 interrupts = <2 5 0>;
199 phy-handle = <&phy0>;
200 };
201
202 mdio@3000 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
206 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
207 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
208
209 phy0: ethernet-phy@0 {
210 reg = <0>;
211 };
212 };
213
214 ata@3a00 {
215 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
216 reg = <0x3a00 0x100>;
217 interrupts = <2 7 0>;
218 };
219
220 i2c@3d00 {
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
224 reg = <0x3d00 0x40>;
225 interrupts = <2 15 0>;
226 fsl5200-clocking;
227 };
228
229 i2c@3d40 {
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
233 reg = <0x3d40 0x40>;
234 interrupts = <2 16 0>;
235 fsl5200-clocking;
236 };
237
238 sram@8000 {
239 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
240 reg = <0x8000 0x4000>;
241 };
242 };
243
244 pci@f0000d00 {
245 #interrupt-cells = <1>;
246 #size-cells = <2>;
247 #address-cells = <3>;
248 device_type = "pci";
249 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
250 reg = <0xf0000d00 0x100>;
251 interrupt-map-mask = <0xf800 0 0 7>;
252 interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
253 0xc000 0 0 2 &media5200_fpga 0 3
254 0xc000 0 0 3 &media5200_fpga 0 4
255 0xc000 0 0 4 &media5200_fpga 0 5
256
257 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot
258 0xc800 0 0 2 &media5200_fpga 0 4
259 0xc800 0 0 3 &media5200_fpga 0 5
260 0xc800 0 0 4 &media5200_fpga 0 2
261
262 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI
263 0xd000 0 0 2 &media5200_fpga 0 5
264
265 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
266 >;
267 clock-frequency = <0>; // From boot loader
268 interrupts = <2 8 0 2 9 0 2 10 0>;
269 interrupt-parent = <&mpc5200_pic>;
270 bus-range = <0 0>;
271 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
272 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
273 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
274 };
275
276 localbus {
277 compatible = "fsl,mpc5200b-lpb","simple-bus";
278 #address-cells = <2>;
279 #size-cells = <1>;
280
281 ranges = < 0 0 0xfc000000 0x02000000
282 1 0 0xfe000000 0x02000000
283 2 0 0xf0010000 0x00010000
284 3 0 0xf0020000 0x00010000 >;
285
286 flash@0,0 {
287 compatible = "amd,am29lv28ml", "cfi-flash";
288 reg = <0 0x0 0x2000000>; // 32 MB
289 bank-width = <4>; // Width in bytes of the flash bank
290 device-width = <2>; // Two devices on each bank
291 };
292
293 flash@1,0 {
294 compatible = "amd,am29lv28ml", "cfi-flash";
295 reg = <1 0 0x2000000>; // 32 MB
296 bank-width = <4>; // Width in bytes of the flash bank
297 device-width = <2>; // Two devices on each bank
298 };
299
300 media5200_fpga: fpga@2,0 {
301 compatible = "fsl,media5200-fpga";
302 interrupt-controller;
303 #interrupt-cells = <2>; // 0:bank 1:id; no type field
304 reg = <2 0 0x10000>;
305
306 interrupt-parent = <&mpc5200_pic>;
307 interrupts = <0 0 3 // IRQ bank 0
308 1 1 3>; // IRQ bank 1
309 };
310
311 uart@3,0 {
312 compatible = "ti,tl16c752bpt";
313 reg = <3 0 0x10000>;
314 interrupt-parent = <&media5200_fpga>;
315 interrupts = <0 0 0 1>; // 2 irqs
316 };
317 };
318};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 52ba6f98b273..7be8ca038676 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -17,6 +17,7 @@
17 compatible = "promess,motionpro"; 17 compatible = "promess,motionpro";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,7 +67,6 @@
66 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
@@ -74,35 +74,30 @@
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
75 reg = <0x610 0x10>; 75 reg = <0x610 0x10>;
76 interrupts = <1 10 0>; 76 interrupts = <1 10 0>;
77 interrupt-parent = <&mpc5200_pic>;
78 }; 77 };
79 78
80 timer@620 { // General Purpose Timer 79 timer@620 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>; 81 reg = <0x620 0x10>;
83 interrupts = <1 11 0>; 82 interrupts = <1 11 0>;
84 interrupt-parent = <&mpc5200_pic>;
85 }; 83 };
86 84
87 timer@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <0x630 0x10>; 87 reg = <0x630 0x10>;
90 interrupts = <1 12 0>; 88 interrupts = <1 12 0>;
91 interrupt-parent = <&mpc5200_pic>;
92 }; 89 };
93 90
94 timer@640 { // General Purpose Timer 91 timer@640 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <0x640 0x10>; 93 reg = <0x640 0x10>;
97 interrupts = <1 13 0>; 94 interrupts = <1 13 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 95 };
100 96
101 timer@650 { // General Purpose Timer 97 timer@650 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <0x650 0x10>; 99 reg = <0x650 0x10>;
104 interrupts = <1 14 0>; 100 interrupts = <1 14 0>;
105 interrupt-parent = <&mpc5200_pic>;
106 }; 101 };
107 102
108 motionpro-led@660 { // Motion-PRO status LED 103 motionpro-led@660 { // Motion-PRO status LED
@@ -110,7 +105,6 @@
110 label = "motionpro-statusled"; 105 label = "motionpro-statusled";
111 reg = <0x660 0x10>; 106 reg = <0x660 0x10>;
112 interrupts = <1 15 0>; 107 interrupts = <1 15 0>;
113 interrupt-parent = <&mpc5200_pic>;
114 blink-delay = <100>; // 100 msec 108 blink-delay = <100>; // 100 msec
115 }; 109 };
116 110
@@ -119,49 +113,46 @@
119 label = "motionpro-readyled"; 113 label = "motionpro-readyled";
120 reg = <0x670 0x10>; 114 reg = <0x670 0x10>;
121 interrupts = <1 16 0>; 115 interrupts = <1 16 0>;
122 interrupt-parent = <&mpc5200_pic>;
123 }; 116 };
124 117
125 rtc@800 { // Real time clock 118 rtc@800 { // Real time clock
126 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 119 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
127 reg = <0x800 0x100>; 120 reg = <0x800 0x100>;
128 interrupts = <1 5 0 1 6 0>; 121 interrupts = <1 5 0 1 6 0>;
129 interrupt-parent = <&mpc5200_pic>;
130 }; 122 };
131 123
132 can@980 { 124 can@980 {
133 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 125 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
134 interrupts = <2 18 0>; 126 interrupts = <2 18 0>;
135 interrupt-parent = <&mpc5200_pic>;
136 reg = <0x980 0x80>; 127 reg = <0x980 0x80>;
137 }; 128 };
138 129
139 gpio@b00 { 130 gpio_simple: gpio@b00 {
140 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 131 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
141 reg = <0xb00 0x40>; 132 reg = <0xb00 0x40>;
142 interrupts = <1 7 0>; 133 interrupts = <1 7 0>;
143 interrupt-parent = <&mpc5200_pic>; 134 gpio-controller;
135 #gpio-cells = <2>;
144 }; 136 };
145 137
146 gpio@c00 { 138 gpio_wkup: gpio@c00 {
147 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 139 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
148 reg = <0xc00 0x40>; 140 reg = <0xc00 0x40>;
149 interrupts = <1 8 0 0 3 0>; 141 interrupts = <1 8 0 0 3 0>;
150 interrupt-parent = <&mpc5200_pic>; 142 gpio-controller;
143 #gpio-cells = <2>;
151 }; 144 };
152 145
153 spi@f00 { 146 spi@f00 {
154 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 147 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
155 reg = <0xf00 0x20>; 148 reg = <0xf00 0x20>;
156 interrupts = <2 13 0 2 14 0>; 149 interrupts = <2 13 0 2 14 0>;
157 interrupt-parent = <&mpc5200_pic>;
158 }; 150 };
159 151
160 usb@1000 { 152 usb@1000 {
161 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 153 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
162 reg = <0x1000 0xff>; 154 reg = <0x1000 0xff>;
163 interrupts = <2 6 0>; 155 interrupts = <2 6 0>;
164 interrupt-parent = <&mpc5200_pic>;
165 }; 156 };
166 157
167 dma-controller@1200 { 158 dma-controller@1200 {
@@ -171,7 +162,6 @@
171 3 4 0 3 5 0 3 6 0 3 7 0 162 3 4 0 3 5 0 3 6 0 3 7 0
172 3 8 0 3 9 0 3 10 0 3 11 0 163 3 8 0 3 9 0 3 10 0 3 11 0
173 3 12 0 3 13 0 3 14 0 3 15 0>; 164 3 12 0 3 13 0 3 14 0 3 15 0>;
174 interrupt-parent = <&mpc5200_pic>;
175 }; 165 };
176 166
177 xlb@1f00 { 167 xlb@1f00 {
@@ -180,12 +170,9 @@
180 }; 170 };
181 171
182 serial@2000 { // PSC1 172 serial@2000 { // PSC1
183 device_type = "serial";
184 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 173 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
185 port-number = <0>; // Logical port assignment
186 reg = <0x2000 0x100>; 174 reg = <0x2000 0x100>;
187 interrupts = <2 1 0>; 175 interrupts = <2 1 0>;
188 interrupt-parent = <&mpc5200_pic>;
189 }; 176 };
190 177
191 // PSC2 in spi master mode 178 // PSC2 in spi master mode
@@ -194,26 +181,20 @@
194 cell-index = <1>; 181 cell-index = <1>;
195 reg = <0x2200 0x100>; 182 reg = <0x2200 0x100>;
196 interrupts = <2 2 0>; 183 interrupts = <2 2 0>;
197 interrupt-parent = <&mpc5200_pic>;
198 }; 184 };
199 185
200 // PSC5 in uart mode 186 // PSC5 in uart mode
201 serial@2800 { // PSC5 187 serial@2800 { // PSC5
202 device_type = "serial";
203 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 188 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
204 port-number = <4>; // Logical port assignment
205 reg = <0x2800 0x100>; 189 reg = <0x2800 0x100>;
206 interrupts = <2 12 0>; 190 interrupts = <2 12 0>;
207 interrupt-parent = <&mpc5200_pic>;
208 }; 191 };
209 192
210 ethernet@3000 { 193 ethernet@3000 {
211 device_type = "network";
212 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 194 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
213 reg = <0x3000 0x400>; 195 reg = <0x3000 0x400>;
214 local-mac-address = [ 00 00 00 00 00 00 ]; 196 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <2 5 0>; 197 interrupts = <2 5 0>;
216 interrupt-parent = <&mpc5200_pic>;
217 phy-handle = <&phy0>; 198 phy-handle = <&phy0>;
218 }; 199 };
219 200
@@ -223,10 +204,8 @@
223 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 204 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
224 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 205 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
225 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 206 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
226 interrupt-parent = <&mpc5200_pic>;
227 207
228 phy0: ethernet-phy@2 { 208 phy0: ethernet-phy@2 {
229 device_type = "ethernet-phy";
230 reg = <2>; 209 reg = <2>;
231 }; 210 };
232 }; 211 };
@@ -235,7 +214,6 @@
235 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 214 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
236 reg = <0x3a00 0x100>; 215 reg = <0x3a00 0x100>;
237 interrupts = <2 7 0>; 216 interrupts = <2 7 0>;
238 interrupt-parent = <&mpc5200_pic>;
239 }; 217 };
240 218
241 i2c@3d40 { 219 i2c@3d40 {
@@ -244,7 +222,6 @@
244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 222 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
245 reg = <0x3d40 0x40>; 223 reg = <0x3d40 0x40>;
246 interrupts = <2 16 0>; 224 interrupts = <2 16 0>;
247 interrupt-parent = <&mpc5200_pic>;
248 fsl5200-clocking; 225 fsl5200-clocking;
249 226
250 rtc@68 { 227 rtc@68 {
@@ -259,8 +236,8 @@
259 }; 236 };
260 }; 237 };
261 238
262 lpb { 239 localbus {
263 compatible = "fsl,lpb"; 240 compatible = "fsl,mpc5200b-lpb","simple-bus";
264 #address-cells = <2>; 241 #address-cells = <2>;
265 #size-cells = <1>; 242 #size-cells = <1>;
266 ranges = <0 0 0xff000000 0x01000000 243 ranges = <0 0 0xff000000 0x01000000
@@ -273,7 +250,6 @@
273 compatible = "promess,motionpro-kollmorgen"; 250 compatible = "promess,motionpro-kollmorgen";
274 reg = <1 0 0x10000>; 251 reg = <1 0 0x10000>;
275 interrupts = <1 1 0>; 252 interrupts = <1 1 0>;
276 interrupt-parent = <&mpc5200_pic>;
277 }; 253 };
278 254
279 // 8-bit board CPLD on LocalPlus Bus CS2 255 // 8-bit board CPLD on LocalPlus Bus CS2
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..88d691cccb38 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -349,4 +351,66 @@
349 compatible = "fsl,mpc8349-pci"; 351 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 352 device_type = "pci";
351 }; 353 };
354
355 pci1: pcie@e0009000 {
356 #address-cells = <3>;
357 #size-cells = <2>;
358 #interrupt-cells = <1>;
359 device_type = "pci";
360 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
361 reg = <0xe0009000 0x00001000>;
362 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
363 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
364 bus-range = <0 255>;
365 interrupt-map-mask = <0xf800 0 0 7>;
366 interrupt-map = <0 0 0 1 &ipic 1 8
367 0 0 0 2 &ipic 1 8
368 0 0 0 3 &ipic 1 8
369 0 0 0 4 &ipic 1 8>;
370 clock-frequency = <0>;
371
372 pcie@0 {
373 #address-cells = <3>;
374 #size-cells = <2>;
375 device_type = "pci";
376 reg = <0 0 0 0 0>;
377 ranges = <0x02000000 0 0xa0000000
378 0x02000000 0 0xa0000000
379 0 0x10000000
380 0x01000000 0 0x00000000
381 0x01000000 0 0x00000000
382 0 0x00800000>;
383 };
384 };
385
386 pci2: pcie@e000a000 {
387 #address-cells = <3>;
388 #size-cells = <2>;
389 #interrupt-cells = <1>;
390 device_type = "pci";
391 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
392 reg = <0xe000a000 0x00001000>;
393 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
394 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
395 bus-range = <0 255>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <0 0 0 1 &ipic 2 8
398 0 0 0 2 &ipic 2 8
399 0 0 0 3 &ipic 2 8
400 0 0 0 4 &ipic 2 8>;
401 clock-frequency = <0>;
402
403 pcie@0 {
404 #address-cells = <3>;
405 #size-cells = <2>;
406 device_type = "pci";
407 reg = <0 0 0 0 0>;
408 ranges = <0x02000000 0 0xc0000000
409 0x02000000 0 0xc0000000
410 0 0x10000000
411 0x01000000 0 0x00000000
412 0x01000000 0 0x00000000
413 0 0x00800000>;
414 };
415 };
352}; 416};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..3e3ec8fdef49 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 sata@18000 { 325 sata@18000 {
@@ -409,4 +412,66 @@
409 compatible = "fsl,mpc8349-pci"; 412 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 413 device_type = "pci";
411 }; 414 };
415
416 pci1: pcie@e0009000 {
417 #address-cells = <3>;
418 #size-cells = <2>;
419 #interrupt-cells = <1>;
420 device_type = "pci";
421 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
422 reg = <0xe0009000 0x00001000>;
423 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
424 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
425 bus-range = <0 255>;
426 interrupt-map-mask = <0xf800 0 0 7>;
427 interrupt-map = <0 0 0 1 &ipic 1 8
428 0 0 0 2 &ipic 1 8
429 0 0 0 3 &ipic 1 8
430 0 0 0 4 &ipic 1 8>;
431 clock-frequency = <0>;
432
433 pcie@0 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 device_type = "pci";
437 reg = <0 0 0 0 0>;
438 ranges = <0x02000000 0 0xa8000000
439 0x02000000 0 0xa8000000
440 0 0x10000000
441 0x01000000 0 0x00000000
442 0x01000000 0 0x00000000
443 0 0x00800000>;
444 };
445 };
446
447 pci2: pcie@e000a000 {
448 #address-cells = <3>;
449 #size-cells = <2>;
450 #interrupt-cells = <1>;
451 device_type = "pci";
452 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
453 reg = <0xe000a000 0x00001000>;
454 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
455 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
456 bus-range = <0 255>;
457 interrupt-map-mask = <0xf800 0 0 7>;
458 interrupt-map = <0 0 0 1 &ipic 2 8
459 0 0 0 2 &ipic 2 8
460 0 0 0 3 &ipic 2 8
461 0 0 0 4 &ipic 2 8>;
462 clock-frequency = <0>;
463
464 pcie@0 {
465 #address-cells = <3>;
466 #size-cells = <2>;
467 device_type = "pci";
468 reg = <0 0 0 0 0>;
469 ranges = <0x02000000 0 0xc8000000
470 0x02000000 0 0xc8000000
471 0 0x10000000
472 0x01000000 0 0x00000000
473 0x01000000 0 0x00000000
474 0 0x00800000>;
475 };
476 };
412}; 477};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..fb1d884348ec 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -289,6 +320,15 @@
289 fsl,descriptor-types-mask = <0x3ab0ebf>; 320 fsl,descriptor-types-mask = <0x3ab0ebf>;
290 }; 321 };
291 322
323 sdhci@2e000 {
324 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
325 reg = <0x2e000 0x1000>;
326 interrupts = <42 0x8>;
327 interrupt-parent = <&ipic>;
328 /* Filled in by U-Boot */
329 clock-frequency = <0>;
330 };
331
292 sata@18000 { 332 sata@18000 {
293 compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 333 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
294 reg = <0x18000 0x1000>; 334 reg = <0x18000 0x1000>;
@@ -350,4 +390,66 @@
350 compatible = "fsl,mpc8349-pci"; 390 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 391 device_type = "pci";
352 }; 392 };
393
394 pci1: pcie@e0009000 {
395 #address-cells = <3>;
396 #size-cells = <2>;
397 #interrupt-cells = <1>;
398 device_type = "pci";
399 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
400 reg = <0xe0009000 0x00001000>;
401 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
402 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
403 bus-range = <0 255>;
404 interrupt-map-mask = <0xf800 0 0 7>;
405 interrupt-map = <0 0 0 1 &ipic 1 8
406 0 0 0 2 &ipic 1 8
407 0 0 0 3 &ipic 1 8
408 0 0 0 4 &ipic 1 8>;
409 clock-frequency = <0>;
410
411 pcie@0 {
412 #address-cells = <3>;
413 #size-cells = <2>;
414 device_type = "pci";
415 reg = <0 0 0 0 0>;
416 ranges = <0x02000000 0 0xa8000000
417 0x02000000 0 0xa8000000
418 0 0x10000000
419 0x01000000 0 0x00000000
420 0x01000000 0 0x00000000
421 0 0x00800000>;
422 };
423 };
424
425 pci2: pcie@e000a000 {
426 #address-cells = <3>;
427 #size-cells = <2>;
428 #interrupt-cells = <1>;
429 device_type = "pci";
430 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
431 reg = <0xe000a000 0x00001000>;
432 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
433 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
434 bus-range = <0 255>;
435 interrupt-map-mask = <0xf800 0 0 7>;
436 interrupt-map = <0 0 0 1 &ipic 2 8
437 0 0 0 2 &ipic 2 8
438 0 0 0 3 &ipic 2 8
439 0 0 0 4 &ipic 2 8>;
440 clock-frequency = <0>;
441
442 pcie@0 {
443 #address-cells = <3>;
444 #size-cells = <2>;
445 device_type = "pci";
446 reg = <0 0 0 0 0>;
447 ranges = <0x02000000 0 0xc8000000
448 0x02000000 0 0xc8000000
449 0 0x10000000
450 0x01000000 0 0x00000000
451 0x01000000 0 0x00000000
452 0 0x00800000>;
453 };
454 };
353}; 455};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..c3b212cf9025 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 /* IPIC 325 /* IPIC
@@ -395,4 +398,66 @@
395 compatible = "fsl,mpc8349-pci"; 398 compatible = "fsl,mpc8349-pci";
396 device_type = "pci"; 399 device_type = "pci";
397 }; 400 };
401
402 pci1: pcie@e0009000 {
403 #address-cells = <3>;
404 #size-cells = <2>;
405 #interrupt-cells = <1>;
406 device_type = "pci";
407 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
408 reg = <0xe0009000 0x00001000>;
409 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
410 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
411 bus-range = <0 255>;
412 interrupt-map-mask = <0xf800 0 0 7>;
413 interrupt-map = <0 0 0 1 &ipic 1 8
414 0 0 0 2 &ipic 1 8
415 0 0 0 3 &ipic 1 8
416 0 0 0 4 &ipic 1 8>;
417 clock-frequency = <0>;
418
419 pcie@0 {
420 #address-cells = <3>;
421 #size-cells = <2>;
422 device_type = "pci";
423 reg = <0 0 0 0 0>;
424 ranges = <0x02000000 0 0xa8000000
425 0x02000000 0 0xa8000000
426 0 0x10000000
427 0x01000000 0 0x00000000
428 0x01000000 0 0x00000000
429 0 0x00800000>;
430 };
431 };
432
433 pci2: pcie@e000a000 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 #interrupt-cells = <1>;
437 device_type = "pci";
438 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
439 reg = <0xe000a000 0x00001000>;
440 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
441 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
442 bus-range = <0 255>;
443 interrupt-map-mask = <0xf800 0 0 7>;
444 interrupt-map = <0 0 0 1 &ipic 2 8
445 0 0 0 2 &ipic 2 8
446 0 0 0 3 &ipic 2 8
447 0 0 0 4 &ipic 2 8>;
448 clock-frequency = <0>;
449
450 pcie@0 {
451 #address-cells = <3>;
452 #size-cells = <2>;
453 device_type = "pci";
454 reg = <0 0 0 0 0>;
455 ranges = <0x02000000 0 0xc8000000
456 0x02000000 0 0xc8000000
457 0 0x10000000
458 0x01000000 0 0x00000000
459 0x01000000 0 0x00000000
460 0 0x00800000>;
461 };
462 };
398}; 463};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..37c8555cc8d4 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -287,6 +318,15 @@
287 fsl,descriptor-types-mask = <0x3ab0ebf>; 318 fsl,descriptor-types-mask = <0x3ab0ebf>;
288 }; 319 };
289 320
321 sdhci@2e000 {
322 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
323 reg = <0x2e000 0x1000>;
324 interrupts = <42 0x8>;
325 interrupt-parent = <&ipic>;
326 /* Filled in by U-Boot */
327 clock-frequency = <0>;
328 };
329
290 /* IPIC 330 /* IPIC
291 * interrupts cell = <intr #, sense> 331 * interrupts cell = <intr #, sense>
292 * sense values match linux IORESOURCE_IRQ_* defines: 332 * sense values match linux IORESOURCE_IRQ_* defines:
@@ -334,4 +374,66 @@
334 compatible = "fsl,mpc8349-pci"; 374 compatible = "fsl,mpc8349-pci";
335 device_type = "pci"; 375 device_type = "pci";
336 }; 376 };
377
378 pci1: pcie@e0009000 {
379 #address-cells = <3>;
380 #size-cells = <2>;
381 #interrupt-cells = <1>;
382 device_type = "pci";
383 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
384 reg = <0xe0009000 0x00001000>;
385 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
386 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
387 bus-range = <0 255>;
388 interrupt-map-mask = <0xf800 0 0 7>;
389 interrupt-map = <0 0 0 1 &ipic 1 8
390 0 0 0 2 &ipic 1 8
391 0 0 0 3 &ipic 1 8
392 0 0 0 4 &ipic 1 8>;
393 clock-frequency = <0>;
394
395 pcie@0 {
396 #address-cells = <3>;
397 #size-cells = <2>;
398 device_type = "pci";
399 reg = <0 0 0 0 0>;
400 ranges = <0x02000000 0 0xa8000000
401 0x02000000 0 0xa8000000
402 0 0x10000000
403 0x01000000 0 0x00000000
404 0x01000000 0 0x00000000
405 0 0x00800000>;
406 };
407 };
408
409 pci2: pcie@e000a000 {
410 #address-cells = <3>;
411 #size-cells = <2>;
412 #interrupt-cells = <1>;
413 device_type = "pci";
414 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
415 reg = <0xe000a000 0x00001000>;
416 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
417 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
418 bus-range = <0 255>;
419 interrupt-map-mask = <0xf800 0 0 7>;
420 interrupt-map = <0 0 0 1 &ipic 2 8
421 0 0 0 2 &ipic 2 8
422 0 0 0 3 &ipic 2 8
423 0 0 0 4 &ipic 2 8>;
424 clock-frequency = <0>;
425
426 pcie@0 {
427 #address-cells = <3>;
428 #size-cells = <2>;
429 device_type = "pci";
430 reg = <0 0 0 0 0>;
431 ranges = <0x02000000 0 0xc8000000
432 0x02000000 0 0xc8000000
433 0 0x10000000
434 0x01000000 0 0x00000000
435 0x01000000 0 0x00000000
436 0 0x00800000>;
437 };
438 };
337}; 439};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c438dbf..1b61cda1eb47 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -310,12 +310,13 @@
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 310 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 311 };
312 312
313 sdhc@2e000 { 313 sdhci@2e000 {
314 model = "eSDHC"; 314 compatible = "fsl,mpc8379-esdhc";
315 compatible = "fsl,esdhc";
316 reg = <0x2e000 0x1000>; 315 reg = <0x2e000 0x1000>;
317 interrupts = <42 0x8>; 316 interrupts = <42 0x8>;
318 interrupt-parent = <&ipic>; 317 interrupt-parent = <&ipic>;
318 /* Filled in by U-Boot */
319 clock-frequency = <0>;
319 }; 320 };
320 321
321 sata@18000 { 322 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c4c7e3..e2f98e6a51a2 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -107,6 +107,24 @@
107 reg = <0x200 0x100>; 107 reg = <0x200 0x100>;
108 }; 108 };
109 109
110 gpio1: gpio-controller@c00 {
111 #gpio-cells = <2>;
112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
113 reg = <0xc00 0x100>;
114 interrupts = <74 0x8>;
115 interrupt-parent = <&ipic>;
116 gpio-controller;
117 };
118
119 gpio2: gpio-controller@d00 {
120 #gpio-cells = <2>;
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
122 reg = <0xd00 0x100>;
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
125 gpio-controller;
126 };
127
110 i2c@3000 { 128 i2c@3000 {
111 #address-cells = <1>; 129 #address-cells = <1>;
112 #size-cells = <0>; 130 #size-cells = <0>;
@@ -116,6 +134,17 @@
116 interrupts = <14 0x8>; 134 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 135 interrupt-parent = <&ipic>;
118 dfsrr; 136 dfsrr;
137
138 dtt@48 {
139 compatible = "national,lm75";
140 reg = <0x48>;
141 };
142
143 at24@50 {
144 compatible = "at24,24c256";
145 reg = <0x50>;
146 };
147
119 rtc@68 { 148 rtc@68 {
120 compatible = "dallas,ds1339"; 149 compatible = "dallas,ds1339";
121 reg = <0x68>; 150 reg = <0x68>;
@@ -288,6 +317,15 @@
288 fsl,descriptor-types-mask = <0x3ab0ebf>; 317 fsl,descriptor-types-mask = <0x3ab0ebf>;
289 }; 318 };
290 319
320 sdhci@2e000 {
321 compatible = "fsl,mpc8379-esdhc";
322 reg = <0x2e000 0x1000>;
323 interrupts = <42 0x8>;
324 interrupt-parent = <&ipic>;
325 /* Filled in by U-Boot */
326 clock-frequency = <0>;
327 };
328
291 sata@18000 { 329 sata@18000 {
292 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 330 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
293 reg = <0x18000 0x1000>; 331 reg = <0x18000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 359c3b727420..6c9354b2d7b7 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8572 DS Device Tree Source 2 * MPC8572 DS Device Tree Source
3 * 3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc. 4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -643,7 +643,7 @@
643 643
644 0x1000000 0x0 0x0 644 0x1000000 0x0 0x0
645 0x1000000 0x0 0x0 645 0x1000000 0x0 0x0
646 0x0 0x100000>; 646 0x0 0x10000>;
647 uli1575@0 { 647 uli1575@0 {
648 reg = <0x0 0x0 0x0 0x0 0x0>; 648 reg = <0x0 0x0 0x0 0x0 0x0>;
649 #size-cells = <2>; 649 #size-cells = <2>;
@@ -654,7 +654,7 @@
654 654
655 0x1000000 0x0 0x0 655 0x1000000 0x0 0x0
656 0x1000000 0x0 0x0 656 0x1000000 0x0 0x0
657 0x0 0x100000>; 657 0x0 0x10000>;
658 isa@1e { 658 isa@1e {
659 device_type = "isa"; 659 device_type = "isa";
660 #interrupt-cells = <2>; 660 #interrupt-cells = <2>;
@@ -744,7 +744,7 @@
744 744
745 0x1000000 0x0 0x0 745 0x1000000 0x0 0x0
746 0x1000000 0x0 0x0 746 0x1000000 0x0 0x0
747 0x0 0x100000>; 747 0x0 0x10000>;
748 }; 748 };
749 }; 749 };
750 750
@@ -781,7 +781,7 @@
781 781
782 0x1000000 0x0 0x0 782 0x1000000 0x0 0x0
783 0x1000000 0x0 0x0 783 0x1000000 0x0 0x0
784 0x0 0x100000>; 784 0x0 0x10000>;
785 }; 785 };
786 }; 786 };
787}; 787};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
new file mode 100644
index 000000000000..fc7dbf49f4cc
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -0,0 +1,787 @@
1/*
2 * MPC8572 DS Device Tree Source
3 *
4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13/ {
14 model = "fsl,MPC8572DS";
15 compatible = "fsl,MPC8572DS";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 ethernet3 = &enet3;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 pci1 = &pci1;
28 pci2 = &pci2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 PowerPC,8572@0 {
36 device_type = "cpu";
37 reg = <0x0>;
38 d-cache-line-size = <32>; // 32 bytes
39 i-cache-line-size = <32>; // 32 bytes
40 d-cache-size = <0x8000>; // L1, 32K
41 i-cache-size = <0x8000>; // L1, 32K
42 timebase-frequency = <0>;
43 bus-frequency = <0>;
44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
46 };
47
48 PowerPC,8572@1 {
49 device_type = "cpu";
50 reg = <0x1>;
51 d-cache-line-size = <32>; // 32 bytes
52 i-cache-line-size = <32>; // 32 bytes
53 d-cache-size = <0x8000>; // L1, 32K
54 i-cache-size = <0x8000>; // L1, 32K
55 timebase-frequency = <0>;
56 bus-frequency = <0>;
57 clock-frequency = <0>;
58 next-level-cache = <&L2>;
59 };
60 };
61
62 memory {
63 device_type = "memory";
64 };
65
66 localbus@fffe05000 {
67 #address-cells = <2>;
68 #size-cells = <1>;
69 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
70 reg = <0xf 0xffe05000 0 0x1000>;
71 interrupts = <19 2>;
72 interrupt-parent = <&mpic>;
73
74 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
75 0x1 0x0 0xf 0xe0000000 0x08000000
76 0x2 0x0 0xf 0xffa00000 0x00040000
77 0x3 0x0 0xf 0xffdf0000 0x00008000
78 0x4 0x0 0xf 0xffa40000 0x00040000
79 0x5 0x0 0xf 0xffa80000 0x00040000
80 0x6 0x0 0xf 0xffac0000 0x00040000>;
81
82 nor@0,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x8000000>;
87 bank-width = <2>;
88 device-width = <1>;
89
90 ramdisk@0 {
91 reg = <0x0 0x03000000>;
92 read-only;
93 };
94
95 diagnostic@3000000 {
96 reg = <0x03000000 0x00e00000>;
97 read-only;
98 };
99
100 dink@3e00000 {
101 reg = <0x03e00000 0x00200000>;
102 read-only;
103 };
104
105 kernel@4000000 {
106 reg = <0x04000000 0x00400000>;
107 read-only;
108 };
109
110 jffs2@4400000 {
111 reg = <0x04400000 0x03b00000>;
112 };
113
114 dtb@7f00000 {
115 reg = <0x07f00000 0x00080000>;
116 read-only;
117 };
118
119 u-boot@7f80000 {
120 reg = <0x07f80000 0x00080000>;
121 read-only;
122 };
123 };
124
125 nand@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8572-fcm-nand",
129 "fsl,elbc-fcm-nand";
130 reg = <0x2 0x0 0x40000>;
131
132 u-boot@0 {
133 reg = <0x0 0x02000000>;
134 read-only;
135 };
136
137 jffs2@2000000 {
138 reg = <0x02000000 0x10000000>;
139 };
140
141 ramdisk@12000000 {
142 reg = <0x12000000 0x08000000>;
143 read-only;
144 };
145
146 kernel@1a000000 {
147 reg = <0x1a000000 0x04000000>;
148 };
149
150 dtb@1e000000 {
151 reg = <0x1e000000 0x01000000>;
152 read-only;
153 };
154
155 empty@1f000000 {
156 reg = <0x1f000000 0x21000000>;
157 };
158 };
159
160 nand@4,0 {
161 compatible = "fsl,mpc8572-fcm-nand",
162 "fsl,elbc-fcm-nand";
163 reg = <0x4 0x0 0x40000>;
164 };
165
166 nand@5,0 {
167 compatible = "fsl,mpc8572-fcm-nand",
168 "fsl,elbc-fcm-nand";
169 reg = <0x5 0x0 0x40000>;
170 };
171
172 nand@6,0 {
173 compatible = "fsl,mpc8572-fcm-nand",
174 "fsl,elbc-fcm-nand";
175 reg = <0x6 0x0 0x40000>;
176 };
177 };
178
179 soc8572@fffe00000 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 device_type = "soc";
183 compatible = "simple-bus";
184 ranges = <0x0 0xf 0xffe00000 0x100000>;
185 reg = <0xf 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
186 bus-frequency = <0>; // Filled out by uboot.
187
188 memory-controller@2000 {
189 compatible = "fsl,mpc8572-memory-controller";
190 reg = <0x2000 0x1000>;
191 interrupt-parent = <&mpic>;
192 interrupts = <18 2>;
193 };
194
195 memory-controller@6000 {
196 compatible = "fsl,mpc8572-memory-controller";
197 reg = <0x6000 0x1000>;
198 interrupt-parent = <&mpic>;
199 interrupts = <18 2>;
200 };
201
202 L2: l2-cache-controller@20000 {
203 compatible = "fsl,mpc8572-l2-cache-controller";
204 reg = <0x20000 0x1000>;
205 cache-line-size = <32>; // 32 bytes
206 cache-size = <0x100000>; // L2, 1M
207 interrupt-parent = <&mpic>;
208 interrupts = <16 2>;
209 };
210
211 i2c@3000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 cell-index = <0>;
215 compatible = "fsl-i2c";
216 reg = <0x3000 0x100>;
217 interrupts = <43 2>;
218 interrupt-parent = <&mpic>;
219 dfsrr;
220 };
221
222 i2c@3100 {
223 #address-cells = <1>;
224 #size-cells = <0>;
225 cell-index = <1>;
226 compatible = "fsl-i2c";
227 reg = <0x3100 0x100>;
228 interrupts = <43 2>;
229 interrupt-parent = <&mpic>;
230 dfsrr;
231 };
232
233 dma@c300 {
234 #address-cells = <1>;
235 #size-cells = <1>;
236 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
237 reg = <0xc300 0x4>;
238 ranges = <0x0 0xc100 0x200>;
239 cell-index = <1>;
240 dma-channel@0 {
241 compatible = "fsl,mpc8572-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x0 0x80>;
244 cell-index = <0>;
245 interrupt-parent = <&mpic>;
246 interrupts = <76 2>;
247 };
248 dma-channel@80 {
249 compatible = "fsl,mpc8572-dma-channel",
250 "fsl,eloplus-dma-channel";
251 reg = <0x80 0x80>;
252 cell-index = <1>;
253 interrupt-parent = <&mpic>;
254 interrupts = <77 2>;
255 };
256 dma-channel@100 {
257 compatible = "fsl,mpc8572-dma-channel",
258 "fsl,eloplus-dma-channel";
259 reg = <0x100 0x80>;
260 cell-index = <2>;
261 interrupt-parent = <&mpic>;
262 interrupts = <78 2>;
263 };
264 dma-channel@180 {
265 compatible = "fsl,mpc8572-dma-channel",
266 "fsl,eloplus-dma-channel";
267 reg = <0x180 0x80>;
268 cell-index = <3>;
269 interrupt-parent = <&mpic>;
270 interrupts = <79 2>;
271 };
272 };
273
274 dma@21300 {
275 #address-cells = <1>;
276 #size-cells = <1>;
277 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
278 reg = <0x21300 0x4>;
279 ranges = <0x0 0x21100 0x200>;
280 cell-index = <0>;
281 dma-channel@0 {
282 compatible = "fsl,mpc8572-dma-channel",
283 "fsl,eloplus-dma-channel";
284 reg = <0x0 0x80>;
285 cell-index = <0>;
286 interrupt-parent = <&mpic>;
287 interrupts = <20 2>;
288 };
289 dma-channel@80 {
290 compatible = "fsl,mpc8572-dma-channel",
291 "fsl,eloplus-dma-channel";
292 reg = <0x80 0x80>;
293 cell-index = <1>;
294 interrupt-parent = <&mpic>;
295 interrupts = <21 2>;
296 };
297 dma-channel@100 {
298 compatible = "fsl,mpc8572-dma-channel",
299 "fsl,eloplus-dma-channel";
300 reg = <0x100 0x80>;
301 cell-index = <2>;
302 interrupt-parent = <&mpic>;
303 interrupts = <22 2>;
304 };
305 dma-channel@180 {
306 compatible = "fsl,mpc8572-dma-channel",
307 "fsl,eloplus-dma-channel";
308 reg = <0x180 0x80>;
309 cell-index = <3>;
310 interrupt-parent = <&mpic>;
311 interrupts = <23 2>;
312 };
313 };
314
315 mdio@24520 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "fsl,gianfar-mdio";
319 reg = <0x24520 0x20>;
320
321 phy0: ethernet-phy@0 {
322 interrupt-parent = <&mpic>;
323 interrupts = <10 1>;
324 reg = <0x0>;
325 };
326 phy1: ethernet-phy@1 {
327 interrupt-parent = <&mpic>;
328 interrupts = <10 1>;
329 reg = <0x1>;
330 };
331 phy2: ethernet-phy@2 {
332 interrupt-parent = <&mpic>;
333 interrupts = <10 1>;
334 reg = <0x2>;
335 };
336 phy3: ethernet-phy@3 {
337 interrupt-parent = <&mpic>;
338 interrupts = <10 1>;
339 reg = <0x3>;
340 };
341
342 tbi0: tbi-phy@11 {
343 reg = <0x11>;
344 device_type = "tbi-phy";
345 };
346 };
347
348 mdio@25520 {
349 #address-cells = <1>;
350 #size-cells = <0>;
351 compatible = "fsl,gianfar-tbi";
352 reg = <0x25520 0x20>;
353
354 tbi1: tbi-phy@11 {
355 reg = <0x11>;
356 device_type = "tbi-phy";
357 };
358 };
359
360 mdio@26520 {
361 #address-cells = <1>;
362 #size-cells = <0>;
363 compatible = "fsl,gianfar-tbi";
364 reg = <0x26520 0x20>;
365
366 tbi2: tbi-phy@11 {
367 reg = <0x11>;
368 device_type = "tbi-phy";
369 };
370 };
371
372 mdio@27520 {
373 #address-cells = <1>;
374 #size-cells = <0>;
375 compatible = "fsl,gianfar-tbi";
376 reg = <0x27520 0x20>;
377
378 tbi3: tbi-phy@11 {
379 reg = <0x11>;
380 device_type = "tbi-phy";
381 };
382 };
383
384 enet0: ethernet@24000 {
385 cell-index = <0>;
386 device_type = "network";
387 model = "eTSEC";
388 compatible = "gianfar";
389 reg = <0x24000 0x1000>;
390 local-mac-address = [ 00 00 00 00 00 00 ];
391 interrupts = <29 2 30 2 34 2>;
392 interrupt-parent = <&mpic>;
393 tbi-handle = <&tbi0>;
394 phy-handle = <&phy0>;
395 phy-connection-type = "rgmii-id";
396 };
397
398 enet1: ethernet@25000 {
399 cell-index = <1>;
400 device_type = "network";
401 model = "eTSEC";
402 compatible = "gianfar";
403 reg = <0x25000 0x1000>;
404 local-mac-address = [ 00 00 00 00 00 00 ];
405 interrupts = <35 2 36 2 40 2>;
406 interrupt-parent = <&mpic>;
407 tbi-handle = <&tbi1>;
408 phy-handle = <&phy1>;
409 phy-connection-type = "rgmii-id";
410 };
411
412 enet2: ethernet@26000 {
413 cell-index = <2>;
414 device_type = "network";
415 model = "eTSEC";
416 compatible = "gianfar";
417 reg = <0x26000 0x1000>;
418 local-mac-address = [ 00 00 00 00 00 00 ];
419 interrupts = <31 2 32 2 33 2>;
420 interrupt-parent = <&mpic>;
421 tbi-handle = <&tbi2>;
422 phy-handle = <&phy2>;
423 phy-connection-type = "rgmii-id";
424 };
425
426 enet3: ethernet@27000 {
427 cell-index = <3>;
428 device_type = "network";
429 model = "eTSEC";
430 compatible = "gianfar";
431 reg = <0x27000 0x1000>;
432 local-mac-address = [ 00 00 00 00 00 00 ];
433 interrupts = <37 2 38 2 39 2>;
434 interrupt-parent = <&mpic>;
435 tbi-handle = <&tbi3>;
436 phy-handle = <&phy3>;
437 phy-connection-type = "rgmii-id";
438 };
439
440 serial0: serial@4500 {
441 cell-index = <0>;
442 device_type = "serial";
443 compatible = "ns16550";
444 reg = <0x4500 0x100>;
445 clock-frequency = <0>;
446 interrupts = <42 2>;
447 interrupt-parent = <&mpic>;
448 };
449
450 serial1: serial@4600 {
451 cell-index = <1>;
452 device_type = "serial";
453 compatible = "ns16550";
454 reg = <0x4600 0x100>;
455 clock-frequency = <0>;
456 interrupts = <42 2>;
457 interrupt-parent = <&mpic>;
458 };
459
460 global-utilities@e0000 { //global utilities block
461 compatible = "fsl,mpc8572-guts";
462 reg = <0xe0000 0x1000>;
463 fsl,has-rstcr;
464 };
465
466 msi@41600 {
467 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
468 reg = <0x41600 0x80>;
469 msi-available-ranges = <0 0x100>;
470 interrupts = <
471 0xe0 0
472 0xe1 0
473 0xe2 0
474 0xe3 0
475 0xe4 0
476 0xe5 0
477 0xe6 0
478 0xe7 0>;
479 interrupt-parent = <&mpic>;
480 };
481
482 crypto@30000 {
483 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
484 "fsl,sec2.1", "fsl,sec2.0";
485 reg = <0x30000 0x10000>;
486 interrupts = <45 2 58 2>;
487 interrupt-parent = <&mpic>;
488 fsl,num-channels = <4>;
489 fsl,channel-fifo-len = <24>;
490 fsl,exec-units-mask = <0x9fe>;
491 fsl,descriptor-types-mask = <0x3ab0ebf>;
492 };
493
494 mpic: pic@40000 {
495 interrupt-controller;
496 #address-cells = <0>;
497 #interrupt-cells = <2>;
498 reg = <0x40000 0x40000>;
499 compatible = "chrp,open-pic";
500 device_type = "open-pic";
501 };
502 };
503
504 pci0: pcie@fffe08000 {
505 cell-index = <0>;
506 compatible = "fsl,mpc8548-pcie";
507 device_type = "pci";
508 #interrupt-cells = <1>;
509 #size-cells = <2>;
510 #address-cells = <3>;
511 reg = <0xf 0xffe08000 0 0x1000>;
512 bus-range = <0 255>;
513 ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000
514 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
515 clock-frequency = <33333333>;
516 interrupt-parent = <&mpic>;
517 interrupts = <24 2>;
518 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
519 interrupt-map = <
520 /* IDSEL 0x11 func 0 - PCI slot 1 */
521 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
522 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
523 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
524 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
525
526 /* IDSEL 0x11 func 1 - PCI slot 1 */
527 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
528 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
529 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
530 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
531
532 /* IDSEL 0x11 func 2 - PCI slot 1 */
533 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
534 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
535 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
536 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
537
538 /* IDSEL 0x11 func 3 - PCI slot 1 */
539 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
540 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
541 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
542 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
543
544 /* IDSEL 0x11 func 4 - PCI slot 1 */
545 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
546 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
547 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
548 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
549
550 /* IDSEL 0x11 func 5 - PCI slot 1 */
551 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
552 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
553 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
554 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
555
556 /* IDSEL 0x11 func 6 - PCI slot 1 */
557 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
558 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
559 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
560 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
561
562 /* IDSEL 0x11 func 7 - PCI slot 1 */
563 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
564 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
565 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
566 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
567
568 /* IDSEL 0x12 func 0 - PCI slot 2 */
569 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
570 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
571 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
572 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
573
574 /* IDSEL 0x12 func 1 - PCI slot 2 */
575 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
576 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
577 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
578 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
579
580 /* IDSEL 0x12 func 2 - PCI slot 2 */
581 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
582 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
583 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
584 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
585
586 /* IDSEL 0x12 func 3 - PCI slot 2 */
587 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
588 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
589 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
590 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
591
592 /* IDSEL 0x12 func 4 - PCI slot 2 */
593 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
594 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
595 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
596 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
597
598 /* IDSEL 0x12 func 5 - PCI slot 2 */
599 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
600 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
601 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
602 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
603
604 /* IDSEL 0x12 func 6 - PCI slot 2 */
605 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
606 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
607 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
608 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
609
610 /* IDSEL 0x12 func 7 - PCI slot 2 */
611 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
612 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
613 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
614 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
615
616 // IDSEL 0x1c USB
617 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
618 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
619 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
620 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
621
622 // IDSEL 0x1d Audio
623 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
624
625 // IDSEL 0x1e Legacy
626 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
627 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
628
629 // IDSEL 0x1f IDE/SATA
630 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
631 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
632
633 >;
634
635 pcie@0 {
636 reg = <0x0 0x0 0x0 0x0 0x0>;
637 #size-cells = <2>;
638 #address-cells = <3>;
639 device_type = "pci";
640 ranges = <0x2000000 0x0 0xc0000000
641 0x2000000 0x0 0xc0000000
642 0x0 0x20000000
643
644 0x1000000 0x0 0x0
645 0x1000000 0x0 0x0
646 0x0 0x10000>;
647 uli1575@0 {
648 reg = <0x0 0x0 0x0 0x0 0x0>;
649 #size-cells = <2>;
650 #address-cells = <3>;
651 ranges = <0x2000000 0x0 0xc0000000
652 0x2000000 0x0 0xc0000000
653 0x0 0x20000000
654
655 0x1000000 0x0 0x0
656 0x1000000 0x0 0x0
657 0x0 0x10000>;
658 isa@1e {
659 device_type = "isa";
660 #interrupt-cells = <2>;
661 #size-cells = <1>;
662 #address-cells = <2>;
663 reg = <0xf000 0x0 0x0 0x0 0x0>;
664 ranges = <0x1 0x0 0x1000000 0x0 0x0
665 0x1000>;
666 interrupt-parent = <&i8259>;
667
668 i8259: interrupt-controller@20 {
669 reg = <0x1 0x20 0x2
670 0x1 0xa0 0x2
671 0x1 0x4d0 0x2>;
672 interrupt-controller;
673 device_type = "interrupt-controller";
674 #address-cells = <0>;
675 #interrupt-cells = <2>;
676 compatible = "chrp,iic";
677 interrupts = <9 2>;
678 interrupt-parent = <&mpic>;
679 };
680
681 i8042@60 {
682 #size-cells = <0>;
683 #address-cells = <1>;
684 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
685 interrupts = <1 3 12 3>;
686 interrupt-parent =
687 <&i8259>;
688
689 keyboard@0 {
690 reg = <0x0>;
691 compatible = "pnpPNP,303";
692 };
693
694 mouse@1 {
695 reg = <0x1>;
696 compatible = "pnpPNP,f03";
697 };
698 };
699
700 rtc@70 {
701 compatible = "pnpPNP,b00";
702 reg = <0x1 0x70 0x2>;
703 };
704
705 gpio@400 {
706 reg = <0x1 0x400 0x80>;
707 };
708 };
709 };
710 };
711
712 };
713
714 pci1: pcie@fffe09000 {
715 cell-index = <1>;
716 compatible = "fsl,mpc8548-pcie";
717 device_type = "pci";
718 #interrupt-cells = <1>;
719 #size-cells = <2>;
720 #address-cells = <3>;
721 reg = <0xf 0xffe09000 0 0x1000>;
722 bus-range = <0 255>;
723 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
724 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
725 clock-frequency = <33333333>;
726 interrupt-parent = <&mpic>;
727 interrupts = <25 2>;
728 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
729 interrupt-map = <
730 /* IDSEL 0x0 */
731 0000 0x0 0x0 0x1 &mpic 0x4 0x1
732 0000 0x0 0x0 0x2 &mpic 0x5 0x1
733 0000 0x0 0x0 0x3 &mpic 0x6 0x1
734 0000 0x0 0x0 0x4 &mpic 0x7 0x1
735 >;
736 pcie@0 {
737 reg = <0x0 0x0 0x0 0x0 0x0>;
738 #size-cells = <2>;
739 #address-cells = <3>;
740 device_type = "pci";
741 ranges = <0x2000000 0x0 0xc0000000
742 0x2000000 0x0 0xc0000000
743 0x0 0x20000000
744
745 0x1000000 0x0 0x0
746 0x1000000 0x0 0x0
747 0x0 0x10000>;
748 };
749 };
750
751 pci2: pcie@fffe0a000 {
752 cell-index = <2>;
753 compatible = "fsl,mpc8548-pcie";
754 device_type = "pci";
755 #interrupt-cells = <1>;
756 #size-cells = <2>;
757 #address-cells = <3>;
758 reg = <0xf 0xffe0a000 0 0x1000>;
759 bus-range = <0 255>;
760 ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
761 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
762 clock-frequency = <33333333>;
763 interrupt-parent = <&mpic>;
764 interrupts = <26 2>;
765 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
766 interrupt-map = <
767 /* IDSEL 0x0 */
768 0000 0x0 0x0 0x1 &mpic 0x0 0x1
769 0000 0x0 0x0 0x2 &mpic 0x1 0x1
770 0000 0x0 0x0 0x3 &mpic 0x2 0x1
771 0000 0x0 0x0 0x4 &mpic 0x3 0x1
772 >;
773 pcie@0 {
774 reg = <0x0 0x0 0x0 0x0 0x0>;
775 #size-cells = <2>;
776 #address-cells = <3>;
777 device_type = "pci";
778 ranges = <0x2000000 0x0 0xc0000000
779 0x2000000 0x0 0xc0000000
780 0x0 0x20000000
781
782 0x1000000 0x0 0x0
783 0x1000000 0x0 0x0
784 0x0 0x10000>;
785 };
786 };
787};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index fd462efa9e61..32178bfa77d0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -6,7 +6,7 @@
6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, 6 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
7 * eth1, crypto, pci0, pci1. 7 * eth1, crypto, pci0, pci1.
8 * 8 *
9 * Copyright 2007, 2008 Freescale Semiconductor Inc. 9 * Copyright 2007-2009 Freescale Semiconductor Inc.
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 12 * under the terms of the GNU General Public License as published by the
@@ -227,7 +227,7 @@
227 device_type = "open-pic"; 227 device_type = "open-pic";
228 protected-sources = < 228 protected-sources = <
229 31 32 33 37 38 39 /* enet2 enet3 */ 229 31 32 33 37 38 39 /* enet2 enet3 */
230 76 77 78 79 27 42 /* dma2 pci2 serial*/ 230 76 77 78 79 26 42 /* dma2 pci2 serial*/
231 0xe0 0xe1 0xe2 0xe3 /* msi */ 231 0xe0 0xe1 0xe2 0xe3 /* msi */
232 0xe4 0xe5 0xe6 0xe7 232 0xe4 0xe5 0xe6 0xe7
233 >; 233 >;
@@ -376,7 +376,7 @@
376 376
377 0x1000000 0x0 0x0 377 0x1000000 0x0 0x0
378 0x1000000 0x0 0x0 378 0x1000000 0x0 0x0
379 0x0 0x100000>; 379 0x0 0x10000>;
380 uli1575@0 { 380 uli1575@0 {
381 reg = <0x0 0x0 0x0 0x0 0x0>; 381 reg = <0x0 0x0 0x0 0x0 0x0>;
382 #size-cells = <2>; 382 #size-cells = <2>;
@@ -387,7 +387,7 @@
387 387
388 0x1000000 0x0 0x0 388 0x1000000 0x0 0x0
389 0x1000000 0x0 0x0 389 0x1000000 0x0 0x0
390 0x0 0x100000>; 390 0x0 0x10000>;
391 isa@1e { 391 isa@1e {
392 device_type = "isa"; 392 device_type = "isa";
393 #interrupt-cells = <2>; 393 #interrupt-cells = <2>;
@@ -477,7 +477,7 @@
477 477
478 0x1000000 0x0 0x0 478 0x1000000 0x0 0x0
479 0x1000000 0x0 0x0 479 0x1000000 0x0 0x0
480 0x0 0x100000>; 480 0x0 0x10000>;
481 }; 481 };
482 }; 482 };
483}; 483};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index e35230f2ac93..159cb3a875f0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -7,7 +7,7 @@
7 * 7 *
8 * Please note to add "-b 1" for core1's dts compiling. 8 * Please note to add "-b 1" for core1's dts compiling.
9 * 9 *
10 * Copyright 2007, 2008 Freescale Semiconductor Inc. 10 * Copyright 2007-2009 Freescale Semiconductor Inc.
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
@@ -186,7 +186,7 @@
186 protected-sources = < 186 protected-sources = <
187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ 187 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
188 29 30 34 35 36 40 /* enet0 enet1 */ 188 29 30 34 35 36 40 /* enet0 enet1 */
189 24 26 20 21 22 23 /* pcie0 pcie1 dma1 */ 189 24 25 20 21 22 23 /* pci0 pci1 dma1 */
190 43 /* i2c */ 190 43 /* i2c */
191 0x1 0x2 0x3 0x4 /* pci slot */ 191 0x1 0x2 0x3 0x4 /* pci slot */
192 0x9 0xa 0xb 0xc /* usb */ 192 0x9 0xa 0xb 0xc /* usb */
@@ -228,7 +228,7 @@
228 228
229 0x1000000 0x0 0x0 229 0x1000000 0x0 0x0
230 0x1000000 0x0 0x0 230 0x1000000 0x0 0x0
231 0x0 0x100000>; 231 0x0 0x10000>;
232 }; 232 };
233 }; 233 };
234}; 234};
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index f724d72c7b92..1bd3ebe11437 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -217,6 +217,7 @@
217 codec-handle = <&cs4270>; 217 codec-handle = <&cs4270>;
218 fsl,playback-dma = <&dma00>; 218 fsl,playback-dma = <&dma00>;
219 fsl,capture-dma = <&dma01>; 219 fsl,capture-dma = <&dma01>;
220 fsl,fifo-depth = <8>;
220 }; 221 };
221 222
222 ssi@16100 { 223 ssi@16100 {
@@ -225,6 +226,7 @@
225 reg = <0x16100 0x100>; 226 reg = <0x16100 0x100>;
226 interrupt-parent = <&mpic>; 227 interrupt-parent = <&mpic>;
227 interrupts = <63 2>; 228 interrupts = <63 2>;
229 fsl,fifo-depth = <8>;
228 }; 230 };
229 231
230 dma@21300 { 232 dma@21300 {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index be2c11ca0594..895834713894 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -19,6 +19,7 @@
19 compatible = "phytec,pcm030"; 19 compatible = "phytec,pcm030";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 interrupt-parent = <&mpc5200_pic>;
22 23
23 cpus { 24 cpus {
24 #address-cells = <1>; 25 #address-cells = <1>;
@@ -29,26 +30,26 @@
29 reg = <0>; 30 reg = <0>;
30 d-cache-line-size = <32>; 31 d-cache-line-size = <32>;
31 i-cache-line-size = <32>; 32 i-cache-line-size = <32>;
32 d-cache-size = <0x4000>; /* L1, 16K */ 33 d-cache-size = <0x4000>; // L1, 16K
33 i-cache-size = <0x4000>; /* L1, 16K */ 34 i-cache-size = <0x4000>; // L1, 16K
34 timebase-frequency = <0>; /* From Bootloader */ 35 timebase-frequency = <0>; // from bootloader
35 bus-frequency = <0>; /* From Bootloader */ 36 bus-frequency = <0>; // from bootloader
36 clock-frequency = <0>; /* From Bootloader */ 37 clock-frequency = <0>; // from bootloader
37 }; 38 };
38 }; 39 };
39 40
40 memory { 41 memory {
41 device_type = "memory"; 42 device_type = "memory";
42 reg = <0x00000000 0x04000000>; /* 64MB */ 43 reg = <0x00000000 0x04000000>; // 64MB
43 }; 44 };
44 45
45 soc5200@f0000000 { 46 soc5200@f0000000 {
46 #address-cells = <1>; 47 #address-cells = <1>;
47 #size-cells = <1>; 48 #size-cells = <1>;
48 compatible = "fsl,mpc5200b-immr"; 49 compatible = "fsl,mpc5200b-immr";
49 ranges = <0x0 0xf0000000 0x0000c000>; 50 ranges = <0 0xf0000000 0x0000c000>;
50 bus-frequency = <0>; /* From bootloader */ 51 bus-frequency = <0>; // from bootloader
51 system-frequency = <0>; /* From bootloader */ 52 system-frequency = <0>; // from bootloader
52 53
53 cdm@200 { 54 cdm@200 {
54 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
@@ -56,87 +57,70 @@
56 }; 57 };
57 58
58 mpc5200_pic: interrupt-controller@500 { 59 mpc5200_pic: interrupt-controller@500 {
59 /* 5200 interrupts are encoded into two levels; */ 60 // 5200 interrupts are encoded into two levels;
60 interrupt-controller; 61 interrupt-controller;
61 #interrupt-cells = <3>; 62 #interrupt-cells = <3>;
62 device_type = "interrupt-controller";
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>; 64 reg = <0x500 0x80>;
65 }; 65 };
66 66
67 timer@600 { /* General Purpose Timer */ 67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 cell-index = <0>;
70 reg = <0x600 0x10>; 69 reg = <0x600 0x10>;
71 interrupts = <0x1 0x9 0x0>; 70 interrupts = <1 9 0>;
72 interrupt-parent = <&mpc5200_pic>;
73 fsl,has-wdt; 71 fsl,has-wdt;
74 }; 72 };
75 73
76 timer@610 { /* General Purpose Timer */ 74 timer@610 { // General Purpose Timer
77 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
78 cell-index = <1>;
79 reg = <0x610 0x10>; 76 reg = <0x610 0x10>;
80 interrupts = <0x1 0xa 0x0>; 77 interrupts = <1 10 0>;
81 interrupt-parent = <&mpc5200_pic>;
82 }; 78 };
83 79
84 gpt2: timer@620 { /* General Purpose Timer in GPIO mode */ 80 gpt2: timer@620 { // General Purpose Timer in GPIO mode
85 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 81 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
86 cell-index = <2>;
87 reg = <0x620 0x10>; 82 reg = <0x620 0x10>;
88 interrupts = <0x1 0xb 0x0>; 83 interrupts = <1 11 0>;
89 interrupt-parent = <&mpc5200_pic>;
90 gpio-controller; 84 gpio-controller;
91 #gpio-cells = <2>; 85 #gpio-cells = <2>;
92 }; 86 };
93 87
94 gpt3: timer@630 { /* General Purpose Timer in GPIO mode */ 88 gpt3: timer@630 { // General Purpose Timer in GPIO mode
95 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 89 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
96 cell-index = <3>;
97 reg = <0x630 0x10>; 90 reg = <0x630 0x10>;
98 interrupts = <0x1 0xc 0x0>; 91 interrupts = <1 12 0>;
99 interrupt-parent = <&mpc5200_pic>;
100 gpio-controller; 92 gpio-controller;
101 #gpio-cells = <2>; 93 #gpio-cells = <2>;
102 }; 94 };
103 95
104 gpt4: timer@640 { /* General Purpose Timer in GPIO mode */ 96 gpt4: timer@640 { // General Purpose Timer in GPIO mode
105 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 97 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
106 cell-index = <4>;
107 reg = <0x640 0x10>; 98 reg = <0x640 0x10>;
108 interrupts = <0x1 0xd 0x0>; 99 interrupts = <1 13 0>;
109 interrupt-parent = <&mpc5200_pic>;
110 gpio-controller; 100 gpio-controller;
111 #gpio-cells = <2>; 101 #gpio-cells = <2>;
112 }; 102 };
113 103
114 gpt5: timer@650 { /* General Purpose Timer in GPIO mode */ 104 gpt5: timer@650 { // General Purpose Timer in GPIO mode
115 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 105 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
116 cell-index = <5>;
117 reg = <0x650 0x10>; 106 reg = <0x650 0x10>;
118 interrupts = <0x1 0xe 0x0>; 107 interrupts = <1 14 0>;
119 interrupt-parent = <&mpc5200_pic>;
120 gpio-controller; 108 gpio-controller;
121 #gpio-cells = <2>; 109 #gpio-cells = <2>;
122 }; 110 };
123 111
124 gpt6: timer@660 { /* General Purpose Timer in GPIO mode */ 112 gpt6: timer@660 { // General Purpose Timer in GPIO mode
125 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 113 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
126 cell-index = <6>;
127 reg = <0x660 0x10>; 114 reg = <0x660 0x10>;
128 interrupts = <0x1 0xf 0x0>; 115 interrupts = <1 15 0>;
129 interrupt-parent = <&mpc5200_pic>;
130 gpio-controller; 116 gpio-controller;
131 #gpio-cells = <2>; 117 #gpio-cells = <2>;
132 }; 118 };
133 119
134 gpt7: timer@670 { /* General Purpose Timer in GPIO mode */ 120 gpt7: timer@670 { // General Purpose Timer in GPIO mode
135 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; 121 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
136 cell-index = <7>;
137 reg = <0x670 0x10>; 122 reg = <0x670 0x10>;
138 interrupts = <0x1 0x10 0x0>; 123 interrupts = <1 16 0>;
139 interrupt-parent = <&mpc5200_pic>;
140 gpio-controller; 124 gpio-controller;
141 #gpio-cells = <2>; 125 #gpio-cells = <2>;
142 }; 126 };
@@ -144,40 +128,33 @@
144 rtc@800 { // Real time clock 128 rtc@800 { // Real time clock
145 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 129 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
146 reg = <0x800 0x100>; 130 reg = <0x800 0x100>;
147 interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>; 131 interrupts = <1 5 0 1 6 0>;
148 interrupt-parent = <&mpc5200_pic>;
149 }; 132 };
150 133
151 can@900 { 134 can@900 {
152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 135 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
153 cell-index = <0>; 136 interrupts = <2 17 0>;
154 interrupts = <0x2 0x11 0x0>;
155 interrupt-parent = <&mpc5200_pic>;
156 reg = <0x900 0x80>; 137 reg = <0x900 0x80>;
157 }; 138 };
158 139
159 can@980 { 140 can@980 {
160 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; 141 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
161 cell-index = <1>; 142 interrupts = <2 18 0>;
162 interrupts = <0x2 0x12 0x0>;
163 interrupt-parent = <&mpc5200_pic>;
164 reg = <0x980 0x80>; 143 reg = <0x980 0x80>;
165 }; 144 };
166 145
167 gpio_simple: gpio@b00 { 146 gpio_simple: gpio@b00 {
168 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 147 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
169 reg = <0xb00 0x40>; 148 reg = <0xb00 0x40>;
170 interrupts = <0x1 0x7 0x0>; 149 interrupts = <1 7 0>;
171 interrupt-parent = <&mpc5200_pic>;
172 gpio-controller; 150 gpio-controller;
173 #gpio-cells = <2>; 151 #gpio-cells = <2>;
174 }; 152 };
175 153
176 gpio_wkup: gpio-wkup@c00 { 154 gpio_wkup: gpio@c00 {
177 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 155 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
178 reg = <0xc00 0x40>; 156 reg = <0xc00 0x40>;
179 interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>; 157 interrupts = <1 8 0 0 3 0>;
180 interrupt-parent = <&mpc5200_pic>;
181 gpio-controller; 158 gpio-controller;
182 #gpio-cells = <2>; 159 #gpio-cells = <2>;
183 }; 160 };
@@ -185,26 +162,22 @@
185 spi@f00 { 162 spi@f00 {
186 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 163 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
187 reg = <0xf00 0x20>; 164 reg = <0xf00 0x20>;
188 interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>; 165 interrupts = <2 13 0 2 14 0>;
189 interrupt-parent = <&mpc5200_pic>;
190 }; 166 };
191 167
192 usb@1000 { 168 usb@1000 {
193 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 169 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
194 reg = <0x1000 0xff>; 170 reg = <0x1000 0xff>;
195 interrupts = <0x2 0x6 0x0>; 171 interrupts = <2 6 0>;
196 interrupt-parent = <&mpc5200_pic>;
197 }; 172 };
198 173
199 dma-controller@1200 { 174 dma-controller@1200 {
200 device_type = "dma-controller";
201 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 175 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
202 reg = <0x1200 0x80>; 176 reg = <0x1200 0x80>;
203 interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0 177 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
204 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0 178 3 4 0 3 5 0 3 6 0 3 7 0
205 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0 179 3 8 0 3 9 0 3 10 0 3 11 0
206 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>; 180 3 12 0 3 13 0 3 14 0 3 15 0>;
207 interrupt-parent = <&mpc5200_pic>;
208 }; 181 };
209 182
210 xlb@1f00 { 183 xlb@1f00 {
@@ -213,24 +186,19 @@
213 }; 186 };
214 187
215 ac97@2000 { /* PSC1 in ac97 mode */ 188 ac97@2000 { /* PSC1 in ac97 mode */
216 device_type = "sound";
217 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 189 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
218 cell-index = <0>; 190 cell-index = <0>;
219 reg = <0x2000 0x100>; 191 reg = <0x2000 0x100>;
220 interrupts = <0x2 0x2 0x0>; 192 interrupts = <2 1 0>;
221 interrupt-parent = <&mpc5200_pic>;
222 }; 193 };
223 194
224 /* PSC2 port is used by CAN1/2 */ 195 /* PSC2 port is used by CAN1/2 */
225 196
226 serial@2400 { /* PSC3 in UART mode */ 197 serial@2400 { /* PSC3 in UART mode */
227 device_type = "serial";
228 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 198 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
229 port-number = <0>;
230 cell-index = <2>; 199 cell-index = <2>;
231 reg = <0x2400 0x100>; 200 reg = <0x2400 0x100>;
232 interrupts = <0x2 0x3 0x0>; 201 interrupts = <2 3 0>;
233 interrupt-parent = <&mpc5200_pic>;
234 }; 202 };
235 203
236 /* PSC4 is ??? */ 204 /* PSC4 is ??? */
@@ -238,55 +206,44 @@
238 /* PSC5 is ??? */ 206 /* PSC5 is ??? */
239 207
240 serial@2c00 { /* PSC6 in UART mode */ 208 serial@2c00 { /* PSC6 in UART mode */
241 device_type = "serial";
242 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 209 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
243 port-number = <1>;
244 cell-index = <5>; 210 cell-index = <5>;
245 reg = <0x2c00 0x100>; 211 reg = <0x2c00 0x100>;
246 interrupts = <0x2 0x4 0x0>; 212 interrupts = <2 4 0>;
247 interrupt-parent = <&mpc5200_pic>;
248 }; 213 };
249 214
250 ethernet@3000 { 215 ethernet@3000 {
251 device_type = "network";
252 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 216 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
253 reg = <0x3000 0x400>; 217 reg = <0x3000 0x400>;
254 local-mac-address = [00 00 00 00 00 00]; 218 local-mac-address = [ 00 00 00 00 00 00 ];
255 interrupts = <0x2 0x5 0x0>; 219 interrupts = <2 5 0>;
256 interrupt-parent = <&mpc5200_pic>;
257 phy-handle = <&phy0>; 220 phy-handle = <&phy0>;
258 }; 221 };
259 222
260 mdio@3000 { 223 mdio@3000 {
261 #address-cells = <1>; 224 #address-cells = <1>;
262 #size-cells = <0>; 225 #size-cells = <0>;
263 compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; 226 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
264 reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */ 227 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
265 interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */ 228 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
266 interrupt-parent = <&mpc5200_pic>; 229
267 230 phy0: ethernet-phy@0 {
268 phy0:ethernet-phy@0 { 231 reg = <0>;
269 device_type = "ethernet-phy";
270 reg = <0x0>;
271 }; 232 };
272 }; 233 };
273 234
274 ata@3a00 { 235 ata@3a00 {
275 device_type = "ata";
276 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; 236 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
277 reg = <0x3a00 0x100>; 237 reg = <0x3a00 0x100>;
278 interrupts = <0x2 0x7 0x0>; 238 interrupts = <2 7 0>;
279 interrupt-parent = <&mpc5200_pic>;
280 }; 239 };
281 240
282 i2c@3d00 { 241 i2c@3d00 {
283 #address-cells = <1>; 242 #address-cells = <1>;
284 #size-cells = <0>; 243 #size-cells = <0>;
285 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
286 cell-index = <0>;
287 reg = <0x3d00 0x40>; 245 reg = <0x3d00 0x40>;
288 interrupts = <0x2 0xf 0x0>; 246 interrupts = <2 15 0>;
289 interrupt-parent = <&mpc5200_pic>;
290 fsl5200-clocking; 247 fsl5200-clocking;
291 }; 248 };
292 249
@@ -294,10 +251,8 @@
294 #address-cells = <1>; 251 #address-cells = <1>;
295 #size-cells = <0>; 252 #size-cells = <0>;
296 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 253 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
297 cell-index = <1>;
298 reg = <0x3d40 0x40>; 254 reg = <0x3d40 0x40>;
299 interrupts = <0x2 0x10 0x0>; 255 interrupts = <2 16 0>;
300 interrupt-parent = <&mpc5200_pic>;
301 fsl5200-clocking; 256 fsl5200-clocking;
302 rtc@51 { 257 rtc@51 {
303 compatible = "nxp,pcf8563"; 258 compatible = "nxp,pcf8563";
@@ -307,7 +262,7 @@
307 }; 262 };
308 263
309 sram@8000 { 264 sram@8000 {
310 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; 265 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
311 reg = <0x8000 0x4000>; 266 reg = <0x8000 0x4000>;
312 }; 267 };
313 268
@@ -340,22 +295,21 @@
340 device_type = "pci"; 295 device_type = "pci";
341 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; 296 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
342 reg = <0xf0000d00 0x100>; 297 reg = <0xf0000d00 0x100>;
343 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 298 interrupt-map-mask = <0xf800 0 0 7>;
344 interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */ 299 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
345 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3 300 0xc000 0 0 2 &mpc5200_pic 1 1 3
346 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3 301 0xc000 0 0 3 &mpc5200_pic 1 2 3
347 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3 302 0xc000 0 0 4 &mpc5200_pic 1 3 3
348 303
349 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */ 304 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
350 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3 305 0xc800 0 0 2 &mpc5200_pic 1 2 3
351 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3 306 0xc800 0 0 3 &mpc5200_pic 1 3 3
352 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>; 307 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
353 clock-frequency = <0>; // From boot loader 308 clock-frequency = <0>; // From boot loader
354 interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>; 309 interrupts = <2 8 0 2 9 0 2 10 0>;
355 interrupt-parent = <&mpc5200_pic>;
356 bus-range = <0 0>; 310 bus-range = <0 0>;
357 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 311 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
358 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 312 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
359 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>; 313 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
360 }; 314 };
361}; 315};
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
new file mode 100644
index 000000000000..030042678392
--- /dev/null
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -0,0 +1,392 @@
1/*
2 * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
3 *
4 * Copyright (C) 2006-2009 Pengutronix
5 * Sascha Hauer <s.hauer@pengutronix.de>
6 * Juergen Beisert <j.beisert@pengutronix.de>
7 * Wolfram Sang <w.sang@pengutronix.de>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15/dts-v1/;
16
17/ {
18 model = "phytec,pcm032";
19 compatible = "phytec,pcm032";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 interrupt-parent = <&mpc5200_pic>;
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 PowerPC,5200@0 {
29 device_type = "cpu";
30 reg = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <0x4000>; // L1, 16K
34 i-cache-size = <0x4000>; // L1, 16K
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
38 };
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0x00000000 0x08000000>; // 128MB
44 };
45
46 soc5200@f0000000 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "fsl,mpc5200b-immr";
50 ranges = <0 0xf0000000 0x0000c000>;
51 bus-frequency = <0>; // from bootloader
52 system-frequency = <0>; // from bootloader
53
54 cdm@200 {
55 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
56 reg = <0x200 0x38>;
57 };
58
59 mpc5200_pic: interrupt-controller@500 {
60 // 5200 interrupts are encoded into two levels;
61 interrupt-controller;
62 #interrupt-cells = <3>;
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>;
65 };
66
67 timer@600 { // General Purpose Timer
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 reg = <0x600 0x10>;
70 interrupts = <1 9 0>;
71 fsl,has-wdt;
72 };
73
74 timer@610 { // General Purpose Timer
75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 reg = <0x610 0x10>;
77 interrupts = <1 10 0>;
78 };
79
80 gpt2: timer@620 { // General Purpose Timer in GPIO mode
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <0x620 0x10>;
83 interrupts = <1 11 0>;
84 gpio-controller;
85 #gpio-cells = <2>;
86 };
87
88 gpt3: timer@630 { // General Purpose Timer in GPIO mode
89 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
90 reg = <0x630 0x10>;
91 interrupts = <1 12 0>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 };
95
96 gpt4: timer@640 { // General Purpose Timer in GPIO mode
97 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
98 reg = <0x640 0x10>;
99 interrupts = <1 13 0>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 };
103
104 gpt5: timer@650 { // General Purpose Timer in GPIO mode
105 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
106 reg = <0x650 0x10>;
107 interrupts = <1 14 0>;
108 gpio-controller;
109 #gpio-cells = <2>;
110 };
111
112 gpt6: timer@660 { // General Purpose Timer in GPIO mode
113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
114 reg = <0x660 0x10>;
115 interrupts = <1 15 0>;
116 gpio-controller;
117 #gpio-cells = <2>;
118 };
119
120 gpt7: timer@670 { // General Purpose Timer in GPIO mode
121 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
122 reg = <0x670 0x10>;
123 interrupts = <1 16 0>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 };
127
128 rtc@800 { // Real time clock
129 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
130 reg = <0x800 0x100>;
131 interrupts = <1 5 0 1 6 0>;
132 };
133
134 can@900 {
135 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
136 interrupts = <2 17 0>;
137 reg = <0x900 0x80>;
138 };
139
140 can@980 {
141 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
142 interrupts = <2 18 0>;
143 reg = <0x980 0x80>;
144 };
145
146 gpio_simple: gpio@b00 {
147 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
148 reg = <0xb00 0x40>;
149 interrupts = <1 7 0>;
150 gpio-controller;
151 #gpio-cells = <2>;
152 };
153
154 gpio_wkup: gpio@c00 {
155 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
156 reg = <0xc00 0x40>;
157 interrupts = <1 8 0 0 3 0>;
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161
162 spi@f00 {
163 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
164 reg = <0xf00 0x20>;
165 interrupts = <2 13 0 2 14 0>;
166 };
167
168 usb@1000 {
169 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
170 reg = <0x1000 0xff>;
171 interrupts = <2 6 0>;
172 };
173
174 dma-controller@1200 {
175 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
176 reg = <0x1200 0x80>;
177 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
178 3 4 0 3 5 0 3 6 0 3 7 0
179 3 8 0 3 9 0 3 10 0 3 11 0
180 3 12 0 3 13 0 3 14 0 3 15 0>;
181 };
182
183 xlb@1f00 {
184 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
185 reg = <0x1f00 0x100>;
186 };
187
188 ac97@2000 { /* PSC1 is ac97 */
189 compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
190 cell-index = <0>;
191 reg = <0x2000 0x100>;
192 interrupts = <2 1 0>;
193 };
194
195 /* PSC2 port is used by CAN1/2 */
196
197 serial@2400 { /* PSC3 in UART mode */
198 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
199 cell-index = <2>;
200 reg = <0x2400 0x100>;
201 interrupts = <2 3 0>;
202 };
203
204 /* PSC4 is ??? */
205
206 /* PSC5 is ??? */
207
208 serial@2c00 { /* PSC6 in UART mode */
209 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
210 cell-index = <5>;
211 reg = <0x2c00 0x100>;
212 interrupts = <2 4 0>;
213 };
214
215 ethernet@3000 {
216 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
217 reg = <0x3000 0x400>;
218 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <2 5 0>;
220 phy-handle = <&phy0>;
221 };
222
223 mdio@3000 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
227 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
228 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
229
230 phy0: ethernet-phy@0 {
231 reg = <0>;
232 };
233 };
234
235 ata@3a00 {
236 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
237 reg = <0x3a00 0x100>;
238 interrupts = <2 7 0>;
239 };
240
241 i2c@3d00 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
245 reg = <0x3d00 0x40>;
246 interrupts = <2 15 0>;
247 fsl5200-clocking;
248 };
249
250 i2c@3d40 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
254 reg = <0x3d40 0x40>;
255 interrupts = <2 16 0>;
256 fsl5200-clocking;
257 rtc@51 {
258 compatible = "nxp,pcf8563";
259 reg = <0x51>;
260 };
261 eeprom@52 {
262 compatible = "at24,24c32";
263 reg = <0x52>;
264 };
265 };
266
267 sram@8000 {
268 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
269 reg = <0x8000 0x4000>;
270 };
271 };
272
273 pci@f0000d00 {
274 #interrupt-cells = <1>;
275 #size-cells = <2>;
276 #address-cells = <3>;
277 device_type = "pci";
278 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
279 reg = <0xf0000d00 0x100>;
280 interrupt-map-mask = <0xf800 0 0 7>;
281 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
282 0xc000 0 0 2 &mpc5200_pic 1 1 3
283 0xc000 0 0 3 &mpc5200_pic 1 2 3
284 0xc000 0 0 4 &mpc5200_pic 1 3 3
285
286 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
287 0xc800 0 0 2 &mpc5200_pic 1 2 3
288 0xc800 0 0 3 &mpc5200_pic 1 3 3
289 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
290 clock-frequency = <0>; // From boot loader
291 interrupts = <2 8 0 2 9 0 2 10 0>;
292 bus-range = <0 0>;
293 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
294 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
295 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
296 };
297
298 localbus {
299 compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
300
301 #address-cells = <2>;
302 #size-cells = <1>;
303
304 ranges = <0 0 0xfe000000 0x02000000
305 1 0 0xfc000000 0x02000000
306 2 0 0xfbe00000 0x00200000
307 3 0 0xf9e00000 0x02000000
308 4 0 0xf7e00000 0x02000000
309 5 0 0xe6000000 0x02000000
310 6 0 0xe8000000 0x02000000
311 7 0 0xea000000 0x02000000>;
312
313 flash@0,0 {
314 compatible = "cfi-flash";
315 reg = <0 0 0x02000000>;
316 bank-width = <4>;
317 #size-cells = <1>;
318 #address-cells = <1>;
319
320 partition@0 {
321 label = "ubootl";
322 reg = <0x00000000 0x00040000>;
323 };
324 partition@40000 {
325 label = "kernel";
326 reg = <0x00040000 0x001c0000>;
327 };
328 partition@200000 {
329 label = "jffs2";
330 reg = <0x00200000 0x01d00000>;
331 };
332 partition@1f00000 {
333 label = "uboot";
334 reg = <0x01f00000 0x00040000>;
335 };
336 partition@1f40000 {
337 label = "env";
338 reg = <0x01f40000 0x00040000>;
339 };
340 partition@1f80000 {
341 label = "oftree";
342 reg = <0x01f80000 0x00040000>;
343 };
344 partition@1fc0000 {
345 label = "space";
346 reg = <0x01fc0000 0x00040000>;
347 };
348 };
349
350 sram@2,0 {
351 compatible = "mtd-ram";
352 reg = <2 0 0x00200000>;
353 bank-width = <2>;
354 };
355
356 /*
357 * example snippets for FPGA
358 *
359 * fpga@3,0 {
360 * compatible = "fpga_driver";
361 * reg = <3 0 0x02000000>;
362 * bank-width = <4>;
363 * };
364 *
365 * fpga@4,0 {
366 * compatible = "fpga_driver";
367 * reg = <4 0 0x02000000>;
368 * bank-width = <4>;
369 * };
370 */
371
372 /*
373 * example snippets for free chipselects
374 *
375 * device@5,0 {
376 * compatible = "custom_driver";
377 * reg = <5 0 0x02000000>;
378 * };
379 *
380 * device@6,0 {
381 * compatible = "custom_driver";
382 * reg = <6 0 0x02000000>;
383 * };
384 *
385 * device@7,0 {
386 * compatible = "custom_driver";
387 * reg = <7 0 0x02000000>;
388 * };
389 */
390 };
391};
392
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts
new file mode 100644
index 000000000000..ad402c488741
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -0,0 +1,244 @@
1/*
2 * Device Tree Source for AMCC Redwood(460SX)
3 *
4 * Copyright 2008 AMCC <tmarri@amcc.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,redwood";
17 compatible = "amcc,redwood";
18 dcr-parent = <&{/cpus/cpu@0}>;
19
20 aliases {
21 ethernet0 = &EMAC0;
22 serial0 = &UART0;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,460SX";
32 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <32>;
36 d-cache-line-size = <32>;
37 i-cache-size = <32768>;
38 d-cache-size = <32768>;
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
47 };
48
49 UIC0: interrupt-controller0 {
50 compatible = "ibm,uic-460sx","ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 UIC1: interrupt-controller1 {
60 compatible = "ibm,uic-460sx","ibm,uic";
61 interrupt-controller;
62 cell-index = <1>;
63 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>;
65 #size-cells = <0>;
66 #interrupt-cells = <2>;
67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>;
69 };
70
71 UIC2: interrupt-controller2 {
72 compatible = "ibm,uic-460sx","ibm,uic";
73 interrupt-controller;
74 cell-index = <2>;
75 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>;
81 };
82
83 UIC3: interrupt-controller3 {
84 compatible = "ibm,uic-460sx","ibm,uic";
85 interrupt-controller;
86 cell-index = <3>;
87 dcr-reg = <0x0f0 0x009>;
88 #address-cells = <0>;
89 #size-cells = <0>;
90 #interrupt-cells = <2>;
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
92 interrupt-parent = <&UIC0>;
93 };
94
95 SDR0: sdr {
96 compatible = "ibm,sdr-460sx";
97 dcr-reg = <0x00e 0x002>;
98 };
99
100 CPR0: cpr {
101 compatible = "ibm,cpr-460sx";
102 dcr-reg = <0x00c 0x002>;
103 };
104
105 plb {
106 compatible = "ibm,plb-460sx", "ibm,plb4";
107 #address-cells = <2>;
108 #size-cells = <1>;
109 ranges;
110 clock-frequency = <0>; /* Filled in by U-Boot */
111
112 SDRAM0: sdram {
113 compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
114 dcr-reg = <0x010 0x002>;
115 };
116
117 MAL0: mcmal {
118 compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
119 dcr-reg = <0x180 0x62>;
120 num-tx-chans = <4>;
121 num-rx-chans = <32>;
122 #address-cells = <1>;
123 #size-cells = <1>;
124 interrupt-parent = <&UIC1>;
125 interrupts = < /*TXEOB*/ 0x6 0x4
126 /*RXEOB*/ 0x7 0x4
127 /*SERR*/ 0x1 0x4
128 /*TXDE*/ 0x2 0x4
129 /*RXDE*/ 0x3 0x4
130 /*COAL TX0*/ 0x18 0x2
131 /*COAL TX1*/ 0x19 0x2
132 /*COAL TX2*/ 0x1a 0x2
133 /*COAL TX3*/ 0x1b 0x2
134 /*COAL RX0*/ 0x1c 0x2
135 /*COAL RX1*/ 0x1d 0x2
136 /*COAL RX2*/ 0x1e 0x2
137 /*COAL RX3*/ 0x1f 0x2>;
138 };
139
140 POB0: opb {
141 compatible = "ibm,opb-460sx", "ibm,opb";
142 #address-cells = <1>;
143 #size-cells = <1>;
144 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
145 clock-frequency = <0>; /* Filled in by U-Boot */
146
147 EBC0: ebc {
148 compatible = "ibm,ebc-460sx", "ibm,ebc";
149 dcr-reg = <0x012 0x002>;
150 #address-cells = <2>;
151 #size-cells = <1>;
152 clock-frequency = <0>; /* Filled in by U-Boot */
153 /* ranges property is supplied by U-Boot */
154 interrupts = <0x6 0x4>;
155 interrupt-parent = <&UIC1>;
156
157 nor_flash@0,0 {
158 compatible = "amd,s29gl512n", "cfi-flash";
159 bank-width = <2>;
160 reg = <0x0000000 0x00000000 0x04000000>;
161 #address-cells = <1>;
162 #size-cells = <1>;
163 partition@0 {
164 label = "kernel";
165 reg = <0x00000000 0x001e0000>;
166 };
167 partition@1e0000 {
168 label = "dtb";
169 reg = <0x001e0000 0x00020000>;
170 };
171 partition@200000 {
172 label = "ramdisk";
173 reg = <0x00200000 0x01400000>;
174 };
175 partition@1600000 {
176 label = "jffs2";
177 reg = <0x01600000 0x00400000>;
178 };
179 partition@1a00000 {
180 label = "user";
181 reg = <0x01a00000 0x02560000>;
182 };
183 partition@3f60000 {
184 label = "env";
185 reg = <0x03f60000 0x00040000>;
186 };
187 partition@3fa0000 {
188 label = "u-boot";
189 reg = <0x03fa0000 0x00060000>;
190 };
191 };
192 };
193
194 UART0: serial@ef600200 {
195 device_type = "serial";
196 compatible = "ns16550";
197 reg = <0xef600200 0x00000008>;
198 virtual-reg = <0xef600200>;
199 clock-frequency = <0>; /* Filled in by U-Boot */
200 current-speed = <0>; /* Filled in by U-Boot */
201 interrupt-parent = <&UIC0>;
202 interrupts = <0x0 0x4>;
203 };
204
205 RGMII0: emac-rgmii@ef600900 {
206 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
207 reg = <0xef600900 0x00000008>;
208 };
209
210 EMAC0: ethernet@ef600a00 {
211 device_type = "network";
212 compatible = "ibm,emac-460sx", "ibm,emac4";
213 interrupt-parent = <&EMAC0>;
214 interrupts = <0x0 0x1>;
215 #interrupt-cells = <1>;
216 #address-cells = <0>;
217 #size-cells = <0>;
218 interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
219 /*Wake*/ 0x1 &UIC2 0x1d 0x4>;
220 reg = <0xef600a00 0x00000070>;
221 local-mac-address = [000000000000]; /* Filled in by U-Boot */
222 mal-device = <&MAL0>;
223 mal-tx-channel = <0>;
224 mal-rx-channel = <0>;
225 cell-index = <0>;
226 max-frame-size = <9000>;
227 rx-fifo-size = <4096>;
228 tx-fifo-size = <2048>;
229 phy-mode = "rgmii";
230 phy-map = <0x00000000>;
231 rgmii-device = <&RGMII0>;
232 rgmii-channel = <0>;
233 has-inverted-stacr-oc;
234 has-new-stacr-staopc;
235 };
236
237 };
238
239 };
240 chosen {
241 linux,stdout-path = "/plb/opb/serial@ef600200";
242 };
243
244};
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 906302e26a62..c9590b58b7b0 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -17,6 +17,7 @@
17 compatible = "tqc,tqm5200"; 17 compatible = "tqc,tqm5200";
18 #address-cells = <1>; 18 #address-cells = <1>;
19 #size-cells = <1>; 19 #size-cells = <1>;
20 interrupt-parent = <&mpc5200_pic>;
20 21
21 cpus { 22 cpus {
22 #address-cells = <1>; 23 #address-cells = <1>;
@@ -66,36 +67,33 @@
66 compatible = "fsl,mpc5200-gpt"; 67 compatible = "fsl,mpc5200-gpt";
67 reg = <0x600 0x10>; 68 reg = <0x600 0x10>;
68 interrupts = <1 9 0>; 69 interrupts = <1 9 0>;
69 interrupt-parent = <&mpc5200_pic>;
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
73 can@900 { 73 can@900 {
74 compatible = "fsl,mpc5200-mscan"; 74 compatible = "fsl,mpc5200-mscan";
75 interrupts = <2 17 0>; 75 interrupts = <2 17 0>;
76 interrupt-parent = <&mpc5200_pic>;
77 reg = <0x900 0x80>; 76 reg = <0x900 0x80>;
78 }; 77 };
79 78
80 can@980 { 79 can@980 {
81 compatible = "fsl,mpc5200-mscan"; 80 compatible = "fsl,mpc5200-mscan";
82 interrupts = <2 18 0>; 81 interrupts = <2 18 0>;
83 interrupt-parent = <&mpc5200_pic>;
84 reg = <0x980 0x80>; 82 reg = <0x980 0x80>;
85 }; 83 };
86 84
87 gpio@b00 { 85 gpio_simple: gpio@b00 {
88 compatible = "fsl,mpc5200-gpio"; 86 compatible = "fsl,mpc5200-gpio";
89 reg = <0xb00 0x40>; 87 reg = <0xb00 0x40>;
90 interrupts = <1 7 0>; 88 interrupts = <1 7 0>;
91 interrupt-parent = <&mpc5200_pic>; 89 gpio-controller;
90 #gpio-cells = <2>;
92 }; 91 };
93 92
94 usb@1000 { 93 usb@1000 {
95 compatible = "fsl,mpc5200-ohci","ohci-be"; 94 compatible = "fsl,mpc5200-ohci","ohci-be";
96 reg = <0x1000 0xff>; 95 reg = <0x1000 0xff>;
97 interrupts = <2 6 0>; 96 interrupts = <2 6 0>;
98 interrupt-parent = <&mpc5200_pic>;
99 }; 97 };
100 98
101 dma-controller@1200 { 99 dma-controller@1200 {
@@ -105,7 +103,6 @@
105 3 4 0 3 5 0 3 6 0 3 7 0 103 3 4 0 3 5 0 3 6 0 3 7 0
106 3 8 0 3 9 0 3 10 0 3 11 0 104 3 8 0 3 9 0 3 10 0 3 11 0
107 3 12 0 3 13 0 3 14 0 3 15 0>; 105 3 12 0 3 13 0 3 14 0 3 15 0>;
108 interrupt-parent = <&mpc5200_pic>;
109 }; 106 };
110 107
111 xlb@1f00 { 108 xlb@1f00 {
@@ -114,39 +111,28 @@
114 }; 111 };
115 112
116 serial@2000 { // PSC1 113 serial@2000 { // PSC1
117 device_type = "serial";
118 compatible = "fsl,mpc5200-psc-uart"; 114 compatible = "fsl,mpc5200-psc-uart";
119 port-number = <0>; // Logical port assignment
120 reg = <0x2000 0x100>; 115 reg = <0x2000 0x100>;
121 interrupts = <2 1 0>; 116 interrupts = <2 1 0>;
122 interrupt-parent = <&mpc5200_pic>;
123 }; 117 };
124 118
125 serial@2200 { // PSC2 119 serial@2200 { // PSC2
126 device_type = "serial";
127 compatible = "fsl,mpc5200-psc-uart"; 120 compatible = "fsl,mpc5200-psc-uart";
128 port-number = <1>; // Logical port assignment
129 reg = <0x2200 0x100>; 121 reg = <0x2200 0x100>;
130 interrupts = <2 2 0>; 122 interrupts = <2 2 0>;
131 interrupt-parent = <&mpc5200_pic>;
132 }; 123 };
133 124
134 serial@2400 { // PSC3 125 serial@2400 { // PSC3
135 device_type = "serial";
136 compatible = "fsl,mpc5200-psc-uart"; 126 compatible = "fsl,mpc5200-psc-uart";
137 port-number = <2>; // Logical port assignment
138 reg = <0x2400 0x100>; 127 reg = <0x2400 0x100>;
139 interrupts = <2 3 0>; 128 interrupts = <2 3 0>;
140 interrupt-parent = <&mpc5200_pic>;
141 }; 129 };
142 130
143 ethernet@3000 { 131 ethernet@3000 {
144 device_type = "network";
145 compatible = "fsl,mpc5200-fec"; 132 compatible = "fsl,mpc5200-fec";
146 reg = <0x3000 0x400>; 133 reg = <0x3000 0x400>;
147 local-mac-address = [ 00 00 00 00 00 00 ]; 134 local-mac-address = [ 00 00 00 00 00 00 ];
148 interrupts = <2 5 0>; 135 interrupts = <2 5 0>;
149 interrupt-parent = <&mpc5200_pic>;
150 phy-handle = <&phy0>; 136 phy-handle = <&phy0>;
151 }; 137 };
152 138
@@ -156,10 +142,8 @@
156 compatible = "fsl,mpc5200-mdio"; 142 compatible = "fsl,mpc5200-mdio";
157 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts 143 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
158 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 144 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
159 interrupt-parent = <&mpc5200_pic>;
160 145
161 phy0: ethernet-phy@0 { 146 phy0: ethernet-phy@0 {
162 device_type = "ethernet-phy";
163 reg = <0>; 147 reg = <0>;
164 }; 148 };
165 }; 149 };
@@ -168,7 +152,6 @@
168 compatible = "fsl,mpc5200-ata"; 152 compatible = "fsl,mpc5200-ata";
169 reg = <0x3a00 0x100>; 153 reg = <0x3a00 0x100>;
170 interrupts = <2 7 0>; 154 interrupts = <2 7 0>;
171 interrupt-parent = <&mpc5200_pic>;
172 }; 155 };
173 156
174 i2c@3d40 { 157 i2c@3d40 {
@@ -177,7 +160,6 @@
177 compatible = "fsl,mpc5200-i2c","fsl-i2c"; 160 compatible = "fsl,mpc5200-i2c","fsl-i2c";
178 reg = <0x3d40 0x40>; 161 reg = <0x3d40 0x40>;
179 interrupts = <2 16 0>; 162 interrupts = <2 16 0>;
180 interrupt-parent = <&mpc5200_pic>;
181 fsl5200-clocking; 163 fsl5200-clocking;
182 164
183 rtc@68 { 165 rtc@68 {
@@ -192,9 +174,8 @@
192 }; 174 };
193 }; 175 };
194 176
195 lpb { 177 localbus {
196 model = "fsl,lpb"; 178 compatible = "fsl,mpc5200-lpb","simple-bus";
197 compatible = "fsl,lpb";
198 #address-cells = <2>; 179 #address-cells = <2>;
199 #size-cells = <1>; 180 #size-cells = <1>;
200 ranges = <0 0 0xfc000000 0x02000000>; 181 ranges = <0 0 0xfc000000 0x02000000>;
@@ -223,7 +204,6 @@
223 0xc000 0 0 4 &mpc5200_pic 0 0 3>; 204 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
224 clock-frequency = <0>; // From boot loader 205 clock-frequency = <0>; // From boot loader
225 interrupts = <2 8 0 2 9 0 2 10 0>; 206 interrupts = <2 8 0 2 9 0 2 10 0>;
226 interrupt-parent = <&mpc5200_pic>;
227 bus-range = <0 0>; 207 bus-range = <0 0>;
228 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 208 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
229 0x02000000 0 0x90000000 0x90000000 0 0x10000000 209 0x02000000 0 0x90000000 0x90000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index a693f01c21aa..39e55ab82b89 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,6 +84,11 @@
84 interrupt-parent = <&mpic>; 84 interrupt-parent = <&mpic>;
85 dfsrr; 85 dfsrr;
86 86
87 dtt@50 {
88 compatible = "national,lm75";
89 reg = <0x50>;
90 };
91
87 rtc@68 { 92 rtc@68 {
88 compatible = "dallas,ds1337"; 93 compatible = "dallas,ds1337";
89 reg = <0x68>; 94 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e3f5f0dde20..58ae8bc58817 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 15086eb65c50..bff380a25aa6 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index b7b65f5e79b6..112ac90f2ea7 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index cf92b4e7945e..4b7da890c03b 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 9e1ab2d2f669..3fa552f31edb 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -335,14 +340,14 @@
335 can0@2,0 { 340 can0@2,0 {
336 compatible = "intel,82527"; // Bosch CC770 341 compatible = "intel,82527"; // Bosch CC770
337 reg = <2 0x0 0x100>; 342 reg = <2 0x0 0x100>;
338 interrupts = <4 0>; 343 interrupts = <4 1>;
339 interrupt-parent = <&mpic>; 344 interrupt-parent = <&mpic>;
340 }; 345 };
341 346
342 can1@2,100 { 347 can1@2,100 {
343 compatible = "intel,82527"; // Bosch CC770 348 compatible = "intel,82527"; // Bosch CC770
344 reg = <2 0x100 0x100>; 349 reg = <2 0x100 0x100>;
345 interrupts = <4 0>; 350 interrupts = <4 1>;
346 interrupt-parent = <&mpic>; 351 interrupt-parent = <&mpic>;
347 }; 352 };
348 }; 353 };
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index dc8e78e2dceb..52d8c1ad26a1 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -7,6 +7,15 @@
7 * This file is licensed under the terms of the GNU General Public License 7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any 8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 *
11 * ---
12 *
13 * Device Tree Generator version: 1.1
14 *
15 * CAUTION: This file is automatically generated by libgen.
16 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
17 *
18 * XPS project directory: ml507_ppc440_emb_ref
10 */ 19 */
11 20
12/dts-v1/; 21/dts-v1/;
@@ -22,8 +31,8 @@
22 reg = < 0 0x10000000 >; 31 reg = < 0 0x10000000 >;
23 } ; 32 } ;
24 chosen { 33 chosen {
25 bootargs = "console=ttyS0 ip=on root=/dev/ram"; 34 bootargs = "console=ttyS0 root=/dev/ram";
26 linux,stdout-path = "/plb@0/serial@83e00000"; 35 linux,stdout-path = &RS232_Uart_1;
27 } ; 36 } ;
28 cpus { 37 cpus {
29 #address-cells = <1>; 38 #address-cells = <1>;
@@ -136,19 +145,19 @@
136 compatible = "xlnx,ll-dma-1.00.a"; 145 compatible = "xlnx,ll-dma-1.00.a";
137 dcr-reg = < 0x80 0x11 >; 146 dcr-reg = < 0x80 0x11 >;
138 interrupt-parent = <&xps_intc_0>; 147 interrupt-parent = <&xps_intc_0>;
139 interrupts = < 9 2 0xa 2 >; 148 interrupts = < 10 2 11 2 >;
140 } ; 149 } ;
141 } ; 150 } ;
142 } ; 151 } ;
143 plb_v46_0: plb@0 { 152 plb_v46_0: plb@0 {
144 #address-cells = <1>; 153 #address-cells = <1>;
145 #size-cells = <1>; 154 #size-cells = <1>;
146 compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; 155 compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
147 ranges ; 156 ranges ;
148 DIP_Switches_8Bit: gpio@81460000 { 157 DIP_Switches_8Bit: gpio@81460000 {
149 compatible = "xlnx,xps-gpio-1.00.a"; 158 compatible = "xlnx,xps-gpio-1.00.a";
150 interrupt-parent = <&xps_intc_0>; 159 interrupt-parent = <&xps_intc_0>;
151 interrupts = < 6 2 >; 160 interrupts = < 7 2 >;
152 reg = < 0x81460000 0x10000 >; 161 reg = < 0x81460000 0x10000 >;
153 xlnx,all-inputs = <1>; 162 xlnx,all-inputs = <1>;
154 xlnx,all-inputs-2 = <0>; 163 xlnx,all-inputs-2 = <0>;
@@ -163,6 +172,86 @@
163 xlnx,tri-default = <0xffffffff>; 172 xlnx,tri-default = <0xffffffff>;
164 xlnx,tri-default-2 = <0xffffffff>; 173 xlnx,tri-default-2 = <0xffffffff>;
165 } ; 174 } ;
175 FLASH: flash@fc000000 {
176 bank-width = <2>;
177 compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
178 reg = < 0xfc000000 0x2000000 >;
179 xlnx,family = "virtex5";
180 xlnx,include-datawidth-matching-0 = <0x1>;
181 xlnx,include-datawidth-matching-1 = <0x0>;
182 xlnx,include-datawidth-matching-2 = <0x0>;
183 xlnx,include-datawidth-matching-3 = <0x0>;
184 xlnx,include-negedge-ioregs = <0x0>;
185 xlnx,include-plb-ipif = <0x1>;
186 xlnx,include-wrbuf = <0x1>;
187 xlnx,max-mem-width = <0x10>;
188 xlnx,mch-native-dwidth = <0x20>;
189 xlnx,mch-plb-clk-period-ps = <0x2710>;
190 xlnx,mch-splb-awidth = <0x20>;
191 xlnx,mch0-accessbuf-depth = <0x10>;
192 xlnx,mch0-protocol = <0x0>;
193 xlnx,mch0-rddatabuf-depth = <0x10>;
194 xlnx,mch1-accessbuf-depth = <0x10>;
195 xlnx,mch1-protocol = <0x0>;
196 xlnx,mch1-rddatabuf-depth = <0x10>;
197 xlnx,mch2-accessbuf-depth = <0x10>;
198 xlnx,mch2-protocol = <0x0>;
199 xlnx,mch2-rddatabuf-depth = <0x10>;
200 xlnx,mch3-accessbuf-depth = <0x10>;
201 xlnx,mch3-protocol = <0x0>;
202 xlnx,mch3-rddatabuf-depth = <0x10>;
203 xlnx,mem0-width = <0x10>;
204 xlnx,mem1-width = <0x20>;
205 xlnx,mem2-width = <0x20>;
206 xlnx,mem3-width = <0x20>;
207 xlnx,num-banks-mem = <0x1>;
208 xlnx,num-channels = <0x2>;
209 xlnx,priority-mode = <0x0>;
210 xlnx,synch-mem-0 = <0x0>;
211 xlnx,synch-mem-1 = <0x0>;
212 xlnx,synch-mem-2 = <0x0>;
213 xlnx,synch-mem-3 = <0x0>;
214 xlnx,synch-pipedelay-0 = <0x2>;
215 xlnx,synch-pipedelay-1 = <0x2>;
216 xlnx,synch-pipedelay-2 = <0x2>;
217 xlnx,synch-pipedelay-3 = <0x2>;
218 xlnx,tavdv-ps-mem-0 = <0x1adb0>;
219 xlnx,tavdv-ps-mem-1 = <0x3a98>;
220 xlnx,tavdv-ps-mem-2 = <0x3a98>;
221 xlnx,tavdv-ps-mem-3 = <0x3a98>;
222 xlnx,tcedv-ps-mem-0 = <0x1adb0>;
223 xlnx,tcedv-ps-mem-1 = <0x3a98>;
224 xlnx,tcedv-ps-mem-2 = <0x3a98>;
225 xlnx,tcedv-ps-mem-3 = <0x3a98>;
226 xlnx,thzce-ps-mem-0 = <0x88b8>;
227 xlnx,thzce-ps-mem-1 = <0x1b58>;
228 xlnx,thzce-ps-mem-2 = <0x1b58>;
229 xlnx,thzce-ps-mem-3 = <0x1b58>;
230 xlnx,thzoe-ps-mem-0 = <0x1b58>;
231 xlnx,thzoe-ps-mem-1 = <0x1b58>;
232 xlnx,thzoe-ps-mem-2 = <0x1b58>;
233 xlnx,thzoe-ps-mem-3 = <0x1b58>;
234 xlnx,tlzwe-ps-mem-0 = <0x88b8>;
235 xlnx,tlzwe-ps-mem-1 = <0x0>;
236 xlnx,tlzwe-ps-mem-2 = <0x0>;
237 xlnx,tlzwe-ps-mem-3 = <0x0>;
238 xlnx,twc-ps-mem-0 = <0x2af8>;
239 xlnx,twc-ps-mem-1 = <0x3a98>;
240 xlnx,twc-ps-mem-2 = <0x3a98>;
241 xlnx,twc-ps-mem-3 = <0x3a98>;
242 xlnx,twp-ps-mem-0 = <0x11170>;
243 xlnx,twp-ps-mem-1 = <0x2ee0>;
244 xlnx,twp-ps-mem-2 = <0x2ee0>;
245 xlnx,twp-ps-mem-3 = <0x2ee0>;
246 xlnx,xcl0-linesize = <0x4>;
247 xlnx,xcl0-writexfer = <0x1>;
248 xlnx,xcl1-linesize = <0x4>;
249 xlnx,xcl1-writexfer = <0x1>;
250 xlnx,xcl2-linesize = <0x4>;
251 xlnx,xcl2-writexfer = <0x1>;
252 xlnx,xcl3-linesize = <0x4>;
253 xlnx,xcl3-writexfer = <0x1>;
254 } ;
166 Hard_Ethernet_MAC: xps-ll-temac@81c00000 { 255 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
167 #address-cells = <1>; 256 #address-cells = <1>;
168 #size-cells = <1>; 257 #size-cells = <1>;
@@ -185,6 +274,19 @@
185 xlnx,txfifo = <0x1000>; 274 xlnx,txfifo = <0x1000>;
186 } ; 275 } ;
187 } ; 276 } ;
277 IIC_EEPROM: i2c@81600000 {
278 compatible = "xlnx,xps-iic-2.00.a";
279 interrupt-parent = <&xps_intc_0>;
280 interrupts = < 6 2 >;
281 reg = < 0x81600000 0x10000 >;
282 xlnx,clk-freq = <0x5f5e100>;
283 xlnx,family = "virtex5";
284 xlnx,gpo-width = <0x1>;
285 xlnx,iic-freq = <0x186a0>;
286 xlnx,scl-inertial-delay = <0x0>;
287 xlnx,sda-inertial-delay = <0x0>;
288 xlnx,ten-bit-adr = <0x0>;
289 } ;
188 LEDs_8Bit: gpio@81400000 { 290 LEDs_8Bit: gpio@81400000 {
189 compatible = "xlnx,xps-gpio-1.00.a"; 291 compatible = "xlnx,xps-gpio-1.00.a";
190 reg = < 0x81400000 0x10000 >; 292 reg = < 0x81400000 0x10000 >;
@@ -220,7 +322,7 @@
220 Push_Buttons_5Bit: gpio@81440000 { 322 Push_Buttons_5Bit: gpio@81440000 {
221 compatible = "xlnx,xps-gpio-1.00.a"; 323 compatible = "xlnx,xps-gpio-1.00.a";
222 interrupt-parent = <&xps_intc_0>; 324 interrupt-parent = <&xps_intc_0>;
223 interrupts = < 7 2 >; 325 interrupts = < 8 2 >;
224 reg = < 0x81440000 0x10000 >; 326 reg = < 0x81440000 0x10000 >;
225 xlnx,all-inputs = <1>; 327 xlnx,all-inputs = <1>;
226 xlnx,all-inputs-2 = <0>; 328 xlnx,all-inputs-2 = <0>;
@@ -237,13 +339,13 @@
237 } ; 339 } ;
238 RS232_Uart_1: serial@83e00000 { 340 RS232_Uart_1: serial@83e00000 {
239 clock-frequency = <100000000>; 341 clock-frequency = <100000000>;
240 compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; 342 compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
241 current-speed = <0x2580>; 343 current-speed = <9600>;
242 device_type = "serial"; 344 device_type = "serial";
243 interrupt-parent = <&xps_intc_0>; 345 interrupt-parent = <&xps_intc_0>;
244 interrupts = < 8 2 >; 346 interrupts = < 9 2 >;
245 reg = < 0x83e00000 0x10000 >; 347 reg = < 0x83e00000 0x10000 >;
246 reg-offset = <3>; 348 reg-offset = <0x1003>;
247 reg-shift = <2>; 349 reg-shift = <2>;
248 xlnx,family = "virtex5"; 350 xlnx,family = "virtex5";
249 xlnx,has-external-rclk = <0>; 351 xlnx,has-external-rclk = <0>;
@@ -268,7 +370,7 @@
268 compatible = "xlnx,xps-intc-1.00.a"; 370 compatible = "xlnx,xps-intc-1.00.a";
269 interrupt-controller ; 371 interrupt-controller ;
270 reg = < 0x81800000 0x10000 >; 372 reg = < 0x81800000 0x10000 >;
271 xlnx,num-intr-inputs = <0xb>; 373 xlnx,num-intr-inputs = <0xc>;
272 } ; 374 } ;
273 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { 375 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
274 compatible = "xlnx,xps-timebase-wdt-1.00.b"; 376 compatible = "xlnx,xps-timebase-wdt-1.00.b";
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index 8b3607cb53fb..f2156f07571f 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -117,7 +117,8 @@ int serial_console_init(void)
117 if (devp == NULL) 117 if (devp == NULL)
118 goto err_out; 118 goto err_out;
119 119
120 if (dt_is_compatible(devp, "ns16550")) 120 if (dt_is_compatible(devp, "ns16550") ||
121 dt_is_compatible(devp, "pnpPNP,501"))
121 rc = ns16550_console_init(devp, &serial_cd); 122 rc = ns16550_console_init(devp, &serial_cd);
122 else if (dt_is_compatible(devp, "marvell,mv64360-mpsc")) 123 else if (dt_is_compatible(devp, "marvell,mv64360-mpsc"))
123 rc = mpsc_console_init(devp, &serial_cd); 124 rc = mpsc_console_init(devp, &serial_cd);
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 965c237c122d..3ac75aecdb94 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -186,6 +186,9 @@ cuboot*)
186 *-mpc85*|*-tqm85*|*-sbc85*) 186 *-mpc85*|*-tqm85*|*-sbc85*)
187 platformo=$object/cuboot-85xx.o 187 platformo=$object/cuboot-85xx.o
188 ;; 188 ;;
189 *-amigaone)
190 link_address='0x800000'
191 ;;
189 esac 192 esac
190 ;; 193 ;;
191ps3) 194ps3)
@@ -211,11 +214,11 @@ simpleboot-virtex405-*)
211 binary=y 214 binary=y
212 ;; 215 ;;
213simpleboot-virtex440-*) 216simpleboot-virtex440-*)
214 platformo="$object/simpleboot.o $object/virtex.o" 217 platformo="$object/fixed-head.o $object/simpleboot.o $object/virtex.o"
215 binary=y 218 binary=y
216 ;; 219 ;;
217simpleboot-*) 220simpleboot-*)
218 platformo="$object/simpleboot.o" 221 platformo="$object/fixed-head.o $object/simpleboot.o"
219 binary=y 222 binary=y
220 ;; 223 ;;
221asp834x-redboot) 224asp834x-redboot)
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig
index 81cdcc4b9278..f9a08ee49b96 100644
--- a/arch/powerpc/configs/44x/canyonlands_defconfig
+++ b/arch/powerpc/configs/44x/canyonlands_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc3
4# Tue Jan 20 08:22:35 2009 4# Mon Feb 2 13:13:04 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -74,6 +74,15 @@ CONFIG_POSIX_MQUEUE=y
74# CONFIG_BSD_PROCESS_ACCT is not set 74# CONFIG_BSD_PROCESS_ACCT is not set
75# CONFIG_TASKSTATS is not set 75# CONFIG_TASKSTATS is not set
76# CONFIG_AUDIT is not set 76# CONFIG_AUDIT is not set
77
78#
79# RCU Subsystem
80#
81CONFIG_CLASSIC_RCU=y
82# CONFIG_TREE_RCU is not set
83# CONFIG_PREEMPT_RCU is not set
84# CONFIG_TREE_RCU_TRACE is not set
85# CONFIG_PREEMPT_RCU_TRACE is not set
77# CONFIG_IKCONFIG is not set 86# CONFIG_IKCONFIG is not set
78CONFIG_LOG_BUF_SHIFT=14 87CONFIG_LOG_BUF_SHIFT=14
79# CONFIG_GROUP_SCHED is not set 88# CONFIG_GROUP_SCHED is not set
@@ -147,11 +156,6 @@ CONFIG_DEFAULT_AS=y
147# CONFIG_DEFAULT_CFQ is not set 156# CONFIG_DEFAULT_CFQ is not set
148# CONFIG_DEFAULT_NOOP is not set 157# CONFIG_DEFAULT_NOOP is not set
149CONFIG_DEFAULT_IOSCHED="anticipatory" 158CONFIG_DEFAULT_IOSCHED="anticipatory"
150CONFIG_CLASSIC_RCU=y
151# CONFIG_TREE_RCU is not set
152# CONFIG_PREEMPT_RCU is not set
153# CONFIG_TREE_RCU_TRACE is not set
154# CONFIG_PREEMPT_RCU_TRACE is not set
155# CONFIG_FREEZER is not set 159# CONFIG_FREEZER is not set
156CONFIG_PPC4xx_PCI_EXPRESS=y 160CONFIG_PPC4xx_PCI_EXPRESS=y
157 161
@@ -373,6 +377,7 @@ CONFIG_CONNECTOR=y
373CONFIG_PROC_EVENTS=y 377CONFIG_PROC_EVENTS=y
374# CONFIG_MTD is not set 378# CONFIG_MTD is not set
375CONFIG_OF_DEVICE=y 379CONFIG_OF_DEVICE=y
380CONFIG_OF_I2C=y
376# CONFIG_PARPORT is not set 381# CONFIG_PARPORT is not set
377CONFIG_BLK_DEV=y 382CONFIG_BLK_DEV=y
378# CONFIG_BLK_DEV_FD is not set 383# CONFIG_BLK_DEV_FD is not set
@@ -384,6 +389,7 @@ CONFIG_BLK_DEV=y
384# CONFIG_BLK_DEV_LOOP is not set 389# CONFIG_BLK_DEV_LOOP is not set
385# CONFIG_BLK_DEV_NBD is not set 390# CONFIG_BLK_DEV_NBD is not set
386# CONFIG_BLK_DEV_SX8 is not set 391# CONFIG_BLK_DEV_SX8 is not set
392# CONFIG_BLK_DEV_UB is not set
387CONFIG_BLK_DEV_RAM=y 393CONFIG_BLK_DEV_RAM=y
388CONFIG_BLK_DEV_RAM_COUNT=16 394CONFIG_BLK_DEV_RAM_COUNT=16
389CONFIG_BLK_DEV_RAM_SIZE=35000 395CONFIG_BLK_DEV_RAM_SIZE=35000
@@ -466,6 +472,15 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
466# 472#
467# Enable WiMAX (Networking options) to see the WiMAX drivers 473# Enable WiMAX (Networking options) to see the WiMAX drivers
468# 474#
475
476#
477# USB Network Adapters
478#
479# CONFIG_USB_CATC is not set
480# CONFIG_USB_KAWETH is not set
481# CONFIG_USB_PEGASUS is not set
482# CONFIG_USB_RTL8150 is not set
483# CONFIG_USB_USBNET is not set
469# CONFIG_WAN is not set 484# CONFIG_WAN is not set
470# CONFIG_FDDI is not set 485# CONFIG_FDDI is not set
471# CONFIG_HIPPI is not set 486# CONFIG_HIPPI is not set
@@ -533,13 +548,136 @@ CONFIG_LEGACY_PTY_COUNT=256
533# CONFIG_RAW_DRIVER is not set 548# CONFIG_RAW_DRIVER is not set
534# CONFIG_TCG_TPM is not set 549# CONFIG_TCG_TPM is not set
535CONFIG_DEVPORT=y 550CONFIG_DEVPORT=y
536# CONFIG_I2C is not set 551CONFIG_I2C=y
552CONFIG_I2C_BOARDINFO=y
553CONFIG_I2C_CHARDEV=y
554CONFIG_I2C_HELPER_AUTO=y
555
556#
557# I2C Hardware Bus support
558#
559
560#
561# PC SMBus host controller drivers
562#
563# CONFIG_I2C_ALI1535 is not set
564# CONFIG_I2C_ALI1563 is not set
565# CONFIG_I2C_ALI15X3 is not set
566# CONFIG_I2C_AMD756 is not set
567# CONFIG_I2C_AMD8111 is not set
568# CONFIG_I2C_I801 is not set
569# CONFIG_I2C_ISCH is not set
570# CONFIG_I2C_PIIX4 is not set
571# CONFIG_I2C_NFORCE2 is not set
572# CONFIG_I2C_SIS5595 is not set
573# CONFIG_I2C_SIS630 is not set
574# CONFIG_I2C_SIS96X is not set
575# CONFIG_I2C_VIA is not set
576# CONFIG_I2C_VIAPRO is not set
577
578#
579# I2C system bus drivers (mostly embedded / system-on-chip)
580#
581CONFIG_I2C_IBM_IIC=y
582# CONFIG_I2C_MPC is not set
583# CONFIG_I2C_OCORES is not set
584# CONFIG_I2C_SIMTEC is not set
585
586#
587# External I2C/SMBus adapter drivers
588#
589# CONFIG_I2C_PARPORT_LIGHT is not set
590# CONFIG_I2C_TAOS_EVM is not set
591# CONFIG_I2C_TINY_USB is not set
592
593#
594# Graphics adapter I2C/DDC channel drivers
595#
596# CONFIG_I2C_VOODOO3 is not set
597
598#
599# Other I2C/SMBus bus drivers
600#
601# CONFIG_I2C_PCA_PLATFORM is not set
602# CONFIG_I2C_STUB is not set
603
604#
605# Miscellaneous I2C Chip support
606#
607# CONFIG_DS1682 is not set
608# CONFIG_SENSORS_PCF8574 is not set
609# CONFIG_PCF8575 is not set
610# CONFIG_SENSORS_PCA9539 is not set
611# CONFIG_SENSORS_PCF8591 is not set
612# CONFIG_SENSORS_MAX6875 is not set
613# CONFIG_SENSORS_TSL2550 is not set
614# CONFIG_I2C_DEBUG_CORE is not set
615# CONFIG_I2C_DEBUG_ALGO is not set
616# CONFIG_I2C_DEBUG_BUS is not set
617# CONFIG_I2C_DEBUG_CHIP is not set
537# CONFIG_SPI is not set 618# CONFIG_SPI is not set
538CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y 619CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
539# CONFIG_GPIOLIB is not set 620# CONFIG_GPIOLIB is not set
540# CONFIG_W1 is not set 621# CONFIG_W1 is not set
541# CONFIG_POWER_SUPPLY is not set 622# CONFIG_POWER_SUPPLY is not set
542# CONFIG_HWMON is not set 623CONFIG_HWMON=y
624# CONFIG_HWMON_VID is not set
625CONFIG_SENSORS_AD7414=y
626# CONFIG_SENSORS_AD7418 is not set
627# CONFIG_SENSORS_ADM1021 is not set
628# CONFIG_SENSORS_ADM1025 is not set
629# CONFIG_SENSORS_ADM1026 is not set
630# CONFIG_SENSORS_ADM1029 is not set
631# CONFIG_SENSORS_ADM1031 is not set
632# CONFIG_SENSORS_ADM9240 is not set
633# CONFIG_SENSORS_ADT7462 is not set
634# CONFIG_SENSORS_ADT7470 is not set
635# CONFIG_SENSORS_ADT7473 is not set
636# CONFIG_SENSORS_ADT7475 is not set
637# CONFIG_SENSORS_ATXP1 is not set
638# CONFIG_SENSORS_DS1621 is not set
639# CONFIG_SENSORS_I5K_AMB is not set
640# CONFIG_SENSORS_F71805F is not set
641# CONFIG_SENSORS_F71882FG is not set
642# CONFIG_SENSORS_F75375S is not set
643# CONFIG_SENSORS_GL518SM is not set
644# CONFIG_SENSORS_GL520SM is not set
645# CONFIG_SENSORS_IT87 is not set
646# CONFIG_SENSORS_LM63 is not set
647# CONFIG_SENSORS_LM75 is not set
648# CONFIG_SENSORS_LM77 is not set
649# CONFIG_SENSORS_LM78 is not set
650# CONFIG_SENSORS_LM80 is not set
651# CONFIG_SENSORS_LM83 is not set
652# CONFIG_SENSORS_LM85 is not set
653# CONFIG_SENSORS_LM87 is not set
654# CONFIG_SENSORS_LM90 is not set
655# CONFIG_SENSORS_LM92 is not set
656# CONFIG_SENSORS_LM93 is not set
657# CONFIG_SENSORS_LTC4245 is not set
658# CONFIG_SENSORS_MAX1619 is not set
659# CONFIG_SENSORS_MAX6650 is not set
660# CONFIG_SENSORS_PC87360 is not set
661# CONFIG_SENSORS_PC87427 is not set
662# CONFIG_SENSORS_SIS5595 is not set
663# CONFIG_SENSORS_DME1737 is not set
664# CONFIG_SENSORS_SMSC47M1 is not set
665# CONFIG_SENSORS_SMSC47M192 is not set
666# CONFIG_SENSORS_SMSC47B397 is not set
667# CONFIG_SENSORS_ADS7828 is not set
668# CONFIG_SENSORS_THMC50 is not set
669# CONFIG_SENSORS_VIA686A is not set
670# CONFIG_SENSORS_VT1211 is not set
671# CONFIG_SENSORS_VT8231 is not set
672# CONFIG_SENSORS_W83781D is not set
673# CONFIG_SENSORS_W83791D is not set
674# CONFIG_SENSORS_W83792D is not set
675# CONFIG_SENSORS_W83793 is not set
676# CONFIG_SENSORS_W83L785TS is not set
677# CONFIG_SENSORS_W83L786NG is not set
678# CONFIG_SENSORS_W83627HF is not set
679# CONFIG_SENSORS_W83627EHF is not set
680# CONFIG_HWMON_DEBUG_CHIP is not set
543# CONFIG_THERMAL is not set 681# CONFIG_THERMAL is not set
544# CONFIG_THERMAL_HWMON is not set 682# CONFIG_THERMAL_HWMON is not set
545# CONFIG_WATCHDOG is not set 683# CONFIG_WATCHDOG is not set
@@ -556,7 +694,12 @@ CONFIG_SSB_POSSIBLE=y
556# CONFIG_MFD_CORE is not set 694# CONFIG_MFD_CORE is not set
557# CONFIG_MFD_SM501 is not set 695# CONFIG_MFD_SM501 is not set
558# CONFIG_HTC_PASIC3 is not set 696# CONFIG_HTC_PASIC3 is not set
697# CONFIG_TWL4030_CORE is not set
559# CONFIG_MFD_TMIO is not set 698# CONFIG_MFD_TMIO is not set
699# CONFIG_PMIC_DA903X is not set
700# CONFIG_MFD_WM8400 is not set
701# CONFIG_MFD_WM8350_I2C is not set
702# CONFIG_MFD_PCF50633 is not set
560# CONFIG_REGULATOR is not set 703# CONFIG_REGULATOR is not set
561 704
562# 705#
@@ -574,6 +717,7 @@ CONFIG_SSB_POSSIBLE=y
574# Multimedia drivers 717# Multimedia drivers
575# 718#
576CONFIG_DAB=y 719CONFIG_DAB=y
720# CONFIG_USB_DABUSB is not set
577 721
578# 722#
579# Graphics support 723# Graphics support
@@ -590,7 +734,109 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
590# 734#
591# CONFIG_DISPLAY_SUPPORT is not set 735# CONFIG_DISPLAY_SUPPORT is not set
592# CONFIG_SOUND is not set 736# CONFIG_SOUND is not set
593# CONFIG_USB_SUPPORT is not set 737CONFIG_USB_SUPPORT=y
738CONFIG_USB_ARCH_HAS_HCD=y
739CONFIG_USB_ARCH_HAS_OHCI=y
740CONFIG_USB_ARCH_HAS_EHCI=y
741CONFIG_USB=y
742# CONFIG_USB_DEBUG is not set
743CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
744
745#
746# Miscellaneous USB options
747#
748CONFIG_USB_DEVICEFS=y
749CONFIG_USB_DEVICE_CLASS=y
750# CONFIG_USB_DYNAMIC_MINORS is not set
751# CONFIG_USB_OTG is not set
752# CONFIG_USB_OTG_WHITELIST is not set
753# CONFIG_USB_OTG_BLACKLIST_HUB is not set
754CONFIG_USB_MON=y
755# CONFIG_USB_WUSB is not set
756# CONFIG_USB_WUSB_CBAF is not set
757
758#
759# USB Host Controller Drivers
760#
761# CONFIG_USB_C67X00_HCD is not set
762CONFIG_USB_EHCI_HCD=m
763# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
764# CONFIG_USB_EHCI_TT_NEWSCHED is not set
765CONFIG_USB_EHCI_HCD_PPC_OF=y
766# CONFIG_USB_OXU210HP_HCD is not set
767# CONFIG_USB_ISP116X_HCD is not set
768# CONFIG_USB_ISP1760_HCD is not set
769CONFIG_USB_OHCI_HCD=y
770CONFIG_USB_OHCI_HCD_PPC_OF=y
771CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
772CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
773CONFIG_USB_OHCI_HCD_PCI=y
774CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
775CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
776CONFIG_USB_OHCI_LITTLE_ENDIAN=y
777# CONFIG_USB_UHCI_HCD is not set
778# CONFIG_USB_SL811_HCD is not set
779# CONFIG_USB_R8A66597_HCD is not set
780# CONFIG_USB_WHCI_HCD is not set
781# CONFIG_USB_HWA_HCD is not set
782
783#
784# USB Device Class drivers
785#
786# CONFIG_USB_ACM is not set
787# CONFIG_USB_PRINTER is not set
788# CONFIG_USB_WDM is not set
789# CONFIG_USB_TMC is not set
790
791#
792# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
793#
794
795#
796# see USB_STORAGE Help for more information
797#
798CONFIG_USB_LIBUSUAL=y
799
800#
801# USB Imaging devices
802#
803# CONFIG_USB_MDC800 is not set
804
805#
806# USB port drivers
807#
808# CONFIG_USB_SERIAL is not set
809
810#
811# USB Miscellaneous drivers
812#
813# CONFIG_USB_EMI62 is not set
814# CONFIG_USB_EMI26 is not set
815# CONFIG_USB_ADUTUX is not set
816# CONFIG_USB_SEVSEG is not set
817# CONFIG_USB_RIO500 is not set
818# CONFIG_USB_LEGOTOWER is not set
819# CONFIG_USB_LCD is not set
820# CONFIG_USB_BERRY_CHARGE is not set
821# CONFIG_USB_LED is not set
822# CONFIG_USB_CYPRESS_CY7C63 is not set
823# CONFIG_USB_CYTHERM is not set
824# CONFIG_USB_PHIDGET is not set
825# CONFIG_USB_IDMOUSE is not set
826# CONFIG_USB_FTDI_ELAN is not set
827# CONFIG_USB_APPLEDISPLAY is not set
828# CONFIG_USB_SISUSBVGA is not set
829# CONFIG_USB_LD is not set
830# CONFIG_USB_TRANCEVIBRATOR is not set
831# CONFIG_USB_IOWARRIOR is not set
832# CONFIG_USB_TEST is not set
833# CONFIG_USB_ISIGHTFW is not set
834# CONFIG_USB_VST is not set
835# CONFIG_USB_GADGET is not set
836
837#
838# OTG and related infrastructure
839#
594# CONFIG_UWB is not set 840# CONFIG_UWB is not set
595# CONFIG_MMC is not set 841# CONFIG_MMC is not set
596# CONFIG_MEMSTICK is not set 842# CONFIG_MEMSTICK is not set
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig
new file mode 100644
index 000000000000..e665433762ba
--- /dev/null
+++ b/arch/powerpc/configs/44x/redwood_defconfig
@@ -0,0 +1,1176 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Wed Feb 4 14:31:09 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_4xx=y
19CONFIG_BOOKE=y
20CONFIG_PTE_64BIT=y
21CONFIG_PHYS_64BIT=y
22CONFIG_PPC_MMU_NOHASH=y
23# CONFIG_PPC_MM_SLICES is not set
24CONFIG_NOT_COHERENT_CACHE=y
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_ARCH_HAS_ILOG2_U32=y
41CONFIG_GENERIC_HWEIGHT=y
42CONFIG_GENERIC_CALIBRATE_DELAY=y
43CONFIG_GENERIC_FIND_NEXT_BIT=y
44# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
45CONFIG_PPC=y
46CONFIG_EARLY_PRINTK=y
47CONFIG_GENERIC_NVRAM=y
48CONFIG_SCHED_OMIT_FRAME_POINTER=y
49CONFIG_ARCH_MAY_HAVE_PC_FDC=y
50CONFIG_PPC_OF=y
51CONFIG_OF=y
52CONFIG_PPC_UDBG_16550=y
53# CONFIG_GENERIC_TBSYNC is not set
54CONFIG_AUDIT_ARCH=y
55CONFIG_GENERIC_BUG=y
56# CONFIG_DEFAULT_UIMAGE is not set
57CONFIG_PPC_DCR_NATIVE=y
58# CONFIG_PPC_DCR_MMIO is not set
59CONFIG_PPC_DCR=y
60CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
61
62#
63# General setup
64#
65CONFIG_EXPERIMENTAL=y
66CONFIG_BROKEN_ON_SMP=y
67CONFIG_INIT_ENV_ARG_LIMIT=32
68CONFIG_LOCALVERSION=""
69CONFIG_LOCALVERSION_AUTO=y
70CONFIG_SWAP=y
71CONFIG_SYSVIPC=y
72CONFIG_SYSVIPC_SYSCTL=y
73CONFIG_POSIX_MQUEUE=y
74# CONFIG_BSD_PROCESS_ACCT is not set
75# CONFIG_TASKSTATS is not set
76# CONFIG_AUDIT is not set
77
78#
79# RCU Subsystem
80#
81CONFIG_CLASSIC_RCU=y
82# CONFIG_TREE_RCU is not set
83# CONFIG_PREEMPT_RCU is not set
84# CONFIG_TREE_RCU_TRACE is not set
85# CONFIG_PREEMPT_RCU_TRACE is not set
86# CONFIG_IKCONFIG is not set
87CONFIG_LOG_BUF_SHIFT=14
88# CONFIG_GROUP_SCHED is not set
89# CONFIG_CGROUPS is not set
90CONFIG_SYSFS_DEPRECATED=y
91CONFIG_SYSFS_DEPRECATED_V2=y
92# CONFIG_RELAY is not set
93# CONFIG_NAMESPACES is not set
94CONFIG_BLK_DEV_INITRD=y
95CONFIG_INITRAMFS_SOURCE=""
96# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
97CONFIG_SYSCTL=y
98CONFIG_EMBEDDED=y
99CONFIG_SYSCTL_SYSCALL=y
100CONFIG_KALLSYMS=y
101# CONFIG_KALLSYMS_ALL is not set
102# CONFIG_KALLSYMS_EXTRA_PASS is not set
103CONFIG_HOTPLUG=y
104CONFIG_PRINTK=y
105CONFIG_BUG=y
106CONFIG_ELF_CORE=y
107CONFIG_COMPAT_BRK=y
108CONFIG_BASE_FULL=y
109CONFIG_FUTEX=y
110CONFIG_ANON_INODES=y
111CONFIG_EPOLL=y
112CONFIG_SIGNALFD=y
113CONFIG_TIMERFD=y
114CONFIG_EVENTFD=y
115CONFIG_SHMEM=y
116CONFIG_AIO=y
117CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_PCI_QUIRKS=y
119CONFIG_SLUB_DEBUG=y
120# CONFIG_SLAB is not set
121CONFIG_SLUB=y
122# CONFIG_SLOB is not set
123# CONFIG_PROFILING is not set
124CONFIG_HAVE_OPROFILE=y
125# CONFIG_KPROBES is not set
126CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
127CONFIG_HAVE_IOREMAP_PROT=y
128CONFIG_HAVE_KPROBES=y
129CONFIG_HAVE_KRETPROBES=y
130CONFIG_HAVE_ARCH_TRACEHOOK=y
131# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
132CONFIG_SLABINFO=y
133CONFIG_RT_MUTEXES=y
134CONFIG_BASE_SMALL=0
135CONFIG_MODULES=y
136# CONFIG_MODULE_FORCE_LOAD is not set
137CONFIG_MODULE_UNLOAD=y
138# CONFIG_MODULE_FORCE_UNLOAD is not set
139# CONFIG_MODVERSIONS is not set
140# CONFIG_MODULE_SRCVERSION_ALL is not set
141CONFIG_BLOCK=y
142CONFIG_LBD=y
143# CONFIG_BLK_DEV_IO_TRACE is not set
144# CONFIG_BLK_DEV_BSG is not set
145# CONFIG_BLK_DEV_INTEGRITY is not set
146
147#
148# IO Schedulers
149#
150CONFIG_IOSCHED_NOOP=y
151CONFIG_IOSCHED_AS=y
152CONFIG_IOSCHED_DEADLINE=y
153CONFIG_IOSCHED_CFQ=y
154CONFIG_DEFAULT_AS=y
155# CONFIG_DEFAULT_DEADLINE is not set
156# CONFIG_DEFAULT_CFQ is not set
157# CONFIG_DEFAULT_NOOP is not set
158CONFIG_DEFAULT_IOSCHED="anticipatory"
159# CONFIG_FREEZER is not set
160CONFIG_PPC4xx_PCI_EXPRESS=y
161
162#
163# Platform support
164#
165# CONFIG_PPC_CELL is not set
166# CONFIG_PPC_CELL_NATIVE is not set
167# CONFIG_PQ2ADS is not set
168# CONFIG_BAMBOO is not set
169# CONFIG_EBONY is not set
170# CONFIG_SAM440EP is not set
171# CONFIG_SEQUOIA is not set
172# CONFIG_TAISHAN is not set
173# CONFIG_KATMAI is not set
174# CONFIG_RAINIER is not set
175# CONFIG_WARP is not set
176# CONFIG_ARCHES is not set
177# CONFIG_CANYONLANDS is not set
178# CONFIG_GLACIER is not set
179CONFIG_REDWOOD=y
180# CONFIG_YOSEMITE is not set
181# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
182CONFIG_PPC44x_SIMPLE=y
183# CONFIG_PPC4xx_GPIO is not set
184CONFIG_460SX=y
185# CONFIG_IPIC is not set
186# CONFIG_MPIC is not set
187# CONFIG_MPIC_WEIRD is not set
188# CONFIG_PPC_I8259 is not set
189# CONFIG_PPC_RTAS is not set
190# CONFIG_MMIO_NVRAM is not set
191# CONFIG_PPC_MPC106 is not set
192# CONFIG_PPC_970_NAP is not set
193# CONFIG_PPC_INDIRECT_IO is not set
194# CONFIG_GENERIC_IOMAP is not set
195# CONFIG_CPU_FREQ is not set
196# CONFIG_FSL_ULI1575 is not set
197# CONFIG_SIMPLE_GPIO is not set
198
199#
200# Kernel options
201#
202# CONFIG_HIGHMEM is not set
203CONFIG_TICK_ONESHOT=y
204CONFIG_NO_HZ=y
205CONFIG_HIGH_RES_TIMERS=y
206CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
207# CONFIG_HZ_100 is not set
208CONFIG_HZ_250=y
209# CONFIG_HZ_300 is not set
210# CONFIG_HZ_1000 is not set
211CONFIG_HZ=250
212CONFIG_SCHED_HRTICK=y
213CONFIG_PREEMPT_NONE=y
214# CONFIG_PREEMPT_VOLUNTARY is not set
215# CONFIG_PREEMPT is not set
216CONFIG_BINFMT_ELF=y
217# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
218# CONFIG_HAVE_AOUT is not set
219# CONFIG_BINFMT_MISC is not set
220# CONFIG_MATH_EMULATION is not set
221# CONFIG_IOMMU_HELPER is not set
222CONFIG_PPC_NEED_DMA_SYNC_OPS=y
223CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
224CONFIG_ARCH_HAS_WALK_MEMORY=y
225CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
226CONFIG_ARCH_FLATMEM_ENABLE=y
227CONFIG_ARCH_POPULATES_NODE_MAP=y
228CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y
234CONFIG_PAGEFLAGS_EXTENDED=y
235CONFIG_SPLIT_PTLOCK_CPUS=4
236CONFIG_MIGRATION=y
237CONFIG_PHYS_ADDR_T_64BIT=y
238CONFIG_ZONE_DMA_FLAG=1
239CONFIG_BOUNCE=y
240CONFIG_VIRT_TO_BUS=y
241CONFIG_UNEVICTABLE_LRU=y
242CONFIG_PPC_4K_PAGES=y
243# CONFIG_PPC_16K_PAGES is not set
244# CONFIG_PPC_64K_PAGES is not set
245CONFIG_FORCE_MAX_ZONEORDER=11
246CONFIG_PROC_DEVICETREE=y
247CONFIG_CMDLINE_BOOL=y
248CONFIG_CMDLINE=""
249CONFIG_EXTRA_TARGETS=""
250CONFIG_SECCOMP=y
251CONFIG_ISA_DMA_API=y
252
253#
254# Bus options
255#
256CONFIG_ZONE_DMA=y
257CONFIG_PPC_INDIRECT_PCI=y
258CONFIG_4xx_SOC=y
259CONFIG_PPC_PCI_CHOICE=y
260CONFIG_PCI=y
261CONFIG_PCI_DOMAINS=y
262CONFIG_PCI_SYSCALL=y
263CONFIG_PCIEPORTBUS=y
264CONFIG_PCIEAER=y
265# CONFIG_PCIEASPM is not set
266CONFIG_ARCH_SUPPORTS_MSI=y
267# CONFIG_PCI_MSI is not set
268CONFIG_PCI_LEGACY=y
269# CONFIG_PCI_DEBUG is not set
270# CONFIG_PCI_STUB is not set
271# CONFIG_PCCARD is not set
272# CONFIG_HOTPLUG_PCI is not set
273# CONFIG_HAS_RAPIDIO is not set
274
275#
276# Advanced setup
277#
278# CONFIG_ADVANCED_OPTIONS is not set
279
280#
281# Default settings for advanced configuration options are used
282#
283CONFIG_LOWMEM_SIZE=0x30000000
284CONFIG_PAGE_OFFSET=0xc0000000
285CONFIG_KERNEL_START=0xc0000000
286CONFIG_PHYSICAL_START=0x00000000
287CONFIG_TASK_SIZE=0xc0000000
288CONFIG_CONSISTENT_START=0xff100000
289CONFIG_CONSISTENT_SIZE=0x00200000
290CONFIG_NET=y
291
292#
293# Networking options
294#
295CONFIG_COMPAT_NET_DEV_OPS=y
296CONFIG_PACKET=y
297# CONFIG_PACKET_MMAP is not set
298CONFIG_UNIX=y
299# CONFIG_NET_KEY is not set
300CONFIG_INET=y
301# CONFIG_IP_MULTICAST is not set
302# CONFIG_IP_ADVANCED_ROUTER is not set
303CONFIG_IP_FIB_HASH=y
304CONFIG_IP_PNP=y
305CONFIG_IP_PNP_DHCP=y
306CONFIG_IP_PNP_BOOTP=y
307# CONFIG_IP_PNP_RARP is not set
308# CONFIG_NET_IPIP is not set
309# CONFIG_NET_IPGRE is not set
310# CONFIG_ARPD is not set
311# CONFIG_SYN_COOKIES is not set
312# CONFIG_INET_AH is not set
313# CONFIG_INET_ESP is not set
314# CONFIG_INET_IPCOMP is not set
315# CONFIG_INET_XFRM_TUNNEL is not set
316# CONFIG_INET_TUNNEL is not set
317# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
318# CONFIG_INET_XFRM_MODE_TUNNEL is not set
319# CONFIG_INET_XFRM_MODE_BEET is not set
320# CONFIG_INET_LRO is not set
321CONFIG_INET_DIAG=y
322CONFIG_INET_TCP_DIAG=y
323# CONFIG_TCP_CONG_ADVANCED is not set
324CONFIG_TCP_CONG_CUBIC=y
325CONFIG_DEFAULT_TCP_CONG="cubic"
326# CONFIG_TCP_MD5SIG is not set
327# CONFIG_IPV6 is not set
328# CONFIG_NETWORK_SECMARK is not set
329# CONFIG_NETFILTER is not set
330# CONFIG_IP_DCCP is not set
331# CONFIG_IP_SCTP is not set
332# CONFIG_TIPC is not set
333# CONFIG_ATM is not set
334# CONFIG_BRIDGE is not set
335# CONFIG_NET_DSA is not set
336# CONFIG_VLAN_8021Q is not set
337# CONFIG_DECNET is not set
338# CONFIG_LLC2 is not set
339# CONFIG_IPX is not set
340# CONFIG_ATALK is not set
341# CONFIG_X25 is not set
342# CONFIG_LAPB is not set
343# CONFIG_ECONET is not set
344# CONFIG_WAN_ROUTER is not set
345# CONFIG_NET_SCHED is not set
346# CONFIG_DCB is not set
347
348#
349# Network testing
350#
351# CONFIG_NET_PKTGEN is not set
352# CONFIG_HAMRADIO is not set
353# CONFIG_CAN is not set
354# CONFIG_IRDA is not set
355# CONFIG_BT is not set
356# CONFIG_AF_RXRPC is not set
357# CONFIG_PHONET is not set
358CONFIG_WIRELESS=y
359# CONFIG_CFG80211 is not set
360CONFIG_WIRELESS_OLD_REGULATORY=y
361# CONFIG_WIRELESS_EXT is not set
362# CONFIG_LIB80211 is not set
363# CONFIG_MAC80211 is not set
364# CONFIG_WIMAX is not set
365# CONFIG_RFKILL is not set
366# CONFIG_NET_9P is not set
367
368#
369# Device Drivers
370#
371
372#
373# Generic Driver Options
374#
375CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
376CONFIG_STANDALONE=y
377CONFIG_PREVENT_FIRMWARE_BUILD=y
378CONFIG_FW_LOADER=y
379CONFIG_FIRMWARE_IN_KERNEL=y
380CONFIG_EXTRA_FIRMWARE=""
381# CONFIG_DEBUG_DRIVER is not set
382# CONFIG_DEBUG_DEVRES is not set
383# CONFIG_SYS_HYPERVISOR is not set
384CONFIG_CONNECTOR=y
385CONFIG_PROC_EVENTS=y
386CONFIG_MTD=y
387# CONFIG_MTD_DEBUG is not set
388CONFIG_MTD_CONCAT=y
389CONFIG_MTD_PARTITIONS=y
390# CONFIG_MTD_TESTS is not set
391# CONFIG_MTD_REDBOOT_PARTS is not set
392CONFIG_MTD_CMDLINE_PARTS=y
393CONFIG_MTD_OF_PARTS=y
394# CONFIG_MTD_AR7_PARTS is not set
395
396#
397# User Modules And Translation Layers
398#
399CONFIG_MTD_CHAR=y
400CONFIG_MTD_BLKDEVS=y
401CONFIG_MTD_BLOCK=y
402# CONFIG_FTL is not set
403# CONFIG_NFTL is not set
404# CONFIG_INFTL is not set
405# CONFIG_RFD_FTL is not set
406# CONFIG_SSFDC is not set
407# CONFIG_MTD_OOPS is not set
408
409#
410# RAM/ROM/Flash chip drivers
411#
412CONFIG_MTD_CFI=y
413# CONFIG_MTD_JEDECPROBE is not set
414CONFIG_MTD_GEN_PROBE=y
415# CONFIG_MTD_CFI_ADV_OPTIONS is not set
416CONFIG_MTD_MAP_BANK_WIDTH_1=y
417CONFIG_MTD_MAP_BANK_WIDTH_2=y
418CONFIG_MTD_MAP_BANK_WIDTH_4=y
419# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
420# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
421# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
422CONFIG_MTD_CFI_I1=y
423CONFIG_MTD_CFI_I2=y
424# CONFIG_MTD_CFI_I4 is not set
425# CONFIG_MTD_CFI_I8 is not set
426# CONFIG_MTD_CFI_INTELEXT is not set
427CONFIG_MTD_CFI_AMDSTD=y
428# CONFIG_MTD_CFI_STAA is not set
429CONFIG_MTD_CFI_UTIL=y
430# CONFIG_MTD_RAM is not set
431# CONFIG_MTD_ROM is not set
432# CONFIG_MTD_ABSENT is not set
433
434#
435# Mapping drivers for chip access
436#
437# CONFIG_MTD_COMPLEX_MAPPINGS is not set
438# CONFIG_MTD_PHYSMAP is not set
439CONFIG_MTD_PHYSMAP_OF=y
440# CONFIG_MTD_INTEL_VR_NOR is not set
441# CONFIG_MTD_PLATRAM is not set
442
443#
444# Self-contained MTD device drivers
445#
446# CONFIG_MTD_PMC551 is not set
447# CONFIG_MTD_SLRAM is not set
448# CONFIG_MTD_PHRAM is not set
449# CONFIG_MTD_MTDRAM is not set
450# CONFIG_MTD_BLOCK2MTD is not set
451
452#
453# Disk-On-Chip Device Drivers
454#
455# CONFIG_MTD_DOC2000 is not set
456# CONFIG_MTD_DOC2001 is not set
457# CONFIG_MTD_DOC2001PLUS is not set
458# CONFIG_MTD_NAND is not set
459# CONFIG_MTD_ONENAND is not set
460
461#
462# LPDDR flash memory drivers
463#
464# CONFIG_MTD_LPDDR is not set
465# CONFIG_MTD_QINFO_PROBE is not set
466
467#
468# UBI - Unsorted block images
469#
470# CONFIG_MTD_UBI is not set
471CONFIG_OF_DEVICE=y
472CONFIG_OF_I2C=y
473# CONFIG_PARPORT is not set
474CONFIG_BLK_DEV=y
475# CONFIG_BLK_DEV_FD is not set
476# CONFIG_BLK_CPQ_DA is not set
477# CONFIG_BLK_CPQ_CISS_DA is not set
478# CONFIG_BLK_DEV_DAC960 is not set
479# CONFIG_BLK_DEV_UMEM is not set
480# CONFIG_BLK_DEV_COW_COMMON is not set
481# CONFIG_BLK_DEV_LOOP is not set
482# CONFIG_BLK_DEV_NBD is not set
483# CONFIG_BLK_DEV_SX8 is not set
484CONFIG_BLK_DEV_RAM=y
485CONFIG_BLK_DEV_RAM_COUNT=16
486CONFIG_BLK_DEV_RAM_SIZE=35000
487# CONFIG_BLK_DEV_XIP is not set
488# CONFIG_CDROM_PKTCDVD is not set
489# CONFIG_ATA_OVER_ETH is not set
490# CONFIG_XILINX_SYSACE is not set
491# CONFIG_BLK_DEV_HD is not set
492# CONFIG_MISC_DEVICES is not set
493CONFIG_HAVE_IDE=y
494# CONFIG_IDE is not set
495
496#
497# SCSI device support
498#
499# CONFIG_RAID_ATTRS is not set
500CONFIG_SCSI=y
501CONFIG_SCSI_DMA=y
502# CONFIG_SCSI_TGT is not set
503# CONFIG_SCSI_NETLINK is not set
504CONFIG_SCSI_PROC_FS=y
505
506#
507# SCSI support type (disk, tape, CD-ROM)
508#
509CONFIG_BLK_DEV_SD=y
510# CONFIG_CHR_DEV_ST is not set
511# CONFIG_CHR_DEV_OSST is not set
512# CONFIG_BLK_DEV_SR is not set
513CONFIG_CHR_DEV_SG=y
514# CONFIG_CHR_DEV_SCH is not set
515
516#
517# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
518#
519# CONFIG_SCSI_MULTI_LUN is not set
520# CONFIG_SCSI_CONSTANTS is not set
521# CONFIG_SCSI_LOGGING is not set
522# CONFIG_SCSI_SCAN_ASYNC is not set
523CONFIG_SCSI_WAIT_SCAN=m
524
525#
526# SCSI Transports
527#
528# CONFIG_SCSI_SPI_ATTRS is not set
529# CONFIG_SCSI_FC_ATTRS is not set
530# CONFIG_SCSI_ISCSI_ATTRS is not set
531CONFIG_SCSI_SAS_ATTRS=y
532# CONFIG_SCSI_SAS_LIBSAS is not set
533# CONFIG_SCSI_SRP_ATTRS is not set
534CONFIG_SCSI_LOWLEVEL=y
535# CONFIG_ISCSI_TCP is not set
536# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
537# CONFIG_SCSI_3W_9XXX is not set
538# CONFIG_SCSI_ACARD is not set
539# CONFIG_SCSI_AACRAID is not set
540# CONFIG_SCSI_AIC7XXX is not set
541# CONFIG_SCSI_AIC7XXX_OLD is not set
542# CONFIG_SCSI_AIC79XX is not set
543# CONFIG_SCSI_AIC94XX is not set
544# CONFIG_SCSI_DPT_I2O is not set
545# CONFIG_SCSI_ADVANSYS is not set
546# CONFIG_SCSI_ARCMSR is not set
547# CONFIG_MEGARAID_NEWGEN is not set
548# CONFIG_MEGARAID_LEGACY is not set
549# CONFIG_MEGARAID_SAS is not set
550# CONFIG_SCSI_HPTIOP is not set
551# CONFIG_SCSI_BUSLOGIC is not set
552# CONFIG_LIBFC is not set
553# CONFIG_FCOE is not set
554# CONFIG_SCSI_DMX3191D is not set
555# CONFIG_SCSI_EATA is not set
556# CONFIG_SCSI_FUTURE_DOMAIN is not set
557# CONFIG_SCSI_GDTH is not set
558# CONFIG_SCSI_IPS is not set
559# CONFIG_SCSI_INITIO is not set
560# CONFIG_SCSI_INIA100 is not set
561# CONFIG_SCSI_MVSAS is not set
562# CONFIG_SCSI_STEX is not set
563# CONFIG_SCSI_SYM53C8XX_2 is not set
564# CONFIG_SCSI_QLOGIC_1280 is not set
565# CONFIG_SCSI_QLA_FC is not set
566# CONFIG_SCSI_QLA_ISCSI is not set
567# CONFIG_SCSI_LPFC is not set
568# CONFIG_SCSI_DC395x is not set
569# CONFIG_SCSI_DC390T is not set
570# CONFIG_SCSI_NSP32 is not set
571# CONFIG_SCSI_DEBUG is not set
572# CONFIG_SCSI_SRP is not set
573# CONFIG_SCSI_DH is not set
574# CONFIG_ATA is not set
575# CONFIG_MD is not set
576CONFIG_FUSION=y
577# CONFIG_FUSION_SPI is not set
578# CONFIG_FUSION_FC is not set
579CONFIG_FUSION_SAS=y
580CONFIG_FUSION_MAX_SGE=128
581# CONFIG_FUSION_CTL is not set
582# CONFIG_FUSION_LOGGING is not set
583
584#
585# IEEE 1394 (FireWire) support
586#
587
588#
589# Enable only one of the two stacks, unless you know what you are doing
590#
591# CONFIG_FIREWIRE is not set
592# CONFIG_IEEE1394 is not set
593CONFIG_I2O=y
594CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
595CONFIG_I2O_EXT_ADAPTEC=y
596# CONFIG_I2O_CONFIG is not set
597# CONFIG_I2O_BUS is not set
598# CONFIG_I2O_BLOCK is not set
599# CONFIG_I2O_SCSI is not set
600# CONFIG_I2O_PROC is not set
601# CONFIG_MACINTOSH_DRIVERS is not set
602CONFIG_NETDEVICES=y
603# CONFIG_DUMMY is not set
604# CONFIG_BONDING is not set
605# CONFIG_MACVLAN is not set
606# CONFIG_EQUALIZER is not set
607# CONFIG_TUN is not set
608# CONFIG_VETH is not set
609# CONFIG_ARCNET is not set
610# CONFIG_PHYLIB is not set
611CONFIG_NET_ETHERNET=y
612# CONFIG_MII is not set
613# CONFIG_HAPPYMEAL is not set
614# CONFIG_SUNGEM is not set
615# CONFIG_CASSINI is not set
616# CONFIG_NET_VENDOR_3COM is not set
617# CONFIG_NET_TULIP is not set
618# CONFIG_HP100 is not set
619CONFIG_IBM_NEW_EMAC=y
620CONFIG_IBM_NEW_EMAC_RXB=256
621CONFIG_IBM_NEW_EMAC_TXB=256
622CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
623CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
624CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
625CONFIG_IBM_NEW_EMAC_DEBUG=y
626CONFIG_IBM_NEW_EMAC_ZMII=y
627CONFIG_IBM_NEW_EMAC_RGMII=y
628CONFIG_IBM_NEW_EMAC_TAH=y
629CONFIG_IBM_NEW_EMAC_EMAC4=y
630# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
631# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
632# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
633# CONFIG_NET_PCI is not set
634# CONFIG_B44 is not set
635# CONFIG_ATL2 is not set
636CONFIG_NETDEV_1000=y
637# CONFIG_ACENIC is not set
638# CONFIG_DL2K is not set
639# CONFIG_E1000 is not set
640CONFIG_E1000E=y
641# CONFIG_IP1000 is not set
642# CONFIG_IGB is not set
643# CONFIG_NS83820 is not set
644# CONFIG_HAMACHI is not set
645# CONFIG_YELLOWFIN is not set
646# CONFIG_R8169 is not set
647# CONFIG_SIS190 is not set
648# CONFIG_SKGE is not set
649# CONFIG_SKY2 is not set
650# CONFIG_VIA_VELOCITY is not set
651# CONFIG_TIGON3 is not set
652# CONFIG_BNX2 is not set
653# CONFIG_QLA3XXX is not set
654# CONFIG_ATL1 is not set
655# CONFIG_ATL1E is not set
656# CONFIG_JME is not set
657# CONFIG_NETDEV_10000 is not set
658# CONFIG_TR is not set
659
660#
661# Wireless LAN
662#
663# CONFIG_WLAN_PRE80211 is not set
664# CONFIG_WLAN_80211 is not set
665# CONFIG_IWLWIFI_LEDS is not set
666
667#
668# Enable WiMAX (Networking options) to see the WiMAX drivers
669#
670# CONFIG_WAN is not set
671# CONFIG_FDDI is not set
672# CONFIG_HIPPI is not set
673# CONFIG_PPP is not set
674# CONFIG_SLIP is not set
675# CONFIG_NET_FC is not set
676# CONFIG_NETCONSOLE is not set
677# CONFIG_NETPOLL is not set
678# CONFIG_NET_POLL_CONTROLLER is not set
679# CONFIG_ISDN is not set
680# CONFIG_PHONE is not set
681
682#
683# Input device support
684#
685# CONFIG_INPUT is not set
686
687#
688# Hardware I/O ports
689#
690# CONFIG_SERIO is not set
691# CONFIG_GAMEPORT is not set
692
693#
694# Character devices
695#
696# CONFIG_VT is not set
697CONFIG_DEVKMEM=y
698# CONFIG_SERIAL_NONSTANDARD is not set
699# CONFIG_NOZOMI is not set
700
701#
702# Serial drivers
703#
704CONFIG_SERIAL_8250=y
705CONFIG_SERIAL_8250_CONSOLE=y
706# CONFIG_SERIAL_8250_PCI is not set
707CONFIG_SERIAL_8250_NR_UARTS=1
708CONFIG_SERIAL_8250_RUNTIME_UARTS=1
709CONFIG_SERIAL_8250_EXTENDED=y
710# CONFIG_SERIAL_8250_MANY_PORTS is not set
711CONFIG_SERIAL_8250_SHARE_IRQ=y
712# CONFIG_SERIAL_8250_DETECT_IRQ is not set
713# CONFIG_SERIAL_8250_RSA is not set
714
715#
716# Non-8250 serial port support
717#
718# CONFIG_SERIAL_UARTLITE is not set
719CONFIG_SERIAL_CORE=y
720CONFIG_SERIAL_CORE_CONSOLE=y
721# CONFIG_SERIAL_JSM is not set
722CONFIG_SERIAL_OF_PLATFORM=y
723# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
724CONFIG_UNIX98_PTYS=y
725# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
726CONFIG_LEGACY_PTYS=y
727CONFIG_LEGACY_PTY_COUNT=256
728# CONFIG_HVC_UDBG is not set
729# CONFIG_IPMI_HANDLER is not set
730# CONFIG_HW_RANDOM is not set
731# CONFIG_NVRAM is not set
732# CONFIG_GEN_RTC is not set
733# CONFIG_R3964 is not set
734# CONFIG_APPLICOM is not set
735# CONFIG_RAW_DRIVER is not set
736# CONFIG_TCG_TPM is not set
737CONFIG_DEVPORT=y
738CONFIG_I2C=y
739CONFIG_I2C_BOARDINFO=y
740CONFIG_I2C_CHARDEV=y
741CONFIG_I2C_HELPER_AUTO=y
742
743#
744# I2C Hardware Bus support
745#
746
747#
748# PC SMBus host controller drivers
749#
750# CONFIG_I2C_ALI1535 is not set
751# CONFIG_I2C_ALI1563 is not set
752# CONFIG_I2C_ALI15X3 is not set
753# CONFIG_I2C_AMD756 is not set
754# CONFIG_I2C_AMD8111 is not set
755# CONFIG_I2C_I801 is not set
756# CONFIG_I2C_ISCH is not set
757# CONFIG_I2C_PIIX4 is not set
758# CONFIG_I2C_NFORCE2 is not set
759# CONFIG_I2C_SIS5595 is not set
760# CONFIG_I2C_SIS630 is not set
761# CONFIG_I2C_SIS96X is not set
762# CONFIG_I2C_VIA is not set
763# CONFIG_I2C_VIAPRO is not set
764
765#
766# I2C system bus drivers (mostly embedded / system-on-chip)
767#
768CONFIG_I2C_IBM_IIC=y
769# CONFIG_I2C_MPC is not set
770# CONFIG_I2C_OCORES is not set
771# CONFIG_I2C_SIMTEC is not set
772
773#
774# External I2C/SMBus adapter drivers
775#
776# CONFIG_I2C_PARPORT_LIGHT is not set
777# CONFIG_I2C_TAOS_EVM is not set
778
779#
780# Graphics adapter I2C/DDC channel drivers
781#
782# CONFIG_I2C_VOODOO3 is not set
783
784#
785# Other I2C/SMBus bus drivers
786#
787# CONFIG_I2C_PCA_PLATFORM is not set
788# CONFIG_I2C_STUB is not set
789
790#
791# Miscellaneous I2C Chip support
792#
793# CONFIG_DS1682 is not set
794# CONFIG_SENSORS_PCF8574 is not set
795# CONFIG_PCF8575 is not set
796# CONFIG_SENSORS_PCA9539 is not set
797# CONFIG_SENSORS_PCF8591 is not set
798# CONFIG_SENSORS_MAX6875 is not set
799# CONFIG_SENSORS_TSL2550 is not set
800CONFIG_I2C_DEBUG_CORE=y
801CONFIG_I2C_DEBUG_ALGO=y
802CONFIG_I2C_DEBUG_BUS=y
803CONFIG_I2C_DEBUG_CHIP=y
804# CONFIG_SPI is not set
805CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
806# CONFIG_GPIOLIB is not set
807# CONFIG_W1 is not set
808# CONFIG_POWER_SUPPLY is not set
809# CONFIG_HWMON is not set
810# CONFIG_THERMAL is not set
811# CONFIG_THERMAL_HWMON is not set
812# CONFIG_WATCHDOG is not set
813CONFIG_SSB_POSSIBLE=y
814
815#
816# Sonics Silicon Backplane
817#
818# CONFIG_SSB is not set
819
820#
821# Multifunction device drivers
822#
823# CONFIG_MFD_CORE is not set
824# CONFIG_MFD_SM501 is not set
825# CONFIG_HTC_PASIC3 is not set
826# CONFIG_TWL4030_CORE is not set
827# CONFIG_MFD_TMIO is not set
828# CONFIG_PMIC_DA903X is not set
829# CONFIG_MFD_WM8400 is not set
830# CONFIG_MFD_WM8350_I2C is not set
831# CONFIG_MFD_PCF50633 is not set
832# CONFIG_REGULATOR is not set
833
834#
835# Multimedia devices
836#
837
838#
839# Multimedia core support
840#
841# CONFIG_VIDEO_DEV is not set
842# CONFIG_DVB_CORE is not set
843# CONFIG_VIDEO_MEDIA is not set
844
845#
846# Multimedia drivers
847#
848CONFIG_DAB=y
849
850#
851# Graphics support
852#
853# CONFIG_AGP is not set
854# CONFIG_DRM is not set
855# CONFIG_VGASTATE is not set
856CONFIG_VIDEO_OUTPUT_CONTROL=m
857# CONFIG_FB is not set
858# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
859
860#
861# Display device support
862#
863# CONFIG_DISPLAY_SUPPORT is not set
864# CONFIG_SOUND is not set
865# CONFIG_USB_SUPPORT is not set
866# CONFIG_UWB is not set
867# CONFIG_MMC is not set
868# CONFIG_MEMSTICK is not set
869# CONFIG_NEW_LEDS is not set
870# CONFIG_ACCESSIBILITY is not set
871# CONFIG_INFINIBAND is not set
872# CONFIG_EDAC is not set
873# CONFIG_RTC_CLASS is not set
874CONFIG_DMADEVICES=y
875
876#
877# DMA Devices
878#
879# CONFIG_UIO is not set
880# CONFIG_STAGING is not set
881
882#
883# File systems
884#
885CONFIG_EXT2_FS=y
886# CONFIG_EXT2_FS_XATTR is not set
887# CONFIG_EXT2_FS_XIP is not set
888# CONFIG_EXT3_FS is not set
889# CONFIG_EXT4_FS is not set
890# CONFIG_REISERFS_FS is not set
891# CONFIG_JFS_FS is not set
892# CONFIG_FS_POSIX_ACL is not set
893CONFIG_FILE_LOCKING=y
894# CONFIG_XFS_FS is not set
895# CONFIG_GFS2_FS is not set
896# CONFIG_OCFS2_FS is not set
897# CONFIG_BTRFS_FS is not set
898CONFIG_DNOTIFY=y
899CONFIG_INOTIFY=y
900CONFIG_INOTIFY_USER=y
901# CONFIG_QUOTA is not set
902# CONFIG_AUTOFS_FS is not set
903# CONFIG_AUTOFS4_FS is not set
904# CONFIG_FUSE_FS is not set
905
906#
907# CD-ROM/DVD Filesystems
908#
909# CONFIG_ISO9660_FS is not set
910# CONFIG_UDF_FS is not set
911
912#
913# DOS/FAT/NT Filesystems
914#
915# CONFIG_MSDOS_FS is not set
916# CONFIG_VFAT_FS is not set
917# CONFIG_NTFS_FS is not set
918
919#
920# Pseudo filesystems
921#
922CONFIG_PROC_FS=y
923CONFIG_PROC_KCORE=y
924CONFIG_PROC_SYSCTL=y
925CONFIG_PROC_PAGE_MONITOR=y
926CONFIG_SYSFS=y
927CONFIG_TMPFS=y
928# CONFIG_TMPFS_POSIX_ACL is not set
929# CONFIG_HUGETLB_PAGE is not set
930# CONFIG_CONFIGFS_FS is not set
931CONFIG_MISC_FILESYSTEMS=y
932# CONFIG_ADFS_FS is not set
933# CONFIG_AFFS_FS is not set
934# CONFIG_HFS_FS is not set
935# CONFIG_HFSPLUS_FS is not set
936# CONFIG_BEFS_FS is not set
937# CONFIG_BFS_FS is not set
938# CONFIG_EFS_FS is not set
939# CONFIG_JFFS2_FS is not set
940CONFIG_CRAMFS=y
941# CONFIG_SQUASHFS is not set
942# CONFIG_VXFS_FS is not set
943# CONFIG_MINIX_FS is not set
944# CONFIG_OMFS_FS is not set
945# CONFIG_HPFS_FS is not set
946# CONFIG_QNX4FS_FS is not set
947# CONFIG_ROMFS_FS is not set
948# CONFIG_SYSV_FS is not set
949# CONFIG_UFS_FS is not set
950CONFIG_NETWORK_FILESYSTEMS=y
951CONFIG_NFS_FS=y
952CONFIG_NFS_V3=y
953# CONFIG_NFS_V3_ACL is not set
954# CONFIG_NFS_V4 is not set
955CONFIG_ROOT_NFS=y
956# CONFIG_NFSD is not set
957CONFIG_LOCKD=y
958CONFIG_LOCKD_V4=y
959CONFIG_NFS_COMMON=y
960CONFIG_SUNRPC=y
961# CONFIG_SUNRPC_REGISTER_V4 is not set
962# CONFIG_RPCSEC_GSS_KRB5 is not set
963# CONFIG_RPCSEC_GSS_SPKM3 is not set
964# CONFIG_SMB_FS is not set
965# CONFIG_CIFS is not set
966# CONFIG_NCP_FS is not set
967# CONFIG_CODA_FS is not set
968# CONFIG_AFS_FS is not set
969
970#
971# Partition Types
972#
973# CONFIG_PARTITION_ADVANCED is not set
974CONFIG_MSDOS_PARTITION=y
975# CONFIG_NLS is not set
976# CONFIG_DLM is not set
977
978#
979# Library routines
980#
981CONFIG_BITREVERSE=y
982CONFIG_GENERIC_FIND_LAST_BIT=y
983# CONFIG_CRC_CCITT is not set
984# CONFIG_CRC16 is not set
985# CONFIG_CRC_T10DIF is not set
986# CONFIG_CRC_ITU_T is not set
987CONFIG_CRC32=y
988# CONFIG_CRC7 is not set
989# CONFIG_LIBCRC32C is not set
990CONFIG_ZLIB_INFLATE=y
991CONFIG_PLIST=y
992CONFIG_HAS_IOMEM=y
993CONFIG_HAS_IOPORT=y
994CONFIG_HAS_DMA=y
995CONFIG_HAVE_LMB=y
996
997#
998# Kernel hacking
999#
1000# CONFIG_PRINTK_TIME is not set
1001CONFIG_ENABLE_WARN_DEPRECATED=y
1002CONFIG_ENABLE_MUST_CHECK=y
1003CONFIG_FRAME_WARN=1024
1004CONFIG_MAGIC_SYSRQ=y
1005# CONFIG_UNUSED_SYMBOLS is not set
1006CONFIG_DEBUG_FS=y
1007# CONFIG_HEADERS_CHECK is not set
1008CONFIG_DEBUG_KERNEL=y
1009# CONFIG_DEBUG_SHIRQ is not set
1010CONFIG_DETECT_SOFTLOCKUP=y
1011# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1012CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1013CONFIG_SCHED_DEBUG=y
1014# CONFIG_SCHEDSTATS is not set
1015# CONFIG_TIMER_STATS is not set
1016# CONFIG_DEBUG_OBJECTS is not set
1017# CONFIG_SLUB_DEBUG_ON is not set
1018# CONFIG_SLUB_STATS is not set
1019# CONFIG_DEBUG_RT_MUTEXES is not set
1020# CONFIG_RT_MUTEX_TESTER is not set
1021# CONFIG_DEBUG_SPINLOCK is not set
1022# CONFIG_DEBUG_MUTEXES is not set
1023# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1024# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1025# CONFIG_DEBUG_KOBJECT is not set
1026# CONFIG_DEBUG_BUGVERBOSE is not set
1027# CONFIG_DEBUG_INFO is not set
1028# CONFIG_DEBUG_VM is not set
1029# CONFIG_DEBUG_WRITECOUNT is not set
1030# CONFIG_DEBUG_MEMORY_INIT is not set
1031# CONFIG_DEBUG_LIST is not set
1032# CONFIG_DEBUG_SG is not set
1033# CONFIG_DEBUG_NOTIFIERS is not set
1034# CONFIG_BOOT_PRINTK_DELAY is not set
1035# CONFIG_RCU_TORTURE_TEST is not set
1036# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1037# CONFIG_BACKTRACE_SELF_TEST is not set
1038# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1039# CONFIG_FAULT_INJECTION is not set
1040# CONFIG_LATENCYTOP is not set
1041CONFIG_SYSCTL_SYSCALL_CHECK=y
1042CONFIG_HAVE_FUNCTION_TRACER=y
1043CONFIG_HAVE_DYNAMIC_FTRACE=y
1044CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1045
1046#
1047# Tracers
1048#
1049# CONFIG_FUNCTION_TRACER is not set
1050# CONFIG_SCHED_TRACER is not set
1051# CONFIG_CONTEXT_SWITCH_TRACER is not set
1052# CONFIG_BOOT_TRACER is not set
1053# CONFIG_TRACE_BRANCH_PROFILING is not set
1054# CONFIG_STACK_TRACER is not set
1055# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1056# CONFIG_SAMPLES is not set
1057CONFIG_HAVE_ARCH_KGDB=y
1058# CONFIG_KGDB is not set
1059CONFIG_PRINT_STACK_DEPTH=64
1060# CONFIG_DEBUG_STACKOVERFLOW is not set
1061# CONFIG_DEBUG_STACK_USAGE is not set
1062# CONFIG_DEBUG_PAGEALLOC is not set
1063# CONFIG_CODE_PATCHING_SELFTEST is not set
1064# CONFIG_FTR_FIXUP_SELFTEST is not set
1065# CONFIG_MSI_BITMAP_SELFTEST is not set
1066# CONFIG_XMON is not set
1067# CONFIG_IRQSTACKS is not set
1068# CONFIG_VIRQ_DEBUG is not set
1069# CONFIG_BDI_SWITCH is not set
1070# CONFIG_PPC_EARLY_DEBUG is not set
1071
1072#
1073# Security options
1074#
1075# CONFIG_KEYS is not set
1076# CONFIG_SECURITY is not set
1077# CONFIG_SECURITYFS is not set
1078# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1079CONFIG_CRYPTO=y
1080
1081#
1082# Crypto core or helper
1083#
1084# CONFIG_CRYPTO_FIPS is not set
1085CONFIG_CRYPTO_ALGAPI=y
1086CONFIG_CRYPTO_ALGAPI2=y
1087CONFIG_CRYPTO_AEAD=y
1088CONFIG_CRYPTO_AEAD2=y
1089CONFIG_CRYPTO_BLKCIPHER=y
1090CONFIG_CRYPTO_BLKCIPHER2=y
1091CONFIG_CRYPTO_HASH=y
1092CONFIG_CRYPTO_HASH2=y
1093CONFIG_CRYPTO_RNG=y
1094CONFIG_CRYPTO_RNG2=y
1095CONFIG_CRYPTO_MANAGER=y
1096CONFIG_CRYPTO_MANAGER2=y
1097CONFIG_CRYPTO_GF128MUL=y
1098# CONFIG_CRYPTO_NULL is not set
1099CONFIG_CRYPTO_CRYPTD=y
1100CONFIG_CRYPTO_AUTHENC=y
1101# CONFIG_CRYPTO_TEST is not set
1102
1103#
1104# Authenticated Encryption with Associated Data
1105#
1106CONFIG_CRYPTO_CCM=y
1107CONFIG_CRYPTO_GCM=y
1108CONFIG_CRYPTO_SEQIV=y
1109
1110#
1111# Block modes
1112#
1113CONFIG_CRYPTO_CBC=y
1114CONFIG_CRYPTO_CTR=y
1115CONFIG_CRYPTO_CTS=y
1116CONFIG_CRYPTO_ECB=y
1117CONFIG_CRYPTO_LRW=y
1118CONFIG_CRYPTO_PCBC=y
1119CONFIG_CRYPTO_XTS=y
1120
1121#
1122# Hash modes
1123#
1124CONFIG_CRYPTO_HMAC=y
1125CONFIG_CRYPTO_XCBC=y
1126
1127#
1128# Digest
1129#
1130# CONFIG_CRYPTO_CRC32C is not set
1131CONFIG_CRYPTO_MD4=y
1132CONFIG_CRYPTO_MD5=y
1133# CONFIG_CRYPTO_MICHAEL_MIC is not set
1134# CONFIG_CRYPTO_RMD128 is not set
1135# CONFIG_CRYPTO_RMD160 is not set
1136# CONFIG_CRYPTO_RMD256 is not set
1137# CONFIG_CRYPTO_RMD320 is not set
1138CONFIG_CRYPTO_SHA1=y
1139CONFIG_CRYPTO_SHA256=y
1140CONFIG_CRYPTO_SHA512=y
1141# CONFIG_CRYPTO_TGR192 is not set
1142# CONFIG_CRYPTO_WP512 is not set
1143
1144#
1145# Ciphers
1146#
1147CONFIG_CRYPTO_AES=y
1148# CONFIG_CRYPTO_ANUBIS is not set
1149CONFIG_CRYPTO_ARC4=y
1150CONFIG_CRYPTO_BLOWFISH=y
1151# CONFIG_CRYPTO_CAMELLIA is not set
1152# CONFIG_CRYPTO_CAST5 is not set
1153# CONFIG_CRYPTO_CAST6 is not set
1154CONFIG_CRYPTO_DES=y
1155# CONFIG_CRYPTO_FCRYPT is not set
1156# CONFIG_CRYPTO_KHAZAD is not set
1157# CONFIG_CRYPTO_SALSA20 is not set
1158# CONFIG_CRYPTO_SEED is not set
1159# CONFIG_CRYPTO_SERPENT is not set
1160# CONFIG_CRYPTO_TEA is not set
1161# CONFIG_CRYPTO_TWOFISH is not set
1162
1163#
1164# Compression
1165#
1166# CONFIG_CRYPTO_DEFLATE is not set
1167# CONFIG_CRYPTO_LZO is not set
1168
1169#
1170# Random Number Generation
1171#
1172# CONFIG_CRYPTO_ANSI_CPRNG is not set
1173CONFIG_CRYPTO_HW=y
1174# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1175# CONFIG_PPC_CLOCK is not set
1176# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
new file mode 100644
index 000000000000..df2c16337794
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -0,0 +1,1889 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc7
4# Fri Mar 13 15:36:11 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_PHYS_64BIT is not set
19CONFIG_ALTIVEC=y
20CONFIG_PPC_STD_MMU=y
21CONFIG_PPC_STD_MMU_32=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_SMP=y
24CONFIG_NR_CPUS=2
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_GENERIC_LOCKBREAK=y
41CONFIG_ARCH_HAS_ILOG2_U32=y
42CONFIG_GENERIC_HWEIGHT=y
43CONFIG_GENERIC_CALIBRATE_DELAY=y
44CONFIG_GENERIC_FIND_NEXT_BIT=y
45CONFIG_GENERIC_GPIO=y
46# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
47CONFIG_PPC=y
48CONFIG_EARLY_PRINTK=y
49CONFIG_GENERIC_NVRAM=y
50CONFIG_SCHED_OMIT_FRAME_POINTER=y
51CONFIG_ARCH_MAY_HAVE_PC_FDC=y
52CONFIG_PPC_OF=y
53CONFIG_OF=y
54CONFIG_PPC_UDBG_16550=y
55CONFIG_GENERIC_TBSYNC=y
56CONFIG_AUDIT_ARCH=y
57CONFIG_GENERIC_BUG=y
58CONFIG_DEFAULT_UIMAGE=y
59# CONFIG_PPC_DCR_NATIVE is not set
60# CONFIG_PPC_DCR_MMIO is not set
61CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
62
63#
64# General setup
65#
66CONFIG_EXPERIMENTAL=y
67CONFIG_LOCK_KERNEL=y
68CONFIG_INIT_ENV_ARG_LIMIT=32
69CONFIG_LOCALVERSION=""
70CONFIG_LOCALVERSION_AUTO=y
71CONFIG_SWAP=y
72CONFIG_SYSVIPC=y
73CONFIG_SYSVIPC_SYSCTL=y
74CONFIG_POSIX_MQUEUE=y
75CONFIG_BSD_PROCESS_ACCT=y
76CONFIG_BSD_PROCESS_ACCT_V3=y
77# CONFIG_TASKSTATS is not set
78# CONFIG_AUDIT is not set
79
80#
81# RCU Subsystem
82#
83CONFIG_CLASSIC_RCU=y
84# CONFIG_TREE_RCU is not set
85# CONFIG_PREEMPT_RCU is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
88CONFIG_IKCONFIG=y
89CONFIG_IKCONFIG_PROC=y
90CONFIG_LOG_BUF_SHIFT=14
91CONFIG_GROUP_SCHED=y
92CONFIG_FAIR_GROUP_SCHED=y
93# CONFIG_RT_GROUP_SCHED is not set
94CONFIG_USER_SCHED=y
95# CONFIG_CGROUP_SCHED is not set
96# CONFIG_CGROUPS is not set
97CONFIG_SYSFS_DEPRECATED=y
98CONFIG_SYSFS_DEPRECATED_V2=y
99CONFIG_RELAY=y
100# CONFIG_NAMESPACES is not set
101CONFIG_BLK_DEV_INITRD=y
102CONFIG_INITRAMFS_SOURCE=""
103# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
104CONFIG_SYSCTL=y
105CONFIG_EMBEDDED=y
106CONFIG_SYSCTL_SYSCALL=y
107CONFIG_KALLSYMS=y
108# CONFIG_KALLSYMS_ALL is not set
109# CONFIG_KALLSYMS_EXTRA_PASS is not set
110CONFIG_HOTPLUG=y
111CONFIG_PRINTK=y
112CONFIG_BUG=y
113CONFIG_ELF_CORE=y
114CONFIG_COMPAT_BRK=y
115CONFIG_BASE_FULL=y
116CONFIG_FUTEX=y
117CONFIG_ANON_INODES=y
118CONFIG_EPOLL=y
119CONFIG_SIGNALFD=y
120CONFIG_TIMERFD=y
121CONFIG_EVENTFD=y
122CONFIG_SHMEM=y
123CONFIG_AIO=y
124CONFIG_VM_EVENT_COUNTERS=y
125CONFIG_PCI_QUIRKS=y
126CONFIG_SLAB=y
127# CONFIG_SLUB is not set
128# CONFIG_SLOB is not set
129# CONFIG_PROFILING is not set
130CONFIG_HAVE_OPROFILE=y
131# CONFIG_KPROBES is not set
132CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
133CONFIG_HAVE_IOREMAP_PROT=y
134CONFIG_HAVE_KPROBES=y
135CONFIG_HAVE_KRETPROBES=y
136CONFIG_HAVE_ARCH_TRACEHOOK=y
137CONFIG_USE_GENERIC_SMP_HELPERS=y
138# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
139CONFIG_SLABINFO=y
140CONFIG_RT_MUTEXES=y
141CONFIG_BASE_SMALL=0
142CONFIG_MODULES=y
143# CONFIG_MODULE_FORCE_LOAD is not set
144CONFIG_MODULE_UNLOAD=y
145# CONFIG_MODULE_FORCE_UNLOAD is not set
146# CONFIG_MODVERSIONS is not set
147# CONFIG_MODULE_SRCVERSION_ALL is not set
148CONFIG_STOP_MACHINE=y
149CONFIG_BLOCK=y
150# CONFIG_LBD is not set
151# CONFIG_BLK_DEV_IO_TRACE is not set
152# CONFIG_BLK_DEV_BSG is not set
153# CONFIG_BLK_DEV_INTEGRITY is not set
154
155#
156# IO Schedulers
157#
158CONFIG_IOSCHED_NOOP=y
159CONFIG_IOSCHED_AS=y
160CONFIG_IOSCHED_DEADLINE=y
161CONFIG_IOSCHED_CFQ=y
162# CONFIG_DEFAULT_AS is not set
163# CONFIG_DEFAULT_DEADLINE is not set
164CONFIG_DEFAULT_CFQ=y
165# CONFIG_DEFAULT_NOOP is not set
166CONFIG_DEFAULT_IOSCHED="cfq"
167# CONFIG_FREEZER is not set
168
169#
170# Platform support
171#
172CONFIG_PPC_MULTIPLATFORM=y
173CONFIG_CLASSIC32=y
174# CONFIG_PPC_CHRP is not set
175# CONFIG_MPC5121_ADS is not set
176# CONFIG_MPC5121_GENERIC is not set
177# CONFIG_PPC_MPC52xx is not set
178# CONFIG_PPC_PMAC is not set
179# CONFIG_PPC_CELL is not set
180# CONFIG_PPC_CELL_NATIVE is not set
181# CONFIG_PPC_82xx is not set
182# CONFIG_PQ2ADS is not set
183# CONFIG_PPC_83xx is not set
184CONFIG_PPC_86xx=y
185# CONFIG_MPC8641_HPCN is not set
186# CONFIG_SBC8641D is not set
187# CONFIG_MPC8610_HPCD is not set
188CONFIG_GEF_PPC9A=y
189# CONFIG_GEF_SBC310 is not set
190# CONFIG_GEF_SBC610 is not set
191CONFIG_MPC8641=y
192# CONFIG_IPIC is not set
193CONFIG_MPIC=y
194# CONFIG_MPIC_WEIRD is not set
195# CONFIG_PPC_I8259 is not set
196# CONFIG_PPC_RTAS is not set
197# CONFIG_MMIO_NVRAM is not set
198# CONFIG_PPC_MPC106 is not set
199# CONFIG_PPC_970_NAP is not set
200# CONFIG_PPC_INDIRECT_IO is not set
201# CONFIG_GENERIC_IOMAP is not set
202# CONFIG_CPU_FREQ is not set
203# CONFIG_TAU is not set
204# CONFIG_QUICC_ENGINE is not set
205# CONFIG_FSL_ULI1575 is not set
206# CONFIG_MPC8xxx_GPIO is not set
207# CONFIG_SIMPLE_GPIO is not set
208
209#
210# Kernel options
211#
212# CONFIG_HIGHMEM is not set
213CONFIG_TICK_ONESHOT=y
214# CONFIG_NO_HZ is not set
215CONFIG_HIGH_RES_TIMERS=y
216CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
217# CONFIG_HZ_100 is not set
218# CONFIG_HZ_250 is not set
219# CONFIG_HZ_300 is not set
220CONFIG_HZ_1000=y
221CONFIG_HZ=1000
222CONFIG_SCHED_HRTICK=y
223# CONFIG_PREEMPT_NONE is not set
224# CONFIG_PREEMPT_VOLUNTARY is not set
225CONFIG_PREEMPT=y
226CONFIG_BINFMT_ELF=y
227# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
228# CONFIG_HAVE_AOUT is not set
229CONFIG_BINFMT_MISC=m
230# CONFIG_IOMMU_HELPER is not set
231CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
232CONFIG_ARCH_HAS_WALK_MEMORY=y
233CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
234# CONFIG_KEXEC is not set
235# CONFIG_CRASH_DUMP is not set
236CONFIG_IRQ_ALL_CPUS=y
237CONFIG_ARCH_FLATMEM_ENABLE=y
238CONFIG_ARCH_POPULATES_NODE_MAP=y
239CONFIG_SELECT_MEMORY_MODEL=y
240CONFIG_FLATMEM_MANUAL=y
241# CONFIG_DISCONTIGMEM_MANUAL is not set
242# CONFIG_SPARSEMEM_MANUAL is not set
243CONFIG_FLATMEM=y
244CONFIG_FLAT_NODE_MEM_MAP=y
245CONFIG_PAGEFLAGS_EXTENDED=y
246CONFIG_SPLIT_PTLOCK_CPUS=4
247CONFIG_MIGRATION=y
248# CONFIG_PHYS_ADDR_T_64BIT is not set
249CONFIG_ZONE_DMA_FLAG=1
250CONFIG_BOUNCE=y
251CONFIG_VIRT_TO_BUS=y
252CONFIG_UNEVICTABLE_LRU=y
253CONFIG_PPC_4K_PAGES=y
254# CONFIG_PPC_16K_PAGES is not set
255# CONFIG_PPC_64K_PAGES is not set
256CONFIG_FORCE_MAX_ZONEORDER=11
257# CONFIG_PROC_DEVICETREE is not set
258# CONFIG_CMDLINE_BOOL is not set
259CONFIG_EXTRA_TARGETS=""
260# CONFIG_PM is not set
261CONFIG_SECCOMP=y
262CONFIG_ISA_DMA_API=y
263
264#
265# Bus options
266#
267CONFIG_ZONE_DMA=y
268CONFIG_GENERIC_ISA_DMA=y
269CONFIG_PPC_INDIRECT_PCI=y
270CONFIG_FSL_SOC=y
271CONFIG_FSL_PCI=y
272CONFIG_PPC_PCI_CHOICE=y
273CONFIG_PCI=y
274CONFIG_PCI_DOMAINS=y
275CONFIG_PCI_SYSCALL=y
276CONFIG_PCIEPORTBUS=y
277CONFIG_PCIEAER=y
278# CONFIG_PCIEASPM is not set
279CONFIG_ARCH_SUPPORTS_MSI=y
280# CONFIG_PCI_MSI is not set
281# CONFIG_PCI_LEGACY is not set
282CONFIG_PCI_DEBUG=y
283# CONFIG_PCI_STUB is not set
284# CONFIG_PCCARD is not set
285# CONFIG_HOTPLUG_PCI is not set
286# CONFIG_HAS_RAPIDIO is not set
287
288#
289# Advanced setup
290#
291# CONFIG_ADVANCED_OPTIONS is not set
292
293#
294# Default settings for advanced configuration options are used
295#
296CONFIG_LOWMEM_SIZE=0x30000000
297CONFIG_PAGE_OFFSET=0xc0000000
298CONFIG_KERNEL_START=0xc0000000
299CONFIG_PHYSICAL_START=0x00000000
300CONFIG_TASK_SIZE=0xc0000000
301CONFIG_NET=y
302
303#
304# Networking options
305#
306CONFIG_COMPAT_NET_DEV_OPS=y
307CONFIG_PACKET=y
308CONFIG_PACKET_MMAP=y
309CONFIG_UNIX=y
310CONFIG_XFRM=y
311CONFIG_XFRM_USER=m
312# CONFIG_XFRM_SUB_POLICY is not set
313# CONFIG_XFRM_MIGRATE is not set
314# CONFIG_XFRM_STATISTICS is not set
315CONFIG_XFRM_IPCOMP=m
316CONFIG_NET_KEY=m
317# CONFIG_NET_KEY_MIGRATE is not set
318CONFIG_INET=y
319CONFIG_IP_MULTICAST=y
320CONFIG_IP_ADVANCED_ROUTER=y
321CONFIG_ASK_IP_FIB_HASH=y
322# CONFIG_IP_FIB_TRIE is not set
323CONFIG_IP_FIB_HASH=y
324CONFIG_IP_MULTIPLE_TABLES=y
325CONFIG_IP_ROUTE_MULTIPATH=y
326CONFIG_IP_ROUTE_VERBOSE=y
327CONFIG_IP_PNP=y
328CONFIG_IP_PNP_DHCP=y
329CONFIG_IP_PNP_BOOTP=y
330CONFIG_IP_PNP_RARP=y
331CONFIG_NET_IPIP=m
332CONFIG_NET_IPGRE=m
333CONFIG_NET_IPGRE_BROADCAST=y
334CONFIG_IP_MROUTE=y
335CONFIG_IP_PIMSM_V1=y
336CONFIG_IP_PIMSM_V2=y
337# CONFIG_ARPD is not set
338CONFIG_SYN_COOKIES=y
339CONFIG_INET_AH=m
340CONFIG_INET_ESP=m
341CONFIG_INET_IPCOMP=m
342CONFIG_INET_XFRM_TUNNEL=m
343CONFIG_INET_TUNNEL=m
344CONFIG_INET_XFRM_MODE_TRANSPORT=y
345CONFIG_INET_XFRM_MODE_TUNNEL=y
346CONFIG_INET_XFRM_MODE_BEET=y
347# CONFIG_INET_LRO is not set
348CONFIG_INET_DIAG=y
349CONFIG_INET_TCP_DIAG=y
350# CONFIG_TCP_CONG_ADVANCED is not set
351CONFIG_TCP_CONG_CUBIC=y
352CONFIG_DEFAULT_TCP_CONG="cubic"
353# CONFIG_TCP_MD5SIG is not set
354CONFIG_IPV6=m
355# CONFIG_IPV6_PRIVACY is not set
356# CONFIG_IPV6_ROUTER_PREF is not set
357# CONFIG_IPV6_OPTIMISTIC_DAD is not set
358CONFIG_INET6_AH=m
359CONFIG_INET6_ESP=m
360CONFIG_INET6_IPCOMP=m
361# CONFIG_IPV6_MIP6 is not set
362CONFIG_INET6_XFRM_TUNNEL=m
363CONFIG_INET6_TUNNEL=m
364CONFIG_INET6_XFRM_MODE_TRANSPORT=m
365CONFIG_INET6_XFRM_MODE_TUNNEL=m
366CONFIG_INET6_XFRM_MODE_BEET=m
367# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
368CONFIG_IPV6_SIT=m
369CONFIG_IPV6_NDISC_NODETYPE=y
370CONFIG_IPV6_TUNNEL=m
371# CONFIG_IPV6_MULTIPLE_TABLES is not set
372# CONFIG_IPV6_MROUTE is not set
373# CONFIG_NETLABEL is not set
374# CONFIG_NETWORK_SECMARK is not set
375CONFIG_NETFILTER=y
376# CONFIG_NETFILTER_DEBUG is not set
377CONFIG_NETFILTER_ADVANCED=y
378CONFIG_BRIDGE_NETFILTER=y
379
380#
381# Core Netfilter Configuration
382#
383# CONFIG_NETFILTER_NETLINK_QUEUE is not set
384# CONFIG_NETFILTER_NETLINK_LOG is not set
385# CONFIG_NF_CONNTRACK is not set
386CONFIG_NETFILTER_XTABLES=m
387# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
388# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
389# CONFIG_NETFILTER_XT_TARGET_MARK is not set
390# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
391# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
392# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
393# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
394# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
395# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
396# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
397# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
398# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
399# CONFIG_NETFILTER_XT_MATCH_ESP is not set
400# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
401# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
402# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
403# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
404# CONFIG_NETFILTER_XT_MATCH_MAC is not set
405# CONFIG_NETFILTER_XT_MATCH_MARK is not set
406# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
407# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
408# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
409# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
410# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
411# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
412# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
413# CONFIG_NETFILTER_XT_MATCH_REALM is not set
414# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
415# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
416# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
417# CONFIG_NETFILTER_XT_MATCH_STRING is not set
418# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
419# CONFIG_NETFILTER_XT_MATCH_TIME is not set
420# CONFIG_NETFILTER_XT_MATCH_U32 is not set
421# CONFIG_IP_VS is not set
422
423#
424# IP: Netfilter Configuration
425#
426# CONFIG_NF_DEFRAG_IPV4 is not set
427CONFIG_IP_NF_QUEUE=m
428CONFIG_IP_NF_IPTABLES=m
429CONFIG_IP_NF_MATCH_ADDRTYPE=m
430# CONFIG_IP_NF_MATCH_AH is not set
431CONFIG_IP_NF_MATCH_ECN=m
432CONFIG_IP_NF_MATCH_TTL=m
433CONFIG_IP_NF_FILTER=m
434CONFIG_IP_NF_TARGET_REJECT=m
435CONFIG_IP_NF_TARGET_LOG=m
436CONFIG_IP_NF_TARGET_ULOG=m
437CONFIG_IP_NF_MANGLE=m
438CONFIG_IP_NF_TARGET_ECN=m
439# CONFIG_IP_NF_TARGET_TTL is not set
440CONFIG_IP_NF_RAW=m
441# CONFIG_IP_NF_SECURITY is not set
442CONFIG_IP_NF_ARPTABLES=m
443CONFIG_IP_NF_ARPFILTER=m
444CONFIG_IP_NF_ARP_MANGLE=m
445
446#
447# IPv6: Netfilter Configuration
448#
449CONFIG_IP6_NF_QUEUE=m
450CONFIG_IP6_NF_IPTABLES=m
451# CONFIG_IP6_NF_MATCH_AH is not set
452CONFIG_IP6_NF_MATCH_EUI64=m
453CONFIG_IP6_NF_MATCH_FRAG=m
454CONFIG_IP6_NF_MATCH_OPTS=m
455CONFIG_IP6_NF_MATCH_HL=m
456CONFIG_IP6_NF_MATCH_IPV6HEADER=m
457# CONFIG_IP6_NF_MATCH_MH is not set
458CONFIG_IP6_NF_MATCH_RT=m
459CONFIG_IP6_NF_TARGET_LOG=m
460CONFIG_IP6_NF_FILTER=m
461# CONFIG_IP6_NF_TARGET_REJECT is not set
462CONFIG_IP6_NF_MANGLE=m
463# CONFIG_IP6_NF_TARGET_HL is not set
464CONFIG_IP6_NF_RAW=m
465# CONFIG_IP6_NF_SECURITY is not set
466# CONFIG_BRIDGE_NF_EBTABLES is not set
467# CONFIG_IP_DCCP is not set
468CONFIG_IP_SCTP=m
469# CONFIG_SCTP_DBG_MSG is not set
470# CONFIG_SCTP_DBG_OBJCNT is not set
471# CONFIG_SCTP_HMAC_NONE is not set
472# CONFIG_SCTP_HMAC_SHA1 is not set
473CONFIG_SCTP_HMAC_MD5=y
474CONFIG_TIPC=m
475# CONFIG_TIPC_ADVANCED is not set
476# CONFIG_TIPC_DEBUG is not set
477CONFIG_ATM=m
478CONFIG_ATM_CLIP=m
479# CONFIG_ATM_CLIP_NO_ICMP is not set
480CONFIG_ATM_LANE=m
481CONFIG_ATM_MPOA=m
482CONFIG_ATM_BR2684=m
483# CONFIG_ATM_BR2684_IPFILTER is not set
484CONFIG_STP=m
485CONFIG_BRIDGE=m
486# CONFIG_NET_DSA is not set
487CONFIG_VLAN_8021Q=m
488# CONFIG_VLAN_8021Q_GVRP is not set
489# CONFIG_DECNET is not set
490CONFIG_LLC=m
491# CONFIG_LLC2 is not set
492# CONFIG_IPX is not set
493# CONFIG_ATALK is not set
494# CONFIG_X25 is not set
495# CONFIG_LAPB is not set
496# CONFIG_ECONET is not set
497CONFIG_WAN_ROUTER=m
498CONFIG_NET_SCHED=y
499
500#
501# Queueing/Scheduling
502#
503CONFIG_NET_SCH_CBQ=m
504CONFIG_NET_SCH_HTB=m
505CONFIG_NET_SCH_HFSC=m
506CONFIG_NET_SCH_ATM=m
507CONFIG_NET_SCH_PRIO=m
508# CONFIG_NET_SCH_MULTIQ is not set
509CONFIG_NET_SCH_RED=m
510CONFIG_NET_SCH_SFQ=m
511CONFIG_NET_SCH_TEQL=m
512CONFIG_NET_SCH_TBF=m
513CONFIG_NET_SCH_GRED=m
514CONFIG_NET_SCH_DSMARK=m
515CONFIG_NET_SCH_NETEM=m
516# CONFIG_NET_SCH_DRR is not set
517
518#
519# Classification
520#
521CONFIG_NET_CLS=y
522# CONFIG_NET_CLS_BASIC is not set
523CONFIG_NET_CLS_TCINDEX=m
524CONFIG_NET_CLS_ROUTE4=m
525CONFIG_NET_CLS_ROUTE=y
526CONFIG_NET_CLS_FW=m
527CONFIG_NET_CLS_U32=m
528# CONFIG_CLS_U32_PERF is not set
529# CONFIG_CLS_U32_MARK is not set
530CONFIG_NET_CLS_RSVP=m
531CONFIG_NET_CLS_RSVP6=m
532# CONFIG_NET_CLS_FLOW is not set
533# CONFIG_NET_EMATCH is not set
534# CONFIG_NET_CLS_ACT is not set
535# CONFIG_NET_CLS_IND is not set
536CONFIG_NET_SCH_FIFO=y
537# CONFIG_DCB is not set
538
539#
540# Network testing
541#
542CONFIG_NET_PKTGEN=m
543# CONFIG_HAMRADIO is not set
544# CONFIG_CAN is not set
545# CONFIG_IRDA is not set
546# CONFIG_BT is not set
547# CONFIG_AF_RXRPC is not set
548# CONFIG_PHONET is not set
549CONFIG_FIB_RULES=y
550CONFIG_WIRELESS=y
551# CONFIG_CFG80211 is not set
552CONFIG_WIRELESS_OLD_REGULATORY=y
553# CONFIG_WIRELESS_EXT is not set
554# CONFIG_LIB80211 is not set
555# CONFIG_MAC80211 is not set
556# CONFIG_WIMAX is not set
557# CONFIG_RFKILL is not set
558# CONFIG_NET_9P is not set
559
560#
561# Device Drivers
562#
563
564#
565# Generic Driver Options
566#
567CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
568CONFIG_STANDALONE=y
569CONFIG_PREVENT_FIRMWARE_BUILD=y
570# CONFIG_FW_LOADER is not set
571# CONFIG_DEBUG_DRIVER is not set
572# CONFIG_DEBUG_DEVRES is not set
573# CONFIG_SYS_HYPERVISOR is not set
574# CONFIG_CONNECTOR is not set
575CONFIG_MTD=y
576# CONFIG_MTD_DEBUG is not set
577CONFIG_MTD_CONCAT=y
578CONFIG_MTD_PARTITIONS=y
579# CONFIG_MTD_TESTS is not set
580# CONFIG_MTD_REDBOOT_PARTS is not set
581# CONFIG_MTD_CMDLINE_PARTS is not set
582CONFIG_MTD_OF_PARTS=y
583# CONFIG_MTD_AR7_PARTS is not set
584
585#
586# User Modules And Translation Layers
587#
588CONFIG_MTD_CHAR=y
589CONFIG_MTD_BLKDEVS=y
590CONFIG_MTD_BLOCK=y
591# CONFIG_FTL is not set
592# CONFIG_NFTL is not set
593# CONFIG_INFTL is not set
594# CONFIG_RFD_FTL is not set
595# CONFIG_SSFDC is not set
596# CONFIG_MTD_OOPS is not set
597
598#
599# RAM/ROM/Flash chip drivers
600#
601CONFIG_MTD_CFI=y
602CONFIG_MTD_JEDECPROBE=y
603CONFIG_MTD_GEN_PROBE=y
604# CONFIG_MTD_CFI_ADV_OPTIONS is not set
605CONFIG_MTD_MAP_BANK_WIDTH_1=y
606CONFIG_MTD_MAP_BANK_WIDTH_2=y
607CONFIG_MTD_MAP_BANK_WIDTH_4=y
608# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
609# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
610# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
611CONFIG_MTD_CFI_I1=y
612CONFIG_MTD_CFI_I2=y
613# CONFIG_MTD_CFI_I4 is not set
614# CONFIG_MTD_CFI_I8 is not set
615CONFIG_MTD_CFI_INTELEXT=y
616CONFIG_MTD_CFI_AMDSTD=y
617# CONFIG_MTD_CFI_STAA is not set
618CONFIG_MTD_CFI_UTIL=y
619# CONFIG_MTD_RAM is not set
620# CONFIG_MTD_ROM is not set
621# CONFIG_MTD_ABSENT is not set
622
623#
624# Mapping drivers for chip access
625#
626# CONFIG_MTD_COMPLEX_MAPPINGS is not set
627# CONFIG_MTD_PHYSMAP is not set
628CONFIG_MTD_PHYSMAP_OF=y
629# CONFIG_MTD_INTEL_VR_NOR is not set
630# CONFIG_MTD_PLATRAM is not set
631
632#
633# Self-contained MTD device drivers
634#
635# CONFIG_MTD_PMC551 is not set
636# CONFIG_MTD_SLRAM is not set
637# CONFIG_MTD_PHRAM is not set
638# CONFIG_MTD_MTDRAM is not set
639# CONFIG_MTD_BLOCK2MTD is not set
640
641#
642# Disk-On-Chip Device Drivers
643#
644# CONFIG_MTD_DOC2000 is not set
645# CONFIG_MTD_DOC2001 is not set
646# CONFIG_MTD_DOC2001PLUS is not set
647# CONFIG_MTD_NAND is not set
648# CONFIG_MTD_ONENAND is not set
649
650#
651# LPDDR flash memory drivers
652#
653# CONFIG_MTD_LPDDR is not set
654
655#
656# UBI - Unsorted block images
657#
658# CONFIG_MTD_UBI is not set
659CONFIG_OF_DEVICE=y
660CONFIG_OF_GPIO=y
661CONFIG_OF_I2C=y
662# CONFIG_PARPORT is not set
663CONFIG_BLK_DEV=y
664# CONFIG_BLK_DEV_FD is not set
665# CONFIG_BLK_CPQ_DA is not set
666# CONFIG_BLK_CPQ_CISS_DA is not set
667# CONFIG_BLK_DEV_DAC960 is not set
668# CONFIG_BLK_DEV_UMEM is not set
669# CONFIG_BLK_DEV_COW_COMMON is not set
670CONFIG_BLK_DEV_LOOP=m
671CONFIG_BLK_DEV_CRYPTOLOOP=m
672CONFIG_BLK_DEV_NBD=m
673# CONFIG_BLK_DEV_SX8 is not set
674# CONFIG_BLK_DEV_UB is not set
675CONFIG_BLK_DEV_RAM=y
676CONFIG_BLK_DEV_RAM_COUNT=16
677CONFIG_BLK_DEV_RAM_SIZE=131072
678# CONFIG_BLK_DEV_XIP is not set
679# CONFIG_CDROM_PKTCDVD is not set
680# CONFIG_ATA_OVER_ETH is not set
681# CONFIG_BLK_DEV_HD is not set
682CONFIG_MISC_DEVICES=y
683# CONFIG_PHANTOM is not set
684# CONFIG_SGI_IOC4 is not set
685# CONFIG_TIFM_CORE is not set
686# CONFIG_ICS932S401 is not set
687# CONFIG_ENCLOSURE_SERVICES is not set
688# CONFIG_HP_ILO is not set
689# CONFIG_C2PORT is not set
690
691#
692# EEPROM support
693#
694# CONFIG_EEPROM_AT24 is not set
695# CONFIG_EEPROM_LEGACY is not set
696# CONFIG_EEPROM_93CX6 is not set
697CONFIG_HAVE_IDE=y
698# CONFIG_IDE is not set
699
700#
701# SCSI device support
702#
703# CONFIG_RAID_ATTRS is not set
704CONFIG_SCSI=y
705CONFIG_SCSI_DMA=y
706# CONFIG_SCSI_TGT is not set
707# CONFIG_SCSI_NETLINK is not set
708CONFIG_SCSI_PROC_FS=y
709
710#
711# SCSI support type (disk, tape, CD-ROM)
712#
713CONFIG_BLK_DEV_SD=y
714CONFIG_CHR_DEV_ST=y
715# CONFIG_CHR_DEV_OSST is not set
716CONFIG_BLK_DEV_SR=y
717# CONFIG_BLK_DEV_SR_VENDOR is not set
718# CONFIG_CHR_DEV_SG is not set
719# CONFIG_CHR_DEV_SCH is not set
720
721#
722# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
723#
724# CONFIG_SCSI_MULTI_LUN is not set
725# CONFIG_SCSI_CONSTANTS is not set
726# CONFIG_SCSI_LOGGING is not set
727# CONFIG_SCSI_SCAN_ASYNC is not set
728CONFIG_SCSI_WAIT_SCAN=m
729
730#
731# SCSI Transports
732#
733# CONFIG_SCSI_SPI_ATTRS is not set
734# CONFIG_SCSI_FC_ATTRS is not set
735# CONFIG_SCSI_ISCSI_ATTRS is not set
736# CONFIG_SCSI_SAS_LIBSAS is not set
737# CONFIG_SCSI_SRP_ATTRS is not set
738CONFIG_SCSI_LOWLEVEL=y
739# CONFIG_ISCSI_TCP is not set
740# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
741# CONFIG_SCSI_3W_9XXX is not set
742# CONFIG_SCSI_ACARD is not set
743# CONFIG_SCSI_AACRAID is not set
744# CONFIG_SCSI_AIC7XXX is not set
745# CONFIG_SCSI_AIC7XXX_OLD is not set
746# CONFIG_SCSI_AIC79XX is not set
747# CONFIG_SCSI_AIC94XX is not set
748# CONFIG_SCSI_DPT_I2O is not set
749# CONFIG_SCSI_ADVANSYS is not set
750# CONFIG_SCSI_ARCMSR is not set
751# CONFIG_MEGARAID_NEWGEN is not set
752# CONFIG_MEGARAID_LEGACY is not set
753# CONFIG_MEGARAID_SAS is not set
754# CONFIG_SCSI_HPTIOP is not set
755# CONFIG_SCSI_BUSLOGIC is not set
756# CONFIG_LIBFC is not set
757# CONFIG_FCOE is not set
758# CONFIG_SCSI_DMX3191D is not set
759# CONFIG_SCSI_EATA is not set
760# CONFIG_SCSI_FUTURE_DOMAIN is not set
761# CONFIG_SCSI_GDTH is not set
762# CONFIG_SCSI_IPS is not set
763# CONFIG_SCSI_INITIO is not set
764# CONFIG_SCSI_INIA100 is not set
765# CONFIG_SCSI_MVSAS is not set
766# CONFIG_SCSI_STEX is not set
767# CONFIG_SCSI_SYM53C8XX_2 is not set
768# CONFIG_SCSI_IPR is not set
769# CONFIG_SCSI_QLOGIC_1280 is not set
770# CONFIG_SCSI_QLA_FC is not set
771# CONFIG_SCSI_QLA_ISCSI is not set
772# CONFIG_SCSI_LPFC is not set
773# CONFIG_SCSI_DC395x is not set
774# CONFIG_SCSI_DC390T is not set
775# CONFIG_SCSI_NSP32 is not set
776# CONFIG_SCSI_DEBUG is not set
777# CONFIG_SCSI_SRP is not set
778# CONFIG_SCSI_DH is not set
779CONFIG_ATA=y
780# CONFIG_ATA_NONSTANDARD is not set
781CONFIG_SATA_PMP=y
782# CONFIG_SATA_AHCI is not set
783# CONFIG_SATA_SIL24 is not set
784# CONFIG_SATA_FSL is not set
785CONFIG_ATA_SFF=y
786# CONFIG_SATA_SVW is not set
787# CONFIG_ATA_PIIX is not set
788# CONFIG_SATA_MV is not set
789# CONFIG_SATA_NV is not set
790# CONFIG_PDC_ADMA is not set
791# CONFIG_SATA_QSTOR is not set
792# CONFIG_SATA_PROMISE is not set
793# CONFIG_SATA_SX4 is not set
794CONFIG_SATA_SIL=y
795# CONFIG_SATA_SIS is not set
796# CONFIG_SATA_ULI is not set
797# CONFIG_SATA_VIA is not set
798# CONFIG_SATA_VITESSE is not set
799# CONFIG_SATA_INIC162X is not set
800# CONFIG_PATA_ALI is not set
801# CONFIG_PATA_AMD is not set
802# CONFIG_PATA_ARTOP is not set
803# CONFIG_PATA_ATIIXP is not set
804# CONFIG_PATA_CMD640_PCI is not set
805# CONFIG_PATA_CMD64X is not set
806# CONFIG_PATA_CS5520 is not set
807# CONFIG_PATA_CS5530 is not set
808# CONFIG_PATA_CYPRESS is not set
809# CONFIG_PATA_EFAR is not set
810# CONFIG_ATA_GENERIC is not set
811# CONFIG_PATA_HPT366 is not set
812# CONFIG_PATA_HPT37X is not set
813# CONFIG_PATA_HPT3X2N is not set
814# CONFIG_PATA_HPT3X3 is not set
815# CONFIG_PATA_IT821X is not set
816# CONFIG_PATA_IT8213 is not set
817# CONFIG_PATA_JMICRON is not set
818# CONFIG_PATA_TRIFLEX is not set
819# CONFIG_PATA_MARVELL is not set
820# CONFIG_PATA_MPIIX is not set
821# CONFIG_PATA_OLDPIIX is not set
822# CONFIG_PATA_NETCELL is not set
823# CONFIG_PATA_NINJA32 is not set
824# CONFIG_PATA_NS87410 is not set
825# CONFIG_PATA_NS87415 is not set
826# CONFIG_PATA_OPTI is not set
827# CONFIG_PATA_OPTIDMA is not set
828# CONFIG_PATA_PDC_OLD is not set
829# CONFIG_PATA_RADISYS is not set
830# CONFIG_PATA_RZ1000 is not set
831# CONFIG_PATA_SC1200 is not set
832# CONFIG_PATA_SERVERWORKS is not set
833# CONFIG_PATA_PDC2027X is not set
834# CONFIG_PATA_SIL680 is not set
835# CONFIG_PATA_SIS is not set
836# CONFIG_PATA_VIA is not set
837# CONFIG_PATA_WINBOND is not set
838# CONFIG_PATA_PLATFORM is not set
839# CONFIG_PATA_SCH is not set
840# CONFIG_MD is not set
841# CONFIG_FUSION is not set
842
843#
844# IEEE 1394 (FireWire) support
845#
846
847#
848# Enable only one of the two stacks, unless you know what you are doing
849#
850# CONFIG_FIREWIRE is not set
851# CONFIG_IEEE1394 is not set
852# CONFIG_I2O is not set
853# CONFIG_MACINTOSH_DRIVERS is not set
854CONFIG_NETDEVICES=y
855CONFIG_DUMMY=m
856CONFIG_BONDING=m
857# CONFIG_MACVLAN is not set
858# CONFIG_EQUALIZER is not set
859CONFIG_TUN=m
860# CONFIG_VETH is not set
861# CONFIG_ARCNET is not set
862CONFIG_PHYLIB=y
863
864#
865# MII PHY device drivers
866#
867# CONFIG_MARVELL_PHY is not set
868# CONFIG_DAVICOM_PHY is not set
869# CONFIG_QSEMI_PHY is not set
870# CONFIG_LXT_PHY is not set
871# CONFIG_CICADA_PHY is not set
872# CONFIG_VITESSE_PHY is not set
873# CONFIG_SMSC_PHY is not set
874# CONFIG_BROADCOM_PHY is not set
875# CONFIG_ICPLUS_PHY is not set
876# CONFIG_REALTEK_PHY is not set
877# CONFIG_NATIONAL_PHY is not set
878# CONFIG_STE10XP is not set
879# CONFIG_LSI_ET1011C_PHY is not set
880# CONFIG_FIXED_PHY is not set
881# CONFIG_MDIO_BITBANG is not set
882CONFIG_NET_ETHERNET=y
883CONFIG_MII=y
884# CONFIG_HAPPYMEAL is not set
885# CONFIG_SUNGEM is not set
886# CONFIG_CASSINI is not set
887# CONFIG_NET_VENDOR_3COM is not set
888# CONFIG_NET_TULIP is not set
889# CONFIG_HP100 is not set
890# CONFIG_IBM_NEW_EMAC_ZMII is not set
891# CONFIG_IBM_NEW_EMAC_RGMII is not set
892# CONFIG_IBM_NEW_EMAC_TAH is not set
893# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
894# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
895# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
896# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
897# CONFIG_NET_PCI is not set
898# CONFIG_B44 is not set
899# CONFIG_ATL2 is not set
900CONFIG_NETDEV_1000=y
901# CONFIG_ACENIC is not set
902# CONFIG_DL2K is not set
903# CONFIG_E1000 is not set
904# CONFIG_E1000E is not set
905# CONFIG_IP1000 is not set
906# CONFIG_IGB is not set
907# CONFIG_NS83820 is not set
908# CONFIG_HAMACHI is not set
909# CONFIG_YELLOWFIN is not set
910# CONFIG_R8169 is not set
911# CONFIG_SIS190 is not set
912# CONFIG_SKGE is not set
913# CONFIG_SKY2 is not set
914# CONFIG_VIA_VELOCITY is not set
915# CONFIG_TIGON3 is not set
916# CONFIG_BNX2 is not set
917CONFIG_GIANFAR=y
918# CONFIG_MV643XX_ETH is not set
919# CONFIG_QLA3XXX is not set
920# CONFIG_ATL1 is not set
921# CONFIG_ATL1E is not set
922# CONFIG_ATL1C is not set
923# CONFIG_JME is not set
924# CONFIG_NETDEV_10000 is not set
925# CONFIG_TR is not set
926
927#
928# Wireless LAN
929#
930# CONFIG_WLAN_PRE80211 is not set
931# CONFIG_WLAN_80211 is not set
932# CONFIG_IWLWIFI_LEDS is not set
933
934#
935# Enable WiMAX (Networking options) to see the WiMAX drivers
936#
937
938#
939# USB Network Adapters
940#
941# CONFIG_USB_CATC is not set
942# CONFIG_USB_KAWETH is not set
943# CONFIG_USB_PEGASUS is not set
944# CONFIG_USB_RTL8150 is not set
945# CONFIG_USB_USBNET is not set
946# CONFIG_WAN is not set
947CONFIG_ATM_DRIVERS=y
948# CONFIG_ATM_DUMMY is not set
949# CONFIG_ATM_TCP is not set
950# CONFIG_ATM_LANAI is not set
951# CONFIG_ATM_ENI is not set
952# CONFIG_ATM_FIRESTREAM is not set
953# CONFIG_ATM_ZATM is not set
954# CONFIG_ATM_NICSTAR is not set
955# CONFIG_ATM_IDT77252 is not set
956# CONFIG_ATM_AMBASSADOR is not set
957# CONFIG_ATM_HORIZON is not set
958# CONFIG_ATM_IA is not set
959# CONFIG_ATM_FORE200E is not set
960# CONFIG_ATM_HE is not set
961# CONFIG_ATM_SOLOS is not set
962# CONFIG_FDDI is not set
963# CONFIG_HIPPI is not set
964CONFIG_PPP=m
965CONFIG_PPP_MULTILINK=y
966CONFIG_PPP_FILTER=y
967CONFIG_PPP_ASYNC=m
968CONFIG_PPP_SYNC_TTY=m
969CONFIG_PPP_DEFLATE=m
970CONFIG_PPP_BSDCOMP=m
971# CONFIG_PPP_MPPE is not set
972CONFIG_PPPOE=m
973CONFIG_PPPOATM=m
974# CONFIG_PPPOL2TP is not set
975CONFIG_SLIP=m
976CONFIG_SLIP_COMPRESSED=y
977CONFIG_SLHC=m
978CONFIG_SLIP_SMART=y
979CONFIG_SLIP_MODE_SLIP6=y
980# CONFIG_NET_FC is not set
981CONFIG_NETCONSOLE=y
982# CONFIG_NETCONSOLE_DYNAMIC is not set
983CONFIG_NETPOLL=y
984CONFIG_NETPOLL_TRAP=y
985CONFIG_NET_POLL_CONTROLLER=y
986# CONFIG_ISDN is not set
987# CONFIG_PHONE is not set
988
989#
990# Input device support
991#
992CONFIG_INPUT=y
993CONFIG_INPUT_FF_MEMLESS=m
994# CONFIG_INPUT_POLLDEV is not set
995
996#
997# Userland interfaces
998#
999CONFIG_INPUT_MOUSEDEV=y
1000CONFIG_INPUT_MOUSEDEV_PSAUX=y
1001CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
1002CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
1003# CONFIG_INPUT_JOYDEV is not set
1004# CONFIG_INPUT_EVDEV is not set
1005# CONFIG_INPUT_EVBUG is not set
1006
1007#
1008# Input Device Drivers
1009#
1010# CONFIG_INPUT_KEYBOARD is not set
1011# CONFIG_INPUT_MOUSE is not set
1012# CONFIG_INPUT_JOYSTICK is not set
1013# CONFIG_INPUT_TABLET is not set
1014# CONFIG_INPUT_TOUCHSCREEN is not set
1015# CONFIG_INPUT_MISC is not set
1016
1017#
1018# Hardware I/O ports
1019#
1020# CONFIG_SERIO is not set
1021# CONFIG_GAMEPORT is not set
1022
1023#
1024# Character devices
1025#
1026CONFIG_VT=y
1027CONFIG_CONSOLE_TRANSLATIONS=y
1028CONFIG_VT_CONSOLE=y
1029CONFIG_HW_CONSOLE=y
1030# CONFIG_VT_HW_CONSOLE_BINDING is not set
1031CONFIG_DEVKMEM=y
1032# CONFIG_SERIAL_NONSTANDARD is not set
1033# CONFIG_NOZOMI is not set
1034
1035#
1036# Serial drivers
1037#
1038CONFIG_SERIAL_8250=y
1039CONFIG_SERIAL_8250_CONSOLE=y
1040# CONFIG_SERIAL_8250_PCI is not set
1041CONFIG_SERIAL_8250_NR_UARTS=2
1042CONFIG_SERIAL_8250_RUNTIME_UARTS=2
1043# CONFIG_SERIAL_8250_EXTENDED is not set
1044
1045#
1046# Non-8250 serial port support
1047#
1048# CONFIG_SERIAL_UARTLITE is not set
1049CONFIG_SERIAL_CORE=y
1050CONFIG_SERIAL_CORE_CONSOLE=y
1051# CONFIG_SERIAL_JSM is not set
1052# CONFIG_SERIAL_OF_PLATFORM is not set
1053CONFIG_UNIX98_PTYS=y
1054# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1055# CONFIG_LEGACY_PTYS is not set
1056# CONFIG_HVC_UDBG is not set
1057# CONFIG_IPMI_HANDLER is not set
1058CONFIG_HW_RANDOM=y
1059CONFIG_NVRAM=y
1060# CONFIG_R3964 is not set
1061# CONFIG_APPLICOM is not set
1062# CONFIG_RAW_DRIVER is not set
1063# CONFIG_TCG_TPM is not set
1064CONFIG_DEVPORT=y
1065CONFIG_I2C=y
1066CONFIG_I2C_BOARDINFO=y
1067CONFIG_I2C_CHARDEV=y
1068CONFIG_I2C_HELPER_AUTO=y
1069
1070#
1071# I2C Hardware Bus support
1072#
1073
1074#
1075# PC SMBus host controller drivers
1076#
1077# CONFIG_I2C_ALI1535 is not set
1078# CONFIG_I2C_ALI1563 is not set
1079# CONFIG_I2C_ALI15X3 is not set
1080# CONFIG_I2C_AMD756 is not set
1081# CONFIG_I2C_AMD8111 is not set
1082# CONFIG_I2C_I801 is not set
1083# CONFIG_I2C_ISCH is not set
1084# CONFIG_I2C_PIIX4 is not set
1085# CONFIG_I2C_NFORCE2 is not set
1086# CONFIG_I2C_SIS5595 is not set
1087# CONFIG_I2C_SIS630 is not set
1088# CONFIG_I2C_SIS96X is not set
1089# CONFIG_I2C_VIA is not set
1090# CONFIG_I2C_VIAPRO is not set
1091
1092#
1093# I2C system bus drivers (mostly embedded / system-on-chip)
1094#
1095# CONFIG_I2C_GPIO is not set
1096CONFIG_I2C_MPC=y
1097# CONFIG_I2C_OCORES is not set
1098# CONFIG_I2C_SIMTEC is not set
1099
1100#
1101# External I2C/SMBus adapter drivers
1102#
1103# CONFIG_I2C_PARPORT_LIGHT is not set
1104# CONFIG_I2C_TAOS_EVM is not set
1105# CONFIG_I2C_TINY_USB is not set
1106
1107#
1108# Graphics adapter I2C/DDC channel drivers
1109#
1110# CONFIG_I2C_VOODOO3 is not set
1111
1112#
1113# Other I2C/SMBus bus drivers
1114#
1115# CONFIG_I2C_PCA_PLATFORM is not set
1116# CONFIG_I2C_STUB is not set
1117
1118#
1119# Miscellaneous I2C Chip support
1120#
1121CONFIG_DS1682=y
1122# CONFIG_SENSORS_PCF8574 is not set
1123# CONFIG_PCF8575 is not set
1124# CONFIG_SENSORS_PCA9539 is not set
1125# CONFIG_SENSORS_PCF8591 is not set
1126# CONFIG_SENSORS_MAX6875 is not set
1127# CONFIG_SENSORS_TSL2550 is not set
1128# CONFIG_I2C_DEBUG_CORE is not set
1129# CONFIG_I2C_DEBUG_ALGO is not set
1130# CONFIG_I2C_DEBUG_BUS is not set
1131# CONFIG_I2C_DEBUG_CHIP is not set
1132# CONFIG_SPI is not set
1133CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
1134CONFIG_ARCH_REQUIRE_GPIOLIB=y
1135CONFIG_GPIOLIB=y
1136# CONFIG_DEBUG_GPIO is not set
1137# CONFIG_GPIO_SYSFS is not set
1138
1139#
1140# Memory mapped GPIO expanders:
1141#
1142# CONFIG_GPIO_XILINX is not set
1143
1144#
1145# I2C GPIO expanders:
1146#
1147# CONFIG_GPIO_MAX732X is not set
1148# CONFIG_GPIO_PCA953X is not set
1149# CONFIG_GPIO_PCF857X is not set
1150
1151#
1152# PCI GPIO expanders:
1153#
1154# CONFIG_GPIO_BT8XX is not set
1155
1156#
1157# SPI GPIO expanders:
1158#
1159# CONFIG_W1 is not set
1160# CONFIG_POWER_SUPPLY is not set
1161CONFIG_HWMON=y
1162# CONFIG_HWMON_VID is not set
1163# CONFIG_SENSORS_AD7414 is not set
1164# CONFIG_SENSORS_AD7418 is not set
1165# CONFIG_SENSORS_ADM1021 is not set
1166# CONFIG_SENSORS_ADM1025 is not set
1167# CONFIG_SENSORS_ADM1026 is not set
1168# CONFIG_SENSORS_ADM1029 is not set
1169# CONFIG_SENSORS_ADM1031 is not set
1170# CONFIG_SENSORS_ADM9240 is not set
1171# CONFIG_SENSORS_ADT7462 is not set
1172# CONFIG_SENSORS_ADT7470 is not set
1173# CONFIG_SENSORS_ADT7473 is not set
1174# CONFIG_SENSORS_ADT7475 is not set
1175# CONFIG_SENSORS_ATXP1 is not set
1176# CONFIG_SENSORS_DS1621 is not set
1177# CONFIG_SENSORS_I5K_AMB is not set
1178# CONFIG_SENSORS_F71805F is not set
1179# CONFIG_SENSORS_F71882FG is not set
1180# CONFIG_SENSORS_F75375S is not set
1181# CONFIG_SENSORS_GL518SM is not set
1182# CONFIG_SENSORS_GL520SM is not set
1183# CONFIG_SENSORS_IT87 is not set
1184# CONFIG_SENSORS_LM63 is not set
1185# CONFIG_SENSORS_LM75 is not set
1186# CONFIG_SENSORS_LM77 is not set
1187# CONFIG_SENSORS_LM78 is not set
1188# CONFIG_SENSORS_LM80 is not set
1189# CONFIG_SENSORS_LM83 is not set
1190# CONFIG_SENSORS_LM85 is not set
1191# CONFIG_SENSORS_LM87 is not set
1192CONFIG_SENSORS_LM90=y
1193CONFIG_SENSORS_LM92=y
1194# CONFIG_SENSORS_LM93 is not set
1195# CONFIG_SENSORS_LTC4245 is not set
1196# CONFIG_SENSORS_MAX1619 is not set
1197# CONFIG_SENSORS_MAX6650 is not set
1198# CONFIG_SENSORS_PC87360 is not set
1199# CONFIG_SENSORS_PC87427 is not set
1200# CONFIG_SENSORS_SIS5595 is not set
1201# CONFIG_SENSORS_DME1737 is not set
1202# CONFIG_SENSORS_SMSC47M1 is not set
1203# CONFIG_SENSORS_SMSC47M192 is not set
1204# CONFIG_SENSORS_SMSC47B397 is not set
1205# CONFIG_SENSORS_ADS7828 is not set
1206# CONFIG_SENSORS_THMC50 is not set
1207# CONFIG_SENSORS_VIA686A is not set
1208# CONFIG_SENSORS_VT1211 is not set
1209# CONFIG_SENSORS_VT8231 is not set
1210# CONFIG_SENSORS_W83781D is not set
1211# CONFIG_SENSORS_W83791D is not set
1212# CONFIG_SENSORS_W83792D is not set
1213# CONFIG_SENSORS_W83793 is not set
1214# CONFIG_SENSORS_W83L785TS is not set
1215# CONFIG_SENSORS_W83L786NG is not set
1216# CONFIG_SENSORS_W83627HF is not set
1217# CONFIG_SENSORS_W83627EHF is not set
1218# CONFIG_HWMON_DEBUG_CHIP is not set
1219# CONFIG_THERMAL is not set
1220# CONFIG_THERMAL_HWMON is not set
1221CONFIG_WATCHDOG=y
1222# CONFIG_WATCHDOG_NOWAYOUT is not set
1223
1224#
1225# Watchdog Device Drivers
1226#
1227# CONFIG_SOFT_WATCHDOG is not set
1228# CONFIG_ALIM7101_WDT is not set
1229CONFIG_GEF_WDT=y
1230# CONFIG_8xxx_WDT is not set
1231
1232#
1233# PCI-based Watchdog Cards
1234#
1235# CONFIG_PCIPCWATCHDOG is not set
1236# CONFIG_WDTPCI is not set
1237
1238#
1239# USB-based Watchdog Cards
1240#
1241# CONFIG_USBPCWATCHDOG is not set
1242CONFIG_SSB_POSSIBLE=y
1243
1244#
1245# Sonics Silicon Backplane
1246#
1247# CONFIG_SSB is not set
1248
1249#
1250# Multifunction device drivers
1251#
1252# CONFIG_MFD_CORE is not set
1253# CONFIG_MFD_SM501 is not set
1254# CONFIG_HTC_PASIC3 is not set
1255# CONFIG_TPS65010 is not set
1256# CONFIG_TWL4030_CORE is not set
1257# CONFIG_MFD_TMIO is not set
1258# CONFIG_PMIC_DA903X is not set
1259# CONFIG_MFD_WM8400 is not set
1260# CONFIG_MFD_WM8350_I2C is not set
1261# CONFIG_MFD_PCF50633 is not set
1262# CONFIG_REGULATOR is not set
1263
1264#
1265# Multimedia devices
1266#
1267
1268#
1269# Multimedia core support
1270#
1271# CONFIG_VIDEO_DEV is not set
1272# CONFIG_DVB_CORE is not set
1273# CONFIG_VIDEO_MEDIA is not set
1274
1275#
1276# Multimedia drivers
1277#
1278CONFIG_DAB=y
1279# CONFIG_USB_DABUSB is not set
1280
1281#
1282# Graphics support
1283#
1284# CONFIG_AGP is not set
1285# CONFIG_DRM is not set
1286# CONFIG_VGASTATE is not set
1287CONFIG_VIDEO_OUTPUT_CONTROL=m
1288# CONFIG_FB is not set
1289# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1290
1291#
1292# Display device support
1293#
1294# CONFIG_DISPLAY_SUPPORT is not set
1295
1296#
1297# Console display driver support
1298#
1299CONFIG_VGA_CONSOLE=y
1300# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1301CONFIG_DUMMY_CONSOLE=y
1302# CONFIG_SOUND is not set
1303CONFIG_HID_SUPPORT=y
1304CONFIG_HID=y
1305# CONFIG_HID_DEBUG is not set
1306# CONFIG_HIDRAW is not set
1307
1308#
1309# USB Input Devices
1310#
1311CONFIG_USB_HID=y
1312# CONFIG_HID_PID is not set
1313# CONFIG_USB_HIDDEV is not set
1314
1315#
1316# Special HID drivers
1317#
1318CONFIG_HID_COMPAT=y
1319CONFIG_HID_A4TECH=y
1320CONFIG_HID_APPLE=y
1321CONFIG_HID_BELKIN=y
1322CONFIG_HID_CHERRY=y
1323CONFIG_HID_CHICONY=y
1324CONFIG_HID_CYPRESS=y
1325CONFIG_HID_EZKEY=y
1326CONFIG_HID_GYRATION=y
1327CONFIG_HID_LOGITECH=y
1328# CONFIG_LOGITECH_FF is not set
1329# CONFIG_LOGIRUMBLEPAD2_FF is not set
1330CONFIG_HID_MICROSOFT=y
1331CONFIG_HID_MONTEREY=y
1332# CONFIG_HID_NTRIG is not set
1333CONFIG_HID_PANTHERLORD=y
1334# CONFIG_PANTHERLORD_FF is not set
1335CONFIG_HID_PETALYNX=y
1336CONFIG_HID_SAMSUNG=y
1337CONFIG_HID_SONY=y
1338CONFIG_HID_SUNPLUS=y
1339# CONFIG_GREENASIA_FF is not set
1340# CONFIG_HID_TOPSEED is not set
1341CONFIG_THRUSTMASTER_FF=m
1342CONFIG_ZEROPLUS_FF=m
1343CONFIG_USB_SUPPORT=y
1344CONFIG_USB_ARCH_HAS_HCD=y
1345CONFIG_USB_ARCH_HAS_OHCI=y
1346CONFIG_USB_ARCH_HAS_EHCI=y
1347CONFIG_USB=y
1348# CONFIG_USB_DEBUG is not set
1349# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1350
1351#
1352# Miscellaneous USB options
1353#
1354# CONFIG_USB_DEVICEFS is not set
1355# CONFIG_USB_DEVICE_CLASS is not set
1356# CONFIG_USB_DYNAMIC_MINORS is not set
1357# CONFIG_USB_OTG is not set
1358# CONFIG_USB_OTG_WHITELIST is not set
1359# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1360# CONFIG_USB_MON is not set
1361# CONFIG_USB_WUSB is not set
1362# CONFIG_USB_WUSB_CBAF is not set
1363
1364#
1365# USB Host Controller Drivers
1366#
1367# CONFIG_USB_C67X00_HCD is not set
1368CONFIG_USB_EHCI_HCD=y
1369# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1370# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1371# CONFIG_USB_EHCI_FSL is not set
1372# CONFIG_USB_EHCI_HCD_PPC_OF is not set
1373# CONFIG_USB_OXU210HP_HCD is not set
1374# CONFIG_USB_ISP116X_HCD is not set
1375# CONFIG_USB_ISP1760_HCD is not set
1376CONFIG_USB_OHCI_HCD=y
1377# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1378# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1379# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1380CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1381# CONFIG_USB_UHCI_HCD is not set
1382# CONFIG_USB_SL811_HCD is not set
1383# CONFIG_USB_R8A66597_HCD is not set
1384# CONFIG_USB_WHCI_HCD is not set
1385# CONFIG_USB_HWA_HCD is not set
1386
1387#
1388# USB Device Class drivers
1389#
1390# CONFIG_USB_ACM is not set
1391# CONFIG_USB_PRINTER is not set
1392# CONFIG_USB_WDM is not set
1393# CONFIG_USB_TMC is not set
1394
1395#
1396# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1397#
1398
1399#
1400# see USB_STORAGE Help for more information
1401#
1402CONFIG_USB_STORAGE=y
1403# CONFIG_USB_STORAGE_DEBUG is not set
1404# CONFIG_USB_STORAGE_DATAFAB is not set
1405# CONFIG_USB_STORAGE_FREECOM is not set
1406# CONFIG_USB_STORAGE_ISD200 is not set
1407# CONFIG_USB_STORAGE_USBAT is not set
1408# CONFIG_USB_STORAGE_SDDR09 is not set
1409# CONFIG_USB_STORAGE_SDDR55 is not set
1410# CONFIG_USB_STORAGE_JUMPSHOT is not set
1411# CONFIG_USB_STORAGE_ALAUDA is not set
1412# CONFIG_USB_STORAGE_ONETOUCH is not set
1413# CONFIG_USB_STORAGE_KARMA is not set
1414# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1415# CONFIG_USB_LIBUSUAL is not set
1416
1417#
1418# USB Imaging devices
1419#
1420# CONFIG_USB_MDC800 is not set
1421# CONFIG_USB_MICROTEK is not set
1422
1423#
1424# USB port drivers
1425#
1426# CONFIG_USB_SERIAL is not set
1427
1428#
1429# USB Miscellaneous drivers
1430#
1431# CONFIG_USB_EMI62 is not set
1432# CONFIG_USB_EMI26 is not set
1433# CONFIG_USB_ADUTUX is not set
1434# CONFIG_USB_SEVSEG is not set
1435# CONFIG_USB_RIO500 is not set
1436# CONFIG_USB_LEGOTOWER is not set
1437# CONFIG_USB_LCD is not set
1438# CONFIG_USB_BERRY_CHARGE is not set
1439# CONFIG_USB_LED is not set
1440# CONFIG_USB_CYPRESS_CY7C63 is not set
1441# CONFIG_USB_CYTHERM is not set
1442# CONFIG_USB_PHIDGET is not set
1443# CONFIG_USB_IDMOUSE is not set
1444# CONFIG_USB_FTDI_ELAN is not set
1445# CONFIG_USB_APPLEDISPLAY is not set
1446# CONFIG_USB_SISUSBVGA is not set
1447# CONFIG_USB_LD is not set
1448# CONFIG_USB_TRANCEVIBRATOR is not set
1449# CONFIG_USB_IOWARRIOR is not set
1450# CONFIG_USB_ISIGHTFW is not set
1451# CONFIG_USB_VST is not set
1452# CONFIG_USB_ATM is not set
1453# CONFIG_USB_GADGET is not set
1454
1455#
1456# OTG and related infrastructure
1457#
1458# CONFIG_USB_GPIO_VBUS is not set
1459# CONFIG_UWB is not set
1460# CONFIG_MMC is not set
1461# CONFIG_MEMSTICK is not set
1462# CONFIG_NEW_LEDS is not set
1463# CONFIG_ACCESSIBILITY is not set
1464# CONFIG_INFINIBAND is not set
1465# CONFIG_EDAC is not set
1466CONFIG_RTC_LIB=y
1467CONFIG_RTC_CLASS=y
1468CONFIG_RTC_HCTOSYS=y
1469CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1470# CONFIG_RTC_DEBUG is not set
1471
1472#
1473# RTC interfaces
1474#
1475CONFIG_RTC_INTF_SYSFS=y
1476# CONFIG_RTC_INTF_PROC is not set
1477CONFIG_RTC_INTF_DEV=y
1478# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1479# CONFIG_RTC_DRV_TEST is not set
1480
1481#
1482# I2C RTC drivers
1483#
1484# CONFIG_RTC_DRV_DS1307 is not set
1485# CONFIG_RTC_DRV_DS1374 is not set
1486# CONFIG_RTC_DRV_DS1672 is not set
1487# CONFIG_RTC_DRV_MAX6900 is not set
1488# CONFIG_RTC_DRV_RS5C372 is not set
1489# CONFIG_RTC_DRV_ISL1208 is not set
1490# CONFIG_RTC_DRV_X1205 is not set
1491# CONFIG_RTC_DRV_PCF8563 is not set
1492# CONFIG_RTC_DRV_PCF8583 is not set
1493# CONFIG_RTC_DRV_M41T80 is not set
1494# CONFIG_RTC_DRV_S35390A is not set
1495# CONFIG_RTC_DRV_FM3130 is not set
1496CONFIG_RTC_DRV_RX8581=y
1497
1498#
1499# SPI RTC drivers
1500#
1501
1502#
1503# Platform RTC drivers
1504#
1505# CONFIG_RTC_DRV_CMOS is not set
1506# CONFIG_RTC_DRV_DS1286 is not set
1507# CONFIG_RTC_DRV_DS1511 is not set
1508# CONFIG_RTC_DRV_DS1553 is not set
1509# CONFIG_RTC_DRV_DS1742 is not set
1510# CONFIG_RTC_DRV_STK17TA8 is not set
1511# CONFIG_RTC_DRV_M48T86 is not set
1512# CONFIG_RTC_DRV_M48T35 is not set
1513# CONFIG_RTC_DRV_M48T59 is not set
1514# CONFIG_RTC_DRV_BQ4802 is not set
1515# CONFIG_RTC_DRV_V3020 is not set
1516
1517#
1518# on-CPU RTC drivers
1519#
1520# CONFIG_RTC_DRV_PPC is not set
1521# CONFIG_DMADEVICES is not set
1522# CONFIG_UIO is not set
1523# CONFIG_STAGING is not set
1524
1525#
1526# File systems
1527#
1528CONFIG_EXT2_FS=y
1529CONFIG_EXT2_FS_XATTR=y
1530CONFIG_EXT2_FS_POSIX_ACL=y
1531# CONFIG_EXT2_FS_SECURITY is not set
1532# CONFIG_EXT2_FS_XIP is not set
1533CONFIG_EXT3_FS=y
1534CONFIG_EXT3_FS_XATTR=y
1535CONFIG_EXT3_FS_POSIX_ACL=y
1536# CONFIG_EXT3_FS_SECURITY is not set
1537# CONFIG_EXT4_FS is not set
1538CONFIG_JBD=y
1539CONFIG_FS_MBCACHE=y
1540# CONFIG_REISERFS_FS is not set
1541# CONFIG_JFS_FS is not set
1542CONFIG_FS_POSIX_ACL=y
1543CONFIG_FILE_LOCKING=y
1544# CONFIG_XFS_FS is not set
1545# CONFIG_OCFS2_FS is not set
1546# CONFIG_BTRFS_FS is not set
1547CONFIG_DNOTIFY=y
1548CONFIG_INOTIFY=y
1549CONFIG_INOTIFY_USER=y
1550# CONFIG_QUOTA is not set
1551# CONFIG_AUTOFS_FS is not set
1552# CONFIG_AUTOFS4_FS is not set
1553# CONFIG_FUSE_FS is not set
1554
1555#
1556# CD-ROM/DVD Filesystems
1557#
1558# CONFIG_ISO9660_FS is not set
1559# CONFIG_UDF_FS is not set
1560
1561#
1562# DOS/FAT/NT Filesystems
1563#
1564CONFIG_FAT_FS=y
1565CONFIG_MSDOS_FS=y
1566CONFIG_VFAT_FS=y
1567CONFIG_FAT_DEFAULT_CODEPAGE=437
1568CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1569# CONFIG_NTFS_FS is not set
1570
1571#
1572# Pseudo filesystems
1573#
1574CONFIG_PROC_FS=y
1575CONFIG_PROC_KCORE=y
1576CONFIG_PROC_SYSCTL=y
1577CONFIG_PROC_PAGE_MONITOR=y
1578CONFIG_SYSFS=y
1579CONFIG_TMPFS=y
1580# CONFIG_TMPFS_POSIX_ACL is not set
1581# CONFIG_HUGETLB_PAGE is not set
1582# CONFIG_CONFIGFS_FS is not set
1583CONFIG_MISC_FILESYSTEMS=y
1584# CONFIG_ADFS_FS is not set
1585# CONFIG_AFFS_FS is not set
1586# CONFIG_HFS_FS is not set
1587# CONFIG_HFSPLUS_FS is not set
1588# CONFIG_BEFS_FS is not set
1589# CONFIG_BFS_FS is not set
1590# CONFIG_EFS_FS is not set
1591CONFIG_JFFS2_FS=y
1592CONFIG_JFFS2_FS_DEBUG=0
1593CONFIG_JFFS2_FS_WRITEBUFFER=y
1594# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1595# CONFIG_JFFS2_SUMMARY is not set
1596# CONFIG_JFFS2_FS_XATTR is not set
1597# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1598CONFIG_JFFS2_ZLIB=y
1599# CONFIG_JFFS2_LZO is not set
1600CONFIG_JFFS2_RTIME=y
1601# CONFIG_JFFS2_RUBIN is not set
1602# CONFIG_CRAMFS is not set
1603# CONFIG_SQUASHFS is not set
1604# CONFIG_VXFS_FS is not set
1605# CONFIG_MINIX_FS is not set
1606# CONFIG_OMFS_FS is not set
1607# CONFIG_HPFS_FS is not set
1608# CONFIG_QNX4FS_FS is not set
1609# CONFIG_ROMFS_FS is not set
1610# CONFIG_SYSV_FS is not set
1611# CONFIG_UFS_FS is not set
1612CONFIG_NETWORK_FILESYSTEMS=y
1613CONFIG_NFS_FS=y
1614CONFIG_NFS_V3=y
1615# CONFIG_NFS_V3_ACL is not set
1616CONFIG_NFS_V4=y
1617CONFIG_ROOT_NFS=y
1618# CONFIG_NFSD is not set
1619CONFIG_LOCKD=y
1620CONFIG_LOCKD_V4=y
1621CONFIG_NFS_COMMON=y
1622CONFIG_SUNRPC=y
1623CONFIG_SUNRPC_GSS=y
1624# CONFIG_SUNRPC_REGISTER_V4 is not set
1625CONFIG_RPCSEC_GSS_KRB5=y
1626# CONFIG_RPCSEC_GSS_SPKM3 is not set
1627# CONFIG_SMB_FS is not set
1628CONFIG_CIFS=m
1629# CONFIG_CIFS_STATS is not set
1630# CONFIG_CIFS_WEAK_PW_HASH is not set
1631CONFIG_CIFS_XATTR=y
1632CONFIG_CIFS_POSIX=y
1633# CONFIG_CIFS_DEBUG2 is not set
1634# CONFIG_CIFS_EXPERIMENTAL is not set
1635# CONFIG_NCP_FS is not set
1636# CONFIG_CODA_FS is not set
1637# CONFIG_AFS_FS is not set
1638
1639#
1640# Partition Types
1641#
1642# CONFIG_PARTITION_ADVANCED is not set
1643CONFIG_MSDOS_PARTITION=y
1644CONFIG_NLS=y
1645CONFIG_NLS_DEFAULT="iso8859-1"
1646CONFIG_NLS_CODEPAGE_437=m
1647CONFIG_NLS_CODEPAGE_737=m
1648CONFIG_NLS_CODEPAGE_775=m
1649CONFIG_NLS_CODEPAGE_850=m
1650CONFIG_NLS_CODEPAGE_852=m
1651CONFIG_NLS_CODEPAGE_855=m
1652CONFIG_NLS_CODEPAGE_857=m
1653CONFIG_NLS_CODEPAGE_860=m
1654CONFIG_NLS_CODEPAGE_861=m
1655CONFIG_NLS_CODEPAGE_862=m
1656CONFIG_NLS_CODEPAGE_863=m
1657CONFIG_NLS_CODEPAGE_864=m
1658CONFIG_NLS_CODEPAGE_865=m
1659CONFIG_NLS_CODEPAGE_866=m
1660CONFIG_NLS_CODEPAGE_869=m
1661CONFIG_NLS_CODEPAGE_936=m
1662CONFIG_NLS_CODEPAGE_950=m
1663CONFIG_NLS_CODEPAGE_932=m
1664CONFIG_NLS_CODEPAGE_949=m
1665CONFIG_NLS_CODEPAGE_874=m
1666CONFIG_NLS_ISO8859_8=m
1667CONFIG_NLS_CODEPAGE_1250=m
1668CONFIG_NLS_CODEPAGE_1251=m
1669CONFIG_NLS_ASCII=m
1670CONFIG_NLS_ISO8859_1=m
1671CONFIG_NLS_ISO8859_2=m
1672CONFIG_NLS_ISO8859_3=m
1673CONFIG_NLS_ISO8859_4=m
1674CONFIG_NLS_ISO8859_5=m
1675CONFIG_NLS_ISO8859_6=m
1676CONFIG_NLS_ISO8859_7=m
1677CONFIG_NLS_ISO8859_9=m
1678CONFIG_NLS_ISO8859_13=m
1679CONFIG_NLS_ISO8859_14=m
1680CONFIG_NLS_ISO8859_15=m
1681CONFIG_NLS_KOI8_R=m
1682CONFIG_NLS_KOI8_U=m
1683CONFIG_NLS_UTF8=m
1684# CONFIG_DLM is not set
1685
1686#
1687# Library routines
1688#
1689CONFIG_BITREVERSE=y
1690CONFIG_GENERIC_FIND_LAST_BIT=y
1691CONFIG_CRC_CCITT=m
1692# CONFIG_CRC16 is not set
1693# CONFIG_CRC_T10DIF is not set
1694# CONFIG_CRC_ITU_T is not set
1695CONFIG_CRC32=y
1696# CONFIG_CRC7 is not set
1697CONFIG_LIBCRC32C=m
1698CONFIG_ZLIB_INFLATE=y
1699CONFIG_ZLIB_DEFLATE=y
1700CONFIG_PLIST=y
1701CONFIG_HAS_IOMEM=y
1702CONFIG_HAS_IOPORT=y
1703CONFIG_HAS_DMA=y
1704CONFIG_HAVE_LMB=y
1705
1706#
1707# Kernel hacking
1708#
1709# CONFIG_PRINTK_TIME is not set
1710CONFIG_ENABLE_WARN_DEPRECATED=y
1711CONFIG_ENABLE_MUST_CHECK=y
1712CONFIG_FRAME_WARN=1024
1713CONFIG_MAGIC_SYSRQ=y
1714# CONFIG_UNUSED_SYMBOLS is not set
1715# CONFIG_DEBUG_FS is not set
1716# CONFIG_HEADERS_CHECK is not set
1717CONFIG_DEBUG_KERNEL=y
1718# CONFIG_DEBUG_SHIRQ is not set
1719CONFIG_DETECT_SOFTLOCKUP=y
1720# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1721CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1722CONFIG_SCHED_DEBUG=y
1723# CONFIG_SCHEDSTATS is not set
1724# CONFIG_TIMER_STATS is not set
1725# CONFIG_DEBUG_OBJECTS is not set
1726# CONFIG_DEBUG_SLAB is not set
1727# CONFIG_DEBUG_RT_MUTEXES is not set
1728# CONFIG_RT_MUTEX_TESTER is not set
1729# CONFIG_DEBUG_SPINLOCK is not set
1730# CONFIG_DEBUG_MUTEXES is not set
1731# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1732# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1733# CONFIG_DEBUG_KOBJECT is not set
1734# CONFIG_DEBUG_BUGVERBOSE is not set
1735CONFIG_DEBUG_INFO=y
1736# CONFIG_DEBUG_VM is not set
1737# CONFIG_DEBUG_WRITECOUNT is not set
1738# CONFIG_DEBUG_MEMORY_INIT is not set
1739# CONFIG_DEBUG_LIST is not set
1740# CONFIG_DEBUG_SG is not set
1741# CONFIG_DEBUG_NOTIFIERS is not set
1742# CONFIG_BOOT_PRINTK_DELAY is not set
1743# CONFIG_RCU_TORTURE_TEST is not set
1744# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1745# CONFIG_BACKTRACE_SELF_TEST is not set
1746# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1747# CONFIG_FAULT_INJECTION is not set
1748# CONFIG_LATENCYTOP is not set
1749CONFIG_SYSCTL_SYSCALL_CHECK=y
1750CONFIG_HAVE_FUNCTION_TRACER=y
1751CONFIG_HAVE_DYNAMIC_FTRACE=y
1752CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1753
1754#
1755# Tracers
1756#
1757# CONFIG_FUNCTION_TRACER is not set
1758# CONFIG_PREEMPT_TRACER is not set
1759# CONFIG_SCHED_TRACER is not set
1760# CONFIG_CONTEXT_SWITCH_TRACER is not set
1761# CONFIG_BOOT_TRACER is not set
1762# CONFIG_TRACE_BRANCH_PROFILING is not set
1763# CONFIG_STACK_TRACER is not set
1764# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1765# CONFIG_SAMPLES is not set
1766CONFIG_HAVE_ARCH_KGDB=y
1767# CONFIG_KGDB is not set
1768CONFIG_PRINT_STACK_DEPTH=64
1769# CONFIG_DEBUG_STACKOVERFLOW is not set
1770# CONFIG_DEBUG_STACK_USAGE is not set
1771# CONFIG_DEBUG_PAGEALLOC is not set
1772# CONFIG_CODE_PATCHING_SELFTEST is not set
1773# CONFIG_FTR_FIXUP_SELFTEST is not set
1774# CONFIG_MSI_BITMAP_SELFTEST is not set
1775# CONFIG_XMON is not set
1776# CONFIG_IRQSTACKS is not set
1777# CONFIG_BDI_SWITCH is not set
1778# CONFIG_BOOTX_TEXT is not set
1779# CONFIG_PPC_EARLY_DEBUG is not set
1780
1781#
1782# Security options
1783#
1784# CONFIG_KEYS is not set
1785CONFIG_SECURITY=y
1786# CONFIG_SECURITYFS is not set
1787CONFIG_SECURITY_NETWORK=y
1788# CONFIG_SECURITY_NETWORK_XFRM is not set
1789# CONFIG_SECURITY_PATH is not set
1790# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1791# CONFIG_SECURITY_ROOTPLUG is not set
1792CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1793CONFIG_CRYPTO=y
1794
1795#
1796# Crypto core or helper
1797#
1798# CONFIG_CRYPTO_FIPS is not set
1799CONFIG_CRYPTO_ALGAPI=y
1800CONFIG_CRYPTO_ALGAPI2=y
1801CONFIG_CRYPTO_AEAD=m
1802CONFIG_CRYPTO_AEAD2=y
1803CONFIG_CRYPTO_BLKCIPHER=y
1804CONFIG_CRYPTO_BLKCIPHER2=y
1805CONFIG_CRYPTO_HASH=y
1806CONFIG_CRYPTO_HASH2=y
1807CONFIG_CRYPTO_RNG2=y
1808CONFIG_CRYPTO_MANAGER=y
1809CONFIG_CRYPTO_MANAGER2=y
1810# CONFIG_CRYPTO_GF128MUL is not set
1811CONFIG_CRYPTO_NULL=m
1812# CONFIG_CRYPTO_CRYPTD is not set
1813CONFIG_CRYPTO_AUTHENC=m
1814CONFIG_CRYPTO_TEST=m
1815
1816#
1817# Authenticated Encryption with Associated Data
1818#
1819# CONFIG_CRYPTO_CCM is not set
1820# CONFIG_CRYPTO_GCM is not set
1821# CONFIG_CRYPTO_SEQIV is not set
1822
1823#
1824# Block modes
1825#
1826CONFIG_CRYPTO_CBC=y
1827# CONFIG_CRYPTO_CTR is not set
1828# CONFIG_CRYPTO_CTS is not set
1829CONFIG_CRYPTO_ECB=m
1830# CONFIG_CRYPTO_LRW is not set
1831CONFIG_CRYPTO_PCBC=m
1832# CONFIG_CRYPTO_XTS is not set
1833
1834#
1835# Hash modes
1836#
1837CONFIG_CRYPTO_HMAC=y
1838# CONFIG_CRYPTO_XCBC is not set
1839
1840#
1841# Digest
1842#
1843CONFIG_CRYPTO_CRC32C=m
1844CONFIG_CRYPTO_MD4=m
1845CONFIG_CRYPTO_MD5=y
1846CONFIG_CRYPTO_MICHAEL_MIC=m
1847# CONFIG_CRYPTO_RMD128 is not set
1848# CONFIG_CRYPTO_RMD160 is not set
1849# CONFIG_CRYPTO_RMD256 is not set
1850# CONFIG_CRYPTO_RMD320 is not set
1851CONFIG_CRYPTO_SHA1=m
1852CONFIG_CRYPTO_SHA256=m
1853CONFIG_CRYPTO_SHA512=m
1854# CONFIG_CRYPTO_TGR192 is not set
1855CONFIG_CRYPTO_WP512=m
1856
1857#
1858# Ciphers
1859#
1860CONFIG_CRYPTO_AES=m
1861CONFIG_CRYPTO_ANUBIS=m
1862CONFIG_CRYPTO_ARC4=m
1863CONFIG_CRYPTO_BLOWFISH=m
1864# CONFIG_CRYPTO_CAMELLIA is not set
1865CONFIG_CRYPTO_CAST5=m
1866CONFIG_CRYPTO_CAST6=m
1867CONFIG_CRYPTO_DES=y
1868# CONFIG_CRYPTO_FCRYPT is not set
1869CONFIG_CRYPTO_KHAZAD=m
1870# CONFIG_CRYPTO_SALSA20 is not set
1871# CONFIG_CRYPTO_SEED is not set
1872CONFIG_CRYPTO_SERPENT=m
1873CONFIG_CRYPTO_TEA=m
1874CONFIG_CRYPTO_TWOFISH=m
1875CONFIG_CRYPTO_TWOFISH_COMMON=m
1876
1877#
1878# Compression
1879#
1880CONFIG_CRYPTO_DEFLATE=m
1881# CONFIG_CRYPTO_LZO is not set
1882
1883#
1884# Random Number Generation
1885#
1886# CONFIG_CRYPTO_ANSI_CPRNG is not set
1887# CONFIG_CRYPTO_HW is not set
1888# CONFIG_PPC_CLOCK is not set
1889# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
new file mode 100644
index 000000000000..bd236b3d915a
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -0,0 +1,1613 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Wed Jan 28 23:05:34 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_PHYS_64BIT is not set
19CONFIG_ALTIVEC=y
20CONFIG_PPC_STD_MMU=y
21CONFIG_PPC_STD_MMU_32=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_SMP=y
24CONFIG_NR_CPUS=2
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_GENERIC_LOCKBREAK=y
41CONFIG_ARCH_HAS_ILOG2_U32=y
42CONFIG_GENERIC_HWEIGHT=y
43CONFIG_GENERIC_CALIBRATE_DELAY=y
44CONFIG_GENERIC_FIND_NEXT_BIT=y
45CONFIG_GENERIC_GPIO=y
46# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
47CONFIG_PPC=y
48CONFIG_EARLY_PRINTK=y
49CONFIG_GENERIC_NVRAM=y
50CONFIG_SCHED_OMIT_FRAME_POINTER=y
51CONFIG_ARCH_MAY_HAVE_PC_FDC=y
52CONFIG_PPC_OF=y
53CONFIG_OF=y
54CONFIG_PPC_UDBG_16550=y
55CONFIG_GENERIC_TBSYNC=y
56CONFIG_AUDIT_ARCH=y
57CONFIG_GENERIC_BUG=y
58CONFIG_DEFAULT_UIMAGE=y
59# CONFIG_PPC_DCR_NATIVE is not set
60# CONFIG_PPC_DCR_MMIO is not set
61CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
62
63#
64# General setup
65#
66CONFIG_EXPERIMENTAL=y
67CONFIG_LOCK_KERNEL=y
68CONFIG_INIT_ENV_ARG_LIMIT=32
69CONFIG_LOCALVERSION=""
70CONFIG_LOCALVERSION_AUTO=y
71CONFIG_SWAP=y
72CONFIG_SYSVIPC=y
73CONFIG_SYSVIPC_SYSCTL=y
74CONFIG_POSIX_MQUEUE=y
75CONFIG_BSD_PROCESS_ACCT=y
76CONFIG_BSD_PROCESS_ACCT_V3=y
77# CONFIG_TASKSTATS is not set
78# CONFIG_AUDIT is not set
79
80#
81# RCU Subsystem
82#
83CONFIG_CLASSIC_RCU=y
84# CONFIG_TREE_RCU is not set
85# CONFIG_PREEMPT_RCU is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
88CONFIG_IKCONFIG=y
89CONFIG_IKCONFIG_PROC=y
90CONFIG_LOG_BUF_SHIFT=14
91# CONFIG_GROUP_SCHED is not set
92# CONFIG_CGROUPS is not set
93CONFIG_SYSFS_DEPRECATED=y
94CONFIG_SYSFS_DEPRECATED_V2=y
95CONFIG_RELAY=y
96# CONFIG_NAMESPACES is not set
97CONFIG_BLK_DEV_INITRD=y
98CONFIG_INITRAMFS_SOURCE=""
99# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
100CONFIG_SYSCTL=y
101CONFIG_EMBEDDED=y
102CONFIG_SYSCTL_SYSCALL=y
103CONFIG_KALLSYMS=y
104# CONFIG_KALLSYMS_EXTRA_PASS is not set
105CONFIG_HOTPLUG=y
106CONFIG_PRINTK=y
107CONFIG_BUG=y
108CONFIG_ELF_CORE=y
109CONFIG_COMPAT_BRK=y
110CONFIG_BASE_FULL=y
111CONFIG_FUTEX=y
112CONFIG_ANON_INODES=y
113CONFIG_EPOLL=y
114CONFIG_SIGNALFD=y
115CONFIG_TIMERFD=y
116CONFIG_EVENTFD=y
117CONFIG_SHMEM=y
118CONFIG_AIO=y
119CONFIG_VM_EVENT_COUNTERS=y
120CONFIG_PCI_QUIRKS=y
121CONFIG_SLAB=y
122# CONFIG_SLUB is not set
123# CONFIG_SLOB is not set
124# CONFIG_PROFILING is not set
125CONFIG_HAVE_OPROFILE=y
126# CONFIG_KPROBES is not set
127CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
128CONFIG_HAVE_IOREMAP_PROT=y
129CONFIG_HAVE_KPROBES=y
130CONFIG_HAVE_KRETPROBES=y
131CONFIG_HAVE_ARCH_TRACEHOOK=y
132CONFIG_USE_GENERIC_SMP_HELPERS=y
133# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
134CONFIG_SLABINFO=y
135CONFIG_RT_MUTEXES=y
136CONFIG_BASE_SMALL=0
137CONFIG_MODULES=y
138# CONFIG_MODULE_FORCE_LOAD is not set
139CONFIG_MODULE_UNLOAD=y
140# CONFIG_MODULE_FORCE_UNLOAD is not set
141# CONFIG_MODVERSIONS is not set
142# CONFIG_MODULE_SRCVERSION_ALL is not set
143CONFIG_STOP_MACHINE=y
144CONFIG_BLOCK=y
145# CONFIG_LBD is not set
146# CONFIG_BLK_DEV_IO_TRACE is not set
147# CONFIG_BLK_DEV_BSG is not set
148# CONFIG_BLK_DEV_INTEGRITY is not set
149
150#
151# IO Schedulers
152#
153CONFIG_IOSCHED_NOOP=y
154CONFIG_IOSCHED_AS=y
155CONFIG_IOSCHED_DEADLINE=y
156CONFIG_IOSCHED_CFQ=y
157# CONFIG_DEFAULT_AS is not set
158# CONFIG_DEFAULT_DEADLINE is not set
159CONFIG_DEFAULT_CFQ=y
160# CONFIG_DEFAULT_NOOP is not set
161CONFIG_DEFAULT_IOSCHED="cfq"
162# CONFIG_FREEZER is not set
163CONFIG_PPC_MSI_BITMAP=y
164
165#
166# Platform support
167#
168CONFIG_PPC_MULTIPLATFORM=y
169CONFIG_CLASSIC32=y
170# CONFIG_PPC_CHRP is not set
171# CONFIG_MPC5121_ADS is not set
172# CONFIG_MPC5121_GENERIC is not set
173# CONFIG_PPC_MPC52xx is not set
174# CONFIG_PPC_PMAC is not set
175# CONFIG_PPC_CELL is not set
176# CONFIG_PPC_CELL_NATIVE is not set
177# CONFIG_PPC_82xx is not set
178# CONFIG_PQ2ADS is not set
179# CONFIG_PPC_83xx is not set
180CONFIG_PPC_86xx=y
181# CONFIG_MPC8641_HPCN is not set
182# CONFIG_SBC8641D is not set
183# CONFIG_MPC8610_HPCD is not set
184CONFIG_GEF_SBC310=y
185# CONFIG_GEF_SBC610 is not set
186CONFIG_MPC8641=y
187# CONFIG_IPIC is not set
188CONFIG_MPIC=y
189# CONFIG_MPIC_WEIRD is not set
190# CONFIG_PPC_I8259 is not set
191# CONFIG_PPC_RTAS is not set
192# CONFIG_MMIO_NVRAM is not set
193# CONFIG_PPC_MPC106 is not set
194# CONFIG_PPC_970_NAP is not set
195# CONFIG_PPC_INDIRECT_IO is not set
196# CONFIG_GENERIC_IOMAP is not set
197# CONFIG_CPU_FREQ is not set
198# CONFIG_TAU is not set
199# CONFIG_QUICC_ENGINE is not set
200# CONFIG_FSL_ULI1575 is not set
201# CONFIG_MPC8xxx_GPIO is not set
202# CONFIG_SIMPLE_GPIO is not set
203
204#
205# Kernel options
206#
207# CONFIG_HIGHMEM is not set
208CONFIG_TICK_ONESHOT=y
209# CONFIG_NO_HZ is not set
210CONFIG_HIGH_RES_TIMERS=y
211CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
212# CONFIG_HZ_100 is not set
213# CONFIG_HZ_250 is not set
214# CONFIG_HZ_300 is not set
215CONFIG_HZ_1000=y
216CONFIG_HZ=1000
217CONFIG_SCHED_HRTICK=y
218# CONFIG_PREEMPT_NONE is not set
219# CONFIG_PREEMPT_VOLUNTARY is not set
220CONFIG_PREEMPT=y
221CONFIG_BINFMT_ELF=y
222# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
223# CONFIG_HAVE_AOUT is not set
224CONFIG_BINFMT_MISC=y
225# CONFIG_IOMMU_HELPER is not set
226CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
227CONFIG_ARCH_HAS_WALK_MEMORY=y
228CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
229# CONFIG_KEXEC is not set
230# CONFIG_CRASH_DUMP is not set
231CONFIG_IRQ_ALL_CPUS=y
232CONFIG_ARCH_FLATMEM_ENABLE=y
233CONFIG_ARCH_POPULATES_NODE_MAP=y
234CONFIG_SELECT_MEMORY_MODEL=y
235CONFIG_FLATMEM_MANUAL=y
236# CONFIG_DISCONTIGMEM_MANUAL is not set
237# CONFIG_SPARSEMEM_MANUAL is not set
238CONFIG_FLATMEM=y
239CONFIG_FLAT_NODE_MEM_MAP=y
240CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4
242CONFIG_MIGRATION=y
243# CONFIG_PHYS_ADDR_T_64BIT is not set
244CONFIG_ZONE_DMA_FLAG=1
245CONFIG_BOUNCE=y
246CONFIG_VIRT_TO_BUS=y
247CONFIG_UNEVICTABLE_LRU=y
248CONFIG_PPC_4K_PAGES=y
249# CONFIG_PPC_16K_PAGES is not set
250# CONFIG_PPC_64K_PAGES is not set
251CONFIG_FORCE_MAX_ZONEORDER=11
252# CONFIG_PROC_DEVICETREE is not set
253# CONFIG_CMDLINE_BOOL is not set
254CONFIG_EXTRA_TARGETS=""
255# CONFIG_PM is not set
256CONFIG_SECCOMP=y
257CONFIG_ISA_DMA_API=y
258
259#
260# Bus options
261#
262CONFIG_ZONE_DMA=y
263CONFIG_GENERIC_ISA_DMA=y
264CONFIG_PPC_INDIRECT_PCI=y
265CONFIG_FSL_SOC=y
266CONFIG_FSL_PCI=y
267CONFIG_PPC_PCI_CHOICE=y
268CONFIG_PCI=y
269CONFIG_PCI_DOMAINS=y
270CONFIG_PCI_SYSCALL=y
271CONFIG_PCIEPORTBUS=y
272CONFIG_PCIEAER=y
273# CONFIG_PCIEASPM is not set
274CONFIG_ARCH_SUPPORTS_MSI=y
275CONFIG_PCI_MSI=y
276# CONFIG_PCI_LEGACY is not set
277# CONFIG_PCI_STUB is not set
278# CONFIG_PCCARD is not set
279# CONFIG_HOTPLUG_PCI is not set
280# CONFIG_HAS_RAPIDIO is not set
281
282#
283# Advanced setup
284#
285# CONFIG_ADVANCED_OPTIONS is not set
286
287#
288# Default settings for advanced configuration options are used
289#
290CONFIG_LOWMEM_SIZE=0x30000000
291CONFIG_LOWMEM_CAM_NUM=3
292CONFIG_PAGE_OFFSET=0xc0000000
293CONFIG_KERNEL_START=0xc0000000
294CONFIG_PHYSICAL_START=0x00000000
295CONFIG_TASK_SIZE=0xc0000000
296CONFIG_NET=y
297
298#
299# Networking options
300#
301CONFIG_COMPAT_NET_DEV_OPS=y
302CONFIG_PACKET=y
303CONFIG_PACKET_MMAP=y
304CONFIG_UNIX=y
305CONFIG_XFRM=y
306CONFIG_XFRM_USER=m
307# CONFIG_XFRM_SUB_POLICY is not set
308# CONFIG_XFRM_MIGRATE is not set
309# CONFIG_XFRM_STATISTICS is not set
310CONFIG_XFRM_IPCOMP=m
311CONFIG_NET_KEY=m
312# CONFIG_NET_KEY_MIGRATE is not set
313CONFIG_INET=y
314CONFIG_IP_MULTICAST=y
315CONFIG_IP_ADVANCED_ROUTER=y
316CONFIG_ASK_IP_FIB_HASH=y
317# CONFIG_IP_FIB_TRIE is not set
318CONFIG_IP_FIB_HASH=y
319CONFIG_IP_MULTIPLE_TABLES=y
320CONFIG_IP_ROUTE_MULTIPATH=y
321CONFIG_IP_ROUTE_VERBOSE=y
322CONFIG_IP_PNP=y
323CONFIG_IP_PNP_DHCP=y
324CONFIG_IP_PNP_BOOTP=y
325CONFIG_IP_PNP_RARP=y
326CONFIG_NET_IPIP=m
327CONFIG_NET_IPGRE=m
328CONFIG_NET_IPGRE_BROADCAST=y
329CONFIG_IP_MROUTE=y
330CONFIG_IP_PIMSM_V1=y
331CONFIG_IP_PIMSM_V2=y
332# CONFIG_ARPD is not set
333CONFIG_SYN_COOKIES=y
334CONFIG_INET_AH=m
335CONFIG_INET_ESP=m
336CONFIG_INET_IPCOMP=m
337CONFIG_INET_XFRM_TUNNEL=m
338CONFIG_INET_TUNNEL=m
339CONFIG_INET_XFRM_MODE_TRANSPORT=y
340CONFIG_INET_XFRM_MODE_TUNNEL=y
341# CONFIG_INET_XFRM_MODE_BEET is not set
342CONFIG_INET_LRO=y
343CONFIG_INET_DIAG=y
344CONFIG_INET_TCP_DIAG=y
345# CONFIG_TCP_CONG_ADVANCED is not set
346CONFIG_TCP_CONG_CUBIC=y
347CONFIG_DEFAULT_TCP_CONG="cubic"
348# CONFIG_TCP_MD5SIG is not set
349CONFIG_IPV6=m
350# CONFIG_IPV6_PRIVACY is not set
351# CONFIG_IPV6_ROUTER_PREF is not set
352# CONFIG_IPV6_OPTIMISTIC_DAD is not set
353CONFIG_INET6_AH=m
354CONFIG_INET6_ESP=m
355CONFIG_INET6_IPCOMP=m
356# CONFIG_IPV6_MIP6 is not set
357CONFIG_INET6_XFRM_TUNNEL=m
358CONFIG_INET6_TUNNEL=m
359CONFIG_INET6_XFRM_MODE_TRANSPORT=m
360CONFIG_INET6_XFRM_MODE_TUNNEL=m
361CONFIG_INET6_XFRM_MODE_BEET=m
362# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
363CONFIG_IPV6_SIT=m
364CONFIG_IPV6_NDISC_NODETYPE=y
365CONFIG_IPV6_TUNNEL=m
366# CONFIG_IPV6_MULTIPLE_TABLES is not set
367# CONFIG_IPV6_MROUTE is not set
368# CONFIG_NETWORK_SECMARK is not set
369# CONFIG_NETFILTER is not set
370# CONFIG_IP_DCCP is not set
371# CONFIG_IP_SCTP is not set
372# CONFIG_TIPC is not set
373# CONFIG_ATM is not set
374# CONFIG_BRIDGE is not set
375# CONFIG_NET_DSA is not set
376# CONFIG_VLAN_8021Q is not set
377# CONFIG_DECNET is not set
378# CONFIG_LLC2 is not set
379# CONFIG_IPX is not set
380# CONFIG_ATALK is not set
381# CONFIG_X25 is not set
382# CONFIG_LAPB is not set
383# CONFIG_ECONET is not set
384# CONFIG_WAN_ROUTER is not set
385# CONFIG_NET_SCHED is not set
386# CONFIG_DCB is not set
387
388#
389# Network testing
390#
391CONFIG_NET_PKTGEN=m
392# CONFIG_HAMRADIO is not set
393# CONFIG_CAN is not set
394# CONFIG_IRDA is not set
395# CONFIG_BT is not set
396# CONFIG_AF_RXRPC is not set
397# CONFIG_PHONET is not set
398CONFIG_FIB_RULES=y
399# CONFIG_WIRELESS is not set
400# CONFIG_WIMAX is not set
401# CONFIG_RFKILL is not set
402# CONFIG_NET_9P is not set
403
404#
405# Device Drivers
406#
407
408#
409# Generic Driver Options
410#
411CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
412CONFIG_STANDALONE=y
413CONFIG_PREVENT_FIRMWARE_BUILD=y
414# CONFIG_FW_LOADER is not set
415# CONFIG_SYS_HYPERVISOR is not set
416# CONFIG_CONNECTOR is not set
417CONFIG_MTD=y
418# CONFIG_MTD_DEBUG is not set
419CONFIG_MTD_CONCAT=y
420CONFIG_MTD_PARTITIONS=y
421# CONFIG_MTD_TESTS is not set
422# CONFIG_MTD_REDBOOT_PARTS is not set
423# CONFIG_MTD_CMDLINE_PARTS is not set
424CONFIG_MTD_OF_PARTS=y
425# CONFIG_MTD_AR7_PARTS is not set
426
427#
428# User Modules And Translation Layers
429#
430CONFIG_MTD_CHAR=y
431CONFIG_MTD_BLKDEVS=y
432CONFIG_MTD_BLOCK=y
433# CONFIG_FTL is not set
434# CONFIG_NFTL is not set
435# CONFIG_INFTL is not set
436# CONFIG_RFD_FTL is not set
437# CONFIG_SSFDC is not set
438# CONFIG_MTD_OOPS is not set
439
440#
441# RAM/ROM/Flash chip drivers
442#
443CONFIG_MTD_CFI=y
444CONFIG_MTD_JEDECPROBE=y
445CONFIG_MTD_GEN_PROBE=y
446# CONFIG_MTD_CFI_ADV_OPTIONS is not set
447CONFIG_MTD_MAP_BANK_WIDTH_1=y
448CONFIG_MTD_MAP_BANK_WIDTH_2=y
449CONFIG_MTD_MAP_BANK_WIDTH_4=y
450# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
451# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
452# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
453CONFIG_MTD_CFI_I1=y
454CONFIG_MTD_CFI_I2=y
455# CONFIG_MTD_CFI_I4 is not set
456# CONFIG_MTD_CFI_I8 is not set
457CONFIG_MTD_CFI_INTELEXT=y
458CONFIG_MTD_CFI_AMDSTD=y
459# CONFIG_MTD_CFI_STAA is not set
460CONFIG_MTD_CFI_UTIL=y
461# CONFIG_MTD_RAM is not set
462# CONFIG_MTD_ROM is not set
463# CONFIG_MTD_ABSENT is not set
464
465#
466# Mapping drivers for chip access
467#
468# CONFIG_MTD_COMPLEX_MAPPINGS is not set
469# CONFIG_MTD_PHYSMAP is not set
470CONFIG_MTD_PHYSMAP_OF=y
471# CONFIG_MTD_INTEL_VR_NOR is not set
472# CONFIG_MTD_PLATRAM is not set
473
474#
475# Self-contained MTD device drivers
476#
477# CONFIG_MTD_PMC551 is not set
478# CONFIG_MTD_SLRAM is not set
479# CONFIG_MTD_PHRAM is not set
480# CONFIG_MTD_MTDRAM is not set
481# CONFIG_MTD_BLOCK2MTD is not set
482
483#
484# Disk-On-Chip Device Drivers
485#
486# CONFIG_MTD_DOC2000 is not set
487# CONFIG_MTD_DOC2001 is not set
488# CONFIG_MTD_DOC2001PLUS is not set
489# CONFIG_MTD_NAND is not set
490# CONFIG_MTD_ONENAND is not set
491
492#
493# LPDDR flash memory drivers
494#
495# CONFIG_MTD_LPDDR is not set
496# CONFIG_MTD_QINFO_PROBE is not set
497
498#
499# UBI - Unsorted block images
500#
501# CONFIG_MTD_UBI is not set
502CONFIG_OF_DEVICE=y
503CONFIG_OF_GPIO=y
504CONFIG_OF_I2C=y
505# CONFIG_PARPORT is not set
506CONFIG_BLK_DEV=y
507# CONFIG_BLK_DEV_FD is not set
508# CONFIG_BLK_CPQ_DA is not set
509# CONFIG_BLK_CPQ_CISS_DA is not set
510# CONFIG_BLK_DEV_DAC960 is not set
511# CONFIG_BLK_DEV_UMEM is not set
512# CONFIG_BLK_DEV_COW_COMMON is not set
513CONFIG_BLK_DEV_LOOP=m
514CONFIG_BLK_DEV_CRYPTOLOOP=m
515CONFIG_BLK_DEV_NBD=m
516# CONFIG_BLK_DEV_SX8 is not set
517# CONFIG_BLK_DEV_UB is not set
518CONFIG_BLK_DEV_RAM=y
519CONFIG_BLK_DEV_RAM_COUNT=16
520CONFIG_BLK_DEV_RAM_SIZE=131072
521# CONFIG_BLK_DEV_XIP is not set
522# CONFIG_CDROM_PKTCDVD is not set
523# CONFIG_ATA_OVER_ETH is not set
524# CONFIG_BLK_DEV_HD is not set
525CONFIG_MISC_DEVICES=y
526# CONFIG_PHANTOM is not set
527# CONFIG_SGI_IOC4 is not set
528# CONFIG_TIFM_CORE is not set
529# CONFIG_ICS932S401 is not set
530# CONFIG_ENCLOSURE_SERVICES is not set
531# CONFIG_HP_ILO is not set
532# CONFIG_C2PORT is not set
533
534#
535# EEPROM support
536#
537# CONFIG_EEPROM_AT24 is not set
538# CONFIG_EEPROM_LEGACY is not set
539# CONFIG_EEPROM_93CX6 is not set
540CONFIG_HAVE_IDE=y
541# CONFIG_IDE is not set
542
543#
544# SCSI device support
545#
546# CONFIG_RAID_ATTRS is not set
547CONFIG_SCSI=y
548CONFIG_SCSI_DMA=y
549# CONFIG_SCSI_TGT is not set
550# CONFIG_SCSI_NETLINK is not set
551CONFIG_SCSI_PROC_FS=y
552
553#
554# SCSI support type (disk, tape, CD-ROM)
555#
556CONFIG_BLK_DEV_SD=y
557CONFIG_CHR_DEV_ST=y
558# CONFIG_CHR_DEV_OSST is not set
559CONFIG_BLK_DEV_SR=y
560# CONFIG_BLK_DEV_SR_VENDOR is not set
561# CONFIG_CHR_DEV_SG is not set
562# CONFIG_CHR_DEV_SCH is not set
563
564#
565# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
566#
567# CONFIG_SCSI_MULTI_LUN is not set
568# CONFIG_SCSI_CONSTANTS is not set
569# CONFIG_SCSI_LOGGING is not set
570# CONFIG_SCSI_SCAN_ASYNC is not set
571CONFIG_SCSI_WAIT_SCAN=m
572
573#
574# SCSI Transports
575#
576# CONFIG_SCSI_SPI_ATTRS is not set
577# CONFIG_SCSI_FC_ATTRS is not set
578# CONFIG_SCSI_ISCSI_ATTRS is not set
579# CONFIG_SCSI_SAS_LIBSAS is not set
580# CONFIG_SCSI_SRP_ATTRS is not set
581CONFIG_SCSI_LOWLEVEL=y
582# CONFIG_ISCSI_TCP is not set
583# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
584# CONFIG_SCSI_3W_9XXX is not set
585# CONFIG_SCSI_ACARD is not set
586# CONFIG_SCSI_AACRAID is not set
587# CONFIG_SCSI_AIC7XXX is not set
588# CONFIG_SCSI_AIC7XXX_OLD is not set
589# CONFIG_SCSI_AIC79XX is not set
590# CONFIG_SCSI_AIC94XX is not set
591# CONFIG_SCSI_DPT_I2O is not set
592# CONFIG_SCSI_ADVANSYS is not set
593# CONFIG_SCSI_ARCMSR is not set
594# CONFIG_MEGARAID_NEWGEN is not set
595# CONFIG_MEGARAID_LEGACY is not set
596# CONFIG_MEGARAID_SAS is not set
597# CONFIG_SCSI_HPTIOP is not set
598# CONFIG_SCSI_BUSLOGIC is not set
599# CONFIG_LIBFC is not set
600# CONFIG_FCOE is not set
601# CONFIG_SCSI_DMX3191D is not set
602# CONFIG_SCSI_EATA is not set
603# CONFIG_SCSI_FUTURE_DOMAIN is not set
604# CONFIG_SCSI_GDTH is not set
605# CONFIG_SCSI_IPS is not set
606# CONFIG_SCSI_INITIO is not set
607# CONFIG_SCSI_INIA100 is not set
608# CONFIG_SCSI_MVSAS is not set
609# CONFIG_SCSI_STEX is not set
610# CONFIG_SCSI_SYM53C8XX_2 is not set
611# CONFIG_SCSI_IPR is not set
612# CONFIG_SCSI_QLOGIC_1280 is not set
613# CONFIG_SCSI_QLA_FC is not set
614# CONFIG_SCSI_QLA_ISCSI is not set
615# CONFIG_SCSI_LPFC is not set
616# CONFIG_SCSI_DC395x is not set
617# CONFIG_SCSI_DC390T is not set
618# CONFIG_SCSI_NSP32 is not set
619# CONFIG_SCSI_DEBUG is not set
620# CONFIG_SCSI_SRP is not set
621# CONFIG_SCSI_DH is not set
622CONFIG_ATA=y
623# CONFIG_ATA_NONSTANDARD is not set
624CONFIG_SATA_PMP=y
625# CONFIG_SATA_AHCI is not set
626CONFIG_SATA_SIL24=y
627# CONFIG_SATA_FSL is not set
628# CONFIG_ATA_SFF is not set
629# CONFIG_MD is not set
630# CONFIG_FUSION is not set
631
632#
633# IEEE 1394 (FireWire) support
634#
635
636#
637# Enable only one of the two stacks, unless you know what you are doing
638#
639# CONFIG_FIREWIRE is not set
640# CONFIG_IEEE1394 is not set
641# CONFIG_I2O is not set
642# CONFIG_MACINTOSH_DRIVERS is not set
643CONFIG_NETDEVICES=y
644CONFIG_DUMMY=m
645CONFIG_BONDING=m
646# CONFIG_MACVLAN is not set
647# CONFIG_EQUALIZER is not set
648CONFIG_TUN=m
649# CONFIG_VETH is not set
650# CONFIG_ARCNET is not set
651CONFIG_PHYLIB=y
652
653#
654# MII PHY device drivers
655#
656# CONFIG_MARVELL_PHY is not set
657# CONFIG_DAVICOM_PHY is not set
658# CONFIG_QSEMI_PHY is not set
659# CONFIG_LXT_PHY is not set
660# CONFIG_CICADA_PHY is not set
661# CONFIG_VITESSE_PHY is not set
662# CONFIG_SMSC_PHY is not set
663# CONFIG_BROADCOM_PHY is not set
664# CONFIG_ICPLUS_PHY is not set
665# CONFIG_REALTEK_PHY is not set
666# CONFIG_NATIONAL_PHY is not set
667# CONFIG_STE10XP is not set
668# CONFIG_LSI_ET1011C_PHY is not set
669# CONFIG_FIXED_PHY is not set
670# CONFIG_MDIO_BITBANG is not set
671CONFIG_NET_ETHERNET=y
672CONFIG_MII=y
673# CONFIG_HAPPYMEAL is not set
674# CONFIG_SUNGEM is not set
675# CONFIG_CASSINI is not set
676# CONFIG_NET_VENDOR_3COM is not set
677# CONFIG_NET_TULIP is not set
678# CONFIG_HP100 is not set
679# CONFIG_IBM_NEW_EMAC_ZMII is not set
680# CONFIG_IBM_NEW_EMAC_RGMII is not set
681# CONFIG_IBM_NEW_EMAC_TAH is not set
682# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
683# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
684# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
685# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
686# CONFIG_NET_PCI is not set
687# CONFIG_B44 is not set
688# CONFIG_ATL2 is not set
689CONFIG_NETDEV_1000=y
690# CONFIG_ACENIC is not set
691# CONFIG_DL2K is not set
692# CONFIG_E1000 is not set
693# CONFIG_E1000E is not set
694# CONFIG_IP1000 is not set
695# CONFIG_IGB is not set
696# CONFIG_NS83820 is not set
697# CONFIG_HAMACHI is not set
698# CONFIG_YELLOWFIN is not set
699# CONFIG_R8169 is not set
700# CONFIG_SIS190 is not set
701# CONFIG_SKGE is not set
702# CONFIG_SKY2 is not set
703# CONFIG_VIA_VELOCITY is not set
704# CONFIG_TIGON3 is not set
705# CONFIG_BNX2 is not set
706CONFIG_GIANFAR=y
707# CONFIG_MV643XX_ETH is not set
708# CONFIG_QLA3XXX is not set
709# CONFIG_ATL1 is not set
710# CONFIG_ATL1E is not set
711# CONFIG_JME is not set
712# CONFIG_NETDEV_10000 is not set
713# CONFIG_TR is not set
714
715#
716# Wireless LAN
717#
718# CONFIG_WLAN_PRE80211 is not set
719# CONFIG_WLAN_80211 is not set
720# CONFIG_IWLWIFI_LEDS is not set
721
722#
723# Enable WiMAX (Networking options) to see the WiMAX drivers
724#
725
726#
727# USB Network Adapters
728#
729# CONFIG_USB_CATC is not set
730# CONFIG_USB_KAWETH is not set
731# CONFIG_USB_PEGASUS is not set
732# CONFIG_USB_RTL8150 is not set
733# CONFIG_USB_USBNET is not set
734# CONFIG_WAN is not set
735# CONFIG_FDDI is not set
736# CONFIG_HIPPI is not set
737CONFIG_PPP=m
738CONFIG_PPP_MULTILINK=y
739CONFIG_PPP_FILTER=y
740CONFIG_PPP_ASYNC=m
741CONFIG_PPP_SYNC_TTY=m
742CONFIG_PPP_DEFLATE=m
743CONFIG_PPP_BSDCOMP=m
744# CONFIG_PPP_MPPE is not set
745CONFIG_PPPOE=m
746# CONFIG_PPPOL2TP is not set
747CONFIG_SLIP=m
748CONFIG_SLIP_COMPRESSED=y
749CONFIG_SLHC=m
750CONFIG_SLIP_SMART=y
751CONFIG_SLIP_MODE_SLIP6=y
752# CONFIG_NET_FC is not set
753CONFIG_NETCONSOLE=y
754# CONFIG_NETCONSOLE_DYNAMIC is not set
755CONFIG_NETPOLL=y
756CONFIG_NETPOLL_TRAP=y
757CONFIG_NET_POLL_CONTROLLER=y
758# CONFIG_ISDN is not set
759# CONFIG_PHONE is not set
760
761#
762# Input device support
763#
764CONFIG_INPUT=y
765# CONFIG_INPUT_FF_MEMLESS is not set
766# CONFIG_INPUT_POLLDEV is not set
767
768#
769# Userland interfaces
770#
771CONFIG_INPUT_MOUSEDEV=y
772CONFIG_INPUT_MOUSEDEV_PSAUX=y
773CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
774CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
775# CONFIG_INPUT_JOYDEV is not set
776# CONFIG_INPUT_EVDEV is not set
777# CONFIG_INPUT_EVBUG is not set
778
779#
780# Input Device Drivers
781#
782# CONFIG_INPUT_KEYBOARD is not set
783# CONFIG_INPUT_MOUSE is not set
784# CONFIG_INPUT_JOYSTICK is not set
785# CONFIG_INPUT_TABLET is not set
786# CONFIG_INPUT_TOUCHSCREEN is not set
787# CONFIG_INPUT_MISC is not set
788
789#
790# Hardware I/O ports
791#
792# CONFIG_SERIO is not set
793# CONFIG_GAMEPORT is not set
794
795#
796# Character devices
797#
798CONFIG_VT=y
799CONFIG_CONSOLE_TRANSLATIONS=y
800CONFIG_VT_CONSOLE=y
801CONFIG_HW_CONSOLE=y
802# CONFIG_VT_HW_CONSOLE_BINDING is not set
803CONFIG_DEVKMEM=y
804# CONFIG_SERIAL_NONSTANDARD is not set
805# CONFIG_NOZOMI is not set
806
807#
808# Serial drivers
809#
810CONFIG_SERIAL_8250=y
811CONFIG_SERIAL_8250_CONSOLE=y
812# CONFIG_SERIAL_8250_PCI is not set
813CONFIG_SERIAL_8250_NR_UARTS=2
814CONFIG_SERIAL_8250_RUNTIME_UARTS=2
815# CONFIG_SERIAL_8250_EXTENDED is not set
816
817#
818# Non-8250 serial port support
819#
820# CONFIG_SERIAL_UARTLITE is not set
821CONFIG_SERIAL_CORE=y
822CONFIG_SERIAL_CORE_CONSOLE=y
823# CONFIG_SERIAL_JSM is not set
824# CONFIG_SERIAL_OF_PLATFORM is not set
825CONFIG_UNIX98_PTYS=y
826# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
827# CONFIG_LEGACY_PTYS is not set
828# CONFIG_HVC_UDBG is not set
829# CONFIG_IPMI_HANDLER is not set
830CONFIG_HW_RANDOM=y
831CONFIG_NVRAM=y
832# CONFIG_R3964 is not set
833# CONFIG_APPLICOM is not set
834# CONFIG_RAW_DRIVER is not set
835# CONFIG_TCG_TPM is not set
836CONFIG_DEVPORT=y
837CONFIG_I2C=y
838CONFIG_I2C_BOARDINFO=y
839CONFIG_I2C_CHARDEV=y
840CONFIG_I2C_HELPER_AUTO=y
841
842#
843# I2C Hardware Bus support
844#
845
846#
847# PC SMBus host controller drivers
848#
849# CONFIG_I2C_ALI1535 is not set
850# CONFIG_I2C_ALI1563 is not set
851# CONFIG_I2C_ALI15X3 is not set
852# CONFIG_I2C_AMD756 is not set
853# CONFIG_I2C_AMD8111 is not set
854# CONFIG_I2C_I801 is not set
855# CONFIG_I2C_ISCH is not set
856# CONFIG_I2C_PIIX4 is not set
857# CONFIG_I2C_NFORCE2 is not set
858# CONFIG_I2C_SIS5595 is not set
859# CONFIG_I2C_SIS630 is not set
860# CONFIG_I2C_SIS96X is not set
861# CONFIG_I2C_VIA is not set
862# CONFIG_I2C_VIAPRO is not set
863
864#
865# I2C system bus drivers (mostly embedded / system-on-chip)
866#
867# CONFIG_I2C_GPIO is not set
868CONFIG_I2C_MPC=y
869# CONFIG_I2C_OCORES is not set
870# CONFIG_I2C_SIMTEC is not set
871
872#
873# External I2C/SMBus adapter drivers
874#
875# CONFIG_I2C_PARPORT_LIGHT is not set
876# CONFIG_I2C_TAOS_EVM is not set
877# CONFIG_I2C_TINY_USB is not set
878
879#
880# Graphics adapter I2C/DDC channel drivers
881#
882# CONFIG_I2C_VOODOO3 is not set
883
884#
885# Other I2C/SMBus bus drivers
886#
887# CONFIG_I2C_PCA_PLATFORM is not set
888# CONFIG_I2C_STUB is not set
889
890#
891# Miscellaneous I2C Chip support
892#
893CONFIG_DS1682=y
894# CONFIG_SENSORS_PCF8574 is not set
895# CONFIG_PCF8575 is not set
896# CONFIG_SENSORS_PCA9539 is not set
897# CONFIG_SENSORS_PCF8591 is not set
898# CONFIG_SENSORS_MAX6875 is not set
899# CONFIG_SENSORS_TSL2550 is not set
900# CONFIG_I2C_DEBUG_CORE is not set
901# CONFIG_I2C_DEBUG_ALGO is not set
902# CONFIG_I2C_DEBUG_BUS is not set
903# CONFIG_I2C_DEBUG_CHIP is not set
904# CONFIG_SPI is not set
905CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
906CONFIG_ARCH_REQUIRE_GPIOLIB=y
907CONFIG_GPIOLIB=y
908CONFIG_GPIO_SYSFS=y
909
910#
911# Memory mapped GPIO expanders:
912#
913# CONFIG_GPIO_XILINX is not set
914
915#
916# I2C GPIO expanders:
917#
918# CONFIG_GPIO_MAX732X is not set
919# CONFIG_GPIO_PCA953X is not set
920# CONFIG_GPIO_PCF857X is not set
921
922#
923# PCI GPIO expanders:
924#
925# CONFIG_GPIO_BT8XX is not set
926
927#
928# SPI GPIO expanders:
929#
930# CONFIG_W1 is not set
931# CONFIG_POWER_SUPPLY is not set
932CONFIG_HWMON=y
933# CONFIG_HWMON_VID is not set
934# CONFIG_SENSORS_AD7414 is not set
935# CONFIG_SENSORS_AD7418 is not set
936# CONFIG_SENSORS_ADM1021 is not set
937# CONFIG_SENSORS_ADM1025 is not set
938# CONFIG_SENSORS_ADM1026 is not set
939# CONFIG_SENSORS_ADM1029 is not set
940# CONFIG_SENSORS_ADM1031 is not set
941# CONFIG_SENSORS_ADM9240 is not set
942# CONFIG_SENSORS_ADT7462 is not set
943# CONFIG_SENSORS_ADT7470 is not set
944# CONFIG_SENSORS_ADT7473 is not set
945# CONFIG_SENSORS_ADT7475 is not set
946# CONFIG_SENSORS_ATXP1 is not set
947# CONFIG_SENSORS_DS1621 is not set
948# CONFIG_SENSORS_I5K_AMB is not set
949# CONFIG_SENSORS_F71805F is not set
950# CONFIG_SENSORS_F71882FG is not set
951# CONFIG_SENSORS_F75375S is not set
952# CONFIG_SENSORS_GL518SM is not set
953# CONFIG_SENSORS_GL520SM is not set
954# CONFIG_SENSORS_IT87 is not set
955# CONFIG_SENSORS_LM63 is not set
956# CONFIG_SENSORS_LM75 is not set
957# CONFIG_SENSORS_LM77 is not set
958# CONFIG_SENSORS_LM78 is not set
959# CONFIG_SENSORS_LM80 is not set
960# CONFIG_SENSORS_LM83 is not set
961# CONFIG_SENSORS_LM85 is not set
962# CONFIG_SENSORS_LM87 is not set
963CONFIG_SENSORS_LM90=y
964CONFIG_SENSORS_LM92=y
965# CONFIG_SENSORS_LM93 is not set
966# CONFIG_SENSORS_LTC4245 is not set
967# CONFIG_SENSORS_MAX1619 is not set
968# CONFIG_SENSORS_MAX6650 is not set
969# CONFIG_SENSORS_PC87360 is not set
970# CONFIG_SENSORS_PC87427 is not set
971# CONFIG_SENSORS_SIS5595 is not set
972# CONFIG_SENSORS_DME1737 is not set
973# CONFIG_SENSORS_SMSC47M1 is not set
974# CONFIG_SENSORS_SMSC47M192 is not set
975# CONFIG_SENSORS_SMSC47B397 is not set
976# CONFIG_SENSORS_ADS7828 is not set
977# CONFIG_SENSORS_THMC50 is not set
978# CONFIG_SENSORS_VIA686A is not set
979# CONFIG_SENSORS_VT1211 is not set
980# CONFIG_SENSORS_VT8231 is not set
981# CONFIG_SENSORS_W83781D is not set
982# CONFIG_SENSORS_W83791D is not set
983# CONFIG_SENSORS_W83792D is not set
984# CONFIG_SENSORS_W83793 is not set
985# CONFIG_SENSORS_W83L785TS is not set
986# CONFIG_SENSORS_W83L786NG is not set
987# CONFIG_SENSORS_W83627HF is not set
988# CONFIG_SENSORS_W83627EHF is not set
989# CONFIG_HWMON_DEBUG_CHIP is not set
990# CONFIG_THERMAL is not set
991# CONFIG_THERMAL_HWMON is not set
992CONFIG_WATCHDOG=y
993# CONFIG_WATCHDOG_NOWAYOUT is not set
994
995#
996# Watchdog Device Drivers
997#
998# CONFIG_SOFT_WATCHDOG is not set
999# CONFIG_ALIM7101_WDT is not set
1000CONFIG_GEF_WDT=y
1001# CONFIG_8xxx_WDT is not set
1002
1003#
1004# PCI-based Watchdog Cards
1005#
1006# CONFIG_PCIPCWATCHDOG is not set
1007# CONFIG_WDTPCI is not set
1008
1009#
1010# USB-based Watchdog Cards
1011#
1012# CONFIG_USBPCWATCHDOG is not set
1013CONFIG_SSB_POSSIBLE=y
1014
1015#
1016# Sonics Silicon Backplane
1017#
1018# CONFIG_SSB is not set
1019
1020#
1021# Multifunction device drivers
1022#
1023# CONFIG_MFD_CORE is not set
1024# CONFIG_MFD_SM501 is not set
1025# CONFIG_HTC_PASIC3 is not set
1026# CONFIG_TPS65010 is not set
1027# CONFIG_TWL4030_CORE is not set
1028# CONFIG_MFD_TMIO is not set
1029# CONFIG_PMIC_DA903X is not set
1030# CONFIG_MFD_WM8400 is not set
1031# CONFIG_MFD_WM8350_I2C is not set
1032# CONFIG_MFD_PCF50633 is not set
1033# CONFIG_REGULATOR is not set
1034
1035#
1036# Multimedia devices
1037#
1038
1039#
1040# Multimedia core support
1041#
1042# CONFIG_VIDEO_DEV is not set
1043# CONFIG_DVB_CORE is not set
1044# CONFIG_VIDEO_MEDIA is not set
1045
1046#
1047# Multimedia drivers
1048#
1049CONFIG_DAB=y
1050# CONFIG_USB_DABUSB is not set
1051
1052#
1053# Graphics support
1054#
1055# CONFIG_AGP is not set
1056# CONFIG_DRM is not set
1057# CONFIG_VGASTATE is not set
1058CONFIG_VIDEO_OUTPUT_CONTROL=m
1059# CONFIG_FB is not set
1060# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1061
1062#
1063# Display device support
1064#
1065# CONFIG_DISPLAY_SUPPORT is not set
1066
1067#
1068# Console display driver support
1069#
1070CONFIG_VGA_CONSOLE=y
1071# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1072CONFIG_DUMMY_CONSOLE=y
1073# CONFIG_SOUND is not set
1074CONFIG_HID_SUPPORT=y
1075CONFIG_HID=y
1076# CONFIG_HID_DEBUG is not set
1077# CONFIG_HIDRAW is not set
1078
1079#
1080# USB Input Devices
1081#
1082CONFIG_USB_HID=y
1083# CONFIG_HID_PID is not set
1084# CONFIG_USB_HIDDEV is not set
1085
1086#
1087# Special HID drivers
1088#
1089CONFIG_HID_COMPAT=y
1090CONFIG_HID_A4TECH=y
1091CONFIG_HID_APPLE=y
1092CONFIG_HID_BELKIN=y
1093CONFIG_HID_CHERRY=y
1094CONFIG_HID_CHICONY=y
1095CONFIG_HID_CYPRESS=y
1096CONFIG_HID_EZKEY=y
1097CONFIG_HID_GYRATION=y
1098CONFIG_HID_LOGITECH=y
1099# CONFIG_LOGITECH_FF is not set
1100# CONFIG_LOGIRUMBLEPAD2_FF is not set
1101CONFIG_HID_MICROSOFT=y
1102CONFIG_HID_MONTEREY=y
1103# CONFIG_HID_NTRIG is not set
1104CONFIG_HID_PANTHERLORD=y
1105# CONFIG_PANTHERLORD_FF is not set
1106CONFIG_HID_PETALYNX=y
1107CONFIG_HID_SAMSUNG=y
1108CONFIG_HID_SONY=y
1109CONFIG_HID_SUNPLUS=y
1110# CONFIG_GREENASIA_FF is not set
1111# CONFIG_HID_TOPSEED is not set
1112# CONFIG_THRUSTMASTER_FF is not set
1113# CONFIG_ZEROPLUS_FF is not set
1114CONFIG_USB_SUPPORT=y
1115CONFIG_USB_ARCH_HAS_HCD=y
1116CONFIG_USB_ARCH_HAS_OHCI=y
1117CONFIG_USB_ARCH_HAS_EHCI=y
1118CONFIG_USB=y
1119# CONFIG_USB_DEBUG is not set
1120# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1121
1122#
1123# Miscellaneous USB options
1124#
1125# CONFIG_USB_DEVICEFS is not set
1126# CONFIG_USB_DEVICE_CLASS is not set
1127# CONFIG_USB_DYNAMIC_MINORS is not set
1128# CONFIG_USB_OTG is not set
1129# CONFIG_USB_OTG_WHITELIST is not set
1130# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1131# CONFIG_USB_MON is not set
1132# CONFIG_USB_WUSB is not set
1133# CONFIG_USB_WUSB_CBAF is not set
1134
1135#
1136# USB Host Controller Drivers
1137#
1138# CONFIG_USB_C67X00_HCD is not set
1139CONFIG_USB_EHCI_HCD=y
1140# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1141# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1142# CONFIG_USB_EHCI_FSL is not set
1143# CONFIG_USB_EHCI_HCD_PPC_OF is not set
1144# CONFIG_USB_OXU210HP_HCD is not set
1145# CONFIG_USB_ISP116X_HCD is not set
1146# CONFIG_USB_ISP1760_HCD is not set
1147CONFIG_USB_OHCI_HCD=y
1148# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1149# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1150# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1151CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1152# CONFIG_USB_UHCI_HCD is not set
1153# CONFIG_USB_SL811_HCD is not set
1154# CONFIG_USB_R8A66597_HCD is not set
1155# CONFIG_USB_WHCI_HCD is not set
1156# CONFIG_USB_HWA_HCD is not set
1157
1158#
1159# USB Device Class drivers
1160#
1161# CONFIG_USB_ACM is not set
1162# CONFIG_USB_PRINTER is not set
1163# CONFIG_USB_WDM is not set
1164# CONFIG_USB_TMC is not set
1165
1166#
1167# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1168#
1169
1170#
1171# see USB_STORAGE Help for more information
1172#
1173CONFIG_USB_STORAGE=y
1174# CONFIG_USB_STORAGE_DEBUG is not set
1175# CONFIG_USB_STORAGE_DATAFAB is not set
1176# CONFIG_USB_STORAGE_FREECOM is not set
1177# CONFIG_USB_STORAGE_ISD200 is not set
1178# CONFIG_USB_STORAGE_USBAT is not set
1179# CONFIG_USB_STORAGE_SDDR09 is not set
1180# CONFIG_USB_STORAGE_SDDR55 is not set
1181# CONFIG_USB_STORAGE_JUMPSHOT is not set
1182# CONFIG_USB_STORAGE_ALAUDA is not set
1183# CONFIG_USB_STORAGE_ONETOUCH is not set
1184# CONFIG_USB_STORAGE_KARMA is not set
1185# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1186# CONFIG_USB_LIBUSUAL is not set
1187
1188#
1189# USB Imaging devices
1190#
1191# CONFIG_USB_MDC800 is not set
1192# CONFIG_USB_MICROTEK is not set
1193
1194#
1195# USB port drivers
1196#
1197# CONFIG_USB_SERIAL is not set
1198
1199#
1200# USB Miscellaneous drivers
1201#
1202# CONFIG_USB_EMI62 is not set
1203# CONFIG_USB_EMI26 is not set
1204# CONFIG_USB_ADUTUX is not set
1205# CONFIG_USB_SEVSEG is not set
1206# CONFIG_USB_RIO500 is not set
1207# CONFIG_USB_LEGOTOWER is not set
1208# CONFIG_USB_LCD is not set
1209# CONFIG_USB_BERRY_CHARGE is not set
1210# CONFIG_USB_LED is not set
1211# CONFIG_USB_CYPRESS_CY7C63 is not set
1212# CONFIG_USB_CYTHERM is not set
1213# CONFIG_USB_PHIDGET is not set
1214# CONFIG_USB_IDMOUSE is not set
1215# CONFIG_USB_FTDI_ELAN is not set
1216# CONFIG_USB_APPLEDISPLAY is not set
1217# CONFIG_USB_SISUSBVGA is not set
1218# CONFIG_USB_LD is not set
1219# CONFIG_USB_TRANCEVIBRATOR is not set
1220# CONFIG_USB_IOWARRIOR is not set
1221# CONFIG_USB_ISIGHTFW is not set
1222# CONFIG_USB_VST is not set
1223# CONFIG_USB_GADGET is not set
1224
1225#
1226# OTG and related infrastructure
1227#
1228# CONFIG_USB_GPIO_VBUS is not set
1229# CONFIG_UWB is not set
1230# CONFIG_MMC is not set
1231# CONFIG_MEMSTICK is not set
1232# CONFIG_NEW_LEDS is not set
1233# CONFIG_ACCESSIBILITY is not set
1234# CONFIG_INFINIBAND is not set
1235# CONFIG_EDAC is not set
1236CONFIG_RTC_LIB=y
1237CONFIG_RTC_CLASS=y
1238CONFIG_RTC_HCTOSYS=y
1239CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1240# CONFIG_RTC_DEBUG is not set
1241
1242#
1243# RTC interfaces
1244#
1245CONFIG_RTC_INTF_SYSFS=y
1246# CONFIG_RTC_INTF_PROC is not set
1247CONFIG_RTC_INTF_DEV=y
1248# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1249# CONFIG_RTC_DRV_TEST is not set
1250
1251#
1252# I2C RTC drivers
1253#
1254# CONFIG_RTC_DRV_DS1307 is not set
1255# CONFIG_RTC_DRV_DS1374 is not set
1256# CONFIG_RTC_DRV_DS1672 is not set
1257# CONFIG_RTC_DRV_MAX6900 is not set
1258# CONFIG_RTC_DRV_RS5C372 is not set
1259# CONFIG_RTC_DRV_ISL1208 is not set
1260# CONFIG_RTC_DRV_X1205 is not set
1261# CONFIG_RTC_DRV_PCF8563 is not set
1262# CONFIG_RTC_DRV_PCF8583 is not set
1263# CONFIG_RTC_DRV_M41T80 is not set
1264# CONFIG_RTC_DRV_S35390A is not set
1265# CONFIG_RTC_DRV_FM3130 is not set
1266CONFIG_RTC_DRV_RX8581=y
1267
1268#
1269# SPI RTC drivers
1270#
1271
1272#
1273# Platform RTC drivers
1274#
1275# CONFIG_RTC_DRV_CMOS is not set
1276# CONFIG_RTC_DRV_DS1286 is not set
1277# CONFIG_RTC_DRV_DS1511 is not set
1278# CONFIG_RTC_DRV_DS1553 is not set
1279# CONFIG_RTC_DRV_DS1742 is not set
1280# CONFIG_RTC_DRV_STK17TA8 is not set
1281# CONFIG_RTC_DRV_M48T86 is not set
1282# CONFIG_RTC_DRV_M48T35 is not set
1283# CONFIG_RTC_DRV_M48T59 is not set
1284# CONFIG_RTC_DRV_BQ4802 is not set
1285# CONFIG_RTC_DRV_V3020 is not set
1286
1287#
1288# on-CPU RTC drivers
1289#
1290# CONFIG_RTC_DRV_PPC is not set
1291# CONFIG_DMADEVICES is not set
1292# CONFIG_UIO is not set
1293# CONFIG_STAGING is not set
1294
1295#
1296# File systems
1297#
1298CONFIG_EXT2_FS=y
1299CONFIG_EXT2_FS_XATTR=y
1300CONFIG_EXT2_FS_POSIX_ACL=y
1301# CONFIG_EXT2_FS_SECURITY is not set
1302# CONFIG_EXT2_FS_XIP is not set
1303CONFIG_EXT3_FS=y
1304CONFIG_EXT3_FS_XATTR=y
1305CONFIG_EXT3_FS_POSIX_ACL=y
1306# CONFIG_EXT3_FS_SECURITY is not set
1307# CONFIG_EXT4_FS is not set
1308CONFIG_JBD=y
1309CONFIG_FS_MBCACHE=y
1310# CONFIG_REISERFS_FS is not set
1311# CONFIG_JFS_FS is not set
1312CONFIG_FS_POSIX_ACL=y
1313CONFIG_FILE_LOCKING=y
1314# CONFIG_XFS_FS is not set
1315# CONFIG_OCFS2_FS is not set
1316# CONFIG_BTRFS_FS is not set
1317CONFIG_DNOTIFY=y
1318CONFIG_INOTIFY=y
1319CONFIG_INOTIFY_USER=y
1320# CONFIG_QUOTA is not set
1321# CONFIG_AUTOFS_FS is not set
1322# CONFIG_AUTOFS4_FS is not set
1323# CONFIG_FUSE_FS is not set
1324
1325#
1326# CD-ROM/DVD Filesystems
1327#
1328CONFIG_ISO9660_FS=y
1329CONFIG_JOLIET=y
1330CONFIG_ZISOFS=y
1331CONFIG_UDF_FS=y
1332CONFIG_UDF_NLS=y
1333
1334#
1335# DOS/FAT/NT Filesystems
1336#
1337CONFIG_FAT_FS=y
1338CONFIG_MSDOS_FS=y
1339CONFIG_VFAT_FS=y
1340CONFIG_FAT_DEFAULT_CODEPAGE=850
1341CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
1342# CONFIG_NTFS_FS is not set
1343
1344#
1345# Pseudo filesystems
1346#
1347CONFIG_PROC_FS=y
1348CONFIG_PROC_KCORE=y
1349CONFIG_PROC_SYSCTL=y
1350CONFIG_PROC_PAGE_MONITOR=y
1351CONFIG_SYSFS=y
1352CONFIG_TMPFS=y
1353# CONFIG_TMPFS_POSIX_ACL is not set
1354# CONFIG_HUGETLB_PAGE is not set
1355# CONFIG_CONFIGFS_FS is not set
1356CONFIG_MISC_FILESYSTEMS=y
1357# CONFIG_ADFS_FS is not set
1358# CONFIG_AFFS_FS is not set
1359# CONFIG_HFS_FS is not set
1360# CONFIG_HFSPLUS_FS is not set
1361# CONFIG_BEFS_FS is not set
1362# CONFIG_BFS_FS is not set
1363# CONFIG_EFS_FS is not set
1364CONFIG_JFFS2_FS=y
1365CONFIG_JFFS2_FS_DEBUG=0
1366CONFIG_JFFS2_FS_WRITEBUFFER=y
1367# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1368# CONFIG_JFFS2_SUMMARY is not set
1369# CONFIG_JFFS2_FS_XATTR is not set
1370# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1371CONFIG_JFFS2_ZLIB=y
1372# CONFIG_JFFS2_LZO is not set
1373CONFIG_JFFS2_RTIME=y
1374# CONFIG_JFFS2_RUBIN is not set
1375# CONFIG_CRAMFS is not set
1376# CONFIG_SQUASHFS is not set
1377# CONFIG_VXFS_FS is not set
1378# CONFIG_MINIX_FS is not set
1379# CONFIG_OMFS_FS is not set
1380# CONFIG_HPFS_FS is not set
1381# CONFIG_QNX4FS_FS is not set
1382# CONFIG_ROMFS_FS is not set
1383# CONFIG_SYSV_FS is not set
1384# CONFIG_UFS_FS is not set
1385CONFIG_NETWORK_FILESYSTEMS=y
1386CONFIG_NFS_FS=y
1387CONFIG_NFS_V3=y
1388# CONFIG_NFS_V3_ACL is not set
1389CONFIG_NFS_V4=y
1390CONFIG_ROOT_NFS=y
1391# CONFIG_NFSD is not set
1392CONFIG_LOCKD=y
1393CONFIG_LOCKD_V4=y
1394CONFIG_NFS_COMMON=y
1395CONFIG_SUNRPC=y
1396CONFIG_SUNRPC_GSS=y
1397# CONFIG_SUNRPC_REGISTER_V4 is not set
1398CONFIG_RPCSEC_GSS_KRB5=y
1399# CONFIG_RPCSEC_GSS_SPKM3 is not set
1400# CONFIG_SMB_FS is not set
1401CONFIG_CIFS=m
1402# CONFIG_CIFS_STATS is not set
1403# CONFIG_CIFS_WEAK_PW_HASH is not set
1404CONFIG_CIFS_XATTR=y
1405CONFIG_CIFS_POSIX=y
1406# CONFIG_CIFS_DEBUG2 is not set
1407# CONFIG_CIFS_EXPERIMENTAL is not set
1408# CONFIG_NCP_FS is not set
1409# CONFIG_CODA_FS is not set
1410# CONFIG_AFS_FS is not set
1411
1412#
1413# Partition Types
1414#
1415# CONFIG_PARTITION_ADVANCED is not set
1416CONFIG_MSDOS_PARTITION=y
1417CONFIG_NLS=y
1418CONFIG_NLS_DEFAULT="iso8859-1"
1419CONFIG_NLS_CODEPAGE_437=m
1420CONFIG_NLS_CODEPAGE_737=m
1421CONFIG_NLS_CODEPAGE_775=m
1422CONFIG_NLS_CODEPAGE_850=m
1423CONFIG_NLS_CODEPAGE_852=m
1424CONFIG_NLS_CODEPAGE_855=m
1425CONFIG_NLS_CODEPAGE_857=m
1426CONFIG_NLS_CODEPAGE_860=m
1427CONFIG_NLS_CODEPAGE_861=m
1428CONFIG_NLS_CODEPAGE_862=m
1429CONFIG_NLS_CODEPAGE_863=m
1430CONFIG_NLS_CODEPAGE_864=m
1431CONFIG_NLS_CODEPAGE_865=m
1432CONFIG_NLS_CODEPAGE_866=m
1433CONFIG_NLS_CODEPAGE_869=m
1434CONFIG_NLS_CODEPAGE_936=m
1435CONFIG_NLS_CODEPAGE_950=m
1436CONFIG_NLS_CODEPAGE_932=m
1437CONFIG_NLS_CODEPAGE_949=m
1438CONFIG_NLS_CODEPAGE_874=m
1439CONFIG_NLS_ISO8859_8=m
1440CONFIG_NLS_CODEPAGE_1250=m
1441CONFIG_NLS_CODEPAGE_1251=m
1442CONFIG_NLS_ASCII=m
1443CONFIG_NLS_ISO8859_1=m
1444CONFIG_NLS_ISO8859_2=m
1445CONFIG_NLS_ISO8859_3=m
1446CONFIG_NLS_ISO8859_4=m
1447CONFIG_NLS_ISO8859_5=m
1448CONFIG_NLS_ISO8859_6=m
1449CONFIG_NLS_ISO8859_7=m
1450CONFIG_NLS_ISO8859_9=m
1451CONFIG_NLS_ISO8859_13=m
1452CONFIG_NLS_ISO8859_14=m
1453CONFIG_NLS_ISO8859_15=m
1454CONFIG_NLS_KOI8_R=m
1455CONFIG_NLS_KOI8_U=m
1456CONFIG_NLS_UTF8=m
1457# CONFIG_DLM is not set
1458
1459#
1460# Library routines
1461#
1462CONFIG_BITREVERSE=y
1463CONFIG_GENERIC_FIND_LAST_BIT=y
1464CONFIG_CRC_CCITT=y
1465# CONFIG_CRC16 is not set
1466CONFIG_CRC_T10DIF=y
1467CONFIG_CRC_ITU_T=y
1468CONFIG_CRC32=y
1469# CONFIG_CRC7 is not set
1470CONFIG_LIBCRC32C=y
1471CONFIG_ZLIB_INFLATE=y
1472CONFIG_ZLIB_DEFLATE=y
1473CONFIG_PLIST=y
1474CONFIG_HAS_IOMEM=y
1475CONFIG_HAS_IOPORT=y
1476CONFIG_HAS_DMA=y
1477CONFIG_HAVE_LMB=y
1478
1479#
1480# Kernel hacking
1481#
1482# CONFIG_PRINTK_TIME is not set
1483CONFIG_ENABLE_WARN_DEPRECATED=y
1484CONFIG_ENABLE_MUST_CHECK=y
1485CONFIG_FRAME_WARN=1024
1486CONFIG_MAGIC_SYSRQ=y
1487# CONFIG_UNUSED_SYMBOLS is not set
1488# CONFIG_DEBUG_FS is not set
1489# CONFIG_HEADERS_CHECK is not set
1490# CONFIG_DEBUG_KERNEL is not set
1491# CONFIG_DEBUG_BUGVERBOSE is not set
1492# CONFIG_DEBUG_MEMORY_INIT is not set
1493# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1494# CONFIG_LATENCYTOP is not set
1495CONFIG_SYSCTL_SYSCALL_CHECK=y
1496CONFIG_HAVE_FUNCTION_TRACER=y
1497CONFIG_HAVE_DYNAMIC_FTRACE=y
1498CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1499
1500#
1501# Tracers
1502#
1503# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1504# CONFIG_SAMPLES is not set
1505CONFIG_HAVE_ARCH_KGDB=y
1506CONFIG_PRINT_STACK_DEPTH=64
1507# CONFIG_IRQSTACKS is not set
1508# CONFIG_BOOTX_TEXT is not set
1509# CONFIG_PPC_EARLY_DEBUG is not set
1510
1511#
1512# Security options
1513#
1514# CONFIG_KEYS is not set
1515# CONFIG_SECURITY is not set
1516# CONFIG_SECURITYFS is not set
1517# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1518CONFIG_CRYPTO=y
1519
1520#
1521# Crypto core or helper
1522#
1523# CONFIG_CRYPTO_FIPS is not set
1524CONFIG_CRYPTO_ALGAPI=y
1525CONFIG_CRYPTO_ALGAPI2=y
1526CONFIG_CRYPTO_AEAD=m
1527CONFIG_CRYPTO_AEAD2=y
1528CONFIG_CRYPTO_BLKCIPHER=y
1529CONFIG_CRYPTO_BLKCIPHER2=y
1530CONFIG_CRYPTO_HASH=y
1531CONFIG_CRYPTO_HASH2=y
1532CONFIG_CRYPTO_RNG2=y
1533CONFIG_CRYPTO_MANAGER=y
1534CONFIG_CRYPTO_MANAGER2=y
1535# CONFIG_CRYPTO_GF128MUL is not set
1536# CONFIG_CRYPTO_NULL is not set
1537# CONFIG_CRYPTO_CRYPTD is not set
1538CONFIG_CRYPTO_AUTHENC=m
1539# CONFIG_CRYPTO_TEST is not set
1540
1541#
1542# Authenticated Encryption with Associated Data
1543#
1544# CONFIG_CRYPTO_CCM is not set
1545# CONFIG_CRYPTO_GCM is not set
1546# CONFIG_CRYPTO_SEQIV is not set
1547
1548#
1549# Block modes
1550#
1551CONFIG_CRYPTO_CBC=y
1552# CONFIG_CRYPTO_CTR is not set
1553# CONFIG_CRYPTO_CTS is not set
1554# CONFIG_CRYPTO_ECB is not set
1555# CONFIG_CRYPTO_LRW is not set
1556# CONFIG_CRYPTO_PCBC is not set
1557# CONFIG_CRYPTO_XTS is not set
1558
1559#
1560# Hash modes
1561#
1562CONFIG_CRYPTO_HMAC=m
1563# CONFIG_CRYPTO_XCBC is not set
1564
1565#
1566# Digest
1567#
1568CONFIG_CRYPTO_CRC32C=y
1569# CONFIG_CRYPTO_MD4 is not set
1570CONFIG_CRYPTO_MD5=y
1571# CONFIG_CRYPTO_MICHAEL_MIC is not set
1572# CONFIG_CRYPTO_RMD128 is not set
1573# CONFIG_CRYPTO_RMD160 is not set
1574# CONFIG_CRYPTO_RMD256 is not set
1575# CONFIG_CRYPTO_RMD320 is not set
1576CONFIG_CRYPTO_SHA1=m
1577# CONFIG_CRYPTO_SHA256 is not set
1578# CONFIG_CRYPTO_SHA512 is not set
1579# CONFIG_CRYPTO_TGR192 is not set
1580# CONFIG_CRYPTO_WP512 is not set
1581
1582#
1583# Ciphers
1584#
1585# CONFIG_CRYPTO_AES is not set
1586# CONFIG_CRYPTO_ANUBIS is not set
1587# CONFIG_CRYPTO_ARC4 is not set
1588# CONFIG_CRYPTO_BLOWFISH is not set
1589# CONFIG_CRYPTO_CAMELLIA is not set
1590# CONFIG_CRYPTO_CAST5 is not set
1591# CONFIG_CRYPTO_CAST6 is not set
1592CONFIG_CRYPTO_DES=y
1593# CONFIG_CRYPTO_FCRYPT is not set
1594# CONFIG_CRYPTO_KHAZAD is not set
1595# CONFIG_CRYPTO_SALSA20 is not set
1596# CONFIG_CRYPTO_SEED is not set
1597# CONFIG_CRYPTO_SERPENT is not set
1598# CONFIG_CRYPTO_TEA is not set
1599# CONFIG_CRYPTO_TWOFISH is not set
1600
1601#
1602# Compression
1603#
1604CONFIG_CRYPTO_DEFLATE=m
1605# CONFIG_CRYPTO_LZO is not set
1606
1607#
1608# Random Number Generation
1609#
1610# CONFIG_CRYPTO_ANSI_CPRNG is not set
1611# CONFIG_CRYPTO_HW is not set
1612# CONFIG_PPC_CLOCK is not set
1613# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig
new file mode 100644
index 000000000000..b63cc38df6b1
--- /dev/null
+++ b/arch/powerpc/configs/amigaone_defconfig
@@ -0,0 +1,1636 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Sun Feb 1 14:22:42 2009
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_ALTIVEC=y
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22# CONFIG_SMP is not set
23CONFIG_NOT_COHERENT_CACHE=y
24CONFIG_CHECK_CACHE_COHERENCY=y
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_HAVE_LATENCYTOP_SUPPORT=y
38CONFIG_LOCKDEP_SUPPORT=y
39CONFIG_RWSEM_XCHGADD_ALGORITHM=y
40CONFIG_ARCH_HAS_ILOG2_U32=y
41CONFIG_GENERIC_HWEIGHT=y
42CONFIG_GENERIC_CALIBRATE_DELAY=y
43CONFIG_GENERIC_FIND_NEXT_BIT=y
44# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
45CONFIG_PPC=y
46CONFIG_EARLY_PRINTK=y
47CONFIG_GENERIC_NVRAM=y
48CONFIG_SCHED_OMIT_FRAME_POINTER=y
49CONFIG_ARCH_MAY_HAVE_PC_FDC=y
50CONFIG_PPC_OF=y
51CONFIG_OF=y
52CONFIG_PPC_UDBG_16550=y
53# CONFIG_GENERIC_TBSYNC is not set
54CONFIG_AUDIT_ARCH=y
55CONFIG_GENERIC_BUG=y
56CONFIG_DEFAULT_UIMAGE=y
57# CONFIG_PPC_DCR_NATIVE is not set
58# CONFIG_PPC_DCR_MMIO is not set
59CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
60
61#
62# General setup
63#
64CONFIG_EXPERIMENTAL=y
65CONFIG_BROKEN_ON_SMP=y
66CONFIG_INIT_ENV_ARG_LIMIT=32
67CONFIG_LOCALVERSION=""
68# CONFIG_LOCALVERSION_AUTO is not set
69CONFIG_SWAP=y
70CONFIG_SYSVIPC=y
71CONFIG_SYSVIPC_SYSCTL=y
72CONFIG_POSIX_MQUEUE=y
73# CONFIG_BSD_PROCESS_ACCT is not set
74# CONFIG_TASKSTATS is not set
75# CONFIG_AUDIT is not set
76
77#
78# RCU Subsystem
79#
80CONFIG_CLASSIC_RCU=y
81# CONFIG_TREE_RCU is not set
82# CONFIG_PREEMPT_RCU is not set
83# CONFIG_TREE_RCU_TRACE is not set
84# CONFIG_PREEMPT_RCU_TRACE is not set
85CONFIG_IKCONFIG=y
86CONFIG_IKCONFIG_PROC=y
87CONFIG_LOG_BUF_SHIFT=15
88# CONFIG_GROUP_SCHED is not set
89# CONFIG_CGROUPS is not set
90CONFIG_SYSFS_DEPRECATED=y
91CONFIG_SYSFS_DEPRECATED_V2=y
92# CONFIG_RELAY is not set
93CONFIG_NAMESPACES=y
94# CONFIG_UTS_NS is not set
95# CONFIG_IPC_NS is not set
96# CONFIG_USER_NS is not set
97# CONFIG_PID_NS is not set
98# CONFIG_NET_NS is not set
99CONFIG_BLK_DEV_INITRD=y
100CONFIG_INITRAMFS_SOURCE=""
101CONFIG_CC_OPTIMIZE_FOR_SIZE=y
102CONFIG_SYSCTL=y
103# CONFIG_EMBEDDED is not set
104CONFIG_SYSCTL_SYSCALL=y
105CONFIG_KALLSYMS=y
106# CONFIG_KALLSYMS_ALL is not set
107# CONFIG_KALLSYMS_EXTRA_PASS is not set
108CONFIG_HOTPLUG=y
109CONFIG_PRINTK=y
110CONFIG_BUG=y
111CONFIG_ELF_CORE=y
112CONFIG_PCSPKR_PLATFORM=y
113# CONFIG_COMPAT_BRK is not set
114CONFIG_BASE_FULL=y
115CONFIG_FUTEX=y
116CONFIG_ANON_INODES=y
117CONFIG_EPOLL=y
118CONFIG_SIGNALFD=y
119CONFIG_TIMERFD=y
120CONFIG_EVENTFD=y
121CONFIG_SHMEM=y
122CONFIG_AIO=y
123CONFIG_VM_EVENT_COUNTERS=y
124CONFIG_PCI_QUIRKS=y
125CONFIG_SLUB_DEBUG=y
126# CONFIG_SLAB is not set
127CONFIG_SLUB=y
128# CONFIG_SLOB is not set
129# CONFIG_PROFILING is not set
130CONFIG_HAVE_OPROFILE=y
131# CONFIG_KPROBES is not set
132CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
133CONFIG_HAVE_IOREMAP_PROT=y
134CONFIG_HAVE_KPROBES=y
135CONFIG_HAVE_KRETPROBES=y
136CONFIG_HAVE_ARCH_TRACEHOOK=y
137# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
138CONFIG_SLABINFO=y
139CONFIG_RT_MUTEXES=y
140CONFIG_BASE_SMALL=0
141CONFIG_MODULES=y
142# CONFIG_MODULE_FORCE_LOAD is not set
143CONFIG_MODULE_UNLOAD=y
144CONFIG_MODULE_FORCE_UNLOAD=y
145# CONFIG_MODVERSIONS is not set
146# CONFIG_MODULE_SRCVERSION_ALL is not set
147CONFIG_BLOCK=y
148CONFIG_LBD=y
149# CONFIG_BLK_DEV_IO_TRACE is not set
150# CONFIG_BLK_DEV_BSG is not set
151# CONFIG_BLK_DEV_INTEGRITY is not set
152
153#
154# IO Schedulers
155#
156CONFIG_IOSCHED_NOOP=y
157CONFIG_IOSCHED_AS=y
158CONFIG_IOSCHED_DEADLINE=y
159CONFIG_IOSCHED_CFQ=y
160CONFIG_DEFAULT_AS=y
161# CONFIG_DEFAULT_DEADLINE is not set
162# CONFIG_DEFAULT_CFQ is not set
163# CONFIG_DEFAULT_NOOP is not set
164CONFIG_DEFAULT_IOSCHED="anticipatory"
165# CONFIG_FREEZER is not set
166
167#
168# Platform support
169#
170CONFIG_PPC_MULTIPLATFORM=y
171CONFIG_CLASSIC32=y
172# CONFIG_PPC_CHRP is not set
173# CONFIG_MPC5121_ADS is not set
174# CONFIG_MPC5121_GENERIC is not set
175# CONFIG_PPC_MPC52xx is not set
176# CONFIG_PPC_PMAC is not set
177# CONFIG_PPC_CELL is not set
178# CONFIG_PPC_CELL_NATIVE is not set
179# CONFIG_PPC_82xx is not set
180# CONFIG_PQ2ADS is not set
181# CONFIG_PPC_83xx is not set
182# CONFIG_PPC_86xx is not set
183# CONFIG_EMBEDDED6xx is not set
184CONFIG_AMIGAONE=y
185# CONFIG_IPIC is not set
186# CONFIG_MPIC is not set
187# CONFIG_MPIC_WEIRD is not set
188CONFIG_PPC_I8259=y
189# CONFIG_PPC_RTAS is not set
190# CONFIG_MMIO_NVRAM is not set
191# CONFIG_PPC_MPC106 is not set
192# CONFIG_PPC_970_NAP is not set
193# CONFIG_PPC_INDIRECT_IO is not set
194# CONFIG_GENERIC_IOMAP is not set
195# CONFIG_CPU_FREQ is not set
196# CONFIG_TAU is not set
197# CONFIG_FSL_ULI1575 is not set
198# CONFIG_SIMPLE_GPIO is not set
199
200#
201# Kernel options
202#
203CONFIG_HIGHMEM=y
204CONFIG_TICK_ONESHOT=y
205CONFIG_NO_HZ=y
206CONFIG_HIGH_RES_TIMERS=y
207CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
208# CONFIG_HZ_100 is not set
209CONFIG_HZ_250=y
210# CONFIG_HZ_300 is not set
211# CONFIG_HZ_1000 is not set
212CONFIG_HZ=250
213CONFIG_SCHED_HRTICK=y
214CONFIG_PREEMPT_NONE=y
215# CONFIG_PREEMPT_VOLUNTARY is not set
216# CONFIG_PREEMPT is not set
217CONFIG_BINFMT_ELF=y
218# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
219# CONFIG_HAVE_AOUT is not set
220CONFIG_BINFMT_MISC=y
221# CONFIG_IOMMU_HELPER is not set
222CONFIG_PPC_NEED_DMA_SYNC_OPS=y
223CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
224CONFIG_ARCH_HAS_WALK_MEMORY=y
225CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
226# CONFIG_KEXEC is not set
227# CONFIG_CRASH_DUMP is not set
228CONFIG_ARCH_FLATMEM_ENABLE=y
229CONFIG_ARCH_POPULATES_NODE_MAP=y
230CONFIG_SELECT_MEMORY_MODEL=y
231CONFIG_FLATMEM_MANUAL=y
232# CONFIG_DISCONTIGMEM_MANUAL is not set
233# CONFIG_SPARSEMEM_MANUAL is not set
234CONFIG_FLATMEM=y
235CONFIG_FLAT_NODE_MEM_MAP=y
236CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4
238# CONFIG_MIGRATION is not set
239# CONFIG_PHYS_ADDR_T_64BIT is not set
240CONFIG_ZONE_DMA_FLAG=1
241CONFIG_BOUNCE=y
242CONFIG_VIRT_TO_BUS=y
243CONFIG_UNEVICTABLE_LRU=y
244CONFIG_PPC_4K_PAGES=y
245# CONFIG_PPC_16K_PAGES is not set
246# CONFIG_PPC_64K_PAGES is not set
247CONFIG_FORCE_MAX_ZONEORDER=11
248CONFIG_PROC_DEVICETREE=y
249# CONFIG_CMDLINE_BOOL is not set
250CONFIG_EXTRA_TARGETS=""
251# CONFIG_PM is not set
252CONFIG_SECCOMP=y
253CONFIG_ISA_DMA_API=y
254
255#
256# Bus options
257#
258CONFIG_ZONE_DMA=y
259CONFIG_GENERIC_ISA_DMA=y
260CONFIG_PPC_INDIRECT_PCI=y
261CONFIG_PCI=y
262CONFIG_PCI_DOMAINS=y
263CONFIG_PCI_SYSCALL=y
264# CONFIG_PCIEPORTBUS is not set
265CONFIG_ARCH_SUPPORTS_MSI=y
266# CONFIG_PCI_MSI is not set
267# CONFIG_PCI_LEGACY is not set
268# CONFIG_PCI_DEBUG is not set
269# CONFIG_PCI_STUB is not set
270# CONFIG_PCCARD is not set
271# CONFIG_HOTPLUG_PCI is not set
272# CONFIG_HAS_RAPIDIO is not set
273
274#
275# Advanced setup
276#
277# CONFIG_ADVANCED_OPTIONS is not set
278
279#
280# Default settings for advanced configuration options are used
281#
282CONFIG_LOWMEM_SIZE=0x30000000
283CONFIG_PAGE_OFFSET=0xc0000000
284CONFIG_KERNEL_START=0xc0000000
285CONFIG_PHYSICAL_START=0x00000000
286CONFIG_TASK_SIZE=0xc0000000
287CONFIG_CONSISTENT_START=0xff100000
288CONFIG_CONSISTENT_SIZE=0x00200000
289CONFIG_NET=y
290
291#
292# Networking options
293#
294CONFIG_COMPAT_NET_DEV_OPS=y
295CONFIG_PACKET=y
296# CONFIG_PACKET_MMAP is not set
297CONFIG_UNIX=y
298# CONFIG_NET_KEY is not set
299CONFIG_INET=y
300CONFIG_IP_MULTICAST=y
301# CONFIG_IP_ADVANCED_ROUTER is not set
302CONFIG_IP_FIB_HASH=y
303# CONFIG_IP_PNP is not set
304# CONFIG_NET_IPIP is not set
305# CONFIG_NET_IPGRE is not set
306# CONFIG_IP_MROUTE is not set
307# CONFIG_ARPD is not set
308CONFIG_SYN_COOKIES=y
309# CONFIG_INET_AH is not set
310# CONFIG_INET_ESP is not set
311# CONFIG_INET_IPCOMP is not set
312# CONFIG_INET_XFRM_TUNNEL is not set
313# CONFIG_INET_TUNNEL is not set
314# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
315# CONFIG_INET_XFRM_MODE_TUNNEL is not set
316# CONFIG_INET_XFRM_MODE_BEET is not set
317# CONFIG_INET_LRO is not set
318CONFIG_INET_DIAG=y
319CONFIG_INET_TCP_DIAG=y
320# CONFIG_TCP_CONG_ADVANCED is not set
321CONFIG_TCP_CONG_CUBIC=y
322CONFIG_DEFAULT_TCP_CONG="cubic"
323# CONFIG_TCP_MD5SIG is not set
324# CONFIG_IPV6 is not set
325# CONFIG_NETWORK_SECMARK is not set
326CONFIG_NETFILTER=y
327# CONFIG_NETFILTER_DEBUG is not set
328# CONFIG_NETFILTER_ADVANCED is not set
329
330#
331# Core Netfilter Configuration
332#
333CONFIG_NETFILTER_NETLINK=m
334CONFIG_NETFILTER_NETLINK_LOG=m
335CONFIG_NF_CONNTRACK=m
336CONFIG_NF_CONNTRACK_FTP=m
337CONFIG_NF_CONNTRACK_IRC=m
338CONFIG_NF_CONNTRACK_SIP=m
339CONFIG_NF_CT_NETLINK=m
340CONFIG_NETFILTER_XTABLES=m
341# CONFIG_NETFILTER_XT_TARGET_MARK is not set
342# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
343# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
344# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
345# CONFIG_NETFILTER_XT_MATCH_MARK is not set
346# CONFIG_NETFILTER_XT_MATCH_STATE is not set
347# CONFIG_IP_VS is not set
348
349#
350# IP: Netfilter Configuration
351#
352CONFIG_NF_DEFRAG_IPV4=m
353CONFIG_NF_CONNTRACK_IPV4=m
354CONFIG_NF_CONNTRACK_PROC_COMPAT=y
355CONFIG_IP_NF_IPTABLES=m
356CONFIG_IP_NF_FILTER=m
357CONFIG_IP_NF_TARGET_REJECT=m
358CONFIG_IP_NF_TARGET_LOG=m
359# CONFIG_IP_NF_TARGET_ULOG is not set
360CONFIG_NF_NAT=m
361CONFIG_NF_NAT_NEEDED=y
362CONFIG_IP_NF_TARGET_MASQUERADE=m
363CONFIG_NF_NAT_FTP=m
364CONFIG_NF_NAT_IRC=m
365# CONFIG_NF_NAT_TFTP is not set
366# CONFIG_NF_NAT_AMANDA is not set
367# CONFIG_NF_NAT_PPTP is not set
368# CONFIG_NF_NAT_H323 is not set
369CONFIG_NF_NAT_SIP=m
370# CONFIG_IP_NF_MANGLE is not set
371# CONFIG_IP_DCCP is not set
372# CONFIG_IP_SCTP is not set
373# CONFIG_TIPC is not set
374# CONFIG_ATM is not set
375# CONFIG_BRIDGE is not set
376# CONFIG_NET_DSA is not set
377# CONFIG_VLAN_8021Q is not set
378# CONFIG_DECNET is not set
379# CONFIG_LLC2 is not set
380# CONFIG_IPX is not set
381# CONFIG_ATALK is not set
382# CONFIG_X25 is not set
383# CONFIG_LAPB is not set
384# CONFIG_ECONET is not set
385# CONFIG_WAN_ROUTER is not set
386# CONFIG_NET_SCHED is not set
387# CONFIG_DCB is not set
388
389#
390# Network testing
391#
392# CONFIG_NET_PKTGEN is not set
393# CONFIG_HAMRADIO is not set
394# CONFIG_CAN is not set
395# CONFIG_IRDA is not set
396# CONFIG_BT is not set
397# CONFIG_AF_RXRPC is not set
398# CONFIG_PHONET is not set
399# CONFIG_WIRELESS is not set
400# CONFIG_WIMAX is not set
401# CONFIG_RFKILL is not set
402# CONFIG_NET_9P is not set
403
404#
405# Device Drivers
406#
407
408#
409# Generic Driver Options
410#
411CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
412# CONFIG_STANDALONE is not set
413CONFIG_PREVENT_FIRMWARE_BUILD=y
414CONFIG_FW_LOADER=y
415CONFIG_FIRMWARE_IN_KERNEL=y
416CONFIG_EXTRA_FIRMWARE=""
417# CONFIG_DEBUG_DRIVER is not set
418# CONFIG_DEBUG_DEVRES is not set
419# CONFIG_SYS_HYPERVISOR is not set
420# CONFIG_CONNECTOR is not set
421# CONFIG_MTD is not set
422CONFIG_OF_DEVICE=y
423CONFIG_OF_I2C=y
424CONFIG_PARPORT=y
425CONFIG_PARPORT_PC=y
426# CONFIG_PARPORT_SERIAL is not set
427CONFIG_PARPORT_PC_FIFO=y
428# CONFIG_PARPORT_PC_SUPERIO is not set
429# CONFIG_PARPORT_GSC is not set
430# CONFIG_PARPORT_AX88796 is not set
431# CONFIG_PARPORT_1284 is not set
432CONFIG_BLK_DEV=y
433CONFIG_BLK_DEV_FD=y
434# CONFIG_PARIDE is not set
435# CONFIG_BLK_CPQ_DA is not set
436# CONFIG_BLK_CPQ_CISS_DA is not set
437# CONFIG_BLK_DEV_DAC960 is not set
438# CONFIG_BLK_DEV_UMEM is not set
439# CONFIG_BLK_DEV_COW_COMMON is not set
440CONFIG_BLK_DEV_LOOP=y
441# CONFIG_BLK_DEV_CRYPTOLOOP is not set
442# CONFIG_BLK_DEV_NBD is not set
443# CONFIG_BLK_DEV_SX8 is not set
444# CONFIG_BLK_DEV_UB is not set
445CONFIG_BLK_DEV_RAM=y
446CONFIG_BLK_DEV_RAM_COUNT=16
447CONFIG_BLK_DEV_RAM_SIZE=4096
448# CONFIG_BLK_DEV_XIP is not set
449# CONFIG_CDROM_PKTCDVD is not set
450# CONFIG_ATA_OVER_ETH is not set
451# CONFIG_BLK_DEV_HD is not set
452CONFIG_MISC_DEVICES=y
453# CONFIG_PHANTOM is not set
454# CONFIG_SGI_IOC4 is not set
455# CONFIG_TIFM_CORE is not set
456# CONFIG_ICS932S401 is not set
457# CONFIG_ENCLOSURE_SERVICES is not set
458# CONFIG_HP_ILO is not set
459# CONFIG_C2PORT is not set
460
461#
462# EEPROM support
463#
464# CONFIG_EEPROM_AT24 is not set
465# CONFIG_EEPROM_LEGACY is not set
466# CONFIG_EEPROM_93CX6 is not set
467CONFIG_HAVE_IDE=y
468CONFIG_IDE=y
469
470#
471# Please see Documentation/ide/ide.txt for help/info on IDE drives
472#
473CONFIG_IDE_TIMINGS=y
474CONFIG_IDE_ATAPI=y
475# CONFIG_BLK_DEV_IDE_SATA is not set
476CONFIG_IDE_GD=y
477CONFIG_IDE_GD_ATA=y
478# CONFIG_IDE_GD_ATAPI is not set
479CONFIG_BLK_DEV_IDECD=y
480CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
481# CONFIG_BLK_DEV_IDETAPE is not set
482# CONFIG_IDE_TASK_IOCTL is not set
483CONFIG_IDE_PROC_FS=y
484
485#
486# IDE chipset support/bugfixes
487#
488# CONFIG_BLK_DEV_PLATFORM is not set
489CONFIG_BLK_DEV_IDEDMA_SFF=y
490
491#
492# PCI IDE chipsets support
493#
494CONFIG_BLK_DEV_IDEPCI=y
495# CONFIG_IDEPCI_PCIBUS_ORDER is not set
496# CONFIG_BLK_DEV_OFFBOARD is not set
497CONFIG_BLK_DEV_GENERIC=y
498# CONFIG_BLK_DEV_OPTI621 is not set
499CONFIG_BLK_DEV_IDEDMA_PCI=y
500# CONFIG_BLK_DEV_AEC62XX is not set
501# CONFIG_BLK_DEV_ALI15X3 is not set
502# CONFIG_BLK_DEV_AMD74XX is not set
503# CONFIG_BLK_DEV_CMD64X is not set
504# CONFIG_BLK_DEV_TRIFLEX is not set
505# CONFIG_BLK_DEV_CS5520 is not set
506# CONFIG_BLK_DEV_CS5530 is not set
507# CONFIG_BLK_DEV_HPT366 is not set
508# CONFIG_BLK_DEV_JMICRON is not set
509# CONFIG_BLK_DEV_SC1200 is not set
510# CONFIG_BLK_DEV_PIIX is not set
511# CONFIG_BLK_DEV_IT8172 is not set
512# CONFIG_BLK_DEV_IT8213 is not set
513# CONFIG_BLK_DEV_IT821X is not set
514# CONFIG_BLK_DEV_NS87415 is not set
515# CONFIG_BLK_DEV_PDC202XX_OLD is not set
516# CONFIG_BLK_DEV_PDC202XX_NEW is not set
517# CONFIG_BLK_DEV_SVWKS is not set
518CONFIG_BLK_DEV_SIIMAGE=y
519# CONFIG_BLK_DEV_SL82C105 is not set
520# CONFIG_BLK_DEV_SLC90E66 is not set
521# CONFIG_BLK_DEV_TRM290 is not set
522CONFIG_BLK_DEV_VIA82CXXX=y
523# CONFIG_BLK_DEV_TC86C001 is not set
524CONFIG_BLK_DEV_IDEDMA=y
525
526#
527# SCSI device support
528#
529# CONFIG_RAID_ATTRS is not set
530CONFIG_SCSI=y
531CONFIG_SCSI_DMA=y
532# CONFIG_SCSI_TGT is not set
533# CONFIG_SCSI_NETLINK is not set
534CONFIG_SCSI_PROC_FS=y
535
536#
537# SCSI support type (disk, tape, CD-ROM)
538#
539CONFIG_BLK_DEV_SD=y
540CONFIG_CHR_DEV_ST=y
541# CONFIG_CHR_DEV_OSST is not set
542CONFIG_BLK_DEV_SR=y
543CONFIG_BLK_DEV_SR_VENDOR=y
544CONFIG_CHR_DEV_SG=y
545# CONFIG_CHR_DEV_SCH is not set
546
547#
548# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
549#
550# CONFIG_SCSI_MULTI_LUN is not set
551CONFIG_SCSI_CONSTANTS=y
552# CONFIG_SCSI_LOGGING is not set
553# CONFIG_SCSI_SCAN_ASYNC is not set
554CONFIG_SCSI_WAIT_SCAN=m
555
556#
557# SCSI Transports
558#
559CONFIG_SCSI_SPI_ATTRS=y
560# CONFIG_SCSI_FC_ATTRS is not set
561# CONFIG_SCSI_ISCSI_ATTRS is not set
562# CONFIG_SCSI_SAS_LIBSAS is not set
563# CONFIG_SCSI_SRP_ATTRS is not set
564CONFIG_SCSI_LOWLEVEL=y
565# CONFIG_ISCSI_TCP is not set
566# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
567# CONFIG_SCSI_3W_9XXX is not set
568# CONFIG_SCSI_ACARD is not set
569# CONFIG_SCSI_AACRAID is not set
570# CONFIG_SCSI_AIC7XXX is not set
571# CONFIG_SCSI_AIC7XXX_OLD is not set
572# CONFIG_SCSI_AIC79XX is not set
573# CONFIG_SCSI_AIC94XX is not set
574# CONFIG_SCSI_DPT_I2O is not set
575# CONFIG_SCSI_ADVANSYS is not set
576# CONFIG_SCSI_ARCMSR is not set
577# CONFIG_MEGARAID_NEWGEN is not set
578# CONFIG_MEGARAID_LEGACY is not set
579# CONFIG_MEGARAID_SAS is not set
580# CONFIG_SCSI_HPTIOP is not set
581# CONFIG_SCSI_BUSLOGIC is not set
582# CONFIG_LIBFC is not set
583# CONFIG_FCOE is not set
584# CONFIG_SCSI_DMX3191D is not set
585# CONFIG_SCSI_EATA is not set
586# CONFIG_SCSI_FUTURE_DOMAIN is not set
587# CONFIG_SCSI_GDTH is not set
588# CONFIG_SCSI_IPS is not set
589# CONFIG_SCSI_INITIO is not set
590# CONFIG_SCSI_INIA100 is not set
591# CONFIG_SCSI_PPA is not set
592# CONFIG_SCSI_IMM is not set
593# CONFIG_SCSI_MVSAS is not set
594# CONFIG_SCSI_STEX is not set
595CONFIG_SCSI_SYM53C8XX_2=y
596CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
597CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
598CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
599# CONFIG_SCSI_SYM53C8XX_MMIO is not set
600# CONFIG_SCSI_QLOGIC_1280 is not set
601# CONFIG_SCSI_QLA_FC is not set
602# CONFIG_SCSI_QLA_ISCSI is not set
603# CONFIG_SCSI_LPFC is not set
604# CONFIG_SCSI_DC395x is not set
605# CONFIG_SCSI_DC390T is not set
606# CONFIG_SCSI_NSP32 is not set
607# CONFIG_SCSI_DEBUG is not set
608# CONFIG_SCSI_SRP is not set
609# CONFIG_SCSI_DH is not set
610# CONFIG_ATA is not set
611# CONFIG_MD is not set
612# CONFIG_FUSION is not set
613
614#
615# IEEE 1394 (FireWire) support
616#
617
618#
619# Enable only one of the two stacks, unless you know what you are doing
620#
621# CONFIG_FIREWIRE is not set
622# CONFIG_IEEE1394 is not set
623# CONFIG_I2O is not set
624# CONFIG_MACINTOSH_DRIVERS is not set
625CONFIG_NETDEVICES=y
626# CONFIG_DUMMY is not set
627# CONFIG_BONDING is not set
628# CONFIG_MACVLAN is not set
629# CONFIG_EQUALIZER is not set
630# CONFIG_TUN is not set
631# CONFIG_VETH is not set
632# CONFIG_ARCNET is not set
633CONFIG_PHYLIB=y
634
635#
636# MII PHY device drivers
637#
638# CONFIG_MARVELL_PHY is not set
639# CONFIG_DAVICOM_PHY is not set
640# CONFIG_QSEMI_PHY is not set
641# CONFIG_LXT_PHY is not set
642# CONFIG_CICADA_PHY is not set
643# CONFIG_VITESSE_PHY is not set
644# CONFIG_SMSC_PHY is not set
645# CONFIG_BROADCOM_PHY is not set
646# CONFIG_ICPLUS_PHY is not set
647# CONFIG_REALTEK_PHY is not set
648# CONFIG_NATIONAL_PHY is not set
649# CONFIG_STE10XP is not set
650# CONFIG_LSI_ET1011C_PHY is not set
651# CONFIG_FIXED_PHY is not set
652# CONFIG_MDIO_BITBANG is not set
653CONFIG_NET_ETHERNET=y
654CONFIG_MII=y
655# CONFIG_HAPPYMEAL is not set
656# CONFIG_SUNGEM is not set
657# CONFIG_CASSINI is not set
658CONFIG_NET_VENDOR_3COM=y
659CONFIG_VORTEX=y
660# CONFIG_TYPHOON is not set
661# CONFIG_NET_TULIP is not set
662# CONFIG_HP100 is not set
663# CONFIG_IBM_NEW_EMAC_ZMII is not set
664# CONFIG_IBM_NEW_EMAC_RGMII is not set
665# CONFIG_IBM_NEW_EMAC_TAH is not set
666# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
667# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
668# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
669# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
670CONFIG_NET_PCI=y
671# CONFIG_PCNET32 is not set
672# CONFIG_AMD8111_ETH is not set
673# CONFIG_ADAPTEC_STARFIRE is not set
674# CONFIG_B44 is not set
675# CONFIG_FORCEDETH is not set
676# CONFIG_E100 is not set
677# CONFIG_FEALNX is not set
678# CONFIG_NATSEMI is not set
679# CONFIG_NE2K_PCI is not set
680CONFIG_8139CP=y
681CONFIG_8139TOO=y
682CONFIG_8139TOO_PIO=y
683# CONFIG_8139TOO_TUNE_TWISTER is not set
684# CONFIG_8139TOO_8129 is not set
685# CONFIG_8139_OLD_RX_RESET is not set
686# CONFIG_R6040 is not set
687# CONFIG_SIS900 is not set
688# CONFIG_EPIC100 is not set
689# CONFIG_SMSC9420 is not set
690# CONFIG_SUNDANCE is not set
691# CONFIG_TLAN is not set
692# CONFIG_VIA_RHINE is not set
693# CONFIG_SC92031 is not set
694# CONFIG_NET_POCKET is not set
695# CONFIG_ATL2 is not set
696# CONFIG_NETDEV_1000 is not set
697# CONFIG_NETDEV_10000 is not set
698# CONFIG_TR is not set
699
700#
701# Wireless LAN
702#
703# CONFIG_WLAN_PRE80211 is not set
704# CONFIG_WLAN_80211 is not set
705# CONFIG_IWLWIFI_LEDS is not set
706
707#
708# Enable WiMAX (Networking options) to see the WiMAX drivers
709#
710
711#
712# USB Network Adapters
713#
714# CONFIG_USB_CATC is not set
715# CONFIG_USB_KAWETH is not set
716# CONFIG_USB_PEGASUS is not set
717# CONFIG_USB_RTL8150 is not set
718# CONFIG_USB_USBNET is not set
719# CONFIG_WAN is not set
720# CONFIG_FDDI is not set
721# CONFIG_HIPPI is not set
722# CONFIG_PLIP is not set
723CONFIG_PPP=m
724CONFIG_PPP_MULTILINK=y
725CONFIG_PPP_FILTER=y
726CONFIG_PPP_ASYNC=m
727CONFIG_PPP_SYNC_TTY=m
728CONFIG_PPP_DEFLATE=m
729CONFIG_PPP_BSDCOMP=m
730CONFIG_PPP_MPPE=m
731CONFIG_PPPOE=m
732# CONFIG_PPPOL2TP is not set
733# CONFIG_SLIP is not set
734CONFIG_SLHC=m
735# CONFIG_NET_FC is not set
736# CONFIG_NETCONSOLE is not set
737# CONFIG_NETPOLL is not set
738# CONFIG_NET_POLL_CONTROLLER is not set
739# CONFIG_ISDN is not set
740# CONFIG_PHONE is not set
741
742#
743# Input device support
744#
745CONFIG_INPUT=y
746# CONFIG_INPUT_FF_MEMLESS is not set
747# CONFIG_INPUT_POLLDEV is not set
748
749#
750# Userland interfaces
751#
752CONFIG_INPUT_MOUSEDEV=y
753CONFIG_INPUT_MOUSEDEV_PSAUX=y
754CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
755CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
756# CONFIG_INPUT_JOYDEV is not set
757CONFIG_INPUT_EVDEV=y
758# CONFIG_INPUT_EVBUG is not set
759
760#
761# Input Device Drivers
762#
763CONFIG_INPUT_KEYBOARD=y
764CONFIG_KEYBOARD_ATKBD=y
765# CONFIG_KEYBOARD_SUNKBD is not set
766# CONFIG_KEYBOARD_LKKBD is not set
767# CONFIG_KEYBOARD_XTKBD is not set
768# CONFIG_KEYBOARD_NEWTON is not set
769# CONFIG_KEYBOARD_STOWAWAY is not set
770CONFIG_INPUT_MOUSE=y
771CONFIG_MOUSE_PS2=y
772CONFIG_MOUSE_PS2_ALPS=y
773CONFIG_MOUSE_PS2_LOGIPS2PP=y
774CONFIG_MOUSE_PS2_SYNAPTICS=y
775CONFIG_MOUSE_PS2_LIFEBOOK=y
776CONFIG_MOUSE_PS2_TRACKPOINT=y
777# CONFIG_MOUSE_PS2_ELANTECH is not set
778# CONFIG_MOUSE_PS2_TOUCHKIT is not set
779# CONFIG_MOUSE_SERIAL is not set
780# CONFIG_MOUSE_APPLETOUCH is not set
781# CONFIG_MOUSE_BCM5974 is not set
782# CONFIG_MOUSE_VSXXXAA is not set
783# CONFIG_INPUT_JOYSTICK is not set
784# CONFIG_INPUT_TABLET is not set
785# CONFIG_INPUT_TOUCHSCREEN is not set
786CONFIG_INPUT_MISC=y
787CONFIG_INPUT_PCSPKR=y
788# CONFIG_INPUT_ATI_REMOTE is not set
789# CONFIG_INPUT_ATI_REMOTE2 is not set
790# CONFIG_INPUT_KEYSPAN_REMOTE is not set
791# CONFIG_INPUT_POWERMATE is not set
792# CONFIG_INPUT_YEALINK is not set
793# CONFIG_INPUT_CM109 is not set
794CONFIG_INPUT_UINPUT=y
795
796#
797# Hardware I/O ports
798#
799CONFIG_SERIO=y
800CONFIG_SERIO_I8042=y
801CONFIG_SERIO_SERPORT=y
802# CONFIG_SERIO_PARKBD is not set
803# CONFIG_SERIO_PCIPS2 is not set
804CONFIG_SERIO_LIBPS2=y
805# CONFIG_SERIO_RAW is not set
806# CONFIG_SERIO_XILINX_XPS_PS2 is not set
807# CONFIG_GAMEPORT is not set
808
809#
810# Character devices
811#
812CONFIG_VT=y
813CONFIG_CONSOLE_TRANSLATIONS=y
814CONFIG_VT_CONSOLE=y
815CONFIG_HW_CONSOLE=y
816# CONFIG_VT_HW_CONSOLE_BINDING is not set
817CONFIG_DEVKMEM=y
818# CONFIG_SERIAL_NONSTANDARD is not set
819# CONFIG_NOZOMI is not set
820
821#
822# Serial drivers
823#
824CONFIG_SERIAL_8250=y
825CONFIG_SERIAL_8250_CONSOLE=y
826CONFIG_SERIAL_8250_PCI=y
827CONFIG_SERIAL_8250_NR_UARTS=4
828CONFIG_SERIAL_8250_RUNTIME_UARTS=4
829# CONFIG_SERIAL_8250_EXTENDED is not set
830
831#
832# Non-8250 serial port support
833#
834# CONFIG_SERIAL_UARTLITE is not set
835CONFIG_SERIAL_CORE=y
836CONFIG_SERIAL_CORE_CONSOLE=y
837# CONFIG_SERIAL_JSM is not set
838# CONFIG_SERIAL_OF_PLATFORM is not set
839CONFIG_UNIX98_PTYS=y
840# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
841CONFIG_LEGACY_PTYS=y
842CONFIG_LEGACY_PTY_COUNT=256
843# CONFIG_PRINTER is not set
844# CONFIG_PPDEV is not set
845# CONFIG_HVC_UDBG is not set
846# CONFIG_IPMI_HANDLER is not set
847# CONFIG_HW_RANDOM is not set
848# CONFIG_NVRAM is not set
849# CONFIG_R3964 is not set
850# CONFIG_APPLICOM is not set
851# CONFIG_RAW_DRIVER is not set
852# CONFIG_TCG_TPM is not set
853CONFIG_DEVPORT=y
854CONFIG_I2C=y
855CONFIG_I2C_BOARDINFO=y
856# CONFIG_I2C_CHARDEV is not set
857CONFIG_I2C_HELPER_AUTO=y
858CONFIG_I2C_ALGOBIT=y
859
860#
861# I2C Hardware Bus support
862#
863
864#
865# PC SMBus host controller drivers
866#
867# CONFIG_I2C_ALI1535 is not set
868# CONFIG_I2C_ALI1563 is not set
869# CONFIG_I2C_ALI15X3 is not set
870# CONFIG_I2C_AMD756 is not set
871# CONFIG_I2C_AMD8111 is not set
872# CONFIG_I2C_I801 is not set
873# CONFIG_I2C_ISCH is not set
874# CONFIG_I2C_PIIX4 is not set
875# CONFIG_I2C_NFORCE2 is not set
876# CONFIG_I2C_SIS5595 is not set
877# CONFIG_I2C_SIS630 is not set
878# CONFIG_I2C_SIS96X is not set
879# CONFIG_I2C_VIA is not set
880# CONFIG_I2C_VIAPRO is not set
881
882#
883# I2C system bus drivers (mostly embedded / system-on-chip)
884#
885# CONFIG_I2C_MPC is not set
886# CONFIG_I2C_OCORES is not set
887# CONFIG_I2C_SIMTEC is not set
888
889#
890# External I2C/SMBus adapter drivers
891#
892# CONFIG_I2C_PARPORT is not set
893# CONFIG_I2C_PARPORT_LIGHT is not set
894# CONFIG_I2C_TAOS_EVM is not set
895# CONFIG_I2C_TINY_USB is not set
896
897#
898# Graphics adapter I2C/DDC channel drivers
899#
900# CONFIG_I2C_VOODOO3 is not set
901
902#
903# Other I2C/SMBus bus drivers
904#
905# CONFIG_I2C_PCA_PLATFORM is not set
906# CONFIG_I2C_STUB is not set
907
908#
909# Miscellaneous I2C Chip support
910#
911# CONFIG_DS1682 is not set
912# CONFIG_SENSORS_PCF8574 is not set
913# CONFIG_PCF8575 is not set
914# CONFIG_SENSORS_PCA9539 is not set
915# CONFIG_SENSORS_PCF8591 is not set
916# CONFIG_SENSORS_MAX6875 is not set
917# CONFIG_SENSORS_TSL2550 is not set
918# CONFIG_I2C_DEBUG_CORE is not set
919# CONFIG_I2C_DEBUG_ALGO is not set
920# CONFIG_I2C_DEBUG_BUS is not set
921# CONFIG_I2C_DEBUG_CHIP is not set
922# CONFIG_SPI is not set
923CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
924# CONFIG_GPIOLIB is not set
925# CONFIG_W1 is not set
926# CONFIG_POWER_SUPPLY is not set
927# CONFIG_HWMON is not set
928# CONFIG_THERMAL is not set
929# CONFIG_THERMAL_HWMON is not set
930# CONFIG_WATCHDOG is not set
931CONFIG_SSB_POSSIBLE=y
932
933#
934# Sonics Silicon Backplane
935#
936# CONFIG_SSB is not set
937
938#
939# Multifunction device drivers
940#
941# CONFIG_MFD_CORE is not set
942# CONFIG_MFD_SM501 is not set
943# CONFIG_HTC_PASIC3 is not set
944# CONFIG_TWL4030_CORE is not set
945# CONFIG_MFD_TMIO is not set
946# CONFIG_PMIC_DA903X is not set
947# CONFIG_MFD_WM8400 is not set
948# CONFIG_MFD_WM8350_I2C is not set
949# CONFIG_MFD_PCF50633 is not set
950# CONFIG_REGULATOR is not set
951
952#
953# Multimedia devices
954#
955
956#
957# Multimedia core support
958#
959# CONFIG_VIDEO_DEV is not set
960# CONFIG_DVB_CORE is not set
961# CONFIG_VIDEO_MEDIA is not set
962
963#
964# Multimedia drivers
965#
966# CONFIG_DAB is not set
967
968#
969# Graphics support
970#
971# CONFIG_AGP is not set
972# CONFIG_DRM is not set
973# CONFIG_VGASTATE is not set
974# CONFIG_VIDEO_OUTPUT_CONTROL is not set
975CONFIG_FB=y
976CONFIG_FIRMWARE_EDID=y
977CONFIG_FB_DDC=y
978# CONFIG_FB_BOOT_VESA_SUPPORT is not set
979CONFIG_FB_CFB_FILLRECT=y
980CONFIG_FB_CFB_COPYAREA=y
981CONFIG_FB_CFB_IMAGEBLIT=y
982# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
983# CONFIG_FB_SYS_FILLRECT is not set
984# CONFIG_FB_SYS_COPYAREA is not set
985# CONFIG_FB_SYS_IMAGEBLIT is not set
986# CONFIG_FB_FOREIGN_ENDIAN is not set
987# CONFIG_FB_SYS_FOPS is not set
988# CONFIG_FB_SVGALIB is not set
989CONFIG_FB_MACMODES=y
990CONFIG_FB_BACKLIGHT=y
991CONFIG_FB_MODE_HELPERS=y
992CONFIG_FB_TILEBLITTING=y
993
994#
995# Frame buffer hardware drivers
996#
997# CONFIG_FB_CIRRUS is not set
998# CONFIG_FB_PM2 is not set
999# CONFIG_FB_CYBER2000 is not set
1000# CONFIG_FB_OF is not set
1001# CONFIG_FB_CT65550 is not set
1002# CONFIG_FB_ASILIANT is not set
1003# CONFIG_FB_IMSTT is not set
1004# CONFIG_FB_VGA16 is not set
1005# CONFIG_FB_S1D13XXX is not set
1006# CONFIG_FB_NVIDIA is not set
1007# CONFIG_FB_RIVA is not set
1008# CONFIG_FB_MATROX is not set
1009CONFIG_FB_RADEON=y
1010CONFIG_FB_RADEON_I2C=y
1011CONFIG_FB_RADEON_BACKLIGHT=y
1012# CONFIG_FB_RADEON_DEBUG is not set
1013# CONFIG_FB_ATY128 is not set
1014# CONFIG_FB_ATY is not set
1015# CONFIG_FB_S3 is not set
1016# CONFIG_FB_SAVAGE is not set
1017# CONFIG_FB_SIS is not set
1018# CONFIG_FB_VIA is not set
1019# CONFIG_FB_NEOMAGIC is not set
1020# CONFIG_FB_KYRO is not set
1021CONFIG_FB_3DFX=y
1022# CONFIG_FB_3DFX_ACCEL is not set
1023# CONFIG_FB_VOODOO1 is not set
1024# CONFIG_FB_VT8623 is not set
1025# CONFIG_FB_TRIDENT is not set
1026# CONFIG_FB_ARK is not set
1027# CONFIG_FB_PM3 is not set
1028# CONFIG_FB_CARMINE is not set
1029# CONFIG_FB_IBM_GXT4500 is not set
1030# CONFIG_FB_VIRTUAL is not set
1031# CONFIG_FB_METRONOME is not set
1032# CONFIG_FB_MB862XX is not set
1033CONFIG_BACKLIGHT_LCD_SUPPORT=y
1034CONFIG_LCD_CLASS_DEVICE=m
1035# CONFIG_LCD_ILI9320 is not set
1036# CONFIG_LCD_PLATFORM is not set
1037CONFIG_BACKLIGHT_CLASS_DEVICE=y
1038CONFIG_BACKLIGHT_GENERIC=y
1039
1040#
1041# Display device support
1042#
1043CONFIG_DISPLAY_SUPPORT=m
1044
1045#
1046# Display hardware drivers
1047#
1048
1049#
1050# Console display driver support
1051#
1052CONFIG_VGA_CONSOLE=y
1053# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1054CONFIG_DUMMY_CONSOLE=y
1055CONFIG_FRAMEBUFFER_CONSOLE=y
1056# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1057# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1058# CONFIG_FONTS is not set
1059CONFIG_FONT_8x8=y
1060CONFIG_FONT_8x16=y
1061CONFIG_LOGO=y
1062CONFIG_LOGO_LINUX_MONO=y
1063CONFIG_LOGO_LINUX_VGA16=y
1064CONFIG_LOGO_LINUX_CLUT224=y
1065# CONFIG_SOUND is not set
1066CONFIG_HID_SUPPORT=y
1067CONFIG_HID=y
1068# CONFIG_HID_DEBUG is not set
1069# CONFIG_HIDRAW is not set
1070
1071#
1072# USB Input Devices
1073#
1074CONFIG_USB_HID=y
1075# CONFIG_HID_PID is not set
1076# CONFIG_USB_HIDDEV is not set
1077
1078#
1079# Special HID drivers
1080#
1081CONFIG_HID_COMPAT=y
1082CONFIG_HID_A4TECH=y
1083CONFIG_HID_APPLE=y
1084CONFIG_HID_BELKIN=y
1085CONFIG_HID_CHERRY=y
1086CONFIG_HID_CHICONY=y
1087CONFIG_HID_CYPRESS=y
1088CONFIG_HID_EZKEY=y
1089CONFIG_HID_GYRATION=y
1090CONFIG_HID_LOGITECH=y
1091# CONFIG_LOGITECH_FF is not set
1092# CONFIG_LOGIRUMBLEPAD2_FF is not set
1093CONFIG_HID_MICROSOFT=y
1094CONFIG_HID_MONTEREY=y
1095CONFIG_HID_NTRIG=y
1096CONFIG_HID_PANTHERLORD=y
1097# CONFIG_PANTHERLORD_FF is not set
1098CONFIG_HID_PETALYNX=y
1099CONFIG_HID_SAMSUNG=y
1100CONFIG_HID_SONY=y
1101CONFIG_HID_SUNPLUS=y
1102# CONFIG_GREENASIA_FF is not set
1103CONFIG_HID_TOPSEED=y
1104# CONFIG_THRUSTMASTER_FF is not set
1105# CONFIG_ZEROPLUS_FF is not set
1106CONFIG_USB_SUPPORT=y
1107CONFIG_USB_ARCH_HAS_HCD=y
1108CONFIG_USB_ARCH_HAS_OHCI=y
1109CONFIG_USB_ARCH_HAS_EHCI=y
1110CONFIG_USB=y
1111# CONFIG_USB_DEBUG is not set
1112# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1113
1114#
1115# Miscellaneous USB options
1116#
1117CONFIG_USB_DEVICEFS=y
1118CONFIG_USB_DEVICE_CLASS=y
1119# CONFIG_USB_DYNAMIC_MINORS is not set
1120# CONFIG_USB_OTG is not set
1121CONFIG_USB_MON=y
1122# CONFIG_USB_WUSB is not set
1123# CONFIG_USB_WUSB_CBAF is not set
1124
1125#
1126# USB Host Controller Drivers
1127#
1128# CONFIG_USB_C67X00_HCD is not set
1129# CONFIG_USB_EHCI_HCD is not set
1130# CONFIG_USB_OXU210HP_HCD is not set
1131# CONFIG_USB_ISP116X_HCD is not set
1132# CONFIG_USB_ISP1760_HCD is not set
1133CONFIG_USB_OHCI_HCD=y
1134# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1135# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1136# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1137CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1138CONFIG_USB_UHCI_HCD=y
1139# CONFIG_USB_SL811_HCD is not set
1140# CONFIG_USB_R8A66597_HCD is not set
1141# CONFIG_USB_WHCI_HCD is not set
1142# CONFIG_USB_HWA_HCD is not set
1143
1144#
1145# USB Device Class drivers
1146#
1147# CONFIG_USB_ACM is not set
1148# CONFIG_USB_PRINTER is not set
1149# CONFIG_USB_WDM is not set
1150# CONFIG_USB_TMC is not set
1151
1152#
1153# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1154#
1155
1156#
1157# see USB_STORAGE Help for more information
1158#
1159CONFIG_USB_STORAGE=m
1160# CONFIG_USB_STORAGE_DEBUG is not set
1161# CONFIG_USB_STORAGE_DATAFAB is not set
1162# CONFIG_USB_STORAGE_FREECOM is not set
1163# CONFIG_USB_STORAGE_ISD200 is not set
1164# CONFIG_USB_STORAGE_USBAT is not set
1165# CONFIG_USB_STORAGE_SDDR09 is not set
1166# CONFIG_USB_STORAGE_SDDR55 is not set
1167# CONFIG_USB_STORAGE_JUMPSHOT is not set
1168# CONFIG_USB_STORAGE_ALAUDA is not set
1169# CONFIG_USB_STORAGE_ONETOUCH is not set
1170# CONFIG_USB_STORAGE_KARMA is not set
1171# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1172# CONFIG_USB_LIBUSUAL is not set
1173
1174#
1175# USB Imaging devices
1176#
1177# CONFIG_USB_MDC800 is not set
1178# CONFIG_USB_MICROTEK is not set
1179
1180#
1181# USB port drivers
1182#
1183# CONFIG_USB_USS720 is not set
1184# CONFIG_USB_SERIAL is not set
1185
1186#
1187# USB Miscellaneous drivers
1188#
1189# CONFIG_USB_EMI62 is not set
1190# CONFIG_USB_EMI26 is not set
1191# CONFIG_USB_ADUTUX is not set
1192# CONFIG_USB_SEVSEG is not set
1193# CONFIG_USB_RIO500 is not set
1194# CONFIG_USB_LEGOTOWER is not set
1195# CONFIG_USB_LCD is not set
1196# CONFIG_USB_BERRY_CHARGE is not set
1197# CONFIG_USB_LED is not set
1198# CONFIG_USB_CYPRESS_CY7C63 is not set
1199# CONFIG_USB_CYTHERM is not set
1200# CONFIG_USB_PHIDGET is not set
1201# CONFIG_USB_IDMOUSE is not set
1202# CONFIG_USB_FTDI_ELAN is not set
1203# CONFIG_USB_APPLEDISPLAY is not set
1204# CONFIG_USB_LD is not set
1205# CONFIG_USB_TRANCEVIBRATOR is not set
1206# CONFIG_USB_IOWARRIOR is not set
1207# CONFIG_USB_TEST is not set
1208# CONFIG_USB_ISIGHTFW is not set
1209# CONFIG_USB_VST is not set
1210# CONFIG_USB_GADGET is not set
1211
1212#
1213# OTG and related infrastructure
1214#
1215# CONFIG_UWB is not set
1216# CONFIG_MMC is not set
1217# CONFIG_MEMSTICK is not set
1218# CONFIG_NEW_LEDS is not set
1219# CONFIG_ACCESSIBILITY is not set
1220# CONFIG_INFINIBAND is not set
1221# CONFIG_EDAC is not set
1222CONFIG_RTC_LIB=y
1223CONFIG_RTC_CLASS=y
1224CONFIG_RTC_HCTOSYS=y
1225CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1226# CONFIG_RTC_DEBUG is not set
1227
1228#
1229# RTC interfaces
1230#
1231CONFIG_RTC_INTF_SYSFS=y
1232CONFIG_RTC_INTF_PROC=y
1233CONFIG_RTC_INTF_DEV=y
1234# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1235# CONFIG_RTC_DRV_TEST is not set
1236
1237#
1238# I2C RTC drivers
1239#
1240# CONFIG_RTC_DRV_DS1307 is not set
1241# CONFIG_RTC_DRV_DS1374 is not set
1242# CONFIG_RTC_DRV_DS1672 is not set
1243# CONFIG_RTC_DRV_MAX6900 is not set
1244# CONFIG_RTC_DRV_RS5C372 is not set
1245# CONFIG_RTC_DRV_ISL1208 is not set
1246# CONFIG_RTC_DRV_X1205 is not set
1247# CONFIG_RTC_DRV_PCF8563 is not set
1248# CONFIG_RTC_DRV_PCF8583 is not set
1249# CONFIG_RTC_DRV_M41T80 is not set
1250# CONFIG_RTC_DRV_S35390A is not set
1251# CONFIG_RTC_DRV_FM3130 is not set
1252# CONFIG_RTC_DRV_RX8581 is not set
1253
1254#
1255# SPI RTC drivers
1256#
1257
1258#
1259# Platform RTC drivers
1260#
1261CONFIG_RTC_DRV_CMOS=y
1262# CONFIG_RTC_DRV_DS1286 is not set
1263# CONFIG_RTC_DRV_DS1511 is not set
1264# CONFIG_RTC_DRV_DS1553 is not set
1265# CONFIG_RTC_DRV_DS1742 is not set
1266# CONFIG_RTC_DRV_STK17TA8 is not set
1267# CONFIG_RTC_DRV_M48T86 is not set
1268# CONFIG_RTC_DRV_M48T35 is not set
1269# CONFIG_RTC_DRV_M48T59 is not set
1270# CONFIG_RTC_DRV_BQ4802 is not set
1271# CONFIG_RTC_DRV_V3020 is not set
1272
1273#
1274# on-CPU RTC drivers
1275#
1276# CONFIG_RTC_DRV_PPC is not set
1277# CONFIG_DMADEVICES is not set
1278# CONFIG_AUXDISPLAY is not set
1279# CONFIG_UIO is not set
1280# CONFIG_STAGING is not set
1281
1282#
1283# File systems
1284#
1285CONFIG_EXT2_FS=y
1286# CONFIG_EXT2_FS_XATTR is not set
1287# CONFIG_EXT2_FS_XIP is not set
1288CONFIG_EXT3_FS=y
1289CONFIG_EXT3_FS_XATTR=y
1290# CONFIG_EXT3_FS_POSIX_ACL is not set
1291# CONFIG_EXT3_FS_SECURITY is not set
1292CONFIG_EXT4_FS=y
1293# CONFIG_EXT4DEV_COMPAT is not set
1294CONFIG_EXT4_FS_XATTR=y
1295# CONFIG_EXT4_FS_POSIX_ACL is not set
1296# CONFIG_EXT4_FS_SECURITY is not set
1297CONFIG_JBD=y
1298CONFIG_JBD2=y
1299CONFIG_FS_MBCACHE=y
1300# CONFIG_REISERFS_FS is not set
1301# CONFIG_JFS_FS is not set
1302# CONFIG_FS_POSIX_ACL is not set
1303CONFIG_FILE_LOCKING=y
1304# CONFIG_XFS_FS is not set
1305# CONFIG_GFS2_FS is not set
1306# CONFIG_OCFS2_FS is not set
1307# CONFIG_BTRFS_FS is not set
1308CONFIG_DNOTIFY=y
1309CONFIG_INOTIFY=y
1310CONFIG_INOTIFY_USER=y
1311# CONFIG_QUOTA is not set
1312# CONFIG_AUTOFS_FS is not set
1313# CONFIG_AUTOFS4_FS is not set
1314# CONFIG_FUSE_FS is not set
1315
1316#
1317# CD-ROM/DVD Filesystems
1318#
1319CONFIG_ISO9660_FS=y
1320# CONFIG_JOLIET is not set
1321# CONFIG_ZISOFS is not set
1322# CONFIG_UDF_FS is not set
1323
1324#
1325# DOS/FAT/NT Filesystems
1326#
1327CONFIG_FAT_FS=m
1328CONFIG_MSDOS_FS=m
1329CONFIG_VFAT_FS=m
1330CONFIG_FAT_DEFAULT_CODEPAGE=437
1331CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1332# CONFIG_NTFS_FS is not set
1333
1334#
1335# Pseudo filesystems
1336#
1337CONFIG_PROC_FS=y
1338CONFIG_PROC_KCORE=y
1339CONFIG_PROC_SYSCTL=y
1340CONFIG_PROC_PAGE_MONITOR=y
1341CONFIG_SYSFS=y
1342CONFIG_TMPFS=y
1343# CONFIG_TMPFS_POSIX_ACL is not set
1344# CONFIG_HUGETLB_PAGE is not set
1345# CONFIG_CONFIGFS_FS is not set
1346CONFIG_MISC_FILESYSTEMS=y
1347# CONFIG_ADFS_FS is not set
1348CONFIG_AFFS_FS=m
1349# CONFIG_HFS_FS is not set
1350# CONFIG_HFSPLUS_FS is not set
1351# CONFIG_BEFS_FS is not set
1352# CONFIG_BFS_FS is not set
1353# CONFIG_EFS_FS is not set
1354# CONFIG_CRAMFS is not set
1355# CONFIG_SQUASHFS is not set
1356# CONFIG_VXFS_FS is not set
1357# CONFIG_MINIX_FS is not set
1358# CONFIG_OMFS_FS is not set
1359# CONFIG_HPFS_FS is not set
1360# CONFIG_QNX4FS_FS is not set
1361# CONFIG_ROMFS_FS is not set
1362# CONFIG_SYSV_FS is not set
1363# CONFIG_UFS_FS is not set
1364CONFIG_NETWORK_FILESYSTEMS=y
1365# CONFIG_NFS_FS is not set
1366# CONFIG_NFSD is not set
1367# CONFIG_SMB_FS is not set
1368# CONFIG_CIFS is not set
1369# CONFIG_NCP_FS is not set
1370# CONFIG_CODA_FS is not set
1371# CONFIG_AFS_FS is not set
1372
1373#
1374# Partition Types
1375#
1376CONFIG_PARTITION_ADVANCED=y
1377# CONFIG_ACORN_PARTITION is not set
1378# CONFIG_OSF_PARTITION is not set
1379CONFIG_AMIGA_PARTITION=y
1380# CONFIG_ATARI_PARTITION is not set
1381# CONFIG_MAC_PARTITION is not set
1382CONFIG_MSDOS_PARTITION=y
1383# CONFIG_BSD_DISKLABEL is not set
1384# CONFIG_MINIX_SUBPARTITION is not set
1385# CONFIG_SOLARIS_X86_PARTITION is not set
1386# CONFIG_UNIXWARE_DISKLABEL is not set
1387# CONFIG_LDM_PARTITION is not set
1388# CONFIG_SGI_PARTITION is not set
1389# CONFIG_ULTRIX_PARTITION is not set
1390# CONFIG_SUN_PARTITION is not set
1391# CONFIG_KARMA_PARTITION is not set
1392# CONFIG_EFI_PARTITION is not set
1393# CONFIG_SYSV68_PARTITION is not set
1394CONFIG_NLS=y
1395CONFIG_NLS_DEFAULT="iso8859-1"
1396# CONFIG_NLS_CODEPAGE_437 is not set
1397# CONFIG_NLS_CODEPAGE_737 is not set
1398# CONFIG_NLS_CODEPAGE_775 is not set
1399# CONFIG_NLS_CODEPAGE_850 is not set
1400# CONFIG_NLS_CODEPAGE_852 is not set
1401# CONFIG_NLS_CODEPAGE_855 is not set
1402# CONFIG_NLS_CODEPAGE_857 is not set
1403# CONFIG_NLS_CODEPAGE_860 is not set
1404# CONFIG_NLS_CODEPAGE_861 is not set
1405# CONFIG_NLS_CODEPAGE_862 is not set
1406# CONFIG_NLS_CODEPAGE_863 is not set
1407# CONFIG_NLS_CODEPAGE_864 is not set
1408# CONFIG_NLS_CODEPAGE_865 is not set
1409# CONFIG_NLS_CODEPAGE_866 is not set
1410# CONFIG_NLS_CODEPAGE_869 is not set
1411# CONFIG_NLS_CODEPAGE_936 is not set
1412# CONFIG_NLS_CODEPAGE_950 is not set
1413# CONFIG_NLS_CODEPAGE_932 is not set
1414# CONFIG_NLS_CODEPAGE_949 is not set
1415# CONFIG_NLS_CODEPAGE_874 is not set
1416# CONFIG_NLS_ISO8859_8 is not set
1417# CONFIG_NLS_CODEPAGE_1250 is not set
1418# CONFIG_NLS_CODEPAGE_1251 is not set
1419CONFIG_NLS_ASCII=y
1420CONFIG_NLS_ISO8859_1=m
1421# CONFIG_NLS_ISO8859_2 is not set
1422# CONFIG_NLS_ISO8859_3 is not set
1423# CONFIG_NLS_ISO8859_4 is not set
1424# CONFIG_NLS_ISO8859_5 is not set
1425# CONFIG_NLS_ISO8859_6 is not set
1426# CONFIG_NLS_ISO8859_7 is not set
1427# CONFIG_NLS_ISO8859_9 is not set
1428# CONFIG_NLS_ISO8859_13 is not set
1429# CONFIG_NLS_ISO8859_14 is not set
1430# CONFIG_NLS_ISO8859_15 is not set
1431# CONFIG_NLS_KOI8_R is not set
1432# CONFIG_NLS_KOI8_U is not set
1433# CONFIG_NLS_UTF8 is not set
1434# CONFIG_DLM is not set
1435
1436#
1437# Library routines
1438#
1439CONFIG_BITREVERSE=y
1440CONFIG_GENERIC_FIND_LAST_BIT=y
1441CONFIG_CRC_CCITT=m
1442CONFIG_CRC16=y
1443CONFIG_CRC_T10DIF=y
1444# CONFIG_CRC_ITU_T is not set
1445CONFIG_CRC32=y
1446# CONFIG_CRC7 is not set
1447# CONFIG_LIBCRC32C is not set
1448CONFIG_ZLIB_INFLATE=m
1449CONFIG_ZLIB_DEFLATE=m
1450CONFIG_PLIST=y
1451CONFIG_HAS_IOMEM=y
1452CONFIG_HAS_IOPORT=y
1453CONFIG_HAS_DMA=y
1454CONFIG_HAVE_LMB=y
1455
1456#
1457# Kernel hacking
1458#
1459# CONFIG_PRINTK_TIME is not set
1460CONFIG_ENABLE_WARN_DEPRECATED=y
1461CONFIG_ENABLE_MUST_CHECK=y
1462CONFIG_FRAME_WARN=1024
1463CONFIG_MAGIC_SYSRQ=y
1464# CONFIG_UNUSED_SYMBOLS is not set
1465# CONFIG_DEBUG_FS is not set
1466# CONFIG_HEADERS_CHECK is not set
1467CONFIG_DEBUG_KERNEL=y
1468# CONFIG_DEBUG_SHIRQ is not set
1469CONFIG_DETECT_SOFTLOCKUP=y
1470# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1471CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1472CONFIG_SCHED_DEBUG=y
1473# CONFIG_SCHEDSTATS is not set
1474# CONFIG_TIMER_STATS is not set
1475# CONFIG_DEBUG_OBJECTS is not set
1476# CONFIG_SLUB_DEBUG_ON is not set
1477# CONFIG_SLUB_STATS is not set
1478# CONFIG_DEBUG_RT_MUTEXES is not set
1479# CONFIG_RT_MUTEX_TESTER is not set
1480# CONFIG_DEBUG_SPINLOCK is not set
1481CONFIG_DEBUG_MUTEXES=y
1482CONFIG_DEBUG_SPINLOCK_SLEEP=y
1483# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1484# CONFIG_DEBUG_KOBJECT is not set
1485# CONFIG_DEBUG_HIGHMEM is not set
1486CONFIG_DEBUG_BUGVERBOSE=y
1487# CONFIG_DEBUG_INFO is not set
1488# CONFIG_DEBUG_VM is not set
1489# CONFIG_DEBUG_WRITECOUNT is not set
1490CONFIG_DEBUG_MEMORY_INIT=y
1491# CONFIG_DEBUG_LIST is not set
1492# CONFIG_DEBUG_SG is not set
1493# CONFIG_DEBUG_NOTIFIERS is not set
1494# CONFIG_BOOT_PRINTK_DELAY is not set
1495# CONFIG_RCU_TORTURE_TEST is not set
1496# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1497# CONFIG_BACKTRACE_SELF_TEST is not set
1498# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1499# CONFIG_FAULT_INJECTION is not set
1500# CONFIG_LATENCYTOP is not set
1501CONFIG_SYSCTL_SYSCALL_CHECK=y
1502CONFIG_HAVE_FUNCTION_TRACER=y
1503CONFIG_HAVE_DYNAMIC_FTRACE=y
1504CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1505
1506#
1507# Tracers
1508#
1509# CONFIG_FUNCTION_TRACER is not set
1510# CONFIG_SCHED_TRACER is not set
1511# CONFIG_CONTEXT_SWITCH_TRACER is not set
1512# CONFIG_BOOT_TRACER is not set
1513# CONFIG_TRACE_BRANCH_PROFILING is not set
1514# CONFIG_STACK_TRACER is not set
1515# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1516# CONFIG_SAMPLES is not set
1517CONFIG_HAVE_ARCH_KGDB=y
1518# CONFIG_KGDB is not set
1519CONFIG_PRINT_STACK_DEPTH=64
1520# CONFIG_DEBUG_STACKOVERFLOW is not set
1521# CONFIG_DEBUG_STACK_USAGE is not set
1522# CONFIG_DEBUG_PAGEALLOC is not set
1523# CONFIG_CODE_PATCHING_SELFTEST is not set
1524# CONFIG_FTR_FIXUP_SELFTEST is not set
1525# CONFIG_MSI_BITMAP_SELFTEST is not set
1526CONFIG_XMON=y
1527CONFIG_XMON_DEFAULT=y
1528CONFIG_XMON_DISASSEMBLY=y
1529CONFIG_DEBUGGER=y
1530CONFIG_IRQSTACKS=y
1531# CONFIG_BDI_SWITCH is not set
1532# CONFIG_BOOTX_TEXT is not set
1533# CONFIG_PPC_EARLY_DEBUG is not set
1534
1535#
1536# Security options
1537#
1538# CONFIG_KEYS is not set
1539# CONFIG_SECURITY is not set
1540# CONFIG_SECURITYFS is not set
1541# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1542CONFIG_CRYPTO=y
1543
1544#
1545# Crypto core or helper
1546#
1547# CONFIG_CRYPTO_FIPS is not set
1548CONFIG_CRYPTO_ALGAPI=m
1549CONFIG_CRYPTO_ALGAPI2=m
1550CONFIG_CRYPTO_AEAD2=m
1551CONFIG_CRYPTO_BLKCIPHER=m
1552CONFIG_CRYPTO_BLKCIPHER2=m
1553CONFIG_CRYPTO_HASH=m
1554CONFIG_CRYPTO_HASH2=m
1555CONFIG_CRYPTO_RNG2=m
1556CONFIG_CRYPTO_MANAGER=m
1557CONFIG_CRYPTO_MANAGER2=m
1558# CONFIG_CRYPTO_GF128MUL is not set
1559# CONFIG_CRYPTO_NULL is not set
1560# CONFIG_CRYPTO_CRYPTD is not set
1561# CONFIG_CRYPTO_AUTHENC is not set
1562# CONFIG_CRYPTO_TEST is not set
1563
1564#
1565# Authenticated Encryption with Associated Data
1566#
1567# CONFIG_CRYPTO_CCM is not set
1568# CONFIG_CRYPTO_GCM is not set
1569# CONFIG_CRYPTO_SEQIV is not set
1570
1571#
1572# Block modes
1573#
1574CONFIG_CRYPTO_CBC=m
1575# CONFIG_CRYPTO_CTR is not set
1576# CONFIG_CRYPTO_CTS is not set
1577CONFIG_CRYPTO_ECB=m
1578# CONFIG_CRYPTO_LRW is not set
1579CONFIG_CRYPTO_PCBC=m
1580# CONFIG_CRYPTO_XTS is not set
1581
1582#
1583# Hash modes
1584#
1585# CONFIG_CRYPTO_HMAC is not set
1586# CONFIG_CRYPTO_XCBC is not set
1587
1588#
1589# Digest
1590#
1591# CONFIG_CRYPTO_CRC32C is not set
1592# CONFIG_CRYPTO_MD4 is not set
1593# CONFIG_CRYPTO_MD5 is not set
1594# CONFIG_CRYPTO_MICHAEL_MIC is not set
1595# CONFIG_CRYPTO_RMD128 is not set
1596# CONFIG_CRYPTO_RMD160 is not set
1597# CONFIG_CRYPTO_RMD256 is not set
1598# CONFIG_CRYPTO_RMD320 is not set
1599CONFIG_CRYPTO_SHA1=m
1600# CONFIG_CRYPTO_SHA256 is not set
1601# CONFIG_CRYPTO_SHA512 is not set
1602# CONFIG_CRYPTO_TGR192 is not set
1603# CONFIG_CRYPTO_WP512 is not set
1604
1605#
1606# Ciphers
1607#
1608# CONFIG_CRYPTO_AES is not set
1609# CONFIG_CRYPTO_ANUBIS is not set
1610CONFIG_CRYPTO_ARC4=m
1611# CONFIG_CRYPTO_BLOWFISH is not set
1612# CONFIG_CRYPTO_CAMELLIA is not set
1613# CONFIG_CRYPTO_CAST5 is not set
1614# CONFIG_CRYPTO_CAST6 is not set
1615# CONFIG_CRYPTO_DES is not set
1616# CONFIG_CRYPTO_FCRYPT is not set
1617# CONFIG_CRYPTO_KHAZAD is not set
1618# CONFIG_CRYPTO_SALSA20 is not set
1619# CONFIG_CRYPTO_SEED is not set
1620# CONFIG_CRYPTO_SERPENT is not set
1621# CONFIG_CRYPTO_TEA is not set
1622# CONFIG_CRYPTO_TWOFISH is not set
1623
1624#
1625# Compression
1626#
1627# CONFIG_CRYPTO_DEFLATE is not set
1628# CONFIG_CRYPTO_LZO is not set
1629
1630#
1631# Random Number Generation
1632#
1633# CONFIG_CRYPTO_ANSI_CPRNG is not set
1634# CONFIG_CRYPTO_HW is not set
1635# CONFIG_PPC_CLOCK is not set
1636# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 81afc8b373d7..af0cd55605d0 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc2 3# Linux kernel version: 2.6.29-rc3
4# Mon Jan 26 21:40:44 2009 4# Fri Feb 6 09:48:53 2009
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -388,7 +388,10 @@ CONFIG_MTD=y
388CONFIG_MTD_CONCAT=y 388CONFIG_MTD_CONCAT=y
389CONFIG_MTD_PARTITIONS=y 389CONFIG_MTD_PARTITIONS=y
390# CONFIG_MTD_TESTS is not set 390# CONFIG_MTD_TESTS is not set
391# CONFIG_MTD_REDBOOT_PARTS is not set 391CONFIG_MTD_REDBOOT_PARTS=y
392CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
393# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
394# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
392CONFIG_MTD_CMDLINE_PARTS=y 395CONFIG_MTD_CMDLINE_PARTS=y
393# CONFIG_MTD_OF_PARTS is not set 396# CONFIG_MTD_OF_PARTS is not set
394# CONFIG_MTD_AR7_PARTS is not set 397# CONFIG_MTD_AR7_PARTS is not set
@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y
502# 505#
503# EEPROM support 506# EEPROM support
504# 507#
505# CONFIG_EEPROM_AT24 is not set 508CONFIG_EEPROM_AT24=y
506# CONFIG_EEPROM_LEGACY is not set 509# CONFIG_EEPROM_LEGACY is not set
507# CONFIG_EEPROM_93CX6 is not set 510# CONFIG_EEPROM_93CX6 is not set
508CONFIG_HAVE_IDE=y 511CONFIG_HAVE_IDE=y
@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y
678# CONFIG_MARVELL_PHY is not set 681# CONFIG_MARVELL_PHY is not set
679# CONFIG_DAVICOM_PHY is not set 682# CONFIG_DAVICOM_PHY is not set
680# CONFIG_QSEMI_PHY is not set 683# CONFIG_QSEMI_PHY is not set
681# CONFIG_LXT_PHY is not set 684CONFIG_LXT_PHY=y
682# CONFIG_CICADA_PHY is not set 685# CONFIG_CICADA_PHY is not set
683# CONFIG_VITESSE_PHY is not set 686# CONFIG_VITESSE_PHY is not set
684# CONFIG_SMSC_PHY is not set 687# CONFIG_SMSC_PHY is not set
@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256
815# CONFIG_IPMI_HANDLER is not set 818# CONFIG_IPMI_HANDLER is not set
816# CONFIG_HW_RANDOM is not set 819# CONFIG_HW_RANDOM is not set
817# CONFIG_NVRAM is not set 820# CONFIG_NVRAM is not set
818CONFIG_GEN_RTC=y
819# CONFIG_GEN_RTC_X is not set
820# CONFIG_R3964 is not set 821# CONFIG_R3964 is not set
821# CONFIG_APPLICOM is not set 822# CONFIG_APPLICOM is not set
822# CONFIG_RAW_DRIVER is not set 823# CONFIG_RAW_DRIVER is not set
@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y
1281# CONFIG_ACCESSIBILITY is not set 1282# CONFIG_ACCESSIBILITY is not set
1282# CONFIG_INFINIBAND is not set 1283# CONFIG_INFINIBAND is not set
1283# CONFIG_EDAC is not set 1284# CONFIG_EDAC is not set
1284# CONFIG_RTC_CLASS is not set 1285CONFIG_RTC_LIB=y
1286CONFIG_RTC_CLASS=y
1287CONFIG_RTC_HCTOSYS=y
1288CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1289# CONFIG_RTC_DEBUG is not set
1290
1291#
1292# RTC interfaces
1293#
1294CONFIG_RTC_INTF_SYSFS=y
1295CONFIG_RTC_INTF_PROC=y
1296CONFIG_RTC_INTF_DEV=y
1297# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1298# CONFIG_RTC_DRV_TEST is not set
1299
1300#
1301# I2C RTC drivers
1302#
1303CONFIG_RTC_DRV_DS1307=y
1304# CONFIG_RTC_DRV_DS1374 is not set
1305# CONFIG_RTC_DRV_DS1672 is not set
1306# CONFIG_RTC_DRV_MAX6900 is not set
1307# CONFIG_RTC_DRV_RS5C372 is not set
1308# CONFIG_RTC_DRV_ISL1208 is not set
1309# CONFIG_RTC_DRV_X1205 is not set
1310# CONFIG_RTC_DRV_PCF8563 is not set
1311# CONFIG_RTC_DRV_PCF8583 is not set
1312# CONFIG_RTC_DRV_M41T80 is not set
1313# CONFIG_RTC_DRV_S35390A is not set
1314# CONFIG_RTC_DRV_FM3130 is not set
1315# CONFIG_RTC_DRV_RX8581 is not set
1316
1317#
1318# SPI RTC drivers
1319#
1320
1321#
1322# Platform RTC drivers
1323#
1324# CONFIG_RTC_DRV_CMOS is not set
1325# CONFIG_RTC_DRV_DS1286 is not set
1326# CONFIG_RTC_DRV_DS1511 is not set
1327# CONFIG_RTC_DRV_DS1553 is not set
1328# CONFIG_RTC_DRV_DS1742 is not set
1329# CONFIG_RTC_DRV_STK17TA8 is not set
1330# CONFIG_RTC_DRV_M48T86 is not set
1331# CONFIG_RTC_DRV_M48T35 is not set
1332# CONFIG_RTC_DRV_M48T59 is not set
1333# CONFIG_RTC_DRV_BQ4802 is not set
1334# CONFIG_RTC_DRV_V3020 is not set
1335
1336#
1337# on-CPU RTC drivers
1338#
1339# CONFIG_RTC_DRV_PPC is not set
1285# CONFIG_DMADEVICES is not set 1340# CONFIG_DMADEVICES is not set
1286# CONFIG_UIO is not set 1341# CONFIG_UIO is not set
1287# CONFIG_STAGING is not set 1342# CONFIG_STAGING is not set
diff --git a/arch/powerpc/include/asm/bootx.h b/arch/powerpc/include/asm/bootx.h
index 57b82e3f89ce..60a3c9ef3017 100644
--- a/arch/powerpc/include/asm/bootx.h
+++ b/arch/powerpc/include/asm/bootx.h
@@ -9,7 +9,7 @@
9#ifndef __ASM_BOOTX_H__ 9#ifndef __ASM_BOOTX_H__
10#define __ASM_BOOTX_H__ 10#define __ASM_BOOTX_H__
11 11
12#include <asm/types.h> 12#include <linux/types.h>
13 13
14#ifdef macintosh 14#ifdef macintosh
15#include <Types.h> 15#include <Types.h>
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 107d9b915e33..37c32aba79b7 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -11,9 +11,7 @@
11 */ 11 */
12 12
13#include <asm/types.h> 13#include <asm/types.h>
14 14#include <asm/ppc-opcode.h>
15#define PPC_NOP_INSTR 0x60000000
16#define PPC_LWSYNC_INSTR 0x7c2004ac
17 15
18/* Flags for create_branch: 16/* Flags for create_branch:
19 * "b" == create_branch(addr, target, 0); 17 * "b" == create_branch(addr, target, 0);
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 21172badd708..80f315e8a421 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -145,6 +145,7 @@ extern const char *powerpc_base_platform;
145#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) 145#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040)
146#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) 146#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080)
147#define CPU_FTR_601 ASM_CONST(0x0000000000000100) 147#define CPU_FTR_601 ASM_CONST(0x0000000000000100)
148#define CPU_FTR_DBELL ASM_CONST(0x0000000000000200)
148#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) 149#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400)
149#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) 150#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800)
150#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) 151#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000)
@@ -375,7 +376,8 @@ extern const char *powerpc_base_platform;
375 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) 376 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
376#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ 377#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
377 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ 378 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
378 CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE) 379 CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
380 CPU_FTR_DBELL)
379#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) 381#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
380 382
381/* 64-bit CPUs */ 383/* 64-bit CPUs */
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
new file mode 100644
index 000000000000..501189a543d1
--- /dev/null
+++ b/arch/powerpc/include/asm/dbell.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright 2009 Freescale Semicondutor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * provides masks and opcode images for use by code generation, emulation
10 * and for instructions that older assemblers might not know about
11 */
12#ifndef _ASM_POWERPC_DBELL_H
13#define _ASM_POWERPC_DBELL_H
14
15#include <linux/smp.h>
16#include <linux/threads.h>
17
18#include <asm/ppc-opcode.h>
19
20#define PPC_DBELL_MSG_BRDCAST (0x04000000)
21#define PPC_DBELL_TYPE(x) (((x) & 0xf) << 28)
22enum ppc_dbell {
23 PPC_DBELL = 0, /* doorbell */
24 PPC_DBELL_CRIT = 1, /* critical doorbell */
25 PPC_G_DBELL = 2, /* guest doorbell */
26 PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */
27 PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */
28};
29
30#ifdef CONFIG_SMP
31extern unsigned long dbell_smp_message[NR_CPUS];
32extern void smp_dbell_message_pass(int target, int msg);
33#endif
34
35static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)
36{
37 u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) |
38 (tag & 0x07ffffff);
39
40 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
41}
42
43#endif /* _ASM_POWERPC_DBELL_H */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index cd46f023ec6d..1a856b15226e 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -7,7 +7,8 @@
7#include <asm/string.h> 7#include <asm/string.h>
8#endif 8#endif
9 9
10#include <asm/types.h> 10#include <linux/types.h>
11
11#include <asm/ptrace.h> 12#include <asm/ptrace.h>
12#include <asm/cputable.h> 13#include <asm/cputable.h>
13#include <asm/auxvec.h> 14#include <asm/auxvec.h>
@@ -178,7 +179,8 @@ typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
178 the loader. We need to make sure that it is out of the way of the program 179 the loader. We need to make sure that it is out of the way of the program
179 that it will "exec", and that there is sufficient room for the brk. */ 180 that it will "exec", and that there is sufficient room for the brk. */
180 181
181#define ELF_ET_DYN_BASE (0x20000000) 182extern unsigned long randomize_et_dyn(unsigned long base);
183#define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000))
182 184
183/* 185/*
184 * Our registers are always unsigned longs, whether we're a 32 bit 186 * Our registers are always unsigned longs, whether we're a 32 bit
@@ -270,6 +272,14 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
270 int uses_interp); 272 int uses_interp);
271#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); 273#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
272 274
275/* 1GB for 64bit, 8MB for 32bit */
276#define STACK_RND_MASK (is_32bit_task() ? \
277 (0x7ff >> (PAGE_SHIFT - 12)) : \
278 (0x3ffff >> (PAGE_SHIFT - 12)))
279
280extern unsigned long arch_randomize_brk(struct mm_struct *mm);
281#define arch_randomize_brk arch_randomize_brk
282
273#endif /* __KERNEL__ */ 283#endif /* __KERNEL__ */
274 284
275/* 285/*
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index e5f2ae8362f7..dde1296b8b41 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -5,7 +5,44 @@
5#define MCOUNT_ADDR ((long)(_mcount)) 5#define MCOUNT_ADDR ((long)(_mcount))
6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ 6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
7 7
8#ifndef __ASSEMBLY__ 8#ifdef __ASSEMBLY__
9
10/* Based off of objdump optput from glibc */
11
12#define MCOUNT_SAVE_FRAME \
13 stwu r1,-48(r1); \
14 stw r3, 12(r1); \
15 stw r4, 16(r1); \
16 stw r5, 20(r1); \
17 stw r6, 24(r1); \
18 mflr r3; \
19 lwz r4, 52(r1); \
20 mfcr r5; \
21 stw r7, 28(r1); \
22 stw r8, 32(r1); \
23 stw r9, 36(r1); \
24 stw r10,40(r1); \
25 stw r3, 44(r1); \
26 stw r5, 8(r1)
27
28#define MCOUNT_RESTORE_FRAME \
29 lwz r6, 8(r1); \
30 lwz r0, 44(r1); \
31 lwz r3, 12(r1); \
32 mtctr r0; \
33 lwz r4, 16(r1); \
34 mtcr r6; \
35 lwz r5, 20(r1); \
36 lwz r6, 24(r1); \
37 lwz r0, 52(r1); \
38 lwz r7, 28(r1); \
39 lwz r8, 32(r1); \
40 mtlr r0; \
41 lwz r9, 36(r1); \
42 lwz r10,40(r1); \
43 addi r1, r1, 48
44
45#else /* !__ASSEMBLY__ */
9extern void _mcount(void); 46extern void _mcount(void);
10 47
11#ifdef CONFIG_DYNAMIC_FTRACE 48#ifdef CONFIG_DYNAMIC_FTRACE
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 04e4a620952e..545028f86488 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -39,15 +39,15 @@ extern pte_t *pkmap_page_table;
39 * chunk of RAM. 39 * chunk of RAM.
40 */ 40 */
41/* 41/*
42 * We use one full pte table with 4K pages. And with 16K/64K pages pte 42 * We use one full pte table with 4K pages. And with 16K/64K/256K pages pte
43 * table covers enough memory (32MB and 512MB resp.) that both FIXMAP 43 * table covers enough memory (32MB/512MB/2GB resp.), so that both FIXMAP
44 * and PKMAP can be placed in single pte table. We use 1024 pages for 44 * and PKMAP can be placed in a single pte table. We use 512 pages for PKMAP
45 * PKMAP in case of 16K/64K pages. 45 * in case of 16K/64K/256K page sizes.
46 */ 46 */
47#ifdef CONFIG_PPC_4K_PAGES 47#ifdef CONFIG_PPC_4K_PAGES
48#define PKMAP_ORDER PTE_SHIFT 48#define PKMAP_ORDER PTE_SHIFT
49#else 49#else
50#define PKMAP_ORDER 10 50#define PKMAP_ORDER 9
51#endif 51#endif
52#define LAST_PKMAP (1 << PKMAP_ORDER) 52#define LAST_PKMAP (1 << PKMAP_ORDER)
53#ifndef CONFIG_PPC_4K_PAGES 53#ifndef CONFIG_PPC_4K_PAGES
@@ -99,7 +99,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
99#ifdef CONFIG_DEBUG_HIGHMEM 99#ifdef CONFIG_DEBUG_HIGHMEM
100 BUG_ON(!pte_none(*(kmap_pte-idx))); 100 BUG_ON(!pte_none(*(kmap_pte-idx)));
101#endif 101#endif
102 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); 102 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1);
103 local_flush_tlb_page(NULL, vaddr); 103 local_flush_tlb_page(NULL, vaddr);
104 104
105 return (void*) vaddr; 105 return (void*) vaddr;
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index f75a5fc64d2e..b7e034b0a6dd 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -129,7 +129,7 @@ static inline int irqs_disabled_flags(unsigned long flags)
129 * interrupt-retrigger: should we handle this via lost interrupts and IPIs 129 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
130 * or should we not care like we do now ? --BenH. 130 * or should we not care like we do now ? --BenH.
131 */ 131 */
132struct hw_interrupt_type; 132struct irq_chip;
133 133
134#endif /* __KERNEL__ */ 134#endif /* __KERNEL__ */
135#endif /* _ASM_POWERPC_HW_IRQ_H */ 135#endif /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 494cd8b0a278..001f2f11c19b 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -632,6 +632,9 @@ static inline void iosync(void)
632 * ioremap_flags and cannot be hooked (but can be used by a hook on one 632 * ioremap_flags and cannot be hooked (but can be used by a hook on one
633 * of the previous ones) 633 * of the previous ones)
634 * 634 *
635 * * __ioremap_caller is the same as above but takes an explicit caller
636 * reference rather than using __builtin_return_address(0)
637 *
635 * * __iounmap, is the low level implementation used by iounmap and cannot 638 * * __iounmap, is the low level implementation used by iounmap and cannot
636 * be hooked (but can be used by a hook on iounmap) 639 * be hooked (but can be used by a hook on iounmap)
637 * 640 *
@@ -646,6 +649,9 @@ extern void iounmap(volatile void __iomem *addr);
646 649
647extern void __iomem *__ioremap(phys_addr_t, unsigned long size, 650extern void __iomem *__ioremap(phys_addr_t, unsigned long size,
648 unsigned long flags); 651 unsigned long flags);
652extern void __iomem *__ioremap_caller(phys_addr_t, unsigned long size,
653 unsigned long flags, void *caller);
654
649extern void __iounmap(volatile void __iomem *addr); 655extern void __iounmap(volatile void __iomem *addr);
650 656
651extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, 657extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea,
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index f993e4198d5c..4e0cf65f7f5a 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -20,7 +20,7 @@
20#ifndef __LINUX_KVM_POWERPC_H 20#ifndef __LINUX_KVM_POWERPC_H
21#define __LINUX_KVM_POWERPC_H 21#define __LINUX_KVM_POWERPC_H
22 22
23#include <asm/types.h> 23#include <linux/types.h>
24 24
25struct kvm_regs { 25struct kvm_regs {
26 __u64 pc; 26 __u64 pc;
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 2740c44ff717..0efdb1dfdc5f 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -90,7 +90,7 @@ struct machdep_calls {
90 void (*tce_flush)(struct iommu_table *tbl); 90 void (*tce_flush)(struct iommu_table *tbl);
91 91
92 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, 92 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
93 unsigned long flags); 93 unsigned long flags, void *caller);
94 void (*iounmap)(volatile void __iomem *token); 94 void (*iounmap)(volatile void __iomem *token);
95 95
96#ifdef CONFIG_PM 96#ifdef CONFIG_PM
@@ -327,8 +327,6 @@ extern void __devinit smp_generic_take_timebase(void);
327 */ 327 */
328/* Print a boot progress message. */ 328/* Print a boot progress message. */
329void ppc64_boot_msg(unsigned int src, const char *msg); 329void ppc64_boot_msg(unsigned int src, const char *msg);
330/* Print a termination message (print only -- does not stop the kernel) */
331void ppc64_terminate_msg(unsigned int src, const char *msg);
332 330
333static inline void log_error(char *buf, unsigned int err_type, int fatal) 331static inline void log_error(char *buf, unsigned int err_type, int fatal)
334{ 332{
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/mmu-44x.h
index 27cc6fdcd3b7..3c86576bfefa 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/mmu-44x.h
@@ -83,6 +83,8 @@ typedef struct {
83#define PPC44x_TLBE_SIZE PPC44x_TLB_16K 83#define PPC44x_TLBE_SIZE PPC44x_TLB_16K
84#elif (PAGE_SHIFT == 16) 84#elif (PAGE_SHIFT == 16)
85#define PPC44x_TLBE_SIZE PPC44x_TLB_64K 85#define PPC44x_TLBE_SIZE PPC44x_TLB_64K
86#elif (PAGE_SHIFT == 18)
87#define PPC44x_TLBE_SIZE PPC44x_TLB_256K
86#else 88#else
87#error "Unsupported PAGE_SIZE" 89#error "Unsupported PAGE_SIZE"
88#endif 90#endif
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-book3e.h
index 3f941c0f7e8e..c5363c3a7207 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -1,26 +1,42 @@
1#ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ 1#ifndef _ASM_POWERPC_MMU_BOOK3E_H_
2#define _ASM_POWERPC_MMU_FSL_BOOKE_H_ 2#define _ASM_POWERPC_MMU_BOOK3E_H_
3/* 3/*
4 * Freescale Book-E MMU support 4 * Freescale Book-E/Book-3e (ISA 2.06+) MMU support
5 */ 5 */
6 6
7/* Book-E defined page sizes */ 7/* Book-3e defined page sizes */
8#define BOOKE_PAGESZ_1K 0 8#define BOOK3E_PAGESZ_1K 0
9#define BOOKE_PAGESZ_4K 1 9#define BOOK3E_PAGESZ_2K 1
10#define BOOKE_PAGESZ_16K 2 10#define BOOK3E_PAGESZ_4K 2
11#define BOOKE_PAGESZ_64K 3 11#define BOOK3E_PAGESZ_8K 3
12#define BOOKE_PAGESZ_256K 4 12#define BOOK3E_PAGESZ_16K 4
13#define BOOKE_PAGESZ_1M 5 13#define BOOK3E_PAGESZ_32K 5
14#define BOOKE_PAGESZ_4M 6 14#define BOOK3E_PAGESZ_64K 6
15#define BOOKE_PAGESZ_16M 7 15#define BOOK3E_PAGESZ_128K 7
16#define BOOKE_PAGESZ_64M 8 16#define BOOK3E_PAGESZ_256K 8
17#define BOOKE_PAGESZ_256M 9 17#define BOOK3E_PAGESZ_512K 9
18#define BOOKE_PAGESZ_1GB 10 18#define BOOK3E_PAGESZ_1M 10
19#define BOOKE_PAGESZ_4GB 11 19#define BOOK3E_PAGESZ_2M 11
20#define BOOKE_PAGESZ_16GB 12 20#define BOOK3E_PAGESZ_4M 12
21#define BOOKE_PAGESZ_64GB 13 21#define BOOK3E_PAGESZ_8M 13
22#define BOOKE_PAGESZ_256GB 14 22#define BOOK3E_PAGESZ_16M 14
23#define BOOKE_PAGESZ_1TB 15 23#define BOOK3E_PAGESZ_32M 15
24#define BOOK3E_PAGESZ_64M 16
25#define BOOK3E_PAGESZ_128M 17
26#define BOOK3E_PAGESZ_256M 18
27#define BOOK3E_PAGESZ_512M 19
28#define BOOK3E_PAGESZ_1GB 20
29#define BOOK3E_PAGESZ_2GB 21
30#define BOOK3E_PAGESZ_4GB 22
31#define BOOK3E_PAGESZ_8GB 23
32#define BOOK3E_PAGESZ_16GB 24
33#define BOOK3E_PAGESZ_32GB 25
34#define BOOK3E_PAGESZ_64GB 26
35#define BOOK3E_PAGESZ_128GB 27
36#define BOOK3E_PAGESZ_256GB 28
37#define BOOK3E_PAGESZ_512GB 29
38#define BOOK3E_PAGESZ_1TB 30
39#define BOOK3E_PAGESZ_2TB 31
24 40
25#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) 41#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
26#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) 42#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
@@ -29,8 +45,9 @@
29#define MAS1_VALID 0x80000000 45#define MAS1_VALID 0x80000000
30#define MAS1_IPROT 0x40000000 46#define MAS1_IPROT 0x40000000
31#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) 47#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
48#define MAS1_IND 0x00002000
32#define MAS1_TS 0x00001000 49#define MAS1_TS 0x00001000
33#define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) 50#define MAS1_TSIZE(x) ((x << 7) & 0x00000F80)
34 51
35#define MAS2_EPN 0xFFFFF000 52#define MAS2_EPN 0xFFFFF000
36#define MAS2_X0 0x00000040 53#define MAS2_X0 0x00000040
@@ -40,7 +57,7 @@
40#define MAS2_M 0x00000004 57#define MAS2_M 0x00000004
41#define MAS2_G 0x00000002 58#define MAS2_G 0x00000002
42#define MAS2_E 0x00000001 59#define MAS2_E 0x00000001
43#define MAS2_EPN_MASK(size) (~0 << (2*(size) + 10)) 60#define MAS2_EPN_MASK(size) (~0 << (size + 10))
44#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags)) 61#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags))
45 62
46#define MAS3_RPN 0xFFFFF000 63#define MAS3_RPN 0xFFFFF000
@@ -56,7 +73,7 @@
56#define MAS3_SR 0x00000001 73#define MAS3_SR 0x00000001
57 74
58#define MAS4_TLBSELD(x) MAS0_TLBSEL(x) 75#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
59#define MAS4_TIDDSEL 0x000F0000 76#define MAS4_INDD 0x00008000
60#define MAS4_TSIZED(x) MAS1_TSIZE(x) 77#define MAS4_TSIZED(x) MAS1_TSIZE(x)
61#define MAS4_X0D 0x00000040 78#define MAS4_X0D 0x00000040
62#define MAS4_X1D 0x00000020 79#define MAS4_X1D 0x00000020
@@ -68,6 +85,7 @@
68 85
69#define MAS6_SPID0 0x3FFF0000 86#define MAS6_SPID0 0x3FFF0000
70#define MAS6_SPID1 0x00007FFE 87#define MAS6_SPID1 0x00007FFE
88#define MAS6_ISIZE(x) MAS1_TSIZE(x)
71#define MAS6_SAS 0x00000001 89#define MAS6_SAS 0x00000001
72#define MAS6_SPID MAS6_SPID0 90#define MAS6_SPID MAS6_SPID0
73 91
@@ -82,4 +100,4 @@ typedef struct {
82} mm_context_t; 100} mm_context_t;
83#endif /* !__ASSEMBLY__ */ 101#endif /* !__ASSEMBLY__ */
84 102
85#endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ 103#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 6e7639911318..dc82dcd06aea 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -36,9 +36,9 @@
36 */ 36 */
37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) 37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
38 38
39/* Enable use of tlbilx invalidate-by-PID variant. 39/* Enable use of tlbilx invalidate instructions.
40 */ 40 */
41#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000) 41#define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000)
42 42
43/* This indicates that the processor cannot handle multiple outstanding 43/* This indicates that the processor cannot handle multiple outstanding
44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock 44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock
@@ -71,9 +71,9 @@ extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
71#elif defined(CONFIG_44x) 71#elif defined(CONFIG_44x)
72/* 44x-style software loaded TLB */ 72/* 44x-style software loaded TLB */
73# include <asm/mmu-44x.h> 73# include <asm/mmu-44x.h>
74#elif defined(CONFIG_FSL_BOOKE) 74#elif defined(CONFIG_PPC_BOOK3E_MMU)
75/* Freescale Book-E software loaded TLB */ 75/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
76# include <asm/mmu-fsl-booke.h> 76# include <asm/mmu-book3e.h>
77#elif defined (CONFIG_PPC_8xx) 77#elif defined (CONFIG_PPC_8xx)
78/* Motorola/Freescale 8xx software loaded TLB */ 78/* Motorola/Freescale 8xx software loaded TLB */
79# include <asm/mmu-8xx.h> 79# include <asm/mmu-8xx.h>
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h
index 81a23932a160..52e049cd9e68 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -273,6 +273,7 @@ extern void mpc5200_setup_xlb_arbiter(void);
273extern void mpc52xx_declare_of_platform_devices(void); 273extern void mpc52xx_declare_of_platform_devices(void);
274extern void mpc52xx_map_common_devices(void); 274extern void mpc52xx_map_common_devices(void);
275extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); 275extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
276extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
276extern void mpc52xx_restart(char *cmd); 277extern void mpc52xx_restart(char *cmd);
277 278
278/* mpc52xx_pic.c */ 279/* mpc52xx_pic.c */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 197d569f5bd3..32cbf16f10ea 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -19,12 +19,14 @@
19#include <asm/kdump.h> 19#include <asm/kdump.h>
20 20
21/* 21/*
22 * On regular PPC32 page size is 4K (but we support 4K/16K/64K pages 22 * On regular PPC32 page size is 4K (but we support 4K/16K/64K/256K pages
23 * on PPC44x). For PPC64 we support either 4K or 64K software 23 * on PPC44x). For PPC64 we support either 4K or 64K software
24 * page size. When using 64K pages however, whether we are really supporting 24 * page size. When using 64K pages however, whether we are really supporting
25 * 64K pages in HW or not is irrelevant to those definitions. 25 * 64K pages in HW or not is irrelevant to those definitions.
26 */ 26 */
27#if defined(CONFIG_PPC_64K_PAGES) 27#if defined(CONFIG_PPC_256K_PAGES)
28#define PAGE_SHIFT 18
29#elif defined(CONFIG_PPC_64K_PAGES)
28#define PAGE_SHIFT 16 30#define PAGE_SHIFT 16
29#elif defined(CONFIG_PPC_16K_PAGES) 31#elif defined(CONFIG_PPC_16K_PAGES)
30#define PAGE_SHIFT 14 32#define PAGE_SHIFT 14
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index 1458d9500381..a0e3f6e6b4ee 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -19,7 +19,11 @@
19#define PTE_FLAGS_OFFSET 0 19#define PTE_FLAGS_OFFSET 0
20#endif 20#endif
21 21
22#ifdef CONFIG_PPC_256K_PAGES
23#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */
24#else
22#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ 25#define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */
26#endif
23 27
24#ifndef __ASSEMBLY__ 28#ifndef __ASSEMBLY__
25/* 29/*
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 820b5f0a35ce..67ceffc01b43 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -19,55 +19,6 @@ extern int icache_44x_need_flush;
19#endif /* __ASSEMBLY__ */ 19#endif /* __ASSEMBLY__ */
20 20
21/* 21/*
22 * The PowerPC MMU uses a hash table containing PTEs, together with
23 * a set of 16 segment registers (on 32-bit implementations), to define
24 * the virtual to physical address mapping.
25 *
26 * We use the hash table as an extended TLB, i.e. a cache of currently
27 * active mappings. We maintain a two-level page table tree, much
28 * like that used by the i386, for the sake of the Linux memory
29 * management code. Low-level assembler code in hashtable.S
30 * (procedure hash_page) is responsible for extracting ptes from the
31 * tree and putting them into the hash table when necessary, and
32 * updating the accessed and modified bits in the page table tree.
33 */
34
35/*
36 * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
37 * We also use the two level tables, but we can put the real bits in them
38 * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0,
39 * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has
40 * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
41 * based upon user/super access. The TLB does not have accessed nor write
42 * protect. We assume that if the TLB get loaded with an entry it is
43 * accessed, and overload the changed bit for write protect. We use
44 * two bits in the software pte that are supposed to be set to zero in
45 * the TLB entry (24 and 25) for these indicators. Although the level 1
46 * descriptor contains the guarded and writethrough/copyback bits, we can
47 * set these at the page level since they get copied from the Mx_TWC
48 * register when the TLB entry is loaded. We will use bit 27 for guard, since
49 * that is where it exists in the MD_TWC, and bit 26 for writethrough.
50 * These will get masked from the level 2 descriptor at TLB load time, and
51 * copied to the MD_TWC before it gets loaded.
52 * Large page sizes added. We currently support two sizes, 4K and 8M.
53 * This also allows a TLB hander optimization because we can directly
54 * load the PMD into MD_TWC. The 8M pages are only used for kernel
55 * mapping of well known areas. The PMD (PGD) entries contain control
56 * flags in addition to the address, so care must be taken that the
57 * software no longer assumes these are only pointers.
58 */
59
60/*
61 * At present, all PowerPC 400-class processors share a similar TLB
62 * architecture. The instruction and data sides share a unified,
63 * 64-entry, fully-associative TLB which is maintained totally under
64 * software control. In addition, the instruction side has a
65 * hardware-managed, 4-entry, fully-associative TLB which serves as a
66 * first level to the shared TLB. These two TLBs are known as the UTLB
67 * and ITLB, respectively (see "mmu.h" for definitions).
68 */
69
70/*
71 * The normal case is that PTEs are 32-bits and we have a 1-page 22 * The normal case is that PTEs are 32-bits and we have a 1-page
72 * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus 23 * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus
73 * 24 *
@@ -135,261 +86,25 @@ extern int icache_44x_need_flush;
135 */ 86 */
136 87
137#if defined(CONFIG_40x) 88#if defined(CONFIG_40x)
138 89#include <asm/pte-40x.h>
139/* There are several potential gotchas here. The 40x hardware TLBLO
140 field looks like this:
141
142 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
143 RPN..................... 0 0 EX WR ZSEL....... W I M G
144
145 Where possible we make the Linux PTE bits match up with this
146
147 - bits 20 and 21 must be cleared, because we use 4k pages (40x can
148 support down to 1k pages), this is done in the TLBMiss exception
149 handler.
150 - We use only zones 0 (for kernel pages) and 1 (for user pages)
151 of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
152 miss handler. Bit 27 is PAGE_USER, thus selecting the correct
153 zone.
154 - PRESENT *must* be in the bottom two bits because swap cache
155 entries use the top 30 bits. Because 40x doesn't support SMP
156 anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
157 is cleared in the TLB miss handler before the TLB entry is loaded.
158 - All other bits of the PTE are loaded into TLBLO without
159 modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
160 software PTE bits. We actually use use bits 21, 24, 25, and
161 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
162 PRESENT.
163*/
164
165/* Definitions for 40x embedded chips. */
166#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
167#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
168#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
169#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
170#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
171#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
172#define _PAGE_RW 0x040 /* software: Writes permitted */
173#define _PAGE_DIRTY 0x080 /* software: dirty page */
174#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
175#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
176#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
177
178#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
179#define _PMD_BAD 0x802
180#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */
181#define _PMD_SIZE_4M 0x0c0
182#define _PMD_SIZE_16M 0x0e0
183#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
184
185/* Until my rework is finished, 40x still needs atomic PTE updates */
186#define PTE_ATOMIC_UPDATES 1
187
188#elif defined(CONFIG_44x) 90#elif defined(CONFIG_44x)
189/* 91#include <asm/pte-44x.h>
190 * Definitions for PPC440
191 *
192 * Because of the 3 word TLB entries to support 36-bit addressing,
193 * the attribute are difficult to map in such a fashion that they
194 * are easily loaded during exception processing. I decided to
195 * organize the entry so the ERPN is the only portion in the
196 * upper word of the PTE and the attribute bits below are packed
197 * in as sensibly as they can be in the area below a 4KB page size
198 * oriented RPN. This at least makes it easy to load the RPN and
199 * ERPN fields in the TLB. -Matt
200 *
201 * Note that these bits preclude future use of a page size
202 * less than 4KB.
203 *
204 *
205 * PPC 440 core has following TLB attribute fields;
206 *
207 * TLB1:
208 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
209 * RPN................................. - - - - - - ERPN.......
210 *
211 * TLB2:
212 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
213 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
214 *
215 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
216 * TLB2 storage attibute fields. Those are:
217 *
218 * TLB2:
219 * 0...10 11 12 13 14 15 16...31
220 * no change WL1 IL1I IL1D IL2I IL2D no change
221 *
222 * There are some constrains and options, to decide mapping software bits
223 * into TLB entry.
224 *
225 * - PRESENT *must* be in the bottom three bits because swap cache
226 * entries use the top 29 bits for TLB2.
227 *
228 * - FILE *must* be in the bottom three bits because swap cache
229 * entries use the top 29 bits for TLB2.
230 *
231 * - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
232 * because it doesn't support SMP. However, some later 460 variants
233 * have -some- form of SMP support and so I keep the bit there for
234 * future use
235 *
236 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
237 * for memory protection related functions (see PTE structure in
238 * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
239 * above bits. Note that the bit values are CPU specific, not architecture
240 * specific.
241 *
242 * The kernel PTE entry holds an arch-dependent swp_entry structure under
243 * certain situations. In other words, in such situations some portion of
244 * the PTE bits are used as a swp_entry. In the PPC implementation, the
245 * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
246 * hold protection values. That means the three protection bits are
247 * reserved for both PTE and SWAP entry at the most significant three
248 * LSBs.
249 *
250 * There are three protection bits available for SWAP entry:
251 * _PAGE_PRESENT
252 * _PAGE_FILE
253 * _PAGE_HASHPTE (if HW has)
254 *
255 * So those three bits have to be inside of 0-2nd LSB of PTE.
256 *
257 */
258
259#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
260#define _PAGE_RW 0x00000002 /* S: Write permission */
261#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
262#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
263#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
264#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
265#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
266#define _PAGE_USER 0x00000040 /* S: User page */
267#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
268#define _PAGE_GUARDED 0x00000100 /* H: G bit */
269#define _PAGE_COHERENT 0x00000200 /* H: M bit */
270#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
271#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
272
273/* TODO: Add large page lowmem mapping support */
274#define _PMD_PRESENT 0
275#define _PMD_PRESENT_MASK (PAGE_MASK)
276#define _PMD_BAD (~PAGE_MASK)
277
278/* ERPN in a PTE never gets cleared, ignore it */
279#define _PTE_NONE_MASK 0xffffffff00000000ULL
280
281#define __HAVE_ARCH_PTE_SPECIAL
282
283#elif defined(CONFIG_FSL_BOOKE) 92#elif defined(CONFIG_FSL_BOOKE)
284/* 93#include <asm/pte-fsl-booke.h>
285 MMU Assist Register 3:
286
287 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
288 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
289
290 - PRESENT *must* be in the bottom three bits because swap cache
291 entries use the top 29 bits.
292
293 - FILE *must* be in the bottom three bits because swap cache
294 entries use the top 29 bits.
295*/
296
297/* Definitions for FSL Book-E Cores */
298#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
299#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
300#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
301#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
302#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
303#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
304#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
305
306#define _PAGE_ENDIAN 0x00040 /* H: E bit */
307#define _PAGE_GUARDED 0x00080 /* H: G bit */
308#define _PAGE_COHERENT 0x00100 /* H: M bit */
309#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
310#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
311#define _PAGE_SPECIAL 0x00800 /* S: Special page */
312
313#ifdef CONFIG_PTE_64BIT
314/* ERPN in a PTE never gets cleared, ignore it */
315#define _PTE_NONE_MASK 0xffffffffffff0000ULL
316#endif
317
318#define _PMD_PRESENT 0
319#define _PMD_PRESENT_MASK (PAGE_MASK)
320#define _PMD_BAD (~PAGE_MASK)
321
322#define __HAVE_ARCH_PTE_SPECIAL
323
324#elif defined(CONFIG_8xx) 94#elif defined(CONFIG_8xx)
325/* Definitions for 8xx embedded chips. */ 95#include <asm/pte-8xx.h>
326#define _PAGE_PRESENT 0x0001 /* Page is valid */
327#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
328#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
329#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
330
331/* These five software bits must be masked out when the entry is loaded
332 * into the TLB.
333 */
334#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
335#define _PAGE_GUARDED 0x0010 /* software: guarded access */
336#define _PAGE_DIRTY 0x0020 /* software: page changed */
337#define _PAGE_RW 0x0040 /* software: user write access allowed */
338#define _PAGE_ACCESSED 0x0080 /* software: page referenced */
339
340/* Setting any bits in the nibble with the follow two controls will
341 * require a TLB exception handler change. It is assumed unused bits
342 * are always zero.
343 */
344#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */
345#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */
346
347#define _PMD_PRESENT 0x0001
348#define _PMD_BAD 0x0ff0
349#define _PMD_PAGE_MASK 0x000c
350#define _PMD_PAGE_8M 0x000c
351
352#define _PTE_NONE_MASK _PAGE_ACCESSED
353
354/* Until my rework is finished, 8xx still needs atomic PTE updates */
355#define PTE_ATOMIC_UPDATES 1
356
357#else /* CONFIG_6xx */ 96#else /* CONFIG_6xx */
358/* Definitions for 60x, 740/750, etc. */ 97#include <asm/pte-hash32.h>
359#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
360#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
361#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */
362#define _PAGE_USER 0x004 /* usermode access allowed */
363#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */
364#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
365#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */
366#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
367#define _PAGE_DIRTY 0x080 /* C: page changed */
368#define _PAGE_ACCESSED 0x100 /* R: page referenced */
369#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
370#define _PAGE_RW 0x400 /* software: user write access allowed */
371#define _PAGE_SPECIAL 0x800 /* software: Special page */
372
373#ifdef CONFIG_PTE_64BIT
374/* We never clear the high word of the pte */
375#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
376#else
377#define _PTE_NONE_MASK _PAGE_HASHPTE
378#endif 98#endif
379 99
380#define _PMD_PRESENT 0 100/* If _PAGE_SPECIAL is defined, then we advertise our support for it */
381#define _PMD_PRESENT_MASK (PAGE_MASK) 101#ifdef _PAGE_SPECIAL
382#define _PMD_BAD (~PAGE_MASK)
383
384/* Hash table based platforms need atomic updates of the linux PTE */
385#define PTE_ATOMIC_UPDATES 1
386
387#define __HAVE_ARCH_PTE_SPECIAL 102#define __HAVE_ARCH_PTE_SPECIAL
388
389#endif 103#endif
390 104
391/* 105/*
392 * Some bits are only used on some cpu families... 106 * Some bits are only used on some cpu families... Make sure that all
107 * the undefined gets defined as 0
393 */ 108 */
394#ifndef _PAGE_HASHPTE 109#ifndef _PAGE_HASHPTE
395#define _PAGE_HASHPTE 0 110#define _PAGE_HASHPTE 0
@@ -429,10 +144,31 @@ extern int icache_44x_need_flush;
429#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() 144#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
430#endif 145#endif
431 146
432#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ 147#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
433 _PAGE_SPECIAL) 148
149/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT
150 * here (ie, naturally aligned). Platform who don't just pre-define the
151 * value so we don't override it here
152 */
153#ifndef PTE_RPN_SHIFT
154#define PTE_RPN_SHIFT (PAGE_SHIFT)
155#endif
156
157#ifdef CONFIG_PTE_64BIT
158#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
159#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
160#else
161#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
162#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
163#endif
434 164
165/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
166 * pgprot changes
167 */
168#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
169 _PAGE_ACCESSED | _PAGE_SPECIAL)
435 170
171/* Mask of bits returned by pte_pgprot() */
436#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ 172#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
437 _PAGE_WRITETHRU | _PAGE_ENDIAN | \ 173 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
438 _PAGE_USER | _PAGE_ACCESSED | \ 174 _PAGE_USER | _PAGE_ACCESSED | \
@@ -520,18 +256,10 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
520 * Conversions between PTE values and page frame numbers. 256 * Conversions between PTE values and page frame numbers.
521 */ 257 */
522 258
523/* in some case we want to additionaly adjust where the pfn is in the pte to 259#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
524 * allow room for more flags */
525#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
526#define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8)
527#else
528#define PFN_SHIFT_OFFSET (PAGE_SHIFT)
529#endif
530
531#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET)
532#define pte_page(x) pfn_to_page(pte_pfn(x)) 260#define pte_page(x) pfn_to_page(pte_pfn(x))
533 261
534#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ 262#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
535 pgprot_val(prot)) 263 pgprot_val(prot))
536#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 264#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
537#endif /* __ASSEMBLY__ */ 265#endif /* __ASSEMBLY__ */
@@ -599,11 +327,19 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
599 unsigned long address); 327 unsigned long address);
600 328
601/* 329/*
602 * Atomic PTE updates. 330 * PTE updates. This function is called whenever an existing
331 * valid PTE is updated. This does -not- include set_pte_at()
332 * which nowadays only sets a new PTE.
603 * 333 *
604 * pte_update clears and sets bit atomically, and returns 334 * Depending on the type of MMU, we may need to use atomic updates
605 * the old pte value. In the 64-bit PTE case we lock around the 335 * and the PTE may be either 32 or 64 bit wide. In the later case,
606 * low PTE word since we expect ALL flag bits to be there 336 * when using atomic updates, only the low part of the PTE is
337 * accessed atomically.
338 *
339 * In addition, on 44x, we also maintain a global flag indicating
340 * that an executable user mapping was modified, which is needed
341 * to properly flush the virtually tagged instruction cache of
342 * those implementations.
607 */ 343 */
608#ifndef CONFIG_PTE_64BIT 344#ifndef CONFIG_PTE_64BIT
609static inline unsigned long pte_update(pte_t *p, 345static inline unsigned long pte_update(pte_t *p,
@@ -668,44 +404,6 @@ static inline unsigned long long pte_update(pte_t *p,
668#endif /* CONFIG_PTE_64BIT */ 404#endif /* CONFIG_PTE_64BIT */
669 405
670/* 406/*
671 * set_pte stores a linux PTE into the linux page table.
672 * On machines which use an MMU hash table we avoid changing the
673 * _PAGE_HASHPTE bit.
674 */
675
676static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
677 pte_t *ptep, pte_t pte)
678{
679#if (_PAGE_HASHPTE != 0) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
680 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);
681#elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
682#if _PAGE_HASHPTE != 0
683 if (pte_val(*ptep) & _PAGE_HASHPTE)
684 flush_hash_entry(mm, ptep, addr);
685#endif
686 __asm__ __volatile__("\
687 stw%U0%X0 %2,%0\n\
688 eieio\n\
689 stw%U0%X0 %L2,%1"
690 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
691 : "r" (pte) : "memory");
692#else
693 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
694 | (pte_val(pte) & ~_PAGE_HASHPTE));
695#endif
696}
697
698
699static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
700 pte_t *ptep, pte_t pte)
701{
702#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) && defined(CONFIG_DEBUG_VM)
703 WARN_ON(pte_present(*ptep));
704#endif
705 __set_pte_at(mm, addr, ptep, pte);
706}
707
708/*
709 * 2.6 calls this without flushing the TLB entry; this is wrong 407 * 2.6 calls this without flushing the TLB entry; this is wrong
710 * for our hash-based implementation, we fix that up here. 408 * for our hash-based implementation, we fix that up here.
711 */ 409 */
@@ -745,24 +443,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
745} 443}
746 444
747 445
748#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 446static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
749static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
750{ 447{
751 unsigned long bits = pte_val(entry) & 448 unsigned long bits = pte_val(entry) &
752 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW); 449 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
450 _PAGE_HWEXEC | _PAGE_EXEC);
753 pte_update(ptep, 0, bits); 451 pte_update(ptep, 0, bits);
754} 452}
755 453
756#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
757({ \
758 int __changed = !pte_same(*(__ptep), __entry); \
759 if (__changed) { \
760 __ptep_set_access_flags(__ptep, __entry, __dirty); \
761 flush_tlb_page_nohash(__vma, __address); \
762 } \
763 __changed; \
764})
765
766#define __HAVE_ARCH_PTE_SAME 454#define __HAVE_ARCH_PTE_SAME
767#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) 455#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
768 456
diff --git a/arch/powerpc/include/asm/pgtable-4k.h b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
index 1dbca4e7de67..6eefdcffa359 100644
--- a/arch/powerpc/include/asm/pgtable-4k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_POWERPC_PGTABLE_4K_H 1#ifndef _ASM_POWERPC_PGTABLE_PPC64_4K_H
2#define _ASM_POWERPC_PGTABLE_4K_H 2#define _ASM_POWERPC_PGTABLE_PPC64_4K_H
3/* 3/*
4 * Entries per page directory level. The PTE level must use a 64b record 4 * Entries per page directory level. The PTE level must use a 64b record
5 * for each page table entry. The PMD and PGD level use a 32b record for 5 * for each page table entry. The PMD and PGD level use a 32b record for
@@ -40,28 +40,6 @@
40#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 40#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
41#define PGDIR_MASK (~(PGDIR_SIZE-1)) 41#define PGDIR_MASK (~(PGDIR_SIZE-1))
42 42
43/* PTE bits */
44#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
45#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
46#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
47#define _PAGE_F_SECOND _PAGE_SECONDARY
48#define _PAGE_F_GIX _PAGE_GROUP_IX
49#define _PAGE_SPECIAL 0x10000 /* software: special page */
50#define __HAVE_ARCH_PTE_SPECIAL
51
52/* PTE flags to conserve for HPTE identification */
53#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
54 _PAGE_SECONDARY | _PAGE_GROUP_IX)
55
56/* There is no 4K PFN hack on 4K pages */
57#define _PAGE_4K_PFN 0
58
59/* PAGE_MASK gives the right answer below, but only by accident */
60/* It should be preserving the high 48 bits and then specifically */
61/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
62#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
63 _PAGE_HPTEFLAGS | _PAGE_SPECIAL)
64
65/* Bits to mask out from a PMD to get to the PTE page */ 43/* Bits to mask out from a PMD to get to the PTE page */
66#define PMD_MASKED_BITS 0 44#define PMD_MASKED_BITS 0
67/* Bits to mask out from a PUD to get to the PMD page */ 45/* Bits to mask out from a PUD to get to the PMD page */
@@ -69,30 +47,6 @@
69/* Bits to mask out from a PGD to get to the PUD page */ 47/* Bits to mask out from a PGD to get to the PUD page */
70#define PGD_MASKED_BITS 0 48#define PGD_MASKED_BITS 0
71 49
72/* shift to put page number into pte */
73#define PTE_RPN_SHIFT (17)
74
75#ifdef STRICT_MM_TYPECHECKS
76#define __real_pte(e,p) ((real_pte_t){(e)})
77#define __rpte_to_pte(r) ((r).pte)
78#else
79#define __real_pte(e,p) (e)
80#define __rpte_to_pte(r) (__pte(r))
81#endif
82#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
83
84#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
85 do { \
86 index = 0; \
87 shift = mmu_psize_defs[psize].shift; \
88
89#define pte_iterate_hashed_end() } while(0)
90
91#ifdef CONFIG_PPC_HAS_HASH_64K
92#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
93#else
94#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
95#endif
96 50
97/* 51/*
98 * 4-level page tables related bits 52 * 4-level page tables related bits
@@ -112,6 +66,9 @@
112#define pud_ERROR(e) \ 66#define pud_ERROR(e) \
113 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) 67 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
114 68
69/*
70 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() */
115#define remap_4k_pfn(vma, addr, pfn, prot) \ 71#define remap_4k_pfn(vma, addr, pfn, prot) \
116 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) 72 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
117#endif /* _ASM_POWERPC_PGTABLE_4K_H */ 73
74#endif /* _ASM_POWERPC_PGTABLE_PPC64_4K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
new file mode 100644
index 000000000000..6cc085b945a5
--- /dev/null
+++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_POWERPC_PGTABLE_PPC64_64K_H
2#define _ASM_POWERPC_PGTABLE_PPC64_64K_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6
7#define PTE_INDEX_SIZE 12
8#define PMD_INDEX_SIZE 12
9#define PUD_INDEX_SIZE 0
10#define PGD_INDEX_SIZE 4
11
12#ifndef __ASSEMBLY__
13
14#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE)
15#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
16#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
17
18#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
19#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
20#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
21
22/* With 4k base page size, hugepage PTEs go at the PMD level */
23#define MIN_HUGEPTE_SHIFT PAGE_SHIFT
24
25/* PMD_SHIFT determines what a second-level page table entry can map */
26#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
27#define PMD_SIZE (1UL << PMD_SHIFT)
28#define PMD_MASK (~(PMD_SIZE-1))
29
30/* PGDIR_SHIFT determines what a third-level page table entry can map */
31#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
32#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
33#define PGDIR_MASK (~(PGDIR_SIZE-1))
34
35#endif /* __ASSEMBLY__ */
36
37/* Bits to mask out from a PMD to get to the PTE page */
38#define PMD_MASKED_BITS 0x1ff
39/* Bits to mask out from a PGD/PUD to get to the PMD page */
40#define PUD_MASKED_BITS 0x1ff
41
42#endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index b0f18be81d9f..542073836b29 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -11,9 +11,9 @@
11#endif /* __ASSEMBLY__ */ 11#endif /* __ASSEMBLY__ */
12 12
13#ifdef CONFIG_PPC_64K_PAGES 13#ifdef CONFIG_PPC_64K_PAGES
14#include <asm/pgtable-64k.h> 14#include <asm/pgtable-ppc64-64k.h>
15#else 15#else
16#include <asm/pgtable-4k.h> 16#include <asm/pgtable-ppc64-4k.h>
17#endif 17#endif
18 18
19#define FIRST_USER_ADDRESS 0 19#define FIRST_USER_ADDRESS 0
@@ -25,6 +25,8 @@
25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) 25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) 26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
27 27
28
29/* Some sanity checking */
28#if TASK_SIZE_USER64 > PGTABLE_RANGE 30#if TASK_SIZE_USER64 > PGTABLE_RANGE
29#error TASK_SIZE_USER64 exceeds pagetable range 31#error TASK_SIZE_USER64 exceeds pagetable range
30#endif 32#endif
@@ -33,7 +35,6 @@
33#error TASK_SIZE_USER64 exceeds user VSID range 35#error TASK_SIZE_USER64 exceeds user VSID range
34#endif 36#endif
35 37
36
37/* 38/*
38 * Define the address range of the vmalloc VM area. 39 * Define the address range of the vmalloc VM area.
39 */ 40 */
@@ -76,29 +77,26 @@
76 77
77 78
78/* 79/*
79 * Common bits in a linux-style PTE. These match the bits in the 80 * Include the PTE bits definitions
80 * (hardware-defined) PowerPC PTE as closely as possible. Additional 81 */
81 * bits may be defined in pgtable-*.h 82#include <asm/pte-hash64.h>
83
84/* To make some generic powerpc code happy */
85#ifndef _PAGE_HWEXEC
86#define _PAGE_HWEXEC 0
87#endif
88
89/* Some other useful definitions */
90#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
91#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
92
93/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
94 * pgprot changes
82 */ 95 */
83#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ 96#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
84#define _PAGE_USER 0x0002 /* matches one of the PP bits */ 97 _PAGE_ACCESSED | _PAGE_SPECIAL)
85#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */ 98
86#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */ 99
87#define _PAGE_GUARDED 0x0008
88#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
89#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
90#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
91#define _PAGE_DIRTY 0x0080 /* C: page changed */
92#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
93#define _PAGE_RW 0x0200 /* software: user write access allowed */
94#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
95
96/* Strong Access Ordering */
97#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
98
99#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
100
101#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
102 100
103/* __pgprot defined in arch/powerpc/include/asm/page.h */ 101/* __pgprot defined in arch/powerpc/include/asm/page.h */
104#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) 102#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
@@ -117,13 +115,8 @@
117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) 115#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
118#define HAVE_PAGE_AGP 116#define HAVE_PAGE_AGP
119 117
120#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \ 118/* We always have _PAGE_SPECIAL on 64 bit */
121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ 119#define __HAVE_ARCH_PTE_SPECIAL
122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
124/* PTEIDX nibble */
125#define _PTEIDX_SECONDARY 0x8
126#define _PTEIDX_GROUP_IX 0x7
127 120
128 121
129/* 122/*
@@ -161,6 +154,38 @@
161#ifndef __ASSEMBLY__ 154#ifndef __ASSEMBLY__
162 155
163/* 156/*
157 * This is the default implementation of various PTE accessors, it's
158 * used in all cases except Book3S with 64K pages where we have a
159 * concept of sub-pages
160 */
161#ifndef __real_pte
162
163#ifdef STRICT_MM_TYPECHECKS
164#define __real_pte(e,p) ((real_pte_t){(e)})
165#define __rpte_to_pte(r) ((r).pte)
166#else
167#define __real_pte(e,p) (e)
168#define __rpte_to_pte(r) (__pte(r))
169#endif
170#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
171
172#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
173 do { \
174 index = 0; \
175 shift = mmu_psize_defs[psize].shift; \
176
177#define pte_iterate_hashed_end() } while(0)
178
179#ifdef CONFIG_PPC_HAS_HASH_64K
180#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
181#else
182#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
183#endif
184
185#endif /* __real_pte */
186
187
188/*
164 * Conversion functions: convert a page and protection to a page entry, 189 * Conversion functions: convert a page and protection to a page entry,
165 * and a page entry and page directory to the page they refer to. 190 * and a page entry and page directory to the page they refer to.
166 * 191 *
@@ -285,6 +310,10 @@ static inline unsigned long pte_update(struct mm_struct *mm,
285 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) 310 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
286 : "cc" ); 311 : "cc" );
287 312
313 /* huge pages use the old page table lock */
314 if (!huge)
315 assert_pte_locked(mm, addr);
316
288 if (old & _PAGE_HASHPTE) 317 if (old & _PAGE_HASHPTE)
289 hpte_need_flush(mm, addr, ptep, old, huge); 318 hpte_need_flush(mm, addr, ptep, old, huge);
290 return old; 319 return old;
@@ -359,23 +388,11 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
359 pte_update(mm, addr, ptep, ~0UL, 0); 388 pte_update(mm, addr, ptep, ~0UL, 0);
360} 389}
361 390
362/*
363 * set_pte stores a linux PTE into the linux page table.
364 */
365static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
366 pte_t *ptep, pte_t pte)
367{
368 if (pte_present(*ptep))
369 pte_clear(mm, addr, ptep);
370 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
371 *ptep = pte;
372}
373 391
374/* Set the dirty and/or accessed bits atomically in a linux PTE, this 392/* Set the dirty and/or accessed bits atomically in a linux PTE, this
375 * function doesn't need to flush the hash entry 393 * function doesn't need to flush the hash entry
376 */ 394 */
377#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 395static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
378static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
379{ 396{
380 unsigned long bits = pte_val(entry) & 397 unsigned long bits = pte_val(entry) &
381 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); 398 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
@@ -392,15 +409,6 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
392 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) 409 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
393 :"cc"); 410 :"cc");
394} 411}
395#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
396({ \
397 int __changed = !pte_same(*(__ptep), __entry); \
398 if (__changed) { \
399 __ptep_set_access_flags(__ptep, __entry, __dirty); \
400 flush_tlb_page_nohash(__vma, __address); \
401 } \
402 __changed; \
403})
404 412
405#define __HAVE_ARCH_PTE_SAME 413#define __HAVE_ARCH_PTE_SAME
406#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) 414#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 07f55e601696..5c1c4880723c 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -6,7 +6,17 @@
6#include <asm/processor.h> /* For TASK_SIZE */ 6#include <asm/processor.h> /* For TASK_SIZE */
7#include <asm/mmu.h> 7#include <asm/mmu.h>
8#include <asm/page.h> 8#include <asm/page.h>
9
9struct mm_struct; 10struct mm_struct;
11
12#ifdef CONFIG_DEBUG_VM
13extern void assert_pte_locked(struct mm_struct *mm, unsigned long addr);
14#else /* CONFIG_DEBUG_VM */
15static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
16{
17}
18#endif /* !CONFIG_DEBUG_VM */
19
10#endif /* !__ASSEMBLY__ */ 20#endif /* !__ASSEMBLY__ */
11 21
12#if defined(CONFIG_PPC64) 22#if defined(CONFIG_PPC64)
@@ -17,6 +27,80 @@ struct mm_struct;
17 27
18#ifndef __ASSEMBLY__ 28#ifndef __ASSEMBLY__
19 29
30/* Insert a PTE, top-level function is out of line. It uses an inline
31 * low level function in the respective pgtable-* files
32 */
33extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
34 pte_t pte);
35
36/* This low level function performs the actual PTE insertion
37 * Setting the PTE depends on the MMU type and other factors. It's
38 * an horrible mess that I'm not going to try to clean up now but
39 * I'm keeping it in one place rather than spread around
40 */
41static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
42 pte_t *ptep, pte_t pte, int percpu)
43{
44#if defined(CONFIG_PPC_STD_MMU_32) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
45 /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the
46 * helper pte_update() which does an atomic update. We need to do that
47 * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a
48 * per-CPU PTE such as a kmap_atomic, we do a simple update preserving
49 * the hash bits instead (ie, same as the non-SMP case)
50 */
51 if (percpu)
52 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
53 | (pte_val(pte) & ~_PAGE_HASHPTE));
54 else
55 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte));
56
57#elif defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
58 /* Second case is 32-bit with 64-bit PTE in SMP mode. In this case, we
59 * can just store as long as we do the two halves in the right order
60 * with a barrier in between. This is possible because we take care,
61 * in the hash code, to pre-invalidate if the PTE was already hashed,
62 * which synchronizes us with any concurrent invalidation.
63 * In the percpu case, we also fallback to the simple update preserving
64 * the hash bits
65 */
66 if (percpu) {
67 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
68 | (pte_val(pte) & ~_PAGE_HASHPTE));
69 return;
70 }
71#if _PAGE_HASHPTE != 0
72 if (pte_val(*ptep) & _PAGE_HASHPTE)
73 flush_hash_entry(mm, ptep, addr);
74#endif
75 __asm__ __volatile__("\
76 stw%U0%X0 %2,%0\n\
77 eieio\n\
78 stw%U0%X0 %L2,%1"
79 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
80 : "r" (pte) : "memory");
81
82#elif defined(CONFIG_PPC_STD_MMU_32)
83 /* Third case is 32-bit hash table in UP mode, we need to preserve
84 * the _PAGE_HASHPTE bit since we may not have invalidated the previous
85 * translation in the hash yet (done in a subsequent flush_tlb_xxx())
86 * and see we need to keep track that this PTE needs invalidating
87 */
88 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
89 | (pte_val(pte) & ~_PAGE_HASHPTE));
90
91#else
92 /* Anything else just stores the PTE normally. That covers all 64-bit
93 * cases, and 32-bit non-hash with 64-bit PTEs in UP mode
94 */
95 *ptep = pte;
96#endif
97}
98
99
100#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
101extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
102 pte_t *ptep, pte_t entry, int dirty);
103
20/* 104/*
21 * Macro to mark a page protection value as "uncacheable". 105 * Macro to mark a page protection value as "uncacheable".
22 */ 106 */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
new file mode 100644
index 000000000000..f4a4db8d5555
--- /dev/null
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -0,0 +1,73 @@
1/*
2 * Copyright 2009 Freescale Semicondutor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * provides masks and opcode images for use by code generation, emulation
10 * and for instructions that older assemblers might not know about
11 */
12#ifndef _ASM_POWERPC_PPC_OPCODE_H
13#define _ASM_POWERPC_PPC_OPCODE_H
14
15#include <linux/stringify.h>
16#include <asm/asm-compat.h>
17
18/* sorted alphabetically */
19#define PPC_INST_DCBA 0x7c0005ec
20#define PPC_INST_DCBA_MASK 0xfc0007fe
21#define PPC_INST_DCBAL 0x7c2005ec
22#define PPC_INST_DCBZL 0x7c2007ec
23#define PPC_INST_ISEL 0x7c00001e
24#define PPC_INST_ISEL_MASK 0xfc00003e
25#define PPC_INST_LSWI 0x7c0004aa
26#define PPC_INST_LSWX 0x7c00042a
27#define PPC_INST_LWSYNC 0x7c2004ac
28#define PPC_INST_MCRXR 0x7c000400
29#define PPC_INST_MCRXR_MASK 0xfc0007fe
30#define PPC_INST_MFSPR_PVR 0x7c1f42a6
31#define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff
32#define PPC_INST_MSGSND 0x7c00019c
33#define PPC_INST_NOP 0x60000000
34#define PPC_INST_POPCNTB 0x7c0000f4
35#define PPC_INST_POPCNTB_MASK 0xfc0007fe
36#define PPC_INST_RFCI 0x4c000066
37#define PPC_INST_RFDI 0x4c00004e
38#define PPC_INST_RFMCI 0x4c00004c
39
40#define PPC_INST_STRING 0x7c00042a
41#define PPC_INST_STRING_MASK 0xfc0007fe
42#define PPC_INST_STRING_GEN_MASK 0xfc00067e
43
44#define PPC_INST_STSWI 0x7c0005aa
45#define PPC_INST_STSWX 0x7c00052a
46#define PPC_INST_TLBILX 0x7c000626
47#define PPC_INST_WAIT 0x7c00007c
48
49/* macros to insert fields into opcodes */
50#define __PPC_RA(a) ((a & 0x1f) << 16)
51#define __PPC_RB(b) ((b & 0x1f) << 11)
52#define __PPC_T_TLB(t) ((t & 0x3) << 21)
53#define __PPC_WC(w) ((w & 0x3) << 21)
54
55/* Deal with instructions that older assemblers aren't aware of */
56#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
57 __PPC_RA(a) | __PPC_RB(b))
58#define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \
59 __PPC_RA(a) | __PPC_RB(b))
60#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \
61 __PPC_RB(b))
62#define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI)
63#define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI)
64#define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI)
65#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \
66 __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b))
67#define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b)
68#define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b)
69#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
70#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
71 __PPC_WC(w))
72
73#endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 1a0d628eb114..f59a66684aed 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -7,6 +7,7 @@
7#include <linux/stringify.h> 7#include <linux/stringify.h>
8#include <asm/asm-compat.h> 8#include <asm/asm-compat.h>
9#include <asm/processor.h> 9#include <asm/processor.h>
10#include <asm/ppc-opcode.h>
10 11
11#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
12#error __FILE__ should only be used in assembler files 13#error __FILE__ should only be used in assembler files
@@ -167,11 +168,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \
167#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority 168#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority
168#define HMT_HIGH or 3,3,3 169#define HMT_HIGH or 3,3,3
169 170
170/* handle instructions that older assemblers may not know */
171#define RFCI .long 0x4c000066 /* rfci instruction */
172#define RFDI .long 0x4c00004e /* rfdi instruction */
173#define RFMCI .long 0x4c00004c /* rfmci instruction */
174
175#ifdef __KERNEL__ 171#ifdef __KERNEL__
176#ifdef CONFIG_PPC64 172#ifdef CONFIG_PPC64
177 173
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h
index cd24ac16660a..0427b0b53d2d 100644
--- a/arch/powerpc/include/asm/ps3av.h
+++ b/arch/powerpc/include/asm/ps3av.h
@@ -730,7 +730,7 @@ extern int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *);
730extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *, 730extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *,
731 u32); 731 u32);
732 732
733extern int ps3av_set_video_mode(u32); 733extern int ps3av_set_video_mode(int);
734extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32); 734extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32);
735extern int ps3av_get_auto_mode(void); 735extern int ps3av_get_auto_mode(void);
736extern int ps3av_get_mode(void); 736extern int ps3av_get_mode(void);
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h
index 3f121fe4010d..1a91daf362c8 100644
--- a/arch/powerpc/include/asm/ps3fb.h
+++ b/arch/powerpc/include/asm/ps3fb.h
@@ -20,6 +20,7 @@
20#define _ASM_POWERPC_PS3FB_H_ 20#define _ASM_POWERPC_PS3FB_H_
21 21
22#include <linux/ioctl.h> 22#include <linux/ioctl.h>
23#include <linux/types.h>
23 24
24/* ioctl */ 25/* ioctl */
25#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ 26#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h
new file mode 100644
index 000000000000..07630faae029
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-40x.h
@@ -0,0 +1,64 @@
1#ifndef _ASM_POWERPC_PTE_40x_H
2#define _ASM_POWERPC_PTE_40x_H
3#ifdef __KERNEL__
4
5/*
6 * At present, all PowerPC 400-class processors share a similar TLB
7 * architecture. The instruction and data sides share a unified,
8 * 64-entry, fully-associative TLB which is maintained totally under
9 * software control. In addition, the instruction side has a
10 * hardware-managed, 4-entry, fully-associative TLB which serves as a
11 * first level to the shared TLB. These two TLBs are known as the UTLB
12 * and ITLB, respectively (see "mmu.h" for definitions).
13 *
14 * There are several potential gotchas here. The 40x hardware TLBLO
15 * field looks like this:
16 *
17 * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
18 * RPN..................... 0 0 EX WR ZSEL....... W I M G
19 *
20 * Where possible we make the Linux PTE bits match up with this
21 *
22 * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
23 * support down to 1k pages), this is done in the TLBMiss exception
24 * handler.
25 * - We use only zones 0 (for kernel pages) and 1 (for user pages)
26 * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
27 * miss handler. Bit 27 is PAGE_USER, thus selecting the correct
28 * zone.
29 * - PRESENT *must* be in the bottom two bits because swap cache
30 * entries use the top 30 bits. Because 40x doesn't support SMP
31 * anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
32 * is cleared in the TLB miss handler before the TLB entry is loaded.
33 * - All other bits of the PTE are loaded into TLBLO without
34 * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
35 * software PTE bits. We actually use use bits 21, 24, 25, and
36 * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
37 * PRESENT.
38 */
39
40#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
41#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
42#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
43#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
44#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
45#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
46#define _PAGE_RW 0x040 /* software: Writes permitted */
47#define _PAGE_DIRTY 0x080 /* software: dirty page */
48#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
49#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
50#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
51
52#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
53#define _PMD_BAD 0x802
54#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */
55#define _PMD_SIZE_4M 0x0c0
56#define _PMD_SIZE_16M 0x0e0
57
58#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
59
60/* Until my rework is finished, 40x still needs atomic PTE updates */
61#define PTE_ATOMIC_UPDATES 1
62
63#endif /* __KERNEL__ */
64#endif /* _ASM_POWERPC_PTE_40x_H */
diff --git a/arch/powerpc/include/asm/pte-44x.h b/arch/powerpc/include/asm/pte-44x.h
new file mode 100644
index 000000000000..37e98bcf83e0
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-44x.h
@@ -0,0 +1,102 @@
1#ifndef _ASM_POWERPC_PTE_44x_H
2#define _ASM_POWERPC_PTE_44x_H
3#ifdef __KERNEL__
4
5/*
6 * Definitions for PPC440
7 *
8 * Because of the 3 word TLB entries to support 36-bit addressing,
9 * the attribute are difficult to map in such a fashion that they
10 * are easily loaded during exception processing. I decided to
11 * organize the entry so the ERPN is the only portion in the
12 * upper word of the PTE and the attribute bits below are packed
13 * in as sensibly as they can be in the area below a 4KB page size
14 * oriented RPN. This at least makes it easy to load the RPN and
15 * ERPN fields in the TLB. -Matt
16 *
17 * This isn't entirely true anymore, at least some bits are now
18 * easier to move into the TLB from the PTE. -BenH.
19 *
20 * Note that these bits preclude future use of a page size
21 * less than 4KB.
22 *
23 *
24 * PPC 440 core has following TLB attribute fields;
25 *
26 * TLB1:
27 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
28 * RPN................................. - - - - - - ERPN.......
29 *
30 * TLB2:
31 * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
33 *
34 * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
35 * TLB2 storage attibute fields. Those are:
36 *
37 * TLB2:
38 * 0...10 11 12 13 14 15 16...31
39 * no change WL1 IL1I IL1D IL2I IL2D no change
40 *
41 * There are some constrains and options, to decide mapping software bits
42 * into TLB entry.
43 *
44 * - PRESENT *must* be in the bottom three bits because swap cache
45 * entries use the top 29 bits for TLB2.
46 *
47 * - FILE *must* be in the bottom three bits because swap cache
48 * entries use the top 29 bits for TLB2.
49 *
50 * - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
51 * because it doesn't support SMP. However, some later 460 variants
52 * have -some- form of SMP support and so I keep the bit there for
53 * future use
54 *
55 * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
56 * for memory protection related functions (see PTE structure in
57 * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
58 * above bits. Note that the bit values are CPU specific, not architecture
59 * specific.
60 *
61 * The kernel PTE entry holds an arch-dependent swp_entry structure under
62 * certain situations. In other words, in such situations some portion of
63 * the PTE bits are used as a swp_entry. In the PPC implementation, the
64 * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
65 * hold protection values. That means the three protection bits are
66 * reserved for both PTE and SWAP entry at the most significant three
67 * LSBs.
68 *
69 * There are three protection bits available for SWAP entry:
70 * _PAGE_PRESENT
71 * _PAGE_FILE
72 * _PAGE_HASHPTE (if HW has)
73 *
74 * So those three bits have to be inside of 0-2nd LSB of PTE.
75 *
76 */
77
78#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
79#define _PAGE_RW 0x00000002 /* S: Write permission */
80#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
81#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
82#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
83#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
84#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
85#define _PAGE_USER 0x00000040 /* S: User page */
86#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
87#define _PAGE_GUARDED 0x00000100 /* H: G bit */
88#define _PAGE_COHERENT 0x00000200 /* H: M bit */
89#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
90#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
91
92/* TODO: Add large page lowmem mapping support */
93#define _PMD_PRESENT 0
94#define _PMD_PRESENT_MASK (PAGE_MASK)
95#define _PMD_BAD (~PAGE_MASK)
96
97/* ERPN in a PTE never gets cleared, ignore it */
98#define _PTE_NONE_MASK 0xffffffff00000000ULL
99
100
101#endif /* __KERNEL__ */
102#endif /* _ASM_POWERPC_PTE_44x_H */
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
new file mode 100644
index 000000000000..b07acfd330b0
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -0,0 +1,64 @@
1#ifndef _ASM_POWERPC_PTE_8xx_H
2#define _ASM_POWERPC_PTE_8xx_H
3#ifdef __KERNEL__
4
5/*
6 * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
7 * We also use the two level tables, but we can put the real bits in them
8 * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0,
9 * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has
10 * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
11 * based upon user/super access. The TLB does not have accessed nor write
12 * protect. We assume that if the TLB get loaded with an entry it is
13 * accessed, and overload the changed bit for write protect. We use
14 * two bits in the software pte that are supposed to be set to zero in
15 * the TLB entry (24 and 25) for these indicators. Although the level 1
16 * descriptor contains the guarded and writethrough/copyback bits, we can
17 * set these at the page level since they get copied from the Mx_TWC
18 * register when the TLB entry is loaded. We will use bit 27 for guard, since
19 * that is where it exists in the MD_TWC, and bit 26 for writethrough.
20 * These will get masked from the level 2 descriptor at TLB load time, and
21 * copied to the MD_TWC before it gets loaded.
22 * Large page sizes added. We currently support two sizes, 4K and 8M.
23 * This also allows a TLB hander optimization because we can directly
24 * load the PMD into MD_TWC. The 8M pages are only used for kernel
25 * mapping of well known areas. The PMD (PGD) entries contain control
26 * flags in addition to the address, so care must be taken that the
27 * software no longer assumes these are only pointers.
28 */
29
30/* Definitions for 8xx embedded chips. */
31#define _PAGE_PRESENT 0x0001 /* Page is valid */
32#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
33#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
34#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
35
36/* These five software bits must be masked out when the entry is loaded
37 * into the TLB.
38 */
39#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
40#define _PAGE_GUARDED 0x0010 /* software: guarded access */
41#define _PAGE_DIRTY 0x0020 /* software: page changed */
42#define _PAGE_RW 0x0040 /* software: user write access allowed */
43#define _PAGE_ACCESSED 0x0080 /* software: page referenced */
44
45/* Setting any bits in the nibble with the follow two controls will
46 * require a TLB exception handler change. It is assumed unused bits
47 * are always zero.
48 */
49#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */
50#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */
51
52#define _PMD_PRESENT 0x0001
53#define _PMD_BAD 0x0ff0
54#define _PMD_PAGE_MASK 0x000c
55#define _PMD_PAGE_8M 0x000c
56
57#define _PTE_NONE_MASK _PAGE_ACCESSED
58
59/* Until my rework is finished, 8xx still needs atomic PTE updates */
60#define PTE_ATOMIC_UPDATES 1
61
62
63#endif /* __KERNEL__ */
64#endif /* _ASM_POWERPC_PTE_8xx_H */
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h
new file mode 100644
index 000000000000..10820f58acf5
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-fsl-booke.h
@@ -0,0 +1,48 @@
1#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H
2#define _ASM_POWERPC_PTE_FSL_BOOKE_H
3#ifdef __KERNEL__
4
5/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
6 * processors
7 *
8 MMU Assist Register 3:
9
10 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
11 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
12
13 - PRESENT *must* be in the bottom three bits because swap cache
14 entries use the top 29 bits.
15
16 - FILE *must* be in the bottom three bits because swap cache
17 entries use the top 29 bits.
18*/
19
20/* Definitions for FSL Book-E Cores */
21#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
22#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
23#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
24#define _PAGE_RW 0x00004 /* S: Write permission (SW) */
25#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
26#define _PAGE_HWEXEC 0x00010 /* H: SX permission */
27#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
28
29#define _PAGE_ENDIAN 0x00040 /* H: E bit */
30#define _PAGE_GUARDED 0x00080 /* H: G bit */
31#define _PAGE_COHERENT 0x00100 /* H: M bit */
32#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
33#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
34#define _PAGE_SPECIAL 0x00800 /* S: Special page */
35
36#ifdef CONFIG_PTE_64BIT
37/* ERPN in a PTE never gets cleared, ignore it */
38#define _PTE_NONE_MASK 0xffffffffffff0000ULL
39/* We extend the size of the PTE flags area when using 64-bit PTEs */
40#define PTE_RPN_SHIFT (PAGE_SHIFT + 8)
41#endif
42
43#define _PMD_PRESENT 0
44#define _PMD_PRESENT_MASK (PAGE_MASK)
45#define _PMD_BAD (~PAGE_MASK)
46
47#endif /* __KERNEL__ */
48#endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */
diff --git a/arch/powerpc/include/asm/pte-hash32.h b/arch/powerpc/include/asm/pte-hash32.h
new file mode 100644
index 000000000000..6afe22b02f2f
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash32.h
@@ -0,0 +1,49 @@
1#ifndef _ASM_POWERPC_PTE_HASH32_H
2#define _ASM_POWERPC_PTE_HASH32_H
3#ifdef __KERNEL__
4
5/*
6 * The "classic" 32-bit implementation of the PowerPC MMU uses a hash
7 * table containing PTEs, together with a set of 16 segment registers,
8 * to define the virtual to physical address mapping.
9 *
10 * We use the hash table as an extended TLB, i.e. a cache of currently
11 * active mappings. We maintain a two-level page table tree, much
12 * like that used by the i386, for the sake of the Linux memory
13 * management code. Low-level assembler code in hash_low_32.S
14 * (procedure hash_page) is responsible for extracting ptes from the
15 * tree and putting them into the hash table when necessary, and
16 * updating the accessed and modified bits in the page table tree.
17 */
18
19#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
20#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
21#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */
22#define _PAGE_USER 0x004 /* usermode access allowed */
23#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */
24#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
25#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */
26#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
27#define _PAGE_DIRTY 0x080 /* C: page changed */
28#define _PAGE_ACCESSED 0x100 /* R: page referenced */
29#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
30#define _PAGE_RW 0x400 /* software: user write access allowed */
31#define _PAGE_SPECIAL 0x800 /* software: Special page */
32
33#ifdef CONFIG_PTE_64BIT
34/* We never clear the high word of the pte */
35#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
36#else
37#define _PTE_NONE_MASK _PAGE_HASHPTE
38#endif
39
40#define _PMD_PRESENT 0
41#define _PMD_PRESENT_MASK (PAGE_MASK)
42#define _PMD_BAD (~PAGE_MASK)
43
44/* Hash table based platforms need atomic updates of the linux PTE */
45#define PTE_ATOMIC_UPDATES 1
46
47
48#endif /* __KERNEL__ */
49#endif /* _ASM_POWERPC_PTE_HASH32_H */
diff --git a/arch/powerpc/include/asm/pte-hash64-4k.h b/arch/powerpc/include/asm/pte-hash64-4k.h
new file mode 100644
index 000000000000..29fdc158fe3f
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64-4k.h
@@ -0,0 +1,20 @@
1/* To be include by pgtable-hash64.h only */
2
3/* PTE bits */
4#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
5#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
6#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
7#define _PAGE_F_SECOND _PAGE_SECONDARY
8#define _PAGE_F_GIX _PAGE_GROUP_IX
9#define _PAGE_SPECIAL 0x10000 /* software: special page */
10
11/* There is no 4K PFN hack on 4K pages */
12#define _PAGE_4K_PFN 0
13
14/* PTE flags to conserve for HPTE identification */
15#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
16 _PAGE_SECONDARY | _PAGE_GROUP_IX)
17
18/* shift to put page number into pte */
19#define PTE_RPN_SHIFT (17)
20
diff --git a/arch/powerpc/include/asm/pgtable-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index 7389003349a6..e05d26fa372f 100644
--- a/arch/powerpc/include/asm/pgtable-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -1,76 +1,6 @@
1#ifndef _ASM_POWERPC_PGTABLE_64K_H 1/* To be include by pgtable-hash64.h only */
2#define _ASM_POWERPC_PGTABLE_64K_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6
7#define PTE_INDEX_SIZE 12
8#define PMD_INDEX_SIZE 12
9#define PUD_INDEX_SIZE 0
10#define PGD_INDEX_SIZE 4
11
12#ifndef __ASSEMBLY__
13#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE)
14#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
15#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
16
17#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
18#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
19#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
20
21#ifdef CONFIG_PPC_SUBPAGE_PROT
22/*
23 * For the sub-page protection option, we extend the PGD with one of
24 * these. Basically we have a 3-level tree, with the top level being
25 * the protptrs array. To optimize speed and memory consumption when
26 * only addresses < 4GB are being protected, pointers to the first
27 * four pages of sub-page protection words are stored in the low_prot
28 * array.
29 * Each page of sub-page protection words protects 1GB (4 bytes
30 * protects 64k). For the 3-level tree, each page of pointers then
31 * protects 8TB.
32 */
33struct subpage_prot_table {
34 unsigned long maxaddr; /* only addresses < this are protected */
35 unsigned int **protptrs[2];
36 unsigned int *low_prot[4];
37};
38
39#undef PGD_TABLE_SIZE
40#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
41 sizeof(struct subpage_prot_table))
42
43#define SBP_L1_BITS (PAGE_SHIFT - 2)
44#define SBP_L2_BITS (PAGE_SHIFT - 3)
45#define SBP_L1_COUNT (1 << SBP_L1_BITS)
46#define SBP_L2_COUNT (1 << SBP_L2_BITS)
47#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
48#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
49
50extern void subpage_prot_free(pgd_t *pgd);
51
52static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
53{
54 return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
55}
56#endif /* CONFIG_PPC_SUBPAGE_PROT */
57#endif /* __ASSEMBLY__ */
58
59/* With 4k base page size, hugepage PTEs go at the PMD level */
60#define MIN_HUGEPTE_SHIFT PAGE_SHIFT
61
62/* PMD_SHIFT determines what a second-level page table entry can map */
63#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
64#define PMD_SIZE (1UL << PMD_SHIFT)
65#define PMD_MASK (~(PMD_SIZE-1))
66
67/* PGDIR_SHIFT determines what a third-level page table entry can map */
68#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
69#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
70#define PGDIR_MASK (~(PGDIR_SIZE-1))
71 2
72/* Additional PTE bits (don't change without checking asm in hash_low.S) */ 3/* Additional PTE bits (don't change without checking asm in hash_low.S) */
73#define __HAVE_ARCH_PTE_SPECIAL
74#define _PAGE_SPECIAL 0x00000400 /* software: special page */ 4#define _PAGE_SPECIAL 0x00000400 /* software: special page */
75#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ 5#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */
76#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ 6#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */
@@ -107,21 +37,15 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
107 * of addressable physical space, or 46 bits for the special 4k PFNs. 37 * of addressable physical space, or 46 bits for the special 4k PFNs.
108 */ 38 */
109#define PTE_RPN_SHIFT (30) 39#define PTE_RPN_SHIFT (30)
110#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
111#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
112
113/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
114 * pgprot changes
115 */
116#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
117 _PAGE_ACCESSED | _PAGE_SPECIAL)
118 40
119/* Bits to mask out from a PMD to get to the PTE page */ 41#ifndef __ASSEMBLY__
120#define PMD_MASKED_BITS 0x1ff
121/* Bits to mask out from a PGD/PUD to get to the PMD page */
122#define PUD_MASKED_BITS 0x1ff
123 42
124/* Manipulate "rpte" values */ 43/*
44 * With 64K pages on hash table, we have a special PTE format that
45 * uses a second "half" of the page table to encode sub-page information
46 * in order to deal with 64K made of 4K HW pages. Thus we override the
47 * generic accessors and iterators here
48 */
125#define __real_pte(e,p) ((real_pte_t) { \ 49#define __real_pte(e,p) ((real_pte_t) { \
126 (e), pte_val(*((p) + PTRS_PER_PTE)) }) 50 (e), pte_val(*((p) + PTRS_PER_PTE)) })
127#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ 51#define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
@@ -130,7 +54,6 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
130#define __rpte_sub_valid(rpte, index) \ 54#define __rpte_sub_valid(rpte, index) \
131 (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) 55 (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index)))
132 56
133
134/* Trick: we set __end to va + 64k, which happens works for 57/* Trick: we set __end to va + 64k, which happens works for
135 * a 16M page as well as we want only one iteration 58 * a 16M page as well as we want only one iteration
136 */ 59 */
@@ -152,4 +75,41 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
152 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ 75 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \
153 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) 76 __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN))
154 77
155#endif /* _ASM_POWERPC_PGTABLE_64K_H */ 78
79#ifdef CONFIG_PPC_SUBPAGE_PROT
80/*
81 * For the sub-page protection option, we extend the PGD with one of
82 * these. Basically we have a 3-level tree, with the top level being
83 * the protptrs array. To optimize speed and memory consumption when
84 * only addresses < 4GB are being protected, pointers to the first
85 * four pages of sub-page protection words are stored in the low_prot
86 * array.
87 * Each page of sub-page protection words protects 1GB (4 bytes
88 * protects 64k). For the 3-level tree, each page of pointers then
89 * protects 8TB.
90 */
91struct subpage_prot_table {
92 unsigned long maxaddr; /* only addresses < this are protected */
93 unsigned int **protptrs[2];
94 unsigned int *low_prot[4];
95};
96
97#undef PGD_TABLE_SIZE
98#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
99 sizeof(struct subpage_prot_table))
100
101#define SBP_L1_BITS (PAGE_SHIFT - 2)
102#define SBP_L2_BITS (PAGE_SHIFT - 3)
103#define SBP_L1_COUNT (1 << SBP_L1_BITS)
104#define SBP_L2_COUNT (1 << SBP_L2_BITS)
105#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS)
106#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS)
107
108extern void subpage_prot_free(pgd_t *pgd);
109
110static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
111{
112 return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
113}
114#endif /* CONFIG_PPC_SUBPAGE_PROT */
115#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/pte-hash64.h b/arch/powerpc/include/asm/pte-hash64.h
new file mode 100644
index 000000000000..62766636cc1e
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64.h
@@ -0,0 +1,47 @@
1#ifndef _ASM_POWERPC_PTE_HASH64_H
2#define _ASM_POWERPC_PTE_HASH64_H
3#ifdef __KERNEL__
4
5/*
6 * Common bits between 4K and 64K pages in a linux-style PTE.
7 * These match the bits in the (hardware-defined) PowerPC PTE as closely
8 * as possible. Additional bits may be defined in pgtable-hash64-*.h
9 */
10#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
11#define _PAGE_USER 0x0002 /* matches one of the PP bits */
12#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
13#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
14#define _PAGE_GUARDED 0x0008
15#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
16#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
17#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
18#define _PAGE_DIRTY 0x0080 /* C: page changed */
19#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
20#define _PAGE_RW 0x0200 /* software: user write access allowed */
21#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
22
23/* Strong Access Ordering */
24#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
25
26#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
27
28#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
29
30/* PTEIDX nibble */
31#define _PTEIDX_SECONDARY 0x8
32#define _PTEIDX_GROUP_IX 0x7
33
34#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
35 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
36 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
37 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
38
39
40#ifdef CONFIG_PPC_64K_PAGES
41#include <asm/pte-hash64-64k.h>
42#else
43#include <asm/pte-hash64-4k.h>
44#endif
45
46#endif /* __KERNEL__ */
47#endif /* _ASM_POWERPC_PTE_HASH64_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f484a343efba..c9ff1ec97479 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -155,6 +155,8 @@
155#define CTRL_RUNLATCH 0x1 155#define CTRL_RUNLATCH 0x1
156#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 156#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
157#define DABR_TRANSLATION (1UL << 2) 157#define DABR_TRANSLATION (1UL << 2)
158#define DABR_DATA_WRITE (1UL << 1)
159#define DABR_DATA_READ (1UL << 0)
158#define SPRN_DABR2 0x13D /* e300 */ 160#define SPRN_DABR2 0x13D /* e300 */
159#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ 161#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
160#define DABRX_USER (1UL << 0) 162#define DABRX_USER (1UL << 0)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 67453766bff1..a56f4d61aa72 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -10,6 +10,7 @@
10#define __ASM_POWERPC_REG_BOOKE_H__ 10#define __ASM_POWERPC_REG_BOOKE_H__
11 11
12/* Machine State Register (MSR) Fields */ 12/* Machine State Register (MSR) Fields */
13#define MSR_GS (1<<28) /* Guest state */
13#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ 14#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
14#define MSR_SPE (1<<25) /* Enable SPE */ 15#define MSR_SPE (1<<25) /* Enable SPE */
15#define MSR_DWE (1<<10) /* Debug Wait Enable */ 16#define MSR_DWE (1<<10) /* Debug Wait Enable */
@@ -110,6 +111,7 @@
110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ 111#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ 112#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
112#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ 113#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */
114#define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */
113#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ 115#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
114#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ 116#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
115#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ 117#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
diff --git a/arch/powerpc/include/asm/spu_info.h b/arch/powerpc/include/asm/spu_info.h
index 3545efbf9891..1286c823f0d8 100644
--- a/arch/powerpc/include/asm/spu_info.h
+++ b/arch/powerpc/include/asm/spu_info.h
@@ -23,9 +23,10 @@
23#ifndef _SPU_INFO_H 23#ifndef _SPU_INFO_H
24#define _SPU_INFO_H 24#define _SPU_INFO_H
25 25
26#include <linux/types.h>
27
26#ifdef __KERNEL__ 28#ifdef __KERNEL__
27#include <asm/spu.h> 29#include <asm/spu.h>
28#include <linux/types.h>
29#else 30#else
30struct mfc_cq_sr { 31struct mfc_cq_sr {
31 __u64 mfc_cq_data0_RW; 32 __u64 mfc_cq_data0_RW;
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index ef824ae4b79c..c581e3ef73ed 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -8,7 +8,7 @@
8 * 2 of the License, or (at your option) any later version. 8 * 2 of the License, or (at your option) any later version.
9 */ 9 */
10 10
11#include <asm/types.h> 11#include <linux/types.h>
12#include <linux/compiler.h> 12#include <linux/compiler.h>
13 13
14#ifdef __GNUC__ 14#ifdef __GNUC__
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index 2a4be19a92c4..f612798e1c93 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -531,7 +531,7 @@ __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
531#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) 531#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
532#endif 532#endif
533 533
534#define arch_align_stack(x) (x) 534extern unsigned long arch_align_stack(unsigned long sp);
535 535
536/* Used in very early kernel initialization. */ 536/* Used in very early kernel initialization. */
537extern unsigned long reloc_offset(void); 537extern unsigned long reloc_offset(void);
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 9665a26a253a..9aba5a38a7c4 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -12,8 +12,10 @@
12 12
13/* We have 8k stacks on ppc32 and 16k on ppc64 */ 13/* We have 8k stacks on ppc32 and 16k on ppc64 */
14 14
15#ifdef CONFIG_PPC64 15#if defined(CONFIG_PPC64)
16#define THREAD_SHIFT 14 16#define THREAD_SHIFT 14
17#elif defined(CONFIG_PPC_256K_PAGES)
18#define THREAD_SHIFT 15
17#else 19#else
18#define THREAD_SHIFT 13 20#define THREAD_SHIFT 13
19#endif 21#endif
@@ -154,6 +156,13 @@ static inline void set_restore_sigmask(void)
154 ti->local_flags |= _TLF_RESTORE_SIGMASK; 156 ti->local_flags |= _TLF_RESTORE_SIGMASK;
155 set_bit(TIF_SIGPENDING, &ti->flags); 157 set_bit(TIF_SIGPENDING, &ti->flags);
156} 158}
159
160#ifdef CONFIG_PPC64
161#define is_32bit_task() (test_thread_flag(TIF_32BIT))
162#else
163#define is_32bit_task() (1)
164#endif
165
157#endif /* !__ASSEMBLY__ */ 166#endif /* !__ASSEMBLY__ */
158 167
159#endif /* __KERNEL__ */ 168#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 6418ceea44b7..cd21e5e6b04f 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17extern void (*udbg_putc)(char c); 17extern void (*udbg_putc)(char c);
18extern void (*udbg_flush)(void);
18extern int (*udbg_getc)(void); 19extern int (*udbg_getc)(void);
19extern int (*udbg_getc_poll)(void); 20extern int (*udbg_getc_poll)(void);
20 21
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 8d1a419df35d..71901fbda4a5 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -18,12 +18,10 @@ CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
18CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog 18CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
19CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog 19CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog
20CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog 20CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog
21 21# do not trace tracer code
22ifdef CONFIG_DYNAMIC_FTRACE
23# dynamic ftrace setup.
24CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog 22CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog
25endif 23# timers used by tracing
26 24CFLAGS_REMOVE_time.o = -pg -mno-sched-epilog
27endif 25endif
28 26
29obj-y := cputable.o ptrace.o syscalls.o \ 27obj-y := cputable.o ptrace.o syscalls.o \
@@ -61,6 +59,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
61obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o 59obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
62obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o 60obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
63obj-$(CONFIG_44x) += cpu_setup_44x.o 61obj-$(CONFIG_44x) += cpu_setup_44x.o
62obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o dbell.o
64 63
65extra-$(CONFIG_PPC_STD_MMU) := head_32.o 64extra-$(CONFIG_PPC_STD_MMU) := head_32.o
66extra-$(CONFIG_PPC64) := head_64.o 65extra-$(CONFIG_PPC64) := head_64.o
@@ -76,7 +75,7 @@ obj-y += time.o prom.o traps.o setup-common.o \
76obj-$(CONFIG_PPC32) += entry_32.o setup_32.o 75obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
77obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o 76obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
78obj-$(CONFIG_KGDB) += kgdb.o 77obj-$(CONFIG_KGDB) += kgdb.o
79obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o 78obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
80obj-$(CONFIG_MODULES) += ppc_ksyms.o 79obj-$(CONFIG_MODULES) += ppc_ksyms.o
81obj-$(CONFIG_BOOTX_TEXT) += btext.o 80obj-$(CONFIG_BOOTX_TEXT) += btext.o
82obj-$(CONFIG_SMP) += smp.o 81obj-$(CONFIG_SMP) += smp.o
@@ -94,6 +93,7 @@ obj-$(CONFIG_AUDIT) += audit.o
94obj64-$(CONFIG_AUDIT) += compat_audit.o 93obj64-$(CONFIG_AUDIT) += compat_audit.o
95 94
96obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 95obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
96obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
97 97
98obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o 98obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
99 99
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 73cb6a3229ae..5ffcfaa77d6a 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -187,7 +187,7 @@ static struct aligninfo aligninfo[128] = {
187 { 4, ST+F+S+U }, /* 11 1 1010: stfsux */ 187 { 4, ST+F+S+U }, /* 11 1 1010: stfsux */
188 { 8, ST+F+U }, /* 11 1 1011: stfdux */ 188 { 8, ST+F+U }, /* 11 1 1011: stfdux */
189 INVALID, /* 11 1 1100 */ 189 INVALID, /* 11 1 1100 */
190 INVALID, /* 11 1 1101 */ 190 { 4, LD+F }, /* 11 1 1101: lfiwzx */
191 INVALID, /* 11 1 1110 */ 191 INVALID, /* 11 1 1110 */
192 INVALID, /* 11 1 1111 */ 192 INVALID, /* 11 1 1111 */
193}; 193};
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 19ee491e9e23..10377df38f36 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -284,9 +284,6 @@ int main(void)
284#endif /* ! CONFIG_PPC64 */ 284#endif /* ! CONFIG_PPC64 */
285 285
286 /* About the CPU features table */ 286 /* About the CPU features table */
287 DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
288 DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask));
289 DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value));
290 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); 287 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
291 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); 288 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
292 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); 289 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 10b4ab1008af..7d606f89a839 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -34,6 +34,7 @@ _GLOBAL(__setup_cpu_440grx)
34 blr 34 blr
35_GLOBAL(__setup_cpu_460ex) 35_GLOBAL(__setup_cpu_460ex)
36_GLOBAL(__setup_cpu_460gt) 36_GLOBAL(__setup_cpu_460gt)
37_GLOBAL(__setup_cpu_460sx)
37 mflr r4 38 mflr r4
38 bl __init_fpu_44x 39 bl __init_fpu_44x
39 bl __fixup_440A_mcheck 40 bl __fixup_440A_mcheck
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
new file mode 100644
index 000000000000..eb4b9adcedb4
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -0,0 +1,31 @@
1/*
2 * This file contains low level CPU setup functions.
3 * Kumar Gala <galak@kernel.crashing.org>
4 * Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Based on cpu_setup_6xx code by
7 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 *
14 */
15
16#include <asm/processor.h>
17#include <asm/cputable.h>
18#include <asm/ppc_asm.h>
19
20_GLOBAL(__setup_cpu_e200)
21 /* enable dedicated debug exception handling resources (Debug APU) */
22 mfspr r3,SPRN_HID0
23 ori r3,r3,HID0_DAPUEN@l
24 mtspr SPRN_HID0,r3
25 b __setup_e200_ivors
26_GLOBAL(__setup_cpu_e500v1)
27_GLOBAL(__setup_cpu_e500v2)
28 b __setup_e500_ivors
29_GLOBAL(__setup_cpu_e500mc)
30 b __setup_e500mc_ivors
31
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 923f87aff20a..ccea2431ddf8 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -35,6 +35,10 @@ const char *powerpc_base_platform;
35 * and ppc64 35 * and ppc64
36 */ 36 */
37#ifdef CONFIG_PPC32 37#ifdef CONFIG_PPC32
38extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 44extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
@@ -43,6 +47,7 @@ extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 47extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 48extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 49extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
46extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 51extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 52extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 53extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -726,6 +731,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
726 .cpu_setup = __setup_cpu_750, 731 .cpu_setup = __setup_cpu_750,
727 .machine_check = machine_check_generic, 732 .machine_check = machine_check_generic,
728 .platform = "ppc750", 733 .platform = "ppc750",
734 .oprofile_cpu_type = "ppc/750",
735 .oprofile_type = PPC_OPROFILE_G4,
729 }, 736 },
730 { /* 750FX rev 2.0 must disable HID0[DPM] */ 737 { /* 750FX rev 2.0 must disable HID0[DPM] */
731 .pvr_mask = 0xffffffff, 738 .pvr_mask = 0xffffffff,
@@ -741,6 +748,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
741 .cpu_setup = __setup_cpu_750, 748 .cpu_setup = __setup_cpu_750,
742 .machine_check = machine_check_generic, 749 .machine_check = machine_check_generic,
743 .platform = "ppc750", 750 .platform = "ppc750",
751 .oprofile_cpu_type = "ppc/750",
752 .oprofile_type = PPC_OPROFILE_G4,
744 }, 753 },
745 { /* 750FX (All revs except 2.0) */ 754 { /* 750FX (All revs except 2.0) */
746 .pvr_mask = 0xffff0000, 755 .pvr_mask = 0xffff0000,
@@ -756,6 +765,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
756 .cpu_setup = __setup_cpu_750fx, 765 .cpu_setup = __setup_cpu_750fx,
757 .machine_check = machine_check_generic, 766 .machine_check = machine_check_generic,
758 .platform = "ppc750", 767 .platform = "ppc750",
768 .oprofile_cpu_type = "ppc/750",
769 .oprofile_type = PPC_OPROFILE_G4,
759 }, 770 },
760 { /* 750GX */ 771 { /* 750GX */
761 .pvr_mask = 0xffff0000, 772 .pvr_mask = 0xffff0000,
@@ -771,6 +782,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
771 .cpu_setup = __setup_cpu_750fx, 782 .cpu_setup = __setup_cpu_750fx,
772 .machine_check = machine_check_generic, 783 .machine_check = machine_check_generic,
773 .platform = "ppc750", 784 .platform = "ppc750",
785 .oprofile_cpu_type = "ppc/750",
786 .oprofile_type = PPC_OPROFILE_G4,
774 }, 787 },
775 { /* 740/750 (L2CR bit need fixup for 740) */ 788 { /* 740/750 (L2CR bit need fixup for 740) */
776 .pvr_mask = 0xffff0000, 789 .pvr_mask = 0xffff0000,
@@ -1634,6 +1647,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
1634 .machine_check = machine_check_440A, 1647 .machine_check = machine_check_440A,
1635 .platform = "ppc440", 1648 .platform = "ppc440",
1636 }, 1649 },
1650 { /* 460SX */
1651 .pvr_mask = 0xffffff00,
1652 .pvr_value = 0x13541800,
1653 .cpu_name = "460SX",
1654 .cpu_features = CPU_FTRS_44X,
1655 .cpu_user_features = COMMON_USER_BOOKE,
1656 .mmu_features = MMU_FTR_TYPE_44x,
1657 .icache_bsize = 32,
1658 .dcache_bsize = 32,
1659 .cpu_setup = __setup_cpu_460sx,
1660 .machine_check = machine_check_440A,
1661 .platform = "ppc440",
1662 },
1637 { /* default match */ 1663 { /* default match */
1638 .pvr_mask = 0x00000000, 1664 .pvr_mask = 0x00000000,
1639 .pvr_value = 0x00000000, 1665 .pvr_value = 0x00000000,
@@ -1687,6 +1713,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1687 PPC_FEATURE_UNIFIED_CACHE, 1713 PPC_FEATURE_UNIFIED_CACHE,
1688 .mmu_features = MMU_FTR_TYPE_FSL_E, 1714 .mmu_features = MMU_FTR_TYPE_FSL_E,
1689 .dcache_bsize = 32, 1715 .dcache_bsize = 32,
1716 .cpu_setup = __setup_cpu_e200,
1690 .machine_check = machine_check_e200, 1717 .machine_check = machine_check_e200,
1691 .platform = "ppc5554", 1718 .platform = "ppc5554",
1692 } 1719 }
@@ -1706,6 +1733,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1706 .num_pmcs = 4, 1733 .num_pmcs = 4,
1707 .oprofile_cpu_type = "ppc/e500", 1734 .oprofile_cpu_type = "ppc/e500",
1708 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1735 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1736 .cpu_setup = __setup_cpu_e500v1,
1709 .machine_check = machine_check_e500, 1737 .machine_check = machine_check_e500,
1710 .platform = "ppc8540", 1738 .platform = "ppc8540",
1711 }, 1739 },
@@ -1724,6 +1752,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1724 .num_pmcs = 4, 1752 .num_pmcs = 4,
1725 .oprofile_cpu_type = "ppc/e500", 1753 .oprofile_cpu_type = "ppc/e500",
1726 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1754 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1755 .cpu_setup = __setup_cpu_e500v2,
1727 .machine_check = machine_check_e500, 1756 .machine_check = machine_check_e500,
1728 .platform = "ppc8548", 1757 .platform = "ppc8548",
1729 }, 1758 },
@@ -1733,12 +1762,14 @@ static struct cpu_spec __initdata cpu_specs[] = {
1733 .cpu_name = "e500mc", 1762 .cpu_name = "e500mc",
1734 .cpu_features = CPU_FTRS_E500MC, 1763 .cpu_features = CPU_FTRS_E500MC,
1735 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1764 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1736 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1765 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1766 MMU_FTR_USE_TLBILX,
1737 .icache_bsize = 64, 1767 .icache_bsize = 64,
1738 .dcache_bsize = 64, 1768 .dcache_bsize = 64,
1739 .num_pmcs = 4, 1769 .num_pmcs = 4,
1740 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ 1770 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1741 .oprofile_type = PPC_OPROFILE_FSL_EMB, 1771 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1772 .cpu_setup = __setup_cpu_e500mc,
1742 .machine_check = machine_check_e500, 1773 .machine_check = machine_check_e500,
1743 .platform = "ppce500mc", 1774 .platform = "ppce500mc",
1744 }, 1775 },
@@ -1762,74 +1793,84 @@ static struct cpu_spec __initdata cpu_specs[] = {
1762 1793
1763static struct cpu_spec the_cpu_spec; 1794static struct cpu_spec the_cpu_spec;
1764 1795
1765struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 1796static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
1766{ 1797{
1767 struct cpu_spec *s = cpu_specs;
1768 struct cpu_spec *t = &the_cpu_spec; 1798 struct cpu_spec *t = &the_cpu_spec;
1769 int i; 1799 struct cpu_spec old;
1770 1800
1771 s = PTRRELOC(s);
1772 t = PTRRELOC(t); 1801 t = PTRRELOC(t);
1802 old = *t;
1773 1803
1774 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) 1804 /* Copy everything, then do fixups */
1775 if ((pvr & s->pvr_mask) == s->pvr_value) { 1805 *t = *s;
1776 /*
1777 * If we are overriding a previous value derived
1778 * from the real PVR with a new value obtained
1779 * using a logical PVR value, don't modify the
1780 * performance monitor fields.
1781 */
1782 if (t->num_pmcs && !s->num_pmcs) {
1783 t->cpu_name = s->cpu_name;
1784 t->cpu_features = s->cpu_features;
1785 t->cpu_user_features = s->cpu_user_features;
1786 t->icache_bsize = s->icache_bsize;
1787 t->dcache_bsize = s->dcache_bsize;
1788 t->cpu_setup = s->cpu_setup;
1789 t->cpu_restore = s->cpu_restore;
1790 t->platform = s->platform;
1791 /*
1792 * If we have passed through this logic once
1793 * before and have pulled the default case
1794 * because the real PVR was not found inside
1795 * cpu_specs[], then we are possibly running in
1796 * compatibility mode. In that case, let the
1797 * oprofiler know which set of compatibility
1798 * counters to pull from by making sure the
1799 * oprofile_cpu_type string is set to that of
1800 * compatibility mode. If the oprofile_cpu_type
1801 * already has a value, then we are possibly
1802 * overriding a real PVR with a logical one, and,
1803 * in that case, keep the current value for
1804 * oprofile_cpu_type.
1805 */
1806 if (t->oprofile_cpu_type == NULL)
1807 t->oprofile_cpu_type = s->oprofile_cpu_type;
1808 } else
1809 *t = *s;
1810 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
1811 1806
1812 /* 1807 /*
1813 * Set the base platform string once; assumes 1808 * If we are overriding a previous value derived from the real
1814 * we're called with real pvr first. 1809 * PVR with a new value obtained using a logical PVR value,
1815 */ 1810 * don't modify the performance monitor fields.
1816 if (*PTRRELOC(&powerpc_base_platform) == NULL) 1811 */
1817 *PTRRELOC(&powerpc_base_platform) = t->platform; 1812 if (old.num_pmcs && !s->num_pmcs) {
1813 t->num_pmcs = old.num_pmcs;
1814 t->pmc_type = old.pmc_type;
1815 t->oprofile_type = old.oprofile_type;
1816 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
1817 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
1818 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
1819
1820 /*
1821 * If we have passed through this logic once before and
1822 * have pulled the default case because the real PVR was
1823 * not found inside cpu_specs[], then we are possibly
1824 * running in compatibility mode. In that case, let the
1825 * oprofiler know which set of compatibility counters to
1826 * pull from by making sure the oprofile_cpu_type string
1827 * is set to that of compatibility mode. If the
1828 * oprofile_cpu_type already has a value, then we are
1829 * possibly overriding a real PVR with a logical one,
1830 * and, in that case, keep the current value for
1831 * oprofile_cpu_type.
1832 */
1833 if (old.oprofile_cpu_type == NULL)
1834 t->oprofile_cpu_type = s->oprofile_cpu_type;
1835 }
1836
1837 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
1838
1839 /*
1840 * Set the base platform string once; assumes
1841 * we're called with real pvr first.
1842 */
1843 if (*PTRRELOC(&powerpc_base_platform) == NULL)
1844 *PTRRELOC(&powerpc_base_platform) = t->platform;
1818 1845
1819#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 1846#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
1820 /* ppc64 and booke expect identify_cpu to also call 1847 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
1821 * setup_cpu for that processor. I will consolidate 1848 * that processor. I will consolidate that at a later time, for now,
1822 * that at a later time, for now, just use #ifdef. 1849 * just use #ifdef. We also don't need to PTRRELOC the function
1823 * we also don't need to PTRRELOC the function pointer 1850 * pointer on ppc64 and booke as we are running at 0 in real mode
1824 * on ppc64 and booke as we are running at 0 in real 1851 * on ppc64 and reloc_offset is always 0 on booke.
1825 * mode on ppc64 and reloc_offset is always 0 on booke. 1852 */
1826 */ 1853 if (s->cpu_setup) {
1827 if (s->cpu_setup) { 1854 s->cpu_setup(offset, s);
1828 s->cpu_setup(offset, s); 1855 }
1829 }
1830#endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 1856#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
1857}
1858
1859struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
1860{
1861 struct cpu_spec *s = cpu_specs;
1862 int i;
1863
1864 s = PTRRELOC(s);
1865
1866 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
1867 if ((pvr & s->pvr_mask) == s->pvr_value) {
1868 setup_cpu_spec(offset, s);
1831 return s; 1869 return s;
1832 } 1870 }
1871 }
1872
1833 BUG(); 1873 BUG();
1874
1834 return NULL; 1875 return NULL;
1835} 1876}
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 19671aca6591..5fb667a60894 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -48,7 +48,7 @@ static void __init create_trampoline(unsigned long addr)
48 * branch to "addr" we jump to ("addr" + 32 MB). Although it requires 48 * branch to "addr" we jump to ("addr" + 32 MB). Although it requires
49 * two instructions it doesn't require any registers. 49 * two instructions it doesn't require any registers.
50 */ 50 */
51 patch_instruction(p, PPC_NOP_INSTR); 51 patch_instruction(p, PPC_INST_NOP);
52 patch_branch(++p, addr + PHYSICAL_START, 0); 52 patch_branch(++p, addr + PHYSICAL_START, 0);
53} 53}
54 54
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
new file mode 100644
index 000000000000..1493734cd871
--- /dev/null
+++ b/arch/powerpc/kernel/dbell.c
@@ -0,0 +1,44 @@
1/*
2 * Author: Kumar Gala <galak@kernel.crashing.org>
3 *
4 * Copyright 2009 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/threads.h>
16
17#include <asm/dbell.h>
18
19#ifdef CONFIG_SMP
20unsigned long dbell_smp_message[NR_CPUS];
21
22void smp_dbell_message_pass(int target, int msg)
23{
24 int i;
25
26 if(target < NR_CPUS) {
27 set_bit(msg, &dbell_smp_message[target]);
28 ppc_msgsnd(PPC_DBELL, 0, target);
29 }
30 else if(target == MSG_ALL_BUT_SELF) {
31 for_each_online_cpu(i) {
32 if (i == smp_processor_id())
33 continue;
34 set_bit(msg, &dbell_smp_message[i]);
35 ppc_msgsnd(PPC_DBELL, 0, i);
36 }
37 }
38 else { /* target == MSG_ALL */
39 for_each_online_cpu(i)
40 set_bit(msg, &dbell_smp_message[i]);
41 ppc_msgsnd(PPC_DBELL, PPC_DBELL_MSG_BRDCAST, 0);
42 }
43}
44#endif
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 6f7eb7e00c79..4dd38f129153 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -63,7 +63,7 @@ debug_transfer_to_handler:
63 63
64 .globl crit_transfer_to_handler 64 .globl crit_transfer_to_handler
65crit_transfer_to_handler: 65crit_transfer_to_handler:
66#ifdef CONFIG_FSL_BOOKE 66#ifdef CONFIG_PPC_BOOK3E_MMU
67 mfspr r0,SPRN_MAS0 67 mfspr r0,SPRN_MAS0
68 stw r0,MAS0(r11) 68 stw r0,MAS0(r11)
69 mfspr r0,SPRN_MAS1 69 mfspr r0,SPRN_MAS1
@@ -78,7 +78,7 @@ crit_transfer_to_handler:
78 mfspr r0,SPRN_MAS7 78 mfspr r0,SPRN_MAS7
79 stw r0,MAS7(r11) 79 stw r0,MAS7(r11)
80#endif /* CONFIG_PHYS_64BIT */ 80#endif /* CONFIG_PHYS_64BIT */
81#endif /* CONFIG_FSL_BOOKE */ 81#endif /* CONFIG_PPC_BOOK3E_MMU */
82#ifdef CONFIG_44x 82#ifdef CONFIG_44x
83 mfspr r0,SPRN_MMUCR 83 mfspr r0,SPRN_MMUCR
84 stw r0,MMUCR(r11) 84 stw r0,MMUCR(r11)
@@ -914,7 +914,7 @@ exc_exit_restart_end:
914 mtspr SPRN_##exc_lvl_srr0,r9; \ 914 mtspr SPRN_##exc_lvl_srr0,r9; \
915 mtspr SPRN_##exc_lvl_srr1,r10; 915 mtspr SPRN_##exc_lvl_srr1,r10;
916 916
917#if defined(CONFIG_FSL_BOOKE) 917#if defined(CONFIG_PPC_BOOK3E_MMU)
918#ifdef CONFIG_PHYS_64BIT 918#ifdef CONFIG_PHYS_64BIT
919#define RESTORE_MAS7 \ 919#define RESTORE_MAS7 \
920 lwz r11,MAS7(r1); \ 920 lwz r11,MAS7(r1); \
@@ -956,7 +956,7 @@ ret_from_crit_exc:
956 lwz r10,crit_srr1@l(r10); 956 lwz r10,crit_srr1@l(r10);
957 mtspr SPRN_SRR0,r9; 957 mtspr SPRN_SRR0,r9;
958 mtspr SPRN_SRR1,r10; 958 mtspr SPRN_SRR1,r10;
959 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) 959 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
960#endif /* CONFIG_40x */ 960#endif /* CONFIG_40x */
961 961
962#ifdef CONFIG_BOOKE 962#ifdef CONFIG_BOOKE
@@ -967,7 +967,7 @@ ret_from_crit_exc:
967 stw r10,KSP_LIMIT(r9) 967 stw r10,KSP_LIMIT(r9)
968 RESTORE_xSRR(SRR0,SRR1); 968 RESTORE_xSRR(SRR0,SRR1);
969 RESTORE_MMU_REGS; 969 RESTORE_MMU_REGS;
970 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) 970 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
971 971
972 .globl ret_from_debug_exc 972 .globl ret_from_debug_exc
973ret_from_debug_exc: 973ret_from_debug_exc:
@@ -981,7 +981,7 @@ ret_from_debug_exc:
981 RESTORE_xSRR(SRR0,SRR1); 981 RESTORE_xSRR(SRR0,SRR1);
982 RESTORE_xSRR(CSRR0,CSRR1); 982 RESTORE_xSRR(CSRR0,CSRR1);
983 RESTORE_MMU_REGS; 983 RESTORE_MMU_REGS;
984 RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) 984 RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, PPC_RFDI)
985 985
986 .globl ret_from_mcheck_exc 986 .globl ret_from_mcheck_exc
987ret_from_mcheck_exc: 987ret_from_mcheck_exc:
@@ -992,7 +992,7 @@ ret_from_mcheck_exc:
992 RESTORE_xSRR(CSRR0,CSRR1); 992 RESTORE_xSRR(CSRR0,CSRR1);
993 RESTORE_xSRR(DSRR0,DSRR1); 993 RESTORE_xSRR(DSRR0,DSRR1);
994 RESTORE_MMU_REGS; 994 RESTORE_MMU_REGS;
995 RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) 995 RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, PPC_RFMCI)
996#endif /* CONFIG_BOOKE */ 996#endif /* CONFIG_BOOKE */
997 997
998/* 998/*
@@ -1176,59 +1176,27 @@ _GLOBAL(_mcount)
1176 bctr 1176 bctr
1177 1177
1178_GLOBAL(ftrace_caller) 1178_GLOBAL(ftrace_caller)
1179 /* Based off of objdump optput from glibc */ 1179 MCOUNT_SAVE_FRAME
1180 stwu r1,-48(r1) 1180 /* r3 ends up with link register */
1181 stw r3, 12(r1)
1182 stw r4, 16(r1)
1183 stw r5, 20(r1)
1184 stw r6, 24(r1)
1185 mflr r3
1186 lwz r4, 52(r1)
1187 mfcr r5
1188 stw r7, 28(r1)
1189 stw r8, 32(r1)
1190 stw r9, 36(r1)
1191 stw r10,40(r1)
1192 stw r3, 44(r1)
1193 stw r5, 8(r1)
1194 subi r3, r3, MCOUNT_INSN_SIZE 1181 subi r3, r3, MCOUNT_INSN_SIZE
1195.globl ftrace_call 1182.globl ftrace_call
1196ftrace_call: 1183ftrace_call:
1197 bl ftrace_stub 1184 bl ftrace_stub
1198 nop 1185 nop
1199 lwz r6, 8(r1) 1186#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1200 lwz r0, 44(r1) 1187.globl ftrace_graph_call
1201 lwz r3, 12(r1) 1188ftrace_graph_call:
1202 mtctr r0 1189 b ftrace_graph_stub
1203 lwz r4, 16(r1) 1190_GLOBAL(ftrace_graph_stub)
1204 mtcr r6 1191#endif
1205 lwz r5, 20(r1) 1192 MCOUNT_RESTORE_FRAME
1206 lwz r6, 24(r1) 1193 /* old link register ends up in ctr reg */
1207 lwz r0, 52(r1)
1208 lwz r7, 28(r1)
1209 lwz r8, 32(r1)
1210 mtlr r0
1211 lwz r9, 36(r1)
1212 lwz r10,40(r1)
1213 addi r1, r1, 48
1214 bctr 1194 bctr
1215#else 1195#else
1216_GLOBAL(mcount) 1196_GLOBAL(mcount)
1217_GLOBAL(_mcount) 1197_GLOBAL(_mcount)
1218 stwu r1,-48(r1) 1198
1219 stw r3, 12(r1) 1199 MCOUNT_SAVE_FRAME
1220 stw r4, 16(r1)
1221 stw r5, 20(r1)
1222 stw r6, 24(r1)
1223 mflr r3
1224 lwz r4, 52(r1)
1225 mfcr r5
1226 stw r7, 28(r1)
1227 stw r8, 32(r1)
1228 stw r9, 36(r1)
1229 stw r10,40(r1)
1230 stw r3, 44(r1)
1231 stw r5, 8(r1)
1232 1200
1233 subi r3, r3, MCOUNT_INSN_SIZE 1201 subi r3, r3, MCOUNT_INSN_SIZE
1234 LOAD_REG_ADDR(r5, ftrace_trace_function) 1202 LOAD_REG_ADDR(r5, ftrace_trace_function)
@@ -1236,28 +1204,55 @@ _GLOBAL(_mcount)
1236 1204
1237 mtctr r5 1205 mtctr r5
1238 bctrl 1206 bctrl
1239
1240 nop 1207 nop
1241 1208
1242 lwz r6, 8(r1) 1209#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1243 lwz r0, 44(r1) 1210 b ftrace_graph_caller
1244 lwz r3, 12(r1) 1211#endif
1245 mtctr r0 1212 MCOUNT_RESTORE_FRAME
1246 lwz r4, 16(r1)
1247 mtcr r6
1248 lwz r5, 20(r1)
1249 lwz r6, 24(r1)
1250 lwz r0, 52(r1)
1251 lwz r7, 28(r1)
1252 lwz r8, 32(r1)
1253 mtlr r0
1254 lwz r9, 36(r1)
1255 lwz r10,40(r1)
1256 addi r1, r1, 48
1257 bctr 1213 bctr
1258#endif 1214#endif
1259 1215
1260_GLOBAL(ftrace_stub) 1216_GLOBAL(ftrace_stub)
1261 blr 1217 blr
1262 1218
1219#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1220_GLOBAL(ftrace_graph_caller)
1221 /* load r4 with local address */
1222 lwz r4, 44(r1)
1223 subi r4, r4, MCOUNT_INSN_SIZE
1224
1225 /* get the parent address */
1226 addi r3, r1, 52
1227
1228 bl prepare_ftrace_return
1229 nop
1230
1231 MCOUNT_RESTORE_FRAME
1232 /* old link register ends up in ctr reg */
1233 bctr
1234
1235_GLOBAL(return_to_handler)
1236 /* need to save return values */
1237 stwu r1, -32(r1)
1238 stw r3, 20(r1)
1239 stw r4, 16(r1)
1240 stw r31, 12(r1)
1241 mr r31, r1
1242
1243 bl ftrace_return_to_handler
1244 nop
1245
1246 /* return value has real return address */
1247 mtlr r3
1248
1249 lwz r3, 20(r1)
1250 lwz r4, 16(r1)
1251 lwz r31,12(r1)
1252 lwz r1, 0(r1)
1253
1254 /* Jump back to real return address */
1255 blr
1256#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
1257
1263#endif /* CONFIG_MCOUNT */ 1258#endif /* CONFIG_MCOUNT */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 383ed6eb0085..abfc32330479 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -908,6 +908,12 @@ _GLOBAL(ftrace_caller)
908ftrace_call: 908ftrace_call:
909 bl ftrace_stub 909 bl ftrace_stub
910 nop 910 nop
911#ifdef CONFIG_FUNCTION_GRAPH_TRACER
912.globl ftrace_graph_call
913ftrace_graph_call:
914 b ftrace_graph_stub
915_GLOBAL(ftrace_graph_stub)
916#endif
911 ld r0, 128(r1) 917 ld r0, 128(r1)
912 mtlr r0 918 mtlr r0
913 addi r1, r1, 112 919 addi r1, r1, 112
@@ -931,13 +937,90 @@ _GLOBAL(_mcount)
931 ld r5,0(r5) 937 ld r5,0(r5)
932 mtctr r5 938 mtctr r5
933 bctrl 939 bctrl
934
935 nop 940 nop
941
942
943#ifdef CONFIG_FUNCTION_GRAPH_TRACER
944 b ftrace_graph_caller
945#endif
936 ld r0, 128(r1) 946 ld r0, 128(r1)
937 mtlr r0 947 mtlr r0
938 addi r1, r1, 112 948 addi r1, r1, 112
939_GLOBAL(ftrace_stub) 949_GLOBAL(ftrace_stub)
940 blr 950 blr
941 951
942#endif 952#endif /* CONFIG_DYNAMIC_FTRACE */
943#endif 953
954#ifdef CONFIG_FUNCTION_GRAPH_TRACER
955_GLOBAL(ftrace_graph_caller)
956 /* load r4 with local address */
957 ld r4, 128(r1)
958 subi r4, r4, MCOUNT_INSN_SIZE
959
960 /* get the parent address */
961 ld r11, 112(r1)
962 addi r3, r11, 16
963
964 bl .prepare_ftrace_return
965 nop
966
967 ld r0, 128(r1)
968 mtlr r0
969 addi r1, r1, 112
970 blr
971
972_GLOBAL(return_to_handler)
973 /* need to save return values */
974 std r4, -24(r1)
975 std r3, -16(r1)
976 std r31, -8(r1)
977 mr r31, r1
978 stdu r1, -112(r1)
979
980 bl .ftrace_return_to_handler
981 nop
982
983 /* return value has real return address */
984 mtlr r3
985
986 ld r1, 0(r1)
987 ld r4, -24(r1)
988 ld r3, -16(r1)
989 ld r31, -8(r1)
990
991 /* Jump back to real return address */
992 blr
993
994_GLOBAL(mod_return_to_handler)
995 /* need to save return values */
996 std r4, -32(r1)
997 std r3, -24(r1)
998 /* save TOC */
999 std r2, -16(r1)
1000 std r31, -8(r1)
1001 mr r31, r1
1002 stdu r1, -112(r1)
1003
1004 /*
1005 * We are in a module using the module's TOC.
1006 * Switch to our TOC to run inside the core kernel.
1007 */
1008 LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
1009 ld r2, 8(r4)
1010
1011 bl .ftrace_return_to_handler
1012 nop
1013
1014 /* return value has real return address */
1015 mtlr r3
1016
1017 ld r1, 0(r1)
1018 ld r4, -32(r1)
1019 ld r3, -24(r1)
1020 ld r2, -16(r1)
1021 ld r31, -8(r1)
1022
1023 /* Jump back to real return address */
1024 blr
1025#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
1026#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 60c60ccf5e3c..5b5d16b2cac8 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -5,6 +5,9 @@
5 * 5 *
6 * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box. 6 * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box.
7 * 7 *
8 * Added function graph tracer code, taken from x86 that was written
9 * by Frederic Weisbecker, and ported to PPC by Steven Rostedt.
10 *
8 */ 11 */
9 12
10#include <linux/spinlock.h> 13#include <linux/spinlock.h>
@@ -20,14 +23,6 @@
20#include <asm/code-patching.h> 23#include <asm/code-patching.h>
21#include <asm/ftrace.h> 24#include <asm/ftrace.h>
22 25
23#if 0
24#define DEBUGP printk
25#else
26#define DEBUGP(fmt , ...) do { } while (0)
27#endif
28
29static unsigned int ftrace_nop = PPC_NOP_INSTR;
30
31#ifdef CONFIG_PPC32 26#ifdef CONFIG_PPC32
32# define GET_ADDR(addr) addr 27# define GET_ADDR(addr) addr
33#else 28#else
@@ -35,37 +30,23 @@ static unsigned int ftrace_nop = PPC_NOP_INSTR;
35# define GET_ADDR(addr) (*(unsigned long *)addr) 30# define GET_ADDR(addr) (*(unsigned long *)addr)
36#endif 31#endif
37 32
38 33#ifdef CONFIG_DYNAMIC_FTRACE
39static unsigned int ftrace_calc_offset(long ip, long addr) 34static unsigned int ftrace_nop_replace(void)
40{ 35{
41 return (int)(addr - ip); 36 return PPC_INST_NOP;
42} 37}
43 38
44static unsigned char *ftrace_nop_replace(void) 39static unsigned int
40ftrace_call_replace(unsigned long ip, unsigned long addr, int link)
45{ 41{
46 return (char *)&ftrace_nop; 42 unsigned int op;
47}
48
49static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
50{
51 static unsigned int op;
52 43
53 /*
54 * It would be nice to just use create_function_call, but that will
55 * update the code itself. Here we need to just return the
56 * instruction that is going to be modified, without modifying the
57 * code.
58 */
59 addr = GET_ADDR(addr); 44 addr = GET_ADDR(addr);
60 45
61 /* Set to "bl addr" */ 46 /* if (link) set op to 'bl' else 'b' */
62 op = 0x48000001 | (ftrace_calc_offset(ip, addr) & 0x03fffffc); 47 op = create_branch((unsigned int *)ip, addr, link ? 1 : 0);
63 48
64 /* 49 return op;
65 * No locking needed, this must be called via kstop_machine
66 * which in essence is like running on a uniprocessor machine.
67 */
68 return (unsigned char *)&op;
69} 50}
70 51
71#ifdef CONFIG_PPC64 52#ifdef CONFIG_PPC64
@@ -77,10 +58,9 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
77#endif 58#endif
78 59
79static int 60static int
80ftrace_modify_code(unsigned long ip, unsigned char *old_code, 61ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
81 unsigned char *new_code)
82{ 62{
83 unsigned char replaced[MCOUNT_INSN_SIZE]; 63 unsigned int replaced;
84 64
85 /* 65 /*
86 * Note: Due to modules and __init, code can 66 * Note: Due to modules and __init, code can
@@ -93,15 +73,15 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
93 */ 73 */
94 74
95 /* read the text we want to modify */ 75 /* read the text we want to modify */
96 if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE)) 76 if (probe_kernel_read(&replaced, (void *)ip, MCOUNT_INSN_SIZE))
97 return -EFAULT; 77 return -EFAULT;
98 78
99 /* Make sure it is what we expect it to be */ 79 /* Make sure it is what we expect it to be */
100 if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0) 80 if (replaced != old)
101 return -EINVAL; 81 return -EINVAL;
102 82
103 /* replace the text with the new text */ 83 /* replace the text with the new text */
104 if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) 84 if (probe_kernel_write((void *)ip, &new, MCOUNT_INSN_SIZE))
105 return -EPERM; 85 return -EPERM;
106 86
107 flush_icache_range(ip, ip + 8); 87 flush_icache_range(ip, ip + 8);
@@ -119,6 +99,8 @@ static int test_24bit_addr(unsigned long ip, unsigned long addr)
119 return create_branch((unsigned int *)ip, addr, 0); 99 return create_branch((unsigned int *)ip, addr, 0);
120} 100}
121 101
102#ifdef CONFIG_MODULES
103
122static int is_bl_op(unsigned int op) 104static int is_bl_op(unsigned int op)
123{ 105{
124 return (op & 0xfc000003) == 0x48000001; 106 return (op & 0xfc000003) == 0x48000001;
@@ -175,7 +157,7 @@ __ftrace_make_nop(struct module *mod,
175 * 0xe8, 0x4c, 0x00, 0x28, ld r2,40(r12) 157 * 0xe8, 0x4c, 0x00, 0x28, ld r2,40(r12)
176 */ 158 */
177 159
178 DEBUGP("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc); 160 pr_debug("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc);
179 161
180 /* Find where the trampoline jumps to */ 162 /* Find where the trampoline jumps to */
181 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { 163 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
@@ -183,7 +165,7 @@ __ftrace_make_nop(struct module *mod,
183 return -EFAULT; 165 return -EFAULT;
184 } 166 }
185 167
186 DEBUGP(" %08x %08x", jmp[0], jmp[1]); 168 pr_debug(" %08x %08x", jmp[0], jmp[1]);
187 169
188 /* verify that this is what we expect it to be */ 170 /* verify that this is what we expect it to be */
189 if (((jmp[0] & 0xffff0000) != 0x3d820000) || 171 if (((jmp[0] & 0xffff0000) != 0x3d820000) ||
@@ -199,18 +181,18 @@ __ftrace_make_nop(struct module *mod,
199 offset = ((unsigned)((unsigned short)jmp[0]) << 16) + 181 offset = ((unsigned)((unsigned short)jmp[0]) << 16) +
200 (int)((short)jmp[1]); 182 (int)((short)jmp[1]);
201 183
202 DEBUGP(" %x ", offset); 184 pr_debug(" %x ", offset);
203 185
204 /* get the address this jumps too */ 186 /* get the address this jumps too */
205 tramp = mod->arch.toc + offset + 32; 187 tramp = mod->arch.toc + offset + 32;
206 DEBUGP("toc: %lx", tramp); 188 pr_debug("toc: %lx", tramp);
207 189
208 if (probe_kernel_read(jmp, (void *)tramp, 8)) { 190 if (probe_kernel_read(jmp, (void *)tramp, 8)) {
209 printk(KERN_ERR "Failed to read %lx\n", tramp); 191 printk(KERN_ERR "Failed to read %lx\n", tramp);
210 return -EFAULT; 192 return -EFAULT;
211 } 193 }
212 194
213 DEBUGP(" %08x %08x\n", jmp[0], jmp[1]); 195 pr_debug(" %08x %08x\n", jmp[0], jmp[1]);
214 196
215 ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; 197 ptr = ((unsigned long)jmp[0] << 32) + jmp[1];
216 198
@@ -287,7 +269,7 @@ __ftrace_make_nop(struct module *mod,
287 * 0x4e, 0x80, 0x04, 0x20 bctr 269 * 0x4e, 0x80, 0x04, 0x20 bctr
288 */ 270 */
289 271
290 DEBUGP("ip:%lx jumps to %lx", ip, tramp); 272 pr_debug("ip:%lx jumps to %lx", ip, tramp);
291 273
292 /* Find where the trampoline jumps to */ 274 /* Find where the trampoline jumps to */
293 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { 275 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
@@ -295,7 +277,7 @@ __ftrace_make_nop(struct module *mod,
295 return -EFAULT; 277 return -EFAULT;
296 } 278 }
297 279
298 DEBUGP(" %08x %08x ", jmp[0], jmp[1]); 280 pr_debug(" %08x %08x ", jmp[0], jmp[1]);
299 281
300 /* verify that this is what we expect it to be */ 282 /* verify that this is what we expect it to be */
301 if (((jmp[0] & 0xffff0000) != 0x3d600000) || 283 if (((jmp[0] & 0xffff0000) != 0x3d600000) ||
@@ -311,7 +293,7 @@ __ftrace_make_nop(struct module *mod,
311 if (tramp & 0x8000) 293 if (tramp & 0x8000)
312 tramp -= 0x10000; 294 tramp -= 0x10000;
313 295
314 DEBUGP(" %x ", tramp); 296 pr_debug(" %x ", tramp);
315 297
316 if (tramp != addr) { 298 if (tramp != addr) {
317 printk(KERN_ERR 299 printk(KERN_ERR
@@ -320,7 +302,7 @@ __ftrace_make_nop(struct module *mod,
320 return -EINVAL; 302 return -EINVAL;
321 } 303 }
322 304
323 op = PPC_NOP_INSTR; 305 op = PPC_INST_NOP;
324 306
325 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) 307 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
326 return -EPERM; 308 return -EPERM;
@@ -330,12 +312,13 @@ __ftrace_make_nop(struct module *mod,
330 return 0; 312 return 0;
331} 313}
332#endif /* PPC64 */ 314#endif /* PPC64 */
315#endif /* CONFIG_MODULES */
333 316
334int ftrace_make_nop(struct module *mod, 317int ftrace_make_nop(struct module *mod,
335 struct dyn_ftrace *rec, unsigned long addr) 318 struct dyn_ftrace *rec, unsigned long addr)
336{ 319{
337 unsigned char *old, *new;
338 unsigned long ip = rec->ip; 320 unsigned long ip = rec->ip;
321 unsigned int old, new;
339 322
340 /* 323 /*
341 * If the calling address is more that 24 bits away, 324 * If the calling address is more that 24 bits away,
@@ -344,11 +327,12 @@ int ftrace_make_nop(struct module *mod,
344 */ 327 */
345 if (test_24bit_addr(ip, addr)) { 328 if (test_24bit_addr(ip, addr)) {
346 /* within range */ 329 /* within range */
347 old = ftrace_call_replace(ip, addr); 330 old = ftrace_call_replace(ip, addr, 1);
348 new = ftrace_nop_replace(); 331 new = ftrace_nop_replace();
349 return ftrace_modify_code(ip, old, new); 332 return ftrace_modify_code(ip, old, new);
350 } 333 }
351 334
335#ifdef CONFIG_MODULES
352 /* 336 /*
353 * Out of range jumps are called from modules. 337 * Out of range jumps are called from modules.
354 * We should either already have a pointer to the module 338 * We should either already have a pointer to the module
@@ -373,9 +357,13 @@ int ftrace_make_nop(struct module *mod,
373 mod = rec->arch.mod; 357 mod = rec->arch.mod;
374 358
375 return __ftrace_make_nop(mod, rec, addr); 359 return __ftrace_make_nop(mod, rec, addr);
376 360#else
361 /* We should not get here without modules */
362 return -EINVAL;
363#endif /* CONFIG_MODULES */
377} 364}
378 365
366#ifdef CONFIG_MODULES
379#ifdef CONFIG_PPC64 367#ifdef CONFIG_PPC64
380static int 368static int
381__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) 369__ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
@@ -392,7 +380,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
392 * b +8; ld r2,40(r1) 380 * b +8; ld r2,40(r1)
393 */ 381 */
394 if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) && 382 if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) &&
395 ((op[0] != PPC_NOP_INSTR) || (op[1] != PPC_NOP_INSTR))) { 383 ((op[0] != PPC_INST_NOP) || (op[1] != PPC_INST_NOP))) {
396 printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]); 384 printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]);
397 return -EINVAL; 385 return -EINVAL;
398 } 386 }
@@ -414,7 +402,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
414 /* ld r2,40(r1) */ 402 /* ld r2,40(r1) */
415 op[1] = 0xe8410028; 403 op[1] = 0xe8410028;
416 404
417 DEBUGP("write to %lx\n", rec->ip); 405 pr_debug("write to %lx\n", rec->ip);
418 406
419 if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2)) 407 if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2))
420 return -EPERM; 408 return -EPERM;
@@ -435,7 +423,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
435 return -EFAULT; 423 return -EFAULT;
436 424
437 /* It should be pointing to a nop */ 425 /* It should be pointing to a nop */
438 if (op != PPC_NOP_INSTR) { 426 if (op != PPC_INST_NOP) {
439 printk(KERN_ERR "Expected NOP but have %x\n", op); 427 printk(KERN_ERR "Expected NOP but have %x\n", op);
440 return -EINVAL; 428 return -EINVAL;
441 } 429 }
@@ -454,7 +442,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
454 return -EINVAL; 442 return -EINVAL;
455 } 443 }
456 444
457 DEBUGP("write to %lx\n", rec->ip); 445 pr_debug("write to %lx\n", rec->ip);
458 446
459 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) 447 if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
460 return -EPERM; 448 return -EPERM;
@@ -464,11 +452,12 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
464 return 0; 452 return 0;
465} 453}
466#endif /* CONFIG_PPC64 */ 454#endif /* CONFIG_PPC64 */
455#endif /* CONFIG_MODULES */
467 456
468int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) 457int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
469{ 458{
470 unsigned char *old, *new;
471 unsigned long ip = rec->ip; 459 unsigned long ip = rec->ip;
460 unsigned int old, new;
472 461
473 /* 462 /*
474 * If the calling address is more that 24 bits away, 463 * If the calling address is more that 24 bits away,
@@ -478,10 +467,11 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
478 if (test_24bit_addr(ip, addr)) { 467 if (test_24bit_addr(ip, addr)) {
479 /* within range */ 468 /* within range */
480 old = ftrace_nop_replace(); 469 old = ftrace_nop_replace();
481 new = ftrace_call_replace(ip, addr); 470 new = ftrace_call_replace(ip, addr, 1);
482 return ftrace_modify_code(ip, old, new); 471 return ftrace_modify_code(ip, old, new);
483 } 472 }
484 473
474#ifdef CONFIG_MODULES
485 /* 475 /*
486 * Out of range jumps are called from modules. 476 * Out of range jumps are called from modules.
487 * Being that we are converting from nop, it had better 477 * Being that we are converting from nop, it had better
@@ -493,16 +483,20 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
493 } 483 }
494 484
495 return __ftrace_make_call(rec, addr); 485 return __ftrace_make_call(rec, addr);
486#else
487 /* We should not get here without modules */
488 return -EINVAL;
489#endif /* CONFIG_MODULES */
496} 490}
497 491
498int ftrace_update_ftrace_func(ftrace_func_t func) 492int ftrace_update_ftrace_func(ftrace_func_t func)
499{ 493{
500 unsigned long ip = (unsigned long)(&ftrace_call); 494 unsigned long ip = (unsigned long)(&ftrace_call);
501 unsigned char old[MCOUNT_INSN_SIZE], *new; 495 unsigned int old, new;
502 int ret; 496 int ret;
503 497
504 memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE); 498 old = *(unsigned int *)&ftrace_call;
505 new = ftrace_call_replace(ip, (unsigned long)func); 499 new = ftrace_call_replace(ip, (unsigned long)func, 1);
506 ret = ftrace_modify_code(ip, old, new); 500 ret = ftrace_modify_code(ip, old, new);
507 501
508 return ret; 502 return ret;
@@ -517,3 +511,115 @@ int __init ftrace_dyn_arch_init(void *data)
517 511
518 return 0; 512 return 0;
519} 513}
514#endif /* CONFIG_DYNAMIC_FTRACE */
515
516#ifdef CONFIG_FUNCTION_GRAPH_TRACER
517
518#ifdef CONFIG_DYNAMIC_FTRACE
519extern void ftrace_graph_call(void);
520extern void ftrace_graph_stub(void);
521
522int ftrace_enable_ftrace_graph_caller(void)
523{
524 unsigned long ip = (unsigned long)(&ftrace_graph_call);
525 unsigned long addr = (unsigned long)(&ftrace_graph_caller);
526 unsigned long stub = (unsigned long)(&ftrace_graph_stub);
527 unsigned int old, new;
528
529 old = ftrace_call_replace(ip, stub, 0);
530 new = ftrace_call_replace(ip, addr, 0);
531
532 return ftrace_modify_code(ip, old, new);
533}
534
535int ftrace_disable_ftrace_graph_caller(void)
536{
537 unsigned long ip = (unsigned long)(&ftrace_graph_call);
538 unsigned long addr = (unsigned long)(&ftrace_graph_caller);
539 unsigned long stub = (unsigned long)(&ftrace_graph_stub);
540 unsigned int old, new;
541
542 old = ftrace_call_replace(ip, addr, 0);
543 new = ftrace_call_replace(ip, stub, 0);
544
545 return ftrace_modify_code(ip, old, new);
546}
547#endif /* CONFIG_DYNAMIC_FTRACE */
548
549#ifdef CONFIG_PPC64
550extern void mod_return_to_handler(void);
551#endif
552
553/*
554 * Hook the return address and push it in the stack of return addrs
555 * in current thread info.
556 */
557void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
558{
559 unsigned long old;
560 unsigned long long calltime;
561 int faulted;
562 struct ftrace_graph_ent trace;
563 unsigned long return_hooker = (unsigned long)&return_to_handler;
564
565 if (unlikely(atomic_read(&current->tracing_graph_pause)))
566 return;
567
568#if CONFIG_PPC64
569 /* non core kernel code needs to save and restore the TOC */
570 if (REGION_ID(self_addr) != KERNEL_REGION_ID)
571 return_hooker = (unsigned long)&mod_return_to_handler;
572#endif
573
574 return_hooker = GET_ADDR(return_hooker);
575
576 /*
577 * Protect against fault, even if it shouldn't
578 * happen. This tool is too much intrusive to
579 * ignore such a protection.
580 */
581 asm volatile(
582 "1: " PPC_LL "%[old], 0(%[parent])\n"
583 "2: " PPC_STL "%[return_hooker], 0(%[parent])\n"
584 " li %[faulted], 0\n"
585 "3:\n"
586
587 ".section .fixup, \"ax\"\n"
588 "4: li %[faulted], 1\n"
589 " b 3b\n"
590 ".previous\n"
591
592 ".section __ex_table,\"a\"\n"
593 PPC_LONG_ALIGN "\n"
594 PPC_LONG "1b,4b\n"
595 PPC_LONG "2b,4b\n"
596 ".previous"
597
598 : [old] "=r" (old), [faulted] "=r" (faulted)
599 : [parent] "r" (parent), [return_hooker] "r" (return_hooker)
600 : "memory"
601 );
602
603 if (unlikely(faulted)) {
604 ftrace_graph_stop();
605 WARN_ON(1);
606 return;
607 }
608
609 calltime = cpu_clock(raw_smp_processor_id());
610
611 if (ftrace_push_return_trace(old, calltime,
612 self_addr, &trace.depth) == -EBUSY) {
613 *parent = old;
614 return;
615 }
616
617 trace.func = self_addr;
618
619 /* Only trace if the calling function expects to */
620 if (!ftrace_graph_entry(&trace)) {
621 current->curr_ret_stack--;
622 *parent = old;
623 }
624}
625#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index d794a637e421..d0bad4b93a9c 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -108,18 +108,21 @@ __start:
108 * because OF may have I/O devices mapped into that area 108 * because OF may have I/O devices mapped into that area
109 * (particularly on CHRP). 109 * (particularly on CHRP).
110 */ 110 */
111#ifdef CONFIG_PPC_MULTIPLATFORM
112 cmpwi 0,r5,0 111 cmpwi 0,r5,0
113 beq 1f 112 beq 1f
114 113
114#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
115 /* find out where we are now */ 115 /* find out where we are now */
116 bcl 20,31,$+4 116 bcl 20,31,$+4
1170: mflr r8 /* r8 = runtime addr here */ 1170: mflr r8 /* r8 = runtime addr here */
118 addis r8,r8,(_stext - 0b)@ha 118 addis r8,r8,(_stext - 0b)@ha
119 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ 119 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */
120 bl prom_init 120 bl prom_init
121#endif /* CONFIG_PPC_OF_BOOT_TRAMPOLINE */
122
123 /* We never return. We also hit that trap if trying to boot
124 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
121 trap 125 trap
122#endif
123 126
124/* 127/*
125 * Check for BootX signature when supporting PowerMac and branch to 128 * Check for BootX signature when supporting PowerMac and branch to
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index ebaedafc8e67..50ef505b8fb6 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1360,6 +1360,7 @@ _GLOBAL(__start_initialization_multiplatform)
1360 b .__after_prom_start 1360 b .__after_prom_start
1361 1361
1362_INIT_STATIC(__boot_from_prom) 1362_INIT_STATIC(__boot_from_prom)
1363#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
1363 /* Save parameters */ 1364 /* Save parameters */
1364 mr r31,r3 1365 mr r31,r3
1365 mr r30,r4 1366 mr r30,r4
@@ -1390,7 +1391,10 @@ _INIT_STATIC(__boot_from_prom)
1390 /* Do all of the interaction with OF client interface */ 1391 /* Do all of the interaction with OF client interface */
1391 mr r8,r26 1392 mr r8,r26
1392 bl .prom_init 1393 bl .prom_init
1393 /* We never return */ 1394#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
1395
1396 /* We never return. We also hit that trap if trying to boot
1397 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
1394 trap 1398 trap
1395 1399
1396_STATIC(__after_prom_start) 1400_STATIC(__after_prom_start)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index fce2df988504..95f39f1e68d4 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -10,6 +10,15 @@
10 mtspr SPRN_IVOR##vector_number,r26; \ 10 mtspr SPRN_IVOR##vector_number,r26; \
11 sync 11 sync
12 12
13#if (THREAD_SHIFT < 15)
14#define ALLOC_STACK_FRAME(reg, val) \
15 addi reg,reg,val
16#else
17#define ALLOC_STACK_FRAME(reg, val) \
18 addis reg,reg,val@ha; \
19 addi reg,reg,val@l
20#endif
21
13#define NORMAL_EXCEPTION_PROLOG \ 22#define NORMAL_EXCEPTION_PROLOG \
14 mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ 23 mtspr SPRN_SPRG0,r10; /* save two registers to work with */\
15 mtspr SPRN_SPRG1,r11; \ 24 mtspr SPRN_SPRG1,r11; \
@@ -20,7 +29,7 @@
20 beq 1f; \ 29 beq 1f; \
21 mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ 30 mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\
22 lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ 31 lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\
23 addi r1,r1,THREAD_SIZE; \ 32 ALLOC_STACK_FRAME(r1, THREAD_SIZE); \
241: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ 331: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\
25 mr r11,r1; \ 34 mr r11,r1; \
26 stw r10,_CCR(r11); /* save various registers */\ 35 stw r10,_CCR(r11); /* save various registers */\
@@ -70,10 +79,10 @@
70 79
71/* only on e500mc/e200 */ 80/* only on e500mc/e200 */
72#define DEBUG_STACK_BASE dbgirq_ctx 81#define DEBUG_STACK_BASE dbgirq_ctx
73#ifdef CONFIG_PPC_E500MC 82#ifdef CONFIG_E200
74#define DEBUG_SPRG SPRN_SPRG9
75#else
76#define DEBUG_SPRG SPRN_SPRG6W 83#define DEBUG_SPRG SPRN_SPRG6W
84#else
85#define DEBUG_SPRG SPRN_SPRG9
77#endif 86#endif
78 87
79#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) 88#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
@@ -279,7 +288,7 @@ label:
279 lwz r11,GPR11(r8); \ 288 lwz r11,GPR11(r8); \
280 mfspr r8,DEBUG_SPRG; \ 289 mfspr r8,DEBUG_SPRG; \
281 \ 290 \
282 RFDI; \ 291 PPC_RFDI; \
283 b .; \ 292 b .; \
284 \ 293 \
285 /* continue normal handling for a debug exception... */ \ 294 /* continue normal handling for a debug exception... */ \
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 36ffb3504a4f..4c22620d009b 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -103,10 +103,15 @@ invstr: mflr r6 /* Make it accessible */
103 or r7,r7,r4 103 or r7,r7,r4
104 mtspr SPRN_MAS6,r7 104 mtspr SPRN_MAS6,r7
105 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ 105 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
106#ifndef CONFIG_E200
107 mfspr r7,SPRN_MAS1 106 mfspr r7,SPRN_MAS1
108 andis. r7,r7,MAS1_VALID@h 107 andis. r7,r7,MAS1_VALID@h
109 bne match_TLB 108 bne match_TLB
109
110 mfspr r7,SPRN_MMUCFG
111 rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */
112 cmpwi r7,3
113 bne match_TLB /* skip if NPIDS != 3 */
114
110 mfspr r7,SPRN_PID1 115 mfspr r7,SPRN_PID1
111 slwi r7,r7,16 116 slwi r7,r7,16
112 or r7,r7,r4 117 or r7,r7,r4
@@ -120,7 +125,7 @@ invstr: mflr r6 /* Make it accessible */
120 or r7,r7,r4 125 or r7,r7,r4
121 mtspr SPRN_MAS6,r7 126 mtspr SPRN_MAS6,r7
122 tlbsx 0,r6 /* Fall through, we had to match */ 127 tlbsx 0,r6 /* Fall through, we had to match */
123#endif 128
124match_TLB: 129match_TLB:
125 mfspr r7,SPRN_MAS0 130 mfspr r7,SPRN_MAS0
126 rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ 131 rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
@@ -168,7 +173,7 @@ skpinv: addi r6,r6,1 /* Increment */
168 173
169 /* grab and fixup the RPN */ 174 /* grab and fixup the RPN */
170 mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */ 175 mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */
171 rlwinm r6,r6,25,27,30 176 rlwinm r6,r6,25,27,31
172 li r8,-1 177 li r8,-1
173 addi r6,r6,10 178 addi r6,r6,10
174 slw r6,r8,r6 /* convert to mask */ 179 slw r6,r8,r6 /* convert to mask */
@@ -194,7 +199,7 @@ skpinv: addi r6,r6,1 /* Increment */
194 xori r6,r4,1 /* Setup TMP mapping in the other Address space */ 199 xori r6,r4,1 /* Setup TMP mapping in the other Address space */
195 slwi r6,r6,12 200 slwi r6,r6,12
196 oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h 201 oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h
197 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l 202 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l
198 mtspr SPRN_MAS1,r6 203 mtspr SPRN_MAS1,r6
199 mfspr r6,SPRN_MAS2 204 mfspr r6,SPRN_MAS2
200 li r7,0 /* temp EPN = 0 */ 205 li r7,0 /* temp EPN = 0 */
@@ -215,14 +220,19 @@ skpinv: addi r6,r6,1 /* Increment */
215 220
216/* 4. Clear out PIDs & Search info */ 221/* 4. Clear out PIDs & Search info */
217 li r6,0 222 li r6,0
223 mtspr SPRN_MAS6,r6
218 mtspr SPRN_PID0,r6 224 mtspr SPRN_PID0,r6
219#ifndef CONFIG_E200 225
226 mfspr r7,SPRN_MMUCFG
227 rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */
228 cmpwi r7,3
229 bne 2f /* skip if NPIDS != 3 */
230
220 mtspr SPRN_PID1,r6 231 mtspr SPRN_PID1,r6
221 mtspr SPRN_PID2,r6 232 mtspr SPRN_PID2,r6
222#endif
223 mtspr SPRN_MAS6,r6
224 233
225/* 5. Invalidate mapping we started in */ 234/* 5. Invalidate mapping we started in */
2352:
226 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ 236 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
227 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ 237 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
228 mtspr SPRN_MAS0,r7 238 mtspr SPRN_MAS0,r7
@@ -247,10 +257,10 @@ skpinv: addi r6,r6,1 /* Increment */
247 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ 257 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
248 mtspr SPRN_MAS0,r6 258 mtspr SPRN_MAS0,r6
249 lis r6,(MAS1_VALID|MAS1_IPROT)@h 259 lis r6,(MAS1_VALID|MAS1_IPROT)@h
250 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l 260 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
251 mtspr SPRN_MAS1,r6 261 mtspr SPRN_MAS1,r6
252 lis r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@h 262 lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h
253 ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@l 263 ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l
254 mtspr SPRN_MAS2,r6 264 mtspr SPRN_MAS2,r6
255 mtspr SPRN_MAS3,r8 265 mtspr SPRN_MAS3,r8
256 tlbwe 266 tlbwe
@@ -298,26 +308,14 @@ skpinv: addi r6,r6,1 /* Increment */
298 SET_IVOR(12, WatchdogTimer); 308 SET_IVOR(12, WatchdogTimer);
299 SET_IVOR(13, DataTLBError); 309 SET_IVOR(13, DataTLBError);
300 SET_IVOR(14, InstructionTLBError); 310 SET_IVOR(14, InstructionTLBError);
301 SET_IVOR(15, DebugDebug);
302#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
303 SET_IVOR(15, DebugCrit); 311 SET_IVOR(15, DebugCrit);
304#endif
305 SET_IVOR(32, SPEUnavailable);
306 SET_IVOR(33, SPEFloatingPointData);
307 SET_IVOR(34, SPEFloatingPointRound);
308#ifndef CONFIG_E200
309 SET_IVOR(35, PerformanceMonitor);
310#endif
311#ifdef CONFIG_PPC_E500MC
312 SET_IVOR(36, Doorbell);
313#endif
314 312
315 /* Establish the interrupt vector base */ 313 /* Establish the interrupt vector base */
316 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 314 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
317 mtspr SPRN_IVPR,r4 315 mtspr SPRN_IVPR,r4
318 316
319 /* Setup the defaults for TLB entries */ 317 /* Setup the defaults for TLB entries */
320 li r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l 318 li r2,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
321#ifdef CONFIG_E200 319#ifdef CONFIG_E200
322 oris r2,r2,MAS4_TLBSELD(1)@h 320 oris r2,r2,MAS4_TLBSELD(1)@h
323#endif 321#endif
@@ -329,12 +327,6 @@ skpinv: addi r6,r6,1 /* Increment */
329 oris r2,r2,HID0_DOZE@h 327 oris r2,r2,HID0_DOZE@h
330 mtspr SPRN_HID0, r2 328 mtspr SPRN_HID0, r2
331#endif 329#endif
332#ifdef CONFIG_E200
333 /* enable dedicated debug exception handling resources (Debug APU) */
334 mfspr r2,SPRN_HID0
335 ori r2,r2,HID0_DAPUEN@l
336 mtspr SPRN_HID0,r2
337#endif
338 330
339#if !defined(CONFIG_BDI_SWITCH) 331#if !defined(CONFIG_BDI_SWITCH)
340 /* 332 /*
@@ -706,15 +698,13 @@ interrupt_base:
706 /* Performance Monitor */ 698 /* Performance Monitor */
707 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) 699 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
708 700
709#ifdef CONFIG_PPC_E500MC 701 EXCEPTION(0x2070, Doorbell, doorbell_exception, EXC_XFER_STD)
710 EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD) 702
711#endif 703 CRITICAL_EXCEPTION(0x2080, CriticalDoorbell, unknown_exception)
712 704
713 /* Debug Interrupt */ 705 /* Debug Interrupt */
714 DEBUG_DEBUG_EXCEPTION 706 DEBUG_DEBUG_EXCEPTION
715#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
716 DEBUG_CRIT_EXCEPTION 707 DEBUG_CRIT_EXCEPTION
717#endif
718 708
719/* 709/*
720 * Local functions 710 * Local functions
@@ -897,6 +887,47 @@ KernelSPE:
897 * Global functions 887 * Global functions
898 */ 888 */
899 889
890/* Adjust or setup IVORs for e200 */
891_GLOBAL(__setup_e200_ivors)
892 li r3,DebugDebug@l
893 mtspr SPRN_IVOR15,r3
894 li r3,SPEUnavailable@l
895 mtspr SPRN_IVOR32,r3
896 li r3,SPEFloatingPointData@l
897 mtspr SPRN_IVOR33,r3
898 li r3,SPEFloatingPointRound@l
899 mtspr SPRN_IVOR34,r3
900 sync
901 blr
902
903/* Adjust or setup IVORs for e500v1/v2 */
904_GLOBAL(__setup_e500_ivors)
905 li r3,DebugCrit@l
906 mtspr SPRN_IVOR15,r3
907 li r3,SPEUnavailable@l
908 mtspr SPRN_IVOR32,r3
909 li r3,SPEFloatingPointData@l
910 mtspr SPRN_IVOR33,r3
911 li r3,SPEFloatingPointRound@l
912 mtspr SPRN_IVOR34,r3
913 li r3,PerformanceMonitor@l
914 mtspr SPRN_IVOR35,r3
915 sync
916 blr
917
918/* Adjust or setup IVORs for e500mc */
919_GLOBAL(__setup_e500mc_ivors)
920 li r3,DebugDebug@l
921 mtspr SPRN_IVOR15,r3
922 li r3,PerformanceMonitor@l
923 mtspr SPRN_IVOR35,r3
924 li r3,Doorbell@l
925 mtspr SPRN_IVOR36,r3
926 li r3,CriticalDoorbell@l
927 mtspr SPRN_IVOR37,r3
928 sync
929 blr
930
900/* 931/*
901 * extern void loadcam_entry(unsigned int index) 932 * extern void loadcam_entry(unsigned int index)
902 * 933 *
@@ -1089,7 +1120,7 @@ __secondary_start:
1089 mtspr SPRN_SPRG3,r4 1120 mtspr SPRN_SPRG3,r4
1090 1121
1091 /* Setup the defaults for TLB entries */ 1122 /* Setup the defaults for TLB entries */
1092 li r4,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l 1123 li r4,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
1093 mtspr SPRN_MAS4,r4 1124 mtspr SPRN_MAS4,r4
1094 1125
1095 /* Jump to start_secondary */ 1126 /* Jump to start_secondary */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 23b8b5e36f98..48ea2008b20d 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -171,7 +171,7 @@ int show_interrupts(struct seq_file *p, void *v)
171{ 171{
172 int i = *(loff_t *)v, j; 172 int i = *(loff_t *)v, j;
173 struct irqaction *action; 173 struct irqaction *action;
174 irq_desc_t *desc; 174 struct irq_desc *desc;
175 unsigned long flags; 175 unsigned long flags;
176 176
177 if (i == 0) { 177 if (i == 0) {
@@ -1038,7 +1038,7 @@ arch_initcall(irq_late_init);
1038static int virq_debug_show(struct seq_file *m, void *private) 1038static int virq_debug_show(struct seq_file *m, void *private)
1039{ 1039{
1040 unsigned long flags; 1040 unsigned long flags;
1041 irq_desc_t *desc; 1041 struct irq_desc *desc;
1042 const char *p; 1042 const char *p;
1043 char none[] = "none"; 1043 char none[] = "none";
1044 int i; 1044 int i;
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 8992b031a7b6..8fbb12508bf3 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -329,7 +329,7 @@ static unsigned long stub_for_addr(Elf64_Shdr *sechdrs,
329 restore r2. */ 329 restore r2. */
330static int restore_r2(u32 *instruction, struct module *me) 330static int restore_r2(u32 *instruction, struct module *me)
331{ 331{
332 if (*instruction != PPC_NOP_INSTR) { 332 if (*instruction != PPC_INST_NOP) {
333 printk("%s: Expect noop after relocate, got %08x\n", 333 printk("%s: Expect noop after relocate, got %08x\n",
334 me->name, *instruction); 334 me->name, *instruction);
335 return 0; 335 return 0;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f4181272311..2603f20984c4 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -38,6 +38,7 @@
38#include <asm/eeh.h> 38#include <asm/eeh.h>
39 39
40static DEFINE_SPINLOCK(hose_spinlock); 40static DEFINE_SPINLOCK(hose_spinlock);
41LIST_HEAD(hose_list);
41 42
42/* XXX kill that some day ... */ 43/* XXX kill that some day ... */
43static int global_phb_number; /* Global phb counter */ 44static int global_phb_number; /* Global phb counter */
@@ -113,19 +114,24 @@ void pcibios_free_controller(struct pci_controller *phb)
113 kfree(phb); 114 kfree(phb);
114} 115}
115 116
117static resource_size_t pcibios_io_size(const struct pci_controller *hose)
118{
119#ifdef CONFIG_PPC64
120 return hose->pci_io_size;
121#else
122 return hose->io_resource.end - hose->io_resource.start + 1;
123#endif
124}
125
116int pcibios_vaddr_is_ioport(void __iomem *address) 126int pcibios_vaddr_is_ioport(void __iomem *address)
117{ 127{
118 int ret = 0; 128 int ret = 0;
119 struct pci_controller *hose; 129 struct pci_controller *hose;
120 unsigned long size; 130 resource_size_t size;
121 131
122 spin_lock(&hose_spinlock); 132 spin_lock(&hose_spinlock);
123 list_for_each_entry(hose, &hose_list, list_node) { 133 list_for_each_entry(hose, &hose_list, list_node) {
124#ifdef CONFIG_PPC64 134 size = pcibios_io_size(hose);
125 size = hose->pci_io_size;
126#else
127 size = hose->io_resource.end - hose->io_resource.start + 1;
128#endif
129 if (address >= hose->io_base_virt && 135 if (address >= hose->io_base_virt &&
130 address < (hose->io_base_virt + size)) { 136 address < (hose->io_base_virt + size)) {
131 ret = 1; 137 ret = 1;
@@ -136,6 +142,29 @@ int pcibios_vaddr_is_ioport(void __iomem *address)
136 return ret; 142 return ret;
137} 143}
138 144
145unsigned long pci_address_to_pio(phys_addr_t address)
146{
147 struct pci_controller *hose;
148 resource_size_t size;
149 unsigned long ret = ~0;
150
151 spin_lock(&hose_spinlock);
152 list_for_each_entry(hose, &hose_list, list_node) {
153 size = pcibios_io_size(hose);
154 if (address >= hose->io_base_phys &&
155 address < (hose->io_base_phys + size)) {
156 unsigned long base =
157 (unsigned long)hose->io_base_virt - _IO_BASE;
158 ret = base + (address - hose->io_base_phys);
159 break;
160 }
161 }
162 spin_unlock(&hose_spinlock);
163
164 return ret;
165}
166EXPORT_SYMBOL_GPL(pci_address_to_pio);
167
139/* 168/*
140 * Return the domain number for this bus. 169 * Return the domain number for this bus.
141 */ 170 */
@@ -1453,7 +1482,7 @@ void __init pcibios_resource_survey(void)
1453 * we proceed to assigning things that were left unassigned 1482 * we proceed to assigning things that were left unassigned
1454 */ 1483 */
1455 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { 1484 if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
1456 pr_debug("PCI: Assigning unassigned resouces...\n"); 1485 pr_debug("PCI: Assigning unassigned resources...\n");
1457 pci_assign_unassigned_resources(); 1486 pci_assign_unassigned_resources();
1458 } 1487 }
1459 1488
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 132cd80afa21..d473634e39e3 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -20,6 +20,7 @@
20#include <asm/prom.h> 20#include <asm/prom.h>
21#include <asm/sections.h> 21#include <asm/sections.h>
22#include <asm/pci-bridge.h> 22#include <asm/pci-bridge.h>
23#include <asm/ppc-pci.h>
23#include <asm/byteorder.h> 24#include <asm/byteorder.h>
24#include <asm/uaccess.h> 25#include <asm/uaccess.h>
25#include <asm/machdep.h> 26#include <asm/machdep.h>
@@ -43,8 +44,6 @@ static u8* pci_to_OF_bus_map;
43 */ 44 */
44static int pci_assign_all_buses; 45static int pci_assign_all_buses;
45 46
46LIST_HEAD(hose_list);
47
48static int pci_bus_count; 47static int pci_bus_count;
49 48
50/* This will remain NULL for now, until isa-bridge.c is made common 49/* This will remain NULL for now, until isa-bridge.c is made common
@@ -219,16 +218,23 @@ scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void
219static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, 218static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
220 unsigned int devfn) 219 unsigned int devfn)
221{ 220{
222 struct device_node *np; 221 struct device_node *np, *cnp;
223 const u32 *reg; 222 const u32 *reg;
224 unsigned int psize; 223 unsigned int psize;
225 224
226 for_each_child_of_node(parent, np) { 225 for_each_child_of_node(parent, np) {
227 reg = of_get_property(np, "reg", &psize); 226 reg = of_get_property(np, "reg", &psize);
228 if (reg == NULL || psize < 4) 227 if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn)
229 continue;
230 if (((reg[0] >> 8) & 0xff) == devfn)
231 return np; 228 return np;
229
230 /* Note: some OFs create a parent node "multifunc-device" as
231 * a fake root for all functions of a multi-function device,
232 * we go down them as well. */
233 if (!strcmp(np->name, "multifunc-device")) {
234 cnp = scan_OF_for_pci_dev(np, devfn);
235 if (cnp)
236 return cnp;
237 }
232 } 238 }
233 return NULL; 239 return NULL;
234} 240}
@@ -491,24 +497,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
491 return result; 497 return result;
492} 498}
493 499
494unsigned long pci_address_to_pio(phys_addr_t address)
495{
496 struct pci_controller *hose, *tmp;
497
498 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
499 unsigned int size = hose->io_resource.end -
500 hose->io_resource.start + 1;
501 if (address >= hose->io_base_phys &&
502 address < (hose->io_base_phys + size)) {
503 unsigned long base =
504 (unsigned long)hose->io_base_virt - _IO_BASE;
505 return base + (address - hose->io_base_phys);
506 }
507 }
508 return (unsigned int)-1;
509}
510EXPORT_SYMBOL(pci_address_to_pio);
511
512/* 500/*
513 * Null PCI config access functions, for the case when we can't 501 * Null PCI config access functions, for the case when we can't
514 * find a hose. 502 * find a hose.
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index ea8eda8c87cf..be574fc0d92f 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -43,8 +43,6 @@ unsigned long pci_probe_only = 1;
43unsigned long pci_io_base = ISA_IO_BASE; 43unsigned long pci_io_base = ISA_IO_BASE;
44EXPORT_SYMBOL(pci_io_base); 44EXPORT_SYMBOL(pci_io_base);
45 45
46LIST_HEAD(hose_list);
47
48static void fixup_broken_pcnet32(struct pci_dev* dev) 46static void fixup_broken_pcnet32(struct pci_dev* dev)
49{ 47{
50 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { 48 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
@@ -524,23 +522,6 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
524} 522}
525EXPORT_SYMBOL_GPL(pcibios_map_io_space); 523EXPORT_SYMBOL_GPL(pcibios_map_io_space);
526 524
527unsigned long pci_address_to_pio(phys_addr_t address)
528{
529 struct pci_controller *hose, *tmp;
530
531 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
532 if (address >= hose->io_base_phys &&
533 address < (hose->io_base_phys + hose->pci_io_size)) {
534 unsigned long base =
535 (unsigned long)hose->io_base_virt - _IO_BASE;
536 return base + (address - hose->io_base_phys);
537 }
538 }
539 return (unsigned int)-1;
540}
541EXPORT_SYMBOL_GPL(pci_address_to_pio);
542
543
544#define IOBASE_BRIDGE_NUMBER 0 525#define IOBASE_BRIDGE_NUMBER 0
545#define IOBASE_MEMORY 1 526#define IOBASE_MEMORY 1
546#define IOBASE_IO 2 527#define IOBASE_IO 2
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index fb7049c054c0..eac064948780 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -33,7 +33,10 @@
33#include <linux/mqueue.h> 33#include <linux/mqueue.h>
34#include <linux/hardirq.h> 34#include <linux/hardirq.h>
35#include <linux/utsname.h> 35#include <linux/utsname.h>
36#include <linux/ftrace.h>
36#include <linux/kernel_stat.h> 37#include <linux/kernel_stat.h>
38#include <linux/personality.h>
39#include <linux/random.h>
37 40
38#include <asm/pgtable.h> 41#include <asm/pgtable.h>
39#include <asm/uaccess.h> 42#include <asm/uaccess.h>
@@ -1008,6 +1011,14 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
1008 unsigned long sp, ip, lr, newsp; 1011 unsigned long sp, ip, lr, newsp;
1009 int count = 0; 1012 int count = 0;
1010 int firstframe = 1; 1013 int firstframe = 1;
1014#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1015 int curr_frame = current->curr_ret_stack;
1016 extern void return_to_handler(void);
1017 unsigned long addr = (unsigned long)return_to_handler;
1018#ifdef CONFIG_PPC64
1019 addr = *(unsigned long*)addr;
1020#endif
1021#endif
1011 1022
1012 sp = (unsigned long) stack; 1023 sp = (unsigned long) stack;
1013 if (tsk == NULL) 1024 if (tsk == NULL)
@@ -1030,6 +1041,13 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
1030 ip = stack[STACK_FRAME_LR_SAVE]; 1041 ip = stack[STACK_FRAME_LR_SAVE];
1031 if (!firstframe || ip != lr) { 1042 if (!firstframe || ip != lr) {
1032 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 1043 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1044#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1045 if (ip == addr && curr_frame >= 0) {
1046 printk(" (%pS)",
1047 (void *)current->ret_stack[curr_frame].ret);
1048 curr_frame--;
1049 }
1050#endif
1033 if (firstframe) 1051 if (firstframe)
1034 printk(" (unreliable)"); 1052 printk(" (unreliable)");
1035 printk("\n"); 1053 printk("\n");
@@ -1122,3 +1140,43 @@ void thread_info_cache_init(void)
1122} 1140}
1123 1141
1124#endif /* THREAD_SHIFT < PAGE_SHIFT */ 1142#endif /* THREAD_SHIFT < PAGE_SHIFT */
1143
1144unsigned long arch_align_stack(unsigned long sp)
1145{
1146 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1147 sp -= get_random_int() & ~PAGE_MASK;
1148 return sp & ~0xf;
1149}
1150
1151static inline unsigned long brk_rnd(void)
1152{
1153 unsigned long rnd = 0;
1154
1155 /* 8MB for 32bit, 1GB for 64bit */
1156 if (is_32bit_task())
1157 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1158 else
1159 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1160
1161 return rnd << PAGE_SHIFT;
1162}
1163
1164unsigned long arch_randomize_brk(struct mm_struct *mm)
1165{
1166 unsigned long ret = PAGE_ALIGN(mm->brk + brk_rnd());
1167
1168 if (ret < mm->brk)
1169 return mm->brk;
1170
1171 return ret;
1172}
1173
1174unsigned long randomize_et_dyn(unsigned long base)
1175{
1176 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1177
1178 if (ret < base)
1179 return base;
1180
1181 return ret;
1182}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index f00f83109ab3..5ec6a9e23933 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -1075,11 +1075,6 @@ static void __init early_reserve_mem(void)
1075 DBG("reserving: %llx -> %llx\n", base, size); 1075 DBG("reserving: %llx -> %llx\n", base, size);
1076 lmb_reserve(base, size); 1076 lmb_reserve(base, size);
1077 } 1077 }
1078
1079#if 0
1080 DBG("memory reserved, lmbs :\n");
1081 lmb_dump_all();
1082#endif
1083} 1078}
1084 1079
1085#ifdef CONFIG_PHYP_DUMP 1080#ifdef CONFIG_PHYP_DUMP
@@ -1221,6 +1216,7 @@ void __init early_init_devtree(void *params)
1221 lmb_enforce_memory_limit(limit); 1216 lmb_enforce_memory_limit(limit);
1222 1217
1223 lmb_analyze(); 1218 lmb_analyze();
1219 lmb_dump_all();
1224 1220
1225 DBG("Phys. mem: %lx\n", lmb_phys_mem_size()); 1221 DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
1226 1222
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 7f1b33d5e30d..4d5ebb46b2c4 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2283,6 +2283,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2283 */ 2283 */
2284 prom_init_stdout(); 2284 prom_init_stdout();
2285 2285
2286 prom_printf("Preparing to boot %s", PTRRELOC((char *)linux_banner));
2287
2286 /* 2288 /*
2287 * Get default machine type. At this point, we do not differentiate 2289 * Get default machine type. At this point, we do not differentiate
2288 * between pSeries SMP and pSeries LPAR 2290 * between pSeries SMP and pSeries LPAR
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index ea3a2ec03ffa..1ac136b128f0 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -20,7 +20,7 @@ WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush
20_end enter_prom memcpy memset reloc_offset __secondary_hold 20_end enter_prom memcpy memset reloc_offset __secondary_hold
21__secondary_hold_acknowledge __secondary_hold_spinloop __start 21__secondary_hold_acknowledge __secondary_hold_spinloop __start
22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
23reloc_got2 kernstart_addr memstart_addr" 23reloc_got2 kernstart_addr memstart_addr linux_banner"
24 24
25NM="$1" 25NM="$1"
26OBJ="$2" 26OBJ="$2"
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index fdfe14c4bdef..ee4c7609b649 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -46,6 +46,7 @@ EXPORT_SYMBOL(rtas);
46 46
47struct rtas_suspend_me_data { 47struct rtas_suspend_me_data {
48 atomic_t working; /* number of cpus accessing this struct */ 48 atomic_t working; /* number of cpus accessing this struct */
49 atomic_t done;
49 int token; /* ibm,suspend-me */ 50 int token; /* ibm,suspend-me */
50 int error; 51 int error;
51 struct completion *complete; /* wait on this until working == 0 */ 52 struct completion *complete; /* wait on this until working == 0 */
@@ -689,7 +690,7 @@ static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE;
689#ifdef CONFIG_PPC_PSERIES 690#ifdef CONFIG_PPC_PSERIES
690static void rtas_percpu_suspend_me(void *info) 691static void rtas_percpu_suspend_me(void *info)
691{ 692{
692 long rc; 693 long rc = H_SUCCESS;
693 unsigned long msr_save; 694 unsigned long msr_save;
694 int cpu; 695 int cpu;
695 struct rtas_suspend_me_data *data = 696 struct rtas_suspend_me_data *data =
@@ -701,7 +702,8 @@ static void rtas_percpu_suspend_me(void *info)
701 msr_save = mfmsr(); 702 msr_save = mfmsr();
702 mtmsr(msr_save & ~(MSR_EE)); 703 mtmsr(msr_save & ~(MSR_EE));
703 704
704 rc = plpar_hcall_norets(H_JOIN); 705 while (rc == H_SUCCESS && !atomic_read(&data->done))
706 rc = plpar_hcall_norets(H_JOIN);
705 707
706 mtmsr(msr_save); 708 mtmsr(msr_save);
707 709
@@ -724,6 +726,9 @@ static void rtas_percpu_suspend_me(void *info)
724 smp_processor_id(), rc); 726 smp_processor_id(), rc);
725 data->error = rc; 727 data->error = rc;
726 } 728 }
729
730 atomic_set(&data->done, 1);
731
727 /* This cpu did the suspend or got an error; in either case, 732 /* This cpu did the suspend or got an error; in either case,
728 * we need to prod all other other cpus out of join state. 733 * we need to prod all other other cpus out of join state.
729 * Extra prods are harmless. 734 * Extra prods are harmless.
@@ -766,6 +771,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args)
766 } 771 }
767 772
768 atomic_set(&data.working, 0); 773 atomic_set(&data.working, 0);
774 atomic_set(&data.done, 0);
769 data.token = rtas_token("ibm,suspend-me"); 775 data.token = rtas_token("ibm,suspend-me");
770 data.error = 0; 776 data.error = 0;
771 data.complete = &done; 777 data.complete = &done;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 2d34196bba8c..73e16e298e28 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -578,13 +578,6 @@ void ppc64_boot_msg(unsigned int src, const char *msg)
578 printk("[boot]%04x %s\n", src, msg); 578 printk("[boot]%04x %s\n", src, msg);
579} 579}
580 580
581/* Print a termination message (print only -- does not stop the kernel) */
582void ppc64_terminate_msg(unsigned int src, const char *msg)
583{
584 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
585 printk("[terminate]%04x %s\n", src, msg);
586}
587
588void cpu_die(void) 581void cpu_die(void)
589{ 582{
590 if (ppc_md.cpu_die) 583 if (ppc_md.cpu_die)
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index b427bf8e1d8f..f1442d69d4ec 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -39,22 +39,12 @@ extern unsigned long copy_vsx_from_user(struct task_struct *task,
39 39
40#ifdef CONFIG_PPC64 40#ifdef CONFIG_PPC64
41 41
42static inline int is_32bit_task(void)
43{
44 return test_thread_flag(TIF_32BIT);
45}
46
47extern int handle_rt_signal64(int signr, struct k_sigaction *ka, 42extern int handle_rt_signal64(int signr, struct k_sigaction *ka,
48 siginfo_t *info, sigset_t *set, 43 siginfo_t *info, sigset_t *set,
49 struct pt_regs *regs); 44 struct pt_regs *regs);
50 45
51#else /* CONFIG_PPC64 */ 46#else /* CONFIG_PPC64 */
52 47
53static inline int is_32bit_task(void)
54{
55 return 1;
56}
57
58static inline int handle_rt_signal64(int signr, struct k_sigaction *ka, 48static inline int handle_rt_signal64(int signr, struct k_sigaction *ka,
59 siginfo_t *info, sigset_t *set, 49 siginfo_t *info, sigset_t *set,
60 struct pt_regs *regs) 50 struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 5457e9575685..678fbff0d206 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -52,6 +52,10 @@
52#include <asm/processor.h> 52#include <asm/processor.h>
53#endif 53#endif
54#include <asm/kexec.h> 54#include <asm/kexec.h>
55#include <asm/ppc-opcode.h>
56#ifdef CONFIG_FSL_BOOKE
57#include <asm/dbell.h>
58#endif
55 59
56#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 60#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
57int (*__debugger)(struct pt_regs *regs); 61int (*__debugger)(struct pt_regs *regs);
@@ -637,29 +641,6 @@ static void parse_fpe(struct pt_regs *regs)
637 * bits is faster and easier. 641 * bits is faster and easier.
638 * 642 *
639 */ 643 */
640#define INST_MFSPR_PVR 0x7c1f42a6
641#define INST_MFSPR_PVR_MASK 0xfc1fffff
642
643#define INST_DCBA 0x7c0005ec
644#define INST_DCBA_MASK 0xfc0007fe
645
646#define INST_MCRXR 0x7c000400
647#define INST_MCRXR_MASK 0xfc0007fe
648
649#define INST_STRING 0x7c00042a
650#define INST_STRING_MASK 0xfc0007fe
651#define INST_STRING_GEN_MASK 0xfc00067e
652#define INST_LSWI 0x7c0004aa
653#define INST_LSWX 0x7c00042a
654#define INST_STSWI 0x7c0005aa
655#define INST_STSWX 0x7c00052a
656
657#define INST_POPCNTB 0x7c0000f4
658#define INST_POPCNTB_MASK 0xfc0007fe
659
660#define INST_ISEL 0x7c00001e
661#define INST_ISEL_MASK 0xfc00003e
662
663static int emulate_string_inst(struct pt_regs *regs, u32 instword) 644static int emulate_string_inst(struct pt_regs *regs, u32 instword)
664{ 645{
665 u8 rT = (instword >> 21) & 0x1f; 646 u8 rT = (instword >> 21) & 0x1f;
@@ -670,20 +651,20 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
670 int pos = 0; 651 int pos = 0;
671 652
672 /* Early out if we are an invalid form of lswx */ 653 /* Early out if we are an invalid form of lswx */
673 if ((instword & INST_STRING_MASK) == INST_LSWX) 654 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
674 if ((rT == rA) || (rT == NB_RB)) 655 if ((rT == rA) || (rT == NB_RB))
675 return -EINVAL; 656 return -EINVAL;
676 657
677 EA = (rA == 0) ? 0 : regs->gpr[rA]; 658 EA = (rA == 0) ? 0 : regs->gpr[rA];
678 659
679 switch (instword & INST_STRING_MASK) { 660 switch (instword & PPC_INST_STRING_MASK) {
680 case INST_LSWX: 661 case PPC_INST_LSWX:
681 case INST_STSWX: 662 case PPC_INST_STSWX:
682 EA += NB_RB; 663 EA += NB_RB;
683 num_bytes = regs->xer & 0x7f; 664 num_bytes = regs->xer & 0x7f;
684 break; 665 break;
685 case INST_LSWI: 666 case PPC_INST_LSWI:
686 case INST_STSWI: 667 case PPC_INST_STSWI:
687 num_bytes = (NB_RB == 0) ? 32 : NB_RB; 668 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
688 break; 669 break;
689 default: 670 default:
@@ -695,9 +676,9 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
695 u8 val; 676 u8 val;
696 u32 shift = 8 * (3 - (pos & 0x3)); 677 u32 shift = 8 * (3 - (pos & 0x3));
697 678
698 switch ((instword & INST_STRING_MASK)) { 679 switch ((instword & PPC_INST_STRING_MASK)) {
699 case INST_LSWX: 680 case PPC_INST_LSWX:
700 case INST_LSWI: 681 case PPC_INST_LSWI:
701 if (get_user(val, (u8 __user *)EA)) 682 if (get_user(val, (u8 __user *)EA))
702 return -EFAULT; 683 return -EFAULT;
703 /* first time updating this reg, 684 /* first time updating this reg,
@@ -706,8 +687,8 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
706 regs->gpr[rT] = 0; 687 regs->gpr[rT] = 0;
707 regs->gpr[rT] |= val << shift; 688 regs->gpr[rT] |= val << shift;
708 break; 689 break;
709 case INST_STSWI: 690 case PPC_INST_STSWI:
710 case INST_STSWX: 691 case PPC_INST_STSWX:
711 val = regs->gpr[rT] >> shift; 692 val = regs->gpr[rT] >> shift;
712 if (put_user(val, (u8 __user *)EA)) 693 if (put_user(val, (u8 __user *)EA))
713 return -EFAULT; 694 return -EFAULT;
@@ -775,18 +756,18 @@ static int emulate_instruction(struct pt_regs *regs)
775 return -EFAULT; 756 return -EFAULT;
776 757
777 /* Emulate the mfspr rD, PVR. */ 758 /* Emulate the mfspr rD, PVR. */
778 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { 759 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
779 rd = (instword >> 21) & 0x1f; 760 rd = (instword >> 21) & 0x1f;
780 regs->gpr[rd] = mfspr(SPRN_PVR); 761 regs->gpr[rd] = mfspr(SPRN_PVR);
781 return 0; 762 return 0;
782 } 763 }
783 764
784 /* Emulating the dcba insn is just a no-op. */ 765 /* Emulating the dcba insn is just a no-op. */
785 if ((instword & INST_DCBA_MASK) == INST_DCBA) 766 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA)
786 return 0; 767 return 0;
787 768
788 /* Emulate the mcrxr insn. */ 769 /* Emulate the mcrxr insn. */
789 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { 770 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
790 int shift = (instword >> 21) & 0x1c; 771 int shift = (instword >> 21) & 0x1c;
791 unsigned long msk = 0xf0000000UL >> shift; 772 unsigned long msk = 0xf0000000UL >> shift;
792 773
@@ -796,16 +777,16 @@ static int emulate_instruction(struct pt_regs *regs)
796 } 777 }
797 778
798 /* Emulate load/store string insn. */ 779 /* Emulate load/store string insn. */
799 if ((instword & INST_STRING_GEN_MASK) == INST_STRING) 780 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING)
800 return emulate_string_inst(regs, instword); 781 return emulate_string_inst(regs, instword);
801 782
802 /* Emulate the popcntb (Population Count Bytes) instruction. */ 783 /* Emulate the popcntb (Population Count Bytes) instruction. */
803 if ((instword & INST_POPCNTB_MASK) == INST_POPCNTB) { 784 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
804 return emulate_popcntb_inst(regs, instword); 785 return emulate_popcntb_inst(regs, instword);
805 } 786 }
806 787
807 /* Emulate isel (Integer Select) instruction */ 788 /* Emulate isel (Integer Select) instruction */
808 if ((instword & INST_ISEL_MASK) == INST_ISEL) { 789 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
809 return emulate_isel(regs, instword); 790 return emulate_isel(regs, instword);
810 } 791 }
811 792
@@ -1144,6 +1125,24 @@ void vsx_assist_exception(struct pt_regs *regs)
1144#endif /* CONFIG_VSX */ 1125#endif /* CONFIG_VSX */
1145 1126
1146#ifdef CONFIG_FSL_BOOKE 1127#ifdef CONFIG_FSL_BOOKE
1128
1129void doorbell_exception(struct pt_regs *regs)
1130{
1131#ifdef CONFIG_SMP
1132 int cpu = smp_processor_id();
1133 int msg;
1134
1135 if (num_online_cpus() < 2)
1136 return;
1137
1138 for (msg = 0; msg < 4; msg++)
1139 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1140 smp_message_recv(msg);
1141#else
1142 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1143#endif
1144}
1145
1147void CacheLockingException(struct pt_regs *regs, unsigned long address, 1146void CacheLockingException(struct pt_regs *regs, unsigned long address,
1148 unsigned long error_code) 1147 unsigned long error_code)
1149{ 1148{
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 7d6c9bb8c77f..fc9af47e2128 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -18,6 +18,7 @@
18#include <asm/udbg.h> 18#include <asm/udbg.h>
19 19
20void (*udbg_putc)(char c); 20void (*udbg_putc)(char c);
21void (*udbg_flush)(void);
21int (*udbg_getc)(void); 22int (*udbg_getc)(void);
22int (*udbg_getc_poll)(void); 23int (*udbg_getc_poll)(void);
23 24
@@ -76,6 +77,9 @@ void udbg_puts(const char *s)
76 while ((c = *s++) != '\0') 77 while ((c = *s++) != '\0')
77 udbg_putc(c); 78 udbg_putc(c);
78 } 79 }
80
81 if (udbg_flush)
82 udbg_flush();
79 } 83 }
80#if 0 84#if 0
81 else { 85 else {
@@ -98,6 +102,9 @@ int udbg_write(const char *s, int n)
98 } 102 }
99 } 103 }
100 104
105 if (udbg_flush)
106 udbg_flush();
107
101 return n - remain; 108 return n - remain;
102} 109}
103 110
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 7b7da8cfd5e8..0362a891e54e 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -48,14 +48,21 @@ struct NS16550 {
48 48
49static struct NS16550 __iomem *udbg_comport; 49static struct NS16550 __iomem *udbg_comport;
50 50
51static void udbg_550_putc(char c) 51static void udbg_550_flush(void)
52{ 52{
53 if (udbg_comport) { 53 if (udbg_comport) {
54 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0) 54 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
55 /* wait for idle */; 55 /* wait for idle */;
56 out_8(&udbg_comport->thr, c); 56 }
57}
58
59static void udbg_550_putc(char c)
60{
61 if (udbg_comport) {
57 if (c == '\n') 62 if (c == '\n')
58 udbg_550_putc('\r'); 63 udbg_550_putc('\r');
64 udbg_550_flush();
65 out_8(&udbg_comport->thr, c);
59 } 66 }
60} 67}
61 68
@@ -108,6 +115,7 @@ void udbg_init_uart(void __iomem *comport, unsigned int speed,
108 /* Clear & enable FIFOs */ 115 /* Clear & enable FIFOs */
109 out_8(&udbg_comport->fcr ,0x07); 116 out_8(&udbg_comport->fcr ,0x07);
110 udbg_putc = udbg_550_putc; 117 udbg_putc = udbg_550_putc;
118 udbg_flush = udbg_550_flush;
111 udbg_getc = udbg_550_getc; 119 udbg_getc = udbg_550_getc;
112 udbg_getc_poll = udbg_550_getc_poll; 120 udbg_getc_poll = udbg_550_getc_poll;
113 } 121 }
@@ -149,14 +157,21 @@ unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
149} 157}
150 158
151#ifdef CONFIG_PPC_MAPLE 159#ifdef CONFIG_PPC_MAPLE
152void udbg_maple_real_putc(char c) 160void udbg_maple_real_flush(void)
153{ 161{
154 if (udbg_comport) { 162 if (udbg_comport) {
155 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 163 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
156 /* wait for idle */; 164 /* wait for idle */;
157 real_writeb(c, &udbg_comport->thr); eieio(); 165 }
166}
167
168void udbg_maple_real_putc(char c)
169{
170 if (udbg_comport) {
158 if (c == '\n') 171 if (c == '\n')
159 udbg_maple_real_putc('\r'); 172 udbg_maple_real_putc('\r');
173 udbg_maple_real_flush();
174 real_writeb(c, &udbg_comport->thr); eieio();
160 } 175 }
161} 176}
162 177
@@ -165,20 +180,28 @@ void __init udbg_init_maple_realmode(void)
165 udbg_comport = (struct NS16550 __iomem *)0xf40003f8; 180 udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
166 181
167 udbg_putc = udbg_maple_real_putc; 182 udbg_putc = udbg_maple_real_putc;
183 udbg_flush = udbg_maple_real_flush;
168 udbg_getc = NULL; 184 udbg_getc = NULL;
169 udbg_getc_poll = NULL; 185 udbg_getc_poll = NULL;
170} 186}
171#endif /* CONFIG_PPC_MAPLE */ 187#endif /* CONFIG_PPC_MAPLE */
172 188
173#ifdef CONFIG_PPC_PASEMI 189#ifdef CONFIG_PPC_PASEMI
174void udbg_pas_real_putc(char c) 190void udbg_pas_real_flush(void)
175{ 191{
176 if (udbg_comport) { 192 if (udbg_comport) {
177 while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 193 while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
178 /* wait for idle */; 194 /* wait for idle */;
179 real_205_writeb(c, &udbg_comport->thr); eieio(); 195 }
196}
197
198void udbg_pas_real_putc(char c)
199{
200 if (udbg_comport) {
180 if (c == '\n') 201 if (c == '\n')
181 udbg_pas_real_putc('\r'); 202 udbg_pas_real_putc('\r');
203 udbg_pas_real_flush();
204 real_205_writeb(c, &udbg_comport->thr); eieio();
182 } 205 }
183} 206}
184 207
@@ -187,6 +210,7 @@ void udbg_init_pas_realmode(void)
187 udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL; 210 udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
188 211
189 udbg_putc = udbg_pas_real_putc; 212 udbg_putc = udbg_pas_real_putc;
213 udbg_flush = udbg_pas_real_flush;
190 udbg_getc = NULL; 214 udbg_getc = NULL;
191 udbg_getc_poll = NULL; 215 udbg_getc_poll = NULL;
192} 216}
@@ -195,14 +219,21 @@ void udbg_init_pas_realmode(void)
195#ifdef CONFIG_PPC_EARLY_DEBUG_44x 219#ifdef CONFIG_PPC_EARLY_DEBUG_44x
196#include <platforms/44x/44x.h> 220#include <platforms/44x/44x.h>
197 221
198static void udbg_44x_as1_putc(char c) 222static int udbg_44x_as1_flush(void)
199{ 223{
200 if (udbg_comport) { 224 if (udbg_comport) {
201 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 225 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
202 /* wait for idle */; 226 /* wait for idle */;
203 as1_writeb(c, &udbg_comport->thr); eieio(); 227 }
228}
229
230static void udbg_44x_as1_putc(char c)
231{
232 if (udbg_comport) {
204 if (c == '\n') 233 if (c == '\n')
205 udbg_44x_as1_putc('\r'); 234 udbg_44x_as1_putc('\r');
235 udbg_44x_as1_flush();
236 as1_writeb(c, &udbg_comport->thr); eieio();
206 } 237 }
207} 238}
208 239
@@ -222,19 +253,27 @@ void __init udbg_init_44x_as1(void)
222 (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR; 253 (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
223 254
224 udbg_putc = udbg_44x_as1_putc; 255 udbg_putc = udbg_44x_as1_putc;
256 udbg_flush = udbg_44x_as1_flush;
225 udbg_getc = udbg_44x_as1_getc; 257 udbg_getc = udbg_44x_as1_getc;
226} 258}
227#endif /* CONFIG_PPC_EARLY_DEBUG_44x */ 259#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
228 260
229#ifdef CONFIG_PPC_EARLY_DEBUG_40x 261#ifdef CONFIG_PPC_EARLY_DEBUG_40x
230static void udbg_40x_real_putc(char c) 262static void udbg_40x_real_flush(void)
231{ 263{
232 if (udbg_comport) { 264 if (udbg_comport) {
233 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) 265 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
234 /* wait for idle */; 266 /* wait for idle */;
235 real_writeb(c, &udbg_comport->thr); eieio(); 267 }
268}
269
270static void udbg_40x_real_putc(char c)
271{
272 if (udbg_comport) {
236 if (c == '\n') 273 if (c == '\n')
237 udbg_40x_real_putc('\r'); 274 udbg_40x_real_putc('\r');
275 udbg_40x_real_flush();
276 real_writeb(c, &udbg_comport->thr); eieio();
238 } 277 }
239} 278}
240 279
@@ -254,6 +293,7 @@ void __init udbg_init_40x_realmode(void)
254 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR; 293 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
255 294
256 udbg_putc = udbg_40x_real_putc; 295 udbg_putc = udbg_40x_real_putc;
296 udbg_flush = udbg_40x_real_flush;
257 udbg_getc = udbg_40x_real_getc; 297 udbg_getc = udbg_40x_real_getc;
258 udbg_getc_poll = NULL; 298 udbg_getc_poll = NULL;
259} 299}
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 161b9b9691f0..895af44bf1f4 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -58,6 +58,7 @@ SECTIONS
58 SCHED_TEXT 58 SCHED_TEXT
59 LOCK_TEXT 59 LOCK_TEXT
60 KPROBES_TEXT 60 KPROBES_TEXT
61 IRQENTRY_TEXT
61 62
62#ifdef CONFIG_PPC32 63#ifdef CONFIG_PPC32
63 *(.got1) 64 *(.got1)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index b7dc4c19f582..005a28d380af 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -29,121 +29,11 @@
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/highmem.h> 30#include <linux/highmem.h>
31#include <linux/dma-mapping.h> 31#include <linux/dma-mapping.h>
32#include <linux/vmalloc.h>
32 33
33#include <asm/tlbflush.h> 34#include <asm/tlbflush.h>
34 35
35/* 36/*
36 * This address range defaults to a value that is safe for all
37 * platforms which currently set CONFIG_NOT_COHERENT_CACHE. It
38 * can be further configured for specific applications under
39 * the "Advanced Setup" menu. -Matt
40 */
41#define CONSISTENT_BASE (CONFIG_CONSISTENT_START)
42#define CONSISTENT_END (CONFIG_CONSISTENT_START + CONFIG_CONSISTENT_SIZE)
43#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
44
45/*
46 * This is the page table (2MB) covering uncached, DMA consistent allocations
47 */
48static pte_t *consistent_pte;
49static DEFINE_SPINLOCK(consistent_lock);
50
51/*
52 * VM region handling support.
53 *
54 * This should become something generic, handling VM region allocations for
55 * vmalloc and similar (ioremap, module space, etc).
56 *
57 * I envisage vmalloc()'s supporting vm_struct becoming:
58 *
59 * struct vm_struct {
60 * struct vm_region region;
61 * unsigned long flags;
62 * struct page **pages;
63 * unsigned int nr_pages;
64 * unsigned long phys_addr;
65 * };
66 *
67 * get_vm_area() would then call vm_region_alloc with an appropriate
68 * struct vm_region head (eg):
69 *
70 * struct vm_region vmalloc_head = {
71 * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
72 * .vm_start = VMALLOC_START,
73 * .vm_end = VMALLOC_END,
74 * };
75 *
76 * However, vmalloc_head.vm_start is variable (typically, it is dependent on
77 * the amount of RAM found at boot time.) I would imagine that get_vm_area()
78 * would have to initialise this each time prior to calling vm_region_alloc().
79 */
80struct ppc_vm_region {
81 struct list_head vm_list;
82 unsigned long vm_start;
83 unsigned long vm_end;
84};
85
86static struct ppc_vm_region consistent_head = {
87 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
88 .vm_start = CONSISTENT_BASE,
89 .vm_end = CONSISTENT_END,
90};
91
92static struct ppc_vm_region *
93ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp)
94{
95 unsigned long addr = head->vm_start, end = head->vm_end - size;
96 unsigned long flags;
97 struct ppc_vm_region *c, *new;
98
99 new = kmalloc(sizeof(struct ppc_vm_region), gfp);
100 if (!new)
101 goto out;
102
103 spin_lock_irqsave(&consistent_lock, flags);
104
105 list_for_each_entry(c, &head->vm_list, vm_list) {
106 if ((addr + size) < addr)
107 goto nospc;
108 if ((addr + size) <= c->vm_start)
109 goto found;
110 addr = c->vm_end;
111 if (addr > end)
112 goto nospc;
113 }
114
115 found:
116 /*
117 * Insert this entry _before_ the one we found.
118 */
119 list_add_tail(&new->vm_list, &c->vm_list);
120 new->vm_start = addr;
121 new->vm_end = addr + size;
122
123 spin_unlock_irqrestore(&consistent_lock, flags);
124 return new;
125
126 nospc:
127 spin_unlock_irqrestore(&consistent_lock, flags);
128 kfree(new);
129 out:
130 return NULL;
131}
132
133static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr)
134{
135 struct ppc_vm_region *c;
136
137 list_for_each_entry(c, &head->vm_list, vm_list) {
138 if (c->vm_start == addr)
139 goto out;
140 }
141 c = NULL;
142 out:
143 return c;
144}
145
146/*
147 * Allocate DMA-coherent memory space and return both the kernel remapped 37 * Allocate DMA-coherent memory space and return both the kernel remapped
148 * virtual and bus address for that space. 38 * virtual and bus address for that space.
149 */ 39 */
@@ -151,21 +41,21 @@ void *
151__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) 41__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
152{ 42{
153 struct page *page; 43 struct page *page;
154 struct ppc_vm_region *c;
155 unsigned long order; 44 unsigned long order;
45 int i;
46 unsigned int nr_pages = PAGE_ALIGN(size)>>PAGE_SHIFT;
47 unsigned int array_size = nr_pages * sizeof(struct page *);
48 struct page **pages;
49 struct page *end;
156 u64 mask = 0x00ffffff, limit; /* ISA default */ 50 u64 mask = 0x00ffffff, limit; /* ISA default */
51 struct vm_struct *area;
157 52
158 if (!consistent_pte) { 53 BUG_ON(!mem_init_done);
159 printk(KERN_ERR "%s: not initialised\n", __func__);
160 dump_stack();
161 return NULL;
162 }
163
164 size = PAGE_ALIGN(size); 54 size = PAGE_ALIGN(size);
165 limit = (mask + 1) & ~mask; 55 limit = (mask + 1) & ~mask;
166 if ((limit && size >= limit) || size >= (CONSISTENT_END - CONSISTENT_BASE)) { 56 if (limit && size >= limit) {
167 printk(KERN_WARNING "coherent allocation too big (requested %#x mask %#Lx)\n", 57 printk(KERN_WARNING "coherent allocation too big (requested "
168 size, mask); 58 "%#x mask %#Lx)\n", size, mask);
169 return NULL; 59 return NULL;
170 } 60 }
171 61
@@ -178,6 +68,8 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
178 if (!page) 68 if (!page)
179 goto no_page; 69 goto no_page;
180 70
71 end = page + (1 << order);
72
181 /* 73 /*
182 * Invalidate any data that might be lurking in the 74 * Invalidate any data that might be lurking in the
183 * kernel direct-mapped region for device DMA. 75 * kernel direct-mapped region for device DMA.
@@ -188,48 +80,59 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
188 flush_dcache_range(kaddr, kaddr + size); 80 flush_dcache_range(kaddr, kaddr + size);
189 } 81 }
190 82
83 split_page(page, order);
84
191 /* 85 /*
192 * Allocate a virtual address in the consistent mapping region. 86 * Set the "dma handle"
193 */ 87 */
194 c = ppc_vm_region_alloc(&consistent_head, size, 88 *handle = page_to_phys(page);
195 gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); 89
196 if (c) { 90 area = get_vm_area_caller(size, VM_IOREMAP,
197 unsigned long vaddr = c->vm_start; 91 __builtin_return_address(1));
198 pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr); 92 if (!area)
199 struct page *end = page + (1 << order); 93 goto out_free_pages;
200 94
201 split_page(page, order); 95 if (array_size > PAGE_SIZE) {
202 96 pages = vmalloc(array_size);
203 /* 97 area->flags |= VM_VPAGES;
204 * Set the "dma handle" 98 } else {
205 */ 99 pages = kmalloc(array_size, GFP_KERNEL);
206 *handle = page_to_phys(page); 100 }
101 if (!pages)
102 goto out_free_area;
207 103
208 do { 104 area->pages = pages;
209 BUG_ON(!pte_none(*pte)); 105 area->nr_pages = nr_pages;
210 106
211 SetPageReserved(page); 107 for (i = 0; i < nr_pages; i++)
212 set_pte_at(&init_mm, vaddr, 108 pages[i] = page + i;
213 pte, mk_pte(page, pgprot_noncached(PAGE_KERNEL)));
214 page++;
215 pte++;
216 vaddr += PAGE_SIZE;
217 } while (size -= PAGE_SIZE);
218 109
219 /* 110 if (map_vm_area(area, pgprot_noncached(PAGE_KERNEL), &pages))
220 * Free the otherwise unused pages. 111 goto out_unmap;
221 */
222 while (page < end) {
223 __free_page(page);
224 page++;
225 }
226 112
227 return (void *)c->vm_start; 113 /*
114 * Free the otherwise unused pages.
115 */
116 page += nr_pages;
117 while (page < end) {
118 __free_page(page);
119 page++;
228 } 120 }
229 121
122 return area->addr;
123out_unmap:
124 vunmap(area->addr);
125 if (array_size > PAGE_SIZE)
126 vfree(pages);
127 else
128 kfree(pages);
129 goto out_free_pages;
130out_free_area:
131 free_vm_area(area);
132out_free_pages:
230 if (page) 133 if (page)
231 __free_pages(page, order); 134 __free_pages(page, order);
232 no_page: 135no_page:
233 return NULL; 136 return NULL;
234} 137}
235EXPORT_SYMBOL(__dma_alloc_coherent); 138EXPORT_SYMBOL(__dma_alloc_coherent);
@@ -239,104 +142,12 @@ EXPORT_SYMBOL(__dma_alloc_coherent);
239 */ 142 */
240void __dma_free_coherent(size_t size, void *vaddr) 143void __dma_free_coherent(size_t size, void *vaddr)
241{ 144{
242 struct ppc_vm_region *c; 145 vfree(vaddr);
243 unsigned long flags, addr;
244 pte_t *ptep;
245
246 size = PAGE_ALIGN(size);
247
248 spin_lock_irqsave(&consistent_lock, flags);
249
250 c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr);
251 if (!c)
252 goto no_area;
253
254 if ((c->vm_end - c->vm_start) != size) {
255 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
256 __func__, c->vm_end - c->vm_start, size);
257 dump_stack();
258 size = c->vm_end - c->vm_start;
259 }
260
261 ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
262 addr = c->vm_start;
263 do {
264 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
265 unsigned long pfn;
266
267 ptep++;
268 addr += PAGE_SIZE;
269 146
270 if (!pte_none(pte) && pte_present(pte)) {
271 pfn = pte_pfn(pte);
272
273 if (pfn_valid(pfn)) {
274 struct page *page = pfn_to_page(pfn);
275 ClearPageReserved(page);
276
277 __free_page(page);
278 continue;
279 }
280 }
281
282 printk(KERN_CRIT "%s: bad page in kernel page table\n",
283 __func__);
284 } while (size -= PAGE_SIZE);
285
286 flush_tlb_kernel_range(c->vm_start, c->vm_end);
287
288 list_del(&c->vm_list);
289
290 spin_unlock_irqrestore(&consistent_lock, flags);
291
292 kfree(c);
293 return;
294
295 no_area:
296 spin_unlock_irqrestore(&consistent_lock, flags);
297 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
298 __func__, vaddr);
299 dump_stack();
300} 147}
301EXPORT_SYMBOL(__dma_free_coherent); 148EXPORT_SYMBOL(__dma_free_coherent);
302 149
303/* 150/*
304 * Initialise the consistent memory allocation.
305 */
306static int __init dma_alloc_init(void)
307{
308 pgd_t *pgd;
309 pud_t *pud;
310 pmd_t *pmd;
311 pte_t *pte;
312 int ret = 0;
313
314 do {
315 pgd = pgd_offset(&init_mm, CONSISTENT_BASE);
316 pud = pud_alloc(&init_mm, pgd, CONSISTENT_BASE);
317 pmd = pmd_alloc(&init_mm, pud, CONSISTENT_BASE);
318 if (!pmd) {
319 printk(KERN_ERR "%s: no pmd tables\n", __func__);
320 ret = -ENOMEM;
321 break;
322 }
323
324 pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
325 if (!pte) {
326 printk(KERN_ERR "%s: no pte tables\n", __func__);
327 ret = -ENOMEM;
328 break;
329 }
330
331 consistent_pte = pte;
332 } while (0);
333
334 return ret;
335}
336
337core_initcall(dma_alloc_init);
338
339/*
340 * make an area consistent. 151 * make an area consistent.
341 */ 152 */
342void __dma_sync(void *vaddr, size_t size, int direction) 153void __dma_sync(void *vaddr, size_t size, int direction)
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 8c5a03be31e0..7e8865bcd683 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -85,7 +85,7 @@ static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
85 } 85 }
86 86
87 for (; dest < end; dest++) 87 for (; dest < end; dest++)
88 patch_instruction(dest, PPC_NOP_INSTR); 88 patch_instruction(dest, PPC_INST_NOP);
89 89
90 return 0; 90 return 0;
91} 91}
@@ -122,7 +122,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
122 122
123 for (; start < end; start++) { 123 for (; start < end; start++) {
124 dest = (void *)start + *start; 124 dest = (void *)start + *start;
125 patch_instruction(dest, PPC_LWSYNC_INSTR); 125 patch_instruction(dest, PPC_INST_LWSYNC);
126 } 126 }
127} 127}
128 128
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index f9e506a735ae..0c16ab947f1f 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,6 +1,4 @@
1 1
2obj-y := math.o fmr.o lfd.o stfd.o
3
4obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ 2obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
5 fctiw.o fctiwz.o fdiv.o fdivs.o \ 3 fctiw.o fctiwz.o fdiv.o fdivs.o \
6 fmadd.o fmadds.o fmsub.o fmsubs.o \ 4 fmadd.o fmadds.o fmsub.o fmsubs.o \
@@ -9,7 +7,8 @@ obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
9 fres.o frsp.o frsqrte.o fsel.o lfs.o \ 7 fres.o frsp.o frsqrte.o fsel.o lfs.o \
10 fsqrt.o fsqrts.o fsub.o fsubs.o \ 8 fsqrt.o fsqrts.o fsub.o fsubs.o \
11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ 9 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
12 mtfsf.o mtfsfi.o stfiwx.o stfs.o 10 mtfsf.o mtfsfi.o stfiwx.o stfs.o \
11 math.o fmr.o lfd.o stfd.o
13 12
14obj-$(CONFIG_SPE) += math_efp.o 13obj-$(CONFIG_SPE) += math_efp.o
15 14
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 953cc4a1cde5..6d2838fc8792 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,7 +6,7 @@ ifeq ($(CONFIG_PPC64),y)
6EXTRA_CFLAGS += -mno-minimal-toc 6EXTRA_CFLAGS += -mno-minimal-toc
7endif 7endif
8 8
9obj-y := fault.o mem.o pgtable.o \ 9obj-y := fault.o mem.o pgtable.o gup.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
11 pgtable_$(CONFIG_WORD_SIZE).o 11 pgtable_$(CONFIG_WORD_SIZE).o
12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ 12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
@@ -14,7 +14,7 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
14hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o 14hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o
15obj-$(CONFIG_PPC64) += hash_utils_64.o \ 15obj-$(CONFIG_PPC64) += hash_utils_64.o \
16 slb_low.o slb.o stab.o \ 16 slb_low.o slb.o stab.o \
17 gup.o mmap.o $(hash-y) 17 mmap.o $(hash-y)
18obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o 18obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o
19obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ 19obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \
20 tlb_hash$(CONFIG_WORD_SIZE).o \ 20 tlb_hash$(CONFIG_WORD_SIZE).o \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 91c7b8636b8a..76993941cac9 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -253,45 +253,33 @@ good_area:
253#endif /* CONFIG_8xx */ 253#endif /* CONFIG_8xx */
254 254
255 if (is_exec) { 255 if (is_exec) {
256#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) 256#ifdef CONFIG_PPC_STD_MMU
257 /* protection fault */ 257 /* Protection fault on exec go straight to failure on
258 * Hash based MMUs as they either don't support per-page
259 * execute permission, or if they do, it's handled already
260 * at the hash level. This test would probably have to
261 * be removed if we change the way this works to make hash
262 * processors use the same I/D cache coherency mechanism
263 * as embedded.
264 */
258 if (error_code & DSISR_PROTFAULT) 265 if (error_code & DSISR_PROTFAULT)
259 goto bad_area; 266 goto bad_area;
267#endif /* CONFIG_PPC_STD_MMU */
268
260 /* 269 /*
261 * Allow execution from readable areas if the MMU does not 270 * Allow execution from readable areas if the MMU does not
262 * provide separate controls over reading and executing. 271 * provide separate controls over reading and executing.
272 *
273 * Note: That code used to not be enabled for 4xx/BookE.
274 * It is now as I/D cache coherency for these is done at
275 * set_pte_at() time and I see no reason why the test
276 * below wouldn't be valid on those processors. This -may-
277 * break programs compiled with a really old ABI though.
263 */ 278 */
264 if (!(vma->vm_flags & VM_EXEC) && 279 if (!(vma->vm_flags & VM_EXEC) &&
265 (cpu_has_feature(CPU_FTR_NOEXECUTE) || 280 (cpu_has_feature(CPU_FTR_NOEXECUTE) ||
266 !(vma->vm_flags & (VM_READ | VM_WRITE)))) 281 !(vma->vm_flags & (VM_READ | VM_WRITE))))
267 goto bad_area; 282 goto bad_area;
268#else
269 pte_t *ptep;
270 pmd_t *pmdp;
271
272 /* Since 4xx/Book-E supports per-page execute permission,
273 * we lazily flush dcache to icache. */
274 ptep = NULL;
275 if (get_pteptr(mm, address, &ptep, &pmdp)) {
276 spinlock_t *ptl = pte_lockptr(mm, pmdp);
277 spin_lock(ptl);
278 if (pte_present(*ptep)) {
279 struct page *page = pte_page(*ptep);
280
281 if (!test_bit(PG_arch_1, &page->flags)) {
282 flush_dcache_icache_page(page);
283 set_bit(PG_arch_1, &page->flags);
284 }
285 pte_update(ptep, 0, _PAGE_HWEXEC |
286 _PAGE_ACCESSED);
287 local_flush_tlb_page(vma, address);
288 pte_unmap_unlock(ptep, ptl);
289 up_read(&mm->mmap_sem);
290 return 0;
291 }
292 pte_unmap_unlock(ptep, ptl);
293 }
294#endif
295 /* a write */ 283 /* a write */
296 } else if (is_write) { 284 } else if (is_write) {
297 if (!(vma->vm_flags & VM_WRITE)) 285 if (!(vma->vm_flags & VM_WRITE))
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index ea6e41e39d9f..985b6c361ab4 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -56,10 +56,14 @@
56 56
57extern void loadcam_entry(unsigned int index); 57extern void loadcam_entry(unsigned int index);
58unsigned int tlbcam_index; 58unsigned int tlbcam_index;
59static unsigned long __cam0, __cam1, __cam2; 59static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];
60 60
61#define NUM_TLBCAMS (16) 61#define NUM_TLBCAMS (16)
62 62
63#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
64#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
65#endif
66
63struct tlbcam TLBCAM[NUM_TLBCAMS]; 67struct tlbcam TLBCAM[NUM_TLBCAMS];
64 68
65struct tlbcamrange { 69struct tlbcamrange {
@@ -107,7 +111,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
107 unsigned int tsize, lz; 111 unsigned int tsize, lz;
108 112
109 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); 113 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
110 tsize = (21 - lz) / 2; 114 tsize = 21 - lz;
111 115
112#ifdef CONFIG_SMP 116#ifdef CONFIG_SMP
113 if ((flags & _PAGE_NO_CACHE) == 0) 117 if ((flags & _PAGE_NO_CACHE) == 0)
@@ -152,19 +156,19 @@ void invalidate_tlbcam_entry(int index)
152 loadcam_entry(index); 156 loadcam_entry(index);
153} 157}
154 158
155void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, 159unsigned long __init mmu_mapin_ram(void)
156 unsigned long cam2)
157{ 160{
158 settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0); 161 unsigned long virt = PAGE_OFFSET;
159 tlbcam_index++; 162 phys_addr_t phys = memstart_addr;
160 if (cam1) { 163
161 tlbcam_index++; 164 while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
162 settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0); 165 settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
163 } 166 virt += cam[tlbcam_index];
164 if (cam2) { 167 phys += cam[tlbcam_index];
165 tlbcam_index++; 168 tlbcam_index++;
166 settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
167 } 169 }
170
171 return virt - PAGE_OFFSET;
168} 172}
169 173
170/* 174/*
@@ -175,51 +179,46 @@ void __init MMU_init_hw(void)
175 flush_instruction_cache(); 179 flush_instruction_cache();
176} 180}
177 181
178unsigned long __init mmu_mapin_ram(void)
179{
180 cam_mapin_ram(__cam0, __cam1, __cam2);
181
182 return __cam0 + __cam1 + __cam2;
183}
184
185
186void __init 182void __init
187adjust_total_lowmem(void) 183adjust_total_lowmem(void)
188{ 184{
189 phys_addr_t max_lowmem_size = __max_low_memory;
190 phys_addr_t cam_max_size = 0x10000000;
191 phys_addr_t ram; 185 phys_addr_t ram;
186 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
187 char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
188 int i;
189 unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
190 unsigned long phys = memstart_addr & 0xffffffffUL;
192 191
193 /* adjust CAM size to max_lowmem_size */ 192 /* Convert (4^max) kB to (2^max) bytes */
194 if (max_lowmem_size < cam_max_size) 193 max_cam = max_cam * 2 + 10;
195 cam_max_size = max_lowmem_size;
196 194
197 /* adjust lowmem size to max_lowmem_size */ 195 /* adjust lowmem size to __max_low_memory */
198 ram = min(max_lowmem_size, total_lowmem); 196 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
199 197
200 /* Calculate CAM values */ 198 /* Calculate CAM values */
201 __cam0 = 1UL << 2 * (__ilog2(ram) / 2); 199 __max_low_memory = 0;
202 if (__cam0 > cam_max_size) 200 for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
203 __cam0 = cam_max_size; 201 unsigned int camsize = __ilog2(ram) & ~1U;
204 ram -= __cam0; 202 unsigned int align = __ffs(virt | phys) & ~1U;
205 if (ram) { 203
206 __cam1 = 1UL << 2 * (__ilog2(ram) / 2); 204 if (camsize > align)
207 if (__cam1 > cam_max_size) 205 camsize = align;
208 __cam1 = cam_max_size; 206 if (camsize > max_cam)
209 ram -= __cam1; 207 camsize = max_cam;
210 } 208
211 if (ram) { 209 cam[i] = 1UL << camsize;
212 __cam2 = 1UL << 2 * (__ilog2(ram) / 2); 210 ram -= cam[i];
213 if (__cam2 > cam_max_size) 211 __max_low_memory += cam[i];
214 __cam2 = cam_max_size; 212 virt += cam[i];
215 ram -= __cam2; 213 phys += cam[i];
214
215 p += sprintf(p, "%lu/", cam[i] >> 20);
216 } 216 }
217 for (; i < ARRAY_SIZE(cam); i++)
218 p += sprintf(p, "0/");
219 p[-1] = '\0';
217 220
218 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb," 221 pr_info("Memory CAM mapping: %s Mb, residual: %dMb\n", buf,
219 " CAM2=%ldMb residual: %ldMb\n", 222 (unsigned int)((total_lowmem - __max_low_memory) >> 20));
220 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
221 (long int)((total_lowmem - __cam0 - __cam1 - __cam2)
222 >> 20));
223 __max_low_memory = __cam0 + __cam1 + __cam2;
224 __initial_memory_limit_addr = memstart_addr + __max_low_memory; 223 __initial_memory_limit_addr = memstart_addr + __max_low_memory;
225} 224}
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index 28a114db3ba0..bc400c78c97f 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -14,6 +14,8 @@
14#include <linux/rwsem.h> 14#include <linux/rwsem.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16 16
17#ifdef __HAVE_ARCH_PTE_SPECIAL
18
17/* 19/*
18 * The performance critical leaf functions are made noinline otherwise gcc 20 * The performance critical leaf functions are made noinline otherwise gcc
19 * inlines everything into a single function which results in too much 21 * inlines everything into a single function which results in too much
@@ -151,8 +153,11 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
151 unsigned long addr, len, end; 153 unsigned long addr, len, end;
152 unsigned long next; 154 unsigned long next;
153 pgd_t *pgdp; 155 pgd_t *pgdp;
154 int psize, nr = 0; 156 int nr = 0;
157#ifdef CONFIG_PPC64
155 unsigned int shift; 158 unsigned int shift;
159 int psize;
160#endif
156 161
157 pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read"); 162 pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read");
158 163
@@ -205,8 +210,13 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
205 */ 210 */
206 local_irq_disable(); 211 local_irq_disable();
207 212
213#ifdef CONFIG_PPC64
214 /* Those bits are related to hugetlbfs implementation and only exist
215 * on 64-bit for now
216 */
208 psize = get_slice_psize(mm, addr); 217 psize = get_slice_psize(mm, addr);
209 shift = mmu_psize_defs[psize].shift; 218 shift = mmu_psize_defs[psize].shift;
219#endif /* CONFIG_PPC64 */
210 220
211#ifdef CONFIG_HUGETLB_PAGE 221#ifdef CONFIG_HUGETLB_PAGE
212 if (unlikely(mmu_huge_psizes[psize])) { 222 if (unlikely(mmu_huge_psizes[psize])) {
@@ -236,7 +246,9 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
236 do { 246 do {
237 pgd_t pgd = *pgdp; 247 pgd_t pgd = *pgdp;
238 248
249#ifdef CONFIG_PPC64
239 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift); 250 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift);
251#endif
240 pr_debug(" %016lx: normal pgd %p\n", addr, 252 pr_debug(" %016lx: normal pgd %p\n", addr,
241 (void *)pgd_val(pgd)); 253 (void *)pgd_val(pgd));
242 next = pgd_addr_end(addr, end); 254 next = pgd_addr_end(addr, end);
@@ -279,3 +291,5 @@ slow_irqon:
279 return ret; 291 return ret;
280 } 292 }
281} 293}
294
295#endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 8d5b4758c13a..f5bc1b213f24 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -516,7 +516,7 @@ static int __init htab_dt_scan_pftsize(unsigned long node,
516 516
517static unsigned long __init htab_get_table_size(void) 517static unsigned long __init htab_get_table_size(void)
518{ 518{
519 unsigned long mem_size, rnd_mem_size, pteg_count; 519 unsigned long mem_size, rnd_mem_size, pteg_count, psize;
520 520
521 /* If hash size isn't already provided by the platform, we try to 521 /* If hash size isn't already provided by the platform, we try to
522 * retrieve it from the device-tree. If it's not there neither, we 522 * retrieve it from the device-tree. If it's not there neither, we
@@ -534,7 +534,8 @@ static unsigned long __init htab_get_table_size(void)
534 rnd_mem_size <<= 1; 534 rnd_mem_size <<= 1;
535 535
536 /* # pages / 2 */ 536 /* # pages / 2 */
537 pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11); 537 psize = mmu_psize_defs[mmu_virtual_psize].shift;
538 pteg_count = max(rnd_mem_size >> (psize + 1), 1UL << 11);
538 539
539 return pteg_count << 7; 540 return pteg_count << 7;
540} 541}
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index f00f09a77f12..f668fa9ba804 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -472,40 +472,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
472{ 472{
473#ifdef CONFIG_PPC_STD_MMU 473#ifdef CONFIG_PPC_STD_MMU
474 unsigned long access = 0, trap; 474 unsigned long access = 0, trap;
475#endif
476 unsigned long pfn = pte_pfn(pte);
477
478 /* handle i-cache coherency */
479 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
480 !cpu_has_feature(CPU_FTR_NOEXECUTE) &&
481 pfn_valid(pfn)) {
482 struct page *page = pfn_to_page(pfn);
483#ifdef CONFIG_8xx
484 /* On 8xx, cache control instructions (particularly
485 * "dcbst" from flush_dcache_icache) fault as write
486 * operation if there is an unpopulated TLB entry
487 * for the address in question. To workaround that,
488 * we invalidate the TLB here, thus avoiding dcbst
489 * misbehaviour.
490 */
491 _tlbil_va(address, 0 /* 8xx doesn't care about PID */);
492#endif
493 /* The _PAGE_USER test should really be _PAGE_EXEC, but
494 * older glibc versions execute some code from no-exec
495 * pages, which for now we are supporting. If exec-only
496 * pages are ever implemented, this will have to change.
497 */
498 if (!PageReserved(page) && (pte_val(pte) & _PAGE_USER)
499 && !test_bit(PG_arch_1, &page->flags)) {
500 if (vma->vm_mm == current->active_mm) {
501 __flush_dcache_icache((void *) address);
502 } else
503 flush_dcache_icache_page(page);
504 set_bit(PG_arch_1, &page->flags);
505 }
506 }
507 475
508#ifdef CONFIG_PPC_STD_MMU
509 /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */ 476 /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
510 if (!pte_young(pte) || address >= TASK_SIZE) 477 if (!pte_young(pte) || address >= TASK_SIZE)
511 return; 478 return;
diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap.c
index 86010fc7d3b1..0d957a4c70fe 100644
--- a/arch/powerpc/mm/mmap.c
+++ b/arch/powerpc/mm/mmap.c
@@ -24,36 +24,26 @@
24 24
25#include <linux/personality.h> 25#include <linux/personality.h>
26#include <linux/mm.h> 26#include <linux/mm.h>
27#include <linux/random.h>
27#include <linux/sched.h> 28#include <linux/sched.h>
28 29
29/* 30/*
30 * Top of mmap area (just below the process stack). 31 * Top of mmap area (just below the process stack).
31 * 32 *
32 * Leave an at least ~128 MB hole. 33 * Leave at least a ~128 MB hole on 32bit applications.
34 *
35 * On 64bit applications we randomise the stack by 1GB so we need to
36 * space our mmap start address by a further 1GB, otherwise there is a
37 * chance the mmap area will end up closer to the stack than our ulimit
38 * requires.
33 */ 39 */
34#define MIN_GAP (128*1024*1024) 40#define MIN_GAP32 (128*1024*1024)
41#define MIN_GAP64 ((128 + 1024)*1024*1024UL)
42#define MIN_GAP ((is_32bit_task()) ? MIN_GAP32 : MIN_GAP64)
35#define MAX_GAP (TASK_SIZE/6*5) 43#define MAX_GAP (TASK_SIZE/6*5)
36 44
37static inline unsigned long mmap_base(void)
38{
39 unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
40
41 if (gap < MIN_GAP)
42 gap = MIN_GAP;
43 else if (gap > MAX_GAP)
44 gap = MAX_GAP;
45
46 return TASK_SIZE - (gap & PAGE_MASK);
47}
48
49static inline int mmap_is_legacy(void) 45static inline int mmap_is_legacy(void)
50{ 46{
51 /*
52 * Force standard allocation for 64 bit programs.
53 */
54 if (!test_thread_flag(TIF_32BIT))
55 return 1;
56
57 if (current->personality & ADDR_COMPAT_LAYOUT) 47 if (current->personality & ADDR_COMPAT_LAYOUT)
58 return 1; 48 return 1;
59 49
@@ -64,6 +54,40 @@ static inline int mmap_is_legacy(void)
64} 54}
65 55
66/* 56/*
57 * Since get_random_int() returns the same value within a 1 jiffy window,
58 * we will almost always get the same randomisation for the stack and mmap
59 * region. This will mean the relative distance between stack and mmap will
60 * be the same.
61 *
62 * To avoid this we can shift the randomness by 1 bit.
63 */
64static unsigned long mmap_rnd(void)
65{
66 unsigned long rnd = 0;
67
68 if (current->flags & PF_RANDOMIZE) {
69 /* 8MB for 32bit, 1GB for 64bit */
70 if (is_32bit_task())
71 rnd = (long)(get_random_int() % (1<<(22-PAGE_SHIFT)));
72 else
73 rnd = (long)(get_random_int() % (1<<(29-PAGE_SHIFT)));
74 }
75 return (rnd << PAGE_SHIFT) * 2;
76}
77
78static inline unsigned long mmap_base(void)
79{
80 unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
81
82 if (gap < MIN_GAP)
83 gap = MIN_GAP;
84 else if (gap > MAX_GAP)
85 gap = MAX_GAP;
86
87 return PAGE_ALIGN(TASK_SIZE - gap - mmap_rnd());
88}
89
90/*
67 * This function, called very early during the creation of a new 91 * This function, called very early during the creation of a new
68 * process VM image, sets up which VM layout function to use: 92 * process VM image, sets up which VM layout function to use:
69 */ 93 */
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 5ac08b8ab654..9047145095aa 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -158,35 +158,6 @@ static void unmap_cpu_from_node(unsigned long cpu)
158} 158}
159#endif /* CONFIG_HOTPLUG_CPU */ 159#endif /* CONFIG_HOTPLUG_CPU */
160 160
161static struct device_node * __cpuinit find_cpu_node(unsigned int cpu)
162{
163 unsigned int hw_cpuid = get_hard_smp_processor_id(cpu);
164 struct device_node *cpu_node = NULL;
165 const unsigned int *interrupt_server, *reg;
166 int len;
167
168 while ((cpu_node = of_find_node_by_type(cpu_node, "cpu")) != NULL) {
169 /* Try interrupt server first */
170 interrupt_server = of_get_property(cpu_node,
171 "ibm,ppc-interrupt-server#s", &len);
172
173 len = len / sizeof(u32);
174
175 if (interrupt_server && (len > 0)) {
176 while (len--) {
177 if (interrupt_server[len] == hw_cpuid)
178 return cpu_node;
179 }
180 } else {
181 reg = of_get_property(cpu_node, "reg", &len);
182 if (reg && (len > 0) && (reg[0] == hw_cpuid))
183 return cpu_node;
184 }
185 }
186
187 return NULL;
188}
189
190/* must hold reference to node during call */ 161/* must hold reference to node during call */
191static const int *of_get_associativity(struct device_node *dev) 162static const int *of_get_associativity(struct device_node *dev)
192{ 163{
@@ -290,7 +261,7 @@ static int __init find_min_common_depth(void)
290 ref_points = of_get_property(rtas_root, 261 ref_points = of_get_property(rtas_root,
291 "ibm,associativity-reference-points", &len); 262 "ibm,associativity-reference-points", &len);
292 263
293 if ((len >= 1) && ref_points) { 264 if ((len >= 2 * sizeof(unsigned int)) && ref_points) {
294 depth = ref_points[1]; 265 depth = ref_points[1];
295 } else { 266 } else {
296 dbg("NUMA: ibm,associativity-reference-points not found.\n"); 267 dbg("NUMA: ibm,associativity-reference-points not found.\n");
@@ -470,7 +441,7 @@ static int of_drconf_to_nid_single(struct of_drconf_cell *drmem,
470static int __cpuinit numa_setup_cpu(unsigned long lcpu) 441static int __cpuinit numa_setup_cpu(unsigned long lcpu)
471{ 442{
472 int nid = 0; 443 int nid = 0;
473 struct device_node *cpu = find_cpu_node(lcpu); 444 struct device_node *cpu = of_get_cpu_node(lcpu, NULL);
474 445
475 if (!cpu) { 446 if (!cpu) {
476 WARN_ON(1); 447 WARN_ON(1);
@@ -652,7 +623,7 @@ static int __init parse_numa_properties(void)
652 for_each_present_cpu(i) { 623 for_each_present_cpu(i) {
653 int nid; 624 int nid;
654 625
655 cpu = find_cpu_node(i); 626 cpu = of_get_cpu_node(i, NULL);
656 BUG_ON(!cpu); 627 BUG_ON(!cpu);
657 nid = of_node_to_nid_single(cpu); 628 nid = of_node_to_nid_single(cpu);
658 of_node_put(cpu); 629 of_node_put(cpu);
@@ -1041,57 +1012,32 @@ early_param("numa", early_numa);
1041 1012
1042#ifdef CONFIG_MEMORY_HOTPLUG 1013#ifdef CONFIG_MEMORY_HOTPLUG
1043/* 1014/*
1044 * Validate the node associated with the memory section we are 1015 * Find the node associated with a hot added memory section for
1045 * trying to add. 1016 * memory represented in the device tree by the property
1046 */ 1017 * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory.
1047int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size,
1048 unsigned long scn_addr)
1049{
1050 nodemask_t nodes;
1051
1052 if (*nid < 0 || !node_online(*nid))
1053 *nid = any_online_node(NODE_MASK_ALL);
1054
1055 if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) {
1056 nodes_setall(nodes);
1057 while (NODE_DATA(*nid)->node_spanned_pages == 0) {
1058 node_clear(*nid, nodes);
1059 *nid = any_online_node(nodes);
1060 }
1061
1062 return 1;
1063 }
1064
1065 return 0;
1066}
1067
1068/*
1069 * Find the node associated with a hot added memory section represented
1070 * by the ibm,dynamic-reconfiguration-memory node.
1071 */ 1018 */
1072static int hot_add_drconf_scn_to_nid(struct device_node *memory, 1019static int hot_add_drconf_scn_to_nid(struct device_node *memory,
1073 unsigned long scn_addr) 1020 unsigned long scn_addr)
1074{ 1021{
1075 const u32 *dm; 1022 const u32 *dm;
1076 unsigned int n, rc; 1023 unsigned int drconf_cell_cnt, rc;
1077 unsigned long lmb_size; 1024 unsigned long lmb_size;
1078 int default_nid = any_online_node(NODE_MASK_ALL);
1079 int nid;
1080 struct assoc_arrays aa; 1025 struct assoc_arrays aa;
1026 int nid = -1;
1081 1027
1082 n = of_get_drconf_memory(memory, &dm); 1028 drconf_cell_cnt = of_get_drconf_memory(memory, &dm);
1083 if (!n) 1029 if (!drconf_cell_cnt)
1084 return default_nid;; 1030 return -1;
1085 1031
1086 lmb_size = of_get_lmb_size(memory); 1032 lmb_size = of_get_lmb_size(memory);
1087 if (!lmb_size) 1033 if (!lmb_size)
1088 return default_nid; 1034 return -1;
1089 1035
1090 rc = of_get_assoc_arrays(memory, &aa); 1036 rc = of_get_assoc_arrays(memory, &aa);
1091 if (rc) 1037 if (rc)
1092 return default_nid; 1038 return -1;
1093 1039
1094 for (; n != 0; --n) { 1040 for (; drconf_cell_cnt != 0; --drconf_cell_cnt) {
1095 struct of_drconf_cell drmem; 1041 struct of_drconf_cell drmem;
1096 1042
1097 read_drconf_cell(&drmem, &dm); 1043 read_drconf_cell(&drmem, &dm);
@@ -1102,15 +1048,57 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
1102 || !(drmem.flags & DRCONF_MEM_ASSIGNED)) 1048 || !(drmem.flags & DRCONF_MEM_ASSIGNED))
1103 continue; 1049 continue;
1104 1050
1051 if ((scn_addr < drmem.base_addr)
1052 || (scn_addr >= (drmem.base_addr + lmb_size)))
1053 continue;
1054
1105 nid = of_drconf_to_nid_single(&drmem, &aa); 1055 nid = of_drconf_to_nid_single(&drmem, &aa);
1056 break;
1057 }
1058
1059 return nid;
1060}
1106 1061
1107 if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size, 1062/*
1108 scn_addr)) 1063 * Find the node associated with a hot added memory section for memory
1109 return nid; 1064 * represented in the device tree as a node (i.e. memory@XXXX) for
1065 * each lmb.
1066 */
1067int hot_add_node_scn_to_nid(unsigned long scn_addr)
1068{
1069 struct device_node *memory = NULL;
1070 int nid = -1;
1071
1072 while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
1073 unsigned long start, size;
1074 int ranges;
1075 const unsigned int *memcell_buf;
1076 unsigned int len;
1077
1078 memcell_buf = of_get_property(memory, "reg", &len);
1079 if (!memcell_buf || len <= 0)
1080 continue;
1081
1082 /* ranges in cell */
1083 ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells);
1084
1085 while (ranges--) {
1086 start = read_n_cells(n_mem_addr_cells, &memcell_buf);
1087 size = read_n_cells(n_mem_size_cells, &memcell_buf);
1088
1089 if ((scn_addr < start) || (scn_addr >= (start + size)))
1090 continue;
1091
1092 nid = of_node_to_nid_single(memory);
1093 break;
1094 }
1095
1096 of_node_put(memory);
1097 if (nid >= 0)
1098 break;
1110 } 1099 }
1111 1100
1112 BUG(); /* section address should be found above */ 1101 return nid;
1113 return 0;
1114} 1102}
1115 1103
1116/* 1104/*
@@ -1121,7 +1109,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
1121int hot_add_scn_to_nid(unsigned long scn_addr) 1109int hot_add_scn_to_nid(unsigned long scn_addr)
1122{ 1110{
1123 struct device_node *memory = NULL; 1111 struct device_node *memory = NULL;
1124 int nid; 1112 int nid, found = 0;
1125 1113
1126 if (!numa_enabled || (min_common_depth < 0)) 1114 if (!numa_enabled || (min_common_depth < 0))
1127 return any_online_node(NODE_MASK_ALL); 1115 return any_online_node(NODE_MASK_ALL);
@@ -1130,35 +1118,25 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
1130 if (memory) { 1118 if (memory) {
1131 nid = hot_add_drconf_scn_to_nid(memory, scn_addr); 1119 nid = hot_add_drconf_scn_to_nid(memory, scn_addr);
1132 of_node_put(memory); 1120 of_node_put(memory);
1133 return nid; 1121 } else {
1122 nid = hot_add_node_scn_to_nid(scn_addr);
1134 } 1123 }
1135 1124
1136 while ((memory = of_find_node_by_type(memory, "memory")) != NULL) { 1125 if (nid < 0 || !node_online(nid))
1137 unsigned long start, size; 1126 nid = any_online_node(NODE_MASK_ALL);
1138 int ranges;
1139 const unsigned int *memcell_buf;
1140 unsigned int len;
1141
1142 memcell_buf = of_get_property(memory, "reg", &len);
1143 if (!memcell_buf || len <= 0)
1144 continue;
1145 1127
1146 /* ranges in cell */ 1128 if (NODE_DATA(nid)->node_spanned_pages)
1147 ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells); 1129 return nid;
1148ha_new_range:
1149 start = read_n_cells(n_mem_addr_cells, &memcell_buf);
1150 size = read_n_cells(n_mem_size_cells, &memcell_buf);
1151 nid = of_node_to_nid_single(memory);
1152 1130
1153 if (valid_hot_add_scn(&nid, start, size, scn_addr)) { 1131 for_each_online_node(nid) {
1154 of_node_put(memory); 1132 if (NODE_DATA(nid)->node_spanned_pages) {
1155 return nid; 1133 found = 1;
1134 break;
1156 } 1135 }
1157
1158 if (--ranges) /* process all ranges in cell */
1159 goto ha_new_range;
1160 } 1136 }
1161 BUG(); /* section address should be found above */ 1137
1162 return 0; 1138 BUG_ON(!found);
1139 return nid;
1163} 1140}
1141
1164#endif /* CONFIG_MEMORY_HOTPLUG */ 1142#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 6d94116fdea1..a27ded3adac5 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * This file contains common routines for dealing with free of page tables 2 * This file contains common routines for dealing with free of page tables
3 * Along with common page table handling code
3 * 4 *
4 * Derived from arch/powerpc/mm/tlb_64.c: 5 * Derived from arch/powerpc/mm/tlb_64.c:
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
@@ -115,3 +116,133 @@ void pte_free_finish(void)
115 pte_free_submit(*batchp); 116 pte_free_submit(*batchp);
116 *batchp = NULL; 117 *batchp = NULL;
117} 118}
119
120/*
121 * Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags()
122 */
123static pte_t do_dcache_icache_coherency(pte_t pte)
124{
125 unsigned long pfn = pte_pfn(pte);
126 struct page *page;
127
128 if (unlikely(!pfn_valid(pfn)))
129 return pte;
130 page = pfn_to_page(pfn);
131
132 if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) {
133 pr_debug("do_dcache_icache_coherency... flushing\n");
134 flush_dcache_icache_page(page);
135 set_bit(PG_arch_1, &page->flags);
136 }
137 else
138 pr_debug("do_dcache_icache_coherency... already clean\n");
139 return __pte(pte_val(pte) | _PAGE_HWEXEC);
140}
141
142static inline int is_exec_fault(void)
143{
144 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
145}
146
147/* We only try to do i/d cache coherency on stuff that looks like
148 * reasonably "normal" PTEs. We currently require a PTE to be present
149 * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE
150 */
151static inline int pte_looks_normal(pte_t pte)
152{
153 return (pte_val(pte) &
154 (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE)) ==
155 (_PAGE_PRESENT);
156}
157
158#if defined(CONFIG_PPC_STD_MMU)
159/* Server-style MMU handles coherency when hashing if HW exec permission
160 * is supposed per page (currently 64-bit only). Else, we always flush
161 * valid PTEs in set_pte.
162 */
163static inline int pte_need_exec_flush(pte_t pte, int set_pte)
164{
165 return set_pte && pte_looks_normal(pte) &&
166 !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
167 cpu_has_feature(CPU_FTR_NOEXECUTE));
168}
169#elif _PAGE_HWEXEC == 0
170/* Embedded type MMU without HW exec support (8xx only so far), we flush
171 * the cache for any present PTE
172 */
173static inline int pte_need_exec_flush(pte_t pte, int set_pte)
174{
175 return set_pte && pte_looks_normal(pte);
176}
177#else
178/* Other embedded CPUs with HW exec support per-page, we flush on exec
179 * fault if HWEXEC is not set
180 */
181static inline int pte_need_exec_flush(pte_t pte, int set_pte)
182{
183 return pte_looks_normal(pte) && is_exec_fault() &&
184 !(pte_val(pte) & _PAGE_HWEXEC);
185}
186#endif
187
188/*
189 * set_pte stores a linux PTE into the linux page table.
190 */
191void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
192{
193#ifdef CONFIG_DEBUG_VM
194 WARN_ON(pte_present(*ptep));
195#endif
196 /* Note: mm->context.id might not yet have been assigned as
197 * this context might not have been activated yet when this
198 * is called.
199 */
200 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
201 if (pte_need_exec_flush(pte, 1))
202 pte = do_dcache_icache_coherency(pte);
203
204 /* Perform the setting of the PTE */
205 __set_pte_at(mm, addr, ptep, pte, 0);
206}
207
208/*
209 * This is called when relaxing access to a PTE. It's also called in the page
210 * fault path when we don't hit any of the major fault cases, ie, a minor
211 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
212 * handled those two for us, we additionally deal with missing execute
213 * permission here on some processors
214 */
215int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
216 pte_t *ptep, pte_t entry, int dirty)
217{
218 int changed;
219 if (!dirty && pte_need_exec_flush(entry, 0))
220 entry = do_dcache_icache_coherency(entry);
221 changed = !pte_same(*(ptep), entry);
222 if (changed) {
223 assert_pte_locked(vma->vm_mm, address);
224 __ptep_set_access_flags(ptep, entry);
225 flush_tlb_page_nohash(vma, address);
226 }
227 return changed;
228}
229
230#ifdef CONFIG_DEBUG_VM
231void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
232{
233 pgd_t *pgd;
234 pud_t *pud;
235 pmd_t *pmd;
236
237 if (mm == &init_mm)
238 return;
239 pgd = mm->pgd + pgd_index(addr);
240 BUG_ON(pgd_none(*pgd));
241 pud = pud_offset(pgd, addr);
242 BUG_ON(pud_none(*pud));
243 pmd = pmd_offset(pud, addr);
244 BUG_ON(!pmd_present(*pmd));
245 BUG_ON(!spin_is_locked(pte_lockptr(mm, pmd)));
246}
247#endif /* CONFIG_DEBUG_VM */
248
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 58bcaeba728d..0f8c4371dfab 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -129,7 +129,8 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
129void __iomem * 129void __iomem *
130ioremap(phys_addr_t addr, unsigned long size) 130ioremap(phys_addr_t addr, unsigned long size)
131{ 131{
132 return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED); 132 return __ioremap_caller(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED,
133 __builtin_return_address(0));
133} 134}
134EXPORT_SYMBOL(ioremap); 135EXPORT_SYMBOL(ioremap);
135 136
@@ -143,13 +144,20 @@ ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags)
143 /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */ 144 /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
144 flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); 145 flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC);
145 146
146 return __ioremap(addr, size, flags); 147 return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
147} 148}
148EXPORT_SYMBOL(ioremap_flags); 149EXPORT_SYMBOL(ioremap_flags);
149 150
150void __iomem * 151void __iomem *
151__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) 152__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
152{ 153{
154 return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
155}
156
157void __iomem *
158__ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
159 void *caller)
160{
153 unsigned long v, i; 161 unsigned long v, i;
154 phys_addr_t p; 162 phys_addr_t p;
155 int err; 163 int err;
@@ -212,7 +220,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
212 220
213 if (mem_init_done) { 221 if (mem_init_done) {
214 struct vm_struct *area; 222 struct vm_struct *area;
215 area = get_vm_area(size, VM_IOREMAP); 223 area = get_vm_area_caller(size, VM_IOREMAP, caller);
216 if (area == 0) 224 if (area == 0)
217 return NULL; 225 return NULL;
218 v = (unsigned long) area->addr; 226 v = (unsigned long) area->addr;
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 365e61ae5dbc..bfa7db6b2fd5 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -144,8 +144,8 @@ void __iounmap_at(void *ea, unsigned long size)
144 unmap_kernel_range((unsigned long)ea, size); 144 unmap_kernel_range((unsigned long)ea, size);
145} 145}
146 146
147void __iomem * __ioremap(phys_addr_t addr, unsigned long size, 147void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
148 unsigned long flags) 148 unsigned long flags, void *caller)
149{ 149{
150 phys_addr_t paligned; 150 phys_addr_t paligned;
151 void __iomem *ret; 151 void __iomem *ret;
@@ -168,8 +168,9 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
168 if (mem_init_done) { 168 if (mem_init_done) {
169 struct vm_struct *area; 169 struct vm_struct *area;
170 170
171 area = __get_vm_area(size, VM_IOREMAP, 171 area = __get_vm_area_caller(size, VM_IOREMAP,
172 ioremap_bot, IOREMAP_END); 172 ioremap_bot, IOREMAP_END,
173 caller);
173 if (area == NULL) 174 if (area == NULL)
174 return NULL; 175 return NULL;
175 ret = __ioremap_at(paligned, area->addr, size, flags); 176 ret = __ioremap_at(paligned, area->addr, size, flags);
@@ -186,19 +187,27 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
186 return ret; 187 return ret;
187} 188}
188 189
190void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
191 unsigned long flags)
192{
193 return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
194}
189 195
190void __iomem * ioremap(phys_addr_t addr, unsigned long size) 196void __iomem * ioremap(phys_addr_t addr, unsigned long size)
191{ 197{
192 unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED; 198 unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
199 void *caller = __builtin_return_address(0);
193 200
194 if (ppc_md.ioremap) 201 if (ppc_md.ioremap)
195 return ppc_md.ioremap(addr, size, flags); 202 return ppc_md.ioremap(addr, size, flags, caller);
196 return __ioremap(addr, size, flags); 203 return __ioremap_caller(addr, size, flags, caller);
197} 204}
198 205
199void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, 206void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size,
200 unsigned long flags) 207 unsigned long flags)
201{ 208{
209 void *caller = __builtin_return_address(0);
210
202 /* writeable implies dirty for kernel addresses */ 211 /* writeable implies dirty for kernel addresses */
203 if (flags & _PAGE_RW) 212 if (flags & _PAGE_RW)
204 flags |= _PAGE_DIRTY; 213 flags |= _PAGE_DIRTY;
@@ -207,8 +216,8 @@ void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size,
207 flags &= ~(_PAGE_USER | _PAGE_EXEC); 216 flags &= ~(_PAGE_USER | _PAGE_EXEC);
208 217
209 if (ppc_md.ioremap) 218 if (ppc_md.ioremap)
210 return ppc_md.ioremap(addr, size, flags); 219 return ppc_md.ioremap(addr, size, flags, caller);
211 return __ioremap(addr, size, flags); 220 return __ioremap_caller(addr, size, flags, caller);
212} 221}
213 222
214 223
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index f900a39e6ec4..788b87c36f77 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -118,25 +118,50 @@ _GLOBAL(_tlbil_pid)
118 118
119#elif defined(CONFIG_FSL_BOOKE) 119#elif defined(CONFIG_FSL_BOOKE)
120/* 120/*
121 * FSL BookE implementations. Currently _pid and _all are the 121 * FSL BookE implementations.
122 * same. This will change when tlbilx is actually supported and 122 *
123 * performs invalidate-by-PID. This change will be driven by 123 * Since feature sections are using _SECTION_ELSE we need
124 * mmu_features conditional 124 * to have the larger code path before the _SECTION_ELSE
125 */ 125 */
126 126
127#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
128 MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
127/* 129/*
128 * Flush MMU TLB on the local processor 130 * Flush MMU TLB on the local processor
129 */ 131 */
130_GLOBAL(_tlbil_pid)
131_GLOBAL(_tlbil_all) 132_GLOBAL(_tlbil_all)
132#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ 133BEGIN_MMU_FTR_SECTION
133 MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) 134 li r3,(MMUCSR0_TLBFI)@l
135 mtspr SPRN_MMUCSR0, r3
1361:
137 mfspr r3,SPRN_MMUCSR0
138 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b
140MMU_FTR_SECTION_ELSE
141 PPC_TLBILX_ALL(0,0)
142ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
143 msync
144 isync
145 blr
146
147_GLOBAL(_tlbil_pid)
148BEGIN_MMU_FTR_SECTION
149 slwi r3,r3,16
150 mfmsr r10
151 wrteei 0
152 mfspr r4,SPRN_MAS6 /* save MAS6 */
153 mtspr SPRN_MAS6,r3
154 PPC_TLBILX_PID(0,0)
155 mtspr SPRN_MAS6,r4 /* restore MAS6 */
156 wrtee r10
157MMU_FTR_SECTION_ELSE
134 li r3,(MMUCSR0_TLBFI)@l 158 li r3,(MMUCSR0_TLBFI)@l
135 mtspr SPRN_MMUCSR0, r3 159 mtspr SPRN_MMUCSR0, r3
1361: 1601:
137 mfspr r3,SPRN_MMUCSR0 161 mfspr r3,SPRN_MMUCSR0
138 andi. r3,r3,MMUCSR0_TLBFI@l 162 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b 163 bne 1b
164ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBILX)
140 msync 165 msync
141 isync 166 isync
142 blr 167 blr
@@ -149,7 +174,9 @@ _GLOBAL(_tlbil_va)
149 mfmsr r10 174 mfmsr r10
150 wrteei 0 175 wrteei 0
151 slwi r4,r4,16 176 slwi r4,r4,16
177 ori r4,r4,(MAS6_ISIZE(BOOK3E_PAGESZ_4K))@l
152 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ 178 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
179BEGIN_MMU_FTR_SECTION
153 tlbsx 0,r3 180 tlbsx 0,r3
154 mfspr r4,SPRN_MAS1 /* check valid */ 181 mfspr r4,SPRN_MAS1 /* check valid */
155 andis. r3,r4,MAS1_VALID@h 182 andis. r3,r4,MAS1_VALID@h
@@ -157,6 +184,9 @@ _GLOBAL(_tlbil_va)
157 rlwinm r4,r4,0,1,31 184 rlwinm r4,r4,0,1,31
158 mtspr SPRN_MAS1,r4 185 mtspr SPRN_MAS1,r4
159 tlbwe 186 tlbwe
187MMU_FTR_SECTION_ELSE
188 PPC_TLBILX_VA(0,r3)
189ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
160 msync 190 msync
161 isync 191 isync
1621: wrtee r10 1921: wrtee r10
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index cc599eb8768b..f8d36f940e88 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -29,7 +29,7 @@
29static unsigned long reset_value[OP_MAX_COUNTER]; 29static unsigned long reset_value[OP_MAX_COUNTER];
30 30
31static int oprofile_running; 31static int oprofile_running;
32static u32 mmcr0_val, mmcr1_val, mmcr2_val; 32static u32 mmcr0_val, mmcr1_val, mmcr2_val, num_pmcs;
33 33
34#define MMCR0_PMC1_SHIFT 6 34#define MMCR0_PMC1_SHIFT 6
35#define MMCR0_PMC2_SHIFT 0 35#define MMCR0_PMC2_SHIFT 0
@@ -88,13 +88,12 @@ static int fsl7450_cpu_setup(struct op_counter_config *ctr)
88 88
89 mtspr(SPRN_MMCR0, mmcr0_val); 89 mtspr(SPRN_MMCR0, mmcr0_val);
90 mtspr(SPRN_MMCR1, mmcr1_val); 90 mtspr(SPRN_MMCR1, mmcr1_val);
91 mtspr(SPRN_MMCR2, mmcr2_val); 91 if (num_pmcs > 4)
92 mtspr(SPRN_MMCR2, mmcr2_val);
92 93
93 return 0; 94 return 0;
94} 95}
95 96
96#define NUM_CTRS 6
97
98/* Configures the global settings for the countes on all CPUs. */ 97/* Configures the global settings for the countes on all CPUs. */
99static int fsl7450_reg_setup(struct op_counter_config *ctr, 98static int fsl7450_reg_setup(struct op_counter_config *ctr,
100 struct op_system_config *sys, 99 struct op_system_config *sys,
@@ -102,12 +101,13 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
102{ 101{
103 int i; 102 int i;
104 103
104 num_pmcs = num_ctrs;
105 /* Our counters count up, and "count" refers to 105 /* Our counters count up, and "count" refers to
106 * how much before the next interrupt, and we interrupt 106 * how much before the next interrupt, and we interrupt
107 * on overflow. So we calculate the starting value 107 * on overflow. So we calculate the starting value
108 * which will give us "count" until overflow. 108 * which will give us "count" until overflow.
109 * Then we set the events on the enabled counters */ 109 * Then we set the events on the enabled counters */
110 for (i = 0; i < NUM_CTRS; ++i) 110 for (i = 0; i < num_ctrs; ++i)
111 reset_value[i] = 0x80000000UL - ctr[i].count; 111 reset_value[i] = 0x80000000UL - ctr[i].count;
112 112
113 /* Set events for Counters 1 & 2 */ 113 /* Set events for Counters 1 & 2 */
@@ -123,9 +123,10 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
123 123
124 /* Set events for Counters 3-6 */ 124 /* Set events for Counters 3-6 */
125 mmcr1_val = mmcr1_event3(ctr[2].event) 125 mmcr1_val = mmcr1_event3(ctr[2].event)
126 | mmcr1_event4(ctr[3].event) 126 | mmcr1_event4(ctr[3].event);
127 | mmcr1_event5(ctr[4].event) 127 if (num_ctrs > 4)
128 | mmcr1_event6(ctr[5].event); 128 mmcr1_val |= mmcr1_event5(ctr[4].event)
129 | mmcr1_event6(ctr[5].event);
129 130
130 mmcr2_val = 0; 131 mmcr2_val = 0;
131 132
@@ -139,7 +140,7 @@ static int fsl7450_start(struct op_counter_config *ctr)
139 140
140 mtmsr(mfmsr() | MSR_PMM); 141 mtmsr(mfmsr() | MSR_PMM);
141 142
142 for (i = 0; i < NUM_CTRS; ++i) { 143 for (i = 0; i < num_pmcs; ++i) {
143 if (ctr[i].enabled) 144 if (ctr[i].enabled)
144 classic_ctr_write(i, reset_value[i]); 145 classic_ctr_write(i, reset_value[i]);
145 else 146 else
@@ -184,7 +185,7 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
184 pc = mfspr(SPRN_SIAR); 185 pc = mfspr(SPRN_SIAR);
185 is_kernel = is_kernel_addr(pc); 186 is_kernel = is_kernel_addr(pc);
186 187
187 for (i = 0; i < NUM_CTRS; ++i) { 188 for (i = 0; i < num_pmcs; ++i) {
188 val = classic_ctr_read(i); 189 val = classic_ctr_read(i);
189 if (val < 0) { 190 if (val < 0) {
190 if (oprofile_running && ctr[i].enabled) { 191 if (oprofile_running && ctr[i].enabled) {
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 3496bc05058e..bf5c7ff2e6e5 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -118,6 +118,17 @@ config GLACIER
118 help 118 help
119 This option enables support for the AMCC PPC460GT evaluation board. 119 This option enables support for the AMCC PPC460GT evaluation board.
120 120
121config REDWOOD
122 bool "Redwood"
123 depends on 44x
124 default n
125 select PPC44x_SIMPLE
126 select 460SX
127 select PCI
128 select PPC4xx_PCI_EXPRESS
129 help
130 This option enables support for the AMCC PPC460SX Redwood board.
131
121config YOSEMITE 132config YOSEMITE
122 bool "Yosemite" 133 bool "Yosemite"
123 depends on 44x 134 depends on 44x
@@ -220,6 +231,14 @@ config 460EX
220 select IBM_NEW_EMAC_EMAC4 231 select IBM_NEW_EMAC_EMAC4
221 select IBM_NEW_EMAC_TAH 232 select IBM_NEW_EMAC_TAH
222 233
234config 460SX
235 bool
236 select PPC_FPU
237 select IBM_NEW_EMAC_EMAC4
238 select IBM_NEW_EMAC_RGMII
239 select IBM_NEW_EMAC_ZMII
240 select IBM_NEW_EMAC_TAH
241
223# 44x errata/workaround config symbols, selected by the CPU models above 242# 44x errata/workaround config symbols, selected by the CPU models above
224config IBM440EP_ERR42 243config IBM440EP_ERR42
225 bool 244 bool
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
index 76fdc51dac8b..5bcd441885e8 100644
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -57,6 +57,7 @@ static char *board[] __initdata = {
57 "ibm,ebony", 57 "ibm,ebony",
58 "amcc,katmai", 58 "amcc,katmai",
59 "amcc,rainier", 59 "amcc,rainier",
60 "amcc,redwood",
60 "amcc,sequoia", 61 "amcc,sequoia",
61 "amcc,taishan", 62 "amcc,taishan",
62 "amcc,yosemite" 63 "amcc,yosemite"
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 326852c78b8f..4dac9b0525a4 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -12,7 +12,7 @@ config PPC_MPC5121
12 12
13config MPC5121_ADS 13config MPC5121_ADS
14 bool "Freescale MPC5121E ADS" 14 bool "Freescale MPC5121E ADS"
15 depends on PPC_MULTIPLATFORM && PPC32 15 depends on 6xx
16 select DEFAULT_UIMAGE 16 select DEFAULT_UIMAGE
17 select PPC_MPC5121 17 select PPC_MPC5121
18 select MPC5121_ADS_CPLD 18 select MPC5121_ADS_CPLD
@@ -21,7 +21,7 @@ config MPC5121_ADS
21 21
22config MPC5121_GENERIC 22config MPC5121_GENERIC
23 bool "Generic support for simple MPC5121 based boards" 23 bool "Generic support for simple MPC5121 based boards"
24 depends on PPC_MULTIPLATFORM && PPC32 24 depends on 6xx
25 select DEFAULT_UIMAGE 25 select DEFAULT_UIMAGE
26 select PPC_MPC5121 26 select PPC_MPC5121
27 help 27 help
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 696a5ee4962d..8b8e9560a315 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,6 +1,6 @@
1config PPC_MPC52xx 1config PPC_MPC52xx
2 bool "52xx-based boards" 2 bool "52xx-based boards"
3 depends on PPC_MULTIPLATFORM && PPC32 3 depends on 6xx
4 select PPC_CLOCK 4 select PPC_CLOCK
5 select PPC_PCI_CHOICE 5 select PPC_PCI_CHOICE
6 6
@@ -21,7 +21,13 @@ config PPC_MPC5200_SIMPLE
21 and if there is a PCI bus node defined in the device tree. 21 and if there is a PCI bus node defined in the device tree.
22 22
23 Boards that are compatible with this generic platform support 23 Boards that are compatible with this generic platform support
24 are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'. 24 are:
25 intercontrol,digsy-mtc
26 phytec,pcm030
27 phytec,pcm032
28 promess,motionpro
29 schindler,cm5200
30 tqc,tqm5200
25 31
26config PPC_EFIKA 32config PPC_EFIKA
27 bool "bPlan Efika 5k2. MPC5200B based computer" 33 bool "bPlan Efika 5k2. MPC5200B based computer"
@@ -35,6 +41,11 @@ config PPC_LITE5200
35 depends on PPC_MPC52xx 41 depends on PPC_MPC52xx
36 select DEFAULT_UIMAGE 42 select DEFAULT_UIMAGE
37 43
44config PPC_MEDIA5200
45 bool "Freescale Media5200 Eval Board"
46 depends on PPC_MPC52xx
47 select DEFAULT_UIMAGE
48
38config PPC_MPC5200_BUGFIX 49config PPC_MPC5200_BUGFIX
39 bool "MPC5200 (L25R) bugfix support" 50 bool "MPC5200 (L25R) bugfix support"
40 depends on PPC_MPC52xx 51 depends on PPC_MPC52xx
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index b8a52062738a..bfd4f52cf3dd 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -1,12 +1,13 @@
1# 1#
2# Makefile for 52xx based boards 2# Makefile for 52xx based boards
3# 3#
4obj-y += mpc52xx_pic.o mpc52xx_common.o 4obj-y += mpc52xx_pic.o mpc52xx_common.o mpc52xx_gpt.o
5obj-$(CONFIG_PCI) += mpc52xx_pci.o 5obj-$(CONFIG_PCI) += mpc52xx_pci.o
6 6
7obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o 7obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
8obj-$(CONFIG_PPC_EFIKA) += efika.o 8obj-$(CONFIG_PPC_EFIKA) += efika.o
9obj-$(CONFIG_PPC_LITE5200) += lite5200.o 9obj-$(CONFIG_PPC_LITE5200) += lite5200.o
10obj-$(CONFIG_PPC_MEDIA5200) += media5200.o
10 11
11obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc52xx_pm.o 12obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc52xx_pm.o
12ifeq ($(CONFIG_PPC_LITE5200),y) 13ifeq ($(CONFIG_PPC_LITE5200),y)
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
new file mode 100644
index 000000000000..68e4f1696d14
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -0,0 +1,273 @@
1/*
2 * Support for 'media5200-platform' compatible boards.
3 *
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Description:
12 * This code implements support for the Freescape Media5200 platform
13 * (built around the MPC5200 SoC).
14 *
15 * Notable characteristic of the Media5200 is the presence of an FPGA
16 * that has all external IRQ lines routed through it. This file implements
17 * a cascaded interrupt controller driver which attaches itself to the
18 * Virtual IRQ subsystem after the primary mpc5200 interrupt controller
19 * is initialized.
20 *
21 */
22
23#undef DEBUG
24
25#include <linux/irq.h>
26#include <linux/interrupt.h>
27#include <linux/io.h>
28#include <asm/time.h>
29#include <asm/prom.h>
30#include <asm/machdep.h>
31#include <asm/mpc52xx.h>
32
33static struct of_device_id mpc5200_gpio_ids[] __initdata = {
34 { .compatible = "fsl,mpc5200-gpio", },
35 { .compatible = "mpc5200-gpio", },
36 {}
37};
38
39/* FPGA register set */
40#define MEDIA5200_IRQ_ENABLE (0x40c)
41#define MEDIA5200_IRQ_STATUS (0x410)
42#define MEDIA5200_NUM_IRQS (6)
43#define MEDIA5200_IRQ_SHIFT (32 - MEDIA5200_NUM_IRQS)
44
45struct media5200_irq {
46 void __iomem *regs;
47 spinlock_t lock;
48 struct irq_host *irqhost;
49};
50struct media5200_irq media5200_irq;
51
52static void media5200_irq_unmask(unsigned int virq)
53{
54 unsigned long flags;
55 u32 val;
56
57 spin_lock_irqsave(&media5200_irq.lock, flags);
58 val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
59 val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq);
60 out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
61 spin_unlock_irqrestore(&media5200_irq.lock, flags);
62}
63
64static void media5200_irq_mask(unsigned int virq)
65{
66 unsigned long flags;
67 u32 val;
68
69 spin_lock_irqsave(&media5200_irq.lock, flags);
70 val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
71 val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq));
72 out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
73 spin_unlock_irqrestore(&media5200_irq.lock, flags);
74}
75
76static struct irq_chip media5200_irq_chip = {
77 .typename = "Media5200 FPGA",
78 .unmask = media5200_irq_unmask,
79 .mask = media5200_irq_mask,
80 .mask_ack = media5200_irq_mask,
81};
82
83void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
84{
85 int sub_virq, val;
86 u32 status, enable;
87
88 /* Mask off the cascaded IRQ */
89 spin_lock(&desc->lock);
90 desc->chip->mask(virq);
91 spin_unlock(&desc->lock);
92
93 /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs
94 * are pending. 'ffs()' is 1 based */
95 status = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
96 enable = in_be32(media5200_irq.regs + MEDIA5200_IRQ_STATUS);
97 val = ffs((status & enable) >> MEDIA5200_IRQ_SHIFT);
98 if (val) {
99 sub_virq = irq_linear_revmap(media5200_irq.irqhost, val - 1);
100 /* pr_debug("%s: virq=%i s=%.8x e=%.8x hwirq=%i subvirq=%i\n",
101 * __func__, virq, status, enable, val - 1, sub_virq);
102 */
103 generic_handle_irq(sub_virq);
104 }
105
106 /* Processing done; can reenable the cascade now */
107 spin_lock(&desc->lock);
108 desc->chip->ack(virq);
109 if (!(desc->status & IRQ_DISABLED))
110 desc->chip->unmask(virq);
111 spin_unlock(&desc->lock);
112}
113
114static int media5200_irq_map(struct irq_host *h, unsigned int virq,
115 irq_hw_number_t hw)
116{
117 struct irq_desc *desc = get_irq_desc(virq);
118
119 pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
120 set_irq_chip_data(virq, &media5200_irq);
121 set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
122 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
123 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
124 desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL;
125
126 return 0;
127}
128
129static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct,
130 u32 *intspec, unsigned int intsize,
131 irq_hw_number_t *out_hwirq,
132 unsigned int *out_flags)
133{
134 if (intsize != 2)
135 return -1;
136
137 pr_debug("%s: bank=%i, number=%i\n", __func__, intspec[0], intspec[1]);
138 *out_hwirq = intspec[1];
139 *out_flags = IRQ_TYPE_NONE;
140 return 0;
141}
142
143static struct irq_host_ops media5200_irq_ops = {
144 .map = media5200_irq_map,
145 .xlate = media5200_irq_xlate,
146};
147
148/*
149 * Setup Media5200 IRQ mapping
150 */
151static void __init media5200_init_irq(void)
152{
153 struct device_node *fpga_np;
154 int cascade_virq;
155
156 /* First setup the regular MPC5200 interrupt controller */
157 mpc52xx_init_irq();
158
159 /* Now find the FPGA IRQ */
160 fpga_np = of_find_compatible_node(NULL, NULL, "fsl,media5200-fpga");
161 if (!fpga_np)
162 goto out;
163 pr_debug("%s: found fpga node: %s\n", __func__, fpga_np->full_name);
164
165 media5200_irq.regs = of_iomap(fpga_np, 0);
166 if (!media5200_irq.regs)
167 goto out;
168 pr_debug("%s: mapped to %p\n", __func__, media5200_irq.regs);
169
170 cascade_virq = irq_of_parse_and_map(fpga_np, 0);
171 if (!cascade_virq)
172 goto out;
173 pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq);
174
175 /* Disable all FPGA IRQs */
176 out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0);
177
178 spin_lock_init(&media5200_irq.lock);
179
180 media5200_irq.irqhost = irq_alloc_host(fpga_np, IRQ_HOST_MAP_LINEAR,
181 MEDIA5200_NUM_IRQS,
182 &media5200_irq_ops, -1);
183 if (!media5200_irq.irqhost)
184 goto out;
185 pr_debug("%s: allocated irqhost\n", __func__);
186
187 media5200_irq.irqhost->host_data = &media5200_irq;
188
189 set_irq_data(cascade_virq, &media5200_irq);
190 set_irq_chained_handler(cascade_virq, media5200_irq_cascade);
191
192 return;
193
194 out:
195 pr_err("Could not find Media5200 FPGA; PCI interrupts will not work\n");
196}
197
198/*
199 * Setup the architecture
200 */
201static void __init media5200_setup_arch(void)
202{
203
204 struct device_node *np;
205 struct mpc52xx_gpio __iomem *gpio;
206 u32 port_config;
207
208 if (ppc_md.progress)
209 ppc_md.progress("media5200_setup_arch()", 0);
210
211 /* Map important registers from the internal memory map */
212 mpc52xx_map_common_devices();
213
214 /* Some mpc5200 & mpc5200b related configuration */
215 mpc5200_setup_xlb_arbiter();
216
217 mpc52xx_setup_pci();
218
219 np = of_find_matching_node(NULL, mpc5200_gpio_ids);
220 gpio = of_iomap(np, 0);
221 of_node_put(np);
222 if (!gpio) {
223 printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
224 __func__);
225 return;
226 }
227
228 /* Set port config */
229 port_config = in_be32(&gpio->port_config);
230
231 port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */
232 port_config |= 0x01000000;
233
234 out_be32(&gpio->port_config, port_config);
235
236 /* Unmap zone */
237 iounmap(gpio);
238
239}
240
241/* list of the supported boards */
242static char *board[] __initdata = {
243 "fsl,media5200",
244 NULL
245};
246
247/*
248 * Called very early, MMU is off, device-tree isn't unflattened
249 */
250static int __init media5200_probe(void)
251{
252 unsigned long node = of_get_flat_dt_root();
253 int i = 0;
254
255 while (board[i]) {
256 if (of_flat_dt_is_compatible(node, board[i]))
257 break;
258 i++;
259 }
260
261 return (board[i] != NULL);
262}
263
264define_machine(media5200_platform) {
265 .name = "media5200-platform",
266 .probe = media5200_probe,
267 .setup_arch = media5200_setup_arch,
268 .init = mpc52xx_declare_of_platform_devices,
269 .init_IRQ = media5200_init_irq,
270 .get_irq = mpc52xx_get_irq,
271 .restart = mpc52xx_restart,
272 .calibrate_decr = generic_calibrate_decr,
273};
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index a3bda0b9f1ff..c31e5b534f0a 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -50,8 +50,10 @@ static void __init mpc5200_simple_setup_arch(void)
50 50
51/* list of the supported boards */ 51/* list of the supported boards */
52static char *board[] __initdata = { 52static char *board[] __initdata = {
53 "promess,motionpro", 53 "intercontrol,digsy-mtc",
54 "phytec,pcm030", 54 "phytec,pcm030",
55 "phytec,pcm032",
56 "promess,motionpro",
55 "schindler,cm5200", 57 "schindler,cm5200",
56 "tqc,tqm5200", 58 "tqc,tqm5200",
57 NULL 59 NULL
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 98367a0255f3..8e3dd5a0f228 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
28static struct of_device_id mpc52xx_bus_ids[] __initdata = { 28static struct of_device_id mpc52xx_bus_ids[] __initdata = {
29 { .compatible = "fsl,mpc5200-immr", }, 29 { .compatible = "fsl,mpc5200-immr", },
30 { .compatible = "fsl,mpc5200b-immr", }, 30 { .compatible = "fsl,mpc5200b-immr", },
31 { .compatible = "fsl,lpb", }, 31 { .compatible = "simple-bus", },
32 32
33 /* depreciated matches; shouldn't be used in new device trees */ 33 /* depreciated matches; shouldn't be used in new device trees */
34 { .compatible = "fsl,lpb", },
34 { .type = "builtin", .compatible = "mpc5200", }, /* efika */ 35 { .type = "builtin", .compatible = "mpc5200", }, /* efika */
35 { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ 36 { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
36 {} 37 {}
@@ -205,6 +206,43 @@ int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
205EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv); 206EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv);
206 207
207/** 208/**
209 * mpc52xx_get_xtal_freq - Get SYS_XTAL_IN frequency for a device
210 *
211 * @node: device node
212 *
213 * Returns the frequency of the external oscillator clock connected
214 * to the SYS_XTAL_IN pin, or 0 if it cannot be determined.
215 */
216unsigned int mpc52xx_get_xtal_freq(struct device_node *node)
217{
218 u32 val;
219 unsigned int freq;
220
221 if (!mpc52xx_cdm)
222 return 0;
223
224 freq = mpc52xx_find_ipb_freq(node);
225 if (!freq)
226 return 0;
227
228 if (in_8(&mpc52xx_cdm->ipb_clk_sel) & 0x1)
229 freq *= 2;
230
231 val = in_be32(&mpc52xx_cdm->rstcfg);
232 if (val & (1 << 5))
233 freq *= 8;
234 else
235 freq *= 4;
236 if (val & (1 << 6))
237 freq /= 12;
238 else
239 freq /= 16;
240
241 return freq;
242}
243EXPORT_SYMBOL(mpc52xx_get_xtal_freq);
244
245/**
208 * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer 246 * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
209 */ 247 */
210void 248void
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
index 07f89ae46d04..2b8d8ef32e4e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -354,88 +354,6 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
354 .remove = mpc52xx_gpiochip_remove, 354 .remove = mpc52xx_gpiochip_remove,
355}; 355};
356 356
357/*
358 * GPIO LIB API implementation for gpt GPIOs.
359 *
360 * Each gpt only has a single GPIO.
361 */
362static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
363{
364 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
365 struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
366
367 return (in_be32(&regs->status) & (1 << (31 - 23))) ? 1 : 0;
368}
369
370static void
371mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
372{
373 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
374 struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
375
376 if (val)
377 out_be32(&regs->mode, 0x34);
378 else
379 out_be32(&regs->mode, 0x24);
380
381 pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
382}
383
384static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
385{
386 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
387 struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
388
389 out_be32(&regs->mode, 0x04);
390
391 return 0;
392}
393
394static int
395mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
396{
397 mpc52xx_gpt_gpio_set(gc, gpio, val);
398 pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
399
400 return 0;
401}
402
403static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
404 const struct of_device_id *match)
405{
406 struct of_mm_gpio_chip *mmchip;
407 struct of_gpio_chip *chip;
408
409 mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
410 if (!mmchip)
411 return -ENOMEM;
412
413 chip = &mmchip->of_gc;
414
415 chip->gpio_cells = 2;
416 chip->gc.ngpio = 1;
417 chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
418 chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
419 chip->gc.get = mpc52xx_gpt_gpio_get;
420 chip->gc.set = mpc52xx_gpt_gpio_set;
421
422 return of_mm_gpiochip_add(ofdev->node, mmchip);
423}
424
425static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
426 {
427 .compatible = "fsl,mpc5200-gpt-gpio",
428 },
429 {}
430};
431
432static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
433 .name = "gpio_gpt",
434 .match_table = mpc52xx_gpt_gpiochip_match,
435 .probe = mpc52xx_gpt_gpiochip_probe,
436 .remove = mpc52xx_gpiochip_remove,
437};
438
439static int __init mpc52xx_gpio_init(void) 357static int __init mpc52xx_gpio_init(void)
440{ 358{
441 if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver)) 359 if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
@@ -444,9 +362,6 @@ static int __init mpc52xx_gpio_init(void)
444 if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver)) 362 if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
445 printk(KERN_ERR "Unable to register simple GPIO driver\n"); 363 printk(KERN_ERR "Unable to register simple GPIO driver\n");
446 364
447 if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
448 printk(KERN_ERR "Unable to register gpt GPIO driver\n");
449
450 return 0; 365 return 0;
451} 366}
452 367
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
new file mode 100644
index 000000000000..bfbcd418e690
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -0,0 +1,396 @@
1/*
2 * MPC5200 General Purpose Timer device driver
3 *
4 * Copyright (c) 2009 Secret Lab Technologies Ltd.
5 * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * This file is a driver for the the General Purpose Timer (gpt) devices
13 * found on the MPC5200 SoC. Each timer has an IO pin which can be used
14 * for GPIO or can be used to raise interrupts. The timer function can
15 * be used independently from the IO pin, or it can be used to control
16 * output signals or measure input signals.
17 *
18 * This driver supports the GPIO and IRQ controller functions of the GPT
19 * device. Timer functions are not yet supported, nor is the watchdog
20 * timer.
21 *
22 * To use the GPIO function, the following two properties must be added
23 * to the device tree node for the gpt device (typically in the .dts file
24 * for the board):
25 * gpio-controller;
26 * #gpio-cells = < 2 >;
27 * This driver will register the GPIO pin if it finds the gpio-controller
28 * property in the device tree.
29 *
30 * To use the IRQ controller function, the following two properties must
31 * be added to the device tree node for the gpt device:
32 * interrupt-controller;
33 * #interrupt-cells = < 1 >;
34 * The IRQ controller binding only uses one cell to specify the interrupt,
35 * and the IRQ flags are encoded in the cell. A cell is not used to encode
36 * the IRQ number because the GPT only has a single IRQ source. For flags,
37 * a value of '1' means rising edge sensitive and '2' means falling edge.
38 *
39 * The GPIO and the IRQ controller functions can be used at the same time,
40 * but in this use case the IO line will only work as an input. Trying to
41 * use it as a GPIO output will not work.
42 *
43 * When using the GPIO line as an output, it can either be driven as normal
44 * IO, or it can be an Open Collector (OC) output. At the moment it is the
45 * responsibility of either the bootloader or the platform setup code to set
46 * the output mode. This driver does not change the output mode setting.
47 */
48
49#include <linux/irq.h>
50#include <linux/interrupt.h>
51#include <linux/io.h>
52#include <linux/of.h>
53#include <linux/of_platform.h>
54#include <linux/of_gpio.h>
55#include <linux/kernel.h>
56#include <asm/mpc52xx.h>
57
58MODULE_DESCRIPTION("Freescale MPC52xx gpt driver");
59MODULE_AUTHOR("Sascha Hauer, Grant Likely");
60MODULE_LICENSE("GPL");
61
62/**
63 * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver
64 * @dev: pointer to device structure
65 * @regs: virtual address of GPT registers
66 * @lock: spinlock to coordinate between different functions.
67 * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled
68 * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
69 */
70struct mpc52xx_gpt_priv {
71 struct device *dev;
72 struct mpc52xx_gpt __iomem *regs;
73 spinlock_t lock;
74 struct irq_host *irqhost;
75
76#if defined(CONFIG_GPIOLIB)
77 struct of_gpio_chip of_gc;
78#endif
79};
80
81#define MPC52xx_GPT_MODE_MS_MASK (0x07)
82#define MPC52xx_GPT_MODE_MS_IC (0x01)
83#define MPC52xx_GPT_MODE_MS_OC (0x02)
84#define MPC52xx_GPT_MODE_MS_PWM (0x03)
85#define MPC52xx_GPT_MODE_MS_GPIO (0x04)
86
87#define MPC52xx_GPT_MODE_GPIO_MASK (0x30)
88#define MPC52xx_GPT_MODE_GPIO_OUT_LOW (0x20)
89#define MPC52xx_GPT_MODE_GPIO_OUT_HIGH (0x30)
90
91#define MPC52xx_GPT_MODE_IRQ_EN (0x0100)
92
93#define MPC52xx_GPT_MODE_ICT_MASK (0x030000)
94#define MPC52xx_GPT_MODE_ICT_RISING (0x010000)
95#define MPC52xx_GPT_MODE_ICT_FALLING (0x020000)
96#define MPC52xx_GPT_MODE_ICT_TOGGLE (0x030000)
97
98#define MPC52xx_GPT_STATUS_IRQMASK (0x000f)
99
100/* ---------------------------------------------------------------------
101 * Cascaded interrupt controller hooks
102 */
103
104static void mpc52xx_gpt_irq_unmask(unsigned int virq)
105{
106 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
107 unsigned long flags;
108
109 spin_lock_irqsave(&gpt->lock, flags);
110 setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
111 spin_unlock_irqrestore(&gpt->lock, flags);
112}
113
114static void mpc52xx_gpt_irq_mask(unsigned int virq)
115{
116 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
117 unsigned long flags;
118
119 spin_lock_irqsave(&gpt->lock, flags);
120 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
121 spin_unlock_irqrestore(&gpt->lock, flags);
122}
123
124static void mpc52xx_gpt_irq_ack(unsigned int virq)
125{
126 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
127
128 out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
129}
130
131static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
132{
133 struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
134 unsigned long flags;
135 u32 reg;
136
137 dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
138
139 spin_lock_irqsave(&gpt->lock, flags);
140 reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;
141 if (flow_type & IRQF_TRIGGER_RISING)
142 reg |= MPC52xx_GPT_MODE_ICT_RISING;
143 if (flow_type & IRQF_TRIGGER_FALLING)
144 reg |= MPC52xx_GPT_MODE_ICT_FALLING;
145 out_be32(&gpt->regs->mode, reg);
146 spin_unlock_irqrestore(&gpt->lock, flags);
147
148 return 0;
149}
150
151static struct irq_chip mpc52xx_gpt_irq_chip = {
152 .typename = "MPC52xx GPT",
153 .unmask = mpc52xx_gpt_irq_unmask,
154 .mask = mpc52xx_gpt_irq_mask,
155 .ack = mpc52xx_gpt_irq_ack,
156 .set_type = mpc52xx_gpt_irq_set_type,
157};
158
159void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
160{
161 struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
162 int sub_virq;
163 u32 status;
164
165 status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK;
166 if (status) {
167 sub_virq = irq_linear_revmap(gpt->irqhost, 0);
168 generic_handle_irq(sub_virq);
169 }
170}
171
172static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
173 irq_hw_number_t hw)
174{
175 struct mpc52xx_gpt_priv *gpt = h->host_data;
176
177 dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
178 set_irq_chip_data(virq, gpt);
179 set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
180
181 return 0;
182}
183
184static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
185 u32 *intspec, unsigned int intsize,
186 irq_hw_number_t *out_hwirq,
187 unsigned int *out_flags)
188{
189 struct mpc52xx_gpt_priv *gpt = h->host_data;
190
191 dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);
192
193 if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) {
194 dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);
195 return -EINVAL;
196 }
197
198 *out_hwirq = 0; /* The GPT only has 1 IRQ line */
199 *out_flags = intspec[0];
200
201 return 0;
202}
203
204static struct irq_host_ops mpc52xx_gpt_irq_ops = {
205 .map = mpc52xx_gpt_irq_map,
206 .xlate = mpc52xx_gpt_irq_xlate,
207};
208
209static void
210mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
211{
212 int cascade_virq;
213 unsigned long flags;
214
215 /* Only setup cascaded IRQ if device tree claims the GPT is
216 * an interrupt controller */
217 if (!of_find_property(node, "interrupt-controller", NULL))
218 return;
219
220 cascade_virq = irq_of_parse_and_map(node, 0);
221
222 gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
223 &mpc52xx_gpt_irq_ops, -1);
224 if (!gpt->irqhost) {
225 dev_err(gpt->dev, "irq_alloc_host() failed\n");
226 return;
227 }
228
229 gpt->irqhost->host_data = gpt;
230
231 set_irq_data(cascade_virq, gpt);
232 set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
233
234 /* Set to Input Capture mode */
235 spin_lock_irqsave(&gpt->lock, flags);
236 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
237 MPC52xx_GPT_MODE_MS_IC);
238 spin_unlock_irqrestore(&gpt->lock, flags);
239
240 dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);
241}
242
243
244/* ---------------------------------------------------------------------
245 * GPIOLIB hooks
246 */
247#if defined(CONFIG_GPIOLIB)
248static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
249{
250 return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc);
251}
252
253static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
254{
255 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
256
257 return (in_be32(&gpt->regs->status) >> 8) & 1;
258}
259
260static void
261mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)
262{
263 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
264 unsigned long flags;
265 u32 r;
266
267 dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v);
268 r = v ? MPC52xx_GPT_MODE_GPIO_OUT_HIGH : MPC52xx_GPT_MODE_GPIO_OUT_LOW;
269
270 spin_lock_irqsave(&gpt->lock, flags);
271 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r);
272 spin_unlock_irqrestore(&gpt->lock, flags);
273}
274
275static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
276{
277 struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
278 unsigned long flags;
279
280 dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
281
282 spin_lock_irqsave(&gpt->lock, flags);
283 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK);
284 spin_unlock_irqrestore(&gpt->lock, flags);
285
286 return 0;
287}
288
289static int
290mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
291{
292 mpc52xx_gpt_gpio_set(gc, gpio, val);
293 return 0;
294}
295
296static void
297mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
298{
299 int rc;
300
301 /* Only setup GPIO if the device tree claims the GPT is
302 * a GPIO controller */
303 if (!of_find_property(node, "gpio-controller", NULL))
304 return;
305
306 gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL);
307 if (!gpt->of_gc.gc.label) {
308 dev_err(gpt->dev, "out of memory\n");
309 return;
310 }
311
312 gpt->of_gc.gpio_cells = 2;
313 gpt->of_gc.gc.ngpio = 1;
314 gpt->of_gc.gc.direction_input = mpc52xx_gpt_gpio_dir_in;
315 gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out;
316 gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get;
317 gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set;
318 gpt->of_gc.gc.base = -1;
319 gpt->of_gc.xlate = of_gpio_simple_xlate;
320 node->data = &gpt->of_gc;
321 of_node_get(node);
322
323 /* Setup external pin in GPIO mode */
324 clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
325 MPC52xx_GPT_MODE_MS_GPIO);
326
327 rc = gpiochip_add(&gpt->of_gc.gc);
328 if (rc)
329 dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
330
331 dev_dbg(gpt->dev, "%s() complete.\n", __func__);
332}
333#else /* defined(CONFIG_GPIOLIB) */
334static void
335mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *p, struct device_node *np) { }
336#endif /* defined(CONFIG_GPIOLIB) */
337
338/* ---------------------------------------------------------------------
339 * of_platform bus binding code
340 */
341static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev,
342 const struct of_device_id *match)
343{
344 struct mpc52xx_gpt_priv *gpt;
345
346 gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
347 if (!gpt)
348 return -ENOMEM;
349
350 spin_lock_init(&gpt->lock);
351 gpt->dev = &ofdev->dev;
352 gpt->regs = of_iomap(ofdev->node, 0);
353 if (!gpt->regs) {
354 kfree(gpt);
355 return -ENOMEM;
356 }
357
358 dev_set_drvdata(&ofdev->dev, gpt);
359
360 mpc52xx_gpt_gpio_setup(gpt, ofdev->node);
361 mpc52xx_gpt_irq_setup(gpt, ofdev->node);
362
363 return 0;
364}
365
366static int mpc52xx_gpt_remove(struct of_device *ofdev)
367{
368 return -EBUSY;
369}
370
371static const struct of_device_id mpc52xx_gpt_match[] = {
372 { .compatible = "fsl,mpc5200-gpt", },
373
374 /* Depreciated compatible values; don't use for new dts files */
375 { .compatible = "fsl,mpc5200-gpt-gpio", },
376 { .compatible = "mpc5200-gpt", },
377 {}
378};
379
380static struct of_platform_driver mpc52xx_gpt_driver = {
381 .name = "mpc52xx-gpt",
382 .match_table = mpc52xx_gpt_match,
383 .probe = mpc52xx_gpt_probe,
384 .remove = mpc52xx_gpt_remove,
385};
386
387static int __init mpc52xx_gpt_init(void)
388{
389 if (of_register_platform_driver(&mpc52xx_gpt_driver))
390 pr_err("error registering MPC52xx GPT driver\n");
391
392 return 0;
393}
394
395/* Make sure GPIOs and IRQs get set up before anyone tries to use them */
396subsys_initcall(mpc52xx_gpt_init);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 0a093f03c758..480f806fd0a9 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -163,8 +163,6 @@ static void mpc52xx_extirq_mask(unsigned int virq)
163 irq = irq_map[virq].hwirq; 163 irq = irq_map[virq].hwirq;
164 l2irq = irq & MPC52xx_IRQ_L2_MASK; 164 l2irq = irq & MPC52xx_IRQ_L2_MASK;
165 165
166 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
167
168 io_be_clrbit(&intr->ctrl, 11 - l2irq); 166 io_be_clrbit(&intr->ctrl, 11 - l2irq);
169} 167}
170 168
@@ -176,8 +174,6 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
176 irq = irq_map[virq].hwirq; 174 irq = irq_map[virq].hwirq;
177 l2irq = irq & MPC52xx_IRQ_L2_MASK; 175 l2irq = irq & MPC52xx_IRQ_L2_MASK;
178 176
179 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
180
181 io_be_setbit(&intr->ctrl, 11 - l2irq); 177 io_be_setbit(&intr->ctrl, 11 - l2irq);
182} 178}
183 179
@@ -189,17 +185,15 @@ static void mpc52xx_extirq_ack(unsigned int virq)
189 irq = irq_map[virq].hwirq; 185 irq = irq_map[virq].hwirq;
190 l2irq = irq & MPC52xx_IRQ_L2_MASK; 186 l2irq = irq & MPC52xx_IRQ_L2_MASK;
191 187
192 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
193
194 io_be_setbit(&intr->ctrl, 27-l2irq); 188 io_be_setbit(&intr->ctrl, 27-l2irq);
195} 189}
196 190
197static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type) 191static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
198{ 192{
199 struct irq_desc *desc = get_irq_desc(virq);
200 u32 ctrl_reg, type; 193 u32 ctrl_reg, type;
201 int irq; 194 int irq;
202 int l2irq; 195 int l2irq;
196 void *handler = handle_level_irq;
203 197
204 irq = irq_map[virq].hwirq; 198 irq = irq_map[virq].hwirq;
205 l2irq = irq & MPC52xx_IRQ_L2_MASK; 199 l2irq = irq & MPC52xx_IRQ_L2_MASK;
@@ -207,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
207 pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type); 201 pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
208 202
209 switch (flow_type) { 203 switch (flow_type) {
210 case IRQF_TRIGGER_HIGH: 204 case IRQF_TRIGGER_HIGH: type = 0; break;
211 type = 0; 205 case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
212 break; 206 case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
213 case IRQF_TRIGGER_RISING: 207 case IRQF_TRIGGER_LOW: type = 3; break;
214 type = 1;
215 break;
216 case IRQF_TRIGGER_FALLING:
217 type = 2;
218 break;
219 case IRQF_TRIGGER_LOW:
220 type = 3;
221 break;
222 default: 208 default:
223 type = 0; 209 type = 0;
224 } 210 }
225 211
226 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
227 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
228 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
229 desc->status |= IRQ_LEVEL;
230
231 ctrl_reg = in_be32(&intr->ctrl); 212 ctrl_reg = in_be32(&intr->ctrl);
232 ctrl_reg &= ~(0x3 << (22 - (l2irq * 2))); 213 ctrl_reg &= ~(0x3 << (22 - (l2irq * 2)));
233 ctrl_reg |= (type << (22 - (l2irq * 2))); 214 ctrl_reg |= (type << (22 - (l2irq * 2)));
234 out_be32(&intr->ctrl, ctrl_reg); 215 out_be32(&intr->ctrl, ctrl_reg);
235 216
217 __set_irq_handler_unlocked(virq, handler);
218
236 return 0; 219 return 0;
237} 220}
238 221
@@ -247,6 +230,11 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
247/* 230/*
248 * Main interrupt irq_chip 231 * Main interrupt irq_chip
249 */ 232 */
233static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
234{
235 return 0; /* Do nothing so that the sense mask will get updated */
236}
237
250static void mpc52xx_main_mask(unsigned int virq) 238static void mpc52xx_main_mask(unsigned int virq)
251{ 239{
252 int irq; 240 int irq;
@@ -255,8 +243,6 @@ static void mpc52xx_main_mask(unsigned int virq)
255 irq = irq_map[virq].hwirq; 243 irq = irq_map[virq].hwirq;
256 l2irq = irq & MPC52xx_IRQ_L2_MASK; 244 l2irq = irq & MPC52xx_IRQ_L2_MASK;
257 245
258 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
259
260 io_be_setbit(&intr->main_mask, 16 - l2irq); 246 io_be_setbit(&intr->main_mask, 16 - l2irq);
261} 247}
262 248
@@ -268,8 +254,6 @@ static void mpc52xx_main_unmask(unsigned int virq)
268 irq = irq_map[virq].hwirq; 254 irq = irq_map[virq].hwirq;
269 l2irq = irq & MPC52xx_IRQ_L2_MASK; 255 l2irq = irq & MPC52xx_IRQ_L2_MASK;
270 256
271 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
272
273 io_be_clrbit(&intr->main_mask, 16 - l2irq); 257 io_be_clrbit(&intr->main_mask, 16 - l2irq);
274} 258}
275 259
@@ -278,6 +262,7 @@ static struct irq_chip mpc52xx_main_irqchip = {
278 .mask = mpc52xx_main_mask, 262 .mask = mpc52xx_main_mask,
279 .mask_ack = mpc52xx_main_mask, 263 .mask_ack = mpc52xx_main_mask,
280 .unmask = mpc52xx_main_unmask, 264 .unmask = mpc52xx_main_unmask,
265 .set_type = mpc52xx_null_set_type,
281}; 266};
282 267
283/* 268/*
@@ -291,8 +276,6 @@ static void mpc52xx_periph_mask(unsigned int virq)
291 irq = irq_map[virq].hwirq; 276 irq = irq_map[virq].hwirq;
292 l2irq = irq & MPC52xx_IRQ_L2_MASK; 277 l2irq = irq & MPC52xx_IRQ_L2_MASK;
293 278
294 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
295
296 io_be_setbit(&intr->per_mask, 31 - l2irq); 279 io_be_setbit(&intr->per_mask, 31 - l2irq);
297} 280}
298 281
@@ -304,8 +287,6 @@ static void mpc52xx_periph_unmask(unsigned int virq)
304 irq = irq_map[virq].hwirq; 287 irq = irq_map[virq].hwirq;
305 l2irq = irq & MPC52xx_IRQ_L2_MASK; 288 l2irq = irq & MPC52xx_IRQ_L2_MASK;
306 289
307 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
308
309 io_be_clrbit(&intr->per_mask, 31 - l2irq); 290 io_be_clrbit(&intr->per_mask, 31 - l2irq);
310} 291}
311 292
@@ -314,6 +295,7 @@ static struct irq_chip mpc52xx_periph_irqchip = {
314 .mask = mpc52xx_periph_mask, 295 .mask = mpc52xx_periph_mask,
315 .mask_ack = mpc52xx_periph_mask, 296 .mask_ack = mpc52xx_periph_mask,
316 .unmask = mpc52xx_periph_unmask, 297 .unmask = mpc52xx_periph_unmask,
298 .set_type = mpc52xx_null_set_type,
317}; 299};
318 300
319/* 301/*
@@ -327,8 +309,6 @@ static void mpc52xx_sdma_mask(unsigned int virq)
327 irq = irq_map[virq].hwirq; 309 irq = irq_map[virq].hwirq;
328 l2irq = irq & MPC52xx_IRQ_L2_MASK; 310 l2irq = irq & MPC52xx_IRQ_L2_MASK;
329 311
330 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
331
332 io_be_setbit(&sdma->IntMask, l2irq); 312 io_be_setbit(&sdma->IntMask, l2irq);
333} 313}
334 314
@@ -340,8 +320,6 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
340 irq = irq_map[virq].hwirq; 320 irq = irq_map[virq].hwirq;
341 l2irq = irq & MPC52xx_IRQ_L2_MASK; 321 l2irq = irq & MPC52xx_IRQ_L2_MASK;
342 322
343 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
344
345 io_be_clrbit(&sdma->IntMask, l2irq); 323 io_be_clrbit(&sdma->IntMask, l2irq);
346} 324}
347 325
@@ -353,8 +331,6 @@ static void mpc52xx_sdma_ack(unsigned int virq)
353 irq = irq_map[virq].hwirq; 331 irq = irq_map[virq].hwirq;
354 l2irq = irq & MPC52xx_IRQ_L2_MASK; 332 l2irq = irq & MPC52xx_IRQ_L2_MASK;
355 333
356 pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
357
358 out_be32(&sdma->IntPend, 1 << l2irq); 334 out_be32(&sdma->IntPend, 1 << l2irq);
359} 335}
360 336
@@ -363,9 +339,19 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
363 .mask = mpc52xx_sdma_mask, 339 .mask = mpc52xx_sdma_mask,
364 .unmask = mpc52xx_sdma_unmask, 340 .unmask = mpc52xx_sdma_unmask,
365 .ack = mpc52xx_sdma_ack, 341 .ack = mpc52xx_sdma_ack,
342 .set_type = mpc52xx_null_set_type,
366}; 343};
367 344
368/** 345/**
346 * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ
347 */
348static int mpc52xx_is_extirq(int l1, int l2)
349{
350 return ((l1 == 0) && (l2 == 0)) ||
351 ((l1 == 1) && (l2 >= 1) && (l2 <= 3));
352}
353
354/**
369 * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property 355 * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
370 */ 356 */
371static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, 357static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
@@ -383,38 +369,23 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
383 369
384 intrvect_l1 = (int)intspec[0]; 370 intrvect_l1 = (int)intspec[0];
385 intrvect_l2 = (int)intspec[1]; 371 intrvect_l2 = (int)intspec[1];
386 intrvect_type = (int)intspec[2]; 372 intrvect_type = (int)intspec[2] & 0x3;
387 373
388 intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & 374 intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
389 MPC52xx_IRQ_L1_MASK; 375 MPC52xx_IRQ_L1_MASK;
390 intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK; 376 intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
391 377
392 pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
393 intrvect_l2);
394
395 *out_hwirq = intrvect_linux; 378 *out_hwirq = intrvect_linux;
396 *out_flags = mpc52xx_map_senses[intrvect_type]; 379 *out_flags = IRQ_TYPE_LEVEL_LOW;
380 if (mpc52xx_is_extirq(intrvect_l1, intrvect_l2))
381 *out_flags = mpc52xx_map_senses[intrvect_type];
397 382
383 pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
384 intrvect_l2);
398 return 0; 385 return 0;
399} 386}
400 387
401/** 388/**
402 * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
403 *
404 * Only external IRQs need this.
405 */
406static int mpc52xx_irqx_gettype(int irq)
407{
408 int type;
409 u32 ctrl_reg;
410
411 ctrl_reg = in_be32(&intr->ctrl);
412 type = (ctrl_reg >> (22 - irq * 2)) & 0x3;
413
414 return mpc52xx_map_senses[type];
415}
416
417/**
418 * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure 389 * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
419 */ 390 */
420static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, 391static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
@@ -422,68 +393,46 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
422{ 393{
423 int l1irq; 394 int l1irq;
424 int l2irq; 395 int l2irq;
425 struct irq_chip *good_irqchip; 396 struct irq_chip *irqchip;
426 void *good_handle; 397 void *hndlr;
427 int type; 398 int type;
399 u32 reg;
428 400
429 l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; 401 l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
430 l2irq = irq & MPC52xx_IRQ_L2_MASK; 402 l2irq = irq & MPC52xx_IRQ_L2_MASK;
431 403
432 /* 404 /*
433 * Most of ours IRQs will be level low 405 * External IRQs are handled differently by the hardware so they are
434 * Only external IRQs on some platform may be others 406 * handled by a dedicated irq_chip structure.
435 */ 407 */
436 type = IRQ_TYPE_LEVEL_LOW; 408 if (mpc52xx_is_extirq(l1irq, l2irq)) {
409 reg = in_be32(&intr->ctrl);
410 type = mpc52xx_map_senses[(reg >> (22 - l2irq * 2)) & 0x3];
411 if ((type == IRQ_TYPE_EDGE_FALLING) ||
412 (type == IRQ_TYPE_EDGE_RISING))
413 hndlr = handle_edge_irq;
414 else
415 hndlr = handle_level_irq;
416
417 set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
418 pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
419 __func__, l2irq, virq, (int)irq, type);
420 return 0;
421 }
437 422
423 /* It is an internal SOC irq. Choose the correct irq_chip */
438 switch (l1irq) { 424 switch (l1irq) {
439 case MPC52xx_IRQ_L1_CRIT: 425 case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
440 pr_debug("%s: Critical. l2=%x\n", __func__, l2irq); 426 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
441 427 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
442 BUG_ON(l2irq != 0);
443
444 type = mpc52xx_irqx_gettype(l2irq);
445 good_irqchip = &mpc52xx_extirq_irqchip;
446 break;
447
448 case MPC52xx_IRQ_L1_MAIN:
449 pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq);
450
451 if ((l2irq >= 1) && (l2irq <= 3)) {
452 type = mpc52xx_irqx_gettype(l2irq);
453 good_irqchip = &mpc52xx_extirq_irqchip;
454 } else {
455 good_irqchip = &mpc52xx_main_irqchip;
456 }
457 break;
458
459 case MPC52xx_IRQ_L1_PERP:
460 pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq);
461 good_irqchip = &mpc52xx_periph_irqchip;
462 break;
463
464 case MPC52xx_IRQ_L1_SDMA:
465 pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq);
466 good_irqchip = &mpc52xx_sdma_irqchip;
467 break;
468
469 default: 428 default:
470 pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq); 429 pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
430 __func__, virq, l1irq, l2irq);
471 return -EINVAL; 431 return -EINVAL;
472 } 432 }
473 433
474 switch (type) { 434 set_irq_chip_and_handler(virq, irqchip, handle_level_irq);
475 case IRQ_TYPE_EDGE_FALLING: 435 pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
476 case IRQ_TYPE_EDGE_RISING:
477 good_handle = handle_edge_irq;
478 break;
479 default:
480 good_handle = handle_level_irq;
481 }
482
483 set_irq_chip_and_handler(virq, good_irqchip, good_handle);
484
485 pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq,
486 (int)irq, type);
487 436
488 return 0; 437 return 0;
489} 438}
@@ -522,6 +471,8 @@ void __init mpc52xx_init_irq(void)
522 panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. " 471 panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
523 "Check node !"); 472 "Check node !");
524 473
474 pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr);
475
525 /* Disable all interrupt sources. */ 476 /* Disable all interrupt sources. */
526 out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ 477 out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
527 out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ 478 out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
@@ -613,8 +564,5 @@ unsigned int mpc52xx_get_irq(void)
613 } 564 }
614 } 565 }
615 566
616 pr_debug("%s: irq=%x. virq=%d\n", __func__, irq,
617 irq_linear_revmap(mpc52xx_irqhost, irq));
618
619 return irq_linear_revmap(mpc52xx_irqhost, irq); 567 return irq_linear_revmap(mpc52xx_irqhost, irq);
620} 568}
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 30f008b2f92e..7c7df4003820 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,6 +1,6 @@
1menuconfig PPC_82xx 1menuconfig PPC_82xx
2 bool "82xx-based boards (PQ II)" 2 bool "82xx-based boards (PQ II)"
3 depends on 6xx && PPC_MULTIPLATFORM 3 depends on 6xx
4 4
5if PPC_82xx 5if PPC_82xx
6 6
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 83c664afc897..437d29a59d72 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,6 +1,6 @@
1menuconfig PPC_83xx 1menuconfig PPC_83xx
2 bool "83xx-based boards" 2 bool "83xx-based boards"
3 depends on 6xx && PPC_MULTIPLATFORM 3 depends on 6xx
4 select PPC_UDBG_16550 4 select PPC_UDBG_16550
5 select PPC_PCI_CHOICE 5 select PPC_PCI_CHOICE
6 select FSL_PCI if PCI 6 select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 91a2c80b9d72..0b4f883b20eb 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc831x_usb_cfg(); 44 mpc831x_usb_cfg();
43} 45}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 530ef990ca7c..634785cc4523 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void)
84 ppc_md.progress("mpc837x_mds_setup_arch()", 0); 84 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
85 85
86#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") { 87 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
88 if (!of_device_is_available(np)) { 88 mpc83xx_add_bridge(np);
89 pr_warning("%s: disabled by the firmware.\n", 89 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
90 np->full_name);
91 continue;
92 }
93 mpc83xx_add_bridge(np); 90 mpc83xx_add_bridge(np);
94 }
95#endif 91#endif
96 mpc837xmds_usb_cfg(); 92 mpc837xmds_usb_cfg();
97} 93}
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 1d096545322b..3d7b953d40e1 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void)
38#ifdef CONFIG_PCI 38#ifdef CONFIG_PCI
39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 39 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
40 mpc83xx_add_bridge(np); 40 mpc83xx_add_bridge(np);
41 for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
42 mpc83xx_add_bridge(np);
41#endif 43#endif
42 mpc837x_usb_cfg(); 44 mpc837x_usb_cfg();
43} 45}
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index cc99c280aad9..11e1fac17c7f 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -14,6 +14,7 @@
14#include <linux/stddef.h> 14#include <linux/stddef.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/of.h>
17 18
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/prom.h> 20#include <asm/prom.h>
@@ -210,7 +211,7 @@ int mpc837x_usb_cfg(void)
210 int ret = 0; 211 int ret = 0;
211 212
212 np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr"); 213 np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
213 if (!np) 214 if (!np || !of_device_is_available(np))
214 return -ENODEV; 215 return -ENODEV;
215 prop = of_get_property(np, "phy_type", NULL); 216 prop = of_get_property(np, "phy_type", NULL);
216 217
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index 81cee7bbf2d2..66f29235ff09 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -106,8 +106,6 @@ static void __init ksi8560_pic_init(void)
106 cpm2_pic_init(np); 106 cpm2_pic_init(np);
107 of_node_put(np); 107 of_node_put(np);
108 set_irq_chained_handler(irq, cpm2_cascade); 108 set_irq_chained_handler(irq, cpm2_cascade);
109
110 setup_irq(0, NULL);
111#endif 109#endif
112} 110}
113 111
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 79a0df17078b..cc0b0db8a6f3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -21,6 +21,7 @@
21#include <asm/page.h> 21#include <asm/page.h>
22#include <asm/mpic.h> 22#include <asm/mpic.h>
23#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
24#include <asm/dbell.h>
24 25
25#include <sysdev/fsl_soc.h> 26#include <sysdev/fsl_soc.h>
26 27
@@ -80,10 +81,8 @@ smp_85xx_kick_cpu(int nr)
80} 81}
81 82
82static void __init 83static void __init
83smp_85xx_setup_cpu(int cpu_nr) 84smp_85xx_basic_setup(int cpu_nr)
84{ 85{
85 mpic_setup_this_cpu();
86
87 /* Clear any pending timer interrupts */ 86 /* Clear any pending timer interrupts */
88 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); 87 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
89 88
@@ -91,15 +90,43 @@ smp_85xx_setup_cpu(int cpu_nr)
91 mtspr(SPRN_TCR, TCR_DIE); 90 mtspr(SPRN_TCR, TCR_DIE);
92} 91}
93 92
93static void __init
94smp_85xx_setup_cpu(int cpu_nr)
95{
96 mpic_setup_this_cpu();
97
98 smp_85xx_basic_setup(cpu_nr);
99}
100
94struct smp_ops_t smp_85xx_ops = { 101struct smp_ops_t smp_85xx_ops = {
95 .message_pass = smp_mpic_message_pass,
96 .probe = smp_mpic_probe,
97 .kick_cpu = smp_85xx_kick_cpu, 102 .kick_cpu = smp_85xx_kick_cpu,
98 .setup_cpu = smp_85xx_setup_cpu,
99}; 103};
100 104
101void __init 105static int __init smp_dummy_probe(void)
102mpc85xx_smp_init(void)
103{ 106{
107 return NR_CPUS;
108}
109
110void __init mpc85xx_smp_init(void)
111{
112 struct device_node *np;
113
114 smp_85xx_ops.message_pass = NULL;
115
116 np = of_find_node_by_type(NULL, "open-pic");
117 if (np) {
118 smp_85xx_ops.probe = smp_mpic_probe;
119 smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
120 smp_85xx_ops.message_pass = smp_mpic_message_pass;
121 } else {
122 smp_85xx_ops.probe = smp_dummy_probe;
123 smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
124 }
125
126 if (cpu_has_feature(CPU_FTR_DBELL))
127 smp_85xx_ops.message_pass = smp_dbell_message_pass;
128
129 BUG_ON(!smp_85xx_ops.message_pass);
130
104 smp_ops = &smp_85xx_ops; 131 smp_ops = &smp_85xx_ops;
105} 132}
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 8e5693935975..fdaf4ddaa955 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -1,7 +1,7 @@
1config PPC_86xx 1config PPC_86xx
2menuconfig PPC_86xx 2menuconfig PPC_86xx
3 bool "86xx-based boards" 3 bool "86xx-based boards"
4 depends on 6xx && PPC_MULTIPLATFORM 4 depends on 6xx
5 select FSL_SOC 5 select FSL_SOC
6 select ALTIVEC 6 select ALTIVEC
7 help 7 help
@@ -31,6 +31,22 @@ config MPC8610_HPCD
31 help 31 help
32 This option enables support for the MPC8610 HPCD board. 32 This option enables support for the MPC8610 HPCD board.
33 33
34config GEF_PPC9A
35 bool "GE Fanuc PPC9A"
36 select DEFAULT_UIMAGE
37 select GENERIC_GPIO
38 select ARCH_REQUIRE_GPIOLIB
39 help
40 This option enables support for GE Fanuc's PPC9A.
41
42config GEF_SBC310
43 bool "GE Fanuc SBC310"
44 select DEFAULT_UIMAGE
45 select GENERIC_GPIO
46 select ARCH_REQUIRE_GPIOLIB
47 help
48 This option enables support for GE Fanuc's SBC310.
49
34config GEF_SBC610 50config GEF_SBC610
35 bool "GE Fanuc SBC610" 51 bool "GE Fanuc SBC610"
36 select DEFAULT_UIMAGE 52 select DEFAULT_UIMAGE
@@ -48,7 +64,7 @@ config MPC8641
48 select FSL_PCI if PCI 64 select FSL_PCI if PCI
49 select PPC_UDBG_16550 65 select PPC_UDBG_16550
50 select MPIC 66 select MPIC
51 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 67 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
52 68
53config MPC8610 69config MPC8610
54 bool 70 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 31e540c2ebbc..4b0d7b1aa005 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -9,3 +9,5 @@ obj-$(CONFIG_SBC8641D) += sbc8641d.o
9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o 9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o 10gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) 11obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
12obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y)
13obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index 85b2800f4cb7..b2ea8875adba 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -37,8 +37,6 @@
37#define GEF_GPIO_OVERRUN 0x1C 37#define GEF_GPIO_OVERRUN 0x1C
38#define GEF_GPIO_MODE 0x20 38#define GEF_GPIO_MODE 0x20
39 39
40#define NUM_GPIO 19
41
42static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value) 40static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
43{ 41{
44 unsigned int data; 42 unsigned int data;
@@ -103,10 +101,10 @@ static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
103static int __init gef_gpio_init(void) 101static int __init gef_gpio_init(void)
104{ 102{
105 struct device_node *np; 103 struct device_node *np;
104 int retval;
105 struct of_mm_gpio_chip *gef_gpio_chip;
106 106
107 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") { 107 for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
108 int retval;
109 struct of_mm_gpio_chip *gef_gpio_chip;
110 108
111 pr_debug("%s: Initialising GEF GPIO\n", np->full_name); 109 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
112 110
@@ -120,7 +118,35 @@ static int __init gef_gpio_init(void)
120 118
121 /* Setup pointers to chip functions */ 119 /* Setup pointers to chip functions */
122 gef_gpio_chip->of_gc.gpio_cells = 2; 120 gef_gpio_chip->of_gc.gpio_cells = 2;
123 gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO; 121 gef_gpio_chip->of_gc.gc.ngpio = 19;
122 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
123 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
124 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
125 gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
126
127 /* This function adds a memory mapped GPIO chip */
128 retval = of_mm_gpiochip_add(np, gef_gpio_chip);
129 if (retval) {
130 kfree(gef_gpio_chip);
131 pr_err("%s: Unable to add GPIO\n", np->full_name);
132 }
133 }
134
135 for_each_compatible_node(np, NULL, "gef,sbc310-gpio") {
136
137 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
138
139 /* Allocate chip structure */
140 gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
141 if (!gef_gpio_chip) {
142 pr_err("%s: Unable to allocate structure\n",
143 np->full_name);
144 continue;
145 }
146
147 /* Setup pointers to chip functions */
148 gef_gpio_chip->of_gc.gpio_cells = 2;
149 gef_gpio_chip->of_gc.gc.ngpio = 6;
124 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in; 150 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
125 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out; 151 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
126 gef_gpio_chip->of_gc.gc.get = gef_gpio_get; 152 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
new file mode 100644
index 000000000000..830fd9a23b5a
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -0,0 +1,223 @@
1/*
2 * GE Fanuc PPC9A board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *ppc9a_regs;
53
54static void __init gef_ppc9a_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00");
65 if (!cascade_node) {
66 printk(KERN_WARNING "PPC9A: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_ppc9a_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
93 if (regs) {
94 ppc9a_regs = of_iomap(regs, 0);
95 if (ppc9a_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_ppc9a_get_pcb_rev(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(ppc9a_regs);
107 return (reg >> 8) & 0xff;
108}
109
110/* Return the board (software) revision */
111static unsigned int gef_ppc9a_get_board_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(ppc9a_regs);
116 return (reg >> 16) & 0xff;
117}
118
119/* Return the FPGA revision */
120static unsigned int gef_ppc9a_get_fpga_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(ppc9a_regs);
125 return (reg >> 24) & 0xf;
126}
127
128static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
129{
130 uint svid = mfspr(SPRN_SVR);
131
132 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
133
134 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
135 ('A' + gef_ppc9a_get_board_rev() - 1));
136 seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev());
137
138 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
139}
140
141static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)
142{
143 unsigned int val;
144
145 /* Do not do the fixup on other platforms! */
146 if (!machine_is(gef_ppc9a))
147 return;
148
149 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
150
151 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
152 pci_read_config_dword(pdev, 0xe0, &val);
153 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
154
155 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
156 pci_write_config_dword(pdev, 0xe4, 1 << 5);
157}
158DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
159 gef_ppc9a_nec_fixup);
160
161/*
162 * Called very early, device-tree isn't unflattened
163 *
164 * This function is called to determine whether the BSP is compatible with the
165 * supplied device-tree, which is assumed to be the correct one for the actual
166 * board. It is expected thati, in the future, a kernel may support multiple
167 * boards.
168 */
169static int __init gef_ppc9a_probe(void)
170{
171 unsigned long root = of_get_flat_dt_root();
172
173 if (of_flat_dt_is_compatible(root, "gef,ppc9a"))
174 return 1;
175
176 return 0;
177}
178
179static long __init mpc86xx_time_init(void)
180{
181 unsigned int temp;
182
183 /* Set the time base to zero */
184 mtspr(SPRN_TBWL, 0);
185 mtspr(SPRN_TBWU, 0);
186
187 temp = mfspr(SPRN_HID0);
188 temp |= HID0_TBEN;
189 mtspr(SPRN_HID0, temp);
190 asm volatile("isync");
191
192 return 0;
193}
194
195static __initdata struct of_device_id of_bus_ids[] = {
196 { .compatible = "simple-bus", },
197 {},
198};
199
200static int __init declare_of_platform_devices(void)
201{
202 printk(KERN_DEBUG "Probe platform devices\n");
203 of_platform_bus_probe(NULL, of_bus_ids, NULL);
204
205 return 0;
206}
207machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
208
209define_machine(gef_ppc9a) {
210 .name = "GE Fanuc PPC9A",
211 .probe = gef_ppc9a_probe,
212 .setup_arch = gef_ppc9a_setup_arch,
213 .init_IRQ = gef_ppc9a_init_irq,
214 .show_cpuinfo = gef_ppc9a_show_cpuinfo,
215 .get_irq = mpic_get_irq,
216 .restart = fsl_rstcr_restart,
217 .time_init = mpc86xx_time_init,
218 .calibrate_decr = generic_calibrate_decr,
219 .progress = udbg_progress,
220#ifdef CONFIG_PCI
221 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
222#endif
223};
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
new file mode 100644
index 000000000000..ba3ce4381611
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -0,0 +1,234 @@
1/*
2 * GE Fanuc SBC310 board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *sbc310_regs;
53
54static void __init gef_sbc310_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
65 if (!cascade_node) {
66 printk(KERN_WARNING "SBC310: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_sbc310_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
93 if (regs) {
94 sbc310_regs = of_iomap(regs, 0);
95 if (sbc310_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_sbc310_get_board_id(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(sbc310_regs);
107 return reg & 0xff;
108}
109
110/* Return the PCB revision */
111static unsigned int gef_sbc310_get_pcb_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(sbc310_regs);
116 return (reg >> 8) & 0xff;
117}
118
119/* Return the board (software) revision */
120static unsigned int gef_sbc310_get_board_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(sbc310_regs);
125 return (reg >> 16) & 0xff;
126}
127
128/* Return the FPGA revision */
129static unsigned int gef_sbc310_get_fpga_rev(void)
130{
131 unsigned int reg;
132
133 reg = ioread32(sbc310_regs);
134 return (reg >> 24) & 0xf;
135}
136
137static void gef_sbc310_show_cpuinfo(struct seq_file *m)
138{
139 uint svid = mfspr(SPRN_SVR);
140
141 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
142
143 seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
144 seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
145 ('A' + gef_sbc310_get_board_rev() - 1));
146 seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
147
148 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
149
150}
151
152static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
153{
154 unsigned int val;
155
156 /* Do not do the fixup on other platforms! */
157 if (!machine_is(gef_sbc310))
158 return;
159
160 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
161
162 /* Ensure only ports 1 & 2 are enabled */
163 pci_read_config_dword(pdev, 0xe0, &val);
164 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
165
166 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
167 pci_write_config_dword(pdev, 0xe4, 1 << 5);
168}
169DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
170 gef_sbc310_nec_fixup);
171
172/*
173 * Called very early, device-tree isn't unflattened
174 *
175 * This function is called to determine whether the BSP is compatible with the
176 * supplied device-tree, which is assumed to be the correct one for the actual
177 * board. It is expected thati, in the future, a kernel may support multiple
178 * boards.
179 */
180static int __init gef_sbc310_probe(void)
181{
182 unsigned long root = of_get_flat_dt_root();
183
184 if (of_flat_dt_is_compatible(root, "gef,sbc310"))
185 return 1;
186
187 return 0;
188}
189
190static long __init mpc86xx_time_init(void)
191{
192 unsigned int temp;
193
194 /* Set the time base to zero */
195 mtspr(SPRN_TBWL, 0);
196 mtspr(SPRN_TBWU, 0);
197
198 temp = mfspr(SPRN_HID0);
199 temp |= HID0_TBEN;
200 mtspr(SPRN_HID0, temp);
201 asm volatile("isync");
202
203 return 0;
204}
205
206static __initdata struct of_device_id of_bus_ids[] = {
207 { .compatible = "simple-bus", },
208 {},
209};
210
211static int __init declare_of_platform_devices(void)
212{
213 printk(KERN_DEBUG "Probe platform devices\n");
214 of_platform_bus_probe(NULL, of_bus_ids, NULL);
215
216 return 0;
217}
218machine_device_initcall(gef_sbc310, declare_of_platform_devices);
219
220define_machine(gef_sbc310) {
221 .name = "GE Fanuc SBC310",
222 .probe = gef_sbc310_probe,
223 .setup_arch = gef_sbc310_setup_arch,
224 .init_IRQ = gef_sbc310_init_irq,
225 .show_cpuinfo = gef_sbc310_show_cpuinfo,
226 .get_irq = mpic_get_irq,
227 .restart = fsl_rstcr_restart,
228 .time_init = mpc86xx_time_init,
229 .calibrate_decr = generic_calibrate_decr,
230 .progress = udbg_progress,
231#ifdef CONFIG_PCI
232 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
233#endif
234};
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 200b9cb900ea..68b9b8fd9f85 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -1,14 +1,5 @@
1menu "Platform support" 1menu "Platform support"
2 2
3config PPC_MULTIPLATFORM
4 bool
5 depends on PPC64 || 6xx
6 default y
7
8config CLASSIC32
9 def_bool y
10 depends on 6xx && PPC_MULTIPLATFORM
11
12source "arch/powerpc/platforms/pseries/Kconfig" 3source "arch/powerpc/platforms/pseries/Kconfig"
13source "arch/powerpc/platforms/iseries/Kconfig" 4source "arch/powerpc/platforms/iseries/Kconfig"
14source "arch/powerpc/platforms/chrp/Kconfig" 5source "arch/powerpc/platforms/chrp/Kconfig"
@@ -28,15 +19,28 @@ source "arch/powerpc/platforms/86xx/Kconfig"
28source "arch/powerpc/platforms/embedded6xx/Kconfig" 19source "arch/powerpc/platforms/embedded6xx/Kconfig"
29source "arch/powerpc/platforms/44x/Kconfig" 20source "arch/powerpc/platforms/44x/Kconfig"
30source "arch/powerpc/platforms/40x/Kconfig" 21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
31 23
32config PPC_NATIVE 24config PPC_NATIVE
33 bool 25 bool
34 depends on PPC_MULTIPLATFORM 26 depends on 6xx || PPC64
35 help 27 help
36 Support for running natively on the hardware, i.e. without 28 Support for running natively on the hardware, i.e. without
37 a hypervisor. This option is not user-selectable but should 29 a hypervisor. This option is not user-selectable but should
38 be selected by all platforms that need it. 30 be selected by all platforms that need it.
39 31
32config PPC_OF_BOOT_TRAMPOLINE
33 bool "Support booting from Open Firmware or yaboot"
34 depends on 6xx || PPC64
35 default y
36 help
37 Support from booting from Open Firmware or yaboot using an
38 Open Firmware client interface. This enables the kernel to
39 communicate with open firmware to retrieve system informations
40 such as the device tree.
41
42 In case of doubt, say Y
43
40config UDBG_RTAS_CONSOLE 44config UDBG_RTAS_CONSOLE
41 bool "RTAS based debug console" 45 bool "RTAS based debug console"
42 depends on PPC_RTAS 46 depends on PPC_RTAS
@@ -70,7 +74,7 @@ config PPC_I8259
70 74
71config U3_DART 75config U3_DART
72 bool 76 bool
73 depends on PPC_MULTIPLATFORM && PPC64 77 depends on PPC64
74 default n 78 default n
75 79
76config PPC_RTAS 80config PPC_RTAS
@@ -91,15 +95,6 @@ config RTAS_FLASH
91 tristate "Firmware flash interface" 95 tristate "Firmware flash interface"
92 depends on PPC64 && RTAS_PROC 96 depends on PPC64 && RTAS_PROC
93 97
94config PPC_PMI
95 tristate "Support for PMI"
96 depends on PPC_IBM_CELL_BLADE
97 help
98 PMI (Platform Management Interrupt) is a way to
99 communicate with the BMC (Baseboard Management Controller).
100 It is used in some IBM Cell blades.
101 default m
102
103config MMIO_NVRAM 98config MMIO_NVRAM
104 bool 99 bool
105 default n 100 default n
@@ -196,7 +191,7 @@ config PPC601_SYNC_FIX
196 191
197config TAU 192config TAU
198 bool "On-chip CPU temperature sensor support" 193 bool "On-chip CPU temperature sensor support"
199 depends on CLASSIC32 194 depends on 6xx
200 help 195 help
201 G3 and G4 processors have an on-chip temperature sensor called the 196 G3 and G4 processors have an on-chip temperature sensor called the
202 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 197 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index e868b5c50723..9da795e49337 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -57,9 +57,17 @@ config E200
57 57
58endchoice 58endchoice
59 59
60# Until we have a choice of exclusive CPU types on 64-bit, we always
61# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
62# "classic" MMU
63
64config PPC_BOOK3S
65 def_bool y
66 depends on PPC64 || 6xx
67
60config POWER4_ONLY 68config POWER4_ONLY
61 bool "Optimize for POWER4" 69 bool "Optimize for POWER4"
62 depends on PPC64 70 depends on PPC64 && PPC_BOOK3S
63 default n 71 default n
64 ---help--- 72 ---help---
65 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. 73 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
@@ -68,16 +76,16 @@ config POWER4_ONLY
68 76
69config POWER3 77config POWER3
70 bool 78 bool
71 depends on PPC64 79 depends on PPC64 && PPC_BOOK3S
72 default y if !POWER4_ONLY 80 default y if !POWER4_ONLY
73 81
74config POWER4 82config POWER4
75 depends on PPC64 83 depends on PPC64 && PPC_BOOK3S
76 def_bool y 84 def_bool y
77 85
78config TUNE_CELL 86config TUNE_CELL
79 bool "Optimize for Cell Broadband Engine" 87 bool "Optimize for Cell Broadband Engine"
80 depends on PPC64 88 depends on PPC64 && PPC_BOOK3S
81 help 89 help
82 Cause the compiler to optimize for the PPE of the Cell Broadband 90 Cause the compiler to optimize for the PPE of the Cell Broadband
83 Engine. This will make the code run considerably faster on Cell 91 Engine. This will make the code run considerably faster on Cell
@@ -147,7 +155,7 @@ config PHYS_64BIT
147 155
148config ALTIVEC 156config ALTIVEC
149 bool "AltiVec Support" 157 bool "AltiVec Support"
150 depends on CLASSIC32 || POWER4 158 depends on 6xx || POWER4
151 ---help--- 159 ---help---
152 This option enables kernel support for the Altivec extensions to the 160 This option enables kernel support for the Altivec extensions to the
153 PowerPC processor. The kernel currently supports saving and restoring 161 PowerPC processor. The kernel currently supports saving and restoring
@@ -210,6 +218,10 @@ config PPC_MMU_NOHASH
210 def_bool y 218 def_bool y
211 depends on !PPC_STD_MMU 219 depends on !PPC_STD_MMU
212 220
221config PPC_BOOK3E_MMU
222 def_bool y
223 depends on FSL_BOOKE
224
213config PPC_MM_SLICES 225config PPC_MM_SLICES
214 bool 226 bool
215 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) 227 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 8079e0b4fd69..f7419198e635 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -19,3 +19,4 @@ obj-$(CONFIG_PPC_PASEMI) += pasemi/
19obj-$(CONFIG_PPC_CELL) += cell/ 19obj-$(CONFIG_PPC_CELL) += cell/
20obj-$(CONFIG_PPC_PS3) += ps3/ 20obj-$(CONFIG_PPC_PS3) += ps3/
21obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/ 21obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
22obj-$(CONFIG_AMIGAONE) += amigaone/
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig
new file mode 100644
index 000000000000..022476717718
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/Kconfig
@@ -0,0 +1,18 @@
1config AMIGAONE
2 bool "Eyetech AmigaOne/MAI Teron"
3 depends on 6xx && BROKEN_ON_SMP
4 select PPC_I8259
5 select PPC_INDIRECT_PCI
6 select PPC_UDBG_16550
7 select PCI
8 select NOT_COHERENT_CACHE
9 select CHECK_CACHE_COHERENCY
10 select DEFAULT_UIMAGE
11 select PCSPKR_PLATFORM
12 help
13 Select AmigaOne for the following machines:
14 - AmigaOne SE/Teron CX (G3 only)
15 - AmigaOne XE/Teron PX
16 - uA1/Teron mini
17 More information is available at:
18 <http://amigaone-linux.sourceforge.net/>.
diff --git a/arch/powerpc/platforms/amigaone/Makefile b/arch/powerpc/platforms/amigaone/Makefile
new file mode 100644
index 000000000000..e6885b3b2ee7
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/Makefile
@@ -0,0 +1 @@
obj-y += setup.o
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c
new file mode 100644
index 000000000000..443035366c12
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/setup.c
@@ -0,0 +1,170 @@
1/*
2 * AmigaOne platform setup
3 *
4 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
5 *
6 * Based on original amigaone_setup.c source code
7 * Copyright 2003 by Hans-Joerg Frieden and Thomas Frieden
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/seq_file.h>
17#include <linux/utsrelease.h>
18
19#include <asm/machdep.h>
20#include <asm/cputable.h>
21#include <asm/prom.h>
22#include <asm/pci-bridge.h>
23#include <asm/i8259.h>
24#include <asm/time.h>
25#include <asm/udbg.h>
26
27extern void __flush_disable_L1(void);
28
29void amigaone_show_cpuinfo(struct seq_file *m)
30{
31 seq_printf(m, "vendor\t\t: Eyetech Ltd.\n");
32}
33
34static int __init amigaone_add_bridge(struct device_node *dev)
35{
36 const u32 *cfg_addr, *cfg_data;
37 int len;
38 const int *bus_range;
39 struct pci_controller *hose;
40
41 printk(KERN_INFO "Adding PCI host bridge %s\n", dev->full_name);
42
43 cfg_addr = of_get_address(dev, 0, NULL, NULL);
44 cfg_data = of_get_address(dev, 1, NULL, NULL);
45 if ((cfg_addr == NULL) || (cfg_data == NULL))
46 return -ENODEV;
47
48 bus_range = of_get_property(dev, "bus-range", &len);
49 if ((bus_range == NULL) || (len < 2 * sizeof(int)))
50 printk(KERN_WARNING "Can't get bus-range for %s, assume"
51 " bus 0\n", dev->full_name);
52
53 hose = pcibios_alloc_controller(dev);
54 if (hose == NULL)
55 return -ENOMEM;
56
57 hose->first_busno = bus_range ? bus_range[0] : 0;
58 hose->last_busno = bus_range ? bus_range[1] : 0xff;
59
60 setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0);
61
62 /* Interpret the "ranges" property */
63 /* This also maps the I/O region and sets isa_io/mem_base */
64 pci_process_bridge_OF_ranges(hose, dev, 1);
65
66 return 0;
67}
68
69void __init amigaone_setup_arch(void)
70{
71 struct device_node *np;
72 int phb = -ENODEV;
73
74 /* Lookup PCI host bridges. */
75 for_each_compatible_node(np, "pci", "mai-logic,articia-s")
76 phb = amigaone_add_bridge(np);
77
78 BUG_ON(phb != 0);
79
80 if (ppc_md.progress)
81 ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0);
82}
83
84void __init amigaone_init_IRQ(void)
85{
86 struct device_node *pic, *np = NULL;
87 const unsigned long *prop = NULL;
88 unsigned long int_ack = 0;
89
90 /* Search for ISA interrupt controller. */
91 pic = of_find_compatible_node(NULL, "interrupt-controller",
92 "pnpPNP,000");
93 BUG_ON(pic == NULL);
94
95 /* Look for interrupt acknowledge address in the PCI root node. */
96 np = of_find_compatible_node(NULL, "pci", "mai-logic,articia-s");
97 if (np) {
98 prop = of_get_property(np, "8259-interrupt-acknowledge", NULL);
99 if (prop)
100 int_ack = prop[0];
101 of_node_put(np);
102 }
103
104 if (int_ack == 0)
105 printk(KERN_WARNING "Cannot find PCI interrupt acknowledge"
106 " address, polling\n");
107
108 i8259_init(pic, int_ack);
109 ppc_md.get_irq = i8259_irq;
110 irq_set_default_host(i8259_get_host());
111}
112
113void __init amigaone_init(void)
114{
115 request_region(0x00, 0x20, "dma1");
116 request_region(0x40, 0x20, "timer");
117 request_region(0x80, 0x10, "dma page reg");
118 request_region(0xc0, 0x20, "dma2");
119}
120
121void amigaone_restart(char *cmd)
122{
123 local_irq_disable();
124
125 /* Flush and disable caches. */
126 __flush_disable_L1();
127
128 /* Set SRR0 to the reset vector and turn on MSR_IP. */
129 mtspr(SPRN_SRR0, 0xfff00100);
130 mtspr(SPRN_SRR1, MSR_IP);
131
132 /* Do an rfi to jump back to firmware. */
133 __asm__ __volatile__("rfi" : : : "memory");
134
135 /* Not reached. */
136 while (1);
137}
138
139static int __init amigaone_probe(void)
140{
141 unsigned long root = of_get_flat_dt_root();
142
143 if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) {
144 /*
145 * Coherent memory access cause complete system lockup! Thus
146 * disable this CPU feature, even if the CPU needs it.
147 */
148 cur_cpu_spec->cpu_features &= ~CPU_FTR_NEED_COHERENT;
149
150 ISA_DMA_THRESHOLD = 0x00ffffff;
151 DMA_MODE_READ = 0x44;
152 DMA_MODE_WRITE = 0x48;
153
154 return 1;
155 }
156
157 return 0;
158}
159
160define_machine(amigaone) {
161 .name = "AmigaOne",
162 .probe = amigaone_probe,
163 .setup_arch = amigaone_setup_arch,
164 .init = amigaone_init,
165 .show_cpuinfo = amigaone_show_cpuinfo,
166 .init_IRQ = amigaone_init_IRQ,
167 .restart = amigaone_restart,
168 .calibrate_decr = generic_calibrate_decr,
169 .progress = udbg_progress,
170};
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 5cc3279559a4..40e24c39ad06 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -23,7 +23,7 @@ config PPC_CELL_NATIVE
23 23
24config PPC_IBM_CELL_BLADE 24config PPC_IBM_CELL_BLADE
25 bool "IBM Cell Blade" 25 bool "IBM Cell Blade"
26 depends on PPC_MULTIPLATFORM && PPC64 26 depends on PPC64 && PPC_BOOK3S
27 select PPC_CELL_NATIVE 27 select PPC_CELL_NATIVE
28 select MMIO_NVRAM 28 select MMIO_NVRAM
29 select PPC_UDBG_16550 29 select PPC_UDBG_16550
@@ -31,7 +31,7 @@ config PPC_IBM_CELL_BLADE
31 31
32config PPC_CELLEB 32config PPC_CELLEB
33 bool "Toshiba's Cell Reference Set 'Celleb' Architecture" 33 bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
34 depends on PPC_MULTIPLATFORM && PPC64 34 depends on PPC64 && PPC_BOOK3S
35 select PPC_CELL_NATIVE 35 select PPC_CELL_NATIVE
36 select HAS_TXX9_SERIAL 36 select HAS_TXX9_SERIAL
37 select PPC_UDBG_BEAT 37 select PPC_UDBG_BEAT
@@ -40,9 +40,14 @@ config PPC_CELLEB
40 40
41config PPC_CELL_QPACE 41config PPC_CELL_QPACE
42 bool "IBM Cell - QPACE" 42 bool "IBM Cell - QPACE"
43 depends on PPC_MULTIPLATFORM && PPC64 43 depends on PPC64 && PPC_BOOK3S
44 select PPC_CELL_COMMON 44 select PPC_CELL_COMMON
45 45
46config AXON_MSI
47 bool
48 depends on PPC_IBM_CELL_BLADE && PCI_MSI
49 default y
50
46menu "Cell Broadband Engine options" 51menu "Cell Broadband Engine options"
47 depends on PPC_CELL 52 depends on PPC_CELL
48 53
@@ -98,7 +103,7 @@ config PPC_IBM_CELL_RESETBUTTON
98 103
99config PPC_IBM_CELL_POWERBUTTON 104config PPC_IBM_CELL_POWERBUTTON
100 tristate "IBM Cell Blade power button" 105 tristate "IBM Cell Blade power button"
101 depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV 106 depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
102 default y 107 default y
103 help 108 help
104 Support Powerbutton on IBM Cell blades. 109 Support Powerbutton on IBM Cell blades.
@@ -118,9 +123,9 @@ config CBE_CPUFREQ
118 For details, take a look at <file:Documentation/cpu-freq/>. 123 For details, take a look at <file:Documentation/cpu-freq/>.
119 If you don't have such processor, say N 124 If you don't have such processor, say N
120 125
121config CBE_CPUFREQ_PMI 126config CBE_CPUFREQ_PMI_ENABLE
122 tristate "CBE frequency scaling using PMI interface" 127 bool "CBE frequency scaling using PMI interface"
123 depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL 128 depends on CBE_CPUFREQ && EXPERIMENTAL
124 default n 129 default n
125 help 130 help
126 Select this, if you want to use the PMI interface 131 Select this, if you want to use the PMI interface
@@ -128,6 +133,20 @@ config CBE_CPUFREQ_PMI
128 processor will not only be able to run at lower speed, 133 processor will not only be able to run at lower speed,
129 but also at lower core voltage. 134 but also at lower core voltage.
130 135
136config CBE_CPUFREQ_PMI
137 tristate
138 depends on CBE_CPUFREQ_PMI_ENABLE
139 default CBE_CPUFREQ
140
141config PPC_PMI
142 tristate
143 default y
144 depends on CBE_CPUFREQ_PMI || PPC_IBM_CELL_POWERBUTTON
145 help
146 PMI (Platform Management Interrupt) is a way to
147 communicate with the BMC (Baseboard Management Controller).
148 It is used in some IBM Cell blades.
149
131config CBE_CPUFREQ_SPU_GOVERNOR 150config CBE_CPUFREQ_SPU_GOVERNOR
132 tristate "CBE frequency scaling based on SPU usage" 151 tristate "CBE frequency scaling based on SPU usage"
133 depends on SPU_FS && CPU_FREQ 152 depends on SPU_FS && CPU_FREQ
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 43eccb270301..83fafe922641 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -28,7 +28,7 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
28 $(spu-manage-y) \ 28 $(spu-manage-y) \
29 spufs/ 29 spufs/
30 30
31obj-$(CONFIG_PCI_MSI) += axon_msi.o 31obj-$(CONFIG_AXON_MSI) += axon_msi.o
32 32
33# qpace setup 33# qpace setup
34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o 34obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o
diff --git a/arch/powerpc/platforms/cell/io-workarounds.c b/arch/powerpc/platforms/cell/io-workarounds.c
index 059cad6c3f69..5c1118e31940 100644
--- a/arch/powerpc/platforms/cell/io-workarounds.c
+++ b/arch/powerpc/platforms/cell/io-workarounds.c
@@ -131,10 +131,10 @@ static const struct ppc_pci_io __devinitconst iowa_pci_io = {
131}; 131};
132 132
133static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size, 133static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
134 unsigned long flags) 134 unsigned long flags, void *caller)
135{ 135{
136 struct iowa_bus *bus; 136 struct iowa_bus *bus;
137 void __iomem *res = __ioremap(addr, size, flags); 137 void __iomem *res = __ioremap_caller(addr, size, flags, caller);
138 int busno; 138 int busno;
139 139
140 bus = iowa_pci_find(0, (unsigned long)addr); 140 bus = iowa_pci_find(0, (unsigned long)addr);
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index be84e6a16b30..c75b66278fa2 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -141,6 +141,8 @@ define_machine(qpace) {
141 .power_off = rtas_power_off, 141 .power_off = rtas_power_off,
142 .halt = rtas_halt, 142 .halt = rtas_halt,
143 .get_boot_time = rtas_get_boot_time, 143 .get_boot_time = rtas_get_boot_time,
144 .get_rtc_time = rtas_get_rtc_time,
145 .set_rtc_time = rtas_set_rtc_time,
144 .calibrate_decr = generic_calibrate_decr, 146 .calibrate_decr = generic_calibrate_decr,
145 .progress = qpace_progress, 147 .progress = qpace_progress,
146 .init_IRQ = iic_init_IRQ, 148 .init_IRQ = iic_init_IRQ,
diff --git a/arch/powerpc/platforms/cell/spu_fault.c b/arch/powerpc/platforms/cell/spu_fault.c
index c8b1cd42905d..95d8dadf2d87 100644
--- a/arch/powerpc/platforms/cell/spu_fault.c
+++ b/arch/powerpc/platforms/cell/spu_fault.c
@@ -39,60 +39,56 @@ int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
39 unsigned long is_write; 39 unsigned long is_write;
40 int ret; 40 int ret;
41 41
42#if 0 42 if (mm == NULL)
43 if (!IS_VALID_EA(ea)) {
44 return -EFAULT; 43 return -EFAULT;
45 } 44
46#endif /* XXX */ 45 if (mm->pgd == NULL)
47 if (mm == NULL) {
48 return -EFAULT;
49 }
50 if (mm->pgd == NULL) {
51 return -EFAULT; 46 return -EFAULT;
52 }
53 47
54 down_read(&mm->mmap_sem); 48 down_read(&mm->mmap_sem);
49 ret = -EFAULT;
55 vma = find_vma(mm, ea); 50 vma = find_vma(mm, ea);
56 if (!vma) 51 if (!vma)
57 goto bad_area; 52 goto out_unlock;
58 if (vma->vm_start <= ea) 53
59 goto good_area; 54 if (ea < vma->vm_start) {
60 if (!(vma->vm_flags & VM_GROWSDOWN)) 55 if (!(vma->vm_flags & VM_GROWSDOWN))
61 goto bad_area; 56 goto out_unlock;
62 if (expand_stack(vma, ea)) 57 if (expand_stack(vma, ea))
63 goto bad_area; 58 goto out_unlock;
64good_area: 59 }
60
65 is_write = dsisr & MFC_DSISR_ACCESS_PUT; 61 is_write = dsisr & MFC_DSISR_ACCESS_PUT;
66 if (is_write) { 62 if (is_write) {
67 if (!(vma->vm_flags & VM_WRITE)) 63 if (!(vma->vm_flags & VM_WRITE))
68 goto bad_area; 64 goto out_unlock;
69 } else { 65 } else {
70 if (dsisr & MFC_DSISR_ACCESS_DENIED) 66 if (dsisr & MFC_DSISR_ACCESS_DENIED)
71 goto bad_area; 67 goto out_unlock;
72 if (!(vma->vm_flags & (VM_READ | VM_EXEC))) 68 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
73 goto bad_area; 69 goto out_unlock;
74 } 70 }
71
75 ret = 0; 72 ret = 0;
76 *flt = handle_mm_fault(mm, vma, ea, is_write); 73 *flt = handle_mm_fault(mm, vma, ea, is_write);
77 if (unlikely(*flt & VM_FAULT_ERROR)) { 74 if (unlikely(*flt & VM_FAULT_ERROR)) {
78 if (*flt & VM_FAULT_OOM) { 75 if (*flt & VM_FAULT_OOM) {
79 ret = -ENOMEM; 76 ret = -ENOMEM;
80 goto bad_area; 77 goto out_unlock;
81 } else if (*flt & VM_FAULT_SIGBUS) { 78 } else if (*flt & VM_FAULT_SIGBUS) {
82 ret = -EFAULT; 79 ret = -EFAULT;
83 goto bad_area; 80 goto out_unlock;
84 } 81 }
85 BUG(); 82 BUG();
86 } 83 }
84
87 if (*flt & VM_FAULT_MAJOR) 85 if (*flt & VM_FAULT_MAJOR)
88 current->maj_flt++; 86 current->maj_flt++;
89 else 87 else
90 current->min_flt++; 88 current->min_flt++;
91 up_read(&mm->mmap_sem);
92 return ret;
93 89
94bad_area: 90out_unlock:
95 up_read(&mm->mmap_sem); 91 up_read(&mm->mmap_sem);
96 return -EFAULT; 92 return ret;
97} 93}
98EXPORT_SYMBOL_GPL(spu_handle_mm_fault); 94EXPORT_SYMBOL_GPL(spu_handle_mm_fault);
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index 6653ddbed048..db5398c0339f 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -35,6 +35,8 @@ atomic_t nr_spu_contexts = ATOMIC_INIT(0);
35struct spu_context *alloc_spu_context(struct spu_gang *gang) 35struct spu_context *alloc_spu_context(struct spu_gang *gang)
36{ 36{
37 struct spu_context *ctx; 37 struct spu_context *ctx;
38 struct timespec ts;
39
38 ctx = kzalloc(sizeof *ctx, GFP_KERNEL); 40 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
39 if (!ctx) 41 if (!ctx)
40 goto out; 42 goto out;
@@ -64,6 +66,8 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
64 __spu_update_sched_info(ctx); 66 __spu_update_sched_info(ctx);
65 spu_set_timeslice(ctx); 67 spu_set_timeslice(ctx);
66 ctx->stats.util_state = SPU_UTIL_IDLE_LOADED; 68 ctx->stats.util_state = SPU_UTIL_IDLE_LOADED;
69 ktime_get_ts(&ts);
70 ctx->stats.tstamp = timespec_to_ns(&ts);
67 71
68 atomic_inc(&nr_spu_contexts); 72 atomic_inc(&nr_spu_contexts);
69 goto out; 73 goto out;
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 0da7f2bf5ee1..d6a519e6e1c1 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -568,16 +568,17 @@ spufs_regs_write(struct file *file, const char __user *buffer,
568 struct spu_lscsa *lscsa = ctx->csa.lscsa; 568 struct spu_lscsa *lscsa = ctx->csa.lscsa;
569 int ret; 569 int ret;
570 570
571 size = min_t(ssize_t, sizeof lscsa->gprs - *pos, size); 571 if (*pos >= sizeof(lscsa->gprs))
572 if (size <= 0)
573 return -EFBIG; 572 return -EFBIG;
573
574 size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size);
574 *pos += size; 575 *pos += size;
575 576
576 ret = spu_acquire_saved(ctx); 577 ret = spu_acquire_saved(ctx);
577 if (ret) 578 if (ret)
578 return ret; 579 return ret;
579 580
580 ret = copy_from_user(lscsa->gprs + *pos - size, 581 ret = copy_from_user((char *)lscsa->gprs + *pos - size,
581 buffer, size) ? -EFAULT : size; 582 buffer, size) ? -EFAULT : size;
582 583
583 spu_release_saved(ctx); 584 spu_release_saved(ctx);
@@ -623,10 +624,11 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
623 struct spu_lscsa *lscsa = ctx->csa.lscsa; 624 struct spu_lscsa *lscsa = ctx->csa.lscsa;
624 int ret; 625 int ret;
625 626
626 size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size); 627 if (*pos >= sizeof(lscsa->fpcr))
627 if (size <= 0)
628 return -EFBIG; 628 return -EFBIG;
629 629
630 size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
631
630 ret = spu_acquire_saved(ctx); 632 ret = spu_acquire_saved(ctx);
631 if (ret) 633 if (ret)
632 return ret; 634 return ret;
@@ -2665,7 +2667,7 @@ static const struct file_operations spufs_ctx_fops = {
2665 .release = single_release, 2667 .release = single_release,
2666}; 2668};
2667 2669
2668struct spufs_tree_descr spufs_dir_contents[] = { 2670const struct spufs_tree_descr spufs_dir_contents[] = {
2669 { "capabilities", &spufs_caps_fops, 0444, }, 2671 { "capabilities", &spufs_caps_fops, 0444, },
2670 { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, 2672 { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
2671 { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), }, 2673 { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), },
@@ -2706,7 +2708,7 @@ struct spufs_tree_descr spufs_dir_contents[] = {
2706 {}, 2708 {},
2707}; 2709};
2708 2710
2709struct spufs_tree_descr spufs_dir_nosched_contents[] = { 2711const struct spufs_tree_descr spufs_dir_nosched_contents[] = {
2710 { "capabilities", &spufs_caps_fops, 0444, }, 2712 { "capabilities", &spufs_caps_fops, 0444, },
2711 { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, 2713 { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
2712 { "mbox", &spufs_mbox_fops, 0444, }, 2714 { "mbox", &spufs_mbox_fops, 0444, },
@@ -2731,12 +2733,12 @@ struct spufs_tree_descr spufs_dir_nosched_contents[] = {
2731 {}, 2733 {},
2732}; 2734};
2733 2735
2734struct spufs_tree_descr spufs_dir_debug_contents[] = { 2736const struct spufs_tree_descr spufs_dir_debug_contents[] = {
2735 { ".ctx", &spufs_ctx_fops, 0444, }, 2737 { ".ctx", &spufs_ctx_fops, 0444, },
2736 {}, 2738 {},
2737}; 2739};
2738 2740
2739struct spufs_coredump_reader spufs_coredump_read[] = { 2741const struct spufs_coredump_reader spufs_coredump_read[] = {
2740 { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])}, 2742 { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
2741 { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) }, 2743 { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
2742 { "lslr", NULL, spufs_lslr_get, 19 }, 2744 { "lslr", NULL, spufs_lslr_get, 19 },
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index e309ef70a531..64f068540d0d 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -186,8 +186,9 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir)
186 return simple_rmdir(parent, dir); 186 return simple_rmdir(parent, dir);
187} 187}
188 188
189static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files, 189static int spufs_fill_dir(struct dentry *dir,
190 int mode, struct spu_context *ctx) 190 const struct spufs_tree_descr *files, int mode,
191 struct spu_context *ctx)
191{ 192{
192 struct dentry *dentry, *tmp; 193 struct dentry *dentry, *tmp;
193 int ret; 194 int ret;
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index c58bd36b0c5b..4ddf769a64e5 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -117,6 +117,9 @@ static int spu_setup_isolated(struct spu_context *ctx)
117 cond_resched(); 117 cond_resched();
118 } 118 }
119 119
120 /* clear purge status */
121 out_be64(mfc_cntl, 0);
122
120 /* put the SPE in kernel mode to allow access to the loader */ 123 /* put the SPE in kernel mode to allow access to the loader */
121 sr1 = spu_mfc_sr1_get(ctx->spu); 124 sr1 = spu_mfc_sr1_get(ctx->spu);
122 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; 125 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK;
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 3bf908e2873a..ae31573bea4a 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -241,9 +241,9 @@ struct spufs_tree_descr {
241 size_t size; 241 size_t size;
242}; 242};
243 243
244extern struct spufs_tree_descr spufs_dir_contents[]; 244extern const struct spufs_tree_descr spufs_dir_contents[];
245extern struct spufs_tree_descr spufs_dir_nosched_contents[]; 245extern const struct spufs_tree_descr spufs_dir_nosched_contents[];
246extern struct spufs_tree_descr spufs_dir_debug_contents[]; 246extern const struct spufs_tree_descr spufs_dir_debug_contents[];
247 247
248/* system call implementation */ 248/* system call implementation */
249extern struct spufs_calls spufs_calls; 249extern struct spufs_calls spufs_calls;
@@ -358,7 +358,7 @@ struct spufs_coredump_reader {
358 u64 (*get)(struct spu_context *ctx); 358 u64 (*get)(struct spu_context *ctx);
359 size_t size; 359 size_t size;
360}; 360};
361extern struct spufs_coredump_reader spufs_coredump_read[]; 361extern const struct spufs_coredump_reader spufs_coredump_read[];
362extern int spufs_coredump_num_notes; 362extern int spufs_coredump_num_notes;
363 363
364extern int spu_init_csa(struct spu_state *csa); 364extern int spu_init_csa(struct spu_state *csa);
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig
index 22b4b4e3b6f0..37d438bd5b7a 100644
--- a/arch/powerpc/platforms/chrp/Kconfig
+++ b/arch/powerpc/platforms/chrp/Kconfig
@@ -1,6 +1,6 @@
1config PPC_CHRP 1config PPC_CHRP
2 bool "Common Hardware Reference Platform (CHRP) based machines" 2 bool "Common Hardware Reference Platform (CHRP) based machines"
3 depends on PPC_MULTIPLATFORM && PPC32 3 depends on 6xx
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
6 select PPC_INDIRECT_PCI 6 select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c
index 130ff72d99dd..039fc8e82199 100644
--- a/arch/powerpc/platforms/chrp/pegasos_eth.c
+++ b/arch/powerpc/platforms/chrp/pegasos_eth.c
@@ -21,8 +21,8 @@
21#define PEGASOS2_SRAM_BASE (0xf2000000) 21#define PEGASOS2_SRAM_BASE (0xf2000000)
22#define PEGASOS2_SRAM_SIZE (256*1024) 22#define PEGASOS2_SRAM_SIZE (256*1024)
23 23
24#define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE) 24#define PEGASOS2_SRAM_BASE_ETH_PORT0 (PEGASOS2_SRAM_BASE)
25#define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) ) 25#define PEGASOS2_SRAM_BASE_ETH_PORT1 (PEGASOS2_SRAM_BASE_ETH_PORT0 + (PEGASOS2_SRAM_SIZE / 2) )
26 26
27 27
28#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4) 28#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
@@ -47,75 +47,42 @@ static struct platform_device mv643xx_eth_shared_device = {
47 .resource = mv643xx_eth_shared_resources, 47 .resource = mv643xx_eth_shared_resources,
48}; 48};
49 49
50static struct resource mv643xx_eth0_resources[] = { 50static struct resource mv643xx_eth_port1_resources[] = {
51 [0] = { 51 [0] = {
52 .name = "eth0 irq", 52 .name = "eth port1 irq",
53 .start = 9, 53 .start = 9,
54 .end = 9, 54 .end = 9,
55 .flags = IORESOURCE_IRQ, 55 .flags = IORESOURCE_IRQ,
56 }, 56 },
57}; 57};
58 58
59 59static struct mv643xx_eth_platform_data eth_port1_pd = {
60static struct mv643xx_eth_platform_data eth0_pd = {
61 .shared = &mv643xx_eth_shared_device,
62 .port_number = 0,
63
64 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
65 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
66 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
67
68 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
69 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
70 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
71};
72
73static struct platform_device eth0_device = {
74 .name = MV643XX_ETH_NAME,
75 .id = 0,
76 .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
77 .resource = mv643xx_eth0_resources,
78 .dev = {
79 .platform_data = &eth0_pd,
80 },
81};
82
83static struct resource mv643xx_eth1_resources[] = {
84 [0] = {
85 .name = "eth1 irq",
86 .start = 9,
87 .end = 9,
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92static struct mv643xx_eth_platform_data eth1_pd = {
93 .shared = &mv643xx_eth_shared_device, 60 .shared = &mv643xx_eth_shared_device,
94 .port_number = 1, 61 .port_number = 1,
62 .phy_addr = MV643XX_ETH_PHY_ADDR(7),
95 63
96 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1, 64 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1,
97 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, 65 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
98 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, 66 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
99 67
100 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE, 68 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1 + PEGASOS2_SRAM_TXRING_SIZE,
101 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, 69 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
102 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, 70 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
103}; 71};
104 72
105static struct platform_device eth1_device = { 73static struct platform_device eth_port1_device = {
106 .name = MV643XX_ETH_NAME, 74 .name = MV643XX_ETH_NAME,
107 .id = 1, 75 .id = 1,
108 .num_resources = ARRAY_SIZE(mv643xx_eth1_resources), 76 .num_resources = ARRAY_SIZE(mv643xx_eth_port1_resources),
109 .resource = mv643xx_eth1_resources, 77 .resource = mv643xx_eth_port1_resources,
110 .dev = { 78 .dev = {
111 .platform_data = &eth1_pd, 79 .platform_data = &eth_port1_pd,
112 }, 80 },
113}; 81};
114 82
115static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { 83static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
116 &mv643xx_eth_shared_device, 84 &mv643xx_eth_shared_device,
117 &eth0_device, 85 &eth_port1_device,
118 &eth1_device,
119}; 86};
120 87
121/***********/ 88/***********/
@@ -191,15 +158,10 @@ static int __init mv643xx_eth_add_pds(void)
191 158
192 if ( Enable_SRAM() < 0) 159 if ( Enable_SRAM() < 0)
193 { 160 {
194 eth0_pd.tx_sram_addr = 0; 161 eth_port1_pd.tx_sram_addr = 0;
195 eth0_pd.tx_sram_size = 0; 162 eth_port1_pd.tx_sram_size = 0;
196 eth0_pd.rx_sram_addr = 0; 163 eth_port1_pd.rx_sram_addr = 0;
197 eth0_pd.rx_sram_size = 0; 164 eth_port1_pd.rx_sram_size = 0;
198
199 eth1_pd.tx_sram_addr = 0;
200 eth1_pd.tx_sram_size = 0;
201 eth1_pd.rx_sram_addr = 0;
202 eth1_pd.rx_sram_size = 0;
203 165
204#ifdef BE_VERBOSE 166#ifdef BE_VERBOSE
205 printk("Pegasos II/Marvell MV64361: Can't enable the " 167 printk("Pegasos II/Marvell MV64361: Can't enable the "
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 4f9f8184d164..291ac9d8cbee 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,6 +1,6 @@
1config EMBEDDED6xx 1config EMBEDDED6xx
2 bool "Embedded 6xx/7xx/7xxx-based boards" 2 bool "Embedded 6xx/7xx/7xxx-based boards"
3 depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM 3 depends on 6xx && BROKEN_ON_SMP
4 4
5config LINKSTATION 5config LINKSTATION
6 bool "Linkstation / Kurobox(HG) from Buffalo" 6 bool "Linkstation / Kurobox(HG) from Buffalo"
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 7ddd0a2c8027..647e87787437 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -1,6 +1,6 @@
1config PPC_ISERIES 1config PPC_ISERIES
2 bool "IBM Legacy iSeries" 2 bool "IBM Legacy iSeries"
3 depends on PPC_MULTIPLATFORM && PPC64 3 depends on PPC64 && PPC_BOOK3S
4 select PPC_INDIRECT_IO 4 select PPC_INDIRECT_IO
5 select PPC_PCI_CHOICE if EMBEDDED 5 select PPC_PCI_CHOICE if EMBEDDED
6 6
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 701d9297c207..94f444758836 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -214,7 +214,7 @@ void __init iSeries_activate_IRQs()
214 unsigned long flags; 214 unsigned long flags;
215 215
216 for_each_irq (irq) { 216 for_each_irq (irq) {
217 irq_desc_t *desc = get_irq_desc(irq); 217 struct irq_desc *desc = get_irq_desc(irq);
218 218
219 if (desc && desc->chip && desc->chip->startup) { 219 if (desc && desc->chip && desc->chip->startup) {
220 spin_lock_irqsave(&desc->lock, flags); 220 spin_lock_irqsave(&desc->lock, flags);
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 24519b96d6ad..a6cd3394feaa 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -617,7 +617,7 @@ static void iseries_dedicated_idle(void)
617} 617}
618 618
619static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size, 619static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
620 unsigned long flags) 620 unsigned long flags, void *caller)
621{ 621{
622 return (void __iomem *)address; 622 return (void __iomem *)address;
623} 623}
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig
index a6467a5591fa..1ea621a94c3b 100644
--- a/arch/powerpc/platforms/maple/Kconfig
+++ b/arch/powerpc/platforms/maple/Kconfig
@@ -1,5 +1,5 @@
1config PPC_MAPLE 1config PPC_MAPLE
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "Maple 970FX Evaluation Board" 3 bool "Maple 970FX Evaluation Board"
4 select PCI 4 select PCI
5 select MPIC 5 select MPIC
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index 348e0619e3e5..a2aeb327d185 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -1,5 +1,5 @@
1config PPC_PASEMI 1config PPC_PASEMI
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "PA Semi SoC-based platforms" 3 bool "PA Semi SoC-based platforms"
4 default n 4 default n
5 select MPIC 5 select MPIC
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig
index 055990ca8ce6..1e1a0873e1dd 100644
--- a/arch/powerpc/platforms/powermac/Kconfig
+++ b/arch/powerpc/platforms/powermac/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PMAC 1config PPC_PMAC
2 bool "Apple PowerMac based machines" 2 bool "Apple PowerMac based machines"
3 depends on PPC_MULTIPLATFORM 3 depends on PPC_BOOK3S
4 select MPIC 4 select MPIC
5 select PCI 5 select PCI
6 select PPC_INDIRECT_PCI if PPC32 6 select PPC_INDIRECT_PCI if PPC32
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c
index beb38333b6d2..22ecfbe7183d 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_64.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_64.c
@@ -86,6 +86,7 @@ static int (*g5_query_freq)(void);
86 86
87static DEFINE_MUTEX(g5_switch_mutex); 87static DEFINE_MUTEX(g5_switch_mutex);
88 88
89static unsigned long transition_latency;
89 90
90#ifdef CONFIG_PMAC_SMU 91#ifdef CONFIG_PMAC_SMU
91 92
@@ -357,7 +358,7 @@ static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
357 358
358static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy) 359static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
359{ 360{
360 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 361 policy->cpuinfo.transition_latency = transition_latency;
361 policy->cur = g5_cpu_freqs[g5_query_freq()].frequency; 362 policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
362 /* secondary CPUs are tied to the primary one by the 363 /* secondary CPUs are tied to the primary one by the
363 * cpufreq core if in the secondary policy we tell it that 364 * cpufreq core if in the secondary policy we tell it that
@@ -500,6 +501,7 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
500 g5_cpu_freqs[1].frequency = max_freq/2; 501 g5_cpu_freqs[1].frequency = max_freq/2;
501 502
502 /* Set callbacks */ 503 /* Set callbacks */
504 transition_latency = 12000;
503 g5_switch_freq = g5_scom_switch_freq; 505 g5_switch_freq = g5_scom_switch_freq;
504 g5_query_freq = g5_scom_query_freq; 506 g5_query_freq = g5_scom_query_freq;
505 freq_method = "SCOM"; 507 freq_method = "SCOM";
@@ -675,6 +677,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
675 g5_cpu_freqs[1].frequency = min_freq; 677 g5_cpu_freqs[1].frequency = min_freq;
676 678
677 /* Set callbacks */ 679 /* Set callbacks */
680 transition_latency = CPUFREQ_ETERNAL;
678 g5_switch_volt = g5_pfunc_switch_volt; 681 g5_switch_volt = g5_pfunc_switch_volt;
679 g5_switch_freq = g5_pfunc_switch_freq; 682 g5_switch_freq = g5_pfunc_switch_freq;
680 g5_query_freq = g5_pfunc_query_freq; 683 g5_query_freq = g5_pfunc_query_freq;
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h
index c44c89f5e532..d622a8345aaa 100644
--- a/arch/powerpc/platforms/powermac/pic.h
+++ b/arch/powerpc/platforms/powermac/pic.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/irq.h> 4#include <linux/irq.h>
5 5
6extern struct hw_interrupt_type pmac_pic; 6extern struct irq_chip pmac_pic;
7 7
8extern void pmac_pic_init(void); 8extern void pmac_pic_init(void);
9extern int pmac_get_irq(void); 9extern int pmac_get_irq(void);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 9b78f5300c24..45936c9ed0ec 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -746,4 +746,7 @@ define_machine(powermac) {
746#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) 746#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
747 .cpu_die = pmac_cpu_die, 747 .cpu_die = pmac_cpu_die,
748#endif 748#endif
749#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
750 .cpu_die = generic_mach_cpu_die,
751#endif
749}; 752};
diff --git a/arch/powerpc/platforms/prep/Kconfig b/arch/powerpc/platforms/prep/Kconfig
index 29d411279b0c..bf8330ef2e76 100644
--- a/arch/powerpc/platforms/prep/Kconfig
+++ b/arch/powerpc/platforms/prep/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PREP 1config PPC_PREP
2 bool "PowerPC Reference Platform (PReP) based machines" 2 bool "PowerPC Reference Platform (PReP) based machines"
3 depends on PPC_MULTIPLATFORM && PPC32 && BROKEN 3 depends on 6xx && BROKEN
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
6 select PPC_INDIRECT_PCI 6 select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 740ef56a1550..dfe316b161a9 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -1,6 +1,6 @@
1config PPC_PS3 1config PPC_PS3
2 bool "Sony PS3" 2 bool "Sony PS3"
3 depends on PPC_MULTIPLATFORM && PPC64 3 depends on PPC64 && PPC_BOOK3S
4 select PPC_CELL 4 select PPC_CELL
5 select USB_ARCH_HAS_OHCI 5 select USB_ARCH_HAS_OHCI
6 select USB_OHCI_LITTLE_ENDIAN 6 select USB_OHCI_LITTLE_ENDIAN
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index d281cc0bca71..9a2b6d948610 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -311,7 +311,7 @@ static int __init ps3_mm_add_memory(void)
311 result = add_memory(0, start_addr, map.r1.size); 311 result = add_memory(0, start_addr, map.r1.size);
312 312
313 if (result) { 313 if (result) {
314 DBG("%s:%d: add_memory failed: (%d)\n", 314 pr_err("%s:%d: add_memory failed: (%d)\n",
315 __func__, __LINE__, result); 315 __func__, __LINE__, result);
316 return result; 316 return result;
317 } 317 }
@@ -322,7 +322,7 @@ static int __init ps3_mm_add_memory(void)
322 result = online_pages(start_pfn, nr_pages); 322 result = online_pages(start_pfn, nr_pages);
323 323
324 if (result) 324 if (result)
325 DBG("%s:%d: online_pages failed: (%d)\n", 325 pr_err("%s:%d: online_pages failed: (%d)\n",
326 __func__, __LINE__, result); 326 __func__, __LINE__, result);
327 327
328 return result; 328 return result;
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index ddc2a307cd50..c0e6ec240f46 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -1,5 +1,5 @@
1config PPC_PSERIES 1config PPC_PSERIES
2 depends on PPC_MULTIPLATFORM && PPC64 2 depends on PPC64 && PPC_BOOK3S
3 bool "IBM pSeries & new (POWER5-based) iSeries" 3 bool "IBM pSeries & new (POWER5-based) iSeries"
4 select MPIC 4 select MPIC
5 select PPC_I8259 5 select PPC_I8259
@@ -25,6 +25,11 @@ config EEH
25 depends on PPC_PSERIES && PCI 25 depends on PPC_PSERIES && PCI
26 default y if !EMBEDDED 26 default y if !EMBEDDED
27 27
28config PSERIES_MSI
29 bool
30 depends on PCI_MSI && EEH
31 default y
32
28config SCANLOG 33config SCANLOG
29 tristate "Scanlog dump interface" 34 tristate "Scanlog dump interface"
30 depends on RTAS_PROC && PPC_PSERIES 35 depends on RTAS_PROC && PPC_PSERIES
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index dfe574af2dc0..0ce691df595f 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_SCANLOG) += scanlog.o
15obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o 15obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o
16obj-$(CONFIG_KEXEC) += kexec.o 16obj-$(CONFIG_KEXEC) += kexec.o
17obj-$(CONFIG_PCI) += pci.o pci_dlpar.o 17obj-$(CONFIG_PCI) += pci.o pci_dlpar.o
18obj-$(CONFIG_PCI_MSI) += msi.o 18obj-$(CONFIG_PSERIES_MSI) += msi.o
19 19
20obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o 20obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o
21obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o 21obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 0ad56ff7b4a0..380420f8c400 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -79,6 +79,40 @@ static int irq_in_use(unsigned int irq)
79 return rc; 79 return rc;
80} 80}
81 81
82/**
83 * eeh_disable_irq - disable interrupt for the recovering device
84 */
85static void eeh_disable_irq(struct pci_dev *dev)
86{
87 struct device_node *dn = pci_device_to_OF_node(dev);
88
89 /* Don't disable MSI and MSI-X interrupts. They are
90 * effectively disabled by the DMA Stopped state
91 * when an EEH error occurs.
92 */
93 if (dev->msi_enabled || dev->msix_enabled)
94 return;
95
96 if (!irq_in_use(dev->irq))
97 return;
98
99 PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED;
100 disable_irq_nosync(dev->irq);
101}
102
103/**
104 * eeh_enable_irq - enable interrupt for the recovering device
105 */
106static void eeh_enable_irq(struct pci_dev *dev)
107{
108 struct device_node *dn = pci_device_to_OF_node(dev);
109
110 if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) {
111 PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED;
112 enable_irq(dev->irq);
113 }
114}
115
82/* ------------------------------------------------------- */ 116/* ------------------------------------------------------- */
83/** 117/**
84 * eeh_report_error - report pci error to each device driver 118 * eeh_report_error - report pci error to each device driver
@@ -98,11 +132,8 @@ static void eeh_report_error(struct pci_dev *dev, void *userdata)
98 if (!driver) 132 if (!driver)
99 return; 133 return;
100 134
101 if (irq_in_use (dev->irq)) { 135 eeh_disable_irq(dev);
102 struct device_node *dn = pci_device_to_OF_node(dev); 136
103 PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED;
104 disable_irq_nosync(dev->irq);
105 }
106 if (!driver->err_handler || 137 if (!driver->err_handler ||
107 !driver->err_handler->error_detected) 138 !driver->err_handler->error_detected)
108 return; 139 return;
@@ -147,15 +178,12 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
147{ 178{
148 enum pci_ers_result rc, *res = userdata; 179 enum pci_ers_result rc, *res = userdata;
149 struct pci_driver *driver = dev->driver; 180 struct pci_driver *driver = dev->driver;
150 struct device_node *dn = pci_device_to_OF_node(dev);
151 181
152 if (!driver) 182 if (!driver)
153 return; 183 return;
154 184
155 if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) { 185 eeh_enable_irq(dev);
156 PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED; 186
157 enable_irq(dev->irq);
158 }
159 if (!driver->err_handler || 187 if (!driver->err_handler ||
160 !driver->err_handler->slot_reset) 188 !driver->err_handler->slot_reset)
161 return; 189 return;
@@ -174,17 +202,14 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
174static void eeh_report_resume(struct pci_dev *dev, void *userdata) 202static void eeh_report_resume(struct pci_dev *dev, void *userdata)
175{ 203{
176 struct pci_driver *driver = dev->driver; 204 struct pci_driver *driver = dev->driver;
177 struct device_node *dn = pci_device_to_OF_node(dev);
178 205
179 dev->error_state = pci_channel_io_normal; 206 dev->error_state = pci_channel_io_normal;
180 207
181 if (!driver) 208 if (!driver)
182 return; 209 return;
183 210
184 if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) { 211 eeh_enable_irq(dev);
185 PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED; 212
186 enable_irq(dev->irq);
187 }
188 if (!driver->err_handler || 213 if (!driver->err_handler ||
189 !driver->err_handler->resume) 214 !driver->err_handler->resume)
190 return; 215 return;
@@ -208,15 +233,12 @@ static void eeh_report_failure(struct pci_dev *dev, void *userdata)
208 if (!driver) 233 if (!driver)
209 return; 234 return;
210 235
211 if (irq_in_use (dev->irq)) { 236 eeh_disable_irq(dev);
212 struct device_node *dn = pci_device_to_OF_node(dev); 237
213 PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; 238 if (!driver->err_handler ||
214 disable_irq_nosync(dev->irq); 239 !driver->err_handler->error_detected)
215 }
216 if (!driver->err_handler)
217 return;
218 if (!driver->err_handler->error_detected)
219 return; 240 return;
241
220 driver->err_handler->error_detected(dev, pci_channel_io_perm_failure); 242 driver->err_handler->error_detected(dev, pci_channel_io_perm_failure);
221} 243}
222 244
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index f15222bbe136..bf2e1ac41308 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -71,11 +71,13 @@ static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
71 } while (rtas_busy_delay(rc)); 71 } while (rtas_busy_delay(rc));
72 72
73 /* 73 /*
74 * If the RTAS call succeeded, check the number of irqs is actually 74 * If the RTAS call succeeded, return the number of irqs allocated.
75 * what we asked for. If not, return an error. 75 * If not, make sure we return a negative error code.
76 */ 76 */
77 if (rc == 0 && rtas_ret[0] != num_irqs) 77 if (rc == 0)
78 rc = -ENOSPC; 78 rc = rtas_ret[0];
79 else if (rc > 0)
80 rc = -rc;
79 81
80 pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n", 82 pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
81 func, num_irqs, rtas_ret[0], rc); 83 func, num_irqs, rtas_ret[0], rc);
@@ -91,7 +93,7 @@ static void rtas_disable_msi(struct pci_dev *pdev)
91 if (!pdn) 93 if (!pdn)
92 return; 94 return;
93 95
94 if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0)) 96 if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0)
95 pr_debug("rtas_msi: Setting MSIs to 0 failed!\n"); 97 pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
96} 98}
97 99
@@ -132,7 +134,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
132 rtas_disable_msi(pdev); 134 rtas_disable_msi(pdev);
133} 135}
134 136
135static int check_req_msi(struct pci_dev *pdev, int nvec) 137static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
136{ 138{
137 struct device_node *dn; 139 struct device_node *dn;
138 struct pci_dn *pdn; 140 struct pci_dn *pdn;
@@ -144,26 +146,235 @@ static int check_req_msi(struct pci_dev *pdev, int nvec)
144 146
145 dn = pdn->node; 147 dn = pdn->node;
146 148
147 req_msi = of_get_property(dn, "ibm,req#msi", NULL); 149 req_msi = of_get_property(dn, prop_name, NULL);
148 if (!req_msi) { 150 if (!req_msi) {
149 pr_debug("rtas_msi: No ibm,req#msi on %s\n", dn->full_name); 151 pr_debug("rtas_msi: No %s on %s\n", prop_name, dn->full_name);
150 return -ENOENT; 152 return -ENOENT;
151 } 153 }
152 154
153 if (*req_msi < nvec) { 155 if (*req_msi < nvec) {
154 pr_debug("rtas_msi: ibm,req#msi requests < %d MSIs\n", nvec); 156 pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec);
155 return -ENOSPC; 157
158 if (*req_msi == 0) /* Be paranoid */
159 return -ENOSPC;
160
161 return *req_msi;
156 } 162 }
157 163
158 return 0; 164 return 0;
159} 165}
160 166
167static int check_req_msi(struct pci_dev *pdev, int nvec)
168{
169 return check_req(pdev, nvec, "ibm,req#msi");
170}
171
172static int check_req_msix(struct pci_dev *pdev, int nvec)
173{
174 return check_req(pdev, nvec, "ibm,req#msi-x");
175}
176
177/* Quota calculation */
178
179static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total)
180{
181 struct device_node *dn;
182 const u32 *p;
183
184 dn = of_node_get(pci_device_to_OF_node(dev));
185 while (dn) {
186 p = of_get_property(dn, "ibm,pe-total-#msi", NULL);
187 if (p) {
188 pr_debug("rtas_msi: found prop on dn %s\n",
189 dn->full_name);
190 *total = *p;
191 return dn;
192 }
193
194 dn = of_get_next_parent(dn);
195 }
196
197 return NULL;
198}
199
200static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
201{
202 struct device_node *dn;
203
204 /* Found our PE and assume 8 at that point. */
205
206 dn = pci_device_to_OF_node(dev);
207 if (!dn)
208 return NULL;
209
210 dn = find_device_pe(dn);
211 if (!dn)
212 return NULL;
213
214 /* We actually want the parent */
215 dn = of_get_parent(dn);
216 if (!dn)
217 return NULL;
218
219 /* Hardcode of 8 for old firmwares */
220 *total = 8;
221 pr_debug("rtas_msi: using PE dn %s\n", dn->full_name);
222
223 return dn;
224}
225
226struct msi_counts {
227 struct device_node *requestor;
228 int num_devices;
229 int request;
230 int quota;
231 int spare;
232 int over_quota;
233};
234
235static void *count_non_bridge_devices(struct device_node *dn, void *data)
236{
237 struct msi_counts *counts = data;
238 const u32 *p;
239 u32 class;
240
241 pr_debug("rtas_msi: counting %s\n", dn->full_name);
242
243 p = of_get_property(dn, "class-code", NULL);
244 class = p ? *p : 0;
245
246 if ((class >> 8) != PCI_CLASS_BRIDGE_PCI)
247 counts->num_devices++;
248
249 return NULL;
250}
251
252static void *count_spare_msis(struct device_node *dn, void *data)
253{
254 struct msi_counts *counts = data;
255 const u32 *p;
256 int req;
257
258 if (dn == counts->requestor)
259 req = counts->request;
260 else {
261 /* We don't know if a driver will try to use MSI or MSI-X,
262 * so we just have to punt and use the larger of the two. */
263 req = 0;
264 p = of_get_property(dn, "ibm,req#msi", NULL);
265 if (p)
266 req = *p;
267
268 p = of_get_property(dn, "ibm,req#msi-x", NULL);
269 if (p)
270 req = max(req, (int)*p);
271 }
272
273 if (req < counts->quota)
274 counts->spare += counts->quota - req;
275 else if (req > counts->quota)
276 counts->over_quota++;
277
278 return NULL;
279}
280
281static int msi_quota_for_device(struct pci_dev *dev, int request)
282{
283 struct device_node *pe_dn;
284 struct msi_counts counts;
285 int total;
286
287 pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev),
288 request);
289
290 pe_dn = find_pe_total_msi(dev, &total);
291 if (!pe_dn)
292 pe_dn = find_pe_dn(dev, &total);
293
294 if (!pe_dn) {
295 pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev));
296 goto out;
297 }
298
299 pr_debug("rtas_msi: found PE %s\n", pe_dn->full_name);
300
301 memset(&counts, 0, sizeof(struct msi_counts));
302
303 /* Work out how many devices we have below this PE */
304 traverse_pci_devices(pe_dn, count_non_bridge_devices, &counts);
305
306 if (counts.num_devices == 0) {
307 pr_err("rtas_msi: found 0 devices under PE for %s\n",
308 pci_name(dev));
309 goto out;
310 }
311
312 counts.quota = total / counts.num_devices;
313 if (request <= counts.quota)
314 goto out;
315
316 /* else, we have some more calculating to do */
317 counts.requestor = pci_device_to_OF_node(dev);
318 counts.request = request;
319 traverse_pci_devices(pe_dn, count_spare_msis, &counts);
320
321 /* If the quota isn't an integer multiple of the total, we can
322 * use the remainder as spare MSIs for anyone that wants them. */
323 counts.spare += total % counts.num_devices;
324
325 /* Divide any spare by the number of over-quota requestors */
326 if (counts.over_quota)
327 counts.quota += counts.spare / counts.over_quota;
328
329 /* And finally clamp the request to the possibly adjusted quota */
330 request = min(counts.quota, request);
331
332 pr_debug("rtas_msi: request clamped to quota %d\n", request);
333out:
334 of_node_put(pe_dn);
335
336 return request;
337}
338
161static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type) 339static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type)
162{ 340{
341 int quota, rc;
342
163 if (type == PCI_CAP_ID_MSIX) 343 if (type == PCI_CAP_ID_MSIX)
164 pr_debug("rtas_msi: MSI-X untested, trying anyway.\n"); 344 rc = check_req_msix(pdev, nvec);
345 else
346 rc = check_req_msi(pdev, nvec);
347
348 if (rc)
349 return rc;
350
351 quota = msi_quota_for_device(pdev, nvec);
165 352
166 return check_req_msi(pdev, nvec); 353 if (quota && quota < nvec)
354 return quota;
355
356 return 0;
357}
358
359static int check_msix_entries(struct pci_dev *pdev)
360{
361 struct msi_desc *entry;
362 int expected;
363
364 /* There's no way for us to express to firmware that we want
365 * a discontiguous, or non-zero based, range of MSI-X entries.
366 * So we must reject such requests. */
367
368 expected = 0;
369 list_for_each_entry(entry, &pdev->msi_list, list) {
370 if (entry->msi_attrib.entry_nr != expected) {
371 pr_debug("rtas_msi: bad MSI-X entries.\n");
372 return -EINVAL;
373 }
374 expected++;
375 }
376
377 return 0;
167} 378}
168 379
169static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 380static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
@@ -177,6 +388,9 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
177 if (!pdn) 388 if (!pdn)
178 return -ENODEV; 389 return -ENODEV;
179 390
391 if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev))
392 return -EINVAL;
393
180 /* 394 /*
181 * Try the new more explicit firmware interface, if that fails fall 395 * Try the new more explicit firmware interface, if that fails fall
182 * back to the old interface. The old interface is known to never 396 * back to the old interface. The old interface is known to never
@@ -185,21 +399,21 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
185 if (type == PCI_CAP_ID_MSI) { 399 if (type == PCI_CAP_ID_MSI) {
186 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); 400 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
187 401
188 if (rc) { 402 if (rc < 0) {
189 pr_debug("rtas_msi: trying the old firmware call.\n"); 403 pr_debug("rtas_msi: trying the old firmware call.\n");
190 rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec); 404 rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
191 } 405 }
192 } else 406 } else
193 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec); 407 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
194 408
195 if (rc) { 409 if (rc != nvec) {
196 pr_debug("rtas_msi: rtas_change_msi() failed\n"); 410 pr_debug("rtas_msi: rtas_change_msi() failed\n");
197 return rc; 411 return rc;
198 } 412 }
199 413
200 i = 0; 414 i = 0;
201 list_for_each_entry(entry, &pdev->msi_list, list) { 415 list_for_each_entry(entry, &pdev->msi_list, list) {
202 hwirq = rtas_query_irq_number(pdn, i); 416 hwirq = rtas_query_irq_number(pdn, i++);
203 if (hwirq < 0) { 417 if (hwirq < 0) {
204 pr_debug("rtas_msi: error (%d) getting hwirq\n", rc); 418 pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
205 return hwirq; 419 return hwirq;
@@ -234,8 +448,8 @@ static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
234 } 448 }
235 449
236 /* No MSI -> MSIs can't have been assigned by fw, leave LSI */ 450 /* No MSI -> MSIs can't have been assigned by fw, leave LSI */
237 if (check_req_msi(pdev, 1)) { 451 if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) {
238 dev_dbg(&pdev->dev, "rtas_msi: no req#msi, nothing to do.\n"); 452 dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n");
239 return; 453 return;
240 } 454 }
241 455
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 5e1ed3d60ee5..ad152a0e3946 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -137,11 +137,9 @@ EXPORT_SYMBOL_GPL(pcibios_add_pci_devices);
137struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) 137struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
138{ 138{
139 struct pci_controller *phb; 139 struct pci_controller *phb;
140 int primary;
141 140
142 pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name); 141 pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name);
143 142
144 primary = list_empty(&hose_list);
145 phb = pcibios_alloc_controller(dn); 143 phb = pcibios_alloc_controller(dn);
146 if (!phb) 144 if (!phb)
147 return NULL; 145 return NULL;
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index f1c3395633b9..fd969f0e3121 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -52,6 +52,7 @@ cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
52 * the communication processor devices. 52 * the communication processor devices.
53 */ 53 */
54cpm2_map_t __iomem *cpm2_immr; 54cpm2_map_t __iomem *cpm2_immr;
55EXPORT_SYMBOL(cpm2_immr);
55 56
56#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount 57#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
57 of space for CPM as it is larger 58 of space for CPM as it is larger
@@ -129,7 +130,8 @@ void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)
129 brg -= 4; 130 brg -= 4;
130 } 131 }
131 bp += brg; 132 bp += brg;
132 val = (((clk / rate) - 1) << 1) | CPM_BRG_EN | src; 133 /* Round the clock divider to the nearest integer. */
134 val = (((clk * 2 / rate) - 1) & ~1) | CPM_BRG_EN | src;
133 if (div16) 135 if (div16)
134 val |= CPM_BRG_DIV16; 136 val |= CPM_BRG_DIV16;
135 137
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 9817f63723dd..78021d8afc53 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,12 +1,16 @@
1/* 1/*
2 * MPC83xx/85xx/86xx PCI/PCIE support routing. 2 * MPC83xx/85xx/86xx PCI/PCIE support routing.
3 * 3 *
4 * Copyright 2007,2008 Freescale Semiconductor, Inc 4 * Copyright 2007-2009 Freescale Semiconductor, Inc.
5 * Copyright 2008-2009 MontaVista Software, Inc.
5 * 6 *
6 * Initial author: Xianghua Xiao <x.xiao@freescale.com> 7 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
7 * Recode: ZHANG WEI <wei.zhang@freescale.com> 8 * Recode: ZHANG WEI <wei.zhang@freescale.com>
8 * Rewrite the routing for Frescale PCI and PCI Express 9 * Rewrite the routing for Frescale PCI and PCI Express
9 * Roy Zang <tie-fei.zang@freescale.com> 10 * Roy Zang <tie-fei.zang@freescale.com>
11 * MPC83xx PCI-Express support:
12 * Tony Li <tony.li@freescale.com>
13 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * 14 *
11 * This program is free software; you can redistribute it and/or modify it 15 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the 16 * under the terms of the GNU General Public License as published by the
@@ -27,6 +31,29 @@
27#include <sysdev/fsl_soc.h> 31#include <sysdev/fsl_soc.h>
28#include <sysdev/fsl_pci.h> 32#include <sysdev/fsl_pci.h>
29 33
34static int fsl_pcie_bus_fixup;
35
36static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
37{
38 /* if we aren't a PCIe don't bother */
39 if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
40 return;
41
42 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
43 fsl_pcie_bus_fixup = 1;
44 return;
45}
46
47static int __init fsl_pcie_check_link(struct pci_controller *hose)
48{
49 u32 val;
50
51 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
52 if (val < PCIE_LTSSM_L0)
53 return 1;
54 return 0;
55}
56
30#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 57#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
31static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, 58static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
32 unsigned int index, const struct resource *res, 59 unsigned int index, const struct resource *res,
@@ -159,28 +186,6 @@ static void __init setup_pci_pcsrbar(struct pci_controller *hose)
159#endif 186#endif
160} 187}
161 188
162static int fsl_pcie_bus_fixup;
163
164static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
165{
166 /* if we aren't a PCIe don't bother */
167 if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
168 return ;
169
170 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
171 fsl_pcie_bus_fixup = 1;
172 return ;
173}
174
175static int __init fsl_pcie_check_link(struct pci_controller *hose)
176{
177 u32 val;
178 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
179 if (val < PCIE_LTSSM_L0)
180 return 1;
181 return 0;
182}
183
184void fsl_pcibios_fixup_bus(struct pci_bus *bus) 189void fsl_pcibios_fixup_bus(struct pci_bus *bus)
185{ 190{
186 struct pci_controller *hose = (struct pci_controller *) bus->sysdata; 191 struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
@@ -294,8 +299,184 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
294#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ 299#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
295 300
296#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) 301#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
302DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header);
303DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header);
304DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header);
305DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315, quirk_fsl_pcie_header);
306DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377E, quirk_fsl_pcie_header);
307DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377, quirk_fsl_pcie_header);
308DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378E, quirk_fsl_pcie_header);
309DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378, quirk_fsl_pcie_header);
310
311struct mpc83xx_pcie_priv {
312 void __iomem *cfg_type0;
313 void __iomem *cfg_type1;
314 u32 dev_base;
315};
316
317/*
318 * With the convention of u-boot, the PCIE outbound window 0 serves
319 * as configuration transactions outbound.
320 */
321#define PEX_OUTWIN0_BAR 0xCA4
322#define PEX_OUTWIN0_TAL 0xCA8
323#define PEX_OUTWIN0_TAH 0xCAC
324
325static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
326{
327 struct pci_controller *hose = bus->sysdata;
328
329 if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK)
330 return PCIBIOS_DEVICE_NOT_FOUND;
331 /*
332 * Workaround for the HW bug: for Type 0 configure transactions the
333 * PCI-E controller does not check the device number bits and just
334 * assumes that the device number bits are 0.
335 */
336 if (bus->number == hose->first_busno ||
337 bus->primary == hose->first_busno) {
338 if (devfn & 0xf8)
339 return PCIBIOS_DEVICE_NOT_FOUND;
340 }
341
342 if (ppc_md.pci_exclude_device) {
343 if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
344 return PCIBIOS_DEVICE_NOT_FOUND;
345 }
346
347 return PCIBIOS_SUCCESSFUL;
348}
349
350static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
351 unsigned int devfn, int offset)
352{
353 struct pci_controller *hose = bus->sysdata;
354 struct mpc83xx_pcie_priv *pcie = hose->dn->data;
355 u8 bus_no = bus->number - hose->first_busno;
356 u32 dev_base = bus_no << 24 | devfn << 16;
357 int ret;
358
359 ret = mpc83xx_pcie_exclude_device(bus, devfn);
360 if (ret)
361 return NULL;
362
363 offset &= 0xfff;
364
365 /* Type 0 */
366 if (bus->number == hose->first_busno)
367 return pcie->cfg_type0 + offset;
368
369 if (pcie->dev_base == dev_base)
370 goto mapped;
371
372 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base);
373
374 pcie->dev_base = dev_base;
375mapped:
376 return pcie->cfg_type1 + offset;
377}
378
379static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
380 int offset, int len, u32 *val)
381{
382 void __iomem *cfg_addr;
383
384 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
385 if (!cfg_addr)
386 return PCIBIOS_DEVICE_NOT_FOUND;
387
388 switch (len) {
389 case 1:
390 *val = in_8(cfg_addr);
391 break;
392 case 2:
393 *val = in_le16(cfg_addr);
394 break;
395 default:
396 *val = in_le32(cfg_addr);
397 break;
398 }
399
400 return PCIBIOS_SUCCESSFUL;
401}
402
403static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
404 int offset, int len, u32 val)
405{
406 void __iomem *cfg_addr;
407
408 cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
409 if (!cfg_addr)
410 return PCIBIOS_DEVICE_NOT_FOUND;
411
412 switch (len) {
413 case 1:
414 out_8(cfg_addr, val);
415 break;
416 case 2:
417 out_le16(cfg_addr, val);
418 break;
419 default:
420 out_le32(cfg_addr, val);
421 break;
422 }
423
424 return PCIBIOS_SUCCESSFUL;
425}
426
427static struct pci_ops mpc83xx_pcie_ops = {
428 .read = mpc83xx_pcie_read_config,
429 .write = mpc83xx_pcie_write_config,
430};
431
432static int __init mpc83xx_pcie_setup(struct pci_controller *hose,
433 struct resource *reg)
434{
435 struct mpc83xx_pcie_priv *pcie;
436 u32 cfg_bar;
437 int ret = -ENOMEM;
438
439 pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL);
440 if (!pcie)
441 return ret;
442
443 pcie->cfg_type0 = ioremap(reg->start, resource_size(reg));
444 if (!pcie->cfg_type0)
445 goto err0;
446
447 cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR);
448 if (!cfg_bar) {
449 /* PCI-E isn't configured. */
450 ret = -ENODEV;
451 goto err1;
452 }
453
454 pcie->cfg_type1 = ioremap(cfg_bar, 0x1000);
455 if (!pcie->cfg_type1)
456 goto err1;
457
458 WARN_ON(hose->dn->data);
459 hose->dn->data = pcie;
460 hose->ops = &mpc83xx_pcie_ops;
461
462 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0);
463 out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0);
464
465 if (fsl_pcie_check_link(hose))
466 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
467
468 return 0;
469err1:
470 iounmap(pcie->cfg_type0);
471err0:
472 kfree(pcie);
473 return ret;
474
475}
476
297int __init mpc83xx_add_bridge(struct device_node *dev) 477int __init mpc83xx_add_bridge(struct device_node *dev)
298{ 478{
479 int ret;
299 int len; 480 int len;
300 struct pci_controller *hose; 481 struct pci_controller *hose;
301 struct resource rsrc_reg; 482 struct resource rsrc_reg;
@@ -303,6 +484,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
303 const int *bus_range; 484 const int *bus_range;
304 int primary; 485 int primary;
305 486
487 if (!of_device_is_available(dev)) {
488 pr_warning("%s: disabled by the firmware.\n",
489 dev->full_name);
490 return -ENODEV;
491 }
306 pr_debug("Adding PCI host bridge %s\n", dev->full_name); 492 pr_debug("Adding PCI host bridge %s\n", dev->full_name);
307 493
308 /* Fetch host bridge registers address */ 494 /* Fetch host bridge registers address */
@@ -350,7 +536,14 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
350 hose->first_busno = bus_range ? bus_range[0] : 0; 536 hose->first_busno = bus_range ? bus_range[0] : 0;
351 hose->last_busno = bus_range ? bus_range[1] : 0xff; 537 hose->last_busno = bus_range ? bus_range[1] : 0xff;
352 538
353 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0); 539 if (of_device_is_compatible(dev, "fsl,mpc8314-pcie")) {
540 ret = mpc83xx_pcie_setup(hose, &rsrc_reg);
541 if (ret)
542 goto err0;
543 } else {
544 setup_indirect_pci(hose, rsrc_cfg.start,
545 rsrc_cfg.start + 4, 0);
546 }
354 547
355 printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. " 548 printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
356 "Firmware bus number: %d->%d\n", 549 "Firmware bus number: %d->%d\n",
@@ -365,5 +558,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
365 pci_process_bridge_OF_ranges(hose, dev, primary); 558 pci_process_bridge_OF_ranges(hose, dev, primary);
366 559
367 return 0; 560 return 0;
561err0:
562 pcibios_free_controller(hose);
563 return ret;
368} 564}
369#endif /* CONFIG_PPC_83xx */ 565#endif /* CONFIG_PPC_83xx */
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 115cb16351fd..a01c89d3f9bd 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -22,6 +22,7 @@
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/of.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26#include <linux/phy.h> 27#include <linux/phy.h>
27#include <linux/phy_fixed.h> 28#include <linux/phy_fixed.h>
@@ -328,6 +329,9 @@ static int __init fsl_usb_of_init(void)
328 struct fsl_usb2_platform_data usb_data; 329 struct fsl_usb2_platform_data usb_data;
329 const unsigned char *prop = NULL; 330 const unsigned char *prop = NULL;
330 331
332 if (!of_device_is_available(np))
333 continue;
334
331 memset(&r, 0, sizeof(r)); 335 memset(&r, 0, sizeof(r));
332 memset(&usb_data, 0, sizeof(usb_data)); 336 memset(&usb_data, 0, sizeof(usb_data));
333 337
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 9a89cd3e80a2..a86d3ce01ead 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -568,8 +568,7 @@ static void ipic_ack_irq(unsigned int virq)
568 568
569 spin_lock_irqsave(&ipic_lock, flags); 569 spin_lock_irqsave(&ipic_lock, flags);
570 570
571 temp = ipic_read(ipic->regs, ipic_info[src].ack); 571 temp = 1 << (31 - ipic_info[src].bit);
572 temp |= (1 << (31 - ipic_info[src].bit));
573 ipic_write(ipic->regs, ipic_info[src].ack, temp); 572 ipic_write(ipic->regs, ipic_info[src].ack, temp);
574 573
575 /* mb() can't guarantee that ack is finished. But it does finish 574 /* mb() can't guarantee that ack is finished. But it does finish
@@ -592,8 +591,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq)
592 temp &= ~(1 << (31 - ipic_info[src].bit)); 591 temp &= ~(1 << (31 - ipic_info[src].bit));
593 ipic_write(ipic->regs, ipic_info[src].mask, temp); 592 ipic_write(ipic->regs, ipic_info[src].mask, temp);
594 593
595 temp = ipic_read(ipic->regs, ipic_info[src].ack); 594 temp = 1 << (31 - ipic_info[src].bit);
596 temp |= (1 << (31 - ipic_info[src].bit));
597 ipic_write(ipic->regs, ipic_info[src].ack, temp); 595 ipic_write(ipic->regs, ipic_info[src].ack, temp);
598 596
599 /* mb() can't guarantee that ack is finished. But it does finish 597 /* mb() can't guarantee that ack is finished. But it does finish
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 5558d932b4d5..6a2d473c345a 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1839,6 +1839,8 @@ static int __init ppc4xx_pci_find_bridges(void)
1839{ 1839{
1840 struct device_node *np; 1840 struct device_node *np;
1841 1841
1842 ppc_pci_flags |= PPC_PCI_ENABLE_PROC_DOMAINS | PPC_PCI_COMPAT_DOMAIN_0;
1843
1842#ifdef CONFIG_PPC4xx_PCI_EXPRESS 1844#ifdef CONFIG_PPC4xx_PCI_EXPRESS
1843 for_each_compatible_node(np, NULL, "ibm,plb-pciex") 1845 for_each_compatible_node(np, NULL, "ibm,plb-pciex")
1844 ppc4xx_probe_pciex_bridge(np); 1846 ppc4xx_probe_pciex_bridge(np);
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index b55b4a7fbefd..db24c2278be0 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -55,29 +55,4 @@ struct dyn_arch_ftrace {
55#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
56#endif /* CONFIG_FUNCTION_TRACER */ 56#endif /* CONFIG_FUNCTION_TRACER */
57 57
58#ifdef CONFIG_FUNCTION_GRAPH_TRACER
59
60#ifndef __ASSEMBLY__
61
62/*
63 * Stack of return addresses for functions
64 * of a thread.
65 * Used in struct thread_info
66 */
67struct ftrace_ret_stack {
68 unsigned long ret;
69 unsigned long func;
70 unsigned long long calltime;
71};
72
73/*
74 * Primary handler of a function return.
75 * It relays on ftrace_return_to_handler.
76 * Defined in entry_32/64.S
77 */
78extern void return_to_handler(void);
79
80#endif /* __ASSEMBLY__ */
81#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
82
83#endif /* _ASM_X86_FTRACE_H */ 58#endif /* _ASM_X86_FTRACE_H */
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 6b1f6f6f8661..c0852291b623 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -10,6 +10,7 @@
10#include <linux/kdebug.h> 10#include <linux/kdebug.h>
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/ptrace.h> 12#include <linux/ptrace.h>
13#include <linux/ftrace.h>
13#include <linux/kexec.h> 14#include <linux/kexec.h>
14#include <linux/bug.h> 15#include <linux/bug.h>
15#include <linux/nmi.h> 16#include <linux/nmi.h>
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 231bdd3c5b1c..76f7141e0f91 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -389,79 +389,6 @@ void ftrace_nmi_exit(void)
389 389
390#endif /* !CONFIG_DYNAMIC_FTRACE */ 390#endif /* !CONFIG_DYNAMIC_FTRACE */
391 391
392/* Add a function return address to the trace stack on thread info.*/
393static int push_return_trace(unsigned long ret, unsigned long long time,
394 unsigned long func, int *depth)
395{
396 int index;
397
398 if (!current->ret_stack)
399 return -EBUSY;
400
401 /* The return trace stack is full */
402 if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) {
403 atomic_inc(&current->trace_overrun);
404 return -EBUSY;
405 }
406
407 index = ++current->curr_ret_stack;
408 barrier();
409 current->ret_stack[index].ret = ret;
410 current->ret_stack[index].func = func;
411 current->ret_stack[index].calltime = time;
412 *depth = index;
413
414 return 0;
415}
416
417/* Retrieve a function return address to the trace stack on thread info.*/
418static void pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret)
419{
420 int index;
421
422 index = current->curr_ret_stack;
423
424 if (unlikely(index < 0)) {
425 ftrace_graph_stop();
426 WARN_ON(1);
427 /* Might as well panic, otherwise we have no where to go */
428 *ret = (unsigned long)panic;
429 return;
430 }
431
432 *ret = current->ret_stack[index].ret;
433 trace->func = current->ret_stack[index].func;
434 trace->calltime = current->ret_stack[index].calltime;
435 trace->overrun = atomic_read(&current->trace_overrun);
436 trace->depth = index;
437 barrier();
438 current->curr_ret_stack--;
439
440}
441
442/*
443 * Send the trace to the ring-buffer.
444 * @return the original return address.
445 */
446unsigned long ftrace_return_to_handler(void)
447{
448 struct ftrace_graph_ret trace;
449 unsigned long ret;
450
451 pop_return_trace(&trace, &ret);
452 trace.rettime = cpu_clock(raw_smp_processor_id());
453 ftrace_graph_return(&trace);
454
455 if (unlikely(!ret)) {
456 ftrace_graph_stop();
457 WARN_ON(1);
458 /* Might as well panic. What else to do? */
459 ret = (unsigned long)panic;
460 }
461
462 return ret;
463}
464
465/* 392/*
466 * Hook the return address and push it in the stack of return addrs 393 * Hook the return address and push it in the stack of return addrs
467 * in current thread info. 394 * in current thread info.
@@ -521,7 +448,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
521 448
522 calltime = cpu_clock(raw_smp_processor_id()); 449 calltime = cpu_clock(raw_smp_processor_id());
523 450
524 if (push_return_trace(old, calltime, 451 if (ftrace_push_return_trace(old, calltime,
525 self_addr, &trace.depth) == -EBUSY) { 452 self_addr, &trace.depth) == -EBUSY) {
526 *parent = old; 453 *parent = old;
527 return; 454 return;
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index aedbbe6618db..3163eab3f608 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -70,7 +70,7 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
70 /* Read again to allow register to stabilise */ 70 /* Read again to allow register to stabilise */
71 i2c->interrupt = readb(i2c->base + MPC_I2C_SR); 71 i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
72 writeb(0, i2c->base + MPC_I2C_SR); 72 writeb(0, i2c->base + MPC_I2C_SR);
73 wake_up_interruptible(&i2c->queue); 73 wake_up(&i2c->queue);
74 } 74 }
75 return IRQ_HANDLED; 75 return IRQ_HANDLED;
76} 76}
@@ -115,13 +115,10 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
115 writeb(0, i2c->base + MPC_I2C_SR); 115 writeb(0, i2c->base + MPC_I2C_SR);
116 } else { 116 } else {
117 /* Interrupt mode */ 117 /* Interrupt mode */
118 result = wait_event_interruptible_timeout(i2c->queue, 118 result = wait_event_timeout(i2c->queue,
119 (i2c->interrupt & CSR_MIF), timeout * HZ); 119 (i2c->interrupt & CSR_MIF), timeout * HZ);
120 120
121 if (unlikely(result < 0)) { 121 if (unlikely(!(i2c->interrupt & CSR_MIF))) {
122 pr_debug("I2C: wait interrupted\n");
123 writeccr(i2c, 0);
124 } else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
125 pr_debug("I2C: wait timeout\n"); 122 pr_debug("I2C: wait timeout\n");
126 writeccr(i2c, 0); 123 writeccr(i2c, 0);
127 result = -ETIMEDOUT; 124 result = -ETIMEDOUT;
diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c
index 82607add69a9..c0621d50c8a0 100644
--- a/drivers/macintosh/therm_adt746x.c
+++ b/drivers/macintosh/therm_adt746x.c
@@ -498,8 +498,8 @@ static ssize_t store_##name(struct device *dev, struct device_attribute *attr, c
498#define BUILD_STORE_FUNC_INT(name, data) \ 498#define BUILD_STORE_FUNC_INT(name, data) \
499static ssize_t store_##name(struct device *dev, struct device_attribute *attr, const char *buf, size_t n) \ 499static ssize_t store_##name(struct device *dev, struct device_attribute *attr, const char *buf, size_t n) \
500{ \ 500{ \
501 u32 val; \ 501 int val; \
502 val = simple_strtoul(buf, NULL, 10); \ 502 val = simple_strtol(buf, NULL, 10); \
503 if (val < 0 || val > 255) \ 503 if (val < 0 || val > 255) \
504 return -EINVAL; \ 504 return -EINVAL; \
505 printk(KERN_INFO "Setting specified fan speed to %d\n", val); \ 505 printk(KERN_INFO "Setting specified fan speed to %d\n", val); \
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index cd8e98b45ec5..049b0a7e01f3 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -1123,9 +1123,9 @@ static int mpc52xx_fec_of_resume(struct of_device *op)
1123#endif 1123#endif
1124 1124
1125static struct of_device_id mpc52xx_fec_match[] = { 1125static struct of_device_id mpc52xx_fec_match[] = {
1126 { .type = "network", .compatible = "fsl,mpc5200b-fec", }, 1126 { .compatible = "fsl,mpc5200b-fec", },
1127 { .type = "network", .compatible = "fsl,mpc5200-fec", }, 1127 { .compatible = "fsl,mpc5200-fec", },
1128 { .type = "network", .compatible = "mpc5200-fec", }, 1128 { .compatible = "mpc5200-fec", },
1129 { } 1129 { }
1130}; 1130};
1131 1131
diff --git a/drivers/ps3/ps3av.c b/drivers/ps3/ps3av.c
index 5324978b73fb..235e87fcb49f 100644
--- a/drivers/ps3/ps3av.c
+++ b/drivers/ps3/ps3av.c
@@ -838,7 +838,7 @@ static int ps3av_get_hw_conf(struct ps3av *ps3av)
838} 838}
839 839
840/* set mode using id */ 840/* set mode using id */
841int ps3av_set_video_mode(u32 id) 841int ps3av_set_video_mode(int id)
842{ 842{
843 int size; 843 int size;
844 u32 option; 844 u32 option;
@@ -940,7 +940,7 @@ EXPORT_SYMBOL_GPL(ps3av_audio_mute);
940static int ps3av_probe(struct ps3_system_bus_device *dev) 940static int ps3av_probe(struct ps3_system_bus_device *dev)
941{ 941{
942 int res; 942 int res;
943 u32 id; 943 int id;
944 944
945 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); 945 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__);
946 dev_dbg(&dev->core, " timeout=%d\n", timeout); 946 dev_dbg(&dev->core, " timeout=%d\n", timeout);
@@ -962,8 +962,10 @@ static int ps3av_probe(struct ps3_system_bus_device *dev)
962 init_completion(&ps3av->done); 962 init_completion(&ps3av->done);
963 complete(&ps3av->done); 963 complete(&ps3av->done);
964 ps3av->wq = create_singlethread_workqueue("ps3avd"); 964 ps3av->wq = create_singlethread_workqueue("ps3avd");
965 if (!ps3av->wq) 965 if (!ps3av->wq) {
966 res = -ENOMEM;
966 goto fail; 967 goto fail;
968 }
967 969
968 switch (ps3_os_area_get_av_multi_out()) { 970 switch (ps3_os_area_get_av_multi_out()) {
969 case PS3_PARAM_AV_MULTI_OUT_NTSC: 971 case PS3_PARAM_AV_MULTI_OUT_NTSC:
@@ -994,6 +996,12 @@ static int ps3av_probe(struct ps3_system_bus_device *dev)
994 safe_mode = 1; 996 safe_mode = 1;
995#endif /* CONFIG_FB */ 997#endif /* CONFIG_FB */
996 id = ps3av_auto_videomode(&ps3av->av_hw_conf); 998 id = ps3av_auto_videomode(&ps3av->av_hw_conf);
999 if (id < 0) {
1000 printk(KERN_ERR "%s: invalid id :%d\n", __func__, id);
1001 res = -EINVAL;
1002 goto fail;
1003 }
1004
997 safe_mode = 0; 1005 safe_mode = 0;
998 1006
999 mutex_lock(&ps3av->mutex); 1007 mutex_lock(&ps3av->mutex);
@@ -1007,7 +1015,7 @@ static int ps3av_probe(struct ps3_system_bus_device *dev)
1007fail: 1015fail:
1008 kfree(ps3av); 1016 kfree(ps3av);
1009 ps3av = NULL; 1017 ps3av = NULL;
1010 return -ENOMEM; 1018 return res;
1011} 1019}
1012 1020
1013static int ps3av_remove(struct ps3_system_bus_device *dev) 1021static int ps3av_remove(struct ps3_system_bus_device *dev)
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index bde4b4b0b80f..5c6ef51da274 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -406,6 +406,18 @@ static int cpm_uart_startup(struct uart_port *port)
406 406
407 pr_debug("CPM uart[%d]:startup\n", port->line); 407 pr_debug("CPM uart[%d]:startup\n", port->line);
408 408
409 /* If the port is not the console, make sure rx is disabled. */
410 if (!(pinfo->flags & FLAG_CONSOLE)) {
411 /* Disable UART rx */
412 if (IS_SMC(pinfo)) {
413 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
414 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
415 } else {
416 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
417 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
418 }
419 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
420 }
409 /* Install interrupt handler. */ 421 /* Install interrupt handler. */
410 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port); 422 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
411 if (retval) 423 if (retval)
@@ -420,8 +432,6 @@ static int cpm_uart_startup(struct uart_port *port)
420 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT)); 432 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
421 } 433 }
422 434
423 if (!(pinfo->flags & FLAG_CONSOLE))
424 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
425 return 0; 435 return 0;
426} 436}
427 437
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 0c3a2ab1612c..7f72f8ceaa6f 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -50,8 +50,8 @@
50/* OF Platform device Usage : 50/* OF Platform device Usage :
51 * 51 *
52 * This driver is only used for PSCs configured in uart mode. The device 52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial" 53 * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
54 * and "mpc52xx-psc-uart" in the compatible string 54 * list.
55 * 55 *
56 * By default, PSC devices are enumerated in the order they are found. However 56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>' 57 * a particular PSC number can be forces by adding 'device_no = <port#>'
@@ -522,7 +522,7 @@ mpc52xx_uart_startup(struct uart_port *port)
522 522
523 /* Request IRQ */ 523 /* Request IRQ */
524 ret = request_irq(port->irq, mpc52xx_uart_int, 524 ret = request_irq(port->irq, mpc52xx_uart_int,
525 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED, 525 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
526 "mpc52xx_psc_uart", port); 526 "mpc52xx_psc_uart", port);
527 if (ret) 527 if (ret)
528 return ret; 528 return ret;
@@ -1212,30 +1212,18 @@ mpc52xx_uart_of_resume(struct of_device *op)
1212#endif 1212#endif
1213 1213
1214static void 1214static void
1215mpc52xx_uart_of_assign(struct device_node *np, int idx) 1215mpc52xx_uart_of_assign(struct device_node *np)
1216{ 1216{
1217 int free_idx = -1;
1218 int i; 1217 int i;
1219 1218
1220 /* Find the first free node */ 1219 /* Find the first free PSC number */
1221 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { 1220 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1222 if (mpc52xx_uart_nodes[i] == NULL) { 1221 if (mpc52xx_uart_nodes[i] == NULL) {
1223 free_idx = i; 1222 of_node_get(np);
1224 break; 1223 mpc52xx_uart_nodes[i] = np;
1224 return;
1225 } 1225 }
1226 } 1226 }
1227
1228 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1229 idx = free_idx;
1230
1231 if (idx < 0)
1232 return; /* No free slot; abort */
1233
1234 of_node_get(np);
1235 /* If the slot is already occupied, then swap slots */
1236 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1237 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1238 mpc52xx_uart_nodes[idx] = np;
1239} 1227}
1240 1228
1241static void 1229static void
@@ -1243,23 +1231,17 @@ mpc52xx_uart_of_enumerate(void)
1243{ 1231{
1244 static int enum_done; 1232 static int enum_done;
1245 struct device_node *np; 1233 struct device_node *np;
1246 const unsigned int *devno;
1247 const struct of_device_id *match; 1234 const struct of_device_id *match;
1248 int i; 1235 int i;
1249 1236
1250 if (enum_done) 1237 if (enum_done)
1251 return; 1238 return;
1252 1239
1253 for_each_node_by_type(np, "serial") { 1240 /* Assign index to each PSC in device tree */
1241 for_each_matching_node(np, mpc52xx_uart_of_match) {
1254 match = of_match_node(mpc52xx_uart_of_match, np); 1242 match = of_match_node(mpc52xx_uart_of_match, np);
1255 if (!match)
1256 continue;
1257
1258 psc_ops = match->data; 1243 psc_ops = match->data;
1259 1244 mpc52xx_uart_of_assign(np);
1260 /* Is a particular device number requested? */
1261 devno = of_get_property(np, "port-number", NULL);
1262 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1263 } 1245 }
1264 1246
1265 enum_done = 1; 1247 enum_done = 1;
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index fe7e5f35e5d0..494d3f756e29 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -354,7 +354,7 @@ static int __init xilinx_spi_of_probe(struct of_device *ofdev,
354 if (xspi->regs == NULL) { 354 if (xspi->regs == NULL) {
355 rc = -ENOMEM; 355 rc = -ENOMEM;
356 dev_warn(&ofdev->dev, "ioremap failure\n"); 356 dev_warn(&ofdev->dev, "ioremap failure\n");
357 goto put_master; 357 goto release_mem;
358 } 358 }
359 xspi->irq = r_irq->start; 359 xspi->irq = r_irq->start;
360 360
@@ -365,7 +365,7 @@ static int __init xilinx_spi_of_probe(struct of_device *ofdev,
365 prop = of_get_property(ofdev->node, "xlnx,num-ss-bits", &len); 365 prop = of_get_property(ofdev->node, "xlnx,num-ss-bits", &len);
366 if (!prop || len < sizeof(*prop)) { 366 if (!prop || len < sizeof(*prop)) {
367 dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n"); 367 dev_warn(&ofdev->dev, "no 'xlnx,num-ss-bits' property\n");
368 goto put_master; 368 goto unmap_io;
369 } 369 }
370 master->num_chipselect = *prop; 370 master->num_chipselect = *prop;
371 371
@@ -397,6 +397,8 @@ free_irq:
397 free_irq(xspi->irq, xspi); 397 free_irq(xspi->irq, xspi);
398unmap_io: 398unmap_io:
399 iounmap(xspi->regs); 399 iounmap(xspi->regs);
400release_mem:
401 release_mem_region(r_mem->start, resource_size(r_mem));
400put_master: 402put_master:
401 spi_master_put(master); 403 spi_master_put(master);
402 return rc; 404 return rc;
@@ -406,6 +408,7 @@ static int __devexit xilinx_spi_remove(struct of_device *ofdev)
406{ 408{
407 struct xilinx_spi *xspi; 409 struct xilinx_spi *xspi;
408 struct spi_master *master; 410 struct spi_master *master;
411 struct resource r_mem;
409 412
410 master = platform_get_drvdata(ofdev); 413 master = platform_get_drvdata(ofdev);
411 xspi = spi_master_get_devdata(master); 414 xspi = spi_master_get_devdata(master);
@@ -413,6 +416,8 @@ static int __devexit xilinx_spi_remove(struct of_device *ofdev)
413 spi_bitbang_stop(&xspi->bitbang); 416 spi_bitbang_stop(&xspi->bitbang);
414 free_irq(xspi->irq, xspi); 417 free_irq(xspi->irq, xspi);
415 iounmap(xspi->regs); 418 iounmap(xspi->regs);
419 if (!of_address_to_resource(ofdev->node, 0, &r_mem))
420 release_mem_region(r_mem.start, resource_size(&r_mem));
416 dev_set_drvdata(&ofdev->dev, 0); 421 dev_set_drvdata(&ofdev->dev, 0);
417 spi_master_put(xspi->bitbang.master); 422 spi_master_put(xspi->bitbang.master);
418 423
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 325c10ff6a2c..ecf52e4b80f8 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -772,7 +772,7 @@ config TXX9_WDT
772 772
773config GEF_WDT 773config GEF_WDT
774 tristate "GE Fanuc Watchdog Timer" 774 tristate "GE Fanuc Watchdog Timer"
775 depends on GEF_SBC610 775 depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
776 ---help--- 776 ---help---
777 Watchdog timer found in a number of GE Fanuc single board computers. 777 Watchdog timer found in a number of GE Fanuc single board computers.
778 778
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index 677432b9cb7e..a7f8134c594e 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -380,6 +380,30 @@ struct ftrace_graph_ret {
380#ifdef CONFIG_FUNCTION_GRAPH_TRACER 380#ifdef CONFIG_FUNCTION_GRAPH_TRACER
381 381
382/* 382/*
383 * Stack of return addresses for functions
384 * of a thread.
385 * Used in struct thread_info
386 */
387struct ftrace_ret_stack {
388 unsigned long ret;
389 unsigned long func;
390 unsigned long long calltime;
391};
392
393/*
394 * Primary handler of a function return.
395 * It relays on ftrace_return_to_handler.
396 * Defined in entry_32/64.S
397 */
398extern void return_to_handler(void);
399
400extern int
401ftrace_push_return_trace(unsigned long ret, unsigned long long time,
402 unsigned long func, int *depth);
403extern void
404ftrace_pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret);
405
406/*
383 * Sometimes we don't want to trace a function with the function 407 * Sometimes we don't want to trace a function with the function
384 * graph tracer but we want them to keep traced by the usual function 408 * graph tracer but we want them to keep traced by the usual function
385 * tracer if the function graph tracer is not configured. 409 * tracer if the function graph tracer is not configured.
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index aca8c458aa8a..f37fe506105e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2219,6 +2219,14 @@
2219#define PCI_DEVICE_ID_TDI_EHCI 0x0101 2219#define PCI_DEVICE_ID_TDI_EHCI 0x0101
2220 2220
2221#define PCI_VENDOR_ID_FREESCALE 0x1957 2221#define PCI_VENDOR_ID_FREESCALE 0x1957
2222#define PCI_DEVICE_ID_MPC8315E 0x00b4
2223#define PCI_DEVICE_ID_MPC8315 0x00b5
2224#define PCI_DEVICE_ID_MPC8314E 0x00b6
2225#define PCI_DEVICE_ID_MPC8314 0x00b7
2226#define PCI_DEVICE_ID_MPC8378E 0x00c4
2227#define PCI_DEVICE_ID_MPC8378 0x00c5
2228#define PCI_DEVICE_ID_MPC8377E 0x00c6
2229#define PCI_DEVICE_ID_MPC8377 0x00c7
2222#define PCI_DEVICE_ID_MPC8548E 0x0012 2230#define PCI_DEVICE_ID_MPC8548E 0x0012
2223#define PCI_DEVICE_ID_MPC8548 0x0013 2231#define PCI_DEVICE_ID_MPC8548 0x0013
2224#define PCI_DEVICE_ID_MPC8543E 0x0014 2232#define PCI_DEVICE_ID_MPC8543E 0x0014
diff --git a/kernel/trace/trace_functions_graph.c b/kernel/trace/trace_functions_graph.c
index 930c08e5b38e..dce71a5b51bc 100644
--- a/kernel/trace/trace_functions_graph.c
+++ b/kernel/trace/trace_functions_graph.c
@@ -42,6 +42,81 @@ static struct tracer_flags tracer_flags = {
42/* pid on the last trace processed */ 42/* pid on the last trace processed */
43static pid_t last_pid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 }; 43static pid_t last_pid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 };
44 44
45/* Add a function return address to the trace stack on thread info.*/
46int
47ftrace_push_return_trace(unsigned long ret, unsigned long long time,
48 unsigned long func, int *depth)
49{
50 int index;
51
52 if (!current->ret_stack)
53 return -EBUSY;
54
55 /* The return trace stack is full */
56 if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) {
57 atomic_inc(&current->trace_overrun);
58 return -EBUSY;
59 }
60
61 index = ++current->curr_ret_stack;
62 barrier();
63 current->ret_stack[index].ret = ret;
64 current->ret_stack[index].func = func;
65 current->ret_stack[index].calltime = time;
66 *depth = index;
67
68 return 0;
69}
70
71/* Retrieve a function return address to the trace stack on thread info.*/
72void
73ftrace_pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret)
74{
75 int index;
76
77 index = current->curr_ret_stack;
78
79 if (unlikely(index < 0)) {
80 ftrace_graph_stop();
81 WARN_ON(1);
82 /* Might as well panic, otherwise we have no where to go */
83 *ret = (unsigned long)panic;
84 return;
85 }
86
87 *ret = current->ret_stack[index].ret;
88 trace->func = current->ret_stack[index].func;
89 trace->calltime = current->ret_stack[index].calltime;
90 trace->overrun = atomic_read(&current->trace_overrun);
91 trace->depth = index;
92 barrier();
93 current->curr_ret_stack--;
94
95}
96
97/*
98 * Send the trace to the ring-buffer.
99 * @return the original return address.
100 */
101unsigned long ftrace_return_to_handler(void)
102{
103 struct ftrace_graph_ret trace;
104 unsigned long ret;
105
106 ftrace_pop_return_trace(&trace, &ret);
107 trace.rettime = cpu_clock(raw_smp_processor_id());
108 ftrace_graph_return(&trace);
109
110 if (unlikely(!ret)) {
111 ftrace_graph_stop();
112 WARN_ON(1);
113 /* Might as well panic. What else to do? */
114 ret = (unsigned long)panic;
115 }
116
117 return ret;
118}
119
45static int graph_trace_init(struct trace_array *tr) 120static int graph_trace_init(struct trace_array *tr)
46{ 121{
47 int cpu, ret; 122 int cpu, ret;
diff --git a/lib/lmb.c b/lib/lmb.c
index 97e547037084..e4a6482d8b26 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -29,33 +29,33 @@ static int __init early_lmb(char *p)
29} 29}
30early_param("lmb", early_lmb); 30early_param("lmb", early_lmb);
31 31
32void lmb_dump_all(void) 32static void lmb_dump(struct lmb_region *region, char *name)
33{ 33{
34 unsigned long i; 34 unsigned long long base, size;
35 int i;
36
37 pr_info(" %s.cnt = 0x%lx\n", name, region->cnt);
38
39 for (i = 0; i < region->cnt; i++) {
40 base = region->region[i].base;
41 size = region->region[i].size;
42
43 pr_info(" %s[0x%x]\t0x%016llx - 0x%016llx, 0x%llx bytes\n",
44 name, i, base, base + size - 1, size);
45 }
46}
35 47
48void lmb_dump_all(void)
49{
36 if (!lmb_debug) 50 if (!lmb_debug)
37 return; 51 return;
38 52
39 pr_info("lmb_dump_all:\n"); 53 pr_info("LMB configuration:\n");
40 pr_info(" memory.cnt = 0x%lx\n", lmb.memory.cnt); 54 pr_info(" rmo_size = 0x%llx\n", (unsigned long long)lmb.rmo_size);
41 pr_info(" memory.size = 0x%llx\n", 55 pr_info(" memory.size = 0x%llx\n", (unsigned long long)lmb.memory.size);
42 (unsigned long long)lmb.memory.size);
43 for (i=0; i < lmb.memory.cnt ;i++) {
44 pr_info(" memory.region[0x%lx].base = 0x%llx\n",
45 i, (unsigned long long)lmb.memory.region[i].base);
46 pr_info(" .size = 0x%llx\n",
47 (unsigned long long)lmb.memory.region[i].size);
48 }
49 56
50 pr_info(" reserved.cnt = 0x%lx\n", lmb.reserved.cnt); 57 lmb_dump(&lmb.memory, "memory");
51 pr_info(" reserved.size = 0x%llx\n", 58 lmb_dump(&lmb.reserved, "reserved");
52 (unsigned long long)lmb.memory.size);
53 for (i=0; i < lmb.reserved.cnt ;i++) {
54 pr_info(" reserved.region[0x%lx].base = 0x%llx\n",
55 i, (unsigned long long)lmb.reserved.region[i].base);
56 pr_info(" .size = 0x%llx\n",
57 (unsigned long long)lmb.reserved.region[i].size);
58 }
59} 59}
60 60
61static unsigned long lmb_addrs_overlap(u64 base1, u64 size1, u64 base2, 61static unsigned long lmb_addrs_overlap(u64 base1, u64 size1, u64 base2,
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-29 18:31:59 -0400