diff options
171 files changed, 13123 insertions, 1136 deletions
diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX index 2c6a3b38967e..82e418d648d0 100644 --- a/Documentation/arm/00-INDEX +++ b/Documentation/arm/00-INDEX | |||
| @@ -4,19 +4,29 @@ Booting | |||
| 4 | - requirements for booting | 4 | - requirements for booting |
| 5 | Interrupts | 5 | Interrupts |
| 6 | - ARM Interrupt subsystem documentation | 6 | - ARM Interrupt subsystem documentation |
| 7 | IXP2000 | ||
| 8 | - Release Notes for Linux on Intel's IXP2000 Network Processor | ||
| 7 | Netwinder | 9 | Netwinder |
| 8 | - Netwinder specific documentation | 10 | - Netwinder specific documentation |
| 11 | Porting | ||
| 12 | - Symbol definitions for porting Linux to a new ARM machine. | ||
| 13 | Setup | ||
| 14 | - Kernel initialization parameters on ARM Linux | ||
| 9 | README | 15 | README |
| 10 | - General ARM documentation | 16 | - General ARM documentation |
| 11 | SA1100 | 17 | SA1100/ |
| 12 | - SA1100 documentation | 18 | - SA1100 documentation |
| 13 | XScale | 19 | Samsung-S3C24XX |
| 14 | - XScale documentation | 20 | - S3C24XX ARM Linux Overview |
| 15 | empeg | 21 | Sharp-LH |
| 16 | - Empeg documentation | 22 | - Linux on Sharp LH79524 and LH7A40X System On a Chip (SOC) |
| 23 | VFP/ | ||
| 24 | - Release notes for Linux Kernel Vector Floating Point support code | ||
| 25 | empeg/ | ||
| 26 | - Ltd's Empeg MP3 Car Audio Player | ||
| 17 | mem_alignment | 27 | mem_alignment |
| 18 | - alignment abort handler documentation | 28 | - alignment abort handler documentation |
| 19 | memory.txt | 29 | memory.txt |
| 20 | - description of the virtual memory layout | 30 | - description of the virtual memory layout |
| 21 | nwfpe | 31 | nwfpe/ |
| 22 | - NWFPE floating point emulator documentation | 32 | - NWFPE floating point emulator documentation |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 691aae309c8a..0a0c88d0039c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -318,6 +318,9 @@ config ARCH_KS8695 | |||
| 318 | 318 | ||
| 319 | config ARCH_NS9XXX | 319 | config ARCH_NS9XXX |
| 320 | bool "NetSilicon NS9xxx" | 320 | bool "NetSilicon NS9xxx" |
| 321 | select GENERIC_GPIO | ||
| 322 | select GENERIC_TIME | ||
| 323 | select GENERIC_CLOCKEVENTS | ||
| 321 | help | 324 | help |
| 322 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | 325 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx |
| 323 | System. | 326 | System. |
| @@ -336,14 +339,14 @@ config ARCH_PNX4008 | |||
| 336 | This enables support for Philips PNX4008 mobile platform. | 339 | This enables support for Philips PNX4008 mobile platform. |
| 337 | 340 | ||
| 338 | config ARCH_PXA | 341 | config ARCH_PXA |
| 339 | bool "PXA2xx-based" | 342 | bool "PXA2xx/PXA3xx-based" |
| 340 | depends on MMU | 343 | depends on MMU |
| 341 | select ARCH_MTD_XIP | 344 | select ARCH_MTD_XIP |
| 342 | select GENERIC_GPIO | 345 | select GENERIC_GPIO |
| 343 | select GENERIC_TIME | 346 | select GENERIC_TIME |
| 344 | select GENERIC_CLOCKEVENTS | 347 | select GENERIC_CLOCKEVENTS |
| 345 | help | 348 | help |
| 346 | Support for Intel's PXA2XX processor line. | 349 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
| 347 | 350 | ||
| 348 | config ARCH_RPC | 351 | config ARCH_RPC |
| 349 | bool "RiscPC" | 352 | bool "RiscPC" |
| @@ -486,7 +489,7 @@ source arch/arm/mm/Kconfig | |||
| 486 | config IWMMXT | 489 | config IWMMXT |
| 487 | bool "Enable iWMMXt support" | 490 | bool "Enable iWMMXt support" |
| 488 | depends on CPU_XSCALE || CPU_XSC3 | 491 | depends on CPU_XSCALE || CPU_XSC3 |
| 489 | default y if PXA27x | 492 | default y if PXA27x || PXA3xx |
| 490 | help | 493 | help |
| 491 | Enable support for iWMMXt context switching at run time if | 494 | Enable support for iWMMXt context switching at run time if |
| 492 | running on a CPU that supports it. | 495 | running on a CPU that supports it. |
| @@ -994,6 +997,10 @@ source "drivers/pnp/Kconfig" | |||
| 994 | 997 | ||
| 995 | source "drivers/block/Kconfig" | 998 | source "drivers/block/Kconfig" |
| 996 | 999 | ||
| 1000 | # misc before ide - BLK_DEV_SGIIOC4 depends on SGI_IOC4 | ||
| 1001 | |||
| 1002 | source "drivers/misc/Kconfig" | ||
| 1003 | |||
| 997 | if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \ | 1004 | if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \ |
| 998 | || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ | 1005 | || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ |
| 999 | || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \ | 1006 | || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \ |
| @@ -1029,16 +1036,16 @@ source "drivers/spi/Kconfig" | |||
| 1029 | 1036 | ||
| 1030 | source "drivers/w1/Kconfig" | 1037 | source "drivers/w1/Kconfig" |
| 1031 | 1038 | ||
| 1039 | source "drivers/power/Kconfig" | ||
| 1040 | |||
| 1032 | source "drivers/hwmon/Kconfig" | 1041 | source "drivers/hwmon/Kconfig" |
| 1033 | 1042 | ||
| 1034 | #source "drivers/l3/Kconfig" | 1043 | source "drivers/ssb/Kconfig" |
| 1035 | 1044 | ||
| 1036 | source "drivers/misc/Kconfig" | 1045 | #source "drivers/l3/Kconfig" |
| 1037 | 1046 | ||
| 1038 | source "drivers/mfd/Kconfig" | 1047 | source "drivers/mfd/Kconfig" |
| 1039 | 1048 | ||
| 1040 | source "drivers/leds/Kconfig" | ||
| 1041 | |||
| 1042 | source "drivers/media/Kconfig" | 1049 | source "drivers/media/Kconfig" |
| 1043 | 1050 | ||
| 1044 | source "drivers/video/Kconfig" | 1051 | source "drivers/video/Kconfig" |
| @@ -1051,6 +1058,8 @@ source "drivers/usb/Kconfig" | |||
| 1051 | 1058 | ||
| 1052 | source "drivers/mmc/Kconfig" | 1059 | source "drivers/mmc/Kconfig" |
| 1053 | 1060 | ||
| 1061 | source "drivers/leds/Kconfig" | ||
| 1062 | |||
| 1054 | source "drivers/rtc/Kconfig" | 1063 | source "drivers/rtc/Kconfig" |
| 1055 | 1064 | ||
| 1056 | source "drivers/dma/Kconfig" | 1065 | source "drivers/dma/Kconfig" |
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu index f087376748d1..901e6dff8437 100644 --- a/arch/arm/Kconfig-nommu +++ b/arch/arm/Kconfig-nommu | |||
| @@ -26,7 +26,7 @@ config FLASH_SIZE | |||
| 26 | default 0x00400000 | 26 | default 0x00400000 |
| 27 | 27 | ||
| 28 | config PROCESSOR_ID | 28 | config PROCESSOR_ID |
| 29 | hex | 29 | hex 'Hard wire the processor ID' |
| 30 | default 0x00007700 | 30 | default 0x00007700 |
| 31 | depends on !CPU_CP15 | 31 | depends on !CPU_CP15 |
| 32 | help | 32 | help |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index fa4ea9ff0797..6c2d539cd22b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
| @@ -12,7 +12,7 @@ | |||
| 12 | 12 | ||
| 13 | LDFLAGS_vmlinux :=-p --no-undefined -X | 13 | LDFLAGS_vmlinux :=-p --no-undefined -X |
| 14 | CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET) | 14 | CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET) |
| 15 | OBJCOPYFLAGS :=-O binary -R .note -R .comment -S | 15 | OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S |
| 16 | GZFLAGS :=-9 | 16 | GZFLAGS :=-9 |
| 17 | #CFLAGS +=-pipe | 17 | #CFLAGS +=-pipe |
| 18 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: | 18 | # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: |
diff --git a/arch/arm/boot/compressed/head-xscale.S b/arch/arm/boot/compressed/head-xscale.S index 236bbe578312..67ea99ef6521 100644 --- a/arch/arm/boot/compressed/head-xscale.S +++ b/arch/arm/boot/compressed/head-xscale.S | |||
| @@ -33,10 +33,6 @@ __XScale_start: | |||
| 33 | bic r0, r0, #0x1000 @ clear Icache | 33 | bic r0, r0, #0x1000 @ clear Icache |
| 34 | mcr p15, 0, r0, c1, c0, 0 | 34 | mcr p15, 0, r0, c1, c0, 0 |
| 35 | 35 | ||
| 36 | #ifdef CONFIG_ARCH_LUBBOCK | ||
| 37 | mov r7, #MACH_TYPE_LUBBOCK | ||
| 38 | #endif | ||
| 39 | |||
| 40 | #ifdef CONFIG_ARCH_COTULLA_IDP | 36 | #ifdef CONFIG_ARCH_COTULLA_IDP |
| 41 | mov r7, #MACH_TYPE_COTULLA_IDP | 37 | mov r7, #MACH_TYPE_COTULLA_IDP |
| 42 | #endif | 38 | #endif |
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index e1289a256ce5..3d0b9fa42f84 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
| @@ -17,3 +17,4 @@ obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o | |||
| 17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o | 17 | obj-$(CONFIG_SHARP_SCOOP) += scoop.o |
| 18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o | 18 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o |
| 19 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | 19 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o |
| 20 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o | ||
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index b36b1e8a105d..44ab0dad4035 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
| @@ -263,7 +263,7 @@ map_single(struct device *dev, void *ptr, size_t size, | |||
| 263 | * We don't need to sync the DMA buffer since | 263 | * We don't need to sync the DMA buffer since |
| 264 | * it was allocated via the coherent allocators. | 264 | * it was allocated via the coherent allocators. |
| 265 | */ | 265 | */ |
| 266 | consistent_sync(ptr, size, dir); | 266 | dma_cache_maint(ptr, size, dir); |
| 267 | } | 267 | } |
| 268 | 268 | ||
| 269 | return dma_addr; | 269 | return dma_addr; |
| @@ -383,7 +383,7 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size, | |||
| 383 | * via the coherent allocators. | 383 | * via the coherent allocators. |
| 384 | */ | 384 | */ |
| 385 | } else { | 385 | } else { |
| 386 | consistent_sync(dma_to_virt(dev, dma_addr), size, dir); | 386 | dma_cache_maint(dma_to_virt(dev, dma_addr), size, dir); |
| 387 | } | 387 | } |
| 388 | } | 388 | } |
| 389 | 389 | ||
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c new file mode 100644 index 000000000000..c03de9bfd76b --- /dev/null +++ b/arch/arm/common/it8152.c | |||
| @@ -0,0 +1,387 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/common/it8152.c | ||
| 3 | * | ||
| 4 | * Copyright Compulab Ltd, 2002-2007 | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * The DMA bouncing part is taken from arch/arm/mach-ixp4xx/common-pci.c | ||
| 8 | * (see this file for respective copyrights) | ||
| 9 | * | ||
| 10 | * Thanks to Guennadi Liakhovetski <gl@dsa-ac.de> for IRQ enumberation | ||
| 11 | * and demux code. | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify | ||
| 14 | * it under the terms of the GNU General Public License version 2 as | ||
| 15 | * published by the Free Software Foundation. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/sched.h> | ||
| 19 | #include <linux/kernel.h> | ||
| 20 | #include <linux/pci.h> | ||
| 21 | #include <linux/ptrace.h> | ||
| 22 | #include <linux/interrupt.h> | ||
| 23 | #include <linux/mm.h> | ||
| 24 | #include <linux/slab.h> | ||
| 25 | #include <linux/init.h> | ||
| 26 | #include <linux/ioport.h> | ||
| 27 | #include <linux/irq.h> | ||
| 28 | #include <linux/io.h> | ||
| 29 | |||
| 30 | #include <asm/mach/pci.h> | ||
| 31 | #include <asm/hardware/it8152.h> | ||
| 32 | |||
| 33 | #define MAX_SLOTS 21 | ||
| 34 | |||
| 35 | static void it8152_mask_irq(unsigned int irq) | ||
| 36 | { | ||
| 37 | if (irq >= IT8152_LD_IRQ(0)) { | ||
| 38 | __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) | | ||
| 39 | (1 << (irq - IT8152_LD_IRQ(0)))), | ||
| 40 | IT8152_INTC_LDCNIMR); | ||
| 41 | } else if (irq >= IT8152_LP_IRQ(0)) { | ||
| 42 | __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) | | ||
| 43 | (1 << (irq - IT8152_LP_IRQ(0)))), | ||
| 44 | IT8152_INTC_LPCNIMR); | ||
| 45 | } else if (irq >= IT8152_PD_IRQ(0)) { | ||
| 46 | __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) | | ||
| 47 | (1 << (irq - IT8152_PD_IRQ(0)))), | ||
| 48 | IT8152_INTC_PDCNIMR); | ||
| 49 | } | ||
| 50 | } | ||
| 51 | |||
| 52 | static void it8152_unmask_irq(unsigned int irq) | ||
| 53 | { | ||
| 54 | if (irq >= IT8152_LD_IRQ(0)) { | ||
| 55 | __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) & | ||
| 56 | ~(1 << (irq - IT8152_LD_IRQ(0)))), | ||
| 57 | IT8152_INTC_LDCNIMR); | ||
| 58 | } else if (irq >= IT8152_LP_IRQ(0)) { | ||
| 59 | __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) & | ||
| 60 | ~(1 << (irq - IT8152_LP_IRQ(0)))), | ||
| 61 | IT8152_INTC_LPCNIMR); | ||
| 62 | } else if (irq >= IT8152_PD_IRQ(0)) { | ||
| 63 | __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) & | ||
| 64 | ~(1 << (irq - IT8152_PD_IRQ(0)))), | ||
| 65 | IT8152_INTC_PDCNIMR); | ||
| 66 | } | ||
| 67 | } | ||
| 68 | |||
| 69 | static inline void it8152_irq(int irq) | ||
| 70 | { | ||
| 71 | struct irq_desc *desc; | ||
| 72 | |||
| 73 | printk(KERN_DEBUG "===> %s: irq=%d\n", __FUNCTION__, irq); | ||
| 74 | |||
| 75 | desc = irq_desc + irq; | ||
| 76 | desc_handle_irq(irq, desc); | ||
| 77 | } | ||
| 78 | |||
| 79 | static struct irq_chip it8152_irq_chip = { | ||
| 80 | .name = "it8152", | ||
| 81 | .ack = it8152_mask_irq, | ||
| 82 | .mask = it8152_mask_irq, | ||
| 83 | .unmask = it8152_unmask_irq, | ||
| 84 | }; | ||
| 85 | |||
| 86 | void it8152_init_irq(void) | ||
| 87 | { | ||
| 88 | int irq; | ||
| 89 | |||
| 90 | __raw_writel((0xffff), IT8152_INTC_PDCNIMR); | ||
| 91 | __raw_writel((0), IT8152_INTC_PDCNIRR); | ||
| 92 | __raw_writel((0xffff), IT8152_INTC_LPCNIMR); | ||
| 93 | __raw_writel((0), IT8152_INTC_LPCNIRR); | ||
| 94 | __raw_writel((0xffff), IT8152_INTC_LDCNIMR); | ||
| 95 | __raw_writel((0), IT8152_INTC_LDCNIRR); | ||
| 96 | |||
| 97 | for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { | ||
| 98 | set_irq_chip(irq, &it8152_irq_chip); | ||
| 99 | set_irq_handler(irq, handle_level_irq); | ||
| 100 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
| 101 | } | ||
| 102 | } | ||
| 103 | |||
| 104 | void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | ||
| 105 | { | ||
| 106 | int bits_pd, bits_lp, bits_ld; | ||
| 107 | int i; | ||
| 108 | |||
| 109 | printk(KERN_DEBUG "=> %s: irq = %d\n", __FUNCTION__, irq); | ||
| 110 | |||
| 111 | while (1) { | ||
| 112 | /* Read all */ | ||
| 113 | bits_pd = __raw_readl(IT8152_INTC_PDCNIRR); | ||
| 114 | bits_lp = __raw_readl(IT8152_INTC_LPCNIRR); | ||
| 115 | bits_ld = __raw_readl(IT8152_INTC_LDCNIRR); | ||
| 116 | |||
| 117 | /* Ack */ | ||
| 118 | __raw_writel((~bits_pd), IT8152_INTC_PDCNIRR); | ||
| 119 | __raw_writel((~bits_lp), IT8152_INTC_LPCNIRR); | ||
| 120 | __raw_writel((~bits_ld), IT8152_INTC_LDCNIRR); | ||
| 121 | |||
| 122 | if (!(bits_ld | bits_lp | bits_pd)) { | ||
| 123 | /* Re-read to guarantee, that there was a moment of | ||
| 124 | time, when they all three were 0. */ | ||
| 125 | bits_pd = __raw_readl(IT8152_INTC_PDCNIRR); | ||
| 126 | bits_lp = __raw_readl(IT8152_INTC_LPCNIRR); | ||
| 127 | if (!(bits_ld | bits_lp | bits_pd)) | ||
| 128 | return; | ||
| 129 | } | ||
| 130 | |||
| 131 | bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1); | ||
| 132 | while (bits_pd) { | ||
| 133 | i = __ffs(bits_pd); | ||
| 134 | it8152_irq(IT8152_PD_IRQ(i)); | ||
| 135 | bits_pd &= ~(1 << i); | ||
| 136 | } | ||
| 137 | |||
| 138 | bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1); | ||
| 139 | while (bits_lp) { | ||
| 140 | i = __ffs(bits_pd); | ||
| 141 | it8152_irq(IT8152_LP_IRQ(i)); | ||
| 142 | bits_lp &= ~(1 << i); | ||
| 143 | } | ||
| 144 | |||
| 145 | bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1); | ||
| 146 | while (bits_ld) { | ||
| 147 | i = __ffs(bits_pd); | ||
| 148 | it8152_irq(IT8152_LD_IRQ(i)); | ||
| 149 | bits_ld &= ~(1 << i); | ||
| 150 | } | ||
| 151 | } | ||
| 152 | } | ||
| 153 | |||
| 154 | /* mapping for on-chip devices */ | ||
| 155 | int __init it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
| 156 | { | ||
| 157 | if ((dev->vendor == PCI_VENDOR_ID_ITE) && | ||
| 158 | (dev->device == PCI_DEVICE_ID_ITE_8152)) { | ||
| 159 | if ((dev->class >> 8) == PCI_CLASS_MULTIMEDIA_AUDIO) | ||
| 160 | return IT8152_AUDIO_INT; | ||
| 161 | if ((dev->class >> 8) == PCI_CLASS_SERIAL_USB) | ||
| 162 | return IT8152_USB_INT; | ||
| 163 | if ((dev->class >> 8) == PCI_CLASS_SYSTEM_DMA) | ||
| 164 | return IT8152_CDMA_INT; | ||
| 165 | } | ||
| 166 | |||
| 167 | return 0; | ||
| 168 | } | ||
| 169 | |||
| 170 | static unsigned long it8152_pci_dev_base_address(struct pci_bus *bus, | ||
| 171 | unsigned int devfn) | ||
| 172 | { | ||
| 173 | unsigned long addr = 0; | ||
| 174 | |||
| 175 | if (bus->number == 0) { | ||
| 176 | if (devfn < PCI_DEVFN(MAX_SLOTS, 0)) | ||
| 177 | addr = (devfn << 8); | ||
| 178 | } else | ||
| 179 | addr = (bus->number << 16) | (devfn << 8); | ||
| 180 | |||
| 181 | return addr; | ||
| 182 | } | ||
| 183 | |||
| 184 | static int it8152_pci_read_config(struct pci_bus *bus, | ||
| 185 | unsigned int devfn, int where, | ||
| 186 | int size, u32 *value) | ||
| 187 | { | ||
| 188 | unsigned long addr = it8152_pci_dev_base_address(bus, devfn); | ||
| 189 | u32 v; | ||
| 190 | int shift; | ||
| 191 | |||
| 192 | shift = (where & 3); | ||
| 193 | |||
| 194 | __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); | ||
| 195 | v = (__raw_readl(IT8152_PCI_CFG_DATA) >> (8 * (shift))); | ||
| 196 | |||
| 197 | *value = v; | ||
| 198 | |||
| 199 | return PCIBIOS_SUCCESSFUL; | ||
| 200 | } | ||
| 201 | |||
| 202 | static int it8152_pci_write_config(struct pci_bus *bus, | ||
| 203 | unsigned int devfn, int where, | ||
| 204 | int size, u32 value) | ||
| 205 | { | ||
| 206 | unsigned long addr = it8152_pci_dev_base_address(bus, devfn); | ||
| 207 | u32 v, vtemp, mask = 0; | ||
| 208 | int shift; | ||
| 209 | |||
| 210 | if (size == 1) | ||
| 211 | mask = 0xff; | ||
| 212 | if (size == 2) | ||
| 213 | mask = 0xffff; | ||
| 214 | |||
| 215 | shift = (where & 3); | ||
| 216 | |||
| 217 | __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); | ||
| 218 | vtemp = __raw_readl(IT8152_PCI_CFG_DATA); | ||
| 219 | |||
| 220 | if (mask) | ||
| 221 | vtemp &= ~(mask << (8 * shift)); | ||
| 222 | else | ||
| 223 | vtemp = 0; | ||
| 224 | |||
| 225 | v = (value << (8 * shift)); | ||
| 226 | __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); | ||
| 227 | __raw_writel((v | vtemp), IT8152_PCI_CFG_DATA); | ||
| 228 | |||
| 229 | return PCIBIOS_SUCCESSFUL; | ||
| 230 | } | ||
| 231 | |||
| 232 | static struct pci_ops it8152_ops = { | ||
| 233 | .read = it8152_pci_read_config, | ||
| 234 | .write = it8152_pci_write_config, | ||
| 235 | }; | ||
| 236 | |||
| 237 | static struct resource it8152_io = { | ||
| 238 | .name = "IT8152 PCI I/O region", | ||
| 239 | .flags = IORESOURCE_IO, | ||
| 240 | }; | ||
| 241 | |||
| 242 | static struct resource it8152_mem = { | ||
| 243 | .name = "IT8152 PCI memory region", | ||
| 244 | .start = 0x10000000, | ||
| 245 | .end = 0x13e00000, | ||
| 246 | .flags = IORESOURCE_MEM, | ||
| 247 | }; | ||
| 248 | |||
| 249 | /* | ||
| 250 | * The following functions are needed for DMA bouncing. | ||
| 251 | * ITE8152 chip can addrees up to 64MByte, so all the devices | ||
| 252 | * connected to ITE8152 (PCI and USB) should have limited DMA window | ||
| 253 | */ | ||
| 254 | |||
| 255 | /* | ||
| 256 | * Setup DMA mask to 64MB on devices connected to ITE8152. Ignore all | ||
| 257 | * other devices. | ||
| 258 | */ | ||
| 259 | static int it8152_pci_platform_notify(struct device *dev) | ||
| 260 | { | ||
| 261 | if (dev->bus == &pci_bus_type) { | ||
| 262 | if (dev->dma_mask) | ||
| 263 | *dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET; | ||
| 264 | dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET; | ||
| 265 | dmabounce_register_dev(dev, 2048, 4096); | ||
| 266 | } | ||
| 267 | return 0; | ||
| 268 | } | ||
| 269 | |||
| 270 | static int it8152_pci_platform_notify_remove(struct device *dev) | ||
| 271 | { | ||
| 272 | if (dev->bus == &pci_bus_type) | ||
| 273 | dmabounce_unregister_dev(dev); | ||
| 274 | |||
| 275 | return 0; | ||
| 276 | } | ||
| 277 | |||
| 278 | int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) | ||
| 279 | { | ||
| 280 | dev_dbg(dev, "%s: dma_addr %08x, size %08x\n", | ||
| 281 | __FUNCTION__, dma_addr, size); | ||
| 282 | return (dev->bus == &pci_bus_type) && | ||
| 283 | ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); | ||
| 284 | } | ||
| 285 | |||
| 286 | /* | ||
| 287 | * We override these so we properly do dmabounce otherwise drivers | ||
| 288 | * are able to set the dma_mask to 0xffffffff and we can no longer | ||
| 289 | * trap bounces. :( | ||
| 290 | * | ||
| 291 | * We just return true on everyhing except for < 64MB in which case | ||
| 292 | * we will fail miseralby and die since we can't handle that case. | ||
| 293 | */ | ||
| 294 | int pci_set_dma_mask(struct pci_dev *dev, u64 mask) | ||
| 295 | { | ||
| 296 | printk(KERN_DEBUG "%s: %s %llx\n", | ||
| 297 | __FUNCTION__, dev->dev.bus_id, mask); | ||
| 298 | if (mask >= PHYS_OFFSET + SZ_64M - 1) | ||
| 299 | return 0; | ||
| 300 | |||
| 301 | return -EIO; | ||
| 302 | } | ||
| 303 | |||
| 304 | int | ||
| 305 | pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) | ||
| 306 | { | ||
| 307 | printk(KERN_DEBUG "%s: %s %llx\n", | ||
| 308 | __FUNCTION__, dev->dev.bus_id, mask); | ||
| 309 | if (mask >= PHYS_OFFSET + SZ_64M - 1) | ||
| 310 | return 0; | ||
| 311 | |||
| 312 | return -EIO; | ||
| 313 | } | ||
| 314 | |||
| 315 | int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) | ||
| 316 | { | ||
| 317 | it8152_io.start = IT8152_IO_BASE + 0x12000; | ||
| 318 | it8152_io.end = IT8152_IO_BASE + 0x12000 + 0x100000; | ||
| 319 | |||
| 320 | sys->mem_offset = 0x10000000; | ||
| 321 | sys->io_offset = IT8152_IO_BASE; | ||
| 322 | |||
| 323 | if (request_resource(&ioport_resource, &it8152_io)) { | ||
| 324 | printk(KERN_ERR "PCI: unable to allocate IO region\n"); | ||
| 325 | goto err0; | ||
| 326 | } | ||
| 327 | if (request_resource(&iomem_resource, &it8152_mem)) { | ||
| 328 | printk(KERN_ERR "PCI: unable to allocate memory region\n"); | ||
| 329 | goto err1; | ||
| 330 | } | ||
| 331 | |||
| 332 | sys->resource[0] = &it8152_io; | ||
| 333 | sys->resource[1] = &it8152_mem; | ||
| 334 | |||
| 335 | if (platform_notify || platform_notify_remove) { | ||
| 336 | printk(KERN_ERR "PCI: Can't use platform_notify\n"); | ||
| 337 | goto err2; | ||
| 338 | } | ||
| 339 | |||
| 340 | platform_notify = it8152_pci_platform_notify; | ||
| 341 | platform_notify_remove = it8152_pci_platform_notify_remove; | ||
| 342 | |||
| 343 | return 1; | ||
| 344 | |||
| 345 | err2: | ||
| 346 | release_resource(&it8152_io); | ||
| 347 | err1: | ||
| 348 | release_resource(&it8152_mem); | ||
| 349 | err0: | ||
| 350 | return -EBUSY; | ||
| 351 | } | ||
| 352 | |||
| 353 | /* | ||
| 354 | * If we set up a device for bus mastering, we need to check the latency | ||
| 355 | * timer as we don't have even crappy BIOSes to set it properly. | ||
| 356 | * The implementation is from arch/i386/pci/i386.c | ||
| 357 | */ | ||
| 358 | unsigned int pcibios_max_latency = 255; | ||
| 359 | |||
| 360 | void pcibios_set_master(struct pci_dev *dev) | ||
| 361 | { | ||
| 362 | u8 lat; | ||
| 363 | |||
| 364 | /* no need to update on-chip OHCI controller */ | ||
| 365 | if ((dev->vendor == PCI_VENDOR_ID_ITE) && | ||
| 366 | (dev->device == PCI_DEVICE_ID_ITE_8152) && | ||
| 367 | ((dev->class >> 8) == PCI_CLASS_SERIAL_USB)) | ||
| 368 | return; | ||
| 369 | |||
| 370 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); | ||
| 371 | if (lat < 16) | ||
| 372 | lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; | ||
| 373 | else if (lat > pcibios_max_latency) | ||
| 374 | lat = pcibios_max_latency; | ||
| 375 | else | ||
| 376 | return; | ||
| 377 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", | ||
| 378 | pci_name(dev), lat); | ||
| 379 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | ||
| 380 | } | ||
| 381 | |||
| 382 | |||
| 383 | struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys) | ||
| 384 | { | ||
| 385 | return pci_scan_bus(nr, &it8152_ops, sys); | ||
| 386 | } | ||
| 387 | |||
diff --git a/arch/arm/configs/cm_x270_defconfig b/arch/arm/configs/cm_x270_defconfig new file mode 100644 index 000000000000..5cab08397ae7 --- /dev/null +++ b/arch/arm/configs/cm_x270_defconfig | |||
| @@ -0,0 +1,1410 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.22 | ||
| 4 | # Wed Jul 18 14:11:48 2007 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 22 | CONFIG_GENERIC_HWEIGHT=y | ||
| 23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 24 | CONFIG_ZONE_DMA=y | ||
| 25 | CONFIG_ARCH_MTD_XIP=y | ||
| 26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 28 | |||
| 29 | # | ||
| 30 | # Code maturity level options | ||
| 31 | # | ||
| 32 | CONFIG_EXPERIMENTAL=y | ||
| 33 | CONFIG_BROKEN_ON_SMP=y | ||
| 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 35 | |||
| 36 | # | ||
| 37 | # General setup | ||
| 38 | # | ||
| 39 | CONFIG_LOCALVERSION="" | ||
| 40 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 41 | CONFIG_SWAP=y | ||
| 42 | CONFIG_SYSVIPC=y | ||
| 43 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 44 | # CONFIG_POSIX_MQUEUE is not set | ||
| 45 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 46 | # CONFIG_TASKSTATS is not set | ||
| 47 | # CONFIG_USER_NS is not set | ||
| 48 | # CONFIG_AUDIT is not set | ||
| 49 | CONFIG_IKCONFIG=y | ||
| 50 | CONFIG_IKCONFIG_PROC=y | ||
| 51 | CONFIG_LOG_BUF_SHIFT=17 | ||
| 52 | CONFIG_SYSFS_DEPRECATED=y | ||
| 53 | # CONFIG_RELAY is not set | ||
| 54 | CONFIG_BLK_DEV_INITRD=y | ||
| 55 | CONFIG_INITRAMFS_SOURCE="" | ||
| 56 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 57 | CONFIG_SYSCTL=y | ||
| 58 | CONFIG_EMBEDDED=y | ||
| 59 | CONFIG_UID16=y | ||
| 60 | CONFIG_SYSCTL_SYSCALL=y | ||
| 61 | CONFIG_KALLSYMS=y | ||
| 62 | # CONFIG_KALLSYMS_ALL is not set | ||
| 63 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 64 | CONFIG_HOTPLUG=y | ||
| 65 | CONFIG_PRINTK=y | ||
| 66 | CONFIG_BUG=y | ||
| 67 | CONFIG_ELF_CORE=y | ||
| 68 | CONFIG_BASE_FULL=y | ||
| 69 | CONFIG_FUTEX=y | ||
| 70 | CONFIG_ANON_INODES=y | ||
| 71 | # CONFIG_EPOLL is not set | ||
| 72 | # CONFIG_SIGNALFD is not set | ||
| 73 | # CONFIG_TIMERFD is not set | ||
| 74 | # CONFIG_EVENTFD is not set | ||
| 75 | CONFIG_SHMEM=y | ||
| 76 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 77 | CONFIG_SLAB=y | ||
| 78 | # CONFIG_SLUB is not set | ||
| 79 | # CONFIG_SLOB is not set | ||
| 80 | CONFIG_RT_MUTEXES=y | ||
| 81 | # CONFIG_TINY_SHMEM is not set | ||
| 82 | CONFIG_BASE_SMALL=0 | ||
| 83 | CONFIG_MODULES=y | ||
| 84 | CONFIG_MODULE_UNLOAD=y | ||
| 85 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 86 | # CONFIG_MODVERSIONS is not set | ||
| 87 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 88 | CONFIG_KMOD=y | ||
| 89 | CONFIG_BLOCK=y | ||
| 90 | # CONFIG_LBD is not set | ||
| 91 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 92 | # CONFIG_LSF is not set | ||
| 93 | # CONFIG_BLK_DEV_BSG is not set | ||
| 94 | |||
| 95 | # | ||
| 96 | # IO Schedulers | ||
| 97 | # | ||
| 98 | CONFIG_IOSCHED_NOOP=y | ||
| 99 | CONFIG_IOSCHED_AS=y | ||
| 100 | CONFIG_IOSCHED_DEADLINE=y | ||
| 101 | CONFIG_IOSCHED_CFQ=y | ||
| 102 | CONFIG_DEFAULT_AS=y | ||
| 103 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 104 | # CONFIG_DEFAULT_CFQ is not set | ||
| 105 | # CONFIG_DEFAULT_NOOP is not set | ||
| 106 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 107 | |||
| 108 | # | ||
| 109 | # System Type | ||
| 110 | # | ||
| 111 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 112 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 113 | # CONFIG_ARCH_REALVIEW is not set | ||
| 114 | # CONFIG_ARCH_VERSATILE is not set | ||
| 115 | # CONFIG_ARCH_AT91 is not set | ||
| 116 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 117 | # CONFIG_ARCH_CLPS711X is not set | ||
| 118 | # CONFIG_ARCH_CO285 is not set | ||
| 119 | # CONFIG_ARCH_EBSA110 is not set | ||
| 120 | # CONFIG_ARCH_EP93XX is not set | ||
| 121 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 122 | # CONFIG_ARCH_NETX is not set | ||
| 123 | # CONFIG_ARCH_H720X is not set | ||
| 124 | # CONFIG_ARCH_IMX is not set | ||
| 125 | # CONFIG_ARCH_IOP13XX is not set | ||
| 126 | # CONFIG_ARCH_IOP32X is not set | ||
| 127 | # CONFIG_ARCH_IOP33X is not set | ||
| 128 | # CONFIG_ARCH_IXP23XX is not set | ||
| 129 | # CONFIG_ARCH_IXP2000 is not set | ||
| 130 | # CONFIG_ARCH_IXP4XX is not set | ||
| 131 | # CONFIG_ARCH_L7200 is not set | ||
| 132 | # CONFIG_ARCH_KS8695 is not set | ||
| 133 | # CONFIG_ARCH_NS9XXX is not set | ||
| 134 | # CONFIG_ARCH_PNX4008 is not set | ||
| 135 | CONFIG_ARCH_PXA=y | ||
| 136 | # CONFIG_ARCH_RPC is not set | ||
| 137 | # CONFIG_ARCH_SA1100 is not set | ||
| 138 | # CONFIG_ARCH_S3C2410 is not set | ||
| 139 | # CONFIG_ARCH_SHARK is not set | ||
| 140 | # CONFIG_ARCH_LH7A40X is not set | ||
| 141 | # CONFIG_ARCH_DAVINCI is not set | ||
| 142 | # CONFIG_ARCH_OMAP is not set | ||
| 143 | CONFIG_DMABOUNCE=y | ||
| 144 | |||
| 145 | # | ||
| 146 | # Intel PXA2xx Implementations | ||
| 147 | # | ||
| 148 | # CONFIG_ARCH_LUBBOCK is not set | ||
| 149 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
| 150 | # CONFIG_MACH_MAINSTONE is not set | ||
| 151 | # CONFIG_ARCH_PXA_IDP is not set | ||
| 152 | # CONFIG_PXA_SHARPSL is not set | ||
| 153 | # CONFIG_MACH_TRIZEPS4 is not set | ||
| 154 | CONFIG_MACH_ARMCORE=y | ||
| 155 | CONFIG_PXA27x=y | ||
| 156 | |||
| 157 | # | ||
| 158 | # Processor Type | ||
| 159 | # | ||
| 160 | CONFIG_CPU_32=y | ||
| 161 | CONFIG_CPU_XSCALE=y | ||
| 162 | CONFIG_CPU_32v5=y | ||
| 163 | CONFIG_CPU_ABRT_EV5T=y | ||
| 164 | CONFIG_CPU_CACHE_VIVT=y | ||
| 165 | CONFIG_CPU_TLB_V4WBI=y | ||
| 166 | CONFIG_CPU_CP15=y | ||
| 167 | CONFIG_CPU_CP15_MMU=y | ||
| 168 | |||
| 169 | # | ||
| 170 | # Processor Features | ||
| 171 | # | ||
| 172 | CONFIG_ARM_THUMB=y | ||
| 173 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 174 | # CONFIG_OUTER_CACHE is not set | ||
| 175 | CONFIG_IWMMXT=y | ||
| 176 | CONFIG_XSCALE_PMU=y | ||
| 177 | |||
| 178 | # | ||
| 179 | # Bus support | ||
| 180 | # | ||
| 181 | CONFIG_PCI=y | ||
| 182 | CONFIG_PCI_SYSCALL=y | ||
| 183 | CONFIG_PCI_HOST_ITE8152=y | ||
| 184 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 185 | # CONFIG_PCI_DEBUG is not set | ||
| 186 | |||
| 187 | # | ||
| 188 | # PCCARD (PCMCIA/CardBus) support | ||
| 189 | # | ||
| 190 | # CONFIG_PCCARD is not set | ||
| 191 | |||
| 192 | # | ||
| 193 | # Kernel Features | ||
| 194 | # | ||
| 195 | # CONFIG_TICK_ONESHOT is not set | ||
| 196 | # CONFIG_PREEMPT is not set | ||
| 197 | # CONFIG_NO_IDLE_HZ is not set | ||
| 198 | CONFIG_HZ=100 | ||
| 199 | # CONFIG_AEABI is not set | ||
| 200 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 201 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 202 | CONFIG_FLATMEM_MANUAL=y | ||
| 203 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 204 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 205 | CONFIG_FLATMEM=y | ||
| 206 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 207 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 208 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 209 | # CONFIG_RESOURCES_64BIT is not set | ||
| 210 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 211 | CONFIG_BOUNCE=y | ||
| 212 | CONFIG_VIRT_TO_BUS=y | ||
| 213 | CONFIG_ALIGNMENT_TRAP=y | ||
| 214 | |||
| 215 | # | ||
| 216 | # Boot options | ||
| 217 | # | ||
| 218 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 219 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 220 | CONFIG_CMDLINE="" | ||
| 221 | # CONFIG_XIP_KERNEL is not set | ||
| 222 | # CONFIG_KEXEC is not set | ||
| 223 | |||
| 224 | # | ||
| 225 | # Floating point emulation | ||
| 226 | # | ||
| 227 | |||
| 228 | # | ||
| 229 | # At least one emulation must be selected | ||
| 230 | # | ||
| 231 | CONFIG_FPE_NWFPE=y | ||
| 232 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 233 | # CONFIG_FPE_FASTFPE is not set | ||
| 234 | |||
| 235 | # | ||
| 236 | # Userspace binary formats | ||
| 237 | # | ||
| 238 | CONFIG_BINFMT_ELF=y | ||
| 239 | # CONFIG_BINFMT_AOUT is not set | ||
| 240 | # CONFIG_BINFMT_MISC is not set | ||
| 241 | # CONFIG_ARTHUR is not set | ||
| 242 | |||
| 243 | # | ||
| 244 | # Power management options | ||
| 245 | # | ||
| 246 | CONFIG_PM=y | ||
| 247 | # CONFIG_PM_LEGACY is not set | ||
| 248 | # CONFIG_PM_DEBUG is not set | ||
| 249 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
| 250 | # CONFIG_APM_EMULATION is not set | ||
| 251 | |||
| 252 | # | ||
| 253 | # Networking | ||
| 254 | # | ||
| 255 | CONFIG_NET=y | ||
| 256 | |||
| 257 | # | ||
| 258 | # Networking options | ||
| 259 | # | ||
| 260 | CONFIG_PACKET=y | ||
| 261 | # CONFIG_PACKET_MMAP is not set | ||
| 262 | CONFIG_UNIX=y | ||
| 263 | CONFIG_XFRM=y | ||
| 264 | # CONFIG_XFRM_USER is not set | ||
| 265 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 266 | # CONFIG_XFRM_MIGRATE is not set | ||
| 267 | # CONFIG_NET_KEY is not set | ||
| 268 | CONFIG_INET=y | ||
| 269 | # CONFIG_IP_MULTICAST is not set | ||
| 270 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 271 | CONFIG_IP_FIB_HASH=y | ||
| 272 | CONFIG_IP_PNP=y | ||
| 273 | CONFIG_IP_PNP_DHCP=y | ||
| 274 | CONFIG_IP_PNP_BOOTP=y | ||
| 275 | # CONFIG_IP_PNP_RARP is not set | ||
| 276 | # CONFIG_NET_IPIP is not set | ||
| 277 | # CONFIG_NET_IPGRE is not set | ||
| 278 | # CONFIG_ARPD is not set | ||
| 279 | # CONFIG_SYN_COOKIES is not set | ||
| 280 | # CONFIG_INET_AH is not set | ||
| 281 | # CONFIG_INET_ESP is not set | ||
| 282 | # CONFIG_INET_IPCOMP is not set | ||
| 283 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 284 | # CONFIG_INET_TUNNEL is not set | ||
| 285 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 286 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 287 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 288 | CONFIG_INET_DIAG=y | ||
| 289 | CONFIG_INET_TCP_DIAG=y | ||
| 290 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 291 | CONFIG_TCP_CONG_CUBIC=y | ||
| 292 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 293 | # CONFIG_TCP_MD5SIG is not set | ||
| 294 | # CONFIG_IPV6 is not set | ||
| 295 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 296 | # CONFIG_INET6_TUNNEL is not set | ||
| 297 | # CONFIG_NETWORK_SECMARK is not set | ||
| 298 | # CONFIG_NETFILTER is not set | ||
| 299 | # CONFIG_IP_DCCP is not set | ||
| 300 | # CONFIG_IP_SCTP is not set | ||
| 301 | # CONFIG_TIPC is not set | ||
| 302 | # CONFIG_ATM is not set | ||
| 303 | # CONFIG_BRIDGE is not set | ||
| 304 | # CONFIG_VLAN_8021Q is not set | ||
| 305 | # CONFIG_DECNET is not set | ||
| 306 | # CONFIG_LLC2 is not set | ||
| 307 | # CONFIG_IPX is not set | ||
| 308 | # CONFIG_ATALK is not set | ||
| 309 | # CONFIG_X25 is not set | ||
| 310 | # CONFIG_LAPB is not set | ||
| 311 | # CONFIG_ECONET is not set | ||
| 312 | # CONFIG_WAN_ROUTER is not set | ||
| 313 | |||
| 314 | # | ||
| 315 | # QoS and/or fair queueing | ||
| 316 | # | ||
| 317 | # CONFIG_NET_SCHED is not set | ||
| 318 | |||
| 319 | # | ||
| 320 | # Network testing | ||
| 321 | # | ||
| 322 | # CONFIG_NET_PKTGEN is not set | ||
| 323 | # CONFIG_HAMRADIO is not set | ||
| 324 | # CONFIG_IRDA is not set | ||
| 325 | # CONFIG_BT is not set | ||
| 326 | # CONFIG_AF_RXRPC is not set | ||
| 327 | |||
| 328 | # | ||
| 329 | # Wireless | ||
| 330 | # | ||
| 331 | # CONFIG_CFG80211 is not set | ||
| 332 | CONFIG_WIRELESS_EXT=y | ||
| 333 | # CONFIG_MAC80211 is not set | ||
| 334 | CONFIG_IEEE80211=m | ||
| 335 | # CONFIG_IEEE80211_DEBUG is not set | ||
| 336 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
| 337 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
| 338 | # CONFIG_IEEE80211_CRYPT_TKIP is not set | ||
| 339 | # CONFIG_IEEE80211_SOFTMAC is not set | ||
| 340 | # CONFIG_RFKILL is not set | ||
| 341 | # CONFIG_NET_9P is not set | ||
| 342 | |||
| 343 | # | ||
| 344 | # Device Drivers | ||
| 345 | # | ||
| 346 | |||
| 347 | # | ||
| 348 | # Generic Driver Options | ||
| 349 | # | ||
| 350 | CONFIG_STANDALONE=y | ||
| 351 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 352 | CONFIG_FW_LOADER=y | ||
| 353 | # CONFIG_DEBUG_DRIVER is not set | ||
| 354 | # CONFIG_DEBUG_DEVRES is not set | ||
| 355 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 356 | # CONFIG_CONNECTOR is not set | ||
| 357 | CONFIG_MTD=m | ||
| 358 | # CONFIG_MTD_DEBUG is not set | ||
| 359 | # CONFIG_MTD_CONCAT is not set | ||
| 360 | CONFIG_MTD_PARTITIONS=y | ||
| 361 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 362 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 363 | |||
| 364 | # | ||
| 365 | # User Modules And Translation Layers | ||
| 366 | # | ||
| 367 | CONFIG_MTD_CHAR=m | ||
| 368 | CONFIG_MTD_BLKDEVS=m | ||
| 369 | CONFIG_MTD_BLOCK=m | ||
| 370 | # CONFIG_MTD_BLOCK_RO is not set | ||
| 371 | # CONFIG_FTL is not set | ||
| 372 | # CONFIG_NFTL is not set | ||
| 373 | # CONFIG_INFTL is not set | ||
| 374 | # CONFIG_RFD_FTL is not set | ||
| 375 | # CONFIG_SSFDC is not set | ||
| 376 | |||
| 377 | # | ||
| 378 | # RAM/ROM/Flash chip drivers | ||
| 379 | # | ||
| 380 | # CONFIG_MTD_CFI is not set | ||
| 381 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 382 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 383 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 384 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 385 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 386 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 387 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 388 | CONFIG_MTD_CFI_I1=y | ||
| 389 | CONFIG_MTD_CFI_I2=y | ||
| 390 | # CONFIG_MTD_CFI_I4 is not set | ||
| 391 | # CONFIG_MTD_CFI_I8 is not set | ||
| 392 | # CONFIG_MTD_RAM is not set | ||
| 393 | # CONFIG_MTD_ROM is not set | ||
| 394 | # CONFIG_MTD_ABSENT is not set | ||
| 395 | |||
| 396 | # | ||
| 397 | # Mapping drivers for chip access | ||
| 398 | # | ||
| 399 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 400 | # CONFIG_MTD_SHARP_SL is not set | ||
| 401 | # CONFIG_MTD_PLATRAM is not set | ||
| 402 | |||
| 403 | # | ||
| 404 | # Self-contained MTD device drivers | ||
| 405 | # | ||
| 406 | # CONFIG_MTD_PMC551 is not set | ||
| 407 | # CONFIG_MTD_SLRAM is not set | ||
| 408 | # CONFIG_MTD_PHRAM is not set | ||
| 409 | # CONFIG_MTD_MTDRAM is not set | ||
| 410 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 411 | |||
| 412 | # | ||
| 413 | # Disk-On-Chip Device Drivers | ||
| 414 | # | ||
| 415 | # CONFIG_MTD_DOC2000 is not set | ||
| 416 | # CONFIG_MTD_DOC2001 is not set | ||
| 417 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 418 | CONFIG_MTD_NAND=m | ||
| 419 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 420 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 421 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 422 | # CONFIG_MTD_NAND_H1900 is not set | ||
| 423 | CONFIG_MTD_NAND_IDS=m | ||
| 424 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 425 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
| 426 | # CONFIG_MTD_NAND_CAFE is not set | ||
| 427 | CONFIG_MTD_NAND_CM_X270=m | ||
| 428 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 429 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 430 | # CONFIG_MTD_ONENAND is not set | ||
| 431 | |||
| 432 | # | ||
| 433 | # UBI - Unsorted block images | ||
| 434 | # | ||
| 435 | # CONFIG_MTD_UBI is not set | ||
| 436 | # CONFIG_PARPORT is not set | ||
| 437 | CONFIG_BLK_DEV=y | ||
| 438 | # CONFIG_BLK_CPQ_DA is not set | ||
| 439 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
| 440 | # CONFIG_BLK_DEV_DAC960 is not set | ||
| 441 | # CONFIG_BLK_DEV_UMEM is not set | ||
| 442 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 443 | CONFIG_BLK_DEV_LOOP=y | ||
| 444 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 445 | # CONFIG_BLK_DEV_NBD is not set | ||
| 446 | # CONFIG_BLK_DEV_SX8 is not set | ||
| 447 | # CONFIG_BLK_DEV_UB is not set | ||
| 448 | CONFIG_BLK_DEV_RAM=y | ||
| 449 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 450 | CONFIG_BLK_DEV_RAM_SIZE=12000 | ||
| 451 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
| 452 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 453 | # CONFIG_ATA_OVER_ETH is not set | ||
| 454 | CONFIG_IDE=m | ||
| 455 | CONFIG_IDE_MAX_HWIFS=4 | ||
| 456 | CONFIG_BLK_DEV_IDE=m | ||
| 457 | |||
| 458 | # | ||
| 459 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
| 460 | # | ||
| 461 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
| 462 | CONFIG_BLK_DEV_IDEDISK=m | ||
| 463 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
| 464 | CONFIG_BLK_DEV_IDECD=m | ||
| 465 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
| 466 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
| 467 | # CONFIG_BLK_DEV_IDESCSI is not set | ||
| 468 | # CONFIG_IDE_TASK_IOCTL is not set | ||
| 469 | CONFIG_IDE_PROC_FS=y | ||
| 470 | |||
| 471 | # | ||
| 472 | # IDE chipset support/bugfixes | ||
| 473 | # | ||
| 474 | # CONFIG_IDE_GENERIC is not set | ||
| 475 | # CONFIG_BLK_DEV_IDEPCI is not set | ||
| 476 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
| 477 | # CONFIG_IDE_ARM is not set | ||
| 478 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
| 479 | # CONFIG_BLK_DEV_HD is not set | ||
| 480 | |||
| 481 | # | ||
| 482 | # SCSI device support | ||
| 483 | # | ||
| 484 | # CONFIG_RAID_ATTRS is not set | ||
| 485 | CONFIG_SCSI=y | ||
| 486 | CONFIG_SCSI_DMA=y | ||
| 487 | # CONFIG_SCSI_TGT is not set | ||
| 488 | # CONFIG_SCSI_NETLINK is not set | ||
| 489 | # CONFIG_SCSI_PROC_FS is not set | ||
| 490 | |||
| 491 | # | ||
| 492 | # SCSI support type (disk, tape, CD-ROM) | ||
| 493 | # | ||
| 494 | CONFIG_BLK_DEV_SD=y | ||
| 495 | # CONFIG_CHR_DEV_ST is not set | ||
| 496 | # CONFIG_CHR_DEV_OSST is not set | ||
| 497 | # CONFIG_BLK_DEV_SR is not set | ||
| 498 | # CONFIG_CHR_DEV_SG is not set | ||
| 499 | # CONFIG_CHR_DEV_SCH is not set | ||
| 500 | |||
| 501 | # | ||
| 502 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 503 | # | ||
| 504 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 505 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 506 | # CONFIG_SCSI_LOGGING is not set | ||
| 507 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 508 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 509 | |||
| 510 | # | ||
| 511 | # SCSI Transports | ||
| 512 | # | ||
| 513 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 514 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 515 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 516 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 517 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # SCSI low-level drivers | ||
| 521 | # | ||
| 522 | # CONFIG_ISCSI_TCP is not set | ||
| 523 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
| 524 | # CONFIG_SCSI_3W_9XXX is not set | ||
| 525 | # CONFIG_SCSI_ACARD is not set | ||
| 526 | # CONFIG_SCSI_AACRAID is not set | ||
| 527 | # CONFIG_SCSI_AIC7XXX is not set | ||
| 528 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
| 529 | # CONFIG_SCSI_AIC79XX is not set | ||
| 530 | # CONFIG_SCSI_AIC94XX is not set | ||
| 531 | # CONFIG_SCSI_DPT_I2O is not set | ||
| 532 | # CONFIG_SCSI_ARCMSR is not set | ||
| 533 | # CONFIG_MEGARAID_NEWGEN is not set | ||
| 534 | # CONFIG_MEGARAID_LEGACY is not set | ||
| 535 | # CONFIG_MEGARAID_SAS is not set | ||
| 536 | # CONFIG_SCSI_HPTIOP is not set | ||
| 537 | # CONFIG_SCSI_DMX3191D is not set | ||
| 538 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
| 539 | # CONFIG_SCSI_IPS is not set | ||
| 540 | # CONFIG_SCSI_INITIO is not set | ||
| 541 | # CONFIG_SCSI_INIA100 is not set | ||
| 542 | # CONFIG_SCSI_STEX is not set | ||
| 543 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
| 544 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
| 545 | # CONFIG_SCSI_QLA_FC is not set | ||
| 546 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
| 547 | # CONFIG_SCSI_LPFC is not set | ||
| 548 | # CONFIG_SCSI_DC395x is not set | ||
| 549 | # CONFIG_SCSI_DC390T is not set | ||
| 550 | # CONFIG_SCSI_NSP32 is not set | ||
| 551 | # CONFIG_SCSI_DEBUG is not set | ||
| 552 | # CONFIG_SCSI_SRP is not set | ||
| 553 | # CONFIG_ATA is not set | ||
| 554 | # CONFIG_MD is not set | ||
| 555 | |||
| 556 | # | ||
| 557 | # Fusion MPT device support | ||
| 558 | # | ||
| 559 | # CONFIG_FUSION is not set | ||
| 560 | # CONFIG_FUSION_SPI is not set | ||
| 561 | # CONFIG_FUSION_FC is not set | ||
| 562 | # CONFIG_FUSION_SAS is not set | ||
| 563 | |||
| 564 | # | ||
| 565 | # IEEE 1394 (FireWire) support | ||
| 566 | # | ||
| 567 | # CONFIG_FIREWIRE is not set | ||
| 568 | # CONFIG_IEEE1394 is not set | ||
| 569 | # CONFIG_I2O is not set | ||
| 570 | CONFIG_NETDEVICES=y | ||
| 571 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 572 | # CONFIG_DUMMY is not set | ||
| 573 | # CONFIG_BONDING is not set | ||
| 574 | # CONFIG_MACVLAN is not set | ||
| 575 | # CONFIG_EQUALIZER is not set | ||
| 576 | # CONFIG_TUN is not set | ||
| 577 | # CONFIG_ARCNET is not set | ||
| 578 | # CONFIG_PHYLIB is not set | ||
| 579 | CONFIG_NET_ETHERNET=y | ||
| 580 | CONFIG_MII=y | ||
| 581 | # CONFIG_AX88796 is not set | ||
| 582 | # CONFIG_HAPPYMEAL is not set | ||
| 583 | # CONFIG_SUNGEM is not set | ||
| 584 | # CONFIG_CASSINI is not set | ||
| 585 | # CONFIG_NET_VENDOR_3COM is not set | ||
| 586 | # CONFIG_SMC91X is not set | ||
| 587 | CONFIG_DM9000=y | ||
| 588 | # CONFIG_SMC911X is not set | ||
| 589 | # CONFIG_NET_TULIP is not set | ||
| 590 | # CONFIG_HP100 is not set | ||
| 591 | CONFIG_NET_PCI=y | ||
| 592 | # CONFIG_PCNET32 is not set | ||
| 593 | # CONFIG_AMD8111_ETH is not set | ||
| 594 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
| 595 | # CONFIG_B44 is not set | ||
| 596 | # CONFIG_FORCEDETH is not set | ||
| 597 | # CONFIG_DGRS is not set | ||
| 598 | # CONFIG_EEPRO100 is not set | ||
| 599 | # CONFIG_E100 is not set | ||
| 600 | # CONFIG_FEALNX is not set | ||
| 601 | # CONFIG_NATSEMI is not set | ||
| 602 | # CONFIG_NE2K_PCI is not set | ||
| 603 | # CONFIG_8139CP is not set | ||
| 604 | CONFIG_8139TOO=m | ||
| 605 | # CONFIG_8139TOO_PIO is not set | ||
| 606 | # CONFIG_8139TOO_TUNE_TWISTER is not set | ||
| 607 | # CONFIG_8139TOO_8129 is not set | ||
| 608 | # CONFIG_8139_OLD_RX_RESET is not set | ||
| 609 | # CONFIG_SIS900 is not set | ||
| 610 | # CONFIG_EPIC100 is not set | ||
| 611 | # CONFIG_SUNDANCE is not set | ||
| 612 | # CONFIG_TLAN is not set | ||
| 613 | # CONFIG_VIA_RHINE is not set | ||
| 614 | # CONFIG_SC92031 is not set | ||
| 615 | CONFIG_NETDEV_1000=y | ||
| 616 | # CONFIG_ACENIC is not set | ||
| 617 | # CONFIG_DL2K is not set | ||
| 618 | # CONFIG_E1000 is not set | ||
| 619 | # CONFIG_NS83820 is not set | ||
| 620 | # CONFIG_HAMACHI is not set | ||
| 621 | # CONFIG_YELLOWFIN is not set | ||
| 622 | # CONFIG_R8169 is not set | ||
| 623 | # CONFIG_SIS190 is not set | ||
| 624 | # CONFIG_SKGE is not set | ||
| 625 | # CONFIG_SKY2 is not set | ||
| 626 | # CONFIG_VIA_VELOCITY is not set | ||
| 627 | # CONFIG_TIGON3 is not set | ||
| 628 | # CONFIG_BNX2 is not set | ||
| 629 | # CONFIG_QLA3XXX is not set | ||
| 630 | # CONFIG_ATL1 is not set | ||
| 631 | CONFIG_NETDEV_10000=y | ||
| 632 | # CONFIG_CHELSIO_T1 is not set | ||
| 633 | # CONFIG_CHELSIO_T3 is not set | ||
| 634 | # CONFIG_IXGB is not set | ||
| 635 | # CONFIG_S2IO is not set | ||
| 636 | # CONFIG_MYRI10GE is not set | ||
| 637 | # CONFIG_NETXEN_NIC is not set | ||
| 638 | # CONFIG_MLX4_CORE is not set | ||
| 639 | # CONFIG_TR is not set | ||
| 640 | |||
| 641 | # | ||
| 642 | # Wireless LAN | ||
| 643 | # | ||
| 644 | # CONFIG_WLAN_PRE80211 is not set | ||
| 645 | # CONFIG_WLAN_80211 is not set | ||
| 646 | |||
| 647 | # | ||
| 648 | # USB Network Adapters | ||
| 649 | # | ||
| 650 | # CONFIG_USB_CATC is not set | ||
| 651 | # CONFIG_USB_KAWETH is not set | ||
| 652 | # CONFIG_USB_PEGASUS is not set | ||
| 653 | # CONFIG_USB_RTL8150 is not set | ||
| 654 | # CONFIG_USB_USBNET_MII is not set | ||
| 655 | # CONFIG_USB_USBNET is not set | ||
| 656 | # CONFIG_WAN is not set | ||
| 657 | # CONFIG_FDDI is not set | ||
| 658 | # CONFIG_HIPPI is not set | ||
| 659 | # CONFIG_PPP is not set | ||
| 660 | # CONFIG_SLIP is not set | ||
| 661 | # CONFIG_NET_FC is not set | ||
| 662 | # CONFIG_SHAPER is not set | ||
| 663 | # CONFIG_NETCONSOLE is not set | ||
| 664 | # CONFIG_NETPOLL is not set | ||
| 665 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 666 | # CONFIG_ISDN is not set | ||
| 667 | |||
| 668 | # | ||
| 669 | # Input device support | ||
| 670 | # | ||
| 671 | CONFIG_INPUT=y | ||
| 672 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 673 | # CONFIG_INPUT_POLLDEV is not set | ||
| 674 | |||
| 675 | # | ||
| 676 | # Userland interfaces | ||
| 677 | # | ||
| 678 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 679 | # CONFIG_INPUT_JOYDEV is not set | ||
| 680 | # CONFIG_INPUT_TSDEV is not set | ||
| 681 | CONFIG_INPUT_EVDEV=y | ||
| 682 | # CONFIG_INPUT_EVBUG is not set | ||
| 683 | |||
| 684 | # | ||
| 685 | # Input Device Drivers | ||
| 686 | # | ||
| 687 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 688 | # CONFIG_INPUT_MOUSE is not set | ||
| 689 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 690 | # CONFIG_INPUT_TABLET is not set | ||
| 691 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 692 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 693 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 694 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 695 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 696 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 697 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 698 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 699 | CONFIG_TOUCHSCREEN_UCB1400=m | ||
| 700 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 701 | # CONFIG_INPUT_MISC is not set | ||
| 702 | |||
| 703 | # | ||
| 704 | # Hardware I/O ports | ||
| 705 | # | ||
| 706 | # CONFIG_SERIO is not set | ||
| 707 | # CONFIG_GAMEPORT is not set | ||
| 708 | |||
| 709 | # | ||
| 710 | # Character devices | ||
| 711 | # | ||
| 712 | CONFIG_VT=y | ||
| 713 | CONFIG_VT_CONSOLE=y | ||
| 714 | CONFIG_HW_CONSOLE=y | ||
| 715 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 716 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 717 | |||
| 718 | # | ||
| 719 | # Serial drivers | ||
| 720 | # | ||
| 721 | # CONFIG_SERIAL_8250 is not set | ||
| 722 | |||
| 723 | # | ||
| 724 | # Non-8250 serial port support | ||
| 725 | # | ||
| 726 | CONFIG_SERIAL_PXA=y | ||
| 727 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
| 728 | CONFIG_SERIAL_CORE=y | ||
| 729 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 730 | # CONFIG_SERIAL_JSM is not set | ||
| 731 | CONFIG_UNIX98_PTYS=y | ||
| 732 | CONFIG_LEGACY_PTYS=y | ||
| 733 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 734 | # CONFIG_IPMI_HANDLER is not set | ||
| 735 | # CONFIG_WATCHDOG is not set | ||
| 736 | CONFIG_HW_RANDOM=m | ||
| 737 | # CONFIG_NVRAM is not set | ||
| 738 | # CONFIG_R3964 is not set | ||
| 739 | # CONFIG_APPLICOM is not set | ||
| 740 | # CONFIG_DRM is not set | ||
| 741 | # CONFIG_RAW_DRIVER is not set | ||
| 742 | # CONFIG_TCG_TPM is not set | ||
| 743 | CONFIG_DEVPORT=y | ||
| 744 | # CONFIG_I2C is not set | ||
| 745 | |||
| 746 | # | ||
| 747 | # SPI support | ||
| 748 | # | ||
| 749 | # CONFIG_SPI is not set | ||
| 750 | # CONFIG_SPI_MASTER is not set | ||
| 751 | # CONFIG_W1 is not set | ||
| 752 | # CONFIG_HWMON is not set | ||
| 753 | CONFIG_MISC_DEVICES=y | ||
| 754 | # CONFIG_PHANTOM is not set | ||
| 755 | # CONFIG_EEPROM_93CX6 is not set | ||
| 756 | # CONFIG_SGI_IOC4 is not set | ||
| 757 | # CONFIG_TIFM_CORE is not set | ||
| 758 | |||
| 759 | # | ||
| 760 | # Multifunction device drivers | ||
| 761 | # | ||
| 762 | # CONFIG_MFD_SM501 is not set | ||
| 763 | |||
| 764 | # | ||
| 765 | # LED devices | ||
| 766 | # | ||
| 767 | CONFIG_NEW_LEDS=y | ||
| 768 | CONFIG_LEDS_CLASS=y | ||
| 769 | |||
| 770 | # | ||
| 771 | # LED drivers | ||
| 772 | # | ||
| 773 | CONFIG_LEDS_CM_X270=y | ||
| 774 | |||
| 775 | # | ||
| 776 | # LED Triggers | ||
| 777 | # | ||
| 778 | CONFIG_LEDS_TRIGGERS=y | ||
| 779 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
| 780 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | ||
| 781 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 782 | |||
| 783 | # | ||
| 784 | # Multimedia devices | ||
| 785 | # | ||
| 786 | # CONFIG_VIDEO_DEV is not set | ||
| 787 | # CONFIG_DVB_CORE is not set | ||
| 788 | CONFIG_DAB=y | ||
| 789 | # CONFIG_USB_DABUSB is not set | ||
| 790 | |||
| 791 | # | ||
| 792 | # Graphics support | ||
| 793 | # | ||
| 794 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 795 | |||
| 796 | # | ||
| 797 | # Display device support | ||
| 798 | # | ||
| 799 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 800 | # CONFIG_VGASTATE is not set | ||
| 801 | CONFIG_FB=y | ||
| 802 | # CONFIG_FIRMWARE_EDID is not set | ||
| 803 | # CONFIG_FB_DDC is not set | ||
| 804 | CONFIG_FB_CFB_FILLRECT=y | ||
| 805 | CONFIG_FB_CFB_COPYAREA=y | ||
| 806 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 807 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 808 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 809 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 810 | # CONFIG_FB_SYS_FOPS is not set | ||
| 811 | CONFIG_FB_DEFERRED_IO=y | ||
| 812 | # CONFIG_FB_SVGALIB is not set | ||
| 813 | # CONFIG_FB_MACMODES is not set | ||
| 814 | # CONFIG_FB_BACKLIGHT is not set | ||
| 815 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 816 | # CONFIG_FB_TILEBLITTING is not set | ||
| 817 | |||
| 818 | # | ||
| 819 | # Frame buffer hardware drivers | ||
| 820 | # | ||
| 821 | # CONFIG_FB_CIRRUS is not set | ||
| 822 | # CONFIG_FB_PM2 is not set | ||
| 823 | # CONFIG_FB_CYBER2000 is not set | ||
| 824 | # CONFIG_FB_ASILIANT is not set | ||
| 825 | # CONFIG_FB_IMSTT is not set | ||
| 826 | # CONFIG_FB_S1D13XXX is not set | ||
| 827 | # CONFIG_FB_NVIDIA is not set | ||
| 828 | # CONFIG_FB_RIVA is not set | ||
| 829 | # CONFIG_FB_MATROX is not set | ||
| 830 | # CONFIG_FB_RADEON is not set | ||
| 831 | # CONFIG_FB_ATY128 is not set | ||
| 832 | # CONFIG_FB_ATY is not set | ||
| 833 | # CONFIG_FB_S3 is not set | ||
| 834 | # CONFIG_FB_SAVAGE is not set | ||
| 835 | # CONFIG_FB_SIS is not set | ||
| 836 | # CONFIG_FB_NEOMAGIC is not set | ||
| 837 | # CONFIG_FB_KYRO is not set | ||
| 838 | # CONFIG_FB_3DFX is not set | ||
| 839 | # CONFIG_FB_VOODOO1 is not set | ||
| 840 | # CONFIG_FB_VT8623 is not set | ||
| 841 | # CONFIG_FB_TRIDENT is not set | ||
| 842 | # CONFIG_FB_ARK is not set | ||
| 843 | # CONFIG_FB_PM3 is not set | ||
| 844 | CONFIG_FB_PXA=y | ||
| 845 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
| 846 | CONFIG_FB_MBX=m | ||
| 847 | # CONFIG_FB_VIRTUAL is not set | ||
| 848 | |||
| 849 | # | ||
| 850 | # Console display driver support | ||
| 851 | # | ||
| 852 | # CONFIG_VGA_CONSOLE is not set | ||
| 853 | CONFIG_DUMMY_CONSOLE=y | ||
| 854 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 855 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 856 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 857 | # CONFIG_FONTS is not set | ||
| 858 | CONFIG_FONT_8x8=y | ||
| 859 | CONFIG_FONT_8x16=y | ||
| 860 | CONFIG_LOGO=y | ||
| 861 | CONFIG_LOGO_LINUX_MONO=y | ||
| 862 | CONFIG_LOGO_LINUX_VGA16=y | ||
| 863 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 864 | |||
| 865 | # | ||
| 866 | # Sound | ||
| 867 | # | ||
| 868 | CONFIG_SOUND=m | ||
| 869 | |||
| 870 | # | ||
| 871 | # Advanced Linux Sound Architecture | ||
| 872 | # | ||
| 873 | CONFIG_SND=m | ||
| 874 | CONFIG_SND_TIMER=m | ||
| 875 | CONFIG_SND_PCM=m | ||
| 876 | # CONFIG_SND_SEQUENCER is not set | ||
| 877 | CONFIG_SND_OSSEMUL=y | ||
| 878 | CONFIG_SND_MIXER_OSS=m | ||
| 879 | CONFIG_SND_PCM_OSS=m | ||
| 880 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 881 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 882 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 883 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 884 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 885 | # CONFIG_SND_DEBUG is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # Generic devices | ||
| 889 | # | ||
| 890 | CONFIG_SND_AC97_CODEC=m | ||
| 891 | # CONFIG_SND_DUMMY is not set | ||
| 892 | # CONFIG_SND_MTPAV is not set | ||
| 893 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 894 | # CONFIG_SND_MPU401 is not set | ||
| 895 | |||
| 896 | # | ||
| 897 | # PCI devices | ||
| 898 | # | ||
| 899 | # CONFIG_SND_AD1889 is not set | ||
| 900 | # CONFIG_SND_ALS300 is not set | ||
| 901 | # CONFIG_SND_ALI5451 is not set | ||
| 902 | # CONFIG_SND_ATIIXP is not set | ||
| 903 | # CONFIG_SND_ATIIXP_MODEM is not set | ||
| 904 | # CONFIG_SND_AU8810 is not set | ||
| 905 | # CONFIG_SND_AU8820 is not set | ||
| 906 | # CONFIG_SND_AU8830 is not set | ||
| 907 | # CONFIG_SND_AZT3328 is not set | ||
| 908 | # CONFIG_SND_BT87X is not set | ||
| 909 | # CONFIG_SND_CA0106 is not set | ||
| 910 | # CONFIG_SND_CMIPCI is not set | ||
| 911 | # CONFIG_SND_CS4281 is not set | ||
| 912 | # CONFIG_SND_CS46XX is not set | ||
| 913 | # CONFIG_SND_DARLA20 is not set | ||
| 914 | # CONFIG_SND_GINA20 is not set | ||
| 915 | # CONFIG_SND_LAYLA20 is not set | ||
| 916 | # CONFIG_SND_DARLA24 is not set | ||
| 917 | # CONFIG_SND_GINA24 is not set | ||
| 918 | # CONFIG_SND_LAYLA24 is not set | ||
| 919 | # CONFIG_SND_MONA is not set | ||
| 920 | # CONFIG_SND_MIA is not set | ||
| 921 | # CONFIG_SND_ECHO3G is not set | ||
| 922 | # CONFIG_SND_INDIGO is not set | ||
| 923 | # CONFIG_SND_INDIGOIO is not set | ||
| 924 | # CONFIG_SND_INDIGODJ is not set | ||
| 925 | # CONFIG_SND_EMU10K1 is not set | ||
| 926 | # CONFIG_SND_EMU10K1X is not set | ||
| 927 | # CONFIG_SND_ENS1370 is not set | ||
| 928 | # CONFIG_SND_ENS1371 is not set | ||
| 929 | # CONFIG_SND_ES1938 is not set | ||
| 930 | # CONFIG_SND_ES1968 is not set | ||
| 931 | # CONFIG_SND_FM801 is not set | ||
| 932 | # CONFIG_SND_HDA_INTEL is not set | ||
| 933 | # CONFIG_SND_HDSP is not set | ||
| 934 | # CONFIG_SND_HDSPM is not set | ||
| 935 | # CONFIG_SND_ICE1712 is not set | ||
| 936 | # CONFIG_SND_ICE1724 is not set | ||
| 937 | # CONFIG_SND_INTEL8X0 is not set | ||
| 938 | # CONFIG_SND_INTEL8X0M is not set | ||
| 939 | # CONFIG_SND_KORG1212 is not set | ||
| 940 | # CONFIG_SND_MAESTRO3 is not set | ||
| 941 | # CONFIG_SND_MIXART is not set | ||
| 942 | # CONFIG_SND_NM256 is not set | ||
| 943 | # CONFIG_SND_PCXHR is not set | ||
| 944 | # CONFIG_SND_RIPTIDE is not set | ||
| 945 | # CONFIG_SND_RME32 is not set | ||
| 946 | # CONFIG_SND_RME96 is not set | ||
| 947 | # CONFIG_SND_RME9652 is not set | ||
| 948 | # CONFIG_SND_SONICVIBES is not set | ||
| 949 | # CONFIG_SND_TRIDENT is not set | ||
| 950 | # CONFIG_SND_VIA82XX is not set | ||
| 951 | # CONFIG_SND_VIA82XX_MODEM is not set | ||
| 952 | # CONFIG_SND_VX222 is not set | ||
| 953 | # CONFIG_SND_YMFPCI is not set | ||
| 954 | # CONFIG_SND_AC97_POWER_SAVE is not set | ||
| 955 | |||
| 956 | # | ||
| 957 | # ALSA ARM devices | ||
| 958 | # | ||
| 959 | CONFIG_SND_PXA2XX_PCM=m | ||
| 960 | CONFIG_SND_PXA2XX_AC97=m | ||
| 961 | |||
| 962 | # | ||
| 963 | # USB devices | ||
| 964 | # | ||
| 965 | # CONFIG_SND_USB_AUDIO is not set | ||
| 966 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 967 | |||
| 968 | # | ||
| 969 | # System on Chip audio support | ||
| 970 | # | ||
| 971 | # CONFIG_SND_SOC is not set | ||
| 972 | |||
| 973 | # | ||
| 974 | # Open Sound System | ||
| 975 | # | ||
| 976 | # CONFIG_SOUND_PRIME is not set | ||
| 977 | CONFIG_AC97_BUS=m | ||
| 978 | CONFIG_HID_SUPPORT=y | ||
| 979 | CONFIG_HID=y | ||
| 980 | # CONFIG_HID_DEBUG is not set | ||
| 981 | |||
| 982 | # | ||
| 983 | # USB Input Devices | ||
| 984 | # | ||
| 985 | CONFIG_USB_HID=y | ||
| 986 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
| 987 | # CONFIG_HID_FF is not set | ||
| 988 | # CONFIG_USB_HIDDEV is not set | ||
| 989 | CONFIG_USB_SUPPORT=y | ||
| 990 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 991 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 992 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 993 | CONFIG_USB=y | ||
| 994 | # CONFIG_USB_DEBUG is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # Miscellaneous USB options | ||
| 998 | # | ||
| 999 | CONFIG_USB_DEVICEFS=y | ||
| 1000 | # CONFIG_USB_DEVICE_CLASS is not set | ||
| 1001 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1002 | # CONFIG_USB_SUSPEND is not set | ||
| 1003 | # CONFIG_USB_PERSIST is not set | ||
| 1004 | # CONFIG_USB_OTG is not set | ||
| 1005 | |||
| 1006 | # | ||
| 1007 | # USB Host Controller Drivers | ||
| 1008 | # | ||
| 1009 | # CONFIG_USB_EHCI_HCD is not set | ||
| 1010 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1011 | CONFIG_USB_OHCI_HCD=y | ||
| 1012 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 1013 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 1014 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 1015 | # CONFIG_USB_UHCI_HCD is not set | ||
| 1016 | # CONFIG_USB_SL811_HCD is not set | ||
| 1017 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1018 | |||
| 1019 | # | ||
| 1020 | # USB Device Class drivers | ||
| 1021 | # | ||
| 1022 | # CONFIG_USB_ACM is not set | ||
| 1023 | # CONFIG_USB_PRINTER is not set | ||
| 1024 | |||
| 1025 | # | ||
| 1026 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 1027 | # | ||
| 1028 | |||
| 1029 | # | ||
| 1030 | # may also be needed; see USB_STORAGE Help for more information | ||
| 1031 | # | ||
| 1032 | CONFIG_USB_STORAGE=y | ||
| 1033 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1034 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1035 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1036 | # CONFIG_USB_STORAGE_DPCM is not set | ||
| 1037 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1038 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1039 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1040 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1041 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1042 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1043 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1044 | |||
| 1045 | # | ||
| 1046 | # USB Imaging devices | ||
| 1047 | # | ||
| 1048 | # CONFIG_USB_MDC800 is not set | ||
| 1049 | # CONFIG_USB_MICROTEK is not set | ||
| 1050 | CONFIG_USB_MON=y | ||
| 1051 | |||
| 1052 | # | ||
| 1053 | # USB port drivers | ||
| 1054 | # | ||
| 1055 | |||
| 1056 | # | ||
| 1057 | # USB Serial Converter support | ||
| 1058 | # | ||
| 1059 | # CONFIG_USB_SERIAL is not set | ||
| 1060 | |||
| 1061 | # | ||
| 1062 | # USB Miscellaneous drivers | ||
| 1063 | # | ||
| 1064 | # CONFIG_USB_EMI62 is not set | ||
| 1065 | # CONFIG_USB_EMI26 is not set | ||
| 1066 | # CONFIG_USB_ADUTUX is not set | ||
| 1067 | # CONFIG_USB_AUERSWALD is not set | ||
| 1068 | # CONFIG_USB_RIO500 is not set | ||
| 1069 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1070 | # CONFIG_USB_LCD is not set | ||
| 1071 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1072 | # CONFIG_USB_LED is not set | ||
| 1073 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1074 | # CONFIG_USB_CYTHERM is not set | ||
| 1075 | # CONFIG_USB_PHIDGET is not set | ||
| 1076 | # CONFIG_USB_IDMOUSE is not set | ||
| 1077 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1078 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1079 | # CONFIG_USB_LD is not set | ||
| 1080 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1081 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1082 | # CONFIG_USB_TEST is not set | ||
| 1083 | |||
| 1084 | # | ||
| 1085 | # USB DSL modem support | ||
| 1086 | # | ||
| 1087 | |||
| 1088 | # | ||
| 1089 | # USB Gadget Support | ||
| 1090 | # | ||
| 1091 | # CONFIG_USB_GADGET is not set | ||
| 1092 | CONFIG_MMC=m | ||
| 1093 | # CONFIG_MMC_DEBUG is not set | ||
| 1094 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1095 | |||
| 1096 | # | ||
| 1097 | # MMC/SD Card Drivers | ||
| 1098 | # | ||
| 1099 | CONFIG_MMC_BLOCK=m | ||
| 1100 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1101 | |||
| 1102 | # | ||
| 1103 | # MMC/SD Host Controller Drivers | ||
| 1104 | # | ||
| 1105 | CONFIG_MMC_PXA=m | ||
| 1106 | # CONFIG_MMC_SDHCI is not set | ||
| 1107 | # CONFIG_MMC_TIFM_SD is not set | ||
| 1108 | |||
| 1109 | # | ||
| 1110 | # Real Time Clock | ||
| 1111 | # | ||
| 1112 | CONFIG_RTC_LIB=y | ||
| 1113 | CONFIG_RTC_CLASS=y | ||
| 1114 | CONFIG_RTC_HCTOSYS=y | ||
| 1115 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1116 | # CONFIG_RTC_DEBUG is not set | ||
| 1117 | |||
| 1118 | # | ||
| 1119 | # RTC interfaces | ||
| 1120 | # | ||
| 1121 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1122 | CONFIG_RTC_INTF_PROC=y | ||
| 1123 | CONFIG_RTC_INTF_DEV=y | ||
| 1124 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1125 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1126 | |||
| 1127 | # | ||
| 1128 | # Platform RTC drivers | ||
| 1129 | # | ||
| 1130 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1131 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1132 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1133 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1134 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1135 | CONFIG_RTC_DRV_V3020=y | ||
| 1136 | |||
| 1137 | # | ||
| 1138 | # on-CPU RTC drivers | ||
| 1139 | # | ||
| 1140 | CONFIG_RTC_DRV_SA1100=y | ||
| 1141 | |||
| 1142 | # | ||
| 1143 | # DMA Engine support | ||
| 1144 | # | ||
| 1145 | # CONFIG_DMA_ENGINE is not set | ||
| 1146 | |||
| 1147 | # | ||
| 1148 | # DMA Clients | ||
| 1149 | # | ||
| 1150 | |||
| 1151 | # | ||
| 1152 | # DMA Devices | ||
| 1153 | # | ||
| 1154 | |||
| 1155 | # | ||
| 1156 | # File systems | ||
| 1157 | # | ||
| 1158 | CONFIG_EXT2_FS=y | ||
| 1159 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 1160 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1161 | CONFIG_EXT3_FS=y | ||
| 1162 | CONFIG_EXT3_FS_XATTR=y | ||
| 1163 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 1164 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 1165 | # CONFIG_EXT4DEV_FS is not set | ||
| 1166 | CONFIG_JBD=y | ||
| 1167 | # CONFIG_JBD_DEBUG is not set | ||
| 1168 | CONFIG_FS_MBCACHE=y | ||
| 1169 | # CONFIG_REISERFS_FS is not set | ||
| 1170 | # CONFIG_JFS_FS is not set | ||
| 1171 | # CONFIG_FS_POSIX_ACL is not set | ||
| 1172 | # CONFIG_XFS_FS is not set | ||
| 1173 | # CONFIG_GFS2_FS is not set | ||
| 1174 | # CONFIG_OCFS2_FS is not set | ||
| 1175 | # CONFIG_MINIX_FS is not set | ||
| 1176 | # CONFIG_ROMFS_FS is not set | ||
| 1177 | CONFIG_INOTIFY=y | ||
| 1178 | CONFIG_INOTIFY_USER=y | ||
| 1179 | # CONFIG_QUOTA is not set | ||
| 1180 | CONFIG_DNOTIFY=y | ||
| 1181 | # CONFIG_AUTOFS_FS is not set | ||
| 1182 | # CONFIG_AUTOFS4_FS is not set | ||
| 1183 | # CONFIG_FUSE_FS is not set | ||
| 1184 | |||
| 1185 | # | ||
| 1186 | # CD-ROM/DVD Filesystems | ||
| 1187 | # | ||
| 1188 | # CONFIG_ISO9660_FS is not set | ||
| 1189 | # CONFIG_UDF_FS is not set | ||
| 1190 | |||
| 1191 | # | ||
| 1192 | # DOS/FAT/NT Filesystems | ||
| 1193 | # | ||
| 1194 | CONFIG_FAT_FS=y | ||
| 1195 | CONFIG_MSDOS_FS=y | ||
| 1196 | CONFIG_VFAT_FS=y | ||
| 1197 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1198 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1199 | # CONFIG_NTFS_FS is not set | ||
| 1200 | |||
| 1201 | # | ||
| 1202 | # Pseudo filesystems | ||
| 1203 | # | ||
| 1204 | CONFIG_PROC_FS=y | ||
| 1205 | CONFIG_PROC_SYSCTL=y | ||
| 1206 | CONFIG_SYSFS=y | ||
| 1207 | CONFIG_TMPFS=y | ||
| 1208 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1209 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1210 | CONFIG_RAMFS=y | ||
| 1211 | # CONFIG_CONFIGFS_FS is not set | ||
| 1212 | |||
| 1213 | # | ||
| 1214 | # Miscellaneous filesystems | ||
| 1215 | # | ||
| 1216 | # CONFIG_ADFS_FS is not set | ||
| 1217 | # CONFIG_AFFS_FS is not set | ||
| 1218 | # CONFIG_HFS_FS is not set | ||
| 1219 | # CONFIG_HFSPLUS_FS is not set | ||
| 1220 | # CONFIG_BEFS_FS is not set | ||
| 1221 | # CONFIG_BFS_FS is not set | ||
| 1222 | # CONFIG_EFS_FS is not set | ||
| 1223 | # CONFIG_JFFS2_FS is not set | ||
| 1224 | # CONFIG_CRAMFS is not set | ||
| 1225 | # CONFIG_VXFS_FS is not set | ||
| 1226 | # CONFIG_HPFS_FS is not set | ||
| 1227 | # CONFIG_QNX4FS_FS is not set | ||
| 1228 | # CONFIG_SYSV_FS is not set | ||
| 1229 | # CONFIG_UFS_FS is not set | ||
| 1230 | |||
| 1231 | # | ||
| 1232 | # Network File Systems | ||
| 1233 | # | ||
| 1234 | CONFIG_NFS_FS=y | ||
| 1235 | CONFIG_NFS_V3=y | ||
| 1236 | # CONFIG_NFS_V3_ACL is not set | ||
| 1237 | # CONFIG_NFS_V4 is not set | ||
| 1238 | # CONFIG_NFS_DIRECTIO is not set | ||
| 1239 | # CONFIG_NFSD is not set | ||
| 1240 | CONFIG_ROOT_NFS=y | ||
| 1241 | CONFIG_LOCKD=y | ||
| 1242 | CONFIG_LOCKD_V4=y | ||
| 1243 | CONFIG_NFS_COMMON=y | ||
| 1244 | CONFIG_SUNRPC=y | ||
| 1245 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 1246 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1247 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1248 | CONFIG_SMB_FS=y | ||
| 1249 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
| 1250 | # CONFIG_CIFS is not set | ||
| 1251 | # CONFIG_NCP_FS is not set | ||
| 1252 | # CONFIG_CODA_FS is not set | ||
| 1253 | # CONFIG_AFS_FS is not set | ||
| 1254 | |||
| 1255 | # | ||
| 1256 | # Partition Types | ||
| 1257 | # | ||
| 1258 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 1259 | CONFIG_MSDOS_PARTITION=y | ||
| 1260 | |||
| 1261 | # | ||
| 1262 | # Native Language Support | ||
| 1263 | # | ||
| 1264 | CONFIG_NLS=y | ||
| 1265 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1266 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1267 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1268 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1269 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1270 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1271 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1272 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1273 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1274 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1275 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1276 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1277 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1278 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1279 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1280 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1281 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1282 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1283 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1284 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1285 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1286 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1287 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1288 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1289 | # CONFIG_NLS_ASCII is not set | ||
| 1290 | CONFIG_NLS_ISO8859_1=y | ||
| 1291 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1292 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1293 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1294 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1295 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1296 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1297 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1298 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1299 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1300 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1301 | # CONFIG_NLS_KOI8_R is not set | ||
| 1302 | # CONFIG_NLS_KOI8_U is not set | ||
| 1303 | # CONFIG_NLS_UTF8 is not set | ||
| 1304 | |||
| 1305 | # | ||
| 1306 | # Distributed Lock Manager | ||
| 1307 | # | ||
| 1308 | # CONFIG_DLM is not set | ||
| 1309 | |||
| 1310 | # | ||
| 1311 | # Profiling support | ||
| 1312 | # | ||
| 1313 | # CONFIG_PROFILING is not set | ||
| 1314 | |||
| 1315 | # | ||
| 1316 | # Kernel hacking | ||
| 1317 | # | ||
| 1318 | # CONFIG_PRINTK_TIME is not set | ||
| 1319 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1320 | CONFIG_MAGIC_SYSRQ=y | ||
| 1321 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1322 | # CONFIG_DEBUG_FS is not set | ||
| 1323 | # CONFIG_HEADERS_CHECK is not set | ||
| 1324 | CONFIG_DEBUG_KERNEL=y | ||
| 1325 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1326 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
| 1327 | CONFIG_SCHED_DEBUG=y | ||
| 1328 | # CONFIG_SCHEDSTATS is not set | ||
| 1329 | # CONFIG_TIMER_STATS is not set | ||
| 1330 | # CONFIG_DEBUG_SLAB is not set | ||
| 1331 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1332 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1333 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1334 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1335 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1336 | # CONFIG_PROVE_LOCKING is not set | ||
| 1337 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1338 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1339 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1340 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1341 | CONFIG_DEBUG_INFO=y | ||
| 1342 | # CONFIG_DEBUG_VM is not set | ||
| 1343 | # CONFIG_DEBUG_LIST is not set | ||
| 1344 | CONFIG_FRAME_POINTER=y | ||
| 1345 | CONFIG_FORCED_INLINING=y | ||
| 1346 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1347 | # CONFIG_FAULT_INJECTION is not set | ||
| 1348 | CONFIG_DEBUG_USER=y | ||
| 1349 | CONFIG_DEBUG_ERRORS=y | ||
| 1350 | CONFIG_DEBUG_LL=y | ||
| 1351 | # CONFIG_DEBUG_ICEDCC is not set | ||
| 1352 | |||
| 1353 | # | ||
| 1354 | # Security options | ||
| 1355 | # | ||
| 1356 | # CONFIG_KEYS is not set | ||
| 1357 | # CONFIG_SECURITY is not set | ||
| 1358 | CONFIG_CRYPTO=y | ||
| 1359 | CONFIG_CRYPTO_ALGAPI=m | ||
| 1360 | CONFIG_CRYPTO_BLKCIPHER=m | ||
| 1361 | CONFIG_CRYPTO_MANAGER=m | ||
| 1362 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1363 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1364 | # CONFIG_CRYPTO_NULL is not set | ||
| 1365 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1366 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1367 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1368 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1369 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1370 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1371 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1372 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1373 | CONFIG_CRYPTO_ECB=m | ||
| 1374 | CONFIG_CRYPTO_CBC=m | ||
| 1375 | CONFIG_CRYPTO_PCBC=m | ||
| 1376 | # CONFIG_CRYPTO_LRW is not set | ||
| 1377 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1378 | # CONFIG_CRYPTO_DES is not set | ||
| 1379 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1380 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1381 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1382 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1383 | CONFIG_CRYPTO_AES=m | ||
| 1384 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1385 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1386 | # CONFIG_CRYPTO_TEA is not set | ||
| 1387 | CONFIG_CRYPTO_ARC4=m | ||
| 1388 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1389 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1390 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1391 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1392 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1393 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1394 | # CONFIG_CRYPTO_TEST is not set | ||
| 1395 | CONFIG_CRYPTO_HW=y | ||
| 1396 | |||
| 1397 | # | ||
| 1398 | # Library routines | ||
| 1399 | # | ||
| 1400 | CONFIG_BITREVERSE=y | ||
| 1401 | # CONFIG_CRC_CCITT is not set | ||
| 1402 | # CONFIG_CRC16 is not set | ||
| 1403 | # CONFIG_CRC_ITU_T is not set | ||
| 1404 | CONFIG_CRC32=y | ||
| 1405 | # CONFIG_CRC7 is not set | ||
| 1406 | # CONFIG_LIBCRC32C is not set | ||
| 1407 | CONFIG_PLIST=y | ||
| 1408 | CONFIG_HAS_IOMEM=y | ||
| 1409 | CONFIG_HAS_IOPORT=y | ||
| 1410 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/omap_h2_1610_defconfig b/arch/arm/configs/omap_h2_1610_defconfig index b0efd4ca9935..b8a78ab49cdd 100644 --- a/arch/arm/configs/omap_h2_1610_defconfig +++ b/arch/arm/configs/omap_h2_1610_defconfig | |||
| @@ -1,41 +1,58 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.17 | 3 | # Linux kernel version: 2.6.23-rc6 |
| 4 | # Thu Jun 29 15:25:18 2006 | 4 | # Mon Sep 17 14:21:45 2007 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 7 | CONFIG_MMU=y | 11 | CONFIG_MMU=y |
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 8 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 9 | CONFIG_GENERIC_HWEIGHT=y | 22 | CONFIG_GENERIC_HWEIGHT=y |
| 10 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 23 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 24 | CONFIG_ZONE_DMA=y | ||
| 11 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 12 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 13 | 27 | ||
| 14 | # | 28 | # |
| 15 | # Code maturity level options | 29 | # General setup |
| 16 | # | 30 | # |
| 17 | CONFIG_EXPERIMENTAL=y | 31 | CONFIG_EXPERIMENTAL=y |
| 18 | CONFIG_BROKEN_ON_SMP=y | 32 | CONFIG_BROKEN_ON_SMP=y |
| 19 | CONFIG_LOCK_KERNEL=y | 33 | CONFIG_LOCK_KERNEL=y |
| 20 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 21 | |||
| 22 | # | ||
| 23 | # General setup | ||
| 24 | # | ||
| 25 | CONFIG_LOCALVERSION="" | 35 | CONFIG_LOCALVERSION="" |
| 26 | CONFIG_LOCALVERSION_AUTO=y | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 27 | CONFIG_SWAP=y | 37 | CONFIG_SWAP=y |
| 28 | CONFIG_SYSVIPC=y | 38 | CONFIG_SYSVIPC=y |
| 39 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 29 | # CONFIG_POSIX_MQUEUE is not set | 40 | # CONFIG_POSIX_MQUEUE is not set |
| 30 | # CONFIG_BSD_PROCESS_ACCT is not set | 41 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 31 | CONFIG_SYSCTL=y | 42 | # CONFIG_TASKSTATS is not set |
| 43 | # CONFIG_USER_NS is not set | ||
| 32 | # CONFIG_AUDIT is not set | 44 | # CONFIG_AUDIT is not set |
| 33 | # CONFIG_IKCONFIG is not set | 45 | # CONFIG_IKCONFIG is not set |
| 46 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 47 | # CONFIG_SYSFS_DEPRECATED is not set | ||
| 34 | # CONFIG_RELAY is not set | 48 | # CONFIG_RELAY is not set |
| 49 | CONFIG_BLK_DEV_INITRD=y | ||
| 35 | CONFIG_INITRAMFS_SOURCE="" | 50 | CONFIG_INITRAMFS_SOURCE="" |
| 36 | CONFIG_UID16=y | ||
| 37 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 51 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 52 | CONFIG_SYSCTL=y | ||
| 38 | # CONFIG_EMBEDDED is not set | 53 | # CONFIG_EMBEDDED is not set |
| 54 | CONFIG_UID16=y | ||
| 55 | CONFIG_SYSCTL_SYSCALL=y | ||
| 39 | CONFIG_KALLSYMS=y | 56 | CONFIG_KALLSYMS=y |
| 40 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 57 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 41 | CONFIG_HOTPLUG=y | 58 | CONFIG_HOTPLUG=y |
| @@ -44,27 +61,30 @@ CONFIG_BUG=y | |||
| 44 | CONFIG_ELF_CORE=y | 61 | CONFIG_ELF_CORE=y |
| 45 | CONFIG_BASE_FULL=y | 62 | CONFIG_BASE_FULL=y |
| 46 | CONFIG_FUTEX=y | 63 | CONFIG_FUTEX=y |
| 64 | CONFIG_ANON_INODES=y | ||
| 47 | CONFIG_EPOLL=y | 65 | CONFIG_EPOLL=y |
| 66 | CONFIG_SIGNALFD=y | ||
| 67 | CONFIG_TIMERFD=y | ||
| 68 | CONFIG_EVENTFD=y | ||
| 48 | CONFIG_SHMEM=y | 69 | CONFIG_SHMEM=y |
| 70 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 49 | CONFIG_SLAB=y | 71 | CONFIG_SLAB=y |
| 72 | # CONFIG_SLUB is not set | ||
| 73 | # CONFIG_SLOB is not set | ||
| 74 | CONFIG_RT_MUTEXES=y | ||
| 50 | # CONFIG_TINY_SHMEM is not set | 75 | # CONFIG_TINY_SHMEM is not set |
| 51 | CONFIG_BASE_SMALL=0 | 76 | CONFIG_BASE_SMALL=0 |
| 52 | # CONFIG_SLOB is not set | ||
| 53 | |||
| 54 | # | ||
| 55 | # Loadable module support | ||
| 56 | # | ||
| 57 | CONFIG_MODULES=y | 77 | CONFIG_MODULES=y |
| 58 | CONFIG_MODULE_UNLOAD=y | 78 | CONFIG_MODULE_UNLOAD=y |
| 59 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 79 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 60 | # CONFIG_MODVERSIONS is not set | 80 | # CONFIG_MODVERSIONS is not set |
| 61 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 81 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 62 | # CONFIG_KMOD is not set | 82 | # CONFIG_KMOD is not set |
| 63 | 83 | CONFIG_BLOCK=y | |
| 64 | # | 84 | # CONFIG_LBD is not set |
| 65 | # Block layer | ||
| 66 | # | ||
| 67 | # CONFIG_BLK_DEV_IO_TRACE is not set | 85 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 86 | # CONFIG_LSF is not set | ||
| 87 | # CONFIG_BLK_DEV_BSG is not set | ||
| 68 | 88 | ||
| 69 | # | 89 | # |
| 70 | # IO Schedulers | 90 | # IO Schedulers |
| @@ -86,7 +106,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
| 86 | # CONFIG_ARCH_INTEGRATOR is not set | 106 | # CONFIG_ARCH_INTEGRATOR is not set |
| 87 | # CONFIG_ARCH_REALVIEW is not set | 107 | # CONFIG_ARCH_REALVIEW is not set |
| 88 | # CONFIG_ARCH_VERSATILE is not set | 108 | # CONFIG_ARCH_VERSATILE is not set |
| 89 | # CONFIG_ARCH_AT91RM9200 is not set | 109 | # CONFIG_ARCH_AT91 is not set |
| 90 | # CONFIG_ARCH_CLPS7500 is not set | 110 | # CONFIG_ARCH_CLPS7500 is not set |
| 91 | # CONFIG_ARCH_CLPS711X is not set | 111 | # CONFIG_ARCH_CLPS711X is not set |
| 92 | # CONFIG_ARCH_CO285 is not set | 112 | # CONFIG_ARCH_CO285 is not set |
| @@ -96,11 +116,16 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
| 96 | # CONFIG_ARCH_NETX is not set | 116 | # CONFIG_ARCH_NETX is not set |
| 97 | # CONFIG_ARCH_H720X is not set | 117 | # CONFIG_ARCH_H720X is not set |
| 98 | # CONFIG_ARCH_IMX is not set | 118 | # CONFIG_ARCH_IMX is not set |
| 99 | # CONFIG_ARCH_IOP3XX is not set | 119 | # CONFIG_ARCH_IOP13XX is not set |
| 100 | # CONFIG_ARCH_IXP4XX is not set | 120 | # CONFIG_ARCH_IOP32X is not set |
| 101 | # CONFIG_ARCH_IXP2000 is not set | 121 | # CONFIG_ARCH_IOP33X is not set |
| 102 | # CONFIG_ARCH_IXP23XX is not set | 122 | # CONFIG_ARCH_IXP23XX is not set |
| 123 | # CONFIG_ARCH_IXP2000 is not set | ||
| 124 | # CONFIG_ARCH_IXP4XX is not set | ||
| 103 | # CONFIG_ARCH_L7200 is not set | 125 | # CONFIG_ARCH_L7200 is not set |
| 126 | # CONFIG_ARCH_KS8695 is not set | ||
| 127 | # CONFIG_ARCH_NS9XXX is not set | ||
| 128 | # CONFIG_ARCH_MXC is not set | ||
| 104 | # CONFIG_ARCH_PNX4008 is not set | 129 | # CONFIG_ARCH_PNX4008 is not set |
| 105 | # CONFIG_ARCH_PXA is not set | 130 | # CONFIG_ARCH_PXA is not set |
| 106 | # CONFIG_ARCH_RPC is not set | 131 | # CONFIG_ARCH_RPC is not set |
| @@ -108,6 +133,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
| 108 | # CONFIG_ARCH_S3C2410 is not set | 133 | # CONFIG_ARCH_S3C2410 is not set |
| 109 | # CONFIG_ARCH_SHARK is not set | 134 | # CONFIG_ARCH_SHARK is not set |
| 110 | # CONFIG_ARCH_LH7A40X is not set | 135 | # CONFIG_ARCH_LH7A40X is not set |
| 136 | # CONFIG_ARCH_DAVINCI is not set | ||
| 111 | CONFIG_ARCH_OMAP=y | 137 | CONFIG_ARCH_OMAP=y |
| 112 | 138 | ||
| 113 | # | 139 | # |
| @@ -124,6 +150,7 @@ CONFIG_ARCH_OMAP1=y | |||
| 124 | CONFIG_OMAP_MUX=y | 150 | CONFIG_OMAP_MUX=y |
| 125 | # CONFIG_OMAP_MUX_DEBUG is not set | 151 | # CONFIG_OMAP_MUX_DEBUG is not set |
| 126 | CONFIG_OMAP_MUX_WARNINGS=y | 152 | CONFIG_OMAP_MUX_WARNINGS=y |
| 153 | CONFIG_OMAP_MCBSP=y | ||
| 127 | # CONFIG_OMAP_MPU_TIMER is not set | 154 | # CONFIG_OMAP_MPU_TIMER is not set |
| 128 | CONFIG_OMAP_32K_TIMER=y | 155 | CONFIG_OMAP_32K_TIMER=y |
| 129 | CONFIG_OMAP_32K_TIMER_HZ=128 | 156 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| @@ -162,6 +189,14 @@ CONFIG_OMAP_ARM_192MHZ=y | |||
| 162 | # CONFIG_OMAP_ARM_30MHZ is not set | 189 | # CONFIG_OMAP_ARM_30MHZ is not set |
| 163 | 190 | ||
| 164 | # | 191 | # |
| 192 | # Boot options | ||
| 193 | # | ||
| 194 | |||
| 195 | # | ||
| 196 | # Power management | ||
| 197 | # | ||
| 198 | |||
| 199 | # | ||
| 165 | # Processor Type | 200 | # Processor Type |
| 166 | # | 201 | # |
| 167 | CONFIG_CPU_32=y | 202 | CONFIG_CPU_32=y |
| @@ -171,6 +206,8 @@ CONFIG_CPU_ABRT_EV5TJ=y | |||
| 171 | CONFIG_CPU_CACHE_VIVT=y | 206 | CONFIG_CPU_CACHE_VIVT=y |
| 172 | CONFIG_CPU_COPY_V4WB=y | 207 | CONFIG_CPU_COPY_V4WB=y |
| 173 | CONFIG_CPU_TLB_V4WBI=y | 208 | CONFIG_CPU_TLB_V4WBI=y |
| 209 | CONFIG_CPU_CP15=y | ||
| 210 | CONFIG_CPU_CP15_MMU=y | ||
| 174 | 211 | ||
| 175 | # | 212 | # |
| 176 | # Processor Features | 213 | # Processor Features |
| @@ -180,10 +217,13 @@ CONFIG_ARM_THUMB=y | |||
| 180 | # CONFIG_CPU_DCACHE_DISABLE is not set | 217 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 181 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | 218 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set |
| 182 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | 219 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set |
| 220 | # CONFIG_OUTER_CACHE is not set | ||
| 183 | 221 | ||
| 184 | # | 222 | # |
| 185 | # Bus support | 223 | # Bus support |
| 186 | # | 224 | # |
| 225 | # CONFIG_PCI_SYSCALL is not set | ||
| 226 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 187 | 227 | ||
| 188 | # | 228 | # |
| 189 | # PCCARD (PCMCIA/CardBus) support | 229 | # PCCARD (PCMCIA/CardBus) support |
| @@ -193,10 +233,13 @@ CONFIG_ARM_THUMB=y | |||
| 193 | # | 233 | # |
| 194 | # Kernel Features | 234 | # Kernel Features |
| 195 | # | 235 | # |
| 236 | CONFIG_TICK_ONESHOT=y | ||
| 237 | CONFIG_NO_HZ=y | ||
| 238 | CONFIG_HIGH_RES_TIMERS=y | ||
| 196 | CONFIG_PREEMPT=y | 239 | CONFIG_PREEMPT=y |
| 197 | CONFIG_NO_IDLE_HZ=y | ||
| 198 | CONFIG_HZ=128 | 240 | CONFIG_HZ=128 |
| 199 | # CONFIG_AEABI is not set | 241 | CONFIG_AEABI=y |
| 242 | CONFIG_OABI_COMPAT=y | ||
| 200 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 243 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
| 201 | CONFIG_SELECT_MEMORY_MODEL=y | 244 | CONFIG_SELECT_MEMORY_MODEL=y |
| 202 | CONFIG_FLATMEM_MANUAL=y | 245 | CONFIG_FLATMEM_MANUAL=y |
| @@ -206,6 +249,10 @@ CONFIG_FLATMEM=y | |||
| 206 | CONFIG_FLAT_NODE_MEM_MAP=y | 249 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 207 | # CONFIG_SPARSEMEM_STATIC is not set | 250 | # CONFIG_SPARSEMEM_STATIC is not set |
| 208 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 251 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
| 252 | # CONFIG_RESOURCES_64BIT is not set | ||
| 253 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 254 | CONFIG_BOUNCE=y | ||
| 255 | CONFIG_VIRT_TO_BUS=y | ||
| 209 | # CONFIG_LEDS is not set | 256 | # CONFIG_LEDS is not set |
| 210 | CONFIG_ALIGNMENT_TRAP=y | 257 | CONFIG_ALIGNMENT_TRAP=y |
| 211 | 258 | ||
| @@ -216,6 +263,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
| 216 | CONFIG_ZBOOT_ROM_BSS=0x0 | 263 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 217 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200n8 root=0801 ro init=/bin/sh" | 264 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200n8 root=0801 ro init=/bin/sh" |
| 218 | # CONFIG_XIP_KERNEL is not set | 265 | # CONFIG_XIP_KERNEL is not set |
| 266 | # CONFIG_KEXEC is not set | ||
| 219 | 267 | ||
| 220 | # | 268 | # |
| 221 | # CPU Frequency scaling | 269 | # CPU Frequency scaling |
| @@ -251,7 +299,6 @@ CONFIG_FPE_NWFPE=y | |||
| 251 | CONFIG_BINFMT_ELF=y | 299 | CONFIG_BINFMT_ELF=y |
| 252 | CONFIG_BINFMT_AOUT=y | 300 | CONFIG_BINFMT_AOUT=y |
| 253 | # CONFIG_BINFMT_MISC is not set | 301 | # CONFIG_BINFMT_MISC is not set |
| 254 | # CONFIG_ARTHUR is not set | ||
| 255 | 302 | ||
| 256 | # | 303 | # |
| 257 | # Power management options | 304 | # Power management options |
| @@ -259,7 +306,10 @@ CONFIG_BINFMT_AOUT=y | |||
| 259 | CONFIG_PM=y | 306 | CONFIG_PM=y |
| 260 | # CONFIG_PM_LEGACY is not set | 307 | # CONFIG_PM_LEGACY is not set |
| 261 | # CONFIG_PM_DEBUG is not set | 308 | # CONFIG_PM_DEBUG is not set |
| 262 | # CONFIG_APM is not set | 309 | CONFIG_PM_SLEEP=y |
| 310 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
| 311 | CONFIG_SUSPEND=y | ||
| 312 | # CONFIG_APM_EMULATION is not set | ||
| 263 | 313 | ||
| 264 | # | 314 | # |
| 265 | # Networking | 315 | # Networking |
| @@ -269,12 +319,13 @@ CONFIG_NET=y | |||
| 269 | # | 319 | # |
| 270 | # Networking options | 320 | # Networking options |
| 271 | # | 321 | # |
| 272 | # CONFIG_NETDEBUG is not set | ||
| 273 | CONFIG_PACKET=y | 322 | CONFIG_PACKET=y |
| 274 | # CONFIG_PACKET_MMAP is not set | 323 | # CONFIG_PACKET_MMAP is not set |
| 275 | CONFIG_UNIX=y | 324 | CONFIG_UNIX=y |
| 276 | CONFIG_XFRM=y | 325 | CONFIG_XFRM=y |
| 277 | # CONFIG_XFRM_USER is not set | 326 | # CONFIG_XFRM_USER is not set |
| 327 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 328 | # CONFIG_XFRM_MIGRATE is not set | ||
| 278 | # CONFIG_NET_KEY is not set | 329 | # CONFIG_NET_KEY is not set |
| 279 | CONFIG_INET=y | 330 | CONFIG_INET=y |
| 280 | # CONFIG_IP_MULTICAST is not set | 331 | # CONFIG_IP_MULTICAST is not set |
| @@ -295,29 +346,20 @@ CONFIG_IP_PNP_BOOTP=y | |||
| 295 | # CONFIG_INET_TUNNEL is not set | 346 | # CONFIG_INET_TUNNEL is not set |
| 296 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 347 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
| 297 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 348 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
| 349 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 298 | CONFIG_INET_DIAG=y | 350 | CONFIG_INET_DIAG=y |
| 299 | CONFIG_INET_TCP_DIAG=y | 351 | CONFIG_INET_TCP_DIAG=y |
| 300 | # CONFIG_TCP_CONG_ADVANCED is not set | 352 | # CONFIG_TCP_CONG_ADVANCED is not set |
| 301 | CONFIG_TCP_CONG_BIC=y | 353 | CONFIG_TCP_CONG_CUBIC=y |
| 354 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 355 | # CONFIG_TCP_MD5SIG is not set | ||
| 302 | # CONFIG_IPV6 is not set | 356 | # CONFIG_IPV6 is not set |
| 303 | # CONFIG_INET6_XFRM_TUNNEL is not set | 357 | # CONFIG_INET6_XFRM_TUNNEL is not set |
| 304 | # CONFIG_INET6_TUNNEL is not set | 358 | # CONFIG_INET6_TUNNEL is not set |
| 305 | # CONFIG_NETWORK_SECMARK is not set | 359 | # CONFIG_NETWORK_SECMARK is not set |
| 306 | # CONFIG_NETFILTER is not set | 360 | # CONFIG_NETFILTER is not set |
| 307 | |||
| 308 | # | ||
| 309 | # DCCP Configuration (EXPERIMENTAL) | ||
| 310 | # | ||
| 311 | # CONFIG_IP_DCCP is not set | 361 | # CONFIG_IP_DCCP is not set |
| 312 | |||
| 313 | # | ||
| 314 | # SCTP Configuration (EXPERIMENTAL) | ||
| 315 | # | ||
| 316 | # CONFIG_IP_SCTP is not set | 362 | # CONFIG_IP_SCTP is not set |
| 317 | |||
| 318 | # | ||
| 319 | # TIPC Configuration (EXPERIMENTAL) | ||
| 320 | # | ||
| 321 | # CONFIG_TIPC is not set | 363 | # CONFIG_TIPC is not set |
| 322 | # CONFIG_ATM is not set | 364 | # CONFIG_ATM is not set |
| 323 | # CONFIG_BRIDGE is not set | 365 | # CONFIG_BRIDGE is not set |
| @@ -328,7 +370,6 @@ CONFIG_TCP_CONG_BIC=y | |||
| 328 | # CONFIG_ATALK is not set | 370 | # CONFIG_ATALK is not set |
| 329 | # CONFIG_X25 is not set | 371 | # CONFIG_X25 is not set |
| 330 | # CONFIG_LAPB is not set | 372 | # CONFIG_LAPB is not set |
| 331 | # CONFIG_NET_DIVERT is not set | ||
| 332 | # CONFIG_ECONET is not set | 373 | # CONFIG_ECONET is not set |
| 333 | # CONFIG_WAN_ROUTER is not set | 374 | # CONFIG_WAN_ROUTER is not set |
| 334 | 375 | ||
| @@ -344,7 +385,17 @@ CONFIG_TCP_CONG_BIC=y | |||
| 344 | # CONFIG_HAMRADIO is not set | 385 | # CONFIG_HAMRADIO is not set |
| 345 | # CONFIG_IRDA is not set | 386 | # CONFIG_IRDA is not set |
| 346 | # CONFIG_BT is not set | 387 | # CONFIG_BT is not set |
| 388 | # CONFIG_AF_RXRPC is not set | ||
| 389 | |||
| 390 | # | ||
| 391 | # Wireless | ||
| 392 | # | ||
| 393 | # CONFIG_CFG80211 is not set | ||
| 394 | # CONFIG_WIRELESS_EXT is not set | ||
| 395 | # CONFIG_MAC80211 is not set | ||
| 347 | # CONFIG_IEEE80211 is not set | 396 | # CONFIG_IEEE80211 is not set |
| 397 | # CONFIG_RFKILL is not set | ||
| 398 | # CONFIG_NET_9P is not set | ||
| 348 | 399 | ||
| 349 | # | 400 | # |
| 350 | # Device Drivers | 401 | # Device Drivers |
| @@ -357,29 +408,10 @@ CONFIG_STANDALONE=y | |||
| 357 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 408 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 358 | # CONFIG_FW_LOADER is not set | 409 | # CONFIG_FW_LOADER is not set |
| 359 | # CONFIG_SYS_HYPERVISOR is not set | 410 | # CONFIG_SYS_HYPERVISOR is not set |
| 360 | |||
| 361 | # | ||
| 362 | # Connector - unified userspace <-> kernelspace linker | ||
| 363 | # | ||
| 364 | # CONFIG_CONNECTOR is not set | 411 | # CONFIG_CONNECTOR is not set |
| 365 | |||
| 366 | # | ||
| 367 | # Memory Technology Devices (MTD) | ||
| 368 | # | ||
| 369 | # CONFIG_MTD is not set | 412 | # CONFIG_MTD is not set |
| 370 | |||
| 371 | # | ||
| 372 | # Parallel port support | ||
| 373 | # | ||
| 374 | # CONFIG_PARPORT is not set | 413 | # CONFIG_PARPORT is not set |
| 375 | 414 | CONFIG_BLK_DEV=y | |
| 376 | # | ||
| 377 | # Plug and Play support | ||
| 378 | # | ||
| 379 | |||
| 380 | # | ||
| 381 | # Block devices | ||
| 382 | # | ||
| 383 | # CONFIG_BLK_DEV_COW_COMMON is not set | 415 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 384 | CONFIG_BLK_DEV_LOOP=y | 416 | CONFIG_BLK_DEV_LOOP=y |
| 385 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 417 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| @@ -387,7 +419,7 @@ CONFIG_BLK_DEV_LOOP=y | |||
| 387 | CONFIG_BLK_DEV_RAM=y | 419 | CONFIG_BLK_DEV_RAM=y |
| 388 | CONFIG_BLK_DEV_RAM_COUNT=16 | 420 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 389 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 421 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
| 390 | CONFIG_BLK_DEV_INITRD=y | 422 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 |
| 391 | # CONFIG_CDROM_PKTCDVD is not set | 423 | # CONFIG_CDROM_PKTCDVD is not set |
| 392 | CONFIG_ATA_OVER_ETH=m | 424 | CONFIG_ATA_OVER_ETH=m |
| 393 | 425 | ||
| @@ -396,6 +428,9 @@ CONFIG_ATA_OVER_ETH=m | |||
| 396 | # | 428 | # |
| 397 | # CONFIG_RAID_ATTRS is not set | 429 | # CONFIG_RAID_ATTRS is not set |
| 398 | CONFIG_SCSI=y | 430 | CONFIG_SCSI=y |
| 431 | CONFIG_SCSI_DMA=y | ||
| 432 | # CONFIG_SCSI_TGT is not set | ||
| 433 | # CONFIG_SCSI_NETLINK is not set | ||
| 399 | CONFIG_SCSI_PROC_FS=y | 434 | CONFIG_SCSI_PROC_FS=y |
| 400 | 435 | ||
| 401 | # | 436 | # |
| @@ -414,82 +449,42 @@ CONFIG_SCSI_PROC_FS=y | |||
| 414 | # CONFIG_SCSI_MULTI_LUN is not set | 449 | # CONFIG_SCSI_MULTI_LUN is not set |
| 415 | # CONFIG_SCSI_CONSTANTS is not set | 450 | # CONFIG_SCSI_CONSTANTS is not set |
| 416 | # CONFIG_SCSI_LOGGING is not set | 451 | # CONFIG_SCSI_LOGGING is not set |
| 452 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 453 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 417 | 454 | ||
| 418 | # | 455 | # |
| 419 | # SCSI Transport Attributes | 456 | # SCSI Transports |
| 420 | # | 457 | # |
| 421 | # CONFIG_SCSI_SPI_ATTRS is not set | 458 | # CONFIG_SCSI_SPI_ATTRS is not set |
| 422 | # CONFIG_SCSI_FC_ATTRS is not set | 459 | # CONFIG_SCSI_FC_ATTRS is not set |
| 423 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 460 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
| 424 | # CONFIG_SCSI_SAS_ATTRS is not set | 461 | # CONFIG_SCSI_SAS_LIBSAS is not set |
| 425 | 462 | CONFIG_SCSI_LOWLEVEL=y | |
| 426 | # | ||
| 427 | # SCSI low-level drivers | ||
| 428 | # | ||
| 429 | # CONFIG_ISCSI_TCP is not set | 463 | # CONFIG_ISCSI_TCP is not set |
| 430 | # CONFIG_SCSI_SATA is not set | ||
| 431 | # CONFIG_SCSI_DEBUG is not set | 464 | # CONFIG_SCSI_DEBUG is not set |
| 432 | 465 | # CONFIG_ATA is not set | |
| 433 | # | ||
| 434 | # Multi-device support (RAID and LVM) | ||
| 435 | # | ||
| 436 | # CONFIG_MD is not set | 466 | # CONFIG_MD is not set |
| 437 | |||
| 438 | # | ||
| 439 | # Fusion MPT device support | ||
| 440 | # | ||
| 441 | # CONFIG_FUSION is not set | ||
| 442 | |||
| 443 | # | ||
| 444 | # IEEE 1394 (FireWire) support | ||
| 445 | # | ||
| 446 | |||
| 447 | # | ||
| 448 | # I2O device support | ||
| 449 | # | ||
| 450 | |||
| 451 | # | ||
| 452 | # Network device support | ||
| 453 | # | ||
| 454 | CONFIG_NETDEVICES=y | 467 | CONFIG_NETDEVICES=y |
| 468 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 455 | # CONFIG_DUMMY is not set | 469 | # CONFIG_DUMMY is not set |
| 456 | # CONFIG_BONDING is not set | 470 | # CONFIG_BONDING is not set |
| 471 | # CONFIG_MACVLAN is not set | ||
| 457 | # CONFIG_EQUALIZER is not set | 472 | # CONFIG_EQUALIZER is not set |
| 458 | # CONFIG_TUN is not set | 473 | # CONFIG_TUN is not set |
| 459 | |||
| 460 | # | ||
| 461 | # PHY device support | ||
| 462 | # | ||
| 463 | # CONFIG_PHYLIB is not set | 474 | # CONFIG_PHYLIB is not set |
| 464 | |||
| 465 | # | ||
| 466 | # Ethernet (10 or 100Mbit) | ||
| 467 | # | ||
| 468 | CONFIG_NET_ETHERNET=y | 475 | CONFIG_NET_ETHERNET=y |
| 469 | CONFIG_MII=y | 476 | CONFIG_MII=y |
| 477 | # CONFIG_AX88796 is not set | ||
| 470 | CONFIG_SMC91X=y | 478 | CONFIG_SMC91X=y |
| 471 | # CONFIG_DM9000 is not set | 479 | # CONFIG_DM9000 is not set |
| 480 | CONFIG_NETDEV_1000=y | ||
| 481 | CONFIG_NETDEV_10000=y | ||
| 472 | 482 | ||
| 473 | # | 483 | # |
| 474 | # Ethernet (1000 Mbit) | 484 | # Wireless LAN |
| 475 | # | ||
| 476 | |||
| 477 | # | ||
| 478 | # Ethernet (10000 Mbit) | ||
| 479 | # | ||
| 480 | |||
| 481 | # | ||
| 482 | # Token Ring devices | ||
| 483 | # | ||
| 484 | |||
| 485 | # | ||
| 486 | # Wireless LAN (non-hamradio) | ||
| 487 | # | ||
| 488 | # CONFIG_NET_RADIO is not set | ||
| 489 | |||
| 490 | # | ||
| 491 | # Wan interfaces | ||
| 492 | # | 485 | # |
| 486 | # CONFIG_WLAN_PRE80211 is not set | ||
| 487 | # CONFIG_WLAN_80211 is not set | ||
| 493 | # CONFIG_WAN is not set | 488 | # CONFIG_WAN is not set |
| 494 | CONFIG_PPP=y | 489 | CONFIG_PPP=y |
| 495 | # CONFIG_PPP_MULTILINK is not set | 490 | # CONFIG_PPP_MULTILINK is not set |
| @@ -500,24 +495,24 @@ CONFIG_PPP=y | |||
| 500 | # CONFIG_PPP_BSDCOMP is not set | 495 | # CONFIG_PPP_BSDCOMP is not set |
| 501 | # CONFIG_PPP_MPPE is not set | 496 | # CONFIG_PPP_MPPE is not set |
| 502 | # CONFIG_PPPOE is not set | 497 | # CONFIG_PPPOE is not set |
| 498 | # CONFIG_PPPOL2TP is not set | ||
| 503 | CONFIG_SLIP=y | 499 | CONFIG_SLIP=y |
| 504 | CONFIG_SLIP_COMPRESSED=y | 500 | CONFIG_SLIP_COMPRESSED=y |
| 501 | CONFIG_SLHC=y | ||
| 505 | # CONFIG_SLIP_SMART is not set | 502 | # CONFIG_SLIP_SMART is not set |
| 506 | # CONFIG_SLIP_MODE_SLIP6 is not set | 503 | # CONFIG_SLIP_MODE_SLIP6 is not set |
| 507 | # CONFIG_SHAPER is not set | 504 | # CONFIG_SHAPER is not set |
| 508 | # CONFIG_NETCONSOLE is not set | 505 | # CONFIG_NETCONSOLE is not set |
| 509 | # CONFIG_NETPOLL is not set | 506 | # CONFIG_NETPOLL is not set |
| 510 | # CONFIG_NET_POLL_CONTROLLER is not set | 507 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 511 | |||
| 512 | # | ||
| 513 | # ISDN subsystem | ||
| 514 | # | ||
| 515 | # CONFIG_ISDN is not set | 508 | # CONFIG_ISDN is not set |
| 516 | 509 | ||
| 517 | # | 510 | # |
| 518 | # Input device support | 511 | # Input device support |
| 519 | # | 512 | # |
| 520 | CONFIG_INPUT=y | 513 | CONFIG_INPUT=y |
| 514 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 515 | # CONFIG_INPUT_POLLDEV is not set | ||
| 521 | 516 | ||
| 522 | # | 517 | # |
| 523 | # Userland interfaces | 518 | # Userland interfaces |
| @@ -537,8 +532,14 @@ CONFIG_INPUT_EVBUG=y | |||
| 537 | # CONFIG_INPUT_KEYBOARD is not set | 532 | # CONFIG_INPUT_KEYBOARD is not set |
| 538 | # CONFIG_INPUT_MOUSE is not set | 533 | # CONFIG_INPUT_MOUSE is not set |
| 539 | # CONFIG_INPUT_JOYSTICK is not set | 534 | # CONFIG_INPUT_JOYSTICK is not set |
| 535 | # CONFIG_INPUT_TABLET is not set | ||
| 540 | # CONFIG_INPUT_TOUCHSCREEN is not set | 536 | # CONFIG_INPUT_TOUCHSCREEN is not set |
| 541 | CONFIG_INPUT_MISC=y | 537 | CONFIG_INPUT_MISC=y |
| 538 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 539 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 540 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 541 | # CONFIG_INPUT_POWERMATE is not set | ||
| 542 | # CONFIG_INPUT_YEALINK is not set | ||
| 542 | CONFIG_INPUT_UINPUT=y | 543 | CONFIG_INPUT_UINPUT=y |
| 543 | 544 | ||
| 544 | # | 545 | # |
| @@ -574,15 +575,7 @@ CONFIG_SERIAL_CORE=y | |||
| 574 | CONFIG_SERIAL_CORE_CONSOLE=y | 575 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 575 | CONFIG_UNIX98_PTYS=y | 576 | CONFIG_UNIX98_PTYS=y |
| 576 | # CONFIG_LEGACY_PTYS is not set | 577 | # CONFIG_LEGACY_PTYS is not set |
| 577 | |||
| 578 | # | ||
| 579 | # IPMI | ||
| 580 | # | ||
| 581 | # CONFIG_IPMI_HANDLER is not set | 578 | # CONFIG_IPMI_HANDLER is not set |
| 582 | |||
| 583 | # | ||
| 584 | # Watchdog Cards | ||
| 585 | # | ||
| 586 | CONFIG_WATCHDOG=y | 579 | CONFIG_WATCHDOG=y |
| 587 | CONFIG_WATCHDOG_NOWAYOUT=y | 580 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 588 | 581 | ||
| @@ -590,25 +583,12 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 590 | # Watchdog Device Drivers | 583 | # Watchdog Device Drivers |
| 591 | # | 584 | # |
| 592 | # CONFIG_SOFT_WATCHDOG is not set | 585 | # CONFIG_SOFT_WATCHDOG is not set |
| 586 | # CONFIG_OMAP_WATCHDOG is not set | ||
| 593 | # CONFIG_HW_RANDOM is not set | 587 | # CONFIG_HW_RANDOM is not set |
| 594 | # CONFIG_NVRAM is not set | 588 | # CONFIG_NVRAM is not set |
| 595 | # CONFIG_DTLK is not set | ||
| 596 | # CONFIG_R3964 is not set | 589 | # CONFIG_R3964 is not set |
| 597 | |||
| 598 | # | ||
| 599 | # Ftape, the floppy tape device driver | ||
| 600 | # | ||
| 601 | # CONFIG_RAW_DRIVER is not set | 590 | # CONFIG_RAW_DRIVER is not set |
| 602 | |||
| 603 | # | ||
| 604 | # TPM devices | ||
| 605 | # | ||
| 606 | # CONFIG_TCG_TPM is not set | 591 | # CONFIG_TCG_TPM is not set |
| 607 | # CONFIG_TELCLOCK is not set | ||
| 608 | |||
| 609 | # | ||
| 610 | # I2C support | ||
| 611 | # | ||
| 612 | # CONFIG_I2C is not set | 592 | # CONFIG_I2C is not set |
| 613 | 593 | ||
| 614 | # | 594 | # |
| @@ -616,61 +596,70 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 616 | # | 596 | # |
| 617 | # CONFIG_SPI is not set | 597 | # CONFIG_SPI is not set |
| 618 | # CONFIG_SPI_MASTER is not set | 598 | # CONFIG_SPI_MASTER is not set |
| 619 | 599 | # CONFIG_W1 is not set | |
| 620 | # | ||
| 621 | # Dallas's 1-wire bus | ||
| 622 | # | ||
| 623 | |||
| 624 | # | ||
| 625 | # Hardware Monitoring support | ||
| 626 | # | ||
| 627 | CONFIG_HWMON=y | 600 | CONFIG_HWMON=y |
| 628 | # CONFIG_HWMON_VID is not set | 601 | # CONFIG_HWMON_VID is not set |
| 629 | # CONFIG_SENSORS_ABITUGURU is not set | 602 | # CONFIG_SENSORS_ABITUGURU is not set |
| 603 | # CONFIG_SENSORS_ABITUGURU3 is not set | ||
| 630 | # CONFIG_SENSORS_F71805F is not set | 604 | # CONFIG_SENSORS_F71805F is not set |
| 605 | # CONFIG_SENSORS_IT87 is not set | ||
| 606 | # CONFIG_SENSORS_PC87360 is not set | ||
| 607 | # CONFIG_SENSORS_PC87427 is not set | ||
| 608 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 609 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 610 | # CONFIG_SENSORS_VT1211 is not set | ||
| 611 | # CONFIG_SENSORS_W83627HF is not set | ||
| 612 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 631 | # CONFIG_HWMON_DEBUG_CHIP is not set | 613 | # CONFIG_HWMON_DEBUG_CHIP is not set |
| 614 | CONFIG_MISC_DEVICES=y | ||
| 615 | # CONFIG_EEPROM_93CX6 is not set | ||
| 632 | 616 | ||
| 633 | # | 617 | # |
| 634 | # Misc devices | 618 | # Multifunction device drivers |
| 635 | # | ||
| 636 | |||
| 637 | # | ||
| 638 | # LED devices | ||
| 639 | # | 619 | # |
| 620 | # CONFIG_MFD_SM501 is not set | ||
| 640 | # CONFIG_NEW_LEDS is not set | 621 | # CONFIG_NEW_LEDS is not set |
| 641 | 622 | ||
| 642 | # | 623 | # |
| 643 | # LED drivers | ||
| 644 | # | ||
| 645 | |||
| 646 | # | ||
| 647 | # LED Triggers | ||
| 648 | # | ||
| 649 | |||
| 650 | # | ||
| 651 | # Multimedia devices | 624 | # Multimedia devices |
| 652 | # | 625 | # |
| 653 | # CONFIG_VIDEO_DEV is not set | 626 | # CONFIG_VIDEO_DEV is not set |
| 654 | CONFIG_VIDEO_V4L2=y | 627 | # CONFIG_DVB_CORE is not set |
| 628 | CONFIG_DAB=y | ||
| 655 | 629 | ||
| 656 | # | 630 | # |
| 657 | # Digital Video Broadcasting Devices | 631 | # Graphics support |
| 658 | # | 632 | # |
| 659 | # CONFIG_DVB is not set | 633 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 660 | 634 | ||
| 661 | # | 635 | # |
| 662 | # Graphics support | 636 | # Display device support |
| 663 | # | 637 | # |
| 664 | CONFIG_FIRMWARE_EDID=y | 638 | # CONFIG_DISPLAY_SUPPORT is not set |
| 639 | # CONFIG_VGASTATE is not set | ||
| 640 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 665 | CONFIG_FB=y | 641 | CONFIG_FB=y |
| 642 | CONFIG_FIRMWARE_EDID=y | ||
| 643 | # CONFIG_FB_DDC is not set | ||
| 666 | # CONFIG_FB_CFB_FILLRECT is not set | 644 | # CONFIG_FB_CFB_FILLRECT is not set |
| 667 | # CONFIG_FB_CFB_COPYAREA is not set | 645 | # CONFIG_FB_CFB_COPYAREA is not set |
| 668 | # CONFIG_FB_CFB_IMAGEBLIT is not set | 646 | # CONFIG_FB_CFB_IMAGEBLIT is not set |
| 647 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 648 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 649 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 650 | # CONFIG_FB_SYS_FOPS is not set | ||
| 651 | CONFIG_FB_DEFERRED_IO=y | ||
| 652 | # CONFIG_FB_SVGALIB is not set | ||
| 669 | # CONFIG_FB_MACMODES is not set | 653 | # CONFIG_FB_MACMODES is not set |
| 670 | # CONFIG_FB_BACKLIGHT is not set | 654 | # CONFIG_FB_BACKLIGHT is not set |
| 671 | CONFIG_FB_MODE_HELPERS=y | 655 | CONFIG_FB_MODE_HELPERS=y |
| 672 | # CONFIG_FB_TILEBLITTING is not set | 656 | # CONFIG_FB_TILEBLITTING is not set |
| 657 | |||
| 658 | # | ||
| 659 | # Frame buffer hardware drivers | ||
| 660 | # | ||
| 673 | # CONFIG_FB_S1D13XXX is not set | 661 | # CONFIG_FB_S1D13XXX is not set |
| 662 | # CONFIG_FB_OMAP is not set | ||
| 674 | # CONFIG_FB_VIRTUAL is not set | 663 | # CONFIG_FB_VIRTUAL is not set |
| 675 | 664 | ||
| 676 | # | 665 | # |
| @@ -679,6 +668,7 @@ CONFIG_FB_MODE_HELPERS=y | |||
| 679 | # CONFIG_VGA_CONSOLE is not set | 668 | # CONFIG_VGA_CONSOLE is not set |
| 680 | CONFIG_DUMMY_CONSOLE=y | 669 | CONFIG_DUMMY_CONSOLE=y |
| 681 | CONFIG_FRAMEBUFFER_CONSOLE=y | 670 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 671 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 682 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | 672 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set |
| 683 | CONFIG_FONTS=y | 673 | CONFIG_FONTS=y |
| 684 | CONFIG_FONT_8x8=y | 674 | CONFIG_FONT_8x8=y |
| @@ -691,15 +681,10 @@ CONFIG_FONT_8x16=y | |||
| 691 | # CONFIG_FONT_SUN8x16 is not set | 681 | # CONFIG_FONT_SUN8x16 is not set |
| 692 | # CONFIG_FONT_SUN12x22 is not set | 682 | # CONFIG_FONT_SUN12x22 is not set |
| 693 | # CONFIG_FONT_10x18 is not set | 683 | # CONFIG_FONT_10x18 is not set |
| 694 | |||
| 695 | # | ||
| 696 | # Logo configuration | ||
| 697 | # | ||
| 698 | CONFIG_LOGO=y | 684 | CONFIG_LOGO=y |
| 699 | # CONFIG_LOGO_LINUX_MONO is not set | 685 | # CONFIG_LOGO_LINUX_MONO is not set |
| 700 | # CONFIG_LOGO_LINUX_VGA16 is not set | 686 | # CONFIG_LOGO_LINUX_VGA16 is not set |
| 701 | CONFIG_LOGO_LINUX_CLUT224=y | 687 | CONFIG_LOGO_LINUX_CLUT224=y |
| 702 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 703 | 688 | ||
| 704 | # | 689 | # |
| 705 | # Sound | 690 | # Sound |
| @@ -717,10 +702,10 @@ CONFIG_SOUND=y | |||
| 717 | CONFIG_SOUND_PRIME=y | 702 | CONFIG_SOUND_PRIME=y |
| 718 | # CONFIG_SOUND_MSNDCLAS is not set | 703 | # CONFIG_SOUND_MSNDCLAS is not set |
| 719 | # CONFIG_SOUND_MSNDPIN is not set | 704 | # CONFIG_SOUND_MSNDPIN is not set |
| 720 | 705 | CONFIG_HID_SUPPORT=y | |
| 721 | # | 706 | CONFIG_HID=y |
| 722 | # USB support | 707 | CONFIG_HID_DEBUG=y |
| 723 | # | 708 | CONFIG_USB_SUPPORT=y |
| 724 | CONFIG_USB_ARCH_HAS_HCD=y | 709 | CONFIG_USB_ARCH_HAS_HCD=y |
| 725 | CONFIG_USB_ARCH_HAS_OHCI=y | 710 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 726 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 711 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
| @@ -734,17 +719,22 @@ CONFIG_USB_ARCH_HAS_OHCI=y | |||
| 734 | # USB Gadget Support | 719 | # USB Gadget Support |
| 735 | # | 720 | # |
| 736 | # CONFIG_USB_GADGET is not set | 721 | # CONFIG_USB_GADGET is not set |
| 722 | # CONFIG_MMC is not set | ||
| 723 | CONFIG_RTC_LIB=y | ||
| 724 | # CONFIG_RTC_CLASS is not set | ||
| 737 | 725 | ||
| 738 | # | 726 | # |
| 739 | # MMC/SD Card support | 727 | # DMA Engine support |
| 740 | # | 728 | # |
| 741 | # CONFIG_MMC is not set | 729 | # CONFIG_DMA_ENGINE is not set |
| 742 | 730 | ||
| 743 | # | 731 | # |
| 744 | # Real Time Clock | 732 | # DMA Clients |
| 733 | # | ||
| 734 | |||
| 735 | # | ||
| 736 | # DMA Devices | ||
| 745 | # | 737 | # |
| 746 | CONFIG_RTC_LIB=y | ||
| 747 | # CONFIG_RTC_CLASS is not set | ||
| 748 | 738 | ||
| 749 | # | 739 | # |
| 750 | # File systems | 740 | # File systems |
| @@ -753,10 +743,12 @@ CONFIG_EXT2_FS=y | |||
| 753 | # CONFIG_EXT2_FS_XATTR is not set | 743 | # CONFIG_EXT2_FS_XATTR is not set |
| 754 | # CONFIG_EXT2_FS_XIP is not set | 744 | # CONFIG_EXT2_FS_XIP is not set |
| 755 | # CONFIG_EXT3_FS is not set | 745 | # CONFIG_EXT3_FS is not set |
| 746 | # CONFIG_EXT4DEV_FS is not set | ||
| 756 | # CONFIG_REISERFS_FS is not set | 747 | # CONFIG_REISERFS_FS is not set |
| 757 | # CONFIG_JFS_FS is not set | 748 | # CONFIG_JFS_FS is not set |
| 758 | # CONFIG_FS_POSIX_ACL is not set | 749 | # CONFIG_FS_POSIX_ACL is not set |
| 759 | # CONFIG_XFS_FS is not set | 750 | # CONFIG_XFS_FS is not set |
| 751 | # CONFIG_GFS2_FS is not set | ||
| 760 | # CONFIG_OCFS2_FS is not set | 752 | # CONFIG_OCFS2_FS is not set |
| 761 | # CONFIG_MINIX_FS is not set | 753 | # CONFIG_MINIX_FS is not set |
| 762 | CONFIG_ROMFS_FS=y | 754 | CONFIG_ROMFS_FS=y |
| @@ -787,6 +779,7 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437 | |||
| 787 | # Pseudo filesystems | 779 | # Pseudo filesystems |
| 788 | # | 780 | # |
| 789 | CONFIG_PROC_FS=y | 781 | CONFIG_PROC_FS=y |
| 782 | CONFIG_PROC_SYSCTL=y | ||
| 790 | CONFIG_SYSFS=y | 783 | CONFIG_SYSFS=y |
| 791 | # CONFIG_TMPFS is not set | 784 | # CONFIG_TMPFS is not set |
| 792 | # CONFIG_HUGETLB_PAGE is not set | 785 | # CONFIG_HUGETLB_PAGE is not set |
| @@ -825,6 +818,7 @@ CONFIG_LOCKD_V4=y | |||
| 825 | CONFIG_NFS_COMMON=y | 818 | CONFIG_NFS_COMMON=y |
| 826 | CONFIG_SUNRPC=y | 819 | CONFIG_SUNRPC=y |
| 827 | CONFIG_SUNRPC_GSS=y | 820 | CONFIG_SUNRPC_GSS=y |
| 821 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 828 | CONFIG_RPCSEC_GSS_KRB5=y | 822 | CONFIG_RPCSEC_GSS_KRB5=y |
| 829 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 823 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 830 | # CONFIG_SMB_FS is not set | 824 | # CONFIG_SMB_FS is not set |
| @@ -832,7 +826,6 @@ CONFIG_RPCSEC_GSS_KRB5=y | |||
| 832 | # CONFIG_NCP_FS is not set | 826 | # CONFIG_NCP_FS is not set |
| 833 | # CONFIG_CODA_FS is not set | 827 | # CONFIG_CODA_FS is not set |
| 834 | # CONFIG_AFS_FS is not set | 828 | # CONFIG_AFS_FS is not set |
| 835 | # CONFIG_9P_FS is not set | ||
| 836 | 829 | ||
| 837 | # | 830 | # |
| 838 | # Partition Types | 831 | # Partition Types |
| @@ -885,6 +878,11 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 885 | # CONFIG_NLS_UTF8 is not set | 878 | # CONFIG_NLS_UTF8 is not set |
| 886 | 879 | ||
| 887 | # | 880 | # |
| 881 | # Distributed Lock Manager | ||
| 882 | # | ||
| 883 | # CONFIG_DLM is not set | ||
| 884 | |||
| 885 | # | ||
| 888 | # Profiling support | 886 | # Profiling support |
| 889 | # | 887 | # |
| 890 | # CONFIG_PROFILING is not set | 888 | # CONFIG_PROFILING is not set |
| @@ -893,13 +891,14 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
| 893 | # Kernel hacking | 891 | # Kernel hacking |
| 894 | # | 892 | # |
| 895 | # CONFIG_PRINTK_TIME is not set | 893 | # CONFIG_PRINTK_TIME is not set |
| 894 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 896 | # CONFIG_MAGIC_SYSRQ is not set | 895 | # CONFIG_MAGIC_SYSRQ is not set |
| 896 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 897 | # CONFIG_DEBUG_FS is not set | ||
| 898 | # CONFIG_HEADERS_CHECK is not set | ||
| 897 | # CONFIG_DEBUG_KERNEL is not set | 899 | # CONFIG_DEBUG_KERNEL is not set |
| 898 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 899 | CONFIG_DEBUG_BUGVERBOSE=y | 900 | CONFIG_DEBUG_BUGVERBOSE=y |
| 900 | # CONFIG_DEBUG_FS is not set | ||
| 901 | CONFIG_FRAME_POINTER=y | 901 | CONFIG_FRAME_POINTER=y |
| 902 | # CONFIG_UNWIND_INFO is not set | ||
| 903 | # CONFIG_DEBUG_USER is not set | 902 | # CONFIG_DEBUG_USER is not set |
| 904 | 903 | ||
| 905 | # | 904 | # |
| @@ -907,12 +906,12 @@ CONFIG_FRAME_POINTER=y | |||
| 907 | # | 906 | # |
| 908 | # CONFIG_KEYS is not set | 907 | # CONFIG_KEYS is not set |
| 909 | # CONFIG_SECURITY is not set | 908 | # CONFIG_SECURITY is not set |
| 910 | |||
| 911 | # | ||
| 912 | # Cryptographic options | ||
| 913 | # | ||
| 914 | CONFIG_CRYPTO=y | 909 | CONFIG_CRYPTO=y |
| 910 | CONFIG_CRYPTO_ALGAPI=y | ||
| 911 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 912 | CONFIG_CRYPTO_MANAGER=y | ||
| 915 | # CONFIG_CRYPTO_HMAC is not set | 913 | # CONFIG_CRYPTO_HMAC is not set |
| 914 | # CONFIG_CRYPTO_XCBC is not set | ||
| 916 | # CONFIG_CRYPTO_NULL is not set | 915 | # CONFIG_CRYPTO_NULL is not set |
| 917 | # CONFIG_CRYPTO_MD4 is not set | 916 | # CONFIG_CRYPTO_MD4 is not set |
| 918 | CONFIG_CRYPTO_MD5=y | 917 | CONFIG_CRYPTO_MD5=y |
| @@ -921,7 +920,14 @@ CONFIG_CRYPTO_MD5=y | |||
| 921 | # CONFIG_CRYPTO_SHA512 is not set | 920 | # CONFIG_CRYPTO_SHA512 is not set |
| 922 | # CONFIG_CRYPTO_WP512 is not set | 921 | # CONFIG_CRYPTO_WP512 is not set |
| 923 | # CONFIG_CRYPTO_TGR192 is not set | 922 | # CONFIG_CRYPTO_TGR192 is not set |
| 923 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 924 | CONFIG_CRYPTO_ECB=m | ||
| 925 | CONFIG_CRYPTO_CBC=y | ||
| 926 | CONFIG_CRYPTO_PCBC=m | ||
| 927 | # CONFIG_CRYPTO_LRW is not set | ||
| 928 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 924 | CONFIG_CRYPTO_DES=y | 929 | CONFIG_CRYPTO_DES=y |
| 930 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 925 | # CONFIG_CRYPTO_BLOWFISH is not set | 931 | # CONFIG_CRYPTO_BLOWFISH is not set |
| 926 | # CONFIG_CRYPTO_TWOFISH is not set | 932 | # CONFIG_CRYPTO_TWOFISH is not set |
| 927 | # CONFIG_CRYPTO_SERPENT is not set | 933 | # CONFIG_CRYPTO_SERPENT is not set |
| @@ -935,17 +941,22 @@ CONFIG_CRYPTO_DES=y | |||
| 935 | # CONFIG_CRYPTO_DEFLATE is not set | 941 | # CONFIG_CRYPTO_DEFLATE is not set |
| 936 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 942 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| 937 | # CONFIG_CRYPTO_CRC32C is not set | 943 | # CONFIG_CRYPTO_CRC32C is not set |
| 944 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 938 | # CONFIG_CRYPTO_TEST is not set | 945 | # CONFIG_CRYPTO_TEST is not set |
| 939 | 946 | CONFIG_CRYPTO_HW=y | |
| 940 | # | ||
| 941 | # Hardware crypto devices | ||
| 942 | # | ||
| 943 | 947 | ||
| 944 | # | 948 | # |
| 945 | # Library routines | 949 | # Library routines |
| 946 | # | 950 | # |
| 951 | CONFIG_BITREVERSE=y | ||
| 947 | # CONFIG_CRC_CCITT is not set | 952 | # CONFIG_CRC_CCITT is not set |
| 948 | # CONFIG_CRC16 is not set | 953 | # CONFIG_CRC16 is not set |
| 954 | # CONFIG_CRC_ITU_T is not set | ||
| 949 | CONFIG_CRC32=y | 955 | CONFIG_CRC32=y |
| 956 | # CONFIG_CRC7 is not set | ||
| 950 | # CONFIG_LIBCRC32C is not set | 957 | # CONFIG_LIBCRC32C is not set |
| 951 | CONFIG_ZLIB_INFLATE=y | 958 | CONFIG_ZLIB_INFLATE=y |
| 959 | CONFIG_PLIST=y | ||
| 960 | CONFIG_HAS_IOMEM=y | ||
| 961 | CONFIG_HAS_IOPORT=y | ||
| 962 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/omap_osk_5912_defconfig b/arch/arm/configs/omap_osk_5912_defconfig new file mode 100644 index 000000000000..8c1f15c7c45c --- /dev/null +++ b/arch/arm/configs/omap_osk_5912_defconfig | |||
| @@ -0,0 +1,1073 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.23-rc6 | ||
| 4 | # Mon Sep 17 14:15:05 2007 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 22 | CONFIG_GENERIC_HWEIGHT=y | ||
| 23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 24 | CONFIG_ZONE_DMA=y | ||
| 25 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 27 | |||
| 28 | # | ||
| 29 | # General setup | ||
| 30 | # | ||
| 31 | CONFIG_EXPERIMENTAL=y | ||
| 32 | CONFIG_BROKEN_ON_SMP=y | ||
| 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 34 | CONFIG_LOCALVERSION="" | ||
| 35 | CONFIG_LOCALVERSION_AUTO=y | ||
| 36 | CONFIG_SWAP=y | ||
| 37 | CONFIG_SYSVIPC=y | ||
| 38 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 39 | # CONFIG_POSIX_MQUEUE is not set | ||
| 40 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 41 | # CONFIG_TASKSTATS is not set | ||
| 42 | # CONFIG_USER_NS is not set | ||
| 43 | # CONFIG_AUDIT is not set | ||
| 44 | # CONFIG_IKCONFIG is not set | ||
| 45 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 46 | # CONFIG_SYSFS_DEPRECATED is not set | ||
| 47 | # CONFIG_RELAY is not set | ||
| 48 | CONFIG_BLK_DEV_INITRD=y | ||
| 49 | CONFIG_INITRAMFS_SOURCE="" | ||
| 50 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 51 | CONFIG_SYSCTL=y | ||
| 52 | # CONFIG_EMBEDDED is not set | ||
| 53 | CONFIG_UID16=y | ||
| 54 | CONFIG_SYSCTL_SYSCALL=y | ||
| 55 | CONFIG_KALLSYMS=y | ||
| 56 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 57 | CONFIG_HOTPLUG=y | ||
| 58 | CONFIG_PRINTK=y | ||
| 59 | CONFIG_BUG=y | ||
| 60 | CONFIG_ELF_CORE=y | ||
| 61 | CONFIG_BASE_FULL=y | ||
| 62 | CONFIG_FUTEX=y | ||
| 63 | CONFIG_ANON_INODES=y | ||
| 64 | CONFIG_EPOLL=y | ||
| 65 | CONFIG_SIGNALFD=y | ||
| 66 | CONFIG_TIMERFD=y | ||
| 67 | CONFIG_EVENTFD=y | ||
| 68 | CONFIG_SHMEM=y | ||
| 69 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 70 | CONFIG_SLAB=y | ||
| 71 | # CONFIG_SLUB is not set | ||
| 72 | # CONFIG_SLOB is not set | ||
| 73 | CONFIG_RT_MUTEXES=y | ||
| 74 | # CONFIG_TINY_SHMEM is not set | ||
| 75 | CONFIG_BASE_SMALL=0 | ||
| 76 | CONFIG_MODULES=y | ||
| 77 | CONFIG_MODULE_UNLOAD=y | ||
| 78 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 79 | # CONFIG_MODVERSIONS is not set | ||
| 80 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 81 | CONFIG_KMOD=y | ||
| 82 | CONFIG_BLOCK=y | ||
| 83 | # CONFIG_LBD is not set | ||
| 84 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 85 | # CONFIG_LSF is not set | ||
| 86 | # CONFIG_BLK_DEV_BSG is not set | ||
| 87 | |||
| 88 | # | ||
| 89 | # IO Schedulers | ||
| 90 | # | ||
| 91 | CONFIG_IOSCHED_NOOP=y | ||
| 92 | CONFIG_IOSCHED_AS=y | ||
| 93 | CONFIG_IOSCHED_DEADLINE=y | ||
| 94 | CONFIG_IOSCHED_CFQ=y | ||
| 95 | # CONFIG_DEFAULT_AS is not set | ||
| 96 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 97 | CONFIG_DEFAULT_CFQ=y | ||
| 98 | # CONFIG_DEFAULT_NOOP is not set | ||
| 99 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 100 | |||
| 101 | # | ||
| 102 | # System Type | ||
| 103 | # | ||
| 104 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 105 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 106 | # CONFIG_ARCH_REALVIEW is not set | ||
| 107 | # CONFIG_ARCH_VERSATILE is not set | ||
| 108 | # CONFIG_ARCH_AT91 is not set | ||
| 109 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 110 | # CONFIG_ARCH_CLPS711X is not set | ||
| 111 | # CONFIG_ARCH_CO285 is not set | ||
| 112 | # CONFIG_ARCH_EBSA110 is not set | ||
| 113 | # CONFIG_ARCH_EP93XX is not set | ||
| 114 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 115 | # CONFIG_ARCH_NETX is not set | ||
| 116 | # CONFIG_ARCH_H720X is not set | ||
| 117 | # CONFIG_ARCH_IMX is not set | ||
| 118 | # CONFIG_ARCH_IOP13XX is not set | ||
| 119 | # CONFIG_ARCH_IOP32X is not set | ||
| 120 | # CONFIG_ARCH_IOP33X is not set | ||
| 121 | # CONFIG_ARCH_IXP23XX is not set | ||
| 122 | # CONFIG_ARCH_IXP2000 is not set | ||
| 123 | # CONFIG_ARCH_IXP4XX is not set | ||
| 124 | # CONFIG_ARCH_L7200 is not set | ||
| 125 | # CONFIG_ARCH_KS8695 is not set | ||
| 126 | # CONFIG_ARCH_NS9XXX is not set | ||
| 127 | # CONFIG_ARCH_MXC is not set | ||
| 128 | # CONFIG_ARCH_PNX4008 is not set | ||
| 129 | # CONFIG_ARCH_PXA is not set | ||
| 130 | # CONFIG_ARCH_RPC is not set | ||
| 131 | # CONFIG_ARCH_SA1100 is not set | ||
| 132 | # CONFIG_ARCH_S3C2410 is not set | ||
| 133 | # CONFIG_ARCH_SHARK is not set | ||
| 134 | # CONFIG_ARCH_LH7A40X is not set | ||
| 135 | # CONFIG_ARCH_DAVINCI is not set | ||
| 136 | CONFIG_ARCH_OMAP=y | ||
| 137 | |||
| 138 | # | ||
| 139 | # TI OMAP Implementations | ||
| 140 | # | ||
| 141 | CONFIG_ARCH_OMAP_OTG=y | ||
| 142 | CONFIG_ARCH_OMAP1=y | ||
| 143 | # CONFIG_ARCH_OMAP2 is not set | ||
| 144 | |||
| 145 | # | ||
| 146 | # OMAP Feature Selections | ||
| 147 | # | ||
| 148 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 149 | CONFIG_OMAP_MUX=y | ||
| 150 | # CONFIG_OMAP_MUX_DEBUG is not set | ||
| 151 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 152 | CONFIG_OMAP_MCBSP=y | ||
| 153 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 154 | CONFIG_OMAP_32K_TIMER=y | ||
| 155 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 156 | # CONFIG_OMAP_DM_TIMER is not set | ||
| 157 | CONFIG_OMAP_LL_DEBUG_UART1=y | ||
| 158 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 159 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set | ||
| 160 | CONFIG_OMAP_SERIAL_WAKE=y | ||
| 161 | |||
| 162 | # | ||
| 163 | # OMAP Core Type | ||
| 164 | # | ||
| 165 | # CONFIG_ARCH_OMAP730 is not set | ||
| 166 | # CONFIG_ARCH_OMAP15XX is not set | ||
| 167 | CONFIG_ARCH_OMAP16XX=y | ||
| 168 | |||
| 169 | # | ||
| 170 | # OMAP Board Type | ||
| 171 | # | ||
| 172 | # CONFIG_MACH_OMAP_INNOVATOR is not set | ||
| 173 | # CONFIG_MACH_OMAP_H2 is not set | ||
| 174 | # CONFIG_MACH_OMAP_H3 is not set | ||
| 175 | CONFIG_MACH_OMAP_OSK=y | ||
| 176 | # CONFIG_OMAP_OSK_MISTRAL is not set | ||
| 177 | # CONFIG_MACH_NOKIA770 is not set | ||
| 178 | # CONFIG_MACH_OMAP_GENERIC is not set | ||
| 179 | |||
| 180 | # | ||
| 181 | # OMAP CPU Speed | ||
| 182 | # | ||
| 183 | # CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER is not set | ||
| 184 | # CONFIG_OMAP_ARM_216MHZ is not set | ||
| 185 | CONFIG_OMAP_ARM_192MHZ=y | ||
| 186 | # CONFIG_OMAP_ARM_168MHZ is not set | ||
| 187 | # CONFIG_OMAP_ARM_120MHZ is not set | ||
| 188 | # CONFIG_OMAP_ARM_60MHZ is not set | ||
| 189 | # CONFIG_OMAP_ARM_30MHZ is not set | ||
| 190 | |||
| 191 | # | ||
| 192 | # Boot options | ||
| 193 | # | ||
| 194 | |||
| 195 | # | ||
| 196 | # Power management | ||
| 197 | # | ||
| 198 | |||
| 199 | # | ||
| 200 | # Processor Type | ||
| 201 | # | ||
| 202 | CONFIG_CPU_32=y | ||
| 203 | CONFIG_CPU_ARM926T=y | ||
| 204 | CONFIG_CPU_32v5=y | ||
| 205 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 206 | CONFIG_CPU_CACHE_VIVT=y | ||
| 207 | CONFIG_CPU_COPY_V4WB=y | ||
| 208 | CONFIG_CPU_TLB_V4WBI=y | ||
| 209 | CONFIG_CPU_CP15=y | ||
| 210 | CONFIG_CPU_CP15_MMU=y | ||
| 211 | |||
| 212 | # | ||
| 213 | # Processor Features | ||
| 214 | # | ||
| 215 | # CONFIG_ARM_THUMB is not set | ||
| 216 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 217 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 218 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 219 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 220 | # CONFIG_OUTER_CACHE is not set | ||
| 221 | |||
| 222 | # | ||
| 223 | # Bus support | ||
| 224 | # | ||
| 225 | # CONFIG_PCI_SYSCALL is not set | ||
| 226 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 227 | |||
| 228 | # | ||
| 229 | # PCCARD (PCMCIA/CardBus) support | ||
| 230 | # | ||
| 231 | CONFIG_PCCARD=y | ||
| 232 | # CONFIG_PCMCIA_DEBUG is not set | ||
| 233 | CONFIG_PCMCIA=y | ||
| 234 | CONFIG_PCMCIA_LOAD_CIS=y | ||
| 235 | CONFIG_PCMCIA_IOCTL=y | ||
| 236 | |||
| 237 | # | ||
| 238 | # PC-card bridges | ||
| 239 | # | ||
| 240 | CONFIG_OMAP_CF=y | ||
| 241 | |||
| 242 | # | ||
| 243 | # Kernel Features | ||
| 244 | # | ||
| 245 | CONFIG_TICK_ONESHOT=y | ||
| 246 | CONFIG_NO_HZ=y | ||
| 247 | CONFIG_HIGH_RES_TIMERS=y | ||
| 248 | # CONFIG_PREEMPT is not set | ||
| 249 | CONFIG_HZ=128 | ||
| 250 | CONFIG_AEABI=y | ||
| 251 | CONFIG_OABI_COMPAT=y | ||
| 252 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
| 253 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 254 | CONFIG_FLATMEM_MANUAL=y | ||
| 255 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 256 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 257 | CONFIG_FLATMEM=y | ||
| 258 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 259 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 260 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 261 | # CONFIG_RESOURCES_64BIT is not set | ||
| 262 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 263 | CONFIG_BOUNCE=y | ||
| 264 | CONFIG_VIRT_TO_BUS=y | ||
| 265 | # CONFIG_LEDS is not set | ||
| 266 | CONFIG_ALIGNMENT_TRAP=y | ||
| 267 | |||
| 268 | # | ||
| 269 | # Boot options | ||
| 270 | # | ||
| 271 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 272 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 273 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x10400000,8M root=/dev/ram0 rw" | ||
| 274 | # CONFIG_XIP_KERNEL is not set | ||
| 275 | # CONFIG_KEXEC is not set | ||
| 276 | |||
| 277 | # | ||
| 278 | # CPU Frequency scaling | ||
| 279 | # | ||
| 280 | # CONFIG_CPU_FREQ is not set | ||
| 281 | |||
| 282 | # | ||
| 283 | # Floating point emulation | ||
| 284 | # | ||
| 285 | |||
| 286 | # | ||
| 287 | # At least one emulation must be selected | ||
| 288 | # | ||
| 289 | CONFIG_FPE_NWFPE=y | ||
| 290 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 291 | # CONFIG_FPE_FASTFPE is not set | ||
| 292 | # CONFIG_VFP is not set | ||
| 293 | |||
| 294 | # | ||
| 295 | # Userspace binary formats | ||
| 296 | # | ||
| 297 | CONFIG_BINFMT_ELF=y | ||
| 298 | # CONFIG_BINFMT_AOUT is not set | ||
| 299 | # CONFIG_BINFMT_MISC is not set | ||
| 300 | |||
| 301 | # | ||
| 302 | # Power management options | ||
| 303 | # | ||
| 304 | CONFIG_PM=y | ||
| 305 | # CONFIG_PM_LEGACY is not set | ||
| 306 | # CONFIG_PM_DEBUG is not set | ||
| 307 | CONFIG_PM_SLEEP=y | ||
| 308 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
| 309 | CONFIG_SUSPEND=y | ||
| 310 | # CONFIG_APM_EMULATION is not set | ||
| 311 | |||
| 312 | # | ||
| 313 | # Networking | ||
| 314 | # | ||
| 315 | CONFIG_NET=y | ||
| 316 | |||
| 317 | # | ||
| 318 | # Networking options | ||
| 319 | # | ||
| 320 | CONFIG_PACKET=m | ||
| 321 | # CONFIG_PACKET_MMAP is not set | ||
| 322 | CONFIG_UNIX=y | ||
| 323 | CONFIG_XFRM=y | ||
| 324 | # CONFIG_XFRM_USER is not set | ||
| 325 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 326 | # CONFIG_XFRM_MIGRATE is not set | ||
| 327 | # CONFIG_NET_KEY is not set | ||
| 328 | CONFIG_INET=y | ||
| 329 | CONFIG_IP_MULTICAST=y | ||
| 330 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 331 | CONFIG_IP_FIB_HASH=y | ||
| 332 | CONFIG_IP_PNP=y | ||
| 333 | CONFIG_IP_PNP_DHCP=y | ||
| 334 | CONFIG_IP_PNP_BOOTP=y | ||
| 335 | # CONFIG_IP_PNP_RARP is not set | ||
| 336 | # CONFIG_NET_IPIP is not set | ||
| 337 | # CONFIG_NET_IPGRE is not set | ||
| 338 | # CONFIG_IP_MROUTE is not set | ||
| 339 | # CONFIG_ARPD is not set | ||
| 340 | # CONFIG_SYN_COOKIES is not set | ||
| 341 | # CONFIG_INET_AH is not set | ||
| 342 | # CONFIG_INET_ESP is not set | ||
| 343 | # CONFIG_INET_IPCOMP is not set | ||
| 344 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 345 | # CONFIG_INET_TUNNEL is not set | ||
| 346 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 347 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 348 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 349 | CONFIG_INET_DIAG=y | ||
| 350 | CONFIG_INET_TCP_DIAG=y | ||
| 351 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 352 | CONFIG_TCP_CONG_CUBIC=y | ||
| 353 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 354 | # CONFIG_TCP_MD5SIG is not set | ||
| 355 | # CONFIG_IPV6 is not set | ||
| 356 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 357 | # CONFIG_INET6_TUNNEL is not set | ||
| 358 | # CONFIG_NETWORK_SECMARK is not set | ||
| 359 | # CONFIG_NETFILTER is not set | ||
| 360 | # CONFIG_IP_DCCP is not set | ||
| 361 | # CONFIG_IP_SCTP is not set | ||
| 362 | # CONFIG_TIPC is not set | ||
| 363 | # CONFIG_ATM is not set | ||
| 364 | # CONFIG_BRIDGE is not set | ||
| 365 | # CONFIG_VLAN_8021Q is not set | ||
| 366 | # CONFIG_DECNET is not set | ||
| 367 | # CONFIG_LLC2 is not set | ||
| 368 | # CONFIG_IPX is not set | ||
| 369 | # CONFIG_ATALK is not set | ||
| 370 | # CONFIG_X25 is not set | ||
| 371 | # CONFIG_LAPB is not set | ||
| 372 | # CONFIG_ECONET is not set | ||
| 373 | # CONFIG_WAN_ROUTER is not set | ||
| 374 | |||
| 375 | # | ||
| 376 | # QoS and/or fair queueing | ||
| 377 | # | ||
| 378 | # CONFIG_NET_SCHED is not set | ||
| 379 | |||
| 380 | # | ||
| 381 | # Network testing | ||
| 382 | # | ||
| 383 | # CONFIG_NET_PKTGEN is not set | ||
| 384 | # CONFIG_HAMRADIO is not set | ||
| 385 | # CONFIG_IRDA is not set | ||
| 386 | # CONFIG_BT is not set | ||
| 387 | # CONFIG_AF_RXRPC is not set | ||
| 388 | |||
| 389 | # | ||
| 390 | # Wireless | ||
| 391 | # | ||
| 392 | # CONFIG_CFG80211 is not set | ||
| 393 | # CONFIG_WIRELESS_EXT is not set | ||
| 394 | # CONFIG_MAC80211 is not set | ||
| 395 | # CONFIG_IEEE80211 is not set | ||
| 396 | # CONFIG_RFKILL is not set | ||
| 397 | # CONFIG_NET_9P is not set | ||
| 398 | |||
| 399 | # | ||
| 400 | # Device Drivers | ||
| 401 | # | ||
| 402 | |||
| 403 | # | ||
| 404 | # Generic Driver Options | ||
| 405 | # | ||
| 406 | CONFIG_STANDALONE=y | ||
| 407 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 408 | CONFIG_FW_LOADER=y | ||
| 409 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 410 | # CONFIG_CONNECTOR is not set | ||
| 411 | CONFIG_MTD=y | ||
| 412 | # CONFIG_MTD_DEBUG is not set | ||
| 413 | # CONFIG_MTD_CONCAT is not set | ||
| 414 | CONFIG_MTD_PARTITIONS=y | ||
| 415 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 416 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 417 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 418 | |||
| 419 | # | ||
| 420 | # User Modules And Translation Layers | ||
| 421 | # | ||
| 422 | CONFIG_MTD_CHAR=y | ||
| 423 | CONFIG_MTD_BLKDEVS=y | ||
| 424 | CONFIG_MTD_BLOCK=y | ||
| 425 | # CONFIG_FTL is not set | ||
| 426 | # CONFIG_NFTL is not set | ||
| 427 | # CONFIG_INFTL is not set | ||
| 428 | # CONFIG_RFD_FTL is not set | ||
| 429 | # CONFIG_SSFDC is not set | ||
| 430 | |||
| 431 | # | ||
| 432 | # RAM/ROM/Flash chip drivers | ||
| 433 | # | ||
| 434 | CONFIG_MTD_CFI=y | ||
| 435 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 436 | CONFIG_MTD_GEN_PROBE=y | ||
| 437 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 438 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 439 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 440 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 441 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 442 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 443 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 444 | CONFIG_MTD_CFI_I1=y | ||
| 445 | CONFIG_MTD_CFI_I2=y | ||
| 446 | # CONFIG_MTD_CFI_I4 is not set | ||
| 447 | # CONFIG_MTD_CFI_I8 is not set | ||
| 448 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 449 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 450 | # CONFIG_MTD_CFI_STAA is not set | ||
| 451 | CONFIG_MTD_CFI_UTIL=y | ||
| 452 | # CONFIG_MTD_RAM is not set | ||
| 453 | # CONFIG_MTD_ROM is not set | ||
| 454 | # CONFIG_MTD_ABSENT is not set | ||
| 455 | |||
| 456 | # | ||
| 457 | # Mapping drivers for chip access | ||
| 458 | # | ||
| 459 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 460 | # CONFIG_MTD_PHYSMAP is not set | ||
| 461 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
| 462 | CONFIG_MTD_OMAP_NOR=y | ||
| 463 | # CONFIG_MTD_PLATRAM is not set | ||
| 464 | |||
| 465 | # | ||
| 466 | # Self-contained MTD device drivers | ||
| 467 | # | ||
| 468 | # CONFIG_MTD_SLRAM is not set | ||
| 469 | # CONFIG_MTD_PHRAM is not set | ||
| 470 | # CONFIG_MTD_MTDRAM is not set | ||
| 471 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 472 | |||
| 473 | # | ||
| 474 | # Disk-On-Chip Device Drivers | ||
| 475 | # | ||
| 476 | # CONFIG_MTD_DOC2000 is not set | ||
| 477 | # CONFIG_MTD_DOC2001 is not set | ||
| 478 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 479 | # CONFIG_MTD_NAND is not set | ||
| 480 | # CONFIG_MTD_ONENAND is not set | ||
| 481 | |||
| 482 | # | ||
| 483 | # UBI - Unsorted block images | ||
| 484 | # | ||
| 485 | # CONFIG_MTD_UBI is not set | ||
| 486 | # CONFIG_PARPORT is not set | ||
| 487 | CONFIG_BLK_DEV=y | ||
| 488 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 489 | CONFIG_BLK_DEV_LOOP=y | ||
| 490 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 491 | # CONFIG_BLK_DEV_NBD is not set | ||
| 492 | CONFIG_BLK_DEV_RAM=y | ||
| 493 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 494 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
| 495 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
| 496 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 497 | # CONFIG_ATA_OVER_ETH is not set | ||
| 498 | CONFIG_IDE=m | ||
| 499 | CONFIG_BLK_DEV_IDE=m | ||
| 500 | |||
| 501 | # | ||
| 502 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
| 503 | # | ||
| 504 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
| 505 | CONFIG_BLK_DEV_IDEDISK=m | ||
| 506 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
| 507 | CONFIG_BLK_DEV_IDECS=m | ||
| 508 | # CONFIG_BLK_DEV_IDECD is not set | ||
| 509 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
| 510 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
| 511 | # CONFIG_IDE_TASK_IOCTL is not set | ||
| 512 | CONFIG_IDE_PROC_FS=y | ||
| 513 | |||
| 514 | # | ||
| 515 | # IDE chipset support/bugfixes | ||
| 516 | # | ||
| 517 | # CONFIG_IDE_GENERIC is not set | ||
| 518 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
| 519 | # CONFIG_IDE_ARM is not set | ||
| 520 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
| 521 | # CONFIG_BLK_DEV_HD is not set | ||
| 522 | |||
| 523 | # | ||
| 524 | # SCSI device support | ||
| 525 | # | ||
| 526 | # CONFIG_RAID_ATTRS is not set | ||
| 527 | # CONFIG_SCSI is not set | ||
| 528 | # CONFIG_SCSI_DMA is not set | ||
| 529 | # CONFIG_SCSI_NETLINK is not set | ||
| 530 | # CONFIG_ATA is not set | ||
| 531 | # CONFIG_MD is not set | ||
| 532 | CONFIG_NETDEVICES=y | ||
| 533 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
| 534 | # CONFIG_DUMMY is not set | ||
| 535 | # CONFIG_BONDING is not set | ||
| 536 | # CONFIG_MACVLAN is not set | ||
| 537 | # CONFIG_EQUALIZER is not set | ||
| 538 | # CONFIG_TUN is not set | ||
| 539 | # CONFIG_PHYLIB is not set | ||
| 540 | CONFIG_NET_ETHERNET=y | ||
| 541 | CONFIG_MII=y | ||
| 542 | # CONFIG_AX88796 is not set | ||
| 543 | CONFIG_SMC91X=y | ||
| 544 | # CONFIG_DM9000 is not set | ||
| 545 | CONFIG_NETDEV_1000=y | ||
| 546 | CONFIG_NETDEV_10000=y | ||
| 547 | |||
| 548 | # | ||
| 549 | # Wireless LAN | ||
| 550 | # | ||
| 551 | # CONFIG_WLAN_PRE80211 is not set | ||
| 552 | # CONFIG_WLAN_80211 is not set | ||
| 553 | # CONFIG_NET_PCMCIA is not set | ||
| 554 | # CONFIG_WAN is not set | ||
| 555 | CONFIG_PPP=y | ||
| 556 | CONFIG_PPP_MULTILINK=y | ||
| 557 | # CONFIG_PPP_FILTER is not set | ||
| 558 | # CONFIG_PPP_ASYNC is not set | ||
| 559 | # CONFIG_PPP_SYNC_TTY is not set | ||
| 560 | # CONFIG_PPP_DEFLATE is not set | ||
| 561 | # CONFIG_PPP_BSDCOMP is not set | ||
| 562 | # CONFIG_PPP_MPPE is not set | ||
| 563 | # CONFIG_PPPOE is not set | ||
| 564 | # CONFIG_PPPOL2TP is not set | ||
| 565 | # CONFIG_SLIP is not set | ||
| 566 | CONFIG_SLHC=y | ||
| 567 | # CONFIG_SHAPER is not set | ||
| 568 | # CONFIG_NETCONSOLE is not set | ||
| 569 | # CONFIG_NETPOLL is not set | ||
| 570 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 571 | # CONFIG_ISDN is not set | ||
| 572 | |||
| 573 | # | ||
| 574 | # Input device support | ||
| 575 | # | ||
| 576 | CONFIG_INPUT=y | ||
| 577 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 578 | # CONFIG_INPUT_POLLDEV is not set | ||
| 579 | |||
| 580 | # | ||
| 581 | # Userland interfaces | ||
| 582 | # | ||
| 583 | CONFIG_INPUT_MOUSEDEV=y | ||
| 584 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 585 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 586 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 587 | # CONFIG_INPUT_JOYDEV is not set | ||
| 588 | # CONFIG_INPUT_TSDEV is not set | ||
| 589 | CONFIG_INPUT_EVDEV=y | ||
| 590 | # CONFIG_INPUT_EVBUG is not set | ||
| 591 | |||
| 592 | # | ||
| 593 | # Input Device Drivers | ||
| 594 | # | ||
| 595 | CONFIG_INPUT_KEYBOARD=y | ||
| 596 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 597 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 598 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 599 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 600 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 601 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 602 | CONFIG_KEYBOARD_OMAP=y | ||
| 603 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 604 | # CONFIG_INPUT_MOUSE is not set | ||
| 605 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 606 | # CONFIG_INPUT_TABLET is not set | ||
| 607 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 608 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 609 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 610 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 611 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 612 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 613 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 614 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 615 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 616 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
| 617 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 618 | # CONFIG_INPUT_MISC is not set | ||
| 619 | |||
| 620 | # | ||
| 621 | # Hardware I/O ports | ||
| 622 | # | ||
| 623 | # CONFIG_SERIO is not set | ||
| 624 | # CONFIG_GAMEPORT is not set | ||
| 625 | |||
| 626 | # | ||
| 627 | # Character devices | ||
| 628 | # | ||
| 629 | CONFIG_VT=y | ||
| 630 | CONFIG_VT_CONSOLE=y | ||
| 631 | CONFIG_HW_CONSOLE=y | ||
| 632 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 633 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 634 | |||
| 635 | # | ||
| 636 | # Serial drivers | ||
| 637 | # | ||
| 638 | CONFIG_SERIAL_8250=y | ||
| 639 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 640 | # CONFIG_SERIAL_8250_CS is not set | ||
| 641 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 642 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 643 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 644 | |||
| 645 | # | ||
| 646 | # Non-8250 serial port support | ||
| 647 | # | ||
| 648 | CONFIG_SERIAL_CORE=y | ||
| 649 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 650 | CONFIG_UNIX98_PTYS=y | ||
| 651 | CONFIG_LEGACY_PTYS=y | ||
| 652 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 653 | # CONFIG_IPMI_HANDLER is not set | ||
| 654 | # CONFIG_WATCHDOG is not set | ||
| 655 | CONFIG_HW_RANDOM=m | ||
| 656 | CONFIG_HW_RANDOM_OMAP=m | ||
| 657 | # CONFIG_NVRAM is not set | ||
| 658 | # CONFIG_R3964 is not set | ||
| 659 | |||
| 660 | # | ||
| 661 | # PCMCIA character devices | ||
| 662 | # | ||
| 663 | # CONFIG_SYNCLINK_CS is not set | ||
| 664 | # CONFIG_CARDMAN_4000 is not set | ||
| 665 | # CONFIG_CARDMAN_4040 is not set | ||
| 666 | # CONFIG_RAW_DRIVER is not set | ||
| 667 | # CONFIG_TCG_TPM is not set | ||
| 668 | CONFIG_I2C=y | ||
| 669 | CONFIG_I2C_BOARDINFO=y | ||
| 670 | CONFIG_I2C_CHARDEV=y | ||
| 671 | |||
| 672 | # | ||
| 673 | # I2C Algorithms | ||
| 674 | # | ||
| 675 | # CONFIG_I2C_ALGOBIT is not set | ||
| 676 | # CONFIG_I2C_ALGOPCF is not set | ||
| 677 | # CONFIG_I2C_ALGOPCA is not set | ||
| 678 | |||
| 679 | # | ||
| 680 | # I2C Hardware Bus support | ||
| 681 | # | ||
| 682 | # CONFIG_I2C_GPIO is not set | ||
| 683 | # CONFIG_I2C_OCORES is not set | ||
| 684 | CONFIG_I2C_OMAP=y | ||
| 685 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 686 | # CONFIG_I2C_SIMTEC is not set | ||
| 687 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 688 | # CONFIG_I2C_STUB is not set | ||
| 689 | |||
| 690 | # | ||
| 691 | # Miscellaneous I2C Chip support | ||
| 692 | # | ||
| 693 | # CONFIG_SENSORS_DS1337 is not set | ||
| 694 | # CONFIG_SENSORS_DS1374 is not set | ||
| 695 | # CONFIG_DS1682 is not set | ||
| 696 | # CONFIG_SENSORS_EEPROM is not set | ||
| 697 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 698 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 699 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 700 | # CONFIG_ISP1301_OMAP is not set | ||
| 701 | CONFIG_TPS65010=y | ||
| 702 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 703 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 704 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 705 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 706 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 707 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 708 | |||
| 709 | # | ||
| 710 | # SPI support | ||
| 711 | # | ||
| 712 | # CONFIG_SPI is not set | ||
| 713 | # CONFIG_SPI_MASTER is not set | ||
| 714 | # CONFIG_W1 is not set | ||
| 715 | CONFIG_HWMON=y | ||
| 716 | # CONFIG_HWMON_VID is not set | ||
| 717 | # CONFIG_SENSORS_ABITUGURU is not set | ||
| 718 | # CONFIG_SENSORS_ABITUGURU3 is not set | ||
| 719 | # CONFIG_SENSORS_AD7418 is not set | ||
| 720 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 721 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 722 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 723 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 724 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 725 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 726 | # CONFIG_SENSORS_ASB100 is not set | ||
| 727 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 728 | # CONFIG_SENSORS_DS1621 is not set | ||
| 729 | # CONFIG_SENSORS_F71805F is not set | ||
| 730 | # CONFIG_SENSORS_FSCHER is not set | ||
| 731 | # CONFIG_SENSORS_FSCPOS is not set | ||
| 732 | # CONFIG_SENSORS_GL518SM is not set | ||
| 733 | # CONFIG_SENSORS_GL520SM is not set | ||
| 734 | # CONFIG_SENSORS_IT87 is not set | ||
| 735 | # CONFIG_SENSORS_LM63 is not set | ||
| 736 | # CONFIG_SENSORS_LM75 is not set | ||
| 737 | # CONFIG_SENSORS_LM77 is not set | ||
| 738 | # CONFIG_SENSORS_LM78 is not set | ||
| 739 | # CONFIG_SENSORS_LM80 is not set | ||
| 740 | # CONFIG_SENSORS_LM83 is not set | ||
| 741 | # CONFIG_SENSORS_LM85 is not set | ||
| 742 | # CONFIG_SENSORS_LM87 is not set | ||
| 743 | # CONFIG_SENSORS_LM90 is not set | ||
| 744 | # CONFIG_SENSORS_LM92 is not set | ||
| 745 | # CONFIG_SENSORS_LM93 is not set | ||
| 746 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 747 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 748 | # CONFIG_SENSORS_PC87360 is not set | ||
| 749 | # CONFIG_SENSORS_PC87427 is not set | ||
| 750 | # CONFIG_SENSORS_DME1737 is not set | ||
| 751 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 752 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 753 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 754 | # CONFIG_SENSORS_THMC50 is not set | ||
| 755 | # CONFIG_SENSORS_VT1211 is not set | ||
| 756 | # CONFIG_SENSORS_W83781D is not set | ||
| 757 | # CONFIG_SENSORS_W83791D is not set | ||
| 758 | # CONFIG_SENSORS_W83792D is not set | ||
| 759 | # CONFIG_SENSORS_W83793 is not set | ||
| 760 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 761 | # CONFIG_SENSORS_W83627HF is not set | ||
| 762 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 763 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 764 | CONFIG_MISC_DEVICES=y | ||
| 765 | # CONFIG_EEPROM_93CX6 is not set | ||
| 766 | |||
| 767 | # | ||
| 768 | # Multifunction device drivers | ||
| 769 | # | ||
| 770 | # CONFIG_MFD_SM501 is not set | ||
| 771 | # CONFIG_NEW_LEDS is not set | ||
| 772 | |||
| 773 | # | ||
| 774 | # Multimedia devices | ||
| 775 | # | ||
| 776 | # CONFIG_VIDEO_DEV is not set | ||
| 777 | # CONFIG_DVB_CORE is not set | ||
| 778 | CONFIG_DAB=y | ||
| 779 | |||
| 780 | # | ||
| 781 | # Graphics support | ||
| 782 | # | ||
| 783 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 784 | |||
| 785 | # | ||
| 786 | # Display device support | ||
| 787 | # | ||
| 788 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 789 | # CONFIG_VGASTATE is not set | ||
| 790 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
| 791 | CONFIG_FB=y | ||
| 792 | CONFIG_FIRMWARE_EDID=y | ||
| 793 | # CONFIG_FB_DDC is not set | ||
| 794 | # CONFIG_FB_CFB_FILLRECT is not set | ||
| 795 | # CONFIG_FB_CFB_COPYAREA is not set | ||
| 796 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
| 797 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 798 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 799 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 800 | # CONFIG_FB_SYS_FOPS is not set | ||
| 801 | CONFIG_FB_DEFERRED_IO=y | ||
| 802 | # CONFIG_FB_SVGALIB is not set | ||
| 803 | # CONFIG_FB_MACMODES is not set | ||
| 804 | # CONFIG_FB_BACKLIGHT is not set | ||
| 805 | CONFIG_FB_MODE_HELPERS=y | ||
| 806 | # CONFIG_FB_TILEBLITTING is not set | ||
| 807 | |||
| 808 | # | ||
| 809 | # Frame buffer hardware drivers | ||
| 810 | # | ||
| 811 | # CONFIG_FB_S1D13XXX is not set | ||
| 812 | # CONFIG_FB_OMAP is not set | ||
| 813 | # CONFIG_FB_VIRTUAL is not set | ||
| 814 | |||
| 815 | # | ||
| 816 | # Console display driver support | ||
| 817 | # | ||
| 818 | # CONFIG_VGA_CONSOLE is not set | ||
| 819 | CONFIG_DUMMY_CONSOLE=y | ||
| 820 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 821 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 822 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 823 | CONFIG_FONTS=y | ||
| 824 | CONFIG_FONT_8x8=y | ||
| 825 | # CONFIG_FONT_8x16 is not set | ||
| 826 | # CONFIG_FONT_6x11 is not set | ||
| 827 | # CONFIG_FONT_7x14 is not set | ||
| 828 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 829 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 830 | # CONFIG_FONT_MINI_4x6 is not set | ||
| 831 | # CONFIG_FONT_SUN8x16 is not set | ||
| 832 | # CONFIG_FONT_SUN12x22 is not set | ||
| 833 | # CONFIG_FONT_10x18 is not set | ||
| 834 | CONFIG_LOGO=y | ||
| 835 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 836 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 837 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 838 | |||
| 839 | # | ||
| 840 | # Sound | ||
| 841 | # | ||
| 842 | # CONFIG_SOUND is not set | ||
| 843 | CONFIG_HID_SUPPORT=y | ||
| 844 | CONFIG_HID=y | ||
| 845 | CONFIG_HID_DEBUG=y | ||
| 846 | CONFIG_USB_SUPPORT=y | ||
| 847 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 848 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 849 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 850 | # CONFIG_USB is not set | ||
| 851 | |||
| 852 | # | ||
| 853 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
| 854 | # | ||
| 855 | |||
| 856 | # | ||
| 857 | # USB Gadget Support | ||
| 858 | # | ||
| 859 | # CONFIG_USB_GADGET is not set | ||
| 860 | # CONFIG_MMC is not set | ||
| 861 | CONFIG_RTC_LIB=y | ||
| 862 | # CONFIG_RTC_CLASS is not set | ||
| 863 | |||
| 864 | # | ||
| 865 | # DMA Engine support | ||
| 866 | # | ||
| 867 | # CONFIG_DMA_ENGINE is not set | ||
| 868 | |||
| 869 | # | ||
| 870 | # DMA Clients | ||
| 871 | # | ||
| 872 | |||
| 873 | # | ||
| 874 | # DMA Devices | ||
| 875 | # | ||
| 876 | |||
| 877 | # | ||
| 878 | # File systems | ||
| 879 | # | ||
| 880 | CONFIG_EXT2_FS=y | ||
| 881 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 882 | # CONFIG_EXT2_FS_XIP is not set | ||
| 883 | # CONFIG_EXT3_FS is not set | ||
| 884 | # CONFIG_EXT4DEV_FS is not set | ||
| 885 | # CONFIG_REISERFS_FS is not set | ||
| 886 | # CONFIG_JFS_FS is not set | ||
| 887 | # CONFIG_FS_POSIX_ACL is not set | ||
| 888 | # CONFIG_XFS_FS is not set | ||
| 889 | # CONFIG_GFS2_FS is not set | ||
| 890 | # CONFIG_OCFS2_FS is not set | ||
| 891 | # CONFIG_MINIX_FS is not set | ||
| 892 | # CONFIG_ROMFS_FS is not set | ||
| 893 | CONFIG_INOTIFY=y | ||
| 894 | CONFIG_INOTIFY_USER=y | ||
| 895 | # CONFIG_QUOTA is not set | ||
| 896 | CONFIG_DNOTIFY=y | ||
| 897 | CONFIG_AUTOFS_FS=y | ||
| 898 | CONFIG_AUTOFS4_FS=y | ||
| 899 | # CONFIG_FUSE_FS is not set | ||
| 900 | |||
| 901 | # | ||
| 902 | # CD-ROM/DVD Filesystems | ||
| 903 | # | ||
| 904 | # CONFIG_ISO9660_FS is not set | ||
| 905 | # CONFIG_UDF_FS is not set | ||
| 906 | |||
| 907 | # | ||
| 908 | # DOS/FAT/NT Filesystems | ||
| 909 | # | ||
| 910 | CONFIG_FAT_FS=m | ||
| 911 | CONFIG_MSDOS_FS=m | ||
| 912 | CONFIG_VFAT_FS=m | ||
| 913 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 914 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 915 | # CONFIG_NTFS_FS is not set | ||
| 916 | |||
| 917 | # | ||
| 918 | # Pseudo filesystems | ||
| 919 | # | ||
| 920 | CONFIG_PROC_FS=y | ||
| 921 | CONFIG_PROC_SYSCTL=y | ||
| 922 | CONFIG_SYSFS=y | ||
| 923 | # CONFIG_TMPFS is not set | ||
| 924 | # CONFIG_HUGETLB_PAGE is not set | ||
| 925 | CONFIG_RAMFS=y | ||
| 926 | # CONFIG_CONFIGFS_FS is not set | ||
| 927 | |||
| 928 | # | ||
| 929 | # Miscellaneous filesystems | ||
| 930 | # | ||
| 931 | # CONFIG_ADFS_FS is not set | ||
| 932 | # CONFIG_AFFS_FS is not set | ||
| 933 | # CONFIG_HFS_FS is not set | ||
| 934 | # CONFIG_HFSPLUS_FS is not set | ||
| 935 | # CONFIG_BEFS_FS is not set | ||
| 936 | # CONFIG_BFS_FS is not set | ||
| 937 | # CONFIG_EFS_FS is not set | ||
| 938 | CONFIG_JFFS2_FS=y | ||
| 939 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 940 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 941 | # CONFIG_JFFS2_SUMMARY is not set | ||
| 942 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 943 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
| 944 | CONFIG_JFFS2_ZLIB=y | ||
| 945 | CONFIG_JFFS2_RTIME=y | ||
| 946 | # CONFIG_JFFS2_RUBIN is not set | ||
| 947 | # CONFIG_CRAMFS is not set | ||
| 948 | # CONFIG_VXFS_FS is not set | ||
| 949 | # CONFIG_HPFS_FS is not set | ||
| 950 | # CONFIG_QNX4FS_FS is not set | ||
| 951 | # CONFIG_SYSV_FS is not set | ||
| 952 | # CONFIG_UFS_FS is not set | ||
| 953 | |||
| 954 | # | ||
| 955 | # Network File Systems | ||
| 956 | # | ||
| 957 | CONFIG_NFS_FS=y | ||
| 958 | CONFIG_NFS_V3=y | ||
| 959 | # CONFIG_NFS_V3_ACL is not set | ||
| 960 | # CONFIG_NFS_V4 is not set | ||
| 961 | # CONFIG_NFS_DIRECTIO is not set | ||
| 962 | # CONFIG_NFSD is not set | ||
| 963 | CONFIG_ROOT_NFS=y | ||
| 964 | CONFIG_LOCKD=y | ||
| 965 | CONFIG_LOCKD_V4=y | ||
| 966 | CONFIG_NFS_COMMON=y | ||
| 967 | CONFIG_SUNRPC=y | ||
| 968 | # CONFIG_SUNRPC_BIND34 is not set | ||
| 969 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 970 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 971 | # CONFIG_SMB_FS is not set | ||
| 972 | # CONFIG_CIFS is not set | ||
| 973 | # CONFIG_NCP_FS is not set | ||
| 974 | # CONFIG_CODA_FS is not set | ||
| 975 | # CONFIG_AFS_FS is not set | ||
| 976 | |||
| 977 | # | ||
| 978 | # Partition Types | ||
| 979 | # | ||
| 980 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 981 | CONFIG_MSDOS_PARTITION=y | ||
| 982 | |||
| 983 | # | ||
| 984 | # Native Language Support | ||
| 985 | # | ||
| 986 | CONFIG_NLS=m | ||
| 987 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 988 | CONFIG_NLS_CODEPAGE_437=m | ||
| 989 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 990 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 991 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 992 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 993 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 994 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 995 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 996 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 997 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 998 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 999 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1000 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1001 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1002 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1003 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1004 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1005 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1006 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1007 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1008 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1009 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1010 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1011 | # CONFIG_NLS_ASCII is not set | ||
| 1012 | CONFIG_NLS_ISO8859_1=m | ||
| 1013 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1014 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1015 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1016 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1017 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1018 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1019 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1020 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1021 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1022 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1023 | # CONFIG_NLS_KOI8_R is not set | ||
| 1024 | # CONFIG_NLS_KOI8_U is not set | ||
| 1025 | # CONFIG_NLS_UTF8 is not set | ||
| 1026 | |||
| 1027 | # | ||
| 1028 | # Distributed Lock Manager | ||
| 1029 | # | ||
| 1030 | # CONFIG_DLM is not set | ||
| 1031 | |||
| 1032 | # | ||
| 1033 | # Profiling support | ||
| 1034 | # | ||
| 1035 | # CONFIG_PROFILING is not set | ||
| 1036 | |||
| 1037 | # | ||
| 1038 | # Kernel hacking | ||
| 1039 | # | ||
| 1040 | # CONFIG_PRINTK_TIME is not set | ||
| 1041 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1042 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1043 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1044 | # CONFIG_DEBUG_FS is not set | ||
| 1045 | # CONFIG_HEADERS_CHECK is not set | ||
| 1046 | # CONFIG_DEBUG_KERNEL is not set | ||
| 1047 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1048 | CONFIG_FRAME_POINTER=y | ||
| 1049 | # CONFIG_DEBUG_USER is not set | ||
| 1050 | |||
| 1051 | # | ||
| 1052 | # Security options | ||
| 1053 | # | ||
| 1054 | # CONFIG_KEYS is not set | ||
| 1055 | # CONFIG_SECURITY is not set | ||
| 1056 | # CONFIG_CRYPTO is not set | ||
| 1057 | |||
| 1058 | # | ||
| 1059 | # Library routines | ||
| 1060 | # | ||
| 1061 | CONFIG_BITREVERSE=y | ||
| 1062 | # CONFIG_CRC_CCITT is not set | ||
| 1063 | # CONFIG_CRC16 is not set | ||
| 1064 | # CONFIG_CRC_ITU_T is not set | ||
| 1065 | CONFIG_CRC32=y | ||
| 1066 | # CONFIG_CRC7 is not set | ||
| 1067 | # CONFIG_LIBCRC32C is not set | ||
| 1068 | CONFIG_ZLIB_INFLATE=y | ||
| 1069 | CONFIG_ZLIB_DEFLATE=y | ||
| 1070 | CONFIG_PLIST=y | ||
| 1071 | CONFIG_HAS_IOMEM=y | ||
| 1072 | CONFIG_HAS_IOPORT=y | ||
| 1073 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index a2dd930d11ef..e5747547b44c 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
| @@ -279,6 +279,25 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) | |||
| 279 | } | 279 | } |
| 280 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); | 280 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); |
| 281 | 281 | ||
| 282 | static void __init pci_fixup_it8152(struct pci_dev *dev) | ||
| 283 | { | ||
| 284 | int i; | ||
| 285 | /* fixup for ITE 8152 devices */ | ||
| 286 | /* FIXME: add defines for class 0x68000 and 0x80103 */ | ||
| 287 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST || | ||
| 288 | dev->class == 0x68000 || | ||
| 289 | dev->class == 0x80103) { | ||
| 290 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | ||
| 291 | dev->resource[i].start = 0; | ||
| 292 | dev->resource[i].end = 0; | ||
| 293 | dev->resource[i].flags = 0; | ||
| 294 | } | ||
| 295 | } | ||
| 296 | } | ||
| 297 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8152, pci_fixup_it8152); | ||
| 298 | |||
| 299 | |||
| 300 | |||
| 282 | void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) | 301 | void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) |
| 283 | { | 302 | { |
| 284 | if (debug_pci) | 303 | if (debug_pci) |
| @@ -292,9 +311,12 @@ void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) | |||
| 292 | */ | 311 | */ |
| 293 | static inline int pdev_bad_for_parity(struct pci_dev *dev) | 312 | static inline int pdev_bad_for_parity(struct pci_dev *dev) |
| 294 | { | 313 | { |
| 295 | return (dev->vendor == PCI_VENDOR_ID_INTERG && | 314 | return ((dev->vendor == PCI_VENDOR_ID_INTERG && |
| 296 | (dev->device == PCI_DEVICE_ID_INTERG_2000 || | 315 | (dev->device == PCI_DEVICE_ID_INTERG_2000 || |
| 297 | dev->device == PCI_DEVICE_ID_INTERG_2010)); | 316 | dev->device == PCI_DEVICE_ID_INTERG_2010)) || |
| 317 | (dev->vendor == PCI_VENDOR_ID_ITE && | ||
| 318 | dev->device == PCI_DEVICE_ID_ITE_8152)); | ||
| 319 | |||
| 298 | } | 320 | } |
| 299 | 321 | ||
| 300 | /* | 322 | /* |
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index a98d0c933db0..cecf658e3625 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S | |||
| @@ -361,6 +361,7 @@ | |||
| 361 | CALL(sys_signalfd) | 361 | CALL(sys_signalfd) |
| 362 | /* 350 */ CALL(sys_timerfd) | 362 | /* 350 */ CALL(sys_timerfd) |
| 363 | CALL(sys_eventfd) | 363 | CALL(sys_eventfd) |
| 364 | CALL(sys_fallocate) | ||
| 364 | #ifndef syscalls_counted | 365 | #ifndef syscalls_counted |
| 365 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls | 366 | .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls |
| 366 | #define syscalls_counted | 367 | #define syscalls_counted |
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S index 7baadae7cb27..062c111c572f 100644 --- a/arch/arm/kernel/relocate_kernel.S +++ b/arch/arm/kernel/relocate_kernel.S | |||
| @@ -7,6 +7,23 @@ | |||
| 7 | .globl relocate_new_kernel | 7 | .globl relocate_new_kernel |
| 8 | relocate_new_kernel: | 8 | relocate_new_kernel: |
| 9 | 9 | ||
| 10 | /* Move boot params back to where the kernel expects them */ | ||
| 11 | |||
| 12 | ldr r0,kexec_boot_params_address | ||
| 13 | teq r0,#0 | ||
| 14 | beq 8f | ||
| 15 | |||
| 16 | ldr r1,kexec_boot_params_copy | ||
| 17 | mov r6,#KEXEC_BOOT_PARAMS_SIZE/4 | ||
| 18 | 7: | ||
| 19 | ldr r5,[r1],#4 | ||
| 20 | str r5,[r0],#4 | ||
| 21 | subs r6,r6,#1 | ||
| 22 | bne 7b | ||
| 23 | |||
| 24 | 8: | ||
| 25 | /* Boot params moved, now go on with the kernel */ | ||
| 26 | |||
| 10 | ldr r0,kexec_indirection_page | 27 | ldr r0,kexec_indirection_page |
| 11 | ldr r1,kexec_start_address | 28 | ldr r1,kexec_start_address |
| 12 | 29 | ||
| @@ -50,7 +67,7 @@ relocate_new_kernel: | |||
| 50 | mov lr,r1 | 67 | mov lr,r1 |
| 51 | mov r0,#0 | 68 | mov r0,#0 |
| 52 | ldr r1,kexec_mach_type | 69 | ldr r1,kexec_mach_type |
| 53 | mov r2,#0 | 70 | ldr r2,kexec_boot_params_address |
| 54 | mov pc,lr | 71 | mov pc,lr |
| 55 | 72 | ||
| 56 | .globl kexec_start_address | 73 | .globl kexec_start_address |
| @@ -65,6 +82,16 @@ kexec_indirection_page: | |||
| 65 | kexec_mach_type: | 82 | kexec_mach_type: |
| 66 | .long 0x0 | 83 | .long 0x0 |
| 67 | 84 | ||
| 85 | /* phy addr where new kernel will expect to find boot params */ | ||
| 86 | .globl kexec_boot_params_address | ||
| 87 | kexec_boot_params_address: | ||
| 88 | .long 0x0 | ||
| 89 | |||
| 90 | /* phy addr where old kernel put a copy of orig boot params */ | ||
| 91 | .globl kexec_boot_params_copy | ||
| 92 | kexec_boot_params_copy: | ||
| 93 | .long 0x0 | ||
| 94 | |||
| 68 | relocate_new_kernel_end: | 95 | relocate_new_kernel_end: |
| 69 | 96 | ||
| 70 | .globl relocate_new_kernel_size | 97 | .globl relocate_new_kernel_size |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 4de432ec903a..bf56eb337df1 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/smp.h> | 25 | #include <linux/smp.h> |
| 26 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
| 27 | #include <linux/kexec.h> | ||
| 27 | 28 | ||
| 28 | #include <asm/cpu.h> | 29 | #include <asm/cpu.h> |
| 29 | #include <asm/elf.h> | 30 | #include <asm/elf.h> |
| @@ -304,10 +305,23 @@ int cpu_architecture(void) | |||
| 304 | cpu_arch = (processor_id >> 16) & 7; | 305 | cpu_arch = (processor_id >> 16) & 7; |
| 305 | if (cpu_arch) | 306 | if (cpu_arch) |
| 306 | cpu_arch += CPU_ARCH_ARMv3; | 307 | cpu_arch += CPU_ARCH_ARMv3; |
| 307 | } else { | 308 | } else if ((processor_id & 0x000f0000) == 0x000f0000) { |
| 308 | /* the revised CPUID */ | 309 | unsigned int mmfr0; |
| 309 | cpu_arch = ((processor_id >> 12) & 0xf) - 0xb + CPU_ARCH_ARMv6; | 310 | |
| 310 | } | 311 | /* Revised CPUID format. Read the Memory Model Feature |
| 312 | * Register 0 and check for VMSAv7 or PMSAv7 */ | ||
| 313 | asm("mrc p15, 0, %0, c0, c1, 4" | ||
| 314 | : "=r" (mmfr0)); | ||
| 315 | if ((mmfr0 & 0x0000000f) == 0x00000003 || | ||
| 316 | (mmfr0 & 0x000000f0) == 0x00000030) | ||
| 317 | cpu_arch = CPU_ARCH_ARMv7; | ||
| 318 | else if ((mmfr0 & 0x0000000f) == 0x00000002 || | ||
| 319 | (mmfr0 & 0x000000f0) == 0x00000020) | ||
| 320 | cpu_arch = CPU_ARCH_ARMv6; | ||
| 321 | else | ||
| 322 | cpu_arch = CPU_ARCH_UNKNOWN; | ||
| 323 | } else | ||
| 324 | cpu_arch = CPU_ARCH_UNKNOWN; | ||
| 311 | 325 | ||
| 312 | return cpu_arch; | 326 | return cpu_arch; |
| 313 | } | 327 | } |
| @@ -770,6 +784,23 @@ static int __init customize_machine(void) | |||
| 770 | } | 784 | } |
| 771 | arch_initcall(customize_machine); | 785 | arch_initcall(customize_machine); |
| 772 | 786 | ||
| 787 | #ifdef CONFIG_KEXEC | ||
| 788 | |||
| 789 | /* Physical addr of where the boot params should be for this machine */ | ||
| 790 | extern unsigned long kexec_boot_params_address; | ||
| 791 | |||
| 792 | /* Physical addr of the buffer into which the boot params are copied */ | ||
| 793 | extern unsigned long kexec_boot_params_copy; | ||
| 794 | |||
| 795 | /* Pointer to the boot params buffer, for manipulation and display */ | ||
| 796 | unsigned long kexec_boot_params; | ||
| 797 | EXPORT_SYMBOL(kexec_boot_params); | ||
| 798 | |||
| 799 | /* The buffer itself - make sure it is sized correctly */ | ||
| 800 | static unsigned long kexec_boot_params_buf[(KEXEC_BOOT_PARAMS_SIZE + 3) / 4]; | ||
| 801 | |||
| 802 | #endif | ||
| 803 | |||
| 773 | void __init setup_arch(char **cmdline_p) | 804 | void __init setup_arch(char **cmdline_p) |
| 774 | { | 805 | { |
| 775 | struct tag *tags = (struct tag *)&init_tags; | 806 | struct tag *tags = (struct tag *)&init_tags; |
| @@ -788,6 +819,18 @@ void __init setup_arch(char **cmdline_p) | |||
| 788 | else if (mdesc->boot_params) | 819 | else if (mdesc->boot_params) |
| 789 | tags = phys_to_virt(mdesc->boot_params); | 820 | tags = phys_to_virt(mdesc->boot_params); |
| 790 | 821 | ||
| 822 | #ifdef CONFIG_KEXEC | ||
| 823 | kexec_boot_params_copy = virt_to_phys(kexec_boot_params_buf); | ||
| 824 | kexec_boot_params = (unsigned long)kexec_boot_params_buf; | ||
| 825 | if (__atags_pointer) { | ||
| 826 | kexec_boot_params_address = __atags_pointer; | ||
| 827 | memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE); | ||
| 828 | } else if (mdesc->boot_params) { | ||
| 829 | kexec_boot_params_address = mdesc->boot_params; | ||
| 830 | memcpy((void *)kexec_boot_params, tags, KEXEC_BOOT_PARAMS_SIZE); | ||
| 831 | } | ||
| 832 | #endif | ||
| 833 | |||
| 791 | /* | 834 | /* |
| 792 | * If we have the old style parameters, convert them to | 835 | * If we have the old style parameters, convert them to |
| 793 | * a tag list. | 836 | * a tag list. |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a31157f1655a..05a9f8a1b45e 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
| @@ -7,6 +7,8 @@ choice | |||
| 7 | 7 | ||
| 8 | config ARCH_AT91RM9200 | 8 | config ARCH_AT91RM9200 |
| 9 | bool "AT91RM9200" | 9 | bool "AT91RM9200" |
| 10 | select GENERIC_TIME | ||
| 11 | select GENERIC_CLOCKEVENTS | ||
| 10 | 12 | ||
| 11 | config ARCH_AT91SAM9260 | 13 | config ARCH_AT91SAM9260 |
| 12 | bool "AT91SAM9260 or AT91SAM9XE" | 14 | bool "AT91SAM9260 or AT91SAM9XE" |
| @@ -20,8 +22,15 @@ config ARCH_AT91SAM9263 | |||
| 20 | config ARCH_AT91SAM9RL | 22 | config ARCH_AT91SAM9RL |
| 21 | bool "AT91SAM9RL" | 23 | bool "AT91SAM9RL" |
| 22 | 24 | ||
| 25 | config ARCH_AT91X40 | ||
| 26 | bool "AT91x40" | ||
| 27 | |||
| 23 | endchoice | 28 | endchoice |
| 24 | 29 | ||
| 30 | config AT91_PMC_UNIT | ||
| 31 | bool | ||
| 32 | default !ARCH_AT91X40 | ||
| 33 | |||
| 25 | # ---------------------------------------------------------- | 34 | # ---------------------------------------------------------- |
| 26 | 35 | ||
| 27 | if ARCH_AT91RM9200 | 36 | if ARCH_AT91RM9200 |
| @@ -169,6 +178,22 @@ endif | |||
| 169 | 178 | ||
| 170 | # ---------------------------------------------------------- | 179 | # ---------------------------------------------------------- |
| 171 | 180 | ||
| 181 | if ARCH_AT91X40 | ||
| 182 | |||
| 183 | comment "AT91X40 Board Type" | ||
| 184 | |||
| 185 | config MACH_AT91EB01 | ||
| 186 | bool "Atmel AT91EB01 Evaluation Kit" | ||
| 187 | help | ||
| 188 | Select this if you are using Atmel's AT91EB01 Evaluation Kit. | ||
| 189 | It is also a popular target for simulators such as GDB's | ||
| 190 | ARM simulator (commonly known as the ARMulator) and the | ||
| 191 | Skyeye simulator. | ||
| 192 | |||
| 193 | endif | ||
| 194 | |||
| 195 | # ---------------------------------------------------------- | ||
| 196 | |||
| 172 | comment "AT91 Board Options" | 197 | comment "AT91 Board Options" |
| 173 | 198 | ||
| 174 | config MTD_AT91_DATAFLASH_CARD | 199 | config MTD_AT91_DATAFLASH_CARD |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a4d80eb056ee..a21f08c64ea6 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
| @@ -2,11 +2,12 @@ | |||
| 2 | # Makefile for the linux kernel. | 2 | # Makefile for the linux kernel. |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | obj-y := clock.o irq.o gpio.o | 5 | obj-y := irq.o gpio.o |
| 6 | obj-m := | 6 | obj-m := |
| 7 | obj-n := | 7 | obj-n := |
| 8 | obj- := | 8 | obj- := |
| 9 | 9 | ||
| 10 | obj-$(CONFIG_AT91_PMC_UNIT) += clock.o | ||
| 10 | obj-$(CONFIG_PM) += pm.o | 11 | obj-$(CONFIG_PM) += pm.o |
| 11 | 12 | ||
| 12 | # CPU-specific support | 13 | # CPU-specific support |
| @@ -15,6 +16,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_d | |||
| 15 | obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o | 16 | obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o |
| 16 | obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o | 17 | obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o |
| 17 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o | 18 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o |
| 19 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | ||
| 18 | 20 | ||
| 19 | # AT91RM9200 board-specific support | 21 | # AT91RM9200 board-specific support |
| 20 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o | 22 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o |
| @@ -27,6 +29,7 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o | |||
| 27 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o | 29 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o |
| 28 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o | 30 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o |
| 29 | obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o | 31 | obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o |
| 32 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o | ||
| 30 | 33 | ||
| 31 | # AT91SAM9260 board-specific support | 34 | # AT91SAM9260 board-specific support |
| 32 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o | 35 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index a6340357585d..50392ff71513 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
| @@ -19,70 +19,64 @@ | |||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #include <linux/init.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
| 25 | #include <linux/kernel.h> | 25 | #include <linux/clockchips.h> |
| 26 | #include <linux/sched.h> | ||
| 27 | #include <linux/time.h> | ||
| 28 | 26 | ||
| 29 | #include <asm/hardware.h> | ||
| 30 | #include <asm/io.h> | ||
| 31 | #include <asm/mach/time.h> | 27 | #include <asm/mach/time.h> |
| 32 | 28 | ||
| 33 | #include <asm/arch/at91_st.h> | 29 | #include <asm/arch/at91_st.h> |
| 34 | 30 | ||
| 35 | static unsigned long last_crtr; | 31 | static unsigned long last_crtr; |
| 32 | static u32 irqmask; | ||
| 33 | static struct clock_event_device clkevt; | ||
| 36 | 34 | ||
| 37 | /* | 35 | /* |
| 38 | * The ST_CRTR is updated asynchronously to the master clock. It is therefore | 36 | * The ST_CRTR is updated asynchronously to the master clock ... but |
| 39 | * necessary to read it twice (with the same value) to ensure accuracy. | 37 | * the updates as seen by the CPU don't seem to be strictly monotonic. |
| 38 | * Waiting until we read the same value twice avoids glitching. | ||
| 40 | */ | 39 | */ |
| 41 | static inline unsigned long read_CRTR(void) { | 40 | static inline unsigned long read_CRTR(void) |
| 41 | { | ||
| 42 | unsigned long x1, x2; | 42 | unsigned long x1, x2; |
| 43 | 43 | ||
| 44 | x1 = at91_sys_read(AT91_ST_CRTR); | ||
| 44 | do { | 45 | do { |
| 45 | x1 = at91_sys_read(AT91_ST_CRTR); | ||
| 46 | x2 = at91_sys_read(AT91_ST_CRTR); | 46 | x2 = at91_sys_read(AT91_ST_CRTR); |
| 47 | } while (x1 != x2); | 47 | if (x1 == x2) |
| 48 | 48 | break; | |
| 49 | x1 = x2; | ||
| 50 | } while (1); | ||
| 49 | return x1; | 51 | return x1; |
| 50 | } | 52 | } |
| 51 | 53 | ||
| 52 | /* | 54 | /* |
| 53 | * Returns number of microseconds since last timer interrupt. Note that interrupts | ||
| 54 | * will have been disabled by do_gettimeofday() | ||
| 55 | * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. | ||
| 56 | * 'tick' is usecs per jiffy (linux/timex.h). | ||
| 57 | */ | ||
| 58 | static unsigned long at91rm9200_gettimeoffset(void) | ||
| 59 | { | ||
| 60 | unsigned long elapsed; | ||
| 61 | |||
| 62 | elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV; | ||
| 63 | |||
| 64 | return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; | ||
| 65 | } | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ handler for the timer. | 55 | * IRQ handler for the timer. |
| 69 | */ | 56 | */ |
| 70 | static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) | 57 | static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) |
| 71 | { | 58 | { |
| 72 | if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */ | 59 | u32 sr = at91_sys_read(AT91_ST_SR) & irqmask; |
| 73 | write_seqlock(&xtime_lock); | ||
| 74 | 60 | ||
| 75 | while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) { | 61 | /* simulate "oneshot" timer with alarm */ |
| 76 | timer_tick(); | 62 | if (sr & AT91_ST_ALMS) { |
| 77 | last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV; | 63 | clkevt.event_handler(&clkevt); |
| 78 | } | 64 | return IRQ_HANDLED; |
| 65 | } | ||
| 79 | 66 | ||
| 80 | write_sequnlock(&xtime_lock); | 67 | /* periodic mode should handle delayed ticks */ |
| 68 | if (sr & AT91_ST_PITS) { | ||
| 69 | u32 crtr = read_CRTR(); | ||
| 81 | 70 | ||
| 71 | while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { | ||
| 72 | last_crtr += LATCH; | ||
| 73 | clkevt.event_handler(&clkevt); | ||
| 74 | } | ||
| 82 | return IRQ_HANDLED; | 75 | return IRQ_HANDLED; |
| 83 | } | 76 | } |
| 84 | else | 77 | |
| 85 | return IRQ_NONE; /* not handled */ | 78 | /* this irq is shared ... */ |
| 79 | return IRQ_NONE; | ||
| 86 | } | 80 | } |
| 87 | 81 | ||
| 88 | static struct irqaction at91rm9200_timer_irq = { | 82 | static struct irqaction at91rm9200_timer_irq = { |
| @@ -91,56 +85,127 @@ static struct irqaction at91rm9200_timer_irq = { | |||
| 91 | .handler = at91rm9200_timer_interrupt | 85 | .handler = at91rm9200_timer_interrupt |
| 92 | }; | 86 | }; |
| 93 | 87 | ||
| 94 | void at91rm9200_timer_reset(void) | 88 | static cycle_t read_clk32k(void) |
| 95 | { | 89 | { |
| 96 | last_crtr = 0; | 90 | return read_CRTR(); |
| 91 | } | ||
| 97 | 92 | ||
| 98 | /* Real time counter incremented every 30.51758 microseconds */ | 93 | static struct clocksource clk32k = { |
| 99 | at91_sys_write(AT91_ST_RTMR, 1); | 94 | .name = "32k_counter", |
| 95 | .rating = 150, | ||
| 96 | .read = read_clk32k, | ||
| 97 | .mask = CLOCKSOURCE_MASK(20), | ||
| 98 | .shift = 10, | ||
| 99 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 100 | }; | ||
| 101 | |||
| 102 | static void | ||
| 103 | clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) | ||
| 104 | { | ||
| 105 | /* Disable and flush pending timer interrupts */ | ||
| 106 | at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS); | ||
| 107 | (void) at91_sys_read(AT91_ST_SR); | ||
| 100 | 108 | ||
| 101 | /* Set Period Interval timer */ | 109 | last_crtr = read_CRTR(); |
| 102 | at91_sys_write(AT91_ST_PIMR, LATCH); | 110 | switch (mode) { |
| 111 | case CLOCK_EVT_MODE_PERIODIC: | ||
| 112 | /* PIT for periodic irqs; fixed rate of 1/HZ */ | ||
| 113 | irqmask = AT91_ST_PITS; | ||
| 114 | at91_sys_write(AT91_ST_PIMR, LATCH); | ||
| 115 | break; | ||
| 116 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 117 | /* ALM for oneshot irqs, set by next_event() | ||
| 118 | * before 32 seconds have passed | ||
| 119 | */ | ||
| 120 | irqmask = AT91_ST_ALMS; | ||
| 121 | at91_sys_write(AT91_ST_RTAR, last_crtr); | ||
| 122 | break; | ||
| 123 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 124 | case CLOCK_EVT_MODE_UNUSED: | ||
| 125 | case CLOCK_EVT_MODE_RESUME: | ||
| 126 | irqmask = 0; | ||
| 127 | break; | ||
| 128 | } | ||
| 129 | at91_sys_write(AT91_ST_IER, irqmask); | ||
| 130 | } | ||
| 103 | 131 | ||
| 104 | /* Clear any pending interrupts */ | 132 | static int |
| 133 | clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) | ||
| 134 | { | ||
| 135 | unsigned long flags; | ||
| 136 | u32 alm; | ||
| 137 | int status = 0; | ||
| 138 | |||
| 139 | BUG_ON(delta < 2); | ||
| 140 | |||
| 141 | /* Use "raw" primitives so we behave correctly on RT kernels. */ | ||
| 142 | raw_local_irq_save(flags); | ||
| 143 | |||
| 144 | /* The alarm IRQ uses absolute time (now+delta), not the relative | ||
| 145 | * time (delta) in our calling convention. Like all clockevents | ||
| 146 | * using such "match" hardware, we have a race to defend against. | ||
| 147 | * | ||
| 148 | * Our defense here is to have set up the clockevent device so the | ||
| 149 | * delta is at least two. That way we never end up writing RTAR | ||
| 150 | * with the value then held in CRTR ... which would mean the match | ||
| 151 | * wouldn't trigger until 32 seconds later, after CRTR wraps. | ||
| 152 | */ | ||
| 153 | alm = read_CRTR(); | ||
| 154 | |||
| 155 | /* Cancel any pending alarm; flush any pending IRQ */ | ||
| 156 | at91_sys_write(AT91_ST_RTAR, alm); | ||
| 105 | (void) at91_sys_read(AT91_ST_SR); | 157 | (void) at91_sys_read(AT91_ST_SR); |
| 106 | 158 | ||
| 107 | /* Enable Period Interval Timer interrupt */ | 159 | /* Schedule alarm by writing RTAR. */ |
| 108 | at91_sys_write(AT91_ST_IER, AT91_ST_PITS); | 160 | alm += delta; |
| 161 | at91_sys_write(AT91_ST_RTAR, alm); | ||
| 162 | |||
| 163 | raw_local_irq_restore(flags); | ||
| 164 | return status; | ||
| 109 | } | 165 | } |
| 110 | 166 | ||
| 167 | static struct clock_event_device clkevt = { | ||
| 168 | .name = "at91_tick", | ||
| 169 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 170 | .shift = 32, | ||
| 171 | .rating = 150, | ||
| 172 | .cpumask = CPU_MASK_CPU0, | ||
| 173 | .set_next_event = clkevt32k_next_event, | ||
| 174 | .set_mode = clkevt32k_mode, | ||
| 175 | }; | ||
| 176 | |||
| 111 | /* | 177 | /* |
| 112 | * Set up timer interrupt. | 178 | * ST (system timer) module supports both clockevents and clocksource. |
| 113 | */ | 179 | */ |
| 114 | void __init at91rm9200_timer_init(void) | 180 | void __init at91rm9200_timer_init(void) |
| 115 | { | 181 | { |
| 116 | /* Disable all timer interrupts */ | 182 | /* Disable all timer interrupts, and clear any pending ones */ |
| 117 | at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); | 183 | at91_sys_write(AT91_ST_IDR, |
| 118 | (void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */ | 184 | AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS); |
| 185 | (void) at91_sys_read(AT91_ST_SR); | ||
| 119 | 186 | ||
| 120 | /* Make IRQs happen for the system timer */ | 187 | /* Make IRQs happen for the system timer */ |
| 121 | setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq); | 188 | setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq); |
| 122 | 189 | ||
| 123 | /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */ | 190 | /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used |
| 124 | tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE; | 191 | * directly for the clocksource and all clockevents, after adjusting |
| 192 | * its prescaler from the 1 Hz default. | ||
| 193 | */ | ||
| 194 | at91_sys_write(AT91_ST_RTMR, 1); | ||
| 125 | 195 | ||
| 126 | /* Initialize and enable the timer interrupt */ | 196 | /* Setup timer clockevent, with minimum of two ticks (important!!) */ |
| 127 | at91rm9200_timer_reset(); | 197 | clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); |
| 128 | } | 198 | clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); |
| 199 | clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; | ||
| 200 | clkevt.cpumask = cpumask_of_cpu(0); | ||
| 201 | clockevents_register_device(&clkevt); | ||
| 129 | 202 | ||
| 130 | #ifdef CONFIG_PM | 203 | /* register clocksource */ |
| 131 | static void at91rm9200_timer_suspend(void) | 204 | clk32k.mult = clocksource_hz2mult(AT91_SLOW_CLOCK, clk32k.shift); |
| 132 | { | 205 | clocksource_register(&clk32k); |
| 133 | /* disable Period Interval Timer interrupt */ | ||
| 134 | at91_sys_write(AT91_ST_IDR, AT91_ST_PITS); | ||
| 135 | } | 206 | } |
| 136 | #else | ||
| 137 | #define at91rm9200_timer_suspend NULL | ||
| 138 | #endif | ||
| 139 | 207 | ||
| 140 | struct sys_timer at91rm9200_timer = { | 208 | struct sys_timer at91rm9200_timer = { |
| 141 | .init = at91rm9200_timer_init, | 209 | .init = at91rm9200_timer_init, |
| 142 | .offset = at91rm9200_gettimeoffset, | ||
| 143 | .suspend = at91rm9200_timer_suspend, | ||
| 144 | .resume = at91rm9200_timer_reset, | ||
| 145 | }; | 210 | }; |
| 146 | 211 | ||
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c new file mode 100644 index 000000000000..1de121fc55f4 --- /dev/null +++ b/arch/arm/mach-at91/at91x40.c | |||
| @@ -0,0 +1,67 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-at91/at91x40.c | ||
| 3 | * | ||
| 4 | * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com> | ||
| 5 | * Copyright (C) 2005 SAN People | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | #include <asm/arch/at91x40.h> | ||
| 18 | #include <asm/arch/at91_st.h> | ||
| 19 | #include "generic.h" | ||
| 20 | |||
| 21 | /* | ||
| 22 | * This is used in the gpio code, stub locally. | ||
| 23 | */ | ||
| 24 | int clk_enable(struct clk *clk) | ||
| 25 | { | ||
| 26 | return 0; | ||
| 27 | } | ||
| 28 | |||
| 29 | void __init at91x40_initialize(unsigned long main_clock) | ||
| 30 | { | ||
| 31 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | ||
| 32 | | (1 << AT91X40_ID_IRQ2); | ||
| 33 | } | ||
| 34 | |||
| 35 | /* | ||
| 36 | * The default interrupt priority levels (0 = lowest, 7 = highest). | ||
| 37 | */ | ||
| 38 | static unsigned int at91x40_default_irq_priority[NR_AIC_IRQS] __initdata = { | ||
| 39 | 7, /* Advanced Interrupt Controller (FIQ) */ | ||
| 40 | 0, /* System Peripherals */ | ||
| 41 | 0, /* USART 0 */ | ||
| 42 | 0, /* USART 1 */ | ||
| 43 | 2, /* Timer Counter 0 */ | ||
| 44 | 2, /* Timer Counter 1 */ | ||
| 45 | 2, /* Timer Counter 2 */ | ||
| 46 | 0, /* Watchdog timer */ | ||
| 47 | 0, /* Parallel IO Controller A */ | ||
| 48 | 0, /* Reserved */ | ||
| 49 | 0, /* Reserved */ | ||
| 50 | 0, /* Reserved */ | ||
| 51 | 0, /* Reserved */ | ||
| 52 | 0, /* Reserved */ | ||
| 53 | 0, /* Reserved */ | ||
| 54 | 0, /* Reserved */ | ||
| 55 | 0, /* External IRQ0 */ | ||
| 56 | 0, /* External IRQ1 */ | ||
| 57 | 0, /* External IRQ2 */ | ||
| 58 | }; | ||
| 59 | |||
| 60 | void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS]) | ||
| 61 | { | ||
| 62 | if (!priority) | ||
| 63 | priority = at91x40_default_irq_priority; | ||
| 64 | |||
| 65 | at91_aic_init(priority); | ||
| 66 | } | ||
| 67 | |||
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c new file mode 100644 index 000000000000..eddc882f1b4a --- /dev/null +++ b/arch/arm/mach-at91/at91x40_time.c | |||
| @@ -0,0 +1,80 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-at91/at91x40_time.c | ||
| 3 | * | ||
| 4 | * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/interrupt.h> | ||
| 24 | #include <linux/irq.h> | ||
| 25 | #include <linux/time.h> | ||
| 26 | #include <asm/hardware.h> | ||
| 27 | #include <asm/io.h> | ||
| 28 | #include <asm/mach/time.h> | ||
| 29 | #include <asm/arch/at91_tc.h> | ||
| 30 | |||
| 31 | /* | ||
| 32 | * 3 counter/timer units present. | ||
| 33 | */ | ||
| 34 | #define AT91_TC_CLK0BASE 0 | ||
| 35 | #define AT91_TC_CLK1BASE 0x40 | ||
| 36 | #define AT91_TC_CLK2BASE 0x80 | ||
| 37 | |||
| 38 | static unsigned long at91x40_gettimeoffset(void) | ||
| 39 | { | ||
| 40 | return (at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128)); | ||
| 41 | } | ||
| 42 | |||
| 43 | static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) | ||
| 44 | { | ||
| 45 | at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_SR); | ||
| 46 | timer_tick(); | ||
| 47 | return IRQ_HANDLED; | ||
| 48 | } | ||
| 49 | |||
| 50 | static struct irqaction at91x40_timer_irq = { | ||
| 51 | .name = "at91_tick", | ||
| 52 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
| 53 | .handler = at91x40_timer_interrupt | ||
| 54 | }; | ||
| 55 | |||
| 56 | void __init at91x40_timer_init(void) | ||
| 57 | { | ||
| 58 | unsigned int v; | ||
| 59 | |||
| 60 | at91_sys_write(AT91_TC + AT91_TC_BCR, 0); | ||
| 61 | v = at91_sys_read(AT91_TC + AT91_TC_BMR); | ||
| 62 | v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE; | ||
| 63 | at91_sys_write(AT91_TC + AT91_TC_BMR, v); | ||
| 64 | |||
| 65 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS); | ||
| 66 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG)); | ||
| 67 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff); | ||
| 68 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1); | ||
| 69 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4)); | ||
| 70 | |||
| 71 | setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq); | ||
| 72 | |||
| 73 | at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN)); | ||
| 74 | } | ||
| 75 | |||
| 76 | struct sys_timer at91x40_timer = { | ||
| 77 | .init = at91x40_timer_init, | ||
| 78 | .offset = at91x40_gettimeoffset, | ||
| 79 | }; | ||
| 80 | |||
diff --git a/arch/arm/mach-at91/board-eb01.c b/arch/arm/mach-at91/board-eb01.c new file mode 100644 index 000000000000..0c1e3858e7df --- /dev/null +++ b/arch/arm/mach-at91/board-eb01.c | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-at91/board-eb01.c | ||
| 3 | * | ||
| 4 | * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/module.h> | ||
| 24 | #include <linux/platform_device.h> | ||
| 25 | #include <linux/irq.h> | ||
| 26 | #include <asm/mach-types.h> | ||
| 27 | #include <asm/hardware.h> | ||
| 28 | #include <asm/mach/arch.h> | ||
| 29 | #include <asm/mach/map.h> | ||
| 30 | #include <asm/arch/board.h> | ||
| 31 | #include "generic.h" | ||
| 32 | |||
| 33 | static void __init at91eb01_map_io(void) | ||
| 34 | { | ||
| 35 | at91x40_initialize(40000000); | ||
| 36 | } | ||
| 37 | |||
| 38 | MACHINE_START(AT91EB01, "Atmel AT91 EB01") | ||
| 39 | /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ | ||
| 40 | .timer = &at91x40_timer, | ||
| 41 | .init_irq = at91x40_init_interrupts, | ||
| 42 | .map_io = at91eb01_map_io, | ||
| 43 | MACHINE_END | ||
| 44 | |||
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 68ed71a3e6c6..77d4c0a37842 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
| @@ -14,6 +14,7 @@ extern void __init at91sam9260_initialize(unsigned long main_clock); | |||
| 14 | extern void __init at91sam9261_initialize(unsigned long main_clock); | 14 | extern void __init at91sam9261_initialize(unsigned long main_clock); |
| 15 | extern void __init at91sam9263_initialize(unsigned long main_clock); | 15 | extern void __init at91sam9263_initialize(unsigned long main_clock); |
| 16 | extern void __init at91sam9rl_initialize(unsigned long main_clock); | 16 | extern void __init at91sam9rl_initialize(unsigned long main_clock); |
| 17 | extern void __init at91x40_initialize(unsigned long main_clock); | ||
| 17 | 18 | ||
| 18 | /* Interrupts */ | 19 | /* Interrupts */ |
| 19 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); | 20 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); |
| @@ -21,12 +22,14 @@ extern void __init at91sam9260_init_interrupts(unsigned int priority[]); | |||
| 21 | extern void __init at91sam9261_init_interrupts(unsigned int priority[]); | 22 | extern void __init at91sam9261_init_interrupts(unsigned int priority[]); |
| 22 | extern void __init at91sam9263_init_interrupts(unsigned int priority[]); | 23 | extern void __init at91sam9263_init_interrupts(unsigned int priority[]); |
| 23 | extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); | 24 | extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); |
| 25 | extern void __init at91x40_init_interrupts(unsigned int priority[]); | ||
| 24 | extern void __init at91_aic_init(unsigned int priority[]); | 26 | extern void __init at91_aic_init(unsigned int priority[]); |
| 25 | 27 | ||
| 26 | /* Timer */ | 28 | /* Timer */ |
| 27 | struct sys_timer; | 29 | struct sys_timer; |
| 28 | extern struct sys_timer at91rm9200_timer; | 30 | extern struct sys_timer at91rm9200_timer; |
| 29 | extern struct sys_timer at91sam926x_timer; | 31 | extern struct sys_timer at91sam926x_timer; |
| 32 | extern struct sys_timer at91x40_timer; | ||
| 30 | 33 | ||
| 31 | /* Clocks */ | 34 | /* Clocks */ |
| 32 | extern int __init at91_clock_init(unsigned long main_clock); | 35 | extern int __init at91_clock_init(unsigned long main_clock); |
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index 4dde34f25e63..986205ec9269 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c | |||
| @@ -193,7 +193,11 @@ static struct irq_chip clps7500_no_chip = { | |||
| 193 | .unmask = cl7500_no_action, | 193 | .unmask = cl7500_no_action, |
| 194 | }; | 194 | }; |
| 195 | 195 | ||
| 196 | static struct irqaction irq_isa = { no_action, 0, CPU_MASK_NONE, "isa", NULL, NULL }; | 196 | static struct irqaction irq_isa = { |
| 197 | .handler = no_action, | ||
| 198 | .mask = CPU_MASK_NONE, | ||
| 199 | .name = "isa", | ||
| 200 | }; | ||
| 197 | 201 | ||
| 198 | static void __init clps7500_init_irq(void) | 202 | static void __init clps7500_init_irq(void) |
| 199 | { | 203 | { |
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index 575a21dabd2f..ea8549bfbef2 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig | |||
| @@ -27,6 +27,12 @@ config MACH_EDB9302A | |||
| 27 | Say 'Y' here if you want your kernel to support the Cirrus | 27 | Say 'Y' here if you want your kernel to support the Cirrus |
| 28 | Logic EDB9302A Evaluation Board. | 28 | Logic EDB9302A Evaluation Board. |
| 29 | 29 | ||
| 30 | config MACH_EDB9307 | ||
| 31 | bool "Support Cirrus Logic EDB9307" | ||
| 32 | help | ||
| 33 | Say 'Y' here if you want your kernel to support the Cirrus | ||
| 34 | Logic EDB9307 Evaluation Board. | ||
| 35 | |||
| 30 | config MACH_EDB9312 | 36 | config MACH_EDB9312 |
| 31 | bool "Support Cirrus Logic EDB9312" | 37 | bool "Support Cirrus Logic EDB9312" |
| 32 | help | 38 | help |
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index 0d3bf932654e..0ecf99761feb 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile | |||
| @@ -9,6 +9,7 @@ obj- := | |||
| 9 | obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o | 9 | obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o |
| 10 | obj-$(CONFIG_MACH_EDB9302) += edb9302.o | 10 | obj-$(CONFIG_MACH_EDB9302) += edb9302.o |
| 11 | obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o | 11 | obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o |
| 12 | obj-$(CONFIG_MACH_EDB9307) += edb9307.o | ||
| 12 | obj-$(CONFIG_MACH_EDB9312) += edb9312.o | 13 | obj-$(CONFIG_MACH_EDB9312) += edb9312.o |
| 13 | obj-$(CONFIG_MACH_EDB9315) += edb9315.o | 14 | obj-$(CONFIG_MACH_EDB9315) += edb9315.o |
| 14 | obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o | 15 | obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o |
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c new file mode 100644 index 000000000000..d6a5698da91f --- /dev/null +++ b/arch/arm/mach-ep93xx/edb9307.c | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ep93xx/edb9307.c | ||
| 3 | * Cirrus Logic EDB9307 support. | ||
| 4 | * | ||
| 5 | * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
| 10 | * your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/mm.h> | ||
| 16 | #include <linux/sched.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/ioport.h> | ||
| 19 | #include <linux/mtd/physmap.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <asm/io.h> | ||
| 22 | #include <asm/hardware.h> | ||
| 23 | #include <asm/mach-types.h> | ||
| 24 | #include <asm/mach/arch.h> | ||
| 25 | |||
| 26 | static struct physmap_flash_data edb9307_flash_data = { | ||
| 27 | .width = 4, | ||
| 28 | }; | ||
| 29 | |||
| 30 | static struct resource edb9307_flash_resource = { | ||
| 31 | .start = 0x60000000, | ||
| 32 | .end = 0x61ffffff, | ||
| 33 | .flags = IORESOURCE_MEM, | ||
| 34 | }; | ||
| 35 | |||
| 36 | static struct platform_device edb9307_flash = { | ||
| 37 | .name = "physmap-flash", | ||
| 38 | .id = 0, | ||
| 39 | .dev = { | ||
| 40 | .platform_data = &edb9307_flash_data, | ||
| 41 | }, | ||
| 42 | .num_resources = 1, | ||
| 43 | .resource = &edb9307_flash_resource, | ||
| 44 | }; | ||
| 45 | |||
| 46 | static struct ep93xx_eth_data edb9307_eth_data = { | ||
| 47 | .phy_id = 1, | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct resource edb9307_eth_resource[] = { | ||
| 51 | { | ||
| 52 | .start = EP93XX_ETHERNET_PHYS_BASE, | ||
| 53 | .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, | ||
| 54 | .flags = IORESOURCE_MEM, | ||
| 55 | }, { | ||
| 56 | .start = IRQ_EP93XX_ETHERNET, | ||
| 57 | .end = IRQ_EP93XX_ETHERNET, | ||
| 58 | .flags = IORESOURCE_IRQ, | ||
| 59 | } | ||
| 60 | }; | ||
| 61 | |||
| 62 | static struct platform_device edb9307_eth_device = { | ||
| 63 | .name = "ep93xx-eth", | ||
| 64 | .id = -1, | ||
| 65 | .dev = { | ||
| 66 | .platform_data = &edb9307_eth_data, | ||
| 67 | }, | ||
| 68 | .num_resources = 2, | ||
| 69 | .resource = edb9307_eth_resource, | ||
| 70 | }; | ||
| 71 | |||
| 72 | static void __init edb9307_init_machine(void) | ||
| 73 | { | ||
| 74 | ep93xx_init_devices(); | ||
| 75 | platform_device_register(&edb9307_flash); | ||
| 76 | |||
| 77 | memcpy(edb9307_eth_data.dev_addr, | ||
| 78 | (void *)(EP93XX_ETHERNET_BASE + 0x50), 6); | ||
| 79 | platform_device_register(&edb9307_eth_device); | ||
| 80 | } | ||
| 81 | |||
| 82 | MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") | ||
| 83 | /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ | ||
| 84 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
| 85 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
| 86 | .boot_params = 0x00000100, | ||
| 87 | .map_io = ep93xx_map_io, | ||
| 88 | .init_irq = ep93xx_init_irq, | ||
| 89 | .timer = &ep93xx_timer, | ||
| 90 | .init_machine = edb9307_init_machine, | ||
| 91 | MACHINE_END | ||
diff --git a/arch/arm/mach-footbridge/isa.c b/arch/arm/mach-footbridge/isa.c index 28846c7edaaf..725a219d0ed5 100644 --- a/arch/arm/mach-footbridge/isa.c +++ b/arch/arm/mach-footbridge/isa.c | |||
| @@ -12,6 +12,39 @@ | |||
| 12 | 12 | ||
| 13 | #include <asm/irq.h> | 13 | #include <asm/irq.h> |
| 14 | 14 | ||
| 15 | static struct resource rtc_resources[] = { | ||
| 16 | [0] = { | ||
| 17 | .start = 0x70, | ||
| 18 | .end = 0x73, | ||
| 19 | .flags = IORESOURCE_IO, | ||
| 20 | }, | ||
| 21 | [1] = { | ||
| 22 | .start = IRQ_ISA_RTC_ALARM, | ||
| 23 | .end = IRQ_ISA_RTC_ALARM, | ||
| 24 | .flags = IORESOURCE_IRQ, | ||
| 25 | } | ||
| 26 | }; | ||
| 27 | |||
| 28 | static struct platform_device rtc_device = { | ||
| 29 | .name = "rtc_cmos", | ||
| 30 | .id = -1, | ||
| 31 | .resource = rtc_resources, | ||
| 32 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
| 33 | }; | ||
| 34 | |||
| 35 | static struct resource serial_resources[] = { | ||
| 36 | [0] = { | ||
| 37 | .start = 0x3f8, | ||
| 38 | .end = 0x3ff, | ||
| 39 | .flags = IORESOURCE_IO, | ||
| 40 | }, | ||
| 41 | [1] = { | ||
| 42 | .start = 0x2f8, | ||
| 43 | .end = 0x2ff, | ||
| 44 | .flags = IORESOURCE_IO, | ||
| 45 | }, | ||
| 46 | }; | ||
| 47 | |||
| 15 | static struct plat_serial8250_port serial_platform_data[] = { | 48 | static struct plat_serial8250_port serial_platform_data[] = { |
| 16 | { | 49 | { |
| 17 | .iobase = 0x3f8, | 50 | .iobase = 0x3f8, |
| @@ -38,11 +71,21 @@ static struct platform_device serial_device = { | |||
| 38 | .dev = { | 71 | .dev = { |
| 39 | .platform_data = serial_platform_data, | 72 | .platform_data = serial_platform_data, |
| 40 | }, | 73 | }, |
| 74 | .resource = serial_resources, | ||
| 75 | .num_resources = ARRAY_SIZE(serial_resources), | ||
| 41 | }; | 76 | }; |
| 42 | 77 | ||
| 43 | static int __init footbridge_isa_init(void) | 78 | static int __init footbridge_isa_init(void) |
| 44 | { | 79 | { |
| 45 | return platform_device_register(&serial_device); | 80 | int err; |
| 81 | |||
| 82 | err = platform_device_register(&rtc_device); | ||
| 83 | if (err) | ||
| 84 | printk(KERN_ERR "Unable to register RTC device: %d\n", err); | ||
| 85 | err = platform_device_register(&serial_device); | ||
| 86 | if (err) | ||
| 87 | printk(KERN_ERR "Unable to register serial device: %d\n", err); | ||
| 88 | return 0; | ||
| 46 | } | 89 | } |
| 47 | 90 | ||
| 48 | arch_initcall(footbridge_isa_init); | 91 | arch_initcall(footbridge_isa_init); |
diff --git a/arch/arm/mach-ns9xxx/Makefile b/arch/arm/mach-ns9xxx/Makefile index 4476411b8140..6fb82b855a55 100644 --- a/arch/arm/mach-ns9xxx/Makefile +++ b/arch/arm/mach-ns9xxx/Makefile | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | obj-y := irq.o time.o generic.o | 1 | obj-y := irq.o time.o generic.o gpio.o |
| 2 | 2 | ||
| 3 | obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o | 3 | obj-$(CONFIG_MACH_CC9P9360DEV) += mach-cc9p9360dev.o |
| 4 | obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o | 4 | obj-$(CONFIG_MACH_CC9P9360JS) += mach-cc9p9360js.o |
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 925048e7adfe..0f65177f9e5f 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
| 14 | 14 | ||
| 15 | #include <asm/mach/map.h> | 15 | #include <asm/mach/map.h> |
| 16 | #include <asm/gpio.h> | ||
| 16 | 17 | ||
| 17 | #include <asm/arch-ns9xxx/board.h> | 18 | #include <asm/arch-ns9xxx/board.h> |
| 18 | #include <asm/arch-ns9xxx/regs-sys.h> | 19 | #include <asm/arch-ns9xxx/regs-sys.h> |
| @@ -44,7 +45,13 @@ static void a9m9750dev_fpga_ack_irq(unsigned int irq) | |||
| 44 | 45 | ||
| 45 | static void a9m9750dev_fpga_mask_irq(unsigned int irq) | 46 | static void a9m9750dev_fpga_mask_irq(unsigned int irq) |
| 46 | { | 47 | { |
| 47 | FPGA_IER &= ~(1 << (irq - FPGA_IRQ(0))); | 48 | u8 ier; |
| 49 | |||
| 50 | ier = __raw_readb(FPGA_IER); | ||
| 51 | |||
| 52 | ier &= ~(1 << (irq - FPGA_IRQ(0))); | ||
| 53 | |||
| 54 | __raw_writeb(ier, FPGA_IER); | ||
| 48 | } | 55 | } |
| 49 | 56 | ||
| 50 | static void a9m9750dev_fpga_maskack_irq(unsigned int irq) | 57 | static void a9m9750dev_fpga_maskack_irq(unsigned int irq) |
| @@ -55,7 +62,13 @@ static void a9m9750dev_fpga_maskack_irq(unsigned int irq) | |||
| 55 | 62 | ||
| 56 | static void a9m9750dev_fpga_unmask_irq(unsigned int irq) | 63 | static void a9m9750dev_fpga_unmask_irq(unsigned int irq) |
| 57 | { | 64 | { |
| 58 | FPGA_IER |= 1 << (irq - FPGA_IRQ(0)); | 65 | u8 ier; |
| 66 | |||
| 67 | ier = __raw_readb(FPGA_IER); | ||
| 68 | |||
| 69 | ier |= 1 << (irq - FPGA_IRQ(0)); | ||
| 70 | |||
| 71 | __raw_writeb(ier, FPGA_IER); | ||
| 59 | } | 72 | } |
| 60 | 73 | ||
| 61 | static struct irq_chip a9m9750dev_fpga_chip = { | 74 | static struct irq_chip a9m9750dev_fpga_chip = { |
| @@ -68,30 +81,34 @@ static struct irq_chip a9m9750dev_fpga_chip = { | |||
| 68 | static void a9m9750dev_fpga_demux_handler(unsigned int irq, | 81 | static void a9m9750dev_fpga_demux_handler(unsigned int irq, |
| 69 | struct irq_desc *desc) | 82 | struct irq_desc *desc) |
| 70 | { | 83 | { |
| 71 | int stat = FPGA_ISR; | 84 | u8 stat = __raw_readb(FPGA_ISR); |
| 85 | |||
| 86 | desc->chip->mask_ack(irq); | ||
| 72 | 87 | ||
| 73 | while (stat != 0) { | 88 | while (stat != 0) { |
| 74 | int irqno = fls(stat) - 1; | 89 | int irqno = fls(stat) - 1; |
| 90 | struct irq_desc *fpgadesc; | ||
| 75 | 91 | ||
| 76 | stat &= ~(1 << irqno); | 92 | stat &= ~(1 << irqno); |
| 77 | 93 | ||
| 78 | desc = irq_desc + FPGA_IRQ(irqno); | 94 | fpgadesc = irq_desc + FPGA_IRQ(irqno); |
| 79 | 95 | ||
| 80 | desc_handle_irq(FPGA_IRQ(irqno), desc); | 96 | desc_handle_irq(FPGA_IRQ(irqno), fpgadesc); |
| 81 | } | 97 | } |
| 98 | |||
| 99 | desc->chip->unmask(irq); | ||
| 82 | } | 100 | } |
| 83 | 101 | ||
| 84 | void __init board_a9m9750dev_init_irq(void) | 102 | void __init board_a9m9750dev_init_irq(void) |
| 85 | { | 103 | { |
| 86 | u32 reg; | 104 | u32 eic; |
| 87 | int i; | 105 | int i; |
| 88 | 106 | ||
| 89 | /* | 107 | if (gpio_request(11, "board a9m9750dev extirq2") == 0) |
| 90 | * configure gpio for IRQ_EXT2 | 108 | ns9xxx_gpio_configure(11, 0, 1); |
| 91 | * use GPIO 11, because GPIO 32 is used for the LCD | 109 | else |
| 92 | */ | 110 | printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n", |
| 93 | /* XXX: proper GPIO handling */ | 111 | __func__); |
| 94 | BBU_GCONFb1(1) &= ~0x2000; | ||
| 95 | 112 | ||
| 96 | for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { | 113 | for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { |
| 97 | set_irq_chip(i, &a9m9750dev_fpga_chip); | 114 | set_irq_chip(i, &a9m9750dev_fpga_chip); |
| @@ -100,10 +117,10 @@ void __init board_a9m9750dev_init_irq(void) | |||
| 100 | } | 117 | } |
| 101 | 118 | ||
| 102 | /* IRQ_EXT2: level sensitive + active low */ | 119 | /* IRQ_EXT2: level sensitive + active low */ |
| 103 | reg = SYS_EIC(2); | 120 | eic = __raw_readl(SYS_EIC(2)); |
| 104 | REGSET(reg, SYS_EIC, PLTY, AL); | 121 | REGSET(eic, SYS_EIC, PLTY, AL); |
| 105 | REGSET(reg, SYS_EIC, LVEDG, LEVEL); | 122 | REGSET(eic, SYS_EIC, LVEDG, LEVEL); |
| 106 | SYS_EIC(2) = reg; | 123 | __raw_writel(eic, SYS_EIC(2)); |
| 107 | 124 | ||
| 108 | set_irq_chained_handler(IRQ_EXT2, | 125 | set_irq_chained_handler(IRQ_EXT2, |
| 109 | a9m9750dev_fpga_demux_handler); | 126 | a9m9750dev_fpga_demux_handler); |
| @@ -167,17 +184,18 @@ void __init board_a9m9750dev_init_machine(void) | |||
| 167 | u32 reg; | 184 | u32 reg; |
| 168 | 185 | ||
| 169 | /* setup static CS0: memory base ... */ | 186 | /* setup static CS0: memory base ... */ |
| 170 | REGSETIM(SYS_SMCSSMB(0), SYS_SMCSSMB, CSxB, | 187 | reg = __raw_readl(SYS_SMCSSMB(0)); |
| 171 | NS9XXX_CSxSTAT_PHYS(0) >> 12); | 188 | REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12); |
| 189 | __raw_writel(reg, SYS_SMCSSMB(0)); | ||
| 172 | 190 | ||
| 173 | /* ... and mask */ | 191 | /* ... and mask */ |
| 174 | reg = SYS_SMCSSMM(0); | 192 | reg = __raw_readl(SYS_SMCSSMM(0)); |
| 175 | REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff); | 193 | REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff); |
| 176 | REGSET(reg, SYS_SMCSSMM, CSEx, EN); | 194 | REGSET(reg, SYS_SMCSSMM, CSEx, EN); |
| 177 | SYS_SMCSSMM(0) = reg; | 195 | __raw_writel(reg, SYS_SMCSSMM(0)); |
| 178 | 196 | ||
| 179 | /* setup static CS0: memory configuration */ | 197 | /* setup static CS0: memory configuration */ |
| 180 | reg = MEM_SMC(0); | 198 | reg = __raw_readl(MEM_SMC(0)); |
| 181 | REGSET(reg, MEM_SMC, PSMC, OFF); | 199 | REGSET(reg, MEM_SMC, PSMC, OFF); |
| 182 | REGSET(reg, MEM_SMC, BSMC, OFF); | 200 | REGSET(reg, MEM_SMC, BSMC, OFF); |
| 183 | REGSET(reg, MEM_SMC, EW, OFF); | 201 | REGSET(reg, MEM_SMC, EW, OFF); |
| @@ -185,13 +203,13 @@ void __init board_a9m9750dev_init_machine(void) | |||
| 185 | REGSET(reg, MEM_SMC, PC, AL); | 203 | REGSET(reg, MEM_SMC, PC, AL); |
| 186 | REGSET(reg, MEM_SMC, PM, DIS); | 204 | REGSET(reg, MEM_SMC, PM, DIS); |
| 187 | REGSET(reg, MEM_SMC, MW, 8); | 205 | REGSET(reg, MEM_SMC, MW, 8); |
| 188 | MEM_SMC(0) = reg; | 206 | __raw_writel(reg, MEM_SMC(0)); |
| 189 | 207 | ||
| 190 | /* setup static CS0: timing */ | 208 | /* setup static CS0: timing */ |
| 191 | MEM_SMWED(0) = 0x2; | 209 | __raw_writel(0x2, MEM_SMWED(0)); |
| 192 | MEM_SMOED(0) = 0x2; | 210 | __raw_writel(0x2, MEM_SMOED(0)); |
| 193 | MEM_SMRD(0) = 0x6; | 211 | __raw_writel(0x6, MEM_SMRD(0)); |
| 194 | MEM_SMWD(0) = 0x6; | 212 | __raw_writel(0x6, MEM_SMWD(0)); |
| 195 | 213 | ||
| 196 | platform_add_devices(board_a9m9750dev_devices, | 214 | platform_add_devices(board_a9m9750dev_devices, |
| 197 | ARRAY_SIZE(board_a9m9750dev_devices)); | 215 | ARRAY_SIZE(board_a9m9750dev_devices)); |
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c new file mode 100644 index 000000000000..b2230213b983 --- /dev/null +++ b/arch/arm/mach-ns9xxx/gpio.c | |||
| @@ -0,0 +1,190 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ns9xxx/gpio.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 by Digi International Inc. | ||
| 5 | * All rights reserved. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License version 2 as published by | ||
| 9 | * the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #include <linux/compiler.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/spinlock.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | |||
| 16 | #include <asm/arch-ns9xxx/gpio.h> | ||
| 17 | #include <asm/arch-ns9xxx/processor.h> | ||
| 18 | #include <asm/arch-ns9xxx/regs-bbu.h> | ||
| 19 | #include <asm/io.h> | ||
| 20 | #include <asm/bug.h> | ||
| 21 | #include <asm/types.h> | ||
| 22 | #include <asm/bitops.h> | ||
| 23 | |||
| 24 | #if defined(CONFIG_PROCESSOR_NS9360) | ||
| 25 | #define GPIO_MAX 72 | ||
| 26 | #elif defined(CONFIG_PROCESSOR_NS9750) | ||
| 27 | #define GPIO_MAX 49 | ||
| 28 | #endif | ||
| 29 | |||
| 30 | /* protects BBU_GCONFx and BBU_GCTRLx */ | ||
| 31 | static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock); | ||
| 32 | |||
| 33 | /* only access gpiores with atomic ops */ | ||
| 34 | static DECLARE_BITMAP(gpiores, GPIO_MAX); | ||
| 35 | |||
| 36 | static inline int ns9xxx_valid_gpio(unsigned gpio) | ||
| 37 | { | ||
| 38 | #if defined(CONFIG_PROCESSOR_NS9360) | ||
| 39 | if (processor_is_ns9360()) | ||
| 40 | return gpio <= 72; | ||
| 41 | else | ||
| 42 | #endif | ||
| 43 | #if defined(CONFIG_PROCESSOR_NS9750) | ||
| 44 | if (processor_is_ns9750()) | ||
| 45 | return gpio <= 49; | ||
| 46 | else | ||
| 47 | #endif | ||
| 48 | BUG(); | ||
| 49 | } | ||
| 50 | |||
| 51 | static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio) | ||
| 52 | { | ||
| 53 | if (gpio < 56) | ||
| 54 | return BBU_GCONFb1(gpio / 8); | ||
| 55 | else | ||
| 56 | /* | ||
| 57 | * this could be optimised away on | ||
| 58 | * ns9750 only builds, but it isn't ... | ||
| 59 | */ | ||
| 60 | return BBU_GCONFb2((gpio - 56) / 8); | ||
| 61 | } | ||
| 62 | |||
| 63 | static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio) | ||
| 64 | { | ||
| 65 | if (gpio < 32) | ||
| 66 | return BBU_GCTRL1; | ||
| 67 | else if (gpio < 64) | ||
| 68 | return BBU_GCTRL2; | ||
| 69 | else | ||
| 70 | /* this could be optimised away on ns9750 only builds */ | ||
| 71 | return BBU_GCTRL3; | ||
| 72 | } | ||
| 73 | |||
| 74 | static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio) | ||
| 75 | { | ||
| 76 | if (gpio < 32) | ||
| 77 | return BBU_GSTAT1; | ||
| 78 | else if (gpio < 64) | ||
| 79 | return BBU_GSTAT2; | ||
| 80 | else | ||
| 81 | /* this could be optimised away on ns9750 only builds */ | ||
| 82 | return BBU_GSTAT3; | ||
| 83 | } | ||
| 84 | |||
| 85 | int gpio_request(unsigned gpio, const char *label) | ||
| 86 | { | ||
| 87 | if (likely(ns9xxx_valid_gpio(gpio))) | ||
| 88 | return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0; | ||
| 89 | else | ||
| 90 | return -EINVAL; | ||
| 91 | } | ||
| 92 | EXPORT_SYMBOL(gpio_request); | ||
| 93 | |||
| 94 | void gpio_free(unsigned gpio) | ||
| 95 | { | ||
| 96 | clear_bit(gpio, gpiores); | ||
| 97 | return; | ||
| 98 | } | ||
| 99 | EXPORT_SYMBOL(gpio_free); | ||
| 100 | |||
| 101 | /* | ||
| 102 | * each gpio can serve for 4 different purposes [0..3]. These are called | ||
| 103 | * "functions" and passed in the parameter func. Functions 0-2 are always some | ||
| 104 | * special things, function 3 is GPIO. If func == 3 dir specifies input or | ||
| 105 | * output, and with inv you can enable an inverter (independent of func). | ||
| 106 | */ | ||
| 107 | static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func) | ||
| 108 | { | ||
| 109 | void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio); | ||
| 110 | u32 confval; | ||
| 111 | unsigned long flags; | ||
| 112 | |||
| 113 | spin_lock_irqsave(&gpio_lock, flags); | ||
| 114 | |||
| 115 | confval = __raw_readl(conf); | ||
| 116 | REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir); | ||
| 117 | REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv); | ||
| 118 | REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func); | ||
| 119 | __raw_writel(confval, conf); | ||
| 120 | |||
| 121 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
| 122 | |||
| 123 | return 0; | ||
| 124 | } | ||
| 125 | |||
| 126 | int ns9xxx_gpio_configure(unsigned gpio, int inv, int func) | ||
| 127 | { | ||
| 128 | if (likely(ns9xxx_valid_gpio(gpio))) { | ||
| 129 | if (func == 3) { | ||
| 130 | printk(KERN_WARNING "use gpio_direction_input " | ||
| 131 | "or gpio_direction_output\n"); | ||
| 132 | return -EINVAL; | ||
| 133 | } else | ||
| 134 | return __ns9xxx_gpio_configure(gpio, 0, inv, func); | ||
| 135 | } else | ||
| 136 | return -EINVAL; | ||
| 137 | } | ||
| 138 | EXPORT_SYMBOL(ns9xxx_gpio_configure); | ||
| 139 | |||
| 140 | int gpio_direction_input(unsigned gpio) | ||
| 141 | { | ||
| 142 | if (likely(ns9xxx_valid_gpio(gpio))) { | ||
| 143 | return __ns9xxx_gpio_configure(gpio, 0, 0, 3); | ||
| 144 | } else | ||
| 145 | return -EINVAL; | ||
| 146 | } | ||
| 147 | EXPORT_SYMBOL(gpio_direction_input); | ||
| 148 | |||
| 149 | int gpio_direction_output(unsigned gpio, int value) | ||
| 150 | { | ||
| 151 | if (likely(ns9xxx_valid_gpio(gpio))) { | ||
| 152 | gpio_set_value(gpio, value); | ||
| 153 | |||
| 154 | return __ns9xxx_gpio_configure(gpio, 1, 0, 3); | ||
| 155 | } else | ||
| 156 | return -EINVAL; | ||
| 157 | } | ||
| 158 | EXPORT_SYMBOL(gpio_direction_output); | ||
| 159 | |||
| 160 | int gpio_get_value(unsigned gpio) | ||
| 161 | { | ||
| 162 | void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio); | ||
| 163 | int ret; | ||
| 164 | |||
| 165 | ret = 1 & (__raw_readl(stat) >> (gpio & 31)); | ||
| 166 | |||
| 167 | return ret; | ||
| 168 | } | ||
| 169 | EXPORT_SYMBOL(gpio_get_value); | ||
| 170 | |||
| 171 | void gpio_set_value(unsigned gpio, int value) | ||
| 172 | { | ||
| 173 | void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio); | ||
| 174 | u32 ctrlval; | ||
| 175 | unsigned long flags; | ||
| 176 | |||
| 177 | spin_lock_irqsave(&gpio_lock, flags); | ||
| 178 | |||
| 179 | ctrlval = __raw_readl(ctrl); | ||
| 180 | |||
| 181 | if (value) | ||
| 182 | ctrlval |= 1 << (gpio & 31); | ||
| 183 | else | ||
| 184 | ctrlval &= ~(1 << (gpio & 31)); | ||
| 185 | |||
| 186 | __raw_writel(ctrlval, ctrl); | ||
| 187 | |||
| 188 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
| 189 | } | ||
| 190 | EXPORT_SYMBOL(gpio_set_value); | ||
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index b8c7b00522e6..00001b874e97 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | * the Free Software Foundation. | 9 | * the Free Software Foundation. |
| 10 | */ | 10 | */ |
| 11 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
| 12 | #include <asm/io.h> | ||
| 12 | #include <asm/mach/irq.h> | 13 | #include <asm/mach/irq.h> |
| 13 | #include <asm/mach-types.h> | 14 | #include <asm/mach-types.h> |
| 14 | #include <asm/arch-ns9xxx/regs-sys.h> | 15 | #include <asm/arch-ns9xxx/regs-sys.h> |
| @@ -17,48 +18,17 @@ | |||
| 17 | 18 | ||
| 18 | #include "generic.h" | 19 | #include "generic.h" |
| 19 | 20 | ||
| 20 | static void ns9xxx_ack_irq_timer(unsigned int irq) | ||
| 21 | { | ||
| 22 | u32 tc = SYS_TC(irq - IRQ_TIMER0); | ||
| 23 | |||
| 24 | /* | ||
| 25 | * If the timer is programmed to halt on terminal count, the | ||
| 26 | * timer must be disabled before clearing the interrupt. | ||
| 27 | */ | ||
| 28 | if (REGGET(tc, SYS_TCx, REN) == 0) { | ||
| 29 | REGSET(tc, SYS_TCx, TEN, DIS); | ||
| 30 | SYS_TC(irq - IRQ_TIMER0) = tc; | ||
| 31 | } | ||
| 32 | |||
| 33 | REGSET(tc, SYS_TCx, INTC, SET); | ||
| 34 | SYS_TC(irq - IRQ_TIMER0) = tc; | ||
| 35 | |||
| 36 | REGSET(tc, SYS_TCx, INTC, UNSET); | ||
| 37 | SYS_TC(irq - IRQ_TIMER0) = tc; | ||
| 38 | } | ||
| 39 | |||
| 40 | static void (*ns9xxx_ack_irq_functions[NR_IRQS])(unsigned int) = { | ||
| 41 | [IRQ_TIMER0] = ns9xxx_ack_irq_timer, | ||
| 42 | [IRQ_TIMER1] = ns9xxx_ack_irq_timer, | ||
| 43 | [IRQ_TIMER2] = ns9xxx_ack_irq_timer, | ||
| 44 | [IRQ_TIMER3] = ns9xxx_ack_irq_timer, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static void ns9xxx_mask_irq(unsigned int irq) | 21 | static void ns9xxx_mask_irq(unsigned int irq) |
| 48 | { | 22 | { |
| 49 | /* XXX: better use cpp symbols */ | 23 | /* XXX: better use cpp symbols */ |
| 50 | SYS_IC(irq / 4) &= ~(1 << (7 + 8 * (3 - (irq & 3)))); | 24 | u32 ic = __raw_readl(SYS_IC(irq / 4)); |
| 25 | ic &= ~(1 << (7 + 8 * (3 - (irq & 3)))); | ||
| 26 | __raw_writel(ic, SYS_IC(irq / 4)); | ||
| 51 | } | 27 | } |
| 52 | 28 | ||
| 53 | static void ns9xxx_ack_irq(unsigned int irq) | 29 | static void ns9xxx_ack_irq(unsigned int irq) |
| 54 | { | 30 | { |
| 55 | if (!ns9xxx_ack_irq_functions[irq]) { | 31 | __raw_writel(0, SYS_ISRADDR); |
| 56 | printk(KERN_ERR "no ack function for irq %u\n", irq); | ||
| 57 | BUG(); | ||
| 58 | } | ||
| 59 | |||
| 60 | ns9xxx_ack_irq_functions[irq](irq); | ||
| 61 | SYS_ISRADDR = 0; | ||
| 62 | } | 32 | } |
| 63 | 33 | ||
| 64 | static void ns9xxx_maskack_irq(unsigned int irq) | 34 | static void ns9xxx_maskack_irq(unsigned int irq) |
| @@ -70,7 +40,9 @@ static void ns9xxx_maskack_irq(unsigned int irq) | |||
| 70 | static void ns9xxx_unmask_irq(unsigned int irq) | 40 | static void ns9xxx_unmask_irq(unsigned int irq) |
| 71 | { | 41 | { |
| 72 | /* XXX: better use cpp symbols */ | 42 | /* XXX: better use cpp symbols */ |
| 73 | SYS_IC(irq / 4) |= 1 << (7 + 8 * (3 - (irq & 3))); | 43 | u32 ic = __raw_readl(SYS_IC(irq / 4)); |
| 44 | ic |= 1 << (7 + 8 * (3 - (irq & 3))); | ||
| 45 | __raw_writel(ic, SYS_IC(irq / 4)); | ||
| 74 | } | 46 | } |
| 75 | 47 | ||
| 76 | static struct irq_chip ns9xxx_chip = { | 48 | static struct irq_chip ns9xxx_chip = { |
| @@ -86,14 +58,14 @@ void __init ns9xxx_init_irq(void) | |||
| 86 | 58 | ||
| 87 | /* disable all IRQs */ | 59 | /* disable all IRQs */ |
| 88 | for (i = 0; i < 8; ++i) | 60 | for (i = 0; i < 8; ++i) |
| 89 | SYS_IC(i) = (4 * i) << 24 | (4 * i + 1) << 16 | | 61 | __raw_writel((4 * i) << 24 | (4 * i + 1) << 16 | |
| 90 | (4 * i + 2) << 8 | (4 * i + 3); | 62 | (4 * i + 2) << 8 | (4 * i + 3), SYS_IC(i)); |
| 91 | 63 | ||
| 92 | /* simple interrupt prio table: | 64 | /* simple interrupt prio table: |
| 93 | * prio(x) < prio(y) <=> x < y | 65 | * prio(x) < prio(y) <=> x < y |
| 94 | */ | 66 | */ |
| 95 | for (i = 0; i < 32; ++i) | 67 | for (i = 0; i < 32; ++i) |
| 96 | SYS_IVA(i) = i; | 68 | __raw_writel(i, SYS_IVA(i)); |
| 97 | 69 | ||
| 98 | for (i = IRQ_WATCHDOG; i <= IRQ_EXT3; ++i) { | 70 | for (i = IRQ_WATCHDOG; i <= IRQ_EXT3; ++i) { |
| 99 | set_irq_chip(i, &ns9xxx_chip); | 71 | set_irq_chip(i, &ns9xxx_chip); |
diff --git a/arch/arm/mach-ns9xxx/time.c b/arch/arm/mach-ns9xxx/time.c index b97d0c54a388..c3dd1f4acb99 100644 --- a/arch/arm/mach-ns9xxx/time.c +++ b/arch/arm/mach-ns9xxx/time.c | |||
| @@ -11,78 +11,174 @@ | |||
| 11 | #include <linux/jiffies.h> | 11 | #include <linux/jiffies.h> |
| 12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
| 14 | #include <linux/stringify.h> | ||
| 15 | #include <linux/clocksource.h> | ||
| 16 | #include <linux/clockchips.h> | ||
| 17 | |||
| 14 | #include <asm/arch-ns9xxx/regs-sys.h> | 18 | #include <asm/arch-ns9xxx/regs-sys.h> |
| 15 | #include <asm/arch-ns9xxx/clock.h> | 19 | #include <asm/arch-ns9xxx/clock.h> |
| 16 | #include <asm/arch-ns9xxx/irqs.h> | 20 | #include <asm/arch-ns9xxx/irqs.h> |
| 17 | #include <asm/arch/system.h> | 21 | #include <asm/arch/system.h> |
| 18 | #include "generic.h" | 22 | #include "generic.h" |
| 19 | 23 | ||
| 20 | #define TIMERCLOCKSELECT 64 | 24 | #define TIMER_CLOCKSOURCE 0 |
| 25 | #define TIMER_CLOCKEVENT 1 | ||
| 26 | static u32 latch; | ||
| 27 | |||
| 28 | static cycle_t ns9xxx_clocksource_read(void) | ||
| 29 | { | ||
| 30 | return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE)); | ||
| 31 | } | ||
| 21 | 32 | ||
| 22 | static u32 usecs_per_tick; | 33 | static struct clocksource ns9xxx_clocksource = { |
| 34 | .name = "ns9xxx-timer" __stringify(TIMER_CLOCKSOURCE), | ||
| 35 | .rating = 300, | ||
| 36 | .read = ns9xxx_clocksource_read, | ||
| 37 | .mask = CLOCKSOURCE_MASK(32), | ||
| 38 | .shift = 20, | ||
| 39 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 40 | }; | ||
| 23 | 41 | ||
| 24 | static irqreturn_t | 42 | static void ns9xxx_clockevent_setmode(enum clock_event_mode mode, |
| 25 | ns9xxx_timer_interrupt(int irq, void *dev_id) | 43 | struct clock_event_device *clk) |
| 26 | { | 44 | { |
| 27 | write_seqlock(&xtime_lock); | 45 | u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); |
| 28 | timer_tick(); | 46 | |
| 29 | write_sequnlock(&xtime_lock); | 47 | switch(mode) { |
| 48 | case CLOCK_EVT_MODE_PERIODIC: | ||
| 49 | __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT)); | ||
| 50 | REGSET(tc, SYS_TCx, REN, EN); | ||
| 51 | REGSET(tc, SYS_TCx, INTS, EN); | ||
| 52 | REGSET(tc, SYS_TCx, TEN, EN); | ||
| 53 | break; | ||
| 54 | |||
| 55 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 56 | REGSET(tc, SYS_TCx, REN, DIS); | ||
| 57 | REGSET(tc, SYS_TCx, INTS, EN); | ||
| 58 | |||
| 59 | /* fall through */ | ||
| 60 | |||
| 61 | case CLOCK_EVT_MODE_UNUSED: | ||
| 62 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 63 | case CLOCK_EVT_MODE_RESUME: | ||
| 64 | default: | ||
| 65 | REGSET(tc, SYS_TCx, TEN, DIS); | ||
| 66 | break; | ||
| 67 | } | ||
| 68 | |||
| 69 | __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); | ||
| 70 | } | ||
| 30 | 71 | ||
| 31 | return IRQ_HANDLED; | 72 | static int ns9xxx_clockevent_setnextevent(unsigned long evt, |
| 73 | struct clock_event_device *clk) | ||
| 74 | { | ||
| 75 | u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); | ||
| 76 | |||
| 77 | if (REGGET(tc, SYS_TCx, TEN)) { | ||
| 78 | REGSET(tc, SYS_TCx, TEN, DIS); | ||
| 79 | __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); | ||
| 80 | } | ||
| 81 | |||
| 82 | REGSET(tc, SYS_TCx, TEN, EN); | ||
| 83 | |||
| 84 | __raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT)); | ||
| 85 | |||
| 86 | __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); | ||
| 87 | |||
| 88 | return 0; | ||
| 32 | } | 89 | } |
| 33 | 90 | ||
| 34 | static unsigned long ns9xxx_timer_gettimeoffset(void) | 91 | static struct clock_event_device ns9xxx_clockevent_device = { |
| 92 | .name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT), | ||
| 93 | .shift = 20, | ||
| 94 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 95 | .set_mode = ns9xxx_clockevent_setmode, | ||
| 96 | .set_next_event = ns9xxx_clockevent_setnextevent, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id) | ||
| 35 | { | 100 | { |
| 36 | /* return the microseconds which have passed since the last interrupt | 101 | int timerno = irq - IRQ_TIMER0; |
| 37 | * was _serviced_. That is, if an interrupt is pending or the counter | 102 | u32 tc; |
| 38 | * reloads, return one period more. */ | ||
| 39 | 103 | ||
| 40 | u32 counter1 = SYS_TR(0); | 104 | struct clock_event_device *evt = &ns9xxx_clockevent_device; |
| 41 | int pending = SYS_ISR & (1 << IRQ_TIMER0); | ||
| 42 | u32 counter2 = SYS_TR(0); | ||
| 43 | u32 elapsed; | ||
| 44 | 105 | ||
| 45 | if (pending || counter2 > counter1) | 106 | /* clear irq */ |
| 46 | elapsed = 2 * SYS_TRC(0) - counter2; | 107 | tc = __raw_readl(SYS_TC(timerno)); |
| 47 | else | 108 | if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) { |
| 48 | elapsed = SYS_TRC(0) - counter1; | 109 | REGSET(tc, SYS_TCx, TEN, DIS); |
| 110 | __raw_writel(tc, SYS_TC(timerno)); | ||
| 111 | } | ||
| 112 | REGSET(tc, SYS_TCx, INTC, SET); | ||
| 113 | __raw_writel(tc, SYS_TC(timerno)); | ||
| 114 | REGSET(tc, SYS_TCx, INTC, UNSET); | ||
| 115 | __raw_writel(tc, SYS_TC(timerno)); | ||
| 49 | 116 | ||
| 50 | return (elapsed * usecs_per_tick) >> 16; | 117 | evt->event_handler(evt); |
| 51 | 118 | ||
| 119 | return IRQ_HANDLED; | ||
| 52 | } | 120 | } |
| 53 | 121 | ||
| 54 | static struct irqaction ns9xxx_timer_irq = { | 122 | static struct irqaction ns9xxx_clockevent_action = { |
| 55 | .name = "NS9xxx Timer Tick", | 123 | .name = "ns9xxx-timer" __stringify(TIMER_CLOCKEVENT), |
| 56 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 124 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
| 57 | .handler = ns9xxx_timer_interrupt, | 125 | .handler = ns9xxx_clockevent_handler, |
| 58 | }; | 126 | }; |
| 59 | 127 | ||
| 60 | static void __init ns9xxx_timer_init(void) | 128 | static void __init ns9xxx_timer_init(void) |
| 61 | { | 129 | { |
| 62 | int tc; | 130 | int tc; |
| 63 | 131 | ||
| 64 | usecs_per_tick = | 132 | tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE)); |
| 65 | SH_DIV(1000000 * TIMERCLOCKSELECT, ns9xxx_cpuclock(), 16); | 133 | if (REGGET(tc, SYS_TCx, TEN)) { |
| 134 | REGSET(tc, SYS_TCx, TEN, DIS); | ||
| 135 | __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE)); | ||
| 136 | } | ||
| 66 | 137 | ||
| 67 | /* disable timer */ | 138 | __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE)); |
| 68 | if ((tc = SYS_TC(0)) & SYS_TCx_TEN) | ||
| 69 | SYS_TC(0) = tc & ~SYS_TCx_TEN; | ||
| 70 | |||
| 71 | SYS_TRC(0) = SH_DIV(ns9xxx_cpuclock(), (TIMERCLOCKSELECT * HZ), 0); | ||
| 72 | 139 | ||
| 73 | REGSET(tc, SYS_TCx, TEN, EN); | 140 | REGSET(tc, SYS_TCx, TEN, EN); |
| 74 | REGSET(tc, SYS_TCx, TLCS, DIV64); /* This must match TIMERCLOCKSELECT */ | ||
| 75 | REGSET(tc, SYS_TCx, INTS, EN); | ||
| 76 | REGSET(tc, SYS_TCx, UDS, DOWN); | ||
| 77 | REGSET(tc, SYS_TCx, TDBG, STOP); | 141 | REGSET(tc, SYS_TCx, TDBG, STOP); |
| 142 | REGSET(tc, SYS_TCx, TLCS, CPU); | ||
| 143 | REGSET(tc, SYS_TCx, TM, IEE); | ||
| 144 | REGSET(tc, SYS_TCx, INTS, DIS); | ||
| 145 | REGSET(tc, SYS_TCx, UDS, UP); | ||
| 78 | REGSET(tc, SYS_TCx, TSZ, 32); | 146 | REGSET(tc, SYS_TCx, TSZ, 32); |
| 79 | REGSET(tc, SYS_TCx, REN, EN); | 147 | REGSET(tc, SYS_TCx, REN, EN); |
| 80 | SYS_TC(0) = tc; | ||
| 81 | 148 | ||
| 82 | setup_irq(IRQ_TIMER0, &ns9xxx_timer_irq); | 149 | __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE)); |
| 150 | |||
| 151 | ns9xxx_clocksource.mult = clocksource_hz2mult(ns9xxx_cpuclock(), | ||
| 152 | ns9xxx_clocksource.shift); | ||
| 153 | |||
| 154 | clocksource_register(&ns9xxx_clocksource); | ||
| 155 | |||
| 156 | latch = SH_DIV(ns9xxx_cpuclock(), HZ, 0); | ||
| 157 | |||
| 158 | tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT)); | ||
| 159 | REGSET(tc, SYS_TCx, TEN, DIS); | ||
| 160 | REGSET(tc, SYS_TCx, TDBG, STOP); | ||
| 161 | REGSET(tc, SYS_TCx, TLCS, CPU); | ||
| 162 | REGSET(tc, SYS_TCx, TM, IEE); | ||
| 163 | REGSET(tc, SYS_TCx, INTS, DIS); | ||
| 164 | REGSET(tc, SYS_TCx, UDS, DOWN); | ||
| 165 | REGSET(tc, SYS_TCx, TSZ, 32); | ||
| 166 | REGSET(tc, SYS_TCx, REN, EN); | ||
| 167 | __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT)); | ||
| 168 | |||
| 169 | ns9xxx_clockevent_device.mult = div_sc(ns9xxx_cpuclock(), | ||
| 170 | NSEC_PER_SEC, ns9xxx_clockevent_device.shift); | ||
| 171 | ns9xxx_clockevent_device.max_delta_ns = | ||
| 172 | clockevent_delta2ns(-1, &ns9xxx_clockevent_device); | ||
| 173 | ns9xxx_clockevent_device.min_delta_ns = | ||
| 174 | clockevent_delta2ns(1, &ns9xxx_clockevent_device); | ||
| 175 | |||
| 176 | ns9xxx_clockevent_device.cpumask = cpumask_of_cpu(0); | ||
| 177 | clockevents_register_device(&ns9xxx_clockevent_device); | ||
| 178 | |||
| 179 | setup_irq(IRQ_TIMER0 + TIMER_CLOCKEVENT, &ns9xxx_clockevent_action); | ||
| 83 | } | 180 | } |
| 84 | 181 | ||
| 85 | struct sys_timer ns9xxx_timer = { | 182 | struct sys_timer ns9xxx_timer = { |
| 86 | .init = ns9xxx_timer_init, | 183 | .init = ns9xxx_timer_init, |
| 87 | .offset = ns9xxx_timer_gettimeoffset, | ||
| 88 | }; | 184 | }; |
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index f6ecdd3a2478..79f0b1f8497b 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig | |||
| @@ -84,11 +84,39 @@ config MACH_OMAP_PALMTE | |||
| 84 | bool "Palm Tungsten E" | 84 | bool "Palm Tungsten E" |
| 85 | depends on ARCH_OMAP1 && ARCH_OMAP15XX | 85 | depends on ARCH_OMAP1 && ARCH_OMAP15XX |
| 86 | help | 86 | help |
| 87 | Support for the Palm Tungsten E PDA. Currently only the LCD panel | 87 | Support for the Palm Tungsten E PDA. To boot the kernel, you'll |
| 88 | is supported. To boot the kernel, you'll need a PalmOS compatible | 88 | need a PalmOS compatible bootloader; check out |
| 89 | bootloader; check out http://palmtelinux.sourceforge.net for more | 89 | http://palmtelinux.sourceforge.net/ for more information. |
| 90 | information. | 90 | Say Y here if you have this PDA model, say N otherwise. |
| 91 | Say Y here if you have such a PDA, say NO otherwise. | 91 | |
| 92 | config MACH_OMAP_PALMZ71 | ||
| 93 | bool "Palm Zire71" | ||
| 94 | depends on ARCH_OMAP1 && ARCH_OMAP15XX | ||
| 95 | help | ||
| 96 | Support for the Palm Zire71 PDA. To boot the kernel, | ||
| 97 | you'll need a PalmOS compatible bootloader; check out | ||
| 98 | http://hackndev.com/palm/z71 for more informations. | ||
| 99 | Say Y here if you have such a PDA, say N otherwise. | ||
| 100 | |||
| 101 | config MACH_OMAP_PALMTT | ||
| 102 | bool "Palm Tungsten|T" | ||
| 103 | depends on ARCH_OMAP1 && ARCH_OMAP15XX | ||
| 104 | help | ||
| 105 | Support for the Palm Tungsten|T PDA. To boot the kernel, you'll | ||
| 106 | need a PalmOS compatible bootloader (Garux); check out | ||
| 107 | http://www.hackndev.com/palm/tt/ for more information. | ||
| 108 | Say Y here if you have this PDA model, say N otherwise. | ||
| 109 | |||
| 110 | config MACH_SX1 | ||
| 111 | bool "Siemens SX1" | ||
| 112 | depends on ARCH_OMAP1 && ARCH_OMAP15XX | ||
| 113 | help | ||
| 114 | Support for the Siemens SX1 phone. To boot the kernel, | ||
| 115 | you'll need a SX1 compatible bootloader; check out | ||
| 116 | http://forum.oslik.ru and | ||
| 117 | http://www.handhelds.org/moin/moin.cgi/SiemensSX1 | ||
| 118 | for more information. | ||
| 119 | Say Y here if you have such a phone, say NO otherwise. | ||
| 92 | 120 | ||
| 93 | config MACH_NOKIA770 | 121 | config MACH_NOKIA770 |
| 94 | bool "Nokia 770" | 122 | bool "Nokia 770" |
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index a8b9a00cea22..391b6f4827f6 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
| @@ -22,8 +22,11 @@ obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o | |||
| 22 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o | 22 | obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o |
| 23 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o | 23 | obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o |
| 24 | obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o | 24 | obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o |
| 25 | obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o | ||
| 26 | obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o | ||
| 25 | obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o | 27 | obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o |
| 26 | obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o | 28 | obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o |
| 29 | obj-$(CONFIG_MACH_SX1) += board-sx1.o | ||
| 27 | 30 | ||
| 28 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) | 31 | ifeq ($(CONFIG_ARCH_OMAP15XX),y) |
| 29 | # Innovator-1510 FPGA | 32 | # Innovator-1510 FPGA |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 8437d065ada5..c73ca61e585e 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/input.h> | ||
| 17 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 18 | 19 | ||
| 19 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
| @@ -23,6 +24,7 @@ | |||
| 23 | 24 | ||
| 24 | #include <asm/arch/board-ams-delta.h> | 25 | #include <asm/arch/board-ams-delta.h> |
| 25 | #include <asm/arch/gpio.h> | 26 | #include <asm/arch/gpio.h> |
| 27 | #include <asm/arch/keypad.h> | ||
| 26 | #include <asm/arch/mux.h> | 28 | #include <asm/arch/mux.h> |
| 27 | #include <asm/arch/usb.h> | 29 | #include <asm/arch/usb.h> |
| 28 | #include <asm/arch/board.h> | 30 | #include <asm/arch/board.h> |
| @@ -31,6 +33,86 @@ | |||
| 31 | static u8 ams_delta_latch1_reg; | 33 | static u8 ams_delta_latch1_reg; |
| 32 | static u16 ams_delta_latch2_reg; | 34 | static u16 ams_delta_latch2_reg; |
| 33 | 35 | ||
| 36 | static int ams_delta_keymap[] = { | ||
| 37 | KEY(0, 0, KEY_F1), /* Advert */ | ||
| 38 | |||
| 39 | KEY(3, 0, KEY_COFFEE), /* Games */ | ||
| 40 | KEY(2, 0, KEY_QUESTION), /* Directory */ | ||
| 41 | KEY(3, 2, KEY_CONNECT), /* Internet */ | ||
| 42 | KEY(2, 1, KEY_SHOP), /* Services */ | ||
| 43 | KEY(1, 1, KEY_PHONE), /* VoiceMail */ | ||
| 44 | |||
| 45 | KEY(1, 0, KEY_DELETE), /* Delete */ | ||
| 46 | KEY(2, 2, KEY_PLAY), /* Play */ | ||
| 47 | KEY(0, 1, KEY_PAGEUP), /* Up */ | ||
| 48 | KEY(3, 1, KEY_PAGEDOWN), /* Down */ | ||
| 49 | KEY(0, 2, KEY_EMAIL), /* ReadEmail */ | ||
| 50 | KEY(1, 2, KEY_STOP), /* Stop */ | ||
| 51 | |||
| 52 | /* Numeric keypad portion */ | ||
| 53 | KEY(7, 0, KEY_KP1), | ||
| 54 | KEY(6, 0, KEY_KP2), | ||
| 55 | KEY(5, 0, KEY_KP3), | ||
| 56 | KEY(7, 1, KEY_KP4), | ||
| 57 | KEY(6, 1, KEY_KP5), | ||
| 58 | KEY(5, 1, KEY_KP6), | ||
| 59 | KEY(7, 2, KEY_KP7), | ||
| 60 | KEY(6, 2, KEY_KP8), | ||
| 61 | KEY(5, 2, KEY_KP9), | ||
| 62 | KEY(6, 3, KEY_KP0), | ||
| 63 | KEY(7, 3, KEY_KPASTERISK), | ||
| 64 | KEY(5, 3, KEY_KPDOT), /* # key */ | ||
| 65 | KEY(2, 7, KEY_NUMLOCK), /* Mute */ | ||
| 66 | KEY(1, 7, KEY_KPMINUS), /* Recall */ | ||
| 67 | KEY(1, 6, KEY_KPPLUS), /* Redial */ | ||
| 68 | KEY(6, 7, KEY_KPSLASH), /* Handsfree */ | ||
| 69 | KEY(0, 6, KEY_ENTER), /* Video */ | ||
| 70 | |||
| 71 | KEY(4, 7, KEY_CAMERA), /* Photo */ | ||
| 72 | |||
| 73 | KEY(4, 0, KEY_F2), /* Home */ | ||
| 74 | KEY(4, 1, KEY_F3), /* Office */ | ||
| 75 | KEY(4, 2, KEY_F4), /* Mobile */ | ||
| 76 | KEY(7, 7, KEY_F5), /* SMS */ | ||
| 77 | KEY(5, 7, KEY_F6), /* Email */ | ||
| 78 | |||
| 79 | /* QWERTY portion of keypad */ | ||
| 80 | KEY(4, 3, KEY_Q), | ||
| 81 | KEY(3, 3, KEY_W), | ||
| 82 | KEY(2, 3, KEY_E), | ||
| 83 | KEY(1, 3, KEY_R), | ||
| 84 | KEY(0, 3, KEY_T), | ||
| 85 | KEY(7, 4, KEY_Y), | ||
| 86 | KEY(6, 4, KEY_U), | ||
| 87 | KEY(5, 4, KEY_I), | ||
| 88 | KEY(4, 4, KEY_O), | ||
| 89 | KEY(3, 4, KEY_P), | ||
| 90 | |||
| 91 | KEY(2, 4, KEY_A), | ||
| 92 | KEY(1, 4, KEY_S), | ||
| 93 | KEY(0, 4, KEY_D), | ||
| 94 | KEY(7, 5, KEY_F), | ||
| 95 | KEY(6, 5, KEY_G), | ||
| 96 | KEY(5, 5, KEY_H), | ||
| 97 | KEY(4, 5, KEY_J), | ||
| 98 | KEY(3, 5, KEY_K), | ||
| 99 | KEY(2, 5, KEY_L), | ||
| 100 | |||
| 101 | KEY(1, 5, KEY_Z), | ||
| 102 | KEY(0, 5, KEY_X), | ||
| 103 | KEY(7, 6, KEY_C), | ||
| 104 | KEY(6, 6, KEY_V), | ||
| 105 | KEY(5, 6, KEY_B), | ||
| 106 | KEY(4, 6, KEY_N), | ||
| 107 | KEY(3, 6, KEY_M), | ||
| 108 | KEY(2, 6, KEY_SPACE), | ||
| 109 | |||
| 110 | KEY(0, 7, KEY_LEFTSHIFT), /* Vol up */ | ||
| 111 | KEY(3, 7, KEY_LEFTCTRL), /* Vol down */ | ||
| 112 | |||
| 113 | 0 | ||
| 114 | }; | ||
| 115 | |||
| 34 | void ams_delta_latch1_write(u8 mask, u8 value) | 116 | void ams_delta_latch1_write(u8 mask, u8 value) |
| 35 | { | 117 | { |
| 36 | ams_delta_latch1_reg &= ~mask; | 118 | ams_delta_latch1_reg &= ~mask; |
| @@ -76,6 +158,10 @@ static struct map_desc ams_delta_io_desc[] __initdata = { | |||
| 76 | } | 158 | } |
| 77 | }; | 159 | }; |
| 78 | 160 | ||
| 161 | static struct omap_lcd_config ams_delta_lcd_config __initdata = { | ||
| 162 | .ctrl_name = "internal", | ||
| 163 | }; | ||
| 164 | |||
| 79 | static struct omap_uart_config ams_delta_uart_config __initdata = { | 165 | static struct omap_uart_config ams_delta_uart_config __initdata = { |
| 80 | .enabled_uarts = 1, | 166 | .enabled_uarts = 1, |
| 81 | }; | 167 | }; |
| @@ -87,16 +173,50 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { | |||
| 87 | }; | 173 | }; |
| 88 | 174 | ||
| 89 | static struct omap_board_config_kernel ams_delta_config[] = { | 175 | static struct omap_board_config_kernel ams_delta_config[] = { |
| 176 | { OMAP_TAG_LCD, &ams_delta_lcd_config }, | ||
| 90 | { OMAP_TAG_UART, &ams_delta_uart_config }, | 177 | { OMAP_TAG_UART, &ams_delta_uart_config }, |
| 91 | { OMAP_TAG_USB, &ams_delta_usb_config }, | 178 | { OMAP_TAG_USB, &ams_delta_usb_config }, |
| 92 | }; | 179 | }; |
| 93 | 180 | ||
| 181 | static struct resource ams_delta_kp_resources[] = { | ||
| 182 | [0] = { | ||
| 183 | .start = INT_KEYBOARD, | ||
| 184 | .end = INT_KEYBOARD, | ||
| 185 | .flags = IORESOURCE_IRQ, | ||
| 186 | }, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct omap_kp_platform_data ams_delta_kp_data = { | ||
| 190 | .rows = 8, | ||
| 191 | .cols = 8, | ||
| 192 | .keymap = ams_delta_keymap, | ||
| 193 | .keymapsize = ARRAY_SIZE(ams_delta_keymap), | ||
| 194 | .delay = 9, | ||
| 195 | }; | ||
| 196 | |||
| 197 | static struct platform_device ams_delta_kp_device = { | ||
| 198 | .name = "omap-keypad", | ||
| 199 | .id = -1, | ||
| 200 | .dev = { | ||
| 201 | .platform_data = &ams_delta_kp_data, | ||
| 202 | }, | ||
| 203 | .num_resources = ARRAY_SIZE(ams_delta_kp_resources), | ||
| 204 | .resource = ams_delta_kp_resources, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static struct platform_device ams_delta_lcd_device = { | ||
| 208 | .name = "lcd_ams_delta", | ||
| 209 | .id = -1, | ||
| 210 | }; | ||
| 211 | |||
| 94 | static struct platform_device ams_delta_led_device = { | 212 | static struct platform_device ams_delta_led_device = { |
| 95 | .name = "ams-delta-led", | 213 | .name = "ams-delta-led", |
| 96 | .id = -1 | 214 | .id = -1 |
| 97 | }; | 215 | }; |
| 98 | 216 | ||
| 99 | static struct platform_device *ams_delta_devices[] __initdata = { | 217 | static struct platform_device *ams_delta_devices[] __initdata = { |
| 218 | &ams_delta_kp_device, | ||
| 219 | &ams_delta_lcd_device, | ||
| 100 | &ams_delta_led_device, | 220 | &ams_delta_led_device, |
| 101 | }; | 221 | }; |
| 102 | 222 | ||
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 2f8f6ecf111f..b0921622566f 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
| @@ -140,6 +140,66 @@ static struct platform_device h2_nor_device = { | |||
| 140 | .resource = &h2_nor_resource, | 140 | .resource = &h2_nor_resource, |
| 141 | }; | 141 | }; |
| 142 | 142 | ||
| 143 | #if 0 /* REVISIT: Enable when nand_platform_data is applied */ | ||
| 144 | |||
| 145 | static struct mtd_partition h2_nand_partitions[] = { | ||
| 146 | #if 0 | ||
| 147 | /* REVISIT: enable these partitions if you make NAND BOOT | ||
| 148 | * work on your H2 (rev C or newer); published versions of | ||
| 149 | * x-load only support P2 and H3. | ||
| 150 | */ | ||
| 151 | { | ||
| 152 | .name = "xloader", | ||
| 153 | .offset = 0, | ||
| 154 | .size = 64 * 1024, | ||
| 155 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 156 | }, | ||
| 157 | { | ||
| 158 | .name = "bootloader", | ||
| 159 | .offset = MTDPART_OFS_APPEND, | ||
| 160 | .size = 256 * 1024, | ||
| 161 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 162 | }, | ||
| 163 | { | ||
| 164 | .name = "params", | ||
| 165 | .offset = MTDPART_OFS_APPEND, | ||
| 166 | .size = 192 * 1024, | ||
| 167 | }, | ||
| 168 | { | ||
| 169 | .name = "kernel", | ||
| 170 | .offset = MTDPART_OFS_APPEND, | ||
| 171 | .size = 2 * SZ_1M, | ||
| 172 | }, | ||
| 173 | #endif | ||
| 174 | { | ||
| 175 | .name = "filesystem", | ||
| 176 | .size = MTDPART_SIZ_FULL, | ||
| 177 | .offset = MTDPART_OFS_APPEND, | ||
| 178 | }, | ||
| 179 | }; | ||
| 180 | |||
| 181 | /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ | ||
| 182 | static struct nand_platform_data h2_nand_data = { | ||
| 183 | .options = NAND_SAMSUNG_LP_OPTIONS, | ||
| 184 | .parts = h2_nand_partitions, | ||
| 185 | .nr_parts = ARRAY_SIZE(h2_nand_partitions), | ||
| 186 | }; | ||
| 187 | |||
| 188 | static struct resource h2_nand_resource = { | ||
| 189 | .flags = IORESOURCE_MEM, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct platform_device h2_nand_device = { | ||
| 193 | .name = "omapnand", | ||
| 194 | .id = 0, | ||
| 195 | .dev = { | ||
| 196 | .platform_data = &h2_nand_data, | ||
| 197 | }, | ||
| 198 | .num_resources = 1, | ||
| 199 | .resource = &h2_nand_resource, | ||
| 200 | }; | ||
| 201 | #endif | ||
| 202 | |||
| 143 | static struct resource h2_smc91x_resources[] = { | 203 | static struct resource h2_smc91x_resources[] = { |
| 144 | [0] = { | 204 | [0] = { |
| 145 | .start = OMAP1610_ETHR_START, /* Physical */ | 205 | .start = OMAP1610_ETHR_START, /* Physical */ |
| @@ -219,11 +279,15 @@ static struct resource h2_irda_resources[] = { | |||
| 219 | .flags = IORESOURCE_IRQ, | 279 | .flags = IORESOURCE_IRQ, |
| 220 | }, | 280 | }, |
| 221 | }; | 281 | }; |
| 282 | |||
| 283 | static u64 irda_dmamask = 0xffffffff; | ||
| 284 | |||
| 222 | static struct platform_device h2_irda_device = { | 285 | static struct platform_device h2_irda_device = { |
| 223 | .name = "omapirda", | 286 | .name = "omapirda", |
| 224 | .id = 0, | 287 | .id = 0, |
| 225 | .dev = { | 288 | .dev = { |
| 226 | .platform_data = &h2_irda_data, | 289 | .platform_data = &h2_irda_data, |
| 290 | .dma_mask = &irda_dmamask, | ||
| 227 | }, | 291 | }, |
| 228 | .num_resources = ARRAY_SIZE(h2_irda_resources), | 292 | .num_resources = ARRAY_SIZE(h2_irda_resources), |
| 229 | .resource = h2_irda_resources, | 293 | .resource = h2_irda_resources, |
| @@ -271,6 +335,7 @@ static struct platform_device h2_mcbsp1_device = { | |||
| 271 | 335 | ||
| 272 | static struct platform_device *h2_devices[] __initdata = { | 336 | static struct platform_device *h2_devices[] __initdata = { |
| 273 | &h2_nor_device, | 337 | &h2_nor_device, |
| 338 | //&h2_nand_device, | ||
| 274 | &h2_smc91x_device, | 339 | &h2_smc91x_device, |
| 275 | &h2_irda_device, | 340 | &h2_irda_device, |
| 276 | &h2_kp_device, | 341 | &h2_kp_device, |
| @@ -348,6 +413,13 @@ static struct omap_board_config_kernel h2_config[] __initdata = { | |||
| 348 | { OMAP_TAG_LCD, &h2_lcd_config }, | 413 | { OMAP_TAG_LCD, &h2_lcd_config }, |
| 349 | }; | 414 | }; |
| 350 | 415 | ||
| 416 | #define H2_NAND_RB_GPIO_PIN 62 | ||
| 417 | |||
| 418 | static int h2_nand_dev_ready(struct nand_platform_data *data) | ||
| 419 | { | ||
| 420 | return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN); | ||
| 421 | } | ||
| 422 | |||
| 351 | static void __init h2_init(void) | 423 | static void __init h2_init(void) |
| 352 | { | 424 | { |
| 353 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped | 425 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped |
| @@ -362,6 +434,13 @@ static void __init h2_init(void) | |||
| 362 | h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); | 434 | h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); |
| 363 | h2_nor_resource.end += SZ_32M - 1; | 435 | h2_nor_resource.end += SZ_32M - 1; |
| 364 | 436 | ||
| 437 | #if 0 /* REVISIT: Enable when nand_platform_data is applied */ | ||
| 438 | h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; | ||
| 439 | h2_nand_resource.end += SZ_4K - 1; | ||
| 440 | if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN))) | ||
| 441 | h2_nand_data.dev_ready = h2_nand_dev_ready; | ||
| 442 | #endif | ||
| 443 | |||
| 365 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); | 444 | omap_cfg_reg(L3_1610_FLASH_CS2B_OE); |
| 366 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); | 445 | omap_cfg_reg(M8_1610_FLASH_CS2B_WE); |
| 367 | 446 | ||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index add2f703204f..4f84ae273a1f 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
| @@ -47,6 +47,8 @@ | |||
| 47 | #include <asm/arch/keypad.h> | 47 | #include <asm/arch/keypad.h> |
| 48 | #include <asm/arch/dma.h> | 48 | #include <asm/arch/dma.h> |
| 49 | #include <asm/arch/common.h> | 49 | #include <asm/arch/common.h> |
| 50 | #include <asm/arch/mcbsp.h> | ||
| 51 | #include <asm/arch/omap-alsa.h> | ||
| 50 | 52 | ||
| 51 | extern int omap_gpio_init(void); | 53 | extern int omap_gpio_init(void); |
| 52 | 54 | ||
| @@ -354,11 +356,14 @@ static struct resource h3_irda_resources[] = { | |||
| 354 | }, | 356 | }, |
| 355 | }; | 357 | }; |
| 356 | 358 | ||
| 359 | static u64 irda_dmamask = 0xffffffff; | ||
| 360 | |||
| 357 | static struct platform_device h3_irda_device = { | 361 | static struct platform_device h3_irda_device = { |
| 358 | .name = "omapirda", | 362 | .name = "omapirda", |
| 359 | .id = 0, | 363 | .id = 0, |
| 360 | .dev = { | 364 | .dev = { |
| 361 | .platform_data = &h3_irda_data, | 365 | .platform_data = &h3_irda_data, |
| 366 | .dma_mask = &irda_dmamask, | ||
| 362 | }, | 367 | }, |
| 363 | .num_resources = ARRAY_SIZE(h3_irda_resources), | 368 | .num_resources = ARRAY_SIZE(h3_irda_resources), |
| 364 | .resource = h3_irda_resources, | 369 | .resource = h3_irda_resources, |
| @@ -369,6 +374,41 @@ static struct platform_device h3_lcd_device = { | |||
| 369 | .id = -1, | 374 | .id = -1, |
| 370 | }; | 375 | }; |
| 371 | 376 | ||
| 377 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 378 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 379 | .spcr1 = RINTM(3) | RRST, | ||
| 380 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 381 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), | ||
| 382 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 383 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 384 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, | ||
| 385 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 386 | .srgr1 = FWID(15), | ||
| 387 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), | ||
| 388 | |||
| 389 | .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP, | ||
| 390 | //.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 391 | }; | ||
| 392 | |||
| 393 | static struct omap_alsa_codec_config alsa_config = { | ||
| 394 | .name = "H3 TSC2101", | ||
| 395 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 396 | .codec_configure_dev = NULL, // tsc2101_configure, | ||
| 397 | .codec_set_samplerate = NULL, // tsc2101_set_samplerate, | ||
| 398 | .codec_clock_setup = NULL, // tsc2101_clock_setup, | ||
| 399 | .codec_clock_on = NULL, // tsc2101_clock_on, | ||
| 400 | .codec_clock_off = NULL, // tsc2101_clock_off, | ||
| 401 | .get_default_samplerate = NULL, // tsc2101_get_default_samplerate, | ||
| 402 | }; | ||
| 403 | |||
| 404 | static struct platform_device h3_mcbsp1_device = { | ||
| 405 | .name = "omap_alsa_mcbsp", | ||
| 406 | .id = 1, | ||
| 407 | .dev = { | ||
| 408 | .platform_data = &alsa_config, | ||
| 409 | }, | ||
| 410 | }; | ||
| 411 | |||
| 372 | static struct platform_device *devices[] __initdata = { | 412 | static struct platform_device *devices[] __initdata = { |
| 373 | &nor_device, | 413 | &nor_device, |
| 374 | &nand_device, | 414 | &nand_device, |
| @@ -377,6 +417,7 @@ static struct platform_device *devices[] __initdata = { | |||
| 377 | &h3_irda_device, | 417 | &h3_irda_device, |
| 378 | &h3_kp_device, | 418 | &h3_kp_device, |
| 379 | &h3_lcd_device, | 419 | &h3_lcd_device, |
| 420 | &h3_mcbsp1_device, | ||
| 380 | }; | 421 | }; |
| 381 | 422 | ||
| 382 | static struct omap_usb_config h3_usb_config __initdata = { | 423 | static struct omap_usb_config h3_usb_config __initdata = { |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 70014f751bc4..22db19a53647 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
| @@ -33,6 +33,12 @@ | |||
| 33 | #include <asm/arch/dsp_common.h> | 33 | #include <asm/arch/dsp_common.h> |
| 34 | #include <asm/arch/aic23.h> | 34 | #include <asm/arch/aic23.h> |
| 35 | #include <asm/arch/gpio.h> | 35 | #include <asm/arch/gpio.h> |
| 36 | #include <asm/arch/omapfb.h> | ||
| 37 | #include <asm/arch/lcd_mipid.h> | ||
| 38 | |||
| 39 | #include "../plat-omap/dsp/dsp_common.h" | ||
| 40 | |||
| 41 | #define ADS7846_PENDOWN_GPIO 15 | ||
| 36 | 42 | ||
| 37 | static void __init omap_nokia770_init_irq(void) | 43 | static void __init omap_nokia770_init_irq(void) |
| 38 | { | 44 | { |
| @@ -91,9 +97,44 @@ static struct platform_device nokia770_kp_device = { | |||
| 91 | }; | 97 | }; |
| 92 | 98 | ||
| 93 | static struct platform_device *nokia770_devices[] __initdata = { | 99 | static struct platform_device *nokia770_devices[] __initdata = { |
| 94 | &nokia770_kp_device, | 100 | &nokia770_kp_device, |
| 101 | }; | ||
| 102 | |||
| 103 | static void mipid_shutdown(struct mipid_platform_data *pdata) | ||
| 104 | { | ||
| 105 | if (pdata->nreset_gpio != -1) { | ||
| 106 | printk(KERN_INFO "shutdown LCD\n"); | ||
| 107 | omap_set_gpio_dataout(pdata->nreset_gpio, 0); | ||
| 108 | msleep(120); | ||
| 109 | } | ||
| 110 | } | ||
| 111 | |||
| 112 | static struct mipid_platform_data nokia770_mipid_platform_data = { | ||
| 113 | .shutdown = mipid_shutdown, | ||
| 95 | }; | 114 | }; |
| 96 | 115 | ||
| 116 | static void mipid_dev_init(void) | ||
| 117 | { | ||
| 118 | const struct omap_lcd_config *conf; | ||
| 119 | |||
| 120 | conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config); | ||
| 121 | if (conf != NULL) { | ||
| 122 | nokia770_mipid_platform_data.nreset_gpio = conf->nreset_gpio; | ||
| 123 | nokia770_mipid_platform_data.data_lines = conf->data_lines; | ||
| 124 | } | ||
| 125 | } | ||
| 126 | |||
| 127 | static void ads7846_dev_init(void) | ||
| 128 | { | ||
| 129 | if (omap_request_gpio(ADS7846_PENDOWN_GPIO) < 0) | ||
| 130 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | ||
| 131 | } | ||
| 132 | |||
| 133 | static int ads7846_get_pendown_state(void) | ||
| 134 | { | ||
| 135 | return !omap_get_gpio_datain(ADS7846_PENDOWN_GPIO); | ||
| 136 | } | ||
| 137 | |||
| 97 | static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = { | 138 | static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = { |
| 98 | .x_max = 0x0fff, | 139 | .x_max = 0x0fff, |
| 99 | .y_max = 0x0fff, | 140 | .y_max = 0x0fff, |
| @@ -101,14 +142,17 @@ static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = | |||
| 101 | .pressure_max = 255, | 142 | .pressure_max = 255, |
| 102 | .debounce_max = 10, | 143 | .debounce_max = 10, |
| 103 | .debounce_tol = 3, | 144 | .debounce_tol = 3, |
| 145 | .debounce_rep = 1, | ||
| 146 | .get_pendown_state = ads7846_get_pendown_state, | ||
| 104 | }; | 147 | }; |
| 105 | 148 | ||
| 106 | static struct spi_board_info nokia770_spi_board_info[] __initdata = { | 149 | static struct spi_board_info nokia770_spi_board_info[] __initdata = { |
| 107 | [0] = { | 150 | [0] = { |
| 108 | .modalias = "lcd_mipid", | 151 | .modalias = "lcd_mipid", |
| 109 | .bus_num = 2, | 152 | .bus_num = 2, |
| 110 | .chip_select = 3, | 153 | .chip_select = 3, |
| 111 | .max_speed_hz = 12000000, | 154 | .max_speed_hz = 12000000, |
| 155 | .platform_data = &nokia770_mipid_platform_data, | ||
| 112 | }, | 156 | }, |
| 113 | [1] = { | 157 | [1] = { |
| 114 | .modalias = "ads7846", | 158 | .modalias = "ads7846", |
| @@ -153,6 +197,7 @@ static struct omap_board_config_kernel nokia770_config[] = { | |||
| 153 | { OMAP_TAG_MMC, &nokia770_mmc_config }, | 197 | { OMAP_TAG_MMC, &nokia770_mmc_config }, |
| 154 | }; | 198 | }; |
| 155 | 199 | ||
| 200 | #if defined(CONFIG_OMAP_DSP) | ||
| 156 | /* | 201 | /* |
| 157 | * audio power control | 202 | * audio power control |
| 158 | */ | 203 | */ |
| @@ -183,7 +228,7 @@ static void nokia770_audio_pwr_up(void) | |||
| 183 | clk_enable(dspxor_ck); | 228 | clk_enable(dspxor_ck); |
| 184 | 229 | ||
| 185 | /* Turn on codec */ | 230 | /* Turn on codec */ |
| 186 | tlv320aic23_power_up(); | 231 | aic23_power_up(); |
| 187 | 232 | ||
| 188 | if (omap_get_gpio_datain(HEADPHONE_GPIO)) | 233 | if (omap_get_gpio_datain(HEADPHONE_GPIO)) |
| 189 | /* HP not connected, turn on amplifier */ | 234 | /* HP not connected, turn on amplifier */ |
| @@ -197,7 +242,7 @@ static void codec_delayed_power_down(struct work_struct *work) | |||
| 197 | { | 242 | { |
| 198 | down(&audio_pwr_sem); | 243 | down(&audio_pwr_sem); |
| 199 | if (audio_pwr_state == -1) | 244 | if (audio_pwr_state == -1) |
| 200 | tlv320aic23_power_down(); | 245 | aic23_power_down(); |
| 201 | clk_disable(dspxor_ck); | 246 | clk_disable(dspxor_ck); |
| 202 | up(&audio_pwr_sem); | 247 | up(&audio_pwr_sem); |
| 203 | } | 248 | } |
| @@ -213,7 +258,8 @@ static void nokia770_audio_pwr_down(void) | |||
| 213 | schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ | 258 | schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ |
| 214 | } | 259 | } |
| 215 | 260 | ||
| 216 | void nokia770_audio_pwr_up_request(int stage) | 261 | static int |
| 262 | nokia770_audio_pwr_up_request(struct dsp_kfunc_device *kdev, int stage) | ||
| 217 | { | 263 | { |
| 218 | down(&audio_pwr_sem); | 264 | down(&audio_pwr_sem); |
| 219 | if (audio_pwr_state == -1) | 265 | if (audio_pwr_state == -1) |
| @@ -221,9 +267,11 @@ void nokia770_audio_pwr_up_request(int stage) | |||
| 221 | /* force audio_pwr_state = 0, even if it was 1. */ | 267 | /* force audio_pwr_state = 0, even if it was 1. */ |
| 222 | audio_pwr_state = 0; | 268 | audio_pwr_state = 0; |
| 223 | up(&audio_pwr_sem); | 269 | up(&audio_pwr_sem); |
| 270 | return 0; | ||
| 224 | } | 271 | } |
| 225 | 272 | ||
| 226 | void nokia770_audio_pwr_down_request(int stage) | 273 | static int |
| 274 | nokia770_audio_pwr_down_request(struct dsp_kfunc_device *kdev, int stage) | ||
| 227 | { | 275 | { |
| 228 | down(&audio_pwr_sem); | 276 | down(&audio_pwr_sem); |
| 229 | switch (stage) { | 277 | switch (stage) { |
| @@ -239,8 +287,39 @@ void nokia770_audio_pwr_down_request(int stage) | |||
| 239 | break; | 287 | break; |
| 240 | } | 288 | } |
| 241 | up(&audio_pwr_sem); | 289 | up(&audio_pwr_sem); |
| 290 | return 0; | ||
| 242 | } | 291 | } |
| 243 | 292 | ||
| 293 | static struct dsp_kfunc_device nokia770_audio_device = { | ||
| 294 | .name = "audio", | ||
| 295 | .type = DSP_KFUNC_DEV_TYPE_AUDIO, | ||
| 296 | .enable = nokia770_audio_pwr_up_request, | ||
| 297 | .disable = nokia770_audio_pwr_down_request, | ||
| 298 | }; | ||
| 299 | |||
| 300 | static __init int omap_dsp_init(void) | ||
| 301 | { | ||
| 302 | int ret; | ||
| 303 | |||
| 304 | dspxor_ck = clk_get(0, "dspxor_ck"); | ||
| 305 | if (IS_ERR(dspxor_ck)) { | ||
| 306 | printk(KERN_ERR "couldn't acquire dspxor_ck\n"); | ||
| 307 | return PTR_ERR(dspxor_ck); | ||
| 308 | } | ||
| 309 | |||
| 310 | ret = dsp_kfunc_device_register(&nokia770_audio_device); | ||
| 311 | if (ret) { | ||
| 312 | printk(KERN_ERR | ||
| 313 | "KFUNC device registration faild: %s\n", | ||
| 314 | nokia770_audio_device.name); | ||
| 315 | goto out; | ||
| 316 | } | ||
| 317 | return 0; | ||
| 318 | out: | ||
| 319 | return ret; | ||
| 320 | } | ||
| 321 | #endif /* CONFIG_OMAP_DSP */ | ||
| 322 | |||
| 244 | static void __init omap_nokia770_init(void) | 323 | static void __init omap_nokia770_init(void) |
| 245 | { | 324 | { |
| 246 | nokia770_config[0].data = &nokia770_usb_config; | 325 | nokia770_config[0].data = &nokia770_usb_config; |
| @@ -250,10 +329,11 @@ static void __init omap_nokia770_init(void) | |||
| 250 | ARRAY_SIZE(nokia770_spi_board_info)); | 329 | ARRAY_SIZE(nokia770_spi_board_info)); |
| 251 | omap_board_config = nokia770_config; | 330 | omap_board_config = nokia770_config; |
| 252 | omap_board_config_size = ARRAY_SIZE(nokia770_config); | 331 | omap_board_config_size = ARRAY_SIZE(nokia770_config); |
| 332 | omap_gpio_init(); | ||
| 253 | omap_serial_init(); | 333 | omap_serial_init(); |
| 254 | omap_dsp_audio_pwr_up_request = nokia770_audio_pwr_up_request; | 334 | omap_dsp_init(); |
| 255 | omap_dsp_audio_pwr_down_request = nokia770_audio_pwr_down_request; | 335 | ads7846_dev_init(); |
| 256 | dspxor_ck = clk_get(0, "dspxor_ck"); | 336 | mipid_dev_init(); |
| 257 | } | 337 | } |
| 258 | 338 | ||
| 259 | static void __init omap_nokia770_map_io(void) | 339 | static void __init omap_nokia770_map_io(void) |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index a61bf455ee02..5db182da322b 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <linux/kernel.h> | 29 | #include <linux/kernel.h> |
| 30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
| 31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
| 32 | #include <linux/interrupt.h> | ||
| 32 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
| 33 | #include <linux/interrupt.h> | 34 | #include <linux/interrupt.h> |
| 34 | #include <linux/i2c.h> | 35 | #include <linux/i2c.h> |
| @@ -308,6 +309,18 @@ static struct platform_device osk5912_kp_device = { | |||
| 308 | .resource = osk5912_kp_resources, | 309 | .resource = osk5912_kp_resources, |
| 309 | }; | 310 | }; |
| 310 | 311 | ||
| 312 | static struct omap_backlight_config mistral_bl_data = { | ||
| 313 | .default_intensity = 0xa0, | ||
| 314 | }; | ||
| 315 | |||
| 316 | static struct platform_device mistral_bl_device = { | ||
| 317 | .name = "omap-bl", | ||
| 318 | .id = -1, | ||
| 319 | .dev = { | ||
| 320 | .platform_data = &mistral_bl_data, | ||
| 321 | }, | ||
| 322 | }; | ||
| 323 | |||
| 311 | static struct platform_device osk5912_lcd_device = { | 324 | static struct platform_device osk5912_lcd_device = { |
| 312 | .name = "lcd_osk", | 325 | .name = "lcd_osk", |
| 313 | .id = -1, | 326 | .id = -1, |
| @@ -315,6 +328,7 @@ static struct platform_device osk5912_lcd_device = { | |||
| 315 | 328 | ||
| 316 | static struct platform_device *mistral_devices[] __initdata = { | 329 | static struct platform_device *mistral_devices[] __initdata = { |
| 317 | &osk5912_kp_device, | 330 | &osk5912_kp_device, |
| 331 | &mistral_bl_device, | ||
| 318 | &osk5912_lcd_device, | 332 | &osk5912_lcd_device, |
| 319 | }; | 333 | }; |
| 320 | 334 | ||
| @@ -358,6 +372,38 @@ static void __init osk_mistral_init(void) | |||
| 358 | * can't talk to the ads or even the i2c eeprom. | 372 | * can't talk to the ads or even the i2c eeprom. |
| 359 | */ | 373 | */ |
| 360 | 374 | ||
| 375 | /* parallel camera interface */ | ||
| 376 | omap_cfg_reg(J15_1610_CAM_LCLK); | ||
| 377 | omap_cfg_reg(J18_1610_CAM_D7); | ||
| 378 | omap_cfg_reg(J19_1610_CAM_D6); | ||
| 379 | omap_cfg_reg(J14_1610_CAM_D5); | ||
| 380 | omap_cfg_reg(K18_1610_CAM_D4); | ||
| 381 | omap_cfg_reg(K19_1610_CAM_D3); | ||
| 382 | omap_cfg_reg(K15_1610_CAM_D2); | ||
| 383 | omap_cfg_reg(K14_1610_CAM_D1); | ||
| 384 | omap_cfg_reg(L19_1610_CAM_D0); | ||
| 385 | omap_cfg_reg(L18_1610_CAM_VS); | ||
| 386 | omap_cfg_reg(L15_1610_CAM_HS); | ||
| 387 | omap_cfg_reg(M19_1610_CAM_RSTZ); | ||
| 388 | omap_cfg_reg(Y15_1610_CAM_OUTCLK); | ||
| 389 | |||
| 390 | /* serial camera interface */ | ||
| 391 | omap_cfg_reg(H19_1610_CAM_EXCLK); | ||
| 392 | omap_cfg_reg(W13_1610_CCP_CLKM); | ||
| 393 | omap_cfg_reg(Y12_1610_CCP_CLKP); | ||
| 394 | /* CCP_DATAM CONFLICTS WITH UART1.TX (and serial console) */ | ||
| 395 | // omap_cfg_reg(Y14_1610_CCP_DATAM); | ||
| 396 | omap_cfg_reg(W14_1610_CCP_DATAP); | ||
| 397 | |||
| 398 | /* CAM_PWDN */ | ||
| 399 | if (omap_request_gpio(11) == 0) { | ||
| 400 | omap_cfg_reg(N20_1610_GPIO11); | ||
| 401 | omap_set_gpio_direction(11, 0 /* out */); | ||
| 402 | omap_set_gpio_dataout(11, 0 /* off */); | ||
| 403 | } else | ||
| 404 | pr_debug("OSK+Mistral: CAM_PWDN is awol\n"); | ||
| 405 | |||
| 406 | |||
| 361 | // omap_cfg_reg(P19_1610_GPIO6); // BUSY | 407 | // omap_cfg_reg(P19_1610_GPIO6); // BUSY |
| 362 | omap_cfg_reg(P20_1610_GPIO4); // PENIRQ | 408 | omap_cfg_reg(P20_1610_GPIO4); // PENIRQ |
| 363 | set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING); | 409 | set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING); |
| @@ -388,6 +434,15 @@ static void __init osk_mistral_init(void) | |||
| 388 | } else | 434 | } else |
| 389 | printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); | 435 | printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); |
| 390 | 436 | ||
| 437 | /* LCD: backlight, and power; power controls other devices on the | ||
| 438 | * board, like the touchscreen, EEPROM, and wakeup (!) switch. | ||
| 439 | */ | ||
| 440 | omap_cfg_reg(PWL); | ||
| 441 | if (omap_request_gpio(2) == 0) { | ||
| 442 | omap_set_gpio_direction(2, 0 /* out */); | ||
| 443 | omap_set_gpio_dataout(2, 1 /* on */); | ||
| 444 | } | ||
| 445 | |||
| 391 | platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); | 446 | platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); |
| 392 | } | 447 | } |
| 393 | #else | 448 | #else |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 015824185629..2f9d00a00135 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
| @@ -17,49 +17,189 @@ | |||
| 17 | 17 | ||
| 18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
| 20 | #include <linux/input.h> | ||
| 20 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 21 | #include <linux/notifier.h> | 22 | #include <linux/mtd/mtd.h> |
| 22 | #include <linux/clk.h> | 23 | #include <linux/mtd/partitions.h> |
| 24 | #include <linux/spi/spi.h> | ||
| 25 | #include <linux/spi/tsc2102.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 23 | 27 | ||
| 28 | #include <asm/apm.h> | ||
| 24 | #include <asm/hardware.h> | 29 | #include <asm/hardware.h> |
| 25 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
| 26 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
| 27 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
| 33 | #include <asm/mach/flash.h> | ||
| 28 | 34 | ||
| 29 | #include <asm/arch/gpio.h> | 35 | #include <asm/arch/gpio.h> |
| 30 | #include <asm/arch/mux.h> | 36 | #include <asm/arch/mux.h> |
| 31 | #include <asm/arch/usb.h> | 37 | #include <asm/arch/usb.h> |
| 38 | #include <asm/arch/tc.h> | ||
| 39 | #include <asm/arch/dma.h> | ||
| 32 | #include <asm/arch/board.h> | 40 | #include <asm/arch/board.h> |
| 41 | #include <asm/arch/irda.h> | ||
| 42 | #include <asm/arch/keypad.h> | ||
| 33 | #include <asm/arch/common.h> | 43 | #include <asm/arch/common.h> |
| 44 | #include <asm/arch/mcbsp.h> | ||
| 45 | #include <asm/arch/omap-alsa.h> | ||
| 34 | 46 | ||
| 35 | static void __init omap_generic_init_irq(void) | 47 | static void __init omap_palmte_init_irq(void) |
| 36 | { | 48 | { |
| 37 | omap1_init_common_hw(); | 49 | omap1_init_common_hw(); |
| 38 | omap_init_irq(); | 50 | omap_init_irq(); |
| 51 | omap_gpio_init(); | ||
| 39 | } | 52 | } |
| 40 | 53 | ||
| 54 | static int palmte_keymap[] = { | ||
| 55 | KEY(0, 0, KEY_F1), | ||
| 56 | KEY(0, 1, KEY_F2), | ||
| 57 | KEY(0, 2, KEY_F3), | ||
| 58 | KEY(0, 3, KEY_F4), | ||
| 59 | KEY(0, 4, KEY_POWER), | ||
| 60 | KEY(1, 0, KEY_LEFT), | ||
| 61 | KEY(1, 1, KEY_DOWN), | ||
| 62 | KEY(1, 2, KEY_UP), | ||
| 63 | KEY(1, 3, KEY_RIGHT), | ||
| 64 | KEY(1, 4, KEY_CENTER), | ||
| 65 | 0, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct omap_kp_platform_data palmte_kp_data = { | ||
| 69 | .rows = 8, | ||
| 70 | .cols = 8, | ||
| 71 | .keymap = palmte_keymap, | ||
| 72 | .rep = 1, | ||
| 73 | .delay = 12, | ||
| 74 | }; | ||
| 75 | |||
| 76 | static struct resource palmte_kp_resources[] = { | ||
| 77 | [0] = { | ||
| 78 | .start = INT_KEYBOARD, | ||
| 79 | .end = INT_KEYBOARD, | ||
| 80 | .flags = IORESOURCE_IRQ, | ||
| 81 | }, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct platform_device palmte_kp_device = { | ||
| 85 | .name = "omap-keypad", | ||
| 86 | .id = -1, | ||
| 87 | .dev = { | ||
| 88 | .platform_data = &palmte_kp_data, | ||
| 89 | }, | ||
| 90 | .num_resources = ARRAY_SIZE(palmte_kp_resources), | ||
| 91 | .resource = palmte_kp_resources, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct mtd_partition palmte_rom_partitions[] = { | ||
| 95 | /* PalmOS "Small ROM", contains the bootloader and the debugger */ | ||
| 96 | { | ||
| 97 | .name = "smallrom", | ||
| 98 | .offset = 0, | ||
| 99 | .size = 0xa000, | ||
| 100 | .mask_flags = MTD_WRITEABLE, | ||
| 101 | }, | ||
| 102 | /* PalmOS "Big ROM", a filesystem with all the OS code and data */ | ||
| 103 | { | ||
| 104 | .name = "bigrom", | ||
| 105 | .offset = SZ_128K, | ||
| 106 | /* | ||
| 107 | * 0x5f0000 bytes big in the multi-language ("EFIGS") version, | ||
| 108 | * 0x7b0000 bytes in the English-only ("enUS") version. | ||
| 109 | */ | ||
| 110 | .size = 0x7b0000, | ||
| 111 | .mask_flags = MTD_WRITEABLE, | ||
| 112 | }, | ||
| 113 | }; | ||
| 114 | |||
| 115 | static struct flash_platform_data palmte_rom_data = { | ||
| 116 | .map_name = "map_rom", | ||
| 117 | .width = 2, | ||
| 118 | .parts = palmte_rom_partitions, | ||
| 119 | .nr_parts = ARRAY_SIZE(palmte_rom_partitions), | ||
| 120 | }; | ||
| 121 | |||
| 122 | static struct resource palmte_rom_resource = { | ||
| 123 | .start = OMAP_CS0_PHYS, | ||
| 124 | .end = OMAP_CS0_PHYS + SZ_8M - 1, | ||
| 125 | .flags = IORESOURCE_MEM, | ||
| 126 | }; | ||
| 127 | |||
| 128 | static struct platform_device palmte_rom_device = { | ||
| 129 | .name = "omapflash", | ||
| 130 | .id = -1, | ||
| 131 | .dev = { | ||
| 132 | .platform_data = &palmte_rom_data, | ||
| 133 | }, | ||
| 134 | .num_resources = 1, | ||
| 135 | .resource = &palmte_rom_resource, | ||
| 136 | }; | ||
| 137 | |||
| 41 | static struct platform_device palmte_lcd_device = { | 138 | static struct platform_device palmte_lcd_device = { |
| 42 | .name = "lcd_palmte", | 139 | .name = "lcd_palmte", |
| 43 | .id = -1, | 140 | .id = -1, |
| 44 | }; | 141 | }; |
| 45 | 142 | ||
| 143 | static struct omap_backlight_config palmte_backlight_config = { | ||
| 144 | .default_intensity = 0xa0, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct platform_device palmte_backlight_device = { | ||
| 148 | .name = "omap-bl", | ||
| 149 | .id = -1, | ||
| 150 | .dev = { | ||
| 151 | .platform_data = &palmte_backlight_config, | ||
| 152 | }, | ||
| 153 | }; | ||
| 154 | |||
| 155 | static struct omap_irda_config palmte_irda_config = { | ||
| 156 | .transceiver_cap = IR_SIRMODE, | ||
| 157 | .rx_channel = OMAP_DMA_UART3_RX, | ||
| 158 | .tx_channel = OMAP_DMA_UART3_TX, | ||
| 159 | .dest_start = UART3_THR, | ||
| 160 | .src_start = UART3_RHR, | ||
| 161 | .tx_trigger = 0, | ||
| 162 | .rx_trigger = 0, | ||
| 163 | }; | ||
| 164 | |||
| 165 | static struct resource palmte_irda_resources[] = { | ||
| 166 | [0] = { | ||
| 167 | .start = INT_UART3, | ||
| 168 | .end = INT_UART3, | ||
| 169 | .flags = IORESOURCE_IRQ, | ||
| 170 | }, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct platform_device palmte_irda_device = { | ||
| 174 | .name = "omapirda", | ||
| 175 | .id = -1, | ||
| 176 | .dev = { | ||
| 177 | .platform_data = &palmte_irda_config, | ||
| 178 | }, | ||
| 179 | .num_resources = ARRAY_SIZE(palmte_irda_resources), | ||
| 180 | .resource = palmte_irda_resources, | ||
| 181 | }; | ||
| 182 | |||
| 46 | static struct platform_device *devices[] __initdata = { | 183 | static struct platform_device *devices[] __initdata = { |
| 184 | &palmte_rom_device, | ||
| 185 | &palmte_kp_device, | ||
| 47 | &palmte_lcd_device, | 186 | &palmte_lcd_device, |
| 187 | &palmte_backlight_device, | ||
| 188 | &palmte_irda_device, | ||
| 48 | }; | 189 | }; |
| 49 | 190 | ||
| 50 | static struct omap_usb_config palmte_usb_config __initdata = { | 191 | static struct omap_usb_config palmte_usb_config __initdata = { |
| 51 | .register_dev = 1, | 192 | .register_dev = 1, /* Mini-B only receptacle */ |
| 52 | .hmc_mode = 0, | 193 | .hmc_mode = 0, |
| 53 | .pins[0] = 3, | 194 | .pins[0] = 2, |
| 54 | }; | 195 | }; |
| 55 | 196 | ||
| 56 | static struct omap_mmc_config palmte_mmc_config __initdata = { | 197 | static struct omap_mmc_config palmte_mmc_config __initdata = { |
| 57 | .mmc [0] = { | 198 | .mmc[0] = { |
| 58 | .enabled = 1, | 199 | .enabled = 1, |
| 59 | .wire4 = 1, | 200 | .wp_pin = PALMTE_MMC_WP_GPIO, |
| 60 | .wp_pin = OMAP_MPUIO(3), | 201 | .power_pin = PALMTE_MMC_POWER_GPIO, |
| 61 | .power_pin = -1, | 202 | .switch_pin = PALMTE_MMC_SWITCH_GPIO, |
| 62 | .switch_pin = -1, | ||
| 63 | }, | 203 | }, |
| 64 | }; | 204 | }; |
| 65 | 205 | ||
| @@ -67,21 +207,222 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { | |||
| 67 | .ctrl_name = "internal", | 207 | .ctrl_name = "internal", |
| 68 | }; | 208 | }; |
| 69 | 209 | ||
| 210 | static struct omap_uart_config palmte_uart_config __initdata = { | ||
| 211 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 212 | }; | ||
| 213 | |||
| 214 | static struct omap_mcbsp_reg_cfg palmte_mcbsp1_regs = { | ||
| 215 | .spcr2 = FRST | GRST | XRST | XINTM(3), | ||
| 216 | .xcr2 = XDATDLY(1) | XFIG, | ||
| 217 | .xcr1 = XWDLEN1(OMAP_MCBSP_WORD_32), | ||
| 218 | .pcr0 = SCLKME | FSXP | CLKXP, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct omap_alsa_codec_config palmte_alsa_config = { | ||
| 222 | .name = "TSC2102 audio", | ||
| 223 | .mcbsp_regs_alsa = &palmte_mcbsp1_regs, | ||
| 224 | .codec_configure_dev = NULL, /* tsc2102_configure, */ | ||
| 225 | .codec_set_samplerate = NULL, /* tsc2102_set_samplerate, */ | ||
| 226 | .codec_clock_setup = NULL, /* tsc2102_clock_setup, */ | ||
| 227 | .codec_clock_on = NULL, /* tsc2102_clock_on, */ | ||
| 228 | .codec_clock_off = NULL, /* tsc2102_clock_off, */ | ||
| 229 | .get_default_samplerate = NULL, /* tsc2102_get_default_samplerate, */ | ||
| 230 | }; | ||
| 231 | |||
| 232 | #ifdef CONFIG_APM | ||
| 233 | /* | ||
| 234 | * Values measured in 10 minute intervals averaged over 10 samples. | ||
| 235 | * May differ slightly from device to device but should be accurate | ||
| 236 | * enough to give basic idea of battery life left and trigger | ||
| 237 | * potential alerts. | ||
| 238 | */ | ||
| 239 | static const int palmte_battery_sample[] = { | ||
| 240 | 2194, 2157, 2138, 2120, | ||
| 241 | 2104, 2089, 2075, 2061, | ||
| 242 | 2048, 2038, 2026, 2016, | ||
| 243 | 2008, 1998, 1989, 1980, | ||
| 244 | 1970, 1958, 1945, 1928, | ||
| 245 | 1910, 1888, 1860, 1827, | ||
| 246 | 1791, 1751, 1709, 1656, | ||
| 247 | }; | ||
| 248 | |||
| 249 | #define INTERVAL 10 | ||
| 250 | #define BATTERY_HIGH_TRESHOLD 66 | ||
| 251 | #define BATTERY_LOW_TRESHOLD 33 | ||
| 252 | |||
| 253 | static void palmte_get_power_status(struct apm_power_info *info, int *battery) | ||
| 254 | { | ||
| 255 | int charging, batt, hi, lo, mid; | ||
| 256 | |||
| 257 | charging = !omap_get_gpio_datain(PALMTE_DC_GPIO); | ||
| 258 | batt = battery[0]; | ||
| 259 | if (charging) | ||
| 260 | batt -= 60; | ||
| 261 | |||
| 262 | hi = ARRAY_SIZE(palmte_battery_sample); | ||
| 263 | lo = 0; | ||
| 264 | |||
| 265 | info->battery_flag = 0; | ||
| 266 | info->units = APM_UNITS_MINS; | ||
| 267 | |||
| 268 | if (batt > palmte_battery_sample[lo]) { | ||
| 269 | info->battery_life = 100; | ||
| 270 | info->time = INTERVAL * ARRAY_SIZE(palmte_battery_sample); | ||
| 271 | } else if (batt <= palmte_battery_sample[hi - 1]) { | ||
| 272 | info->battery_life = 0; | ||
| 273 | info->time = 0; | ||
| 274 | } else { | ||
| 275 | while (hi > lo + 1) { | ||
| 276 | mid = (hi + lo) >> 2; | ||
| 277 | if (batt <= palmte_battery_sample[mid]) | ||
| 278 | lo = mid; | ||
| 279 | else | ||
| 280 | hi = mid; | ||
| 281 | } | ||
| 282 | |||
| 283 | mid = palmte_battery_sample[lo] - palmte_battery_sample[hi]; | ||
| 284 | hi = palmte_battery_sample[lo] - batt; | ||
| 285 | info->battery_life = 100 - (100 * lo + 100 * hi / mid) / | ||
| 286 | ARRAY_SIZE(palmte_battery_sample); | ||
| 287 | info->time = INTERVAL * (ARRAY_SIZE(palmte_battery_sample) - | ||
| 288 | lo) - INTERVAL * hi / mid; | ||
| 289 | } | ||
| 290 | |||
| 291 | if (charging) { | ||
| 292 | info->ac_line_status = APM_AC_ONLINE; | ||
| 293 | info->battery_status = APM_BATTERY_STATUS_CHARGING; | ||
| 294 | info->battery_flag |= APM_BATTERY_FLAG_CHARGING; | ||
| 295 | } else { | ||
| 296 | info->ac_line_status = APM_AC_OFFLINE; | ||
| 297 | if (info->battery_life > BATTERY_HIGH_TRESHOLD) | ||
| 298 | info->battery_status = APM_BATTERY_STATUS_HIGH; | ||
| 299 | else if (info->battery_life > BATTERY_LOW_TRESHOLD) | ||
| 300 | info->battery_status = APM_BATTERY_STATUS_LOW; | ||
| 301 | else | ||
| 302 | info->battery_status = APM_BATTERY_STATUS_CRITICAL; | ||
| 303 | } | ||
| 304 | |||
| 305 | if (info->battery_life > BATTERY_HIGH_TRESHOLD) | ||
| 306 | info->battery_flag |= APM_BATTERY_FLAG_HIGH; | ||
| 307 | else if (info->battery_life > BATTERY_LOW_TRESHOLD) | ||
| 308 | info->battery_flag |= APM_BATTERY_FLAG_LOW; | ||
| 309 | else | ||
| 310 | info->battery_flag |= APM_BATTERY_FLAG_CRITICAL; | ||
| 311 | } | ||
| 312 | #else | ||
| 313 | #define palmte_get_power_status NULL | ||
| 314 | #endif | ||
| 315 | |||
| 316 | static struct tsc2102_config palmte_tsc2102_config = { | ||
| 317 | .use_internal = 0, | ||
| 318 | .monitor = TSC_BAT1 | TSC_AUX | TSC_TEMP, | ||
| 319 | .temp_at25c = { 2200, 2615 }, | ||
| 320 | .apm_report = palmte_get_power_status, | ||
| 321 | .alsa_config = &palmte_alsa_config, | ||
| 322 | }; | ||
| 323 | |||
| 70 | static struct omap_board_config_kernel palmte_config[] = { | 324 | static struct omap_board_config_kernel palmte_config[] = { |
| 71 | { OMAP_TAG_USB, &palmte_usb_config }, | 325 | { OMAP_TAG_USB, &palmte_usb_config }, |
| 72 | { OMAP_TAG_MMC, &palmte_mmc_config }, | 326 | { OMAP_TAG_MMC, &palmte_mmc_config }, |
| 73 | { OMAP_TAG_LCD, &palmte_lcd_config }, | 327 | { OMAP_TAG_LCD, &palmte_lcd_config }, |
| 328 | { OMAP_TAG_UART, &palmte_uart_config }, | ||
| 74 | }; | 329 | }; |
| 75 | 330 | ||
| 76 | static void __init omap_generic_init(void) | 331 | static struct spi_board_info palmte_spi_info[] __initdata = { |
| 332 | { | ||
| 333 | .modalias = "tsc2102", | ||
| 334 | .bus_num = 2, /* uWire (officially) */ | ||
| 335 | .chip_select = 0, /* As opposed to 3 */ | ||
| 336 | .irq = OMAP_GPIO_IRQ(PALMTE_PINTDAV_GPIO), | ||
| 337 | .platform_data = &palmte_tsc2102_config, | ||
| 338 | .max_speed_hz = 8000000, | ||
| 339 | }, | ||
| 340 | }; | ||
| 341 | |||
| 342 | /* Periodically check for changes on important input pins */ | ||
| 343 | struct timer_list palmte_pin_timer; | ||
| 344 | int prev_power, prev_headphones; | ||
| 345 | |||
| 346 | static void palmte_pin_handler(unsigned long data) { | ||
| 347 | int power, headphones; | ||
| 348 | |||
| 349 | power = !omap_get_gpio_datain(PALMTE_DC_GPIO); | ||
| 350 | headphones = omap_get_gpio_datain(PALMTE_HEADPHONES_GPIO); | ||
| 351 | |||
| 352 | if (power && !prev_power) | ||
| 353 | printk(KERN_INFO "PM: cable connected\n"); | ||
| 354 | else if (!power && prev_power) | ||
| 355 | printk(KERN_INFO "PM: cable disconnected\n"); | ||
| 356 | |||
| 357 | if (headphones && !prev_headphones) { | ||
| 358 | /* Headphones connected, disable speaker */ | ||
| 359 | omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 0); | ||
| 360 | printk(KERN_INFO "PM: speaker off\n"); | ||
| 361 | } else if (!headphones && prev_headphones) { | ||
| 362 | /* Headphones unplugged, re-enable speaker */ | ||
| 363 | omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 1); | ||
| 364 | printk(KERN_INFO "PM: speaker on\n"); | ||
| 365 | } | ||
| 366 | |||
| 367 | prev_power = power; | ||
| 368 | prev_headphones = headphones; | ||
| 369 | mod_timer(&palmte_pin_timer, jiffies + msecs_to_jiffies(500)); | ||
| 370 | } | ||
| 371 | |||
| 372 | static void __init palmte_gpio_setup(void) | ||
| 373 | { | ||
| 374 | /* Set TSC2102 PINTDAV pin as input */ | ||
| 375 | if (omap_request_gpio(PALMTE_PINTDAV_GPIO)) { | ||
| 376 | printk(KERN_ERR "Could not reserve PINTDAV GPIO!\n"); | ||
| 377 | return; | ||
| 378 | } | ||
| 379 | omap_set_gpio_direction(PALMTE_PINTDAV_GPIO, 1); | ||
| 380 | |||
| 381 | /* Monitor cable-connected signals */ | ||
| 382 | if (omap_request_gpio(PALMTE_DC_GPIO) || | ||
| 383 | omap_request_gpio(PALMTE_USB_OR_DC_GPIO) || | ||
| 384 | omap_request_gpio(PALMTE_USBDETECT_GPIO)) { | ||
| 385 | printk(KERN_ERR "Could not reserve cable signal GPIO!\n"); | ||
| 386 | return; | ||
| 387 | } | ||
| 388 | omap_set_gpio_direction(PALMTE_DC_GPIO, 1); | ||
| 389 | omap_set_gpio_direction(PALMTE_USB_OR_DC_GPIO, 1); | ||
| 390 | omap_set_gpio_direction(PALMTE_USBDETECT_GPIO, 1); | ||
| 391 | |||
| 392 | /* Set speaker-enable pin as output */ | ||
| 393 | if (omap_request_gpio(PALMTE_SPEAKER_GPIO)) { | ||
| 394 | printk(KERN_ERR "Could not reserve speaker GPIO!\n"); | ||
| 395 | return; | ||
| 396 | } | ||
| 397 | omap_set_gpio_direction(PALMTE_SPEAKER_GPIO, 0); | ||
| 398 | |||
| 399 | /* Monitor the headphones-connected signal */ | ||
| 400 | if (omap_request_gpio(PALMTE_HEADPHONES_GPIO)) { | ||
| 401 | printk(KERN_ERR "Could not reserve headphones signal GPIO!\n"); | ||
| 402 | return; | ||
| 403 | } | ||
| 404 | omap_set_gpio_direction(PALMTE_HEADPHONES_GPIO, 1); | ||
| 405 | |||
| 406 | prev_power = omap_get_gpio_datain(PALMTE_DC_GPIO); | ||
| 407 | prev_headphones = !omap_get_gpio_datain(PALMTE_HEADPHONES_GPIO); | ||
| 408 | setup_timer(&palmte_pin_timer, palmte_pin_handler, 0); | ||
| 409 | palmte_pin_handler(0); | ||
| 410 | } | ||
| 411 | |||
| 412 | static void __init omap_palmte_init(void) | ||
| 77 | { | 413 | { |
| 78 | omap_board_config = palmte_config; | 414 | omap_board_config = palmte_config; |
| 79 | omap_board_config_size = ARRAY_SIZE(palmte_config); | 415 | omap_board_config_size = ARRAY_SIZE(palmte_config); |
| 80 | 416 | ||
| 81 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 417 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 418 | |||
| 419 | spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); | ||
| 420 | |||
| 421 | omap_serial_init(); | ||
| 422 | palmte_gpio_setup(); | ||
| 82 | } | 423 | } |
| 83 | 424 | ||
| 84 | static void __init omap_generic_map_io(void) | 425 | static void __init omap_palmte_map_io(void) |
| 85 | { | 426 | { |
| 86 | omap1_map_common_io(); | 427 | omap1_map_common_io(); |
| 87 | } | 428 | } |
| @@ -90,8 +431,8 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") | |||
| 90 | .phys_io = 0xfff00000, | 431 | .phys_io = 0xfff00000, |
| 91 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | 432 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, |
| 92 | .boot_params = 0x10000100, | 433 | .boot_params = 0x10000100, |
| 93 | .map_io = omap_generic_map_io, | 434 | .map_io = omap_palmte_map_io, |
| 94 | .init_irq = omap_generic_init_irq, | 435 | .init_irq = omap_palmte_init_irq, |
| 95 | .init_machine = omap_generic_init, | 436 | .init_machine = omap_palmte_init, |
| 96 | .timer = &omap_timer, | 437 | .timer = &omap_timer, |
| 97 | MACHINE_END | 438 | MACHINE_END |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c new file mode 100644 index 000000000000..e47010fec275 --- /dev/null +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
| @@ -0,0 +1,357 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap1/board-palmtt.c | ||
| 3 | * | ||
| 4 | * Modified from board-palmtt2.c | ||
| 5 | * | ||
| 6 | * Modified and amended for Palm Tungsten|T | ||
| 7 | * by Marek Vasut <marek.vasut@gmail.com> | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/delay.h> | ||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/notifier.h> | ||
| 19 | #include <linux/clk.h> | ||
| 20 | #include <linux/input.h> | ||
| 21 | #include <linux/interrupt.h> | ||
| 22 | #include <linux/mtd/mtd.h> | ||
| 23 | #include <linux/mtd/partitions.h> | ||
| 24 | #include <linux/leds.h> | ||
| 25 | |||
| 26 | #include <asm/hardware.h> | ||
| 27 | #include <asm/mach-types.h> | ||
| 28 | #include <asm/mach/arch.h> | ||
| 29 | #include <asm/mach/map.h> | ||
| 30 | #include <asm/mach/flash.h> | ||
| 31 | |||
| 32 | #include <asm/arch/led.h> | ||
| 33 | #include <asm/arch/mcbsp.h> | ||
| 34 | #include <asm/arch/gpio.h> | ||
| 35 | #include <asm/arch/mux.h> | ||
| 36 | #include <asm/arch/usb.h> | ||
| 37 | #include <asm/arch/dma.h> | ||
| 38 | #include <asm/arch/tc.h> | ||
| 39 | #include <asm/arch/board.h> | ||
| 40 | #include <asm/arch/irda.h> | ||
| 41 | #include <asm/arch/keypad.h> | ||
| 42 | #include <asm/arch/common.h> | ||
| 43 | #include <asm/arch/omap-alsa.h> | ||
| 44 | |||
| 45 | #include <linux/input.h> | ||
| 46 | #include <linux/spi/spi.h> | ||
| 47 | #include <linux/spi/ads7846.h> | ||
| 48 | |||
| 49 | static int palmtt_keymap[] = { | ||
| 50 | KEY(0, 0, KEY_ESC), | ||
| 51 | KEY(0, 1, KEY_SPACE), | ||
| 52 | KEY(0, 2, KEY_LEFTCTRL), | ||
| 53 | KEY(0, 3, KEY_TAB), | ||
| 54 | KEY(0, 4, KEY_ENTER), | ||
| 55 | KEY(1, 0, KEY_LEFT), | ||
| 56 | KEY(1, 1, KEY_DOWN), | ||
| 57 | KEY(1, 2, KEY_UP), | ||
| 58 | KEY(1, 3, KEY_RIGHT), | ||
| 59 | KEY(2, 0, KEY_SLEEP), | ||
| 60 | KEY(2, 4, KEY_Y), | ||
| 61 | 0 | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct mtd_partition palmtt_partitions[] = { | ||
| 65 | { | ||
| 66 | .name = "write8k", | ||
| 67 | .offset = 0, | ||
| 68 | .size = SZ_8K, | ||
| 69 | .mask_flags = 0, | ||
| 70 | }, | ||
| 71 | { | ||
| 72 | .name = "PalmOS-BootLoader(ro)", | ||
| 73 | .offset = SZ_8K, | ||
| 74 | .size = 7 * SZ_8K, | ||
| 75 | .mask_flags = MTD_WRITEABLE, | ||
| 76 | }, | ||
| 77 | { | ||
| 78 | .name = "u-boot", | ||
| 79 | .offset = MTDPART_OFS_APPEND, | ||
| 80 | .size = 8 * SZ_8K, | ||
| 81 | .mask_flags = 0, | ||
| 82 | }, | ||
| 83 | { | ||
| 84 | .name = "PalmOS-FS(ro)", | ||
| 85 | .offset = MTDPART_OFS_APPEND, | ||
| 86 | .size = 7 * SZ_1M + 4 * SZ_64K - 16 * SZ_8K, | ||
| 87 | .mask_flags = MTD_WRITEABLE, | ||
| 88 | }, | ||
| 89 | { | ||
| 90 | .name = "u-boot(rez)", | ||
| 91 | .offset = MTDPART_OFS_APPEND, | ||
| 92 | .size = SZ_128K, | ||
| 93 | .mask_flags = 0 | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .name = "empty", | ||
| 97 | .offset = MTDPART_OFS_APPEND, | ||
| 98 | .size = MTDPART_SIZ_FULL, | ||
| 99 | .mask_flags = 0 | ||
| 100 | } | ||
| 101 | }; | ||
| 102 | |||
| 103 | static struct flash_platform_data palmtt_flash_data = { | ||
| 104 | .map_name = "cfi_probe", | ||
| 105 | .width = 2, | ||
| 106 | .parts = palmtt_partitions, | ||
| 107 | .nr_parts = ARRAY_SIZE(palmtt_partitions), | ||
| 108 | }; | ||
| 109 | |||
| 110 | static struct resource palmtt_flash_resource = { | ||
| 111 | .start = OMAP_CS0_PHYS, | ||
| 112 | .end = OMAP_CS0_PHYS + SZ_8M - 1, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }; | ||
| 115 | |||
| 116 | static struct platform_device palmtt_flash_device = { | ||
| 117 | .name = "omapflash", | ||
| 118 | .id = 0, | ||
| 119 | .dev = { | ||
| 120 | .platform_data = &palmtt_flash_data, | ||
| 121 | }, | ||
| 122 | .num_resources = 1, | ||
| 123 | .resource = &palmtt_flash_resource, | ||
| 124 | }; | ||
| 125 | |||
| 126 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 127 | |||
| 128 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 129 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 130 | .spcr1 = RINTM(3) | RRST, | ||
| 131 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 132 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 133 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | | ||
| 134 | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 135 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 136 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 137 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | | ||
| 138 | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 139 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 140 | .srgr2 = GSYNC | CLKSP | FSGM | | ||
| 141 | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 142 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct omap_alsa_codec_config alsa_config = { | ||
| 146 | .name = "PalmTT AIC23", | ||
| 147 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 148 | .codec_configure_dev = NULL, // aic23_configure, | ||
| 149 | .codec_set_samplerate = NULL, // aic23_set_samplerate, | ||
| 150 | .codec_clock_setup = NULL, // aic23_clock_setup, | ||
| 151 | .codec_clock_on = NULL, // aic23_clock_on, | ||
| 152 | .codec_clock_off = NULL, // aic23_clock_off, | ||
| 153 | .get_default_samplerate = NULL, // aic23_get_default_samplerate, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static struct platform_device palmtt_mcbsp1_device = { | ||
| 157 | .name = "omap_alsa_mcbsp", | ||
| 158 | .id = 1, | ||
| 159 | .dev = { | ||
| 160 | .platform_data = &alsa_config, | ||
| 161 | }, | ||
| 162 | }; | ||
| 163 | |||
| 164 | static struct resource palmtt_kp_resources[] = { | ||
| 165 | [0] = { | ||
| 166 | .start = INT_KEYBOARD, | ||
| 167 | .end = INT_KEYBOARD, | ||
| 168 | .flags = IORESOURCE_IRQ, | ||
| 169 | }, | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct omap_kp_platform_data palmtt_kp_data = { | ||
| 173 | .rows = 6, | ||
| 174 | .cols = 3, | ||
| 175 | .keymap = palmtt_keymap, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static struct platform_device palmtt_kp_device = { | ||
| 179 | .name = "omap-keypad", | ||
| 180 | .id = -1, | ||
| 181 | .dev = { | ||
| 182 | .platform_data = &palmtt_kp_data, | ||
| 183 | }, | ||
| 184 | .num_resources = ARRAY_SIZE(palmtt_kp_resources), | ||
| 185 | .resource = palmtt_kp_resources, | ||
| 186 | }; | ||
| 187 | |||
| 188 | static struct platform_device palmtt_lcd_device = { | ||
| 189 | .name = "lcd_palmtt", | ||
| 190 | .id = -1, | ||
| 191 | }; | ||
| 192 | static struct omap_irda_config palmtt_irda_config = { | ||
| 193 | .transceiver_cap = IR_SIRMODE, | ||
| 194 | .rx_channel = OMAP_DMA_UART3_RX, | ||
| 195 | .tx_channel = OMAP_DMA_UART3_TX, | ||
| 196 | .dest_start = UART3_THR, | ||
| 197 | .src_start = UART3_RHR, | ||
| 198 | .tx_trigger = 0, | ||
| 199 | .rx_trigger = 0, | ||
| 200 | }; | ||
| 201 | |||
| 202 | static struct resource palmtt_irda_resources[] = { | ||
| 203 | [0] = { | ||
| 204 | .start = INT_UART3, | ||
| 205 | .end = INT_UART3, | ||
| 206 | .flags = IORESOURCE_IRQ, | ||
| 207 | }, | ||
| 208 | }; | ||
| 209 | |||
| 210 | static struct platform_device palmtt_irda_device = { | ||
| 211 | .name = "omapirda", | ||
| 212 | .id = -1, | ||
| 213 | .dev = { | ||
| 214 | .platform_data = &palmtt_irda_config, | ||
| 215 | }, | ||
| 216 | .num_resources = ARRAY_SIZE(palmtt_irda_resources), | ||
| 217 | .resource = palmtt_irda_resources, | ||
| 218 | }; | ||
| 219 | |||
| 220 | static struct platform_device palmtt_spi_device = { | ||
| 221 | .name = "spi_palmtt", | ||
| 222 | .id = -1, | ||
| 223 | }; | ||
| 224 | |||
| 225 | static struct omap_backlight_config palmtt_backlight_config = { | ||
| 226 | .default_intensity = 0xa0, | ||
| 227 | }; | ||
| 228 | |||
| 229 | static struct platform_device palmtt_backlight_device = { | ||
| 230 | .name = "omap-bl", | ||
| 231 | .id = -1, | ||
| 232 | .dev = { | ||
| 233 | .platform_data= &palmtt_backlight_config, | ||
| 234 | }, | ||
| 235 | }; | ||
| 236 | |||
| 237 | static struct omap_led_config palmtt_led_config[] = { | ||
| 238 | { | ||
| 239 | .cdev = { | ||
| 240 | .name = "palmtt:led0", | ||
| 241 | }, | ||
| 242 | .gpio = PALMTT_LED_GPIO, | ||
| 243 | }, | ||
| 244 | }; | ||
| 245 | |||
| 246 | static struct omap_led_platform_data palmtt_led_data = { | ||
| 247 | .nr_leds = ARRAY_SIZE(palmtt_led_config), | ||
| 248 | .leds = palmtt_led_config, | ||
| 249 | }; | ||
| 250 | |||
| 251 | static struct platform_device palmtt_led_device = { | ||
| 252 | .name = "omap-led", | ||
| 253 | .id = -1, | ||
| 254 | .dev = { | ||
| 255 | .platform_data = &palmtt_led_data, | ||
| 256 | }, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct platform_device *palmtt_devices[] __initdata = { | ||
| 260 | &palmtt_flash_device, | ||
| 261 | &palmtt_mcbsp1_device, | ||
| 262 | &palmtt_kp_device, | ||
| 263 | &palmtt_lcd_device, | ||
| 264 | &palmtt_irda_device, | ||
| 265 | &palmtt_spi_device, | ||
| 266 | &palmtt_backlight_device, | ||
| 267 | &palmtt_led_device, | ||
| 268 | }; | ||
| 269 | |||
| 270 | static int palmtt_get_pendown_state(void) | ||
| 271 | { | ||
| 272 | return !omap_get_gpio_datain(6); | ||
| 273 | } | ||
| 274 | |||
| 275 | static const struct ads7846_platform_data palmtt_ts_info = { | ||
| 276 | .model = 7846, | ||
| 277 | .vref_delay_usecs = 100, /* internal, no capacitor */ | ||
| 278 | .x_plate_ohms = 419, | ||
| 279 | .y_plate_ohms = 486, | ||
| 280 | .get_pendown_state = palmtt_get_pendown_state, | ||
| 281 | }; | ||
| 282 | |||
| 283 | static struct spi_board_info __initdata palmtt_boardinfo[] = { | ||
| 284 | { | ||
| 285 | /* MicroWire (bus 2) CS0 has an ads7846e */ | ||
| 286 | .modalias = "ads7846", | ||
| 287 | .platform_data = &palmtt_ts_info, | ||
| 288 | .irq = OMAP_GPIO_IRQ(6), | ||
| 289 | .max_speed_hz = 120000 /* max sample rate at 3V */ | ||
| 290 | * 26 /* command + data + overhead */, | ||
| 291 | .bus_num = 2, | ||
| 292 | .chip_select = 0, | ||
| 293 | } | ||
| 294 | }; | ||
| 295 | |||
| 296 | static void __init omap_palmtt_init_irq(void) | ||
| 297 | { | ||
| 298 | omap1_init_common_hw(); | ||
| 299 | omap_init_irq(); | ||
| 300 | } | ||
| 301 | |||
| 302 | static struct omap_usb_config palmtt_usb_config __initdata = { | ||
| 303 | .register_dev = 1, | ||
| 304 | .hmc_mode = 0, | ||
| 305 | .pins[0] = 2, | ||
| 306 | }; | ||
| 307 | |||
| 308 | static struct omap_lcd_config palmtt_lcd_config __initdata = { | ||
| 309 | .ctrl_name = "internal", | ||
| 310 | }; | ||
| 311 | |||
| 312 | static struct omap_uart_config palmtt_uart_config __initdata = { | ||
| 313 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 314 | }; | ||
| 315 | |||
| 316 | static struct omap_board_config_kernel palmtt_config[] = { | ||
| 317 | { OMAP_TAG_USB, &palmtt_usb_config }, | ||
| 318 | { OMAP_TAG_LCD, &palmtt_lcd_config }, | ||
| 319 | { OMAP_TAG_UART, &palmtt_uart_config }, | ||
| 320 | }; | ||
| 321 | |||
| 322 | static void __init omap_mpu_wdt_mode(int mode) { | ||
| 323 | if (mode) | ||
| 324 | omap_writew(0x8000, OMAP_WDT_TIMER_MODE); | ||
| 325 | else { | ||
| 326 | omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); | ||
| 327 | omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); | ||
| 328 | } | ||
| 329 | } | ||
| 330 | |||
| 331 | static void __init omap_palmtt_init(void) | ||
| 332 | { | ||
| 333 | omap_mpu_wdt_mode(0); | ||
| 334 | |||
| 335 | omap_board_config = palmtt_config; | ||
| 336 | omap_board_config_size = ARRAY_SIZE(palmtt_config); | ||
| 337 | |||
| 338 | platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices)); | ||
| 339 | |||
| 340 | spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); | ||
| 341 | omap_serial_init(); | ||
| 342 | } | ||
| 343 | |||
| 344 | static void __init omap_palmtt_map_io(void) | ||
| 345 | { | ||
| 346 | omap1_map_common_io(); | ||
| 347 | } | ||
| 348 | |||
| 349 | MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") | ||
| 350 | .phys_io = 0xfff00000, | ||
| 351 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | ||
| 352 | .boot_params = 0x10000100, | ||
| 353 | .map_io = omap_palmtt_map_io, | ||
| 354 | .init_irq = omap_palmtt_init_irq, | ||
| 355 | .init_machine = omap_palmtt_init, | ||
| 356 | .timer = &omap_timer, | ||
| 357 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c new file mode 100644 index 000000000000..c275d517764a --- /dev/null +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
| @@ -0,0 +1,383 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap1/board-palmz71.c | ||
| 3 | * | ||
| 4 | * Modified from board-generic.c | ||
| 5 | * | ||
| 6 | * Support for the Palm Zire71 PDA. | ||
| 7 | * | ||
| 8 | * Original version : Laurent Gonzalez | ||
| 9 | * | ||
| 10 | * Modified for zire71 : Marek Vasut | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/delay.h> | ||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/notifier.h> | ||
| 22 | #include <linux/clk.h> | ||
| 23 | #include <linux/irq.h> | ||
| 24 | #include <linux/input.h> | ||
| 25 | #include <linux/interrupt.h> | ||
| 26 | #include <linux/mtd/mtd.h> | ||
| 27 | #include <linux/mtd/partitions.h> | ||
| 28 | |||
| 29 | #include <asm/hardware.h> | ||
| 30 | #include <asm/mach-types.h> | ||
| 31 | #include <asm/mach/arch.h> | ||
| 32 | #include <asm/mach/map.h> | ||
| 33 | #include <asm/mach/flash.h> | ||
| 34 | |||
| 35 | #include <asm/arch/mcbsp.h> | ||
| 36 | #include <asm/arch/gpio.h> | ||
| 37 | #include <asm/arch/mux.h> | ||
| 38 | #include <asm/arch/usb.h> | ||
| 39 | #include <asm/arch/dma.h> | ||
| 40 | #include <asm/arch/tc.h> | ||
| 41 | #include <asm/arch/board.h> | ||
| 42 | #include <asm/arch/irda.h> | ||
| 43 | #include <asm/arch/keypad.h> | ||
| 44 | #include <asm/arch/common.h> | ||
| 45 | #include <asm/arch/omap-alsa.h> | ||
| 46 | |||
| 47 | #include <linux/input.h> | ||
| 48 | #include <linux/spi/spi.h> | ||
| 49 | #include <linux/spi/ads7846.h> | ||
| 50 | |||
| 51 | static void __init | ||
| 52 | omap_palmz71_init_irq(void) | ||
| 53 | { | ||
| 54 | omap1_init_common_hw(); | ||
| 55 | omap_init_irq(); | ||
| 56 | omap_gpio_init(); | ||
| 57 | } | ||
| 58 | |||
| 59 | static int palmz71_keymap[] = { | ||
| 60 | KEY(0, 0, KEY_F1), | ||
| 61 | KEY(0, 1, KEY_F2), | ||
| 62 | KEY(0, 2, KEY_F3), | ||
| 63 | KEY(0, 3, KEY_F4), | ||
| 64 | KEY(0, 4, KEY_POWER), | ||
| 65 | KEY(1, 0, KEY_LEFT), | ||
| 66 | KEY(1, 1, KEY_DOWN), | ||
| 67 | KEY(1, 2, KEY_UP), | ||
| 68 | KEY(1, 3, KEY_RIGHT), | ||
| 69 | KEY(1, 4, KEY_CENTER), | ||
| 70 | KEY(2, 0, KEY_CAMERA), | ||
| 71 | 0, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct omap_kp_platform_data palmz71_kp_data = { | ||
| 75 | .rows = 8, | ||
| 76 | .cols = 8, | ||
| 77 | .keymap = palmz71_keymap, | ||
| 78 | .rep = 1, | ||
| 79 | .delay = 80, | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct resource palmz71_kp_resources[] = { | ||
| 83 | [0] = { | ||
| 84 | .start = INT_KEYBOARD, | ||
| 85 | .end = INT_KEYBOARD, | ||
| 86 | .flags = IORESOURCE_IRQ, | ||
| 87 | }, | ||
| 88 | }; | ||
| 89 | |||
| 90 | static struct platform_device palmz71_kp_device = { | ||
| 91 | .name = "omap-keypad", | ||
| 92 | .id = -1, | ||
| 93 | .dev = { | ||
| 94 | .platform_data = &palmz71_kp_data, | ||
| 95 | }, | ||
| 96 | .num_resources = ARRAY_SIZE(palmz71_kp_resources), | ||
| 97 | .resource = palmz71_kp_resources, | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct mtd_partition palmz71_rom_partitions[] = { | ||
| 101 | /* PalmOS "Small ROM", contains the bootloader and the debugger */ | ||
| 102 | { | ||
| 103 | .name = "smallrom", | ||
| 104 | .offset = 0, | ||
| 105 | .size = 0xa000, | ||
| 106 | .mask_flags = MTD_WRITEABLE, | ||
| 107 | }, | ||
| 108 | /* PalmOS "Big ROM", a filesystem with all the OS code and data */ | ||
| 109 | { | ||
| 110 | .name = "bigrom", | ||
| 111 | .offset = SZ_128K, | ||
| 112 | /* | ||
| 113 | * 0x5f0000 bytes big in the multi-language ("EFIGS") version, | ||
| 114 | * 0x7b0000 bytes in the English-only ("enUS") version. | ||
| 115 | */ | ||
| 116 | .size = 0x7b0000, | ||
| 117 | .mask_flags = MTD_WRITEABLE, | ||
| 118 | }, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct flash_platform_data palmz71_rom_data = { | ||
| 122 | .map_name = "map_rom", | ||
| 123 | .name = "onboardrom", | ||
| 124 | .width = 2, | ||
| 125 | .parts = palmz71_rom_partitions, | ||
| 126 | .nr_parts = ARRAY_SIZE(palmz71_rom_partitions), | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct resource palmz71_rom_resource = { | ||
| 130 | .start = OMAP_CS0_PHYS, | ||
| 131 | .end = OMAP_CS0_PHYS + SZ_8M - 1, | ||
| 132 | .flags = IORESOURCE_MEM, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct platform_device palmz71_rom_device = { | ||
| 136 | .name = "omapflash", | ||
| 137 | .id = -1, | ||
| 138 | .dev = { | ||
| 139 | .platform_data = &palmz71_rom_data, | ||
| 140 | }, | ||
| 141 | .num_resources = 1, | ||
| 142 | .resource = &palmz71_rom_resource, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct platform_device palmz71_lcd_device = { | ||
| 146 | .name = "lcd_palmz71", | ||
| 147 | .id = -1, | ||
| 148 | }; | ||
| 149 | |||
| 150 | static struct omap_irda_config palmz71_irda_config = { | ||
| 151 | .transceiver_cap = IR_SIRMODE, | ||
| 152 | .rx_channel = OMAP_DMA_UART3_RX, | ||
| 153 | .tx_channel = OMAP_DMA_UART3_TX, | ||
| 154 | .dest_start = UART3_THR, | ||
| 155 | .src_start = UART3_RHR, | ||
| 156 | .tx_trigger = 0, | ||
| 157 | .rx_trigger = 0, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct resource palmz71_irda_resources[] = { | ||
| 161 | [0] = { | ||
| 162 | .start = INT_UART3, | ||
| 163 | .end = INT_UART3, | ||
| 164 | .flags = IORESOURCE_IRQ, | ||
| 165 | }, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct platform_device palmz71_irda_device = { | ||
| 169 | .name = "omapirda", | ||
| 170 | .id = -1, | ||
| 171 | .dev = { | ||
| 172 | .platform_data = &palmz71_irda_config, | ||
| 173 | }, | ||
| 174 | .num_resources = ARRAY_SIZE(palmz71_irda_resources), | ||
| 175 | .resource = palmz71_irda_resources, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static struct platform_device palmz71_spi_device = { | ||
| 179 | .name = "spi_palmz71", | ||
| 180 | .id = -1, | ||
| 181 | }; | ||
| 182 | |||
| 183 | #define DEFAULT_BITPERSAMPLE 16 | ||
| 184 | |||
| 185 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { | ||
| 186 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | ||
| 187 | .spcr1 = RINTM(3) | RRST, | ||
| 188 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 189 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), | ||
| 190 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 191 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | ||
| 192 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, | ||
| 193 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | ||
| 194 | .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), | ||
| 195 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), | ||
| 196 | .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct omap_alsa_codec_config alsa_config = { | ||
| 200 | .name = "PalmZ71 AIC23", | ||
| 201 | .mcbsp_regs_alsa = &mcbsp_regs, | ||
| 202 | .codec_configure_dev = NULL, /* aic23_configure */ | ||
| 203 | .codec_set_samplerate = NULL, /* aic23_set_samplerate */ | ||
| 204 | .codec_clock_setup = NULL, /* aic23_clock_setup */ | ||
| 205 | .codec_clock_on = NULL, /* aic23_clock_on */ | ||
| 206 | .codec_clock_off = NULL, /* aic23_clock_off */ | ||
| 207 | .get_default_samplerate = NULL, /* aic23_get_default_samplerate */ | ||
| 208 | }; | ||
| 209 | |||
| 210 | static struct platform_device palmz71_mcbsp1_device = { | ||
| 211 | .name = "omap_alsa_mcbsp", | ||
| 212 | .id = 1, | ||
| 213 | .dev = { | ||
| 214 | .platform_data = &alsa_config, | ||
| 215 | }, | ||
| 216 | }; | ||
| 217 | |||
| 218 | static struct omap_backlight_config palmz71_backlight_config = { | ||
| 219 | .default_intensity = 0xa0, | ||
| 220 | }; | ||
| 221 | |||
| 222 | static struct platform_device palmz71_backlight_device = { | ||
| 223 | .name = "omap-bl", | ||
| 224 | .id = -1, | ||
| 225 | .dev = { | ||
| 226 | .platform_data = &palmz71_backlight_config, | ||
| 227 | }, | ||
| 228 | }; | ||
| 229 | |||
| 230 | static struct platform_device *devices[] __initdata = { | ||
| 231 | &palmz71_rom_device, | ||
| 232 | &palmz71_kp_device, | ||
| 233 | &palmz71_mcbsp1_device, | ||
| 234 | &palmz71_lcd_device, | ||
| 235 | &palmz71_irda_device, | ||
| 236 | &palmz71_spi_device, | ||
| 237 | &palmz71_backlight_device, | ||
| 238 | }; | ||
| 239 | |||
| 240 | static int | ||
| 241 | palmz71_get_pendown_state(void) | ||
| 242 | { | ||
| 243 | return !omap_get_gpio_datain(PALMZ71_PENIRQ_GPIO); | ||
| 244 | } | ||
| 245 | |||
| 246 | static const struct ads7846_platform_data palmz71_ts_info = { | ||
| 247 | .model = 7846, | ||
| 248 | .vref_delay_usecs = 100, /* internal, no capacitor */ | ||
| 249 | .x_plate_ohms = 419, | ||
| 250 | .y_plate_ohms = 486, | ||
| 251 | .get_pendown_state = palmz71_get_pendown_state, | ||
| 252 | }; | ||
| 253 | |||
| 254 | static struct spi_board_info __initdata palmz71_boardinfo[] = { { | ||
| 255 | /* MicroWire (bus 2) CS0 has an ads7846e */ | ||
| 256 | .modalias = "ads7846", | ||
| 257 | .platform_data = &palmz71_ts_info, | ||
| 258 | .irq = OMAP_GPIO_IRQ(PALMZ71_PENIRQ_GPIO), | ||
| 259 | .max_speed_hz = 120000 /* max sample rate at 3V */ | ||
| 260 | * 26 /* command + data + overhead */, | ||
| 261 | .bus_num = 2, | ||
| 262 | .chip_select = 0, | ||
| 263 | } }; | ||
| 264 | |||
| 265 | static struct omap_usb_config palmz71_usb_config __initdata = { | ||
| 266 | .register_dev = 1, /* Mini-B only receptacle */ | ||
| 267 | .hmc_mode = 0, | ||
| 268 | .pins[0] = 2, | ||
| 269 | }; | ||
| 270 | |||
| 271 | static struct omap_mmc_config palmz71_mmc_config __initdata = { | ||
| 272 | .mmc[0] = { | ||
| 273 | .enabled = 1, | ||
| 274 | .wire4 = 0, | ||
| 275 | .wp_pin = PALMZ71_MMC_WP_GPIO, | ||
| 276 | .power_pin = -1, | ||
| 277 | .switch_pin = PALMZ71_MMC_IN_GPIO, | ||
| 278 | }, | ||
| 279 | }; | ||
| 280 | |||
| 281 | static struct omap_lcd_config palmz71_lcd_config __initdata = { | ||
| 282 | .ctrl_name = "internal", | ||
| 283 | }; | ||
| 284 | |||
| 285 | static struct omap_uart_config palmz71_uart_config __initdata = { | ||
| 286 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct omap_board_config_kernel palmz71_config[] = { | ||
| 290 | {OMAP_TAG_USB, &palmz71_usb_config}, | ||
| 291 | {OMAP_TAG_MMC, &palmz71_mmc_config}, | ||
| 292 | {OMAP_TAG_LCD, &palmz71_lcd_config}, | ||
| 293 | {OMAP_TAG_UART, &palmz71_uart_config}, | ||
| 294 | }; | ||
| 295 | |||
| 296 | static irqreturn_t | ||
| 297 | palmz71_powercable(int irq, void *dev_id) | ||
| 298 | { | ||
| 299 | if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) { | ||
| 300 | printk(KERN_INFO "PM: Power cable connected\n"); | ||
| 301 | set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), | ||
| 302 | IRQT_FALLING); | ||
| 303 | } else { | ||
| 304 | printk(KERN_INFO "PM: Power cable disconnected\n"); | ||
| 305 | set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), | ||
| 306 | IRQT_RISING); | ||
| 307 | } | ||
| 308 | return IRQ_HANDLED; | ||
| 309 | } | ||
| 310 | |||
| 311 | static void __init | ||
| 312 | omap_mpu_wdt_mode(int mode) | ||
| 313 | { | ||
| 314 | if (mode) | ||
| 315 | omap_writew(0x8000, OMAP_WDT_TIMER_MODE); | ||
| 316 | else { | ||
| 317 | omap_writew(0x00f5, OMAP_WDT_TIMER_MODE); | ||
| 318 | omap_writew(0x00a0, OMAP_WDT_TIMER_MODE); | ||
| 319 | } | ||
| 320 | } | ||
| 321 | |||
| 322 | static void __init | ||
| 323 | palmz71_gpio_setup(int early) | ||
| 324 | { | ||
| 325 | if (early) { | ||
| 326 | /* Only set GPIO1 so we have a working serial */ | ||
| 327 | omap_set_gpio_dataout(1, 1); | ||
| 328 | omap_set_gpio_direction(1, 0); | ||
| 329 | } else { | ||
| 330 | /* Set MMC/SD host WP pin as input */ | ||
| 331 | if (omap_request_gpio(PALMZ71_MMC_WP_GPIO)) { | ||
| 332 | printk(KERN_ERR "Could not reserve WP GPIO!\n"); | ||
| 333 | return; | ||
| 334 | } | ||
| 335 | omap_set_gpio_direction(PALMZ71_MMC_WP_GPIO, 1); | ||
| 336 | |||
| 337 | /* Monitor the Power-cable-connected signal */ | ||
| 338 | if (omap_request_gpio(PALMZ71_USBDETECT_GPIO)) { | ||
| 339 | printk(KERN_ERR | ||
| 340 | "Could not reserve cable signal GPIO!\n"); | ||
| 341 | return; | ||
| 342 | } | ||
| 343 | omap_set_gpio_direction(PALMZ71_USBDETECT_GPIO, 1); | ||
| 344 | if (request_irq(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), | ||
| 345 | palmz71_powercable, IRQF_SAMPLE_RANDOM, | ||
| 346 | "palmz71-cable", 0)) | ||
| 347 | printk(KERN_ERR | ||
| 348 | "IRQ request for power cable failed!\n"); | ||
| 349 | palmz71_powercable(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 0); | ||
| 350 | } | ||
| 351 | } | ||
| 352 | |||
| 353 | static void __init | ||
| 354 | omap_palmz71_init(void) | ||
| 355 | { | ||
| 356 | palmz71_gpio_setup(1); | ||
| 357 | omap_mpu_wdt_mode(0); | ||
| 358 | |||
| 359 | omap_board_config = palmz71_config; | ||
| 360 | omap_board_config_size = ARRAY_SIZE(palmz71_config); | ||
| 361 | |||
| 362 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 363 | |||
| 364 | spi_register_board_info(palmz71_boardinfo, | ||
| 365 | ARRAY_SIZE(palmz71_boardinfo)); | ||
| 366 | omap_serial_init(); | ||
| 367 | palmz71_gpio_setup(0); | ||
| 368 | } | ||
| 369 | |||
| 370 | static void __init | ||
| 371 | omap_palmz71_map_io(void) | ||
| 372 | { | ||
| 373 | omap1_map_common_io(); | ||
| 374 | } | ||
| 375 | |||
| 376 | MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") | ||
| 377 | .phys_io = 0xfff00000, | ||
| 378 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | ||
| 379 | .boot_params = 0x10000100,.map_io = omap_palmz71_map_io, | ||
| 380 | .init_irq = omap_palmz71_init_irq, | ||
| 381 | .init_machine = omap_palmz71_init, | ||
| 382 | .timer = &omap_timer, | ||
| 383 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c new file mode 100644 index 000000000000..2743d639aa05 --- /dev/null +++ b/arch/arm/mach-omap1/board-sx1.c | |||
| @@ -0,0 +1,494 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap1/board-sx1.c | ||
| 3 | * | ||
| 4 | * Modified from board-generic.c | ||
| 5 | * | ||
| 6 | * Support for the Siemens SX1 mobile phone. | ||
| 7 | * | ||
| 8 | * Original version : Vladimir Ananiev (Vovan888-at-gmail com) | ||
| 9 | * | ||
| 10 | * Maintainters : Vladimir Ananiev (aka Vovan888), Sergge | ||
| 11 | * oslik.ru | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify | ||
| 14 | * it under the terms of the GNU General Public License version 2 as | ||
| 15 | * published by the Free Software Foundation. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/input.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/notifier.h> | ||
| 23 | #include <linux/mtd/mtd.h> | ||
| 24 | #include <linux/mtd/partitions.h> | ||
| 25 | #include <linux/types.h> | ||
| 26 | #include <linux/i2c.h> | ||
| 27 | #include <linux/errno.h> | ||
| 28 | |||
| 29 | #include <asm/hardware.h> | ||
| 30 | #include <asm/mach-types.h> | ||
| 31 | #include <asm/mach/arch.h> | ||
| 32 | #include <asm/mach/flash.h> | ||
| 33 | #include <asm/mach/map.h> | ||
| 34 | |||
| 35 | #include <asm/arch/gpio.h> | ||
| 36 | #include <asm/arch/mux.h> | ||
| 37 | #include <asm/arch/irda.h> | ||
| 38 | #include <asm/arch/usb.h> | ||
| 39 | #include <asm/arch/tc.h> | ||
| 40 | #include <asm/arch/board.h> | ||
| 41 | #include <asm/arch/common.h> | ||
| 42 | #include <asm/arch/mcbsp.h> | ||
| 43 | #include <asm/arch/omap-alsa.h> | ||
| 44 | #include <asm/arch/keypad.h> | ||
| 45 | |||
| 46 | /* Write to I2C device */ | ||
| 47 | int i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) | ||
| 48 | { | ||
| 49 | struct i2c_adapter *adap; | ||
| 50 | int err; | ||
| 51 | struct i2c_msg msg[1]; | ||
| 52 | unsigned char data[2]; | ||
| 53 | |||
| 54 | adap = i2c_get_adapter(0); | ||
| 55 | if (!adap) | ||
| 56 | return -ENODEV; | ||
| 57 | msg->addr = devaddr; /* I2C address of chip */ | ||
| 58 | msg->flags = 0; | ||
| 59 | msg->len = 2; | ||
| 60 | msg->buf = data; | ||
| 61 | data[0] = regoffset; /* register num */ | ||
| 62 | data[1] = value; /* register data */ | ||
| 63 | err = i2c_transfer(adap, msg, 1); | ||
| 64 | if (err >= 0) | ||
| 65 | return 0; | ||
| 66 | return err; | ||
| 67 | } | ||
| 68 | |||
| 69 | /* Read from I2C device */ | ||
| 70 | int i2c_read_byte(u8 devaddr, u8 regoffset, u8 * value) | ||
| 71 | { | ||
| 72 | struct i2c_adapter *adap; | ||
| 73 | int err; | ||
| 74 | struct i2c_msg msg[1]; | ||
| 75 | unsigned char data[2]; | ||
| 76 | |||
| 77 | adap = i2c_get_adapter(0); | ||
| 78 | if (!adap) | ||
| 79 | return -ENODEV; | ||
| 80 | |||
| 81 | msg->addr = devaddr; /* I2C address of chip */ | ||
| 82 | msg->flags = 0; | ||
| 83 | msg->len = 1; | ||
| 84 | msg->buf = data; | ||
| 85 | data[0] = regoffset; /* register num */ | ||
| 86 | err = i2c_transfer(adap, msg, 1); | ||
| 87 | |||
| 88 | msg->addr = devaddr; /* I2C address */ | ||
| 89 | msg->flags = I2C_M_RD; | ||
| 90 | msg->len = 1; | ||
| 91 | msg->buf = data; | ||
| 92 | err = i2c_transfer(adap, msg, 1); | ||
| 93 | *value = data[0]; | ||
| 94 | |||
| 95 | if (err >= 0) | ||
| 96 | return 0; | ||
| 97 | return err; | ||
| 98 | } | ||
| 99 | /* set keyboard backlight intensity */ | ||
| 100 | int sx1_setkeylight(u8 keylight) | ||
| 101 | { | ||
| 102 | if (keylight > SOFIA_MAX_LIGHT_VAL) | ||
| 103 | keylight = SOFIA_MAX_LIGHT_VAL; | ||
| 104 | return i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_KEYLIGHT_REG, keylight); | ||
| 105 | } | ||
| 106 | /* get current keylight intensity */ | ||
| 107 | int sx1_getkeylight(u8 * keylight) | ||
| 108 | { | ||
| 109 | return i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_KEYLIGHT_REG, keylight); | ||
| 110 | } | ||
| 111 | /* set LCD backlight intensity */ | ||
| 112 | int sx1_setbacklight(u8 backlight) | ||
| 113 | { | ||
| 114 | if (backlight > SOFIA_MAX_LIGHT_VAL) | ||
| 115 | backlight = SOFIA_MAX_LIGHT_VAL; | ||
| 116 | return i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_BACKLIGHT_REG, backlight); | ||
| 117 | } | ||
| 118 | /* get current LCD backlight intensity */ | ||
| 119 | int sx1_getbacklight (u8 * backlight) | ||
| 120 | { | ||
| 121 | return i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_BACKLIGHT_REG, backlight); | ||
| 122 | } | ||
| 123 | /* set LCD backlight power on/off */ | ||
| 124 | int sx1_setmmipower(u8 onoff) | ||
| 125 | { | ||
| 126 | int err; | ||
| 127 | u8 dat = 0; | ||
| 128 | err = i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, &dat); | ||
| 129 | if (err < 0) | ||
| 130 | return err; | ||
| 131 | if (onoff) | ||
| 132 | dat |= SOFIA_MMILIGHT_POWER; | ||
| 133 | else | ||
| 134 | dat &= ~SOFIA_MMILIGHT_POWER; | ||
| 135 | return i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, dat); | ||
| 136 | } | ||
| 137 | /* set MMC power on/off */ | ||
| 138 | int sx1_setmmcpower(u8 onoff) | ||
| 139 | { | ||
| 140 | int err; | ||
| 141 | u8 dat = 0; | ||
| 142 | err = i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, &dat); | ||
| 143 | if (err < 0) | ||
| 144 | return err; | ||
| 145 | if (onoff) | ||
| 146 | dat |= SOFIA_MMC_POWER; | ||
| 147 | else | ||
| 148 | dat &= ~SOFIA_MMC_POWER; | ||
| 149 | return i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, dat); | ||
| 150 | } | ||
| 151 | /* set USB power on/off */ | ||
| 152 | int sx1_setusbpower(u8 onoff) | ||
| 153 | { | ||
| 154 | int err; | ||
| 155 | u8 dat = 0; | ||
| 156 | err = i2c_read_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, &dat); | ||
| 157 | if (err < 0) | ||
| 158 | return err; | ||
| 159 | if (onoff) | ||
| 160 | dat |= SOFIA_USB_POWER; | ||
| 161 | else | ||
| 162 | dat &= ~SOFIA_USB_POWER; | ||
| 163 | return i2c_write_byte(SOFIA_I2C_ADDR, SOFIA_POWER1_REG, dat); | ||
| 164 | } | ||
| 165 | |||
| 166 | EXPORT_SYMBOL(sx1_setkeylight); | ||
| 167 | EXPORT_SYMBOL(sx1_getkeylight); | ||
| 168 | EXPORT_SYMBOL(sx1_setbacklight); | ||
| 169 | EXPORT_SYMBOL(sx1_getbacklight); | ||
| 170 | EXPORT_SYMBOL(sx1_setmmipower); | ||
| 171 | EXPORT_SYMBOL(sx1_setmmcpower); | ||
| 172 | EXPORT_SYMBOL(sx1_setusbpower); | ||
| 173 | |||
| 174 | /*----------- Keypad -------------------------*/ | ||
| 175 | |||
| 176 | static int sx1_keymap[] = { | ||
| 177 | KEY(5, 3, GROUP_0 | 117), /* camera Qt::Key_F17 */ | ||
| 178 | KEY(0, 4, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ | ||
| 179 | KEY(1, 4, GROUP_2 | 114), /* voice memo */ | ||
| 180 | KEY(2, 4, GROUP_3 | 114), /* voice memo */ | ||
| 181 | KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */ | ||
| 182 | KEY(4, 3, GROUP_1 | KEY_LEFT), | ||
| 183 | KEY(2, 3, GROUP_1 | KEY_DOWN), | ||
| 184 | KEY(1, 3, GROUP_1 | KEY_RIGHT), | ||
| 185 | KEY(0, 3, GROUP_1 | KEY_UP), | ||
| 186 | KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */ | ||
| 187 | KEY(5, 0, GROUP_1 | KEY_1), | ||
| 188 | KEY(4, 0, GROUP_1 | KEY_2), | ||
| 189 | KEY(3, 0, GROUP_1 | KEY_3), | ||
| 190 | KEY(3, 4, GROUP_1 | KEY_4), | ||
| 191 | KEY(4, 4, GROUP_1 | KEY_5), | ||
| 192 | KEY(5, 4, GROUP_1 | KEY_KPASTERISK),/* "*" */ | ||
| 193 | KEY(4, 1, GROUP_1 | KEY_6), | ||
| 194 | KEY(5, 1, GROUP_1 | KEY_7), | ||
| 195 | KEY(3, 1, GROUP_1 | KEY_8), | ||
| 196 | KEY(3, 2, GROUP_1 | KEY_9), | ||
| 197 | KEY(5, 2, GROUP_1 | KEY_0), | ||
| 198 | KEY(4, 2, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ | ||
| 199 | KEY(0, 1, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ | ||
| 200 | KEY(1, 2, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ | ||
| 201 | KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */ | ||
| 202 | KEY(2, 1, GROUP_1 | KEY_LEFTSHIFT), /* shift */ | ||
| 203 | KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */ | ||
| 204 | KEY(0, 2, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ | ||
| 205 | 0 | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct resource sx1_kp_resources[] = { | ||
| 209 | [0] = { | ||
| 210 | .start = INT_KEYBOARD, | ||
| 211 | .end = INT_KEYBOARD, | ||
| 212 | .flags = IORESOURCE_IRQ, | ||
| 213 | }, | ||
| 214 | }; | ||
| 215 | |||
| 216 | static struct omap_kp_platform_data sx1_kp_data = { | ||
| 217 | .rows = 6, | ||
| 218 | .cols = 6, | ||
| 219 | .keymap = sx1_keymap, | ||
| 220 | .keymapsize = ARRAY_SIZE(sx1_keymap), | ||
| 221 | .delay = 80, | ||
| 222 | }; | ||
| 223 | |||
| 224 | static struct platform_device sx1_kp_device = { | ||
| 225 | .name = "omap-keypad", | ||
| 226 | .id = -1, | ||
| 227 | .dev = { | ||
| 228 | .platform_data = &sx1_kp_data, | ||
| 229 | }, | ||
| 230 | .num_resources = ARRAY_SIZE(sx1_kp_resources), | ||
| 231 | .resource = sx1_kp_resources, | ||
| 232 | }; | ||
| 233 | |||
| 234 | /*----------- IRDA -------------------------*/ | ||
| 235 | |||
| 236 | static struct omap_irda_config sx1_irda_data = { | ||
| 237 | .transceiver_cap = IR_SIRMODE, | ||
| 238 | .rx_channel = OMAP_DMA_UART3_RX, | ||
| 239 | .tx_channel = OMAP_DMA_UART3_TX, | ||
| 240 | .dest_start = UART3_THR, | ||
| 241 | .src_start = UART3_RHR, | ||
| 242 | .tx_trigger = 0, | ||
| 243 | .rx_trigger = 0, | ||
| 244 | }; | ||
| 245 | |||
| 246 | static struct resource sx1_irda_resources[] = { | ||
| 247 | [0] = { | ||
| 248 | .start = INT_UART3, | ||
| 249 | .end = INT_UART3, | ||
| 250 | .flags = IORESOURCE_IRQ, | ||
| 251 | }, | ||
| 252 | }; | ||
| 253 | |||
| 254 | static u64 irda_dmamask = 0xffffffff; | ||
| 255 | |||
| 256 | static struct platform_device sx1_irda_device = { | ||
| 257 | .name = "omapirda", | ||
| 258 | .id = 0, | ||
| 259 | .dev = { | ||
| 260 | .platform_data = &sx1_irda_data, | ||
| 261 | .dma_mask = &irda_dmamask, | ||
| 262 | }, | ||
| 263 | .num_resources = ARRAY_SIZE(sx1_irda_resources), | ||
| 264 | .resource = sx1_irda_resources, | ||
| 265 | }; | ||
| 266 | |||
| 267 | /*----------- McBSP & Sound -------------------------*/ | ||
| 268 | |||
| 269 | /* Playback interface - McBSP1 */ | ||
| 270 | static struct omap_mcbsp_reg_cfg mcbsp1_regs = { | ||
| 271 | .spcr2 = XINTM(3), /* SPCR2=30 */ | ||
| 272 | .spcr1 = RINTM(3), /* SPCR1=30 */ | ||
| 273 | .rcr2 = 0, /* RCR2 =00 */ | ||
| 274 | .rcr1 = RFRLEN1(1) | RWDLEN1(OMAP_MCBSP_WORD_16), /* RCR1=140 */ | ||
| 275 | .xcr2 = 0, /* XCR2 = 0 */ | ||
| 276 | .xcr1 = XFRLEN1(1) | XWDLEN1(OMAP_MCBSP_WORD_16), /* XCR1 = 140 */ | ||
| 277 | .srgr1 = FWID(15) | CLKGDV(12), /* SRGR1=0f0c */ | ||
| 278 | .srgr2 = FSGM | FPER(31), /* SRGR2=101f */ | ||
| 279 | .pcr0 = FSXM | FSRM | CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, | ||
| 280 | /* PCR0 =0f0f */ | ||
| 281 | }; | ||
| 282 | |||
| 283 | /* TODO: PCM interface - McBSP2 */ | ||
| 284 | static struct omap_mcbsp_reg_cfg mcbsp2_regs = { | ||
| 285 | .spcr2 = FRST | GRST | XRST | XINTM(3), /* SPCR2=F1 */ | ||
| 286 | .spcr1 = RINTM(3) | RRST, /* SPCR1=30 */ | ||
| 287 | .rcr2 = 0, /* RCR2 =00 */ | ||
| 288 | .rcr1 = RFRLEN1(1) | RWDLEN1(OMAP_MCBSP_WORD_16), /* RCR1 = 140 */ | ||
| 289 | .xcr2 = 0, /* XCR2 = 0 */ | ||
| 290 | .xcr1 = XFRLEN1(1) | XWDLEN1(OMAP_MCBSP_WORD_16), /* XCR1 = 140 */ | ||
| 291 | .srgr1 = FWID(15) | CLKGDV(12), /* SRGR1=0f0c */ | ||
| 292 | .srgr2 = FSGM | FPER(31), /* SRGR2=101f */ | ||
| 293 | .pcr0 = FSXM | FSRM | CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, | ||
| 294 | /* PCR0=0f0f */ | ||
| 295 | /* mcbsp: slave */ | ||
| 296 | }; | ||
| 297 | |||
| 298 | static struct omap_alsa_codec_config sx1_alsa_config = { | ||
| 299 | .name = "SX1 EGold", | ||
| 300 | .mcbsp_regs_alsa = &mcbsp1_regs, | ||
| 301 | }; | ||
| 302 | |||
| 303 | static struct platform_device sx1_mcbsp1_device = { | ||
| 304 | .name = "omap_alsa_mcbsp", | ||
| 305 | .id = 1, | ||
| 306 | .dev = { | ||
| 307 | .platform_data = &sx1_alsa_config, | ||
| 308 | }, | ||
| 309 | }; | ||
| 310 | |||
| 311 | /*----------- MTD -------------------------*/ | ||
| 312 | |||
| 313 | static struct mtd_partition sx1_partitions[] = { | ||
| 314 | /* bootloader (U-Boot, etc) in first sector */ | ||
| 315 | { | ||
| 316 | .name = "bootloader", | ||
| 317 | .offset = 0x01800000, | ||
| 318 | .size = SZ_128K, | ||
| 319 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 320 | }, | ||
| 321 | /* bootloader params in the next sector */ | ||
| 322 | { | ||
| 323 | .name = "params", | ||
| 324 | .offset = MTDPART_OFS_APPEND, | ||
| 325 | .size = SZ_128K, | ||
| 326 | .mask_flags = 0, | ||
| 327 | }, | ||
| 328 | /* kernel */ | ||
| 329 | { | ||
| 330 | .name = "kernel", | ||
| 331 | .offset = MTDPART_OFS_APPEND, | ||
| 332 | .size = SZ_2M - 2 * SZ_128K, | ||
| 333 | .mask_flags = 0 | ||
| 334 | }, | ||
| 335 | /* file system */ | ||
| 336 | { | ||
| 337 | .name = "filesystem", | ||
| 338 | .offset = MTDPART_OFS_APPEND, | ||
| 339 | .size = MTDPART_SIZ_FULL, | ||
| 340 | .mask_flags = 0 | ||
| 341 | } | ||
| 342 | }; | ||
| 343 | |||
| 344 | static struct flash_platform_data sx1_flash_data = { | ||
| 345 | .map_name = "cfi_probe", | ||
| 346 | .width = 2, | ||
| 347 | .parts = sx1_partitions, | ||
| 348 | .nr_parts = ARRAY_SIZE(sx1_partitions), | ||
| 349 | }; | ||
| 350 | |||
| 351 | #ifdef CONFIG_SX1_OLD_FLASH | ||
| 352 | /* MTD Intel StrataFlash - old flashes */ | ||
| 353 | static struct resource sx1_old_flash_resource[] = { | ||
| 354 | [0] = { | ||
| 355 | .start = OMAP_CS0_PHYS, /* Physical */ | ||
| 356 | .end = OMAP_CS0_PHYS + SZ_16M - 1,, | ||
| 357 | .flags = IORESOURCE_MEM, | ||
| 358 | }, | ||
| 359 | [1] = { | ||
| 360 | .start = OMAP_CS1_PHYS, | ||
| 361 | .end = OMAP_CS1_PHYS + SZ_8M - 1, | ||
| 362 | .flags = IORESOURCE_MEM, | ||
| 363 | }, | ||
| 364 | }; | ||
| 365 | |||
| 366 | static struct platform_device sx1_flash_device = { | ||
| 367 | .name = "omapflash", | ||
| 368 | .id = 0, | ||
| 369 | .dev = { | ||
| 370 | .platform_data = &sx1_flash_data, | ||
| 371 | }, | ||
| 372 | .num_resources = 2, | ||
| 373 | .resource = &sx1_old_flash_resource, | ||
| 374 | }; | ||
| 375 | #else | ||
| 376 | /* MTD Intel 4000 flash - new flashes */ | ||
| 377 | static struct resource sx1_new_flash_resource = { | ||
| 378 | .start = OMAP_CS0_PHYS, | ||
| 379 | .end = OMAP_CS0_PHYS + SZ_32M - 1, | ||
| 380 | .flags = IORESOURCE_MEM, | ||
| 381 | }; | ||
| 382 | |||
| 383 | static struct platform_device sx1_flash_device = { | ||
| 384 | .name = "omapflash", | ||
| 385 | .id = 0, | ||
| 386 | .dev = { | ||
| 387 | .platform_data = &sx1_flash_data, | ||
| 388 | }, | ||
| 389 | .num_resources = 1, | ||
| 390 | .resource = &sx1_new_flash_resource, | ||
| 391 | }; | ||
| 392 | #endif | ||
| 393 | |||
| 394 | /*----------- USB -------------------------*/ | ||
| 395 | |||
| 396 | static struct omap_usb_config sx1_usb_config __initdata = { | ||
| 397 | .otg = 0, | ||
| 398 | .register_dev = 1, | ||
| 399 | .register_host = 0, | ||
| 400 | .hmc_mode = 0, | ||
| 401 | .pins[0] = 2, | ||
| 402 | .pins[1] = 0, | ||
| 403 | .pins[2] = 0, | ||
| 404 | }; | ||
| 405 | |||
| 406 | /*----------- MMC -------------------------*/ | ||
| 407 | |||
| 408 | static struct omap_mmc_config sx1_mmc_config __initdata = { | ||
| 409 | .mmc [0] = { | ||
| 410 | .enabled = 1, | ||
| 411 | .wire4 = 0, | ||
| 412 | .wp_pin = -1, | ||
| 413 | .power_pin = -1, /* power is in Sofia */ | ||
| 414 | .switch_pin = OMAP_MPUIO(3), | ||
| 415 | }, | ||
| 416 | }; | ||
| 417 | |||
| 418 | /*----------- LCD -------------------------*/ | ||
| 419 | |||
| 420 | static struct platform_device sx1_lcd_device = { | ||
| 421 | .name = "lcd_sx1", | ||
| 422 | .id = -1, | ||
| 423 | }; | ||
| 424 | |||
| 425 | static struct omap_lcd_config sx1_lcd_config __initdata = { | ||
| 426 | .ctrl_name = "internal", | ||
| 427 | }; | ||
| 428 | |||
| 429 | /*-----------------------------------------*/ | ||
| 430 | static struct platform_device *sx1_devices[] __initdata = { | ||
| 431 | &sx1_flash_device, | ||
| 432 | &sx1_kp_device, | ||
| 433 | &sx1_lcd_device, | ||
| 434 | &sx1_mcbsp1_device, | ||
| 435 | &sx1_irda_device, | ||
| 436 | }; | ||
| 437 | /*-----------------------------------------*/ | ||
| 438 | |||
| 439 | static struct omap_uart_config sx1_uart_config __initdata = { | ||
| 440 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 441 | }; | ||
| 442 | |||
| 443 | static struct omap_board_config_kernel sx1_config[] = { | ||
| 444 | { OMAP_TAG_USB, &sx1_usb_config }, | ||
| 445 | { OMAP_TAG_MMC, &sx1_mmc_config }, | ||
| 446 | { OMAP_TAG_LCD, &sx1_lcd_config }, | ||
| 447 | { OMAP_TAG_UART, &sx1_uart_config }, | ||
| 448 | }; | ||
| 449 | /*-----------------------------------------*/ | ||
| 450 | static void __init omap_sx1_init(void) | ||
| 451 | { | ||
| 452 | platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices)); | ||
| 453 | |||
| 454 | omap_board_config = sx1_config; | ||
| 455 | omap_board_config_size = ARRAY_SIZE(sx1_config); | ||
| 456 | omap_serial_init(); | ||
| 457 | |||
| 458 | /* turn on USB power */ | ||
| 459 | /* sx1_setusbpower(1); cant do it here because i2c is not ready */ | ||
| 460 | omap_request_gpio(1); /* A_IRDA_OFF */ | ||
| 461 | omap_request_gpio(11); /* A_SWITCH */ | ||
| 462 | omap_request_gpio(15); /* A_USB_ON */ | ||
| 463 | omap_set_gpio_direction(1, 0);/* gpio1 -> output */ | ||
| 464 | omap_set_gpio_direction(11, 0);/* gpio11 -> output */ | ||
| 465 | omap_set_gpio_direction(15, 0);/* gpio15 -> output */ | ||
| 466 | /* set GPIO data */ | ||
| 467 | omap_set_gpio_dataout(1, 1);/*A_IRDA_OFF = 1 */ | ||
| 468 | omap_set_gpio_dataout(11, 0);/*A_SWITCH = 0 */ | ||
| 469 | omap_set_gpio_dataout(15, 0);/*A_USB_ON = 0 */ | ||
| 470 | |||
| 471 | } | ||
| 472 | /*----------------------------------------*/ | ||
| 473 | static void __init omap_sx1_init_irq(void) | ||
| 474 | { | ||
| 475 | omap1_init_common_hw(); | ||
| 476 | omap_init_irq(); | ||
| 477 | omap_gpio_init(); | ||
| 478 | } | ||
| 479 | /*----------------------------------------*/ | ||
| 480 | |||
| 481 | static void __init omap_sx1_map_io(void) | ||
| 482 | { | ||
| 483 | omap1_map_common_io(); | ||
| 484 | } | ||
| 485 | |||
| 486 | MACHINE_START(SX1, "OMAP310 based Siemens SX1") | ||
| 487 | .phys_io = 0xfff00000, | ||
| 488 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | ||
| 489 | .boot_params = 0x10000100, | ||
| 490 | .map_io = omap_sx1_map_io, | ||
| 491 | .init_irq = omap_sx1_init_irq, | ||
| 492 | .init_machine = omap_sx1_init, | ||
| 493 | .timer = &omap_timer, | ||
| 494 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 447a586eb334..214dd19889ac 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
| @@ -235,7 +235,7 @@ static struct notifier_block panic_block = { | |||
| 235 | static int __init voiceblue_setup(void) | 235 | static int __init voiceblue_setup(void) |
| 236 | { | 236 | { |
| 237 | /* Setup panic notifier */ | 237 | /* Setup panic notifier */ |
| 238 | notifier_chain_register(&panic_notifier_list, &panic_block); | 238 | atomic_notifier_chain_register(&panic_notifier_list, &panic_block); |
| 239 | 239 | ||
| 240 | return 0; | 240 | return 0; |
| 241 | } | 241 | } |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index f625f6dd228a..5d9faa68d2ec 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
| @@ -49,6 +49,15 @@ static void omap1_uart_recalc(struct clk * clk) | |||
| 49 | clk->rate = 12000000; | 49 | clk->rate = 12000000; |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | static void omap1_sossi_recalc(struct clk *clk) | ||
| 53 | { | ||
| 54 | u32 div = omap_readl(MOD_CONF_CTRL_1); | ||
| 55 | |||
| 56 | div = (div >> 17) & 0x7; | ||
| 57 | div++; | ||
| 58 | clk->rate = clk->parent->rate / div; | ||
| 59 | } | ||
| 60 | |||
| 52 | static int omap1_clk_enable_dsp_domain(struct clk *clk) | 61 | static int omap1_clk_enable_dsp_domain(struct clk *clk) |
| 53 | { | 62 | { |
| 54 | int retval; | 63 | int retval; |
| @@ -396,6 +405,31 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate) | |||
| 396 | return 0; | 405 | return 0; |
| 397 | } | 406 | } |
| 398 | 407 | ||
| 408 | static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) | ||
| 409 | { | ||
| 410 | u32 l; | ||
| 411 | int div; | ||
| 412 | unsigned long p_rate; | ||
| 413 | |||
| 414 | p_rate = clk->parent->rate; | ||
| 415 | /* Round towards slower frequency */ | ||
| 416 | div = (p_rate + rate - 1) / rate; | ||
| 417 | div--; | ||
| 418 | if (div < 0 || div > 7) | ||
| 419 | return -EINVAL; | ||
| 420 | |||
| 421 | l = omap_readl(MOD_CONF_CTRL_1); | ||
| 422 | l &= ~(7 << 17); | ||
| 423 | l |= div << 17; | ||
| 424 | omap_writel(l, MOD_CONF_CTRL_1); | ||
| 425 | |||
| 426 | clk->rate = p_rate / (div + 1); | ||
| 427 | if (unlikely(clk->flags & RATE_PROPAGATES)) | ||
| 428 | propagate_rate(clk); | ||
| 429 | |||
| 430 | return 0; | ||
| 431 | } | ||
| 432 | |||
| 399 | static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate) | 433 | static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate) |
| 400 | { | 434 | { |
| 401 | return 96000000 / calc_ext_dsor(rate); | 435 | return 96000000 / calc_ext_dsor(rate); |
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index f7df00205c4a..6eadf72828d8 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
| @@ -17,6 +17,8 @@ static int omap1_clk_enable_generic(struct clk * clk); | |||
| 17 | static void omap1_clk_disable_generic(struct clk * clk); | 17 | static void omap1_clk_disable_generic(struct clk * clk); |
| 18 | static void omap1_ckctl_recalc(struct clk * clk); | 18 | static void omap1_ckctl_recalc(struct clk * clk); |
| 19 | static void omap1_watchdog_recalc(struct clk * clk); | 19 | static void omap1_watchdog_recalc(struct clk * clk); |
| 20 | static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); | ||
| 21 | static void omap1_sossi_recalc(struct clk *clk); | ||
| 20 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); | 22 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); |
| 21 | static int omap1_clk_enable_dsp_domain(struct clk * clk); | 23 | static int omap1_clk_enable_dsp_domain(struct clk * clk); |
| 22 | static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); | 24 | static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); |
| @@ -168,9 +170,10 @@ static struct clk ck_dpll1 = { | |||
| 168 | 170 | ||
| 169 | static struct arm_idlect1_clk ck_dpll1out = { | 171 | static struct arm_idlect1_clk ck_dpll1out = { |
| 170 | .clk = { | 172 | .clk = { |
| 171 | .name = "ck_dpll1out", | 173 | .name = "ck_dpll1out", |
| 172 | .parent = &ck_dpll1, | 174 | .parent = &ck_dpll1, |
| 173 | .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL, | 175 | .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL | |
| 176 | ENABLE_REG_32BIT | RATE_PROPAGATES, | ||
| 174 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 177 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
| 175 | .enable_bit = EN_CKOUT_ARM, | 178 | .enable_bit = EN_CKOUT_ARM, |
| 176 | .recalc = &followparent_recalc, | 179 | .recalc = &followparent_recalc, |
| @@ -180,6 +183,19 @@ static struct arm_idlect1_clk ck_dpll1out = { | |||
| 180 | .idlect_shift = 12, | 183 | .idlect_shift = 12, |
| 181 | }; | 184 | }; |
| 182 | 185 | ||
| 186 | static struct clk sossi_ck = { | ||
| 187 | .name = "ck_sossi", | ||
| 188 | .parent = &ck_dpll1out.clk, | ||
| 189 | .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT | | ||
| 190 | ENABLE_REG_32BIT, | ||
| 191 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_1, | ||
| 192 | .enable_bit = 16, | ||
| 193 | .recalc = &omap1_sossi_recalc, | ||
| 194 | .set_rate = &omap1_set_sossi_rate, | ||
| 195 | .enable = &omap1_clk_enable_generic, | ||
| 196 | .disable = &omap1_clk_disable_generic, | ||
| 197 | }; | ||
| 198 | |||
| 183 | static struct clk arm_ck = { | 199 | static struct clk arm_ck = { |
| 184 | .name = "arm_ck", | 200 | .name = "arm_ck", |
| 185 | .parent = &ck_dpll1, | 201 | .parent = &ck_dpll1, |
| @@ -282,7 +298,7 @@ static struct clk arminth_ck16xx = { | |||
| 282 | static struct clk dsp_ck = { | 298 | static struct clk dsp_ck = { |
| 283 | .name = "dsp_ck", | 299 | .name = "dsp_ck", |
| 284 | .parent = &ck_dpll1, | 300 | .parent = &ck_dpll1, |
| 285 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 301 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 286 | RATE_CKCTL, | 302 | RATE_CKCTL, |
| 287 | .enable_reg = (void __iomem *)ARM_CKCTL, | 303 | .enable_reg = (void __iomem *)ARM_CKCTL, |
| 288 | .enable_bit = EN_DSPCK, | 304 | .enable_bit = EN_DSPCK, |
| @@ -295,7 +311,7 @@ static struct clk dsp_ck = { | |||
| 295 | static struct clk dspmmu_ck = { | 311 | static struct clk dspmmu_ck = { |
| 296 | .name = "dspmmu_ck", | 312 | .name = "dspmmu_ck", |
| 297 | .parent = &ck_dpll1, | 313 | .parent = &ck_dpll1, |
| 298 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 314 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 299 | RATE_CKCTL | ALWAYS_ENABLED, | 315 | RATE_CKCTL | ALWAYS_ENABLED, |
| 300 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, | 316 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, |
| 301 | .recalc = &omap1_ckctl_recalc, | 317 | .recalc = &omap1_ckctl_recalc, |
| @@ -306,7 +322,7 @@ static struct clk dspmmu_ck = { | |||
| 306 | static struct clk dspper_ck = { | 322 | static struct clk dspper_ck = { |
| 307 | .name = "dspper_ck", | 323 | .name = "dspper_ck", |
| 308 | .parent = &ck_dpll1, | 324 | .parent = &ck_dpll1, |
| 309 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 325 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 310 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, | 326 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, |
| 311 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 327 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 312 | .enable_bit = EN_PERCK, | 328 | .enable_bit = EN_PERCK, |
| @@ -320,7 +336,7 @@ static struct clk dspper_ck = { | |||
| 320 | static struct clk dspxor_ck = { | 336 | static struct clk dspxor_ck = { |
| 321 | .name = "dspxor_ck", | 337 | .name = "dspxor_ck", |
| 322 | .parent = &ck_ref, | 338 | .parent = &ck_ref, |
| 323 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 339 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 324 | VIRTUAL_IO_ADDRESS, | 340 | VIRTUAL_IO_ADDRESS, |
| 325 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 341 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 326 | .enable_bit = EN_XORPCK, | 342 | .enable_bit = EN_XORPCK, |
| @@ -332,7 +348,7 @@ static struct clk dspxor_ck = { | |||
| 332 | static struct clk dsptim_ck = { | 348 | static struct clk dsptim_ck = { |
| 333 | .name = "dsptim_ck", | 349 | .name = "dsptim_ck", |
| 334 | .parent = &ck_ref, | 350 | .parent = &ck_ref, |
| 335 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 351 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 336 | VIRTUAL_IO_ADDRESS, | 352 | VIRTUAL_IO_ADDRESS, |
| 337 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 353 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 338 | .enable_bit = EN_DSPTIMCK, | 354 | .enable_bit = EN_DSPTIMCK, |
| @@ -374,7 +390,7 @@ static struct clk arminth_ck1510 = { | |||
| 374 | 390 | ||
| 375 | static struct clk tipb_ck = { | 391 | static struct clk tipb_ck = { |
| 376 | /* No-idle controlled by "tc_ck" */ | 392 | /* No-idle controlled by "tc_ck" */ |
| 377 | .name = "tibp_ck", | 393 | .name = "tipb_ck", |
| 378 | .parent = &tc_ck.clk, | 394 | .parent = &tc_ck.clk, |
| 379 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | | 395 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
| 380 | ALWAYS_ENABLED, | 396 | ALWAYS_ENABLED, |
| @@ -733,7 +749,7 @@ remains active during MPU idle whenever this is enabled */ | |||
| 733 | static struct clk i2c_fck = { | 749 | static struct clk i2c_fck = { |
| 734 | .name = "i2c_fck", | 750 | .name = "i2c_fck", |
| 735 | .id = 1, | 751 | .id = 1, |
| 736 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 752 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 737 | VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | | 753 | VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | |
| 738 | ALWAYS_ENABLED, | 754 | ALWAYS_ENABLED, |
| 739 | .parent = &armxor_ck.clk, | 755 | .parent = &armxor_ck.clk, |
| @@ -760,6 +776,7 @@ static struct clk * onchip_clks[] = { | |||
| 760 | &ck_dpll1, | 776 | &ck_dpll1, |
| 761 | /* CK_GEN1 clocks */ | 777 | /* CK_GEN1 clocks */ |
| 762 | &ck_dpll1out.clk, | 778 | &ck_dpll1out.clk, |
| 779 | &sossi_ck, | ||
| 763 | &arm_ck, | 780 | &arm_ck, |
| 764 | &armper_ck.clk, | 781 | &armper_ck.clk, |
| 765 | &arm_gpio_ck, | 782 | &arm_gpio_ck, |
diff --git a/arch/arm/mach-omap1/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c index a0cd001ac39a..e7835d6f53a0 100644 --- a/arch/arm/mach-omap1/leds-innovator.c +++ b/arch/arm/mach-omap1/leds-innovator.c | |||
| @@ -95,8 +95,5 @@ void innovator_leds_event(led_event_t evt) | |||
| 95 | break; | 95 | break; |
| 96 | } | 96 | } |
| 97 | 97 | ||
| 98 | if (led_state & LED_STATE_ENABLED) | ||
| 99 | ; | ||
| 100 | |||
| 101 | local_irq_restore(flags); | 98 | local_irq_restore(flags); |
| 102 | } | 99 | } |
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 5432335bc493..52c70e5fcf65 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
| @@ -283,6 +283,30 @@ MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1) | |||
| 283 | MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1) | 283 | MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1) |
| 284 | MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1) | 284 | MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1) |
| 285 | MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1) | 285 | MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1) |
| 286 | |||
| 287 | /* parallel camera */ | ||
| 288 | MUX_CFG("J15_1610_CAM_LCLK", 4, 24, 0, 0, 18, 1, 0, 0, 0) | ||
| 289 | MUX_CFG("J18_1610_CAM_D7", 4, 27, 0, 0, 19, 1, 0, 0, 0) | ||
| 290 | MUX_CFG("J19_1610_CAM_D6", 5, 0, 0, 0, 20, 1, 0, 0, 0) | ||
| 291 | MUX_CFG("J14_1610_CAM_D5", 5, 3, 0, 0, 21, 1, 0, 0, 0) | ||
| 292 | MUX_CFG("K18_1610_CAM_D4", 5, 6, 0, 0, 22, 1, 0, 0, 0) | ||
| 293 | MUX_CFG("K19_1610_CAM_D3", 5, 9, 0, 0, 23, 1, 0, 0, 0) | ||
| 294 | MUX_CFG("K15_1610_CAM_D2", 5, 12, 0, 0, 24, 1, 0, 0, 0) | ||
| 295 | MUX_CFG("K14_1610_CAM_D1", 5, 15, 0, 0, 25, 1, 0, 0, 0) | ||
| 296 | MUX_CFG("L19_1610_CAM_D0", 5, 18, 0, 0, 26, 1, 0, 0, 0) | ||
| 297 | MUX_CFG("L18_1610_CAM_VS", 5, 21, 0, 0, 27, 1, 0, 0, 0) | ||
| 298 | MUX_CFG("L15_1610_CAM_HS", 5, 24, 0, 0, 28, 1, 0, 0, 0) | ||
| 299 | MUX_CFG("M19_1610_CAM_RSTZ", 5, 27, 0, 0, 29, 0, 0, 0, 0) | ||
| 300 | MUX_CFG("Y15_1610_CAM_OUTCLK", A, 0, 6, 2, 6, 0, 2, 0, 0) | ||
| 301 | |||
| 302 | /* serial camera */ | ||
| 303 | MUX_CFG("H19_1610_CAM_EXCLK", 4, 21, 0, 0, 17, 0, 0, 0, 0) | ||
| 304 | /* REVISIT 5912 spec sez CCP_* can't pullup or pulldown ... ? */ | ||
| 305 | MUX_CFG("Y12_1610_CCP_CLKP", 8, 18, 6, 1, 24, 1, 1, 0, 0) | ||
| 306 | MUX_CFG("W13_1610_CCP_CLKM", 9, 0, 6, 1, 28, 1, 1, 0, 0) | ||
| 307 | MUX_CFG("W14_1610_CCP_DATAP", 9, 24, 6, 2, 4, 1, 2, 0, 0) | ||
| 308 | MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0) | ||
| 309 | |||
| 286 | }; | 310 | }; |
| 287 | #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ | 311 | #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ |
| 288 | 312 | ||
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 2e68be607295..089b8208de0e 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
| @@ -153,11 +153,8 @@ void omap_pm_idle(void) | |||
| 153 | use_idlect1 = omap_dm_timer_modify_idlect_mask(use_idlect1); | 153 | use_idlect1 = omap_dm_timer_modify_idlect_mask(use_idlect1); |
| 154 | #endif | 154 | #endif |
| 155 | 155 | ||
| 156 | if (omap_dma_running()) { | 156 | if (omap_dma_running()) |
| 157 | use_idlect1 &= ~(1 << 6); | 157 | use_idlect1 &= ~(1 << 6); |
| 158 | if (omap_lcd_dma_ext_running()) | ||
| 159 | use_idlect1 &= ~(1 << 12); | ||
| 160 | } | ||
| 161 | 158 | ||
| 162 | /* We should be able to remove the do_sleep variable and multiple | 159 | /* We should be able to remove the do_sleep variable and multiple |
| 163 | * tests above as soon as drivers, timer and DMA code have been fixed. | 160 | * tests above as soon as drivers, timer and DMA code have been fixed. |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7393109f5c30..7069c9d536f1 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
| @@ -11,6 +11,10 @@ config ARCH_OMAP2420 | |||
| 11 | select OMAP_DM_TIMER | 11 | select OMAP_DM_TIMER |
| 12 | select ARCH_OMAP_OTG | 12 | select ARCH_OMAP_OTG |
| 13 | 13 | ||
| 14 | config ARCH_OMAP2430 | ||
| 15 | bool "OMAP2430 support" | ||
| 16 | depends on ARCH_OMAP24XX | ||
| 17 | |||
| 14 | comment "OMAP Board Type" | 18 | comment "OMAP Board Type" |
| 15 | depends on ARCH_OMAP2 | 19 | depends on ARCH_OMAP2 |
| 16 | 20 | ||
| @@ -21,8 +25,13 @@ config MACH_OMAP_GENERIC | |||
| 21 | config MACH_OMAP_H4 | 25 | config MACH_OMAP_H4 |
| 22 | bool "OMAP 2420 H4 board" | 26 | bool "OMAP 2420 H4 board" |
| 23 | depends on ARCH_OMAP2 && ARCH_OMAP24XX | 27 | depends on ARCH_OMAP2 && ARCH_OMAP24XX |
| 24 | select OMAP_DEBUG_LEDS if LEDS || LEDS_OMAP_DEBUG | 28 | select OMAP_DEBUG_DEVICES |
| 25 | 29 | ||
| 26 | config MACH_OMAP_APOLLON | 30 | config MACH_OMAP_APOLLON |
| 27 | bool "OMAP 2420 Apollon board" | 31 | bool "OMAP 2420 Apollon board" |
| 28 | depends on ARCH_OMAP2 && ARCH_OMAP24XX | 32 | depends on ARCH_OMAP2 && ARCH_OMAP24XX |
| 33 | |||
| 34 | config MACH_OMAP_2430SDP | ||
| 35 | bool "OMAP 2430 SDP board" | ||
| 36 | depends on ARCH_OMAP2 && ARCH_OMAP24XX | ||
| 37 | |||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 266d88e77bdc..b05b738d31e6 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -14,5 +14,6 @@ obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o | |||
| 14 | # Specific board support | 14 | # Specific board support |
| 15 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o | 15 | obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o |
| 16 | obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o | 16 | obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o |
| 17 | obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o | ||
| 17 | obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o | 18 | obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o |
| 18 | 19 | ||
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c new file mode 100644 index 000000000000..7e76fbf19b5d --- /dev/null +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
| @@ -0,0 +1,218 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/board-2430sdp.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Texas Instruments | ||
| 5 | * | ||
| 6 | * Modified from mach-omap2/board-generic.c | ||
| 7 | * | ||
| 8 | * Initial Code : Based on a patch from Komal Shah and Richard Woodruff | ||
| 9 | * Updated the Code for 2430 SDP : Syed Mohammed Khasim | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/mtd/mtd.h> | ||
| 20 | #include <linux/mtd/partitions.h> | ||
| 21 | #include <linux/delay.h> | ||
| 22 | #include <linux/err.h> | ||
| 23 | #include <linux/clk.h> | ||
| 24 | |||
| 25 | #include <asm/hardware.h> | ||
| 26 | #include <asm/mach-types.h> | ||
| 27 | #include <asm/mach/arch.h> | ||
| 28 | #include <asm/mach/map.h> | ||
| 29 | #include <asm/mach/flash.h> | ||
| 30 | |||
| 31 | #include <asm/arch/gpio.h> | ||
| 32 | #include <asm/arch/mux.h> | ||
| 33 | #include <asm/arch/board.h> | ||
| 34 | #include <asm/arch/common.h> | ||
| 35 | #include <asm/arch/gpmc.h> | ||
| 36 | #include "prcm-regs.h" | ||
| 37 | |||
| 38 | #include <asm/io.h> | ||
| 39 | |||
| 40 | |||
| 41 | #define SDP2430_FLASH_CS 0 | ||
| 42 | #define SDP2430_SMC91X_CS 5 | ||
| 43 | |||
| 44 | static struct mtd_partition sdp2430_partitions[] = { | ||
| 45 | /* bootloader (U-Boot, etc) in first sector */ | ||
| 46 | { | ||
| 47 | .name = "bootloader", | ||
| 48 | .offset = 0, | ||
| 49 | .size = SZ_256K, | ||
| 50 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 51 | }, | ||
| 52 | /* bootloader params in the next sector */ | ||
| 53 | { | ||
| 54 | .name = "params", | ||
| 55 | .offset = MTDPART_OFS_APPEND, | ||
| 56 | .size = SZ_128K, | ||
| 57 | .mask_flags = 0, | ||
| 58 | }, | ||
| 59 | /* kernel */ | ||
| 60 | { | ||
| 61 | .name = "kernel", | ||
| 62 | .offset = MTDPART_OFS_APPEND, | ||
| 63 | .size = SZ_2M, | ||
| 64 | .mask_flags = 0 | ||
| 65 | }, | ||
| 66 | /* file system */ | ||
| 67 | { | ||
| 68 | .name = "filesystem", | ||
| 69 | .offset = MTDPART_OFS_APPEND, | ||
| 70 | .size = MTDPART_SIZ_FULL, | ||
| 71 | .mask_flags = 0 | ||
| 72 | } | ||
| 73 | }; | ||
| 74 | |||
| 75 | static struct flash_platform_data sdp2430_flash_data = { | ||
| 76 | .map_name = "cfi_probe", | ||
| 77 | .width = 2, | ||
| 78 | .parts = sdp2430_partitions, | ||
| 79 | .nr_parts = ARRAY_SIZE(sdp2430_partitions), | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct resource sdp2430_flash_resource = { | ||
| 83 | .start = SDP2430_CS0_BASE, | ||
| 84 | .end = SDP2430_CS0_BASE + SZ_64M - 1, | ||
| 85 | .flags = IORESOURCE_MEM, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct platform_device sdp2430_flash_device = { | ||
| 89 | .name = "omapflash", | ||
| 90 | .id = 0, | ||
| 91 | .dev = { | ||
| 92 | .platform_data = &sdp2430_flash_data, | ||
| 93 | }, | ||
| 94 | .num_resources = 1, | ||
| 95 | .resource = &sdp2430_flash_resource, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct resource sdp2430_smc91x_resources[] = { | ||
| 99 | [0] = { | ||
| 100 | .start = SDP2430_CS0_BASE, | ||
| 101 | .end = SDP2430_CS0_BASE + SZ_64M - 1, | ||
| 102 | .flags = IORESOURCE_MEM, | ||
| 103 | }, | ||
| 104 | [1] = { | ||
| 105 | .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
| 106 | .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
| 107 | .flags = IORESOURCE_IRQ, | ||
| 108 | }, | ||
| 109 | }; | ||
| 110 | |||
| 111 | static struct platform_device sdp2430_smc91x_device = { | ||
| 112 | .name = "smc91x", | ||
| 113 | .id = -1, | ||
| 114 | .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources), | ||
| 115 | .resource = sdp2430_smc91x_resources, | ||
| 116 | }; | ||
| 117 | |||
| 118 | static struct platform_device *sdp2430_devices[] __initdata = { | ||
| 119 | &sdp2430_smc91x_device, | ||
| 120 | &sdp2430_flash_device, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static inline void __init sdp2430_init_smc91x(void) | ||
| 124 | { | ||
| 125 | int eth_cs; | ||
| 126 | unsigned long cs_mem_base; | ||
| 127 | unsigned int rate; | ||
| 128 | struct clk *l3ck; | ||
| 129 | |||
| 130 | eth_cs = SDP2430_SMC91X_CS; | ||
| 131 | |||
| 132 | l3ck = clk_get(NULL, "core_l3_ck"); | ||
| 133 | if (IS_ERR(l3ck)) | ||
| 134 | rate = 100000000; | ||
| 135 | else | ||
| 136 | rate = clk_get_rate(l3ck); | ||
| 137 | |||
| 138 | /* Make sure CS1 timings are correct, for 2430 always muxed */ | ||
| 139 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200); | ||
| 140 | |||
| 141 | if (rate >= 160000000) { | ||
| 142 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | ||
| 143 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | ||
| 144 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | ||
| 145 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | ||
| 146 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | ||
| 147 | } else if (rate >= 130000000) { | ||
| 148 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | ||
| 149 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | ||
| 150 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | ||
| 151 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | ||
| 152 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | ||
| 153 | } else { /* rate = 100000000 */ | ||
| 154 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | ||
| 155 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | ||
| 156 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | ||
| 157 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | ||
| 158 | gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | ||
| 159 | } | ||
| 160 | |||
| 161 | if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | ||
| 162 | printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | ||
| 163 | return; | ||
| 164 | } | ||
| 165 | |||
| 166 | sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300; | ||
| 167 | sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; | ||
| 168 | udelay(100); | ||
| 169 | |||
| 170 | if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { | ||
| 171 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | ||
| 172 | OMAP24XX_ETHR_GPIO_IRQ); | ||
| 173 | gpmc_cs_free(eth_cs); | ||
| 174 | return; | ||
| 175 | } | ||
| 176 | omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); | ||
| 177 | |||
| 178 | } | ||
| 179 | |||
| 180 | static void __init omap_2430sdp_init_irq(void) | ||
| 181 | { | ||
| 182 | omap2_init_common_hw(); | ||
| 183 | omap_init_irq(); | ||
| 184 | omap_gpio_init(); | ||
| 185 | sdp2430_init_smc91x(); | ||
| 186 | } | ||
| 187 | |||
| 188 | static struct omap_uart_config sdp2430_uart_config __initdata = { | ||
| 189 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct omap_board_config_kernel sdp2430_config[] = { | ||
| 193 | {OMAP_TAG_UART, &sdp2430_uart_config}, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static void __init omap_2430sdp_init(void) | ||
| 197 | { | ||
| 198 | platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); | ||
| 199 | omap_board_config = sdp2430_config; | ||
| 200 | omap_board_config_size = ARRAY_SIZE(sdp2430_config); | ||
| 201 | omap_serial_init(); | ||
| 202 | } | ||
| 203 | |||
| 204 | static void __init omap_2430sdp_map_io(void) | ||
| 205 | { | ||
| 206 | omap2_map_common_io(); | ||
| 207 | } | ||
| 208 | |||
| 209 | MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | ||
| 210 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ | ||
| 211 | .phys_io = 0x48000000, | ||
| 212 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 213 | .boot_params = 0x80000100, | ||
| 214 | .map_io = omap_2430sdp_map_io, | ||
| 215 | .init_irq = omap_2430sdp_init_irq, | ||
| 216 | .init_machine = omap_2430sdp_init, | ||
| 217 | .timer = &omap_timer, | ||
| 218 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 878ff9181d0e..3bb49c17c858 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <linux/irq.h> | 25 | #include <linux/irq.h> |
| 26 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
| 28 | #include <linux/leds.h> | ||
| 29 | #include <linux/irq.h> | ||
| 28 | 30 | ||
| 29 | #include <asm/hardware.h> | 31 | #include <asm/hardware.h> |
| 30 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
| @@ -32,10 +34,12 @@ | |||
| 32 | #include <asm/mach/flash.h> | 34 | #include <asm/mach/flash.h> |
| 33 | 35 | ||
| 34 | #include <asm/arch/gpio.h> | 36 | #include <asm/arch/gpio.h> |
| 37 | #include <asm/arch/led.h> | ||
| 35 | #include <asm/arch/mux.h> | 38 | #include <asm/arch/mux.h> |
| 36 | #include <asm/arch/usb.h> | 39 | #include <asm/arch/usb.h> |
| 37 | #include <asm/arch/board.h> | 40 | #include <asm/arch/board.h> |
| 38 | #include <asm/arch/common.h> | 41 | #include <asm/arch/common.h> |
| 42 | #include <asm/arch/gpmc.h> | ||
| 39 | #include "prcm-regs.h" | 43 | #include "prcm-regs.h" |
| 40 | 44 | ||
| 41 | /* LED & Switch macros */ | 45 | /* LED & Switch macros */ |
| @@ -46,6 +50,9 @@ | |||
| 46 | #define SW_UP_GPIO17 17 | 50 | #define SW_UP_GPIO17 17 |
| 47 | #define SW_DOWN_GPIO58 58 | 51 | #define SW_DOWN_GPIO58 58 |
| 48 | 52 | ||
| 53 | #define APOLLON_FLASH_CS 0 | ||
| 54 | #define APOLLON_ETH_CS 1 | ||
| 55 | |||
| 49 | static struct mtd_partition apollon_partitions[] = { | 56 | static struct mtd_partition apollon_partitions[] = { |
| 50 | { | 57 | { |
| 51 | .name = "X-Loader + U-Boot", | 58 | .name = "X-Loader + U-Boot", |
| @@ -85,10 +92,10 @@ static struct flash_platform_data apollon_flash_data = { | |||
| 85 | .nr_parts = ARRAY_SIZE(apollon_partitions), | 92 | .nr_parts = ARRAY_SIZE(apollon_partitions), |
| 86 | }; | 93 | }; |
| 87 | 94 | ||
| 88 | static struct resource apollon_flash_resource = { | 95 | static struct resource apollon_flash_resource[] = { |
| 89 | .start = APOLLON_CS0_BASE, | 96 | [0] = { |
| 90 | .end = APOLLON_CS0_BASE + SZ_128K, | 97 | .flags = IORESOURCE_MEM, |
| 91 | .flags = IORESOURCE_MEM, | 98 | }, |
| 92 | }; | 99 | }; |
| 93 | 100 | ||
| 94 | static struct platform_device apollon_onenand_device = { | 101 | static struct platform_device apollon_onenand_device = { |
| @@ -97,14 +104,24 @@ static struct platform_device apollon_onenand_device = { | |||
| 97 | .dev = { | 104 | .dev = { |
| 98 | .platform_data = &apollon_flash_data, | 105 | .platform_data = &apollon_flash_data, |
| 99 | }, | 106 | }, |
| 100 | .num_resources = ARRAY_SIZE(&apollon_flash_resource), | 107 | .num_resources = ARRAY_SIZE(apollon_flash_resource), |
| 101 | .resource = &apollon_flash_resource, | 108 | .resource = apollon_flash_resource, |
| 102 | }; | 109 | }; |
| 103 | 110 | ||
| 111 | static void __init apollon_flash_init(void) | ||
| 112 | { | ||
| 113 | unsigned long base; | ||
| 114 | |||
| 115 | if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, &base) < 0) { | ||
| 116 | printk(KERN_ERR "Cannot request OneNAND GPMC CS\n"); | ||
| 117 | return; | ||
| 118 | } | ||
| 119 | apollon_flash_resource[0].start = base; | ||
| 120 | apollon_flash_resource[0].end = base + SZ_128K - 1; | ||
| 121 | } | ||
| 122 | |||
| 104 | static struct resource apollon_smc91x_resources[] = { | 123 | static struct resource apollon_smc91x_resources[] = { |
| 105 | [0] = { | 124 | [0] = { |
| 106 | .start = APOLLON_ETHR_START, /* Physical */ | ||
| 107 | .end = APOLLON_ETHR_START + 0xf, | ||
| 108 | .flags = IORESOURCE_MEM, | 125 | .flags = IORESOURCE_MEM, |
| 109 | }, | 126 | }, |
| 110 | [1] = { | 127 | [1] = { |
| @@ -126,14 +143,51 @@ static struct platform_device apollon_lcd_device = { | |||
| 126 | .id = -1, | 143 | .id = -1, |
| 127 | }; | 144 | }; |
| 128 | 145 | ||
| 146 | static struct omap_led_config apollon_led_config[] = { | ||
| 147 | { | ||
| 148 | .cdev = { | ||
| 149 | .name = "apollon:led0", | ||
| 150 | }, | ||
| 151 | .gpio = LED0_GPIO13, | ||
| 152 | }, | ||
| 153 | { | ||
| 154 | .cdev = { | ||
| 155 | .name = "apollon:led1", | ||
| 156 | }, | ||
| 157 | .gpio = LED1_GPIO14, | ||
| 158 | }, | ||
| 159 | { | ||
| 160 | .cdev = { | ||
| 161 | .name = "apollon:led2", | ||
| 162 | }, | ||
| 163 | .gpio = LED2_GPIO15, | ||
| 164 | }, | ||
| 165 | }; | ||
| 166 | |||
| 167 | static struct omap_led_platform_data apollon_led_data = { | ||
| 168 | .nr_leds = ARRAY_SIZE(apollon_led_config), | ||
| 169 | .leds = apollon_led_config, | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct platform_device apollon_led_device = { | ||
| 173 | .name = "omap-led", | ||
| 174 | .id = -1, | ||
| 175 | .dev = { | ||
| 176 | .platform_data = &apollon_led_data, | ||
| 177 | }, | ||
| 178 | }; | ||
| 179 | |||
| 129 | static struct platform_device *apollon_devices[] __initdata = { | 180 | static struct platform_device *apollon_devices[] __initdata = { |
| 130 | &apollon_onenand_device, | 181 | &apollon_onenand_device, |
| 131 | &apollon_smc91x_device, | 182 | &apollon_smc91x_device, |
| 132 | &apollon_lcd_device, | 183 | &apollon_lcd_device, |
| 184 | &apollon_led_device, | ||
| 133 | }; | 185 | }; |
| 134 | 186 | ||
| 135 | static inline void __init apollon_init_smc91x(void) | 187 | static inline void __init apollon_init_smc91x(void) |
| 136 | { | 188 | { |
| 189 | unsigned long base; | ||
| 190 | |||
| 137 | /* Make sure CS1 timings are correct */ | 191 | /* Make sure CS1 timings are correct */ |
| 138 | GPMC_CONFIG1_1 = 0x00011203; | 192 | GPMC_CONFIG1_1 = 0x00011203; |
| 139 | GPMC_CONFIG2_1 = 0x001f1f01; | 193 | GPMC_CONFIG2_1 = 0x001f1f01; |
| @@ -141,13 +195,20 @@ static inline void __init apollon_init_smc91x(void) | |||
| 141 | GPMC_CONFIG4_1 = 0x1c091c09; | 195 | GPMC_CONFIG4_1 = 0x1c091c09; |
| 142 | GPMC_CONFIG5_1 = 0x041f1f1f; | 196 | GPMC_CONFIG5_1 = 0x041f1f1f; |
| 143 | GPMC_CONFIG6_1 = 0x000004c4; | 197 | GPMC_CONFIG6_1 = 0x000004c4; |
| 144 | GPMC_CONFIG7_1 = 0x00000f40 | (APOLLON_CS1_BASE >> 24); | 198 | |
| 199 | if (gpmc_cs_request(APOLLON_ETH_CS, SZ_16M, &base) < 0) { | ||
| 200 | printk(KERN_ERR "Failed to request GPMC CS for smc91x\n"); | ||
| 201 | return; | ||
| 202 | } | ||
| 203 | apollon_smc91x_resources[0].start = base + 0x300; | ||
| 204 | apollon_smc91x_resources[0].end = base + 0x30f; | ||
| 145 | udelay(100); | 205 | udelay(100); |
| 146 | 206 | ||
| 147 | omap_cfg_reg(W4__24XX_GPIO74); | 207 | omap_cfg_reg(W4__24XX_GPIO74); |
| 148 | if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) { | 208 | if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) { |
| 149 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | 209 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", |
| 150 | APOLLON_ETHR_GPIO_IRQ); | 210 | APOLLON_ETHR_GPIO_IRQ); |
| 211 | gpmc_cs_free(APOLLON_ETH_CS); | ||
| 151 | return; | 212 | return; |
| 152 | } | 213 | } |
| 153 | omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1); | 214 | omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1); |
| @@ -175,6 +236,13 @@ static struct omap_mmc_config apollon_mmc_config __initdata = { | |||
| 175 | }, | 236 | }, |
| 176 | }; | 237 | }; |
| 177 | 238 | ||
| 239 | static struct omap_usb_config apollon_usb_config __initdata = { | ||
| 240 | .register_dev = 1, | ||
| 241 | .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ | ||
| 242 | |||
| 243 | .pins[0] = 6, | ||
| 244 | }; | ||
| 245 | |||
| 178 | static struct omap_lcd_config apollon_lcd_config __initdata = { | 246 | static struct omap_lcd_config apollon_lcd_config __initdata = { |
| 179 | .ctrl_name = "internal", | 247 | .ctrl_name = "internal", |
| 180 | }; | 248 | }; |
| @@ -182,6 +250,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata = { | |||
| 182 | static struct omap_board_config_kernel apollon_config[] = { | 250 | static struct omap_board_config_kernel apollon_config[] = { |
| 183 | { OMAP_TAG_UART, &apollon_uart_config }, | 251 | { OMAP_TAG_UART, &apollon_uart_config }, |
| 184 | { OMAP_TAG_MMC, &apollon_mmc_config }, | 252 | { OMAP_TAG_MMC, &apollon_mmc_config }, |
| 253 | { OMAP_TAG_USB, &apollon_usb_config }, | ||
| 185 | { OMAP_TAG_LCD, &apollon_lcd_config }, | 254 | { OMAP_TAG_LCD, &apollon_lcd_config }, |
| 186 | }; | 255 | }; |
| 187 | 256 | ||
| @@ -250,10 +319,22 @@ static void __init apollon_sw_init(void) | |||
| 250 | return; | 319 | return; |
| 251 | } | 320 | } |
| 252 | 321 | ||
| 322 | static void __init apollon_usb_init(void) | ||
| 323 | { | ||
| 324 | /* USB device */ | ||
| 325 | /* DEVICE_SUSPEND */ | ||
| 326 | omap_cfg_reg(P21_242X_GPIO12); | ||
| 327 | omap_request_gpio(12); | ||
| 328 | omap_set_gpio_direction(12, 0); /* OUT */ | ||
| 329 | omap_set_gpio_dataout(12, 0); | ||
| 330 | } | ||
| 331 | |||
| 253 | static void __init omap_apollon_init(void) | 332 | static void __init omap_apollon_init(void) |
| 254 | { | 333 | { |
| 255 | apollon_led_init(); | 334 | apollon_led_init(); |
| 256 | apollon_sw_init(); | 335 | apollon_sw_init(); |
| 336 | apollon_flash_init(); | ||
| 337 | apollon_usb_init(); | ||
| 257 | 338 | ||
| 258 | /* REVISIT: where's the correct place */ | 339 | /* REVISIT: where's the correct place */ |
| 259 | omap_cfg_reg(W19_24XX_SYS_NIRQ); | 340 | omap_cfg_reg(W19_24XX_SYS_NIRQ); |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 452193f01531..f125f432cc3e 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
| @@ -131,26 +131,6 @@ static struct platform_device h4_flash_device = { | |||
| 131 | .resource = &h4_flash_resource, | 131 | .resource = &h4_flash_resource, |
| 132 | }; | 132 | }; |
| 133 | 133 | ||
| 134 | static struct resource h4_smc91x_resources[] = { | ||
| 135 | [0] = { | ||
| 136 | .start = OMAP24XX_ETHR_START, /* Physical */ | ||
| 137 | .end = OMAP24XX_ETHR_START + 0xf, | ||
| 138 | .flags = IORESOURCE_MEM, | ||
| 139 | }, | ||
| 140 | [1] = { | ||
| 141 | .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
| 142 | .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
| 143 | .flags = IORESOURCE_IRQ, | ||
| 144 | }, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct platform_device h4_smc91x_device = { | ||
| 148 | .name = "smc91x", | ||
| 149 | .id = -1, | ||
| 150 | .num_resources = ARRAY_SIZE(h4_smc91x_resources), | ||
| 151 | .resource = h4_smc91x_resources, | ||
| 152 | }; | ||
| 153 | |||
| 154 | /* Select between the IrDA and aGPS module | 134 | /* Select between the IrDA and aGPS module |
| 155 | */ | 135 | */ |
| 156 | static int h4_select_irda(struct device *dev, int state) | 136 | static int h4_select_irda(struct device *dev, int state) |
| @@ -266,29 +246,14 @@ static struct platform_device h4_lcd_device = { | |||
| 266 | .id = -1, | 246 | .id = -1, |
| 267 | }; | 247 | }; |
| 268 | 248 | ||
| 269 | static struct resource h4_led_resources[] = { | ||
| 270 | [0] = { | ||
| 271 | .flags = IORESOURCE_MEM, | ||
| 272 | }, | ||
| 273 | }; | ||
| 274 | |||
| 275 | static struct platform_device h4_led_device = { | ||
| 276 | .name = "omap_dbg_led", | ||
| 277 | .id = -1, | ||
| 278 | .num_resources = ARRAY_SIZE(h4_led_resources), | ||
| 279 | .resource = h4_led_resources, | ||
| 280 | }; | ||
| 281 | |||
| 282 | static struct platform_device *h4_devices[] __initdata = { | 249 | static struct platform_device *h4_devices[] __initdata = { |
| 283 | &h4_smc91x_device, | ||
| 284 | &h4_flash_device, | 250 | &h4_flash_device, |
| 285 | &h4_irda_device, | 251 | &h4_irda_device, |
| 286 | &h4_kp_device, | 252 | &h4_kp_device, |
| 287 | &h4_lcd_device, | 253 | &h4_lcd_device, |
| 288 | &h4_led_device, | ||
| 289 | }; | 254 | }; |
| 290 | 255 | ||
| 291 | static inline void __init h4_init_smc91x(void) | 256 | static inline void __init h4_init_debug(void) |
| 292 | { | 257 | { |
| 293 | /* Make sure CS1 timings are correct */ | 258 | /* Make sure CS1 timings are correct */ |
| 294 | GPMC_CONFIG1_1 = 0x00011200; | 259 | GPMC_CONFIG1_1 = 0x00011200; |
| @@ -301,12 +266,8 @@ static inline void __init h4_init_smc91x(void) | |||
| 301 | udelay(100); | 266 | udelay(100); |
| 302 | 267 | ||
| 303 | omap_cfg_reg(M15_24XX_GPIO92); | 268 | omap_cfg_reg(M15_24XX_GPIO92); |
| 304 | if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { | 269 | if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0) |
| 305 | printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | 270 | gpmc_cs_free(eth_cs); |
| 306 | OMAP24XX_ETHR_GPIO_IRQ); | ||
| 307 | return; | ||
| 308 | } | ||
| 309 | omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); | ||
| 310 | } | 271 | } |
| 311 | 272 | ||
| 312 | static void __init omap_h4_init_irq(void) | 273 | static void __init omap_h4_init_irq(void) |
| @@ -314,7 +275,6 @@ static void __init omap_h4_init_irq(void) | |||
| 314 | omap2_init_common_hw(); | 275 | omap2_init_common_hw(); |
| 315 | omap_init_irq(); | 276 | omap_init_irq(); |
| 316 | omap_gpio_init(); | 277 | omap_gpio_init(); |
| 317 | h4_init_smc91x(); | ||
| 318 | } | 278 | } |
| 319 | 279 | ||
| 320 | static struct omap_uart_config h4_uart_config __initdata = { | 280 | static struct omap_uart_config h4_uart_config __initdata = { |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 52ec2f2d6360..b603bc5f8e5b 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -55,8 +55,10 @@ static void omap_init_i2c(void) | |||
| 55 | if (machine_is_omap_h4()) | 55 | if (machine_is_omap_h4()) |
| 56 | return; | 56 | return; |
| 57 | 57 | ||
| 58 | omap_cfg_reg(J15_24XX_I2C2_SCL); | 58 | if (!cpu_is_omap2430()) { |
| 59 | omap_cfg_reg(H19_24XX_I2C2_SDA); | 59 | omap_cfg_reg(J15_24XX_I2C2_SCL); |
| 60 | omap_cfg_reg(H19_24XX_I2C2_SDA); | ||
| 61 | } | ||
| 60 | (void) platform_device_register(&omap_i2c_device2); | 62 | (void) platform_device_register(&omap_i2c_device2); |
| 61 | } | 63 | } |
| 62 | 64 | ||
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index e290b989aa94..5a4cc2076a7d 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
| @@ -22,7 +22,14 @@ | |||
| 22 | 22 | ||
| 23 | #undef DEBUG | 23 | #undef DEBUG |
| 24 | 24 | ||
| 25 | #ifdef CONFIG_ARCH_OMAP2420 | ||
| 25 | #define GPMC_BASE 0x6800a000 | 26 | #define GPMC_BASE 0x6800a000 |
| 27 | #endif | ||
| 28 | |||
| 29 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 30 | #define GPMC_BASE 0x6E000000 | ||
| 31 | #endif | ||
| 32 | |||
| 26 | #define GPMC_REVISION 0x00 | 33 | #define GPMC_REVISION 0x00 |
| 27 | #define GPMC_SYSCONFIG 0x10 | 34 | #define GPMC_SYSCONFIG 0x10 |
| 28 | #define GPMC_SYSSTATUS 0x14 | 35 | #define GPMC_SYSSTATUS 0x14 |
| @@ -88,7 +95,7 @@ u32 gpmc_cs_read_reg(int cs, int idx) | |||
| 88 | } | 95 | } |
| 89 | 96 | ||
| 90 | /* TODO: Add support for gpmc_fck to clock framework and use it */ | 97 | /* TODO: Add support for gpmc_fck to clock framework and use it */ |
| 91 | static unsigned long gpmc_get_fclk_period(void) | 98 | unsigned long gpmc_get_fclk_period(void) |
| 92 | { | 99 | { |
| 93 | /* In picoseconds */ | 100 | /* In picoseconds */ |
| 94 | return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000); | 101 | return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000); |
| @@ -104,6 +111,13 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) | |||
| 104 | return (time_ns * 1000 + tick_ps - 1) / tick_ps; | 111 | return (time_ns * 1000 + tick_ps - 1) / tick_ps; |
| 105 | } | 112 | } |
| 106 | 113 | ||
| 114 | unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) | ||
| 115 | { | ||
| 116 | unsigned long ticks = gpmc_ns_to_ticks(time_ns); | ||
| 117 | |||
| 118 | return ticks * gpmc_get_fclk_period() / 1000; | ||
| 119 | } | ||
| 120 | |||
| 107 | #ifdef DEBUG | 121 | #ifdef DEBUG |
| 108 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, | 122 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
| 109 | int time, const char *name) | 123 | int time, const char *name) |
| @@ -120,15 +134,21 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, | |||
| 120 | else | 134 | else |
| 121 | ticks = gpmc_ns_to_ticks(time); | 135 | ticks = gpmc_ns_to_ticks(time); |
| 122 | nr_bits = end_bit - st_bit + 1; | 136 | nr_bits = end_bit - st_bit + 1; |
| 123 | if (ticks >= 1 << nr_bits) | 137 | if (ticks >= 1 << nr_bits) { |
| 138 | #ifdef DEBUG | ||
| 139 | printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n", | ||
| 140 | cs, name, time, ticks, 1 << nr_bits); | ||
| 141 | #endif | ||
| 124 | return -1; | 142 | return -1; |
| 143 | } | ||
| 125 | 144 | ||
| 126 | mask = (1 << nr_bits) - 1; | 145 | mask = (1 << nr_bits) - 1; |
| 127 | l = gpmc_cs_read_reg(cs, reg); | 146 | l = gpmc_cs_read_reg(cs, reg); |
| 128 | #ifdef DEBUG | 147 | #ifdef DEBUG |
| 129 | printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n", | 148 | printk(KERN_INFO |
| 149 | "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", | ||
| 130 | cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, | 150 | cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, |
| 131 | (l >> st_bit) & mask); | 151 | (l >> st_bit) & mask, time); |
| 132 | #endif | 152 | #endif |
| 133 | l &= ~(mask << st_bit); | 153 | l &= ~(mask << st_bit); |
| 134 | l |= ticks << st_bit; | 154 | l |= ticks << st_bit; |
| @@ -157,7 +177,7 @@ int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) | |||
| 157 | div = l / gpmc_get_fclk_period(); | 177 | div = l / gpmc_get_fclk_period(); |
| 158 | if (div > 4) | 178 | if (div > 4) |
| 159 | return -1; | 179 | return -1; |
| 160 | if (div < 0) | 180 | if (div <= 0) |
| 161 | div = 1; | 181 | div = 1; |
| 162 | 182 | ||
| 163 | return div; | 183 | return div; |
| @@ -191,14 +211,19 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) | |||
| 191 | 211 | ||
| 192 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); | 212 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); |
| 193 | 213 | ||
| 214 | /* caller is expected to have initialized CONFIG1 to cover | ||
| 215 | * at least sync vs async | ||
| 216 | */ | ||
| 217 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | ||
| 218 | if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) { | ||
| 194 | #ifdef DEBUG | 219 | #ifdef DEBUG |
| 195 | printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n", | 220 | printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n", |
| 196 | cs, gpmc_get_fclk_period(), div); | 221 | cs, (div * gpmc_get_fclk_period()) / 1000, div); |
| 197 | #endif | 222 | #endif |
| 198 | 223 | l &= ~0x03; | |
| 199 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | 224 | l |= (div - 1); |
| 200 | l &= ~0x03; | 225 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); |
| 201 | l |= (div - 1); | 226 | } |
| 202 | 227 | ||
| 203 | return 0; | 228 | return 0; |
| 204 | } | 229 | } |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 871ace4fccb8..4dfd878d7968 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
| @@ -17,7 +17,13 @@ | |||
| 17 | 17 | ||
| 18 | #include <asm/io.h> | 18 | #include <asm/io.h> |
| 19 | 19 | ||
| 20 | #if defined(CONFIG_ARCH_OMAP2420) | ||
| 20 | #define OMAP24XX_TAP_BASE io_p2v(0x48014000) | 21 | #define OMAP24XX_TAP_BASE io_p2v(0x48014000) |
| 22 | #endif | ||
| 23 | |||
| 24 | #if defined(CONFIG_ARCH_OMAP2430) | ||
| 25 | #define OMAP24XX_TAP_BASE io_p2v(0x4900A000) | ||
| 26 | #endif | ||
| 21 | 27 | ||
| 22 | #define OMAP_TAP_IDCODE 0x0204 | 28 | #define OMAP_TAP_IDCODE 0x0204 |
| 23 | #define OMAP_TAP_PROD_ID 0x0208 | 29 | #define OMAP_TAP_PROD_ID 0x0208 |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 82dc70f6b779..5a4091f582ed 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005 Nokia Corporation |
| 7 | * Author: Juha Yrjölä <juha.yrjola@nokia.com> | 7 | * Author: Juha Yrjölä <juha.yrjola@nokia.com> |
| 8 | * Updated map desc to add 2430 support : <x0khasim@ti.com> | ||
| 8 | * | 9 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
| @@ -26,6 +27,7 @@ | |||
| 26 | extern void omap_sram_init(void); | 27 | extern void omap_sram_init(void); |
| 27 | extern int omap2_clk_init(void); | 28 | extern int omap2_clk_init(void); |
| 28 | extern void omap2_check_revision(void); | 29 | extern void omap2_check_revision(void); |
| 30 | extern void omap2_init_memory(void); | ||
| 29 | extern void gpmc_init(void); | 31 | extern void gpmc_init(void); |
| 30 | extern void omapfb_reserve_sdram(void); | 32 | extern void omapfb_reserve_sdram(void); |
| 31 | 33 | ||
| @@ -40,6 +42,20 @@ static struct map_desc omap2_io_desc[] __initdata = { | |||
| 40 | .length = L3_24XX_SIZE, | 42 | .length = L3_24XX_SIZE, |
| 41 | .type = MT_DEVICE | 43 | .type = MT_DEVICE |
| 42 | }, | 44 | }, |
| 45 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 46 | { | ||
| 47 | .virtual = L4_WK_243X_VIRT, | ||
| 48 | .pfn = __phys_to_pfn(L4_WK_243X_PHYS), | ||
| 49 | .length = L4_WK_243X_SIZE, | ||
| 50 | .type = MT_DEVICE | ||
| 51 | }, | ||
| 52 | { | ||
| 53 | .virtual = OMAP243X_GPMC_VIRT, | ||
| 54 | .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), | ||
| 55 | .length = OMAP243X_GPMC_SIZE, | ||
| 56 | .type = MT_DEVICE | ||
| 57 | }, | ||
| 58 | #endif | ||
| 43 | { | 59 | { |
| 44 | .virtual = DSP_MEM_24XX_VIRT, | 60 | .virtual = DSP_MEM_24XX_VIRT, |
| 45 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), | 61 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), |
| @@ -80,5 +96,11 @@ void __init omap2_init_common_hw(void) | |||
| 80 | { | 96 | { |
| 81 | omap2_mux_init(); | 97 | omap2_mux_init(); |
| 82 | omap2_clk_init(); | 98 | omap2_clk_init(); |
| 99 | /* | ||
| 100 | * Need to Fix this for 2430 | ||
| 101 | */ | ||
| 102 | #ifndef CONFIG_ARCH_OMAP2430 | ||
| 103 | omap2_init_memory(); | ||
| 104 | #endif | ||
| 83 | gpmc_init(); | 105 | gpmc_init(); |
| 84 | } | 106 | } |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index a39d30680300..f064f725e724 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
| @@ -37,7 +37,7 @@ static struct omap_irq_bank { | |||
| 37 | } __attribute__ ((aligned(4))) irq_banks[] = { | 37 | } __attribute__ ((aligned(4))) irq_banks[] = { |
| 38 | { | 38 | { |
| 39 | /* MPU INTC */ | 39 | /* MPU INTC */ |
| 40 | .base_reg = OMAP24XX_IC_BASE, | 40 | .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), |
| 41 | .nr_irqs = 96, | 41 | .nr_irqs = 96, |
| 42 | }, { | 42 | }, { |
| 43 | /* XXX: DSP INTC */ | 43 | /* XXX: DSP INTC */ |
| @@ -47,7 +47,7 @@ static struct omap_irq_bank { | |||
| 47 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ | 47 | /* XXX: FIQ and additional INTC support (only MPU at the moment) */ |
| 48 | static void omap_ack_irq(unsigned int irq) | 48 | static void omap_ack_irq(unsigned int irq) |
| 49 | { | 49 | { |
| 50 | omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); | 50 | __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | static void omap_mask_irq(unsigned int irq) | 53 | static void omap_mask_irq(unsigned int irq) |
| @@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq) | |||
| 60 | irq %= 32; | 60 | irq %= 32; |
| 61 | } | 61 | } |
| 62 | 62 | ||
| 63 | omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); | 63 | __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | static void omap_unmask_irq(unsigned int irq) | 66 | static void omap_unmask_irq(unsigned int irq) |
| @@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq) | |||
| 73 | irq %= 32; | 73 | irq %= 32; |
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); | 76 | __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | static void omap_mask_ack_irq(unsigned int irq) | 79 | static void omap_mask_ack_irq(unsigned int irq) |
| @@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) | |||
| 93 | { | 93 | { |
| 94 | unsigned long tmp; | 94 | unsigned long tmp; |
| 95 | 95 | ||
| 96 | tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff; | 96 | tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; |
| 97 | printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " | 97 | printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " |
| 98 | "(revision %ld.%ld) with %d interrupts\n", | 98 | "(revision %ld.%ld) with %d interrupts\n", |
| 99 | bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); | 99 | bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); |
| 100 | 100 | ||
| 101 | tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG); | 101 | tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); |
| 102 | tmp |= 1 << 1; /* soft reset */ | 102 | tmp |= 1 << 1; /* soft reset */ |
| 103 | omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG); | 103 | __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); |
| 104 | 104 | ||
| 105 | while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) | 105 | while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) |
| 106 | /* Wait for reset to complete */; | 106 | /* Wait for reset to complete */; |
| 107 | |||
| 108 | /* Enable autoidle */ | ||
| 109 | __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); | ||
| 107 | } | 110 | } |
| 108 | 111 | ||
| 109 | void __init omap_init_irq(void) | 112 | void __init omap_init_irq(void) |
diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index 85cbc2a2e663..3e5d8cd4ea4f 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include "prcm-regs.h" | 30 | #include "prcm-regs.h" |
| 31 | #include "memory.h" | 31 | #include "memory.h" |
| 32 | 32 | ||
| 33 | |||
| 33 | static struct memory_timings mem_timings; | 34 | static struct memory_timings mem_timings; |
| 34 | 35 | ||
| 35 | u32 omap2_memory_get_slow_dll_ctrl(void) | 36 | u32 omap2_memory_get_slow_dll_ctrl(void) |
| @@ -99,3 +100,20 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) | |||
| 99 | /* 90 degree phase for anything below 133Mhz + disable DLL filter */ | 100 | /* 90 degree phase for anything below 133Mhz + disable DLL filter */ |
| 100 | mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); | 101 | mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); |
| 101 | } | 102 | } |
| 103 | |||
| 104 | /* turn on smart idle modes for SDRAM scheduler and controller */ | ||
| 105 | void __init omap2_init_memory(void) | ||
| 106 | { | ||
| 107 | u32 l; | ||
| 108 | |||
| 109 | l = SMS_SYSCONFIG; | ||
| 110 | l &= ~(0x3 << 3); | ||
| 111 | l |= (0x2 << 3); | ||
| 112 | SMS_SYSCONFIG = l; | ||
| 113 | |||
| 114 | l = SDRC_SYSCONFIG; | ||
| 115 | l &= ~(0x3 << 3); | ||
| 116 | l |= (0x2 << 3); | ||
| 117 | SDRC_SYSCONFIG = l; | ||
| 118 | |||
| 119 | } | ||
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 0439906d5da7..05750975d746 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
| @@ -53,8 +53,8 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) | |||
| 53 | MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) | 53 | MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) |
| 54 | 54 | ||
| 55 | /* 24xx GPMC chipselects, wait pin monitoring */ | 55 | /* 24xx GPMC chipselects, wait pin monitoring */ |
| 56 | MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) | 56 | MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) |
| 57 | MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) | 57 | MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) |
| 58 | MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) | 58 | MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) |
| 59 | MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) | 59 | MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) |
| 60 | MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) | 60 | MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) |
| @@ -67,18 +67,18 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) | |||
| 67 | MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) | 67 | MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) |
| 68 | 68 | ||
| 69 | /* 24xx GPIO */ | 69 | /* 24xx GPIO */ |
| 70 | MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) | 70 | MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) |
| 71 | MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) | 71 | MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) |
| 72 | MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) | 72 | MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) |
| 73 | MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) | 73 | MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) |
| 74 | MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) | 74 | MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) |
| 75 | MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) | 75 | MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) |
| 76 | MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) | 76 | MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) |
| 77 | MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) | 77 | MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) |
| 78 | MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) | 78 | MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) |
| 79 | MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) | 79 | MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) |
| 80 | MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) | 80 | MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) |
| 81 | MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) | 81 | MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) |
| 82 | MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) | 82 | MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) |
| 83 | MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) | 83 | MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) |
| 84 | 84 | ||
| @@ -95,17 +95,17 @@ MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1) | |||
| 95 | MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) | 95 | MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) |
| 96 | 96 | ||
| 97 | /* 24xx external DMA requests */ | 97 | /* 24xx external DMA requests */ |
| 98 | MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) | 98 | MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) |
| 99 | MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) | 99 | MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) |
| 100 | MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) | 100 | MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) |
| 101 | MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) | 101 | MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) |
| 102 | MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) | 102 | MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) |
| 103 | MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) | 103 | MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) |
| 104 | 104 | ||
| 105 | /* TSC IRQ */ | 105 | /* TSC IRQ */ |
| 106 | MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) | 106 | MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) |
| 107 | 107 | ||
| 108 | /* UART3 */ | 108 | /* UART3 */ |
| 109 | MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) | 109 | MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) |
| 110 | MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) | 110 | MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) |
| 111 | 111 | ||
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c new file mode 100644 index 000000000000..80bb42eb5082 --- /dev/null +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
| @@ -0,0 +1,349 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/usb-tusb6010.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Nokia Corporation | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/types.h> | ||
| 12 | #include <linux/errno.h> | ||
| 13 | #include <linux/delay.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | |||
| 16 | #include <linux/usb/musb.h> | ||
| 17 | |||
| 18 | #include <asm/arch/gpmc.h> | ||
| 19 | #include <asm/arch/gpio.h> | ||
| 20 | #include <asm/arch/mux.h> | ||
| 21 | |||
| 22 | |||
| 23 | static u8 async_cs, sync_cs; | ||
| 24 | static unsigned refclk_psec; | ||
| 25 | |||
| 26 | |||
| 27 | /* t2_ps, when quantized to fclk units, must happen no earlier than | ||
| 28 | * the clock after after t1_NS. | ||
| 29 | * | ||
| 30 | * Return a possibly updated value of t2_ps, converted to nsec. | ||
| 31 | */ | ||
| 32 | static unsigned | ||
| 33 | next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps) | ||
| 34 | { | ||
| 35 | unsigned t1_ps = t1_NS * 1000; | ||
| 36 | unsigned t1_f, t2_f; | ||
| 37 | |||
| 38 | if ((t1_ps + fclk_ps) < t2_ps) | ||
| 39 | return t2_ps / 1000; | ||
| 40 | |||
| 41 | t1_f = (t1_ps + fclk_ps - 1) / fclk_ps; | ||
| 42 | t2_f = (t2_ps + fclk_ps - 1) / fclk_ps; | ||
| 43 | |||
| 44 | if (t1_f >= t2_f) | ||
| 45 | t2_f = t1_f + 1; | ||
| 46 | |||
| 47 | return (t2_f * fclk_ps) / 1000; | ||
| 48 | } | ||
| 49 | |||
| 50 | /* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ | ||
| 51 | |||
| 52 | static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps) | ||
| 53 | { | ||
| 54 | struct gpmc_timings t; | ||
| 55 | unsigned t_acsnh_advnh = sysclk_ps + 3000; | ||
| 56 | unsigned tmp; | ||
| 57 | |||
| 58 | memset(&t, 0, sizeof(t)); | ||
| 59 | |||
| 60 | /* CS_ON = t_acsnh_acsnl */ | ||
| 61 | t.cs_on = 8; | ||
| 62 | /* ADV_ON = t_acsnh_advnh - t_advn */ | ||
| 63 | t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps); | ||
| 64 | |||
| 65 | /* | ||
| 66 | * READ ... from omap2420 TRM fig 12-13 | ||
| 67 | */ | ||
| 68 | |||
| 69 | /* ADV_RD_OFF = t_acsnh_advnh */ | ||
| 70 | t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps); | ||
| 71 | |||
| 72 | /* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */ | ||
| 73 | t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps); | ||
| 74 | |||
| 75 | /* ACCESS = counters continue only after nRDY */ | ||
| 76 | tmp = t.oe_on * 1000 + 300; | ||
| 77 | t.access = next_clk(t.oe_on, tmp, fclk_ps); | ||
| 78 | |||
| 79 | /* OE_OFF = after data gets sampled */ | ||
| 80 | tmp = t.access * 1000; | ||
| 81 | t.oe_off = next_clk(t.access, tmp, fclk_ps); | ||
| 82 | |||
| 83 | t.cs_rd_off = t.oe_off; | ||
| 84 | |||
| 85 | tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */; | ||
| 86 | t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps); | ||
| 87 | |||
| 88 | /* | ||
| 89 | * WRITE ... from omap2420 TRM fig 12-15 | ||
| 90 | */ | ||
| 91 | |||
| 92 | /* ADV_WR_OFF = t_acsnh_advnh */ | ||
| 93 | t.adv_wr_off = t.adv_rd_off; | ||
| 94 | |||
| 95 | /* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */ | ||
| 96 | t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps); | ||
| 97 | |||
| 98 | /* WE_OFF = after data gets sampled */ | ||
| 99 | tmp = t.we_on * 1000 + 300; | ||
| 100 | t.we_off = next_clk(t.we_on, tmp, fclk_ps); | ||
| 101 | |||
| 102 | t.cs_wr_off = t.we_off; | ||
| 103 | |||
| 104 | tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */; | ||
| 105 | t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps); | ||
| 106 | |||
| 107 | return gpmc_cs_set_timings(async_cs, &t); | ||
| 108 | } | ||
| 109 | |||
| 110 | static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps) | ||
| 111 | { | ||
| 112 | struct gpmc_timings t; | ||
| 113 | unsigned t_scsnh_advnh = sysclk_ps + 3000; | ||
| 114 | unsigned tmp; | ||
| 115 | |||
| 116 | memset(&t, 0, sizeof(t)); | ||
| 117 | t.cs_on = 8; | ||
| 118 | |||
| 119 | /* ADV_ON = t_acsnh_advnh - t_advn */ | ||
| 120 | t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps); | ||
| 121 | |||
| 122 | /* GPMC_CLK rate = fclk rate / div */ | ||
| 123 | t.sync_clk = 12 /* 11.1 nsec */; | ||
| 124 | tmp = (t.sync_clk * 1000 + fclk_ps - 1) / fclk_ps; | ||
| 125 | if (tmp > 4) | ||
| 126 | return -ERANGE; | ||
| 127 | if (tmp <= 0) | ||
| 128 | tmp = 1; | ||
| 129 | t.page_burst_access = (fclk_ps * tmp) / 1000; | ||
| 130 | |||
| 131 | /* | ||
| 132 | * READ ... based on omap2420 TRM fig 12-19, 12-20 | ||
| 133 | */ | ||
| 134 | |||
| 135 | /* ADV_RD_OFF = t_scsnh_advnh */ | ||
| 136 | t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps); | ||
| 137 | |||
| 138 | /* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */ | ||
| 139 | tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps); | ||
| 140 | t.oe_on = next_clk(t.adv_on, tmp, fclk_ps); | ||
| 141 | |||
| 142 | /* ACCESS = number of clock cycles after t_adv_eon */ | ||
| 143 | tmp = (t.oe_on * 1000) + (5 * fclk_ps); | ||
| 144 | t.access = next_clk(t.oe_on, tmp, fclk_ps); | ||
| 145 | |||
| 146 | /* OE_OFF = after data gets sampled */ | ||
| 147 | tmp = (t.access * 1000) + (1 * fclk_ps); | ||
| 148 | t.oe_off = next_clk(t.access, tmp, fclk_ps); | ||
| 149 | |||
| 150 | t.cs_rd_off = t.oe_off; | ||
| 151 | |||
| 152 | tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */; | ||
| 153 | t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps); | ||
| 154 | |||
| 155 | /* | ||
| 156 | * WRITE ... based on omap2420 TRM fig 12-21 | ||
| 157 | */ | ||
| 158 | |||
| 159 | /* ADV_WR_OFF = t_scsnh_advnh */ | ||
| 160 | t.adv_wr_off = t.adv_rd_off; | ||
| 161 | |||
| 162 | /* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */ | ||
| 163 | tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps); | ||
| 164 | t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps); | ||
| 165 | |||
| 166 | /* WE_OFF = number of clock cycles after t_adv_wen */ | ||
| 167 | tmp = (t.we_on * 1000) + (6 * fclk_ps); | ||
| 168 | t.we_off = next_clk(t.we_on, tmp, fclk_ps); | ||
| 169 | |||
| 170 | t.cs_wr_off = t.we_off; | ||
| 171 | |||
| 172 | tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */; | ||
| 173 | t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps); | ||
| 174 | |||
| 175 | return gpmc_cs_set_timings(sync_cs, &t); | ||
| 176 | } | ||
| 177 | |||
| 178 | extern unsigned long gpmc_get_fclk_period(void); | ||
| 179 | |||
| 180 | /* tusb driver calls this when it changes the chip's clocking */ | ||
| 181 | int tusb6010_platform_retime(unsigned is_refclk) | ||
| 182 | { | ||
| 183 | static const char error[] = | ||
| 184 | KERN_ERR "tusb6010 %s retime error %d\n"; | ||
| 185 | |||
| 186 | unsigned fclk_ps = gpmc_get_fclk_period(); | ||
| 187 | unsigned sysclk_ps; | ||
| 188 | int status; | ||
| 189 | |||
| 190 | if (!refclk_psec) | ||
| 191 | return -ENODEV; | ||
| 192 | |||
| 193 | sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; | ||
| 194 | |||
| 195 | status = tusb_set_async_mode(sysclk_ps, fclk_ps); | ||
| 196 | if (status < 0) { | ||
| 197 | printk(error, "async", status); | ||
| 198 | goto done; | ||
| 199 | } | ||
| 200 | status = tusb_set_sync_mode(sysclk_ps, fclk_ps); | ||
| 201 | if (status < 0) | ||
| 202 | printk(error, "sync", status); | ||
| 203 | done: | ||
| 204 | return status; | ||
| 205 | } | ||
| 206 | EXPORT_SYMBOL_GPL(tusb6010_platform_retime); | ||
| 207 | |||
| 208 | static struct resource tusb_resources[] = { | ||
| 209 | /* Order is significant! The start/end fields | ||
| 210 | * are updated during setup.. | ||
| 211 | */ | ||
| 212 | { /* Asynchronous access */ | ||
| 213 | .flags = IORESOURCE_MEM, | ||
| 214 | }, | ||
| 215 | { /* Synchronous access */ | ||
| 216 | .flags = IORESOURCE_MEM, | ||
| 217 | }, | ||
| 218 | { /* IRQ */ | ||
| 219 | .flags = IORESOURCE_IRQ, | ||
| 220 | }, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static u64 tusb_dmamask = ~(u32)0; | ||
| 224 | |||
| 225 | static struct platform_device tusb_device = { | ||
| 226 | .name = "musb_hdrc", | ||
| 227 | .id = -1, | ||
| 228 | .dev = { | ||
| 229 | .dma_mask = &tusb_dmamask, | ||
| 230 | .coherent_dma_mask = 0xffffffff, | ||
| 231 | }, | ||
| 232 | .num_resources = ARRAY_SIZE(tusb_resources), | ||
| 233 | .resource = tusb_resources, | ||
| 234 | }; | ||
| 235 | |||
| 236 | |||
| 237 | /* this may be called only from board-*.c setup code */ | ||
| 238 | int __init | ||
| 239 | tusb6010_setup_interface(struct musb_hdrc_platform_data *data, | ||
| 240 | unsigned ps_refclk, unsigned waitpin, | ||
| 241 | unsigned async, unsigned sync, | ||
| 242 | unsigned irq, unsigned dmachan) | ||
| 243 | { | ||
| 244 | int status; | ||
| 245 | static char error[] __initdata = | ||
| 246 | KERN_ERR "tusb6010 init error %d, %d\n"; | ||
| 247 | |||
| 248 | /* ASYNC region, primarily for PIO */ | ||
| 249 | status = gpmc_cs_request(async, SZ_16M, (unsigned long *) | ||
| 250 | &tusb_resources[0].start); | ||
| 251 | if (status < 0) { | ||
| 252 | printk(error, 1, status); | ||
| 253 | return status; | ||
| 254 | } | ||
| 255 | tusb_resources[0].end = tusb_resources[0].start + 0x9ff; | ||
| 256 | async_cs = async; | ||
| 257 | gpmc_cs_write_reg(async, GPMC_CS_CONFIG1, | ||
| 258 | GPMC_CONFIG1_PAGE_LEN(2) | ||
| 259 | | GPMC_CONFIG1_WAIT_READ_MON | ||
| 260 | | GPMC_CONFIG1_WAIT_WRITE_MON | ||
| 261 | | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) | ||
| 262 | | GPMC_CONFIG1_READTYPE_ASYNC | ||
| 263 | | GPMC_CONFIG1_WRITETYPE_ASYNC | ||
| 264 | | GPMC_CONFIG1_DEVICESIZE_16 | ||
| 265 | | GPMC_CONFIG1_DEVICETYPE_NOR | ||
| 266 | | GPMC_CONFIG1_MUXADDDATA); | ||
| 267 | |||
| 268 | |||
| 269 | /* SYNC region, primarily for DMA */ | ||
| 270 | status = gpmc_cs_request(sync, SZ_16M, (unsigned long *) | ||
| 271 | &tusb_resources[1].start); | ||
| 272 | if (status < 0) { | ||
| 273 | printk(error, 2, status); | ||
| 274 | return status; | ||
| 275 | } | ||
| 276 | tusb_resources[1].end = tusb_resources[1].start + 0x9ff; | ||
| 277 | sync_cs = sync; | ||
| 278 | gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1, | ||
| 279 | GPMC_CONFIG1_READMULTIPLE_SUPP | ||
| 280 | | GPMC_CONFIG1_READTYPE_SYNC | ||
| 281 | | GPMC_CONFIG1_WRITEMULTIPLE_SUPP | ||
| 282 | | GPMC_CONFIG1_WRITETYPE_SYNC | ||
| 283 | | GPMC_CONFIG1_CLKACTIVATIONTIME(1) | ||
| 284 | | GPMC_CONFIG1_PAGE_LEN(2) | ||
| 285 | | GPMC_CONFIG1_WAIT_READ_MON | ||
| 286 | | GPMC_CONFIG1_WAIT_WRITE_MON | ||
| 287 | | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) | ||
| 288 | | GPMC_CONFIG1_DEVICESIZE_16 | ||
| 289 | | GPMC_CONFIG1_DEVICETYPE_NOR | ||
| 290 | | GPMC_CONFIG1_MUXADDDATA | ||
| 291 | /* fclk divider gets set later */ | ||
| 292 | ); | ||
| 293 | |||
| 294 | /* IRQ */ | ||
| 295 | status = omap_request_gpio(irq); | ||
| 296 | if (status < 0) { | ||
| 297 | printk(error, 3, status); | ||
| 298 | return status; | ||
| 299 | } | ||
| 300 | omap_set_gpio_direction(irq, 1); | ||
| 301 | tusb_resources[2].start = irq + IH_GPIO_BASE; | ||
| 302 | |||
| 303 | /* set up memory timings ... can speed them up later */ | ||
| 304 | if (!ps_refclk) { | ||
| 305 | printk(error, 4, status); | ||
| 306 | return -ENODEV; | ||
| 307 | } | ||
| 308 | refclk_psec = ps_refclk; | ||
| 309 | status = tusb6010_platform_retime(1); | ||
| 310 | if (status < 0) { | ||
| 311 | printk(error, 5, status); | ||
| 312 | return status; | ||
| 313 | } | ||
| 314 | |||
| 315 | /* finish device setup ... */ | ||
| 316 | if (!data) { | ||
| 317 | printk(error, 6, status); | ||
| 318 | return -ENODEV; | ||
| 319 | } | ||
| 320 | data->multipoint = 1; | ||
| 321 | tusb_device.dev.platform_data = data; | ||
| 322 | |||
| 323 | /* REVISIT let the driver know what DMA channels work */ | ||
| 324 | if (!dmachan) | ||
| 325 | tusb_device.dev.dma_mask = NULL; | ||
| 326 | else { | ||
| 327 | /* assume OMAP 2420 ES2.0 and later */ | ||
| 328 | if (dmachan & (1 << 0)) | ||
| 329 | omap_cfg_reg(AA10_242X_DMAREQ0); | ||
| 330 | if (dmachan & (1 << 1)) | ||
| 331 | omap_cfg_reg(AA6_242X_DMAREQ1); | ||
| 332 | if (dmachan & (1 << 2)) | ||
| 333 | omap_cfg_reg(E4_242X_DMAREQ2); | ||
| 334 | if (dmachan & (1 << 3)) | ||
| 335 | omap_cfg_reg(G4_242X_DMAREQ3); | ||
| 336 | if (dmachan & (1 << 4)) | ||
| 337 | omap_cfg_reg(D3_242X_DMAREQ4); | ||
| 338 | if (dmachan & (1 << 5)) | ||
| 339 | omap_cfg_reg(E3_242X_DMAREQ5); | ||
| 340 | } | ||
| 341 | |||
| 342 | /* so far so good ... register the device */ | ||
| 343 | status = platform_device_register(&tusb_device); | ||
| 344 | if (status < 0) { | ||
| 345 | printk(error, 7, status); | ||
| 346 | return status; | ||
| 347 | } | ||
| 348 | return 0; | ||
| 349 | } | ||
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 5ebec6d88b51..656d49661a29 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
| @@ -1,6 +1,24 @@ | |||
| 1 | if ARCH_PXA | 1 | if ARCH_PXA |
| 2 | 2 | ||
| 3 | menu "Intel PXA2xx Implementations" | 3 | menu "Intel PXA2xx/PXA3xx Implementations" |
| 4 | |||
| 5 | if PXA3xx | ||
| 6 | |||
| 7 | menu "Supported PXA3xx Processor Variants" | ||
| 8 | |||
| 9 | config CPU_PXA300 | ||
| 10 | bool "PXA300 (codename Monahans-L)" | ||
| 11 | |||
| 12 | config CPU_PXA310 | ||
| 13 | bool "PXA310 (codename Monahans-LV)" | ||
| 14 | select CPU_PXA300 | ||
| 15 | |||
| 16 | config CPU_PXA320 | ||
| 17 | bool "PXA320 (codename Monahans-P)" | ||
| 18 | |||
| 19 | endmenu | ||
| 20 | |||
| 21 | endif | ||
| 4 | 22 | ||
| 5 | choice | 23 | choice |
| 6 | prompt "Select target board" | 24 | prompt "Select target board" |
| @@ -41,6 +59,15 @@ config MACH_EM_X270 | |||
| 41 | bool "CompuLab EM-x270 platform" | 59 | bool "CompuLab EM-x270 platform" |
| 42 | select PXA27x | 60 | select PXA27x |
| 43 | 61 | ||
| 62 | config MACH_ZYLONITE | ||
| 63 | bool "PXA3xx Development Platform" | ||
| 64 | select PXA3xx | ||
| 65 | |||
| 66 | config MACH_ARMCORE | ||
| 67 | bool "CompuLab CM-X270 modules" | ||
| 68 | select PXA27x | ||
| 69 | select IWMMXT | ||
| 70 | |||
| 44 | endchoice | 71 | endchoice |
| 45 | 72 | ||
| 46 | if PXA_SHARPSL | 73 | if PXA_SHARPSL |
| @@ -130,6 +157,11 @@ config PXA27x | |||
| 130 | help | 157 | help |
| 131 | Select code specific to PXA27x variants | 158 | Select code specific to PXA27x variants |
| 132 | 159 | ||
| 160 | config PXA3xx | ||
| 161 | bool | ||
| 162 | help | ||
| 163 | Select code specific to PXA3xx variants | ||
| 164 | |||
| 133 | config PXA_SHARP_C7xx | 165 | config PXA_SHARP_C7xx |
| 134 | bool | 166 | bool |
| 135 | select PXA_SSP | 167 | select PXA_SSP |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 7d6ab5c59ab9..4263527e5123 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
| @@ -3,36 +3,51 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # Common support (must be linked before board specific support) | 5 | # Common support (must be linked before board specific support) |
| 6 | obj-y += clock.o generic.o irq.o dma.o time.o | 6 | obj-y += clock.o generic.o irq.o dma.o time.o |
| 7 | obj-$(CONFIG_PXA25x) += pxa25x.o | 7 | obj-$(CONFIG_PXA25x) += pxa25x.o |
| 8 | obj-$(CONFIG_PXA27x) += pxa27x.o | 8 | obj-$(CONFIG_PXA27x) += pxa27x.o |
| 9 | obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o | ||
| 10 | obj-$(CONFIG_CPU_PXA300) += pxa300.o | ||
| 11 | obj-$(CONFIG_CPU_PXA320) += pxa320.o | ||
| 9 | 12 | ||
| 10 | # Specific board support | 13 | # Specific board support |
| 11 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o | 14 | obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o |
| 12 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | 15 | obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o |
| 13 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o | 16 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o |
| 14 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o | 17 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o |
| 15 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o | 18 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o |
| 16 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o | 19 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o |
| 17 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o | 20 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o |
| 18 | obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o | 21 | obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o |
| 19 | obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o | 22 | obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o |
| 20 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 23 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
| 21 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | 24 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o |
| 25 | |||
| 26 | ifeq ($(CONFIG_MACH_ZYLONITE),y) | ||
| 27 | obj-y += zylonite.o | ||
| 28 | obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o | ||
| 29 | obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o | ||
| 30 | endif | ||
| 31 | |||
| 32 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o | ||
| 22 | 33 | ||
| 23 | # Support for blinky lights | 34 | # Support for blinky lights |
| 24 | led-y := leds.o | 35 | led-y := leds.o |
| 25 | led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o | 36 | led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o |
| 26 | led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o | 37 | led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o |
| 27 | led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o | 38 | led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o |
| 28 | led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o | 39 | led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o |
| 29 | 40 | ||
| 30 | obj-$(CONFIG_LEDS) += $(led-y) | 41 | obj-$(CONFIG_LEDS) += $(led-y) |
| 31 | 42 | ||
| 32 | # Misc features | 43 | # Misc features |
| 33 | obj-$(CONFIG_PM) += pm.o sleep.o | 44 | obj-$(CONFIG_PM) += pm.o sleep.o |
| 34 | obj-$(CONFIG_PXA_SSP) += ssp.o | 45 | obj-$(CONFIG_PXA_SSP) += ssp.o |
| 35 | 46 | ||
| 36 | ifeq ($(CONFIG_PXA27x),y) | 47 | ifeq ($(CONFIG_PXA27x),y) |
| 37 | obj-$(CONFIG_PM) += standby.o | 48 | obj-$(CONFIG_PM) += standby.o |
| 49 | endif | ||
| 50 | |||
| 51 | ifeq ($(CONFIG_PCI),y) | ||
| 52 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o | ||
| 38 | endif | 53 | endif |
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index 34a31caa6f9d..83ef5ecaf432 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c | |||
| @@ -9,19 +9,15 @@ | |||
| 9 | #include <linux/string.h> | 9 | #include <linux/string.h> |
| 10 | #include <linux/clk.h> | 10 | #include <linux/clk.h> |
| 11 | #include <linux/spinlock.h> | 11 | #include <linux/spinlock.h> |
| 12 | #include <linux/platform_device.h> | ||
| 13 | #include <linux/delay.h> | ||
| 12 | 14 | ||
| 13 | #include <asm/arch/pxa-regs.h> | 15 | #include <asm/arch/pxa-regs.h> |
| 14 | #include <asm/hardware.h> | 16 | #include <asm/hardware.h> |
| 15 | 17 | ||
| 16 | struct clk { | 18 | #include "devices.h" |
| 17 | struct list_head node; | 19 | #include "generic.h" |
| 18 | unsigned long rate; | 20 | #include "clock.h" |
| 19 | struct module *owner; | ||
| 20 | const char *name; | ||
| 21 | unsigned int enabled; | ||
| 22 | void (*enable)(void); | ||
| 23 | void (*disable)(void); | ||
| 24 | }; | ||
| 25 | 21 | ||
| 26 | static LIST_HEAD(clocks); | 22 | static LIST_HEAD(clocks); |
| 27 | static DEFINE_MUTEX(clocks_mutex); | 23 | static DEFINE_MUTEX(clocks_mutex); |
| @@ -33,7 +29,8 @@ struct clk *clk_get(struct device *dev, const char *id) | |||
| 33 | 29 | ||
| 34 | mutex_lock(&clocks_mutex); | 30 | mutex_lock(&clocks_mutex); |
| 35 | list_for_each_entry(p, &clocks, node) { | 31 | list_for_each_entry(p, &clocks, node) { |
| 36 | if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | 32 | if (strcmp(id, p->name) == 0 && |
| 33 | (p->dev == NULL || p->dev == dev)) { | ||
| 37 | clk = p; | 34 | clk = p; |
| 38 | break; | 35 | break; |
| 39 | } | 36 | } |
| @@ -46,7 +43,6 @@ EXPORT_SYMBOL(clk_get); | |||
| 46 | 43 | ||
| 47 | void clk_put(struct clk *clk) | 44 | void clk_put(struct clk *clk) |
| 48 | { | 45 | { |
| 49 | module_put(clk->owner); | ||
| 50 | } | 46 | } |
| 51 | EXPORT_SYMBOL(clk_put); | 47 | EXPORT_SYMBOL(clk_put); |
| 52 | 48 | ||
| @@ -56,8 +52,12 @@ int clk_enable(struct clk *clk) | |||
| 56 | 52 | ||
| 57 | spin_lock_irqsave(&clocks_lock, flags); | 53 | spin_lock_irqsave(&clocks_lock, flags); |
| 58 | if (clk->enabled++ == 0) | 54 | if (clk->enabled++ == 0) |
| 59 | clk->enable(); | 55 | clk->ops->enable(clk); |
| 60 | spin_unlock_irqrestore(&clocks_lock, flags); | 56 | spin_unlock_irqrestore(&clocks_lock, flags); |
| 57 | |||
| 58 | if (clk->delay) | ||
| 59 | udelay(clk->delay); | ||
| 60 | |||
| 61 | return 0; | 61 | return 0; |
| 62 | } | 62 | } |
| 63 | EXPORT_SYMBOL(clk_enable); | 63 | EXPORT_SYMBOL(clk_enable); |
| @@ -70,54 +70,75 @@ void clk_disable(struct clk *clk) | |||
| 70 | 70 | ||
| 71 | spin_lock_irqsave(&clocks_lock, flags); | 71 | spin_lock_irqsave(&clocks_lock, flags); |
| 72 | if (--clk->enabled == 0) | 72 | if (--clk->enabled == 0) |
| 73 | clk->disable(); | 73 | clk->ops->disable(clk); |
| 74 | spin_unlock_irqrestore(&clocks_lock, flags); | 74 | spin_unlock_irqrestore(&clocks_lock, flags); |
| 75 | } | 75 | } |
| 76 | EXPORT_SYMBOL(clk_disable); | 76 | EXPORT_SYMBOL(clk_disable); |
| 77 | 77 | ||
| 78 | unsigned long clk_get_rate(struct clk *clk) | 78 | unsigned long clk_get_rate(struct clk *clk) |
| 79 | { | 79 | { |
| 80 | return clk->rate; | 80 | unsigned long rate; |
| 81 | |||
| 82 | rate = clk->rate; | ||
| 83 | if (clk->ops->getrate) | ||
| 84 | rate = clk->ops->getrate(clk); | ||
| 85 | |||
| 86 | return rate; | ||
| 81 | } | 87 | } |
| 82 | EXPORT_SYMBOL(clk_get_rate); | 88 | EXPORT_SYMBOL(clk_get_rate); |
| 83 | 89 | ||
| 84 | 90 | ||
| 85 | static void clk_gpio27_enable(void) | 91 | static void clk_gpio27_enable(struct clk *clk) |
| 86 | { | 92 | { |
| 87 | pxa_gpio_mode(GPIO11_3_6MHz_MD); | 93 | pxa_gpio_mode(GPIO11_3_6MHz_MD); |
| 88 | } | 94 | } |
| 89 | 95 | ||
| 90 | static void clk_gpio27_disable(void) | 96 | static void clk_gpio27_disable(struct clk *clk) |
| 91 | { | 97 | { |
| 92 | } | 98 | } |
| 93 | 99 | ||
| 94 | static struct clk clk_gpio27 = { | 100 | static const struct clkops clk_gpio27_ops = { |
| 95 | .name = "GPIO27_CLK", | ||
| 96 | .rate = 3686400, | ||
| 97 | .enable = clk_gpio27_enable, | 101 | .enable = clk_gpio27_enable, |
| 98 | .disable = clk_gpio27_disable, | 102 | .disable = clk_gpio27_disable, |
| 99 | }; | 103 | }; |
| 100 | 104 | ||
| 101 | int clk_register(struct clk *clk) | 105 | |
| 106 | void clk_cken_enable(struct clk *clk) | ||
| 102 | { | 107 | { |
| 103 | mutex_lock(&clocks_mutex); | 108 | CKEN |= 1 << clk->cken; |
| 104 | list_add(&clk->node, &clocks); | ||
| 105 | mutex_unlock(&clocks_mutex); | ||
| 106 | return 0; | ||
| 107 | } | 109 | } |
| 108 | EXPORT_SYMBOL(clk_register); | ||
| 109 | 110 | ||
| 110 | void clk_unregister(struct clk *clk) | 111 | void clk_cken_disable(struct clk *clk) |
| 111 | { | 112 | { |
| 113 | CKEN &= ~(1 << clk->cken); | ||
| 114 | } | ||
| 115 | |||
| 116 | const struct clkops clk_cken_ops = { | ||
| 117 | .enable = clk_cken_enable, | ||
| 118 | .disable = clk_cken_disable, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct clk common_clks[] = { | ||
| 122 | { | ||
| 123 | .name = "GPIO27_CLK", | ||
| 124 | .ops = &clk_gpio27_ops, | ||
| 125 | .rate = 3686400, | ||
| 126 | }, | ||
| 127 | }; | ||
| 128 | |||
| 129 | void clks_register(struct clk *clks, size_t num) | ||
| 130 | { | ||
| 131 | int i; | ||
| 132 | |||
| 112 | mutex_lock(&clocks_mutex); | 133 | mutex_lock(&clocks_mutex); |
| 113 | list_del(&clk->node); | 134 | for (i = 0; i < num; i++) |
| 135 | list_add(&clks[i].node, &clocks); | ||
| 114 | mutex_unlock(&clocks_mutex); | 136 | mutex_unlock(&clocks_mutex); |
| 115 | } | 137 | } |
| 116 | EXPORT_SYMBOL(clk_unregister); | ||
| 117 | 138 | ||
| 118 | static int __init clk_init(void) | 139 | static int __init clk_init(void) |
| 119 | { | 140 | { |
| 120 | clk_register(&clk_gpio27); | 141 | clks_register(common_clks, ARRAY_SIZE(common_clks)); |
| 121 | return 0; | 142 | return 0; |
| 122 | } | 143 | } |
| 123 | arch_initcall(clk_init); | 144 | arch_initcall(clk_init); |
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h new file mode 100644 index 000000000000..bc6b77e1592e --- /dev/null +++ b/arch/arm/mach-pxa/clock.h | |||
| @@ -0,0 +1,43 @@ | |||
| 1 | struct clk; | ||
| 2 | |||
| 3 | struct clkops { | ||
| 4 | void (*enable)(struct clk *); | ||
| 5 | void (*disable)(struct clk *); | ||
| 6 | unsigned long (*getrate)(struct clk *); | ||
| 7 | }; | ||
| 8 | |||
| 9 | struct clk { | ||
| 10 | struct list_head node; | ||
| 11 | const char *name; | ||
| 12 | struct device *dev; | ||
| 13 | const struct clkops *ops; | ||
| 14 | unsigned long rate; | ||
| 15 | unsigned int cken; | ||
| 16 | unsigned int delay; | ||
| 17 | unsigned int enabled; | ||
| 18 | }; | ||
| 19 | |||
| 20 | #define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ | ||
| 21 | { \ | ||
| 22 | .name = _name, \ | ||
| 23 | .dev = _dev, \ | ||
| 24 | .ops = &clk_cken_ops, \ | ||
| 25 | .rate = _rate, \ | ||
| 26 | .cken = CKEN_##_cken, \ | ||
| 27 | .delay = _delay, \ | ||
| 28 | } | ||
| 29 | |||
| 30 | #define INIT_CK(_name, _cken, _ops, _dev) \ | ||
| 31 | { \ | ||
| 32 | .name = _name, \ | ||
| 33 | .dev = _dev, \ | ||
| 34 | .ops = _ops, \ | ||
| 35 | .cken = CKEN_##_cken, \ | ||
| 36 | } | ||
| 37 | |||
| 38 | extern const struct clkops clk_cken_ops; | ||
| 39 | |||
| 40 | void clk_cken_enable(struct clk *clk); | ||
| 41 | void clk_cken_disable(struct clk *clk); | ||
| 42 | |||
| 43 | void clks_register(struct clk *clks, size_t num); | ||
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x270-pci.c new file mode 100644 index 000000000000..878d3b9b8633 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x270-pci.c | |||
| @@ -0,0 +1,218 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cm-x270-pci.c | ||
| 3 | * | ||
| 4 | * PCI bios-type initialisation for PCI machines | ||
| 5 | * | ||
| 6 | * Bits taken from various places. | ||
| 7 | * | ||
| 8 | * Copyright (C) 2007 Compulab, Ltd. | ||
| 9 | * Mike Rapoport <mike@compulab.co.il> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/pci.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/device.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/irq.h> | ||
| 22 | |||
| 23 | #include <asm/mach/pci.h> | ||
| 24 | #include <asm/arch/cm-x270.h> | ||
| 25 | #include <asm/arch/pxa-regs.h> | ||
| 26 | #include <asm/mach-types.h> | ||
| 27 | |||
| 28 | #include <asm/hardware/it8152.h> | ||
| 29 | |||
| 30 | unsigned long it8152_base_address = CMX270_IT8152_VIRT; | ||
| 31 | |||
| 32 | /* | ||
| 33 | * Only first 64MB of memory can be accessed via PCI. | ||
| 34 | * We use GFP_DMA to allocate safe buffers to do map/unmap. | ||
| 35 | * This is really ugly and we need a better way of specifying | ||
| 36 | * DMA-capable regions of memory. | ||
| 37 | */ | ||
| 38 | void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, | ||
| 39 | unsigned long *zhole_size) | ||
| 40 | { | ||
| 41 | unsigned int sz = SZ_64M >> PAGE_SHIFT; | ||
| 42 | |||
| 43 | printk(KERN_INFO "Adjusting zones for CM-x270\n"); | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Only adjust if > 64M on current system | ||
| 47 | */ | ||
| 48 | if (node || (zone_size[0] <= sz)) | ||
| 49 | return; | ||
| 50 | |||
| 51 | zone_size[1] = zone_size[0] - sz; | ||
| 52 | zone_size[0] = sz; | ||
| 53 | zhole_size[1] = zhole_size[0]; | ||
| 54 | zhole_size[0] = 0; | ||
| 55 | } | ||
| 56 | |||
| 57 | static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | ||
| 58 | { | ||
| 59 | /* clear our parent irq */ | ||
| 60 | GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ); | ||
| 61 | |||
| 62 | it8152_irq_demux(irq, desc); | ||
| 63 | } | ||
| 64 | |||
| 65 | void __cmx270_pci_init_irq(void) | ||
| 66 | { | ||
| 67 | it8152_init_irq(); | ||
| 68 | pxa_gpio_mode(IRQ_TO_GPIO(GPIO_IT8152_IRQ)); | ||
| 69 | set_irq_type(IRQ_GPIO(GPIO_IT8152_IRQ), IRQT_RISING); | ||
| 70 | |||
| 71 | set_irq_chained_handler(IRQ_GPIO(GPIO_IT8152_IRQ), | ||
| 72 | cmx270_it8152_irq_demux); | ||
| 73 | } | ||
| 74 | |||
| 75 | #ifdef CONFIG_PM | ||
| 76 | static unsigned long sleep_save_ite[10]; | ||
| 77 | |||
| 78 | void __cmx270_pci_suspend(void) | ||
| 79 | { | ||
| 80 | /* save ITE state */ | ||
| 81 | sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); | ||
| 82 | sleep_save_ite[1] = __raw_readl(IT8152_INTC_LPCNIMR); | ||
| 83 | sleep_save_ite[2] = __raw_readl(IT8152_INTC_LPNIAR); | ||
| 84 | |||
| 85 | /* Clear ITE IRQ's */ | ||
| 86 | __raw_writel((0), IT8152_INTC_PDCNIRR); | ||
| 87 | __raw_writel((0), IT8152_INTC_LPCNIRR); | ||
| 88 | } | ||
| 89 | |||
| 90 | void __cmx270_pci_resume(void) | ||
| 91 | { | ||
| 92 | /* restore IT8152 state */ | ||
| 93 | __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); | ||
| 94 | __raw_writel((sleep_save_ite[1]), IT8152_INTC_LPCNIMR); | ||
| 95 | __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); | ||
| 96 | } | ||
| 97 | #else | ||
| 98 | void cmx270_pci_suspend(void) {} | ||
| 99 | void cmx270_pci_resume(void) {} | ||
| 100 | #endif | ||
| 101 | |||
| 102 | /* PCI IRQ mapping*/ | ||
| 103 | static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
| 104 | { | ||
| 105 | int irq; | ||
| 106 | |||
| 107 | printk(KERN_DEBUG "===> %s: %s slot=%x, pin=%x\n", __FUNCTION__, | ||
| 108 | pci_name(dev), slot, pin); | ||
| 109 | |||
| 110 | irq = it8152_pci_map_irq(dev, slot, pin); | ||
| 111 | if (irq) | ||
| 112 | return irq; | ||
| 113 | |||
| 114 | /* | ||
| 115 | Here comes the ugly part. The routing is baseboard specific, | ||
| 116 | but defining a platform for each possible base of CM-x270 is | ||
| 117 | unrealistic. Here we keep mapping for ATXBase and SB-x270. | ||
| 118 | */ | ||
| 119 | /* ATXBASE PCI slot */ | ||
| 120 | if (slot == 7) | ||
| 121 | return IT8152_PCI_INTA; | ||
| 122 | |||
| 123 | /* ATXBase/SB-x270 CardBus */ | ||
| 124 | if (slot == 8 || slot == 0) | ||
| 125 | return IT8152_PCI_INTB; | ||
| 126 | |||
| 127 | /* ATXBase Ethernet */ | ||
| 128 | if (slot == 9) | ||
| 129 | return IT8152_PCI_INTA; | ||
| 130 | |||
| 131 | /* SB-x270 Ethernet */ | ||
| 132 | if (slot == 16) | ||
| 133 | return IT8152_PCI_INTA; | ||
| 134 | |||
| 135 | /* PC104+ interrupt routing */ | ||
| 136 | if ((slot == 17) || (slot == 19)) | ||
| 137 | return IT8152_PCI_INTA; | ||
| 138 | if ((slot == 18) || (slot == 20)) | ||
| 139 | return IT8152_PCI_INTB; | ||
| 140 | |||
| 141 | return(0); | ||
| 142 | } | ||
| 143 | |||
| 144 | static struct pci_bus * __init | ||
| 145 | cmx270_pci_scan_bus(int nr, struct pci_sys_data *sys) | ||
| 146 | { | ||
| 147 | printk(KERN_INFO "Initializing CM-X270 PCI subsystem\n"); | ||
| 148 | |||
| 149 | __raw_writel(0x800, IT8152_PCI_CFG_ADDR); | ||
| 150 | if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { | ||
| 151 | printk(KERN_INFO "PCI Bridge found.\n"); | ||
| 152 | |||
| 153 | /* set PCI I/O base at 0 */ | ||
| 154 | writel(0x848, IT8152_PCI_CFG_ADDR); | ||
| 155 | writel(0, IT8152_PCI_CFG_DATA); | ||
| 156 | |||
| 157 | /* set PCI memory base at 0 */ | ||
| 158 | writel(0x840, IT8152_PCI_CFG_ADDR); | ||
| 159 | writel(0, IT8152_PCI_CFG_DATA); | ||
| 160 | |||
| 161 | writel(0x20, IT8152_GPIO_GPDR); | ||
| 162 | |||
| 163 | /* CardBus Controller on ATXbase baseboard */ | ||
| 164 | writel(0x4000, IT8152_PCI_CFG_ADDR); | ||
| 165 | if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) { | ||
| 166 | printk(KERN_INFO "CardBus Bridge found.\n"); | ||
| 167 | |||
| 168 | /* Configure socket 0 */ | ||
| 169 | writel(0x408C, IT8152_PCI_CFG_ADDR); | ||
| 170 | writel(0x1022, IT8152_PCI_CFG_DATA); | ||
| 171 | |||
| 172 | writel(0x4080, IT8152_PCI_CFG_ADDR); | ||
| 173 | writel(0x3844d060, IT8152_PCI_CFG_DATA); | ||
| 174 | |||
| 175 | writel(0x4090, IT8152_PCI_CFG_ADDR); | ||
| 176 | writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) | | ||
| 177 | 0x60440000), | ||
| 178 | IT8152_PCI_CFG_DATA); | ||
| 179 | |||
| 180 | writel(0x4018, IT8152_PCI_CFG_ADDR); | ||
| 181 | writel(0xb0000000, IT8152_PCI_CFG_DATA); | ||
| 182 | |||
| 183 | /* Configure socket 1 */ | ||
| 184 | writel(0x418C, IT8152_PCI_CFG_ADDR); | ||
| 185 | writel(0x1022, IT8152_PCI_CFG_DATA); | ||
| 186 | |||
| 187 | writel(0x4180, IT8152_PCI_CFG_ADDR); | ||
| 188 | writel(0x3844d060, IT8152_PCI_CFG_DATA); | ||
| 189 | |||
| 190 | writel(0x4190, IT8152_PCI_CFG_ADDR); | ||
| 191 | writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) | | ||
| 192 | 0x60440000), | ||
| 193 | IT8152_PCI_CFG_DATA); | ||
| 194 | |||
| 195 | writel(0x4118, IT8152_PCI_CFG_ADDR); | ||
| 196 | writel(0xb0000000, IT8152_PCI_CFG_DATA); | ||
| 197 | } | ||
| 198 | } | ||
| 199 | return it8152_pci_scan_bus(nr, sys); | ||
| 200 | } | ||
| 201 | |||
| 202 | static struct hw_pci cmx270_pci __initdata = { | ||
| 203 | .swizzle = pci_std_swizzle, | ||
| 204 | .map_irq = cmx270_pci_map_irq, | ||
| 205 | .nr_controllers = 1, | ||
| 206 | .setup = it8152_pci_setup, | ||
| 207 | .scan = cmx270_pci_scan_bus, | ||
| 208 | }; | ||
| 209 | |||
| 210 | static int __init cmx270_init_pci(void) | ||
| 211 | { | ||
| 212 | if (machine_is_armcore()) | ||
| 213 | pci_common_init(&cmx270_pci); | ||
| 214 | |||
| 215 | return 0; | ||
| 216 | } | ||
| 217 | |||
| 218 | subsys_initcall(cmx270_init_pci); | ||
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h new file mode 100644 index 000000000000..ffe37b66f9a0 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x270-pci.h | |||
| @@ -0,0 +1,13 @@ | |||
| 1 | extern void __cmx270_pci_init_irq(void); | ||
| 2 | extern void __cmx270_pci_suspend(void); | ||
| 3 | extern void __cmx270_pci_resume(void); | ||
| 4 | |||
| 5 | #ifdef CONFIG_PCI | ||
| 6 | #define cmx270_pci_init_irq __cmx270_pci_init_irq | ||
| 7 | #define cmx270_pci_suspend __cmx270_pci_suspend | ||
| 8 | #define cmx270_pci_resume __cmx270_pci_resume | ||
| 9 | #else | ||
| 10 | #define cmx270_pci_init_irq() do {} while (0) | ||
| 11 | #define cmx270_pci_suspend() do {} while (0) | ||
| 12 | #define cmx270_pci_resume() do {} while (0) | ||
| 13 | #endif | ||
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c new file mode 100644 index 000000000000..177664ccb2e2 --- /dev/null +++ b/arch/arm/mach-pxa/cm-x270.c | |||
| @@ -0,0 +1,645 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/cm-x270.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007 CompuLab, Ltd. | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/pm.h> | ||
| 14 | #include <linux/fb.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/irq.h> | ||
| 17 | #include <linux/sysdev.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <linux/delay.h> | ||
| 20 | |||
| 21 | #include <linux/dm9000.h> | ||
| 22 | #include <linux/rtc-v3020.h> | ||
| 23 | #include <linux/serial_8250.h> | ||
| 24 | |||
| 25 | #include <video/mbxfb.h> | ||
| 26 | |||
| 27 | #include <asm/mach/arch.h> | ||
| 28 | #include <asm/mach-types.h> | ||
| 29 | #include <asm/mach/map.h> | ||
| 30 | |||
| 31 | #include <asm/arch/pxa-regs.h> | ||
| 32 | #include <asm/arch/pxafb.h> | ||
| 33 | #include <asm/arch/ohci.h> | ||
| 34 | #include <asm/arch/mmc.h> | ||
| 35 | #include <asm/arch/bitfield.h> | ||
| 36 | #include <asm/arch/cm-x270.h> | ||
| 37 | |||
| 38 | #include <asm/hardware/it8152.h> | ||
| 39 | |||
| 40 | #include "generic.h" | ||
| 41 | #include "cm-x270-pci.h" | ||
| 42 | |||
| 43 | #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) | ||
| 44 | #define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) | ||
| 45 | |||
| 46 | static struct resource cmx270_dm9k_resource[] = { | ||
| 47 | [0] = { | ||
| 48 | .start = DM9000_PHYS_BASE, | ||
| 49 | .end = DM9000_PHYS_BASE + 4, | ||
| 50 | .flags = IORESOURCE_MEM, | ||
| 51 | }, | ||
| 52 | [1] = { | ||
| 53 | .start = DM9000_PHYS_BASE + 8, | ||
| 54 | .end = DM9000_PHYS_BASE + 8 + 500, | ||
| 55 | .flags = IORESOURCE_MEM, | ||
| 56 | }, | ||
| 57 | [2] = { | ||
| 58 | .start = CMX270_ETHIRQ, | ||
| 59 | .end = CMX270_ETHIRQ, | ||
| 60 | .flags = IORESOURCE_IRQ, | ||
| 61 | } | ||
| 62 | }; | ||
| 63 | |||
| 64 | /* for the moment we limit ourselves to 32bit IO until some | ||
| 65 | * better IO routines can be written and tested | ||
| 66 | */ | ||
| 67 | static struct dm9000_plat_data cmx270_dm9k_platdata = { | ||
| 68 | .flags = DM9000_PLATF_32BITONLY, | ||
| 69 | }; | ||
| 70 | |||
| 71 | /* Ethernet device */ | ||
| 72 | static struct platform_device cmx270_device_dm9k = { | ||
| 73 | .name = "dm9000", | ||
| 74 | .id = 0, | ||
| 75 | .num_resources = ARRAY_SIZE(cmx270_dm9k_resource), | ||
| 76 | .resource = cmx270_dm9k_resource, | ||
| 77 | .dev = { | ||
| 78 | .platform_data = &cmx270_dm9k_platdata, | ||
| 79 | } | ||
| 80 | }; | ||
| 81 | |||
| 82 | /* audio device */ | ||
| 83 | static struct platform_device cmx270_audio_device = { | ||
| 84 | .name = "pxa2xx-ac97", | ||
| 85 | .id = -1, | ||
| 86 | }; | ||
| 87 | |||
| 88 | /* touchscreen controller */ | ||
| 89 | static struct platform_device cmx270_ts_device = { | ||
| 90 | .name = "ucb1400_ts", | ||
| 91 | .id = -1, | ||
| 92 | }; | ||
| 93 | |||
| 94 | /* RTC */ | ||
| 95 | static struct resource cmx270_v3020_resource[] = { | ||
| 96 | [0] = { | ||
| 97 | .start = RTC_PHYS_BASE, | ||
| 98 | .end = RTC_PHYS_BASE + 4, | ||
| 99 | .flags = IORESOURCE_MEM, | ||
| 100 | }, | ||
| 101 | }; | ||
| 102 | |||
| 103 | struct v3020_platform_data cmx270_v3020_pdata = { | ||
| 104 | .leftshift = 16, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static struct platform_device cmx270_rtc_device = { | ||
| 108 | .name = "v3020", | ||
| 109 | .num_resources = ARRAY_SIZE(cmx270_v3020_resource), | ||
| 110 | .resource = cmx270_v3020_resource, | ||
| 111 | .id = -1, | ||
| 112 | .dev = { | ||
| 113 | .platform_data = &cmx270_v3020_pdata, | ||
| 114 | } | ||
| 115 | }; | ||
| 116 | |||
| 117 | /* | ||
| 118 | * CM-X270 LEDs | ||
| 119 | */ | ||
| 120 | static struct platform_device cmx270_led_device = { | ||
| 121 | .name = "cm-x270-led", | ||
| 122 | .id = -1, | ||
| 123 | }; | ||
| 124 | |||
| 125 | /* 2700G graphics */ | ||
| 126 | static u64 fb_dma_mask = ~(u64)0; | ||
| 127 | |||
| 128 | static struct resource cmx270_2700G_resource[] = { | ||
| 129 | /* frame buffer memory including ODFB and External SDRAM */ | ||
| 130 | [0] = { | ||
| 131 | .start = MARATHON_PHYS, | ||
| 132 | .end = MARATHON_PHYS + 0x02000000, | ||
| 133 | .flags = IORESOURCE_MEM, | ||
| 134 | }, | ||
| 135 | /* Marathon registers */ | ||
| 136 | [1] = { | ||
| 137 | .start = MARATHON_PHYS + 0x03fe0000, | ||
| 138 | .end = MARATHON_PHYS + 0x03ffffff, | ||
| 139 | .flags = IORESOURCE_MEM, | ||
| 140 | }, | ||
| 141 | }; | ||
| 142 | |||
| 143 | static unsigned long save_lcd_regs[10]; | ||
| 144 | |||
| 145 | static int cmx270_marathon_probe(struct fb_info *fb) | ||
| 146 | { | ||
| 147 | /* save PXA-270 pin settings before enabling 2700G */ | ||
| 148 | save_lcd_regs[0] = GPDR1; | ||
| 149 | save_lcd_regs[1] = GPDR2; | ||
| 150 | save_lcd_regs[2] = GAFR1_U; | ||
| 151 | save_lcd_regs[3] = GAFR2_L; | ||
| 152 | save_lcd_regs[4] = GAFR2_U; | ||
| 153 | |||
| 154 | /* Disable PXA-270 on-chip controller driving pins */ | ||
| 155 | GPDR1 &= ~(0xfc000000); | ||
| 156 | GPDR2 &= ~(0x00c03fff); | ||
| 157 | GAFR1_U &= ~(0xfff00000); | ||
| 158 | GAFR2_L &= ~(0x0fffffff); | ||
| 159 | GAFR2_U &= ~(0x0000f000); | ||
| 160 | return 0; | ||
| 161 | } | ||
| 162 | |||
| 163 | static int cmx270_marathon_remove(struct fb_info *fb) | ||
| 164 | { | ||
| 165 | GPDR1 = save_lcd_regs[0]; | ||
| 166 | GPDR2 = save_lcd_regs[1]; | ||
| 167 | GAFR1_U = save_lcd_regs[2]; | ||
| 168 | GAFR2_L = save_lcd_regs[3]; | ||
| 169 | GAFR2_U = save_lcd_regs[4]; | ||
| 170 | return 0; | ||
| 171 | } | ||
| 172 | |||
| 173 | static struct mbxfb_platform_data cmx270_2700G_data = { | ||
| 174 | .xres = { | ||
| 175 | .min = 240, | ||
| 176 | .max = 1200, | ||
| 177 | .defval = 640, | ||
| 178 | }, | ||
| 179 | .yres = { | ||
| 180 | .min = 240, | ||
| 181 | .max = 1200, | ||
| 182 | .defval = 480, | ||
| 183 | }, | ||
| 184 | .bpp = { | ||
| 185 | .min = 16, | ||
| 186 | .max = 32, | ||
| 187 | .defval = 16, | ||
| 188 | }, | ||
| 189 | .memsize = 8*1024*1024, | ||
| 190 | .probe = cmx270_marathon_probe, | ||
| 191 | .remove = cmx270_marathon_remove, | ||
| 192 | }; | ||
| 193 | |||
| 194 | static struct platform_device cmx270_2700G = { | ||
| 195 | .name = "mbx-fb", | ||
| 196 | .dev = { | ||
| 197 | .platform_data = &cmx270_2700G_data, | ||
| 198 | .dma_mask = &fb_dma_mask, | ||
| 199 | .coherent_dma_mask = 0xffffffff, | ||
| 200 | }, | ||
| 201 | .num_resources = ARRAY_SIZE(cmx270_2700G_resource), | ||
| 202 | .resource = cmx270_2700G_resource, | ||
| 203 | .id = -1, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static u64 ata_dma_mask = ~(u64)0; | ||
| 207 | |||
| 208 | static struct platform_device cmx270_ata = { | ||
| 209 | .name = "pata_cm_x270", | ||
| 210 | .id = -1, | ||
| 211 | .dev = { | ||
| 212 | .dma_mask = &ata_dma_mask, | ||
| 213 | .coherent_dma_mask = 0xffffffff, | ||
| 214 | }, | ||
| 215 | }; | ||
| 216 | |||
| 217 | /* platform devices */ | ||
| 218 | static struct platform_device *platform_devices[] __initdata = { | ||
| 219 | &cmx270_device_dm9k, | ||
| 220 | &cmx270_audio_device, | ||
| 221 | &cmx270_rtc_device, | ||
| 222 | &cmx270_2700G, | ||
| 223 | &cmx270_led_device, | ||
| 224 | &cmx270_ts_device, | ||
| 225 | &cmx270_ata, | ||
| 226 | }; | ||
| 227 | |||
| 228 | /* Map PCI companion and IDE/General Purpose CS statically */ | ||
| 229 | static struct map_desc cmx270_io_desc[] __initdata = { | ||
| 230 | [0] = { /* IDE/general purpose space */ | ||
| 231 | .virtual = CMX270_IDE104_VIRT, | ||
| 232 | .pfn = __phys_to_pfn(CMX270_IDE104_PHYS), | ||
| 233 | .length = SZ_64M - SZ_8M, | ||
| 234 | .type = MT_DEVICE | ||
| 235 | }, | ||
| 236 | [1] = { /* PCI bridge */ | ||
| 237 | .virtual = CMX270_IT8152_VIRT, | ||
| 238 | .pfn = __phys_to_pfn(CMX270_IT8152_PHYS), | ||
| 239 | .length = SZ_64M, | ||
| 240 | .type = MT_DEVICE | ||
| 241 | }, | ||
| 242 | }; | ||
| 243 | |||
| 244 | /* | ||
| 245 | Display definitions | ||
| 246 | keep these for backwards compatibility, although symbolic names (as | ||
| 247 | e.g. in lpd270.c) looks better | ||
| 248 | */ | ||
| 249 | #define MTYPE_STN320x240 0 | ||
| 250 | #define MTYPE_TFT640x480 1 | ||
| 251 | #define MTYPE_CRT640x480 2 | ||
| 252 | #define MTYPE_CRT800x600 3 | ||
| 253 | #define MTYPE_TFT320x240 6 | ||
| 254 | #define MTYPE_STN640x480 7 | ||
| 255 | |||
| 256 | static struct pxafb_mode_info generic_stn_320x240_mode = { | ||
| 257 | .pixclock = 76923, | ||
| 258 | .bpp = 8, | ||
| 259 | .xres = 320, | ||
| 260 | .yres = 240, | ||
| 261 | .hsync_len = 3, | ||
| 262 | .vsync_len = 2, | ||
| 263 | .left_margin = 3, | ||
| 264 | .upper_margin = 0, | ||
| 265 | .right_margin = 3, | ||
| 266 | .lower_margin = 0, | ||
| 267 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 268 | FB_SYNC_VERT_HIGH_ACT), | ||
| 269 | .cmap_greyscale = 0, | ||
| 270 | }; | ||
| 271 | |||
| 272 | static struct pxafb_mach_info generic_stn_320x240 = { | ||
| 273 | .modes = &generic_stn_320x240_mode, | ||
| 274 | .num_modes = 1, | ||
| 275 | .lccr0 = 0, | ||
| 276 | .lccr3 = (LCCR3_PixClkDiv(0x03) | | ||
| 277 | LCCR3_Acb(0xff) | | ||
| 278 | LCCR3_PCP), | ||
| 279 | .cmap_inverse = 0, | ||
| 280 | .cmap_static = 0, | ||
| 281 | }; | ||
| 282 | |||
| 283 | static struct pxafb_mode_info generic_tft_640x480_mode = { | ||
| 284 | .pixclock = 38461, | ||
| 285 | .bpp = 8, | ||
| 286 | .xres = 640, | ||
| 287 | .yres = 480, | ||
| 288 | .hsync_len = 60, | ||
| 289 | .vsync_len = 2, | ||
| 290 | .left_margin = 70, | ||
| 291 | .upper_margin = 10, | ||
| 292 | .right_margin = 70, | ||
| 293 | .lower_margin = 5, | ||
| 294 | .sync = 0, | ||
| 295 | .cmap_greyscale = 0, | ||
| 296 | }; | ||
| 297 | |||
| 298 | static struct pxafb_mach_info generic_tft_640x480 = { | ||
| 299 | .modes = &generic_tft_640x480_mode, | ||
| 300 | .num_modes = 1, | ||
| 301 | .lccr0 = (LCCR0_PAS), | ||
| 302 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 303 | LCCR3_Acb(0xff) | | ||
| 304 | LCCR3_PCP), | ||
| 305 | .cmap_inverse = 0, | ||
| 306 | .cmap_static = 0, | ||
| 307 | }; | ||
| 308 | |||
| 309 | static struct pxafb_mode_info generic_crt_640x480_mode = { | ||
| 310 | .pixclock = 38461, | ||
| 311 | .bpp = 8, | ||
| 312 | .xres = 640, | ||
| 313 | .yres = 480, | ||
| 314 | .hsync_len = 63, | ||
| 315 | .vsync_len = 2, | ||
| 316 | .left_margin = 81, | ||
| 317 | .upper_margin = 33, | ||
| 318 | .right_margin = 16, | ||
| 319 | .lower_margin = 10, | ||
| 320 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 321 | FB_SYNC_VERT_HIGH_ACT), | ||
| 322 | .cmap_greyscale = 0, | ||
| 323 | }; | ||
| 324 | |||
| 325 | static struct pxafb_mach_info generic_crt_640x480 = { | ||
| 326 | .modes = &generic_crt_640x480_mode, | ||
| 327 | .num_modes = 1, | ||
| 328 | .lccr0 = (LCCR0_PAS), | ||
| 329 | .lccr3 = (LCCR3_PixClkDiv(0x01) | | ||
| 330 | LCCR3_Acb(0xff)), | ||
| 331 | .cmap_inverse = 0, | ||
| 332 | .cmap_static = 0, | ||
| 333 | }; | ||
| 334 | |||
| 335 | static struct pxafb_mode_info generic_crt_800x600_mode = { | ||
| 336 | .pixclock = 28846, | ||
| 337 | .bpp = 8, | ||
| 338 | .xres = 800, | ||
| 339 | .yres = 600, | ||
| 340 | .hsync_len = 63, | ||
| 341 | .vsync_len = 2, | ||
| 342 | .left_margin = 26, | ||
| 343 | .upper_margin = 21, | ||
| 344 | .right_margin = 26, | ||
| 345 | .lower_margin = 11, | ||
| 346 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 347 | FB_SYNC_VERT_HIGH_ACT), | ||
| 348 | .cmap_greyscale = 0, | ||
| 349 | }; | ||
| 350 | |||
| 351 | static struct pxafb_mach_info generic_crt_800x600 = { | ||
| 352 | .modes = &generic_crt_800x600_mode, | ||
| 353 | .num_modes = 1, | ||
| 354 | .lccr0 = (LCCR0_PAS), | ||
| 355 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 356 | LCCR3_Acb(0xff)), | ||
| 357 | .cmap_inverse = 0, | ||
| 358 | .cmap_static = 0, | ||
| 359 | }; | ||
| 360 | |||
| 361 | static struct pxafb_mode_info generic_tft_320x240_mode = { | ||
| 362 | .pixclock = 134615, | ||
| 363 | .bpp = 16, | ||
| 364 | .xres = 320, | ||
| 365 | .yres = 240, | ||
| 366 | .hsync_len = 63, | ||
| 367 | .vsync_len = 7, | ||
| 368 | .left_margin = 75, | ||
| 369 | .upper_margin = 0, | ||
| 370 | .right_margin = 15, | ||
| 371 | .lower_margin = 15, | ||
| 372 | .sync = 0, | ||
| 373 | .cmap_greyscale = 0, | ||
| 374 | }; | ||
| 375 | |||
| 376 | static struct pxafb_mach_info generic_tft_320x240 = { | ||
| 377 | .modes = &generic_tft_320x240_mode, | ||
| 378 | .num_modes = 1, | ||
| 379 | .lccr0 = (LCCR0_PAS), | ||
| 380 | .lccr3 = (LCCR3_PixClkDiv(0x06) | | ||
| 381 | LCCR3_Acb(0xff) | | ||
| 382 | LCCR3_PCP), | ||
| 383 | .cmap_inverse = 0, | ||
| 384 | .cmap_static = 0, | ||
| 385 | }; | ||
| 386 | |||
| 387 | static struct pxafb_mode_info generic_stn_640x480_mode = { | ||
| 388 | .pixclock = 57692, | ||
| 389 | .bpp = 8, | ||
| 390 | .xres = 640, | ||
| 391 | .yres = 480, | ||
| 392 | .hsync_len = 4, | ||
| 393 | .vsync_len = 2, | ||
| 394 | .left_margin = 10, | ||
| 395 | .upper_margin = 5, | ||
| 396 | .right_margin = 10, | ||
| 397 | .lower_margin = 5, | ||
| 398 | .sync = (FB_SYNC_HOR_HIGH_ACT | | ||
| 399 | FB_SYNC_VERT_HIGH_ACT), | ||
| 400 | .cmap_greyscale = 0, | ||
| 401 | }; | ||
| 402 | |||
| 403 | static struct pxafb_mach_info generic_stn_640x480 = { | ||
| 404 | .modes = &generic_stn_640x480_mode, | ||
| 405 | .num_modes = 1, | ||
| 406 | .lccr0 = 0, | ||
| 407 | .lccr3 = (LCCR3_PixClkDiv(0x02) | | ||
| 408 | LCCR3_Acb(0xff)), | ||
| 409 | .cmap_inverse = 0, | ||
| 410 | .cmap_static = 0, | ||
| 411 | }; | ||
| 412 | |||
| 413 | static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480; | ||
| 414 | |||
| 415 | static int __init cmx270_set_display(char *str) | ||
| 416 | { | ||
| 417 | int disp_type = simple_strtol(str, NULL, 0); | ||
| 418 | switch (disp_type) { | ||
| 419 | case MTYPE_STN320x240: | ||
| 420 | cmx270_display = &generic_stn_320x240; | ||
| 421 | break; | ||
| 422 | case MTYPE_TFT640x480: | ||
| 423 | cmx270_display = &generic_tft_640x480; | ||
| 424 | break; | ||
| 425 | case MTYPE_CRT640x480: | ||
| 426 | cmx270_display = &generic_crt_640x480; | ||
| 427 | break; | ||
| 428 | case MTYPE_CRT800x600: | ||
| 429 | cmx270_display = &generic_crt_800x600; | ||
| 430 | break; | ||
| 431 | case MTYPE_TFT320x240: | ||
| 432 | cmx270_display = &generic_tft_320x240; | ||
| 433 | break; | ||
| 434 | case MTYPE_STN640x480: | ||
| 435 | cmx270_display = &generic_stn_640x480; | ||
| 436 | break; | ||
| 437 | default: /* fallback to CRT 640x480 */ | ||
| 438 | cmx270_display = &generic_crt_640x480; | ||
| 439 | break; | ||
| 440 | } | ||
| 441 | return 1; | ||
| 442 | } | ||
| 443 | |||
| 444 | /* | ||
| 445 | This should be done really early to get proper configuration for | ||
| 446 | frame buffer. | ||
| 447 | Indeed, pxafb parameters can be used istead, but CM-X270 bootloader | ||
| 448 | has limitied line length for kernel command line, and also it will | ||
| 449 | break compatibitlty with proprietary releases already in field. | ||
| 450 | */ | ||
| 451 | __setup("monitor=", cmx270_set_display); | ||
| 452 | |||
| 453 | /* PXA27x OHCI controller setup */ | ||
| 454 | static int cmx270_ohci_init(struct device *dev) | ||
| 455 | { | ||
| 456 | /* Set the Power Control Polarity Low */ | ||
| 457 | UHCHR = (UHCHR | UHCHR_PCPL) & | ||
| 458 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); | ||
| 459 | |||
| 460 | return 0; | ||
| 461 | } | ||
| 462 | |||
| 463 | static struct pxaohci_platform_data cmx270_ohci_platform_data = { | ||
| 464 | .port_mode = PMM_PERPORT_MODE, | ||
| 465 | .init = cmx270_ohci_init, | ||
| 466 | }; | ||
| 467 | |||
| 468 | |||
| 469 | static int cmx270_mci_init(struct device *dev, | ||
| 470 | irq_handler_t cmx270_detect_int, | ||
| 471 | void *data) | ||
| 472 | { | ||
| 473 | int err; | ||
| 474 | |||
| 475 | /* | ||
| 476 | * setup GPIO for PXA27x MMC controller | ||
| 477 | */ | ||
| 478 | pxa_gpio_mode(GPIO32_MMCCLK_MD); | ||
| 479 | pxa_gpio_mode(GPIO112_MMCCMD_MD); | ||
| 480 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); | ||
| 481 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); | ||
| 482 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); | ||
| 483 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); | ||
| 484 | |||
| 485 | /* SB-X270 uses GPIO105 as SD power enable */ | ||
| 486 | pxa_gpio_mode(105 | GPIO_OUT); | ||
| 487 | |||
| 488 | /* card detect IRQ on GPIO 83 */ | ||
| 489 | pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ)); | ||
| 490 | set_irq_type(CMX270_MMC_IRQ, IRQT_FALLING); | ||
| 491 | |||
| 492 | err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int, | ||
| 493 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | ||
| 494 | "MMC card detect", data); | ||
| 495 | if (err) { | ||
| 496 | printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't" | ||
| 497 | " request MMC card detect IRQ\n"); | ||
| 498 | return -1; | ||
| 499 | } | ||
| 500 | |||
| 501 | return 0; | ||
| 502 | } | ||
| 503 | |||
| 504 | static void cmx270_mci_setpower(struct device *dev, unsigned int vdd) | ||
| 505 | { | ||
| 506 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
| 507 | |||
| 508 | if ((1 << vdd) & p_d->ocr_mask) { | ||
| 509 | printk(KERN_DEBUG "%s: on\n", __FUNCTION__); | ||
| 510 | GPCR(105) = GPIO_bit(105); | ||
| 511 | } else { | ||
| 512 | GPSR(105) = GPIO_bit(105); | ||
| 513 | printk(KERN_DEBUG "%s: off\n", __FUNCTION__); | ||
| 514 | } | ||
| 515 | } | ||
| 516 | |||
| 517 | static void cmx270_mci_exit(struct device *dev, void *data) | ||
| 518 | { | ||
| 519 | free_irq(CMX270_MMC_IRQ, data); | ||
| 520 | } | ||
| 521 | |||
| 522 | static struct pxamci_platform_data cmx270_mci_platform_data = { | ||
| 523 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
| 524 | .init = cmx270_mci_init, | ||
| 525 | .setpower = cmx270_mci_setpower, | ||
| 526 | .exit = cmx270_mci_exit, | ||
| 527 | }; | ||
| 528 | |||
| 529 | #ifdef CONFIG_PM | ||
| 530 | static unsigned long sleep_save_msc[10]; | ||
| 531 | |||
| 532 | static int cmx270_suspend(struct sys_device *dev, pm_message_t state) | ||
| 533 | { | ||
| 534 | cmx270_pci_suspend(); | ||
| 535 | |||
| 536 | /* save MSC registers */ | ||
| 537 | sleep_save_msc[0] = MSC0; | ||
| 538 | sleep_save_msc[1] = MSC1; | ||
| 539 | sleep_save_msc[2] = MSC2; | ||
| 540 | |||
| 541 | /* setup power saving mode registers */ | ||
| 542 | PCFR = 0x0; | ||
| 543 | PSLR = 0xff400000; | ||
| 544 | PMCR = 0x00000005; | ||
| 545 | PWER = 0x80000000; | ||
| 546 | PFER = 0x00000000; | ||
| 547 | PRER = 0x00000000; | ||
| 548 | PGSR0 = 0xC0018800; | ||
| 549 | PGSR1 = 0x004F0002; | ||
| 550 | PGSR2 = 0x6021C000; | ||
| 551 | PGSR3 = 0x00020000; | ||
| 552 | |||
| 553 | return 0; | ||
| 554 | } | ||
| 555 | |||
| 556 | static int cmx270_resume(struct sys_device *dev) | ||
| 557 | { | ||
| 558 | cmx270_pci_resume(); | ||
| 559 | |||
| 560 | /* restore MSC registers */ | ||
| 561 | MSC0 = sleep_save_msc[0]; | ||
| 562 | MSC1 = sleep_save_msc[1]; | ||
| 563 | MSC2 = sleep_save_msc[2]; | ||
| 564 | |||
| 565 | return 0; | ||
| 566 | } | ||
| 567 | |||
| 568 | static struct sysdev_class cmx270_pm_sysclass = { | ||
| 569 | set_kset_name("pm"), | ||
| 570 | .resume = cmx270_resume, | ||
| 571 | .suspend = cmx270_suspend, | ||
| 572 | }; | ||
| 573 | |||
| 574 | static struct sys_device cmx270_pm_device = { | ||
| 575 | .cls = &cmx270_pm_sysclass, | ||
| 576 | }; | ||
| 577 | |||
| 578 | static int __init cmx270_pm_init(void) | ||
| 579 | { | ||
| 580 | int error; | ||
| 581 | error = sysdev_class_register(&cmx270_pm_sysclass); | ||
| 582 | if (error == 0) | ||
| 583 | error = sysdev_register(&cmx270_pm_device); | ||
| 584 | return error; | ||
| 585 | } | ||
| 586 | #else | ||
| 587 | static int __init cmx270_pm_init(void) { return 0; } | ||
| 588 | #endif | ||
| 589 | |||
| 590 | static void __init cmx270_init(void) | ||
| 591 | { | ||
| 592 | cmx270_pm_init(); | ||
| 593 | |||
| 594 | set_pxa_fb_info(cmx270_display); | ||
| 595 | |||
| 596 | /* register CM-X270 platform devices */ | ||
| 597 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | ||
| 598 | |||
| 599 | /* set MCI and OHCI platform parameters */ | ||
| 600 | pxa_set_mci_info(&cmx270_mci_platform_data); | ||
| 601 | pxa_set_ohci_info(&cmx270_ohci_platform_data); | ||
| 602 | |||
| 603 | /* This enables the STUART */ | ||
| 604 | pxa_gpio_mode(GPIO46_STRXD_MD); | ||
| 605 | pxa_gpio_mode(GPIO47_STTXD_MD); | ||
| 606 | |||
| 607 | /* This enables the BTUART */ | ||
| 608 | pxa_gpio_mode(GPIO42_BTRXD_MD); | ||
| 609 | pxa_gpio_mode(GPIO43_BTTXD_MD); | ||
| 610 | pxa_gpio_mode(GPIO44_BTCTS_MD); | ||
| 611 | pxa_gpio_mode(GPIO45_BTRTS_MD); | ||
| 612 | } | ||
| 613 | |||
| 614 | static void __init cmx270_init_irq(void) | ||
| 615 | { | ||
| 616 | pxa27x_init_irq(); | ||
| 617 | |||
| 618 | |||
| 619 | cmx270_pci_init_irq(); | ||
| 620 | |||
| 621 | /* Setup interrupt for dm9000 */ | ||
| 622 | pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ)); | ||
| 623 | set_irq_type(CMX270_ETHIRQ, IRQT_RISING); | ||
| 624 | |||
| 625 | /* Setup interrupt for 2700G */ | ||
| 626 | pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ)); | ||
| 627 | set_irq_type(CMX270_GFXIRQ, IRQT_FALLING); | ||
| 628 | } | ||
| 629 | |||
| 630 | static void __init cmx270_map_io(void) | ||
| 631 | { | ||
| 632 | pxa_map_io(); | ||
| 633 | iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc)); | ||
| 634 | } | ||
| 635 | |||
| 636 | |||
| 637 | MACHINE_START(ARMCORE, "Compulab CM-x270") | ||
| 638 | .boot_params = 0xa0000100, | ||
| 639 | .phys_io = 0x40000000, | ||
| 640 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 641 | .map_io = cmx270_map_io, | ||
| 642 | .init_irq = cmx270_init_irq, | ||
| 643 | .timer = &pxa_timer, | ||
| 644 | .init_machine = cmx270_init, | ||
| 645 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 636fdb1c049c..94c8d5cdd60a 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
| @@ -9,3 +9,6 @@ extern struct platform_device pxa_device_i2c; | |||
| 9 | extern struct platform_device pxa_device_i2s; | 9 | extern struct platform_device pxa_device_i2s; |
| 10 | extern struct platform_device pxa_device_ficp; | 10 | extern struct platform_device pxa_device_ficp; |
| 11 | extern struct platform_device pxa_device_rtc; | 11 | extern struct platform_device pxa_device_rtc; |
| 12 | |||
| 13 | extern struct platform_device pxa27x_device_i2c_power; | ||
| 14 | extern struct platform_device pxa27x_device_ohci; | ||
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 5510f6fdce55..1c34946ee16e 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
| @@ -25,10 +25,6 @@ | |||
| 25 | #include <linux/pm.h> | 25 | #include <linux/pm.h> |
| 26 | #include <linux/string.h> | 26 | #include <linux/string.h> |
| 27 | 27 | ||
| 28 | #include <linux/sched.h> | ||
| 29 | #include <asm/cnt32_to_63.h> | ||
| 30 | #include <asm/div64.h> | ||
| 31 | |||
| 32 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
| 33 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
| 34 | #include <asm/system.h> | 30 | #include <asm/system.h> |
| @@ -47,66 +43,39 @@ | |||
| 47 | #include "generic.h" | 43 | #include "generic.h" |
| 48 | 44 | ||
| 49 | /* | 45 | /* |
| 50 | * This is the PXA2xx sched_clock implementation. This has a resolution | 46 | * Get the clock frequency as reflected by CCCR and the turbo flag. |
| 51 | * of at least 308ns and a maximum value that depends on the value of | 47 | * We assume these values have been applied via a fcs. |
| 52 | * CLOCK_TICK_RATE. | 48 | * If info is not 0 we also display the current settings. |
| 53 | * | ||
| 54 | * The return value is guaranteed to be monotonic in that range as | ||
| 55 | * long as there is always less than 582 seconds between successive | ||
| 56 | * calls to this function. | ||
| 57 | */ | 49 | */ |
| 58 | unsigned long long sched_clock(void) | 50 | unsigned int get_clk_frequency_khz(int info) |
| 59 | { | 51 | { |
| 60 | unsigned long long v = cnt32_to_63(OSCR); | 52 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) |
| 61 | /* Note: top bit ov v needs cleared unless multiplier is even. */ | 53 | return pxa25x_get_clk_frequency_khz(info); |
| 62 | 54 | else if (cpu_is_pxa27x()) | |
| 63 | #if CLOCK_TICK_RATE == 3686400 | 55 | return pxa27x_get_clk_frequency_khz(info); |
| 64 | /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */ | 56 | else |
| 65 | /* The <<1 is used to get rid of tick.hi top bit */ | 57 | return pxa3xx_get_clk_frequency_khz(info); |
| 66 | v *= 78125<<1; | 58 | } |
| 67 | do_div(v, 288<<1); | 59 | EXPORT_SYMBOL(get_clk_frequency_khz); |
| 68 | #elif CLOCK_TICK_RATE == 3250000 | ||
| 69 | /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */ | ||
| 70 | v *= 4000; | ||
| 71 | do_div(v, 13); | ||
| 72 | #elif CLOCK_TICK_RATE == 3249600 | ||
| 73 | /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */ | ||
| 74 | v *= 625000; | ||
| 75 | do_div(v, 2031); | ||
| 76 | #else | ||
| 77 | #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE" | ||
| 78 | /* | ||
| 79 | * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for | ||
| 80 | * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand | ||
| 81 | * years range and truncation to unsigned long long limits it to | ||
| 82 | * sched_clock's max range of ~584 years. This is nice but with | ||
| 83 | * higher computation cost. | ||
| 84 | */ | ||
| 85 | { | ||
| 86 | union { | ||
| 87 | unsigned long long val; | ||
| 88 | struct { unsigned long lo, hi; }; | ||
| 89 | } x; | ||
| 90 | unsigned long long y; | ||
| 91 | |||
| 92 | x.val = v; | ||
| 93 | x.hi &= 0x7fffffff; | ||
| 94 | y = (unsigned long long)x.lo * NSEC_PER_SEC; | ||
| 95 | x.lo = y; | ||
| 96 | y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC; | ||
| 97 | x.hi = do_div(y, CLOCK_TICK_RATE); | ||
| 98 | do_div(x.val, CLOCK_TICK_RATE); | ||
| 99 | x.hi += y; | ||
| 100 | v = x.val; | ||
| 101 | } | ||
| 102 | #endif | ||
| 103 | 60 | ||
| 104 | return v; | 61 | /* |
| 62 | * Return the current memory clock frequency in units of 10kHz | ||
| 63 | */ | ||
| 64 | unsigned int get_memclk_frequency_10khz(void) | ||
| 65 | { | ||
| 66 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | ||
| 67 | return pxa25x_get_memclk_frequency_10khz(); | ||
| 68 | else if (cpu_is_pxa27x()) | ||
| 69 | return pxa27x_get_memclk_frequency_10khz(); | ||
| 70 | else | ||
| 71 | return pxa3xx_get_memclk_frequency_10khz(); | ||
| 105 | } | 72 | } |
| 73 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | ||
| 106 | 74 | ||
| 107 | /* | 75 | /* |
| 108 | * Handy function to set GPIO alternate functions | 76 | * Handy function to set GPIO alternate functions |
| 109 | */ | 77 | */ |
| 78 | int pxa_last_gpio; | ||
| 110 | 79 | ||
| 111 | int pxa_gpio_mode(int gpio_mode) | 80 | int pxa_gpio_mode(int gpio_mode) |
| 112 | { | 81 | { |
| @@ -115,7 +84,7 @@ int pxa_gpio_mode(int gpio_mode) | |||
| 115 | int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; | 84 | int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; |
| 116 | int gafr; | 85 | int gafr; |
| 117 | 86 | ||
| 118 | if (gpio > PXA_LAST_GPIO) | 87 | if (gpio > pxa_last_gpio) |
| 119 | return -EINVAL; | 88 | return -EINVAL; |
| 120 | 89 | ||
| 121 | local_irq_save(flags); | 90 | local_irq_save(flags); |
| @@ -136,6 +105,44 @@ int pxa_gpio_mode(int gpio_mode) | |||
| 136 | 105 | ||
| 137 | EXPORT_SYMBOL(pxa_gpio_mode); | 106 | EXPORT_SYMBOL(pxa_gpio_mode); |
| 138 | 107 | ||
| 108 | int gpio_direction_input(unsigned gpio) | ||
| 109 | { | ||
| 110 | unsigned long flags; | ||
| 111 | u32 mask; | ||
| 112 | |||
| 113 | if (gpio > pxa_last_gpio) | ||
| 114 | return -EINVAL; | ||
| 115 | |||
| 116 | mask = GPIO_bit(gpio); | ||
| 117 | local_irq_save(flags); | ||
| 118 | GPDR(gpio) &= ~mask; | ||
| 119 | local_irq_restore(flags); | ||
| 120 | |||
| 121 | return 0; | ||
| 122 | } | ||
| 123 | EXPORT_SYMBOL(gpio_direction_input); | ||
| 124 | |||
| 125 | int gpio_direction_output(unsigned gpio, int value) | ||
| 126 | { | ||
| 127 | unsigned long flags; | ||
| 128 | u32 mask; | ||
| 129 | |||
| 130 | if (gpio > pxa_last_gpio) | ||
| 131 | return -EINVAL; | ||
| 132 | |||
| 133 | mask = GPIO_bit(gpio); | ||
| 134 | local_irq_save(flags); | ||
| 135 | if (value) | ||
| 136 | GPSR(gpio) = mask; | ||
| 137 | else | ||
| 138 | GPCR(gpio) = mask; | ||
| 139 | GPDR(gpio) |= mask; | ||
| 140 | local_irq_restore(flags); | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | EXPORT_SYMBOL(gpio_direction_output); | ||
| 145 | |||
| 139 | /* | 146 | /* |
| 140 | * Return GPIO level | 147 | * Return GPIO level |
| 141 | */ | 148 | */ |
| @@ -159,7 +166,7 @@ EXPORT_SYMBOL(pxa_gpio_set_value); | |||
| 159 | /* | 166 | /* |
| 160 | * Routine to safely enable or disable a clock in the CKEN | 167 | * Routine to safely enable or disable a clock in the CKEN |
| 161 | */ | 168 | */ |
| 162 | void pxa_set_cken(int clock, int enable) | 169 | void __pxa_set_cken(int clock, int enable) |
| 163 | { | 170 | { |
| 164 | unsigned long flags; | 171 | unsigned long flags; |
| 165 | local_irq_save(flags); | 172 | local_irq_save(flags); |
| @@ -172,7 +179,7 @@ void pxa_set_cken(int clock, int enable) | |||
| 172 | local_irq_restore(flags); | 179 | local_irq_restore(flags); |
| 173 | } | 180 | } |
| 174 | 181 | ||
| 175 | EXPORT_SYMBOL(pxa_set_cken); | 182 | EXPORT_SYMBOL(__pxa_set_cken); |
| 176 | 183 | ||
| 177 | /* | 184 | /* |
| 178 | * Intel PXA2xx internal register mapping. | 185 | * Intel PXA2xx internal register mapping. |
| @@ -329,21 +336,80 @@ void __init set_pxa_fb_parent(struct device *parent_dev) | |||
| 329 | pxa_device_fb.dev.parent = parent_dev; | 336 | pxa_device_fb.dev.parent = parent_dev; |
| 330 | } | 337 | } |
| 331 | 338 | ||
| 339 | static struct resource pxa_resource_ffuart[] = { | ||
| 340 | { | ||
| 341 | .start = __PREG(FFUART), | ||
| 342 | .end = __PREG(FFUART) + 35, | ||
| 343 | .flags = IORESOURCE_MEM, | ||
| 344 | }, { | ||
| 345 | .start = IRQ_FFUART, | ||
| 346 | .end = IRQ_FFUART, | ||
| 347 | .flags = IORESOURCE_IRQ, | ||
| 348 | } | ||
| 349 | }; | ||
| 350 | |||
| 332 | struct platform_device pxa_device_ffuart= { | 351 | struct platform_device pxa_device_ffuart= { |
| 333 | .name = "pxa2xx-uart", | 352 | .name = "pxa2xx-uart", |
| 334 | .id = 0, | 353 | .id = 0, |
| 354 | .resource = pxa_resource_ffuart, | ||
| 355 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | ||
| 335 | }; | 356 | }; |
| 357 | |||
| 358 | static struct resource pxa_resource_btuart[] = { | ||
| 359 | { | ||
| 360 | .start = __PREG(BTUART), | ||
| 361 | .end = __PREG(BTUART) + 35, | ||
| 362 | .flags = IORESOURCE_MEM, | ||
| 363 | }, { | ||
| 364 | .start = IRQ_BTUART, | ||
| 365 | .end = IRQ_BTUART, | ||
| 366 | .flags = IORESOURCE_IRQ, | ||
| 367 | } | ||
| 368 | }; | ||
| 369 | |||
| 336 | struct platform_device pxa_device_btuart = { | 370 | struct platform_device pxa_device_btuart = { |
| 337 | .name = "pxa2xx-uart", | 371 | .name = "pxa2xx-uart", |
| 338 | .id = 1, | 372 | .id = 1, |
| 373 | .resource = pxa_resource_btuart, | ||
| 374 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | ||
| 339 | }; | 375 | }; |
| 376 | |||
| 377 | static struct resource pxa_resource_stuart[] = { | ||
| 378 | { | ||
| 379 | .start = __PREG(STUART), | ||
| 380 | .end = __PREG(STUART) + 35, | ||
| 381 | .flags = IORESOURCE_MEM, | ||
| 382 | }, { | ||
| 383 | .start = IRQ_STUART, | ||
| 384 | .end = IRQ_STUART, | ||
| 385 | .flags = IORESOURCE_IRQ, | ||
| 386 | } | ||
| 387 | }; | ||
| 388 | |||
| 340 | struct platform_device pxa_device_stuart = { | 389 | struct platform_device pxa_device_stuart = { |
| 341 | .name = "pxa2xx-uart", | 390 | .name = "pxa2xx-uart", |
| 342 | .id = 2, | 391 | .id = 2, |
| 392 | .resource = pxa_resource_stuart, | ||
| 393 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | ||
| 343 | }; | 394 | }; |
| 395 | |||
| 396 | static struct resource pxa_resource_hwuart[] = { | ||
| 397 | { | ||
| 398 | .start = __PREG(HWUART), | ||
| 399 | .end = __PREG(HWUART) + 47, | ||
| 400 | .flags = IORESOURCE_MEM, | ||
| 401 | }, { | ||
| 402 | .start = IRQ_HWUART, | ||
| 403 | .end = IRQ_HWUART, | ||
| 404 | .flags = IORESOURCE_IRQ, | ||
| 405 | } | ||
| 406 | }; | ||
| 407 | |||
| 344 | struct platform_device pxa_device_hwuart = { | 408 | struct platform_device pxa_device_hwuart = { |
| 345 | .name = "pxa2xx-uart", | 409 | .name = "pxa2xx-uart", |
| 346 | .id = 3, | 410 | .id = 3, |
| 411 | .resource = pxa_resource_hwuart, | ||
| 412 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | ||
| 347 | }; | 413 | }; |
| 348 | 414 | ||
| 349 | static struct resource pxai2c_resources[] = { | 415 | static struct resource pxai2c_resources[] = { |
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 91ab2ad8b34b..b30f240a16c7 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
| @@ -15,14 +15,40 @@ extern struct sys_timer pxa_timer; | |||
| 15 | extern void __init pxa_init_irq_low(void); | 15 | extern void __init pxa_init_irq_low(void); |
| 16 | extern void __init pxa_init_irq_high(void); | 16 | extern void __init pxa_init_irq_high(void); |
| 17 | extern void __init pxa_init_irq_gpio(int gpio_nr); | 17 | extern void __init pxa_init_irq_gpio(int gpio_nr); |
| 18 | extern void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)); | ||
| 18 | extern void __init pxa25x_init_irq(void); | 19 | extern void __init pxa25x_init_irq(void); |
| 19 | extern void __init pxa27x_init_irq(void); | 20 | extern void __init pxa27x_init_irq(void); |
| 21 | extern void __init pxa3xx_init_irq(void); | ||
| 20 | extern void __init pxa_map_io(void); | 22 | extern void __init pxa_map_io(void); |
| 21 | 23 | ||
| 22 | extern unsigned int get_clk_frequency_khz(int info); | 24 | extern unsigned int get_clk_frequency_khz(int info); |
| 25 | extern int pxa_last_gpio; | ||
| 23 | 26 | ||
| 24 | #define SET_BANK(__nr,__start,__size) \ | 27 | #define SET_BANK(__nr,__start,__size) \ |
| 25 | mi->bank[__nr].start = (__start), \ | 28 | mi->bank[__nr].start = (__start), \ |
| 26 | mi->bank[__nr].size = (__size), \ | 29 | mi->bank[__nr].size = (__size), \ |
| 27 | mi->bank[__nr].node = (((unsigned)(__start) - PHYS_OFFSET) >> 27) | 30 | mi->bank[__nr].node = (((unsigned)(__start) - PHYS_OFFSET) >> 27) |
| 28 | 31 | ||
| 32 | #ifdef CONFIG_PXA25x | ||
| 33 | extern unsigned pxa25x_get_clk_frequency_khz(int); | ||
| 34 | extern unsigned pxa25x_get_memclk_frequency_10khz(void); | ||
| 35 | #else | ||
| 36 | #define pxa25x_get_clk_frequency_khz(x) (0) | ||
| 37 | #define pxa25x_get_memclk_frequency_10khz() (0) | ||
| 38 | #endif | ||
| 39 | |||
| 40 | #ifdef CONFIG_PXA27x | ||
| 41 | extern unsigned pxa27x_get_clk_frequency_khz(int); | ||
| 42 | extern unsigned pxa27x_get_memclk_frequency_10khz(void); | ||
| 43 | #else | ||
| 44 | #define pxa27x_get_clk_frequency_khz(x) (0) | ||
| 45 | #define pxa27x_get_memclk_frequency_10khz() (0) | ||
| 46 | #endif | ||
| 47 | |||
| 48 | #ifdef CONFIG_PXA3xx | ||
| 49 | extern unsigned pxa3xx_get_clk_frequency_khz(int); | ||
| 50 | extern unsigned pxa3xx_get_memclk_frequency_10khz(void); | ||
| 51 | #else | ||
| 52 | #define pxa3xx_get_clk_frequency_khz(x) (0) | ||
| 53 | #define pxa3xx_get_memclk_frequency_10khz() (0) | ||
| 54 | #endif | ||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index ae2ae08032d7..07acb45b16ea 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
| @@ -38,33 +38,11 @@ static void pxa_unmask_low_irq(unsigned int irq) | |||
| 38 | ICMR |= (1 << irq); | 38 | ICMR |= (1 << irq); |
| 39 | } | 39 | } |
| 40 | 40 | ||
| 41 | static int pxa_set_wake(unsigned int irq, unsigned int on) | ||
| 42 | { | ||
| 43 | u32 mask; | ||
| 44 | |||
| 45 | switch (irq) { | ||
| 46 | case IRQ_RTCAlrm: | ||
| 47 | mask = PWER_RTC; | ||
| 48 | break; | ||
| 49 | #ifdef CONFIG_PXA27x | ||
| 50 | /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */ | ||
| 51 | #endif | ||
| 52 | default: | ||
| 53 | return -EINVAL; | ||
| 54 | } | ||
| 55 | if (on) | ||
| 56 | PWER |= mask; | ||
| 57 | else | ||
| 58 | PWER &= ~mask; | ||
| 59 | return 0; | ||
| 60 | } | ||
| 61 | |||
| 62 | static struct irq_chip pxa_internal_chip_low = { | 41 | static struct irq_chip pxa_internal_chip_low = { |
| 63 | .name = "SC", | 42 | .name = "SC", |
| 64 | .ack = pxa_mask_low_irq, | 43 | .ack = pxa_mask_low_irq, |
| 65 | .mask = pxa_mask_low_irq, | 44 | .mask = pxa_mask_low_irq, |
| 66 | .unmask = pxa_unmask_low_irq, | 45 | .unmask = pxa_unmask_low_irq, |
| 67 | .set_wake = pxa_set_wake, | ||
| 68 | }; | 46 | }; |
| 69 | 47 | ||
| 70 | void __init pxa_init_irq_low(void) | 48 | void __init pxa_init_irq_low(void) |
| @@ -87,7 +65,7 @@ void __init pxa_init_irq_low(void) | |||
| 87 | } | 65 | } |
| 88 | } | 66 | } |
| 89 | 67 | ||
| 90 | #ifdef CONFIG_PXA27x | 68 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
| 91 | 69 | ||
| 92 | /* | 70 | /* |
| 93 | * This is for the second set of internal IRQs as found on the PXA27x. | 71 | * This is for the second set of internal IRQs as found on the PXA27x. |
| @@ -125,26 +103,6 @@ void __init pxa_init_irq_high(void) | |||
| 125 | } | 103 | } |
| 126 | #endif | 104 | #endif |
| 127 | 105 | ||
| 128 | /* Note that if an input/irq line ever gets changed to an output during | ||
| 129 | * suspend, the relevant PWER, PRER, and PFER bits should be cleared. | ||
| 130 | */ | ||
| 131 | #ifdef CONFIG_PXA27x | ||
| 132 | |||
| 133 | /* PXA27x: Various gpios can issue wakeup events. This logic only | ||
| 134 | * handles the simple cases, not the WEMUX2 and WEMUX3 options | ||
| 135 | */ | ||
| 136 | #define PXA27x_GPIO_NOWAKE_MASK \ | ||
| 137 | ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) | ||
| 138 | #define WAKEMASK(gpio) \ | ||
| 139 | (((gpio) <= 15) \ | ||
| 140 | ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ | ||
| 141 | : ((gpio == 35) ? (1 << 24) : 0)) | ||
| 142 | #else | ||
| 143 | |||
| 144 | /* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */ | ||
| 145 | #define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0) | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /* | 106 | /* |
| 149 | * PXA GPIO edge detection for IRQs: | 107 | * PXA GPIO edge detection for IRQs: |
| 150 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. | 108 | * IRQs are generated on Falling-Edge, Rising-Edge, or both. |
| @@ -158,11 +116,9 @@ static long GPIO_IRQ_mask[4]; | |||
| 158 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | 116 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) |
| 159 | { | 117 | { |
| 160 | int gpio, idx; | 118 | int gpio, idx; |
| 161 | u32 mask; | ||
| 162 | 119 | ||
| 163 | gpio = IRQ_TO_GPIO(irq); | 120 | gpio = IRQ_TO_GPIO(irq); |
| 164 | idx = gpio >> 5; | 121 | idx = gpio >> 5; |
| 165 | mask = WAKEMASK(gpio); | ||
| 166 | 122 | ||
| 167 | if (type == IRQT_PROBE) { | 123 | if (type == IRQT_PROBE) { |
| 168 | /* Don't mess with enabled GPIOs using preconfigured edges or | 124 | /* Don't mess with enabled GPIOs using preconfigured edges or |
| @@ -182,19 +138,15 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
| 182 | if (type & __IRQT_RISEDGE) { | 138 | if (type & __IRQT_RISEDGE) { |
| 183 | /* printk("rising "); */ | 139 | /* printk("rising "); */ |
| 184 | __set_bit (gpio, GPIO_IRQ_rising_edge); | 140 | __set_bit (gpio, GPIO_IRQ_rising_edge); |
| 185 | PRER |= mask; | ||
| 186 | } else { | 141 | } else { |
| 187 | __clear_bit (gpio, GPIO_IRQ_rising_edge); | 142 | __clear_bit (gpio, GPIO_IRQ_rising_edge); |
| 188 | PRER &= ~mask; | ||
| 189 | } | 143 | } |
| 190 | 144 | ||
| 191 | if (type & __IRQT_FALEDGE) { | 145 | if (type & __IRQT_FALEDGE) { |
| 192 | /* printk("falling "); */ | 146 | /* printk("falling "); */ |
| 193 | __set_bit (gpio, GPIO_IRQ_falling_edge); | 147 | __set_bit (gpio, GPIO_IRQ_falling_edge); |
| 194 | PFER |= mask; | ||
| 195 | } else { | 148 | } else { |
| 196 | __clear_bit (gpio, GPIO_IRQ_falling_edge); | 149 | __clear_bit (gpio, GPIO_IRQ_falling_edge); |
| 197 | PFER &= ~mask; | ||
| 198 | } | 150 | } |
| 199 | 151 | ||
| 200 | /* printk("edges\n"); */ | 152 | /* printk("edges\n"); */ |
| @@ -213,29 +165,12 @@ static void pxa_ack_low_gpio(unsigned int irq) | |||
| 213 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | 165 | GEDR0 = (1 << (irq - IRQ_GPIO0)); |
| 214 | } | 166 | } |
| 215 | 167 | ||
| 216 | static int pxa_set_gpio_wake(unsigned int irq, unsigned int on) | ||
| 217 | { | ||
| 218 | int gpio = IRQ_TO_GPIO(irq); | ||
| 219 | u32 mask = WAKEMASK(gpio); | ||
| 220 | |||
| 221 | if (!mask) | ||
| 222 | return -EINVAL; | ||
| 223 | |||
| 224 | if (on) | ||
| 225 | PWER |= mask; | ||
| 226 | else | ||
| 227 | PWER &= ~mask; | ||
| 228 | return 0; | ||
| 229 | } | ||
| 230 | |||
| 231 | |||
| 232 | static struct irq_chip pxa_low_gpio_chip = { | 168 | static struct irq_chip pxa_low_gpio_chip = { |
| 233 | .name = "GPIO-l", | 169 | .name = "GPIO-l", |
| 234 | .ack = pxa_ack_low_gpio, | 170 | .ack = pxa_ack_low_gpio, |
| 235 | .mask = pxa_mask_low_irq, | 171 | .mask = pxa_mask_low_irq, |
| 236 | .unmask = pxa_unmask_low_irq, | 172 | .unmask = pxa_unmask_low_irq, |
| 237 | .set_type = pxa_gpio_irq_type, | 173 | .set_type = pxa_gpio_irq_type, |
| 238 | .set_wake = pxa_set_gpio_wake, | ||
| 239 | }; | 174 | }; |
| 240 | 175 | ||
| 241 | /* | 176 | /* |
| @@ -342,13 +277,14 @@ static struct irq_chip pxa_muxed_gpio_chip = { | |||
| 342 | .mask = pxa_mask_muxed_gpio, | 277 | .mask = pxa_mask_muxed_gpio, |
| 343 | .unmask = pxa_unmask_muxed_gpio, | 278 | .unmask = pxa_unmask_muxed_gpio, |
| 344 | .set_type = pxa_gpio_irq_type, | 279 | .set_type = pxa_gpio_irq_type, |
| 345 | .set_wake = pxa_set_gpio_wake, | ||
| 346 | }; | 280 | }; |
| 347 | 281 | ||
| 348 | void __init pxa_init_irq_gpio(int gpio_nr) | 282 | void __init pxa_init_irq_gpio(int gpio_nr) |
| 349 | { | 283 | { |
| 350 | int irq, i; | 284 | int irq, i; |
| 351 | 285 | ||
| 286 | pxa_last_gpio = gpio_nr - 1; | ||
| 287 | |||
| 352 | /* clear all GPIO edge detects */ | 288 | /* clear all GPIO edge detects */ |
| 353 | for (i = 0; i < gpio_nr; i += 32) { | 289 | for (i = 0; i < gpio_nr; i += 32) { |
| 354 | GFER(i) = 0; | 290 | GFER(i) = 0; |
| @@ -375,3 +311,13 @@ void __init pxa_init_irq_gpio(int gpio_nr) | |||
| 375 | set_irq_chip(IRQ_GPIO_2_x, &pxa_internal_chip_low); | 311 | set_irq_chip(IRQ_GPIO_2_x, &pxa_internal_chip_low); |
| 376 | set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); | 312 | set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); |
| 377 | } | 313 | } |
| 314 | |||
| 315 | void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)) | ||
| 316 | { | ||
| 317 | pxa_internal_chip_low.set_wake = set_wake; | ||
| 318 | #ifdef CONFIG_PXA27x | ||
| 319 | pxa_internal_chip_high.set_wake = set_wake; | ||
| 320 | #endif | ||
| 321 | pxa_low_gpio_chip.set_wake = set_wake; | ||
| 322 | pxa_muxed_gpio_chip.set_wake = set_wake; | ||
| 323 | } | ||
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index e70048fd00a5..011a1a72b61c 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
| @@ -512,6 +512,25 @@ static void __init lubbock_map_io(void) | |||
| 512 | pxa_gpio_mode(GPIO44_BTCTS_MD); | 512 | pxa_gpio_mode(GPIO44_BTCTS_MD); |
| 513 | pxa_gpio_mode(GPIO45_BTRTS_MD); | 513 | pxa_gpio_mode(GPIO45_BTRTS_MD); |
| 514 | 514 | ||
| 515 | GPSR(GPIO48_nPOE) = | ||
| 516 | GPIO_bit(GPIO48_nPOE) | | ||
| 517 | GPIO_bit(GPIO49_nPWE) | | ||
| 518 | GPIO_bit(GPIO50_nPIOR) | | ||
| 519 | GPIO_bit(GPIO51_nPIOW) | | ||
| 520 | GPIO_bit(GPIO52_nPCE_1) | | ||
| 521 | GPIO_bit(GPIO53_nPCE_2); | ||
| 522 | |||
| 523 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 524 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 525 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 526 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 527 | pxa_gpio_mode(GPIO52_nPCE_1_MD); | ||
| 528 | pxa_gpio_mode(GPIO53_nPCE_2_MD); | ||
| 529 | pxa_gpio_mode(GPIO54_pSKTSEL_MD); | ||
| 530 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 531 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 532 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 533 | |||
| 515 | /* This is for the SMC chip select */ | 534 | /* This is for the SMC chip select */ |
| 516 | pxa_gpio_mode(GPIO79_nCS_3_MD); | 535 | pxa_gpio_mode(GPIO79_nCS_3_MD); |
| 517 | 536 | ||
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index b02c79c7e6a3..a4bc3483cbb3 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
| @@ -444,6 +444,25 @@ static void __init mainstone_init(void) | |||
| 444 | */ | 444 | */ |
| 445 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); | 445 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); |
| 446 | 446 | ||
| 447 | GPSR(GPIO48_nPOE) = | ||
| 448 | GPIO_bit(GPIO48_nPOE) | | ||
| 449 | GPIO_bit(GPIO49_nPWE) | | ||
| 450 | GPIO_bit(GPIO50_nPIOR) | | ||
| 451 | GPIO_bit(GPIO51_nPIOW) | | ||
| 452 | GPIO_bit(GPIO85_nPCE_1) | | ||
| 453 | GPIO_bit(GPIO54_nPCE_2); | ||
| 454 | |||
| 455 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 456 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 457 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 458 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 459 | pxa_gpio_mode(GPIO85_nPCE_1_MD); | ||
| 460 | pxa_gpio_mode(GPIO54_nPCE_2_MD); | ||
| 461 | pxa_gpio_mode(GPIO79_pSKTSEL_MD); | ||
| 462 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 463 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 464 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 465 | |||
| 447 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 466 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
| 448 | 467 | ||
| 449 | /* reading Mainstone's "Virtual Configuration Register" | 468 | /* reading Mainstone's "Virtual Configuration Register" |
diff --git a/arch/arm/mach-pxa/mfp.c b/arch/arm/mach-pxa/mfp.c new file mode 100644 index 000000000000..5cd3cadbbd10 --- /dev/null +++ b/arch/arm/mach-pxa/mfp.c | |||
| @@ -0,0 +1,235 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/mfp.c | ||
| 3 | * | ||
| 4 | * PXA3xx Multi-Function Pin Support | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell Internation Ltd. | ||
| 7 | * | ||
| 8 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | |||
| 21 | #include <asm/hardware.h> | ||
| 22 | #include <asm/arch/mfp.h> | ||
| 23 | |||
| 24 | /* mfp_spin_lock is used to ensure that MFP register configuration | ||
| 25 | * (most likely a read-modify-write operation) is atomic, and that | ||
| 26 | * mfp_table[] is consistent | ||
| 27 | */ | ||
| 28 | static DEFINE_SPINLOCK(mfp_spin_lock); | ||
| 29 | |||
| 30 | static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); | ||
| 31 | static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; | ||
| 32 | |||
| 33 | #define mfpr_readl(off) \ | ||
| 34 | __raw_readl(mfpr_mmio_base + (off)) | ||
| 35 | |||
| 36 | #define mfpr_writel(off, val) \ | ||
| 37 | __raw_writel(val, mfpr_mmio_base + (off)) | ||
| 38 | |||
| 39 | /* | ||
| 40 | * perform a read-back of any MFPR register to make sure the | ||
| 41 | * previous writings are finished | ||
| 42 | */ | ||
| 43 | #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) | ||
| 44 | |||
| 45 | static inline void __mfp_config(int pin, unsigned long val) | ||
| 46 | { | ||
| 47 | unsigned long off = mfp_table[pin].mfpr_off; | ||
| 48 | |||
| 49 | mfp_table[pin].mfpr_val = val; | ||
| 50 | mfpr_writel(off, val); | ||
| 51 | } | ||
| 52 | |||
| 53 | void pxa3xx_mfp_config(mfp_cfg_t *mfp_cfgs, int num) | ||
| 54 | { | ||
| 55 | int i, pin; | ||
| 56 | unsigned long val, flags; | ||
| 57 | mfp_cfg_t *mfp_cfg = mfp_cfgs; | ||
| 58 | |||
| 59 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 60 | |||
| 61 | for (i = 0; i < num; i++, mfp_cfg++) { | ||
| 62 | pin = MFP_CFG_PIN(*mfp_cfg); | ||
| 63 | val = MFP_CFG_VAL(*mfp_cfg); | ||
| 64 | |||
| 65 | BUG_ON(pin >= MFP_PIN_MAX); | ||
| 66 | |||
| 67 | __mfp_config(pin, val); | ||
| 68 | } | ||
| 69 | |||
| 70 | mfpr_sync(); | ||
| 71 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 72 | } | ||
| 73 | |||
| 74 | unsigned long pxa3xx_mfp_read(int mfp) | ||
| 75 | { | ||
| 76 | unsigned long val, flags; | ||
| 77 | |||
| 78 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 79 | |||
| 80 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 81 | val = mfpr_readl(mfp_table[mfp].mfpr_off); | ||
| 82 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 83 | |||
| 84 | return val; | ||
| 85 | } | ||
| 86 | |||
| 87 | void pxa3xx_mfp_write(int mfp, unsigned long val) | ||
| 88 | { | ||
| 89 | unsigned long flags; | ||
| 90 | |||
| 91 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 92 | |||
| 93 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 94 | mfpr_writel(mfp_table[mfp].mfpr_off, val); | ||
| 95 | mfpr_sync(); | ||
| 96 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 97 | } | ||
| 98 | |||
| 99 | void pxa3xx_mfp_set_afds(int mfp, int af, int ds) | ||
| 100 | { | ||
| 101 | uint32_t mfpr_off, mfpr_val; | ||
| 102 | unsigned long flags; | ||
| 103 | |||
| 104 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 105 | |||
| 106 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 107 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
| 108 | |||
| 109 | mfpr_val = mfpr_readl(mfpr_off); | ||
| 110 | mfpr_val &= ~(MFPR_AF_MASK | MFPR_DRV_MASK); | ||
| 111 | mfpr_val |= (((af & 0x7) << MFPR_ALT_OFFSET) | | ||
| 112 | ((ds & 0x7) << MFPR_DRV_OFFSET)); | ||
| 113 | |||
| 114 | mfpr_writel(mfpr_off, mfpr_val); | ||
| 115 | mfpr_sync(); | ||
| 116 | |||
| 117 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 118 | } | ||
| 119 | |||
| 120 | void pxa3xx_mfp_set_rdh(int mfp, int rdh) | ||
| 121 | { | ||
| 122 | uint32_t mfpr_off, mfpr_val; | ||
| 123 | unsigned long flags; | ||
| 124 | |||
| 125 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 126 | |||
| 127 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 128 | |||
| 129 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
| 130 | |||
| 131 | mfpr_val = mfpr_readl(mfpr_off); | ||
| 132 | mfpr_val &= ~MFPR_RDH_MASK; | ||
| 133 | |||
| 134 | if (likely(rdh)) | ||
| 135 | mfpr_val |= (1u << MFPR_SS_OFFSET); | ||
| 136 | |||
| 137 | mfpr_writel(mfpr_off, mfpr_val); | ||
| 138 | mfpr_sync(); | ||
| 139 | |||
| 140 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 141 | } | ||
| 142 | |||
| 143 | void pxa3xx_mfp_set_lpm(int mfp, int lpm) | ||
| 144 | { | ||
| 145 | uint32_t mfpr_off, mfpr_val; | ||
| 146 | unsigned long flags; | ||
| 147 | |||
| 148 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 149 | |||
| 150 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 151 | |||
| 152 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
| 153 | mfpr_val = mfpr_readl(mfpr_off); | ||
| 154 | mfpr_val &= ~MFPR_LPM_MASK; | ||
| 155 | |||
| 156 | if (lpm & 0x1) mfpr_val |= 1u << MFPR_SON_OFFSET; | ||
| 157 | if (lpm & 0x2) mfpr_val |= 1u << MFPR_SD_OFFSET; | ||
| 158 | if (lpm & 0x4) mfpr_val |= 1u << MFPR_PU_OFFSET; | ||
| 159 | if (lpm & 0x8) mfpr_val |= 1u << MFPR_PD_OFFSET; | ||
| 160 | if (lpm &0x10) mfpr_val |= 1u << MFPR_PS_OFFSET; | ||
| 161 | |||
| 162 | mfpr_writel(mfpr_off, mfpr_val); | ||
| 163 | mfpr_sync(); | ||
| 164 | |||
| 165 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 166 | } | ||
| 167 | |||
| 168 | void pxa3xx_mfp_set_pull(int mfp, int pull) | ||
| 169 | { | ||
| 170 | uint32_t mfpr_off, mfpr_val; | ||
| 171 | unsigned long flags; | ||
| 172 | |||
| 173 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 174 | |||
| 175 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 176 | |||
| 177 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
| 178 | mfpr_val = mfpr_readl(mfpr_off); | ||
| 179 | mfpr_val &= ~MFPR_PULL_MASK; | ||
| 180 | mfpr_val |= ((pull & 0x7u) << MFPR_PD_OFFSET); | ||
| 181 | |||
| 182 | mfpr_writel(mfpr_off, mfpr_val); | ||
| 183 | mfpr_sync(); | ||
| 184 | |||
| 185 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 186 | } | ||
| 187 | |||
| 188 | void pxa3xx_mfp_set_edge(int mfp, int edge) | ||
| 189 | { | ||
| 190 | uint32_t mfpr_off, mfpr_val; | ||
| 191 | unsigned long flags; | ||
| 192 | |||
| 193 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
| 194 | |||
| 195 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 196 | |||
| 197 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
| 198 | mfpr_val = mfpr_readl(mfpr_off); | ||
| 199 | |||
| 200 | mfpr_val &= ~MFPR_EDGE_MASK; | ||
| 201 | mfpr_val |= (edge & 0x3u) << MFPR_ERE_OFFSET; | ||
| 202 | mfpr_val |= (!edge & 0x1) << MFPR_EC_OFFSET; | ||
| 203 | |||
| 204 | mfpr_writel(mfpr_off, mfpr_val); | ||
| 205 | mfpr_sync(); | ||
| 206 | |||
| 207 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 208 | } | ||
| 209 | |||
| 210 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) | ||
| 211 | { | ||
| 212 | struct pxa3xx_mfp_addr_map *p; | ||
| 213 | unsigned long offset, flags; | ||
| 214 | int i; | ||
| 215 | |||
| 216 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
| 217 | |||
| 218 | for (p = map; p->start != MFP_PIN_INVALID; p++) { | ||
| 219 | offset = p->offset; | ||
| 220 | i = p->start; | ||
| 221 | |||
| 222 | do { | ||
| 223 | mfp_table[i].mfpr_off = offset; | ||
| 224 | mfp_table[i].mfpr_val = 0; | ||
| 225 | offset += 4; i++; | ||
| 226 | } while ((i <= p->end) && (p->end != -1)); | ||
| 227 | } | ||
| 228 | |||
| 229 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
| 230 | } | ||
| 231 | |||
| 232 | void __init pxa3xx_init_mfp(void) | ||
| 233 | { | ||
| 234 | memset(mfp_table, 0, sizeof(mfp_table)); | ||
| 235 | } | ||
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 6dfcca72e90f..0d6a72504caa 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | 30 | ||
| 31 | #include "generic.h" | 31 | #include "generic.h" |
| 32 | #include "devices.h" | 32 | #include "devices.h" |
| 33 | #include "clock.h" | ||
| 33 | 34 | ||
| 34 | /* | 35 | /* |
| 35 | * Various clock factors driven by the CCCR register. | 36 | * Various clock factors driven by the CCCR register. |
| @@ -53,7 +54,7 @@ static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 }; | |||
| 53 | * We assume these values have been applied via a fcs. | 54 | * We assume these values have been applied via a fcs. |
| 54 | * If info is not 0 we also display the current settings. | 55 | * If info is not 0 we also display the current settings. |
| 55 | */ | 56 | */ |
| 56 | unsigned int get_clk_frequency_khz(int info) | 57 | unsigned int pxa25x_get_clk_frequency_khz(int info) |
| 57 | { | 58 | { |
| 58 | unsigned long cccr, turbo; | 59 | unsigned long cccr, turbo; |
| 59 | unsigned int l, L, m, M, n2, N; | 60 | unsigned int l, L, m, M, n2, N; |
| @@ -86,27 +87,48 @@ unsigned int get_clk_frequency_khz(int info) | |||
| 86 | return (turbo & 1) ? (N/1000) : (M/1000); | 87 | return (turbo & 1) ? (N/1000) : (M/1000); |
| 87 | } | 88 | } |
| 88 | 89 | ||
| 89 | EXPORT_SYMBOL(get_clk_frequency_khz); | ||
| 90 | |||
| 91 | /* | 90 | /* |
| 92 | * Return the current memory clock frequency in units of 10kHz | 91 | * Return the current memory clock frequency in units of 10kHz |
| 93 | */ | 92 | */ |
| 94 | unsigned int get_memclk_frequency_10khz(void) | 93 | unsigned int pxa25x_get_memclk_frequency_10khz(void) |
| 95 | { | 94 | { |
| 96 | return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; | 95 | return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; |
| 97 | } | 96 | } |
| 98 | 97 | ||
| 99 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | 98 | static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk) |
| 100 | |||
| 101 | /* | ||
| 102 | * Return the current LCD clock frequency in units of 10kHz | ||
| 103 | */ | ||
| 104 | unsigned int get_lcdclk_frequency_10khz(void) | ||
| 105 | { | 99 | { |
| 106 | return get_memclk_frequency_10khz(); | 100 | return pxa25x_get_memclk_frequency_10khz() * 10000; |
| 107 | } | 101 | } |
| 108 | 102 | ||
| 109 | EXPORT_SYMBOL(get_lcdclk_frequency_10khz); | 103 | static const struct clkops clk_pxa25x_lcd_ops = { |
| 104 | .enable = clk_cken_enable, | ||
| 105 | .disable = clk_cken_disable, | ||
| 106 | .getrate = clk_pxa25x_lcd_getrate, | ||
| 107 | }; | ||
| 108 | |||
| 109 | /* | ||
| 110 | * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz) | ||
| 111 | * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz | ||
| 112 | * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) | ||
| 113 | */ | ||
| 114 | static struct clk pxa25x_clks[] = { | ||
| 115 | INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), | ||
| 116 | INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), | ||
| 117 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), | ||
| 118 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), | ||
| 119 | INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), | ||
| 120 | INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), | ||
| 121 | INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), | ||
| 122 | INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), | ||
| 123 | /* | ||
| 124 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | ||
| 125 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | ||
| 126 | INIT_CKEN("SSPCLK", SSP, 3686400, 0, NULL), | ||
| 127 | INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), | ||
| 128 | INIT_CKEN("NSSPCLK", NSSP, 3686400, 0, NULL), | ||
| 129 | */ | ||
| 130 | INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), | ||
| 131 | }; | ||
| 110 | 132 | ||
| 111 | #ifdef CONFIG_PM | 133 | #ifdef CONFIG_PM |
| 112 | 134 | ||
| @@ -205,10 +227,52 @@ static void __init pxa25x_init_pm(void) | |||
| 205 | } | 227 | } |
| 206 | #endif | 228 | #endif |
| 207 | 229 | ||
| 230 | /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm | ||
| 231 | */ | ||
| 232 | |||
| 233 | static int pxa25x_set_wake(unsigned int irq, unsigned int on) | ||
| 234 | { | ||
| 235 | int gpio = IRQ_TO_GPIO(irq); | ||
| 236 | uint32_t gpio_bit, mask = 0; | ||
| 237 | |||
| 238 | if (gpio >= 0 && gpio <= 15) { | ||
| 239 | gpio_bit = GPIO_bit(gpio); | ||
| 240 | mask = gpio_bit; | ||
| 241 | if (on) { | ||
| 242 | if (GRER(gpio) | gpio_bit) | ||
| 243 | PRER |= gpio_bit; | ||
| 244 | else | ||
| 245 | PRER &= ~gpio_bit; | ||
| 246 | |||
| 247 | if (GFER(gpio) | gpio_bit) | ||
| 248 | PFER |= gpio_bit; | ||
| 249 | else | ||
| 250 | PFER &= ~gpio_bit; | ||
| 251 | } | ||
| 252 | goto set_pwer; | ||
| 253 | } | ||
| 254 | |||
| 255 | if (irq == IRQ_RTCAlrm) { | ||
| 256 | mask = PWER_RTC; | ||
| 257 | goto set_pwer; | ||
| 258 | } | ||
| 259 | |||
| 260 | return -EINVAL; | ||
| 261 | |||
| 262 | set_pwer: | ||
| 263 | if (on) | ||
| 264 | PWER |= mask; | ||
| 265 | else | ||
| 266 | PWER &=~mask; | ||
| 267 | |||
| 268 | return 0; | ||
| 269 | } | ||
| 270 | |||
| 208 | void __init pxa25x_init_irq(void) | 271 | void __init pxa25x_init_irq(void) |
| 209 | { | 272 | { |
| 210 | pxa_init_irq_low(); | 273 | pxa_init_irq_low(); |
| 211 | pxa_init_irq_gpio(85); | 274 | pxa_init_irq_gpio(85); |
| 275 | pxa_init_irq_set_wake(pxa25x_set_wake); | ||
| 212 | } | 276 | } |
| 213 | 277 | ||
| 214 | static struct platform_device *pxa25x_devices[] __initdata = { | 278 | static struct platform_device *pxa25x_devices[] __initdata = { |
| @@ -229,6 +293,8 @@ static int __init pxa25x_init(void) | |||
| 229 | int ret = 0; | 293 | int ret = 0; |
| 230 | 294 | ||
| 231 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) { | 295 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) { |
| 296 | clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); | ||
| 297 | |||
| 232 | if ((ret = pxa_init_dma(16))) | 298 | if ((ret = pxa_init_dma(16))) |
| 233 | return ret; | 299 | return ret; |
| 234 | #ifdef CONFIG_PM | 300 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 203371ab19db..2d7fc39732e4 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | 27 | ||
| 28 | #include "generic.h" | 28 | #include "generic.h" |
| 29 | #include "devices.h" | 29 | #include "devices.h" |
| 30 | #include "clock.h" | ||
| 30 | 31 | ||
| 31 | /* Crystal clock: 13MHz */ | 32 | /* Crystal clock: 13MHz */ |
| 32 | #define BASE_CLK 13000000 | 33 | #define BASE_CLK 13000000 |
| @@ -36,7 +37,7 @@ | |||
| 36 | * We assume these values have been applied via a fcs. | 37 | * We assume these values have been applied via a fcs. |
| 37 | * If info is not 0 we also display the current settings. | 38 | * If info is not 0 we also display the current settings. |
| 38 | */ | 39 | */ |
| 39 | unsigned int get_clk_frequency_khz( int info) | 40 | unsigned int pxa27x_get_clk_frequency_khz(int info) |
| 40 | { | 41 | { |
| 41 | unsigned long ccsr, clkcfg; | 42 | unsigned long ccsr, clkcfg; |
| 42 | unsigned int l, L, m, M, n2, N, S; | 43 | unsigned int l, L, m, M, n2, N, S; |
| @@ -79,7 +80,7 @@ unsigned int get_clk_frequency_khz( int info) | |||
| 79 | * Return the current mem clock frequency in units of 10kHz as | 80 | * Return the current mem clock frequency in units of 10kHz as |
| 80 | * reflected by CCCR[A], B, and L | 81 | * reflected by CCCR[A], B, and L |
| 81 | */ | 82 | */ |
| 82 | unsigned int get_memclk_frequency_10khz(void) | 83 | unsigned int pxa27x_get_memclk_frequency_10khz(void) |
| 83 | { | 84 | { |
| 84 | unsigned long ccsr, clkcfg; | 85 | unsigned long ccsr, clkcfg; |
| 85 | unsigned int l, L, m, M; | 86 | unsigned int l, L, m, M; |
| @@ -104,7 +105,7 @@ unsigned int get_memclk_frequency_10khz(void) | |||
| 104 | /* | 105 | /* |
| 105 | * Return the current LCD clock frequency in units of 10kHz as | 106 | * Return the current LCD clock frequency in units of 10kHz as |
| 106 | */ | 107 | */ |
| 107 | unsigned int get_lcdclk_frequency_10khz(void) | 108 | static unsigned int pxa27x_get_lcdclk_frequency_10khz(void) |
| 108 | { | 109 | { |
| 109 | unsigned long ccsr; | 110 | unsigned long ccsr; |
| 110 | unsigned int l, L, k, K; | 111 | unsigned int l, L, k, K; |
| @@ -120,9 +121,47 @@ unsigned int get_lcdclk_frequency_10khz(void) | |||
| 120 | return (K / 10000); | 121 | return (K / 10000); |
| 121 | } | 122 | } |
| 122 | 123 | ||
| 123 | EXPORT_SYMBOL(get_clk_frequency_khz); | 124 | static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk) |
| 124 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | 125 | { |
| 125 | EXPORT_SYMBOL(get_lcdclk_frequency_10khz); | 126 | return pxa27x_get_lcdclk_frequency_10khz() * 10000; |
| 127 | } | ||
| 128 | |||
| 129 | static const struct clkops clk_pxa27x_lcd_ops = { | ||
| 130 | .enable = clk_cken_enable, | ||
| 131 | .disable = clk_cken_disable, | ||
| 132 | .getrate = clk_pxa27x_lcd_getrate, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct clk pxa27x_clks[] = { | ||
| 136 | INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev), | ||
| 137 | INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL), | ||
| 138 | |||
| 139 | INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), | ||
| 140 | INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), | ||
| 141 | INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), | ||
| 142 | |||
| 143 | INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), | ||
| 144 | INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), | ||
| 145 | INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev), | ||
| 146 | INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), | ||
| 147 | INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), | ||
| 148 | |||
| 149 | INIT_CKEN("USBCLK", USB, 48000000, 0, &pxa27x_device_ohci.dev), | ||
| 150 | INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), | ||
| 151 | INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), | ||
| 152 | |||
| 153 | /* | ||
| 154 | INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), | ||
| 155 | INIT_CKEN("SSPCLK", SSP1, 13000000, 0, NULL), | ||
| 156 | INIT_CKEN("SSPCLK", SSP2, 13000000, 0, NULL), | ||
| 157 | INIT_CKEN("SSPCLK", SSP3, 13000000, 0, NULL), | ||
| 158 | INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), | ||
| 159 | INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), | ||
| 160 | INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), | ||
| 161 | INIT_CKEN("IMCLK", IM, 0, 0, NULL), | ||
| 162 | INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL), | ||
| 163 | */ | ||
| 164 | }; | ||
| 126 | 165 | ||
| 127 | #ifdef CONFIG_PM | 166 | #ifdef CONFIG_PM |
| 128 | 167 | ||
| @@ -267,6 +306,69 @@ static void __init pxa27x_init_pm(void) | |||
| 267 | } | 306 | } |
| 268 | #endif | 307 | #endif |
| 269 | 308 | ||
| 309 | /* PXA27x: Various gpios can issue wakeup events. This logic only | ||
| 310 | * handles the simple cases, not the WEMUX2 and WEMUX3 options | ||
| 311 | */ | ||
| 312 | #define PXA27x_GPIO_NOWAKE_MASK \ | ||
| 313 | ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) | ||
| 314 | #define WAKEMASK(gpio) \ | ||
| 315 | (((gpio) <= 15) \ | ||
| 316 | ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ | ||
| 317 | : ((gpio == 35) ? (1 << 24) : 0)) | ||
| 318 | |||
| 319 | static int pxa27x_set_wake(unsigned int irq, unsigned int on) | ||
| 320 | { | ||
| 321 | int gpio = IRQ_TO_GPIO(irq); | ||
| 322 | uint32_t mask; | ||
| 323 | |||
| 324 | if ((gpio >= 0 && gpio <= 15) || (gpio == 35)) { | ||
| 325 | if (WAKEMASK(gpio) == 0) | ||
| 326 | return -EINVAL; | ||
| 327 | |||
| 328 | mask = WAKEMASK(gpio); | ||
| 329 | |||
| 330 | if (on) { | ||
| 331 | if (GRER(gpio) | GPIO_bit(gpio)) | ||
| 332 | PRER |= mask; | ||
| 333 | else | ||
| 334 | PRER &= ~mask; | ||
| 335 | |||
| 336 | if (GFER(gpio) | GPIO_bit(gpio)) | ||
| 337 | PFER |= mask; | ||
| 338 | else | ||
| 339 | PFER &= ~mask; | ||
| 340 | } | ||
| 341 | goto set_pwer; | ||
| 342 | } | ||
| 343 | |||
| 344 | switch (irq) { | ||
| 345 | case IRQ_RTCAlrm: | ||
| 346 | mask = PWER_RTC; | ||
| 347 | break; | ||
| 348 | case IRQ_USB: | ||
| 349 | mask = 1u << 26; | ||
| 350 | break; | ||
| 351 | default: | ||
| 352 | return -EINVAL; | ||
| 353 | } | ||
| 354 | |||
| 355 | set_pwer: | ||
| 356 | if (on) | ||
| 357 | PWER |= mask; | ||
| 358 | else | ||
| 359 | PWER &=~mask; | ||
| 360 | |||
| 361 | return 0; | ||
| 362 | } | ||
| 363 | |||
| 364 | void __init pxa27x_init_irq(void) | ||
| 365 | { | ||
| 366 | pxa_init_irq_low(); | ||
| 367 | pxa_init_irq_high(); | ||
| 368 | pxa_init_irq_gpio(128); | ||
| 369 | pxa_init_irq_set_wake(pxa27x_set_wake); | ||
| 370 | } | ||
| 371 | |||
| 270 | /* | 372 | /* |
| 271 | * device registration specific to PXA27x. | 373 | * device registration specific to PXA27x. |
| 272 | */ | 374 | */ |
| @@ -286,7 +388,7 @@ static struct resource pxa27x_ohci_resources[] = { | |||
| 286 | }, | 388 | }, |
| 287 | }; | 389 | }; |
| 288 | 390 | ||
| 289 | static struct platform_device pxa27x_device_ohci = { | 391 | struct platform_device pxa27x_device_ohci = { |
| 290 | .name = "pxa27x-ohci", | 392 | .name = "pxa27x-ohci", |
| 291 | .id = -1, | 393 | .id = -1, |
| 292 | .dev = { | 394 | .dev = { |
| @@ -314,7 +416,7 @@ static struct resource i2c_power_resources[] = { | |||
| 314 | }, | 416 | }, |
| 315 | }; | 417 | }; |
| 316 | 418 | ||
| 317 | static struct platform_device pxa27x_device_i2c_power = { | 419 | struct platform_device pxa27x_device_i2c_power = { |
| 318 | .name = "pxa2xx-i2c", | 420 | .name = "pxa2xx-i2c", |
| 319 | .id = 1, | 421 | .id = 1, |
| 320 | .resource = i2c_power_resources, | 422 | .resource = i2c_power_resources, |
| @@ -336,17 +438,12 @@ static struct platform_device *devices[] __initdata = { | |||
| 336 | &pxa27x_device_ohci, | 438 | &pxa27x_device_ohci, |
| 337 | }; | 439 | }; |
| 338 | 440 | ||
| 339 | void __init pxa27x_init_irq(void) | ||
| 340 | { | ||
| 341 | pxa_init_irq_low(); | ||
| 342 | pxa_init_irq_high(); | ||
| 343 | pxa_init_irq_gpio(128); | ||
| 344 | } | ||
| 345 | |||
| 346 | static int __init pxa27x_init(void) | 441 | static int __init pxa27x_init(void) |
| 347 | { | 442 | { |
| 348 | int ret = 0; | 443 | int ret = 0; |
| 349 | if (cpu_is_pxa27x()) { | 444 | if (cpu_is_pxa27x()) { |
| 445 | clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); | ||
| 446 | |||
| 350 | if ((ret = pxa_init_dma(32))) | 447 | if ((ret = pxa_init_dma(32))) |
| 351 | return ret; | 448 | return ret; |
| 352 | #ifdef CONFIG_PM | 449 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c new file mode 100644 index 000000000000..5363b1322652 --- /dev/null +++ b/arch/arm/mach-pxa/pxa300.c | |||
| @@ -0,0 +1,93 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/pxa300.c | ||
| 3 | * | ||
| 4 | * Code specific to PXA300/PXA310 | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell Internation Ltd. | ||
| 7 | * | ||
| 8 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | |||
| 19 | #include <asm/hardware.h> | ||
| 20 | #include <asm/arch/mfp-pxa300.h> | ||
| 21 | |||
| 22 | static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { | ||
| 23 | |||
| 24 | MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), | ||
| 25 | MFP_ADDR_X(GPIO3, GPIO26, 0x027c), | ||
| 26 | MFP_ADDR_X(GPIO27, GPIO127, 0x0400), | ||
| 27 | MFP_ADDR_X(GPIO0_2, GPIO6_2, 0x02ec), | ||
| 28 | |||
| 29 | MFP_ADDR(nBE0, 0x0204), | ||
| 30 | MFP_ADDR(nBE1, 0x0208), | ||
| 31 | |||
| 32 | MFP_ADDR(nLUA, 0x0244), | ||
| 33 | MFP_ADDR(nLLA, 0x0254), | ||
| 34 | |||
| 35 | MFP_ADDR(DF_CLE_nOE, 0x0240), | ||
| 36 | MFP_ADDR(DF_nRE_nOE, 0x0200), | ||
| 37 | MFP_ADDR(DF_ALE_nWE, 0x020C), | ||
| 38 | MFP_ADDR(DF_INT_RnB, 0x00C8), | ||
| 39 | MFP_ADDR(DF_nCS0, 0x0248), | ||
| 40 | MFP_ADDR(DF_nCS1, 0x0278), | ||
| 41 | MFP_ADDR(DF_nWE, 0x00CC), | ||
| 42 | |||
| 43 | MFP_ADDR(DF_ADDR0, 0x0210), | ||
| 44 | MFP_ADDR(DF_ADDR1, 0x0214), | ||
| 45 | MFP_ADDR(DF_ADDR2, 0x0218), | ||
| 46 | MFP_ADDR(DF_ADDR3, 0x021C), | ||
| 47 | |||
| 48 | MFP_ADDR(DF_IO0, 0x0220), | ||
| 49 | MFP_ADDR(DF_IO1, 0x0228), | ||
| 50 | MFP_ADDR(DF_IO2, 0x0230), | ||
| 51 | MFP_ADDR(DF_IO3, 0x0238), | ||
| 52 | MFP_ADDR(DF_IO4, 0x0258), | ||
| 53 | MFP_ADDR(DF_IO5, 0x0260), | ||
| 54 | MFP_ADDR(DF_IO6, 0x0268), | ||
| 55 | MFP_ADDR(DF_IO7, 0x0270), | ||
| 56 | MFP_ADDR(DF_IO8, 0x0224), | ||
| 57 | MFP_ADDR(DF_IO9, 0x022C), | ||
| 58 | MFP_ADDR(DF_IO10, 0x0234), | ||
| 59 | MFP_ADDR(DF_IO11, 0x023C), | ||
| 60 | MFP_ADDR(DF_IO12, 0x025C), | ||
| 61 | MFP_ADDR(DF_IO13, 0x0264), | ||
| 62 | MFP_ADDR(DF_IO14, 0x026C), | ||
| 63 | MFP_ADDR(DF_IO15, 0x0274), | ||
| 64 | |||
| 65 | MFP_ADDR_END, | ||
| 66 | }; | ||
| 67 | |||
| 68 | /* override pxa300 MFP register addresses */ | ||
| 69 | static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { | ||
| 70 | MFP_ADDR_X(GPIO30, GPIO98, 0x0418), | ||
| 71 | MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C), | ||
| 72 | |||
| 73 | MFP_ADDR(ULPI_STP, 0x040C), | ||
| 74 | MFP_ADDR(ULPI_NXT, 0x0410), | ||
| 75 | MFP_ADDR(ULPI_DIR, 0x0414), | ||
| 76 | |||
| 77 | MFP_ADDR_END, | ||
| 78 | }; | ||
| 79 | |||
| 80 | static int __init pxa300_init(void) | ||
| 81 | { | ||
| 82 | if (cpu_is_pxa300() || cpu_is_pxa310()) { | ||
| 83 | pxa3xx_init_mfp(); | ||
| 84 | pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); | ||
| 85 | } | ||
| 86 | |||
| 87 | if (cpu_is_pxa310()) | ||
| 88 | pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); | ||
| 89 | |||
| 90 | return 0; | ||
| 91 | } | ||
| 92 | |||
| 93 | core_initcall(pxa300_init); | ||
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c new file mode 100644 index 000000000000..cd9eba5b3df9 --- /dev/null +++ b/arch/arm/mach-pxa/pxa320.c | |||
| @@ -0,0 +1,88 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/pxa320.c | ||
| 3 | * | ||
| 4 | * Code specific to PXA320 | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell Internation Ltd. | ||
| 7 | * | ||
| 8 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | |||
| 19 | #include <asm/hardware.h> | ||
| 20 | #include <asm/arch/mfp.h> | ||
| 21 | #include <asm/arch/mfp-pxa320.h> | ||
| 22 | |||
| 23 | static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { | ||
| 24 | |||
| 25 | MFP_ADDR_X(GPIO0, GPIO4, 0x0124), | ||
| 26 | MFP_ADDR_X(GPIO5, GPIO26, 0x028C), | ||
| 27 | MFP_ADDR_X(GPIO27, GPIO62, 0x0400), | ||
| 28 | MFP_ADDR_X(GPIO63, GPIO73, 0x04B4), | ||
| 29 | MFP_ADDR_X(GPIO74, GPIO98, 0x04F0), | ||
| 30 | MFP_ADDR_X(GPIO99, GPIO127, 0x0600), | ||
| 31 | MFP_ADDR_X(GPIO0_2, GPIO5_2, 0x0674), | ||
| 32 | MFP_ADDR_X(GPIO6_2, GPIO13_2, 0x0494), | ||
| 33 | MFP_ADDR_X(GPIO14_2, GPIO17_2, 0x04E0), | ||
| 34 | |||
| 35 | MFP_ADDR(nXCVREN, 0x0138), | ||
| 36 | MFP_ADDR(DF_CLE_nOE, 0x0204), | ||
| 37 | MFP_ADDR(DF_nADV1_ALE, 0x0208), | ||
| 38 | MFP_ADDR(DF_SCLK_S, 0x020C), | ||
| 39 | MFP_ADDR(DF_SCLK_E, 0x0210), | ||
| 40 | MFP_ADDR(nBE0, 0x0214), | ||
| 41 | MFP_ADDR(nBE1, 0x0218), | ||
| 42 | MFP_ADDR(DF_nADV2_ALE, 0x021C), | ||
| 43 | MFP_ADDR(DF_INT_RnB, 0x0220), | ||
| 44 | MFP_ADDR(DF_nCS0, 0x0224), | ||
| 45 | MFP_ADDR(DF_nCS1, 0x0228), | ||
| 46 | MFP_ADDR(DF_nWE, 0x022C), | ||
| 47 | MFP_ADDR(DF_nRE_nOE, 0x0230), | ||
| 48 | MFP_ADDR(nLUA, 0x0234), | ||
| 49 | MFP_ADDR(nLLA, 0x0238), | ||
| 50 | MFP_ADDR(DF_ADDR0, 0x023C), | ||
| 51 | MFP_ADDR(DF_ADDR1, 0x0240), | ||
| 52 | MFP_ADDR(DF_ADDR2, 0x0244), | ||
| 53 | MFP_ADDR(DF_ADDR3, 0x0248), | ||
| 54 | MFP_ADDR(DF_IO0, 0x024C), | ||
| 55 | MFP_ADDR(DF_IO8, 0x0250), | ||
| 56 | MFP_ADDR(DF_IO1, 0x0254), | ||
| 57 | MFP_ADDR(DF_IO9, 0x0258), | ||
| 58 | MFP_ADDR(DF_IO2, 0x025C), | ||
| 59 | MFP_ADDR(DF_IO10, 0x0260), | ||
| 60 | MFP_ADDR(DF_IO3, 0x0264), | ||
| 61 | MFP_ADDR(DF_IO11, 0x0268), | ||
| 62 | MFP_ADDR(DF_IO4, 0x026C), | ||
| 63 | MFP_ADDR(DF_IO12, 0x0270), | ||
| 64 | MFP_ADDR(DF_IO5, 0x0274), | ||
| 65 | MFP_ADDR(DF_IO13, 0x0278), | ||
| 66 | MFP_ADDR(DF_IO6, 0x027C), | ||
| 67 | MFP_ADDR(DF_IO14, 0x0280), | ||
| 68 | MFP_ADDR(DF_IO7, 0x0284), | ||
| 69 | MFP_ADDR(DF_IO15, 0x0288), | ||
| 70 | |||
| 71 | MFP_ADDR_END, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static void __init pxa320_init_mfp(void) | ||
| 75 | { | ||
| 76 | pxa3xx_init_mfp(); | ||
| 77 | pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); | ||
| 78 | } | ||
| 79 | |||
| 80 | static int __init pxa320_init(void) | ||
| 81 | { | ||
| 82 | if (cpu_is_pxa320()) | ||
| 83 | pxa320_init_mfp(); | ||
| 84 | |||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | |||
| 88 | core_initcall(pxa320_init); | ||
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c new file mode 100644 index 000000000000..39f0de8c189e --- /dev/null +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
| @@ -0,0 +1,216 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/pxa3xx.c | ||
| 3 | * | ||
| 4 | * code specific to pxa3xx aka Monahans | ||
| 5 | * | ||
| 6 | * Copyright (C) 2006 Marvell International Ltd. | ||
| 7 | * | ||
| 8 | * 2007-09-02: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/pm.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/irq.h> | ||
| 22 | |||
| 23 | #include <asm/hardware.h> | ||
| 24 | #include <asm/arch/pxa3xx-regs.h> | ||
| 25 | #include <asm/arch/ohci.h> | ||
| 26 | #include <asm/arch/pm.h> | ||
| 27 | #include <asm/arch/dma.h> | ||
| 28 | #include <asm/arch/ssp.h> | ||
| 29 | |||
| 30 | #include "generic.h" | ||
| 31 | #include "devices.h" | ||
| 32 | #include "clock.h" | ||
| 33 | |||
| 34 | /* Crystal clock: 13MHz */ | ||
| 35 | #define BASE_CLK 13000000 | ||
| 36 | |||
| 37 | /* Ring Oscillator Clock: 60MHz */ | ||
| 38 | #define RO_CLK 60000000 | ||
| 39 | |||
| 40 | #define ACCR_D0CS (1 << 26) | ||
| 41 | |||
| 42 | /* crystal frequency to static memory controller multiplier (SMCFS) */ | ||
| 43 | static unsigned char smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, }; | ||
| 44 | |||
| 45 | /* crystal frequency to HSIO bus frequency multiplier (HSS) */ | ||
| 46 | static unsigned char hss_mult[4] = { 8, 12, 16, 0 }; | ||
| 47 | |||
| 48 | /* | ||
| 49 | * Get the clock frequency as reflected by CCSR and the turbo flag. | ||
| 50 | * We assume these values have been applied via a fcs. | ||
| 51 | * If info is not 0 we also display the current settings. | ||
| 52 | */ | ||
| 53 | unsigned int pxa3xx_get_clk_frequency_khz(int info) | ||
| 54 | { | ||
| 55 | unsigned long acsr, xclkcfg; | ||
| 56 | unsigned int t, xl, xn, hss, ro, XL, XN, CLK, HSS; | ||
| 57 | |||
| 58 | /* Read XCLKCFG register turbo bit */ | ||
| 59 | __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg)); | ||
| 60 | t = xclkcfg & 0x1; | ||
| 61 | |||
| 62 | acsr = ACSR; | ||
| 63 | |||
| 64 | xl = acsr & 0x1f; | ||
| 65 | xn = (acsr >> 8) & 0x7; | ||
| 66 | hss = (acsr >> 14) & 0x3; | ||
| 67 | |||
| 68 | XL = xl * BASE_CLK; | ||
| 69 | XN = xn * XL; | ||
| 70 | |||
| 71 | ro = acsr & ACCR_D0CS; | ||
| 72 | |||
| 73 | CLK = (ro) ? RO_CLK : ((t) ? XN : XL); | ||
| 74 | HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK; | ||
| 75 | |||
| 76 | if (info) { | ||
| 77 | pr_info("RO Mode clock: %d.%02dMHz (%sactive)\n", | ||
| 78 | RO_CLK / 1000000, (RO_CLK % 1000000) / 10000, | ||
| 79 | (ro) ? "" : "in"); | ||
| 80 | pr_info("Run Mode clock: %d.%02dMHz (*%d)\n", | ||
| 81 | XL / 1000000, (XL % 1000000) / 10000, xl); | ||
| 82 | pr_info("Turbo Mode clock: %d.%02dMHz (*%d, %sactive)\n", | ||
| 83 | XN / 1000000, (XN % 1000000) / 10000, xn, | ||
| 84 | (t) ? "" : "in"); | ||
| 85 | pr_info("HSIO bus clock: %d.%02dMHz\n", | ||
| 86 | HSS / 1000000, (HSS % 1000000) / 10000); | ||
| 87 | } | ||
| 88 | |||
| 89 | return CLK; | ||
| 90 | } | ||
| 91 | |||
| 92 | /* | ||
| 93 | * Return the current static memory controller clock frequency | ||
| 94 | * in units of 10kHz | ||
| 95 | */ | ||
| 96 | unsigned int pxa3xx_get_memclk_frequency_10khz(void) | ||
| 97 | { | ||
| 98 | unsigned long acsr; | ||
| 99 | unsigned int smcfs, clk = 0; | ||
| 100 | |||
| 101 | acsr = ACSR; | ||
| 102 | |||
| 103 | smcfs = (acsr >> 23) & 0x7; | ||
| 104 | clk = (acsr & ACCR_D0CS) ? RO_CLK : smcfs_mult[smcfs] * BASE_CLK; | ||
| 105 | |||
| 106 | return (clk / 10000); | ||
| 107 | } | ||
| 108 | |||
| 109 | /* | ||
| 110 | * Return the current HSIO bus clock frequency | ||
| 111 | */ | ||
| 112 | static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk) | ||
| 113 | { | ||
| 114 | unsigned long acsr; | ||
| 115 | unsigned int hss, hsio_clk; | ||
| 116 | |||
| 117 | acsr = ACSR; | ||
| 118 | |||
| 119 | hss = (acsr >> 14) & 0x3; | ||
| 120 | hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK; | ||
| 121 | |||
| 122 | return hsio_clk; | ||
| 123 | } | ||
| 124 | |||
| 125 | static void clk_pxa3xx_cken_enable(struct clk *clk) | ||
| 126 | { | ||
| 127 | unsigned long mask = 1ul << (clk->cken & 0x1f); | ||
| 128 | |||
| 129 | local_irq_disable(); | ||
| 130 | |||
| 131 | if (clk->cken < 32) | ||
| 132 | CKENA |= mask; | ||
| 133 | else | ||
| 134 | CKENB |= mask; | ||
| 135 | |||
| 136 | local_irq_enable(); | ||
| 137 | } | ||
| 138 | |||
| 139 | static void clk_pxa3xx_cken_disable(struct clk *clk) | ||
| 140 | { | ||
| 141 | unsigned long mask = 1ul << (clk->cken & 0x1f); | ||
| 142 | |||
| 143 | local_irq_disable(); | ||
| 144 | |||
| 145 | if (clk->cken < 32) | ||
| 146 | CKENA &= ~mask; | ||
| 147 | else | ||
| 148 | CKENB &= ~mask; | ||
| 149 | |||
| 150 | local_irq_enable(); | ||
| 151 | } | ||
| 152 | |||
| 153 | static const struct clkops clk_pxa3xx_hsio_ops = { | ||
| 154 | .enable = clk_pxa3xx_cken_enable, | ||
| 155 | .disable = clk_pxa3xx_cken_disable, | ||
| 156 | .getrate = clk_pxa3xx_hsio_getrate, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static struct clk pxa3xx_clks[] = { | ||
| 160 | INIT_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), | ||
| 161 | INIT_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), | ||
| 162 | |||
| 163 | INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), | ||
| 164 | INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), | ||
| 165 | INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), | ||
| 166 | |||
| 167 | INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), | ||
| 168 | INIT_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), | ||
| 169 | }; | ||
| 170 | |||
| 171 | void __init pxa3xx_init_irq(void) | ||
| 172 | { | ||
| 173 | /* enable CP6 access */ | ||
| 174 | u32 value; | ||
| 175 | __asm__ __volatile__("mrc p15, 0, %0, c15, c1, 0\n": "=r"(value)); | ||
| 176 | value |= (1 << 6); | ||
| 177 | __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); | ||
| 178 | |||
| 179 | pxa_init_irq_low(); | ||
| 180 | pxa_init_irq_high(); | ||
| 181 | pxa_init_irq_gpio(128); | ||
| 182 | } | ||
| 183 | |||
| 184 | /* | ||
| 185 | * device registration specific to PXA3xx. | ||
| 186 | */ | ||
| 187 | |||
| 188 | static struct platform_device *devices[] __initdata = { | ||
| 189 | &pxa_device_mci, | ||
| 190 | &pxa_device_udc, | ||
| 191 | &pxa_device_fb, | ||
| 192 | &pxa_device_ffuart, | ||
| 193 | &pxa_device_btuart, | ||
| 194 | &pxa_device_stuart, | ||
| 195 | &pxa_device_i2c, | ||
| 196 | &pxa_device_i2s, | ||
| 197 | &pxa_device_ficp, | ||
| 198 | &pxa_device_rtc, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static int __init pxa3xx_init(void) | ||
| 202 | { | ||
| 203 | int ret = 0; | ||
| 204 | |||
| 205 | if (cpu_is_pxa3xx()) { | ||
| 206 | clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); | ||
| 207 | |||
| 208 | if ((ret = pxa_init_dma(32))) | ||
| 209 | return ret; | ||
| 210 | |||
| 211 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
| 212 | } | ||
| 213 | return 0; | ||
| 214 | } | ||
| 215 | |||
| 216 | subsys_initcall(pxa3xx_init); | ||
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 98d27e646b09..ec4286c7931c 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
| @@ -16,10 +16,48 @@ | |||
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/clockchips.h> | 18 | #include <linux/clockchips.h> |
| 19 | #include <linux/sched.h> | ||
| 19 | 20 | ||
| 21 | #include <asm/div64.h> | ||
| 22 | #include <asm/cnt32_to_63.h> | ||
| 20 | #include <asm/mach/irq.h> | 23 | #include <asm/mach/irq.h> |
| 21 | #include <asm/mach/time.h> | 24 | #include <asm/mach/time.h> |
| 22 | #include <asm/arch/pxa-regs.h> | 25 | #include <asm/arch/pxa-regs.h> |
| 26 | #include <asm/mach-types.h> | ||
| 27 | |||
| 28 | /* | ||
| 29 | * This is PXA's sched_clock implementation. This has a resolution | ||
| 30 | * of at least 308 ns and a maximum value of 208 days. | ||
| 31 | * | ||
| 32 | * The return value is guaranteed to be monotonic in that range as | ||
| 33 | * long as there is always less than 582 seconds between successive | ||
| 34 | * calls to sched_clock() which should always be the case in practice. | ||
| 35 | */ | ||
| 36 | |||
| 37 | #define OSCR2NS_SCALE_FACTOR 10 | ||
| 38 | |||
| 39 | static unsigned long oscr2ns_scale; | ||
| 40 | |||
| 41 | static void __init set_oscr2ns_scale(unsigned long oscr_rate) | ||
| 42 | { | ||
| 43 | unsigned long long v = 1000000000ULL << OSCR2NS_SCALE_FACTOR; | ||
| 44 | do_div(v, oscr_rate); | ||
| 45 | oscr2ns_scale = v; | ||
| 46 | /* | ||
| 47 | * We want an even value to automatically clear the top bit | ||
| 48 | * returned by cnt32_to_63() without an additional run time | ||
| 49 | * instruction. So if the LSB is 1 then round it up. | ||
| 50 | */ | ||
| 51 | if (oscr2ns_scale & 1) | ||
| 52 | oscr2ns_scale++; | ||
| 53 | } | ||
| 54 | |||
| 55 | unsigned long long sched_clock(void) | ||
| 56 | { | ||
| 57 | unsigned long long v = cnt32_to_63(OSCR); | ||
| 58 | return (v * oscr2ns_scale) >> OSCR2NS_SCALE_FACTOR; | ||
| 59 | } | ||
| 60 | |||
| 23 | 61 | ||
| 24 | static irqreturn_t | 62 | static irqreturn_t |
| 25 | pxa_ost0_interrupt(int irq, void *dev_id) | 63 | pxa_ost0_interrupt(int irq, void *dev_id) |
| @@ -149,18 +187,29 @@ static struct irqaction pxa_ost0_irq = { | |||
| 149 | 187 | ||
| 150 | static void __init pxa_timer_init(void) | 188 | static void __init pxa_timer_init(void) |
| 151 | { | 189 | { |
| 190 | unsigned long clock_tick_rate; | ||
| 191 | |||
| 152 | OIER = 0; | 192 | OIER = 0; |
| 153 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 193 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
| 154 | 194 | ||
| 195 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) | ||
| 196 | clock_tick_rate = 3686400; | ||
| 197 | else if (machine_is_mainstone()) | ||
| 198 | clock_tick_rate = 3249600; | ||
| 199 | else | ||
| 200 | clock_tick_rate = 3250000; | ||
| 201 | |||
| 202 | set_oscr2ns_scale(clock_tick_rate); | ||
| 203 | |||
| 155 | ckevt_pxa_osmr0.mult = | 204 | ckevt_pxa_osmr0.mult = |
| 156 | div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); | 205 | div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); |
| 157 | ckevt_pxa_osmr0.max_delta_ns = | 206 | ckevt_pxa_osmr0.max_delta_ns = |
| 158 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); | 207 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); |
| 159 | ckevt_pxa_osmr0.min_delta_ns = | 208 | ckevt_pxa_osmr0.min_delta_ns = |
| 160 | clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; | 209 | clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; |
| 161 | 210 | ||
| 162 | cksrc_pxa_oscr0.mult = | 211 | cksrc_pxa_oscr0.mult = |
| 163 | clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift); | 212 | clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift); |
| 164 | 213 | ||
| 165 | setup_irq(IRQ_OST0, &pxa_ost0_irq); | 214 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
| 166 | 215 | ||
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c new file mode 100644 index 000000000000..3f18d760dd1b --- /dev/null +++ b/arch/arm/mach-pxa/zylonite.c | |||
| @@ -0,0 +1,184 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/zylonite.c | ||
| 3 | * | ||
| 4 | * Support for the PXA3xx Development Platform (aka Zylonite) | ||
| 5 | * | ||
| 6 | * Copyright (C) 2006 Marvell International Ltd. | ||
| 7 | * | ||
| 8 | * 2007-09-04: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * rewrite to align with latest kernel | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | |||
| 22 | #include <asm/mach-types.h> | ||
| 23 | #include <asm/mach/arch.h> | ||
| 24 | #include <asm/hardware.h> | ||
| 25 | #include <asm/arch/gpio.h> | ||
| 26 | #include <asm/arch/pxafb.h> | ||
| 27 | #include <asm/arch/zylonite.h> | ||
| 28 | |||
| 29 | #include "generic.h" | ||
| 30 | |||
| 31 | int gpio_backlight; | ||
| 32 | int gpio_eth_irq; | ||
| 33 | |||
| 34 | int lcd_id; | ||
| 35 | int lcd_orientation; | ||
| 36 | |||
| 37 | static struct resource smc91x_resources[] = { | ||
| 38 | [0] = { | ||
| 39 | .start = ZYLONITE_ETH_PHYS + 0x300, | ||
| 40 | .end = ZYLONITE_ETH_PHYS + 0xfffff, | ||
| 41 | .flags = IORESOURCE_MEM, | ||
| 42 | }, | ||
| 43 | [1] = { | ||
| 44 | .start = -1, /* for run-time assignment */ | ||
| 45 | .end = -1, | ||
| 46 | .flags = IORESOURCE_IRQ, | ||
| 47 | } | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct platform_device smc91x_device = { | ||
| 51 | .name = "smc91x", | ||
| 52 | .id = 0, | ||
| 53 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 54 | .resource = smc91x_resources, | ||
| 55 | }; | ||
| 56 | |||
| 57 | #if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULES) | ||
| 58 | static void zylonite_backlight_power(int on) | ||
| 59 | { | ||
| 60 | gpio_set_value(gpio_backlight, on); | ||
| 61 | } | ||
| 62 | |||
| 63 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { | ||
| 64 | .pixclock = 110000, | ||
| 65 | .xres = 240, | ||
| 66 | .yres = 320, | ||
| 67 | .bpp = 16, | ||
| 68 | .hsync_len = 4, | ||
| 69 | .left_margin = 6, | ||
| 70 | .right_margin = 4, | ||
| 71 | .vsync_len = 2, | ||
| 72 | .upper_margin = 2, | ||
| 73 | .lower_margin = 3, | ||
| 74 | .sync = FB_SYNC_VERT_HIGH_ACT, | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { | ||
| 78 | .pixclock = 50000, | ||
| 79 | .xres = 640, | ||
| 80 | .yres = 480, | ||
| 81 | .bpp = 16, | ||
| 82 | .hsync_len = 1, | ||
| 83 | .left_margin = 0x9f, | ||
| 84 | .right_margin = 1, | ||
| 85 | .vsync_len = 44, | ||
| 86 | .upper_margin = 0, | ||
| 87 | .lower_margin = 0, | ||
| 88 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
| 89 | }; | ||
| 90 | |||
| 91 | static struct pxafb_mach_info zylonite_toshiba_lcd_info = { | ||
| 92 | .num_modes = 1, | ||
| 93 | .lccr0 = LCCR0_Act, | ||
| 94 | .lccr3 = LCCR3_PCP, | ||
| 95 | .pxafb_backlight_power = zylonite_backlight_power, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct pxafb_mode_info sharp_ls037_modes[] = { | ||
| 99 | [0] = { | ||
| 100 | .pixclock = 158000, | ||
| 101 | .xres = 240, | ||
| 102 | .yres = 320, | ||
| 103 | .bpp = 16, | ||
| 104 | .hsync_len = 4, | ||
| 105 | .left_margin = 39, | ||
| 106 | .right_margin = 39, | ||
| 107 | .vsync_len = 1, | ||
| 108 | .upper_margin = 2, | ||
| 109 | .lower_margin = 3, | ||
| 110 | .sync = 0, | ||
| 111 | }, | ||
| 112 | [1] = { | ||
| 113 | .pixclock = 39700, | ||
| 114 | .xres = 480, | ||
| 115 | .yres = 640, | ||
| 116 | .bpp = 16, | ||
| 117 | .hsync_len = 8, | ||
| 118 | .left_margin = 81, | ||
| 119 | .right_margin = 81, | ||
| 120 | .vsync_len = 1, | ||
| 121 | .upper_margin = 2, | ||
| 122 | .lower_margin = 7, | ||
| 123 | .sync = 0, | ||
| 124 | }, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static struct pxafb_mach_info zylonite_sharp_lcd_info = { | ||
| 128 | .modes = sharp_ls037_modes, | ||
| 129 | .num_modes = 2, | ||
| 130 | .lccr0 = LCCR0_Act, | ||
| 131 | .lccr3 = LCCR3_PCP | LCCR3_HSP | LCCR3_VSP, | ||
| 132 | .pxafb_backlight_power = zylonite_backlight_power, | ||
| 133 | }; | ||
| 134 | |||
| 135 | static void __init zylonite_init_lcd(void) | ||
| 136 | { | ||
| 137 | /* backlight GPIO: output, default on */ | ||
| 138 | gpio_direction_output(gpio_backlight, 1); | ||
| 139 | |||
| 140 | if (lcd_id & 0x20) { | ||
| 141 | set_pxa_fb_info(&zylonite_sharp_lcd_info); | ||
| 142 | return; | ||
| 143 | } | ||
| 144 | |||
| 145 | /* legacy LCD panels, it would be handy here if LCD panel type can | ||
| 146 | * be decided at run-time | ||
| 147 | */ | ||
| 148 | if (1) | ||
| 149 | zylonite_toshiba_lcd_info.modes = &toshiba_ltm035a776c_mode; | ||
| 150 | else | ||
| 151 | zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; | ||
| 152 | |||
| 153 | set_pxa_fb_info(&zylonite_toshiba_lcd_info); | ||
| 154 | } | ||
| 155 | #else | ||
| 156 | static inline void zylonite_init_lcd(void) {} | ||
| 157 | #endif | ||
| 158 | |||
| 159 | static void __init zylonite_init(void) | ||
| 160 | { | ||
| 161 | /* board-processor specific initialization */ | ||
| 162 | zylonite_pxa300_init(); | ||
| 163 | zylonite_pxa320_init(); | ||
| 164 | |||
| 165 | /* | ||
| 166 | * Note: We depend that the bootloader set | ||
| 167 | * the correct value to MSC register for SMC91x. | ||
| 168 | */ | ||
| 169 | smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq); | ||
| 170 | smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); | ||
| 171 | platform_device_register(&smc91x_device); | ||
| 172 | |||
| 173 | zylonite_init_lcd(); | ||
| 174 | } | ||
| 175 | |||
| 176 | MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") | ||
| 177 | .phys_io = 0x40000000, | ||
| 178 | .boot_params = 0xa0000100, | ||
| 179 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
| 180 | .map_io = pxa_map_io, | ||
| 181 | .init_irq = pxa3xx_init_irq, | ||
| 182 | .timer = &pxa_timer, | ||
| 183 | .init_machine = zylonite_init, | ||
| 184 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c new file mode 100644 index 000000000000..b5fbd2f4c693 --- /dev/null +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
| @@ -0,0 +1,188 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/zylonite_pxa300.c | ||
| 3 | * | ||
| 4 | * PXA300/PXA310 specific support code for the | ||
| 5 | * PXA3xx Development Platform (aka Zylonite) | ||
| 6 | * | ||
| 7 | * Copyright (C) 2007 Marvell Internation Ltd. | ||
| 8 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | |||
| 20 | #include <asm/gpio.h> | ||
| 21 | #include <asm/arch/mfp-pxa300.h> | ||
| 22 | #include <asm/arch/zylonite.h> | ||
| 23 | |||
| 24 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
| 25 | |||
| 26 | /* PXA300/PXA310 common configurations */ | ||
| 27 | static mfp_cfg_t common_mfp_cfg[] __initdata = { | ||
| 28 | /* LCD */ | ||
| 29 | GPIO54_LCD_LDD_0, | ||
| 30 | GPIO55_LCD_LDD_1, | ||
| 31 | GPIO56_LCD_LDD_2, | ||
| 32 | GPIO57_LCD_LDD_3, | ||
| 33 | GPIO58_LCD_LDD_4, | ||
| 34 | GPIO59_LCD_LDD_5, | ||
| 35 | GPIO60_LCD_LDD_6, | ||
| 36 | GPIO61_LCD_LDD_7, | ||
| 37 | GPIO62_LCD_LDD_8, | ||
| 38 | GPIO63_LCD_LDD_9, | ||
| 39 | GPIO64_LCD_LDD_10, | ||
| 40 | GPIO65_LCD_LDD_11, | ||
| 41 | GPIO66_LCD_LDD_12, | ||
| 42 | GPIO67_LCD_LDD_13, | ||
| 43 | GPIO68_LCD_LDD_14, | ||
| 44 | GPIO69_LCD_LDD_15, | ||
| 45 | GPIO70_LCD_LDD_16, | ||
| 46 | GPIO71_LCD_LDD_17, | ||
| 47 | GPIO72_LCD_FCLK, | ||
| 48 | GPIO73_LCD_LCLK, | ||
| 49 | GPIO74_LCD_PCLK, | ||
| 50 | GPIO75_LCD_BIAS, | ||
| 51 | GPIO76_LCD_VSYNC, | ||
| 52 | GPIO127_LCD_CS_N, | ||
| 53 | |||
| 54 | /* BTUART */ | ||
| 55 | GPIO111_UART2_RTS, | ||
| 56 | GPIO112_UART2_RXD, | ||
| 57 | GPIO113_UART2_TXD, | ||
| 58 | GPIO114_UART2_CTS, | ||
| 59 | |||
| 60 | /* STUART */ | ||
| 61 | GPIO109_UART3_TXD, | ||
| 62 | GPIO110_UART3_RXD, | ||
| 63 | |||
| 64 | /* AC97 */ | ||
| 65 | GPIO23_AC97_nACRESET, | ||
| 66 | GPIO24_AC97_SYSCLK, | ||
| 67 | GPIO29_AC97_BITCLK, | ||
| 68 | GPIO25_AC97_SDATA_IN_0, | ||
| 69 | GPIO27_AC97_SDATA_OUT, | ||
| 70 | GPIO28_AC97_SYNC, | ||
| 71 | |||
| 72 | /* Keypad */ | ||
| 73 | GPIO107_KP_DKIN_0, | ||
| 74 | GPIO108_KP_DKIN_1, | ||
| 75 | GPIO115_KP_MKIN_0, | ||
| 76 | GPIO116_KP_MKIN_1, | ||
| 77 | GPIO117_KP_MKIN_2, | ||
| 78 | GPIO118_KP_MKIN_3, | ||
| 79 | GPIO119_KP_MKIN_4, | ||
| 80 | GPIO120_KP_MKIN_5, | ||
| 81 | GPIO2_2_KP_MKIN_6, | ||
| 82 | GPIO3_2_KP_MKIN_7, | ||
| 83 | GPIO121_KP_MKOUT_0, | ||
| 84 | GPIO122_KP_MKOUT_1, | ||
| 85 | GPIO123_KP_MKOUT_2, | ||
| 86 | GPIO124_KP_MKOUT_3, | ||
| 87 | GPIO125_KP_MKOUT_4, | ||
| 88 | GPIO4_2_KP_MKOUT_5, | ||
| 89 | GPIO5_2_KP_MKOUT_6, | ||
| 90 | GPIO6_2_KP_MKOUT_7, | ||
| 91 | }; | ||
| 92 | |||
| 93 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | ||
| 94 | /* FFUART */ | ||
| 95 | GPIO30_UART1_RXD, | ||
| 96 | GPIO31_UART1_TXD, | ||
| 97 | GPIO32_UART1_CTS, | ||
| 98 | GPIO37_UART1_RTS, | ||
| 99 | GPIO33_UART1_DCD, | ||
| 100 | GPIO34_UART1_DSR, | ||
| 101 | GPIO35_UART1_RI, | ||
| 102 | GPIO36_UART1_DTR, | ||
| 103 | |||
| 104 | /* Ethernet */ | ||
| 105 | GPIO2_nCS3, | ||
| 106 | GPIO99_GPIO, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { | ||
| 110 | /* FFUART */ | ||
| 111 | GPIO99_UART1_RXD, | ||
| 112 | GPIO100_UART1_TXD, | ||
| 113 | GPIO101_UART1_CTS, | ||
| 114 | GPIO106_UART1_RTS, | ||
| 115 | |||
| 116 | /* Ethernet */ | ||
| 117 | GPIO2_nCS3, | ||
| 118 | GPIO102_GPIO, | ||
| 119 | }; | ||
| 120 | |||
| 121 | #define NUM_LCD_DETECT_PINS 7 | ||
| 122 | |||
| 123 | static int lcd_detect_pins[] __initdata = { | ||
| 124 | MFP_PIN_GPIO71, /* LCD_LDD_17 - ORIENT */ | ||
| 125 | MFP_PIN_GPIO70, /* LCD_LDD_16 - LCDID[5] */ | ||
| 126 | MFP_PIN_GPIO75, /* LCD_BIAS - LCDID[4] */ | ||
| 127 | MFP_PIN_GPIO73, /* LCD_LCLK - LCDID[3] */ | ||
| 128 | MFP_PIN_GPIO72, /* LCD_FCLK - LCDID[2] */ | ||
| 129 | MFP_PIN_GPIO127,/* LCD_CS_N - LCDID[1] */ | ||
| 130 | MFP_PIN_GPIO76, /* LCD_VSYNC - LCDID[0] */ | ||
| 131 | }; | ||
| 132 | |||
| 133 | static void __init zylonite_detect_lcd_panel(void) | ||
| 134 | { | ||
| 135 | unsigned long mfpr_save[NUM_LCD_DETECT_PINS]; | ||
| 136 | int i, gpio, id = 0; | ||
| 137 | |||
| 138 | /* save the original MFP settings of these pins and configure | ||
| 139 | * them as GPIO Input, DS01X, Pull Neither, Edge Clear | ||
| 140 | */ | ||
| 141 | for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { | ||
| 142 | mfpr_save[i] = pxa3xx_mfp_read(lcd_detect_pins[i]); | ||
| 143 | pxa3xx_mfp_write(lcd_detect_pins[i], 0x8440); | ||
| 144 | } | ||
| 145 | |||
| 146 | for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { | ||
| 147 | id = id << 1; | ||
| 148 | gpio = mfp_to_gpio(lcd_detect_pins[i]); | ||
| 149 | gpio_direction_input(gpio); | ||
| 150 | |||
| 151 | if (gpio_get_value(gpio)) | ||
| 152 | id = id | 0x1; | ||
| 153 | } | ||
| 154 | |||
| 155 | /* lcd id, flush out bit 1 */ | ||
| 156 | lcd_id = id & 0x3d; | ||
| 157 | |||
| 158 | /* lcd orientation, portrait or landscape */ | ||
| 159 | lcd_orientation = (id >> 6) & 0x1; | ||
| 160 | |||
| 161 | /* restore the original MFP settings */ | ||
| 162 | for (i = 0; i < NUM_LCD_DETECT_PINS; i++) | ||
| 163 | pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]); | ||
| 164 | } | ||
| 165 | |||
| 166 | void __init zylonite_pxa300_init(void) | ||
| 167 | { | ||
| 168 | if (cpu_is_pxa300() || cpu_is_pxa310()) { | ||
| 169 | /* initialize MFP */ | ||
| 170 | pxa3xx_mfp_config(ARRAY_AND_SIZE(common_mfp_cfg)); | ||
| 171 | |||
| 172 | /* detect LCD panel */ | ||
| 173 | zylonite_detect_lcd_panel(); | ||
| 174 | |||
| 175 | /* GPIO pin assignment */ | ||
| 176 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20); | ||
| 177 | } | ||
| 178 | |||
| 179 | if (cpu_is_pxa300()) { | ||
| 180 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa300_mfp_cfg)); | ||
| 181 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO99); | ||
| 182 | } | ||
| 183 | |||
| 184 | if (cpu_is_pxa310()) { | ||
| 185 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); | ||
| 186 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); | ||
| 187 | } | ||
| 188 | } | ||
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c new file mode 100644 index 000000000000..63cb36be086b --- /dev/null +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
| @@ -0,0 +1,173 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-pxa/zylonite_pxa320.c | ||
| 3 | * | ||
| 4 | * PXA320 specific support code for the | ||
| 5 | * PXA3xx Development Platform (aka Zylonite) | ||
| 6 | * | ||
| 7 | * Copyright (C) 2007 Marvell Internation Ltd. | ||
| 8 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | |||
| 20 | #include <asm/arch/gpio.h> | ||
| 21 | #include <asm/arch/mfp-pxa320.h> | ||
| 22 | #include <asm/arch/zylonite.h> | ||
| 23 | |||
| 24 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
| 25 | |||
| 26 | static mfp_cfg_t mfp_cfg[] __initdata = { | ||
| 27 | /* LCD */ | ||
| 28 | GPIO6_2_LCD_LDD_0, | ||
| 29 | GPIO7_2_LCD_LDD_1, | ||
| 30 | GPIO8_2_LCD_LDD_2, | ||
| 31 | GPIO9_2_LCD_LDD_3, | ||
| 32 | GPIO10_2_LCD_LDD_4, | ||
| 33 | GPIO11_2_LCD_LDD_5, | ||
| 34 | GPIO12_2_LCD_LDD_6, | ||
| 35 | GPIO13_2_LCD_LDD_7, | ||
| 36 | GPIO63_LCD_LDD_8, | ||
| 37 | GPIO64_LCD_LDD_9, | ||
| 38 | GPIO65_LCD_LDD_10, | ||
| 39 | GPIO66_LCD_LDD_11, | ||
| 40 | GPIO67_LCD_LDD_12, | ||
| 41 | GPIO68_LCD_LDD_13, | ||
| 42 | GPIO69_LCD_LDD_14, | ||
| 43 | GPIO70_LCD_LDD_15, | ||
| 44 | GPIO71_LCD_LDD_16, | ||
| 45 | GPIO72_LCD_LDD_17, | ||
| 46 | GPIO73_LCD_CS_N, | ||
| 47 | GPIO74_LCD_VSYNC, | ||
| 48 | GPIO14_2_LCD_FCLK, | ||
| 49 | GPIO15_2_LCD_LCLK, | ||
| 50 | GPIO16_2_LCD_PCLK, | ||
| 51 | GPIO17_2_LCD_BIAS, | ||
| 52 | |||
| 53 | /* FFUART */ | ||
| 54 | GPIO41_UART1_RXD, | ||
| 55 | GPIO42_UART1_TXD, | ||
| 56 | GPIO43_UART1_CTS, | ||
| 57 | GPIO44_UART1_DCD, | ||
| 58 | GPIO45_UART1_DSR, | ||
| 59 | GPIO46_UART1_RI, | ||
| 60 | GPIO47_UART1_DTR, | ||
| 61 | GPIO48_UART1_RTS, | ||
| 62 | |||
| 63 | /* AC97 */ | ||
| 64 | GPIO34_AC97_SYSCLK, | ||
| 65 | GPIO35_AC97_SDATA_IN_0, | ||
| 66 | GPIO37_AC97_SDATA_OUT, | ||
| 67 | GPIO38_AC97_SYNC, | ||
| 68 | GPIO39_AC97_BITCLK, | ||
| 69 | GPIO40_AC97_nACRESET, | ||
| 70 | |||
| 71 | /* I2C */ | ||
| 72 | GPIO32_I2C_SCL, | ||
| 73 | GPIO33_I2C_SDA, | ||
| 74 | |||
| 75 | /* Keypad */ | ||
| 76 | GPIO105_KP_DKIN_0, | ||
| 77 | GPIO106_KP_DKIN_1, | ||
| 78 | GPIO113_KP_MKIN_0, | ||
| 79 | GPIO114_KP_MKIN_1, | ||
| 80 | GPIO115_KP_MKIN_2, | ||
| 81 | GPIO116_KP_MKIN_3, | ||
| 82 | GPIO117_KP_MKIN_4, | ||
| 83 | GPIO118_KP_MKIN_5, | ||
| 84 | GPIO119_KP_MKIN_6, | ||
| 85 | GPIO120_KP_MKIN_7, | ||
| 86 | GPIO121_KP_MKOUT_0, | ||
| 87 | GPIO122_KP_MKOUT_1, | ||
| 88 | GPIO123_KP_MKOUT_2, | ||
| 89 | GPIO124_KP_MKOUT_3, | ||
| 90 | GPIO125_KP_MKOUT_4, | ||
| 91 | GPIO126_KP_MKOUT_5, | ||
| 92 | GPIO127_KP_MKOUT_6, | ||
| 93 | GPIO5_2_KP_MKOUT_7, | ||
| 94 | |||
| 95 | /* Ethernet */ | ||
| 96 | GPIO4_nCS3, | ||
| 97 | GPIO90_GPIO, | ||
| 98 | }; | ||
| 99 | |||
| 100 | #define NUM_LCD_DETECT_PINS 7 | ||
| 101 | |||
| 102 | static int lcd_detect_pins[] __initdata = { | ||
| 103 | MFP_PIN_GPIO72, /* LCD_LDD_17 - ORIENT */ | ||
| 104 | MFP_PIN_GPIO71, /* LCD_LDD_16 - LCDID[5] */ | ||
| 105 | MFP_PIN_GPIO17_2, /* LCD_BIAS - LCDID[4] */ | ||
| 106 | MFP_PIN_GPIO15_2, /* LCD_LCLK - LCDID[3] */ | ||
| 107 | MFP_PIN_GPIO14_2, /* LCD_FCLK - LCDID[2] */ | ||
| 108 | MFP_PIN_GPIO73, /* LCD_CS_N - LCDID[1] */ | ||
| 109 | MFP_PIN_GPIO74, /* LCD_VSYNC - LCDID[0] */ | ||
| 110 | /* | ||
| 111 | * set the MFP_PIN_GPIO 14/15/17 to alternate function other than | ||
| 112 | * GPIO to avoid input level confliction with 14_2, 15_2, 17_2 | ||
| 113 | */ | ||
| 114 | MFP_PIN_GPIO14, | ||
| 115 | MFP_PIN_GPIO15, | ||
| 116 | MFP_PIN_GPIO17, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static int lcd_detect_mfpr[] __initdata = { | ||
| 120 | /* AF0, DS 1X, Pull Neither, Edge Clear */ | ||
| 121 | 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, 0x8440, | ||
| 122 | 0xc442, /* Backlight, Pull-Up, AF2 */ | ||
| 123 | 0x8445, /* AF5 */ | ||
| 124 | 0x8445, /* AF5 */ | ||
| 125 | }; | ||
| 126 | |||
| 127 | static void __init zylonite_detect_lcd_panel(void) | ||
| 128 | { | ||
| 129 | unsigned long mfpr_save[ARRAY_SIZE(lcd_detect_pins)]; | ||
| 130 | int i, gpio, id = 0; | ||
| 131 | |||
| 132 | /* save the original MFP settings of these pins and configure them | ||
| 133 | * as GPIO Input, DS01X, Pull Neither, Edge Clear | ||
| 134 | */ | ||
| 135 | for (i = 0; i < ARRAY_SIZE(lcd_detect_pins); i++) { | ||
| 136 | mfpr_save[i] = pxa3xx_mfp_read(lcd_detect_pins[i]); | ||
| 137 | pxa3xx_mfp_write(lcd_detect_pins[i], lcd_detect_mfpr[i]); | ||
| 138 | } | ||
| 139 | |||
| 140 | for (i = 0; i < NUM_LCD_DETECT_PINS; i++) { | ||
| 141 | id = id << 1; | ||
| 142 | gpio = mfp_to_gpio(lcd_detect_pins[i]); | ||
| 143 | gpio_direction_input(gpio); | ||
| 144 | |||
| 145 | if (gpio_get_value(gpio)) | ||
| 146 | id = id | 0x1; | ||
| 147 | } | ||
| 148 | |||
| 149 | /* lcd id, flush out bit 1 */ | ||
| 150 | lcd_id = id & 0x3d; | ||
| 151 | |||
| 152 | /* lcd orientation, portrait or landscape */ | ||
| 153 | lcd_orientation = (id >> 6) & 0x1; | ||
| 154 | |||
| 155 | /* restore the original MFP settings */ | ||
| 156 | for (i = 0; i < ARRAY_SIZE(lcd_detect_pins); i++) | ||
| 157 | pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]); | ||
| 158 | } | ||
| 159 | |||
| 160 | void __init zylonite_pxa320_init(void) | ||
| 161 | { | ||
| 162 | if (cpu_is_pxa320()) { | ||
| 163 | /* initialize MFP */ | ||
| 164 | pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg)); | ||
| 165 | |||
| 166 | /* detect LCD panel */ | ||
| 167 | zylonite_detect_lcd_panel(); | ||
| 168 | |||
| 169 | /* GPIO pin assignment */ | ||
| 170 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO14); | ||
| 171 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); | ||
| 172 | } | ||
| 173 | } | ||
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 80d83739ab9f..8f12e855ef5f 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
| @@ -145,7 +145,7 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = { | |||
| 145 | }, | 145 | }, |
| 146 | }; | 146 | }; |
| 147 | 147 | ||
| 148 | static int s3c2410_dma_add(struct sys_device *sysdev) | 148 | static int __init s3c2410_dma_add(struct sys_device *sysdev) |
| 149 | { | 149 | { |
| 150 | s3c2410_dma_init(); | 150 | s3c2410_dma_init(); |
| 151 | s3c24xx_dma_order_set(&s3c2410_dma_order); | 151 | s3c24xx_dma_order_set(&s3c2410_dma_order); |
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 4b9425c1bf72..53c1d5bbce19 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c | |||
| @@ -144,7 +144,7 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { | |||
| 144 | .map_size = ARRAY_SIZE(s3c2412_dma_mappings), | 144 | .map_size = ARRAY_SIZE(s3c2412_dma_mappings), |
| 145 | }; | 145 | }; |
| 146 | 146 | ||
| 147 | static int s3c2412_dma_add(struct sys_device *sysdev) | 147 | static int __init s3c2412_dma_add(struct sys_device *sysdev) |
| 148 | { | 148 | { |
| 149 | s3c2410_dma_init(); | 149 | s3c2410_dma_init(); |
| 150 | return s3c24xx_dma_init_map(&s3c2412_dma_sel); | 150 | return s3c24xx_dma_init_map(&s3c2412_dma_sel); |
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index f0d66828f965..e9d0c769f5da 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c | |||
| @@ -38,6 +38,9 @@ | |||
| 38 | #include <asm/plat-s3c24xx/irq.h> | 38 | #include <asm/plat-s3c24xx/irq.h> |
| 39 | #include <asm/plat-s3c24xx/pm.h> | 39 | #include <asm/plat-s3c24xx/pm.h> |
| 40 | 40 | ||
| 41 | #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) | ||
| 42 | #define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0)))) | ||
| 43 | |||
| 41 | /* the s3c2412 changes the behaviour of IRQ_EINT0 through IRQ_EINT3 by | 44 | /* the s3c2412 changes the behaviour of IRQ_EINT0 through IRQ_EINT3 by |
| 42 | * having them turn up in both the INT* and the EINT* registers. Whilst | 45 | * having them turn up in both the INT* and the EINT* registers. Whilst |
| 43 | * both show the status, they both now need to be acked when the IRQs | 46 | * both show the status, they both now need to be acked when the IRQs |
| @@ -105,6 +108,51 @@ static struct irq_chip s3c2412_irq_eint0t4 = { | |||
| 105 | .set_type = s3c_irqext_type, | 108 | .set_type = s3c_irqext_type, |
| 106 | }; | 109 | }; |
| 107 | 110 | ||
| 111 | #define INTBIT(x) (1 << ((x) - S3C2410_IRQSUB(0))) | ||
| 112 | |||
| 113 | /* CF and SDI sub interrupts */ | ||
| 114 | |||
| 115 | static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc) | ||
| 116 | { | ||
| 117 | unsigned int subsrc, submsk; | ||
| 118 | |||
| 119 | subsrc = __raw_readl(S3C2410_SUBSRCPND); | ||
| 120 | submsk = __raw_readl(S3C2410_INTSUBMSK); | ||
| 121 | |||
| 122 | subsrc &= ~submsk; | ||
| 123 | |||
| 124 | if (subsrc & INTBIT(IRQ_S3C2412_SDI)) | ||
| 125 | desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI); | ||
| 126 | |||
| 127 | if (subsrc & INTBIT(IRQ_S3C2412_CF)) | ||
| 128 | desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF); | ||
| 129 | } | ||
| 130 | |||
| 131 | #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) | ||
| 132 | #define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF) | ||
| 133 | |||
| 134 | static void s3c2412_irq_cfsdi_mask(unsigned int irqno) | ||
| 135 | { | ||
| 136 | s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI); | ||
| 137 | } | ||
| 138 | |||
| 139 | static void s3c2412_irq_cfsdi_unmask(unsigned int irqno) | ||
| 140 | { | ||
| 141 | s3c_irqsub_unmask(irqno, INTMSK_CFSDI); | ||
| 142 | } | ||
| 143 | |||
| 144 | static void s3c2412_irq_cfsdi_ack(unsigned int irqno) | ||
| 145 | { | ||
| 146 | s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI); | ||
| 147 | } | ||
| 148 | |||
| 149 | static struct irq_chip s3c2412_irq_cfsdi = { | ||
| 150 | .name = "s3c2412-cfsdi", | ||
| 151 | .ack = s3c2412_irq_cfsdi_ack, | ||
| 152 | .mask = s3c2412_irq_cfsdi_mask, | ||
| 153 | .unmask = s3c2412_irq_cfsdi_unmask, | ||
| 154 | }; | ||
| 155 | |||
| 108 | static int s3c2412_irq_add(struct sys_device *sysdev) | 156 | static int s3c2412_irq_add(struct sys_device *sysdev) |
| 109 | { | 157 | { |
| 110 | unsigned int irqno; | 158 | unsigned int irqno; |
| @@ -115,6 +163,16 @@ static int s3c2412_irq_add(struct sys_device *sysdev) | |||
| 115 | set_irq_flags(irqno, IRQF_VALID); | 163 | set_irq_flags(irqno, IRQF_VALID); |
| 116 | } | 164 | } |
| 117 | 165 | ||
| 166 | /* add demux support for CF/SDI */ | ||
| 167 | |||
| 168 | set_irq_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi); | ||
| 169 | |||
| 170 | for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) { | ||
| 171 | set_irq_chip(irqno, &s3c2412_irq_cfsdi); | ||
| 172 | set_irq_handler(irqno, handle_level_irq); | ||
| 173 | set_irq_flags(irqno, IRQF_VALID); | ||
| 174 | } | ||
| 175 | |||
| 118 | return 0; | 176 | return 0; |
| 119 | } | 177 | } |
| 120 | 178 | ||
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index e0ccb404623f..4f92a1562d77 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
| @@ -78,6 +78,11 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
| 78 | s3c_device_lcd.name = "s3c2412-lcd"; | 78 | s3c_device_lcd.name = "s3c2412-lcd"; |
| 79 | s3c_device_nand.name = "s3c2412-nand"; | 79 | s3c_device_nand.name = "s3c2412-nand"; |
| 80 | 80 | ||
| 81 | /* alter IRQ of SDI controller */ | ||
| 82 | |||
| 83 | s3c_device_sdi.resource[1].start = IRQ_S3C2412_SDI; | ||
| 84 | s3c_device_sdi.resource[1].end = IRQ_S3C2412_SDI; | ||
| 85 | |||
| 81 | /* spi channel related changes, s3c2412/13 specific */ | 86 | /* spi channel related changes, s3c2412/13 specific */ |
| 82 | s3c_device_spi0.name = "s3c2412-spi"; | 87 | s3c_device_spi0.name = "s3c2412-spi"; |
| 83 | s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; | 88 | s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; |
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index f509f062e749..0b1260827ac6 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c | |||
| @@ -190,7 +190,7 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = { | |||
| 190 | }, | 190 | }, |
| 191 | }; | 191 | }; |
| 192 | 192 | ||
| 193 | static int s3c2440_dma_add(struct sys_device *sysdev) | 193 | static int __init s3c2440_dma_add(struct sys_device *sysdev) |
| 194 | { | 194 | { |
| 195 | s3c2410_dma_init(); | 195 | s3c2410_dma_init(); |
| 196 | s3c24xx_dma_order_set(&s3c2440_dma_order); | 196 | s3c24xx_dma_order_set(&s3c2440_dma_order); |
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index fc3ede82af8f..f6c006d4297b 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c | |||
| @@ -162,7 +162,7 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = { | |||
| 162 | .map_size = ARRAY_SIZE(s3c2443_dma_mappings), | 162 | .map_size = ARRAY_SIZE(s3c2443_dma_mappings), |
| 163 | }; | 163 | }; |
| 164 | 164 | ||
| 165 | static int s3c2443_dma_add(struct sys_device *sysdev) | 165 | static int __init s3c2443_dma_add(struct sys_device *sysdev) |
| 166 | { | 166 | { |
| 167 | s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100); | 167 | s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100); |
| 168 | return s3c24xx_dma_init_map(&s3c2443_dma_sel); | 168 | return s3c24xx_dma_init_map(&s3c2443_dma_sel); |
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 6cd4818f3f0d..f9ad498a6fc0 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c | |||
| @@ -252,7 +252,7 @@ static int __init s3c2443_add_sub(unsigned int base, | |||
| 252 | return 0; | 252 | return 0; |
| 253 | } | 253 | } |
| 254 | 254 | ||
| 255 | static int s3c2443_irq_add(struct sys_device *sysdev) | 255 | static int __init s3c2443_irq_add(struct sys_device *sysdev) |
| 256 | { | 256 | { |
| 257 | printk("S3C2443: IRQ Support\n"); | 257 | printk("S3C2443: IRQ Support\n"); |
| 258 | 258 | ||
| @@ -280,7 +280,7 @@ static struct sysdev_driver s3c2443_irq_driver = { | |||
| 280 | .add = s3c2443_irq_add, | 280 | .add = s3c2443_irq_add, |
| 281 | }; | 281 | }; |
| 282 | 282 | ||
| 283 | static int s3c2443_irq_init(void) | 283 | static int __init s3c2443_irq_init(void) |
| 284 | { | 284 | { |
| 285 | return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver); | 285 | return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver); |
| 286 | } | 286 | } |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 12161ae445da..7868f4dc1d00 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
| @@ -322,7 +322,7 @@ config CPU_SA1100 | |||
| 322 | # XScale | 322 | # XScale |
| 323 | config CPU_XSCALE | 323 | config CPU_XSCALE |
| 324 | bool | 324 | bool |
| 325 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_PXA || ARCH_IXP4XX || ARCH_IXP2000 | 325 | depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000 |
| 326 | default y | 326 | default y |
| 327 | select CPU_32v5 | 327 | select CPU_32v5 |
| 328 | select CPU_ABRT_EV5T | 328 | select CPU_ABRT_EV5T |
| @@ -333,7 +333,7 @@ config CPU_XSCALE | |||
| 333 | # XScale Core Version 3 | 333 | # XScale Core Version 3 |
| 334 | config CPU_XSC3 | 334 | config CPU_XSC3 |
| 335 | bool | 335 | bool |
| 336 | depends on ARCH_IXP23XX || ARCH_IOP13XX | 336 | depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx |
| 337 | default y | 337 | default y |
| 338 | select CPU_32v5 | 338 | select CPU_32v5 |
| 339 | select CPU_ABRT_EV5T | 339 | select CPU_ABRT_EV5T |
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c index 1f9f94f9af4b..cefdf2f9f26e 100644 --- a/arch/arm/mm/consistent.c +++ b/arch/arm/mm/consistent.c | |||
| @@ -481,7 +481,7 @@ core_initcall(consistent_init); | |||
| 481 | * platforms with CONFIG_DMABOUNCE. | 481 | * platforms with CONFIG_DMABOUNCE. |
| 482 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | 482 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) |
| 483 | */ | 483 | */ |
| 484 | void consistent_sync(const void *start, size_t size, int direction) | 484 | void dma_cache_maint(const void *start, size_t size, int direction) |
| 485 | { | 485 | { |
| 486 | const void *end = start + size; | 486 | const void *end = start + size; |
| 487 | 487 | ||
| @@ -504,4 +504,4 @@ void consistent_sync(const void *start, size_t size, int direction) | |||
| 504 | BUG(); | 504 | BUG(); |
| 505 | } | 505 | } |
| 506 | } | 506 | } |
| 507 | EXPORT_SYMBOL(consistent_sync); | 507 | EXPORT_SYMBOL(dma_cache_maint); |
diff --git a/arch/arm/nwfpe/ARM-gcc.h b/arch/arm/nwfpe/ARM-gcc.h index e6598470b076..436e54aa02ec 100644 --- a/arch/arm/nwfpe/ARM-gcc.h +++ b/arch/arm/nwfpe/ARM-gcc.h | |||
| @@ -68,7 +68,7 @@ a compiler does not support explicit inlining, this macro should be defined | |||
| 68 | to be `static'. | 68 | to be `static'. |
| 69 | ------------------------------------------------------------------------------- | 69 | ------------------------------------------------------------------------------- |
| 70 | */ | 70 | */ |
| 71 | #define INLINE extern __inline__ | 71 | #define INLINE static inline |
| 72 | 72 | ||
| 73 | 73 | ||
| 74 | /* For use as a GCC soft-float library we need some special function names. */ | 74 | /* For use as a GCC soft-float library we need some special function names. */ |
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S index 1dc13bc6d810..48bca0db4607 100644 --- a/arch/arm/nwfpe/entry.S +++ b/arch/arm/nwfpe/entry.S | |||
| @@ -70,13 +70,24 @@ floating point instructions. GCC attempts to group floating point | |||
| 70 | instructions to allow the emulator to spread the cost of the trap over | 70 | instructions to allow the emulator to spread the cost of the trap over |
| 71 | several floating point instructions. */ | 71 | several floating point instructions. */ |
| 72 | 72 | ||
| 73 | #include <asm/asm-offsets.h> | ||
| 74 | |||
| 73 | .globl nwfpe_enter | 75 | .globl nwfpe_enter |
| 74 | nwfpe_enter: | 76 | nwfpe_enter: |
| 75 | mov r4, lr @ save the failure-return addresses | 77 | mov r4, lr @ save the failure-return addresses |
| 76 | mov sl, sp @ we access the registers via 'sl' | 78 | mov sl, sp @ we access the registers via 'sl' |
| 77 | 79 | ||
| 78 | ldr r5, [sp, #60] @ get contents of PC; | 80 | ldr r5, [sp, #S_PC] @ get contents of PC; |
| 81 | mov r6, r0 @ save the opcode | ||
| 79 | emulate: | 82 | emulate: |
| 83 | ldr r1, [sp, #S_PSR] @ fetch the PSR | ||
| 84 | bl checkCondition @ check the condition | ||
| 85 | cmp r0, #0 @ r0 = 0 ==> condition failed | ||
| 86 | |||
| 87 | @ if condition code failed to match, next insn | ||
| 88 | beq next @ get the next instruction; | ||
| 89 | |||
| 90 | mov r0, r6 @ prepare for EmulateAll() | ||
| 80 | bl EmulateAll @ emulate the instruction | 91 | bl EmulateAll @ emulate the instruction |
| 81 | cmp r0, #0 @ was emulation successful | 92 | cmp r0, #0 @ was emulation successful |
| 82 | moveq pc, r4 @ no, return failure | 93 | moveq pc, r4 @ no, return failure |
| @@ -91,18 +102,10 @@ next: | |||
| 91 | teqne r2, #0x0E000000 | 102 | teqne r2, #0x0E000000 |
| 92 | movne pc, r9 @ return ok if not a fp insn | 103 | movne pc, r9 @ return ok if not a fp insn |
| 93 | 104 | ||
| 94 | str r5, [sp, #60] @ update PC copy in regs | 105 | str r5, [sp, #S_PC] @ update PC copy in regs |
| 95 | 106 | ||
| 96 | mov r0, r6 @ save a copy | 107 | mov r0, r6 @ save a copy |
| 97 | ldr r1, [sp, #64] @ fetch the condition codes | 108 | b emulate @ check condition and emulate |
| 98 | bl checkCondition @ check the condition | ||
| 99 | cmp r0, #0 @ r0 = 0 ==> condition failed | ||
| 100 | |||
| 101 | @ if condition code failed to match, next insn | ||
| 102 | beq next @ get the next instruction; | ||
| 103 | |||
| 104 | mov r0, r6 @ prepare for EmulateAll() | ||
| 105 | b emulate @ if r0 != 0, goto EmulateAll | ||
| 106 | 109 | ||
| 107 | @ We need to be prepared for the instructions at .Lx1 and .Lx2 | 110 | @ We need to be prepared for the instructions at .Lx1 and .Lx2 |
| 108 | @ to fault. Emit the appropriate exception gunk to fix things up. | 111 | @ to fault. Emit the appropriate exception gunk to fix things up. |
diff --git a/arch/arm/nwfpe/fpa11.inl b/arch/arm/nwfpe/fpa11.inl index 10c3caf2868f..ab8d6826245f 100644 --- a/arch/arm/nwfpe/fpa11.inl +++ b/arch/arm/nwfpe/fpa11.inl | |||
| @@ -22,13 +22,13 @@ | |||
| 22 | #include "fpa11.h" | 22 | #include "fpa11.h" |
| 23 | 23 | ||
| 24 | /* Read and write floating point status register */ | 24 | /* Read and write floating point status register */ |
| 25 | extern __inline__ unsigned int readFPSR(void) | 25 | static inline unsigned int readFPSR(void) |
| 26 | { | 26 | { |
| 27 | FPA11 *fpa11 = GET_FPA11(); | 27 | FPA11 *fpa11 = GET_FPA11(); |
| 28 | return (fpa11->fpsr); | 28 | return (fpa11->fpsr); |
| 29 | } | 29 | } |
| 30 | 30 | ||
| 31 | extern __inline__ void writeFPSR(FPSR reg) | 31 | static inline void writeFPSR(FPSR reg) |
| 32 | { | 32 | { |
| 33 | FPA11 *fpa11 = GET_FPA11(); | 33 | FPA11 *fpa11 = GET_FPA11(); |
| 34 | /* the sysid byte in the status register is readonly */ | 34 | /* the sysid byte in the status register is readonly */ |
| @@ -36,14 +36,14 @@ extern __inline__ void writeFPSR(FPSR reg) | |||
| 36 | } | 36 | } |
| 37 | 37 | ||
| 38 | /* Read and write floating point control register */ | 38 | /* Read and write floating point control register */ |
| 39 | extern __inline__ FPCR readFPCR(void) | 39 | static inline FPCR readFPCR(void) |
| 40 | { | 40 | { |
| 41 | FPA11 *fpa11 = GET_FPA11(); | 41 | FPA11 *fpa11 = GET_FPA11(); |
| 42 | /* clear SB, AB and DA bits before returning FPCR */ | 42 | /* clear SB, AB and DA bits before returning FPCR */ |
| 43 | return (fpa11->fpcr & ~MASK_RFC); | 43 | return (fpa11->fpcr & ~MASK_RFC); |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | extern __inline__ void writeFPCR(FPCR reg) | 46 | static inline void writeFPCR(FPCR reg) |
| 47 | { | 47 | { |
| 48 | FPA11 *fpa11 = GET_FPA11(); | 48 | FPA11 *fpa11 = GET_FPA11(); |
| 49 | fpa11->fpcr &= ~MASK_WFC; /* clear SB, AB and DA bits */ | 49 | fpa11->fpcr &= ~MASK_WFC; /* clear SB, AB and DA bits */ |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index cfc69f3842fd..c1f7e5a819a3 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
| @@ -20,10 +20,15 @@ endchoice | |||
| 20 | 20 | ||
| 21 | comment "OMAP Feature Selections" | 21 | comment "OMAP Feature Selections" |
| 22 | 22 | ||
| 23 | config OMAP_DEBUG_LEDS | 23 | config OMAP_DEBUG_DEVICES |
| 24 | bool | 24 | bool |
| 25 | help | 25 | help |
| 26 | For debug card leds on TI reference boards. | 26 | For debug cards on TI reference boards. |
| 27 | |||
| 28 | config OMAP_DEBUG_LEDS | ||
| 29 | bool | ||
| 30 | depends on OMAP_DEBUG_DEVICES | ||
| 31 | default y if LEDS || LEDS_OMAP_DEBUG | ||
| 27 | 32 | ||
| 28 | config OMAP_RESET_CLOCKS | 33 | config OMAP_RESET_CLOCKS |
| 29 | bool "Reset unused clocks during boot" | 34 | bool "Reset unused clocks during boot" |
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 41a3c1cf3bd4..2549129aabc6 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
| @@ -17,4 +17,5 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | |||
| 17 | 17 | ||
| 18 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o | 18 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o |
| 19 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o | 19 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o |
| 20 | obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o | ||
| 20 | obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o | 21 | obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o |
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c new file mode 100644 index 000000000000..83a5f8b91857 --- /dev/null +++ b/arch/arm/plat-omap/debug-devices.c | |||
| @@ -0,0 +1,86 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-omap/debug-devices.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2005 Nokia Corporation | ||
| 5 | * Modified from mach-omap2/board-h4.c | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | |||
| 16 | #include <asm/hardware.h> | ||
| 17 | #include <asm/io.h> | ||
| 18 | |||
| 19 | #include <asm/arch/board.h> | ||
| 20 | #include <asm/arch/gpio.h> | ||
| 21 | |||
| 22 | |||
| 23 | /* Many OMAP development platforms reuse the same "debug board"; these | ||
| 24 | * platforms include H2, H3, H4, and Perseus2. | ||
| 25 | */ | ||
| 26 | |||
| 27 | static struct resource smc91x_resources[] = { | ||
| 28 | [0] = { | ||
| 29 | .flags = IORESOURCE_MEM, | ||
| 30 | }, | ||
| 31 | [1] = { | ||
| 32 | .flags = IORESOURCE_IRQ, | ||
| 33 | }, | ||
| 34 | }; | ||
| 35 | |||
| 36 | static struct platform_device smc91x_device = { | ||
| 37 | .name = "smc91x", | ||
| 38 | .id = -1, | ||
| 39 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
| 40 | .resource = smc91x_resources, | ||
| 41 | }; | ||
| 42 | |||
| 43 | static struct resource led_resources[] = { | ||
| 44 | [0] = { | ||
| 45 | .flags = IORESOURCE_MEM, | ||
| 46 | }, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct platform_device led_device = { | ||
| 50 | .name = "omap_dbg_led", | ||
| 51 | .id = -1, | ||
| 52 | .num_resources = ARRAY_SIZE(led_resources), | ||
| 53 | .resource = led_resources, | ||
| 54 | }; | ||
| 55 | |||
| 56 | static struct platform_device *debug_devices[] __initdata = { | ||
| 57 | &smc91x_device, | ||
| 58 | &led_device, | ||
| 59 | /* ps2 kbd + mouse ports */ | ||
| 60 | /* 4 extra uarts */ | ||
| 61 | /* 6 input dip switches */ | ||
| 62 | /* 8 output pins */ | ||
| 63 | }; | ||
| 64 | |||
| 65 | int __init debug_card_init(u32 addr, unsigned gpio) | ||
| 66 | { | ||
| 67 | int status; | ||
| 68 | |||
| 69 | smc91x_resources[0].start = addr + 0x300; | ||
| 70 | smc91x_resources[0].end = addr + 0x30f; | ||
| 71 | |||
| 72 | smc91x_resources[1].start = OMAP_GPIO_IRQ(gpio); | ||
| 73 | smc91x_resources[1].end = OMAP_GPIO_IRQ(gpio); | ||
| 74 | |||
| 75 | status = omap_request_gpio(gpio); | ||
| 76 | if (status < 0) { | ||
| 77 | printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio); | ||
| 78 | return status; | ||
| 79 | } | ||
| 80 | omap_set_gpio_direction(gpio, 1); | ||
| 81 | |||
| 82 | led_resources[0].start = addr; | ||
| 83 | led_resources[0].end = addr + SZ_4K - 1; | ||
| 84 | |||
| 85 | return platform_add_devices(debug_devices, ARRAY_SIZE(debug_devices)); | ||
| 86 | } | ||
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 88d5b6d9f950..05a38498cbe0 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -1347,11 +1347,6 @@ void omap_stop_lcd_dma(void) | |||
| 1347 | omap_writew(w, OMAP1610_DMA_LCD_CTRL); | 1347 | omap_writew(w, OMAP1610_DMA_LCD_CTRL); |
| 1348 | } | 1348 | } |
| 1349 | 1349 | ||
| 1350 | int omap_lcd_dma_ext_running(void) | ||
| 1351 | { | ||
| 1352 | return lcd_dma.ext_ctrl && lcd_dma.active; | ||
| 1353 | } | ||
| 1354 | |||
| 1355 | /*----------------------------------------------------------------------------*/ | 1350 | /*----------------------------------------------------------------------------*/ |
| 1356 | 1351 | ||
| 1357 | static int __init omap_init_dma(void) | 1352 | static int __init omap_init_dma(void) |
| @@ -1493,7 +1488,6 @@ EXPORT_SYMBOL(omap_free_lcd_dma); | |||
| 1493 | EXPORT_SYMBOL(omap_enable_lcd_dma); | 1488 | EXPORT_SYMBOL(omap_enable_lcd_dma); |
| 1494 | EXPORT_SYMBOL(omap_setup_lcd_dma); | 1489 | EXPORT_SYMBOL(omap_setup_lcd_dma); |
| 1495 | EXPORT_SYMBOL(omap_stop_lcd_dma); | 1490 | EXPORT_SYMBOL(omap_stop_lcd_dma); |
| 1496 | EXPORT_SYMBOL(omap_lcd_dma_ext_running); | ||
| 1497 | EXPORT_SYMBOL(omap_set_lcd_dma_b1); | 1491 | EXPORT_SYMBOL(omap_set_lcd_dma_b1); |
| 1498 | EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer); | 1492 | EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer); |
| 1499 | EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller); | 1493 | EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller); |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 6d048490c559..992ca435a922 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
| @@ -1372,7 +1372,7 @@ int __init s3c24xx_dma_init(unsigned int channels, unsigned int irq, | |||
| 1372 | return ret; | 1372 | return ret; |
| 1373 | } | 1373 | } |
| 1374 | 1374 | ||
| 1375 | int s3c2410_dma_init(void) | 1375 | int __init s3c2410_dma_init(void) |
| 1376 | { | 1376 | { |
| 1377 | return s3c24xx_dma_init(4, IRQ_DMA0, 0x40); | 1377 | return s3c24xx_dma_init(4, IRQ_DMA0, 0x40); |
| 1378 | } | 1378 | } |
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index d47113bbc34c..a646cbe8244c 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S | |||
| @@ -96,6 +96,14 @@ resume_with_mmu: | |||
| 96 | s3c2410_sleep_save_phys: | 96 | s3c2410_sleep_save_phys: |
| 97 | .word 0 | 97 | .word 0 |
| 98 | 98 | ||
| 99 | |||
| 100 | /* sleep magic, to allow the bootloader to check for an valid | ||
| 101 | * image to resume to. Must be the first word before the | ||
| 102 | * s3c2410_cpu_resume entry. | ||
| 103 | */ | ||
| 104 | |||
| 105 | .word 0x2bedf00d | ||
| 106 | |||
| 99 | /* s3c2410_cpu_resume | 107 | /* s3c2410_cpu_resume |
| 100 | * | 108 | * |
| 101 | * resume code entry for bootloader to call | 109 | * resume code entry for bootloader to call |
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index bb5466b27b59..00fad11733ad 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c | |||
| @@ -31,6 +31,8 @@ | |||
| 31 | #include <linux/interrupt.h> | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/i2c-pxa.h> | 32 | #include <linux/i2c-pxa.h> |
| 33 | #include <linux/platform_device.h> | 33 | #include <linux/platform_device.h> |
| 34 | #include <linux/err.h> | ||
| 35 | #include <linux/clk.h> | ||
| 34 | 36 | ||
| 35 | #include <asm/hardware.h> | 37 | #include <asm/hardware.h> |
| 36 | #include <asm/irq.h> | 38 | #include <asm/irq.h> |
| @@ -48,6 +50,7 @@ struct pxa_i2c { | |||
| 48 | unsigned int slave_addr; | 50 | unsigned int slave_addr; |
| 49 | 51 | ||
| 50 | struct i2c_adapter adap; | 52 | struct i2c_adapter adap; |
| 53 | struct clk *clk; | ||
| 51 | #ifdef CONFIG_I2C_PXA_SLAVE | 54 | #ifdef CONFIG_I2C_PXA_SLAVE |
| 52 | struct i2c_slave_client *slave; | 55 | struct i2c_slave_client *slave; |
| 53 | #endif | 56 | #endif |
| @@ -869,6 +872,12 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
| 869 | 872 | ||
| 870 | sprintf(i2c->adap.name, "pxa_i2c-i2c.%u", dev->id); | 873 | sprintf(i2c->adap.name, "pxa_i2c-i2c.%u", dev->id); |
| 871 | 874 | ||
| 875 | i2c->clk = clk_get(&dev->dev, "I2CCLK"); | ||
| 876 | if (IS_ERR(i2c->clk)) { | ||
| 877 | ret = PTR_ERR(i2c->clk); | ||
| 878 | goto eclk; | ||
| 879 | } | ||
| 880 | |||
| 872 | i2c->reg_base = ioremap(res->start, res_len(res)); | 881 | i2c->reg_base = ioremap(res->start, res_len(res)); |
| 873 | if (!i2c->reg_base) { | 882 | if (!i2c->reg_base) { |
| 874 | ret = -EIO; | 883 | ret = -EIO; |
| @@ -889,22 +898,19 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
| 889 | } | 898 | } |
| 890 | #endif | 899 | #endif |
| 891 | 900 | ||
| 901 | clk_enable(i2c->clk); | ||
| 902 | #ifdef CONFIG_PXA27x | ||
| 892 | switch (dev->id) { | 903 | switch (dev->id) { |
| 893 | case 0: | 904 | case 0: |
| 894 | #ifdef CONFIG_PXA27x | ||
| 895 | pxa_gpio_mode(GPIO117_I2CSCL_MD); | 905 | pxa_gpio_mode(GPIO117_I2CSCL_MD); |
| 896 | pxa_gpio_mode(GPIO118_I2CSDA_MD); | 906 | pxa_gpio_mode(GPIO118_I2CSDA_MD); |
| 897 | #endif | ||
| 898 | pxa_set_cken(CKEN_I2C, 1); | ||
| 899 | break; | 907 | break; |
| 900 | #ifdef CONFIG_PXA27x | ||
| 901 | case 1: | 908 | case 1: |
| 902 | local_irq_disable(); | 909 | local_irq_disable(); |
| 903 | PCFR |= PCFR_PI2CEN; | 910 | PCFR |= PCFR_PI2CEN; |
| 904 | local_irq_enable(); | 911 | local_irq_enable(); |
| 905 | pxa_set_cken(CKEN_PWRI2C, 1); | ||
| 906 | #endif | ||
| 907 | } | 912 | } |
| 913 | #endif | ||
| 908 | 914 | ||
| 909 | ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, | 915 | ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, |
| 910 | i2c->adap.name, i2c); | 916 | i2c->adap.name, i2c); |
| @@ -948,19 +954,18 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
| 948 | eadapt: | 954 | eadapt: |
| 949 | free_irq(irq, i2c); | 955 | free_irq(irq, i2c); |
| 950 | ereqirq: | 956 | ereqirq: |
| 951 | switch (dev->id) { | 957 | clk_disable(i2c->clk); |
| 952 | case 0: | 958 | |
| 953 | pxa_set_cken(CKEN_I2C, 0); | ||
| 954 | break; | ||
| 955 | #ifdef CONFIG_PXA27x | 959 | #ifdef CONFIG_PXA27x |
| 956 | case 1: | 960 | if (dev->id == 1) { |
| 957 | pxa_set_cken(CKEN_PWRI2C, 0); | ||
| 958 | local_irq_disable(); | 961 | local_irq_disable(); |
| 959 | PCFR &= ~PCFR_PI2CEN; | 962 | PCFR &= ~PCFR_PI2CEN; |
| 960 | local_irq_enable(); | 963 | local_irq_enable(); |
| 961 | #endif | ||
| 962 | } | 964 | } |
| 965 | #endif | ||
| 963 | eremap: | 966 | eremap: |
| 967 | clk_put(i2c->clk); | ||
| 968 | eclk: | ||
| 964 | kfree(i2c); | 969 | kfree(i2c); |
| 965 | emalloc: | 970 | emalloc: |
| 966 | release_mem_region(res->start, res_len(res)); | 971 | release_mem_region(res->start, res_len(res)); |
| @@ -975,18 +980,18 @@ static int i2c_pxa_remove(struct platform_device *dev) | |||
| 975 | 980 | ||
| 976 | i2c_del_adapter(&i2c->adap); | 981 | i2c_del_adapter(&i2c->adap); |
| 977 | free_irq(i2c->irq, i2c); | 982 | free_irq(i2c->irq, i2c); |
| 978 | switch (dev->id) { | 983 | |
| 979 | case 0: | 984 | clk_disable(i2c->clk); |
| 980 | pxa_set_cken(CKEN_I2C, 0); | 985 | clk_put(i2c->clk); |
| 981 | break; | 986 | |
| 982 | #ifdef CONFIG_PXA27x | 987 | #ifdef CONFIG_PXA27x |
| 983 | case 1: | 988 | if (dev->id == 1) { |
| 984 | pxa_set_cken(CKEN_PWRI2C, 0); | ||
| 985 | local_irq_disable(); | 989 | local_irq_disable(); |
| 986 | PCFR &= ~PCFR_PI2CEN; | 990 | PCFR &= ~PCFR_PI2CEN; |
| 987 | local_irq_enable(); | 991 | local_irq_enable(); |
| 988 | #endif | ||
| 989 | } | 992 | } |
| 993 | #endif | ||
| 994 | |||
| 990 | release_mem_region(i2c->iobase, i2c->iosize); | 995 | release_mem_region(i2c->iobase, i2c->iosize); |
| 991 | kfree(i2c); | 996 | kfree(i2c); |
| 992 | 997 | ||
diff --git a/drivers/input/keyboard/pxa27x_keyboard.c b/drivers/input/keyboard/pxa27x_keyboard.c index ebe5eacf2990..b7061aa38816 100644 --- a/drivers/input/keyboard/pxa27x_keyboard.c +++ b/drivers/input/keyboard/pxa27x_keyboard.c | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | #include <linux/input.h> | 23 | #include <linux/input.h> |
| 24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
| 25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
| 26 | #include <linux/clk.h> | ||
| 27 | #include <linux/err.h> | ||
| 26 | 28 | ||
| 27 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
| 28 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
| @@ -40,6 +42,8 @@ | |||
| 40 | col/2 == 2 ? KPASMKP2 : KPASMKP3) | 42 | col/2 == 2 ? KPASMKP2 : KPASMKP3) |
| 41 | #define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2))) | 43 | #define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2))) |
| 42 | 44 | ||
| 45 | static struct clk *pxakbd_clk; | ||
| 46 | |||
| 43 | static irqreturn_t pxakbd_irq_handler(int irq, void *dev_id) | 47 | static irqreturn_t pxakbd_irq_handler(int irq, void *dev_id) |
| 44 | { | 48 | { |
| 45 | struct platform_device *pdev = dev_id; | 49 | struct platform_device *pdev = dev_id; |
| @@ -104,7 +108,7 @@ static int pxakbd_open(struct input_dev *dev) | |||
| 104 | KPREC = 0x7F; | 108 | KPREC = 0x7F; |
| 105 | 109 | ||
| 106 | /* Enable unit clock */ | 110 | /* Enable unit clock */ |
| 107 | pxa_set_cken(CKEN_KEYPAD, 1); | 111 | clk_enable(pxakbd_clk); |
| 108 | 112 | ||
| 109 | return 0; | 113 | return 0; |
| 110 | } | 114 | } |
| @@ -112,7 +116,7 @@ static int pxakbd_open(struct input_dev *dev) | |||
| 112 | static void pxakbd_close(struct input_dev *dev) | 116 | static void pxakbd_close(struct input_dev *dev) |
| 113 | { | 117 | { |
| 114 | /* Disable clock unit */ | 118 | /* Disable clock unit */ |
| 115 | pxa_set_cken(CKEN_KEYPAD, 0); | 119 | clk_disable(pxakbd_clk); |
| 116 | } | 120 | } |
| 117 | 121 | ||
| 118 | #ifdef CONFIG_PM | 122 | #ifdef CONFIG_PM |
| @@ -140,7 +144,8 @@ static int pxakbd_resume(struct platform_device *pdev) | |||
| 140 | KPREC = pdata->reg_kprec; | 144 | KPREC = pdata->reg_kprec; |
| 141 | 145 | ||
| 142 | /* Enable unit clock */ | 146 | /* Enable unit clock */ |
| 143 | pxa_set_cken(CKEN_KEYPAD, 1); | 147 | clk_disable(pxakbd_clk); |
| 148 | clk_enable(pxakbd_clk); | ||
| 144 | } | 149 | } |
| 145 | 150 | ||
| 146 | mutex_unlock(&input_dev->mutex); | 151 | mutex_unlock(&input_dev->mutex); |
| @@ -158,11 +163,18 @@ static int __devinit pxakbd_probe(struct platform_device *pdev) | |||
| 158 | struct input_dev *input_dev; | 163 | struct input_dev *input_dev; |
| 159 | int i, row, col, error; | 164 | int i, row, col, error; |
| 160 | 165 | ||
| 166 | pxakbd_clk = clk_get(&pdev->dev, "KBDCLK"); | ||
| 167 | if (IS_ERR(pxakbd_clk)) { | ||
| 168 | error = PTR_ERR(pxakbd_clk); | ||
| 169 | goto err_clk; | ||
| 170 | } | ||
| 171 | |||
| 161 | /* Create and register the input driver. */ | 172 | /* Create and register the input driver. */ |
| 162 | input_dev = input_allocate_device(); | 173 | input_dev = input_allocate_device(); |
| 163 | if (!input_dev) { | 174 | if (!input_dev) { |
| 164 | printk(KERN_ERR "Cannot request keypad device\n"); | 175 | printk(KERN_ERR "Cannot request keypad device\n"); |
| 165 | return -ENOMEM; | 176 | error = -ENOMEM; |
| 177 | goto err_alloc; | ||
| 166 | } | 178 | } |
| 167 | 179 | ||
| 168 | input_dev->name = DRIVER_NAME; | 180 | input_dev->name = DRIVER_NAME; |
| @@ -185,7 +197,6 @@ static int __devinit pxakbd_probe(struct platform_device *pdev) | |||
| 185 | DRIVER_NAME, pdev); | 197 | DRIVER_NAME, pdev); |
| 186 | if (error) { | 198 | if (error) { |
| 187 | printk(KERN_ERR "Cannot request keypad IRQ\n"); | 199 | printk(KERN_ERR "Cannot request keypad IRQ\n"); |
| 188 | pxa_set_cken(CKEN_KEYPAD, 0); | ||
| 189 | goto err_free_dev; | 200 | goto err_free_dev; |
| 190 | } | 201 | } |
| 191 | 202 | ||
| @@ -217,6 +228,9 @@ static int __devinit pxakbd_probe(struct platform_device *pdev) | |||
| 217 | free_irq(IRQ_KEYPAD, pdev); | 228 | free_irq(IRQ_KEYPAD, pdev); |
| 218 | err_free_dev: | 229 | err_free_dev: |
| 219 | input_free_device(input_dev); | 230 | input_free_device(input_dev); |
| 231 | err_alloc: | ||
| 232 | clk_put(pxakbd_clk); | ||
| 233 | err_clk: | ||
| 220 | return error; | 234 | return error; |
| 221 | } | 235 | } |
| 222 | 236 | ||
| @@ -226,6 +240,7 @@ static int __devexit pxakbd_remove(struct platform_device *pdev) | |||
| 226 | 240 | ||
| 227 | input_unregister_device(input_dev); | 241 | input_unregister_device(input_dev); |
| 228 | free_irq(IRQ_KEYPAD, pdev); | 242 | free_irq(IRQ_KEYPAD, pdev); |
| 243 | clk_put(pxakbd_clk); | ||
| 229 | platform_set_drvdata(pdev, NULL); | 244 | platform_set_drvdata(pdev, NULL); |
| 230 | 245 | ||
| 231 | return 0; | 246 | return 0; |
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 3cb23210b912..257b44094e4c 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig | |||
| @@ -108,6 +108,12 @@ config LEDS_GPIO | |||
| 108 | outputs. To be useful the particular board must have LEDs | 108 | outputs. To be useful the particular board must have LEDs |
| 109 | and they must be connected to the GPIO lines. | 109 | and they must be connected to the GPIO lines. |
| 110 | 110 | ||
| 111 | config LEDS_CM_X270 | ||
| 112 | tristate "LED Support for the CM-X270 LEDs" | ||
| 113 | depends on LEDS_CLASS && MACH_ARMCORE | ||
| 114 | help | ||
| 115 | This option enables support for the CM-X270 LEDs. | ||
| 116 | |||
| 111 | comment "LED Triggers" | 117 | comment "LED Triggers" |
| 112 | 118 | ||
| 113 | config LEDS_TRIGGERS | 119 | config LEDS_TRIGGERS |
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index d2ca1abbc3d2..a60de1b46c2c 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile | |||
| @@ -18,6 +18,7 @@ obj-$(CONFIG_LEDS_H1940) += leds-h1940.o | |||
| 18 | obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o | 18 | obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o |
| 19 | obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o | 19 | obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o |
| 20 | obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o | 20 | obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o |
| 21 | obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o | ||
| 21 | 22 | ||
| 22 | # LED Triggers | 23 | # LED Triggers |
| 23 | obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o | 24 | obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o |
diff --git a/drivers/leds/leds-cm-x270.c b/drivers/leds/leds-cm-x270.c new file mode 100644 index 000000000000..9aebef02a974 --- /dev/null +++ b/drivers/leds/leds-cm-x270.c | |||
| @@ -0,0 +1,122 @@ | |||
| 1 | /* | ||
| 2 | * drivers/leds/leds-cm-x270.c | ||
| 3 | * | ||
| 4 | * Copyright 2007 CompuLab Ltd. | ||
| 5 | * Author: Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * Based on leds-corgi.c | ||
| 8 | * Author: Richard Purdie <rpurdie@openedhand.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/leds.h> | ||
| 20 | |||
| 21 | #include <asm/arch/hardware.h> | ||
| 22 | #include <asm/arch/pxa-regs.h> | ||
| 23 | |||
| 24 | #define GPIO_RED_LED (93) | ||
| 25 | #define GPIO_GREEN_LED (94) | ||
| 26 | |||
| 27 | static void cmx270_red_set(struct led_classdev *led_cdev, | ||
| 28 | enum led_brightness value) | ||
| 29 | { | ||
| 30 | if (value) | ||
| 31 | GPCR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED); | ||
| 32 | else | ||
| 33 | GPSR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED); | ||
| 34 | } | ||
| 35 | |||
| 36 | static void cmx270_green_set(struct led_classdev *led_cdev, | ||
| 37 | enum led_brightness value) | ||
| 38 | { | ||
| 39 | if (value) | ||
| 40 | GPCR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED); | ||
| 41 | else | ||
| 42 | GPSR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED); | ||
| 43 | } | ||
| 44 | |||
| 45 | static struct led_classdev cmx270_red_led = { | ||
| 46 | .name = "cm-x270:red", | ||
| 47 | .default_trigger = "nand-disk", | ||
| 48 | .brightness_set = cmx270_red_set, | ||
| 49 | }; | ||
| 50 | |||
| 51 | static struct led_classdev cmx270_green_led = { | ||
| 52 | .name = "cm-x270:green", | ||
| 53 | .default_trigger = "heartbeat", | ||
| 54 | .brightness_set = cmx270_green_set, | ||
| 55 | }; | ||
| 56 | |||
| 57 | #ifdef CONFIG_PM | ||
| 58 | static int cmx270led_suspend(struct platform_device *dev, pm_message_t state) | ||
| 59 | { | ||
| 60 | led_classdev_suspend(&cmx270_red_led); | ||
| 61 | led_classdev_suspend(&cmx270_green_led); | ||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static int cmx270led_resume(struct platform_device *dev) | ||
| 66 | { | ||
| 67 | led_classdev_resume(&cmx270_red_led); | ||
| 68 | led_classdev_resume(&cmx270_green_led); | ||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | #endif | ||
| 72 | |||
| 73 | static int cmx270led_probe(struct platform_device *pdev) | ||
| 74 | { | ||
| 75 | int ret; | ||
| 76 | |||
| 77 | ret = led_classdev_register(&pdev->dev, &cmx270_red_led); | ||
| 78 | if (ret < 0) | ||
| 79 | return ret; | ||
| 80 | |||
| 81 | ret = led_classdev_register(&pdev->dev, &cmx270_green_led); | ||
| 82 | if (ret < 0) | ||
| 83 | led_classdev_unregister(&cmx270_red_led); | ||
| 84 | |||
| 85 | return ret; | ||
| 86 | } | ||
| 87 | |||
| 88 | static int cmx270led_remove(struct platform_device *pdev) | ||
| 89 | { | ||
| 90 | led_classdev_unregister(&cmx270_red_led); | ||
| 91 | led_classdev_unregister(&cmx270_green_led); | ||
| 92 | return 0; | ||
| 93 | } | ||
| 94 | |||
| 95 | static struct platform_driver cmx270led_driver = { | ||
| 96 | .probe = cmx270led_probe, | ||
| 97 | .remove = cmx270led_remove, | ||
| 98 | #ifdef CONFIG_PM | ||
| 99 | .suspend = cmx270led_suspend, | ||
| 100 | .resume = cmx270led_resume, | ||
| 101 | #endif | ||
| 102 | .driver = { | ||
| 103 | .name = "cm-x270-led", | ||
| 104 | }, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static int __init cmx270led_init(void) | ||
| 108 | { | ||
| 109 | return platform_driver_register(&cmx270led_driver); | ||
| 110 | } | ||
| 111 | |||
| 112 | static void __exit cmx270led_exit(void) | ||
| 113 | { | ||
| 114 | platform_driver_unregister(&cmx270led_driver); | ||
| 115 | } | ||
| 116 | |||
| 117 | module_init(cmx270led_init); | ||
| 118 | module_exit(cmx270led_exit); | ||
| 119 | |||
| 120 | MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>"); | ||
| 121 | MODULE_DESCRIPTION("CM-x270 LED driver"); | ||
| 122 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 657901eecfce..0601e01aa2c2 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
| 24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
| 26 | #include <linux/clk.h> | ||
| 27 | #include <linux/err.h> | ||
| 26 | #include <linux/mmc/host.h> | 28 | #include <linux/mmc/host.h> |
| 27 | 29 | ||
| 28 | #include <asm/dma.h> | 30 | #include <asm/dma.h> |
| @@ -44,6 +46,8 @@ struct pxamci_host { | |||
| 44 | spinlock_t lock; | 46 | spinlock_t lock; |
| 45 | struct resource *res; | 47 | struct resource *res; |
| 46 | void __iomem *base; | 48 | void __iomem *base; |
| 49 | struct clk *clk; | ||
| 50 | unsigned long clkrate; | ||
| 47 | int irq; | 51 | int irq; |
| 48 | int dma; | 52 | int dma; |
| 49 | unsigned int clkrt; | 53 | unsigned int clkrt; |
| @@ -119,7 +123,7 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) | |||
| 119 | writel(nob, host->base + MMC_NOB); | 123 | writel(nob, host->base + MMC_NOB); |
| 120 | writel(data->blksz, host->base + MMC_BLKLEN); | 124 | writel(data->blksz, host->base + MMC_BLKLEN); |
| 121 | 125 | ||
| 122 | clks = (unsigned long long)data->timeout_ns * CLOCKRATE; | 126 | clks = (unsigned long long)data->timeout_ns * host->clkrate; |
| 123 | do_div(clks, 1000000000UL); | 127 | do_div(clks, 1000000000UL); |
| 124 | timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt); | 128 | timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt); |
| 125 | writel((timeout + 255) / 256, host->base + MMC_RDTO); | 129 | writel((timeout + 255) / 256, host->base + MMC_RDTO); |
| @@ -365,18 +369,25 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
| 365 | struct pxamci_host *host = mmc_priv(mmc); | 369 | struct pxamci_host *host = mmc_priv(mmc); |
| 366 | 370 | ||
| 367 | if (ios->clock) { | 371 | if (ios->clock) { |
| 368 | unsigned int clk = CLOCKRATE / ios->clock; | 372 | unsigned long rate = host->clkrate; |
| 369 | if (CLOCKRATE / clk > ios->clock) | 373 | unsigned int clk = rate / ios->clock; |
| 374 | |||
| 375 | /* | ||
| 376 | * clk might result in a lower divisor than we | ||
| 377 | * desire. check for that condition and adjust | ||
| 378 | * as appropriate. | ||
| 379 | */ | ||
| 380 | if (rate / clk > ios->clock) | ||
| 370 | clk <<= 1; | 381 | clk <<= 1; |
| 371 | host->clkrt = fls(clk) - 1; | 382 | host->clkrt = fls(clk) - 1; |
| 372 | pxa_set_cken(CKEN_MMC, 1); | 383 | clk_enable(host->clk); |
| 373 | 384 | ||
| 374 | /* | 385 | /* |
| 375 | * we write clkrt on the next command | 386 | * we write clkrt on the next command |
| 376 | */ | 387 | */ |
| 377 | } else { | 388 | } else { |
| 378 | pxamci_stop_clock(host); | 389 | pxamci_stop_clock(host); |
| 379 | pxa_set_cken(CKEN_MMC, 0); | 390 | clk_disable(host->clk); |
| 380 | } | 391 | } |
| 381 | 392 | ||
| 382 | if (host->power_mode != ios->power_mode) { | 393 | if (host->power_mode != ios->power_mode) { |
| @@ -462,8 +473,6 @@ static int pxamci_probe(struct platform_device *pdev) | |||
| 462 | } | 473 | } |
| 463 | 474 | ||
| 464 | mmc->ops = &pxamci_ops; | 475 | mmc->ops = &pxamci_ops; |
| 465 | mmc->f_min = CLOCKRATE_MIN; | ||
| 466 | mmc->f_max = CLOCKRATE_MAX; | ||
| 467 | 476 | ||
| 468 | /* | 477 | /* |
| 469 | * We can do SG-DMA, but we don't because we never know how much | 478 | * We can do SG-DMA, but we don't because we never know how much |
| @@ -490,6 +499,22 @@ static int pxamci_probe(struct platform_device *pdev) | |||
| 490 | host->mmc = mmc; | 499 | host->mmc = mmc; |
| 491 | host->dma = -1; | 500 | host->dma = -1; |
| 492 | host->pdata = pdev->dev.platform_data; | 501 | host->pdata = pdev->dev.platform_data; |
| 502 | |||
| 503 | host->clk = clk_get(&pdev->dev, "MMCCLK"); | ||
| 504 | if (IS_ERR(host->clk)) { | ||
| 505 | ret = PTR_ERR(host->clk); | ||
| 506 | host->clk = NULL; | ||
| 507 | goto out; | ||
| 508 | } | ||
| 509 | |||
| 510 | host->clkrate = clk_get_rate(host->clk); | ||
| 511 | |||
| 512 | /* | ||
| 513 | * Calculate minimum clock rate, rounding up. | ||
| 514 | */ | ||
| 515 | mmc->f_min = (host->clkrate + 63) / 64; | ||
| 516 | mmc->f_max = host->clkrate; | ||
| 517 | |||
| 493 | mmc->ocr_avail = host->pdata ? | 518 | mmc->ocr_avail = host->pdata ? |
| 494 | host->pdata->ocr_mask : | 519 | host->pdata->ocr_mask : |
| 495 | MMC_VDD_32_33|MMC_VDD_33_34; | 520 | MMC_VDD_32_33|MMC_VDD_33_34; |
| @@ -554,6 +579,8 @@ static int pxamci_probe(struct platform_device *pdev) | |||
| 554 | iounmap(host->base); | 579 | iounmap(host->base); |
| 555 | if (host->sg_cpu) | 580 | if (host->sg_cpu) |
| 556 | dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); | 581 | dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); |
| 582 | if (host->clk) | ||
| 583 | clk_put(host->clk); | ||
| 557 | } | 584 | } |
| 558 | if (mmc) | 585 | if (mmc) |
| 559 | mmc_free_host(mmc); | 586 | mmc_free_host(mmc); |
| @@ -588,6 +615,8 @@ static int pxamci_remove(struct platform_device *pdev) | |||
| 588 | iounmap(host->base); | 615 | iounmap(host->base); |
| 589 | dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); | 616 | dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); |
| 590 | 617 | ||
| 618 | clk_put(host->clk); | ||
| 619 | |||
| 591 | release_resource(host->res); | 620 | release_resource(host->res); |
| 592 | 621 | ||
| 593 | mmc_free_host(mmc); | 622 | mmc_free_host(mmc); |
diff --git a/drivers/mmc/host/pxamci.h b/drivers/mmc/host/pxamci.h index 3153e779d46a..748c7706f237 100644 --- a/drivers/mmc/host/pxamci.h +++ b/drivers/mmc/host/pxamci.h | |||
| @@ -88,17 +88,3 @@ | |||
| 88 | #define MMC_RXFIFO 0x0040 /* 8 bit */ | 88 | #define MMC_RXFIFO 0x0040 /* 8 bit */ |
| 89 | 89 | ||
| 90 | #define MMC_TXFIFO 0x0044 /* 8 bit */ | 90 | #define MMC_TXFIFO 0x0044 /* 8 bit */ |
| 91 | |||
| 92 | /* | ||
| 93 | * The base MMC clock rate | ||
| 94 | */ | ||
| 95 | #ifdef CONFIG_PXA27x | ||
| 96 | #define CLOCKRATE_MIN 304688 | ||
| 97 | #define CLOCKRATE_MAX 19500000 | ||
| 98 | #else | ||
| 99 | #define CLOCKRATE_MIN 312500 | ||
| 100 | #define CLOCKRATE_MAX 20000000 | ||
| 101 | #endif | ||
| 102 | |||
| 103 | #define CLOCKRATE CLOCKRATE_MAX | ||
| 104 | |||
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c index 55ff0fbe525a..8c09344f58dc 100644 --- a/drivers/net/irda/pxaficp_ir.c +++ b/drivers/net/irda/pxaficp_ir.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <linux/dma-mapping.h> | 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/pm.h> | 25 | #include <linux/pm.h> |
| 26 | #include <linux/clk.h> | ||
| 26 | 27 | ||
| 27 | #include <net/irda/irda.h> | 28 | #include <net/irda/irda.h> |
| 28 | #include <net/irda/irmod.h> | 29 | #include <net/irda/irmod.h> |
| @@ -87,8 +88,30 @@ struct pxa_irda { | |||
| 87 | 88 | ||
| 88 | struct device *dev; | 89 | struct device *dev; |
| 89 | struct pxaficp_platform_data *pdata; | 90 | struct pxaficp_platform_data *pdata; |
| 91 | struct clk *fir_clk; | ||
| 92 | struct clk *sir_clk; | ||
| 93 | struct clk *cur_clk; | ||
| 90 | }; | 94 | }; |
| 91 | 95 | ||
| 96 | static inline void pxa_irda_disable_clk(struct pxa_irda *si) | ||
| 97 | { | ||
| 98 | if (si->cur_clk) | ||
| 99 | clk_disable(si->cur_clk); | ||
| 100 | si->cur_clk = NULL; | ||
| 101 | } | ||
| 102 | |||
| 103 | static inline void pxa_irda_enable_firclk(struct pxa_irda *si) | ||
| 104 | { | ||
| 105 | si->cur_clk = si->fir_clk; | ||
| 106 | clk_enable(si->fir_clk); | ||
| 107 | } | ||
| 108 | |||
| 109 | static inline void pxa_irda_enable_sirclk(struct pxa_irda *si) | ||
| 110 | { | ||
| 111 | si->cur_clk = si->sir_clk; | ||
| 112 | clk_enable(si->sir_clk); | ||
| 113 | } | ||
| 114 | |||
| 92 | 115 | ||
| 93 | #define IS_FIR(si) ((si)->speed >= 4000000) | 116 | #define IS_FIR(si) ((si)->speed >= 4000000) |
| 94 | #define IRDA_FRAME_SIZE_LIMIT 2047 | 117 | #define IRDA_FRAME_SIZE_LIMIT 2047 |
| @@ -134,7 +157,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
| 134 | DCSR(si->rxdma) &= ~DCSR_RUN; | 157 | DCSR(si->rxdma) &= ~DCSR_RUN; |
| 135 | /* disable FICP */ | 158 | /* disable FICP */ |
| 136 | ICCR0 = 0; | 159 | ICCR0 = 0; |
| 137 | pxa_set_cken(CKEN_FICP, 0); | 160 | pxa_irda_disable_clk(si); |
| 138 | 161 | ||
| 139 | /* set board transceiver to SIR mode */ | 162 | /* set board transceiver to SIR mode */ |
| 140 | si->pdata->transceiver_mode(si->dev, IR_SIRMODE); | 163 | si->pdata->transceiver_mode(si->dev, IR_SIRMODE); |
| @@ -144,7 +167,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
| 144 | pxa_gpio_mode(GPIO47_STTXD_MD); | 167 | pxa_gpio_mode(GPIO47_STTXD_MD); |
| 145 | 168 | ||
| 146 | /* enable the STUART clock */ | 169 | /* enable the STUART clock */ |
| 147 | pxa_set_cken(CKEN_STUART, 1); | 170 | pxa_irda_enable_sirclk(si); |
| 148 | } | 171 | } |
| 149 | 172 | ||
| 150 | /* disable STUART first */ | 173 | /* disable STUART first */ |
| @@ -169,7 +192,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
| 169 | /* disable STUART */ | 192 | /* disable STUART */ |
| 170 | STIER = 0; | 193 | STIER = 0; |
| 171 | STISR = 0; | 194 | STISR = 0; |
| 172 | pxa_set_cken(CKEN_STUART, 0); | 195 | pxa_irda_disable_clk(si); |
| 173 | 196 | ||
| 174 | /* disable FICP first */ | 197 | /* disable FICP first */ |
| 175 | ICCR0 = 0; | 198 | ICCR0 = 0; |
| @@ -182,7 +205,7 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
| 182 | pxa_gpio_mode(GPIO47_ICPTXD_MD); | 205 | pxa_gpio_mode(GPIO47_ICPTXD_MD); |
| 183 | 206 | ||
| 184 | /* enable the FICP clock */ | 207 | /* enable the FICP clock */ |
| 185 | pxa_set_cken(CKEN_FICP, 1); | 208 | pxa_irda_enable_firclk(si); |
| 186 | 209 | ||
| 187 | si->speed = speed; | 210 | si->speed = speed; |
| 188 | pxa_irda_fir_dma_rx_start(si); | 211 | pxa_irda_fir_dma_rx_start(si); |
| @@ -592,16 +615,15 @@ static void pxa_irda_shutdown(struct pxa_irda *si) | |||
| 592 | STIER = 0; | 615 | STIER = 0; |
| 593 | /* disable STUART SIR mode */ | 616 | /* disable STUART SIR mode */ |
| 594 | STISR = 0; | 617 | STISR = 0; |
| 595 | /* disable the STUART clock */ | ||
| 596 | pxa_set_cken(CKEN_STUART, 0); | ||
| 597 | 618 | ||
| 598 | /* disable DMA */ | 619 | /* disable DMA */ |
| 599 | DCSR(si->txdma) &= ~DCSR_RUN; | 620 | DCSR(si->txdma) &= ~DCSR_RUN; |
| 600 | DCSR(si->rxdma) &= ~DCSR_RUN; | 621 | DCSR(si->rxdma) &= ~DCSR_RUN; |
| 601 | /* disable FICP */ | 622 | /* disable FICP */ |
| 602 | ICCR0 = 0; | 623 | ICCR0 = 0; |
| 603 | /* disable the FICP clock */ | 624 | |
| 604 | pxa_set_cken(CKEN_FICP, 0); | 625 | /* disable the STUART or FICP clocks */ |
| 626 | pxa_irda_disable_clk(si); | ||
| 605 | 627 | ||
| 606 | DRCMR17 = 0; | 628 | DRCMR17 = 0; |
| 607 | DRCMR18 = 0; | 629 | DRCMR18 = 0; |
| @@ -792,6 +814,13 @@ static int pxa_irda_probe(struct platform_device *pdev) | |||
| 792 | si->dev = &pdev->dev; | 814 | si->dev = &pdev->dev; |
| 793 | si->pdata = pdev->dev.platform_data; | 815 | si->pdata = pdev->dev.platform_data; |
| 794 | 816 | ||
| 817 | si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); | ||
| 818 | si->fir_clk = clk_get(&pdev->dev, "FICPCLK"); | ||
| 819 | if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { | ||
| 820 | err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); | ||
| 821 | goto err_mem_4; | ||
| 822 | } | ||
| 823 | |||
| 795 | /* | 824 | /* |
| 796 | * Initialise the SIR buffers | 825 | * Initialise the SIR buffers |
| 797 | */ | 826 | */ |
| @@ -831,6 +860,10 @@ static int pxa_irda_probe(struct platform_device *pdev) | |||
| 831 | err_mem_5: | 860 | err_mem_5: |
| 832 | kfree(si->rx_buff.head); | 861 | kfree(si->rx_buff.head); |
| 833 | err_mem_4: | 862 | err_mem_4: |
| 863 | if (si->sir_clk && !IS_ERR(si->sir_clk)) | ||
| 864 | clk_put(si->sir_clk); | ||
| 865 | if (si->fir_clk && !IS_ERR(si->fir_clk)) | ||
| 866 | clk_put(si->fir_clk); | ||
| 834 | free_netdev(dev); | 867 | free_netdev(dev); |
| 835 | err_mem_3: | 868 | err_mem_3: |
| 836 | release_mem_region(__PREG(FICP), 0x1c); | 869 | release_mem_region(__PREG(FICP), 0x1c); |
| @@ -850,6 +883,8 @@ static int pxa_irda_remove(struct platform_device *_dev) | |||
| 850 | unregister_netdev(dev); | 883 | unregister_netdev(dev); |
| 851 | kfree(si->tx_buff.head); | 884 | kfree(si->tx_buff.head); |
| 852 | kfree(si->rx_buff.head); | 885 | kfree(si->rx_buff.head); |
| 886 | clk_put(si->fir_clk); | ||
| 887 | clk_put(si->sir_clk); | ||
| 853 | free_netdev(dev); | 888 | free_netdev(dev); |
| 854 | } | 889 | } |
| 855 | 890 | ||
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index 24e610e711e8..7da7589d45dd 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c | |||
| @@ -173,49 +173,6 @@ MODULE_LICENSE("GPL"); | |||
| 173 | */ | 173 | */ |
| 174 | #define MII_DELAY 1 | 174 | #define MII_DELAY 1 |
| 175 | 175 | ||
| 176 | /* store this information for the driver.. */ | ||
| 177 | struct smc_local { | ||
| 178 | /* | ||
| 179 | * If I have to wait until memory is available to send a | ||
| 180 | * packet, I will store the skbuff here, until I get the | ||
| 181 | * desired memory. Then, I'll send it out and free it. | ||
| 182 | */ | ||
| 183 | struct sk_buff *pending_tx_skb; | ||
| 184 | struct tasklet_struct tx_task; | ||
| 185 | |||
| 186 | /* version/revision of the SMC91x chip */ | ||
| 187 | int version; | ||
| 188 | |||
| 189 | /* Contains the current active transmission mode */ | ||
| 190 | int tcr_cur_mode; | ||
| 191 | |||
| 192 | /* Contains the current active receive mode */ | ||
| 193 | int rcr_cur_mode; | ||
| 194 | |||
| 195 | /* Contains the current active receive/phy mode */ | ||
| 196 | int rpc_cur_mode; | ||
| 197 | int ctl_rfduplx; | ||
| 198 | int ctl_rspeed; | ||
| 199 | |||
| 200 | u32 msg_enable; | ||
| 201 | u32 phy_type; | ||
| 202 | struct mii_if_info mii; | ||
| 203 | |||
| 204 | /* work queue */ | ||
| 205 | struct work_struct phy_configure; | ||
| 206 | struct net_device *dev; | ||
| 207 | int work_pending; | ||
| 208 | |||
| 209 | spinlock_t lock; | ||
| 210 | |||
| 211 | #ifdef SMC_USE_PXA_DMA | ||
| 212 | /* DMA needs the physical address of the chip */ | ||
| 213 | u_long physaddr; | ||
| 214 | #endif | ||
| 215 | void __iomem *base; | ||
| 216 | void __iomem *datacs; | ||
| 217 | }; | ||
| 218 | |||
| 219 | #if SMC_DEBUG > 0 | 176 | #if SMC_DEBUG > 0 |
| 220 | #define DBG(n, args...) \ | 177 | #define DBG(n, args...) \ |
| 221 | do { \ | 178 | do { \ |
| @@ -2215,17 +2172,19 @@ static int smc_drv_probe(struct platform_device *pdev) | |||
| 2215 | goto out_release_attrib; | 2172 | goto out_release_attrib; |
| 2216 | } | 2173 | } |
| 2217 | 2174 | ||
| 2218 | platform_set_drvdata(pdev, ndev); | ||
| 2219 | ret = smc_probe(ndev, addr); | ||
| 2220 | if (ret != 0) | ||
| 2221 | goto out_iounmap; | ||
| 2222 | #ifdef SMC_USE_PXA_DMA | 2175 | #ifdef SMC_USE_PXA_DMA |
| 2223 | else { | 2176 | { |
| 2224 | struct smc_local *lp = netdev_priv(ndev); | 2177 | struct smc_local *lp = netdev_priv(ndev); |
| 2178 | lp->device = &pdev->dev; | ||
| 2225 | lp->physaddr = res->start; | 2179 | lp->physaddr = res->start; |
| 2226 | } | 2180 | } |
| 2227 | #endif | 2181 | #endif |
| 2228 | 2182 | ||
| 2183 | platform_set_drvdata(pdev, ndev); | ||
| 2184 | ret = smc_probe(ndev, addr); | ||
| 2185 | if (ret != 0) | ||
| 2186 | goto out_iounmap; | ||
| 2187 | |||
| 2229 | smc_request_datacs(pdev, ndev); | 2188 | smc_request_datacs(pdev, ndev); |
| 2230 | 2189 | ||
| 2231 | return 0; | 2190 | return 0; |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index af9e6bf59552..729fd28c08b5 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
| @@ -462,6 +462,52 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, | |||
| 462 | 462 | ||
| 463 | #endif | 463 | #endif |
| 464 | 464 | ||
| 465 | |||
| 466 | /* store this information for the driver.. */ | ||
| 467 | struct smc_local { | ||
| 468 | /* | ||
| 469 | * If I have to wait until memory is available to send a | ||
| 470 | * packet, I will store the skbuff here, until I get the | ||
| 471 | * desired memory. Then, I'll send it out and free it. | ||
| 472 | */ | ||
| 473 | struct sk_buff *pending_tx_skb; | ||
| 474 | struct tasklet_struct tx_task; | ||
| 475 | |||
| 476 | /* version/revision of the SMC91x chip */ | ||
| 477 | int version; | ||
| 478 | |||
| 479 | /* Contains the current active transmission mode */ | ||
| 480 | int tcr_cur_mode; | ||
| 481 | |||
| 482 | /* Contains the current active receive mode */ | ||
| 483 | int rcr_cur_mode; | ||
| 484 | |||
| 485 | /* Contains the current active receive/phy mode */ | ||
| 486 | int rpc_cur_mode; | ||
| 487 | int ctl_rfduplx; | ||
| 488 | int ctl_rspeed; | ||
| 489 | |||
| 490 | u32 msg_enable; | ||
| 491 | u32 phy_type; | ||
| 492 | struct mii_if_info mii; | ||
| 493 | |||
| 494 | /* work queue */ | ||
| 495 | struct work_struct phy_configure; | ||
| 496 | struct net_device *dev; | ||
| 497 | int work_pending; | ||
| 498 | |||
| 499 | spinlock_t lock; | ||
| 500 | |||
| 501 | #ifdef SMC_USE_PXA_DMA | ||
| 502 | /* DMA needs the physical address of the chip */ | ||
| 503 | u_long physaddr; | ||
| 504 | struct device *device; | ||
| 505 | #endif | ||
| 506 | void __iomem *base; | ||
| 507 | void __iomem *datacs; | ||
| 508 | }; | ||
| 509 | |||
| 510 | |||
| 465 | #ifdef SMC_USE_PXA_DMA | 511 | #ifdef SMC_USE_PXA_DMA |
| 466 | /* | 512 | /* |
| 467 | * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is | 513 | * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is |
| @@ -476,11 +522,12 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, | |||
| 476 | #ifdef SMC_insl | 522 | #ifdef SMC_insl |
| 477 | #undef SMC_insl | 523 | #undef SMC_insl |
| 478 | #define SMC_insl(a, r, p, l) \ | 524 | #define SMC_insl(a, r, p, l) \ |
| 479 | smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l) | 525 | smc_pxa_dma_insl(a, lp, r, dev->dma, p, l) |
| 480 | static inline void | 526 | static inline void |
| 481 | smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | 527 | smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, |
| 482 | u_char *buf, int len) | 528 | u_char *buf, int len) |
| 483 | { | 529 | { |
| 530 | u_long physaddr = lp->physaddr; | ||
| 484 | dma_addr_t dmabuf; | 531 | dma_addr_t dmabuf; |
| 485 | 532 | ||
| 486 | /* fallback if no DMA available */ | 533 | /* fallback if no DMA available */ |
| @@ -497,7 +544,7 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | |||
| 497 | } | 544 | } |
| 498 | 545 | ||
| 499 | len *= 4; | 546 | len *= 4; |
| 500 | dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); | 547 | dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); |
| 501 | DCSR(dma) = DCSR_NODESC; | 548 | DCSR(dma) = DCSR_NODESC; |
| 502 | DTADR(dma) = dmabuf; | 549 | DTADR(dma) = dmabuf; |
| 503 | DSADR(dma) = physaddr + reg; | 550 | DSADR(dma) = physaddr + reg; |
| @@ -507,18 +554,19 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | |||
| 507 | while (!(DCSR(dma) & DCSR_STOPSTATE)) | 554 | while (!(DCSR(dma) & DCSR_STOPSTATE)) |
| 508 | cpu_relax(); | 555 | cpu_relax(); |
| 509 | DCSR(dma) = 0; | 556 | DCSR(dma) = 0; |
| 510 | dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); | 557 | dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); |
| 511 | } | 558 | } |
| 512 | #endif | 559 | #endif |
| 513 | 560 | ||
| 514 | #ifdef SMC_insw | 561 | #ifdef SMC_insw |
| 515 | #undef SMC_insw | 562 | #undef SMC_insw |
| 516 | #define SMC_insw(a, r, p, l) \ | 563 | #define SMC_insw(a, r, p, l) \ |
| 517 | smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l) | 564 | smc_pxa_dma_insw(a, lp, r, dev->dma, p, l) |
| 518 | static inline void | 565 | static inline void |
| 519 | smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | 566 | smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, |
| 520 | u_char *buf, int len) | 567 | u_char *buf, int len) |
| 521 | { | 568 | { |
| 569 | u_long physaddr = lp->physaddr; | ||
| 522 | dma_addr_t dmabuf; | 570 | dma_addr_t dmabuf; |
| 523 | 571 | ||
| 524 | /* fallback if no DMA available */ | 572 | /* fallback if no DMA available */ |
| @@ -535,7 +583,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | |||
| 535 | } | 583 | } |
| 536 | 584 | ||
| 537 | len *= 2; | 585 | len *= 2; |
| 538 | dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); | 586 | dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); |
| 539 | DCSR(dma) = DCSR_NODESC; | 587 | DCSR(dma) = DCSR_NODESC; |
| 540 | DTADR(dma) = dmabuf; | 588 | DTADR(dma) = dmabuf; |
| 541 | DSADR(dma) = physaddr + reg; | 589 | DSADR(dma) = physaddr + reg; |
| @@ -545,7 +593,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, | |||
| 545 | while (!(DCSR(dma) & DCSR_STOPSTATE)) | 593 | while (!(DCSR(dma) & DCSR_STOPSTATE)) |
| 546 | cpu_relax(); | 594 | cpu_relax(); |
| 547 | DCSR(dma) = 0; | 595 | DCSR(dma) = 0; |
| 548 | dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); | 596 | dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); |
| 549 | } | 597 | } |
| 550 | #endif | 598 | #endif |
| 551 | 599 | ||
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 4276965517f2..dc7a4cb5d270 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile | |||
| @@ -69,4 +69,5 @@ sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o | |||
| 69 | pxa2xx_cs-$(CONFIG_ARCH_LUBBOCK) += pxa2xx_lubbock.o sa1111_generic.o | 69 | pxa2xx_cs-$(CONFIG_ARCH_LUBBOCK) += pxa2xx_lubbock.o sa1111_generic.o |
| 70 | pxa2xx_cs-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o | 70 | pxa2xx_cs-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o |
| 71 | pxa2xx_cs-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o | 71 | pxa2xx_cs-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o |
| 72 | pxa2xx_cs-$(CONFIG_MACH_ARMCORE) += pxa2xx_cm_x270.o | ||
| 72 | 73 | ||
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c new file mode 100644 index 000000000000..fbf2f3a6984c --- /dev/null +++ b/drivers/pcmcia/pxa2xx_cm_x270.c | |||
| @@ -0,0 +1,175 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/pcmcia/pxa/pxa_cm_x270.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * Compulab Ltd., 2003, 2007 | ||
| 9 | * Mike Rapoport <mike@compulab.co.il> | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/sched.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/irq.h> | ||
| 17 | #include <linux/delay.h> | ||
| 18 | |||
| 19 | #include <pcmcia/ss.h> | ||
| 20 | #include <asm/hardware.h> | ||
| 21 | |||
| 22 | #include <asm/arch/pxa-regs.h> | ||
| 23 | #include <asm/arch/cm-x270.h> | ||
| 24 | |||
| 25 | #include "soc_common.h" | ||
| 26 | |||
| 27 | static struct pcmcia_irqs irqs[] = { | ||
| 28 | { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, | ||
| 29 | { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" }, | ||
| 30 | }; | ||
| 31 | |||
| 32 | static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | ||
| 33 | { | ||
| 34 | GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) | | ||
| 35 | GPIO_bit(GPIO49_nPWE) | | ||
| 36 | GPIO_bit(GPIO50_nPIOR) | | ||
| 37 | GPIO_bit(GPIO51_nPIOW) | | ||
| 38 | GPIO_bit(GPIO85_nPCE_1) | | ||
| 39 | GPIO_bit(GPIO54_nPCE_2); | ||
| 40 | |||
| 41 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 42 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 43 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 44 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 45 | pxa_gpio_mode(GPIO85_nPCE_1_MD); | ||
| 46 | pxa_gpio_mode(GPIO54_nPCE_2_MD); | ||
| 47 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 48 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 49 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 50 | |||
| 51 | /* Reset signal */ | ||
| 52 | pxa_gpio_mode(GPIO53_nPCE_2 | GPIO_OUT); | ||
| 53 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
| 54 | |||
| 55 | set_irq_type(PCMCIA_S0_CD_VALID, IRQ_TYPE_EDGE_BOTH); | ||
| 56 | set_irq_type(PCMCIA_S1_CD_VALID, IRQ_TYPE_EDGE_BOTH); | ||
| 57 | |||
| 58 | /* irq's for slots: */ | ||
| 59 | set_irq_type(PCMCIA_S0_RDYINT, IRQ_TYPE_EDGE_FALLING); | ||
| 60 | set_irq_type(PCMCIA_S1_RDYINT, IRQ_TYPE_EDGE_FALLING); | ||
| 61 | |||
| 62 | skt->irq = (skt->nr == 0) ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; | ||
| 63 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | ||
| 64 | } | ||
| 65 | |||
| 66 | static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt) | ||
| 67 | { | ||
| 68 | soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs)); | ||
| 69 | |||
| 70 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_CD_VALID), IRQ_TYPE_NONE); | ||
| 71 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_CD_VALID), IRQ_TYPE_NONE); | ||
| 72 | |||
| 73 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_RDYINT), IRQ_TYPE_NONE); | ||
| 74 | set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_RDYINT), IRQ_TYPE_NONE); | ||
| 75 | } | ||
| 76 | |||
| 77 | |||
| 78 | static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, | ||
| 79 | struct pcmcia_state *state) | ||
| 80 | { | ||
| 81 | state->detect = (PCC_DETECT(skt->nr) == 0) ? 1 : 0; | ||
| 82 | state->ready = (PCC_READY(skt->nr) == 0) ? 0 : 1; | ||
| 83 | state->bvd1 = 1; | ||
| 84 | state->bvd2 = 1; | ||
| 85 | state->vs_3v = 0; | ||
| 86 | state->vs_Xv = 0; | ||
| 87 | state->wrprot = 0; /* not available */ | ||
| 88 | } | ||
| 89 | |||
| 90 | |||
| 91 | static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, | ||
| 92 | const socket_state_t *state) | ||
| 93 | { | ||
| 94 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
| 95 | pxa_gpio_mode(GPIO49_nPWE | GPIO_OUT); | ||
| 96 | |||
| 97 | switch (skt->nr) { | ||
| 98 | case 0: | ||
| 99 | if (state->flags & SS_RESET) { | ||
| 100 | GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
| 101 | GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
| 102 | udelay(10); | ||
| 103 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
| 104 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
| 105 | } | ||
| 106 | break; | ||
| 107 | case 1: | ||
| 108 | if (state->flags & SS_RESET) { | ||
| 109 | GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
| 110 | GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
| 111 | udelay(10); | ||
| 112 | GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2); | ||
| 113 | GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE); | ||
| 114 | } | ||
| 115 | break; | ||
| 116 | } | ||
| 117 | |||
| 118 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 119 | |||
| 120 | return 0; | ||
| 121 | } | ||
| 122 | |||
| 123 | static void cmx270_pcmcia_socket_init(struct soc_pcmcia_socket *skt) | ||
| 124 | { | ||
| 125 | } | ||
| 126 | |||
| 127 | static void cmx270_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) | ||
| 128 | { | ||
| 129 | } | ||
| 130 | |||
| 131 | |||
| 132 | static struct pcmcia_low_level cmx270_pcmcia_ops = { | ||
| 133 | .owner = THIS_MODULE, | ||
| 134 | .hw_init = cmx270_pcmcia_hw_init, | ||
| 135 | .hw_shutdown = cmx270_pcmcia_shutdown, | ||
| 136 | .socket_state = cmx270_pcmcia_socket_state, | ||
| 137 | .configure_socket = cmx270_pcmcia_configure_socket, | ||
| 138 | .socket_init = cmx270_pcmcia_socket_init, | ||
| 139 | .socket_suspend = cmx270_pcmcia_socket_suspend, | ||
| 140 | .nr = 2, | ||
| 141 | }; | ||
| 142 | |||
| 143 | static struct platform_device *cmx270_pcmcia_device; | ||
| 144 | |||
| 145 | static int __init cmx270_pcmcia_init(void) | ||
| 146 | { | ||
| 147 | int ret; | ||
| 148 | |||
| 149 | cmx270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); | ||
| 150 | |||
| 151 | if (!cmx270_pcmcia_device) | ||
| 152 | return -ENOMEM; | ||
| 153 | |||
| 154 | cmx270_pcmcia_device->dev.platform_data = &cmx270_pcmcia_ops; | ||
| 155 | |||
| 156 | printk(KERN_INFO "Registering cm-x270 PCMCIA interface.\n"); | ||
| 157 | ret = platform_device_add(cmx270_pcmcia_device); | ||
| 158 | |||
| 159 | if (ret) | ||
| 160 | platform_device_put(cmx270_pcmcia_device); | ||
| 161 | |||
| 162 | return ret; | ||
| 163 | } | ||
| 164 | |||
| 165 | static void __exit cmx270_pcmcia_exit(void) | ||
| 166 | { | ||
| 167 | platform_device_unregister(cmx270_pcmcia_device); | ||
| 168 | } | ||
| 169 | |||
| 170 | module_init(cmx270_pcmcia_init); | ||
| 171 | module_exit(cmx270_pcmcia_exit); | ||
| 172 | |||
| 173 | MODULE_LICENSE("GPL"); | ||
| 174 | MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>"); | ||
| 175 | MODULE_DESCRIPTION("CM-x270 PCMCIA driver"); | ||
diff --git a/drivers/pcmcia/pxa2xx_lubbock.c b/drivers/pcmcia/pxa2xx_lubbock.c index 5e9b9a3fd027..1510d6cde3e2 100644 --- a/drivers/pcmcia/pxa2xx_lubbock.c +++ b/drivers/pcmcia/pxa2xx_lubbock.c | |||
| @@ -30,35 +30,6 @@ | |||
| 30 | #include "sa1111_generic.h" | 30 | #include "sa1111_generic.h" |
| 31 | 31 | ||
| 32 | static int | 32 | static int |
| 33 | lubbock_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | ||
| 34 | { | ||
| 35 | /* | ||
| 36 | * Setup default state of GPIO outputs | ||
| 37 | * before we enable them as outputs. | ||
| 38 | */ | ||
| 39 | GPSR(GPIO48_nPOE) = | ||
| 40 | GPIO_bit(GPIO48_nPOE) | | ||
| 41 | GPIO_bit(GPIO49_nPWE) | | ||
| 42 | GPIO_bit(GPIO50_nPIOR) | | ||
| 43 | GPIO_bit(GPIO51_nPIOW) | | ||
| 44 | GPIO_bit(GPIO52_nPCE_1) | | ||
| 45 | GPIO_bit(GPIO53_nPCE_2); | ||
| 46 | |||
| 47 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 48 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 49 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 50 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 51 | pxa_gpio_mode(GPIO52_nPCE_1_MD); | ||
| 52 | pxa_gpio_mode(GPIO53_nPCE_2_MD); | ||
| 53 | pxa_gpio_mode(GPIO54_pSKTSEL_MD); | ||
| 54 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 55 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 56 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 57 | |||
| 58 | return sa1111_pcmcia_hw_init(skt); | ||
| 59 | } | ||
| 60 | |||
| 61 | static int | ||
| 62 | lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, | 33 | lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, |
| 63 | const socket_state_t *state) | 34 | const socket_state_t *state) |
| 64 | { | 35 | { |
| @@ -230,7 +201,7 @@ lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, | |||
| 230 | 201 | ||
| 231 | static struct pcmcia_low_level lubbock_pcmcia_ops = { | 202 | static struct pcmcia_low_level lubbock_pcmcia_ops = { |
| 232 | .owner = THIS_MODULE, | 203 | .owner = THIS_MODULE, |
| 233 | .hw_init = lubbock_pcmcia_hw_init, | 204 | .hw_init = sa1111_pcmcia_hw_init, |
| 234 | .hw_shutdown = sa1111_pcmcia_hw_shutdown, | 205 | .hw_shutdown = sa1111_pcmcia_hw_shutdown, |
| 235 | .socket_state = sa1111_pcmcia_socket_state, | 206 | .socket_state = sa1111_pcmcia_socket_state, |
| 236 | .configure_socket = lubbock_pcmcia_configure_socket, | 207 | .configure_socket = lubbock_pcmcia_configure_socket, |
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c index f6722ba0dd1e..6fa5eaaab8af 100644 --- a/drivers/pcmcia/pxa2xx_mainstone.c +++ b/drivers/pcmcia/pxa2xx_mainstone.c | |||
| @@ -43,24 +43,6 @@ static int mst_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
| 43 | * Setup default state of GPIO outputs | 43 | * Setup default state of GPIO outputs |
| 44 | * before we enable them as outputs. | 44 | * before we enable them as outputs. |
| 45 | */ | 45 | */ |
| 46 | GPSR(GPIO48_nPOE) = | ||
| 47 | GPIO_bit(GPIO48_nPOE) | | ||
| 48 | GPIO_bit(GPIO49_nPWE) | | ||
| 49 | GPIO_bit(GPIO50_nPIOR) | | ||
| 50 | GPIO_bit(GPIO51_nPIOW) | | ||
| 51 | GPIO_bit(GPIO85_nPCE_1) | | ||
| 52 | GPIO_bit(GPIO54_nPCE_2); | ||
| 53 | |||
| 54 | pxa_gpio_mode(GPIO48_nPOE_MD); | ||
| 55 | pxa_gpio_mode(GPIO49_nPWE_MD); | ||
| 56 | pxa_gpio_mode(GPIO50_nPIOR_MD); | ||
| 57 | pxa_gpio_mode(GPIO51_nPIOW_MD); | ||
| 58 | pxa_gpio_mode(GPIO85_nPCE_1_MD); | ||
| 59 | pxa_gpio_mode(GPIO54_nPCE_2_MD); | ||
| 60 | pxa_gpio_mode(GPIO79_pSKTSEL_MD); | ||
| 61 | pxa_gpio_mode(GPIO55_nPREG_MD); | ||
| 62 | pxa_gpio_mode(GPIO56_nPWAIT_MD); | ||
| 63 | pxa_gpio_mode(GPIO57_nIOIS16_MD); | ||
| 64 | 46 | ||
| 65 | skt->irq = (skt->nr == 0) ? MAINSTONE_S0_IRQ : MAINSTONE_S1_IRQ; | 47 | skt->irq = (skt->nr == 0) ? MAINSTONE_S0_IRQ : MAINSTONE_S1_IRQ; |
| 66 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | 48 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); |
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index e9c6cb391a23..af3a011b2b24 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | #include <linux/tty.h> | 42 | #include <linux/tty.h> |
| 43 | #include <linux/tty_flip.h> | 43 | #include <linux/tty_flip.h> |
| 44 | #include <linux/serial_core.h> | 44 | #include <linux/serial_core.h> |
| 45 | #include <linux/clk.h> | ||
| 45 | 46 | ||
| 46 | #include <asm/io.h> | 47 | #include <asm/io.h> |
| 47 | #include <asm/hardware.h> | 48 | #include <asm/hardware.h> |
| @@ -55,7 +56,7 @@ struct uart_pxa_port { | |||
| 55 | unsigned char lcr; | 56 | unsigned char lcr; |
| 56 | unsigned char mcr; | 57 | unsigned char mcr; |
| 57 | unsigned int lsr_break_flag; | 58 | unsigned int lsr_break_flag; |
| 58 | unsigned int cken; | 59 | struct clk *clk; |
| 59 | char *name; | 60 | char *name; |
| 60 | }; | 61 | }; |
| 61 | 62 | ||
| @@ -351,6 +352,8 @@ static int serial_pxa_startup(struct uart_port *port) | |||
| 351 | else | 352 | else |
| 352 | up->mcr = 0; | 353 | up->mcr = 0; |
| 353 | 354 | ||
| 355 | up->port.uartclk = clk_get_rate(up->clk); | ||
| 356 | |||
| 354 | /* | 357 | /* |
| 355 | * Allocate the IRQ | 358 | * Allocate the IRQ |
| 356 | */ | 359 | */ |
| @@ -546,9 +549,11 @@ serial_pxa_pm(struct uart_port *port, unsigned int state, | |||
| 546 | unsigned int oldstate) | 549 | unsigned int oldstate) |
| 547 | { | 550 | { |
| 548 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; | 551 | struct uart_pxa_port *up = (struct uart_pxa_port *)port; |
| 549 | pxa_set_cken(up->cken, !state); | 552 | |
| 550 | if (!state) | 553 | if (!state) |
| 551 | udelay(1); | 554 | clk_enable(up->clk); |
| 555 | else | ||
| 556 | clk_disable(up->clk); | ||
| 552 | } | 557 | } |
| 553 | 558 | ||
| 554 | static void serial_pxa_release_port(struct uart_port *port) | 559 | static void serial_pxa_release_port(struct uart_port *port) |
| @@ -582,7 +587,7 @@ serial_pxa_type(struct uart_port *port) | |||
| 582 | 587 | ||
| 583 | #ifdef CONFIG_SERIAL_PXA_CONSOLE | 588 | #ifdef CONFIG_SERIAL_PXA_CONSOLE |
| 584 | 589 | ||
| 585 | static struct uart_pxa_port serial_pxa_ports[]; | 590 | static struct uart_pxa_port *serial_pxa_ports[4]; |
| 586 | static struct uart_driver serial_pxa_reg; | 591 | static struct uart_driver serial_pxa_reg; |
| 587 | 592 | ||
| 588 | #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) | 593 | #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) |
| @@ -632,9 +637,11 @@ static void serial_pxa_console_putchar(struct uart_port *port, int ch) | |||
| 632 | static void | 637 | static void |
| 633 | serial_pxa_console_write(struct console *co, const char *s, unsigned int count) | 638 | serial_pxa_console_write(struct console *co, const char *s, unsigned int count) |
| 634 | { | 639 | { |
| 635 | struct uart_pxa_port *up = &serial_pxa_ports[co->index]; | 640 | struct uart_pxa_port *up = serial_pxa_ports[co->index]; |
| 636 | unsigned int ier; | 641 | unsigned int ier; |
| 637 | 642 | ||
| 643 | clk_enable(up->clk); | ||
| 644 | |||
| 638 | /* | 645 | /* |
| 639 | * First save the IER then disable the interrupts | 646 | * First save the IER then disable the interrupts |
| 640 | */ | 647 | */ |
| @@ -649,6 +656,8 @@ serial_pxa_console_write(struct console *co, const char *s, unsigned int count) | |||
| 649 | */ | 656 | */ |
| 650 | wait_for_xmitr(up); | 657 | wait_for_xmitr(up); |
| 651 | serial_out(up, UART_IER, ier); | 658 | serial_out(up, UART_IER, ier); |
| 659 | |||
| 660 | clk_disable(up->clk); | ||
| 652 | } | 661 | } |
| 653 | 662 | ||
| 654 | static int __init | 663 | static int __init |
| @@ -662,7 +671,9 @@ serial_pxa_console_setup(struct console *co, char *options) | |||
| 662 | 671 | ||
| 663 | if (co->index == -1 || co->index >= serial_pxa_reg.nr) | 672 | if (co->index == -1 || co->index >= serial_pxa_reg.nr) |
| 664 | co->index = 0; | 673 | co->index = 0; |
| 665 | up = &serial_pxa_ports[co->index]; | 674 | up = serial_pxa_ports[co->index]; |
| 675 | if (!up) | ||
| 676 | return -ENODEV; | ||
| 666 | 677 | ||
| 667 | if (options) | 678 | if (options) |
| 668 | uart_parse_options(options, &baud, &parity, &bits, &flow); | 679 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| @@ -680,15 +691,6 @@ static struct console serial_pxa_console = { | |||
| 680 | .data = &serial_pxa_reg, | 691 | .data = &serial_pxa_reg, |
| 681 | }; | 692 | }; |
| 682 | 693 | ||
| 683 | static int __init | ||
| 684 | serial_pxa_console_init(void) | ||
| 685 | { | ||
| 686 | register_console(&serial_pxa_console); | ||
| 687 | return 0; | ||
| 688 | } | ||
| 689 | |||
| 690 | console_initcall(serial_pxa_console_init); | ||
| 691 | |||
| 692 | #define PXA_CONSOLE &serial_pxa_console | 694 | #define PXA_CONSOLE &serial_pxa_console |
| 693 | #else | 695 | #else |
| 694 | #define PXA_CONSOLE NULL | 696 | #define PXA_CONSOLE NULL |
| @@ -714,73 +716,13 @@ struct uart_ops serial_pxa_pops = { | |||
| 714 | .verify_port = serial_pxa_verify_port, | 716 | .verify_port = serial_pxa_verify_port, |
| 715 | }; | 717 | }; |
| 716 | 718 | ||
| 717 | static struct uart_pxa_port serial_pxa_ports[] = { | ||
| 718 | { /* FFUART */ | ||
| 719 | .name = "FFUART", | ||
| 720 | .cken = CKEN_FFUART, | ||
| 721 | .port = { | ||
| 722 | .type = PORT_PXA, | ||
| 723 | .iotype = UPIO_MEM, | ||
| 724 | .membase = (void *)&FFUART, | ||
| 725 | .mapbase = __PREG(FFUART), | ||
| 726 | .irq = IRQ_FFUART, | ||
| 727 | .uartclk = 921600 * 16, | ||
| 728 | .fifosize = 64, | ||
| 729 | .ops = &serial_pxa_pops, | ||
| 730 | .line = 0, | ||
| 731 | }, | ||
| 732 | }, { /* BTUART */ | ||
| 733 | .name = "BTUART", | ||
| 734 | .cken = CKEN_BTUART, | ||
| 735 | .port = { | ||
| 736 | .type = PORT_PXA, | ||
| 737 | .iotype = UPIO_MEM, | ||
| 738 | .membase = (void *)&BTUART, | ||
| 739 | .mapbase = __PREG(BTUART), | ||
| 740 | .irq = IRQ_BTUART, | ||
| 741 | .uartclk = 921600 * 16, | ||
| 742 | .fifosize = 64, | ||
| 743 | .ops = &serial_pxa_pops, | ||
| 744 | .line = 1, | ||
| 745 | }, | ||
| 746 | }, { /* STUART */ | ||
| 747 | .name = "STUART", | ||
| 748 | .cken = CKEN_STUART, | ||
| 749 | .port = { | ||
| 750 | .type = PORT_PXA, | ||
| 751 | .iotype = UPIO_MEM, | ||
| 752 | .membase = (void *)&STUART, | ||
| 753 | .mapbase = __PREG(STUART), | ||
| 754 | .irq = IRQ_STUART, | ||
| 755 | .uartclk = 921600 * 16, | ||
| 756 | .fifosize = 64, | ||
| 757 | .ops = &serial_pxa_pops, | ||
| 758 | .line = 2, | ||
| 759 | }, | ||
| 760 | }, { /* HWUART */ | ||
| 761 | .name = "HWUART", | ||
| 762 | .cken = CKEN_HWUART, | ||
| 763 | .port = { | ||
| 764 | .type = PORT_PXA, | ||
| 765 | .iotype = UPIO_MEM, | ||
| 766 | .membase = (void *)&HWUART, | ||
| 767 | .mapbase = __PREG(HWUART), | ||
| 768 | .irq = IRQ_HWUART, | ||
| 769 | .uartclk = 921600 * 16, | ||
| 770 | .fifosize = 64, | ||
| 771 | .ops = &serial_pxa_pops, | ||
| 772 | .line = 3, | ||
| 773 | }, | ||
| 774 | } | ||
| 775 | }; | ||
| 776 | |||
| 777 | static struct uart_driver serial_pxa_reg = { | 719 | static struct uart_driver serial_pxa_reg = { |
| 778 | .owner = THIS_MODULE, | 720 | .owner = THIS_MODULE, |
| 779 | .driver_name = "PXA serial", | 721 | .driver_name = "PXA serial", |
| 780 | .dev_name = "ttyS", | 722 | .dev_name = "ttyS", |
| 781 | .major = TTY_MAJOR, | 723 | .major = TTY_MAJOR, |
| 782 | .minor = 64, | 724 | .minor = 64, |
| 783 | .nr = ARRAY_SIZE(serial_pxa_ports), | 725 | .nr = 4, |
| 784 | .cons = PXA_CONSOLE, | 726 | .cons = PXA_CONSOLE, |
| 785 | }; | 727 | }; |
| 786 | 728 | ||
| @@ -806,10 +748,68 @@ static int serial_pxa_resume(struct platform_device *dev) | |||
| 806 | 748 | ||
| 807 | static int serial_pxa_probe(struct platform_device *dev) | 749 | static int serial_pxa_probe(struct platform_device *dev) |
| 808 | { | 750 | { |
| 809 | serial_pxa_ports[dev->id].port.dev = &dev->dev; | 751 | struct uart_pxa_port *sport; |
| 810 | uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port); | 752 | struct resource *mmres, *irqres; |
| 811 | platform_set_drvdata(dev, &serial_pxa_ports[dev->id]); | 753 | int ret; |
| 754 | |||
| 755 | mmres = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
| 756 | irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0); | ||
| 757 | if (!mmres || !irqres) | ||
| 758 | return -ENODEV; | ||
| 759 | |||
| 760 | sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL); | ||
| 761 | if (!sport) | ||
| 762 | return -ENOMEM; | ||
| 763 | |||
| 764 | sport->clk = clk_get(&dev->dev, "UARTCLK"); | ||
| 765 | if (IS_ERR(sport->clk)) { | ||
| 766 | ret = PTR_ERR(sport->clk); | ||
| 767 | goto err_free; | ||
| 768 | } | ||
| 769 | |||
| 770 | sport->port.type = PORT_PXA; | ||
| 771 | sport->port.iotype = UPIO_MEM; | ||
| 772 | sport->port.mapbase = mmres->start; | ||
| 773 | sport->port.irq = irqres->start; | ||
| 774 | sport->port.fifosize = 64; | ||
| 775 | sport->port.ops = &serial_pxa_pops; | ||
| 776 | sport->port.line = dev->id; | ||
| 777 | sport->port.dev = &dev->dev; | ||
| 778 | sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; | ||
| 779 | sport->port.uartclk = clk_get_rate(sport->clk); | ||
| 780 | |||
| 781 | /* | ||
| 782 | * Is it worth keeping this? | ||
| 783 | */ | ||
| 784 | if (mmres->start == __PREG(FFUART)) | ||
| 785 | sport->name = "FFUART"; | ||
| 786 | else if (mmres->start == __PREG(BTUART)) | ||
| 787 | sport->name = "BTUART"; | ||
| 788 | else if (mmres->start == __PREG(STUART)) | ||
| 789 | sport->name = "STUART"; | ||
| 790 | else if (mmres->start == __PREG(HWUART)) | ||
| 791 | sport->name = "HWUART"; | ||
| 792 | else | ||
| 793 | sport->name = "???"; | ||
| 794 | |||
| 795 | sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1); | ||
| 796 | if (!sport->port.membase) { | ||
| 797 | ret = -ENOMEM; | ||
| 798 | goto err_clk; | ||
| 799 | } | ||
| 800 | |||
| 801 | serial_pxa_ports[dev->id] = sport; | ||
| 802 | |||
| 803 | uart_add_one_port(&serial_pxa_reg, &sport->port); | ||
| 804 | platform_set_drvdata(dev, sport); | ||
| 805 | |||
| 812 | return 0; | 806 | return 0; |
| 807 | |||
| 808 | err_clk: | ||
| 809 | clk_put(sport->clk); | ||
| 810 | err_free: | ||
| 811 | kfree(sport); | ||
| 812 | return ret; | ||
| 813 | } | 813 | } |
| 814 | 814 | ||
| 815 | static int serial_pxa_remove(struct platform_device *dev) | 815 | static int serial_pxa_remove(struct platform_device *dev) |
| @@ -818,8 +818,9 @@ static int serial_pxa_remove(struct platform_device *dev) | |||
| 818 | 818 | ||
| 819 | platform_set_drvdata(dev, NULL); | 819 | platform_set_drvdata(dev, NULL); |
| 820 | 820 | ||
| 821 | if (sport) | 821 | uart_remove_one_port(&serial_pxa_reg, &sport->port); |
| 822 | uart_remove_one_port(&serial_pxa_reg, &sport->port); | 822 | clk_put(sport->clk); |
| 823 | kfree(sport); | ||
| 823 | 824 | ||
| 824 | return 0; | 825 | return 0; |
| 825 | } | 826 | } |
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c index a055f58f342f..a3bd3a3f41f3 100644 --- a/drivers/serial/serial_core.c +++ b/drivers/serial/serial_core.c | |||
| @@ -2127,6 +2127,14 @@ uart_configure_port(struct uart_driver *drv, struct uart_state *state, | |||
| 2127 | spin_unlock_irqrestore(&port->lock, flags); | 2127 | spin_unlock_irqrestore(&port->lock, flags); |
| 2128 | 2128 | ||
| 2129 | /* | 2129 | /* |
| 2130 | * If this driver supports console, and it hasn't been | ||
| 2131 | * successfully registered yet, try to re-register it. | ||
| 2132 | * It may be that the port was not available. | ||
| 2133 | */ | ||
| 2134 | if (port->cons && !(port->cons->flags & CON_ENABLED)) | ||
| 2135 | register_console(port->cons); | ||
| 2136 | |||
| 2137 | /* | ||
| 2130 | * Power down all ports by default, except the | 2138 | * Power down all ports by default, except the |
| 2131 | * console if we have one. | 2139 | * console if we have one. |
| 2132 | */ | 2140 | */ |
| @@ -2286,6 +2294,7 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) | |||
| 2286 | } | 2294 | } |
| 2287 | 2295 | ||
| 2288 | state->port = port; | 2296 | state->port = port; |
| 2297 | state->pm_state = -1; | ||
| 2289 | 2298 | ||
| 2290 | port->cons = drv->cons; | 2299 | port->cons = drv->cons; |
| 2291 | port->info = state->info; | 2300 | port->info = state->info; |
| @@ -2308,15 +2317,6 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) | |||
| 2308 | tty_register_device(drv->tty_driver, port->line, port->dev); | 2317 | tty_register_device(drv->tty_driver, port->line, port->dev); |
| 2309 | 2318 | ||
| 2310 | /* | 2319 | /* |
| 2311 | * If this driver supports console, and it hasn't been | ||
| 2312 | * successfully registered yet, try to re-register it. | ||
| 2313 | * It may be that the port was not available. | ||
| 2314 | */ | ||
| 2315 | if (port->type != PORT_UNKNOWN && | ||
| 2316 | port->cons && !(port->cons->flags & CON_ENABLED)) | ||
| 2317 | register_console(port->cons); | ||
| 2318 | |||
| 2319 | /* | ||
| 2320 | * Ensure UPF_DEAD is not set. | 2320 | * Ensure UPF_DEAD is not set. |
| 2321 | */ | 2321 | */ |
| 2322 | port->flags &= ~UPF_DEAD; | 2322 | port->flags &= ~UPF_DEAD; |
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa2xx_udc.c index 3e715082de36..3173b39f0bfd 100644 --- a/drivers/usb/gadget/pxa2xx_udc.c +++ b/drivers/usb/gadget/pxa2xx_udc.c | |||
| @@ -43,6 +43,8 @@ | |||
| 43 | #include <linux/platform_device.h> | 43 | #include <linux/platform_device.h> |
| 44 | #include <linux/dma-mapping.h> | 44 | #include <linux/dma-mapping.h> |
| 45 | #include <linux/irq.h> | 45 | #include <linux/irq.h> |
| 46 | #include <linux/clk.h> | ||
| 47 | #include <linux/err.h> | ||
| 46 | 48 | ||
| 47 | #include <asm/byteorder.h> | 49 | #include <asm/byteorder.h> |
| 48 | #include <asm/dma.h> | 50 | #include <asm/dma.h> |
| @@ -1157,7 +1159,7 @@ static void udc_disable(struct pxa2xx_udc *dev) | |||
| 1157 | 1159 | ||
| 1158 | #ifdef CONFIG_ARCH_PXA | 1160 | #ifdef CONFIG_ARCH_PXA |
| 1159 | /* Disable clock for USB device */ | 1161 | /* Disable clock for USB device */ |
| 1160 | pxa_set_cken(CKEN_USB, 0); | 1162 | clk_disable(dev->clk); |
| 1161 | #endif | 1163 | #endif |
| 1162 | 1164 | ||
| 1163 | ep0_idle (dev); | 1165 | ep0_idle (dev); |
| @@ -1202,8 +1204,7 @@ static void udc_enable (struct pxa2xx_udc *dev) | |||
| 1202 | 1204 | ||
| 1203 | #ifdef CONFIG_ARCH_PXA | 1205 | #ifdef CONFIG_ARCH_PXA |
| 1204 | /* Enable clock for USB device */ | 1206 | /* Enable clock for USB device */ |
| 1205 | pxa_set_cken(CKEN_USB, 1); | 1207 | clk_enable(dev->clk); |
| 1206 | udelay(5); | ||
| 1207 | #endif | 1208 | #endif |
| 1208 | 1209 | ||
| 1209 | /* try to clear these bits before we enable the udc */ | 1210 | /* try to clear these bits before we enable the udc */ |
| @@ -2137,6 +2138,14 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
| 2137 | if (irq < 0) | 2138 | if (irq < 0) |
| 2138 | return -ENODEV; | 2139 | return -ENODEV; |
| 2139 | 2140 | ||
| 2141 | #ifdef CONFIG_ARCH_PXA | ||
| 2142 | dev->clk = clk_get(&pdev->dev, "UDCCLK"); | ||
| 2143 | if (IS_ERR(dev->clk)) { | ||
| 2144 | retval = PTR_ERR(dev->clk); | ||
| 2145 | goto err_clk; | ||
| 2146 | } | ||
| 2147 | #endif | ||
| 2148 | |||
| 2140 | pr_debug("%s: IRQ %d%s%s\n", driver_name, irq, | 2149 | pr_debug("%s: IRQ %d%s%s\n", driver_name, irq, |
| 2141 | dev->has_cfr ? "" : " (!cfr)", | 2150 | dev->has_cfr ? "" : " (!cfr)", |
| 2142 | SIZE_STR "(pio)" | 2151 | SIZE_STR "(pio)" |
| @@ -2152,11 +2161,10 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
| 2152 | dev_dbg(&pdev->dev, | 2161 | dev_dbg(&pdev->dev, |
| 2153 | "can't get vbus gpio %d, err: %d\n", | 2162 | "can't get vbus gpio %d, err: %d\n", |
| 2154 | dev->mach->gpio_vbus, retval); | 2163 | dev->mach->gpio_vbus, retval); |
| 2155 | return -EBUSY; | 2164 | goto err_gpio_vbus; |
| 2156 | } | 2165 | } |
| 2157 | gpio_direction_input(dev->mach->gpio_vbus); | 2166 | gpio_direction_input(dev->mach->gpio_vbus); |
| 2158 | vbus_irq = gpio_to_irq(dev->mach->gpio_vbus); | 2167 | vbus_irq = gpio_to_irq(dev->mach->gpio_vbus); |
| 2159 | set_irq_type(vbus_irq, IRQT_BOTHEDGE); | ||
| 2160 | } else | 2168 | } else |
| 2161 | vbus_irq = 0; | 2169 | vbus_irq = 0; |
| 2162 | 2170 | ||
| @@ -2166,9 +2174,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
| 2166 | dev_dbg(&pdev->dev, | 2174 | dev_dbg(&pdev->dev, |
| 2167 | "can't get pullup gpio %d, err: %d\n", | 2175 | "can't get pullup gpio %d, err: %d\n", |
| 2168 | dev->mach->gpio_pullup, retval); | 2176 | dev->mach->gpio_pullup, retval); |
| 2169 | if (dev->mach->gpio_vbus) | 2177 | goto err_gpio_pullup; |
| 2170 | gpio_free(dev->mach->gpio_vbus); | ||
| 2171 | return -EBUSY; | ||
| 2172 | } | 2178 | } |
| 2173 | gpio_direction_output(dev->mach->gpio_pullup, 0); | 2179 | gpio_direction_output(dev->mach->gpio_pullup, 0); |
| 2174 | } | 2180 | } |
| @@ -2195,11 +2201,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
| 2195 | if (retval != 0) { | 2201 | if (retval != 0) { |
| 2196 | printk(KERN_ERR "%s: can't get irq %d, err %d\n", | 2202 | printk(KERN_ERR "%s: can't get irq %d, err %d\n", |
| 2197 | driver_name, irq, retval); | 2203 | driver_name, irq, retval); |
| 2198 | if (dev->mach->gpio_pullup) | 2204 | goto err_irq1; |
| 2199 | gpio_free(dev->mach->gpio_pullup); | ||
| 2200 | if (dev->mach->gpio_vbus) | ||
| 2201 | gpio_free(dev->mach->gpio_vbus); | ||
| 2202 | return -EBUSY; | ||
| 2203 | } | 2205 | } |
| 2204 | dev->got_irq = 1; | 2206 | dev->got_irq = 1; |
| 2205 | 2207 | ||
| @@ -2213,12 +2215,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
| 2213 | printk(KERN_ERR "%s: can't get irq %i, err %d\n", | 2215 | printk(KERN_ERR "%s: can't get irq %i, err %d\n", |
| 2214 | driver_name, LUBBOCK_USB_DISC_IRQ, retval); | 2216 | driver_name, LUBBOCK_USB_DISC_IRQ, retval); |
| 2215 | lubbock_fail0: | 2217 | lubbock_fail0: |
| 2216 | free_irq(irq, dev); | 2218 | goto err_irq_lub; |
| 2217 | if (dev->mach->gpio_pullup) | ||
| 2218 | gpio_free(dev->mach->gpio_pullup); | ||
| 2219 | if (dev->mach->gpio_vbus) | ||
| 2220 | gpio_free(dev->mach->gpio_vbus); | ||
| 2221 | return -EBUSY; | ||
| 2222 | } | 2219 | } |
| 2223 | retval = request_irq(LUBBOCK_USB_IRQ, | 2220 | retval = request_irq(LUBBOCK_USB_IRQ, |
| 2224 | lubbock_vbus_irq, | 2221 | lubbock_vbus_irq, |
| @@ -2234,22 +2231,37 @@ lubbock_fail0: | |||
| 2234 | #endif | 2231 | #endif |
| 2235 | if (vbus_irq) { | 2232 | if (vbus_irq) { |
| 2236 | retval = request_irq(vbus_irq, udc_vbus_irq, | 2233 | retval = request_irq(vbus_irq, udc_vbus_irq, |
| 2237 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, | 2234 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM | |
| 2235 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 2238 | driver_name, dev); | 2236 | driver_name, dev); |
| 2239 | if (retval != 0) { | 2237 | if (retval != 0) { |
| 2240 | printk(KERN_ERR "%s: can't get irq %i, err %d\n", | 2238 | printk(KERN_ERR "%s: can't get irq %i, err %d\n", |
| 2241 | driver_name, vbus_irq, retval); | 2239 | driver_name, vbus_irq, retval); |
| 2242 | free_irq(irq, dev); | 2240 | goto err_vbus_irq; |
| 2243 | if (dev->mach->gpio_pullup) | ||
| 2244 | gpio_free(dev->mach->gpio_pullup); | ||
| 2245 | if (dev->mach->gpio_vbus) | ||
| 2246 | gpio_free(dev->mach->gpio_vbus); | ||
| 2247 | return -EBUSY; | ||
| 2248 | } | 2241 | } |
| 2249 | } | 2242 | } |
| 2250 | create_proc_files(); | 2243 | create_proc_files(); |
| 2251 | 2244 | ||
| 2252 | return 0; | 2245 | return 0; |
| 2246 | |||
| 2247 | err_vbus_irq: | ||
| 2248 | #ifdef CONFIG_ARCH_LUBBOCK | ||
| 2249 | free_irq(LUBBOCK_USB_DISC_IRQ, dev); | ||
| 2250 | err_irq_lub: | ||
| 2251 | #endif | ||
| 2252 | free_irq(irq, dev); | ||
| 2253 | err_irq1: | ||
| 2254 | if (dev->mach->gpio_pullup) | ||
| 2255 | gpio_free(dev->mach->gpio_pullup); | ||
| 2256 | err_gpio_pullup: | ||
| 2257 | if (dev->mach->gpio_vbus) | ||
| 2258 | gpio_free(dev->mach->gpio_vbus); | ||
| 2259 | err_gpio_vbus: | ||
| 2260 | #ifdef CONFIG_ARCH_PXA | ||
| 2261 | clk_put(dev->clk); | ||
| 2262 | err_clk: | ||
| 2263 | #endif | ||
| 2264 | return retval; | ||
| 2253 | } | 2265 | } |
| 2254 | 2266 | ||
| 2255 | static void pxa2xx_udc_shutdown(struct platform_device *_dev) | 2267 | static void pxa2xx_udc_shutdown(struct platform_device *_dev) |
| @@ -2284,6 +2296,10 @@ static int __exit pxa2xx_udc_remove(struct platform_device *pdev) | |||
| 2284 | if (dev->mach->gpio_pullup) | 2296 | if (dev->mach->gpio_pullup) |
| 2285 | gpio_free(dev->mach->gpio_pullup); | 2297 | gpio_free(dev->mach->gpio_pullup); |
| 2286 | 2298 | ||
| 2299 | #ifdef CONFIG_ARCH_PXA | ||
| 2300 | clk_put(dev->clk); | ||
| 2301 | #endif | ||
| 2302 | |||
| 2287 | platform_set_drvdata(pdev, NULL); | 2303 | platform_set_drvdata(pdev, NULL); |
| 2288 | the_controller = NULL; | 2304 | the_controller = NULL; |
| 2289 | return 0; | 2305 | return 0; |
diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa2xx_udc.h index 0e5d0e6fb0e2..1db46d705777 100644 --- a/drivers/usb/gadget/pxa2xx_udc.h +++ b/drivers/usb/gadget/pxa2xx_udc.h | |||
| @@ -125,6 +125,7 @@ struct pxa2xx_udc { | |||
| 125 | struct timer_list timer; | 125 | struct timer_list timer; |
| 126 | 126 | ||
| 127 | struct device *dev; | 127 | struct device *dev; |
| 128 | struct clk *clk; | ||
| 128 | struct pxa2xx_udc_mach_info *mach; | 129 | struct pxa2xx_udc_mach_info *mach; |
| 129 | u64 dma_mask; | 130 | u64 dma_mask; |
| 130 | struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS]; | 131 | struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS]; |
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index a280a52f8efe..f9b12ab59642 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c | |||
| @@ -37,6 +37,8 @@ | |||
| 37 | #include <linux/cpufreq.h> | 37 | #include <linux/cpufreq.h> |
| 38 | #include <linux/platform_device.h> | 38 | #include <linux/platform_device.h> |
| 39 | #include <linux/dma-mapping.h> | 39 | #include <linux/dma-mapping.h> |
| 40 | #include <linux/clk.h> | ||
| 41 | #include <linux/err.h> | ||
| 40 | 42 | ||
| 41 | #include <asm/hardware.h> | 43 | #include <asm/hardware.h> |
| 42 | #include <asm/io.h> | 44 | #include <asm/io.h> |
| @@ -506,15 +508,15 @@ static struct fb_ops pxafb_ops = { | |||
| 506 | * | 508 | * |
| 507 | * Factoring the 10^4 and 10^-12 out gives 10^-8 == 1 / 100000000 as used below. | 509 | * Factoring the 10^4 and 10^-12 out gives 10^-8 == 1 / 100000000 as used below. |
| 508 | */ | 510 | */ |
| 509 | static inline unsigned int get_pcd(unsigned int pixclock) | 511 | static inline unsigned int get_pcd(struct pxafb_info *fbi, unsigned int pixclock) |
| 510 | { | 512 | { |
| 511 | unsigned long long pcd; | 513 | unsigned long long pcd; |
| 512 | 514 | ||
| 513 | /* FIXME: Need to take into account Double Pixel Clock mode | 515 | /* FIXME: Need to take into account Double Pixel Clock mode |
| 514 | * (DPC) bit? or perhaps set it based on the various clock | 516 | * (DPC) bit? or perhaps set it based on the various clock |
| 515 | * speeds */ | 517 | * speeds */ |
| 516 | 518 | pcd = (unsigned long long)(clk_get_rate(fbi->clk) / 10000); | |
| 517 | pcd = (unsigned long long)get_lcdclk_frequency_10khz() * pixclock; | 519 | pcd *= pixclock; |
| 518 | do_div(pcd, 100000000 * 2); | 520 | do_div(pcd, 100000000 * 2); |
| 519 | /* no need for this, since we should subtract 1 anyway. they cancel */ | 521 | /* no need for this, since we should subtract 1 anyway. they cancel */ |
| 520 | /* pcd += 1; */ /* make up for integer math truncations */ | 522 | /* pcd += 1; */ /* make up for integer math truncations */ |
| @@ -523,19 +525,21 @@ static inline unsigned int get_pcd(unsigned int pixclock) | |||
| 523 | 525 | ||
| 524 | /* | 526 | /* |
| 525 | * Some touchscreens need hsync information from the video driver to | 527 | * Some touchscreens need hsync information from the video driver to |
| 526 | * function correctly. We export it here. | 528 | * function correctly. We export it here. Note that 'hsync_time' and |
| 529 | * the value returned from pxafb_get_hsync_time() is the *reciprocal* | ||
| 530 | * of the hsync period in seconds. | ||
| 527 | */ | 531 | */ |
| 528 | static inline void set_hsync_time(struct pxafb_info *fbi, unsigned int pcd) | 532 | static inline void set_hsync_time(struct pxafb_info *fbi, unsigned int pcd) |
| 529 | { | 533 | { |
| 530 | unsigned long long htime; | 534 | unsigned long htime; |
| 531 | 535 | ||
| 532 | if ((pcd == 0) || (fbi->fb.var.hsync_len == 0)) { | 536 | if ((pcd == 0) || (fbi->fb.var.hsync_len == 0)) { |
| 533 | fbi->hsync_time=0; | 537 | fbi->hsync_time=0; |
| 534 | return; | 538 | return; |
| 535 | } | 539 | } |
| 536 | 540 | ||
| 537 | htime = (unsigned long long)get_lcdclk_frequency_10khz() * 10000; | 541 | htime = clk_get_rate(fbi->clk) / (pcd * fbi->fb.var.hsync_len); |
| 538 | do_div(htime, pcd * fbi->fb.var.hsync_len); | 542 | |
| 539 | fbi->hsync_time = htime; | 543 | fbi->hsync_time = htime; |
| 540 | } | 544 | } |
| 541 | 545 | ||
| @@ -560,7 +564,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * | |||
| 560 | { | 564 | { |
| 561 | struct pxafb_lcd_reg new_regs; | 565 | struct pxafb_lcd_reg new_regs; |
| 562 | u_long flags; | 566 | u_long flags; |
| 563 | u_int lines_per_panel, pcd = get_pcd(var->pixclock); | 567 | u_int lines_per_panel, pcd = get_pcd(fbi, var->pixclock); |
| 564 | 568 | ||
| 565 | pr_debug("pxafb: Configuring PXA LCD\n"); | 569 | pr_debug("pxafb: Configuring PXA LCD\n"); |
| 566 | 570 | ||
| @@ -803,7 +807,7 @@ static void pxafb_enable_controller(struct pxafb_info *fbi) | |||
| 803 | pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3); | 807 | pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3); |
| 804 | 808 | ||
| 805 | /* enable LCD controller clock */ | 809 | /* enable LCD controller clock */ |
| 806 | pxa_set_cken(CKEN_LCD, 1); | 810 | clk_enable(fbi->clk); |
| 807 | 811 | ||
| 808 | /* Sequence from 11.7.10 */ | 812 | /* Sequence from 11.7.10 */ |
| 809 | LCCR3 = fbi->reg_lccr3; | 813 | LCCR3 = fbi->reg_lccr3; |
| @@ -840,7 +844,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi) | |||
| 840 | remove_wait_queue(&fbi->ctrlr_wait, &wait); | 844 | remove_wait_queue(&fbi->ctrlr_wait, &wait); |
| 841 | 845 | ||
| 842 | /* disable LCD controller clock */ | 846 | /* disable LCD controller clock */ |
| 843 | pxa_set_cken(CKEN_LCD, 0); | 847 | clk_disable(fbi->clk); |
| 844 | } | 848 | } |
| 845 | 849 | ||
| 846 | /* | 850 | /* |
| @@ -994,7 +998,7 @@ pxafb_freq_transition(struct notifier_block *nb, unsigned long val, void *data) | |||
| 994 | break; | 998 | break; |
| 995 | 999 | ||
| 996 | case CPUFREQ_POSTCHANGE: | 1000 | case CPUFREQ_POSTCHANGE: |
| 997 | pcd = get_pcd(fbi->fb.var.pixclock); | 1001 | pcd = get_pcd(fbi, fbi->fb.var.pixclock); |
| 998 | set_hsync_time(fbi, pcd); | 1002 | set_hsync_time(fbi, pcd); |
| 999 | fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); | 1003 | fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); |
| 1000 | set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); | 1004 | set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); |
| @@ -1119,6 +1123,12 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) | |||
| 1119 | memset(fbi, 0, sizeof(struct pxafb_info)); | 1123 | memset(fbi, 0, sizeof(struct pxafb_info)); |
| 1120 | fbi->dev = dev; | 1124 | fbi->dev = dev; |
| 1121 | 1125 | ||
| 1126 | fbi->clk = clk_get(dev, "LCDCLK"); | ||
| 1127 | if (IS_ERR(fbi->clk)) { | ||
| 1128 | kfree(fbi); | ||
| 1129 | return NULL; | ||
| 1130 | } | ||
| 1131 | |||
| 1122 | strcpy(fbi->fb.fix.id, PXA_NAME); | 1132 | strcpy(fbi->fb.fix.id, PXA_NAME); |
| 1123 | 1133 | ||
| 1124 | fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; | 1134 | fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; |
diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h index 7499a1c4bf79..f8605b807b0a 100644 --- a/drivers/video/pxafb.h +++ b/drivers/video/pxafb.h | |||
| @@ -40,6 +40,7 @@ struct pxafb_dma_descriptor { | |||
| 40 | struct pxafb_info { | 40 | struct pxafb_info { |
| 41 | struct fb_info fb; | 41 | struct fb_info fb; |
| 42 | struct device *dev; | 42 | struct device *dev; |
| 43 | struct clk *clk; | ||
| 43 | 44 | ||
| 44 | /* | 45 | /* |
| 45 | * These are the addresses we mapped | 46 | * These are the addresses we mapped |
diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h index 56e16d66645a..db8aa304c93d 100644 --- a/include/asm-arm/arch-ixp23xx/platform.h +++ b/include/asm-arm/arch-ixp23xx/platform.h | |||
| @@ -14,17 +14,17 @@ | |||
| 14 | 14 | ||
| 15 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
| 16 | 16 | ||
| 17 | extern inline unsigned long ixp2000_reg_read(volatile void *reg) | 17 | static inline unsigned long ixp2000_reg_read(volatile void *reg) |
| 18 | { | 18 | { |
| 19 | return *((volatile unsigned long *)reg); | 19 | return *((volatile unsigned long *)reg); |
| 20 | } | 20 | } |
| 21 | 21 | ||
| 22 | extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val) | 22 | static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) |
| 23 | { | 23 | { |
| 24 | *((volatile unsigned long *)reg) = val; | 24 | *((volatile unsigned long *)reg) = val; |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) | 27 | static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) |
| 28 | { | 28 | { |
| 29 | *((volatile unsigned long *)reg) = val; | 29 | *((volatile unsigned long *)reg) = val; |
| 30 | } | 30 | } |
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h index bf30cbdcc2bf..b943d3a92a1d 100644 --- a/include/asm-arm/arch-ns9xxx/clock.h +++ b/include/asm-arm/arch-ns9xxx/clock.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | static inline u32 ns9xxx_systemclock(void) __attribute__((const)); | 19 | static inline u32 ns9xxx_systemclock(void) __attribute__((const)); |
| 20 | static inline u32 ns9xxx_systemclock(void) | 20 | static inline u32 ns9xxx_systemclock(void) |
| 21 | { | 21 | { |
| 22 | u32 pll = SYS_PLL; | 22 | u32 pll = __raw_readl(SYS_PLL); |
| 23 | 23 | ||
| 24 | /* | 24 | /* |
| 25 | * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in | 25 | * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in |
| @@ -46,8 +46,8 @@ static inline u32 ns9xxx_systemclock(void) | |||
| 46 | * | 46 | * |
| 47 | * Fine. | 47 | * Fine. |
| 48 | */ | 48 | */ |
| 49 | return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1) | 49 | return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1) |
| 50 | >> REGGET(pll, SYS_PLL, FS); | 50 | >> REGGETIM(pll, SYS_PLL, FS); |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); | 53 | static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); |
diff --git a/include/asm-arm/arch-ns9xxx/gpio.h b/include/asm-arm/arch-ns9xxx/gpio.h new file mode 100644 index 000000000000..adbca08583c0 --- /dev/null +++ b/include/asm-arm/arch-ns9xxx/gpio.h | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-arm/arch-ns9xxx/gpio.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007 by Digi International Inc. | ||
| 5 | * All rights reserved. | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License version 2 as published by | ||
| 9 | * the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #ifndef __ASM_ARCH_GPIO_H | ||
| 12 | #define __ASM_ARCH_GPIO_H | ||
| 13 | |||
| 14 | #include <asm/errno.h> | ||
| 15 | |||
| 16 | int gpio_request(unsigned gpio, const char *label); | ||
| 17 | |||
| 18 | void gpio_free(unsigned gpio); | ||
| 19 | |||
| 20 | int ns9xxx_gpio_configure(unsigned gpio, int inv, int func); | ||
| 21 | |||
| 22 | int gpio_direction_input(unsigned gpio); | ||
| 23 | |||
| 24 | int gpio_direction_output(unsigned gpio, int value); | ||
| 25 | |||
| 26 | int gpio_get_value(unsigned gpio); | ||
| 27 | |||
| 28 | void gpio_set_value(unsigned gpio, int value); | ||
| 29 | |||
| 30 | /* | ||
| 31 | * ns9xxx can use gpio pins to trigger an irq, but it's not generic | ||
| 32 | * enough to be supported by the gpio_to_irq/irq_to_gpio interface | ||
| 33 | */ | ||
| 34 | static inline int gpio_to_irq(unsigned gpio) | ||
| 35 | { | ||
| 36 | return -EINVAL; | ||
| 37 | } | ||
| 38 | |||
| 39 | static inline int irq_to_gpio(unsigned irq) | ||
| 40 | { | ||
| 41 | return -EINVAL; | ||
| 42 | } | ||
| 43 | |||
| 44 | /* get the cansleep() stubs */ | ||
| 45 | #include <asm-generic/gpio.h> | ||
| 46 | |||
| 47 | #endif /* ifndef __ASM_ARCH_GPIO_H */ | ||
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h index 25600554c4fe..0b7b34603f1c 100644 --- a/include/asm-arm/arch-ns9xxx/hardware.h +++ b/include/asm-arm/arch-ns9xxx/hardware.h | |||
| @@ -27,42 +27,53 @@ | |||
| 27 | #define io_v2p(x) ((((x) & 0x0f000000) << 4) \ | 27 | #define io_v2p(x) ((((x) & 0x0f000000) << 4) \ |
| 28 | + ((x) & 0x00ffffff)) | 28 | + ((x) & 0x00ffffff)) |
| 29 | 29 | ||
| 30 | #define __REGSHIFT(mask) ((mask) & (-(mask))) | ||
| 31 | |||
| 30 | #define __REGBIT(bit) ((u32)1 << (bit)) | 32 | #define __REGBIT(bit) ((u32)1 << (bit)) |
| 31 | #define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit)) | 33 | #define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit)) |
| 32 | #define __REGVAL(mask, value) (((value) * ((mask) & (-(mask))) & (mask))) | 34 | #define __REGVAL(mask, value) (((value) * __REGSHIFT(mask)) & (mask)) |
| 33 | 35 | ||
| 34 | #ifndef __ASSEMBLY__ | 36 | #ifndef __ASSEMBLY__ |
| 35 | 37 | ||
| 36 | # define __REG(x) (*((volatile u32 *)io_p2v((x)))) | 38 | # define __REG(x) ((void __iomem __force *)io_p2v((x))) |
| 37 | # define __REG2(x, y) (*((volatile u32 *)io_p2v((x)) + (y))) | 39 | # define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y))) |
| 38 | 40 | ||
| 39 | # define __REGB(x) (*((volatile u8 *)io_p2v((x)))) | 41 | # define __REGSET(var, field, value) \ |
| 40 | # define __REGB2(x) (*((volatile u8 *)io_p2v((x)) + (y))) | 42 | ((var) = (((var) & ~((field) & ~(value))) | (value))) |
| 41 | 43 | ||
| 42 | # define REGSET(var, reg, field, value) \ | 44 | # define REGSET(var, reg, field, value) \ |
| 43 | ((var) = (((var) \ | 45 | __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value) |
| 44 | & ~(reg ## _ ## field & \ | 46 | |
| 45 | ~ reg ## _ ## field ## _ ## value)) \ | 47 | # define REGSET_IDX(var, reg, field, idx, value) \ |
| 46 | | (reg ## _ ## field ## _ ## value))) | 48 | __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx))) |
| 47 | 49 | ||
| 48 | # define REGSETIM(var, reg, field, value) \ | 50 | # define REGSETIM(var, reg, field, value) \ |
| 49 | ((var) = (((var) \ | 51 | __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value))) |
| 50 | & ~(reg ## _ ## field & \ | 52 | |
| 51 | ~(__REGVAL(reg ## _ ## field, value)))) \ | 53 | # define REGSETIM_IDX(var, reg, field, idx, value) \ |
| 52 | | (__REGVAL(reg ## _ ## field, value)))) | 54 | __REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value))) |
| 55 | |||
| 56 | # define __REGGET(var, field) \ | ||
| 57 | (((var) & (field))) | ||
| 53 | 58 | ||
| 54 | # define REGGET(var, reg, field) \ | 59 | # define REGGET(var, reg, field) \ |
| 55 | ((var & (reg ## _ ## field)) / \ | 60 | __REGGET(var, reg ## _ ## field) |
| 56 | ((reg ## _ ## field) & (-(reg ## _ ## field)))) | 61 | |
| 62 | # define REGGET_IDX(var, reg, field, idx) \ | ||
| 63 | __REGGET(var, reg ## _ ## field((idx))) | ||
| 64 | |||
| 65 | # define REGGETIM(var, reg, field) \ | ||
| 66 | __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field) | ||
| 67 | |||
| 68 | # define REGGETIM_IDX(var, reg, field, idx) \ | ||
| 69 | __REGGET(var, reg ## _ ## field((idx))) / \ | ||
| 70 | __REGSHIFT(reg ## _ ## field((idx))) | ||
| 57 | 71 | ||
| 58 | #else | 72 | #else |
| 59 | 73 | ||
| 60 | # define __REG(x) io_p2v(x) | 74 | # define __REG(x) io_p2v(x) |
| 61 | # define __REG2(x, y) io_p2v((x) + (y)) | 75 | # define __REG2(x, y) io_p2v((x) + (y)) |
| 62 | 76 | ||
| 63 | # define __REGB(x) __REG((x)) | ||
| 64 | # define __REGB2(x, y) __REG2((x), (y)) | ||
| 65 | |||
| 66 | #endif | 77 | #endif |
| 67 | 78 | ||
| 68 | #endif /* ifndef __ASM_ARCH_HARDWARE_H */ | 79 | #endif /* ifndef __ASM_ARCH_HARDWARE_H */ |
diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h index c3dc532dd20c..afa3a9db3e1d 100644 --- a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h +++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10) | 18 | #define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10) |
| 19 | #define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18) | 19 | #define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18) |
| 20 | 20 | ||
| 21 | #define FPGA_IER __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x50) | 21 | #define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50) |
| 22 | #define FPGA_ISR __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x60) | 22 | #define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60) |
| 23 | 23 | ||
| 24 | #endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */ | 24 | #endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */ |
diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h index e3cd4d31b3f3..c1082bd8977c 100644 --- a/include/asm-arm/arch-ns9xxx/system.h +++ b/include/asm-arm/arch-ns9xxx/system.h | |||
| @@ -24,9 +24,9 @@ static inline void arch_reset(char mode) | |||
| 24 | { | 24 | { |
| 25 | u32 reg; | 25 | u32 reg; |
| 26 | 26 | ||
| 27 | reg = SYS_PLL >> 16; | 27 | reg = __raw_readl(SYS_PLL) >> 16; |
| 28 | REGSET(reg, SYS_PLL, SWC, YES); | 28 | REGSET(reg, SYS_PLL, SWC, YES); |
| 29 | SYS_PLL = reg; | 29 | __raw_writel(reg, SYS_PLL); |
| 30 | 30 | ||
| 31 | BUG(); | 31 | BUG(); |
| 32 | } | 32 | } |
diff --git a/include/asm-arm/arch-omap/blizzard.h b/include/asm-arm/arch-omap/blizzard.h new file mode 100644 index 000000000000..8d160f171372 --- /dev/null +++ b/include/asm-arm/arch-omap/blizzard.h | |||
| @@ -0,0 +1,12 @@ | |||
| 1 | #ifndef _BLIZZARD_H | ||
| 2 | #define _BLIZZARD_H | ||
| 3 | |||
| 4 | struct blizzard_platform_data { | ||
| 5 | void (*power_up)(struct device *dev); | ||
| 6 | void (*power_down)(struct device *dev); | ||
| 7 | unsigned long (*get_clock_rate)(struct device *dev); | ||
| 8 | |||
| 9 | unsigned te_connected : 1; | ||
| 10 | }; | ||
| 11 | |||
| 12 | #endif | ||
diff --git a/include/asm-arm/arch-omap/board-2430sdp.h b/include/asm-arm/arch-omap/board-2430sdp.h new file mode 100644 index 000000000000..e9c65ce3cb12 --- /dev/null +++ b/include/asm-arm/arch-omap/board-2430sdp.h | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/board-2430sdp.h | ||
| 3 | * | ||
| 4 | * Hardware definitions for TI OMAP2430 SDP board. | ||
| 5 | * | ||
| 6 | * Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
| 14 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
| 15 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
| 16 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
| 18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
| 19 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
| 20 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
| 22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 23 | * | ||
| 24 | * You should have received a copy of the GNU General Public License along | ||
| 25 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 26 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 27 | */ | ||
| 28 | |||
| 29 | #ifndef __ASM_ARCH_OMAP_2430SDP_H | ||
| 30 | #define __ASM_ARCH_OMAP_2430SDP_H | ||
| 31 | |||
| 32 | /* Placeholder for 2430SDP specific defines */ | ||
| 33 | #define OMAP24XX_ETHR_START 0x08000300 | ||
| 34 | #define OMAP24XX_ETHR_GPIO_IRQ 149 | ||
| 35 | #define SDP2430_CS0_BASE 0x04000000 | ||
| 36 | |||
| 37 | #define TWL4030_IRQNUM INT_24XX_SYS_NIRQ | ||
| 38 | |||
| 39 | /* TWL4030 Primary Interrupt Handler (PIH) interrupts */ | ||
| 40 | #define IH_TWL4030_BASE IH_BOARD_BASE | ||
| 41 | #define IH_TWL4030_END (IH_TWL4030_BASE+8) | ||
| 42 | #define NR_IRQS (IH_TWL4030_END) | ||
| 43 | |||
| 44 | #endif /* __ASM_ARCH_OMAP_2430SDP_H */ | ||
diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h new file mode 100644 index 000000000000..cd22035a7160 --- /dev/null +++ b/include/asm-arm/arch-omap/board-palmte.h | |||
| @@ -0,0 +1,34 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/board-palmte.h | ||
| 3 | * | ||
| 4 | * Hardware definitions for the Palm Tungsten E device. | ||
| 5 | * | ||
| 6 | * Maintainters : http://palmtelinux.sf.net | ||
| 7 | * palmtelinux-developpers@lists.sf.net | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef __OMAP_BOARD_PALMTE_H | ||
| 15 | #define __OMAP_BOARD_PALMTE_H | ||
| 16 | |||
| 17 | #include <asm/arch/gpio.h> | ||
| 18 | |||
| 19 | #define PALMTE_USBDETECT_GPIO 0 | ||
| 20 | #define PALMTE_USB_OR_DC_GPIO 1 | ||
| 21 | #define PALMTE_TSC_GPIO 4 | ||
| 22 | #define PALMTE_PINTDAV_GPIO 6 | ||
| 23 | #define PALMTE_MMC_WP_GPIO 8 | ||
| 24 | #define PALMTE_MMC_POWER_GPIO 9 | ||
| 25 | #define PALMTE_HDQ_GPIO 11 | ||
| 26 | #define PALMTE_HEADPHONES_GPIO 14 | ||
| 27 | #define PALMTE_SPEAKER_GPIO 15 | ||
| 28 | #define PALMTE_DC_GPIO OMAP_MPUIO(2) | ||
| 29 | #define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4) | ||
| 30 | #define PALMTE_MMC1_GPIO OMAP_MPUIO(6) | ||
| 31 | #define PALMTE_MMC2_GPIO OMAP_MPUIO(7) | ||
| 32 | #define PALMTE_MMC3_GPIO OMAP_MPUIO(11) | ||
| 33 | |||
| 34 | #endif /* __OMAP_BOARD_PALMTE_H */ | ||
diff --git a/include/asm-arm/arch-omap/board-palmtt.h b/include/asm-arm/arch-omap/board-palmtt.h new file mode 100644 index 000000000000..d9590b0ec90e --- /dev/null +++ b/include/asm-arm/arch-omap/board-palmtt.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/board-palmte.h | ||
| 3 | * | ||
| 4 | * Hardware definitions for the Palm Tungsten|T device. | ||
| 5 | * | ||
| 6 | * Maintainters : Marek Vasut <marek.vasut@gmail.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __OMAP_BOARD_PALMTT_H | ||
| 14 | #define __OMAP_BOARD_PALMTT_H | ||
| 15 | |||
| 16 | #define PALMTT_USBDETECT_GPIO 0 | ||
| 17 | #define PALMTT_CABLE_GPIO 1 | ||
| 18 | #define PALMTT_LED_GPIO 3 | ||
| 19 | #define PALMTT_PENIRQ_GPIO 6 | ||
| 20 | #define PALMTT_MMC_WP_GPIO 8 | ||
| 21 | #define PALMTT_HDQ_GPIO 11 | ||
| 22 | |||
| 23 | #endif /* __OMAP_BOARD_PALMTT_H */ | ||
diff --git a/include/asm-arm/arch-omap/board-palmz71.h b/include/asm-arm/arch-omap/board-palmz71.h new file mode 100644 index 000000000000..1252a859787d --- /dev/null +++ b/include/asm-arm/arch-omap/board-palmz71.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap/board-palmz71.h | ||
| 3 | * | ||
| 4 | * Hardware definitions for the Palm Zire71 device. | ||
| 5 | * | ||
| 6 | * Maintainters : Marek Vasut <marek.vasut@gmail.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __OMAP_BOARD_PALMZ71_H | ||
| 14 | #define __OMAP_BOARD_PALMZ71_H | ||
| 15 | |||
| 16 | #define PALMZ71_USBDETECT_GPIO 0 | ||
| 17 | #define PALMZ71_PENIRQ_GPIO 6 | ||
| 18 | #define PALMZ71_MMC_WP_GPIO 8 | ||
| 19 | #define PALMZ71_HDQ_GPIO 11 | ||
| 20 | |||
| 21 | #define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1) | ||
| 22 | #define PALMZ71_CABLE_GPIO OMAP_MPUIO(2) | ||
| 23 | #define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3) | ||
| 24 | #define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4) | ||
| 25 | |||
| 26 | #endif /* __OMAP_BOARD_PALMZ71_H */ | ||
diff --git a/include/asm-arm/arch-omap/board-sx1.h b/include/asm-arm/arch-omap/board-sx1.h new file mode 100644 index 000000000000..2bb8dd6e2d14 --- /dev/null +++ b/include/asm-arm/arch-omap/board-sx1.h | |||
| @@ -0,0 +1,46 @@ | |||
| 1 | /* | ||
| 2 | * Siemens SX1 board definitions | ||
| 3 | * | ||
| 4 | * Copyright: Vovan888 at gmail com | ||
| 5 | * | ||
| 6 | * This package is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR | ||
| 11 | * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED | ||
| 12 | * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_SX1_I2C_CHIPS_H | ||
| 16 | #define __ASM_ARCH_SX1_I2C_CHIPS_H | ||
| 17 | |||
| 18 | #define SOFIA_MAX_LIGHT_VAL 0x2B | ||
| 19 | |||
| 20 | #define SOFIA_I2C_ADDR 0x32 | ||
| 21 | /* Sofia reg 3 bits masks */ | ||
| 22 | #define SOFIA_POWER1_REG 0x03 | ||
| 23 | |||
| 24 | #define SOFIA_USB_POWER 0x01 | ||
| 25 | #define SOFIA_MMC_POWER 0x04 | ||
| 26 | #define SOFIA_BLUETOOTH_POWER 0x08 | ||
| 27 | #define SOFIA_MMILIGHT_POWER 0x20 | ||
| 28 | |||
| 29 | #define SOFIA_POWER2_REG 0x04 | ||
| 30 | #define SOFIA_BACKLIGHT_REG 0x06 | ||
| 31 | #define SOFIA_KEYLIGHT_REG 0x07 | ||
| 32 | #define SOFIA_DIMMING_REG 0x09 | ||
| 33 | |||
| 34 | |||
| 35 | /* Function Prototypes for SX1 devices control on I2C bus */ | ||
| 36 | |||
| 37 | int sx1_setbacklight(u8 backlight); | ||
| 38 | int sx1_getbacklight(u8 *backlight); | ||
| 39 | int sx1_setkeylight(u8 keylight); | ||
| 40 | int sx1_getkeylight(u8 *keylight); | ||
| 41 | |||
| 42 | int sx1_setmmipower(u8 onoff); | ||
| 43 | int sx1_setusbpower(u8 onoff); | ||
| 44 | int sx1_setmmcpower(u8 onoff); | ||
| 45 | |||
| 46 | #endif /* __ASM_ARCH_SX1_I2C_CHIPS_H */ | ||
diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 031672c56377..db44c5d1f1a0 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h | |||
| @@ -179,4 +179,8 @@ extern const void *omap_get_var_config(u16 tag, size_t *len); | |||
| 179 | extern struct omap_board_config_kernel *omap_board_config; | 179 | extern struct omap_board_config_kernel *omap_board_config; |
| 180 | extern int omap_board_config_size; | 180 | extern int omap_board_config_size; |
| 181 | 181 | ||
| 182 | |||
| 183 | /* for TI reference platforms sharing the same debug card */ | ||
| 184 | extern int debug_card_init(u32 addr, unsigned gpio); | ||
| 185 | |||
| 182 | #endif | 186 | #endif |
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index f7774192a41e..f33b467fddb7 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h | |||
| @@ -417,7 +417,6 @@ extern void omap_free_lcd_dma(void); | |||
| 417 | extern void omap_setup_lcd_dma(void); | 417 | extern void omap_setup_lcd_dma(void); |
| 418 | extern void omap_enable_lcd_dma(void); | 418 | extern void omap_enable_lcd_dma(void); |
| 419 | extern void omap_stop_lcd_dma(void); | 419 | extern void omap_stop_lcd_dma(void); |
| 420 | extern int omap_lcd_dma_ext_running(void); | ||
| 421 | extern void omap_set_lcd_dma_ext_controller(int external); | 420 | extern void omap_set_lcd_dma_ext_controller(int external); |
| 422 | extern void omap_set_lcd_dma_single_transfer(int single); | 421 | extern void omap_set_lcd_dma_single_transfer(int single); |
| 423 | extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, | 422 | extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, |
diff --git a/include/asm-arm/arch-omap/eac.h b/include/asm-arm/arch-omap/eac.h new file mode 100644 index 000000000000..6662cb02bafc --- /dev/null +++ b/include/asm-arm/arch-omap/eac.h | |||
| @@ -0,0 +1,101 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-omap2/eac.h | ||
| 3 | * | ||
| 4 | * Defines for Enhanced Audio Controller | ||
| 5 | * | ||
| 6 | * Contact: Jarkko Nikula <jarkko.nikula@nokia.com> | ||
| 7 | * | ||
| 8 | * Copyright (C) 2006 Nokia Corporation | ||
| 9 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or | ||
| 12 | * modify it under the terms of the GNU General Public License | ||
| 13 | * version 2 as published by the Free Software Foundation. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, but | ||
| 16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 18 | * General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 23 | * 02110-1301 USA | ||
| 24 | * | ||
| 25 | */ | ||
| 26 | |||
| 27 | #ifndef __ASM_ARM_ARCH_OMAP2_EAC_H | ||
| 28 | #define __ASM_ARM_ARCH_OMAP2_EAC_H | ||
| 29 | |||
| 30 | #include <asm/arch/io.h> | ||
| 31 | #include <asm/arch/hardware.h> | ||
| 32 | #include <asm/irq.h> | ||
| 33 | |||
| 34 | #include <sound/driver.h> | ||
| 35 | #include <sound/core.h> | ||
| 36 | |||
| 37 | /* master codec clock source */ | ||
| 38 | #define EAC_MCLK_EXT_MASK 0x100 | ||
| 39 | enum eac_mclk_src { | ||
| 40 | EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */ | ||
| 41 | EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK, | ||
| 42 | EAC_MCLK_EXT_12288000, | ||
| 43 | EAC_MCLK_EXT_2x11289600, | ||
| 44 | EAC_MCLK_EXT_2x12288000, | ||
| 45 | }; | ||
| 46 | |||
| 47 | /* codec port interface mode */ | ||
| 48 | enum eac_codec_mode { | ||
| 49 | EAC_CODEC_PCM, | ||
| 50 | EAC_CODEC_AC97, | ||
| 51 | EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */ | ||
| 52 | EAC_CODEC_I2S_SLAVE, | ||
| 53 | }; | ||
| 54 | |||
| 55 | /* configuration structure for I2S mode */ | ||
| 56 | struct eac_i2s_conf { | ||
| 57 | /* if enabled, then first data slot (left channel) is signaled as | ||
| 58 | * positive level of frame sync EAC.AC_FS */ | ||
| 59 | unsigned polarity_changed_mode:1; | ||
| 60 | /* if enabled, then serial data starts one clock cycle after the | ||
| 61 | * of EAC.AC_FS for first audio slot */ | ||
| 62 | unsigned sync_delay_enable:1; | ||
| 63 | }; | ||
| 64 | |||
| 65 | /* configuration structure for EAC codec port */ | ||
| 66 | struct eac_codec { | ||
| 67 | enum eac_mclk_src mclk_src; | ||
| 68 | |||
| 69 | enum eac_codec_mode codec_mode; | ||
| 70 | union { | ||
| 71 | struct eac_i2s_conf i2s; | ||
| 72 | } codec_conf; | ||
| 73 | |||
| 74 | int default_rate; /* audio sampling rate */ | ||
| 75 | |||
| 76 | int (* set_power)(void *private_data, int dac, int adc); | ||
| 77 | int (* register_controls)(void *private_data, | ||
| 78 | struct snd_card *card); | ||
| 79 | const char *short_name; | ||
| 80 | |||
| 81 | void *private_data; | ||
| 82 | }; | ||
| 83 | |||
| 84 | /* structure for passing platform dependent data to the EAC driver */ | ||
| 85 | struct eac_platform_data { | ||
| 86 | int (* init)(struct device *eac_dev); | ||
| 87 | void (* cleanup)(struct device *eac_dev); | ||
| 88 | /* these callbacks are used to configure & control external MCLK | ||
| 89 | * source. NULL if not used */ | ||
| 90 | int (* enable_ext_clocks)(struct device *eac_dev); | ||
| 91 | void (* disable_ext_clocks)(struct device *eac_dev); | ||
| 92 | }; | ||
| 93 | |||
| 94 | extern void omap_init_eac(struct eac_platform_data *pdata); | ||
| 95 | |||
| 96 | extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec); | ||
| 97 | extern void eac_unregister_codec(struct device *eac_dev); | ||
| 98 | |||
| 99 | extern int eac_set_mode(struct device *eac_dev, int play, int rec); | ||
| 100 | |||
| 101 | #endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */ | ||
diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h index 995cc83482eb..6a8e07ffc2d0 100644 --- a/include/asm-arm/arch-omap/gpmc.h +++ b/include/asm-arm/arch-omap/gpmc.h | |||
| @@ -23,9 +23,10 @@ | |||
| 23 | #define GPMC_CS_NAND_DATA 0x24 | 23 | #define GPMC_CS_NAND_DATA 0x24 |
| 24 | 24 | ||
| 25 | #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) | 25 | #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) |
| 26 | #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) | 26 | #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) |
| 27 | #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) | 27 | #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) |
| 28 | #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) | 28 | #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) |
| 29 | #define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) | ||
| 29 | #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) | 30 | #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) |
| 30 | #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) | 31 | #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) |
| 31 | #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) | 32 | #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) |
| @@ -80,6 +81,8 @@ struct gpmc_timings { | |||
| 80 | }; | 81 | }; |
| 81 | 82 | ||
| 82 | extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); | 83 | extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); |
| 84 | extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); | ||
| 85 | extern unsigned long gpmc_get_fclk_period(void); | ||
| 83 | 86 | ||
| 84 | extern void gpmc_cs_write_reg(int cs, int idx, u32 val); | 87 | extern void gpmc_cs_write_reg(int cs, int idx, u32 val); |
| 85 | extern u32 gpmc_cs_read_reg(int cs, int idx); | 88 | extern u32 gpmc_cs_read_reg(int cs, int idx); |
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index e225f4f39b34..da572092e255 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h | |||
| @@ -318,6 +318,10 @@ | |||
| 318 | #include "board-h4.h" | 318 | #include "board-h4.h" |
| 319 | #endif | 319 | #endif |
| 320 | 320 | ||
| 321 | #ifdef CONFIG_MACH_OMAP_2430SDP | ||
| 322 | #include "board-2430sdp.h" | ||
| 323 | #endif | ||
| 324 | |||
| 321 | #ifdef CONFIG_MACH_OMAP_APOLLON | 325 | #ifdef CONFIG_MACH_OMAP_APOLLON |
| 322 | #include "board-apollon.h" | 326 | #include "board-apollon.h" |
| 323 | #endif | 327 | #endif |
| @@ -330,6 +334,22 @@ | |||
| 330 | #include "board-voiceblue.h" | 334 | #include "board-voiceblue.h" |
| 331 | #endif | 335 | #endif |
| 332 | 336 | ||
| 337 | #ifdef CONFIG_MACH_OMAP_PALMTE | ||
| 338 | #include "board-palmte.h" | ||
| 339 | #endif | ||
| 340 | |||
| 341 | #ifdef CONFIG_MACH_OMAP_PALMZ71 | ||
| 342 | #include "board-palmz71.h" | ||
| 343 | #endif | ||
| 344 | |||
| 345 | #ifdef CONFIG_MACH_OMAP_PALMTT | ||
| 346 | #include "board-palmtt.h" | ||
| 347 | #endif | ||
| 348 | |||
| 349 | #ifdef CONFIG_MACH_SX1 | ||
| 350 | #include "board-sx1.h" | ||
| 351 | #endif | ||
| 352 | |||
| 333 | #endif /* !__ASSEMBLER__ */ | 353 | #endif /* !__ASSEMBLER__ */ |
| 334 | 354 | ||
| 335 | #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ | 355 | #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ |
diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 4aca7e3d7566..289082d07f14 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h | |||
| @@ -72,6 +72,16 @@ | |||
| 72 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ | 72 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ |
| 73 | #define L4_24XX_VIRT 0xd8000000 | 73 | #define L4_24XX_VIRT 0xd8000000 |
| 74 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ | 74 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ |
| 75 | |||
| 76 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 77 | #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ | ||
| 78 | #define L4_WK_243X_VIRT 0xd9000000 | ||
| 79 | #define L4_WK_243X_SIZE SZ_1M | ||
| 80 | #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ | ||
| 81 | #define OMAP243X_GPMC_VIRT 0xFE000000 | ||
| 82 | #define OMAP243X_GPMC_SIZE SZ_1M | ||
| 83 | #endif | ||
| 84 | |||
| 75 | #define IO_OFFSET 0x90000000 | 85 | #define IO_OFFSET 0x90000000 |
| 76 | #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | 86 | #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ |
| 77 | #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | 87 | #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ |
diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h index 82d276a6bd95..69ed7ee40179 100644 --- a/include/asm-arm/arch-omap/menelaus.h +++ b/include/asm-arm/arch-omap/menelaus.h | |||
| @@ -7,6 +7,12 @@ | |||
| 7 | #ifndef __ASM_ARCH_MENELAUS_H | 7 | #ifndef __ASM_ARCH_MENELAUS_H |
| 8 | #define __ASM_ARCH_MENELAUS_H | 8 | #define __ASM_ARCH_MENELAUS_H |
| 9 | 9 | ||
| 10 | struct device; | ||
| 11 | |||
| 12 | struct menelaus_platform_data { | ||
| 13 | int (* late_init)(struct device *dev); | ||
| 14 | }; | ||
| 15 | |||
| 10 | extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), | 16 | extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), |
| 11 | void *data); | 17 | void *data); |
| 12 | extern void menelaus_unregister_mmc_callback(void); | 18 | extern void menelaus_unregister_mmc_callback(void); |
| @@ -20,6 +26,19 @@ extern int menelaus_set_vaux(unsigned int mV); | |||
| 20 | extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); | 26 | extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); |
| 21 | extern int menelaus_set_slot_sel(int enable); | 27 | extern int menelaus_set_slot_sel(int enable); |
| 22 | extern int menelaus_get_slot_pin_states(void); | 28 | extern int menelaus_get_slot_pin_states(void); |
| 29 | extern int menelaus_set_vcore_sw(unsigned int mV); | ||
| 30 | extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV); | ||
| 31 | |||
| 32 | #define EN_VPLL_SLEEP (1 << 7) | ||
| 33 | #define EN_VMMC_SLEEP (1 << 6) | ||
| 34 | #define EN_VAUX_SLEEP (1 << 5) | ||
| 35 | #define EN_VIO_SLEEP (1 << 4) | ||
| 36 | #define EN_VMEM_SLEEP (1 << 3) | ||
| 37 | #define EN_DC3_SLEEP (1 << 2) | ||
| 38 | #define EN_DC2_SLEEP (1 << 1) | ||
| 39 | #define EN_VC_SLEEP (1 << 0) | ||
| 40 | |||
| 41 | extern int menelaus_set_regulator_sleep(int enable, u32 val); | ||
| 23 | 42 | ||
| 24 | #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) | 43 | #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) |
| 25 | #define omap_has_menelaus() 1 | 44 | #define omap_has_menelaus() 1 |
| @@ -28,4 +47,3 @@ extern int menelaus_get_slot_pin_states(void); | |||
| 28 | #endif | 47 | #endif |
| 29 | 48 | ||
| 30 | #endif | 49 | #endif |
| 31 | |||
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h new file mode 100644 index 000000000000..b70e37b61242 --- /dev/null +++ b/include/asm-arm/arch-omap/mmc.h | |||
| @@ -0,0 +1,66 @@ | |||
| 1 | /* | ||
| 2 | * MMC definitions for OMAP2 | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Nokia Corporation | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __OMAP2_MMC_H | ||
| 12 | #define __OMAP2_MMC_H | ||
| 13 | |||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/device.h> | ||
| 16 | #include <linux/mmc/host.h> | ||
| 17 | |||
| 18 | #define OMAP_MMC_MAX_SLOTS 2 | ||
| 19 | |||
| 20 | struct omap_mmc_platform_data { | ||
| 21 | unsigned enabled:1; | ||
| 22 | /* number of slots on board */ | ||
| 23 | unsigned nr_slots:2; | ||
| 24 | /* nomux means "standard" muxing is wrong on this board, and that | ||
| 25 | * board-specific code handled it before common init logic. | ||
| 26 | */ | ||
| 27 | unsigned nomux:1; | ||
| 28 | /* 4 wire signaling is optional, and is only used for SD/SDIO and | ||
| 29 | * MMCv4 */ | ||
| 30 | unsigned wire4:1; | ||
| 31 | /* set if your board has components or wiring that limits the | ||
| 32 | * maximum frequency on the MMC bus */ | ||
| 33 | unsigned int max_freq; | ||
| 34 | |||
| 35 | /* switch the bus to a new slot */ | ||
| 36 | int (* switch_slot)(struct device *dev, int slot); | ||
| 37 | /* initialize board-specific MMC functionality, can be NULL if | ||
| 38 | * not supported */ | ||
| 39 | int (* init)(struct device *dev); | ||
| 40 | void (* cleanup)(struct device *dev); | ||
| 41 | |||
| 42 | struct omap_mmc_slot_data { | ||
| 43 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); | ||
| 44 | int (* set_power)(struct device *dev, int slot, int power_on, int vdd); | ||
| 45 | int (* get_ro)(struct device *dev, int slot); | ||
| 46 | |||
| 47 | /* return MMC cover switch state, can be NULL if not supported. | ||
| 48 | * | ||
| 49 | * possible return values: | ||
| 50 | * 0 - open | ||
| 51 | * 1 - closed | ||
| 52 | */ | ||
| 53 | int (* get_cover_state)(struct device *dev, int slot); | ||
| 54 | |||
| 55 | const char *name; | ||
| 56 | u32 ocr_mask; | ||
| 57 | } slots[OMAP_MMC_MAX_SLOTS]; | ||
| 58 | }; | ||
| 59 | |||
| 60 | extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); | ||
| 61 | |||
| 62 | /* called from board-specific card detection service routine */ | ||
| 63 | extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected); | ||
| 64 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); | ||
| 65 | |||
| 66 | #endif | ||
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index f1ec2edd4040..b8fff50e6a87 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h | |||
| @@ -406,6 +406,29 @@ enum omap1xxx_index { | |||
| 406 | V10_1610_CF_IREQ, | 406 | V10_1610_CF_IREQ, |
| 407 | W10_1610_CF_RESET, | 407 | W10_1610_CF_RESET, |
| 408 | W11_1610_CF_CD1, | 408 | W11_1610_CF_CD1, |
| 409 | |||
| 410 | /* parallel camera */ | ||
| 411 | J15_1610_CAM_LCLK, | ||
| 412 | J18_1610_CAM_D7, | ||
| 413 | J19_1610_CAM_D6, | ||
| 414 | J14_1610_CAM_D5, | ||
| 415 | K18_1610_CAM_D4, | ||
| 416 | K19_1610_CAM_D3, | ||
| 417 | K15_1610_CAM_D2, | ||
| 418 | K14_1610_CAM_D1, | ||
| 419 | L19_1610_CAM_D0, | ||
| 420 | L18_1610_CAM_VS, | ||
| 421 | L15_1610_CAM_HS, | ||
| 422 | M19_1610_CAM_RSTZ, | ||
| 423 | Y15_1610_CAM_OUTCLK, | ||
| 424 | |||
| 425 | /* serial camera */ | ||
| 426 | H19_1610_CAM_EXCLK, | ||
| 427 | Y12_1610_CCP_CLKP, | ||
| 428 | W13_1610_CCP_CLKM, | ||
| 429 | W14_1610_CCP_DATAP, | ||
| 430 | Y14_1610_CCP_DATAM, | ||
| 431 | |||
| 409 | }; | 432 | }; |
| 410 | 433 | ||
| 411 | enum omap24xx_index { | 434 | enum omap24xx_index { |
diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h index 708b2fac77f2..14c0f9496579 100644 --- a/include/asm-arm/arch-omap/omap24xx.h +++ b/include/asm-arm/arch-omap/omap24xx.h | |||
| @@ -8,6 +8,7 @@ | |||
| 8 | */ | 8 | */ |
| 9 | 9 | ||
| 10 | #define L4_24XX_BASE 0x48000000 | 10 | #define L4_24XX_BASE 0x48000000 |
| 11 | #define L4_WK_243X_BASE 0x49000000 | ||
| 11 | #define L3_24XX_BASE 0x68000000 | 12 | #define L3_24XX_BASE 0x68000000 |
| 12 | 13 | ||
| 13 | /* interrupt controller */ | 14 | /* interrupt controller */ |
| @@ -16,9 +17,20 @@ | |||
| 16 | #define OMAP24XX_IVA_INTC_BASE 0x40000000 | 17 | #define OMAP24XX_IVA_INTC_BASE 0x40000000 |
| 17 | #define IRQ_SIR_IRQ 0x0040 | 18 | #define IRQ_SIR_IRQ 0x0040 |
| 18 | 19 | ||
| 20 | #ifdef CONFIG_ARCH_OMAP2420 | ||
| 19 | #define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) | 21 | #define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) |
| 20 | #define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) | 22 | #define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) |
| 21 | #define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) | 23 | #define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) |
| 24 | #define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) | ||
| 25 | #endif | ||
| 26 | |||
| 27 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 28 | #define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) | ||
| 29 | #define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) | ||
| 30 | #define OMAP24XX_SDRC_BASE (0x6D000000) | ||
| 31 | #define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) | ||
| 32 | #define OMAP243X_GPMC_BASE 0x6E000000 | ||
| 33 | #endif | ||
| 22 | 34 | ||
| 23 | /* DSP SS */ | 35 | /* DSP SS */ |
| 24 | #define OMAP24XX_DSP_BASE 0x58000000 | 36 | #define OMAP24XX_DSP_BASE 0x58000000 |
diff --git a/include/asm-arm/arch-omap/onenand.h b/include/asm-arm/arch-omap/onenand.h new file mode 100644 index 000000000000..6c959d0ce470 --- /dev/null +++ b/include/asm-arm/arch-omap/onenand.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-arm/arch-omap/onenand.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Nokia Corporation | ||
| 5 | * Author: Juha Yrjola | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/mtd/partitions.h> | ||
| 13 | |||
| 14 | struct omap_onenand_platform_data { | ||
| 15 | int cs; | ||
| 16 | int gpio_irq; | ||
| 17 | struct mtd_partition *parts; | ||
| 18 | int nr_parts; | ||
| 19 | int (*onenand_setup)(void __iomem *); | ||
| 20 | int dma_channel; | ||
| 21 | }; | ||
diff --git a/include/asm-arm/arch-pxa/cm-x270.h b/include/asm-arm/arch-pxa/cm-x270.h new file mode 100644 index 000000000000..f8fac9e18009 --- /dev/null +++ b/include/asm-arm/arch-pxa/cm-x270.h | |||
| @@ -0,0 +1,50 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm/arch-pxa/cm-x270.h | ||
| 3 | * | ||
| 4 | * Copyright Compulab Ltd., 2003, 2007 | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | |||
| 13 | /* CM-x270 device physical addresses */ | ||
| 14 | #define CMX270_CS1_PHYS (PXA_CS1_PHYS) | ||
| 15 | #define MARATHON_PHYS (PXA_CS2_PHYS) | ||
| 16 | #define CMX270_IDE104_PHYS (PXA_CS3_PHYS) | ||
| 17 | #define CMX270_IT8152_PHYS (PXA_CS4_PHYS) | ||
| 18 | |||
| 19 | /* Statically mapped regions */ | ||
| 20 | #define CMX270_VIRT_BASE (0xe8000000) | ||
| 21 | #define CMX270_IT8152_VIRT (CMX270_VIRT_BASE) | ||
| 22 | #define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M) | ||
| 23 | |||
| 24 | /* GPIO related definitions */ | ||
| 25 | #define GPIO_IT8152_IRQ (22) | ||
| 26 | |||
| 27 | #define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ) | ||
| 28 | #define PME_IRQ IRQ_GPIO(0) | ||
| 29 | #define CMX270_IDE_IRQ IRQ_GPIO(100) | ||
| 30 | #define CMX270_GPIRQ1 IRQ_GPIO(101) | ||
| 31 | #define CMX270_TOUCHIRQ IRQ_GPIO(96) | ||
| 32 | #define CMX270_ETHIRQ IRQ_GPIO(10) | ||
| 33 | #define CMX270_GFXIRQ IRQ_GPIO(95) | ||
| 34 | #define CMX270_NANDIRQ IRQ_GPIO(89) | ||
| 35 | #define CMX270_MMC_IRQ IRQ_GPIO(83) | ||
| 36 | |||
| 37 | /* PCMCIA related definitions */ | ||
| 38 | #define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x))) | ||
| 39 | #define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x))) | ||
| 40 | |||
| 41 | #define PCMCIA_S0_CD_VALID IRQ_GPIO(84) | ||
| 42 | #define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES | ||
| 43 | |||
| 44 | #define PCMCIA_S1_CD_VALID IRQ_GPIO(83) | ||
| 45 | #define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES | ||
| 46 | |||
| 47 | #define PCMCIA_S0_RDYINT IRQ_GPIO(82) | ||
| 48 | #define PCMCIA_S1_RDYINT IRQ_GPIO(81) | ||
| 49 | |||
| 50 | #define PCMCIA_RESET_GPIO 53 | ||
diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h index 3280ee2ddfa5..dbe110ee2666 100644 --- a/include/asm-arm/arch-pxa/dma.h +++ b/include/asm-arm/arch-pxa/dma.h | |||
| @@ -30,6 +30,10 @@ typedef enum { | |||
| 30 | DMA_PRIO_LOW = 2 | 30 | DMA_PRIO_LOW = 2 |
| 31 | } pxa_dma_prio; | 31 | } pxa_dma_prio; |
| 32 | 32 | ||
| 33 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | ||
| 34 | #define HAVE_ARCH_PCI_SET_DMA_MASK 1 | ||
| 35 | #endif | ||
| 36 | |||
| 33 | /* | 37 | /* |
| 34 | * DMA registration | 38 | * DMA registration |
| 35 | */ | 39 | */ |
diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h index 9e99241f3edf..9dbc2dc794f7 100644 --- a/include/asm-arm/arch-pxa/gpio.h +++ b/include/asm-arm/arch-pxa/gpio.h | |||
| @@ -38,16 +38,8 @@ static inline void gpio_free(unsigned gpio) | |||
| 38 | return; | 38 | return; |
| 39 | } | 39 | } |
| 40 | 40 | ||
| 41 | static inline int gpio_direction_input(unsigned gpio) | 41 | extern int gpio_direction_input(unsigned gpio); |
| 42 | { | 42 | extern int gpio_direction_output(unsigned gpio, int value); |
| 43 | return pxa_gpio_mode(gpio | GPIO_IN); | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline int gpio_direction_output(unsigned gpio, int value) | ||
| 47 | { | ||
| 48 | return pxa_gpio_mode(gpio | GPIO_OUT | | ||
| 49 | (value ? GPIO_DFLT_HIGH : GPIO_DFLT_LOW)); | ||
| 50 | } | ||
| 51 | 43 | ||
| 52 | static inline int __gpio_get_value(unsigned gpio) | 44 | static inline int __gpio_get_value(unsigned gpio) |
| 53 | { | 45 | { |
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index 386121746417..ab2d963e742a 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h | |||
| @@ -62,6 +62,7 @@ | |||
| 62 | 62 | ||
| 63 | #ifndef __ASSEMBLY__ | 63 | #ifndef __ASSEMBLY__ |
| 64 | 64 | ||
| 65 | #ifdef CONFIG_PXA25x | ||
| 65 | #define __cpu_is_pxa21x(id) \ | 66 | #define __cpu_is_pxa21x(id) \ |
| 66 | ({ \ | 67 | ({ \ |
| 67 | unsigned int _id = (id) >> 4 & 0xf3f; \ | 68 | unsigned int _id = (id) >> 4 & 0xf3f; \ |
| @@ -73,12 +74,50 @@ | |||
| 73 | unsigned int _id = (id) >> 4 & 0xfff; \ | 74 | unsigned int _id = (id) >> 4 & 0xfff; \ |
| 74 | _id == 0x2d0 || _id == 0x290; \ | 75 | _id == 0x2d0 || _id == 0x290; \ |
| 75 | }) | 76 | }) |
| 77 | #else | ||
| 78 | #define __cpu_is_pxa21x(id) (0) | ||
| 79 | #define __cpu_is_pxa25x(id) (0) | ||
| 80 | #endif | ||
| 76 | 81 | ||
| 82 | #ifdef CONFIG_PXA27x | ||
| 77 | #define __cpu_is_pxa27x(id) \ | 83 | #define __cpu_is_pxa27x(id) \ |
| 78 | ({ \ | 84 | ({ \ |
| 79 | unsigned int _id = (id) >> 4 & 0xfff; \ | 85 | unsigned int _id = (id) >> 4 & 0xfff; \ |
| 80 | _id == 0x411; \ | 86 | _id == 0x411; \ |
| 81 | }) | 87 | }) |
| 88 | #else | ||
| 89 | #define __cpu_is_pxa27x(id) (0) | ||
| 90 | #endif | ||
| 91 | |||
| 92 | #ifdef CONFIG_CPU_PXA300 | ||
| 93 | #define __cpu_is_pxa300(id) \ | ||
| 94 | ({ \ | ||
| 95 | unsigned int _id = (id) >> 4 & 0xfff; \ | ||
| 96 | _id == 0x688; \ | ||
| 97 | }) | ||
| 98 | #else | ||
| 99 | #define __cpu_is_pxa300(id) (0) | ||
| 100 | #endif | ||
| 101 | |||
| 102 | #ifdef CONFIG_CPU_PXA310 | ||
| 103 | #define __cpu_is_pxa310(id) \ | ||
| 104 | ({ \ | ||
| 105 | unsigned int _id = (id) >> 4 & 0xfff; \ | ||
| 106 | _id == 0x689; \ | ||
| 107 | }) | ||
| 108 | #else | ||
| 109 | #define __cpu_is_pxa310(id) (0) | ||
| 110 | #endif | ||
| 111 | |||
| 112 | #ifdef CONFIG_CPU_PXA320 | ||
| 113 | #define __cpu_is_pxa320(id) \ | ||
| 114 | ({ \ | ||
| 115 | unsigned int _id = (id) >> 4 & 0xfff; \ | ||
| 116 | _id == 0x603 || _id == 0x682; \ | ||
| 117 | }) | ||
| 118 | #else | ||
| 119 | #define __cpu_is_pxa320(id) (0) | ||
| 120 | #endif | ||
| 82 | 121 | ||
| 83 | #define cpu_is_pxa21x() \ | 122 | #define cpu_is_pxa21x() \ |
| 84 | ({ \ | 123 | ({ \ |
| @@ -98,6 +137,53 @@ | |||
| 98 | __cpu_is_pxa27x(id); \ | 137 | __cpu_is_pxa27x(id); \ |
| 99 | }) | 138 | }) |
| 100 | 139 | ||
| 140 | #define cpu_is_pxa300() \ | ||
| 141 | ({ \ | ||
| 142 | unsigned int id = read_cpuid(CPUID_ID); \ | ||
| 143 | __cpu_is_pxa300(id); \ | ||
| 144 | }) | ||
| 145 | |||
| 146 | #define cpu_is_pxa310() \ | ||
| 147 | ({ \ | ||
| 148 | unsigned int id = read_cpuid(CPUID_ID); \ | ||
| 149 | __cpu_is_pxa310(id); \ | ||
| 150 | }) | ||
| 151 | |||
| 152 | #define cpu_is_pxa320() \ | ||
| 153 | ({ \ | ||
| 154 | unsigned int id = read_cpuid(CPUID_ID); \ | ||
| 155 | __cpu_is_pxa320(id); \ | ||
| 156 | }) | ||
| 157 | |||
| 158 | /* | ||
| 159 | * CPUID Core Generation Bit | ||
| 160 | * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x | ||
| 161 | * == 0x3 for pxa300/pxa310/pxa320 | ||
| 162 | */ | ||
| 163 | #define __cpu_is_pxa2xx(id) \ | ||
| 164 | ({ \ | ||
| 165 | unsigned int _id = (id) >> 13 & 0x7; \ | ||
| 166 | _id <= 0x2; \ | ||
| 167 | }) | ||
| 168 | |||
| 169 | #define __cpu_is_pxa3xx(id) \ | ||
| 170 | ({ \ | ||
| 171 | unsigned int _id = (id) >> 13 & 0x7; \ | ||
| 172 | _id == 0x3; \ | ||
| 173 | }) | ||
| 174 | |||
| 175 | #define cpu_is_pxa2xx() \ | ||
| 176 | ({ \ | ||
| 177 | unsigned int id = read_cpuid(CPUID_ID); \ | ||
| 178 | __cpu_is_pxa2xx(id); \ | ||
| 179 | }) | ||
| 180 | |||
| 181 | #define cpu_is_pxa3xx() \ | ||
| 182 | ({ \ | ||
| 183 | unsigned int id = read_cpuid(CPUID_ID); \ | ||
| 184 | __cpu_is_pxa3xx(id); \ | ||
| 185 | }) | ||
| 186 | |||
| 101 | /* | 187 | /* |
| 102 | * Handy routine to set GPIO alternate functions | 188 | * Handy routine to set GPIO alternate functions |
| 103 | */ | 189 | */ |
| @@ -116,14 +202,23 @@ extern void pxa_gpio_set_value(unsigned gpio, int value); | |||
| 116 | /* | 202 | /* |
| 117 | * Routine to enable or disable CKEN | 203 | * Routine to enable or disable CKEN |
| 118 | */ | 204 | */ |
| 119 | extern void pxa_set_cken(int clock, int enable); | 205 | static inline void __deprecated pxa_set_cken(int clock, int enable) |
| 206 | { | ||
| 207 | extern void __pxa_set_cken(int clock, int enable); | ||
| 208 | __pxa_set_cken(clock, enable); | ||
| 209 | } | ||
| 120 | 210 | ||
| 121 | /* | 211 | /* |
| 122 | * return current memory and LCD clock frequency in units of 10kHz | 212 | * return current memory and LCD clock frequency in units of 10kHz |
| 123 | */ | 213 | */ |
| 124 | extern unsigned int get_memclk_frequency_10khz(void); | 214 | extern unsigned int get_memclk_frequency_10khz(void); |
| 125 | extern unsigned int get_lcdclk_frequency_10khz(void); | ||
| 126 | 215 | ||
| 127 | #endif | 216 | #endif |
| 128 | 217 | ||
| 218 | #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | ||
| 219 | #define PCIBIOS_MIN_IO 0 | ||
| 220 | #define PCIBIOS_MIN_MEM 0 | ||
| 221 | #define pcibios_assign_all_busses() 1 | ||
| 222 | #endif | ||
| 223 | |||
| 129 | #endif /* _ASM_ARCH_HARDWARE_H */ | 224 | #endif /* _ASM_ARCH_HARDWARE_H */ |
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index a07fe0f928cd..6238dbf7a236 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h | |||
| @@ -66,12 +66,6 @@ | |||
| 66 | #define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) | 66 | #define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) |
| 67 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) | 67 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) |
| 68 | 68 | ||
| 69 | #if defined(CONFIG_PXA25x) | ||
| 70 | #define PXA_LAST_GPIO 84 | ||
| 71 | #elif defined(CONFIG_PXA27x) | ||
| 72 | #define PXA_LAST_GPIO 127 | ||
| 73 | #endif | ||
| 74 | |||
| 75 | /* | 69 | /* |
| 76 | * The next 16 interrupts are for board specific purposes. Since | 70 | * The next 16 interrupts are for board specific purposes. Since |
| 77 | * the kernel can only run on one machine at a time, we can re-use | 71 | * the kernel can only run on one machine at a time, we can re-use |
| @@ -216,3 +210,24 @@ | |||
| 216 | #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) | 210 | #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) |
| 217 | #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) | 211 | #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) |
| 218 | #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) | 212 | #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) |
| 213 | |||
| 214 | /* ITE8152 irqs */ | ||
| 215 | /* add IT8152 IRQs beyond BOARD_END */ | ||
| 216 | #ifdef CONFIG_PCI_HOST_ITE8152 | ||
| 217 | #define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x)) | ||
| 218 | |||
| 219 | /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ | ||
| 220 | #define IT8152_LD_IRQ_COUNT 9 | ||
| 221 | #define IT8152_LP_IRQ_COUNT 16 | ||
| 222 | #define IT8152_PD_IRQ_COUNT 15 | ||
| 223 | |||
| 224 | /* Priorities: */ | ||
| 225 | #define IT8152_PD_IRQ(i) IT8152_IRQ(i) | ||
| 226 | #define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT) | ||
| 227 | #define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT) | ||
| 228 | |||
| 229 | #define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) | ||
| 230 | |||
| 231 | #undef NR_IRQS | ||
| 232 | #define NR_IRQS (IT8152_LAST_IRQ+1) | ||
| 233 | #endif | ||
diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h index e17f9881faf0..bee81d66c184 100644 --- a/include/asm-arm/arch-pxa/memory.h +++ b/include/asm-arm/arch-pxa/memory.h | |||
| @@ -39,4 +39,14 @@ | |||
| 39 | */ | 39 | */ |
| 40 | #define NODE_MEM_SIZE_BITS 26 | 40 | #define NODE_MEM_SIZE_BITS 26 |
| 41 | 41 | ||
| 42 | #if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) | ||
| 43 | void cmx270_pci_adjust_zones(int node, unsigned long *size, | ||
| 44 | unsigned long *holes); | ||
| 45 | |||
| 46 | #define arch_adjust_zones(node, size, holes) \ | ||
| 47 | cmx270_pci_adjust_zones(node, size, holes) | ||
| 48 | |||
| 49 | #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) | ||
| 50 | #endif | ||
| 51 | |||
| 42 | #endif | 52 | #endif |
diff --git a/include/asm-arm/arch-pxa/mfp-pxa300.h b/include/asm-arm/arch-pxa/mfp-pxa300.h new file mode 100644 index 000000000000..7513c7a3402d --- /dev/null +++ b/include/asm-arm/arch-pxa/mfp-pxa300.h | |||
| @@ -0,0 +1,574 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-pxa/mfp-pxa300.h | ||
| 3 | * | ||
| 4 | * PXA300/PXA310 specific MFP configuration definitions | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell International Ltd. | ||
| 7 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 8 | * initial version | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_MFP_PXA300_H | ||
| 16 | #define __ASM_ARCH_MFP_PXA300_H | ||
| 17 | |||
| 18 | #include <asm/arch/mfp.h> | ||
| 19 | |||
| 20 | /* GPIO */ | ||
| 21 | #define GPIO46_GPIO MFP_CFG(GPIO46, AF1) | ||
| 22 | #define GPIO49_GPIO MFP_CFG(GPIO49, AF3) | ||
| 23 | #define GPIO50_GPIO MFP_CFG(GPIO50, AF2) | ||
| 24 | #define GPIO51_GPIO MFP_CFG(GPIO51, AF3) | ||
| 25 | #define GPIO52_GPIO MFP_CFG(GPIO52, AF3) | ||
| 26 | #define GPIO56_GPIO MFP_CFG(GPIO56, AF0) | ||
| 27 | #define GPIO58_GPIO MFP_CFG(GPIO58, AF0) | ||
| 28 | #define GPIO59_GPIO MFP_CFG(GPIO59, AF0) | ||
| 29 | #define GPIO60_GPIO MFP_CFG(GPIO60, AF0) | ||
| 30 | #define GPIO61_GPIO MFP_CFG(GPIO61, AF0) | ||
| 31 | #define GPIO62_GPIO MFP_CFG(GPIO62, AF0) | ||
| 32 | |||
| 33 | #ifdef CONFIG_CPU_PXA310 | ||
| 34 | #define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0) | ||
| 35 | #define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0) | ||
| 36 | #define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0) | ||
| 37 | #define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0) | ||
| 38 | #define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0) | ||
| 39 | #define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0) | ||
| 40 | #endif | ||
| 41 | |||
| 42 | /* Chip Select */ | ||
| 43 | #define GPIO2_nCS3 MFP_CFG(GPIO2, AF1) | ||
| 44 | |||
| 45 | /* AC97 */ | ||
| 46 | #define GPIO23_AC97_nACRESET MFP_CFG(GPIO23, AF1) | ||
| 47 | #define GPIO24_AC97_SYSCLK MFP_CFG(GPIO24, AF1) | ||
| 48 | #define GPIO29_AC97_BITCLK MFP_CFG(GPIO29, AF1) | ||
| 49 | #define GPIO25_AC97_SDATA_IN_0 MFP_CFG(GPIO25, AF1) | ||
| 50 | #define GPIO26_AC97_SDATA_IN_1 MFP_CFG(GPIO26, AF1) | ||
| 51 | #define GPIO17_AC97_SDATA_IN_2 MFP_CFG(GPIO17, AF3) | ||
| 52 | #define GPIO21_AC97_SDATA_IN_2 MFP_CFG(GPIO21, AF2) | ||
| 53 | #define GPIO18_AC97_SDATA_IN_3 MFP_CFG(GPIO18, AF3) | ||
| 54 | #define GPIO22_AC97_SDATA_IN_3 MFP_CFG(GPIO22, AF2) | ||
| 55 | #define GPIO27_AC97_SDATA_OUT MFP_CFG(GPIO27, AF1) | ||
| 56 | #define GPIO28_AC97_SYNC MFP_CFG(GPIO28, AF1) | ||
| 57 | |||
| 58 | /* I2C */ | ||
| 59 | #define GPIO21_I2C_SCL MFP_CFG_LPM(GPIO21, AF1, PULL_HIGH) | ||
| 60 | #define GPIO22_I2C_SDA MFP_CFG_LPM(GPIO22, AF1, PULL_HIGH) | ||
| 61 | |||
| 62 | /* QCI */ | ||
| 63 | #define GPIO39_CI_DD_0 MFP_CFG_DRV(GPIO39, AF1, DS04X) | ||
| 64 | #define GPIO40_CI_DD_1 MFP_CFG_DRV(GPIO40, AF1, DS04X) | ||
| 65 | #define GPIO41_CI_DD_2 MFP_CFG_DRV(GPIO41, AF1, DS04X) | ||
| 66 | #define GPIO42_CI_DD_3 MFP_CFG_DRV(GPIO42, AF1, DS04X) | ||
| 67 | #define GPIO43_CI_DD_4 MFP_CFG_DRV(GPIO43, AF1, DS04X) | ||
| 68 | #define GPIO44_CI_DD_5 MFP_CFG_DRV(GPIO44, AF1, DS04X) | ||
| 69 | #define GPIO45_CI_DD_6 MFP_CFG_DRV(GPIO45, AF1, DS04X) | ||
| 70 | #define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X) | ||
| 71 | #define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X) | ||
| 72 | #define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X) | ||
| 73 | #define GPIO52_CI_HSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X) | ||
| 74 | #define GPIO51_CI_VSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X) | ||
| 75 | #define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X) | ||
| 76 | #define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X) | ||
| 77 | |||
| 78 | /* KEYPAD */ | ||
| 79 | #define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT) | ||
| 80 | #define GPIO4_KP_DKIN_7 MFP_CFG_LPM(GPIO4, AF2, FLOAT) | ||
| 81 | #define GPIO16_KP_DKIN_6 MFP_CFG_LPM(GPIO16, AF6, FLOAT) | ||
| 82 | #define GPIO83_KP_DKIN_2 MFP_CFG_LPM(GPIO83, AF5, FLOAT) | ||
| 83 | #define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF5, FLOAT) | ||
| 84 | #define GPIO85_KP_DKIN_0 MFP_CFG_LPM(GPIO85, AF3, FLOAT) | ||
| 85 | #define GPIO86_KP_DKIN_1 MFP_CFG_LPM(GPIO86, AF3, FLOAT) | ||
| 86 | #define GPIO87_KP_DKIN_2 MFP_CFG_LPM(GPIO87, AF3, FLOAT) | ||
| 87 | #define GPIO88_KP_DKIN_3 MFP_CFG_LPM(GPIO88, AF3, FLOAT) | ||
| 88 | #define GPIO89_KP_DKIN_3 MFP_CFG_LPM(GPIO89, AF3, FLOAT) | ||
| 89 | #define GPIO107_KP_DKIN_0 MFP_CFG_LPM(GPIO107, AF2, FLOAT) | ||
| 90 | #define GPIO108_KP_DKIN_1 MFP_CFG_LPM(GPIO108, AF2, FLOAT) | ||
| 91 | #define GPIO109_KP_DKIN_2 MFP_CFG_LPM(GPIO109, AF2, FLOAT) | ||
| 92 | #define GPIO110_KP_DKIN_3 MFP_CFG_LPM(GPIO110, AF2, FLOAT) | ||
| 93 | #define GPIO111_KP_DKIN_4 MFP_CFG_LPM(GPIO111, AF2, FLOAT) | ||
| 94 | #define GPIO112_KP_DKIN_5 MFP_CFG_LPM(GPIO112, AF2, FLOAT) | ||
| 95 | #define GPIO113_KP_DKIN_6 MFP_CFG_LPM(GPIO113, AF2, FLOAT) | ||
| 96 | #define GPIO114_KP_DKIN_7 MFP_CFG_LPM(GPIO114, AF2, FLOAT) | ||
| 97 | #define GPIO115_KP_DKIN_0 MFP_CFG_LPM(GPIO115, AF2, FLOAT) | ||
| 98 | #define GPIO116_KP_DKIN_1 MFP_CFG_LPM(GPIO116, AF2, FLOAT) | ||
| 99 | #define GPIO117_KP_DKIN_2 MFP_CFG_LPM(GPIO117, AF2, FLOAT) | ||
| 100 | #define GPIO118_KP_DKIN_3 MFP_CFG_LPM(GPIO118, AF2, FLOAT) | ||
| 101 | #define GPIO119_KP_DKIN_4 MFP_CFG_LPM(GPIO119, AF2, FLOAT) | ||
| 102 | #define GPIO120_KP_DKIN_5 MFP_CFG_LPM(GPIO120, AF2, FLOAT) | ||
| 103 | #define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT) | ||
| 104 | #define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT) | ||
| 105 | #define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT) | ||
| 106 | #define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT) | ||
| 107 | #define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF5, FLOAT) | ||
| 108 | #define GPIO0_2_KP_DKIN_0 MFP_CFG_LPM(GPIO0_2, AF2, FLOAT) | ||
| 109 | #define GPIO1_2_KP_DKIN_1 MFP_CFG_LPM(GPIO1_2, AF2, FLOAT) | ||
| 110 | #define GPIO2_2_KP_DKIN_6 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT) | ||
| 111 | #define GPIO3_2_KP_DKIN_7 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT) | ||
| 112 | #define GPIO4_2_KP_DKIN_1 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT) | ||
| 113 | #define GPIO5_2_KP_DKIN_0 MFP_CFG_LPM(GPIO5_2, AF2, FLOAT) | ||
| 114 | |||
| 115 | #define GPIO5_KP_MKIN_0 MFP_CFG_LPM(GPIO5, AF2, FLOAT) | ||
| 116 | #define GPIO6_KP_MKIN_1 MFP_CFG_LPM(GPIO6, AF2, FLOAT) | ||
| 117 | #define GPIO9_KP_MKIN_6 MFP_CFG_LPM(GPIO9, AF3, FLOAT) | ||
| 118 | #define GPIO10_KP_MKIN_7 MFP_CFG_LPM(GPIO10, AF3, FLOAT) | ||
| 119 | #define GPIO70_KP_MKIN_6 MFP_CFG_LPM(GPIO70, AF3, FLOAT) | ||
| 120 | #define GPIO71_KP_MKIN_7 MFP_CFG_LPM(GPIO71, AF3, FLOAT) | ||
| 121 | #define GPIO100_KP_MKIN_6 MFP_CFG_LPM(GPIO100, AF7, FLOAT) | ||
| 122 | #define GPIO101_KP_MKIN_7 MFP_CFG_LPM(GPIO101, AF7, FLOAT) | ||
| 123 | #define GPIO112_KP_MKIN_6 MFP_CFG_LPM(GPIO112, AF4, FLOAT) | ||
| 124 | #define GPIO113_KP_MKIN_7 MFP_CFG_LPM(GPIO113, AF4, FLOAT) | ||
| 125 | #define GPIO115_KP_MKIN_0 MFP_CFG_LPM(GPIO115, AF1, FLOAT) | ||
| 126 | #define GPIO116_KP_MKIN_1 MFP_CFG_LPM(GPIO116, AF1, FLOAT) | ||
| 127 | #define GPIO117_KP_MKIN_2 MFP_CFG_LPM(GPIO117, AF1, FLOAT) | ||
| 128 | #define GPIO118_KP_MKIN_3 MFP_CFG_LPM(GPIO118, AF1, FLOAT) | ||
| 129 | #define GPIO119_KP_MKIN_4 MFP_CFG_LPM(GPIO119, AF1, FLOAT) | ||
| 130 | #define GPIO120_KP_MKIN_5 MFP_CFG_LPM(GPIO120, AF1, FLOAT) | ||
| 131 | #define GPIO125_KP_MKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT) | ||
| 132 | #define GPIO2_2_KP_MKIN_6 MFP_CFG_LPM(GPIO2_2, AF1, FLOAT) | ||
| 133 | #define GPIO3_2_KP_MKIN_7 MFP_CFG_LPM(GPIO3_2, AF1, FLOAT) | ||
| 134 | |||
| 135 | #define GPIO7_KP_MKOUT_5 MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH) | ||
| 136 | #define GPIO11_KP_MKOUT_5 MFP_CFG_LPM(GPIO11, AF3, DRIVE_HIGH) | ||
| 137 | #define GPIO12_KP_MKOUT_6 MFP_CFG_LPM(GPIO12, AF3, DRIVE_HIGH) | ||
| 138 | #define GPIO13_KP_MKOUT_7 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH) | ||
| 139 | #define GPIO19_KP_MKOUT_4 MFP_CFG_LPM(GPIO19, AF3, DRIVE_HIGH) | ||
| 140 | #define GPIO20_KP_MKOUT_5 MFP_CFG_LPM(GPIO20, AF3, DRIVE_HIGH) | ||
| 141 | #define GPIO38_KP_MKOUT_5 MFP_CFG_LPM(GPIO38, AF5, DRIVE_HIGH) | ||
| 142 | #define GPIO53_KP_MKOUT_6 MFP_CFG_LPM(GPIO53, AF5, DRIVE_HIGH) | ||
| 143 | #define GPIO78_KP_MKOUT_7 MFP_CFG_LPM(GPIO78, AF5, DRIVE_HIGH) | ||
| 144 | #define GPIO85_KP_MKOUT_0 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH) | ||
| 145 | #define GPIO86_KP_MKOUT_1 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH) | ||
| 146 | #define GPIO87_KP_MKOUT_2 MFP_CFG_LPM(GPIO87, AF2, DRIVE_HIGH) | ||
| 147 | #define GPIO88_KP_MKOUT_3 MFP_CFG_LPM(GPIO88, AF2, DRIVE_HIGH) | ||
| 148 | #define GPIO104_KP_MKOUT_6 MFP_CFG_LPM(GPIO104, AF5, DRIVE_HIGH) | ||
| 149 | #define GPIO105_KP_MKOUT_7 MFP_CFG_LPM(GPIO105, AF5, DRIVE_HIGH) | ||
| 150 | #define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH) | ||
| 151 | #define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH) | ||
| 152 | #define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH) | ||
| 153 | #define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH) | ||
| 154 | #define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH) | ||
| 155 | #define GPIO126_KP_MKOUT_7 MFP_CFG_LPM(GPIO126, AF4, DRIVE_HIGH) | ||
| 156 | #define GPIO5_2_KP_MKOUT_6 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH) | ||
| 157 | #define GPIO4_2_KP_MKOUT_5 MFP_CFG_LPM(GPIO4_2, AF1, DRIVE_HIGH) | ||
| 158 | #define GPIO6_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO6_2, AF1, DRIVE_HIGH) | ||
| 159 | |||
| 160 | /* LCD */ | ||
| 161 | #define GPIO54_LCD_LDD_0 MFP_CFG_DRV(GPIO54, AF1, DS01X) | ||
| 162 | #define GPIO55_LCD_LDD_1 MFP_CFG_DRV(GPIO55, AF1, DS01X) | ||
| 163 | #define GPIO56_LCD_LDD_2 MFP_CFG_DRV(GPIO56, AF1, DS01X) | ||
| 164 | #define GPIO57_LCD_LDD_3 MFP_CFG_DRV(GPIO57, AF1, DS01X) | ||
| 165 | #define GPIO58_LCD_LDD_4 MFP_CFG_DRV(GPIO58, AF1, DS01X) | ||
| 166 | #define GPIO59_LCD_LDD_5 MFP_CFG_DRV(GPIO59, AF1, DS01X) | ||
| 167 | #define GPIO60_LCD_LDD_6 MFP_CFG_DRV(GPIO60, AF1, DS01X) | ||
| 168 | #define GPIO61_LCD_LDD_7 MFP_CFG_DRV(GPIO61, AF1, DS01X) | ||
| 169 | #define GPIO62_LCD_LDD_8 MFP_CFG_DRV(GPIO62, AF1, DS01X) | ||
| 170 | #define GPIO63_LCD_LDD_9 MFP_CFG_DRV(GPIO63, AF1, DS01X) | ||
| 171 | #define GPIO64_LCD_LDD_10 MFP_CFG_DRV(GPIO64, AF1, DS01X) | ||
| 172 | #define GPIO65_LCD_LDD_11 MFP_CFG_DRV(GPIO65, AF1, DS01X) | ||
| 173 | #define GPIO66_LCD_LDD_12 MFP_CFG_DRV(GPIO66, AF1, DS01X) | ||
| 174 | #define GPIO67_LCD_LDD_13 MFP_CFG_DRV(GPIO67, AF1, DS01X) | ||
| 175 | #define GPIO68_LCD_LDD_14 MFP_CFG_DRV(GPIO68, AF1, DS01X) | ||
| 176 | #define GPIO69_LCD_LDD_15 MFP_CFG_DRV(GPIO69, AF1, DS01X) | ||
| 177 | #define GPIO70_LCD_LDD_16 MFP_CFG_DRV(GPIO70, AF1, DS01X) | ||
| 178 | #define GPIO71_LCD_LDD_17 MFP_CFG_DRV(GPIO71, AF1, DS01X) | ||
| 179 | #define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X) | ||
| 180 | #define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X) | ||
| 181 | #define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X) | ||
| 182 | #define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS01X) | ||
| 183 | #define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X) | ||
| 184 | #define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X) | ||
| 185 | |||
| 186 | #define GPIO15_LCD_CS_N MFP_CFG_DRV(GPIO15, AF2, DS01X) | ||
| 187 | #define GPIO127_LCD_CS_N MFP_CFG_DRV(GPIO127, AF1, DS01X) | ||
| 188 | #define GPIO63_LCD_VSYNC MFP_CFG_DRV(GPIO63, AF2, DS01X) | ||
| 189 | |||
| 190 | /* Mini-LCD */ | ||
| 191 | #define GPIO72_MLCD_FCLK MFP_CFG_DRV(GPIO72, AF7, DS08X) | ||
| 192 | #define GPIO73_MLCD_LCLK MFP_CFG_DRV(GPIO73, AF7, DS08X) | ||
| 193 | #define GPIO54_MLCD_LDD_0 MFP_CFG_DRV(GPIO54, AF7, DS08X) | ||
| 194 | #define GPIO55_MLCD_LDD_1 MFP_CFG_DRV(GPIO55, AF7, DS08X) | ||
| 195 | #define GPIO56_MLCD_LDD_2 MFP_CFG_DRV(GPIO56, AF7, DS08X) | ||
| 196 | #define GPIO57_MLCD_LDD_3 MFP_CFG_DRV(GPIO57, AF7, DS08X) | ||
| 197 | #define GPIO58_MLCD_LDD_4 MFP_CFG_DRV(GPIO58, AF7, DS08X) | ||
| 198 | #define GPIO59_MLCD_LDD_5 MFP_CFG_DRV(GPIO59, AF7, DS08X) | ||
| 199 | #define GPIO60_MLCD_LDD_6 MFP_CFG_DRV(GPIO60, AF7, DS08X) | ||
| 200 | #define GPIO61_MLCD_LDD_7 MFP_CFG_DRV(GPIO61, AF7, DS08X) | ||
| 201 | #define GPIO62_MLCD_LDD_8 MFP_CFG_DRV(GPIO62, AF7, DS08X) | ||
| 202 | #define GPIO63_MLCD_LDD_9 MFP_CFG_DRV(GPIO63, AF7, DS08X) | ||
| 203 | #define GPIO64_MLCD_LDD_10 MFP_CFG_DRV(GPIO64, AF7, DS08X) | ||
| 204 | #define GPIO65_MLCD_LDD_11 MFP_CFG_DRV(GPIO65, AF7, DS08X) | ||
| 205 | #define GPIO66_MLCD_LDD_12 MFP_CFG_DRV(GPIO66, AF7, DS08X) | ||
| 206 | #define GPIO67_MLCD_LDD_13 MFP_CFG_DRV(GPIO67, AF7, DS08X) | ||
| 207 | #define GPIO68_MLCD_LDD_14 MFP_CFG_DRV(GPIO68, AF7, DS08X) | ||
| 208 | #define GPIO69_MLCD_LDD_15 MFP_CFG_DRV(GPIO69, AF7, DS08X) | ||
| 209 | #define GPIO74_MLCD_PCLK MFP_CFG_DRV(GPIO74, AF7, DS08X) | ||
| 210 | #define GPIO75_MLCD_BIAS MFP_CFG_DRV(GPIO75, AF2, DS08X) | ||
| 211 | |||
| 212 | /* MMC1 */ | ||
| 213 | #define GPIO7_MMC1_CLK MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH) | ||
| 214 | #define GPIO8_MMC1_CMD MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH) | ||
| 215 | #define GPIO14_MMC1_CMD MFP_CFG_LPM(GPIO14, AF5, DRIVE_HIGH) | ||
| 216 | #define GPIO15_MMC1_CMD MFP_CFG_LPM(GPIO15, AF5, DRIVE_HIGH) | ||
| 217 | #define GPIO3_MMC1_DAT0 MFP_CFG_LPM(GPIO3, AF4, DRIVE_HIGH) | ||
| 218 | #define GPIO4_MMC1_DAT1 MFP_CFG_LPM(GPIO4, AF4, DRIVE_HIGH) | ||
| 219 | #define GPIO5_MMC1_DAT2 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH) | ||
| 220 | #define GPIO6_MMC1_DAT3 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH) | ||
| 221 | |||
| 222 | /* MMC2 */ | ||
| 223 | #define GPIO9_MMC2_DAT0 MFP_CFG_LPM(GPIO9, AF4, PULL_HIGH) | ||
| 224 | #define GPIO10_MMC2_DAT1 MFP_CFG_LPM(GPIO10, AF4, PULL_HIGH) | ||
| 225 | #define GPIO11_MMC2_DAT2 MFP_CFG_LPM(GPIO11, AF4, PULL_HIGH) | ||
| 226 | #define GPIO12_MMC2_DAT3 MFP_CFG_LPM(GPIO12, AF4, PULL_HIGH) | ||
| 227 | #define GPIO13_MMC2_CLK MFP_CFG_LPM(GPIO13, AF4, PULL_HIGH) | ||
| 228 | #define GPIO14_MMC2_CMD MFP_CFG_LPM(GPIO14, AF4, PULL_HIGH) | ||
| 229 | #define GPIO77_MMC2_DAT0 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH) | ||
| 230 | #define GPIO78_MMC2_DAT1 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH) | ||
| 231 | #define GPIO79_MMC2_DAT2 MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH) | ||
| 232 | #define GPIO80_MMC2_DAT3 MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH) | ||
| 233 | #define GPIO81_MMC2_CLK MFP_CFG_LPM(GPIO81, AF4, PULL_HIGH) | ||
| 234 | #define GPIO82_MMC2_CMD MFP_CFG_LPM(GPIO82, AF4, PULL_HIGH) | ||
| 235 | |||
| 236 | /* SSP1 */ | ||
| 237 | #define GPIO89_SSP1_EXTCLK MFP_CFG(GPIO89, AF1) | ||
| 238 | #define GPIO90_SSP1_SYSCLK MFP_CFG(GPIO90, AF1) | ||
| 239 | #define GPIO15_SSP1_SCLK MFP_CFG(GPIO15, AF6) | ||
| 240 | #define GPIO16_SSP1_FRM MFP_CFG(GPIO16, AF2) | ||
| 241 | #define GPIO33_SSP1_SCLK MFP_CFG(GPIO33, AF5) | ||
| 242 | #define GPIO34_SSP1_FRM MFP_CFG(GPIO34, AF5) | ||
| 243 | #define GPIO85_SSP1_SCLK MFP_CFG(GPIO85, AF1) | ||
| 244 | #define GPIO86_SSP1_FRM MFP_CFG(GPIO86, AF1) | ||
| 245 | #define GPIO18_SSP1_TXD MFP_CFG(GPIO18, AF7) | ||
| 246 | #define GPIO18_SSP1_RXD MFP_CFG(GPIO18, AF2) | ||
| 247 | #define GPIO20_SSP1_TXD MFP_CFG(GPIO20, AF2) | ||
| 248 | #define GPIO20_SSP1_RXD MFP_CFG(GPIO20, AF7) | ||
| 249 | #define GPIO35_SSP1_TXD MFP_CFG(GPIO35, AF5) | ||
| 250 | #define GPIO35_SSP1_RXD MFP_CFG(GPIO35, AF4) | ||
| 251 | #define GPIO36_SSP1_TXD MFP_CFG(GPIO36, AF5) | ||
| 252 | #define GPIO36_SSP1_RXD MFP_CFG(GPIO36, AF6) | ||
| 253 | #define GPIO87_SSP1_TXD MFP_CFG(GPIO87, AF1) | ||
| 254 | #define GPIO87_SSP1_RXD MFP_CFG(GPIO87, AF6) | ||
| 255 | #define GPIO88_SSP1_TXD MFP_CFG(GPIO88, AF6) | ||
| 256 | #define GPIO88_SSP1_RXD MFP_CFG(GPIO88, AF1) | ||
| 257 | |||
| 258 | /* SSP2 */ | ||
| 259 | #define GPIO29_SSP2_EXTCLK MFP_CFG(GPIO29, AF2) | ||
| 260 | #define GPIO23_SSP2_SCLK MFP_CFG(GPIO23, AF2) | ||
| 261 | #define GPIO17_SSP2_FRM MFP_CFG(GPIO17, AF2) | ||
| 262 | #define GPIO25_SSP2_SCLK MFP_CFG(GPIO25, AF2) | ||
| 263 | #define GPIO26_SSP2_FRM MFP_CFG(GPIO26, AF2) | ||
| 264 | #define GPIO33_SSP2_SCLK MFP_CFG(GPIO33, AF6) | ||
| 265 | #define GPIO34_SSP2_FRM MFP_CFG(GPIO34, AF6) | ||
| 266 | #define GPIO64_SSP2_SCLK MFP_CFG(GPIO64, AF2) | ||
| 267 | #define GPIO65_SSP2_FRM MFP_CFG(GPIO65, AF2) | ||
| 268 | #define GPIO19_SSP2_TXD MFP_CFG(GPIO19, AF2) | ||
| 269 | #define GPIO19_SSP2_RXD MFP_CFG(GPIO19, AF7) | ||
| 270 | #define GPIO24_SSP2_TXD MFP_CFG(GPIO24, AF5) | ||
| 271 | #define GPIO24_SSP2_RXD MFP_CFG(GPIO24, AF4) | ||
| 272 | #define GPIO27_SSP2_TXD MFP_CFG(GPIO27, AF2) | ||
| 273 | #define GPIO27_SSP2_RXD MFP_CFG(GPIO27, AF5) | ||
| 274 | #define GPIO28_SSP2_TXD MFP_CFG(GPIO28, AF5) | ||
| 275 | #define GPIO28_SSP2_RXD MFP_CFG(GPIO28, AF2) | ||
| 276 | #define GPIO35_SSP2_TXD MFP_CFG(GPIO35, AF7) | ||
| 277 | #define GPIO35_SSP2_RXD MFP_CFG(GPIO35, AF6) | ||
| 278 | #define GPIO66_SSP2_TXD MFP_CFG(GPIO66, AF4) | ||
| 279 | #define GPIO66_SSP2_RXD MFP_CFG(GPIO66, AF2) | ||
| 280 | #define GPIO67_SSP2_TXD MFP_CFG(GPIO67, AF2) | ||
| 281 | #define GPIO67_SSP2_RXD MFP_CFG(GPIO67, AF4) | ||
| 282 | #define GPIO36_SSP2_TXD MFP_CFG(GPIO36, AF7) | ||
| 283 | |||
| 284 | /* SSP3 */ | ||
| 285 | #define GPIO69_SSP3_FRM MFP_CFG_X(GPIO69, AF2, DS08X, DRIVE_LOW) | ||
| 286 | #define GPIO68_SSP3_SCLK MFP_CFG_X(GPIO68, AF2, DS08X, FLOAT) | ||
| 287 | #define GPIO92_SSP3_FRM MFP_CFG_X(GPIO92, AF1, DS08X, DRIVE_LOW) | ||
| 288 | #define GPIO91_SSP3_SCLK MFP_CFG_X(GPIO91, AF1, DS08X, FLOAT) | ||
| 289 | #define GPIO70_SSP3_TXD MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW) | ||
| 290 | #define GPIO70_SSP3_RXD MFP_CFG_X(GPIO70, AF5, DS08X, FLOAT) | ||
| 291 | #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF5, DS08X, DRIVE_LOW) | ||
| 292 | #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF2, DS08X, FLOAT) | ||
| 293 | #define GPIO93_SSP3_TXD MFP_CFG_X(GPIO93, AF1, DS08X, DRIVE_LOW) | ||
| 294 | #define GPIO93_SSP3_RXD MFP_CFG_X(GPIO93, AF5, DS08X, FLOAT) | ||
| 295 | #define GPIO94_SSP3_TXD MFP_CFG_X(GPIO94, AF5, DS08X, DRIVE_LOW) | ||
| 296 | #define GPIO94_SSP3_RXD MFP_CFG_X(GPIO94, AF1, DS08X, FLOAT) | ||
| 297 | |||
| 298 | /* SSP4 */ | ||
| 299 | #define GPIO95_SSP4_SCLK MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) | ||
| 300 | #define GPIO96_SSP4_FRM MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) | ||
| 301 | #define GPIO97_SSP4_TXD MFP_CFG_LPM(GPIO97, AF1, PULL_HIGH) | ||
| 302 | #define GPIO97_SSP4_RXD MFP_CFG_LPM(GPIO97, AF5, PULL_HIGH) | ||
| 303 | #define GPIO98_SSP4_TXD MFP_CFG_LPM(GPIO98, AF5, PULL_HIGH) | ||
| 304 | #define GPIO98_SSP4_RXD MFP_CFG_LPM(GPIO98, AF1, PULL_HIGH) | ||
| 305 | |||
| 306 | /* UART1 */ | ||
| 307 | #define GPIO32_UART1_CTS MFP_CFG_LPM(GPIO32, AF2, FLOAT) | ||
| 308 | #define GPIO37_UART1_CTS MFP_CFG_LPM(GPIO37, AF4, FLOAT) | ||
| 309 | #define GPIO79_UART1_CTS MFP_CFG_LPM(GPIO79, AF1, FLOAT) | ||
| 310 | #define GPIO84_UART1_CTS MFP_CFG_LPM(GPIO84, AF3, FLOAT) | ||
| 311 | #define GPIO101_UART1_CTS MFP_CFG_LPM(GPIO101, AF1, FLOAT) | ||
| 312 | #define GPIO106_UART1_CTS MFP_CFG_LPM(GPIO106, AF6, FLOAT) | ||
| 313 | |||
| 314 | #define GPIO32_UART1_RTS MFP_CFG_LPM(GPIO32, AF4, FLOAT) | ||
| 315 | #define GPIO37_UART1_RTS MFP_CFG_LPM(GPIO37, AF2, FLOAT) | ||
| 316 | #define GPIO79_UART1_RTS MFP_CFG_LPM(GPIO79, AF3, FLOAT) | ||
| 317 | #define GPIO84_UART1_RTS MFP_CFG_LPM(GPIO84, AF1, FLOAT) | ||
| 318 | #define GPIO101_UART1_RTS MFP_CFG_LPM(GPIO101, AF6, FLOAT) | ||
| 319 | #define GPIO106_UART1_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT) | ||
| 320 | |||
| 321 | #define GPIO34_UART1_DSR MFP_CFG_LPM(GPIO34, AF2, FLOAT) | ||
| 322 | #define GPIO36_UART1_DSR MFP_CFG_LPM(GPIO36, AF4, FLOAT) | ||
| 323 | #define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF1, FLOAT) | ||
| 324 | #define GPIO83_UART1_DSR MFP_CFG_LPM(GPIO83, AF3, FLOAT) | ||
| 325 | #define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF1, FLOAT) | ||
| 326 | #define GPIO105_UART1_DSR MFP_CFG_LPM(GPIO105, AF6, FLOAT) | ||
| 327 | |||
| 328 | #define GPIO34_UART1_DTR MFP_CFG_LPM(GPIO34, AF4, FLOAT) | ||
| 329 | #define GPIO36_UART1_DTR MFP_CFG_LPM(GPIO36, AF2, FLOAT) | ||
| 330 | #define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF3, FLOAT) | ||
| 331 | #define GPIO83_UART1_DTR MFP_CFG_LPM(GPIO83, AF1, FLOAT) | ||
| 332 | #define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF6, FLOAT) | ||
| 333 | #define GPIO105_UART1_DTR MFP_CFG_LPM(GPIO105, AF1, FLOAT) | ||
| 334 | |||
| 335 | #define GPIO35_UART1_RI MFP_CFG_LPM(GPIO35, AF2, FLOAT) | ||
| 336 | #define GPIO82_UART1_RI MFP_CFG_LPM(GPIO82, AF1, FLOAT) | ||
| 337 | #define GPIO104_UART1_RI MFP_CFG_LPM(GPIO104, AF1, FLOAT) | ||
| 338 | |||
| 339 | #define GPIO33_UART1_DCD MFP_CFG_LPM(GPIO33, AF2, FLOAT) | ||
| 340 | #define GPIO80_UART1_DCD MFP_CFG_LPM(GPIO80, AF1, FLOAT) | ||
| 341 | #define GPIO102_UART1_DCD MFP_CFG_LPM(GPIO102, AF1, FLOAT) | ||
| 342 | |||
| 343 | #define GPIO30_UART1_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT) | ||
| 344 | #define GPIO31_UART1_RXD MFP_CFG_LPM(GPIO31, AF4, FLOAT) | ||
| 345 | #define GPIO77_UART1_RXD MFP_CFG_LPM(GPIO77, AF1, FLOAT) | ||
| 346 | #define GPIO78_UART1_RXD MFP_CFG_LPM(GPIO78, AF3, FLOAT) | ||
| 347 | #define GPIO99_UART1_RXD MFP_CFG_LPM(GPIO99, AF1, FLOAT) | ||
| 348 | #define GPIO100_UART1_RXD MFP_CFG_LPM(GPIO100, AF6, FLOAT) | ||
| 349 | #define GPIO102_UART1_RXD MFP_CFG_LPM(GPIO102, AF6, FLOAT) | ||
| 350 | #define GPIO104_UART1_RXD MFP_CFG_LPM(GPIO104, AF4, FLOAT) | ||
| 351 | |||
| 352 | #define GPIO30_UART1_TXD MFP_CFG_LPM(GPIO30, AF4, FLOAT) | ||
| 353 | #define GPIO31_UART1_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT) | ||
| 354 | #define GPIO77_UART1_TXD MFP_CFG_LPM(GPIO77, AF3, FLOAT) | ||
| 355 | #define GPIO78_UART1_TXD MFP_CFG_LPM(GPIO78, AF1, FLOAT) | ||
| 356 | #define GPIO99_UART1_TXD MFP_CFG_LPM(GPIO99, AF6, FLOAT) | ||
| 357 | #define GPIO100_UART1_TXD MFP_CFG_LPM(GPIO100, AF1, FLOAT) | ||
| 358 | #define GPIO102_UART1_TXD MFP_CFG_LPM(GPIO102, AF4, FLOAT) | ||
| 359 | |||
| 360 | /* UART2 */ | ||
| 361 | #define GPIO15_UART2_CTS MFP_CFG_LPM(GPIO15, AF3, FLOAT) | ||
| 362 | #define GPIO16_UART2_CTS MFP_CFG_LPM(GPIO16, AF5, FLOAT) | ||
| 363 | #define GPIO111_UART2_CTS MFP_CFG_LPM(GPIO111, AF3, FLOAT) | ||
| 364 | #define GPIO114_UART2_CTS MFP_CFG_LPM(GPIO114, AF1, FLOAT) | ||
| 365 | |||
| 366 | #define GPIO15_UART2_RTS MFP_CFG_LPM(GPIO15, AF4, FLOAT) | ||
| 367 | #define GPIO16_UART2_RTS MFP_CFG_LPM(GPIO16, AF4, FLOAT) | ||
| 368 | #define GPIO114_UART2_RTS MFP_CFG_LPM(GPIO114, AF3, FLOAT) | ||
| 369 | #define GPIO111_UART2_RTS MFP_CFG_LPM(GPIO111, AF1, FLOAT) | ||
| 370 | |||
| 371 | #define GPIO18_UART2_RXD MFP_CFG_LPM(GPIO18, AF5, FLOAT) | ||
| 372 | #define GPIO19_UART2_RXD MFP_CFG_LPM(GPIO19, AF4, FLOAT) | ||
| 373 | #define GPIO112_UART2_RXD MFP_CFG_LPM(GPIO112, AF1, FLOAT) | ||
| 374 | #define GPIO113_UART2_RXD MFP_CFG_LPM(GPIO113, AF3, FLOAT) | ||
| 375 | |||
| 376 | #define GPIO18_UART2_TXD MFP_CFG_LPM(GPIO18, AF4, FLOAT) | ||
| 377 | #define GPIO19_UART2_TXD MFP_CFG_LPM(GPIO19, AF5, FLOAT) | ||
| 378 | #define GPIO112_UART2_TXD MFP_CFG_LPM(GPIO112, AF3, FLOAT) | ||
| 379 | #define GPIO113_UART2_TXD MFP_CFG_LPM(GPIO113, AF1, FLOAT) | ||
| 380 | |||
| 381 | /* UART3 */ | ||
| 382 | #define GPIO91_UART3_CTS MFP_CFG_LPM(GPIO91, AF2, FLOAT) | ||
| 383 | #define GPIO92_UART3_CTS MFP_CFG_LPM(GPIO92, AF4, FLOAT) | ||
| 384 | #define GPIO107_UART3_CTS MFP_CFG_LPM(GPIO107, AF1, FLOAT) | ||
| 385 | #define GPIO108_UART3_CTS MFP_CFG_LPM(GPIO108, AF3, FLOAT) | ||
| 386 | |||
| 387 | #define GPIO91_UART3_RTS MFP_CFG_LPM(GPIO91, AF4, FLOAT) | ||
| 388 | #define GPIO92_UART3_RTS MFP_CFG_LPM(GPIO92, AF2, FLOAT) | ||
| 389 | #define GPIO107_UART3_RTS MFP_CFG_LPM(GPIO107, AF3, FLOAT) | ||
| 390 | #define GPIO108_UART3_RTS MFP_CFG_LPM(GPIO108, AF1, FLOAT) | ||
| 391 | |||
| 392 | #define GPIO7_UART3_RXD MFP_CFG_LPM(GPIO7, AF2, FLOAT) | ||
| 393 | #define GPIO8_UART3_RXD MFP_CFG_LPM(GPIO8, AF6, FLOAT) | ||
| 394 | #define GPIO93_UART3_RXD MFP_CFG_LPM(GPIO93, AF4, FLOAT) | ||
| 395 | #define GPIO94_UART3_RXD MFP_CFG_LPM(GPIO94, AF2, FLOAT) | ||
| 396 | #define GPIO109_UART3_RXD MFP_CFG_LPM(GPIO109, AF3, FLOAT) | ||
| 397 | #define GPIO110_UART3_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT) | ||
| 398 | |||
| 399 | #define GPIO7_UART3_TXD MFP_CFG_LPM(GPIO7, AF6, FLOAT) | ||
| 400 | #define GPIO8_UART3_TXD MFP_CFG_LPM(GPIO8, AF2, FLOAT) | ||
| 401 | #define GPIO93_UART3_TXD MFP_CFG_LPM(GPIO93, AF2, FLOAT) | ||
| 402 | #define GPIO94_UART3_TXD MFP_CFG_LPM(GPIO94, AF4, FLOAT) | ||
| 403 | #define GPIO109_UART3_TXD MFP_CFG_LPM(GPIO109, AF1, FLOAT) | ||
| 404 | #define GPIO110_UART3_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT) | ||
| 405 | |||
| 406 | /* USB Host */ | ||
| 407 | #define GPIO0_2_USBH_PEN MFP_CFG(GPIO0_2, AF1) | ||
| 408 | #define GPIO1_2_USBH_PWR MFP_CFG(GPIO1_2, AF1) | ||
| 409 | |||
| 410 | /* USB P3 */ | ||
| 411 | #define GPIO77_USB_P3_1 MFP_CFG(GPIO77, AF2) | ||
| 412 | #define GPIO78_USB_P3_2 MFP_CFG(GPIO78, AF2) | ||
| 413 | #define GPIO79_USB_P3_3 MFP_CFG(GPIO79, AF2) | ||
| 414 | #define GPIO80_USB_P3_4 MFP_CFG(GPIO80, AF2) | ||
| 415 | #define GPIO81_USB_P3_5 MFP_CFG(GPIO81, AF2) | ||
| 416 | #define GPIO82_USB_P3_6 MFP_CFG(GPIO82, AF2) | ||
| 417 | |||
| 418 | /* PWM */ | ||
| 419 | #define GPIO17_PWM0_OUT MFP_CFG(GPIO17, AF1) | ||
| 420 | #define GPIO18_PWM1_OUT MFP_CFG(GPIO18, AF1) | ||
| 421 | #define GPIO19_PWM2_OUT MFP_CFG(GPIO19, AF1) | ||
| 422 | #define GPIO20_PWM3_OUT MFP_CFG(GPIO20, AF1) | ||
| 423 | |||
| 424 | /* CIR */ | ||
| 425 | #define GPIO8_CIR_OUT MFP_CFG(GPIO8, AF5) | ||
| 426 | #define GPIO16_CIR_OUT MFP_CFG(GPIO16, AF3) | ||
| 427 | |||
| 428 | #define GPIO20_OW_DQ_IN MFP_CFG(GPIO20, AF5) | ||
| 429 | #define GPIO126_OW_DQ MFP_CFG(GPIO126, AF2) | ||
| 430 | |||
| 431 | #define GPIO0_DF_RDY MFP_CFG(GPIO0, AF1) | ||
| 432 | #define GPIO7_CLK_BYPASS_XSC MFP_CFG(GPIO7, AF7) | ||
| 433 | #define GPIO17_EXT_SYNC_MVT_0 MFP_CFG(GPIO17, AF6) | ||
| 434 | #define GPIO18_EXT_SYNC_MVT_1 MFP_CFG(GPIO18, AF6) | ||
| 435 | #define GPIO19_OST_CHOUT_MVT_0 MFP_CFG(GPIO19, AF6) | ||
| 436 | #define GPIO20_OST_CHOUT_MVT_1 MFP_CFG(GPIO20, AF6) | ||
| 437 | #define GPIO49_48M_CLK MFP_CFG(GPIO49, AF2) | ||
| 438 | #define GPIO126_EXT_CLK MFP_CFG(GPIO126, AF3) | ||
| 439 | #define GPIO127_CLK_BYPASS_GB MFP_CFG(GPIO127, AF7) | ||
| 440 | #define GPIO71_EXT_MATCH_MVT MFP_CFG(GPIO71, AF6) | ||
| 441 | |||
| 442 | #define GPIO3_uIO_IN MFP_CFG(GPIO3, AF1) | ||
| 443 | |||
| 444 | #define GPIO4_uSIM_CARD_STATE MFP_CFG(GPIO4, AF1) | ||
| 445 | #define GPIO5_uSIM_uCLK MFP_CFG(GPIO5, AF1) | ||
| 446 | #define GPIO6_uSIM_uRST MFP_CFG(GPIO6, AF1) | ||
| 447 | #define GPIO16_uSIM_UVS_0 MFP_CFG(GPIO16, AF1) | ||
| 448 | |||
| 449 | #define GPIO9_SCIO MFP_CFG(GPIO9, AF1) | ||
| 450 | #define GPIO20_RTC_MVT MFP_CFG(GPIO20, AF4) | ||
| 451 | #define GPIO126_RTC_MVT MFP_CFG(GPIO126, AF1) | ||
| 452 | |||
| 453 | /* | ||
| 454 | * PXA300 specific MFP configurations | ||
| 455 | */ | ||
| 456 | #ifdef CONFIG_CPU_PXA300 | ||
| 457 | #define GPIO99_USB_P2_2 MFP_CFG(GPIO99, AF2) | ||
| 458 | #define GPIO99_USB_P2_5 MFP_CFG(GPIO99, AF3) | ||
| 459 | #define GPIO99_USB_P2_6 MFP_CFG(GPIO99, AF4) | ||
| 460 | #define GPIO100_USB_P2_2 MFP_CFG(GPIO100, AF4) | ||
| 461 | #define GPIO100_USB_P2_5 MFP_CFG(GPIO100, AF5) | ||
| 462 | #define GPIO101_USB_P2_1 MFP_CFG(GPIO101, AF2) | ||
| 463 | #define GPIO102_USB_P2_4 MFP_CFG(GPIO102, AF2) | ||
| 464 | #define GPIO104_USB_P2_3 MFP_CFG(GPIO104, AF2) | ||
| 465 | #define GPIO105_USB_P2_5 MFP_CFG(GPIO105, AF2) | ||
| 466 | #define GPIO100_USB_P2_6 MFP_CFG(GPIO100, AF2) | ||
| 467 | #define GPIO106_USB_P2_7 MFP_CFG(GPIO106, AF2) | ||
| 468 | #define GPIO103_USB_P2_8 MFP_CFG(GPIO103, AF2) | ||
| 469 | |||
| 470 | /* U2D UTMI */ | ||
| 471 | #define GPIO38_UTM_CLK MFP_CFG(GPIO38, AF1) | ||
| 472 | #define GPIO26_U2D_RXERROR MFP_CFG(GPIO26, AF3) | ||
| 473 | #define GPIO50_U2D_RXERROR MFP_CFG(GPIO50, AF1) | ||
| 474 | #define GPIO89_U2D_RXERROR MFP_CFG(GPIO89, AF5) | ||
| 475 | #define GPIO24_UTM_RXVALID MFP_CFG(GPIO24, AF3) | ||
| 476 | #define GPIO48_UTM_RXVALID MFP_CFG(GPIO48, AF2) | ||
| 477 | #define GPIO87_UTM_RXVALID MFP_CFG(GPIO87, AF5) | ||
| 478 | #define GPIO25_UTM_RXACTIVE MFP_CFG(GPIO25, AF3) | ||
| 479 | #define GPIO47_UTM_RXACTIVE MFP_CFG(GPIO47, AF2) | ||
| 480 | #define GPIO49_UTM_RXACTIVE MFP_CFG(GPIO49, AF1) | ||
| 481 | #define GPIO88_UTM_RXACTIVE MFP_CFG(GPIO88, AF5) | ||
| 482 | #define GPIO53_UTM_TXREADY MFP_CFG(GPIO53, AF1) | ||
| 483 | #define GPIO67_UTM_LINESTATE_0 MFP_CFG(GPIO67, AF3) | ||
| 484 | #define GPIO92_UTM_LINESTATE_0 MFP_CFG(GPIO92, AF3) | ||
| 485 | #define GPIO104_UTM_LINESTATE_0 MFP_CFG(GPIO104, AF3) | ||
| 486 | #define GPIO109_UTM_LINESTATE_0 MFP_CFG(GPIO109, AF4) | ||
| 487 | #define GPIO68_UTM_LINESTATE_1 MFP_CFG(GPIO68, AF3) | ||
| 488 | #define GPIO93_UTM_LINESTATE_1 MFP_CFG(GPIO93, AF3) | ||
| 489 | #define GPIO105_UTM_LINESTATE_1 MFP_CFG(GPIO105, AF3) | ||
| 490 | #define GPIO27_U2D_OPMODE_0 MFP_CFG(GPIO27, AF4) | ||
| 491 | #define GPIO51_U2D_OPMODE_0 MFP_CFG(GPIO51, AF2) | ||
| 492 | #define GPIO90_U2D_OPMODE_0 MFP_CFG(GPIO90, AF7) | ||
| 493 | #define GPIO28_U2D_OPMODE_1 MFP_CFG(GPIO28, AF4) | ||
| 494 | #define GPIO52_U2D_OPMODE_1 MFP_CFG(GPIO52, AF2) | ||
| 495 | #define GPIO106_U2D_OPMODE_1 MFP_CFG(GPIO106, AF3) | ||
| 496 | #define GPIO110_U2D_OPMODE_1 MFP_CFG(GPIO110, AF5) | ||
| 497 | #define GPIO76_U2D_RESET MFP_CFG(GPIO76, AF1) | ||
| 498 | #define GPIO95_U2D_RESET MFP_CFG(GPIO95, AF2) | ||
| 499 | #define GPIO100_U2D_RESET MFP_CFG(GPIO100, AF3) | ||
| 500 | #define GPIO66_U2D_SUSPEND MFP_CFG(GPIO66, AF3) | ||
| 501 | #define GPIO98_U2D_SUSPEND MFP_CFG(GPIO98, AF2) | ||
| 502 | #define GPIO103_U2D_SUSPEND MFP_CFG(GPIO103, AF3) | ||
| 503 | #define GPIO65_U2D_TERM_SEL MFP_CFG(GPIO65, AF5) | ||
| 504 | #define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF3) | ||
| 505 | #define GPIO102_U2D_TERM_SEL MFP_CFG(GPIO102, AF5) | ||
| 506 | #define GPIO29_U2D_TXVALID MFP_CFG(GPIO29, AF3) | ||
| 507 | #define GPIO52_U2D_TXVALID MFP_CFG(GPIO52, AF4) | ||
| 508 | #define GPIO69_U2D_TXVALID MFP_CFG(GPIO69, AF3) | ||
| 509 | #define GPIO85_U2D_TXVALID MFP_CFG(GPIO85, AF7) | ||
| 510 | #define GPIO64_U2D_XCVR_SEL MFP_CFG(GPIO64, AF5) | ||
| 511 | #define GPIO96_U2D_XCVR_SEL MFP_CFG(GPIO96, AF3) | ||
| 512 | #define GPIO101_U2D_XCVR_SEL MFP_CFG(GPIO101, AF5) | ||
| 513 | #define GPIO30_UTM_PHYDATA_0 MFP_CFG(GPIO30, AF3) | ||
| 514 | #define GPIO31_UTM_PHYDATA_1 MFP_CFG(GPIO31, AF3) | ||
| 515 | #define GPIO32_UTM_PHYDATA_2 MFP_CFG(GPIO32, AF3) | ||
| 516 | #define GPIO33_UTM_PHYDATA_3 MFP_CFG(GPIO33, AF3) | ||
| 517 | #define GPIO34_UTM_PHYDATA_4 MFP_CFG(GPIO34, AF3) | ||
| 518 | #define GPIO35_UTM_PHYDATA_5 MFP_CFG(GPIO35, AF3) | ||
| 519 | #define GPIO36_UTM_PHYDATA_6 MFP_CFG(GPIO36, AF3) | ||
| 520 | #define GPIO37_UTM_PHYDATA_7 MFP_CFG(GPIO37, AF3) | ||
| 521 | #define GPIO39_UTM_PHYDATA_0 MFP_CFG(GPIO39, AF3) | ||
| 522 | #define GPIO40_UTM_PHYDATA_1 MFP_CFG(GPIO40, AF3) | ||
| 523 | #define GPIO41_UTM_PHYDATA_2 MFP_CFG(GPIO41, AF3) | ||
| 524 | #define GPIO42_UTM_PHYDATA_3 MFP_CFG(GPIO42, AF3) | ||
| 525 | #define GPIO43_UTM_PHYDATA_4 MFP_CFG(GPIO43, AF3) | ||
| 526 | #define GPIO44_UTM_PHYDATA_5 MFP_CFG(GPIO44, AF3) | ||
| 527 | #define GPIO45_UTM_PHYDATA_6 MFP_CFG(GPIO45, AF3) | ||
| 528 | #define GPIO46_UTM_PHYDATA_7 MFP_CFG(GPIO46, AF3) | ||
| 529 | #endif /* CONFIG_CPU_PXA300 */ | ||
| 530 | |||
| 531 | /* | ||
| 532 | * PXA310 specific MFP configurations | ||
| 533 | */ | ||
| 534 | #ifdef CONFIG_CPU_PXA310 | ||
| 535 | /* USB P2 */ | ||
| 536 | #define GPIO36_USB_P2_1 MFP_CFG(GPIO36, AF1) | ||
| 537 | #define GPIO30_USB_P2_2 MFP_CFG(GPIO30, AF1) | ||
| 538 | #define GPIO35_USB_P2_3 MFP_CFG(GPIO35, AF1) | ||
| 539 | #define GPIO32_USB_P2_4 MFP_CFG(GPIO32, AF1) | ||
| 540 | #define GPIO34_USB_P2_5 MFP_CFG(GPIO34, AF1) | ||
| 541 | #define GPIO31_USB_P2_6 MFP_CFG(GPIO31, AF1) | ||
| 542 | |||
| 543 | /* MMC1 */ | ||
| 544 | #define GPIO24_MMC1_CMD MFP_CFG(GPIO24, AF3) | ||
| 545 | #define GPIO29_MMC1_DAT0 MFP_CFG(GPIO29, AF3) | ||
| 546 | |||
| 547 | /* MMC3 */ | ||
| 548 | #define GPIO103_MMC3_CLK MFP_CFG(GPIO103, AF2) | ||
| 549 | #define GPIO105_MMC3_CMD MFP_CFG(GPIO105, AF2) | ||
| 550 | #define GPIO11_2_MMC3_CLK MFP_CFG(GPIO11_2, AF1) | ||
| 551 | #define GPIO12_2_MMC3_CMD MFP_CFG(GPIO12_2, AF1) | ||
| 552 | #define GPIO7_2_MMC3_DAT0 MFP_CFG(GPIO7_2, AF1) | ||
| 553 | #define GPIO8_2_MMC3_DAT1 MFP_CFG(GPIO8_2, AF1) | ||
| 554 | #define GPIO9_2_MMC3_DAT2 MFP_CFG(GPIO9_2, AF1) | ||
| 555 | #define GPIO10_2_MMC3_DAT3 MFP_CFG(GPIO10_2, AF1) | ||
| 556 | |||
| 557 | /* ULPI */ | ||
| 558 | #define GPIO38_ULPI_CLK MFP_CFG(GPIO38, AF1) | ||
| 559 | #define GPIO30_ULPI_DATA_OUT_0 MFP_CFG(GPIO30, AF3) | ||
| 560 | #define GPIO31_ULPI_DATA_OUT_1 MFP_CFG(GPIO31, AF3) | ||
| 561 | #define GPIO32_ULPI_DATA_OUT_2 MFP_CFG(GPIO32, AF3) | ||
| 562 | #define GPIO33_ULPI_DATA_OUT_3 MFP_CFG(GPIO33, AF3) | ||
| 563 | #define GPIO34_ULPI_DATA_OUT_4 MFP_CFG(GPIO34, AF3) | ||
| 564 | #define GPIO35_ULPI_DATA_OUT_5 MFP_CFG(GPIO35, AF3) | ||
| 565 | #define GPIO36_ULPI_DATA_OUT_6 MFP_CFG(GPIO36, AF3) | ||
| 566 | #define GPIO37_ULPI_DATA_OUT_7 MFP_CFG(GPIO37, AF3) | ||
| 567 | #define GPIO33_ULPI_OTG_INTR MFP_CFG(GPIO33, AF1) | ||
| 568 | |||
| 569 | #define ULPI_DIR MFP_CFG_DRV(ULPI_DIR, MFP_AF0, MFP_DS01X) | ||
| 570 | #define ULPI_NXT MFP_CFG_DRV(ULPI_NXT, MFP_AF0, MFP_DS01X) | ||
| 571 | #define ULPI_STP MFP_CFG_DRV(ULPI_STP, MFP_AF0, MFP_DS01X) | ||
| 572 | #endif /* CONFIG_CPU_PXA310 */ | ||
| 573 | |||
| 574 | #endif /* __ASM_ARCH_MFP_PXA300_H */ | ||
diff --git a/include/asm-arm/arch-pxa/mfp-pxa320.h b/include/asm-arm/arch-pxa/mfp-pxa320.h new file mode 100644 index 000000000000..ae8ba34194cf --- /dev/null +++ b/include/asm-arm/arch-pxa/mfp-pxa320.h | |||
| @@ -0,0 +1,446 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-pxa/mfp-pxa320.h | ||
| 3 | * | ||
| 4 | * PXA320 specific MFP configuration definitions | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell International Ltd. | ||
| 7 | * 2007-08-21: eric miao <eric.y.miao@gmail.com> | ||
| 8 | * initial version | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_MFP_PXA320_H | ||
| 16 | #define __ASM_ARCH_MFP_PXA320_H | ||
| 17 | |||
| 18 | #include <asm/arch/mfp.h> | ||
| 19 | |||
| 20 | /* GPIO */ | ||
| 21 | #define GPIO46_GPIO MFP_CFG(GPIO6, AF0) | ||
| 22 | #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) | ||
| 23 | #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) | ||
| 24 | #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) | ||
| 25 | #define GPIO52_GPIO MFP_CFG(GPIO52, AF0) | ||
| 26 | |||
| 27 | #define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0) | ||
| 28 | #define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0) | ||
| 29 | #define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0) | ||
| 30 | #define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0) | ||
| 31 | #define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0) | ||
| 32 | #define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0) | ||
| 33 | #define GPIO13_2_GPIO MFP_CFG(GPIO13_2, AF0) | ||
| 34 | #define GPIO14_2_GPIO MFP_CFG(GPIO14_2, AF0) | ||
| 35 | #define GPIO15_2_GPIO MFP_CFG(GPIO15_2, AF0) | ||
| 36 | #define GPIO16_2_GPIO MFP_CFG(GPIO16_2, AF0) | ||
| 37 | #define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0) | ||
| 38 | |||
| 39 | /* Chip Select */ | ||
| 40 | #define GPIO4_nCS3 MFP_CFG(GPIO4, AF1) | ||
| 41 | |||
| 42 | /* AC97 */ | ||
| 43 | #define GPIO34_AC97_SYSCLK MFP_CFG(GPIO34, AF1) | ||
| 44 | #define GPIO39_AC97_BITCLK MFP_CFG(GPIO39, AF1) | ||
| 45 | #define GPIO40_AC97_nACRESET MFP_CFG(GPIO40, AF1) | ||
| 46 | #define GPIO35_AC97_SDATA_IN_0 MFP_CFG(GPIO35, AF1) | ||
| 47 | #define GPIO36_AC97_SDATA_IN_1 MFP_CFG(GPIO36, AF1) | ||
| 48 | #define GPIO32_AC97_SDATA_IN_2 MFP_CFG(GPIO32, AF2) | ||
| 49 | #define GPIO33_AC97_SDATA_IN_3 MFP_CFG(GPIO33, AF2) | ||
| 50 | #define GPIO11_AC97_SDATA_IN_2 MFP_CFG(GPIO11, AF3) | ||
| 51 | #define GPIO12_AC97_SDATA_IN_3 MFP_CFG(GPIO12, AF3) | ||
| 52 | #define GPIO37_AC97_SDATA_OUT MFP_CFG(GPIO37, AF1) | ||
| 53 | #define GPIO38_AC97_SYNC MFP_CFG(GPIO38, AF1) | ||
| 54 | |||
| 55 | /* I2C */ | ||
| 56 | #define GPIO32_I2C_SCL MFP_CFG_LPM(GPIO32, AF1, PULL_HIGH) | ||
| 57 | #define GPIO33_I2C_SDA MFP_CFG_LPM(GPIO33, AF1, PULL_HIGH) | ||
| 58 | |||
| 59 | /* QCI */ | ||
| 60 | #define GPIO49_CI_DD_0 MFP_CFG_DRV(GPIO49, AF1, DS04X) | ||
| 61 | #define GPIO50_CI_DD_1 MFP_CFG_DRV(GPIO50, AF1, DS04X) | ||
| 62 | #define GPIO51_CI_DD_2 MFP_CFG_DRV(GPIO51, AF1, DS04X) | ||
| 63 | #define GPIO52_CI_DD_3 MFP_CFG_DRV(GPIO52, AF1, DS04X) | ||
| 64 | #define GPIO53_CI_DD_4 MFP_CFG_DRV(GPIO53, AF1, DS04X) | ||
| 65 | #define GPIO54_CI_DD_5 MFP_CFG_DRV(GPIO54, AF1, DS04X) | ||
| 66 | #define GPIO55_CI_DD_6 MFP_CFG_DRV(GPIO55, AF1, DS04X) | ||
| 67 | #define GPIO56_CI_DD_7 MFP_CFG_DRV(GPIO56, AF0, DS04X) | ||
| 68 | #define GPIO57_CI_DD_8 MFP_CFG_DRV(GPIO57, AF1, DS04X) | ||
| 69 | #define GPIO58_CI_DD_9 MFP_CFG_DRV(GPIO58, AF1, DS04X) | ||
| 70 | #define GPIO59_CI_MCLK MFP_CFG_DRV(GPIO59, AF0, DS04X) | ||
| 71 | #define GPIO60_CI_PCLK MFP_CFG_DRV(GPIO60, AF0, DS04X) | ||
| 72 | #define GPIO61_CI_HSYNC MFP_CFG_DRV(GPIO61, AF0, DS04X) | ||
| 73 | #define GPIO62_CI_VSYNC MFP_CFG_DRV(GPIO62, AF0, DS04X) | ||
| 74 | |||
| 75 | #define GPIO31_CIR_OUT MFP_CFG(GPIO31, AF5) | ||
| 76 | |||
| 77 | #define GPIO0_2_CLK_EXT MFP_CFG(GPIO0_2, AF3) | ||
| 78 | #define GPIO0_DRQ MFP_CFG(GPIO0, AF2) | ||
| 79 | #define GPIO11_EXT_SYNC0 MFP_CFG(GPIO11, AF5) | ||
| 80 | #define GPIO12_EXT_SYNC1 MFP_CFG(GPIO12, AF6) | ||
| 81 | #define GPIO0_2_HZ_CLK MFP_CFG(GPIO0_2, AF1) | ||
| 82 | #define GPIO14_HZ_CLK MFP_CFG(GPIO14, AF4) | ||
| 83 | #define GPIO30_ICP_RXD MFP_CFG(GPIO30, AF1) | ||
| 84 | #define GPIO31_ICP_TXD MFP_CFG(GPIO31, AF1) | ||
| 85 | |||
| 86 | #define GPIO83_KP_DKIN_0 MFP_CFG_LPM(GPIO83, AF3, FLOAT) | ||
| 87 | #define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF3, FLOAT) | ||
| 88 | #define GPIO85_KP_DKIN_2 MFP_CFG_LPM(GPIO85, AF3, FLOAT) | ||
| 89 | #define GPIO86_KP_DKIN_3 MFP_CFG_LPM(GPIO86, AF3, FLOAT) | ||
| 90 | |||
| 91 | #define GPIO105_KP_DKIN_0 MFP_CFG_LPM(GPIO105, AF2, FLOAT) | ||
| 92 | #define GPIO106_KP_DKIN_1 MFP_CFG_LPM(GPIO106, AF2, FLOAT) | ||
| 93 | #define GPIO107_KP_DKIN_2 MFP_CFG_LPM(GPIO107, AF2, FLOAT) | ||
| 94 | #define GPIO108_KP_DKIN_3 MFP_CFG_LPM(GPIO108, AF2, FLOAT) | ||
| 95 | #define GPIO109_KP_DKIN_4 MFP_CFG_LPM(GPIO109, AF2, FLOAT) | ||
| 96 | #define GPIO110_KP_DKIN_5 MFP_CFG_LPM(GPIO110, AF2, FLOAT) | ||
| 97 | #define GPIO111_KP_DKIN_6 MFP_CFG_LPM(GPIO111, AF2, FLOAT) | ||
| 98 | #define GPIO112_KP_DKIN_7 MFP_CFG_LPM(GPIO112, AF2, FLOAT) | ||
| 99 | |||
| 100 | #define GPIO113_KP_DKIN_0 MFP_CFG_LPM(GPIO113, AF2, FLOAT) | ||
| 101 | #define GPIO114_KP_DKIN_1 MFP_CFG_LPM(GPIO114, AF2, FLOAT) | ||
| 102 | #define GPIO115_KP_DKIN_2 MFP_CFG_LPM(GPIO115, AF2, FLOAT) | ||
| 103 | #define GPIO116_KP_DKIN_3 MFP_CFG_LPM(GPIO116, AF2, FLOAT) | ||
| 104 | #define GPIO117_KP_DKIN_4 MFP_CFG_LPM(GPIO117, AF2, FLOAT) | ||
| 105 | #define GPIO118_KP_DKIN_5 MFP_CFG_LPM(GPIO118, AF2, FLOAT) | ||
| 106 | #define GPIO119_KP_DKIN_6 MFP_CFG_LPM(GPIO119, AF2, FLOAT) | ||
| 107 | #define GPIO120_KP_DKIN_7 MFP_CFG_LPM(GPIO120, AF2, FLOAT) | ||
| 108 | |||
| 109 | #define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF2, FLOAT) | ||
| 110 | #define GPIO126_KP_DKIN_1 MFP_CFG_LPM(GPIO126, AF2, FLOAT) | ||
| 111 | |||
| 112 | #define GPIO2_2_KP_DKIN_0 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT) | ||
| 113 | #define GPIO3_2_KP_DKIN_1 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT) | ||
| 114 | #define GPIO125_KP_DKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT) | ||
| 115 | #define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT) | ||
| 116 | #define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT) | ||
| 117 | #define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT) | ||
| 118 | #define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT) | ||
| 119 | #define GPIO4_2_KP_DKIN_7 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT) | ||
| 120 | |||
| 121 | #define GPIO113_KP_MKIN_0 MFP_CFG_LPM(GPIO113, AF1, FLOAT) | ||
| 122 | #define GPIO114_KP_MKIN_1 MFP_CFG_LPM(GPIO114, AF1, FLOAT) | ||
| 123 | #define GPIO115_KP_MKIN_2 MFP_CFG_LPM(GPIO115, AF1, FLOAT) | ||
| 124 | #define GPIO116_KP_MKIN_3 MFP_CFG_LPM(GPIO116, AF1, FLOAT) | ||
| 125 | #define GPIO117_KP_MKIN_4 MFP_CFG_LPM(GPIO117, AF1, FLOAT) | ||
| 126 | #define GPIO118_KP_MKIN_5 MFP_CFG_LPM(GPIO118, AF1, FLOAT) | ||
| 127 | #define GPIO119_KP_MKIN_6 MFP_CFG_LPM(GPIO119, AF1, FLOAT) | ||
| 128 | #define GPIO120_KP_MKIN_7 MFP_CFG_LPM(GPIO120, AF1, FLOAT) | ||
| 129 | |||
| 130 | #define GPIO83_KP_MKOUT_0 MFP_CFG_LPM(GPIO83, AF2, DRIVE_HIGH) | ||
| 131 | #define GPIO84_KP_MKOUT_1 MFP_CFG_LPM(GPIO84, AF2, DRIVE_HIGH) | ||
| 132 | #define GPIO85_KP_MKOUT_2 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH) | ||
| 133 | #define GPIO86_KP_MKOUT_3 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH) | ||
| 134 | #define GPIO13_KP_MKOUT_4 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH) | ||
| 135 | #define GPIO14_KP_MKOUT_5 MFP_CFG_LPM(GPIO14, AF3, DRIVE_HIGH) | ||
| 136 | |||
| 137 | #define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH) | ||
| 138 | #define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH) | ||
| 139 | #define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH) | ||
| 140 | #define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH) | ||
| 141 | #define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH) | ||
| 142 | #define GPIO126_KP_MKOUT_5 MFP_CFG_LPM(GPIO126, AF1, DRIVE_HIGH) | ||
| 143 | #define GPIO127_KP_MKOUT_6 MFP_CFG_LPM(GPIO127, AF1, DRIVE_HIGH) | ||
| 144 | #define GPIO5_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH) | ||
| 145 | |||
| 146 | /* LCD */ | ||
| 147 | #define GPIO6_2_LCD_LDD_0 MFP_CFG_DRV(GPIO6_2, AF1, DS01X) | ||
| 148 | #define GPIO7_2_LCD_LDD_1 MFP_CFG_DRV(GPIO7_2, AF1, DS01X) | ||
| 149 | #define GPIO8_2_LCD_LDD_2 MFP_CFG_DRV(GPIO8_2, AF1, DS01X) | ||
| 150 | #define GPIO9_2_LCD_LDD_3 MFP_CFG_DRV(GPIO9_2, AF1, DS01X) | ||
| 151 | #define GPIO10_2_LCD_LDD_4 MFP_CFG_DRV(GPIO10_2, AF1, DS01X) | ||
| 152 | #define GPIO11_2_LCD_LDD_5 MFP_CFG_DRV(GPIO11_2, AF1, DS01X) | ||
| 153 | #define GPIO12_2_LCD_LDD_6 MFP_CFG_DRV(GPIO12_2, AF1, DS01X) | ||
| 154 | #define GPIO13_2_LCD_LDD_7 MFP_CFG_DRV(GPIO13_2, AF1, DS01X) | ||
| 155 | #define GPIO63_LCD_LDD_8 MFP_CFG_DRV(GPIO63, AF1, DS01X) | ||
| 156 | #define GPIO64_LCD_LDD_9 MFP_CFG_DRV(GPIO64, AF1, DS01X) | ||
| 157 | #define GPIO65_LCD_LDD_10 MFP_CFG_DRV(GPIO65, AF1, DS01X) | ||
| 158 | #define GPIO66_LCD_LDD_11 MFP_CFG_DRV(GPIO66, AF1, DS01X) | ||
| 159 | #define GPIO67_LCD_LDD_12 MFP_CFG_DRV(GPIO67, AF1, DS01X) | ||
| 160 | #define GPIO68_LCD_LDD_13 MFP_CFG_DRV(GPIO68, AF1, DS01X) | ||
| 161 | #define GPIO69_LCD_LDD_14 MFP_CFG_DRV(GPIO69, AF1, DS01X) | ||
| 162 | #define GPIO70_LCD_LDD_15 MFP_CFG_DRV(GPIO70, AF1, DS01X) | ||
| 163 | #define GPIO71_LCD_LDD_16 MFP_CFG_DRV(GPIO71, AF1, DS01X) | ||
| 164 | #define GPIO72_LCD_LDD_17 MFP_CFG_DRV(GPIO72, AF1, DS01X) | ||
| 165 | #define GPIO73_LCD_CS_N MFP_CFG_DRV(GPIO73, AF2, DS01X) | ||
| 166 | #define GPIO74_LCD_VSYNC MFP_CFG_DRV(GPIO74, AF2, DS01X) | ||
| 167 | #define GPIO14_2_LCD_FCLK MFP_CFG_DRV(GPIO14_2, AF1, DS01X) | ||
| 168 | #define GPIO15_2_LCD_LCLK MFP_CFG_DRV(GPIO15_2, AF1, DS01X) | ||
| 169 | #define GPIO16_2_LCD_PCLK MFP_CFG_DRV(GPIO16_2, AF1, DS01X) | ||
| 170 | #define GPIO17_2_LCD_BIAS MFP_CFG_DRV(GPIO17_2, AF1, DS01X) | ||
| 171 | #define GPIO64_LCD_VSYNC MFP_CFG_DRV(GPIO64, AF2, DS01X) | ||
| 172 | #define GPIO63_LCD_CS_N MFP_CFG_DRV(GPIO63, AF2, DS01X) | ||
| 173 | |||
| 174 | #define GPIO6_2_MLCD_DD_0 MFP_CFG_DRV(GPIO6_2, AF7, DS08X) | ||
| 175 | #define GPIO7_2_MLCD_DD_1 MFP_CFG_DRV(GPIO7_2, AF7, DS08X) | ||
| 176 | #define GPIO8_2_MLCD_DD_2 MFP_CFG_DRV(GPIO8_2, AF7, DS08X) | ||
| 177 | #define GPIO9_2_MLCD_DD_3 MFP_CFG_DRV(GPIO9_2, AF7, DS08X) | ||
| 178 | #define GPIO10_2_MLCD_DD_4 MFP_CFG_DRV(GPIO10_2, AF7, DS08X) | ||
| 179 | #define GPIO11_2_MLCD_DD_5 MFP_CFG_DRV(GPIO11_2, AF7, DS08X) | ||
| 180 | #define GPIO12_2_MLCD_DD_6 MFP_CFG_DRV(GPIO12_2, AF7, DS08X) | ||
| 181 | #define GPIO13_2_MLCD_DD_7 MFP_CFG_DRV(GPIO13_2, AF7, DS08X) | ||
| 182 | #define GPIO63_MLCD_DD_8 MFP_CFG_DRV(GPIO63, AF7, DS08X) | ||
| 183 | #define GPIO64_MLCD_DD_9 MFP_CFG_DRV(GPIO64, AF7, DS08X) | ||
| 184 | #define GPIO65_MLCD_DD_10 MFP_CFG_DRV(GPIO65, AF7, DS08X) | ||
| 185 | #define GPIO66_MLCD_DD_11 MFP_CFG_DRV(GPIO66, AF7, DS08X) | ||
| 186 | #define GPIO67_MLCD_DD_12 MFP_CFG_DRV(GPIO67, AF7, DS08X) | ||
| 187 | #define GPIO68_MLCD_DD_13 MFP_CFG_DRV(GPIO68, AF7, DS08X) | ||
| 188 | #define GPIO69_MLCD_DD_14 MFP_CFG_DRV(GPIO69, AF7, DS08X) | ||
| 189 | #define GPIO70_MLCD_DD_15 MFP_CFG_DRV(GPIO70, AF7, DS08X) | ||
| 190 | #define GPIO71_MLCD_DD_16 MFP_CFG_DRV(GPIO71, AF7, DS08X) | ||
| 191 | #define GPIO72_MLCD_DD_17 MFP_CFG_DRV(GPIO72, AF7, DS08X) | ||
| 192 | #define GPIO73_MLCD_CS MFP_CFG_DRV(GPIO73, AF7, DS08X) | ||
| 193 | #define GPIO74_MLCD_VSYNC MFP_CFG_DRV(GPIO74, AF7, DS08X) | ||
| 194 | #define GPIO14_2_MLCD_FCLK MFP_CFG_DRV(GPIO14_2, AF7, DS08X) | ||
| 195 | #define GPIO15_2_MLCD_LCLK MFP_CFG_DRV(GPIO15_2, AF7, DS08X) | ||
| 196 | #define GPIO16_2_MLCD_PCLK MFP_CFG_DRV(GPIO16_2, AF7, DS08X) | ||
| 197 | #define GPIO17_2_MLCD_BIAS MFP_CFG_DRV(GPIO17_2, AF7, DS08X) | ||
| 198 | |||
| 199 | /* MMC1 */ | ||
| 200 | #define GPIO9_MMC1_CMD MFP_CFG_LPM(GPIO9, AF4, DRIVE_HIGH) | ||
| 201 | #define GPIO22_MMC1_CLK MFP_CFG_LPM(GPIO22, AF4, DRIVE_HIGH) | ||
| 202 | #define GPIO23_MMC1_CMD MFP_CFG_LPM(GPIO23, AF4, DRIVE_HIGH) | ||
| 203 | #define GPIO30_MMC1_CLK MFP_CFG_LPM(GPIO30, AF4, DRIVE_HIGH) | ||
| 204 | #define GPIO31_MMC1_CMD MFP_CFG_LPM(GPIO31, AF4, DRIVE_HIGH) | ||
| 205 | #define GPIO5_MMC1_DAT0 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH) | ||
| 206 | #define GPIO6_MMC1_DAT1 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH) | ||
| 207 | #define GPIO7_MMC1_DAT2 MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH) | ||
| 208 | #define GPIO8_MMC1_DAT3 MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH) | ||
| 209 | #define GPIO18_MMC1_DAT0 MFP_CFG_LPM(GPIO18, AF4, DRIVE_HIGH) | ||
| 210 | #define GPIO19_MMC1_DAT1 MFP_CFG_LPM(GPIO19, AF4, DRIVE_HIGH) | ||
| 211 | #define GPIO20_MMC1_DAT2 MFP_CFG_LPM(GPIO20, AF4, DRIVE_HIGH) | ||
| 212 | #define GPIO21_MMC1_DAT3 MFP_CFG_LPM(GPIO21, AF4, DRIVE_HIGH) | ||
| 213 | |||
| 214 | #define GPIO28_MMC2_CLK MFP_CFG_LPM(GPIO28, AF4, PULL_HIGH) | ||
| 215 | #define GPIO29_MMC2_CMD MFP_CFG_LPM(GPIO29, AF4, PULL_HIGH) | ||
| 216 | #define GPIO30_MMC2_CLK MFP_CFG_LPM(GPIO30, AF3, PULL_HIGH) | ||
| 217 | #define GPIO31_MMC2_CMD MFP_CFG_LPM(GPIO31, AF3, PULL_HIGH) | ||
| 218 | #define GPIO79_MMC2_CLK MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH) | ||
| 219 | #define GPIO80_MMC2_CMD MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH) | ||
| 220 | |||
| 221 | #define GPIO5_MMC2_DAT0 MFP_CFG_LPM(GPIO5, AF2, PULL_HIGH) | ||
| 222 | #define GPIO6_MMC2_DAT1 MFP_CFG_LPM(GPIO6, AF2, PULL_HIGH) | ||
| 223 | #define GPIO7_MMC2_DAT2 MFP_CFG_LPM(GPIO7, AF2, PULL_HIGH) | ||
| 224 | #define GPIO8_MMC2_DAT3 MFP_CFG_LPM(GPIO8, AF2, PULL_HIGH) | ||
| 225 | #define GPIO24_MMC2_DAT0 MFP_CFG_LPM(GPIO24, AF4, PULL_HIGH) | ||
| 226 | #define GPIO75_MMC2_DAT0 MFP_CFG_LPM(GPIO75, AF4, PULL_HIGH) | ||
| 227 | #define GPIO25_MMC2_DAT1 MFP_CFG_LPM(GPIO25, AF4, PULL_HIGH) | ||
| 228 | #define GPIO76_MMC2_DAT1 MFP_CFG_LPM(GPIO76, AF4, PULL_HIGH) | ||
| 229 | #define GPIO26_MMC2_DAT2 MFP_CFG_LPM(GPIO26, AF4, PULL_HIGH) | ||
| 230 | #define GPIO77_MMC2_DAT2 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH) | ||
| 231 | #define GPIO27_MMC2_DAT3 MFP_CFG_LPM(GPIO27, AF4, PULL_HIGH) | ||
| 232 | #define GPIO78_MMC2_DAT3 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH) | ||
| 233 | |||
| 234 | /* 1-Wire */ | ||
| 235 | #define GPIO14_ONE_WIRE MFP_CFG_LPM(GPIO14, AF5, FLOAT) | ||
| 236 | #define GPIO0_2_ONE_WIRE MFP_CFG_LPM(GPIO0_2, AF2, FLOAT) | ||
| 237 | |||
| 238 | /* SSP1 */ | ||
| 239 | #define GPIO87_SSP1_EXTCLK MFP_CFG(GPIO87, AF1) | ||
| 240 | #define GPIO88_SSP1_SYSCLK MFP_CFG(GPIO88, AF1) | ||
| 241 | #define GPIO83_SSP1_SCLK MFP_CFG(GPIO83, AF1) | ||
| 242 | #define GPIO84_SSP1_SFRM MFP_CFG(GPIO84, AF1) | ||
| 243 | #define GPIO85_SSP1_RXD MFP_CFG(GPIO85, AF6) | ||
| 244 | #define GPIO85_SSP1_TXD MFP_CFG(GPIO85, AF1) | ||
| 245 | #define GPIO86_SSP1_RXD MFP_CFG(GPIO86, AF1) | ||
| 246 | #define GPIO86_SSP1_TXD MFP_CFG(GPIO86, AF6) | ||
| 247 | |||
| 248 | /* SSP2 */ | ||
| 249 | #define GPIO39_SSP2_EXTCLK MFP_CFG(GPIO39, AF2) | ||
| 250 | #define GPIO40_SSP2_SYSCLK MFP_CFG(GPIO40, AF2) | ||
| 251 | #define GPIO12_SSP2_SCLK MFP_CFG(GPIO12, AF2) | ||
| 252 | #define GPIO35_SSP2_SCLK MFP_CFG(GPIO35, AF2) | ||
| 253 | #define GPIO36_SSP2_SFRM MFP_CFG(GPIO36, AF2) | ||
| 254 | #define GPIO37_SSP2_RXD MFP_CFG(GPIO37, AF5) | ||
| 255 | #define GPIO37_SSP2_TXD MFP_CFG(GPIO37, AF2) | ||
| 256 | #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) | ||
| 257 | #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) | ||
| 258 | |||
| 259 | #define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) | ||
| 260 | #define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) | ||
| 261 | #define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) | ||
| 262 | #define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) | ||
| 263 | #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) | ||
| 264 | #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) | ||
| 265 | #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) | ||
| 266 | #define GPIO72_SSP3_TXD MFP_CFG_X(GPIO72, AF5, DS08X, DRIVE_LOW) | ||
| 267 | #define GPIO91_SSP3_RXD MFP_CFG_X(GPIO91, AF5, DS08X, FLOAT) | ||
| 268 | #define GPIO91_SSP3_TXD MFP_CFG_X(GPIO91, AF1, DS08X, DRIVE_LOW) | ||
| 269 | #define GPIO92_SSP3_RXD MFP_CFG_X(GPIO92, AF1, DS08X, FLOAT) | ||
| 270 | #define GPIO92_SSP3_TXD MFP_CFG_X(GPIO92, AF5, DS08X, DRIVE_LOW) | ||
| 271 | |||
| 272 | #define GPIO93_SSP4_SCLK MFP_CFG_LPM(GPIO93, AF1, PULL_HIGH) | ||
| 273 | #define GPIO94_SSP4_FRM MFP_CFG_LPM(GPIO94, AF1, PULL_HIGH) | ||
| 274 | #define GPIO94_SSP4_RXD MFP_CFG_LPM(GPIO94, AF5, PULL_HIGH) | ||
| 275 | #define GPIO95_SSP4_RXD MFP_CFG_LPM(GPIO95, AF5, PULL_HIGH) | ||
| 276 | #define GPIO95_SSP4_TXD MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) | ||
| 277 | #define GPIO96_SSP4_RXD MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) | ||
| 278 | #define GPIO96_SSP4_TXD MFP_CFG_LPM(GPIO96, AF5, PULL_HIGH) | ||
| 279 | |||
| 280 | /* UART1 */ | ||
| 281 | #define GPIO41_UART1_RXD MFP_CFG_LPM(GPIO41, AF2, FLOAT) | ||
| 282 | #define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) | ||
| 283 | #define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) | ||
| 284 | #define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) | ||
| 285 | #define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) | ||
| 286 | #define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) | ||
| 287 | #define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) | ||
| 288 | #define GPIO98_UART1_TXD MFP_CFG_LPM(GPIO98, AF1, FLOAT) | ||
| 289 | #define GPIO43_UART1_CTS MFP_CFG_LPM(GPIO43, AF2, FLOAT) | ||
| 290 | #define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) | ||
| 291 | #define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) | ||
| 292 | #define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) | ||
| 293 | #define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) | ||
| 294 | #define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) | ||
| 295 | #define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) | ||
| 296 | #define GPIO104_UART1_RTS MFP_CFG_LPM(GPIO104, AF1, FLOAT) | ||
| 297 | #define GPIO45_UART1_DTR MFP_CFG_LPM(GPIO45, AF4, FLOAT) | ||
| 298 | #define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) | ||
| 299 | #define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) | ||
| 300 | #define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) | ||
| 301 | #define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) | ||
| 302 | #define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) | ||
| 303 | #define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) | ||
| 304 | #define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) | ||
| 305 | #define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) | ||
| 306 | #define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) | ||
| 307 | #define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) | ||
| 308 | #define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) | ||
| 309 | |||
| 310 | /* UART2 */ | ||
| 311 | #define GPIO109_UART2_CTS MFP_CFG_LPM(GPIO109, AF3, FLOAT) | ||
| 312 | #define GPIO109_UART2_RTS MFP_CFG_LPM(GPIO109, AF1, FLOAT) | ||
| 313 | #define GPIO112_UART2_CTS MFP_CFG_LPM(GPIO112, AF1, FLOAT) | ||
| 314 | #define GPIO112_UART2_RTS MFP_CFG_LPM(GPIO112, AF3, FLOAT) | ||
| 315 | #define GPIO110_UART2_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT) | ||
| 316 | #define GPIO110_UART2_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT) | ||
| 317 | #define GPIO111_UART2_RXD MFP_CFG_LPM(GPIO111, AF3, FLOAT) | ||
| 318 | #define GPIO111_UART2_TXD MFP_CFG_LPM(GPIO111, AF1, FLOAT) | ||
| 319 | |||
| 320 | /* UART3 */ | ||
| 321 | #define GPIO89_UART3_CTS MFP_CFG_LPM(GPIO89, AF2, FLOAT) | ||
| 322 | #define GPIO89_UART3_RTS MFP_CFG_LPM(GPIO89, AF4, FLOAT) | ||
| 323 | #define GPIO90_UART3_CTS MFP_CFG_LPM(GPIO90, AF4, FLOAT) | ||
| 324 | #define GPIO90_UART3_RTS MFP_CFG_LPM(GPIO90, AF2, FLOAT) | ||
| 325 | #define GPIO105_UART3_CTS MFP_CFG_LPM(GPIO105, AF1, FLOAT) | ||
| 326 | #define GPIO105_UART3_RTS MFP_CFG_LPM(GPIO105, AF3, FLOAT) | ||
| 327 | #define GPIO106_UART3_CTS MFP_CFG_LPM(GPIO106, AF3, FLOAT) | ||
| 328 | #define GPIO106_UART3_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT) | ||
| 329 | #define GPIO30_UART3_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT) | ||
| 330 | #define GPIO30_UART3_TXD MFP_CFG_LPM(GPIO30, AF6, FLOAT) | ||
| 331 | #define GPIO31_UART3_RXD MFP_CFG_LPM(GPIO31, AF6, FLOAT) | ||
| 332 | #define GPIO31_UART3_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT) | ||
| 333 | #define GPIO91_UART3_RXD MFP_CFG_LPM(GPIO91, AF4, FLOAT) | ||
| 334 | #define GPIO91_UART3_TXD MFP_CFG_LPM(GPIO91, AF2, FLOAT) | ||
| 335 | #define GPIO92_UART3_RXD MFP_CFG_LPM(GPIO92, AF2, FLOAT) | ||
| 336 | #define GPIO92_UART3_TXD MFP_CFG_LPM(GPIO92, AF4, FLOAT) | ||
| 337 | #define GPIO107_UART3_RXD MFP_CFG_LPM(GPIO107, AF3, FLOAT) | ||
| 338 | #define GPIO107_UART3_TXD MFP_CFG_LPM(GPIO107, AF1, FLOAT) | ||
| 339 | #define GPIO108_UART3_RXD MFP_CFG_LPM(GPIO108, AF1, FLOAT) | ||
| 340 | #define GPIO108_UART3_TXD MFP_CFG_LPM(GPIO108, AF3, FLOAT) | ||
| 341 | |||
| 342 | |||
| 343 | /* USB 2.0 UTMI */ | ||
| 344 | #define GPIO10_UTM_CLK MFP_CFG(GPIO10, AF1) | ||
| 345 | #define GPIO36_U2D_RXERROR MFP_CFG(GPIO36, AF3) | ||
| 346 | #define GPIO60_U2D_RXERROR MFP_CFG(GPIO60, AF1) | ||
| 347 | #define GPIO87_U2D_RXERROR MFP_CFG(GPIO87, AF5) | ||
| 348 | #define GPIO34_UTM_RXVALID MFP_CFG(GPIO34, AF3) | ||
| 349 | #define GPIO58_UTM_RXVALID MFP_CFG(GPIO58, AF2) | ||
| 350 | #define GPIO85_UTM_RXVALID MFP_CFG(GPIO85, AF5) | ||
| 351 | #define GPIO35_UTM_RXACTIVE MFP_CFG(GPIO35, AF3) | ||
| 352 | #define GPIO59_UTM_RXACTIVE MFP_CFG(GPIO59, AF1) | ||
| 353 | #define GPIO86_UTM_RXACTIVE MFP_CFG(GPIO86, AF5) | ||
| 354 | #define GPIO73_UTM_TXREADY MFP_CFG(GPIO73, AF1) | ||
| 355 | #define GPIO68_UTM_LINESTATE_0 MFP_CFG(GPIO68, AF3) | ||
| 356 | #define GPIO90_UTM_LINESTATE_0 MFP_CFG(GPIO90, AF3) | ||
| 357 | #define GPIO102_UTM_LINESTATE_0 MFP_CFG(GPIO102, AF3) | ||
| 358 | #define GPIO107_UTM_LINESTATE_0 MFP_CFG(GPIO107, AF4) | ||
| 359 | #define GPIO69_UTM_LINESTATE_1 MFP_CFG(GPIO69, AF3) | ||
| 360 | #define GPIO91_UTM_LINESTATE_1 MFP_CFG(GPIO91, AF3) | ||
| 361 | #define GPIO103_UTM_LINESTATE_1 MFP_CFG(GPIO103, AF3) | ||
| 362 | |||
| 363 | #define GPIO41_U2D_PHYDATA_0 MFP_CFG(GPIO41, AF3) | ||
| 364 | #define GPIO42_U2D_PHYDATA_1 MFP_CFG(GPIO42, AF3) | ||
| 365 | #define GPIO43_U2D_PHYDATA_2 MFP_CFG(GPIO43, AF3) | ||
| 366 | #define GPIO44_U2D_PHYDATA_3 MFP_CFG(GPIO44, AF3) | ||
| 367 | #define GPIO45_U2D_PHYDATA_4 MFP_CFG(GPIO45, AF3) | ||
| 368 | #define GPIO46_U2D_PHYDATA_5 MFP_CFG(GPIO46, AF3) | ||
| 369 | #define GPIO47_U2D_PHYDATA_6 MFP_CFG(GPIO47, AF3) | ||
| 370 | #define GPIO48_U2D_PHYDATA_7 MFP_CFG(GPIO48, AF3) | ||
| 371 | |||
| 372 | #define GPIO49_U2D_PHYDATA_0 MFP_CFG(GPIO49, AF3) | ||
| 373 | #define GPIO50_U2D_PHYDATA_1 MFP_CFG(GPIO50, AF3) | ||
| 374 | #define GPIO51_U2D_PHYDATA_2 MFP_CFG(GPIO51, AF3) | ||
| 375 | #define GPIO52_U2D_PHYDATA_3 MFP_CFG(GPIO52, AF3) | ||
| 376 | #define GPIO53_U2D_PHYDATA_4 MFP_CFG(GPIO53, AF3) | ||
| 377 | #define GPIO54_U2D_PHYDATA_5 MFP_CFG(GPIO54, AF3) | ||
| 378 | #define GPIO55_U2D_PHYDATA_6 MFP_CFG(GPIO55, AF3) | ||
| 379 | #define GPIO56_U2D_PHYDATA_7 MFP_CFG(GPIO56, AF3) | ||
| 380 | |||
| 381 | #define GPIO37_U2D_OPMODE0 MFP_CFG(GPIO37, AF4) | ||
| 382 | #define GPIO61_U2D_OPMODE0 MFP_CFG(GPIO61, AF2) | ||
| 383 | #define GPIO88_U2D_OPMODE0 MFP_CFG(GPIO88, AF7) | ||
| 384 | |||
| 385 | #define GPIO38_U2D_OPMODE1 MFP_CFG(GPIO38, AF4) | ||
| 386 | #define GPIO62_U2D_OPMODE1 MFP_CFG(GPIO62, AF2) | ||
| 387 | #define GPIO104_U2D_OPMODE1 MFP_CFG(GPIO104, AF4) | ||
| 388 | #define GPIO108_U2D_OPMODE1 MFP_CFG(GPIO108, AF5) | ||
| 389 | |||
| 390 | #define GPIO74_U2D_RESET MFP_CFG(GPIO74, AF1) | ||
| 391 | #define GPIO93_U2D_RESET MFP_CFG(GPIO93, AF2) | ||
| 392 | #define GPIO98_U2D_RESET MFP_CFG(GPIO98, AF3) | ||
| 393 | |||
| 394 | #define GPIO67_U2D_SUSPEND MFP_CFG(GPIO67, AF3) | ||
| 395 | #define GPIO96_U2D_SUSPEND MFP_CFG(GPIO96, AF2) | ||
| 396 | #define GPIO101_U2D_SUSPEND MFP_CFG(GPIO101, AF3) | ||
| 397 | |||
| 398 | #define GPIO66_U2D_TERM_SEL MFP_CFG(GPIO66, AF5) | ||
| 399 | #define GPIO95_U2D_TERM_SEL MFP_CFG(GPIO95, AF3) | ||
| 400 | #define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF7) | ||
| 401 | #define GPIO100_U2D_TERM_SEL MFP_CFG(GPIO100, AF5) | ||
| 402 | |||
| 403 | #define GPIO39_U2D_TXVALID MFP_CFG(GPIO39, AF4) | ||
| 404 | #define GPIO70_U2D_TXVALID MFP_CFG(GPIO70, AF5) | ||
| 405 | #define GPIO83_U2D_TXVALID MFP_CFG(GPIO83, AF7) | ||
| 406 | |||
| 407 | #define GPIO65_U2D_XCVR_SEL MFP_CFG(GPIO65, AF5) | ||
| 408 | #define GPIO94_U2D_XCVR_SEL MFP_CFG(GPIO94, AF3) | ||
| 409 | #define GPIO99_U2D_XCVR_SEL MFP_CFG(GPIO99, AF5) | ||
| 410 | |||
| 411 | /* USB Host 1.1 */ | ||
| 412 | #define GPIO2_2_USBH_PEN MFP_CFG(GPIO2_2, AF1) | ||
| 413 | #define GPIO3_2_USBH_PWR MFP_CFG(GPIO3_2, AF1) | ||
| 414 | |||
| 415 | /* USB P2 */ | ||
| 416 | #define GPIO97_USB_P2_2 MFP_CFG(GPIO97, AF2) | ||
| 417 | #define GPIO97_USB_P2_6 MFP_CFG(GPIO97, AF4) | ||
| 418 | #define GPIO98_USB_P2_2 MFP_CFG(GPIO98, AF4) | ||
| 419 | #define GPIO98_USB_P2_6 MFP_CFG(GPIO98, AF2) | ||
| 420 | #define GPIO99_USB_P2_1 MFP_CFG(GPIO99, AF2) | ||
| 421 | #define GPIO100_USB_P2_4 MFP_CFG(GPIO100, AF2) | ||
| 422 | #define GPIO101_USB_P2_8 MFP_CFG(GPIO101, AF2) | ||
| 423 | #define GPIO102_USB_P2_3 MFP_CFG(GPIO102, AF2) | ||
| 424 | #define GPIO103_USB_P2_5 MFP_CFG(GPIO103, AF2) | ||
| 425 | #define GPIO104_USB_P2_7 MFP_CFG(GPIO104, AF2) | ||
| 426 | |||
| 427 | /* USB P3 */ | ||
| 428 | #define GPIO75_USB_P3_1 MFP_CFG(GPIO75, AF2) | ||
| 429 | #define GPIO76_USB_P3_2 MFP_CFG(GPIO76, AF2) | ||
| 430 | #define GPIO77_USB_P3_3 MFP_CFG(GPIO77, AF2) | ||
| 431 | #define GPIO78_USB_P3_4 MFP_CFG(GPIO78, AF2) | ||
| 432 | #define GPIO79_USB_P3_5 MFP_CFG(GPIO79, AF2) | ||
| 433 | #define GPIO80_USB_P3_6 MFP_CFG(GPIO80, AF2) | ||
| 434 | |||
| 435 | #define GPIO13_CHOUT0 MFP_CFG(GPIO13, AF6) | ||
| 436 | #define GPIO14_CHOUT1 MFP_CFG(GPIO14, AF6) | ||
| 437 | |||
| 438 | #define GPIO2_RDY MFP_CFG(GPIO2, AF1) | ||
| 439 | #define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) | ||
| 440 | |||
| 441 | #define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) | ||
| 442 | #define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) | ||
| 443 | #define GPIO13_PWM2_OUT MFP_CFG(GPIO13, AF1) | ||
| 444 | #define GPIO14_PWM3_OUT MFP_CFG(GPIO14, AF1) | ||
| 445 | |||
| 446 | #endif /* __ASM_ARCH_MFP_PXA320_H */ | ||
diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h new file mode 100644 index 000000000000..60291742ffdd --- /dev/null +++ b/include/asm-arm/arch-pxa/mfp.h | |||
| @@ -0,0 +1,576 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-pxa/mfp.h | ||
| 3 | * | ||
| 4 | * Multi-Function Pin Definitions | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell International Ltd. | ||
| 7 | * | ||
| 8 | * 2007-8-21: eric miao <eric.y.miao@gmail.com> | ||
| 9 | * initial version | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __ASM_ARCH_MFP_H | ||
| 17 | #define __ASM_ARCH_MFP_H | ||
| 18 | |||
| 19 | #define MFPR_BASE (0x40e10000) | ||
| 20 | #define MFPR_SIZE (PAGE_SIZE) | ||
| 21 | |||
| 22 | #define mfp_to_gpio(m) ((m) % 128) | ||
| 23 | |||
| 24 | /* list of all the configurable MFP pins */ | ||
| 25 | enum { | ||
| 26 | MFP_PIN_INVALID = -1, | ||
| 27 | |||
| 28 | MFP_PIN_GPIO0 = 0, | ||
| 29 | MFP_PIN_GPIO1, | ||
| 30 | MFP_PIN_GPIO2, | ||
| 31 | MFP_PIN_GPIO3, | ||
| 32 | MFP_PIN_GPIO4, | ||
| 33 | MFP_PIN_GPIO5, | ||
| 34 | MFP_PIN_GPIO6, | ||
| 35 | MFP_PIN_GPIO7, | ||
| 36 | MFP_PIN_GPIO8, | ||
| 37 | MFP_PIN_GPIO9, | ||
| 38 | MFP_PIN_GPIO10, | ||
| 39 | MFP_PIN_GPIO11, | ||
| 40 | MFP_PIN_GPIO12, | ||
| 41 | MFP_PIN_GPIO13, | ||
| 42 | MFP_PIN_GPIO14, | ||
| 43 | MFP_PIN_GPIO15, | ||
| 44 | MFP_PIN_GPIO16, | ||
| 45 | MFP_PIN_GPIO17, | ||
| 46 | MFP_PIN_GPIO18, | ||
| 47 | MFP_PIN_GPIO19, | ||
| 48 | MFP_PIN_GPIO20, | ||
| 49 | MFP_PIN_GPIO21, | ||
| 50 | MFP_PIN_GPIO22, | ||
| 51 | MFP_PIN_GPIO23, | ||
| 52 | MFP_PIN_GPIO24, | ||
| 53 | MFP_PIN_GPIO25, | ||
| 54 | MFP_PIN_GPIO26, | ||
| 55 | MFP_PIN_GPIO27, | ||
| 56 | MFP_PIN_GPIO28, | ||
| 57 | MFP_PIN_GPIO29, | ||
| 58 | MFP_PIN_GPIO30, | ||
| 59 | MFP_PIN_GPIO31, | ||
| 60 | MFP_PIN_GPIO32, | ||
| 61 | MFP_PIN_GPIO33, | ||
| 62 | MFP_PIN_GPIO34, | ||
| 63 | MFP_PIN_GPIO35, | ||
| 64 | MFP_PIN_GPIO36, | ||
| 65 | MFP_PIN_GPIO37, | ||
| 66 | MFP_PIN_GPIO38, | ||
| 67 | MFP_PIN_GPIO39, | ||
| 68 | MFP_PIN_GPIO40, | ||
| 69 | MFP_PIN_GPIO41, | ||
| 70 | MFP_PIN_GPIO42, | ||
| 71 | MFP_PIN_GPIO43, | ||
| 72 | MFP_PIN_GPIO44, | ||
| 73 | MFP_PIN_GPIO45, | ||
| 74 | MFP_PIN_GPIO46, | ||
| 75 | MFP_PIN_GPIO47, | ||
| 76 | MFP_PIN_GPIO48, | ||
| 77 | MFP_PIN_GPIO49, | ||
| 78 | MFP_PIN_GPIO50, | ||
| 79 | MFP_PIN_GPIO51, | ||
| 80 | MFP_PIN_GPIO52, | ||
| 81 | MFP_PIN_GPIO53, | ||
| 82 | MFP_PIN_GPIO54, | ||
| 83 | MFP_PIN_GPIO55, | ||
| 84 | MFP_PIN_GPIO56, | ||
| 85 | MFP_PIN_GPIO57, | ||
| 86 | MFP_PIN_GPIO58, | ||
| 87 | MFP_PIN_GPIO59, | ||
| 88 | MFP_PIN_GPIO60, | ||
| 89 | MFP_PIN_GPIO61, | ||
| 90 | MFP_PIN_GPIO62, | ||
| 91 | MFP_PIN_GPIO63, | ||
| 92 | MFP_PIN_GPIO64, | ||
| 93 | MFP_PIN_GPIO65, | ||
| 94 | MFP_PIN_GPIO66, | ||
| 95 | MFP_PIN_GPIO67, | ||
| 96 | MFP_PIN_GPIO68, | ||
| 97 | MFP_PIN_GPIO69, | ||
| 98 | MFP_PIN_GPIO70, | ||
| 99 | MFP_PIN_GPIO71, | ||
| 100 | MFP_PIN_GPIO72, | ||
| 101 | MFP_PIN_GPIO73, | ||
| 102 | MFP_PIN_GPIO74, | ||
| 103 | MFP_PIN_GPIO75, | ||
| 104 | MFP_PIN_GPIO76, | ||
| 105 | MFP_PIN_GPIO77, | ||
| 106 | MFP_PIN_GPIO78, | ||
| 107 | MFP_PIN_GPIO79, | ||
| 108 | MFP_PIN_GPIO80, | ||
| 109 | MFP_PIN_GPIO81, | ||
| 110 | MFP_PIN_GPIO82, | ||
| 111 | MFP_PIN_GPIO83, | ||
| 112 | MFP_PIN_GPIO84, | ||
| 113 | MFP_PIN_GPIO85, | ||
| 114 | MFP_PIN_GPIO86, | ||
| 115 | MFP_PIN_GPIO87, | ||
| 116 | MFP_PIN_GPIO88, | ||
| 117 | MFP_PIN_GPIO89, | ||
| 118 | MFP_PIN_GPIO90, | ||
| 119 | MFP_PIN_GPIO91, | ||
| 120 | MFP_PIN_GPIO92, | ||
| 121 | MFP_PIN_GPIO93, | ||
| 122 | MFP_PIN_GPIO94, | ||
| 123 | MFP_PIN_GPIO95, | ||
| 124 | MFP_PIN_GPIO96, | ||
| 125 | MFP_PIN_GPIO97, | ||
| 126 | MFP_PIN_GPIO98, | ||
| 127 | MFP_PIN_GPIO99, | ||
| 128 | MFP_PIN_GPIO100, | ||
| 129 | MFP_PIN_GPIO101, | ||
| 130 | MFP_PIN_GPIO102, | ||
| 131 | MFP_PIN_GPIO103, | ||
| 132 | MFP_PIN_GPIO104, | ||
| 133 | MFP_PIN_GPIO105, | ||
| 134 | MFP_PIN_GPIO106, | ||
| 135 | MFP_PIN_GPIO107, | ||
| 136 | MFP_PIN_GPIO108, | ||
| 137 | MFP_PIN_GPIO109, | ||
| 138 | MFP_PIN_GPIO110, | ||
| 139 | MFP_PIN_GPIO111, | ||
| 140 | MFP_PIN_GPIO112, | ||
| 141 | MFP_PIN_GPIO113, | ||
| 142 | MFP_PIN_GPIO114, | ||
| 143 | MFP_PIN_GPIO115, | ||
| 144 | MFP_PIN_GPIO116, | ||
| 145 | MFP_PIN_GPIO117, | ||
| 146 | MFP_PIN_GPIO118, | ||
| 147 | MFP_PIN_GPIO119, | ||
| 148 | MFP_PIN_GPIO120, | ||
| 149 | MFP_PIN_GPIO121, | ||
| 150 | MFP_PIN_GPIO122, | ||
| 151 | MFP_PIN_GPIO123, | ||
| 152 | MFP_PIN_GPIO124, | ||
| 153 | MFP_PIN_GPIO125, | ||
| 154 | MFP_PIN_GPIO126, | ||
| 155 | MFP_PIN_GPIO127, | ||
| 156 | MFP_PIN_GPIO0_2, | ||
| 157 | MFP_PIN_GPIO1_2, | ||
| 158 | MFP_PIN_GPIO2_2, | ||
| 159 | MFP_PIN_GPIO3_2, | ||
| 160 | MFP_PIN_GPIO4_2, | ||
| 161 | MFP_PIN_GPIO5_2, | ||
| 162 | MFP_PIN_GPIO6_2, | ||
| 163 | MFP_PIN_GPIO7_2, | ||
| 164 | MFP_PIN_GPIO8_2, | ||
| 165 | MFP_PIN_GPIO9_2, | ||
| 166 | MFP_PIN_GPIO10_2, | ||
| 167 | MFP_PIN_GPIO11_2, | ||
| 168 | MFP_PIN_GPIO12_2, | ||
| 169 | MFP_PIN_GPIO13_2, | ||
| 170 | MFP_PIN_GPIO14_2, | ||
| 171 | MFP_PIN_GPIO15_2, | ||
| 172 | MFP_PIN_GPIO16_2, | ||
| 173 | MFP_PIN_GPIO17_2, | ||
| 174 | |||
| 175 | MFP_PIN_ULPI_STP, | ||
| 176 | MFP_PIN_ULPI_NXT, | ||
| 177 | MFP_PIN_ULPI_DIR, | ||
| 178 | |||
| 179 | MFP_PIN_nXCVREN, | ||
| 180 | MFP_PIN_DF_CLE_nOE, | ||
| 181 | MFP_PIN_DF_nADV1_ALE, | ||
| 182 | MFP_PIN_DF_SCLK_E, | ||
| 183 | MFP_PIN_DF_SCLK_S, | ||
| 184 | MFP_PIN_nBE0, | ||
| 185 | MFP_PIN_nBE1, | ||
| 186 | MFP_PIN_DF_nADV2_ALE, | ||
| 187 | MFP_PIN_DF_INT_RnB, | ||
| 188 | MFP_PIN_DF_nCS0, | ||
| 189 | MFP_PIN_DF_nCS1, | ||
| 190 | MFP_PIN_nLUA, | ||
| 191 | MFP_PIN_nLLA, | ||
| 192 | MFP_PIN_DF_nWE, | ||
| 193 | MFP_PIN_DF_ALE_nWE, | ||
| 194 | MFP_PIN_DF_nRE_nOE, | ||
| 195 | MFP_PIN_DF_ADDR0, | ||
| 196 | MFP_PIN_DF_ADDR1, | ||
| 197 | MFP_PIN_DF_ADDR2, | ||
| 198 | MFP_PIN_DF_ADDR3, | ||
| 199 | MFP_PIN_DF_IO0, | ||
| 200 | MFP_PIN_DF_IO1, | ||
| 201 | MFP_PIN_DF_IO2, | ||
| 202 | MFP_PIN_DF_IO3, | ||
| 203 | MFP_PIN_DF_IO4, | ||
| 204 | MFP_PIN_DF_IO5, | ||
| 205 | MFP_PIN_DF_IO6, | ||
| 206 | MFP_PIN_DF_IO7, | ||
| 207 | MFP_PIN_DF_IO8, | ||
| 208 | MFP_PIN_DF_IO9, | ||
| 209 | MFP_PIN_DF_IO10, | ||
| 210 | MFP_PIN_DF_IO11, | ||
| 211 | MFP_PIN_DF_IO12, | ||
| 212 | MFP_PIN_DF_IO13, | ||
| 213 | MFP_PIN_DF_IO14, | ||
| 214 | MFP_PIN_DF_IO15, | ||
| 215 | |||
| 216 | MFP_PIN_MAX, | ||
| 217 | }; | ||
| 218 | |||
| 219 | /* | ||
| 220 | * Table that determines the low power modes outputs, with actual settings | ||
| 221 | * used in parentheses for don't-care values. Except for the float output, | ||
| 222 | * the configured driven and pulled levels match, so if there is a need for | ||
| 223 | * non-LPM pulled output, the same configuration could probably be used. | ||
| 224 | * | ||
| 225 | * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel | ||
| 226 | * (bit 7) (bit 8) (bit 14d) (bit 13d) | ||
| 227 | * | ||
| 228 | * Drive 0 0 0 0 X (1) 0 | ||
| 229 | * Drive 1 0 1 X (1) 0 0 | ||
| 230 | * Pull hi (1) 1 X(1) 1 0 0 | ||
| 231 | * Pull lo (0) 1 X(0) 0 1 0 | ||
| 232 | * Z (float) 1 X(0) 0 0 0 | ||
| 233 | */ | ||
| 234 | #define MFP_LPM_DRIVE_LOW 0x8 | ||
| 235 | #define MFP_LPM_DRIVE_HIGH 0x6 | ||
| 236 | #define MFP_LPM_PULL_HIGH 0x7 | ||
| 237 | #define MFP_LPM_PULL_LOW 0x9 | ||
| 238 | #define MFP_LPM_FLOAT 0x1 | ||
| 239 | #define MFP_LPM_PULL_NEITHER 0x0 | ||
| 240 | |||
| 241 | /* | ||
| 242 | * The pullup and pulldown state of the MFP pin is by default determined by | ||
| 243 | * selected alternate function. In case some buggy devices need to override | ||
| 244 | * this default behavior, pxa3xx_mfp_set_pull() can be invoked with one of | ||
| 245 | * the following definition as the parameter. | ||
| 246 | * | ||
| 247 | * Definition pull_sel pullup_en pulldown_en | ||
| 248 | * MFP_PULL_HIGH 1 1 0 | ||
| 249 | * MFP_PULL_LOW 1 0 1 | ||
| 250 | * MFP_PULL_BOTH 1 1 1 | ||
| 251 | * MFP_PULL_NONE 1 0 0 | ||
| 252 | * MFP_PULL_DEFAULT 0 X X | ||
| 253 | * | ||
| 254 | * NOTE: pxa3xx_mfp_set_pull() will modify the PULLUP_EN and PULLDOWN_EN | ||
| 255 | * bits, which will cause potential conflicts with the low power mode | ||
| 256 | * setting, device drivers should take care of this | ||
| 257 | */ | ||
| 258 | #define MFP_PULL_BOTH (0x7u) | ||
| 259 | #define MFP_PULL_HIGH (0x6u) | ||
| 260 | #define MFP_PULL_LOW (0x5u) | ||
| 261 | #define MFP_PULL_NONE (0x4u) | ||
| 262 | #define MFP_PULL_DEFAULT (0x0u) | ||
| 263 | |||
| 264 | #define MFP_AF0 (0) | ||
| 265 | #define MFP_AF1 (1) | ||
| 266 | #define MFP_AF2 (2) | ||
| 267 | #define MFP_AF3 (3) | ||
| 268 | #define MFP_AF4 (4) | ||
| 269 | #define MFP_AF5 (5) | ||
| 270 | #define MFP_AF6 (6) | ||
| 271 | #define MFP_AF7 (7) | ||
| 272 | |||
| 273 | #define MFP_DS01X (0) | ||
| 274 | #define MFP_DS02X (1) | ||
| 275 | #define MFP_DS03X (2) | ||
| 276 | #define MFP_DS04X (3) | ||
| 277 | #define MFP_DS06X (4) | ||
| 278 | #define MFP_DS08X (5) | ||
| 279 | #define MFP_DS10X (6) | ||
| 280 | #define MFP_DS12X (7) | ||
| 281 | |||
| 282 | #define MFP_EDGE_BOTH 0x3 | ||
| 283 | #define MFP_EDGE_RISE 0x2 | ||
| 284 | #define MFP_EDGE_FALL 0x1 | ||
| 285 | #define MFP_EDGE_NONE 0x0 | ||
| 286 | |||
| 287 | #define MFPR_AF_MASK 0x0007 | ||
| 288 | #define MFPR_DRV_MASK 0x1c00 | ||
| 289 | #define MFPR_RDH_MASK 0x0200 | ||
| 290 | #define MFPR_LPM_MASK 0xe180 | ||
| 291 | #define MFPR_PULL_MASK 0xe000 | ||
| 292 | #define MFPR_EDGE_MASK 0x0070 | ||
| 293 | |||
| 294 | #define MFPR_ALT_OFFSET 0 | ||
| 295 | #define MFPR_ERE_OFFSET 4 | ||
| 296 | #define MFPR_EFE_OFFSET 5 | ||
| 297 | #define MFPR_EC_OFFSET 6 | ||
| 298 | #define MFPR_SON_OFFSET 7 | ||
| 299 | #define MFPR_SD_OFFSET 8 | ||
| 300 | #define MFPR_SS_OFFSET 9 | ||
| 301 | #define MFPR_DRV_OFFSET 10 | ||
| 302 | #define MFPR_PD_OFFSET 13 | ||
| 303 | #define MFPR_PU_OFFSET 14 | ||
| 304 | #define MFPR_PS_OFFSET 15 | ||
| 305 | |||
| 306 | #define MFPR(af, drv, rdh, lpm, edge) \ | ||
| 307 | (((af) & 0x7) | (((drv) & 0x7) << 10) |\ | ||
| 308 | (((rdh) & 0x1) << 9) |\ | ||
| 309 | (((lpm) & 0x3) << 7) |\ | ||
| 310 | (((lpm) & 0x4) << 12)|\ | ||
| 311 | (((lpm) & 0x8) << 10)|\ | ||
| 312 | ((!(edge)) << 6) |\ | ||
| 313 | (((edge) & 0x1) << 5) |\ | ||
| 314 | (((edge) & 0x2) << 3)) | ||
| 315 | |||
| 316 | /* | ||
| 317 | * a possible MFP configuration is represented by a 32-bit integer | ||
| 318 | * bit 0..15 - MFPR value (16-bit) | ||
| 319 | * bit 16..31 - mfp pin index (used to obtain the MFPR offset) | ||
| 320 | * | ||
| 321 | * to facilitate the definition, the following macros are provided | ||
| 322 | * | ||
| 323 | * MFPR_DEFAULT - default MFPR value, with | ||
| 324 | * alternate function = 0, | ||
| 325 | * drive strength = fast 1mA (MFP_DS01X) | ||
| 326 | * low power mode = default | ||
| 327 | * release dalay hold = false (RDH bit) | ||
| 328 | * edge detection = none | ||
| 329 | * | ||
| 330 | * MFP_CFG - default MFPR value with alternate function | ||
| 331 | * MFP_CFG_DRV - default MFPR value with alternate function and | ||
| 332 | * pin drive strength | ||
| 333 | * MFP_CFG_LPM - default MFPR value with alternate function and | ||
| 334 | * low power mode | ||
| 335 | * MFP_CFG_X - default MFPR value with alternate function, | ||
| 336 | * pin drive strength and low power mode | ||
| 337 | * | ||
| 338 | * use | ||
| 339 | * | ||
| 340 | * MFP_CFG_PIN - to get the MFP pin index | ||
| 341 | * MFP_CFG_VAL - to get the corresponding MFPR value | ||
| 342 | */ | ||
| 343 | |||
| 344 | typedef uint32_t mfp_cfg_t; | ||
| 345 | |||
| 346 | #define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff) | ||
| 347 | #define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff) | ||
| 348 | |||
| 349 | #define MFPR_DEFAULT (0x0000) | ||
| 350 | |||
| 351 | #define MFP_CFG(pin, af) \ | ||
| 352 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af)) | ||
| 353 | |||
| 354 | #define MFP_CFG_DRV(pin, af, drv) \ | ||
| 355 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ | ||
| 356 | ((MFP_##drv) << 10) | (MFP_##af)) | ||
| 357 | |||
| 358 | #define MFP_CFG_LPM(pin, af, lpm) \ | ||
| 359 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af) |\ | ||
| 360 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ | ||
| 361 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ | ||
| 362 | (((MFP_LPM_##lpm) & 0x8) << 10)) | ||
| 363 | |||
| 364 | #define MFP_CFG_X(pin, af, drv, lpm) \ | ||
| 365 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ | ||
| 366 | ((MFP_##drv) << 10) | (MFP_##af) |\ | ||
| 367 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ | ||
| 368 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ | ||
| 369 | (((MFP_LPM_##lpm) & 0x8) << 10)) | ||
| 370 | |||
| 371 | /* common MFP configurations - processor specific ones defined | ||
| 372 | * in mfp-pxa3xx.h | ||
| 373 | */ | ||
| 374 | #define GPIO0_GPIO MFP_CFG(GPIO0, AF0) | ||
| 375 | #define GPIO1_GPIO MFP_CFG(GPIO1, AF0) | ||
| 376 | #define GPIO2_GPIO MFP_CFG(GPIO2, AF0) | ||
| 377 | #define GPIO3_GPIO MFP_CFG(GPIO3, AF0) | ||
| 378 | #define GPIO4_GPIO MFP_CFG(GPIO4, AF0) | ||
| 379 | #define GPIO5_GPIO MFP_CFG(GPIO5, AF0) | ||
| 380 | #define GPIO6_GPIO MFP_CFG(GPIO6, AF0) | ||
| 381 | #define GPIO7_GPIO MFP_CFG(GPIO7, AF0) | ||
| 382 | #define GPIO8_GPIO MFP_CFG(GPIO8, AF0) | ||
| 383 | #define GPIO9_GPIO MFP_CFG(GPIO9, AF0) | ||
| 384 | #define GPIO10_GPIO MFP_CFG(GPIO10, AF0) | ||
| 385 | #define GPIO11_GPIO MFP_CFG(GPIO11, AF0) | ||
| 386 | #define GPIO12_GPIO MFP_CFG(GPIO12, AF0) | ||
| 387 | #define GPIO13_GPIO MFP_CFG(GPIO13, AF0) | ||
| 388 | #define GPIO14_GPIO MFP_CFG(GPIO14, AF0) | ||
| 389 | #define GPIO15_GPIO MFP_CFG(GPIO15, AF0) | ||
| 390 | #define GPIO16_GPIO MFP_CFG(GPIO16, AF0) | ||
| 391 | #define GPIO17_GPIO MFP_CFG(GPIO17, AF0) | ||
| 392 | #define GPIO18_GPIO MFP_CFG(GPIO18, AF0) | ||
| 393 | #define GPIO19_GPIO MFP_CFG(GPIO19, AF0) | ||
| 394 | #define GPIO20_GPIO MFP_CFG(GPIO20, AF0) | ||
| 395 | #define GPIO21_GPIO MFP_CFG(GPIO21, AF0) | ||
| 396 | #define GPIO22_GPIO MFP_CFG(GPIO22, AF0) | ||
| 397 | #define GPIO23_GPIO MFP_CFG(GPIO23, AF0) | ||
| 398 | #define GPIO24_GPIO MFP_CFG(GPIO24, AF0) | ||
| 399 | #define GPIO25_GPIO MFP_CFG(GPIO25, AF0) | ||
| 400 | #define GPIO26_GPIO MFP_CFG(GPIO26, AF0) | ||
| 401 | #define GPIO27_GPIO MFP_CFG(GPIO27, AF0) | ||
| 402 | #define GPIO28_GPIO MFP_CFG(GPIO28, AF0) | ||
| 403 | #define GPIO29_GPIO MFP_CFG(GPIO29, AF0) | ||
| 404 | #define GPIO30_GPIO MFP_CFG(GPIO30, AF0) | ||
| 405 | #define GPIO31_GPIO MFP_CFG(GPIO31, AF0) | ||
| 406 | #define GPIO32_GPIO MFP_CFG(GPIO32, AF0) | ||
| 407 | #define GPIO33_GPIO MFP_CFG(GPIO33, AF0) | ||
| 408 | #define GPIO34_GPIO MFP_CFG(GPIO34, AF0) | ||
| 409 | #define GPIO35_GPIO MFP_CFG(GPIO35, AF0) | ||
| 410 | #define GPIO36_GPIO MFP_CFG(GPIO36, AF0) | ||
| 411 | #define GPIO37_GPIO MFP_CFG(GPIO37, AF0) | ||
| 412 | #define GPIO38_GPIO MFP_CFG(GPIO38, AF0) | ||
| 413 | #define GPIO39_GPIO MFP_CFG(GPIO39, AF0) | ||
| 414 | #define GPIO40_GPIO MFP_CFG(GPIO40, AF0) | ||
| 415 | #define GPIO41_GPIO MFP_CFG(GPIO41, AF0) | ||
| 416 | #define GPIO42_GPIO MFP_CFG(GPIO42, AF0) | ||
| 417 | #define GPIO43_GPIO MFP_CFG(GPIO43, AF0) | ||
| 418 | #define GPIO44_GPIO MFP_CFG(GPIO44, AF0) | ||
| 419 | #define GPIO45_GPIO MFP_CFG(GPIO45, AF0) | ||
| 420 | |||
| 421 | #define GPIO47_GPIO MFP_CFG(GPIO47, AF0) | ||
| 422 | #define GPIO48_GPIO MFP_CFG(GPIO48, AF0) | ||
| 423 | |||
| 424 | #define GPIO53_GPIO MFP_CFG(GPIO53, AF0) | ||
| 425 | #define GPIO54_GPIO MFP_CFG(GPIO54, AF0) | ||
| 426 | #define GPIO55_GPIO MFP_CFG(GPIO55, AF0) | ||
| 427 | |||
| 428 | #define GPIO57_GPIO MFP_CFG(GPIO57, AF0) | ||
| 429 | |||
| 430 | #define GPIO63_GPIO MFP_CFG(GPIO63, AF0) | ||
| 431 | #define GPIO64_GPIO MFP_CFG(GPIO64, AF0) | ||
| 432 | #define GPIO65_GPIO MFP_CFG(GPIO65, AF0) | ||
| 433 | #define GPIO66_GPIO MFP_CFG(GPIO66, AF0) | ||
| 434 | #define GPIO67_GPIO MFP_CFG(GPIO67, AF0) | ||
| 435 | #define GPIO68_GPIO MFP_CFG(GPIO68, AF0) | ||
| 436 | #define GPIO69_GPIO MFP_CFG(GPIO69, AF0) | ||
| 437 | #define GPIO70_GPIO MFP_CFG(GPIO70, AF0) | ||
| 438 | #define GPIO71_GPIO MFP_CFG(GPIO71, AF0) | ||
| 439 | #define GPIO72_GPIO MFP_CFG(GPIO72, AF0) | ||
| 440 | #define GPIO73_GPIO MFP_CFG(GPIO73, AF0) | ||
| 441 | #define GPIO74_GPIO MFP_CFG(GPIO74, AF0) | ||
| 442 | #define GPIO75_GPIO MFP_CFG(GPIO75, AF0) | ||
| 443 | #define GPIO76_GPIO MFP_CFG(GPIO76, AF0) | ||
| 444 | #define GPIO77_GPIO MFP_CFG(GPIO77, AF0) | ||
| 445 | #define GPIO78_GPIO MFP_CFG(GPIO78, AF0) | ||
| 446 | #define GPIO79_GPIO MFP_CFG(GPIO79, AF0) | ||
| 447 | #define GPIO80_GPIO MFP_CFG(GPIO80, AF0) | ||
| 448 | #define GPIO81_GPIO MFP_CFG(GPIO81, AF0) | ||
| 449 | #define GPIO82_GPIO MFP_CFG(GPIO82, AF0) | ||
| 450 | #define GPIO83_GPIO MFP_CFG(GPIO83, AF0) | ||
| 451 | #define GPIO84_GPIO MFP_CFG(GPIO84, AF0) | ||
| 452 | #define GPIO85_GPIO MFP_CFG(GPIO85, AF0) | ||
| 453 | #define GPIO86_GPIO MFP_CFG(GPIO86, AF0) | ||
| 454 | #define GPIO87_GPIO MFP_CFG(GPIO87, AF0) | ||
| 455 | #define GPIO88_GPIO MFP_CFG(GPIO88, AF0) | ||
| 456 | #define GPIO89_GPIO MFP_CFG(GPIO89, AF0) | ||
| 457 | #define GPIO90_GPIO MFP_CFG(GPIO90, AF0) | ||
| 458 | #define GPIO91_GPIO MFP_CFG(GPIO91, AF0) | ||
| 459 | #define GPIO92_GPIO MFP_CFG(GPIO92, AF0) | ||
| 460 | #define GPIO93_GPIO MFP_CFG(GPIO93, AF0) | ||
| 461 | #define GPIO94_GPIO MFP_CFG(GPIO94, AF0) | ||
| 462 | #define GPIO95_GPIO MFP_CFG(GPIO95, AF0) | ||
| 463 | #define GPIO96_GPIO MFP_CFG(GPIO96, AF0) | ||
| 464 | #define GPIO97_GPIO MFP_CFG(GPIO97, AF0) | ||
| 465 | #define GPIO98_GPIO MFP_CFG(GPIO98, AF0) | ||
| 466 | #define GPIO99_GPIO MFP_CFG(GPIO99, AF0) | ||
| 467 | #define GPIO100_GPIO MFP_CFG(GPIO100, AF0) | ||
| 468 | #define GPIO101_GPIO MFP_CFG(GPIO101, AF0) | ||
| 469 | #define GPIO102_GPIO MFP_CFG(GPIO102, AF0) | ||
| 470 | #define GPIO103_GPIO MFP_CFG(GPIO103, AF0) | ||
| 471 | #define GPIO104_GPIO MFP_CFG(GPIO104, AF0) | ||
| 472 | #define GPIO105_GPIO MFP_CFG(GPIO105, AF0) | ||
| 473 | #define GPIO106_GPIO MFP_CFG(GPIO106, AF0) | ||
| 474 | #define GPIO107_GPIO MFP_CFG(GPIO107, AF0) | ||
| 475 | #define GPIO108_GPIO MFP_CFG(GPIO108, AF0) | ||
| 476 | #define GPIO109_GPIO MFP_CFG(GPIO109, AF0) | ||
| 477 | #define GPIO110_GPIO MFP_CFG(GPIO110, AF0) | ||
| 478 | #define GPIO111_GPIO MFP_CFG(GPIO111, AF0) | ||
| 479 | #define GPIO112_GPIO MFP_CFG(GPIO112, AF0) | ||
| 480 | #define GPIO113_GPIO MFP_CFG(GPIO113, AF0) | ||
| 481 | #define GPIO114_GPIO MFP_CFG(GPIO114, AF0) | ||
| 482 | #define GPIO115_GPIO MFP_CFG(GPIO115, AF0) | ||
| 483 | #define GPIO116_GPIO MFP_CFG(GPIO116, AF0) | ||
| 484 | #define GPIO117_GPIO MFP_CFG(GPIO117, AF0) | ||
| 485 | #define GPIO118_GPIO MFP_CFG(GPIO118, AF0) | ||
| 486 | #define GPIO119_GPIO MFP_CFG(GPIO119, AF0) | ||
| 487 | #define GPIO120_GPIO MFP_CFG(GPIO120, AF0) | ||
| 488 | #define GPIO121_GPIO MFP_CFG(GPIO121, AF0) | ||
| 489 | #define GPIO122_GPIO MFP_CFG(GPIO122, AF0) | ||
| 490 | #define GPIO123_GPIO MFP_CFG(GPIO123, AF0) | ||
| 491 | #define GPIO124_GPIO MFP_CFG(GPIO124, AF0) | ||
| 492 | #define GPIO125_GPIO MFP_CFG(GPIO125, AF0) | ||
| 493 | #define GPIO126_GPIO MFP_CFG(GPIO126, AF0) | ||
| 494 | #define GPIO127_GPIO MFP_CFG(GPIO127, AF0) | ||
| 495 | |||
| 496 | #define GPIO0_2_GPIO MFP_CFG(GPIO0_2, AF0) | ||
| 497 | #define GPIO1_2_GPIO MFP_CFG(GPIO1_2, AF0) | ||
| 498 | #define GPIO2_2_GPIO MFP_CFG(GPIO2_2, AF0) | ||
| 499 | #define GPIO3_2_GPIO MFP_CFG(GPIO3_2, AF0) | ||
| 500 | #define GPIO4_2_GPIO MFP_CFG(GPIO4_2, AF0) | ||
| 501 | #define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0) | ||
| 502 | #define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0) | ||
| 503 | |||
| 504 | /* | ||
| 505 | * each MFP pin will have a MFPR register, since the offset of the | ||
| 506 | * register varies between processors, the processor specific code | ||
| 507 | * should initialize the pin offsets by pxa3xx_mfp_init_addr() | ||
| 508 | * | ||
| 509 | * pxa3xx_mfp_init_addr - accepts a table of "pxa3xx_mfp_addr_map" | ||
| 510 | * structure, which represents a range of MFP pins from "start" to | ||
| 511 | * "end", with the offset begining at "offset", to define a single | ||
| 512 | * pin, let "end" = -1 | ||
| 513 | * | ||
| 514 | * use | ||
| 515 | * | ||
| 516 | * MFP_ADDR_X() to define a range of pins | ||
| 517 | * MFP_ADDR() to define a single pin | ||
| 518 | * MFP_ADDR_END to signal the end of pin offset definitions | ||
| 519 | */ | ||
| 520 | struct pxa3xx_mfp_addr_map { | ||
| 521 | unsigned int start; | ||
| 522 | unsigned int end; | ||
| 523 | unsigned long offset; | ||
| 524 | }; | ||
| 525 | |||
| 526 | #define MFP_ADDR_X(start, end, offset) \ | ||
| 527 | { MFP_PIN_##start, MFP_PIN_##end, offset } | ||
| 528 | |||
| 529 | #define MFP_ADDR(pin, offset) \ | ||
| 530 | { MFP_PIN_##pin, -1, offset } | ||
| 531 | |||
| 532 | #define MFP_ADDR_END { MFP_PIN_INVALID, 0 } | ||
| 533 | |||
| 534 | struct pxa3xx_mfp_pin { | ||
| 535 | unsigned long mfpr_off; /* MFPRxx register offset */ | ||
| 536 | unsigned long mfpr_val; /* MFPRxx register value */ | ||
| 537 | }; | ||
| 538 | |||
| 539 | /* | ||
| 540 | * pxa3xx_mfp_read()/pxa3xx_mfp_write() - for direct read/write access | ||
| 541 | * to the MFPR register | ||
| 542 | */ | ||
| 543 | unsigned long pxa3xx_mfp_read(int mfp); | ||
| 544 | void pxa3xx_mfp_write(int mfp, unsigned long mfpr_val); | ||
| 545 | |||
| 546 | /* | ||
| 547 | * pxa3xx_mfp_set_afds - set MFP alternate function and drive strength | ||
| 548 | * pxa3xx_mfp_set_rdh - set MFP release delay hold on/off | ||
| 549 | * pxa3xx_mfp_set_lpm - set MFP low power mode state | ||
| 550 | * pxa3xx_mfp_set_edge - set MFP edge detection in low power mode | ||
| 551 | * | ||
| 552 | * use these functions to override/change the default configuration | ||
| 553 | * done by pxa3xx_mfp_set_config(s) | ||
| 554 | */ | ||
| 555 | void pxa3xx_mfp_set_afds(int mfp, int af, int ds); | ||
| 556 | void pxa3xx_mfp_set_rdh(int mfp, int rdh); | ||
| 557 | void pxa3xx_mfp_set_lpm(int mfp, int lpm); | ||
| 558 | void pxa3xx_mfp_set_edge(int mfp, int edge); | ||
| 559 | |||
| 560 | /* | ||
| 561 | * pxa3xx_mfp_config - configure the MFPR registers | ||
| 562 | * | ||
| 563 | * used by board specific initialization code | ||
| 564 | */ | ||
| 565 | void pxa3xx_mfp_config(mfp_cfg_t *mfp_cfgs, int num); | ||
| 566 | |||
| 567 | /* | ||
| 568 | * pxa3xx_mfp_init_addr() - initialize the mapping between mfp pin | ||
| 569 | * index and MFPR register offset | ||
| 570 | * | ||
| 571 | * used by processor specific code | ||
| 572 | */ | ||
| 573 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *); | ||
| 574 | void __init pxa3xx_init_mfp(void); | ||
| 575 | |||
| 576 | #endif /* __ASM_ARCH_MFP_H */ | ||
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e68b593d69da..67f53e07db86 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
| @@ -1177,7 +1177,7 @@ | |||
| 1177 | 1177 | ||
| 1178 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) | 1178 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) |
| 1179 | 1179 | ||
| 1180 | #ifdef CONFIG_PXA27x | 1180 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
| 1181 | 1181 | ||
| 1182 | /* Interrupt Controller */ | 1182 | /* Interrupt Controller */ |
| 1183 | 1183 | ||
diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h new file mode 100644 index 000000000000..3900a0ca0bc0 --- /dev/null +++ b/include/asm-arm/arch-pxa/pxa3xx-regs.h | |||
| @@ -0,0 +1,75 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm-arm/arch-pxa/pxa3xx-regs.h | ||
| 3 | * | ||
| 4 | * PXA3xx specific register definitions | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Marvell International Ltd. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARCH_PXA3XX_REGS_H | ||
| 14 | #define __ASM_ARCH_PXA3XX_REGS_H | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Application Subsystem Clock | ||
| 18 | */ | ||
| 19 | #define ACCR __REG(0x41340000) /* Application Subsystem Clock Configuration Register */ | ||
| 20 | #define ACSR __REG(0x41340004) /* Application Subsystem Clock Status Register */ | ||
| 21 | #define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */ | ||
| 22 | #define CKENA __REG(0x4134000C) /* A Clock Enable Register */ | ||
| 23 | #define CKENB __REG(0x41340010) /* B Clock Enable Register */ | ||
| 24 | #define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ | ||
| 25 | |||
| 26 | /* | ||
| 27 | * Clock Enable Bit | ||
| 28 | */ | ||
| 29 | #define CKEN_LCD 1 /* < LCD Clock Enable */ | ||
| 30 | #define CKEN_USBH 2 /* < USB host clock enable */ | ||
| 31 | #define CKEN_CAMERA 3 /* < Camera interface clock enable */ | ||
| 32 | #define CKEN_NAND 4 /* < NAND Flash Controller Clock Enable */ | ||
| 33 | #define CKEN_USB2 6 /* < USB 2.0 client clock enable. */ | ||
| 34 | #define CKEN_DMC 8 /* < Dynamic Memory Controller clock enable */ | ||
| 35 | #define CKEN_SMC 9 /* < Static Memory Controller clock enable */ | ||
| 36 | #define CKEN_ISC 10 /* < Internal SRAM Controller clock enable */ | ||
| 37 | #define CKEN_BOOT 11 /* < Boot rom clock enable */ | ||
| 38 | #define CKEN_MMC1 12 /* < MMC1 Clock enable */ | ||
| 39 | #define CKEN_MMC2 13 /* < MMC2 clock enable */ | ||
| 40 | #define CKEN_KEYPAD 14 /* < Keypand Controller Clock Enable */ | ||
| 41 | #define CKEN_CIR 15 /* < Consumer IR Clock Enable */ | ||
| 42 | #define CKEN_USIM0 17 /* < USIM[0] Clock Enable */ | ||
| 43 | #define CKEN_USIM1 18 /* < USIM[1] Clock Enable */ | ||
| 44 | #define CKEN_TPM 19 /* < TPM clock enable */ | ||
| 45 | #define CKEN_UDC 20 /* < UDC clock enable */ | ||
| 46 | #define CKEN_BTUART 21 /* < BTUART clock enable */ | ||
| 47 | #define CKEN_FFUART 22 /* < FFUART clock enable */ | ||
| 48 | #define CKEN_STUART 23 /* < STUART clock enable */ | ||
| 49 | #define CKEN_AC97 24 /* < AC97 clock enable */ | ||
| 50 | #define CKEN_TOUCH 25 /* < Touch screen Interface Clock Enable */ | ||
| 51 | #define CKEN_SSP1 26 /* < SSP1 clock enable */ | ||
| 52 | #define CKEN_SSP2 27 /* < SSP2 clock enable */ | ||
| 53 | #define CKEN_SSP3 28 /* < SSP3 clock enable */ | ||
| 54 | #define CKEN_SSP4 29 /* < SSP4 clock enable */ | ||
| 55 | #define CKEN_MSL0 30 /* < MSL0 clock enable */ | ||
| 56 | #define CKEN_PWM0 32 /* < PWM[0] clock enable */ | ||
| 57 | #define CKEN_PWM1 33 /* < PWM[1] clock enable */ | ||
| 58 | #define CKEN_I2C 36 /* < I2C clock enable */ | ||
| 59 | #define CKEN_INTC 38 /* < Interrupt controller clock enable */ | ||
| 60 | #define CKEN_GPIO 39 /* < GPIO clock enable */ | ||
| 61 | #define CKEN_1WIRE 40 /* < 1-wire clock enable */ | ||
| 62 | #define CKEN_HSIO2 41 /* < HSIO2 clock enable */ | ||
| 63 | #define CKEN_MINI_IM 48 /* < Mini-IM */ | ||
| 64 | #define CKEN_MINI_LCD 49 /* < Mini LCD */ | ||
| 65 | |||
| 66 | #if defined(CONFIG_CPU_PXA310) | ||
| 67 | #define CKEN_MMC3 5 /* < MMC3 Clock Enable */ | ||
| 68 | #define CKEN_MVED 43 /* < MVED clock enable */ | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */ | ||
| 72 | #define PXA300_CKEN_GRAPHICS 42 /* Graphics controller clock enable */ | ||
| 73 | #define PXA320_CKEN_GRAPHICS 7 /* Graphics controller clock enable */ | ||
| 74 | |||
| 75 | #endif /* __ASM_ARCH_PXA3XX_REGS_H */ | ||
diff --git a/include/asm-arm/arch-pxa/timex.h b/include/asm-arm/arch-pxa/timex.h index 2473bb51d0a6..8d882f0b6a16 100644 --- a/include/asm-arm/arch-pxa/timex.h +++ b/include/asm-arm/arch-pxa/timex.h | |||
| @@ -21,4 +21,6 @@ | |||
| 21 | #else | 21 | #else |
| 22 | #define CLOCK_TICK_RATE 3250000 | 22 | #define CLOCK_TICK_RATE 3250000 |
| 23 | #endif | 23 | #endif |
| 24 | #else | ||
| 25 | #define CLOCK_TICK_RATE 3250000 | ||
| 24 | #endif | 26 | #endif |
diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h new file mode 100644 index 000000000000..f58b59162b82 --- /dev/null +++ b/include/asm-arm/arch-pxa/zylonite.h | |||
| @@ -0,0 +1,35 @@ | |||
| 1 | #ifndef __ASM_ARCH_ZYLONITE_H | ||
| 2 | #define __ASM_ARCH_ZYLONITE_H | ||
| 3 | |||
| 4 | #define ZYLONITE_ETH_PHYS 0x14000000 | ||
| 5 | |||
| 6 | /* the following variables are processor specific and initialized | ||
| 7 | * by the corresponding zylonite_pxa3xx_init() | ||
| 8 | */ | ||
| 9 | extern int gpio_backlight; | ||
| 10 | extern int gpio_eth_irq; | ||
| 11 | |||
| 12 | extern int lcd_id; | ||
| 13 | extern int lcd_orientation; | ||
| 14 | |||
| 15 | #ifdef CONFIG_CPU_PXA300 | ||
| 16 | extern void zylonite_pxa300_init(void); | ||
| 17 | #else | ||
| 18 | static inline void zylonite_pxa300_init(void) | ||
| 19 | { | ||
| 20 | if (cpu_is_pxa300() || cpu_is_pxa310()) | ||
| 21 | panic("%s: PXA300/PXA310 not supported\n", __FUNCTION__); | ||
| 22 | } | ||
| 23 | #endif | ||
| 24 | |||
| 25 | #ifdef CONFIG_CPU_PXA320 | ||
| 26 | extern void zylonite_pxa320_init(void); | ||
| 27 | #else | ||
| 28 | static inline void zylonite_pxa320_init(void) | ||
| 29 | { | ||
| 30 | if (cpu_is_pxa320()) | ||
| 31 | panic("%s: PXA320 not supported\n", __FUNCTION__); | ||
| 32 | } | ||
| 33 | #endif | ||
| 34 | |||
| 35 | #endif /* __ASM_ARCH_ZYLONITE_H */ | ||
diff --git a/include/asm-arm/arch-rpc/uncompress.h b/include/asm-arm/arch-rpc/uncompress.h index 06231ede54e5..b8e29efd8c5b 100644 --- a/include/asm-arm/arch-rpc/uncompress.h +++ b/include/asm-arm/arch-rpc/uncompress.h | |||
| @@ -11,9 +11,11 @@ | |||
| 11 | 11 | ||
| 12 | #include <asm/hardware.h> | 12 | #include <asm/hardware.h> |
| 13 | #include <asm/io.h> | 13 | #include <asm/io.h> |
| 14 | #include <asm/setup.h> | ||
| 15 | #include <asm/page.h> | ||
| 14 | 16 | ||
| 15 | int video_num_columns, video_num_lines, video_size_row; | 17 | int video_size_row; |
| 16 | int white, bytes_per_char_h; | 18 | unsigned char bytes_per_char_h; |
| 17 | extern unsigned long con_charconvtable[256]; | 19 | extern unsigned long con_charconvtable[256]; |
| 18 | 20 | ||
| 19 | struct param_struct { | 21 | struct param_struct { |
| @@ -64,6 +66,13 @@ extern __attribute__((pure)) struct param_struct *params(void); | |||
| 64 | #define params (params()) | 66 | #define params (params()) |
| 65 | 67 | ||
| 66 | #ifndef STANDALONE_DEBUG | 68 | #ifndef STANDALONE_DEBUG |
| 69 | static unsigned long video_num_cols; | ||
| 70 | static unsigned long video_num_rows; | ||
| 71 | static unsigned long video_x; | ||
| 72 | static unsigned long video_y; | ||
| 73 | static unsigned char bytes_per_char_v; | ||
| 74 | static int white; | ||
| 75 | |||
| 67 | /* | 76 | /* |
| 68 | * This does not append a newline | 77 | * This does not append a newline |
| 69 | */ | 78 | */ |
| @@ -73,27 +82,27 @@ static void putc(int c) | |||
| 73 | int x,y; | 82 | int x,y; |
| 74 | char *ptr; | 83 | char *ptr; |
| 75 | 84 | ||
| 76 | x = params->video_x; | 85 | x = video_x; |
| 77 | y = params->video_y; | 86 | y = video_y; |
| 78 | 87 | ||
| 79 | if (c == '\n') { | 88 | if (c == '\n') { |
| 80 | if (++y >= video_num_lines) | 89 | if (++y >= video_num_rows) |
| 81 | y--; | 90 | y--; |
| 82 | } else if (c == '\r') { | 91 | } else if (c == '\r') { |
| 83 | x = 0; | 92 | x = 0; |
| 84 | } else { | 93 | } else { |
| 85 | ptr = VIDMEM + ((y*video_num_columns*params->bytes_per_char_v+x)*bytes_per_char_h); | 94 | ptr = VIDMEM + ((y*video_num_cols*bytes_per_char_v+x)*bytes_per_char_h); |
| 86 | ll_write_char(ptr, c, white); | 95 | ll_write_char(ptr, c, white); |
| 87 | if (++x >= video_num_columns) { | 96 | if (++x >= video_num_cols) { |
| 88 | x = 0; | 97 | x = 0; |
| 89 | if ( ++y >= video_num_lines ) { | 98 | if ( ++y >= video_num_rows ) { |
| 90 | y--; | 99 | y--; |
| 91 | } | 100 | } |
| 92 | } | 101 | } |
| 93 | } | 102 | } |
| 94 | 103 | ||
| 95 | params->video_x = x; | 104 | video_x = x; |
| 96 | params->video_y = y; | 105 | video_y = y; |
| 97 | } | 106 | } |
| 98 | 107 | ||
| 99 | static inline void flush(void) | 108 | static inline void flush(void) |
| @@ -108,11 +117,44 @@ static void error(char *x); | |||
| 108 | static void arch_decomp_setup(void) | 117 | static void arch_decomp_setup(void) |
| 109 | { | 118 | { |
| 110 | int i; | 119 | int i; |
| 120 | struct tag *t = (struct tag *)params; | ||
| 121 | unsigned int nr_pages = 0, page_size = PAGE_SIZE; | ||
| 122 | |||
| 123 | if (t->hdr.tag == ATAG_CORE) | ||
| 124 | { | ||
| 125 | for (; t->hdr.size; t = tag_next(t)) | ||
| 126 | { | ||
| 127 | if (t->hdr.tag == ATAG_VIDEOTEXT) | ||
| 128 | { | ||
| 129 | video_num_rows = t->u.videotext.video_lines; | ||
| 130 | video_num_cols = t->u.videotext.video_cols; | ||
| 131 | bytes_per_char_h = t->u.videotext.video_points; | ||
| 132 | bytes_per_char_v = t->u.videotext.video_points; | ||
| 133 | video_x = t->u.videotext.x; | ||
| 134 | video_y = t->u.videotext.y; | ||
| 135 | } | ||
| 136 | |||
| 137 | if (t->hdr.tag == ATAG_MEM) | ||
| 138 | { | ||
| 139 | page_size = PAGE_SIZE; | ||
| 140 | nr_pages += (t->u.mem.size / PAGE_SIZE); | ||
| 141 | } | ||
| 142 | } | ||
| 143 | } | ||
| 144 | else | ||
| 145 | { | ||
| 146 | nr_pages = params->nr_pages; | ||
| 147 | page_size = params->page_size; | ||
| 148 | video_num_rows = params->video_num_rows; | ||
| 149 | video_num_cols = params->video_num_cols; | ||
| 150 | video_x = params->video_x; | ||
| 151 | video_y = params->video_y; | ||
| 152 | bytes_per_char_h = params->bytes_per_char_h; | ||
| 153 | bytes_per_char_v = params->bytes_per_char_v; | ||
| 154 | } | ||
| 155 | |||
| 156 | video_size_row = video_num_cols * bytes_per_char_h; | ||
| 111 | 157 | ||
| 112 | video_num_lines = params->video_num_rows; | ||
| 113 | video_num_columns = params->video_num_cols; | ||
| 114 | bytes_per_char_h = params->bytes_per_char_h; | ||
| 115 | video_size_row = video_num_columns * bytes_per_char_h; | ||
| 116 | if (bytes_per_char_h == 4) | 158 | if (bytes_per_char_h == 4) |
| 117 | for (i = 0; i < 256; i++) | 159 | for (i = 0; i < 256; i++) |
| 118 | con_charconvtable[i] = | 160 | con_charconvtable[i] = |
| @@ -146,7 +188,7 @@ static void arch_decomp_setup(void) | |||
| 146 | white = 7; | 188 | white = 7; |
| 147 | } | 189 | } |
| 148 | 190 | ||
| 149 | if (params->nr_pages * params->page_size < 4096*1024) error("<4M of mem\n"); | 191 | if (nr_pages * page_size < 4096*1024) error("<4M of mem\n"); |
| 150 | } | 192 | } |
| 151 | #endif | 193 | #endif |
| 152 | 194 | ||
diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 3b49cd1c345c..996f65488d2d 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h | |||
| @@ -112,6 +112,13 @@ | |||
| 112 | #define IRQ_TC S3C2410_IRQSUB(9) | 112 | #define IRQ_TC S3C2410_IRQSUB(9) |
| 113 | #define IRQ_ADC S3C2410_IRQSUB(10) | 113 | #define IRQ_ADC S3C2410_IRQSUB(10) |
| 114 | 114 | ||
| 115 | /* extra irqs for s3c2412 */ | ||
| 116 | |||
| 117 | #define IRQ_S3C2412_CFSDI S3C2410_IRQ(21) | ||
| 118 | |||
| 119 | #define IRQ_S3C2412_SDI S3C2410_IRQSUB(13) | ||
| 120 | #define IRQ_S3C2412_CF S3C2410_IRQSUB(14) | ||
| 121 | |||
| 115 | /* extra irqs for s3c2440 */ | 122 | /* extra irqs for s3c2440 */ |
| 116 | 123 | ||
| 117 | #define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ | 124 | #define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ |
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index dea578b8f7f6..b693158b2d3c 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h | |||
| @@ -1140,10 +1140,16 @@ | |||
| 1140 | 1140 | ||
| 1141 | /* definitions for each pin bit */ | 1141 | /* definitions for each pin bit */ |
| 1142 | #define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) | 1142 | #define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) |
| 1143 | #define S3C2412_SLPCON_HI(x) ( 0x01 << ((x) * 2)) | 1143 | #define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) |
| 1144 | #define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) | 1144 | #define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) |
| 1145 | #define S3C2412_SLPCON_PDWN(x) ( 0x03 << ((x) * 2)) | 1145 | #define S3C2412_SLPCON_PULL(x) ( 0x03 << ((x) * 2)) |
| 1146 | #define S3C2412_SLPCON_EINT(x) ( 0x02 << ((x) * 2)) /* only IRQ pins */ | ||
| 1146 | #define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) | 1147 | #define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) |
| 1147 | 1148 | ||
| 1149 | #define S3C2412_SLPCON_ALL_LOW (0x0) | ||
| 1150 | #define S3C2412_SLPCON_ALL_HIGH (0x11111111 | 0x44444444) | ||
| 1151 | #define S3C2412_SLPCON_ALL_IN (0x22222222 | 0x88888888) | ||
| 1152 | #define S3C2412_SLPCON_ALL_PULL (0x33333333) | ||
| 1153 | |||
| 1148 | #endif /* __ASM_ARCH_REGS_GPIO_H */ | 1154 | #endif /* __ASM_ARCH_REGS_GPIO_H */ |
| 1149 | 1155 | ||
diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h index 94ff96505b6a..f79987be55e8 100644 --- a/include/asm-arm/arch-s3c2410/regs-power.h +++ b/include/asm-arm/arch-s3c2410/regs-power.h | |||
| @@ -18,6 +18,11 @@ | |||
| 18 | #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) | 18 | #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) |
| 19 | #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) | 19 | #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) |
| 20 | 20 | ||
| 21 | #define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) | ||
| 22 | #define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) | ||
| 23 | #define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) | ||
| 24 | #define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) | ||
| 25 | |||
| 21 | #define S3C2412_PWRCFG_BATF_IGNORE (0<<0) | 26 | #define S3C2412_PWRCFG_BATF_IGNORE (0<<0) |
| 22 | #define S3C2412_PWRCFG_BATF_SLEEP (3<<0) | 27 | #define S3C2412_PWRCFG_BATF_SLEEP (3<<0) |
| 23 | #define S3C2412_PWRCFG_BATF_MASK (3<<0) | 28 | #define S3C2412_PWRCFG_BATF_MASK (3<<0) |
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h index 8ca6a3bc8555..783b18f5bcea 100644 --- a/include/asm-arm/arch-s3c2410/regs-s3c2412.h +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h | |||
| @@ -17,5 +17,7 @@ | |||
| 17 | #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) | 17 | #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) |
| 18 | #define S3C2412_SWRST_RESET (0x533C2412) | 18 | #define S3C2412_SWRST_RESET (0x533C2412) |
| 19 | 19 | ||
| 20 | /* see regs-power.h for the other registers in the power block. */ | ||
| 21 | |||
| 20 | #endif /* __ASM_ARCH_REGS_S3C2412_H */ | 22 | #endif /* __ASM_ARCH_REGS_S3C2412_H */ |
| 21 | 23 | ||
diff --git a/include/asm-arm/arch-sa1100/SA-1101.h b/include/asm-arm/arch-sa1100/SA-1101.h index 527d887f1ee3..65ca8c79e6d2 100644 --- a/include/asm-arm/arch-sa1100/SA-1101.h +++ b/include/asm-arm/arch-sa1100/SA-1101.h | |||
| @@ -106,7 +106,7 @@ | |||
| 106 | #define SMCR_ColAdrBits( x ) /* col. addr bits 8..11 */ \ | 106 | #define SMCR_ColAdrBits( x ) /* col. addr bits 8..11 */ \ |
| 107 | (( (x) - 8 ) << FShft (SMCR_DCAC)) | 107 | (( (x) - 8 ) << FShft (SMCR_DCAC)) |
| 108 | #define SMCR_RowAdrBits( x ) /* row addr bits 9..12 */\ | 108 | #define SMCR_RowAdrBits( x ) /* row addr bits 9..12 */\ |
| 109 | (( (x) - 9 ) << FShft (SMCR_DRAC) | 109 | (( (x) - 9 ) << FShft (SMCR_DRAC)) |
| 110 | 110 | ||
| 111 | #define SNPR_VFBstart Fld(12,0) /* Video frame buffer addr */ | 111 | #define SNPR_VFBstart Fld(12,0) /* Video frame buffer addr */ |
| 112 | #define SNPR_VFBsize Fld(11,12) /* Video frame buffer size */ | 112 | #define SNPR_VFBsize Fld(11,12) /* Video frame buffer size */ |
| @@ -394,7 +394,7 @@ | |||
| 394 | #define VgaStatus (*((volatile Word *) SA1101_p2v (_VgaStatus))) | 394 | #define VgaStatus (*((volatile Word *) SA1101_p2v (_VgaStatus))) |
| 395 | #define VgaInterruptMask (*((volatile Word *) SA1101_p2v (_VgaInterruptMask))) | 395 | #define VgaInterruptMask (*((volatile Word *) SA1101_p2v (_VgaInterruptMask))) |
| 396 | #define VgaPalette (*((volatile Word *) SA1101_p2v (_VgaPalette))) | 396 | #define VgaPalette (*((volatile Word *) SA1101_p2v (_VgaPalette))) |
| 397 | #define DacControl (*((volatile Word *) SA1101_p2v (_DacControl)) | 397 | #define DacControl (*((volatile Word *) SA1101_p2v (_DacControl))) |
| 398 | #define VgaTest (*((volatile Word *) SA1101_p2v (_VgaTest))) | 398 | #define VgaTest (*((volatile Word *) SA1101_p2v (_VgaTest))) |
| 399 | 399 | ||
| 400 | #define VideoControl_VgaEn 0x00000000 | 400 | #define VideoControl_VgaEn 0x00000000 |
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index c8b5d0db0cf0..678134bf2475 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | * platforms with CONFIG_DMABOUNCE. | 17 | * platforms with CONFIG_DMABOUNCE. |
| 18 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | 18 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) |
| 19 | */ | 19 | */ |
| 20 | extern void consistent_sync(const void *kaddr, size_t size, int rw); | 20 | extern void dma_cache_maint(const void *kaddr, size_t size, int rw); |
| 21 | 21 | ||
| 22 | /* | 22 | /* |
| 23 | * Return whether the given device DMA address mask can be supported | 23 | * Return whether the given device DMA address mask can be supported |
| @@ -165,7 +165,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size, | |||
| 165 | enum dma_data_direction dir) | 165 | enum dma_data_direction dir) |
| 166 | { | 166 | { |
| 167 | if (!arch_is_coherent()) | 167 | if (!arch_is_coherent()) |
| 168 | consistent_sync(cpu_addr, size, dir); | 168 | dma_cache_maint(cpu_addr, size, dir); |
| 169 | 169 | ||
| 170 | return virt_to_dma(dev, (unsigned long)cpu_addr); | 170 | return virt_to_dma(dev, (unsigned long)cpu_addr); |
| 171 | } | 171 | } |
| @@ -278,7 +278,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
| 278 | virt = page_address(sg->page) + sg->offset; | 278 | virt = page_address(sg->page) + sg->offset; |
| 279 | 279 | ||
| 280 | if (!arch_is_coherent()) | 280 | if (!arch_is_coherent()) |
| 281 | consistent_sync(virt, sg->length, dir); | 281 | dma_cache_maint(virt, sg->length, dir); |
| 282 | } | 282 | } |
| 283 | 283 | ||
| 284 | return nents; | 284 | return nents; |
| @@ -334,7 +334,7 @@ dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, | |||
| 334 | enum dma_data_direction dir) | 334 | enum dma_data_direction dir) |
| 335 | { | 335 | { |
| 336 | if (!arch_is_coherent()) | 336 | if (!arch_is_coherent()) |
| 337 | consistent_sync((void *)dma_to_virt(dev, handle), size, dir); | 337 | dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | static inline void | 340 | static inline void |
| @@ -342,7 +342,7 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, | |||
| 342 | enum dma_data_direction dir) | 342 | enum dma_data_direction dir) |
| 343 | { | 343 | { |
| 344 | if (!arch_is_coherent()) | 344 | if (!arch_is_coherent()) |
| 345 | consistent_sync((void *)dma_to_virt(dev, handle), size, dir); | 345 | dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); |
| 346 | } | 346 | } |
| 347 | #else | 347 | #else |
| 348 | extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); | 348 | extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); |
| @@ -373,7 +373,7 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, | |||
| 373 | for (i = 0; i < nents; i++, sg++) { | 373 | for (i = 0; i < nents; i++, sg++) { |
| 374 | char *virt = page_address(sg->page) + sg->offset; | 374 | char *virt = page_address(sg->page) + sg->offset; |
| 375 | if (!arch_is_coherent()) | 375 | if (!arch_is_coherent()) |
| 376 | consistent_sync(virt, sg->length, dir); | 376 | dma_cache_maint(virt, sg->length, dir); |
| 377 | } | 377 | } |
| 378 | } | 378 | } |
| 379 | 379 | ||
| @@ -386,7 +386,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, | |||
| 386 | for (i = 0; i < nents; i++, sg++) { | 386 | for (i = 0; i < nents; i++, sg++) { |
| 387 | char *virt = page_address(sg->page) + sg->offset; | 387 | char *virt = page_address(sg->page) + sg->offset; |
| 388 | if (!arch_is_coherent()) | 388 | if (!arch_is_coherent()) |
| 389 | consistent_sync(virt, sg->length, dir); | 389 | dma_cache_maint(virt, sg->length, dir); |
| 390 | } | 390 | } |
| 391 | } | 391 | } |
| 392 | #else | 392 | #else |
diff --git a/include/asm-arm/hardware/it8152.h b/include/asm-arm/hardware/it8152.h new file mode 100644 index 000000000000..aaebb61aca48 --- /dev/null +++ b/include/asm-arm/hardware/it8152.h | |||
| @@ -0,0 +1,99 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/arm/hardware/it8152.h | ||
| 3 | * | ||
| 4 | * Copyright Compulab Ltd., 2006,2007 | ||
| 5 | * Mike Rapoport <mike@compulab.co.il> | ||
| 6 | * | ||
| 7 | * ITE 8152 companion chip register definitions | ||
| 8 | */ | ||
| 9 | |||
| 10 | #ifndef __ASM_HARDWARE_IT8152_H | ||
| 11 | #define __ASM_HARDWARE_IT8152_H | ||
| 12 | extern unsigned long it8152_base_address; | ||
| 13 | |||
| 14 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) | ||
| 15 | #define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) | ||
| 16 | |||
| 17 | #define __REG_IT8152(x) (it8152_base_address + (x)) | ||
| 18 | |||
| 19 | #define IT8152_PCI_CFG_ADDR __REG_IT8152(0x3f00800) | ||
| 20 | #define IT8152_PCI_CFG_DATA __REG_IT8152(0x3f00804) | ||
| 21 | |||
| 22 | #define IT8152_INTC_LDCNIRR __REG_IT8152(0x3f00300) | ||
| 23 | #define IT8152_INTC_LDPNIRR __REG_IT8152(0x3f00304) | ||
| 24 | #define IT8152_INTC_LDCNIMR __REG_IT8152(0x3f00308) | ||
| 25 | #define IT8152_INTC_LDPNIMR __REG_IT8152(0x3f0030C) | ||
| 26 | #define IT8152_INTC_LDNITR __REG_IT8152(0x3f00310) | ||
| 27 | #define IT8152_INTC_LDNIAR __REG_IT8152(0x3f00314) | ||
| 28 | #define IT8152_INTC_LPCNIRR __REG_IT8152(0x3f00320) | ||
| 29 | #define IT8152_INTC_LPPNIRR __REG_IT8152(0x3f00324) | ||
| 30 | #define IT8152_INTC_LPCNIMR __REG_IT8152(0x3f00328) | ||
| 31 | #define IT8152_INTC_LPPNIMR __REG_IT8152(0x3f0032C) | ||
| 32 | #define IT8152_INTC_LPNITR __REG_IT8152(0x3f00330) | ||
| 33 | #define IT8152_INTC_LPNIAR __REG_IT8152(0x3f00334) | ||
| 34 | #define IT8152_INTC_PDCNIRR __REG_IT8152(0x3f00340) | ||
| 35 | #define IT8152_INTC_PDPNIRR __REG_IT8152(0x3f00344) | ||
| 36 | #define IT8152_INTC_PDCNIMR __REG_IT8152(0x3f00348) | ||
| 37 | #define IT8152_INTC_PDPNIMR __REG_IT8152(0x3f0034C) | ||
| 38 | #define IT8152_INTC_PDNITR __REG_IT8152(0x3f00350) | ||
| 39 | #define IT8152_INTC_PDNIAR __REG_IT8152(0x3f00354) | ||
| 40 | #define IT8152_INTC_INTC_TYPER __REG_IT8152(0x3f003FC) | ||
| 41 | |||
| 42 | #define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500) | ||
| 43 | |||
| 44 | /* | ||
| 45 | Interrup contoler per register summary: | ||
| 46 | --------------------------------------- | ||
| 47 | LCDNIRR: | ||
| 48 | IT8152_LD_IRQ(8) PCICLK stop | ||
| 49 | IT8152_LD_IRQ(7) MCLK ready | ||
| 50 | IT8152_LD_IRQ(6) s/w | ||
| 51 | IT8152_LD_IRQ(5) UART | ||
| 52 | IT8152_LD_IRQ(4) GPIO | ||
| 53 | IT8152_LD_IRQ(3) TIMER 4 | ||
| 54 | IT8152_LD_IRQ(2) TIMER 3 | ||
| 55 | IT8152_LD_IRQ(1) TIMER 2 | ||
| 56 | IT8152_LD_IRQ(0) TIMER 1 | ||
| 57 | |||
| 58 | LPCNIRR: | ||
| 59 | IT8152_LP_IRQ(x) serial IRQ x | ||
| 60 | |||
| 61 | PCIDNIRR: | ||
| 62 | IT8152_PD_IRQ(14) PCISERR | ||
| 63 | IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR) | ||
| 64 | IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR) | ||
| 65 | IT8152_PD_IRQ(11) PCI INTD | ||
| 66 | IT8152_PD_IRQ(10) PCI INTC | ||
| 67 | IT8152_PD_IRQ(9) PCI INTB | ||
| 68 | IT8152_PD_IRQ(8) PCI INTA | ||
| 69 | IT8152_PD_IRQ(7) serial INTD | ||
| 70 | IT8152_PD_IRQ(6) serial INTC | ||
| 71 | IT8152_PD_IRQ(5) serial INTB | ||
| 72 | IT8152_PD_IRQ(4) serial INTA | ||
| 73 | IT8152_PD_IRQ(3) serial IRQ IOCHK (IOCHKR) | ||
| 74 | IT8152_PD_IRQ(2) chaining DMA (CDMAR) | ||
| 75 | IT8152_PD_IRQ(1) USB (USBR) | ||
| 76 | IT8152_PD_IRQ(0) Audio controller (ACR) | ||
| 77 | */ | ||
| 78 | /* frequently used interrupts */ | ||
| 79 | #define IT8152_PCISERR IT8152_PD_IRQ(14) | ||
| 80 | #define IT8152_H2PTADR IT8152_PD_IRQ(13) | ||
| 81 | #define IT8152_H2PMAR IT8152_PD_IRQ(12) | ||
| 82 | #define IT8152_PCI_INTD IT8152_PD_IRQ(11) | ||
| 83 | #define IT8152_PCI_INTC IT8152_PD_IRQ(10) | ||
| 84 | #define IT8152_PCI_INTB IT8152_PD_IRQ(9) | ||
| 85 | #define IT8152_PCI_INTA IT8152_PD_IRQ(8) | ||
| 86 | #define IT8152_CDMA_INT IT8152_PD_IRQ(2) | ||
| 87 | #define IT8152_USB_INT IT8152_PD_IRQ(1) | ||
| 88 | #define IT8152_AUDIO_INT IT8152_PD_IRQ(0) | ||
| 89 | |||
| 90 | struct pci_dev; | ||
| 91 | struct pci_sys_data; | ||
| 92 | |||
| 93 | extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc); | ||
| 94 | extern void it8152_init_irq(void); | ||
| 95 | extern int it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin); | ||
| 96 | extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); | ||
| 97 | extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys); | ||
| 98 | |||
| 99 | #endif /* __ASM_HARDWARE_IT8152_H */ | ||
diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h index b5b030ef633d..46dcc4d0b9bd 100644 --- a/include/asm-arm/kexec.h +++ b/include/asm-arm/kexec.h | |||
| @@ -14,6 +14,8 @@ | |||
| 14 | 14 | ||
| 15 | #define KEXEC_ARCH KEXEC_ARCH_ARM | 15 | #define KEXEC_ARCH KEXEC_ARCH_ARM |
| 16 | 16 | ||
| 17 | #define KEXEC_BOOT_PARAMS_SIZE 1536 | ||
| 18 | |||
| 17 | #ifndef __ASSEMBLY__ | 19 | #ifndef __ASSEMBLY__ |
| 18 | 20 | ||
| 19 | struct kimage; | 21 | struct kimage; |
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index ed3f898191f4..75feb1574a69 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h | |||
| @@ -8,10 +8,17 @@ | |||
| 8 | 8 | ||
| 9 | #define pcibios_scan_all_fns(a, b) 0 | 9 | #define pcibios_scan_all_fns(a, b) 0 |
| 10 | 10 | ||
| 11 | #ifdef CONFIG_PCI_HOST_ITE8152 | ||
| 12 | /* ITE bridge requires setting latency timer to avoid early bus access | ||
| 13 | termination by PIC bus mater devices | ||
| 14 | */ | ||
| 15 | extern void pcibios_set_master(struct pci_dev *dev); | ||
| 16 | #else | ||
| 11 | static inline void pcibios_set_master(struct pci_dev *dev) | 17 | static inline void pcibios_set_master(struct pci_dev *dev) |
| 12 | { | 18 | { |
| 13 | /* No special bus mastering setup handling */ | 19 | /* No special bus mastering setup handling */ |
| 14 | } | 20 | } |
| 21 | #endif | ||
| 15 | 22 | ||
| 16 | static inline void pcibios_penalize_isa_irq(int irq, int active) | 23 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
| 17 | { | 24 | { |
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index d327b25c986c..88e868b7aae0 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h | |||
| @@ -378,6 +378,7 @@ | |||
| 378 | #define __NR_signalfd (__NR_SYSCALL_BASE+349) | 378 | #define __NR_signalfd (__NR_SYSCALL_BASE+349) |
| 379 | #define __NR_timerfd (__NR_SYSCALL_BASE+350) | 379 | #define __NR_timerfd (__NR_SYSCALL_BASE+350) |
| 380 | #define __NR_eventfd (__NR_SYSCALL_BASE+351) | 380 | #define __NR_eventfd (__NR_SYSCALL_BASE+351) |
| 381 | #define __NR_fallocate (__NR_SYSCALL_BASE+352) | ||
| 381 | 382 | ||
| 382 | /* | 383 | /* |
| 383 | * The following SWIs are ARM private. | 384 | * The following SWIs are ARM private. |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 2aaf1c16ce98..2c49561f9b45 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
| @@ -1636,6 +1636,7 @@ | |||
| 1636 | #define PCI_DEVICE_ID_ITE_8211 0x8211 | 1636 | #define PCI_DEVICE_ID_ITE_8211 0x8211 |
| 1637 | #define PCI_DEVICE_ID_ITE_8212 0x8212 | 1637 | #define PCI_DEVICE_ID_ITE_8212 0x8212 |
| 1638 | #define PCI_DEVICE_ID_ITE_8213 0x8213 | 1638 | #define PCI_DEVICE_ID_ITE_8213 0x8213 |
| 1639 | #define PCI_DEVICE_ID_ITE_8152 0x8152 | ||
| 1639 | #define PCI_DEVICE_ID_ITE_8872 0x8872 | 1640 | #define PCI_DEVICE_ID_ITE_8872 0x8872 |
| 1640 | #define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 | 1641 | #define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 |
| 1641 | 1642 | ||