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-rw-r--r--arch/arm/mach-omap1/fpga.c10
-rw-r--r--include/asm-arm/arch-omap/board-2430sdp.h5
-rw-r--r--include/asm-arm/arch-omap/board-h3.h6
-rw-r--r--include/asm-arm/arch-omap/board-innovator.h3
-rw-r--r--include/asm-arm/arch-omap/board-perseus2.h6
-rw-r--r--include/asm-arm/arch-omap/fpga.h49
-rw-r--r--include/asm-arm/arch-omap/irqs.h44
7 files changed, 64 insertions, 59 deletions
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 30e188109046..0cf62ef5ecb7 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -32,7 +32,7 @@
32 32
33static void fpga_mask_irq(unsigned int irq) 33static void fpga_mask_irq(unsigned int irq)
34{ 34{
35 irq -= OMAP1510_IH_FPGA_BASE; 35 irq -= OMAP_FPGA_IRQ_BASE;
36 36
37 if (irq < 8) 37 if (irq < 8)
38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) 38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -65,7 +65,7 @@ static void fpga_ack_irq(unsigned int irq)
65 65
66static void fpga_unmask_irq(unsigned int irq) 66static void fpga_unmask_irq(unsigned int irq)
67{ 67{
68 irq -= OMAP1510_IH_FPGA_BASE; 68 irq -= OMAP_FPGA_IRQ_BASE;
69 69
70 if (irq < 8) 70 if (irq < 8)
71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), 71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -95,8 +95,8 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
95 if (!stat) 95 if (!stat)
96 return; 96 return;
97 97
98 for (fpga_irq = OMAP1510_IH_FPGA_BASE; 98 for (fpga_irq = OMAP_FPGA_IRQ_BASE;
99 (fpga_irq < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS)) && stat; 99 (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
100 fpga_irq++, stat >>= 1) { 100 fpga_irq++, stat >>= 1) {
101 if (stat & 1) { 101 if (stat & 1) {
102 d = irq_desc + fpga_irq; 102 d = irq_desc + fpga_irq;
@@ -151,7 +151,7 @@ void omap1510_fpga_init_irq(void)
151 __raw_writeb(0, OMAP1510_FPGA_IMR_HI); 151 __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
152 __raw_writeb(0, INNOVATOR_FPGA_IMR2); 152 __raw_writeb(0, INNOVATOR_FPGA_IMR2);
153 153
154 for (i = OMAP1510_IH_FPGA_BASE; i < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS); i++) { 154 for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
155 155
156 if (i == OMAP1510_INT_FPGA_TS) { 156 if (i == OMAP1510_INT_FPGA_TS) {
157 /* 157 /*
diff --git a/include/asm-arm/arch-omap/board-2430sdp.h b/include/asm-arm/arch-omap/board-2430sdp.h
index e9c65ce3cb12..c7db9004ec31 100644
--- a/include/asm-arm/arch-omap/board-2430sdp.h
+++ b/include/asm-arm/arch-omap/board-2430sdp.h
@@ -36,9 +36,4 @@
36 36
37#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ 37#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ
38 38
39/* TWL4030 Primary Interrupt Handler (PIH) interrupts */
40#define IH_TWL4030_BASE IH_BOARD_BASE
41#define IH_TWL4030_END (IH_TWL4030_BASE+8)
42#define NR_IRQS (IH_TWL4030_END)
43
44#endif /* __ASM_ARCH_OMAP_2430SDP_H */ 39#endif /* __ASM_ARCH_OMAP_2430SDP_H */
diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h
index 0f6404435ea8..c5d0f32a40ac 100644
--- a/include/asm-arm/arch-omap/board-h3.h
+++ b/include/asm-arm/arch-omap/board-h3.h
@@ -30,12 +30,6 @@
30/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ 30/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
31#define OMAP1710_ETHR_START 0x04000300 31#define OMAP1710_ETHR_START 0x04000300
32 32
33#define MAXIRQNUM (IH_BOARD_BASE)
34#define MAXFIQNUM MAXIRQNUM
35#define MAXSWINUM MAXIRQNUM
36
37#define NR_IRQS (MAXIRQNUM + 1)
38
39extern void h3_mmc_init(void); 33extern void h3_mmc_init(void);
40extern void h3_mmc_slot_cover_handler(void *arg, int state); 34extern void h3_mmc_slot_cover_handler(void *arg, int state);
41 35
diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h
index 56d2c98e143c..9ca03dec9d36 100644
--- a/include/asm-arm/arch-omap/board-innovator.h
+++ b/include/asm-arm/arch-omap/board-innovator.h
@@ -36,9 +36,6 @@
36#define OMAP1510P1_EMIFS_PRI_VALUE 0x00 36#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
37#define OMAP1510P1_EMIFF_PRI_VALUE 0x00 37#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
38 38
39#define NR_FPGA_IRQS 24
40#define NR_IRQS (IH_BOARD_BASE + NR_FPGA_IRQS)
41
42#ifndef __ASSEMBLY__ 39#ifndef __ASSEMBLY__
43void fpga_write(unsigned char val, int reg); 40void fpga_write(unsigned char val, int reg);
44unsigned char fpga_read(int reg); 41unsigned char fpga_read(int reg);
diff --git a/include/asm-arm/arch-omap/board-perseus2.h b/include/asm-arm/arch-omap/board-perseus2.h
index eb74420cb439..d7429cb0f726 100644
--- a/include/asm-arm/arch-omap/board-perseus2.h
+++ b/include/asm-arm/arch-omap/board-perseus2.h
@@ -36,10 +36,4 @@
36#define OMAP_SDRAM_DEVICE D256M_1X16_4B 36#define OMAP_SDRAM_DEVICE D256M_1X16_4B
37#endif 37#endif
38 38
39#define MAXIRQNUM IH_BOARD_BASE
40#define MAXFIQNUM MAXIRQNUM
41#define MAXSWINUM MAXIRQNUM
42
43#define NR_IRQS (MAXIRQNUM + 1)
44
45#endif 39#endif
diff --git a/include/asm-arm/arch-omap/fpga.h b/include/asm-arm/arch-omap/fpga.h
index 6a883e0bdbb8..f420881d2a3b 100644
--- a/include/asm-arm/arch-omap/fpga.h
+++ b/include/asm-arm/arch-omap/fpga.h
@@ -169,30 +169,29 @@ struct h2p2_dbg_fpga {
169#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) 169#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13)
170 170
171/* IRQ Numbers for interrupts muxed through the FPGA */ 171/* IRQ Numbers for interrupts muxed through the FPGA */
172#define OMAP1510_IH_FPGA_BASE IH_BOARD_BASE 172#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0)
173#define OMAP1510_INT_FPGA_ATN (OMAP1510_IH_FPGA_BASE + 0) 173#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1)
174#define OMAP1510_INT_FPGA_ACK (OMAP1510_IH_FPGA_BASE + 1) 174#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2)
175#define OMAP1510_INT_FPGA2 (OMAP1510_IH_FPGA_BASE + 2) 175#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3)
176#define OMAP1510_INT_FPGA3 (OMAP1510_IH_FPGA_BASE + 3) 176#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4)
177#define OMAP1510_INT_FPGA4 (OMAP1510_IH_FPGA_BASE + 4) 177#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5)
178#define OMAP1510_INT_FPGA5 (OMAP1510_IH_FPGA_BASE + 5) 178#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6)
179#define OMAP1510_INT_FPGA6 (OMAP1510_IH_FPGA_BASE + 6) 179#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7)
180#define OMAP1510_INT_FPGA7 (OMAP1510_IH_FPGA_BASE + 7) 180#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8)
181#define OMAP1510_INT_FPGA8 (OMAP1510_IH_FPGA_BASE + 8) 181#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9)
182#define OMAP1510_INT_FPGA9 (OMAP1510_IH_FPGA_BASE + 9) 182#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10)
183#define OMAP1510_INT_FPGA10 (OMAP1510_IH_FPGA_BASE + 10) 183#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11)
184#define OMAP1510_INT_FPGA11 (OMAP1510_IH_FPGA_BASE + 11) 184#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12)
185#define OMAP1510_INT_FPGA12 (OMAP1510_IH_FPGA_BASE + 12) 185#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13)
186#define OMAP1510_INT_ETHER (OMAP1510_IH_FPGA_BASE + 13) 186#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14)
187#define OMAP1510_INT_FPGAUART1 (OMAP1510_IH_FPGA_BASE + 14) 187#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15)
188#define OMAP1510_INT_FPGAUART2 (OMAP1510_IH_FPGA_BASE + 15) 188#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16)
189#define OMAP1510_INT_FPGA_TS (OMAP1510_IH_FPGA_BASE + 16) 189#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17)
190#define OMAP1510_INT_FPGA17 (OMAP1510_IH_FPGA_BASE + 17) 190#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18)
191#define OMAP1510_INT_FPGA_CAM (OMAP1510_IH_FPGA_BASE + 18) 191#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19)
192#define OMAP1510_INT_FPGA_RTC_A (OMAP1510_IH_FPGA_BASE + 19) 192#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20)
193#define OMAP1510_INT_FPGA_RTC_B (OMAP1510_IH_FPGA_BASE + 20) 193#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21)
194#define OMAP1510_INT_FPGA_CD (OMAP1510_IH_FPGA_BASE + 21) 194#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22)
195#define OMAP1510_INT_FPGA22 (OMAP1510_IH_FPGA_BASE + 22) 195#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23)
196#define OMAP1510_INT_FPGA23 (OMAP1510_IH_FPGA_BASE + 23)
197 196
198#endif 197#endif
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 87973654e625..7464c694859b 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -285,7 +285,41 @@
285#define OMAP_MAX_GPIO_LINES 192 285#define OMAP_MAX_GPIO_LINES 192
286#define IH_GPIO_BASE (128 + IH2_BASE) 286#define IH_GPIO_BASE (128 + IH2_BASE)
287#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) 287#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
288#define IH_BOARD_BASE (16 + IH_MPUIO_BASE) 288#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
289
290/* External FPGA handles interrupts on Innovator boards */
291#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
292#ifdef CONFIG_MACH_OMAP_INNOVATOR
293#define OMAP_FPGA_NR_IRQS 24
294#else
295#define OMAP_FPGA_NR_IRQS 0
296#endif
297#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
298
299/* External TWL4030 can handle interrupts on 2430 and 34xx boards */
300#define TWL4030_IRQ_BASE (OMAP_FPGA_IRQ_END)
301#ifdef CONFIG_TWL4030_CORE
302#define TWL4030_BASE_NR_IRQS 8
303#define TWL4030_PWR_NR_IRQS 8
304#else
305#define TWL4030_BASE_NR_IRQS 0
306#define TWL4030_PWR_NR_IRQS 0
307#endif
308#define TWL4030_IRQ_END (TWL4030_IRQ_BASE + TWL4030_BASE_NR_IRQS)
309#define TWL4030_PWR_IRQ_BASE TWL4030_IRQ_END
310#define TWL4030_PWR_IRQ_END (TWL4030_PWR_IRQ_BASE + TWL4030_PWR_NR_IRQS)
311
312/* External TWL4030 gpio interrupts are optional */
313#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
314#ifdef CONFIG_TWL4030_GPIO
315#define TWL4030_GPIO_NR_IRQS 18
316#else
317#define TWL4030_GPIO_NR_IRQS 0
318#endif
319#define TWL4030_GPIO_IRQ_END (TWL4030_GPIO_IRQ_BASE + TWL4030_GPIO_NR_IRQS)
320
321/* Total number of interrupts depends on the enabled blocks above */
322#define NR_IRQS TWL4030_GPIO_IRQ_END
289 323
290#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 324#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
291 325
@@ -293,14 +327,6 @@
293extern void omap_init_irq(void); 327extern void omap_init_irq(void);
294#endif 328#endif
295 329
296/*
297 * The definition of NR_IRQS is in board-specific header file, which is
298 * included via hardware.h
299 */
300#include <asm/hardware.h> 330#include <asm/hardware.h>
301 331
302#ifndef NR_IRQS
303#define NR_IRQS IH_BOARD_BASE
304#endif
305
306#endif 332#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 04:28:39 -0500