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-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma-register.h22
1 files changed, 5 insertions, 17 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h
index 1af4a9587fe3..02788b6a03b7 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-register.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h
@@ -30,27 +30,15 @@
30#define CHCR_TS_LOW_SHIFT 3 30#define CHCR_TS_LOW_SHIFT 3
31#define CHCR_TS_HIGH_MASK 0x00300000 31#define CHCR_TS_HIGH_MASK 0x00300000
32#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ 32#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */
33#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 33#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7764) 34 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
35#define CHCR_TS_LOW_MASK 0x00000018 35 defined(CONFIG_CPU_SUBTYPE_SH7764) || \
36#define CHCR_TS_LOW_SHIFT 3 36 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
37#define CHCR_TS_HIGH_MASK 0 37 defined(CONFIG_CPU_SUBTYPE_SH7785)
38#define CHCR_TS_HIGH_SHIFT 0
39#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
40#define CHCR_TS_LOW_MASK 0x00000018 38#define CHCR_TS_LOW_MASK 0x00000018
41#define CHCR_TS_LOW_SHIFT 3 39#define CHCR_TS_LOW_SHIFT 3
42#define CHCR_TS_HIGH_MASK 0x00100000 40#define CHCR_TS_HIGH_MASK 0x00100000
43#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ 41#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */
44#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
45#define CHCR_TS_LOW_MASK 0x00000018
46#define CHCR_TS_LOW_SHIFT 3
47#define CHCR_TS_HIGH_MASK 0
48#define CHCR_TS_HIGH_SHIFT 0
49#else /* SH7785 */
50#define CHCR_TS_LOW_MASK 0x00000018
51#define CHCR_TS_LOW_SHIFT 3
52#define CHCR_TS_HIGH_MASK 0
53#define CHCR_TS_HIGH_SHIFT 0
54#endif 42#endif
55 43
56/* Transmit sizes and respective CHCR register values */ 44/* Transmit sizes and respective CHCR register values */