7 files changed, 28 insertions, 34 deletions

diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 2a34aaf3c8f1..33120100ff5e 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -48,9 +48,20 @@ int x86_acpi_suspend_lowlevel(void)
 #ifndef CONFIG_64BIT
         native_store_gdt((struct desc_ptr *)&header->pmode_gdt);
 
+        /*
+         * We have to check that we can write back the value, and not
+         * just read it.  At least on 90 nm Pentium M (Family 6, Model
+         * 13), reading an invalid MSR is not guaranteed to trap, see
+         * Erratum X4 in "Intel Pentium M Processor on 90 nm Process
+         * with 2-MB L2 Cache and Intel® Processor A100 and A110 on 90
+         * nm process with 512-KB L2 Cache Specification Update".
+         */
         if (!rdmsr_safe(MSR_EFER,
                         &header->pmode_efer_low,
-                        &header->pmode_efer_high))
+                        &header->pmode_efer_high) &&
+            !wrmsr_safe(MSR_EFER,
+                        header->pmode_efer_low,
+                        header->pmode_efer_high))
                 header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER);
 #endif /* !CONFIG_64BIT */
 
@@ -61,7 +72,10 @@ int x86_acpi_suspend_lowlevel(void)
         }
         if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
                         &header->pmode_misc_en_low,
-                        &header->pmode_misc_en_high))
+                        &header->pmode_misc_en_high) &&
+            !wrmsr_safe(MSR_IA32_MISC_ENABLE,
+                        header->pmode_misc_en_low,
+                        header->pmode_misc_en_high))
                 header->pmode_behavior |=
                         (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE);
         header->realmode_flags = acpi_realmode_flags;
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8a5c40..e1aabdb314c8 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -512,21 +512,6 @@ ENTRY(phys_base)
 
 #include "../../x86/xen/xen-head.S"
         
-        .section .bss, "aw", @nobits
-        .align L1_CACHE_BYTES
-ENTRY(idt_table)
-        .skip IDT_ENTRIES * 16
-
-        .align L1_CACHE_BYTES
-ENTRY(debug_idt_table)
-        .skip IDT_ENTRIES * 16
-
-#ifdef CONFIG_TRACING
-        .align L1_CACHE_BYTES
-ENTRY(trace_idt_table)
-        .skip IDT_ENTRIES * 16
-#endif
-
         __PAGE_ALIGNED_BSS
 NEXT_PAGE(empty_zero_page)
         .skip PAGE_SIZE
diff --git a/arch/x86/kernel/tracepoint.c b/arch/x86/kernel/tracepoint.c
index 4e584a8d6edd..1c113db9ed57 100644
--- a/arch/x86/kernel/tracepoint.c
+++ b/arch/x86/kernel/tracepoint.c
@@ -12,10 +12,8 @@ atomic_t trace_idt_ctr = ATOMIC_INIT(0);
 struct desc_ptr trace_idt_descr = { NR_VECTORS * 16 - 1,
                                 (unsigned long) trace_idt_table };
 
-#ifndef CONFIG_X86_64
-gate_desc trace_idt_table[NR_VECTORS] __page_aligned_data
-                                        = { { { { 0, 0 } } }, };
-#endif
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;
 
 static int trace_irq_vector_refcount;
 static DEFINE_MUTEX(irq_vector_mutex);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e88d3cc..1b23a1c92746 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -63,19 +63,19 @@
 #include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
+
+/* No need to be aligned, but done to keep all IDTs defined the same way. */
+gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
 
 asmlinkage int system_call(void);
-
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
-gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
 #endif
 
+/* Must be page-aligned because the real IDT is used in a fixmap. */
+gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
+
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
 EXPORT_SYMBOL_GPL(used_vectors);
 
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index baec704231b3..643b8b5eee86 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/serial_reg.h>
 #include <linux/serial_8250.h>
+#include <linux/reboot.h>
 
 #include <asm/ce4100.h>
 #include <asm/prom.h>
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index c8d5577044bb..90f6ed127096 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -931,13 +931,6 @@ void __init efi_enter_virtual_mode(void)
                         va = efi_ioremap(md->phys_addr, size,
                                          md->type, md->attribute);
 
-                if (!(md->attribute & EFI_MEMORY_RUNTIME)) {
-                        if (!va)
-                                pr_err("ioremap of 0x%llX failed!\n",
-                                       (unsigned long long)md->phys_addr);
-                        continue;
-                }
-
                 md->virt_addr = (u64) (unsigned long) va;
 
                 if (!va) {
diff --git a/drivers/firmware/efi/efivars.c b/drivers/firmware/efi/efivars.c
index 8bd1bb6dbe47..8a7432a4b413 100644
--- a/drivers/firmware/efi/efivars.c
+++ b/drivers/firmware/efi/efivars.c
@@ -583,6 +583,9 @@ int efivars_sysfs_init(void)
         struct kobject *parent_kobj = efivars_kobject();
         int error = 0;
 
+        if (!efi_enabled(EFI_RUNTIME_SERVICES))
+                return -ENODEV;
+
         /* No efivars has been registered yet */
         if (!parent_kobj)
                 return 0;