diff options
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 823b8d99d9e6..c675f9f27d9c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1158,12 +1158,15 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, | |||
1158 | 1158 | ||
1159 | reg = TRANSCONF(pipe); | 1159 | reg = TRANSCONF(pipe); |
1160 | val = I915_READ(reg); | 1160 | val = I915_READ(reg); |
1161 | /* | 1161 | |
1162 | * make the BPC in transcoder be consistent with | 1162 | if (HAS_PCH_IBX(dev_priv->dev)) { |
1163 | * that in pipeconf reg. | 1163 | /* |
1164 | */ | 1164 | * make the BPC in transcoder be consistent with |
1165 | val &= ~PIPE_BPC_MASK; | 1165 | * that in pipeconf reg. |
1166 | val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK; | 1166 | */ |
1167 | val &= ~PIPE_BPC_MASK; | ||
1168 | val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK; | ||
1169 | } | ||
1167 | I915_WRITE(reg, val | TRANS_ENABLE); | 1170 | I915_WRITE(reg, val | TRANS_ENABLE); |
1168 | if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100)) | 1171 | if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100)) |
1169 | DRM_ERROR("failed to enable transcoder %d\n", pipe); | 1172 | DRM_ERROR("failed to enable transcoder %d\n", pipe); |