diff options
-rw-r--r-- | arch/x86/kernel/apic_32.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index 35a568ea8400..6aa93db7faa3 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c | |||
@@ -621,6 +621,35 @@ int setup_profiling_timer(unsigned int multiplier) | |||
621 | } | 621 | } |
622 | 622 | ||
623 | /* | 623 | /* |
624 | * Setup extended LVT, AMD specific (K8, family 10h) | ||
625 | * | ||
626 | * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and | ||
627 | * MCE interrupts are supported. Thus MCE offset must be set to 0. | ||
628 | */ | ||
629 | |||
630 | #define APIC_EILVT_LVTOFF_MCE 0 | ||
631 | #define APIC_EILVT_LVTOFF_IBS 1 | ||
632 | |||
633 | static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask) | ||
634 | { | ||
635 | unsigned long reg = (lvt_off << 4) + APIC_EILVT0; | ||
636 | unsigned int v = (mask << 16) | (msg_type << 8) | vector; | ||
637 | apic_write(reg, v); | ||
638 | } | ||
639 | |||
640 | u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask) | ||
641 | { | ||
642 | setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type, mask); | ||
643 | return APIC_EILVT_LVTOFF_MCE; | ||
644 | } | ||
645 | |||
646 | u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask) | ||
647 | { | ||
648 | setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type, mask); | ||
649 | return APIC_EILVT_LVTOFF_IBS; | ||
650 | } | ||
651 | |||
652 | /* | ||
624 | * Local APIC start and shutdown | 653 | * Local APIC start and shutdown |
625 | */ | 654 | */ |
626 | 655 | ||