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-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe.h25
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c153
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c77
3 files changed, 96 insertions, 159 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 1f4a4caeb00e..38940d72991d 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -301,26 +301,29 @@ struct ixgbe_ring_container {
301 */ 301 */
302struct ixgbe_q_vector { 302struct ixgbe_q_vector {
303 struct ixgbe_adapter *adapter; 303 struct ixgbe_adapter *adapter;
304 unsigned int v_idx; /* index of q_vector within array, also used for
305 * finding the bit in EICR and friends that
306 * represents the vector for this ring */
307#ifdef CONFIG_IXGBE_DCA 304#ifdef CONFIG_IXGBE_DCA
308 int cpu; /* CPU for DCA */ 305 int cpu; /* CPU for DCA */
309#endif 306#endif
310 struct napi_struct napi; 307 u16 v_idx; /* index of q_vector within array, also used for
308 * finding the bit in EICR and friends that
309 * represents the vector for this ring */
310 u16 itr; /* Interrupt throttle rate written to EITR */
311 struct ixgbe_ring_container rx, tx; 311 struct ixgbe_ring_container rx, tx;
312 u32 eitr; 312
313 struct napi_struct napi;
313 cpumask_var_t affinity_mask; 314 cpumask_var_t affinity_mask;
314 char name[IFNAMSIZ + 9]; 315 char name[IFNAMSIZ + 9];
315}; 316};
316 317
317/* Helper macros to switch between ints/sec and what the register uses. 318/*
318 * And yes, it's the same math going both ways. The lowest value 319 * microsecond values for various ITR rates shifted by 2 to fit itr register
319 * supported by all of the ixgbe hardware is 8. 320 * with the first 3 bits reserved 0
320 */ 321 */
321#define EITR_INTS_PER_SEC_TO_REG(_eitr) \ 322#define IXGBE_MIN_RSC_ITR 24
322 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8) 323#define IXGBE_100K_ITR 40
323#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG 324#define IXGBE_20K_ITR 200
325#define IXGBE_10K_ITR 400
326#define IXGBE_8K_ITR 500
324 327
325static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring) 328static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring)
326{ 329{
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index debcf5f350c7..ae9fba5d3036 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -2026,39 +2026,20 @@ static int ixgbe_get_coalesce(struct net_device *netdev,
2026 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit; 2026 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2027 2027
2028 /* only valid if in constant ITR mode */ 2028 /* only valid if in constant ITR mode */
2029 switch (adapter->rx_itr_setting) { 2029 if (adapter->rx_itr_setting <= 1)
2030 case 0: 2030 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2031 /* throttling disabled */ 2031 else
2032 ec->rx_coalesce_usecs = 0; 2032 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2033 break;
2034 case 1:
2035 /* dynamic ITR mode */
2036 ec->rx_coalesce_usecs = 1;
2037 break;
2038 default:
2039 /* fixed interrupt rate mode */
2040 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2041 break;
2042 }
2043 2033
2044 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2034 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2045 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2035 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2046 return 0; 2036 return 0;
2047 2037
2048 /* only valid if in constant ITR mode */ 2038 /* only valid if in constant ITR mode */
2049 switch (adapter->tx_itr_setting) { 2039 if (adapter->tx_itr_setting <= 1)
2050 case 0: 2040 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2051 /* throttling disabled */ 2041 else
2052 ec->tx_coalesce_usecs = 0; 2042 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2053 break;
2054 case 1:
2055 /* dynamic ITR mode */
2056 ec->tx_coalesce_usecs = 1;
2057 break;
2058 default:
2059 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2060 break;
2061 }
2062 2043
2063 return 0; 2044 return 0;
2064} 2045}
@@ -2077,10 +2058,9 @@ static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2077 2058
2078 /* if interrupt rate is too high then disable RSC */ 2059 /* if interrupt rate is too high then disable RSC */
2079 if (ec->rx_coalesce_usecs != 1 && 2060 if (ec->rx_coalesce_usecs != 1 &&
2080 ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) { 2061 ec->rx_coalesce_usecs <= (IXGBE_MIN_RSC_ITR >> 2)) {
2081 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2062 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2082 e_info(probe, "rx-usecs set too low, " 2063 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2083 "disabling RSC\n");
2084 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2064 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2085 return true; 2065 return true;
2086 } 2066 }
@@ -2088,8 +2068,7 @@ static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2088 /* check the feature flag value and enable RSC if necessary */ 2068 /* check the feature flag value and enable RSC if necessary */
2089 if ((netdev->features & NETIF_F_LRO) && 2069 if ((netdev->features & NETIF_F_LRO) &&
2090 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2070 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2091 e_info(probe, "rx-usecs set to %d, " 2071 e_info(probe, "rx-usecs set to %d, re-enabling RSC\n",
2092 "re-enabling RSC\n",
2093 ec->rx_coalesce_usecs); 2072 ec->rx_coalesce_usecs);
2094 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2073 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2095 return true; 2074 return true;
@@ -2104,97 +2083,59 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
2104 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2083 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2105 struct ixgbe_q_vector *q_vector; 2084 struct ixgbe_q_vector *q_vector;
2106 int i; 2085 int i;
2086 int num_vectors;
2087 u16 tx_itr_param, rx_itr_param;
2107 bool need_reset = false; 2088 bool need_reset = false;
2108 2089
2109 /* don't accept tx specific changes if we've got mixed RxTx vectors */ 2090 /* don't accept tx specific changes if we've got mixed RxTx vectors */
2110 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count 2091 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2111 && ec->tx_coalesce_usecs) 2092 && ec->tx_coalesce_usecs)
2112 return -EINVAL; 2093 return -EINVAL;
2113 2094
2114 if (ec->tx_max_coalesced_frames_irq) 2095 if (ec->tx_max_coalesced_frames_irq)
2115 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq; 2096 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2116 2097
2117 if (ec->rx_coalesce_usecs > 1) { 2098 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2118 /* check the limits */ 2099 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2119 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) || 2100 return -EINVAL;
2120 (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2121 return -EINVAL;
2122
2123 /* check the old value and enable RSC if necessary */
2124 need_reset = ixgbe_update_rsc(adapter, ec);
2125
2126 /* store the value in ints/second */
2127 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2128 2101
2129 /* static value of interrupt rate */ 2102 /* check the old value and enable RSC if necessary */
2130 adapter->rx_itr_setting = adapter->rx_eitr_param; 2103 need_reset = ixgbe_update_rsc(adapter, ec);
2131 /* clear the lower bit as its used for dynamic state */
2132 adapter->rx_itr_setting &= ~1;
2133 } else if (ec->rx_coalesce_usecs == 1) {
2134 /* check the old value and enable RSC if necessary */
2135 need_reset = ixgbe_update_rsc(adapter, ec);
2136 2104
2137 /* 1 means dynamic mode */ 2105 if (ec->rx_coalesce_usecs > 1)
2138 adapter->rx_eitr_param = 20000; 2106 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2139 adapter->rx_itr_setting = 1; 2107 else
2140 } else { 2108 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2141 /* check the old value and enable RSC if necessary */
2142 need_reset = ixgbe_update_rsc(adapter, ec);
2143 /*
2144 * any other value means disable eitr, which is best
2145 * served by setting the interrupt rate very high
2146 */
2147 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2148 adapter->rx_itr_setting = 0;
2149 }
2150 2109
2151 if (ec->tx_coalesce_usecs > 1) { 2110 if (adapter->rx_itr_setting == 1)
2152 /* 2111 rx_itr_param = IXGBE_20K_ITR;
2153 * don't have to worry about max_int as above because 2112 else
2154 * tx vectors don't do hardware RSC (an rx function) 2113 rx_itr_param = adapter->rx_itr_setting;
2155 */
2156 /* check the limits */
2157 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2158 (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2159 return -EINVAL;
2160 2114
2161 /* store the value in ints/second */ 2115 if (ec->tx_coalesce_usecs > 1)
2162 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs; 2116 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2117 else
2118 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2163 2119
2164 /* static value of interrupt rate */ 2120 if (adapter->tx_itr_setting == 1)
2165 adapter->tx_itr_setting = adapter->tx_eitr_param; 2121 tx_itr_param = IXGBE_10K_ITR;
2122 else
2123 tx_itr_param = adapter->tx_itr_setting;
2166 2124
2167 /* clear the lower bit as its used for dynamic state */ 2125 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2168 adapter->tx_itr_setting &= ~1; 2126 num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2169 } else if (ec->tx_coalesce_usecs == 1) { 2127 else
2170 /* 1 means dynamic mode */ 2128 num_vectors = 1;
2171 adapter->tx_eitr_param = 10000;
2172 adapter->tx_itr_setting = 1;
2173 } else {
2174 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2175 adapter->tx_itr_setting = 0;
2176 }
2177 2129
2178 /* MSI/MSIx Interrupt Mode */ 2130 for (i = 0; i < num_vectors; i++) {
2179 if (adapter->flags & 2131 q_vector = adapter->q_vector[i];
2180 (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2181 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2182 for (i = 0; i < num_vectors; i++) {
2183 q_vector = adapter->q_vector[i];
2184 if (q_vector->tx.count && !q_vector->rx.count)
2185 /* tx only */
2186 q_vector->eitr = adapter->tx_eitr_param;
2187 else
2188 /* rx only or mixed */
2189 q_vector->eitr = adapter->rx_eitr_param;
2190 q_vector->tx.work_limit = adapter->tx_work_limit;
2191 ixgbe_write_eitr(q_vector);
2192 }
2193 /* Legacy Interrupt Mode */
2194 } else {
2195 q_vector = adapter->q_vector[0];
2196 q_vector->eitr = adapter->rx_eitr_param;
2197 q_vector->tx.work_limit = adapter->tx_work_limit; 2132 q_vector->tx.work_limit = adapter->tx_work_limit;
2133 if (q_vector->tx.count && !q_vector->rx.count)
2134 /* tx only */
2135 q_vector->itr = tx_itr_param;
2136 else
2137 /* rx only or mixed */
2138 q_vector->itr = rx_itr_param;
2198 ixgbe_write_eitr(q_vector); 2139 ixgbe_write_eitr(q_vector);
2199 } 2140 }
2200 2141
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index c26ea9437fed..3594b09f4993 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -1500,12 +1500,19 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1500 for (ring = q_vector->tx.ring; ring != NULL; ring = ring->next) 1500 for (ring = q_vector->tx.ring; ring != NULL; ring = ring->next)
1501 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx); 1501 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1502 1502
1503 if (q_vector->tx.ring && !q_vector->rx.ring) 1503 if (q_vector->tx.ring && !q_vector->rx.ring) {
1504 /* tx only */ 1504 /* tx only vector */
1505 q_vector->eitr = adapter->tx_eitr_param; 1505 if (adapter->tx_itr_setting == 1)
1506 else if (q_vector->rx.ring) 1506 q_vector->itr = IXGBE_10K_ITR;
1507 /* rx or mixed */ 1507 else
1508 q_vector->eitr = adapter->rx_eitr_param; 1508 q_vector->itr = adapter->tx_itr_setting;
1509 } else {
1510 /* rx or rx/tx vector */
1511 if (adapter->rx_itr_setting == 1)
1512 q_vector->itr = IXGBE_20K_ITR;
1513 else
1514 q_vector->itr = adapter->rx_itr_setting;
1515 }
1509 1516
1510 ixgbe_write_eitr(q_vector); 1517 ixgbe_write_eitr(q_vector);
1511 } 1518 }
@@ -1519,7 +1526,6 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1519 case ixgbe_mac_X540: 1526 case ixgbe_mac_X540:
1520 ixgbe_set_ivar(adapter, -1, 1, v_idx); 1527 ixgbe_set_ivar(adapter, -1, 1, v_idx);
1521 break; 1528 break;
1522
1523 default: 1529 default:
1524 break; 1530 break;
1525 } 1531 }
@@ -1527,12 +1533,10 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1527 1533
1528 /* set up to autoclear timer, and the vectors */ 1534 /* set up to autoclear timer, and the vectors */
1529 mask = IXGBE_EIMS_ENABLE_MASK; 1535 mask = IXGBE_EIMS_ENABLE_MASK;
1530 if (adapter->num_vfs) 1536 mask &= ~(IXGBE_EIMS_OTHER |
1531 mask &= ~(IXGBE_EIMS_OTHER | 1537 IXGBE_EIMS_MAILBOX |
1532 IXGBE_EIMS_MAILBOX | 1538 IXGBE_EIMS_LSC);
1533 IXGBE_EIMS_LSC); 1539
1534 else
1535 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
1536 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); 1540 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1537} 1541}
1538 1542
@@ -1577,7 +1581,7 @@ static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
1577 * 100-1249MB/s bulk (8000 ints/s) 1581 * 100-1249MB/s bulk (8000 ints/s)
1578 */ 1582 */
1579 /* what was last interrupt timeslice? */ 1583 /* what was last interrupt timeslice? */
1580 timepassed_us = 1000000/q_vector->eitr; 1584 timepassed_us = q_vector->itr >> 2;
1581 bytes_perint = bytes / timepassed_us; /* bytes/usec */ 1585 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1582 1586
1583 switch (itr_setting) { 1587 switch (itr_setting) {
@@ -1618,7 +1622,7 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1618 struct ixgbe_adapter *adapter = q_vector->adapter; 1622 struct ixgbe_adapter *adapter = q_vector->adapter;
1619 struct ixgbe_hw *hw = &adapter->hw; 1623 struct ixgbe_hw *hw = &adapter->hw;
1620 int v_idx = q_vector->v_idx; 1624 int v_idx = q_vector->v_idx;
1621 u32 itr_reg = EITR_INTS_PER_SEC_TO_REG(q_vector->eitr); 1625 u32 itr_reg = q_vector->itr;
1622 1626
1623 switch (adapter->hw.mac.type) { 1627 switch (adapter->hw.mac.type) {
1624 case ixgbe_mac_82598EB: 1628 case ixgbe_mac_82598EB:
@@ -1628,15 +1632,6 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1628 case ixgbe_mac_82599EB: 1632 case ixgbe_mac_82599EB:
1629 case ixgbe_mac_X540: 1633 case ixgbe_mac_X540:
1630 /* 1634 /*
1631 * 82599 and X540 can support a value of zero, so allow it for
1632 * max interrupt rate, but there is an errata where it can
1633 * not be zero with RSC
1634 */
1635 if (itr_reg == 8 &&
1636 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
1637 itr_reg = 0;
1638
1639 /*
1640 * set the WDIS bit to not clear the timer bits and cause an 1635 * set the WDIS bit to not clear the timer bits and cause an
1641 * immediate assertion of the interrupt 1636 * immediate assertion of the interrupt
1642 */ 1637 */
@@ -1650,7 +1645,7 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
1650 1645
1651static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector) 1646static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
1652{ 1647{
1653 u32 new_itr = q_vector->eitr; 1648 u32 new_itr = q_vector->itr;
1654 u8 current_itr; 1649 u8 current_itr;
1655 1650
1656 ixgbe_update_itr(q_vector, &q_vector->tx); 1651 ixgbe_update_itr(q_vector, &q_vector->tx);
@@ -1661,24 +1656,25 @@ static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
1661 switch (current_itr) { 1656 switch (current_itr) {
1662 /* counts and packets in update_itr are dependent on these numbers */ 1657 /* counts and packets in update_itr are dependent on these numbers */
1663 case lowest_latency: 1658 case lowest_latency:
1664 new_itr = 100000; 1659 new_itr = IXGBE_100K_ITR;
1665 break; 1660 break;
1666 case low_latency: 1661 case low_latency:
1667 new_itr = 20000; /* aka hwitr = ~200 */ 1662 new_itr = IXGBE_20K_ITR;
1668 break; 1663 break;
1669 case bulk_latency: 1664 case bulk_latency:
1670 new_itr = 8000; 1665 new_itr = IXGBE_8K_ITR;
1671 break; 1666 break;
1672 default: 1667 default:
1673 break; 1668 break;
1674 } 1669 }
1675 1670
1676 if (new_itr != q_vector->eitr) { 1671 if (new_itr != q_vector->itr) {
1677 /* do an exponential smoothing */ 1672 /* do an exponential smoothing */
1678 new_itr = ((q_vector->eitr * 9) + new_itr)/10; 1673 new_itr = (10 * new_itr * q_vector->itr) /
1674 ((9 * new_itr) + q_vector->itr);
1679 1675
1680 /* save the algorithm value here */ 1676 /* save the algorithm value here */
1681 q_vector->eitr = new_itr; 1677 q_vector->itr = new_itr & IXGBE_MAX_EITR;
1682 1678
1683 ixgbe_write_eitr(q_vector); 1679 ixgbe_write_eitr(q_vector);
1684 } 1680 }
@@ -2301,10 +2297,15 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2301 **/ 2297 **/
2302static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) 2298static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2303{ 2299{
2304 struct ixgbe_hw *hw = &adapter->hw; 2300 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2305 2301
2306 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), 2302 /* rx/tx vector */
2307 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr_param)); 2303 if (adapter->rx_itr_setting == 1)
2304 q_vector->itr = IXGBE_20K_ITR;
2305 else
2306 q_vector->itr = adapter->rx_itr_setting;
2307
2308 ixgbe_write_eitr(q_vector);
2308 2309
2309 ixgbe_set_ivar(adapter, 0, 0, 0); 2310 ixgbe_set_ivar(adapter, 0, 0, 0);
2310 ixgbe_set_ivar(adapter, 1, 0, 0); 2311 ixgbe_set_ivar(adapter, 1, 0, 0);
@@ -4613,12 +4614,6 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
4613 if (!alloc_cpumask_var(&q_vector->affinity_mask, GFP_KERNEL)) 4614 if (!alloc_cpumask_var(&q_vector->affinity_mask, GFP_KERNEL))
4614 goto err_out; 4615 goto err_out;
4615 cpumask_set_cpu(v_idx, q_vector->affinity_mask); 4616 cpumask_set_cpu(v_idx, q_vector->affinity_mask);
4616
4617 if (q_vector->tx.count && !q_vector->rx.count)
4618 q_vector->eitr = adapter->tx_eitr_param;
4619 else
4620 q_vector->eitr = adapter->rx_eitr_param;
4621
4622 netif_napi_add(adapter->netdev, &q_vector->napi, 4617 netif_napi_add(adapter->netdev, &q_vector->napi,
4623 ixgbe_poll, 64); 4618 ixgbe_poll, 64);
4624 adapter->q_vector[v_idx] = q_vector; 4619 adapter->q_vector[v_idx] = q_vector;
@@ -4864,9 +4859,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4864 4859
4865 /* enable itr by default in dynamic mode */ 4860 /* enable itr by default in dynamic mode */
4866 adapter->rx_itr_setting = 1; 4861 adapter->rx_itr_setting = 1;
4867 adapter->rx_eitr_param = 20000;
4868 adapter->tx_itr_setting = 1; 4862 adapter->tx_itr_setting = 1;
4869 adapter->tx_eitr_param = 10000;
4870 4863
4871 /* set defaults for eitr in MegaBytes */ 4864 /* set defaults for eitr in MegaBytes */
4872 adapter->eitr_low = 10; 4865 adapter->eitr_low = 10;
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-02 15:47:35 -0500