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-rw-r--r--include/asm-x86/tlbflush.h157
-rw-r--r--include/asm-x86/tlbflush_32.h148
-rw-r--r--include/asm-x86/tlbflush_64.h140
3 files changed, 155 insertions, 290 deletions
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
index 9af4cc83a1af..3998709ed637 100644
--- a/include/asm-x86/tlbflush.h
+++ b/include/asm-x86/tlbflush.h
@@ -1,5 +1,158 @@
1#ifndef _ASM_X86_TLBFLUSH_H
2#define _ASM_X86_TLBFLUSH_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6
7#include <asm/processor.h>
8#include <asm/system.h>
9
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
12#else
13#define __flush_tlb() __native_flush_tlb()
14#define __flush_tlb_global() __native_flush_tlb_global()
15#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
16#endif
17
18static inline void __native_flush_tlb(void)
19{
20 write_cr3(read_cr3());
21}
22
23static inline void __native_flush_tlb_global(void)
24{
25 unsigned long cr4 = read_cr4();
26
27 /* clear PGE */
28 write_cr4(cr4 & ~X86_CR4_PGE);
29 /* write old PGE again and flush TLBs */
30 write_cr4(cr4);
31}
32
33static inline void __native_flush_tlb_single(unsigned long addr)
34{
35 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory");
36}
37
38static inline void __flush_tlb_all(void)
39{
40 if (cpu_has_pge)
41 __flush_tlb_global();
42 else
43 __flush_tlb();
44}
45
46static inline void __flush_tlb_one(unsigned long addr)
47{
48 if (cpu_has_invlpg)
49 __flush_tlb_single(addr);
50 else
51 __flush_tlb();
52}
53
1#ifdef CONFIG_X86_32 54#ifdef CONFIG_X86_32
2# include "tlbflush_32.h" 55# define TLB_FLUSH_ALL 0xffffffff
3#else 56#else
4# include "tlbflush_64.h" 57# define TLB_FLUSH_ALL -1ULL
58#endif
59
60/*
61 * TLB flushing:
62 *
63 * - flush_tlb() flushes the current mm struct TLBs
64 * - flush_tlb_all() flushes all processes TLBs
65 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
66 * - flush_tlb_page(vma, vmaddr) flushes one page
67 * - flush_tlb_range(vma, start, end) flushes a range of pages
68 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
69 * - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus
70 *
71 * ..but the i386 has somewhat limited tlb flushing capabilities,
72 * and page-granular flushes are available only on i486 and up.
73 *
74 * x86-64 can only flush individual pages or full VMs. For a range flush
75 * we always do the full VM. Might be worth trying if for a small
76 * range a few INVLPGs in a row are a win.
77 */
78
79#ifndef CONFIG_SMP
80
81#define flush_tlb() __flush_tlb()
82#define flush_tlb_all() __flush_tlb_all()
83#define local_flush_tlb() __flush_tlb()
84
85static inline void flush_tlb_mm(struct mm_struct *mm)
86{
87 if (mm == current->active_mm)
88 __flush_tlb();
89}
90
91static inline void flush_tlb_page(struct vm_area_struct *vma,
92 unsigned long addr)
93{
94 if (vma->vm_mm == current->active_mm)
95 __flush_tlb_one(addr);
96}
97
98static inline void flush_tlb_range(struct vm_area_struct *vma,
99 unsigned long start, unsigned long end)
100{
101 if (vma->vm_mm == current->active_mm)
102 __flush_tlb();
103}
104
105static inline void native_flush_tlb_others(const cpumask_t *cpumask,
106 struct mm_struct *mm,
107 unsigned long va)
108{
109}
110
111#else /* SMP */
112
113#include <asm/smp.h>
114
115#define local_flush_tlb() __flush_tlb()
116
117extern void flush_tlb_all(void);
118extern void flush_tlb_current_task(void);
119extern void flush_tlb_mm(struct mm_struct *);
120extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
121
122#define flush_tlb() flush_tlb_current_task()
123
124static inline void flush_tlb_range(struct vm_area_struct *vma,
125 unsigned long start, unsigned long end)
126{
127 flush_tlb_mm(vma->vm_mm);
128}
129
130void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
131 unsigned long va);
132
133#define TLBSTATE_OK 1
134#define TLBSTATE_LAZY 2
135
136#ifdef CONFIG_X86_32
137struct tlb_state
138{
139 struct mm_struct *active_mm;
140 int state;
141 char __cacheline_padding[L1_CACHE_BYTES-8];
142};
143DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
144#endif
145
146#endif /* SMP */
147
148#ifndef CONFIG_PARAVIRT
149#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va)
5#endif 150#endif
151
152static inline void flush_tlb_kernel_range(unsigned long start,
153 unsigned long end)
154{
155 flush_tlb_all();
156}
157
158#endif /* _ASM_X86_TLBFLUSH_H */
diff --git a/include/asm-x86/tlbflush_32.h b/include/asm-x86/tlbflush_32.h
deleted file mode 100644
index 9e07cc8f2d94..000000000000
--- a/include/asm-x86/tlbflush_32.h
+++ /dev/null
@@ -1,148 +0,0 @@
1#ifndef _X86_TLBFLUSH_H
2#define _X86_TLBFLUSH_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6
7#include <asm/processor.h>
8#include <asm/system.h>
9
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
12#else
13#define __flush_tlb() __native_flush_tlb()
14#define __flush_tlb_global() __native_flush_tlb_global()
15#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
16#endif
17
18static inline void __native_flush_tlb(void)
19{
20 write_cr3(read_cr3());
21}
22
23static inline void __native_flush_tlb_global(void)
24{
25 unsigned long cr4 = read_cr4();
26
27 /* clear PGE */
28 write_cr4(cr4 & ~X86_CR4_PGE);
29 /* write old PGE again and flush TLBs */
30 write_cr4(cr4);
31}
32
33static inline void __native_flush_tlb_single(unsigned long addr)
34{
35 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory");
36}
37
38static inline void __flush_tlb_all(void)
39{
40 if (cpu_has_pge)
41 __flush_tlb_global();
42 else
43 __flush_tlb();
44}
45
46static inline void __flush_tlb_one(unsigned long addr)
47{
48 if (cpu_has_invlpg)
49 __flush_tlb_single(addr);
50 else
51 __flush_tlb();
52}
53
54/*
55 * TLB flushing:
56 *
57 * - flush_tlb() flushes the current mm struct TLBs
58 * - flush_tlb_all() flushes all processes TLBs
59 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
60 * - flush_tlb_page(vma, vmaddr) flushes one page
61 * - flush_tlb_range(vma, start, end) flushes a range of pages
62 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
63 * - flush_tlb_others(cpumask, mm, va) flushes a TLBs on other cpus
64 *
65 * ..but the i386 has somewhat limited tlb flushing capabilities,
66 * and page-granular flushes are available only on i486 and up.
67 */
68
69#define TLB_FLUSH_ALL 0xffffffff
70
71#ifndef CONFIG_SMP
72
73#define flush_tlb() __flush_tlb()
74#define flush_tlb_all() __flush_tlb_all()
75#define local_flush_tlb() __flush_tlb()
76
77static inline void flush_tlb_mm(struct mm_struct *mm)
78{
79 if (mm == current->active_mm)
80 __flush_tlb();
81}
82
83static inline void flush_tlb_page(struct vm_area_struct *vma,
84 unsigned long addr)
85{
86 if (vma->vm_mm == current->active_mm)
87 __flush_tlb_one(addr);
88}
89
90static inline void flush_tlb_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end)
92{
93 if (vma->vm_mm == current->active_mm)
94 __flush_tlb();
95}
96
97static inline void native_flush_tlb_others(const cpumask_t *cpumask,
98 struct mm_struct *mm,
99 unsigned long va)
100{
101}
102
103#else /* SMP */
104
105#include <asm/smp.h>
106
107#define local_flush_tlb() __flush_tlb()
108
109extern void flush_tlb_all(void);
110extern void flush_tlb_current_task(void);
111extern void flush_tlb_mm(struct mm_struct *);
112extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
113
114#define flush_tlb() flush_tlb_current_task()
115
116static inline void flush_tlb_range(struct vm_area_struct *vma,
117 unsigned long start, unsigned long end)
118{
119 flush_tlb_mm(vma->vm_mm);
120}
121
122void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
123 unsigned long va);
124
125#define TLBSTATE_OK 1
126#define TLBSTATE_LAZY 2
127
128struct tlb_state
129{
130 struct mm_struct *active_mm;
131 int state;
132 char __cacheline_padding[L1_CACHE_BYTES-8];
133};
134DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
135
136#endif /* SMP */
137
138#ifndef CONFIG_PARAVIRT
139#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va)
140#endif
141
142static inline void flush_tlb_kernel_range(unsigned long start,
143 unsigned long end)
144{
145 flush_tlb_all();
146}
147
148#endif /* _X86_TLBFLUSH_H */
diff --git a/include/asm-x86/tlbflush_64.h b/include/asm-x86/tlbflush_64.h
deleted file mode 100644
index 0bed440ba9fe..000000000000
--- a/include/asm-x86/tlbflush_64.h
+++ /dev/null
@@ -1,140 +0,0 @@
1#ifndef _X86_TLBFLUSH_H
2#define _X86_TLBFLUSH_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6
7#include <asm/processor.h>
8#include <asm/system.h>
9
10#ifdef CONFIG_PARAVIRT
11#include <asm/paravirt.h>
12#else
13#define __flush_tlb() __native_flush_tlb()
14#define __flush_tlb_global() __native_flush_tlb_global()
15#define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
16#endif
17
18static inline void __native_flush_tlb(void)
19{
20 write_cr3(read_cr3());
21}
22
23static inline void __native_flush_tlb_global(void)
24{
25 unsigned long cr4 = read_cr4();
26
27 /* clear PGE */
28 write_cr4(cr4 & ~X86_CR4_PGE);
29 /* write old PGE again and flush TLBs */
30 write_cr4(cr4);
31}
32
33static inline void __native_flush_tlb_single(unsigned long addr)
34{
35 __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory");
36}
37
38static inline void __flush_tlb_all(void)
39{
40 if (cpu_has_pge)
41 __flush_tlb_global();
42 else
43 __flush_tlb();
44}
45
46static inline void __flush_tlb_one(unsigned long addr)
47{
48 if (cpu_has_invlpg)
49 __flush_tlb_single(addr);
50 else
51 __flush_tlb();
52}
53
54/*
55 * TLB flushing:
56 *
57 * - flush_tlb() flushes the current mm struct TLBs
58 * - flush_tlb_all() flushes all processes TLBs
59 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
60 * - flush_tlb_page(vma, vmaddr) flushes one page
61 * - flush_tlb_range(vma, start, end) flushes a range of pages
62 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
63 *
64 * x86-64 can only flush individual pages or full VMs. For a range flush
65 * we always do the full VM. Might be worth trying if for a small
66 * range a few INVLPGs in a row are a win.
67 */
68
69#define TLB_FLUSH_ALL -1ULL
70
71#ifndef CONFIG_SMP
72
73#define flush_tlb() __flush_tlb()
74#define flush_tlb_all() __flush_tlb_all()
75#define local_flush_tlb() __flush_tlb()
76
77static inline void flush_tlb_mm(struct mm_struct *mm)
78{
79 if (mm == current->active_mm)
80 __flush_tlb();
81}
82
83static inline void flush_tlb_page(struct vm_area_struct *vma,
84 unsigned long addr)
85{
86 if (vma->vm_mm == current->active_mm)
87 __flush_tlb_one(addr);
88}
89
90static inline void flush_tlb_range(struct vm_area_struct *vma,
91 unsigned long start, unsigned long end)
92{
93 if (vma->vm_mm == current->active_mm)
94 __flush_tlb();
95}
96
97static inline void native_flush_tlb_others(const cpumask_t *cpumask,
98 struct mm_struct *mm,
99 unsigned long va)
100{
101}
102
103#else /* SMP */
104
105#include <asm/smp.h>
106
107#define local_flush_tlb() __flush_tlb()
108
109extern void flush_tlb_all(void);
110extern void flush_tlb_current_task(void);
111extern void flush_tlb_mm(struct mm_struct *);
112extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
113
114#define flush_tlb() flush_tlb_current_task()
115
116static inline void flush_tlb_range(struct vm_area_struct *vma,
117 unsigned long start, unsigned long end)
118{
119 flush_tlb_mm(vma->vm_mm);
120}
121
122void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,
123 unsigned long va);
124
125#define TLBSTATE_OK 1
126#define TLBSTATE_LAZY 2
127
128#endif /* SMP */
129
130#ifndef CONFIG_PARAVIRT
131#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va)
132#endif
133
134static inline void flush_tlb_kernel_range(unsigned long start,
135 unsigned long end)
136{
137 flush_tlb_all();
138}
139
140#endif /* _X86_TLBFLUSH_H */
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 15:10:18 -0500