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-rw-r--r--drivers/scsi/isci/Makefile1
-rw-r--r--drivers/scsi/isci/core/sci_util.c1
-rw-r--r--drivers/scsi/isci/core/scic_config_parameters.h38
-rw-r--r--drivers/scsi/isci/core/scic_controller.h130
-rw-r--r--drivers/scsi/isci/core/scic_sds_controller.c2973
-rw-r--r--drivers/scsi/isci/core/scic_sds_controller.h576
-rw-r--r--drivers/scsi/isci/core/scic_sds_phy.c3
-rw-r--r--drivers/scsi/isci/core/scic_sds_port.c4
-rw-r--r--drivers/scsi/isci/core/scic_sds_port.h1
-rw-r--r--drivers/scsi/isci/core/scic_sds_port_configuration_agent.c4
-rw-r--r--drivers/scsi/isci/core/scic_sds_request.c3
-rw-r--r--drivers/scsi/isci/core/scic_sds_smp_request.c4
-rw-r--r--drivers/scsi/isci/core/scic_sds_ssp_request.c4
-rw-r--r--drivers/scsi/isci/core/scic_sds_stp_request.c2
-rw-r--r--drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c11
-rw-r--r--drivers/scsi/isci/host.c2785
-rw-r--r--drivers/scsi/isci/host.h612
-rw-r--r--drivers/scsi/isci/init.c2
-rw-r--r--drivers/scsi/isci/isci.h6
-rw-r--r--drivers/scsi/isci/pool.h (renamed from drivers/scsi/isci/core/sci_pool.h)0
-rw-r--r--drivers/scsi/isci/port.c8
-rw-r--r--drivers/scsi/isci/probe_roms.c1
-rw-r--r--drivers/scsi/isci/remote_device.c3
-rw-r--r--drivers/scsi/isci/remote_node_context.c3
-rw-r--r--drivers/scsi/isci/remote_node_table.c1
-rw-r--r--drivers/scsi/isci/request.c1
-rw-r--r--drivers/scsi/isci/sci_environment.h122
-rw-r--r--drivers/scsi/isci/task.c1
28 files changed, 3360 insertions, 3940 deletions
diff --git a/drivers/scsi/isci/Makefile b/drivers/scsi/isci/Makefile
index 78ba0fc3548a..45f8f68caf4a 100644
--- a/drivers/scsi/isci/Makefile
+++ b/drivers/scsi/isci/Makefile
@@ -5,7 +5,6 @@ isci-objs := init.o phy.o request.o sata.o \
5 host.o task.o probe_roms.o \ 5 host.o task.o probe_roms.o \
6 remote_node_context.o \ 6 remote_node_context.o \
7 remote_node_table.o \ 7 remote_node_table.o \
8 core/scic_sds_controller.o \
9 core/scic_sds_request.o \ 8 core/scic_sds_request.o \
10 core/scic_sds_stp_request.o \ 9 core/scic_sds_stp_request.o \
11 core/scic_sds_port.o \ 10 core/scic_sds_port.o \
diff --git a/drivers/scsi/isci/core/sci_util.c b/drivers/scsi/isci/core/sci_util.c
index 0101fec23865..595d8da1abba 100644
--- a/drivers/scsi/isci/core/sci_util.c
+++ b/drivers/scsi/isci/core/sci_util.c
@@ -55,7 +55,6 @@
55 55
56#include <linux/kernel.h> 56#include <linux/kernel.h>
57#include "sci_util.h" 57#include "sci_util.h"
58#include "sci_environment.h"
59#include "request.h" 58#include "request.h"
60 59
61void *scic_request_get_virt_addr(struct scic_sds_request *sci_req, dma_addr_t phys_addr) 60void *scic_request_get_virt_addr(struct scic_sds_request *sci_req, dma_addr_t phys_addr)
diff --git a/drivers/scsi/isci/core/scic_config_parameters.h b/drivers/scsi/isci/core/scic_config_parameters.h
index 8b8c9259f52f..15e7744dbdcf 100644
--- a/drivers/scsi/isci/core/scic_config_parameters.h
+++ b/drivers/scsi/isci/core/scic_config_parameters.h
@@ -229,44 +229,6 @@ union scic_oem_parameters {
229 struct scic_sds_oem_params sds1; 229 struct scic_sds_oem_params sds1;
230}; 230};
231 231
232/**
233 * scic_user_parameters_set() - This method allows the user to attempt to
234 * change the user parameters utilized by the controller.
235 * @controller: This parameter specifies the controller on which to set the
236 * user parameters.
237 * @user_parameters: This parameter specifies the USER_PARAMETERS object
238 * containing the potential new values.
239 *
240 * Indicate if the update of the user parameters was successful. SCI_SUCCESS
241 * This value is returned if the operation succeeded. SCI_FAILURE_INVALID_STATE
242 * This value is returned if the attempt to change the user parameter failed,
243 * because changing one of the parameters is not currently allowed.
244 * SCI_FAILURE_INVALID_PARAMETER_VALUE This value is returned if the user
245 * supplied an invalid interrupt coalescence time, spin up delay interval, etc.
246 */
247enum sci_status scic_user_parameters_set(
248 struct scic_sds_controller *controller,
249 union scic_user_parameters *user_parameters);
250
251/**
252 * scic_oem_parameters_set() - This method allows the user to attempt to change
253 * the OEM parameters utilized by the controller.
254 * @controller: This parameter specifies the controller on which to set the
255 * user parameters.
256 * @oem_parameters: This parameter specifies the OEM parameters object
257 * containing the potential new values.
258 *
259 * Indicate if the update of the user parameters was successful. SCI_SUCCESS
260 * This value is returned if the operation succeeded. SCI_FAILURE_INVALID_STATE
261 * This value is returned if the attempt to change the user parameter failed,
262 * because changing one of the parameters is not currently allowed.
263 * SCI_FAILURE_INVALID_PARAMETER_VALUE This value is returned if the user
264 * supplied an unsupported value for one of the OEM parameters.
265 */
266enum sci_status scic_oem_parameters_set(
267 struct scic_sds_controller *controller,
268 union scic_oem_parameters *oem_parameters);
269
270int scic_oem_parameters_validate(struct scic_sds_oem_params *oem); 232int scic_oem_parameters_validate(struct scic_sds_oem_params *oem);
271 233
272/** 234/**
diff --git a/drivers/scsi/isci/core/scic_controller.h b/drivers/scsi/isci/core/scic_controller.h
deleted file mode 100644
index bd08f306ed67..000000000000
--- a/drivers/scsi/isci/core/scic_controller.h
+++ /dev/null
@@ -1,130 +0,0 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCIC_CONTROLLER_H_
57#define _SCIC_CONTROLLER_H_
58
59#include "scic_config_parameters.h"
60
61struct scic_sds_request;
62struct scic_sds_phy;
63struct scic_sds_port;
64struct scic_sds_remote_device;
65
66enum sci_status scic_controller_construct(struct scic_sds_controller *c,
67 void __iomem *scu_base,
68 void __iomem *smu_base);
69
70void scic_controller_enable_interrupts(
71 struct scic_sds_controller *controller);
72
73void scic_controller_disable_interrupts(
74 struct scic_sds_controller *controller);
75
76enum sci_status scic_controller_initialize(
77 struct scic_sds_controller *controller);
78
79u32 scic_controller_get_suggested_start_timeout(
80 struct scic_sds_controller *controller);
81
82enum sci_status scic_controller_start(
83 struct scic_sds_controller *controller,
84 u32 timeout);
85
86enum sci_status scic_controller_stop(
87 struct scic_sds_controller *controller,
88 u32 timeout);
89
90enum sci_status scic_controller_reset(
91 struct scic_sds_controller *controller);
92
93enum sci_status scic_controller_start_io(
94 struct scic_sds_controller *controller,
95 struct scic_sds_remote_device *remote_device,
96 struct scic_sds_request *io_request,
97 u16 io_tag);
98
99enum sci_task_status scic_controller_start_task(
100 struct scic_sds_controller *controller,
101 struct scic_sds_remote_device *remote_device,
102 struct scic_sds_request *task_request,
103 u16 io_tag);
104
105enum sci_status scic_controller_terminate_request(
106 struct scic_sds_controller *controller,
107 struct scic_sds_remote_device *remote_device,
108 struct scic_sds_request *request);
109
110enum sci_status scic_controller_complete_io(
111 struct scic_sds_controller *controller,
112 struct scic_sds_remote_device *remote_device,
113 struct scic_sds_request *io_request);
114
115enum sci_status scic_controller_get_phy_handle(
116 struct scic_sds_controller *controller,
117 u8 phy_index,
118 struct scic_sds_phy **phy_handle);
119
120u16 scic_controller_allocate_io_tag(
121 struct scic_sds_controller *controller);
122
123enum sci_status scic_controller_free_io_tag(
124 struct scic_sds_controller *controller,
125 u16 io_tag);
126
127struct device;
128struct scic_sds_controller *scic_controller_alloc(struct device *dev);
129int scic_controller_mem_init(struct scic_sds_controller *scic);
130#endif /* _SCIC_CONTROLLER_H_ */
diff --git a/drivers/scsi/isci/core/scic_sds_controller.c b/drivers/scsi/isci/core/scic_sds_controller.c
deleted file mode 100644
index e77265b9b9ec..000000000000
--- a/drivers/scsi/isci/core/scic_sds_controller.c
+++ /dev/null
@@ -1,2973 +0,0 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <linux/device.h>
57#include <scsi/sas.h>
58#include "scic_controller.h"
59#include "scic_phy.h"
60#include "scic_port.h"
61#include "scic_sds_controller.h"
62#include "scu_registers.h"
63#include "scic_sds_phy.h"
64#include "scic_sds_port_configuration_agent.h"
65#include "scic_sds_port.h"
66#include "remote_device.h"
67#include "scic_sds_request.h"
68#include "sci_environment.h"
69#include "sci_util.h"
70#include "scu_completion_codes.h"
71#include "scu_event_codes.h"
72#include "scu_remote_node_context.h"
73#include "scu_task_context.h"
74#include "scu_unsolicited_frame.h"
75#include "timers.h"
76
77#define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
78
79/**
80 * smu_dcc_get_max_ports() -
81 *
82 * This macro returns the maximum number of logical ports supported by the
83 * hardware. The caller passes in the value read from the device context
84 * capacity register and this macro will mash and shift the value appropriately.
85 */
86#define smu_dcc_get_max_ports(dcc_value) \
87 (\
88 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
89 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
90 )
91
92/**
93 * smu_dcc_get_max_task_context() -
94 *
95 * This macro returns the maximum number of task contexts supported by the
96 * hardware. The caller passes in the value read from the device context
97 * capacity register and this macro will mash and shift the value appropriately.
98 */
99#define smu_dcc_get_max_task_context(dcc_value) \
100 (\
101 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
102 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
103 )
104
105/**
106 * smu_dcc_get_max_remote_node_context() -
107 *
108 * This macro returns the maximum number of remote node contexts supported by
109 * the hardware. The caller passes in the value read from the device context
110 * capacity register and this macro will mash and shift the value appropriately.
111 */
112#define smu_dcc_get_max_remote_node_context(dcc_value) \
113 (\
114 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
115 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
116 )
117
118
119static void scic_sds_controller_power_control_timer_handler(
120 void *controller);
121#define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
122#define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
123
124/**
125 *
126 *
127 * The number of milliseconds to wait for a phy to start.
128 */
129#define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
130
131/**
132 *
133 *
134 * The number of milliseconds to wait while a given phy is consuming power
135 * before allowing another set of phys to consume power. Ultimately, this will
136 * be specified by OEM parameter.
137 */
138#define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
139
140/**
141 * COMPLETION_QUEUE_CYCLE_BIT() -
142 *
143 * This macro will return the cycle bit of the completion queue entry
144 */
145#define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
146
147/**
148 * NORMALIZE_GET_POINTER() -
149 *
150 * This macro will normalize the completion queue get pointer so its value can
151 * be used as an index into an array
152 */
153#define NORMALIZE_GET_POINTER(x) \
154 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
155
156/**
157 * NORMALIZE_PUT_POINTER() -
158 *
159 * This macro will normalize the completion queue put pointer so its value can
160 * be used as an array inde
161 */
162#define NORMALIZE_PUT_POINTER(x) \
163 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
164
165
166/**
167 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
168 *
169 * This macro will normalize the completion queue cycle pointer so it matches
170 * the completion queue cycle bit
171 */
172#define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
173 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
174
175/**
176 * NORMALIZE_EVENT_POINTER() -
177 *
178 * This macro will normalize the completion queue event entry so its value can
179 * be used as an index.
180 */
181#define NORMALIZE_EVENT_POINTER(x) \
182 (\
183 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
184 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
185 )
186
187/**
188 * INCREMENT_COMPLETION_QUEUE_GET() -
189 *
190 * This macro will increment the controllers completion queue index value and
191 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
192 */
193#define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
194 INCREMENT_QUEUE_GET(\
195 (index), \
196 (cycle), \
197 (controller)->completion_queue_entries, \
198 SMU_CQGR_CYCLE_BIT \
199 )
200
201/**
202 * INCREMENT_EVENT_QUEUE_GET() -
203 *
204 * This macro will increment the controllers event queue index value and
205 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
206 */
207#define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
208 INCREMENT_QUEUE_GET(\
209 (index), \
210 (cycle), \
211 (controller)->completion_event_entries, \
212 SMU_CQGR_EVENT_CYCLE_BIT \
213 )
214
215static void scic_sds_controller_initialize_power_control(struct scic_sds_controller *scic)
216{
217 struct isci_host *ihost = scic_to_ihost(scic);
218 scic->power_control.timer = isci_timer_create(ihost,
219 scic,
220 scic_sds_controller_power_control_timer_handler);
221
222 memset(scic->power_control.requesters, 0,
223 sizeof(scic->power_control.requesters));
224
225 scic->power_control.phys_waiting = 0;
226 scic->power_control.phys_granted_power = 0;
227}
228
229int scic_controller_mem_init(struct scic_sds_controller *scic)
230{
231 struct device *dev = scic_to_dev(scic);
232 dma_addr_t dma_handle;
233 enum sci_status result;
234
235 scic->completion_queue = dmam_alloc_coherent(dev,
236 scic->completion_queue_entries * sizeof(u32),
237 &dma_handle, GFP_KERNEL);
238 if (!scic->completion_queue)
239 return -ENOMEM;
240
241 writel(lower_32_bits(dma_handle),
242 &scic->smu_registers->completion_queue_lower);
243 writel(upper_32_bits(dma_handle),
244 &scic->smu_registers->completion_queue_upper);
245
246 scic->remote_node_context_table = dmam_alloc_coherent(dev,
247 scic->remote_node_entries *
248 sizeof(union scu_remote_node_context),
249 &dma_handle, GFP_KERNEL);
250 if (!scic->remote_node_context_table)
251 return -ENOMEM;
252
253 writel(lower_32_bits(dma_handle),
254 &scic->smu_registers->remote_node_context_lower);
255 writel(upper_32_bits(dma_handle),
256 &scic->smu_registers->remote_node_context_upper);
257
258 scic->task_context_table = dmam_alloc_coherent(dev,
259 scic->task_context_entries *
260 sizeof(struct scu_task_context),
261 &dma_handle, GFP_KERNEL);
262 if (!scic->task_context_table)
263 return -ENOMEM;
264
265 writel(lower_32_bits(dma_handle),
266 &scic->smu_registers->host_task_table_lower);
267 writel(upper_32_bits(dma_handle),
268 &scic->smu_registers->host_task_table_upper);
269
270 result = scic_sds_unsolicited_frame_control_construct(scic);
271 if (result)
272 return result;
273
274 /*
275 * Inform the silicon as to the location of the UF headers and
276 * address table.
277 */
278 writel(lower_32_bits(scic->uf_control.headers.physical_address),
279 &scic->scu_registers->sdma.uf_header_base_address_lower);
280 writel(upper_32_bits(scic->uf_control.headers.physical_address),
281 &scic->scu_registers->sdma.uf_header_base_address_upper);
282
283 writel(lower_32_bits(scic->uf_control.address_table.physical_address),
284 &scic->scu_registers->sdma.uf_address_table_lower);
285 writel(upper_32_bits(scic->uf_control.address_table.physical_address),
286 &scic->scu_registers->sdma.uf_address_table_upper);
287
288 return 0;
289}
290
291/**
292 * This method initializes the task context data for the controller.
293 * @scic:
294 *
295 */
296static void
297scic_sds_controller_assign_task_entries(struct scic_sds_controller *controller)
298{
299 u32 task_assignment;
300
301 /*
302 * Assign all the TCs to function 0
303 * TODO: Do we actually need to read this register to write it back?
304 */
305
306 task_assignment =
307 readl(&controller->smu_registers->task_context_assignment[0]);
308
309 task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) |
310 (SMU_TCA_GEN_VAL(ENDING, controller->task_context_entries - 1)) |
311 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE));
312
313 writel(task_assignment,
314 &controller->smu_registers->task_context_assignment[0]);
315
316}
317
318/**
319 * This method initializes the hardware completion queue.
320 *
321 *
322 */
323static void scic_sds_controller_initialize_completion_queue(
324 struct scic_sds_controller *scic)
325{
326 u32 index;
327 u32 completion_queue_control_value;
328 u32 completion_queue_get_value;
329 u32 completion_queue_put_value;
330
331 scic->completion_queue_get = 0;
332
333 completion_queue_control_value = (
334 SMU_CQC_QUEUE_LIMIT_SET(scic->completion_queue_entries - 1)
335 | SMU_CQC_EVENT_LIMIT_SET(scic->completion_event_entries - 1)
336 );
337
338 writel(completion_queue_control_value,
339 &scic->smu_registers->completion_queue_control);
340
341
342 /* Set the completion queue get pointer and enable the queue */
343 completion_queue_get_value = (
344 (SMU_CQGR_GEN_VAL(POINTER, 0))
345 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
346 | (SMU_CQGR_GEN_BIT(ENABLE))
347 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
348 );
349
350 writel(completion_queue_get_value,
351 &scic->smu_registers->completion_queue_get);
352
353 /* Set the completion queue put pointer */
354 completion_queue_put_value = (
355 (SMU_CQPR_GEN_VAL(POINTER, 0))
356 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
357 );
358
359 writel(completion_queue_put_value,
360 &scic->smu_registers->completion_queue_put);
361
362 /* Initialize the cycle bit of the completion queue entries */
363 for (index = 0; index < scic->completion_queue_entries; index++) {
364 /*
365 * If get.cycle_bit != completion_queue.cycle_bit
366 * its not a valid completion queue entry
367 * so at system start all entries are invalid */
368 scic->completion_queue[index] = 0x80000000;
369 }
370}
371
372/**
373 * This method initializes the hardware unsolicited frame queue.
374 *
375 *
376 */
377static void scic_sds_controller_initialize_unsolicited_frame_queue(
378 struct scic_sds_controller *scic)
379{
380 u32 frame_queue_control_value;
381 u32 frame_queue_get_value;
382 u32 frame_queue_put_value;
383
384 /* Write the queue size */
385 frame_queue_control_value =
386 SCU_UFQC_GEN_VAL(QUEUE_SIZE,
387 scic->uf_control.address_table.count);
388
389 writel(frame_queue_control_value,
390 &scic->scu_registers->sdma.unsolicited_frame_queue_control);
391
392 /* Setup the get pointer for the unsolicited frame queue */
393 frame_queue_get_value = (
394 SCU_UFQGP_GEN_VAL(POINTER, 0)
395 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
396 );
397
398 writel(frame_queue_get_value,
399 &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
400 /* Setup the put pointer for the unsolicited frame queue */
401 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
402 writel(frame_queue_put_value,
403 &scic->scu_registers->sdma.unsolicited_frame_put_pointer);
404}
405
406/**
407 * This method enables the hardware port task scheduler.
408 *
409 *
410 */
411static void scic_sds_controller_enable_port_task_scheduler(
412 struct scic_sds_controller *scic)
413{
414 u32 port_task_scheduler_value;
415
416 port_task_scheduler_value =
417 readl(&scic->scu_registers->peg0.ptsg.control);
418 port_task_scheduler_value |=
419 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) |
420 SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
421 writel(port_task_scheduler_value,
422 &scic->scu_registers->peg0.ptsg.control);
423}
424
425/**
426 *
427 *
428 * This macro is used to delay between writes to the AFE registers during AFE
429 * initialization.
430 */
431#define AFE_REGISTER_WRITE_DELAY 10
432
433/* Initialize the AFE for this phy index. We need to read the AFE setup from
434 * the OEM parameters none
435 */
436static void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
437{
438 const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
439 u32 afe_status;
440 u32 phy_id;
441
442 /* Clear DFX Status registers */
443 writel(0x0081000f, &scic->scu_registers->afe.afe_dfx_master_control0);
444 udelay(AFE_REGISTER_WRITE_DELAY);
445
446 if (is_b0()) {
447 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
448 * Timer, PM Stagger Timer */
449 writel(0x0007BFFF, &scic->scu_registers->afe.afe_pmsn_master_control2);
450 udelay(AFE_REGISTER_WRITE_DELAY);
451 }
452
453 /* Configure bias currents to normal */
454 if (is_a0())
455 writel(0x00005500, &scic->scu_registers->afe.afe_bias_control);
456 else if (is_a2())
457 writel(0x00005A00, &scic->scu_registers->afe.afe_bias_control);
458 else if (is_b0())
459 writel(0x00005F00, &scic->scu_registers->afe.afe_bias_control);
460
461 udelay(AFE_REGISTER_WRITE_DELAY);
462
463 /* Enable PLL */
464 if (is_b0())
465 writel(0x80040A08, &scic->scu_registers->afe.afe_pll_control0);
466 else
467 writel(0x80040908, &scic->scu_registers->afe.afe_pll_control0);
468
469 udelay(AFE_REGISTER_WRITE_DELAY);
470
471 /* Wait for the PLL to lock */
472 do {
473 afe_status = readl(&scic->scu_registers->afe.afe_common_block_status);
474 udelay(AFE_REGISTER_WRITE_DELAY);
475 } while ((afe_status & 0x00001000) == 0);
476
477 if (is_a0() || is_a2()) {
478 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
479 writel(0x7bcc96ad, &scic->scu_registers->afe.afe_pmsn_master_control0);
480 udelay(AFE_REGISTER_WRITE_DELAY);
481 }
482
483 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
484 const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
485
486 if (is_b0()) {
487 /* Configure transmitter SSC parameters */
488 writel(0x00030000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
489 udelay(AFE_REGISTER_WRITE_DELAY);
490 } else {
491 /*
492 * All defaults, except the Receive Word Alignament/Comma Detect
493 * Enable....(0xe800) */
494 writel(0x00004512, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
495 udelay(AFE_REGISTER_WRITE_DELAY);
496
497 writel(0x0050100F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control1);
498 udelay(AFE_REGISTER_WRITE_DELAY);
499 }
500
501 /*
502 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
503 * & increase TX int & ext bias 20%....(0xe85c) */
504 if (is_a0())
505 writel(0x000003D4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
506 else if (is_a2())
507 writel(0x000003F0, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
508 else {
509 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
510 writel(0x000003d7, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
511 udelay(AFE_REGISTER_WRITE_DELAY);
512
513 /*
514 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
515 * & increase TX int & ext bias 20%....(0xe85c) */
516 writel(0x000003d4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
517 }
518 udelay(AFE_REGISTER_WRITE_DELAY);
519
520 if (is_a0() || is_a2()) {
521 /* Enable TX equalization (0xe824) */
522 writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
523 udelay(AFE_REGISTER_WRITE_DELAY);
524 }
525
526 /*
527 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
528 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
529 writel(0x00004100, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
530 udelay(AFE_REGISTER_WRITE_DELAY);
531
532 /* Leave DFE/FFE on */
533 if (is_a0())
534 writel(0x3F09983F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
535 else if (is_a2())
536 writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
537 else {
538 writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
539 udelay(AFE_REGISTER_WRITE_DELAY);
540 /* Enable TX equalization (0xe824) */
541 writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
542 }
543 udelay(AFE_REGISTER_WRITE_DELAY);
544
545 writel(oem_phy->afe_tx_amp_control0,
546 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control0);
547 udelay(AFE_REGISTER_WRITE_DELAY);
548
549 writel(oem_phy->afe_tx_amp_control1,
550 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control1);
551 udelay(AFE_REGISTER_WRITE_DELAY);
552
553 writel(oem_phy->afe_tx_amp_control2,
554 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control2);
555 udelay(AFE_REGISTER_WRITE_DELAY);
556
557 writel(oem_phy->afe_tx_amp_control3,
558 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control3);
559 udelay(AFE_REGISTER_WRITE_DELAY);
560 }
561
562 /* Transfer control to the PEs */
563 writel(0x00010f00, &scic->scu_registers->afe.afe_dfx_master_control0);
564 udelay(AFE_REGISTER_WRITE_DELAY);
565}
566
567/*
568 * ****************************************************************************-
569 * * SCIC SDS Controller Internal Start/Stop Routines
570 * ****************************************************************************- */
571
572
573/**
574 * This method will attempt to transition into the ready state for the
575 * controller and indicate that the controller start operation has completed
576 * if all criteria are met.
577 * @scic: This parameter indicates the controller object for which
578 * to transition to ready.
579 * @status: This parameter indicates the status value to be pass into the call
580 * to scic_cb_controller_start_complete().
581 *
582 * none.
583 */
584static void scic_sds_controller_transition_to_ready(
585 struct scic_sds_controller *scic,
586 enum sci_status status)
587{
588 struct isci_host *ihost = scic_to_ihost(scic);
589
590 if (scic->state_machine.current_state_id ==
591 SCI_BASE_CONTROLLER_STATE_STARTING) {
592 /*
593 * We move into the ready state, because some of the phys/ports
594 * may be up and operational.
595 */
596 sci_base_state_machine_change_state(&scic->state_machine,
597 SCI_BASE_CONTROLLER_STATE_READY);
598
599 isci_host_start_complete(ihost, status);
600 }
601}
602
603static void scic_sds_controller_timeout_handler(void *_scic)
604{
605 struct scic_sds_controller *scic = _scic;
606 struct isci_host *ihost = scic_to_ihost(scic);
607 struct sci_base_state_machine *sm = &scic->state_machine;
608
609 if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STARTING)
610 scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT);
611 else if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STOPPING) {
612 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_FAILED);
613 isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);
614 } else /* / @todo Now what do we want to do in this case? */
615 dev_err(scic_to_dev(scic),
616 "%s: Controller timer fired when controller was not "
617 "in a state being timed.\n",
618 __func__);
619}
620
621static enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
622{
623 u32 index;
624 enum sci_status port_status;
625 enum sci_status status = SCI_SUCCESS;
626 struct isci_host *ihost = scic_to_ihost(scic);
627
628 for (index = 0; index < scic->logical_port_entries; index++) {
629 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
630 scic_sds_port_handler_t stop;
631
632 stop = sci_port->state_handlers->stop_handler;
633 port_status = stop(sci_port);
634
635 if ((port_status != SCI_SUCCESS) &&
636 (port_status != SCI_FAILURE_INVALID_STATE)) {
637 status = SCI_FAILURE;
638
639 dev_warn(scic_to_dev(scic),
640 "%s: Controller stop operation failed to "
641 "stop port %d because of status %d.\n",
642 __func__,
643 sci_port->logical_port_index,
644 port_status);
645 }
646 }
647
648 return status;
649}
650
651static inline void scic_sds_controller_phy_timer_start(
652 struct scic_sds_controller *scic)
653{
654 isci_timer_start(scic->phy_startup_timer,
655 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT);
656
657 scic->phy_startup_timer_pending = true;
658}
659
660static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller *scic)
661{
662 isci_timer_stop(scic->phy_startup_timer);
663
664 scic->phy_startup_timer_pending = false;
665}
666
667/**
668 * scic_sds_controller_start_next_phy - start phy
669 * @scic: controller
670 *
671 * If all the phys have been started, then attempt to transition the
672 * controller to the READY state and inform the user
673 * (scic_cb_controller_start_complete()).
674 */
675static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic)
676{
677 struct isci_host *ihost = scic_to_ihost(scic);
678 struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
679 struct scic_sds_phy *sci_phy;
680 enum sci_status status;
681
682 status = SCI_SUCCESS;
683
684 if (scic->phy_startup_timer_pending)
685 return status;
686
687 if (scic->next_phy_to_start >= SCI_MAX_PHYS) {
688 bool is_controller_start_complete = true;
689 u32 state;
690 u8 index;
691
692 for (index = 0; index < SCI_MAX_PHYS; index++) {
693 sci_phy = &ihost->phys[index].sci;
694 state = sci_phy->state_machine.current_state_id;
695
696 if (!scic_sds_phy_get_port(sci_phy))
697 continue;
698
699 /* The controller start operation is complete iff:
700 * - all links have been given an opportunity to start
701 * - have no indication of a connected device
702 * - have an indication of a connected device and it has
703 * finished the link training process.
704 */
705 if ((sci_phy->is_in_link_training == false &&
706 state == SCI_BASE_PHY_STATE_INITIAL) ||
707 (sci_phy->is_in_link_training == false &&
708 state == SCI_BASE_PHY_STATE_STOPPED) ||
709 (sci_phy->is_in_link_training == true &&
710 state == SCI_BASE_PHY_STATE_STARTING)) {
711 is_controller_start_complete = false;
712 break;
713 }
714 }
715
716 /*
717 * The controller has successfully finished the start process.
718 * Inform the SCI Core user and transition to the READY state. */
719 if (is_controller_start_complete == true) {
720 scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS);
721 scic_sds_controller_phy_timer_stop(scic);
722 }
723 } else {
724 sci_phy = &ihost->phys[scic->next_phy_to_start].sci;
725
726 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
727 if (scic_sds_phy_get_port(sci_phy) == NULL) {
728 scic->next_phy_to_start++;
729
730 /* Caution recursion ahead be forwarned
731 *
732 * The PHY was never added to a PORT in MPC mode
733 * so start the next phy in sequence This phy
734 * will never go link up and will not draw power
735 * the OEM parameters either configured the phy
736 * incorrectly for the PORT or it was never
737 * assigned to a PORT
738 */
739 return scic_sds_controller_start_next_phy(scic);
740 }
741 }
742
743 status = scic_sds_phy_start(sci_phy);
744
745 if (status == SCI_SUCCESS) {
746 scic_sds_controller_phy_timer_start(scic);
747 } else {
748 dev_warn(scic_to_dev(scic),
749 "%s: Controller stop operation failed "
750 "to stop phy %d because of status "
751 "%d.\n",
752 __func__,
753 ihost->phys[scic->next_phy_to_start].sci.phy_index,
754 status);
755 }
756
757 scic->next_phy_to_start++;
758 }
759
760 return status;
761}
762
763static void scic_sds_controller_phy_startup_timeout_handler(void *_scic)
764{
765 struct scic_sds_controller *scic = _scic;
766 enum sci_status status;
767
768 scic->phy_startup_timer_pending = false;
769 status = SCI_FAILURE;
770 while (status != SCI_SUCCESS)
771 status = scic_sds_controller_start_next_phy(scic);
772}
773
774static enum sci_status scic_sds_controller_initialize_phy_startup(struct scic_sds_controller *scic)
775{
776 struct isci_host *ihost = scic_to_ihost(scic);
777
778 scic->phy_startup_timer = isci_timer_create(ihost,
779 scic,
780 scic_sds_controller_phy_startup_timeout_handler);
781
782 if (scic->phy_startup_timer == NULL)
783 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
784 else {
785 scic->next_phy_to_start = 0;
786 scic->phy_startup_timer_pending = false;
787 }
788
789 return SCI_SUCCESS;
790}
791
792static enum sci_status scic_sds_controller_stop_phys(struct scic_sds_controller *scic)
793{
794 u32 index;
795 enum sci_status status;
796 enum sci_status phy_status;
797 struct isci_host *ihost = scic_to_ihost(scic);
798
799 status = SCI_SUCCESS;
800
801 for (index = 0; index < SCI_MAX_PHYS; index++) {
802 phy_status = scic_sds_phy_stop(&ihost->phys[index].sci);
803
804 if (phy_status != SCI_SUCCESS &&
805 phy_status != SCI_FAILURE_INVALID_STATE) {
806 status = SCI_FAILURE;
807
808 dev_warn(scic_to_dev(scic),
809 "%s: Controller stop operation failed to stop "
810 "phy %d because of status %d.\n",
811 __func__,
812 ihost->phys[index].sci.phy_index, phy_status);
813 }
814 }
815
816 return status;
817}
818
819static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controller *scic)
820{
821 u32 index;
822 enum sci_status status;
823 enum sci_status device_status;
824
825 status = SCI_SUCCESS;
826
827 for (index = 0; index < scic->remote_node_entries; index++) {
828 if (scic->device_table[index] != NULL) {
829 /* / @todo What timeout value do we want to provide to this request? */
830 device_status = scic_remote_device_stop(scic->device_table[index], 0);
831
832 if ((device_status != SCI_SUCCESS) &&
833 (device_status != SCI_FAILURE_INVALID_STATE)) {
834 dev_warn(scic_to_dev(scic),
835 "%s: Controller stop operation failed "
836 "to stop device 0x%p because of "
837 "status %d.\n",
838 __func__,
839 scic->device_table[index], device_status);
840 }
841 }
842 }
843
844 return status;
845}
846
847static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller *scic)
848{
849 isci_timer_start(scic->power_control.timer,
850 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
851
852 scic->power_control.timer_started = true;
853}
854
855static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller *scic)
856{
857 if (scic->power_control.timer_started) {
858 isci_timer_stop(scic->power_control.timer);
859 scic->power_control.timer_started = false;
860 }
861}
862
863static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller *scic)
864{
865 scic_sds_controller_power_control_timer_stop(scic);
866 scic_sds_controller_power_control_timer_start(scic);
867}
868
869static void scic_sds_controller_power_control_timer_handler(
870 void *controller)
871{
872 struct scic_sds_controller *scic;
873
874 scic = (struct scic_sds_controller *)controller;
875
876 scic->power_control.phys_granted_power = 0;
877
878 if (scic->power_control.phys_waiting == 0) {
879 scic->power_control.timer_started = false;
880 } else {
881 struct scic_sds_phy *sci_phy = NULL;
882 u8 i;
883
884 for (i = 0;
885 (i < SCI_MAX_PHYS)
886 && (scic->power_control.phys_waiting != 0);
887 i++) {
888 if (scic->power_control.requesters[i] != NULL) {
889 if (scic->power_control.phys_granted_power <
890 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
891 sci_phy = scic->power_control.requesters[i];
892 scic->power_control.requesters[i] = NULL;
893 scic->power_control.phys_waiting--;
894 scic->power_control.phys_granted_power++;
895 scic_sds_phy_consume_power_handler(sci_phy);
896 } else {
897 break;
898 }
899 }
900 }
901
902 /*
903 * It doesn't matter if the power list is empty, we need to start the
904 * timer in case another phy becomes ready.
905 */
906 scic_sds_controller_power_control_timer_start(scic);
907 }
908}
909
910/**
911 * This method inserts the phy in the stagger spinup control queue.
912 * @scic:
913 *
914 *
915 */
916void scic_sds_controller_power_control_queue_insert(
917 struct scic_sds_controller *scic,
918 struct scic_sds_phy *sci_phy)
919{
920 BUG_ON(sci_phy == NULL);
921
922 if (scic->power_control.phys_granted_power <
923 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
924 scic->power_control.phys_granted_power++;
925 scic_sds_phy_consume_power_handler(sci_phy);
926
927 /*
928 * stop and start the power_control timer. When the timer fires, the
929 * no_of_phys_granted_power will be set to 0
930 */
931 scic_sds_controller_power_control_timer_restart(scic);
932 } else {
933 /* Add the phy in the waiting list */
934 scic->power_control.requesters[sci_phy->phy_index] = sci_phy;
935 scic->power_control.phys_waiting++;
936 }
937}
938
939/**
940 * This method removes the phy from the stagger spinup control queue.
941 * @scic:
942 *
943 *
944 */
945void scic_sds_controller_power_control_queue_remove(
946 struct scic_sds_controller *scic,
947 struct scic_sds_phy *sci_phy)
948{
949 BUG_ON(sci_phy == NULL);
950
951 if (scic->power_control.requesters[sci_phy->phy_index] != NULL) {
952 scic->power_control.phys_waiting--;
953 }
954
955 scic->power_control.requesters[sci_phy->phy_index] = NULL;
956}
957
958/*
959 * ****************************************************************************-
960 * * SCIC SDS Controller Completion Routines
961 * ****************************************************************************- */
962
963/**
964 * This method returns a true value if the completion queue has entries that
965 * can be processed
966 * @scic:
967 *
968 * bool true if the completion queue has entries to process false if the
969 * completion queue has no entries to process
970 */
971static bool scic_sds_controller_completion_queue_has_entries(
972 struct scic_sds_controller *scic)
973{
974 u32 get_value = scic->completion_queue_get;
975 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
976
977 if (NORMALIZE_GET_POINTER_CYCLE_BIT(get_value) ==
978 COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index]))
979 return true;
980
981 return false;
982}
983
984/**
985 * This method processes a task completion notification. This is called from
986 * within the controller completion handler.
987 * @scic:
988 * @completion_entry:
989 *
990 */
991static void scic_sds_controller_task_completion(
992 struct scic_sds_controller *scic,
993 u32 completion_entry)
994{
995 u32 index;
996 struct scic_sds_request *io_request;
997
998 index = SCU_GET_COMPLETION_INDEX(completion_entry);
999 io_request = scic->io_request_table[index];
1000
1001 /* Make sure that we really want to process this IO request */
1002 if (
1003 (io_request != NULL)
1004 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1005 && (
1006 scic_sds_io_tag_get_sequence(io_request->io_tag)
1007 == scic->io_request_sequence[index]
1008 )
1009 ) {
1010 /* Yep this is a valid io request pass it along to the io request handler */
1011 scic_sds_io_request_tc_completion(io_request, completion_entry);
1012 }
1013}
1014
1015/**
1016 * This method processes an SDMA completion event. This is called from within
1017 * the controller completion handler.
1018 * @scic:
1019 * @completion_entry:
1020 *
1021 */
1022static void scic_sds_controller_sdma_completion(
1023 struct scic_sds_controller *scic,
1024 u32 completion_entry)
1025{
1026 u32 index;
1027 struct scic_sds_request *io_request;
1028 struct scic_sds_remote_device *device;
1029
1030 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1031
1032 switch (scu_get_command_request_type(completion_entry)) {
1033 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1034 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1035 io_request = scic->io_request_table[index];
1036 dev_warn(scic_to_dev(scic),
1037 "%s: SCIC SDS Completion type SDMA %x for io request "
1038 "%p\n",
1039 __func__,
1040 completion_entry,
1041 io_request);
1042 /* @todo For a post TC operation we need to fail the IO
1043 * request
1044 */
1045 break;
1046
1047 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1048 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1049 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1050 device = scic->device_table[index];
1051 dev_warn(scic_to_dev(scic),
1052 "%s: SCIC SDS Completion type SDMA %x for remote "
1053 "device %p\n",
1054 __func__,
1055 completion_entry,
1056 device);
1057 /* @todo For a port RNC operation we need to fail the
1058 * device
1059 */
1060 break;
1061
1062 default:
1063 dev_warn(scic_to_dev(scic),
1064 "%s: SCIC SDS Completion unknown SDMA completion "
1065 "type %x\n",
1066 __func__,
1067 completion_entry);
1068 break;
1069
1070 }
1071}
1072
1073static void scic_sds_controller_unsolicited_frame(struct scic_sds_controller *scic,
1074 u32 completion_entry)
1075{
1076 u32 index;
1077 u32 frame_index;
1078
1079 struct isci_host *ihost = scic_to_ihost(scic);
1080 struct scu_unsolicited_frame_header *frame_header;
1081 struct scic_sds_phy *phy;
1082 struct scic_sds_remote_device *device;
1083
1084 enum sci_status result = SCI_FAILURE;
1085
1086 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1087
1088 frame_header = scic->uf_control.buffers.array[frame_index].header;
1089 scic->uf_control.buffers.array[frame_index].state = UNSOLICITED_FRAME_IN_USE;
1090
1091 if (SCU_GET_FRAME_ERROR(completion_entry)) {
1092 /*
1093 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1094 * / this cause a problem? We expect the phy initialization will
1095 * / fail if there is an error in the frame. */
1096 scic_sds_controller_release_frame(scic, frame_index);
1097 return;
1098 }
1099
1100 if (frame_header->is_address_frame) {
1101 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1102 phy = &ihost->phys[index].sci;
1103 result = scic_sds_phy_frame_handler(phy, frame_index);
1104 } else {
1105
1106 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1107
1108 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1109 /*
1110 * This is a signature fis or a frame from a direct attached SATA
1111 * device that has not yet been created. In either case forwared
1112 * the frame to the PE and let it take care of the frame data. */
1113 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1114 phy = &ihost->phys[index].sci;
1115 result = scic_sds_phy_frame_handler(phy, frame_index);
1116 } else {
1117 if (index < scic->remote_node_entries)
1118 device = scic->device_table[index];
1119 else
1120 device = NULL;
1121
1122 if (device != NULL)
1123 result = scic_sds_remote_device_frame_handler(device, frame_index);
1124 else
1125 scic_sds_controller_release_frame(scic, frame_index);
1126 }
1127 }
1128
1129 if (result != SCI_SUCCESS) {
1130 /*
1131 * / @todo Is there any reason to report some additional error message
1132 * / when we get this failure notifiction? */
1133 }
1134}
1135
1136static void scic_sds_controller_event_completion(struct scic_sds_controller *scic,
1137 u32 completion_entry)
1138{
1139 struct isci_host *ihost = scic_to_ihost(scic);
1140 struct scic_sds_request *io_request;
1141 struct scic_sds_remote_device *device;
1142 struct scic_sds_phy *phy;
1143 u32 index;
1144
1145 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1146
1147 switch (scu_get_event_type(completion_entry)) {
1148 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1149 /* / @todo The driver did something wrong and we need to fix the condtion. */
1150 dev_err(scic_to_dev(scic),
1151 "%s: SCIC Controller 0x%p received SMU command error "
1152 "0x%x\n",
1153 __func__,
1154 scic,
1155 completion_entry);
1156 break;
1157
1158 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1159 case SCU_EVENT_TYPE_SMU_ERROR:
1160 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1161 /*
1162 * / @todo This is a hardware failure and its likely that we want to
1163 * / reset the controller. */
1164 dev_err(scic_to_dev(scic),
1165 "%s: SCIC Controller 0x%p received fatal controller "
1166 "event 0x%x\n",
1167 __func__,
1168 scic,
1169 completion_entry);
1170 break;
1171
1172 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1173 io_request = scic->io_request_table[index];
1174 scic_sds_io_request_event_handler(io_request, completion_entry);
1175 break;
1176
1177 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1178 switch (scu_get_event_specifier(completion_entry)) {
1179 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1180 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1181 io_request = scic->io_request_table[index];
1182 if (io_request != NULL)
1183 scic_sds_io_request_event_handler(io_request, completion_entry);
1184 else
1185 dev_warn(scic_to_dev(scic),
1186 "%s: SCIC Controller 0x%p received "
1187 "event 0x%x for io request object "
1188 "that doesnt exist.\n",
1189 __func__,
1190 scic,
1191 completion_entry);
1192
1193 break;
1194
1195 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1196 device = scic->device_table[index];
1197 if (device != NULL)
1198 scic_sds_remote_device_event_handler(device, completion_entry);
1199 else
1200 dev_warn(scic_to_dev(scic),
1201 "%s: SCIC Controller 0x%p received "
1202 "event 0x%x for remote device object "
1203 "that doesnt exist.\n",
1204 __func__,
1205 scic,
1206 completion_entry);
1207
1208 break;
1209 }
1210 break;
1211
1212 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1213 /*
1214 * direct the broadcast change event to the phy first and then let
1215 * the phy redirect the broadcast change to the port object */
1216 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1217 /*
1218 * direct error counter event to the phy object since that is where
1219 * we get the event notification. This is a type 4 event. */
1220 case SCU_EVENT_TYPE_OSSP_EVENT:
1221 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1222 phy = &ihost->phys[index].sci;
1223 scic_sds_phy_event_handler(phy, completion_entry);
1224 break;
1225
1226 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1227 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1228 case SCU_EVENT_TYPE_RNC_OPS_MISC:
1229 if (index < scic->remote_node_entries) {
1230 device = scic->device_table[index];
1231
1232 if (device != NULL)
1233 scic_sds_remote_device_event_handler(device, completion_entry);
1234 } else
1235 dev_err(scic_to_dev(scic),
1236 "%s: SCIC Controller 0x%p received event 0x%x "
1237 "for remote device object 0x%0x that doesnt "
1238 "exist.\n",
1239 __func__,
1240 scic,
1241 completion_entry,
1242 index);
1243
1244 break;
1245
1246 default:
1247 dev_warn(scic_to_dev(scic),
1248 "%s: SCIC Controller received unknown event code %x\n",
1249 __func__,
1250 completion_entry);
1251 break;
1252 }
1253}
1254
1255/**
1256 * This method is a private routine for processing the completion queue entries.
1257 * @scic:
1258 *
1259 */
1260static void scic_sds_controller_process_completions(
1261 struct scic_sds_controller *scic)
1262{
1263 u32 completion_count = 0;
1264 u32 completion_entry;
1265 u32 get_index;
1266 u32 get_cycle;
1267 u32 event_index;
1268 u32 event_cycle;
1269
1270 dev_dbg(scic_to_dev(scic),
1271 "%s: completion queue begining get:0x%08x\n",
1272 __func__,
1273 scic->completion_queue_get);
1274
1275 /* Get the component parts of the completion queue */
1276 get_index = NORMALIZE_GET_POINTER(scic->completion_queue_get);
1277 get_cycle = SMU_CQGR_CYCLE_BIT & scic->completion_queue_get;
1278
1279 event_index = NORMALIZE_EVENT_POINTER(scic->completion_queue_get);
1280 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & scic->completion_queue_get;
1281
1282 while (
1283 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1284 == COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index])
1285 ) {
1286 completion_count++;
1287
1288 completion_entry = scic->completion_queue[get_index];
1289 INCREMENT_COMPLETION_QUEUE_GET(scic, get_index, get_cycle);
1290
1291 dev_dbg(scic_to_dev(scic),
1292 "%s: completion queue entry:0x%08x\n",
1293 __func__,
1294 completion_entry);
1295
1296 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1297 case SCU_COMPLETION_TYPE_TASK:
1298 scic_sds_controller_task_completion(scic, completion_entry);
1299 break;
1300
1301 case SCU_COMPLETION_TYPE_SDMA:
1302 scic_sds_controller_sdma_completion(scic, completion_entry);
1303 break;
1304
1305 case SCU_COMPLETION_TYPE_UFI:
1306 scic_sds_controller_unsolicited_frame(scic, completion_entry);
1307 break;
1308
1309 case SCU_COMPLETION_TYPE_EVENT:
1310 INCREMENT_EVENT_QUEUE_GET(scic, event_index, event_cycle);
1311 scic_sds_controller_event_completion(scic, completion_entry);
1312 break;
1313
1314 case SCU_COMPLETION_TYPE_NOTIFY:
1315 /*
1316 * Presently we do the same thing with a notify event that we do with the
1317 * other event codes. */
1318 INCREMENT_EVENT_QUEUE_GET(scic, event_index, event_cycle);
1319 scic_sds_controller_event_completion(scic, completion_entry);
1320 break;
1321
1322 default:
1323 dev_warn(scic_to_dev(scic),
1324 "%s: SCIC Controller received unknown "
1325 "completion type %x\n",
1326 __func__,
1327 completion_entry);
1328 break;
1329 }
1330 }
1331
1332 /* Update the get register if we completed one or more entries */
1333 if (completion_count > 0) {
1334 scic->completion_queue_get =
1335 SMU_CQGR_GEN_BIT(ENABLE) |
1336 SMU_CQGR_GEN_BIT(EVENT_ENABLE) |
1337 event_cycle |
1338 SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index) |
1339 get_cycle |
1340 SMU_CQGR_GEN_VAL(POINTER, get_index);
1341
1342 writel(scic->completion_queue_get,
1343 &scic->smu_registers->completion_queue_get);
1344
1345 }
1346
1347 dev_dbg(scic_to_dev(scic),
1348 "%s: completion queue ending get:0x%08x\n",
1349 __func__,
1350 scic->completion_queue_get);
1351
1352}
1353
1354bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1355{
1356 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1357 return true;
1358 } else {
1359 /*
1360 * we have a spurious interrupt it could be that we have already
1361 * emptied the completion queue from a previous interrupt */
1362 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
1363
1364 /*
1365 * There is a race in the hardware that could cause us not to be notified
1366 * of an interrupt completion if we do not take this step. We will mask
1367 * then unmask the interrupts so if there is another interrupt pending
1368 * the clearing of the interrupt source we get the next interrupt message. */
1369 writel(0xFF000000, &scic->smu_registers->interrupt_mask);
1370 writel(0, &scic->smu_registers->interrupt_mask);
1371 }
1372
1373 return false;
1374}
1375
1376void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1377{
1378 /* Empty out the completion queue */
1379 if (scic_sds_controller_completion_queue_has_entries(scic))
1380 scic_sds_controller_process_completions(scic);
1381
1382 /* Clear the interrupt and enable all interrupts again */
1383 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
1384 /* Could we write the value of SMU_ISR_COMPLETION? */
1385 writel(0xFF000000, &scic->smu_registers->interrupt_mask);
1386 writel(0, &scic->smu_registers->interrupt_mask);
1387}
1388
1389bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1390{
1391 u32 interrupt_status;
1392
1393 interrupt_status =
1394 readl(&scic->smu_registers->interrupt_status);
1395 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1396
1397 if (interrupt_status != 0) {
1398 /*
1399 * There is an error interrupt pending so let it through and handle
1400 * in the callback */
1401 return true;
1402 }
1403
1404 /*
1405 * There is a race in the hardware that could cause us not to be notified
1406 * of an interrupt completion if we do not take this step. We will mask
1407 * then unmask the error interrupts so if there was another interrupt
1408 * pending we will be notified.
1409 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1410 writel(0xff, &scic->smu_registers->interrupt_mask);
1411 writel(0, &scic->smu_registers->interrupt_mask);
1412
1413 return false;
1414}
1415
1416void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1417{
1418 u32 interrupt_status;
1419
1420 interrupt_status =
1421 readl(&scic->smu_registers->interrupt_status);
1422
1423 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1424 scic_sds_controller_completion_queue_has_entries(scic)) {
1425
1426 scic_sds_controller_process_completions(scic);
1427 writel(SMU_ISR_QUEUE_SUSPEND, &scic->smu_registers->interrupt_status);
1428 } else {
1429 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1430 interrupt_status);
1431
1432 sci_base_state_machine_change_state(&scic->state_machine,
1433 SCI_BASE_CONTROLLER_STATE_FAILED);
1434
1435 return;
1436 }
1437
1438 /* If we dont process any completions I am not sure that we want to do this.
1439 * We are in the middle of a hardware fault and should probably be reset.
1440 */
1441 writel(0, &scic->smu_registers->interrupt_mask);
1442}
1443
1444
1445
1446
1447void scic_sds_controller_link_up(struct scic_sds_controller *scic,
1448 struct scic_sds_port *port, struct scic_sds_phy *phy)
1449{
1450 switch (scic->state_machine.current_state_id) {
1451 case SCI_BASE_CONTROLLER_STATE_STARTING:
1452 scic_sds_controller_phy_timer_stop(scic);
1453 scic->port_agent.link_up_handler(scic, &scic->port_agent,
1454 port, phy);
1455 scic_sds_controller_start_next_phy(scic);
1456 break;
1457 case SCI_BASE_CONTROLLER_STATE_READY:
1458 scic->port_agent.link_up_handler(scic, &scic->port_agent,
1459 port, phy);
1460 break;
1461 default:
1462 dev_dbg(scic_to_dev(scic),
1463 "%s: SCIC Controller linkup event from phy %d in "
1464 "unexpected state %d\n", __func__, phy->phy_index,
1465 scic->state_machine.current_state_id);
1466 }
1467}
1468
1469void scic_sds_controller_link_down(struct scic_sds_controller *scic,
1470 struct scic_sds_port *port, struct scic_sds_phy *phy)
1471{
1472 switch (scic->state_machine.current_state_id) {
1473 case SCI_BASE_CONTROLLER_STATE_STARTING:
1474 case SCI_BASE_CONTROLLER_STATE_READY:
1475 scic->port_agent.link_down_handler(scic, &scic->port_agent,
1476 port, phy);
1477 break;
1478 default:
1479 dev_dbg(scic_to_dev(scic),
1480 "%s: SCIC Controller linkdown event from phy %d in "
1481 "unexpected state %d\n",
1482 __func__,
1483 phy->phy_index,
1484 scic->state_machine.current_state_id);
1485 }
1486}
1487
1488/**
1489 * This is a helper method to determine if any remote devices on this
1490 * controller are still in the stopping state.
1491 *
1492 */
1493static bool scic_sds_controller_has_remote_devices_stopping(
1494 struct scic_sds_controller *controller)
1495{
1496 u32 index;
1497
1498 for (index = 0; index < controller->remote_node_entries; index++) {
1499 if ((controller->device_table[index] != NULL) &&
1500 (controller->device_table[index]->state_machine.current_state_id
1501 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
1502 return true;
1503 }
1504
1505 return false;
1506}
1507
1508/**
1509 * This method is called by the remote device to inform the controller
1510 * object that the remote device has stopped.
1511 */
1512void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
1513 struct scic_sds_remote_device *sci_dev)
1514{
1515 if (scic->state_machine.current_state_id !=
1516 SCI_BASE_CONTROLLER_STATE_STOPPING) {
1517 dev_dbg(scic_to_dev(scic),
1518 "SCIC Controller 0x%p remote device stopped event "
1519 "from device 0x%p in unexpected state %d\n",
1520 scic, sci_dev,
1521 scic->state_machine.current_state_id);
1522 return;
1523 }
1524
1525 if (!scic_sds_controller_has_remote_devices_stopping(scic)) {
1526 sci_base_state_machine_change_state(&scic->state_machine,
1527 SCI_BASE_CONTROLLER_STATE_STOPPED);
1528 }
1529}
1530
1531/**
1532 * This method will write to the SCU PCP register the request value. The method
1533 * is used to suspend/resume ports, devices, and phys.
1534 * @scic:
1535 *
1536 *
1537 */
1538void scic_sds_controller_post_request(
1539 struct scic_sds_controller *scic,
1540 u32 request)
1541{
1542 dev_dbg(scic_to_dev(scic),
1543 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1544 __func__,
1545 scic,
1546 request);
1547
1548 writel(request, &scic->smu_registers->post_context_port);
1549}
1550
1551/**
1552 * This method will copy the soft copy of the task context into the physical
1553 * memory accessible by the controller.
1554 * @scic: This parameter specifies the controller for which to copy
1555 * the task context.
1556 * @sci_req: This parameter specifies the request for which the task
1557 * context is being copied.
1558 *
1559 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1560 * the physical memory version of the task context. Thus, all subsequent
1561 * updates to the task context are performed in the TC table (i.e. DMAable
1562 * memory). none
1563 */
1564void scic_sds_controller_copy_task_context(
1565 struct scic_sds_controller *scic,
1566 struct scic_sds_request *sci_req)
1567{
1568 struct scu_task_context *task_context_buffer;
1569
1570 task_context_buffer = scic_sds_controller_get_task_context_buffer(
1571 scic, sci_req->io_tag);
1572
1573 memcpy(task_context_buffer,
1574 sci_req->task_context_buffer,
1575 offsetof(struct scu_task_context, sgl_snapshot_ac));
1576
1577 /*
1578 * Now that the soft copy of the TC has been copied into the TC
1579 * table accessible by the silicon. Thus, any further changes to
1580 * the TC (e.g. TC termination) occur in the appropriate location. */
1581 sci_req->task_context_buffer = task_context_buffer;
1582}
1583
1584/**
1585 * This method returns the task context buffer for the given io tag.
1586 * @scic:
1587 * @io_tag:
1588 *
1589 * struct scu_task_context*
1590 */
1591struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1592 struct scic_sds_controller *scic,
1593 u16 io_tag
1594 ) {
1595 u16 task_index = scic_sds_io_tag_get_index(io_tag);
1596
1597 if (task_index < scic->task_context_entries) {
1598 return &scic->task_context_table[task_index];
1599 }
1600
1601 return NULL;
1602}
1603
1604struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic,
1605 u16 io_tag)
1606{
1607 u16 task_index;
1608 u16 task_sequence;
1609
1610 task_index = scic_sds_io_tag_get_index(io_tag);
1611
1612 if (task_index < scic->task_context_entries) {
1613 if (scic->io_request_table[task_index] != NULL) {
1614 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1615
1616 if (task_sequence == scic->io_request_sequence[task_index]) {
1617 return scic->io_request_table[task_index];
1618 }
1619 }
1620 }
1621
1622 return NULL;
1623}
1624
1625/**
1626 * This method allocates remote node index and the reserves the remote node
1627 * context space for use. This method can fail if there are no more remote
1628 * node index available.
1629 * @scic: This is the controller object which contains the set of
1630 * free remote node ids
1631 * @sci_dev: This is the device object which is requesting the a remote node
1632 * id
1633 * @node_id: This is the remote node id that is assinged to the device if one
1634 * is available
1635 *
1636 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1637 * node index available.
1638 */
1639enum sci_status scic_sds_controller_allocate_remote_node_context(
1640 struct scic_sds_controller *scic,
1641 struct scic_sds_remote_device *sci_dev,
1642 u16 *node_id)
1643{
1644 u16 node_index;
1645 u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
1646
1647 node_index = scic_sds_remote_node_table_allocate_remote_node(
1648 &scic->available_remote_nodes, remote_node_count
1649 );
1650
1651 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1652 scic->device_table[node_index] = sci_dev;
1653
1654 *node_id = node_index;
1655
1656 return SCI_SUCCESS;
1657 }
1658
1659 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1660}
1661
1662/**
1663 * This method frees the remote node index back to the available pool. Once
1664 * this is done the remote node context buffer is no longer valid and can
1665 * not be used.
1666 * @scic:
1667 * @sci_dev:
1668 * @node_id:
1669 *
1670 */
1671void scic_sds_controller_free_remote_node_context(
1672 struct scic_sds_controller *scic,
1673 struct scic_sds_remote_device *sci_dev,
1674 u16 node_id)
1675{
1676 u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
1677
1678 if (scic->device_table[node_id] == sci_dev) {
1679 scic->device_table[node_id] = NULL;
1680
1681 scic_sds_remote_node_table_release_remote_node_index(
1682 &scic->available_remote_nodes, remote_node_count, node_id
1683 );
1684 }
1685}
1686
1687/**
1688 * This method returns the union scu_remote_node_context for the specified remote
1689 * node id.
1690 * @scic:
1691 * @node_id:
1692 *
1693 * union scu_remote_node_context*
1694 */
1695union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1696 struct scic_sds_controller *scic,
1697 u16 node_id
1698 ) {
1699 if (
1700 (node_id < scic->remote_node_entries)
1701 && (scic->device_table[node_id] != NULL)
1702 ) {
1703 return &scic->remote_node_context_table[node_id];
1704 }
1705
1706 return NULL;
1707}
1708
1709/**
1710 *
1711 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1712 * constructed.
1713 * @frame_header: This is the frame header returned by the hardware.
1714 * @frame_buffer: This is the frame buffer returned by the hardware.
1715 *
1716 * This method will combind the frame header and frame buffer to create a SATA
1717 * D2H register FIS none
1718 */
1719void scic_sds_controller_copy_sata_response(
1720 void *response_buffer,
1721 void *frame_header,
1722 void *frame_buffer)
1723{
1724 memcpy(response_buffer, frame_header, sizeof(u32));
1725
1726 memcpy(response_buffer + sizeof(u32),
1727 frame_buffer,
1728 sizeof(struct dev_to_host_fis) - sizeof(u32));
1729}
1730
1731/**
1732 * This method releases the frame once this is done the frame is available for
1733 * re-use by the hardware. The data contained in the frame header and frame
1734 * buffer is no longer valid. The UF queue get pointer is only updated if UF
1735 * control indicates this is appropriate.
1736 * @scic:
1737 * @frame_index:
1738 *
1739 */
1740void scic_sds_controller_release_frame(
1741 struct scic_sds_controller *scic,
1742 u32 frame_index)
1743{
1744 if (scic_sds_unsolicited_frame_control_release_frame(
1745 &scic->uf_control, frame_index) == true)
1746 writel(scic->uf_control.get,
1747 &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
1748}
1749
1750/**
1751 * This method sets user parameters and OEM parameters to default values.
1752 * Users can override these values utilizing the scic_user_parameters_set()
1753 * and scic_oem_parameters_set() methods.
1754 * @scic: This parameter specifies the controller for which to set the
1755 * configuration parameters to their default values.
1756 *
1757 */
1758static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1759{
1760 struct isci_host *ihost = scic_to_ihost(scic);
1761 u16 index;
1762
1763 /* Default to APC mode. */
1764 scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
1765
1766 /* Default to APC mode. */
1767 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1;
1768
1769 /* Default to no SSC operation. */
1770 scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1771
1772 /* Initialize all of the port parameter information to narrow ports. */
1773 for (index = 0; index < SCI_MAX_PORTS; index++) {
1774 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1775 }
1776
1777 /* Initialize all of the phy parameter information. */
1778 for (index = 0; index < SCI_MAX_PHYS; index++) {
1779 /* Default to 6G (i.e. Gen 3) for now. */
1780 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
1781
1782 /* the frequencies cannot be 0 */
1783 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1784 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1785 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1786
1787 /*
1788 * Previous Vitesse based expanders had a arbitration issue that
1789 * is worked around by having the upper 32-bits of SAS address
1790 * with a value greater then the Vitesse company identifier.
1791 * Hence, usage of 0x5FCFFFFF. */
1792 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id;
1793 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1794 }
1795
1796 scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1797 scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1798 scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1799 scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1800 scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1801}
1802
1803/**
1804 * scic_controller_get_suggested_start_timeout() - This method returns the
1805 * suggested scic_controller_start() timeout amount. The user is free to
1806 * use any timeout value, but this method provides the suggested minimum
1807 * start timeout value. The returned value is based upon empirical
1808 * information determined as a result of interoperability testing.
1809 * @controller: the handle to the controller object for which to return the
1810 * suggested start timeout.
1811 *
1812 * This method returns the number of milliseconds for the suggested start
1813 * operation timeout.
1814 */
1815u32 scic_controller_get_suggested_start_timeout(
1816 struct scic_sds_controller *sc)
1817{
1818 /* Validate the user supplied parameters. */
1819 if (sc == NULL)
1820 return 0;
1821
1822 /*
1823 * The suggested minimum timeout value for a controller start operation:
1824 *
1825 * Signature FIS Timeout
1826 * + Phy Start Timeout
1827 * + Number of Phy Spin Up Intervals
1828 * ---------------------------------
1829 * Number of milliseconds for the controller start operation.
1830 *
1831 * NOTE: The number of phy spin up intervals will be equivalent
1832 * to the number of phys divided by the number phys allowed
1833 * per interval - 1 (once OEM parameters are supported).
1834 * Currently we assume only 1 phy per interval. */
1835
1836 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
1837 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
1838 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1839}
1840
1841/**
1842 * scic_controller_stop() - This method will stop an individual controller
1843 * object.This method will invoke the associated user callback upon
1844 * completion. The completion callback is called when the following
1845 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
1846 * controller has been quiesced. This method will ensure that all IO
1847 * requests are quiesced, phys are stopped, and all additional operation by
1848 * the hardware is halted.
1849 * @controller: the handle to the controller object to stop.
1850 * @timeout: This parameter specifies the number of milliseconds in which the
1851 * stop operation should complete.
1852 *
1853 * The controller must be in the STARTED or STOPPED state. Indicate if the
1854 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1855 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1856 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1857 * controller is not either in the STARTED or STOPPED states.
1858 */
1859enum sci_status scic_controller_stop(
1860 struct scic_sds_controller *scic,
1861 u32 timeout)
1862{
1863 if (scic->state_machine.current_state_id !=
1864 SCI_BASE_CONTROLLER_STATE_READY) {
1865 dev_warn(scic_to_dev(scic),
1866 "SCIC Controller stop operation requested in "
1867 "invalid state\n");
1868 return SCI_FAILURE_INVALID_STATE;
1869 }
1870
1871 isci_timer_start(scic->timeout_timer, timeout);
1872 sci_base_state_machine_change_state(&scic->state_machine,
1873 SCI_BASE_CONTROLLER_STATE_STOPPING);
1874 return SCI_SUCCESS;
1875}
1876
1877/**
1878 * scic_controller_reset() - This method will reset the supplied core
1879 * controller regardless of the state of said controller. This operation is
1880 * considered destructive. In other words, all current operations are wiped
1881 * out. No IO completions for outstanding devices occur. Outstanding IO
1882 * requests are not aborted or completed at the actual remote device.
1883 * @controller: the handle to the controller object to reset.
1884 *
1885 * Indicate if the controller reset method succeeded or failed in some way.
1886 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1887 * the controller reset operation is unable to complete.
1888 */
1889enum sci_status scic_controller_reset(
1890 struct scic_sds_controller *scic)
1891{
1892 switch (scic->state_machine.current_state_id) {
1893 case SCI_BASE_CONTROLLER_STATE_RESET:
1894 case SCI_BASE_CONTROLLER_STATE_READY:
1895 case SCI_BASE_CONTROLLER_STATE_STOPPED:
1896 case SCI_BASE_CONTROLLER_STATE_FAILED:
1897 /*
1898 * The reset operation is not a graceful cleanup, just
1899 * perform the state transition.
1900 */
1901 sci_base_state_machine_change_state(&scic->state_machine,
1902 SCI_BASE_CONTROLLER_STATE_RESETTING);
1903 return SCI_SUCCESS;
1904 default:
1905 dev_warn(scic_to_dev(scic),
1906 "SCIC Controller reset operation requested in "
1907 "invalid state\n");
1908 return SCI_FAILURE_INVALID_STATE;
1909 }
1910}
1911
1912/**
1913 * scic_controller_start_io() - This method is called by the SCI user to
1914 * send/start an IO request. If the method invocation is successful, then
1915 * the IO request has been queued to the hardware for processing.
1916 * @controller: the handle to the controller object for which to start an IO
1917 * request.
1918 * @remote_device: the handle to the remote device object for which to start an
1919 * IO request.
1920 * @io_request: the handle to the io request object to start.
1921 * @io_tag: This parameter specifies a previously allocated IO tag that the
1922 * user desires to be utilized for this request. This parameter is optional.
1923 * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
1924 * for this parameter.
1925 *
1926 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
1927 * to ensure that each of the methods that may allocate or free available IO
1928 * tags are handled in a mutually exclusive manner. This method is one of said
1929 * methods requiring proper critical code section protection (e.g. semaphore,
1930 * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a
1931 * result, it is expected the user will have set the NCQ tag field in the host
1932 * to device register FIS prior to calling this method. There is also a
1933 * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
1934 * the scic_controller_start_io() method. scic_controller_allocate_tag() for
1935 * more information on allocating a tag. Indicate if the controller
1936 * successfully started the IO request. SCI_SUCCESS if the IO request was
1937 * successfully started. Determine the failure situations and return values.
1938 */
1939enum sci_status scic_controller_start_io(
1940 struct scic_sds_controller *scic,
1941 struct scic_sds_remote_device *rdev,
1942 struct scic_sds_request *req,
1943 u16 io_tag)
1944{
1945 enum sci_status status;
1946
1947 if (scic->state_machine.current_state_id !=
1948 SCI_BASE_CONTROLLER_STATE_READY) {
1949 dev_warn(scic_to_dev(scic), "invalid state to start I/O");
1950 return SCI_FAILURE_INVALID_STATE;
1951 }
1952
1953 status = scic_sds_remote_device_start_io(scic, rdev, req);
1954 if (status != SCI_SUCCESS)
1955 return status;
1956
1957 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
1958 scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(req));
1959 return SCI_SUCCESS;
1960}
1961
1962/**
1963 * scic_controller_terminate_request() - This method is called by the SCI Core
1964 * user to terminate an ongoing (i.e. started) core IO request. This does
1965 * not abort the IO request at the target, but rather removes the IO request
1966 * from the host controller.
1967 * @controller: the handle to the controller object for which to terminate a
1968 * request.
1969 * @remote_device: the handle to the remote device object for which to
1970 * terminate a request.
1971 * @request: the handle to the io or task management request object to
1972 * terminate.
1973 *
1974 * Indicate if the controller successfully began the terminate process for the
1975 * IO request. SCI_SUCCESS if the terminate process was successfully started
1976 * for the request. Determine the failure situations and return values.
1977 */
1978enum sci_status scic_controller_terminate_request(
1979 struct scic_sds_controller *scic,
1980 struct scic_sds_remote_device *rdev,
1981 struct scic_sds_request *req)
1982{
1983 enum sci_status status;
1984
1985 if (scic->state_machine.current_state_id !=
1986 SCI_BASE_CONTROLLER_STATE_READY) {
1987 dev_warn(scic_to_dev(scic),
1988 "invalid state to terminate request\n");
1989 return SCI_FAILURE_INVALID_STATE;
1990 }
1991
1992 status = scic_sds_io_request_terminate(req);
1993 if (status != SCI_SUCCESS)
1994 return status;
1995
1996 /*
1997 * Utilize the original post context command and or in the POST_TC_ABORT
1998 * request sub-type.
1999 */
2000 scic_sds_controller_post_request(scic,
2001 scic_sds_request_get_post_context(req) |
2002 SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);
2003 return SCI_SUCCESS;
2004}
2005
2006/**
2007 * scic_controller_complete_io() - This method will perform core specific
2008 * completion operations for an IO request. After this method is invoked,
2009 * the user should consider the IO request as invalid until it is properly
2010 * reused (i.e. re-constructed).
2011 * @controller: The handle to the controller object for which to complete the
2012 * IO request.
2013 * @remote_device: The handle to the remote device object for which to complete
2014 * the IO request.
2015 * @io_request: the handle to the io request object to complete.
2016 *
2017 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2018 * to ensure that each of the methods that may allocate or free available IO
2019 * tags are handled in a mutually exclusive manner. This method is one of said
2020 * methods requiring proper critical code section protection (e.g. semaphore,
2021 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2022 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2023 * the responsibility of the caller to invoke the scic_controller_free_io_tag()
2024 * method to free the tag (i.e. this method will not free the IO tag). Indicate
2025 * if the controller successfully completed the IO request. SCI_SUCCESS if the
2026 * completion process was successful.
2027 */
2028enum sci_status scic_controller_complete_io(
2029 struct scic_sds_controller *scic,
2030 struct scic_sds_remote_device *rdev,
2031 struct scic_sds_request *request)
2032{
2033 enum sci_status status;
2034 u16 index;
2035
2036 switch (scic->state_machine.current_state_id) {
2037 case SCI_BASE_CONTROLLER_STATE_STOPPING:
2038 /* XXX: Implement this function */
2039 return SCI_FAILURE;
2040 case SCI_BASE_CONTROLLER_STATE_READY:
2041 status = scic_sds_remote_device_complete_io(scic, rdev, request);
2042 if (status != SCI_SUCCESS)
2043 return status;
2044
2045 index = scic_sds_io_tag_get_index(request->io_tag);
2046 scic->io_request_table[index] = NULL;
2047 return SCI_SUCCESS;
2048 default:
2049 dev_warn(scic_to_dev(scic), "invalid state to complete I/O");
2050 return SCI_FAILURE_INVALID_STATE;
2051 }
2052
2053}
2054
2055enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req)
2056{
2057 struct scic_sds_controller *scic = sci_req->owning_controller;
2058
2059 if (scic->state_machine.current_state_id !=
2060 SCI_BASE_CONTROLLER_STATE_READY) {
2061 dev_warn(scic_to_dev(scic), "invalid state to continue I/O");
2062 return SCI_FAILURE_INVALID_STATE;
2063 }
2064
2065 scic->io_request_table[scic_sds_io_tag_get_index(sci_req->io_tag)] = sci_req;
2066 scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(sci_req));
2067 return SCI_SUCCESS;
2068}
2069
2070/**
2071 * scic_controller_start_task() - This method is called by the SCIC user to
2072 * send/start a framework task management request.
2073 * @controller: the handle to the controller object for which to start the task
2074 * management request.
2075 * @remote_device: the handle to the remote device object for which to start
2076 * the task management request.
2077 * @task_request: the handle to the task request object to start.
2078 * @io_tag: This parameter specifies a previously allocated IO tag that the
2079 * user desires to be utilized for this request. Note this not the io_tag
2080 * of the request being managed. It is to be utilized for the task request
2081 * itself. This parameter is optional. The user is allowed to supply
2082 * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
2083 *
2084 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2085 * to ensure that each of the methods that may allocate or free available IO
2086 * tags are handled in a mutually exclusive manner. This method is one of said
2087 * methods requiring proper critical code section protection (e.g. semaphore,
2088 * spin-lock, etc.). - The user must synchronize this task with completion
2089 * queue processing. If they are not synchronized then it is possible for the
2090 * io requests that are being managed by the task request can complete before
2091 * starting the task request. scic_controller_allocate_tag() for more
2092 * information on allocating a tag. Indicate if the controller successfully
2093 * started the IO request. SCI_TASK_SUCCESS if the task request was
2094 * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
2095 * returned if there is/are task(s) outstanding that require termination or
2096 * completion before this request can succeed.
2097 */
2098enum sci_task_status scic_controller_start_task(
2099 struct scic_sds_controller *scic,
2100 struct scic_sds_remote_device *rdev,
2101 struct scic_sds_request *req,
2102 u16 task_tag)
2103{
2104 enum sci_status status;
2105
2106 if (scic->state_machine.current_state_id !=
2107 SCI_BASE_CONTROLLER_STATE_READY) {
2108 dev_warn(scic_to_dev(scic),
2109 "%s: SCIC Controller starting task from invalid "
2110 "state\n",
2111 __func__);
2112 return SCI_TASK_FAILURE_INVALID_STATE;
2113 }
2114
2115 status = scic_sds_remote_device_start_task(scic, rdev, req);
2116 switch (status) {
2117 case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS:
2118 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
2119
2120 /*
2121 * We will let framework know this task request started successfully,
2122 * although core is still woring on starting the request (to post tc when
2123 * RNC is resumed.)
2124 */
2125 return SCI_SUCCESS;
2126 case SCI_SUCCESS:
2127 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
2128
2129 scic_sds_controller_post_request(scic,
2130 scic_sds_request_get_post_context(req));
2131 break;
2132 default:
2133 break;
2134 }
2135
2136 return status;
2137}
2138
2139/**
2140 * scic_controller_allocate_io_tag() - This method will allocate a tag from the
2141 * pool of free IO tags. Direct allocation of IO tags by the SCI Core user
2142 * is optional. The scic_controller_start_io() method will allocate an IO
2143 * tag if this method is not utilized and the tag is not supplied to the IO
2144 * construct routine. Direct allocation of IO tags may provide additional
2145 * performance improvements in environments capable of supporting this usage
2146 * model. Additionally, direct allocation of IO tags also provides
2147 * additional flexibility to the SCI Core user. Specifically, the user may
2148 * retain IO tags across the lives of multiple IO requests.
2149 * @controller: the handle to the controller object for which to allocate the
2150 * tag.
2151 *
2152 * IO tags are a protected resource. It is incumbent upon the SCI Core user to
2153 * ensure that each of the methods that may allocate or free available IO tags
2154 * are handled in a mutually exclusive manner. This method is one of said
2155 * methods requiring proper critical code section protection (e.g. semaphore,
2156 * spin-lock, etc.). An unsigned integer representing an available IO tag.
2157 * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
2158 * currently available tags to be allocated. All return other values indicate a
2159 * legitimate tag.
2160 */
2161u16 scic_controller_allocate_io_tag(
2162 struct scic_sds_controller *scic)
2163{
2164 u16 task_context;
2165 u16 sequence_count;
2166
2167 if (!sci_pool_empty(scic->tci_pool)) {
2168 sci_pool_get(scic->tci_pool, task_context);
2169
2170 sequence_count = scic->io_request_sequence[task_context];
2171
2172 return scic_sds_io_tag_construct(sequence_count, task_context);
2173 }
2174
2175 return SCI_CONTROLLER_INVALID_IO_TAG;
2176}
2177
2178/**
2179 * scic_controller_free_io_tag() - This method will free an IO tag to the pool
2180 * of free IO tags. This method provides the SCI Core user more flexibility
2181 * with regards to IO tags. The user may desire to keep an IO tag after an
2182 * IO request has completed, because they plan on re-using the tag for a
2183 * subsequent IO request. This method is only legal if the tag was
2184 * allocated via scic_controller_allocate_io_tag().
2185 * @controller: This parameter specifies the handle to the controller object
2186 * for which to free/return the tag.
2187 * @io_tag: This parameter represents the tag to be freed to the pool of
2188 * available tags.
2189 *
2190 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2191 * to ensure that each of the methods that may allocate or free available IO
2192 * tags are handled in a mutually exclusive manner. This method is one of said
2193 * methods requiring proper critical code section protection (e.g. semaphore,
2194 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
2195 * Core user, using the scic_controller_allocate_io_tag() method, then it is
2196 * the responsibility of the caller to invoke this method to free the tag. This
2197 * method returns an indication of whether the tag was successfully put back
2198 * (freed) to the pool of available tags. SCI_SUCCESS This return value
2199 * indicates the tag was successfully placed into the pool of available IO
2200 * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
2201 * is not a valid IO tag value.
2202 */
2203enum sci_status scic_controller_free_io_tag(
2204 struct scic_sds_controller *scic,
2205 u16 io_tag)
2206{
2207 u16 sequence;
2208 u16 index;
2209
2210 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2211
2212 sequence = scic_sds_io_tag_get_sequence(io_tag);
2213 index = scic_sds_io_tag_get_index(io_tag);
2214
2215 if (!sci_pool_full(scic->tci_pool)) {
2216 if (sequence == scic->io_request_sequence[index]) {
2217 scic_sds_io_sequence_increment(
2218 scic->io_request_sequence[index]);
2219
2220 sci_pool_put(scic->tci_pool, index);
2221
2222 return SCI_SUCCESS;
2223 }
2224 }
2225
2226 return SCI_FAILURE_INVALID_IO_TAG;
2227}
2228
2229void scic_controller_enable_interrupts(
2230 struct scic_sds_controller *scic)
2231{
2232 BUG_ON(scic->smu_registers == NULL);
2233 writel(0, &scic->smu_registers->interrupt_mask);
2234}
2235
2236void scic_controller_disable_interrupts(
2237 struct scic_sds_controller *scic)
2238{
2239 BUG_ON(scic->smu_registers == NULL);
2240 writel(0xffffffff, &scic->smu_registers->interrupt_mask);
2241}
2242
2243static enum sci_status scic_controller_set_mode(
2244 struct scic_sds_controller *scic,
2245 enum sci_controller_mode operating_mode)
2246{
2247 enum sci_status status = SCI_SUCCESS;
2248
2249 if ((scic->state_machine.current_state_id ==
2250 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2251 (scic->state_machine.current_state_id ==
2252 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2253 switch (operating_mode) {
2254 case SCI_MODE_SPEED:
2255 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2256 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2257 scic->uf_control.buffers.count =
2258 SCU_UNSOLICITED_FRAME_COUNT;
2259 scic->completion_event_entries = SCU_EVENT_COUNT;
2260 scic->completion_queue_entries =
2261 SCU_COMPLETION_QUEUE_COUNT;
2262 break;
2263
2264 case SCI_MODE_SIZE:
2265 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2266 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2267 scic->uf_control.buffers.count =
2268 SCU_MIN_UNSOLICITED_FRAMES;
2269 scic->completion_event_entries = SCU_MIN_EVENTS;
2270 scic->completion_queue_entries =
2271 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2272 break;
2273
2274 default:
2275 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2276 break;
2277 }
2278 } else
2279 status = SCI_FAILURE_INVALID_STATE;
2280
2281 return status;
2282}
2283
2284/**
2285 * scic_sds_controller_reset_hardware() -
2286 *
2287 * This method will reset the controller hardware.
2288 */
2289static void scic_sds_controller_reset_hardware(
2290 struct scic_sds_controller *scic)
2291{
2292 /* Disable interrupts so we dont take any spurious interrupts */
2293 scic_controller_disable_interrupts(scic);
2294
2295 /* Reset the SCU */
2296 writel(0xFFFFFFFF, &scic->smu_registers->soft_reset_control);
2297
2298 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2299 udelay(1000);
2300
2301 /* The write to the CQGR clears the CQP */
2302 writel(0x00000000, &scic->smu_registers->completion_queue_get);
2303
2304 /* The write to the UFQGP clears the UFQPR */
2305 writel(0, &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
2306}
2307
2308enum sci_status scic_user_parameters_set(
2309 struct scic_sds_controller *scic,
2310 union scic_user_parameters *scic_parms)
2311{
2312 u32 state = scic->state_machine.current_state_id;
2313
2314 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
2315 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
2316 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2317 u16 index;
2318
2319 /*
2320 * Validate the user parameters. If they are not legal, then
2321 * return a failure.
2322 */
2323 for (index = 0; index < SCI_MAX_PHYS; index++) {
2324 struct sci_phy_user_params *user_phy;
2325
2326 user_phy = &scic_parms->sds1.phys[index];
2327
2328 if (!((user_phy->max_speed_generation <=
2329 SCIC_SDS_PARM_MAX_SPEED) &&
2330 (user_phy->max_speed_generation >
2331 SCIC_SDS_PARM_NO_SPEED)))
2332 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2333
2334 if (user_phy->in_connection_align_insertion_frequency <
2335 3)
2336 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2337
2338 if ((user_phy->in_connection_align_insertion_frequency <
2339 3) ||
2340 (user_phy->align_insertion_frequency == 0) ||
2341 (user_phy->
2342 notify_enable_spin_up_insertion_frequency ==
2343 0))
2344 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2345 }
2346
2347 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2348 (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2349 (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2350 (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2351 (scic_parms->sds1.no_outbound_task_timeout == 0))
2352 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2353
2354 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2355
2356 return SCI_SUCCESS;
2357 }
2358
2359 return SCI_FAILURE_INVALID_STATE;
2360}
2361
2362int scic_oem_parameters_validate(struct scic_sds_oem_params *oem)
2363{
2364 int i;
2365
2366 for (i = 0; i < SCI_MAX_PORTS; i++)
2367 if (oem->ports[i].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX)
2368 return -EINVAL;
2369
2370 for (i = 0; i < SCI_MAX_PHYS; i++)
2371 if (oem->phys[i].sas_address.high == 0 &&
2372 oem->phys[i].sas_address.low == 0)
2373 return -EINVAL;
2374
2375 if (oem->controller.mode_type == SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
2376 for (i = 0; i < SCI_MAX_PHYS; i++)
2377 if (oem->ports[i].phy_mask != 0)
2378 return -EINVAL;
2379 } else if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
2380 u8 phy_mask = 0;
2381
2382 for (i = 0; i < SCI_MAX_PHYS; i++)
2383 phy_mask |= oem->ports[i].phy_mask;
2384
2385 if (phy_mask == 0)
2386 return -EINVAL;
2387 } else
2388 return -EINVAL;
2389
2390 if (oem->controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
2391 return -EINVAL;
2392
2393 return 0;
2394}
2395
2396enum sci_status scic_oem_parameters_set(struct scic_sds_controller *scic,
2397 union scic_oem_parameters *scic_parms)
2398{
2399 u32 state = scic->state_machine.current_state_id;
2400
2401 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
2402 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
2403 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2404
2405 if (scic_oem_parameters_validate(&scic_parms->sds1))
2406 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2407 scic->oem_parameters.sds1 = scic_parms->sds1;
2408
2409 return SCI_SUCCESS;
2410 }
2411
2412 return SCI_FAILURE_INVALID_STATE;
2413}
2414
2415void scic_oem_parameters_get(
2416 struct scic_sds_controller *scic,
2417 union scic_oem_parameters *scic_parms)
2418{
2419 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2420}
2421
2422#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2423#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2424#define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
2425#define INTERRUPT_COALESCE_NUMBER_MAX 256
2426#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
2427#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
2428
2429/**
2430 * scic_controller_set_interrupt_coalescence() - This method allows the user to
2431 * configure the interrupt coalescence.
2432 * @controller: This parameter represents the handle to the controller object
2433 * for which its interrupt coalesce register is overridden.
2434 * @coalesce_number: Used to control the number of entries in the Completion
2435 * Queue before an interrupt is generated. If the number of entries exceed
2436 * this number, an interrupt will be generated. The valid range of the input
2437 * is [0, 256]. A setting of 0 results in coalescing being disabled.
2438 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
2439 * input is [0, 2700000] . A setting of 0 is allowed and results in no
2440 * interrupt coalescing timeout.
2441 *
2442 * Indicate if the user successfully set the interrupt coalesce parameters.
2443 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
2444 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
2445 */
2446static enum sci_status scic_controller_set_interrupt_coalescence(
2447 struct scic_sds_controller *scic_controller,
2448 u32 coalesce_number,
2449 u32 coalesce_timeout)
2450{
2451 u8 timeout_encode = 0;
2452 u32 min = 0;
2453 u32 max = 0;
2454
2455 /* Check if the input parameters fall in the range. */
2456 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2457 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2458
2459 /*
2460 * Defined encoding for interrupt coalescing timeout:
2461 * Value Min Max Units
2462 * ----- --- --- -----
2463 * 0 - - Disabled
2464 * 1 13.3 20.0 ns
2465 * 2 26.7 40.0
2466 * 3 53.3 80.0
2467 * 4 106.7 160.0
2468 * 5 213.3 320.0
2469 * 6 426.7 640.0
2470 * 7 853.3 1280.0
2471 * 8 1.7 2.6 us
2472 * 9 3.4 5.1
2473 * 10 6.8 10.2
2474 * 11 13.7 20.5
2475 * 12 27.3 41.0
2476 * 13 54.6 81.9
2477 * 14 109.2 163.8
2478 * 15 218.5 327.7
2479 * 16 436.9 655.4
2480 * 17 873.8 1310.7
2481 * 18 1.7 2.6 ms
2482 * 19 3.5 5.2
2483 * 20 7.0 10.5
2484 * 21 14.0 21.0
2485 * 22 28.0 41.9
2486 * 23 55.9 83.9
2487 * 24 111.8 167.8
2488 * 25 223.7 335.5
2489 * 26 447.4 671.1
2490 * 27 894.8 1342.2
2491 * 28 1.8 2.7 s
2492 * Others Undefined */
2493
2494 /*
2495 * Use the table above to decide the encode of interrupt coalescing timeout
2496 * value for register writing. */
2497 if (coalesce_timeout == 0)
2498 timeout_encode = 0;
2499 else{
2500 /* make the timeout value in unit of (10 ns). */
2501 coalesce_timeout = coalesce_timeout * 100;
2502 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2503 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2504
2505 /* get the encode of timeout for register writing. */
2506 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2507 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2508 timeout_encode++) {
2509 if (min <= coalesce_timeout && max > coalesce_timeout)
2510 break;
2511 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2512 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2513 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2514 break;
2515 else{
2516 timeout_encode++;
2517 break;
2518 }
2519 } else {
2520 max = max * 2;
2521 min = min * 2;
2522 }
2523 }
2524
2525 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2526 /* the value is out of range. */
2527 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2528 }
2529
2530 writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2531 SMU_ICC_GEN_VAL(TIMER, timeout_encode),
2532 &scic_controller->smu_registers->interrupt_coalesce_control);
2533
2534
2535 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2536 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2537
2538 return SCI_SUCCESS;
2539}
2540
2541
2542
2543enum sci_status scic_controller_initialize(struct scic_sds_controller *scic)
2544{
2545 struct sci_base_state_machine *sm = &scic->state_machine;
2546 enum sci_status result = SCI_SUCCESS;
2547 struct isci_host *ihost = scic_to_ihost(scic);
2548 u32 index, state;
2549
2550 if (scic->state_machine.current_state_id !=
2551 SCI_BASE_CONTROLLER_STATE_RESET) {
2552 dev_warn(scic_to_dev(scic),
2553 "SCIC Controller initialize operation requested "
2554 "in invalid state\n");
2555 return SCI_FAILURE_INVALID_STATE;
2556 }
2557
2558 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_INITIALIZING);
2559
2560 scic->timeout_timer = isci_timer_create(ihost,
2561 scic,
2562 scic_sds_controller_timeout_handler);
2563
2564 scic_sds_controller_initialize_phy_startup(scic);
2565
2566 scic_sds_controller_initialize_power_control(scic);
2567
2568 /*
2569 * There is nothing to do here for B0 since we do not have to
2570 * program the AFE registers.
2571 * / @todo The AFE settings are supposed to be correct for the B0 but
2572 * / presently they seem to be wrong. */
2573 scic_sds_controller_afe_initialization(scic);
2574
2575 if (result == SCI_SUCCESS) {
2576 u32 status;
2577 u32 terminate_loop;
2578
2579 /* Take the hardware out of reset */
2580 writel(0, &scic->smu_registers->soft_reset_control);
2581
2582 /*
2583 * / @todo Provide meaningfull error code for hardware failure
2584 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2585 result = SCI_FAILURE;
2586 terminate_loop = 100;
2587
2588 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2589 /* Loop until the hardware reports success */
2590 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2591 status = readl(&scic->smu_registers->control_status);
2592
2593 if ((status & SCU_RAM_INIT_COMPLETED) ==
2594 SCU_RAM_INIT_COMPLETED)
2595 result = SCI_SUCCESS;
2596 }
2597 }
2598
2599 if (result == SCI_SUCCESS) {
2600 u32 max_supported_ports;
2601 u32 max_supported_devices;
2602 u32 max_supported_io_requests;
2603 u32 device_context_capacity;
2604
2605 /*
2606 * Determine what are the actaul device capacities that the
2607 * hardware will support */
2608 device_context_capacity =
2609 readl(&scic->smu_registers->device_context_capacity);
2610
2611
2612 max_supported_ports = smu_dcc_get_max_ports(device_context_capacity);
2613 max_supported_devices = smu_dcc_get_max_remote_node_context(device_context_capacity);
2614 max_supported_io_requests = smu_dcc_get_max_task_context(device_context_capacity);
2615
2616 /*
2617 * Make all PEs that are unassigned match up with the
2618 * logical ports
2619 */
2620 for (index = 0; index < max_supported_ports; index++) {
2621 struct scu_port_task_scheduler_group_registers __iomem
2622 *ptsg = &scic->scu_registers->peg0.ptsg;
2623
2624 writel(index, &ptsg->protocol_engine[index]);
2625 }
2626
2627 /* Record the smaller of the two capacity values */
2628 scic->logical_port_entries =
2629 min(max_supported_ports, scic->logical_port_entries);
2630
2631 scic->task_context_entries =
2632 min(max_supported_io_requests,
2633 scic->task_context_entries);
2634
2635 scic->remote_node_entries =
2636 min(max_supported_devices, scic->remote_node_entries);
2637
2638 /*
2639 * Now that we have the correct hardware reported minimum values
2640 * build the MDL for the controller. Default to a performance
2641 * configuration.
2642 */
2643 scic_controller_set_mode(scic, SCI_MODE_SPEED);
2644 }
2645
2646 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2647 if (result == SCI_SUCCESS) {
2648 u32 dma_configuration;
2649
2650 /* Configure the payload DMA */
2651 dma_configuration =
2652 readl(&scic->scu_registers->sdma.pdma_configuration);
2653 dma_configuration |=
2654 SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2655 writel(dma_configuration,
2656 &scic->scu_registers->sdma.pdma_configuration);
2657
2658 /* Configure the control DMA */
2659 dma_configuration =
2660 readl(&scic->scu_registers->sdma.cdma_configuration);
2661 dma_configuration |=
2662 SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2663 writel(dma_configuration,
2664 &scic->scu_registers->sdma.cdma_configuration);
2665 }
2666
2667 /*
2668 * Initialize the PHYs before the PORTs because the PHY registers
2669 * are accessed during the port initialization.
2670 */
2671 if (result == SCI_SUCCESS) {
2672 /* Initialize the phys */
2673 for (index = 0;
2674 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2675 index++) {
2676 result = scic_sds_phy_initialize(
2677 &ihost->phys[index].sci,
2678 &scic->scu_registers->peg0.pe[index].tl,
2679 &scic->scu_registers->peg0.pe[index].ll);
2680 }
2681 }
2682
2683 if (result == SCI_SUCCESS) {
2684 /* Initialize the logical ports */
2685 for (index = 0;
2686 (index < scic->logical_port_entries) &&
2687 (result == SCI_SUCCESS);
2688 index++) {
2689 result = scic_sds_port_initialize(
2690 &ihost->ports[index].sci,
2691 &scic->scu_registers->peg0.ptsg.port[index],
2692 &scic->scu_registers->peg0.ptsg.protocol_engine,
2693 &scic->scu_registers->peg0.viit[index]);
2694 }
2695 }
2696
2697 if (result == SCI_SUCCESS)
2698 result = scic_sds_port_configuration_agent_initialize(
2699 scic,
2700 &scic->port_agent);
2701
2702 /* Advance the controller state machine */
2703 if (result == SCI_SUCCESS)
2704 state = SCI_BASE_CONTROLLER_STATE_INITIALIZED;
2705 else
2706 state = SCI_BASE_CONTROLLER_STATE_FAILED;
2707 sci_base_state_machine_change_state(sm, state);
2708
2709 return result;
2710}
2711
2712enum sci_status scic_controller_start(struct scic_sds_controller *scic,
2713 u32 timeout)
2714{
2715 struct isci_host *ihost = scic_to_ihost(scic);
2716 enum sci_status result;
2717 u16 index;
2718
2719 if (scic->state_machine.current_state_id !=
2720 SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2721 dev_warn(scic_to_dev(scic),
2722 "SCIC Controller start operation requested in "
2723 "invalid state\n");
2724 return SCI_FAILURE_INVALID_STATE;
2725 }
2726
2727 /* Build the TCi free pool */
2728 sci_pool_initialize(scic->tci_pool);
2729 for (index = 0; index < scic->task_context_entries; index++)
2730 sci_pool_put(scic->tci_pool, index);
2731
2732 /* Build the RNi free pool */
2733 scic_sds_remote_node_table_initialize(
2734 &scic->available_remote_nodes,
2735 scic->remote_node_entries);
2736
2737 /*
2738 * Before anything else lets make sure we will not be
2739 * interrupted by the hardware.
2740 */
2741 scic_controller_disable_interrupts(scic);
2742
2743 /* Enable the port task scheduler */
2744 scic_sds_controller_enable_port_task_scheduler(scic);
2745
2746 /* Assign all the task entries to scic physical function */
2747 scic_sds_controller_assign_task_entries(scic);
2748
2749 /* Now initialize the completion queue */
2750 scic_sds_controller_initialize_completion_queue(scic);
2751
2752 /* Initialize the unsolicited frame queue for use */
2753 scic_sds_controller_initialize_unsolicited_frame_queue(scic);
2754
2755 /* Start all of the ports on this controller */
2756 for (index = 0; index < scic->logical_port_entries; index++) {
2757 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
2758
2759 result = sci_port->state_handlers->start_handler(sci_port);
2760 if (result)
2761 return result;
2762 }
2763
2764 scic_sds_controller_start_next_phy(scic);
2765
2766 isci_timer_start(scic->timeout_timer, timeout);
2767
2768 sci_base_state_machine_change_state(&scic->state_machine,
2769 SCI_BASE_CONTROLLER_STATE_STARTING);
2770
2771 return SCI_SUCCESS;
2772}
2773
2774/**
2775 *
2776 * @object: This is the object which is cast to a struct scic_sds_controller
2777 * object.
2778 *
2779 * This method implements the actions taken by the struct scic_sds_controller on entry
2780 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
2781 * controllers initial state. none This function should initialize the
2782 * controller object.
2783 */
2784static void scic_sds_controller_initial_state_enter(void *object)
2785{
2786 struct scic_sds_controller *scic = object;
2787
2788 sci_base_state_machine_change_state(&scic->state_machine,
2789 SCI_BASE_CONTROLLER_STATE_RESET);
2790}
2791
2792/**
2793 *
2794 * @object: This is the object which is cast to a struct scic_sds_controller
2795 * object.
2796 *
2797 * This method implements the actions taken by the struct scic_sds_controller on exit
2798 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
2799 * controller starting timeout timer. none
2800 */
2801static inline void scic_sds_controller_starting_state_exit(void *object)
2802{
2803 struct scic_sds_controller *scic = object;
2804
2805 isci_timer_stop(scic->timeout_timer);
2806}
2807
2808/**
2809 *
2810 * @object: This is the object which is cast to a struct scic_sds_controller
2811 * object.
2812 *
2813 * This method implements the actions taken by the struct scic_sds_controller on entry
2814 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
2815 * controllers ready state. none
2816 */
2817static void scic_sds_controller_ready_state_enter(void *object)
2818{
2819 struct scic_sds_controller *scic = object;
2820
2821 /* set the default interrupt coalescence number and timeout value. */
2822 scic_controller_set_interrupt_coalescence(
2823 scic, 0x10, 250);
2824}
2825
2826/**
2827 *
2828 * @object: This is the object which is cast to a struct scic_sds_controller
2829 * object.
2830 *
2831 * This method implements the actions taken by the struct scic_sds_controller on exit
2832 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
2833 */
2834static void scic_sds_controller_ready_state_exit(void *object)
2835{
2836 struct scic_sds_controller *scic = object;
2837
2838 /* disable interrupt coalescence. */
2839 scic_controller_set_interrupt_coalescence(scic, 0, 0);
2840}
2841
2842/**
2843 *
2844 * @object: This is the object which is cast to a struct scic_sds_controller
2845 * object.
2846 *
2847 * This method implements the actions taken by the struct scic_sds_controller on entry
2848 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
2849 * controllers ready state. - Stop the phys on this controller - Stop the ports
2850 * on this controller - Stop all of the remote devices on this controller none
2851 */
2852static void scic_sds_controller_stopping_state_enter(void *object)
2853{
2854 struct scic_sds_controller *scic = object;
2855
2856 /* Stop all of the components for this controller */
2857 scic_sds_controller_stop_phys(scic);
2858 scic_sds_controller_stop_ports(scic);
2859 scic_sds_controller_stop_devices(scic);
2860}
2861
2862/**
2863 *
2864 * @object: This is the object which is cast to a struct
2865 * scic_sds_controller object.
2866 *
2867 * This function implements the actions taken by the struct scic_sds_controller
2868 * on exit from the SCI_BASE_CONTROLLER_STATE_STOPPING. -
2869 * This function stops the controller stopping timeout timer.
2870 */
2871static inline void scic_sds_controller_stopping_state_exit(void *object)
2872{
2873 struct scic_sds_controller *scic = object;
2874
2875 isci_timer_stop(scic->timeout_timer);
2876}
2877
2878static void scic_sds_controller_resetting_state_enter(void *object)
2879{
2880 struct scic_sds_controller *scic = object;
2881
2882 scic_sds_controller_reset_hardware(scic);
2883 sci_base_state_machine_change_state(&scic->state_machine,
2884 SCI_BASE_CONTROLLER_STATE_RESET);
2885}
2886
2887static const struct sci_base_state scic_sds_controller_state_table[] = {
2888 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
2889 .enter_state = scic_sds_controller_initial_state_enter,
2890 },
2891 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
2892 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
2893 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
2894 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
2895 .exit_state = scic_sds_controller_starting_state_exit,
2896 },
2897 [SCI_BASE_CONTROLLER_STATE_READY] = {
2898 .enter_state = scic_sds_controller_ready_state_enter,
2899 .exit_state = scic_sds_controller_ready_state_exit,
2900 },
2901 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
2902 .enter_state = scic_sds_controller_resetting_state_enter,
2903 },
2904 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
2905 .enter_state = scic_sds_controller_stopping_state_enter,
2906 .exit_state = scic_sds_controller_stopping_state_exit,
2907 },
2908 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
2909 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
2910};
2911
2912/**
2913 * scic_controller_construct() - This method will attempt to construct a
2914 * controller object utilizing the supplied parameter information.
2915 * @c: This parameter specifies the controller to be constructed.
2916 * @scu_base: mapped base address of the scu registers
2917 * @smu_base: mapped base address of the smu registers
2918 *
2919 * Indicate if the controller was successfully constructed or if it failed in
2920 * some way. SCI_SUCCESS This value is returned if the controller was
2921 * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
2922 * if the interrupt coalescence timer may cause SAS compliance issues for SMP
2923 * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
2924 * This value is returned if the controller does not support the supplied type.
2925 * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
2926 * controller does not support the supplied initialization data version.
2927 */
2928enum sci_status scic_controller_construct(struct scic_sds_controller *scic,
2929 void __iomem *scu_base,
2930 void __iomem *smu_base)
2931{
2932 struct isci_host *ihost = scic_to_ihost(scic);
2933 u8 i;
2934
2935 sci_base_state_machine_construct(&scic->state_machine,
2936 scic, scic_sds_controller_state_table,
2937 SCI_BASE_CONTROLLER_STATE_INITIAL);
2938
2939 sci_base_state_machine_start(&scic->state_machine);
2940
2941 scic->scu_registers = scu_base;
2942 scic->smu_registers = smu_base;
2943
2944 scic_sds_port_configuration_agent_construct(&scic->port_agent);
2945
2946 /* Construct the ports for this controller */
2947 for (i = 0; i < SCI_MAX_PORTS; i++)
2948 scic_sds_port_construct(&ihost->ports[i].sci, i, scic);
2949 scic_sds_port_construct(&ihost->ports[i].sci, SCIC_SDS_DUMMY_PORT, scic);
2950
2951 /* Construct the phys for this controller */
2952 for (i = 0; i < SCI_MAX_PHYS; i++) {
2953 /* Add all the PHYs to the dummy port */
2954 scic_sds_phy_construct(&ihost->phys[i].sci,
2955 &ihost->ports[SCI_MAX_PORTS].sci, i);
2956 }
2957
2958 scic->invalid_phy_mask = 0;
2959
2960 /* Set the default maximum values */
2961 scic->completion_event_entries = SCU_EVENT_COUNT;
2962 scic->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
2963 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2964 scic->logical_port_entries = SCI_MAX_PORTS;
2965 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2966 scic->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
2967 scic->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2968
2969 /* Initialize the User and OEM parameters to default values. */
2970 scic_sds_controller_set_default_config_parameters(scic);
2971
2972 return scic_controller_reset(scic);
2973}
diff --git a/drivers/scsi/isci/core/scic_sds_controller.h b/drivers/scsi/isci/core/scic_sds_controller.h
deleted file mode 100644
index 5c00f9688c18..000000000000
--- a/drivers/scsi/isci/core/scic_sds_controller.h
+++ /dev/null
@@ -1,576 +0,0 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCIC_SDS_CONTROLLER_H_
57#define _SCIC_SDS_CONTROLLER_H_
58
59#include <linux/string.h>
60#include <linux/io.h>
61
62/**
63 * This file contains the structures, constants and prototypes used for the
64 * core controller object.
65 *
66 *
67 */
68
69#include "sci_pool.h"
70#include "sci_base_state.h"
71#include "sci_base_state_machine.h"
72#include "scic_config_parameters.h"
73#include "scic_sds_port.h"
74#include "scic_sds_phy.h"
75#include "remote_node_table.h"
76#include "remote_device.h"
77#include "scu_registers.h"
78#include "scu_task_context.h"
79#include "scu_unsolicited_frame.h"
80#include "scic_sds_unsolicited_frame_control.h"
81#include "scic_sds_port_configuration_agent.h"
82
83struct sci_base_remote_device;
84struct scic_sds_remote_device;
85struct scic_sds_request;
86struct scic_sds_controller;
87
88/**
89 * struct scic_power_control -
90 *
91 * This structure defines the fields for managing power control for direct
92 * attached disk devices.
93 */
94struct scic_power_control {
95 /**
96 * This field is set when the power control timer is running and cleared when
97 * it is not.
98 */
99 bool timer_started;
100
101 /**
102 * This field is the handle to the driver timer object. This timer is used to
103 * control when the directed attached disks can consume power.
104 */
105 void *timer;
106
107 /**
108 * This field is used to keep track of how many phys are put into the
109 * requesters field.
110 */
111 u8 phys_waiting;
112
113 /**
114 * This field is used to keep track of how many phys have been granted to consume power
115 */
116 u8 phys_granted_power;
117
118 /**
119 * This field is an array of phys that we are waiting on. The phys are direct
120 * mapped into requesters via struct scic_sds_phy.phy_index
121 */
122 struct scic_sds_phy *requesters[SCI_MAX_PHYS];
123
124};
125
126/**
127 * struct scic_sds_controller -
128 *
129 * This structure represents the SCU controller object.
130 */
131struct scic_sds_controller {
132 /**
133 * This field contains the information for the base controller state
134 * machine.
135 */
136 struct sci_base_state_machine state_machine;
137
138 /**
139 * This field is the driver timer object handler used to time the controller
140 * object start and stop requests.
141 */
142 void *timeout_timer;
143
144 /**
145 * This field contains the user parameters to be utilized for this
146 * core controller object.
147 */
148 union scic_user_parameters user_parameters;
149
150 /**
151 * This field contains the OEM parameters to be utilized for this
152 * core controller object.
153 */
154 union scic_oem_parameters oem_parameters;
155
156 /**
157 * This field contains the port configuration agent for this controller.
158 */
159 struct scic_sds_port_configuration_agent port_agent;
160
161 /**
162 * This field is the array of device objects that are currently constructed
163 * for this controller object. This table is used as a fast lookup of device
164 * objects that need to handle device completion notifications from the
165 * hardware. The table is RNi based.
166 */
167 struct scic_sds_remote_device *device_table[SCI_MAX_REMOTE_DEVICES];
168
169 /**
170 * This field is the array of IO request objects that are currently active for
171 * this controller object. This table is used as a fast lookup of the io
172 * request object that need to handle completion queue notifications. The
173 * table is TCi based.
174 */
175 struct scic_sds_request *io_request_table[SCI_MAX_IO_REQUESTS];
176
177 /**
178 * This field is the free RNi data structure
179 */
180 struct scic_remote_node_table available_remote_nodes;
181
182 /**
183 * This field is the TCi pool used to manage the task context index.
184 */
185 SCI_POOL_CREATE(tci_pool, u16, SCI_MAX_IO_REQUESTS);
186
187 /**
188 * This filed is the struct scic_power_control data used to controll when direct
189 * attached devices can consume power.
190 */
191 struct scic_power_control power_control;
192
193 /**
194 * This field is the array of sequence values for the IO Tag fields. Even
195 * though only 4 bits of the field is used for the sequence the sequence is 16
196 * bits in size so the sequence can be bitwise or'd with the TCi to build the
197 * IO Tag value.
198 */
199 u16 io_request_sequence[SCI_MAX_IO_REQUESTS];
200
201 /**
202 * This field in the array of sequence values for the RNi. These are used
203 * to control io request build to io request start operations. The sequence
204 * value is recorded into an io request when it is built and is checked on
205 * the io request start operation to make sure that there was not a device
206 * hot plug between the build and start operation.
207 */
208 u8 remote_device_sequence[SCI_MAX_REMOTE_DEVICES];
209
210 /**
211 * This field is a pointer to the memory allocated by the driver for the task
212 * context table. This data is shared between the hardware and software.
213 */
214 struct scu_task_context *task_context_table;
215
216 /**
217 * This field is a pointer to the memory allocated by the driver for the
218 * remote node context table. This table is shared between the hardware and
219 * software.
220 */
221 union scu_remote_node_context *remote_node_context_table;
222
223 /**
224 * This field is a pointer to the completion queue. This memory is
225 * written to by the hardware and read by the software.
226 */
227 u32 *completion_queue;
228
229 /**
230 * This field is the software copy of the completion queue get pointer. The
231 * controller object writes this value to the hardware after processing the
232 * completion entries.
233 */
234 u32 completion_queue_get;
235
236 /**
237 * This field is the minimum of the number of hardware supported port entries
238 * and the software requested port entries.
239 */
240 u32 logical_port_entries;
241
242 /**
243 * This field is the minimum number of hardware supported completion queue
244 * entries and the software requested completion queue entries.
245 */
246 u32 completion_queue_entries;
247
248 /**
249 * This field is the minimum number of hardware supported event entries and
250 * the software requested event entries.
251 */
252 u32 completion_event_entries;
253
254 /**
255 * This field is the minimum number of devices supported by the hardware and
256 * the number of devices requested by the software.
257 */
258 u32 remote_node_entries;
259
260 /**
261 * This field is the minimum number of IO requests supported by the hardware
262 * and the number of IO requests requested by the software.
263 */
264 u32 task_context_entries;
265
266 /**
267 * This object contains all of the unsolicited frame specific
268 * data utilized by the core controller.
269 */
270 struct scic_sds_unsolicited_frame_control uf_control;
271
272 /* Phy Startup Data */
273 /**
274 * This field is the driver timer handle for controller phy request startup.
275 * On controller start the controller will start each PHY individually in
276 * order of phy index.
277 */
278 void *phy_startup_timer;
279
280 /**
281 * This field is set when the phy_startup_timer is running and is cleared when
282 * the phy_startup_timer is stopped.
283 */
284 bool phy_startup_timer_pending;
285
286 /**
287 * This field is the index of the next phy start. It is initialized to 0 and
288 * increments for each phy index that is started.
289 */
290 u32 next_phy_to_start;
291
292 /**
293 * This field controlls the invalid link up notifications to the SCI_USER. If
294 * an invalid_link_up notification is reported a bit for the PHY index is set
295 * so further notifications are not made. Once the PHY object reports link up
296 * and is made part of a port then this bit for the PHY index is cleared.
297 */
298 u8 invalid_phy_mask;
299
300 /*
301 * This field saves the current interrupt coalescing number of the controller.
302 */
303 u16 interrupt_coalesce_number;
304
305 /*
306 * This field saves the current interrupt coalescing timeout value in microseconds.
307 */
308 u32 interrupt_coalesce_timeout;
309
310 /**
311 * This field is a pointer to the memory mapped register space for the
312 * struct smu_registers.
313 */
314 struct smu_registers __iomem *smu_registers;
315
316 /**
317 * This field is a pointer to the memory mapped register space for the
318 * struct scu_registers.
319 */
320 struct scu_registers __iomem *scu_registers;
321
322};
323
324/**
325 * enum scic_sds_controller_states - This enumeration depicts all the states
326 * for the common controller state machine.
327 */
328enum scic_sds_controller_states {
329 /**
330 * Simply the initial state for the base controller state machine.
331 */
332 SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
333
334 /**
335 * This state indicates that the controller is reset. The memory for
336 * the controller is in it's initial state, but the controller requires
337 * initialization.
338 * This state is entered from the INITIAL state.
339 * This state is entered from the RESETTING state.
340 */
341 SCI_BASE_CONTROLLER_STATE_RESET,
342
343 /**
344 * This state is typically an action state that indicates the controller
345 * is in the process of initialization. In this state no new IO operations
346 * are permitted.
347 * This state is entered from the RESET state.
348 */
349 SCI_BASE_CONTROLLER_STATE_INITIALIZING,
350
351 /**
352 * This state indicates that the controller has been successfully
353 * initialized. In this state no new IO operations are permitted.
354 * This state is entered from the INITIALIZING state.
355 */
356 SCI_BASE_CONTROLLER_STATE_INITIALIZED,
357
358 /**
359 * This state indicates the the controller is in the process of becoming
360 * ready (i.e. starting). In this state no new IO operations are permitted.
361 * This state is entered from the INITIALIZED state.
362 */
363 SCI_BASE_CONTROLLER_STATE_STARTING,
364
365 /**
366 * This state indicates the controller is now ready. Thus, the user
367 * is able to perform IO operations on the controller.
368 * This state is entered from the STARTING state.
369 */
370 SCI_BASE_CONTROLLER_STATE_READY,
371
372 /**
373 * This state is typically an action state that indicates the controller
374 * is in the process of resetting. Thus, the user is unable to perform
375 * IO operations on the controller. A reset is considered destructive in
376 * most cases.
377 * This state is entered from the READY state.
378 * This state is entered from the FAILED state.
379 * This state is entered from the STOPPED state.
380 */
381 SCI_BASE_CONTROLLER_STATE_RESETTING,
382
383 /**
384 * This state indicates that the controller is in the process of stopping.
385 * In this state no new IO operations are permitted, but existing IO
386 * operations are allowed to complete.
387 * This state is entered from the READY state.
388 */
389 SCI_BASE_CONTROLLER_STATE_STOPPING,
390
391 /**
392 * This state indicates that the controller has successfully been stopped.
393 * In this state no new IO operations are permitted.
394 * This state is entered from the STOPPING state.
395 */
396 SCI_BASE_CONTROLLER_STATE_STOPPED,
397
398 /**
399 * This state indicates that the controller could not successfully be
400 * initialized. In this state no new IO operations are permitted.
401 * This state is entered from the INITIALIZING state.
402 * This state is entered from the STARTING state.
403 * This state is entered from the STOPPING state.
404 * This state is entered from the RESETTING state.
405 */
406 SCI_BASE_CONTROLLER_STATE_FAILED,
407
408 SCI_BASE_CONTROLLER_MAX_STATES
409
410};
411
412/**
413 * INCREMENT_QUEUE_GET() -
414 *
415 * This macro will increment the specified index to and if the index wraps to 0
416 * it will toggel the cycle bit.
417 */
418#define INCREMENT_QUEUE_GET(index, cycle, entry_count, bit_toggle) \
419 { \
420 if ((index) + 1 == entry_count) { \
421 (index) = 0; \
422 (cycle) = (cycle) ^ (bit_toggle); \
423 } else { \
424 index = index + 1; \
425 } \
426 }
427
428/**
429 * scic_sds_controller_get_port_configuration_agent() -
430 *
431 * This is a helper macro to get the port configuration agent from the
432 * controller object.
433 */
434#define scic_sds_controller_get_port_configuration_agent(controller) \
435 (&(controller)->port_agent)
436
437/**
438 * scic_sds_controller_get_protocol_engine_group() -
439 *
440 * This macro returns the protocol engine group for this controller object.
441 * Presently we only support protocol engine group 0 so just return that
442 */
443#define scic_sds_controller_get_protocol_engine_group(controller) 0
444
445/**
446 * scic_sds_io_tag_construct() -
447 *
448 * This macro constructs an IO tag from the sequence and index values.
449 */
450#define scic_sds_io_tag_construct(sequence, task_index) \
451 ((sequence) << 12 | (task_index))
452
453/**
454 * scic_sds_io_tag_get_sequence() -
455 *
456 * This macro returns the IO sequence from the IO tag value.
457 */
458#define scic_sds_io_tag_get_sequence(io_tag) \
459 (((io_tag) & 0xF000) >> 12)
460
461/**
462 * scic_sds_io_tag_get_index() -
463 *
464 * This macro returns the TCi from the io tag value
465 */
466#define scic_sds_io_tag_get_index(io_tag) \
467 ((io_tag) & 0x0FFF)
468
469/**
470 * scic_sds_io_sequence_increment() -
471 *
472 * This is a helper macro to increment the io sequence count. We may find in
473 * the future that it will be faster to store the sequence count in such a way
474 * as we dont perform the shift operation to build io tag values so therefore
475 * need a way to incrment them correctly
476 */
477#define scic_sds_io_sequence_increment(value) \
478 ((value) = (((value) + 1) & 0x000F))
479
480/* expander attached sata devices require 3 rnc slots */
481static inline int scic_sds_remote_device_node_count(struct scic_sds_remote_device *sci_dev)
482{
483 struct domain_device *dev = sci_dev_to_domain(sci_dev);
484
485 if ((dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) &&
486 !sci_dev->is_direct_attached)
487 return SCU_STP_REMOTE_NODE_COUNT;
488 return SCU_SSP_REMOTE_NODE_COUNT;
489}
490
491/**
492 * scic_sds_controller_set_invalid_phy() -
493 *
494 * This macro will set the bit in the invalid phy mask for this controller
495 * object. This is used to control messages reported for invalid link up
496 * notifications.
497 */
498#define scic_sds_controller_set_invalid_phy(controller, phy) \
499 ((controller)->invalid_phy_mask |= (1 << (phy)->phy_index))
500
501/**
502 * scic_sds_controller_clear_invalid_phy() -
503 *
504 * This macro will clear the bit in the invalid phy mask for this controller
505 * object. This is used to control messages reported for invalid link up
506 * notifications.
507 */
508#define scic_sds_controller_clear_invalid_phy(controller, phy) \
509 ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index))
510
511void scic_sds_controller_post_request(
512 struct scic_sds_controller *this_controller,
513 u32 request);
514
515void scic_sds_controller_release_frame(
516 struct scic_sds_controller *this_controller,
517 u32 frame_index);
518
519void scic_sds_controller_copy_sata_response(
520 void *response_buffer,
521 void *frame_header,
522 void *frame_buffer);
523
524enum sci_status scic_sds_controller_allocate_remote_node_context(
525 struct scic_sds_controller *this_controller,
526 struct scic_sds_remote_device *sci_dev,
527 u16 *node_id);
528
529void scic_sds_controller_free_remote_node_context(
530 struct scic_sds_controller *this_controller,
531 struct scic_sds_remote_device *sci_dev,
532 u16 node_id);
533
534union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
535 struct scic_sds_controller *this_controller,
536 u16 node_id);
537
538struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic,
539 u16 io_tag);
540
541struct scu_task_context *scic_sds_controller_get_task_context_buffer(
542 struct scic_sds_controller *this_controller,
543 u16 io_tag);
544
545void scic_sds_controller_power_control_queue_insert(
546 struct scic_sds_controller *this_controller,
547 struct scic_sds_phy *sci_phy);
548
549void scic_sds_controller_power_control_queue_remove(
550 struct scic_sds_controller *this_controller,
551 struct scic_sds_phy *sci_phy);
552
553void scic_sds_controller_link_up(
554 struct scic_sds_controller *this_controller,
555 struct scic_sds_port *sci_port,
556 struct scic_sds_phy *sci_phy);
557
558void scic_sds_controller_link_down(
559 struct scic_sds_controller *this_controller,
560 struct scic_sds_port *sci_port,
561 struct scic_sds_phy *sci_phy);
562
563void scic_sds_controller_remote_device_stopped(
564 struct scic_sds_controller *this_controller,
565 struct scic_sds_remote_device *sci_dev);
566
567void scic_sds_controller_copy_task_context(
568 struct scic_sds_controller *this_controller,
569 struct scic_sds_request *this_request);
570
571void scic_sds_controller_register_setup(
572 struct scic_sds_controller *this_controller);
573
574enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req);
575
576#endif /* _SCIC_SDS_CONTROLLER_H_ */
diff --git a/drivers/scsi/isci/core/scic_sds_phy.c b/drivers/scsi/isci/core/scic_sds_phy.c
index c6df0e2c842e..c82ccb93fd9b 100644
--- a/drivers/scsi/isci/core/scic_sds_phy.c
+++ b/drivers/scsi/isci/core/scic_sds_phy.c
@@ -55,14 +55,13 @@
55 55
56#include <scsi/sas.h> 56#include <scsi/sas.h>
57#include "sas.h" 57#include "sas.h"
58#include "host.h"
58#include "sci_base_state.h" 59#include "sci_base_state.h"
59#include "sci_base_state_machine.h" 60#include "sci_base_state_machine.h"
60#include "scic_phy.h" 61#include "scic_phy.h"
61#include "scic_sds_controller.h"
62#include "scic_sds_phy.h" 62#include "scic_sds_phy.h"
63#include "scic_sds_port.h" 63#include "scic_sds_port.h"
64#include "remote_node_context.h" 64#include "remote_node_context.h"
65#include "sci_environment.h"
66#include "sci_util.h" 65#include "sci_util.h"
67#include "scu_event_codes.h" 66#include "scu_event_codes.h"
68#include "timers.h" 67#include "timers.h"
diff --git a/drivers/scsi/isci/core/scic_sds_port.c b/drivers/scsi/isci/core/scic_sds_port.c
index 9302e397e4ca..652d823d5fa3 100644
--- a/drivers/scsi/isci/core/scic_sds_port.c
+++ b/drivers/scsi/isci/core/scic_sds_port.c
@@ -53,16 +53,14 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56#include "scic_controller.h" 56#include "host.h"
57#include "scic_phy.h" 57#include "scic_phy.h"
58#include "scic_port.h" 58#include "scic_port.h"
59#include "scic_sds_controller.h"
60#include "scic_sds_phy.h" 59#include "scic_sds_phy.h"
61#include "scic_sds_port.h" 60#include "scic_sds_port.h"
62#include "remote_device.h" 61#include "remote_device.h"
63#include "remote_node_context.h" 62#include "remote_node_context.h"
64#include "scic_sds_request.h" 63#include "scic_sds_request.h"
65#include "sci_environment.h"
66#include "scu_registers.h" 64#include "scu_registers.h"
67#include "timers.h" 65#include "timers.h"
68 66
diff --git a/drivers/scsi/isci/core/scic_sds_port.h b/drivers/scsi/isci/core/scic_sds_port.h
index 3696debcce12..bd612d576093 100644
--- a/drivers/scsi/isci/core/scic_sds_port.h
+++ b/drivers/scsi/isci/core/scic_sds_port.h
@@ -57,6 +57,7 @@
57#define _SCIC_SDS_PORT_H_ 57#define _SCIC_SDS_PORT_H_
58 58
59#include <linux/kernel.h> 59#include <linux/kernel.h>
60#include "isci.h"
60#include "sas.h" 61#include "sas.h"
61#include "scu_registers.h" 62#include "scu_registers.h"
62#include "sci_base_state_machine.h" 63#include "sci_base_state_machine.h"
diff --git a/drivers/scsi/isci/core/scic_sds_port_configuration_agent.c b/drivers/scsi/isci/core/scic_sds_port_configuration_agent.c
index 3fad8c1db6c9..a5871fddc09a 100644
--- a/drivers/scsi/isci/core/scic_sds_port_configuration_agent.c
+++ b/drivers/scsi/isci/core/scic_sds_port_configuration_agent.c
@@ -53,9 +53,7 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56#include "sci_environment.h" 56#include "host.h"
57#include "scic_controller.h"
58#include "scic_sds_controller.h"
59#include "scic_sds_port_configuration_agent.h" 57#include "scic_sds_port_configuration_agent.h"
60#include "timers.h" 58#include "timers.h"
61 59
diff --git a/drivers/scsi/isci/core/scic_sds_request.c b/drivers/scsi/isci/core/scic_sds_request.c
index de35885eb1f9..1405aa703c3a 100644
--- a/drivers/scsi/isci/core/scic_sds_request.c
+++ b/drivers/scsi/isci/core/scic_sds_request.c
@@ -54,9 +54,7 @@
54 */ 54 */
55 55
56#include <scsi/sas.h> 56#include <scsi/sas.h>
57#include "scic_controller.h"
58#include "scic_io_request.h" 57#include "scic_io_request.h"
59#include "scic_sds_controller.h"
60#include "scu_registers.h" 58#include "scu_registers.h"
61#include "scic_sds_port.h" 59#include "scic_sds_port.h"
62#include "remote_device.h" 60#include "remote_device.h"
@@ -64,7 +62,6 @@
64#include "scic_sds_smp_request.h" 62#include "scic_sds_smp_request.h"
65#include "scic_sds_stp_request.h" 63#include "scic_sds_stp_request.h"
66#include "scic_sds_unsolicited_frame_control.h" 64#include "scic_sds_unsolicited_frame_control.h"
67#include "sci_environment.h"
68#include "sci_util.h" 65#include "sci_util.h"
69#include "scu_completion_codes.h" 66#include "scu_completion_codes.h"
70#include "scu_task_context.h" 67#include "scu_task_context.h"
diff --git a/drivers/scsi/isci/core/scic_sds_smp_request.c b/drivers/scsi/isci/core/scic_sds_smp_request.c
index 2b911206e8d2..7f338948ae0d 100644
--- a/drivers/scsi/isci/core/scic_sds_smp_request.c
+++ b/drivers/scsi/isci/core/scic_sds_smp_request.c
@@ -55,15 +55,13 @@
55 55
56#include <scsi/sas.h> 56#include <scsi/sas.h>
57#include "sci_base_state_machine.h" 57#include "sci_base_state_machine.h"
58#include "scic_controller.h"
59#include "scic_sds_controller.h"
60#include "remote_device.h" 58#include "remote_device.h"
61#include "scic_sds_request.h" 59#include "scic_sds_request.h"
62#include "scic_sds_smp_request.h" 60#include "scic_sds_smp_request.h"
63#include "sci_environment.h"
64#include "sci_util.h" 61#include "sci_util.h"
65#include "scu_completion_codes.h" 62#include "scu_completion_codes.h"
66#include "scu_task_context.h" 63#include "scu_task_context.h"
64#include "host.h"
67 65
68static void scu_smp_request_construct_task_context( 66static void scu_smp_request_construct_task_context(
69 struct scic_sds_request *sci_req, 67 struct scic_sds_request *sci_req,
diff --git a/drivers/scsi/isci/core/scic_sds_ssp_request.c b/drivers/scsi/isci/core/scic_sds_ssp_request.c
index 18bf3874d6ac..137f6ddac82c 100644
--- a/drivers/scsi/isci/core/scic_sds_ssp_request.c
+++ b/drivers/scsi/isci/core/scic_sds_ssp_request.c
@@ -53,11 +53,9 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56#include "host.h"
56#include "sci_base_state_machine.h" 57#include "sci_base_state_machine.h"
57#include "scic_controller.h"
58#include "scic_sds_controller.h"
59#include "scic_sds_request.h" 58#include "scic_sds_request.h"
60#include "sci_environment.h"
61#include "scu_completion_codes.h" 59#include "scu_completion_codes.h"
62#include "scu_task_context.h" 60#include "scu_task_context.h"
63 61
diff --git a/drivers/scsi/isci/core/scic_sds_stp_request.c b/drivers/scsi/isci/core/scic_sds_stp_request.c
index c1c316cad522..2f5095130cad 100644
--- a/drivers/scsi/isci/core/scic_sds_stp_request.c
+++ b/drivers/scsi/isci/core/scic_sds_stp_request.c
@@ -58,13 +58,11 @@
58#include "sci_base_state.h" 58#include "sci_base_state.h"
59#include "sci_base_state_machine.h" 59#include "sci_base_state_machine.h"
60#include "scic_io_request.h" 60#include "scic_io_request.h"
61#include "scic_sds_controller.h"
62#include "remote_device.h" 61#include "remote_device.h"
63#include "scic_sds_request.h" 62#include "scic_sds_request.h"
64#include "scic_sds_stp_pio_request.h" 63#include "scic_sds_stp_pio_request.h"
65#include "scic_sds_stp_request.h" 64#include "scic_sds_stp_request.h"
66#include "scic_sds_unsolicited_frame_control.h" 65#include "scic_sds_unsolicited_frame_control.h"
67#include "sci_environment.h"
68#include "sci_util.h" 66#include "sci_util.h"
69#include "scu_completion_codes.h" 67#include "scu_completion_codes.h"
70#include "scu_event_codes.h" 68#include "scu_event_codes.h"
diff --git a/drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c b/drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c
index 9e393e5df8ec..d0e03731377e 100644
--- a/drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c
+++ b/drivers/scsi/isci/core/scic_sds_unsolicited_frame_control.c
@@ -53,19 +53,10 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56/** 56#include "host.h"
57 * This file contains the implementation of the
58 * struct scic_sds_unsolicited_frame_control object and it's public, protected, and
59 * private methods.
60 *
61 *
62 */
63
64#include "scic_sds_unsolicited_frame_control.h" 57#include "scic_sds_unsolicited_frame_control.h"
65#include "scu_registers.h" 58#include "scu_registers.h"
66#include "scic_sds_controller.h"
67#include "sci_util.h" 59#include "sci_util.h"
68#include "sci_environment.h"
69 60
70/** 61/**
71 * This method will program the unsolicited frames (UFs) into the UF address 62 * This method will program the unsolicited frames (UFs) into the UF address
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c
index 5847149857a9..43a5d7a8b291 100644
--- a/drivers/scsi/isci/host.c
+++ b/drivers/scsi/isci/host.c
@@ -52,18 +52,198 @@
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55#include <linux/device.h>
56#include <scsi/sas.h>
57#include "host.h"
56#include "isci.h" 58#include "isci.h"
57#include "scic_io_request.h"
58#include "scic_port.h"
59#include "port.h" 59#include "port.h"
60#include "request.h"
61#include "host.h" 60#include "host.h"
62#include "probe_roms.h" 61#include "probe_roms.h"
63#include "scic_controller.h" 62#include "remote_device.h"
64#include "scic_sds_controller.h" 63#include "request.h"
64#include "scic_io_request.h"
65#include "scic_sds_port_configuration_agent.h"
66#include "sci_util.h"
67#include "scu_completion_codes.h"
68#include "scu_event_codes.h"
69#include "scu_registers.h"
70#include "scu_remote_node_context.h"
71#include "scu_task_context.h"
72#include "scu_unsolicited_frame.h"
65#include "timers.h" 73#include "timers.h"
66 74
75#define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
76
77/**
78 * smu_dcc_get_max_ports() -
79 *
80 * This macro returns the maximum number of logical ports supported by the
81 * hardware. The caller passes in the value read from the device context
82 * capacity register and this macro will mash and shift the value appropriately.
83 */
84#define smu_dcc_get_max_ports(dcc_value) \
85 (\
86 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
87 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
88 )
89
90/**
91 * smu_dcc_get_max_task_context() -
92 *
93 * This macro returns the maximum number of task contexts supported by the
94 * hardware. The caller passes in the value read from the device context
95 * capacity register and this macro will mash and shift the value appropriately.
96 */
97#define smu_dcc_get_max_task_context(dcc_value) \
98 (\
99 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
100 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
101 )
102
103/**
104 * smu_dcc_get_max_remote_node_context() -
105 *
106 * This macro returns the maximum number of remote node contexts supported by
107 * the hardware. The caller passes in the value read from the device context
108 * capacity register and this macro will mash and shift the value appropriately.
109 */
110#define smu_dcc_get_max_remote_node_context(dcc_value) \
111 (\
112 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
113 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
114 )
115
116
117#define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
118#define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
119
120/**
121 *
122 *
123 * The number of milliseconds to wait for a phy to start.
124 */
125#define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
126
127/**
128 *
129 *
130 * The number of milliseconds to wait while a given phy is consuming power
131 * before allowing another set of phys to consume power. Ultimately, this will
132 * be specified by OEM parameter.
133 */
134#define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
135
136/**
137 * NORMALIZE_PUT_POINTER() -
138 *
139 * This macro will normalize the completion queue put pointer so its value can
140 * be used as an array inde
141 */
142#define NORMALIZE_PUT_POINTER(x) \
143 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
144
145
146/**
147 * NORMALIZE_EVENT_POINTER() -
148 *
149 * This macro will normalize the completion queue event entry so its value can
150 * be used as an index.
151 */
152#define NORMALIZE_EVENT_POINTER(x) \
153 (\
154 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
155 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
156 )
157
158/**
159 * INCREMENT_COMPLETION_QUEUE_GET() -
160 *
161 * This macro will increment the controllers completion queue index value and
162 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
163 */
164#define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
165 INCREMENT_QUEUE_GET(\
166 (index), \
167 (cycle), \
168 (controller)->completion_queue_entries, \
169 SMU_CQGR_CYCLE_BIT \
170 )
171
172/**
173 * INCREMENT_EVENT_QUEUE_GET() -
174 *
175 * This macro will increment the controllers event queue index value and
176 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
177 */
178#define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
179 INCREMENT_QUEUE_GET(\
180 (index), \
181 (cycle), \
182 (controller)->completion_event_entries, \
183 SMU_CQGR_EVENT_CYCLE_BIT \
184 )
185
186
187/**
188 * NORMALIZE_GET_POINTER() -
189 *
190 * This macro will normalize the completion queue get pointer so its value can
191 * be used as an index into an array
192 */
193#define NORMALIZE_GET_POINTER(x) \
194 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
195
196/**
197 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
198 *
199 * This macro will normalize the completion queue cycle pointer so it matches
200 * the completion queue cycle bit
201 */
202#define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
203 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
204
205/**
206 * COMPLETION_QUEUE_CYCLE_BIT() -
207 *
208 * This macro will return the cycle bit of the completion queue entry
209 */
210#define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
211
212static bool scic_sds_controller_completion_queue_has_entries(
213 struct scic_sds_controller *scic)
214{
215 u32 get_value = scic->completion_queue_get;
216 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
217
218 if (NORMALIZE_GET_POINTER_CYCLE_BIT(get_value) ==
219 COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index]))
220 return true;
221
222 return false;
223}
224
225static bool scic_sds_controller_isr(struct scic_sds_controller *scic)
226{
227 if (scic_sds_controller_completion_queue_has_entries(scic)) {
228 return true;
229 } else {
230 /*
231 * we have a spurious interrupt it could be that we have already
232 * emptied the completion queue from a previous interrupt */
233 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
234
235 /*
236 * There is a race in the hardware that could cause us not to be notified
237 * of an interrupt completion if we do not take this step. We will mask
238 * then unmask the interrupts so if there is another interrupt pending
239 * the clearing of the interrupt source we get the next interrupt message. */
240 writel(0xFF000000, &scic->smu_registers->interrupt_mask);
241 writel(0, &scic->smu_registers->interrupt_mask);
242 }
243
244 return false;
245}
246
67irqreturn_t isci_msix_isr(int vec, void *data) 247irqreturn_t isci_msix_isr(int vec, void *data)
68{ 248{
69 struct isci_host *ihost = data; 249 struct isci_host *ihost = data;
@@ -74,6 +254,411 @@ irqreturn_t isci_msix_isr(int vec, void *data)
74 return IRQ_HANDLED; 254 return IRQ_HANDLED;
75} 255}
76 256
257static bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
258{
259 u32 interrupt_status;
260
261 interrupt_status =
262 readl(&scic->smu_registers->interrupt_status);
263 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
264
265 if (interrupt_status != 0) {
266 /*
267 * There is an error interrupt pending so let it through and handle
268 * in the callback */
269 return true;
270 }
271
272 /*
273 * There is a race in the hardware that could cause us not to be notified
274 * of an interrupt completion if we do not take this step. We will mask
275 * then unmask the error interrupts so if there was another interrupt
276 * pending we will be notified.
277 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
278 writel(0xff, &scic->smu_registers->interrupt_mask);
279 writel(0, &scic->smu_registers->interrupt_mask);
280
281 return false;
282}
283
284static void scic_sds_controller_task_completion(struct scic_sds_controller *scic,
285 u32 completion_entry)
286{
287 u32 index;
288 struct scic_sds_request *io_request;
289
290 index = SCU_GET_COMPLETION_INDEX(completion_entry);
291 io_request = scic->io_request_table[index];
292
293 /* Make sure that we really want to process this IO request */
294 if (
295 (io_request != NULL)
296 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
297 && (
298 scic_sds_io_tag_get_sequence(io_request->io_tag)
299 == scic->io_request_sequence[index]
300 )
301 ) {
302 /* Yep this is a valid io request pass it along to the io request handler */
303 scic_sds_io_request_tc_completion(io_request, completion_entry);
304 }
305}
306
307static void scic_sds_controller_sdma_completion(struct scic_sds_controller *scic,
308 u32 completion_entry)
309{
310 u32 index;
311 struct scic_sds_request *io_request;
312 struct scic_sds_remote_device *device;
313
314 index = SCU_GET_COMPLETION_INDEX(completion_entry);
315
316 switch (scu_get_command_request_type(completion_entry)) {
317 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
318 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
319 io_request = scic->io_request_table[index];
320 dev_warn(scic_to_dev(scic),
321 "%s: SCIC SDS Completion type SDMA %x for io request "
322 "%p\n",
323 __func__,
324 completion_entry,
325 io_request);
326 /* @todo For a post TC operation we need to fail the IO
327 * request
328 */
329 break;
330
331 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
332 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
333 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
334 device = scic->device_table[index];
335 dev_warn(scic_to_dev(scic),
336 "%s: SCIC SDS Completion type SDMA %x for remote "
337 "device %p\n",
338 __func__,
339 completion_entry,
340 device);
341 /* @todo For a port RNC operation we need to fail the
342 * device
343 */
344 break;
345
346 default:
347 dev_warn(scic_to_dev(scic),
348 "%s: SCIC SDS Completion unknown SDMA completion "
349 "type %x\n",
350 __func__,
351 completion_entry);
352 break;
353
354 }
355}
356
357static void scic_sds_controller_unsolicited_frame(struct scic_sds_controller *scic,
358 u32 completion_entry)
359{
360 u32 index;
361 u32 frame_index;
362
363 struct isci_host *ihost = scic_to_ihost(scic);
364 struct scu_unsolicited_frame_header *frame_header;
365 struct scic_sds_phy *phy;
366 struct scic_sds_remote_device *device;
367
368 enum sci_status result = SCI_FAILURE;
369
370 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
371
372 frame_header = scic->uf_control.buffers.array[frame_index].header;
373 scic->uf_control.buffers.array[frame_index].state = UNSOLICITED_FRAME_IN_USE;
374
375 if (SCU_GET_FRAME_ERROR(completion_entry)) {
376 /*
377 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
378 * / this cause a problem? We expect the phy initialization will
379 * / fail if there is an error in the frame. */
380 scic_sds_controller_release_frame(scic, frame_index);
381 return;
382 }
383
384 if (frame_header->is_address_frame) {
385 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
386 phy = &ihost->phys[index].sci;
387 result = scic_sds_phy_frame_handler(phy, frame_index);
388 } else {
389
390 index = SCU_GET_COMPLETION_INDEX(completion_entry);
391
392 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
393 /*
394 * This is a signature fis or a frame from a direct attached SATA
395 * device that has not yet been created. In either case forwared
396 * the frame to the PE and let it take care of the frame data. */
397 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
398 phy = &ihost->phys[index].sci;
399 result = scic_sds_phy_frame_handler(phy, frame_index);
400 } else {
401 if (index < scic->remote_node_entries)
402 device = scic->device_table[index];
403 else
404 device = NULL;
405
406 if (device != NULL)
407 result = scic_sds_remote_device_frame_handler(device, frame_index);
408 else
409 scic_sds_controller_release_frame(scic, frame_index);
410 }
411 }
412
413 if (result != SCI_SUCCESS) {
414 /*
415 * / @todo Is there any reason to report some additional error message
416 * / when we get this failure notifiction? */
417 }
418}
419
420static void scic_sds_controller_event_completion(struct scic_sds_controller *scic,
421 u32 completion_entry)
422{
423 struct isci_host *ihost = scic_to_ihost(scic);
424 struct scic_sds_request *io_request;
425 struct scic_sds_remote_device *device;
426 struct scic_sds_phy *phy;
427 u32 index;
428
429 index = SCU_GET_COMPLETION_INDEX(completion_entry);
430
431 switch (scu_get_event_type(completion_entry)) {
432 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
433 /* / @todo The driver did something wrong and we need to fix the condtion. */
434 dev_err(scic_to_dev(scic),
435 "%s: SCIC Controller 0x%p received SMU command error "
436 "0x%x\n",
437 __func__,
438 scic,
439 completion_entry);
440 break;
441
442 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
443 case SCU_EVENT_TYPE_SMU_ERROR:
444 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
445 /*
446 * / @todo This is a hardware failure and its likely that we want to
447 * / reset the controller. */
448 dev_err(scic_to_dev(scic),
449 "%s: SCIC Controller 0x%p received fatal controller "
450 "event 0x%x\n",
451 __func__,
452 scic,
453 completion_entry);
454 break;
455
456 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
457 io_request = scic->io_request_table[index];
458 scic_sds_io_request_event_handler(io_request, completion_entry);
459 break;
460
461 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
462 switch (scu_get_event_specifier(completion_entry)) {
463 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
464 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
465 io_request = scic->io_request_table[index];
466 if (io_request != NULL)
467 scic_sds_io_request_event_handler(io_request, completion_entry);
468 else
469 dev_warn(scic_to_dev(scic),
470 "%s: SCIC Controller 0x%p received "
471 "event 0x%x for io request object "
472 "that doesnt exist.\n",
473 __func__,
474 scic,
475 completion_entry);
476
477 break;
478
479 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
480 device = scic->device_table[index];
481 if (device != NULL)
482 scic_sds_remote_device_event_handler(device, completion_entry);
483 else
484 dev_warn(scic_to_dev(scic),
485 "%s: SCIC Controller 0x%p received "
486 "event 0x%x for remote device object "
487 "that doesnt exist.\n",
488 __func__,
489 scic,
490 completion_entry);
491
492 break;
493 }
494 break;
495
496 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
497 /*
498 * direct the broadcast change event to the phy first and then let
499 * the phy redirect the broadcast change to the port object */
500 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
501 /*
502 * direct error counter event to the phy object since that is where
503 * we get the event notification. This is a type 4 event. */
504 case SCU_EVENT_TYPE_OSSP_EVENT:
505 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
506 phy = &ihost->phys[index].sci;
507 scic_sds_phy_event_handler(phy, completion_entry);
508 break;
509
510 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
511 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
512 case SCU_EVENT_TYPE_RNC_OPS_MISC:
513 if (index < scic->remote_node_entries) {
514 device = scic->device_table[index];
515
516 if (device != NULL)
517 scic_sds_remote_device_event_handler(device, completion_entry);
518 } else
519 dev_err(scic_to_dev(scic),
520 "%s: SCIC Controller 0x%p received event 0x%x "
521 "for remote device object 0x%0x that doesnt "
522 "exist.\n",
523 __func__,
524 scic,
525 completion_entry,
526 index);
527
528 break;
529
530 default:
531 dev_warn(scic_to_dev(scic),
532 "%s: SCIC Controller received unknown event code %x\n",
533 __func__,
534 completion_entry);
535 break;
536 }
537}
538
539
540
541static void scic_sds_controller_process_completions(struct scic_sds_controller *scic)
542{
543 u32 completion_count = 0;
544 u32 completion_entry;
545 u32 get_index;
546 u32 get_cycle;
547 u32 event_index;
548 u32 event_cycle;
549
550 dev_dbg(scic_to_dev(scic),
551 "%s: completion queue begining get:0x%08x\n",
552 __func__,
553 scic->completion_queue_get);
554
555 /* Get the component parts of the completion queue */
556 get_index = NORMALIZE_GET_POINTER(scic->completion_queue_get);
557 get_cycle = SMU_CQGR_CYCLE_BIT & scic->completion_queue_get;
558
559 event_index = NORMALIZE_EVENT_POINTER(scic->completion_queue_get);
560 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & scic->completion_queue_get;
561
562 while (
563 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
564 == COMPLETION_QUEUE_CYCLE_BIT(scic->completion_queue[get_index])
565 ) {
566 completion_count++;
567
568 completion_entry = scic->completion_queue[get_index];
569 INCREMENT_COMPLETION_QUEUE_GET(scic, get_index, get_cycle);
570
571 dev_dbg(scic_to_dev(scic),
572 "%s: completion queue entry:0x%08x\n",
573 __func__,
574 completion_entry);
575
576 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
577 case SCU_COMPLETION_TYPE_TASK:
578 scic_sds_controller_task_completion(scic, completion_entry);
579 break;
580
581 case SCU_COMPLETION_TYPE_SDMA:
582 scic_sds_controller_sdma_completion(scic, completion_entry);
583 break;
584
585 case SCU_COMPLETION_TYPE_UFI:
586 scic_sds_controller_unsolicited_frame(scic, completion_entry);
587 break;
588
589 case SCU_COMPLETION_TYPE_EVENT:
590 INCREMENT_EVENT_QUEUE_GET(scic, event_index, event_cycle);
591 scic_sds_controller_event_completion(scic, completion_entry);
592 break;
593
594 case SCU_COMPLETION_TYPE_NOTIFY:
595 /*
596 * Presently we do the same thing with a notify event that we do with the
597 * other event codes. */
598 INCREMENT_EVENT_QUEUE_GET(scic, event_index, event_cycle);
599 scic_sds_controller_event_completion(scic, completion_entry);
600 break;
601
602 default:
603 dev_warn(scic_to_dev(scic),
604 "%s: SCIC Controller received unknown "
605 "completion type %x\n",
606 __func__,
607 completion_entry);
608 break;
609 }
610 }
611
612 /* Update the get register if we completed one or more entries */
613 if (completion_count > 0) {
614 scic->completion_queue_get =
615 SMU_CQGR_GEN_BIT(ENABLE) |
616 SMU_CQGR_GEN_BIT(EVENT_ENABLE) |
617 event_cycle |
618 SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index) |
619 get_cycle |
620 SMU_CQGR_GEN_VAL(POINTER, get_index);
621
622 writel(scic->completion_queue_get,
623 &scic->smu_registers->completion_queue_get);
624
625 }
626
627 dev_dbg(scic_to_dev(scic),
628 "%s: completion queue ending get:0x%08x\n",
629 __func__,
630 scic->completion_queue_get);
631
632}
633
634static void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
635{
636 u32 interrupt_status;
637
638 interrupt_status =
639 readl(&scic->smu_registers->interrupt_status);
640
641 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
642 scic_sds_controller_completion_queue_has_entries(scic)) {
643
644 scic_sds_controller_process_completions(scic);
645 writel(SMU_ISR_QUEUE_SUSPEND, &scic->smu_registers->interrupt_status);
646 } else {
647 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
648 interrupt_status);
649
650 sci_base_state_machine_change_state(&scic->state_machine,
651 SCI_BASE_CONTROLLER_STATE_FAILED);
652
653 return;
654 }
655
656 /* If we dont process any completions I am not sure that we want to do this.
657 * We are in the middle of a hardware fault and should probably be reset.
658 */
659 writel(0, &scic->smu_registers->interrupt_mask);
660}
661
77irqreturn_t isci_intx_isr(int vec, void *data) 662irqreturn_t isci_intx_isr(int vec, void *data)
78{ 663{
79 irqreturn_t ret = IRQ_NONE; 664 irqreturn_t ret = IRQ_NONE;
@@ -112,7 +697,7 @@ irqreturn_t isci_error_isr(int vec, void *data)
112 * core library. 697 * core library.
113 * 698 *
114 */ 699 */
115void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status) 700static void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
116{ 701{
117 if (completion_status != SCI_SUCCESS) 702 if (completion_status != SCI_SUCCESS)
118 dev_info(&ihost->pdev->dev, 703 dev_info(&ihost->pdev->dev,
@@ -142,6 +727,383 @@ int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
142 727
143} 728}
144 729
730/**
731 * scic_controller_get_suggested_start_timeout() - This method returns the
732 * suggested scic_controller_start() timeout amount. The user is free to
733 * use any timeout value, but this method provides the suggested minimum
734 * start timeout value. The returned value is based upon empirical
735 * information determined as a result of interoperability testing.
736 * @controller: the handle to the controller object for which to return the
737 * suggested start timeout.
738 *
739 * This method returns the number of milliseconds for the suggested start
740 * operation timeout.
741 */
742static u32 scic_controller_get_suggested_start_timeout(
743 struct scic_sds_controller *sc)
744{
745 /* Validate the user supplied parameters. */
746 if (sc == NULL)
747 return 0;
748
749 /*
750 * The suggested minimum timeout value for a controller start operation:
751 *
752 * Signature FIS Timeout
753 * + Phy Start Timeout
754 * + Number of Phy Spin Up Intervals
755 * ---------------------------------
756 * Number of milliseconds for the controller start operation.
757 *
758 * NOTE: The number of phy spin up intervals will be equivalent
759 * to the number of phys divided by the number phys allowed
760 * per interval - 1 (once OEM parameters are supported).
761 * Currently we assume only 1 phy per interval. */
762
763 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
764 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
765 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
766}
767
768static void scic_controller_enable_interrupts(
769 struct scic_sds_controller *scic)
770{
771 BUG_ON(scic->smu_registers == NULL);
772 writel(0, &scic->smu_registers->interrupt_mask);
773}
774
775void scic_controller_disable_interrupts(
776 struct scic_sds_controller *scic)
777{
778 BUG_ON(scic->smu_registers == NULL);
779 writel(0xffffffff, &scic->smu_registers->interrupt_mask);
780}
781
782static void scic_sds_controller_enable_port_task_scheduler(
783 struct scic_sds_controller *scic)
784{
785 u32 port_task_scheduler_value;
786
787 port_task_scheduler_value =
788 readl(&scic->scu_registers->peg0.ptsg.control);
789 port_task_scheduler_value |=
790 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) |
791 SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
792 writel(port_task_scheduler_value,
793 &scic->scu_registers->peg0.ptsg.control);
794}
795
796static void scic_sds_controller_assign_task_entries(struct scic_sds_controller *scic)
797{
798 u32 task_assignment;
799
800 /*
801 * Assign all the TCs to function 0
802 * TODO: Do we actually need to read this register to write it back?
803 */
804
805 task_assignment =
806 readl(&scic->smu_registers->task_context_assignment[0]);
807
808 task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) |
809 (SMU_TCA_GEN_VAL(ENDING, scic->task_context_entries - 1)) |
810 (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE));
811
812 writel(task_assignment,
813 &scic->smu_registers->task_context_assignment[0]);
814
815}
816
817static void scic_sds_controller_initialize_completion_queue(struct scic_sds_controller *scic)
818{
819 u32 index;
820 u32 completion_queue_control_value;
821 u32 completion_queue_get_value;
822 u32 completion_queue_put_value;
823
824 scic->completion_queue_get = 0;
825
826 completion_queue_control_value = (
827 SMU_CQC_QUEUE_LIMIT_SET(scic->completion_queue_entries - 1)
828 | SMU_CQC_EVENT_LIMIT_SET(scic->completion_event_entries - 1)
829 );
830
831 writel(completion_queue_control_value,
832 &scic->smu_registers->completion_queue_control);
833
834
835 /* Set the completion queue get pointer and enable the queue */
836 completion_queue_get_value = (
837 (SMU_CQGR_GEN_VAL(POINTER, 0))
838 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
839 | (SMU_CQGR_GEN_BIT(ENABLE))
840 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
841 );
842
843 writel(completion_queue_get_value,
844 &scic->smu_registers->completion_queue_get);
845
846 /* Set the completion queue put pointer */
847 completion_queue_put_value = (
848 (SMU_CQPR_GEN_VAL(POINTER, 0))
849 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
850 );
851
852 writel(completion_queue_put_value,
853 &scic->smu_registers->completion_queue_put);
854
855 /* Initialize the cycle bit of the completion queue entries */
856 for (index = 0; index < scic->completion_queue_entries; index++) {
857 /*
858 * If get.cycle_bit != completion_queue.cycle_bit
859 * its not a valid completion queue entry
860 * so at system start all entries are invalid */
861 scic->completion_queue[index] = 0x80000000;
862 }
863}
864
865static void scic_sds_controller_initialize_unsolicited_frame_queue(struct scic_sds_controller *scic)
866{
867 u32 frame_queue_control_value;
868 u32 frame_queue_get_value;
869 u32 frame_queue_put_value;
870
871 /* Write the queue size */
872 frame_queue_control_value =
873 SCU_UFQC_GEN_VAL(QUEUE_SIZE,
874 scic->uf_control.address_table.count);
875
876 writel(frame_queue_control_value,
877 &scic->scu_registers->sdma.unsolicited_frame_queue_control);
878
879 /* Setup the get pointer for the unsolicited frame queue */
880 frame_queue_get_value = (
881 SCU_UFQGP_GEN_VAL(POINTER, 0)
882 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
883 );
884
885 writel(frame_queue_get_value,
886 &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
887 /* Setup the put pointer for the unsolicited frame queue */
888 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
889 writel(frame_queue_put_value,
890 &scic->scu_registers->sdma.unsolicited_frame_put_pointer);
891}
892
893/**
894 * This method will attempt to transition into the ready state for the
895 * controller and indicate that the controller start operation has completed
896 * if all criteria are met.
897 * @scic: This parameter indicates the controller object for which
898 * to transition to ready.
899 * @status: This parameter indicates the status value to be pass into the call
900 * to scic_cb_controller_start_complete().
901 *
902 * none.
903 */
904static void scic_sds_controller_transition_to_ready(
905 struct scic_sds_controller *scic,
906 enum sci_status status)
907{
908 struct isci_host *ihost = scic_to_ihost(scic);
909
910 if (scic->state_machine.current_state_id ==
911 SCI_BASE_CONTROLLER_STATE_STARTING) {
912 /*
913 * We move into the ready state, because some of the phys/ports
914 * may be up and operational.
915 */
916 sci_base_state_machine_change_state(&scic->state_machine,
917 SCI_BASE_CONTROLLER_STATE_READY);
918
919 isci_host_start_complete(ihost, status);
920 }
921}
922
923static void scic_sds_controller_phy_timer_stop(struct scic_sds_controller *scic)
924{
925 isci_timer_stop(scic->phy_startup_timer);
926
927 scic->phy_startup_timer_pending = false;
928}
929
930static void scic_sds_controller_phy_timer_start(struct scic_sds_controller *scic)
931{
932 isci_timer_start(scic->phy_startup_timer,
933 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT);
934
935 scic->phy_startup_timer_pending = true;
936}
937
938/**
939 * scic_sds_controller_start_next_phy - start phy
940 * @scic: controller
941 *
942 * If all the phys have been started, then attempt to transition the
943 * controller to the READY state and inform the user
944 * (scic_cb_controller_start_complete()).
945 */
946static enum sci_status scic_sds_controller_start_next_phy(struct scic_sds_controller *scic)
947{
948 struct isci_host *ihost = scic_to_ihost(scic);
949 struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
950 struct scic_sds_phy *sci_phy;
951 enum sci_status status;
952
953 status = SCI_SUCCESS;
954
955 if (scic->phy_startup_timer_pending)
956 return status;
957
958 if (scic->next_phy_to_start >= SCI_MAX_PHYS) {
959 bool is_controller_start_complete = true;
960 u32 state;
961 u8 index;
962
963 for (index = 0; index < SCI_MAX_PHYS; index++) {
964 sci_phy = &ihost->phys[index].sci;
965 state = sci_phy->state_machine.current_state_id;
966
967 if (!scic_sds_phy_get_port(sci_phy))
968 continue;
969
970 /* The controller start operation is complete iff:
971 * - all links have been given an opportunity to start
972 * - have no indication of a connected device
973 * - have an indication of a connected device and it has
974 * finished the link training process.
975 */
976 if ((sci_phy->is_in_link_training == false &&
977 state == SCI_BASE_PHY_STATE_INITIAL) ||
978 (sci_phy->is_in_link_training == false &&
979 state == SCI_BASE_PHY_STATE_STOPPED) ||
980 (sci_phy->is_in_link_training == true &&
981 state == SCI_BASE_PHY_STATE_STARTING)) {
982 is_controller_start_complete = false;
983 break;
984 }
985 }
986
987 /*
988 * The controller has successfully finished the start process.
989 * Inform the SCI Core user and transition to the READY state. */
990 if (is_controller_start_complete == true) {
991 scic_sds_controller_transition_to_ready(scic, SCI_SUCCESS);
992 scic_sds_controller_phy_timer_stop(scic);
993 }
994 } else {
995 sci_phy = &ihost->phys[scic->next_phy_to_start].sci;
996
997 if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
998 if (scic_sds_phy_get_port(sci_phy) == NULL) {
999 scic->next_phy_to_start++;
1000
1001 /* Caution recursion ahead be forwarned
1002 *
1003 * The PHY was never added to a PORT in MPC mode
1004 * so start the next phy in sequence This phy
1005 * will never go link up and will not draw power
1006 * the OEM parameters either configured the phy
1007 * incorrectly for the PORT or it was never
1008 * assigned to a PORT
1009 */
1010 return scic_sds_controller_start_next_phy(scic);
1011 }
1012 }
1013
1014 status = scic_sds_phy_start(sci_phy);
1015
1016 if (status == SCI_SUCCESS) {
1017 scic_sds_controller_phy_timer_start(scic);
1018 } else {
1019 dev_warn(scic_to_dev(scic),
1020 "%s: Controller stop operation failed "
1021 "to stop phy %d because of status "
1022 "%d.\n",
1023 __func__,
1024 ihost->phys[scic->next_phy_to_start].sci.phy_index,
1025 status);
1026 }
1027
1028 scic->next_phy_to_start++;
1029 }
1030
1031 return status;
1032}
1033
1034static void scic_sds_controller_phy_startup_timeout_handler(void *_scic)
1035{
1036 struct scic_sds_controller *scic = _scic;
1037 enum sci_status status;
1038
1039 scic->phy_startup_timer_pending = false;
1040 status = SCI_FAILURE;
1041 while (status != SCI_SUCCESS)
1042 status = scic_sds_controller_start_next_phy(scic);
1043}
1044
1045static enum sci_status scic_controller_start(struct scic_sds_controller *scic,
1046 u32 timeout)
1047{
1048 struct isci_host *ihost = scic_to_ihost(scic);
1049 enum sci_status result;
1050 u16 index;
1051
1052 if (scic->state_machine.current_state_id !=
1053 SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
1054 dev_warn(scic_to_dev(scic),
1055 "SCIC Controller start operation requested in "
1056 "invalid state\n");
1057 return SCI_FAILURE_INVALID_STATE;
1058 }
1059
1060 /* Build the TCi free pool */
1061 sci_pool_initialize(scic->tci_pool);
1062 for (index = 0; index < scic->task_context_entries; index++)
1063 sci_pool_put(scic->tci_pool, index);
1064
1065 /* Build the RNi free pool */
1066 scic_sds_remote_node_table_initialize(
1067 &scic->available_remote_nodes,
1068 scic->remote_node_entries);
1069
1070 /*
1071 * Before anything else lets make sure we will not be
1072 * interrupted by the hardware.
1073 */
1074 scic_controller_disable_interrupts(scic);
1075
1076 /* Enable the port task scheduler */
1077 scic_sds_controller_enable_port_task_scheduler(scic);
1078
1079 /* Assign all the task entries to scic physical function */
1080 scic_sds_controller_assign_task_entries(scic);
1081
1082 /* Now initialize the completion queue */
1083 scic_sds_controller_initialize_completion_queue(scic);
1084
1085 /* Initialize the unsolicited frame queue for use */
1086 scic_sds_controller_initialize_unsolicited_frame_queue(scic);
1087
1088 /* Start all of the ports on this controller */
1089 for (index = 0; index < scic->logical_port_entries; index++) {
1090 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
1091
1092 result = sci_port->state_handlers->start_handler(sci_port);
1093 if (result)
1094 return result;
1095 }
1096
1097 scic_sds_controller_start_next_phy(scic);
1098
1099 isci_timer_start(scic->timeout_timer, timeout);
1100
1101 sci_base_state_machine_change_state(&scic->state_machine,
1102 SCI_BASE_CONTROLLER_STATE_STARTING);
1103
1104 return SCI_SUCCESS;
1105}
1106
145void isci_host_scan_start(struct Scsi_Host *shost) 1107void isci_host_scan_start(struct Scsi_Host *shost)
146{ 1108{
147 struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha; 1109 struct isci_host *ihost = SHOST_TO_SAS_HA(shost)->lldd_ha;
@@ -155,7 +1117,7 @@ void isci_host_scan_start(struct Scsi_Host *shost)
155 spin_unlock_irq(&ihost->scic_lock); 1117 spin_unlock_irq(&ihost->scic_lock);
156} 1118}
157 1119
158void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status) 1120static void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
159{ 1121{
160 isci_host_change_state(ihost, isci_stopped); 1122 isci_host_change_state(ihost, isci_stopped);
161 scic_controller_disable_interrupts(&ihost->sci); 1123 scic_controller_disable_interrupts(&ihost->sci);
@@ -163,6 +1125,19 @@ void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion
163 wake_up(&ihost->eventq); 1125 wake_up(&ihost->eventq);
164} 1126}
165 1127
1128static void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1129{
1130 /* Empty out the completion queue */
1131 if (scic_sds_controller_completion_queue_has_entries(scic))
1132 scic_sds_controller_process_completions(scic);
1133
1134 /* Clear the interrupt and enable all interrupts again */
1135 writel(SMU_ISR_COMPLETION, &scic->smu_registers->interrupt_status);
1136 /* Could we write the value of SMU_ISR_COMPLETION? */
1137 writel(0xFF000000, &scic->smu_registers->interrupt_mask);
1138 writel(0, &scic->smu_registers->interrupt_mask);
1139}
1140
166/** 1141/**
167 * isci_host_completion_routine() - This function is the delayed service 1142 * isci_host_completion_routine() - This function is the delayed service
168 * routine that calls the sci core library's completion handler. It's 1143 * routine that calls the sci core library's completion handler. It's
@@ -273,6 +1248,75 @@ static void isci_host_completion_routine(unsigned long data)
273 1248
274} 1249}
275 1250
1251/**
1252 * scic_controller_stop() - This method will stop an individual controller
1253 * object.This method will invoke the associated user callback upon
1254 * completion. The completion callback is called when the following
1255 * conditions are met: -# the method return status is SCI_SUCCESS. -# the
1256 * controller has been quiesced. This method will ensure that all IO
1257 * requests are quiesced, phys are stopped, and all additional operation by
1258 * the hardware is halted.
1259 * @controller: the handle to the controller object to stop.
1260 * @timeout: This parameter specifies the number of milliseconds in which the
1261 * stop operation should complete.
1262 *
1263 * The controller must be in the STARTED or STOPPED state. Indicate if the
1264 * controller stop method succeeded or failed in some way. SCI_SUCCESS if the
1265 * stop operation successfully began. SCI_WARNING_ALREADY_IN_STATE if the
1266 * controller is already in the STOPPED state. SCI_FAILURE_INVALID_STATE if the
1267 * controller is not either in the STARTED or STOPPED states.
1268 */
1269static enum sci_status scic_controller_stop(struct scic_sds_controller *scic,
1270 u32 timeout)
1271{
1272 if (scic->state_machine.current_state_id !=
1273 SCI_BASE_CONTROLLER_STATE_READY) {
1274 dev_warn(scic_to_dev(scic),
1275 "SCIC Controller stop operation requested in "
1276 "invalid state\n");
1277 return SCI_FAILURE_INVALID_STATE;
1278 }
1279
1280 isci_timer_start(scic->timeout_timer, timeout);
1281 sci_base_state_machine_change_state(&scic->state_machine,
1282 SCI_BASE_CONTROLLER_STATE_STOPPING);
1283 return SCI_SUCCESS;
1284}
1285
1286/**
1287 * scic_controller_reset() - This method will reset the supplied core
1288 * controller regardless of the state of said controller. This operation is
1289 * considered destructive. In other words, all current operations are wiped
1290 * out. No IO completions for outstanding devices occur. Outstanding IO
1291 * requests are not aborted or completed at the actual remote device.
1292 * @controller: the handle to the controller object to reset.
1293 *
1294 * Indicate if the controller reset method succeeded or failed in some way.
1295 * SCI_SUCCESS if the reset operation successfully started. SCI_FATAL_ERROR if
1296 * the controller reset operation is unable to complete.
1297 */
1298static enum sci_status scic_controller_reset(struct scic_sds_controller *scic)
1299{
1300 switch (scic->state_machine.current_state_id) {
1301 case SCI_BASE_CONTROLLER_STATE_RESET:
1302 case SCI_BASE_CONTROLLER_STATE_READY:
1303 case SCI_BASE_CONTROLLER_STATE_STOPPED:
1304 case SCI_BASE_CONTROLLER_STATE_FAILED:
1305 /*
1306 * The reset operation is not a graceful cleanup, just
1307 * perform the state transition.
1308 */
1309 sci_base_state_machine_change_state(&scic->state_machine,
1310 SCI_BASE_CONTROLLER_STATE_RESETTING);
1311 return SCI_SUCCESS;
1312 default:
1313 dev_warn(scic_to_dev(scic),
1314 "SCIC Controller reset operation requested in "
1315 "invalid state\n");
1316 return SCI_FAILURE_INVALID_STATE;
1317 }
1318}
1319
276void isci_host_deinit(struct isci_host *ihost) 1320void isci_host_deinit(struct isci_host *ihost)
277{ 1321{
278 int i; 1322 int i;
@@ -341,6 +1385,1109 @@ static void isci_user_parameters_get(
341 u->max_number_concurrent_device_spin_up = max_concurr_spinup; 1385 u->max_number_concurrent_device_spin_up = max_concurr_spinup;
342} 1386}
343 1387
1388static void scic_sds_controller_initial_state_enter(void *object)
1389{
1390 struct scic_sds_controller *scic = object;
1391
1392 sci_base_state_machine_change_state(&scic->state_machine,
1393 SCI_BASE_CONTROLLER_STATE_RESET);
1394}
1395
1396static inline void scic_sds_controller_starting_state_exit(void *object)
1397{
1398 struct scic_sds_controller *scic = object;
1399
1400 isci_timer_stop(scic->timeout_timer);
1401}
1402
1403#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
1404#define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
1405#define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
1406#define INTERRUPT_COALESCE_NUMBER_MAX 256
1407#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
1408#define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
1409
1410/**
1411 * scic_controller_set_interrupt_coalescence() - This method allows the user to
1412 * configure the interrupt coalescence.
1413 * @controller: This parameter represents the handle to the controller object
1414 * for which its interrupt coalesce register is overridden.
1415 * @coalesce_number: Used to control the number of entries in the Completion
1416 * Queue before an interrupt is generated. If the number of entries exceed
1417 * this number, an interrupt will be generated. The valid range of the input
1418 * is [0, 256]. A setting of 0 results in coalescing being disabled.
1419 * @coalesce_timeout: Timeout value in microseconds. The valid range of the
1420 * input is [0, 2700000] . A setting of 0 is allowed and results in no
1421 * interrupt coalescing timeout.
1422 *
1423 * Indicate if the user successfully set the interrupt coalesce parameters.
1424 * SCI_SUCCESS The user successfully updated the interrutp coalescence.
1425 * SCI_FAILURE_INVALID_PARAMETER_VALUE The user input value is out of range.
1426 */
1427static enum sci_status scic_controller_set_interrupt_coalescence(
1428 struct scic_sds_controller *scic_controller,
1429 u32 coalesce_number,
1430 u32 coalesce_timeout)
1431{
1432 u8 timeout_encode = 0;
1433 u32 min = 0;
1434 u32 max = 0;
1435
1436 /* Check if the input parameters fall in the range. */
1437 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
1438 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1439
1440 /*
1441 * Defined encoding for interrupt coalescing timeout:
1442 * Value Min Max Units
1443 * ----- --- --- -----
1444 * 0 - - Disabled
1445 * 1 13.3 20.0 ns
1446 * 2 26.7 40.0
1447 * 3 53.3 80.0
1448 * 4 106.7 160.0
1449 * 5 213.3 320.0
1450 * 6 426.7 640.0
1451 * 7 853.3 1280.0
1452 * 8 1.7 2.6 us
1453 * 9 3.4 5.1
1454 * 10 6.8 10.2
1455 * 11 13.7 20.5
1456 * 12 27.3 41.0
1457 * 13 54.6 81.9
1458 * 14 109.2 163.8
1459 * 15 218.5 327.7
1460 * 16 436.9 655.4
1461 * 17 873.8 1310.7
1462 * 18 1.7 2.6 ms
1463 * 19 3.5 5.2
1464 * 20 7.0 10.5
1465 * 21 14.0 21.0
1466 * 22 28.0 41.9
1467 * 23 55.9 83.9
1468 * 24 111.8 167.8
1469 * 25 223.7 335.5
1470 * 26 447.4 671.1
1471 * 27 894.8 1342.2
1472 * 28 1.8 2.7 s
1473 * Others Undefined */
1474
1475 /*
1476 * Use the table above to decide the encode of interrupt coalescing timeout
1477 * value for register writing. */
1478 if (coalesce_timeout == 0)
1479 timeout_encode = 0;
1480 else{
1481 /* make the timeout value in unit of (10 ns). */
1482 coalesce_timeout = coalesce_timeout * 100;
1483 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
1484 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
1485
1486 /* get the encode of timeout for register writing. */
1487 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
1488 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
1489 timeout_encode++) {
1490 if (min <= coalesce_timeout && max > coalesce_timeout)
1491 break;
1492 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
1493 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
1494 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
1495 break;
1496 else{
1497 timeout_encode++;
1498 break;
1499 }
1500 } else {
1501 max = max * 2;
1502 min = min * 2;
1503 }
1504 }
1505
1506 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
1507 /* the value is out of range. */
1508 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1509 }
1510
1511 writel(SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
1512 SMU_ICC_GEN_VAL(TIMER, timeout_encode),
1513 &scic_controller->smu_registers->interrupt_coalesce_control);
1514
1515
1516 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
1517 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
1518
1519 return SCI_SUCCESS;
1520}
1521
1522
1523static void scic_sds_controller_ready_state_enter(void *object)
1524{
1525 struct scic_sds_controller *scic = object;
1526
1527 /* set the default interrupt coalescence number and timeout value. */
1528 scic_controller_set_interrupt_coalescence(scic, 0x10, 250);
1529}
1530
1531static void scic_sds_controller_ready_state_exit(void *object)
1532{
1533 struct scic_sds_controller *scic = object;
1534
1535 /* disable interrupt coalescence. */
1536 scic_controller_set_interrupt_coalescence(scic, 0, 0);
1537}
1538
1539static enum sci_status scic_sds_controller_stop_phys(struct scic_sds_controller *scic)
1540{
1541 u32 index;
1542 enum sci_status status;
1543 enum sci_status phy_status;
1544 struct isci_host *ihost = scic_to_ihost(scic);
1545
1546 status = SCI_SUCCESS;
1547
1548 for (index = 0; index < SCI_MAX_PHYS; index++) {
1549 phy_status = scic_sds_phy_stop(&ihost->phys[index].sci);
1550
1551 if (phy_status != SCI_SUCCESS &&
1552 phy_status != SCI_FAILURE_INVALID_STATE) {
1553 status = SCI_FAILURE;
1554
1555 dev_warn(scic_to_dev(scic),
1556 "%s: Controller stop operation failed to stop "
1557 "phy %d because of status %d.\n",
1558 __func__,
1559 ihost->phys[index].sci.phy_index, phy_status);
1560 }
1561 }
1562
1563 return status;
1564}
1565
1566static enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
1567{
1568 u32 index;
1569 enum sci_status port_status;
1570 enum sci_status status = SCI_SUCCESS;
1571 struct isci_host *ihost = scic_to_ihost(scic);
1572
1573 for (index = 0; index < scic->logical_port_entries; index++) {
1574 struct scic_sds_port *sci_port = &ihost->ports[index].sci;
1575 scic_sds_port_handler_t stop;
1576
1577 stop = sci_port->state_handlers->stop_handler;
1578 port_status = stop(sci_port);
1579
1580 if ((port_status != SCI_SUCCESS) &&
1581 (port_status != SCI_FAILURE_INVALID_STATE)) {
1582 status = SCI_FAILURE;
1583
1584 dev_warn(scic_to_dev(scic),
1585 "%s: Controller stop operation failed to "
1586 "stop port %d because of status %d.\n",
1587 __func__,
1588 sci_port->logical_port_index,
1589 port_status);
1590 }
1591 }
1592
1593 return status;
1594}
1595
1596static enum sci_status scic_sds_controller_stop_devices(struct scic_sds_controller *scic)
1597{
1598 u32 index;
1599 enum sci_status status;
1600 enum sci_status device_status;
1601
1602 status = SCI_SUCCESS;
1603
1604 for (index = 0; index < scic->remote_node_entries; index++) {
1605 if (scic->device_table[index] != NULL) {
1606 /* / @todo What timeout value do we want to provide to this request? */
1607 device_status = scic_remote_device_stop(scic->device_table[index], 0);
1608
1609 if ((device_status != SCI_SUCCESS) &&
1610 (device_status != SCI_FAILURE_INVALID_STATE)) {
1611 dev_warn(scic_to_dev(scic),
1612 "%s: Controller stop operation failed "
1613 "to stop device 0x%p because of "
1614 "status %d.\n",
1615 __func__,
1616 scic->device_table[index], device_status);
1617 }
1618 }
1619 }
1620
1621 return status;
1622}
1623
1624static void scic_sds_controller_stopping_state_enter(void *object)
1625{
1626 struct scic_sds_controller *scic = object;
1627
1628 /* Stop all of the components for this controller */
1629 scic_sds_controller_stop_phys(scic);
1630 scic_sds_controller_stop_ports(scic);
1631 scic_sds_controller_stop_devices(scic);
1632}
1633
1634static void scic_sds_controller_stopping_state_exit(void *object)
1635{
1636 struct scic_sds_controller *scic = object;
1637
1638 isci_timer_stop(scic->timeout_timer);
1639}
1640
1641
1642/**
1643 * scic_sds_controller_reset_hardware() -
1644 *
1645 * This method will reset the controller hardware.
1646 */
1647static void scic_sds_controller_reset_hardware(struct scic_sds_controller *scic)
1648{
1649 /* Disable interrupts so we dont take any spurious interrupts */
1650 scic_controller_disable_interrupts(scic);
1651
1652 /* Reset the SCU */
1653 writel(0xFFFFFFFF, &scic->smu_registers->soft_reset_control);
1654
1655 /* Delay for 1ms to before clearing the CQP and UFQPR. */
1656 udelay(1000);
1657
1658 /* The write to the CQGR clears the CQP */
1659 writel(0x00000000, &scic->smu_registers->completion_queue_get);
1660
1661 /* The write to the UFQGP clears the UFQPR */
1662 writel(0, &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
1663}
1664
1665static void scic_sds_controller_resetting_state_enter(void *object)
1666{
1667 struct scic_sds_controller *scic = object;
1668
1669 scic_sds_controller_reset_hardware(scic);
1670 sci_base_state_machine_change_state(&scic->state_machine,
1671 SCI_BASE_CONTROLLER_STATE_RESET);
1672}
1673
1674static const struct sci_base_state scic_sds_controller_state_table[] = {
1675 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
1676 .enter_state = scic_sds_controller_initial_state_enter,
1677 },
1678 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
1679 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
1680 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
1681 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
1682 .exit_state = scic_sds_controller_starting_state_exit,
1683 },
1684 [SCI_BASE_CONTROLLER_STATE_READY] = {
1685 .enter_state = scic_sds_controller_ready_state_enter,
1686 .exit_state = scic_sds_controller_ready_state_exit,
1687 },
1688 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
1689 .enter_state = scic_sds_controller_resetting_state_enter,
1690 },
1691 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
1692 .enter_state = scic_sds_controller_stopping_state_enter,
1693 .exit_state = scic_sds_controller_stopping_state_exit,
1694 },
1695 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
1696 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}
1697};
1698
1699static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
1700{
1701 /* these defaults are overridden by the platform / firmware */
1702 struct isci_host *ihost = scic_to_ihost(scic);
1703 u16 index;
1704
1705 /* Default to APC mode. */
1706 scic->oem_parameters.sds1.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
1707
1708 /* Default to APC mode. */
1709 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up = 1;
1710
1711 /* Default to no SSC operation. */
1712 scic->oem_parameters.sds1.controller.do_enable_ssc = false;
1713
1714 /* Initialize all of the port parameter information to narrow ports. */
1715 for (index = 0; index < SCI_MAX_PORTS; index++) {
1716 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
1717 }
1718
1719 /* Initialize all of the phy parameter information. */
1720 for (index = 0; index < SCI_MAX_PHYS; index++) {
1721 /* Default to 6G (i.e. Gen 3) for now. */
1722 scic->user_parameters.sds1.phys[index].max_speed_generation = 3;
1723
1724 /* the frequencies cannot be 0 */
1725 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
1726 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
1727 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
1728
1729 /*
1730 * Previous Vitesse based expanders had a arbitration issue that
1731 * is worked around by having the upper 32-bits of SAS address
1732 * with a value greater then the Vitesse company identifier.
1733 * Hence, usage of 0x5FCFFFFF. */
1734 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x1 + ihost->id;
1735 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
1736 }
1737
1738 scic->user_parameters.sds1.stp_inactivity_timeout = 5;
1739 scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
1740 scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
1741 scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
1742 scic->user_parameters.sds1.no_outbound_task_timeout = 20;
1743}
1744
1745
1746
1747/**
1748 * scic_controller_construct() - This method will attempt to construct a
1749 * controller object utilizing the supplied parameter information.
1750 * @c: This parameter specifies the controller to be constructed.
1751 * @scu_base: mapped base address of the scu registers
1752 * @smu_base: mapped base address of the smu registers
1753 *
1754 * Indicate if the controller was successfully constructed or if it failed in
1755 * some way. SCI_SUCCESS This value is returned if the controller was
1756 * successfully constructed. SCI_WARNING_TIMER_CONFLICT This value is returned
1757 * if the interrupt coalescence timer may cause SAS compliance issues for SMP
1758 * Target mode response processing. SCI_FAILURE_UNSUPPORTED_CONTROLLER_TYPE
1759 * This value is returned if the controller does not support the supplied type.
1760 * SCI_FAILURE_UNSUPPORTED_INIT_DATA_VERSION This value is returned if the
1761 * controller does not support the supplied initialization data version.
1762 */
1763static enum sci_status scic_controller_construct(struct scic_sds_controller *scic,
1764 void __iomem *scu_base,
1765 void __iomem *smu_base)
1766{
1767 struct isci_host *ihost = scic_to_ihost(scic);
1768 u8 i;
1769
1770 sci_base_state_machine_construct(&scic->state_machine,
1771 scic, scic_sds_controller_state_table,
1772 SCI_BASE_CONTROLLER_STATE_INITIAL);
1773
1774 sci_base_state_machine_start(&scic->state_machine);
1775
1776 scic->scu_registers = scu_base;
1777 scic->smu_registers = smu_base;
1778
1779 scic_sds_port_configuration_agent_construct(&scic->port_agent);
1780
1781 /* Construct the ports for this controller */
1782 for (i = 0; i < SCI_MAX_PORTS; i++)
1783 scic_sds_port_construct(&ihost->ports[i].sci, i, scic);
1784 scic_sds_port_construct(&ihost->ports[i].sci, SCIC_SDS_DUMMY_PORT, scic);
1785
1786 /* Construct the phys for this controller */
1787 for (i = 0; i < SCI_MAX_PHYS; i++) {
1788 /* Add all the PHYs to the dummy port */
1789 scic_sds_phy_construct(&ihost->phys[i].sci,
1790 &ihost->ports[SCI_MAX_PORTS].sci, i);
1791 }
1792
1793 scic->invalid_phy_mask = 0;
1794
1795 /* Set the default maximum values */
1796 scic->completion_event_entries = SCU_EVENT_COUNT;
1797 scic->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
1798 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
1799 scic->logical_port_entries = SCI_MAX_PORTS;
1800 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
1801 scic->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
1802 scic->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
1803
1804 /* Initialize the User and OEM parameters to default values. */
1805 scic_sds_controller_set_default_config_parameters(scic);
1806
1807 return scic_controller_reset(scic);
1808}
1809
1810int scic_oem_parameters_validate(struct scic_sds_oem_params *oem)
1811{
1812 int i;
1813
1814 for (i = 0; i < SCI_MAX_PORTS; i++)
1815 if (oem->ports[i].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX)
1816 return -EINVAL;
1817
1818 for (i = 0; i < SCI_MAX_PHYS; i++)
1819 if (oem->phys[i].sas_address.high == 0 &&
1820 oem->phys[i].sas_address.low == 0)
1821 return -EINVAL;
1822
1823 if (oem->controller.mode_type == SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE) {
1824 for (i = 0; i < SCI_MAX_PHYS; i++)
1825 if (oem->ports[i].phy_mask != 0)
1826 return -EINVAL;
1827 } else if (oem->controller.mode_type == SCIC_PORT_MANUAL_CONFIGURATION_MODE) {
1828 u8 phy_mask = 0;
1829
1830 for (i = 0; i < SCI_MAX_PHYS; i++)
1831 phy_mask |= oem->ports[i].phy_mask;
1832
1833 if (phy_mask == 0)
1834 return -EINVAL;
1835 } else
1836 return -EINVAL;
1837
1838 if (oem->controller.max_concurrent_dev_spin_up > MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT)
1839 return -EINVAL;
1840
1841 return 0;
1842}
1843
1844static enum sci_status scic_oem_parameters_set(struct scic_sds_controller *scic,
1845 union scic_oem_parameters *scic_parms)
1846{
1847 u32 state = scic->state_machine.current_state_id;
1848
1849 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
1850 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
1851 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
1852
1853 if (scic_oem_parameters_validate(&scic_parms->sds1))
1854 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
1855 scic->oem_parameters.sds1 = scic_parms->sds1;
1856
1857 return SCI_SUCCESS;
1858 }
1859
1860 return SCI_FAILURE_INVALID_STATE;
1861}
1862
1863void scic_oem_parameters_get(
1864 struct scic_sds_controller *scic,
1865 union scic_oem_parameters *scic_parms)
1866{
1867 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
1868}
1869
1870static void scic_sds_controller_timeout_handler(void *_scic)
1871{
1872 struct scic_sds_controller *scic = _scic;
1873 struct isci_host *ihost = scic_to_ihost(scic);
1874 struct sci_base_state_machine *sm = &scic->state_machine;
1875
1876 if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STARTING)
1877 scic_sds_controller_transition_to_ready(scic, SCI_FAILURE_TIMEOUT);
1878 else if (sm->current_state_id == SCI_BASE_CONTROLLER_STATE_STOPPING) {
1879 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_FAILED);
1880 isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);
1881 } else /* / @todo Now what do we want to do in this case? */
1882 dev_err(scic_to_dev(scic),
1883 "%s: Controller timer fired when controller was not "
1884 "in a state being timed.\n",
1885 __func__);
1886}
1887
1888static enum sci_status scic_sds_controller_initialize_phy_startup(struct scic_sds_controller *scic)
1889{
1890 struct isci_host *ihost = scic_to_ihost(scic);
1891
1892 scic->phy_startup_timer = isci_timer_create(ihost,
1893 scic,
1894 scic_sds_controller_phy_startup_timeout_handler);
1895
1896 if (scic->phy_startup_timer == NULL)
1897 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1898 else {
1899 scic->next_phy_to_start = 0;
1900 scic->phy_startup_timer_pending = false;
1901 }
1902
1903 return SCI_SUCCESS;
1904}
1905
1906static void scic_sds_controller_power_control_timer_start(struct scic_sds_controller *scic)
1907{
1908 isci_timer_start(scic->power_control.timer,
1909 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
1910
1911 scic->power_control.timer_started = true;
1912}
1913
1914static void scic_sds_controller_power_control_timer_stop(struct scic_sds_controller *scic)
1915{
1916 if (scic->power_control.timer_started) {
1917 isci_timer_stop(scic->power_control.timer);
1918 scic->power_control.timer_started = false;
1919 }
1920}
1921
1922static void scic_sds_controller_power_control_timer_restart(struct scic_sds_controller *scic)
1923{
1924 scic_sds_controller_power_control_timer_stop(scic);
1925 scic_sds_controller_power_control_timer_start(scic);
1926}
1927
1928static void scic_sds_controller_power_control_timer_handler(
1929 void *controller)
1930{
1931 struct scic_sds_controller *scic;
1932
1933 scic = (struct scic_sds_controller *)controller;
1934
1935 scic->power_control.phys_granted_power = 0;
1936
1937 if (scic->power_control.phys_waiting == 0) {
1938 scic->power_control.timer_started = false;
1939 } else {
1940 struct scic_sds_phy *sci_phy = NULL;
1941 u8 i;
1942
1943 for (i = 0;
1944 (i < SCI_MAX_PHYS)
1945 && (scic->power_control.phys_waiting != 0);
1946 i++) {
1947 if (scic->power_control.requesters[i] != NULL) {
1948 if (scic->power_control.phys_granted_power <
1949 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1950 sci_phy = scic->power_control.requesters[i];
1951 scic->power_control.requesters[i] = NULL;
1952 scic->power_control.phys_waiting--;
1953 scic->power_control.phys_granted_power++;
1954 scic_sds_phy_consume_power_handler(sci_phy);
1955 } else {
1956 break;
1957 }
1958 }
1959 }
1960
1961 /*
1962 * It doesn't matter if the power list is empty, we need to start the
1963 * timer in case another phy becomes ready.
1964 */
1965 scic_sds_controller_power_control_timer_start(scic);
1966 }
1967}
1968
1969/**
1970 * This method inserts the phy in the stagger spinup control queue.
1971 * @scic:
1972 *
1973 *
1974 */
1975void scic_sds_controller_power_control_queue_insert(
1976 struct scic_sds_controller *scic,
1977 struct scic_sds_phy *sci_phy)
1978{
1979 BUG_ON(sci_phy == NULL);
1980
1981 if (scic->power_control.phys_granted_power <
1982 scic->oem_parameters.sds1.controller.max_concurrent_dev_spin_up) {
1983 scic->power_control.phys_granted_power++;
1984 scic_sds_phy_consume_power_handler(sci_phy);
1985
1986 /*
1987 * stop and start the power_control timer. When the timer fires, the
1988 * no_of_phys_granted_power will be set to 0
1989 */
1990 scic_sds_controller_power_control_timer_restart(scic);
1991 } else {
1992 /* Add the phy in the waiting list */
1993 scic->power_control.requesters[sci_phy->phy_index] = sci_phy;
1994 scic->power_control.phys_waiting++;
1995 }
1996}
1997
1998/**
1999 * This method removes the phy from the stagger spinup control queue.
2000 * @scic:
2001 *
2002 *
2003 */
2004void scic_sds_controller_power_control_queue_remove(
2005 struct scic_sds_controller *scic,
2006 struct scic_sds_phy *sci_phy)
2007{
2008 BUG_ON(sci_phy == NULL);
2009
2010 if (scic->power_control.requesters[sci_phy->phy_index] != NULL) {
2011 scic->power_control.phys_waiting--;
2012 }
2013
2014 scic->power_control.requesters[sci_phy->phy_index] = NULL;
2015}
2016
2017#define AFE_REGISTER_WRITE_DELAY 10
2018
2019/* Initialize the AFE for this phy index. We need to read the AFE setup from
2020 * the OEM parameters
2021 */
2022static void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
2023{
2024 const struct scic_sds_oem_params *oem = &scic->oem_parameters.sds1;
2025 u32 afe_status;
2026 u32 phy_id;
2027
2028 /* Clear DFX Status registers */
2029 writel(0x0081000f, &scic->scu_registers->afe.afe_dfx_master_control0);
2030 udelay(AFE_REGISTER_WRITE_DELAY);
2031
2032 if (is_b0()) {
2033 /* PM Rx Equalization Save, PM SPhy Rx Acknowledgement
2034 * Timer, PM Stagger Timer */
2035 writel(0x0007BFFF, &scic->scu_registers->afe.afe_pmsn_master_control2);
2036 udelay(AFE_REGISTER_WRITE_DELAY);
2037 }
2038
2039 /* Configure bias currents to normal */
2040 if (is_a0())
2041 writel(0x00005500, &scic->scu_registers->afe.afe_bias_control);
2042 else if (is_a2())
2043 writel(0x00005A00, &scic->scu_registers->afe.afe_bias_control);
2044 else if (is_b0())
2045 writel(0x00005F00, &scic->scu_registers->afe.afe_bias_control);
2046
2047 udelay(AFE_REGISTER_WRITE_DELAY);
2048
2049 /* Enable PLL */
2050 if (is_b0())
2051 writel(0x80040A08, &scic->scu_registers->afe.afe_pll_control0);
2052 else
2053 writel(0x80040908, &scic->scu_registers->afe.afe_pll_control0);
2054
2055 udelay(AFE_REGISTER_WRITE_DELAY);
2056
2057 /* Wait for the PLL to lock */
2058 do {
2059 afe_status = readl(&scic->scu_registers->afe.afe_common_block_status);
2060 udelay(AFE_REGISTER_WRITE_DELAY);
2061 } while ((afe_status & 0x00001000) == 0);
2062
2063 if (is_a0() || is_a2()) {
2064 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
2065 writel(0x7bcc96ad, &scic->scu_registers->afe.afe_pmsn_master_control0);
2066 udelay(AFE_REGISTER_WRITE_DELAY);
2067 }
2068
2069 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
2070 const struct sci_phy_oem_params *oem_phy = &oem->phys[phy_id];
2071
2072 if (is_b0()) {
2073 /* Configure transmitter SSC parameters */
2074 writel(0x00030000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_ssc_control);
2075 udelay(AFE_REGISTER_WRITE_DELAY);
2076 } else {
2077 /*
2078 * All defaults, except the Receive Word Alignament/Comma Detect
2079 * Enable....(0xe800) */
2080 writel(0x00004512, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
2081 udelay(AFE_REGISTER_WRITE_DELAY);
2082
2083 writel(0x0050100F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control1);
2084 udelay(AFE_REGISTER_WRITE_DELAY);
2085 }
2086
2087 /*
2088 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2089 * & increase TX int & ext bias 20%....(0xe85c) */
2090 if (is_a0())
2091 writel(0x000003D4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2092 else if (is_a2())
2093 writel(0x000003F0, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2094 else {
2095 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
2096 writel(0x000003d7, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2097 udelay(AFE_REGISTER_WRITE_DELAY);
2098
2099 /*
2100 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
2101 * & increase TX int & ext bias 20%....(0xe85c) */
2102 writel(0x000003d4, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_channel_control);
2103 }
2104 udelay(AFE_REGISTER_WRITE_DELAY);
2105
2106 if (is_a0() || is_a2()) {
2107 /* Enable TX equalization (0xe824) */
2108 writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2109 udelay(AFE_REGISTER_WRITE_DELAY);
2110 }
2111
2112 /*
2113 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
2114 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
2115 writel(0x00004100, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_xcvr_control0);
2116 udelay(AFE_REGISTER_WRITE_DELAY);
2117
2118 /* Leave DFE/FFE on */
2119 if (is_a0())
2120 writel(0x3F09983F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2121 else if (is_a2())
2122 writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2123 else {
2124 writel(0x3F11103F, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_rx_ssc_control0);
2125 udelay(AFE_REGISTER_WRITE_DELAY);
2126 /* Enable TX equalization (0xe824) */
2127 writel(0x00040000, &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_control);
2128 }
2129 udelay(AFE_REGISTER_WRITE_DELAY);
2130
2131 writel(oem_phy->afe_tx_amp_control0,
2132 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control0);
2133 udelay(AFE_REGISTER_WRITE_DELAY);
2134
2135 writel(oem_phy->afe_tx_amp_control1,
2136 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control1);
2137 udelay(AFE_REGISTER_WRITE_DELAY);
2138
2139 writel(oem_phy->afe_tx_amp_control2,
2140 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control2);
2141 udelay(AFE_REGISTER_WRITE_DELAY);
2142
2143 writel(oem_phy->afe_tx_amp_control3,
2144 &scic->scu_registers->afe.scu_afe_xcvr[phy_id].afe_tx_amp_control3);
2145 udelay(AFE_REGISTER_WRITE_DELAY);
2146 }
2147
2148 /* Transfer control to the PEs */
2149 writel(0x00010f00, &scic->scu_registers->afe.afe_dfx_master_control0);
2150 udelay(AFE_REGISTER_WRITE_DELAY);
2151}
2152
2153static enum sci_status scic_controller_set_mode(struct scic_sds_controller *scic,
2154 enum sci_controller_mode operating_mode)
2155{
2156 enum sci_status status = SCI_SUCCESS;
2157
2158 if ((scic->state_machine.current_state_id ==
2159 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2160 (scic->state_machine.current_state_id ==
2161 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2162 switch (operating_mode) {
2163 case SCI_MODE_SPEED:
2164 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2165 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2166 scic->uf_control.buffers.count =
2167 SCU_UNSOLICITED_FRAME_COUNT;
2168 scic->completion_event_entries = SCU_EVENT_COUNT;
2169 scic->completion_queue_entries =
2170 SCU_COMPLETION_QUEUE_COUNT;
2171 break;
2172
2173 case SCI_MODE_SIZE:
2174 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2175 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2176 scic->uf_control.buffers.count =
2177 SCU_MIN_UNSOLICITED_FRAMES;
2178 scic->completion_event_entries = SCU_MIN_EVENTS;
2179 scic->completion_queue_entries =
2180 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2181 break;
2182
2183 default:
2184 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2185 break;
2186 }
2187 } else
2188 status = SCI_FAILURE_INVALID_STATE;
2189
2190 return status;
2191}
2192
2193static void scic_sds_controller_initialize_power_control(struct scic_sds_controller *scic)
2194{
2195 struct isci_host *ihost = scic_to_ihost(scic);
2196 scic->power_control.timer = isci_timer_create(ihost,
2197 scic,
2198 scic_sds_controller_power_control_timer_handler);
2199
2200 memset(scic->power_control.requesters, 0,
2201 sizeof(scic->power_control.requesters));
2202
2203 scic->power_control.phys_waiting = 0;
2204 scic->power_control.phys_granted_power = 0;
2205}
2206
2207static enum sci_status scic_controller_initialize(struct scic_sds_controller *scic)
2208{
2209 struct sci_base_state_machine *sm = &scic->state_machine;
2210 enum sci_status result = SCI_SUCCESS;
2211 struct isci_host *ihost = scic_to_ihost(scic);
2212 u32 index, state;
2213
2214 if (scic->state_machine.current_state_id !=
2215 SCI_BASE_CONTROLLER_STATE_RESET) {
2216 dev_warn(scic_to_dev(scic),
2217 "SCIC Controller initialize operation requested "
2218 "in invalid state\n");
2219 return SCI_FAILURE_INVALID_STATE;
2220 }
2221
2222 sci_base_state_machine_change_state(sm, SCI_BASE_CONTROLLER_STATE_INITIALIZING);
2223
2224 scic->timeout_timer = isci_timer_create(ihost, scic,
2225 scic_sds_controller_timeout_handler);
2226
2227 scic_sds_controller_initialize_phy_startup(scic);
2228
2229 scic_sds_controller_initialize_power_control(scic);
2230
2231 /*
2232 * There is nothing to do here for B0 since we do not have to
2233 * program the AFE registers.
2234 * / @todo The AFE settings are supposed to be correct for the B0 but
2235 * / presently they seem to be wrong. */
2236 scic_sds_controller_afe_initialization(scic);
2237
2238 if (result == SCI_SUCCESS) {
2239 u32 status;
2240 u32 terminate_loop;
2241
2242 /* Take the hardware out of reset */
2243 writel(0, &scic->smu_registers->soft_reset_control);
2244
2245 /*
2246 * / @todo Provide meaningfull error code for hardware failure
2247 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2248 result = SCI_FAILURE;
2249 terminate_loop = 100;
2250
2251 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2252 /* Loop until the hardware reports success */
2253 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2254 status = readl(&scic->smu_registers->control_status);
2255
2256 if ((status & SCU_RAM_INIT_COMPLETED) ==
2257 SCU_RAM_INIT_COMPLETED)
2258 result = SCI_SUCCESS;
2259 }
2260 }
2261
2262 if (result == SCI_SUCCESS) {
2263 u32 max_supported_ports;
2264 u32 max_supported_devices;
2265 u32 max_supported_io_requests;
2266 u32 device_context_capacity;
2267
2268 /*
2269 * Determine what are the actaul device capacities that the
2270 * hardware will support */
2271 device_context_capacity =
2272 readl(&scic->smu_registers->device_context_capacity);
2273
2274
2275 max_supported_ports = smu_dcc_get_max_ports(device_context_capacity);
2276 max_supported_devices = smu_dcc_get_max_remote_node_context(device_context_capacity);
2277 max_supported_io_requests = smu_dcc_get_max_task_context(device_context_capacity);
2278
2279 /*
2280 * Make all PEs that are unassigned match up with the
2281 * logical ports
2282 */
2283 for (index = 0; index < max_supported_ports; index++) {
2284 struct scu_port_task_scheduler_group_registers __iomem
2285 *ptsg = &scic->scu_registers->peg0.ptsg;
2286
2287 writel(index, &ptsg->protocol_engine[index]);
2288 }
2289
2290 /* Record the smaller of the two capacity values */
2291 scic->logical_port_entries =
2292 min(max_supported_ports, scic->logical_port_entries);
2293
2294 scic->task_context_entries =
2295 min(max_supported_io_requests,
2296 scic->task_context_entries);
2297
2298 scic->remote_node_entries =
2299 min(max_supported_devices, scic->remote_node_entries);
2300
2301 /*
2302 * Now that we have the correct hardware reported minimum values
2303 * build the MDL for the controller. Default to a performance
2304 * configuration.
2305 */
2306 scic_controller_set_mode(scic, SCI_MODE_SPEED);
2307 }
2308
2309 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2310 if (result == SCI_SUCCESS) {
2311 u32 dma_configuration;
2312
2313 /* Configure the payload DMA */
2314 dma_configuration =
2315 readl(&scic->scu_registers->sdma.pdma_configuration);
2316 dma_configuration |=
2317 SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2318 writel(dma_configuration,
2319 &scic->scu_registers->sdma.pdma_configuration);
2320
2321 /* Configure the control DMA */
2322 dma_configuration =
2323 readl(&scic->scu_registers->sdma.cdma_configuration);
2324 dma_configuration |=
2325 SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2326 writel(dma_configuration,
2327 &scic->scu_registers->sdma.cdma_configuration);
2328 }
2329
2330 /*
2331 * Initialize the PHYs before the PORTs because the PHY registers
2332 * are accessed during the port initialization.
2333 */
2334 if (result == SCI_SUCCESS) {
2335 /* Initialize the phys */
2336 for (index = 0;
2337 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2338 index++) {
2339 result = scic_sds_phy_initialize(
2340 &ihost->phys[index].sci,
2341 &scic->scu_registers->peg0.pe[index].tl,
2342 &scic->scu_registers->peg0.pe[index].ll);
2343 }
2344 }
2345
2346 if (result == SCI_SUCCESS) {
2347 /* Initialize the logical ports */
2348 for (index = 0;
2349 (index < scic->logical_port_entries) &&
2350 (result == SCI_SUCCESS);
2351 index++) {
2352 result = scic_sds_port_initialize(
2353 &ihost->ports[index].sci,
2354 &scic->scu_registers->peg0.ptsg.port[index],
2355 &scic->scu_registers->peg0.ptsg.protocol_engine,
2356 &scic->scu_registers->peg0.viit[index]);
2357 }
2358 }
2359
2360 if (result == SCI_SUCCESS)
2361 result = scic_sds_port_configuration_agent_initialize(
2362 scic,
2363 &scic->port_agent);
2364
2365 /* Advance the controller state machine */
2366 if (result == SCI_SUCCESS)
2367 state = SCI_BASE_CONTROLLER_STATE_INITIALIZED;
2368 else
2369 state = SCI_BASE_CONTROLLER_STATE_FAILED;
2370 sci_base_state_machine_change_state(sm, state);
2371
2372 return result;
2373}
2374
2375static enum sci_status scic_user_parameters_set(
2376 struct scic_sds_controller *scic,
2377 union scic_user_parameters *scic_parms)
2378{
2379 u32 state = scic->state_machine.current_state_id;
2380
2381 if (state == SCI_BASE_CONTROLLER_STATE_RESET ||
2382 state == SCI_BASE_CONTROLLER_STATE_INITIALIZING ||
2383 state == SCI_BASE_CONTROLLER_STATE_INITIALIZED) {
2384 u16 index;
2385
2386 /*
2387 * Validate the user parameters. If they are not legal, then
2388 * return a failure.
2389 */
2390 for (index = 0; index < SCI_MAX_PHYS; index++) {
2391 struct sci_phy_user_params *user_phy;
2392
2393 user_phy = &scic_parms->sds1.phys[index];
2394
2395 if (!((user_phy->max_speed_generation <=
2396 SCIC_SDS_PARM_MAX_SPEED) &&
2397 (user_phy->max_speed_generation >
2398 SCIC_SDS_PARM_NO_SPEED)))
2399 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2400
2401 if (user_phy->in_connection_align_insertion_frequency <
2402 3)
2403 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2404
2405 if ((user_phy->in_connection_align_insertion_frequency <
2406 3) ||
2407 (user_phy->align_insertion_frequency == 0) ||
2408 (user_phy->
2409 notify_enable_spin_up_insertion_frequency ==
2410 0))
2411 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2412 }
2413
2414 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2415 (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2416 (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2417 (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2418 (scic_parms->sds1.no_outbound_task_timeout == 0))
2419 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2420
2421 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2422
2423 return SCI_SUCCESS;
2424 }
2425
2426 return SCI_FAILURE_INVALID_STATE;
2427}
2428
2429static int scic_controller_mem_init(struct scic_sds_controller *scic)
2430{
2431 struct device *dev = scic_to_dev(scic);
2432 dma_addr_t dma_handle;
2433 enum sci_status result;
2434
2435 scic->completion_queue = dmam_alloc_coherent(dev,
2436 scic->completion_queue_entries * sizeof(u32),
2437 &dma_handle, GFP_KERNEL);
2438 if (!scic->completion_queue)
2439 return -ENOMEM;
2440
2441 writel(lower_32_bits(dma_handle),
2442 &scic->smu_registers->completion_queue_lower);
2443 writel(upper_32_bits(dma_handle),
2444 &scic->smu_registers->completion_queue_upper);
2445
2446 scic->remote_node_context_table = dmam_alloc_coherent(dev,
2447 scic->remote_node_entries *
2448 sizeof(union scu_remote_node_context),
2449 &dma_handle, GFP_KERNEL);
2450 if (!scic->remote_node_context_table)
2451 return -ENOMEM;
2452
2453 writel(lower_32_bits(dma_handle),
2454 &scic->smu_registers->remote_node_context_lower);
2455 writel(upper_32_bits(dma_handle),
2456 &scic->smu_registers->remote_node_context_upper);
2457
2458 scic->task_context_table = dmam_alloc_coherent(dev,
2459 scic->task_context_entries *
2460 sizeof(struct scu_task_context),
2461 &dma_handle, GFP_KERNEL);
2462 if (!scic->task_context_table)
2463 return -ENOMEM;
2464
2465 writel(lower_32_bits(dma_handle),
2466 &scic->smu_registers->host_task_table_lower);
2467 writel(upper_32_bits(dma_handle),
2468 &scic->smu_registers->host_task_table_upper);
2469
2470 result = scic_sds_unsolicited_frame_control_construct(scic);
2471 if (result)
2472 return result;
2473
2474 /*
2475 * Inform the silicon as to the location of the UF headers and
2476 * address table.
2477 */
2478 writel(lower_32_bits(scic->uf_control.headers.physical_address),
2479 &scic->scu_registers->sdma.uf_header_base_address_lower);
2480 writel(upper_32_bits(scic->uf_control.headers.physical_address),
2481 &scic->scu_registers->sdma.uf_header_base_address_upper);
2482
2483 writel(lower_32_bits(scic->uf_control.address_table.physical_address),
2484 &scic->scu_registers->sdma.uf_address_table_lower);
2485 writel(upper_32_bits(scic->uf_control.address_table.physical_address),
2486 &scic->scu_registers->sdma.uf_address_table_upper);
2487
2488 return 0;
2489}
2490
344int isci_host_init(struct isci_host *isci_host) 2491int isci_host_init(struct isci_host *isci_host)
345{ 2492{
346 int err = 0, i; 2493 int err = 0, i;
@@ -453,3 +2600,625 @@ int isci_host_init(struct isci_host *isci_host)
453 2600
454 return 0; 2601 return 0;
455} 2602}
2603
2604void scic_sds_controller_link_up(struct scic_sds_controller *scic,
2605 struct scic_sds_port *port, struct scic_sds_phy *phy)
2606{
2607 switch (scic->state_machine.current_state_id) {
2608 case SCI_BASE_CONTROLLER_STATE_STARTING:
2609 scic_sds_controller_phy_timer_stop(scic);
2610 scic->port_agent.link_up_handler(scic, &scic->port_agent,
2611 port, phy);
2612 scic_sds_controller_start_next_phy(scic);
2613 break;
2614 case SCI_BASE_CONTROLLER_STATE_READY:
2615 scic->port_agent.link_up_handler(scic, &scic->port_agent,
2616 port, phy);
2617 break;
2618 default:
2619 dev_dbg(scic_to_dev(scic),
2620 "%s: SCIC Controller linkup event from phy %d in "
2621 "unexpected state %d\n", __func__, phy->phy_index,
2622 scic->state_machine.current_state_id);
2623 }
2624}
2625
2626void scic_sds_controller_link_down(struct scic_sds_controller *scic,
2627 struct scic_sds_port *port, struct scic_sds_phy *phy)
2628{
2629 switch (scic->state_machine.current_state_id) {
2630 case SCI_BASE_CONTROLLER_STATE_STARTING:
2631 case SCI_BASE_CONTROLLER_STATE_READY:
2632 scic->port_agent.link_down_handler(scic, &scic->port_agent,
2633 port, phy);
2634 break;
2635 default:
2636 dev_dbg(scic_to_dev(scic),
2637 "%s: SCIC Controller linkdown event from phy %d in "
2638 "unexpected state %d\n",
2639 __func__,
2640 phy->phy_index,
2641 scic->state_machine.current_state_id);
2642 }
2643}
2644
2645/**
2646 * This is a helper method to determine if any remote devices on this
2647 * controller are still in the stopping state.
2648 *
2649 */
2650static bool scic_sds_controller_has_remote_devices_stopping(
2651 struct scic_sds_controller *controller)
2652{
2653 u32 index;
2654
2655 for (index = 0; index < controller->remote_node_entries; index++) {
2656 if ((controller->device_table[index] != NULL) &&
2657 (controller->device_table[index]->state_machine.current_state_id
2658 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
2659 return true;
2660 }
2661
2662 return false;
2663}
2664
2665/**
2666 * This method is called by the remote device to inform the controller
2667 * object that the remote device has stopped.
2668 */
2669void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
2670 struct scic_sds_remote_device *sci_dev)
2671{
2672 if (scic->state_machine.current_state_id !=
2673 SCI_BASE_CONTROLLER_STATE_STOPPING) {
2674 dev_dbg(scic_to_dev(scic),
2675 "SCIC Controller 0x%p remote device stopped event "
2676 "from device 0x%p in unexpected state %d\n",
2677 scic, sci_dev,
2678 scic->state_machine.current_state_id);
2679 return;
2680 }
2681
2682 if (!scic_sds_controller_has_remote_devices_stopping(scic)) {
2683 sci_base_state_machine_change_state(&scic->state_machine,
2684 SCI_BASE_CONTROLLER_STATE_STOPPED);
2685 }
2686}
2687
2688/**
2689 * This method will write to the SCU PCP register the request value. The method
2690 * is used to suspend/resume ports, devices, and phys.
2691 * @scic:
2692 *
2693 *
2694 */
2695void scic_sds_controller_post_request(
2696 struct scic_sds_controller *scic,
2697 u32 request)
2698{
2699 dev_dbg(scic_to_dev(scic),
2700 "%s: SCIC Controller 0x%p post request 0x%08x\n",
2701 __func__,
2702 scic,
2703 request);
2704
2705 writel(request, &scic->smu_registers->post_context_port);
2706}
2707
2708/**
2709 * This method will copy the soft copy of the task context into the physical
2710 * memory accessible by the controller.
2711 * @scic: This parameter specifies the controller for which to copy
2712 * the task context.
2713 * @sci_req: This parameter specifies the request for which the task
2714 * context is being copied.
2715 *
2716 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
2717 * the physical memory version of the task context. Thus, all subsequent
2718 * updates to the task context are performed in the TC table (i.e. DMAable
2719 * memory). none
2720 */
2721void scic_sds_controller_copy_task_context(
2722 struct scic_sds_controller *scic,
2723 struct scic_sds_request *sci_req)
2724{
2725 struct scu_task_context *task_context_buffer;
2726
2727 task_context_buffer = scic_sds_controller_get_task_context_buffer(
2728 scic, sci_req->io_tag);
2729
2730 memcpy(task_context_buffer,
2731 sci_req->task_context_buffer,
2732 offsetof(struct scu_task_context, sgl_snapshot_ac));
2733
2734 /*
2735 * Now that the soft copy of the TC has been copied into the TC
2736 * table accessible by the silicon. Thus, any further changes to
2737 * the TC (e.g. TC termination) occur in the appropriate location. */
2738 sci_req->task_context_buffer = task_context_buffer;
2739}
2740
2741/**
2742 * This method returns the task context buffer for the given io tag.
2743 * @scic:
2744 * @io_tag:
2745 *
2746 * struct scu_task_context*
2747 */
2748struct scu_task_context *scic_sds_controller_get_task_context_buffer(
2749 struct scic_sds_controller *scic,
2750 u16 io_tag
2751 ) {
2752 u16 task_index = scic_sds_io_tag_get_index(io_tag);
2753
2754 if (task_index < scic->task_context_entries) {
2755 return &scic->task_context_table[task_index];
2756 }
2757
2758 return NULL;
2759}
2760
2761struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic,
2762 u16 io_tag)
2763{
2764 u16 task_index;
2765 u16 task_sequence;
2766
2767 task_index = scic_sds_io_tag_get_index(io_tag);
2768
2769 if (task_index < scic->task_context_entries) {
2770 if (scic->io_request_table[task_index] != NULL) {
2771 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
2772
2773 if (task_sequence == scic->io_request_sequence[task_index]) {
2774 return scic->io_request_table[task_index];
2775 }
2776 }
2777 }
2778
2779 return NULL;
2780}
2781
2782/**
2783 * This method allocates remote node index and the reserves the remote node
2784 * context space for use. This method can fail if there are no more remote
2785 * node index available.
2786 * @scic: This is the controller object which contains the set of
2787 * free remote node ids
2788 * @sci_dev: This is the device object which is requesting the a remote node
2789 * id
2790 * @node_id: This is the remote node id that is assinged to the device if one
2791 * is available
2792 *
2793 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
2794 * node index available.
2795 */
2796enum sci_status scic_sds_controller_allocate_remote_node_context(
2797 struct scic_sds_controller *scic,
2798 struct scic_sds_remote_device *sci_dev,
2799 u16 *node_id)
2800{
2801 u16 node_index;
2802 u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
2803
2804 node_index = scic_sds_remote_node_table_allocate_remote_node(
2805 &scic->available_remote_nodes, remote_node_count
2806 );
2807
2808 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
2809 scic->device_table[node_index] = sci_dev;
2810
2811 *node_id = node_index;
2812
2813 return SCI_SUCCESS;
2814 }
2815
2816 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
2817}
2818
2819/**
2820 * This method frees the remote node index back to the available pool. Once
2821 * this is done the remote node context buffer is no longer valid and can
2822 * not be used.
2823 * @scic:
2824 * @sci_dev:
2825 * @node_id:
2826 *
2827 */
2828void scic_sds_controller_free_remote_node_context(
2829 struct scic_sds_controller *scic,
2830 struct scic_sds_remote_device *sci_dev,
2831 u16 node_id)
2832{
2833 u32 remote_node_count = scic_sds_remote_device_node_count(sci_dev);
2834
2835 if (scic->device_table[node_id] == sci_dev) {
2836 scic->device_table[node_id] = NULL;
2837
2838 scic_sds_remote_node_table_release_remote_node_index(
2839 &scic->available_remote_nodes, remote_node_count, node_id
2840 );
2841 }
2842}
2843
2844/**
2845 * This method returns the union scu_remote_node_context for the specified remote
2846 * node id.
2847 * @scic:
2848 * @node_id:
2849 *
2850 * union scu_remote_node_context*
2851 */
2852union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
2853 struct scic_sds_controller *scic,
2854 u16 node_id
2855 ) {
2856 if (
2857 (node_id < scic->remote_node_entries)
2858 && (scic->device_table[node_id] != NULL)
2859 ) {
2860 return &scic->remote_node_context_table[node_id];
2861 }
2862
2863 return NULL;
2864}
2865
2866/**
2867 *
2868 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
2869 * constructed.
2870 * @frame_header: This is the frame header returned by the hardware.
2871 * @frame_buffer: This is the frame buffer returned by the hardware.
2872 *
2873 * This method will combind the frame header and frame buffer to create a SATA
2874 * D2H register FIS none
2875 */
2876void scic_sds_controller_copy_sata_response(
2877 void *response_buffer,
2878 void *frame_header,
2879 void *frame_buffer)
2880{
2881 memcpy(response_buffer, frame_header, sizeof(u32));
2882
2883 memcpy(response_buffer + sizeof(u32),
2884 frame_buffer,
2885 sizeof(struct dev_to_host_fis) - sizeof(u32));
2886}
2887
2888/**
2889 * This method releases the frame once this is done the frame is available for
2890 * re-use by the hardware. The data contained in the frame header and frame
2891 * buffer is no longer valid. The UF queue get pointer is only updated if UF
2892 * control indicates this is appropriate.
2893 * @scic:
2894 * @frame_index:
2895 *
2896 */
2897void scic_sds_controller_release_frame(
2898 struct scic_sds_controller *scic,
2899 u32 frame_index)
2900{
2901 if (scic_sds_unsolicited_frame_control_release_frame(
2902 &scic->uf_control, frame_index) == true)
2903 writel(scic->uf_control.get,
2904 &scic->scu_registers->sdma.unsolicited_frame_get_pointer);
2905}
2906
2907/**
2908 * scic_controller_start_io() - This method is called by the SCI user to
2909 * send/start an IO request. If the method invocation is successful, then
2910 * the IO request has been queued to the hardware for processing.
2911 * @controller: the handle to the controller object for which to start an IO
2912 * request.
2913 * @remote_device: the handle to the remote device object for which to start an
2914 * IO request.
2915 * @io_request: the handle to the io request object to start.
2916 * @io_tag: This parameter specifies a previously allocated IO tag that the
2917 * user desires to be utilized for this request. This parameter is optional.
2918 * The user is allowed to supply SCI_CONTROLLER_INVALID_IO_TAG as the value
2919 * for this parameter.
2920 *
2921 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
2922 * to ensure that each of the methods that may allocate or free available IO
2923 * tags are handled in a mutually exclusive manner. This method is one of said
2924 * methods requiring proper critical code section protection (e.g. semaphore,
2925 * spin-lock, etc.). - For SATA, the user is required to manage NCQ tags. As a
2926 * result, it is expected the user will have set the NCQ tag field in the host
2927 * to device register FIS prior to calling this method. There is also a
2928 * requirement for the user to call scic_stp_io_set_ncq_tag() prior to invoking
2929 * the scic_controller_start_io() method. scic_controller_allocate_tag() for
2930 * more information on allocating a tag. Indicate if the controller
2931 * successfully started the IO request. SCI_SUCCESS if the IO request was
2932 * successfully started. Determine the failure situations and return values.
2933 */
2934enum sci_status scic_controller_start_io(
2935 struct scic_sds_controller *scic,
2936 struct scic_sds_remote_device *rdev,
2937 struct scic_sds_request *req,
2938 u16 io_tag)
2939{
2940 enum sci_status status;
2941
2942 if (scic->state_machine.current_state_id !=
2943 SCI_BASE_CONTROLLER_STATE_READY) {
2944 dev_warn(scic_to_dev(scic), "invalid state to start I/O");
2945 return SCI_FAILURE_INVALID_STATE;
2946 }
2947
2948 status = scic_sds_remote_device_start_io(scic, rdev, req);
2949 if (status != SCI_SUCCESS)
2950 return status;
2951
2952 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
2953 scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(req));
2954 return SCI_SUCCESS;
2955}
2956
2957/**
2958 * scic_controller_terminate_request() - This method is called by the SCI Core
2959 * user to terminate an ongoing (i.e. started) core IO request. This does
2960 * not abort the IO request at the target, but rather removes the IO request
2961 * from the host controller.
2962 * @controller: the handle to the controller object for which to terminate a
2963 * request.
2964 * @remote_device: the handle to the remote device object for which to
2965 * terminate a request.
2966 * @request: the handle to the io or task management request object to
2967 * terminate.
2968 *
2969 * Indicate if the controller successfully began the terminate process for the
2970 * IO request. SCI_SUCCESS if the terminate process was successfully started
2971 * for the request. Determine the failure situations and return values.
2972 */
2973enum sci_status scic_controller_terminate_request(
2974 struct scic_sds_controller *scic,
2975 struct scic_sds_remote_device *rdev,
2976 struct scic_sds_request *req)
2977{
2978 enum sci_status status;
2979
2980 if (scic->state_machine.current_state_id !=
2981 SCI_BASE_CONTROLLER_STATE_READY) {
2982 dev_warn(scic_to_dev(scic),
2983 "invalid state to terminate request\n");
2984 return SCI_FAILURE_INVALID_STATE;
2985 }
2986
2987 status = scic_sds_io_request_terminate(req);
2988 if (status != SCI_SUCCESS)
2989 return status;
2990
2991 /*
2992 * Utilize the original post context command and or in the POST_TC_ABORT
2993 * request sub-type.
2994 */
2995 scic_sds_controller_post_request(scic,
2996 scic_sds_request_get_post_context(req) |
2997 SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);
2998 return SCI_SUCCESS;
2999}
3000
3001/**
3002 * scic_controller_complete_io() - This method will perform core specific
3003 * completion operations for an IO request. After this method is invoked,
3004 * the user should consider the IO request as invalid until it is properly
3005 * reused (i.e. re-constructed).
3006 * @controller: The handle to the controller object for which to complete the
3007 * IO request.
3008 * @remote_device: The handle to the remote device object for which to complete
3009 * the IO request.
3010 * @io_request: the handle to the io request object to complete.
3011 *
3012 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3013 * to ensure that each of the methods that may allocate or free available IO
3014 * tags are handled in a mutually exclusive manner. This method is one of said
3015 * methods requiring proper critical code section protection (e.g. semaphore,
3016 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
3017 * Core user, using the scic_controller_allocate_io_tag() method, then it is
3018 * the responsibility of the caller to invoke the scic_controller_free_io_tag()
3019 * method to free the tag (i.e. this method will not free the IO tag). Indicate
3020 * if the controller successfully completed the IO request. SCI_SUCCESS if the
3021 * completion process was successful.
3022 */
3023enum sci_status scic_controller_complete_io(
3024 struct scic_sds_controller *scic,
3025 struct scic_sds_remote_device *rdev,
3026 struct scic_sds_request *request)
3027{
3028 enum sci_status status;
3029 u16 index;
3030
3031 switch (scic->state_machine.current_state_id) {
3032 case SCI_BASE_CONTROLLER_STATE_STOPPING:
3033 /* XXX: Implement this function */
3034 return SCI_FAILURE;
3035 case SCI_BASE_CONTROLLER_STATE_READY:
3036 status = scic_sds_remote_device_complete_io(scic, rdev, request);
3037 if (status != SCI_SUCCESS)
3038 return status;
3039
3040 index = scic_sds_io_tag_get_index(request->io_tag);
3041 scic->io_request_table[index] = NULL;
3042 return SCI_SUCCESS;
3043 default:
3044 dev_warn(scic_to_dev(scic), "invalid state to complete I/O");
3045 return SCI_FAILURE_INVALID_STATE;
3046 }
3047
3048}
3049
3050enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req)
3051{
3052 struct scic_sds_controller *scic = sci_req->owning_controller;
3053
3054 if (scic->state_machine.current_state_id !=
3055 SCI_BASE_CONTROLLER_STATE_READY) {
3056 dev_warn(scic_to_dev(scic), "invalid state to continue I/O");
3057 return SCI_FAILURE_INVALID_STATE;
3058 }
3059
3060 scic->io_request_table[scic_sds_io_tag_get_index(sci_req->io_tag)] = sci_req;
3061 scic_sds_controller_post_request(scic, scic_sds_request_get_post_context(sci_req));
3062 return SCI_SUCCESS;
3063}
3064
3065/**
3066 * scic_controller_start_task() - This method is called by the SCIC user to
3067 * send/start a framework task management request.
3068 * @controller: the handle to the controller object for which to start the task
3069 * management request.
3070 * @remote_device: the handle to the remote device object for which to start
3071 * the task management request.
3072 * @task_request: the handle to the task request object to start.
3073 * @io_tag: This parameter specifies a previously allocated IO tag that the
3074 * user desires to be utilized for this request. Note this not the io_tag
3075 * of the request being managed. It is to be utilized for the task request
3076 * itself. This parameter is optional. The user is allowed to supply
3077 * SCI_CONTROLLER_INVALID_IO_TAG as the value for this parameter.
3078 *
3079 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3080 * to ensure that each of the methods that may allocate or free available IO
3081 * tags are handled in a mutually exclusive manner. This method is one of said
3082 * methods requiring proper critical code section protection (e.g. semaphore,
3083 * spin-lock, etc.). - The user must synchronize this task with completion
3084 * queue processing. If they are not synchronized then it is possible for the
3085 * io requests that are being managed by the task request can complete before
3086 * starting the task request. scic_controller_allocate_tag() for more
3087 * information on allocating a tag. Indicate if the controller successfully
3088 * started the IO request. SCI_TASK_SUCCESS if the task request was
3089 * successfully started. SCI_TASK_FAILURE_REQUIRES_SCSI_ABORT This value is
3090 * returned if there is/are task(s) outstanding that require termination or
3091 * completion before this request can succeed.
3092 */
3093enum sci_task_status scic_controller_start_task(
3094 struct scic_sds_controller *scic,
3095 struct scic_sds_remote_device *rdev,
3096 struct scic_sds_request *req,
3097 u16 task_tag)
3098{
3099 enum sci_status status;
3100
3101 if (scic->state_machine.current_state_id !=
3102 SCI_BASE_CONTROLLER_STATE_READY) {
3103 dev_warn(scic_to_dev(scic),
3104 "%s: SCIC Controller starting task from invalid "
3105 "state\n",
3106 __func__);
3107 return SCI_TASK_FAILURE_INVALID_STATE;
3108 }
3109
3110 status = scic_sds_remote_device_start_task(scic, rdev, req);
3111 switch (status) {
3112 case SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS:
3113 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
3114
3115 /*
3116 * We will let framework know this task request started successfully,
3117 * although core is still woring on starting the request (to post tc when
3118 * RNC is resumed.)
3119 */
3120 return SCI_SUCCESS;
3121 case SCI_SUCCESS:
3122 scic->io_request_table[scic_sds_io_tag_get_index(req->io_tag)] = req;
3123
3124 scic_sds_controller_post_request(scic,
3125 scic_sds_request_get_post_context(req));
3126 break;
3127 default:
3128 break;
3129 }
3130
3131 return status;
3132}
3133
3134/**
3135 * scic_controller_allocate_io_tag() - This method will allocate a tag from the
3136 * pool of free IO tags. Direct allocation of IO tags by the SCI Core user
3137 * is optional. The scic_controller_start_io() method will allocate an IO
3138 * tag if this method is not utilized and the tag is not supplied to the IO
3139 * construct routine. Direct allocation of IO tags may provide additional
3140 * performance improvements in environments capable of supporting this usage
3141 * model. Additionally, direct allocation of IO tags also provides
3142 * additional flexibility to the SCI Core user. Specifically, the user may
3143 * retain IO tags across the lives of multiple IO requests.
3144 * @controller: the handle to the controller object for which to allocate the
3145 * tag.
3146 *
3147 * IO tags are a protected resource. It is incumbent upon the SCI Core user to
3148 * ensure that each of the methods that may allocate or free available IO tags
3149 * are handled in a mutually exclusive manner. This method is one of said
3150 * methods requiring proper critical code section protection (e.g. semaphore,
3151 * spin-lock, etc.). An unsigned integer representing an available IO tag.
3152 * SCI_CONTROLLER_INVALID_IO_TAG This value is returned if there are no
3153 * currently available tags to be allocated. All return other values indicate a
3154 * legitimate tag.
3155 */
3156u16 scic_controller_allocate_io_tag(
3157 struct scic_sds_controller *scic)
3158{
3159 u16 task_context;
3160 u16 sequence_count;
3161
3162 if (!sci_pool_empty(scic->tci_pool)) {
3163 sci_pool_get(scic->tci_pool, task_context);
3164
3165 sequence_count = scic->io_request_sequence[task_context];
3166
3167 return scic_sds_io_tag_construct(sequence_count, task_context);
3168 }
3169
3170 return SCI_CONTROLLER_INVALID_IO_TAG;
3171}
3172
3173/**
3174 * scic_controller_free_io_tag() - This method will free an IO tag to the pool
3175 * of free IO tags. This method provides the SCI Core user more flexibility
3176 * with regards to IO tags. The user may desire to keep an IO tag after an
3177 * IO request has completed, because they plan on re-using the tag for a
3178 * subsequent IO request. This method is only legal if the tag was
3179 * allocated via scic_controller_allocate_io_tag().
3180 * @controller: This parameter specifies the handle to the controller object
3181 * for which to free/return the tag.
3182 * @io_tag: This parameter represents the tag to be freed to the pool of
3183 * available tags.
3184 *
3185 * - IO tags are a protected resource. It is incumbent upon the SCI Core user
3186 * to ensure that each of the methods that may allocate or free available IO
3187 * tags are handled in a mutually exclusive manner. This method is one of said
3188 * methods requiring proper critical code section protection (e.g. semaphore,
3189 * spin-lock, etc.). - If the IO tag for a request was allocated, by the SCI
3190 * Core user, using the scic_controller_allocate_io_tag() method, then it is
3191 * the responsibility of the caller to invoke this method to free the tag. This
3192 * method returns an indication of whether the tag was successfully put back
3193 * (freed) to the pool of available tags. SCI_SUCCESS This return value
3194 * indicates the tag was successfully placed into the pool of available IO
3195 * tags. SCI_FAILURE_INVALID_IO_TAG This value is returned if the supplied tag
3196 * is not a valid IO tag value.
3197 */
3198enum sci_status scic_controller_free_io_tag(
3199 struct scic_sds_controller *scic,
3200 u16 io_tag)
3201{
3202 u16 sequence;
3203 u16 index;
3204
3205 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
3206
3207 sequence = scic_sds_io_tag_get_sequence(io_tag);
3208 index = scic_sds_io_tag_get_index(io_tag);
3209
3210 if (!sci_pool_full(scic->tci_pool)) {
3211 if (sequence == scic->io_request_sequence[index]) {
3212 scic_sds_io_sequence_increment(
3213 scic->io_request_sequence[index]);
3214
3215 sci_pool_put(scic->tci_pool, index);
3216
3217 return SCI_SUCCESS;
3218 }
3219 }
3220
3221 return SCI_FAILURE_INVALID_IO_TAG;
3222}
3223
3224
diff --git a/drivers/scsi/isci/host.h b/drivers/scsi/isci/host.h
index 13c1c99ef294..1f542c47fb3a 100644
--- a/drivers/scsi/isci/host.h
+++ b/drivers/scsi/isci/host.h
@@ -52,13 +52,258 @@
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55
56#ifndef _SCI_HOST_H_ 55#ifndef _SCI_HOST_H_
57#define _SCI_HOST_H_ 56#define _SCI_HOST_H_
58 57
59#include "scic_sds_controller.h" 58#include "scic_config_parameters.h"
60#include "remote_device.h" 59#include "remote_device.h"
61#include "phy.h" 60#include "phy.h"
61#include "pool.h"
62#include "sci_base_state_machine.h"
63#include "remote_node_table.h"
64#include "scu_registers.h"
65#include "scu_unsolicited_frame.h"
66#include "scic_sds_unsolicited_frame_control.h"
67#include "scic_sds_port_configuration_agent.h"
68
69struct scic_sds_request;
70struct scu_task_context;
71
72/**
73 * struct scic_power_control -
74 *
75 * This structure defines the fields for managing power control for direct
76 * attached disk devices.
77 */
78struct scic_power_control {
79 /**
80 * This field is set when the power control timer is running and cleared when
81 * it is not.
82 */
83 bool timer_started;
84
85 /**
86 * This field is the handle to the driver timer object. This timer is used to
87 * control when the directed attached disks can consume power.
88 */
89 void *timer;
90
91 /**
92 * This field is used to keep track of how many phys are put into the
93 * requesters field.
94 */
95 u8 phys_waiting;
96
97 /**
98 * This field is used to keep track of how many phys have been granted to consume power
99 */
100 u8 phys_granted_power;
101
102 /**
103 * This field is an array of phys that we are waiting on. The phys are direct
104 * mapped into requesters via struct scic_sds_phy.phy_index
105 */
106 struct scic_sds_phy *requesters[SCI_MAX_PHYS];
107
108};
109
110/**
111 * struct scic_sds_controller -
112 *
113 * This structure represents the SCU controller object.
114 */
115struct scic_sds_controller {
116 /**
117 * This field contains the information for the base controller state
118 * machine.
119 */
120 struct sci_base_state_machine state_machine;
121
122 /**
123 * This field is the driver timer object handler used to time the controller
124 * object start and stop requests.
125 */
126 void *timeout_timer;
127
128 /**
129 * This field contains the user parameters to be utilized for this
130 * core controller object.
131 */
132 union scic_user_parameters user_parameters;
133
134 /**
135 * This field contains the OEM parameters to be utilized for this
136 * core controller object.
137 */
138 union scic_oem_parameters oem_parameters;
139
140 /**
141 * This field contains the port configuration agent for this controller.
142 */
143 struct scic_sds_port_configuration_agent port_agent;
144
145 /**
146 * This field is the array of device objects that are currently constructed
147 * for this controller object. This table is used as a fast lookup of device
148 * objects that need to handle device completion notifications from the
149 * hardware. The table is RNi based.
150 */
151 struct scic_sds_remote_device *device_table[SCI_MAX_REMOTE_DEVICES];
152
153 /**
154 * This field is the array of IO request objects that are currently active for
155 * this controller object. This table is used as a fast lookup of the io
156 * request object that need to handle completion queue notifications. The
157 * table is TCi based.
158 */
159 struct scic_sds_request *io_request_table[SCI_MAX_IO_REQUESTS];
160
161 /**
162 * This field is the free RNi data structure
163 */
164 struct scic_remote_node_table available_remote_nodes;
165
166 /**
167 * This field is the TCi pool used to manage the task context index.
168 */
169 SCI_POOL_CREATE(tci_pool, u16, SCI_MAX_IO_REQUESTS);
170
171 /**
172 * This filed is the struct scic_power_control data used to controll when direct
173 * attached devices can consume power.
174 */
175 struct scic_power_control power_control;
176
177 /**
178 * This field is the array of sequence values for the IO Tag fields. Even
179 * though only 4 bits of the field is used for the sequence the sequence is 16
180 * bits in size so the sequence can be bitwise or'd with the TCi to build the
181 * IO Tag value.
182 */
183 u16 io_request_sequence[SCI_MAX_IO_REQUESTS];
184
185 /**
186 * This field in the array of sequence values for the RNi. These are used
187 * to control io request build to io request start operations. The sequence
188 * value is recorded into an io request when it is built and is checked on
189 * the io request start operation to make sure that there was not a device
190 * hot plug between the build and start operation.
191 */
192 u8 remote_device_sequence[SCI_MAX_REMOTE_DEVICES];
193
194 /**
195 * This field is a pointer to the memory allocated by the driver for the task
196 * context table. This data is shared between the hardware and software.
197 */
198 struct scu_task_context *task_context_table;
199
200 /**
201 * This field is a pointer to the memory allocated by the driver for the
202 * remote node context table. This table is shared between the hardware and
203 * software.
204 */
205 union scu_remote_node_context *remote_node_context_table;
206
207 /**
208 * This field is a pointer to the completion queue. This memory is
209 * written to by the hardware and read by the software.
210 */
211 u32 *completion_queue;
212
213 /**
214 * This field is the software copy of the completion queue get pointer. The
215 * controller object writes this value to the hardware after processing the
216 * completion entries.
217 */
218 u32 completion_queue_get;
219
220 /**
221 * This field is the minimum of the number of hardware supported port entries
222 * and the software requested port entries.
223 */
224 u32 logical_port_entries;
225
226 /**
227 * This field is the minimum number of hardware supported completion queue
228 * entries and the software requested completion queue entries.
229 */
230 u32 completion_queue_entries;
231
232 /**
233 * This field is the minimum number of hardware supported event entries and
234 * the software requested event entries.
235 */
236 u32 completion_event_entries;
237
238 /**
239 * This field is the minimum number of devices supported by the hardware and
240 * the number of devices requested by the software.
241 */
242 u32 remote_node_entries;
243
244 /**
245 * This field is the minimum number of IO requests supported by the hardware
246 * and the number of IO requests requested by the software.
247 */
248 u32 task_context_entries;
249
250 /**
251 * This object contains all of the unsolicited frame specific
252 * data utilized by the core controller.
253 */
254 struct scic_sds_unsolicited_frame_control uf_control;
255
256 /* Phy Startup Data */
257 /**
258 * This field is the driver timer handle for controller phy request startup.
259 * On controller start the controller will start each PHY individually in
260 * order of phy index.
261 */
262 void *phy_startup_timer;
263
264 /**
265 * This field is set when the phy_startup_timer is running and is cleared when
266 * the phy_startup_timer is stopped.
267 */
268 bool phy_startup_timer_pending;
269
270 /**
271 * This field is the index of the next phy start. It is initialized to 0 and
272 * increments for each phy index that is started.
273 */
274 u32 next_phy_to_start;
275
276 /**
277 * This field controlls the invalid link up notifications to the SCI_USER. If
278 * an invalid_link_up notification is reported a bit for the PHY index is set
279 * so further notifications are not made. Once the PHY object reports link up
280 * and is made part of a port then this bit for the PHY index is cleared.
281 */
282 u8 invalid_phy_mask;
283
284 /*
285 * This field saves the current interrupt coalescing number of the controller.
286 */
287 u16 interrupt_coalesce_number;
288
289 /*
290 * This field saves the current interrupt coalescing timeout value in microseconds.
291 */
292 u32 interrupt_coalesce_timeout;
293
294 /**
295 * This field is a pointer to the memory mapped register space for the
296 * struct smu_registers.
297 */
298 struct smu_registers __iomem *smu_registers;
299
300 /**
301 * This field is a pointer to the memory mapped register space for the
302 * struct scu_registers.
303 */
304 struct scu_registers __iomem *scu_registers;
305
306};
62 307
63struct isci_host { 308struct isci_host {
64 struct scic_sds_controller sci; 309 struct scic_sds_controller sci;
@@ -93,6 +338,96 @@ struct isci_host {
93}; 338};
94 339
95/** 340/**
341 * enum scic_sds_controller_states - This enumeration depicts all the states
342 * for the common controller state machine.
343 */
344enum scic_sds_controller_states {
345 /**
346 * Simply the initial state for the base controller state machine.
347 */
348 SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
349
350 /**
351 * This state indicates that the controller is reset. The memory for
352 * the controller is in it's initial state, but the controller requires
353 * initialization.
354 * This state is entered from the INITIAL state.
355 * This state is entered from the RESETTING state.
356 */
357 SCI_BASE_CONTROLLER_STATE_RESET,
358
359 /**
360 * This state is typically an action state that indicates the controller
361 * is in the process of initialization. In this state no new IO operations
362 * are permitted.
363 * This state is entered from the RESET state.
364 */
365 SCI_BASE_CONTROLLER_STATE_INITIALIZING,
366
367 /**
368 * This state indicates that the controller has been successfully
369 * initialized. In this state no new IO operations are permitted.
370 * This state is entered from the INITIALIZING state.
371 */
372 SCI_BASE_CONTROLLER_STATE_INITIALIZED,
373
374 /**
375 * This state indicates the the controller is in the process of becoming
376 * ready (i.e. starting). In this state no new IO operations are permitted.
377 * This state is entered from the INITIALIZED state.
378 */
379 SCI_BASE_CONTROLLER_STATE_STARTING,
380
381 /**
382 * This state indicates the controller is now ready. Thus, the user
383 * is able to perform IO operations on the controller.
384 * This state is entered from the STARTING state.
385 */
386 SCI_BASE_CONTROLLER_STATE_READY,
387
388 /**
389 * This state is typically an action state that indicates the controller
390 * is in the process of resetting. Thus, the user is unable to perform
391 * IO operations on the controller. A reset is considered destructive in
392 * most cases.
393 * This state is entered from the READY state.
394 * This state is entered from the FAILED state.
395 * This state is entered from the STOPPED state.
396 */
397 SCI_BASE_CONTROLLER_STATE_RESETTING,
398
399 /**
400 * This state indicates that the controller is in the process of stopping.
401 * In this state no new IO operations are permitted, but existing IO
402 * operations are allowed to complete.
403 * This state is entered from the READY state.
404 */
405 SCI_BASE_CONTROLLER_STATE_STOPPING,
406
407 /**
408 * This state indicates that the controller has successfully been stopped.
409 * In this state no new IO operations are permitted.
410 * This state is entered from the STOPPING state.
411 */
412 SCI_BASE_CONTROLLER_STATE_STOPPED,
413
414 /**
415 * This state indicates that the controller could not successfully be
416 * initialized. In this state no new IO operations are permitted.
417 * This state is entered from the INITIALIZING state.
418 * This state is entered from the STARTING state.
419 * This state is entered from the STOPPING state.
420 * This state is entered from the RESETTING state.
421 */
422 SCI_BASE_CONTROLLER_STATE_FAILED,
423
424 SCI_BASE_CONTROLLER_MAX_STATES
425
426};
427
428
429
430/**
96 * struct isci_pci_info - This class represents the pci function containing the 431 * struct isci_pci_info - This class represents the pci function containing the
97 * controllers. Depending on PCI SKU, there could be up to 2 controllers in 432 * controllers. Depending on PCI SKU, there could be up to 2 controllers in
98 * the PCI function. 433 * the PCI function.
@@ -115,17 +450,13 @@ static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev)
115 id < ARRAY_SIZE(to_pci_info(pdev)->hosts) && ihost; \ 450 id < ARRAY_SIZE(to_pci_info(pdev)->hosts) && ihost; \
116 ihost = to_pci_info(pdev)->hosts[++id]) 451 ihost = to_pci_info(pdev)->hosts[++id])
117 452
118static inline 453static inline enum isci_status isci_host_get_state(struct isci_host *isci_host)
119enum isci_status isci_host_get_state(
120 struct isci_host *isci_host)
121{ 454{
122 return isci_host->status; 455 return isci_host->status;
123} 456}
124 457
125 458static inline void isci_host_change_state(struct isci_host *isci_host,
126static inline void isci_host_change_state( 459 enum isci_status status)
127 struct isci_host *isci_host,
128 enum isci_status status)
129{ 460{
130 unsigned long flags; 461 unsigned long flags;
131 462
@@ -140,9 +471,7 @@ static inline void isci_host_change_state(
140 471
141} 472}
142 473
143static inline int isci_host_can_queue( 474static inline int isci_host_can_queue(struct isci_host *isci_host, int num)
144 struct isci_host *isci_host,
145 int num)
146{ 475{
147 int ret = 0; 476 int ret = 0;
148 unsigned long flags; 477 unsigned long flags;
@@ -163,9 +492,7 @@ static inline int isci_host_can_queue(
163 return ret; 492 return ret;
164} 493}
165 494
166static inline void isci_host_can_dequeue( 495static inline void isci_host_can_dequeue(struct isci_host *isci_host, int num)
167 struct isci_host *isci_host,
168 int num)
169{ 496{
170 unsigned long flags; 497 unsigned long flags;
171 498
@@ -208,39 +535,219 @@ static inline struct isci_host *scic_to_ihost(struct scic_sds_controller *scic)
208} 535}
209 536
210/** 537/**
211 * isci_host_scan_finished() - 538 * INCREMENT_QUEUE_GET() -
212 * 539 *
213 * This function is one of the SCSI Host Template functions. The SCSI midlayer 540 * This macro will increment the specified index to and if the index wraps to 0
214 * calls this function during a target scan, approx. once every 10 millisecs. 541 * it will toggel the cycle bit.
215 */ 542 */
216int isci_host_scan_finished( 543#define INCREMENT_QUEUE_GET(index, cycle, entry_count, bit_toggle) \
217 struct Scsi_Host *, 544 { \
218 unsigned long); 545 if ((index) + 1 == entry_count) { \
546 (index) = 0; \
547 (cycle) = (cycle) ^ (bit_toggle); \
548 } else { \
549 index = index + 1; \
550 } \
551 }
219 552
553/**
554 * scic_sds_controller_get_port_configuration_agent() -
555 *
556 * This is a helper macro to get the port configuration agent from the
557 * controller object.
558 */
559#define scic_sds_controller_get_port_configuration_agent(controller) \
560 (&(controller)->port_agent)
220 561
221/** 562/**
222 * isci_host_scan_start() - 563 * scic_sds_controller_get_protocol_engine_group() -
223 * 564 *
224 * This function is one of the SCSI Host Template function, called by the SCSI 565 * This macro returns the protocol engine group for this controller object.
225 * mid layer berfore a target scan begins. The core library controller start 566 * Presently we only support protocol engine group 0 so just return that
226 * routine is called from here.
227 */ 567 */
228void isci_host_scan_start( 568#define scic_sds_controller_get_protocol_engine_group(controller) 0
229 struct Scsi_Host *);
230 569
231/** 570/**
232 * isci_host_start_complete() - 571 * scic_sds_io_tag_construct() -
233 * 572 *
234 * This function is called by the core library, through the ISCI Module, to 573 * This macro constructs an IO tag from the sequence and index values.
235 * indicate controller start status.
236 */ 574 */
237void isci_host_start_complete( 575#define scic_sds_io_tag_construct(sequence, task_index) \
238 struct isci_host *, 576 ((sequence) << 12 | (task_index))
239 enum sci_status);
240 577
241void isci_host_stop_complete( 578/**
242 struct isci_host *isci_host, 579 * scic_sds_io_tag_get_sequence() -
243 enum sci_status completion_status); 580 *
581 * This macro returns the IO sequence from the IO tag value.
582 */
583#define scic_sds_io_tag_get_sequence(io_tag) \
584 (((io_tag) & 0xF000) >> 12)
585
586/**
587 * scic_sds_io_tag_get_index() -
588 *
589 * This macro returns the TCi from the io tag value
590 */
591#define scic_sds_io_tag_get_index(io_tag) \
592 ((io_tag) & 0x0FFF)
593
594/**
595 * scic_sds_io_sequence_increment() -
596 *
597 * This is a helper macro to increment the io sequence count. We may find in
598 * the future that it will be faster to store the sequence count in such a way
599 * as we dont perform the shift operation to build io tag values so therefore
600 * need a way to incrment them correctly
601 */
602#define scic_sds_io_sequence_increment(value) \
603 ((value) = (((value) + 1) & 0x000F))
604
605/* expander attached sata devices require 3 rnc slots */
606static inline int scic_sds_remote_device_node_count(struct scic_sds_remote_device *sci_dev)
607{
608 struct domain_device *dev = sci_dev_to_domain(sci_dev);
609
610 if ((dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) &&
611 !sci_dev->is_direct_attached)
612 return SCU_STP_REMOTE_NODE_COUNT;
613 return SCU_SSP_REMOTE_NODE_COUNT;
614}
615
616/**
617 * scic_sds_controller_set_invalid_phy() -
618 *
619 * This macro will set the bit in the invalid phy mask for this controller
620 * object. This is used to control messages reported for invalid link up
621 * notifications.
622 */
623#define scic_sds_controller_set_invalid_phy(controller, phy) \
624 ((controller)->invalid_phy_mask |= (1 << (phy)->phy_index))
625
626/**
627 * scic_sds_controller_clear_invalid_phy() -
628 *
629 * This macro will clear the bit in the invalid phy mask for this controller
630 * object. This is used to control messages reported for invalid link up
631 * notifications.
632 */
633#define scic_sds_controller_clear_invalid_phy(controller, phy) \
634 ((controller)->invalid_phy_mask &= ~(1 << (phy)->phy_index))
635
636static inline struct device *scic_to_dev(struct scic_sds_controller *scic)
637{
638 return &scic_to_ihost(scic)->pdev->dev;
639}
640
641static inline struct device *sciphy_to_dev(struct scic_sds_phy *sci_phy)
642{
643 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
644
645 if (!iphy || !iphy->isci_port || !iphy->isci_port->isci_host)
646 return NULL;
647
648 return &iphy->isci_port->isci_host->pdev->dev;
649}
650
651static inline struct device *sciport_to_dev(struct scic_sds_port *sci_port)
652{
653 struct isci_port *iport = sci_port_to_iport(sci_port);
654
655 if (!iport || !iport->isci_host)
656 return NULL;
657
658 return &iport->isci_host->pdev->dev;
659}
660
661static inline struct device *scirdev_to_dev(struct scic_sds_remote_device *sci_dev)
662{
663 struct isci_remote_device *idev =
664 container_of(sci_dev, typeof(*idev), sci);
665
666 if (!idev || !idev->isci_port || !idev->isci_port->isci_host)
667 return NULL;
668
669 return &idev->isci_port->isci_host->pdev->dev;
670}
671
672enum {
673 ISCI_SI_REVA0,
674 ISCI_SI_REVA2,
675 ISCI_SI_REVB0,
676};
677
678extern int isci_si_rev;
679
680static inline bool is_a0(void)
681{
682 return isci_si_rev == ISCI_SI_REVA0;
683}
684
685static inline bool is_a2(void)
686{
687 return isci_si_rev == ISCI_SI_REVA2;
688}
689
690static inline bool is_b0(void)
691{
692 return isci_si_rev > ISCI_SI_REVA2;
693}
694
695void scic_sds_controller_post_request(struct scic_sds_controller *scic,
696 u32 request);
697void scic_sds_controller_release_frame(struct scic_sds_controller *scic,
698 u32 frame_index);
699void scic_sds_controller_copy_sata_response(void *response_buffer,
700 void *frame_header,
701 void *frame_buffer);
702enum sci_status scic_sds_controller_allocate_remote_node_context(struct scic_sds_controller *scic,
703 struct scic_sds_remote_device *sci_dev,
704 u16 *node_id);
705void scic_sds_controller_free_remote_node_context(
706 struct scic_sds_controller *scic,
707 struct scic_sds_remote_device *sci_dev,
708 u16 node_id);
709union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
710 struct scic_sds_controller *scic,
711 u16 node_id);
712
713struct scic_sds_request *scic_request_by_tag(struct scic_sds_controller *scic,
714 u16 io_tag);
715
716struct scu_task_context *scic_sds_controller_get_task_context_buffer(
717 struct scic_sds_controller *scic,
718 u16 io_tag);
719
720void scic_sds_controller_power_control_queue_insert(
721 struct scic_sds_controller *scic,
722 struct scic_sds_phy *sci_phy);
723
724void scic_sds_controller_power_control_queue_remove(
725 struct scic_sds_controller *scic,
726 struct scic_sds_phy *sci_phy);
727
728void scic_sds_controller_link_up(
729 struct scic_sds_controller *scic,
730 struct scic_sds_port *sci_port,
731 struct scic_sds_phy *sci_phy);
732
733void scic_sds_controller_link_down(
734 struct scic_sds_controller *scic,
735 struct scic_sds_port *sci_port,
736 struct scic_sds_phy *sci_phy);
737
738void scic_sds_controller_remote_device_stopped(
739 struct scic_sds_controller *scic,
740 struct scic_sds_remote_device *sci_dev);
741
742void scic_sds_controller_copy_task_context(
743 struct scic_sds_controller *scic,
744 struct scic_sds_request *this_request);
745
746void scic_sds_controller_register_setup(struct scic_sds_controller *scic);
747
748enum sci_status scic_controller_continue_io(struct scic_sds_request *sci_req);
749int isci_host_scan_finished(struct Scsi_Host *, unsigned long);
750void isci_host_scan_start(struct Scsi_Host *);
244 751
245int isci_host_init(struct isci_host *); 752int isci_host_init(struct isci_host *);
246 753
@@ -262,4 +769,35 @@ void isci_host_remote_device_start_complete(
262 struct isci_remote_device *, 769 struct isci_remote_device *,
263 enum sci_status); 770 enum sci_status);
264 771
265#endif /* !defined(_SCI_HOST_H_) */ 772void scic_controller_disable_interrupts(
773 struct scic_sds_controller *scic);
774
775enum sci_status scic_controller_start_io(
776 struct scic_sds_controller *scic,
777 struct scic_sds_remote_device *remote_device,
778 struct scic_sds_request *io_request,
779 u16 io_tag);
780
781enum sci_task_status scic_controller_start_task(
782 struct scic_sds_controller *scic,
783 struct scic_sds_remote_device *remote_device,
784 struct scic_sds_request *task_request,
785 u16 io_tag);
786
787enum sci_status scic_controller_terminate_request(
788 struct scic_sds_controller *scic,
789 struct scic_sds_remote_device *remote_device,
790 struct scic_sds_request *request);
791
792enum sci_status scic_controller_complete_io(
793 struct scic_sds_controller *scic,
794 struct scic_sds_remote_device *remote_device,
795 struct scic_sds_request *io_request);
796
797u16 scic_controller_allocate_io_tag(
798 struct scic_sds_controller *scic);
799
800enum sci_status scic_controller_free_io_tag(
801 struct scic_sds_controller *scic,
802 u16 io_tag);
803#endif
diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c
index df132c07badf..bda701655b25 100644
--- a/drivers/scsi/isci/init.c
+++ b/drivers/scsi/isci/init.c
@@ -61,9 +61,7 @@
61#include <asm/string.h> 61#include <asm/string.h>
62#include "isci.h" 62#include "isci.h"
63#include "task.h" 63#include "task.h"
64#include "sci_environment.h"
65#include "probe_roms.h" 64#include "probe_roms.h"
66#include "scic_controller.h"
67 65
68static struct scsi_transport_template *isci_transport_template; 66static struct scsi_transport_template *isci_transport_template;
69 67
diff --git a/drivers/scsi/isci/isci.h b/drivers/scsi/isci/isci.h
index 800f2332ecd0..d288897b85fb 100644
--- a/drivers/scsi/isci/isci.h
+++ b/drivers/scsi/isci/isci.h
@@ -532,10 +532,4 @@ extern unsigned char max_concurr_spinup;
532irqreturn_t isci_msix_isr(int vec, void *data); 532irqreturn_t isci_msix_isr(int vec, void *data);
533irqreturn_t isci_intx_isr(int vec, void *data); 533irqreturn_t isci_intx_isr(int vec, void *data);
534irqreturn_t isci_error_isr(int vec, void *data); 534irqreturn_t isci_error_isr(int vec, void *data);
535
536struct scic_sds_controller;
537bool scic_sds_controller_isr(struct scic_sds_controller *scic);
538void scic_sds_controller_completion_handler(struct scic_sds_controller *scic);
539bool scic_sds_controller_error_isr(struct scic_sds_controller *scic);
540void scic_sds_controller_error_handler(struct scic_sds_controller *scic);
541#endif /* __ISCI_H__ */ 535#endif /* __ISCI_H__ */
diff --git a/drivers/scsi/isci/core/sci_pool.h b/drivers/scsi/isci/pool.h
index 016ec832f74f..016ec832f74f 100644
--- a/drivers/scsi/isci/core/sci_pool.h
+++ b/drivers/scsi/isci/pool.h
diff --git a/drivers/scsi/isci/port.c b/drivers/scsi/isci/port.c
index 35e2e517f671..f44fa20cad96 100644
--- a/drivers/scsi/isci/port.c
+++ b/drivers/scsi/isci/port.c
@@ -53,13 +53,6 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56/**
57 * This file contains the isci port implementation.
58 *
59 *
60 */
61
62
63#include <linux/workqueue.h> 56#include <linux/workqueue.h>
64#include "isci.h" 57#include "isci.h"
65#include "scic_io_request.h" 58#include "scic_io_request.h"
@@ -68,7 +61,6 @@
68#include "scic_port.h" 61#include "scic_port.h"
69#include "port.h" 62#include "port.h"
70#include "request.h" 63#include "request.h"
71#include "core/scic_sds_controller.h"
72 64
73static void isci_port_change_state(struct isci_port *iport, enum isci_status status) 65static void isci_port_change_state(struct isci_port *iport, enum isci_status status)
74{ 66{
diff --git a/drivers/scsi/isci/probe_roms.c b/drivers/scsi/isci/probe_roms.c
index 705517440441..9bc173fa49e1 100644
--- a/drivers/scsi/isci/probe_roms.c
+++ b/drivers/scsi/isci/probe_roms.c
@@ -32,7 +32,6 @@
32 32
33#include "isci.h" 33#include "isci.h"
34#include "task.h" 34#include "task.h"
35#include "sci_environment.h"
36#include "probe_roms.h" 35#include "probe_roms.h"
37 36
38struct efi_variable { 37struct efi_variable {
diff --git a/drivers/scsi/isci/remote_device.c b/drivers/scsi/isci/remote_device.c
index 8b1ef19a6732..00334b9ccd80 100644
--- a/drivers/scsi/isci/remote_device.c
+++ b/drivers/scsi/isci/remote_device.c
@@ -57,16 +57,13 @@
57#include "port.h" 57#include "port.h"
58#include "remote_device.h" 58#include "remote_device.h"
59#include "request.h" 59#include "request.h"
60#include "scic_controller.h"
61#include "scic_io_request.h" 60#include "scic_io_request.h"
62#include "scic_phy.h" 61#include "scic_phy.h"
63#include "scic_port.h" 62#include "scic_port.h"
64#include "scic_sds_controller.h"
65#include "scic_sds_phy.h" 63#include "scic_sds_phy.h"
66#include "scic_sds_port.h" 64#include "scic_sds_port.h"
67#include "remote_node_context.h" 65#include "remote_node_context.h"
68#include "scic_sds_request.h" 66#include "scic_sds_request.h"
69#include "sci_environment.h"
70#include "sci_util.h" 67#include "sci_util.h"
71#include "scu_event_codes.h" 68#include "scu_event_codes.h"
72#include "task.h" 69#include "task.h"
diff --git a/drivers/scsi/isci/remote_node_context.c b/drivers/scsi/isci/remote_node_context.c
index 5e85a18a06de..af4759383db4 100644
--- a/drivers/scsi/isci/remote_node_context.c
+++ b/drivers/scsi/isci/remote_node_context.c
@@ -53,12 +53,11 @@
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */ 54 */
55 55
56#include "host.h"
56#include "sci_base_state_machine.h" 57#include "sci_base_state_machine.h"
57#include "scic_sds_controller.h"
58#include "scic_sds_port.h" 58#include "scic_sds_port.h"
59#include "remote_device.h" 59#include "remote_device.h"
60#include "remote_node_context.h" 60#include "remote_node_context.h"
61#include "sci_environment.h"
62#include "sci_util.h" 61#include "sci_util.h"
63#include "scu_event_codes.h" 62#include "scu_event_codes.h"
64#include "scu_task_context.h" 63#include "scu_task_context.h"
diff --git a/drivers/scsi/isci/remote_node_table.c b/drivers/scsi/isci/remote_node_table.c
index 8886146d9db2..80f44c25f45f 100644
--- a/drivers/scsi/isci/remote_node_table.c
+++ b/drivers/scsi/isci/remote_node_table.c
@@ -60,7 +60,6 @@
60 * 60 *
61 */ 61 */
62#include "sci_util.h" 62#include "sci_util.h"
63#include "sci_environment.h"
64#include "remote_node_table.h" 63#include "remote_node_table.h"
65#include "remote_node_context.h" 64#include "remote_node_context.h"
66 65
diff --git a/drivers/scsi/isci/request.c b/drivers/scsi/isci/request.c
index a58072807a37..4961ee347091 100644
--- a/drivers/scsi/isci/request.c
+++ b/drivers/scsi/isci/request.c
@@ -62,7 +62,6 @@
62#include "sata.h" 62#include "sata.h"
63#include "scu_completion_codes.h" 63#include "scu_completion_codes.h"
64#include "scic_sds_request.h" 64#include "scic_sds_request.h"
65#include "scic_controller.h"
66#include "sas.h" 65#include "sas.h"
67 66
68static enum sci_status isci_request_ssp_request_construct( 67static enum sci_status isci_request_ssp_request_construct(
diff --git a/drivers/scsi/isci/sci_environment.h b/drivers/scsi/isci/sci_environment.h
deleted file mode 100644
index 30addba4d43a..000000000000
--- a/drivers/scsi/isci/sci_environment.h
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#ifndef _SCI_ENVIRONMENT_H_
57#define _SCI_ENVIRONMENT_H_
58
59#include "host.h"
60
61
62static inline struct device *scic_to_dev(struct scic_sds_controller *scic)
63{
64 return &scic_to_ihost(scic)->pdev->dev;
65}
66
67static inline struct device *sciphy_to_dev(struct scic_sds_phy *sci_phy)
68{
69 struct isci_phy *iphy = sci_phy_to_iphy(sci_phy);
70
71 if (!iphy || !iphy->isci_port || !iphy->isci_port->isci_host)
72 return NULL;
73
74 return &iphy->isci_port->isci_host->pdev->dev;
75}
76
77static inline struct device *sciport_to_dev(struct scic_sds_port *sci_port)
78{
79 struct isci_port *iport = sci_port_to_iport(sci_port);
80
81 if (!iport || !iport->isci_host)
82 return NULL;
83
84 return &iport->isci_host->pdev->dev;
85}
86
87static inline struct device *scirdev_to_dev(
88 struct scic_sds_remote_device *sci_dev)
89{
90 struct isci_remote_device *idev =
91 container_of(sci_dev, typeof(*idev), sci);
92
93 if (!idev || !idev->isci_port || !idev->isci_port->isci_host)
94 return NULL;
95
96 return &idev->isci_port->isci_host->pdev->dev;
97}
98
99enum {
100 ISCI_SI_REVA0,
101 ISCI_SI_REVA2,
102 ISCI_SI_REVB0,
103};
104
105extern int isci_si_rev;
106
107static inline bool is_a0(void)
108{
109 return isci_si_rev == ISCI_SI_REVA0;
110}
111
112static inline bool is_a2(void)
113{
114 return isci_si_rev == ISCI_SI_REVA2;
115}
116
117static inline bool is_b0(void)
118{
119 return isci_si_rev > ISCI_SI_REVA2;
120}
121
122#endif
diff --git a/drivers/scsi/isci/task.c b/drivers/scsi/isci/task.c
index 597c49020ac8..2a8603881929 100644
--- a/drivers/scsi/isci/task.c
+++ b/drivers/scsi/isci/task.c
@@ -65,7 +65,6 @@
65#include "sata.h" 65#include "sata.h"
66#include "task.h" 66#include "task.h"
67#include "scic_sds_request.h" 67#include "scic_sds_request.h"
68#include "scic_controller.h"
69#include "timers.h" 68#include "timers.h"
70 69
71/** 70/**
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 23:20:27 -0500