diff options
-rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 22 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dts | 30 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_vt.dts | 60 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/socfpga.c | 1 |
4 files changed, 98 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 19aec421bb26..936d2306e7e1 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi | |||
@@ -25,6 +25,10 @@ | |||
25 | ethernet0 = &gmac0; | 25 | ethernet0 = &gmac0; |
26 | serial0 = &uart0; | 26 | serial0 = &uart0; |
27 | serial1 = &uart1; | 27 | serial1 = &uart1; |
28 | timer0 = &timer0; | ||
29 | timer1 = &timer1; | ||
30 | timer2 = &timer2; | ||
31 | timer3 = &timer3; | ||
28 | }; | 32 | }; |
29 | 33 | ||
30 | cpus { | 34 | cpus { |
@@ -98,47 +102,41 @@ | |||
98 | interrupts = <1 13 0xf04>; | 102 | interrupts = <1 13 0xf04>; |
99 | }; | 103 | }; |
100 | 104 | ||
101 | timer0: timer@ffc08000 { | 105 | timer0: timer0@ffc08000 { |
102 | compatible = "snps,dw-apb-timer-sp"; | 106 | compatible = "snps,dw-apb-timer-sp"; |
103 | interrupts = <0 167 4>; | 107 | interrupts = <0 167 4>; |
104 | clock-frequency = <200000000>; | ||
105 | reg = <0xffc08000 0x1000>; | 108 | reg = <0xffc08000 0x1000>; |
106 | }; | 109 | }; |
107 | 110 | ||
108 | timer1: timer@ffc09000 { | 111 | timer1: timer1@ffc09000 { |
109 | compatible = "snps,dw-apb-timer-sp"; | 112 | compatible = "snps,dw-apb-timer-sp"; |
110 | interrupts = <0 168 4>; | 113 | interrupts = <0 168 4>; |
111 | clock-frequency = <200000000>; | ||
112 | reg = <0xffc09000 0x1000>; | 114 | reg = <0xffc09000 0x1000>; |
113 | }; | 115 | }; |
114 | 116 | ||
115 | timer2: timer@ffd00000 { | 117 | timer2: timer2@ffd00000 { |
116 | compatible = "snps,dw-apb-timer-osc"; | 118 | compatible = "snps,dw-apb-timer-osc"; |
117 | interrupts = <0 169 4>; | 119 | interrupts = <0 169 4>; |
118 | clock-frequency = <200000000>; | ||
119 | reg = <0xffd00000 0x1000>; | 120 | reg = <0xffd00000 0x1000>; |
120 | }; | 121 | }; |
121 | 122 | ||
122 | timer3: timer@ffd01000 { | 123 | timer3: timer3@ffd01000 { |
123 | compatible = "snps,dw-apb-timer-osc"; | 124 | compatible = "snps,dw-apb-timer-osc"; |
124 | interrupts = <0 170 4>; | 125 | interrupts = <0 170 4>; |
125 | clock-frequency = <200000000>; | ||
126 | reg = <0xffd01000 0x1000>; | 126 | reg = <0xffd01000 0x1000>; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | uart0: uart@ffc02000 { | 129 | uart0: serial0@ffc02000 { |
130 | compatible = "snps,dw-apb-uart"; | 130 | compatible = "snps,dw-apb-uart"; |
131 | reg = <0xffc02000 0x1000>; | 131 | reg = <0xffc02000 0x1000>; |
132 | clock-frequency = <7372800>; | ||
133 | interrupts = <0 162 4>; | 132 | interrupts = <0 162 4>; |
134 | reg-shift = <2>; | 133 | reg-shift = <2>; |
135 | reg-io-width = <4>; | 134 | reg-io-width = <4>; |
136 | }; | 135 | }; |
137 | 136 | ||
138 | uart1: uart@ffc03000 { | 137 | uart1: serial1@ffc03000 { |
139 | compatible = "snps,dw-apb-uart"; | 138 | compatible = "snps,dw-apb-uart"; |
140 | reg = <0xffc03000 0x1000>; | 139 | reg = <0xffc03000 0x1000>; |
141 | clock-frequency = <7372800>; | ||
142 | interrupts = <0 163 4>; | 140 | interrupts = <0 163 4>; |
143 | reg-shift = <2>; | 141 | reg-shift = <2>; |
144 | reg-io-width = <4>; | 142 | reg-io-width = <4>; |
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts index ab7e4a94299f..7ad3cc69df5a 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts | |||
@@ -20,7 +20,7 @@ | |||
20 | 20 | ||
21 | / { | 21 | / { |
22 | model = "Altera SOCFPGA Cyclone V"; | 22 | model = "Altera SOCFPGA Cyclone V"; |
23 | compatible = "altr,socfpga-cyclone5"; | 23 | compatible = "altr,socfpga-cyclone5", "altr,socfpga"; |
24 | 24 | ||
25 | chosen { | 25 | chosen { |
26 | bootargs = "console=ttyS0,57600"; | 26 | bootargs = "console=ttyS0,57600"; |
@@ -29,6 +29,32 @@ | |||
29 | memory { | 29 | memory { |
30 | name = "memory"; | 30 | name = "memory"; |
31 | device_type = "memory"; | 31 | device_type = "memory"; |
32 | reg = <0x0 0x10000000>; /* 256MB */ | 32 | reg = <0x0 0x40000000>; /* 1GB */ |
33 | }; | ||
34 | |||
35 | soc { | ||
36 | timer0@ffc08000 { | ||
37 | clock-frequency = <100000000>; | ||
38 | }; | ||
39 | |||
40 | timer1@ffc09000 { | ||
41 | clock-frequency = <100000000>; | ||
42 | }; | ||
43 | |||
44 | timer2@ffd00000 { | ||
45 | clock-frequency = <25000000>; | ||
46 | }; | ||
47 | |||
48 | timer3@ffd01000 { | ||
49 | clock-frequency = <25000000>; | ||
50 | }; | ||
51 | |||
52 | serial0@ffc02000 { | ||
53 | clock-frequency = <100000000>; | ||
54 | }; | ||
55 | |||
56 | serial1@ffc03000 { | ||
57 | clock-frequency = <100000000>; | ||
58 | }; | ||
33 | }; | 59 | }; |
34 | }; | 60 | }; |
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts new file mode 100644 index 000000000000..a0c6c651850f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_vt.dts | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Altera Corporation <www.altera.com> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | |||
18 | /dts-v1/; | ||
19 | /include/ "socfpga.dtsi" | ||
20 | |||
21 | / { | ||
22 | model = "Altera SOCFPGA VT"; | ||
23 | compatible = "altr,socfpga-vt", "altr,socfpga"; | ||
24 | |||
25 | chosen { | ||
26 | bootargs = "console=ttyS0,57600"; | ||
27 | }; | ||
28 | |||
29 | memory { | ||
30 | name = "memory"; | ||
31 | device_type = "memory"; | ||
32 | reg = <0x0 0x40000000>; /* 1 GB */ | ||
33 | }; | ||
34 | |||
35 | soc { | ||
36 | timer0@ffc08000 { | ||
37 | clock-frequency = <7000000>; | ||
38 | }; | ||
39 | |||
40 | timer1@ffc09000 { | ||
41 | clock-frequency = <7000000>; | ||
42 | }; | ||
43 | |||
44 | timer2@ffd00000 { | ||
45 | clock-frequency = <7000000>; | ||
46 | }; | ||
47 | |||
48 | timer3@ffd01000 { | ||
49 | clock-frequency = <7000000>; | ||
50 | }; | ||
51 | |||
52 | serial0@ffc02000 { | ||
53 | clock-frequency = <7372800>; | ||
54 | }; | ||
55 | |||
56 | serial1@ffc03000 { | ||
57 | clock-frequency = <7372800>; | ||
58 | }; | ||
59 | }; | ||
60 | }; | ||
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 6732924a5fee..94aa6add6443 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c | |||
@@ -98,7 +98,6 @@ static void __init socfpga_cyclone5_init(void) | |||
98 | 98 | ||
99 | static const char *altera_dt_match[] = { | 99 | static const char *altera_dt_match[] = { |
100 | "altr,socfpga", | 100 | "altr,socfpga", |
101 | "altr,socfpga-cyclone5", | ||
102 | NULL | 101 | NULL |
103 | }; | 102 | }; |
104 | 103 | ||