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-rw-r--r--drivers/mfd/Kconfig6
-rw-r--r--drivers/mfd/max14577.c217
-rw-r--r--include/linux/mfd/max14577-private.h145
-rw-r--r--include/linux/mfd/max14577.h7
4 files changed, 330 insertions, 45 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 33834120d057..5bdefe72625e 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -331,15 +331,15 @@ config MFD_88PM860X
331 battery-charger under the corresponding menus. 331 battery-charger under the corresponding menus.
332 332
333config MFD_MAX14577 333config MFD_MAX14577
334 bool "Maxim Semiconductor MAX14577 MUIC + Charger Support" 334 bool "Maxim Semiconductor MAX14577/77836 MUIC + Charger Support"
335 depends on I2C=y 335 depends on I2C=y
336 select MFD_CORE 336 select MFD_CORE
337 select REGMAP_I2C 337 select REGMAP_I2C
338 select REGMAP_IRQ 338 select REGMAP_IRQ
339 select IRQ_DOMAIN 339 select IRQ_DOMAIN
340 help 340 help
341 Say yes here to add support for Maxim Semiconductor MAX14577. 341 Say yes here to add support for Maxim Semiconductor MAX14577 and
342 This is a Micro-USB IC with Charger controls on chip. 342 MAX77836 Micro-USB ICs with battery charger.
343 This driver provides common support for accessing the device; 343 This driver provides common support for accessing the device;
344 additional drivers must be enabled in order to use the functionality 344 additional drivers must be enabled in order to use the functionality
345 of the device. 345 of the device.
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index 6f39dec9dfdf..20e3b2d81bf0 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * max14577.c - mfd core driver for the Maxim 14577 2 * max14577.c - mfd core driver for the Maxim 14577/77836
3 * 3 *
4 * Copyright (C) 2013 Samsung Electrnoics 4 * Copyright (C) 2014 Samsung Electrnoics
5 * Chanwoo Choi <cw00.choi@samsung.com> 5 * Chanwoo Choi <cw00.choi@samsung.com>
6 * Krzysztof Kozlowski <k.kozlowski@samsung.com> 6 * Krzysztof Kozlowski <k.kozlowski@samsung.com>
7 * 7 *
@@ -38,11 +38,34 @@ static struct mfd_cell max14577_devs[] = {
38 { .name = "max14577-charger", }, 38 { .name = "max14577-charger", },
39}; 39};
40 40
41static struct mfd_cell max77836_devs[] = {
42 {
43 .name = "max77836-muic",
44 .of_compatible = "maxim,max77836-muic",
45 },
46 {
47 .name = "max77836-regulator",
48 .of_compatible = "maxim,max77836-regulator",
49 },
50 {
51 .name = "max77836-charger",
52 .of_compatible = "maxim,max77836-charger",
53 },
54 {
55 .name = "max77836-battery",
56 .of_compatible = "maxim,max77836-battery",
57 },
58};
59
41static struct of_device_id max14577_dt_match[] = { 60static struct of_device_id max14577_dt_match[] = {
42 { 61 {
43 .compatible = "maxim,max14577", 62 .compatible = "maxim,max14577",
44 .data = (void *)MAXIM_DEVICE_TYPE_MAX14577, 63 .data = (void *)MAXIM_DEVICE_TYPE_MAX14577,
45 }, 64 },
65 {
66 .compatible = "maxim,max77836",
67 .data = (void *)MAXIM_DEVICE_TYPE_MAX77836,
68 },
46 {}, 69 {},
47}; 70};
48 71
@@ -57,6 +80,26 @@ static bool max14577_muic_volatile_reg(struct device *dev, unsigned int reg)
57 return false; 80 return false;
58} 81}
59 82
83static bool max77836_muic_volatile_reg(struct device *dev, unsigned int reg)
84{
85 /* Any max14577 volatile registers are also max77836 volatile. */
86 if (max14577_muic_volatile_reg(dev, reg))
87 return true;
88
89 switch (reg) {
90 case MAX77836_FG_REG_VCELL_MSB ... MAX77836_FG_REG_SOC_LSB:
91 case MAX77836_FG_REG_CRATE_MSB ... MAX77836_FG_REG_CRATE_LSB:
92 case MAX77836_FG_REG_STATUS_H ... MAX77836_FG_REG_STATUS_L:
93 case MAX77836_PMIC_REG_INTSRC:
94 case MAX77836_PMIC_REG_TOPSYS_INT:
95 case MAX77836_PMIC_REG_TOPSYS_STAT:
96 return true;
97 default:
98 break;
99 }
100 return false;
101}
102
60static const struct regmap_config max14577_muic_regmap_config = { 103static const struct regmap_config max14577_muic_regmap_config = {
61 .reg_bits = 8, 104 .reg_bits = 8,
62 .val_bits = 8, 105 .val_bits = 8,
@@ -64,6 +107,13 @@ static const struct regmap_config max14577_muic_regmap_config = {
64 .max_register = MAX14577_REG_END, 107 .max_register = MAX14577_REG_END,
65}; 108};
66 109
110static const struct regmap_config max77836_pmic_regmap_config = {
111 .reg_bits = 8,
112 .val_bits = 8,
113 .volatile_reg = max77836_muic_volatile_reg,
114 .max_register = MAX77836_PMIC_REG_END,
115};
116
67static const struct regmap_irq max14577_irqs[] = { 117static const struct regmap_irq max14577_irqs[] = {
68 /* INT1 interrupts */ 118 /* INT1 interrupts */
69 { .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, }, 119 { .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, },
@@ -86,12 +136,56 @@ static const struct regmap_irq_chip max14577_irq_chip = {
86 .name = "max14577", 136 .name = "max14577",
87 .status_base = MAX14577_REG_INT1, 137 .status_base = MAX14577_REG_INT1,
88 .mask_base = MAX14577_REG_INTMASK1, 138 .mask_base = MAX14577_REG_INTMASK1,
89 .mask_invert = 1, 139 .mask_invert = true,
90 .num_regs = 3, 140 .num_regs = 3,
91 .irqs = max14577_irqs, 141 .irqs = max14577_irqs,
92 .num_irqs = ARRAY_SIZE(max14577_irqs), 142 .num_irqs = ARRAY_SIZE(max14577_irqs),
93}; 143};
94 144
145static const struct regmap_irq max77836_muic_irqs[] = {
146 /* INT1 interrupts */
147 { .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, },
148 { .reg_offset = 0, .mask = MAX14577_INT1_ADCLOW_MASK, },
149 { .reg_offset = 0, .mask = MAX14577_INT1_ADCERR_MASK, },
150 /* INT2 interrupts */
151 { .reg_offset = 1, .mask = MAX14577_INT2_CHGTYP_MASK, },
152 { .reg_offset = 1, .mask = MAX14577_INT2_CHGDETRUN_MASK, },
153 { .reg_offset = 1, .mask = MAX14577_INT2_DCDTMR_MASK, },
154 { .reg_offset = 1, .mask = MAX14577_INT2_DBCHG_MASK, },
155 { .reg_offset = 1, .mask = MAX14577_INT2_VBVOLT_MASK, },
156 { .reg_offset = 1, .mask = MAX77836_INT2_VIDRM_MASK, },
157 /* INT3 interrupts */
158 { .reg_offset = 2, .mask = MAX14577_INT3_EOC_MASK, },
159 { .reg_offset = 2, .mask = MAX14577_INT3_CGMBC_MASK, },
160 { .reg_offset = 2, .mask = MAX14577_INT3_OVP_MASK, },
161 { .reg_offset = 2, .mask = MAX14577_INT3_MBCCHGERR_MASK, },
162};
163
164static const struct regmap_irq_chip max77836_muic_irq_chip = {
165 .name = "max77836-muic",
166 .status_base = MAX14577_REG_INT1,
167 .mask_base = MAX14577_REG_INTMASK1,
168 .mask_invert = true,
169 .num_regs = 3,
170 .irqs = max77836_muic_irqs,
171 .num_irqs = ARRAY_SIZE(max77836_muic_irqs),
172};
173
174static const struct regmap_irq max77836_pmic_irqs[] = {
175 { .reg_offset = 0, .mask = MAX77836_TOPSYS_INT_T120C_MASK, },
176 { .reg_offset = 0, .mask = MAX77836_TOPSYS_INT_T140C_MASK, },
177};
178
179static const struct regmap_irq_chip max77836_pmic_irq_chip = {
180 .name = "max77836-pmic",
181 .status_base = MAX77836_PMIC_REG_TOPSYS_INT,
182 .mask_base = MAX77836_PMIC_REG_TOPSYS_INT_MASK,
183 .mask_invert = false,
184 .num_regs = 1,
185 .irqs = max77836_pmic_irqs,
186 .num_irqs = ARRAY_SIZE(max77836_pmic_irqs),
187};
188
95static void max14577_print_dev_type(struct max14577 *max14577) 189static void max14577_print_dev_type(struct max14577 *max14577)
96{ 190{
97 u8 reg_data, vendor_id, device_id; 191 u8 reg_data, vendor_id, device_id;
@@ -114,6 +208,81 @@ static void max14577_print_dev_type(struct max14577 *max14577)
114 max14577->dev_type, device_id, vendor_id); 208 max14577->dev_type, device_id, vendor_id);
115} 209}
116 210
211/*
212 * Max77836 specific initialization code for driver probe.
213 * Adds new I2C dummy device, regmap and regmap IRQ chip.
214 * Unmasks Interrupt Source register.
215 *
216 * On success returns 0.
217 * On failure returns errno and reverts any changes done so far (e.g. remove
218 * I2C dummy device), except masking the INT SRC register.
219 */
220static int max77836_init(struct max14577 *max14577)
221{
222 int ret;
223 u8 intsrc_mask;
224
225 max14577->i2c_pmic = i2c_new_dummy(max14577->i2c->adapter,
226 I2C_ADDR_PMIC);
227 if (!max14577->i2c_pmic) {
228 dev_err(max14577->dev, "Failed to register PMIC I2C device\n");
229 return -ENODEV;
230 }
231 i2c_set_clientdata(max14577->i2c_pmic, max14577);
232
233 max14577->regmap_pmic = devm_regmap_init_i2c(max14577->i2c_pmic,
234 &max77836_pmic_regmap_config);
235 if (IS_ERR(max14577->regmap_pmic)) {
236 ret = PTR_ERR(max14577->regmap_pmic);
237 dev_err(max14577->dev, "Failed to allocate PMIC register map: %d\n",
238 ret);
239 goto err;
240 }
241
242 /* Un-mask MAX77836 Interrupt Source register */
243 ret = max14577_read_reg(max14577->regmap_pmic,
244 MAX77836_PMIC_REG_INTSRC_MASK, &intsrc_mask);
245 if (ret < 0) {
246 dev_err(max14577->dev, "Failed to read PMIC register\n");
247 goto err;
248 }
249
250 intsrc_mask &= ~(MAX77836_INTSRC_MASK_TOP_INT_MASK);
251 intsrc_mask &= ~(MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK);
252 ret = max14577_write_reg(max14577->regmap_pmic,
253 MAX77836_PMIC_REG_INTSRC_MASK, intsrc_mask);
254 if (ret < 0) {
255 dev_err(max14577->dev, "Failed to write PMIC register\n");
256 goto err;
257 }
258
259 ret = regmap_add_irq_chip(max14577->regmap_pmic, max14577->irq,
260 IRQF_TRIGGER_FALLING | IRQF_ONESHOT | IRQF_SHARED,
261 0, &max77836_pmic_irq_chip,
262 &max14577->irq_data_pmic);
263 if (ret != 0) {
264 dev_err(max14577->dev, "Failed to request PMIC IRQ %d: %d\n",
265 max14577->irq, ret);
266 goto err;
267 }
268
269 return 0;
270
271err:
272 i2c_unregister_device(max14577->i2c_pmic);
273
274 return ret;
275}
276
277/*
278 * Max77836 specific de-initialization code for driver remove.
279 */
280static void max77836_remove(struct max14577 *max14577)
281{
282 regmap_del_irq_chip(max14577->irq, max14577->irq_data_pmic);
283 i2c_unregister_device(max14577->i2c_pmic);
284}
285
117static int max14577_i2c_probe(struct i2c_client *i2c, 286static int max14577_i2c_probe(struct i2c_client *i2c,
118 const struct i2c_device_id *id) 287 const struct i2c_device_id *id)
119{ 288{
@@ -121,6 +290,10 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
121 struct max14577_platform_data *pdata = dev_get_platdata(&i2c->dev); 290 struct max14577_platform_data *pdata = dev_get_platdata(&i2c->dev);
122 struct device_node *np = i2c->dev.of_node; 291 struct device_node *np = i2c->dev.of_node;
123 int ret = 0; 292 int ret = 0;
293 const struct regmap_irq_chip *irq_chip;
294 struct mfd_cell *mfd_devs;
295 unsigned int mfd_devs_size;
296 int irq_flags;
124 297
125 if (np) { 298 if (np) {
126 pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL); 299 pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
@@ -164,9 +337,24 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
164 337
165 max14577_print_dev_type(max14577); 338 max14577_print_dev_type(max14577);
166 339
340 switch (max14577->dev_type) {
341 case MAXIM_DEVICE_TYPE_MAX77836:
342 irq_chip = &max77836_muic_irq_chip;
343 mfd_devs = max77836_devs;
344 mfd_devs_size = ARRAY_SIZE(max77836_devs);
345 irq_flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT | IRQF_SHARED;
346 break;
347 case MAXIM_DEVICE_TYPE_MAX14577:
348 default:
349 irq_chip = &max14577_irq_chip;
350 mfd_devs = max14577_devs;
351 mfd_devs_size = ARRAY_SIZE(max14577_devs);
352 irq_flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
353 break;
354 }
355
167 ret = regmap_add_irq_chip(max14577->regmap, max14577->irq, 356 ret = regmap_add_irq_chip(max14577->regmap, max14577->irq,
168 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, 357 irq_flags, 0, irq_chip,
169 &max14577_irq_chip,
170 &max14577->irq_data); 358 &max14577->irq_data);
171 if (ret != 0) { 359 if (ret != 0) {
172 dev_err(&i2c->dev, "Failed to request IRQ %d: %d\n", 360 dev_err(&i2c->dev, "Failed to request IRQ %d: %d\n",
@@ -174,8 +362,15 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
174 return ret; 362 return ret;
175 } 363 }
176 364
177 ret = mfd_add_devices(max14577->dev, -1, max14577_devs, 365 /* Max77836 specific initialization code (additional regmap) */
178 ARRAY_SIZE(max14577_devs), NULL, 0, 366 if (max14577->dev_type == MAXIM_DEVICE_TYPE_MAX77836) {
367 ret = max77836_init(max14577);
368 if (ret < 0)
369 goto err_max77836;
370 }
371
372 ret = mfd_add_devices(max14577->dev, -1, mfd_devs,
373 mfd_devs_size, NULL, 0,
179 regmap_irq_get_domain(max14577->irq_data)); 374 regmap_irq_get_domain(max14577->irq_data));
180 if (ret < 0) 375 if (ret < 0)
181 goto err_mfd; 376 goto err_mfd;
@@ -185,6 +380,9 @@ static int max14577_i2c_probe(struct i2c_client *i2c,
185 return 0; 380 return 0;
186 381
187err_mfd: 382err_mfd:
383 if (max14577->dev_type == MAXIM_DEVICE_TYPE_MAX77836)
384 max77836_remove(max14577);
385err_max77836:
188 regmap_del_irq_chip(max14577->irq, max14577->irq_data); 386 regmap_del_irq_chip(max14577->irq, max14577->irq_data);
189 387
190 return ret; 388 return ret;
@@ -196,12 +394,15 @@ static int max14577_i2c_remove(struct i2c_client *i2c)
196 394
197 mfd_remove_devices(max14577->dev); 395 mfd_remove_devices(max14577->dev);
198 regmap_del_irq_chip(max14577->irq, max14577->irq_data); 396 regmap_del_irq_chip(max14577->irq, max14577->irq_data);
397 if (max14577->dev_type == MAXIM_DEVICE_TYPE_MAX77836)
398 max77836_remove(max14577);
199 399
200 return 0; 400 return 0;
201} 401}
202 402
203static const struct i2c_device_id max14577_i2c_id[] = { 403static const struct i2c_device_id max14577_i2c_id[] = {
204 { "max14577", MAXIM_DEVICE_TYPE_MAX14577, }, 404 { "max14577", MAXIM_DEVICE_TYPE_MAX14577, },
405 { "max77836", MAXIM_DEVICE_TYPE_MAX77836, },
205 { } 406 { }
206}; 407};
207MODULE_DEVICE_TABLE(i2c, max14577_i2c_id); 408MODULE_DEVICE_TABLE(i2c, max14577_i2c_id);
@@ -274,5 +475,5 @@ static void __exit max14577_i2c_exit(void)
274module_exit(max14577_i2c_exit); 475module_exit(max14577_i2c_exit);
275 476
276MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>, Krzysztof Kozlowski <k.kozlowski@samsung.com>"); 477MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>, Krzysztof Kozlowski <k.kozlowski@samsung.com>");
277MODULE_DESCRIPTION("MAXIM 14577 multi-function core driver"); 478MODULE_DESCRIPTION("Maxim 14577/77836 multi-function core driver");
278MODULE_LICENSE("GPL"); 479MODULE_LICENSE("GPL");
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index 989183d232cd..e301bd19b067 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * max14577-private.h - Common API for the Maxim 14577 internal sub chip 2 * max14577-private.h - Common API for the Maxim 14577/77836 internal sub chip
3 * 3 *
4 * Copyright (C) 2013 Samsung Electrnoics 4 * Copyright (C) 2014 Samsung Electrnoics
5 * Chanwoo Choi <cw00.choi@samsung.com> 5 * Chanwoo Choi <cw00.choi@samsung.com>
6 * Krzysztof Kozlowski <k.kozlowski@samsung.com> 6 * Krzysztof Kozlowski <k.kozlowski@samsung.com>
7 * 7 *
@@ -22,9 +22,14 @@
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/regmap.h> 23#include <linux/regmap.h>
24 24
25#define I2C_ADDR_PMIC (0x46 >> 1)
26#define I2C_ADDR_MUIC (0x4A >> 1)
27#define I2C_ADDR_FG (0x6C >> 1)
28
25enum maxim_device_type { 29enum maxim_device_type {
26 MAXIM_DEVICE_TYPE_UNKNOWN = 0, 30 MAXIM_DEVICE_TYPE_UNKNOWN = 0,
27 MAXIM_DEVICE_TYPE_MAX14577, 31 MAXIM_DEVICE_TYPE_MAX14577,
32 MAXIM_DEVICE_TYPE_MAX77836,
28 33
29 MAXIM_DEVICE_TYPE_NUM, 34 MAXIM_DEVICE_TYPE_NUM,
30}; 35};
@@ -88,6 +93,7 @@ enum max14577_muic_charger_type {
88#define MAX14577_INT2_DCDTMR_MASK BIT(2) 93#define MAX14577_INT2_DCDTMR_MASK BIT(2)
89#define MAX14577_INT2_DBCHG_MASK BIT(3) 94#define MAX14577_INT2_DBCHG_MASK BIT(3)
90#define MAX14577_INT2_VBVOLT_MASK BIT(4) 95#define MAX14577_INT2_VBVOLT_MASK BIT(4)
96#define MAX77836_INT2_VIDRM_MASK BIT(5)
91 97
92#define MAX14577_INT3_EOC_MASK BIT(0) 98#define MAX14577_INT3_EOC_MASK BIT(0)
93#define MAX14577_INT3_CGMBC_MASK BIT(1) 99#define MAX14577_INT3_CGMBC_MASK BIT(1)
@@ -104,9 +110,11 @@ enum max14577_muic_charger_type {
104#define STATUS1_ADC_SHIFT 0 110#define STATUS1_ADC_SHIFT 0
105#define STATUS1_ADCLOW_SHIFT 5 111#define STATUS1_ADCLOW_SHIFT 5
106#define STATUS1_ADCERR_SHIFT 6 112#define STATUS1_ADCERR_SHIFT 6
113#define MAX77836_STATUS1_ADC1K_SHIFT 7
107#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) 114#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT)
108#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) 115#define STATUS1_ADCLOW_MASK BIT(STATUS1_ADCLOW_SHIFT)
109#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) 116#define STATUS1_ADCERR_MASK BIT(STATUS1_ADCERR_SHIFT)
117#define MAX77836_STATUS1_ADC1K_MASK BIT(MAX77836_STATUS1_ADC1K_SHIFT)
110 118
111/* MAX14577 STATUS2 register */ 119/* MAX14577 STATUS2 register */
112#define STATUS2_CHGTYP_SHIFT 0 120#define STATUS2_CHGTYP_SHIFT 0
@@ -114,11 +122,13 @@ enum max14577_muic_charger_type {
114#define STATUS2_DCDTMR_SHIFT 4 122#define STATUS2_DCDTMR_SHIFT 4
115#define STATUS2_DBCHG_SHIFT 5 123#define STATUS2_DBCHG_SHIFT 5
116#define STATUS2_VBVOLT_SHIFT 6 124#define STATUS2_VBVOLT_SHIFT 6
125#define MAX77836_STATUS2_VIDRM_SHIFT 7
117#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) 126#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT)
118#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) 127#define STATUS2_CHGDETRUN_MASK BIT(STATUS2_CHGDETRUN_SHIFT)
119#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) 128#define STATUS2_DCDTMR_MASK BIT(STATUS2_DCDTMR_SHIFT)
120#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT) 129#define STATUS2_DBCHG_MASK BIT(STATUS2_DBCHG_SHIFT)
121#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) 130#define STATUS2_VBVOLT_MASK BIT(STATUS2_VBVOLT_SHIFT)
131#define MAX77836_STATUS2_VIDRM_MASK BIT(MAX77836_STATUS2_VIDRM_SHIFT)
122 132
123/* MAX14577 CONTROL1 register */ 133/* MAX14577 CONTROL1 register */
124#define COMN1SW_SHIFT 0 134#define COMN1SW_SHIFT 0
@@ -127,8 +137,8 @@ enum max14577_muic_charger_type {
127#define IDBEN_SHIFT 7 137#define IDBEN_SHIFT 7
128#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) 138#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT)
129#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) 139#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT)
130#define MICEN_MASK (0x1 << MICEN_SHIFT) 140#define MICEN_MASK BIT(MICEN_SHIFT)
131#define IDBEN_MASK (0x1 << IDBEN_SHIFT) 141#define IDBEN_MASK BIT(IDBEN_SHIFT)
132#define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK) 142#define CLEAR_IDBEN_MICEN_MASK (COMN1SW_MASK | COMP2SW_MASK)
133#define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \ 143#define CTRL1_SW_USB ((1 << COMP2SW_SHIFT) \
134 | (1 << COMN1SW_SHIFT)) 144 | (1 << COMN1SW_SHIFT))
@@ -148,14 +158,14 @@ enum max14577_muic_charger_type {
148#define CTRL2_ACCDET_SHIFT (5) 158#define CTRL2_ACCDET_SHIFT (5)
149#define CTRL2_USBCPINT_SHIFT (6) 159#define CTRL2_USBCPINT_SHIFT (6)
150#define CTRL2_RCPS_SHIFT (7) 160#define CTRL2_RCPS_SHIFT (7)
151#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT) 161#define CTRL2_LOWPWR_MASK BIT(CTRL2_LOWPWR_SHIFT)
152#define CTRL2_ADCEN_MASK (0x1 << CTRL2_ADCEN_SHIFT) 162#define CTRL2_ADCEN_MASK BIT(CTRL2_ADCEN_SHIFT)
153#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT) 163#define CTRL2_CPEN_MASK BIT(CTRL2_CPEN_SHIFT)
154#define CTRL2_SFOUTASRT_MASK (0x1 << CTRL2_SFOUTASRT_SHIFT) 164#define CTRL2_SFOUTASRT_MASK BIT(CTRL2_SFOUTASRT_SHIFT)
155#define CTRL2_SFOUTORD_MASK (0x1 << CTRL2_SFOUTORD_SHIFT) 165#define CTRL2_SFOUTORD_MASK BIT(CTRL2_SFOUTORD_SHIFT)
156#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT) 166#define CTRL2_ACCDET_MASK BIT(CTRL2_ACCDET_SHIFT)
157#define CTRL2_USBCPINT_MASK (0x1 << CTRL2_USBCPINT_SHIFT) 167#define CTRL2_USBCPINT_MASK BIT(CTRL2_USBCPINT_SHIFT)
158#define CTRL2_RCPS_MASK (0x1 << CTR2_RCPS_SHIFT) 168#define CTRL2_RCPS_MASK BIT(CTRL2_RCPS_SHIFT)
159 169
160#define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \ 170#define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \
161 (0 << CTRL2_LOWPWR_SHIFT)) 171 (0 << CTRL2_LOWPWR_SHIFT))
@@ -203,14 +213,14 @@ enum max14577_charger_reg {
203#define CDETCTRL1_DBEXIT_SHIFT 5 213#define CDETCTRL1_DBEXIT_SHIFT 5
204#define CDETCTRL1_DBIDLE_SHIFT 6 214#define CDETCTRL1_DBIDLE_SHIFT 6
205#define CDETCTRL1_CDPDET_SHIFT 7 215#define CDETCTRL1_CDPDET_SHIFT 7
206#define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT) 216#define CDETCTRL1_CHGDETEN_MASK BIT(CDETCTRL1_CHGDETEN_SHIFT)
207#define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT) 217#define CDETCTRL1_CHGTYPMAN_MASK BIT(CDETCTRL1_CHGTYPMAN_SHIFT)
208#define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT) 218#define CDETCTRL1_DCDEN_MASK BIT(CDETCTRL1_DCDEN_SHIFT)
209#define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT) 219#define CDETCTRL1_DCD2SCT_MASK BIT(CDETCTRL1_DCD2SCT_SHIFT)
210#define CDETCTRL1_DCHKTM_MASK (0x1 << CDETCTRL1_DCHKTM_SHIFT) 220#define CDETCTRL1_DCHKTM_MASK BIT(CDETCTRL1_DCHKTM_SHIFT)
211#define CDETCTRL1_DBEXIT_MASK (0x1 << CDETCTRL1_DBEXIT_SHIFT) 221#define CDETCTRL1_DBEXIT_MASK BIT(CDETCTRL1_DBEXIT_SHIFT)
212#define CDETCTRL1_DBIDLE_MASK (0x1 << CDETCTRL1_DBIDLE_SHIFT) 222#define CDETCTRL1_DBIDLE_MASK BIT(CDETCTRL1_DBIDLE_SHIFT)
213#define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT) 223#define CDETCTRL1_CDPDET_MASK BIT(CDETCTRL1_CDPDET_SHIFT)
214 224
215/* MAX14577 CHGCTRL1 register */ 225/* MAX14577 CHGCTRL1 register */
216#define CHGCTRL1_TCHW_SHIFT 4 226#define CHGCTRL1_TCHW_SHIFT 4
@@ -218,9 +228,9 @@ enum max14577_charger_reg {
218 228
219/* MAX14577 CHGCTRL2 register */ 229/* MAX14577 CHGCTRL2 register */
220#define CHGCTRL2_MBCHOSTEN_SHIFT 6 230#define CHGCTRL2_MBCHOSTEN_SHIFT 6
221#define CHGCTRL2_MBCHOSTEN_MASK (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT) 231#define CHGCTRL2_MBCHOSTEN_MASK BIT(CHGCTRL2_MBCHOSTEN_SHIFT)
222#define CHGCTRL2_VCHGR_RC_SHIFT 7 232#define CHGCTRL2_VCHGR_RC_SHIFT 7
223#define CHGCTRL2_VCHGR_RC_MASK (0x1 << CHGCTRL2_VCHGR_RC_SHIFT) 233#define CHGCTRL2_VCHGR_RC_MASK BIT(CHGCTRL2_VCHGR_RC_SHIFT)
224 234
225/* MAX14577 CHGCTRL3 register */ 235/* MAX14577 CHGCTRL3 register */
226#define CHGCTRL3_MBCCVWRC_SHIFT 0 236#define CHGCTRL3_MBCCVWRC_SHIFT 0
@@ -230,7 +240,7 @@ enum max14577_charger_reg {
230#define CHGCTRL4_MBCICHWRCH_SHIFT 0 240#define CHGCTRL4_MBCICHWRCH_SHIFT 0
231#define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT) 241#define CHGCTRL4_MBCICHWRCH_MASK (0xf << CHGCTRL4_MBCICHWRCH_SHIFT)
232#define CHGCTRL4_MBCICHWRCL_SHIFT 4 242#define CHGCTRL4_MBCICHWRCL_SHIFT 4
233#define CHGCTRL4_MBCICHWRCL_MASK (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT) 243#define CHGCTRL4_MBCICHWRCL_MASK BIT(CHGCTRL4_MBCICHWRCL_SHIFT)
234 244
235/* MAX14577 CHGCTRL5 register */ 245/* MAX14577 CHGCTRL5 register */
236#define CHGCTRL5_EOCS_SHIFT 0 246#define CHGCTRL5_EOCS_SHIFT 0
@@ -238,7 +248,7 @@ enum max14577_charger_reg {
238 248
239/* MAX14577 CHGCTRL6 register */ 249/* MAX14577 CHGCTRL6 register */
240#define CHGCTRL6_AUTOSTOP_SHIFT 5 250#define CHGCTRL6_AUTOSTOP_SHIFT 5
241#define CHGCTRL6_AUTOSTOP_MASK (0x1 << CHGCTRL6_AUTOSTOP_SHIFT) 251#define CHGCTRL6_AUTOSTOP_MASK BIT(CHGCTRL6_AUTOSTOP_SHIFT)
242 252
243/* MAX14577 CHGCTRL7 register */ 253/* MAX14577 CHGCTRL7 register */
244#define CHGCTRL7_OTPCGHCVS_SHIFT 0 254#define CHGCTRL7_OTPCGHCVS_SHIFT 0
@@ -253,6 +263,70 @@ enum max14577_charger_reg {
253/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */ 263/* MAX14577 regulator SFOUT LDO voltage, fixed, uV */
254#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000 264#define MAX14577_REGULATOR_SAFEOUT_VOLTAGE 4900000
255 265
266/* Slave addr = 0x46: PMIC */
267enum max77836_pmic_reg {
268 MAX77836_PMIC_REG_PMIC_ID = 0x20,
269 MAX77836_PMIC_REG_PMIC_REV = 0x21,
270 MAX77836_PMIC_REG_INTSRC = 0x22,
271 MAX77836_PMIC_REG_INTSRC_MASK = 0x23,
272 MAX77836_PMIC_REG_TOPSYS_INT = 0x24,
273 MAX77836_PMIC_REG_TOPSYS_INT_MASK = 0x26,
274 MAX77836_PMIC_REG_TOPSYS_STAT = 0x28,
275 MAX77836_PMIC_REG_MRSTB_CNTL = 0x2A,
276 MAX77836_PMIC_REG_LSCNFG = 0x2B,
277
278 MAX77836_LDO_REG_CNFG1_LDO1 = 0x51,
279 MAX77836_LDO_REG_CNFG2_LDO1 = 0x52,
280 MAX77836_LDO_REG_CNFG1_LDO2 = 0x53,
281 MAX77836_LDO_REG_CNFG2_LDO2 = 0x54,
282 MAX77836_LDO_REG_CNFG_LDO_BIAS = 0x55,
283
284 MAX77836_COMP_REG_COMP1 = 0x60,
285
286 MAX77836_PMIC_REG_END,
287};
288
289#define MAX77836_INTSRC_MASK_TOP_INT_SHIFT 1
290#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT 3
291#define MAX77836_INTSRC_MASK_TOP_INT_MASK BIT(MAX77836_INTSRC_MASK_TOP_INT_SHIFT)
292#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK BIT(MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT)
293
294/* MAX77836 PMIC interrupts */
295#define MAX77836_TOPSYS_INT_T120C_SHIFT 0
296#define MAX77836_TOPSYS_INT_T140C_SHIFT 1
297#define MAX77836_TOPSYS_INT_T120C_MASK BIT(MAX77836_TOPSYS_INT_T120C_SHIFT)
298#define MAX77836_TOPSYS_INT_T140C_MASK BIT(MAX77836_TOPSYS_INT_T140C_SHIFT)
299
300/* Slave addr = 0x6C: Fuel-Gauge/Battery */
301enum max77836_fg_reg {
302 MAX77836_FG_REG_VCELL_MSB = 0x02,
303 MAX77836_FG_REG_VCELL_LSB = 0x03,
304 MAX77836_FG_REG_SOC_MSB = 0x04,
305 MAX77836_FG_REG_SOC_LSB = 0x05,
306 MAX77836_FG_REG_MODE_H = 0x06,
307 MAX77836_FG_REG_MODE_L = 0x07,
308 MAX77836_FG_REG_VERSION_MSB = 0x08,
309 MAX77836_FG_REG_VERSION_LSB = 0x09,
310 MAX77836_FG_REG_HIBRT_H = 0x0A,
311 MAX77836_FG_REG_HIBRT_L = 0x0B,
312 MAX77836_FG_REG_CONFIG_H = 0x0C,
313 MAX77836_FG_REG_CONFIG_L = 0x0D,
314 MAX77836_FG_REG_VALRT_MIN = 0x14,
315 MAX77836_FG_REG_VALRT_MAX = 0x15,
316 MAX77836_FG_REG_CRATE_MSB = 0x16,
317 MAX77836_FG_REG_CRATE_LSB = 0x17,
318 MAX77836_FG_REG_VRESET = 0x18,
319 MAX77836_FG_REG_FGID = 0x19,
320 MAX77836_FG_REG_STATUS_H = 0x1A,
321 MAX77836_FG_REG_STATUS_L = 0x1B,
322 /*
323 * TODO: TABLE registers
324 * TODO: CMD register
325 */
326
327 MAX77836_FG_REG_END,
328};
329
256enum max14577_irq { 330enum max14577_irq {
257 /* INT1 */ 331 /* INT1 */
258 MAX14577_IRQ_INT1_ADC, 332 MAX14577_IRQ_INT1_ADC,
@@ -272,17 +346,24 @@ enum max14577_irq {
272 MAX14577_IRQ_INT3_OVP, 346 MAX14577_IRQ_INT3_OVP,
273 MAX14577_IRQ_INT3_MBCCHGERR, 347 MAX14577_IRQ_INT3_MBCCHGERR,
274 348
349 /* TOPSYS_INT, only MAX77836 */
350 MAX77836_IRQ_TOPSYS_T140C,
351 MAX77836_IRQ_TOPSYS_T120C,
352
275 MAX14577_IRQ_NUM, 353 MAX14577_IRQ_NUM,
276}; 354};
277 355
278struct max14577 { 356struct max14577 {
279 struct device *dev; 357 struct device *dev;
280 struct i2c_client *i2c; /* Slave addr = 0x4A */ 358 struct i2c_client *i2c; /* Slave addr = 0x4A */
359 struct i2c_client *i2c_pmic; /* Slave addr = 0x46 */
281 enum maxim_device_type dev_type; 360 enum maxim_device_type dev_type;
282 361
283 struct regmap *regmap; 362 struct regmap *regmap; /* For MUIC and Charger */
363 struct regmap *regmap_pmic;
284 364
285 struct regmap_irq_chip_data *irq_data; 365 struct regmap_irq_chip_data *irq_data; /* For MUIC and Charger */
366 struct regmap_irq_chip_data *irq_data_pmic;
286 int irq; 367 int irq;
287}; 368};
288 369
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h
index 736d39c3ec0d..08b449159fd1 100644
--- a/include/linux/mfd/max14577.h
+++ b/include/linux/mfd/max14577.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * max14577.h - Driver for the Maxim 14577 2 * max14577.h - Driver for the Maxim 14577/77836
3 * 3 *
4 * Copyright (C) 2013 Samsung Electrnoics 4 * Copyright (C) 2014 Samsung Electrnoics
5 * Chanwoo Choi <cw00.choi@samsung.com> 5 * Chanwoo Choi <cw00.choi@samsung.com>
6 * Krzysztof Kozlowski <k.kozlowski@samsung.com> 6 * Krzysztof Kozlowski <k.kozlowski@samsung.com>
7 * 7 *
@@ -20,6 +20,9 @@
20 * MAX14577 has MUIC, Charger devices. 20 * MAX14577 has MUIC, Charger devices.
21 * The devices share the same I2C bus and interrupt line 21 * The devices share the same I2C bus and interrupt line
22 * included in this mfd driver. 22 * included in this mfd driver.
23 *
24 * MAX77836 has additional PMIC and Fuel-Gauge on different I2C slave
25 * addresses.
23 */ 26 */
24 27
25#ifndef __MAX14577_H__ 28#ifndef __MAX14577_H__
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-02 02:08:22 -0500