diff options
-rw-r--r-- | arch/arm/mach-s3c64xx/mach-crag6410.c | 264 |
1 files changed, 223 insertions, 41 deletions
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 970775363701..cfe19f0f4cb5 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/regulator/machine.h> | 23 | #include <linux/regulator/machine.h> |
24 | #include <linux/regulator/fixed.h> | ||
24 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
25 | #include <linux/dm9000.h> | 26 | #include <linux/dm9000.h> |
26 | #include <linux/gpio_keys.h> | 27 | #include <linux/gpio_keys.h> |
@@ -33,6 +34,7 @@ | |||
33 | 34 | ||
34 | #include <linux/mfd/wm831x/core.h> | 35 | #include <linux/mfd/wm831x/core.h> |
35 | #include <linux/mfd/wm831x/pdata.h> | 36 | #include <linux/mfd/wm831x/pdata.h> |
37 | #include <linux/mfd/wm831x/irq.h> | ||
36 | #include <linux/mfd/wm831x/gpio.h> | 38 | #include <linux/mfd/wm831x/gpio.h> |
37 | 39 | ||
38 | #include <asm/mach/arch.h> | 40 | #include <asm/mach/arch.h> |
@@ -46,7 +48,6 @@ | |||
46 | #include <mach/regs-gpio.h> | 48 | #include <mach/regs-gpio.h> |
47 | #include <mach/regs-modem.h> | 49 | #include <mach/regs-modem.h> |
48 | 50 | ||
49 | #include <mach/gpio-bank-o.h> | ||
50 | #include <mach/regs-gpio-memport.h> | 51 | #include <mach/regs-gpio-memport.h> |
51 | 52 | ||
52 | #include <plat/regs-serial.h> | 53 | #include <plat/regs-serial.h> |
@@ -64,10 +65,16 @@ | |||
64 | #include <plat/iic.h> | 65 | #include <plat/iic.h> |
65 | #include <plat/pm.h> | 66 | #include <plat/pm.h> |
66 | 67 | ||
67 | #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START | 68 | #include <sound/wm8915.h> |
69 | #include <sound/wm8962.h> | ||
70 | #include <sound/wm9081.h> | ||
68 | 71 | ||
69 | #define PCA935X_GPIO_BASE GPIO_BOARD_START | 72 | #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START |
70 | #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) | 73 | #define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) |
74 | |||
75 | #define PCA935X_GPIO_BASE GPIO_BOARD_START | ||
76 | #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) | ||
77 | #define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16) | ||
71 | 78 | ||
72 | /* serial port setup */ | 79 | /* serial port setup */ |
73 | 80 | ||
@@ -77,32 +84,32 @@ | |||
77 | 84 | ||
78 | static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { | 85 | static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = { |
79 | [0] = { | 86 | [0] = { |
80 | .hwport = 0, | 87 | .hwport = 0, |
81 | .flags = 0, | 88 | .flags = 0, |
82 | .ucon = UCON, | 89 | .ucon = UCON, |
83 | .ulcon = ULCON, | 90 | .ulcon = ULCON, |
84 | .ufcon = UFCON, | 91 | .ufcon = UFCON, |
85 | }, | 92 | }, |
86 | [1] = { | 93 | [1] = { |
87 | .hwport = 1, | 94 | .hwport = 1, |
88 | .flags = 0, | 95 | .flags = 0, |
89 | .ucon = UCON, | 96 | .ucon = UCON, |
90 | .ulcon = ULCON, | 97 | .ulcon = ULCON, |
91 | .ufcon = UFCON, | 98 | .ufcon = UFCON, |
92 | }, | 99 | }, |
93 | [2] = { | 100 | [2] = { |
94 | .hwport = 2, | 101 | .hwport = 2, |
95 | .flags = 0, | 102 | .flags = 0, |
96 | .ucon = UCON, | 103 | .ucon = UCON, |
97 | .ulcon = ULCON, | 104 | .ulcon = ULCON, |
98 | .ufcon = UFCON, | 105 | .ufcon = UFCON, |
99 | }, | 106 | }, |
100 | [3] = { | 107 | [3] = { |
101 | .hwport = 3, | 108 | .hwport = 3, |
102 | .flags = 0, | 109 | .flags = 0, |
103 | .ucon = UCON, | 110 | .ucon = UCON, |
104 | .ulcon = ULCON, | 111 | .ulcon = ULCON, |
105 | .ufcon = UFCON, | 112 | .ufcon = UFCON, |
106 | }, | 113 | }, |
107 | }; | 114 | }; |
108 | 115 | ||
@@ -205,10 +212,15 @@ static struct gpio_keys_button crag6410_gpio_keys[] = { | |||
205 | [0] = { | 212 | [0] = { |
206 | .code = KEY_SUSPEND, | 213 | .code = KEY_SUSPEND, |
207 | .gpio = S3C64XX_GPL(10), /* EINT 18 */ | 214 | .gpio = S3C64XX_GPL(10), /* EINT 18 */ |
208 | .type = EV_SW, | 215 | .type = EV_KEY, |
209 | .wakeup = 1, | 216 | .wakeup = 1, |
210 | .active_low = 1, | 217 | .active_low = 1, |
211 | }, | 218 | }, |
219 | [1] = { | ||
220 | .code = SW_FRONT_PROXIMITY, | ||
221 | .gpio = S3C64XX_GPN(11), /* EINT 11 */ | ||
222 | .type = EV_SW, | ||
223 | }, | ||
212 | }; | 224 | }; |
213 | 225 | ||
214 | static struct gpio_keys_platform_data crag6410_gpio_keydata = { | 226 | static struct gpio_keys_platform_data crag6410_gpio_keydata = { |
@@ -270,6 +282,44 @@ static struct platform_device crag6410_mmgpio = { | |||
270 | }, | 282 | }, |
271 | }; | 283 | }; |
272 | 284 | ||
285 | static struct platform_device speyside_device = { | ||
286 | .name = "speyside", | ||
287 | .id = -1, | ||
288 | }; | ||
289 | |||
290 | static struct platform_device speyside_wm8962_device = { | ||
291 | .name = "speyside-wm8962", | ||
292 | .id = -1, | ||
293 | }; | ||
294 | |||
295 | static struct regulator_consumer_supply wallvdd_consumers[] = { | ||
296 | REGULATOR_SUPPLY("SPKVDD1", "1-001a"), | ||
297 | REGULATOR_SUPPLY("SPKVDD2", "1-001a"), | ||
298 | }; | ||
299 | |||
300 | static struct regulator_init_data wallvdd_data = { | ||
301 | .constraints = { | ||
302 | .always_on = 1, | ||
303 | }, | ||
304 | .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers), | ||
305 | .consumer_supplies = wallvdd_consumers, | ||
306 | }; | ||
307 | |||
308 | static struct fixed_voltage_config wallvdd_pdata = { | ||
309 | .supply_name = "WALLVDD", | ||
310 | .microvolts = 5000000, | ||
311 | .init_data = &wallvdd_data, | ||
312 | .gpio = -EINVAL, | ||
313 | }; | ||
314 | |||
315 | static struct platform_device wallvdd_device = { | ||
316 | .name = "reg-fixed-voltage", | ||
317 | .id = -1, | ||
318 | .dev = { | ||
319 | .platform_data = &wallvdd_pdata, | ||
320 | }, | ||
321 | }; | ||
322 | |||
273 | static struct platform_device *crag6410_devices[] __initdata = { | 323 | static struct platform_device *crag6410_devices[] __initdata = { |
274 | &s3c_device_hsmmc0, | 324 | &s3c_device_hsmmc0, |
275 | &s3c_device_hsmmc1, | 325 | &s3c_device_hsmmc1, |
@@ -293,6 +343,9 @@ static struct platform_device *crag6410_devices[] __initdata = { | |||
293 | &crag6410_mmgpio, | 343 | &crag6410_mmgpio, |
294 | &crag6410_lcd_powerdev, | 344 | &crag6410_lcd_powerdev, |
295 | &crag6410_backlight_device, | 345 | &crag6410_backlight_device, |
346 | &speyside_device, | ||
347 | &speyside_wm8962_device, | ||
348 | &wallvdd_device, | ||
296 | }; | 349 | }; |
297 | 350 | ||
298 | static struct pca953x_platform_data crag6410_pca_data = { | 351 | static struct pca953x_platform_data crag6410_pca_data = { |
@@ -423,27 +476,21 @@ static struct wm831x_status_pdata banff_green_led __initdata = { | |||
423 | 476 | ||
424 | static struct wm831x_touch_pdata touch_pdata __initdata = { | 477 | static struct wm831x_touch_pdata touch_pdata __initdata = { |
425 | .data_irq = S3C_EINT(26), | 478 | .data_irq = S3C_EINT(26), |
479 | .pd_irq = S3C_EINT(27), | ||
426 | }; | 480 | }; |
427 | 481 | ||
428 | static __init int crag_pmic_pre_init(struct wm831x *wm831x) | ||
429 | { | ||
430 | /* Touchscreen data IRQ - CMOS, DBVDD, active high*/ | ||
431 | wm831x_reg_write(wm831x, WM831X_GPIO11_CONTROL, | ||
432 | WM831X_GPN_POL | WM831X_GPN_ENA | 0x6); | ||
433 | |||
434 | /* Touchscreen pen down IRQ - CMOS, DBVDD, active high*/ | ||
435 | wm831x_reg_write(wm831x, WM831X_GPIO12_CONTROL, | ||
436 | WM831X_GPN_POL | WM831X_GPN_ENA | 0x7); | ||
437 | |||
438 | return 0; | ||
439 | } | ||
440 | |||
441 | static struct wm831x_pdata crag_pmic_pdata __initdata = { | 482 | static struct wm831x_pdata crag_pmic_pdata __initdata = { |
442 | .pre_init = crag_pmic_pre_init, | 483 | .wm831x_num = 1, |
443 | |||
444 | .irq_base = BANFF_PMIC_IRQ_BASE, | 484 | .irq_base = BANFF_PMIC_IRQ_BASE, |
445 | .gpio_base = GPIO_BOARD_START + 8, | 485 | .gpio_base = GPIO_BOARD_START + 8, |
446 | 486 | ||
487 | .gpio_defaults = { | ||
488 | /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ | ||
489 | [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, | ||
490 | /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ | ||
491 | [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7, | ||
492 | }, | ||
493 | |||
447 | .dcdc = { | 494 | .dcdc = { |
448 | &vddarm, /* DCDC1 */ | 495 | &vddarm, /* DCDC1 */ |
449 | &vddint, /* DCDC2 */ | 496 | &vddint, /* DCDC2 */ |
@@ -487,9 +534,142 @@ static struct s3c2410_platform_i2c i2c0_pdata = { | |||
487 | .frequency = 400000, | 534 | .frequency = 400000, |
488 | }; | 535 | }; |
489 | 536 | ||
537 | static struct regulator_init_data pvdd_1v2 __initdata = { | ||
538 | .constraints = { | ||
539 | .name = "PVDD_1V2", | ||
540 | .always_on = 1, | ||
541 | }, | ||
542 | }; | ||
543 | |||
544 | static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { | ||
545 | REGULATOR_SUPPLY("PLLVDD", "1-001a"), | ||
546 | REGULATOR_SUPPLY("DBVDD", "1-001a"), | ||
547 | REGULATOR_SUPPLY("CPVDD", "1-001a"), | ||
548 | REGULATOR_SUPPLY("AVDD2", "1-001a"), | ||
549 | REGULATOR_SUPPLY("DCVDD", "1-001a"), | ||
550 | REGULATOR_SUPPLY("AVDD", "1-001a"), | ||
551 | }; | ||
552 | |||
553 | static struct regulator_init_data pvdd_1v8 __initdata = { | ||
554 | .constraints = { | ||
555 | .name = "PVDD_1V8", | ||
556 | .always_on = 1, | ||
557 | }, | ||
558 | |||
559 | .consumer_supplies = pvdd_1v8_consumers, | ||
560 | .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), | ||
561 | }; | ||
562 | |||
563 | static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = { | ||
564 | REGULATOR_SUPPLY("MICVDD", "1-001a"), | ||
565 | REGULATOR_SUPPLY("AVDD1", "1-001a"), | ||
566 | }; | ||
567 | |||
568 | static struct regulator_init_data pvdd_3v3 __initdata = { | ||
569 | .constraints = { | ||
570 | .name = "PVDD_3V3", | ||
571 | .always_on = 1, | ||
572 | }, | ||
573 | |||
574 | .consumer_supplies = pvdd_3v3_consumers, | ||
575 | .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), | ||
576 | }; | ||
577 | |||
578 | static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = { | ||
579 | .wm831x_num = 2, | ||
580 | .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, | ||
581 | .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, | ||
582 | |||
583 | .gpio_defaults = { | ||
584 | /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */ | ||
585 | [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | ||
586 | [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | ||
587 | [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA, | ||
588 | }, | ||
589 | |||
590 | .dcdc = { | ||
591 | &pvdd_1v2, /* DCDC1 */ | ||
592 | &pvdd_1v8, /* DCDC2 */ | ||
593 | &pvdd_3v3, /* DCDC3 */ | ||
594 | }, | ||
595 | |||
596 | .disable_touch = true, | ||
597 | }; | ||
598 | |||
599 | static struct wm8915_retune_mobile_config wm8915_retune[] = { | ||
600 | { | ||
601 | .name = "Sub LPF", | ||
602 | .rate = 48000, | ||
603 | .regs = { | ||
604 | 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
605 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
606 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
607 | }, | ||
608 | }, | ||
609 | { | ||
610 | .name = "Sub HPF", | ||
611 | .rate = 48000, | ||
612 | .regs = { | ||
613 | 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000, | ||
614 | 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000, | ||
615 | 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000 | ||
616 | }, | ||
617 | }, | ||
618 | }; | ||
619 | |||
620 | static struct wm8915_pdata wm8915_pdata __initdata = { | ||
621 | .ldo_ena = S3C64XX_GPN(7), | ||
622 | .gpio_base = CODEC_GPIO_BASE, | ||
623 | .micdet_def = 1, | ||
624 | .inl_mode = WM8915_DIFFERRENTIAL_1, | ||
625 | .inr_mode = WM8915_DIFFERRENTIAL_1, | ||
626 | |||
627 | .irq_flags = IRQF_TRIGGER_FALLING, | ||
628 | |||
629 | .gpio_default = { | ||
630 | 0x8001, /* GPIO1 == ADCLRCLK1 */ | ||
631 | 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */ | ||
632 | 0x0141, /* GPIO3 == HP_SEL */ | ||
633 | 0x0002, /* GPIO4 == IRQ */ | ||
634 | 0x020e, /* GPIO5 == CLKOUT */ | ||
635 | }, | ||
636 | |||
637 | .retune_mobile_cfgs = wm8915_retune, | ||
638 | .num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune), | ||
639 | }; | ||
640 | |||
641 | static struct wm8962_pdata wm8962_pdata __initdata = { | ||
642 | .gpio_init = { | ||
643 | 0, | ||
644 | WM8962_GPIO_FN_OPCLK, | ||
645 | WM8962_GPIO_FN_DMICCLK, | ||
646 | 0, | ||
647 | 0x8000 | WM8962_GPIO_FN_DMICDAT, | ||
648 | WM8962_GPIO_FN_IRQ, /* Open drain mode */ | ||
649 | }, | ||
650 | .irq_active_low = true, | ||
651 | }; | ||
652 | |||
653 | static struct wm9081_pdata wm9081_pdata __initdata = { | ||
654 | .irq_high = false, | ||
655 | .irq_cmos = false, | ||
656 | }; | ||
657 | |||
490 | static struct i2c_board_info i2c_devs1[] __initdata = { | 658 | static struct i2c_board_info i2c_devs1[] __initdata = { |
491 | { I2C_BOARD_INFO("wm8311", 0x34), | 659 | { I2C_BOARD_INFO("wm8311", 0x34), |
492 | .platform_data = &glenfarclas_pmic_pdata, | 660 | .irq = S3C_EINT(0), |
661 | .platform_data = &glenfarclas_pmic_pdata }, | ||
662 | |||
663 | { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, | ||
664 | { I2C_BOARD_INFO("wm8915", 0x1a), | ||
665 | .platform_data = &wm8915_pdata, | ||
666 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
667 | }, | ||
668 | { I2C_BOARD_INFO("wm9081", 0x6c), | ||
669 | .platform_data = &wm9081_pdata, }, | ||
670 | { I2C_BOARD_INFO("wm8962", 0x1a), | ||
671 | .platform_data = &wm8962_pdata, | ||
672 | .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, | ||
493 | }, | 673 | }, |
494 | }; | 674 | }; |
495 | 675 | ||
@@ -561,6 +741,8 @@ static void __init crag6410_machine_init(void) | |||
561 | 741 | ||
562 | platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); | 742 | platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); |
563 | 743 | ||
744 | regulator_has_full_constraints(); | ||
745 | |||
564 | s3c_pm_init(); | 746 | s3c_pm_init(); |
565 | } | 747 | } |
566 | 748 | ||