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-rw-r--r--arch/arm/plat-mxc/include/mach/i2c.h25
-rw-r--r--drivers/i2c/busses/Kconfig10
-rw-r--r--drivers/i2c/busses/Makefile1
-rw-r--r--drivers/i2c/busses/i2c-imx.c617
4 files changed, 653 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h
new file mode 100644
index 000000000000..4a5dc5c6d8e8
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/i2c.h
@@ -0,0 +1,25 @@
1/*
2 * i2c.h - i.MX I2C driver header file
3 *
4 * Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com>
5 *
6 * This file is released under the GPLv2
7 */
8
9#ifndef __ASM_ARCH_I2C_H_
10#define __ASM_ARCH_I2C_H_
11
12/**
13 * struct imxi2c_platform_data - structure of platform data for MXC I2C driver
14 * @init: Initialise gpio's and other board specific things
15 * @exit: Free everything initialised by @init
16 * @bitrate: Bus speed measured in Hz
17 *
18 **/
19struct imxi2c_platform_data {
20 int (*init)(struct device *dev);
21 void (*exit)(struct device *dev);
22 int bitrate;
23};
24
25#endif /* __ASM_ARCH_I2C_H_ */
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index da809ad0996a..5d4aa5e873ca 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -356,6 +356,16 @@ config I2C_IBM_IIC
356 This driver can also be built as a module. If so, the module 356 This driver can also be built as a module. If so, the module
357 will be called i2c-ibm_iic. 357 will be called i2c-ibm_iic.
358 358
359config I2C_IMX
360 tristate "IMX I2C interface"
361 depends on ARCH_MXC
362 help
363 Say Y here if you want to use the IIC bus controller on
364 the Freescale i.MX/MXC processors.
365
366 This driver can also be built as a module. If so, the module
367 will be called i2c-imx.
368
359config I2C_IOP3XX 369config I2C_IOP3XX
360 tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface" 370 tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface"
361 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX 371 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 0c2c4b26cdf1..657ab2428011 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
33obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o 33obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
34obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o 34obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
35obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 35obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
36obj-$(CONFIG_I2C_IMX) += i2c-imx.o
36obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 37obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
37obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 38obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
38obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 39obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
new file mode 100644
index 000000000000..22cf200ecb3e
--- /dev/null
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -0,0 +1,617 @@
1/*
2 * Copyright (C) 2002 Motorola GSG-China
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
17 * USA.
18 *
19 * Author:
20 * Darius Augulis, Teltonika Inc.
21 *
22 * Desc.:
23 * Implementation of I2C Adapter/Algorithm Driver
24 * for I2C Bus integrated in Freescale i.MX/MXC processors
25 *
26 * Derived from Motorola GSG China I2C example driver
27 *
28 * Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
29 * Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
30 * Copyright (C) 2007 RightHand Technologies, Inc.
31 * Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
32 *
33 */
34
35/** Includes *******************************************************************
36*******************************************************************************/
37
38#include <linux/init.h>
39#include <linux/kernel.h>
40#include <linux/module.h>
41#include <linux/errno.h>
42#include <linux/err.h>
43#include <linux/interrupt.h>
44#include <linux/delay.h>
45#include <linux/i2c.h>
46#include <linux/io.h>
47#include <linux/sched.h>
48#include <linux/platform_device.h>
49#include <linux/clk.h>
50
51#include <mach/irqs.h>
52#include <mach/hardware.h>
53#include <mach/i2c.h>
54
55/** Defines ********************************************************************
56*******************************************************************************/
57
58/* This will be the driver name the kernel reports */
59#define DRIVER_NAME "imx-i2c"
60
61/* Default value */
62#define IMX_I2C_BIT_RATE 100000 /* 100kHz */
63
64/* IMX I2C registers */
65#define IMX_I2C_IADR 0x00 /* i2c slave address */
66#define IMX_I2C_IFDR 0x04 /* i2c frequency divider */
67#define IMX_I2C_I2CR 0x08 /* i2c control */
68#define IMX_I2C_I2SR 0x0C /* i2c status */
69#define IMX_I2C_I2DR 0x10 /* i2c transfer data */
70
71/* Bits of IMX I2C registers */
72#define I2SR_RXAK 0x01
73#define I2SR_IIF 0x02
74#define I2SR_SRW 0x04
75#define I2SR_IAL 0x10
76#define I2SR_IBB 0x20
77#define I2SR_IAAS 0x40
78#define I2SR_ICF 0x80
79#define I2CR_RSTA 0x04
80#define I2CR_TXAK 0x08
81#define I2CR_MTX 0x10
82#define I2CR_MSTA 0x20
83#define I2CR_IIEN 0x40
84#define I2CR_IEN 0x80
85
86/** Variables ******************************************************************
87*******************************************************************************/
88
89static unsigned int disable_delay; /* Dummy delay */
90
91/*
92 * sorted list of clock divider, register value pairs
93 * taken from table 26-5, p.26-9, Freescale i.MX
94 * Integrated Portable System Processor Reference Manual
95 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
96 *
97 * Duplicated divider values removed from list
98 */
99
100static u16 __initdata i2c_clk_div[50][2] = {
101 { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 },
102 { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 },
103 { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 },
104 { 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B },
105 { 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A },
106 { 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 },
107 { 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 },
108 { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 },
109 { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 },
110 { 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B },
111 { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E },
112 { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
113 { 3072, 0x1E }, { 3840, 0x1F }
114};
115
116struct imx_i2c_struct {
117 struct i2c_adapter adapter;
118 struct resource *res;
119 struct clk *clk;
120 void __iomem *base;
121 int irq;
122 wait_queue_head_t queue;
123 unsigned long i2csr;
124};
125
126/** Functions for IMX I2C adapter driver ***************************************
127*******************************************************************************/
128
129static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx)
130{
131 unsigned long orig_jiffies = jiffies;
132
133 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
134
135 /* wait for bus not busy */
136 while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) {
137 if (signal_pending(current)) {
138 dev_dbg(&i2c_imx->adapter.dev,
139 "<%s> I2C Interrupted\n", __func__);
140 return -EINTR;
141 }
142 if (time_after(jiffies, orig_jiffies + HZ / 1000)) {
143 dev_dbg(&i2c_imx->adapter.dev,
144 "<%s> I2C bus is busy\n", __func__);
145 return -EIO;
146 }
147 schedule();
148 }
149
150 return 0;
151}
152
153static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
154{
155 int result;
156
157 result = wait_event_interruptible_timeout(i2c_imx->queue,
158 i2c_imx->i2csr & I2SR_IIF, HZ / 10);
159
160 if (unlikely(result < 0)) {
161 dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
162 return result;
163 } else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
164 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
165 return -ETIMEDOUT;
166 }
167 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
168 i2c_imx->i2csr = 0;
169 return 0;
170}
171
172static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
173{
174 if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
175 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
176 return -EIO; /* No ACK */
177 }
178
179 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
180 return 0;
181}
182
183static void i2c_imx_start(struct imx_i2c_struct *i2c_imx)
184{
185 unsigned int temp = 0;
186
187 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
188
189 /* Enable I2C controller */
190 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
191 /* Start I2C transaction */
192 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
193 temp |= I2CR_MSTA;
194 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
195 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
196 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
197}
198
199static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
200{
201 unsigned int temp = 0;
202
203 /* Stop I2C transaction */
204 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
205 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
206 temp &= ~I2CR_MSTA;
207 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
208 /* setup chip registers to defaults */
209 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
210 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
211 /*
212 * This delay caused by an i.MXL hardware bug.
213 * If no (or too short) delay, no "STOP" bit will be generated.
214 */
215 udelay(disable_delay);
216 /* Disable I2C controller */
217 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
218}
219
220static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
221 unsigned int rate)
222{
223 unsigned int i2c_clk_rate;
224 unsigned int div;
225 int i;
226
227 /* Divider value calculation */
228 i2c_clk_rate = clk_get_rate(i2c_imx->clk);
229 div = (i2c_clk_rate + rate - 1) / rate;
230 if (div < i2c_clk_div[0][0])
231 i = 0;
232 else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
233 i = ARRAY_SIZE(i2c_clk_div) - 1;
234 else
235 for (i = 0; i2c_clk_div[i][0] < div; i++);
236
237 /* Write divider value to register */
238 writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR);
239
240 /*
241 * There dummy delay is calculated.
242 * It should be about one I2C clock period long.
243 * This delay is used in I2C bus disable function
244 * to fix chip hardware bug.
245 */
246 disable_delay = (500000U * i2c_clk_div[i][0]
247 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
248
249 /* dev_dbg() can't be used, because adapter is not yet registered */
250#ifdef CONFIG_I2C_DEBUG_BUS
251 printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n",
252 __func__, i2c_clk_rate, div);
253 printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
254 __func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
255#endif
256}
257
258static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
259{
260 struct imx_i2c_struct *i2c_imx = dev_id;
261 unsigned int temp;
262
263 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
264 if (temp & I2SR_IIF) {
265 /* save status register */
266 i2c_imx->i2csr = temp;
267 temp &= ~I2SR_IIF;
268 writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
269 wake_up_interruptible(&i2c_imx->queue);
270 return IRQ_HANDLED;
271 }
272
273 return IRQ_NONE;
274}
275
276static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
277{
278 int i, result;
279
280 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
281 __func__, msgs->addr << 1);
282
283 /* write slave address */
284 writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
285 result = i2c_imx_trx_complete(i2c_imx);
286 if (result)
287 return result;
288 result = i2c_imx_acked(i2c_imx);
289 if (result)
290 return result;
291 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);
292
293 /* write data */
294 for (i = 0; i < msgs->len; i++) {
295 dev_dbg(&i2c_imx->adapter.dev,
296 "<%s> write byte: B%d=0x%X\n",
297 __func__, i, msgs->buf[i]);
298 writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
299 result = i2c_imx_trx_complete(i2c_imx);
300 if (result)
301 return result;
302 result = i2c_imx_acked(i2c_imx);
303 if (result)
304 return result;
305 }
306 return 0;
307}
308
309static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
310{
311 int i, result;
312 unsigned int temp;
313
314 dev_dbg(&i2c_imx->adapter.dev,
315 "<%s> write slave address: addr=0x%x\n",
316 __func__, (msgs->addr << 1) | 0x01);
317
318 /* write slave address */
319 writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR);
320 result = i2c_imx_trx_complete(i2c_imx);
321 if (result)
322 return result;
323 result = i2c_imx_acked(i2c_imx);
324 if (result)
325 return result;
326
327 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
328
329 /* setup bus to read data */
330 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
331 temp &= ~I2CR_MTX;
332 if (msgs->len - 1)
333 temp &= ~I2CR_TXAK;
334 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
335 readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */
336
337 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
338
339 /* read data */
340 for (i = 0; i < msgs->len; i++) {
341 result = i2c_imx_trx_complete(i2c_imx);
342 if (result)
343 return result;
344 if (i == (msgs->len - 1)) {
345 dev_dbg(&i2c_imx->adapter.dev,
346 "<%s> clear MSTA\n", __func__);
347 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
348 temp &= ~I2CR_MSTA;
349 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
350 } else if (i == (msgs->len - 2)) {
351 dev_dbg(&i2c_imx->adapter.dev,
352 "<%s> set TXAK\n", __func__);
353 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
354 temp |= I2CR_TXAK;
355 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
356 }
357 msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
358 dev_dbg(&i2c_imx->adapter.dev,
359 "<%s> read byte: B%d=0x%X\n",
360 __func__, i, msgs->buf[i]);
361 }
362 return 0;
363}
364
365static int i2c_imx_xfer(struct i2c_adapter *adapter,
366 struct i2c_msg *msgs, int num)
367{
368 unsigned int i, temp;
369 int result;
370 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
371
372 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
373
374 /* Check if i2c bus is not busy */
375 result = i2c_imx_bus_busy(i2c_imx);
376 if (result)
377 goto fail0;
378
379 /* Start I2C transfer */
380 i2c_imx_start(i2c_imx);
381
382 /* read/write data */
383 for (i = 0; i < num; i++) {
384 if (i) {
385 dev_dbg(&i2c_imx->adapter.dev,
386 "<%s> repeated start\n", __func__);
387 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
388 temp |= I2CR_RSTA;
389 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
390 }
391 dev_dbg(&i2c_imx->adapter.dev,
392 "<%s> transfer message: %d\n", __func__, i);
393 /* write/read data */
394#ifdef CONFIG_I2C_DEBUG_BUS
395 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
396 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
397 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
398 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
399 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
400 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
401 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
402 dev_dbg(&i2c_imx->adapter.dev,
403 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
404 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
405 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
406 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
407 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
408 (temp & I2SR_RXAK ? 1 : 0));
409#endif
410 if (msgs[i].flags & I2C_M_RD)
411 result = i2c_imx_read(i2c_imx, &msgs[i]);
412 else
413 result = i2c_imx_write(i2c_imx, &msgs[i]);
414 }
415
416fail0:
417 /* Stop I2C transfer */
418 i2c_imx_stop(i2c_imx);
419
420 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
421 (result < 0) ? "error" : "success msg",
422 (result < 0) ? result : num);
423 return (result < 0) ? result : num;
424}
425
426static u32 i2c_imx_func(struct i2c_adapter *adapter)
427{
428 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
429}
430
431static struct i2c_algorithm i2c_imx_algo = {
432 .master_xfer = i2c_imx_xfer,
433 .functionality = i2c_imx_func,
434};
435
436static int __init i2c_imx_probe(struct platform_device *pdev)
437{
438 struct imx_i2c_struct *i2c_imx;
439 struct resource *res;
440 struct imxi2c_platform_data *pdata;
441 void __iomem *base;
442 resource_size_t res_size;
443 int irq;
444 int ret;
445
446 dev_dbg(&pdev->dev, "<%s>\n", __func__);
447
448 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
449 if (!res) {
450 dev_err(&pdev->dev, "can't get device resources\n");
451 return -ENOENT;
452 }
453 irq = platform_get_irq(pdev, 0);
454 if (irq < 0) {
455 dev_err(&pdev->dev, "can't get irq number\n");
456 return -ENOENT;
457 }
458
459 pdata = pdev->dev.platform_data;
460
461 if (pdata && pdata->init) {
462 ret = pdata->init(&pdev->dev);
463 if (ret)
464 return ret;
465 }
466
467 res_size = resource_size(res);
468 base = ioremap(res->start, res_size);
469 if (!base) {
470 dev_err(&pdev->dev, "ioremap failed\n");
471 ret = -EIO;
472 goto fail0;
473 }
474
475 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
476 if (!i2c_imx) {
477 dev_err(&pdev->dev, "can't allocate interface\n");
478 ret = -ENOMEM;
479 goto fail1;
480 }
481
482 /* Setup i2c_imx driver structure */
483 strcpy(i2c_imx->adapter.name, pdev->name);
484 i2c_imx->adapter.owner = THIS_MODULE;
485 i2c_imx->adapter.algo = &i2c_imx_algo;
486 i2c_imx->adapter.dev.parent = &pdev->dev;
487 i2c_imx->adapter.nr = pdev->id;
488 i2c_imx->irq = irq;
489 i2c_imx->base = base;
490 i2c_imx->res = res;
491
492 /* Get I2C clock */
493 i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk");
494 if (IS_ERR(i2c_imx->clk)) {
495 ret = PTR_ERR(i2c_imx->clk);
496 dev_err(&pdev->dev, "can't get I2C clock\n");
497 goto fail2;
498 }
499 clk_enable(i2c_imx->clk);
500
501 /* Request IRQ */
502 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
503 if (ret) {
504 dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq);
505 goto fail3;
506 }
507
508 /* Init queue */
509 init_waitqueue_head(&i2c_imx->queue);
510
511 /* Set up adapter data */
512 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
513
514 /* Set up clock divider */
515 if (pdata && pdata->bitrate)
516 i2c_imx_set_clk(i2c_imx, pdata->bitrate);
517 else
518 i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE);
519
520 /* Set up chip registers to defaults */
521 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
522 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
523
524 /* Add I2C adapter */
525 ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
526 if (ret < 0) {
527 dev_err(&pdev->dev, "registration failed\n");
528 goto fail4;
529 }
530
531 /* Set up platform driver data */
532 platform_set_drvdata(pdev, i2c_imx);
533
534 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq);
535 dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
536 i2c_imx->res->start, i2c_imx->res->end);
537 dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n",
538 res_size, i2c_imx->res->start);
539 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
540 i2c_imx->adapter.name);
541 dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
542
543 return 0; /* Return OK */
544
545fail4:
546 free_irq(i2c_imx->irq, i2c_imx);
547fail3:
548 clk_disable(i2c_imx->clk);
549 clk_put(i2c_imx->clk);
550fail2:
551 kfree(i2c_imx);
552fail1:
553 iounmap(base);
554fail0:
555 if (pdata && pdata->exit)
556 pdata->exit(&pdev->dev);
557 return ret; /* Return error number */
558}
559
560static int __exit i2c_imx_remove(struct platform_device *pdev)
561{
562 struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
563 struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
564
565 /* remove adapter */
566 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
567 i2c_del_adapter(&i2c_imx->adapter);
568 platform_set_drvdata(pdev, NULL);
569
570 /* free interrupt */
571 free_irq(i2c_imx->irq, i2c_imx);
572
573 /* setup chip registers to defaults */
574 writeb(0, i2c_imx->base + IMX_I2C_IADR);
575 writeb(0, i2c_imx->base + IMX_I2C_IFDR);
576 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
577 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
578
579 /* Shut down hardware */
580 if (pdata && pdata->exit)
581 pdata->exit(&pdev->dev);
582
583 /* Disable I2C clock */
584 clk_disable(i2c_imx->clk);
585 clk_put(i2c_imx->clk);
586
587 iounmap(i2c_imx->base);
588 kfree(i2c_imx);
589 return 0;
590}
591
592static struct platform_driver i2c_imx_driver = {
593 .probe = i2c_imx_probe,
594 .remove = __exit_p(i2c_imx_remove),
595 .driver = {
596 .name = DRIVER_NAME,
597 .owner = THIS_MODULE,
598 }
599};
600
601static int __init i2c_adap_imx_init(void)
602{
603 return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
604}
605
606static void __exit i2c_adap_imx_exit(void)
607{
608 platform_driver_unregister(&i2c_imx_driver);
609}
610
611module_init(i2c_adap_imx_init);
612module_exit(i2c_adap_imx_exit);
613
614MODULE_LICENSE("GPL");
615MODULE_AUTHOR("Darius Augulis");
616MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
617MODULE_ALIAS("platform:" DRIVER_NAME);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 09:18:41 -0500