diff options
89 files changed, 602 insertions, 8136 deletions
diff --git a/Documentation/ABI/testing/sysfs-class-mtd b/Documentation/ABI/testing/sysfs-class-mtd index 938ef71e2035..3105644b3bfc 100644 --- a/Documentation/ABI/testing/sysfs-class-mtd +++ b/Documentation/ABI/testing/sysfs-class-mtd | |||
@@ -14,8 +14,7 @@ Description: | |||
14 | The /sys/class/mtd/mtd{0,1,2,3,...} directories correspond | 14 | The /sys/class/mtd/mtd{0,1,2,3,...} directories correspond |
15 | to each /dev/mtdX character device. These may represent | 15 | to each /dev/mtdX character device. These may represent |
16 | physical/simulated flash devices, partitions on a flash | 16 | physical/simulated flash devices, partitions on a flash |
17 | device, or concatenated flash devices. They exist regardless | 17 | device, or concatenated flash devices. |
18 | of whether CONFIG_MTD_CHAR is actually enabled. | ||
19 | 18 | ||
20 | What: /sys/class/mtd/mtdXro/ | 19 | What: /sys/class/mtd/mtdXro/ |
21 | Date: April 2009 | 20 | Date: April 2009 |
@@ -23,8 +22,7 @@ KernelVersion: 2.6.29 | |||
23 | Contact: linux-mtd@lists.infradead.org | 22 | Contact: linux-mtd@lists.infradead.org |
24 | Description: | 23 | Description: |
25 | These directories provide the corresponding read-only device | 24 | These directories provide the corresponding read-only device |
26 | nodes for /sys/class/mtd/mtdX/ . They are only created | 25 | nodes for /sys/class/mtd/mtdX/ . |
27 | (for the benefit of udev) if CONFIG_MTD_CHAR is enabled. | ||
28 | 26 | ||
29 | What: /sys/class/mtd/mtdX/dev | 27 | What: /sys/class/mtd/mtdX/dev |
30 | Date: April 2009 | 28 | Date: April 2009 |
diff --git a/Documentation/devicetree/bindings/mtd/partition.txt b/Documentation/devicetree/bindings/mtd/partition.txt index 6e1f61f1e789..9315ac96b49b 100644 --- a/Documentation/devicetree/bindings/mtd/partition.txt +++ b/Documentation/devicetree/bindings/mtd/partition.txt | |||
@@ -5,8 +5,12 @@ on platforms which have strong conventions about which portions of a flash are | |||
5 | used for what purposes, but which don't use an on-flash partition table such | 5 | used for what purposes, but which don't use an on-flash partition table such |
6 | as RedBoot. | 6 | as RedBoot. |
7 | 7 | ||
8 | #address-cells & #size-cells must both be present in the mtd device and be | 8 | #address-cells & #size-cells must both be present in the mtd device. There are |
9 | equal to 1. | 9 | two valid values for both: |
10 | <1>: for partitions that require a single 32-bit cell to represent their | ||
11 | size/address (aka the value is below 4 GiB) | ||
12 | <2>: for partitions that require two 32-bit cells to represent their | ||
13 | size/address (aka the value is 4 GiB or greater). | ||
10 | 14 | ||
11 | Required properties: | 15 | Required properties: |
12 | - reg : The partition's offset and size within the mtd bank. | 16 | - reg : The partition's offset and size within the mtd bank. |
@@ -36,3 +40,31 @@ flash@0 { | |||
36 | reg = <0x0100000 0x200000>; | 40 | reg = <0x0100000 0x200000>; |
37 | }; | 41 | }; |
38 | }; | 42 | }; |
43 | |||
44 | flash@1 { | ||
45 | #address-cells = <1>; | ||
46 | #size-cells = <2>; | ||
47 | |||
48 | /* a 4 GiB partition */ | ||
49 | partition@0 { | ||
50 | label = "filesystem"; | ||
51 | reg = <0x00000000 0x1 0x00000000>; | ||
52 | }; | ||
53 | }; | ||
54 | |||
55 | flash@2 { | ||
56 | #address-cells = <2>; | ||
57 | #size-cells = <2>; | ||
58 | |||
59 | /* an 8 GiB partition */ | ||
60 | partition@0 { | ||
61 | label = "filesystem #1"; | ||
62 | reg = <0x0 0x00000000 0x2 0x00000000>; | ||
63 | }; | ||
64 | |||
65 | /* a 4 GiB partition */ | ||
66 | partition@200000000 { | ||
67 | label = "filesystem #2"; | ||
68 | reg = <0x2 0x00000000 0x1 0x00000000>; | ||
69 | }; | ||
70 | }; | ||
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 9075461999c1..96100dbf5a2e 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -162,7 +162,6 @@ config MACH_XCEP | |||
162 | select MTD | 162 | select MTD |
163 | select MTD_CFI | 163 | select MTD_CFI |
164 | select MTD_CFI_INTELEXT | 164 | select MTD_CFI_INTELEXT |
165 | select MTD_CHAR | ||
166 | select MTD_PHYSMAP | 165 | select MTD_PHYSMAP |
167 | select PXA25x | 166 | select PXA25x |
168 | select SMC91X | 167 | select SMC91X |
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index 06dd026533e3..8769a9045a54 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig | |||
@@ -264,7 +264,6 @@ config ETRAX_AXISFLASHMAP | |||
264 | select MTD_CFI | 264 | select MTD_CFI |
265 | select MTD_CFI_AMDSTD | 265 | select MTD_CFI_AMDSTD |
266 | select MTD_JEDECPROBE if ETRAX_ARCH_V32 | 266 | select MTD_JEDECPROBE if ETRAX_ARCH_V32 |
267 | select MTD_CHAR | ||
268 | select MTD_BLOCK | 267 | select MTD_BLOCK |
269 | select MTD_COMPLEX_MAPPINGS | 268 | select MTD_COMPLEX_MAPPINGS |
270 | help | 269 | help |
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig index af4a486dadcd..c55971a40c34 100644 --- a/arch/cris/arch-v32/drivers/Kconfig +++ b/arch/cris/arch-v32/drivers/Kconfig | |||
@@ -404,7 +404,6 @@ config ETRAX_AXISFLASHMAP | |||
404 | select MTD_CFI | 404 | select MTD_CFI |
405 | select MTD_CFI_AMDSTD | 405 | select MTD_CFI_AMDSTD |
406 | select MTD_JEDECPROBE | 406 | select MTD_JEDECPROBE |
407 | select MTD_CHAR | ||
408 | select MTD_BLOCK | 407 | select MTD_BLOCK |
409 | select MTD_COMPLEX_MAPPINGS | 408 | select MTD_COMPLEX_MAPPINGS |
410 | help | 409 | help |
diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c index 9a7f0e3ab5a3..11115bbe115c 100644 --- a/drivers/bcma/driver_mips.c +++ b/drivers/bcma/driver_mips.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/serial_reg.h> | 21 | #include <linux/serial_reg.h> |
22 | #include <linux/time.h> | 22 | #include <linux/time.h> |
23 | 23 | ||
24 | static const char *part_probes[] = { "bcm47xxpart", NULL }; | 24 | static const char * const part_probes[] = { "bcm47xxpart", NULL }; |
25 | 25 | ||
26 | static struct physmap_flash_data bcma_pflash_data = { | 26 | static struct physmap_flash_data bcma_pflash_data = { |
27 | .part_probe_types = part_probes, | 27 | .part_probe_types = part_probes, |
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 557bec599f4f..5fab4e6e8301 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig | |||
@@ -157,19 +157,6 @@ config MTD_BCM47XX_PARTS | |||
157 | 157 | ||
158 | comment "User Modules And Translation Layers" | 158 | comment "User Modules And Translation Layers" |
159 | 159 | ||
160 | config MTD_CHAR | ||
161 | tristate "Direct char device access to MTD devices" | ||
162 | help | ||
163 | This provides a character device for each MTD device present in | ||
164 | the system, allowing the user to read and write directly to the | ||
165 | memory chips, and also use ioctl() to obtain information about | ||
166 | the device, or to erase parts of it. | ||
167 | |||
168 | config HAVE_MTD_OTP | ||
169 | bool | ||
170 | help | ||
171 | Enable access to OTP regions using MTD_CHAR. | ||
172 | |||
173 | config MTD_BLKDEVS | 160 | config MTD_BLKDEVS |
174 | tristate "Common interface to block layer for MTD 'translation layers'" | 161 | tristate "Common interface to block layer for MTD 'translation layers'" |
175 | depends on BLOCK | 162 | depends on BLOCK |
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 18a38e55b2f0..4cfb31e6c966 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Core functionality. | 5 | # Core functionality. |
6 | obj-$(CONFIG_MTD) += mtd.o | 6 | obj-$(CONFIG_MTD) += mtd.o |
7 | mtd-y := mtdcore.o mtdsuper.o mtdconcat.o mtdpart.o | 7 | mtd-y := mtdcore.o mtdsuper.o mtdconcat.o mtdpart.o mtdchar.o |
8 | 8 | ||
9 | obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o | 9 | obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o |
10 | obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o | 10 | obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o |
@@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o | |||
15 | obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o | 15 | obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o |
16 | 16 | ||
17 | # 'Users' - code which presents functionality to userspace. | 17 | # 'Users' - code which presents functionality to userspace. |
18 | obj-$(CONFIG_MTD_CHAR) += mtdchar.o | ||
19 | obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o | 18 | obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o |
20 | obj-$(CONFIG_MTD_BLOCK) += mtdblock.o | 19 | obj-$(CONFIG_MTD_BLOCK) += mtdblock.o |
21 | obj-$(CONFIG_MTD_BLOCK_RO) += mtdblock_ro.o | 20 | obj-$(CONFIG_MTD_BLOCK_RO) += mtdblock_ro.o |
diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig index c219e3d098d9..e4696b37f3de 100644 --- a/drivers/mtd/chips/Kconfig +++ b/drivers/mtd/chips/Kconfig | |||
@@ -146,7 +146,6 @@ config MTD_CFI_I8 | |||
146 | config MTD_OTP | 146 | config MTD_OTP |
147 | bool "Protection Registers aka one-time programmable (OTP) bits" | 147 | bool "Protection Registers aka one-time programmable (OTP) bits" |
148 | depends on MTD_CFI_ADV_OPTIONS | 148 | depends on MTD_CFI_ADV_OPTIONS |
149 | select HAVE_MTD_OTP | ||
150 | default n | 149 | default n |
151 | help | 150 | help |
152 | This enables support for reading, writing and locking so called | 151 | This enables support for reading, writing and locking so called |
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig index 12311f506ca1..2a4d55e4b362 100644 --- a/drivers/mtd/devices/Kconfig +++ b/drivers/mtd/devices/Kconfig | |||
@@ -71,7 +71,6 @@ config MTD_DATAFLASH_WRITE_VERIFY | |||
71 | config MTD_DATAFLASH_OTP | 71 | config MTD_DATAFLASH_OTP |
72 | bool "DataFlash OTP support (Security Register)" | 72 | bool "DataFlash OTP support (Security Register)" |
73 | depends on MTD_DATAFLASH | 73 | depends on MTD_DATAFLASH |
74 | select HAVE_MTD_OTP | ||
75 | help | 74 | help |
76 | Newer DataFlash chips (revisions C and D) support 128 bytes of | 75 | Newer DataFlash chips (revisions C and D) support 128 bytes of |
77 | one-time-programmable (OTP) data. The first half may be written | 76 | one-time-programmable (OTP) data. The first half may be written |
@@ -205,69 +204,6 @@ config MTD_BLOCK2MTD | |||
205 | 204 | ||
206 | comment "Disk-On-Chip Device Drivers" | 205 | comment "Disk-On-Chip Device Drivers" |
207 | 206 | ||
208 | config MTD_DOC2000 | ||
209 | tristate "M-Systems Disk-On-Chip 2000 and Millennium (DEPRECATED)" | ||
210 | depends on MTD_NAND | ||
211 | select MTD_DOCPROBE | ||
212 | select MTD_NAND_IDS | ||
213 | ---help--- | ||
214 | This provides an MTD device driver for the M-Systems DiskOnChip | ||
215 | 2000 and Millennium devices. Originally designed for the DiskOnChip | ||
216 | 2000, it also now includes support for the DiskOnChip Millennium. | ||
217 | If you have problems with this driver and the DiskOnChip Millennium, | ||
218 | you may wish to try the alternative Millennium driver below. To use | ||
219 | the alternative driver, you will need to undefine DOC_SINGLE_DRIVER | ||
220 | in the <file:drivers/mtd/devices/docprobe.c> source code. | ||
221 | |||
222 | If you use this device, you probably also want to enable the NFTL | ||
223 | 'NAND Flash Translation Layer' option below, which is used to | ||
224 | emulate a block device by using a kind of file system on the flash | ||
225 | chips. | ||
226 | |||
227 | NOTE: This driver is deprecated and will probably be removed soon. | ||
228 | Please try the new DiskOnChip driver under "NAND Flash Device | ||
229 | Drivers". | ||
230 | |||
231 | config MTD_DOC2001 | ||
232 | tristate "M-Systems Disk-On-Chip Millennium-only alternative driver (DEPRECATED)" | ||
233 | depends on MTD_NAND | ||
234 | select MTD_DOCPROBE | ||
235 | select MTD_NAND_IDS | ||
236 | ---help--- | ||
237 | This provides an alternative MTD device driver for the M-Systems | ||
238 | DiskOnChip Millennium devices. Use this if you have problems with | ||
239 | the combined DiskOnChip 2000 and Millennium driver above. To get | ||
240 | the DiskOnChip probe code to load and use this driver instead of | ||
241 | the other one, you will need to undefine DOC_SINGLE_DRIVER near | ||
242 | the beginning of <file:drivers/mtd/devices/docprobe.c>. | ||
243 | |||
244 | If you use this device, you probably also want to enable the NFTL | ||
245 | 'NAND Flash Translation Layer' option below, which is used to | ||
246 | emulate a block device by using a kind of file system on the flash | ||
247 | chips. | ||
248 | |||
249 | NOTE: This driver is deprecated and will probably be removed soon. | ||
250 | Please try the new DiskOnChip driver under "NAND Flash Device | ||
251 | Drivers". | ||
252 | |||
253 | config MTD_DOC2001PLUS | ||
254 | tristate "M-Systems Disk-On-Chip Millennium Plus" | ||
255 | depends on MTD_NAND | ||
256 | select MTD_DOCPROBE | ||
257 | select MTD_NAND_IDS | ||
258 | ---help--- | ||
259 | This provides an MTD device driver for the M-Systems DiskOnChip | ||
260 | Millennium Plus devices. | ||
261 | |||
262 | If you use this device, you probably also want to enable the INFTL | ||
263 | 'Inverse NAND Flash Translation Layer' option below, which is used | ||
264 | to emulate a block device by using a kind of file system on the | ||
265 | flash chips. | ||
266 | |||
267 | NOTE: This driver will soon be replaced by the new DiskOnChip driver | ||
268 | under "NAND Flash Device Drivers" (currently that driver does not | ||
269 | support all Millennium Plus devices). | ||
270 | |||
271 | config MTD_DOCG3 | 207 | config MTD_DOCG3 |
272 | tristate "M-Systems Disk-On-Chip G3" | 208 | tristate "M-Systems Disk-On-Chip G3" |
273 | select BCH | 209 | select BCH |
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile index 369a1943ca25..d83bd73096f6 100644 --- a/drivers/mtd/devices/Makefile +++ b/drivers/mtd/devices/Makefile | |||
@@ -2,12 +2,7 @@ | |||
2 | # linux/drivers/mtd/devices/Makefile | 2 | # linux/drivers/mtd/devices/Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_MTD_DOC2000) += doc2000.o | ||
6 | obj-$(CONFIG_MTD_DOC2001) += doc2001.o | ||
7 | obj-$(CONFIG_MTD_DOC2001PLUS) += doc2001plus.o | ||
8 | obj-$(CONFIG_MTD_DOCG3) += docg3.o | 5 | obj-$(CONFIG_MTD_DOCG3) += docg3.o |
9 | obj-$(CONFIG_MTD_DOCPROBE) += docprobe.o | ||
10 | obj-$(CONFIG_MTD_DOCECC) += docecc.o | ||
11 | obj-$(CONFIG_MTD_SLRAM) += slram.o | 6 | obj-$(CONFIG_MTD_SLRAM) += slram.o |
12 | obj-$(CONFIG_MTD_PHRAM) += phram.o | 7 | obj-$(CONFIG_MTD_PHRAM) += phram.o |
13 | obj-$(CONFIG_MTD_PMC551) += pmc551.o | 8 | obj-$(CONFIG_MTD_PMC551) += pmc551.o |
diff --git a/drivers/mtd/devices/bcm47xxsflash.c b/drivers/mtd/devices/bcm47xxsflash.c index 95266285acb1..18e7761137a3 100644 --- a/drivers/mtd/devices/bcm47xxsflash.c +++ b/drivers/mtd/devices/bcm47xxsflash.c | |||
@@ -10,7 +10,7 @@ | |||
10 | MODULE_LICENSE("GPL"); | 10 | MODULE_LICENSE("GPL"); |
11 | MODULE_DESCRIPTION("Serial flash driver for BCMA bus"); | 11 | MODULE_DESCRIPTION("Serial flash driver for BCMA bus"); |
12 | 12 | ||
13 | static const char *probes[] = { "bcm47xxpart", NULL }; | 13 | static const char * const probes[] = { "bcm47xxpart", NULL }; |
14 | 14 | ||
15 | static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len, | 15 | static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len, |
16 | size_t *retlen, u_char *buf) | 16 | size_t *retlen, u_char *buf) |
@@ -61,6 +61,17 @@ static int bcm47xxsflash_bcma_probe(struct platform_device *pdev) | |||
61 | } | 61 | } |
62 | sflash->priv = b47s; | 62 | sflash->priv = b47s; |
63 | 63 | ||
64 | b47s->bcma_cc = container_of(sflash, struct bcma_drv_cc, sflash); | ||
65 | |||
66 | switch (b47s->bcma_cc->capabilities & BCMA_CC_CAP_FLASHT) { | ||
67 | case BCMA_CC_FLASHT_STSER: | ||
68 | b47s->type = BCM47XXSFLASH_TYPE_ST; | ||
69 | break; | ||
70 | case BCMA_CC_FLASHT_ATSER: | ||
71 | b47s->type = BCM47XXSFLASH_TYPE_ATMEL; | ||
72 | break; | ||
73 | } | ||
74 | |||
64 | b47s->window = sflash->window; | 75 | b47s->window = sflash->window; |
65 | b47s->blocksize = sflash->blocksize; | 76 | b47s->blocksize = sflash->blocksize; |
66 | b47s->numblocks = sflash->numblocks; | 77 | b47s->numblocks = sflash->numblocks; |
diff --git a/drivers/mtd/devices/bcm47xxsflash.h b/drivers/mtd/devices/bcm47xxsflash.h index ebf6f710e23c..f22f8c46dfc0 100644 --- a/drivers/mtd/devices/bcm47xxsflash.h +++ b/drivers/mtd/devices/bcm47xxsflash.h | |||
@@ -3,7 +3,66 @@ | |||
3 | 3 | ||
4 | #include <linux/mtd/mtd.h> | 4 | #include <linux/mtd/mtd.h> |
5 | 5 | ||
6 | /* Used for ST flashes only. */ | ||
7 | #define OPCODE_ST_WREN 0x0006 /* Write Enable */ | ||
8 | #define OPCODE_ST_WRDIS 0x0004 /* Write Disable */ | ||
9 | #define OPCODE_ST_RDSR 0x0105 /* Read Status Register */ | ||
10 | #define OPCODE_ST_WRSR 0x0101 /* Write Status Register */ | ||
11 | #define OPCODE_ST_READ 0x0303 /* Read Data Bytes */ | ||
12 | #define OPCODE_ST_PP 0x0302 /* Page Program */ | ||
13 | #define OPCODE_ST_SE 0x02d8 /* Sector Erase */ | ||
14 | #define OPCODE_ST_BE 0x00c7 /* Bulk Erase */ | ||
15 | #define OPCODE_ST_DP 0x00b9 /* Deep Power-down */ | ||
16 | #define OPCODE_ST_RES 0x03ab /* Read Electronic Signature */ | ||
17 | #define OPCODE_ST_CSA 0x1000 /* Keep chip select asserted */ | ||
18 | #define OPCODE_ST_SSE 0x0220 /* Sub-sector Erase */ | ||
19 | |||
20 | /* Used for Atmel flashes only. */ | ||
21 | #define OPCODE_AT_READ 0x07e8 | ||
22 | #define OPCODE_AT_PAGE_READ 0x07d2 | ||
23 | #define OPCODE_AT_STATUS 0x01d7 | ||
24 | #define OPCODE_AT_BUF1_WRITE 0x0384 | ||
25 | #define OPCODE_AT_BUF2_WRITE 0x0387 | ||
26 | #define OPCODE_AT_BUF1_ERASE_PROGRAM 0x0283 | ||
27 | #define OPCODE_AT_BUF2_ERASE_PROGRAM 0x0286 | ||
28 | #define OPCODE_AT_BUF1_PROGRAM 0x0288 | ||
29 | #define OPCODE_AT_BUF2_PROGRAM 0x0289 | ||
30 | #define OPCODE_AT_PAGE_ERASE 0x0281 | ||
31 | #define OPCODE_AT_BLOCK_ERASE 0x0250 | ||
32 | #define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 | ||
33 | #define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 | ||
34 | #define OPCODE_AT_BUF1_LOAD 0x0253 | ||
35 | #define OPCODE_AT_BUF2_LOAD 0x0255 | ||
36 | #define OPCODE_AT_BUF1_COMPARE 0x0260 | ||
37 | #define OPCODE_AT_BUF2_COMPARE 0x0261 | ||
38 | #define OPCODE_AT_BUF1_REPROGRAM 0x0258 | ||
39 | #define OPCODE_AT_BUF2_REPROGRAM 0x0259 | ||
40 | |||
41 | /* Status register bits for ST flashes */ | ||
42 | #define SR_ST_WIP 0x01 /* Write In Progress */ | ||
43 | #define SR_ST_WEL 0x02 /* Write Enable Latch */ | ||
44 | #define SR_ST_BP_MASK 0x1c /* Block Protect */ | ||
45 | #define SR_ST_BP_SHIFT 2 | ||
46 | #define SR_ST_SRWD 0x80 /* Status Register Write Disable */ | ||
47 | |||
48 | /* Status register bits for Atmel flashes */ | ||
49 | #define SR_AT_READY 0x80 | ||
50 | #define SR_AT_MISMATCH 0x40 | ||
51 | #define SR_AT_ID_MASK 0x38 | ||
52 | #define SR_AT_ID_SHIFT 3 | ||
53 | |||
54 | struct bcma_drv_cc; | ||
55 | |||
56 | enum bcm47xxsflash_type { | ||
57 | BCM47XXSFLASH_TYPE_ATMEL, | ||
58 | BCM47XXSFLASH_TYPE_ST, | ||
59 | }; | ||
60 | |||
6 | struct bcm47xxsflash { | 61 | struct bcm47xxsflash { |
62 | struct bcma_drv_cc *bcma_cc; | ||
63 | |||
64 | enum bcm47xxsflash_type type; | ||
65 | |||
7 | u32 window; | 66 | u32 window; |
8 | u32 blocksize; | 67 | u32 blocksize; |
9 | u16 numblocks; | 68 | u16 numblocks; |
diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c deleted file mode 100644 index a4eb8b5b85ec..000000000000 --- a/drivers/mtd/devices/doc2000.c +++ /dev/null | |||
@@ -1,1178 +0,0 @@ | |||
1 | |||
2 | /* | ||
3 | * Linux driver for Disk-On-Chip 2000 and Millennium | ||
4 | * (c) 1999 Machine Vision Holdings, Inc. | ||
5 | * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org> | ||
6 | */ | ||
7 | |||
8 | #include <linux/kernel.h> | ||
9 | #include <linux/module.h> | ||
10 | #include <asm/errno.h> | ||
11 | #include <asm/io.h> | ||
12 | #include <asm/uaccess.h> | ||
13 | #include <linux/delay.h> | ||
14 | #include <linux/slab.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/bitops.h> | ||
19 | #include <linux/mutex.h> | ||
20 | |||
21 | #include <linux/mtd/mtd.h> | ||
22 | #include <linux/mtd/nand.h> | ||
23 | #include <linux/mtd/doc2000.h> | ||
24 | |||
25 | #define DOC_SUPPORT_2000 | ||
26 | #define DOC_SUPPORT_2000TSOP | ||
27 | #define DOC_SUPPORT_MILLENNIUM | ||
28 | |||
29 | #ifdef DOC_SUPPORT_2000 | ||
30 | #define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k) | ||
31 | #else | ||
32 | #define DoC_is_2000(doc) (0) | ||
33 | #endif | ||
34 | |||
35 | #if defined(DOC_SUPPORT_2000TSOP) || defined(DOC_SUPPORT_MILLENNIUM) | ||
36 | #define DoC_is_Millennium(doc) (doc->ChipID == DOC_ChipID_DocMil) | ||
37 | #else | ||
38 | #define DoC_is_Millennium(doc) (0) | ||
39 | #endif | ||
40 | |||
41 | /* #define ECC_DEBUG */ | ||
42 | |||
43 | /* I have no idea why some DoC chips can not use memcpy_from|to_io(). | ||
44 | * This may be due to the different revisions of the ASIC controller built-in or | ||
45 | * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment | ||
46 | * this: | ||
47 | #undef USE_MEMCPY | ||
48 | */ | ||
49 | |||
50 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
51 | size_t *retlen, u_char *buf); | ||
52 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
53 | size_t *retlen, const u_char *buf); | ||
54 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
55 | struct mtd_oob_ops *ops); | ||
56 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
57 | struct mtd_oob_ops *ops); | ||
58 | static int doc_write_oob_nolock(struct mtd_info *mtd, loff_t ofs, size_t len, | ||
59 | size_t *retlen, const u_char *buf); | ||
60 | static int doc_erase (struct mtd_info *mtd, struct erase_info *instr); | ||
61 | |||
62 | static struct mtd_info *doc2klist = NULL; | ||
63 | |||
64 | /* Perform the required delay cycles by reading from the appropriate register */ | ||
65 | static void DoC_Delay(struct DiskOnChip *doc, unsigned short cycles) | ||
66 | { | ||
67 | volatile char dummy; | ||
68 | int i; | ||
69 | |||
70 | for (i = 0; i < cycles; i++) { | ||
71 | if (DoC_is_Millennium(doc)) | ||
72 | dummy = ReadDOC(doc->virtadr, NOP); | ||
73 | else | ||
74 | dummy = ReadDOC(doc->virtadr, DOCStatus); | ||
75 | } | ||
76 | |||
77 | } | ||
78 | |||
79 | /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */ | ||
80 | static int _DoC_WaitReady(struct DiskOnChip *doc) | ||
81 | { | ||
82 | void __iomem *docptr = doc->virtadr; | ||
83 | unsigned long timeo = jiffies + (HZ * 10); | ||
84 | |||
85 | pr_debug("_DoC_WaitReady called for out-of-line wait\n"); | ||
86 | |||
87 | /* Out-of-line routine to wait for chip response */ | ||
88 | while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) { | ||
89 | /* issue 2 read from NOP register after reading from CDSNControl register | ||
90 | see Software Requirement 11.4 item 2. */ | ||
91 | DoC_Delay(doc, 2); | ||
92 | |||
93 | if (time_after(jiffies, timeo)) { | ||
94 | pr_debug("_DoC_WaitReady timed out.\n"); | ||
95 | return -EIO; | ||
96 | } | ||
97 | udelay(1); | ||
98 | cond_resched(); | ||
99 | } | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | static inline int DoC_WaitReady(struct DiskOnChip *doc) | ||
105 | { | ||
106 | void __iomem *docptr = doc->virtadr; | ||
107 | |||
108 | /* This is inline, to optimise the common case, where it's ready instantly */ | ||
109 | int ret = 0; | ||
110 | |||
111 | /* 4 read form NOP register should be issued in prior to the read from CDSNControl | ||
112 | see Software Requirement 11.4 item 2. */ | ||
113 | DoC_Delay(doc, 4); | ||
114 | |||
115 | if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) | ||
116 | /* Call the out-of-line routine to wait */ | ||
117 | ret = _DoC_WaitReady(doc); | ||
118 | |||
119 | /* issue 2 read from NOP register after reading from CDSNControl register | ||
120 | see Software Requirement 11.4 item 2. */ | ||
121 | DoC_Delay(doc, 2); | ||
122 | |||
123 | return ret; | ||
124 | } | ||
125 | |||
126 | /* DoC_Command: Send a flash command to the flash chip through the CDSN Slow IO register to | ||
127 | bypass the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | ||
128 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | ||
129 | |||
130 | static int DoC_Command(struct DiskOnChip *doc, unsigned char command, | ||
131 | unsigned char xtraflags) | ||
132 | { | ||
133 | void __iomem *docptr = doc->virtadr; | ||
134 | |||
135 | if (DoC_is_2000(doc)) | ||
136 | xtraflags |= CDSN_CTRL_FLASH_IO; | ||
137 | |||
138 | /* Assert the CLE (Command Latch Enable) line to the flash chip */ | ||
139 | WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl); | ||
140 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
141 | |||
142 | if (DoC_is_Millennium(doc)) | ||
143 | WriteDOC(command, docptr, CDSNSlowIO); | ||
144 | |||
145 | /* Send the command */ | ||
146 | WriteDOC_(command, docptr, doc->ioreg); | ||
147 | if (DoC_is_Millennium(doc)) | ||
148 | WriteDOC(command, docptr, WritePipeTerm); | ||
149 | |||
150 | /* Lower the CLE line */ | ||
151 | WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl); | ||
152 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
153 | |||
154 | /* Wait for the chip to respond - Software requirement 11.4.1 (extended for any command) */ | ||
155 | return DoC_WaitReady(doc); | ||
156 | } | ||
157 | |||
158 | /* DoC_Address: Set the current address for the flash chip through the CDSN Slow IO register to | ||
159 | bypass the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | ||
160 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | ||
161 | |||
162 | static int DoC_Address(struct DiskOnChip *doc, int numbytes, unsigned long ofs, | ||
163 | unsigned char xtraflags1, unsigned char xtraflags2) | ||
164 | { | ||
165 | int i; | ||
166 | void __iomem *docptr = doc->virtadr; | ||
167 | |||
168 | if (DoC_is_2000(doc)) | ||
169 | xtraflags1 |= CDSN_CTRL_FLASH_IO; | ||
170 | |||
171 | /* Assert the ALE (Address Latch Enable) line to the flash chip */ | ||
172 | WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl); | ||
173 | |||
174 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
175 | |||
176 | /* Send the address */ | ||
177 | /* Devices with 256-byte page are addressed as: | ||
178 | Column (bits 0-7), Page (bits 8-15, 16-23, 24-31) | ||
179 | * there is no device on the market with page256 | ||
180 | and more than 24 bits. | ||
181 | Devices with 512-byte page are addressed as: | ||
182 | Column (bits 0-7), Page (bits 9-16, 17-24, 25-31) | ||
183 | * 25-31 is sent only if the chip support it. | ||
184 | * bit 8 changes the read command to be sent | ||
185 | (NAND_CMD_READ0 or NAND_CMD_READ1). | ||
186 | */ | ||
187 | |||
188 | if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE) { | ||
189 | if (DoC_is_Millennium(doc)) | ||
190 | WriteDOC(ofs & 0xff, docptr, CDSNSlowIO); | ||
191 | WriteDOC_(ofs & 0xff, docptr, doc->ioreg); | ||
192 | } | ||
193 | |||
194 | if (doc->page256) { | ||
195 | ofs = ofs >> 8; | ||
196 | } else { | ||
197 | ofs = ofs >> 9; | ||
198 | } | ||
199 | |||
200 | if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) { | ||
201 | for (i = 0; i < doc->pageadrlen; i++, ofs = ofs >> 8) { | ||
202 | if (DoC_is_Millennium(doc)) | ||
203 | WriteDOC(ofs & 0xff, docptr, CDSNSlowIO); | ||
204 | WriteDOC_(ofs & 0xff, docptr, doc->ioreg); | ||
205 | } | ||
206 | } | ||
207 | |||
208 | if (DoC_is_Millennium(doc)) | ||
209 | WriteDOC(ofs & 0xff, docptr, WritePipeTerm); | ||
210 | |||
211 | DoC_Delay(doc, 2); /* Needed for some slow flash chips. mf. */ | ||
212 | |||
213 | /* FIXME: The SlowIO's for millennium could be replaced by | ||
214 | a single WritePipeTerm here. mf. */ | ||
215 | |||
216 | /* Lower the ALE line */ | ||
217 | WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, | ||
218 | CDSNControl); | ||
219 | |||
220 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
221 | |||
222 | /* Wait for the chip to respond - Software requirement 11.4.1 */ | ||
223 | return DoC_WaitReady(doc); | ||
224 | } | ||
225 | |||
226 | /* Read a buffer from DoC, taking care of Millennium odditys */ | ||
227 | static void DoC_ReadBuf(struct DiskOnChip *doc, u_char * buf, int len) | ||
228 | { | ||
229 | volatile int dummy; | ||
230 | int modulus = 0xffff; | ||
231 | void __iomem *docptr = doc->virtadr; | ||
232 | int i; | ||
233 | |||
234 | if (len <= 0) | ||
235 | return; | ||
236 | |||
237 | if (DoC_is_Millennium(doc)) { | ||
238 | /* Read the data via the internal pipeline through CDSN IO register, | ||
239 | see Pipelined Read Operations 11.3 */ | ||
240 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
241 | |||
242 | /* Millennium should use the LastDataRead register - Pipeline Reads */ | ||
243 | len--; | ||
244 | |||
245 | /* This is needed for correctly ECC calculation */ | ||
246 | modulus = 0xff; | ||
247 | } | ||
248 | |||
249 | for (i = 0; i < len; i++) | ||
250 | buf[i] = ReadDOC_(docptr, doc->ioreg + (i & modulus)); | ||
251 | |||
252 | if (DoC_is_Millennium(doc)) { | ||
253 | buf[i] = ReadDOC(docptr, LastDataRead); | ||
254 | } | ||
255 | } | ||
256 | |||
257 | /* Write a buffer to DoC, taking care of Millennium odditys */ | ||
258 | static void DoC_WriteBuf(struct DiskOnChip *doc, const u_char * buf, int len) | ||
259 | { | ||
260 | void __iomem *docptr = doc->virtadr; | ||
261 | int i; | ||
262 | |||
263 | if (len <= 0) | ||
264 | return; | ||
265 | |||
266 | for (i = 0; i < len; i++) | ||
267 | WriteDOC_(buf[i], docptr, doc->ioreg + i); | ||
268 | |||
269 | if (DoC_is_Millennium(doc)) { | ||
270 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
271 | } | ||
272 | } | ||
273 | |||
274 | |||
275 | /* DoC_SelectChip: Select a given flash chip within the current floor */ | ||
276 | |||
277 | static inline int DoC_SelectChip(struct DiskOnChip *doc, int chip) | ||
278 | { | ||
279 | void __iomem *docptr = doc->virtadr; | ||
280 | |||
281 | /* Software requirement 11.4.4 before writing DeviceSelect */ | ||
282 | /* Deassert the CE line to eliminate glitches on the FCE# outputs */ | ||
283 | WriteDOC(CDSN_CTRL_WP, docptr, CDSNControl); | ||
284 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
285 | |||
286 | /* Select the individual flash chip requested */ | ||
287 | WriteDOC(chip, docptr, CDSNDeviceSelect); | ||
288 | DoC_Delay(doc, 4); | ||
289 | |||
290 | /* Reassert the CE line */ | ||
291 | WriteDOC(CDSN_CTRL_CE | CDSN_CTRL_FLASH_IO | CDSN_CTRL_WP, docptr, | ||
292 | CDSNControl); | ||
293 | DoC_Delay(doc, 4); /* Software requirement 11.4.3 for Millennium */ | ||
294 | |||
295 | /* Wait for it to be ready */ | ||
296 | return DoC_WaitReady(doc); | ||
297 | } | ||
298 | |||
299 | /* DoC_SelectFloor: Select a given floor (bank of flash chips) */ | ||
300 | |||
301 | static inline int DoC_SelectFloor(struct DiskOnChip *doc, int floor) | ||
302 | { | ||
303 | void __iomem *docptr = doc->virtadr; | ||
304 | |||
305 | /* Select the floor (bank) of chips required */ | ||
306 | WriteDOC(floor, docptr, FloorSelect); | ||
307 | |||
308 | /* Wait for the chip to be ready */ | ||
309 | return DoC_WaitReady(doc); | ||
310 | } | ||
311 | |||
312 | /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */ | ||
313 | |||
314 | static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip) | ||
315 | { | ||
316 | int mfr, id, i, j; | ||
317 | volatile char dummy; | ||
318 | |||
319 | /* Page in the required floor/chip */ | ||
320 | DoC_SelectFloor(doc, floor); | ||
321 | DoC_SelectChip(doc, chip); | ||
322 | |||
323 | /* Reset the chip */ | ||
324 | if (DoC_Command(doc, NAND_CMD_RESET, CDSN_CTRL_WP)) { | ||
325 | pr_debug("DoC_Command (reset) for %d,%d returned true\n", | ||
326 | floor, chip); | ||
327 | return 0; | ||
328 | } | ||
329 | |||
330 | |||
331 | /* Read the NAND chip ID: 1. Send ReadID command */ | ||
332 | if (DoC_Command(doc, NAND_CMD_READID, CDSN_CTRL_WP)) { | ||
333 | pr_debug("DoC_Command (ReadID) for %d,%d returned true\n", | ||
334 | floor, chip); | ||
335 | return 0; | ||
336 | } | ||
337 | |||
338 | /* Read the NAND chip ID: 2. Send address byte zero */ | ||
339 | DoC_Address(doc, ADDR_COLUMN, 0, CDSN_CTRL_WP, 0); | ||
340 | |||
341 | /* Read the manufacturer and device id codes from the device */ | ||
342 | |||
343 | if (DoC_is_Millennium(doc)) { | ||
344 | DoC_Delay(doc, 2); | ||
345 | dummy = ReadDOC(doc->virtadr, ReadPipeInit); | ||
346 | mfr = ReadDOC(doc->virtadr, LastDataRead); | ||
347 | |||
348 | DoC_Delay(doc, 2); | ||
349 | dummy = ReadDOC(doc->virtadr, ReadPipeInit); | ||
350 | id = ReadDOC(doc->virtadr, LastDataRead); | ||
351 | } else { | ||
352 | /* CDSN Slow IO register see Software Req 11.4 item 5. */ | ||
353 | dummy = ReadDOC(doc->virtadr, CDSNSlowIO); | ||
354 | DoC_Delay(doc, 2); | ||
355 | mfr = ReadDOC_(doc->virtadr, doc->ioreg); | ||
356 | |||
357 | /* CDSN Slow IO register see Software Req 11.4 item 5. */ | ||
358 | dummy = ReadDOC(doc->virtadr, CDSNSlowIO); | ||
359 | DoC_Delay(doc, 2); | ||
360 | id = ReadDOC_(doc->virtadr, doc->ioreg); | ||
361 | } | ||
362 | |||
363 | /* No response - return failure */ | ||
364 | if (mfr == 0xff || mfr == 0) | ||
365 | return 0; | ||
366 | |||
367 | /* Check it's the same as the first chip we identified. | ||
368 | * M-Systems say that any given DiskOnChip device should only | ||
369 | * contain _one_ type of flash part, although that's not a | ||
370 | * hardware restriction. */ | ||
371 | if (doc->mfr) { | ||
372 | if (doc->mfr == mfr && doc->id == id) | ||
373 | return 1; /* This is the same as the first */ | ||
374 | else | ||
375 | printk(KERN_WARNING | ||
376 | "Flash chip at floor %d, chip %d is different:\n", | ||
377 | floor, chip); | ||
378 | } | ||
379 | |||
380 | /* Print and store the manufacturer and ID codes. */ | ||
381 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | ||
382 | if (id == nand_flash_ids[i].id) { | ||
383 | /* Try to identify manufacturer */ | ||
384 | for (j = 0; nand_manuf_ids[j].id != 0x0; j++) { | ||
385 | if (nand_manuf_ids[j].id == mfr) | ||
386 | break; | ||
387 | } | ||
388 | printk(KERN_INFO | ||
389 | "Flash chip found: Manufacturer ID: %2.2X, " | ||
390 | "Chip ID: %2.2X (%s:%s)\n", mfr, id, | ||
391 | nand_manuf_ids[j].name, nand_flash_ids[i].name); | ||
392 | if (!doc->mfr) { | ||
393 | doc->mfr = mfr; | ||
394 | doc->id = id; | ||
395 | doc->chipshift = | ||
396 | ffs((nand_flash_ids[i].chipsize << 20)) - 1; | ||
397 | doc->page256 = (nand_flash_ids[i].pagesize == 256) ? 1 : 0; | ||
398 | doc->pageadrlen = doc->chipshift > 25 ? 3 : 2; | ||
399 | doc->erasesize = | ||
400 | nand_flash_ids[i].erasesize; | ||
401 | return 1; | ||
402 | } | ||
403 | return 0; | ||
404 | } | ||
405 | } | ||
406 | |||
407 | |||
408 | /* We haven't fully identified the chip. Print as much as we know. */ | ||
409 | printk(KERN_WARNING "Unknown flash chip found: %2.2X %2.2X\n", | ||
410 | id, mfr); | ||
411 | |||
412 | printk(KERN_WARNING "Please report to dwmw2@infradead.org\n"); | ||
413 | return 0; | ||
414 | } | ||
415 | |||
416 | /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */ | ||
417 | |||
418 | static void DoC_ScanChips(struct DiskOnChip *this, int maxchips) | ||
419 | { | ||
420 | int floor, chip; | ||
421 | int numchips[MAX_FLOORS]; | ||
422 | int ret = 1; | ||
423 | |||
424 | this->numchips = 0; | ||
425 | this->mfr = 0; | ||
426 | this->id = 0; | ||
427 | |||
428 | /* For each floor, find the number of valid chips it contains */ | ||
429 | for (floor = 0; floor < MAX_FLOORS; floor++) { | ||
430 | ret = 1; | ||
431 | numchips[floor] = 0; | ||
432 | for (chip = 0; chip < maxchips && ret != 0; chip++) { | ||
433 | |||
434 | ret = DoC_IdentChip(this, floor, chip); | ||
435 | if (ret) { | ||
436 | numchips[floor]++; | ||
437 | this->numchips++; | ||
438 | } | ||
439 | } | ||
440 | } | ||
441 | |||
442 | /* If there are none at all that we recognise, bail */ | ||
443 | if (!this->numchips) { | ||
444 | printk(KERN_NOTICE "No flash chips recognised.\n"); | ||
445 | return; | ||
446 | } | ||
447 | |||
448 | /* Allocate an array to hold the information for each chip */ | ||
449 | this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); | ||
450 | if (!this->chips) { | ||
451 | printk(KERN_NOTICE "No memory for allocating chip info structures\n"); | ||
452 | return; | ||
453 | } | ||
454 | |||
455 | ret = 0; | ||
456 | |||
457 | /* Fill out the chip array with {floor, chipno} for each | ||
458 | * detected chip in the device. */ | ||
459 | for (floor = 0; floor < MAX_FLOORS; floor++) { | ||
460 | for (chip = 0; chip < numchips[floor]; chip++) { | ||
461 | this->chips[ret].floor = floor; | ||
462 | this->chips[ret].chip = chip; | ||
463 | this->chips[ret].curadr = 0; | ||
464 | this->chips[ret].curmode = 0x50; | ||
465 | ret++; | ||
466 | } | ||
467 | } | ||
468 | |||
469 | /* Calculate and print the total size of the device */ | ||
470 | this->totlen = this->numchips * (1 << this->chipshift); | ||
471 | |||
472 | printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n", | ||
473 | this->numchips, this->totlen >> 20); | ||
474 | } | ||
475 | |||
476 | static int DoC2k_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2) | ||
477 | { | ||
478 | int tmp1, tmp2, retval; | ||
479 | if (doc1->physadr == doc2->physadr) | ||
480 | return 1; | ||
481 | |||
482 | /* Use the alias resolution register which was set aside for this | ||
483 | * purpose. If it's value is the same on both chips, they might | ||
484 | * be the same chip, and we write to one and check for a change in | ||
485 | * the other. It's unclear if this register is usuable in the | ||
486 | * DoC 2000 (it's in the Millennium docs), but it seems to work. */ | ||
487 | tmp1 = ReadDOC(doc1->virtadr, AliasResolution); | ||
488 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | ||
489 | if (tmp1 != tmp2) | ||
490 | return 0; | ||
491 | |||
492 | WriteDOC((tmp1 + 1) % 0xff, doc1->virtadr, AliasResolution); | ||
493 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | ||
494 | if (tmp2 == (tmp1 + 1) % 0xff) | ||
495 | retval = 1; | ||
496 | else | ||
497 | retval = 0; | ||
498 | |||
499 | /* Restore register contents. May not be necessary, but do it just to | ||
500 | * be safe. */ | ||
501 | WriteDOC(tmp1, doc1->virtadr, AliasResolution); | ||
502 | |||
503 | return retval; | ||
504 | } | ||
505 | |||
506 | /* This routine is found from the docprobe code by symbol_get(), | ||
507 | * which will bump the use count of this module. */ | ||
508 | void DoC2k_init(struct mtd_info *mtd) | ||
509 | { | ||
510 | struct DiskOnChip *this = mtd->priv; | ||
511 | struct DiskOnChip *old = NULL; | ||
512 | int maxchips; | ||
513 | |||
514 | /* We must avoid being called twice for the same device. */ | ||
515 | |||
516 | if (doc2klist) | ||
517 | old = doc2klist->priv; | ||
518 | |||
519 | while (old) { | ||
520 | if (DoC2k_is_alias(old, this)) { | ||
521 | printk(KERN_NOTICE | ||
522 | "Ignoring DiskOnChip 2000 at 0x%lX - already configured\n", | ||
523 | this->physadr); | ||
524 | iounmap(this->virtadr); | ||
525 | kfree(mtd); | ||
526 | return; | ||
527 | } | ||
528 | if (old->nextdoc) | ||
529 | old = old->nextdoc->priv; | ||
530 | else | ||
531 | old = NULL; | ||
532 | } | ||
533 | |||
534 | |||
535 | switch (this->ChipID) { | ||
536 | case DOC_ChipID_Doc2kTSOP: | ||
537 | mtd->name = "DiskOnChip 2000 TSOP"; | ||
538 | this->ioreg = DoC_Mil_CDSN_IO; | ||
539 | /* Pretend it's a Millennium */ | ||
540 | this->ChipID = DOC_ChipID_DocMil; | ||
541 | maxchips = MAX_CHIPS; | ||
542 | break; | ||
543 | case DOC_ChipID_Doc2k: | ||
544 | mtd->name = "DiskOnChip 2000"; | ||
545 | this->ioreg = DoC_2k_CDSN_IO; | ||
546 | maxchips = MAX_CHIPS; | ||
547 | break; | ||
548 | case DOC_ChipID_DocMil: | ||
549 | mtd->name = "DiskOnChip Millennium"; | ||
550 | this->ioreg = DoC_Mil_CDSN_IO; | ||
551 | maxchips = MAX_CHIPS_MIL; | ||
552 | break; | ||
553 | default: | ||
554 | printk("Unknown ChipID 0x%02x\n", this->ChipID); | ||
555 | kfree(mtd); | ||
556 | iounmap(this->virtadr); | ||
557 | return; | ||
558 | } | ||
559 | |||
560 | printk(KERN_NOTICE "%s found at address 0x%lX\n", mtd->name, | ||
561 | this->physadr); | ||
562 | |||
563 | mtd->type = MTD_NANDFLASH; | ||
564 | mtd->flags = MTD_CAP_NANDFLASH; | ||
565 | mtd->writebufsize = mtd->writesize = 512; | ||
566 | mtd->oobsize = 16; | ||
567 | mtd->ecc_strength = 2; | ||
568 | mtd->owner = THIS_MODULE; | ||
569 | mtd->_erase = doc_erase; | ||
570 | mtd->_read = doc_read; | ||
571 | mtd->_write = doc_write; | ||
572 | mtd->_read_oob = doc_read_oob; | ||
573 | mtd->_write_oob = doc_write_oob; | ||
574 | this->curfloor = -1; | ||
575 | this->curchip = -1; | ||
576 | mutex_init(&this->lock); | ||
577 | |||
578 | /* Ident all the chips present. */ | ||
579 | DoC_ScanChips(this, maxchips); | ||
580 | |||
581 | if (!this->totlen) { | ||
582 | kfree(mtd); | ||
583 | iounmap(this->virtadr); | ||
584 | } else { | ||
585 | this->nextdoc = doc2klist; | ||
586 | doc2klist = mtd; | ||
587 | mtd->size = this->totlen; | ||
588 | mtd->erasesize = this->erasesize; | ||
589 | mtd_device_register(mtd, NULL, 0); | ||
590 | return; | ||
591 | } | ||
592 | } | ||
593 | EXPORT_SYMBOL_GPL(DoC2k_init); | ||
594 | |||
595 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
596 | size_t * retlen, u_char * buf) | ||
597 | { | ||
598 | struct DiskOnChip *this = mtd->priv; | ||
599 | void __iomem *docptr = this->virtadr; | ||
600 | struct Nand *mychip; | ||
601 | unsigned char syndrome[6], eccbuf[6]; | ||
602 | volatile char dummy; | ||
603 | int i, len256 = 0, ret=0; | ||
604 | size_t left = len; | ||
605 | |||
606 | mutex_lock(&this->lock); | ||
607 | while (left) { | ||
608 | len = left; | ||
609 | |||
610 | /* Don't allow a single read to cross a 512-byte block boundary */ | ||
611 | if (from + len > ((from | 0x1ff) + 1)) | ||
612 | len = ((from | 0x1ff) + 1) - from; | ||
613 | |||
614 | /* The ECC will not be calculated correctly if less than 512 is read */ | ||
615 | if (len != 0x200) | ||
616 | printk(KERN_WARNING | ||
617 | "ECC needs a full sector read (adr: %lx size %lx)\n", | ||
618 | (long) from, (long) len); | ||
619 | |||
620 | /* printk("DoC_Read (adr: %lx size %lx)\n", (long) from, (long) len); */ | ||
621 | |||
622 | |||
623 | /* Find the chip which is to be used and select it */ | ||
624 | mychip = &this->chips[from >> (this->chipshift)]; | ||
625 | |||
626 | if (this->curfloor != mychip->floor) { | ||
627 | DoC_SelectFloor(this, mychip->floor); | ||
628 | DoC_SelectChip(this, mychip->chip); | ||
629 | } else if (this->curchip != mychip->chip) { | ||
630 | DoC_SelectChip(this, mychip->chip); | ||
631 | } | ||
632 | |||
633 | this->curfloor = mychip->floor; | ||
634 | this->curchip = mychip->chip; | ||
635 | |||
636 | DoC_Command(this, | ||
637 | (!this->page256 | ||
638 | && (from & 0x100)) ? NAND_CMD_READ1 : NAND_CMD_READ0, | ||
639 | CDSN_CTRL_WP); | ||
640 | DoC_Address(this, ADDR_COLUMN_PAGE, from, CDSN_CTRL_WP, | ||
641 | CDSN_CTRL_ECC_IO); | ||
642 | |||
643 | /* Prime the ECC engine */ | ||
644 | WriteDOC(DOC_ECC_RESET, docptr, ECCConf); | ||
645 | WriteDOC(DOC_ECC_EN, docptr, ECCConf); | ||
646 | |||
647 | /* treat crossing 256-byte sector for 2M x 8bits devices */ | ||
648 | if (this->page256 && from + len > (from | 0xff) + 1) { | ||
649 | len256 = (from | 0xff) + 1 - from; | ||
650 | DoC_ReadBuf(this, buf, len256); | ||
651 | |||
652 | DoC_Command(this, NAND_CMD_READ0, CDSN_CTRL_WP); | ||
653 | DoC_Address(this, ADDR_COLUMN_PAGE, from + len256, | ||
654 | CDSN_CTRL_WP, CDSN_CTRL_ECC_IO); | ||
655 | } | ||
656 | |||
657 | DoC_ReadBuf(this, &buf[len256], len - len256); | ||
658 | |||
659 | /* Let the caller know we completed it */ | ||
660 | *retlen += len; | ||
661 | |||
662 | /* Read the ECC data through the DiskOnChip ECC logic */ | ||
663 | /* Note: this will work even with 2M x 8bit devices as */ | ||
664 | /* they have 8 bytes of OOB per 256 page. mf. */ | ||
665 | DoC_ReadBuf(this, eccbuf, 6); | ||
666 | |||
667 | /* Flush the pipeline */ | ||
668 | if (DoC_is_Millennium(this)) { | ||
669 | dummy = ReadDOC(docptr, ECCConf); | ||
670 | dummy = ReadDOC(docptr, ECCConf); | ||
671 | i = ReadDOC(docptr, ECCConf); | ||
672 | } else { | ||
673 | dummy = ReadDOC(docptr, 2k_ECCStatus); | ||
674 | dummy = ReadDOC(docptr, 2k_ECCStatus); | ||
675 | i = ReadDOC(docptr, 2k_ECCStatus); | ||
676 | } | ||
677 | |||
678 | /* Check the ECC Status */ | ||
679 | if (i & 0x80) { | ||
680 | int nb_errors; | ||
681 | /* There was an ECC error */ | ||
682 | #ifdef ECC_DEBUG | ||
683 | printk(KERN_ERR "DiskOnChip ECC Error: Read at %lx\n", (long)from); | ||
684 | #endif | ||
685 | /* Read the ECC syndrome through the DiskOnChip ECC | ||
686 | logic. These syndrome will be all ZERO when there | ||
687 | is no error */ | ||
688 | for (i = 0; i < 6; i++) { | ||
689 | syndrome[i] = | ||
690 | ReadDOC(docptr, ECCSyndrome0 + i); | ||
691 | } | ||
692 | nb_errors = doc_decode_ecc(buf, syndrome); | ||
693 | |||
694 | #ifdef ECC_DEBUG | ||
695 | printk(KERN_ERR "Errors corrected: %x\n", nb_errors); | ||
696 | #endif | ||
697 | if (nb_errors < 0) { | ||
698 | /* We return error, but have actually done the | ||
699 | read. Not that this can be told to | ||
700 | user-space, via sys_read(), but at least | ||
701 | MTD-aware stuff can know about it by | ||
702 | checking *retlen */ | ||
703 | ret = -EIO; | ||
704 | } | ||
705 | } | ||
706 | |||
707 | #ifdef PSYCHO_DEBUG | ||
708 | printk(KERN_DEBUG "ECC DATA at %lxB: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | ||
709 | (long)from, eccbuf[0], eccbuf[1], eccbuf[2], | ||
710 | eccbuf[3], eccbuf[4], eccbuf[5]); | ||
711 | #endif | ||
712 | |||
713 | /* disable the ECC engine */ | ||
714 | WriteDOC(DOC_ECC_DIS, docptr , ECCConf); | ||
715 | |||
716 | /* according to 11.4.1, we need to wait for the busy line | ||
717 | * drop if we read to the end of the page. */ | ||
718 | if(0 == ((from + len) & 0x1ff)) | ||
719 | { | ||
720 | DoC_WaitReady(this); | ||
721 | } | ||
722 | |||
723 | from += len; | ||
724 | left -= len; | ||
725 | buf += len; | ||
726 | } | ||
727 | |||
728 | mutex_unlock(&this->lock); | ||
729 | |||
730 | return ret; | ||
731 | } | ||
732 | |||
733 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
734 | size_t * retlen, const u_char * buf) | ||
735 | { | ||
736 | struct DiskOnChip *this = mtd->priv; | ||
737 | int di; /* Yes, DI is a hangover from when I was disassembling the binary driver */ | ||
738 | void __iomem *docptr = this->virtadr; | ||
739 | unsigned char eccbuf[6]; | ||
740 | volatile char dummy; | ||
741 | int len256 = 0; | ||
742 | struct Nand *mychip; | ||
743 | size_t left = len; | ||
744 | int status; | ||
745 | |||
746 | mutex_lock(&this->lock); | ||
747 | while (left) { | ||
748 | len = left; | ||
749 | |||
750 | /* Don't allow a single write to cross a 512-byte block boundary */ | ||
751 | if (to + len > ((to | 0x1ff) + 1)) | ||
752 | len = ((to | 0x1ff) + 1) - to; | ||
753 | |||
754 | /* The ECC will not be calculated correctly if less than 512 is written */ | ||
755 | /* DBB- | ||
756 | if (len != 0x200 && eccbuf) | ||
757 | printk(KERN_WARNING | ||
758 | "ECC needs a full sector write (adr: %lx size %lx)\n", | ||
759 | (long) to, (long) len); | ||
760 | -DBB */ | ||
761 | |||
762 | /* printk("DoC_Write (adr: %lx size %lx)\n", (long) to, (long) len); */ | ||
763 | |||
764 | /* Find the chip which is to be used and select it */ | ||
765 | mychip = &this->chips[to >> (this->chipshift)]; | ||
766 | |||
767 | if (this->curfloor != mychip->floor) { | ||
768 | DoC_SelectFloor(this, mychip->floor); | ||
769 | DoC_SelectChip(this, mychip->chip); | ||
770 | } else if (this->curchip != mychip->chip) { | ||
771 | DoC_SelectChip(this, mychip->chip); | ||
772 | } | ||
773 | |||
774 | this->curfloor = mychip->floor; | ||
775 | this->curchip = mychip->chip; | ||
776 | |||
777 | /* Set device to main plane of flash */ | ||
778 | DoC_Command(this, NAND_CMD_RESET, CDSN_CTRL_WP); | ||
779 | DoC_Command(this, | ||
780 | (!this->page256 | ||
781 | && (to & 0x100)) ? NAND_CMD_READ1 : NAND_CMD_READ0, | ||
782 | CDSN_CTRL_WP); | ||
783 | |||
784 | DoC_Command(this, NAND_CMD_SEQIN, 0); | ||
785 | DoC_Address(this, ADDR_COLUMN_PAGE, to, 0, CDSN_CTRL_ECC_IO); | ||
786 | |||
787 | /* Prime the ECC engine */ | ||
788 | WriteDOC(DOC_ECC_RESET, docptr, ECCConf); | ||
789 | WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf); | ||
790 | |||
791 | /* treat crossing 256-byte sector for 2M x 8bits devices */ | ||
792 | if (this->page256 && to + len > (to | 0xff) + 1) { | ||
793 | len256 = (to | 0xff) + 1 - to; | ||
794 | DoC_WriteBuf(this, buf, len256); | ||
795 | |||
796 | DoC_Command(this, NAND_CMD_PAGEPROG, 0); | ||
797 | |||
798 | DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP); | ||
799 | /* There's an implicit DoC_WaitReady() in DoC_Command */ | ||
800 | |||
801 | dummy = ReadDOC(docptr, CDSNSlowIO); | ||
802 | DoC_Delay(this, 2); | ||
803 | |||
804 | if (ReadDOC_(docptr, this->ioreg) & 1) { | ||
805 | printk(KERN_ERR "Error programming flash\n"); | ||
806 | /* Error in programming */ | ||
807 | *retlen = 0; | ||
808 | mutex_unlock(&this->lock); | ||
809 | return -EIO; | ||
810 | } | ||
811 | |||
812 | DoC_Command(this, NAND_CMD_SEQIN, 0); | ||
813 | DoC_Address(this, ADDR_COLUMN_PAGE, to + len256, 0, | ||
814 | CDSN_CTRL_ECC_IO); | ||
815 | } | ||
816 | |||
817 | DoC_WriteBuf(this, &buf[len256], len - len256); | ||
818 | |||
819 | WriteDOC(CDSN_CTRL_ECC_IO | CDSN_CTRL_CE, docptr, CDSNControl); | ||
820 | |||
821 | if (DoC_is_Millennium(this)) { | ||
822 | WriteDOC(0, docptr, NOP); | ||
823 | WriteDOC(0, docptr, NOP); | ||
824 | WriteDOC(0, docptr, NOP); | ||
825 | } else { | ||
826 | WriteDOC_(0, docptr, this->ioreg); | ||
827 | WriteDOC_(0, docptr, this->ioreg); | ||
828 | WriteDOC_(0, docptr, this->ioreg); | ||
829 | } | ||
830 | |||
831 | WriteDOC(CDSN_CTRL_ECC_IO | CDSN_CTRL_FLASH_IO | CDSN_CTRL_CE, docptr, | ||
832 | CDSNControl); | ||
833 | |||
834 | /* Read the ECC data through the DiskOnChip ECC logic */ | ||
835 | for (di = 0; di < 6; di++) { | ||
836 | eccbuf[di] = ReadDOC(docptr, ECCSyndrome0 + di); | ||
837 | } | ||
838 | |||
839 | /* Reset the ECC engine */ | ||
840 | WriteDOC(DOC_ECC_DIS, docptr, ECCConf); | ||
841 | |||
842 | #ifdef PSYCHO_DEBUG | ||
843 | printk | ||
844 | ("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | ||
845 | (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | ||
846 | eccbuf[4], eccbuf[5]); | ||
847 | #endif | ||
848 | DoC_Command(this, NAND_CMD_PAGEPROG, 0); | ||
849 | |||
850 | DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP); | ||
851 | /* There's an implicit DoC_WaitReady() in DoC_Command */ | ||
852 | |||
853 | if (DoC_is_Millennium(this)) { | ||
854 | ReadDOC(docptr, ReadPipeInit); | ||
855 | status = ReadDOC(docptr, LastDataRead); | ||
856 | } else { | ||
857 | dummy = ReadDOC(docptr, CDSNSlowIO); | ||
858 | DoC_Delay(this, 2); | ||
859 | status = ReadDOC_(docptr, this->ioreg); | ||
860 | } | ||
861 | |||
862 | if (status & 1) { | ||
863 | printk(KERN_ERR "Error programming flash\n"); | ||
864 | /* Error in programming */ | ||
865 | *retlen = 0; | ||
866 | mutex_unlock(&this->lock); | ||
867 | return -EIO; | ||
868 | } | ||
869 | |||
870 | /* Let the caller know we completed it */ | ||
871 | *retlen += len; | ||
872 | |||
873 | { | ||
874 | unsigned char x[8]; | ||
875 | size_t dummy; | ||
876 | int ret; | ||
877 | |||
878 | /* Write the ECC data to flash */ | ||
879 | for (di=0; di<6; di++) | ||
880 | x[di] = eccbuf[di]; | ||
881 | |||
882 | x[6]=0x55; | ||
883 | x[7]=0x55; | ||
884 | |||
885 | ret = doc_write_oob_nolock(mtd, to, 8, &dummy, x); | ||
886 | if (ret) { | ||
887 | mutex_unlock(&this->lock); | ||
888 | return ret; | ||
889 | } | ||
890 | } | ||
891 | |||
892 | to += len; | ||
893 | left -= len; | ||
894 | buf += len; | ||
895 | } | ||
896 | |||
897 | mutex_unlock(&this->lock); | ||
898 | return 0; | ||
899 | } | ||
900 | |||
901 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
902 | struct mtd_oob_ops *ops) | ||
903 | { | ||
904 | struct DiskOnChip *this = mtd->priv; | ||
905 | int len256 = 0, ret; | ||
906 | struct Nand *mychip; | ||
907 | uint8_t *buf = ops->oobbuf; | ||
908 | size_t len = ops->len; | ||
909 | |||
910 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
911 | |||
912 | ofs += ops->ooboffs; | ||
913 | |||
914 | mutex_lock(&this->lock); | ||
915 | |||
916 | mychip = &this->chips[ofs >> this->chipshift]; | ||
917 | |||
918 | if (this->curfloor != mychip->floor) { | ||
919 | DoC_SelectFloor(this, mychip->floor); | ||
920 | DoC_SelectChip(this, mychip->chip); | ||
921 | } else if (this->curchip != mychip->chip) { | ||
922 | DoC_SelectChip(this, mychip->chip); | ||
923 | } | ||
924 | this->curfloor = mychip->floor; | ||
925 | this->curchip = mychip->chip; | ||
926 | |||
927 | /* update address for 2M x 8bit devices. OOB starts on the second */ | ||
928 | /* page to maintain compatibility with doc_read_ecc. */ | ||
929 | if (this->page256) { | ||
930 | if (!(ofs & 0x8)) | ||
931 | ofs += 0x100; | ||
932 | else | ||
933 | ofs -= 0x8; | ||
934 | } | ||
935 | |||
936 | DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP); | ||
937 | DoC_Address(this, ADDR_COLUMN_PAGE, ofs, CDSN_CTRL_WP, 0); | ||
938 | |||
939 | /* treat crossing 8-byte OOB data for 2M x 8bit devices */ | ||
940 | /* Note: datasheet says it should automaticaly wrap to the */ | ||
941 | /* next OOB block, but it didn't work here. mf. */ | ||
942 | if (this->page256 && ofs + len > (ofs | 0x7) + 1) { | ||
943 | len256 = (ofs | 0x7) + 1 - ofs; | ||
944 | DoC_ReadBuf(this, buf, len256); | ||
945 | |||
946 | DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP); | ||
947 | DoC_Address(this, ADDR_COLUMN_PAGE, ofs & (~0x1ff), | ||
948 | CDSN_CTRL_WP, 0); | ||
949 | } | ||
950 | |||
951 | DoC_ReadBuf(this, &buf[len256], len - len256); | ||
952 | |||
953 | ops->retlen = len; | ||
954 | /* Reading the full OOB data drops us off of the end of the page, | ||
955 | * causing the flash device to go into busy mode, so we need | ||
956 | * to wait until ready 11.4.1 and Toshiba TC58256FT docs */ | ||
957 | |||
958 | ret = DoC_WaitReady(this); | ||
959 | |||
960 | mutex_unlock(&this->lock); | ||
961 | return ret; | ||
962 | |||
963 | } | ||
964 | |||
965 | static int doc_write_oob_nolock(struct mtd_info *mtd, loff_t ofs, size_t len, | ||
966 | size_t * retlen, const u_char * buf) | ||
967 | { | ||
968 | struct DiskOnChip *this = mtd->priv; | ||
969 | int len256 = 0; | ||
970 | void __iomem *docptr = this->virtadr; | ||
971 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
972 | volatile int dummy; | ||
973 | int status; | ||
974 | |||
975 | // printk("doc_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",(long)ofs, len, | ||
976 | // buf[0], buf[1], buf[2], buf[3], buf[8], buf[9], buf[14],buf[15]); | ||
977 | |||
978 | /* Find the chip which is to be used and select it */ | ||
979 | if (this->curfloor != mychip->floor) { | ||
980 | DoC_SelectFloor(this, mychip->floor); | ||
981 | DoC_SelectChip(this, mychip->chip); | ||
982 | } else if (this->curchip != mychip->chip) { | ||
983 | DoC_SelectChip(this, mychip->chip); | ||
984 | } | ||
985 | this->curfloor = mychip->floor; | ||
986 | this->curchip = mychip->chip; | ||
987 | |||
988 | /* disable the ECC engine */ | ||
989 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | ||
990 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | ||
991 | |||
992 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
993 | DoC_Command(this, NAND_CMD_RESET, CDSN_CTRL_WP); | ||
994 | |||
995 | /* issue the Read2 command to set the pointer to the Spare Data Area. */ | ||
996 | DoC_Command(this, NAND_CMD_READOOB, CDSN_CTRL_WP); | ||
997 | |||
998 | /* update address for 2M x 8bit devices. OOB starts on the second */ | ||
999 | /* page to maintain compatibility with doc_read_ecc. */ | ||
1000 | if (this->page256) { | ||
1001 | if (!(ofs & 0x8)) | ||
1002 | ofs += 0x100; | ||
1003 | else | ||
1004 | ofs -= 0x8; | ||
1005 | } | ||
1006 | |||
1007 | /* issue the Serial Data In command to initial the Page Program process */ | ||
1008 | DoC_Command(this, NAND_CMD_SEQIN, 0); | ||
1009 | DoC_Address(this, ADDR_COLUMN_PAGE, ofs, 0, 0); | ||
1010 | |||
1011 | /* treat crossing 8-byte OOB data for 2M x 8bit devices */ | ||
1012 | /* Note: datasheet says it should automaticaly wrap to the */ | ||
1013 | /* next OOB block, but it didn't work here. mf. */ | ||
1014 | if (this->page256 && ofs + len > (ofs | 0x7) + 1) { | ||
1015 | len256 = (ofs | 0x7) + 1 - ofs; | ||
1016 | DoC_WriteBuf(this, buf, len256); | ||
1017 | |||
1018 | DoC_Command(this, NAND_CMD_PAGEPROG, 0); | ||
1019 | DoC_Command(this, NAND_CMD_STATUS, 0); | ||
1020 | /* DoC_WaitReady() is implicit in DoC_Command */ | ||
1021 | |||
1022 | if (DoC_is_Millennium(this)) { | ||
1023 | ReadDOC(docptr, ReadPipeInit); | ||
1024 | status = ReadDOC(docptr, LastDataRead); | ||
1025 | } else { | ||
1026 | dummy = ReadDOC(docptr, CDSNSlowIO); | ||
1027 | DoC_Delay(this, 2); | ||
1028 | status = ReadDOC_(docptr, this->ioreg); | ||
1029 | } | ||
1030 | |||
1031 | if (status & 1) { | ||
1032 | printk(KERN_ERR "Error programming oob data\n"); | ||
1033 | /* There was an error */ | ||
1034 | *retlen = 0; | ||
1035 | return -EIO; | ||
1036 | } | ||
1037 | DoC_Command(this, NAND_CMD_SEQIN, 0); | ||
1038 | DoC_Address(this, ADDR_COLUMN_PAGE, ofs & (~0x1ff), 0, 0); | ||
1039 | } | ||
1040 | |||
1041 | DoC_WriteBuf(this, &buf[len256], len - len256); | ||
1042 | |||
1043 | DoC_Command(this, NAND_CMD_PAGEPROG, 0); | ||
1044 | DoC_Command(this, NAND_CMD_STATUS, 0); | ||
1045 | /* DoC_WaitReady() is implicit in DoC_Command */ | ||
1046 | |||
1047 | if (DoC_is_Millennium(this)) { | ||
1048 | ReadDOC(docptr, ReadPipeInit); | ||
1049 | status = ReadDOC(docptr, LastDataRead); | ||
1050 | } else { | ||
1051 | dummy = ReadDOC(docptr, CDSNSlowIO); | ||
1052 | DoC_Delay(this, 2); | ||
1053 | status = ReadDOC_(docptr, this->ioreg); | ||
1054 | } | ||
1055 | |||
1056 | if (status & 1) { | ||
1057 | printk(KERN_ERR "Error programming oob data\n"); | ||
1058 | /* There was an error */ | ||
1059 | *retlen = 0; | ||
1060 | return -EIO; | ||
1061 | } | ||
1062 | |||
1063 | *retlen = len; | ||
1064 | return 0; | ||
1065 | |||
1066 | } | ||
1067 | |||
1068 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
1069 | struct mtd_oob_ops *ops) | ||
1070 | { | ||
1071 | struct DiskOnChip *this = mtd->priv; | ||
1072 | int ret; | ||
1073 | |||
1074 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
1075 | |||
1076 | mutex_lock(&this->lock); | ||
1077 | ret = doc_write_oob_nolock(mtd, ofs + ops->ooboffs, ops->len, | ||
1078 | &ops->retlen, ops->oobbuf); | ||
1079 | |||
1080 | mutex_unlock(&this->lock); | ||
1081 | return ret; | ||
1082 | } | ||
1083 | |||
1084 | static int doc_erase(struct mtd_info *mtd, struct erase_info *instr) | ||
1085 | { | ||
1086 | struct DiskOnChip *this = mtd->priv; | ||
1087 | __u32 ofs = instr->addr; | ||
1088 | __u32 len = instr->len; | ||
1089 | volatile int dummy; | ||
1090 | void __iomem *docptr = this->virtadr; | ||
1091 | struct Nand *mychip; | ||
1092 | int status; | ||
1093 | |||
1094 | mutex_lock(&this->lock); | ||
1095 | |||
1096 | if (ofs & (mtd->erasesize-1) || len & (mtd->erasesize-1)) { | ||
1097 | mutex_unlock(&this->lock); | ||
1098 | return -EINVAL; | ||
1099 | } | ||
1100 | |||
1101 | instr->state = MTD_ERASING; | ||
1102 | |||
1103 | /* FIXME: Do this in the background. Use timers or schedule_task() */ | ||
1104 | while(len) { | ||
1105 | mychip = &this->chips[ofs >> this->chipshift]; | ||
1106 | |||
1107 | if (this->curfloor != mychip->floor) { | ||
1108 | DoC_SelectFloor(this, mychip->floor); | ||
1109 | DoC_SelectChip(this, mychip->chip); | ||
1110 | } else if (this->curchip != mychip->chip) { | ||
1111 | DoC_SelectChip(this, mychip->chip); | ||
1112 | } | ||
1113 | this->curfloor = mychip->floor; | ||
1114 | this->curchip = mychip->chip; | ||
1115 | |||
1116 | DoC_Command(this, NAND_CMD_ERASE1, 0); | ||
1117 | DoC_Address(this, ADDR_PAGE, ofs, 0, 0); | ||
1118 | DoC_Command(this, NAND_CMD_ERASE2, 0); | ||
1119 | |||
1120 | DoC_Command(this, NAND_CMD_STATUS, CDSN_CTRL_WP); | ||
1121 | |||
1122 | if (DoC_is_Millennium(this)) { | ||
1123 | ReadDOC(docptr, ReadPipeInit); | ||
1124 | status = ReadDOC(docptr, LastDataRead); | ||
1125 | } else { | ||
1126 | dummy = ReadDOC(docptr, CDSNSlowIO); | ||
1127 | DoC_Delay(this, 2); | ||
1128 | status = ReadDOC_(docptr, this->ioreg); | ||
1129 | } | ||
1130 | |||
1131 | if (status & 1) { | ||
1132 | printk(KERN_ERR "Error erasing at 0x%x\n", ofs); | ||
1133 | /* There was an error */ | ||
1134 | instr->state = MTD_ERASE_FAILED; | ||
1135 | goto callback; | ||
1136 | } | ||
1137 | ofs += mtd->erasesize; | ||
1138 | len -= mtd->erasesize; | ||
1139 | } | ||
1140 | instr->state = MTD_ERASE_DONE; | ||
1141 | |||
1142 | callback: | ||
1143 | mtd_erase_callback(instr); | ||
1144 | |||
1145 | mutex_unlock(&this->lock); | ||
1146 | return 0; | ||
1147 | } | ||
1148 | |||
1149 | |||
1150 | /**************************************************************************** | ||
1151 | * | ||
1152 | * Module stuff | ||
1153 | * | ||
1154 | ****************************************************************************/ | ||
1155 | |||
1156 | static void __exit cleanup_doc2000(void) | ||
1157 | { | ||
1158 | struct mtd_info *mtd; | ||
1159 | struct DiskOnChip *this; | ||
1160 | |||
1161 | while ((mtd = doc2klist)) { | ||
1162 | this = mtd->priv; | ||
1163 | doc2klist = this->nextdoc; | ||
1164 | |||
1165 | mtd_device_unregister(mtd); | ||
1166 | |||
1167 | iounmap(this->virtadr); | ||
1168 | kfree(this->chips); | ||
1169 | kfree(mtd); | ||
1170 | } | ||
1171 | } | ||
1172 | |||
1173 | module_exit(cleanup_doc2000); | ||
1174 | |||
1175 | MODULE_LICENSE("GPL"); | ||
1176 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); | ||
1177 | MODULE_DESCRIPTION("MTD driver for DiskOnChip 2000 and Millennium"); | ||
1178 | |||
diff --git a/drivers/mtd/devices/doc2001.c b/drivers/mtd/devices/doc2001.c deleted file mode 100644 index f6927955dab0..000000000000 --- a/drivers/mtd/devices/doc2001.c +++ /dev/null | |||
@@ -1,824 +0,0 @@ | |||
1 | |||
2 | /* | ||
3 | * Linux driver for Disk-On-Chip Millennium | ||
4 | * (c) 1999 Machine Vision Holdings, Inc. | ||
5 | * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org> | ||
6 | */ | ||
7 | |||
8 | #include <linux/kernel.h> | ||
9 | #include <linux/module.h> | ||
10 | #include <asm/errno.h> | ||
11 | #include <asm/io.h> | ||
12 | #include <asm/uaccess.h> | ||
13 | #include <linux/delay.h> | ||
14 | #include <linux/slab.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/bitops.h> | ||
18 | |||
19 | #include <linux/mtd/mtd.h> | ||
20 | #include <linux/mtd/nand.h> | ||
21 | #include <linux/mtd/doc2000.h> | ||
22 | |||
23 | /* #define ECC_DEBUG */ | ||
24 | |||
25 | /* I have no idea why some DoC chips can not use memcop_form|to_io(). | ||
26 | * This may be due to the different revisions of the ASIC controller built-in or | ||
27 | * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment | ||
28 | * this:*/ | ||
29 | #undef USE_MEMCPY | ||
30 | |||
31 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
32 | size_t *retlen, u_char *buf); | ||
33 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
34 | size_t *retlen, const u_char *buf); | ||
35 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
36 | struct mtd_oob_ops *ops); | ||
37 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
38 | struct mtd_oob_ops *ops); | ||
39 | static int doc_erase (struct mtd_info *mtd, struct erase_info *instr); | ||
40 | |||
41 | static struct mtd_info *docmillist = NULL; | ||
42 | |||
43 | /* Perform the required delay cycles by reading from the NOP register */ | ||
44 | static void DoC_Delay(void __iomem * docptr, unsigned short cycles) | ||
45 | { | ||
46 | volatile char dummy; | ||
47 | int i; | ||
48 | |||
49 | for (i = 0; i < cycles; i++) | ||
50 | dummy = ReadDOC(docptr, NOP); | ||
51 | } | ||
52 | |||
53 | /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */ | ||
54 | static int _DoC_WaitReady(void __iomem * docptr) | ||
55 | { | ||
56 | unsigned short c = 0xffff; | ||
57 | |||
58 | pr_debug("_DoC_WaitReady called for out-of-line wait\n"); | ||
59 | |||
60 | /* Out-of-line routine to wait for chip response */ | ||
61 | while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c) | ||
62 | ; | ||
63 | |||
64 | if (c == 0) | ||
65 | pr_debug("_DoC_WaitReady timed out.\n"); | ||
66 | |||
67 | return (c == 0); | ||
68 | } | ||
69 | |||
70 | static inline int DoC_WaitReady(void __iomem * docptr) | ||
71 | { | ||
72 | /* This is inline, to optimise the common case, where it's ready instantly */ | ||
73 | int ret = 0; | ||
74 | |||
75 | /* 4 read form NOP register should be issued in prior to the read from CDSNControl | ||
76 | see Software Requirement 11.4 item 2. */ | ||
77 | DoC_Delay(docptr, 4); | ||
78 | |||
79 | if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) | ||
80 | /* Call the out-of-line routine to wait */ | ||
81 | ret = _DoC_WaitReady(docptr); | ||
82 | |||
83 | /* issue 2 read from NOP register after reading from CDSNControl register | ||
84 | see Software Requirement 11.4 item 2. */ | ||
85 | DoC_Delay(docptr, 2); | ||
86 | |||
87 | return ret; | ||
88 | } | ||
89 | |||
90 | /* DoC_Command: Send a flash command to the flash chip through the CDSN IO register | ||
91 | with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | ||
92 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | ||
93 | |||
94 | static void DoC_Command(void __iomem * docptr, unsigned char command, | ||
95 | unsigned char xtraflags) | ||
96 | { | ||
97 | /* Assert the CLE (Command Latch Enable) line to the flash chip */ | ||
98 | WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl); | ||
99 | DoC_Delay(docptr, 4); | ||
100 | |||
101 | /* Send the command */ | ||
102 | WriteDOC(command, docptr, Mil_CDSN_IO); | ||
103 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
104 | |||
105 | /* Lower the CLE line */ | ||
106 | WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl); | ||
107 | DoC_Delay(docptr, 4); | ||
108 | } | ||
109 | |||
110 | /* DoC_Address: Set the current address for the flash chip through the CDSN IO register | ||
111 | with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is | ||
112 | required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */ | ||
113 | |||
114 | static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs, | ||
115 | unsigned char xtraflags1, unsigned char xtraflags2) | ||
116 | { | ||
117 | /* Assert the ALE (Address Latch Enable) line to the flash chip */ | ||
118 | WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl); | ||
119 | DoC_Delay(docptr, 4); | ||
120 | |||
121 | /* Send the address */ | ||
122 | switch (numbytes) | ||
123 | { | ||
124 | case 1: | ||
125 | /* Send single byte, bits 0-7. */ | ||
126 | WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO); | ||
127 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
128 | break; | ||
129 | case 2: | ||
130 | /* Send bits 9-16 followed by 17-23 */ | ||
131 | WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO); | ||
132 | WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO); | ||
133 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
134 | break; | ||
135 | case 3: | ||
136 | /* Send 0-7, 9-16, then 17-23 */ | ||
137 | WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO); | ||
138 | WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO); | ||
139 | WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO); | ||
140 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
141 | break; | ||
142 | default: | ||
143 | return; | ||
144 | } | ||
145 | |||
146 | /* Lower the ALE line */ | ||
147 | WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl); | ||
148 | DoC_Delay(docptr, 4); | ||
149 | } | ||
150 | |||
151 | /* DoC_SelectChip: Select a given flash chip within the current floor */ | ||
152 | static int DoC_SelectChip(void __iomem * docptr, int chip) | ||
153 | { | ||
154 | /* Select the individual flash chip requested */ | ||
155 | WriteDOC(chip, docptr, CDSNDeviceSelect); | ||
156 | DoC_Delay(docptr, 4); | ||
157 | |||
158 | /* Wait for it to be ready */ | ||
159 | return DoC_WaitReady(docptr); | ||
160 | } | ||
161 | |||
162 | /* DoC_SelectFloor: Select a given floor (bank of flash chips) */ | ||
163 | static int DoC_SelectFloor(void __iomem * docptr, int floor) | ||
164 | { | ||
165 | /* Select the floor (bank) of chips required */ | ||
166 | WriteDOC(floor, docptr, FloorSelect); | ||
167 | |||
168 | /* Wait for the chip to be ready */ | ||
169 | return DoC_WaitReady(docptr); | ||
170 | } | ||
171 | |||
172 | /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */ | ||
173 | static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip) | ||
174 | { | ||
175 | int mfr, id, i, j; | ||
176 | volatile char dummy; | ||
177 | |||
178 | /* Page in the required floor/chip | ||
179 | FIXME: is this supported by Millennium ?? */ | ||
180 | DoC_SelectFloor(doc->virtadr, floor); | ||
181 | DoC_SelectChip(doc->virtadr, chip); | ||
182 | |||
183 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
184 | DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP); | ||
185 | DoC_WaitReady(doc->virtadr); | ||
186 | |||
187 | /* Read the NAND chip ID: 1. Send ReadID command */ | ||
188 | DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP); | ||
189 | |||
190 | /* Read the NAND chip ID: 2. Send address byte zero */ | ||
191 | DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00); | ||
192 | |||
193 | /* Read the manufacturer and device id codes of the flash device through | ||
194 | CDSN IO register see Software Requirement 11.4 item 5.*/ | ||
195 | dummy = ReadDOC(doc->virtadr, ReadPipeInit); | ||
196 | DoC_Delay(doc->virtadr, 2); | ||
197 | mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO); | ||
198 | |||
199 | DoC_Delay(doc->virtadr, 2); | ||
200 | id = ReadDOC(doc->virtadr, Mil_CDSN_IO); | ||
201 | dummy = ReadDOC(doc->virtadr, LastDataRead); | ||
202 | |||
203 | /* No response - return failure */ | ||
204 | if (mfr == 0xff || mfr == 0) | ||
205 | return 0; | ||
206 | |||
207 | /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */ | ||
208 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | ||
209 | if ( id == nand_flash_ids[i].id) { | ||
210 | /* Try to identify manufacturer */ | ||
211 | for (j = 0; nand_manuf_ids[j].id != 0x0; j++) { | ||
212 | if (nand_manuf_ids[j].id == mfr) | ||
213 | break; | ||
214 | } | ||
215 | printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, " | ||
216 | "Chip ID: %2.2X (%s:%s)\n", | ||
217 | mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name); | ||
218 | doc->mfr = mfr; | ||
219 | doc->id = id; | ||
220 | doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1; | ||
221 | break; | ||
222 | } | ||
223 | } | ||
224 | |||
225 | if (nand_flash_ids[i].name == NULL) | ||
226 | return 0; | ||
227 | else | ||
228 | return 1; | ||
229 | } | ||
230 | |||
231 | /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */ | ||
232 | static void DoC_ScanChips(struct DiskOnChip *this) | ||
233 | { | ||
234 | int floor, chip; | ||
235 | int numchips[MAX_FLOORS_MIL]; | ||
236 | int ret; | ||
237 | |||
238 | this->numchips = 0; | ||
239 | this->mfr = 0; | ||
240 | this->id = 0; | ||
241 | |||
242 | /* For each floor, find the number of valid chips it contains */ | ||
243 | for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) { | ||
244 | numchips[floor] = 0; | ||
245 | for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) { | ||
246 | ret = DoC_IdentChip(this, floor, chip); | ||
247 | if (ret) { | ||
248 | numchips[floor]++; | ||
249 | this->numchips++; | ||
250 | } | ||
251 | } | ||
252 | } | ||
253 | /* If there are none at all that we recognise, bail */ | ||
254 | if (!this->numchips) { | ||
255 | printk("No flash chips recognised.\n"); | ||
256 | return; | ||
257 | } | ||
258 | |||
259 | /* Allocate an array to hold the information for each chip */ | ||
260 | this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); | ||
261 | if (!this->chips){ | ||
262 | printk("No memory for allocating chip info structures\n"); | ||
263 | return; | ||
264 | } | ||
265 | |||
266 | /* Fill out the chip array with {floor, chipno} for each | ||
267 | * detected chip in the device. */ | ||
268 | for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) { | ||
269 | for (chip = 0 ; chip < numchips[floor] ; chip++) { | ||
270 | this->chips[ret].floor = floor; | ||
271 | this->chips[ret].chip = chip; | ||
272 | this->chips[ret].curadr = 0; | ||
273 | this->chips[ret].curmode = 0x50; | ||
274 | ret++; | ||
275 | } | ||
276 | } | ||
277 | |||
278 | /* Calculate and print the total size of the device */ | ||
279 | this->totlen = this->numchips * (1 << this->chipshift); | ||
280 | printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n", | ||
281 | this->numchips ,this->totlen >> 20); | ||
282 | } | ||
283 | |||
284 | static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2) | ||
285 | { | ||
286 | int tmp1, tmp2, retval; | ||
287 | |||
288 | if (doc1->physadr == doc2->physadr) | ||
289 | return 1; | ||
290 | |||
291 | /* Use the alias resolution register which was set aside for this | ||
292 | * purpose. If it's value is the same on both chips, they might | ||
293 | * be the same chip, and we write to one and check for a change in | ||
294 | * the other. It's unclear if this register is usuable in the | ||
295 | * DoC 2000 (it's in the Millenium docs), but it seems to work. */ | ||
296 | tmp1 = ReadDOC(doc1->virtadr, AliasResolution); | ||
297 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | ||
298 | if (tmp1 != tmp2) | ||
299 | return 0; | ||
300 | |||
301 | WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution); | ||
302 | tmp2 = ReadDOC(doc2->virtadr, AliasResolution); | ||
303 | if (tmp2 == (tmp1+1) % 0xff) | ||
304 | retval = 1; | ||
305 | else | ||
306 | retval = 0; | ||
307 | |||
308 | /* Restore register contents. May not be necessary, but do it just to | ||
309 | * be safe. */ | ||
310 | WriteDOC(tmp1, doc1->virtadr, AliasResolution); | ||
311 | |||
312 | return retval; | ||
313 | } | ||
314 | |||
315 | /* This routine is found from the docprobe code by symbol_get(), | ||
316 | * which will bump the use count of this module. */ | ||
317 | void DoCMil_init(struct mtd_info *mtd) | ||
318 | { | ||
319 | struct DiskOnChip *this = mtd->priv; | ||
320 | struct DiskOnChip *old = NULL; | ||
321 | |||
322 | /* We must avoid being called twice for the same device. */ | ||
323 | if (docmillist) | ||
324 | old = docmillist->priv; | ||
325 | |||
326 | while (old) { | ||
327 | if (DoCMil_is_alias(this, old)) { | ||
328 | printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at " | ||
329 | "0x%lX - already configured\n", this->physadr); | ||
330 | iounmap(this->virtadr); | ||
331 | kfree(mtd); | ||
332 | return; | ||
333 | } | ||
334 | if (old->nextdoc) | ||
335 | old = old->nextdoc->priv; | ||
336 | else | ||
337 | old = NULL; | ||
338 | } | ||
339 | |||
340 | mtd->name = "DiskOnChip Millennium"; | ||
341 | printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n", | ||
342 | this->physadr); | ||
343 | |||
344 | mtd->type = MTD_NANDFLASH; | ||
345 | mtd->flags = MTD_CAP_NANDFLASH; | ||
346 | |||
347 | /* FIXME: erase size is not always 8KiB */ | ||
348 | mtd->erasesize = 0x2000; | ||
349 | mtd->writebufsize = mtd->writesize = 512; | ||
350 | mtd->oobsize = 16; | ||
351 | mtd->ecc_strength = 2; | ||
352 | mtd->owner = THIS_MODULE; | ||
353 | mtd->_erase = doc_erase; | ||
354 | mtd->_read = doc_read; | ||
355 | mtd->_write = doc_write; | ||
356 | mtd->_read_oob = doc_read_oob; | ||
357 | mtd->_write_oob = doc_write_oob; | ||
358 | this->curfloor = -1; | ||
359 | this->curchip = -1; | ||
360 | |||
361 | /* Ident all the chips present. */ | ||
362 | DoC_ScanChips(this); | ||
363 | |||
364 | if (!this->totlen) { | ||
365 | kfree(mtd); | ||
366 | iounmap(this->virtadr); | ||
367 | } else { | ||
368 | this->nextdoc = docmillist; | ||
369 | docmillist = mtd; | ||
370 | mtd->size = this->totlen; | ||
371 | mtd_device_register(mtd, NULL, 0); | ||
372 | return; | ||
373 | } | ||
374 | } | ||
375 | EXPORT_SYMBOL_GPL(DoCMil_init); | ||
376 | |||
377 | static int doc_read (struct mtd_info *mtd, loff_t from, size_t len, | ||
378 | size_t *retlen, u_char *buf) | ||
379 | { | ||
380 | int i, ret; | ||
381 | volatile char dummy; | ||
382 | unsigned char syndrome[6], eccbuf[6]; | ||
383 | struct DiskOnChip *this = mtd->priv; | ||
384 | void __iomem *docptr = this->virtadr; | ||
385 | struct Nand *mychip = &this->chips[from >> (this->chipshift)]; | ||
386 | |||
387 | /* Don't allow a single read to cross a 512-byte block boundary */ | ||
388 | if (from + len > ((from | 0x1ff) + 1)) | ||
389 | len = ((from | 0x1ff) + 1) - from; | ||
390 | |||
391 | /* Find the chip which is to be used and select it */ | ||
392 | if (this->curfloor != mychip->floor) { | ||
393 | DoC_SelectFloor(docptr, mychip->floor); | ||
394 | DoC_SelectChip(docptr, mychip->chip); | ||
395 | } else if (this->curchip != mychip->chip) { | ||
396 | DoC_SelectChip(docptr, mychip->chip); | ||
397 | } | ||
398 | this->curfloor = mychip->floor; | ||
399 | this->curchip = mychip->chip; | ||
400 | |||
401 | /* issue the Read0 or Read1 command depend on which half of the page | ||
402 | we are accessing. Polling the Flash Ready bit after issue 3 bytes | ||
403 | address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/ | ||
404 | DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP); | ||
405 | DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00); | ||
406 | DoC_WaitReady(docptr); | ||
407 | |||
408 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | ||
409 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | ||
410 | WriteDOC (DOC_ECC_EN, docptr, ECCConf); | ||
411 | |||
412 | /* Read the data via the internal pipeline through CDSN IO register, | ||
413 | see Pipelined Read Operations 11.3 */ | ||
414 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
415 | #ifndef USE_MEMCPY | ||
416 | for (i = 0; i < len-1; i++) { | ||
417 | /* N.B. you have to increase the source address in this way or the | ||
418 | ECC logic will not work properly */ | ||
419 | buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff)); | ||
420 | } | ||
421 | #else | ||
422 | memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1); | ||
423 | #endif | ||
424 | buf[len - 1] = ReadDOC(docptr, LastDataRead); | ||
425 | |||
426 | /* Let the caller know we completed it */ | ||
427 | *retlen = len; | ||
428 | ret = 0; | ||
429 | |||
430 | /* Read the ECC data from Spare Data Area, | ||
431 | see Reed-Solomon EDC/ECC 11.1 */ | ||
432 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
433 | #ifndef USE_MEMCPY | ||
434 | for (i = 0; i < 5; i++) { | ||
435 | /* N.B. you have to increase the source address in this way or the | ||
436 | ECC logic will not work properly */ | ||
437 | eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i); | ||
438 | } | ||
439 | #else | ||
440 | memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5); | ||
441 | #endif | ||
442 | eccbuf[5] = ReadDOC(docptr, LastDataRead); | ||
443 | |||
444 | /* Flush the pipeline */ | ||
445 | dummy = ReadDOC(docptr, ECCConf); | ||
446 | dummy = ReadDOC(docptr, ECCConf); | ||
447 | |||
448 | /* Check the ECC Status */ | ||
449 | if (ReadDOC(docptr, ECCConf) & 0x80) { | ||
450 | int nb_errors; | ||
451 | /* There was an ECC error */ | ||
452 | #ifdef ECC_DEBUG | ||
453 | printk("DiskOnChip ECC Error: Read at %lx\n", (long)from); | ||
454 | #endif | ||
455 | /* Read the ECC syndrome through the DiskOnChip ECC logic. | ||
456 | These syndrome will be all ZERO when there is no error */ | ||
457 | for (i = 0; i < 6; i++) { | ||
458 | syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i); | ||
459 | } | ||
460 | nb_errors = doc_decode_ecc(buf, syndrome); | ||
461 | #ifdef ECC_DEBUG | ||
462 | printk("ECC Errors corrected: %x\n", nb_errors); | ||
463 | #endif | ||
464 | if (nb_errors < 0) { | ||
465 | /* We return error, but have actually done the read. Not that | ||
466 | this can be told to user-space, via sys_read(), but at least | ||
467 | MTD-aware stuff can know about it by checking *retlen */ | ||
468 | ret = -EIO; | ||
469 | } | ||
470 | } | ||
471 | |||
472 | #ifdef PSYCHO_DEBUG | ||
473 | printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | ||
474 | (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | ||
475 | eccbuf[4], eccbuf[5]); | ||
476 | #endif | ||
477 | |||
478 | /* disable the ECC engine */ | ||
479 | WriteDOC(DOC_ECC_DIS, docptr , ECCConf); | ||
480 | |||
481 | return ret; | ||
482 | } | ||
483 | |||
484 | static int doc_write (struct mtd_info *mtd, loff_t to, size_t len, | ||
485 | size_t *retlen, const u_char *buf) | ||
486 | { | ||
487 | int i,ret = 0; | ||
488 | char eccbuf[6]; | ||
489 | volatile char dummy; | ||
490 | struct DiskOnChip *this = mtd->priv; | ||
491 | void __iomem *docptr = this->virtadr; | ||
492 | struct Nand *mychip = &this->chips[to >> (this->chipshift)]; | ||
493 | |||
494 | #if 0 | ||
495 | /* Don't allow a single write to cross a 512-byte block boundary */ | ||
496 | if (to + len > ( (to | 0x1ff) + 1)) | ||
497 | len = ((to | 0x1ff) + 1) - to; | ||
498 | #else | ||
499 | /* Don't allow writes which aren't exactly one block */ | ||
500 | if (to & 0x1ff || len != 0x200) | ||
501 | return -EINVAL; | ||
502 | #endif | ||
503 | |||
504 | /* Find the chip which is to be used and select it */ | ||
505 | if (this->curfloor != mychip->floor) { | ||
506 | DoC_SelectFloor(docptr, mychip->floor); | ||
507 | DoC_SelectChip(docptr, mychip->chip); | ||
508 | } else if (this->curchip != mychip->chip) { | ||
509 | DoC_SelectChip(docptr, mychip->chip); | ||
510 | } | ||
511 | this->curfloor = mychip->floor; | ||
512 | this->curchip = mychip->chip; | ||
513 | |||
514 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
515 | DoC_Command(docptr, NAND_CMD_RESET, 0x00); | ||
516 | DoC_WaitReady(docptr); | ||
517 | /* Set device to main plane of flash */ | ||
518 | DoC_Command(docptr, NAND_CMD_READ0, 0x00); | ||
519 | |||
520 | /* issue the Serial Data In command to initial the Page Program process */ | ||
521 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | ||
522 | DoC_Address(docptr, 3, to, 0x00, 0x00); | ||
523 | DoC_WaitReady(docptr); | ||
524 | |||
525 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | ||
526 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | ||
527 | WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf); | ||
528 | |||
529 | /* Write the data via the internal pipeline through CDSN IO register, | ||
530 | see Pipelined Write Operations 11.2 */ | ||
531 | #ifndef USE_MEMCPY | ||
532 | for (i = 0; i < len; i++) { | ||
533 | /* N.B. you have to increase the source address in this way or the | ||
534 | ECC logic will not work properly */ | ||
535 | WriteDOC(buf[i], docptr, Mil_CDSN_IO + i); | ||
536 | } | ||
537 | #else | ||
538 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len); | ||
539 | #endif | ||
540 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
541 | |||
542 | /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic | ||
543 | see Reed-Solomon EDC/ECC 11.1 */ | ||
544 | WriteDOC(0, docptr, NOP); | ||
545 | WriteDOC(0, docptr, NOP); | ||
546 | WriteDOC(0, docptr, NOP); | ||
547 | |||
548 | /* Read the ECC data through the DiskOnChip ECC logic */ | ||
549 | for (i = 0; i < 6; i++) { | ||
550 | eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i); | ||
551 | } | ||
552 | |||
553 | /* ignore the ECC engine */ | ||
554 | WriteDOC(DOC_ECC_DIS, docptr , ECCConf); | ||
555 | |||
556 | #ifndef USE_MEMCPY | ||
557 | /* Write the ECC data to flash */ | ||
558 | for (i = 0; i < 6; i++) { | ||
559 | /* N.B. you have to increase the source address in this way or the | ||
560 | ECC logic will not work properly */ | ||
561 | WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i); | ||
562 | } | ||
563 | #else | ||
564 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6); | ||
565 | #endif | ||
566 | |||
567 | /* write the block status BLOCK_USED (0x5555) at the end of ECC data | ||
568 | FIXME: this is only a hack for programming the IPL area for LinuxBIOS | ||
569 | and should be replace with proper codes in user space utilities */ | ||
570 | WriteDOC(0x55, docptr, Mil_CDSN_IO); | ||
571 | WriteDOC(0x55, docptr, Mil_CDSN_IO + 1); | ||
572 | |||
573 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
574 | |||
575 | #ifdef PSYCHO_DEBUG | ||
576 | printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | ||
577 | (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | ||
578 | eccbuf[4], eccbuf[5]); | ||
579 | #endif | ||
580 | |||
581 | /* Commit the Page Program command and wait for ready | ||
582 | see Software Requirement 11.4 item 1.*/ | ||
583 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | ||
584 | DoC_WaitReady(docptr); | ||
585 | |||
586 | /* Read the status of the flash device through CDSN IO register | ||
587 | see Software Requirement 11.4 item 5.*/ | ||
588 | DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP); | ||
589 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
590 | DoC_Delay(docptr, 2); | ||
591 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | ||
592 | printk("Error programming flash\n"); | ||
593 | /* Error in programming | ||
594 | FIXME: implement Bad Block Replacement (in nftl.c ??) */ | ||
595 | ret = -EIO; | ||
596 | } | ||
597 | dummy = ReadDOC(docptr, LastDataRead); | ||
598 | |||
599 | /* Let the caller know we completed it */ | ||
600 | *retlen = len; | ||
601 | |||
602 | return ret; | ||
603 | } | ||
604 | |||
605 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
606 | struct mtd_oob_ops *ops) | ||
607 | { | ||
608 | #ifndef USE_MEMCPY | ||
609 | int i; | ||
610 | #endif | ||
611 | volatile char dummy; | ||
612 | struct DiskOnChip *this = mtd->priv; | ||
613 | void __iomem *docptr = this->virtadr; | ||
614 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
615 | uint8_t *buf = ops->oobbuf; | ||
616 | size_t len = ops->len; | ||
617 | |||
618 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
619 | |||
620 | ofs += ops->ooboffs; | ||
621 | |||
622 | /* Find the chip which is to be used and select it */ | ||
623 | if (this->curfloor != mychip->floor) { | ||
624 | DoC_SelectFloor(docptr, mychip->floor); | ||
625 | DoC_SelectChip(docptr, mychip->chip); | ||
626 | } else if (this->curchip != mychip->chip) { | ||
627 | DoC_SelectChip(docptr, mychip->chip); | ||
628 | } | ||
629 | this->curfloor = mychip->floor; | ||
630 | this->curchip = mychip->chip; | ||
631 | |||
632 | /* disable the ECC engine */ | ||
633 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | ||
634 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | ||
635 | |||
636 | /* issue the Read2 command to set the pointer to the Spare Data Area. | ||
637 | Polling the Flash Ready bit after issue 3 bytes address in | ||
638 | Sequence Read Mode, see Software Requirement 11.4 item 1.*/ | ||
639 | DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP); | ||
640 | DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00); | ||
641 | DoC_WaitReady(docptr); | ||
642 | |||
643 | /* Read the data out via the internal pipeline through CDSN IO register, | ||
644 | see Pipelined Read Operations 11.3 */ | ||
645 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
646 | #ifndef USE_MEMCPY | ||
647 | for (i = 0; i < len-1; i++) { | ||
648 | /* N.B. you have to increase the source address in this way or the | ||
649 | ECC logic will not work properly */ | ||
650 | buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i); | ||
651 | } | ||
652 | #else | ||
653 | memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1); | ||
654 | #endif | ||
655 | buf[len - 1] = ReadDOC(docptr, LastDataRead); | ||
656 | |||
657 | ops->retlen = len; | ||
658 | |||
659 | return 0; | ||
660 | } | ||
661 | |||
662 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
663 | struct mtd_oob_ops *ops) | ||
664 | { | ||
665 | #ifndef USE_MEMCPY | ||
666 | int i; | ||
667 | #endif | ||
668 | volatile char dummy; | ||
669 | int ret = 0; | ||
670 | struct DiskOnChip *this = mtd->priv; | ||
671 | void __iomem *docptr = this->virtadr; | ||
672 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
673 | uint8_t *buf = ops->oobbuf; | ||
674 | size_t len = ops->len; | ||
675 | |||
676 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
677 | |||
678 | ofs += ops->ooboffs; | ||
679 | |||
680 | /* Find the chip which is to be used and select it */ | ||
681 | if (this->curfloor != mychip->floor) { | ||
682 | DoC_SelectFloor(docptr, mychip->floor); | ||
683 | DoC_SelectChip(docptr, mychip->chip); | ||
684 | } else if (this->curchip != mychip->chip) { | ||
685 | DoC_SelectChip(docptr, mychip->chip); | ||
686 | } | ||
687 | this->curfloor = mychip->floor; | ||
688 | this->curchip = mychip->chip; | ||
689 | |||
690 | /* disable the ECC engine */ | ||
691 | WriteDOC (DOC_ECC_RESET, docptr, ECCConf); | ||
692 | WriteDOC (DOC_ECC_DIS, docptr, ECCConf); | ||
693 | |||
694 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
695 | DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP); | ||
696 | DoC_WaitReady(docptr); | ||
697 | /* issue the Read2 command to set the pointer to the Spare Data Area. */ | ||
698 | DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP); | ||
699 | |||
700 | /* issue the Serial Data In command to initial the Page Program process */ | ||
701 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | ||
702 | DoC_Address(docptr, 3, ofs, 0x00, 0x00); | ||
703 | |||
704 | /* Write the data via the internal pipeline through CDSN IO register, | ||
705 | see Pipelined Write Operations 11.2 */ | ||
706 | #ifndef USE_MEMCPY | ||
707 | for (i = 0; i < len; i++) { | ||
708 | /* N.B. you have to increase the source address in this way or the | ||
709 | ECC logic will not work properly */ | ||
710 | WriteDOC(buf[i], docptr, Mil_CDSN_IO + i); | ||
711 | } | ||
712 | #else | ||
713 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len); | ||
714 | #endif | ||
715 | WriteDOC(0x00, docptr, WritePipeTerm); | ||
716 | |||
717 | /* Commit the Page Program command and wait for ready | ||
718 | see Software Requirement 11.4 item 1.*/ | ||
719 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | ||
720 | DoC_WaitReady(docptr); | ||
721 | |||
722 | /* Read the status of the flash device through CDSN IO register | ||
723 | see Software Requirement 11.4 item 5.*/ | ||
724 | DoC_Command(docptr, NAND_CMD_STATUS, 0x00); | ||
725 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
726 | DoC_Delay(docptr, 2); | ||
727 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | ||
728 | printk("Error programming oob data\n"); | ||
729 | /* FIXME: implement Bad Block Replacement (in nftl.c ??) */ | ||
730 | ops->retlen = 0; | ||
731 | ret = -EIO; | ||
732 | } | ||
733 | dummy = ReadDOC(docptr, LastDataRead); | ||
734 | |||
735 | ops->retlen = len; | ||
736 | |||
737 | return ret; | ||
738 | } | ||
739 | |||
740 | int doc_erase (struct mtd_info *mtd, struct erase_info *instr) | ||
741 | { | ||
742 | volatile char dummy; | ||
743 | struct DiskOnChip *this = mtd->priv; | ||
744 | __u32 ofs = instr->addr; | ||
745 | __u32 len = instr->len; | ||
746 | void __iomem *docptr = this->virtadr; | ||
747 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
748 | |||
749 | if (len != mtd->erasesize) | ||
750 | printk(KERN_WARNING "Erase not right size (%x != %x)n", | ||
751 | len, mtd->erasesize); | ||
752 | |||
753 | /* Find the chip which is to be used and select it */ | ||
754 | if (this->curfloor != mychip->floor) { | ||
755 | DoC_SelectFloor(docptr, mychip->floor); | ||
756 | DoC_SelectChip(docptr, mychip->chip); | ||
757 | } else if (this->curchip != mychip->chip) { | ||
758 | DoC_SelectChip(docptr, mychip->chip); | ||
759 | } | ||
760 | this->curfloor = mychip->floor; | ||
761 | this->curchip = mychip->chip; | ||
762 | |||
763 | instr->state = MTD_ERASE_PENDING; | ||
764 | |||
765 | /* issue the Erase Setup command */ | ||
766 | DoC_Command(docptr, NAND_CMD_ERASE1, 0x00); | ||
767 | DoC_Address(docptr, 2, ofs, 0x00, 0x00); | ||
768 | |||
769 | /* Commit the Erase Start command and wait for ready | ||
770 | see Software Requirement 11.4 item 1.*/ | ||
771 | DoC_Command(docptr, NAND_CMD_ERASE2, 0x00); | ||
772 | DoC_WaitReady(docptr); | ||
773 | |||
774 | instr->state = MTD_ERASING; | ||
775 | |||
776 | /* Read the status of the flash device through CDSN IO register | ||
777 | see Software Requirement 11.4 item 5. | ||
778 | FIXME: it seems that we are not wait long enough, some blocks are not | ||
779 | erased fully */ | ||
780 | DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP); | ||
781 | dummy = ReadDOC(docptr, ReadPipeInit); | ||
782 | DoC_Delay(docptr, 2); | ||
783 | if (ReadDOC(docptr, Mil_CDSN_IO) & 1) { | ||
784 | printk("Error Erasing at 0x%x\n", ofs); | ||
785 | /* There was an error | ||
786 | FIXME: implement Bad Block Replacement (in nftl.c ??) */ | ||
787 | instr->state = MTD_ERASE_FAILED; | ||
788 | } else | ||
789 | instr->state = MTD_ERASE_DONE; | ||
790 | dummy = ReadDOC(docptr, LastDataRead); | ||
791 | |||
792 | mtd_erase_callback(instr); | ||
793 | |||
794 | return 0; | ||
795 | } | ||
796 | |||
797 | /**************************************************************************** | ||
798 | * | ||
799 | * Module stuff | ||
800 | * | ||
801 | ****************************************************************************/ | ||
802 | |||
803 | static void __exit cleanup_doc2001(void) | ||
804 | { | ||
805 | struct mtd_info *mtd; | ||
806 | struct DiskOnChip *this; | ||
807 | |||
808 | while ((mtd=docmillist)) { | ||
809 | this = mtd->priv; | ||
810 | docmillist = this->nextdoc; | ||
811 | |||
812 | mtd_device_unregister(mtd); | ||
813 | |||
814 | iounmap(this->virtadr); | ||
815 | kfree(this->chips); | ||
816 | kfree(mtd); | ||
817 | } | ||
818 | } | ||
819 | |||
820 | module_exit(cleanup_doc2001); | ||
821 | |||
822 | MODULE_LICENSE("GPL"); | ||
823 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al."); | ||
824 | MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium"); | ||
diff --git a/drivers/mtd/devices/doc2001plus.c b/drivers/mtd/devices/doc2001plus.c deleted file mode 100644 index 4f2220ad8924..000000000000 --- a/drivers/mtd/devices/doc2001plus.c +++ /dev/null | |||
@@ -1,1080 +0,0 @@ | |||
1 | /* | ||
2 | * Linux driver for Disk-On-Chip Millennium Plus | ||
3 | * | ||
4 | * (c) 2002-2003 Greg Ungerer <gerg@snapgear.com> | ||
5 | * (c) 2002-2003 SnapGear Inc | ||
6 | * (c) 1999 Machine Vision Holdings, Inc. | ||
7 | * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org> | ||
8 | * | ||
9 | * Released under GPL | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <asm/errno.h> | ||
15 | #include <asm/io.h> | ||
16 | #include <asm/uaccess.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/slab.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/types.h> | ||
21 | #include <linux/bitops.h> | ||
22 | |||
23 | #include <linux/mtd/mtd.h> | ||
24 | #include <linux/mtd/nand.h> | ||
25 | #include <linux/mtd/doc2000.h> | ||
26 | |||
27 | /* #define ECC_DEBUG */ | ||
28 | |||
29 | /* I have no idea why some DoC chips can not use memcop_form|to_io(). | ||
30 | * This may be due to the different revisions of the ASIC controller built-in or | ||
31 | * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment | ||
32 | * this:*/ | ||
33 | #undef USE_MEMCPY | ||
34 | |||
35 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
36 | size_t *retlen, u_char *buf); | ||
37 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
38 | size_t *retlen, const u_char *buf); | ||
39 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
40 | struct mtd_oob_ops *ops); | ||
41 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
42 | struct mtd_oob_ops *ops); | ||
43 | static int doc_erase (struct mtd_info *mtd, struct erase_info *instr); | ||
44 | |||
45 | static struct mtd_info *docmilpluslist = NULL; | ||
46 | |||
47 | |||
48 | /* Perform the required delay cycles by writing to the NOP register */ | ||
49 | static void DoC_Delay(void __iomem * docptr, int cycles) | ||
50 | { | ||
51 | int i; | ||
52 | |||
53 | for (i = 0; (i < cycles); i++) | ||
54 | WriteDOC(0, docptr, Mplus_NOP); | ||
55 | } | ||
56 | |||
57 | #define CDSN_CTRL_FR_B_MASK (CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1) | ||
58 | |||
59 | /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */ | ||
60 | static int _DoC_WaitReady(void __iomem * docptr) | ||
61 | { | ||
62 | unsigned int c = 0xffff; | ||
63 | |||
64 | pr_debug("_DoC_WaitReady called for out-of-line wait\n"); | ||
65 | |||
66 | /* Out-of-line routine to wait for chip response */ | ||
67 | while (((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) && --c) | ||
68 | ; | ||
69 | |||
70 | if (c == 0) | ||
71 | pr_debug("_DoC_WaitReady timed out.\n"); | ||
72 | |||
73 | return (c == 0); | ||
74 | } | ||
75 | |||
76 | static inline int DoC_WaitReady(void __iomem * docptr) | ||
77 | { | ||
78 | /* This is inline, to optimise the common case, where it's ready instantly */ | ||
79 | int ret = 0; | ||
80 | |||
81 | /* read form NOP register should be issued prior to the read from CDSNControl | ||
82 | see Software Requirement 11.4 item 2. */ | ||
83 | DoC_Delay(docptr, 4); | ||
84 | |||
85 | if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) | ||
86 | /* Call the out-of-line routine to wait */ | ||
87 | ret = _DoC_WaitReady(docptr); | ||
88 | |||
89 | return ret; | ||
90 | } | ||
91 | |||
92 | /* For some reason the Millennium Plus seems to occasionally put itself | ||
93 | * into reset mode. For me this happens randomly, with no pattern that I | ||
94 | * can detect. M-systems suggest always check this on any block level | ||
95 | * operation and setting to normal mode if in reset mode. | ||
96 | */ | ||
97 | static inline void DoC_CheckASIC(void __iomem * docptr) | ||
98 | { | ||
99 | /* Make sure the DoC is in normal mode */ | ||
100 | if ((ReadDOC(docptr, Mplus_DOCControl) & DOC_MODE_NORMAL) == 0) { | ||
101 | WriteDOC((DOC_MODE_NORMAL | DOC_MODE_MDWREN), docptr, Mplus_DOCControl); | ||
102 | WriteDOC(~(DOC_MODE_NORMAL | DOC_MODE_MDWREN), docptr, Mplus_CtrlConfirm); | ||
103 | } | ||
104 | } | ||
105 | |||
106 | /* DoC_Command: Send a flash command to the flash chip through the Flash | ||
107 | * command register. Need 2 Write Pipeline Terminates to complete send. | ||
108 | */ | ||
109 | static void DoC_Command(void __iomem * docptr, unsigned char command, | ||
110 | unsigned char xtraflags) | ||
111 | { | ||
112 | WriteDOC(command, docptr, Mplus_FlashCmd); | ||
113 | WriteDOC(command, docptr, Mplus_WritePipeTerm); | ||
114 | WriteDOC(command, docptr, Mplus_WritePipeTerm); | ||
115 | } | ||
116 | |||
117 | /* DoC_Address: Set the current address for the flash chip through the Flash | ||
118 | * Address register. Need 2 Write Pipeline Terminates to complete send. | ||
119 | */ | ||
120 | static inline void DoC_Address(struct DiskOnChip *doc, int numbytes, | ||
121 | unsigned long ofs, unsigned char xtraflags1, | ||
122 | unsigned char xtraflags2) | ||
123 | { | ||
124 | void __iomem * docptr = doc->virtadr; | ||
125 | |||
126 | /* Allow for possible Mill Plus internal flash interleaving */ | ||
127 | ofs >>= doc->interleave; | ||
128 | |||
129 | switch (numbytes) { | ||
130 | case 1: | ||
131 | /* Send single byte, bits 0-7. */ | ||
132 | WriteDOC(ofs & 0xff, docptr, Mplus_FlashAddress); | ||
133 | break; | ||
134 | case 2: | ||
135 | /* Send bits 9-16 followed by 17-23 */ | ||
136 | WriteDOC((ofs >> 9) & 0xff, docptr, Mplus_FlashAddress); | ||
137 | WriteDOC((ofs >> 17) & 0xff, docptr, Mplus_FlashAddress); | ||
138 | break; | ||
139 | case 3: | ||
140 | /* Send 0-7, 9-16, then 17-23 */ | ||
141 | WriteDOC(ofs & 0xff, docptr, Mplus_FlashAddress); | ||
142 | WriteDOC((ofs >> 9) & 0xff, docptr, Mplus_FlashAddress); | ||
143 | WriteDOC((ofs >> 17) & 0xff, docptr, Mplus_FlashAddress); | ||
144 | break; | ||
145 | default: | ||
146 | return; | ||
147 | } | ||
148 | |||
149 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
150 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
151 | } | ||
152 | |||
153 | /* DoC_SelectChip: Select a given flash chip within the current floor */ | ||
154 | static int DoC_SelectChip(void __iomem * docptr, int chip) | ||
155 | { | ||
156 | /* No choice for flash chip on Millennium Plus */ | ||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | /* DoC_SelectFloor: Select a given floor (bank of flash chips) */ | ||
161 | static int DoC_SelectFloor(void __iomem * docptr, int floor) | ||
162 | { | ||
163 | WriteDOC((floor & 0x3), docptr, Mplus_DeviceSelect); | ||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | /* | ||
168 | * Translate the given offset into the appropriate command and offset. | ||
169 | * This does the mapping using the 16bit interleave layout defined by | ||
170 | * M-Systems, and looks like this for a sector pair: | ||
171 | * +-----------+-------+-------+-------+--------------+---------+-----------+ | ||
172 | * | 0 --- 511 |512-517|518-519|520-521| 522 --- 1033 |1034-1039|1040 - 1055| | ||
173 | * +-----------+-------+-------+-------+--------------+---------+-----------+ | ||
174 | * | Data 0 | ECC 0 |Flags0 |Flags1 | Data 1 |ECC 1 | OOB 1 + 2 | | ||
175 | * +-----------+-------+-------+-------+--------------+---------+-----------+ | ||
176 | */ | ||
177 | /* FIXME: This lives in INFTL not here. Other users of flash devices | ||
178 | may not want it */ | ||
179 | static unsigned int DoC_GetDataOffset(struct mtd_info *mtd, loff_t *from) | ||
180 | { | ||
181 | struct DiskOnChip *this = mtd->priv; | ||
182 | |||
183 | if (this->interleave) { | ||
184 | unsigned int ofs = *from & 0x3ff; | ||
185 | unsigned int cmd; | ||
186 | |||
187 | if (ofs < 512) { | ||
188 | cmd = NAND_CMD_READ0; | ||
189 | ofs &= 0x1ff; | ||
190 | } else if (ofs < 1014) { | ||
191 | cmd = NAND_CMD_READ1; | ||
192 | ofs = (ofs & 0x1ff) + 10; | ||
193 | } else { | ||
194 | cmd = NAND_CMD_READOOB; | ||
195 | ofs = ofs - 1014; | ||
196 | } | ||
197 | |||
198 | *from = (*from & ~0x3ff) | ofs; | ||
199 | return cmd; | ||
200 | } else { | ||
201 | /* No interleave */ | ||
202 | if ((*from) & 0x100) | ||
203 | return NAND_CMD_READ1; | ||
204 | return NAND_CMD_READ0; | ||
205 | } | ||
206 | } | ||
207 | |||
208 | static unsigned int DoC_GetECCOffset(struct mtd_info *mtd, loff_t *from) | ||
209 | { | ||
210 | unsigned int ofs, cmd; | ||
211 | |||
212 | if (*from & 0x200) { | ||
213 | cmd = NAND_CMD_READOOB; | ||
214 | ofs = 10 + (*from & 0xf); | ||
215 | } else { | ||
216 | cmd = NAND_CMD_READ1; | ||
217 | ofs = (*from & 0xf); | ||
218 | } | ||
219 | |||
220 | *from = (*from & ~0x3ff) | ofs; | ||
221 | return cmd; | ||
222 | } | ||
223 | |||
224 | static unsigned int DoC_GetFlagsOffset(struct mtd_info *mtd, loff_t *from) | ||
225 | { | ||
226 | unsigned int ofs, cmd; | ||
227 | |||
228 | cmd = NAND_CMD_READ1; | ||
229 | ofs = (*from & 0x200) ? 8 : 6; | ||
230 | *from = (*from & ~0x3ff) | ofs; | ||
231 | return cmd; | ||
232 | } | ||
233 | |||
234 | static unsigned int DoC_GetHdrOffset(struct mtd_info *mtd, loff_t *from) | ||
235 | { | ||
236 | unsigned int ofs, cmd; | ||
237 | |||
238 | cmd = NAND_CMD_READOOB; | ||
239 | ofs = (*from & 0x200) ? 24 : 16; | ||
240 | *from = (*from & ~0x3ff) | ofs; | ||
241 | return cmd; | ||
242 | } | ||
243 | |||
244 | static inline void MemReadDOC(void __iomem * docptr, unsigned char *buf, int len) | ||
245 | { | ||
246 | #ifndef USE_MEMCPY | ||
247 | int i; | ||
248 | for (i = 0; i < len; i++) | ||
249 | buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i); | ||
250 | #else | ||
251 | memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len); | ||
252 | #endif | ||
253 | } | ||
254 | |||
255 | static inline void MemWriteDOC(void __iomem * docptr, unsigned char *buf, int len) | ||
256 | { | ||
257 | #ifndef USE_MEMCPY | ||
258 | int i; | ||
259 | for (i = 0; i < len; i++) | ||
260 | WriteDOC(buf[i], docptr, Mil_CDSN_IO + i); | ||
261 | #else | ||
262 | memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len); | ||
263 | #endif | ||
264 | } | ||
265 | |||
266 | /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */ | ||
267 | static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip) | ||
268 | { | ||
269 | int mfr, id, i, j; | ||
270 | volatile char dummy; | ||
271 | void __iomem * docptr = doc->virtadr; | ||
272 | |||
273 | /* Page in the required floor/chip */ | ||
274 | DoC_SelectFloor(docptr, floor); | ||
275 | DoC_SelectChip(docptr, chip); | ||
276 | |||
277 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
278 | WriteDOC((DOC_FLASH_CE | DOC_FLASH_WP), docptr, Mplus_FlashSelect); | ||
279 | |||
280 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
281 | DoC_Command(docptr, NAND_CMD_RESET, 0); | ||
282 | DoC_WaitReady(docptr); | ||
283 | |||
284 | /* Read the NAND chip ID: 1. Send ReadID command */ | ||
285 | DoC_Command(docptr, NAND_CMD_READID, 0); | ||
286 | |||
287 | /* Read the NAND chip ID: 2. Send address byte zero */ | ||
288 | DoC_Address(doc, 1, 0x00, 0, 0x00); | ||
289 | |||
290 | WriteDOC(0, docptr, Mplus_FlashControl); | ||
291 | DoC_WaitReady(docptr); | ||
292 | |||
293 | /* Read the manufacturer and device id codes of the flash device through | ||
294 | CDSN IO register see Software Requirement 11.4 item 5.*/ | ||
295 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
296 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
297 | |||
298 | mfr = ReadDOC(docptr, Mil_CDSN_IO); | ||
299 | if (doc->interleave) | ||
300 | dummy = ReadDOC(docptr, Mil_CDSN_IO); /* 2 way interleave */ | ||
301 | |||
302 | id = ReadDOC(docptr, Mil_CDSN_IO); | ||
303 | if (doc->interleave) | ||
304 | dummy = ReadDOC(docptr, Mil_CDSN_IO); /* 2 way interleave */ | ||
305 | |||
306 | dummy = ReadDOC(docptr, Mplus_LastDataRead); | ||
307 | dummy = ReadDOC(docptr, Mplus_LastDataRead); | ||
308 | |||
309 | /* Disable flash internally */ | ||
310 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
311 | |||
312 | /* No response - return failure */ | ||
313 | if (mfr == 0xff || mfr == 0) | ||
314 | return 0; | ||
315 | |||
316 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | ||
317 | if (id == nand_flash_ids[i].id) { | ||
318 | /* Try to identify manufacturer */ | ||
319 | for (j = 0; nand_manuf_ids[j].id != 0x0; j++) { | ||
320 | if (nand_manuf_ids[j].id == mfr) | ||
321 | break; | ||
322 | } | ||
323 | printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, " | ||
324 | "Chip ID: %2.2X (%s:%s)\n", mfr, id, | ||
325 | nand_manuf_ids[j].name, nand_flash_ids[i].name); | ||
326 | doc->mfr = mfr; | ||
327 | doc->id = id; | ||
328 | doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1; | ||
329 | doc->erasesize = nand_flash_ids[i].erasesize << doc->interleave; | ||
330 | break; | ||
331 | } | ||
332 | } | ||
333 | |||
334 | if (nand_flash_ids[i].name == NULL) | ||
335 | return 0; | ||
336 | return 1; | ||
337 | } | ||
338 | |||
339 | /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */ | ||
340 | static void DoC_ScanChips(struct DiskOnChip *this) | ||
341 | { | ||
342 | int floor, chip; | ||
343 | int numchips[MAX_FLOORS_MPLUS]; | ||
344 | int ret; | ||
345 | |||
346 | this->numchips = 0; | ||
347 | this->mfr = 0; | ||
348 | this->id = 0; | ||
349 | |||
350 | /* Work out the intended interleave setting */ | ||
351 | this->interleave = 0; | ||
352 | if (this->ChipID == DOC_ChipID_DocMilPlus32) | ||
353 | this->interleave = 1; | ||
354 | |||
355 | /* Check the ASIC agrees */ | ||
356 | if ( (this->interleave << 2) != | ||
357 | (ReadDOC(this->virtadr, Mplus_Configuration) & 4)) { | ||
358 | u_char conf = ReadDOC(this->virtadr, Mplus_Configuration); | ||
359 | printk(KERN_NOTICE "Setting DiskOnChip Millennium Plus interleave to %s\n", | ||
360 | this->interleave?"on (16-bit)":"off (8-bit)"); | ||
361 | conf ^= 4; | ||
362 | WriteDOC(conf, this->virtadr, Mplus_Configuration); | ||
363 | } | ||
364 | |||
365 | /* For each floor, find the number of valid chips it contains */ | ||
366 | for (floor = 0,ret = 1; floor < MAX_FLOORS_MPLUS; floor++) { | ||
367 | numchips[floor] = 0; | ||
368 | for (chip = 0; chip < MAX_CHIPS_MPLUS && ret != 0; chip++) { | ||
369 | ret = DoC_IdentChip(this, floor, chip); | ||
370 | if (ret) { | ||
371 | numchips[floor]++; | ||
372 | this->numchips++; | ||
373 | } | ||
374 | } | ||
375 | } | ||
376 | /* If there are none at all that we recognise, bail */ | ||
377 | if (!this->numchips) { | ||
378 | printk("No flash chips recognised.\n"); | ||
379 | return; | ||
380 | } | ||
381 | |||
382 | /* Allocate an array to hold the information for each chip */ | ||
383 | this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL); | ||
384 | if (!this->chips){ | ||
385 | printk("MTD: No memory for allocating chip info structures\n"); | ||
386 | return; | ||
387 | } | ||
388 | |||
389 | /* Fill out the chip array with {floor, chipno} for each | ||
390 | * detected chip in the device. */ | ||
391 | for (floor = 0, ret = 0; floor < MAX_FLOORS_MPLUS; floor++) { | ||
392 | for (chip = 0 ; chip < numchips[floor] ; chip++) { | ||
393 | this->chips[ret].floor = floor; | ||
394 | this->chips[ret].chip = chip; | ||
395 | this->chips[ret].curadr = 0; | ||
396 | this->chips[ret].curmode = 0x50; | ||
397 | ret++; | ||
398 | } | ||
399 | } | ||
400 | |||
401 | /* Calculate and print the total size of the device */ | ||
402 | this->totlen = this->numchips * (1 << this->chipshift); | ||
403 | printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n", | ||
404 | this->numchips ,this->totlen >> 20); | ||
405 | } | ||
406 | |||
407 | static int DoCMilPlus_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2) | ||
408 | { | ||
409 | int tmp1, tmp2, retval; | ||
410 | |||
411 | if (doc1->physadr == doc2->physadr) | ||
412 | return 1; | ||
413 | |||
414 | /* Use the alias resolution register which was set aside for this | ||
415 | * purpose. If it's value is the same on both chips, they might | ||
416 | * be the same chip, and we write to one and check for a change in | ||
417 | * the other. It's unclear if this register is usuable in the | ||
418 | * DoC 2000 (it's in the Millennium docs), but it seems to work. */ | ||
419 | tmp1 = ReadDOC(doc1->virtadr, Mplus_AliasResolution); | ||
420 | tmp2 = ReadDOC(doc2->virtadr, Mplus_AliasResolution); | ||
421 | if (tmp1 != tmp2) | ||
422 | return 0; | ||
423 | |||
424 | WriteDOC((tmp1+1) % 0xff, doc1->virtadr, Mplus_AliasResolution); | ||
425 | tmp2 = ReadDOC(doc2->virtadr, Mplus_AliasResolution); | ||
426 | if (tmp2 == (tmp1+1) % 0xff) | ||
427 | retval = 1; | ||
428 | else | ||
429 | retval = 0; | ||
430 | |||
431 | /* Restore register contents. May not be necessary, but do it just to | ||
432 | * be safe. */ | ||
433 | WriteDOC(tmp1, doc1->virtadr, Mplus_AliasResolution); | ||
434 | |||
435 | return retval; | ||
436 | } | ||
437 | |||
438 | /* This routine is found from the docprobe code by symbol_get(), | ||
439 | * which will bump the use count of this module. */ | ||
440 | void DoCMilPlus_init(struct mtd_info *mtd) | ||
441 | { | ||
442 | struct DiskOnChip *this = mtd->priv; | ||
443 | struct DiskOnChip *old = NULL; | ||
444 | |||
445 | /* We must avoid being called twice for the same device. */ | ||
446 | if (docmilpluslist) | ||
447 | old = docmilpluslist->priv; | ||
448 | |||
449 | while (old) { | ||
450 | if (DoCMilPlus_is_alias(this, old)) { | ||
451 | printk(KERN_NOTICE "Ignoring DiskOnChip Millennium " | ||
452 | "Plus at 0x%lX - already configured\n", | ||
453 | this->physadr); | ||
454 | iounmap(this->virtadr); | ||
455 | kfree(mtd); | ||
456 | return; | ||
457 | } | ||
458 | if (old->nextdoc) | ||
459 | old = old->nextdoc->priv; | ||
460 | else | ||
461 | old = NULL; | ||
462 | } | ||
463 | |||
464 | mtd->name = "DiskOnChip Millennium Plus"; | ||
465 | printk(KERN_NOTICE "DiskOnChip Millennium Plus found at " | ||
466 | "address 0x%lX\n", this->physadr); | ||
467 | |||
468 | mtd->type = MTD_NANDFLASH; | ||
469 | mtd->flags = MTD_CAP_NANDFLASH; | ||
470 | mtd->writebufsize = mtd->writesize = 512; | ||
471 | mtd->oobsize = 16; | ||
472 | mtd->ecc_strength = 2; | ||
473 | mtd->owner = THIS_MODULE; | ||
474 | mtd->_erase = doc_erase; | ||
475 | mtd->_read = doc_read; | ||
476 | mtd->_write = doc_write; | ||
477 | mtd->_read_oob = doc_read_oob; | ||
478 | mtd->_write_oob = doc_write_oob; | ||
479 | this->curfloor = -1; | ||
480 | this->curchip = -1; | ||
481 | |||
482 | /* Ident all the chips present. */ | ||
483 | DoC_ScanChips(this); | ||
484 | |||
485 | if (!this->totlen) { | ||
486 | kfree(mtd); | ||
487 | iounmap(this->virtadr); | ||
488 | } else { | ||
489 | this->nextdoc = docmilpluslist; | ||
490 | docmilpluslist = mtd; | ||
491 | mtd->size = this->totlen; | ||
492 | mtd->erasesize = this->erasesize; | ||
493 | mtd_device_register(mtd, NULL, 0); | ||
494 | return; | ||
495 | } | ||
496 | } | ||
497 | EXPORT_SYMBOL_GPL(DoCMilPlus_init); | ||
498 | |||
499 | #if 0 | ||
500 | static int doc_dumpblk(struct mtd_info *mtd, loff_t from) | ||
501 | { | ||
502 | int i; | ||
503 | loff_t fofs; | ||
504 | struct DiskOnChip *this = mtd->priv; | ||
505 | void __iomem * docptr = this->virtadr; | ||
506 | struct Nand *mychip = &this->chips[from >> (this->chipshift)]; | ||
507 | unsigned char *bp, buf[1056]; | ||
508 | char c[32]; | ||
509 | |||
510 | from &= ~0x3ff; | ||
511 | |||
512 | /* Don't allow read past end of device */ | ||
513 | if (from >= this->totlen) | ||
514 | return -EINVAL; | ||
515 | |||
516 | DoC_CheckASIC(docptr); | ||
517 | |||
518 | /* Find the chip which is to be used and select it */ | ||
519 | if (this->curfloor != mychip->floor) { | ||
520 | DoC_SelectFloor(docptr, mychip->floor); | ||
521 | DoC_SelectChip(docptr, mychip->chip); | ||
522 | } else if (this->curchip != mychip->chip) { | ||
523 | DoC_SelectChip(docptr, mychip->chip); | ||
524 | } | ||
525 | this->curfloor = mychip->floor; | ||
526 | this->curchip = mychip->chip; | ||
527 | |||
528 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
529 | WriteDOC((DOC_FLASH_CE | DOC_FLASH_WP), docptr, Mplus_FlashSelect); | ||
530 | |||
531 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
532 | DoC_Command(docptr, NAND_CMD_RESET, 0); | ||
533 | DoC_WaitReady(docptr); | ||
534 | |||
535 | fofs = from; | ||
536 | DoC_Command(docptr, DoC_GetDataOffset(mtd, &fofs), 0); | ||
537 | DoC_Address(this, 3, fofs, 0, 0x00); | ||
538 | WriteDOC(0, docptr, Mplus_FlashControl); | ||
539 | DoC_WaitReady(docptr); | ||
540 | |||
541 | /* disable the ECC engine */ | ||
542 | WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); | ||
543 | |||
544 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
545 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
546 | |||
547 | /* Read the data via the internal pipeline through CDSN IO | ||
548 | register, see Pipelined Read Operations 11.3 */ | ||
549 | MemReadDOC(docptr, buf, 1054); | ||
550 | buf[1054] = ReadDOC(docptr, Mplus_LastDataRead); | ||
551 | buf[1055] = ReadDOC(docptr, Mplus_LastDataRead); | ||
552 | |||
553 | memset(&c[0], 0, sizeof(c)); | ||
554 | printk("DUMP OFFSET=%x:\n", (int)from); | ||
555 | |||
556 | for (i = 0, bp = &buf[0]; (i < 1056); i++) { | ||
557 | if ((i % 16) == 0) | ||
558 | printk("%08x: ", i); | ||
559 | printk(" %02x", *bp); | ||
560 | c[(i & 0xf)] = ((*bp >= 0x20) && (*bp <= 0x7f)) ? *bp : '.'; | ||
561 | bp++; | ||
562 | if (((i + 1) % 16) == 0) | ||
563 | printk(" %s\n", c); | ||
564 | } | ||
565 | printk("\n"); | ||
566 | |||
567 | /* Disable flash internally */ | ||
568 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
569 | |||
570 | return 0; | ||
571 | } | ||
572 | #endif | ||
573 | |||
574 | static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, | ||
575 | size_t *retlen, u_char *buf) | ||
576 | { | ||
577 | int ret, i; | ||
578 | volatile char dummy; | ||
579 | loff_t fofs; | ||
580 | unsigned char syndrome[6], eccbuf[6]; | ||
581 | struct DiskOnChip *this = mtd->priv; | ||
582 | void __iomem * docptr = this->virtadr; | ||
583 | struct Nand *mychip = &this->chips[from >> (this->chipshift)]; | ||
584 | |||
585 | /* Don't allow a single read to cross a 512-byte block boundary */ | ||
586 | if (from + len > ((from | 0x1ff) + 1)) | ||
587 | len = ((from | 0x1ff) + 1) - from; | ||
588 | |||
589 | DoC_CheckASIC(docptr); | ||
590 | |||
591 | /* Find the chip which is to be used and select it */ | ||
592 | if (this->curfloor != mychip->floor) { | ||
593 | DoC_SelectFloor(docptr, mychip->floor); | ||
594 | DoC_SelectChip(docptr, mychip->chip); | ||
595 | } else if (this->curchip != mychip->chip) { | ||
596 | DoC_SelectChip(docptr, mychip->chip); | ||
597 | } | ||
598 | this->curfloor = mychip->floor; | ||
599 | this->curchip = mychip->chip; | ||
600 | |||
601 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
602 | WriteDOC((DOC_FLASH_CE | DOC_FLASH_WP), docptr, Mplus_FlashSelect); | ||
603 | |||
604 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
605 | DoC_Command(docptr, NAND_CMD_RESET, 0); | ||
606 | DoC_WaitReady(docptr); | ||
607 | |||
608 | fofs = from; | ||
609 | DoC_Command(docptr, DoC_GetDataOffset(mtd, &fofs), 0); | ||
610 | DoC_Address(this, 3, fofs, 0, 0x00); | ||
611 | WriteDOC(0, docptr, Mplus_FlashControl); | ||
612 | DoC_WaitReady(docptr); | ||
613 | |||
614 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | ||
615 | WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); | ||
616 | WriteDOC(DOC_ECC_EN, docptr, Mplus_ECCConf); | ||
617 | |||
618 | /* Let the caller know we completed it */ | ||
619 | *retlen = len; | ||
620 | ret = 0; | ||
621 | |||
622 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
623 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
624 | |||
625 | /* Read the data via the internal pipeline through CDSN IO | ||
626 | register, see Pipelined Read Operations 11.3 */ | ||
627 | MemReadDOC(docptr, buf, len); | ||
628 | |||
629 | /* Read the ECC data following raw data */ | ||
630 | MemReadDOC(docptr, eccbuf, 4); | ||
631 | eccbuf[4] = ReadDOC(docptr, Mplus_LastDataRead); | ||
632 | eccbuf[5] = ReadDOC(docptr, Mplus_LastDataRead); | ||
633 | |||
634 | /* Flush the pipeline */ | ||
635 | dummy = ReadDOC(docptr, Mplus_ECCConf); | ||
636 | dummy = ReadDOC(docptr, Mplus_ECCConf); | ||
637 | |||
638 | /* Check the ECC Status */ | ||
639 | if (ReadDOC(docptr, Mplus_ECCConf) & 0x80) { | ||
640 | int nb_errors; | ||
641 | /* There was an ECC error */ | ||
642 | #ifdef ECC_DEBUG | ||
643 | printk("DiskOnChip ECC Error: Read at %lx\n", (long)from); | ||
644 | #endif | ||
645 | /* Read the ECC syndrome through the DiskOnChip ECC logic. | ||
646 | These syndrome will be all ZERO when there is no error */ | ||
647 | for (i = 0; i < 6; i++) | ||
648 | syndrome[i] = ReadDOC(docptr, Mplus_ECCSyndrome0 + i); | ||
649 | |||
650 | nb_errors = doc_decode_ecc(buf, syndrome); | ||
651 | #ifdef ECC_DEBUG | ||
652 | printk("ECC Errors corrected: %x\n", nb_errors); | ||
653 | #endif | ||
654 | if (nb_errors < 0) { | ||
655 | /* We return error, but have actually done the | ||
656 | read. Not that this can be told to user-space, via | ||
657 | sys_read(), but at least MTD-aware stuff can know | ||
658 | about it by checking *retlen */ | ||
659 | #ifdef ECC_DEBUG | ||
660 | printk("%s(%d): Millennium Plus ECC error (from=0x%x:\n", | ||
661 | __FILE__, __LINE__, (int)from); | ||
662 | printk(" syndrome= %*phC\n", 6, syndrome); | ||
663 | printk(" eccbuf= %*phC\n", 6, eccbuf); | ||
664 | #endif | ||
665 | ret = -EIO; | ||
666 | } | ||
667 | } | ||
668 | |||
669 | #ifdef PSYCHO_DEBUG | ||
670 | printk("ECC DATA at %lx: %*ph\n", (long)from, 6, eccbuf); | ||
671 | #endif | ||
672 | /* disable the ECC engine */ | ||
673 | WriteDOC(DOC_ECC_DIS, docptr , Mplus_ECCConf); | ||
674 | |||
675 | /* Disable flash internally */ | ||
676 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
677 | |||
678 | return ret; | ||
679 | } | ||
680 | |||
681 | static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, | ||
682 | size_t *retlen, const u_char *buf) | ||
683 | { | ||
684 | int i, before, ret = 0; | ||
685 | loff_t fto; | ||
686 | volatile char dummy; | ||
687 | char eccbuf[6]; | ||
688 | struct DiskOnChip *this = mtd->priv; | ||
689 | void __iomem * docptr = this->virtadr; | ||
690 | struct Nand *mychip = &this->chips[to >> (this->chipshift)]; | ||
691 | |||
692 | /* Don't allow writes which aren't exactly one block (512 bytes) */ | ||
693 | if ((to & 0x1ff) || (len != 0x200)) | ||
694 | return -EINVAL; | ||
695 | |||
696 | /* Determine position of OOB flags, before or after data */ | ||
697 | before = (this->interleave && (to & 0x200)); | ||
698 | |||
699 | DoC_CheckASIC(docptr); | ||
700 | |||
701 | /* Find the chip which is to be used and select it */ | ||
702 | if (this->curfloor != mychip->floor) { | ||
703 | DoC_SelectFloor(docptr, mychip->floor); | ||
704 | DoC_SelectChip(docptr, mychip->chip); | ||
705 | } else if (this->curchip != mychip->chip) { | ||
706 | DoC_SelectChip(docptr, mychip->chip); | ||
707 | } | ||
708 | this->curfloor = mychip->floor; | ||
709 | this->curchip = mychip->chip; | ||
710 | |||
711 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
712 | WriteDOC(DOC_FLASH_CE, docptr, Mplus_FlashSelect); | ||
713 | |||
714 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
715 | DoC_Command(docptr, NAND_CMD_RESET, 0); | ||
716 | DoC_WaitReady(docptr); | ||
717 | |||
718 | /* Set device to appropriate plane of flash */ | ||
719 | fto = to; | ||
720 | WriteDOC(DoC_GetDataOffset(mtd, &fto), docptr, Mplus_FlashCmd); | ||
721 | |||
722 | /* On interleaved devices the flags for 2nd half 512 are before data */ | ||
723 | if (before) | ||
724 | fto -= 2; | ||
725 | |||
726 | /* issue the Serial Data In command to initial the Page Program process */ | ||
727 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | ||
728 | DoC_Address(this, 3, fto, 0x00, 0x00); | ||
729 | |||
730 | /* Disable the ECC engine */ | ||
731 | WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); | ||
732 | |||
733 | if (before) { | ||
734 | /* Write the block status BLOCK_USED (0x5555) */ | ||
735 | WriteDOC(0x55, docptr, Mil_CDSN_IO); | ||
736 | WriteDOC(0x55, docptr, Mil_CDSN_IO); | ||
737 | } | ||
738 | |||
739 | /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/ | ||
740 | WriteDOC(DOC_ECC_EN | DOC_ECC_RW, docptr, Mplus_ECCConf); | ||
741 | |||
742 | MemWriteDOC(docptr, (unsigned char *) buf, len); | ||
743 | |||
744 | /* Write ECC data to flash, the ECC info is generated by | ||
745 | the DiskOnChip ECC logic see Reed-Solomon EDC/ECC 11.1 */ | ||
746 | DoC_Delay(docptr, 3); | ||
747 | |||
748 | /* Read the ECC data through the DiskOnChip ECC logic */ | ||
749 | for (i = 0; i < 6; i++) | ||
750 | eccbuf[i] = ReadDOC(docptr, Mplus_ECCSyndrome0 + i); | ||
751 | |||
752 | /* disable the ECC engine */ | ||
753 | WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf); | ||
754 | |||
755 | /* Write the ECC data to flash */ | ||
756 | MemWriteDOC(docptr, eccbuf, 6); | ||
757 | |||
758 | if (!before) { | ||
759 | /* Write the block status BLOCK_USED (0x5555) */ | ||
760 | WriteDOC(0x55, docptr, Mil_CDSN_IO+6); | ||
761 | WriteDOC(0x55, docptr, Mil_CDSN_IO+7); | ||
762 | } | ||
763 | |||
764 | #ifdef PSYCHO_DEBUG | ||
765 | printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | ||
766 | (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3], | ||
767 | eccbuf[4], eccbuf[5]); | ||
768 | #endif | ||
769 | |||
770 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
771 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
772 | |||
773 | /* Commit the Page Program command and wait for ready | ||
774 | see Software Requirement 11.4 item 1.*/ | ||
775 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | ||
776 | DoC_WaitReady(docptr); | ||
777 | |||
778 | /* Read the status of the flash device through CDSN IO register | ||
779 | see Software Requirement 11.4 item 5.*/ | ||
780 | DoC_Command(docptr, NAND_CMD_STATUS, 0); | ||
781 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
782 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
783 | DoC_Delay(docptr, 2); | ||
784 | if ((dummy = ReadDOC(docptr, Mplus_LastDataRead)) & 1) { | ||
785 | printk("MTD: Error 0x%x programming at 0x%x\n", dummy, (int)to); | ||
786 | /* Error in programming | ||
787 | FIXME: implement Bad Block Replacement (in nftl.c ??) */ | ||
788 | ret = -EIO; | ||
789 | } | ||
790 | dummy = ReadDOC(docptr, Mplus_LastDataRead); | ||
791 | |||
792 | /* Disable flash internally */ | ||
793 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
794 | |||
795 | /* Let the caller know we completed it */ | ||
796 | *retlen = len; | ||
797 | |||
798 | return ret; | ||
799 | } | ||
800 | |||
801 | static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, | ||
802 | struct mtd_oob_ops *ops) | ||
803 | { | ||
804 | loff_t fofs, base; | ||
805 | struct DiskOnChip *this = mtd->priv; | ||
806 | void __iomem * docptr = this->virtadr; | ||
807 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
808 | size_t i, size, got, want; | ||
809 | uint8_t *buf = ops->oobbuf; | ||
810 | size_t len = ops->len; | ||
811 | |||
812 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
813 | |||
814 | ofs += ops->ooboffs; | ||
815 | |||
816 | DoC_CheckASIC(docptr); | ||
817 | |||
818 | /* Find the chip which is to be used and select it */ | ||
819 | if (this->curfloor != mychip->floor) { | ||
820 | DoC_SelectFloor(docptr, mychip->floor); | ||
821 | DoC_SelectChip(docptr, mychip->chip); | ||
822 | } else if (this->curchip != mychip->chip) { | ||
823 | DoC_SelectChip(docptr, mychip->chip); | ||
824 | } | ||
825 | this->curfloor = mychip->floor; | ||
826 | this->curchip = mychip->chip; | ||
827 | |||
828 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
829 | WriteDOC((DOC_FLASH_CE | DOC_FLASH_WP), docptr, Mplus_FlashSelect); | ||
830 | |||
831 | /* disable the ECC engine */ | ||
832 | WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); | ||
833 | DoC_WaitReady(docptr); | ||
834 | |||
835 | /* Maximum of 16 bytes in the OOB region, so limit read to that */ | ||
836 | if (len > 16) | ||
837 | len = 16; | ||
838 | got = 0; | ||
839 | want = len; | ||
840 | |||
841 | for (i = 0; ((i < 3) && (want > 0)); i++) { | ||
842 | /* Figure out which region we are accessing... */ | ||
843 | fofs = ofs; | ||
844 | base = ofs & 0xf; | ||
845 | if (!this->interleave) { | ||
846 | DoC_Command(docptr, NAND_CMD_READOOB, 0); | ||
847 | size = 16 - base; | ||
848 | } else if (base < 6) { | ||
849 | DoC_Command(docptr, DoC_GetECCOffset(mtd, &fofs), 0); | ||
850 | size = 6 - base; | ||
851 | } else if (base < 8) { | ||
852 | DoC_Command(docptr, DoC_GetFlagsOffset(mtd, &fofs), 0); | ||
853 | size = 8 - base; | ||
854 | } else { | ||
855 | DoC_Command(docptr, DoC_GetHdrOffset(mtd, &fofs), 0); | ||
856 | size = 16 - base; | ||
857 | } | ||
858 | if (size > want) | ||
859 | size = want; | ||
860 | |||
861 | /* Issue read command */ | ||
862 | DoC_Address(this, 3, fofs, 0, 0x00); | ||
863 | WriteDOC(0, docptr, Mplus_FlashControl); | ||
864 | DoC_WaitReady(docptr); | ||
865 | |||
866 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
867 | ReadDOC(docptr, Mplus_ReadPipeInit); | ||
868 | MemReadDOC(docptr, &buf[got], size - 2); | ||
869 | buf[got + size - 2] = ReadDOC(docptr, Mplus_LastDataRead); | ||
870 | buf[got + size - 1] = ReadDOC(docptr, Mplus_LastDataRead); | ||
871 | |||
872 | ofs += size; | ||
873 | got += size; | ||
874 | want -= size; | ||
875 | } | ||
876 | |||
877 | /* Disable flash internally */ | ||
878 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
879 | |||
880 | ops->retlen = len; | ||
881 | return 0; | ||
882 | } | ||
883 | |||
884 | static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, | ||
885 | struct mtd_oob_ops *ops) | ||
886 | { | ||
887 | volatile char dummy; | ||
888 | loff_t fofs, base; | ||
889 | struct DiskOnChip *this = mtd->priv; | ||
890 | void __iomem * docptr = this->virtadr; | ||
891 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
892 | size_t i, size, got, want; | ||
893 | int ret = 0; | ||
894 | uint8_t *buf = ops->oobbuf; | ||
895 | size_t len = ops->len; | ||
896 | |||
897 | BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); | ||
898 | |||
899 | ofs += ops->ooboffs; | ||
900 | |||
901 | DoC_CheckASIC(docptr); | ||
902 | |||
903 | /* Find the chip which is to be used and select it */ | ||
904 | if (this->curfloor != mychip->floor) { | ||
905 | DoC_SelectFloor(docptr, mychip->floor); | ||
906 | DoC_SelectChip(docptr, mychip->chip); | ||
907 | } else if (this->curchip != mychip->chip) { | ||
908 | DoC_SelectChip(docptr, mychip->chip); | ||
909 | } | ||
910 | this->curfloor = mychip->floor; | ||
911 | this->curchip = mychip->chip; | ||
912 | |||
913 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
914 | WriteDOC(DOC_FLASH_CE, docptr, Mplus_FlashSelect); | ||
915 | |||
916 | |||
917 | /* Maximum of 16 bytes in the OOB region, so limit write to that */ | ||
918 | if (len > 16) | ||
919 | len = 16; | ||
920 | got = 0; | ||
921 | want = len; | ||
922 | |||
923 | for (i = 0; ((i < 3) && (want > 0)); i++) { | ||
924 | /* Reset the chip, see Software Requirement 11.4 item 1. */ | ||
925 | DoC_Command(docptr, NAND_CMD_RESET, 0); | ||
926 | DoC_WaitReady(docptr); | ||
927 | |||
928 | /* Figure out which region we are accessing... */ | ||
929 | fofs = ofs; | ||
930 | base = ofs & 0x0f; | ||
931 | if (!this->interleave) { | ||
932 | WriteDOC(NAND_CMD_READOOB, docptr, Mplus_FlashCmd); | ||
933 | size = 16 - base; | ||
934 | } else if (base < 6) { | ||
935 | WriteDOC(DoC_GetECCOffset(mtd, &fofs), docptr, Mplus_FlashCmd); | ||
936 | size = 6 - base; | ||
937 | } else if (base < 8) { | ||
938 | WriteDOC(DoC_GetFlagsOffset(mtd, &fofs), docptr, Mplus_FlashCmd); | ||
939 | size = 8 - base; | ||
940 | } else { | ||
941 | WriteDOC(DoC_GetHdrOffset(mtd, &fofs), docptr, Mplus_FlashCmd); | ||
942 | size = 16 - base; | ||
943 | } | ||
944 | if (size > want) | ||
945 | size = want; | ||
946 | |||
947 | /* Issue the Serial Data In command to initial the Page Program process */ | ||
948 | DoC_Command(docptr, NAND_CMD_SEQIN, 0x00); | ||
949 | DoC_Address(this, 3, fofs, 0, 0x00); | ||
950 | |||
951 | /* Disable the ECC engine */ | ||
952 | WriteDOC(DOC_ECC_RESET, docptr, Mplus_ECCConf); | ||
953 | |||
954 | /* Write the data via the internal pipeline through CDSN IO | ||
955 | register, see Pipelined Write Operations 11.2 */ | ||
956 | MemWriteDOC(docptr, (unsigned char *) &buf[got], size); | ||
957 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
958 | WriteDOC(0x00, docptr, Mplus_WritePipeTerm); | ||
959 | |||
960 | /* Commit the Page Program command and wait for ready | ||
961 | see Software Requirement 11.4 item 1.*/ | ||
962 | DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00); | ||
963 | DoC_WaitReady(docptr); | ||
964 | |||
965 | /* Read the status of the flash device through CDSN IO register | ||
966 | see Software Requirement 11.4 item 5.*/ | ||
967 | DoC_Command(docptr, NAND_CMD_STATUS, 0x00); | ||
968 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
969 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
970 | DoC_Delay(docptr, 2); | ||
971 | if ((dummy = ReadDOC(docptr, Mplus_LastDataRead)) & 1) { | ||
972 | printk("MTD: Error 0x%x programming oob at 0x%x\n", | ||
973 | dummy, (int)ofs); | ||
974 | /* FIXME: implement Bad Block Replacement */ | ||
975 | ops->retlen = 0; | ||
976 | ret = -EIO; | ||
977 | } | ||
978 | dummy = ReadDOC(docptr, Mplus_LastDataRead); | ||
979 | |||
980 | ofs += size; | ||
981 | got += size; | ||
982 | want -= size; | ||
983 | } | ||
984 | |||
985 | /* Disable flash internally */ | ||
986 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
987 | |||
988 | ops->retlen = len; | ||
989 | return ret; | ||
990 | } | ||
991 | |||
992 | int doc_erase(struct mtd_info *mtd, struct erase_info *instr) | ||
993 | { | ||
994 | volatile char dummy; | ||
995 | struct DiskOnChip *this = mtd->priv; | ||
996 | __u32 ofs = instr->addr; | ||
997 | __u32 len = instr->len; | ||
998 | void __iomem * docptr = this->virtadr; | ||
999 | struct Nand *mychip = &this->chips[ofs >> this->chipshift]; | ||
1000 | |||
1001 | DoC_CheckASIC(docptr); | ||
1002 | |||
1003 | if (len != mtd->erasesize) | ||
1004 | printk(KERN_WARNING "MTD: Erase not right size (%x != %x)n", | ||
1005 | len, mtd->erasesize); | ||
1006 | |||
1007 | /* Find the chip which is to be used and select it */ | ||
1008 | if (this->curfloor != mychip->floor) { | ||
1009 | DoC_SelectFloor(docptr, mychip->floor); | ||
1010 | DoC_SelectChip(docptr, mychip->chip); | ||
1011 | } else if (this->curchip != mychip->chip) { | ||
1012 | DoC_SelectChip(docptr, mychip->chip); | ||
1013 | } | ||
1014 | this->curfloor = mychip->floor; | ||
1015 | this->curchip = mychip->chip; | ||
1016 | |||
1017 | instr->state = MTD_ERASE_PENDING; | ||
1018 | |||
1019 | /* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */ | ||
1020 | WriteDOC(DOC_FLASH_CE, docptr, Mplus_FlashSelect); | ||
1021 | |||
1022 | DoC_Command(docptr, NAND_CMD_RESET, 0x00); | ||
1023 | DoC_WaitReady(docptr); | ||
1024 | |||
1025 | DoC_Command(docptr, NAND_CMD_ERASE1, 0); | ||
1026 | DoC_Address(this, 2, ofs, 0, 0x00); | ||
1027 | DoC_Command(docptr, NAND_CMD_ERASE2, 0); | ||
1028 | DoC_WaitReady(docptr); | ||
1029 | instr->state = MTD_ERASING; | ||
1030 | |||
1031 | /* Read the status of the flash device through CDSN IO register | ||
1032 | see Software Requirement 11.4 item 5. */ | ||
1033 | DoC_Command(docptr, NAND_CMD_STATUS, 0); | ||
1034 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
1035 | dummy = ReadDOC(docptr, Mplus_ReadPipeInit); | ||
1036 | if ((dummy = ReadDOC(docptr, Mplus_LastDataRead)) & 1) { | ||
1037 | printk("MTD: Error 0x%x erasing at 0x%x\n", dummy, ofs); | ||
1038 | /* FIXME: implement Bad Block Replacement (in nftl.c ??) */ | ||
1039 | instr->state = MTD_ERASE_FAILED; | ||
1040 | } else { | ||
1041 | instr->state = MTD_ERASE_DONE; | ||
1042 | } | ||
1043 | dummy = ReadDOC(docptr, Mplus_LastDataRead); | ||
1044 | |||
1045 | /* Disable flash internally */ | ||
1046 | WriteDOC(0, docptr, Mplus_FlashSelect); | ||
1047 | |||
1048 | mtd_erase_callback(instr); | ||
1049 | |||
1050 | return 0; | ||
1051 | } | ||
1052 | |||
1053 | /**************************************************************************** | ||
1054 | * | ||
1055 | * Module stuff | ||
1056 | * | ||
1057 | ****************************************************************************/ | ||
1058 | |||
1059 | static void __exit cleanup_doc2001plus(void) | ||
1060 | { | ||
1061 | struct mtd_info *mtd; | ||
1062 | struct DiskOnChip *this; | ||
1063 | |||
1064 | while ((mtd=docmilpluslist)) { | ||
1065 | this = mtd->priv; | ||
1066 | docmilpluslist = this->nextdoc; | ||
1067 | |||
1068 | mtd_device_unregister(mtd); | ||
1069 | |||
1070 | iounmap(this->virtadr); | ||
1071 | kfree(this->chips); | ||
1072 | kfree(mtd); | ||
1073 | } | ||
1074 | } | ||
1075 | |||
1076 | module_exit(cleanup_doc2001plus); | ||
1077 | |||
1078 | MODULE_LICENSE("GPL"); | ||
1079 | MODULE_AUTHOR("Greg Ungerer <gerg@snapgear.com> et al."); | ||
1080 | MODULE_DESCRIPTION("Driver for DiskOnChip Millennium Plus"); | ||
diff --git a/drivers/mtd/devices/docecc.c b/drivers/mtd/devices/docecc.c deleted file mode 100644 index 4a1c39b6f37d..000000000000 --- a/drivers/mtd/devices/docecc.c +++ /dev/null | |||
@@ -1,521 +0,0 @@ | |||
1 | /* | ||
2 | * ECC algorithm for M-systems disk on chip. We use the excellent Reed | ||
3 | * Solmon code of Phil Karn (karn@ka9q.ampr.org) available under the | ||
4 | * GNU GPL License. The rest is simply to convert the disk on chip | ||
5 | * syndrome into a standard syndome. | ||
6 | * | ||
7 | * Author: Fabrice Bellard (fabrice.bellard@netgem.com) | ||
8 | * Copyright (C) 2000 Netgem S.A. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <asm/errno.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/uaccess.h> | ||
29 | #include <linux/delay.h> | ||
30 | #include <linux/slab.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <linux/types.h> | ||
33 | |||
34 | #include <linux/mtd/mtd.h> | ||
35 | #include <linux/mtd/doc2000.h> | ||
36 | |||
37 | #define DEBUG_ECC 0 | ||
38 | /* need to undef it (from asm/termbits.h) */ | ||
39 | #undef B0 | ||
40 | |||
41 | #define MM 10 /* Symbol size in bits */ | ||
42 | #define KK (1023-4) /* Number of data symbols per block */ | ||
43 | #define B0 510 /* First root of generator polynomial, alpha form */ | ||
44 | #define PRIM 1 /* power of alpha used to generate roots of generator poly */ | ||
45 | #define NN ((1 << MM) - 1) | ||
46 | |||
47 | typedef unsigned short dtype; | ||
48 | |||
49 | /* 1+x^3+x^10 */ | ||
50 | static const int Pp[MM+1] = { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 }; | ||
51 | |||
52 | /* This defines the type used to store an element of the Galois Field | ||
53 | * used by the code. Make sure this is something larger than a char if | ||
54 | * if anything larger than GF(256) is used. | ||
55 | * | ||
56 | * Note: unsigned char will work up to GF(256) but int seems to run | ||
57 | * faster on the Pentium. | ||
58 | */ | ||
59 | typedef int gf; | ||
60 | |||
61 | /* No legal value in index form represents zero, so | ||
62 | * we need a special value for this purpose | ||
63 | */ | ||
64 | #define A0 (NN) | ||
65 | |||
66 | /* Compute x % NN, where NN is 2**MM - 1, | ||
67 | * without a slow divide | ||
68 | */ | ||
69 | static inline gf | ||
70 | modnn(int x) | ||
71 | { | ||
72 | while (x >= NN) { | ||
73 | x -= NN; | ||
74 | x = (x >> MM) + (x & NN); | ||
75 | } | ||
76 | return x; | ||
77 | } | ||
78 | |||
79 | #define CLEAR(a,n) {\ | ||
80 | int ci;\ | ||
81 | for(ci=(n)-1;ci >=0;ci--)\ | ||
82 | (a)[ci] = 0;\ | ||
83 | } | ||
84 | |||
85 | #define COPY(a,b,n) {\ | ||
86 | int ci;\ | ||
87 | for(ci=(n)-1;ci >=0;ci--)\ | ||
88 | (a)[ci] = (b)[ci];\ | ||
89 | } | ||
90 | |||
91 | #define COPYDOWN(a,b,n) {\ | ||
92 | int ci;\ | ||
93 | for(ci=(n)-1;ci >=0;ci--)\ | ||
94 | (a)[ci] = (b)[ci];\ | ||
95 | } | ||
96 | |||
97 | #define Ldec 1 | ||
98 | |||
99 | /* generate GF(2**m) from the irreducible polynomial p(X) in Pp[0]..Pp[m] | ||
100 | lookup tables: index->polynomial form alpha_to[] contains j=alpha**i; | ||
101 | polynomial form -> index form index_of[j=alpha**i] = i | ||
102 | alpha=2 is the primitive element of GF(2**m) | ||
103 | HARI's COMMENT: (4/13/94) alpha_to[] can be used as follows: | ||
104 | Let @ represent the primitive element commonly called "alpha" that | ||
105 | is the root of the primitive polynomial p(x). Then in GF(2^m), for any | ||
106 | 0 <= i <= 2^m-2, | ||
107 | @^i = a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) | ||
108 | where the binary vector (a(0),a(1),a(2),...,a(m-1)) is the representation | ||
109 | of the integer "alpha_to[i]" with a(0) being the LSB and a(m-1) the MSB. Thus for | ||
110 | example the polynomial representation of @^5 would be given by the binary | ||
111 | representation of the integer "alpha_to[5]". | ||
112 | Similarly, index_of[] can be used as follows: | ||
113 | As above, let @ represent the primitive element of GF(2^m) that is | ||
114 | the root of the primitive polynomial p(x). In order to find the power | ||
115 | of @ (alpha) that has the polynomial representation | ||
116 | a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) | ||
117 | we consider the integer "i" whose binary representation with a(0) being LSB | ||
118 | and a(m-1) MSB is (a(0),a(1),...,a(m-1)) and locate the entry | ||
119 | "index_of[i]". Now, @^index_of[i] is that element whose polynomial | ||
120 | representation is (a(0),a(1),a(2),...,a(m-1)). | ||
121 | NOTE: | ||
122 | The element alpha_to[2^m-1] = 0 always signifying that the | ||
123 | representation of "@^infinity" = 0 is (0,0,0,...,0). | ||
124 | Similarly, the element index_of[0] = A0 always signifying | ||
125 | that the power of alpha which has the polynomial representation | ||
126 | (0,0,...,0) is "infinity". | ||
127 | |||
128 | */ | ||
129 | |||
130 | static void | ||
131 | generate_gf(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1]) | ||
132 | { | ||
133 | register int i, mask; | ||
134 | |||
135 | mask = 1; | ||
136 | Alpha_to[MM] = 0; | ||
137 | for (i = 0; i < MM; i++) { | ||
138 | Alpha_to[i] = mask; | ||
139 | Index_of[Alpha_to[i]] = i; | ||
140 | /* If Pp[i] == 1 then, term @^i occurs in poly-repr of @^MM */ | ||
141 | if (Pp[i] != 0) | ||
142 | Alpha_to[MM] ^= mask; /* Bit-wise EXOR operation */ | ||
143 | mask <<= 1; /* single left-shift */ | ||
144 | } | ||
145 | Index_of[Alpha_to[MM]] = MM; | ||
146 | /* | ||
147 | * Have obtained poly-repr of @^MM. Poly-repr of @^(i+1) is given by | ||
148 | * poly-repr of @^i shifted left one-bit and accounting for any @^MM | ||
149 | * term that may occur when poly-repr of @^i is shifted. | ||
150 | */ | ||
151 | mask >>= 1; | ||
152 | for (i = MM + 1; i < NN; i++) { | ||
153 | if (Alpha_to[i - 1] >= mask) | ||
154 | Alpha_to[i] = Alpha_to[MM] ^ ((Alpha_to[i - 1] ^ mask) << 1); | ||
155 | else | ||
156 | Alpha_to[i] = Alpha_to[i - 1] << 1; | ||
157 | Index_of[Alpha_to[i]] = i; | ||
158 | } | ||
159 | Index_of[0] = A0; | ||
160 | Alpha_to[NN] = 0; | ||
161 | } | ||
162 | |||
163 | /* | ||
164 | * Performs ERRORS+ERASURES decoding of RS codes. bb[] is the content | ||
165 | * of the feedback shift register after having processed the data and | ||
166 | * the ECC. | ||
167 | * | ||
168 | * Return number of symbols corrected, or -1 if codeword is illegal | ||
169 | * or uncorrectable. If eras_pos is non-null, the detected error locations | ||
170 | * are written back. NOTE! This array must be at least NN-KK elements long. | ||
171 | * The corrected data are written in eras_val[]. They must be xor with the data | ||
172 | * to retrieve the correct data : data[erase_pos[i]] ^= erase_val[i] . | ||
173 | * | ||
174 | * First "no_eras" erasures are declared by the calling program. Then, the | ||
175 | * maximum # of errors correctable is t_after_eras = floor((NN-KK-no_eras)/2). | ||
176 | * If the number of channel errors is not greater than "t_after_eras" the | ||
177 | * transmitted codeword will be recovered. Details of algorithm can be found | ||
178 | * in R. Blahut's "Theory ... of Error-Correcting Codes". | ||
179 | |||
180 | * Warning: the eras_pos[] array must not contain duplicate entries; decoder failure | ||
181 | * will result. The decoder *could* check for this condition, but it would involve | ||
182 | * extra time on every decoding operation. | ||
183 | * */ | ||
184 | static int | ||
185 | eras_dec_rs(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1], | ||
186 | gf bb[NN - KK + 1], gf eras_val[NN-KK], int eras_pos[NN-KK], | ||
187 | int no_eras) | ||
188 | { | ||
189 | int deg_lambda, el, deg_omega; | ||
190 | int i, j, r,k; | ||
191 | gf u,q,tmp,num1,num2,den,discr_r; | ||
192 | gf lambda[NN-KK + 1], s[NN-KK + 1]; /* Err+Eras Locator poly | ||
193 | * and syndrome poly */ | ||
194 | gf b[NN-KK + 1], t[NN-KK + 1], omega[NN-KK + 1]; | ||
195 | gf root[NN-KK], reg[NN-KK + 1], loc[NN-KK]; | ||
196 | int syn_error, count; | ||
197 | |||
198 | syn_error = 0; | ||
199 | for(i=0;i<NN-KK;i++) | ||
200 | syn_error |= bb[i]; | ||
201 | |||
202 | if (!syn_error) { | ||
203 | /* if remainder is zero, data[] is a codeword and there are no | ||
204 | * errors to correct. So return data[] unmodified | ||
205 | */ | ||
206 | count = 0; | ||
207 | goto finish; | ||
208 | } | ||
209 | |||
210 | for(i=1;i<=NN-KK;i++){ | ||
211 | s[i] = bb[0]; | ||
212 | } | ||
213 | for(j=1;j<NN-KK;j++){ | ||
214 | if(bb[j] == 0) | ||
215 | continue; | ||
216 | tmp = Index_of[bb[j]]; | ||
217 | |||
218 | for(i=1;i<=NN-KK;i++) | ||
219 | s[i] ^= Alpha_to[modnn(tmp + (B0+i-1)*PRIM*j)]; | ||
220 | } | ||
221 | |||
222 | /* undo the feedback register implicit multiplication and convert | ||
223 | syndromes to index form */ | ||
224 | |||
225 | for(i=1;i<=NN-KK;i++) { | ||
226 | tmp = Index_of[s[i]]; | ||
227 | if (tmp != A0) | ||
228 | tmp = modnn(tmp + 2 * KK * (B0+i-1)*PRIM); | ||
229 | s[i] = tmp; | ||
230 | } | ||
231 | |||
232 | CLEAR(&lambda[1],NN-KK); | ||
233 | lambda[0] = 1; | ||
234 | |||
235 | if (no_eras > 0) { | ||
236 | /* Init lambda to be the erasure locator polynomial */ | ||
237 | lambda[1] = Alpha_to[modnn(PRIM * eras_pos[0])]; | ||
238 | for (i = 1; i < no_eras; i++) { | ||
239 | u = modnn(PRIM*eras_pos[i]); | ||
240 | for (j = i+1; j > 0; j--) { | ||
241 | tmp = Index_of[lambda[j - 1]]; | ||
242 | if(tmp != A0) | ||
243 | lambda[j] ^= Alpha_to[modnn(u + tmp)]; | ||
244 | } | ||
245 | } | ||
246 | #if DEBUG_ECC >= 1 | ||
247 | /* Test code that verifies the erasure locator polynomial just constructed | ||
248 | Needed only for decoder debugging. */ | ||
249 | |||
250 | /* find roots of the erasure location polynomial */ | ||
251 | for(i=1;i<=no_eras;i++) | ||
252 | reg[i] = Index_of[lambda[i]]; | ||
253 | count = 0; | ||
254 | for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) { | ||
255 | q = 1; | ||
256 | for (j = 1; j <= no_eras; j++) | ||
257 | if (reg[j] != A0) { | ||
258 | reg[j] = modnn(reg[j] + j); | ||
259 | q ^= Alpha_to[reg[j]]; | ||
260 | } | ||
261 | if (q != 0) | ||
262 | continue; | ||
263 | /* store root and error location number indices */ | ||
264 | root[count] = i; | ||
265 | loc[count] = k; | ||
266 | count++; | ||
267 | } | ||
268 | if (count != no_eras) { | ||
269 | printf("\n lambda(x) is WRONG\n"); | ||
270 | count = -1; | ||
271 | goto finish; | ||
272 | } | ||
273 | #if DEBUG_ECC >= 2 | ||
274 | printf("\n Erasure positions as determined by roots of Eras Loc Poly:\n"); | ||
275 | for (i = 0; i < count; i++) | ||
276 | printf("%d ", loc[i]); | ||
277 | printf("\n"); | ||
278 | #endif | ||
279 | #endif | ||
280 | } | ||
281 | for(i=0;i<NN-KK+1;i++) | ||
282 | b[i] = Index_of[lambda[i]]; | ||
283 | |||
284 | /* | ||
285 | * Begin Berlekamp-Massey algorithm to determine error+erasure | ||
286 | * locator polynomial | ||
287 | */ | ||
288 | r = no_eras; | ||
289 | el = no_eras; | ||
290 | while (++r <= NN-KK) { /* r is the step number */ | ||
291 | /* Compute discrepancy at the r-th step in poly-form */ | ||
292 | discr_r = 0; | ||
293 | for (i = 0; i < r; i++){ | ||
294 | if ((lambda[i] != 0) && (s[r - i] != A0)) { | ||
295 | discr_r ^= Alpha_to[modnn(Index_of[lambda[i]] + s[r - i])]; | ||
296 | } | ||
297 | } | ||
298 | discr_r = Index_of[discr_r]; /* Index form */ | ||
299 | if (discr_r == A0) { | ||
300 | /* 2 lines below: B(x) <-- x*B(x) */ | ||
301 | COPYDOWN(&b[1],b,NN-KK); | ||
302 | b[0] = A0; | ||
303 | } else { | ||
304 | /* 7 lines below: T(x) <-- lambda(x) - discr_r*x*b(x) */ | ||
305 | t[0] = lambda[0]; | ||
306 | for (i = 0 ; i < NN-KK; i++) { | ||
307 | if(b[i] != A0) | ||
308 | t[i+1] = lambda[i+1] ^ Alpha_to[modnn(discr_r + b[i])]; | ||
309 | else | ||
310 | t[i+1] = lambda[i+1]; | ||
311 | } | ||
312 | if (2 * el <= r + no_eras - 1) { | ||
313 | el = r + no_eras - el; | ||
314 | /* | ||
315 | * 2 lines below: B(x) <-- inv(discr_r) * | ||
316 | * lambda(x) | ||
317 | */ | ||
318 | for (i = 0; i <= NN-KK; i++) | ||
319 | b[i] = (lambda[i] == 0) ? A0 : modnn(Index_of[lambda[i]] - discr_r + NN); | ||
320 | } else { | ||
321 | /* 2 lines below: B(x) <-- x*B(x) */ | ||
322 | COPYDOWN(&b[1],b,NN-KK); | ||
323 | b[0] = A0; | ||
324 | } | ||
325 | COPY(lambda,t,NN-KK+1); | ||
326 | } | ||
327 | } | ||
328 | |||
329 | /* Convert lambda to index form and compute deg(lambda(x)) */ | ||
330 | deg_lambda = 0; | ||
331 | for(i=0;i<NN-KK+1;i++){ | ||
332 | lambda[i] = Index_of[lambda[i]]; | ||
333 | if(lambda[i] != A0) | ||
334 | deg_lambda = i; | ||
335 | } | ||
336 | /* | ||
337 | * Find roots of the error+erasure locator polynomial by Chien | ||
338 | * Search | ||
339 | */ | ||
340 | COPY(®[1],&lambda[1],NN-KK); | ||
341 | count = 0; /* Number of roots of lambda(x) */ | ||
342 | for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) { | ||
343 | q = 1; | ||
344 | for (j = deg_lambda; j > 0; j--){ | ||
345 | if (reg[j] != A0) { | ||
346 | reg[j] = modnn(reg[j] + j); | ||
347 | q ^= Alpha_to[reg[j]]; | ||
348 | } | ||
349 | } | ||
350 | if (q != 0) | ||
351 | continue; | ||
352 | /* store root (index-form) and error location number */ | ||
353 | root[count] = i; | ||
354 | loc[count] = k; | ||
355 | /* If we've already found max possible roots, | ||
356 | * abort the search to save time | ||
357 | */ | ||
358 | if(++count == deg_lambda) | ||
359 | break; | ||
360 | } | ||
361 | if (deg_lambda != count) { | ||
362 | /* | ||
363 | * deg(lambda) unequal to number of roots => uncorrectable | ||
364 | * error detected | ||
365 | */ | ||
366 | count = -1; | ||
367 | goto finish; | ||
368 | } | ||
369 | /* | ||
370 | * Compute err+eras evaluator poly omega(x) = s(x)*lambda(x) (modulo | ||
371 | * x**(NN-KK)). in index form. Also find deg(omega). | ||
372 | */ | ||
373 | deg_omega = 0; | ||
374 | for (i = 0; i < NN-KK;i++){ | ||
375 | tmp = 0; | ||
376 | j = (deg_lambda < i) ? deg_lambda : i; | ||
377 | for(;j >= 0; j--){ | ||
378 | if ((s[i + 1 - j] != A0) && (lambda[j] != A0)) | ||
379 | tmp ^= Alpha_to[modnn(s[i + 1 - j] + lambda[j])]; | ||
380 | } | ||
381 | if(tmp != 0) | ||
382 | deg_omega = i; | ||
383 | omega[i] = Index_of[tmp]; | ||
384 | } | ||
385 | omega[NN-KK] = A0; | ||
386 | |||
387 | /* | ||
388 | * Compute error values in poly-form. num1 = omega(inv(X(l))), num2 = | ||
389 | * inv(X(l))**(B0-1) and den = lambda_pr(inv(X(l))) all in poly-form | ||
390 | */ | ||
391 | for (j = count-1; j >=0; j--) { | ||
392 | num1 = 0; | ||
393 | for (i = deg_omega; i >= 0; i--) { | ||
394 | if (omega[i] != A0) | ||
395 | num1 ^= Alpha_to[modnn(omega[i] + i * root[j])]; | ||
396 | } | ||
397 | num2 = Alpha_to[modnn(root[j] * (B0 - 1) + NN)]; | ||
398 | den = 0; | ||
399 | |||
400 | /* lambda[i+1] for i even is the formal derivative lambda_pr of lambda[i] */ | ||
401 | for (i = min(deg_lambda,NN-KK-1) & ~1; i >= 0; i -=2) { | ||
402 | if(lambda[i+1] != A0) | ||
403 | den ^= Alpha_to[modnn(lambda[i+1] + i * root[j])]; | ||
404 | } | ||
405 | if (den == 0) { | ||
406 | #if DEBUG_ECC >= 1 | ||
407 | printf("\n ERROR: denominator = 0\n"); | ||
408 | #endif | ||
409 | /* Convert to dual- basis */ | ||
410 | count = -1; | ||
411 | goto finish; | ||
412 | } | ||
413 | /* Apply error to data */ | ||
414 | if (num1 != 0) { | ||
415 | eras_val[j] = Alpha_to[modnn(Index_of[num1] + Index_of[num2] + NN - Index_of[den])]; | ||
416 | } else { | ||
417 | eras_val[j] = 0; | ||
418 | } | ||
419 | } | ||
420 | finish: | ||
421 | for(i=0;i<count;i++) | ||
422 | eras_pos[i] = loc[i]; | ||
423 | return count; | ||
424 | } | ||
425 | |||
426 | /***************************************************************************/ | ||
427 | /* The DOC specific code begins here */ | ||
428 | |||
429 | #define SECTOR_SIZE 512 | ||
430 | /* The sector bytes are packed into NB_DATA MM bits words */ | ||
431 | #define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / MM) | ||
432 | |||
433 | /* | ||
434 | * Correct the errors in 'sector[]' by using 'ecc1[]' which is the | ||
435 | * content of the feedback shift register applyied to the sector and | ||
436 | * the ECC. Return the number of errors corrected (and correct them in | ||
437 | * sector), or -1 if error | ||
438 | */ | ||
439 | int doc_decode_ecc(unsigned char sector[SECTOR_SIZE], unsigned char ecc1[6]) | ||
440 | { | ||
441 | int parity, i, nb_errors; | ||
442 | gf bb[NN - KK + 1]; | ||
443 | gf error_val[NN-KK]; | ||
444 | int error_pos[NN-KK], pos, bitpos, index, val; | ||
445 | dtype *Alpha_to, *Index_of; | ||
446 | |||
447 | /* init log and exp tables here to save memory. However, it is slower */ | ||
448 | Alpha_to = kmalloc((NN + 1) * sizeof(dtype), GFP_KERNEL); | ||
449 | if (!Alpha_to) | ||
450 | return -1; | ||
451 | |||
452 | Index_of = kmalloc((NN + 1) * sizeof(dtype), GFP_KERNEL); | ||
453 | if (!Index_of) { | ||
454 | kfree(Alpha_to); | ||
455 | return -1; | ||
456 | } | ||
457 | |||
458 | generate_gf(Alpha_to, Index_of); | ||
459 | |||
460 | parity = ecc1[1]; | ||
461 | |||
462 | bb[0] = (ecc1[4] & 0xff) | ((ecc1[5] & 0x03) << 8); | ||
463 | bb[1] = ((ecc1[5] & 0xfc) >> 2) | ((ecc1[2] & 0x0f) << 6); | ||
464 | bb[2] = ((ecc1[2] & 0xf0) >> 4) | ((ecc1[3] & 0x3f) << 4); | ||
465 | bb[3] = ((ecc1[3] & 0xc0) >> 6) | ((ecc1[0] & 0xff) << 2); | ||
466 | |||
467 | nb_errors = eras_dec_rs(Alpha_to, Index_of, bb, | ||
468 | error_val, error_pos, 0); | ||
469 | if (nb_errors <= 0) | ||
470 | goto the_end; | ||
471 | |||
472 | /* correct the errors */ | ||
473 | for(i=0;i<nb_errors;i++) { | ||
474 | pos = error_pos[i]; | ||
475 | if (pos >= NB_DATA && pos < KK) { | ||
476 | nb_errors = -1; | ||
477 | goto the_end; | ||
478 | } | ||
479 | if (pos < NB_DATA) { | ||
480 | /* extract bit position (MSB first) */ | ||
481 | pos = 10 * (NB_DATA - 1 - pos) - 6; | ||
482 | /* now correct the following 10 bits. At most two bytes | ||
483 | can be modified since pos is even */ | ||
484 | index = (pos >> 3) ^ 1; | ||
485 | bitpos = pos & 7; | ||
486 | if ((index >= 0 && index < SECTOR_SIZE) || | ||
487 | index == (SECTOR_SIZE + 1)) { | ||
488 | val = error_val[i] >> (2 + bitpos); | ||
489 | parity ^= val; | ||
490 | if (index < SECTOR_SIZE) | ||
491 | sector[index] ^= val; | ||
492 | } | ||
493 | index = ((pos >> 3) + 1) ^ 1; | ||
494 | bitpos = (bitpos + 10) & 7; | ||
495 | if (bitpos == 0) | ||
496 | bitpos = 8; | ||
497 | if ((index >= 0 && index < SECTOR_SIZE) || | ||
498 | index == (SECTOR_SIZE + 1)) { | ||
499 | val = error_val[i] << (8 - bitpos); | ||
500 | parity ^= val; | ||
501 | if (index < SECTOR_SIZE) | ||
502 | sector[index] ^= val; | ||
503 | } | ||
504 | } | ||
505 | } | ||
506 | |||
507 | /* use parity to test extra errors */ | ||
508 | if ((parity & 0xff) != 0) | ||
509 | nb_errors = -1; | ||
510 | |||
511 | the_end: | ||
512 | kfree(Alpha_to); | ||
513 | kfree(Index_of); | ||
514 | return nb_errors; | ||
515 | } | ||
516 | |||
517 | EXPORT_SYMBOL_GPL(doc_decode_ecc); | ||
518 | |||
519 | MODULE_LICENSE("GPL"); | ||
520 | MODULE_AUTHOR("Fabrice Bellard <fabrice.bellard@netgem.com>"); | ||
521 | MODULE_DESCRIPTION("ECC code for correcting errors detected by DiskOnChip 2000 and Millennium ECC hardware"); | ||
diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c index 8510ccb9c6f0..3e1b0a0ef4db 100644 --- a/drivers/mtd/devices/docg3.c +++ b/drivers/mtd/devices/docg3.c | |||
@@ -123,7 +123,7 @@ static inline void doc_flash_address(struct docg3 *docg3, u8 addr) | |||
123 | doc_writeb(docg3, addr, DOC_FLASHADDRESS); | 123 | doc_writeb(docg3, addr, DOC_FLASHADDRESS); |
124 | } | 124 | } |
125 | 125 | ||
126 | static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL }; | 126 | static char const * const part_probes[] = { "cmdlinepart", "saftlpart", NULL }; |
127 | 127 | ||
128 | static int doc_register_readb(struct docg3 *docg3, int reg) | 128 | static int doc_register_readb(struct docg3 *docg3, int reg) |
129 | { | 129 | { |
@@ -2144,18 +2144,7 @@ static struct platform_driver g3_driver = { | |||
2144 | .remove = __exit_p(docg3_release), | 2144 | .remove = __exit_p(docg3_release), |
2145 | }; | 2145 | }; |
2146 | 2146 | ||
2147 | static int __init docg3_init(void) | 2147 | module_platform_driver_probe(g3_driver, docg3_probe); |
2148 | { | ||
2149 | return platform_driver_probe(&g3_driver, docg3_probe); | ||
2150 | } | ||
2151 | module_init(docg3_init); | ||
2152 | |||
2153 | |||
2154 | static void __exit docg3_exit(void) | ||
2155 | { | ||
2156 | platform_driver_unregister(&g3_driver); | ||
2157 | } | ||
2158 | module_exit(docg3_exit); | ||
2159 | 2148 | ||
2160 | MODULE_LICENSE("GPL"); | 2149 | MODULE_LICENSE("GPL"); |
2161 | MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>"); | 2150 | MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>"); |
diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c deleted file mode 100644 index 88b3fd3e18a7..000000000000 --- a/drivers/mtd/devices/docprobe.c +++ /dev/null | |||
@@ -1,325 +0,0 @@ | |||
1 | |||
2 | /* Linux driver for Disk-On-Chip devices */ | ||
3 | /* Probe routines common to all DoC devices */ | ||
4 | /* (C) 1999 Machine Vision Holdings, Inc. */ | ||
5 | /* (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> */ | ||
6 | |||
7 | |||
8 | /* DOC_PASSIVE_PROBE: | ||
9 | In order to ensure that the BIOS checksum is correct at boot time, and | ||
10 | hence that the onboard BIOS extension gets executed, the DiskOnChip | ||
11 | goes into reset mode when it is read sequentially: all registers | ||
12 | return 0xff until the chip is woken up again by writing to the | ||
13 | DOCControl register. | ||
14 | |||
15 | Unfortunately, this means that the probe for the DiskOnChip is unsafe, | ||
16 | because one of the first things it does is write to where it thinks | ||
17 | the DOCControl register should be - which may well be shared memory | ||
18 | for another device. I've had machines which lock up when this is | ||
19 | attempted. Hence the possibility to do a passive probe, which will fail | ||
20 | to detect a chip in reset mode, but is at least guaranteed not to lock | ||
21 | the machine. | ||
22 | |||
23 | If you have this problem, uncomment the following line: | ||
24 | #define DOC_PASSIVE_PROBE | ||
25 | */ | ||
26 | |||
27 | |||
28 | /* DOC_SINGLE_DRIVER: | ||
29 | Millennium driver has been merged into DOC2000 driver. | ||
30 | |||
31 | The old Millennium-only driver has been retained just in case there | ||
32 | are problems with the new code. If the combined driver doesn't work | ||
33 | for you, you can try the old one by undefining DOC_SINGLE_DRIVER | ||
34 | below and also enabling it in your configuration. If this fixes the | ||
35 | problems, please send a report to the MTD mailing list at | ||
36 | <linux-mtd@lists.infradead.org>. | ||
37 | */ | ||
38 | #define DOC_SINGLE_DRIVER | ||
39 | |||
40 | #include <linux/kernel.h> | ||
41 | #include <linux/module.h> | ||
42 | #include <asm/errno.h> | ||
43 | #include <asm/io.h> | ||
44 | #include <linux/delay.h> | ||
45 | #include <linux/slab.h> | ||
46 | #include <linux/init.h> | ||
47 | #include <linux/types.h> | ||
48 | |||
49 | #include <linux/mtd/mtd.h> | ||
50 | #include <linux/mtd/nand.h> | ||
51 | #include <linux/mtd/doc2000.h> | ||
52 | |||
53 | |||
54 | static unsigned long doc_config_location = CONFIG_MTD_DOCPROBE_ADDRESS; | ||
55 | module_param(doc_config_location, ulong, 0); | ||
56 | MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe for DiskOnChip"); | ||
57 | |||
58 | static unsigned long __initdata doc_locations[] = { | ||
59 | #if defined (__alpha__) || defined(__i386__) || defined(__x86_64__) | ||
60 | #ifdef CONFIG_MTD_DOCPROBE_HIGH | ||
61 | 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000, | ||
62 | 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000, | ||
63 | 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000, | ||
64 | 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000, | ||
65 | 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000, | ||
66 | #else /* CONFIG_MTD_DOCPROBE_HIGH */ | ||
67 | 0xc8000, 0xca000, 0xcc000, 0xce000, | ||
68 | 0xd0000, 0xd2000, 0xd4000, 0xd6000, | ||
69 | 0xd8000, 0xda000, 0xdc000, 0xde000, | ||
70 | 0xe0000, 0xe2000, 0xe4000, 0xe6000, | ||
71 | 0xe8000, 0xea000, 0xec000, 0xee000, | ||
72 | #endif /* CONFIG_MTD_DOCPROBE_HIGH */ | ||
73 | #endif | ||
74 | 0xffffffff }; | ||
75 | |||
76 | /* doccheck: Probe a given memory window to see if there's a DiskOnChip present */ | ||
77 | |||
78 | static inline int __init doccheck(void __iomem *potential, unsigned long physadr) | ||
79 | { | ||
80 | void __iomem *window=potential; | ||
81 | unsigned char tmp, tmpb, tmpc, ChipID; | ||
82 | #ifndef DOC_PASSIVE_PROBE | ||
83 | unsigned char tmp2; | ||
84 | #endif | ||
85 | |||
86 | /* Routine copied from the Linux DOC driver */ | ||
87 | |||
88 | #ifdef CONFIG_MTD_DOCPROBE_55AA | ||
89 | /* Check for 0x55 0xAA signature at beginning of window, | ||
90 | this is no longer true once we remove the IPL (for Millennium */ | ||
91 | if (ReadDOC(window, Sig1) != 0x55 || ReadDOC(window, Sig2) != 0xaa) | ||
92 | return 0; | ||
93 | #endif /* CONFIG_MTD_DOCPROBE_55AA */ | ||
94 | |||
95 | #ifndef DOC_PASSIVE_PROBE | ||
96 | /* It's not possible to cleanly detect the DiskOnChip - the | ||
97 | * bootup procedure will put the device into reset mode, and | ||
98 | * it's not possible to talk to it without actually writing | ||
99 | * to the DOCControl register. So we store the current contents | ||
100 | * of the DOCControl register's location, in case we later decide | ||
101 | * that it's not a DiskOnChip, and want to put it back how we | ||
102 | * found it. | ||
103 | */ | ||
104 | tmp2 = ReadDOC(window, DOCControl); | ||
105 | |||
106 | /* Reset the DiskOnChip ASIC */ | ||
107 | WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, | ||
108 | window, DOCControl); | ||
109 | WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, | ||
110 | window, DOCControl); | ||
111 | |||
112 | /* Enable the DiskOnChip ASIC */ | ||
113 | WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, | ||
114 | window, DOCControl); | ||
115 | WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, | ||
116 | window, DOCControl); | ||
117 | #endif /* !DOC_PASSIVE_PROBE */ | ||
118 | |||
119 | /* We need to read the ChipID register four times. For some | ||
120 | newer DiskOnChip 2000 units, the first three reads will | ||
121 | return the DiskOnChip Millennium ident. Don't ask. */ | ||
122 | ChipID = ReadDOC(window, ChipID); | ||
123 | |||
124 | switch (ChipID) { | ||
125 | case DOC_ChipID_Doc2k: | ||
126 | /* Check the TOGGLE bit in the ECC register */ | ||
127 | tmp = ReadDOC(window, 2k_ECCStatus) & DOC_TOGGLE_BIT; | ||
128 | tmpb = ReadDOC(window, 2k_ECCStatus) & DOC_TOGGLE_BIT; | ||
129 | tmpc = ReadDOC(window, 2k_ECCStatus) & DOC_TOGGLE_BIT; | ||
130 | if (tmp != tmpb && tmp == tmpc) | ||
131 | return ChipID; | ||
132 | break; | ||
133 | |||
134 | case DOC_ChipID_DocMil: | ||
135 | /* Check for the new 2000 with Millennium ASIC */ | ||
136 | ReadDOC(window, ChipID); | ||
137 | ReadDOC(window, ChipID); | ||
138 | if (ReadDOC(window, ChipID) != DOC_ChipID_DocMil) | ||
139 | ChipID = DOC_ChipID_Doc2kTSOP; | ||
140 | |||
141 | /* Check the TOGGLE bit in the ECC register */ | ||
142 | tmp = ReadDOC(window, ECCConf) & DOC_TOGGLE_BIT; | ||
143 | tmpb = ReadDOC(window, ECCConf) & DOC_TOGGLE_BIT; | ||
144 | tmpc = ReadDOC(window, ECCConf) & DOC_TOGGLE_BIT; | ||
145 | if (tmp != tmpb && tmp == tmpc) | ||
146 | return ChipID; | ||
147 | break; | ||
148 | |||
149 | case DOC_ChipID_DocMilPlus16: | ||
150 | case DOC_ChipID_DocMilPlus32: | ||
151 | case 0: | ||
152 | /* Possible Millennium+, need to do more checks */ | ||
153 | #ifndef DOC_PASSIVE_PROBE | ||
154 | /* Possibly release from power down mode */ | ||
155 | for (tmp = 0; (tmp < 4); tmp++) | ||
156 | ReadDOC(window, Mplus_Power); | ||
157 | |||
158 | /* Reset the DiskOnChip ASIC */ | ||
159 | tmp = DOC_MODE_RESET | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | | ||
160 | DOC_MODE_BDECT; | ||
161 | WriteDOC(tmp, window, Mplus_DOCControl); | ||
162 | WriteDOC(~tmp, window, Mplus_CtrlConfirm); | ||
163 | |||
164 | mdelay(1); | ||
165 | /* Enable the DiskOnChip ASIC */ | ||
166 | tmp = DOC_MODE_NORMAL | DOC_MODE_MDWREN | DOC_MODE_RST_LAT | | ||
167 | DOC_MODE_BDECT; | ||
168 | WriteDOC(tmp, window, Mplus_DOCControl); | ||
169 | WriteDOC(~tmp, window, Mplus_CtrlConfirm); | ||
170 | mdelay(1); | ||
171 | #endif /* !DOC_PASSIVE_PROBE */ | ||
172 | |||
173 | ChipID = ReadDOC(window, ChipID); | ||
174 | |||
175 | switch (ChipID) { | ||
176 | case DOC_ChipID_DocMilPlus16: | ||
177 | case DOC_ChipID_DocMilPlus32: | ||
178 | /* Check the TOGGLE bit in the toggle register */ | ||
179 | tmp = ReadDOC(window, Mplus_Toggle) & DOC_TOGGLE_BIT; | ||
180 | tmpb = ReadDOC(window, Mplus_Toggle) & DOC_TOGGLE_BIT; | ||
181 | tmpc = ReadDOC(window, Mplus_Toggle) & DOC_TOGGLE_BIT; | ||
182 | if (tmp != tmpb && tmp == tmpc) | ||
183 | return ChipID; | ||
184 | default: | ||
185 | break; | ||
186 | } | ||
187 | /* FALL TRHU */ | ||
188 | |||
189 | default: | ||
190 | |||
191 | #ifdef CONFIG_MTD_DOCPROBE_55AA | ||
192 | printk(KERN_DEBUG "Possible DiskOnChip with unknown ChipID %2.2X found at 0x%lx\n", | ||
193 | ChipID, physadr); | ||
194 | #endif | ||
195 | #ifndef DOC_PASSIVE_PROBE | ||
196 | /* Put back the contents of the DOCControl register, in case it's not | ||
197 | * actually a DiskOnChip. | ||
198 | */ | ||
199 | WriteDOC(tmp2, window, DOCControl); | ||
200 | #endif | ||
201 | return 0; | ||
202 | } | ||
203 | |||
204 | printk(KERN_WARNING "DiskOnChip failed TOGGLE test, dropping.\n"); | ||
205 | |||
206 | #ifndef DOC_PASSIVE_PROBE | ||
207 | /* Put back the contents of the DOCControl register: it's not a DiskOnChip */ | ||
208 | WriteDOC(tmp2, window, DOCControl); | ||
209 | #endif | ||
210 | return 0; | ||
211 | } | ||
212 | |||
213 | static int docfound; | ||
214 | |||
215 | extern void DoC2k_init(struct mtd_info *); | ||
216 | extern void DoCMil_init(struct mtd_info *); | ||
217 | extern void DoCMilPlus_init(struct mtd_info *); | ||
218 | |||
219 | static void __init DoC_Probe(unsigned long physadr) | ||
220 | { | ||
221 | void __iomem *docptr; | ||
222 | struct DiskOnChip *this; | ||
223 | struct mtd_info *mtd; | ||
224 | int ChipID; | ||
225 | char namebuf[15]; | ||
226 | char *name = namebuf; | ||
227 | void (*initroutine)(struct mtd_info *) = NULL; | ||
228 | |||
229 | docptr = ioremap(physadr, DOC_IOREMAP_LEN); | ||
230 | |||
231 | if (!docptr) | ||
232 | return; | ||
233 | |||
234 | if ((ChipID = doccheck(docptr, physadr))) { | ||
235 | if (ChipID == DOC_ChipID_Doc2kTSOP) { | ||
236 | /* Remove this at your own peril. The hardware driver works but nothing prevents you from erasing bad blocks */ | ||
237 | printk(KERN_NOTICE "Refusing to drive DiskOnChip 2000 TSOP until Bad Block Table is correctly supported by INFTL\n"); | ||
238 | iounmap(docptr); | ||
239 | return; | ||
240 | } | ||
241 | docfound = 1; | ||
242 | mtd = kzalloc(sizeof(struct DiskOnChip) + sizeof(struct mtd_info), GFP_KERNEL); | ||
243 | if (!mtd) { | ||
244 | printk(KERN_WARNING "Cannot allocate memory for data structures. Dropping.\n"); | ||
245 | iounmap(docptr); | ||
246 | return; | ||
247 | } | ||
248 | |||
249 | this = (struct DiskOnChip *)(&mtd[1]); | ||
250 | mtd->priv = this; | ||
251 | this->virtadr = docptr; | ||
252 | this->physadr = physadr; | ||
253 | this->ChipID = ChipID; | ||
254 | sprintf(namebuf, "with ChipID %2.2X", ChipID); | ||
255 | |||
256 | switch(ChipID) { | ||
257 | case DOC_ChipID_Doc2kTSOP: | ||
258 | name="2000 TSOP"; | ||
259 | initroutine = symbol_request(DoC2k_init); | ||
260 | break; | ||
261 | |||
262 | case DOC_ChipID_Doc2k: | ||
263 | name="2000"; | ||
264 | initroutine = symbol_request(DoC2k_init); | ||
265 | break; | ||
266 | |||
267 | case DOC_ChipID_DocMil: | ||
268 | name="Millennium"; | ||
269 | #ifdef DOC_SINGLE_DRIVER | ||
270 | initroutine = symbol_request(DoC2k_init); | ||
271 | #else | ||
272 | initroutine = symbol_request(DoCMil_init); | ||
273 | #endif /* DOC_SINGLE_DRIVER */ | ||
274 | break; | ||
275 | |||
276 | case DOC_ChipID_DocMilPlus16: | ||
277 | case DOC_ChipID_DocMilPlus32: | ||
278 | name="MillenniumPlus"; | ||
279 | initroutine = symbol_request(DoCMilPlus_init); | ||
280 | break; | ||
281 | } | ||
282 | |||
283 | if (initroutine) { | ||
284 | (*initroutine)(mtd); | ||
285 | symbol_put_addr(initroutine); | ||
286 | return; | ||
287 | } | ||
288 | printk(KERN_NOTICE "Cannot find driver for DiskOnChip %s at 0x%lX\n", name, physadr); | ||
289 | kfree(mtd); | ||
290 | } | ||
291 | iounmap(docptr); | ||
292 | } | ||
293 | |||
294 | |||
295 | /**************************************************************************** | ||
296 | * | ||
297 | * Module stuff | ||
298 | * | ||
299 | ****************************************************************************/ | ||
300 | |||
301 | static int __init init_doc(void) | ||
302 | { | ||
303 | int i; | ||
304 | |||
305 | if (doc_config_location) { | ||
306 | printk(KERN_INFO "Using configured DiskOnChip probe address 0x%lx\n", doc_config_location); | ||
307 | DoC_Probe(doc_config_location); | ||
308 | } else { | ||
309 | for (i=0; (doc_locations[i] != 0xffffffff); i++) { | ||
310 | DoC_Probe(doc_locations[i]); | ||
311 | } | ||
312 | } | ||
313 | /* No banner message any more. Print a message if no DiskOnChip | ||
314 | found, so the user knows we at least tried. */ | ||
315 | if (!docfound) | ||
316 | printk(KERN_INFO "No recognised DiskOnChip devices found\n"); | ||
317 | return -EAGAIN; | ||
318 | } | ||
319 | |||
320 | module_init(init_doc); | ||
321 | |||
322 | MODULE_LICENSE("GPL"); | ||
323 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); | ||
324 | MODULE_DESCRIPTION("Probe code for DiskOnChip 2000 and Millennium devices"); | ||
325 | |||
diff --git a/drivers/mtd/devices/elm.c b/drivers/mtd/devices/elm.c index 2ec5da9ee248..dccef9fdc1f2 100644 --- a/drivers/mtd/devices/elm.c +++ b/drivers/mtd/devices/elm.c | |||
@@ -81,14 +81,21 @@ static u32 elm_read_reg(struct elm_info *info, int offset) | |||
81 | * @dev: ELM device | 81 | * @dev: ELM device |
82 | * @bch_type: Type of BCH ecc | 82 | * @bch_type: Type of BCH ecc |
83 | */ | 83 | */ |
84 | void elm_config(struct device *dev, enum bch_ecc bch_type) | 84 | int elm_config(struct device *dev, enum bch_ecc bch_type) |
85 | { | 85 | { |
86 | u32 reg_val; | 86 | u32 reg_val; |
87 | struct elm_info *info = dev_get_drvdata(dev); | 87 | struct elm_info *info = dev_get_drvdata(dev); |
88 | 88 | ||
89 | if (!info) { | ||
90 | dev_err(dev, "Unable to configure elm - device not probed?\n"); | ||
91 | return -ENODEV; | ||
92 | } | ||
93 | |||
89 | reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); | 94 | reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); |
90 | elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); | 95 | elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); |
91 | info->bch_type = bch_type; | 96 | info->bch_type = bch_type; |
97 | |||
98 | return 0; | ||
92 | } | 99 | } |
93 | EXPORT_SYMBOL(elm_config); | 100 | EXPORT_SYMBOL(elm_config); |
94 | 101 | ||
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 5b6b0728be21..2f3d2a5ff349 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c | |||
@@ -681,6 +681,7 @@ struct flash_info { | |||
681 | u16 flags; | 681 | u16 flags; |
682 | #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ | 682 | #define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */ |
683 | #define M25P_NO_ERASE 0x02 /* No erase command needed */ | 683 | #define M25P_NO_ERASE 0x02 /* No erase command needed */ |
684 | #define SST_WRITE 0x04 /* use SST byte programming */ | ||
684 | }; | 685 | }; |
685 | 686 | ||
686 | #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ | 687 | #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ |
@@ -728,6 +729,7 @@ static const struct spi_device_id m25p_ids[] = { | |||
728 | { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) }, | 729 | { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) }, |
729 | { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, | 730 | { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, |
730 | { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, | 731 | { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, |
732 | { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) }, | ||
731 | 733 | ||
732 | /* Everspin */ | 734 | /* Everspin */ |
733 | { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) }, | 735 | { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) }, |
@@ -740,7 +742,6 @@ static const struct spi_device_id m25p_ids[] = { | |||
740 | { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, | 742 | { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, |
741 | { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, | 743 | { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, |
742 | { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, | 744 | { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, |
743 | { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) }, | ||
744 | 745 | ||
745 | /* Macronix */ | 746 | /* Macronix */ |
746 | { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) }, | 747 | { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) }, |
@@ -753,8 +754,10 @@ static const struct spi_device_id m25p_ids[] = { | |||
753 | { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, | 754 | { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, |
754 | { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, | 755 | { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, |
755 | { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, | 756 | { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, |
757 | { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, 0) }, | ||
756 | 758 | ||
757 | /* Micron */ | 759 | /* Micron */ |
760 | { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) }, | ||
758 | { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, 0) }, | 761 | { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, 0) }, |
759 | { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) }, | 762 | { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) }, |
760 | { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) }, | 763 | { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) }, |
@@ -781,14 +784,15 @@ static const struct spi_device_id m25p_ids[] = { | |||
781 | { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, | 784 | { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, |
782 | 785 | ||
783 | /* SST -- large erase sizes are "overlays", "sectors" are 4K */ | 786 | /* SST -- large erase sizes are "overlays", "sectors" are 4K */ |
784 | { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K) }, | 787 | { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, |
785 | { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) }, | 788 | { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) }, |
786 | { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) }, | 789 | { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) }, |
787 | { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) }, | 790 | { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) }, |
788 | { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) }, | 791 | { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) }, |
789 | { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) }, | 792 | { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K | SST_WRITE) }, |
790 | { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) }, | 793 | { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K | SST_WRITE) }, |
791 | { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) }, | 794 | { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K | SST_WRITE) }, |
795 | { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, | ||
792 | 796 | ||
793 | /* ST Microelectronics -- newer production may have feature updates */ | 797 | /* ST Microelectronics -- newer production may have feature updates */ |
794 | { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, | 798 | { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) }, |
@@ -838,6 +842,7 @@ static const struct spi_device_id m25p_ids[] = { | |||
838 | { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, | 842 | { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, |
839 | { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, | 843 | { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, |
840 | { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, | 844 | { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, |
845 | { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, | ||
841 | { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, | 846 | { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, |
842 | 847 | ||
843 | /* Catalyst / On Semiconductor -- non-JEDEC */ | 848 | /* Catalyst / On Semiconductor -- non-JEDEC */ |
@@ -1000,7 +1005,7 @@ static int m25p_probe(struct spi_device *spi) | |||
1000 | } | 1005 | } |
1001 | 1006 | ||
1002 | /* sst flash chips use AAI word program */ | 1007 | /* sst flash chips use AAI word program */ |
1003 | if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) | 1008 | if (info->flags & SST_WRITE) |
1004 | flash->mtd._write = sst_write; | 1009 | flash->mtd._write = sst_write; |
1005 | else | 1010 | else |
1006 | flash->mtd._write = m25p80_write; | 1011 | flash->mtd._write = m25p80_write; |
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c index 945c9f762349..28779b6dfcd9 100644 --- a/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c | |||
@@ -105,8 +105,6 @@ static const struct of_device_id dataflash_dt_ids[] = { | |||
105 | { .compatible = "atmel,dataflash", }, | 105 | { .compatible = "atmel,dataflash", }, |
106 | { /* sentinel */ } | 106 | { /* sentinel */ } |
107 | }; | 107 | }; |
108 | #else | ||
109 | #define dataflash_dt_ids NULL | ||
110 | #endif | 108 | #endif |
111 | 109 | ||
112 | /* ......................................................................... */ | 110 | /* ......................................................................... */ |
@@ -914,7 +912,7 @@ static struct spi_driver dataflash_driver = { | |||
914 | .driver = { | 912 | .driver = { |
915 | .name = "mtd_dataflash", | 913 | .name = "mtd_dataflash", |
916 | .owner = THIS_MODULE, | 914 | .owner = THIS_MODULE, |
917 | .of_match_table = dataflash_dt_ids, | 915 | .of_match_table = of_match_ptr(dataflash_dt_ids), |
918 | }, | 916 | }, |
919 | 917 | ||
920 | .probe = dataflash_probe, | 918 | .probe = dataflash_probe, |
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index c26938382f64..bed9d58d5741 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig | |||
@@ -249,22 +249,6 @@ config MTD_LANTIQ | |||
249 | help | 249 | help |
250 | Support for NOR flash attached to the Lantiq SoC's External Bus Unit. | 250 | Support for NOR flash attached to the Lantiq SoC's External Bus Unit. |
251 | 251 | ||
252 | config MTD_DILNETPC | ||
253 | tristate "CFI Flash device mapped on DIL/Net PC" | ||
254 | depends on X86 && MTD_CFI_INTELEXT && BROKEN | ||
255 | help | ||
256 | MTD map driver for SSV DIL/Net PC Boards "DNP" and "ADNP". | ||
257 | For details, see <http://www.ssv-embedded.de/ssv/pc104/p169.htm> | ||
258 | and <http://www.ssv-embedded.de/ssv/pc104/p170.htm> | ||
259 | |||
260 | config MTD_DILNETPC_BOOTSIZE | ||
261 | hex "Size of DIL/Net PC flash boot partition" | ||
262 | depends on MTD_DILNETPC | ||
263 | default "0x80000" | ||
264 | help | ||
265 | The amount of space taken up by the kernel or Etherboot | ||
266 | on the DIL/Net PC flash chips. | ||
267 | |||
268 | config MTD_L440GX | 252 | config MTD_L440GX |
269 | tristate "BIOS flash chip on Intel L440GX boards" | 253 | tristate "BIOS flash chip on Intel L440GX boards" |
270 | depends on X86 && MTD_JEDECPROBE | 254 | depends on X86 && MTD_JEDECPROBE |
@@ -274,42 +258,6 @@ config MTD_L440GX | |||
274 | 258 | ||
275 | BE VERY CAREFUL. | 259 | BE VERY CAREFUL. |
276 | 260 | ||
277 | config MTD_TQM8XXL | ||
278 | tristate "CFI Flash device mapped on TQM8XXL" | ||
279 | depends on MTD_CFI && TQM8xxL | ||
280 | help | ||
281 | The TQM8xxL PowerPC board has up to two banks of CFI-compliant | ||
282 | chips, currently uses AMD one. This 'mapping' driver supports | ||
283 | that arrangement, allowing the CFI probe and command set driver | ||
284 | code to communicate with the chips on the TQM8xxL board. More at | ||
285 | <http://www.denx.de/wiki/PPCEmbedded/>. | ||
286 | |||
287 | config MTD_RPXLITE | ||
288 | tristate "CFI Flash device mapped on RPX Lite or CLLF" | ||
289 | depends on MTD_CFI && (RPXCLASSIC || RPXLITE) | ||
290 | help | ||
291 | The RPXLite PowerPC board has CFI-compliant chips mapped in | ||
292 | a strange sparse mapping. This 'mapping' driver supports that | ||
293 | arrangement, allowing the CFI probe and command set driver code | ||
294 | to communicate with the chips on the RPXLite board. More at | ||
295 | <http://www.embeddedplanet.com/>. | ||
296 | |||
297 | config MTD_MBX860 | ||
298 | tristate "System flash on MBX860 board" | ||
299 | depends on MTD_CFI && MBX | ||
300 | help | ||
301 | This enables access routines for the flash chips on the Motorola | ||
302 | MBX860 board. If you have one of these boards and would like | ||
303 | to use the flash chips on it, say 'Y'. | ||
304 | |||
305 | config MTD_DBOX2 | ||
306 | tristate "CFI Flash device mapped on D-Box2" | ||
307 | depends on DBOX2 && MTD_CFI_INTELSTD && MTD_CFI_INTELEXT && MTD_CFI_AMDSTD | ||
308 | help | ||
309 | This enables access routines for the flash chips on the Nokia/Sagem | ||
310 | D-Box 2 board. If you have one of these boards and would like to use | ||
311 | the flash chips on it, say 'Y'. | ||
312 | |||
313 | config MTD_CFI_FLAGADM | 261 | config MTD_CFI_FLAGADM |
314 | tristate "CFI Flash device mapping on FlagaDM" | 262 | tristate "CFI Flash device mapping on FlagaDM" |
315 | depends on 8xx && MTD_CFI | 263 | depends on 8xx && MTD_CFI |
@@ -349,15 +297,6 @@ config MTD_IXP4XX | |||
349 | IXDP425 and Coyote. If you have an IXP4xx based board and | 297 | IXDP425 and Coyote. If you have an IXP4xx based board and |
350 | would like to use the flash chips on it, say 'Y'. | 298 | would like to use the flash chips on it, say 'Y'. |
351 | 299 | ||
352 | config MTD_IXP2000 | ||
353 | tristate "CFI Flash device mapped on Intel IXP2000 based systems" | ||
354 | depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP2000 | ||
355 | help | ||
356 | This enables MTD access to flash devices on platforms based | ||
357 | on Intel's IXP2000 family of network processors. If you have an | ||
358 | IXP2000 based board and would like to use the flash chips on it, | ||
359 | say 'Y'. | ||
360 | |||
361 | config MTD_AUTCPU12 | 300 | config MTD_AUTCPU12 |
362 | bool "NV-RAM mapping AUTCPU12 board" | 301 | bool "NV-RAM mapping AUTCPU12 board" |
363 | depends on ARCH_AUTCPU12 | 302 | depends on ARCH_AUTCPU12 |
@@ -372,13 +311,6 @@ config MTD_IMPA7 | |||
372 | This enables access to the NOR Flash on the impA7 board of | 311 | This enables access to the NOR Flash on the impA7 board of |
373 | implementa GmbH. If you have such a board, say 'Y' here. | 312 | implementa GmbH. If you have such a board, say 'Y' here. |
374 | 313 | ||
375 | config MTD_H720X | ||
376 | tristate "Hynix evaluation board mappings" | ||
377 | depends on MTD_CFI && ( ARCH_H7201 || ARCH_H7202 ) | ||
378 | help | ||
379 | This enables access to the flash chips on the Hynix evaluation boards. | ||
380 | If you have such a board, say 'Y'. | ||
381 | |||
382 | # This needs CFI or JEDEC, depending on the cards found. | 314 | # This needs CFI or JEDEC, depending on the cards found. |
383 | config MTD_PCI | 315 | config MTD_PCI |
384 | tristate "PCI MTD driver" | 316 | tristate "PCI MTD driver" |
@@ -433,15 +365,6 @@ config MTD_UCLINUX | |||
433 | help | 365 | help |
434 | Map driver to support image based filesystems for uClinux. | 366 | Map driver to support image based filesystems for uClinux. |
435 | 367 | ||
436 | config MTD_DMV182 | ||
437 | tristate "Map driver for Dy-4 SVME/DMV-182 board." | ||
438 | depends on DMV182 | ||
439 | select MTD_MAP_BANK_WIDTH_32 | ||
440 | select MTD_CFI_I8 | ||
441 | select MTD_CFI_AMDSTD | ||
442 | help | ||
443 | Map driver for Dy-4 SVME/DMV-182 board. | ||
444 | |||
445 | config MTD_INTEL_VR_NOR | 368 | config MTD_INTEL_VR_NOR |
446 | tristate "NOR flash on Intel Vermilion Range Expansion Bus CS0" | 369 | tristate "NOR flash on Intel Vermilion Range Expansion Bus CS0" |
447 | depends on PCI | 370 | depends on PCI |
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 4ded28711bc1..395a12444048 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile | |||
@@ -9,7 +9,6 @@ endif | |||
9 | # Chip mappings | 9 | # Chip mappings |
10 | obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o | 10 | obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o |
11 | obj-$(CONFIG_MTD_DC21285) += dc21285.o | 11 | obj-$(CONFIG_MTD_DC21285) += dc21285.o |
12 | obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o | ||
13 | obj-$(CONFIG_MTD_L440GX) += l440gx.o | 12 | obj-$(CONFIG_MTD_L440GX) += l440gx.o |
14 | obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o | 13 | obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o |
15 | obj-$(CONFIG_MTD_ESB2ROM) += esb2rom.o | 14 | obj-$(CONFIG_MTD_ESB2ROM) += esb2rom.o |
@@ -17,15 +16,12 @@ obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o | |||
17 | obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o | 16 | obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o |
18 | obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o | 17 | obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o |
19 | obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o | 18 | obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o |
20 | obj-$(CONFIG_MTD_MBX860) += mbx860.o | ||
21 | obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o | 19 | obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o |
22 | obj-$(CONFIG_MTD_PHYSMAP) += physmap.o | 20 | obj-$(CONFIG_MTD_PHYSMAP) += physmap.o |
23 | obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o | 21 | obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o |
24 | obj-$(CONFIG_MTD_PISMO) += pismo.o | 22 | obj-$(CONFIG_MTD_PISMO) += pismo.o |
25 | obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o | 23 | obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o |
26 | obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o | 24 | obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o |
27 | obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o | ||
28 | obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o | ||
29 | obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o | 25 | obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o |
30 | obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o | 26 | obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o |
31 | obj-$(CONFIG_MTD_SC520CDP) += sc520cdp.o | 27 | obj-$(CONFIG_MTD_SC520CDP) += sc520cdp.o |
@@ -34,7 +30,6 @@ obj-$(CONFIG_MTD_TS5500) += ts5500_flash.o | |||
34 | obj-$(CONFIG_MTD_SUN_UFLASH) += sun_uflash.o | 30 | obj-$(CONFIG_MTD_SUN_UFLASH) += sun_uflash.o |
35 | obj-$(CONFIG_MTD_VMAX) += vmax301.o | 31 | obj-$(CONFIG_MTD_VMAX) += vmax301.o |
36 | obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o | 32 | obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o |
37 | obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o | ||
38 | obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o | 33 | obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o |
39 | obj-$(CONFIG_MTD_PCI) += pci.o | 34 | obj-$(CONFIG_MTD_PCI) += pci.o |
40 | obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o | 35 | obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o |
@@ -42,10 +37,7 @@ obj-$(CONFIG_MTD_IMPA7) += impa7.o | |||
42 | obj-$(CONFIG_MTD_UCLINUX) += uclinux.o | 37 | obj-$(CONFIG_MTD_UCLINUX) += uclinux.o |
43 | obj-$(CONFIG_MTD_NETtel) += nettel.o | 38 | obj-$(CONFIG_MTD_NETtel) += nettel.o |
44 | obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o | 39 | obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o |
45 | obj-$(CONFIG_MTD_H720X) += h720x-flash.o | ||
46 | obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o | 40 | obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o |
47 | obj-$(CONFIG_MTD_IXP2000) += ixp2000.o | ||
48 | obj-$(CONFIG_MTD_DMV182) += dmv182.o | ||
49 | obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o | 41 | obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o |
50 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o | 42 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o |
51 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o | 43 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o |
diff --git a/drivers/mtd/maps/bfin-async-flash.c b/drivers/mtd/maps/bfin-async-flash.c index f833edfaab79..319b04a6c9d1 100644 --- a/drivers/mtd/maps/bfin-async-flash.c +++ b/drivers/mtd/maps/bfin-async-flash.c | |||
@@ -122,7 +122,8 @@ static void bfin_flash_copy_to(struct map_info *map, unsigned long to, const voi | |||
122 | switch_back(state); | 122 | switch_back(state); |
123 | } | 123 | } |
124 | 124 | ||
125 | static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; | 125 | static const char * const part_probe_types[] = { |
126 | "cmdlinepart", "RedBoot", NULL }; | ||
126 | 127 | ||
127 | static int bfin_flash_probe(struct platform_device *pdev) | 128 | static int bfin_flash_probe(struct platform_device *pdev) |
128 | { | 129 | { |
diff --git a/drivers/mtd/maps/ck804xrom.c b/drivers/mtd/maps/ck804xrom.c index 586a1c77e48a..0455166f05fa 100644 --- a/drivers/mtd/maps/ck804xrom.c +++ b/drivers/mtd/maps/ck804xrom.c | |||
@@ -308,8 +308,7 @@ static int ck804xrom_init_one(struct pci_dev *pdev, | |||
308 | 308 | ||
309 | out: | 309 | out: |
310 | /* Free any left over map structures */ | 310 | /* Free any left over map structures */ |
311 | if (map) | 311 | kfree(map); |
312 | kfree(map); | ||
313 | 312 | ||
314 | /* See if I have any map structures */ | 313 | /* See if I have any map structures */ |
315 | if (list_empty(&window->maps)) { | 314 | if (list_empty(&window->maps)) { |
diff --git a/drivers/mtd/maps/dbox2-flash.c b/drivers/mtd/maps/dbox2-flash.c deleted file mode 100644 index 85bdece6ab3f..000000000000 --- a/drivers/mtd/maps/dbox2-flash.c +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * D-Box 2 flash driver | ||
3 | */ | ||
4 | |||
5 | #include <linux/module.h> | ||
6 | #include <linux/types.h> | ||
7 | #include <linux/kernel.h> | ||
8 | #include <linux/init.h> | ||
9 | #include <asm/io.h> | ||
10 | #include <linux/mtd/mtd.h> | ||
11 | #include <linux/mtd/map.h> | ||
12 | #include <linux/mtd/partitions.h> | ||
13 | #include <linux/errno.h> | ||
14 | |||
15 | /* partition_info gives details on the logical partitions that the split the | ||
16 | * single flash device into. If the size if zero we use up to the end of the | ||
17 | * device. */ | ||
18 | static struct mtd_partition partition_info[]= { | ||
19 | { | ||
20 | .name = "BR bootloader", | ||
21 | .size = 128 * 1024, | ||
22 | .offset = 0, | ||
23 | .mask_flags = MTD_WRITEABLE | ||
24 | }, | ||
25 | { | ||
26 | .name = "FLFS (U-Boot)", | ||
27 | .size = 128 * 1024, | ||
28 | .offset = MTDPART_OFS_APPEND, | ||
29 | .mask_flags = 0 | ||
30 | }, | ||
31 | { | ||
32 | .name = "Root (SquashFS)", | ||
33 | .size = 7040 * 1024, | ||
34 | .offset = MTDPART_OFS_APPEND, | ||
35 | .mask_flags = 0 | ||
36 | }, | ||
37 | { | ||
38 | .name = "var (JFFS2)", | ||
39 | .size = 896 * 1024, | ||
40 | .offset = MTDPART_OFS_APPEND, | ||
41 | .mask_flags = 0 | ||
42 | }, | ||
43 | { | ||
44 | .name = "Flash without bootloader", | ||
45 | .size = MTDPART_SIZ_FULL, | ||
46 | .offset = 128 * 1024, | ||
47 | .mask_flags = 0 | ||
48 | }, | ||
49 | { | ||
50 | .name = "Complete Flash", | ||
51 | .size = MTDPART_SIZ_FULL, | ||
52 | .offset = 0, | ||
53 | .mask_flags = MTD_WRITEABLE | ||
54 | } | ||
55 | }; | ||
56 | |||
57 | #define NUM_PARTITIONS ARRAY_SIZE(partition_info) | ||
58 | |||
59 | #define WINDOW_ADDR 0x10000000 | ||
60 | #define WINDOW_SIZE 0x800000 | ||
61 | |||
62 | static struct mtd_info *mymtd; | ||
63 | |||
64 | |||
65 | struct map_info dbox2_flash_map = { | ||
66 | .name = "D-Box 2 flash memory", | ||
67 | .size = WINDOW_SIZE, | ||
68 | .bankwidth = 4, | ||
69 | .phys = WINDOW_ADDR, | ||
70 | }; | ||
71 | |||
72 | static int __init init_dbox2_flash(void) | ||
73 | { | ||
74 | printk(KERN_NOTICE "D-Box 2 flash driver (size->0x%X mem->0x%X)\n", WINDOW_SIZE, WINDOW_ADDR); | ||
75 | dbox2_flash_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE); | ||
76 | |||
77 | if (!dbox2_flash_map.virt) { | ||
78 | printk("Failed to ioremap\n"); | ||
79 | return -EIO; | ||
80 | } | ||
81 | simple_map_init(&dbox2_flash_map); | ||
82 | |||
83 | // Probe for dual Intel 28F320 or dual AMD | ||
84 | mymtd = do_map_probe("cfi_probe", &dbox2_flash_map); | ||
85 | if (!mymtd) { | ||
86 | // Probe for single Intel 28F640 | ||
87 | dbox2_flash_map.bankwidth = 2; | ||
88 | |||
89 | mymtd = do_map_probe("cfi_probe", &dbox2_flash_map); | ||
90 | } | ||
91 | |||
92 | if (mymtd) { | ||
93 | mymtd->owner = THIS_MODULE; | ||
94 | |||
95 | /* Create MTD devices for each partition. */ | ||
96 | mtd_device_register(mymtd, partition_info, NUM_PARTITIONS); | ||
97 | |||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | iounmap((void *)dbox2_flash_map.virt); | ||
102 | return -ENXIO; | ||
103 | } | ||
104 | |||
105 | static void __exit cleanup_dbox2_flash(void) | ||
106 | { | ||
107 | if (mymtd) { | ||
108 | mtd_device_unregister(mymtd); | ||
109 | map_destroy(mymtd); | ||
110 | } | ||
111 | if (dbox2_flash_map.virt) { | ||
112 | iounmap((void *)dbox2_flash_map.virt); | ||
113 | dbox2_flash_map.virt = 0; | ||
114 | } | ||
115 | } | ||
116 | |||
117 | module_init(init_dbox2_flash); | ||
118 | module_exit(cleanup_dbox2_flash); | ||
119 | |||
120 | |||
121 | MODULE_LICENSE("GPL"); | ||
122 | MODULE_AUTHOR("Kári DavÃðsson <kd@flaga.is>, Bastian Blank <waldi@tuxbox.org>, Alexander Wild <wild@te-elektronik.com>"); | ||
123 | MODULE_DESCRIPTION("MTD map driver for D-Box 2 board"); | ||
diff --git a/drivers/mtd/maps/dc21285.c b/drivers/mtd/maps/dc21285.c index 080f06053bd4..f8a7dd14cee0 100644 --- a/drivers/mtd/maps/dc21285.c +++ b/drivers/mtd/maps/dc21285.c | |||
@@ -143,9 +143,8 @@ static struct map_info dc21285_map = { | |||
143 | .copy_from = dc21285_copy_from, | 143 | .copy_from = dc21285_copy_from, |
144 | }; | 144 | }; |
145 | 145 | ||
146 | |||
147 | /* Partition stuff */ | 146 | /* Partition stuff */ |
148 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | 147 | static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL }; |
149 | 148 | ||
150 | static int __init init_dc21285(void) | 149 | static int __init init_dc21285(void) |
151 | { | 150 | { |
diff --git a/drivers/mtd/maps/dilnetpc.c b/drivers/mtd/maps/dilnetpc.c deleted file mode 100644 index 3e393f0da823..000000000000 --- a/drivers/mtd/maps/dilnetpc.c +++ /dev/null | |||
@@ -1,496 +0,0 @@ | |||
1 | /* dilnetpc.c -- MTD map driver for SSV DIL/Net PC Boards "DNP" and "ADNP" | ||
2 | * | ||
3 | * This program is free software; you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation; either version 2 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA | ||
16 | * | ||
17 | * The DIL/Net PC is a tiny embedded PC board made by SSV Embedded Systems | ||
18 | * featuring the AMD Elan SC410 processor. There are two variants of this | ||
19 | * board: DNP/1486 and ADNP/1486. The DNP version has 2 megs of flash | ||
20 | * ROM (Intel 28F016S3) and 8 megs of DRAM, the ADNP version has 4 megs | ||
21 | * flash and 16 megs of RAM. | ||
22 | * For details, see http://www.ssv-embedded.de/ssv/pc104/p169.htm | ||
23 | * and http://www.ssv-embedded.de/ssv/pc104/p170.htm | ||
24 | */ | ||
25 | |||
26 | #include <linux/module.h> | ||
27 | #include <linux/types.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/string.h> | ||
31 | |||
32 | #include <linux/mtd/mtd.h> | ||
33 | #include <linux/mtd/map.h> | ||
34 | #include <linux/mtd/partitions.h> | ||
35 | #include <linux/mtd/concat.h> | ||
36 | |||
37 | #include <asm/io.h> | ||
38 | |||
39 | /* | ||
40 | ** The DIL/NetPC keeps its BIOS in two distinct flash blocks. | ||
41 | ** Destroying any of these blocks transforms the DNPC into | ||
42 | ** a paperweight (albeit not a very useful one, considering | ||
43 | ** it only weighs a few grams). | ||
44 | ** | ||
45 | ** Therefore, the BIOS blocks must never be erased or written to | ||
46 | ** except by people who know exactly what they are doing (e.g. | ||
47 | ** to install a BIOS update). These partitions are marked read-only | ||
48 | ** by default, but can be made read/write by undefining | ||
49 | ** DNPC_BIOS_BLOCKS_WRITEPROTECTED: | ||
50 | */ | ||
51 | #define DNPC_BIOS_BLOCKS_WRITEPROTECTED | ||
52 | |||
53 | /* | ||
54 | ** The ID string (in ROM) is checked to determine whether we | ||
55 | ** are running on a DNP/1486 or ADNP/1486 | ||
56 | */ | ||
57 | #define BIOSID_BASE 0x000fe100 | ||
58 | |||
59 | #define ID_DNPC "DNP1486" | ||
60 | #define ID_ADNP "ADNP1486" | ||
61 | |||
62 | /* | ||
63 | ** Address where the flash should appear in CPU space | ||
64 | */ | ||
65 | #define FLASH_BASE 0x2000000 | ||
66 | |||
67 | /* | ||
68 | ** Chip Setup and Control (CSC) indexed register space | ||
69 | */ | ||
70 | #define CSC_INDEX 0x22 | ||
71 | #define CSC_DATA 0x23 | ||
72 | |||
73 | #define CSC_MMSWAR 0x30 /* MMS window C-F attributes register */ | ||
74 | #define CSC_MMSWDSR 0x31 /* MMS window C-F device select register */ | ||
75 | |||
76 | #define CSC_RBWR 0xa7 /* GPIO Read-Back/Write Register B */ | ||
77 | |||
78 | #define CSC_CR 0xd0 /* internal I/O device disable/Echo */ | ||
79 | /* Z-bus/configuration register */ | ||
80 | |||
81 | #define CSC_PCCMDCR 0xf1 /* PC card mode and DMA control register */ | ||
82 | |||
83 | |||
84 | /* | ||
85 | ** PC Card indexed register space: | ||
86 | */ | ||
87 | |||
88 | #define PCC_INDEX 0x3e0 | ||
89 | #define PCC_DATA 0x3e1 | ||
90 | |||
91 | #define PCC_AWER_B 0x46 /* Socket B Address Window enable register */ | ||
92 | #define PCC_MWSAR_1_Lo 0x58 /* memory window 1 start address low register */ | ||
93 | #define PCC_MWSAR_1_Hi 0x59 /* memory window 1 start address high register */ | ||
94 | #define PCC_MWEAR_1_Lo 0x5A /* memory window 1 stop address low register */ | ||
95 | #define PCC_MWEAR_1_Hi 0x5B /* memory window 1 stop address high register */ | ||
96 | #define PCC_MWAOR_1_Lo 0x5C /* memory window 1 address offset low register */ | ||
97 | #define PCC_MWAOR_1_Hi 0x5D /* memory window 1 address offset high register */ | ||
98 | |||
99 | |||
100 | /* | ||
101 | ** Access to SC4x0's Chip Setup and Control (CSC) | ||
102 | ** and PC Card (PCC) indexed registers: | ||
103 | */ | ||
104 | static inline void setcsc(int reg, unsigned char data) | ||
105 | { | ||
106 | outb(reg, CSC_INDEX); | ||
107 | outb(data, CSC_DATA); | ||
108 | } | ||
109 | |||
110 | static inline unsigned char getcsc(int reg) | ||
111 | { | ||
112 | outb(reg, CSC_INDEX); | ||
113 | return(inb(CSC_DATA)); | ||
114 | } | ||
115 | |||
116 | static inline void setpcc(int reg, unsigned char data) | ||
117 | { | ||
118 | outb(reg, PCC_INDEX); | ||
119 | outb(data, PCC_DATA); | ||
120 | } | ||
121 | |||
122 | static inline unsigned char getpcc(int reg) | ||
123 | { | ||
124 | outb(reg, PCC_INDEX); | ||
125 | return(inb(PCC_DATA)); | ||
126 | } | ||
127 | |||
128 | |||
129 | /* | ||
130 | ************************************************************ | ||
131 | ** Enable access to DIL/NetPC's flash by mapping it into | ||
132 | ** the SC4x0's MMS Window C. | ||
133 | ************************************************************ | ||
134 | */ | ||
135 | static void dnpc_map_flash(unsigned long flash_base, unsigned long flash_size) | ||
136 | { | ||
137 | unsigned long flash_end = flash_base + flash_size - 1; | ||
138 | |||
139 | /* | ||
140 | ** enable setup of MMS windows C-F: | ||
141 | */ | ||
142 | /* - enable PC Card indexed register space */ | ||
143 | setcsc(CSC_CR, getcsc(CSC_CR) | 0x2); | ||
144 | /* - set PC Card controller to operate in standard mode */ | ||
145 | setcsc(CSC_PCCMDCR, getcsc(CSC_PCCMDCR) & ~1); | ||
146 | |||
147 | /* | ||
148 | ** Program base address and end address of window | ||
149 | ** where the flash ROM should appear in CPU address space | ||
150 | */ | ||
151 | setpcc(PCC_MWSAR_1_Lo, (flash_base >> 12) & 0xff); | ||
152 | setpcc(PCC_MWSAR_1_Hi, (flash_base >> 20) & 0x3f); | ||
153 | setpcc(PCC_MWEAR_1_Lo, (flash_end >> 12) & 0xff); | ||
154 | setpcc(PCC_MWEAR_1_Hi, (flash_end >> 20) & 0x3f); | ||
155 | |||
156 | /* program offset of first flash location to appear in this window (0) */ | ||
157 | setpcc(PCC_MWAOR_1_Lo, ((0 - flash_base) >> 12) & 0xff); | ||
158 | setpcc(PCC_MWAOR_1_Hi, ((0 - flash_base)>> 20) & 0x3f); | ||
159 | |||
160 | /* set attributes for MMS window C: non-cacheable, write-enabled */ | ||
161 | setcsc(CSC_MMSWAR, getcsc(CSC_MMSWAR) & ~0x11); | ||
162 | |||
163 | /* select physical device ROMCS0 (i.e. flash) for MMS Window C */ | ||
164 | setcsc(CSC_MMSWDSR, getcsc(CSC_MMSWDSR) & ~0x03); | ||
165 | |||
166 | /* enable memory window 1 */ | ||
167 | setpcc(PCC_AWER_B, getpcc(PCC_AWER_B) | 0x02); | ||
168 | |||
169 | /* now disable PC Card indexed register space again */ | ||
170 | setcsc(CSC_CR, getcsc(CSC_CR) & ~0x2); | ||
171 | } | ||
172 | |||
173 | |||
174 | /* | ||
175 | ************************************************************ | ||
176 | ** Disable access to DIL/NetPC's flash by mapping it into | ||
177 | ** the SC4x0's MMS Window C. | ||
178 | ************************************************************ | ||
179 | */ | ||
180 | static void dnpc_unmap_flash(void) | ||
181 | { | ||
182 | /* - enable PC Card indexed register space */ | ||
183 | setcsc(CSC_CR, getcsc(CSC_CR) | 0x2); | ||
184 | |||
185 | /* disable memory window 1 */ | ||
186 | setpcc(PCC_AWER_B, getpcc(PCC_AWER_B) & ~0x02); | ||
187 | |||
188 | /* now disable PC Card indexed register space again */ | ||
189 | setcsc(CSC_CR, getcsc(CSC_CR) & ~0x2); | ||
190 | } | ||
191 | |||
192 | |||
193 | |||
194 | /* | ||
195 | ************************************************************ | ||
196 | ** Enable/Disable VPP to write to flash | ||
197 | ************************************************************ | ||
198 | */ | ||
199 | |||
200 | static DEFINE_SPINLOCK(dnpc_spin); | ||
201 | static int vpp_counter = 0; | ||
202 | /* | ||
203 | ** This is what has to be done for the DNP board .. | ||
204 | */ | ||
205 | static void dnp_set_vpp(struct map_info *not_used, int on) | ||
206 | { | ||
207 | spin_lock_irq(&dnpc_spin); | ||
208 | |||
209 | if (on) | ||
210 | { | ||
211 | if(++vpp_counter == 1) | ||
212 | setcsc(CSC_RBWR, getcsc(CSC_RBWR) & ~0x4); | ||
213 | } | ||
214 | else | ||
215 | { | ||
216 | if(--vpp_counter == 0) | ||
217 | setcsc(CSC_RBWR, getcsc(CSC_RBWR) | 0x4); | ||
218 | else | ||
219 | BUG_ON(vpp_counter < 0); | ||
220 | } | ||
221 | spin_unlock_irq(&dnpc_spin); | ||
222 | } | ||
223 | |||
224 | /* | ||
225 | ** .. and this the ADNP version: | ||
226 | */ | ||
227 | static void adnp_set_vpp(struct map_info *not_used, int on) | ||
228 | { | ||
229 | spin_lock_irq(&dnpc_spin); | ||
230 | |||
231 | if (on) | ||
232 | { | ||
233 | if(++vpp_counter == 1) | ||
234 | setcsc(CSC_RBWR, getcsc(CSC_RBWR) & ~0x8); | ||
235 | } | ||
236 | else | ||
237 | { | ||
238 | if(--vpp_counter == 0) | ||
239 | setcsc(CSC_RBWR, getcsc(CSC_RBWR) | 0x8); | ||
240 | else | ||
241 | BUG_ON(vpp_counter < 0); | ||
242 | } | ||
243 | spin_unlock_irq(&dnpc_spin); | ||
244 | } | ||
245 | |||
246 | |||
247 | |||
248 | #define DNP_WINDOW_SIZE 0x00200000 /* DNP flash size is 2MiB */ | ||
249 | #define ADNP_WINDOW_SIZE 0x00400000 /* ADNP flash size is 4MiB */ | ||
250 | #define WINDOW_ADDR FLASH_BASE | ||
251 | |||
252 | static struct map_info dnpc_map = { | ||
253 | .name = "ADNP Flash Bank", | ||
254 | .size = ADNP_WINDOW_SIZE, | ||
255 | .bankwidth = 1, | ||
256 | .set_vpp = adnp_set_vpp, | ||
257 | .phys = WINDOW_ADDR | ||
258 | }; | ||
259 | |||
260 | /* | ||
261 | ** The layout of the flash is somewhat "strange": | ||
262 | ** | ||
263 | ** 1. 960 KiB (15 blocks) : Space for ROM Bootloader and user data | ||
264 | ** 2. 64 KiB (1 block) : System BIOS | ||
265 | ** 3. 960 KiB (15 blocks) : User Data (DNP model) or | ||
266 | ** 3. 3008 KiB (47 blocks) : User Data (ADNP model) | ||
267 | ** 4. 64 KiB (1 block) : System BIOS Entry | ||
268 | */ | ||
269 | |||
270 | static struct mtd_partition partition_info[]= | ||
271 | { | ||
272 | { | ||
273 | .name = "ADNP boot", | ||
274 | .offset = 0, | ||
275 | .size = 0xf0000, | ||
276 | }, | ||
277 | { | ||
278 | .name = "ADNP system BIOS", | ||
279 | .offset = MTDPART_OFS_NXTBLK, | ||
280 | .size = 0x10000, | ||
281 | #ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED | ||
282 | .mask_flags = MTD_WRITEABLE, | ||
283 | #endif | ||
284 | }, | ||
285 | { | ||
286 | .name = "ADNP file system", | ||
287 | .offset = MTDPART_OFS_NXTBLK, | ||
288 | .size = 0x2f0000, | ||
289 | }, | ||
290 | { | ||
291 | .name = "ADNP system BIOS entry", | ||
292 | .offset = MTDPART_OFS_NXTBLK, | ||
293 | .size = MTDPART_SIZ_FULL, | ||
294 | #ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED | ||
295 | .mask_flags = MTD_WRITEABLE, | ||
296 | #endif | ||
297 | }, | ||
298 | }; | ||
299 | |||
300 | #define NUM_PARTITIONS ARRAY_SIZE(partition_info) | ||
301 | |||
302 | static struct mtd_info *mymtd; | ||
303 | static struct mtd_info *lowlvl_parts[NUM_PARTITIONS]; | ||
304 | static struct mtd_info *merged_mtd; | ||
305 | |||
306 | /* | ||
307 | ** "Highlevel" partition info: | ||
308 | ** | ||
309 | ** Using the MTD concat layer, we can re-arrange partitions to our | ||
310 | ** liking: we construct a virtual MTD device by concatenating the | ||
311 | ** partitions, specifying the sequence such that the boot block | ||
312 | ** is immediately followed by the filesystem block (i.e. the stupid | ||
313 | ** system BIOS block is mapped to a different place). When re-partitioning | ||
314 | ** this concatenated MTD device, we can set the boot block size to | ||
315 | ** an arbitrary (though erase block aligned) value i.e. not one that | ||
316 | ** is dictated by the flash's physical layout. We can thus set the | ||
317 | ** boot block to be e.g. 64 KB (which is fully sufficient if we want | ||
318 | ** to boot an etherboot image) or to -say- 1.5 MB if we want to boot | ||
319 | ** a large kernel image. In all cases, the remainder of the flash | ||
320 | ** is available as file system space. | ||
321 | */ | ||
322 | |||
323 | static struct mtd_partition higlvl_partition_info[]= | ||
324 | { | ||
325 | { | ||
326 | .name = "ADNP boot block", | ||
327 | .offset = 0, | ||
328 | .size = CONFIG_MTD_DILNETPC_BOOTSIZE, | ||
329 | }, | ||
330 | { | ||
331 | .name = "ADNP file system space", | ||
332 | .offset = MTDPART_OFS_NXTBLK, | ||
333 | .size = ADNP_WINDOW_SIZE-CONFIG_MTD_DILNETPC_BOOTSIZE-0x20000, | ||
334 | }, | ||
335 | { | ||
336 | .name = "ADNP system BIOS + BIOS Entry", | ||
337 | .offset = MTDPART_OFS_NXTBLK, | ||
338 | .size = MTDPART_SIZ_FULL, | ||
339 | #ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED | ||
340 | .mask_flags = MTD_WRITEABLE, | ||
341 | #endif | ||
342 | }, | ||
343 | }; | ||
344 | |||
345 | #define NUM_HIGHLVL_PARTITIONS ARRAY_SIZE(higlvl_partition_info) | ||
346 | |||
347 | |||
348 | static int dnp_adnp_probe(void) | ||
349 | { | ||
350 | char *biosid, rc = -1; | ||
351 | |||
352 | biosid = (char*)ioremap(BIOSID_BASE, 16); | ||
353 | if(biosid) | ||
354 | { | ||
355 | if(!strcmp(biosid, ID_DNPC)) | ||
356 | rc = 1; /* this is a DNPC */ | ||
357 | else if(!strcmp(biosid, ID_ADNP)) | ||
358 | rc = 0; /* this is a ADNPC */ | ||
359 | } | ||
360 | iounmap((void *)biosid); | ||
361 | return(rc); | ||
362 | } | ||
363 | |||
364 | |||
365 | static int __init init_dnpc(void) | ||
366 | { | ||
367 | int is_dnp; | ||
368 | |||
369 | /* | ||
370 | ** determine hardware (DNP/ADNP/invalid) | ||
371 | */ | ||
372 | if((is_dnp = dnp_adnp_probe()) < 0) | ||
373 | return -ENXIO; | ||
374 | |||
375 | /* | ||
376 | ** Things are set up for ADNP by default | ||
377 | ** -> modify all that needs to be different for DNP | ||
378 | */ | ||
379 | if(is_dnp) | ||
380 | { /* | ||
381 | ** Adjust window size, select correct set_vpp function. | ||
382 | ** The partitioning scheme is identical on both DNP | ||
383 | ** and ADNP except for the size of the third partition. | ||
384 | */ | ||
385 | int i; | ||
386 | dnpc_map.size = DNP_WINDOW_SIZE; | ||
387 | dnpc_map.set_vpp = dnp_set_vpp; | ||
388 | partition_info[2].size = 0xf0000; | ||
389 | |||
390 | /* | ||
391 | ** increment all string pointers so the leading 'A' gets skipped, | ||
392 | ** thus turning all occurrences of "ADNP ..." into "DNP ..." | ||
393 | */ | ||
394 | ++dnpc_map.name; | ||
395 | for(i = 0; i < NUM_PARTITIONS; i++) | ||
396 | ++partition_info[i].name; | ||
397 | higlvl_partition_info[1].size = DNP_WINDOW_SIZE - | ||
398 | CONFIG_MTD_DILNETPC_BOOTSIZE - 0x20000; | ||
399 | for(i = 0; i < NUM_HIGHLVL_PARTITIONS; i++) | ||
400 | ++higlvl_partition_info[i].name; | ||
401 | } | ||
402 | |||
403 | printk(KERN_NOTICE "DIL/Net %s flash: 0x%lx at 0x%llx\n", | ||
404 | is_dnp ? "DNPC" : "ADNP", dnpc_map.size, (unsigned long long)dnpc_map.phys); | ||
405 | |||
406 | dnpc_map.virt = ioremap_nocache(dnpc_map.phys, dnpc_map.size); | ||
407 | |||
408 | dnpc_map_flash(dnpc_map.phys, dnpc_map.size); | ||
409 | |||
410 | if (!dnpc_map.virt) { | ||
411 | printk("Failed to ioremap_nocache\n"); | ||
412 | return -EIO; | ||
413 | } | ||
414 | simple_map_init(&dnpc_map); | ||
415 | |||
416 | printk("FLASH virtual address: 0x%p\n", dnpc_map.virt); | ||
417 | |||
418 | mymtd = do_map_probe("jedec_probe", &dnpc_map); | ||
419 | |||
420 | if (!mymtd) | ||
421 | mymtd = do_map_probe("cfi_probe", &dnpc_map); | ||
422 | |||
423 | /* | ||
424 | ** If flash probes fail, try to make flashes accessible | ||
425 | ** at least as ROM. Ajust erasesize in this case since | ||
426 | ** the default one (128M) will break our partitioning | ||
427 | */ | ||
428 | if (!mymtd) | ||
429 | if((mymtd = do_map_probe("map_rom", &dnpc_map))) | ||
430 | mymtd->erasesize = 0x10000; | ||
431 | |||
432 | if (!mymtd) { | ||
433 | iounmap(dnpc_map.virt); | ||
434 | return -ENXIO; | ||
435 | } | ||
436 | |||
437 | mymtd->owner = THIS_MODULE; | ||
438 | |||
439 | /* | ||
440 | ** Supply pointers to lowlvl_parts[] array to add_mtd_partitions() | ||
441 | ** -> add_mtd_partitions() will _not_ register MTD devices for | ||
442 | ** the partitions, but will instead store pointers to the MTD | ||
443 | ** objects it creates into our lowlvl_parts[] array. | ||
444 | ** NOTE: we arrange the pointers such that the sequence of the | ||
445 | ** partitions gets re-arranged: partition #2 follows | ||
446 | ** partition #0. | ||
447 | */ | ||
448 | partition_info[0].mtdp = &lowlvl_parts[0]; | ||
449 | partition_info[1].mtdp = &lowlvl_parts[2]; | ||
450 | partition_info[2].mtdp = &lowlvl_parts[1]; | ||
451 | partition_info[3].mtdp = &lowlvl_parts[3]; | ||
452 | |||
453 | mtd_device_register(mymtd, partition_info, NUM_PARTITIONS); | ||
454 | |||
455 | /* | ||
456 | ** now create a virtual MTD device by concatenating the for partitions | ||
457 | ** (in the sequence given by the lowlvl_parts[] array. | ||
458 | */ | ||
459 | merged_mtd = mtd_concat_create(lowlvl_parts, NUM_PARTITIONS, "(A)DNP Flash Concatenated"); | ||
460 | if(merged_mtd) | ||
461 | { /* | ||
462 | ** now partition the new device the way we want it. This time, | ||
463 | ** we do not supply mtd pointers in higlvl_partition_info, so | ||
464 | ** add_mtd_partitions() will register the devices. | ||
465 | */ | ||
466 | mtd_device_register(merged_mtd, higlvl_partition_info, | ||
467 | NUM_HIGHLVL_PARTITIONS); | ||
468 | } | ||
469 | |||
470 | return 0; | ||
471 | } | ||
472 | |||
473 | static void __exit cleanup_dnpc(void) | ||
474 | { | ||
475 | if(merged_mtd) { | ||
476 | mtd_device_unregister(merged_mtd); | ||
477 | mtd_concat_destroy(merged_mtd); | ||
478 | } | ||
479 | |||
480 | if (mymtd) { | ||
481 | mtd_device_unregister(mymtd); | ||
482 | map_destroy(mymtd); | ||
483 | } | ||
484 | if (dnpc_map.virt) { | ||
485 | iounmap(dnpc_map.virt); | ||
486 | dnpc_unmap_flash(); | ||
487 | dnpc_map.virt = NULL; | ||
488 | } | ||
489 | } | ||
490 | |||
491 | module_init(init_dnpc); | ||
492 | module_exit(cleanup_dnpc); | ||
493 | |||
494 | MODULE_LICENSE("GPL"); | ||
495 | MODULE_AUTHOR("Sysgo Real-Time Solutions GmbH"); | ||
496 | MODULE_DESCRIPTION("MTD map driver for SSV DIL/NetPC DNP & ADNP"); | ||
diff --git a/drivers/mtd/maps/dmv182.c b/drivers/mtd/maps/dmv182.c deleted file mode 100644 index 6538ac675e00..000000000000 --- a/drivers/mtd/maps/dmv182.c +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | |||
2 | /* | ||
3 | * drivers/mtd/maps/dmv182.c | ||
4 | * | ||
5 | * Flash map driver for the Dy4 SVME182 board | ||
6 | * | ||
7 | * Copyright 2003-2004, TimeSys Corporation | ||
8 | * | ||
9 | * Based on the SVME181 flash map, by Tom Nelson, Dot4, Inc. for TimeSys Corp. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | */ | ||
16 | |||
17 | #include <linux/module.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <asm/io.h> | ||
22 | #include <linux/mtd/mtd.h> | ||
23 | #include <linux/mtd/map.h> | ||
24 | #include <linux/mtd/partitions.h> | ||
25 | #include <linux/errno.h> | ||
26 | |||
27 | /* | ||
28 | * This driver currently handles only the 16MiB user flash bank 1 on the | ||
29 | * board. It does not provide access to bank 0 (contains the Dy4 FFW), bank 2 | ||
30 | * (VxWorks boot), or the optional 48MiB expansion flash. | ||
31 | * | ||
32 | * scott.wood@timesys.com: On the newer boards with 128MiB flash, it | ||
33 | * now supports the first 96MiB (the boot flash bank containing FFW | ||
34 | * is excluded). The VxWorks loader is in partition 1. | ||
35 | */ | ||
36 | |||
37 | #define FLASH_BASE_ADDR 0xf0000000 | ||
38 | #define FLASH_BANK_SIZE (128*1024*1024) | ||
39 | |||
40 | MODULE_AUTHOR("Scott Wood, TimeSys Corporation <scott.wood@timesys.com>"); | ||
41 | MODULE_DESCRIPTION("User-programmable flash device on the Dy4 SVME182 board"); | ||
42 | MODULE_LICENSE("GPL"); | ||
43 | |||
44 | static struct map_info svme182_map = { | ||
45 | .name = "Dy4 SVME182", | ||
46 | .bankwidth = 32, | ||
47 | .size = 128 * 1024 * 1024 | ||
48 | }; | ||
49 | |||
50 | #define BOOTIMAGE_PART_SIZE ((6*1024*1024)-RESERVED_PART_SIZE) | ||
51 | |||
52 | // Allow 6MiB for the kernel | ||
53 | #define NEW_BOOTIMAGE_PART_SIZE (6 * 1024 * 1024) | ||
54 | // Allow 1MiB for the bootloader | ||
55 | #define NEW_BOOTLOADER_PART_SIZE (1024 * 1024) | ||
56 | // Use the remaining 9MiB at the end of flash for the RFS | ||
57 | #define NEW_RFS_PART_SIZE (0x01000000 - NEW_BOOTLOADER_PART_SIZE - \ | ||
58 | NEW_BOOTIMAGE_PART_SIZE) | ||
59 | |||
60 | static struct mtd_partition svme182_partitions[] = { | ||
61 | // The Lower PABS is only 128KiB, but the partition code doesn't | ||
62 | // like partitions that don't end on the largest erase block | ||
63 | // size of the device, even if all of the erase blocks in the | ||
64 | // partition are small ones. The hardware should prevent | ||
65 | // writes to the actual PABS areas. | ||
66 | { | ||
67 | name: "Lower PABS and CPU 0 bootloader or kernel", | ||
68 | size: 6*1024*1024, | ||
69 | offset: 0, | ||
70 | }, | ||
71 | { | ||
72 | name: "Root Filesystem", | ||
73 | size: 10*1024*1024, | ||
74 | offset: MTDPART_OFS_NXTBLK | ||
75 | }, | ||
76 | { | ||
77 | name: "CPU1 Bootloader", | ||
78 | size: 1024*1024, | ||
79 | offset: MTDPART_OFS_NXTBLK, | ||
80 | }, | ||
81 | { | ||
82 | name: "Extra", | ||
83 | size: 110*1024*1024, | ||
84 | offset: MTDPART_OFS_NXTBLK | ||
85 | }, | ||
86 | { | ||
87 | name: "Foundation Firmware and Upper PABS", | ||
88 | size: 1024*1024, | ||
89 | offset: MTDPART_OFS_NXTBLK, | ||
90 | mask_flags: MTD_WRITEABLE // read-only | ||
91 | } | ||
92 | }; | ||
93 | |||
94 | static struct mtd_info *this_mtd; | ||
95 | |||
96 | static int __init init_svme182(void) | ||
97 | { | ||
98 | struct mtd_partition *partitions; | ||
99 | int num_parts = ARRAY_SIZE(svme182_partitions); | ||
100 | |||
101 | partitions = svme182_partitions; | ||
102 | |||
103 | svme182_map.virt = ioremap(FLASH_BASE_ADDR, svme182_map.size); | ||
104 | |||
105 | if (svme182_map.virt == 0) { | ||
106 | printk("Failed to ioremap FLASH memory area.\n"); | ||
107 | return -EIO; | ||
108 | } | ||
109 | |||
110 | simple_map_init(&svme182_map); | ||
111 | |||
112 | this_mtd = do_map_probe("cfi_probe", &svme182_map); | ||
113 | if (!this_mtd) | ||
114 | { | ||
115 | iounmap((void *)svme182_map.virt); | ||
116 | return -ENXIO; | ||
117 | } | ||
118 | |||
119 | printk(KERN_NOTICE "SVME182 flash device: %dMiB at 0x%08x\n", | ||
120 | this_mtd->size >> 20, FLASH_BASE_ADDR); | ||
121 | |||
122 | this_mtd->owner = THIS_MODULE; | ||
123 | mtd_device_register(this_mtd, partitions, num_parts); | ||
124 | |||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static void __exit cleanup_svme182(void) | ||
129 | { | ||
130 | if (this_mtd) | ||
131 | { | ||
132 | mtd_device_unregister(this_mtd); | ||
133 | map_destroy(this_mtd); | ||
134 | } | ||
135 | |||
136 | if (svme182_map.virt) | ||
137 | { | ||
138 | iounmap((void *)svme182_map.virt); | ||
139 | svme182_map.virt = 0; | ||
140 | } | ||
141 | |||
142 | return; | ||
143 | } | ||
144 | |||
145 | module_init(init_svme182); | ||
146 | module_exit(cleanup_svme182); | ||
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c index 7b643de2500b..5ede28294f9e 100644 --- a/drivers/mtd/maps/gpio-addr-flash.c +++ b/drivers/mtd/maps/gpio-addr-flash.c | |||
@@ -157,7 +157,8 @@ static void gf_copy_to(struct map_info *map, unsigned long to, | |||
157 | memcpy_toio(map->virt + (to % state->win_size), from, len); | 157 | memcpy_toio(map->virt + (to % state->win_size), from, len); |
158 | } | 158 | } |
159 | 159 | ||
160 | static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; | 160 | static const char * const part_probe_types[] = { |
161 | "cmdlinepart", "RedBoot", NULL }; | ||
161 | 162 | ||
162 | /** | 163 | /** |
163 | * gpio_flash_probe() - setup a mapping for a GPIO assisted flash | 164 | * gpio_flash_probe() - setup a mapping for a GPIO assisted flash |
diff --git a/drivers/mtd/maps/h720x-flash.c b/drivers/mtd/maps/h720x-flash.c deleted file mode 100644 index 8ed6cb4529d8..000000000000 --- a/drivers/mtd/maps/h720x-flash.c +++ /dev/null | |||
@@ -1,120 +0,0 @@ | |||
1 | /* | ||
2 | * Flash memory access on Hynix GMS30C7201/HMS30C7202 based | ||
3 | * evaluation boards | ||
4 | * | ||
5 | * (C) 2002 Jungjun Kim <jungjun.kim@hynix.com> | ||
6 | * 2003 Thomas Gleixner <tglx@linutronix.de> | ||
7 | */ | ||
8 | |||
9 | #include <linux/module.h> | ||
10 | #include <linux/types.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/slab.h> | ||
15 | |||
16 | #include <linux/mtd/mtd.h> | ||
17 | #include <linux/mtd/map.h> | ||
18 | #include <linux/mtd/partitions.h> | ||
19 | #include <mach/hardware.h> | ||
20 | #include <asm/io.h> | ||
21 | |||
22 | static struct mtd_info *mymtd; | ||
23 | |||
24 | static struct map_info h720x_map = { | ||
25 | .name = "H720X", | ||
26 | .bankwidth = 4, | ||
27 | .size = H720X_FLASH_SIZE, | ||
28 | .phys = H720X_FLASH_PHYS, | ||
29 | }; | ||
30 | |||
31 | static struct mtd_partition h720x_partitions[] = { | ||
32 | { | ||
33 | .name = "ArMon", | ||
34 | .size = 0x00080000, | ||
35 | .offset = 0, | ||
36 | .mask_flags = MTD_WRITEABLE | ||
37 | },{ | ||
38 | .name = "Env", | ||
39 | .size = 0x00040000, | ||
40 | .offset = 0x00080000, | ||
41 | .mask_flags = MTD_WRITEABLE | ||
42 | },{ | ||
43 | .name = "Kernel", | ||
44 | .size = 0x00180000, | ||
45 | .offset = 0x000c0000, | ||
46 | .mask_flags = MTD_WRITEABLE | ||
47 | },{ | ||
48 | .name = "Ramdisk", | ||
49 | .size = 0x00400000, | ||
50 | .offset = 0x00240000, | ||
51 | .mask_flags = MTD_WRITEABLE | ||
52 | },{ | ||
53 | .name = "jffs2", | ||
54 | .size = MTDPART_SIZ_FULL, | ||
55 | .offset = MTDPART_OFS_APPEND | ||
56 | } | ||
57 | }; | ||
58 | |||
59 | #define NUM_PARTITIONS ARRAY_SIZE(h720x_partitions) | ||
60 | |||
61 | /* | ||
62 | * Initialize FLASH support | ||
63 | */ | ||
64 | static int __init h720x_mtd_init(void) | ||
65 | { | ||
66 | h720x_map.virt = ioremap(h720x_map.phys, h720x_map.size); | ||
67 | |||
68 | if (!h720x_map.virt) { | ||
69 | printk(KERN_ERR "H720x-MTD: ioremap failed\n"); | ||
70 | return -EIO; | ||
71 | } | ||
72 | |||
73 | simple_map_init(&h720x_map); | ||
74 | |||
75 | // Probe for flash bankwidth 4 | ||
76 | printk (KERN_INFO "H720x-MTD probing 32bit FLASH\n"); | ||
77 | mymtd = do_map_probe("cfi_probe", &h720x_map); | ||
78 | if (!mymtd) { | ||
79 | printk (KERN_INFO "H720x-MTD probing 16bit FLASH\n"); | ||
80 | // Probe for bankwidth 2 | ||
81 | h720x_map.bankwidth = 2; | ||
82 | mymtd = do_map_probe("cfi_probe", &h720x_map); | ||
83 | } | ||
84 | |||
85 | if (mymtd) { | ||
86 | mymtd->owner = THIS_MODULE; | ||
87 | |||
88 | mtd_device_parse_register(mymtd, NULL, NULL, | ||
89 | h720x_partitions, NUM_PARTITIONS); | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | iounmap((void *)h720x_map.virt); | ||
94 | return -ENXIO; | ||
95 | } | ||
96 | |||
97 | /* | ||
98 | * Cleanup | ||
99 | */ | ||
100 | static void __exit h720x_mtd_cleanup(void) | ||
101 | { | ||
102 | |||
103 | if (mymtd) { | ||
104 | mtd_device_unregister(mymtd); | ||
105 | map_destroy(mymtd); | ||
106 | } | ||
107 | |||
108 | if (h720x_map.virt) { | ||
109 | iounmap((void *)h720x_map.virt); | ||
110 | h720x_map.virt = 0; | ||
111 | } | ||
112 | } | ||
113 | |||
114 | |||
115 | module_init(h720x_mtd_init); | ||
116 | module_exit(h720x_mtd_cleanup); | ||
117 | |||
118 | MODULE_LICENSE("GPL"); | ||
119 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); | ||
120 | MODULE_DESCRIPTION("MTD map driver for Hynix evaluation boards"); | ||
diff --git a/drivers/mtd/maps/impa7.c b/drivers/mtd/maps/impa7.c index 834a06c56f56..49686744d93c 100644 --- a/drivers/mtd/maps/impa7.c +++ b/drivers/mtd/maps/impa7.c | |||
@@ -24,14 +24,12 @@ | |||
24 | #define NUM_FLASHBANKS 2 | 24 | #define NUM_FLASHBANKS 2 |
25 | #define BUSWIDTH 4 | 25 | #define BUSWIDTH 4 |
26 | 26 | ||
27 | /* can be { "cfi_probe", "jedec_probe", "map_rom", NULL } */ | ||
28 | #define PROBETYPES { "jedec_probe", NULL } | ||
29 | |||
30 | #define MSG_PREFIX "impA7:" /* prefix for our printk()'s */ | 27 | #define MSG_PREFIX "impA7:" /* prefix for our printk()'s */ |
31 | #define MTDID "impa7-%d" /* for mtdparts= partitioning */ | 28 | #define MTDID "impa7-%d" /* for mtdparts= partitioning */ |
32 | 29 | ||
33 | static struct mtd_info *impa7_mtd[NUM_FLASHBANKS]; | 30 | static struct mtd_info *impa7_mtd[NUM_FLASHBANKS]; |
34 | 31 | ||
32 | static const char * const rom_probe_types[] = { "jedec_probe", NULL }; | ||
35 | 33 | ||
36 | static struct map_info impa7_map[NUM_FLASHBANKS] = { | 34 | static struct map_info impa7_map[NUM_FLASHBANKS] = { |
37 | { | 35 | { |
@@ -60,8 +58,7 @@ static struct mtd_partition partitions[] = | |||
60 | 58 | ||
61 | static int __init init_impa7(void) | 59 | static int __init init_impa7(void) |
62 | { | 60 | { |
63 | static const char *rom_probe_types[] = PROBETYPES; | 61 | const char * const *type; |
64 | const char **type; | ||
65 | int i; | 62 | int i; |
66 | static struct { u_long addr; u_long size; } pt[NUM_FLASHBANKS] = { | 63 | static struct { u_long addr; u_long size; } pt[NUM_FLASHBANKS] = { |
67 | { WINDOW_ADDR0, WINDOW_SIZE0 }, | 64 | { WINDOW_ADDR0, WINDOW_SIZE0 }, |
diff --git a/drivers/mtd/maps/intel_vr_nor.c b/drivers/mtd/maps/intel_vr_nor.c index b14053b25026..f581ac1cf022 100644 --- a/drivers/mtd/maps/intel_vr_nor.c +++ b/drivers/mtd/maps/intel_vr_nor.c | |||
@@ -82,9 +82,9 @@ static void vr_nor_destroy_mtd_setup(struct vr_nor_mtd *p) | |||
82 | 82 | ||
83 | static int vr_nor_mtd_setup(struct vr_nor_mtd *p) | 83 | static int vr_nor_mtd_setup(struct vr_nor_mtd *p) |
84 | { | 84 | { |
85 | static const char *probe_types[] = | 85 | static const char * const probe_types[] = |
86 | { "cfi_probe", "jedec_probe", NULL }; | 86 | { "cfi_probe", "jedec_probe", NULL }; |
87 | const char **type; | 87 | const char * const *type; |
88 | 88 | ||
89 | for (type = probe_types; !p->info && *type; type++) | 89 | for (type = probe_types; !p->info && *type; type++) |
90 | p->info = do_map_probe(*type, &p->map); | 90 | p->info = do_map_probe(*type, &p->map); |
diff --git a/drivers/mtd/maps/ixp2000.c b/drivers/mtd/maps/ixp2000.c deleted file mode 100644 index 4a41ced0f710..000000000000 --- a/drivers/mtd/maps/ixp2000.c +++ /dev/null | |||
@@ -1,253 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/mtd/maps/ixp2000.c | ||
3 | * | ||
4 | * Mapping for the Intel XScale IXP2000 based systems | ||
5 | * | ||
6 | * Copyright (C) 2002 Intel Corp. | ||
7 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | ||
8 | * | ||
9 | * Original Author: Naeem M Afzal <naeem.m.afzal@intel.com> | ||
10 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/string.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <linux/ioport.h> | ||
25 | #include <linux/device.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | |||
28 | #include <linux/mtd/mtd.h> | ||
29 | #include <linux/mtd/map.h> | ||
30 | #include <linux/mtd/partitions.h> | ||
31 | |||
32 | #include <asm/io.h> | ||
33 | #include <mach/hardware.h> | ||
34 | #include <asm/mach/flash.h> | ||
35 | |||
36 | #include <linux/reboot.h> | ||
37 | |||
38 | struct ixp2000_flash_info { | ||
39 | struct mtd_info *mtd; | ||
40 | struct map_info map; | ||
41 | struct resource *res; | ||
42 | }; | ||
43 | |||
44 | static inline unsigned long flash_bank_setup(struct map_info *map, unsigned long ofs) | ||
45 | { | ||
46 | unsigned long (*set_bank)(unsigned long) = | ||
47 | (unsigned long(*)(unsigned long))map->map_priv_2; | ||
48 | |||
49 | return (set_bank ? set_bank(ofs) : ofs); | ||
50 | } | ||
51 | |||
52 | #ifdef __ARMEB__ | ||
53 | /* | ||
54 | * Rev A0 and A1 of IXP2400 silicon have a broken addressing unit which | ||
55 | * causes the lower address bits to be XORed with 0x11 on 8 bit accesses | ||
56 | * and XORed with 0x10 on 16 bit accesses. See the spec update, erratum 44. | ||
57 | */ | ||
58 | static int erratum44_workaround = 0; | ||
59 | |||
60 | static inline unsigned long address_fix8_write(unsigned long addr) | ||
61 | { | ||
62 | if (erratum44_workaround) { | ||
63 | return (addr ^ 3); | ||
64 | } | ||
65 | return addr; | ||
66 | } | ||
67 | #else | ||
68 | |||
69 | #define address_fix8_write(x) (x) | ||
70 | #endif | ||
71 | |||
72 | static map_word ixp2000_flash_read8(struct map_info *map, unsigned long ofs) | ||
73 | { | ||
74 | map_word val; | ||
75 | |||
76 | val.x[0] = *((u8 *)(map->map_priv_1 + flash_bank_setup(map, ofs))); | ||
77 | return val; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * We can't use the standard memcpy due to the broken SlowPort | ||
82 | * address translation on rev A0 and A1 silicon and the fact that | ||
83 | * we have banked flash. | ||
84 | */ | ||
85 | static void ixp2000_flash_copy_from(struct map_info *map, void *to, | ||
86 | unsigned long from, ssize_t len) | ||
87 | { | ||
88 | from = flash_bank_setup(map, from); | ||
89 | while(len--) | ||
90 | *(__u8 *) to++ = *(__u8 *)(map->map_priv_1 + from++); | ||
91 | } | ||
92 | |||
93 | static void ixp2000_flash_write8(struct map_info *map, map_word d, unsigned long ofs) | ||
94 | { | ||
95 | *(__u8 *) (address_fix8_write(map->map_priv_1 + | ||
96 | flash_bank_setup(map, ofs))) = d.x[0]; | ||
97 | } | ||
98 | |||
99 | static void ixp2000_flash_copy_to(struct map_info *map, unsigned long to, | ||
100 | const void *from, ssize_t len) | ||
101 | { | ||
102 | to = flash_bank_setup(map, to); | ||
103 | while(len--) { | ||
104 | unsigned long tmp = address_fix8_write(map->map_priv_1 + to++); | ||
105 | *(__u8 *)(tmp) = *(__u8 *)(from++); | ||
106 | } | ||
107 | } | ||
108 | |||
109 | |||
110 | static int ixp2000_flash_remove(struct platform_device *dev) | ||
111 | { | ||
112 | struct flash_platform_data *plat = dev->dev.platform_data; | ||
113 | struct ixp2000_flash_info *info = platform_get_drvdata(dev); | ||
114 | |||
115 | platform_set_drvdata(dev, NULL); | ||
116 | |||
117 | if(!info) | ||
118 | return 0; | ||
119 | |||
120 | if (info->mtd) { | ||
121 | mtd_device_unregister(info->mtd); | ||
122 | map_destroy(info->mtd); | ||
123 | } | ||
124 | if (info->map.map_priv_1) | ||
125 | iounmap((void *) info->map.map_priv_1); | ||
126 | |||
127 | if (info->res) { | ||
128 | release_resource(info->res); | ||
129 | kfree(info->res); | ||
130 | } | ||
131 | |||
132 | if (plat->exit) | ||
133 | plat->exit(); | ||
134 | |||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | |||
139 | static int ixp2000_flash_probe(struct platform_device *dev) | ||
140 | { | ||
141 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | ||
142 | struct ixp2000_flash_data *ixp_data = dev->dev.platform_data; | ||
143 | struct flash_platform_data *plat; | ||
144 | struct ixp2000_flash_info *info; | ||
145 | unsigned long window_size; | ||
146 | int err = -1; | ||
147 | |||
148 | if (!ixp_data) | ||
149 | return -ENODEV; | ||
150 | |||
151 | plat = ixp_data->platform_data; | ||
152 | if (!plat) | ||
153 | return -ENODEV; | ||
154 | |||
155 | window_size = resource_size(dev->resource); | ||
156 | dev_info(&dev->dev, "Probe of IXP2000 flash(%d banks x %dMiB)\n", | ||
157 | ixp_data->nr_banks, ((u32)window_size >> 20)); | ||
158 | |||
159 | if (plat->width != 1) { | ||
160 | dev_err(&dev->dev, "IXP2000 MTD map only supports 8-bit mode, asking for %d\n", | ||
161 | plat->width * 8); | ||
162 | return -EIO; | ||
163 | } | ||
164 | |||
165 | info = kzalloc(sizeof(struct ixp2000_flash_info), GFP_KERNEL); | ||
166 | if(!info) { | ||
167 | err = -ENOMEM; | ||
168 | goto Error; | ||
169 | } | ||
170 | |||
171 | platform_set_drvdata(dev, info); | ||
172 | |||
173 | /* | ||
174 | * Tell the MTD layer we're not 1:1 mapped so that it does | ||
175 | * not attempt to do a direct access on us. | ||
176 | */ | ||
177 | info->map.phys = NO_XIP; | ||
178 | |||
179 | info->map.size = ixp_data->nr_banks * window_size; | ||
180 | info->map.bankwidth = 1; | ||
181 | |||
182 | /* | ||
183 | * map_priv_2 is used to store a ptr to the bank_setup routine | ||
184 | */ | ||
185 | info->map.map_priv_2 = (unsigned long) ixp_data->bank_setup; | ||
186 | |||
187 | info->map.name = dev_name(&dev->dev); | ||
188 | info->map.read = ixp2000_flash_read8; | ||
189 | info->map.write = ixp2000_flash_write8; | ||
190 | info->map.copy_from = ixp2000_flash_copy_from; | ||
191 | info->map.copy_to = ixp2000_flash_copy_to; | ||
192 | |||
193 | info->res = request_mem_region(dev->resource->start, | ||
194 | resource_size(dev->resource), | ||
195 | dev_name(&dev->dev)); | ||
196 | if (!info->res) { | ||
197 | dev_err(&dev->dev, "Could not reserve memory region\n"); | ||
198 | err = -ENOMEM; | ||
199 | goto Error; | ||
200 | } | ||
201 | |||
202 | info->map.map_priv_1 = | ||
203 | (unsigned long)ioremap(dev->resource->start, | ||
204 | resource_size(dev->resource)); | ||
205 | if (!info->map.map_priv_1) { | ||
206 | dev_err(&dev->dev, "Failed to ioremap flash region\n"); | ||
207 | err = -EIO; | ||
208 | goto Error; | ||
209 | } | ||
210 | |||
211 | #if defined(__ARMEB__) | ||
212 | /* | ||
213 | * Enable erratum 44 workaround for NPUs with broken slowport | ||
214 | */ | ||
215 | |||
216 | erratum44_workaround = ixp2000_has_broken_slowport(); | ||
217 | dev_info(&dev->dev, "Erratum 44 workaround %s\n", | ||
218 | erratum44_workaround ? "enabled" : "disabled"); | ||
219 | #endif | ||
220 | |||
221 | info->mtd = do_map_probe(plat->map_name, &info->map); | ||
222 | if (!info->mtd) { | ||
223 | dev_err(&dev->dev, "map_probe failed\n"); | ||
224 | err = -ENXIO; | ||
225 | goto Error; | ||
226 | } | ||
227 | info->mtd->owner = THIS_MODULE; | ||
228 | |||
229 | err = mtd_device_parse_register(info->mtd, probes, NULL, NULL, 0); | ||
230 | if (err) | ||
231 | goto Error; | ||
232 | |||
233 | return 0; | ||
234 | |||
235 | Error: | ||
236 | ixp2000_flash_remove(dev); | ||
237 | return err; | ||
238 | } | ||
239 | |||
240 | static struct platform_driver ixp2000_flash_driver = { | ||
241 | .probe = ixp2000_flash_probe, | ||
242 | .remove = ixp2000_flash_remove, | ||
243 | .driver = { | ||
244 | .name = "IXP2000-Flash", | ||
245 | .owner = THIS_MODULE, | ||
246 | }, | ||
247 | }; | ||
248 | |||
249 | module_platform_driver(ixp2000_flash_driver); | ||
250 | |||
251 | MODULE_LICENSE("GPL"); | ||
252 | MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>"); | ||
253 | MODULE_ALIAS("platform:IXP2000-Flash"); | ||
diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c index e864fc6c58f9..52b3410a105c 100644 --- a/drivers/mtd/maps/ixp4xx.c +++ b/drivers/mtd/maps/ixp4xx.c | |||
@@ -148,7 +148,7 @@ struct ixp4xx_flash_info { | |||
148 | struct resource *res; | 148 | struct resource *res; |
149 | }; | 149 | }; |
150 | 150 | ||
151 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | 151 | static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL }; |
152 | 152 | ||
153 | static int ixp4xx_flash_remove(struct platform_device *dev) | 153 | static int ixp4xx_flash_remove(struct platform_device *dev) |
154 | { | 154 | { |
diff --git a/drivers/mtd/maps/lantiq-flash.c b/drivers/mtd/maps/lantiq-flash.c index d1da6ede3845..d7ac65d1d569 100644 --- a/drivers/mtd/maps/lantiq-flash.c +++ b/drivers/mtd/maps/lantiq-flash.c | |||
@@ -46,8 +46,7 @@ struct ltq_mtd { | |||
46 | }; | 46 | }; |
47 | 47 | ||
48 | static const char ltq_map_name[] = "ltq_nor"; | 48 | static const char ltq_map_name[] = "ltq_nor"; |
49 | static const char *ltq_probe_types[] = { | 49 | static const char * const ltq_probe_types[] = { "cmdlinepart", "ofpart", NULL }; |
50 | "cmdlinepart", "ofpart", NULL }; | ||
51 | 50 | ||
52 | static map_word | 51 | static map_word |
53 | ltq_read16(struct map_info *map, unsigned long adr) | 52 | ltq_read16(struct map_info *map, unsigned long adr) |
diff --git a/drivers/mtd/maps/mbx860.c b/drivers/mtd/maps/mbx860.c deleted file mode 100644 index 93fa56c33003..000000000000 --- a/drivers/mtd/maps/mbx860.c +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* | ||
2 | * Handle mapping of the flash on MBX860 boards | ||
3 | * | ||
4 | * Author: Anton Todorov | ||
5 | * Copyright: (C) 2001 Emness Technology | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <asm/io.h> | ||
18 | #include <linux/mtd/mtd.h> | ||
19 | #include <linux/mtd/map.h> | ||
20 | #include <linux/mtd/partitions.h> | ||
21 | |||
22 | |||
23 | #define WINDOW_ADDR 0xfe000000 | ||
24 | #define WINDOW_SIZE 0x00200000 | ||
25 | |||
26 | /* Flash / Partition sizing */ | ||
27 | #define MAX_SIZE_KiB 8192 | ||
28 | #define BOOT_PARTITION_SIZE_KiB 512 | ||
29 | #define KERNEL_PARTITION_SIZE_KiB 5632 | ||
30 | #define APP_PARTITION_SIZE_KiB 2048 | ||
31 | |||
32 | #define NUM_PARTITIONS 3 | ||
33 | |||
34 | /* partition_info gives details on the logical partitions that the split the | ||
35 | * single flash device into. If the size if zero we use up to the end of the | ||
36 | * device. */ | ||
37 | static struct mtd_partition partition_info[]={ | ||
38 | { .name = "MBX flash BOOT partition", | ||
39 | .offset = 0, | ||
40 | .size = BOOT_PARTITION_SIZE_KiB*1024 }, | ||
41 | { .name = "MBX flash DATA partition", | ||
42 | .offset = BOOT_PARTITION_SIZE_KiB*1024, | ||
43 | .size = (KERNEL_PARTITION_SIZE_KiB)*1024 }, | ||
44 | { .name = "MBX flash APPLICATION partition", | ||
45 | .offset = (BOOT_PARTITION_SIZE_KiB+KERNEL_PARTITION_SIZE_KiB)*1024 } | ||
46 | }; | ||
47 | |||
48 | |||
49 | static struct mtd_info *mymtd; | ||
50 | |||
51 | struct map_info mbx_map = { | ||
52 | .name = "MBX flash", | ||
53 | .size = WINDOW_SIZE, | ||
54 | .phys = WINDOW_ADDR, | ||
55 | .bankwidth = 4, | ||
56 | }; | ||
57 | |||
58 | static int __init init_mbx(void) | ||
59 | { | ||
60 | printk(KERN_NOTICE "Motorola MBX flash device: 0x%x at 0x%x\n", WINDOW_SIZE*4, WINDOW_ADDR); | ||
61 | mbx_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE * 4); | ||
62 | |||
63 | if (!mbx_map.virt) { | ||
64 | printk("Failed to ioremap\n"); | ||
65 | return -EIO; | ||
66 | } | ||
67 | simple_map_init(&mbx_map); | ||
68 | |||
69 | mymtd = do_map_probe("jedec_probe", &mbx_map); | ||
70 | if (mymtd) { | ||
71 | mymtd->owner = THIS_MODULE; | ||
72 | mtd_device_register(mymtd, NULL, 0); | ||
73 | mtd_device_register(mymtd, partition_info, NUM_PARTITIONS); | ||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | iounmap((void *)mbx_map.virt); | ||
78 | return -ENXIO; | ||
79 | } | ||
80 | |||
81 | static void __exit cleanup_mbx(void) | ||
82 | { | ||
83 | if (mymtd) { | ||
84 | mtd_device_unregister(mymtd); | ||
85 | map_destroy(mymtd); | ||
86 | } | ||
87 | if (mbx_map.virt) { | ||
88 | iounmap((void *)mbx_map.virt); | ||
89 | mbx_map.virt = 0; | ||
90 | } | ||
91 | } | ||
92 | |||
93 | module_init(init_mbx); | ||
94 | module_exit(cleanup_mbx); | ||
95 | |||
96 | MODULE_AUTHOR("Anton Todorov <a.todorov@emness.com>"); | ||
97 | MODULE_DESCRIPTION("MTD map driver for Motorola MBX860 board"); | ||
98 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/mtd/maps/pci.c b/drivers/mtd/maps/pci.c index c3aebd5da5d6..c2604f8b2a5e 100644 --- a/drivers/mtd/maps/pci.c +++ b/drivers/mtd/maps/pci.c | |||
@@ -283,8 +283,7 @@ static int mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
283 | if (err) | 283 | if (err) |
284 | goto release; | 284 | goto release; |
285 | 285 | ||
286 | /* tsk - do_map_probe should take const char * */ | 286 | mtd = do_map_probe(info->map_name, &map->map); |
287 | mtd = do_map_probe((char *)info->map_name, &map->map); | ||
288 | err = -ENODEV; | 287 | err = -ENODEV; |
289 | if (!mtd) | 288 | if (!mtd) |
290 | goto release; | 289 | goto release; |
diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c index 21b0b713cacb..e7a592c8c765 100644 --- a/drivers/mtd/maps/physmap.c +++ b/drivers/mtd/maps/physmap.c | |||
@@ -87,21 +87,18 @@ static void physmap_set_vpp(struct map_info *map, int state) | |||
87 | spin_unlock_irqrestore(&info->vpp_lock, flags); | 87 | spin_unlock_irqrestore(&info->vpp_lock, flags); |
88 | } | 88 | } |
89 | 89 | ||
90 | static const char *rom_probe_types[] = { | 90 | static const char * const rom_probe_types[] = { |
91 | "cfi_probe", | 91 | "cfi_probe", "jedec_probe", "qinfo_probe", "map_rom", NULL }; |
92 | "jedec_probe", | 92 | |
93 | "qinfo_probe", | 93 | static const char * const part_probe_types[] = { |
94 | "map_rom", | 94 | "cmdlinepart", "RedBoot", "afs", NULL }; |
95 | NULL }; | ||
96 | static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "afs", | ||
97 | NULL }; | ||
98 | 95 | ||
99 | static int physmap_flash_probe(struct platform_device *dev) | 96 | static int physmap_flash_probe(struct platform_device *dev) |
100 | { | 97 | { |
101 | struct physmap_flash_data *physmap_data; | 98 | struct physmap_flash_data *physmap_data; |
102 | struct physmap_flash_info *info; | 99 | struct physmap_flash_info *info; |
103 | const char **probe_type; | 100 | const char * const *probe_type; |
104 | const char **part_types; | 101 | const char * const *part_types; |
105 | int err = 0; | 102 | int err = 0; |
106 | int i; | 103 | int i; |
107 | int devices_found = 0; | 104 | int devices_found = 0; |
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c index 363939dfad05..d11109762ac5 100644 --- a/drivers/mtd/maps/physmap_of.c +++ b/drivers/mtd/maps/physmap_of.c | |||
@@ -71,6 +71,9 @@ static int of_flash_remove(struct platform_device *dev) | |||
71 | return 0; | 71 | return 0; |
72 | } | 72 | } |
73 | 73 | ||
74 | static const char * const rom_probe_types[] = { | ||
75 | "cfi_probe", "jedec_probe", "map_rom" }; | ||
76 | |||
74 | /* Helper function to handle probing of the obsolete "direct-mapped" | 77 | /* Helper function to handle probing of the obsolete "direct-mapped" |
75 | * compatible binding, which has an extra "probe-type" property | 78 | * compatible binding, which has an extra "probe-type" property |
76 | * describing the type of flash probe necessary. */ | 79 | * describing the type of flash probe necessary. */ |
@@ -80,8 +83,6 @@ static struct mtd_info *obsolete_probe(struct platform_device *dev, | |||
80 | struct device_node *dp = dev->dev.of_node; | 83 | struct device_node *dp = dev->dev.of_node; |
81 | const char *of_probe; | 84 | const char *of_probe; |
82 | struct mtd_info *mtd; | 85 | struct mtd_info *mtd; |
83 | static const char *rom_probe_types[] | ||
84 | = { "cfi_probe", "jedec_probe", "map_rom"}; | ||
85 | int i; | 86 | int i; |
86 | 87 | ||
87 | dev_warn(&dev->dev, "Device tree uses obsolete \"direct-mapped\" " | 88 | dev_warn(&dev->dev, "Device tree uses obsolete \"direct-mapped\" " |
@@ -111,9 +112,10 @@ static struct mtd_info *obsolete_probe(struct platform_device *dev, | |||
111 | specifies the list of partition probers to use. If none is given then the | 112 | specifies the list of partition probers to use. If none is given then the |
112 | default is use. These take precedence over other device tree | 113 | default is use. These take precedence over other device tree |
113 | information. */ | 114 | information. */ |
114 | static const char *part_probe_types_def[] = { "cmdlinepart", "RedBoot", | 115 | static const char * const part_probe_types_def[] = { |
115 | "ofpart", "ofoldpart", NULL }; | 116 | "cmdlinepart", "RedBoot", "ofpart", "ofoldpart", NULL }; |
116 | static const char **of_get_probes(struct device_node *dp) | 117 | |
118 | static const char * const *of_get_probes(struct device_node *dp) | ||
117 | { | 119 | { |
118 | const char *cp; | 120 | const char *cp; |
119 | int cplen; | 121 | int cplen; |
@@ -142,7 +144,7 @@ static const char **of_get_probes(struct device_node *dp) | |||
142 | return res; | 144 | return res; |
143 | } | 145 | } |
144 | 146 | ||
145 | static void of_free_probes(const char **probes) | 147 | static void of_free_probes(const char * const *probes) |
146 | { | 148 | { |
147 | if (probes != part_probe_types_def) | 149 | if (probes != part_probe_types_def) |
148 | kfree(probes); | 150 | kfree(probes); |
@@ -151,7 +153,7 @@ static void of_free_probes(const char **probes) | |||
151 | static struct of_device_id of_flash_match[]; | 153 | static struct of_device_id of_flash_match[]; |
152 | static int of_flash_probe(struct platform_device *dev) | 154 | static int of_flash_probe(struct platform_device *dev) |
153 | { | 155 | { |
154 | const char **part_probe_types; | 156 | const char * const *part_probe_types; |
155 | const struct of_device_id *match; | 157 | const struct of_device_id *match; |
156 | struct device_node *dp = dev->dev.of_node; | 158 | struct device_node *dp = dev->dev.of_node; |
157 | struct resource res; | 159 | struct resource res; |
diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c index 2de66b062f0d..71fdda29594b 100644 --- a/drivers/mtd/maps/plat-ram.c +++ b/drivers/mtd/maps/plat-ram.c | |||
@@ -199,7 +199,7 @@ static int platram_probe(struct platform_device *pdev) | |||
199 | * supplied by the platform_data struct */ | 199 | * supplied by the platform_data struct */ |
200 | 200 | ||
201 | if (pdata->map_probes) { | 201 | if (pdata->map_probes) { |
202 | const char **map_probes = pdata->map_probes; | 202 | const char * const *map_probes = pdata->map_probes; |
203 | 203 | ||
204 | for ( ; !info->mtd && *map_probes; map_probes++) | 204 | for ( ; !info->mtd && *map_probes; map_probes++) |
205 | info->mtd = do_map_probe(*map_probes , &info->map); | 205 | info->mtd = do_map_probe(*map_probes , &info->map); |
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index 43e3dbb976d9..acb1dbcf7ce5 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c | |||
@@ -45,9 +45,7 @@ struct pxa2xx_flash_info { | |||
45 | struct map_info map; | 45 | struct map_info map; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | 48 | static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL }; | |
49 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | ||
50 | |||
51 | 49 | ||
52 | static int pxa2xx_flash_probe(struct platform_device *pdev) | 50 | static int pxa2xx_flash_probe(struct platform_device *pdev) |
53 | { | 51 | { |
diff --git a/drivers/mtd/maps/rbtx4939-flash.c b/drivers/mtd/maps/rbtx4939-flash.c index 49c3fe715eee..ac02fbffd6df 100644 --- a/drivers/mtd/maps/rbtx4939-flash.c +++ b/drivers/mtd/maps/rbtx4939-flash.c | |||
@@ -45,14 +45,15 @@ static int rbtx4939_flash_remove(struct platform_device *dev) | |||
45 | return 0; | 45 | return 0; |
46 | } | 46 | } |
47 | 47 | ||
48 | static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; | 48 | static const char * const rom_probe_types[] = { |
49 | "cfi_probe", "jedec_probe", NULL }; | ||
49 | 50 | ||
50 | static int rbtx4939_flash_probe(struct platform_device *dev) | 51 | static int rbtx4939_flash_probe(struct platform_device *dev) |
51 | { | 52 | { |
52 | struct rbtx4939_flash_data *pdata; | 53 | struct rbtx4939_flash_data *pdata; |
53 | struct rbtx4939_flash_info *info; | 54 | struct rbtx4939_flash_info *info; |
54 | struct resource *res; | 55 | struct resource *res; |
55 | const char **probe_type; | 56 | const char * const *probe_type; |
56 | int err = 0; | 57 | int err = 0; |
57 | unsigned long size; | 58 | unsigned long size; |
58 | 59 | ||
diff --git a/drivers/mtd/maps/rpxlite.c b/drivers/mtd/maps/rpxlite.c deleted file mode 100644 index ed88225bf667..000000000000 --- a/drivers/mtd/maps/rpxlite.c +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * Handle mapping of the flash on the RPX Lite and CLLF boards | ||
3 | */ | ||
4 | |||
5 | #include <linux/module.h> | ||
6 | #include <linux/types.h> | ||
7 | #include <linux/kernel.h> | ||
8 | #include <linux/init.h> | ||
9 | #include <asm/io.h> | ||
10 | #include <linux/mtd/mtd.h> | ||
11 | #include <linux/mtd/map.h> | ||
12 | |||
13 | |||
14 | #define WINDOW_ADDR 0xfe000000 | ||
15 | #define WINDOW_SIZE 0x800000 | ||
16 | |||
17 | static struct mtd_info *mymtd; | ||
18 | |||
19 | static struct map_info rpxlite_map = { | ||
20 | .name = "RPX", | ||
21 | .size = WINDOW_SIZE, | ||
22 | .bankwidth = 4, | ||
23 | .phys = WINDOW_ADDR, | ||
24 | }; | ||
25 | |||
26 | static int __init init_rpxlite(void) | ||
27 | { | ||
28 | printk(KERN_NOTICE "RPX Lite or CLLF flash device: %x at %x\n", WINDOW_SIZE*4, WINDOW_ADDR); | ||
29 | rpxlite_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE * 4); | ||
30 | |||
31 | if (!rpxlite_map.virt) { | ||
32 | printk("Failed to ioremap\n"); | ||
33 | return -EIO; | ||
34 | } | ||
35 | simple_map_init(&rpxlite_map); | ||
36 | mymtd = do_map_probe("cfi_probe", &rpxlite_map); | ||
37 | if (mymtd) { | ||
38 | mymtd->owner = THIS_MODULE; | ||
39 | mtd_device_register(mymtd, NULL, 0); | ||
40 | return 0; | ||
41 | } | ||
42 | |||
43 | iounmap((void *)rpxlite_map.virt); | ||
44 | return -ENXIO; | ||
45 | } | ||
46 | |||
47 | static void __exit cleanup_rpxlite(void) | ||
48 | { | ||
49 | if (mymtd) { | ||
50 | mtd_device_unregister(mymtd); | ||
51 | map_destroy(mymtd); | ||
52 | } | ||
53 | if (rpxlite_map.virt) { | ||
54 | iounmap((void *)rpxlite_map.virt); | ||
55 | rpxlite_map.virt = 0; | ||
56 | } | ||
57 | } | ||
58 | |||
59 | module_init(init_rpxlite); | ||
60 | module_exit(cleanup_rpxlite); | ||
61 | |||
62 | MODULE_LICENSE("GPL"); | ||
63 | MODULE_AUTHOR("Arnold Christensen <AKC@pel.dk>"); | ||
64 | MODULE_DESCRIPTION("MTD map driver for RPX Lite and CLLF boards"); | ||
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c index f694417cf7e6..29e3dcaa1d90 100644 --- a/drivers/mtd/maps/sa1100-flash.c +++ b/drivers/mtd/maps/sa1100-flash.c | |||
@@ -244,7 +244,7 @@ static struct sa_info *sa1100_setup_mtd(struct platform_device *pdev, | |||
244 | return ERR_PTR(ret); | 244 | return ERR_PTR(ret); |
245 | } | 245 | } |
246 | 246 | ||
247 | static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; | 247 | static const char * const part_probes[] = { "cmdlinepart", "RedBoot", NULL }; |
248 | 248 | ||
249 | static int sa1100_mtd_probe(struct platform_device *pdev) | 249 | static int sa1100_mtd_probe(struct platform_device *pdev) |
250 | { | 250 | { |
diff --git a/drivers/mtd/maps/solutionengine.c b/drivers/mtd/maps/solutionengine.c index 9d900ada6708..83a7a7091562 100644 --- a/drivers/mtd/maps/solutionengine.c +++ b/drivers/mtd/maps/solutionengine.c | |||
@@ -31,7 +31,7 @@ struct map_info soleng_flash_map = { | |||
31 | .bankwidth = 4, | 31 | .bankwidth = 4, |
32 | }; | 32 | }; |
33 | 33 | ||
34 | static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; | 34 | static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL }; |
35 | 35 | ||
36 | #ifdef CONFIG_MTD_SUPERH_RESERVE | 36 | #ifdef CONFIG_MTD_SUPERH_RESERVE |
37 | static struct mtd_partition superh_se_partitions[] = { | 37 | static struct mtd_partition superh_se_partitions[] = { |
diff --git a/drivers/mtd/maps/tqm8xxl.c b/drivers/mtd/maps/tqm8xxl.c deleted file mode 100644 index d78587990e7e..000000000000 --- a/drivers/mtd/maps/tqm8xxl.c +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | /* | ||
2 | * Handle mapping of the flash memory access routines | ||
3 | * on TQM8xxL based devices. | ||
4 | * | ||
5 | * based on rpxlite.c | ||
6 | * | ||
7 | * Copyright(C) 2001 Kirk Lee <kirk@hpc.ee.ntu.edu.tw> | ||
8 | * | ||
9 | * This code is GPLed | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | /* | ||
14 | * According to TQM8xxL hardware manual, TQM8xxL series have | ||
15 | * following flash memory organisations: | ||
16 | * | capacity | | chip type | | bank0 | | bank1 | | ||
17 | * 2MiB 512Kx16 2MiB 0 | ||
18 | * 4MiB 1Mx16 4MiB 0 | ||
19 | * 8MiB 1Mx16 4MiB 4MiB | ||
20 | * Thus, we choose CONFIG_MTD_CFI_I2 & CONFIG_MTD_CFI_B4 at | ||
21 | * kernel configuration. | ||
22 | */ | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/types.h> | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/slab.h> | ||
28 | |||
29 | #include <linux/mtd/mtd.h> | ||
30 | #include <linux/mtd/map.h> | ||
31 | #include <linux/mtd/partitions.h> | ||
32 | |||
33 | #include <asm/io.h> | ||
34 | |||
35 | #define FLASH_ADDR 0x40000000 | ||
36 | #define FLASH_SIZE 0x00800000 | ||
37 | #define FLASH_BANK_MAX 4 | ||
38 | |||
39 | // trivial struct to describe partition information | ||
40 | struct mtd_part_def | ||
41 | { | ||
42 | int nums; | ||
43 | unsigned char *type; | ||
44 | struct mtd_partition* mtd_part; | ||
45 | }; | ||
46 | |||
47 | //static struct mtd_info *mymtd; | ||
48 | static struct mtd_info* mtd_banks[FLASH_BANK_MAX]; | ||
49 | static struct map_info* map_banks[FLASH_BANK_MAX]; | ||
50 | static struct mtd_part_def part_banks[FLASH_BANK_MAX]; | ||
51 | static unsigned long num_banks; | ||
52 | static void __iomem *start_scan_addr; | ||
53 | |||
54 | /* | ||
55 | * Here are partition information for all known TQM8xxL series devices. | ||
56 | * See include/linux/mtd/partitions.h for definition of the mtd_partition | ||
57 | * structure. | ||
58 | * | ||
59 | * The *_max_flash_size is the maximum possible mapped flash size which | ||
60 | * is not necessarily the actual flash size. It must correspond to the | ||
61 | * value specified in the mapping definition defined by the | ||
62 | * "struct map_desc *_io_desc" for the corresponding machine. | ||
63 | */ | ||
64 | |||
65 | /* Currently, TQM8xxL has up to 8MiB flash */ | ||
66 | static unsigned long tqm8xxl_max_flash_size = 0x00800000; | ||
67 | |||
68 | /* partition definition for first flash bank | ||
69 | * (cf. "drivers/char/flash_config.c") | ||
70 | */ | ||
71 | static struct mtd_partition tqm8xxl_partitions[] = { | ||
72 | { | ||
73 | .name = "ppcboot", | ||
74 | .offset = 0x00000000, | ||
75 | .size = 0x00020000, /* 128KB */ | ||
76 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
77 | }, | ||
78 | { | ||
79 | .name = "kernel", /* default kernel image */ | ||
80 | .offset = 0x00020000, | ||
81 | .size = 0x000e0000, | ||
82 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
83 | }, | ||
84 | { | ||
85 | .name = "user", | ||
86 | .offset = 0x00100000, | ||
87 | .size = 0x00100000, | ||
88 | }, | ||
89 | { | ||
90 | .name = "initrd", | ||
91 | .offset = 0x00200000, | ||
92 | .size = 0x00200000, | ||
93 | } | ||
94 | }; | ||
95 | /* partition definition for second flash bank */ | ||
96 | static struct mtd_partition tqm8xxl_fs_partitions[] = { | ||
97 | { | ||
98 | .name = "cramfs", | ||
99 | .offset = 0x00000000, | ||
100 | .size = 0x00200000, | ||
101 | }, | ||
102 | { | ||
103 | .name = "jffs", | ||
104 | .offset = 0x00200000, | ||
105 | .size = 0x00200000, | ||
106 | //.size = MTDPART_SIZ_FULL, | ||
107 | } | ||
108 | }; | ||
109 | |||
110 | static int __init init_tqm_mtd(void) | ||
111 | { | ||
112 | int idx = 0, ret = 0; | ||
113 | unsigned long flash_addr, flash_size, mtd_size = 0; | ||
114 | /* pointer to TQM8xxL board info data */ | ||
115 | bd_t *bd = (bd_t *)__res; | ||
116 | |||
117 | flash_addr = bd->bi_flashstart; | ||
118 | flash_size = bd->bi_flashsize; | ||
119 | |||
120 | //request maximum flash size address space | ||
121 | start_scan_addr = ioremap(flash_addr, flash_size); | ||
122 | if (!start_scan_addr) { | ||
123 | printk(KERN_WARNING "%s:Failed to ioremap address:0x%x\n", __func__, flash_addr); | ||
124 | return -EIO; | ||
125 | } | ||
126 | |||
127 | for (idx = 0 ; idx < FLASH_BANK_MAX ; idx++) { | ||
128 | if(mtd_size >= flash_size) | ||
129 | break; | ||
130 | |||
131 | printk(KERN_INFO "%s: chip probing count %d\n", __func__, idx); | ||
132 | |||
133 | map_banks[idx] = kzalloc(sizeof(struct map_info), GFP_KERNEL); | ||
134 | if(map_banks[idx] == NULL) { | ||
135 | ret = -ENOMEM; | ||
136 | /* FIXME: What if some MTD devices were probed already? */ | ||
137 | goto error_mem; | ||
138 | } | ||
139 | |||
140 | map_banks[idx]->name = kmalloc(16, GFP_KERNEL); | ||
141 | |||
142 | if (!map_banks[idx]->name) { | ||
143 | ret = -ENOMEM; | ||
144 | /* FIXME: What if some MTD devices were probed already? */ | ||
145 | goto error_mem; | ||
146 | } | ||
147 | sprintf(map_banks[idx]->name, "TQM8xxL%d", idx); | ||
148 | |||
149 | map_banks[idx]->size = flash_size; | ||
150 | map_banks[idx]->bankwidth = 4; | ||
151 | |||
152 | simple_map_init(map_banks[idx]); | ||
153 | |||
154 | map_banks[idx]->virt = start_scan_addr; | ||
155 | map_banks[idx]->phys = flash_addr; | ||
156 | /* FIXME: This looks utterly bogus, but I'm trying to | ||
157 | preserve the behaviour of the original (shown here)... | ||
158 | |||
159 | map_banks[idx]->map_priv_1 = | ||
160 | start_scan_addr + ((idx > 0) ? | ||
161 | (mtd_banks[idx-1] ? mtd_banks[idx-1]->size : 0) : 0); | ||
162 | */ | ||
163 | |||
164 | if (idx && mtd_banks[idx-1]) { | ||
165 | map_banks[idx]->virt += mtd_banks[idx-1]->size; | ||
166 | map_banks[idx]->phys += mtd_banks[idx-1]->size; | ||
167 | } | ||
168 | |||
169 | //start to probe flash chips | ||
170 | mtd_banks[idx] = do_map_probe("cfi_probe", map_banks[idx]); | ||
171 | |||
172 | if (mtd_banks[idx]) { | ||
173 | mtd_banks[idx]->owner = THIS_MODULE; | ||
174 | mtd_size += mtd_banks[idx]->size; | ||
175 | num_banks++; | ||
176 | |||
177 | printk(KERN_INFO "%s: bank%d, name:%s, size:%dbytes \n", __func__, num_banks, | ||
178 | mtd_banks[idx]->name, mtd_banks[idx]->size); | ||
179 | } | ||
180 | } | ||
181 | |||
182 | /* no supported flash chips found */ | ||
183 | if (!num_banks) { | ||
184 | printk(KERN_NOTICE "TQM8xxL: No support flash chips found!\n"); | ||
185 | ret = -ENXIO; | ||
186 | goto error_mem; | ||
187 | } | ||
188 | |||
189 | /* | ||
190 | * Select Static partition definitions | ||
191 | */ | ||
192 | part_banks[0].mtd_part = tqm8xxl_partitions; | ||
193 | part_banks[0].type = "Static image"; | ||
194 | part_banks[0].nums = ARRAY_SIZE(tqm8xxl_partitions); | ||
195 | |||
196 | part_banks[1].mtd_part = tqm8xxl_fs_partitions; | ||
197 | part_banks[1].type = "Static file system"; | ||
198 | part_banks[1].nums = ARRAY_SIZE(tqm8xxl_fs_partitions); | ||
199 | |||
200 | for(idx = 0; idx < num_banks ; idx++) { | ||
201 | if (part_banks[idx].nums == 0) | ||
202 | printk(KERN_NOTICE "TQM flash%d: no partition info available, registering whole flash at once\n", idx); | ||
203 | else | ||
204 | printk(KERN_NOTICE "TQM flash%d: Using %s partition definition\n", | ||
205 | idx, part_banks[idx].type); | ||
206 | mtd_device_register(mtd_banks[idx], part_banks[idx].mtd_part, | ||
207 | part_banks[idx].nums); | ||
208 | } | ||
209 | return 0; | ||
210 | error_mem: | ||
211 | for(idx = 0 ; idx < FLASH_BANK_MAX ; idx++) { | ||
212 | if(map_banks[idx] != NULL) { | ||
213 | kfree(map_banks[idx]->name); | ||
214 | map_banks[idx]->name = NULL; | ||
215 | kfree(map_banks[idx]); | ||
216 | map_banks[idx] = NULL; | ||
217 | } | ||
218 | } | ||
219 | error: | ||
220 | iounmap(start_scan_addr); | ||
221 | return ret; | ||
222 | } | ||
223 | |||
224 | static void __exit cleanup_tqm_mtd(void) | ||
225 | { | ||
226 | unsigned int idx = 0; | ||
227 | for(idx = 0 ; idx < num_banks ; idx++) { | ||
228 | /* destroy mtd_info previously allocated */ | ||
229 | if (mtd_banks[idx]) { | ||
230 | mtd_device_unregister(mtd_banks[idx]); | ||
231 | map_destroy(mtd_banks[idx]); | ||
232 | } | ||
233 | /* release map_info not used anymore */ | ||
234 | kfree(map_banks[idx]->name); | ||
235 | kfree(map_banks[idx]); | ||
236 | } | ||
237 | |||
238 | if (start_scan_addr) { | ||
239 | iounmap(start_scan_addr); | ||
240 | start_scan_addr = 0; | ||
241 | } | ||
242 | } | ||
243 | |||
244 | module_init(init_tqm_mtd); | ||
245 | module_exit(cleanup_tqm_mtd); | ||
246 | |||
247 | MODULE_LICENSE("GPL"); | ||
248 | MODULE_AUTHOR("Kirk Lee <kirk@hpc.ee.ntu.edu.tw>"); | ||
249 | MODULE_DESCRIPTION("MTD map driver for TQM8xxL boards"); | ||
diff --git a/drivers/mtd/maps/tsunami_flash.c b/drivers/mtd/maps/tsunami_flash.c index 1de390e1c2fb..da2cdb5fd6db 100644 --- a/drivers/mtd/maps/tsunami_flash.c +++ b/drivers/mtd/maps/tsunami_flash.c | |||
@@ -82,11 +82,12 @@ static void __exit cleanup_tsunami_flash(void) | |||
82 | tsunami_flash_mtd = 0; | 82 | tsunami_flash_mtd = 0; |
83 | } | 83 | } |
84 | 84 | ||
85 | static const char * const rom_probe_types[] = { | ||
86 | "cfi_probe", "jedec_probe", "map_rom", NULL }; | ||
85 | 87 | ||
86 | static int __init init_tsunami_flash(void) | 88 | static int __init init_tsunami_flash(void) |
87 | { | 89 | { |
88 | static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL }; | 90 | const char * const *type; |
89 | char **type; | ||
90 | 91 | ||
91 | tsunami_tig_writeb(FLASH_ENABLE_BYTE, FLASH_ENABLE_PORT); | 92 | tsunami_tig_writeb(FLASH_ENABLE_BYTE, FLASH_ENABLE_PORT); |
92 | 93 | ||
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index dc571ebc1aa0..c719879284bd 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c | |||
@@ -38,6 +38,8 @@ | |||
38 | 38 | ||
39 | #include <asm/uaccess.h> | 39 | #include <asm/uaccess.h> |
40 | 40 | ||
41 | #include "mtdcore.h" | ||
42 | |||
41 | static DEFINE_MUTEX(mtd_mutex); | 43 | static DEFINE_MUTEX(mtd_mutex); |
42 | 44 | ||
43 | /* | 45 | /* |
@@ -365,37 +367,35 @@ static void mtdchar_erase_callback (struct erase_info *instr) | |||
365 | wake_up((wait_queue_head_t *)instr->priv); | 367 | wake_up((wait_queue_head_t *)instr->priv); |
366 | } | 368 | } |
367 | 369 | ||
368 | #ifdef CONFIG_HAVE_MTD_OTP | ||
369 | static int otp_select_filemode(struct mtd_file_info *mfi, int mode) | 370 | static int otp_select_filemode(struct mtd_file_info *mfi, int mode) |
370 | { | 371 | { |
371 | struct mtd_info *mtd = mfi->mtd; | 372 | struct mtd_info *mtd = mfi->mtd; |
372 | size_t retlen; | 373 | size_t retlen; |
373 | int ret = 0; | ||
374 | |||
375 | /* | ||
376 | * Make a fake call to mtd_read_fact_prot_reg() to check if OTP | ||
377 | * operations are supported. | ||
378 | */ | ||
379 | if (mtd_read_fact_prot_reg(mtd, -1, 0, &retlen, NULL) == -EOPNOTSUPP) | ||
380 | return -EOPNOTSUPP; | ||
381 | 374 | ||
382 | switch (mode) { | 375 | switch (mode) { |
383 | case MTD_OTP_FACTORY: | 376 | case MTD_OTP_FACTORY: |
377 | if (mtd_read_fact_prot_reg(mtd, -1, 0, &retlen, NULL) == | ||
378 | -EOPNOTSUPP) | ||
379 | return -EOPNOTSUPP; | ||
380 | |||
384 | mfi->mode = MTD_FILE_MODE_OTP_FACTORY; | 381 | mfi->mode = MTD_FILE_MODE_OTP_FACTORY; |
385 | break; | 382 | break; |
386 | case MTD_OTP_USER: | 383 | case MTD_OTP_USER: |
384 | if (mtd_read_user_prot_reg(mtd, -1, 0, &retlen, NULL) == | ||
385 | -EOPNOTSUPP) | ||
386 | return -EOPNOTSUPP; | ||
387 | |||
387 | mfi->mode = MTD_FILE_MODE_OTP_USER; | 388 | mfi->mode = MTD_FILE_MODE_OTP_USER; |
388 | break; | 389 | break; |
389 | default: | ||
390 | ret = -EINVAL; | ||
391 | case MTD_OTP_OFF: | 390 | case MTD_OTP_OFF: |
391 | mfi->mode = MTD_FILE_MODE_NORMAL; | ||
392 | break; | 392 | break; |
393 | default: | ||
394 | return -EINVAL; | ||
393 | } | 395 | } |
394 | return ret; | 396 | |
397 | return 0; | ||
395 | } | 398 | } |
396 | #else | ||
397 | # define otp_select_filemode(f,m) -EOPNOTSUPP | ||
398 | #endif | ||
399 | 399 | ||
400 | static int mtdchar_writeoob(struct file *file, struct mtd_info *mtd, | 400 | static int mtdchar_writeoob(struct file *file, struct mtd_info *mtd, |
401 | uint64_t start, uint32_t length, void __user *ptr, | 401 | uint64_t start, uint32_t length, void __user *ptr, |
@@ -888,7 +888,6 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, u_long arg) | |||
888 | break; | 888 | break; |
889 | } | 889 | } |
890 | 890 | ||
891 | #ifdef CONFIG_HAVE_MTD_OTP | ||
892 | case OTPSELECT: | 891 | case OTPSELECT: |
893 | { | 892 | { |
894 | int mode; | 893 | int mode; |
@@ -944,7 +943,6 @@ static int mtdchar_ioctl(struct file *file, u_int cmd, u_long arg) | |||
944 | ret = mtd_lock_user_prot_reg(mtd, oinfo.start, oinfo.length); | 943 | ret = mtd_lock_user_prot_reg(mtd, oinfo.start, oinfo.length); |
945 | break; | 944 | break; |
946 | } | 945 | } |
947 | #endif | ||
948 | 946 | ||
949 | /* This ioctl is being deprecated - it truncates the ECC layout */ | 947 | /* This ioctl is being deprecated - it truncates the ECC layout */ |
950 | case ECCGETLAYOUT: | 948 | case ECCGETLAYOUT: |
@@ -1185,23 +1183,25 @@ static struct file_system_type mtd_inodefs_type = { | |||
1185 | }; | 1183 | }; |
1186 | MODULE_ALIAS_FS("mtd_inodefs"); | 1184 | MODULE_ALIAS_FS("mtd_inodefs"); |
1187 | 1185 | ||
1188 | static int __init init_mtdchar(void) | 1186 | int __init init_mtdchar(void) |
1189 | { | 1187 | { |
1190 | int ret; | 1188 | int ret; |
1191 | 1189 | ||
1192 | ret = __register_chrdev(MTD_CHAR_MAJOR, 0, 1 << MINORBITS, | 1190 | ret = __register_chrdev(MTD_CHAR_MAJOR, 0, 1 << MINORBITS, |
1193 | "mtd", &mtd_fops); | 1191 | "mtd", &mtd_fops); |
1194 | if (ret < 0) { | 1192 | if (ret < 0) { |
1195 | pr_notice("Can't allocate major number %d for " | 1193 | pr_err("Can't allocate major number %d for MTD\n", |
1196 | "Memory Technology Devices.\n", MTD_CHAR_MAJOR); | 1194 | MTD_CHAR_MAJOR); |
1197 | return ret; | 1195 | return ret; |
1198 | } | 1196 | } |
1199 | 1197 | ||
1200 | ret = register_filesystem(&mtd_inodefs_type); | 1198 | ret = register_filesystem(&mtd_inodefs_type); |
1201 | if (ret) { | 1199 | if (ret) { |
1202 | pr_notice("Can't register mtd_inodefs filesystem: %d\n", ret); | 1200 | pr_err("Can't register mtd_inodefs filesystem, error %d\n", |
1201 | ret); | ||
1203 | goto err_unregister_chdev; | 1202 | goto err_unregister_chdev; |
1204 | } | 1203 | } |
1204 | |||
1205 | return ret; | 1205 | return ret; |
1206 | 1206 | ||
1207 | err_unregister_chdev: | 1207 | err_unregister_chdev: |
@@ -1209,18 +1209,10 @@ err_unregister_chdev: | |||
1209 | return ret; | 1209 | return ret; |
1210 | } | 1210 | } |
1211 | 1211 | ||
1212 | static void __exit cleanup_mtdchar(void) | 1212 | void __exit cleanup_mtdchar(void) |
1213 | { | 1213 | { |
1214 | unregister_filesystem(&mtd_inodefs_type); | 1214 | unregister_filesystem(&mtd_inodefs_type); |
1215 | __unregister_chrdev(MTD_CHAR_MAJOR, 0, 1 << MINORBITS, "mtd"); | 1215 | __unregister_chrdev(MTD_CHAR_MAJOR, 0, 1 << MINORBITS, "mtd"); |
1216 | } | 1216 | } |
1217 | 1217 | ||
1218 | module_init(init_mtdchar); | ||
1219 | module_exit(cleanup_mtdchar); | ||
1220 | |||
1221 | MODULE_ALIAS_CHARDEV_MAJOR(MTD_CHAR_MAJOR); | ||
1222 | |||
1223 | MODULE_LICENSE("GPL"); | ||
1224 | MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); | ||
1225 | MODULE_DESCRIPTION("Direct character-device access to MTD devices"); | ||
1226 | MODULE_ALIAS_CHARDEV_MAJOR(MTD_CHAR_MAJOR); | 1218 | MODULE_ALIAS_CHARDEV_MAJOR(MTD_CHAR_MAJOR); |
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 322ca65b0cc5..c400c57c394a 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/mtd/partitions.h> | 42 | #include <linux/mtd/partitions.h> |
43 | 43 | ||
44 | #include "mtdcore.h" | 44 | #include "mtdcore.h" |
45 | |||
45 | /* | 46 | /* |
46 | * backing device capabilities for non-mappable devices (such as NAND flash) | 47 | * backing device capabilities for non-mappable devices (such as NAND flash) |
47 | * - permits private mappings, copies are taken of the data | 48 | * - permits private mappings, copies are taken of the data |
@@ -97,11 +98,7 @@ EXPORT_SYMBOL_GPL(__mtd_next_device); | |||
97 | static LIST_HEAD(mtd_notifiers); | 98 | static LIST_HEAD(mtd_notifiers); |
98 | 99 | ||
99 | 100 | ||
100 | #if defined(CONFIG_MTD_CHAR) || defined(CONFIG_MTD_CHAR_MODULE) | ||
101 | #define MTD_DEVT(index) MKDEV(MTD_CHAR_MAJOR, (index)*2) | 101 | #define MTD_DEVT(index) MKDEV(MTD_CHAR_MAJOR, (index)*2) |
102 | #else | ||
103 | #define MTD_DEVT(index) 0 | ||
104 | #endif | ||
105 | 102 | ||
106 | /* REVISIT once MTD uses the driver model better, whoever allocates | 103 | /* REVISIT once MTD uses the driver model better, whoever allocates |
107 | * the mtd_info will probably want to use the release() hook... | 104 | * the mtd_info will probably want to use the release() hook... |
@@ -493,7 +490,7 @@ out_error: | |||
493 | * | 490 | * |
494 | * Returns zero in case of success and a negative error code in case of failure. | 491 | * Returns zero in case of success and a negative error code in case of failure. |
495 | */ | 492 | */ |
496 | int mtd_device_parse_register(struct mtd_info *mtd, const char **types, | 493 | int mtd_device_parse_register(struct mtd_info *mtd, const char * const *types, |
497 | struct mtd_part_parser_data *parser_data, | 494 | struct mtd_part_parser_data *parser_data, |
498 | const struct mtd_partition *parts, | 495 | const struct mtd_partition *parts, |
499 | int nr_parts) | 496 | int nr_parts) |
@@ -1117,8 +1114,6 @@ EXPORT_SYMBOL_GPL(mtd_kmalloc_up_to); | |||
1117 | /*====================================================================*/ | 1114 | /*====================================================================*/ |
1118 | /* Support for /proc/mtd */ | 1115 | /* Support for /proc/mtd */ |
1119 | 1116 | ||
1120 | static struct proc_dir_entry *proc_mtd; | ||
1121 | |||
1122 | static int mtd_proc_show(struct seq_file *m, void *v) | 1117 | static int mtd_proc_show(struct seq_file *m, void *v) |
1123 | { | 1118 | { |
1124 | struct mtd_info *mtd; | 1119 | struct mtd_info *mtd; |
@@ -1164,6 +1159,8 @@ static int __init mtd_bdi_init(struct backing_dev_info *bdi, const char *name) | |||
1164 | return ret; | 1159 | return ret; |
1165 | } | 1160 | } |
1166 | 1161 | ||
1162 | static struct proc_dir_entry *proc_mtd; | ||
1163 | |||
1167 | static int __init init_mtd(void) | 1164 | static int __init init_mtd(void) |
1168 | { | 1165 | { |
1169 | int ret; | 1166 | int ret; |
@@ -1184,11 +1181,17 @@ static int __init init_mtd(void) | |||
1184 | if (ret) | 1181 | if (ret) |
1185 | goto err_bdi3; | 1182 | goto err_bdi3; |
1186 | 1183 | ||
1187 | #ifdef CONFIG_PROC_FS | ||
1188 | proc_mtd = proc_create("mtd", 0, NULL, &mtd_proc_ops); | 1184 | proc_mtd = proc_create("mtd", 0, NULL, &mtd_proc_ops); |
1189 | #endif /* CONFIG_PROC_FS */ | 1185 | |
1186 | ret = init_mtdchar(); | ||
1187 | if (ret) | ||
1188 | goto out_procfs; | ||
1189 | |||
1190 | return 0; | 1190 | return 0; |
1191 | 1191 | ||
1192 | out_procfs: | ||
1193 | if (proc_mtd) | ||
1194 | remove_proc_entry("mtd", NULL); | ||
1192 | err_bdi3: | 1195 | err_bdi3: |
1193 | bdi_destroy(&mtd_bdi_ro_mappable); | 1196 | bdi_destroy(&mtd_bdi_ro_mappable); |
1194 | err_bdi2: | 1197 | err_bdi2: |
@@ -1202,10 +1205,9 @@ err_reg: | |||
1202 | 1205 | ||
1203 | static void __exit cleanup_mtd(void) | 1206 | static void __exit cleanup_mtd(void) |
1204 | { | 1207 | { |
1205 | #ifdef CONFIG_PROC_FS | 1208 | cleanup_mtdchar(); |
1206 | if (proc_mtd) | 1209 | if (proc_mtd) |
1207 | remove_proc_entry( "mtd", NULL); | 1210 | remove_proc_entry("mtd", NULL); |
1208 | #endif /* CONFIG_PROC_FS */ | ||
1209 | class_unregister(&mtd_class); | 1211 | class_unregister(&mtd_class); |
1210 | bdi_destroy(&mtd_bdi_unmappable); | 1212 | bdi_destroy(&mtd_bdi_unmappable); |
1211 | bdi_destroy(&mtd_bdi_ro_mappable); | 1213 | bdi_destroy(&mtd_bdi_ro_mappable); |
diff --git a/drivers/mtd/mtdcore.h b/drivers/mtd/mtdcore.h index 961a38408542..7b0353399a10 100644 --- a/drivers/mtd/mtdcore.h +++ b/drivers/mtd/mtdcore.h | |||
@@ -1,23 +1,21 @@ | |||
1 | /* linux/drivers/mtd/mtdcore.h | 1 | /* |
2 | * | 2 | * These are exported solely for the purpose of mtd_blkdevs.c and mtdchar.c. |
3 | * Header file for driver private mtdcore exports | 3 | * You should not use them for _anything_ else. |
4 | * | ||
5 | */ | 4 | */ |
6 | 5 | ||
7 | /* These are exported solely for the purpose of mtd_blkdevs.c. You | ||
8 | should not use them for _anything_ else */ | ||
9 | |||
10 | extern struct mutex mtd_table_mutex; | 6 | extern struct mutex mtd_table_mutex; |
11 | extern struct mtd_info *__mtd_next_device(int i); | ||
12 | 7 | ||
13 | extern int add_mtd_device(struct mtd_info *mtd); | 8 | struct mtd_info *__mtd_next_device(int i); |
14 | extern int del_mtd_device(struct mtd_info *mtd); | 9 | int add_mtd_device(struct mtd_info *mtd); |
15 | extern int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, | 10 | int del_mtd_device(struct mtd_info *mtd); |
16 | int); | 11 | int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); |
17 | extern int del_mtd_partitions(struct mtd_info *); | 12 | int del_mtd_partitions(struct mtd_info *); |
18 | extern int parse_mtd_partitions(struct mtd_info *master, const char **types, | 13 | int parse_mtd_partitions(struct mtd_info *master, const char * const *types, |
19 | struct mtd_partition **pparts, | 14 | struct mtd_partition **pparts, |
20 | struct mtd_part_parser_data *data); | 15 | struct mtd_part_parser_data *data); |
16 | |||
17 | int __init init_mtdchar(void); | ||
18 | void __exit cleanup_mtdchar(void); | ||
21 | 19 | ||
22 | #define mtd_for_each_device(mtd) \ | 20 | #define mtd_for_each_device(mtd) \ |
23 | for ((mtd) = __mtd_next_device(0); \ | 21 | for ((mtd) = __mtd_next_device(0); \ |
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index 70fa70a8318f..301493382cd0 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c | |||
@@ -694,7 +694,7 @@ EXPORT_SYMBOL_GPL(deregister_mtd_parser); | |||
694 | * Do not forget to update 'parse_mtd_partitions()' kerneldoc comment if you | 694 | * Do not forget to update 'parse_mtd_partitions()' kerneldoc comment if you |
695 | * are changing this array! | 695 | * are changing this array! |
696 | */ | 696 | */ |
697 | static const char *default_mtd_part_types[] = { | 697 | static const char * const default_mtd_part_types[] = { |
698 | "cmdlinepart", | 698 | "cmdlinepart", |
699 | "ofpart", | 699 | "ofpart", |
700 | NULL | 700 | NULL |
@@ -720,7 +720,7 @@ static const char *default_mtd_part_types[] = { | |||
720 | * o a positive number of found partitions, in which case on exit @pparts will | 720 | * o a positive number of found partitions, in which case on exit @pparts will |
721 | * point to an array containing this number of &struct mtd_info objects. | 721 | * point to an array containing this number of &struct mtd_info objects. |
722 | */ | 722 | */ |
723 | int parse_mtd_partitions(struct mtd_info *master, const char **types, | 723 | int parse_mtd_partitions(struct mtd_info *master, const char *const *types, |
724 | struct mtd_partition **pparts, | 724 | struct mtd_partition **pparts, |
725 | struct mtd_part_parser_data *data) | 725 | struct mtd_part_parser_data *data) |
726 | { | 726 | { |
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 5d54ad32697f..a60f6c17f57b 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig | |||
@@ -41,14 +41,6 @@ config MTD_SM_COMMON | |||
41 | tristate | 41 | tristate |
42 | default n | 42 | default n |
43 | 43 | ||
44 | config MTD_NAND_MUSEUM_IDS | ||
45 | bool "Enable chip ids for obsolete ancient NAND devices" | ||
46 | default n | ||
47 | help | ||
48 | Enable this option only when your board has first generation | ||
49 | NAND chips (page size 256 byte, erase size 4-8KiB). The IDs | ||
50 | of these chips were reused by later, larger chips. | ||
51 | |||
52 | config MTD_NAND_DENALI | 44 | config MTD_NAND_DENALI |
53 | tristate "Support Denali NAND controller" | 45 | tristate "Support Denali NAND controller" |
54 | help | 46 | help |
@@ -81,12 +73,6 @@ config MTD_NAND_DENALI_SCRATCH_REG_ADDR | |||
81 | scratch register here to enable this feature. On Intel Moorestown | 73 | scratch register here to enable this feature. On Intel Moorestown |
82 | boards, the scratch register is at 0xFF108018. | 74 | boards, the scratch register is at 0xFF108018. |
83 | 75 | ||
84 | config MTD_NAND_H1900 | ||
85 | tristate "iPAQ H1900 flash" | ||
86 | depends on ARCH_PXA && BROKEN | ||
87 | help | ||
88 | This enables the driver for the iPAQ h1900 flash. | ||
89 | |||
90 | config MTD_NAND_GPIO | 76 | config MTD_NAND_GPIO |
91 | tristate "GPIO NAND Flash driver" | 77 | tristate "GPIO NAND Flash driver" |
92 | depends on GPIOLIB && ARM | 78 | depends on GPIOLIB && ARM |
@@ -201,22 +187,6 @@ config MTD_NAND_BF5XX_BOOTROM_ECC | |||
201 | 187 | ||
202 | If unsure, say N. | 188 | If unsure, say N. |
203 | 189 | ||
204 | config MTD_NAND_RTC_FROM4 | ||
205 | tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)" | ||
206 | depends on SH_SOLUTION_ENGINE | ||
207 | select REED_SOLOMON | ||
208 | select REED_SOLOMON_DEC8 | ||
209 | select BITREVERSE | ||
210 | help | ||
211 | This enables the driver for the Renesas Technology AG-AND | ||
212 | flash interface board (FROM_BOARD4) | ||
213 | |||
214 | config MTD_NAND_PPCHAMELEONEVB | ||
215 | tristate "NAND Flash device on PPChameleonEVB board" | ||
216 | depends on PPCHAMELEONEVB && BROKEN | ||
217 | help | ||
218 | This enables the NAND flash driver on the PPChameleon EVB Board. | ||
219 | |||
220 | config MTD_NAND_S3C2410 | 190 | config MTD_NAND_S3C2410 |
221 | tristate "NAND Flash support for Samsung S3C SoCs" | 191 | tristate "NAND Flash support for Samsung S3C SoCs" |
222 | depends on ARCH_S3C24XX || ARCH_S3C64XX | 192 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index d76d91205691..bb8189172f62 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile | |||
@@ -15,14 +15,11 @@ obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o | |||
15 | obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o | 15 | obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o |
16 | obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o | 16 | obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o |
17 | obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o | 17 | obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o |
18 | obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o | ||
19 | obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o | 18 | obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o |
20 | obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o | 19 | obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o |
21 | obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o | 20 | obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o |
22 | obj-$(CONFIG_MTD_NAND_DOCG4) += docg4.o | 21 | obj-$(CONFIG_MTD_NAND_DOCG4) += docg4.o |
23 | obj-$(CONFIG_MTD_NAND_FSMC) += fsmc_nand.o | 22 | obj-$(CONFIG_MTD_NAND_FSMC) += fsmc_nand.o |
24 | obj-$(CONFIG_MTD_NAND_H1900) += h1910.o | ||
25 | obj-$(CONFIG_MTD_NAND_RTC_FROM4) += rtc_from4.o | ||
26 | obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o | 23 | obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o |
27 | obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o | 24 | obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o |
28 | obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o | 25 | obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o |
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index ffcbcca2fd2d..2d23d2929438 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c | |||
@@ -1737,20 +1737,7 @@ static struct platform_driver atmel_nand_driver = { | |||
1737 | }, | 1737 | }, |
1738 | }; | 1738 | }; |
1739 | 1739 | ||
1740 | static int __init atmel_nand_init(void) | 1740 | module_platform_driver_probe(atmel_nand_driver, atmel_nand_probe); |
1741 | { | ||
1742 | return platform_driver_probe(&atmel_nand_driver, atmel_nand_probe); | ||
1743 | } | ||
1744 | |||
1745 | |||
1746 | static void __exit atmel_nand_exit(void) | ||
1747 | { | ||
1748 | platform_driver_unregister(&atmel_nand_driver); | ||
1749 | } | ||
1750 | |||
1751 | |||
1752 | module_init(atmel_nand_init); | ||
1753 | module_exit(atmel_nand_exit); | ||
1754 | 1741 | ||
1755 | MODULE_LICENSE("GPL"); | 1742 | MODULE_LICENSE("GPL"); |
1756 | MODULE_AUTHOR("Rick Bronson"); | 1743 | MODULE_AUTHOR("Rick Bronson"); |
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 4271e948d1e2..776df3694f75 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c | |||
@@ -874,21 +874,7 @@ static struct platform_driver bf5xx_nand_driver = { | |||
874 | }, | 874 | }, |
875 | }; | 875 | }; |
876 | 876 | ||
877 | static int __init bf5xx_nand_init(void) | 877 | module_platform_driver(bf5xx_nand_driver); |
878 | { | ||
879 | printk(KERN_INFO "%s, Version %s (c) 2007 Analog Devices, Inc.\n", | ||
880 | DRV_DESC, DRV_VERSION); | ||
881 | |||
882 | return platform_driver_register(&bf5xx_nand_driver); | ||
883 | } | ||
884 | |||
885 | static void __exit bf5xx_nand_exit(void) | ||
886 | { | ||
887 | platform_driver_unregister(&bf5xx_nand_driver); | ||
888 | } | ||
889 | |||
890 | module_init(bf5xx_nand_init); | ||
891 | module_exit(bf5xx_nand_exit); | ||
892 | 878 | ||
893 | MODULE_LICENSE("GPL"); | 879 | MODULE_LICENSE("GPL"); |
894 | MODULE_AUTHOR(DRV_AUTHOR); | 880 | MODULE_AUTHOR(DRV_AUTHOR); |
diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c index 010d61266536..c34985a55101 100644 --- a/drivers/mtd/nand/cafe_nand.c +++ b/drivers/mtd/nand/cafe_nand.c | |||
@@ -303,13 +303,7 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command, | |||
303 | case NAND_CMD_SEQIN: | 303 | case NAND_CMD_SEQIN: |
304 | case NAND_CMD_RNDIN: | 304 | case NAND_CMD_RNDIN: |
305 | case NAND_CMD_STATUS: | 305 | case NAND_CMD_STATUS: |
306 | case NAND_CMD_DEPLETE1: | ||
307 | case NAND_CMD_RNDOUT: | 306 | case NAND_CMD_RNDOUT: |
308 | case NAND_CMD_STATUS_ERROR: | ||
309 | case NAND_CMD_STATUS_ERROR0: | ||
310 | case NAND_CMD_STATUS_ERROR1: | ||
311 | case NAND_CMD_STATUS_ERROR2: | ||
312 | case NAND_CMD_STATUS_ERROR3: | ||
313 | cafe_writel(cafe, cafe->ctl2, NAND_CTRL2); | 307 | cafe_writel(cafe, cafe->ctl2, NAND_CTRL2); |
314 | return; | 308 | return; |
315 | } | 309 | } |
@@ -536,8 +530,8 @@ static int cafe_nand_write_page_lowlevel(struct mtd_info *mtd, | |||
536 | } | 530 | } |
537 | 531 | ||
538 | static int cafe_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, | 532 | static int cafe_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
539 | const uint8_t *buf, int oob_required, int page, | 533 | uint32_t offset, int data_len, const uint8_t *buf, |
540 | int cached, int raw) | 534 | int oob_required, int page, int cached, int raw) |
541 | { | 535 | { |
542 | int status; | 536 | int status; |
543 | 537 | ||
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 94e17af8e450..c3e15a558173 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/mtd/partitions.h> | 34 | #include <linux/mtd/partitions.h> |
35 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
36 | #include <linux/of_device.h> | 36 | #include <linux/of_device.h> |
37 | #include <linux/of.h> | ||
37 | 38 | ||
38 | #include <linux/platform_data/mtd-davinci.h> | 39 | #include <linux/platform_data/mtd-davinci.h> |
39 | #include <linux/platform_data/mtd-davinci-aemif.h> | 40 | #include <linux/platform_data/mtd-davinci-aemif.h> |
@@ -577,7 +578,6 @@ static struct davinci_nand_pdata | |||
577 | return pdev->dev.platform_data; | 578 | return pdev->dev.platform_data; |
578 | } | 579 | } |
579 | #else | 580 | #else |
580 | #define davinci_nand_of_match NULL | ||
581 | static struct davinci_nand_pdata | 581 | static struct davinci_nand_pdata |
582 | *nand_davinci_get_pdata(struct platform_device *pdev) | 582 | *nand_davinci_get_pdata(struct platform_device *pdev) |
583 | { | 583 | { |
@@ -878,22 +878,12 @@ static struct platform_driver nand_davinci_driver = { | |||
878 | .driver = { | 878 | .driver = { |
879 | .name = "davinci_nand", | 879 | .name = "davinci_nand", |
880 | .owner = THIS_MODULE, | 880 | .owner = THIS_MODULE, |
881 | .of_match_table = davinci_nand_of_match, | 881 | .of_match_table = of_match_ptr(davinci_nand_of_match), |
882 | }, | 882 | }, |
883 | }; | 883 | }; |
884 | MODULE_ALIAS("platform:davinci_nand"); | 884 | MODULE_ALIAS("platform:davinci_nand"); |
885 | 885 | ||
886 | static int __init nand_davinci_init(void) | 886 | module_platform_driver_probe(nand_davinci_driver, nand_davinci_probe); |
887 | { | ||
888 | return platform_driver_probe(&nand_davinci_driver, nand_davinci_probe); | ||
889 | } | ||
890 | module_init(nand_davinci_init); | ||
891 | |||
892 | static void __exit nand_davinci_exit(void) | ||
893 | { | ||
894 | platform_driver_unregister(&nand_davinci_driver); | ||
895 | } | ||
896 | module_exit(nand_davinci_exit); | ||
897 | 887 | ||
898 | MODULE_LICENSE("GPL"); | 888 | MODULE_LICENSE("GPL"); |
899 | MODULE_AUTHOR("Texas Instruments"); | 889 | MODULE_AUTHOR("Texas Instruments"); |
diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c index 546f8cb5688d..92530244e2cb 100644 --- a/drivers/mtd/nand/denali_dt.c +++ b/drivers/mtd/nand/denali_dt.c | |||
@@ -42,7 +42,7 @@ static void __iomem *request_and_map(struct device *dev, | |||
42 | } | 42 | } |
43 | 43 | ||
44 | ptr = devm_ioremap_nocache(dev, res->start, resource_size(res)); | 44 | ptr = devm_ioremap_nocache(dev, res->start, resource_size(res)); |
45 | if (!res) | 45 | if (!ptr) |
46 | dev_err(dev, "ioremap_nocache of %s failed!", res->name); | 46 | dev_err(dev, "ioremap_nocache of %s failed!", res->name); |
47 | 47 | ||
48 | return ptr; | 48 | return ptr; |
@@ -90,7 +90,7 @@ static int denali_dt_probe(struct platform_device *ofdev) | |||
90 | denali->irq = platform_get_irq(ofdev, 0); | 90 | denali->irq = platform_get_irq(ofdev, 0); |
91 | if (denali->irq < 0) { | 91 | if (denali->irq < 0) { |
92 | dev_err(&ofdev->dev, "no irq defined\n"); | 92 | dev_err(&ofdev->dev, "no irq defined\n"); |
93 | return -ENXIO; | 93 | return denali->irq; |
94 | } | 94 | } |
95 | 95 | ||
96 | denali->flash_reg = request_and_map(&ofdev->dev, denali_reg); | 96 | denali->flash_reg = request_and_map(&ofdev->dev, denali_reg); |
@@ -146,21 +146,11 @@ static struct platform_driver denali_dt_driver = { | |||
146 | .driver = { | 146 | .driver = { |
147 | .name = "denali-nand-dt", | 147 | .name = "denali-nand-dt", |
148 | .owner = THIS_MODULE, | 148 | .owner = THIS_MODULE, |
149 | .of_match_table = of_match_ptr(denali_nand_dt_ids), | 149 | .of_match_table = denali_nand_dt_ids, |
150 | }, | 150 | }, |
151 | }; | 151 | }; |
152 | 152 | ||
153 | static int __init denali_init_dt(void) | 153 | module_platform_driver(denali_dt_driver); |
154 | { | ||
155 | return platform_driver_register(&denali_dt_driver); | ||
156 | } | ||
157 | module_init(denali_init_dt); | ||
158 | |||
159 | static void __exit denali_exit_dt(void) | ||
160 | { | ||
161 | platform_driver_unregister(&denali_dt_driver); | ||
162 | } | ||
163 | module_exit(denali_exit_dt); | ||
164 | 154 | ||
165 | MODULE_LICENSE("GPL"); | 155 | MODULE_LICENSE("GPL"); |
166 | MODULE_AUTHOR("Jamie Iles"); | 156 | MODULE_AUTHOR("Jamie Iles"); |
diff --git a/drivers/mtd/nand/docg4.c b/drivers/mtd/nand/docg4.c index 18fa4489e52e..fa25e7a08134 100644 --- a/drivers/mtd/nand/docg4.c +++ b/drivers/mtd/nand/docg4.c | |||
@@ -1397,18 +1397,7 @@ static struct platform_driver docg4_driver = { | |||
1397 | .remove = __exit_p(cleanup_docg4), | 1397 | .remove = __exit_p(cleanup_docg4), |
1398 | }; | 1398 | }; |
1399 | 1399 | ||
1400 | static int __init docg4_init(void) | 1400 | module_platform_driver_probe(docg4_driver, probe_docg4); |
1401 | { | ||
1402 | return platform_driver_probe(&docg4_driver, probe_docg4); | ||
1403 | } | ||
1404 | |||
1405 | static void __exit docg4_exit(void) | ||
1406 | { | ||
1407 | platform_driver_unregister(&docg4_driver); | ||
1408 | } | ||
1409 | |||
1410 | module_init(docg4_init); | ||
1411 | module_exit(docg4_exit); | ||
1412 | 1401 | ||
1413 | MODULE_LICENSE("GPL"); | 1402 | MODULE_LICENSE("GPL"); |
1414 | MODULE_AUTHOR("Mike Dunn"); | 1403 | MODULE_AUTHOR("Mike Dunn"); |
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 05ba3f0c2d19..911e2433fe30 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c | |||
@@ -1235,18 +1235,7 @@ static struct platform_driver fsmc_nand_driver = { | |||
1235 | }, | 1235 | }, |
1236 | }; | 1236 | }; |
1237 | 1237 | ||
1238 | static int __init fsmc_nand_init(void) | 1238 | module_platform_driver_probe(fsmc_nand_driver, fsmc_nand_probe); |
1239 | { | ||
1240 | return platform_driver_probe(&fsmc_nand_driver, | ||
1241 | fsmc_nand_probe); | ||
1242 | } | ||
1243 | module_init(fsmc_nand_init); | ||
1244 | |||
1245 | static void __exit fsmc_nand_exit(void) | ||
1246 | { | ||
1247 | platform_driver_unregister(&fsmc_nand_driver); | ||
1248 | } | ||
1249 | module_exit(fsmc_nand_exit); | ||
1250 | 1239 | ||
1251 | MODULE_LICENSE("GPL"); | 1240 | MODULE_LICENSE("GPL"); |
1252 | MODULE_AUTHOR("Vipin Kumar <vipin.kumar@st.com>, Ashish Priyadarshi"); | 1241 | MODULE_AUTHOR("Vipin Kumar <vipin.kumar@st.com>, Ashish Priyadarshi"); |
diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c index e789e3f51710..89065dd83d64 100644 --- a/drivers/mtd/nand/gpio.c +++ b/drivers/mtd/nand/gpio.c | |||
@@ -190,7 +190,6 @@ static struct resource *gpio_nand_get_io_sync_of(struct platform_device *pdev) | |||
190 | return r; | 190 | return r; |
191 | } | 191 | } |
192 | #else /* CONFIG_OF */ | 192 | #else /* CONFIG_OF */ |
193 | #define gpio_nand_id_table NULL | ||
194 | static inline int gpio_nand_get_config_of(const struct device *dev, | 193 | static inline int gpio_nand_get_config_of(const struct device *dev, |
195 | struct gpio_nand_platdata *plat) | 194 | struct gpio_nand_platdata *plat) |
196 | { | 195 | { |
@@ -259,8 +258,6 @@ static int gpio_nand_remove(struct platform_device *dev) | |||
259 | if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) | 258 | if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) |
260 | gpio_free(gpiomtd->plat.gpio_rdy); | 259 | gpio_free(gpiomtd->plat.gpio_rdy); |
261 | 260 | ||
262 | kfree(gpiomtd); | ||
263 | |||
264 | return 0; | 261 | return 0; |
265 | } | 262 | } |
266 | 263 | ||
@@ -297,7 +294,7 @@ static int gpio_nand_probe(struct platform_device *dev) | |||
297 | if (!res0) | 294 | if (!res0) |
298 | return -EINVAL; | 295 | return -EINVAL; |
299 | 296 | ||
300 | gpiomtd = kzalloc(sizeof(*gpiomtd), GFP_KERNEL); | 297 | gpiomtd = devm_kzalloc(&dev->dev, sizeof(*gpiomtd), GFP_KERNEL); |
301 | if (gpiomtd == NULL) { | 298 | if (gpiomtd == NULL) { |
302 | dev_err(&dev->dev, "failed to create NAND MTD\n"); | 299 | dev_err(&dev->dev, "failed to create NAND MTD\n"); |
303 | return -ENOMEM; | 300 | return -ENOMEM; |
@@ -412,7 +409,6 @@ err_sync: | |||
412 | iounmap(gpiomtd->nand_chip.IO_ADDR_R); | 409 | iounmap(gpiomtd->nand_chip.IO_ADDR_R); |
413 | release_mem_region(res0->start, resource_size(res0)); | 410 | release_mem_region(res0->start, resource_size(res0)); |
414 | err_map: | 411 | err_map: |
415 | kfree(gpiomtd); | ||
416 | return ret; | 412 | return ret; |
417 | } | 413 | } |
418 | 414 | ||
@@ -421,7 +417,7 @@ static struct platform_driver gpio_nand_driver = { | |||
421 | .remove = gpio_nand_remove, | 417 | .remove = gpio_nand_remove, |
422 | .driver = { | 418 | .driver = { |
423 | .name = "gpio-nand", | 419 | .name = "gpio-nand", |
424 | .of_match_table = gpio_nand_id_table, | 420 | .of_match_table = of_match_ptr(gpio_nand_id_table), |
425 | }, | 421 | }, |
426 | }; | 422 | }; |
427 | 423 | ||
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c deleted file mode 100644 index 50166e93ba96..000000000000 --- a/drivers/mtd/nand/h1910.c +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/mtd/nand/h1910.c | ||
3 | * | ||
4 | * Copyright (C) 2003 Joshua Wise (joshua@joshuawise.com) | ||
5 | * | ||
6 | * Derived from drivers/mtd/nand/edb7312.c | ||
7 | * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) | ||
8 | * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * Overview: | ||
15 | * This is a device driver for the NAND flash device found on the | ||
16 | * iPAQ h1910 board which utilizes the Samsung K9F2808 part. This is | ||
17 | * a 128Mibit (16MiB x 8 bits) NAND flash device. | ||
18 | */ | ||
19 | |||
20 | #include <linux/slab.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/mtd/mtd.h> | ||
24 | #include <linux/mtd/nand.h> | ||
25 | #include <linux/mtd/partitions.h> | ||
26 | #include <asm/io.h> | ||
27 | #include <mach/hardware.h> | ||
28 | #include <asm/sizes.h> | ||
29 | #include <mach/h1900-gpio.h> | ||
30 | #include <mach/ipaq.h> | ||
31 | |||
32 | /* | ||
33 | * MTD structure for EDB7312 board | ||
34 | */ | ||
35 | static struct mtd_info *h1910_nand_mtd = NULL; | ||
36 | |||
37 | /* | ||
38 | * Module stuff | ||
39 | */ | ||
40 | |||
41 | /* | ||
42 | * Define static partitions for flash device | ||
43 | */ | ||
44 | static struct mtd_partition partition_info[] = { | ||
45 | {name:"h1910 NAND Flash", | ||
46 | offset:0, | ||
47 | size:16 * 1024 * 1024} | ||
48 | }; | ||
49 | |||
50 | #define NUM_PARTITIONS 1 | ||
51 | |||
52 | /* | ||
53 | * hardware specific access to control-lines | ||
54 | * | ||
55 | * NAND_NCE: bit 0 - don't care | ||
56 | * NAND_CLE: bit 1 - address bit 2 | ||
57 | * NAND_ALE: bit 2 - address bit 3 | ||
58 | */ | ||
59 | static void h1910_hwcontrol(struct mtd_info *mtd, int cmd, | ||
60 | unsigned int ctrl) | ||
61 | { | ||
62 | struct nand_chip *chip = mtd->priv; | ||
63 | |||
64 | if (cmd != NAND_CMD_NONE) | ||
65 | writeb(cmd, chip->IO_ADDR_W | ((ctrl & 0x6) << 1)); | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * read device ready pin | ||
70 | */ | ||
71 | #if 0 | ||
72 | static int h1910_device_ready(struct mtd_info *mtd) | ||
73 | { | ||
74 | return (GPLR(55) & GPIO_bit(55)); | ||
75 | } | ||
76 | #endif | ||
77 | |||
78 | /* | ||
79 | * Main initialization routine | ||
80 | */ | ||
81 | static int __init h1910_init(void) | ||
82 | { | ||
83 | struct nand_chip *this; | ||
84 | void __iomem *nandaddr; | ||
85 | |||
86 | if (!machine_is_h1900()) | ||
87 | return -ENODEV; | ||
88 | |||
89 | nandaddr = ioremap(0x08000000, 0x1000); | ||
90 | if (!nandaddr) { | ||
91 | printk("Failed to ioremap nand flash.\n"); | ||
92 | return -ENOMEM; | ||
93 | } | ||
94 | |||
95 | /* Allocate memory for MTD device structure and private data */ | ||
96 | h1910_nand_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); | ||
97 | if (!h1910_nand_mtd) { | ||
98 | printk("Unable to allocate h1910 NAND MTD device structure.\n"); | ||
99 | iounmap((void *)nandaddr); | ||
100 | return -ENOMEM; | ||
101 | } | ||
102 | |||
103 | /* Get pointer to private data */ | ||
104 | this = (struct nand_chip *)(&h1910_nand_mtd[1]); | ||
105 | |||
106 | /* Initialize structures */ | ||
107 | memset(h1910_nand_mtd, 0, sizeof(struct mtd_info)); | ||
108 | memset(this, 0, sizeof(struct nand_chip)); | ||
109 | |||
110 | /* Link the private data with the MTD structure */ | ||
111 | h1910_nand_mtd->priv = this; | ||
112 | h1910_nand_mtd->owner = THIS_MODULE; | ||
113 | |||
114 | /* | ||
115 | * Enable VPEN | ||
116 | */ | ||
117 | GPSR(37) = GPIO_bit(37); | ||
118 | |||
119 | /* insert callbacks */ | ||
120 | this->IO_ADDR_R = nandaddr; | ||
121 | this->IO_ADDR_W = nandaddr; | ||
122 | this->cmd_ctrl = h1910_hwcontrol; | ||
123 | this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */ | ||
124 | /* 15 us command delay time */ | ||
125 | this->chip_delay = 50; | ||
126 | this->ecc.mode = NAND_ECC_SOFT; | ||
127 | |||
128 | /* Scan to find existence of the device */ | ||
129 | if (nand_scan(h1910_nand_mtd, 1)) { | ||
130 | printk(KERN_NOTICE "No NAND device - returning -ENXIO\n"); | ||
131 | kfree(h1910_nand_mtd); | ||
132 | iounmap((void *)nandaddr); | ||
133 | return -ENXIO; | ||
134 | } | ||
135 | |||
136 | /* Register the partitions */ | ||
137 | mtd_device_parse_register(h1910_nand_mtd, NULL, NULL, partition_info, | ||
138 | NUM_PARTITIONS); | ||
139 | |||
140 | /* Return happy */ | ||
141 | return 0; | ||
142 | } | ||
143 | |||
144 | module_init(h1910_init); | ||
145 | |||
146 | /* | ||
147 | * Clean up routine | ||
148 | */ | ||
149 | static void __exit h1910_cleanup(void) | ||
150 | { | ||
151 | struct nand_chip *this = (struct nand_chip *)&h1910_nand_mtd[1]; | ||
152 | |||
153 | /* Release resources, unregister device */ | ||
154 | nand_release(h1910_nand_mtd); | ||
155 | |||
156 | /* Release io resource */ | ||
157 | iounmap((void *)this->IO_ADDR_W); | ||
158 | |||
159 | /* Free the MTD device structure */ | ||
160 | kfree(h1910_nand_mtd); | ||
161 | } | ||
162 | |||
163 | module_exit(h1910_cleanup); | ||
164 | |||
165 | MODULE_LICENSE("GPL"); | ||
166 | MODULE_AUTHOR("Joshua Wise <joshua at joshuawise dot com>"); | ||
167 | MODULE_DESCRIPTION("NAND flash driver for iPAQ h1910"); | ||
diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c index 0ca22ae9135c..a94facb46e5c 100644 --- a/drivers/mtd/nand/lpc32xx_mlc.c +++ b/drivers/mtd/nand/lpc32xx_mlc.c | |||
@@ -540,8 +540,8 @@ static int lpc32xx_write_page_lowlevel(struct mtd_info *mtd, | |||
540 | } | 540 | } |
541 | 541 | ||
542 | static int lpc32xx_write_page(struct mtd_info *mtd, struct nand_chip *chip, | 542 | static int lpc32xx_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
543 | const uint8_t *buf, int oob_required, int page, | 543 | uint32_t offset, int data_len, const uint8_t *buf, |
544 | int cached, int raw) | 544 | int oob_required, int page, int cached, int raw) |
545 | { | 545 | { |
546 | int res; | 546 | int res; |
547 | 547 | ||
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 42c63927609d..dfcd0a565c5b 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c | |||
@@ -4,7 +4,6 @@ | |||
4 | * Overview: | 4 | * Overview: |
5 | * This is the generic MTD driver for NAND flash devices. It should be | 5 | * This is the generic MTD driver for NAND flash devices. It should be |
6 | * capable of working with almost all NAND chips currently available. | 6 | * capable of working with almost all NAND chips currently available. |
7 | * Basic support for AG-AND chips is provided. | ||
8 | * | 7 | * |
9 | * Additional technical information is available on | 8 | * Additional technical information is available on |
10 | * http://www.linux-mtd.infradead.org/doc/nand.html | 9 | * http://www.linux-mtd.infradead.org/doc/nand.html |
@@ -22,8 +21,6 @@ | |||
22 | * Enable cached programming for 2k page size chips | 21 | * Enable cached programming for 2k page size chips |
23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW | 22 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
24 | * if we have HW ECC support. | 23 | * if we have HW ECC support. |
25 | * The AG-AND chips have nice features for speed improvement, | ||
26 | * which are not supported yet. Read / program 4 pages in one go. | ||
27 | * BBT table is not serialized, has to be fixed | 24 | * BBT table is not serialized, has to be fixed |
28 | * | 25 | * |
29 | * This program is free software; you can redistribute it and/or modify | 26 | * This program is free software; you can redistribute it and/or modify |
@@ -515,7 +512,7 @@ EXPORT_SYMBOL_GPL(nand_wait_ready); | |||
515 | * @page_addr: the page address for this command, -1 if none | 512 | * @page_addr: the page address for this command, -1 if none |
516 | * | 513 | * |
517 | * Send command to NAND device. This function is used for small page devices | 514 | * Send command to NAND device. This function is used for small page devices |
518 | * (256/512 Bytes per page). | 515 | * (512 Bytes per page). |
519 | */ | 516 | */ |
520 | static void nand_command(struct mtd_info *mtd, unsigned int command, | 517 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
521 | int column, int page_addr) | 518 | int column, int page_addr) |
@@ -631,8 +628,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, | |||
631 | } | 628 | } |
632 | 629 | ||
633 | /* Command latch cycle */ | 630 | /* Command latch cycle */ |
634 | chip->cmd_ctrl(mtd, command & 0xff, | 631 | chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
635 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); | ||
636 | 632 | ||
637 | if (column != -1 || page_addr != -1) { | 633 | if (column != -1 || page_addr != -1) { |
638 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; | 634 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
@@ -671,16 +667,6 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, | |||
671 | case NAND_CMD_SEQIN: | 667 | case NAND_CMD_SEQIN: |
672 | case NAND_CMD_RNDIN: | 668 | case NAND_CMD_RNDIN: |
673 | case NAND_CMD_STATUS: | 669 | case NAND_CMD_STATUS: |
674 | case NAND_CMD_DEPLETE1: | ||
675 | return; | ||
676 | |||
677 | case NAND_CMD_STATUS_ERROR: | ||
678 | case NAND_CMD_STATUS_ERROR0: | ||
679 | case NAND_CMD_STATUS_ERROR1: | ||
680 | case NAND_CMD_STATUS_ERROR2: | ||
681 | case NAND_CMD_STATUS_ERROR3: | ||
682 | /* Read error status commands require only a short delay */ | ||
683 | udelay(chip->chip_delay); | ||
684 | return; | 670 | return; |
685 | 671 | ||
686 | case NAND_CMD_RESET: | 672 | case NAND_CMD_RESET: |
@@ -836,10 +822,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) | |||
836 | */ | 822 | */ |
837 | ndelay(100); | 823 | ndelay(100); |
838 | 824 | ||
839 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) | 825 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
840 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); | ||
841 | else | ||
842 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); | ||
843 | 826 | ||
844 | if (in_interrupt() || oops_in_progress) | 827 | if (in_interrupt() || oops_in_progress) |
845 | panic_nand_wait(mtd, chip, timeo); | 828 | panic_nand_wait(mtd, chip, timeo); |
@@ -1127,7 +1110,7 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, | |||
1127 | } | 1110 | } |
1128 | 1111 | ||
1129 | /** | 1112 | /** |
1130 | * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function | 1113 | * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function |
1131 | * @mtd: mtd info structure | 1114 | * @mtd: mtd info structure |
1132 | * @chip: nand chip info structure | 1115 | * @chip: nand chip info structure |
1133 | * @data_offs: offset of requested data within the page | 1116 | * @data_offs: offset of requested data within the page |
@@ -1995,6 +1978,67 @@ static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, | |||
1995 | return 0; | 1978 | return 0; |
1996 | } | 1979 | } |
1997 | 1980 | ||
1981 | |||
1982 | /** | ||
1983 | * nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write | ||
1984 | * @mtd: mtd info structure | ||
1985 | * @chip: nand chip info structure | ||
1986 | * @column: column address of subpage within the page | ||
1987 | * @data_len: data length | ||
1988 | * @oob_required: must write chip->oob_poi to OOB | ||
1989 | */ | ||
1990 | static int nand_write_subpage_hwecc(struct mtd_info *mtd, | ||
1991 | struct nand_chip *chip, uint32_t offset, | ||
1992 | uint32_t data_len, const uint8_t *data_buf, | ||
1993 | int oob_required) | ||
1994 | { | ||
1995 | uint8_t *oob_buf = chip->oob_poi; | ||
1996 | uint8_t *ecc_calc = chip->buffers->ecccalc; | ||
1997 | int ecc_size = chip->ecc.size; | ||
1998 | int ecc_bytes = chip->ecc.bytes; | ||
1999 | int ecc_steps = chip->ecc.steps; | ||
2000 | uint32_t *eccpos = chip->ecc.layout->eccpos; | ||
2001 | uint32_t start_step = offset / ecc_size; | ||
2002 | uint32_t end_step = (offset + data_len - 1) / ecc_size; | ||
2003 | int oob_bytes = mtd->oobsize / ecc_steps; | ||
2004 | int step, i; | ||
2005 | |||
2006 | for (step = 0; step < ecc_steps; step++) { | ||
2007 | /* configure controller for WRITE access */ | ||
2008 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); | ||
2009 | |||
2010 | /* write data (untouched subpages already masked by 0xFF) */ | ||
2011 | chip->write_buf(mtd, data_buf, ecc_size); | ||
2012 | |||
2013 | /* mask ECC of un-touched subpages by padding 0xFF */ | ||
2014 | if ((step < start_step) || (step > end_step)) | ||
2015 | memset(ecc_calc, 0xff, ecc_bytes); | ||
2016 | else | ||
2017 | chip->ecc.calculate(mtd, data_buf, ecc_calc); | ||
2018 | |||
2019 | /* mask OOB of un-touched subpages by padding 0xFF */ | ||
2020 | /* if oob_required, preserve OOB metadata of written subpage */ | ||
2021 | if (!oob_required || (step < start_step) || (step > end_step)) | ||
2022 | memset(oob_buf, 0xff, oob_bytes); | ||
2023 | |||
2024 | data_buf += ecc_size; | ||
2025 | ecc_calc += ecc_bytes; | ||
2026 | oob_buf += oob_bytes; | ||
2027 | } | ||
2028 | |||
2029 | /* copy calculated ECC for whole page to chip->buffer->oob */ | ||
2030 | /* this include masked-value(0xFF) for unwritten subpages */ | ||
2031 | ecc_calc = chip->buffers->ecccalc; | ||
2032 | for (i = 0; i < chip->ecc.total; i++) | ||
2033 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; | ||
2034 | |||
2035 | /* write OOB buffer to NAND device */ | ||
2036 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); | ||
2037 | |||
2038 | return 0; | ||
2039 | } | ||
2040 | |||
2041 | |||
1998 | /** | 2042 | /** |
1999 | * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write | 2043 | * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write |
2000 | * @mtd: mtd info structure | 2044 | * @mtd: mtd info structure |
@@ -2047,6 +2091,8 @@ static int nand_write_page_syndrome(struct mtd_info *mtd, | |||
2047 | * nand_write_page - [REPLACEABLE] write one page | 2091 | * nand_write_page - [REPLACEABLE] write one page |
2048 | * @mtd: MTD device structure | 2092 | * @mtd: MTD device structure |
2049 | * @chip: NAND chip descriptor | 2093 | * @chip: NAND chip descriptor |
2094 | * @offset: address offset within the page | ||
2095 | * @data_len: length of actual data to be written | ||
2050 | * @buf: the data to write | 2096 | * @buf: the data to write |
2051 | * @oob_required: must write chip->oob_poi to OOB | 2097 | * @oob_required: must write chip->oob_poi to OOB |
2052 | * @page: page number to write | 2098 | * @page: page number to write |
@@ -2054,15 +2100,25 @@ static int nand_write_page_syndrome(struct mtd_info *mtd, | |||
2054 | * @raw: use _raw version of write_page | 2100 | * @raw: use _raw version of write_page |
2055 | */ | 2101 | */ |
2056 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, | 2102 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
2057 | const uint8_t *buf, int oob_required, int page, | 2103 | uint32_t offset, int data_len, const uint8_t *buf, |
2058 | int cached, int raw) | 2104 | int oob_required, int page, int cached, int raw) |
2059 | { | 2105 | { |
2060 | int status; | 2106 | int status, subpage; |
2107 | |||
2108 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && | ||
2109 | chip->ecc.write_subpage) | ||
2110 | subpage = offset || (data_len < mtd->writesize); | ||
2111 | else | ||
2112 | subpage = 0; | ||
2061 | 2113 | ||
2062 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); | 2114 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
2063 | 2115 | ||
2064 | if (unlikely(raw)) | 2116 | if (unlikely(raw)) |
2065 | status = chip->ecc.write_page_raw(mtd, chip, buf, oob_required); | 2117 | status = chip->ecc.write_page_raw(mtd, chip, buf, |
2118 | oob_required); | ||
2119 | else if (subpage) | ||
2120 | status = chip->ecc.write_subpage(mtd, chip, offset, data_len, | ||
2121 | buf, oob_required); | ||
2066 | else | 2122 | else |
2067 | status = chip->ecc.write_page(mtd, chip, buf, oob_required); | 2123 | status = chip->ecc.write_page(mtd, chip, buf, oob_required); |
2068 | 2124 | ||
@@ -2075,7 +2131,7 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, | |||
2075 | */ | 2131 | */ |
2076 | cached = 0; | 2132 | cached = 0; |
2077 | 2133 | ||
2078 | if (!cached || !(chip->options & NAND_CACHEPRG)) { | 2134 | if (!cached || !NAND_HAS_CACHEPROG(chip)) { |
2079 | 2135 | ||
2080 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | 2136 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
2081 | status = chip->waitfunc(mtd, chip); | 2137 | status = chip->waitfunc(mtd, chip); |
@@ -2176,7 +2232,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, | |||
2176 | 2232 | ||
2177 | uint8_t *oob = ops->oobbuf; | 2233 | uint8_t *oob = ops->oobbuf; |
2178 | uint8_t *buf = ops->datbuf; | 2234 | uint8_t *buf = ops->datbuf; |
2179 | int ret, subpage; | 2235 | int ret; |
2180 | int oob_required = oob ? 1 : 0; | 2236 | int oob_required = oob ? 1 : 0; |
2181 | 2237 | ||
2182 | ops->retlen = 0; | 2238 | ops->retlen = 0; |
@@ -2191,10 +2247,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, | |||
2191 | } | 2247 | } |
2192 | 2248 | ||
2193 | column = to & (mtd->writesize - 1); | 2249 | column = to & (mtd->writesize - 1); |
2194 | subpage = column || (writelen & (mtd->writesize - 1)); | ||
2195 | |||
2196 | if (subpage && oob) | ||
2197 | return -EINVAL; | ||
2198 | 2250 | ||
2199 | chipnr = (int)(to >> chip->chip_shift); | 2251 | chipnr = (int)(to >> chip->chip_shift); |
2200 | chip->select_chip(mtd, chipnr); | 2252 | chip->select_chip(mtd, chipnr); |
@@ -2243,9 +2295,9 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, | |||
2243 | /* We still need to erase leftover OOB data */ | 2295 | /* We still need to erase leftover OOB data */ |
2244 | memset(chip->oob_poi, 0xff, mtd->oobsize); | 2296 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
2245 | } | 2297 | } |
2246 | 2298 | ret = chip->write_page(mtd, chip, column, bytes, wbuf, | |
2247 | ret = chip->write_page(mtd, chip, wbuf, oob_required, page, | 2299 | oob_required, page, cached, |
2248 | cached, (ops->mode == MTD_OPS_RAW)); | 2300 | (ops->mode == MTD_OPS_RAW)); |
2249 | if (ret) | 2301 | if (ret) |
2250 | break; | 2302 | break; |
2251 | 2303 | ||
@@ -2481,24 +2533,6 @@ static void single_erase_cmd(struct mtd_info *mtd, int page) | |||
2481 | } | 2533 | } |
2482 | 2534 | ||
2483 | /** | 2535 | /** |
2484 | * multi_erase_cmd - [GENERIC] AND specific block erase command function | ||
2485 | * @mtd: MTD device structure | ||
2486 | * @page: the page address of the block which will be erased | ||
2487 | * | ||
2488 | * AND multi block erase command function. Erase 4 consecutive blocks. | ||
2489 | */ | ||
2490 | static void multi_erase_cmd(struct mtd_info *mtd, int page) | ||
2491 | { | ||
2492 | struct nand_chip *chip = mtd->priv; | ||
2493 | /* Send commands to erase a block */ | ||
2494 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | ||
2495 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | ||
2496 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); | ||
2497 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | ||
2498 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | ||
2499 | } | ||
2500 | |||
2501 | /** | ||
2502 | * nand_erase - [MTD Interface] erase block(s) | 2536 | * nand_erase - [MTD Interface] erase block(s) |
2503 | * @mtd: MTD device structure | 2537 | * @mtd: MTD device structure |
2504 | * @instr: erase instruction | 2538 | * @instr: erase instruction |
@@ -2510,7 +2544,6 @@ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) | |||
2510 | return nand_erase_nand(mtd, instr, 0); | 2544 | return nand_erase_nand(mtd, instr, 0); |
2511 | } | 2545 | } |
2512 | 2546 | ||
2513 | #define BBT_PAGE_MASK 0xffffff3f | ||
2514 | /** | 2547 | /** |
2515 | * nand_erase_nand - [INTERN] erase block(s) | 2548 | * nand_erase_nand - [INTERN] erase block(s) |
2516 | * @mtd: MTD device structure | 2549 | * @mtd: MTD device structure |
@@ -2524,8 +2557,6 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, | |||
2524 | { | 2557 | { |
2525 | int page, status, pages_per_block, ret, chipnr; | 2558 | int page, status, pages_per_block, ret, chipnr; |
2526 | struct nand_chip *chip = mtd->priv; | 2559 | struct nand_chip *chip = mtd->priv; |
2527 | loff_t rewrite_bbt[NAND_MAX_CHIPS] = {0}; | ||
2528 | unsigned int bbt_masked_page = 0xffffffff; | ||
2529 | loff_t len; | 2560 | loff_t len; |
2530 | 2561 | ||
2531 | pr_debug("%s: start = 0x%012llx, len = %llu\n", | 2562 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
@@ -2556,15 +2587,6 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, | |||
2556 | goto erase_exit; | 2587 | goto erase_exit; |
2557 | } | 2588 | } |
2558 | 2589 | ||
2559 | /* | ||
2560 | * If BBT requires refresh, set the BBT page mask to see if the BBT | ||
2561 | * should be rewritten. Otherwise the mask is set to 0xffffffff which | ||
2562 | * can not be matched. This is also done when the bbt is actually | ||
2563 | * erased to avoid recursive updates. | ||
2564 | */ | ||
2565 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) | ||
2566 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; | ||
2567 | |||
2568 | /* Loop through the pages */ | 2590 | /* Loop through the pages */ |
2569 | len = instr->len; | 2591 | len = instr->len; |
2570 | 2592 | ||
@@ -2610,15 +2632,6 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, | |||
2610 | goto erase_exit; | 2632 | goto erase_exit; |
2611 | } | 2633 | } |
2612 | 2634 | ||
2613 | /* | ||
2614 | * If BBT requires refresh, set the BBT rewrite flag to the | ||
2615 | * page being erased. | ||
2616 | */ | ||
2617 | if (bbt_masked_page != 0xffffffff && | ||
2618 | (page & BBT_PAGE_MASK) == bbt_masked_page) | ||
2619 | rewrite_bbt[chipnr] = | ||
2620 | ((loff_t)page << chip->page_shift); | ||
2621 | |||
2622 | /* Increment page address and decrement length */ | 2635 | /* Increment page address and decrement length */ |
2623 | len -= (1 << chip->phys_erase_shift); | 2636 | len -= (1 << chip->phys_erase_shift); |
2624 | page += pages_per_block; | 2637 | page += pages_per_block; |
@@ -2628,15 +2641,6 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, | |||
2628 | chipnr++; | 2641 | chipnr++; |
2629 | chip->select_chip(mtd, -1); | 2642 | chip->select_chip(mtd, -1); |
2630 | chip->select_chip(mtd, chipnr); | 2643 | chip->select_chip(mtd, chipnr); |
2631 | |||
2632 | /* | ||
2633 | * If BBT requires refresh and BBT-PERCHIP, set the BBT | ||
2634 | * page mask to see if this BBT should be rewritten. | ||
2635 | */ | ||
2636 | if (bbt_masked_page != 0xffffffff && | ||
2637 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) | ||
2638 | bbt_masked_page = chip->bbt_td->pages[chipnr] & | ||
2639 | BBT_PAGE_MASK; | ||
2640 | } | 2644 | } |
2641 | } | 2645 | } |
2642 | instr->state = MTD_ERASE_DONE; | 2646 | instr->state = MTD_ERASE_DONE; |
@@ -2653,23 +2657,6 @@ erase_exit: | |||
2653 | if (!ret) | 2657 | if (!ret) |
2654 | mtd_erase_callback(instr); | 2658 | mtd_erase_callback(instr); |
2655 | 2659 | ||
2656 | /* | ||
2657 | * If BBT requires refresh and erase was successful, rewrite any | ||
2658 | * selected bad block tables. | ||
2659 | */ | ||
2660 | if (bbt_masked_page == 0xffffffff || ret) | ||
2661 | return ret; | ||
2662 | |||
2663 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { | ||
2664 | if (!rewrite_bbt[chipnr]) | ||
2665 | continue; | ||
2666 | /* Update the BBT for chip */ | ||
2667 | pr_debug("%s: nand_update_bbt (%d:0x%0llx 0x%0x)\n", | ||
2668 | __func__, chipnr, rewrite_bbt[chipnr], | ||
2669 | chip->bbt_td->pages[chipnr]); | ||
2670 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); | ||
2671 | } | ||
2672 | |||
2673 | /* Return more or less happy */ | 2660 | /* Return more or less happy */ |
2674 | return ret; | 2661 | return ret; |
2675 | } | 2662 | } |
@@ -2905,8 +2892,6 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, | |||
2905 | chip->onfi_version = 20; | 2892 | chip->onfi_version = 20; |
2906 | else if (val & (1 << 1)) | 2893 | else if (val & (1 << 1)) |
2907 | chip->onfi_version = 10; | 2894 | chip->onfi_version = 10; |
2908 | else | ||
2909 | chip->onfi_version = 0; | ||
2910 | 2895 | ||
2911 | if (!chip->onfi_version) { | 2896 | if (!chip->onfi_version) { |
2912 | pr_info("%s: unsupported ONFI version: %d\n", __func__, val); | 2897 | pr_info("%s: unsupported ONFI version: %d\n", __func__, val); |
@@ -3171,6 +3156,30 @@ static void nand_decode_bbm_options(struct mtd_info *mtd, | |||
3171 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; | 3156 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
3172 | } | 3157 | } |
3173 | 3158 | ||
3159 | static inline bool is_full_id_nand(struct nand_flash_dev *type) | ||
3160 | { | ||
3161 | return type->id_len; | ||
3162 | } | ||
3163 | |||
3164 | static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, | ||
3165 | struct nand_flash_dev *type, u8 *id_data, int *busw) | ||
3166 | { | ||
3167 | if (!strncmp(type->id, id_data, type->id_len)) { | ||
3168 | mtd->writesize = type->pagesize; | ||
3169 | mtd->erasesize = type->erasesize; | ||
3170 | mtd->oobsize = type->oobsize; | ||
3171 | |||
3172 | chip->cellinfo = id_data[2]; | ||
3173 | chip->chipsize = (uint64_t)type->chipsize << 20; | ||
3174 | chip->options |= type->options; | ||
3175 | |||
3176 | *busw = type->options & NAND_BUSWIDTH_16; | ||
3177 | |||
3178 | return true; | ||
3179 | } | ||
3180 | return false; | ||
3181 | } | ||
3182 | |||
3174 | /* | 3183 | /* |
3175 | * Get the flash and manufacturer id and lookup if the type is supported. | 3184 | * Get the flash and manufacturer id and lookup if the type is supported. |
3176 | */ | 3185 | */ |
@@ -3222,9 +3231,14 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, | |||
3222 | if (!type) | 3231 | if (!type) |
3223 | type = nand_flash_ids; | 3232 | type = nand_flash_ids; |
3224 | 3233 | ||
3225 | for (; type->name != NULL; type++) | 3234 | for (; type->name != NULL; type++) { |
3226 | if (*dev_id == type->id) | 3235 | if (is_full_id_nand(type)) { |
3227 | break; | 3236 | if (find_full_id_nand(mtd, chip, type, id_data, &busw)) |
3237 | goto ident_done; | ||
3238 | } else if (*dev_id == type->dev_id) { | ||
3239 | break; | ||
3240 | } | ||
3241 | } | ||
3228 | 3242 | ||
3229 | chip->onfi_version = 0; | 3243 | chip->onfi_version = 0; |
3230 | if (!type->name || !type->pagesize) { | 3244 | if (!type->name || !type->pagesize) { |
@@ -3302,12 +3316,7 @@ ident_done: | |||
3302 | } | 3316 | } |
3303 | 3317 | ||
3304 | chip->badblockbits = 8; | 3318 | chip->badblockbits = 8; |
3305 | 3319 | chip->erase_cmd = single_erase_cmd; | |
3306 | /* Check for AND chips with 4 page planes */ | ||
3307 | if (chip->options & NAND_4PAGE_ARRAY) | ||
3308 | chip->erase_cmd = multi_erase_cmd; | ||
3309 | else | ||
3310 | chip->erase_cmd = single_erase_cmd; | ||
3311 | 3320 | ||
3312 | /* Do not replace user supplied command function! */ | 3321 | /* Do not replace user supplied command function! */ |
3313 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) | 3322 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
@@ -3474,6 +3483,10 @@ int nand_scan_tail(struct mtd_info *mtd) | |||
3474 | chip->ecc.read_oob = nand_read_oob_std; | 3483 | chip->ecc.read_oob = nand_read_oob_std; |
3475 | if (!chip->ecc.write_oob) | 3484 | if (!chip->ecc.write_oob) |
3476 | chip->ecc.write_oob = nand_write_oob_std; | 3485 | chip->ecc.write_oob = nand_write_oob_std; |
3486 | if (!chip->ecc.read_subpage) | ||
3487 | chip->ecc.read_subpage = nand_read_subpage; | ||
3488 | if (!chip->ecc.write_subpage) | ||
3489 | chip->ecc.write_subpage = nand_write_subpage_hwecc; | ||
3477 | 3490 | ||
3478 | case NAND_ECC_HW_SYNDROME: | 3491 | case NAND_ECC_HW_SYNDROME: |
3479 | if ((!chip->ecc.calculate || !chip->ecc.correct || | 3492 | if ((!chip->ecc.calculate || !chip->ecc.correct || |
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 916d6e9c0ab1..267264320e06 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c | |||
@@ -1240,15 +1240,6 @@ int nand_update_bbt(struct mtd_info *mtd, loff_t offs) | |||
1240 | */ | 1240 | */ |
1241 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | 1241 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; |
1242 | 1242 | ||
1243 | static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 }; | ||
1244 | |||
1245 | static struct nand_bbt_descr agand_flashbased = { | ||
1246 | .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES, | ||
1247 | .offs = 0x20, | ||
1248 | .len = 6, | ||
1249 | .pattern = scan_agand_pattern | ||
1250 | }; | ||
1251 | |||
1252 | /* Generic flash bbt descriptors */ | 1243 | /* Generic flash bbt descriptors */ |
1253 | static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; | 1244 | static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; |
1254 | static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' }; | 1245 | static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' }; |
@@ -1333,22 +1324,6 @@ int nand_default_bbt(struct mtd_info *mtd) | |||
1333 | { | 1324 | { |
1334 | struct nand_chip *this = mtd->priv; | 1325 | struct nand_chip *this = mtd->priv; |
1335 | 1326 | ||
1336 | /* | ||
1337 | * Default for AG-AND. We must use a flash based bad block table as the | ||
1338 | * devices have factory marked _good_ blocks. Erasing those blocks | ||
1339 | * leads to loss of the good / bad information, so we _must_ store this | ||
1340 | * information in a good / bad table during startup. | ||
1341 | */ | ||
1342 | if (this->options & NAND_IS_AND) { | ||
1343 | /* Use the default pattern descriptors */ | ||
1344 | if (!this->bbt_td) { | ||
1345 | this->bbt_td = &bbt_main_descr; | ||
1346 | this->bbt_md = &bbt_mirror_descr; | ||
1347 | } | ||
1348 | this->bbt_options |= NAND_BBT_USE_FLASH; | ||
1349 | return nand_scan_bbt(mtd, &agand_flashbased); | ||
1350 | } | ||
1351 | |||
1352 | /* Is a flash based bad block table requested? */ | 1327 | /* Is a flash based bad block table requested? */ |
1353 | if (this->bbt_options & NAND_BBT_USE_FLASH) { | 1328 | if (this->bbt_options & NAND_BBT_USE_FLASH) { |
1354 | /* Use the default pattern descriptors */ | 1329 | /* Use the default pattern descriptors */ |
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 9c612388e5de..683813a46a90 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c | |||
@@ -10,163 +10,153 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/mtd/nand.h> | 12 | #include <linux/mtd/nand.h> |
13 | /* | 13 | #include <linux/sizes.h> |
14 | * Chip ID list | 14 | |
15 | * | 15 | #define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS |
16 | * Name. ID code, pagesize, chipsize in MegaByte, eraseblock size, | 16 | #define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16) |
17 | * options | 17 | |
18 | * | ||
19 | * Pagesize; 0, 256, 512 | ||
20 | * 0 get this information from the extended chip ID | ||
21 | + 256 256 Byte page size | ||
22 | * 512 512 Byte page size | ||
23 | */ | ||
24 | struct nand_flash_dev nand_flash_ids[] = { | ||
25 | #define SP_OPTIONS NAND_NEED_READRDY | 18 | #define SP_OPTIONS NAND_NEED_READRDY |
26 | #define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16) | 19 | #define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16) |
27 | 20 | ||
28 | #ifdef CONFIG_MTD_NAND_MUSEUM_IDS | 21 | /* |
29 | {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS}, | 22 | * The chip ID list: |
30 | {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS}, | 23 | * name, device ID, page size, chip size in MiB, eraseblock size, options |
31 | {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, SP_OPTIONS}, | 24 | * |
32 | {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, SP_OPTIONS}, | 25 | * If page size and eraseblock size are 0, the sizes are taken from the |
33 | {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, SP_OPTIONS}, | 26 | * extended chip ID. |
34 | {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, SP_OPTIONS}, | 27 | */ |
35 | {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, SP_OPTIONS}, | 28 | struct nand_flash_dev nand_flash_ids[] = { |
36 | {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, SP_OPTIONS}, | 29 | /* |
37 | {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, SP_OPTIONS}, | 30 | * Some incompatible NAND chips share device ID's and so must be |
38 | {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, SP_OPTIONS}, | 31 | * listed by full ID. We list them first so that we can easily identify |
39 | 32 | * the most specific match. | |
40 | {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, SP_OPTIONS}, | 33 | */ |
41 | {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, SP_OPTIONS}, | 34 | {"TC58NVG2S0F 4G 3.3V 8-bit", |
42 | {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, SP_OPTIONS16}, | 35 | { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} }, |
43 | {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, SP_OPTIONS16}, | 36 | SZ_4K, SZ_512, SZ_256K, 0, 8, 224}, |
44 | #endif | 37 | {"TC58NVG3S0F 8G 3.3V 8-bit", |
45 | 38 | { .id = {0x98, 0xd3, 0x90, 0x26, 0x76, 0x15, 0x02, 0x08} }, | |
46 | {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, SP_OPTIONS}, | 39 | SZ_4K, SZ_1K, SZ_256K, 0, 8, 232}, |
47 | {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, SP_OPTIONS}, | 40 | {"TC58NVG5D2 32G 3.3V 8-bit", |
48 | {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, SP_OPTIONS16}, | 41 | { .id = {0x98, 0xd7, 0x94, 0x32, 0x76, 0x56, 0x09, 0x00} }, |
49 | {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, SP_OPTIONS16}, | 42 | SZ_8K, SZ_4K, SZ_1M, 0, 8, 640}, |
50 | 43 | {"TC58NVG6D2 64G 3.3V 8-bit", | |
51 | {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, SP_OPTIONS}, | 44 | { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} }, |
52 | {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, SP_OPTIONS}, | 45 | SZ_8K, SZ_8K, SZ_2M, 0, 8, 640}, |
53 | {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, SP_OPTIONS16}, | 46 | |
54 | {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, SP_OPTIONS16}, | 47 | LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), |
55 | 48 | LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), | |
56 | {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, SP_OPTIONS}, | 49 | LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS), |
57 | {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, SP_OPTIONS}, | 50 | LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, SZ_8K, SP_OPTIONS), |
58 | {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, SP_OPTIONS16}, | 51 | LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, SZ_8K, SP_OPTIONS), |
59 | {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, SP_OPTIONS16}, | 52 | |
60 | 53 | LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit", 0x33, 16, SZ_16K, SP_OPTIONS), | |
61 | {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, SP_OPTIONS}, | 54 | LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit", 0x73, 16, SZ_16K, SP_OPTIONS), |
62 | {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, SP_OPTIONS}, | 55 | LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 16, SZ_16K, SP_OPTIONS16), |
63 | {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, SP_OPTIONS}, | 56 | LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 16, SZ_16K, SP_OPTIONS16), |
64 | {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, SP_OPTIONS16}, | 57 | |
65 | {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, SP_OPTIONS16}, | 58 | LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit", 0x35, 32, SZ_16K, SP_OPTIONS), |
66 | {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, SP_OPTIONS16}, | 59 | LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit", 0x75, 32, SZ_16K, SP_OPTIONS), |
67 | {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, SP_OPTIONS16}, | 60 | LEGACY_ID_NAND("NAND 32MiB 1,8V 16-bit", 0x45, 32, SZ_16K, SP_OPTIONS16), |
68 | 61 | LEGACY_ID_NAND("NAND 32MiB 3,3V 16-bit", 0x55, 32, SZ_16K, SP_OPTIONS16), | |
69 | {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS}, | 62 | |
63 | LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit", 0x36, 64, SZ_16K, SP_OPTIONS), | ||
64 | LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit", 0x76, 64, SZ_16K, SP_OPTIONS), | ||
65 | LEGACY_ID_NAND("NAND 64MiB 1,8V 16-bit", 0x46, 64, SZ_16K, SP_OPTIONS16), | ||
66 | LEGACY_ID_NAND("NAND 64MiB 3,3V 16-bit", 0x56, 64, SZ_16K, SP_OPTIONS16), | ||
67 | |||
68 | LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x78, 128, SZ_16K, SP_OPTIONS), | ||
69 | LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x39, 128, SZ_16K, SP_OPTIONS), | ||
70 | LEGACY_ID_NAND("NAND 128MiB 3,3V 8-bit", 0x79, 128, SZ_16K, SP_OPTIONS), | ||
71 | LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x72, 128, SZ_16K, SP_OPTIONS16), | ||
72 | LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x49, 128, SZ_16K, SP_OPTIONS16), | ||
73 | LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x74, 128, SZ_16K, SP_OPTIONS16), | ||
74 | LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x59, 128, SZ_16K, SP_OPTIONS16), | ||
75 | |||
76 | LEGACY_ID_NAND("NAND 256MiB 3,3V 8-bit", 0x71, 256, SZ_16K, SP_OPTIONS), | ||
70 | 77 | ||
71 | /* | 78 | /* |
72 | * These are the new chips with large page size. The pagesize and the | 79 | * These are the new chips with large page size. Their page size and |
73 | * erasesize is determined from the extended id bytes | 80 | * eraseblock size are determined from the extended ID bytes. |
74 | */ | 81 | */ |
75 | #define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS | ||
76 | #define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16) | ||
77 | 82 | ||
78 | /* 512 Megabit */ | 83 | /* 512 Megabit */ |
79 | {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS}, | 84 | EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA2, 64, LP_OPTIONS), |
80 | {"NAND 64MiB 1,8V 8-bit", 0xA0, 0, 64, 0, LP_OPTIONS}, | 85 | EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA0, 64, LP_OPTIONS), |
81 | {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS}, | 86 | EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF2, 64, LP_OPTIONS), |
82 | {"NAND 64MiB 3,3V 8-bit", 0xD0, 0, 64, 0, LP_OPTIONS}, | 87 | EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xD0, 64, LP_OPTIONS), |
83 | {"NAND 64MiB 3,3V 8-bit", 0xF0, 0, 64, 0, LP_OPTIONS}, | 88 | EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF0, 64, LP_OPTIONS), |
84 | {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16}, | 89 | EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB2, 64, LP_OPTIONS16), |
85 | {"NAND 64MiB 1,8V 16-bit", 0xB0, 0, 64, 0, LP_OPTIONS16}, | 90 | EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB0, 64, LP_OPTIONS16), |
86 | {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16}, | 91 | EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC2, 64, LP_OPTIONS16), |
87 | {"NAND 64MiB 3,3V 16-bit", 0xC0, 0, 64, 0, LP_OPTIONS16}, | 92 | EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC0, 64, LP_OPTIONS16), |
88 | 93 | ||
89 | /* 1 Gigabit */ | 94 | /* 1 Gigabit */ |
90 | {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS}, | 95 | EXTENDED_ID_NAND("NAND 128MiB 1,8V 8-bit", 0xA1, 128, LP_OPTIONS), |
91 | {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS}, | 96 | EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xF1, 128, LP_OPTIONS), |
92 | {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, | 97 | EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xD1, 128, LP_OPTIONS), |
93 | {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, | 98 | EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xB1, 128, LP_OPTIONS16), |
94 | {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16}, | 99 | EXTENDED_ID_NAND("NAND 128MiB 3,3V 16-bit", 0xC1, 128, LP_OPTIONS16), |
95 | {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16}, | 100 | EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xAD, 128, LP_OPTIONS16), |
96 | 101 | ||
97 | /* 2 Gigabit */ | 102 | /* 2 Gigabit */ |
98 | {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS}, | 103 | EXTENDED_ID_NAND("NAND 256MiB 1,8V 8-bit", 0xAA, 256, LP_OPTIONS), |
99 | {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS}, | 104 | EXTENDED_ID_NAND("NAND 256MiB 3,3V 8-bit", 0xDA, 256, LP_OPTIONS), |
100 | {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16}, | 105 | EXTENDED_ID_NAND("NAND 256MiB 1,8V 16-bit", 0xBA, 256, LP_OPTIONS16), |
101 | {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16}, | 106 | EXTENDED_ID_NAND("NAND 256MiB 3,3V 16-bit", 0xCA, 256, LP_OPTIONS16), |
102 | 107 | ||
103 | /* 4 Gigabit */ | 108 | /* 4 Gigabit */ |
104 | {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS}, | 109 | EXTENDED_ID_NAND("NAND 512MiB 1,8V 8-bit", 0xAC, 512, LP_OPTIONS), |
105 | {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS}, | 110 | EXTENDED_ID_NAND("NAND 512MiB 3,3V 8-bit", 0xDC, 512, LP_OPTIONS), |
106 | {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16}, | 111 | EXTENDED_ID_NAND("NAND 512MiB 1,8V 16-bit", 0xBC, 512, LP_OPTIONS16), |
107 | {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16}, | 112 | EXTENDED_ID_NAND("NAND 512MiB 3,3V 16-bit", 0xCC, 512, LP_OPTIONS16), |
108 | 113 | ||
109 | /* 8 Gigabit */ | 114 | /* 8 Gigabit */ |
110 | {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS}, | 115 | EXTENDED_ID_NAND("NAND 1GiB 1,8V 8-bit", 0xA3, 1024, LP_OPTIONS), |
111 | {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS}, | 116 | EXTENDED_ID_NAND("NAND 1GiB 3,3V 8-bit", 0xD3, 1024, LP_OPTIONS), |
112 | {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16}, | 117 | EXTENDED_ID_NAND("NAND 1GiB 1,8V 16-bit", 0xB3, 1024, LP_OPTIONS16), |
113 | {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16}, | 118 | EXTENDED_ID_NAND("NAND 1GiB 3,3V 16-bit", 0xC3, 1024, LP_OPTIONS16), |
114 | 119 | ||
115 | /* 16 Gigabit */ | 120 | /* 16 Gigabit */ |
116 | {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS}, | 121 | EXTENDED_ID_NAND("NAND 2GiB 1,8V 8-bit", 0xA5, 2048, LP_OPTIONS), |
117 | {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS}, | 122 | EXTENDED_ID_NAND("NAND 2GiB 3,3V 8-bit", 0xD5, 2048, LP_OPTIONS), |
118 | {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, | 123 | EXTENDED_ID_NAND("NAND 2GiB 1,8V 16-bit", 0xB5, 2048, LP_OPTIONS16), |
119 | {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, | 124 | EXTENDED_ID_NAND("NAND 2GiB 3,3V 16-bit", 0xC5, 2048, LP_OPTIONS16), |
120 | 125 | ||
121 | /* 32 Gigabit */ | 126 | /* 32 Gigabit */ |
122 | {"NAND 4GiB 1,8V 8-bit", 0xA7, 0, 4096, 0, LP_OPTIONS}, | 127 | EXTENDED_ID_NAND("NAND 4GiB 1,8V 8-bit", 0xA7, 4096, LP_OPTIONS), |
123 | {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS}, | 128 | EXTENDED_ID_NAND("NAND 4GiB 3,3V 8-bit", 0xD7, 4096, LP_OPTIONS), |
124 | {"NAND 4GiB 1,8V 16-bit", 0xB7, 0, 4096, 0, LP_OPTIONS16}, | 129 | EXTENDED_ID_NAND("NAND 4GiB 1,8V 16-bit", 0xB7, 4096, LP_OPTIONS16), |
125 | {"NAND 4GiB 3,3V 16-bit", 0xC7, 0, 4096, 0, LP_OPTIONS16}, | 130 | EXTENDED_ID_NAND("NAND 4GiB 3,3V 16-bit", 0xC7, 4096, LP_OPTIONS16), |
126 | 131 | ||
127 | /* 64 Gigabit */ | 132 | /* 64 Gigabit */ |
128 | {"NAND 8GiB 1,8V 8-bit", 0xAE, 0, 8192, 0, LP_OPTIONS}, | 133 | EXTENDED_ID_NAND("NAND 8GiB 1,8V 8-bit", 0xAE, 8192, LP_OPTIONS), |
129 | {"NAND 8GiB 3,3V 8-bit", 0xDE, 0, 8192, 0, LP_OPTIONS}, | 134 | EXTENDED_ID_NAND("NAND 8GiB 3,3V 8-bit", 0xDE, 8192, LP_OPTIONS), |
130 | {"NAND 8GiB 1,8V 16-bit", 0xBE, 0, 8192, 0, LP_OPTIONS16}, | 135 | EXTENDED_ID_NAND("NAND 8GiB 1,8V 16-bit", 0xBE, 8192, LP_OPTIONS16), |
131 | {"NAND 8GiB 3,3V 16-bit", 0xCE, 0, 8192, 0, LP_OPTIONS16}, | 136 | EXTENDED_ID_NAND("NAND 8GiB 3,3V 16-bit", 0xCE, 8192, LP_OPTIONS16), |
132 | 137 | ||
133 | /* 128 Gigabit */ | 138 | /* 128 Gigabit */ |
134 | {"NAND 16GiB 1,8V 8-bit", 0x1A, 0, 16384, 0, LP_OPTIONS}, | 139 | EXTENDED_ID_NAND("NAND 16GiB 1,8V 8-bit", 0x1A, 16384, LP_OPTIONS), |
135 | {"NAND 16GiB 3,3V 8-bit", 0x3A, 0, 16384, 0, LP_OPTIONS}, | 140 | EXTENDED_ID_NAND("NAND 16GiB 3,3V 8-bit", 0x3A, 16384, LP_OPTIONS), |
136 | {"NAND 16GiB 1,8V 16-bit", 0x2A, 0, 16384, 0, LP_OPTIONS16}, | 141 | EXTENDED_ID_NAND("NAND 16GiB 1,8V 16-bit", 0x2A, 16384, LP_OPTIONS16), |
137 | {"NAND 16GiB 3,3V 16-bit", 0x4A, 0, 16384, 0, LP_OPTIONS16}, | 142 | EXTENDED_ID_NAND("NAND 16GiB 3,3V 16-bit", 0x4A, 16384, LP_OPTIONS16), |
138 | 143 | ||
139 | /* 256 Gigabit */ | 144 | /* 256 Gigabit */ |
140 | {"NAND 32GiB 1,8V 8-bit", 0x1C, 0, 32768, 0, LP_OPTIONS}, | 145 | EXTENDED_ID_NAND("NAND 32GiB 1,8V 8-bit", 0x1C, 32768, LP_OPTIONS), |
141 | {"NAND 32GiB 3,3V 8-bit", 0x3C, 0, 32768, 0, LP_OPTIONS}, | 146 | EXTENDED_ID_NAND("NAND 32GiB 3,3V 8-bit", 0x3C, 32768, LP_OPTIONS), |
142 | {"NAND 32GiB 1,8V 16-bit", 0x2C, 0, 32768, 0, LP_OPTIONS16}, | 147 | EXTENDED_ID_NAND("NAND 32GiB 1,8V 16-bit", 0x2C, 32768, LP_OPTIONS16), |
143 | {"NAND 32GiB 3,3V 16-bit", 0x4C, 0, 32768, 0, LP_OPTIONS16}, | 148 | EXTENDED_ID_NAND("NAND 32GiB 3,3V 16-bit", 0x4C, 32768, LP_OPTIONS16), |
144 | 149 | ||
145 | /* 512 Gigabit */ | 150 | /* 512 Gigabit */ |
146 | {"NAND 64GiB 1,8V 8-bit", 0x1E, 0, 65536, 0, LP_OPTIONS}, | 151 | EXTENDED_ID_NAND("NAND 64GiB 1,8V 8-bit", 0x1E, 65536, LP_OPTIONS), |
147 | {"NAND 64GiB 3,3V 8-bit", 0x3E, 0, 65536, 0, LP_OPTIONS}, | 152 | EXTENDED_ID_NAND("NAND 64GiB 3,3V 8-bit", 0x3E, 65536, LP_OPTIONS), |
148 | {"NAND 64GiB 1,8V 16-bit", 0x2E, 0, 65536, 0, LP_OPTIONS16}, | 153 | EXTENDED_ID_NAND("NAND 64GiB 1,8V 16-bit", 0x2E, 65536, LP_OPTIONS16), |
149 | {"NAND 64GiB 3,3V 16-bit", 0x4E, 0, 65536, 0, LP_OPTIONS16}, | 154 | EXTENDED_ID_NAND("NAND 64GiB 3,3V 16-bit", 0x4E, 65536, LP_OPTIONS16), |
150 | 155 | ||
151 | /* | 156 | {NULL} |
152 | * Renesas AND 1 Gigabit. Those chips do not support extended id and | ||
153 | * have a strange page/block layout ! The chosen minimum erasesize is | ||
154 | * 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page | ||
155 | * planes 1 block = 2 pages, but due to plane arrangement the blocks | ||
156 | * 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7 Anyway JFFS2 would | ||
157 | * increase the eraseblock size so we chose a combined one which can be | ||
158 | * erased in one go There are more speed improvements for reads and | ||
159 | * writes possible, but not implemented now | ||
160 | */ | ||
161 | {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, | ||
162 | NAND_IS_AND | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH}, | ||
163 | |||
164 | {NULL,} | ||
165 | }; | 157 | }; |
166 | 158 | ||
167 | /* | 159 | /* Manufacturer IDs */ |
168 | * Manufacturer ID list | ||
169 | */ | ||
170 | struct nand_manufacturers nand_manuf_ids[] = { | 160 | struct nand_manufacturers nand_manuf_ids[] = { |
171 | {NAND_MFR_TOSHIBA, "Toshiba"}, | 161 | {NAND_MFR_TOSHIBA, "Toshiba"}, |
172 | {NAND_MFR_SAMSUNG, "Samsung"}, | 162 | {NAND_MFR_SAMSUNG, "Samsung"}, |
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c index 891c52a30e6a..cb38f3d94218 100644 --- a/drivers/mtd/nand/nandsim.c +++ b/drivers/mtd/nand/nandsim.c | |||
@@ -218,7 +218,6 @@ MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should " | |||
218 | #define STATE_CMD_READOOB 0x00000005 /* read OOB area */ | 218 | #define STATE_CMD_READOOB 0x00000005 /* read OOB area */ |
219 | #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ | 219 | #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ |
220 | #define STATE_CMD_STATUS 0x00000007 /* read status */ | 220 | #define STATE_CMD_STATUS 0x00000007 /* read status */ |
221 | #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */ | ||
222 | #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */ | 221 | #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */ |
223 | #define STATE_CMD_READID 0x0000000A /* read ID */ | 222 | #define STATE_CMD_READID 0x0000000A /* read ID */ |
224 | #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ | 223 | #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ |
@@ -263,14 +262,13 @@ MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should " | |||
263 | #define NS_OPER_STATES 6 /* Maximum number of states in operation */ | 262 | #define NS_OPER_STATES 6 /* Maximum number of states in operation */ |
264 | 263 | ||
265 | #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ | 264 | #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */ |
266 | #define OPT_PAGE256 0x00000001 /* 256-byte page chips */ | ||
267 | #define OPT_PAGE512 0x00000002 /* 512-byte page chips */ | 265 | #define OPT_PAGE512 0x00000002 /* 512-byte page chips */ |
268 | #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ | 266 | #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ |
269 | #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ | 267 | #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ |
270 | #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ | 268 | #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ |
271 | #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ | 269 | #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ |
272 | #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ | 270 | #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ |
273 | #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */ | 271 | #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */ |
274 | 272 | ||
275 | /* Remove action bits from state */ | 273 | /* Remove action bits from state */ |
276 | #define NS_STATE(x) ((x) & ~ACTION_MASK) | 274 | #define NS_STATE(x) ((x) & ~ACTION_MASK) |
@@ -406,8 +404,6 @@ static struct nandsim_operations { | |||
406 | {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}}, | 404 | {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}}, |
407 | /* Read status */ | 405 | /* Read status */ |
408 | {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}}, | 406 | {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}}, |
409 | /* Read multi-plane status */ | ||
410 | {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}}, | ||
411 | /* Read ID */ | 407 | /* Read ID */ |
412 | {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, | 408 | {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}}, |
413 | /* Large page devices read page */ | 409 | /* Large page devices read page */ |
@@ -699,10 +695,7 @@ static int init_nandsim(struct mtd_info *mtd) | |||
699 | ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec; | 695 | ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec; |
700 | ns->options = 0; | 696 | ns->options = 0; |
701 | 697 | ||
702 | if (ns->geom.pgsz == 256) { | 698 | if (ns->geom.pgsz == 512) { |
703 | ns->options |= OPT_PAGE256; | ||
704 | } | ||
705 | else if (ns->geom.pgsz == 512) { | ||
706 | ns->options |= OPT_PAGE512; | 699 | ns->options |= OPT_PAGE512; |
707 | if (ns->busw == 8) | 700 | if (ns->busw == 8) |
708 | ns->options |= OPT_PAGE512_8BIT; | 701 | ns->options |= OPT_PAGE512_8BIT; |
@@ -769,9 +762,9 @@ static int init_nandsim(struct mtd_info *mtd) | |||
769 | } | 762 | } |
770 | 763 | ||
771 | /* Detect how many ID bytes the NAND chip outputs */ | 764 | /* Detect how many ID bytes the NAND chip outputs */ |
772 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { | 765 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
773 | if (second_id_byte != nand_flash_ids[i].id) | 766 | if (second_id_byte != nand_flash_ids[i].dev_id) |
774 | continue; | 767 | continue; |
775 | } | 768 | } |
776 | 769 | ||
777 | if (ns->busw == 16) | 770 | if (ns->busw == 16) |
@@ -1079,8 +1072,6 @@ static char *get_state_name(uint32_t state) | |||
1079 | return "STATE_CMD_ERASE1"; | 1072 | return "STATE_CMD_ERASE1"; |
1080 | case STATE_CMD_STATUS: | 1073 | case STATE_CMD_STATUS: |
1081 | return "STATE_CMD_STATUS"; | 1074 | return "STATE_CMD_STATUS"; |
1082 | case STATE_CMD_STATUS_M: | ||
1083 | return "STATE_CMD_STATUS_M"; | ||
1084 | case STATE_CMD_SEQIN: | 1075 | case STATE_CMD_SEQIN: |
1085 | return "STATE_CMD_SEQIN"; | 1076 | return "STATE_CMD_SEQIN"; |
1086 | case STATE_CMD_READID: | 1077 | case STATE_CMD_READID: |
@@ -1145,7 +1136,6 @@ static int check_command(int cmd) | |||
1145 | case NAND_CMD_RNDOUTSTART: | 1136 | case NAND_CMD_RNDOUTSTART: |
1146 | return 0; | 1137 | return 0; |
1147 | 1138 | ||
1148 | case NAND_CMD_STATUS_MULTI: | ||
1149 | default: | 1139 | default: |
1150 | return 1; | 1140 | return 1; |
1151 | } | 1141 | } |
@@ -1171,8 +1161,6 @@ static uint32_t get_state_by_command(unsigned command) | |||
1171 | return STATE_CMD_ERASE1; | 1161 | return STATE_CMD_ERASE1; |
1172 | case NAND_CMD_STATUS: | 1162 | case NAND_CMD_STATUS: |
1173 | return STATE_CMD_STATUS; | 1163 | return STATE_CMD_STATUS; |
1174 | case NAND_CMD_STATUS_MULTI: | ||
1175 | return STATE_CMD_STATUS_M; | ||
1176 | case NAND_CMD_SEQIN: | 1164 | case NAND_CMD_SEQIN: |
1177 | return STATE_CMD_SEQIN; | 1165 | return STATE_CMD_SEQIN; |
1178 | case NAND_CMD_READID: | 1166 | case NAND_CMD_READID: |
@@ -2306,7 +2294,7 @@ static int __init ns_init_module(void) | |||
2306 | nand->geom.idbytes = 2; | 2294 | nand->geom.idbytes = 2; |
2307 | nand->regs.status = NS_STATUS_OK(nand); | 2295 | nand->regs.status = NS_STATUS_OK(nand); |
2308 | nand->nxstate = STATE_UNKNOWN; | 2296 | nand->nxstate = STATE_UNKNOWN; |
2309 | nand->options |= OPT_PAGE256; /* temporary value */ | 2297 | nand->options |= OPT_PAGE512; /* temporary value */ |
2310 | nand->ids[0] = first_id_byte; | 2298 | nand->ids[0] = first_id_byte; |
2311 | nand->ids[1] = second_id_byte; | 2299 | nand->ids[1] = second_id_byte; |
2312 | nand->ids[2] = third_id_byte; | 2300 | nand->ids[2] = third_id_byte; |
diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c index a6191198d259..cd6be2ed53a8 100644 --- a/drivers/mtd/nand/nuc900_nand.c +++ b/drivers/mtd/nand/nuc900_nand.c | |||
@@ -177,15 +177,6 @@ static void nuc900_nand_command_lp(struct mtd_info *mtd, unsigned int command, | |||
177 | case NAND_CMD_SEQIN: | 177 | case NAND_CMD_SEQIN: |
178 | case NAND_CMD_RNDIN: | 178 | case NAND_CMD_RNDIN: |
179 | case NAND_CMD_STATUS: | 179 | case NAND_CMD_STATUS: |
180 | case NAND_CMD_DEPLETE1: | ||
181 | return; | ||
182 | |||
183 | case NAND_CMD_STATUS_ERROR: | ||
184 | case NAND_CMD_STATUS_ERROR0: | ||
185 | case NAND_CMD_STATUS_ERROR1: | ||
186 | case NAND_CMD_STATUS_ERROR2: | ||
187 | case NAND_CMD_STATUS_ERROR3: | ||
188 | udelay(chip->chip_delay); | ||
189 | return; | 180 | return; |
190 | 181 | ||
191 | case NAND_CMD_RESET: | 182 | case NAND_CMD_RESET: |
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 8e820ddf4e08..81b80af55872 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c | |||
@@ -1023,9 +1023,9 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip) | |||
1023 | int status, state = this->state; | 1023 | int status, state = this->state; |
1024 | 1024 | ||
1025 | if (state == FL_ERASING) | 1025 | if (state == FL_ERASING) |
1026 | timeo += (HZ * 400) / 1000; | 1026 | timeo += msecs_to_jiffies(400); |
1027 | else | 1027 | else |
1028 | timeo += (HZ * 20) / 1000; | 1028 | timeo += msecs_to_jiffies(20); |
1029 | 1029 | ||
1030 | writeb(NAND_CMD_STATUS & 0xFF, info->reg.gpmc_nand_command); | 1030 | writeb(NAND_CMD_STATUS & 0xFF, info->reg.gpmc_nand_command); |
1031 | while (time_before(jiffies, timeo)) { | 1031 | while (time_before(jiffies, timeo)) { |
@@ -1701,8 +1701,9 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt) | |||
1701 | elm_node = of_find_node_by_phandle(be32_to_cpup(parp)); | 1701 | elm_node = of_find_node_by_phandle(be32_to_cpup(parp)); |
1702 | pdev = of_find_device_by_node(elm_node); | 1702 | pdev = of_find_device_by_node(elm_node); |
1703 | info->elm_dev = &pdev->dev; | 1703 | info->elm_dev = &pdev->dev; |
1704 | elm_config(info->elm_dev, bch_type); | 1704 | |
1705 | info->is_elm_used = true; | 1705 | if (elm_config(info->elm_dev, bch_type) == 0) |
1706 | info->is_elm_used = true; | ||
1706 | } | 1707 | } |
1707 | 1708 | ||
1708 | if (info->is_elm_used && (mtd->writesize <= 4096)) { | 1709 | if (info->is_elm_used && (mtd->writesize <= 4096)) { |
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index cd72b9299f6b..8fbd00208610 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c | |||
@@ -231,18 +231,7 @@ static struct platform_driver orion_nand_driver = { | |||
231 | }, | 231 | }, |
232 | }; | 232 | }; |
233 | 233 | ||
234 | static int __init orion_nand_init(void) | 234 | module_platform_driver_probe(orion_nand_driver, orion_nand_probe); |
235 | { | ||
236 | return platform_driver_probe(&orion_nand_driver, orion_nand_probe); | ||
237 | } | ||
238 | |||
239 | static void __exit orion_nand_exit(void) | ||
240 | { | ||
241 | platform_driver_unregister(&orion_nand_driver); | ||
242 | } | ||
243 | |||
244 | module_init(orion_nand_init); | ||
245 | module_exit(orion_nand_exit); | ||
246 | 235 | ||
247 | MODULE_LICENSE("GPL"); | 236 | MODULE_LICENSE("GPL"); |
248 | MODULE_AUTHOR("Tzachi Perelstein"); | 237 | MODULE_AUTHOR("Tzachi Perelstein"); |
diff --git a/drivers/mtd/nand/ppchameleonevb.c b/drivers/mtd/nand/ppchameleonevb.c deleted file mode 100644 index 0ddd90e5788f..000000000000 --- a/drivers/mtd/nand/ppchameleonevb.c +++ /dev/null | |||
@@ -1,403 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/mtd/nand/ppchameleonevb.c | ||
3 | * | ||
4 | * Copyright (C) 2003 DAVE Srl (info@wawnet.biz) | ||
5 | * | ||
6 | * Derived from drivers/mtd/nand/edb7312.c | ||
7 | * | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * Overview: | ||
14 | * This is a device driver for the NAND flash devices found on the | ||
15 | * PPChameleon/PPChameleonEVB system. | ||
16 | * PPChameleon options (autodetected): | ||
17 | * - BA model: no NAND | ||
18 | * - ME model: 32MB (Samsung K9F5608U0B) | ||
19 | * - HI model: 128MB (Samsung K9F1G08UOM) | ||
20 | * PPChameleonEVB options: | ||
21 | * - 32MB (Samsung K9F5608U0B) | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/module.h> | ||
27 | #include <linux/mtd/mtd.h> | ||
28 | #include <linux/mtd/nand.h> | ||
29 | #include <linux/mtd/partitions.h> | ||
30 | #include <asm/io.h> | ||
31 | #include <platforms/PPChameleonEVB.h> | ||
32 | |||
33 | #undef USE_READY_BUSY_PIN | ||
34 | #define USE_READY_BUSY_PIN | ||
35 | /* see datasheets (tR) */ | ||
36 | #define NAND_BIG_DELAY_US 25 | ||
37 | #define NAND_SMALL_DELAY_US 10 | ||
38 | |||
39 | /* handy sizes */ | ||
40 | #define SZ_4M 0x00400000 | ||
41 | #define NAND_SMALL_SIZE 0x02000000 | ||
42 | #define NAND_MTD_NAME "ppchameleon-nand" | ||
43 | #define NAND_EVB_MTD_NAME "ppchameleonevb-nand" | ||
44 | |||
45 | /* GPIO pins used to drive NAND chip mounted on processor module */ | ||
46 | #define NAND_nCE_GPIO_PIN (0x80000000 >> 1) | ||
47 | #define NAND_CLE_GPIO_PIN (0x80000000 >> 2) | ||
48 | #define NAND_ALE_GPIO_PIN (0x80000000 >> 3) | ||
49 | #define NAND_RB_GPIO_PIN (0x80000000 >> 4) | ||
50 | /* GPIO pins used to drive NAND chip mounted on EVB */ | ||
51 | #define NAND_EVB_nCE_GPIO_PIN (0x80000000 >> 14) | ||
52 | #define NAND_EVB_CLE_GPIO_PIN (0x80000000 >> 15) | ||
53 | #define NAND_EVB_ALE_GPIO_PIN (0x80000000 >> 16) | ||
54 | #define NAND_EVB_RB_GPIO_PIN (0x80000000 >> 31) | ||
55 | |||
56 | /* | ||
57 | * MTD structure for PPChameleonEVB board | ||
58 | */ | ||
59 | static struct mtd_info *ppchameleon_mtd = NULL; | ||
60 | static struct mtd_info *ppchameleonevb_mtd = NULL; | ||
61 | |||
62 | /* | ||
63 | * Module stuff | ||
64 | */ | ||
65 | static unsigned long ppchameleon_fio_pbase = CFG_NAND0_PADDR; | ||
66 | static unsigned long ppchameleonevb_fio_pbase = CFG_NAND1_PADDR; | ||
67 | |||
68 | #ifdef MODULE | ||
69 | module_param(ppchameleon_fio_pbase, ulong, 0); | ||
70 | module_param(ppchameleonevb_fio_pbase, ulong, 0); | ||
71 | #else | ||
72 | __setup("ppchameleon_fio_pbase=", ppchameleon_fio_pbase); | ||
73 | __setup("ppchameleonevb_fio_pbase=", ppchameleonevb_fio_pbase); | ||
74 | #endif | ||
75 | |||
76 | /* | ||
77 | * Define static partitions for flash devices | ||
78 | */ | ||
79 | static struct mtd_partition partition_info_hi[] = { | ||
80 | { .name = "PPChameleon HI Nand Flash", | ||
81 | .offset = 0, | ||
82 | .size = 128 * 1024 * 1024 | ||
83 | } | ||
84 | }; | ||
85 | |||
86 | static struct mtd_partition partition_info_me[] = { | ||
87 | { .name = "PPChameleon ME Nand Flash", | ||
88 | .offset = 0, | ||
89 | .size = 32 * 1024 * 1024 | ||
90 | } | ||
91 | }; | ||
92 | |||
93 | static struct mtd_partition partition_info_evb[] = { | ||
94 | { .name = "PPChameleonEVB Nand Flash", | ||
95 | .offset = 0, | ||
96 | .size = 32 * 1024 * 1024 | ||
97 | } | ||
98 | }; | ||
99 | |||
100 | #define NUM_PARTITIONS 1 | ||
101 | |||
102 | /* | ||
103 | * hardware specific access to control-lines | ||
104 | */ | ||
105 | static void ppchameleon_hwcontrol(struct mtd_info *mtdinfo, int cmd, | ||
106 | unsigned int ctrl) | ||
107 | { | ||
108 | struct nand_chip *chip = mtd->priv; | ||
109 | |||
110 | if (ctrl & NAND_CTRL_CHANGE) { | ||
111 | #error Missing headerfiles. No way to fix this. -tglx | ||
112 | switch (cmd) { | ||
113 | case NAND_CTL_SETCLE: | ||
114 | MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND0_PADDR); | ||
115 | break; | ||
116 | case NAND_CTL_CLRCLE: | ||
117 | MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND0_PADDR); | ||
118 | break; | ||
119 | case NAND_CTL_SETALE: | ||
120 | MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND0_PADDR); | ||
121 | break; | ||
122 | case NAND_CTL_CLRALE: | ||
123 | MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND0_PADDR); | ||
124 | break; | ||
125 | case NAND_CTL_SETNCE: | ||
126 | MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND0_PADDR); | ||
127 | break; | ||
128 | case NAND_CTL_CLRNCE: | ||
129 | MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND0_PADDR); | ||
130 | break; | ||
131 | } | ||
132 | } | ||
133 | if (cmd != NAND_CMD_NONE) | ||
134 | writeb(cmd, chip->IO_ADDR_W); | ||
135 | } | ||
136 | |||
137 | static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd, | ||
138 | unsigned int ctrl) | ||
139 | { | ||
140 | struct nand_chip *chip = mtd->priv; | ||
141 | |||
142 | if (ctrl & NAND_CTRL_CHANGE) { | ||
143 | #error Missing headerfiles. No way to fix this. -tglx | ||
144 | switch (cmd) { | ||
145 | case NAND_CTL_SETCLE: | ||
146 | MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR); | ||
147 | break; | ||
148 | case NAND_CTL_CLRCLE: | ||
149 | MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR); | ||
150 | break; | ||
151 | case NAND_CTL_SETALE: | ||
152 | MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR); | ||
153 | break; | ||
154 | case NAND_CTL_CLRALE: | ||
155 | MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR); | ||
156 | break; | ||
157 | case NAND_CTL_SETNCE: | ||
158 | MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR); | ||
159 | break; | ||
160 | case NAND_CTL_CLRNCE: | ||
161 | MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR); | ||
162 | break; | ||
163 | } | ||
164 | } | ||
165 | if (cmd != NAND_CMD_NONE) | ||
166 | writeb(cmd, chip->IO_ADDR_W); | ||
167 | } | ||
168 | |||
169 | #ifdef USE_READY_BUSY_PIN | ||
170 | /* | ||
171 | * read device ready pin | ||
172 | */ | ||
173 | static int ppchameleon_device_ready(struct mtd_info *minfo) | ||
174 | { | ||
175 | if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_RB_GPIO_PIN) | ||
176 | return 1; | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static int ppchameleonevb_device_ready(struct mtd_info *minfo) | ||
181 | { | ||
182 | if (in_be32((volatile unsigned *)GPIO0_IR) & NAND_EVB_RB_GPIO_PIN) | ||
183 | return 1; | ||
184 | return 0; | ||
185 | } | ||
186 | #endif | ||
187 | |||
188 | /* | ||
189 | * Main initialization routine | ||
190 | */ | ||
191 | static int __init ppchameleonevb_init(void) | ||
192 | { | ||
193 | struct nand_chip *this; | ||
194 | void __iomem *ppchameleon_fio_base; | ||
195 | void __iomem *ppchameleonevb_fio_base; | ||
196 | |||
197 | /********************************* | ||
198 | * Processor module NAND (if any) * | ||
199 | *********************************/ | ||
200 | /* Allocate memory for MTD device structure and private data */ | ||
201 | ppchameleon_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); | ||
202 | if (!ppchameleon_mtd) { | ||
203 | printk("Unable to allocate PPChameleon NAND MTD device structure.\n"); | ||
204 | return -ENOMEM; | ||
205 | } | ||
206 | |||
207 | /* map physical address */ | ||
208 | ppchameleon_fio_base = ioremap(ppchameleon_fio_pbase, SZ_4M); | ||
209 | if (!ppchameleon_fio_base) { | ||
210 | printk("ioremap PPChameleon NAND flash failed\n"); | ||
211 | kfree(ppchameleon_mtd); | ||
212 | return -EIO; | ||
213 | } | ||
214 | |||
215 | /* Get pointer to private data */ | ||
216 | this = (struct nand_chip *)(&ppchameleon_mtd[1]); | ||
217 | |||
218 | /* Initialize structures */ | ||
219 | memset(ppchameleon_mtd, 0, sizeof(struct mtd_info)); | ||
220 | memset(this, 0, sizeof(struct nand_chip)); | ||
221 | |||
222 | /* Link the private data with the MTD structure */ | ||
223 | ppchameleon_mtd->priv = this; | ||
224 | ppchameleon_mtd->owner = THIS_MODULE; | ||
225 | |||
226 | /* Initialize GPIOs */ | ||
227 | /* Pin mapping for NAND chip */ | ||
228 | /* | ||
229 | CE GPIO_01 | ||
230 | CLE GPIO_02 | ||
231 | ALE GPIO_03 | ||
232 | R/B GPIO_04 | ||
233 | */ | ||
234 | /* output select */ | ||
235 | out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xC0FFFFFF); | ||
236 | /* three-state select */ | ||
237 | out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xC0FFFFFF); | ||
238 | /* enable output driver */ | ||
239 | out_be32((volatile unsigned *)GPIO0_TCR, | ||
240 | in_be32((volatile unsigned *)GPIO0_TCR) | NAND_nCE_GPIO_PIN | NAND_CLE_GPIO_PIN | NAND_ALE_GPIO_PIN); | ||
241 | #ifdef USE_READY_BUSY_PIN | ||
242 | /* three-state select */ | ||
243 | out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFF3FFFFF); | ||
244 | /* high-impedecence */ | ||
245 | out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_RB_GPIO_PIN)); | ||
246 | /* input select */ | ||
247 | out_be32((volatile unsigned *)GPIO0_ISR1H, | ||
248 | (in_be32((volatile unsigned *)GPIO0_ISR1H) & 0xFF3FFFFF) | 0x00400000); | ||
249 | #endif | ||
250 | |||
251 | /* insert callbacks */ | ||
252 | this->IO_ADDR_R = ppchameleon_fio_base; | ||
253 | this->IO_ADDR_W = ppchameleon_fio_base; | ||
254 | this->cmd_ctrl = ppchameleon_hwcontrol; | ||
255 | #ifdef USE_READY_BUSY_PIN | ||
256 | this->dev_ready = ppchameleon_device_ready; | ||
257 | #endif | ||
258 | this->chip_delay = NAND_BIG_DELAY_US; | ||
259 | /* ECC mode */ | ||
260 | this->ecc.mode = NAND_ECC_SOFT; | ||
261 | |||
262 | /* Scan to find existence of the device (it could not be mounted) */ | ||
263 | if (nand_scan(ppchameleon_mtd, 1)) { | ||
264 | iounmap((void *)ppchameleon_fio_base); | ||
265 | ppchameleon_fio_base = NULL; | ||
266 | kfree(ppchameleon_mtd); | ||
267 | goto nand_evb_init; | ||
268 | } | ||
269 | #ifndef USE_READY_BUSY_PIN | ||
270 | /* Adjust delay if necessary */ | ||
271 | if (ppchameleon_mtd->size == NAND_SMALL_SIZE) | ||
272 | this->chip_delay = NAND_SMALL_DELAY_US; | ||
273 | #endif | ||
274 | |||
275 | ppchameleon_mtd->name = "ppchameleon-nand"; | ||
276 | |||
277 | /* Register the partitions */ | ||
278 | mtd_device_parse_register(ppchameleon_mtd, NULL, NULL, | ||
279 | ppchameleon_mtd->size == NAND_SMALL_SIZE ? | ||
280 | partition_info_me : partition_info_hi, | ||
281 | NUM_PARTITIONS); | ||
282 | |||
283 | nand_evb_init: | ||
284 | /**************************** | ||
285 | * EVB NAND (always present) * | ||
286 | ****************************/ | ||
287 | /* Allocate memory for MTD device structure and private data */ | ||
288 | ppchameleonevb_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); | ||
289 | if (!ppchameleonevb_mtd) { | ||
290 | printk("Unable to allocate PPChameleonEVB NAND MTD device structure.\n"); | ||
291 | if (ppchameleon_fio_base) | ||
292 | iounmap(ppchameleon_fio_base); | ||
293 | return -ENOMEM; | ||
294 | } | ||
295 | |||
296 | /* map physical address */ | ||
297 | ppchameleonevb_fio_base = ioremap(ppchameleonevb_fio_pbase, SZ_4M); | ||
298 | if (!ppchameleonevb_fio_base) { | ||
299 | printk("ioremap PPChameleonEVB NAND flash failed\n"); | ||
300 | kfree(ppchameleonevb_mtd); | ||
301 | if (ppchameleon_fio_base) | ||
302 | iounmap(ppchameleon_fio_base); | ||
303 | return -EIO; | ||
304 | } | ||
305 | |||
306 | /* Get pointer to private data */ | ||
307 | this = (struct nand_chip *)(&ppchameleonevb_mtd[1]); | ||
308 | |||
309 | /* Initialize structures */ | ||
310 | memset(ppchameleonevb_mtd, 0, sizeof(struct mtd_info)); | ||
311 | memset(this, 0, sizeof(struct nand_chip)); | ||
312 | |||
313 | /* Link the private data with the MTD structure */ | ||
314 | ppchameleonevb_mtd->priv = this; | ||
315 | |||
316 | /* Initialize GPIOs */ | ||
317 | /* Pin mapping for NAND chip */ | ||
318 | /* | ||
319 | CE GPIO_14 | ||
320 | CLE GPIO_15 | ||
321 | ALE GPIO_16 | ||
322 | R/B GPIO_31 | ||
323 | */ | ||
324 | /* output select */ | ||
325 | out_be32((volatile unsigned *)GPIO0_OSRH, in_be32((volatile unsigned *)GPIO0_OSRH) & 0xFFFFFFF0); | ||
326 | out_be32((volatile unsigned *)GPIO0_OSRL, in_be32((volatile unsigned *)GPIO0_OSRL) & 0x3FFFFFFF); | ||
327 | /* three-state select */ | ||
328 | out_be32((volatile unsigned *)GPIO0_TSRH, in_be32((volatile unsigned *)GPIO0_TSRH) & 0xFFFFFFF0); | ||
329 | out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0x3FFFFFFF); | ||
330 | /* enable output driver */ | ||
331 | out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) | NAND_EVB_nCE_GPIO_PIN | | ||
332 | NAND_EVB_CLE_GPIO_PIN | NAND_EVB_ALE_GPIO_PIN); | ||
333 | #ifdef USE_READY_BUSY_PIN | ||
334 | /* three-state select */ | ||
335 | out_be32((volatile unsigned *)GPIO0_TSRL, in_be32((volatile unsigned *)GPIO0_TSRL) & 0xFFFFFFFC); | ||
336 | /* high-impedecence */ | ||
337 | out_be32((volatile unsigned *)GPIO0_TCR, in_be32((volatile unsigned *)GPIO0_TCR) & (~NAND_EVB_RB_GPIO_PIN)); | ||
338 | /* input select */ | ||
339 | out_be32((volatile unsigned *)GPIO0_ISR1L, | ||
340 | (in_be32((volatile unsigned *)GPIO0_ISR1L) & 0xFFFFFFFC) | 0x00000001); | ||
341 | #endif | ||
342 | |||
343 | /* insert callbacks */ | ||
344 | this->IO_ADDR_R = ppchameleonevb_fio_base; | ||
345 | this->IO_ADDR_W = ppchameleonevb_fio_base; | ||
346 | this->cmd_ctrl = ppchameleonevb_hwcontrol; | ||
347 | #ifdef USE_READY_BUSY_PIN | ||
348 | this->dev_ready = ppchameleonevb_device_ready; | ||
349 | #endif | ||
350 | this->chip_delay = NAND_SMALL_DELAY_US; | ||
351 | |||
352 | /* ECC mode */ | ||
353 | this->ecc.mode = NAND_ECC_SOFT; | ||
354 | |||
355 | /* Scan to find existence of the device */ | ||
356 | if (nand_scan(ppchameleonevb_mtd, 1)) { | ||
357 | iounmap((void *)ppchameleonevb_fio_base); | ||
358 | kfree(ppchameleonevb_mtd); | ||
359 | if (ppchameleon_fio_base) | ||
360 | iounmap(ppchameleon_fio_base); | ||
361 | return -ENXIO; | ||
362 | } | ||
363 | |||
364 | ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME; | ||
365 | |||
366 | /* Register the partitions */ | ||
367 | mtd_device_parse_register(ppchameleonevb_mtd, NULL, NULL, | ||
368 | ppchameleon_mtd->size == NAND_SMALL_SIZE ? | ||
369 | partition_info_me : partition_info_hi, | ||
370 | NUM_PARTITIONS); | ||
371 | |||
372 | /* Return happy */ | ||
373 | return 0; | ||
374 | } | ||
375 | |||
376 | module_init(ppchameleonevb_init); | ||
377 | |||
378 | /* | ||
379 | * Clean up routine | ||
380 | */ | ||
381 | static void __exit ppchameleonevb_cleanup(void) | ||
382 | { | ||
383 | struct nand_chip *this; | ||
384 | |||
385 | /* Release resources, unregister device(s) */ | ||
386 | nand_release(ppchameleon_mtd); | ||
387 | nand_release(ppchameleonevb_mtd); | ||
388 | |||
389 | /* Release iomaps */ | ||
390 | this = (struct nand_chip *) &ppchameleon_mtd[1]; | ||
391 | iounmap((void *) this->IO_ADDR_R); | ||
392 | this = (struct nand_chip *) &ppchameleonevb_mtd[1]; | ||
393 | iounmap((void *) this->IO_ADDR_R); | ||
394 | |||
395 | /* Free the MTD device structure */ | ||
396 | kfree (ppchameleon_mtd); | ||
397 | kfree (ppchameleonevb_mtd); | ||
398 | } | ||
399 | module_exit(ppchameleonevb_cleanup); | ||
400 | |||
401 | MODULE_LICENSE("GPL"); | ||
402 | MODULE_AUTHOR("DAVE Srl <support-ppchameleon@dave-tech.it>"); | ||
403 | MODULE_DESCRIPTION("MTD map driver for DAVE Srl PPChameleonEVB board"); | ||
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 37ee75c7bacb..dec80ca6a5ce 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c | |||
@@ -989,7 +989,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd) | |||
989 | } | 989 | } |
990 | 990 | ||
991 | pxa3xx_flash_ids[0].name = f->name; | 991 | pxa3xx_flash_ids[0].name = f->name; |
992 | pxa3xx_flash_ids[0].id = (f->chip_id >> 8) & 0xffff; | 992 | pxa3xx_flash_ids[0].dev_id = (f->chip_id >> 8) & 0xffff; |
993 | pxa3xx_flash_ids[0].pagesize = f->page_size; | 993 | pxa3xx_flash_ids[0].pagesize = f->page_size; |
994 | chipsize = (uint64_t)f->num_blocks * f->page_per_block * f->page_size; | 994 | chipsize = (uint64_t)f->num_blocks * f->page_per_block * f->page_size; |
995 | pxa3xx_flash_ids[0].chipsize = chipsize >> 20; | 995 | pxa3xx_flash_ids[0].chipsize = chipsize >> 20; |
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c deleted file mode 100644 index e55b5cfbe145..000000000000 --- a/drivers/mtd/nand/rtc_from4.c +++ /dev/null | |||
@@ -1,624 +0,0 @@ | |||
1 | /* | ||
2 | * drivers/mtd/nand/rtc_from4.c | ||
3 | * | ||
4 | * Copyright (C) 2004 Red Hat, Inc. | ||
5 | * | ||
6 | * Derived from drivers/mtd/nand/spia.c | ||
7 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * Overview: | ||
14 | * This is a device driver for the AG-AND flash device found on the | ||
15 | * Renesas Technology Corp. Flash ROM 4-slot interface board (FROM_BOARD4), | ||
16 | * which utilizes the Renesas HN29V1G91T-30 part. | ||
17 | * This chip is a 1 GBibit (128MiB x 8 bits) AG-AND flash device. | ||
18 | */ | ||
19 | |||
20 | #include <linux/delay.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <linux/rslib.h> | ||
25 | #include <linux/bitrev.h> | ||
26 | #include <linux/module.h> | ||
27 | #include <linux/mtd/mtd.h> | ||
28 | #include <linux/mtd/nand.h> | ||
29 | #include <linux/mtd/partitions.h> | ||
30 | #include <asm/io.h> | ||
31 | |||
32 | /* | ||
33 | * MTD structure for Renesas board | ||
34 | */ | ||
35 | static struct mtd_info *rtc_from4_mtd = NULL; | ||
36 | |||
37 | #define RTC_FROM4_MAX_CHIPS 2 | ||
38 | |||
39 | /* HS77x9 processor register defines */ | ||
40 | #define SH77X9_BCR1 ((volatile unsigned short *)(0xFFFFFF60)) | ||
41 | #define SH77X9_BCR2 ((volatile unsigned short *)(0xFFFFFF62)) | ||
42 | #define SH77X9_WCR1 ((volatile unsigned short *)(0xFFFFFF64)) | ||
43 | #define SH77X9_WCR2 ((volatile unsigned short *)(0xFFFFFF66)) | ||
44 | #define SH77X9_MCR ((volatile unsigned short *)(0xFFFFFF68)) | ||
45 | #define SH77X9_PCR ((volatile unsigned short *)(0xFFFFFF6C)) | ||
46 | #define SH77X9_FRQCR ((volatile unsigned short *)(0xFFFFFF80)) | ||
47 | |||
48 | /* | ||
49 | * Values specific to the Renesas Technology Corp. FROM_BOARD4 (used with HS77x9 processor) | ||
50 | */ | ||
51 | /* Address where flash is mapped */ | ||
52 | #define RTC_FROM4_FIO_BASE 0x14000000 | ||
53 | |||
54 | /* CLE and ALE are tied to address lines 5 & 4, respectively */ | ||
55 | #define RTC_FROM4_CLE (1 << 5) | ||
56 | #define RTC_FROM4_ALE (1 << 4) | ||
57 | |||
58 | /* address lines A24-A22 used for chip selection */ | ||
59 | #define RTC_FROM4_NAND_ADDR_SLOT3 (0x00800000) | ||
60 | #define RTC_FROM4_NAND_ADDR_SLOT4 (0x00C00000) | ||
61 | #define RTC_FROM4_NAND_ADDR_FPGA (0x01000000) | ||
62 | /* mask address lines A24-A22 used for chip selection */ | ||
63 | #define RTC_FROM4_NAND_ADDR_MASK (RTC_FROM4_NAND_ADDR_SLOT3 | RTC_FROM4_NAND_ADDR_SLOT4 | RTC_FROM4_NAND_ADDR_FPGA) | ||
64 | |||
65 | /* FPGA status register for checking device ready (bit zero) */ | ||
66 | #define RTC_FROM4_FPGA_SR (RTC_FROM4_NAND_ADDR_FPGA | 0x00000002) | ||
67 | #define RTC_FROM4_DEVICE_READY 0x0001 | ||
68 | |||
69 | /* FPGA Reed-Solomon ECC Control register */ | ||
70 | |||
71 | #define RTC_FROM4_RS_ECC_CTL (RTC_FROM4_NAND_ADDR_FPGA | 0x00000050) | ||
72 | #define RTC_FROM4_RS_ECC_CTL_CLR (1 << 7) | ||
73 | #define RTC_FROM4_RS_ECC_CTL_GEN (1 << 6) | ||
74 | #define RTC_FROM4_RS_ECC_CTL_FD_E (1 << 5) | ||
75 | |||
76 | /* FPGA Reed-Solomon ECC code base */ | ||
77 | #define RTC_FROM4_RS_ECC (RTC_FROM4_NAND_ADDR_FPGA | 0x00000060) | ||
78 | #define RTC_FROM4_RS_ECCN (RTC_FROM4_NAND_ADDR_FPGA | 0x00000080) | ||
79 | |||
80 | /* FPGA Reed-Solomon ECC check register */ | ||
81 | #define RTC_FROM4_RS_ECC_CHK (RTC_FROM4_NAND_ADDR_FPGA | 0x00000070) | ||
82 | #define RTC_FROM4_RS_ECC_CHK_ERROR (1 << 7) | ||
83 | |||
84 | #define ERR_STAT_ECC_AVAILABLE 0x20 | ||
85 | |||
86 | /* Undefine for software ECC */ | ||
87 | #define RTC_FROM4_HWECC 1 | ||
88 | |||
89 | /* Define as 1 for no virtual erase blocks (in JFFS2) */ | ||
90 | #define RTC_FROM4_NO_VIRTBLOCKS 0 | ||
91 | |||
92 | /* | ||
93 | * Module stuff | ||
94 | */ | ||
95 | static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE); | ||
96 | |||
97 | static const struct mtd_partition partition_info[] = { | ||
98 | { | ||
99 | .name = "Renesas flash partition 1", | ||
100 | .offset = 0, | ||
101 | .size = MTDPART_SIZ_FULL}, | ||
102 | }; | ||
103 | |||
104 | #define NUM_PARTITIONS 1 | ||
105 | |||
106 | /* | ||
107 | * hardware specific flash bbt decriptors | ||
108 | * Note: this is to allow debugging by disabling | ||
109 | * NAND_BBT_CREATE and/or NAND_BBT_WRITE | ||
110 | * | ||
111 | */ | ||
112 | static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; | ||
113 | static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; | ||
114 | |||
115 | static struct nand_bbt_descr rtc_from4_bbt_main_descr = { | ||
116 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | ||
117 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, | ||
118 | .offs = 40, | ||
119 | .len = 4, | ||
120 | .veroffs = 44, | ||
121 | .maxblocks = 4, | ||
122 | .pattern = bbt_pattern | ||
123 | }; | ||
124 | |||
125 | static struct nand_bbt_descr rtc_from4_bbt_mirror_descr = { | ||
126 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | ||
127 | | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, | ||
128 | .offs = 40, | ||
129 | .len = 4, | ||
130 | .veroffs = 44, | ||
131 | .maxblocks = 4, | ||
132 | .pattern = mirror_pattern | ||
133 | }; | ||
134 | |||
135 | #ifdef RTC_FROM4_HWECC | ||
136 | |||
137 | /* the Reed Solomon control structure */ | ||
138 | static struct rs_control *rs_decoder; | ||
139 | |||
140 | /* | ||
141 | * hardware specific Out Of Band information | ||
142 | */ | ||
143 | static struct nand_ecclayout rtc_from4_nand_oobinfo = { | ||
144 | .eccbytes = 32, | ||
145 | .eccpos = { | ||
146 | 0, 1, 2, 3, 4, 5, 6, 7, | ||
147 | 8, 9, 10, 11, 12, 13, 14, 15, | ||
148 | 16, 17, 18, 19, 20, 21, 22, 23, | ||
149 | 24, 25, 26, 27, 28, 29, 30, 31}, | ||
150 | .oobfree = {{32, 32}} | ||
151 | }; | ||
152 | |||
153 | #endif | ||
154 | |||
155 | /* | ||
156 | * rtc_from4_hwcontrol - hardware specific access to control-lines | ||
157 | * @mtd: MTD device structure | ||
158 | * @cmd: hardware control command | ||
159 | * | ||
160 | * Address lines (A5 and A4) are used to control Command and Address Latch | ||
161 | * Enable on this board, so set the read/write address appropriately. | ||
162 | * | ||
163 | * Chip Enable is also controlled by the Chip Select (CS5) and | ||
164 | * Address lines (A24-A22), so no action is required here. | ||
165 | * | ||
166 | */ | ||
167 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd, | ||
168 | unsigned int ctrl) | ||
169 | { | ||
170 | struct nand_chip *chip = (mtd->priv); | ||
171 | |||
172 | if (cmd == NAND_CMD_NONE) | ||
173 | return; | ||
174 | |||
175 | if (ctrl & NAND_CLE) | ||
176 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_CLE); | ||
177 | else | ||
178 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_ALE); | ||
179 | } | ||
180 | |||
181 | /* | ||
182 | * rtc_from4_nand_select_chip - hardware specific chip select | ||
183 | * @mtd: MTD device structure | ||
184 | * @chip: Chip to select (0 == slot 3, 1 == slot 4) | ||
185 | * | ||
186 | * The chip select is based on address lines A24-A22. | ||
187 | * This driver uses flash slots 3 and 4 (A23-A22). | ||
188 | * | ||
189 | */ | ||
190 | static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip) | ||
191 | { | ||
192 | struct nand_chip *this = mtd->priv; | ||
193 | |||
194 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK); | ||
195 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK); | ||
196 | |||
197 | switch (chip) { | ||
198 | |||
199 | case 0: /* select slot 3 chip */ | ||
200 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3); | ||
201 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3); | ||
202 | break; | ||
203 | case 1: /* select slot 4 chip */ | ||
204 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4); | ||
205 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4); | ||
206 | break; | ||
207 | |||
208 | } | ||
209 | } | ||
210 | |||
211 | /* | ||
212 | * rtc_from4_nand_device_ready - hardware specific ready/busy check | ||
213 | * @mtd: MTD device structure | ||
214 | * | ||
215 | * This board provides the Ready/Busy state in the status register | ||
216 | * of the FPGA. Bit zero indicates the RDY(1)/BSY(0) signal. | ||
217 | * | ||
218 | */ | ||
219 | static int rtc_from4_nand_device_ready(struct mtd_info *mtd) | ||
220 | { | ||
221 | unsigned short status; | ||
222 | |||
223 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_FPGA_SR)); | ||
224 | |||
225 | return (status & RTC_FROM4_DEVICE_READY); | ||
226 | |||
227 | } | ||
228 | |||
229 | /* | ||
230 | * deplete - code to perform device recovery in case there was a power loss | ||
231 | * @mtd: MTD device structure | ||
232 | * @chip: Chip to select (0 == slot 3, 1 == slot 4) | ||
233 | * | ||
234 | * If there was a sudden loss of power during an erase operation, a | ||
235 | * "device recovery" operation must be performed when power is restored | ||
236 | * to ensure correct operation. This routine performs the required steps | ||
237 | * for the requested chip. | ||
238 | * | ||
239 | * See page 86 of the data sheet for details. | ||
240 | * | ||
241 | */ | ||
242 | static void deplete(struct mtd_info *mtd, int chip) | ||
243 | { | ||
244 | struct nand_chip *this = mtd->priv; | ||
245 | |||
246 | /* wait until device is ready */ | ||
247 | while (!this->dev_ready(mtd)) ; | ||
248 | |||
249 | this->select_chip(mtd, chip); | ||
250 | |||
251 | /* Send the commands for device recovery, phase 1 */ | ||
252 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000); | ||
253 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); | ||
254 | |||
255 | /* Send the commands for device recovery, phase 2 */ | ||
256 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004); | ||
257 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); | ||
258 | |||
259 | } | ||
260 | |||
261 | #ifdef RTC_FROM4_HWECC | ||
262 | /* | ||
263 | * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function | ||
264 | * @mtd: MTD device structure | ||
265 | * @mode: I/O mode; read or write | ||
266 | * | ||
267 | * enable hardware ECC for data read or write | ||
268 | * | ||
269 | */ | ||
270 | static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) | ||
271 | { | ||
272 | volatile unsigned short *rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL); | ||
273 | unsigned short status; | ||
274 | |||
275 | switch (mode) { | ||
276 | case NAND_ECC_READ: | ||
277 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_FD_E; | ||
278 | |||
279 | *rs_ecc_ctl = status; | ||
280 | break; | ||
281 | |||
282 | case NAND_ECC_READSYN: | ||
283 | status = 0x00; | ||
284 | |||
285 | *rs_ecc_ctl = status; | ||
286 | break; | ||
287 | |||
288 | case NAND_ECC_WRITE: | ||
289 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_GEN | RTC_FROM4_RS_ECC_CTL_FD_E; | ||
290 | |||
291 | *rs_ecc_ctl = status; | ||
292 | break; | ||
293 | |||
294 | default: | ||
295 | BUG(); | ||
296 | break; | ||
297 | } | ||
298 | |||
299 | } | ||
300 | |||
301 | /* | ||
302 | * rtc_from4_calculate_ecc - hardware specific code to read ECC code | ||
303 | * @mtd: MTD device structure | ||
304 | * @dat: buffer containing the data to generate ECC codes | ||
305 | * @ecc_code ECC codes calculated | ||
306 | * | ||
307 | * The ECC code is calculated by the FPGA. All we have to do is read the values | ||
308 | * from the FPGA registers. | ||
309 | * | ||
310 | * Note: We read from the inverted registers, since data is inverted before | ||
311 | * the code is calculated. So all 0xff data (blank page) results in all 0xff rs code | ||
312 | * | ||
313 | */ | ||
314 | static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) | ||
315 | { | ||
316 | volatile unsigned short *rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN); | ||
317 | unsigned short value; | ||
318 | int i; | ||
319 | |||
320 | for (i = 0; i < 8; i++) { | ||
321 | value = *rs_eccn; | ||
322 | ecc_code[i] = (unsigned char)value; | ||
323 | rs_eccn++; | ||
324 | } | ||
325 | ecc_code[7] |= 0x0f; /* set the last four bits (not used) */ | ||
326 | } | ||
327 | |||
328 | /* | ||
329 | * rtc_from4_correct_data - hardware specific code to correct data using ECC code | ||
330 | * @mtd: MTD device structure | ||
331 | * @buf: buffer containing the data to generate ECC codes | ||
332 | * @ecc1 ECC codes read | ||
333 | * @ecc2 ECC codes calculated | ||
334 | * | ||
335 | * The FPGA tells us fast, if there's an error or not. If no, we go back happy | ||
336 | * else we read the ecc results from the fpga and call the rs library to decode | ||
337 | * and hopefully correct the error. | ||
338 | * | ||
339 | */ | ||
340 | static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_char *ecc1, u_char *ecc2) | ||
341 | { | ||
342 | int i, j, res; | ||
343 | unsigned short status; | ||
344 | uint16_t par[6], syn[6]; | ||
345 | uint8_t ecc[8]; | ||
346 | volatile unsigned short *rs_ecc; | ||
347 | |||
348 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK)); | ||
349 | |||
350 | if (!(status & RTC_FROM4_RS_ECC_CHK_ERROR)) { | ||
351 | return 0; | ||
352 | } | ||
353 | |||
354 | /* Read the syndrome pattern from the FPGA and correct the bitorder */ | ||
355 | rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC); | ||
356 | for (i = 0; i < 8; i++) { | ||
357 | ecc[i] = bitrev8(*rs_ecc); | ||
358 | rs_ecc++; | ||
359 | } | ||
360 | |||
361 | /* convert into 6 10bit syndrome fields */ | ||
362 | par[5] = rs_decoder->index_of[(((uint16_t) ecc[0] >> 0) & 0x0ff) | (((uint16_t) ecc[1] << 8) & 0x300)]; | ||
363 | par[4] = rs_decoder->index_of[(((uint16_t) ecc[1] >> 2) & 0x03f) | (((uint16_t) ecc[2] << 6) & 0x3c0)]; | ||
364 | par[3] = rs_decoder->index_of[(((uint16_t) ecc[2] >> 4) & 0x00f) | (((uint16_t) ecc[3] << 4) & 0x3f0)]; | ||
365 | par[2] = rs_decoder->index_of[(((uint16_t) ecc[3] >> 6) & 0x003) | (((uint16_t) ecc[4] << 2) & 0x3fc)]; | ||
366 | par[1] = rs_decoder->index_of[(((uint16_t) ecc[5] >> 0) & 0x0ff) | (((uint16_t) ecc[6] << 8) & 0x300)]; | ||
367 | par[0] = (((uint16_t) ecc[6] >> 2) & 0x03f) | (((uint16_t) ecc[7] << 6) & 0x3c0); | ||
368 | |||
369 | /* Convert to computable syndrome */ | ||
370 | for (i = 0; i < 6; i++) { | ||
371 | syn[i] = par[0]; | ||
372 | for (j = 1; j < 6; j++) | ||
373 | if (par[j] != rs_decoder->nn) | ||
374 | syn[i] ^= rs_decoder->alpha_to[rs_modnn(rs_decoder, par[j] + i * j)]; | ||
375 | |||
376 | /* Convert to index form */ | ||
377 | syn[i] = rs_decoder->index_of[syn[i]]; | ||
378 | } | ||
379 | |||
380 | /* Let the library code do its magic. */ | ||
381 | res = decode_rs8(rs_decoder, (uint8_t *) buf, par, 512, syn, 0, NULL, 0xff, NULL); | ||
382 | if (res > 0) { | ||
383 | pr_debug("rtc_from4_correct_data: " "ECC corrected %d errors on read\n", res); | ||
384 | } | ||
385 | return res; | ||
386 | } | ||
387 | |||
388 | /** | ||
389 | * rtc_from4_errstat - perform additional error status checks | ||
390 | * @mtd: MTD device structure | ||
391 | * @this: NAND chip structure | ||
392 | * @state: state or the operation | ||
393 | * @status: status code returned from read status | ||
394 | * @page: startpage inside the chip, must be called with (page & this->pagemask) | ||
395 | * | ||
396 | * Perform additional error status checks on erase and write failures | ||
397 | * to determine if errors are correctable. For this device, correctable | ||
398 | * 1-bit errors on erase and write are considered acceptable. | ||
399 | * | ||
400 | * note: see pages 34..37 of data sheet for details. | ||
401 | * | ||
402 | */ | ||
403 | static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, | ||
404 | int state, int status, int page) | ||
405 | { | ||
406 | int er_stat = 0; | ||
407 | int rtn, retlen; | ||
408 | size_t len; | ||
409 | uint8_t *buf; | ||
410 | int i; | ||
411 | |||
412 | this->cmdfunc(mtd, NAND_CMD_STATUS_CLEAR, -1, -1); | ||
413 | |||
414 | if (state == FL_ERASING) { | ||
415 | |||
416 | for (i = 0; i < 4; i++) { | ||
417 | if (!(status & 1 << (i + 1))) | ||
418 | continue; | ||
419 | this->cmdfunc(mtd, (NAND_CMD_STATUS_ERROR + i + 1), | ||
420 | -1, -1); | ||
421 | rtn = this->read_byte(mtd); | ||
422 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); | ||
423 | |||
424 | /* err_ecc_not_avail */ | ||
425 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) | ||
426 | er_stat |= 1 << (i + 1); | ||
427 | } | ||
428 | |||
429 | } else if (state == FL_WRITING) { | ||
430 | |||
431 | unsigned long corrected = mtd->ecc_stats.corrected; | ||
432 | |||
433 | /* single bank write logic */ | ||
434 | this->cmdfunc(mtd, NAND_CMD_STATUS_ERROR, -1, -1); | ||
435 | rtn = this->read_byte(mtd); | ||
436 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); | ||
437 | |||
438 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { | ||
439 | /* err_ecc_not_avail */ | ||
440 | er_stat |= 1 << 1; | ||
441 | goto out; | ||
442 | } | ||
443 | |||
444 | len = mtd->writesize; | ||
445 | buf = kmalloc(len, GFP_KERNEL); | ||
446 | if (!buf) { | ||
447 | er_stat = 1; | ||
448 | goto out; | ||
449 | } | ||
450 | |||
451 | /* recovery read */ | ||
452 | rtn = nand_do_read(mtd, page, len, &retlen, buf); | ||
453 | |||
454 | /* if read failed or > 1-bit error corrected */ | ||
455 | if (rtn || (mtd->ecc_stats.corrected - corrected) > 1) | ||
456 | er_stat |= 1 << 1; | ||
457 | kfree(buf); | ||
458 | } | ||
459 | out: | ||
460 | rtn = status; | ||
461 | if (er_stat == 0) { /* if ECC is available */ | ||
462 | rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */ | ||
463 | } | ||
464 | |||
465 | return rtn; | ||
466 | } | ||
467 | #endif | ||
468 | |||
469 | /* | ||
470 | * Main initialization routine | ||
471 | */ | ||
472 | static int __init rtc_from4_init(void) | ||
473 | { | ||
474 | struct nand_chip *this; | ||
475 | unsigned short bcr1, bcr2, wcr2; | ||
476 | int i; | ||
477 | int ret; | ||
478 | |||
479 | /* Allocate memory for MTD device structure and private data */ | ||
480 | rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); | ||
481 | if (!rtc_from4_mtd) { | ||
482 | printk("Unable to allocate Renesas NAND MTD device structure.\n"); | ||
483 | return -ENOMEM; | ||
484 | } | ||
485 | |||
486 | /* Get pointer to private data */ | ||
487 | this = (struct nand_chip *)(&rtc_from4_mtd[1]); | ||
488 | |||
489 | /* Initialize structures */ | ||
490 | memset(rtc_from4_mtd, 0, sizeof(struct mtd_info)); | ||
491 | memset(this, 0, sizeof(struct nand_chip)); | ||
492 | |||
493 | /* Link the private data with the MTD structure */ | ||
494 | rtc_from4_mtd->priv = this; | ||
495 | rtc_from4_mtd->owner = THIS_MODULE; | ||
496 | |||
497 | /* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */ | ||
498 | bcr1 = *SH77X9_BCR1 & ~0x0002; | ||
499 | bcr1 |= 0x0002; | ||
500 | *SH77X9_BCR1 = bcr1; | ||
501 | |||
502 | /* set */ | ||
503 | bcr2 = *SH77X9_BCR2 & ~0x0c00; | ||
504 | bcr2 |= 0x0800; | ||
505 | *SH77X9_BCR2 = bcr2; | ||
506 | |||
507 | /* set area 5 wait states */ | ||
508 | wcr2 = *SH77X9_WCR2 & ~0x1c00; | ||
509 | wcr2 |= 0x1c00; | ||
510 | *SH77X9_WCR2 = wcr2; | ||
511 | |||
512 | /* Set address of NAND IO lines */ | ||
513 | this->IO_ADDR_R = rtc_from4_fio_base; | ||
514 | this->IO_ADDR_W = rtc_from4_fio_base; | ||
515 | /* Set address of hardware control function */ | ||
516 | this->cmd_ctrl = rtc_from4_hwcontrol; | ||
517 | /* Set address of chip select function */ | ||
518 | this->select_chip = rtc_from4_nand_select_chip; | ||
519 | /* command delay time (in us) */ | ||
520 | this->chip_delay = 100; | ||
521 | /* return the status of the Ready/Busy line */ | ||
522 | this->dev_ready = rtc_from4_nand_device_ready; | ||
523 | |||
524 | #ifdef RTC_FROM4_HWECC | ||
525 | printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n"); | ||
526 | |||
527 | this->ecc.mode = NAND_ECC_HW_SYNDROME; | ||
528 | this->ecc.size = 512; | ||
529 | this->ecc.bytes = 8; | ||
530 | this->ecc.strength = 3; | ||
531 | /* return the status of extra status and ECC checks */ | ||
532 | this->errstat = rtc_from4_errstat; | ||
533 | /* set the nand_oobinfo to support FPGA H/W error detection */ | ||
534 | this->ecc.layout = &rtc_from4_nand_oobinfo; | ||
535 | this->ecc.hwctl = rtc_from4_enable_hwecc; | ||
536 | this->ecc.calculate = rtc_from4_calculate_ecc; | ||
537 | this->ecc.correct = rtc_from4_correct_data; | ||
538 | |||
539 | /* We could create the decoder on demand, if memory is a concern. | ||
540 | * This way we have it handy, if an error happens | ||
541 | * | ||
542 | * Symbolsize is 10 (bits) | ||
543 | * Primitve polynomial is x^10+x^3+1 | ||
544 | * first consecutive root is 0 | ||
545 | * primitve element to generate roots = 1 | ||
546 | * generator polinomial degree = 6 | ||
547 | */ | ||
548 | rs_decoder = init_rs(10, 0x409, 0, 1, 6); | ||
549 | if (!rs_decoder) { | ||
550 | printk(KERN_ERR "Could not create a RS decoder\n"); | ||
551 | ret = -ENOMEM; | ||
552 | goto err_1; | ||
553 | } | ||
554 | #else | ||
555 | printk(KERN_INFO "rtc_from4_init: using software ECC detection.\n"); | ||
556 | |||
557 | this->ecc.mode = NAND_ECC_SOFT; | ||
558 | #endif | ||
559 | |||
560 | /* set the bad block tables to support debugging */ | ||
561 | this->bbt_td = &rtc_from4_bbt_main_descr; | ||
562 | this->bbt_md = &rtc_from4_bbt_mirror_descr; | ||
563 | |||
564 | /* Scan to find existence of the device */ | ||
565 | if (nand_scan(rtc_from4_mtd, RTC_FROM4_MAX_CHIPS)) { | ||
566 | ret = -ENXIO; | ||
567 | goto err_2; | ||
568 | } | ||
569 | |||
570 | /* Perform 'device recovery' for each chip in case there was a power loss. */ | ||
571 | for (i = 0; i < this->numchips; i++) { | ||
572 | deplete(rtc_from4_mtd, i); | ||
573 | } | ||
574 | |||
575 | #if RTC_FROM4_NO_VIRTBLOCKS | ||
576 | /* use a smaller erase block to minimize wasted space when a block is bad */ | ||
577 | /* note: this uses eight times as much RAM as using the default and makes */ | ||
578 | /* mounts take four times as long. */ | ||
579 | rtc_from4_mtd->flags |= MTD_NO_VIRTBLOCKS; | ||
580 | #endif | ||
581 | |||
582 | /* Register the partitions */ | ||
583 | ret = mtd_device_register(rtc_from4_mtd, partition_info, | ||
584 | NUM_PARTITIONS); | ||
585 | if (ret) | ||
586 | goto err_3; | ||
587 | |||
588 | /* Return happy */ | ||
589 | return 0; | ||
590 | err_3: | ||
591 | nand_release(rtc_from4_mtd); | ||
592 | err_2: | ||
593 | free_rs(rs_decoder); | ||
594 | err_1: | ||
595 | kfree(rtc_from4_mtd); | ||
596 | return ret; | ||
597 | } | ||
598 | |||
599 | module_init(rtc_from4_init); | ||
600 | |||
601 | /* | ||
602 | * Clean up routine | ||
603 | */ | ||
604 | static void __exit rtc_from4_cleanup(void) | ||
605 | { | ||
606 | /* Release resource, unregister partitions */ | ||
607 | nand_release(rtc_from4_mtd); | ||
608 | |||
609 | /* Free the MTD device structure */ | ||
610 | kfree(rtc_from4_mtd); | ||
611 | |||
612 | #ifdef RTC_FROM4_HWECC | ||
613 | /* Free the reed solomon resources */ | ||
614 | if (rs_decoder) { | ||
615 | free_rs(rs_decoder); | ||
616 | } | ||
617 | #endif | ||
618 | } | ||
619 | |||
620 | module_exit(rtc_from4_cleanup); | ||
621 | |||
622 | MODULE_LICENSE("GPL"); | ||
623 | MODULE_AUTHOR("d.marlin <dmarlin@redhat.com"); | ||
624 | MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4"); | ||
diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c index 57b3971c9c0a..e57e18e8c289 100644 --- a/drivers/mtd/nand/sh_flctl.c +++ b/drivers/mtd/nand/sh_flctl.c | |||
@@ -1081,7 +1081,6 @@ static struct sh_flctl_platform_data *flctl_parse_dt(struct device *dev) | |||
1081 | return pdata; | 1081 | return pdata; |
1082 | } | 1082 | } |
1083 | #else /* CONFIG_OF */ | 1083 | #else /* CONFIG_OF */ |
1084 | #define of_flctl_match NULL | ||
1085 | static struct sh_flctl_platform_data *flctl_parse_dt(struct device *dev) | 1084 | static struct sh_flctl_platform_data *flctl_parse_dt(struct device *dev) |
1086 | { | 1085 | { |
1087 | return NULL; | 1086 | return NULL; |
@@ -1219,22 +1218,11 @@ static struct platform_driver flctl_driver = { | |||
1219 | .driver = { | 1218 | .driver = { |
1220 | .name = "sh_flctl", | 1219 | .name = "sh_flctl", |
1221 | .owner = THIS_MODULE, | 1220 | .owner = THIS_MODULE, |
1222 | .of_match_table = of_flctl_match, | 1221 | .of_match_table = of_match_ptr(of_flctl_match), |
1223 | }, | 1222 | }, |
1224 | }; | 1223 | }; |
1225 | 1224 | ||
1226 | static int __init flctl_nand_init(void) | 1225 | module_platform_driver_probe(flctl_driver, flctl_probe); |
1227 | { | ||
1228 | return platform_driver_probe(&flctl_driver, flctl_probe); | ||
1229 | } | ||
1230 | |||
1231 | static void __exit flctl_nand_cleanup(void) | ||
1232 | { | ||
1233 | platform_driver_unregister(&flctl_driver); | ||
1234 | } | ||
1235 | |||
1236 | module_init(flctl_nand_init); | ||
1237 | module_exit(flctl_nand_cleanup); | ||
1238 | 1226 | ||
1239 | MODULE_LICENSE("GPL"); | 1227 | MODULE_LICENSE("GPL"); |
1240 | MODULE_AUTHOR("Yoshihiro Shimoda"); | 1228 | MODULE_AUTHOR("Yoshihiro Shimoda"); |
diff --git a/drivers/mtd/nand/sm_common.c b/drivers/mtd/nand/sm_common.c index 082bcdcd6bcf..e8181edebddd 100644 --- a/drivers/mtd/nand/sm_common.c +++ b/drivers/mtd/nand/sm_common.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/mtd/nand.h> | 10 | #include <linux/mtd/nand.h> |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/sizes.h> | ||
12 | #include "sm_common.h" | 13 | #include "sm_common.h" |
13 | 14 | ||
14 | static struct nand_ecclayout nand_oob_sm = { | 15 | static struct nand_ecclayout nand_oob_sm = { |
@@ -67,44 +68,37 @@ static int sm_block_markbad(struct mtd_info *mtd, loff_t ofs) | |||
67 | return error; | 68 | return error; |
68 | } | 69 | } |
69 | 70 | ||
70 | |||
71 | static struct nand_flash_dev nand_smartmedia_flash_ids[] = { | 71 | static struct nand_flash_dev nand_smartmedia_flash_ids[] = { |
72 | {"SmartMedia 1MiB 5V", 0x6e, 256, 1, 0x1000, 0}, | 72 | LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM", 0x5d, 2, SZ_8K, NAND_ROM), |
73 | {"SmartMedia 1MiB 3,3V", 0xe8, 256, 1, 0x1000, 0}, | 73 | LEGACY_ID_NAND("SmartMedia 4MiB 3,3V", 0xe3, 4, SZ_8K, 0), |
74 | {"SmartMedia 1MiB 3,3V", 0xec, 256, 1, 0x1000, 0}, | 74 | LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V", 0xe5, 4, SZ_8K, 0), |
75 | {"SmartMedia 2MiB 3,3V", 0xea, 256, 2, 0x1000, 0}, | 75 | LEGACY_ID_NAND("SmartMedia 4MiB 5V", 0x6b, 4, SZ_8K, 0), |
76 | {"SmartMedia 2MiB 5V", 0x64, 256, 2, 0x1000, 0}, | 76 | LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM", 0xd5, 4, SZ_8K, NAND_ROM), |
77 | {"SmartMedia 2MiB 3,3V ROM", 0x5d, 512, 2, 0x2000, NAND_ROM}, | 77 | LEGACY_ID_NAND("SmartMedia 8MiB 3,3V", 0xe6, 8, SZ_8K, 0), |
78 | {"SmartMedia 4MiB 3,3V", 0xe3, 512, 4, 0x2000, 0}, | 78 | LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM", 0xd6, 8, SZ_8K, NAND_ROM), |
79 | {"SmartMedia 4MiB 3,3/5V", 0xe5, 512, 4, 0x2000, 0}, | 79 | LEGACY_ID_NAND("SmartMedia 16MiB 3,3V", 0x73, 16, SZ_16K, 0), |
80 | {"SmartMedia 4MiB 5V", 0x6b, 512, 4, 0x2000, 0}, | 80 | LEGACY_ID_NAND("SmartMedia 16MiB 3,3V ROM", 0x57, 16, SZ_16K, NAND_ROM), |
81 | {"SmartMedia 4MiB 3,3V ROM", 0xd5, 512, 4, 0x2000, NAND_ROM}, | 81 | LEGACY_ID_NAND("SmartMedia 32MiB 3,3V", 0x75, 32, SZ_16K, 0), |
82 | {"SmartMedia 8MiB 3,3V", 0xe6, 512, 8, 0x2000, 0}, | 82 | LEGACY_ID_NAND("SmartMedia 32MiB 3,3V ROM", 0x58, 32, SZ_16K, NAND_ROM), |
83 | {"SmartMedia 8MiB 3,3V ROM", 0xd6, 512, 8, 0x2000, NAND_ROM}, | 83 | LEGACY_ID_NAND("SmartMedia 64MiB 3,3V", 0x76, 64, SZ_16K, 0), |
84 | {"SmartMedia 16MiB 3,3V", 0x73, 512, 16, 0x4000, 0}, | 84 | LEGACY_ID_NAND("SmartMedia 64MiB 3,3V ROM", 0xd9, 64, SZ_16K, NAND_ROM), |
85 | {"SmartMedia 16MiB 3,3V ROM", 0x57, 512, 16, 0x4000, NAND_ROM}, | 85 | LEGACY_ID_NAND("SmartMedia 128MiB 3,3V", 0x79, 128, SZ_16K, 0), |
86 | {"SmartMedia 32MiB 3,3V", 0x75, 512, 32, 0x4000, 0}, | 86 | LEGACY_ID_NAND("SmartMedia 128MiB 3,3V ROM", 0xda, 128, SZ_16K, NAND_ROM), |
87 | {"SmartMedia 32MiB 3,3V ROM", 0x58, 512, 32, 0x4000, NAND_ROM}, | 87 | LEGACY_ID_NAND("SmartMedia 256MiB 3, 3V", 0x71, 256, SZ_16K, 0), |
88 | {"SmartMedia 64MiB 3,3V", 0x76, 512, 64, 0x4000, 0}, | 88 | LEGACY_ID_NAND("SmartMedia 256MiB 3,3V ROM", 0x5b, 256, SZ_16K, NAND_ROM), |
89 | {"SmartMedia 64MiB 3,3V ROM", 0xd9, 512, 64, 0x4000, NAND_ROM}, | 89 | {NULL} |
90 | {"SmartMedia 128MiB 3,3V", 0x79, 512, 128, 0x4000, 0}, | ||
91 | {"SmartMedia 128MiB 3,3V ROM", 0xda, 512, 128, 0x4000, NAND_ROM}, | ||
92 | {"SmartMedia 256MiB 3,3V", 0x71, 512, 256, 0x4000 }, | ||
93 | {"SmartMedia 256MiB 3,3V ROM", 0x5b, 512, 256, 0x4000, NAND_ROM}, | ||
94 | {NULL,} | ||
95 | }; | 90 | }; |
96 | 91 | ||
97 | static struct nand_flash_dev nand_xd_flash_ids[] = { | 92 | static struct nand_flash_dev nand_xd_flash_ids[] = { |
98 | 93 | LEGACY_ID_NAND("xD 16MiB 3,3V", 0x73, 16, SZ_16K, 0), | |
99 | {"xD 16MiB 3,3V", 0x73, 512, 16, 0x4000, 0}, | 94 | LEGACY_ID_NAND("xD 32MiB 3,3V", 0x75, 32, SZ_16K, 0), |
100 | {"xD 32MiB 3,3V", 0x75, 512, 32, 0x4000, 0}, | 95 | LEGACY_ID_NAND("xD 64MiB 3,3V", 0x76, 64, SZ_16K, 0), |
101 | {"xD 64MiB 3,3V", 0x76, 512, 64, 0x4000, 0}, | 96 | LEGACY_ID_NAND("xD 128MiB 3,3V", 0x79, 128, SZ_16K, 0), |
102 | {"xD 128MiB 3,3V", 0x79, 512, 128, 0x4000, 0}, | 97 | LEGACY_ID_NAND("xD 256MiB 3,3V", 0x71, 256, SZ_16K, NAND_BROKEN_XD), |
103 | {"xD 256MiB 3,3V", 0x71, 512, 256, 0x4000, NAND_BROKEN_XD}, | 98 | LEGACY_ID_NAND("xD 512MiB 3,3V", 0xdc, 512, SZ_16K, NAND_BROKEN_XD), |
104 | {"xD 512MiB 3,3V", 0xdc, 512, 512, 0x4000, NAND_BROKEN_XD}, | 99 | LEGACY_ID_NAND("xD 1GiB 3,3V", 0xd3, 1024, SZ_16K, NAND_BROKEN_XD), |
105 | {"xD 1GiB 3,3V", 0xd3, 512, 1024, 0x4000, NAND_BROKEN_XD}, | 100 | LEGACY_ID_NAND("xD 2GiB 3,3V", 0xd5, 2048, SZ_16K, NAND_BROKEN_XD), |
106 | {"xD 2GiB 3,3V", 0xd5, 512, 2048, 0x4000, NAND_BROKEN_XD}, | 101 | {NULL} |
107 | {NULL,} | ||
108 | }; | 102 | }; |
109 | 103 | ||
110 | int sm_register_device(struct mtd_info *mtd, int smartmedia) | 104 | int sm_register_device(struct mtd_info *mtd, int smartmedia) |
diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c index e1e8748aa47b..7ed654c68b08 100644 --- a/drivers/mtd/nand/txx9ndfmc.c +++ b/drivers/mtd/nand/txx9ndfmc.c | |||
@@ -427,18 +427,7 @@ static struct platform_driver txx9ndfmc_driver = { | |||
427 | }, | 427 | }, |
428 | }; | 428 | }; |
429 | 429 | ||
430 | static int __init txx9ndfmc_init(void) | 430 | module_platform_driver_probe(txx9ndfmc_driver, txx9ndfmc_probe); |
431 | { | ||
432 | return platform_driver_probe(&txx9ndfmc_driver, txx9ndfmc_probe); | ||
433 | } | ||
434 | |||
435 | static void __exit txx9ndfmc_exit(void) | ||
436 | { | ||
437 | platform_driver_unregister(&txx9ndfmc_driver); | ||
438 | } | ||
439 | |||
440 | module_init(txx9ndfmc_init); | ||
441 | module_exit(txx9ndfmc_exit); | ||
442 | 431 | ||
443 | MODULE_LICENSE("GPL"); | 432 | MODULE_LICENSE("GPL"); |
444 | MODULE_DESCRIPTION("TXx9 SoC NAND flash controller driver"); | 433 | MODULE_DESCRIPTION("TXx9 SoC NAND flash controller driver"); |
diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c index 30bd907a260a..553d6d6d5603 100644 --- a/drivers/mtd/ofpart.c +++ b/drivers/mtd/ofpart.c | |||
@@ -55,6 +55,7 @@ static int parse_ofpart_partitions(struct mtd_info *master, | |||
55 | while ((pp = of_get_next_child(node, pp))) { | 55 | while ((pp = of_get_next_child(node, pp))) { |
56 | const __be32 *reg; | 56 | const __be32 *reg; |
57 | int len; | 57 | int len; |
58 | int a_cells, s_cells; | ||
58 | 59 | ||
59 | reg = of_get_property(pp, "reg", &len); | 60 | reg = of_get_property(pp, "reg", &len); |
60 | if (!reg) { | 61 | if (!reg) { |
@@ -62,8 +63,10 @@ static int parse_ofpart_partitions(struct mtd_info *master, | |||
62 | continue; | 63 | continue; |
63 | } | 64 | } |
64 | 65 | ||
65 | (*pparts)[i].offset = be32_to_cpu(reg[0]); | 66 | a_cells = of_n_addr_cells(pp); |
66 | (*pparts)[i].size = be32_to_cpu(reg[1]); | 67 | s_cells = of_n_size_cells(pp); |
68 | (*pparts)[i].offset = of_read_number(reg, a_cells); | ||
69 | (*pparts)[i].size = of_read_number(reg + a_cells, s_cells); | ||
67 | 70 | ||
68 | partname = of_get_property(pp, "label", &len); | 71 | partname = of_get_property(pp, "label", &len); |
69 | if (!partname) | 72 | if (!partname) |
diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig index 91467bb03634..ab2607273e80 100644 --- a/drivers/mtd/onenand/Kconfig +++ b/drivers/mtd/onenand/Kconfig | |||
@@ -40,7 +40,6 @@ config MTD_ONENAND_SAMSUNG | |||
40 | 40 | ||
41 | config MTD_ONENAND_OTP | 41 | config MTD_ONENAND_OTP |
42 | bool "OneNAND OTP Support" | 42 | bool "OneNAND OTP Support" |
43 | select HAVE_MTD_OTP | ||
44 | help | 43 | help |
45 | One Block of the NAND Flash Array memory is reserved as | 44 | One Block of the NAND Flash Array memory is reserved as |
46 | a One-Time Programmable Block memory area. | 45 | a One-Time Programmable Block memory area. |
@@ -68,10 +67,4 @@ config MTD_ONENAND_2X_PROGRAM | |||
68 | 67 | ||
69 | And more recent chips | 68 | And more recent chips |
70 | 69 | ||
71 | config MTD_ONENAND_SIM | ||
72 | tristate "OneNAND simulator support" | ||
73 | help | ||
74 | The simulator may simulate various OneNAND flash chips for the | ||
75 | OneNAND MTD layer. | ||
76 | |||
77 | endif # MTD_ONENAND | 70 | endif # MTD_ONENAND |
diff --git a/drivers/mtd/onenand/Makefile b/drivers/mtd/onenand/Makefile index 2b7884c7577e..9d6540e8b3d2 100644 --- a/drivers/mtd/onenand/Makefile +++ b/drivers/mtd/onenand/Makefile | |||
@@ -10,7 +10,4 @@ obj-$(CONFIG_MTD_ONENAND_GENERIC) += generic.o | |||
10 | obj-$(CONFIG_MTD_ONENAND_OMAP2) += omap2.o | 10 | obj-$(CONFIG_MTD_ONENAND_OMAP2) += omap2.o |
11 | obj-$(CONFIG_MTD_ONENAND_SAMSUNG) += samsung.o | 11 | obj-$(CONFIG_MTD_ONENAND_SAMSUNG) += samsung.o |
12 | 12 | ||
13 | # Simulator | ||
14 | obj-$(CONFIG_MTD_ONENAND_SIM) += onenand_sim.o | ||
15 | |||
16 | onenand-objs = onenand_base.o onenand_bbt.o | 13 | onenand-objs = onenand_base.o onenand_bbt.o |
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index eec2aedb4ab8..d98b198edd53 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c | |||
@@ -832,19 +832,7 @@ static struct platform_driver omap2_onenand_driver = { | |||
832 | }, | 832 | }, |
833 | }; | 833 | }; |
834 | 834 | ||
835 | static int __init omap2_onenand_init(void) | 835 | module_platform_driver(omap2_onenand_driver); |
836 | { | ||
837 | printk(KERN_INFO "OneNAND driver initializing\n"); | ||
838 | return platform_driver_register(&omap2_onenand_driver); | ||
839 | } | ||
840 | |||
841 | static void __exit omap2_onenand_exit(void) | ||
842 | { | ||
843 | platform_driver_unregister(&omap2_onenand_driver); | ||
844 | } | ||
845 | |||
846 | module_init(omap2_onenand_init); | ||
847 | module_exit(omap2_onenand_exit); | ||
848 | 836 | ||
849 | MODULE_ALIAS("platform:" DRIVER_NAME); | 837 | MODULE_ALIAS("platform:" DRIVER_NAME); |
850 | MODULE_LICENSE("GPL"); | 838 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/mtd/onenand/onenand_sim.c b/drivers/mtd/onenand/onenand_sim.c deleted file mode 100644 index 85399e3accda..000000000000 --- a/drivers/mtd/onenand/onenand_sim.c +++ /dev/null | |||
@@ -1,564 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/mtd/onenand/onenand_sim.c | ||
3 | * | ||
4 | * The OneNAND simulator | ||
5 | * | ||
6 | * Copyright © 2005-2007 Samsung Electronics | ||
7 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
8 | * | ||
9 | * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> | ||
10 | * Flex-OneNAND simulator support | ||
11 | * Copyright (C) Samsung Electronics, 2008 | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/vmalloc.h> | ||
23 | #include <linux/mtd/mtd.h> | ||
24 | #include <linux/mtd/partitions.h> | ||
25 | #include <linux/mtd/onenand.h> | ||
26 | |||
27 | #include <linux/io.h> | ||
28 | |||
29 | #ifndef CONFIG_ONENAND_SIM_MANUFACTURER | ||
30 | #define CONFIG_ONENAND_SIM_MANUFACTURER 0xec | ||
31 | #endif | ||
32 | |||
33 | #ifndef CONFIG_ONENAND_SIM_DEVICE_ID | ||
34 | #define CONFIG_ONENAND_SIM_DEVICE_ID 0x04 | ||
35 | #endif | ||
36 | |||
37 | #define CONFIG_FLEXONENAND ((CONFIG_ONENAND_SIM_DEVICE_ID >> 9) & 1) | ||
38 | |||
39 | #ifndef CONFIG_ONENAND_SIM_VERSION_ID | ||
40 | #define CONFIG_ONENAND_SIM_VERSION_ID 0x1e | ||
41 | #endif | ||
42 | |||
43 | #ifndef CONFIG_ONENAND_SIM_TECHNOLOGY_ID | ||
44 | #define CONFIG_ONENAND_SIM_TECHNOLOGY_ID CONFIG_FLEXONENAND | ||
45 | #endif | ||
46 | |||
47 | /* Initial boundary values for Flex-OneNAND Simulator */ | ||
48 | #ifndef CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY | ||
49 | #define CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY 0x01 | ||
50 | #endif | ||
51 | |||
52 | #ifndef CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY | ||
53 | #define CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY 0x01 | ||
54 | #endif | ||
55 | |||
56 | static int manuf_id = CONFIG_ONENAND_SIM_MANUFACTURER; | ||
57 | static int device_id = CONFIG_ONENAND_SIM_DEVICE_ID; | ||
58 | static int version_id = CONFIG_ONENAND_SIM_VERSION_ID; | ||
59 | static int technology_id = CONFIG_ONENAND_SIM_TECHNOLOGY_ID; | ||
60 | static int boundary[] = { | ||
61 | CONFIG_FLEXONENAND_SIM_DIE0_BOUNDARY, | ||
62 | CONFIG_FLEXONENAND_SIM_DIE1_BOUNDARY, | ||
63 | }; | ||
64 | |||
65 | struct onenand_flash { | ||
66 | void __iomem *base; | ||
67 | void __iomem *data; | ||
68 | }; | ||
69 | |||
70 | #define ONENAND_CORE(flash) (flash->data) | ||
71 | #define ONENAND_CORE_SPARE(flash, this, offset) \ | ||
72 | ((flash->data) + (this->chipsize) + (offset >> 5)) | ||
73 | |||
74 | #define ONENAND_MAIN_AREA(this, offset) \ | ||
75 | (this->base + ONENAND_DATARAM + offset) | ||
76 | |||
77 | #define ONENAND_SPARE_AREA(this, offset) \ | ||
78 | (this->base + ONENAND_SPARERAM + offset) | ||
79 | |||
80 | #define ONENAND_GET_WP_STATUS(this) \ | ||
81 | (readw(this->base + ONENAND_REG_WP_STATUS)) | ||
82 | |||
83 | #define ONENAND_SET_WP_STATUS(v, this) \ | ||
84 | (writew(v, this->base + ONENAND_REG_WP_STATUS)) | ||
85 | |||
86 | /* It has all 0xff chars */ | ||
87 | #define MAX_ONENAND_PAGESIZE (4096 + 128) | ||
88 | static unsigned char *ffchars; | ||
89 | |||
90 | #if CONFIG_FLEXONENAND | ||
91 | #define PARTITION_NAME "Flex-OneNAND simulator partition" | ||
92 | #else | ||
93 | #define PARTITION_NAME "OneNAND simulator partition" | ||
94 | #endif | ||
95 | |||
96 | static struct mtd_partition os_partitions[] = { | ||
97 | { | ||
98 | .name = PARTITION_NAME, | ||
99 | .offset = 0, | ||
100 | .size = MTDPART_SIZ_FULL, | ||
101 | }, | ||
102 | }; | ||
103 | |||
104 | /* | ||
105 | * OneNAND simulator mtd | ||
106 | */ | ||
107 | struct onenand_info { | ||
108 | struct mtd_info mtd; | ||
109 | struct mtd_partition *parts; | ||
110 | struct onenand_chip onenand; | ||
111 | struct onenand_flash flash; | ||
112 | }; | ||
113 | |||
114 | static struct onenand_info *info; | ||
115 | |||
116 | #define DPRINTK(format, args...) \ | ||
117 | do { \ | ||
118 | printk(KERN_DEBUG "%s[%d]: " format "\n", __func__, \ | ||
119 | __LINE__, ##args); \ | ||
120 | } while (0) | ||
121 | |||
122 | /** | ||
123 | * onenand_lock_handle - Handle Lock scheme | ||
124 | * @this: OneNAND device structure | ||
125 | * @cmd: The command to be sent | ||
126 | * | ||
127 | * Send lock command to OneNAND device. | ||
128 | * The lock scheme depends on chip type. | ||
129 | */ | ||
130 | static void onenand_lock_handle(struct onenand_chip *this, int cmd) | ||
131 | { | ||
132 | int block_lock_scheme; | ||
133 | int status; | ||
134 | |||
135 | status = ONENAND_GET_WP_STATUS(this); | ||
136 | block_lock_scheme = !(this->options & ONENAND_HAS_CONT_LOCK); | ||
137 | |||
138 | switch (cmd) { | ||
139 | case ONENAND_CMD_UNLOCK: | ||
140 | case ONENAND_CMD_UNLOCK_ALL: | ||
141 | if (block_lock_scheme) | ||
142 | ONENAND_SET_WP_STATUS(ONENAND_WP_US, this); | ||
143 | else | ||
144 | ONENAND_SET_WP_STATUS(status | ONENAND_WP_US, this); | ||
145 | break; | ||
146 | |||
147 | case ONENAND_CMD_LOCK: | ||
148 | if (block_lock_scheme) | ||
149 | ONENAND_SET_WP_STATUS(ONENAND_WP_LS, this); | ||
150 | else | ||
151 | ONENAND_SET_WP_STATUS(status | ONENAND_WP_LS, this); | ||
152 | break; | ||
153 | |||
154 | case ONENAND_CMD_LOCK_TIGHT: | ||
155 | if (block_lock_scheme) | ||
156 | ONENAND_SET_WP_STATUS(ONENAND_WP_LTS, this); | ||
157 | else | ||
158 | ONENAND_SET_WP_STATUS(status | ONENAND_WP_LTS, this); | ||
159 | break; | ||
160 | |||
161 | default: | ||
162 | break; | ||
163 | } | ||
164 | } | ||
165 | |||
166 | /** | ||
167 | * onenand_bootram_handle - Handle BootRAM area | ||
168 | * @this: OneNAND device structure | ||
169 | * @cmd: The command to be sent | ||
170 | * | ||
171 | * Emulate BootRAM area. It is possible to do basic operation using BootRAM. | ||
172 | */ | ||
173 | static void onenand_bootram_handle(struct onenand_chip *this, int cmd) | ||
174 | { | ||
175 | switch (cmd) { | ||
176 | case ONENAND_CMD_READID: | ||
177 | writew(manuf_id, this->base); | ||
178 | writew(device_id, this->base + 2); | ||
179 | writew(version_id, this->base + 4); | ||
180 | break; | ||
181 | |||
182 | default: | ||
183 | /* REVIST: Handle other commands */ | ||
184 | break; | ||
185 | } | ||
186 | } | ||
187 | |||
188 | /** | ||
189 | * onenand_update_interrupt - Set interrupt register | ||
190 | * @this: OneNAND device structure | ||
191 | * @cmd: The command to be sent | ||
192 | * | ||
193 | * Update interrupt register. The status depends on command. | ||
194 | */ | ||
195 | static void onenand_update_interrupt(struct onenand_chip *this, int cmd) | ||
196 | { | ||
197 | int interrupt = ONENAND_INT_MASTER; | ||
198 | |||
199 | switch (cmd) { | ||
200 | case ONENAND_CMD_READ: | ||
201 | case ONENAND_CMD_READOOB: | ||
202 | interrupt |= ONENAND_INT_READ; | ||
203 | break; | ||
204 | |||
205 | case ONENAND_CMD_PROG: | ||
206 | case ONENAND_CMD_PROGOOB: | ||
207 | interrupt |= ONENAND_INT_WRITE; | ||
208 | break; | ||
209 | |||
210 | case ONENAND_CMD_ERASE: | ||
211 | interrupt |= ONENAND_INT_ERASE; | ||
212 | break; | ||
213 | |||
214 | case ONENAND_CMD_RESET: | ||
215 | interrupt |= ONENAND_INT_RESET; | ||
216 | break; | ||
217 | |||
218 | default: | ||
219 | break; | ||
220 | } | ||
221 | |||
222 | writew(interrupt, this->base + ONENAND_REG_INTERRUPT); | ||
223 | } | ||
224 | |||
225 | /** | ||
226 | * onenand_check_overwrite - Check if over-write happened | ||
227 | * @dest: The destination pointer | ||
228 | * @src: The source pointer | ||
229 | * @count: The length to be check | ||
230 | * | ||
231 | * Returns: 0 on same, otherwise 1 | ||
232 | * | ||
233 | * Compare the source with destination | ||
234 | */ | ||
235 | static int onenand_check_overwrite(void *dest, void *src, size_t count) | ||
236 | { | ||
237 | unsigned int *s = (unsigned int *) src; | ||
238 | unsigned int *d = (unsigned int *) dest; | ||
239 | int i; | ||
240 | |||
241 | count >>= 2; | ||
242 | for (i = 0; i < count; i++) | ||
243 | if ((*s++ ^ *d++) != 0) | ||
244 | return 1; | ||
245 | |||
246 | return 0; | ||
247 | } | ||
248 | |||
249 | /** | ||
250 | * onenand_data_handle - Handle OneNAND Core and DataRAM | ||
251 | * @this: OneNAND device structure | ||
252 | * @cmd: The command to be sent | ||
253 | * @dataram: Which dataram used | ||
254 | * @offset: The offset to OneNAND Core | ||
255 | * | ||
256 | * Copy data from OneNAND Core to DataRAM (read) | ||
257 | * Copy data from DataRAM to OneNAND Core (write) | ||
258 | * Erase the OneNAND Core (erase) | ||
259 | */ | ||
260 | static void onenand_data_handle(struct onenand_chip *this, int cmd, | ||
261 | int dataram, unsigned int offset) | ||
262 | { | ||
263 | struct mtd_info *mtd = &info->mtd; | ||
264 | struct onenand_flash *flash = this->priv; | ||
265 | int main_offset, spare_offset, die = 0; | ||
266 | void __iomem *src; | ||
267 | void __iomem *dest; | ||
268 | unsigned int i; | ||
269 | static int pi_operation; | ||
270 | int erasesize, rgn; | ||
271 | |||
272 | if (dataram) { | ||
273 | main_offset = mtd->writesize; | ||
274 | spare_offset = mtd->oobsize; | ||
275 | } else { | ||
276 | main_offset = 0; | ||
277 | spare_offset = 0; | ||
278 | } | ||
279 | |||
280 | if (pi_operation) { | ||
281 | die = readw(this->base + ONENAND_REG_START_ADDRESS2); | ||
282 | die >>= ONENAND_DDP_SHIFT; | ||
283 | } | ||
284 | |||
285 | switch (cmd) { | ||
286 | case FLEXONENAND_CMD_PI_ACCESS: | ||
287 | pi_operation = 1; | ||
288 | break; | ||
289 | |||
290 | case ONENAND_CMD_RESET: | ||
291 | pi_operation = 0; | ||
292 | break; | ||
293 | |||
294 | case ONENAND_CMD_READ: | ||
295 | src = ONENAND_CORE(flash) + offset; | ||
296 | dest = ONENAND_MAIN_AREA(this, main_offset); | ||
297 | if (pi_operation) { | ||
298 | writew(boundary[die], this->base + ONENAND_DATARAM); | ||
299 | break; | ||
300 | } | ||
301 | memcpy(dest, src, mtd->writesize); | ||
302 | /* Fall through */ | ||
303 | |||
304 | case ONENAND_CMD_READOOB: | ||
305 | src = ONENAND_CORE_SPARE(flash, this, offset); | ||
306 | dest = ONENAND_SPARE_AREA(this, spare_offset); | ||
307 | memcpy(dest, src, mtd->oobsize); | ||
308 | break; | ||
309 | |||
310 | case ONENAND_CMD_PROG: | ||
311 | src = ONENAND_MAIN_AREA(this, main_offset); | ||
312 | dest = ONENAND_CORE(flash) + offset; | ||
313 | if (pi_operation) { | ||
314 | boundary[die] = readw(this->base + ONENAND_DATARAM); | ||
315 | break; | ||
316 | } | ||
317 | /* To handle partial write */ | ||
318 | for (i = 0; i < (1 << mtd->subpage_sft); i++) { | ||
319 | int off = i * this->subpagesize; | ||
320 | if (!memcmp(src + off, ffchars, this->subpagesize)) | ||
321 | continue; | ||
322 | if (memcmp(dest + off, ffchars, this->subpagesize) && | ||
323 | onenand_check_overwrite(dest + off, src + off, this->subpagesize)) | ||
324 | printk(KERN_ERR "over-write happened at 0x%08x\n", offset); | ||
325 | memcpy(dest + off, src + off, this->subpagesize); | ||
326 | } | ||
327 | /* Fall through */ | ||
328 | |||
329 | case ONENAND_CMD_PROGOOB: | ||
330 | src = ONENAND_SPARE_AREA(this, spare_offset); | ||
331 | /* Check all data is 0xff chars */ | ||
332 | if (!memcmp(src, ffchars, mtd->oobsize)) | ||
333 | break; | ||
334 | |||
335 | dest = ONENAND_CORE_SPARE(flash, this, offset); | ||
336 | if (memcmp(dest, ffchars, mtd->oobsize) && | ||
337 | onenand_check_overwrite(dest, src, mtd->oobsize)) | ||
338 | printk(KERN_ERR "OOB: over-write happened at 0x%08x\n", | ||
339 | offset); | ||
340 | memcpy(dest, src, mtd->oobsize); | ||
341 | break; | ||
342 | |||
343 | case ONENAND_CMD_ERASE: | ||
344 | if (pi_operation) | ||
345 | break; | ||
346 | |||
347 | if (FLEXONENAND(this)) { | ||
348 | rgn = flexonenand_region(mtd, offset); | ||
349 | erasesize = mtd->eraseregions[rgn].erasesize; | ||
350 | } else | ||
351 | erasesize = mtd->erasesize; | ||
352 | |||
353 | memset(ONENAND_CORE(flash) + offset, 0xff, erasesize); | ||
354 | memset(ONENAND_CORE_SPARE(flash, this, offset), 0xff, | ||
355 | (erasesize >> 5)); | ||
356 | break; | ||
357 | |||
358 | default: | ||
359 | break; | ||
360 | } | ||
361 | } | ||
362 | |||
363 | /** | ||
364 | * onenand_command_handle - Handle command | ||
365 | * @this: OneNAND device structure | ||
366 | * @cmd: The command to be sent | ||
367 | * | ||
368 | * Emulate OneNAND command. | ||
369 | */ | ||
370 | static void onenand_command_handle(struct onenand_chip *this, int cmd) | ||
371 | { | ||
372 | unsigned long offset = 0; | ||
373 | int block = -1, page = -1, bufferram = -1; | ||
374 | int dataram = 0; | ||
375 | |||
376 | switch (cmd) { | ||
377 | case ONENAND_CMD_UNLOCK: | ||
378 | case ONENAND_CMD_LOCK: | ||
379 | case ONENAND_CMD_LOCK_TIGHT: | ||
380 | case ONENAND_CMD_UNLOCK_ALL: | ||
381 | onenand_lock_handle(this, cmd); | ||
382 | break; | ||
383 | |||
384 | case ONENAND_CMD_BUFFERRAM: | ||
385 | /* Do nothing */ | ||
386 | return; | ||
387 | |||
388 | default: | ||
389 | block = (int) readw(this->base + ONENAND_REG_START_ADDRESS1); | ||
390 | if (block & (1 << ONENAND_DDP_SHIFT)) { | ||
391 | block &= ~(1 << ONENAND_DDP_SHIFT); | ||
392 | /* The half of chip block */ | ||
393 | block += this->chipsize >> (this->erase_shift + 1); | ||
394 | } | ||
395 | if (cmd == ONENAND_CMD_ERASE) | ||
396 | break; | ||
397 | |||
398 | page = (int) readw(this->base + ONENAND_REG_START_ADDRESS8); | ||
399 | page = (page >> ONENAND_FPA_SHIFT); | ||
400 | bufferram = (int) readw(this->base + ONENAND_REG_START_BUFFER); | ||
401 | bufferram >>= ONENAND_BSA_SHIFT; | ||
402 | bufferram &= ONENAND_BSA_DATARAM1; | ||
403 | dataram = (bufferram == ONENAND_BSA_DATARAM1) ? 1 : 0; | ||
404 | break; | ||
405 | } | ||
406 | |||
407 | if (block != -1) | ||
408 | offset = onenand_addr(this, block); | ||
409 | |||
410 | if (page != -1) | ||
411 | offset += page << this->page_shift; | ||
412 | |||
413 | onenand_data_handle(this, cmd, dataram, offset); | ||
414 | |||
415 | onenand_update_interrupt(this, cmd); | ||
416 | } | ||
417 | |||
418 | /** | ||
419 | * onenand_writew - [OneNAND Interface] Emulate write operation | ||
420 | * @value: value to write | ||
421 | * @addr: address to write | ||
422 | * | ||
423 | * Write OneNAND register with value | ||
424 | */ | ||
425 | static void onenand_writew(unsigned short value, void __iomem * addr) | ||
426 | { | ||
427 | struct onenand_chip *this = info->mtd.priv; | ||
428 | |||
429 | /* BootRAM handling */ | ||
430 | if (addr < this->base + ONENAND_DATARAM) { | ||
431 | onenand_bootram_handle(this, value); | ||
432 | return; | ||
433 | } | ||
434 | /* Command handling */ | ||
435 | if (addr == this->base + ONENAND_REG_COMMAND) | ||
436 | onenand_command_handle(this, value); | ||
437 | |||
438 | writew(value, addr); | ||
439 | } | ||
440 | |||
441 | /** | ||
442 | * flash_init - Initialize OneNAND simulator | ||
443 | * @flash: OneNAND simulator data strucutres | ||
444 | * | ||
445 | * Initialize OneNAND simulator. | ||
446 | */ | ||
447 | static int __init flash_init(struct onenand_flash *flash) | ||
448 | { | ||
449 | int density, size; | ||
450 | int buffer_size; | ||
451 | |||
452 | flash->base = kzalloc(131072, GFP_KERNEL); | ||
453 | if (!flash->base) { | ||
454 | printk(KERN_ERR "Unable to allocate base address.\n"); | ||
455 | return -ENOMEM; | ||
456 | } | ||
457 | |||
458 | density = device_id >> ONENAND_DEVICE_DENSITY_SHIFT; | ||
459 | density &= ONENAND_DEVICE_DENSITY_MASK; | ||
460 | size = ((16 << 20) << density); | ||
461 | |||
462 | ONENAND_CORE(flash) = vmalloc(size + (size >> 5)); | ||
463 | if (!ONENAND_CORE(flash)) { | ||
464 | printk(KERN_ERR "Unable to allocate nand core address.\n"); | ||
465 | kfree(flash->base); | ||
466 | return -ENOMEM; | ||
467 | } | ||
468 | |||
469 | memset(ONENAND_CORE(flash), 0xff, size + (size >> 5)); | ||
470 | |||
471 | /* Setup registers */ | ||
472 | writew(manuf_id, flash->base + ONENAND_REG_MANUFACTURER_ID); | ||
473 | writew(device_id, flash->base + ONENAND_REG_DEVICE_ID); | ||
474 | writew(version_id, flash->base + ONENAND_REG_VERSION_ID); | ||
475 | writew(technology_id, flash->base + ONENAND_REG_TECHNOLOGY); | ||
476 | |||
477 | if (density < 2 && (!CONFIG_FLEXONENAND)) | ||
478 | buffer_size = 0x0400; /* 1KiB page */ | ||
479 | else | ||
480 | buffer_size = 0x0800; /* 2KiB page */ | ||
481 | writew(buffer_size, flash->base + ONENAND_REG_DATA_BUFFER_SIZE); | ||
482 | |||
483 | return 0; | ||
484 | } | ||
485 | |||
486 | /** | ||
487 | * flash_exit - Clean up OneNAND simulator | ||
488 | * @flash: OneNAND simulator data structures | ||
489 | * | ||
490 | * Clean up OneNAND simulator. | ||
491 | */ | ||
492 | static void flash_exit(struct onenand_flash *flash) | ||
493 | { | ||
494 | vfree(ONENAND_CORE(flash)); | ||
495 | kfree(flash->base); | ||
496 | } | ||
497 | |||
498 | static int __init onenand_sim_init(void) | ||
499 | { | ||
500 | /* Allocate all 0xff chars pointer */ | ||
501 | ffchars = kmalloc(MAX_ONENAND_PAGESIZE, GFP_KERNEL); | ||
502 | if (!ffchars) { | ||
503 | printk(KERN_ERR "Unable to allocate ff chars.\n"); | ||
504 | return -ENOMEM; | ||
505 | } | ||
506 | memset(ffchars, 0xff, MAX_ONENAND_PAGESIZE); | ||
507 | |||
508 | /* Allocate OneNAND simulator mtd pointer */ | ||
509 | info = kzalloc(sizeof(struct onenand_info), GFP_KERNEL); | ||
510 | if (!info) { | ||
511 | printk(KERN_ERR "Unable to allocate core structures.\n"); | ||
512 | kfree(ffchars); | ||
513 | return -ENOMEM; | ||
514 | } | ||
515 | |||
516 | /* Override write_word function */ | ||
517 | info->onenand.write_word = onenand_writew; | ||
518 | |||
519 | if (flash_init(&info->flash)) { | ||
520 | printk(KERN_ERR "Unable to allocate flash.\n"); | ||
521 | kfree(ffchars); | ||
522 | kfree(info); | ||
523 | return -ENOMEM; | ||
524 | } | ||
525 | |||
526 | info->parts = os_partitions; | ||
527 | |||
528 | info->onenand.base = info->flash.base; | ||
529 | info->onenand.priv = &info->flash; | ||
530 | |||
531 | info->mtd.name = "OneNAND simulator"; | ||
532 | info->mtd.priv = &info->onenand; | ||
533 | info->mtd.owner = THIS_MODULE; | ||
534 | |||
535 | if (onenand_scan(&info->mtd, 1)) { | ||
536 | flash_exit(&info->flash); | ||
537 | kfree(ffchars); | ||
538 | kfree(info); | ||
539 | return -ENXIO; | ||
540 | } | ||
541 | |||
542 | mtd_device_register(&info->mtd, info->parts, | ||
543 | ARRAY_SIZE(os_partitions)); | ||
544 | |||
545 | return 0; | ||
546 | } | ||
547 | |||
548 | static void __exit onenand_sim_exit(void) | ||
549 | { | ||
550 | struct onenand_chip *this = info->mtd.priv; | ||
551 | struct onenand_flash *flash = this->priv; | ||
552 | |||
553 | onenand_release(&info->mtd); | ||
554 | flash_exit(flash); | ||
555 | kfree(ffchars); | ||
556 | kfree(info); | ||
557 | } | ||
558 | |||
559 | module_init(onenand_sim_init); | ||
560 | module_exit(onenand_sim_exit); | ||
561 | |||
562 | MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); | ||
563 | MODULE_DESCRIPTION("The OneNAND flash simulator"); | ||
564 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c index fa385a368a56..09077067b0c8 100644 --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c | |||
@@ -18,7 +18,7 @@ | |||
18 | 18 | ||
19 | #include "ssb_private.h" | 19 | #include "ssb_private.h" |
20 | 20 | ||
21 | static const char *part_probes[] = { "bcm47xxpart", NULL }; | 21 | static const char * const part_probes[] = { "bcm47xxpart", NULL }; |
22 | 22 | ||
23 | static struct physmap_flash_data ssb_pflash_data = { | 23 | static struct physmap_flash_data ssb_pflash_data = { |
24 | .part_probe_types = part_probes, | 24 | .part_probe_types = part_probes, |
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index f9ac2897b86b..a5cf4e8d6818 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h | |||
@@ -362,10 +362,10 @@ struct mtd_partition; | |||
362 | struct mtd_part_parser_data; | 362 | struct mtd_part_parser_data; |
363 | 363 | ||
364 | extern int mtd_device_parse_register(struct mtd_info *mtd, | 364 | extern int mtd_device_parse_register(struct mtd_info *mtd, |
365 | const char **part_probe_types, | 365 | const char * const *part_probe_types, |
366 | struct mtd_part_parser_data *parser_data, | 366 | struct mtd_part_parser_data *parser_data, |
367 | const struct mtd_partition *defparts, | 367 | const struct mtd_partition *defparts, |
368 | int defnr_parts); | 368 | int defnr_parts); |
369 | #define mtd_device_register(master, parts, nr_parts) \ | 369 | #define mtd_device_register(master, parts, nr_parts) \ |
370 | mtd_device_parse_register(master, NULL, NULL, parts, nr_parts) | 370 | mtd_device_parse_register(master, NULL, NULL, parts, nr_parts) |
371 | extern int mtd_device_unregister(struct mtd_info *master); | 371 | extern int mtd_device_unregister(struct mtd_info *master); |
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index ef52d9c91459..ab6363443ce8 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
@@ -86,7 +86,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); | |||
86 | #define NAND_CMD_READOOB 0x50 | 86 | #define NAND_CMD_READOOB 0x50 |
87 | #define NAND_CMD_ERASE1 0x60 | 87 | #define NAND_CMD_ERASE1 0x60 |
88 | #define NAND_CMD_STATUS 0x70 | 88 | #define NAND_CMD_STATUS 0x70 |
89 | #define NAND_CMD_STATUS_MULTI 0x71 | ||
90 | #define NAND_CMD_SEQIN 0x80 | 89 | #define NAND_CMD_SEQIN 0x80 |
91 | #define NAND_CMD_RNDIN 0x85 | 90 | #define NAND_CMD_RNDIN 0x85 |
92 | #define NAND_CMD_READID 0x90 | 91 | #define NAND_CMD_READID 0x90 |
@@ -105,25 +104,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); | |||
105 | #define NAND_CMD_RNDOUTSTART 0xE0 | 104 | #define NAND_CMD_RNDOUTSTART 0xE0 |
106 | #define NAND_CMD_CACHEDPROG 0x15 | 105 | #define NAND_CMD_CACHEDPROG 0x15 |
107 | 106 | ||
108 | /* Extended commands for AG-AND device */ | ||
109 | /* | ||
110 | * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but | ||
111 | * there is no way to distinguish that from NAND_CMD_READ0 | ||
112 | * until the remaining sequence of commands has been completed | ||
113 | * so add a high order bit and mask it off in the command. | ||
114 | */ | ||
115 | #define NAND_CMD_DEPLETE1 0x100 | ||
116 | #define NAND_CMD_DEPLETE2 0x38 | ||
117 | #define NAND_CMD_STATUS_MULTI 0x71 | ||
118 | #define NAND_CMD_STATUS_ERROR 0x72 | ||
119 | /* multi-bank error status (banks 0-3) */ | ||
120 | #define NAND_CMD_STATUS_ERROR0 0x73 | ||
121 | #define NAND_CMD_STATUS_ERROR1 0x74 | ||
122 | #define NAND_CMD_STATUS_ERROR2 0x75 | ||
123 | #define NAND_CMD_STATUS_ERROR3 0x76 | ||
124 | #define NAND_CMD_STATUS_RESET 0x7f | ||
125 | #define NAND_CMD_STATUS_CLEAR 0xff | ||
126 | |||
127 | #define NAND_CMD_NONE -1 | 107 | #define NAND_CMD_NONE -1 |
128 | 108 | ||
129 | /* Status bits */ | 109 | /* Status bits */ |
@@ -165,28 +145,8 @@ typedef enum { | |||
165 | */ | 145 | */ |
166 | /* Buswidth is 16 bit */ | 146 | /* Buswidth is 16 bit */ |
167 | #define NAND_BUSWIDTH_16 0x00000002 | 147 | #define NAND_BUSWIDTH_16 0x00000002 |
168 | /* Device supports partial programming without padding */ | ||
169 | #define NAND_NO_PADDING 0x00000004 | ||
170 | /* Chip has cache program function */ | 148 | /* Chip has cache program function */ |
171 | #define NAND_CACHEPRG 0x00000008 | 149 | #define NAND_CACHEPRG 0x00000008 |
172 | /* Chip has copy back function */ | ||
173 | #define NAND_COPYBACK 0x00000010 | ||
174 | /* | ||
175 | * AND Chip which has 4 banks and a confusing page / block | ||
176 | * assignment. See Renesas datasheet for further information. | ||
177 | */ | ||
178 | #define NAND_IS_AND 0x00000020 | ||
179 | /* | ||
180 | * Chip has a array of 4 pages which can be read without | ||
181 | * additional ready /busy waits. | ||
182 | */ | ||
183 | #define NAND_4PAGE_ARRAY 0x00000040 | ||
184 | /* | ||
185 | * Chip requires that BBT is periodically rewritten to prevent | ||
186 | * bits from adjacent blocks from 'leaking' in altering data. | ||
187 | * This happens with the Renesas AG-AND chips, possibly others. | ||
188 | */ | ||
189 | #define BBT_AUTO_REFRESH 0x00000080 | ||
190 | /* | 150 | /* |
191 | * Chip requires ready check on read (for auto-incremented sequential read). | 151 | * Chip requires ready check on read (for auto-incremented sequential read). |
192 | * True only for small page devices; large page devices do not support | 152 | * True only for small page devices; large page devices do not support |
@@ -207,13 +167,10 @@ typedef enum { | |||
207 | #define NAND_SUBPAGE_READ 0x00001000 | 167 | #define NAND_SUBPAGE_READ 0x00001000 |
208 | 168 | ||
209 | /* Options valid for Samsung large page devices */ | 169 | /* Options valid for Samsung large page devices */ |
210 | #define NAND_SAMSUNG_LP_OPTIONS \ | 170 | #define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG |
211 | (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) | ||
212 | 171 | ||
213 | /* Macros to identify the above */ | 172 | /* Macros to identify the above */ |
214 | #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) | ||
215 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) | 173 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) |
216 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) | ||
217 | #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) | 174 | #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) |
218 | 175 | ||
219 | /* Non chip related options */ | 176 | /* Non chip related options */ |
@@ -361,6 +318,7 @@ struct nand_hw_control { | |||
361 | * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error | 318 | * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error |
362 | * @read_subpage: function to read parts of the page covered by ECC; | 319 | * @read_subpage: function to read parts of the page covered by ECC; |
363 | * returns same as read_page() | 320 | * returns same as read_page() |
321 | * @write_subpage: function to write parts of the page covered by ECC. | ||
364 | * @write_page: function to write a page according to the ECC generator | 322 | * @write_page: function to write a page according to the ECC generator |
365 | * requirements. | 323 | * requirements. |
366 | * @write_oob_raw: function to write chip OOB data without ECC | 324 | * @write_oob_raw: function to write chip OOB data without ECC |
@@ -392,6 +350,9 @@ struct nand_ecc_ctrl { | |||
392 | uint8_t *buf, int oob_required, int page); | 350 | uint8_t *buf, int oob_required, int page); |
393 | int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, | 351 | int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, |
394 | uint32_t offs, uint32_t len, uint8_t *buf); | 352 | uint32_t offs, uint32_t len, uint8_t *buf); |
353 | int (*write_subpage)(struct mtd_info *mtd, struct nand_chip *chip, | ||
354 | uint32_t offset, uint32_t data_len, | ||
355 | const uint8_t *data_buf, int oob_required); | ||
395 | int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, | 356 | int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, |
396 | const uint8_t *buf, int oob_required); | 357 | const uint8_t *buf, int oob_required); |
397 | int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, | 358 | int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, |
@@ -527,8 +488,8 @@ struct nand_chip { | |||
527 | int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, | 488 | int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, |
528 | int status, int page); | 489 | int status, int page); |
529 | int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, | 490 | int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, |
530 | const uint8_t *buf, int oob_required, int page, | 491 | uint32_t offset, int data_len, const uint8_t *buf, |
531 | int cached, int raw); | 492 | int oob_required, int page, int cached, int raw); |
532 | int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip, | 493 | int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip, |
533 | int feature_addr, uint8_t *subfeature_para); | 494 | int feature_addr, uint8_t *subfeature_para); |
534 | int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip, | 495 | int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip, |
@@ -589,25 +550,65 @@ struct nand_chip { | |||
589 | #define NAND_MFR_MACRONIX 0xc2 | 550 | #define NAND_MFR_MACRONIX 0xc2 |
590 | #define NAND_MFR_EON 0x92 | 551 | #define NAND_MFR_EON 0x92 |
591 | 552 | ||
553 | /* The maximum expected count of bytes in the NAND ID sequence */ | ||
554 | #define NAND_MAX_ID_LEN 8 | ||
555 | |||
556 | /* | ||
557 | * A helper for defining older NAND chips where the second ID byte fully | ||
558 | * defined the chip, including the geometry (chip size, eraseblock size, page | ||
559 | * size). All these chips have 512 bytes NAND page size. | ||
560 | */ | ||
561 | #define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \ | ||
562 | { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \ | ||
563 | .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) } | ||
564 | |||
565 | /* | ||
566 | * A helper for defining newer chips which report their page size and | ||
567 | * eraseblock size via the extended ID bytes. | ||
568 | * | ||
569 | * The real difference between LEGACY_ID_NAND and EXTENDED_ID_NAND is that with | ||
570 | * EXTENDED_ID_NAND, manufacturers overloaded the same device ID so that the | ||
571 | * device ID now only represented a particular total chip size (and voltage, | ||
572 | * buswidth), and the page size, eraseblock size, and OOB size could vary while | ||
573 | * using the same device ID. | ||
574 | */ | ||
575 | #define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \ | ||
576 | { .name = (nm), {{ .dev_id = (devid) }}, .chipsize = (chipsz), \ | ||
577 | .options = (opts) } | ||
578 | |||
592 | /** | 579 | /** |
593 | * struct nand_flash_dev - NAND Flash Device ID Structure | 580 | * struct nand_flash_dev - NAND Flash Device ID Structure |
594 | * @name: Identify the device type | 581 | * @name: a human-readable name of the NAND chip |
595 | * @id: device ID code | 582 | * @dev_id: the device ID (the second byte of the full chip ID array) |
596 | * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 | 583 | * @mfr_id: manufecturer ID part of the full chip ID array (refers the same |
597 | * If the pagesize is 0, then the real pagesize | 584 | * memory address as @id[0]) |
598 | * and the eraseize are determined from the | 585 | * @dev_id: device ID part of the full chip ID array (refers the same memory |
599 | * extended id bytes in the chip | 586 | * address as @id[1]) |
600 | * @erasesize: Size of an erase block in the flash device. | 587 | * @id: full device ID array |
601 | * @chipsize: Total chipsize in Mega Bytes | 588 | * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as |
602 | * @options: Bitfield to store chip relevant options | 589 | * well as the eraseblock size) is determined from the extended NAND |
590 | * chip ID array) | ||
591 | * @chipsize: total chip size in MiB | ||
592 | * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) | ||
593 | * @options: stores various chip bit options | ||
594 | * @id_len: The valid length of the @id. | ||
595 | * @oobsize: OOB size | ||
603 | */ | 596 | */ |
604 | struct nand_flash_dev { | 597 | struct nand_flash_dev { |
605 | char *name; | 598 | char *name; |
606 | int id; | 599 | union { |
607 | unsigned long pagesize; | 600 | struct { |
608 | unsigned long chipsize; | 601 | uint8_t mfr_id; |
609 | unsigned long erasesize; | 602 | uint8_t dev_id; |
610 | unsigned long options; | 603 | }; |
604 | uint8_t id[NAND_MAX_ID_LEN]; | ||
605 | }; | ||
606 | unsigned int pagesize; | ||
607 | unsigned int chipsize; | ||
608 | unsigned int erasesize; | ||
609 | unsigned int options; | ||
610 | uint16_t id_len; | ||
611 | uint16_t oobsize; | ||
611 | }; | 612 | }; |
612 | 613 | ||
613 | /** | 614 | /** |
diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index d2887e76b7f6..aa6a2633c2da 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h | |||
@@ -30,7 +30,7 @@ struct physmap_flash_data { | |||
30 | unsigned int pfow_base; | 30 | unsigned int pfow_base; |
31 | char *probe_type; | 31 | char *probe_type; |
32 | struct mtd_partition *parts; | 32 | struct mtd_partition *parts; |
33 | const char **part_probe_types; | 33 | const char * const *part_probe_types; |
34 | }; | 34 | }; |
35 | 35 | ||
36 | #endif /* __LINUX_MTD_PHYSMAP__ */ | 36 | #endif /* __LINUX_MTD_PHYSMAP__ */ |
diff --git a/include/linux/mtd/plat-ram.h b/include/linux/mtd/plat-ram.h index e07890aff1cf..44212d65aa97 100644 --- a/include/linux/mtd/plat-ram.h +++ b/include/linux/mtd/plat-ram.h | |||
@@ -20,8 +20,8 @@ | |||
20 | 20 | ||
21 | struct platdata_mtd_ram { | 21 | struct platdata_mtd_ram { |
22 | const char *mapname; | 22 | const char *mapname; |
23 | const char **map_probes; | 23 | const char * const *map_probes; |
24 | const char **probes; | 24 | const char * const *probes; |
25 | struct mtd_partition *partitions; | 25 | struct mtd_partition *partitions; |
26 | int nr_partitions; | 26 | int nr_partitions; |
27 | int bankwidth; | 27 | int bankwidth; |
diff --git a/include/linux/platform_data/elm.h b/include/linux/platform_data/elm.h index 1bd5244d1dcd..bf0a83b7ed9d 100644 --- a/include/linux/platform_data/elm.h +++ b/include/linux/platform_data/elm.h | |||
@@ -50,5 +50,5 @@ struct elm_errorvec { | |||
50 | 50 | ||
51 | void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, | 51 | void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, |
52 | struct elm_errorvec *err_vec); | 52 | struct elm_errorvec *err_vec); |
53 | void elm_config(struct device *dev, enum bch_ecc bch_type); | 53 | int elm_config(struct device *dev, enum bch_ecc bch_type); |
54 | #endif /* __ELM_H */ | 54 | #endif /* __ELM_H */ |