1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/serial/bfin_sport_uart.h
index abe03614e4df..9791fcc80a74 100644
--- a/drivers/serial/bfin_sport_uart.h
+++ b/drivers/serial/bfin_sport_uart.h
@@ -37,7 +37,21 @@
 #define SPORT_GET_TFSDIV(sport)         bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))
 #define SPORT_GET_TX(sport)             bfin_read16(((sport)->port.membase + OFFSET_TX))
 #define SPORT_GET_RX(sport)             bfin_read16(((sport)->port.membase + OFFSET_RX))
-#define SPORT_GET_RX32(sport)           bfin_read32(((sport)->port.membase + OFFSET_RX))
+/*
+ * If another interrupt fires while doing a 32-bit read from RX FIFO,
+ * a fake RX underflow error will be generated.  So disable interrupts
+ * to prevent interruption while reading the FIFO.
+ */
+#define SPORT_GET_RX32(sport) \
+({ \
+        unsigned int __ret; \
+        if (ANOMALY_05000473) \
+                local_irq_disable(); \
+        __ret = bfin_read32((sport)->port.membase + OFFSET_RX); \
+        if (ANOMALY_05000473) \
+                local_irq_enable(); \
+        __ret; \
+})
 #define SPORT_GET_RCR1(sport)           bfin_read16(((sport)->port.membase + OFFSET_RCR1))
 #define SPORT_GET_RCR2(sport)           bfin_read16(((sport)->port.membase + OFFSET_RCR2))
 #define SPORT_GET_RCLKDIV(sport)        bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))

diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/serial/bfin_sport_uart.h index abe03614e4df..9791fcc80a74 100644 --- a/drivers/serial/bfin_sport_uart.h +++ b/drivers/serial/bfin_sport_uart.h
@@ -37,7 +37,21 @@
37	#define SPORT_GET_TFSDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))	37	#define SPORT_GET_TFSDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))
38	#define SPORT_GET_TX(sport) bfin_read16(((sport)->port.membase + OFFSET_TX))	38	#define SPORT_GET_TX(sport) bfin_read16(((sport)->port.membase + OFFSET_TX))
39	#define SPORT_GET_RX(sport) bfin_read16(((sport)->port.membase + OFFSET_RX))	39	#define SPORT_GET_RX(sport) bfin_read16(((sport)->port.membase + OFFSET_RX))
40	#define SPORT_GET_RX32(sport) bfin_read32(((sport)->port.membase + OFFSET_RX))	40	/*
		41	* If another interrupt fires while doing a 32-bit read from RX FIFO,
		42	* a fake RX underflow error will be generated. So disable interrupts
		43	* to prevent interruption while reading the FIFO.
		44	*/
		45	#define SPORT_GET_RX32(sport) \
		46	({ \
		47	unsigned int __ret; \
		48	if (ANOMALY_05000473) \
		49	local_irq_disable(); \
		50	__ret = bfin_read32((sport)->port.membase + OFFSET_RX); \
		51	if (ANOMALY_05000473) \
		52	local_irq_enable(); \
		53	__ret; \
		54	})
41	#define SPORT_GET_RCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR1))	55	#define SPORT_GET_RCR1(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR1))
42	#define SPORT_GET_RCR2(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR2))	56	#define SPORT_GET_RCR2(sport) bfin_read16(((sport)->port.membase + OFFSET_RCR2))
43	#define SPORT_GET_RCLKDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))	57	#define SPORT_GET_RCLKDIV(sport) bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))