diff options
-rw-r--r-- | drivers/spi/Kconfig | 2 | ||||
-rw-r--r-- | drivers/spi/spi-atmel.c | 7 | ||||
-rw-r--r-- | drivers/spi/spi-bcm2835.c | 1 | ||||
-rw-r--r-- | drivers/spi/spi-bcm63xx-hsspi.c | 3 | ||||
-rw-r--r-- | drivers/spi/spi-bcm63xx.c | 3 | ||||
-rw-r--r-- | drivers/spi/spi-clps711x.c | 226 | ||||
-rw-r--r-- | drivers/spi/spi-coldfire-qspi.c | 112 | ||||
-rw-r--r-- | drivers/spi/spi-davinci.c | 14 | ||||
-rw-r--r-- | drivers/spi/spi-efm32.c | 7 | ||||
-rw-r--r-- | drivers/spi/spi-falcon.c | 5 | ||||
-rw-r--r-- | drivers/spi/spi-imx.c | 2 | ||||
-rw-r--r-- | drivers/spi/spi-mpc52xx.c | 3 | ||||
-rw-r--r-- | drivers/spi/spi-octeon.c | 2 | ||||
-rw-r--r-- | drivers/spi/spi-omap-uwire.c | 6 | ||||
-rw-r--r-- | drivers/spi/spi-sh-hspi.c | 1 | ||||
-rw-r--r-- | drivers/spi/spi-tegra114.c | 22 | ||||
-rw-r--r-- | drivers/spi/spi-tegra20-sflash.c | 25 | ||||
-rw-r--r-- | drivers/spi/spi-tegra20-slink.c | 19 | ||||
-rw-r--r-- | drivers/spi/spi-ti-qspi.c | 1 | ||||
-rw-r--r-- | drivers/spi/spi.c | 3 |
20 files changed, 175 insertions, 289 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 581ee2a8856b..a79e89f63b71 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -150,7 +150,7 @@ config SPI_BUTTERFLY | |||
150 | 150 | ||
151 | config SPI_CLPS711X | 151 | config SPI_CLPS711X |
152 | tristate "CLPS711X host SPI controller" | 152 | tristate "CLPS711X host SPI controller" |
153 | depends on ARCH_CLPS711X | 153 | depends on ARCH_CLPS711X || COMPILE_TEST |
154 | help | 154 | help |
155 | This enables dedicated general purpose SPI/Microwire1-compatible | 155 | This enables dedicated general purpose SPI/Microwire1-compatible |
156 | master mode interface (SSI1) for CLPS711X-based CPUs. | 156 | master mode interface (SSI1) for CLPS711X-based CPUs. |
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index bc879930470b..9641237295cd 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c | |||
@@ -994,13 +994,6 @@ static int atmel_spi_setup(struct spi_device *spi) | |||
994 | 994 | ||
995 | as = spi_master_get_devdata(spi->master); | 995 | as = spi_master_get_devdata(spi->master); |
996 | 996 | ||
997 | if (spi->chip_select > spi->master->num_chipselect) { | ||
998 | dev_dbg(&spi->dev, | ||
999 | "setup: invalid chipselect %u (%u defined)\n", | ||
1000 | spi->chip_select, spi->master->num_chipselect); | ||
1001 | return -EINVAL; | ||
1002 | } | ||
1003 | |||
1004 | /* see notes above re chipselect */ | 997 | /* see notes above re chipselect */ |
1005 | if (!atmel_spi_is_v2(as) | 998 | if (!atmel_spi_is_v2(as) |
1006 | && spi->chip_select == 0 | 999 | && spi->chip_select == 0 |
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 8a89dd1f2654..69167456ec1e 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c | |||
@@ -315,7 +315,6 @@ static int bcm2835_spi_probe(struct platform_device *pdev) | |||
315 | 315 | ||
316 | master->mode_bits = BCM2835_SPI_MODE_BITS; | 316 | master->mode_bits = BCM2835_SPI_MODE_BITS; |
317 | master->bits_per_word_mask = SPI_BPW_MASK(8); | 317 | master->bits_per_word_mask = SPI_BPW_MASK(8); |
318 | master->bus_num = -1; | ||
319 | master->num_chipselect = 3; | 318 | master->num_chipselect = 3; |
320 | master->transfer_one_message = bcm2835_spi_transfer_one; | 319 | master->transfer_one_message = bcm2835_spi_transfer_one; |
321 | master->dev.of_node = pdev->dev.of_node; | 320 | master->dev.of_node = pdev->dev.of_node; |
diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 13bbce349ed9..5a211e98383b 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c | |||
@@ -180,7 +180,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) | |||
180 | while (pending > 0) { | 180 | while (pending > 0) { |
181 | int curr_step = min_t(int, step_size, pending); | 181 | int curr_step = min_t(int, step_size, pending); |
182 | 182 | ||
183 | init_completion(&bs->done); | 183 | reinit_completion(&bs->done); |
184 | if (tx) { | 184 | if (tx) { |
185 | memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); | 185 | memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); |
186 | tx += curr_step; | 186 | tx += curr_step; |
@@ -369,6 +369,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) | |||
369 | bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); | 369 | bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); |
370 | 370 | ||
371 | mutex_init(&bs->bus_mutex); | 371 | mutex_init(&bs->bus_mutex); |
372 | init_completion(&bs->done); | ||
372 | 373 | ||
373 | master->bus_num = HSSPI_BUS_NUM; | 374 | master->bus_num = HSSPI_BUS_NUM; |
374 | master->num_chipselect = 8; | 375 | master->num_chipselect = 8; |
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index b3d719a9667a..c1cd2e0f54d1 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c | |||
@@ -167,7 +167,7 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, | |||
167 | transfer_list); | 167 | transfer_list); |
168 | } | 168 | } |
169 | 169 | ||
170 | init_completion(&bs->done); | 170 | reinit_completion(&bs->done); |
171 | 171 | ||
172 | /* Fill in the Message control register */ | 172 | /* Fill in the Message control register */ |
173 | msg_ctl = (len << SPI_BYTE_CNT_SHIFT); | 173 | msg_ctl = (len << SPI_BYTE_CNT_SHIFT); |
@@ -351,6 +351,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) | |||
351 | } | 351 | } |
352 | 352 | ||
353 | bs = spi_master_get_devdata(master); | 353 | bs = spi_master_get_devdata(master); |
354 | init_completion(&bs->done); | ||
354 | 355 | ||
355 | platform_set_drvdata(pdev, master); | 356 | platform_set_drvdata(pdev, master); |
356 | bs->pdev = pdev; | 357 | bs->pdev = pdev; |
diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index 374ba4a48a9e..a2b8ef5d8c59 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c | |||
@@ -17,152 +17,120 @@ | |||
17 | #include <linux/module.h> | 17 | #include <linux/module.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/regmap.h> | ||
21 | #include <linux/mfd/syscon.h> | ||
22 | #include <linux/mfd/syscon/clps711x.h> | ||
20 | #include <linux/spi/spi.h> | 23 | #include <linux/spi/spi.h> |
21 | #include <linux/platform_data/spi-clps711x.h> | 24 | #include <linux/platform_data/spi-clps711x.h> |
22 | 25 | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #define DRIVER_NAME "spi-clps711x" | 26 | #define DRIVER_NAME "spi-clps711x" |
26 | 27 | ||
27 | struct spi_clps711x_data { | 28 | #define SYNCIO_FRMLEN(x) ((x) << 8) |
28 | struct completion done; | 29 | #define SYNCIO_TXFRMEN (1 << 14) |
29 | 30 | ||
31 | struct spi_clps711x_data { | ||
32 | void __iomem *syncio; | ||
33 | struct regmap *syscon; | ||
34 | struct regmap *syscon1; | ||
30 | struct clk *spi_clk; | 35 | struct clk *spi_clk; |
31 | u32 max_speed_hz; | ||
32 | 36 | ||
33 | u8 *tx_buf; | 37 | u8 *tx_buf; |
34 | u8 *rx_buf; | 38 | u8 *rx_buf; |
35 | int count; | 39 | unsigned int bpw; |
36 | int len; | 40 | int len; |
37 | |||
38 | int chipselect[0]; | ||
39 | }; | 41 | }; |
40 | 42 | ||
41 | static int spi_clps711x_setup(struct spi_device *spi) | 43 | static int spi_clps711x_setup(struct spi_device *spi) |
42 | { | 44 | { |
43 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); | ||
44 | |||
45 | /* We are expect that SPI-device is not selected */ | 45 | /* We are expect that SPI-device is not selected */ |
46 | gpio_direction_output(hw->chipselect[spi->chip_select], | 46 | gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
47 | !(spi->mode & SPI_CS_HIGH)); | ||
48 | 47 | ||
49 | return 0; | 48 | return 0; |
50 | } | 49 | } |
51 | 50 | ||
52 | static void spi_clps711x_setup_mode(struct spi_device *spi) | 51 | static void spi_clps711x_setup_xfer(struct spi_device *spi, |
53 | { | 52 | struct spi_transfer *xfer) |
54 | /* Setup edge for transfer */ | ||
55 | if (spi->mode & SPI_CPHA) | ||
56 | clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3); | ||
57 | else | ||
58 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3); | ||
59 | } | ||
60 | |||
61 | static int spi_clps711x_setup_xfer(struct spi_device *spi, | ||
62 | struct spi_transfer *xfer) | ||
63 | { | 53 | { |
64 | u32 speed = xfer->speed_hz ? : spi->max_speed_hz; | 54 | struct spi_master *master = spi->master; |
65 | u8 bpw = xfer->bits_per_word; | 55 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
66 | struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master); | ||
67 | |||
68 | if (bpw != 8) { | ||
69 | dev_err(&spi->dev, "Unsupported master bus width %i\n", bpw); | ||
70 | return -EINVAL; | ||
71 | } | ||
72 | 56 | ||
73 | /* Setup SPI frequency divider */ | 57 | /* Setup SPI frequency divider */ |
74 | if (!speed || (speed >= hw->max_speed_hz)) | 58 | if (xfer->speed_hz >= master->max_speed_hz) |
75 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 59 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
76 | SYSCON1_ADCKSEL(3), SYSCON1); | 60 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3)); |
77 | else if (speed >= (hw->max_speed_hz / 2)) | 61 | else if (xfer->speed_hz >= (master->max_speed_hz / 2)) |
78 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 62 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
79 | SYSCON1_ADCKSEL(2), SYSCON1); | 63 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2)); |
80 | else if (speed >= (hw->max_speed_hz / 8)) | 64 | else if (xfer->speed_hz >= (master->max_speed_hz / 8)) |
81 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 65 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
82 | SYSCON1_ADCKSEL(1), SYSCON1); | 66 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1)); |
83 | else | 67 | else |
84 | clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) | | 68 | regmap_update_bits(hw->syscon1, SYSCON_OFFSET, |
85 | SYSCON1_ADCKSEL(0), SYSCON1); | 69 | SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0)); |
86 | |||
87 | return 0; | ||
88 | } | 70 | } |
89 | 71 | ||
90 | static int spi_clps711x_transfer_one_message(struct spi_master *master, | 72 | static int spi_clps711x_prepare_message(struct spi_master *master, |
91 | struct spi_message *msg) | 73 | struct spi_message *msg) |
92 | { | 74 | { |
93 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | 75 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
94 | struct spi_transfer *xfer; | 76 | struct spi_device *spi = msg->spi; |
95 | int status = 0, cs = hw->chipselect[msg->spi->chip_select]; | ||
96 | u32 data; | ||
97 | |||
98 | spi_clps711x_setup_mode(msg->spi); | ||
99 | |||
100 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
101 | if (spi_clps711x_setup_xfer(msg->spi, xfer)) { | ||
102 | status = -EINVAL; | ||
103 | goto out_xfr; | ||
104 | } | ||
105 | 77 | ||
106 | gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH)); | 78 | /* Setup mode for transfer */ |
107 | 79 | return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN, | |
108 | reinit_completion(&hw->done); | 80 | (spi->mode & SPI_CPHA) ? |
109 | 81 | SYSCON3_ADCCKNSEN : 0); | |
110 | hw->count = 0; | 82 | } |
111 | hw->len = xfer->len; | ||
112 | hw->tx_buf = (u8 *)xfer->tx_buf; | ||
113 | hw->rx_buf = (u8 *)xfer->rx_buf; | ||
114 | |||
115 | /* Initiate transfer */ | ||
116 | data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; | ||
117 | clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); | ||
118 | |||
119 | wait_for_completion(&hw->done); | ||
120 | 83 | ||
121 | if (xfer->delay_usecs) | 84 | static int spi_clps711x_transfer_one(struct spi_master *master, |
122 | udelay(xfer->delay_usecs); | 85 | struct spi_device *spi, |
86 | struct spi_transfer *xfer) | ||
87 | { | ||
88 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); | ||
89 | u8 data; | ||
123 | 90 | ||
124 | if (xfer->cs_change || | 91 | spi_clps711x_setup_xfer(spi, xfer); |
125 | list_is_last(&xfer->transfer_list, &msg->transfers)) | ||
126 | gpio_set_value(cs, !(msg->spi->mode & SPI_CS_HIGH)); | ||
127 | 92 | ||
128 | msg->actual_length += xfer->len; | 93 | hw->len = xfer->len; |
129 | } | 94 | hw->bpw = xfer->bits_per_word; |
95 | hw->tx_buf = (u8 *)xfer->tx_buf; | ||
96 | hw->rx_buf = (u8 *)xfer->rx_buf; | ||
130 | 97 | ||
131 | out_xfr: | 98 | /* Initiate transfer */ |
132 | msg->status = status; | 99 | data = hw->tx_buf ? *hw->tx_buf++ : 0; |
133 | spi_finalize_current_message(master); | 100 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio); |
134 | 101 | ||
135 | return 0; | 102 | return 1; |
136 | } | 103 | } |
137 | 104 | ||
138 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) | 105 | static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) |
139 | { | 106 | { |
140 | struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id; | 107 | struct spi_master *master = dev_id; |
141 | u32 data; | 108 | struct spi_clps711x_data *hw = spi_master_get_devdata(master); |
109 | u8 data; | ||
142 | 110 | ||
143 | /* Handle RX */ | 111 | /* Handle RX */ |
144 | data = clps_readb(SYNCIO); | 112 | data = readb(hw->syncio); |
145 | if (hw->rx_buf) | 113 | if (hw->rx_buf) |
146 | hw->rx_buf[hw->count] = (u8)data; | 114 | *hw->rx_buf++ = data; |
147 | |||
148 | hw->count++; | ||
149 | 115 | ||
150 | /* Handle TX */ | 116 | /* Handle TX */ |
151 | if (hw->count < hw->len) { | 117 | if (--hw->len > 0) { |
152 | data = hw->tx_buf ? hw->tx_buf[hw->count] : 0; | 118 | data = hw->tx_buf ? *hw->tx_buf++ : 0; |
153 | clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO); | 119 | writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, |
120 | hw->syncio); | ||
154 | } else | 121 | } else |
155 | complete(&hw->done); | 122 | spi_finalize_current_transfer(master); |
156 | 123 | ||
157 | return IRQ_HANDLED; | 124 | return IRQ_HANDLED; |
158 | } | 125 | } |
159 | 126 | ||
160 | static int spi_clps711x_probe(struct platform_device *pdev) | 127 | static int spi_clps711x_probe(struct platform_device *pdev) |
161 | { | 128 | { |
162 | int i, ret; | ||
163 | struct spi_master *master; | ||
164 | struct spi_clps711x_data *hw; | 129 | struct spi_clps711x_data *hw; |
165 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); | 130 | struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev); |
131 | struct spi_master *master; | ||
132 | struct resource *res; | ||
133 | int i, irq, ret; | ||
166 | 134 | ||
167 | if (!pdata) { | 135 | if (!pdata) { |
168 | dev_err(&pdev->dev, "No platform data supplied\n"); | 136 | dev_err(&pdev->dev, "No platform data supplied\n"); |
@@ -174,33 +142,37 @@ static int spi_clps711x_probe(struct platform_device *pdev) | |||
174 | return -EINVAL; | 142 | return -EINVAL; |
175 | } | 143 | } |
176 | 144 | ||
177 | master = spi_alloc_master(&pdev->dev, | 145 | irq = platform_get_irq(pdev, 0); |
178 | sizeof(struct spi_clps711x_data) + | 146 | if (irq < 0) |
179 | sizeof(int) * pdata->num_chipselect); | 147 | return irq; |
180 | if (!master) { | 148 | |
181 | dev_err(&pdev->dev, "SPI allocating memory error\n"); | 149 | master = spi_alloc_master(&pdev->dev, sizeof(*hw)); |
150 | if (!master) | ||
182 | return -ENOMEM; | 151 | return -ENOMEM; |
152 | |||
153 | master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) * | ||
154 | pdata->num_chipselect, GFP_KERNEL); | ||
155 | if (!master->cs_gpios) { | ||
156 | ret = -ENOMEM; | ||
157 | goto err_out; | ||
183 | } | 158 | } |
184 | 159 | ||
185 | master->bus_num = pdev->id; | 160 | master->bus_num = pdev->id; |
186 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; | 161 | master->mode_bits = SPI_CPHA | SPI_CS_HIGH; |
187 | master->bits_per_word_mask = SPI_BPW_MASK(8); | 162 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); |
188 | master->num_chipselect = pdata->num_chipselect; | 163 | master->num_chipselect = pdata->num_chipselect; |
189 | master->setup = spi_clps711x_setup; | 164 | master->setup = spi_clps711x_setup; |
190 | master->transfer_one_message = spi_clps711x_transfer_one_message; | 165 | master->prepare_message = spi_clps711x_prepare_message; |
166 | master->transfer_one = spi_clps711x_transfer_one; | ||
191 | 167 | ||
192 | hw = spi_master_get_devdata(master); | 168 | hw = spi_master_get_devdata(master); |
193 | 169 | ||
194 | for (i = 0; i < master->num_chipselect; i++) { | 170 | for (i = 0; i < master->num_chipselect; i++) { |
195 | hw->chipselect[i] = pdata->chipselect[i]; | 171 | master->cs_gpios[i] = pdata->chipselect[i]; |
196 | if (!gpio_is_valid(hw->chipselect[i])) { | 172 | ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i], |
197 | dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i); | 173 | DRIVER_NAME); |
198 | ret = -EINVAL; | 174 | if (ret) { |
199 | goto err_out; | ||
200 | } | ||
201 | if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) { | ||
202 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); | 175 | dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i); |
203 | ret = -EINVAL; | ||
204 | goto err_out; | 176 | goto err_out; |
205 | } | 177 | } |
206 | } | 178 | } |
@@ -211,29 +183,45 @@ static int spi_clps711x_probe(struct platform_device *pdev) | |||
211 | ret = PTR_ERR(hw->spi_clk); | 183 | ret = PTR_ERR(hw->spi_clk); |
212 | goto err_out; | 184 | goto err_out; |
213 | } | 185 | } |
214 | hw->max_speed_hz = clk_get_rate(hw->spi_clk); | 186 | master->max_speed_hz = clk_get_rate(hw->spi_clk); |
215 | 187 | ||
216 | init_completion(&hw->done); | ||
217 | platform_set_drvdata(pdev, master); | 188 | platform_set_drvdata(pdev, master); |
218 | 189 | ||
190 | hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); | ||
191 | if (IS_ERR(hw->syscon)) { | ||
192 | ret = PTR_ERR(hw->syscon); | ||
193 | goto err_out; | ||
194 | } | ||
195 | |||
196 | hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1"); | ||
197 | if (IS_ERR(hw->syscon1)) { | ||
198 | ret = PTR_ERR(hw->syscon1); | ||
199 | goto err_out; | ||
200 | } | ||
201 | |||
202 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
203 | hw->syncio = devm_ioremap_resource(&pdev->dev, res); | ||
204 | if (IS_ERR(hw->syncio)) { | ||
205 | ret = PTR_ERR(hw->syncio); | ||
206 | goto err_out; | ||
207 | } | ||
208 | |||
219 | /* Disable extended mode due hardware problems */ | 209 | /* Disable extended mode due hardware problems */ |
220 | clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3); | 210 | regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0); |
221 | 211 | ||
222 | /* Clear possible pending interrupt */ | 212 | /* Clear possible pending interrupt */ |
223 | clps_readl(SYNCIO); | 213 | readl(hw->syncio); |
224 | 214 | ||
225 | ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0, | 215 | ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, |
226 | dev_name(&pdev->dev), hw); | 216 | dev_name(&pdev->dev), master); |
227 | if (ret) { | 217 | if (ret) |
228 | dev_err(&pdev->dev, "Can't request IRQ\n"); | ||
229 | goto err_out; | 218 | goto err_out; |
230 | } | ||
231 | 219 | ||
232 | ret = devm_spi_register_master(&pdev->dev, master); | 220 | ret = devm_spi_register_master(&pdev->dev, master); |
233 | if (!ret) { | 221 | if (!ret) { |
234 | dev_info(&pdev->dev, | 222 | dev_info(&pdev->dev, |
235 | "SPI bus driver initialized. Master clock %u Hz\n", | 223 | "SPI bus driver initialized. Master clock %u Hz\n", |
236 | hw->max_speed_hz); | 224 | master->max_speed_hz); |
237 | return 0; | 225 | return 0; |
238 | } | 226 | } |
239 | 227 | ||
diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index 28ae470397a9..e2fa628e55e7 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c | |||
@@ -77,8 +77,6 @@ struct mcfqspi { | |||
77 | struct mcfqspi_cs_control *cs_control; | 77 | struct mcfqspi_cs_control *cs_control; |
78 | 78 | ||
79 | wait_queue_head_t waitq; | 79 | wait_queue_head_t waitq; |
80 | |||
81 | struct device *dev; | ||
82 | }; | 80 | }; |
83 | 81 | ||
84 | static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) | 82 | static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val) |
@@ -135,13 +133,13 @@ static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select, | |||
135 | 133 | ||
136 | static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi) | 134 | static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi) |
137 | { | 135 | { |
138 | return (mcfqspi->cs_control && mcfqspi->cs_control->setup) ? | 136 | return (mcfqspi->cs_control->setup) ? |
139 | mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0; | 137 | mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0; |
140 | } | 138 | } |
141 | 139 | ||
142 | static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi) | 140 | static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi) |
143 | { | 141 | { |
144 | if (mcfqspi->cs_control && mcfqspi->cs_control->teardown) | 142 | if (mcfqspi->cs_control->teardown) |
145 | mcfqspi->cs_control->teardown(mcfqspi->cs_control); | 143 | mcfqspi->cs_control->teardown(mcfqspi->cs_control); |
146 | } | 144 | } |
147 | 145 | ||
@@ -300,68 +298,45 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count, | |||
300 | } | 298 | } |
301 | } | 299 | } |
302 | 300 | ||
303 | static int mcfqspi_transfer_one_message(struct spi_master *master, | 301 | static void mcfqspi_set_cs(struct spi_device *spi, bool enable) |
304 | struct spi_message *msg) | ||
305 | { | 302 | { |
306 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 303 | struct mcfqspi *mcfqspi = spi_master_get_devdata(spi->master); |
307 | struct spi_device *spi = msg->spi; | 304 | bool cs_high = spi->mode & SPI_CS_HIGH; |
308 | struct spi_transfer *t; | ||
309 | int status = 0; | ||
310 | |||
311 | list_for_each_entry(t, &msg->transfers, transfer_list) { | ||
312 | bool cs_high = spi->mode & SPI_CS_HIGH; | ||
313 | u16 qmr = MCFQSPI_QMR_MSTR; | ||
314 | |||
315 | qmr |= t->bits_per_word << 10; | ||
316 | if (spi->mode & SPI_CPHA) | ||
317 | qmr |= MCFQSPI_QMR_CPHA; | ||
318 | if (spi->mode & SPI_CPOL) | ||
319 | qmr |= MCFQSPI_QMR_CPOL; | ||
320 | if (t->speed_hz) | ||
321 | qmr |= mcfqspi_qmr_baud(t->speed_hz); | ||
322 | else | ||
323 | qmr |= mcfqspi_qmr_baud(spi->max_speed_hz); | ||
324 | mcfqspi_wr_qmr(mcfqspi, qmr); | ||
325 | 305 | ||
306 | if (enable) | ||
326 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); | 307 | mcfqspi_cs_select(mcfqspi, spi->chip_select, cs_high); |
308 | else | ||
309 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, cs_high); | ||
310 | } | ||
327 | 311 | ||
328 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); | 312 | static int mcfqspi_transfer_one(struct spi_master *master, |
329 | if (t->bits_per_word == 8) | 313 | struct spi_device *spi, |
330 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, | 314 | struct spi_transfer *t) |
331 | t->rx_buf); | 315 | { |
332 | else | 316 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
333 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, | 317 | u16 qmr = MCFQSPI_QMR_MSTR; |
334 | t->rx_buf); | 318 | |
335 | mcfqspi_wr_qir(mcfqspi, 0); | 319 | qmr |= t->bits_per_word << 10; |
336 | 320 | if (spi->mode & SPI_CPHA) | |
337 | if (t->delay_usecs) | 321 | qmr |= MCFQSPI_QMR_CPHA; |
338 | udelay(t->delay_usecs); | 322 | if (spi->mode & SPI_CPOL) |
339 | if (t->cs_change) { | 323 | qmr |= MCFQSPI_QMR_CPOL; |
340 | if (!list_is_last(&t->transfer_list, &msg->transfers)) | 324 | qmr |= mcfqspi_qmr_baud(t->speed_hz); |
341 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | 325 | mcfqspi_wr_qmr(mcfqspi, qmr); |
342 | cs_high); | 326 | |
343 | } else { | 327 | mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE); |
344 | if (list_is_last(&t->transfer_list, &msg->transfers)) | 328 | if (t->bits_per_word == 8) |
345 | mcfqspi_cs_deselect(mcfqspi, spi->chip_select, | 329 | mcfqspi_transfer_msg8(mcfqspi, t->len, t->tx_buf, t->rx_buf); |
346 | cs_high); | 330 | else |
347 | } | 331 | mcfqspi_transfer_msg16(mcfqspi, t->len / 2, t->tx_buf, |
348 | msg->actual_length += t->len; | 332 | t->rx_buf); |
349 | } | 333 | mcfqspi_wr_qir(mcfqspi, 0); |
350 | msg->status = status; | ||
351 | spi_finalize_current_message(master); | ||
352 | |||
353 | return status; | ||
354 | 334 | ||
335 | return 0; | ||
355 | } | 336 | } |
356 | 337 | ||
357 | static int mcfqspi_setup(struct spi_device *spi) | 338 | static int mcfqspi_setup(struct spi_device *spi) |
358 | { | 339 | { |
359 | if (spi->chip_select >= spi->master->num_chipselect) { | ||
360 | dev_dbg(&spi->dev, "%d chip select is out of range\n", | ||
361 | spi->chip_select); | ||
362 | return -EINVAL; | ||
363 | } | ||
364 | |||
365 | mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), | 340 | mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), |
366 | spi->chip_select, spi->mode & SPI_CS_HIGH); | 341 | spi->chip_select, spi->mode & SPI_CS_HIGH); |
367 | 342 | ||
@@ -388,6 +363,11 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
388 | return -ENOENT; | 363 | return -ENOENT; |
389 | } | 364 | } |
390 | 365 | ||
366 | if (!pdata->cs_control) { | ||
367 | dev_dbg(&pdev->dev, "pdata->cs_control is NULL\n"); | ||
368 | return -EINVAL; | ||
369 | } | ||
370 | |||
391 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); | 371 | master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); |
392 | if (master == NULL) { | 372 | if (master == NULL) { |
393 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); | 373 | dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); |
@@ -436,12 +416,12 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
436 | } | 416 | } |
437 | 417 | ||
438 | init_waitqueue_head(&mcfqspi->waitq); | 418 | init_waitqueue_head(&mcfqspi->waitq); |
439 | mcfqspi->dev = &pdev->dev; | ||
440 | 419 | ||
441 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; | 420 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; |
442 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); | 421 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); |
443 | master->setup = mcfqspi_setup; | 422 | master->setup = mcfqspi_setup; |
444 | master->transfer_one_message = mcfqspi_transfer_one_message; | 423 | master->set_cs = mcfqspi_set_cs; |
424 | master->transfer_one = mcfqspi_transfer_one; | ||
445 | master->auto_runtime_pm = true; | 425 | master->auto_runtime_pm = true; |
446 | 426 | ||
447 | platform_set_drvdata(pdev, master); | 427 | platform_set_drvdata(pdev, master); |
@@ -451,7 +431,7 @@ static int mcfqspi_probe(struct platform_device *pdev) | |||
451 | dev_dbg(&pdev->dev, "spi_register_master failed\n"); | 431 | dev_dbg(&pdev->dev, "spi_register_master failed\n"); |
452 | goto fail2; | 432 | goto fail2; |
453 | } | 433 | } |
454 | pm_runtime_enable(mcfqspi->dev); | 434 | pm_runtime_enable(&pdev->dev); |
455 | 435 | ||
456 | dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); | 436 | dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); |
457 | 437 | ||
@@ -473,9 +453,8 @@ static int mcfqspi_remove(struct platform_device *pdev) | |||
473 | { | 453 | { |
474 | struct spi_master *master = platform_get_drvdata(pdev); | 454 | struct spi_master *master = platform_get_drvdata(pdev); |
475 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 455 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
476 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
477 | 456 | ||
478 | pm_runtime_disable(mcfqspi->dev); | 457 | pm_runtime_disable(&pdev->dev); |
479 | /* disable the hardware (set the baud rate to 0) */ | 458 | /* disable the hardware (set the baud rate to 0) */ |
480 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); | 459 | mcfqspi_wr_qmr(mcfqspi, MCFQSPI_QMR_MSTR); |
481 | 460 | ||
@@ -490,8 +469,11 @@ static int mcfqspi_suspend(struct device *dev) | |||
490 | { | 469 | { |
491 | struct spi_master *master = dev_get_drvdata(dev); | 470 | struct spi_master *master = dev_get_drvdata(dev); |
492 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 471 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
472 | int ret; | ||
493 | 473 | ||
494 | spi_master_suspend(master); | 474 | ret = spi_master_suspend(master); |
475 | if (ret) | ||
476 | return ret; | ||
495 | 477 | ||
496 | clk_disable(mcfqspi->clk); | 478 | clk_disable(mcfqspi->clk); |
497 | 479 | ||
@@ -503,11 +485,9 @@ static int mcfqspi_resume(struct device *dev) | |||
503 | struct spi_master *master = dev_get_drvdata(dev); | 485 | struct spi_master *master = dev_get_drvdata(dev); |
504 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); | 486 | struct mcfqspi *mcfqspi = spi_master_get_devdata(master); |
505 | 487 | ||
506 | spi_master_resume(master); | ||
507 | |||
508 | clk_enable(mcfqspi->clk); | 488 | clk_enable(mcfqspi->clk); |
509 | 489 | ||
510 | return 0; | 490 | return spi_master_resume(master); |
511 | } | 491 | } |
512 | #endif | 492 | #endif |
513 | 493 | ||
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 5e7389faa2a0..50f750989258 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c | |||
@@ -802,8 +802,7 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, | |||
802 | pdata = &dspi->pdata; | 802 | pdata = &dspi->pdata; |
803 | 803 | ||
804 | pdata->version = SPI_VERSION_1; | 804 | pdata->version = SPI_VERSION_1; |
805 | match = of_match_device(of_match_ptr(davinci_spi_of_match), | 805 | match = of_match_device(davinci_spi_of_match, &pdev->dev); |
806 | &pdev->dev); | ||
807 | if (!match) | 806 | if (!match) |
808 | return -ENODEV; | 807 | return -ENODEV; |
809 | 808 | ||
@@ -824,7 +823,6 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, | |||
824 | return 0; | 823 | return 0; |
825 | } | 824 | } |
826 | #else | 825 | #else |
827 | #define davinci_spi_of_match NULL | ||
828 | static struct davinci_spi_platform_data | 826 | static struct davinci_spi_platform_data |
829 | *spi_davinci_get_pdata(struct platform_device *pdev, | 827 | *spi_davinci_get_pdata(struct platform_device *pdev, |
830 | struct davinci_spi *dspi) | 828 | struct davinci_spi *dspi) |
@@ -864,10 +862,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
864 | platform_set_drvdata(pdev, master); | 862 | platform_set_drvdata(pdev, master); |
865 | 863 | ||
866 | dspi = spi_master_get_devdata(master); | 864 | dspi = spi_master_get_devdata(master); |
867 | if (dspi == NULL) { | ||
868 | ret = -ENOENT; | ||
869 | goto free_master; | ||
870 | } | ||
871 | 865 | ||
872 | if (dev_get_platdata(&pdev->dev)) { | 866 | if (dev_get_platdata(&pdev->dev)) { |
873 | pdata = dev_get_platdata(&pdev->dev); | 867 | pdata = dev_get_platdata(&pdev->dev); |
@@ -908,10 +902,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
908 | goto free_master; | 902 | goto free_master; |
909 | 903 | ||
910 | dspi->bitbang.master = master; | 904 | dspi->bitbang.master = master; |
911 | if (dspi->bitbang.master == NULL) { | ||
912 | ret = -ENODEV; | ||
913 | goto free_master; | ||
914 | } | ||
915 | 905 | ||
916 | dspi->clk = devm_clk_get(&pdev->dev, NULL); | 906 | dspi->clk = devm_clk_get(&pdev->dev, NULL); |
917 | if (IS_ERR(dspi->clk)) { | 907 | if (IS_ERR(dspi->clk)) { |
@@ -1040,7 +1030,7 @@ static struct platform_driver davinci_spi_driver = { | |||
1040 | .driver = { | 1030 | .driver = { |
1041 | .name = "spi_davinci", | 1031 | .name = "spi_davinci", |
1042 | .owner = THIS_MODULE, | 1032 | .owner = THIS_MODULE, |
1043 | .of_match_table = davinci_spi_of_match, | 1033 | .of_match_table = of_match_ptr(davinci_spi_of_match), |
1044 | }, | 1034 | }, |
1045 | .probe = davinci_spi_probe, | 1035 | .probe = davinci_spi_probe, |
1046 | .remove = davinci_spi_remove, | 1036 | .remove = davinci_spi_remove, |
diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c index d4d3cc534792..f53bbea385c0 100644 --- a/drivers/spi/spi-efm32.c +++ b/drivers/spi/spi-efm32.c | |||
@@ -198,7 +198,7 @@ static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
198 | 198 | ||
199 | efm32_spi_filltx(ddata); | 199 | efm32_spi_filltx(ddata); |
200 | 200 | ||
201 | init_completion(&ddata->done); | 201 | reinit_completion(&ddata->done); |
202 | 202 | ||
203 | efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); | 203 | efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); |
204 | 204 | ||
@@ -308,10 +308,6 @@ static int efm32_spi_probe_dt(struct platform_device *pdev, | |||
308 | } | 308 | } |
309 | 309 | ||
310 | ddata->pdata.location = location; | 310 | ddata->pdata.location = location; |
311 | |||
312 | /* spi core takes care about the bus number using an alias */ | ||
313 | master->bus_num = -1; | ||
314 | |||
315 | return 0; | 311 | return 0; |
316 | } | 312 | } |
317 | 313 | ||
@@ -349,6 +345,7 @@ static int efm32_spi_probe(struct platform_device *pdev) | |||
349 | ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; | 345 | ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; |
350 | 346 | ||
351 | spin_lock_init(&ddata->lock); | 347 | spin_lock_init(&ddata->lock); |
348 | init_completion(&ddata->done); | ||
352 | 349 | ||
353 | ddata->clk = devm_clk_get(&pdev->dev, NULL); | 350 | ddata->clk = devm_clk_get(&pdev->dev, NULL); |
354 | if (IS_ERR(ddata->clk)) { | 351 | if (IS_ERR(ddata->clk)) { |
diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c index dd5bd468e962..09965f069a1c 100644 --- a/drivers/spi/spi-falcon.c +++ b/drivers/spi/spi-falcon.c | |||
@@ -312,9 +312,6 @@ static int falcon_sflash_setup(struct spi_device *spi) | |||
312 | unsigned int i; | 312 | unsigned int i; |
313 | unsigned long flags; | 313 | unsigned long flags; |
314 | 314 | ||
315 | if (spi->chip_select > 0) | ||
316 | return -ENODEV; | ||
317 | |||
318 | spin_lock_irqsave(&ebu_lock, flags); | 315 | spin_lock_irqsave(&ebu_lock, flags); |
319 | 316 | ||
320 | if (spi->max_speed_hz >= CLOCK_100M) { | 317 | if (spi->max_speed_hz >= CLOCK_100M) { |
@@ -422,9 +419,7 @@ static int falcon_sflash_probe(struct platform_device *pdev) | |||
422 | priv->master = master; | 419 | priv->master = master; |
423 | 420 | ||
424 | master->mode_bits = SPI_MODE_3; | 421 | master->mode_bits = SPI_MODE_3; |
425 | master->num_chipselect = 1; | ||
426 | master->flags = SPI_MASTER_HALF_DUPLEX; | 422 | master->flags = SPI_MASTER_HALF_DUPLEX; |
427 | master->bus_num = -1; | ||
428 | master->setup = falcon_sflash_setup; | 423 | master->setup = falcon_sflash_setup; |
429 | master->prepare_transfer_hardware = falcon_sflash_prepare_xfer; | 424 | master->prepare_transfer_hardware = falcon_sflash_prepare_xfer; |
430 | master->transfer_one_message = falcon_sflash_xfer_one; | 425 | master->transfer_one_message = falcon_sflash_xfer_one; |
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 47f15d97e7fa..f52372c403ee 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c | |||
@@ -741,7 +741,7 @@ static int spi_imx_transfer(struct spi_device *spi, | |||
741 | spi_imx->count = transfer->len; | 741 | spi_imx->count = transfer->len; |
742 | spi_imx->txfifo = 0; | 742 | spi_imx->txfifo = 0; |
743 | 743 | ||
744 | init_completion(&spi_imx->xfer_done); | 744 | reinit_completion(&spi_imx->xfer_done); |
745 | 745 | ||
746 | spi_imx_push(spi_imx); | 746 | spi_imx_push(spi_imx); |
747 | 747 | ||
diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c index 7c675fe83101..e3d29a56d70a 100644 --- a/drivers/spi/spi-mpc52xx.c +++ b/drivers/spi/spi-mpc52xx.c | |||
@@ -365,9 +365,6 @@ static int mpc52xx_spi_setup(struct spi_device *spi) | |||
365 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) | 365 | if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) |
366 | return -EINVAL; | 366 | return -EINVAL; |
367 | 367 | ||
368 | if (spi->chip_select >= spi->master->num_chipselect) | ||
369 | return -EINVAL; | ||
370 | |||
371 | return 0; | 368 | return 0; |
372 | } | 369 | } |
373 | 370 | ||
diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c index 67249a48b391..e31f6d833951 100644 --- a/drivers/spi/spi-octeon.c +++ b/drivers/spi/spi-octeon.c | |||
@@ -257,8 +257,6 @@ static int octeon_spi_probe(struct platform_device *pdev) | |||
257 | p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, | 257 | p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, |
258 | resource_size(res_mem)); | 258 | resource_size(res_mem)); |
259 | 259 | ||
260 | /* Dynamic bus numbering */ | ||
261 | master->bus_num = -1; | ||
262 | master->num_chipselect = 4; | 260 | master->num_chipselect = 4; |
263 | master->mode_bits = SPI_CPHA | | 261 | master->mode_bits = SPI_CPHA | |
264 | SPI_CPOL | | 262 | SPI_CPOL | |
diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index a4d7bb557792..8062909b9f5e 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c | |||
@@ -332,12 +332,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
332 | 332 | ||
333 | uwire = spi_master_get_devdata(spi->master); | 333 | uwire = spi_master_get_devdata(spi->master); |
334 | 334 | ||
335 | if (spi->chip_select > 3) { | ||
336 | pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select); | ||
337 | status = -ENODEV; | ||
338 | goto done; | ||
339 | } | ||
340 | |||
341 | bits = spi->bits_per_word; | 335 | bits = spi->bits_per_word; |
342 | if (t != NULL && t->bits_per_word) | 336 | if (t != NULL && t->bits_per_word) |
343 | bits = t->bits_per_word; | 337 | bits = t->bits_per_word; |
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index 82d2f922ffa0..755d7cc9e72f 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c | |||
@@ -298,7 +298,6 @@ static int hspi_probe(struct platform_device *pdev) | |||
298 | 298 | ||
299 | pm_runtime_enable(&pdev->dev); | 299 | pm_runtime_enable(&pdev->dev); |
300 | 300 | ||
301 | master->num_chipselect = 1; | ||
302 | master->bus_num = pdev->id; | 301 | master->bus_num = pdev->id; |
303 | master->setup = hspi_setup; | 302 | master->setup = hspi_setup; |
304 | master->cleanup = hspi_cleanup; | 303 | master->cleanup = hspi_cleanup; |
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 413c71843492..f176ad7b8f16 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c | |||
@@ -172,7 +172,6 @@ struct tegra_spi_data { | |||
172 | void __iomem *base; | 172 | void __iomem *base; |
173 | phys_addr_t phys; | 173 | phys_addr_t phys; |
174 | unsigned irq; | 174 | unsigned irq; |
175 | u32 spi_max_frequency; | ||
176 | u32 cur_speed; | 175 | u32 cur_speed; |
177 | 176 | ||
178 | struct spi_device *cur_spi; | 177 | struct spi_device *cur_spi; |
@@ -761,11 +760,6 @@ static int tegra_spi_setup(struct spi_device *spi) | |||
761 | spi->mode & SPI_CPHA ? "" : "~", | 760 | spi->mode & SPI_CPHA ? "" : "~", |
762 | spi->max_speed_hz); | 761 | spi->max_speed_hz); |
763 | 762 | ||
764 | BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); | ||
765 | |||
766 | /* Set speed to the spi max fequency if spi device has not set */ | ||
767 | spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; | ||
768 | |||
769 | ret = pm_runtime_get_sync(tspi->dev); | 763 | ret = pm_runtime_get_sync(tspi->dev); |
770 | if (ret < 0) { | 764 | if (ret < 0) { |
771 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); | 765 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); |
@@ -1019,16 +1013,6 @@ static irqreturn_t tegra_spi_isr(int irq, void *context_data) | |||
1019 | return IRQ_WAKE_THREAD; | 1013 | return IRQ_WAKE_THREAD; |
1020 | } | 1014 | } |
1021 | 1015 | ||
1022 | static void tegra_spi_parse_dt(struct platform_device *pdev, | ||
1023 | struct tegra_spi_data *tspi) | ||
1024 | { | ||
1025 | struct device_node *np = pdev->dev.of_node; | ||
1026 | |||
1027 | if (of_property_read_u32(np, "spi-max-frequency", | ||
1028 | &tspi->spi_max_frequency)) | ||
1029 | tspi->spi_max_frequency = 25000000; /* 25MHz */ | ||
1030 | } | ||
1031 | |||
1032 | static struct of_device_id tegra_spi_of_match[] = { | 1016 | static struct of_device_id tegra_spi_of_match[] = { |
1033 | { .compatible = "nvidia,tegra114-spi", }, | 1017 | { .compatible = "nvidia,tegra114-spi", }, |
1034 | {} | 1018 | {} |
@@ -1050,15 +1034,15 @@ static int tegra_spi_probe(struct platform_device *pdev) | |||
1050 | platform_set_drvdata(pdev, master); | 1034 | platform_set_drvdata(pdev, master); |
1051 | tspi = spi_master_get_devdata(master); | 1035 | tspi = spi_master_get_devdata(master); |
1052 | 1036 | ||
1053 | /* Parse DT */ | 1037 | if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency", |
1054 | tegra_spi_parse_dt(pdev, tspi); | 1038 | &master->max_speed_hz)) |
1039 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
1055 | 1040 | ||
1056 | /* the spi->mode bits understood by this driver: */ | 1041 | /* the spi->mode bits understood by this driver: */ |
1057 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | 1042 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; |
1058 | master->setup = tegra_spi_setup; | 1043 | master->setup = tegra_spi_setup; |
1059 | master->transfer_one_message = tegra_spi_transfer_one_message; | 1044 | master->transfer_one_message = tegra_spi_transfer_one_message; |
1060 | master->num_chipselect = MAX_CHIP_SELECT; | 1045 | master->num_chipselect = MAX_CHIP_SELECT; |
1061 | master->bus_num = -1; | ||
1062 | master->auto_runtime_pm = true; | 1046 | master->auto_runtime_pm = true; |
1063 | 1047 | ||
1064 | tspi->master = master; | 1048 | tspi->master = master; |
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 08794977f21a..c45135e371b4 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c | |||
@@ -121,7 +121,6 @@ struct tegra_sflash_data { | |||
121 | struct reset_control *rst; | 121 | struct reset_control *rst; |
122 | void __iomem *base; | 122 | void __iomem *base; |
123 | unsigned irq; | 123 | unsigned irq; |
124 | u32 spi_max_frequency; | ||
125 | u32 cur_speed; | 124 | u32 cur_speed; |
126 | 125 | ||
127 | struct spi_device *cur_spi; | 126 | struct spi_device *cur_spi; |
@@ -315,15 +314,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, | |||
315 | return tegra_sflash_start_cpu_based_transfer(tsd, t); | 314 | return tegra_sflash_start_cpu_based_transfer(tsd, t); |
316 | } | 315 | } |
317 | 316 | ||
318 | static int tegra_sflash_setup(struct spi_device *spi) | ||
319 | { | ||
320 | struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master); | ||
321 | |||
322 | /* Set speed to the spi max fequency if spi device has not set */ | ||
323 | spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency; | ||
324 | return 0; | ||
325 | } | ||
326 | |||
327 | static int tegra_sflash_transfer_one_message(struct spi_master *master, | 317 | static int tegra_sflash_transfer_one_message(struct spi_master *master, |
328 | struct spi_message *msg) | 318 | struct spi_message *msg) |
329 | { | 319 | { |
@@ -430,15 +420,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data) | |||
430 | return handle_cpu_based_xfer(tsd); | 420 | return handle_cpu_based_xfer(tsd); |
431 | } | 421 | } |
432 | 422 | ||
433 | static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd) | ||
434 | { | ||
435 | struct device_node *np = tsd->dev->of_node; | ||
436 | |||
437 | if (of_property_read_u32(np, "spi-max-frequency", | ||
438 | &tsd->spi_max_frequency)) | ||
439 | tsd->spi_max_frequency = 25000000; /* 25MHz */ | ||
440 | } | ||
441 | |||
442 | static struct of_device_id tegra_sflash_of_match[] = { | 423 | static struct of_device_id tegra_sflash_of_match[] = { |
443 | { .compatible = "nvidia,tegra20-sflash", }, | 424 | { .compatible = "nvidia,tegra20-sflash", }, |
444 | {} | 425 | {} |
@@ -467,11 +448,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
467 | 448 | ||
468 | /* the spi->mode bits understood by this driver: */ | 449 | /* the spi->mode bits understood by this driver: */ |
469 | master->mode_bits = SPI_CPOL | SPI_CPHA; | 450 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
470 | master->setup = tegra_sflash_setup; | ||
471 | master->transfer_one_message = tegra_sflash_transfer_one_message; | 451 | master->transfer_one_message = tegra_sflash_transfer_one_message; |
472 | master->auto_runtime_pm = true; | 452 | master->auto_runtime_pm = true; |
473 | master->num_chipselect = MAX_CHIP_SELECT; | 453 | master->num_chipselect = MAX_CHIP_SELECT; |
474 | master->bus_num = -1; | ||
475 | 454 | ||
476 | platform_set_drvdata(pdev, master); | 455 | platform_set_drvdata(pdev, master); |
477 | tsd = spi_master_get_devdata(master); | 456 | tsd = spi_master_get_devdata(master); |
@@ -479,7 +458,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
479 | tsd->dev = &pdev->dev; | 458 | tsd->dev = &pdev->dev; |
480 | spin_lock_init(&tsd->lock); | 459 | spin_lock_init(&tsd->lock); |
481 | 460 | ||
482 | tegra_sflash_parse_dt(tsd); | 461 | if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency", |
462 | &master->max_speed_hz)) | ||
463 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
483 | 464 | ||
484 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 465 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
485 | tsd->base = devm_ioremap_resource(&pdev->dev, r); | 466 | tsd->base = devm_ioremap_resource(&pdev->dev, r); |
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index be3a069879c3..eb5b771e1575 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c | |||
@@ -171,7 +171,6 @@ struct tegra_slink_data { | |||
171 | void __iomem *base; | 171 | void __iomem *base; |
172 | phys_addr_t phys; | 172 | phys_addr_t phys; |
173 | unsigned irq; | 173 | unsigned irq; |
174 | u32 spi_max_frequency; | ||
175 | u32 cur_speed; | 174 | u32 cur_speed; |
176 | 175 | ||
177 | struct spi_device *cur_spi; | 176 | struct spi_device *cur_spi; |
@@ -761,10 +760,6 @@ static int tegra_slink_setup(struct spi_device *spi) | |||
761 | spi->mode & SPI_CPHA ? "" : "~", | 760 | spi->mode & SPI_CPHA ? "" : "~", |
762 | spi->max_speed_hz); | 761 | spi->max_speed_hz); |
763 | 762 | ||
764 | BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); | ||
765 | |||
766 | /* Set speed to the spi max fequency if spi device has not set */ | ||
767 | spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; | ||
768 | ret = pm_runtime_get_sync(tspi->dev); | 763 | ret = pm_runtime_get_sync(tspi->dev); |
769 | if (ret < 0) { | 764 | if (ret < 0) { |
770 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); | 765 | dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); |
@@ -999,15 +994,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data) | |||
999 | return IRQ_WAKE_THREAD; | 994 | return IRQ_WAKE_THREAD; |
1000 | } | 995 | } |
1001 | 996 | ||
1002 | static void tegra_slink_parse_dt(struct tegra_slink_data *tspi) | ||
1003 | { | ||
1004 | struct device_node *np = tspi->dev->of_node; | ||
1005 | |||
1006 | if (of_property_read_u32(np, "spi-max-frequency", | ||
1007 | &tspi->spi_max_frequency)) | ||
1008 | tspi->spi_max_frequency = 25000000; /* 25MHz */ | ||
1009 | } | ||
1010 | |||
1011 | static const struct tegra_slink_chip_data tegra30_spi_cdata = { | 997 | static const struct tegra_slink_chip_data tegra30_spi_cdata = { |
1012 | .cs_hold_time = true, | 998 | .cs_hold_time = true, |
1013 | }; | 999 | }; |
@@ -1053,7 +1039,6 @@ static int tegra_slink_probe(struct platform_device *pdev) | |||
1053 | master->unprepare_message = tegra_slink_unprepare_message; | 1039 | master->unprepare_message = tegra_slink_unprepare_message; |
1054 | master->auto_runtime_pm = true; | 1040 | master->auto_runtime_pm = true; |
1055 | master->num_chipselect = MAX_CHIP_SELECT; | 1041 | master->num_chipselect = MAX_CHIP_SELECT; |
1056 | master->bus_num = -1; | ||
1057 | 1042 | ||
1058 | platform_set_drvdata(pdev, master); | 1043 | platform_set_drvdata(pdev, master); |
1059 | tspi = spi_master_get_devdata(master); | 1044 | tspi = spi_master_get_devdata(master); |
@@ -1062,7 +1047,9 @@ static int tegra_slink_probe(struct platform_device *pdev) | |||
1062 | tspi->chip_data = cdata; | 1047 | tspi->chip_data = cdata; |
1063 | spin_lock_init(&tspi->lock); | 1048 | spin_lock_init(&tspi->lock); |
1064 | 1049 | ||
1065 | tegra_slink_parse_dt(tspi); | 1050 | if (of_property_read_u32(tspi->dev->of_node, "spi-max-frequency", |
1051 | &master->max_speed_hz)) | ||
1052 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
1066 | 1053 | ||
1067 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1054 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1068 | if (!r) { | 1055 | if (!r) { |
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 7eb2cef739b6..49ddfc7f12b1 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c | |||
@@ -429,7 +429,6 @@ static int ti_qspi_probe(struct platform_device *pdev) | |||
429 | 429 | ||
430 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; | 430 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; |
431 | 431 | ||
432 | master->bus_num = -1; | ||
433 | master->flags = SPI_MASTER_HALF_DUPLEX; | 432 | master->flags = SPI_MASTER_HALF_DUPLEX; |
434 | master->setup = ti_qspi_setup; | 433 | master->setup = ti_qspi_setup; |
435 | master->auto_runtime_pm = true; | 434 | master->auto_runtime_pm = true; |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 32e4603d5fc8..ffc1a2ebc4ca 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c | |||
@@ -1775,6 +1775,9 @@ int spi_setup(struct spi_device *spi) | |||
1775 | if (!spi->bits_per_word) | 1775 | if (!spi->bits_per_word) |
1776 | spi->bits_per_word = 8; | 1776 | spi->bits_per_word = 8; |
1777 | 1777 | ||
1778 | if (!spi->max_speed_hz) | ||
1779 | spi->max_speed_hz = spi->master->max_speed_hz; | ||
1780 | |||
1778 | if (spi->master->setup) | 1781 | if (spi->master->setup) |
1779 | status = spi->master->setup(spi); | 1782 | status = spi->master->setup(spi); |
1780 | 1783 | ||