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-rw-r--r--arch/arm/mach-lpc32xx/clock.c8
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/platform.h1
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index f48c2e961b84..dd5d6f532e8c 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -585,6 +585,13 @@ static struct clk clk_timer3 = {
585 .enable_mask = LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN, 585 .enable_mask = LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN,
586 .get_rate = local_return_parent_rate, 586 .get_rate = local_return_parent_rate,
587}; 587};
588static struct clk clk_mpwm = {
589 .parent = &clk_pclk,
590 .enable = local_onoff_enable,
591 .enable_reg = LPC32XX_CLKPWR_TIMERS_PWMS_CLK_CTRL_1,
592 .enable_mask = LPC32XX_CLKPWR_TMRPWMCLK_MPWM_EN,
593 .get_rate = local_return_parent_rate,
594};
588static struct clk clk_wdt = { 595static struct clk clk_wdt = {
589 .parent = &clk_pclk, 596 .parent = &clk_pclk,
590 .enable = local_onoff_enable, 597 .enable = local_onoff_enable,
@@ -1202,6 +1209,7 @@ static struct clk_lookup lookups[] = {
1202 CLKDEV_INIT("pl08xdmac", NULL, &clk_dma), 1209 CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
1203 CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt), 1210 CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
1204 CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm), 1211 CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm),
1212 CLKDEV_INIT("400e8000.mpwm", NULL, &clk_mpwm),
1205 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3), 1213 CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
1206 CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4), 1214 CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
1207 CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5), 1215 CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),
diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/include/mach/platform.h
index acc4aabf1c7b..b5612a1d1839 100644
--- a/arch/arm/mach-lpc32xx/include/mach/platform.h
+++ b/arch/arm/mach-lpc32xx/include/mach/platform.h
@@ -515,6 +515,7 @@
515/* 515/*
516 * clkpwr_timers_pwms_clk_ctrl_1 register definitions 516 * clkpwr_timers_pwms_clk_ctrl_1 register definitions
517 */ 517 */
518#define LPC32XX_CLKPWR_TMRPWMCLK_MPWM_EN 0x40
518#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN 0x20 519#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN 0x20
519#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN 0x10 520#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN 0x10
520#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN 0x08 521#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN 0x08