63 files changed, 2972 insertions, 987 deletions

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index bfbc771a65f8..ac9e7516756e 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -1,6 +1,14 @@
 Freescale i.MX Platforms Device Tree Bindings
 -----------------------------------------------
 
+i.MX23 Evaluation Kit
+Required root node properties:
+    - compatible = "fsl,imx23-evk", "fsl,imx23";
+
+i.MX28 Evaluation Kit
+Required root node properties:
+    - compatible = "fsl,imx28-evk", "fsl,imx28";
+
 i.MX51 Babbage Board
 Required root node properties:
     - compatible = "fsl,imx51-babbage", "fsl,imx51";
@@ -29,6 +37,10 @@ i.MX6 Quad SABRE Lite Board
 Required root node properties:
     - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
 
+i.MX6 Quad SABRE Smart Device Board
+Required root node properties:
+    - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+
 Generic i.MX boards
 -------------------
 
diff --git a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt
new file mode 100644
index 000000000000..ded0398d3bdc
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt
@@ -0,0 +1,19 @@
+* Freescale MXS DMA
+
+Required properties:
+- compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
+- reg : Should contain registers location and length
+
+Supported chips:
+imx23, imx28.
+
+Examples:
+dma-apbh@80004000 {
+        compatible = "fsl,imx28-dma-apbh";
+        reg = <0x80004000 2000>;
+};
+
+dma-apbx@80024000 {
+        compatible = "fsl,imx28-dma-apbx";
+        reg = <0x80024000 2000>;
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.txt b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
new file mode 100644
index 000000000000..0c35673f7a3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
@@ -0,0 +1,87 @@
+* Freescale MXS GPIO controller
+
+The Freescale MXS GPIO controller is part of MXS PIN controller.  The
+GPIOs are organized in port/bank.  Each port consists of 32 GPIOs.
+
+As the GPIO controller is embedded in the PIN controller and all the
+GPIO ports share the same IO space with PIN controller, the GPIO node
+will be represented as sub-nodes of MXS pinctrl node.
+
+Required properties for GPIO node:
+- compatible : Should be "fsl,<soc>-gpio".  The supported SoCs include
+  imx23 and imx28.
+- interrupts : Should be the port interrupt shared by all 32 pins.
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two.  The first cell is the pin number and
+  the second cell is used to specify optional parameters (currently
+  unused).
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells : Should be 2.  The first cell is the GPIO number.
+  The second cell bits[3:0] is used to specify trigger type and level flags:
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      4 = active high level-sensitive.
+      8 = active low level-sensitive.
+
+Note: Each GPIO port should have an alias correctly numbered in "aliases"
+node.
+
+Examples:
+
+aliases {
+        gpio0 = &gpio0;
+        gpio1 = &gpio1;
+        gpio2 = &gpio2;
+        gpio3 = &gpio3;
+        gpio4 = &gpio4;
+};
+
+pinctrl@80018000 {
+        compatible = "fsl,imx28-pinctrl", "simple-bus";
+        reg = <0x80018000 2000>;
+
+        gpio0: gpio@0 {
+                compatible = "fsl,imx28-gpio";
+                interrupts = <127>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+
+        gpio1: gpio@1 {
+                compatible = "fsl,imx28-gpio";
+                interrupts = <126>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+
+        gpio2: gpio@2 {
+                compatible = "fsl,imx28-gpio";
+                interrupts = <125>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+
+        gpio3: gpio@3 {
+                compatible = "fsl,imx28-gpio";
+                interrupts = <124>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+
+        gpio4: gpio@4 {
+                compatible = "fsl,imx28-gpio";
+                interrupts = <123>;
+                gpio-controller;
+                #gpio-cells = <2>;
+                interrupt-controller;
+                #interrupt-cells = <2>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
new file mode 100644
index 000000000000..1bfc02de1b0c
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
@@ -0,0 +1,16 @@
+* Freescale MXS Inter IC (I2C) Controller
+
+Required properties:
+- compatible: Should be "fsl,<chip>-i2c"
+- reg: Should contain registers location and length
+- interrupts: Should contain ERROR and DMA interrupts
+
+Examples:
+
+i2c0: i2c@80058000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,imx28-i2c";
+        reg = <0x80058000 2000>;
+        interrupts = <111 68>;
+};
diff --git a/Documentation/devicetree/bindings/mmc/mxs-mmc.txt b/Documentation/devicetree/bindings/mmc/mxs-mmc.txt
new file mode 100644
index 000000000000..14d870a9e3db
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/mxs-mmc.txt
@@ -0,0 +1,25 @@
+* Freescale MXS MMC controller
+
+The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
+to support MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+- compatible: Should be "fsl,<chip>-mmc".  The supported chips include
+  imx23 and imx28.
+- reg: Should contain registers location and length
+- interrupts: Should contain ERROR and DMA interrupts
+- fsl,ssp-dma-channel: APBH DMA channel for the SSP
+- bus-width: Number of data lines, can be <1>, <4>, or <8>
+
+Optional properties:
+- wp-gpios: Specify GPIOs for write protection
+
+Examples:
+
+ssp0: ssp@80010000 {
+        compatible = "fsl,imx28-mmc";
+        reg = <0x80010000 2000>;
+        interrupts = <96 82>;
+        fsl,ssp-dma-channel = <0>;
+        bus-width = <8>;
+};
diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
index de439517dff0..7ab9e1a2d8be 100644
--- a/Documentation/devicetree/bindings/net/fsl-fec.txt
+++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
@@ -14,7 +14,7 @@ Optional properties:
 
 Example:
 
-fec@83fec000 {
+ethernet@83fec000 {
         compatible = "fsl,imx51-fec", "fsl,imx27-fec";
         reg = <0x83fec000 0x4000>;
         interrupts = <87>;
diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
index a9c0406280e8..b462d0c54823 100644
--- a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
+++ b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt
@@ -11,7 +11,7 @@ Optional properties:
 
 Example:
 
-uart@73fbc000 {
+serial@73fbc000 {
         compatible = "fsl,imx51-uart", "fsl,imx21-uart";
         reg = <0x73fbc000 0x4000>;
         interrupts = <31>;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 515c8c85cbbb..5e7601301b41 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -459,6 +459,7 @@ config ARCH_MXS
         select COMMON_CLK
         select HAVE_CLK_PREPARE
         select PINCTRL
+        select USE_OF
         help
           Support for Freescale MXS-based family of processors
 
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e561adc1db0c..01a134141216 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -209,6 +209,14 @@ choice
                   Say Y here if you want kernel low-level debugging support
                   on i.MX50 or i.MX53.
 
+        config DEBUG_IMX6Q_UART2
+                bool "i.MX6Q Debug UART2"
+                depends on SOC_IMX6Q
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on i.MX6Q UART2. This is correct for e.g. the SabreLite
+                  board.
+
         config DEBUG_IMX6Q_UART4
                 bool "i.MX6Q Debug UART4"
                 depends on SOC_IMX6Q
diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts
new file mode 100644
index 000000000000..70bffa929b65
--- /dev/null
+++ b/arch/arm/boot/dts/imx23-evk.dts
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx23.dtsi"
+
+/ {
+        model = "Freescale i.MX23 Evaluation Kit";
+        compatible = "fsl,imx23-evk", "fsl,imx23";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx23-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_8bit_pins_a &mmc0_pins_fixup>;
+                                bus-width = <8>;
+                                wp-gpios = <&gpio1 30 0>;
+                                status = "okay";
+                        };
+                };
+
+                apbx@80040000 {
+                        duart: serial@80070000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
new file mode 100644
index 000000000000..8c5f9994f3fc
--- /dev/null
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -0,0 +1,295 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        interrupt-parent = <&icoll>;
+
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+        };
+
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        apb@80000000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x80000000 0x80000>;
+                ranges;
+
+                apbh@80000000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80000000 0x40000>;
+                        ranges;
+
+                        icoll: interrupt-controller@80000000 {
+                                compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                reg = <0x80000000 0x2000>;
+                        };
+
+                        dma-apbh@80004000 {
+                                compatible = "fsl,imx23-dma-apbh";
+                                reg = <0x80004000 2000>;
+                        };
+
+                        ecc@80008000 {
+                                reg = <0x80008000 2000>;
+                                status = "disabled";
+                        };
+
+                        bch@8000a000 {
+                                reg = <0x8000a000 2000>;
+                                status = "disabled";
+                        };
+
+                        gpmi@8000c000 {
+                                reg = <0x8000c000 2000>;
+                                status = "disabled";
+                        };
+
+                        ssp0: ssp@80010000 {
+                                reg = <0x80010000 2000>;
+                                interrupts = <15 14>;
+                                fsl,ssp-dma-channel = <1>;
+                                status = "disabled";
+                        };
+
+                        etm@80014000 {
+                                reg = <0x80014000 2000>;
+                                status = "disabled";
+                        };
+
+                        pinctrl@80018000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx23-pinctrl", "simple-bus";
+                                reg = <0x80018000 2000>;
+
+                                gpio0: gpio@0 {
+                                        compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
+                                        interrupts = <16>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio1: gpio@1 {
+                                        compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
+                                        interrupts = <17>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio2: gpio@2 {
+                                        compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
+                                        interrupts = <18>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                duart_pins_a: duart@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x11a2 0x11b2>;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                mmc0_8bit_pins_a: mmc0-8bit@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x2020 0x2030 0x2040
+                                                0x2050 0x0082 0x0092 0x00a2
+                                                0x00b2 0x2000 0x2010 0x2060>;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                mmc0_pins_fixup: mmc0-pins-fixup {
+                                        fsl,pinmux-ids = <0x2010 0x2060>;
+                                        fsl,pull-up = <0>;
+                                };
+                        };
+
+                        digctl@8001c000 {
+                                reg = <0x8001c000 2000>;
+                                status = "disabled";
+                        };
+
+                        emi@80020000 {
+                                reg = <0x80020000 2000>;
+                                status = "disabled";
+                        };
+
+                        dma-apbx@80024000 {
+                                compatible = "fsl,imx23-dma-apbx";
+                                reg = <0x80024000 2000>;
+                        };
+
+                        dcp@80028000 {
+                                reg = <0x80028000 2000>;
+                                status = "disabled";
+                        };
+
+                        pxp@8002a000 {
+                                reg = <0x8002a000 2000>;
+                                status = "disabled";
+                        };
+
+                        ocotp@8002c000 {
+                                reg = <0x8002c000 2000>;
+                                status = "disabled";
+                        };
+
+                        axi-ahb@8002e000 {
+                                reg = <0x8002e000 2000>;
+                                status = "disabled";
+                        };
+
+                        lcdif@80030000 {
+                                reg = <0x80030000 2000>;
+                                status = "disabled";
+                        };
+
+                        ssp1: ssp@80034000 {
+                                reg = <0x80034000 2000>;
+                                interrupts = <2 20>;
+                                fsl,ssp-dma-channel = <2>;
+                                status = "disabled";
+                        };
+
+                        tvenc@80038000 {
+                                reg = <0x80038000 2000>;
+                                status = "disabled";
+                        };
+                };
+
+                apbx@80040000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80040000 0x40000>;
+                        ranges;
+
+                        clkctl@80040000 {
+                                reg = <0x80040000 2000>;
+                                status = "disabled";
+                        };
+
+                        saif0: saif@80042000 {
+                                reg = <0x80042000 2000>;
+                                status = "disabled";
+                        };
+
+                        power@80044000 {
+                                reg = <0x80044000 2000>;
+                                status = "disabled";
+                        };
+
+                        saif1: saif@80046000 {
+                                reg = <0x80046000 2000>;
+                                status = "disabled";
+                        };
+
+                        audio-out@80048000 {
+                                reg = <0x80048000 2000>;
+                                status = "disabled";
+                        };
+
+                        audio-in@8004c000 {
+                                reg = <0x8004c000 2000>;
+                                status = "disabled";
+                        };
+
+                        lradc@80050000 {
+                                reg = <0x80050000 2000>;
+                                status = "disabled";
+                        };
+
+                        spdif@80054000 {
+                                reg = <0x80054000 2000>;
+                                status = "disabled";
+                        };
+
+                        i2c@80058000 {
+                                reg = <0x80058000 2000>;
+                                status = "disabled";
+                        };
+
+                        rtc@8005c000 {
+                                reg = <0x8005c000 2000>;
+                                status = "disabled";
+                        };
+
+                        pwm@80064000 {
+                                reg = <0x80064000 2000>;
+                                status = "disabled";
+                        };
+
+                        timrot@80068000 {
+                                reg = <0x80068000 2000>;
+                                status = "disabled";
+                        };
+
+                        auart0: serial@8006c000 {
+                                reg = <0x8006c000 0x2000>;
+                                status = "disabled";
+                        };
+
+                        auart1: serial@8006e000 {
+                                reg = <0x8006e000 0x2000>;
+                                status = "disabled";
+                        };
+
+                        duart: serial@80070000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x80070000 0x2000>;
+                                interrupts = <0>;
+                                status = "disabled";
+                        };
+
+                        usbphy@8007c000 {
+                                reg = <0x8007c000 0x2000>;
+                                status = "disabled";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x80080000 0x80000>;
+                ranges;
+
+                usbctrl@80080000 {
+                        reg = <0x80080000 0x10000>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
index a51a08fc2af9..2b0ff60247a4 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -27,22 +27,22 @@
                                 status = "okay";
                         };
 
-                        uart@1000a000 {
+                        serial@1000a000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
 
-                        uart@1000b000 {
+                        serial@1000b000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
 
-                        uart@1000c000 {
+                        serial@1000c000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
 
-                        fec@1002b000 {
+                        ethernet@1002b000 {
                                 status = "okay";
                         };
 
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index bc5e7d5ddd54..2b1a166d41f9 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -59,28 +59,28 @@
                                 status = "disabled";
                         };
 
-                        uart1: uart@1000a000 {
+                        uart1: serial@1000a000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1000a000 0x1000>;
                                 interrupts = <20>;
                                 status = "disabled";
                         };
 
-                        uart2: uart@1000b000 {
+                        uart2: serial@1000b000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1000b000 0x1000>;
                                 interrupts = <19>;
                                 status = "disabled";
                         };
 
-                        uart3: uart@1000c000 {
+                        uart3: serial@1000c000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1000c000 0x1000>;
                                 interrupts = <18>;
                                 status = "disabled";
                         };
 
-                        uart4: uart@1000d000 {
+                        uart4: serial@1000d000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1000d000 0x1000>;
                                 interrupts = <17>;
@@ -183,14 +183,14 @@
                                 status = "disabled";
                         };
 
-                        uart5: uart@1001b000 {
+                        uart5: serial@1001b000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1001b000 0x1000>;
                                 interrupts = <49>;
                                 status = "disabled";
                         };
 
-                        uart6: uart@1001c000 {
+                        uart6: serial@1001c000 {
                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
                                 reg = <0x1001c000 0x1000>;
                                 interrupts = <48>;
@@ -206,7 +206,7 @@
                                 status = "disabled";
                         };
 
-                        fec: fec@1002b000 {
+                        fec: ethernet@1002b000 {
                                 compatible = "fsl,imx27-fec";
                                 reg = <0x1002b000 0x4000>;
                                 interrupts = <50>;
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
new file mode 100644
index 000000000000..ee520a529cb4
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -0,0 +1,114 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx28.dtsi"
+
+/ {
+        model = "Freescale i.MX28 Evaluation Kit";
+        compatible = "fsl,imx28-evk", "fsl,imx28";
+
+        memory {
+                reg = <0x40000000 0x08000000>;
+        };
+
+        apb@80000000 {
+                apbh@80000000 {
+                        ssp0: ssp@80010000 {
+                                compatible = "fsl,imx28-mmc";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&mmc0_8bit_pins_a
+                                        &mmc0_cd_cfg &mmc0_sck_cfg>;
+                                bus-width = <8>;
+                                wp-gpios = <&gpio2 12 0>;
+                                status = "okay";
+                        };
+
+                        ssp1: ssp@80012000 {
+                                compatible = "fsl,imx28-mmc";
+                                bus-width = <8>;
+                                wp-gpios = <&gpio0 28 0>;
+                                status = "okay";
+                        };
+                };
+
+                apbx@80040000 {
+                        saif0: saif@80042000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&saif0_pins_a>;
+                                status = "okay";
+                        };
+
+                        saif1: saif@80046000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&saif1_pins_a>;
+                                fsl,saif-master = <&saif0>;
+                                status = "okay";
+                        };
+
+                        i2c0: i2c@80058000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&i2c0_pins_a>;
+                                status = "okay";
+
+                                sgtl5000: codec@0a {
+                                        compatible = "fsl,sgtl5000";
+                                        reg = <0x0a>;
+                                        VDDA-supply = <&reg_3p3v>;
+                                        VDDIO-supply = <&reg_3p3v>;
+
+                                };
+                        };
+
+                        duart: serial@80074000 {
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&duart_pins_a>;
+                                status = "okay";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                mac0: ethernet@800f0000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac0_pins_a>;
+                        status = "okay";
+                };
+
+                mac1: ethernet@800f4000 {
+                        phy-mode = "rmii";
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&mac1_pins_a>;
+                        status = "okay";
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_3p3v: 3p3v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P3V";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+        };
+
+        sound {
+                compatible = "fsl,imx28-evk-sgtl5000",
+                             "fsl,mxs-audio-sgtl5000";
+                model = "imx28-evk-sgtl5000";
+                saif-controllers = <&saif0 &saif1>;
+                audio-codec = <&sgtl5000>;
+        };
+};
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
new file mode 100644
index 000000000000..4634cb861a59
--- /dev/null
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -0,0 +1,497 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        interrupt-parent = <&icoll>;
+
+        aliases {
+                gpio0 = &gpio0;
+                gpio1 = &gpio1;
+                gpio2 = &gpio2;
+                gpio3 = &gpio3;
+                gpio4 = &gpio4;
+                saif0 = &saif0;
+                saif1 = &saif1;
+        };
+
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        apb@80000000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x80000000 0x80000>;
+                ranges;
+
+                apbh@80000000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80000000 0x3c900>;
+                        ranges;
+
+                        icoll: interrupt-controller@80000000 {
+                                compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                reg = <0x80000000 0x2000>;
+                        };
+
+                        hsadc@80002000 {
+                                reg = <0x80002000 2000>;
+                                interrupts = <13 87>;
+                                status = "disabled";
+                        };
+
+                        dma-apbh@80004000 {
+                                compatible = "fsl,imx28-dma-apbh";
+                                reg = <0x80004000 2000>;
+                        };
+
+                        perfmon@80006000 {
+                                reg = <0x80006000 800>;
+                                interrupts = <27>;
+                                status = "disabled";
+                        };
+
+                        bch@8000a000 {
+                                reg = <0x8000a000 2000>;
+                                interrupts = <41>;
+                                status = "disabled";
+                        };
+
+                        gpmi@8000c000 {
+                                reg = <0x8000c000 2000>;
+                                interrupts = <42 88>;
+                                status = "disabled";
+                        };
+
+                        ssp0: ssp@80010000 {
+                                reg = <0x80010000 2000>;
+                                interrupts = <96 82>;
+                                fsl,ssp-dma-channel = <0>;
+                                status = "disabled";
+                        };
+
+                        ssp1: ssp@80012000 {
+                                reg = <0x80012000 2000>;
+                                interrupts = <97 83>;
+                                fsl,ssp-dma-channel = <1>;
+                                status = "disabled";
+                        };
+
+                        ssp2: ssp@80014000 {
+                                reg = <0x80014000 2000>;
+                                interrupts = <98 84>;
+                                fsl,ssp-dma-channel = <2>;
+                                status = "disabled";
+                        };
+
+                        ssp3: ssp@80016000 {
+                                reg = <0x80016000 2000>;
+                                interrupts = <99 85>;
+                                fsl,ssp-dma-channel = <3>;
+                                status = "disabled";
+                        };
+
+                        pinctrl@80018000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx28-pinctrl", "simple-bus";
+                                reg = <0x80018000 2000>;
+
+                                gpio0: gpio@0 {
+                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
+                                        interrupts = <127>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio1: gpio@1 {
+                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
+                                        interrupts = <126>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio2: gpio@2 {
+                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
+                                        interrupts = <125>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio3: gpio@3 {
+                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
+                                        interrupts = <124>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                gpio4: gpio@4 {
+                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
+                                        interrupts = <123>;
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                };
+
+                                duart_pins_a: duart@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x3102 0x3112>;
+                                        fsl,drive-strength = <0>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                mac0_pins_a: mac0@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x4000 0x4010 0x4020
+                                                0x4030 0x4040 0x4060 0x4070
+                                                0x4080 0x4100>;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                mac1_pins_a: mac1@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
+                                                0x40e1 0x40b1 0x40c1>;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                mmc0_8bit_pins_a: mmc0-8bit@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x2000 0x2010 0x2020
+                                                0x2030 0x2040 0x2050 0x2060
+                                                0x2070 0x2080 0x2090 0x20a0>;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                mmc0_cd_cfg: mmc0-cd-cfg {
+                                        fsl,pinmux-ids = <0x2090>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                mmc0_sck_cfg: mmc0-sck-cfg {
+                                        fsl,pinmux-ids = <0x20a0>;
+                                        fsl,drive-strength = <2>;
+                                        fsl,pull-up = <0>;
+                                };
+
+                                i2c0_pins_a: i2c0@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x3180 0x3190>;
+                                        fsl,drive-strength = <1>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                saif0_pins_a: saif0@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids =
+                                                <0x3140 0x3150 0x3160 0x3170>;
+                                        fsl,drive-strength = <2>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+
+                                saif1_pins_a: saif1@0 {
+                                        reg = <0>;
+                                        fsl,pinmux-ids = <0x31a0>;
+                                        fsl,drive-strength = <2>;
+                                        fsl,voltage = <1>;
+                                        fsl,pull-up = <1>;
+                                };
+                        };
+
+                        digctl@8001c000 {
+                                reg = <0x8001c000 2000>;
+                                interrupts = <89>;
+                                status = "disabled";
+                        };
+
+                        etm@80022000 {
+                                reg = <0x80022000 2000>;
+                                status = "disabled";
+                        };
+
+                        dma-apbx@80024000 {
+                                compatible = "fsl,imx28-dma-apbx";
+                                reg = <0x80024000 2000>;
+                        };
+
+                        dcp@80028000 {
+                                reg = <0x80028000 2000>;
+                                interrupts = <52 53 54>;
+                                status = "disabled";
+                        };
+
+                        pxp@8002a000 {
+                                reg = <0x8002a000 2000>;
+                                interrupts = <39>;
+                                status = "disabled";
+                        };
+
+                        ocotp@8002c000 {
+                                reg = <0x8002c000 2000>;
+                                status = "disabled";
+                        };
+
+                        axi-ahb@8002e000 {
+                                reg = <0x8002e000 2000>;
+                                status = "disabled";
+                        };
+
+                        lcdif@80030000 {
+                                reg = <0x80030000 2000>;
+                                interrupts = <38 86>;
+                                status = "disabled";
+                        };
+
+                        can0: can@80032000 {
+                                reg = <0x80032000 2000>;
+                                interrupts = <8>;
+                                status = "disabled";
+                        };
+
+                        can1: can@80034000 {
+                                reg = <0x80034000 2000>;
+                                interrupts = <9>;
+                                status = "disabled";
+                        };
+
+                        simdbg@8003c000 {
+                                reg = <0x8003c000 200>;
+                                status = "disabled";
+                        };
+
+                        simgpmisel@8003c200 {
+                                reg = <0x8003c200 100>;
+                                status = "disabled";
+                        };
+
+                        simsspsel@8003c300 {
+                                reg = <0x8003c300 100>;
+                                status = "disabled";
+                        };
+
+                        simmemsel@8003c400 {
+                                reg = <0x8003c400 100>;
+                                status = "disabled";
+                        };
+
+                        gpiomon@8003c500 {
+                                reg = <0x8003c500 100>;
+                                status = "disabled";
+                        };
+
+                        simenet@8003c700 {
+                                reg = <0x8003c700 100>;
+                                status = "disabled";
+                        };
+
+                        armjtag@8003c800 {
+                                reg = <0x8003c800 100>;
+                                status = "disabled";
+                        };
+                };
+
+                apbx@80040000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x80040000 0x40000>;
+                        ranges;
+
+                        clkctl@80040000 {
+                                reg = <0x80040000 2000>;
+                                status = "disabled";
+                        };
+
+                        saif0: saif@80042000 {
+                                compatible = "fsl,imx28-saif";
+                                reg = <0x80042000 2000>;
+                                interrupts = <59 80>;
+                                fsl,saif-dma-channel = <4>;
+                                status = "disabled";
+                        };
+
+                        power@80044000 {
+                                reg = <0x80044000 2000>;
+                                status = "disabled";
+                        };
+
+                        saif1: saif@80046000 {
+                                compatible = "fsl,imx28-saif";
+                                reg = <0x80046000 2000>;
+                                interrupts = <58 81>;
+                                fsl,saif-dma-channel = <5>;
+                                status = "disabled";
+                        };
+
+                        lradc@80050000 {
+                                reg = <0x80050000 2000>;
+                                status = "disabled";
+                        };
+
+                        spdif@80054000 {
+                                reg = <0x80054000 2000>;
+                                interrupts = <45 66>;
+                                status = "disabled";
+                        };
+
+                        rtc@80056000 {
+                                reg = <0x80056000 2000>;
+                                interrupts = <28 29>;
+                                status = "disabled";
+                        };
+
+                        i2c0: i2c@80058000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx28-i2c";
+                                reg = <0x80058000 2000>;
+                                interrupts = <111 68>;
+                                status = "disabled";
+                        };
+
+                        i2c1: i2c@8005a000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx28-i2c";
+                                reg = <0x8005a000 2000>;
+                                interrupts = <110 69>;
+                                status = "disabled";
+                        };
+
+                        pwm@80064000 {
+                                reg = <0x80064000 2000>;
+                                status = "disabled";
+                        };
+
+                        timrot@80068000 {
+                                reg = <0x80068000 2000>;
+                                status = "disabled";
+                        };
+
+                        auart0: serial@8006a000 {
+                                reg = <0x8006a000 0x2000>;
+                                interrupts = <112 70 71>;
+                                status = "disabled";
+                        };
+
+                        auart1: serial@8006c000 {
+                                reg = <0x8006c000 0x2000>;
+                                interrupts = <113 72 73>;
+                                status = "disabled";
+                        };
+
+                        auart2: serial@8006e000 {
+                                reg = <0x8006e000 0x2000>;
+                                interrupts = <114 74 75>;
+                                status = "disabled";
+                        };
+
+                        auart3: serial@80070000 {
+                                reg = <0x80070000 0x2000>;
+                                interrupts = <115 76 77>;
+                                status = "disabled";
+                        };
+
+                        auart4: serial@80072000 {
+                                reg = <0x80072000 0x2000>;
+                                interrupts = <116 78 79>;
+                                status = "disabled";
+                        };
+
+                        duart: serial@80074000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0x80074000 0x1000>;
+                                interrupts = <47>;
+                                status = "disabled";
+                        };
+
+                        usbphy0: usbphy@8007c000 {
+                                reg = <0x8007c000 0x2000>;
+                                status = "disabled";
+                        };
+
+                        usbphy1: usbphy@8007e000 {
+                                reg = <0x8007e000 0x2000>;
+                                status = "disabled";
+                        };
+                };
+        };
+
+        ahb@80080000 {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x80080000 0x80000>;
+                ranges;
+
+                usbctrl0: usbctrl@80080000 {
+                        reg = <0x80080000 0x10000>;
+                        status = "disabled";
+                };
+
+                usbctrl1: usbctrl@80090000 {
+                        reg = <0x80090000 0x10000>;
+                        status = "disabled";
+                };
+
+                dflpt@800c0000 {
+                        reg = <0x800c0000 0x10000>;
+                        status = "disabled";
+                };
+
+                mac0: ethernet@800f0000 {
+                        compatible = "fsl,imx28-fec";
+                        reg = <0x800f0000 0x4000>;
+                        interrupts = <101>;
+                        status = "disabled";
+                };
+
+                mac1: ethernet@800f4000 {
+                        compatible = "fsl,imx28-fec";
+                        reg = <0x800f4000 0x4000>;
+                        interrupts = <102>;
+                        status = "disabled";
+                };
+
+                switch@800f8000 {
+                        reg = <0x800f8000 0x8000>;
+                        status = "disabled";
+                };
+
+        };
+};
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 9949e6060dee..de065b5976e6 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -17,10 +17,6 @@
         model = "Freescale i.MX51 Babbage Board";
         compatible = "fsl,imx51-babbage", "fsl,imx51";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-        };
-
         memory {
                 reg = <0x90000000 0x20000000>;
         };
@@ -40,7 +36,7 @@
                                         status = "okay";
                                 };
 
-                                uart3: uart@7000c000 {
+                                uart3: serial@7000c000 {
                                         fsl,uart-has-rtscts;
                                         status = "okay";
                                 };
@@ -166,6 +162,11 @@
                                                 };
                                         };
                                 };
+
+                                ssi2: ssi@70014000 {
+                                        fsl,mode = "i2s-slave";
+                                        status = "okay";
+                                };
                         };
 
                         wdog@73f98000 { /* WDOG1 */
@@ -177,12 +178,12 @@
                                 reg = <0x73fa8000 0x4000>;
                         };
 
-                        uart1: uart@73fbc000 {
+                        uart1: serial@73fbc000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
 
-                        uart2: uart@73fc0000 {
+                        uart2: serial@73fc0000 {
                                 status = "okay";
                         };
                 };
@@ -195,13 +196,20 @@
                         i2c@83fc4000 { /* I2C2 */
                                 status = "okay";
 
-                                codec: sgtl5000@0a {
+                                sgtl5000: codec@0a {
                                         compatible = "fsl,sgtl5000";
                                         reg = <0x0a>;
+                                        clock-frequency = <26000000>;
+                                        VDDA-supply = <&vdig_reg>;
+                                        VDDIO-supply = <&vvideo_reg>;
                                 };
                         };
 
-                        fec@83fec000 {
+                        audmux@83fd0000 {
+                                status = "okay";
+                        };
+
+                        ethernet@83fec000 {
                                 phy-mode = "mii";
                                 status = "okay";
                         };
@@ -218,4 +226,18 @@
                         gpio-key,wakeup;
                 };
         };
+
+        sound {
+                compatible = "fsl,imx51-babbage-sgtl5000",
+                             "fsl,imx-audio-sgtl5000";
+                model = "imx51-babbage-sgtl5000";
+                ssi-controller = <&ssi2>;
+                audio-codec = <&sgtl5000>;
+                audio-routing =
+                        "MIC_IN", "Mic Jack",
+                        "Mic Jack", "Mic Bias",
+                        "Headphone Jack", "HP_OUT";
+                mux-int-port = <2>;
+                mux-ext-port = <3>;
+        };
 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 6663986fe1c8..bfa65abe8ef2 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -86,7 +86,7 @@
                                         status = "disabled";
                                 };
 
-                                uart3: uart@7000c000 {
+                                uart3: serial@7000c000 {
                                         compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                         reg = <0x7000c000 0x4000>;
                                         interrupts = <33>;
@@ -102,6 +102,15 @@
                                         status = "disabled";
                                 };
 
+                                ssi2: ssi@70014000 {
+                                        compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+                                        reg = <0x70014000 0x4000>;
+                                        interrupts = <30>;
+                                        fsl,fifo-depth = <15>;
+                                        fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
+                                        status = "disabled";
+                                };
+
                                 esdhc@70020000 { /* ESDHC3 */
                                         compatible = "fsl,imx51-esdhc";
                                         reg = <0x70020000 0x4000>;
@@ -171,14 +180,14 @@
                                 status = "disabled";
                         };
 
-                        uart1: uart@73fbc000 {
+                        uart1: serial@73fbc000 {
                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                 reg = <0x73fbc000 0x4000>;
                                 interrupts = <31>;
                                 status = "disabled";
                         };
 
-                        uart2: uart@73fc0000 {
+                        uart2: serial@73fc0000 {
                                 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                 reg = <0x73fc0000 0x4000>;
                                 interrupts = <32>;
@@ -235,7 +244,31 @@
                                 status = "disabled";
                         };
 
-                        fec@83fec000 {
+                        ssi1: ssi@83fcc000 {
+                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+                                reg = <0x83fcc000 0x4000>;
+                                interrupts = <29>;
+                                fsl,fifo-depth = <15>;
+                                fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
+                                status = "disabled";
+                        };
+
+                        audmux@83fd0000 {
+                                compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
+                                reg = <0x83fd0000 0x4000>;
+                                status = "disabled";
+                        };
+
+                        ssi3: ssi@83fe8000 {
+                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
+                                reg = <0x83fe8000 0x4000>;
+                                interrupts = <96>;
+                                fsl,fifo-depth = <15>;
+                                fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */
+                                status = "disabled";
+                        };
+
+                        ethernet@83fec000 {
                                 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
                                 reg = <0x83fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 2dccce46ed81..5b8eafcdbeec 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -17,10 +17,6 @@
         model = "Freescale i.MX53 Automotive Reference Design Board";
         compatible = "fsl,imx53-ard", "fsl,imx53";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-        };
-
         memory {
                 reg = <0x70000000 0x40000000>;
         };
@@ -44,7 +40,7 @@
                                 reg = <0x53fa8000 0x4000>;
                         };
 
-                        uart1: uart@53fbc000 {
+                        uart1: serial@53fbc000 {
                                 status = "okay";
                         };
                 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 5bac4aa4800b..9c798034675e 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -17,10 +17,6 @@
         model = "Freescale i.MX53 Evaluation Kit";
         compatible = "fsl,imx53-evk", "fsl,imx53";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-        };
-
         memory {
                 reg = <0x70000000 0x80000000>;
         };
@@ -75,7 +71,7 @@
                                 reg = <0x53fa8000 0x4000>;
                         };
 
-                        uart1: uart@53fbc000 {
+                        uart1: serial@53fbc000 {
                                 status = "okay";
                         };
                 };
@@ -99,7 +95,7 @@
                                 };
                         };
 
-                        fec@63fec000 {
+                        ethernet@63fec000 {
                                 phy-mode = "rmii";
                                 phy-reset-gpios = <&gpio7 6 0>;
                                 status = "okay";
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index 5c57c8672c36..2d803a9a6949 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -17,10 +17,6 @@
         model = "Freescale i.MX53 Quick Start Board";
         compatible = "fsl,imx53-qsb", "fsl,imx53";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-        };
-
         memory {
                 reg = <0x70000000 0x40000000>;
         };
@@ -33,6 +29,11 @@
                                         status = "okay";
                                 };
 
+                                ssi2: ssi@50014000 {
+                                        fsl,mode = "i2s-slave";
+                                        status = "okay";
+                                };
+
                                 esdhc@50020000 { /* ESDHC3 */
                                         cd-gpios = <&gpio3 11 0>;
                                         wp-gpios = <&gpio3 12 0>;
@@ -49,7 +50,7 @@
                                 reg = <0x53fa8000 0x4000>;
                         };
 
-                        uart1: uart@53fbc000 {
+                        uart1: serial@53fbc000 {
                                 status = "okay";
                         };
                 };
@@ -62,9 +63,11 @@
                         i2c@63fc4000 { /* I2C2 */
                                 status = "okay";
 
-                                codec: sgtl5000@0a {
+                                sgtl5000: codec@0a {
                                         compatible = "fsl,sgtl5000";
                                         reg = <0x0a>;
+                                        VDDA-supply = <&reg_3p2v>;
+                                        VDDIO-supply = <&reg_3p2v>;
                                 };
                         };
 
@@ -77,12 +80,88 @@
                                 };
 
                                 pmic: dialog@48 {
-                                        compatible = "dialog,da9053", "dialog,da9052";
+                                        compatible = "dlg,da9053-aa", "dlg,da9052";
                                         reg = <0x48>;
+
+                                        regulators {
+                                                buck0 {
+                                                        regulator-min-microvolt = <500000>;
+                                                        regulator-max-microvolt = <2075000>;
+                                                };
+
+                                                buck1 {
+                                                        regulator-min-microvolt = <500000>;
+                                                        regulator-max-microvolt = <2075000>;
+                                                };
+
+                                                buck2 {
+                                                        regulator-min-microvolt = <925000>;
+                                                        regulator-max-microvolt = <2500000>;
+                                                };
+
+                                                buck3 {
+                                                        regulator-min-microvolt = <925000>;
+                                                        regulator-max-microvolt = <2500000>;
+                                                };
+
+                                                ldo4 {
+                                                        regulator-min-microvolt = <600000>;
+                                                        regulator-max-microvolt = <1800000>;
+                                                };
+
+                                                ldo5 {
+                                                        regulator-min-microvolt = <600000>;
+                                                        regulator-max-microvolt = <1800000>;
+                                                };
+
+                                                ldo6 {
+                                                        regulator-min-microvolt = <1725000>;
+                                                        regulator-max-microvolt = <3300000>;
+                                                };
+
+                                                ldo7 {
+                                                        regulator-min-microvolt = <1725000>;
+                                                        regulator-max-microvolt = <3300000>;
+                                                };
+
+                                                ldo8 {
+                                                        regulator-min-microvolt = <1200000>;
+                                                        regulator-max-microvolt = <3600000>;
+                                                };
+
+                                                ldo9 {
+                                                        regulator-min-microvolt = <1200000>;
+                                                        regulator-max-microvolt = <3600000>;
+                                                };
+
+                                                ldo10 {
+                                                        regulator-min-microvolt = <1200000>;
+                                                        regulator-max-microvolt = <3600000>;
+                                                };
+
+                                                ldo11 {
+                                                        regulator-min-microvolt = <1200000>;
+                                                        regulator-max-microvolt = <3600000>;
+                                                };
+
+                                                ldo12 {
+                                                        regulator-min-microvolt = <1250000>;
+                                                        regulator-max-microvolt = <3650000>;
+                                                };
+
+                                                ldo13 {
+                                                        regulator-min-microvolt = <1200000>;
+                                                        regulator-max-microvolt = <3600000>;
+                                                };
+                                        };
                                 };
                         };
 
-                        fec@63fec000 {
+                        audmux@63fd0000 {
+                                status = "okay";
+                        };
+
+                        ethernet@63fec000 {
                                 phy-mode = "rmii";
                                 phy-reset-gpios = <&gpio7 6 0>;
                                 status = "okay";
@@ -122,4 +201,30 @@
                         linux,default-trigger = "heartbeat";
                 };
         };
+
+        regulators {
+                compatible = "simple-bus";
+
+                reg_3p2v: 3p2v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P2V";
+                        regulator-min-microvolt = <3200000>;
+                        regulator-max-microvolt = <3200000>;
+                        regulator-always-on;
+                };
+        };
+
+        sound {
+                compatible = "fsl,imx53-qsb-sgtl5000",
+                             "fsl,imx-audio-sgtl5000";
+                model = "imx53-qsb-sgtl5000";
+                ssi-controller = <&ssi2>;
+                audio-codec = <&sgtl5000>;
+                audio-routing =
+                        "MIC_IN", "Mic Jack",
+                        "Mic Jack", "Mic Bias",
+                        "Headphone Jack", "HP_OUT";
+                mux-int-port = <2>;
+                mux-ext-port = <5>;
+        };
 };
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 139138a556b0..08091029168e 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -17,10 +17,6 @@
         model = "Freescale i.MX53 Smart Mobile Reference Design Board";
         compatible = "fsl,imx53-smd", "fsl,imx53";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-        };
-
         memory {
                 reg = <0x70000000 0x40000000>;
         };
@@ -39,7 +35,7 @@
                                         status = "okay";
                                 };
 
-                                uart3: uart@5000c000 {
+                                uart3: serial@5000c000 {
                                         fsl,uart-has-rtscts;
                                         status = "okay";
                                 };
@@ -90,11 +86,11 @@
                                 reg = <0x53fa8000 0x4000>;
                         };
 
-                        uart1: uart@53fbc000 {
+                        uart1: serial@53fbc000 {
                                 status = "okay";
                         };
 
-                        uart2: uart@53fc0000 {
+                        uart2: serial@53fc0000 {
                                 status = "okay";
                         };
                 };
@@ -142,7 +138,7 @@
                                 };
                         };
 
-                        fec@63fec000 {
+                        ethernet@63fec000 {
                                 phy-mode = "rmii";
                                 phy-reset-gpios = <&gpio7 6 0>;
                                 status = "okay";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 5dd91b942c91..e3e869470cd3 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -88,7 +88,7 @@
                                         status = "disabled";
                                 };
 
-                                uart3: uart@5000c000 {
+                                uart3: serial@5000c000 {
                                         compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                         reg = <0x5000c000 0x4000>;
                                         interrupts = <33>;
@@ -104,6 +104,15 @@
                                         status = "disabled";
                                 };
 
+                                ssi2: ssi@50014000 {
+                                        compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+                                        reg = <0x50014000 0x4000>;
+                                        interrupts = <30>;
+                                        fsl,fifo-depth = <15>;
+                                        fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
+                                        status = "disabled";
+                                };
+
                                 esdhc@50020000 { /* ESDHC3 */
                                         compatible = "fsl,imx53-esdhc";
                                         reg = <0x50020000 0x4000>;
@@ -173,14 +182,14 @@
                                 status = "disabled";
                         };
 
-                        uart1: uart@53fbc000 {
+                        uart1: serial@53fbc000 {
                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                 reg = <0x53fbc000 0x4000>;
                                 interrupts = <31>;
                                 status = "disabled";
                         };
 
-                        uart2: uart@53fc0000 {
+                        uart2: serial@53fc0000 {
                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                 reg = <0x53fc0000 0x4000>;
                                 interrupts = <32>;
@@ -226,7 +235,7 @@
                                 status = "disabled";
                         };
 
-                        uart4: uart@53ff0000 {
+                        uart4: serial@53ff0000 {
                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                 reg = <0x53ff0000 0x4000>;
                                 interrupts = <13>;
@@ -241,7 +250,7 @@
                         reg = <0x60000000 0x10000000>;
                         ranges;
 
-                        uart5: uart@63f90000 {
+                        uart5: serial@63f90000 {
                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                 reg = <0x63f90000 0x4000>;
                                 interrupts = <86>;
@@ -290,7 +299,31 @@
                                 status = "disabled";
                         };
 
-                        fec@63fec000 {
+                        ssi1: ssi@63fcc000 {
+                                compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+                                reg = <0x63fcc000 0x4000>;
+                                interrupts = <29>;
+                                fsl,fifo-depth = <15>;
+                                fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
+                                status = "disabled";
+                        };
+
+                        audmux@63fd0000 {
+                                compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
+                                reg = <0x63fd0000 0x4000>;
+                                status = "disabled";
+                        };
+
+                        ssi3: ssi@63fe8000 {
+                                compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
+                                reg = <0x63fe8000 0x4000>;
+                                interrupts = <96>;
+                                fsl,fifo-depth = <15>;
+                                fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
+                                status = "disabled";
+                        };
+
+                        ethernet@63fec000 {
                                 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
                                 reg = <0x63fec000 0x4000>;
                                 interrupts = <87>;
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index d2eaf521c9fd..db4c6096c562 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -17,19 +17,14 @@
         model = "Freescale i.MX6 Quad Armadillo2 Board";
         compatible = "fsl,imx6q-arm2", "fsl,imx6q";
 
-        chosen {
-                bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
-        };
-
         memory {
                 reg = <0x10000000 0x80000000>;
         };
 
         soc {
                 aips-bus@02100000 { /* AIPS2 */
-                        enet@02188000 {
+                        ethernet@02188000 {
                                 phy-mode = "rgmii";
-                                local-mac-address = [00 04 9F 01 1B 61];
                                 status = "okay";
                         };
 
@@ -37,16 +32,20 @@
                                 cd-gpios = <&gpio6 11 0>;
                                 wp-gpios = <&gpio6 14 0>;
                                 vmmc-supply = <&reg_3p3v>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usdhc3_1>;
                                 status = "okay";
                         };
 
                         usdhc@0219c000 { /* uSDHC4 */
                                 non-removable;
                                 vmmc-supply = <&reg_3p3v>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_usdhc4_1>;
                                 status = "okay";
                         };
 
-                        uart4: uart@021f0000 {
+                        uart4: serial@021f0000 {
                                 status = "okay";
                         };
                 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 4663a4e5a285..e0ec92973e7e 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -22,8 +22,30 @@
         };
 
         soc {
+                aips-bus@02000000 { /* AIPS1 */
+                        spba-bus@02000000 {
+                                ecspi@02008000 { /* eCSPI1 */
+                                        fsl,spi-num-chipselects = <1>;
+                                        cs-gpios = <&gpio3 19 0>;
+                                        status = "okay";
+
+                                        flash: m25p80@0 {
+                                                compatible = "sst,sst25vf016b";
+                                                spi-max-frequency = <20000000>;
+                                                reg = <0>;
+                                        };
+                                };
+
+                                ssi1: ssi@02028000 {
+                                        fsl,mode = "i2s-slave";
+                                        status = "okay";
+                                };
+                        };
+
+                };
+
                 aips-bus@02100000 { /* AIPS2 */
-                        enet@02188000 {
+                        ethernet@02188000 {
                                 phy-mode = "rgmii";
                                 phy-reset-gpios = <&gpio3 23 0>;
                                 status = "okay";
@@ -43,13 +65,23 @@
                                 status = "okay";
                         };
 
-                        uart2: uart@021e8000 {
+                        audmux@021d8000 {
+                                status = "okay";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_audmux_1>;
+                        };
+
+                        uart2: serial@021e8000 {
                                 status = "okay";
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_serial2_1>;
                         };
 
                         i2c@021a0000 { /* I2C1 */
                                 status = "okay";
                                 clock-frequency = <100000>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c1_1>;
 
                                 codec: sgtl5000@0a {
                                         compatible = "fsl,sgtl5000";
@@ -80,4 +112,18 @@
                         regulator-always-on;
                 };
         };
+
+        sound {
+                compatible = "fsl,imx6q-sabrelite-sgtl5000",
+                             "fsl,imx-audio-sgtl5000";
+                model = "imx6q-sabrelite-sgtl5000";
+                ssi-controller = <&ssi1>;
+                audio-codec = <&codec>;
+                audio-routing =
+                        "MIC_IN", "Mic Jack",
+                        "Mic Jack", "Mic Bias",
+                        "Headphone Jack", "HP_OUT";
+                mux-int-port = <1>;
+                mux-ext-port = <4>;
+        };
 };
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
new file mode 100644
index 000000000000..07509a181178
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+        model = "Freescale i.MX6Q SABRE Smart Device Board";
+        compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+
+        memory {
+                reg = <0x10000000 0x40000000>;
+        };
+
+        soc {
+
+                aips-bus@02000000 { /* AIPS1 */
+                        spba-bus@02000000 {
+                                uart1: serial@02020000 {
+                                        status = "okay";
+                                };
+                        };
+                };
+
+                aips-bus@02100000 { /* AIPS2 */
+                        ethernet@02188000 {
+                                phy-mode = "rgmii";
+                                status = "okay";
+                        };
+
+                        usdhc@02194000 { /* uSDHC2 */
+                                cd-gpios = <&gpio2 2 0>;
+                                wp-gpios = <&gpio2 3 0>;
+                                status = "okay";
+                        };
+
+                        usdhc@02198000 { /* uSDHC3 */
+                                cd-gpios = <&gpio2 0 0>;
+                                wp-gpios = <&gpio2 1 0>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 4905f51a106f..8c90cbac945f 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -165,7 +165,7 @@
                                         status = "disabled";
                                 };
 
-                                uart1: uart@02020000 {
+                                uart1: serial@02020000 {
                                         compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                         reg = <0x02020000 0x4000>;
                                         interrupts = <0 26 0x04>;
@@ -177,19 +177,31 @@
                                         interrupts = <0 51 0x04>;
                                 };
 
-                                ssi@02028000 { /* SSI1 */
+                                ssi1: ssi@02028000 {
+                                        compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
                                         reg = <0x02028000 0x4000>;
                                         interrupts = <0 46 0x04>;
+                                        fsl,fifo-depth = <15>;
+                                        fsl,ssi-dma-events = <38 37>;
+                                        status = "disabled";
                                 };
 
-                                ssi@0202c000 { /* SSI2 */
+                                ssi2: ssi@0202c000 {
+                                        compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
                                         reg = <0x0202c000 0x4000>;
                                         interrupts = <0 47 0x04>;
+                                        fsl,fifo-depth = <15>;
+                                        fsl,ssi-dma-events = <42 41>;
+                                        status = "disabled";
                                 };
 
-                                ssi@02030000 { /* SSI3 */
+                                ssi3: ssi@02030000 {
+                                        compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
                                         reg = <0x02030000 0x4000>;
                                         interrupts = <0 48 0x04>;
+                                        fsl,fifo-depth = <15>;
+                                        fsl,ssi-dma-events = <46 45>;
+                                        status = "disabled";
                                 };
 
                                 asrc@02034000 {
@@ -346,6 +358,90 @@
                                 compatible = "fsl,imx6q-anatop";
                                 reg = <0x020c8000 0x1000>;
                                 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
+
+                                regulator-1p1@110 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "vdd1p1";
+                                        regulator-min-microvolt = <800000>;
+                                        regulator-max-microvolt = <1375000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x110>;
+                                        anatop-vol-bit-shift = <8>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <4>;
+                                        anatop-min-voltage = <800000>;
+                                        anatop-max-voltage = <1375000>;
+                                };
+
+                                regulator-3p0@120 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "vdd3p0";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <3150000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x120>;
+                                        anatop-vol-bit-shift = <8>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <0>;
+                                        anatop-min-voltage = <2625000>;
+                                        anatop-max-voltage = <3400000>;
+                                };
+
+                                regulator-2p5@130 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "vdd2p5";
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2750000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x130>;
+                                        anatop-vol-bit-shift = <8>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <0>;
+                                        anatop-min-voltage = <2000000>;
+                                        anatop-max-voltage = <2750000>;
+                                };
+
+                                regulator-vddcore@140 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "cpu";
+                                        regulator-min-microvolt = <725000>;
+                                        regulator-max-microvolt = <1450000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x140>;
+                                        anatop-vol-bit-shift = <0>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <1>;
+                                        anatop-min-voltage = <725000>;
+                                        anatop-max-voltage = <1450000>;
+                                };
+
+                                regulator-vddpu@140 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "vddpu";
+                                        regulator-min-microvolt = <725000>;
+                                        regulator-max-microvolt = <1450000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x140>;
+                                        anatop-vol-bit-shift = <9>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <1>;
+                                        anatop-min-voltage = <725000>;
+                                        anatop-max-voltage = <1450000>;
+                                };
+
+                                regulator-vddsoc@140 {
+                                        compatible = "fsl,anatop-regulator";
+                                        regulator-name = "vddsoc";
+                                        regulator-min-microvolt = <725000>;
+                                        regulator-max-microvolt = <1450000>;
+                                        regulator-always-on;
+                                        anatop-reg-offset = <0x140>;
+                                        anatop-vol-bit-shift = <18>;
+                                        anatop-vol-bit-width = <5>;
+                                        anatop-min-bit-val = <1>;
+                                        anatop-min-voltage = <725000>;
+                                        anatop-max-voltage = <1450000>;
+                                };
                         };
 
                         usbphy@020c9000 { /* USBPHY1 */
@@ -386,7 +482,62 @@
                         };
 
                         iomuxc@020e0000 {
+                                compatible = "fsl,imx6q-iomuxc";
                                 reg = <0x020e0000 0x4000>;
+
+                                /* shared pinctrl settings */
+                                audmux {
+                                        pinctrl_audmux_1: audmux-1 {
+                                                fsl,pins = <18   0x80000000     /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */
+                                                            1586 0x80000000     /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */
+                                                            11   0x80000000     /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */
+                                                            3    0x80000000>;   /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */
+                                        };
+                                };
+
+                                i2c1 {
+                                        pinctrl_i2c1_1: i2c1grp-1 {
+                                                fsl,pins = <137 0x4001b8b1      /* MX6Q_PAD_EIM_D21__I2C1_SCL */
+                                                            196 0x4001b8b1>;    /* MX6Q_PAD_EIM_D28__I2C1_SDA */
+                                        };
+                                };
+
+                                serial2 {
+                                        pinctrl_serial2_1: serial2grp-1 {
+                                                fsl,pins = <183 0x1b0b1         /* MX6Q_PAD_EIM_D26__UART2_TXD */
+                                                            191 0x1b0b1>;       /* MX6Q_PAD_EIM_D27__UART2_RXD */
+                                        };
+                                };
+
+                                usdhc3 {
+                                        pinctrl_usdhc3_1: usdhc3grp-1 {
+                                                fsl,pins = <1273 0x17059        /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */
+                                                            1281 0x10059        /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */
+                                                            1289 0x17059        /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */
+                                                            1297 0x17059        /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */
+                                                            1305 0x17059        /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */
+                                                            1312 0x17059        /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */
+                                                            1265 0x17059        /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */
+                                                            1257 0x17059        /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */
+                                                            1249 0x17059        /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */
+                                                            1241 0x17059>;      /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */
+                                        };
+                                };
+
+                                usdhc4 {
+                                        pinctrl_usdhc4_1: usdhc4grp-1 {
+                                                fsl,pins = <1386 0x17059        /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
+                                                            1392 0x10059        /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
+                                                            1462 0x17059        /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
+                                                            1470 0x17059        /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
+                                                            1478 0x17059        /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
+                                                            1486 0x17059        /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
+                                                            1493 0x17059        /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
+                                                            1501 0x17059        /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
+                                                            1509 0x17059        /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
+                                                            1517 0x17059>;      /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
+                                        };
+                                };
                         };
 
                         dcic@020e4000 { /* DCIC1 */
@@ -422,7 +573,7 @@
                                 reg = <0x0217c000 0x4000>;
                         };
 
-                        enet@02188000 {
+                        ethernet@02188000 {
                                 compatible = "fsl,imx6q-fec";
                                 reg = <0x02188000 0x4000>;
                                 interrupts = <0 118 0x04 0 119 0x04>;
@@ -527,7 +678,9 @@
                         };
 
                         audmux@021d8000 {
+                                compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
                                 reg = <0x021d8000 0x4000>;
+                                status = "disabled";
                         };
 
                         mipi@021dc000 { /* MIPI-CSI */
@@ -543,28 +696,28 @@
                                 interrupts = <0 18 0x04>;
                         };
 
-                        uart2: uart@021e8000 {
+                        uart2: serial@021e8000 {
                                 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                 reg = <0x021e8000 0x4000>;
                                 interrupts = <0 27 0x04>;
                                 status = "disabled";
                         };
 
-                        uart3: uart@021ec000 {
+                        uart3: serial@021ec000 {
                                 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                 reg = <0x021ec000 0x4000>;
                                 interrupts = <0 28 0x04>;
                                 status = "disabled";
                         };
 
-                        uart4: uart@021f0000 {
+                        uart4: serial@021f0000 {
                                 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                 reg = <0x021f0000 0x4000>;
                                 interrupts = <0 29 0x04>;
                                 status = "disabled";
                         };
 
-                        uart5: uart@021f4000 {
+                        uart5: serial@021f4000 {
                                 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                                 reg = <0x021f4000 0x4000>;
                                 interrupts = <0 30 0x04>;
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts
index 4a166357172b..36321bceec46 100644
--- a/arch/arm/boot/dts/tegra-cardhu.dts
+++ b/arch/arm/boot/dts/tegra-cardhu.dts
@@ -7,10 +7,10 @@
         compatible = "nvidia,cardhu", "nvidia,tegra30";
 
         memory {
-                reg = < 0x80000000 0x40000000 >;
+                reg = <0x80000000 0x40000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -64,42 +64,40 @@
         };
 
         serial@70006000 {
-                clock-frequency = < 408000000 >;
-        };
-
-        serial@70006040 {
-                status = "disable";
-        };
-
-        serial@70006200 {
-                status = "disable";
-        };
-
-        serial@70006300 {
-                status = "disable";
-        };
-
-        serial@70006400 {
-                status = "disable";
+                status = "okay";
+                clock-frequency = <408000000>;
         };
 
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <100000>;
         };
 
         i2c@7000c400 {
+                status = "okay";
                 clock-frequency = <100000>;
         };
 
         i2c@7000c500 {
+                status = "okay";
                 clock-frequency = <100000>;
+
+                /* ALS and Proximity sensor */
+                isl29028@44 {
+                        compatible = "isil,isl29028";
+                        reg = <0x44>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <88 0x04>; /*gpio PL0 */
+                };
         };
 
         i2c@7000c700 {
+                status = "okay";
                 clock-frequency = <100000>;
         };
 
         i2c@7000d000 {
+                status = "okay";
                 clock-frequency = <100000>;
 
                 wm8903: wm8903@1a {
@@ -115,46 +113,41 @@
                         micdet-delay = <100>;
                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
                 };
+
+                tps62361 {
+                        compatible = "ti,tps62361";
+                        reg = <0x60>;
+
+                        regulator-name = "tps62361-vout";
+                        regulator-min-microvolt = <500000>;
+                        regulator-max-microvolt = <1500000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                        ti,vsel0-state-high;
+                        ti,vsel1-state-high;
+                };
+        };
+
+        ahub {
+                i2s@70080400 {
+                        status = "okay";
+                };
         };
 
         sdhci@78000000 {
+                status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
                 power-gpios = <&gpio 31 0>; /* gpio PD7 */
                 bus-width = <4>;
         };
 
-        sdhci@78000200 {
-                status = "disable";
-        };
-
-        sdhci@78000400 {
-                status = "disable";
-        };
-
-        sdhci@78000400 {
+        sdhci@78000600 {
+                status = "okay";
                 support-8bit;
                 bus-width = <8>;
         };
 
-        ahub@70080000 {
-                i2s@70080300 {
-                        status = "disable";
-                };
-
-                i2s@70080500 {
-                        status = "disable";
-                };
-
-                i2s@70080600 {
-                        status = "disable";
-                };
-
-                i2s@70080700 {
-                        status = "disable";
-                };
-        };
-
         sound {
                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
                              "nvidia,tegra-audio-wm8903";
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 7cd513ac5ea6..7de701365fce 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -6,11 +6,11 @@
         model = "NVIDIA Tegra2 Harmony evaluation board";
         compatible = "nvidia,harmony", "nvidia,tegra20";
 
-        memory@0 {
-                reg = < 0x00000000 0x40000000 >;
+        memory {
+                reg = <0x00000000 0x40000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -234,42 +234,81 @@
                 };
         };
 
-        pmc@7000f400 {
-                nvidia,invert-interrupt;
+        i2s@70002800 {
+                status = "okay";
+        };
+
+        serial@70006300 {
+                status = "okay";
+                clock-frequency = <216000000>;
         };
 
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
                         interrupt-parent = <&gpio>;
-                        interrupts = < 187 0x04 >;
+                        interrupts = <187 0x04>;
 
                         gpio-controller;
                         #gpio-cells = <2>;
 
                         micdet-cfg = <0>;
                         micdet-delay = <100>;
-                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                        gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
                 };
         };
 
         i2c@7000c400 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000c500 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000d000 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
-        i2s@70002a00 {
-                status = "disable";
+        pmc {
+                nvidia,invert-interrupt;
+        };
+
+        usb@c5000000 {
+                status = "okay";
+        };
+
+        usb@c5004000 {
+                status = "okay";
+                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+        };
+
+        usb@c5008000 {
+                status = "okay";
+        };
+
+        sdhci@c8000200 {
+                status = "okay";
+                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+                power-gpios = <&gpio 155 0>; /* gpio PT3 */
+                bus-width = <4>;
+        };
+
+        sdhci@c8000600 {
+                status = "okay";
+                cd-gpios = <&gpio 58 0>; /* gpio PH2 */
+                wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+                power-gpios = <&gpio 70 0>; /* gpio PI6 */
+                support-8bit;
+                bus-width = <8>;
         };
 
         sound {
@@ -295,51 +334,4 @@
                 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
                 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
         };
-
-        serial@70006000 {
-                status = "disable";
-        };
-
-        serial@70006040 {
-                status = "disable";
-        };
-
-        serial@70006200 {
-                status = "disable";
-        };
-
-        serial@70006300 {
-                clock-frequency = < 216000000 >;
-        };
-
-        serial@70006400 {
-                status = "disable";
-        };
-
-        sdhci@c8000000 {
-                status = "disable";
-        };
-
-        sdhci@c8000200 {
-                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-                power-gpios = <&gpio 155 0>; /* gpio PT3 */
-                bus-width = <4>;
-        };
-
-        sdhci@c8000400 {
-                status = "disable";
-        };
-
-        sdhci@c8000600 {
-                cd-gpios = <&gpio 58 0>; /* gpio PH2 */
-                wp-gpios = <&gpio 59 0>; /* gpio PH3 */
-                power-gpios = <&gpio 70 0>; /* gpio PI6 */
-                support-8bit;
-                bus-width = <8>;
-        };
-
-        usb@c5004000 {
-                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
-        };
 };
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 8d625e4c5de5..bfeb117d5aea 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -6,11 +6,11 @@
         model = "Toshiba AC100 / Dynabook AZ";
         compatible = "compal,paz00", "nvidia,tegra20";
 
-        memory@0 {
+        memory {
                 reg = <0x00000000 0x20000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -226,7 +226,22 @@
                 };
         };
 
+        i2s@70002800 {
+                status = "okay";
+        };
+
+        serial@70006000 {
+                status = "okay";
+                clock-frequency = <216000000>;
+        };
+
+        serial@70006200 {
+                status = "okay";
+                clock-frequency = <216000000>;
+        };
+
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
                 alc5632: alc5632@1e {
@@ -238,25 +253,23 @@
         };
 
         i2c@7000c400 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
-        i2c@7000c500 {
-                status = "disable";
-        };
-
-        nvec@7000c500 {
-                #address-cells = <1>;
-                #size-cells = <0>;
+        nvec {
                 compatible = "nvidia,nvec";
-                reg = <0x7000C500 0x100>;
+                reg = <0x7000c500 0x100>;
                 interrupts = <0 92 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
                 clock-frequency = <80000>;
-                request-gpios = <&gpio 170 0>;
+                request-gpios = <&gpio 170 0>; /* gpio PV2 */
                 slave-addr = <138>;
         };
 
         i2c@7000d000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
                 adt7461@4c {
@@ -265,66 +278,29 @@
                 };
         };
 
-        i2s@70002a00 {
-                status = "disable";
-        };
-
-        sound {
-                compatible = "nvidia,tegra-audio-alc5632-paz00",
-                        "nvidia,tegra-audio-alc5632";
-
-                nvidia,model = "Compal PAZ00";
-
-                nvidia,audio-routing =
-                        "Int Spk", "SPKOUT",
-                        "Int Spk", "SPKOUTN",
-                        "Headset Mic", "MICBIAS1",
-                        "MIC1", "Headset Mic",
-                        "Headset Stereophone", "HPR",
-                        "Headset Stereophone", "HPL",
-                        "DMICDAT", "Digital Mic";
-
-                nvidia,audio-codec = <&alc5632>;
-                nvidia,i2s-controller = <&tegra_i2s1>;
-                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
-        };
-
-        serial@70006000 {
-                clock-frequency = <216000000>;
-        };
-
-        serial@70006040 {
-                status = "disable";
-        };
-
-        serial@70006200 {
-                clock-frequency = <216000000>;
+        usb@c5000000 {
+                status = "okay";
         };
 
-        serial@70006300 {
-                status = "disable";
+        usb@c5004000 {
+                status = "okay";
+                nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
         };
 
-        serial@70006400 {
-                status = "disable";
+        usb@c5008000 {
+                status = "okay";
         };
 
         sdhci@c8000000 {
+                status = "okay";
                 cd-gpios = <&gpio 173 0>; /* gpio PV5 */
                 wp-gpios = <&gpio 57 0>;  /* gpio PH1 */
                 power-gpios = <&gpio 169 0>; /* gpio PV1 */
                 bus-width = <4>;
         };
 
-        sdhci@c8000200 {
-                status = "disable";
-        };
-
-        sdhci@c8000400 {
-                status = "disable";
-        };
-
         sdhci@c8000600 {
+                status = "okay";
                 support-8bit;
                 bus-width = <8>;
         };
@@ -345,12 +321,28 @@
 
                 wifi {
                         label = "wifi-led";
-                        gpios = <&gpio 24 0>;
+                        gpios = <&gpio 24 0>; /* gpio PD0 */
                         linux,default-trigger = "rfkill0";
                 };
         };
 
-        usb@c5004000 {
-                nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+        sound {
+                compatible = "nvidia,tegra-audio-alc5632-paz00",
+                        "nvidia,tegra-audio-alc5632";
+
+                nvidia,model = "Compal PAZ00";
+
+                nvidia,audio-routing =
+                        "Int Spk", "SPKOUT",
+                        "Int Spk", "SPKOUTN",
+                        "Headset Mic", "MICBIAS1",
+                        "MIC1", "Headset Mic",
+                        "Headset Stereophone", "HPR",
+                        "Headset Stereophone", "HPL",
+                        "DMICDAT", "Digital Mic";
+
+                nvidia,audio-codec = <&alc5632>;
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
         };
 };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 315971993cfd..89cb7f2acd92 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -7,11 +7,10 @@
         compatible = "nvidia,seaboard", "nvidia,tegra20";
 
         memory {
-                device_type = "memory";
-                reg = < 0x00000000 0x40000000 >;
+                reg = <0x00000000 0x40000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -100,7 +99,7 @@
                         };
                         hdint {
                                 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
-                                        "lsck", "lsda", "pta";
+                                        "lsck", "lsda";
                                 nvidia,function = "hdmi";
                         };
                         i2cp {
@@ -134,6 +133,10 @@
                                 nvidia,pins = "pmc";
                                 nvidia,function = "pwr_on";
                         };
+                        pta {
+                                nvidia,pins = "pta";
+                                nvidia,function = "i2c2";
+                        };
                         rm {
                                 nvidia,pins = "rm";
                                 nvidia,function = "i2c1";
@@ -254,96 +257,138 @@
                 };
         };
 
+        i2s@70002800 {
+                status = "okay";
+        };
+
+        serial@70006300 {
+                status = "okay";
+                clock-frequency = <216000000>;
+        };
+
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
                         interrupt-parent = <&gpio>;
-                        interrupts = < 187 0x04 >;
+                        interrupts = <187 0x04>;
 
                         gpio-controller;
                         #gpio-cells = <2>;
 
                         micdet-cfg = <0>;
                         micdet-delay = <100>;
-                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                        gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
+                };
+
+                /* ALS and proximity sensor */
+                isl29018@44 {
+                        compatible = "isil,isl29018";
+                        reg = <0x44>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <202 0x04>; /* GPIO PZ2 */
+                };
+
+                gyrometer@68 {
+                        compatible = "invn,mpu3050";
+                        reg = <0x68>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <204 0x04>; /* gpio PZ4 */
                 };
         };
 
         i2c@7000c400 {
-                clock-frequency = <400000>;
+                status = "okay";
+                clock-frequency = <100000>;
+
+                smart-battery@b {
+                        compatible = "ti,bq20z75", "smart-battery-1.1";
+                        reg = <0xb>;
+                        ti,i2c-retry-count = <2>;
+                        ti,poll-retry-count = <10>;
+                };
         };
 
         i2c@7000c500 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000d000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
-                adt7461@4c {
-                        compatible = "adt7461";
+                temperature-sensor@4c {
+                        compatible = "nct1008";
                         reg = <0x4c>;
                 };
-        };
-
-        i2s@70002a00 {
-                status = "disable";
-        };
-
-        sound {
-                compatible = "nvidia,tegra-audio-wm8903-seaboard",
-                             "nvidia,tegra-audio-wm8903";
-                nvidia,model = "NVIDIA Tegra Seaboard";
-
-                nvidia,audio-routing =
-                        "Headphone Jack", "HPOUTR",
-                        "Headphone Jack", "HPOUTL",
-                        "Int Spk", "ROP",
-                        "Int Spk", "RON",
-                        "Int Spk", "LOP",
-                        "Int Spk", "LON",
-                        "Mic Jack", "MICBIAS",
-                        "IN1R", "Mic Jack";
 
-                nvidia,i2s-controller = <&tegra_i2s1>;
-                nvidia,audio-codec = <&wm8903>;
-
-                nvidia,spkr-en-gpios = <&wm8903 2 0>;
-                nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
-        };
-
-        serial@70006000 {
-                status = "disable";
-        };
-
-        serial@70006040 {
-                status = "disable";
+                magnetometer@c {
+                        compatible = "ak8975";
+                        reg = <0xc>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <109 0x04>; /* gpio PN5 */
+                };
         };
 
-        serial@70006200 {
-                status = "disable";
-        };
+        emc {
+                emc-table@190000 {
+                        reg = <190000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = <190000>;
+                        nvidia,emc-registers = <0x0000000c 0x00000026
+                                0x00000009 0x00000003 0x00000004 0x00000004
+                                0x00000002 0x0000000c 0x00000003 0x00000003
+                                0x00000002 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x0000059f
+                                0x00000000 0x00000003 0x00000003 0x00000003
+                                0x00000003 0x00000001 0x0000000b 0x000000c8
+                                0x00000003 0x00000007 0x00000004 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xa06204ae
+                                0x007dc010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000>;
+                };
 
-        serial@70006300 {
-                clock-frequency = < 216000000 >;
+                emc-table@380000 {
+                        reg = <380000>;
+                        compatible = "nvidia,tegra20-emc-table";
+                        clock-frequency = <380000>;
+                        nvidia,emc-registers = <0x00000017 0x0000004b
+                                0x00000012 0x00000006 0x00000004 0x00000005
+                                0x00000003 0x0000000c 0x00000006 0x00000006
+                                0x00000003 0x00000001 0x00000004 0x00000005
+                                0x00000004 0x00000009 0x0000000d 0x00000b5f
+                                0x00000000 0x00000003 0x00000003 0x00000006
+                                0x00000006 0x00000001 0x00000011 0x000000c8
+                                0x00000003 0x0000000e 0x00000007 0x0000000f
+                                0x00000002 0x00000000 0x00000000 0x00000002
+                                0x00000000 0x00000000 0x00000083 0xe044048b
+                                0x007d8010 0x00000000 0x00000000 0x00000000
+                                0x00000000 0x00000000 0x00000000 0x00000000>;
+                };
         };
 
-        serial@70006400 {
-                status = "disable";
+        usb@c5000000 {
+                status = "okay";
+                nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
+                dr_mode = "otg";
         };
 
-        sdhci@c8000000 {
-                status = "disable";
+        usb@c5004000 {
+                status = "okay";
+                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
         };
 
-        sdhci@c8000200 {
-                status = "disable";
+        usb@c5008000 {
+                status = "okay";
         };
 
         sdhci@c8000400 {
+                status = "okay";
                 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
                 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
                 power-gpios = <&gpio 70 0>; /* gpio PI6 */
@@ -351,15 +396,11 @@
         };
 
         sdhci@c8000600 {
+                status = "okay";
                 support-8bit;
                 bus-width = <8>;
         };
 
-        usb@c5000000 {
-                nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
-                dr_mode = "otg";
-        };
-
         gpio-keys {
                 compatible = "gpio-keys";
 
@@ -380,45 +421,25 @@
                 };
         };
 
-        emc@7000f400 {
-                emc-table@190000 {
-                        reg = < 190000 >;
-                        compatible = "nvidia,tegra20-emc-table";
-                        clock-frequency = < 190000 >;
-                        nvidia,emc-registers = < 0x0000000c 0x00000026
-                                0x00000009 0x00000003 0x00000004 0x00000004
-                                0x00000002 0x0000000c 0x00000003 0x00000003
-                                0x00000002 0x00000001 0x00000004 0x00000005
-                                0x00000004 0x00000009 0x0000000d 0x0000059f
-                                0x00000000 0x00000003 0x00000003 0x00000003
-                                0x00000003 0x00000001 0x0000000b 0x000000c8
-                                0x00000003 0x00000007 0x00000004 0x0000000f
-                                0x00000002 0x00000000 0x00000000 0x00000002
-                                0x00000000 0x00000000 0x00000083 0xa06204ae
-                                0x007dc010 0x00000000 0x00000000 0x00000000
-                                0x00000000 0x00000000 0x00000000 0x00000000 >;
-                };
+        sound {
+                compatible = "nvidia,tegra-audio-wm8903-seaboard",
+                             "nvidia,tegra-audio-wm8903";
+                nvidia,model = "NVIDIA Tegra Seaboard";
 
-                emc-table@380000 {
-                        reg = < 380000 >;
-                        compatible = "nvidia,tegra20-emc-table";
-                        clock-frequency = < 380000 >;
-                        nvidia,emc-registers = < 0x00000017 0x0000004b
-                                0x00000012 0x00000006 0x00000004 0x00000005
-                                0x00000003 0x0000000c 0x00000006 0x00000006
-                                0x00000003 0x00000001 0x00000004 0x00000005
-                                0x00000004 0x00000009 0x0000000d 0x00000b5f
-                                0x00000000 0x00000003 0x00000003 0x00000006
-                                0x00000006 0x00000001 0x00000011 0x000000c8
-                                0x00000003 0x0000000e 0x00000007 0x0000000f
-                                0x00000002 0x00000000 0x00000000 0x00000002
-                                0x00000000 0x00000000 0x00000083 0xe044048b
-                                0x007d8010 0x00000000 0x00000000 0x00000000
-                                0x00000000 0x00000000 0x00000000 0x00000000 >;
-                };
-        };
+                nvidia,audio-routing =
+                        "Headphone Jack", "HPOUTR",
+                        "Headphone Jack", "HPOUTL",
+                        "Int Spk", "ROP",
+                        "Int Spk", "RON",
+                        "Int Spk", "LOP",
+                        "Int Spk", "LON",
+                        "Mic Jack", "MICBIAS",
+                        "IN1R", "Mic Jack";
 
-        usb@c5004000 {
-                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&wm8903>;
+
+                nvidia,spkr-en-gpios = <&wm8903 2 0>;
+                nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
         };
 };
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index e4fcf9a8178a..9de5636023f6 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -6,11 +6,11 @@
         model = "Compulab TrimSlice board";
         compatible = "compulab,trimslice", "nvidia,tegra20";
 
-        memory@0 {
-                reg = < 0x00000000 0x40000000 >;
+        memory {
+                reg = <0x00000000 0x40000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -240,72 +240,67 @@
                 };
         };
 
+        i2s@70002800 {
+                status = "okay";
+        };
+
+        serial@70006000 {
+                status = "okay";
+                clock-frequency = <216000000>;
+        };
+
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000c400 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000c500 {
+                status = "okay";
                 clock-frequency = <400000>;
-        };
-
-        i2c@7000d000 {
-                status = "disable";
-        };
-
-        i2s@70002800 {
-                status = "disable";
-        };
-
-        i2s@70002a00 {
-                status = "disable";
-        };
 
-        das@70000c00 {
-                status = "disable";
-        };
-
-        serial@70006000 {
-                clock-frequency = < 216000000 >;
-        };
+                codec: codec@1a {
+                        compatible = "ti,tlv320aic23";
+                        reg = <0x1a>;
+                };
 
-        serial@70006040 {
-                status = "disable";
+                rtc@56 {
+                        compatible = "emmicro,em3027";
+                        reg = <0x56>;
+                };
         };
 
-        serial@70006200 {
-                status = "disable";
+        usb@c5000000 {
+                status = "okay";
         };
 
-        serial@70006300 {
-                status = "disable";
+        usb@c5004000 {
+                nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
         };
 
-        serial@70006400 {
-                status = "disable";
+        usb@c5008000 {
+                status = "okay";
         };
 
         sdhci@c8000000 {
-                status = "disable";
-        };
-
-        sdhci@c8000200 {
-                status = "disable";
-        };
-
-        sdhci@c8000400 {
-                status = "disable";
+                status = "okay";
+                bus-width = <4>;
         };
 
         sdhci@c8000600 {
-                cd-gpios = <&gpio 121 0>;
-                wp-gpios = <&gpio 122 0>;
+                status = "okay";
+                cd-gpios = <&gpio 121 0>; /* gpio PP1 */
+                wp-gpios = <&gpio 122 0>; /* gpio PP2 */
+                bus-width = <4>;
         };
 
-        usb@c5004000 {
-                nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+        sound {
+                compatible = "nvidia,tegra-audio-trimslice";
+                nvidia,i2s-controller = <&tegra_i2s1>;
+                nvidia,audio-codec = <&codec>;
         };
 };
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index b922a26747e7..445343b0fbdd 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -7,10 +7,10 @@
         compatible = "nvidia,ventana", "nvidia,tegra20";
 
         memory {
-                reg = < 0x00000000 0x40000000 >;
+                reg = <0x00000000 0x40000000>;
         };
 
-        pinmux@70000000 {
+        pinmux {
                 pinctrl-names = "default";
                 pinctrl-0 = <&state_default>;
 
@@ -240,38 +240,82 @@
                 };
         };
 
+        i2s@70002800 {
+                status = "okay";
+        };
+
+        serial@70006300 {
+                status = "okay";
+                clock-frequency = <216000000>;
+        };
+
         i2c@7000c000 {
+                status = "okay";
                 clock-frequency = <400000>;
 
                 wm8903: wm8903@1a {
                         compatible = "wlf,wm8903";
                         reg = <0x1a>;
                         interrupt-parent = <&gpio>;
-                        interrupts = < 187 0x04 >;
+                        interrupts = <187 0x04>;
 
                         gpio-controller;
                         #gpio-cells = <2>;
 
                         micdet-cfg = <0>;
                         micdet-delay = <100>;
-                        gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
+                        gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
+                };
+
+                /* ALS and proximity sensor */
+                isl29018@44 {
+                        compatible = "isil,isl29018";
+                        reg = <0x44>;
+                        interrupt-parent = <&gpio>;
+                        interrupts = <202 0x04>; /*gpio PZ2 */
                 };
         };
 
         i2c@7000c400 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000c500 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
         i2c@7000d000 {
+                status = "okay";
                 clock-frequency = <400000>;
         };
 
-        i2s@70002a00 {
-                status = "disable";
+        usb@c5000000 {
+                status = "okay";
+        };
+
+        usb@c5004000 {
+                status = "okay";
+                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+        };
+
+        usb@c5008000 {
+                status = "okay";
+        };
+
+        sdhci@c8000400 {
+                status = "okay";
+                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+                power-gpios = <&gpio 70 0>; /* gpio PI6 */
+                bus-width = <4>;
+        };
+
+        sdhci@c8000600 {
+                status = "okay";
+                support-8bit;
+                bus-width = <8>;
         };
 
         sound {
@@ -294,51 +338,7 @@
 
                 nvidia,spkr-en-gpios = <&wm8903 2 0>;
                 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
-                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
+                nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
                 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
         };
-
-        serial@70006000 {
-                status = "disable";
-        };
-
-        serial@70006040 {
-                status = "disable";
-        };
-
-        serial@70006200 {
-                status = "disable";
-        };
-
-        serial@70006300 {
-                clock-frequency = < 216000000 >;
-        };
-
-        serial@70006400 {
-                status = "disable";
-        };
-
-        sdhci@c8000000 {
-                status = "disable";
-        };
-
-        sdhci@c8000200 {
-                status = "disable";
-        };
-
-        sdhci@c8000400 {
-                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-                power-gpios = <&gpio 70 0>; /* gpio PI6 */
-                bus-width = <4>;
-        };
-
-        sdhci@c8000600 {
-                support-8bit;
-                bus-width = <8>;
-        };
-
-        usb@c5004000 {
-                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
-        };
 };
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 108e894a8926..c417d67e9027 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,207 +4,242 @@
         compatible = "nvidia,tegra20";
         interrupt-parent = <&intc>;
 
-        pmc@7000f400 {
-                compatible = "nvidia,tegra20-pmc";
-                reg = <0x7000e400 0x400>;
-        };
-
-        intc: interrupt-controller@50041000 {
+        intc: interrupt-controller {
                 compatible = "arm,cortex-a9-gic";
+                reg = <0x50041000 0x1000
+                       0x50040100 0x0100>;
                 interrupt-controller;
                 #interrupt-cells = <3>;
-                reg = < 0x50041000 0x1000 >,
-                      < 0x50040100 0x0100 >;
         };
 
-        pmu {
-                compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 56 0x04
-                              0 57 0x04>;
-        };
-
-        apbdma: dma@6000a000 {
+        apbdma: dma {
                 compatible = "nvidia,tegra20-apbdma";
                 reg = <0x6000a000 0x1200>;
-                interrupts = < 0 104 0x04
-                               0 105 0x04
-                               0 106 0x04
-                               0 107 0x04
-                               0 108 0x04
-                               0 109 0x04
-                               0 110 0x04
-                               0 111 0x04
-                               0 112 0x04
-                               0 113 0x04
-                               0 114 0x04
-                               0 115 0x04
-                               0 116 0x04
-                               0 117 0x04
-                               0 118 0x04
-                               0 119 0x04 >;
-        };
-
-        i2c@7000c000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra20-i2c";
-                reg = <0x7000C000 0x100>;
-                interrupts = < 0 38 0x04 >;
-        };
-
-        i2c@7000c400 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra20-i2c";
-                reg = <0x7000C400 0x100>;
-                interrupts = < 0 84 0x04 >;
+                interrupts = <0 104 0x04
+                              0 105 0x04
+                              0 106 0x04
+                              0 107 0x04
+                              0 108 0x04
+                              0 109 0x04
+                              0 110 0x04
+                              0 111 0x04
+                              0 112 0x04
+                              0 113 0x04
+                              0 114 0x04
+                              0 115 0x04
+                              0 116 0x04
+                              0 117 0x04
+                              0 118 0x04
+                              0 119 0x04>;
+        };
+
+        ahb {
+                compatible = "nvidia,tegra20-ahb";
+                reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
+        };
+
+        gpio: gpio {
+                compatible = "nvidia,tegra20-gpio";
+                reg = <0x6000d000 0x1000>;
+                interrupts = <0 32 0x04
+                              0 33 0x04
+                              0 34 0x04
+                              0 35 0x04
+                              0 55 0x04
+                              0 87 0x04
+                              0 89 0x04>;
+                #gpio-cells = <2>;
+                gpio-controller;
+                #interrupt-cells = <2>;
+                interrupt-controller;
         };
 
-        i2c@7000c500 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra20-i2c";
-                reg = <0x7000C500 0x100>;
-                interrupts = < 0 92 0x04 >;
+        pinmux: pinmux {
+                compatible = "nvidia,tegra20-pinmux";
+                reg = <0x70000014 0x10   /* Tri-state registers */
+                       0x70000080 0x20   /* Mux registers */
+                       0x700000a0 0x14   /* Pull-up/down registers */
+                       0x70000868 0xa8>; /* Pad control registers */
         };
 
-        i2c@7000d000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra20-i2c-dvc";
-                reg = <0x7000D000 0x200>;
-                interrupts = < 0 53 0x04 >;
+        das {
+                compatible = "nvidia,tegra20-das";
+                reg = <0x70000c00 0x80>;
         };
 
         tegra_i2s1: i2s@70002800 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002800 0x200>;
-                interrupts = < 0 13 0x04 >;
-                nvidia,dma-request-selector = < &apbdma 2 >;
+                interrupts = <0 13 0x04>;
+                nvidia,dma-request-selector = <&apbdma 2>;
+                status = "disable";
         };
 
         tegra_i2s2: i2s@70002a00 {
                 compatible = "nvidia,tegra20-i2s";
                 reg = <0x70002a00 0x200>;
-                interrupts = < 0 3 0x04 >;
-                nvidia,dma-request-selector = < &apbdma 1 >;
-        };
-
-        das@70000c00 {
-                compatible = "nvidia,tegra20-das";
-                reg = <0x70000c00 0x80>;
-        };
-
-        gpio: gpio@6000d000 {
-                compatible = "nvidia,tegra20-gpio";
-                reg = < 0x6000d000 0x1000 >;
-                interrupts = < 0 32 0x04
-                               0 33 0x04
-                               0 34 0x04
-                               0 35 0x04
-                               0 55 0x04
-                               0 87 0x04
-                               0 89 0x04 >;
-                #gpio-cells = <2>;
-                gpio-controller;
-                #interrupt-cells = <2>;
-                interrupt-controller;
-        };
-
-        pinmux: pinmux@70000000 {
-                compatible = "nvidia,tegra20-pinmux";
-                reg = < 0x70000014 0x10    /* Tri-state registers */
-                        0x70000080 0x20    /* Mux registers */
-                        0x700000a0 0x14    /* Pull-up/down registers */
-                        0x70000868 0xa8 >; /* Pad control registers */
+                interrupts = <0 3 0x04>;
+                nvidia,dma-request-selector = <&apbdma 1>;
+                status = "disable";
         };
 
         serial@70006000 {
                 compatible = "nvidia,tegra20-uart";
                 reg = <0x70006000 0x40>;
                 reg-shift = <2>;
-                interrupts = < 0 36 0x04 >;
+                interrupts = <0 36 0x04>;
+                status = "disable";
         };
 
         serial@70006040 {
                 compatible = "nvidia,tegra20-uart";
                 reg = <0x70006040 0x40>;
                 reg-shift = <2>;
-                interrupts = < 0 37 0x04 >;
+                interrupts = <0 37 0x04>;
+                status = "disable";
         };
 
         serial@70006200 {
                 compatible = "nvidia,tegra20-uart";
                 reg = <0x70006200 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 46 0x04 >;
+                interrupts = <0 46 0x04>;
+                status = "disable";
         };
 
         serial@70006300 {
                 compatible = "nvidia,tegra20-uart";
                 reg = <0x70006300 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 90 0x04 >;
+                interrupts = <0 90 0x04>;
+                status = "disable";
         };
 
         serial@70006400 {
                 compatible = "nvidia,tegra20-uart";
                 reg = <0x70006400 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 91 0x04 >;
+                interrupts = <0 91 0x04>;
+                status = "disable";
         };
 
-        emc@7000f400 {
+        i2c@7000c000 {
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000c000 0x100>;
+                interrupts = <0 38 0x04>;
                 #address-cells = <1>;
                 #size-cells = <0>;
-                compatible = "nvidia,tegra20-emc";
-                reg = <0x7000f400 0x200>;
+                status = "disable";
         };
 
-        sdhci@c8000000 {
-                compatible = "nvidia,tegra20-sdhci";
-                reg = <0xc8000000 0x200>;
-                interrupts = < 0 14 0x04 >;
+        i2c@7000c400 {
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000c400 0x100>;
+                interrupts = <0 84 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@c8000200 {
-                compatible = "nvidia,tegra20-sdhci";
-                reg = <0xc8000200 0x200>;
-                interrupts = < 0 15 0x04 >;
+        i2c@7000c500 {
+                compatible = "nvidia,tegra20-i2c";
+                reg = <0x7000c500 0x100>;
+                interrupts = <0 92 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@c8000400 {
-                compatible = "nvidia,tegra20-sdhci";
-                reg = <0xc8000400 0x200>;
-                interrupts = < 0 19 0x04 >;
+        i2c@7000d000 {
+                compatible = "nvidia,tegra20-i2c-dvc";
+                reg = <0x7000d000 0x200>;
+                interrupts = <0 53 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@c8000600 {
-                compatible = "nvidia,tegra20-sdhci";
-                reg = <0xc8000600 0x200>;
-                interrupts = < 0 31 0x04 >;
+        pmc {
+                compatible = "nvidia,tegra20-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
+        mc {
+                compatible = "nvidia,tegra20-mc";
+                reg = <0x7000f000 0x024
+                       0x7000f03c 0x3c4>;
+                interrupts = <0 77 0x04>;
+        };
+
+        gart {
+                compatible = "nvidia,tegra20-gart";
+                reg = <0x7000f024 0x00000018    /* controller registers */
+                       0x58000000 0x02000000>;  /* GART aperture */
+        };
+
+        emc {
+                compatible = "nvidia,tegra20-emc";
+                reg = <0x7000f400 0x200>;
+                #address-cells = <1>;
+                #size-cells = <0>;
         };
 
         usb@c5000000 {
                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
                 reg = <0xc5000000 0x4000>;
-                interrupts = < 0 20 0x04 >;
+                interrupts = <0 20 0x04>;
                 phy_type = "utmi";
                 nvidia,has-legacy-mode;
+                status = "disable";
         };
 
         usb@c5004000 {
                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
                 reg = <0xc5004000 0x4000>;
-                interrupts = < 0 21 0x04 >;
+                interrupts = <0 21 0x04>;
                 phy_type = "ulpi";
+                status = "disable";
         };
 
         usb@c5008000 {
                 compatible = "nvidia,tegra20-ehci", "usb-ehci";
                 reg = <0xc5008000 0x4000>;
-                interrupts = < 0 97 0x04 >;
+                interrupts = <0 97 0x04>;
                 phy_type = "utmi";
+                status = "disable";
+        };
+
+        sdhci@c8000000 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000000 0x200>;
+                interrupts = <0 14 0x04>;
+                status = "disable";
         };
-};
 
+        sdhci@c8000200 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000200 0x200>;
+                interrupts = <0 15 0x04>;
+                status = "disable";
+        };
+
+        sdhci@c8000400 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000400 0x200>;
+                interrupts = <0 19 0x04>;
+                status = "disable";
+        };
+
+        sdhci@c8000600 {
+                compatible = "nvidia,tegra20-sdhci";
+                reg = <0xc8000600 0x200>;
+                interrupts = <0 31 0x04>;
+                status = "disable";
+        };
+
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <0 56 0x04
+                              0 57 0x04>;
+        };
+};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 15200a949a81..2dcc09e784b5 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,190 +4,193 @@
         compatible = "nvidia,tegra30";
         interrupt-parent = <&intc>;
 
-        pmc@7000f400 {
-                compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
-                reg = <0x7000e400 0x400>;
-        };
-
-        intc: interrupt-controller@50041000 {
+        intc: interrupt-controller {
                 compatible = "arm,cortex-a9-gic";
+                reg = <0x50041000 0x1000
+                       0x50040100 0x0100>;
                 interrupt-controller;
                 #interrupt-cells = <3>;
-                reg = < 0x50041000 0x1000 >,
-                      < 0x50040100 0x0100 >;
         };
 
-        pmu {
-                compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 144 0x04
-                              0 145 0x04
-                              0 146 0x04
-                              0 147 0x04>;
-        };
-
-        apbdma: dma@6000a000 {
+        apbdma: dma {
                 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
                 reg = <0x6000a000 0x1400>;
-                interrupts = < 0 104 0x04
-                               0 105 0x04
-                               0 106 0x04
-                               0 107 0x04
-                               0 108 0x04
-                               0 109 0x04
-                               0 110 0x04
-                               0 111 0x04
-                               0 112 0x04
-                               0 113 0x04
-                               0 114 0x04
-                               0 115 0x04
-                               0 116 0x04
-                               0 117 0x04
-                               0 118 0x04
-                               0 119 0x04
-                               0 128 0x04
-                               0 129 0x04
-                               0 130 0x04
-                               0 131 0x04
-                               0 132 0x04
-                               0 133 0x04
-                               0 134 0x04
-                               0 135 0x04
-                               0 136 0x04
-                               0 137 0x04
-                               0 138 0x04
-                               0 139 0x04
-                               0 140 0x04
-                               0 141 0x04
-                               0 142 0x04
-                               0 143 0x04 >;
+                interrupts = <0 104 0x04
+                              0 105 0x04
+                              0 106 0x04
+                              0 107 0x04
+                              0 108 0x04
+                              0 109 0x04
+                              0 110 0x04
+                              0 111 0x04
+                              0 112 0x04
+                              0 113 0x04
+                              0 114 0x04
+                              0 115 0x04
+                              0 116 0x04
+                              0 117 0x04
+                              0 118 0x04
+                              0 119 0x04
+                              0 128 0x04
+                              0 129 0x04
+                              0 130 0x04
+                              0 131 0x04
+                              0 132 0x04
+                              0 133 0x04
+                              0 134 0x04
+                              0 135 0x04
+                              0 136 0x04
+                              0 137 0x04
+                              0 138 0x04
+                              0 139 0x04
+                              0 140 0x04
+                              0 141 0x04
+                              0 142 0x04
+                              0 143 0x04>;
         };
 
-        i2c@7000c000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-                reg = <0x7000C000 0x100>;
-                interrupts = < 0 38 0x04 >;
-        };
-
-        i2c@7000c400 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-                reg = <0x7000C400 0x100>;
-                interrupts = < 0 84 0x04 >;
+        ahb: ahb {
+                compatible = "nvidia,tegra30-ahb";
+                reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */
         };
 
-        i2c@7000c500 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-                reg = <0x7000C500 0x100>;
-                interrupts = < 0 92 0x04 >;
-        };
-
-        i2c@7000c700 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-                reg = <0x7000c700 0x100>;
-                interrupts = < 0 120 0x04 >;
-        };
-
-        i2c@7000d000 {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-                reg = <0x7000D000 0x100>;
-                interrupts = < 0 53 0x04 >;
-        };
-
-        gpio: gpio@6000d000 {
+        gpio: gpio {
                 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
-                reg = < 0x6000d000 0x1000 >;
-                interrupts = < 0 32 0x04
-                               0 33 0x04
-                               0 34 0x04
-                               0 35 0x04
-                               0 55 0x04
-                               0 87 0x04
-                               0 89 0x04
-                               0 125 0x04 >;
+                reg = <0x6000d000 0x1000>;
+                interrupts = <0 32 0x04
+                              0 33 0x04
+                              0 34 0x04
+                              0 35 0x04
+                              0 55 0x04
+                              0 87 0x04
+                              0 89 0x04
+                              0 125 0x04>;
                 #gpio-cells = <2>;
                 gpio-controller;
                 #interrupt-cells = <2>;
                 interrupt-controller;
         };
 
+        pinmux: pinmux {
+                compatible = "nvidia,tegra30-pinmux";
+                reg = <0x70000868 0xd0    /* Pad control registers */
+                       0x70003000 0x3e0>; /* Mux registers */
+        };
+
         serial@70006000 {
                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
                 reg = <0x70006000 0x40>;
                 reg-shift = <2>;
-                interrupts = < 0 36 0x04 >;
+                interrupts = <0 36 0x04>;
+                status = "disable";
         };
 
         serial@70006040 {
                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
                 reg = <0x70006040 0x40>;
                 reg-shift = <2>;
-                interrupts = < 0 37 0x04 >;
+                interrupts = <0 37 0x04>;
+                status = "disable";
         };
 
         serial@70006200 {
                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
                 reg = <0x70006200 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 46 0x04 >;
+                interrupts = <0 46 0x04>;
+                status = "disable";
         };
 
         serial@70006300 {
                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
                 reg = <0x70006300 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 90 0x04 >;
+                interrupts = <0 90 0x04>;
+                status = "disable";
         };
 
         serial@70006400 {
                 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
                 reg = <0x70006400 0x100>;
                 reg-shift = <2>;
-                interrupts = < 0 91 0x04 >;
+                interrupts = <0 91 0x04>;
+                status = "disable";
         };
 
-        sdhci@78000000 {
-                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-                reg = <0x78000000 0x200>;
-                interrupts = < 0 14 0x04 >;
+        i2c@7000c000 {
+                compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+                reg = <0x7000c000 0x100>;
+                interrupts = <0 38 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@78000200 {
-                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-                reg = <0x78000200 0x200>;
-                interrupts = < 0 15 0x04 >;
+        i2c@7000c400 {
+                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+                reg = <0x7000c400 0x100>;
+                interrupts = <0 84 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@78000400 {
-                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-                reg = <0x78000400 0x200>;
-                interrupts = < 0 19 0x04 >;
+        i2c@7000c500 {
+                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+                reg = <0x7000c500 0x100>;
+                interrupts = <0 92 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        sdhci@78000600 {
-                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-                reg = <0x78000600 0x200>;
-                interrupts = < 0 31 0x04 >;
+        i2c@7000c700 {
+                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+                reg = <0x7000c700 0x100>;
+                interrupts = <0 120 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
         };
 
-        pinmux: pinmux@70000000 {
-                compatible = "nvidia,tegra30-pinmux";
-                reg = < 0x70000868 0xd0     /* Pad control registers */
-                        0x70003000 0x3e0 >; /* Mux registers */
+        i2c@7000d000 {
+                compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+                reg = <0x7000d000 0x100>;
+                interrupts = <0 53 0x04>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disable";
+        };
+
+        pmc {
+                compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
+                reg = <0x7000e400 0x400>;
+        };
+
+        mc {
+                compatible = "nvidia,tegra30-mc";
+                reg = <0x7000f000 0x010
+                       0x7000f03c 0x1b4
+                       0x7000f200 0x028
+                       0x7000f284 0x17c>;
+                interrupts = <0 77 0x04>;
+        };
+
+        smmu {
+                compatible = "nvidia,tegra30-smmu";
+                reg = <0x7000f010 0x02c
+                       0x7000f1f0 0x010
+                       0x7000f228 0x05c>;
+                nvidia,#asids = <4>;            /* # of ASIDs */
+                dma-window = <0 0x40000000>;    /* IOVA start & length */
+                nvidia,ahb = <&ahb>;
         };
 
         ahub {
                 compatible = "nvidia,tegra30-ahub";
-                reg = <0x70080000 0x200 0x70080200 0x100>;
-                interrupts = < 0 103 0x04 >;
+                reg = <0x70080000 0x200
+                       0x70080200 0x100>;
+                interrupts = <0 103 0x04>;
                 nvidia,dma-request-selector = <&apbdma 1>;
 
                 ranges;
@@ -198,30 +201,71 @@
                         compatible = "nvidia,tegra30-i2s";
                         reg = <0x70080300 0x100>;
                         nvidia,ahub-cif-ids = <4 4>;
+                        status = "disable";
                 };
 
                 tegra_i2s1: i2s@70080400 {
                         compatible = "nvidia,tegra30-i2s";
                         reg = <0x70080400 0x100>;
                         nvidia,ahub-cif-ids = <5 5>;
+                        status = "disable";
                 };
 
                 tegra_i2s2: i2s@70080500 {
                         compatible = "nvidia,tegra30-i2s";
                         reg = <0x70080500 0x100>;
                         nvidia,ahub-cif-ids = <6 6>;
+                        status = "disable";
                 };
 
                 tegra_i2s3: i2s@70080600 {
                         compatible = "nvidia,tegra30-i2s";
                         reg = <0x70080600 0x100>;
                         nvidia,ahub-cif-ids = <7 7>;
+                        status = "disable";
                 };
 
                 tegra_i2s4: i2s@70080700 {
                         compatible = "nvidia,tegra30-i2s";
                         reg = <0x70080700 0x100>;
                         nvidia,ahub-cif-ids = <8 8>;
+                        status = "disable";
                 };
         };
+
+        sdhci@78000000 {
+                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+                reg = <0x78000000 0x200>;
+                interrupts = <0 14 0x04>;
+                status = "disable";
+        };
+
+        sdhci@78000200 {
+                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+                reg = <0x78000200 0x200>;
+                interrupts = <0 15 0x04>;
+                status = "disable";
+        };
+
+        sdhci@78000400 {
+                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+                reg = <0x78000400 0x200>;
+                interrupts = <0 19 0x04>;
+                status = "disable";
+        };
+
+        sdhci@78000600 {
+                compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+                reg = <0x78000600 0x200>;
+                interrupts = <0 31 0x04>;
+                status = "disable";
+        };
+
+        pmu {
+                compatible = "arm,cortex-a9-pmu";
+                interrupts = <0 144 0x04
+                              0 145 0x04
+                              0 146 0x04
+                              0 147 0x04>;
+        };
 };
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 1ebbf451c48d..5406c23a02e3 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -22,6 +22,7 @@ CONFIG_BLK_DEV_INTEGRITY=y
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXS=y
+CONFIG_MACH_MXS_DT=y
 CONFIG_MACH_MX23EVK=y
 CONFIG_MACH_MX28EVK=y
 CONFIG_MACH_STMP378X_DEVB=y
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index 3851d8a27875..05541cf4a878 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -42,4 +42,5 @@ dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb
 dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \
                                imx53-qsb.dtb imx53-smd.dtb
 dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
-                           imx6q-sabrelite.dtb
+                           imx6q-sabrelite.dtb \
+                           imx6q-sabresd.dtb \
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index b8a382defb23..fcd94f3b0f0e 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -31,6 +31,11 @@ static const char *per_lp_apm_sel[] = { "main_bus", "lp_apm", };
 static const char *per_root_sel[] = { "per_podf", "ipg", };
 static const char *esdhc_c_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
 static const char *esdhc_d_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };
+static const char *ssi_apm_sels[] = { "ckih1", "lp_amp", "ckih2", };
+static const char *ssi_clk_sels[] = { "pll1_sw", "pll2_sw", "pll3_sw", "ssi_apm", };
+static const char *ssi3_clk_sels[] = { "ssi1_root_gate", "ssi2_root_gate", };
+static const char *ssi_ext1_com_sels[] = { "ssi_ext1_podf", "ssi1_root_gate", };
+static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", };
 static const char *emi_slow_sel[] = { "main_bus", "ahb", };
 static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", };
 static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", };
@@ -71,6 +76,11 @@ enum imx5_clks {
         pll3_sw, ipu_di0_sel, ipu_di1_sel, tve_ext_sel, mx51_mipi, pll4_sw,
         ldb_di1_sel, di_pll4_podf, ldb_di0_sel, ldb_di0_gate, usb_phy1_gate,
         usb_phy2_gate, per_lp_apm, per_pred1, per_pred2, per_podf, per_root,
+        ssi_apm, ssi1_root_sel, ssi2_root_sel, ssi3_root_sel, ssi_ext1_sel,
+        ssi_ext2_sel, ssi_ext1_com_sel, ssi_ext2_com_sel, ssi1_root_pred,
+        ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred,
+        ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate,
+        ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,
         clk_max
 };
 
@@ -195,6 +205,28 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk[uart5_per_gate] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);
         clk[gpc_dvfs] = imx_clk_gate2("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24);
 
+        clk[ssi_apm] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels));
+        clk[ssi1_root_sel] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+        clk[ssi2_root_sel] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+        clk[ssi3_root_sel] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels));
+        clk[ssi_ext1_sel] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+        clk[ssi_ext2_sel] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));
+        clk[ssi_ext1_com_sel] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels));
+        clk[ssi_ext2_com_sel] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels));
+        clk[ssi1_root_pred] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3);
+        clk[ssi1_root_podf] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6);
+        clk[ssi2_root_pred] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3);
+        clk[ssi2_root_podf] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6);
+        clk[ssi_ext1_pred] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3);
+        clk[ssi_ext1_podf] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6);
+        clk[ssi_ext2_pred] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3);
+        clk[ssi_ext2_podf] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6);
+        clk[ssi1_root_gate] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18);
+        clk[ssi2_root_gate] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22);
+        clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);
+        clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);
+        clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);
+
         for (i = 0; i < ARRAY_SIZE(clk); i++)
                 if (IS_ERR(clk[i]))
                         pr_err("i.MX5 clk %d: register failed with %ld\n",
@@ -237,6 +269,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
         clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
+        clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL);
+        clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL);
         clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
         clk_register_clkdev(clk[cpu_podf], "cpu", NULL);
         clk_register_clkdev(clk[iim_gate], "iim", NULL);
@@ -320,6 +354,9 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");
         clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");
         clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");
+        clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
+        clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
+        clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
 
         /* set the usboh3 parent to pll2_sw */
         clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);
@@ -406,6 +443,9 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3");
         clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3");
         clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3");
+        clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
+        clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
+        clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
 
         /* set SDHC root clock to 200MHZ*/
         clk_set_rate(clk[esdhc_a_podf], 200000000);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index f40a35da2e5c..cab02d0a15d6 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -155,7 +155,8 @@ enum mx6q_clks {
         gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1,
         ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
         usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
-        pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, clk_max
+        pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
+        ssi2_ipg, ssi3_ipg, clk_max
 };
 
 static struct clk *clk[clk_max];
@@ -367,9 +368,9 @@ int __init mx6q_clocks_init(void)
         clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);
         clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
         clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
-        clk[ssi1]         = imx_clk_gate2("ssi1",          "ssi1_podf",         base + 0x7c, 18);
-        clk[ssi2]         = imx_clk_gate2("ssi2",          "ssi2_podf",         base + 0x7c, 20);
-        clk[ssi3]         = imx_clk_gate2("ssi3",          "ssi3_podf",         base + 0x7c, 22);
+        clk[ssi1_ipg]     = imx_clk_gate2("ssi1_ipg",      "ipg",               base + 0x7c, 18);
+        clk[ssi2_ipg]     = imx_clk_gate2("ssi2_ipg",      "ipg",               base + 0x7c, 20);
+        clk[ssi3_ipg]     = imx_clk_gate2("ssi3_ipg",      "ipg",               base + 0x7c, 22);
         clk[uart_ipg]     = imx_clk_gate2("uart_ipg",      "ipg",               base + 0x7c, 24);
         clk[uart_serial]  = imx_clk_gate2("uart_serial",   "uart_serial_podf",  base + 0x7c, 26);
         clk[usboh3]       = imx_clk_gate2("usboh3",        "ipg",               base + 0x80, 0);
@@ -392,17 +393,17 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
         clk_register_clkdev(clk[twd], NULL, "smp_twd");
         clk_register_clkdev(clk[usboh3], NULL, "usboh3");
-        clk_register_clkdev(clk[uart_serial], "per", "2020000.uart");
-        clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.uart");
-        clk_register_clkdev(clk[uart_serial], "per", "21e8000.uart");
-        clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.uart");
-        clk_register_clkdev(clk[uart_serial], "per", "21ec000.uart");
-        clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.uart");
-        clk_register_clkdev(clk[uart_serial], "per", "21f0000.uart");
-        clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.uart");
-        clk_register_clkdev(clk[uart_serial], "per", "21f4000.uart");
-        clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.uart");
-        clk_register_clkdev(clk[enet], NULL, "2188000.enet");
+        clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
+        clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
+        clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
+        clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial");
+        clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial");
+        clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial");
+        clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial");
+        clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial");
+        clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial");
+        clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial");
+        clk_register_clkdev(clk[enet], NULL, "2188000.ethernet");
         clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc");
         clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc");
         clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc");
@@ -418,6 +419,10 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[sdma], NULL, "20ec000.sdma");
         clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog");
         clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog");
+        clk_register_clkdev(clk[ssi1_ipg], NULL, "2028000.ssi");
+        clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
+        clk_register_clkdev(clk[ahb], "ahb", NULL);
+        clk_register_clkdev(clk[cko1], "cko1", NULL);
 
         for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) {
                 c = clk_get_sys(clks_init_on[i], NULL);
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 574eca4b89a5..eb04b6248e48 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -10,6 +10,9 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
@@ -81,6 +84,19 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
         { /* sentinel */ }
 };
 
+static void __init imx53_qsb_init(void)
+{
+        struct clk *clk;
+
+        clk = clk_get_sys(NULL, "ssi_ext1");
+        if (IS_ERR(clk)) {
+                pr_err("failed to get clk ssi_ext1\n");
+                return;
+        }
+
+        clk_register_clkdev(clk, NULL, "0-000a");
+}
+
 static void __init imx53_dt_init(void)
 {
         struct device_node *node;
@@ -99,6 +115,9 @@ static void __init imx53_dt_init(void)
                 of_node_put(node);
         }
 
+        if (of_machine_is_compatible("fsl,imx53-qsb"))
+                imx53_qsb_init();
+
         of_platform_populate(NULL, of_default_bus_match_table,
                              imx53_auxdata_lookup, NULL);
 }
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index 0213f8dcee81..c40a34c00489 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -17,6 +17,12 @@
 #include <mach/hardware.h>
 
 static struct map_desc imx_lluart_desc = {
+#ifdef CONFIG_DEBUG_IMX6Q_UART2
+        .virtual        = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),
+        .pfn            = __phys_to_pfn(MX6Q_UART2_BASE_ADDR),
+        .length         = MX6Q_UART2_SIZE,
+        .type           = MT_DEVICE,
+#endif
 #ifdef CONFIG_DEBUG_IMX6Q_UART4
         .virtual        = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),
         .pfn            = __phys_to_pfn(MX6Q_UART4_BASE_ADDR),
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 3df360a52c17..b47e98b7d539 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -10,6 +10,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/clk.h>
+#include <linux/clkdev.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -64,18 +66,53 @@ soft:
 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 {
-        /* min rx data delay */
-        phy_write(phydev, 0x0b, 0x8105);
-        phy_write(phydev, 0x0c, 0x0000);
+        if (IS_ENABLED(CONFIG_PHYLIB)) {
+                /* min rx data delay */
+                phy_write(phydev, 0x0b, 0x8105);
+                phy_write(phydev, 0x0c, 0x0000);
 
-        /* max rx/tx clock delay, min rx/tx control delay */
-        phy_write(phydev, 0x0b, 0x8104);
-        phy_write(phydev, 0x0c, 0xf0f0);
-        phy_write(phydev, 0x0b, 0x104);
+                /* max rx/tx clock delay, min rx/tx control delay */
+                phy_write(phydev, 0x0b, 0x8104);
+                phy_write(phydev, 0x0c, 0xf0f0);
+                phy_write(phydev, 0x0b, 0x104);
+        }
 
         return 0;
 }
 
+static void __init imx6q_sabrelite_cko1_setup(void)
+{
+        struct clk *cko1_sel, *ahb, *cko1;
+        unsigned long rate;
+
+        cko1_sel = clk_get_sys(NULL, "cko1_sel");
+        ahb = clk_get_sys(NULL, "ahb");
+        cko1 = clk_get_sys(NULL, "cko1");
+        if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
+                pr_err("cko1 setup failed!\n");
+                goto put_clk;
+        }
+        clk_set_parent(cko1_sel, ahb);
+        rate = clk_round_rate(cko1, 16000000);
+        clk_set_rate(cko1, rate);
+        clk_register_clkdev(cko1, NULL, "0-000a");
+put_clk:
+        if (!IS_ERR(cko1_sel))
+                clk_put(cko1_sel);
+        if (!IS_ERR(ahb))
+                clk_put(ahb);
+        if (!IS_ERR(cko1))
+                clk_put(cko1);
+}
+
+static void __init imx6q_sabrelite_init(void)
+{
+        if (IS_ENABLED(CONFIG_PHYLIB))
+                phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
+                                ksz9021rn_phy_fixup);
+        imx6q_sabrelite_cko1_setup();
+}
+
 static void __init imx6q_init_machine(void)
 {
         /*
@@ -85,8 +122,7 @@ static void __init imx6q_init_machine(void)
         pinctrl_provide_dummies();
 
         if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
-                phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
-                                           ksz9021rn_phy_fixup);
+                imx6q_sabrelite_init();
 
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 
@@ -139,6 +175,7 @@ static struct sys_timer imx6q_timer = {
 static const char *imx6q_dt_compat[] __initdata = {
         "fsl,imx6q-arm2",
         "fsl,imx6q-sabrelite",
+        "fsl,imx6q-sabresd",
         "fsl,imx6q",
         NULL,
 };
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index e4b822e9f719..517672ebcbc5 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -163,6 +163,12 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
         MX51_PAD_CSPI1_SS0__GPIO4_24,
         MX51_PAD_CSPI1_SS1__GPIO4_25,
+
+        /* Audio */
+        MX51_PAD_AUD3_BB_TXD__AUD3_TXD,
+        MX51_PAD_AUD3_BB_RXD__AUD3_RXD,
+        MX51_PAD_AUD3_BB_CK__AUD3_TXC,
+        MX51_PAD_AUD3_BB_FS__AUD3_TXFS,
 };
 
 /* Serial ports */
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 07d5383d68ee..91cf0625819c 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -7,18 +7,28 @@ config MXS_OCOTP
 
 config SOC_IMX23
         bool
+        select ARM_AMBA
         select CPU_ARM926T
         select HAVE_PWM
         select PINCTRL_IMX23
 
 config SOC_IMX28
         bool
+        select ARM_AMBA
         select CPU_ARM926T
         select HAVE_PWM
         select PINCTRL_IMX28
 
 comment "MXS platforms:"
 
+config MACH_MXS_DT
+        bool "Support MXS platforms from device tree"
+        select SOC_IMX23
+        select SOC_IMX28
+        help
+          Include support for Freescale MXS platforms(i.MX23 and i.MX28)
+          using the device tree for discovery
+
 config MACH_STMP378X_DEVB
         bool "Support STMP378x_devb Platform"
         select SOC_IMX23
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index 6ce21a26412e..e41590ccb437 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -4,6 +4,7 @@ obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o
 obj-$(CONFIG_MXS_OCOTP) += ocotp.o
 obj-$(CONFIG_PM) += pm.o
 
+obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o
 obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o
 obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o
 obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
index b8913df4cfa2..19659de1c4e8 100644
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ b/arch/arm/mach-mxs/devices/Kconfig
@@ -1,6 +1,5 @@
 config MXS_HAVE_AMBA_DUART
         bool
-        select ARM_AMBA
 
 config MXS_HAVE_PLATFORM_AUART
         bool
diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c
index 6a0202b1016c..46824501de00 100644
--- a/arch/arm/mach-mxs/devices/platform-dma.c
+++ b/arch/arm/mach-mxs/devices/platform-dma.c
@@ -14,7 +14,7 @@
 #include <mach/mx28.h>
 #include <mach/devices-common.h>
 
-static struct platform_device *__init mxs_add_dma(const char *devid,
+struct platform_device *__init mxs_add_dma(const char *devid,
                                                 resource_size_t base)
 {
         struct resource res[] = {
@@ -29,22 +29,3 @@ static struct platform_device *__init mxs_add_dma(const char *devid,
                                 res, ARRAY_SIZE(res), NULL, 0,
                                 DMA_BIT_MASK(32));
 }
-
-static int __init mxs_add_mxs_dma(void)
-{
-        char *apbh = "mxs-dma-apbh";
-        char *apbx = "mxs-dma-apbx";
-
-        if (cpu_is_mx23()) {
-                mxs_add_dma(apbh, MX23_APBH_DMA_BASE_ADDR);
-                mxs_add_dma(apbx, MX23_APBX_DMA_BASE_ADDR);
-        }
-
-        if (cpu_is_mx28()) {
-                mxs_add_dma(apbh, MX28_APBH_DMA_BASE_ADDR);
-                mxs_add_dma(apbx, MX28_APBX_DMA_BASE_ADDR);
-        }
-
-        return 0;
-}
-arch_initcall(mxs_add_mxs_dma);
diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
index ed0885e414e0..cd99f19ec637 100644
--- a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
+++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
@@ -14,7 +14,7 @@
 #include <mach/devices-common.h>
 
 struct platform_device *__init mxs_add_gpio(
-        int id, resource_size_t iobase, int irq)
+        char *name, int id, resource_size_t iobase, int irq)
 {
         struct resource res[] = {
                 {
@@ -29,25 +29,5 @@ struct platform_device *__init mxs_add_gpio(
         };
 
         return platform_device_register_resndata(&mxs_apbh_bus,
-                        "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0);
+                        name, id, res, ARRAY_SIZE(res), NULL, 0);
 }
-
-static int __init mxs_add_mxs_gpio(void)
-{
-        if (cpu_is_mx23()) {
-                mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);
-                mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);
-                mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);
-        }
-
-        if (cpu_is_mx28()) {
-                mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);
-                mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);
-                mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);
-                mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);
-                mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);
-        }
-
-        return 0;
-}
-postcore_initcall(mxs_add_mxs_gpio);
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
index bef9d923f54e..b33c9d05c552 100644
--- a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
+++ b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
@@ -17,8 +17,9 @@
 #include <mach/mx28.h>
 #include <mach/devices-common.h>
 
-#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid)                   \
+#define mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid)           \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = _id,                                              \
                 .iobase = soc ## _SSP ## hwid ## _BASE_ADDR,            \
                 .dma = soc ## _DMA_SSP ## hwid,                         \
@@ -26,23 +27,23 @@
                 .irq_dma = soc ## _INT_SSP ## hwid ## _DMA,             \
         }
 
-#define mxs_mxs_mmc_data_entry(soc, _id, hwid)                          \
-        [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid)
+#define mxs_mxs_mmc_data_entry(soc, _devid, _id, hwid)                  \
+        [_id] = mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid)
 
 
 #ifdef CONFIG_SOC_IMX23
 const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {
-        mxs_mxs_mmc_data_entry(MX23, 0, 1),
-        mxs_mxs_mmc_data_entry(MX23, 1, 2),
+        mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 0, 1),
+        mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 1, 2),
 };
 #endif
 
 #ifdef CONFIG_SOC_IMX28
 const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {
-        mxs_mxs_mmc_data_entry(MX28, 0, 0),
-        mxs_mxs_mmc_data_entry(MX28, 1, 1),
-        mxs_mxs_mmc_data_entry(MX28, 2, 2),
-        mxs_mxs_mmc_data_entry(MX28, 3, 3),
+        mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 0, 0),
+        mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 1, 1),
+        mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 2, 2),
+        mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 3, 3),
 };
 #endif
 
@@ -70,6 +71,6 @@ struct platform_device *__init mxs_add_mxs_mmc(
                 },
         };
 
-        return mxs_add_platform_device("mxs-mmc", data->id,
+        return mxs_add_platform_device(data->devid, data->id,
                         res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 84af61cf6a62..de6c7ba42544 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -18,17 +18,20 @@ extern void mxs_restart(char, const char *);
 extern int mxs_saif_clkmux_select(unsigned int clkmux);
 
 extern void mx23_soc_init(void);
-extern int mx23_register_gpios(void);
 extern int mx23_clocks_init(void);
 extern void mx23_map_io(void);
 extern void mx23_init_irq(void);
 
 extern void mx28_soc_init(void);
-extern int mx28_register_gpios(void);
 extern int mx28_clocks_init(void);
 extern void mx28_map_io(void);
 extern void mx28_init_irq(void);
 
 extern void icoll_init_irq(void);
 
+extern struct platform_device *mxs_add_dma(const char *devid,
+                                                resource_size_t base);
+extern struct platform_device *mxs_add_gpio(char *name, int id,
+                                            resource_size_t iobase, int irq);
+
 #endif /* __MACH_MXS_COMMON_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index 21e45a70d344..e8b1d958240b 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -82,8 +82,9 @@ struct platform_device * __init mxs_add_mxs_i2c(
                 const struct mxs_mxs_i2c_data *data);
 
 /* mmc */
-#include <mach/mmc.h>
+#include <linux/mmc/mxs-mmc.h>
 struct mxs_mxs_mmc_data {
+        const char *devid;
         int id;
         resource_size_t iobase;
         resource_size_t dma;
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
new file mode 100644
index 000000000000..8cac94b33020
--- /dev/null
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/init.h>
+#include <linux/irqdomain.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <mach/common.h>
+
+static int __init mxs_icoll_add_irq_domain(struct device_node *np,
+                                struct device_node *interrupt_parent)
+{
+        irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
+
+        return 0;
+}
+
+static int __init mxs_gpio_add_irq_domain(struct device_node *np,
+                                struct device_node *interrupt_parent)
+{
+        static int gpio_irq_base = MXS_GPIO_IRQ_START;
+
+        irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
+        gpio_irq_base += 32;
+
+        return 0;
+}
+
+static const struct of_device_id mxs_irq_match[] __initconst = {
+        { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
+        { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
+        { /* sentinel */ }
+};
+
+static void __init mxs_dt_init_irq(void)
+{
+        icoll_init_irq();
+        of_irq_init(mxs_irq_match);
+}
+
+static void __init imx23_timer_init(void)
+{
+        mx23_clocks_init();
+}
+
+static struct sys_timer imx23_timer = {
+        .init = imx23_timer_init,
+};
+
+static void __init imx28_timer_init(void)
+{
+        mx28_clocks_init();
+}
+
+static struct sys_timer imx28_timer = {
+        .init = imx28_timer_init,
+};
+
+static void __init imx28_evk_init(void)
+{
+        struct clk *clk;
+
+        /* Enable fec phy clock */
+        clk = clk_get_sys("enet_out", NULL);
+        if (!IS_ERR(clk))
+                clk_prepare_enable(clk);
+}
+
+static void __init mxs_machine_init(void)
+{
+        if (of_machine_is_compatible("fsl,imx28-evk"))
+                imx28_evk_init();
+
+        of_platform_populate(NULL, of_default_bus_match_table,
+                                NULL, NULL);
+}
+
+static const char *imx23_dt_compat[] __initdata = {
+        "fsl,imx23-evk",
+        "fsl,imx23",
+        NULL,
+};
+
+static const char *imx28_dt_compat[] __initdata = {
+        "fsl,imx28-evk",
+        "fsl,imx28",
+        NULL,
+};
+
+DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
+        .map_io         = mx23_map_io,
+        .init_irq       = mxs_dt_init_irq,
+        .timer          = &imx23_timer,
+        .init_machine   = mxs_machine_init,
+        .dt_compat      = imx23_dt_compat,
+        .restart        = mxs_restart,
+MACHINE_END
+
+DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
+        .map_io         = mx28_map_io,
+        .init_irq       = mxs_dt_init_irq,
+        .timer          = &imx28_timer,
+        .init_machine   = mxs_machine_init,
+        .dt_compat      = imx28_dt_compat,
+        .restart        = mxs_restart,
+MACHINE_END
diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c
index 67a384edcf5b..dccb67a9e7c4 100644
--- a/arch/arm/mach-mxs/mm.c
+++ b/arch/arm/mach-mxs/mm.c
@@ -66,9 +66,25 @@ void __init mx28_init_irq(void)
 void __init mx23_soc_init(void)
 {
         pinctrl_provide_dummies();
+
+        mxs_add_dma("imx23-dma-apbh", MX23_APBH_DMA_BASE_ADDR);
+        mxs_add_dma("imx23-dma-apbx", MX23_APBX_DMA_BASE_ADDR);
+
+        mxs_add_gpio("imx23-gpio", 0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);
+        mxs_add_gpio("imx23-gpio", 1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);
+        mxs_add_gpio("imx23-gpio", 2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);
 }
 
 void __init mx28_soc_init(void)
 {
         pinctrl_provide_dummies();
+
+        mxs_add_dma("imx28-dma-apbh", MX23_APBH_DMA_BASE_ADDR);
+        mxs_add_dma("imx28-dma-apbx", MX23_APBX_DMA_BASE_ADDR);
+
+        mxs_add_gpio("imx28-gpio", 0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);
+        mxs_add_gpio("imx28-gpio", 1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);
+        mxs_add_gpio("imx28-gpio", 2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);
+        mxs_add_gpio("imx28-gpio", 3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);
+        mxs_add_gpio("imx28-gpio", 4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);
 }
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 8ddda365f1a0..761e45f9456f 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -24,6 +24,8 @@
 #define UART_PADDR      MX51_UART1_BASE_ADDR
 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
 #define UART_PADDR      MX53_UART1_BASE_ADDR
+#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
+#define UART_PADDR      MX6Q_UART2_BASE_ADDR
 #elif defined (CONFIG_DEBUG_IMX6Q_UART4)
 #define UART_PADDR      MX6Q_UART4_BASE_ADDR
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h
index 254a561a2799..f7e7dbac8f4b 100644
--- a/arch/arm/plat-mxc/include/mach/mx6q.h
+++ b/arch/arm/plat-mxc/include/mach/mx6q.h
@@ -27,6 +27,8 @@
 #define MX6Q_CCM_SIZE                   0x4000
 #define MX6Q_ANATOP_BASE_ADDR           0x020c8000
 #define MX6Q_ANATOP_SIZE                0x1000
+#define MX6Q_UART2_BASE_ADDR            0x021e8000
+#define MX6Q_UART2_SIZE                 0x4000
 #define MX6Q_UART4_BASE_ADDR            0x021f0000
 #define MX6Q_UART4_SIZE                 0x4000
 
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index dcae11285716..f7be225f544c 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -81,19 +81,20 @@ static struct clk_lookup uart_lookups[] __initdata = {
 };
 
 static struct clk_lookup hbus_lookups[] __initdata = {
-        { .dev_id = "mxs-dma-apbh", },
+        { .dev_id = "imx23-dma-apbh", },
         { .dev_id = "80004000.dma-apbh", },
 };
 
 static struct clk_lookup xbus_lookups[] __initdata = {
         { .dev_id = "duart", .con_id = "apb_pclk"},
-        { .dev_id = "mxs-dma-apbx", },
+        { .dev_id = "80070000.serial", .con_id = "apb_pclk"},
+        { .dev_id = "imx23-dma-apbx", },
         { .dev_id = "80024000.dma-apbx", },
 };
 
 static struct clk_lookup ssp_lookups[] __initdata = {
-        { .dev_id = "mxs-mmc.0", },
-        { .dev_id = "mxs-mmc.1", },
+        { .dev_id = "imx23-mmc.0", },
+        { .dev_id = "imx23-mmc.1", },
         { .dev_id = "80010000.ssp", },
         { .dev_id = "80034000.ssp", },
 };
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index b2a3257d4f66..2826a2606a29 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -136,33 +136,34 @@ static struct clk_lookup uart_lookups[] __initdata = {
 };
 
 static struct clk_lookup hbus_lookups[] __initdata = {
-        { .dev_id = "mxs-dma-apbh", },
+        { .dev_id = "imx28-dma-apbh", },
         { .dev_id = "80004000.dma-apbh", },
 };
 
 static struct clk_lookup xbus_lookups[] __initdata = {
         { .dev_id = "duart", .con_id = "apb_pclk"},
-        { .dev_id = "mxs-dma-apbx", },
+        { .dev_id = "80074000.serial", .con_id = "apb_pclk"},
+        { .dev_id = "imx28-dma-apbx", },
         { .dev_id = "80024000.dma-apbx", },
 };
 
 static struct clk_lookup ssp0_lookups[] __initdata = {
-        { .dev_id = "mxs-mmc.0", },
+        { .dev_id = "imx28-mmc.0", },
         { .dev_id = "80010000.ssp", },
 };
 
 static struct clk_lookup ssp1_lookups[] __initdata = {
-        { .dev_id = "mxs-mmc.1", },
+        { .dev_id = "imx28-mmc.1", },
         { .dev_id = "80012000.ssp", },
 };
 
 static struct clk_lookup ssp2_lookups[] __initdata = {
-        { .dev_id = "mxs-mmc.2", },
+        { .dev_id = "imx28-mmc.2", },
         { .dev_id = "80014000.ssp", },
 };
 
 static struct clk_lookup ssp3_lookups[] __initdata = {
-        { .dev_id = "mxs-mmc.3", },
+        { .dev_id = "imx28-mmc.3", },
         { .dev_id = "80016000.ssp", },
 };
 
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ef378b5b17e4..aadeb5be9dba 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -238,6 +238,7 @@ config IMX_DMA
 config MXS_DMA
         bool "MXS DMA support"
         depends on SOC_IMX23 || SOC_IMX28
+        select STMP_DEVICE
         select DMA_ENGINE
         help
           Support the MXS DMA engine. This engine including APBH-DMA
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index 3db3a48d3f01..c96ab15319f2 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -22,11 +22,14 @@
 #include <linux/platform_device.h>
 #include <linux/dmaengine.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 #include <linux/fsl/mxs-dma.h>
+#include <linux/stmp_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
 
 #include <asm/irq.h>
 #include <mach/mxs.h>
-#include <mach/common.h>
 
 #include "dmaengine.h"
 
@@ -36,12 +39,8 @@
  * dma can program the controller registers of peripheral devices.
  */
 
-#define MXS_DMA_APBH            0
-#define MXS_DMA_APBX            1
-#define dma_is_apbh()           (mxs_dma->dev_id == MXS_DMA_APBH)
-
-#define APBH_VERSION_LATEST     3
-#define apbh_is_old()           (mxs_dma->version < APBH_VERSION_LATEST)
+#define dma_is_apbh(mxs_dma)    ((mxs_dma)->type == MXS_DMA_APBH)
+#define apbh_is_old(mxs_dma)    ((mxs_dma)->dev_id == IMX23_DMA)
 
 #define HW_APBHX_CTRL0                          0x000
 #define BM_APBH_CTRL0_APB_BURST8_EN             (1 << 29)
@@ -51,13 +50,14 @@
 #define HW_APBHX_CTRL2                          0x020
 #define HW_APBHX_CHANNEL_CTRL                   0x030
 #define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL     16
-#define HW_APBH_VERSION                         (cpu_is_mx23() ? 0x3f0 : 0x800)
-#define HW_APBX_VERSION                         0x800
-#define BP_APBHX_VERSION_MAJOR                  24
-#define HW_APBHX_CHn_NXTCMDAR(n) \
-        (((dma_is_apbh() && apbh_is_old()) ? 0x050 : 0x110) + (n) * 0x70)
-#define HW_APBHX_CHn_SEMA(n) \
-        (((dma_is_apbh() && apbh_is_old()) ? 0x080 : 0x140) + (n) * 0x70)
+/*
+ * The offset of NXTCMDAR register is different per both dma type and version,
+ * while stride for each channel is all the same 0x70.
+ */
+#define HW_APBHX_CHn_NXTCMDAR(d, n) \
+        (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70)
+#define HW_APBHX_CHn_SEMA(d, n) \
+        (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70)
 
 /*
  * ccw bits definitions
@@ -121,9 +121,19 @@ struct mxs_dma_chan {
 #define MXS_DMA_CHANNELS                16
 #define MXS_DMA_CHANNELS_MASK           0xffff
 
+enum mxs_dma_devtype {
+        MXS_DMA_APBH,
+        MXS_DMA_APBX,
+};
+
+enum mxs_dma_id {
+        IMX23_DMA,
+        IMX28_DMA,
+};
+
 struct mxs_dma_engine {
-        int                             dev_id;
-        unsigned int                    version;
+        enum mxs_dma_id                 dev_id;
+        enum mxs_dma_devtype            type;
         void __iomem                    *base;
         struct clk                      *clk;
         struct dma_device               dma_device;
@@ -131,17 +141,86 @@ struct mxs_dma_engine {
         struct mxs_dma_chan             mxs_chans[MXS_DMA_CHANNELS];
 };
 
+struct mxs_dma_type {
+        enum mxs_dma_id id;
+        enum mxs_dma_devtype type;
+};
+
+static struct mxs_dma_type mxs_dma_types[] = {
+        {
+                .id = IMX23_DMA,
+                .type = MXS_DMA_APBH,
+        }, {
+                .id = IMX23_DMA,
+                .type = MXS_DMA_APBX,
+        }, {
+                .id = IMX28_DMA,
+                .type = MXS_DMA_APBH,
+        }, {
+                .id = IMX28_DMA,
+                .type = MXS_DMA_APBX,
+        }
+};
+
+static struct platform_device_id mxs_dma_ids[] = {
+        {
+                .name = "imx23-dma-apbh",
+                .driver_data = (kernel_ulong_t) &mxs_dma_types[0],
+        }, {
+                .name = "imx23-dma-apbx",
+                .driver_data = (kernel_ulong_t) &mxs_dma_types[1],
+        }, {
+                .name = "imx28-dma-apbh",
+                .driver_data = (kernel_ulong_t) &mxs_dma_types[2],
+        }, {
+                .name = "imx28-dma-apbx",
+                .driver_data = (kernel_ulong_t) &mxs_dma_types[3],
+        }, {
+                /* end of list */
+        }
+};
+
+static const struct of_device_id mxs_dma_dt_ids[] = {
+        { .compatible = "fsl,imx23-dma-apbh", .data = &mxs_dma_ids[0], },
+        { .compatible = "fsl,imx23-dma-apbx", .data = &mxs_dma_ids[1], },
+        { .compatible = "fsl,imx28-dma-apbh", .data = &mxs_dma_ids[2], },
+        { .compatible = "fsl,imx28-dma-apbx", .data = &mxs_dma_ids[3], },
+        { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);
+
+static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)
+{
+        return container_of(chan, struct mxs_dma_chan, chan);
+}
+
+int mxs_dma_is_apbh(struct dma_chan *chan)
+{
+        struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
+        struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
+
+        return dma_is_apbh(mxs_dma);
+}
+
+int mxs_dma_is_apbx(struct dma_chan *chan)
+{
+        struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
+        struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
+
+        return !dma_is_apbh(mxs_dma);
+}
+
 static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan)
 {
         struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
         int chan_id = mxs_chan->chan.chan_id;
 
-        if (dma_is_apbh() && apbh_is_old())
+        if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
                 writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL),
-                        mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
         else
                 writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL),
-                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);
 }
 
 static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
@@ -151,10 +230,10 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
 
         /* set cmd_addr up */
         writel(mxs_chan->ccw_phys,
-                mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(chan_id));
+                mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id));
 
         /* write 1 to SEMA to kick off the channel */
-        writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(chan_id));
+        writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
 }
 
 static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan)
@@ -168,12 +247,12 @@ static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan)
         int chan_id = mxs_chan->chan.chan_id;
 
         /* freeze the channel */
-        if (dma_is_apbh() && apbh_is_old())
+        if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
                 writel(1 << chan_id,
-                        mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
         else
                 writel(1 << chan_id,
-                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);
 
         mxs_chan->status = DMA_PAUSED;
 }
@@ -184,21 +263,16 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan)
         int chan_id = mxs_chan->chan.chan_id;
 
         /* unfreeze the channel */
-        if (dma_is_apbh() && apbh_is_old())
+        if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
                 writel(1 << chan_id,
-                        mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR);
+                        mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR);
         else
                 writel(1 << chan_id,
-                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR);
+                        mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_CLR);
 
         mxs_chan->status = DMA_IN_PROGRESS;
 }
 
-static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)
-{
-        return container_of(chan, struct mxs_dma_chan, chan);
-}
-
 static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx)
 {
         return dma_cookie_assign(tx);
@@ -220,11 +294,11 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
         /* completion status */
         stat1 = readl(mxs_dma->base + HW_APBHX_CTRL1);
         stat1 &= MXS_DMA_CHANNELS_MASK;
-        writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + MXS_CLR_ADDR);
+        writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR);
 
         /* error status */
         stat2 = readl(mxs_dma->base + HW_APBHX_CTRL2);
-        writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + MXS_CLR_ADDR);
+        writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR);
 
         /*
          * When both completion and error of termination bits set at the
@@ -567,27 +641,21 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
         if (ret)
                 return ret;
 
-        ret = mxs_reset_block(mxs_dma->base);
+        ret = stmp_reset_block(mxs_dma->base);
         if (ret)
                 goto err_out;
 
-        /* only major version matters */
-        mxs_dma->version = readl(mxs_dma->base +
-                                ((mxs_dma->dev_id == MXS_DMA_APBX) ?
-                                HW_APBX_VERSION : HW_APBH_VERSION)) >>
-                                BP_APBHX_VERSION_MAJOR;
-
         /* enable apbh burst */
-        if (dma_is_apbh()) {
+        if (dma_is_apbh(mxs_dma)) {
                 writel(BM_APBH_CTRL0_APB_BURST_EN,
-                        mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
                 writel(BM_APBH_CTRL0_APB_BURST8_EN,
-                        mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR);
+                        mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
         }
 
         /* enable irq for all the channels */
         writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
-                mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR);
+                mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);
 
 err_out:
         clk_disable_unprepare(mxs_dma->clk);
@@ -596,8 +664,9 @@ err_out:
 
 static int __init mxs_dma_probe(struct platform_device *pdev)
 {
-        const struct platform_device_id *id_entry =
-                                platform_get_device_id(pdev);
+        const struct platform_device_id *id_entry;
+        const struct of_device_id *of_id;
+        const struct mxs_dma_type *dma_type;
         struct mxs_dma_engine *mxs_dma;
         struct resource *iores;
         int ret, i;
@@ -606,7 +675,15 @@ static int __init mxs_dma_probe(struct platform_device *pdev)
         if (!mxs_dma)
                 return -ENOMEM;
 
-        mxs_dma->dev_id = id_entry->driver_data;
+        of_id = of_match_device(mxs_dma_dt_ids, &pdev->dev);
+        if (of_id)
+                id_entry = of_id->data;
+        else
+                id_entry = platform_get_device_id(pdev);
+
+        dma_type = (struct mxs_dma_type *)id_entry->driver_data;
+        mxs_dma->type = dma_type->type;
+        mxs_dma->dev_id = dma_type->id;
 
         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
@@ -689,23 +766,12 @@ err_request_region:
         return ret;
 }
 
-static struct platform_device_id mxs_dma_type[] = {
-        {
-                .name = "mxs-dma-apbh",
-                .driver_data = MXS_DMA_APBH,
-        }, {
-                .name = "mxs-dma-apbx",
-                .driver_data = MXS_DMA_APBX,
-        }, {
-                /* end of list */
-        }
-};
-
 static struct platform_driver mxs_dma_driver = {
         .driver         = {
                 .name   = "mxs-dma",
+                .of_match_table = mxs_dma_dt_ids,
         },
-        .id_table       = mxs_dma_type,
+        .id_table       = mxs_dma_ids,
 };
 
 static int __init mxs_dma_module_init(void)
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index b4136501abd8..39e495669961 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -25,23 +25,25 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/basic_mmio_gpio.h>
 #include <linux/module.h>
-#include <mach/mxs.h>
 
 #define MXS_SET         0x4
 #define MXS_CLR         0x8
 
-#define PINCTRL_DOUT(n)         ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
-#define PINCTRL_DIN(n)          ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
-#define PINCTRL_DOE(n)          ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
-#define PINCTRL_PIN2IRQ(n)      ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
-#define PINCTRL_IRQEN(n)        ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
-#define PINCTRL_IRQLEV(n)       ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
-#define PINCTRL_IRQPOL(n)       ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
-#define PINCTRL_IRQSTAT(n)      ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
+#define PINCTRL_DOUT(p)         ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10)
+#define PINCTRL_DIN(p)          ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10)
+#define PINCTRL_DOE(p)          ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10)
+#define PINCTRL_PIN2IRQ(p)      ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10)
+#define PINCTRL_IRQEN(p)        ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10)
+#define PINCTRL_IRQLEV(p)       ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10)
+#define PINCTRL_IRQPOL(p)       ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10)
+#define PINCTRL_IRQSTAT(p)      ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10)
 
 #define GPIO_INT_FALL_EDGE      0x0
 #define GPIO_INT_LOW_LEV        0x1
@@ -52,14 +54,30 @@
 
 #define irq_to_gpio(irq)        ((irq) - MXS_GPIO_IRQ_START)
 
+enum mxs_gpio_id {
+        IMX23_GPIO,
+        IMX28_GPIO,
+};
+
 struct mxs_gpio_port {
         void __iomem *base;
         int id;
         int irq;
         int virtual_irq_start;
         struct bgpio_chip bgc;
+        enum mxs_gpio_id devid;
 };
 
+static inline int is_imx23_gpio(struct mxs_gpio_port *port)
+{
+        return port->devid == IMX23_GPIO;
+}
+
+static inline int is_imx28_gpio(struct mxs_gpio_port *port)
+{
+        return port->devid == IMX28_GPIO;
+}
+
 /* Note: This driver assumes 32 GPIOs are handled in one register */
 
 static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
@@ -89,21 +107,21 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
         }
 
         /* set level or edge */
-        pin_addr = port->base + PINCTRL_IRQLEV(port->id);
+        pin_addr = port->base + PINCTRL_IRQLEV(port);
         if (edge & GPIO_INT_LEV_MASK)
                 writel(pin_mask, pin_addr + MXS_SET);
         else
                 writel(pin_mask, pin_addr + MXS_CLR);
 
         /* set polarity */
-        pin_addr = port->base + PINCTRL_IRQPOL(port->id);
+        pin_addr = port->base + PINCTRL_IRQPOL(port);
         if (edge & GPIO_INT_POL_MASK)
                 writel(pin_mask, pin_addr + MXS_SET);
         else
                 writel(pin_mask, pin_addr + MXS_CLR);
 
         writel(1 << (gpio & 0x1f),
-               port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
+               port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
 
         return 0;
 }
@@ -117,8 +135,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 
         desc->irq_data.chip->irq_ack(&desc->irq_data);
 
-        irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) &
-                        readl(port->base + PINCTRL_IRQEN(port->id));
+        irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) &
+                        readl(port->base + PINCTRL_IRQEN(port));
 
         while (irq_stat != 0) {
                 int irqoffset = fls(irq_stat) - 1;
@@ -164,8 +182,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port)
         ct->chip.irq_unmask = irq_gc_mask_set_bit;
         ct->chip.irq_set_type = mxs_gpio_set_irq_type;
         ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
-        ct->regs.ack = PINCTRL_IRQSTAT(port->id) + MXS_CLR;
-        ct->regs.mask = PINCTRL_IRQEN(port->id);
+        ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
+        ct->regs.mask = PINCTRL_IRQEN(port);
 
         irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
 }
@@ -179,60 +197,83 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
         return port->virtual_irq_start + offset;
 }
 
+static struct platform_device_id mxs_gpio_ids[] = {
+        {
+                .name = "imx23-gpio",
+                .driver_data = IMX23_GPIO,
+        }, {
+                .name = "imx28-gpio",
+                .driver_data = IMX28_GPIO,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, mxs_gpio_ids);
+
+static const struct of_device_id mxs_gpio_dt_ids[] = {
+        { .compatible = "fsl,imx23-gpio", .data = (void *) IMX23_GPIO, },
+        { .compatible = "fsl,imx28-gpio", .data = (void *) IMX28_GPIO, },
+        { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids);
+
 static int __devinit mxs_gpio_probe(struct platform_device *pdev)
 {
+        const struct of_device_id *of_id =
+                        of_match_device(mxs_gpio_dt_ids, &pdev->dev);
+        struct device_node *np = pdev->dev.of_node;
+        struct device_node *parent;
         static void __iomem *base;
         struct mxs_gpio_port *port;
         struct resource *iores = NULL;
         int err;
 
-        port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL);
+        port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
         if (!port)
                 return -ENOMEM;
 
-        port->id = pdev->id;
+        if (np) {
+                port->id = of_alias_get_id(np, "gpio");
+                if (port->id < 0)
+                        return port->id;
+                port->devid = (enum mxs_gpio_id) of_id->data;
+        } else {
+                port->id = pdev->id;
+                port->devid = pdev->id_entry->driver_data;
+        }
         port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32;
 
+        port->irq = platform_get_irq(pdev, 0);
+        if (port->irq < 0)
+                return port->irq;
+
         /*
          * map memory region only once, as all the gpio ports
          * share the same one
          */
         if (!base) {
-                iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-                if (!iores) {
-                        err = -ENODEV;
-                        goto out_kfree;
-                }
-
-                if (!request_mem_region(iores->start, resource_size(iores),
-                                        pdev->name)) {
-                        err = -EBUSY;
-                        goto out_kfree;
-                }
-
-                base = ioremap(iores->start, resource_size(iores));
-                if (!base) {
-                        err = -ENOMEM;
-                        goto out_release_mem;
+                if (np) {
+                        parent = of_get_parent(np);
+                        base = of_iomap(parent, 0);
+                        of_node_put(parent);
+                } else {
+                        iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+                        base = devm_request_and_ioremap(&pdev->dev, iores);
                 }
+                if (!base)
+                        return -EADDRNOTAVAIL;
         }
         port->base = base;
 
-        port->irq = platform_get_irq(pdev, 0);
-        if (port->irq < 0) {
-                err = -EINVAL;
-                goto out_iounmap;
-        }
-
         /*
          * select the pin interrupt functionality but initially
          * disable the interrupts
          */
-        writel(~0U, port->base + PINCTRL_PIN2IRQ(port->id));
-        writel(0, port->base + PINCTRL_IRQEN(port->id));
+        writel(~0U, port->base + PINCTRL_PIN2IRQ(port));
+        writel(0, port->base + PINCTRL_IRQEN(port));
 
         /* clear address has to be used to clear IRQSTAT bits */
-        writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
+        writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
 
         /* gpio-mxs can be a generic irq chip */
         mxs_gpio_init_gc(port);
@@ -242,41 +283,32 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
         irq_set_handler_data(port->irq, port);
 
         err = bgpio_init(&port->bgc, &pdev->dev, 4,
-                         port->base + PINCTRL_DIN(port->id),
-                         port->base + PINCTRL_DOUT(port->id), NULL,
-                         port->base + PINCTRL_DOE(port->id), NULL, 0);
+                         port->base + PINCTRL_DIN(port),
+                         port->base + PINCTRL_DOUT(port), NULL,
+                         port->base + PINCTRL_DOE(port), NULL, 0);
         if (err)
-                goto out_iounmap;
+                return err;
 
         port->bgc.gc.to_irq = mxs_gpio_to_irq;
         port->bgc.gc.base = port->id * 32;
 
         err = gpiochip_add(&port->bgc.gc);
-        if (err)
-                goto out_bgpio_remove;
+        if (err) {
+                bgpio_remove(&port->bgc);
+                return err;
+        }
 
         return 0;
-
-out_bgpio_remove:
-        bgpio_remove(&port->bgc);
-out_iounmap:
-        if (iores)
-                iounmap(port->base);
-out_release_mem:
-        if (iores)
-                release_mem_region(iores->start, resource_size(iores));
-out_kfree:
-        kfree(port);
-        dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
-        return err;
 }
 
 static struct platform_driver mxs_gpio_driver = {
         .driver         = {
                 .name   = "gpio-mxs",
                 .owner  = THIS_MODULE,
+                .of_match_table = mxs_gpio_dt_ids,
         },
         .probe          = mxs_gpio_probe,
+        .id_table       = mxs_gpio_ids,
 };
 
 static int __init mxs_gpio_init(void)
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 58a338846f06..04eb441b6ce1 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -28,6 +28,9 @@
 #include <linux/io.h>
 #include <linux/pinctrl/consumer.h>
 #include <linux/stmp_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_i2c.h>
 
 #define DRIVER_NAME "mxs-i2c"
 
@@ -366,6 +369,7 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
         adap->algo = &mxs_i2c_algo;
         adap->dev.parent = dev;
         adap->nr = pdev->id;
+        adap->dev.of_node = pdev->dev.of_node;
         i2c_set_adapdata(adap, i2c);
         err = i2c_add_numbered_adapter(adap);
         if (err) {
@@ -375,6 +379,8 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
                 return err;
         }
 
+        of_i2c_register_devices(adap);
+
         return 0;
 }
 
@@ -394,10 +400,17 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev)
         return 0;
 }
 
+static const struct of_device_id mxs_i2c_dt_ids[] = {
+        { .compatible = "fsl,imx28-i2c", },
+        { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids);
+
 static struct platform_driver mxs_i2c_driver = {
         .driver = {
                    .name = DRIVER_NAME,
                    .owner = THIS_MODULE,
+                   .of_match_table = mxs_i2c_dt_ids,
                    },
         .remove = __devexit_p(mxs_i2c_remove),
 };
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index bb03ddda481d..34a90266ab11 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -23,6 +23,9 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
@@ -40,18 +43,15 @@
 #include <linux/module.h>
 #include <linux/fsl/mxs-dma.h>
 #include <linux/pinctrl/consumer.h>
-
-#include <mach/mxs.h>
-#include <mach/common.h>
-#include <mach/mmc.h>
+#include <linux/stmp_device.h>
+#include <linux/mmc/mxs-mmc.h>
 
 #define DRIVER_NAME     "mxs-mmc"
 
 /* card detect polling timeout */
 #define MXS_MMC_DETECT_TIMEOUT                  (HZ/2)
 
-#define SSP_VERSION_LATEST      4
-#define ssp_is_old()            (host->version < SSP_VERSION_LATEST)
+#define ssp_is_old(host)        ((host)->devid == IMX23_MMC)
 
 /* SSP registers */
 #define HW_SSP_CTRL0                            0x000
@@ -86,14 +86,14 @@
 #define  BM_SSP_BLOCK_SIZE_BLOCK_COUNT          (0xffffff << 4)
 #define  BP_SSP_BLOCK_SIZE_BLOCK_SIZE           (0)
 #define  BM_SSP_BLOCK_SIZE_BLOCK_SIZE           (0xf)
-#define HW_SSP_TIMING                           (ssp_is_old() ? 0x050 : 0x070)
+#define HW_SSP_TIMING(h)                        (ssp_is_old(h) ? 0x050 : 0x070)
 #define  BP_SSP_TIMING_TIMEOUT                  (16)
 #define  BM_SSP_TIMING_TIMEOUT                  (0xffff << 16)
 #define  BP_SSP_TIMING_CLOCK_DIVIDE             (8)
 #define  BM_SSP_TIMING_CLOCK_DIVIDE             (0xff << 8)
 #define  BP_SSP_TIMING_CLOCK_RATE               (0)
 #define  BM_SSP_TIMING_CLOCK_RATE               (0xff)
-#define HW_SSP_CTRL1                            (ssp_is_old() ? 0x060 : 0x080)
+#define HW_SSP_CTRL1(h)                         (ssp_is_old(h) ? 0x060 : 0x080)
 #define  BM_SSP_CTRL1_SDIO_IRQ                  (1 << 31)
 #define  BM_SSP_CTRL1_SDIO_IRQ_EN               (1 << 30)
 #define  BM_SSP_CTRL1_RESP_ERR_IRQ              (1 << 29)
@@ -116,15 +116,13 @@
 #define  BM_SSP_CTRL1_WORD_LENGTH               (0xf << 4)
 #define  BP_SSP_CTRL1_SSP_MODE                  (0)
 #define  BM_SSP_CTRL1_SSP_MODE                  (0xf)
-#define HW_SSP_SDRESP0                          (ssp_is_old() ? 0x080 : 0x0a0)
-#define HW_SSP_SDRESP1                          (ssp_is_old() ? 0x090 : 0x0b0)
-#define HW_SSP_SDRESP2                          (ssp_is_old() ? 0x0a0 : 0x0c0)
-#define HW_SSP_SDRESP3                          (ssp_is_old() ? 0x0b0 : 0x0d0)
-#define HW_SSP_STATUS                           (ssp_is_old() ? 0x0c0 : 0x100)
+#define HW_SSP_SDRESP0(h)                       (ssp_is_old(h) ? 0x080 : 0x0a0)
+#define HW_SSP_SDRESP1(h)                       (ssp_is_old(h) ? 0x090 : 0x0b0)
+#define HW_SSP_SDRESP2(h)                       (ssp_is_old(h) ? 0x0a0 : 0x0c0)
+#define HW_SSP_SDRESP3(h)                       (ssp_is_old(h) ? 0x0b0 : 0x0d0)
+#define HW_SSP_STATUS(h)                        (ssp_is_old(h) ? 0x0c0 : 0x100)
 #define  BM_SSP_STATUS_CARD_DETECT              (1 << 28)
 #define  BM_SSP_STATUS_SDIO_IRQ                 (1 << 17)
-#define HW_SSP_VERSION                          (cpu_is_mx23() ? 0x110 : 0x130)
-#define  BP_SSP_VERSION_MAJOR                   (24)
 
 #define BF_SSP(value, field)    (((value) << BP_SSP_##field) & BM_SSP_##field)
 
@@ -139,6 +137,11 @@
 
 #define SSP_PIO_NUM     3
 
+enum mxs_mmc_id {
+        IMX23_MMC,
+        IMX28_MMC,
+};
+
 struct mxs_mmc_host {
         struct mmc_host                 *mmc;
         struct mmc_request              *mrq;
@@ -146,9 +149,7 @@ struct mxs_mmc_host {
         struct mmc_data                 *data;
 
         void __iomem                    *base;
-        int                             irq;
-        struct resource                 *res;
-        struct resource                 *dma_res;
+        int                             dma_channel;
         struct clk                      *clk;
         unsigned int                    clk_rate;
 
@@ -158,32 +159,28 @@ struct mxs_mmc_host {
         enum dma_transfer_direction     slave_dirn;
         u32                             ssp_pio_words[SSP_PIO_NUM];
 
-        unsigned int                    version;
+        enum mxs_mmc_id                 devid;
         unsigned char                   bus_width;
         spinlock_t                      lock;
         int                             sdio_irq_en;
+        int                             wp_gpio;
 };
 
 static int mxs_mmc_get_ro(struct mmc_host *mmc)
 {
         struct mxs_mmc_host *host = mmc_priv(mmc);
-        struct mxs_mmc_platform_data *pdata =
-                mmc_dev(host->mmc)->platform_data;
-
-        if (!pdata)
-                return -EFAULT;
 
-        if (!gpio_is_valid(pdata->wp_gpio))
+        if (!gpio_is_valid(host->wp_gpio))
                 return -EINVAL;
 
-        return gpio_get_value(pdata->wp_gpio);
+        return gpio_get_value(host->wp_gpio);
 }
 
 static int mxs_mmc_get_cd(struct mmc_host *mmc)
 {
         struct mxs_mmc_host *host = mmc_priv(mmc);
 
-        return !(readl(host->base + HW_SSP_STATUS) &
+        return !(readl(host->base + HW_SSP_STATUS(host)) &
                  BM_SSP_STATUS_CARD_DETECT);
 }
 
@@ -191,7 +188,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
 {
         u32 ctrl0, ctrl1;
 
-        mxs_reset_block(host->base);
+        stmp_reset_block(host->base);
 
         ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
         ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
@@ -207,7 +204,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
         writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
                BF_SSP(2, TIMING_CLOCK_DIVIDE) |
                BF_SSP(0, TIMING_CLOCK_RATE),
-               host->base + HW_SSP_TIMING);
+               host->base + HW_SSP_TIMING(host));
 
         if (host->sdio_irq_en) {
                 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
@@ -215,7 +212,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
         }
 
         writel(ctrl0, host->base + HW_SSP_CTRL0);
-        writel(ctrl1, host->base + HW_SSP_CTRL1);
+        writel(ctrl1, host->base + HW_SSP_CTRL1(host));
 }
 
 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
@@ -229,12 +226,12 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host)
 
         if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
                 if (mmc_resp_type(cmd) & MMC_RSP_136) {
-                        cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0);
-                        cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1);
-                        cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2);
-                        cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3);
+                        cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0(host));
+                        cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1(host));
+                        cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2(host));
+                        cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3(host));
                 } else {
-                        cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0);
+                        cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0(host));
                 }
         }
 
@@ -277,9 +274,9 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
 
         spin_lock(&host->lock);
 
-        stat = readl(host->base + HW_SSP_CTRL1);
+        stat = readl(host->base + HW_SSP_CTRL1(host));
         writel(stat & MXS_MMC_IRQ_BITS,
-               host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
+               host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
 
         if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
                 mmc_signal_sdio_irq(host->mmc);
@@ -485,7 +482,7 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
                 blocks = 1;
 
         /* xfer count, block size and count need to be set differently */
-        if (ssp_is_old()) {
+        if (ssp_is_old(host)) {
                 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
                 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
                         BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
@@ -509,10 +506,10 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
 
         /* set the timeout count */
         timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns);
-        val = readl(host->base + HW_SSP_TIMING);
+        val = readl(host->base + HW_SSP_TIMING(host));
         val &= ~(BM_SSP_TIMING_TIMEOUT);
         val |= BF_SSP(timeout, TIMING_TIMEOUT);
-        writel(val, host->base + HW_SSP_TIMING);
+        writel(val, host->base + HW_SSP_TIMING(host));
 
         /* pio */
         host->ssp_pio_words[0] = ctrl0;
@@ -598,11 +595,11 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
 
         ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);
 
-        val = readl(host->base + HW_SSP_TIMING);
+        val = readl(host->base + HW_SSP_TIMING(host));
         val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
         val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);
         val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);
-        writel(val, host->base + HW_SSP_TIMING);
+        writel(val, host->base + HW_SSP_TIMING(host));
 
         host->clk_rate = ssp_sck;
 
@@ -637,18 +634,19 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 
         if (enable) {
                 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
-                       host->base + HW_SSP_CTRL0 + MXS_SET_ADDR);
+                       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
                 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
-                       host->base + HW_SSP_CTRL1 + MXS_SET_ADDR);
+                       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET);
 
-                if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ)
+                if (readl(host->base + HW_SSP_STATUS(host)) &
+                                BM_SSP_STATUS_SDIO_IRQ)
                         mmc_signal_sdio_irq(host->mmc);
 
         } else {
                 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
-                       host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR);
+                       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
                 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
-                       host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR);
+                       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
         }
 
         spin_unlock_irqrestore(&host->lock, flags);
@@ -669,7 +667,7 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
         if (!mxs_dma_is_apbh(chan))
                 return false;
 
-        if (chan->chan_id != host->dma_res->start)
+        if (chan->chan_id != host->dma_channel)
                 return false;
 
         chan->private = &host->dma_data;
@@ -677,11 +675,34 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
         return true;
 }
 
+static struct platform_device_id mxs_mmc_ids[] = {
+        {
+                .name = "imx23-mmc",
+                .driver_data = IMX23_MMC,
+        }, {
+                .name = "imx28-mmc",
+                .driver_data = IMX28_MMC,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, mxs_mmc_ids);
+
+static const struct of_device_id mxs_mmc_dt_ids[] = {
+        { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_MMC, },
+        { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_MMC, },
+        { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
+
 static int mxs_mmc_probe(struct platform_device *pdev)
 {
+        const struct of_device_id *of_id =
+                        of_match_device(mxs_mmc_dt_ids, &pdev->dev);
+        struct device_node *np = pdev->dev.of_node;
         struct mxs_mmc_host *host;
         struct mmc_host *mmc;
-        struct resource *iores, *dmares, *r;
+        struct resource *iores, *dmares;
         struct mxs_mmc_platform_data *pdata;
         struct pinctrl *pinctrl;
         int ret = 0, irq_err, irq_dma;
@@ -691,46 +712,51 @@ static int mxs_mmc_probe(struct platform_device *pdev)
         dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
         irq_err = platform_get_irq(pdev, 0);
         irq_dma = platform_get_irq(pdev, 1);
-        if (!iores || !dmares || irq_err < 0 || irq_dma < 0)
+        if (!iores || irq_err < 0 || irq_dma < 0)
                 return -EINVAL;
 
-        r = request_mem_region(iores->start, resource_size(iores), pdev->name);
-        if (!r)
-                return -EBUSY;
-
         mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
-        if (!mmc) {
-                ret = -ENOMEM;
-                goto out_release_mem;
-        }
+        if (!mmc)
+                return -ENOMEM;
 
         host = mmc_priv(mmc);
-        host->base = ioremap(r->start, resource_size(r));
+        host->base = devm_request_and_ioremap(&pdev->dev, iores);
         if (!host->base) {
-                ret = -ENOMEM;
+                ret = -EADDRNOTAVAIL;
                 goto out_mmc_free;
         }
 
-        /* only major verion does matter */
-        host->version = readl(host->base + HW_SSP_VERSION) >>
-                        BP_SSP_VERSION_MAJOR;
+        if (np) {
+                host->devid = (enum mxs_mmc_id) of_id->data;
+                /*
+                 * TODO: This is a temporary solution and should be changed
+                 * to use generic DMA binding later when the helpers get in.
+                 */
+                ret = of_property_read_u32(np, "fsl,ssp-dma-channel",
+                                           &host->dma_channel);
+                if (ret) {
+                        dev_err(mmc_dev(host->mmc),
+                                "failed to get dma channel\n");
+                        goto out_mmc_free;
+                }
+        } else {
+                host->devid = pdev->id_entry->driver_data;
+                host->dma_channel = dmares->start;
+        }
 
         host->mmc = mmc;
-        host->res = r;
-        host->dma_res = dmares;
-        host->irq = irq_err;
         host->sdio_irq_en = 0;
 
         pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
         if (IS_ERR(pinctrl)) {
                 ret = PTR_ERR(pinctrl);
-                goto out_iounmap;
+                goto out_mmc_free;
         }
 
         host->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(host->clk)) {
                 ret = PTR_ERR(host->clk);
-                goto out_iounmap;
+                goto out_mmc_free;
         }
         clk_prepare_enable(host->clk);
 
@@ -752,11 +778,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)
                     MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
 
         pdata = mmc_dev(host->mmc)->platform_data;
-        if (pdata) {
+        if (!pdata) {
+                u32 bus_width = 0;
+                of_property_read_u32(np, "bus-width", &bus_width);
+                if (bus_width == 4)
+                        mmc->caps |= MMC_CAP_4_BIT_DATA;
+                else if (bus_width == 8)
+                        mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
+                host->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
+        } else {
                 if (pdata->flags & SLOTF_8_BIT_CAPABLE)
                         mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
                 if (pdata->flags & SLOTF_4_BIT_CAPABLE)
                         mmc->caps |= MMC_CAP_4_BIT_DATA;
+                host->wp_gpio = pdata->wp_gpio;
         }
 
         mmc->f_min = 400000;
@@ -765,13 +800,14 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 
         mmc->max_segs = 52;
         mmc->max_blk_size = 1 << 0xf;
-        mmc->max_blk_count = (ssp_is_old()) ? 0xff : 0xffffff;
-        mmc->max_req_size = (ssp_is_old()) ? 0xffff : 0xffffffff;
+        mmc->max_blk_count = (ssp_is_old(host)) ? 0xff : 0xffffff;
+        mmc->max_req_size = (ssp_is_old(host)) ? 0xffff : 0xffffffff;
         mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev);
 
         platform_set_drvdata(pdev, mmc);
 
-        ret = request_irq(host->irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host);
+        ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
+                               DRIVER_NAME, host);
         if (ret)
                 goto out_free_dma;
 
@@ -779,26 +815,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)
 
         ret = mmc_add_host(mmc);
         if (ret)
-                goto out_free_irq;
+                goto out_free_dma;
 
         dev_info(mmc_dev(host->mmc), "initialized\n");
 
         return 0;
 
-out_free_irq:
-        free_irq(host->irq, host);
 out_free_dma:
         if (host->dmach)
                 dma_release_channel(host->dmach);
 out_clk_put:
         clk_disable_unprepare(host->clk);
         clk_put(host->clk);
-out_iounmap:
-        iounmap(host->base);
 out_mmc_free:
         mmc_free_host(mmc);
-out_release_mem:
-        release_mem_region(iores->start, resource_size(iores));
         return ret;
 }
 
@@ -806,12 +836,9 @@ static int mxs_mmc_remove(struct platform_device *pdev)
 {
         struct mmc_host *mmc = platform_get_drvdata(pdev);
         struct mxs_mmc_host *host = mmc_priv(mmc);
-        struct resource *res = host->res;
 
         mmc_remove_host(mmc);
 
-        free_irq(host->irq, host);
-
         platform_set_drvdata(pdev, NULL);
 
         if (host->dmach)
@@ -820,12 +847,8 @@ static int mxs_mmc_remove(struct platform_device *pdev)
         clk_disable_unprepare(host->clk);
         clk_put(host->clk);
 
-        iounmap(host->base);
-
         mmc_free_host(mmc);
 
-        release_mem_region(res->start, resource_size(res));
-
         return 0;
 }
 
@@ -865,11 +888,13 @@ static const struct dev_pm_ops mxs_mmc_pm_ops = {
 static struct platform_driver mxs_mmc_driver = {
         .probe          = mxs_mmc_probe,
         .remove         = mxs_mmc_remove,
+        .id_table       = mxs_mmc_ids,
         .driver         = {
                 .name   = DRIVER_NAME,
                 .owner  = THIS_MODULE,
 #ifdef CONFIG_PM
                 .pm     = &mxs_mmc_pm_ops,
+                .of_match_table = mxs_mmc_dt_ids,
 #endif
         },
 };
diff --git a/include/linux/fsl/mxs-dma.h b/include/linux/fsl/mxs-dma.h
index 203d7c4a3e11..55d870238399 100644
--- a/include/linux/fsl/mxs-dma.h
+++ b/include/linux/fsl/mxs-dma.h
@@ -15,14 +15,6 @@ struct mxs_dma_data {
         int chan_irq;
 };
 
-static inline int mxs_dma_is_apbh(struct dma_chan *chan)
-{
-        return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbh");
-}
-
-static inline int mxs_dma_is_apbx(struct dma_chan *chan)
-{
-        return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbx");
-}
-
+extern int mxs_dma_is_apbh(struct dma_chan *chan);
+extern int mxs_dma_is_apbx(struct dma_chan *chan);
 #endif /* __MACH_MXS_DMA_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/mmc.h b/include/linux/mmc/mxs-mmc.h
index 211547a05564..7c2ad3a7f2f3 100644
--- a/arch/arm/mach-mxs/include/mach/mmc.h
+++ b/include/linux/mmc/mxs-mmc.h
@@ -6,8 +6,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __MACH_MXS_MMC_H__
-#define __MACH_MXS_MMC_H__
+#ifndef __LINUX_MMC_MXS_MMC_H__
+#define __LINUX_MMC_MXS_MMC_H__
 
 struct mxs_mmc_platform_data {
         int wp_gpio;    /* write protect pin */
@@ -15,4 +15,5 @@ struct mxs_mmc_platform_data {
 #define SLOTF_4_BIT_CAPABLE     (1 << 0)
 #define SLOTF_8_BIT_CAPABLE     (1 << 1)
 };
-#endif /* __MACH_MXS_MMC_H__ */
+
+#endif /* __LINUX_MMC_MXS_MMC_H__ */