diff options
| -rw-r--r-- | drivers/ata/pata_hpt366.c | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index d7f2da127d13..5bfae075968e 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c | |||
| @@ -27,7 +27,7 @@ | |||
| 27 | #include <linux/libata.h> | 27 | #include <linux/libata.h> |
| 28 | 28 | ||
| 29 | #define DRV_NAME "pata_hpt366" | 29 | #define DRV_NAME "pata_hpt366" |
| 30 | #define DRV_VERSION "0.6.2" | 30 | #define DRV_VERSION "0.6.7" |
| 31 | 31 | ||
| 32 | struct hpt_clock { | 32 | struct hpt_clock { |
| 33 | u8 xfer_mode; | 33 | u8 xfer_mode; |
| @@ -36,24 +36,22 @@ struct hpt_clock { | |||
| 36 | 36 | ||
| 37 | /* key for bus clock timings | 37 | /* key for bus clock timings |
| 38 | * bit | 38 | * bit |
| 39 | * 0:3 data_high_time. inactive time of DIOW_/DIOR_ for PIO and MW | 39 | * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA. |
| 40 | * DMA. cycles = value + 1 | 40 | * cycles = value + 1 |
| 41 | * 4:8 data_low_time. active time of DIOW_/DIOR_ for PIO and MW | 41 | * 4:7 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA. |
| 42 | * DMA. cycles = value + 1 | 42 | * cycles = value + 1 |
| 43 | * 9:12 cmd_high_time. inactive time of DIOW_/DIOR_ during task file | 43 | * 8:11 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file |
| 44 | * register access. | 44 | * register access. |
| 45 | * 13:17 cmd_low_time. active time of DIOW_/DIOR_ during task file | 45 | * 12:15 cmd_low_time. Active time of DIOW_/DIOR_ during task file |
| 46 | * register access. | 46 | * register access. |
| 47 | * 18:21 udma_cycle_time. clock freq and clock cycles for UDMA xfer. | 47 | * 16:18 udma_cycle_time. Clock cycles for UDMA xfer? |
| 48 | * during task file register access. | 48 | * 19:21 pre_high_time. Time to initialize 1st cycle for PIO and MW DMA xfer. |
| 49 | * 22:24 pre_high_time. time to initialize 1st cycle for PIO and MW DMA | 49 | * 22:24 cmd_pre_high_time. Time to initialize 1st PIO cycle for task file |
| 50 | * xfer. | ||
| 51 | * 25:27 cmd_pre_high_time. time to initialize 1st PIO cycle for task | ||
| 52 | * register access. | 50 | * register access. |
| 53 | * 28 UDMA enable | 51 | * 28 UDMA enable. |
| 54 | * 29 DMA enable | 52 | * 29 DMA enable. |
| 55 | * 30 PIO_MST enable. if set, the chip is in bus master mode during | 53 | * 30 PIO_MST enable. If set, the chip is in bus master mode during |
| 56 | * PIO. | 54 | * PIO xfer. |
| 57 | * 31 FIFO enable. | 55 | * 31 FIFO enable. |
| 58 | */ | 56 | */ |
| 59 | 57 | ||