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-rw-r--r--arch/arm/mach-at91/Makefile1
-rw-r--r--arch/arm/mach-at91/at91rm9200.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c2
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c2
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c2
-rw-r--r--arch/arm/mach-at91/pm.c27
-rw-r--r--arch/arm/mach-at91/pm.h59
-rw-r--r--arch/arm/mach-at91/setup.c14
-rw-r--r--drivers/cpuidle/Kconfig.arm7
-rw-r--r--drivers/cpuidle/Makefile1
-rw-r--r--drivers/cpuidle/cpuidle-at91.c (renamed from arch/arm/mach-at91/cpuidle.c)29
13 files changed, 93 insertions, 57 deletions
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 3b0a9538093c..c1b737097c95 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -98,7 +98,6 @@ obj-y += leds.o
98# Power Management 98# Power Management
99obj-$(CONFIG_PM) += pm.o 99obj-$(CONFIG_PM) += pm.o
100obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o 100obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
101obj-$(CONFIG_CPU_IDLE) += cpuidle.o
102 101
103ifeq ($(CONFIG_PM_DEBUG),y) 102ifeq ($(CONFIG_PM_DEBUG),y)
104CFLAGS_pm.o += -DDEBUG 103CFLAGS_pm.o += -DDEBUG
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 4aad93d54d6f..25805f2f6010 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -27,6 +27,7 @@
27#include "generic.h" 27#include "generic.h"
28#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
30#include "pm.h"
30 31
31/* -------------------------------------------------------------------- 32/* --------------------------------------------------------------------
32 * Clocks 33 * Clocks
@@ -327,6 +328,7 @@ static void __init at91rm9200_ioremap_registers(void)
327{ 328{
328 at91rm9200_ioremap_st(AT91RM9200_BASE_ST); 329 at91rm9200_ioremap_st(AT91RM9200_BASE_ST);
329 at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256); 330 at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
331 at91_pm_set_standby(at91rm9200_standby);
330} 332}
331 333
332static void __init at91rm9200_initialize(void) 334static void __init at91rm9200_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 5de6074b4f4f..f8629a3fa245 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -28,6 +28,7 @@
28#include "generic.h" 28#include "generic.h"
29#include "clock.h" 29#include "clock.h"
30#include "sam9_smc.h" 30#include "sam9_smc.h"
31#include "pm.h"
31 32
32/* -------------------------------------------------------------------- 33/* --------------------------------------------------------------------
33 * Clocks 34 * Clocks
@@ -342,6 +343,7 @@ static void __init at91sam9260_ioremap_registers(void)
342 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); 343 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
343 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); 344 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
344 at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX); 345 at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
346 at91_pm_set_standby(at91sam9_sdram_standby);
345} 347}
346 348
347static void __init at91sam9260_initialize(void) 349static void __init at91sam9260_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 0e0793241ab7..1f3867a17a28 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -27,6 +27,7 @@
27#include "generic.h" 27#include "generic.h"
28#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
30#include "pm.h"
30 31
31/* -------------------------------------------------------------------- 32/* --------------------------------------------------------------------
32 * Clocks 33 * Clocks
@@ -284,6 +285,7 @@ static void __init at91sam9261_ioremap_registers(void)
284 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); 285 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
285 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); 286 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
286 at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX); 287 at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
288 at91_pm_set_standby(at91sam9_sdram_standby);
287} 289}
288 290
289static void __init at91sam9261_initialize(void) 291static void __init at91sam9261_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 6ce7d1850893..90d455d294a1 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -26,6 +26,7 @@
26#include "generic.h" 26#include "generic.h"
27#include "clock.h" 27#include "clock.h"
28#include "sam9_smc.h" 28#include "sam9_smc.h"
29#include "pm.h"
29 30
30/* -------------------------------------------------------------------- 31/* --------------------------------------------------------------------
31 * Clocks 32 * Clocks
@@ -321,6 +322,7 @@ static void __init at91sam9263_ioremap_registers(void)
321 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); 322 at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
322 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); 323 at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
323 at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX); 324 at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
325 at91_pm_set_standby(at91sam9_sdram_standby);
324} 326}
325 327
326static void __init at91sam9263_initialize(void) 328static void __init at91sam9263_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 474ee04d24b9..e9bf0b8f40eb 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -26,6 +26,7 @@
26#include "generic.h" 26#include "generic.h"
27#include "clock.h" 27#include "clock.h"
28#include "sam9_smc.h" 28#include "sam9_smc.h"
29#include "pm.h"
29 30
30/* -------------------------------------------------------------------- 31/* --------------------------------------------------------------------
31 * Clocks 32 * Clocks
@@ -370,6 +371,7 @@ static void __init at91sam9g45_ioremap_registers(void)
370 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); 371 at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
371 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); 372 at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
372 at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX); 373 at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
374 at91_pm_set_standby(at91_ddr_standby);
373} 375}
374 376
375static void __init at91sam9g45_initialize(void) 377static void __init at91sam9g45_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d4ec0d9a9872..88995af09c04 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -27,6 +27,7 @@
27#include "generic.h" 27#include "generic.h"
28#include "clock.h" 28#include "clock.h"
29#include "sam9_smc.h" 29#include "sam9_smc.h"
30#include "pm.h"
30 31
31/* -------------------------------------------------------------------- 32/* --------------------------------------------------------------------
32 * Clocks 33 * Clocks
@@ -287,6 +288,7 @@ static void __init at91sam9rl_ioremap_registers(void)
287 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); 288 at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
288 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); 289 at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
289 at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX); 290 at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
291 at91_pm_set_standby(at91sam9_sdram_standby);
290} 292}
291 293
292static void __init at91sam9rl_initialize(void) 294static void __init at91sam9rl_initialize(void)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 15afb5d9271f..9986542e8060 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -39,6 +39,8 @@
39#include "at91_rstc.h" 39#include "at91_rstc.h"
40#include "at91_shdwc.h" 40#include "at91_shdwc.h"
41 41
42static void (*at91_pm_standby)(void);
43
42static void __init show_reset_status(void) 44static void __init show_reset_status(void)
43{ 45{
44 static char reset[] __initdata = "reset"; 46 static char reset[] __initdata = "reset";
@@ -266,14 +268,8 @@ static int at91_pm_enter(suspend_state_t state)
266 * For ARM 926 based chips, this requirement is weaker 268 * For ARM 926 based chips, this requirement is weaker
267 * as at91sam9 can access a RAM in self-refresh mode. 269 * as at91sam9 can access a RAM in self-refresh mode.
268 */ 270 */
269 if (cpu_is_at91rm9200()) 271 if (at91_pm_standby)
270 at91rm9200_standby(); 272 at91_pm_standby();
271 else if (cpu_is_at91sam9g45())
272 at91sam9g45_standby();
273 else if (cpu_is_at91sam9263())
274 at91sam9263_standby();
275 else
276 at91sam9_standby();
277 break; 273 break;
278 274
279 case PM_SUSPEND_ON: 275 case PM_SUSPEND_ON:
@@ -314,6 +310,18 @@ static const struct platform_suspend_ops at91_pm_ops = {
314 .end = at91_pm_end, 310 .end = at91_pm_end,
315}; 311};
316 312
313static struct platform_device at91_cpuidle_device = {
314 .name = "cpuidle-at91",
315};
316
317void at91_pm_set_standby(void (*at91_standby)(void))
318{
319 if (at91_standby) {
320 at91_cpuidle_device.dev.platform_data = at91_standby;
321 at91_pm_standby = at91_standby;
322 }
323}
324
317static int __init at91_pm_init(void) 325static int __init at91_pm_init(void)
318{ 326{
319#ifdef CONFIG_AT91_SLOW_CLOCK 327#ifdef CONFIG_AT91_SLOW_CLOCK
@@ -325,6 +333,9 @@ static int __init at91_pm_init(void)
325 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ 333 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
326 if (cpu_is_at91rm9200()) 334 if (cpu_is_at91rm9200())
327 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); 335 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
336
337 if (at91_cpuidle_device.dev.platform_data)
338 platform_device_register(&at91_cpuidle_device);
328 339
329 suspend_set_ops(&at91_pm_ops); 340 suspend_set_ops(&at91_pm_ops);
330 341
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 2f5908f0b8c5..3ed190ce062b 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -11,9 +11,13 @@
11#ifndef __ARCH_ARM_MACH_AT91_PM 11#ifndef __ARCH_ARM_MACH_AT91_PM
12#define __ARCH_ARM_MACH_AT91_PM 12#define __ARCH_ARM_MACH_AT91_PM
13 13
14#include <asm/proc-fns.h>
15
14#include <mach/at91_ramc.h> 16#include <mach/at91_ramc.h>
15#include <mach/at91rm9200_sdramc.h> 17#include <mach/at91rm9200_sdramc.h>
16 18
19extern void at91_pm_set_standby(void (*at91_standby)(void));
20
17/* 21/*
18 * The AT91RM9200 goes into self-refresh mode with this command, and will 22 * The AT91RM9200 goes into self-refresh mode with this command, and will
19 * terminate self-refresh automatically on the next SDRAM access. 23 * terminate self-refresh automatically on the next SDRAM access.
@@ -45,16 +49,18 @@ static inline void at91rm9200_standby(void)
45/* We manage both DDRAM/SDRAM controllers, we need more than one value to 49/* We manage both DDRAM/SDRAM controllers, we need more than one value to
46 * remember. 50 * remember.
47 */ 51 */
48static inline void at91sam9g45_standby(void) 52static inline void at91_ddr_standby(void)
49{ 53{
50 /* Those two values allow us to delay self-refresh activation 54 /* Those two values allow us to delay self-refresh activation
51 * to the maximum. */ 55 * to the maximum. */
52 u32 lpr0, lpr1; 56 u32 lpr0, lpr1 = 0;
53 u32 saved_lpr0, saved_lpr1; 57 u32 saved_lpr0, saved_lpr1 = 0;
54 58
55 saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); 59 if (at91_ramc_base[1]) {
56 lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; 60 saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
57 lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; 61 lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
62 lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
63 }
58 64
59 saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); 65 saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
60 lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB; 66 lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
@@ -62,25 +68,29 @@ static inline void at91sam9g45_standby(void)
62 68
63 /* self-refresh mode now */ 69 /* self-refresh mode now */
64 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); 70 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
65 at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); 71 if (at91_ramc_base[1])
72 at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
66 73
67 cpu_do_idle(); 74 cpu_do_idle();
68 75
69 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); 76 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
70 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); 77 if (at91_ramc_base[1])
78 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
71} 79}
72 80
73/* We manage both DDRAM/SDRAM controllers, we need more than one value to 81/* We manage both DDRAM/SDRAM controllers, we need more than one value to
74 * remember. 82 * remember.
75 */ 83 */
76static inline void at91sam9263_standby(void) 84static inline void at91sam9_sdram_standby(void)
77{ 85{
78 u32 lpr0, lpr1; 86 u32 lpr0, lpr1 = 0;
79 u32 saved_lpr0, saved_lpr1; 87 u32 saved_lpr0, saved_lpr1 = 0;
80 88
81 saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); 89 if (at91_ramc_base[1]) {
82 lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; 90 saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
83 lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; 91 lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
92 lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
93 }
84 94
85 saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR); 95 saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
86 lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB; 96 lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
@@ -88,27 +98,14 @@ static inline void at91sam9263_standby(void)
88 98
89 /* self-refresh mode now */ 99 /* self-refresh mode now */
90 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); 100 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
91 at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); 101 if (at91_ramc_base[1])
102 at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
92 103
93 cpu_do_idle(); 104 cpu_do_idle();
94 105
95 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); 106 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
96 at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); 107 if (at91_ramc_base[1])
97} 108 at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
98
99static inline void at91sam9_standby(void)
100{
101 u32 saved_lpr, lpr;
102
103 saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
104
105 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
106 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
107 AT91_SDRAMC_LPCB_SELF_REFRESH);
108
109 cpu_do_idle();
110
111 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
112} 109}
113 110
114#endif 111#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index b17fbcf4d9e8..094b3459c288 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -23,6 +23,7 @@
23#include "at91_shdwc.h" 23#include "at91_shdwc.h"
24#include "soc.h" 24#include "soc.h"
25#include "generic.h" 25#include "generic.h"
26#include "pm.h"
26 27
27struct at91_init_soc __initdata at91_boot_soc; 28struct at91_init_soc __initdata at91_boot_soc;
28 29
@@ -376,15 +377,16 @@ static void at91_dt_rstc(void)
376} 377}
377 378
378static struct of_device_id ramc_ids[] = { 379static struct of_device_id ramc_ids[] = {
379 { .compatible = "atmel,at91rm9200-sdramc" }, 380 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
380 { .compatible = "atmel,at91sam9260-sdramc" }, 381 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
381 { .compatible = "atmel,at91sam9g45-ddramc" }, 382 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
382 { /*sentinel*/ } 383 { /*sentinel*/ }
383}; 384};
384 385
385static void at91_dt_ramc(void) 386static void at91_dt_ramc(void)
386{ 387{
387 struct device_node *np; 388 struct device_node *np;
389 const struct of_device_id *of_id;
388 390
389 np = of_find_matching_node(NULL, ramc_ids); 391 np = of_find_matching_node(NULL, ramc_ids);
390 if (!np) 392 if (!np)
@@ -396,6 +398,12 @@ static void at91_dt_ramc(void)
396 /* the controller may have 2 banks */ 398 /* the controller may have 2 banks */
397 at91_ramc_base[1] = of_iomap(np, 1); 399 at91_ramc_base[1] = of_iomap(np, 1);
398 400
401 of_id = of_match_node(ramc_ids, np);
402 if (!of_id)
403 pr_warn("AT91: ramc no standby function available\n");
404 else
405 at91_pm_set_standby(of_id->data);
406
399 of_node_put(np); 407 of_node_put(np);
400} 408}
401 409
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index 6a7e6f2d8adc..f23bd75426cd 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -37,3 +37,10 @@ config ARM_U8500_CPUIDLE
37 depends on ARCH_U8500 37 depends on ARCH_U8500
38 help 38 help
39 Select this to enable cpuidle for ST-E u8500 processors 39 Select this to enable cpuidle for ST-E u8500 processors
40
41config ARM_AT91_CPUIDLE
42 bool "Cpu Idle Driver for the AT91 processors"
43 default y
44 depends on ARCH_AT91
45 help
46 Select this to enable cpuidle for AT91 processors
diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile
index d08bd4055a49..527be28e5c1e 100644
--- a/drivers/cpuidle/Makefile
+++ b/drivers/cpuidle/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_ARM_HIGHBANK_CPUIDLE) += cpuidle-calxeda.o
12obj-$(CONFIG_ARM_KIRKWOOD_CPUIDLE) += cpuidle-kirkwood.o 12obj-$(CONFIG_ARM_KIRKWOOD_CPUIDLE) += cpuidle-kirkwood.o
13obj-$(CONFIG_ARM_ZYNQ_CPUIDLE) += cpuidle-zynq.o 13obj-$(CONFIG_ARM_ZYNQ_CPUIDLE) += cpuidle-zynq.o
14obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o 14obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o
15obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o
diff --git a/arch/arm/mach-at91/cpuidle.c b/drivers/cpuidle/cpuidle-at91.c
index 4ec6a6d9b9be..a0774370c6bc 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/drivers/cpuidle/cpuidle-at91.c
@@ -21,26 +21,17 @@
21#include <linux/export.h> 21#include <linux/export.h>
22#include <asm/proc-fns.h> 22#include <asm/proc-fns.h>
23#include <asm/cpuidle.h> 23#include <asm/cpuidle.h>
24#include <mach/cpu.h>
25
26#include "pm.h"
27 24
28#define AT91_MAX_STATES 2 25#define AT91_MAX_STATES 2
29 26
27static void (*at91_standby)(void);
28
30/* Actual code that puts the SoC in different idle states */ 29/* Actual code that puts the SoC in different idle states */
31static int at91_enter_idle(struct cpuidle_device *dev, 30static int at91_enter_idle(struct cpuidle_device *dev,
32 struct cpuidle_driver *drv, 31 struct cpuidle_driver *drv,
33 int index) 32 int index)
34{ 33{
35 if (cpu_is_at91rm9200()) 34 at91_standby();
36 at91rm9200_standby();
37 else if (cpu_is_at91sam9g45())
38 at91sam9g45_standby();
39 else if (cpu_is_at91sam9263())
40 at91sam9263_standby();
41 else
42 at91sam9_standby();
43
44 return index; 35 return index;
45} 36}
46 37
@@ -60,9 +51,19 @@ static struct cpuidle_driver at91_idle_driver = {
60}; 51};
61 52
62/* Initialize CPU idle by registering the idle states */ 53/* Initialize CPU idle by registering the idle states */
63static int __init at91_init_cpuidle(void) 54static int at91_cpuidle_probe(struct platform_device *dev)
64{ 55{
56 at91_standby = (void *)(dev->dev.platform_data);
57
65 return cpuidle_register(&at91_idle_driver, NULL); 58 return cpuidle_register(&at91_idle_driver, NULL);
66} 59}
67 60
68device_initcall(at91_init_cpuidle); 61static struct platform_driver at91_cpuidle_driver = {
62 .driver = {
63 .name = "cpuidle-at91",
64 .owner = THIS_MODULE,
65 },
66 .probe = at91_cpuidle_probe,
67};
68
69module_platform_driver(at91_cpuidle_driver);