55 files changed, 1721 insertions, 263 deletions

diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 4bc38078d580..9ed4e1b86674 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,11 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc7
-# Thu Dec  4 15:27:39 2008
+# Linux kernel version: 2.6.29-rc5
+# Tue Mar  3 21:45:57 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
@@ -42,10 +42,19 @@ CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
+CONFIG_LOG_BUF_SHIFT=19
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 # CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 CONFIG_NAMESPACES=y
@@ -53,6 +62,7 @@ CONFIG_NAMESPACES=y
 # CONFIG_IPC_NS is not set
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 # CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
@@ -83,6 +93,7 @@ CONFIG_SLUB_DEBUG=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
 # CONFIG_MARKERS is not set
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
@@ -93,7 +104,6 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -101,11 +111,9 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -121,7 +129,6 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
 # CONFIG_FREEZER is not set
 
 #
@@ -132,7 +139,6 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
@@ -159,11 +165,13 @@ CONFIG_ARCH_KIRKWOOD=y
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
 
 #
 # Marvell Kirkwood Implementations
@@ -171,14 +179,7 @@ CONFIG_ARCH_KIRKWOOD=y
 CONFIG_MACH_DB88F6281_BP=y
 CONFIG_MACH_RD88F6192_NAS=y
 CONFIG_MACH_RD88F6281=y
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
+CONFIG_MACH_SHEEVAPLUG=y
 CONFIG_PLAT_ORION=y
 
 #
@@ -214,6 +215,7 @@ CONFIG_PCI_SYSCALL=y
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
 # CONFIG_PCCARD is not set
 
 #
@@ -242,7 +244,6 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
@@ -291,6 +292,7 @@ CONFIG_NET=y
 #
 # Networking options
 #
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -355,6 +357,7 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -368,12 +371,27 @@ CONFIG_NET_PKTGEN=m
 # CONFIG_AF_RXRPC is not set
 # CONFIG_PHONET is not set
 CONFIG_WIRELESS=y
-# CONFIG_CFG80211 is not set
+CONFIG_CFG80211=y
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_NL80211 is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+CONFIG_LIB80211=y
+CONFIG_MAC80211=y
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -398,6 +416,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
@@ -451,9 +470,7 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x0
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=0
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_IMPA7 is not set
 # CONFIG_MTD_INTEL_VR_NOR is not set
@@ -481,6 +498,7 @@ CONFIG_MTD_NAND=y
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
 CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_CAFE is not set
@@ -491,6 +509,12 @@ CONFIG_MTD_NAND_ORION=y
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -568,6 +592,8 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_MEGARAID_LEGACY is not set
 # CONFIG_MEGARAID_SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
 # CONFIG_SCSI_IPS is not set
@@ -682,6 +708,9 @@ CONFIG_MARVELL_PHY=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
@@ -695,6 +724,7 @@ CONFIG_MII=y
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
 # CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
@@ -710,7 +740,6 @@ CONFIG_NET_PCI=y
 # CONFIG_ADAPTEC_STARFIRE is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
 # CONFIG_E100 is not set
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -720,6 +749,7 @@ CONFIG_NET_PCI=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
@@ -754,8 +784,39 @@ CONFIG_MV643XX_ETH=y
 # Wireless LAN
 #
 # CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=y
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=y
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8180 is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_ADM8211 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_ATH5K is not set
+# CONFIG_ATH9K is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_IWLCORE is not set
 # CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_IWLAGN is not set
+# CONFIG_IWL3945 is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_RT2X00 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -839,11 +900,11 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_NVRAM is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
 # CONFIG_RAW_DRIVER is not set
@@ -879,6 +940,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_GPIO is not set
 CONFIG_I2C_MV64XXX=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
@@ -905,8 +967,6 @@ CONFIG_I2C_MV64XXX=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
@@ -925,12 +985,12 @@ CONFIG_SPI_MASTER=y
 # SPI Master Controller Drivers
 #
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 CONFIG_SPI_ORION=y
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 # CONFIG_W1 is not set
@@ -952,10 +1012,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
 
 #
 # Multimedia devices
@@ -1012,11 +1074,9 @@ CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
-CONFIG_HID_BRIGHT=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-CONFIG_HID_DELL=y
 CONFIG_HID_EZKEY=y
 CONFIG_HID_GYRATION=y
 CONFIG_HID_LOGITECH=y
@@ -1024,12 +1084,15 @@ CONFIG_HID_LOGITECH=y
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
 # CONFIG_THRUSTMASTER_FF is not set
 # CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
@@ -1058,6 +1121,7 @@ CONFIG_USB_DEVICE_CLASS=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 # CONFIG_USB_OHCI_HCD is not set
@@ -1087,7 +1151,6 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_STORAGE_DATAFAB=y
 CONFIG_USB_STORAGE_FREECOM=y
 # CONFIG_USB_STORAGE_ISD200 is not set
-CONFIG_USB_STORAGE_DPCM=y
 # CONFIG_USB_STORAGE_USBAT is not set
 CONFIG_USB_STORAGE_SDDR09=y
 CONFIG_USB_STORAGE_SDDR55=y
@@ -1135,21 +1198,51 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
 # CONFIG_UWB is not set
-# CONFIG_MMC is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_TIFM_SD is not set
+CONFIG_MMC_MVSDIO=y
+# CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
-# CONFIG_LEDS_CLASS is not set
+CONFIG_LEDS_CLASS=y
 
 #
 # LED drivers
 #
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_PCA955X is not set
 
 #
 # LED Triggers
 #
-# CONFIG_LEDS_TRIGGERS is not set
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y
@@ -1227,6 +1320,7 @@ CONFIG_DMA_ENGINE=y
 # CONFIG_DMATEST is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
@@ -1238,16 +1332,14 @@ CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
 # CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 CONFIG_FILE_LOCKING=y
-CONFIG_XFS_FS=y
-# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_POSIX_ACL is not set
-# CONFIG_XFS_RT is not set
-# CONFIG_XFS_DEBUG is not set
+# CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1268,9 +1360,9 @@ CONFIG_UDF_NLS=y
 #
 # DOS/FAT/NT Filesystems
 #
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
 CONFIG_FAT_DEFAULT_CODEPAGE=437
 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
@@ -1286,10 +1378,7 @@ CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1309,6 +1398,7 @@ CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
 CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1393,7 +1483,7 @@ CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
@@ -1416,6 +1506,7 @@ CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
@@ -1424,7 +1515,7 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -1435,7 +1526,10 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
 
 #
 # Tracers
@@ -1446,11 +1540,14 @@ CONFIG_HAVE_FUNCTION_TRACER=y
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_PRINTK_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -1464,19 +1561,22 @@ CONFIG_DEBUG_LL=y
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_ASYNC_CORE=y
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
 # CONFIG_CRYPTO_FIPS is not set
-CONFIG_CRYPTO_ALGAPI=m
-CONFIG_CRYPTO_AEAD=m
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_HASH=m
-CONFIG_CRYPTO_RNG=m
-CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
 # CONFIG_CRYPTO_CRYPTD is not set
@@ -1496,7 +1596,7 @@ CONFIG_CRYPTO_MANAGER=m
 CONFIG_CRYPTO_CBC=m
 # CONFIG_CRYPTO_CTR is not set
 # CONFIG_CRYPTO_CTS is not set
-CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_ECB=y
 # CONFIG_CRYPTO_LRW is not set
 CONFIG_CRYPTO_PCBC=m
 # CONFIG_CRYPTO_XTS is not set
@@ -1510,7 +1610,7 @@ CONFIG_CRYPTO_PCBC=m
 #
 # Digest
 #
-# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_CRC32C=y
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1527,9 +1627,9 @@ CONFIG_CRYPTO_PCBC=m
 #
 # Ciphers
 #
-# CONFIG_CRYPTO_AES is not set
+CONFIG_CRYPTO_AES=y
 # CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_ARC4=y
 # CONFIG_CRYPTO_BLOWFISH is not set
 # CONFIG_CRYPTO_CAMELLIA is not set
 # CONFIG_CRYPTO_CAST5 is not set
@@ -1560,6 +1660,7 @@ CONFIG_CRYPTO_HW=y
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
 # CONFIG_CRC_T10DIF is not set
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 83c817f31bcc..b0698722e0cb 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -165,6 +165,7 @@ CONFIG_ARCH_MV78XX0=y
 # Marvell MV78xx0 Implementations
 #
 CONFIG_MACH_DB78X00_BP=y
+CONFIG_MACH_RD78X00_MASA=y
 
 #
 # Boot options
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index a8ee6984a09e..020e6a8a9e5c 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -481,7 +481,7 @@ CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_CAFE is not set
 # CONFIG_MTD_NAND_NANDSIM is not set
-# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_NAND_PLATFORM=y
 # CONFIG_MTD_ALAUDA is not set
 CONFIG_MTD_NAND_ORION=y
 # CONFIG_MTD_ONENAND is not set
@@ -1177,7 +1177,7 @@ CONFIG_RTC_DRV_S35390A=y
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
+CONFIG_RTC_DRV_M48T86=y
 # CONFIG_RTC_DRV_M48T59 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index b8c1f1411440..b55cb0331809 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -115,6 +115,7 @@ ENTRY(mcount)
         .globl mcount_call
 mcount_call:
         bl ftrace_stub
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 ENTRY(ftrace_caller)
@@ -126,6 +127,7 @@ ENTRY(ftrace_caller)
         .globl ftrace_call
 ftrace_call:
         bl ftrace_stub
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 #else
@@ -137,6 +139,7 @@ ENTRY(mcount)
         adr r0, ftrace_stub
         cmp r0, r2
         bne trace
+        ldr lr, [fp, #-4]                       @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 trace:
@@ -145,6 +148,7 @@ trace:
         sub r0, r0, #MCOUNT_INSN_SIZE
         mov lr, pc
         mov pc, r2
+        mov lr, r1                              @ restore lr
         ldmia sp!, {r0-r3, pc}
 
 #endif /* CONFIG_DYNAMIC_FTRACE */
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 36f81d967979..6ff7919613d7 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length)
  * disable irqs for the duration.  Note - these functions are almost
  * entirely coded in assembly.
  */
-void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
+void __naked set_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp;
         asm volatile (
@@ -106,7 +106,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
         : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
 }
 
-void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs)
+void __naked get_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp;
         asm volatile (
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 88f7e88f152f..05f0f4f2f3ce 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -4,6 +4,8 @@
 
 #ifndef __ASSEMBLY__
 
+struct i2c_board_info;
+
 struct ep93xx_eth_data
 {
         unsigned char   dev_addr[6];
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 3600cd9f0519..532443622a17 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -20,6 +20,12 @@ config MACH_RD88F6281
           Say 'Y' here if you want your kernel to support the
           Marvell RD-88F6281 Reference Board.
 
+config MACH_SHEEVAPLUG
+        bool "Marvell SheevaPlug Reference Board"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell SheevaPlug Reference Board.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index b96c55dad343..de81b4b5bd33 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -1,5 +1,6 @@
-obj-y                           += common.o addr-map.o irq.o pcie.o
+obj-y                           += common.o addr-map.o irq.o pcie.o mpp.o
 
 obj-$(CONFIG_MACH_DB88F6281_BP)         += db88f6281-bp-setup.o
 obj-$(CONFIG_MACH_RD88F6192_NAS)        += rd88f6192-nas-setup.o
 obj-$(CONFIG_MACH_RD88F6281)            += rd88f6281-setup.o
+obj-$(CONFIG_MACH_SHEEVAPLUG)           += sheevaplug-setup.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b3404b7775b3..9f012551794d 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -24,6 +24,7 @@
 #include <mach/kirkwood.h>
 #include <plat/cache-feroceon-l2.h>
 #include <plat/ehci-orion.h>
+#include <plat/mvsdio.h>
 #include <plat/mv_xor.h>
 #include <plat/orion_nand.h>
 #include <plat/time.h>
@@ -254,7 +255,7 @@ static struct resource kirkwood_rtc_resource = {
         .flags  = IORESOURCE_MEM,
 };
 
-void __init kirkwood_rtc_init(void)
+static void __init kirkwood_rtc_init(void)
 {
         platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
 }
@@ -296,6 +297,50 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 
 
 /*****************************************************************************
+ * SD/SDIO/MMC
+ ****************************************************************************/
+static struct resource mvsdio_resources[] = {
+        [0] = {
+                .start  = SDIO_PHYS_BASE,
+                .end    = SDIO_PHYS_BASE + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_KIRKWOOD_SDIO,
+                .end    = IRQ_KIRKWOOD_SDIO,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 mvsdio_dmamask = 0xffffffffUL;
+
+static struct platform_device kirkwood_sdio = {
+        .name           = "mvsdio",
+        .id             = -1,
+        .dev            = {
+                .dma_mask = &mvsdio_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(mvsdio_resources),
+        .resource       = mvsdio_resources,
+};
+
+void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
+{
+        u32 dev, rev;
+
+        kirkwood_pcie_id(&dev, &rev);
+        if (rev == 0)  /* catch all Kirkwood Z0's */
+                mvsdio_data->clock = 100000000;
+        else
+                mvsdio_data->clock = 200000000;
+        mvsdio_data->dram = &kirkwood_mbus_dram_info;
+        kirkwood_sdio.dev.platform_data = mvsdio_data;
+        platform_device_register(&kirkwood_sdio);
+}
+
+
+/*****************************************************************************
  * SPI
  ****************************************************************************/
 static struct orion_spi_info kirkwood_spi_plat_data = {
@@ -502,7 +547,7 @@ static struct platform_device kirkwood_xor01_channel = {
         },
 };
 
-void __init kirkwood_xor0_init(void)
+static void __init kirkwood_xor0_init(void)
 {
         platform_device_register(&kirkwood_xor0_shared);
 
@@ -600,7 +645,7 @@ static struct platform_device kirkwood_xor11_channel = {
         },
 };
 
-void __init kirkwood_xor1_init(void)
+static void __init kirkwood_xor1_init(void)
 {
         platform_device_register(&kirkwood_xor1_shared);
 
@@ -708,4 +753,9 @@ void __init kirkwood_init(void)
 #ifdef CONFIG_CACHE_FEROCEON_L2
         kirkwood_l2_init();
 #endif
+
+        /* internal devices that every board has */
+        kirkwood_rtc_init();
+        kirkwood_xor0_init();
+        kirkwood_xor1_init();
 }
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index fe367c18e722..9e5282684d58 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -14,6 +14,7 @@
 struct dsa_platform_data;
 struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
+struct mvsdio_platform_data;
 
 /*
  * Basic Kirkwood init functions used early by machine-setup.
@@ -33,13 +34,11 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
 void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data);
 void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq);
 void kirkwood_pcie_init(void);
-void kirkwood_rtc_init(void);
 void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
+void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data);
 void kirkwood_spi_init(void);
 void kirkwood_uart0_init(void);
 void kirkwood_uart1_init(void);
-void kirkwood_xor0_init(void);
-void kirkwood_xor1_init(void);
 
 extern struct sys_timer kirkwood_timer;
 
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index a14c2948c62a..5505d5837752 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -11,18 +11,59 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
 #include <mach/kirkwood.h>
+#include <plat/orion_nand.h>
+#include <plat/mvsdio.h>
 #include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition db88f6281_nand_parts[] = {
+        {
+                .name = "u-boot",
+                .offset = 0,
+                .size = SZ_1M
+        }, {
+                .name = "uImage",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size = SZ_4M
+        }, {
+                .name = "root",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size = MTDPART_SIZ_FULL
+        },
+};
+
+static struct resource db88f6281_nand_resource = {
+        .flags          = IORESOURCE_MEM,
+        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
+        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
+                          KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data db88f6281_nand_data = {
+        .parts          = db88f6281_nand_parts,
+        .nr_parts       = ARRAY_SIZE(db88f6281_nand_parts),
+        .cle            = 0,
+        .ale            = 1,
+        .width          = 8,
+        .chip_delay     = 25,
+};
+
+static struct platform_device db88f6281_nand_flash = {
+        .name           = "orion_nand",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &db88f6281_nand_data,
+        },
+        .resource       = &db88f6281_nand_resource,
+        .num_resources  = 1,
+};
 
 static struct mv643xx_eth_platform_data db88f6281_ge00_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
@@ -32,18 +73,32 @@ static struct mv_sata_platform_data db88f6281_sata_data = {
         .n_ports        = 2,
 };
 
+static struct mvsdio_platform_data db88f6281_mvsdio_data = {
+        .gpio_write_protect     = 37,
+        .gpio_card_detect       = 38,
+};
+
+static unsigned int db88f6281_mpp_config[] __initdata = {
+        MPP37_GPIO,
+        MPP38_GPIO,
+        0
+};
+
 static void __init db88f6281_init(void)
 {
         /*
          * Basic setup. Needs to be called early.
          */
         kirkwood_init();
+        kirkwood_mpp_conf(db88f6281_mpp_config);
 
         kirkwood_ehci_init();
         kirkwood_ge00_init(&db88f6281_ge00_data);
-        kirkwood_rtc_init();
         kirkwood_sata_init(&db88f6281_sata_data);
         kirkwood_uart0_init();
+        kirkwood_sdio_init(&db88f6281_mvsdio_data);
+        
+        platform_device_register(&db88f6281_nand_flash);
 }
 
 static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index ada480c0e197..d3db30fe763b 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -116,5 +116,7 @@
 
 #define SATA_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
 
+#define SDIO_PHYS_BASE          (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
+
 
 #endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
new file mode 100644
index 000000000000..63c44934391a
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -0,0 +1,97 @@
+/*
+ * arch/arm/mach-kirkwood/mpp.c
+ *
+ * MPP functions for Marvell Kirkwood SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <asm/gpio.h>
+#include <mach/hardware.h>
+#include "common.h"
+#include "mpp.h"
+
+static unsigned int __init kirkwood_variant(void)
+{
+        u32 dev, rev;
+
+        kirkwood_pcie_id(&dev, &rev);
+
+        if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0)
+                return MPP_F6281_MASK;
+        if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
+                return MPP_F6192_MASK;
+        if (dev == MV88F6180_DEV_ID)
+                return MPP_F6180_MASK;
+
+        printk(KERN_ERR "MPP setup: unknown kirkwood variant "
+                        "(dev %#x rev %#x)\n", dev, rev);
+        return 0;
+}
+
+#define MPP_CTRL(i)     (DEV_BUS_VIRT_BASE + (i) * 4)
+#define MPP_NR_REGS     (1 + MPP_MAX/8)
+
+void __init kirkwood_mpp_conf(unsigned int *mpp_list)
+{
+        u32 mpp_ctrl[MPP_NR_REGS];
+        unsigned int variant_mask;
+        int i;
+
+        variant_mask = kirkwood_variant();
+        if (!variant_mask)
+                return;
+
+        printk(KERN_DEBUG "initial MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                mpp_ctrl[i] = readl(MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+
+        while (*mpp_list) {
+                unsigned int num = MPP_NUM(*mpp_list);
+                unsigned int sel = MPP_SEL(*mpp_list);
+                int shift, gpio_mode;
+
+                if (num > MPP_MAX) {
+                        printk(KERN_ERR "kirkwood_mpp_conf: invalid MPP "
+                                        "number (%u)\n", num);
+                        continue;
+                }
+                if (!(*mpp_list & variant_mask)) {
+                        printk(KERN_WARNING
+                               "kirkwood_mpp_conf: requested MPP%u config "
+                               "unavailable on this hardware\n", num);
+                        continue;
+                }
+
+                shift = (num & 7) << 2;
+                mpp_ctrl[num / 8] &= ~(0xf << shift);
+                mpp_ctrl[num / 8] |= sel << shift;
+
+                gpio_mode = 0;
+                if (*mpp_list & MPP_INPUT_MASK)
+                        gpio_mode |= GPIO_INPUT_OK;
+                if (*mpp_list & MPP_OUTPUT_MASK)
+                        gpio_mode |= GPIO_OUTPUT_OK;
+                if (sel != 0)
+                        gpio_mode = 0;
+                orion_gpio_set_valid(num, gpio_mode);
+
+                mpp_list++;
+        }
+
+        printk(KERN_DEBUG "  final MPP regs:");
+        for (i = 0; i < MPP_NR_REGS; i++) {
+                writel(mpp_ctrl[i], MPP_CTRL(i));
+                printk(" %08x", mpp_ctrl[i]);
+        }
+        printk("\n");
+}
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
new file mode 100644
index 000000000000..45cccb743107
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -0,0 +1,303 @@
+/*
+ * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins
+ *
+ * Copyright 2009: Marvell Technology Group Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __KIRKWOOD_MPP_H
+#define __KIRKWOOD_MPP_H
+
+#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \
+        /* MPP number */                ((_num) & 0xff) | \
+        /* MPP select value */          (((_sel) & 0xf) << 8) | \
+        /* may be input signal */       ((!!(_in)) << 12) | \
+        /* may be output signal */      ((!!(_out)) << 13) | \
+        /* available on F6180 */        ((!!(_F6180)) << 14) | \
+        /* available on F6190 */        ((!!(_F6190)) << 15) | \
+        /* available on F6192 */        ((!!(_F6192)) << 16) | \
+        /* available on F6281 */        ((!!(_F6281)) << 17))
+
+#define MPP_NUM(x)      ((x) & 0xff)
+#define MPP_SEL(x)      (((x) >> 8) & 0xf)
+
+                                /*   num sel  i  o  6180 6190 6192 6281 */
+
+#define MPP_INPUT_MASK          MPP(  0, 0x0, 1, 0, 0,   0,   0,   0    )
+#define MPP_OUTPUT_MASK         MPP(  0, 0x0, 0, 1, 0,   0,   0,   0    )
+
+#define MPP_F6180_MASK          MPP(  0, 0x0, 0, 0, 1,   0,   0,   0    )
+#define MPP_F6190_MASK          MPP(  0, 0x0, 0, 0, 0,   1,   0,   0    )
+#define MPP_F6192_MASK          MPP(  0, 0x0, 0, 0, 0,   0,   1,   0    )
+#define MPP_F6281_MASK          MPP(  0, 0x0, 0, 0, 0,   0,   0,   1    )
+
+#define MPP0_GPIO               MPP(  0, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP0_NF_IO2             MPP(  0, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP0_SPI_SCn            MPP(  0, 0x2, 0, 1, 1,   1,   1,   1    )
+
+#define MPP1_GPO                MPP(  1, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP1_NF_IO3             MPP(  1, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP1_SPI_MOSI           MPP(  1, 0x2, 0, 1, 1,   1,   1,   1    )
+
+#define MPP2_GPO                MPP(  2, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP2_NF_IO4             MPP(  2, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP2_SPI_SCK            MPP(  2, 0x2, 0, 1, 1,   1,   1,   1    )
+
+#define MPP3_GPO                MPP(  3, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP3_NF_IO5             MPP(  3, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP3_SPI_MISO           MPP(  3, 0x2, 1, 0, 1,   1,   1,   1    )
+
+#define MPP4_GPIO               MPP(  4, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP4_NF_IO6             MPP(  4, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP4_UART0_RXD          MPP(  4, 0x2, 1, 0, 1,   1,   1,   1    )
+#define MPP4_SATA1_ACTn         MPP(  4, 0x5, 0, 1, 0,   0,   1,   1    )
+#define MPP4_PTP_CLK            MPP(  4, 0xd, 1, 0, 1,   1,   1,   1    )
+
+#define MPP5_GPO                MPP(  5, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP5_NF_IO7             MPP(  5, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP5_UART0_TXD          MPP(  5, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP5_PTP_TRIG_GEN       MPP(  5, 0x4, 0, 1, 1,   1,   1,   1    )
+#define MPP5_SATA0_ACTn         MPP(  5, 0x5, 0, 1, 0,   1,   1,   1    )
+
+#define MPP6_SYSRST_OUTn        MPP(  6, 0x1, 0, 1, 1,   1,   1,   1    )
+#define MPP6_SPI_MOSI           MPP(  6, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP6_PTP_TRIG_GEN       MPP(  6, 0x3, 0, 1, 1,   1,   1,   1    )
+
+#define MPP7_GPO                MPP(  7, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP7_PEX_RST_OUTn       MPP(  7, 0x1, 0, 1, 1,   1,   1,   1    )
+#define MPP7_SPI_SCn            MPP(  7, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP7_PTP_TRIG_GEN       MPP(  7, 0x3, 0, 1, 1,   1,   1,   1    )
+
+#define MPP8_GPIO               MPP(  8, 0x0, 1, 1, 1,    1,  1,   1    )
+#define MPP8_TW_SDA             MPP(  8, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP8_UART0_RTS          MPP(  8, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP8_UART1_RTS          MPP(  8, 0x3, 0, 1, 1,   1,   1,   1    )
+#define MPP8_MII0_RXERR         MPP(  8, 0x4, 1, 0, 0,   1,   1,   1    )
+#define MPP8_SATA1_PRESENTn     MPP(  8, 0x5, 0, 1, 0,   0,   1,   1    )
+#define MPP8_PTP_CLK            MPP(  8, 0xc, 1, 0, 1,   1,   1,   1    )
+#define MPP8_MII0_COL           MPP(  8, 0xd, 1, 0, 1,   1,   1,   1    )
+
+#define MPP9_GPIO               MPP(  9, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP9_TW_SCK             MPP(  9, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP9_UART0_CTS          MPP(  9, 0x2, 1, 0, 1,   1,   1,   1    )
+#define MPP9_UART1_CTS          MPP(  9, 0x3, 1, 0, 1,   1,   1,   1    )
+#define MPP9_SATA0_PRESENTn     MPP(  9, 0x5, 0, 1, 0,   1,   1,   1    )
+#define MPP9_PTP_EVENT_REQ      MPP(  9, 0xc, 1, 0, 1,   1,   1,   1    )
+#define MPP9_MII0_CRS           MPP(  9, 0xd, 1, 0, 1,   1,   1,   1    )
+
+#define MPP10_GPO               MPP( 10, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP10_SPI_SCK           MPP( 10, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP10_UArt0_TXD         MPP( 10, 0X3, 0, 1, 1,   1,   1,   1    )
+#define MPP10_SATA1_ACTn        MPP( 10, 0x5, 0, 1, 0,   0,   1,   1    )
+#define MPP10_PTP_TRIG_GEN      MPP( 10, 0xc, 0, 1, 1,   1,   1,   1    )
+
+#define MPP11_GPIO              MPP( 11, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP11_SPI_MISO          MPP( 11, 0x2, 1, 0, 1,   1,   1,   1    )
+#define MPP11_UArt0_RXD         MPP( 11, 0x3, 1, 0, 1,   1,   1,   1    )
+#define MPP11_PTP_EVENT_REQ     MPP( 11, 0x4, 1, 0, 1,   1,   1,   1    )
+#define MPP11_PTP_TRIG_GEN      MPP( 11, 0xc, 0, 1, 1,   1,   1,   1    )
+#define MPP11_PTP_CLK           MPP( 11, 0xd, 1, 0, 1,   1,   1,   1    )
+#define MPP11_SATA0_ACTn        MPP( 11, 0x5, 0, 1, 0,   1,   1,   1    )
+
+#define MPP12_GPO               MPP( 12, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP12_SD_CLK            MPP( 12, 0x1, 0, 1, 1,   1,   1,   1    )
+
+#define MPP13_GPIO              MPP( 13, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP13_SD_CMD            MPP( 13, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP13_UART1_TXD         MPP( 13, 0x3, 0, 1, 1,   1,   1,   1    )
+
+#define MPP14_GPIO              MPP( 14, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP14_SD_D0             MPP( 14, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP14_UART1_RXD         MPP( 14, 0x3, 1, 0, 1,   1,   1,   1    )
+#define MPP14_SATA1_PRESENTn    MPP( 14, 0x4, 0, 1, 0,   0,   1,   1    )
+#define MPP14_MII0_COL          MPP( 14, 0xd, 1, 0, 1,   1,   1,   1    )
+
+#define MPP15_GPIO              MPP( 15, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP15_SD_D1             MPP( 15, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP15_UART0_RTS         MPP( 15, 0x2, 0, 1, 1,   1,   1,   1    )
+#define MPP15_UART1_TXD         MPP( 15, 0x3, 0, 1, 1,   1,   1,   1    )
+#define MPP15_SATA0_ACTn        MPP( 15, 0x4, 0, 1, 0,   1,   1,   1    )
+
+#define MPP16_GPIO              MPP( 16, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP16_SD_D2             MPP( 16, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP16_UART0_CTS         MPP( 16, 0x2, 1, 0, 1,   1,   1,   1    )
+#define MPP16_UART1_RXD         MPP( 16, 0x3, 1, 0, 1,   1,   1,   1    )
+#define MPP16_SATA1_ACTn        MPP( 16, 0x4, 0, 1, 0,   0,   1,   1    )
+#define MPP16_MII0_CRS          MPP( 16, 0xd, 1, 0, 1,   1,   1,   1    )
+
+#define MPP17_GPIO              MPP( 17, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP17_SD_D3             MPP( 17, 0x1, 1, 1, 1,   1,   1,   1    )
+#define MPP17_SATA0_PRESENTn    MPP( 17, 0x4, 0, 1, 0,   1,   1,   1    )
+
+#define MPP18_GPO               MPP( 18, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP18_NF_IO0            MPP( 18, 0x1, 1, 1, 1,   1,   1,   1    )
+
+#define MPP19_GPO               MPP( 19, 0x0, 0, 1, 1,   1,   1,   1    )
+#define MPP19_NF_IO1            MPP( 19, 0x1, 1, 1, 1,   1,   1,   1    )
+
+#define MPP20_GPIO              MPP( 20, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP20_TSMP0             MPP( 20, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP20_TDM_CH0_TX_QL     MPP( 20, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP20_GE1_0             MPP( 20, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP20_AUDIO_SPDIFI      MPP( 20, 0x4, 1, 0, 0,   0,   1,   1    )
+#define MPP20_SATA1_ACTn        MPP( 20, 0x5, 0, 1, 0,   0,   1,   1    )
+
+#define MPP21_GPIO              MPP( 21, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP21_TSMP1             MPP( 21, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP21_TDM_CH0_RX_QL     MPP( 21, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP21_GE1_1             MPP( 21, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP21_AUDIO_SPDIFO      MPP( 21, 0x4, 0, 1, 0,   0,   1,   1    )
+#define MPP21_SATA0_ACTn        MPP( 21, 0x5, 0, 1, 0,   1,   1,   1    )
+
+#define MPP22_GPIO              MPP( 22, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP22_TSMP2             MPP( 22, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP22_TDM_CH2_TX_QL     MPP( 22, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP22_GE1_2             MPP( 22, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP22_AUDIO_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0,   0,   1,   1    )
+#define MPP22_SATA1_PRESENTn    MPP( 22, 0x5, 0, 1, 0,   0,   1,   1    )
+
+#define MPP23_GPIO              MPP( 23, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP23_TSMP3             MPP( 23, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP23_TDM_CH2_RX_QL     MPP( 23, 0x2, 1, 0, 0,   0,   1,   1    )
+#define MPP23_GE1_3             MPP( 23, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP23_AUDIO_I2SBCLK     MPP( 23, 0x4, 0, 1, 0,   0,   1,   1    )
+#define MPP23_SATA0_PRESENTn    MPP( 23, 0x5, 0, 1, 0,   1,   1,   1    )
+
+#define MPP24_GPIO              MPP( 24, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP24_TSMP4             MPP( 24, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP24_TDM_SPI_CS0       DEV( 24, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP24_GE1_4             MPP( 24, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP24_AUDIO_I2SDO       MPP( 24, 0x4, 0, 1, 0,   0,   1,   1    )
+
+#define MPP25_GPIO              MPP( 25, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP25_TSMP5             MPP( 25, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP25_TDM_SPI_SCK       MPP( 25, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP25_GE1_5             MPP( 25, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP25_AUDIO_I2SLRCLK    MPP( 25, 0x4, 0, 1, 0,   0,   1,   1    )
+
+#define MPP26_GPIO              MPP( 26, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP26_TSMP6             MPP( 26, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP26_TDM_SPI_MISO      MPP( 26, 0x2, 1, 0, 0,   0,   1,   1    )
+#define MPP26_GE1_6             MPP( 26, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP26_AUDIO_I2SMCLK     MPP( 26, 0x4, 0, 1, 0,   0,   1,   1    )
+
+#define MPP27_GPIO              MPP( 27, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP27_TSMP7             MPP( 27, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP27_TDM_SPI_MOSI      MPP( 27, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP27_GE1_7             MPP( 27, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP27_AUDIO_I2SDI       MPP( 27, 0x4, 1, 0, 0,   0,   1,   1    )
+
+#define MPP28_GPIO              MPP( 28, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP28_TSMP8             MPP( 28, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP28_TDM_CODEC_INTn    MPP( 28, 0x2, 0, 0, 0,   0,   1,   1    )
+#define MPP28_GE1_8             MPP( 28, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP28_AUDIO_EXTCLK      MPP( 28, 0x4, 1, 0, 0,   0,   1,   1    )
+
+#define MPP29_GPIO              MPP( 29, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP29_TSMP9             MPP( 29, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP29_TDM_CODEC_RSTn    MPP( 29, 0x2, 0, 0, 0,   0,   1,   1    )
+#define MPP29_GE1_9             MPP( 29, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP30_GPIO              MPP( 30, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP30_TSMP10            MPP( 30, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP30_TDM_PCLK          MPP( 30, 0x2, 1, 1, 0,   0,   1,   1    )
+#define MPP30_GE1_10            MPP( 30, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP31_GPIO              MPP( 31, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP31_TSMP11            MPP( 31, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP31_TDM_FS            MPP( 31, 0x2, 1, 1, 0,   0,   1,   1    )
+#define MPP31_GE1_11            MPP( 31, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP32_GPIO              MPP( 32, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP32_TSMP12            MPP( 32, 0x1, 1, 1, 0,   0,   1,   1    )
+#define MPP32_TDM_DRX           MPP( 32, 0x2, 1, 0, 0,   0,   1,   1    )
+#define MPP32_GE1_12            MPP( 32, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP33_GPIO              MPP( 33, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP33_TDM_DTX           MPP( 33, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP33_GE1_13            MPP( 33, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP34_GPIO              MPP( 34, 0x0, 1, 1, 0,   1,   1,   1    )
+#define MPP34_TDM_SPI_CS1       MPP( 34, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP34_GE1_14            MPP( 34, 0x3, 0, 0, 0,   1,   1,   1    )
+
+#define MPP35_GPIO              MPP( 35, 0x0, 1, 1, 1,   1,   1,   1    )
+#define MPP35_TDM_CH0_TX_QL     MPP( 35, 0x2, 0, 1, 0,   0,   1,   1    )
+#define MPP35_GE1_15            MPP( 35, 0x3, 0, 0, 0,   1,   1,   1    )
+#define MPP35_SATA0_ACTn        MPP( 35, 0x5, 0, 1, 0,   1,   1,   1    )
+#define MPP35_MII0_RXERR        MPP( 35, 0xc, 1, 0, 1,   1,   1,   1    )
+
+#define MPP36_GPIO              MPP( 36, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP36_TSMP0             MPP( 36, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP36_TDM_SPI_CS1       MPP( 36, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP36_AUDIO_SPDIFI      MPP( 36, 0x4, 1, 0, 1,   0,   0,   1    )
+
+#define MPP37_GPIO              MPP( 37, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP37_TSMP1             MPP( 37, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP37_TDM_CH2_TX_QL     MPP( 37, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP37_AUDIO_SPDIFO      MPP( 37, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP38_GPIO              MPP( 38, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP38_TSMP2             MPP( 38, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP38_TDM_CH2_RX_QL     MPP( 38, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP38_AUDIO_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP39_GPIO              MPP( 39, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP39_TSMP3             MPP( 39, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP39_TDM_SPI_CS0       MPP( 39, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP39_AUDIO_I2SBCLK     MPP( 39, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP40_GPIO              MPP( 40, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP40_TSMP4             MPP( 40, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP40_TDM_SPI_SCK       MPP( 40, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP40_AUDIO_I2SDO       MPP( 40, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP41_GPIO              MPP( 41, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP41_TSMP5             MPP( 41, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP41_TDM_SPI_MISO      MPP( 41, 0x2, 1, 0, 0,   0,   0,   1    )
+#define MPP41_AUDIO_I2SLRC      MPP( 41, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP42_GPIO              MPP( 42, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP42_TSMP6             MPP( 42, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP42_TDM_SPI_MOSI      MPP( 42, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP42_AUDIO_I2SMCLK     MPP( 42, 0x4, 0, 1, 1,   0,   0,   1    )
+
+#define MPP43_GPIO              MPP( 43, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP43_TSMP7             MPP( 43, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP43_TDM_CODEC_INTn    MPP( 43, 0x2, 0, 0, 0,   0,   0,   1    )
+#define MPP43_AUDIO_I2SDI       MPP( 43, 0x4, 1, 0, 1,   0,   0,   1    )
+
+#define MPP44_GPIO              MPP( 44, 0x0, 1, 1, 1,   0,   0,   1    )
+#define MPP44_TSMP8             MPP( 44, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP44_TDM_CODEC_RSTn    MPP( 44, 0x2, 0, 0, 0,   0,   0,   1    )
+#define MPP44_AUDIO_EXTCLK      MPP( 44, 0x4, 1, 0, 1,   0,   0,   1    )
+
+#define MPP45_GPIO              MPP( 45, 0x0, 1, 1, 0,   0,   0,   1    )
+#define MPP45_TSMP9             MPP( 45, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP45_TDM_PCLK          MPP( 45, 0x2, 1, 1, 0,   0,   0,   1    )
+
+#define MPP46_GPIO              MPP( 46, 0x0, 1, 1, 0,   0,   0,   1    )
+#define MPP46_TSMP10            MPP( 46, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP46_TDM_FS            MPP( 46, 0x2, 1, 1, 0,   0,   0,   1    )
+
+#define MPP47_GPIO              MPP( 47, 0x0, 1, 1, 0,   0,   0,   1    )
+#define MPP47_TSMP11            MPP( 47, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP47_TDM_DRX           MPP( 47, 0x2, 1, 0, 0,   0,   0,   1    )
+
+#define MPP48_GPIO              MPP( 48, 0x0, 1, 1, 0,   0,   0,   1    )
+#define MPP48_TSMP12            MPP( 48, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP48_TDM_DTX           MPP( 48. 0x2, 0, 1, 0,   0,   0,   1    )
+
+#define MPP49_GPIO              MPP( 49, 0x0, 1, 1, 0,   0,   0,   1    )
+#define MPP49_TSMP9             MPP( 49, 0x1, 1, 1, 0,   0,   0,   1    )
+#define MPP49_TDM_CH0_RX_QL     MPP( 49, 0x2, 0, 1, 0,   0,   0,   1    )
+#define MPP49_PTP_CLK           MPP( 49, 0x5, 1, 0, 0,   0,   0,   1    )
+
+#define MPP_MAX                 49
+
+void kirkwood_mpp_conf(unsigned int *mpp_list);
+
+#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index b1d1a87a6821..2f0e4ef3db0f 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -11,11 +11,8 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/spi/flash.h>
@@ -23,7 +20,6 @@
 #include <linux/spi/orion_spi.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
 #include <mach/kirkwood.h>
 #include "common.h"
 
@@ -61,14 +57,11 @@ static void __init rd88f6192_init(void)
 
         kirkwood_ehci_init();
         kirkwood_ge00_init(&rd88f6192_ge00_data);
-        kirkwood_rtc_init();
         kirkwood_sata_init(&rd88f6192_sata_data);
         spi_register_board_info(rd88F6192_spi_slave_info,
                                 ARRAY_SIZE(rd88F6192_spi_slave_info));
         kirkwood_spi_init();
         kirkwood_uart0_init();
-        kirkwood_xor0_init();
-        kirkwood_xor1_init();
 }
 
 static int __init rd88f6192_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9a0e905d10cd..c3deea5e3cad 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -11,21 +11,20 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/pci.h>
 #include <linux/irq.h>
-#include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
-#include <linux/timer.h>
+#include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
 #include <net/dsa.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
 #include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
 #include <plat/orion_nand.h>
 #include "common.h"
+#include "mpp.h"
 
 static struct mtd_partition rd88f6281_nand_parts[] = {
         {
@@ -91,6 +90,15 @@ static struct mv_sata_platform_data rd88f6281_sata_data = {
         .n_ports        = 2,
 };
 
+static struct mvsdio_platform_data rd88f6281_mvsdio_data = {
+        .gpio_card_detect = 28,
+};
+
+static unsigned int rd88f6281_mpp_config[] __initdata = {
+        MPP28_GPIO,
+        0
+};
+
 static void __init rd88f6281_init(void)
 {
         u32 dev, rev;
@@ -99,6 +107,7 @@ static void __init rd88f6281_init(void)
          * Basic setup. Needs to be called early.
          */
         kirkwood_init();
+        kirkwood_mpp_conf(rd88f6281_mpp_config);
 
         kirkwood_ehci_init();
 
@@ -112,8 +121,8 @@ static void __init rd88f6281_init(void)
         }
         kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
 
-        kirkwood_rtc_init();
         kirkwood_sata_init(&rd88f6281_sata_data);
+        kirkwood_sdio_init(&rd88f6281_mvsdio_data);
         kirkwood_uart0_init();
 
         platform_device_register(&rd88f6281_nand_flash);
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
new file mode 100644
index 000000000000..831e4a56cae1
--- /dev/null
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -0,0 +1,136 @@
+/*
+ * arch/arm/mach-kirkwood/sheevaplug-setup.c
+ *
+ * Marvell SheevaPlug Reference Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/kirkwood.h>
+#include <plat/mvsdio.h>
+#include <plat/orion_nand.h>
+#include "common.h"
+#include "mpp.h"
+
+static struct mtd_partition sheevaplug_nand_parts[] = {
+        {
+                .name = "u-boot",
+                .offset = 0,
+                .size = SZ_1M
+        }, {
+                .name = "uImage",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size = SZ_4M
+        }, {
+                .name = "root",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size = MTDPART_SIZ_FULL
+        },
+};
+
+static struct resource sheevaplug_nand_resource = {
+        .flags          = IORESOURCE_MEM,
+        .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
+        .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
+                          KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data sheevaplug_nand_data = {
+        .parts          = sheevaplug_nand_parts,
+        .nr_parts       = ARRAY_SIZE(sheevaplug_nand_parts),
+        .cle            = 0,
+        .ale            = 1,
+        .width          = 8,
+        .chip_delay     = 25,
+};
+
+static struct platform_device sheevaplug_nand_flash = {
+        .name           = "orion_nand",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &sheevaplug_nand_data,
+        },
+        .resource       = &sheevaplug_nand_resource,
+        .num_resources  = 1,
+};
+
+static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
+        // unfortunately the CD signal has not been connected */
+};
+
+static struct gpio_led sheevaplug_led_pins[] = {
+        {
+                .name                   = "plug:green:health",
+                .default_trigger        = "default-on",
+                .gpio                   = 49,
+                .active_low             = 1,
+        },
+};
+
+static struct gpio_led_platform_data sheevaplug_led_data = {
+        .leds           = sheevaplug_led_pins,
+        .num_leds       = ARRAY_SIZE(sheevaplug_led_pins),
+};
+
+static struct platform_device sheevaplug_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &sheevaplug_led_data,
+        }
+};
+
+static unsigned int sheevaplug_mpp_config[] __initdata = {
+        MPP29_GPIO,     /* USB Power Enable */
+        MPP49_GPIO,     /* LED */
+        0
+};
+
+static void __init sheevaplug_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_init();
+        kirkwood_mpp_conf(sheevaplug_mpp_config);
+
+        kirkwood_uart0_init();
+
+        if (gpio_request(29, "USB Power Enable") != 0 ||
+            gpio_direction_output(29, 1) != 0)
+                printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+        kirkwood_ehci_init();
+
+        kirkwood_ge00_init(&sheevaplug_ge00_data);
+        kirkwood_sdio_init(&sheevaplug_mvsdio_data);
+
+        platform_device_register(&sheevaplug_nand_flash);
+        platform_device_register(&sheevaplug_leds);
+}
+
+MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
+        /* Maintainer: shadi Ammouri <shadi@marvell.com> */
+        .phys_io        = KIRKWOOD_REGS_PHYS_BASE,
+        .io_pg_offst    = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = sheevaplug_init,
+        .map_io         = kirkwood_map_io,
+        .init_irq       = kirkwood_init_irq,
+        .timer          = &kirkwood_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig
index d83cb86837db..6fbe68fe4412 100644
--- a/arch/arm/mach-mv78xx0/Kconfig
+++ b/arch/arm/mach-mv78xx0/Kconfig
@@ -8,6 +8,12 @@ config MACH_DB78X00_BP
           Say 'Y' here if you want your kernel to support the
           Marvell DB-78x00-BP Development Board.
 
+config MACH_RD78X00_MASA
+        bool "Marvell RD-78x00-mASA Reference Design"
+        help
+          Say 'Y' here if you want your kernel to support the
+          Marvell RD-78x00-mASA Reference Design.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile
index ec16c05c3b1b..da628b7f3bb6 100644
--- a/arch/arm/mach-mv78xx0/Makefile
+++ b/arch/arm/mach-mv78xx0/Makefile
@@ -1,2 +1,3 @@
 obj-y                           += common.o addr-map.o irq.o pcie.o
 obj-$(CONFIG_MACH_DB78X00_BP)   += db78x00-bp-setup.o
+obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index b0e4e0d8f506..a575daaa62d1 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -14,7 +14,9 @@
 #include <linux/serial_8250.h>
 #include <linux/mbus.h>
 #include <linux/mv643xx_eth.h>
+#include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
+#include <linux/ethtool.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <mach/mv78xx0.h>
@@ -430,9 +432,22 @@ static struct platform_device mv78xx0_ge10 = {
 
 void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
 {
+        u32 dev, rev;
+
         eth_data->shared = &mv78xx0_ge10_shared;
         mv78xx0_ge10.dev.platform_data = eth_data;
 
+        /*
+         * On the Z0, ge10 and ge11 are internally connected back
+         * to back, and not brought out.
+         */
+        mv78xx0_pcie_id(&dev, &rev);
+        if (dev == MV78X00_Z0_DEV_ID) {
+                eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
+                eth_data->speed = SPEED_1000;
+                eth_data->duplex = DUPLEX_FULL;
+        }
+
         platform_device_register(&mv78xx0_ge10_shared);
         platform_device_register(&mv78xx0_ge10);
 }
@@ -484,13 +499,101 @@ static struct platform_device mv78xx0_ge11 = {
 
 void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
 {
+        u32 dev, rev;
+
         eth_data->shared = &mv78xx0_ge11_shared;
         mv78xx0_ge11.dev.platform_data = eth_data;
 
+        /*
+         * On the Z0, ge10 and ge11 are internally connected back
+         * to back, and not brought out.
+         */
+        mv78xx0_pcie_id(&dev, &rev);
+        if (dev == MV78X00_Z0_DEV_ID) {
+                eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
+                eth_data->speed = SPEED_1000;
+                eth_data->duplex = DUPLEX_FULL;
+        }
+
         platform_device_register(&mv78xx0_ge11_shared);
         platform_device_register(&mv78xx0_ge11);
 }
 
+/*****************************************************************************
+ * I2C bus 0
+ ****************************************************************************/
+
+static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = {
+        .freq_m         = 8, /* assumes 166 MHz TCLK */
+        .freq_n         = 3,
+        .timeout        = 1000, /* Default timeout of 1 second */
+};
+
+static struct resource mv78xx0_i2c_0_resources[] = {
+        {
+                .name   = "i2c 0 base",
+                .start  = I2C_0_PHYS_BASE,
+                .end    = I2C_0_PHYS_BASE + 0x1f,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "i2c 0 irq",
+                .start  = IRQ_MV78XX0_I2C_0,
+                .end    = IRQ_MV78XX0_I2C_0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+
+static struct platform_device mv78xx0_i2c_0 = {
+        .name           = MV64XXX_I2C_CTLR_NAME,
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(mv78xx0_i2c_0_resources),
+        .resource       = mv78xx0_i2c_0_resources,
+        .dev            = {
+                .platform_data  = &mv78xx0_i2c_0_pdata,
+        },
+};
+
+/*****************************************************************************
+ * I2C bus 1
+ ****************************************************************************/
+
+static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = {
+        .freq_m         = 8, /* assumes 166 MHz TCLK */
+        .freq_n         = 3,
+        .timeout        = 1000, /* Default timeout of 1 second */
+};
+
+static struct resource mv78xx0_i2c_1_resources[] = {
+        {
+                .name   = "i2c 1 base",
+                .start  = I2C_1_PHYS_BASE,
+                .end    = I2C_1_PHYS_BASE + 0x1f,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "i2c 1 irq",
+                .start  = IRQ_MV78XX0_I2C_1,
+                .end    = IRQ_MV78XX0_I2C_1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+
+static struct platform_device mv78xx0_i2c_1 = {
+        .name           = MV64XXX_I2C_CTLR_NAME,
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(mv78xx0_i2c_1_resources),
+        .resource       = mv78xx0_i2c_1_resources,
+        .dev            = {
+                .platform_data  = &mv78xx0_i2c_1_pdata,
+        },
+};
+
+void __init mv78xx0_i2c_init(void)
+{
+        platform_device_register(&mv78xx0_i2c_0);
+        platform_device_register(&mv78xx0_i2c_1);
+}
 
 /*****************************************************************************
  * SATA
@@ -719,6 +822,32 @@ struct sys_timer mv78xx0_timer = {
 /*****************************************************************************
  * General
  ****************************************************************************/
+static char * __init mv78xx0_id(void)
+{
+        u32 dev, rev;
+
+        mv78xx0_pcie_id(&dev, &rev);
+
+        if (dev == MV78X00_Z0_DEV_ID) {
+                if (rev == MV78X00_REV_Z0)
+                        return "MV78X00-Z0";
+                else
+                        return "MV78X00-Rev-Unsupported";
+        } else if (dev == MV78100_DEV_ID) {
+                if (rev == MV78100_REV_A0)
+                        return "MV78100-A0";
+                else
+                        return "MV78100-Rev-Unsupported";
+        } else if (dev == MV78200_DEV_ID) {
+                if (rev == MV78100_REV_A0)
+                        return "MV78200-A0";
+                else
+                        return "MV78200-Rev-Unsupported";
+        } else {
+                return "Device-Unknown";
+        }
+}
+
 static int __init is_l2_writethrough(void)
 {
         return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH);
@@ -737,7 +866,8 @@ void __init mv78xx0_init(void)
         get_pclk_l2clk(hclk, core_index, &pclk, &l2clk);
         tclk = get_tclk();
 
-        printk(KERN_INFO "MV78xx0 core #%d, ", core_index);
+        printk(KERN_INFO "%s ", mv78xx0_id());
+        printk("core #%d, ", core_index);
         printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000);
         printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000);
         printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000);
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 78af5de319dd..befc22475469 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -29,6 +29,8 @@ void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
 void mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
                                 int maj, int min);
 
+void mv78xx0_pcie_id(u32 *dev, u32 *rev);
+
 void mv78xx0_ehci0_init(void);
 void mv78xx0_ehci1_init(void);
 void mv78xx0_ehci2_init(void);
@@ -42,6 +44,7 @@ void mv78xx0_uart0_init(void);
 void mv78xx0_uart1_init(void);
 void mv78xx0_uart2_init(void);
 void mv78xx0_uart3_init(void);
+void mv78xx0_i2c_init(void);
 
 extern struct sys_timer mv78xx0_timer;
 
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 2e285bbb7bbd..efdabe04c69e 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -14,6 +14,7 @@
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
+#include <linux/i2c.h>
 #include <mach/mv78xx0.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,21 +29,22 @@ static struct mv643xx_eth_platform_data db78x00_ge01_data = {
 };
 
 static struct mv643xx_eth_platform_data db78x00_ge10_data = {
-        .phy_addr       = MV643XX_ETH_PHY_NONE,
-        .speed          = SPEED_1000,
-        .duplex         = DUPLEX_FULL,
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(10),
 };
 
 static struct mv643xx_eth_platform_data db78x00_ge11_data = {
-        .phy_addr       = MV643XX_ETH_PHY_NONE,
-        .speed          = SPEED_1000,
-        .duplex         = DUPLEX_FULL,
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
 };
 
 static struct mv_sata_platform_data db78x00_sata_data = {
         .n_ports        = 2,
 };
 
+static struct i2c_board_info __initdata db78x00_i2c_rtc = {
+        I2C_BOARD_INFO("ds1338", 0x68),
+};
+
+
 static void __init db78x00_init(void)
 {
         /*
@@ -64,6 +66,8 @@ static void __init db78x00_init(void)
                 mv78xx0_sata_init(&db78x00_sata_data);
                 mv78xx0_uart0_init();
                 mv78xx0_uart2_init();
+                mv78xx0_i2c_init();
+                i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
         } else {
                 mv78xx0_uart1_init();
                 mv78xx0_uart3_init();
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index e930ea5330a2..582cffc733ad 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -80,6 +80,18 @@
 #define  TIMER_VIRT_BASE        (BRIDGE_VIRT_BASE | 0x0300)
 
 /*
+ * Supported devices and revisions.
+ */
+#define MV78X00_Z0_DEV_ID       0x6381
+#define MV78X00_REV_Z0          1
+
+#define MV78100_DEV_ID          0x7810
+#define MV78100_REV_A0          1
+
+#define MV78200_DEV_ID          0x7820
+#define MV78200_REV_A0          1
+
+/*
  * Register Map
  */
 #define DDR_VIRT_BASE           (MV78XX0_REGS_VIRT_BASE | 0x00000)
@@ -90,6 +102,8 @@
 #define DEV_BUS_VIRT_BASE       (MV78XX0_REGS_VIRT_BASE | 0x10000)
 #define  SAMPLE_AT_RESET_LOW    (DEV_BUS_VIRT_BASE | 0x0030)
 #define  SAMPLE_AT_RESET_HIGH   (DEV_BUS_VIRT_BASE | 0x0034)
+#define  I2C_0_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x1000)
+#define  I2C_1_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x1100)
 #define  UART0_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x2000)
 #define  UART0_VIRT_BASE        (DEV_BUS_VIRT_BASE | 0x2000)
 #define  UART1_PHYS_BASE        (DEV_BUS_PHYS_BASE | 0x2100)
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index aad3a7a2f830..a560439dcc3c 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -33,6 +33,12 @@ static struct resource pcie_io_space;
 static struct resource pcie_mem_space;
 
 
+void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
+{
+        *dev = orion_pcie_dev_id((void __iomem *)PCIE00_VIRT_BASE);
+        *rev = orion_pcie_rev((void __iomem *)PCIE00_VIRT_BASE);
+}
+
 static void __init mv78xx0_pcie_preinit(void)
 {
         int i;
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
new file mode 100644
index 000000000000..e136b7a03355
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -0,0 +1,88 @@
+/*
+ * arch/arm/mach-mv78x00/rd78x00-masa-setup.c
+ *
+ * Marvell RD-78x00-mASA Development Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <mach/mv78xx0.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include "common.h"
+
+static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
+};
+
+static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(9),
+};
+
+static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = {
+};
+
+static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = {
+};
+
+static struct mv_sata_platform_data rd78x00_masa_sata_data = {
+        .n_ports        = 2,
+};
+
+static void __init rd78x00_masa_init(void)
+{
+        /*
+         * Basic MV78x00 setup. Needs to be called early.
+         */
+        mv78xx0_init();
+
+        /*
+         * Partition on-chip peripherals between the two CPU cores.
+         */
+        if (mv78xx0_core_index() == 0) {
+                mv78xx0_ehci0_init();
+                mv78xx0_ehci1_init();
+                mv78xx0_ge00_init(&rd78x00_masa_ge00_data);
+                mv78xx0_ge10_init(&rd78x00_masa_ge10_data);
+                mv78xx0_sata_init(&rd78x00_masa_sata_data);
+                mv78xx0_uart0_init();
+                mv78xx0_uart2_init();
+        } else {
+                mv78xx0_ehci2_init();
+                mv78xx0_ge01_init(&rd78x00_masa_ge01_data);
+                mv78xx0_ge11_init(&rd78x00_masa_ge11_data);
+                mv78xx0_uart1_init();
+                mv78xx0_uart3_init();
+        }
+}
+
+static int __init rd78x00_pci_init(void)
+{
+        /*
+         * Assign all PCIe devices to CPU core #0.
+         */
+        if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0)
+                mv78xx0_pcie_init(1, 1);
+
+        return 0;
+}
+subsys_initcall(rd78x00_pci_init);
+
+MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
+        /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
+        .phys_io        = MV78XX0_REGS_PHYS_BASE,
+        .io_pg_offst    = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = 0x00000100,
+        .init_machine   = rd78x00_masa_init,
+        .map_io         = mv78xx0_map_io,
+        .init_irq       = mv78xx0_init_irq,
+        .timer          = &mv78xx0_timer,
+MACHINE_END
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c
index 89738fe576b1..7ae229bc1b79 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mx1ads.c
@@ -23,6 +23,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include <mach/irqs.h>
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <mach/imx-uart.h>
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index ad312ccf2ec5..b70b1e65034b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -178,7 +178,9 @@ static int __init omap3_beagle_i2c_init(void)
 #ifdef CONFIG_I2C2_OMAP_BEAGLE
         omap_register_i2c_bus(2, 400, NULL, 0);
 #endif
-        omap_register_i2c_bus(3, 400, NULL, 0);
+        /* Bus 3 is attached to the DVI port where devices like the pico DLP
+         * projector don't work reliably with 400kHz */
+        omap_register_i2c_bus(3, 100, NULL, 0);
         return 0;
 }
 
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index f59a8d0e0824..2c7035d8dcbf 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -71,6 +71,7 @@ config MACH_WRT350N_V2
 
 config MACH_TS78XX
         bool "Technologic Systems TS-78xx"
+        select PM
         help
           Say 'Y' here if you want your kernel to support the
           Technologic Systems TS-78xx platform.
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0a623379789f..8a0e49d84256 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -431,6 +431,10 @@ void __init orion5x_uart1_init(void)
 /*****************************************************************************
  * XOR engine
  ****************************************************************************/
+struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
+        .dram           = &orion5x_mbus_dram_info,
+};
+
 static struct resource orion5x_xor_shared_resources[] = {
         {
                 .name   = "xor low",
@@ -448,6 +452,9 @@ static struct resource orion5x_xor_shared_resources[] = {
 static struct platform_device orion5x_xor_shared = {
         .name           = MV_XOR_SHARED_NAME,
         .id             = 0,
+        .dev            = {
+                .platform_data  = &orion5x_xor_shared_data,
+        },
         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
         .resource       = orion5x_xor_shared_resources,
 };
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 0722d6510df1..b31ca4cef365 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -76,7 +76,7 @@ static int __init dns323_dev_id(void)
 
 static int __init dns323_pci_init(void)
 {
-        /* The 5182 doesn't really use it's PCI bus, and initialising PCI
+        /* The 5182 doesn't really use its PCI bus, and initialising PCI
          * gets in the way of initialising the SATA controller.
          */
         if (machine_is_dns323() && dns323_dev_id() != MV88F5182_DEV_ID)
@@ -418,7 +418,7 @@ static void __init dns323_init(void)
         orion5x_i2c_init();
         orion5x_uart0_init();
 
-        /* The 5182 has it's SATA controller on-chip, and needs it's own little
+        /* The 5182 has its SATA controller on-chip, and needs its own little
          * init routine.
          */
         if (dns323_dev_id() == MV88F5182_DEV_ID)
diff --git a/arch/arm/mach-orion5x/ts78xx-fpga.h b/arch/arm/mach-orion5x/ts78xx-fpga.h
new file mode 100644
index 000000000000..0a314ddef658
--- /dev/null
+++ b/arch/arm/mach-orion5x/ts78xx-fpga.h
@@ -0,0 +1,29 @@
+#define FPGAID(_magic, _rev) ((_magic << 8) + _rev)
+
+/*
+ * get yer id's from http://ts78xx.digriz.org.uk/
+ * do *not* make up your own or 'borrow' any!
+ */
+enum fpga_ids {
+        /* Technologic Systems */
+        TS7800_REV_B2 = FPGAID(0x00b480, 0x02),
+        TS7800_REV_B3 = FPGAID(0x00b480, 0x03),
+};
+
+struct fpga_device {
+        unsigned                present:1;
+        unsigned                init:1;
+};
+
+struct fpga_devices {
+        /* Technologic Systems */
+        struct fpga_device      ts_rtc;
+        struct fpga_device      ts_nand;
+};
+
+struct ts78xx_fpga_data {
+        unsigned int            id;
+        int                     state;
+
+        struct fpga_devices     supports;
+};
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 1368e9fd1a06..f5191ddea085 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -10,17 +10,20 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/sysfs.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ata_platform.h>
 #include <linux/m48t86.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
+#include "ts78xx-fpga.h"
 
 /*****************************************************************************
  * TS-78xx Info
@@ -33,18 +36,11 @@
 #define TS78XX_FPGA_REGS_VIRT_BASE      0xff900000
 #define TS78XX_FPGA_REGS_SIZE           SZ_1M
 
-#define TS78XX_FPGA_REGS_SYSCON_ID      (TS78XX_FPGA_REGS_VIRT_BASE | 0x000)
-#define TS78XX_FPGA_REGS_SYSCON_LCDI    (TS78XX_FPGA_REGS_VIRT_BASE | 0x004)
-#define TS78XX_FPGA_REGS_SYSCON_LCDO    (TS78XX_FPGA_REGS_VIRT_BASE | 0x008)
-
-#define TS78XX_FPGA_REGS_RTC_CTRL       (TS78XX_FPGA_REGS_VIRT_BASE | 0x808)
-#define TS78XX_FPGA_REGS_RTC_DATA       (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c)
-
-/*
- * 512kB NOR flash Device
- */
-#define TS78XX_NOR_BOOT_BASE            0xff800000
-#define TS78XX_NOR_BOOT_SIZE            SZ_512K
+static struct ts78xx_fpga_data ts78xx_fpga = {
+        .id             = 0,
+        .state          = 1,
+/*      .supports       = ... - populated by ts78xx_fpga_supports() */
+};
 
 /*****************************************************************************
  * I/O Address Mapping
@@ -65,73 +61,47 @@ void __init ts78xx_map_io(void)
 }
 
 /*****************************************************************************
- * 512kB NOR Boot Flash - the chip is a M25P40
+ * Ethernet
  ****************************************************************************/
-static struct mtd_partition ts78xx_nor_boot_flash_resources[] = {
-        {
-                .name           = "ts-bootrom",
-                .offset         = 0,
-                /* only the first 256kB is used */
-                .size           = SZ_256K,
-                .mask_flags     = MTD_WRITEABLE,
-        },
-};
-
-static struct physmap_flash_data ts78xx_nor_boot_flash_data = {
-        .width          = 1,
-        .parts          = ts78xx_nor_boot_flash_resources,
-        .nr_parts       = ARRAY_SIZE(ts78xx_nor_boot_flash_resources),
-};
-
-static struct resource ts78xx_nor_boot_flash_resource = {
-        .flags          = IORESOURCE_MEM,
-        .start          = TS78XX_NOR_BOOT_BASE,
-        .end            = TS78XX_NOR_BOOT_BASE + TS78XX_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device ts78xx_nor_boot_flash = {
-        .name           = "physmap-flash",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &ts78xx_nor_boot_flash_data,
-        },
-        .num_resources  = 1,
-        .resource       = &ts78xx_nor_boot_flash_resource,
+static struct mv643xx_eth_platform_data ts78xx_eth_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
 };
 
 /*****************************************************************************
- * Ethernet
+ * SATA
  ****************************************************************************/
-static struct mv643xx_eth_platform_data ts78xx_eth_data = {
-        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+static struct mv_sata_platform_data ts78xx_sata_data = {
+        .n_ports        = 2,
 };
 
 /*****************************************************************************
  * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
  ****************************************************************************/
-#ifdef CONFIG_RTC_DRV_M48T86
-static unsigned char ts78xx_rtc_readbyte(unsigned long addr)
+#define TS_RTC_CTRL     (TS78XX_FPGA_REGS_VIRT_BASE | 0x808)
+#define TS_RTC_DATA     (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c)
+
+static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr)
 {
-        writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL);
-        return readb(TS78XX_FPGA_REGS_RTC_DATA);
+        writeb(addr, TS_RTC_CTRL);
+        return readb(TS_RTC_DATA);
 }
 
-static void ts78xx_rtc_writebyte(unsigned char value, unsigned long addr)
+static void ts78xx_ts_rtc_writebyte(unsigned char value, unsigned long addr)
 {
-        writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL);
-        writeb(value, TS78XX_FPGA_REGS_RTC_DATA);
+        writeb(addr, TS_RTC_CTRL);
+        writeb(value, TS_RTC_DATA);
 }
 
-static struct m48t86_ops ts78xx_rtc_ops = {
-        .readbyte       = ts78xx_rtc_readbyte,
-        .writebyte      = ts78xx_rtc_writebyte,
+static struct m48t86_ops ts78xx_ts_rtc_ops = {
+        .readbyte       = ts78xx_ts_rtc_readbyte,
+        .writebyte      = ts78xx_ts_rtc_writebyte,
 };
 
-static struct platform_device ts78xx_rtc_device = {
+static struct platform_device ts78xx_ts_rtc_device = {
         .name           = "rtc-m48t86",
         .id             = -1,
         .dev            = {
-                .platform_data  = &ts78xx_rtc_ops,
+                .platform_data  = &ts78xx_ts_rtc_ops,
         },
         .num_resources  = 0,
 };
@@ -146,59 +116,311 @@ static struct platform_device ts78xx_rtc_device = {
  * TODO: track down a guinea pig without an RTC to see if we can work out a
  *              better RTC detection routine
  */
-static int __init ts78xx_rtc_init(void)
+static int ts78xx_ts_rtc_load(void)
 {
+        int rc;
         unsigned char tmp_rtc0, tmp_rtc1;
 
-        tmp_rtc0 = ts78xx_rtc_readbyte(126);
-        tmp_rtc1 = ts78xx_rtc_readbyte(127);
-
-        ts78xx_rtc_writebyte(0x00, 126);
-        ts78xx_rtc_writebyte(0x55, 127);
-        if (ts78xx_rtc_readbyte(127) == 0x55) {
-                ts78xx_rtc_writebyte(0xaa, 127);
-                if (ts78xx_rtc_readbyte(127) == 0xaa
-                                && ts78xx_rtc_readbyte(126) == 0x00) {
-                        ts78xx_rtc_writebyte(tmp_rtc0, 126);
-                        ts78xx_rtc_writebyte(tmp_rtc1, 127);
-                        platform_device_register(&ts78xx_rtc_device);
-                        return 1;
+        tmp_rtc0 = ts78xx_ts_rtc_readbyte(126);
+        tmp_rtc1 = ts78xx_ts_rtc_readbyte(127);
+
+        ts78xx_ts_rtc_writebyte(0x00, 126);
+        ts78xx_ts_rtc_writebyte(0x55, 127);
+        if (ts78xx_ts_rtc_readbyte(127) == 0x55) {
+                ts78xx_ts_rtc_writebyte(0xaa, 127);
+                if (ts78xx_ts_rtc_readbyte(127) == 0xaa
+                                && ts78xx_ts_rtc_readbyte(126) == 0x00) {
+                        ts78xx_ts_rtc_writebyte(tmp_rtc0, 126);
+                        ts78xx_ts_rtc_writebyte(tmp_rtc1, 127);
+
+                        if (ts78xx_fpga.supports.ts_rtc.init == 0) {
+                                rc = platform_device_register(&ts78xx_ts_rtc_device);
+                                if (!rc)
+                                        ts78xx_fpga.supports.ts_rtc.init = 1;
+                        } else
+                                rc = platform_device_add(&ts78xx_ts_rtc_device);
+
+                        return rc;
                 }
         }
 
-        return 0;
+        return -ENODEV;
 };
-#else
-static int __init ts78xx_rtc_init(void)
+
+static void ts78xx_ts_rtc_unload(void)
 {
-        return 0;
+        platform_device_del(&ts78xx_ts_rtc_device);
 }
-#endif
 
 /*****************************************************************************
- * SATA
+ * NAND Flash
  ****************************************************************************/
-static struct mv_sata_platform_data ts78xx_sata_data = {
-        .n_ports        = 2,
+#define TS_NAND_CTRL    (TS78XX_FPGA_REGS_VIRT_BASE | 0x800)    /* VIRT */
+#define TS_NAND_DATA    (TS78XX_FPGA_REGS_PHYS_BASE | 0x804)    /* PHYS */
+
+/*
+ * hardware specific access to control-lines
+ *
+ * ctrl:
+ * NAND_NCE: bit 0 -> bit 2
+ * NAND_CLE: bit 1 -> bit 1
+ * NAND_ALE: bit 2 -> bit 0
+ */
+static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+                        unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+
+        if (ctrl & NAND_CTRL_CHANGE) {
+                unsigned char bits;
+
+                bits = (ctrl & NAND_NCE) << 2;
+                bits |= ctrl & NAND_CLE;
+                bits |= (ctrl & NAND_ALE) >> 2;
+
+                writeb((readb(TS_NAND_CTRL) & ~0x7) | bits, TS_NAND_CTRL);
+        }
+
+        if (cmd != NAND_CMD_NONE)
+                writeb(cmd, this->IO_ADDR_W);
+}
+
+static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd)
+{
+        return readb(TS_NAND_CTRL) & 0x20;
+}
+
+const char *ts_nand_part_probes[] = { "cmdlinepart", NULL };
+
+static struct mtd_partition ts78xx_ts_nand_parts[] = {
+        {
+                .name           = "mbr",
+                .offset         = 0,
+                .size           = SZ_128K,
+                .mask_flags     = MTD_WRITEABLE,
+        }, {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_4M,
+        }, {
+                .name           = "initrd",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_4M,
+        }, {
+                .name           = "rootfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        }
 };
 
+static struct platform_nand_data ts78xx_ts_nand_data = {
+        .chip   = {
+                .part_probe_types       = ts_nand_part_probes,
+                .partitions             = ts78xx_ts_nand_parts,
+                .nr_partitions          = ARRAY_SIZE(ts78xx_ts_nand_parts),
+                .chip_delay             = 15,
+                .options                = NAND_USE_FLASH_BBT,
+        },
+        .ctrl   = {
+                /*
+                 * The HW ECC offloading functions, used to give about a 9%
+                 * performance increase for 'dd if=/dev/mtdblockX' and 5% for
+                 * nanddump.  This all however was changed by git commit
+                 * e6cf5df1838c28bb060ac45b5585e48e71bbc740 so now there is
+                 * no performance advantage to be had so we no longer bother
+                 */
+                .cmd_ctrl               = ts78xx_ts_nand_cmd_ctrl,
+                .dev_ready              = ts78xx_ts_nand_dev_ready,
+        },
+};
+
+static struct resource ts78xx_ts_nand_resources = {
+        .start          = TS_NAND_DATA,
+        .end            = TS_NAND_DATA + 4,
+        .flags          = IORESOURCE_IO,
+};
+
+static struct platform_device ts78xx_ts_nand_device = {
+        .name           = "gen_nand",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &ts78xx_ts_nand_data,
+        },
+        .resource       = &ts78xx_ts_nand_resources,
+        .num_resources  = 1,
+};
+
+static int ts78xx_ts_nand_load(void)
+{
+        int rc;
+
+        if (ts78xx_fpga.supports.ts_nand.init == 0) {
+                rc = platform_device_register(&ts78xx_ts_nand_device);
+                if (!rc)
+                        ts78xx_fpga.supports.ts_nand.init = 1;
+        } else
+                rc = platform_device_add(&ts78xx_ts_nand_device);
+
+        return rc;
+};
+
+static void ts78xx_ts_nand_unload(void)
+{
+        platform_device_del(&ts78xx_ts_nand_device);
+}
+
 /*****************************************************************************
- * print some information regarding the board
+ * FPGA 'hotplug' support code
  ****************************************************************************/
-static void __init ts78xx_print_board_id(void)
+static void ts78xx_fpga_devices_zero_init(void)
 {
-        unsigned int board_info;
-
-        board_info = readl(TS78XX_FPGA_REGS_SYSCON_ID);
-        printk(KERN_INFO "TS-78xx Info: FPGA rev=%.2x, Board Magic=%.6x, ",
-                                board_info & 0xff,
-                                (board_info >> 8) & 0xffffff);
-        board_info = readl(TS78XX_FPGA_REGS_SYSCON_LCDI);
-        printk("JP1=%d, JP2=%d\n",
-                                (board_info >> 30) & 0x1,
-                                (board_info >> 31) & 0x1);
+        ts78xx_fpga.supports.ts_rtc.init = 0;
+        ts78xx_fpga.supports.ts_nand.init = 0;
+}
+
+static void ts78xx_fpga_supports(void)
+{
+        /* TODO: put this 'table' into ts78xx-fpga.h */
+        switch (ts78xx_fpga.id) {
+        case TS7800_REV_B2:
+        case TS7800_REV_B3:
+                ts78xx_fpga.supports.ts_rtc.present = 1;
+                ts78xx_fpga.supports.ts_nand.present = 1;
+                break;
+        default:
+                ts78xx_fpga.supports.ts_rtc.present = 0;
+                ts78xx_fpga.supports.ts_nand.present = 0;
+        }
+}
+
+static int ts78xx_fpga_load_devices(void)
+{
+        int tmp, ret = 0;
+
+        if (ts78xx_fpga.supports.ts_rtc.present == 1) {
+                tmp = ts78xx_ts_rtc_load();
+                if (tmp) {
+                        printk(KERN_INFO "TS-78xx: RTC not registered\n");
+                        ts78xx_fpga.supports.ts_rtc.present = 0;
+                }
+                ret |= tmp;
+        }
+        if (ts78xx_fpga.supports.ts_nand.present == 1) {
+                tmp = ts78xx_ts_nand_load();
+                if (tmp) {
+                        printk(KERN_INFO "TS-78xx: NAND not registered\n");
+                        ts78xx_fpga.supports.ts_nand.present = 0;
+                }
+                ret |= tmp;
+        }
+
+        return ret;
+}
+
+static int ts78xx_fpga_unload_devices(void)
+{
+        int ret = 0;
+
+        if (ts78xx_fpga.supports.ts_rtc.present == 1)
+                ts78xx_ts_rtc_unload();
+        if (ts78xx_fpga.supports.ts_nand.present == 1)
+                ts78xx_ts_nand_unload();
+
+        return ret;
+}
+
+static int ts78xx_fpga_load(void)
+{
+        ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
+
+        printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
+                        (ts78xx_fpga.id >> 8) & 0xffffff,
+                        ts78xx_fpga.id & 0xff);
+
+        ts78xx_fpga_supports();
+
+        if (ts78xx_fpga_load_devices()) {
+                ts78xx_fpga.state = -1;
+                return -EBUSY;
+        }
+
+        return 0;
 };
 
+static int ts78xx_fpga_unload(void)
+{
+        unsigned int fpga_id;
+
+        fpga_id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
+
+        /*
+         * There does not seem to be a feasible way to block access to the GPIO
+         * pins from userspace (/dev/mem).  This if clause should hopefully warn
+         * those foolish enough not to follow 'policy' :)
+         *
+         * UrJTAG SVN since r1381 can be used to reprogram the FPGA
+         */
+        if (ts78xx_fpga.id != fpga_id) {
+                printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n"
+                        "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
+                        (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
+                        (fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
+                ts78xx_fpga.state = -1;
+                return -EBUSY;
+        }
+
+        if (ts78xx_fpga_unload_devices()) {
+                ts78xx_fpga.state = -1;
+                return -EBUSY;
+        }
+
+        return 0;
+};
+
+static ssize_t ts78xx_fpga_show(struct kobject *kobj,
+                        struct kobj_attribute *attr, char *buf)
+{
+        if (ts78xx_fpga.state < 0)
+                return sprintf(buf, "borked\n");
+
+        return sprintf(buf, "%s\n", (ts78xx_fpga.state) ? "online" : "offline");
+}
+
+static ssize_t ts78xx_fpga_store(struct kobject *kobj,
+                        struct kobj_attribute *attr, const char *buf, size_t n)
+{
+        int value, ret;
+
+        if (ts78xx_fpga.state < 0) {
+                printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n");
+                return -EBUSY;
+        }
+
+        if (strncmp(buf, "online", sizeof("online") - 1) == 0)
+                value = 1;
+        else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
+                value = 0;
+        else {
+                printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n");
+                return -EINVAL;
+        }
+
+        if (ts78xx_fpga.state == value)
+                return n;
+
+        ret = (ts78xx_fpga.state == 0)
+                ? ts78xx_fpga_load()
+                : ts78xx_fpga_unload();
+
+        if (!(ret < 0))
+                ts78xx_fpga.state = value;
+
+        return n;
+}
+
+static struct kobj_attribute ts78xx_fpga_attr =
+        __ATTR(ts78xx_fpga, 0644, ts78xx_fpga_show, ts78xx_fpga_store);
+
 /*****************************************************************************
  * General Setup
  ****************************************************************************/
@@ -223,30 +445,29 @@ static struct orion5x_mpp_mode ts78xx_mpp_modes[] __initdata = {
         { 17, MPP_UART },
         { 18, MPP_UART },
         { 19, MPP_UART },
+        /*
+         * MPP[20] PCI Clock Out 1
+         * MPP[21] PCI Clock Out 0
+         * MPP[22] Unused
+         * MPP[23] Unused
+         * MPP[24] Unused
+         * MPP[25] Unused
+         */
         { -1 },
 };
 
 static void __init ts78xx_init(void)
 {
+        int ret;
+
         /*
          * Setup basic Orion functions. Need to be called early.
          */
         orion5x_init();
 
-        ts78xx_print_board_id();
-
         orion5x_mpp_conf(ts78xx_mpp_modes);
 
         /*
-         * MPP[20] PCI Clock Out 1
-         * MPP[21] PCI Clock Out 0
-         * MPP[22] Unused
-         * MPP[23] Unused
-         * MPP[24] Unused
-         * MPP[25] Unused
-         */
-
-        /*
          * Configure peripherals.
          */
         orion5x_ehci0_init();
@@ -257,12 +478,12 @@ static void __init ts78xx_init(void)
         orion5x_uart1_init();
         orion5x_xor_init();
 
-        orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE,
-                                   TS78XX_NOR_BOOT_SIZE);
-        platform_device_register(&ts78xx_nor_boot_flash);
-
-        if (!ts78xx_rtc_init())
-                printk(KERN_INFO "TS-78xx RTC not detected or enabled\n");
+        /* FPGA init */
+        ts78xx_fpga_devices_zero_init();
+        ret = ts78xx_fpga_load();
+        ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
+        if (ret)
+                printk(KERN_ERR "sysfs_create_file failed: %d\n", ret);
 }
 
 MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 3c4d47145c83..25f7935576f8 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -129,7 +129,7 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 };
 
-struct map_desc smdk6410_iodesc[] = {};
+static struct map_desc smdk6410_iodesc[] = {};
 
 static struct platform_device *smdk6410_devices[] __initdata = {
 #ifdef CONFIG_SMDK6410_SD_CH0
@@ -146,7 +146,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
 
 static struct i2c_board_info i2c_devs0[] __initdata = {
         { I2C_BOARD_INFO("24c08", 0x50), },
-        { I2C_BOARD_INFO("WM8580", 0X1b), },
+        { I2C_BOARD_INFO("wm8580", 0x1b), },
 };
 
 static struct i2c_board_info i2c_devs1[] __initdata = {
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index c3ba6a94da0c..70997d5bee2d 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -13,7 +13,7 @@
 #include <linux/init.h>
 #include <linux/highmem.h>
 
-static void __attribute__((naked))
+static void __naked
 feroceon_copy_user_page(void *kto, const void *kfrom)
 {
         asm("\
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
index 70ed96c8af8e..de9c06854ad7 100644
--- a/arch/arm/mm/copypage-v3.c
+++ b/arch/arm/mm/copypage-v3.c
@@ -15,7 +15,7 @@
  *
  * FIXME: do we need to handle cache stuff...
  */
-static void __attribute__((naked))
+static void __naked
 v3_copy_user_page(void *kto, const void *kfrom)
 {
         asm("\n\
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 1601698b9800..7370a7142b04 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -44,7 +44,7 @@ static DEFINE_SPINLOCK(minicache_lock);
  * instruction.  If your processor does not supply this, you have to write your
  * own copy_user_highpage that does the right thing.
  */
-static void __attribute__((naked))
+static void __naked
 mc_copy_user_page(void *from, void *to)
 {
         asm volatile(
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
index 3ec93dab7656..9ab098414227 100644
--- a/arch/arm/mm/copypage-v4wb.c
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -22,7 +22,7 @@
  * instruction.  If your processor does not supply this, you have to write your
  * own copy_user_highpage that does the right thing.
  */
-static void __attribute__((naked))
+static void __naked
 v4wb_copy_user_page(void *kto, const void *kfrom)
 {
         asm("\
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index 0f1188efae45..300efafd6643 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -20,7 +20,7 @@
  * dirty data in the cache.  However, we do have to ensure that
  * subsequent reads are up to date.
  */
-static void __attribute__((naked))
+static void __naked
 v4wt_copy_user_page(void *kto, const void *kfrom)
 {
         asm("\
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
index 39a994542cad..bc4525f5ab23 100644
--- a/arch/arm/mm/copypage-xsc3.c
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -29,7 +29,7 @@
  * if we eventually end up using our copied page.
  *
  */
-static void __attribute__((naked))
+static void __naked
 xsc3_mc_copy_user_page(void *kto, const void *kfrom)
 {
         asm("\
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index d18f2397ee2d..76824d3e966a 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
  * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
  * and merged as appropriate.
  */
-static void __attribute__((naked))
+static void __naked
 mc_copy_user_page(void *from, void *to)
 {
         /*
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index deaff58878a2..04a100cfb8e5 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
 obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
 obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
-obj-$(CONFIG_I2C_OMAP) += i2c.o
+i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
+obj-y += $(i2c-omap-m) $(i2c-omap-y)
 
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 187239c054c9..d1797147732f 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -200,20 +200,16 @@ static struct clocksource clocksource_32k = {
 };
 
 /*
- * Rounds down to nearest nsec.
- */
-unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
-{
-        return cyc2ns(&clocksource_32k, ticks_32k);
-}
-
-/*
  * Returns current time from boot in nsecs. It's OK for this to wrap
  * around for now, as it's just a relative time stamp.
  */
 unsigned long long sched_clock(void)
 {
-        return omap_32k_ticks_to_nsecs(omap_32k_read());
+        unsigned long long ret;
+
+        ret = (unsigned long long)omap_32k_read();
+        ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
+        return ret;
 }
 
 static int __init omap_init_clocksource_32k(void)
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index f3444a66a57e..0ecf36deb17b 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -35,7 +35,7 @@ extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
 extern void omap_serial_init(void);
 extern void omap_serial_enable_clocks(int enable);
-#ifdef CONFIG_I2C_OMAP
+#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
                                  struct i2c_board_info const *info,
                                  unsigned len);
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index ca81830b4f86..ce6ee7927537 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -108,7 +108,7 @@
         !defined(CONFIG_ARCH_OMAP15XX) && \
         !defined(CONFIG_ARCH_OMAP16XX) && \
         !defined(CONFIG_ARCH_OMAP24XX)
-#error "Power management for this processor not implemented yet"
+#warning "Power management for this processor not implemented yet"
 #endif
 
 #ifndef __ASSEMBLER__
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 0d12c2164766..32eb9e33bebb 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -19,7 +19,8 @@
 
 static DEFINE_SPINLOCK(gpio_lock);
 static const char *gpio_label[GPIO_MAX];  /* non null for allocated GPIOs */
-static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
 
 static inline void __set_direction(unsigned pin, int input)
 {
@@ -53,7 +54,7 @@ int gpio_direction_input(unsigned pin)
 {
         unsigned long flags;
 
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid_input)) {
                 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
                 return -EINVAL;
         }
@@ -83,7 +84,7 @@ int gpio_direction_output(unsigned pin, int value)
         unsigned long flags;
         u32 u;
 
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid_output)) {
                 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
                 return -EINVAL;
         }
@@ -161,7 +162,9 @@ int gpio_request(unsigned pin, const char *label)
         unsigned long flags;
         int ret;
 
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+        if (pin >= GPIO_MAX ||
+            !(test_bit(pin, gpio_valid_input) ||
+              test_bit(pin, gpio_valid_output))) {
                 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
                 return -EINVAL;
         }
@@ -183,7 +186,9 @@ EXPORT_SYMBOL(gpio_request);
 
 void gpio_free(unsigned pin)
 {
-        if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
+        if (pin >= GPIO_MAX ||
+            !(test_bit(pin, gpio_valid_input) ||
+              test_bit(pin, gpio_valid_output))) {
                 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
                 return;
         }
@@ -208,12 +213,18 @@ void __init orion_gpio_set_unused(unsigned pin)
         __set_direction(pin, 0);
 }
 
-void __init orion_gpio_set_valid(unsigned pin, int valid)
+void __init orion_gpio_set_valid(unsigned pin, int mode)
 {
-        if (valid)
-                __set_bit(pin, gpio_valid);
+        if (mode == 1)
+                mode = GPIO_INPUT_OK | GPIO_OUTPUT_OK;
+        if (mode & GPIO_INPUT_OK)
+                __set_bit(pin, gpio_valid_input);
         else
-                __clear_bit(pin, gpio_valid);
+                __clear_bit(pin, gpio_valid_input);
+        if (mode & GPIO_OUTPUT_OK)
+                __set_bit(pin, gpio_valid_output);
+        else
+                __clear_bit(pin, gpio_valid_output);
 }
 
 void orion_gpio_set_blink(unsigned pin, int blink)
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index ec743e82c876..33f6c6aec185 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -25,9 +25,13 @@ void gpio_set_value(unsigned pin, int value);
  * Orion-specific GPIO API extensions.
  */
 void orion_gpio_set_unused(unsigned pin);
-void orion_gpio_set_valid(unsigned pin, int valid);
 void orion_gpio_set_blink(unsigned pin, int blink);
 
+#define GPIO_BIDI_OK            (1 << 0)
+#define GPIO_INPUT_OK           (1 << 1)
+#define GPIO_OUTPUT_OK          (1 << 2)
+void orion_gpio_set_valid(unsigned pin, int mode);
+
 /*
  * GPIO interrupt handling.
  */
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
new file mode 100644
index 000000000000..14ca88676002
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/mvsdio.h
@@ -0,0 +1,21 @@
+/*
+ * arch/arm/plat-orion/include/plat/mvsdio.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MACH_MVSDIO_H
+#define __MACH_MVSDIO_H
+
+#include <linux/mbus.h>
+
+struct mvsdio_platform_data {
+        struct mbus_dram_target_info *dram;
+        unsigned int clock;
+        int gpio_card_detect;
+        int gpio_write_protect;
+};
+
+#endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
index 136c982c68e1..ad1b9682c9c3 100644
--- a/arch/arm/plat-s3c64xx/clock.c
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -248,7 +248,7 @@ static struct clk *clks[] __initdata = {
         &clk_48m,
 };
 
-void s3c64xx_register_clocks(void)
+void __init s3c64xx_register_clocks(void)
 {
         struct clk *clkp;
         int ret;
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index cc62941d7b5c..ee9188add8fb 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -417,4 +417,4 @@ static __init int s3c64xx_gpiolib_init(void)
         return 0;
 }
 
-arch_initcall(s3c64xx_gpiolib_init);
+core_initcall(s3c64xx_gpiolib_init);
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 2846f550b727..f865bf4d709e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -117,7 +117,7 @@
 #define IRQ_ONENAND1            S3C64XX_IRQ_VIC1(12)
 #define IRQ_NFC                 S3C64XX_IRQ_VIC1(13)
 #define IRQ_CFCON               S3C64XX_IRQ_VIC1(14)
-#define IRQ_UHOST               S3C64XX_IRQ_VIC1(15)
+#define IRQ_USBH                S3C64XX_IRQ_VIC1(15)
 #define IRQ_SPI0                S3C64XX_IRQ_VIC1(16)
 #define IRQ_SPI1                S3C64XX_IRQ_VIC1(17)
 #define IRQ_IIC                 S3C64XX_IRQ_VIC1(18)
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index ebb305ce7689..cf524826c93a 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -14,12 +14,15 @@
 
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/gpio.h>
 #include <linux/irq.h>
 #include <linux/io.h>
 
 #include <asm/hardware/vic.h>
 
 #include <plat/regs-irqtype.h>
+#include <plat/regs-gpio.h>
+#include <plat/gpio-cfg.h>
 
 #include <mach/map.h>
 #include <plat/cpu.h>
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
 static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
 {
         int offs = eint_offset(irq);
+        int pin;
         int shift;
         u32 ctrl, mask;
         u32 newvalue = 0;
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
         ctrl |= newvalue << shift;
         __raw_writel(ctrl, reg);
 
+        /* set the GPIO pin appropriately */
+
+        if (offs < 23)
+                pin = S3C64XX_GPN(offs);
+        else
+                pin = S3C64XX_GPM(offs - 23);
+
+        s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
+
         return 0;
 }
 
@@ -181,7 +194,7 @@ static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
         s3c_irq_demux_eint(20, 27);
 }
 
-int __init s3c64xx_init_irq_eint(void)
+static int __init s3c64xx_init_irq_eint(void)
 {
         int irq;
 
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index a94f1d5e819d..f22edf7c2d2d 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -207,7 +207,7 @@ static struct irq_chip s3c_irq_uart = {
 
 static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
 {
-        void *reg_base = uirq->regs;
+        void __iomem *reg_base = uirq->regs;
         unsigned int irq;
         int offs;
 
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 8d9a0cada668..05b17528041e 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -36,7 +36,7 @@
  * ext_xtal_mux for want of an actual name from the manual.
 */
 
-struct clk clk_ext_xtal_mux = {
+static struct clk clk_ext_xtal_mux = {
         .name           = "ext_xtal",
         .id             = -1,
 };
@@ -63,7 +63,7 @@ struct clksrc_clk {
         void __iomem            *reg_divider;
 };
 
-struct clk clk_fout_apll = {
+static struct clk clk_fout_apll = {
         .name           = "fout_apll",
         .id             = -1,
 };
@@ -78,7 +78,7 @@ static struct clk_sources clk_src_apll = {
         .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
 };
 
-struct clksrc_clk clk_mout_apll = {
+static struct clksrc_clk clk_mout_apll = {
         .clk    = {
                 .name           = "mout_apll",
                 .id             = -1,
@@ -88,7 +88,7 @@ struct clksrc_clk clk_mout_apll = {
         .sources        = &clk_src_apll,
 };
 
-struct clk clk_fout_epll = {
+static struct clk clk_fout_epll = {
         .name           = "fout_epll",
         .id             = -1,
 };
@@ -103,7 +103,7 @@ static struct clk_sources clk_src_epll = {
         .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
 };
 
-struct clksrc_clk clk_mout_epll = {
+static struct clksrc_clk clk_mout_epll = {
         .clk    = {
                 .name           = "mout_epll",
                 .id             = -1,
@@ -123,7 +123,7 @@ static struct clk_sources clk_src_mpll = {
         .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
 };
 
-struct clksrc_clk clk_mout_mpll = {
+static struct clksrc_clk clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
                 .id             = -1,
@@ -145,7 +145,7 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
         return rate;
 }
 
-struct clk clk_dout_mpll = {
+static struct clk clk_dout_mpll = {
         .name           = "dout_mpll",
         .id             = -1,
         .parent         = &clk_mout_mpll.clk,
@@ -189,10 +189,10 @@ static struct clk_sources clkset_uart = {
 };
 
 static struct clk *clkset_uhost_list[] = {
+        &clk_48m,
         &clk_mout_epll.clk,
         &clk_dout_mpll,
         &clk_fin_epll,
-        &clk_48m,
 };
 
 static struct clk_sources clkset_uhost = {
@@ -239,10 +239,12 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
 
         rate = clk_round_rate(clk, rate);
         div = clk_get_rate(clk->parent) / rate;
+        if (div > 16)
+                return -EINVAL;
 
         val = __raw_readl(reg);
-        val &= ~sclk->mask;
-        val |= (rate - 1) << sclk->shift;
+        val &= ~(0xf << sclk->shift);
+        val |= (div - 1) << sclk->shift;
         __raw_writel(val, reg);
 
         return 0;
@@ -351,7 +353,7 @@ static struct clksrc_clk clk_mmc2 = {
 
 static struct clksrc_clk clk_usbhost = {
         .clk    = {
-                .name           = "usb-host-bus",
+                .name           = "usb-bus-host",
                 .id             = -1,
                 .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
                 .enable         = s3c64xx_sclk_ctrl,
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index fd23c0e9e698..b4211d8b2ac7 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Sun Nov 30 16:39:36 2008
+# Last update: Thu Mar 12 18:01:45 2009
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1811,7 +1811,7 @@ pilz_pmi5		MACH_PILZ_PMI5		PILZ_PMI5		1820
 jade                    MACH_JADE               JADE                    1821
 ks8695_softplc          MACH_KS8695_SOFTPLC     KS8695_SOFTPLC          1822
 gprisc3                 MACH_GPRISC3            GPRISC3                 1823
-stamp9260               MACH_STAMP9260          STAMP9260               1824
+stamp9g20               MACH_STAMP9G20          STAMP9G20               1824
 smdk6430                MACH_SMDK6430           SMDK6430                1825
 smdkc100                MACH_SMDKC100           SMDKC100                1826
 tavorevb                MACH_TAVOREVB           TAVOREVB                1827
@@ -1993,4 +1993,134 @@ spark			MACH_SPARK		SPARK			2002
 benzina                 MACH_BENZINA            BENZINA                 2003
 blaze                   MACH_BLAZE              BLAZE                   2004
 linkstation_ls_hgl      MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL      2005
-htcvenus                MACH_HTCVENUS           HTCVENUS                2006
+htckovsky               MACH_HTCVENUS           HTCVENUS                2006
+sony_prs505             MACH_SONY_PRS505        SONY_PRS505             2007
+hanlin_v3               MACH_HANLIN_V3          HANLIN_V3               2008
+sapphira                MACH_SAPPHIRA           SAPPHIRA                2009
+dack_sda_01             MACH_DACK_SDA_01        DACK_SDA_01             2010
+armbox                  MACH_ARMBOX             ARMBOX                  2011
+harris_rvp              MACH_HARRIS_RVP         HARRIS_RVP              2012
+ribaldo                 MACH_RIBALDO            RIBALDO                 2013
+agora                   MACH_AGORA              AGORA                   2014
+omap3_mini              MACH_OMAP3_MINI         OMAP3_MINI              2015
+a9sam6432_b             MACH_A9SAM6432_B        A9SAM6432_B             2016
+usg2410                 MACH_USG2410            USG2410                 2017
+pc72052_i10_revb        MACH_PC72052_I10_REVB   PC72052_I10_REVB        2018
+mx35_exm32              MACH_MX35_EXM32         MX35_EXM32              2019
+topas910                MACH_TOPAS910           TOPAS910                2020
+hyena                   MACH_HYENA              HYENA                   2021
+pospax                  MACH_POSPAX             POSPAX                  2022
+hdl_gx                  MACH_HDL_GX             HDL_GX                  2023
+ctera_4bay              MACH_CTERA_4BAY         CTERA_4BAY              2024
+ctera_plug_c            MACH_CTERA_PLUG_C       CTERA_PLUG_C            2025
+crwea_plug_i            MACH_CRWEA_PLUG_I       CRWEA_PLUG_I            2026
+egauge2                 MACH_EGAUGE2            EGAUGE2                 2027
+didj                    MACH_DIDJ               DIDJ                    2028
+m_s3c2443               MACH_MEISTER            MEISTER                 2029
+htcblackstone           MACH_HTCBLACKSTONE      HTCBLACKSTONE           2030
+cpuat9g20               MACH_CPUAT9G20          CPUAT9G20               2031
+smdk6440                MACH_SMDK6440           SMDK6440                2032
+omap_35xx_mvp           MACH_OMAP_35XX_MVP      OMAP_35XX_MVP           2033
+ctera_plug_i            MACH_CTERA_PLUG_I       CTERA_PLUG_I            2034
+pvg610_100              MACH_PVG610             PVG610                  2035
+hprw6815                MACH_HPRW6815           HPRW6815                2036
+omap3_oswald            MACH_OMAP3_OSWALD       OMAP3_OSWALD            2037
+nas4220b                MACH_NAS4220B           NAS4220B                2038
+htcraphael_cdma         MACH_HTCRAPHAEL_CDMA    HTCRAPHAEL_CDMA         2039
+htcdiamond_cdma         MACH_HTCDIAMOND_CDMA    HTCDIAMOND_CDMA         2040
+scaler                  MACH_SCALER             SCALER                  2041
+zylonite2               MACH_ZYLONITE2          ZYLONITE2               2042
+aspenite                MACH_ASPENITE           ASPENITE                2043
+teton                   MACH_TETON              TETON                   2044
+ttc_dkb                 MACH_TTC_DKB            TTC_DKB                 2045
+bishop2                 MACH_BISHOP2            BISHOP2                 2046
+ippv5                   MACH_IPPV5              IPPV5                   2047
+farm926                 MACH_FARM926            FARM926                 2048
+mmccpu                  MACH_MMCCPU             MMCCPU                  2049
+sgmsfl                  MACH_SGMSFL             SGMSFL                  2050
+tt8000                  MACH_TT8000             TT8000                  2051
+zrn4300lp               MACH_ZRN4300LP          ZRN4300LP               2052
+mptc                    MACH_MPTC               MPTC                    2053
+h6051                   MACH_H6051              H6051                   2054
+pvg610_101              MACH_PVG610_101         PVG610_101              2055
+stamp9261_pc_evb        MACH_STAMP9261_PC_EVB   STAMP9261_PC_EVB        2056
+pelco_odysseus          MACH_PELCO_ODYSSEUS     PELCO_ODYSSEUS          2057
+tny_a9260               MACH_TNY_A9260          TNY_A9260               2058
+tny_a9g20               MACH_TNY_A9G20          TNY_A9G20               2059
+aesop_mp2530f           MACH_AESOP_MP2530F      AESOP_MP2530F           2060
+dx900                   MACH_DX900              DX900                   2061
+cpodc2                  MACH_CPODC2             CPODC2                  2062
+tilt_8925               MACH_TILT_8925          TILT_8925               2063
+davinci_dm357_evm       MACH_DAVINCI_DM357_EVM  DAVINCI_DM357_EVM       2064
+swordfish               MACH_SWORDFISH          SWORDFISH               2065
+corvus                  MACH_CORVUS             CORVUS                  2066
+taurus                  MACH_TAURUS             TAURUS                  2067
+axm                     MACH_AXM                AXM                     2068
+axc                     MACH_AXC                AXC                     2069
+baby                    MACH_BABY               BABY                    2070
+mp200                   MACH_MP200              MP200                   2071
+pcm043                  MACH_PCM043             PCM043                  2072
+hanlin_v3c              MACH_HANLIN_V3C         HANLIN_V3C              2073
+kbk9g20                 MACH_KBK9G20            KBK9G20                 2074
+adsturbog5              MACH_ADSTURBOG5         ADSTURBOG5              2075
+avenger_lite1           MACH_AVENGER_LITE1      AVENGER_LITE1           2076
+suc82x                  MACH_SUC                SUC                     2077
+at91sam7s256            MACH_AT91SAM7S256       AT91SAM7S256            2078
+mendoza                 MACH_MENDOZA            MENDOZA                 2079
+kira                    MACH_KIRA               KIRA                    2080
+mx1hbm                  MACH_MX1HBM             MX1HBM                  2081
+quatro43xx              MACH_QUATRO43XX         QUATRO43XX              2082
+quatro4230              MACH_QUATRO4230         QUATRO4230              2083
+nsb400                  MACH_NSB400             NSB400                  2084
+drp255                  MACH_DRP255             DRP255                  2085
+thoth                   MACH_THOTH              THOTH                   2086
+firestone               MACH_FIRESTONE          FIRESTONE               2087
+asusp750                MACH_ASUSP750           ASUSP750                2088
+ctera_dl                MACH_CTERA_DL           CTERA_DL                2089
+socr                    MACH_SOCR               SOCR                    2090
+htcoxygen               MACH_HTCOXYGEN          HTCOXYGEN               2091
+heroc                   MACH_HEROC              HEROC                   2092
+zeno6800                MACH_ZENO6800           ZENO6800                2093
+sc2mcs                  MACH_SC2MCS             SC2MCS                  2094
+gene100                 MACH_GENE100            GENE100                 2095
+as353x                  MACH_AS353X             AS353X                  2096
+sheevaplug              MACH_SHEEVAPLUG         SHEEVAPLUG              2097
+at91sam9g20             MACH_AT91SAM9G20        AT91SAM9G20             2098
+mv88f6192gtw_fe         MACH_MV88F6192GTW_FE    MV88F6192GTW_FE         2099
+cc9200                  MACH_CC9200             CC9200                  2100
+sm9200                  MACH_SM9200             SM9200                  2101
+tp9200                  MACH_TP9200             TP9200                  2102
+snapperdv               MACH_SNAPPERDV          SNAPPERDV               2103
+avengers_lite           MACH_AVENGERS_LITE      AVENGERS_LITE           2104
+avengers_lite1          MACH_AVENGERS_LITE1     AVENGERS_LITE1          2105
+omap3axon               MACH_OMAP3AXON          OMAP3AXON               2106
+ma8xx                   MACH_MA8XX              MA8XX                   2107
+mp201ek                 MACH_MP201EK            MP201EK                 2108
+davinci_tux             MACH_DAVINCI_TUX        DAVINCI_TUX             2109
+mpa1600                 MACH_MPA1600            MPA1600                 2110
+pelco_troy              MACH_PELCO_TROY         PELCO_TROY              2111
+nsb667                  MACH_NSB667             NSB667                  2112
+rovers5_4mpix           MACH_ROVERS5_4MPIX      ROVERS5_4MPIX           2113
+twocom                  MACH_TWOCOM             TWOCOM                  2114
+ubisys_p9_rcu3r2        MACH_UBISYS_P9_RCU3R2   UBISYS_P9_RCU3R2        2115
+hero_espresso           MACH_HERO_ESPRESSO      HERO_ESPRESSO           2116
+afeusb                  MACH_AFEUSB             AFEUSB                  2117
+t830                    MACH_T830               T830                    2118
+spd8020_cc              MACH_SPD8020_CC         SPD8020_CC              2119
+om_3d7k                 MACH_OM_3D7K            OM_3D7K                 2120
+picocom2                MACH_PICOCOM2           PICOCOM2                2121
+uwg4mx27                MACH_UWG4MX27           UWG4MX27                2122
+uwg4mx31                MACH_UWG4MX31           UWG4MX31                2123
+cherry                  MACH_CHERRY             CHERRY                  2124
+mx51_babbage            MACH_MX51_BABBAGE       MX51_BABBAGE            2125
+s3c2440turkiye          MACH_S3C2440TURKIYE     S3C2440TURKIYE          2126
+tx37                    MACH_TX37               TX37                    2127
+sbc2800_9g20            MACH_SBC2800_9G20       SBC2800_9G20            2128
+benzglb                 MACH_BENZGLB            BENZGLB                 2129
+benztd                  MACH_BENZTD             BENZTD                  2130
+cartesio_plus           MACH_CARTESIO_PLUS      CARTESIO_PLUS           2131
+solrad_g20              MACH_SOLRAD_G20         SOLRAD_G20              2132
+mx27wallace             MACH_MX27WALLACE        MX27WALLACE             2133
+fmzwebmodul             MACH_FMZWEBMODUL        FMZWEBMODUL             2134
+rd78x00_masa            MACH_RD78X00_MASA       RD78X00_MASA            2135
+smallogger              MACH_SMALLOGGER         SMALLOGGER              2136
diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h
index 1514d534deeb..a3ed7cb8ca34 100644
--- a/include/linux/compiler-gcc.h
+++ b/include/linux/compiler-gcc.h
@@ -52,7 +52,15 @@
 #define __deprecated                    __attribute__((deprecated))
 #define __packed                        __attribute__((packed))
 #define __weak                          __attribute__((weak))
-#define __naked                         __attribute__((naked))
+
+/*
+ * it doesn't make sense on ARM (currently the only user of __naked) to trace
+ * naked functions because then mcount is called without stack and frame pointer
+ * being set up and there is no chance to restore the lr register to the value
+ * before mcount was called.
+ */
+#define __naked                         __attribute__((naked)) notrace
+
 #define __noreturn                      __attribute__((noreturn))
 
 /*