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-rw-r--r--drivers/gpu/drm/nouveau/nvc0_grctx.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c b/drivers/gpu/drm/nouveau/nvc0_grctx.c
index 0c9737a49149..dd0e6a736b3b 100644
--- a/drivers/gpu/drm/nouveau/nvc0_grctx.c
+++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c
@@ -1786,11 +1786,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
1786 nv_wr32(dev, 0x40587c, 0x00000000); 1786 nv_wr32(dev, 0x40587c, 0x00000000);
1787 1787
1788 if (1) { 1788 if (1) {
1789 const u8 chipset_tp_max[] = { 16, 4, 0, 4, 8, 0, 0, 0, 1789 u8 tpnr[GPC_MAX], data[TP_MAX];
1790 16, 0, 0, 0, 0, 0, 8, 4 };
1791 u8 max = chipset_tp_max[dev_priv->chipset & 0x0f];
1792 u8 tpnr[GPC_MAX];
1793 u8 data[TP_MAX];
1794 1790
1795 memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); 1791 memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr));
1796 memset(data, 0x1f, sizeof(data)); 1792 memset(data, 0x1f, sizeof(data));
@@ -1804,7 +1800,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
1804 data[tp] = gpc; 1800 data[tp] = gpc;
1805 } 1801 }
1806 1802
1807 for (i = 0; i < max / 4; i++) 1803 for (i = 0; i < 4; i++)
1808 nv_wr32(dev, 0x4060a8 + (i * 4), ((u32 *)data)[i]); 1804 nv_wr32(dev, 0x4060a8 + (i * 4), ((u32 *)data)[i]);
1809 } 1805 }
1810 1806