aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/ide/pci/hpt366.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 4350e3371360..05be8fadda7a 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/hpt366.c Version 1.00 Jun 25, 2006 2 * linux/drivers/ide/pci/hpt366.c Version 1.01 Dec 23, 2006
3 * 3 *
4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
5 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 5 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
@@ -107,7 +107,8 @@
107 * frequency 107 * frequency
108 * - switch to using the DPLL clock and enable UltraATA/133 mode by default on 108 * - switch to using the DPLL clock and enable UltraATA/133 mode by default on
109 * anything newer than HPT370/A 109 * anything newer than HPT370/A
110 * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(); 110 * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
111 * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
111 * unify HPT36x/37x timing setup code and the speedproc handlers by joining 112 * unify HPT36x/37x timing setup code and the speedproc handlers by joining
112 * the register setting lists into the table indexed by the clock selected 113 * the register setting lists into the table indexed by the clock selected
113 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 114 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
@@ -1125,11 +1126,14 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
1125 switch((itr1 >> 8) & 0x07) { 1126 switch((itr1 >> 8) & 0x07) {
1126 case 0x09: 1127 case 0x09:
1127 pci_clk = 40; 1128 pci_clk = 40;
1129 break;
1128 case 0x05: 1130 case 0x05:
1129 pci_clk = 25; 1131 pci_clk = 25;
1132 break;
1130 case 0x07: 1133 case 0x07:
1131 default: 1134 default:
1132 pci_clk = 33; 1135 pci_clk = 33;
1136 break;
1133 } 1137 }
1134 } 1138 }
1135 1139