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-rw-r--r--arch/sparc64/kernel/smp.c40
1 files changed, 17 insertions, 23 deletions
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 3c6970ad774f..063668feab1e 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -890,29 +890,24 @@ void smp_flush_dcache_page_impl(struct page *page, int cpu)
890 __local_flush_dcache_page(page); 890 __local_flush_dcache_page(page);
891 } else if (cpu_online(cpu)) { 891 } else if (cpu_online(cpu)) {
892 void *pg_addr = page_address(page); 892 void *pg_addr = page_address(page);
893 u64 data0; 893 u64 data0 = 0;
894 894
895 if (tlb_type == spitfire) { 895 if (tlb_type == spitfire) {
896 data0 = 896 data0 = ((u64)&xcall_flush_dcache_page_spitfire);
897 ((u64)&xcall_flush_dcache_page_spitfire);
898 if (page_mapping(page) != NULL) 897 if (page_mapping(page) != NULL)
899 data0 |= ((u64)1 << 32); 898 data0 |= ((u64)1 << 32);
900 spitfire_xcall_deliver(data0,
901 __pa(pg_addr),
902 (u64) pg_addr,
903 mask);
904 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { 899 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
905#ifdef DCACHE_ALIASING_POSSIBLE 900#ifdef DCACHE_ALIASING_POSSIBLE
906 data0 = 901 data0 = ((u64)&xcall_flush_dcache_page_cheetah);
907 ((u64)&xcall_flush_dcache_page_cheetah);
908 cheetah_xcall_deliver(data0,
909 __pa(pg_addr),
910 0, mask);
911#endif 902#endif
912 } 903 }
904 if (data0) {
905 xcall_deliver(data0, __pa(pg_addr),
906 (u64) pg_addr, mask);
913#ifdef CONFIG_DEBUG_DCFLUSH 907#ifdef CONFIG_DEBUG_DCFLUSH
914 atomic_inc(&dcpage_flushes_xcall); 908 atomic_inc(&dcpage_flushes_xcall);
915#endif 909#endif
910 }
916 } 911 }
917 912
918 put_cpu(); 913 put_cpu();
@@ -920,10 +915,10 @@ void smp_flush_dcache_page_impl(struct page *page, int cpu)
920 915
921void flush_dcache_page_all(struct mm_struct *mm, struct page *page) 916void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
922{ 917{
923 void *pg_addr = page_address(page);
924 cpumask_t mask = cpu_online_map; 918 cpumask_t mask = cpu_online_map;
925 u64 data0; 919 void *pg_addr;
926 int this_cpu; 920 int this_cpu;
921 u64 data0;
927 922
928 if (tlb_type == hypervisor) 923 if (tlb_type == hypervisor)
929 return; 924 return;
@@ -937,25 +932,24 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page)
937#endif 932#endif
938 if (cpus_empty(mask)) 933 if (cpus_empty(mask))
939 goto flush_self; 934 goto flush_self;
935 data0 = 0;
936 pg_addr = page_address(page);
940 if (tlb_type == spitfire) { 937 if (tlb_type == spitfire) {
941 data0 = ((u64)&xcall_flush_dcache_page_spitfire); 938 data0 = ((u64)&xcall_flush_dcache_page_spitfire);
942 if (page_mapping(page) != NULL) 939 if (page_mapping(page) != NULL)
943 data0 |= ((u64)1 << 32); 940 data0 |= ((u64)1 << 32);
944 spitfire_xcall_deliver(data0,
945 __pa(pg_addr),
946 (u64) pg_addr,
947 mask);
948 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { 941 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
949#ifdef DCACHE_ALIASING_POSSIBLE 942#ifdef DCACHE_ALIASING_POSSIBLE
950 data0 = ((u64)&xcall_flush_dcache_page_cheetah); 943 data0 = ((u64)&xcall_flush_dcache_page_cheetah);
951 cheetah_xcall_deliver(data0,
952 __pa(pg_addr),
953 0, mask);
954#endif 944#endif
955 } 945 }
946 if (data0) {
947 xcall_deliver(data0, __pa(pg_addr),
948 (u64) pg_addr, mask);
956#ifdef CONFIG_DEBUG_DCFLUSH 949#ifdef CONFIG_DEBUG_DCFLUSH
957 atomic_inc(&dcpage_flushes_xcall); 950 atomic_inc(&dcpage_flushes_xcall);
958#endif 951#endif
952 }
959 flush_self: 953 flush_self:
960 __local_flush_dcache_page(page); 954 __local_flush_dcache_page(page);
961 955