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-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index fe4a774b6211..191ad606860c 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
103SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); 103SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
104SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); 104SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
105SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); 105SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
106SH_FIXED_RATIO_CLK_SET(zg_clk, pll1_clk, 1, 3);
106SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3); 107SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
107 108
108static struct clk *main_clks[] = { 109static struct clk *main_clks[] = {
@@ -117,6 +118,7 @@ static struct clk *main_clks[] = {
117 &rclk_clk, 118 &rclk_clk,
118 &mp_clk, 119 &mp_clk,
119 &cp_clk, 120 &cp_clk,
121 &zg_clk,
120 &zx_clk, 122 &zx_clk,
121}; 123};
122 124
@@ -124,6 +126,7 @@ static struct clk *main_clks[] = {
124enum { 126enum {
125 MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925, 127 MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
126 MSTP813, 128 MSTP813,
129 MSTP811, MSTP810, MSTP809,
127 MSTP726, MSTP724, MSTP723, MSTP721, MSTP720, 130 MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
128 MSTP719, MSTP718, MSTP715, MSTP714, 131 MSTP719, MSTP718, MSTP715, MSTP714,
129 MSTP522, 132 MSTP522,
@@ -141,6 +144,9 @@ static struct clk mstp_clks[MSTP_NR] = {
141 [MSTP927] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 27, 0), /* I2C4 */ 144 [MSTP927] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 27, 0), /* I2C4 */
142 [MSTP925] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 25, 0), /* I2C5 */ 145 [MSTP925] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 25, 0), /* I2C5 */
143 [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ 146 [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
147 [MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */
148 [MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */
149 [MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 9, 0), /* VIN2 */
144 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ 150 [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
145 [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ 151 [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
146 [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */ 152 [MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
@@ -172,6 +178,7 @@ static struct clk_lookup lookups[] = {
172 CLKDEV_CON_ID("pll1", &pll1_clk), 178 CLKDEV_CON_ID("pll1", &pll1_clk),
173 CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk), 179 CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk),
174 CLKDEV_CON_ID("pll3", &pll3_clk), 180 CLKDEV_CON_ID("pll3", &pll3_clk),
181 CLKDEV_CON_ID("zg", &zg_clk),
175 CLKDEV_CON_ID("hp", &hp_clk), 182 CLKDEV_CON_ID("hp", &hp_clk),
176 CLKDEV_CON_ID("p", &p_clk), 183 CLKDEV_CON_ID("p", &p_clk),
177 CLKDEV_CON_ID("rclk", &rclk_clk), 184 CLKDEV_CON_ID("rclk", &rclk_clk),
@@ -208,6 +215,9 @@ static struct clk_lookup lookups[] = {
208 CLKDEV_DEV_ID("i2c-rcar_gen2.4", &mstp_clks[MSTP927]), 215 CLKDEV_DEV_ID("i2c-rcar_gen2.4", &mstp_clks[MSTP927]),
209 CLKDEV_DEV_ID("i2c-rcar_gen2.5", &mstp_clks[MSTP925]), 216 CLKDEV_DEV_ID("i2c-rcar_gen2.5", &mstp_clks[MSTP925]),
210 CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */ 217 CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
218 CLKDEV_DEV_ID("r8a7791-vin.0", &mstp_clks[MSTP811]),
219 CLKDEV_DEV_ID("r8a7791-vin.1", &mstp_clks[MSTP810]),
220 CLKDEV_DEV_ID("r8a7791-vin.2", &mstp_clks[MSTP809]),
211}; 221};
212 222
213#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ 223#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \