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-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
2 files changed, 4 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9b0d6b03aa1c..650433790813 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3632,6 +3632,10 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
3632 3632
3633 I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios); 3633 I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
3634 I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control); 3634 I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
3635
3636 /* Border color in case we don't scale up to the full screen. Black by
3637 * default, change to something else for debugging. */
3638 I915_WRITE(BCLRPAT(crtc->pipe), 0);
3635} 3639}
3636 3640
3637static void valleyview_crtc_enable(struct drm_crtc *crtc) 3641static void valleyview_crtc_enable(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 47f47ea64f59..d256fe454a9d 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -231,7 +231,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
231 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 231 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
232 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc; 232 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
233 unsigned int lvds_bpp; 233 unsigned int lvds_bpp;
234 int pipe;
235 234
236 /* Should never happen!! */ 235 /* Should never happen!! */
237 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 236 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
@@ -274,15 +273,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
274 intel_connector->panel.fitting_mode); 273 intel_connector->panel.fitting_mode);
275 } 274 }
276 275
277 /*
278 * Enable automatic panel scaling for non-native modes so that they fill
279 * the screen. Should be enabled before the pipe is enabled, according
280 * to register description and PRM.
281 * Change the value here to see the borders for debugging
282 */
283 for_each_pipe(pipe)
284 I915_WRITE(BCLRPAT(pipe), 0);
285
286 drm_mode_set_crtcinfo(adjusted_mode, 0); 276 drm_mode_set_crtcinfo(adjusted_mode, 0);
287 pipe_config->timings_set = true; 277 pipe_config->timings_set = true;
288 278