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-rw-r--r--drivers/gpu/drm/i915/intel_crt.c6
-rw-r--r--drivers/gpu/drm/i915/intel_display.c19
2 files changed, 21 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 417ca99e697d..75a70c46ef1b 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -615,7 +615,11 @@ void intel_crt_init(struct drm_device *dev)
615 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | 615 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
616 1 << INTEL_ANALOG_CLONE_BIT | 616 1 << INTEL_ANALOG_CLONE_BIT |
617 1 << INTEL_SDVO_LVDS_CLONE_BIT); 617 1 << INTEL_SDVO_LVDS_CLONE_BIT);
618 crt->base.crtc_mask = (1 << 0) | (1 << 1); 618 if (IS_HASWELL(dev))
619 crt->base.crtc_mask = (1 << 0);
620 else
621 crt->base.crtc_mask = (1 << 0) | (1 << 1);
622
619 if (IS_GEN2(dev)) 623 if (IS_GEN2(dev))
620 connector->interlace_allowed = 0; 624 connector->interlace_allowed = 0;
621 else 625 else
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7d59d0e852f8..101c4d458c33 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -977,9 +977,14 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
977 u32 val; 977 u32 val;
978 bool cur_state; 978 bool cur_state;
979 979
980 reg = FDI_RX_CTL(pipe); 980 if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
981 val = I915_READ(reg); 981 DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n");
982 cur_state = !!(val & FDI_RX_ENABLE); 982 return;
983 } else {
984 reg = FDI_RX_CTL(pipe);
985 val = I915_READ(reg);
986 cur_state = !!(val & FDI_RX_ENABLE);
987 }
983 WARN(cur_state != state, 988 WARN(cur_state != state,
984 "FDI RX state assertion failure (expected %s, current %s)\n", 989 "FDI RX state assertion failure (expected %s, current %s)\n",
985 state_string(state), state_string(cur_state)); 990 state_string(state), state_string(cur_state));
@@ -1012,6 +1017,10 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv,
1012 int reg; 1017 int reg;
1013 u32 val; 1018 u32 val;
1014 1019
1020 if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
1021 DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n");
1022 return;
1023 }
1015 reg = FDI_RX_CTL(pipe); 1024 reg = FDI_RX_CTL(pipe);
1016 val = I915_READ(reg); 1025 val = I915_READ(reg);
1017 WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n"); 1026 WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");
@@ -1483,6 +1492,10 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
1483 assert_fdi_tx_enabled(dev_priv, pipe); 1492 assert_fdi_tx_enabled(dev_priv, pipe);
1484 assert_fdi_rx_enabled(dev_priv, pipe); 1493 assert_fdi_rx_enabled(dev_priv, pipe);
1485 1494
1495 if (IS_HASWELL(dev_priv->dev) && pipe > 0) {
1496 DRM_ERROR("Attempting to enable transcoder on Haswell with pipe > 0\n");
1497 return;
1498 }
1486 reg = TRANSCONF(pipe); 1499 reg = TRANSCONF(pipe);
1487 val = I915_READ(reg); 1500 val = I915_READ(reg);
1488 pipeconf_val = I915_READ(PIPECONF(pipe)); 1501 pipeconf_val = I915_READ(PIPECONF(pipe));