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-rw-r--r--arch/arm/mach-s3c64xx/Kconfig1
-rw-r--r--arch/arm/mach-s3c64xx/Makefile2
-rw-r--r--arch/arm/mach-s3c64xx/clock.c8
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/crag6410.h23
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-sys.h3
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c182
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c106
-rw-r--r--arch/arm/mach-s3c64xx/pm.c4
9 files changed, 248 insertions, 83 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index f057b6ae4f90..5552e048c2be 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -288,5 +288,6 @@ config MACH_WLF_CRAGG_6410
288 select S3C_DEV_RTC 288 select S3C_DEV_RTC
289 select S3C64XX_DEV_SPI 289 select S3C64XX_DEV_SPI
290 select S3C24XX_GPIO_EXTRA128 290 select S3C24XX_GPIO_EXTRA128
291 select I2C
291 help 292 help
292 Machine support for the Wolfson Cragganmore S3C6410 variant. 293 Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 61b4034a0c22..5fdea6aa50d4 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -55,7 +55,7 @@ obj-$(CONFIG_MACH_HMT) += mach-hmt.o
55obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o 55obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o
56obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o 56obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o
57obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o 57obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o
58obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o 58obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
59 59
60# device support 60# device support
61 61
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 8cf39e33579e..872e68361eb4 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -744,7 +744,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
744 printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", 744 printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",
745 apll, mpll, epll); 745 apll, mpll, epll);
746 746
747 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); 747 if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL)
748 /* Synchronous mode */
749 hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
750 else
751 /* Asynchronous mode */
752 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
753
748 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); 754 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
749 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); 755 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
750 756
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 204bfafe4bfc..0849f2d3b105 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void)
740 } 740 }
741 741
742 /* Set all DMA configuration to be DMA, not SDMA */ 742 /* Set all DMA configuration to be DMA, not SDMA */
743 writel(0xffffff, S3C_SYSREG(0x110)); 743 writel(0xffffff, S3C64XX_SDMA_SEL);
744 744
745 /* Register standard DMA controllers */ 745 /* Register standard DMA controllers */
746 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); 746 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000);
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
new file mode 100644
index 000000000000..be9074e17dfd
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
@@ -0,0 +1,23 @@
1/* Cragganmore 6410 shared definitions
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef MACH_CRAG6410_H
12#define MACH_CRAG6410_H
13
14#include <linux/gpio.h>
15
16#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
17#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
18
19#define PCA935X_GPIO_BASE GPIO_BOARD_START
20#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
21#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
22
23#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
index 69b78d9f83b8..b91e02093289 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
@@ -21,8 +21,11 @@
21#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104) 21#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)
22#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108) 22#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)
23 23
24#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)
25
24#define S3C64XX_OTHERS S3C_SYSREG(0x900) 26#define S3C64XX_OTHERS S3C_SYSREG(0x900)
25 27
26#define S3C64XX_OTHERS_USBMASK (1 << 16) 28#define S3C64XX_OTHERS_USBMASK (1 << 16)
29#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6)
27 30
28#endif /* _PLAT_REGS_SYS_H */ 31#endif /* _PLAT_REGS_SYS_H */
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
new file mode 100644
index 000000000000..66668565ee75
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -0,0 +1,182 @@
1/* Speyside modules for Cragganmore - board data probing
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/interrupt.h>
13#include <linux/i2c.h>
14
15#include <linux/mfd/wm831x/irq.h>
16#include <linux/mfd/wm831x/gpio.h>
17
18#include <sound/wm8996.h>
19#include <sound/wm8962.h>
20#include <sound/wm9081.h>
21
22#include <mach/crag6410.h>
23
24static struct wm8996_retune_mobile_config wm8996_retune[] = {
25 {
26 .name = "Sub LPF",
27 .rate = 48000,
28 .regs = {
29 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
30 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
31 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
32 },
33 },
34 {
35 .name = "Sub HPF",
36 .rate = 48000,
37 .regs = {
38 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
39 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
40 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
41 },
42 },
43};
44
45static struct wm8996_pdata wm8996_pdata __initdata = {
46 .ldo_ena = S3C64XX_GPN(7),
47 .gpio_base = CODEC_GPIO_BASE,
48 .micdet_def = 1,
49 .inl_mode = WM8996_DIFFERRENTIAL_1,
50 .inr_mode = WM8996_DIFFERRENTIAL_1,
51
52 .irq_flags = IRQF_TRIGGER_RISING,
53
54 .gpio_default = {
55 0x8001, /* GPIO1 == ADCLRCLK1 */
56 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
57 0x0141, /* GPIO3 == HP_SEL */
58 0x0002, /* GPIO4 == IRQ */
59 0x020e, /* GPIO5 == CLKOUT */
60 },
61
62 .retune_mobile_cfgs = wm8996_retune,
63 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
64};
65
66static struct wm8962_pdata wm8962_pdata __initdata = {
67 .gpio_init = {
68 0,
69 WM8962_GPIO_FN_OPCLK,
70 WM8962_GPIO_FN_DMICCLK,
71 0,
72 0x8000 | WM8962_GPIO_FN_DMICDAT,
73 WM8962_GPIO_FN_IRQ, /* Open drain mode */
74 },
75 .irq_active_low = true,
76};
77
78static struct wm9081_pdata wm9081_pdata __initdata = {
79 .irq_high = false,
80 .irq_cmos = false,
81};
82
83static const struct i2c_board_info wm1254_devs[] = {
84 { I2C_BOARD_INFO("wm8996", 0x1a),
85 .platform_data = &wm8996_pdata,
86 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
87 },
88 { I2C_BOARD_INFO("wm9081", 0x6c),
89 .platform_data = &wm9081_pdata, },
90};
91
92static const struct i2c_board_info wm1255_devs[] = {
93 { I2C_BOARD_INFO("wm5100", 0x1a),
94 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
95 },
96 { I2C_BOARD_INFO("wm9081", 0x6c),
97 .platform_data = &wm9081_pdata, },
98};
99
100static const struct i2c_board_info wm1259_devs[] = {
101 { I2C_BOARD_INFO("wm8962", 0x1a),
102 .platform_data = &wm8962_pdata,
103 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
104 },
105};
106
107
108static __devinitdata const struct {
109 u8 id;
110 const char *name;
111 const struct i2c_board_info *i2c_devs;
112 int num_i2c_devs;
113} gf_mods[] = {
114 { .id = 0x01, .name = "1250-EV1 Springbank" },
115 { .id = 0x02, .name = "1251-EV1 Jura" },
116 { .id = 0x03, .name = "1252-EV1 Glenlivet" },
117 { .id = 0x11, .name = "6249-EV2 Glenfarclas", },
118 { .id = 0x21, .name = "1275-EV1 Mortlach" },
119 { .id = 0x25, .name = "1274-EV1 Glencadam" },
120 { .id = 0x31, .name = "1253-EV1 Tomatin", },
121 { .id = 0x39, .name = "1254-EV1 Dallas Dhu",
122 .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
123 { .id = 0x3a, .name = "1259-EV1 Tobermory",
124 .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
125 { .id = 0x3b, .name = "1255-EV1 Kilchoman",
126 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
127 { .id = 0x3c, .name = "1273-EV1 Longmorn" },
128};
129
130static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
131 const struct i2c_device_id *i2c_id)
132{
133 int ret, i, j, id, rev;
134
135 ret = i2c_smbus_read_byte_data(i2c, 0);
136 if (ret < 0) {
137 dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
138 return ret;
139 }
140
141 id = (ret & 0xfe) >> 2;
142 rev = ret & 0x3;
143 for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
144 if (id == gf_mods[i].id)
145 break;
146
147 if (i < ARRAY_SIZE(gf_mods)) {
148 dev_info(&i2c->dev, "%s revision %d\n",
149 gf_mods[i].name, rev + 1);
150 for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
151 if (!i2c_new_device(i2c->adapter,
152 &(gf_mods[i].i2c_devs[j])))
153 dev_err(&i2c->dev,
154 "Failed to register dev: %d\n", ret);
155 }
156 } else {
157 dev_warn(&i2c->dev, "Unknown module ID %d revision %d\n",
158 id, rev);
159 }
160
161 return 0;
162}
163
164static const struct i2c_device_id wlf_gf_module_id[] = {
165 { "wlf-gf-module", 0 },
166 { }
167};
168
169static struct i2c_driver wlf_gf_module_driver = {
170 .driver = {
171 .name = "wlf-gf-module",
172 .owner = THIS_MODULE,
173 },
174 .probe = wlf_gf_module_probe,
175 .id_table = wlf_gf_module_id,
176};
177
178static int __init wlf_gf_module_register(void)
179{
180 return i2c_add_driver(&wlf_gf_module_driver);
181}
182module_init(wlf_gf_module_register);
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index af0c2fe1ea37..ed332dd7bf4f 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -47,6 +47,7 @@
47#include <mach/regs-sys.h> 47#include <mach/regs-sys.h>
48#include <mach/regs-gpio.h> 48#include <mach/regs-gpio.h>
49#include <mach/regs-modem.h> 49#include <mach/regs-modem.h>
50#include <mach/crag6410.h>
50 51
51#include <mach/regs-gpio-memport.h> 52#include <mach/regs-gpio-memport.h>
52 53
@@ -65,17 +66,6 @@
65#include <plat/iic.h> 66#include <plat/iic.h>
66#include <plat/pm.h> 67#include <plat/pm.h>
67 68
68#include <sound/wm8996.h>
69#include <sound/wm8962.h>
70#include <sound/wm9081.h>
71
72#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
73#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
74
75#define PCA935X_GPIO_BASE GPIO_BOARD_START
76#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
77#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
78
79/* serial port setup */ 69/* serial port setup */
80 70
81#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 71#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -287,6 +277,11 @@ static struct platform_device speyside_device = {
287 .id = -1, 277 .id = -1,
288}; 278};
289 279
280static struct platform_device lowland_device = {
281 .name = "lowland",
282 .id = -1,
283};
284
290static struct platform_device speyside_wm8962_device = { 285static struct platform_device speyside_wm8962_device = {
291 .name = "speyside-wm8962", 286 .name = "speyside-wm8962",
292 .id = -1, 287 .id = -1,
@@ -295,6 +290,8 @@ static struct platform_device speyside_wm8962_device = {
295static struct regulator_consumer_supply wallvdd_consumers[] = { 290static struct regulator_consumer_supply wallvdd_consumers[] = {
296 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 291 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
297 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 292 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
293 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
294 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
298}; 295};
299 296
300static struct regulator_init_data wallvdd_data = { 297static struct regulator_init_data wallvdd_data = {
@@ -345,6 +342,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
345 &crag6410_backlight_device, 342 &crag6410_backlight_device,
346 &speyside_device, 343 &speyside_device,
347 &speyside_wm8962_device, 344 &speyside_wm8962_device,
345 &lowland_device,
348 &wallvdd_device, 346 &wallvdd_device,
349}; 347};
350 348
@@ -353,6 +351,12 @@ static struct pca953x_platform_data crag6410_pca_data = {
353 .irq_base = 0, 351 .irq_base = 0,
354}; 352};
355 353
354/* VDDARM is controlled by DVS1 connected to GPK(0) */
355static struct wm831x_buckv_pdata vddarm_pdata = {
356 .dvs_control_src = 1,
357 .dvs_gpio = S3C64XX_GPK(0),
358};
359
356static struct regulator_consumer_supply vddarm_consumers[] __initdata = { 360static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
357 REGULATOR_SUPPLY("vddarm", NULL), 361 REGULATOR_SUPPLY("vddarm", NULL),
358}; 362};
@@ -368,6 +372,7 @@ static struct regulator_init_data vddarm __initdata = {
368 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers), 372 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
369 .consumer_supplies = vddarm_consumers, 373 .consumer_supplies = vddarm_consumers,
370 .supply_regulator = "WALLVDD", 374 .supply_regulator = "WALLVDD",
375 .driver_data = &vddarm_pdata,
371}; 376};
372 377
373static struct regulator_init_data vddint __initdata = { 378static struct regulator_init_data vddint __initdata = {
@@ -503,6 +508,8 @@ static struct wm831x_pdata crag_pmic_pdata __initdata = {
503 .backup = &banff_backup_pdata, 508 .backup = &banff_backup_pdata,
504 509
505 .gpio_defaults = { 510 .gpio_defaults = {
511 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
512 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
506 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/ 513 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
507 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6, 514 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
508 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/ 515 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
@@ -560,8 +567,12 @@ static struct regulator_init_data pvdd_1v2 __initdata = {
560}; 567};
561 568
562static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { 569static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
570 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
563 REGULATOR_SUPPLY("PLLVDD", "1-001a"), 571 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
564 REGULATOR_SUPPLY("DBVDD", "1-001a"), 572 REGULATOR_SUPPLY("DBVDD", "1-001a"),
573 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
574 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
575 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
565 REGULATOR_SUPPLY("CPVDD", "1-001a"), 576 REGULATOR_SUPPLY("CPVDD", "1-001a"),
566 REGULATOR_SUPPLY("AVDD2", "1-001a"), 577 REGULATOR_SUPPLY("AVDD2", "1-001a"),
567 REGULATOR_SUPPLY("DCVDD", "1-001a"), 578 REGULATOR_SUPPLY("DCVDD", "1-001a"),
@@ -614,81 +625,16 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
614 .disable_touch = true, 625 .disable_touch = true,
615}; 626};
616 627
617static struct wm8996_retune_mobile_config wm8996_retune[] = {
618 {
619 .name = "Sub LPF",
620 .rate = 48000,
621 .regs = {
622 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
623 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
624 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
625 },
626 },
627 {
628 .name = "Sub HPF",
629 .rate = 48000,
630 .regs = {
631 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
632 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
633 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
634 },
635 },
636};
637
638static struct wm8996_pdata wm8996_pdata __initdata = {
639 .ldo_ena = S3C64XX_GPN(7),
640 .gpio_base = CODEC_GPIO_BASE,
641 .micdet_def = 1,
642 .inl_mode = WM8996_DIFFERRENTIAL_1,
643 .inr_mode = WM8996_DIFFERRENTIAL_1,
644
645 .irq_flags = IRQF_TRIGGER_RISING,
646
647 .gpio_default = {
648 0x8001, /* GPIO1 == ADCLRCLK1 */
649 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
650 0x0141, /* GPIO3 == HP_SEL */
651 0x0002, /* GPIO4 == IRQ */
652 0x020e, /* GPIO5 == CLKOUT */
653 },
654
655 .retune_mobile_cfgs = wm8996_retune,
656 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
657};
658
659static struct wm8962_pdata wm8962_pdata __initdata = {
660 .gpio_init = {
661 0,
662 WM8962_GPIO_FN_OPCLK,
663 WM8962_GPIO_FN_DMICCLK,
664 0,
665 0x8000 | WM8962_GPIO_FN_DMICDAT,
666 WM8962_GPIO_FN_IRQ, /* Open drain mode */
667 },
668 .irq_active_low = true,
669};
670
671static struct wm9081_pdata wm9081_pdata __initdata = {
672 .irq_high = false,
673 .irq_cmos = false,
674};
675
676static struct i2c_board_info i2c_devs1[] __initdata = { 628static struct i2c_board_info i2c_devs1[] __initdata = {
677 { I2C_BOARD_INFO("wm8311", 0x34), 629 { I2C_BOARD_INFO("wm8311", 0x34),
678 .irq = S3C_EINT(0), 630 .irq = S3C_EINT(0),
679 .platform_data = &glenfarclas_pmic_pdata }, 631 .platform_data = &glenfarclas_pmic_pdata },
680 632
633 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
634 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
635 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
636
681 { I2C_BOARD_INFO("wm1250-ev1", 0x27) }, 637 { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
682 { I2C_BOARD_INFO("wm8996", 0x1a),
683 .platform_data = &wm8996_pdata,
684 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
685 },
686 { I2C_BOARD_INFO("wm9081", 0x6c),
687 .platform_data = &wm9081_pdata, },
688 { I2C_BOARD_INFO("wm8962", 0x1a),
689 .platform_data = &wm8962_pdata,
690 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
691 },
692}; 638};
693 639
694static void __init crag6410_map_io(void) 640static void __init crag6410_map_io(void)
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 055e2858b0dd..b375cd5c47cb 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -29,6 +29,7 @@
29#include <mach/regs-clock.h> 29#include <mach/regs-clock.h>
30#include <mach/regs-syscon-power.h> 30#include <mach/regs-syscon-power.h>
31#include <mach/regs-gpio-memport.h> 31#include <mach/regs-gpio-memport.h>
32#include <mach/regs-modem.h>
32 33
33#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 34#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
34void s3c_pm_debug_smdkled(u32 set, u32 clear) 35void s3c_pm_debug_smdkled(u32 set, u32 clear)
@@ -85,6 +86,9 @@ static struct sleep_save misc_save[] = {
85 SAVE_ITEM(S3C64XX_MEM0CONSLP0), 86 SAVE_ITEM(S3C64XX_MEM0CONSLP0),
86 SAVE_ITEM(S3C64XX_MEM0CONSLP1), 87 SAVE_ITEM(S3C64XX_MEM0CONSLP1),
87 SAVE_ITEM(S3C64XX_MEM1CONSLP), 88 SAVE_ITEM(S3C64XX_MEM1CONSLP),
89
90 SAVE_ITEM(S3C64XX_SDMA_SEL),
91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON),
88}; 92};
89 93
90void s3c_pm_configure_extint(void) 94void s3c_pm_configure_extint(void)