diff options
204 files changed, 2146 insertions, 1112 deletions
diff --git a/Documentation/filesystems/ext4.txt b/Documentation/filesystems/ext4.txt index bf4f4b7e11b3..6d94e0696f8c 100644 --- a/Documentation/filesystems/ext4.txt +++ b/Documentation/filesystems/ext4.txt | |||
@@ -134,9 +134,15 @@ ro Mount filesystem read only. Note that ext4 will | |||
134 | mount options "ro,noload" can be used to prevent | 134 | mount options "ro,noload" can be used to prevent |
135 | writes to the filesystem. | 135 | writes to the filesystem. |
136 | 136 | ||
137 | journal_checksum Enable checksumming of the journal transactions. | ||
138 | This will allow the recovery code in e2fsck and the | ||
139 | kernel to detect corruption in the kernel. It is a | ||
140 | compatible change and will be ignored by older kernels. | ||
141 | |||
137 | journal_async_commit Commit block can be written to disk without waiting | 142 | journal_async_commit Commit block can be written to disk without waiting |
138 | for descriptor blocks. If enabled older kernels cannot | 143 | for descriptor blocks. If enabled older kernels cannot |
139 | mount the device. | 144 | mount the device. This will enable 'journal_checksum' |
145 | internally. | ||
140 | 146 | ||
141 | journal=update Update the ext4 file system's journal to the current | 147 | journal=update Update the ext4 file system's journal to the current |
142 | format. | 148 | format. |
diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt index 1c8eb4518ce0..fd9a2f67edf2 100644 --- a/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/Documentation/sound/alsa/ALSA-Configuration.txt | |||
@@ -522,7 +522,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. | |||
522 | pcm_devs - Number of PCM devices assigned to each card | 522 | pcm_devs - Number of PCM devices assigned to each card |
523 | (default = 1, up to 4) | 523 | (default = 1, up to 4) |
524 | pcm_substreams - Number of PCM substreams assigned to each PCM | 524 | pcm_substreams - Number of PCM substreams assigned to each PCM |
525 | (default = 8, up to 16) | 525 | (default = 8, up to 128) |
526 | hrtimer - Use hrtimer (=1, default) or system timer (=0) | 526 | hrtimer - Use hrtimer (=1, default) or system timer (=0) |
527 | fake_buffer - Fake buffer allocations (default = 1) | 527 | fake_buffer - Fake buffer allocations (default = 1) |
528 | 528 | ||
diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt index 957b22fde2df..8179692fbb90 100644 --- a/Documentation/trace/ftrace.txt +++ b/Documentation/trace/ftrace.txt | |||
@@ -1231,6 +1231,7 @@ something like this simple program: | |||
1231 | #include <sys/stat.h> | 1231 | #include <sys/stat.h> |
1232 | #include <fcntl.h> | 1232 | #include <fcntl.h> |
1233 | #include <unistd.h> | 1233 | #include <unistd.h> |
1234 | #include <string.h> | ||
1234 | 1235 | ||
1235 | #define _STR(x) #x | 1236 | #define _STR(x) #x |
1236 | #define STR(x) _STR(x) | 1237 | #define STR(x) _STR(x) |
@@ -1265,6 +1266,7 @@ const char *find_debugfs(void) | |||
1265 | return NULL; | 1266 | return NULL; |
1266 | } | 1267 | } |
1267 | 1268 | ||
1269 | strcat(debugfs, "/tracing/"); | ||
1268 | debugfs_found = 1; | 1270 | debugfs_found = 1; |
1269 | 1271 | ||
1270 | return debugfs; | 1272 | return debugfs; |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 32 | 3 | SUBLEVEL = 32 |
4 | EXTRAVERSION = -rc5 | 4 | EXTRAVERSION = -rc6 |
5 | NAME = Man-Eating Seals of Antiquity | 5 | NAME = Man-Eating Seals of Antiquity |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index fd03fb63a332..3d0cdd21b882 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -414,9 +414,14 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page | |||
414 | 414 | ||
415 | static inline void __flush_icache_all(void) | 415 | static inline void __flush_icache_all(void) |
416 | { | 416 | { |
417 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
418 | extern void v6_icache_inval_all(void); | ||
419 | v6_icache_inval_all(); | ||
420 | #else | ||
417 | asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" | 421 | asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" |
418 | : | 422 | : |
419 | : "r" (0)); | 423 | : "r" (0)); |
424 | #endif | ||
420 | } | 425 | } |
421 | 426 | ||
422 | #define ARCH_HAS_FLUSH_ANON_PAGE | 427 | #define ARCH_HAS_FLUSH_ANON_PAGE |
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 1423a3419789..2a573d4fea24 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/kernel/signal.c | 2 | * linux/arch/arm/kernel/signal.c |
3 | * | 3 | * |
4 | * Copyright (C) 1995-2002 Russell King | 4 | * Copyright (C) 1995-2009 Russell King |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -29,6 +29,7 @@ | |||
29 | */ | 29 | */ |
30 | #define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) | 30 | #define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) |
31 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) | 31 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) |
32 | #define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE) | ||
32 | 33 | ||
33 | /* | 34 | /* |
34 | * With EABI, the syscall number has to be loaded into r7. | 35 | * With EABI, the syscall number has to be loaded into r7. |
@@ -49,6 +50,18 @@ const unsigned long sigreturn_codes[7] = { | |||
49 | }; | 50 | }; |
50 | 51 | ||
51 | /* | 52 | /* |
53 | * Either we support OABI only, or we have EABI with the OABI | ||
54 | * compat layer enabled. In the later case we don't know if | ||
55 | * user space is EABI or not, and if not we must not clobber r7. | ||
56 | * Always using the OABI syscall solves that issue and works for | ||
57 | * all those cases. | ||
58 | */ | ||
59 | const unsigned long syscall_restart_code[2] = { | ||
60 | SWI_SYS_RESTART, /* swi __NR_restart_syscall */ | ||
61 | 0xe49df004, /* ldr pc, [sp], #4 */ | ||
62 | }; | ||
63 | |||
64 | /* | ||
52 | * atomically swap in the new signal mask, and wait for a signal. | 65 | * atomically swap in the new signal mask, and wait for a signal. |
53 | */ | 66 | */ |
54 | asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) | 67 | asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) |
@@ -645,32 +658,12 @@ static void do_signal(struct pt_regs *regs, int syscall) | |||
645 | regs->ARM_pc -= 4; | 658 | regs->ARM_pc -= 4; |
646 | #else | 659 | #else |
647 | u32 __user *usp; | 660 | u32 __user *usp; |
648 | u32 swival = __NR_restart_syscall; | ||
649 | 661 | ||
650 | regs->ARM_sp -= 12; | 662 | regs->ARM_sp -= 4; |
651 | usp = (u32 __user *)regs->ARM_sp; | 663 | usp = (u32 __user *)regs->ARM_sp; |
652 | 664 | ||
653 | /* | 665 | put_user(regs->ARM_pc, usp); |
654 | * Either we supports OABI only, or we have | 666 | regs->ARM_pc = KERN_RESTART_CODE; |
655 | * EABI with the OABI compat layer enabled. | ||
656 | * In the later case we don't know if user | ||
657 | * space is EABI or not, and if not we must | ||
658 | * not clobber r7. Always using the OABI | ||
659 | * syscall solves that issue and works for | ||
660 | * all those cases. | ||
661 | */ | ||
662 | swival = swival - __NR_SYSCALL_BASE + __NR_OABI_SYSCALL_BASE; | ||
663 | |||
664 | put_user(regs->ARM_pc, &usp[0]); | ||
665 | /* swi __NR_restart_syscall */ | ||
666 | put_user(0xef000000 | swival, &usp[1]); | ||
667 | /* ldr pc, [sp], #12 */ | ||
668 | put_user(0xe49df00c, &usp[2]); | ||
669 | |||
670 | flush_icache_range((unsigned long)usp, | ||
671 | (unsigned long)(usp + 3)); | ||
672 | |||
673 | regs->ARM_pc = regs->ARM_sp + 4; | ||
674 | #endif | 667 | #endif |
675 | } | 668 | } |
676 | } | 669 | } |
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h index 27beece15502..6fcfe8398aa4 100644 --- a/arch/arm/kernel/signal.h +++ b/arch/arm/kernel/signal.h | |||
@@ -1,12 +1,14 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/kernel/signal.h | 2 | * linux/arch/arm/kernel/signal.h |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Russell King. | 4 | * Copyright (C) 2005-2009 Russell King. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) | 10 | #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) |
11 | #define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes)) | ||
11 | 12 | ||
12 | extern const unsigned long sigreturn_codes[7]; | 13 | extern const unsigned long sigreturn_codes[7]; |
14 | extern const unsigned long syscall_restart_code[2]; | ||
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index f838f36eb702..95718a6b50a6 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/kernel/traps.c | 2 | * linux/arch/arm/kernel/traps.c |
3 | * | 3 | * |
4 | * Copyright (C) 1995-2002 Russell King | 4 | * Copyright (C) 1995-2009 Russell King |
5 | * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds | 5 | * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
@@ -751,6 +751,8 @@ void __init early_trap_init(void) | |||
751 | */ | 751 | */ |
752 | memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, | 752 | memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, |
753 | sizeof(sigreturn_codes)); | 753 | sizeof(sigreturn_codes)); |
754 | memcpy((void *)KERN_RESTART_CODE, syscall_restart_code, | ||
755 | sizeof(syscall_restart_code)); | ||
754 | 756 | ||
755 | flush_icache_range(vectors, vectors + PAGE_SIZE); | 757 | flush_icache_range(vectors, vectors + PAGE_SIZE); |
756 | modify_domain(DOMAIN_USER, DOMAIN_CLIENT); | 758 | modify_domain(DOMAIN_USER, DOMAIN_CLIENT); |
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 39baf1128bfa..786ac2b6914a 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c | |||
@@ -26,6 +26,15 @@ | |||
26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html | 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html |
27 | */ | 27 | */ |
28 | 28 | ||
29 | #if !defined (__ARM_EABI__) | ||
30 | #warning Your compiler does not have EABI support. | ||
31 | #warning ARM unwind is known to compile only with EABI compilers. | ||
32 | #warning Change compiler or disable ARM_UNWIND option. | ||
33 | #elif (__GNUC__ == 4 && __GNUC_MINOR__ <= 2) | ||
34 | #warning Your compiler is too buggy; it is known to not compile ARM unwind support. | ||
35 | #warning Change compiler or disable ARM_UNWIND option. | ||
36 | #endif | ||
37 | |||
29 | #include <linux/kernel.h> | 38 | #include <linux/kernel.h> |
30 | #include <linux/init.h> | 39 | #include <linux/init.h> |
31 | #include <linux/module.h> | 40 | #include <linux/module.h> |
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 34a9502c48bc..c22df30ed5e5 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #define ARCH_ID_AT91SAM9G20 0x019905a0 | 25 | #define ARCH_ID_AT91SAM9G20 0x019905a0 |
26 | #define ARCH_ID_AT91SAM9RL64 0x019b03a0 | 26 | #define ARCH_ID_AT91SAM9RL64 0x019b03a0 |
27 | #define ARCH_ID_AT91SAM9G45 0x819b05a0 | 27 | #define ARCH_ID_AT91SAM9G45 0x819b05a0 |
28 | #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ | ||
29 | #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ | ||
28 | #define ARCH_ID_AT91CAP9 0x039A03A0 | 30 | #define ARCH_ID_AT91CAP9 0x039A03A0 |
29 | 31 | ||
30 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 | 32 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 |
@@ -41,6 +43,11 @@ static inline unsigned long at91_cpu_identify(void) | |||
41 | return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); | 43 | return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); |
42 | } | 44 | } |
43 | 45 | ||
46 | static inline unsigned long at91_cpu_fully_identify(void) | ||
47 | { | ||
48 | return at91_sys_read(AT91_DBGU_CIDR); | ||
49 | } | ||
50 | |||
44 | #define ARCH_EXID_AT91SAM9M11 0x00000001 | 51 | #define ARCH_EXID_AT91SAM9M11 0x00000001 |
45 | #define ARCH_EXID_AT91SAM9M10 0x00000002 | 52 | #define ARCH_EXID_AT91SAM9M10 0x00000002 |
46 | #define ARCH_EXID_AT91SAM9G45 0x00000004 | 53 | #define ARCH_EXID_AT91SAM9G45 0x00000004 |
@@ -118,8 +125,10 @@ static inline unsigned long at91cap9_rev_identify(void) | |||
118 | 125 | ||
119 | #ifdef CONFIG_ARCH_AT91SAM9G45 | 126 | #ifdef CONFIG_ARCH_AT91SAM9G45 |
120 | #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) | 127 | #define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) |
128 | #define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES) | ||
121 | #else | 129 | #else |
122 | #define cpu_is_at91sam9g45() (0) | 130 | #define cpu_is_at91sam9g45() (0) |
131 | #define cpu_is_at91sam9g45es() (0) | ||
123 | #endif | 132 | #endif |
124 | 133 | ||
125 | #ifdef CONFIG_ARCH_AT91CAP9 | 134 | #ifdef CONFIG_ARCH_AT91CAP9 |
diff --git a/arch/arm/mach-integrator/include/mach/memory.h b/arch/arm/mach-integrator/include/mach/memory.h index 2b2e7a110724..4891828454f5 100644 --- a/arch/arm/mach-integrator/include/mach/memory.h +++ b/arch/arm/mach-integrator/include/mach/memory.h | |||
@@ -28,5 +28,6 @@ | |||
28 | #define BUS_OFFSET UL(0x80000000) | 28 | #define BUS_OFFSET UL(0x80000000) |
29 | #define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET) | 29 | #define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET) |
30 | #define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET) | 30 | #define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET) |
31 | #define __pfn_to_bus(x) (((x) << PAGE_SHIFT) + BUS_OFFSET) | ||
31 | 32 | ||
32 | #endif | 33 | #endif |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 46cd6acb4d40..699671fa6e0b 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -61,5 +61,5 @@ extern void realview_timer_init(unsigned int timer_irq); | |||
61 | extern int realview_flash_register(struct resource *res, u32 num); | 61 | extern int realview_flash_register(struct resource *res, u32 num); |
62 | extern int realview_eth_register(const char *name, struct resource *res); | 62 | extern int realview_eth_register(const char *name, struct resource *res); |
63 | extern int realview_usb_register(struct resource *res); | 63 | extern int realview_usb_register(struct resource *res); |
64 | 64 | extern void (*realview_reset)(char); | |
65 | #endif | 65 | #endif |
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h index 98f8e7eeacc2..34b80b7d40b8 100644 --- a/arch/arm/mach-realview/include/mach/board-pb1176.h +++ b/arch/arm/mach-realview/include/mach/board-pb1176.h | |||
@@ -73,4 +73,9 @@ | |||
73 | #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ | 73 | #define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ |
74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ | 74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ |
75 | 75 | ||
76 | /* | ||
77 | * Control register SYS_RESETCTL is set to 1 to force a soft reset | ||
78 | */ | ||
79 | #define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100 | ||
80 | |||
76 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ | 81 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ |
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h index f0d68e0fea01..7abf918b77e9 100644 --- a/arch/arm/mach-realview/include/mach/board-pb11mp.h +++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h | |||
@@ -81,4 +81,16 @@ | |||
81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ | 81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ |
82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ | 82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ |
83 | 83 | ||
84 | /* | ||
85 | * Values for REALVIEW_SYS_RESET_CTRL | ||
86 | */ | ||
87 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01 | ||
88 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02 | ||
89 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03 | ||
90 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04 | ||
91 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05 | ||
92 | #define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06 | ||
93 | |||
94 | #define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0) | ||
95 | |||
84 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ | 96 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ |
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index c8f50835fed2..4f46bf71e752 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h | |||
@@ -119,19 +119,6 @@ | |||
119 | #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) | 119 | #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) |
120 | #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) | 120 | #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) |
121 | 121 | ||
122 | /* | ||
123 | * Values for REALVIEW_SYS_RESET_CTRL | ||
124 | */ | ||
125 | #define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01 | ||
126 | #define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02 | ||
127 | #define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03 | ||
128 | #define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04 | ||
129 | #define REALVIEW_SYS_CTRL_RESET_POR 0x05 | ||
130 | #define REALVIEW_SYS_CTRL_RESET_DoC 0x06 | ||
131 | |||
132 | #define REALVIEW_SYS_CTRL_LED (1 << 0) | ||
133 | |||
134 | |||
135 | /* ------------------------------------------------------------------------ | 122 | /* ------------------------------------------------------------------------ |
136 | * RealView control registers | 123 | * RealView control registers |
137 | * ------------------------------------------------------------------------ | 124 | * ------------------------------------------------------------------------ |
@@ -153,7 +140,7 @@ | |||
153 | * SYS_CLD, SYS_BOOTCS | 140 | * SYS_CLD, SYS_BOOTCS |
154 | */ | 141 | */ |
155 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) | 142 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) |
156 | #define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ | 143 | #define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */ |
157 | 144 | ||
158 | /* | 145 | /* |
159 | * REALVIEW_SYS_FLASH | 146 | * REALVIEW_SYS_FLASH |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h index 1a15a441e027..a30f2e3ec178 100644 --- a/arch/arm/mach-realview/include/mach/system.h +++ b/arch/arm/mach-realview/include/mach/system.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
26 | #include <mach/platform.h> | 26 | #include <mach/platform.h> |
27 | 27 | ||
28 | void (*realview_reset)(char mode); | ||
29 | |||
28 | static inline void arch_idle(void) | 30 | static inline void arch_idle(void) |
29 | { | 31 | { |
30 | /* | 32 | /* |
@@ -36,16 +38,12 @@ static inline void arch_idle(void) | |||
36 | 38 | ||
37 | static inline void arch_reset(char mode, const char *cmd) | 39 | static inline void arch_reset(char mode, const char *cmd) |
38 | { | 40 | { |
39 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET; | ||
40 | unsigned int val; | ||
41 | |||
42 | /* | 41 | /* |
43 | * To reset, we hit the on-board reset register | 42 | * To reset, we hit the on-board reset register |
44 | * in the system FPGA | 43 | * in the system FPGA |
45 | */ | 44 | */ |
46 | val = __raw_readl(hdr_ctrl); | 45 | if (realview_reset) |
47 | val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; | 46 | realview_reset(mode); |
48 | __raw_writel(val, hdr_ctrl); | ||
49 | } | 47 | } |
50 | 48 | ||
51 | #endif | 49 | #endif |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 2817fe099319..a6ba147692c1 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -290,6 +290,16 @@ static struct sys_timer realview_pb1176_timer = { | |||
290 | .init = realview_pb1176_timer_init, | 290 | .init = realview_pb1176_timer_init, |
291 | }; | 291 | }; |
292 | 292 | ||
293 | static void realview_pb1176_reset(char mode) | ||
294 | { | ||
295 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | ||
296 | REALVIEW_SYS_RESETCTL_OFFSET; | ||
297 | void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | ||
298 | REALVIEW_SYS_LOCK_OFFSET; | ||
299 | __raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl); | ||
300 | __raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl); | ||
301 | } | ||
302 | |||
293 | static void __init realview_pb1176_init(void) | 303 | static void __init realview_pb1176_init(void) |
294 | { | 304 | { |
295 | int i; | 305 | int i; |
@@ -313,6 +323,7 @@ static void __init realview_pb1176_init(void) | |||
313 | #ifdef CONFIG_LEDS | 323 | #ifdef CONFIG_LEDS |
314 | leds_event = realview_leds_event; | 324 | leds_event = realview_leds_event; |
315 | #endif | 325 | #endif |
326 | realview_reset = realview_pb1176_reset; | ||
316 | } | 327 | } |
317 | 328 | ||
318 | MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") | 329 | MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 94680fcf726d..070d284ce96e 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -299,6 +299,21 @@ static struct sys_timer realview_pb11mp_timer = { | |||
299 | .init = realview_pb11mp_timer_init, | 299 | .init = realview_pb11mp_timer_init, |
300 | }; | 300 | }; |
301 | 301 | ||
302 | static void realview_pb11mp_reset(char mode) | ||
303 | { | ||
304 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | ||
305 | REALVIEW_SYS_RESETCTL_OFFSET; | ||
306 | unsigned int val; | ||
307 | |||
308 | /* | ||
309 | * To reset, we hit the on-board reset register | ||
310 | * in the system FPGA | ||
311 | */ | ||
312 | val = __raw_readl(hdr_ctrl); | ||
313 | val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR; | ||
314 | __raw_writel(val, hdr_ctrl); | ||
315 | } | ||
316 | |||
302 | static void __init realview_pb11mp_init(void) | 317 | static void __init realview_pb11mp_init(void) |
303 | { | 318 | { |
304 | int i; | 319 | int i; |
@@ -324,6 +339,7 @@ static void __init realview_pb11mp_init(void) | |||
324 | #ifdef CONFIG_LEDS | 339 | #ifdef CONFIG_LEDS |
325 | leds_event = realview_leds_event; | 340 | leds_event = realview_leds_event; |
326 | #endif | 341 | #endif |
342 | realview_reset = realview_pb11mp_reset; | ||
327 | } | 343 | } |
328 | 344 | ||
329 | MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") | 345 | MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") |
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index 7974afca297c..9664e011dae2 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
31 | #include <mach/gpio-fns.h> | ||
31 | #include <asm/irq.h> | 32 | #include <asm/irq.h> |
32 | 33 | ||
33 | #include <mach/regs-gpio.h> | 34 | #include <mach/regs-gpio.h> |
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h index c3a2629e0ded..92e2687009ea 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c2410/include/mach/dma.h | |||
@@ -110,6 +110,8 @@ enum s3c2410_dma_loadst { | |||
110 | * waiting for reloads */ | 110 | * waiting for reloads */ |
111 | #define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ | 111 | #define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ |
112 | 112 | ||
113 | #define S3C2410_DMAF_CIRCULAR (1 << 2) /* no circular dma support */ | ||
114 | |||
113 | /* dma buffer */ | 115 | /* dma buffer */ |
114 | 116 | ||
115 | struct s3c2410_dma_buf; | 117 | struct s3c2410_dma_buf; |
@@ -194,4 +196,9 @@ struct s3c2410_dma_chan { | |||
194 | 196 | ||
195 | typedef unsigned long dma_device_t; | 197 | typedef unsigned long dma_device_t; |
196 | 198 | ||
199 | static inline bool s3c_dma_has_circular(void) | ||
200 | { | ||
201 | return false; | ||
202 | } | ||
203 | |||
197 | #endif /* __ASM_ARCH_DMA_H */ | 204 | #endif /* __ASM_ARCH_DMA_H */ |
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index d7bba919a77e..a8b69d77571b 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -103,6 +103,7 @@ config MACH_MINI2440 | |||
103 | select LEDS_TRIGGER_BACKLIGHT | 103 | select LEDS_TRIGGER_BACKLIGHT |
104 | select SND_S3C24XX_SOC_S3C24XX_UDA134X | 104 | select SND_S3C24XX_SOC_S3C24XX_UDA134X |
105 | select S3C_DEV_NAND | 105 | select S3C_DEV_NAND |
106 | select S3C_DEV_USB_HOST | ||
106 | help | 107 | help |
107 | Say Y here to select support for the MINI2440. Is a 10cm x 10cm board | 108 | Say Y here to select support for the MINI2440. Is a 10cm x 10cm board |
108 | available via various sources. It can come with a 3.5" or 7" touch LCD. | 109 | available via various sources. It can come with a 3.5" or 7" touch LCD. |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index ec71a6965786..1c3382fefdd2 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
@@ -144,7 +144,7 @@ static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = { | |||
144 | .type = (S3C2410_LCDCON1_TFT16BPP |\ | 144 | .type = (S3C2410_LCDCON1_TFT16BPP |\ |
145 | S3C2410_LCDCON1_TFT) | 145 | S3C2410_LCDCON1_TFT) |
146 | 146 | ||
147 | struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { | 147 | static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { |
148 | [0] = { /* mini2440 + 3.5" TFT + touchscreen */ | 148 | [0] = { /* mini2440 + 3.5" TFT + touchscreen */ |
149 | _LCD_DECLARE( | 149 | _LCD_DECLARE( |
150 | 7, /* The 3.5 is quite fast */ | 150 | 7, /* The 3.5 is quite fast */ |
@@ -191,7 +191,7 @@ struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { | |||
191 | #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) | 191 | #define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) |
192 | #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) | 192 | #define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) |
193 | 193 | ||
194 | struct s3c2410fb_mach_info mini2440_fb_info __initdata = { | 194 | static struct s3c2410fb_mach_info mini2440_fb_info __initdata = { |
195 | .displays = &mini2440_lcd_cfg[0], /* not constant! see init */ | 195 | .displays = &mini2440_lcd_cfg[0], /* not constant! see init */ |
196 | .num_displays = 1, | 196 | .num_displays = 1, |
197 | .default_display = 0, | 197 | .default_display = 0, |
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h index 1067619f0ba0..004edab23954 100644 --- a/arch/arm/mach-s3c6400/include/mach/dma.h +++ b/arch/arm/mach-s3c6400/include/mach/dma.h | |||
@@ -68,6 +68,11 @@ static __inline__ int s3c_dma_has_circular(void) | |||
68 | 68 | ||
69 | #define S3C2410_DMAF_CIRCULAR (1 << 0) | 69 | #define S3C2410_DMAF_CIRCULAR (1 << 0) |
70 | 70 | ||
71 | static inline bool s3c_dma_has_circular(void) | ||
72 | { | ||
73 | return false; | ||
74 | } | ||
75 | |||
71 | #include <plat/dma.h> | 76 | #include <plat/dma.h> |
72 | 77 | ||
73 | #endif /* __ASM_ARCH_IRQ_H */ | 78 | #endif /* __ASM_ARCH_IRQ_H */ |
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index 6bda76a43199..a9e22e31eaa1 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c | |||
@@ -50,10 +50,7 @@ void __new_context(struct mm_struct *mm) | |||
50 | isb(); | 50 | isb(); |
51 | flush_tlb_all(); | 51 | flush_tlb_all(); |
52 | if (icache_is_vivt_asid_tagged()) { | 52 | if (icache_is_vivt_asid_tagged()) { |
53 | asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" | 53 | __flush_icache_all(); |
54 | "mcr p15, 0, %0, c7, c5, 6 @ flush BTAC/BTB\n" | ||
55 | : | ||
56 | : "r" (0)); | ||
57 | dsb(); | 54 | dsb(); |
58 | } | 55 | } |
59 | } | 56 | } |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index b30925fcbcdc..b9590a7085ca 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -205,7 +205,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | |||
205 | 205 | ||
206 | order = get_order(size); | 206 | order = get_order(size); |
207 | 207 | ||
208 | if (mask != 0xffffffff) | 208 | if (mask < 0xffffffffULL) |
209 | gfp |= GFP_DMA; | 209 | gfp |= GFP_DMA; |
210 | 210 | ||
211 | page = alloc_pages(gfp, order); | 211 | page = alloc_pages(gfp, order); |
@@ -289,7 +289,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | |||
289 | if (!mask) | 289 | if (!mask) |
290 | goto error; | 290 | goto error; |
291 | 291 | ||
292 | if (mask != 0xffffffff) | 292 | if (mask < 0xffffffffULL) |
293 | gfp |= GFP_DMA; | 293 | gfp |= GFP_DMA; |
294 | virt = kmalloc(size, gfp); | 294 | virt = kmalloc(size, gfp); |
295 | if (!virt) | 295 | if (!virt) |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index b27942909b23..7f294f307c83 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -18,10 +18,6 @@ | |||
18 | 18 | ||
19 | #include "mm.h" | 19 | #include "mm.h" |
20 | 20 | ||
21 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
22 | extern void v6_icache_inval_all(void); | ||
23 | #endif | ||
24 | |||
25 | #ifdef CONFIG_CPU_CACHE_VIPT | 21 | #ifdef CONFIG_CPU_CACHE_VIPT |
26 | 22 | ||
27 | #define ALIAS_FLUSH_START 0xffff4000 | 23 | #define ALIAS_FLUSH_START 0xffff4000 |
@@ -35,16 +31,11 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) | |||
35 | flush_tlb_kernel_page(to); | 31 | flush_tlb_kernel_page(to); |
36 | 32 | ||
37 | asm( "mcrr p15, 0, %1, %0, c14\n" | 33 | asm( "mcrr p15, 0, %1, %0, c14\n" |
38 | " mcr p15, 0, %2, c7, c10, 4\n" | 34 | " mcr p15, 0, %2, c7, c10, 4" |
39 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
40 | " mcr p15, 0, %2, c7, c5, 0\n" | ||
41 | #endif | ||
42 | : | 35 | : |
43 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) | 36 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) |
44 | : "cc"); | 37 | : "cc"); |
45 | #ifdef CONFIG_ARM_ERRATA_411920 | 38 | __flush_icache_all(); |
46 | v6_icache_inval_all(); | ||
47 | #endif | ||
48 | } | 39 | } |
49 | 40 | ||
50 | void flush_cache_mm(struct mm_struct *mm) | 41 | void flush_cache_mm(struct mm_struct *mm) |
@@ -57,16 +48,11 @@ void flush_cache_mm(struct mm_struct *mm) | |||
57 | 48 | ||
58 | if (cache_is_vipt_aliasing()) { | 49 | if (cache_is_vipt_aliasing()) { |
59 | asm( "mcr p15, 0, %0, c7, c14, 0\n" | 50 | asm( "mcr p15, 0, %0, c7, c14, 0\n" |
60 | " mcr p15, 0, %0, c7, c10, 4\n" | 51 | " mcr p15, 0, %0, c7, c10, 4" |
61 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
62 | " mcr p15, 0, %0, c7, c5, 0\n" | ||
63 | #endif | ||
64 | : | 52 | : |
65 | : "r" (0) | 53 | : "r" (0) |
66 | : "cc"); | 54 | : "cc"); |
67 | #ifdef CONFIG_ARM_ERRATA_411920 | 55 | __flush_icache_all(); |
68 | v6_icache_inval_all(); | ||
69 | #endif | ||
70 | } | 56 | } |
71 | } | 57 | } |
72 | 58 | ||
@@ -81,16 +67,11 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned | |||
81 | 67 | ||
82 | if (cache_is_vipt_aliasing()) { | 68 | if (cache_is_vipt_aliasing()) { |
83 | asm( "mcr p15, 0, %0, c7, c14, 0\n" | 69 | asm( "mcr p15, 0, %0, c7, c14, 0\n" |
84 | " mcr p15, 0, %0, c7, c10, 4\n" | 70 | " mcr p15, 0, %0, c7, c10, 4" |
85 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
86 | " mcr p15, 0, %0, c7, c5, 0\n" | ||
87 | #endif | ||
88 | : | 71 | : |
89 | : "r" (0) | 72 | : "r" (0) |
90 | : "cc"); | 73 | : "cc"); |
91 | #ifdef CONFIG_ARM_ERRATA_411920 | 74 | __flush_icache_all(); |
92 | v6_icache_inval_all(); | ||
93 | #endif | ||
94 | } | 75 | } |
95 | } | 76 | } |
96 | 77 | ||
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 40940d7ce4ff..52c40d155672 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -273,7 +273,6 @@ static void __init bootmem_init_node(int node, struct meminfo *mi, | |||
273 | struct membank *bank = &mi->bank[i]; | 273 | struct membank *bank = &mi->bank[i]; |
274 | if (!bank->highmem) | 274 | if (!bank->highmem) |
275 | free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); | 275 | free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); |
276 | memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank)); | ||
277 | } | 276 | } |
278 | 277 | ||
279 | /* | 278 | /* |
@@ -370,6 +369,19 @@ int pfn_valid(unsigned long pfn) | |||
370 | return 0; | 369 | return 0; |
371 | } | 370 | } |
372 | EXPORT_SYMBOL(pfn_valid); | 371 | EXPORT_SYMBOL(pfn_valid); |
372 | |||
373 | static void arm_memory_present(struct meminfo *mi, int node) | ||
374 | { | ||
375 | } | ||
376 | #else | ||
377 | static void arm_memory_present(struct meminfo *mi, int node) | ||
378 | { | ||
379 | int i; | ||
380 | for_each_nodebank(i, mi, node) { | ||
381 | struct membank *bank = &mi->bank[i]; | ||
382 | memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank)); | ||
383 | } | ||
384 | } | ||
373 | #endif | 385 | #endif |
374 | 386 | ||
375 | static int __init meminfo_cmp(const void *_a, const void *_b) | 387 | static int __init meminfo_cmp(const void *_a, const void *_b) |
@@ -427,6 +439,12 @@ void __init bootmem_init(void) | |||
427 | */ | 439 | */ |
428 | if (node == initrd_node) | 440 | if (node == initrd_node) |
429 | bootmem_reserve_initrd(node); | 441 | bootmem_reserve_initrd(node); |
442 | |||
443 | /* | ||
444 | * Sparsemem tries to allocate bootmem in memory_present(), | ||
445 | * so must be done after the fixed reservations | ||
446 | */ | ||
447 | arm_memory_present(mi, node); | ||
430 | } | 448 | } |
431 | 449 | ||
432 | /* | 450 | /* |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 02243eeccf50..ea67be0223ac 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p) | |||
117 | } | 117 | } |
118 | if (i == ARRAY_SIZE(cache_policies)) | 118 | if (i == ARRAY_SIZE(cache_policies)) |
119 | printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); | 119 | printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); |
120 | /* | ||
121 | * This restriction is partly to do with the way we boot; it is | ||
122 | * unpredictable to have memory mapped using two different sets of | ||
123 | * memory attributes (shared, type, and cache attribs). We can not | ||
124 | * change these attributes once the initial assembly has setup the | ||
125 | * page tables. | ||
126 | */ | ||
120 | if (cpu_architecture() >= CPU_ARCH_ARMv6) { | 127 | if (cpu_architecture() >= CPU_ARCH_ARMv6) { |
121 | printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); | 128 | printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); |
122 | cachepolicy = CPOLICY_WRITEBACK; | 129 | cachepolicy = CPOLICY_WRITEBACK; |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 194737d60a22..70f75d2e3ead 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -32,8 +32,10 @@ | |||
32 | 32 | ||
33 | #ifndef CONFIG_SMP | 33 | #ifndef CONFIG_SMP |
34 | #define TTB_FLAGS TTB_RGN_WBWA | 34 | #define TTB_FLAGS TTB_RGN_WBWA |
35 | #define PMD_FLAGS PMD_SECT_WB | ||
35 | #else | 36 | #else |
36 | #define TTB_FLAGS TTB_RGN_WBWA|TTB_S | 37 | #define TTB_FLAGS TTB_RGN_WBWA|TTB_S |
38 | #define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S | ||
37 | #endif | 39 | #endif |
38 | 40 | ||
39 | ENTRY(cpu_v6_proc_init) | 41 | ENTRY(cpu_v6_proc_init) |
@@ -222,10 +224,9 @@ __v6_proc_info: | |||
222 | .long 0x0007b000 | 224 | .long 0x0007b000 |
223 | .long 0x0007f000 | 225 | .long 0x0007f000 |
224 | .long PMD_TYPE_SECT | \ | 226 | .long PMD_TYPE_SECT | \ |
225 | PMD_SECT_BUFFERABLE | \ | ||
226 | PMD_SECT_CACHEABLE | \ | ||
227 | PMD_SECT_AP_WRITE | \ | 227 | PMD_SECT_AP_WRITE | \ |
228 | PMD_SECT_AP_READ | 228 | PMD_SECT_AP_READ | \ |
229 | PMD_FLAGS | ||
229 | .long PMD_TYPE_SECT | \ | 230 | .long PMD_TYPE_SECT | \ |
230 | PMD_SECT_XN | \ | 231 | PMD_SECT_XN | \ |
231 | PMD_SECT_AP_WRITE | \ | 232 | PMD_SECT_AP_WRITE | \ |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 23ebcf6eab9f..eeeed01ee44a 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -33,9 +33,11 @@ | |||
33 | #ifndef CONFIG_SMP | 33 | #ifndef CONFIG_SMP |
34 | /* PTWs cacheable, inner WB not shareable, outer WB not shareable */ | 34 | /* PTWs cacheable, inner WB not shareable, outer WB not shareable */ |
35 | #define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB | 35 | #define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB |
36 | #define PMD_FLAGS PMD_SECT_WB | ||
36 | #else | 37 | #else |
37 | /* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ | 38 | /* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ |
38 | #define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA | 39 | #define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA |
40 | #define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S | ||
39 | #endif | 41 | #endif |
40 | 42 | ||
41 | ENTRY(cpu_v7_proc_init) | 43 | ENTRY(cpu_v7_proc_init) |
@@ -326,10 +328,9 @@ __v7_proc_info: | |||
326 | .long 0x000f0000 @ Required ID value | 328 | .long 0x000f0000 @ Required ID value |
327 | .long 0x000f0000 @ Mask for ID | 329 | .long 0x000f0000 @ Mask for ID |
328 | .long PMD_TYPE_SECT | \ | 330 | .long PMD_TYPE_SECT | \ |
329 | PMD_SECT_BUFFERABLE | \ | ||
330 | PMD_SECT_CACHEABLE | \ | ||
331 | PMD_SECT_AP_WRITE | \ | 331 | PMD_SECT_AP_WRITE | \ |
332 | PMD_SECT_AP_READ | 332 | PMD_SECT_AP_READ | \ |
333 | PMD_FLAGS | ||
333 | .long PMD_TYPE_SECT | \ | 334 | .long PMD_TYPE_SECT | \ |
334 | PMD_SECT_XN | \ | 335 | PMD_SECT_XN | \ |
335 | PMD_SECT_AP_WRITE | \ | 336 | PMD_SECT_AP_WRITE | \ |
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c index 4d36b784fb8b..df47322492d5 100644 --- a/arch/arm/plat-s3c24xx/adc.c +++ b/arch/arm/plat-s3c24xx/adc.c | |||
@@ -189,7 +189,7 @@ int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch) | |||
189 | err: | 189 | err: |
190 | return ret; | 190 | return ret; |
191 | } | 191 | } |
192 | EXPORT_SYMBOL_GPL(s3c_adc_convert); | 192 | EXPORT_SYMBOL_GPL(s3c_adc_read); |
193 | 193 | ||
194 | static void s3c_adc_default_select(struct s3c_adc_client *client, | 194 | static void s3c_adc_default_select(struct s3c_adc_client *client, |
195 | unsigned select) | 195 | unsigned select) |
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 5447e60f3936..4af9dd948793 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -61,6 +61,7 @@ static const char name_s3c2410[] = "S3C2410"; | |||
61 | static const char name_s3c2412[] = "S3C2412"; | 61 | static const char name_s3c2412[] = "S3C2412"; |
62 | static const char name_s3c2440[] = "S3C2440"; | 62 | static const char name_s3c2440[] = "S3C2440"; |
63 | static const char name_s3c2442[] = "S3C2442"; | 63 | static const char name_s3c2442[] = "S3C2442"; |
64 | static const char name_s3c2442b[] = "S3C2442B"; | ||
64 | static const char name_s3c2443[] = "S3C2443"; | 65 | static const char name_s3c2443[] = "S3C2443"; |
65 | static const char name_s3c2410a[] = "S3C2410A"; | 66 | static const char name_s3c2410a[] = "S3C2410A"; |
66 | static const char name_s3c2440a[] = "S3C2440A"; | 67 | static const char name_s3c2440a[] = "S3C2440A"; |
@@ -112,6 +113,15 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
112 | .name = name_s3c2442 | 113 | .name = name_s3c2442 |
113 | }, | 114 | }, |
114 | { | 115 | { |
116 | .idcode = 0x32440aab, | ||
117 | .idmask = 0xffffffff, | ||
118 | .map_io = s3c244x_map_io, | ||
119 | .init_clocks = s3c244x_init_clocks, | ||
120 | .init_uarts = s3c244x_init_uarts, | ||
121 | .init = s3c2442_init, | ||
122 | .name = name_s3c2442b | ||
123 | }, | ||
124 | { | ||
115 | .idcode = 0x32412001, | 125 | .idcode = 0x32412001, |
116 | .idmask = 0xffffffff, | 126 | .idmask = 0xffffffff, |
117 | .map_io = s3c2412_map_io, | 127 | .map_io = s3c2412_map_io, |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 196b19123653..f046f8c51084 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -208,14 +208,14 @@ s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan, | |||
208 | { | 208 | { |
209 | unsigned long reload; | 209 | unsigned long reload; |
210 | 210 | ||
211 | pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n", | ||
212 | buf, (unsigned long)buf->data, buf->size); | ||
213 | |||
214 | if (buf == NULL) { | 211 | if (buf == NULL) { |
215 | dmawarn("buffer is NULL\n"); | 212 | dmawarn("buffer is NULL\n"); |
216 | return -EINVAL; | 213 | return -EINVAL; |
217 | } | 214 | } |
218 | 215 | ||
216 | pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n", | ||
217 | buf, (unsigned long)buf->data, buf->size); | ||
218 | |||
219 | /* check the state of the channel before we do anything */ | 219 | /* check the state of the channel before we do anything */ |
220 | 220 | ||
221 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { | 221 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { |
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index 95df059b5a1d..5467470badfd 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/io.h> | 29 | #include <linux/io.h> |
30 | 30 | ||
31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
32 | #include <mach/gpio-fns.h> | ||
32 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
33 | 34 | ||
34 | #include <mach/regs-gpio.h> | 35 | #include <mach/regs-gpio.h> |
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h index efeb025affc7..c776120b99e6 100644 --- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h | |||
@@ -222,7 +222,9 @@ extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *); | |||
222 | /* S3C2410 and compatible exported functions */ | 222 | /* S3C2410 and compatible exported functions */ |
223 | 223 | ||
224 | extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); | 224 | extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); |
225 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); | ||
225 | 226 | ||
227 | #ifdef CONFIG_S3C2410_IOTIMING | ||
226 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, | 228 | extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, |
227 | struct s3c_iotimings *iot); | 229 | struct s3c_iotimings *iot); |
228 | 230 | ||
@@ -231,8 +233,11 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, | |||
231 | 233 | ||
232 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, | 234 | extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, |
233 | struct s3c_iotimings *iot); | 235 | struct s3c_iotimings *iot); |
234 | 236 | #else | |
235 | extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); | 237 | #define s3c2410_iotiming_calc NULL |
238 | #define s3c2410_iotiming_get NULL | ||
239 | #define s3c2410_iotiming_set NULL | ||
240 | #endif /* CONFIG_S3C2410_IOTIMING */ | ||
236 | 241 | ||
237 | /* S3C2412 compatible routines */ | 242 | /* S3C2412 compatible routines */ |
238 | 243 | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h index b6deeef8f663..82ab4aad1bbe 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h | |||
@@ -27,6 +27,7 @@ extern void s3c2410_init_clocks(int xtal); | |||
27 | #define s3c2410_init_uarts NULL | 27 | #define s3c2410_init_uarts NULL |
28 | #define s3c2410_map_io NULL | 28 | #define s3c2410_map_io NULL |
29 | #define s3c2410_init NULL | 29 | #define s3c2410_init NULL |
30 | #define s3c2410a_init NULL | ||
30 | #endif | 31 | #endif |
31 | 32 | ||
32 | extern int s3c2410_baseclk_add(void); | 33 | extern int s3c2410_baseclk_add(void); |
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h index a8777a755dfa..ff46e7fa957a 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h +++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h | |||
@@ -51,8 +51,8 @@ | |||
51 | #define S3C6400_CLKDIV0_HCLK_SHIFT (8) | 51 | #define S3C6400_CLKDIV0_HCLK_SHIFT (8) |
52 | #define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) | 52 | #define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) |
53 | #define S3C6400_CLKDIV0_MPLL_SHIFT (4) | 53 | #define S3C6400_CLKDIV0_MPLL_SHIFT (4) |
54 | #define S3C6400_CLKDIV0_ARM_MASK (0x3 << 0) | 54 | #define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0) |
55 | #define S3C6410_CLKDIV0_ARM_MASK (0x7 << 0) | 55 | #define S3C6410_CLKDIV0_ARM_MASK (0xf << 0) |
56 | #define S3C6400_CLKDIV0_ARM_SHIFT (0) | 56 | #define S3C6400_CLKDIV0_ARM_SHIFT (0) |
57 | 57 | ||
58 | /* CLKDIV1 */ | 58 | /* CLKDIV1 */ |
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index 9745852261e0..6ffa21eb1b91 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c | |||
@@ -677,6 +677,9 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) | |||
677 | 677 | ||
678 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | 678 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); |
679 | 679 | ||
680 | /* For now assume the mux always selects the crystal */ | ||
681 | clk_ext_xtal_mux.parent = xtal_clk; | ||
682 | |||
680 | epll = s3c6400_get_epll(xtal); | 683 | epll = s3c6400_get_epll(xtal); |
681 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); | 684 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); |
682 | apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); | 685 | apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); |
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h index 44d0bfa1f409..9c96a130f3a8 100644 --- a/arch/avr32/mach-at32ap/include/mach/cpu.h +++ b/arch/avr32/mach-at32ap/include/mach/cpu.h | |||
@@ -31,5 +31,8 @@ | |||
31 | #define cpu_is_at91sam9263() (0) | 31 | #define cpu_is_at91sam9263() (0) |
32 | #define cpu_is_at91sam9rl() (0) | 32 | #define cpu_is_at91sam9rl() (0) |
33 | #define cpu_is_at91cap9() (0) | 33 | #define cpu_is_at91cap9() (0) |
34 | #define cpu_is_at91sam9g10() (0) | ||
35 | #define cpu_is_at91sam9g45() (0) | ||
36 | #define cpu_is_at91sam9g45es() (0) | ||
34 | 37 | ||
35 | #endif /* __ASM_ARCH_CPU_H */ | 38 | #endif /* __ASM_ARCH_CPU_H */ |
diff --git a/arch/ia64/include/asm/spinlock.h b/arch/ia64/include/asm/spinlock.h index 30bb930e1111..239ecdc9516d 100644 --- a/arch/ia64/include/asm/spinlock.h +++ b/arch/ia64/include/asm/spinlock.h | |||
@@ -25,61 +25,82 @@ | |||
25 | * by atomically noting the tail and incrementing it by one (thus adding | 25 | * by atomically noting the tail and incrementing it by one (thus adding |
26 | * ourself to the queue and noting our position), then waiting until the head | 26 | * ourself to the queue and noting our position), then waiting until the head |
27 | * becomes equal to the the initial value of the tail. | 27 | * becomes equal to the the initial value of the tail. |
28 | * The pad bits in the middle are used to prevent the next_ticket number | ||
29 | * overflowing into the now_serving number. | ||
28 | * | 30 | * |
29 | * 63 32 31 0 | 31 | * 31 17 16 15 14 0 |
30 | * +----------------------------------------------------+ | 32 | * +----------------------------------------------------+ |
31 | * | next_ticket_number | now_serving | | 33 | * | now_serving | padding | next_ticket | |
32 | * +----------------------------------------------------+ | 34 | * +----------------------------------------------------+ |
33 | */ | 35 | */ |
34 | 36 | ||
35 | #define TICKET_SHIFT 32 | 37 | #define TICKET_SHIFT 17 |
38 | #define TICKET_BITS 15 | ||
39 | #define TICKET_MASK ((1 << TICKET_BITS) - 1) | ||
36 | 40 | ||
37 | static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock) | 41 | static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock) |
38 | { | 42 | { |
39 | int *p = (int *)&lock->lock, turn, now_serving; | 43 | int *p = (int *)&lock->lock, ticket, serve; |
40 | 44 | ||
41 | now_serving = *p; | 45 | ticket = ia64_fetchadd(1, p, acq); |
42 | turn = ia64_fetchadd(1, p+1, acq); | ||
43 | 46 | ||
44 | if (turn == now_serving) | 47 | if (!(((ticket >> TICKET_SHIFT) ^ ticket) & TICKET_MASK)) |
45 | return; | 48 | return; |
46 | 49 | ||
47 | do { | 50 | ia64_invala(); |
51 | |||
52 | for (;;) { | ||
53 | asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(p) : "memory"); | ||
54 | |||
55 | if (!(((serve >> TICKET_SHIFT) ^ ticket) & TICKET_MASK)) | ||
56 | return; | ||
48 | cpu_relax(); | 57 | cpu_relax(); |
49 | } while (ACCESS_ONCE(*p) != turn); | 58 | } |
50 | } | 59 | } |
51 | 60 | ||
52 | static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock) | 61 | static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock) |
53 | { | 62 | { |
54 | long tmp = ACCESS_ONCE(lock->lock), try; | 63 | int tmp = ACCESS_ONCE(lock->lock); |
55 | |||
56 | if (!(((tmp >> TICKET_SHIFT) ^ tmp) & ((1L << TICKET_SHIFT) - 1))) { | ||
57 | try = tmp + (1L << TICKET_SHIFT); | ||
58 | 64 | ||
59 | return ia64_cmpxchg(acq, &lock->lock, tmp, try, sizeof (tmp)) == tmp; | 65 | if (!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK)) |
60 | } | 66 | return ia64_cmpxchg(acq, &lock->lock, tmp, tmp + 1, sizeof (tmp)) == tmp; |
61 | return 0; | 67 | return 0; |
62 | } | 68 | } |
63 | 69 | ||
64 | static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock) | 70 | static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock) |
65 | { | 71 | { |
66 | int *p = (int *)&lock->lock; | 72 | unsigned short *p = (unsigned short *)&lock->lock + 1, tmp; |
67 | 73 | ||
68 | (void)ia64_fetchadd(1, p, rel); | 74 | asm volatile ("ld2.bias %0=[%1]" : "=r"(tmp) : "r"(p)); |
75 | ACCESS_ONCE(*p) = (tmp + 2) & ~1; | ||
76 | } | ||
77 | |||
78 | static __always_inline void __ticket_spin_unlock_wait(raw_spinlock_t *lock) | ||
79 | { | ||
80 | int *p = (int *)&lock->lock, ticket; | ||
81 | |||
82 | ia64_invala(); | ||
83 | |||
84 | for (;;) { | ||
85 | asm volatile ("ld4.c.nc %0=[%1]" : "=r"(ticket) : "r"(p) : "memory"); | ||
86 | if (!(((ticket >> TICKET_SHIFT) ^ ticket) & TICKET_MASK)) | ||
87 | return; | ||
88 | cpu_relax(); | ||
89 | } | ||
69 | } | 90 | } |
70 | 91 | ||
71 | static inline int __ticket_spin_is_locked(raw_spinlock_t *lock) | 92 | static inline int __ticket_spin_is_locked(raw_spinlock_t *lock) |
72 | { | 93 | { |
73 | long tmp = ACCESS_ONCE(lock->lock); | 94 | long tmp = ACCESS_ONCE(lock->lock); |
74 | 95 | ||
75 | return !!(((tmp >> TICKET_SHIFT) ^ tmp) & ((1L << TICKET_SHIFT) - 1)); | 96 | return !!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK); |
76 | } | 97 | } |
77 | 98 | ||
78 | static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) | 99 | static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) |
79 | { | 100 | { |
80 | long tmp = ACCESS_ONCE(lock->lock); | 101 | long tmp = ACCESS_ONCE(lock->lock); |
81 | 102 | ||
82 | return (((tmp >> TICKET_SHIFT) - tmp) & ((1L << TICKET_SHIFT) - 1)) > 1; | 103 | return ((tmp - (tmp >> TICKET_SHIFT)) & TICKET_MASK) > 1; |
83 | } | 104 | } |
84 | 105 | ||
85 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | 106 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) |
@@ -116,8 +137,7 @@ static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock, | |||
116 | 137 | ||
117 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) | 138 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) |
118 | { | 139 | { |
119 | while (__raw_spin_is_locked(lock)) | 140 | __ticket_spin_unlock_wait(lock); |
120 | cpu_relax(); | ||
121 | } | 141 | } |
122 | 142 | ||
123 | #define __raw_read_can_lock(rw) (*(volatile int *)(rw) >= 0) | 143 | #define __raw_read_can_lock(rw) (*(volatile int *)(rw) >= 0) |
diff --git a/arch/ia64/include/asm/spinlock_types.h b/arch/ia64/include/asm/spinlock_types.h index b61d136d9bc2..474e46f1ab4a 100644 --- a/arch/ia64/include/asm/spinlock_types.h +++ b/arch/ia64/include/asm/spinlock_types.h | |||
@@ -6,7 +6,7 @@ | |||
6 | #endif | 6 | #endif |
7 | 7 | ||
8 | typedef struct { | 8 | typedef struct { |
9 | volatile unsigned long lock; | 9 | volatile unsigned int lock; |
10 | } raw_spinlock_t; | 10 | } raw_spinlock_t; |
11 | 11 | ||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 0 } | 12 | #define __RAW_SPIN_LOCK_UNLOCKED { 0 } |
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index d2877a7bfe2e..496ac7a99488 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c | |||
@@ -887,6 +887,60 @@ ia64_mca_modify_comm(const struct task_struct *previous_current) | |||
887 | memcpy(current->comm, comm, sizeof(current->comm)); | 887 | memcpy(current->comm, comm, sizeof(current->comm)); |
888 | } | 888 | } |
889 | 889 | ||
890 | static void | ||
891 | finish_pt_regs(struct pt_regs *regs, const pal_min_state_area_t *ms, | ||
892 | unsigned long *nat) | ||
893 | { | ||
894 | const u64 *bank; | ||
895 | |||
896 | /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use | ||
897 | * pmsa_{xip,xpsr,xfs} | ||
898 | */ | ||
899 | if (ia64_psr(regs)->ic) { | ||
900 | regs->cr_iip = ms->pmsa_iip; | ||
901 | regs->cr_ipsr = ms->pmsa_ipsr; | ||
902 | regs->cr_ifs = ms->pmsa_ifs; | ||
903 | } else { | ||
904 | regs->cr_iip = ms->pmsa_xip; | ||
905 | regs->cr_ipsr = ms->pmsa_xpsr; | ||
906 | regs->cr_ifs = ms->pmsa_xfs; | ||
907 | } | ||
908 | regs->pr = ms->pmsa_pr; | ||
909 | regs->b0 = ms->pmsa_br0; | ||
910 | regs->ar_rsc = ms->pmsa_rsc; | ||
911 | copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, ®s->r1, nat); | ||
912 | copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, ®s->r2, nat); | ||
913 | copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, ®s->r3, nat); | ||
914 | copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, ®s->r8, nat); | ||
915 | copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, ®s->r9, nat); | ||
916 | copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, ®s->r10, nat); | ||
917 | copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, ®s->r11, nat); | ||
918 | copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, ®s->r12, nat); | ||
919 | copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, ®s->r13, nat); | ||
920 | copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, ®s->r14, nat); | ||
921 | copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, ®s->r15, nat); | ||
922 | if (ia64_psr(regs)->bn) | ||
923 | bank = ms->pmsa_bank1_gr; | ||
924 | else | ||
925 | bank = ms->pmsa_bank0_gr; | ||
926 | copy_reg(&bank[16-16], ms->pmsa_nat_bits, ®s->r16, nat); | ||
927 | copy_reg(&bank[17-16], ms->pmsa_nat_bits, ®s->r17, nat); | ||
928 | copy_reg(&bank[18-16], ms->pmsa_nat_bits, ®s->r18, nat); | ||
929 | copy_reg(&bank[19-16], ms->pmsa_nat_bits, ®s->r19, nat); | ||
930 | copy_reg(&bank[20-16], ms->pmsa_nat_bits, ®s->r20, nat); | ||
931 | copy_reg(&bank[21-16], ms->pmsa_nat_bits, ®s->r21, nat); | ||
932 | copy_reg(&bank[22-16], ms->pmsa_nat_bits, ®s->r22, nat); | ||
933 | copy_reg(&bank[23-16], ms->pmsa_nat_bits, ®s->r23, nat); | ||
934 | copy_reg(&bank[24-16], ms->pmsa_nat_bits, ®s->r24, nat); | ||
935 | copy_reg(&bank[25-16], ms->pmsa_nat_bits, ®s->r25, nat); | ||
936 | copy_reg(&bank[26-16], ms->pmsa_nat_bits, ®s->r26, nat); | ||
937 | copy_reg(&bank[27-16], ms->pmsa_nat_bits, ®s->r27, nat); | ||
938 | copy_reg(&bank[28-16], ms->pmsa_nat_bits, ®s->r28, nat); | ||
939 | copy_reg(&bank[29-16], ms->pmsa_nat_bits, ®s->r29, nat); | ||
940 | copy_reg(&bank[30-16], ms->pmsa_nat_bits, ®s->r30, nat); | ||
941 | copy_reg(&bank[31-16], ms->pmsa_nat_bits, ®s->r31, nat); | ||
942 | } | ||
943 | |||
890 | /* On entry to this routine, we are running on the per cpu stack, see | 944 | /* On entry to this routine, we are running on the per cpu stack, see |
891 | * mca_asm.h. The original stack has not been touched by this event. Some of | 945 | * mca_asm.h. The original stack has not been touched by this event. Some of |
892 | * the original stack's registers will be in the RBS on this stack. This stack | 946 | * the original stack's registers will be in the RBS on this stack. This stack |
@@ -921,7 +975,6 @@ ia64_mca_modify_original_stack(struct pt_regs *regs, | |||
921 | u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1]; | 975 | u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1]; |
922 | u64 ar_bspstore = regs->ar_bspstore; | 976 | u64 ar_bspstore = regs->ar_bspstore; |
923 | u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16); | 977 | u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16); |
924 | const u64 *bank; | ||
925 | const char *msg; | 978 | const char *msg; |
926 | int cpu = smp_processor_id(); | 979 | int cpu = smp_processor_id(); |
927 | 980 | ||
@@ -1024,54 +1077,9 @@ ia64_mca_modify_original_stack(struct pt_regs *regs, | |||
1024 | p = (char *)r12 - sizeof(*regs); | 1077 | p = (char *)r12 - sizeof(*regs); |
1025 | old_regs = (struct pt_regs *)p; | 1078 | old_regs = (struct pt_regs *)p; |
1026 | memcpy(old_regs, regs, sizeof(*regs)); | 1079 | memcpy(old_regs, regs, sizeof(*regs)); |
1027 | /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use | ||
1028 | * pmsa_{xip,xpsr,xfs} | ||
1029 | */ | ||
1030 | if (ia64_psr(regs)->ic) { | ||
1031 | old_regs->cr_iip = ms->pmsa_iip; | ||
1032 | old_regs->cr_ipsr = ms->pmsa_ipsr; | ||
1033 | old_regs->cr_ifs = ms->pmsa_ifs; | ||
1034 | } else { | ||
1035 | old_regs->cr_iip = ms->pmsa_xip; | ||
1036 | old_regs->cr_ipsr = ms->pmsa_xpsr; | ||
1037 | old_regs->cr_ifs = ms->pmsa_xfs; | ||
1038 | } | ||
1039 | old_regs->pr = ms->pmsa_pr; | ||
1040 | old_regs->b0 = ms->pmsa_br0; | ||
1041 | old_regs->loadrs = loadrs; | 1080 | old_regs->loadrs = loadrs; |
1042 | old_regs->ar_rsc = ms->pmsa_rsc; | ||
1043 | old_unat = old_regs->ar_unat; | 1081 | old_unat = old_regs->ar_unat; |
1044 | copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat); | 1082 | finish_pt_regs(old_regs, ms, &old_unat); |
1045 | copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat); | ||
1046 | copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat); | ||
1047 | copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat); | ||
1048 | copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat); | ||
1049 | copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat); | ||
1050 | copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat); | ||
1051 | copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat); | ||
1052 | copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat); | ||
1053 | copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat); | ||
1054 | copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat); | ||
1055 | if (ia64_psr(old_regs)->bn) | ||
1056 | bank = ms->pmsa_bank1_gr; | ||
1057 | else | ||
1058 | bank = ms->pmsa_bank0_gr; | ||
1059 | copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat); | ||
1060 | copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat); | ||
1061 | copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat); | ||
1062 | copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat); | ||
1063 | copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat); | ||
1064 | copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat); | ||
1065 | copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat); | ||
1066 | copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat); | ||
1067 | copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat); | ||
1068 | copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat); | ||
1069 | copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat); | ||
1070 | copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat); | ||
1071 | copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat); | ||
1072 | copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat); | ||
1073 | copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat); | ||
1074 | copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat); | ||
1075 | 1083 | ||
1076 | /* Next stack a struct switch_stack. mca_asm.S built a partial | 1084 | /* Next stack a struct switch_stack. mca_asm.S built a partial |
1077 | * switch_stack, copy it and fill in the blanks using pt_regs and | 1085 | * switch_stack, copy it and fill in the blanks using pt_regs and |
@@ -1141,6 +1149,8 @@ ia64_mca_modify_original_stack(struct pt_regs *regs, | |||
1141 | no_mod: | 1149 | no_mod: |
1142 | mprintk(KERN_INFO "cpu %d, %s %s, original stack not modified\n", | 1150 | mprintk(KERN_INFO "cpu %d, %s %s, original stack not modified\n", |
1143 | smp_processor_id(), type, msg); | 1151 | smp_processor_id(), type, msg); |
1152 | old_unat = regs->ar_unat; | ||
1153 | finish_pt_regs(regs, ms, &old_unat); | ||
1144 | return previous_current; | 1154 | return previous_current; |
1145 | } | 1155 | } |
1146 | 1156 | ||
diff --git a/arch/ia64/kernel/unaligned.c b/arch/ia64/kernel/unaligned.c index 6db08599ebbc..776dd40397e2 100644 --- a/arch/ia64/kernel/unaligned.c +++ b/arch/ia64/kernel/unaligned.c | |||
@@ -60,7 +60,6 @@ dump (const char *str, void *vp, size_t len) | |||
60 | */ | 60 | */ |
61 | int no_unaligned_warning; | 61 | int no_unaligned_warning; |
62 | int unaligned_dump_stack; | 62 | int unaligned_dump_stack; |
63 | static int noprint_warning; | ||
64 | 63 | ||
65 | /* | 64 | /* |
66 | * For M-unit: | 65 | * For M-unit: |
@@ -1357,9 +1356,8 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) | |||
1357 | /* watch for command names containing %s */ | 1356 | /* watch for command names containing %s */ |
1358 | printk(KERN_WARNING "%s", buf); | 1357 | printk(KERN_WARNING "%s", buf); |
1359 | } else { | 1358 | } else { |
1360 | if (no_unaligned_warning && !noprint_warning) { | 1359 | if (no_unaligned_warning) { |
1361 | noprint_warning = 1; | 1360 | printk_once(KERN_WARNING "%s(%d) encountered an " |
1362 | printk(KERN_WARNING "%s(%d) encountered an " | ||
1363 | "unaligned exception which required\n" | 1361 | "unaligned exception which required\n" |
1364 | "kernel assistance, which degrades " | 1362 | "kernel assistance, which degrades " |
1365 | "the performance of the application.\n" | 1363 | "the performance of the application.\n" |
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c index f426dc78d959..ee09d261f2e6 100644 --- a/arch/ia64/mm/tlb.c +++ b/arch/ia64/mm/tlb.c | |||
@@ -100,24 +100,36 @@ wrap_mmu_context (struct mm_struct *mm) | |||
100 | * this primitive it can be moved up to a spinaphore.h header. | 100 | * this primitive it can be moved up to a spinaphore.h header. |
101 | */ | 101 | */ |
102 | struct spinaphore { | 102 | struct spinaphore { |
103 | atomic_t cur; | 103 | unsigned long ticket; |
104 | unsigned long serve; | ||
104 | }; | 105 | }; |
105 | 106 | ||
106 | static inline void spinaphore_init(struct spinaphore *ss, int val) | 107 | static inline void spinaphore_init(struct spinaphore *ss, int val) |
107 | { | 108 | { |
108 | atomic_set(&ss->cur, val); | 109 | ss->ticket = 0; |
110 | ss->serve = val; | ||
109 | } | 111 | } |
110 | 112 | ||
111 | static inline void down_spin(struct spinaphore *ss) | 113 | static inline void down_spin(struct spinaphore *ss) |
112 | { | 114 | { |
113 | while (unlikely(!atomic_add_unless(&ss->cur, -1, 0))) | 115 | unsigned long t = ia64_fetchadd(1, &ss->ticket, acq), serve; |
114 | while (atomic_read(&ss->cur) == 0) | 116 | |
115 | cpu_relax(); | 117 | if (time_before(t, ss->serve)) |
118 | return; | ||
119 | |||
120 | ia64_invala(); | ||
121 | |||
122 | for (;;) { | ||
123 | asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(&ss->serve) : "memory"); | ||
124 | if (time_before(t, serve)) | ||
125 | return; | ||
126 | cpu_relax(); | ||
127 | } | ||
116 | } | 128 | } |
117 | 129 | ||
118 | static inline void up_spin(struct spinaphore *ss) | 130 | static inline void up_spin(struct spinaphore *ss) |
119 | { | 131 | { |
120 | atomic_add(1, &ss->cur); | 132 | ia64_fetchadd(1, &ss->serve, rel); |
121 | } | 133 | } |
122 | 134 | ||
123 | static struct spinaphore ptcg_sem; | 135 | static struct spinaphore ptcg_sem; |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 7de76dd352fe..c0fca2c1c858 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -56,10 +56,13 @@ int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn, | |||
56 | if ((seg | reg) <= 255) { | 56 | if ((seg | reg) <= 255) { |
57 | addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); | 57 | addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); |
58 | mode = 0; | 58 | mode = 0; |
59 | } else { | 59 | } else if (sal_revision >= SAL_VERSION_CODE(3,2)) { |
60 | addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); | 60 | addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); |
61 | mode = 1; | 61 | mode = 1; |
62 | } else { | ||
63 | return -EINVAL; | ||
62 | } | 64 | } |
65 | |||
63 | result = ia64_sal_pci_config_read(addr, mode, len, &data); | 66 | result = ia64_sal_pci_config_read(addr, mode, len, &data); |
64 | if (result != 0) | 67 | if (result != 0) |
65 | return -EINVAL; | 68 | return -EINVAL; |
@@ -80,9 +83,11 @@ int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn, | |||
80 | if ((seg | reg) <= 255) { | 83 | if ((seg | reg) <= 255) { |
81 | addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); | 84 | addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); |
82 | mode = 0; | 85 | mode = 0; |
83 | } else { | 86 | } else if (sal_revision >= SAL_VERSION_CODE(3,2)) { |
84 | addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); | 87 | addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); |
85 | mode = 1; | 88 | mode = 1; |
89 | } else { | ||
90 | return -EINVAL; | ||
86 | } | 91 | } |
87 | result = ia64_sal_pci_config_write(addr, mode, len, value); | 92 | result = ia64_sal_pci_config_write(addr, mode, len, value); |
88 | if (result != 0) | 93 | if (result != 0) |
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c index 25831c47c579..308e6595110e 100644 --- a/arch/ia64/sn/kernel/io_common.c +++ b/arch/ia64/sn/kernel/io_common.c | |||
@@ -119,7 +119,6 @@ sn_pcidev_info_get(struct pci_dev *dev) | |||
119 | * Additionally note that the struct sn_flush_device_war also has to be | 119 | * Additionally note that the struct sn_flush_device_war also has to be |
120 | * removed from arch/ia64/sn/include/xtalk/hubdev.h | 120 | * removed from arch/ia64/sn/include/xtalk/hubdev.h |
121 | */ | 121 | */ |
122 | static u8 war_implemented = 0; | ||
123 | 122 | ||
124 | static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device, | 123 | static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device, |
125 | struct sn_flush_device_common *common) | 124 | struct sn_flush_device_common *common) |
@@ -128,11 +127,8 @@ static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device, | |||
128 | struct sn_flush_device_war *dev_entry; | 127 | struct sn_flush_device_war *dev_entry; |
129 | struct ia64_sal_retval isrv = {0,0,0,0}; | 128 | struct ia64_sal_retval isrv = {0,0,0,0}; |
130 | 129 | ||
131 | if (!war_implemented) { | 130 | printk_once(KERN_WARNING |
132 | printk(KERN_WARNING "PROM version < 4.50 -- implementing old " | 131 | "PROM version < 4.50 -- implementing old PROM flush WAR\n"); |
133 | "PROM flush WAR\n"); | ||
134 | war_implemented = 1; | ||
135 | } | ||
136 | 132 | ||
137 | war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL); | 133 | war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL); |
138 | BUG_ON(!war_list); | 134 | BUG_ON(!war_list); |
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c index 4c7e74790958..55ac3c4e11d2 100644 --- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c +++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c | |||
@@ -786,17 +786,18 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, unsigned long arg) | |||
786 | break; | 786 | break; |
787 | 787 | ||
788 | case SN_HWPERF_GET_OBJ_NODE: | 788 | case SN_HWPERF_GET_OBJ_NODE: |
789 | if (a.sz != sizeof(u64) || a.arg < 0) { | 789 | i = a.arg; |
790 | if (a.sz != sizeof(u64) || i < 0) { | ||
790 | r = -EINVAL; | 791 | r = -EINVAL; |
791 | goto error; | 792 | goto error; |
792 | } | 793 | } |
793 | if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) { | 794 | if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) { |
794 | if (a.arg >= nobj) { | 795 | if (i >= nobj) { |
795 | r = -EINVAL; | 796 | r = -EINVAL; |
796 | vfree(objs); | 797 | vfree(objs); |
797 | goto error; | 798 | goto error; |
798 | } | 799 | } |
799 | if (objs[(i = a.arg)].id != a.arg) { | 800 | if (objs[i].id != a.arg) { |
800 | for (i = 0; i < nobj; i++) { | 801 | for (i = 0; i < nobj; i++) { |
801 | if (objs[i].id == a.arg) | 802 | if (objs[i].id == a.arg) |
802 | break; | 803 | break; |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 705a7a9170f3..03bd56a2fb6e 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -1012,9 +1012,9 @@ config BOOT_ELF32 | |||
1012 | 1012 | ||
1013 | config MIPS_L1_CACHE_SHIFT | 1013 | config MIPS_L1_CACHE_SHIFT |
1014 | int | 1014 | int |
1015 | default "4" if MACH_DECSTATION || MIKROTIK_RB532 | 1015 | default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL |
1016 | default "6" if MIPS_CPU_SCACHE | ||
1016 | default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON | 1017 | default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON |
1017 | default "4" if PMC_MSP4200_EVAL | ||
1018 | default "5" | 1018 | default "5" |
1019 | 1019 | ||
1020 | config HAVE_STD_PC_SERIAL_PORT | 1020 | config HAVE_STD_PC_SERIAL_PORT |
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index c88c821b4c36..d670928afcfd 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c | |||
@@ -354,6 +354,28 @@ static void au1x_ic1_ack(unsigned int irq_nr) | |||
354 | au_sync(); | 354 | au_sync(); |
355 | } | 355 | } |
356 | 356 | ||
357 | static void au1x_ic0_maskack(unsigned int irq_nr) | ||
358 | { | ||
359 | unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; | ||
360 | |||
361 | au_writel(1 << bit, IC0_WAKECLR); | ||
362 | au_writel(1 << bit, IC0_MASKCLR); | ||
363 | au_writel(1 << bit, IC0_RISINGCLR); | ||
364 | au_writel(1 << bit, IC0_FALLINGCLR); | ||
365 | au_sync(); | ||
366 | } | ||
367 | |||
368 | static void au1x_ic1_maskack(unsigned int irq_nr) | ||
369 | { | ||
370 | unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; | ||
371 | |||
372 | au_writel(1 << bit, IC1_WAKECLR); | ||
373 | au_writel(1 << bit, IC1_MASKCLR); | ||
374 | au_writel(1 << bit, IC1_RISINGCLR); | ||
375 | au_writel(1 << bit, IC1_FALLINGCLR); | ||
376 | au_sync(); | ||
377 | } | ||
378 | |||
357 | static int au1x_ic1_setwake(unsigned int irq, unsigned int on) | 379 | static int au1x_ic1_setwake(unsigned int irq, unsigned int on) |
358 | { | 380 | { |
359 | unsigned int bit = irq - AU1000_INTC1_INT_BASE; | 381 | unsigned int bit = irq - AU1000_INTC1_INT_BASE; |
@@ -379,25 +401,21 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on) | |||
379 | /* | 401 | /* |
380 | * irq_chips for both ICs; this way the mask handlers can be | 402 | * irq_chips for both ICs; this way the mask handlers can be |
381 | * as short as possible. | 403 | * as short as possible. |
382 | * | ||
383 | * NOTE: the ->ack() callback is used by the handle_edge_irq | ||
384 | * flowhandler only, the ->mask_ack() one by handle_level_irq, | ||
385 | * so no need for an irq_chip for each type of irq (level/edge). | ||
386 | */ | 404 | */ |
387 | static struct irq_chip au1x_ic0_chip = { | 405 | static struct irq_chip au1x_ic0_chip = { |
388 | .name = "Alchemy-IC0", | 406 | .name = "Alchemy-IC0", |
389 | .ack = au1x_ic0_ack, /* edge */ | 407 | .ack = au1x_ic0_ack, |
390 | .mask = au1x_ic0_mask, | 408 | .mask = au1x_ic0_mask, |
391 | .mask_ack = au1x_ic0_mask, /* level */ | 409 | .mask_ack = au1x_ic0_maskack, |
392 | .unmask = au1x_ic0_unmask, | 410 | .unmask = au1x_ic0_unmask, |
393 | .set_type = au1x_ic_settype, | 411 | .set_type = au1x_ic_settype, |
394 | }; | 412 | }; |
395 | 413 | ||
396 | static struct irq_chip au1x_ic1_chip = { | 414 | static struct irq_chip au1x_ic1_chip = { |
397 | .name = "Alchemy-IC1", | 415 | .name = "Alchemy-IC1", |
398 | .ack = au1x_ic1_ack, /* edge */ | 416 | .ack = au1x_ic1_ack, |
399 | .mask = au1x_ic1_mask, | 417 | .mask = au1x_ic1_mask, |
400 | .mask_ack = au1x_ic1_mask, /* level */ | 418 | .mask_ack = au1x_ic1_maskack, |
401 | .unmask = au1x_ic1_unmask, | 419 | .unmask = au1x_ic1_unmask, |
402 | .set_type = au1x_ic_settype, | 420 | .set_type = au1x_ic_settype, |
403 | .set_wake = au1x_ic1_setwake, | 421 | .set_wake = au1x_ic1_setwake, |
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index cc32c69a74ad..45b61c9b82b9 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c | |||
@@ -69,6 +69,7 @@ void __init board_setup(void) | |||
69 | #else | 69 | #else |
70 | au_writel(0xf, Au1500_PCI_CFG); | 70 | au_writel(0xf, Au1500_PCI_CFG); |
71 | #endif | 71 | #endif |
72 | board_pci_idsel = mtx1_pci_idsel; | ||
72 | #endif | 73 | #endif |
73 | 74 | ||
74 | /* Initialize sys_pinfunc */ | 75 | /* Initialize sys_pinfunc */ |
@@ -85,8 +86,6 @@ void __init board_setup(void) | |||
85 | alchemy_gpio_direction_output(211, 1); /* green on */ | 86 | alchemy_gpio_direction_output(211, 1); /* green on */ |
86 | alchemy_gpio_direction_output(212, 0); /* red off */ | 87 | alchemy_gpio_direction_output(212, 0); /* red off */ |
87 | 88 | ||
88 | board_pci_idsel = mtx1_pci_idsel; | ||
89 | |||
90 | printk(KERN_INFO "4G Systems MTX-1 Board\n"); | 89 | printk(KERN_INFO "4G Systems MTX-1 Board\n"); |
91 | } | 90 | } |
92 | 91 | ||
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index e2278c04459d..835f3f0319ca 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c | |||
@@ -503,6 +503,7 @@ static int __init ar7_register_devices(void) | |||
503 | { | 503 | { |
504 | u16 chip_id; | 504 | u16 chip_id; |
505 | int res; | 505 | int res; |
506 | u32 *bootcr, val; | ||
506 | #ifdef CONFIG_SERIAL_8250 | 507 | #ifdef CONFIG_SERIAL_8250 |
507 | static struct uart_port uart_port[2]; | 508 | static struct uart_port uart_port[2]; |
508 | 509 | ||
@@ -595,7 +596,13 @@ static int __init ar7_register_devices(void) | |||
595 | 596 | ||
596 | ar7_wdt_res.end = ar7_wdt_res.start + 0x20; | 597 | ar7_wdt_res.end = ar7_wdt_res.start + 0x20; |
597 | 598 | ||
598 | res = platform_device_register(&ar7_wdt); | 599 | bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); |
600 | val = *bootcr; | ||
601 | iounmap(bootcr); | ||
602 | |||
603 | /* Register watchdog only if enabled in hardware */ | ||
604 | if (val & AR7_WDT_HW_ENA) | ||
605 | res = platform_device_register(&ar7_wdt); | ||
599 | 606 | ||
600 | return res; | 607 | return res; |
601 | } | 608 | } |
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile index c146d1ededed..00064b660809 100644 --- a/arch/mips/bcm63xx/Makefile +++ b/arch/mips/bcm63xx/Makefile | |||
@@ -1,5 +1,5 @@ | |||
1 | obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ | 1 | obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ |
2 | dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o | 2 | dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o |
3 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 3 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
4 | 4 | ||
5 | obj-y += boards/ | 5 | obj-y += boards/ |
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c index 78e155d21be6..05a35cf5963d 100644 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <bcm63xx_dev_enet.h> | 24 | #include <bcm63xx_dev_enet.h> |
25 | #include <bcm63xx_dev_dsp.h> | 25 | #include <bcm63xx_dev_dsp.h> |
26 | #include <bcm63xx_dev_pcmcia.h> | 26 | #include <bcm63xx_dev_pcmcia.h> |
27 | #include <bcm63xx_dev_uart.h> | ||
28 | #include <board_bcm963xx.h> | 27 | #include <board_bcm963xx.h> |
29 | 28 | ||
30 | #define PFX "board_bcm963xx: " | 29 | #define PFX "board_bcm963xx: " |
@@ -794,8 +793,6 @@ int __init board_register_devices(void) | |||
794 | { | 793 | { |
795 | u32 val; | 794 | u32 val; |
796 | 795 | ||
797 | bcm63xx_uart_register(); | ||
798 | |||
799 | if (board.has_pccard) | 796 | if (board.has_pccard) |
800 | bcm63xx_pcmcia_register(); | 797 | bcm63xx_pcmcia_register(); |
801 | 798 | ||
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index 6dc43f0483e8..70378bb5e3f9 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/cpu.h> | 12 | #include <linux/cpu.h> |
13 | #include <asm/cpu-info.h> | ||
13 | #include <bcm63xx_cpu.h> | 14 | #include <bcm63xx_cpu.h> |
14 | #include <bcm63xx_regs.h> | 15 | #include <bcm63xx_regs.h> |
15 | #include <bcm63xx_io.h> | 16 | #include <bcm63xx_io.h> |
@@ -284,6 +285,7 @@ void __init bcm63xx_cpu_init(void) | |||
284 | { | 285 | { |
285 | unsigned int tmp, expected_cpu_id; | 286 | unsigned int tmp, expected_cpu_id; |
286 | struct cpuinfo_mips *c = ¤t_cpu_data; | 287 | struct cpuinfo_mips *c = ¤t_cpu_data; |
288 | unsigned int cpu = smp_processor_id(); | ||
287 | 289 | ||
288 | /* soc registers location depends on cpu type */ | 290 | /* soc registers location depends on cpu type */ |
289 | expected_cpu_id = 0; | 291 | expected_cpu_id = 0; |
@@ -293,6 +295,7 @@ void __init bcm63xx_cpu_init(void) | |||
293 | * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c | 295 | * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c |
294 | */ | 296 | */ |
295 | case CPU_BCM3302: | 297 | case CPU_BCM3302: |
298 | __cpu_name[cpu] = "Broadcom BCM6338"; | ||
296 | expected_cpu_id = BCM6338_CPU_ID; | 299 | expected_cpu_id = BCM6338_CPU_ID; |
297 | bcm63xx_regs_base = bcm96338_regs_base; | 300 | bcm63xx_regs_base = bcm96338_regs_base; |
298 | bcm63xx_irqs = bcm96338_irqs; | 301 | bcm63xx_irqs = bcm96338_irqs; |
diff --git a/arch/mips/bcm63xx/dev-uart.c b/arch/mips/bcm63xx/dev-uart.c index 5f3d89c4a988..b0519461ad9b 100644 --- a/arch/mips/bcm63xx/dev-uart.c +++ b/arch/mips/bcm63xx/dev-uart.c | |||
@@ -10,7 +10,6 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <bcm63xx_cpu.h> | 12 | #include <bcm63xx_cpu.h> |
13 | #include <bcm63xx_dev_uart.h> | ||
14 | 13 | ||
15 | static struct resource uart_resources[] = { | 14 | static struct resource uart_resources[] = { |
16 | { | 15 | { |
@@ -39,3 +38,4 @@ int __init bcm63xx_uart_register(void) | |||
39 | uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); | 38 | uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); |
40 | return platform_device_register(&bcm63xx_uart_device); | 39 | return platform_device_register(&bcm63xx_uart_device); |
41 | } | 40 | } |
41 | arch_initcall(bcm63xx_uart_register); | ||
diff --git a/arch/mips/bcm63xx/dev-wdt.c b/arch/mips/bcm63xx/dev-wdt.c new file mode 100644 index 000000000000..3e6c716a4c11 --- /dev/null +++ b/arch/mips/bcm63xx/dev-wdt.c | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> | ||
7 | */ | ||
8 | |||
9 | #include <linux/init.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <bcm63xx_cpu.h> | ||
13 | |||
14 | static struct resource wdt_resources[] = { | ||
15 | { | ||
16 | .start = -1, /* filled at runtime */ | ||
17 | .end = -1, /* filled at runtime */ | ||
18 | .flags = IORESOURCE_MEM, | ||
19 | }, | ||
20 | }; | ||
21 | |||
22 | static struct platform_device bcm63xx_wdt_device = { | ||
23 | .name = "bcm63xx-wdt", | ||
24 | .id = 0, | ||
25 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
26 | .resource = wdt_resources, | ||
27 | }; | ||
28 | |||
29 | int __init bcm63xx_wdt_register(void) | ||
30 | { | ||
31 | wdt_resources[0].start = bcm63xx_regset_address(RSET_WDT); | ||
32 | wdt_resources[0].end = wdt_resources[0].start; | ||
33 | wdt_resources[0].end += RSET_WDT_SIZE - 1; | ||
34 | |||
35 | return platform_device_register(&bcm63xx_wdt_device); | ||
36 | } | ||
37 | arch_initcall(bcm63xx_wdt_register); | ||
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c index b18a0ca926fa..d0056598fbfc 100644 --- a/arch/mips/bcm63xx/setup.c +++ b/arch/mips/bcm63xx/setup.c | |||
@@ -75,7 +75,9 @@ void bcm63xx_machine_reboot(void) | |||
75 | bcm6348_a1_reboot(); | 75 | bcm6348_a1_reboot(); |
76 | 76 | ||
77 | printk(KERN_INFO "triggering watchdog soft-reset...\n"); | 77 | printk(KERN_INFO "triggering watchdog soft-reset...\n"); |
78 | bcm_perf_writel(SYS_PLL_SOFT_RESET, PERF_SYS_PLL_CTL_REG); | 78 | reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); |
79 | reg |= SYS_PLL_SOFT_RESET; | ||
80 | bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); | ||
79 | while (1) | 81 | while (1) |
80 | ; | 82 | ; |
81 | } | 83 | } |
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 384f1842bfb1..6f2acf09328d 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -17,6 +17,15 @@ DEFINE_RWLOCK(octeon_irq_ciu0_rwlock); | |||
17 | DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); | 17 | DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); |
18 | DEFINE_SPINLOCK(octeon_irq_msi_lock); | 18 | DEFINE_SPINLOCK(octeon_irq_msi_lock); |
19 | 19 | ||
20 | static int octeon_coreid_for_cpu(int cpu) | ||
21 | { | ||
22 | #ifdef CONFIG_SMP | ||
23 | return cpu_logical_map(cpu); | ||
24 | #else | ||
25 | return cvmx_get_core_num(); | ||
26 | #endif | ||
27 | } | ||
28 | |||
20 | static void octeon_irq_core_ack(unsigned int irq) | 29 | static void octeon_irq_core_ack(unsigned int irq) |
21 | { | 30 | { |
22 | unsigned int bit = irq - OCTEON_IRQ_SW0; | 31 | unsigned int bit = irq - OCTEON_IRQ_SW0; |
@@ -152,11 +161,10 @@ static void octeon_irq_ciu0_disable(unsigned int irq) | |||
152 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ | 161 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ |
153 | unsigned long flags; | 162 | unsigned long flags; |
154 | uint64_t en0; | 163 | uint64_t en0; |
155 | #ifdef CONFIG_SMP | ||
156 | int cpu; | 164 | int cpu; |
157 | write_lock_irqsave(&octeon_irq_ciu0_rwlock, flags); | 165 | write_lock_irqsave(&octeon_irq_ciu0_rwlock, flags); |
158 | for_each_online_cpu(cpu) { | 166 | for_each_online_cpu(cpu) { |
159 | int coreid = cpu_logical_map(cpu); | 167 | int coreid = octeon_coreid_for_cpu(cpu); |
160 | en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); | 168 | en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); |
161 | en0 &= ~(1ull << bit); | 169 | en0 &= ~(1ull << bit); |
162 | cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); | 170 | cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); |
@@ -167,26 +175,57 @@ static void octeon_irq_ciu0_disable(unsigned int irq) | |||
167 | */ | 175 | */ |
168 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); | 176 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); |
169 | write_unlock_irqrestore(&octeon_irq_ciu0_rwlock, flags); | 177 | write_unlock_irqrestore(&octeon_irq_ciu0_rwlock, flags); |
170 | #else | 178 | } |
171 | int coreid = cvmx_get_core_num(); | 179 | |
172 | local_irq_save(flags); | 180 | /* |
173 | en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); | 181 | * Enable the irq on the current core for chips that have the EN*_W1{S,C} |
174 | en0 &= ~(1ull << bit); | 182 | * registers. |
175 | cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); | 183 | */ |
176 | cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); | 184 | static void octeon_irq_ciu0_enable_v2(unsigned int irq) |
177 | local_irq_restore(flags); | 185 | { |
178 | #endif | 186 | int index = cvmx_get_core_num() * 2; |
187 | u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); | ||
188 | |||
189 | cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); | ||
190 | } | ||
191 | |||
192 | /* | ||
193 | * Disable the irq on the current core for chips that have the EN*_W1{S,C} | ||
194 | * registers. | ||
195 | */ | ||
196 | static void octeon_irq_ciu0_disable_v2(unsigned int irq) | ||
197 | { | ||
198 | int index = cvmx_get_core_num() * 2; | ||
199 | u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); | ||
200 | |||
201 | cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); | ||
202 | } | ||
203 | |||
204 | /* | ||
205 | * Disable the irq on the all cores for chips that have the EN*_W1{S,C} | ||
206 | * registers. | ||
207 | */ | ||
208 | static void octeon_irq_ciu0_disable_all_v2(unsigned int irq) | ||
209 | { | ||
210 | u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); | ||
211 | int index; | ||
212 | int cpu; | ||
213 | for_each_online_cpu(cpu) { | ||
214 | index = octeon_coreid_for_cpu(cpu) * 2; | ||
215 | cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); | ||
216 | } | ||
179 | } | 217 | } |
180 | 218 | ||
181 | #ifdef CONFIG_SMP | 219 | #ifdef CONFIG_SMP |
182 | static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) | 220 | static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) |
183 | { | 221 | { |
184 | int cpu; | 222 | int cpu; |
223 | unsigned long flags; | ||
185 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ | 224 | int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ |
186 | 225 | ||
187 | write_lock(&octeon_irq_ciu0_rwlock); | 226 | write_lock_irqsave(&octeon_irq_ciu0_rwlock, flags); |
188 | for_each_online_cpu(cpu) { | 227 | for_each_online_cpu(cpu) { |
189 | int coreid = cpu_logical_map(cpu); | 228 | int coreid = octeon_coreid_for_cpu(cpu); |
190 | uint64_t en0 = | 229 | uint64_t en0 = |
191 | cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); | 230 | cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); |
192 | if (cpumask_test_cpu(cpu, dest)) | 231 | if (cpumask_test_cpu(cpu, dest)) |
@@ -200,11 +239,45 @@ static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask * | |||
200 | * of them are done. | 239 | * of them are done. |
201 | */ | 240 | */ |
202 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); | 241 | cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); |
203 | write_unlock(&octeon_irq_ciu0_rwlock); | 242 | write_unlock_irqrestore(&octeon_irq_ciu0_rwlock, flags); |
204 | 243 | ||
205 | return 0; | 244 | return 0; |
206 | } | 245 | } |
246 | |||
247 | /* | ||
248 | * Set affinity for the irq for chips that have the EN*_W1{S,C} | ||
249 | * registers. | ||
250 | */ | ||
251 | static int octeon_irq_ciu0_set_affinity_v2(unsigned int irq, | ||
252 | const struct cpumask *dest) | ||
253 | { | ||
254 | int cpu; | ||
255 | int index; | ||
256 | u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); | ||
257 | for_each_online_cpu(cpu) { | ||
258 | index = octeon_coreid_for_cpu(cpu) * 2; | ||
259 | if (cpumask_test_cpu(cpu, dest)) | ||
260 | cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); | ||
261 | else | ||
262 | cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); | ||
263 | } | ||
264 | return 0; | ||
265 | } | ||
266 | #endif | ||
267 | |||
268 | /* | ||
269 | * Newer octeon chips have support for lockless CIU operation. | ||
270 | */ | ||
271 | static struct irq_chip octeon_irq_chip_ciu0_v2 = { | ||
272 | .name = "CIU0", | ||
273 | .enable = octeon_irq_ciu0_enable_v2, | ||
274 | .disable = octeon_irq_ciu0_disable_all_v2, | ||
275 | .ack = octeon_irq_ciu0_disable_v2, | ||
276 | .eoi = octeon_irq_ciu0_enable_v2, | ||
277 | #ifdef CONFIG_SMP | ||
278 | .set_affinity = octeon_irq_ciu0_set_affinity_v2, | ||
207 | #endif | 279 | #endif |
280 | }; | ||
208 | 281 | ||
209 | static struct irq_chip octeon_irq_chip_ciu0 = { | 282 | static struct irq_chip octeon_irq_chip_ciu0 = { |
210 | .name = "CIU0", | 283 | .name = "CIU0", |
@@ -269,11 +342,10 @@ static void octeon_irq_ciu1_disable(unsigned int irq) | |||
269 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ | 342 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ |
270 | unsigned long flags; | 343 | unsigned long flags; |
271 | uint64_t en1; | 344 | uint64_t en1; |
272 | #ifdef CONFIG_SMP | ||
273 | int cpu; | 345 | int cpu; |
274 | write_lock_irqsave(&octeon_irq_ciu1_rwlock, flags); | 346 | write_lock_irqsave(&octeon_irq_ciu1_rwlock, flags); |
275 | for_each_online_cpu(cpu) { | 347 | for_each_online_cpu(cpu) { |
276 | int coreid = cpu_logical_map(cpu); | 348 | int coreid = octeon_coreid_for_cpu(cpu); |
277 | en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); | 349 | en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); |
278 | en1 &= ~(1ull << bit); | 350 | en1 &= ~(1ull << bit); |
279 | cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); | 351 | cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); |
@@ -284,26 +356,58 @@ static void octeon_irq_ciu1_disable(unsigned int irq) | |||
284 | */ | 356 | */ |
285 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); | 357 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); |
286 | write_unlock_irqrestore(&octeon_irq_ciu1_rwlock, flags); | 358 | write_unlock_irqrestore(&octeon_irq_ciu1_rwlock, flags); |
287 | #else | 359 | } |
288 | int coreid = cvmx_get_core_num(); | 360 | |
289 | local_irq_save(flags); | 361 | /* |
290 | en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); | 362 | * Enable the irq on the current core for chips that have the EN*_W1{S,C} |
291 | en1 &= ~(1ull << bit); | 363 | * registers. |
292 | cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); | 364 | */ |
293 | cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); | 365 | static void octeon_irq_ciu1_enable_v2(unsigned int irq) |
294 | local_irq_restore(flags); | 366 | { |
295 | #endif | 367 | int index = cvmx_get_core_num() * 2 + 1; |
368 | u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); | ||
369 | |||
370 | cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); | ||
371 | } | ||
372 | |||
373 | /* | ||
374 | * Disable the irq on the current core for chips that have the EN*_W1{S,C} | ||
375 | * registers. | ||
376 | */ | ||
377 | static void octeon_irq_ciu1_disable_v2(unsigned int irq) | ||
378 | { | ||
379 | int index = cvmx_get_core_num() * 2 + 1; | ||
380 | u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); | ||
381 | |||
382 | cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); | ||
383 | } | ||
384 | |||
385 | /* | ||
386 | * Disable the irq on the all cores for chips that have the EN*_W1{S,C} | ||
387 | * registers. | ||
388 | */ | ||
389 | static void octeon_irq_ciu1_disable_all_v2(unsigned int irq) | ||
390 | { | ||
391 | u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); | ||
392 | int index; | ||
393 | int cpu; | ||
394 | for_each_online_cpu(cpu) { | ||
395 | index = octeon_coreid_for_cpu(cpu) * 2 + 1; | ||
396 | cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); | ||
397 | } | ||
296 | } | 398 | } |
297 | 399 | ||
298 | #ifdef CONFIG_SMP | 400 | #ifdef CONFIG_SMP |
299 | static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest) | 401 | static int octeon_irq_ciu1_set_affinity(unsigned int irq, |
402 | const struct cpumask *dest) | ||
300 | { | 403 | { |
301 | int cpu; | 404 | int cpu; |
405 | unsigned long flags; | ||
302 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ | 406 | int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ |
303 | 407 | ||
304 | write_lock(&octeon_irq_ciu1_rwlock); | 408 | write_lock_irqsave(&octeon_irq_ciu1_rwlock, flags); |
305 | for_each_online_cpu(cpu) { | 409 | for_each_online_cpu(cpu) { |
306 | int coreid = cpu_logical_map(cpu); | 410 | int coreid = octeon_coreid_for_cpu(cpu); |
307 | uint64_t en1 = | 411 | uint64_t en1 = |
308 | cvmx_read_csr(CVMX_CIU_INTX_EN1 | 412 | cvmx_read_csr(CVMX_CIU_INTX_EN1 |
309 | (coreid * 2 + 1)); | 413 | (coreid * 2 + 1)); |
@@ -318,12 +422,46 @@ static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask * | |||
318 | * of them are done. | 422 | * of them are done. |
319 | */ | 423 | */ |
320 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); | 424 | cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); |
321 | write_unlock(&octeon_irq_ciu1_rwlock); | 425 | write_unlock_irqrestore(&octeon_irq_ciu1_rwlock, flags); |
426 | |||
427 | return 0; | ||
428 | } | ||
322 | 429 | ||
430 | /* | ||
431 | * Set affinity for the irq for chips that have the EN*_W1{S,C} | ||
432 | * registers. | ||
433 | */ | ||
434 | static int octeon_irq_ciu1_set_affinity_v2(unsigned int irq, | ||
435 | const struct cpumask *dest) | ||
436 | { | ||
437 | int cpu; | ||
438 | int index; | ||
439 | u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); | ||
440 | for_each_online_cpu(cpu) { | ||
441 | index = octeon_coreid_for_cpu(cpu) * 2 + 1; | ||
442 | if (cpumask_test_cpu(cpu, dest)) | ||
443 | cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); | ||
444 | else | ||
445 | cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); | ||
446 | } | ||
323 | return 0; | 447 | return 0; |
324 | } | 448 | } |
325 | #endif | 449 | #endif |
326 | 450 | ||
451 | /* | ||
452 | * Newer octeon chips have support for lockless CIU operation. | ||
453 | */ | ||
454 | static struct irq_chip octeon_irq_chip_ciu1_v2 = { | ||
455 | .name = "CIU0", | ||
456 | .enable = octeon_irq_ciu1_enable_v2, | ||
457 | .disable = octeon_irq_ciu1_disable_all_v2, | ||
458 | .ack = octeon_irq_ciu1_disable_v2, | ||
459 | .eoi = octeon_irq_ciu1_enable_v2, | ||
460 | #ifdef CONFIG_SMP | ||
461 | .set_affinity = octeon_irq_ciu1_set_affinity_v2, | ||
462 | #endif | ||
463 | }; | ||
464 | |||
327 | static struct irq_chip octeon_irq_chip_ciu1 = { | 465 | static struct irq_chip octeon_irq_chip_ciu1 = { |
328 | .name = "CIU1", | 466 | .name = "CIU1", |
329 | .enable = octeon_irq_ciu1_enable, | 467 | .enable = octeon_irq_ciu1_enable, |
@@ -420,6 +558,8 @@ static struct irq_chip octeon_irq_chip_msi = { | |||
420 | void __init arch_init_irq(void) | 558 | void __init arch_init_irq(void) |
421 | { | 559 | { |
422 | int irq; | 560 | int irq; |
561 | struct irq_chip *chip0; | ||
562 | struct irq_chip *chip1; | ||
423 | 563 | ||
424 | #ifdef CONFIG_SMP | 564 | #ifdef CONFIG_SMP |
425 | /* Set the default affinity to the boot cpu. */ | 565 | /* Set the default affinity to the boot cpu. */ |
@@ -430,6 +570,16 @@ void __init arch_init_irq(void) | |||
430 | if (NR_IRQS < OCTEON_IRQ_LAST) | 570 | if (NR_IRQS < OCTEON_IRQ_LAST) |
431 | pr_err("octeon_irq_init: NR_IRQS is set too low\n"); | 571 | pr_err("octeon_irq_init: NR_IRQS is set too low\n"); |
432 | 572 | ||
573 | if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) || | ||
574 | OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) || | ||
575 | OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X)) { | ||
576 | chip0 = &octeon_irq_chip_ciu0_v2; | ||
577 | chip1 = &octeon_irq_chip_ciu1_v2; | ||
578 | } else { | ||
579 | chip0 = &octeon_irq_chip_ciu0; | ||
580 | chip1 = &octeon_irq_chip_ciu1; | ||
581 | } | ||
582 | |||
433 | /* 0 - 15 reserved for i8259 master and slave controller. */ | 583 | /* 0 - 15 reserved for i8259 master and slave controller. */ |
434 | 584 | ||
435 | /* 17 - 23 Mips internal */ | 585 | /* 17 - 23 Mips internal */ |
@@ -440,14 +590,12 @@ void __init arch_init_irq(void) | |||
440 | 590 | ||
441 | /* 24 - 87 CIU_INT_SUM0 */ | 591 | /* 24 - 87 CIU_INT_SUM0 */ |
442 | for (irq = OCTEON_IRQ_WORKQ0; irq <= OCTEON_IRQ_BOOTDMA; irq++) { | 592 | for (irq = OCTEON_IRQ_WORKQ0; irq <= OCTEON_IRQ_BOOTDMA; irq++) { |
443 | set_irq_chip_and_handler(irq, &octeon_irq_chip_ciu0, | 593 | set_irq_chip_and_handler(irq, chip0, handle_percpu_irq); |
444 | handle_percpu_irq); | ||
445 | } | 594 | } |
446 | 595 | ||
447 | /* 88 - 151 CIU_INT_SUM1 */ | 596 | /* 88 - 151 CIU_INT_SUM1 */ |
448 | for (irq = OCTEON_IRQ_WDOG0; irq <= OCTEON_IRQ_RESERVED151; irq++) { | 597 | for (irq = OCTEON_IRQ_WDOG0; irq <= OCTEON_IRQ_RESERVED151; irq++) { |
449 | set_irq_chip_and_handler(irq, &octeon_irq_chip_ciu1, | 598 | set_irq_chip_and_handler(irq, chip1, handle_percpu_irq); |
450 | handle_percpu_irq); | ||
451 | } | 599 | } |
452 | 600 | ||
453 | #ifdef CONFIG_PCI_MSI | 601 | #ifdef CONFIG_PCI_MSI |
@@ -505,14 +653,10 @@ asmlinkage void plat_irq_dispatch(void) | |||
505 | #ifdef CONFIG_HOTPLUG_CPU | 653 | #ifdef CONFIG_HOTPLUG_CPU |
506 | static int is_irq_enabled_on_cpu(unsigned int irq, unsigned int cpu) | 654 | static int is_irq_enabled_on_cpu(unsigned int irq, unsigned int cpu) |
507 | { | 655 | { |
508 | unsigned int isset; | 656 | unsigned int isset; |
509 | #ifdef CONFIG_SMP | 657 | int coreid = octeon_coreid_for_cpu(cpu); |
510 | int coreid = cpu_logical_map(cpu); | ||
511 | #else | ||
512 | int coreid = cvmx_get_core_num(); | ||
513 | #endif | ||
514 | int bit = (irq < OCTEON_IRQ_WDOG0) ? | 658 | int bit = (irq < OCTEON_IRQ_WDOG0) ? |
515 | irq - OCTEON_IRQ_WORKQ0 : irq - OCTEON_IRQ_WDOG0; | 659 | irq - OCTEON_IRQ_WORKQ0 : irq - OCTEON_IRQ_WDOG0; |
516 | if (irq < 64) { | 660 | if (irq < 64) { |
517 | isset = (cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)) & | 661 | isset = (cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)) & |
518 | (1ull << bit)) >> bit; | 662 | (1ull << bit)) >> bit; |
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 32d51a31dc48..c198efdf583e 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c | |||
@@ -65,11 +65,12 @@ void octeon_send_ipi_single(int cpu, unsigned int action) | |||
65 | cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action); | 65 | cvmx_write_csr(CVMX_CIU_MBOX_SETX(coreid), action); |
66 | } | 66 | } |
67 | 67 | ||
68 | static inline void octeon_send_ipi_mask(cpumask_t mask, unsigned int action) | 68 | static inline void octeon_send_ipi_mask(const struct cpumask *mask, |
69 | unsigned int action) | ||
69 | { | 70 | { |
70 | unsigned int i; | 71 | unsigned int i; |
71 | 72 | ||
72 | for_each_cpu_mask(i, mask) | 73 | for_each_cpu_mask(i, *mask) |
73 | octeon_send_ipi_single(i, action); | 74 | octeon_send_ipi_single(i, action); |
74 | } | 75 | } |
75 | 76 | ||
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h index efeddc8db8b1..0b89b83e2055 100644 --- a/arch/mips/include/asm/fixmap.h +++ b/arch/mips/include/asm/fixmap.h | |||
@@ -48,9 +48,9 @@ enum fixed_addresses { | |||
48 | #define FIX_N_COLOURS 8 | 48 | #define FIX_N_COLOURS 8 |
49 | FIX_CMAP_BEGIN, | 49 | FIX_CMAP_BEGIN, |
50 | #ifdef CONFIG_MIPS_MT_SMTC | 50 | #ifdef CONFIG_MIPS_MT_SMTC |
51 | FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS), | 51 | FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS * 2), |
52 | #else | 52 | #else |
53 | FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, | 53 | FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * 2), |
54 | #endif | 54 | #endif |
55 | #ifdef CONFIG_HIGHMEM | 55 | #ifdef CONFIG_HIGHMEM |
56 | /* reserved pte's for temporary kernel mappings */ | 56 | /* reserved pte's for temporary kernel mappings */ |
diff --git a/arch/mips/include/asm/gcmpregs.h b/arch/mips/include/asm/gcmpregs.h index 36fd969d64d6..c0cf76a2ca89 100644 --- a/arch/mips/include/asm/gcmpregs.h +++ b/arch/mips/include/asm/gcmpregs.h | |||
@@ -19,15 +19,20 @@ | |||
19 | #define GCMP_GDB_OFS 0x8000 /* Global Debug Block */ | 19 | #define GCMP_GDB_OFS 0x8000 /* Global Debug Block */ |
20 | 20 | ||
21 | /* Offsets to individual GCMP registers from GCMP base */ | 21 | /* Offsets to individual GCMP registers from GCMP base */ |
22 | #define GCMPOFS(block, tag, reg) (GCMP_##block##_OFS + GCMP_##tag##_##reg##_OFS) | 22 | #define GCMPOFS(block, tag, reg) \ |
23 | (GCMP_##block##_OFS + GCMP_##tag##_##reg##_OFS) | ||
24 | #define GCMPOFSn(block, tag, reg, n) \ | ||
25 | (GCMP_##block##_OFS + GCMP_##tag##_##reg##_OFS(n)) | ||
23 | 26 | ||
24 | #define GCMPGCBOFS(reg) GCMPOFS(GCB, GCB, reg) | 27 | #define GCMPGCBOFS(reg) GCMPOFS(GCB, GCB, reg) |
28 | #define GCMPGCBOFSn(reg, n) GCMPOFSn(GCB, GCB, reg, n) | ||
25 | #define GCMPCLCBOFS(reg) GCMPOFS(CLCB, CCB, reg) | 29 | #define GCMPCLCBOFS(reg) GCMPOFS(CLCB, CCB, reg) |
26 | #define GCMPCOCBOFS(reg) GCMPOFS(COCB, CCB, reg) | 30 | #define GCMPCOCBOFS(reg) GCMPOFS(COCB, CCB, reg) |
27 | #define GCMPGDBOFS(reg) GCMPOFS(GDB, GDB, reg) | 31 | #define GCMPGDBOFS(reg) GCMPOFS(GDB, GDB, reg) |
28 | 32 | ||
29 | /* GCMP register access */ | 33 | /* GCMP register access */ |
30 | #define GCMPGCB(reg) REGP(_gcmp_base, GCMPGCBOFS(reg)) | 34 | #define GCMPGCB(reg) REGP(_gcmp_base, GCMPGCBOFS(reg)) |
35 | #define GCMPGCBn(reg, n) REGP(_gcmp_base, GCMPGCBOFSn(reg, n)) | ||
31 | #define GCMPCLCB(reg) REGP(_gcmp_base, GCMPCLCBOFS(reg)) | 36 | #define GCMPCLCB(reg) REGP(_gcmp_base, GCMPCLCBOFS(reg)) |
32 | #define GCMPCOCB(reg) REGP(_gcmp_base, GCMPCOCBOFS(reg)) | 37 | #define GCMPCOCB(reg) REGP(_gcmp_base, GCMPCOCBOFS(reg)) |
33 | #define GCMPGDB(reg) REGP(_gcmp_base, GCMPGDBOFS(reg)) | 38 | #define GCMPGDB(reg) REGP(_gcmp_base, GCMPGDBOFS(reg)) |
@@ -49,10 +54,10 @@ | |||
49 | #define GCMP_GCB_GCMPB_GCMPBASE_MSK GCMPGCBMSK(GCMPB_GCMPBASE, 17) | 54 | #define GCMP_GCB_GCMPB_GCMPBASE_MSK GCMPGCBMSK(GCMPB_GCMPBASE, 17) |
50 | #define GCMP_GCB_GCMPB_CMDEFTGT_SHF 0 | 55 | #define GCMP_GCB_GCMPB_CMDEFTGT_SHF 0 |
51 | #define GCMP_GCB_GCMPB_CMDEFTGT_MSK GCMPGCBMSK(GCMPB_CMDEFTGT, 2) | 56 | #define GCMP_GCB_GCMPB_CMDEFTGT_MSK GCMPGCBMSK(GCMPB_CMDEFTGT, 2) |
52 | #define GCMP_GCB_GCMPB_CMDEFTGT_MEM 0 | 57 | #define GCMP_GCB_GCMPB_CMDEFTGT_DISABLED 0 |
53 | #define GCMP_GCB_GCMPB_CMDEFTGT_MEM1 1 | 58 | #define GCMP_GCB_GCMPB_CMDEFTGT_MEM 1 |
54 | #define GCMP_GCB_GCMPB_CMDEFTGT_IOCU1 2 | 59 | #define GCMP_GCB_GCMPB_CMDEFTGT_IOCU1 2 |
55 | #define GCMP_GCB_GCMPB_CMDEFTGT_IOCU2 3 | 60 | #define GCMP_GCB_GCMPB_CMDEFTGT_IOCU2 3 |
56 | #define GCMP_GCB_CCMC_OFS 0x0010 /* Global CM Control */ | 61 | #define GCMP_GCB_CCMC_OFS 0x0010 /* Global CM Control */ |
57 | #define GCMP_GCB_GCSRAP_OFS 0x0020 /* Global CSR Access Privilege */ | 62 | #define GCMP_GCB_GCSRAP_OFS 0x0020 /* Global CSR Access Privilege */ |
58 | #define GCMP_GCB_GCSRAP_CMACCESS_SHF 0 | 63 | #define GCMP_GCB_GCSRAP_CMACCESS_SHF 0 |
@@ -115,5 +120,6 @@ | |||
115 | #define GCMP_CCB_DBGGROUP_OFS 0x0100 /* DebugBreak Group */ | 120 | #define GCMP_CCB_DBGGROUP_OFS 0x0100 /* DebugBreak Group */ |
116 | 121 | ||
117 | extern int __init gcmp_probe(unsigned long, unsigned long); | 122 | extern int __init gcmp_probe(unsigned long, unsigned long); |
118 | 123 | extern int __init gcmp_niocu(void); | |
124 | extern void __init gcmp_setregion(int, unsigned long, unsigned long, int); | ||
119 | #endif /* _ASM_GCMPREGS_H */ | 125 | #endif /* _ASM_GCMPREGS_H */ |
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index a8f57341f123..9b9436a4d816 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h | |||
@@ -12,7 +12,6 @@ | |||
12 | #define _ASM_GICREGS_H | 12 | #define _ASM_GICREGS_H |
13 | 13 | ||
14 | #undef GICISBYTELITTLEENDIAN | 14 | #undef GICISBYTELITTLEENDIAN |
15 | #define GICISWORDLITTLEENDIAN | ||
16 | 15 | ||
17 | /* Constants */ | 16 | /* Constants */ |
18 | #define GIC_POL_POS 1 | 17 | #define GIC_POL_POS 1 |
@@ -20,11 +19,7 @@ | |||
20 | #define GIC_TRIG_EDGE 1 | 19 | #define GIC_TRIG_EDGE 1 |
21 | #define GIC_TRIG_LEVEL 0 | 20 | #define GIC_TRIG_LEVEL 0 |
22 | 21 | ||
23 | #ifdef CONFIG_SMP | ||
24 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) | 22 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) |
25 | #else | ||
26 | #define GIC_NUM_INTRS 32 | ||
27 | #endif | ||
28 | 23 | ||
29 | #define MSK(n) ((1 << (n)) - 1) | 24 | #define MSK(n) ((1 << (n)) - 1) |
30 | #define REG32(addr) (*(volatile unsigned int *) (addr)) | 25 | #define REG32(addr) (*(volatile unsigned int *) (addr)) |
@@ -70,13 +65,13 @@ | |||
70 | #define USM_VISIBLE_SECTION_SIZE 0x10000 | 65 | #define USM_VISIBLE_SECTION_SIZE 0x10000 |
71 | 66 | ||
72 | /* Register Map for Shared Section */ | 67 | /* Register Map for Shared Section */ |
73 | #if defined(CONFIG_CPU_LITTLE_ENDIAN) || defined(GICISWORDLITTLEENDIAN) | ||
74 | 68 | ||
75 | #define GIC_SH_CONFIG_OFS 0x0000 | 69 | #define GIC_SH_CONFIG_OFS 0x0000 |
76 | 70 | ||
77 | /* Shared Global Counter */ | 71 | /* Shared Global Counter */ |
78 | #define GIC_SH_COUNTER_31_00_OFS 0x0010 | 72 | #define GIC_SH_COUNTER_31_00_OFS 0x0010 |
79 | #define GIC_SH_COUNTER_63_32_OFS 0x0014 | 73 | #define GIC_SH_COUNTER_63_32_OFS 0x0014 |
74 | #define GIC_SH_REVISIONID_OFS 0x0020 | ||
80 | 75 | ||
81 | /* Interrupt Polarity */ | 76 | /* Interrupt Polarity */ |
82 | #define GIC_SH_POL_31_0_OFS 0x0100 | 77 | #define GIC_SH_POL_31_0_OFS 0x0100 |
@@ -164,24 +159,31 @@ | |||
164 | (GIC_SH_INTR_MAP_TO_VPE_BASE_OFS + (32 * (intr)) + (((vpe) / 32) * 4)) | 159 | (GIC_SH_INTR_MAP_TO_VPE_BASE_OFS + (32 * (intr)) + (((vpe) / 32) * 4)) |
165 | #define GIC_SH_MAP_TO_VPE_REG_BIT(vpe) (1 << ((vpe) % 32)) | 160 | #define GIC_SH_MAP_TO_VPE_REG_BIT(vpe) (1 << ((vpe) % 32)) |
166 | 161 | ||
162 | /* Convert an interrupt number to a byte offset/bit for multi-word registers */ | ||
163 | #define GIC_INTR_OFS(intr) (((intr) / 32)*4) | ||
164 | #define GIC_INTR_BIT(intr) ((intr) % 32) | ||
165 | |||
167 | /* Polarity : Reset Value is always 0 */ | 166 | /* Polarity : Reset Value is always 0 */ |
168 | #define GIC_SH_SET_POLARITY_OFS 0x0100 | 167 | #define GIC_SH_SET_POLARITY_OFS 0x0100 |
169 | #define GIC_SET_POLARITY(intr, pol) \ | 168 | #define GIC_SET_POLARITY(intr, pol) \ |
170 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_POLARITY_OFS + (((intr) / 32) * 4)), (pol) << ((intr) % 32)) | 169 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_POLARITY_OFS + \ |
170 | GIC_INTR_OFS(intr)), (pol) << GIC_INTR_BIT(intr)) | ||
171 | 171 | ||
172 | /* Triggering : Reset Value is always 0 */ | 172 | /* Triggering : Reset Value is always 0 */ |
173 | #define GIC_SH_SET_TRIGGER_OFS 0x0180 | 173 | #define GIC_SH_SET_TRIGGER_OFS 0x0180 |
174 | #define GIC_SET_TRIGGER(intr, trig) \ | 174 | #define GIC_SET_TRIGGER(intr, trig) \ |
175 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_TRIGGER_OFS + (((intr) / 32) * 4)), (trig) << ((intr) % 32)) | 175 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_TRIGGER_OFS + \ |
176 | GIC_INTR_OFS(intr)), (trig) << GIC_INTR_BIT(intr)) | ||
176 | 177 | ||
177 | /* Mask manipulation */ | 178 | /* Mask manipulation */ |
178 | #define GIC_SH_SMASK_OFS 0x0380 | 179 | #define GIC_SH_SMASK_OFS 0x0380 |
179 | #define GIC_SET_INTR_MASK(intr, val) \ | 180 | #define GIC_SET_INTR_MASK(intr) \ |
180 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_SMASK_OFS + (((intr) / 32) * 4)), ((val) << ((intr) % 32))) | 181 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_SMASK_OFS + \ |
181 | 182 | GIC_INTR_OFS(intr)), 1 << GIC_INTR_BIT(intr)) | |
182 | #define GIC_SH_RMASK_OFS 0x0300 | 183 | #define GIC_SH_RMASK_OFS 0x0300 |
183 | #define GIC_CLR_INTR_MASK(intr, val) \ | 184 | #define GIC_CLR_INTR_MASK(intr) \ |
184 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + (((intr) / 32) * 4)), ((val) << ((intr) % 32))) | 185 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + \ |
186 | GIC_INTR_OFS(intr)), 1 << GIC_INTR_BIT(intr)) | ||
185 | 187 | ||
186 | /* Register Map for Local Section */ | 188 | /* Register Map for Local Section */ |
187 | #define GIC_VPE_CTL_OFS 0x0000 | 189 | #define GIC_VPE_CTL_OFS 0x0000 |
@@ -219,161 +221,6 @@ | |||
219 | #define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000 | 221 | #define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000 |
220 | #define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004 | 222 | #define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004 |
221 | 223 | ||
222 | #else /* CONFIG_CPU_BIG_ENDIAN */ | ||
223 | |||
224 | #define GIC_SH_CONFIG_OFS 0x0000 | ||
225 | |||
226 | /* Shared Global Counter */ | ||
227 | #define GIC_SH_COUNTER_31_00_OFS 0x0014 | ||
228 | #define GIC_SH_COUNTER_63_32_OFS 0x0010 | ||
229 | |||
230 | /* Interrupt Polarity */ | ||
231 | #define GIC_SH_POL_31_0_OFS 0x0104 | ||
232 | #define GIC_SH_POL_63_32_OFS 0x0100 | ||
233 | #define GIC_SH_POL_95_64_OFS 0x010c | ||
234 | #define GIC_SH_POL_127_96_OFS 0x0108 | ||
235 | #define GIC_SH_POL_159_128_OFS 0x0114 | ||
236 | #define GIC_SH_POL_191_160_OFS 0x0110 | ||
237 | #define GIC_SH_POL_223_192_OFS 0x011c | ||
238 | #define GIC_SH_POL_255_224_OFS 0x0118 | ||
239 | |||
240 | /* Edge/Level Triggering */ | ||
241 | #define GIC_SH_TRIG_31_0_OFS 0x0184 | ||
242 | #define GIC_SH_TRIG_63_32_OFS 0x0180 | ||
243 | #define GIC_SH_TRIG_95_64_OFS 0x018c | ||
244 | #define GIC_SH_TRIG_127_96_OFS 0x0188 | ||
245 | #define GIC_SH_TRIG_159_128_OFS 0x0194 | ||
246 | #define GIC_SH_TRIG_191_160_OFS 0x0190 | ||
247 | #define GIC_SH_TRIG_223_192_OFS 0x019c | ||
248 | #define GIC_SH_TRIG_255_224_OFS 0x0198 | ||
249 | |||
250 | /* Dual Edge Triggering */ | ||
251 | #define GIC_SH_DUAL_31_0_OFS 0x0204 | ||
252 | #define GIC_SH_DUAL_63_32_OFS 0x0200 | ||
253 | #define GIC_SH_DUAL_95_64_OFS 0x020c | ||
254 | #define GIC_SH_DUAL_127_96_OFS 0x0208 | ||
255 | #define GIC_SH_DUAL_159_128_OFS 0x0214 | ||
256 | #define GIC_SH_DUAL_191_160_OFS 0x0210 | ||
257 | #define GIC_SH_DUAL_223_192_OFS 0x021c | ||
258 | #define GIC_SH_DUAL_255_224_OFS 0x0218 | ||
259 | |||
260 | /* Set/Clear corresponding bit in Edge Detect Register */ | ||
261 | #define GIC_SH_WEDGE_OFS 0x0280 | ||
262 | |||
263 | /* Reset Mask - Disables Interrupt */ | ||
264 | #define GIC_SH_RMASK_31_0_OFS 0x0304 | ||
265 | #define GIC_SH_RMASK_63_32_OFS 0x0300 | ||
266 | #define GIC_SH_RMASK_95_64_OFS 0x030c | ||
267 | #define GIC_SH_RMASK_127_96_OFS 0x0308 | ||
268 | #define GIC_SH_RMASK_159_128_OFS 0x0314 | ||
269 | #define GIC_SH_RMASK_191_160_OFS 0x0310 | ||
270 | #define GIC_SH_RMASK_223_192_OFS 0x031c | ||
271 | #define GIC_SH_RMASK_255_224_OFS 0x0318 | ||
272 | |||
273 | /* Set Mask (WO) - Enables Interrupt */ | ||
274 | #define GIC_SH_SMASK_31_0_OFS 0x0384 | ||
275 | #define GIC_SH_SMASK_63_32_OFS 0x0380 | ||
276 | #define GIC_SH_SMASK_95_64_OFS 0x038c | ||
277 | #define GIC_SH_SMASK_127_96_OFS 0x0388 | ||
278 | #define GIC_SH_SMASK_159_128_OFS 0x0394 | ||
279 | #define GIC_SH_SMASK_191_160_OFS 0x0390 | ||
280 | #define GIC_SH_SMASK_223_192_OFS 0x039c | ||
281 | #define GIC_SH_SMASK_255_224_OFS 0x0398 | ||
282 | |||
283 | /* Global Interrupt Mask Register (RO) - Bit Set == Interrupt enabled */ | ||
284 | #define GIC_SH_MASK_31_0_OFS 0x0404 | ||
285 | #define GIC_SH_MASK_63_32_OFS 0x0400 | ||
286 | #define GIC_SH_MASK_95_64_OFS 0x040c | ||
287 | #define GIC_SH_MASK_127_96_OFS 0x0408 | ||
288 | #define GIC_SH_MASK_159_128_OFS 0x0414 | ||
289 | #define GIC_SH_MASK_191_160_OFS 0x0410 | ||
290 | #define GIC_SH_MASK_223_192_OFS 0x041c | ||
291 | #define GIC_SH_MASK_255_224_OFS 0x0418 | ||
292 | |||
293 | /* Pending Global Interrupts (RO) */ | ||
294 | #define GIC_SH_PEND_31_0_OFS 0x0484 | ||
295 | #define GIC_SH_PEND_63_32_OFS 0x0480 | ||
296 | #define GIC_SH_PEND_95_64_OFS 0x048c | ||
297 | #define GIC_SH_PEND_127_96_OFS 0x0488 | ||
298 | #define GIC_SH_PEND_159_128_OFS 0x0494 | ||
299 | #define GIC_SH_PEND_191_160_OFS 0x0490 | ||
300 | #define GIC_SH_PEND_223_192_OFS 0x049c | ||
301 | #define GIC_SH_PEND_255_224_OFS 0x0498 | ||
302 | |||
303 | #define GIC_SH_INTR_MAP_TO_PIN_BASE_OFS 0x0500 | ||
304 | |||
305 | /* Maps Interrupt X to a Pin */ | ||
306 | #define GIC_SH_MAP_TO_PIN(intr) \ | ||
307 | (GIC_SH_INTR_MAP_TO_PIN_BASE_OFS + (4 * intr)) | ||
308 | |||
309 | #define GIC_SH_INTR_MAP_TO_VPE_BASE_OFS 0x2004 | ||
310 | |||
311 | /* | ||
312 | * Maps Interrupt X to a VPE. This is more complex than the LE case, as | ||
313 | * odd and even registers need to be transposed. It does work - trust me! | ||
314 | */ | ||
315 | #define GIC_SH_MAP_TO_VPE_REG_OFF(intr, vpe) \ | ||
316 | (GIC_SH_INTR_MAP_TO_VPE_BASE_OFS + (32 * (intr)) + \ | ||
317 | (((((vpe) / 32) ^ 1) - 1) * 4)) | ||
318 | #define GIC_SH_MAP_TO_VPE_REG_BIT(vpe) (1 << ((vpe) % 32)) | ||
319 | |||
320 | /* Polarity */ | ||
321 | #define GIC_SH_SET_POLARITY_OFS 0x0100 | ||
322 | #define GIC_SET_POLARITY(intr, pol) \ | ||
323 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_POLARITY_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), (pol) << ((intr) % 32)) | ||
324 | |||
325 | /* Triggering */ | ||
326 | #define GIC_SH_SET_TRIGGER_OFS 0x0180 | ||
327 | #define GIC_SET_TRIGGER(intr, trig) \ | ||
328 | GICBIS(GIC_REG_ADDR(SHARED, GIC_SH_SET_TRIGGER_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), (trig) << ((intr) % 32)) | ||
329 | |||
330 | /* Mask manipulation */ | ||
331 | #define GIC_SH_SMASK_OFS 0x0380 | ||
332 | #define GIC_SET_INTR_MASK(intr, val) \ | ||
333 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_SMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32))) | ||
334 | |||
335 | #define GIC_SH_RMASK_OFS 0x0300 | ||
336 | #define GIC_CLR_INTR_MASK(intr, val) \ | ||
337 | GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32))) | ||
338 | |||
339 | /* Register Map for Local Section */ | ||
340 | #define GIC_VPE_CTL_OFS 0x0000 | ||
341 | #define GIC_VPE_PEND_OFS 0x0004 | ||
342 | #define GIC_VPE_MASK_OFS 0x0008 | ||
343 | #define GIC_VPE_RMASK_OFS 0x000c | ||
344 | #define GIC_VPE_SMASK_OFS 0x0010 | ||
345 | #define GIC_VPE_WD_MAP_OFS 0x0040 | ||
346 | #define GIC_VPE_COMPARE_MAP_OFS 0x0044 | ||
347 | #define GIC_VPE_TIMER_MAP_OFS 0x0048 | ||
348 | #define GIC_VPE_PERFCTR_MAP_OFS 0x0050 | ||
349 | #define GIC_VPE_SWINT0_MAP_OFS 0x0054 | ||
350 | #define GIC_VPE_SWINT1_MAP_OFS 0x0058 | ||
351 | #define GIC_VPE_OTHER_ADDR_OFS 0x0080 | ||
352 | #define GIC_VPE_WD_CONFIG0_OFS 0x0090 | ||
353 | #define GIC_VPE_WD_COUNT0_OFS 0x0094 | ||
354 | #define GIC_VPE_WD_INITIAL0_OFS 0x0098 | ||
355 | #define GIC_VPE_COMPARE_LO_OFS 0x00a4 | ||
356 | #define GIC_VPE_COMPARE_HI_OFS 0x00a0 | ||
357 | |||
358 | #define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100 | ||
359 | #define GIC_VPE_EIC_SS(intr) \ | ||
360 | (GIC_EIC_SHADOW_SET_BASE + (4 * intr)) | ||
361 | |||
362 | #define GIC_VPE_EIC_VEC_BASE 0x0800 | ||
363 | #define GIC_VPE_EIC_VEC(intr) \ | ||
364 | (GIC_VPE_EIC_VEC_BASE + (4 * intr)) | ||
365 | |||
366 | #define GIC_VPE_TENABLE_NMI_OFS 0x1000 | ||
367 | #define GIC_VPE_TENABLE_YQ_OFS 0x1004 | ||
368 | #define GIC_VPE_TENABLE_INT_31_0_OFS 0x1080 | ||
369 | #define GIC_VPE_TENABLE_INT_63_32_OFS 0x1084 | ||
370 | |||
371 | /* User Mode Visible Section Register Map */ | ||
372 | #define GIC_UMV_SH_COUNTER_31_00_OFS 0x0004 | ||
373 | #define GIC_UMV_SH_COUNTER_63_32_OFS 0x0000 | ||
374 | |||
375 | #endif /* !LE */ | ||
376 | |||
377 | /* Masks */ | 224 | /* Masks */ |
378 | #define GIC_SH_CONFIG_COUNTSTOP_SHF 28 | 225 | #define GIC_SH_CONFIG_COUNTSTOP_SHF 28 |
379 | #define GIC_SH_CONFIG_COUNTSTOP_MSK (MSK(1) << GIC_SH_CONFIG_COUNTSTOP_SHF) | 226 | #define GIC_SH_CONFIG_COUNTSTOP_MSK (MSK(1) << GIC_SH_CONFIG_COUNTSTOP_SHF) |
@@ -473,12 +320,13 @@ struct gic_intrmask_regs { | |||
473 | * in building ipi_map. | 320 | * in building ipi_map. |
474 | */ | 321 | */ |
475 | struct gic_intr_map { | 322 | struct gic_intr_map { |
476 | unsigned int intrnum; /* Ext Intr Num */ | ||
477 | unsigned int cpunum; /* Directed to this CPU */ | 323 | unsigned int cpunum; /* Directed to this CPU */ |
478 | unsigned int pin; /* Directed to this Pin */ | 324 | unsigned int pin; /* Directed to this Pin */ |
479 | unsigned int polarity; /* Polarity : +/- */ | 325 | unsigned int polarity; /* Polarity : +/- */ |
480 | unsigned int trigtype; /* Trigger : Edge/Levl */ | 326 | unsigned int trigtype; /* Trigger : Edge/Levl */ |
481 | unsigned int ipiflag; /* Is used for IPI ? */ | 327 | unsigned int flags; /* Misc flags */ |
328 | #define GIC_FLAG_IPI 0x01 | ||
329 | #define GIC_FLAG_TRANSPARENT 0x02 | ||
482 | }; | 330 | }; |
483 | 331 | ||
484 | extern void gic_init(unsigned long gic_base_addr, | 332 | extern void gic_init(unsigned long gic_base_addr, |
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h index de71694614de..21cbbc706448 100644 --- a/arch/mips/include/asm/mach-ar7/ar7.h +++ b/arch/mips/include/asm/mach-ar7/ar7.h | |||
@@ -78,6 +78,9 @@ | |||
78 | #define AR7_REF_CLOCK 25000000 | 78 | #define AR7_REF_CLOCK 25000000 |
79 | #define AR7_XTAL_CLOCK 24000000 | 79 | #define AR7_XTAL_CLOCK 24000000 |
80 | 80 | ||
81 | /* DCL */ | ||
82 | #define AR7_WDT_HW_ENA 0x10 | ||
83 | |||
81 | struct plat_cpmac_data { | 84 | struct plat_cpmac_data { |
82 | int reset_bit; | 85 | int reset_bit; |
83 | int power_bit; | 86 | int power_bit; |
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h index feea00148b5d..91595fa89034 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h | |||
@@ -104,6 +104,8 @@ static inline int au1100_gpio2_to_irq(int gpio) | |||
104 | 104 | ||
105 | if ((gpio >= 8) && (gpio <= 15)) | 105 | if ((gpio >= 8) && (gpio <= 15)) |
106 | return MAKE_IRQ(0, 29); /* shared GPIO208_215 */ | 106 | return MAKE_IRQ(0, 29); /* shared GPIO208_215 */ |
107 | |||
108 | return -ENXIO; | ||
107 | } | 109 | } |
108 | 110 | ||
109 | #ifdef CONFIG_SOC_AU1100 | 111 | #ifdef CONFIG_SOC_AU1100 |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h deleted file mode 100644 index bf348f573bbc..000000000000 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef BCM63XX_DEV_UART_H_ | ||
2 | #define BCM63XX_DEV_UART_H_ | ||
3 | |||
4 | int bcm63xx_uart_register(void); | ||
5 | |||
6 | #endif /* BCM63XX_DEV_UART_H_ */ | ||
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h index f6837422fe65..09a59bcc1b07 100644 --- a/arch/mips/include/asm/mach-ip27/topology.h +++ b/arch/mips/include/asm/mach-ip27/topology.h | |||
@@ -44,8 +44,8 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES]; | |||
44 | .busy_factor = 32, \ | 44 | .busy_factor = 32, \ |
45 | .imbalance_pct = 125, \ | 45 | .imbalance_pct = 125, \ |
46 | .cache_nice_tries = 1, \ | 46 | .cache_nice_tries = 1, \ |
47 | .flags = SD_LOAD_BALANCE \ | 47 | .flags = SD_LOAD_BALANCE | \ |
48 | | SD_BALANCE_EXEC \ | 48 | SD_BALANCE_EXEC, \ |
49 | .last_balance = jiffies, \ | 49 | .last_balance = jiffies, \ |
50 | .balance_interval = 1, \ | 50 | .balance_interval = 1, \ |
51 | .nr_balance_failed = 0, \ | 51 | .nr_balance_failed = 0, \ |
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index ce5b6e270e3f..9947e57c91de 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h | |||
@@ -29,7 +29,7 @@ | |||
29 | #define cpu_has_cache_cdex_p 0 | 29 | #define cpu_has_cache_cdex_p 0 |
30 | #define cpu_has_cache_cdex_s 0 | 30 | #define cpu_has_cache_cdex_s 0 |
31 | #define cpu_has_counter 1 | 31 | #define cpu_has_counter 1 |
32 | #define cpu_has_dc_aliases 1 | 32 | #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) |
33 | #define cpu_has_divec 0 | 33 | #define cpu_has_divec 0 |
34 | #define cpu_has_dsp 0 | 34 | #define cpu_has_dsp 0 |
35 | #define cpu_has_ejtag 0 | 35 | #define cpu_has_ejtag 0 |
@@ -54,6 +54,5 @@ | |||
54 | #define cpu_has_vce 0 | 54 | #define cpu_has_vce 0 |
55 | #define cpu_has_vtag_icache 0 | 55 | #define cpu_has_vtag_icache 0 |
56 | #define cpu_has_watch 1 | 56 | #define cpu_has_watch 1 |
57 | #define cpu_icache_snoops_remote_store 1 | ||
58 | 57 | ||
59 | #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ | 58 | #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ |
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index d9743536a621..6083db586500 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/smp.h> | 16 | #include <linux/smp.h> |
17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
18 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
19 | #include <asm/hazards.h> | ||
19 | #include <asm/tlbflush.h> | 20 | #include <asm/tlbflush.h> |
20 | #ifdef CONFIG_MIPS_MT_SMTC | 21 | #ifdef CONFIG_MIPS_MT_SMTC |
21 | #include <asm/mipsmtregs.h> | 22 | #include <asm/mipsmtregs.h> |
@@ -36,11 +37,13 @@ extern unsigned long pgd_current[]; | |||
36 | #ifdef CONFIG_32BIT | 37 | #ifdef CONFIG_32BIT |
37 | #define TLBMISS_HANDLER_SETUP() \ | 38 | #define TLBMISS_HANDLER_SETUP() \ |
38 | write_c0_context((unsigned long) smp_processor_id() << 25); \ | 39 | write_c0_context((unsigned long) smp_processor_id() << 25); \ |
40 | back_to_back_c0_hazard(); \ | ||
39 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) | 41 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) |
40 | #endif | 42 | #endif |
41 | #ifdef CONFIG_64BIT | 43 | #ifdef CONFIG_64BIT |
42 | #define TLBMISS_HANDLER_SETUP() \ | 44 | #define TLBMISS_HANDLER_SETUP() \ |
43 | write_c0_context((unsigned long) smp_processor_id() << 26); \ | 45 | write_c0_context((unsigned long) smp_processor_id() << 26); \ |
46 | back_to_back_c0_hazard(); \ | ||
44 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) | 47 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) |
45 | #endif | 48 | #endif |
46 | 49 | ||
@@ -165,12 +168,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | |||
165 | * having ASID_MASK smaller than the hardware maximum, | 168 | * having ASID_MASK smaller than the hardware maximum, |
166 | * make sure no "soft" bits become "hard"... | 169 | * make sure no "soft" bits become "hard"... |
167 | */ | 170 | */ |
168 | write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | 171 | write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | |
169 | | (cpu_context(cpu, next) & ASID_MASK)); | 172 | cpu_asid(cpu, next)); |
170 | ehb(); /* Make sure it propagates to TCStatus */ | 173 | ehb(); /* Make sure it propagates to TCStatus */ |
171 | evpe(mtflags); | 174 | evpe(mtflags); |
172 | #else | 175 | #else |
173 | write_c0_entryhi(cpu_context(cpu, next)); | 176 | write_c0_entryhi(cpu_asid(cpu, next)); |
174 | #endif /* CONFIG_MIPS_MT_SMTC */ | 177 | #endif /* CONFIG_MIPS_MT_SMTC */ |
175 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); | 178 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); |
176 | 179 | ||
@@ -226,11 +229,11 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next) | |||
226 | } | 229 | } |
227 | /* See comments for similar code above */ | 230 | /* See comments for similar code above */ |
228 | write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | | 231 | write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | |
229 | (cpu_context(cpu, next) & ASID_MASK)); | 232 | cpu_asid(cpu, next)); |
230 | ehb(); /* Make sure it propagates to TCStatus */ | 233 | ehb(); /* Make sure it propagates to TCStatus */ |
231 | evpe(mtflags); | 234 | evpe(mtflags); |
232 | #else | 235 | #else |
233 | write_c0_entryhi(cpu_context(cpu, next)); | 236 | write_c0_entryhi(cpu_asid(cpu, next)); |
234 | #endif /* CONFIG_MIPS_MT_SMTC */ | 237 | #endif /* CONFIG_MIPS_MT_SMTC */ |
235 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); | 238 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); |
236 | 239 | ||
diff --git a/arch/mips/include/asm/setup.h b/arch/mips/include/asm/setup.h index e600cedda976..50511aac04e9 100644 --- a/arch/mips/include/asm/setup.h +++ b/arch/mips/include/asm/setup.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef _MIPS_SETUP_H | 1 | #ifndef _MIPS_SETUP_H |
2 | #define _MIPS_SETUP_H | 2 | #define _MIPS_SETUP_H |
3 | 3 | ||
4 | #define COMMAND_LINE_SIZE 256 | 4 | #define COMMAND_LINE_SIZE 4096 |
5 | 5 | ||
6 | #ifdef __KERNEL__ | 6 | #ifdef __KERNEL__ |
7 | extern void setup_early_printk(void); | 7 | extern void setup_early_printk(void); |
diff --git a/arch/mips/include/asm/smtc_ipi.h b/arch/mips/include/asm/smtc_ipi.h index 8ce517574340..15278dbd7e79 100644 --- a/arch/mips/include/asm/smtc_ipi.h +++ b/arch/mips/include/asm/smtc_ipi.h | |||
@@ -45,6 +45,7 @@ struct smtc_ipi_q { | |||
45 | spinlock_t lock; | 45 | spinlock_t lock; |
46 | struct smtc_ipi *tail; | 46 | struct smtc_ipi *tail; |
47 | int depth; | 47 | int depth; |
48 | int resched_flag; /* reschedule already queued */ | ||
48 | }; | 49 | }; |
49 | 50 | ||
50 | static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) | 51 | static inline void smtc_ipi_nq(struct smtc_ipi_q *q, struct smtc_ipi *p) |
diff --git a/arch/mips/include/asm/spram.h b/arch/mips/include/asm/spram.h new file mode 100644 index 000000000000..0b89006e4907 --- /dev/null +++ b/arch/mips/include/asm/spram.h | |||
@@ -0,0 +1,10 @@ | |||
1 | #ifndef _MIPS_SPRAM_H | ||
2 | #define _MIPS_SPRAM_H | ||
3 | |||
4 | #ifdef CONFIG_CPU_MIPSR2 | ||
5 | extern __init void spram_config(void); | ||
6 | #else | ||
7 | static inline void spram_config(void) { }; | ||
8 | #endif /* CONFIG_CPU_MIPSR2 */ | ||
9 | |||
10 | #endif /* _MIPS_SPRAM_H */ | ||
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 01cc1630b66c..845da2107ed1 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h | |||
@@ -86,14 +86,7 @@ register struct thread_info *__current_thread_info __asm__("$28"); | |||
86 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR | 86 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR |
87 | 87 | ||
88 | #ifdef CONFIG_DEBUG_STACK_USAGE | 88 | #ifdef CONFIG_DEBUG_STACK_USAGE |
89 | #define alloc_thread_info(tsk) \ | 89 | #define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) |
90 | ({ \ | ||
91 | struct thread_info *ret; \ | ||
92 | \ | ||
93 | ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \ | ||
94 | \ | ||
95 | ret; \ | ||
96 | }) | ||
97 | #else | 90 | #else |
98 | #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) | 91 | #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) |
99 | #endif | 92 | #endif |
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index 7fd170d007e7..7bd32d04c2cc 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c | |||
@@ -134,7 +134,7 @@ static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) | |||
134 | 134 | ||
135 | static struct irqaction r4030_timer_irqaction = { | 135 | static struct irqaction r4030_timer_irqaction = { |
136 | .handler = r4030_timer_interrupt, | 136 | .handler = r4030_timer_interrupt, |
137 | .flags = IRQF_DISABLED, | 137 | .flags = IRQF_DISABLED | IRQF_TIMER, |
138 | .name = "R4030 timer", | 138 | .name = "R4030 timer", |
139 | }; | 139 | }; |
140 | 140 | ||
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c index e02f79b1eb51..bfea327c636c 100644 --- a/arch/mips/kernel/cevt-bcm1480.c +++ b/arch/mips/kernel/cevt-bcm1480.c | |||
@@ -144,7 +144,7 @@ void __cpuinit sb1480_clockevent_init(void) | |||
144 | bcm1480_unmask_irq(cpu, irq); | 144 | bcm1480_unmask_irq(cpu, irq); |
145 | 145 | ||
146 | action->handler = sibyte_counter_handler; | 146 | action->handler = sibyte_counter_handler; |
147 | action->flags = IRQF_DISABLED | IRQF_PERCPU; | 147 | action->flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER; |
148 | action->name = name; | 148 | action->name = name; |
149 | action->dev_id = cd; | 149 | action->dev_id = cd; |
150 | 150 | ||
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c index 6996da4d74a2..00a4da277cbb 100644 --- a/arch/mips/kernel/cevt-ds1287.c +++ b/arch/mips/kernel/cevt-ds1287.c | |||
@@ -107,7 +107,7 @@ static irqreturn_t ds1287_interrupt(int irq, void *dev_id) | |||
107 | 107 | ||
108 | static struct irqaction ds1287_irqaction = { | 108 | static struct irqaction ds1287_irqaction = { |
109 | .handler = ds1287_interrupt, | 109 | .handler = ds1287_interrupt, |
110 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 110 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
111 | .name = "ds1287", | 111 | .name = "ds1287", |
112 | }; | 112 | }; |
113 | 113 | ||
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index 92351e00ae0e..f5d265eb6eae 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c | |||
@@ -113,7 +113,7 @@ static irqreturn_t gt641xx_timer0_interrupt(int irq, void *dev_id) | |||
113 | 113 | ||
114 | static struct irqaction gt641xx_timer0_irqaction = { | 114 | static struct irqaction gt641xx_timer0_irqaction = { |
115 | .handler = gt641xx_timer0_interrupt, | 115 | .handler = gt641xx_timer0_interrupt, |
116 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 116 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
117 | .name = "gt641xx_timer0", | 117 | .name = "gt641xx_timer0", |
118 | }; | 118 | }; |
119 | 119 | ||
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c index 2652362ce047..b469ad05d520 100644 --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c | |||
@@ -83,7 +83,7 @@ out: | |||
83 | 83 | ||
84 | struct irqaction c0_compare_irqaction = { | 84 | struct irqaction c0_compare_irqaction = { |
85 | .handler = c0_compare_interrupt, | 85 | .handler = c0_compare_interrupt, |
86 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 86 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
87 | .name = "timer", | 87 | .name = "timer", |
88 | }; | 88 | }; |
89 | 89 | ||
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c index ac5903d1b20e..da78eeaea6e8 100644 --- a/arch/mips/kernel/cevt-sb1250.c +++ b/arch/mips/kernel/cevt-sb1250.c | |||
@@ -143,7 +143,7 @@ void __cpuinit sb1250_clockevent_init(void) | |||
143 | sb1250_unmask_irq(cpu, irq); | 143 | sb1250_unmask_irq(cpu, irq); |
144 | 144 | ||
145 | action->handler = sibyte_counter_handler; | 145 | action->handler = sibyte_counter_handler; |
146 | action->flags = IRQF_DISABLED | IRQF_PERCPU; | 146 | action->flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER; |
147 | action->name = name; | 147 | action->name = name; |
148 | action->dev_id = cd; | 148 | action->dev_id = cd; |
149 | 149 | ||
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c index 0037f21baf0d..218ee6bda935 100644 --- a/arch/mips/kernel/cevt-txx9.c +++ b/arch/mips/kernel/cevt-txx9.c | |||
@@ -146,7 +146,7 @@ static irqreturn_t txx9tmr_interrupt(int irq, void *dev_id) | |||
146 | 146 | ||
147 | static struct irqaction txx9tmr_irq = { | 147 | static struct irqaction txx9tmr_irq = { |
148 | .handler = txx9tmr_interrupt, | 148 | .handler = txx9tmr_interrupt, |
149 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 149 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
150 | .name = "txx9tmr", | 150 | .name = "txx9tmr", |
151 | .dev_id = &txx9_clock_event_device, | 151 | .dev_id = &txx9_clock_event_device, |
152 | }; | 152 | }; |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index f709657e4dcd..7a51866068a4 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <asm/mipsregs.h> | 23 | #include <asm/mipsregs.h> |
24 | #include <asm/system.h> | 24 | #include <asm/system.h> |
25 | #include <asm/watch.h> | 25 | #include <asm/watch.h> |
26 | 26 | #include <asm/spram.h> | |
27 | /* | 27 | /* |
28 | * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, | 28 | * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, |
29 | * the implementation of the "wait" feature differs between CPU families. This | 29 | * the implementation of the "wait" feature differs between CPU families. This |
@@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c) | |||
711 | mips_probe_watch_registers(c); | 711 | mips_probe_watch_registers(c); |
712 | } | 712 | } |
713 | 713 | ||
714 | #ifdef CONFIG_CPU_MIPSR2 | ||
715 | extern void spram_config(void); | ||
716 | #else | ||
717 | static inline void spram_config(void) {} | ||
718 | #endif | ||
719 | |||
720 | static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) | 714 | static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) |
721 | { | 715 | { |
722 | decode_configs(c); | 716 | decode_configs(c); |
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 531ce7b16124..ea695d9605e9 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -191,6 +191,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point | |||
191 | /* Set the SP after an empty pt_regs. */ | 191 | /* Set the SP after an empty pt_regs. */ |
192 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE | 192 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE |
193 | PTR_ADDU sp, $28 | 193 | PTR_ADDU sp, $28 |
194 | back_to_back_c0_hazard | ||
194 | set_saved_sp sp, t0, t1 | 195 | set_saved_sp sp, t0, t1 |
195 | PTR_SUBU sp, 4 * SZREG # init stack pointer | 196 | PTR_SUBU sp, 4 * SZREG # init stack pointer |
196 | 197 | ||
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c index f7d8d5d0ddbf..ed5c441615e4 100644 --- a/arch/mips/kernel/i8253.c +++ b/arch/mips/kernel/i8253.c | |||
@@ -98,7 +98,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) | |||
98 | 98 | ||
99 | static struct irqaction irq0 = { | 99 | static struct irqaction irq0 = { |
100 | .handler = timer_interrupt, | 100 | .handler = timer_interrupt, |
101 | .flags = IRQF_DISABLED | IRQF_NOBALANCING, | 101 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER, |
102 | .name = "timer" | 102 | .name = "timer" |
103 | }; | 103 | }; |
104 | 104 | ||
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index d2072cd38592..b181f2f0ea8e 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c | |||
@@ -14,38 +14,23 @@ | |||
14 | 14 | ||
15 | 15 | ||
16 | static unsigned long _gic_base; | 16 | static unsigned long _gic_base; |
17 | static unsigned int _irqbase, _mapsize, numvpes, numintrs; | 17 | static unsigned int _irqbase; |
18 | static struct gic_intr_map *_intrmap; | 18 | static unsigned int gic_irq_flags[GIC_NUM_INTRS]; |
19 | #define GIC_IRQ_FLAG_EDGE 0x0001 | ||
19 | 20 | ||
20 | static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; | 21 | struct gic_pcpu_mask pcpu_masks[NR_CPUS]; |
21 | static struct gic_pending_regs pending_regs[NR_CPUS]; | 22 | static struct gic_pending_regs pending_regs[NR_CPUS]; |
22 | static struct gic_intrmask_regs intrmask_regs[NR_CPUS]; | 23 | static struct gic_intrmask_regs intrmask_regs[NR_CPUS]; |
23 | 24 | ||
24 | #define gic_wedgeb2bok 0 /* | ||
25 | * Can GIC handle b2b writes to wedge register? | ||
26 | */ | ||
27 | #if gic_wedgeb2bok == 0 | ||
28 | static DEFINE_SPINLOCK(gic_wedgeb2b_lock); | ||
29 | #endif | ||
30 | |||
31 | void gic_send_ipi(unsigned int intr) | 25 | void gic_send_ipi(unsigned int intr) |
32 | { | 26 | { |
33 | #if gic_wedgeb2bok == 0 | ||
34 | unsigned long flags; | ||
35 | #endif | ||
36 | pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__, | 27 | pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__, |
37 | read_c0_status()); | 28 | read_c0_status()); |
38 | if (!gic_wedgeb2bok) | ||
39 | spin_lock_irqsave(&gic_wedgeb2b_lock, flags); | ||
40 | GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr); | 29 | GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr); |
41 | if (!gic_wedgeb2bok) { | ||
42 | (void) GIC_REG(SHARED, GIC_SH_CONFIG); | ||
43 | spin_unlock_irqrestore(&gic_wedgeb2b_lock, flags); | ||
44 | } | ||
45 | } | 30 | } |
46 | 31 | ||
47 | /* This is Malta specific and needs to be exported */ | 32 | /* This is Malta specific and needs to be exported */ |
48 | static void vpe_local_setup(unsigned int numvpes) | 33 | static void __init vpe_local_setup(unsigned int numvpes) |
49 | { | 34 | { |
50 | int i; | 35 | int i; |
51 | unsigned long timer_interrupt = 5, perf_interrupt = 5; | 36 | unsigned long timer_interrupt = 5, perf_interrupt = 5; |
@@ -105,44 +90,34 @@ unsigned int gic_get_int(void) | |||
105 | 90 | ||
106 | static unsigned int gic_irq_startup(unsigned int irq) | 91 | static unsigned int gic_irq_startup(unsigned int irq) |
107 | { | 92 | { |
108 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | ||
109 | irq -= _irqbase; | 93 | irq -= _irqbase; |
110 | GIC_SET_INTR_MASK(irq, 1); | 94 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
95 | GIC_SET_INTR_MASK(irq); | ||
111 | return 0; | 96 | return 0; |
112 | } | 97 | } |
113 | 98 | ||
114 | static void gic_irq_ack(unsigned int irq) | 99 | static void gic_irq_ack(unsigned int irq) |
115 | { | 100 | { |
116 | #if gic_wedgeb2bok == 0 | ||
117 | unsigned long flags; | ||
118 | #endif | ||
119 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | ||
120 | irq -= _irqbase; | 101 | irq -= _irqbase; |
121 | GIC_CLR_INTR_MASK(irq, 1); | 102 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
103 | GIC_CLR_INTR_MASK(irq); | ||
122 | 104 | ||
123 | if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) { | 105 | if (gic_irq_flags[irq] & GIC_IRQ_FLAG_EDGE) |
124 | if (!gic_wedgeb2bok) | ||
125 | spin_lock_irqsave(&gic_wedgeb2b_lock, flags); | ||
126 | GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); | 106 | GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); |
127 | if (!gic_wedgeb2bok) { | ||
128 | (void) GIC_REG(SHARED, GIC_SH_CONFIG); | ||
129 | spin_unlock_irqrestore(&gic_wedgeb2b_lock, flags); | ||
130 | } | ||
131 | } | ||
132 | } | 107 | } |
133 | 108 | ||
134 | static void gic_mask_irq(unsigned int irq) | 109 | static void gic_mask_irq(unsigned int irq) |
135 | { | 110 | { |
136 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | ||
137 | irq -= _irqbase; | 111 | irq -= _irqbase; |
138 | GIC_CLR_INTR_MASK(irq, 1); | 112 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
113 | GIC_CLR_INTR_MASK(irq); | ||
139 | } | 114 | } |
140 | 115 | ||
141 | static void gic_unmask_irq(unsigned int irq) | 116 | static void gic_unmask_irq(unsigned int irq) |
142 | { | 117 | { |
143 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | ||
144 | irq -= _irqbase; | 118 | irq -= _irqbase; |
145 | GIC_SET_INTR_MASK(irq, 1); | 119 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
120 | GIC_SET_INTR_MASK(irq); | ||
146 | } | 121 | } |
147 | 122 | ||
148 | #ifdef CONFIG_SMP | 123 | #ifdef CONFIG_SMP |
@@ -155,9 +130,8 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
155 | unsigned long flags; | 130 | unsigned long flags; |
156 | int i; | 131 | int i; |
157 | 132 | ||
158 | pr_debug(KERN_DEBUG "%s called\n", __func__); | ||
159 | irq -= _irqbase; | 133 | irq -= _irqbase; |
160 | 134 | pr_debug(KERN_DEBUG "%s(%d) called\n", __func__, irq); | |
161 | cpumask_and(&tmp, cpumask, cpu_online_mask); | 135 | cpumask_and(&tmp, cpumask, cpu_online_mask); |
162 | if (cpus_empty(tmp)) | 136 | if (cpus_empty(tmp)) |
163 | return -1; | 137 | return -1; |
@@ -168,13 +142,6 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
168 | /* Re-route this IRQ */ | 142 | /* Re-route this IRQ */ |
169 | GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp)); | 143 | GIC_SH_MAP_TO_VPE_SMASK(irq, first_cpu(tmp)); |
170 | 144 | ||
171 | /* | ||
172 | * FIXME: assumption that _intrmap is ordered and has no holes | ||
173 | */ | ||
174 | |||
175 | /* Update the intr_map */ | ||
176 | _intrmap[irq].cpunum = first_cpu(tmp); | ||
177 | |||
178 | /* Update the pcpu_masks */ | 145 | /* Update the pcpu_masks */ |
179 | for (i = 0; i < NR_CPUS; i++) | 146 | for (i = 0; i < NR_CPUS; i++) |
180 | clear_bit(irq, pcpu_masks[i].pcpu_mask); | 147 | clear_bit(irq, pcpu_masks[i].pcpu_mask); |
@@ -201,8 +168,9 @@ static struct irq_chip gic_irq_controller = { | |||
201 | #endif | 168 | #endif |
202 | }; | 169 | }; |
203 | 170 | ||
204 | static void __init setup_intr(unsigned int intr, unsigned int cpu, | 171 | static void __init gic_setup_intr(unsigned int intr, unsigned int cpu, |
205 | unsigned int pin, unsigned int polarity, unsigned int trigtype) | 172 | unsigned int pin, unsigned int polarity, unsigned int trigtype, |
173 | unsigned int flags) | ||
206 | { | 174 | { |
207 | /* Setup Intr to Pin mapping */ | 175 | /* Setup Intr to Pin mapping */ |
208 | if (pin & GIC_MAP_TO_NMI_MSK) { | 176 | if (pin & GIC_MAP_TO_NMI_MSK) { |
@@ -227,38 +195,43 @@ static void __init setup_intr(unsigned int intr, unsigned int cpu, | |||
227 | GIC_SET_TRIGGER(intr, trigtype); | 195 | GIC_SET_TRIGGER(intr, trigtype); |
228 | 196 | ||
229 | /* Init Intr Masks */ | 197 | /* Init Intr Masks */ |
230 | GIC_SET_INTR_MASK(intr, 0); | 198 | GIC_CLR_INTR_MASK(intr); |
199 | /* Initialise per-cpu Interrupt software masks */ | ||
200 | if (flags & GIC_FLAG_IPI) | ||
201 | set_bit(intr, pcpu_masks[cpu].pcpu_mask); | ||
202 | if (flags & GIC_FLAG_TRANSPARENT) | ||
203 | GIC_SET_INTR_MASK(intr); | ||
204 | if (trigtype == GIC_TRIG_EDGE) | ||
205 | gic_irq_flags[intr] |= GIC_IRQ_FLAG_EDGE; | ||
231 | } | 206 | } |
232 | 207 | ||
233 | static void __init gic_basic_init(void) | 208 | static void __init gic_basic_init(int numintrs, int numvpes, |
209 | struct gic_intr_map *intrmap, int mapsize) | ||
234 | { | 210 | { |
235 | unsigned int i, cpu; | 211 | unsigned int i, cpu; |
236 | 212 | ||
237 | /* Setup defaults */ | 213 | /* Setup defaults */ |
238 | for (i = 0; i < GIC_NUM_INTRS; i++) { | 214 | for (i = 0; i < numintrs; i++) { |
239 | GIC_SET_POLARITY(i, GIC_POL_POS); | 215 | GIC_SET_POLARITY(i, GIC_POL_POS); |
240 | GIC_SET_TRIGGER(i, GIC_TRIG_LEVEL); | 216 | GIC_SET_TRIGGER(i, GIC_TRIG_LEVEL); |
241 | GIC_SET_INTR_MASK(i, 0); | 217 | GIC_CLR_INTR_MASK(i); |
218 | if (i < GIC_NUM_INTRS) | ||
219 | gic_irq_flags[i] = 0; | ||
242 | } | 220 | } |
243 | 221 | ||
244 | /* Setup specifics */ | 222 | /* Setup specifics */ |
245 | for (i = 0; i < _mapsize; i++) { | 223 | for (i = 0; i < mapsize; i++) { |
246 | cpu = _intrmap[i].cpunum; | 224 | cpu = intrmap[i].cpunum; |
247 | if (cpu == X) | 225 | if (cpu == X) |
248 | continue; | 226 | continue; |
249 | 227 | if (cpu == 0 && i != 0 && intrmap[i].flags == 0) | |
250 | if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 && | ||
251 | _intrmap[i].ipiflag == 0) | ||
252 | continue; | 228 | continue; |
253 | 229 | gic_setup_intr(i, | |
254 | setup_intr(_intrmap[i].intrnum, | 230 | intrmap[i].cpunum, |
255 | _intrmap[i].cpunum, | 231 | intrmap[i].pin, |
256 | _intrmap[i].pin, | 232 | intrmap[i].polarity, |
257 | _intrmap[i].polarity, | 233 | intrmap[i].trigtype, |
258 | _intrmap[i].trigtype); | 234 | intrmap[i].flags); |
259 | /* Initialise per-cpu Interrupt software masks */ | ||
260 | if (_intrmap[i].ipiflag) | ||
261 | set_bit(_intrmap[i].intrnum, pcpu_masks[cpu].pcpu_mask); | ||
262 | } | 235 | } |
263 | 236 | ||
264 | vpe_local_setup(numvpes); | 237 | vpe_local_setup(numvpes); |
@@ -273,12 +246,11 @@ void __init gic_init(unsigned long gic_base_addr, | |||
273 | unsigned int irqbase) | 246 | unsigned int irqbase) |
274 | { | 247 | { |
275 | unsigned int gicconfig; | 248 | unsigned int gicconfig; |
249 | int numvpes, numintrs; | ||
276 | 250 | ||
277 | _gic_base = (unsigned long) ioremap_nocache(gic_base_addr, | 251 | _gic_base = (unsigned long) ioremap_nocache(gic_base_addr, |
278 | gic_addrspace_size); | 252 | gic_addrspace_size); |
279 | _irqbase = irqbase; | 253 | _irqbase = irqbase; |
280 | _intrmap = intr_map; | ||
281 | _mapsize = intr_map_size; | ||
282 | 254 | ||
283 | GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig); | 255 | GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig); |
284 | numintrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >> | 256 | numintrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >> |
@@ -290,5 +262,5 @@ void __init gic_init(unsigned long gic_base_addr, | |||
290 | 262 | ||
291 | pr_debug("%s called\n", __func__); | 263 | pr_debug("%s called\n", __func__); |
292 | 264 | ||
293 | gic_basic_init(); | 265 | gic_basic_init(numintrs, numvpes, intr_map, intr_map_size); |
294 | } | 266 | } |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 6242bc68add7..b77fefaff9da 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
@@ -428,3 +428,9 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs) | |||
428 | return do_fork(clone_flags, newsp, ®s, 0, | 428 | return do_fork(clone_flags, newsp, ®s, 0, |
429 | parent_tidptr, child_tidptr); | 429 | parent_tidptr, child_tidptr); |
430 | } | 430 | } |
431 | |||
432 | asmlinkage long sys32_lookup_dcookie(u32 a0, u32 a1, char __user *buf, | ||
433 | size_t len) | ||
434 | { | ||
435 | return sys_lookup_dcookie(merge_64(a0, a1), buf, len); | ||
436 | } | ||
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 9bbf9775e0bd..14dde4ca932e 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -450,7 +450,7 @@ sys_call_table: | |||
450 | PTR sys_io_submit | 450 | PTR sys_io_submit |
451 | PTR sys_io_cancel /* 4245 */ | 451 | PTR sys_io_cancel /* 4245 */ |
452 | PTR sys_exit_group | 452 | PTR sys_exit_group |
453 | PTR sys_lookup_dcookie | 453 | PTR sys32_lookup_dcookie |
454 | PTR sys_epoll_create | 454 | PTR sys_epoll_create |
455 | PTR sys_epoll_ctl | 455 | PTR sys_epoll_ctl |
456 | PTR sys_epoll_wait /* 4250 */ | 456 | PTR sys_epoll_wait /* 4250 */ |
@@ -505,7 +505,7 @@ sys_call_table: | |||
505 | PTR sys_fchmodat | 505 | PTR sys_fchmodat |
506 | PTR sys_faccessat /* 4300 */ | 506 | PTR sys_faccessat /* 4300 */ |
507 | PTR compat_sys_pselect6 | 507 | PTR compat_sys_pselect6 |
508 | PTR sys_ppoll | 508 | PTR compat_sys_ppoll |
509 | PTR sys_unshare | 509 | PTR sys_unshare |
510 | PTR sys_splice | 510 | PTR sys_splice |
511 | PTR sys32_sync_file_range /* 4305 */ | 511 | PTR sys32_sync_file_range /* 4305 */ |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 4d181df44a40..24630fd8ef60 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -75,7 +75,6 @@ unsigned long irq_hwmask[NR_IRQS]; | |||
75 | 75 | ||
76 | asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS]; | 76 | asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS]; |
77 | 77 | ||
78 | |||
79 | /* | 78 | /* |
80 | * Number of InterProcessor Interrupt (IPI) message buffers to allocate | 79 | * Number of InterProcessor Interrupt (IPI) message buffers to allocate |
81 | */ | 80 | */ |
@@ -388,6 +387,7 @@ void smtc_prepare_cpus(int cpus) | |||
388 | IPIQ[i].head = IPIQ[i].tail = NULL; | 387 | IPIQ[i].head = IPIQ[i].tail = NULL; |
389 | spin_lock_init(&IPIQ[i].lock); | 388 | spin_lock_init(&IPIQ[i].lock); |
390 | IPIQ[i].depth = 0; | 389 | IPIQ[i].depth = 0; |
390 | IPIQ[i].resched_flag = 0; /* No reschedules queued initially */ | ||
391 | } | 391 | } |
392 | 392 | ||
393 | /* cpu_data index starts at zero */ | 393 | /* cpu_data index starts at zero */ |
@@ -741,11 +741,24 @@ void smtc_forward_irq(unsigned int irq) | |||
741 | static void smtc_ipi_qdump(void) | 741 | static void smtc_ipi_qdump(void) |
742 | { | 742 | { |
743 | int i; | 743 | int i; |
744 | struct smtc_ipi *temp; | ||
744 | 745 | ||
745 | for (i = 0; i < NR_CPUS ;i++) { | 746 | for (i = 0; i < NR_CPUS ;i++) { |
746 | printk("IPIQ[%d]: head = 0x%x, tail = 0x%x, depth = %d\n", | 747 | pr_info("IPIQ[%d]: head = 0x%x, tail = 0x%x, depth = %d\n", |
747 | i, (unsigned)IPIQ[i].head, (unsigned)IPIQ[i].tail, | 748 | i, (unsigned)IPIQ[i].head, (unsigned)IPIQ[i].tail, |
748 | IPIQ[i].depth); | 749 | IPIQ[i].depth); |
750 | temp = IPIQ[i].head; | ||
751 | |||
752 | while (temp != IPIQ[i].tail) { | ||
753 | pr_debug("%d %d %d: ", temp->type, temp->dest, | ||
754 | (int)temp->arg); | ||
755 | #ifdef SMTC_IPI_DEBUG | ||
756 | pr_debug("%u %lu\n", temp->sender, temp->stamp); | ||
757 | #else | ||
758 | pr_debug("\n"); | ||
759 | #endif | ||
760 | temp = temp->flink; | ||
761 | } | ||
749 | } | 762 | } |
750 | } | 763 | } |
751 | 764 | ||
@@ -784,11 +797,16 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) | |||
784 | int mtflags; | 797 | int mtflags; |
785 | unsigned long tcrestart; | 798 | unsigned long tcrestart; |
786 | extern void r4k_wait_irqoff(void), __pastwait(void); | 799 | extern void r4k_wait_irqoff(void), __pastwait(void); |
800 | int set_resched_flag = (type == LINUX_SMP_IPI && | ||
801 | action == SMP_RESCHEDULE_YOURSELF); | ||
787 | 802 | ||
788 | if (cpu == smp_processor_id()) { | 803 | if (cpu == smp_processor_id()) { |
789 | printk("Cannot Send IPI to self!\n"); | 804 | printk("Cannot Send IPI to self!\n"); |
790 | return; | 805 | return; |
791 | } | 806 | } |
807 | if (set_resched_flag && IPIQ[cpu].resched_flag != 0) | ||
808 | return; /* There is a reschedule queued already */ | ||
809 | |||
792 | /* Set up a descriptor, to be delivered either promptly or queued */ | 810 | /* Set up a descriptor, to be delivered either promptly or queued */ |
793 | pipi = smtc_ipi_dq(&freeIPIq); | 811 | pipi = smtc_ipi_dq(&freeIPIq); |
794 | if (pipi == NULL) { | 812 | if (pipi == NULL) { |
@@ -801,6 +819,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) | |||
801 | pipi->dest = cpu; | 819 | pipi->dest = cpu; |
802 | if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) { | 820 | if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) { |
803 | /* If not on same VPE, enqueue and send cross-VPE interrupt */ | 821 | /* If not on same VPE, enqueue and send cross-VPE interrupt */ |
822 | IPIQ[cpu].resched_flag |= set_resched_flag; | ||
804 | smtc_ipi_nq(&IPIQ[cpu], pipi); | 823 | smtc_ipi_nq(&IPIQ[cpu], pipi); |
805 | LOCK_CORE_PRA(); | 824 | LOCK_CORE_PRA(); |
806 | settc(cpu_data[cpu].tc_id); | 825 | settc(cpu_data[cpu].tc_id); |
@@ -847,6 +866,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) | |||
847 | */ | 866 | */ |
848 | write_tc_c0_tchalt(0); | 867 | write_tc_c0_tchalt(0); |
849 | UNLOCK_CORE_PRA(); | 868 | UNLOCK_CORE_PRA(); |
869 | IPIQ[cpu].resched_flag |= set_resched_flag; | ||
850 | smtc_ipi_nq(&IPIQ[cpu], pipi); | 870 | smtc_ipi_nq(&IPIQ[cpu], pipi); |
851 | } else { | 871 | } else { |
852 | postdirect: | 872 | postdirect: |
@@ -996,12 +1016,15 @@ void deferred_smtc_ipi(void) | |||
996 | * already enabled. | 1016 | * already enabled. |
997 | */ | 1017 | */ |
998 | local_irq_save(flags); | 1018 | local_irq_save(flags); |
999 | |||
1000 | spin_lock(&q->lock); | 1019 | spin_lock(&q->lock); |
1001 | pipi = __smtc_ipi_dq(q); | 1020 | pipi = __smtc_ipi_dq(q); |
1002 | spin_unlock(&q->lock); | 1021 | spin_unlock(&q->lock); |
1003 | if (pipi != NULL) | 1022 | if (pipi != NULL) { |
1023 | if (pipi->type == LINUX_SMP_IPI && | ||
1024 | (int)pipi->arg == SMP_RESCHEDULE_YOURSELF) | ||
1025 | IPIQ[cpu].resched_flag = 0; | ||
1004 | ipi_decode(pipi); | 1026 | ipi_decode(pipi); |
1027 | } | ||
1005 | /* | 1028 | /* |
1006 | * The use of the __raw_local restore isn't | 1029 | * The use of the __raw_local restore isn't |
1007 | * as obviously necessary here as in smtc_ipi_replay(), | 1030 | * as obviously necessary here as in smtc_ipi_replay(), |
@@ -1082,6 +1105,9 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm) | |||
1082 | * with interrupts off | 1105 | * with interrupts off |
1083 | */ | 1106 | */ |
1084 | local_irq_save(flags); | 1107 | local_irq_save(flags); |
1108 | if (pipi->type == LINUX_SMP_IPI && | ||
1109 | (int)pipi->arg == SMP_RESCHEDULE_YOURSELF) | ||
1110 | IPIQ[cpu].resched_flag = 0; | ||
1085 | ipi_decode(pipi); | 1111 | ipi_decode(pipi); |
1086 | local_irq_restore(flags); | 1112 | local_irq_restore(flags); |
1087 | } | 1113 | } |
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c index 6ddb507a87ef..1821d12a6410 100644 --- a/arch/mips/kernel/spram.c +++ b/arch/mips/kernel/spram.c | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/ptrace.h> | 13 | #include <linux/ptrace.h> |
14 | #include <linux/stddef.h> | 14 | #include <linux/stddef.h> |
15 | 15 | ||
16 | #include <asm/cpu.h> | ||
17 | #include <asm/fpu.h> | 16 | #include <asm/fpu.h> |
18 | #include <asm/mipsregs.h> | 17 | #include <asm/mipsregs.h> |
19 | #include <asm/system.h> | 18 | #include <asm/system.h> |
@@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type, | |||
198 | offset += 2 * SPRAM_TAG_STRIDE; | 197 | offset += 2 * SPRAM_TAG_STRIDE; |
199 | } | 198 | } |
200 | } | 199 | } |
201 | 200 | void __cpuinit spram_config(void) | |
202 | __cpuinit void spram_config(void) | ||
203 | { | 201 | { |
204 | struct cpuinfo_mips *c = ¤t_cpu_data; | 202 | struct cpuinfo_mips *c = ¤t_cpu_data; |
205 | unsigned int config0; | 203 | unsigned int config0; |
@@ -208,6 +206,7 @@ __cpuinit void spram_config(void) | |||
208 | case CPU_24K: | 206 | case CPU_24K: |
209 | case CPU_34K: | 207 | case CPU_34K: |
210 | case CPU_74K: | 208 | case CPU_74K: |
209 | case CPU_1004K: | ||
211 | config0 = read_c0_config(); | 210 | config0 = read_c0_config(); |
212 | /* FIXME: addresses are Malta specific */ | 211 | /* FIXME: addresses are Malta specific */ |
213 | if (config0 & (1<<24)) { | 212 | if (config0 & (1<<24)) { |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 03092ab2a296..60477529362e 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -1116,8 +1116,6 @@ static int vpe_open(struct inode *inode, struct file *filp) | |||
1116 | v->shared_ptr = NULL; | 1116 | v->shared_ptr = NULL; |
1117 | v->__start = 0; | 1117 | v->__start = 0; |
1118 | 1118 | ||
1119 | unlock_kernel(); | ||
1120 | |||
1121 | return 0; | 1119 | return 0; |
1122 | } | 1120 | } |
1123 | 1121 | ||
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c index f368c735cbd3..b32b4a3e5137 100644 --- a/arch/mips/loongson/common/irq.c +++ b/arch/mips/loongson/common/irq.c | |||
@@ -55,7 +55,6 @@ void __init arch_init_irq(void) | |||
55 | * int-handler is not on bootstrap | 55 | * int-handler is not on bootstrap |
56 | */ | 56 | */ |
57 | clear_c0_status(ST0_IM | ST0_BEV); | 57 | clear_c0_status(ST0_IM | ST0_BEV); |
58 | local_irq_disable(); | ||
59 | 58 | ||
60 | /* setting irq trigger mode */ | 59 | /* setting irq trigger mode */ |
61 | set_irq_trigger_mode(); | 60 | set_irq_trigger_mode(); |
diff --git a/arch/mips/math-emu/dp_simple.c b/arch/mips/math-emu/dp_simple.c index 1c555e6c6a9f..d9ae1dbabda7 100644 --- a/arch/mips/math-emu/dp_simple.c +++ b/arch/mips/math-emu/dp_simple.c | |||
@@ -62,8 +62,6 @@ ieee754dp ieee754dp_neg(ieee754dp x) | |||
62 | return ieee754dp_nanxcpt(y, "neg"); | 62 | return ieee754dp_nanxcpt(y, "neg"); |
63 | } | 63 | } |
64 | 64 | ||
65 | if (ieee754dp_isnan(x)) /* but not infinity */ | ||
66 | return ieee754dp_nanxcpt(x, "neg", x); | ||
67 | return x; | 65 | return x; |
68 | } | 66 | } |
69 | 67 | ||
@@ -76,15 +74,12 @@ ieee754dp ieee754dp_abs(ieee754dp x) | |||
76 | CLEARCX; | 74 | CLEARCX; |
77 | FLUSHXDP; | 75 | FLUSHXDP; |
78 | 76 | ||
77 | /* Clear sign ALWAYS, irrespective of NaN */ | ||
78 | DPSIGN(x) = 0; | ||
79 | |||
79 | if (xc == IEEE754_CLASS_SNAN) { | 80 | if (xc == IEEE754_CLASS_SNAN) { |
80 | SETCX(IEEE754_INVALID_OPERATION); | 81 | return ieee754dp_nanxcpt(ieee754dp_indef(), "abs"); |
81 | return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); | ||
82 | } | 82 | } |
83 | 83 | ||
84 | if (ieee754dp_isnan(x)) /* but not infinity */ | ||
85 | return ieee754dp_nanxcpt(x, "abs", x); | ||
86 | |||
87 | /* quick fix up */ | ||
88 | DPSIGN(x) = 0; | ||
89 | return x; | 84 | return x; |
90 | } | 85 | } |
diff --git a/arch/mips/math-emu/sp_simple.c b/arch/mips/math-emu/sp_simple.c index 770f0f4677cd..3175477d36f6 100644 --- a/arch/mips/math-emu/sp_simple.c +++ b/arch/mips/math-emu/sp_simple.c | |||
@@ -62,8 +62,6 @@ ieee754sp ieee754sp_neg(ieee754sp x) | |||
62 | return ieee754sp_nanxcpt(y, "neg"); | 62 | return ieee754sp_nanxcpt(y, "neg"); |
63 | } | 63 | } |
64 | 64 | ||
65 | if (ieee754sp_isnan(x)) /* but not infinity */ | ||
66 | return ieee754sp_nanxcpt(x, "neg", x); | ||
67 | return x; | 65 | return x; |
68 | } | 66 | } |
69 | 67 | ||
@@ -76,15 +74,12 @@ ieee754sp ieee754sp_abs(ieee754sp x) | |||
76 | CLEARCX; | 74 | CLEARCX; |
77 | FLUSHXSP; | 75 | FLUSHXSP; |
78 | 76 | ||
77 | /* Clear sign ALWAYS, irrespective of NaN */ | ||
78 | SPSIGN(x) = 0; | ||
79 | |||
79 | if (xc == IEEE754_CLASS_SNAN) { | 80 | if (xc == IEEE754_CLASS_SNAN) { |
80 | SETCX(IEEE754_INVALID_OPERATION); | ||
81 | return ieee754sp_nanxcpt(ieee754sp_indef(), "abs"); | 81 | return ieee754sp_nanxcpt(ieee754sp_indef(), "abs"); |
82 | } | 82 | } |
83 | 83 | ||
84 | if (ieee754sp_isnan(x)) /* but not infinity */ | ||
85 | return ieee754sp_nanxcpt(x, "abs", x); | ||
86 | |||
87 | /* quick fix up */ | ||
88 | SPSIGN(x) = 0; | ||
89 | return x; | 84 | return x; |
90 | } | 85 | } |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 15aa1902a788..8d1f4f363049 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/swap.h> | 27 | #include <linux/swap.h> |
28 | #include <linux/proc_fs.h> | 28 | #include <linux/proc_fs.h> |
29 | #include <linux/pfn.h> | 29 | #include <linux/pfn.h> |
30 | #include <linux/hardirq.h> | ||
30 | 31 | ||
31 | #include <asm/asm-offsets.h> | 32 | #include <asm/asm-offsets.h> |
32 | #include <asm/bootinfo.h> | 33 | #include <asm/bootinfo.h> |
@@ -132,7 +133,10 @@ void *kmap_coherent(struct page *page, unsigned long addr) | |||
132 | inc_preempt_count(); | 133 | inc_preempt_count(); |
133 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); | 134 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); |
134 | #ifdef CONFIG_MIPS_MT_SMTC | 135 | #ifdef CONFIG_MIPS_MT_SMTC |
135 | idx += FIX_N_COLOURS * smp_processor_id(); | 136 | idx += FIX_N_COLOURS * smp_processor_id() + |
137 | (in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0); | ||
138 | #else | ||
139 | idx += in_interrupt() ? FIX_N_COLOURS : 0; | ||
136 | #endif | 140 | #endif |
137 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); | 141 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); |
138 | pte = mk_pte(page, PAGE_KERNEL); | 142 | pte = mk_pte(page, PAGE_KERNEL); |
diff --git a/arch/mips/mti-malta/malta-amon.c b/arch/mips/mti-malta/malta-amon.c index df9e526312a2..469d9b0cee6d 100644 --- a/arch/mips/mti-malta/malta-amon.c +++ b/arch/mips/mti-malta/malta-amon.c | |||
@@ -70,11 +70,12 @@ void amon_cpu_start(int cpu, | |||
70 | launch->sp = sp; | 70 | launch->sp = sp; |
71 | launch->a0 = a0; | 71 | launch->a0 = a0; |
72 | 72 | ||
73 | /* Make sure target sees parameters before the go bit */ | 73 | smp_wmb(); /* Target must see parameters before go */ |
74 | smp_mb(); | ||
75 | |||
76 | launch->flags |= LAUNCH_FGO; | 74 | launch->flags |= LAUNCH_FGO; |
75 | smp_wmb(); /* Target must see go before we poll */ | ||
76 | |||
77 | while ((launch->flags & LAUNCH_FGONE) == 0) | 77 | while ((launch->flags & LAUNCH_FGONE) == 0) |
78 | ; | 78 | ; |
79 | smp_rmb(); /* Target will be updating flags soon */ | ||
79 | pr_debug("launch: cpu%d gone!\n", cpu); | 80 | pr_debug("launch: cpu%d gone!\n", cpu); |
80 | } | 81 | } |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 3e0a9b35ba5c..4c3fca18a171 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -87,7 +87,7 @@ static inline int mips_pcibios_iack(void) | |||
87 | dummy = BONITO_PCIMAP_CFG; | 87 | dummy = BONITO_PCIMAP_CFG; |
88 | iob(); /* sync */ | 88 | iob(); /* sync */ |
89 | 89 | ||
90 | irq = readl((u32 *)_pcictrl_bonito_pcicfg); | 90 | irq = __raw_readl((u32 *)_pcictrl_bonito_pcicfg); |
91 | iob(); /* sync */ | 91 | iob(); /* sync */ |
92 | irq &= 0xff; | 92 | irq &= 0xff; |
93 | BONITO_PCIMAP_CFG = 0; | 93 | BONITO_PCIMAP_CFG = 0; |
@@ -379,38 +379,43 @@ static msc_irqmap_t __initdata msc_eicirqmap[] = { | |||
379 | 379 | ||
380 | static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); | 380 | static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); |
381 | 381 | ||
382 | #if defined(CONFIG_MIPS_MT_SMP) | ||
383 | /* | 382 | /* |
384 | * This GIC specific tabular array defines the association between External | 383 | * This GIC specific tabular array defines the association between External |
385 | * Interrupts and CPUs/Core Interrupts. The nature of the External | 384 | * Interrupts and CPUs/Core Interrupts. The nature of the External |
386 | * Interrupts is also defined here - polarity/trigger. | 385 | * Interrupts is also defined here - polarity/trigger. |
387 | */ | 386 | */ |
387 | |||
388 | #define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK | ||
388 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { | 389 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { |
389 | { GIC_EXT_INTR(0), X, X, X, X, 0 }, | 390 | { X, X, X, X, 0 }, |
390 | { GIC_EXT_INTR(1), X, X, X, X, 0 }, | 391 | { X, X, X, X, 0 }, |
391 | { GIC_EXT_INTR(2), X, X, X, X, 0 }, | 392 | { X, X, X, X, 0 }, |
392 | { GIC_EXT_INTR(3), 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 393 | { 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
393 | { GIC_EXT_INTR(4), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 394 | { 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
394 | { GIC_EXT_INTR(5), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 395 | { 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
395 | { GIC_EXT_INTR(6), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 396 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
396 | { GIC_EXT_INTR(7), 0, GIC_CPU_INT4, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 397 | { 0, GIC_CPU_INT4, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
397 | { GIC_EXT_INTR(8), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 398 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
398 | { GIC_EXT_INTR(9), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 399 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
399 | { GIC_EXT_INTR(10), X, X, X, X, 0 }, | 400 | { X, X, X, X, 0 }, |
400 | { GIC_EXT_INTR(11), X, X, X, X, 0 }, | 401 | { X, X, X, X, 0 }, |
401 | { GIC_EXT_INTR(12), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 402 | { 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
402 | { GIC_EXT_INTR(13), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 403 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
403 | { GIC_EXT_INTR(14), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 404 | { 0, GIC_CPU_NMI, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT }, |
404 | { GIC_EXT_INTR(15), X, X, X, X, 0 }, | 405 | { X, X, X, X, 0 }, |
405 | /* This is the end of the general interrupts now we do IPI ones */ | 406 | /* The remainder of this table is initialised by fill_ipi_map */ |
406 | }; | 407 | }; |
407 | #endif | ||
408 | 408 | ||
409 | /* | 409 | /* |
410 | * GCMP needs to be detected before any SMP initialisation | 410 | * GCMP needs to be detected before any SMP initialisation |
411 | */ | 411 | */ |
412 | int __init gcmp_probe(unsigned long addr, unsigned long size) | 412 | int __init gcmp_probe(unsigned long addr, unsigned long size) |
413 | { | 413 | { |
414 | if (mips_revision_sconid != MIPS_REVISION_SCON_ROCIT) { | ||
415 | gcmp_present = 0; | ||
416 | return gcmp_present; | ||
417 | } | ||
418 | |||
414 | if (gcmp_present >= 0) | 419 | if (gcmp_present >= 0) |
415 | return gcmp_present; | 420 | return gcmp_present; |
416 | 421 | ||
@@ -419,20 +424,35 @@ int __init gcmp_probe(unsigned long addr, unsigned long size) | |||
419 | gcmp_present = (GCMPGCB(GCMPB) & GCMP_GCB_GCMPB_GCMPBASE_MSK) == GCMP_BASE_ADDR; | 424 | gcmp_present = (GCMPGCB(GCMPB) & GCMP_GCB_GCMPB_GCMPBASE_MSK) == GCMP_BASE_ADDR; |
420 | 425 | ||
421 | if (gcmp_present) | 426 | if (gcmp_present) |
422 | printk(KERN_DEBUG "GCMP present\n"); | 427 | pr_debug("GCMP present\n"); |
423 | return gcmp_present; | 428 | return gcmp_present; |
424 | } | 429 | } |
425 | 430 | ||
431 | /* Return the number of IOCU's present */ | ||
432 | int __init gcmp_niocu(void) | ||
433 | { | ||
434 | return gcmp_present ? | ||
435 | (GCMPGCB(GC) & GCMP_GCB_GC_NUMIOCU_MSK) >> GCMP_GCB_GC_NUMIOCU_SHF : | ||
436 | 0; | ||
437 | } | ||
438 | |||
439 | /* Set GCMP region attributes */ | ||
440 | void __init gcmp_setregion(int region, unsigned long base, | ||
441 | unsigned long mask, int type) | ||
442 | { | ||
443 | GCMPGCBn(CMxBASE, region) = base; | ||
444 | GCMPGCBn(CMxMASK, region) = mask | type; | ||
445 | } | ||
446 | |||
426 | #if defined(CONFIG_MIPS_MT_SMP) | 447 | #if defined(CONFIG_MIPS_MT_SMP) |
427 | static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin) | 448 | static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin) |
428 | { | 449 | { |
429 | int intr = baseintr + cpu; | 450 | int intr = baseintr + cpu; |
430 | gic_intr_map[intr].intrnum = GIC_EXT_INTR(intr); | ||
431 | gic_intr_map[intr].cpunum = cpu; | 451 | gic_intr_map[intr].cpunum = cpu; |
432 | gic_intr_map[intr].pin = cpupin; | 452 | gic_intr_map[intr].pin = cpupin; |
433 | gic_intr_map[intr].polarity = GIC_POL_POS; | 453 | gic_intr_map[intr].polarity = GIC_POL_POS; |
434 | gic_intr_map[intr].trigtype = GIC_TRIG_EDGE; | 454 | gic_intr_map[intr].trigtype = GIC_TRIG_EDGE; |
435 | gic_intr_map[intr].ipiflag = 1; | 455 | gic_intr_map[intr].flags = GIC_FLAG_IPI; |
436 | ipi_map[cpu] |= (1 << (cpupin + 2)); | 456 | ipi_map[cpu] |= (1 << (cpupin + 2)); |
437 | } | 457 | } |
438 | 458 | ||
@@ -447,6 +467,12 @@ static void __init fill_ipi_map(void) | |||
447 | } | 467 | } |
448 | #endif | 468 | #endif |
449 | 469 | ||
470 | void __init arch_init_ipiirq(int irq, struct irqaction *action) | ||
471 | { | ||
472 | setup_irq(irq, action); | ||
473 | set_irq_handler(irq, handle_percpu_irq); | ||
474 | } | ||
475 | |||
450 | void __init arch_init_irq(void) | 476 | void __init arch_init_irq(void) |
451 | { | 477 | { |
452 | init_i8259_irqs(); | 478 | init_i8259_irqs(); |
@@ -458,12 +484,17 @@ void __init arch_init_irq(void) | |||
458 | GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK; | 484 | GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK; |
459 | gic_present = 1; | 485 | gic_present = 1; |
460 | } else { | 486 | } else { |
461 | _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ); | 487 | if (mips_revision_sconid == MIPS_REVISION_SCON_ROCIT) { |
462 | gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) & | 488 | _msc01_biu_base = (unsigned long) |
463 | MSC01_SC_CFG_GICPRES_MSK) >> MSC01_SC_CFG_GICPRES_SHF; | 489 | ioremap_nocache(MSC01_BIU_REG_BASE, |
490 | MSC01_BIU_ADDRSPACE_SZ); | ||
491 | gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) & | ||
492 | MSC01_SC_CFG_GICPRES_MSK) >> | ||
493 | MSC01_SC_CFG_GICPRES_SHF; | ||
494 | } | ||
464 | } | 495 | } |
465 | if (gic_present) | 496 | if (gic_present) |
466 | printk(KERN_DEBUG "GIC present\n"); | 497 | pr_debug("GIC present\n"); |
467 | 498 | ||
468 | switch (mips_revision_sconid) { | 499 | switch (mips_revision_sconid) { |
469 | case MIPS_REVISION_SCON_SOCIT: | 500 | case MIPS_REVISION_SCON_SOCIT: |
@@ -526,16 +557,16 @@ void __init arch_init_irq(void) | |||
526 | &corehi_irqaction); | 557 | &corehi_irqaction); |
527 | } | 558 | } |
528 | 559 | ||
529 | #if defined(CONFIG_MIPS_MT_SMP) | ||
530 | if (gic_present) { | 560 | if (gic_present) { |
531 | /* FIXME */ | 561 | /* FIXME */ |
532 | int i; | 562 | int i; |
533 | 563 | #if defined(CONFIG_MIPS_MT_SMP) | |
534 | gic_call_int_base = GIC_NUM_INTRS - NR_CPUS; | 564 | gic_call_int_base = GIC_NUM_INTRS - NR_CPUS; |
535 | gic_resched_int_base = gic_call_int_base - NR_CPUS; | 565 | gic_resched_int_base = gic_call_int_base - NR_CPUS; |
536 | |||
537 | fill_ipi_map(); | 566 | fill_ipi_map(); |
538 | gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); | 567 | #endif |
568 | gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, | ||
569 | ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); | ||
539 | if (!gcmp_present) { | 570 | if (!gcmp_present) { |
540 | /* Enable the GIC */ | 571 | /* Enable the GIC */ |
541 | i = REG(_msc01_biu_base, MSC01_SC_CFG); | 572 | i = REG(_msc01_biu_base, MSC01_SC_CFG); |
@@ -543,7 +574,7 @@ void __init arch_init_irq(void) | |||
543 | (i | (0x1 << MSC01_SC_CFG_GICENA_SHF)); | 574 | (i | (0x1 << MSC01_SC_CFG_GICENA_SHF)); |
544 | pr_debug("GIC Enabled\n"); | 575 | pr_debug("GIC Enabled\n"); |
545 | } | 576 | } |
546 | 577 | #if defined(CONFIG_MIPS_MT_SMP) | |
547 | /* set up ipi interrupts */ | 578 | /* set up ipi interrupts */ |
548 | if (cpu_has_vint) { | 579 | if (cpu_has_vint) { |
549 | set_vi_handler(MIPSCPU_INT_IPI0, malta_ipi_irqdispatch); | 580 | set_vi_handler(MIPSCPU_INT_IPI0, malta_ipi_irqdispatch); |
@@ -556,16 +587,14 @@ void __init arch_init_irq(void) | |||
556 | write_c0_status(0x1100dc00); | 587 | write_c0_status(0x1100dc00); |
557 | printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status()); | 588 | printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status()); |
558 | for (i = 0; i < NR_CPUS; i++) { | 589 | for (i = 0; i < NR_CPUS; i++) { |
559 | setup_irq(MIPS_GIC_IRQ_BASE + | 590 | arch_init_ipiirq(MIPS_GIC_IRQ_BASE + |
560 | GIC_RESCHED_INT(i), &irq_resched); | 591 | GIC_RESCHED_INT(i), &irq_resched); |
561 | setup_irq(MIPS_GIC_IRQ_BASE + | 592 | arch_init_ipiirq(MIPS_GIC_IRQ_BASE + |
562 | GIC_CALL_INT(i), &irq_call); | 593 | GIC_CALL_INT(i), &irq_call); |
563 | set_irq_handler(MIPS_GIC_IRQ_BASE + | ||
564 | GIC_RESCHED_INT(i), handle_percpu_irq); | ||
565 | set_irq_handler(MIPS_GIC_IRQ_BASE + | ||
566 | GIC_CALL_INT(i), handle_percpu_irq); | ||
567 | } | 594 | } |
595 | #endif | ||
568 | } else { | 596 | } else { |
597 | #if defined(CONFIG_MIPS_MT_SMP) | ||
569 | /* set up ipi interrupts */ | 598 | /* set up ipi interrupts */ |
570 | if (cpu_has_veic) { | 599 | if (cpu_has_veic) { |
571 | set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch); | 600 | set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch); |
@@ -580,14 +609,10 @@ void __init arch_init_irq(void) | |||
580 | cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 609 | cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
581 | cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ; | 610 | cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ; |
582 | } | 611 | } |
583 | 612 | arch_init_ipiirq(cpu_ipi_resched_irq, &irq_resched); | |
584 | setup_irq(cpu_ipi_resched_irq, &irq_resched); | 613 | arch_init_ipiirq(cpu_ipi_call_irq, &irq_call); |
585 | setup_irq(cpu_ipi_call_irq, &irq_call); | ||
586 | |||
587 | set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq); | ||
588 | set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq); | ||
589 | } | ||
590 | #endif | 614 | #endif |
615 | } | ||
591 | } | 616 | } |
592 | 617 | ||
593 | void malta_be_init(void) | 618 | void malta_be_init(void) |
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c index b9743190609a..2fbfa1a8c3a9 100644 --- a/arch/mips/mti-malta/malta-pci.c +++ b/arch/mips/mti-malta/malta-pci.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | 28 | ||
29 | #include <asm/gt64120.h> | 29 | #include <asm/gt64120.h> |
30 | 30 | #include <asm/gcmpregs.h> | |
31 | #include <asm/mips-boards/generic.h> | 31 | #include <asm/mips-boards/generic.h> |
32 | #include <asm/mips-boards/bonito64.h> | 32 | #include <asm/mips-boards/bonito64.h> |
33 | #include <asm/mips-boards/msc01_pci.h> | 33 | #include <asm/mips-boards/msc01_pci.h> |
@@ -201,7 +201,11 @@ void __init mips_pcibios_init(void) | |||
201 | msc_mem_resource.start = start & mask; | 201 | msc_mem_resource.start = start & mask; |
202 | msc_mem_resource.end = (start & mask) | ~mask; | 202 | msc_mem_resource.end = (start & mask) | ~mask; |
203 | msc_controller.mem_offset = (start & mask) - (map & mask); | 203 | msc_controller.mem_offset = (start & mask) - (map & mask); |
204 | 204 | #ifdef CONFIG_MIPS_CMP | |
205 | if (gcmp_niocu()) | ||
206 | gcmp_setregion(0, start, mask, | ||
207 | GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); | ||
208 | #endif | ||
205 | MSC_READ(MSC01_PCI_SC2PIOBASL, start); | 209 | MSC_READ(MSC01_PCI_SC2PIOBASL, start); |
206 | MSC_READ(MSC01_PCI_SC2PIOMSKL, mask); | 210 | MSC_READ(MSC01_PCI_SC2PIOMSKL, mask); |
207 | MSC_READ(MSC01_PCI_SC2PIOMAPL, map); | 211 | MSC_READ(MSC01_PCI_SC2PIOMAPL, map); |
@@ -209,7 +213,11 @@ void __init mips_pcibios_init(void) | |||
209 | msc_io_resource.end = (map & mask) | ~mask; | 213 | msc_io_resource.end = (map & mask) | ~mask; |
210 | msc_controller.io_offset = 0; | 214 | msc_controller.io_offset = 0; |
211 | ioport_resource.end = ~mask; | 215 | ioport_resource.end = ~mask; |
212 | 216 | #ifdef CONFIG_MIPS_CMP | |
217 | if (gcmp_niocu()) | ||
218 | gcmp_setregion(1, start, mask, | ||
219 | GCMP_GCB_GCMPB_CMDEFTGT_IOCU1); | ||
220 | #endif | ||
213 | /* If ranges overlap I/O takes precedence. */ | 221 | /* If ranges overlap I/O takes precedence. */ |
214 | start = start & mask; | 222 | start = start & mask; |
215 | end = start | ~mask; | 223 | end = start | ~mask; |
@@ -241,3 +249,16 @@ void __init mips_pcibios_init(void) | |||
241 | 249 | ||
242 | register_pci_controller(controller); | 250 | register_pci_controller(controller); |
243 | } | 251 | } |
252 | |||
253 | /* Enable PCI 2.1 compatibility in PIIX4 */ | ||
254 | static void __init quirk_dlcsetup(struct pci_dev *dev) | ||
255 | { | ||
256 | u8 odlc, ndlc; | ||
257 | (void) pci_read_config_byte(dev, 0x82, &odlc); | ||
258 | /* Enable passive releases and delayed transaction */ | ||
259 | ndlc = odlc | 7; | ||
260 | (void) pci_write_config_byte(dev, 0x82, ndlc); | ||
261 | } | ||
262 | |||
263 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, | ||
264 | quirk_dlcsetup); | ||
diff --git a/arch/mips/nxp/pnx8550/common/int.c b/arch/mips/nxp/pnx8550/common/int.c index f080f114a1bf..7aca7d5375e5 100644 --- a/arch/mips/nxp/pnx8550/common/int.c +++ b/arch/mips/nxp/pnx8550/common/int.c | |||
@@ -172,7 +172,7 @@ static struct irqaction gic_action = { | |||
172 | 172 | ||
173 | static struct irqaction timer_action = { | 173 | static struct irqaction timer_action = { |
174 | .handler = no_action, | 174 | .handler = no_action, |
175 | .flags = IRQF_DISABLED, | 175 | .flags = IRQF_DISABLED | IRQF_TIMER, |
176 | .name = "Timer", | 176 | .name = "Timer", |
177 | }; | 177 | }; |
178 | 178 | ||
diff --git a/arch/mips/nxp/pnx8550/common/time.c b/arch/mips/nxp/pnx8550/common/time.c index 18b192784877..8836c6203df0 100644 --- a/arch/mips/nxp/pnx8550/common/time.c +++ b/arch/mips/nxp/pnx8550/common/time.c | |||
@@ -59,7 +59,7 @@ static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id) | |||
59 | 59 | ||
60 | static struct irqaction pnx8xxx_timer_irq = { | 60 | static struct irqaction pnx8xxx_timer_irq = { |
61 | .handler = pnx8xxx_timer_interrupt, | 61 | .handler = pnx8xxx_timer_interrupt, |
62 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 62 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
63 | .name = "pnx8xxx_timer", | 63 | .name = "pnx8xxx_timer", |
64 | }; | 64 | }; |
65 | 65 | ||
@@ -72,7 +72,7 @@ static irqreturn_t monotonic_interrupt(int irq, void *dev_id) | |||
72 | 72 | ||
73 | static struct irqaction monotonic_irqaction = { | 73 | static struct irqaction monotonic_irqaction = { |
74 | .handler = monotonic_interrupt, | 74 | .handler = monotonic_interrupt, |
75 | .flags = IRQF_DISABLED, | 75 | .flags = IRQF_DISABLED | IRQF_TIMER, |
76 | .name = "Monotonic timer", | 76 | .name = "Monotonic timer", |
77 | }; | 77 | }; |
78 | 78 | ||
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index deed1d5d4982..575cd1473475 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c | |||
@@ -22,7 +22,7 @@ | |||
22 | * otherwise, the oprofile tool will not recognize this and complain about | 22 | * otherwise, the oprofile tool will not recognize this and complain about |
23 | * "cpu_type 'unset' is not valid". | 23 | * "cpu_type 'unset' is not valid". |
24 | */ | 24 | */ |
25 | #define LOONGSON2_CPU_TYPE "mips/godson2" | 25 | #define LOONGSON2_CPU_TYPE "mips/loongson2" |
26 | 26 | ||
27 | #define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) | 27 | #define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5) |
28 | #define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) | 28 | #define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9) |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index 6d0e59ffba2e..d6802d6d1f82 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -105,7 +105,7 @@ static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id) | |||
105 | 105 | ||
106 | struct irqaction hub_rt_irqaction = { | 106 | struct irqaction hub_rt_irqaction = { |
107 | .handler = hub_rt_counter_handler, | 107 | .handler = hub_rt_counter_handler, |
108 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 108 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
109 | .name = "hub-rt", | 109 | .name = "hub-rt", |
110 | }; | 110 | }; |
111 | 111 | ||
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 62df6a598e0a..f3b60e671207 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
@@ -67,7 +67,7 @@ static irqreturn_t a20r_interrupt(int irq, void *dev_id) | |||
67 | 67 | ||
68 | static struct irqaction a20r_irqaction = { | 68 | static struct irqaction a20r_irqaction = { |
69 | .handler = a20r_interrupt, | 69 | .handler = a20r_interrupt, |
70 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 70 | .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, |
71 | .name = "a20r-timer", | 71 | .name = "a20r-timer", |
72 | }; | 72 | }; |
73 | 73 | ||
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index c860810722c0..e10184c1b3e1 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c | |||
@@ -85,7 +85,7 @@ int txx9_ccfg_toeon __initdata = 1; | |||
85 | struct clk *clk_get(struct device *dev, const char *id) | 85 | struct clk *clk_get(struct device *dev, const char *id) |
86 | { | 86 | { |
87 | if (!strcmp(id, "spi-baseclk")) | 87 | if (!strcmp(id, "spi-baseclk")) |
88 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4); | 88 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2); |
89 | if (!strcmp(id, "imbus_clk")) | 89 | if (!strcmp(id, "imbus_clk")) |
90 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2); | 90 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2); |
91 | return ERR_PTR(-ENOENT); | 91 | return ERR_PTR(-ENOENT); |
@@ -817,7 +817,8 @@ void __init txx9_iocled_init(unsigned long baseaddr, | |||
817 | out_pdev: | 817 | out_pdev: |
818 | platform_device_put(pdev); | 818 | platform_device_put(pdev); |
819 | out_gpio: | 819 | out_gpio: |
820 | gpio_remove(&iocled->chip); | 820 | if (gpiochip_remove(&iocled->chip)) |
821 | return; | ||
821 | out_unmap: | 822 | out_unmap: |
822 | iounmap(iocled->mmioaddr); | 823 | iounmap(iocled->mmioaddr); |
823 | out_free: | 824 | out_free: |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 07e01149e3bf..72ace9515a07 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -1443,12 +1443,8 @@ config SECCOMP | |||
1443 | 1443 | ||
1444 | If unsure, say Y. Only embedded should say N here. | 1444 | If unsure, say Y. Only embedded should say N here. |
1445 | 1445 | ||
1446 | config CC_STACKPROTECTOR_ALL | ||
1447 | bool | ||
1448 | |||
1449 | config CC_STACKPROTECTOR | 1446 | config CC_STACKPROTECTOR |
1450 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | 1447 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" |
1451 | select CC_STACKPROTECTOR_ALL | ||
1452 | ---help--- | 1448 | ---help--- |
1453 | This option turns on the -fstack-protector GCC feature. This | 1449 | This option turns on the -fstack-protector GCC feature. This |
1454 | feature puts, at the beginning of functions, a canary value on | 1450 | feature puts, at the beginning of functions, a canary value on |
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index f2824fb8c79c..2649840d888f 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu | |||
@@ -400,7 +400,7 @@ config X86_TSC | |||
400 | 400 | ||
401 | config X86_CMPXCHG64 | 401 | config X86_CMPXCHG64 |
402 | def_bool y | 402 | def_bool y |
403 | depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM | 403 | depends on !M386 && !M486 |
404 | 404 | ||
405 | # this should be set for all -march=.. options where the compiler | 405 | # this should be set for all -march=.. options where the compiler |
406 | # generates cmov. | 406 | # generates cmov. |
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index a012ee8ef803..d2d24c9ee64d 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile | |||
@@ -76,7 +76,6 @@ ifdef CONFIG_CC_STACKPROTECTOR | |||
76 | cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh | 76 | cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh |
77 | ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC) $(biarch)),y) | 77 | ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC) $(biarch)),y) |
78 | stackp-y := -fstack-protector | 78 | stackp-y := -fstack-protector |
79 | stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += -fstack-protector-all | ||
80 | KBUILD_CFLAGS += $(stackp-y) | 79 | KBUILD_CFLAGS += $(stackp-y) |
81 | else | 80 | else |
82 | $(warning stack protector enabled but no compiler support) | 81 | $(warning stack protector enabled but no compiler support) |
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index 1733f9f65e82..581b0568fe19 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S | |||
@@ -204,7 +204,7 @@ sysexit_from_sys_call: | |||
204 | movl RDI-ARGOFFSET(%rsp),%r8d /* reload 5th syscall arg */ | 204 | movl RDI-ARGOFFSET(%rsp),%r8d /* reload 5th syscall arg */ |
205 | .endm | 205 | .endm |
206 | 206 | ||
207 | .macro auditsys_exit exit,ebpsave=RBP | 207 | .macro auditsys_exit exit |
208 | testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) | 208 | testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) |
209 | jnz ia32_ret_from_sys_call | 209 | jnz ia32_ret_from_sys_call |
210 | TRACE_IRQS_ON | 210 | TRACE_IRQS_ON |
@@ -217,7 +217,6 @@ sysexit_from_sys_call: | |||
217 | call audit_syscall_exit | 217 | call audit_syscall_exit |
218 | GET_THREAD_INFO(%r10) | 218 | GET_THREAD_INFO(%r10) |
219 | movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ | 219 | movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ |
220 | movl \ebpsave-ARGOFFSET(%rsp),%ebp /* reload user register value */ | ||
221 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi | 220 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
222 | cli | 221 | cli |
223 | TRACE_IRQS_OFF | 222 | TRACE_IRQS_OFF |
@@ -351,7 +350,7 @@ cstar_auditsys: | |||
351 | jmp cstar_dispatch | 350 | jmp cstar_dispatch |
352 | 351 | ||
353 | sysretl_audit: | 352 | sysretl_audit: |
354 | auditsys_exit sysretl_from_sys_call, RCX /* user %ebp in RCX slot */ | 353 | auditsys_exit sysretl_from_sys_call |
355 | #endif | 354 | #endif |
356 | 355 | ||
357 | cstar_tracesys: | 356 | cstar_tracesys: |
diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c index f7cdb3b457aa..cd97ce18c29d 100644 --- a/arch/x86/kernel/crash_dump_32.c +++ b/arch/x86/kernel/crash_dump_32.c | |||
@@ -16,6 +16,22 @@ static void *kdump_buf_page; | |||
16 | /* Stores the physical address of elf header of crash image. */ | 16 | /* Stores the physical address of elf header of crash image. */ |
17 | unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; | 17 | unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; |
18 | 18 | ||
19 | static inline bool is_crashed_pfn_valid(unsigned long pfn) | ||
20 | { | ||
21 | #ifndef CONFIG_X86_PAE | ||
22 | /* | ||
23 | * non-PAE kdump kernel executed from a PAE one will crop high pte | ||
24 | * bits and poke unwanted space counting again from address 0, we | ||
25 | * don't want that. pte must fit into unsigned long. In fact the | ||
26 | * test checks high 12 bits for being zero (pfn will be shifted left | ||
27 | * by PAGE_SHIFT). | ||
28 | */ | ||
29 | return pte_pfn(pfn_pte(pfn, __pgprot(0))) == pfn; | ||
30 | #else | ||
31 | return true; | ||
32 | #endif | ||
33 | } | ||
34 | |||
19 | /** | 35 | /** |
20 | * copy_oldmem_page - copy one page from "oldmem" | 36 | * copy_oldmem_page - copy one page from "oldmem" |
21 | * @pfn: page frame number to be copied | 37 | * @pfn: page frame number to be copied |
@@ -41,6 +57,9 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, | |||
41 | if (!csize) | 57 | if (!csize) |
42 | return 0; | 58 | return 0; |
43 | 59 | ||
60 | if (!is_crashed_pfn_valid(pfn)) | ||
61 | return -EFAULT; | ||
62 | |||
44 | vaddr = kmap_atomic_pfn(pfn, KM_PTE0); | 63 | vaddr = kmap_atomic_pfn(pfn, KM_PTE0); |
45 | 64 | ||
46 | if (!userbuf) { | 65 | if (!userbuf) { |
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index ad5bd988fb79..cdcfb122f256 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
@@ -454,8 +454,10 @@ void __init efi_init(void) | |||
454 | if (add_efi_memmap) | 454 | if (add_efi_memmap) |
455 | do_add_efi_memmap(); | 455 | do_add_efi_memmap(); |
456 | 456 | ||
457 | #ifdef CONFIG_X86_32 | ||
457 | x86_platform.get_wallclock = efi_get_time; | 458 | x86_platform.get_wallclock = efi_get_time; |
458 | x86_platform.set_wallclock = efi_set_rtc_mmss; | 459 | x86_platform.set_wallclock = efi_set_rtc_mmss; |
460 | #endif | ||
459 | 461 | ||
460 | /* Setup for EFI runtime service */ | 462 | /* Setup for EFI runtime service */ |
461 | reboot_type = BOOT_EFI; | 463 | reboot_type = BOOT_EFI; |
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index a06f5d6375a8..a3241a1a710b 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) | |||
2718 | }, | 2718 | }, |
2719 | .driver_data = "20071026", /* yyyymmdd */ | 2719 | .driver_data = "20071026", /* yyyymmdd */ |
2720 | }, | 2720 | }, |
2721 | /* | ||
2722 | * All BIOS versions for the MSI K9A2 Platinum (MS-7376) | ||
2723 | * support 64bit DMA. | ||
2724 | * | ||
2725 | * BIOS versions earlier than 1.5 had the Manufacturer DMI | ||
2726 | * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". | ||
2727 | * This spelling mistake was fixed in BIOS version 1.5, so | ||
2728 | * 1.5 and later have the Manufacturer as | ||
2729 | * "MICRO-STAR INTERNATIONAL CO.,LTD". | ||
2730 | * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". | ||
2731 | * | ||
2732 | * BIOS versions earlier than 1.9 had a Board Product Name | ||
2733 | * DMI field of "MS-7376". This was changed to be | ||
2734 | * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still | ||
2735 | * match on DMI_BOARD_NAME of "MS-7376". | ||
2736 | */ | ||
2737 | { | ||
2738 | .ident = "MSI K9A2 Platinum", | ||
2739 | .matches = { | ||
2740 | DMI_MATCH(DMI_BOARD_VENDOR, | ||
2741 | "MICRO-STAR INTER"), | ||
2742 | DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), | ||
2743 | }, | ||
2744 | }, | ||
2721 | { } | 2745 | { } |
2722 | }; | 2746 | }; |
2723 | const struct dmi_system_id *match; | 2747 | const struct dmi_system_id *match; |
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) | |||
2729 | !match) | 2753 | !match) |
2730 | return false; | 2754 | return false; |
2731 | 2755 | ||
2756 | if (!match->driver_data) | ||
2757 | goto enable_64bit; | ||
2758 | |||
2732 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); | 2759 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
2733 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); | 2760 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
2734 | 2761 | ||
2735 | if (strcmp(buf, match->driver_data) >= 0) { | 2762 | if (strcmp(buf, match->driver_data) >= 0) |
2736 | dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", | 2763 | goto enable_64bit; |
2737 | match->ident); | 2764 | else { |
2738 | return true; | ||
2739 | } else { | ||
2740 | dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " | 2765 | dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " |
2741 | "forcing 32bit DMA, update BIOS\n", match->ident); | 2766 | "forcing 32bit DMA, update BIOS\n", match->ident); |
2742 | return false; | 2767 | return false; |
2743 | } | 2768 | } |
2769 | |||
2770 | enable_64bit: | ||
2771 | dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", | ||
2772 | match->ident); | ||
2773 | return true; | ||
2744 | } | 2774 | } |
2745 | 2775 | ||
2746 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) | 2776 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index d7f0f1b1ae3e..dc72690ed5db 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) | |||
4919 | */ | 4919 | */ |
4920 | void ata_qc_free(struct ata_queued_cmd *qc) | 4920 | void ata_qc_free(struct ata_queued_cmd *qc) |
4921 | { | 4921 | { |
4922 | struct ata_port *ap = qc->ap; | 4922 | struct ata_port *ap; |
4923 | unsigned int tag; | 4923 | unsigned int tag; |
4924 | 4924 | ||
4925 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | 4925 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4926 | ap = qc->ap; | ||
4926 | 4927 | ||
4927 | qc->flags = 0; | 4928 | qc->flags = 0; |
4928 | tag = qc->tag; | 4929 | tag = qc->tag; |
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc) | |||
4934 | 4935 | ||
4935 | void __ata_qc_complete(struct ata_queued_cmd *qc) | 4936 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
4936 | { | 4937 | { |
4937 | struct ata_port *ap = qc->ap; | 4938 | struct ata_port *ap; |
4938 | struct ata_link *link = qc->dev->link; | 4939 | struct ata_link *link; |
4939 | 4940 | ||
4940 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | 4941 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4941 | WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); | 4942 | WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); |
4943 | ap = qc->ap; | ||
4944 | link = qc->dev->link; | ||
4942 | 4945 | ||
4943 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | 4946 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) |
4944 | ata_sg_clean(qc); | 4947 | ata_sg_clean(qc); |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index bdd43c7f432e..02efd9a83d26 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = { | |||
93 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, | 93 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, |
94 | { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ | 94 | { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ |
95 | { PCI_VDEVICE(VIA, 0x9000), vt8251 }, | 95 | { PCI_VDEVICE(VIA, 0x9000), vt8251 }, |
96 | { PCI_VDEVICE(VIA, 0x9040), vt8251 }, | ||
97 | 96 | ||
98 | { } /* terminate list */ | 97 | { } /* terminate list */ |
99 | }; | 98 | }; |
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index e0dc4071e088..8aa2443182d5 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c | |||
@@ -511,6 +511,7 @@ static void dpm_complete(pm_message_t state) | |||
511 | 511 | ||
512 | INIT_LIST_HEAD(&list); | 512 | INIT_LIST_HEAD(&list); |
513 | mutex_lock(&dpm_list_mtx); | 513 | mutex_lock(&dpm_list_mtx); |
514 | transition_started = false; | ||
514 | while (!list_empty(&dpm_list)) { | 515 | while (!list_empty(&dpm_list)) { |
515 | struct device *dev = to_device(dpm_list.prev); | 516 | struct device *dev = to_device(dpm_list.prev); |
516 | 517 | ||
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c index 38556f6cc22d..a770498a74ec 100644 --- a/drivers/base/power/runtime.c +++ b/drivers/base/power/runtime.c | |||
@@ -51,8 +51,6 @@ static int __pm_runtime_idle(struct device *dev) | |||
51 | { | 51 | { |
52 | int retval = 0; | 52 | int retval = 0; |
53 | 53 | ||
54 | dev_dbg(dev, "__pm_runtime_idle()!\n"); | ||
55 | |||
56 | if (dev->power.runtime_error) | 54 | if (dev->power.runtime_error) |
57 | retval = -EINVAL; | 55 | retval = -EINVAL; |
58 | else if (dev->power.idle_notification) | 56 | else if (dev->power.idle_notification) |
@@ -93,8 +91,6 @@ static int __pm_runtime_idle(struct device *dev) | |||
93 | wake_up_all(&dev->power.wait_queue); | 91 | wake_up_all(&dev->power.wait_queue); |
94 | 92 | ||
95 | out: | 93 | out: |
96 | dev_dbg(dev, "__pm_runtime_idle() returns %d!\n", retval); | ||
97 | |||
98 | return retval; | 94 | return retval; |
99 | } | 95 | } |
100 | 96 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b93814c0d3e2..7f436ec075f6 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -89,7 +89,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) | |||
89 | pci_set_power_state(dev->pdev, PCI_D3hot); | 89 | pci_set_power_state(dev->pdev, PCI_D3hot); |
90 | } | 90 | } |
91 | 91 | ||
92 | dev_priv->suspended = 1; | 92 | /* Modeset on resume, not lid events */ |
93 | dev_priv->modeset_on_lid = 0; | ||
93 | 94 | ||
94 | return 0; | 95 | return 0; |
95 | } | 96 | } |
@@ -124,7 +125,7 @@ static int i915_resume(struct drm_device *dev) | |||
124 | drm_helper_resume_force_mode(dev); | 125 | drm_helper_resume_force_mode(dev); |
125 | } | 126 | } |
126 | 127 | ||
127 | dev_priv->suspended = 0; | 128 | dev_priv->modeset_on_lid = 0; |
128 | 129 | ||
129 | return ret; | 130 | return ret; |
130 | } | 131 | } |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6035d3dae851..c5df2234418d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -274,7 +274,7 @@ typedef struct drm_i915_private { | |||
274 | struct drm_i915_display_funcs display; | 274 | struct drm_i915_display_funcs display; |
275 | 275 | ||
276 | /* Register state */ | 276 | /* Register state */ |
277 | bool suspended; | 277 | bool modeset_on_lid; |
278 | u8 saveLBB; | 278 | u8 saveLBB; |
279 | u32 saveDSPACNTR; | 279 | u32 saveDSPACNTR; |
280 | u32 saveDSPBCNTR; | 280 | u32 saveDSPBCNTR; |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 98ae3d73577e..808bbe412ba8 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -656,6 +656,15 @@ static int intel_lvds_get_modes(struct drm_connector *connector) | |||
656 | return 0; | 656 | return 0; |
657 | } | 657 | } |
658 | 658 | ||
659 | /* | ||
660 | * Lid events. Note the use of 'modeset_on_lid': | ||
661 | * - we set it on lid close, and reset it on open | ||
662 | * - we use it as a "only once" bit (ie we ignore | ||
663 | * duplicate events where it was already properly | ||
664 | * set/reset) | ||
665 | * - the suspend/resume paths will also set it to | ||
666 | * zero, since they restore the mode ("lid open"). | ||
667 | */ | ||
659 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | 668 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
660 | void *unused) | 669 | void *unused) |
661 | { | 670 | { |
@@ -663,13 +672,19 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
663 | container_of(nb, struct drm_i915_private, lid_notifier); | 672 | container_of(nb, struct drm_i915_private, lid_notifier); |
664 | struct drm_device *dev = dev_priv->dev; | 673 | struct drm_device *dev = dev_priv->dev; |
665 | 674 | ||
666 | if (acpi_lid_open() && !dev_priv->suspended) { | 675 | if (!acpi_lid_open()) { |
667 | mutex_lock(&dev->mode_config.mutex); | 676 | dev_priv->modeset_on_lid = 1; |
668 | drm_helper_resume_force_mode(dev); | 677 | return NOTIFY_OK; |
669 | mutex_unlock(&dev->mode_config.mutex); | ||
670 | } | 678 | } |
671 | 679 | ||
672 | drm_sysfs_hotplug_event(dev_priv->dev); | 680 | if (!dev_priv->modeset_on_lid) |
681 | return NOTIFY_OK; | ||
682 | |||
683 | dev_priv->modeset_on_lid = 0; | ||
684 | |||
685 | mutex_lock(&dev->mode_config.mutex); | ||
686 | drm_helper_resume_force_mode(dev); | ||
687 | mutex_unlock(&dev->mode_config.mutex); | ||
673 | 688 | ||
674 | return NOTIFY_OK; | 689 | return NOTIFY_OK; |
675 | } | 690 | } |
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 4afba3ec2a61..e3654d683e15 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c | |||
@@ -120,19 +120,26 @@ struct imx_i2c_struct { | |||
120 | wait_queue_head_t queue; | 120 | wait_queue_head_t queue; |
121 | unsigned long i2csr; | 121 | unsigned long i2csr; |
122 | unsigned int disable_delay; | 122 | unsigned int disable_delay; |
123 | int stopped; | ||
124 | unsigned int ifdr; /* IMX_I2C_IFDR */ | ||
123 | }; | 125 | }; |
124 | 126 | ||
125 | /** Functions for IMX I2C adapter driver *************************************** | 127 | /** Functions for IMX I2C adapter driver *************************************** |
126 | *******************************************************************************/ | 128 | *******************************************************************************/ |
127 | 129 | ||
128 | static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx) | 130 | static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) |
129 | { | 131 | { |
130 | unsigned long orig_jiffies = jiffies; | 132 | unsigned long orig_jiffies = jiffies; |
133 | unsigned int temp; | ||
131 | 134 | ||
132 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 135 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
133 | 136 | ||
134 | /* wait for bus not busy */ | 137 | while (1) { |
135 | while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) { | 138 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); |
139 | if (for_busy && (temp & I2SR_IBB)) | ||
140 | break; | ||
141 | if (!for_busy && !(temp & I2SR_IBB)) | ||
142 | break; | ||
136 | if (signal_pending(current)) { | 143 | if (signal_pending(current)) { |
137 | dev_dbg(&i2c_imx->adapter.dev, | 144 | dev_dbg(&i2c_imx->adapter.dev, |
138 | "<%s> I2C Interrupted\n", __func__); | 145 | "<%s> I2C Interrupted\n", __func__); |
@@ -179,41 +186,62 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) | |||
179 | return 0; | 186 | return 0; |
180 | } | 187 | } |
181 | 188 | ||
182 | static void i2c_imx_start(struct imx_i2c_struct *i2c_imx) | 189 | static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) |
183 | { | 190 | { |
184 | unsigned int temp = 0; | 191 | unsigned int temp = 0; |
192 | int result; | ||
185 | 193 | ||
186 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 194 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
187 | 195 | ||
196 | clk_enable(i2c_imx->clk); | ||
197 | writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); | ||
188 | /* Enable I2C controller */ | 198 | /* Enable I2C controller */ |
199 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | ||
189 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); | 200 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); |
201 | |||
202 | /* Wait controller to be stable */ | ||
203 | udelay(50); | ||
204 | |||
190 | /* Start I2C transaction */ | 205 | /* Start I2C transaction */ |
191 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 206 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
192 | temp |= I2CR_MSTA; | 207 | temp |= I2CR_MSTA; |
193 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 208 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
209 | result = i2c_imx_bus_busy(i2c_imx, 1); | ||
210 | if (result) | ||
211 | return result; | ||
212 | i2c_imx->stopped = 0; | ||
213 | |||
194 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; | 214 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; |
195 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 215 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
216 | return result; | ||
196 | } | 217 | } |
197 | 218 | ||
198 | static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) | 219 | static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) |
199 | { | 220 | { |
200 | unsigned int temp = 0; | 221 | unsigned int temp = 0; |
201 | 222 | ||
202 | /* Stop I2C transaction */ | 223 | if (!i2c_imx->stopped) { |
203 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 224 | /* Stop I2C transaction */ |
204 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 225 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
205 | temp &= ~I2CR_MSTA; | 226 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
206 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 227 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
207 | /* setup chip registers to defaults */ | 228 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
208 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); | 229 | i2c_imx->stopped = 1; |
209 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | 230 | } |
210 | /* | 231 | if (cpu_is_mx1()) { |
211 | * This delay caused by an i.MXL hardware bug. | 232 | /* |
212 | * If no (or too short) delay, no "STOP" bit will be generated. | 233 | * This delay caused by an i.MXL hardware bug. |
213 | */ | 234 | * If no (or too short) delay, no "STOP" bit will be generated. |
214 | udelay(i2c_imx->disable_delay); | 235 | */ |
236 | udelay(i2c_imx->disable_delay); | ||
237 | } | ||
238 | |||
239 | if (!i2c_imx->stopped) | ||
240 | i2c_imx_bus_busy(i2c_imx, 0); | ||
241 | |||
215 | /* Disable I2C controller */ | 242 | /* Disable I2C controller */ |
216 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | 243 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); |
244 | clk_disable(i2c_imx->clk); | ||
217 | } | 245 | } |
218 | 246 | ||
219 | static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, | 247 | static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, |
@@ -233,8 +261,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, | |||
233 | else | 261 | else |
234 | for (i = 0; i2c_clk_div[i][0] < div; i++); | 262 | for (i = 0; i2c_clk_div[i][0] < div; i++); |
235 | 263 | ||
236 | /* Write divider value to register */ | 264 | /* Store divider value */ |
237 | writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR); | 265 | i2c_imx->ifdr = i2c_clk_div[i][1]; |
238 | 266 | ||
239 | /* | 267 | /* |
240 | * There dummy delay is calculated. | 268 | * There dummy delay is calculated. |
@@ -341,11 +369,15 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
341 | if (result) | 369 | if (result) |
342 | return result; | 370 | return result; |
343 | if (i == (msgs->len - 1)) { | 371 | if (i == (msgs->len - 1)) { |
372 | /* It must generate STOP before read I2DR to prevent | ||
373 | controller from generating another clock cycle */ | ||
344 | dev_dbg(&i2c_imx->adapter.dev, | 374 | dev_dbg(&i2c_imx->adapter.dev, |
345 | "<%s> clear MSTA\n", __func__); | 375 | "<%s> clear MSTA\n", __func__); |
346 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 376 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
347 | temp &= ~I2CR_MSTA; | 377 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
348 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 378 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
379 | i2c_imx_bus_busy(i2c_imx, 0); | ||
380 | i2c_imx->stopped = 1; | ||
349 | } else if (i == (msgs->len - 2)) { | 381 | } else if (i == (msgs->len - 2)) { |
350 | dev_dbg(&i2c_imx->adapter.dev, | 382 | dev_dbg(&i2c_imx->adapter.dev, |
351 | "<%s> set TXAK\n", __func__); | 383 | "<%s> set TXAK\n", __func__); |
@@ -370,14 +402,11 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
370 | 402 | ||
371 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 403 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
372 | 404 | ||
373 | /* Check if i2c bus is not busy */ | 405 | /* Start I2C transfer */ |
374 | result = i2c_imx_bus_busy(i2c_imx); | 406 | result = i2c_imx_start(i2c_imx); |
375 | if (result) | 407 | if (result) |
376 | goto fail0; | 408 | goto fail0; |
377 | 409 | ||
378 | /* Start I2C transfer */ | ||
379 | i2c_imx_start(i2c_imx); | ||
380 | |||
381 | /* read/write data */ | 410 | /* read/write data */ |
382 | for (i = 0; i < num; i++) { | 411 | for (i = 0; i < num; i++) { |
383 | if (i) { | 412 | if (i) { |
@@ -386,6 +415,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
386 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 415 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
387 | temp |= I2CR_RSTA; | 416 | temp |= I2CR_RSTA; |
388 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 417 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
418 | result = i2c_imx_bus_busy(i2c_imx, 1); | ||
419 | if (result) | ||
420 | goto fail0; | ||
389 | } | 421 | } |
390 | dev_dbg(&i2c_imx->adapter.dev, | 422 | dev_dbg(&i2c_imx->adapter.dev, |
391 | "<%s> transfer message: %d\n", __func__, i); | 423 | "<%s> transfer message: %d\n", __func__, i); |
@@ -500,7 +532,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev) | |||
500 | dev_err(&pdev->dev, "can't get I2C clock\n"); | 532 | dev_err(&pdev->dev, "can't get I2C clock\n"); |
501 | goto fail3; | 533 | goto fail3; |
502 | } | 534 | } |
503 | clk_enable(i2c_imx->clk); | ||
504 | 535 | ||
505 | /* Request IRQ */ | 536 | /* Request IRQ */ |
506 | ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); | 537 | ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); |
@@ -549,7 +580,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev) | |||
549 | fail5: | 580 | fail5: |
550 | free_irq(i2c_imx->irq, i2c_imx); | 581 | free_irq(i2c_imx->irq, i2c_imx); |
551 | fail4: | 582 | fail4: |
552 | clk_disable(i2c_imx->clk); | ||
553 | clk_put(i2c_imx->clk); | 583 | clk_put(i2c_imx->clk); |
554 | fail3: | 584 | fail3: |
555 | release_mem_region(i2c_imx->res->start, resource_size(res)); | 585 | release_mem_region(i2c_imx->res->start, resource_size(res)); |
@@ -586,8 +616,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev) | |||
586 | if (pdata && pdata->exit) | 616 | if (pdata && pdata->exit) |
587 | pdata->exit(&pdev->dev); | 617 | pdata->exit(&pdev->dev); |
588 | 618 | ||
589 | /* Disable I2C clock */ | ||
590 | clk_disable(i2c_imx->clk); | ||
591 | clk_put(i2c_imx->clk); | 619 | clk_put(i2c_imx->clk); |
592 | 620 | ||
593 | release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); | 621 | release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); |
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index d325e86e3103..f627001108b8 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c | |||
@@ -365,9 +365,6 @@ static int mpc_write(struct mpc_i2c *i2c, int target, | |||
365 | unsigned timeout = i2c->adap.timeout; | 365 | unsigned timeout = i2c->adap.timeout; |
366 | u32 flags = restart ? CCR_RSTA : 0; | 366 | u32 flags = restart ? CCR_RSTA : 0; |
367 | 367 | ||
368 | /* Start with MEN */ | ||
369 | if (!restart) | ||
370 | writeccr(i2c, CCR_MEN); | ||
371 | /* Start as master */ | 368 | /* Start as master */ |
372 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); | 369 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); |
373 | /* Write target byte */ | 370 | /* Write target byte */ |
@@ -396,9 +393,6 @@ static int mpc_read(struct mpc_i2c *i2c, int target, | |||
396 | int i, result; | 393 | int i, result; |
397 | u32 flags = restart ? CCR_RSTA : 0; | 394 | u32 flags = restart ? CCR_RSTA : 0; |
398 | 395 | ||
399 | /* Start with MEN */ | ||
400 | if (!restart) | ||
401 | writeccr(i2c, CCR_MEN); | ||
402 | /* Switch to read - restart */ | 396 | /* Switch to read - restart */ |
403 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); | 397 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); |
404 | /* Write target address byte - this time with the read flag set */ | 398 | /* Write target address byte - this time with the read flag set */ |
@@ -425,9 +419,9 @@ static int mpc_read(struct mpc_i2c *i2c, int target, | |||
425 | /* Generate txack on next to last byte */ | 419 | /* Generate txack on next to last byte */ |
426 | if (i == length - 2) | 420 | if (i == length - 2) |
427 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); | 421 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); |
428 | /* Generate stop on last byte */ | 422 | /* Do not generate stop on last byte */ |
429 | if (i == length - 1) | 423 | if (i == length - 1) |
430 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK); | 424 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX); |
431 | data[i] = readb(i2c->base + MPC_I2C_DR); | 425 | data[i] = readb(i2c->base + MPC_I2C_DR); |
432 | } | 426 | } |
433 | 427 | ||
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c index a6512372c7a3..4452eabbee6d 100644 --- a/drivers/input/keyboard/atkbd.c +++ b/drivers/input/keyboard/atkbd.c | |||
@@ -233,6 +233,7 @@ struct atkbd { | |||
233 | */ | 233 | */ |
234 | static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); | 234 | static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); |
235 | static void *atkbd_platform_fixup_data; | 235 | static void *atkbd_platform_fixup_data; |
236 | static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int); | ||
236 | 237 | ||
237 | static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, | 238 | static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, |
238 | ssize_t (*handler)(struct atkbd *, char *)); | 239 | ssize_t (*handler)(struct atkbd *, char *)); |
@@ -393,6 +394,9 @@ static irqreturn_t atkbd_interrupt(struct serio *serio, unsigned char data, | |||
393 | 394 | ||
394 | input_event(dev, EV_MSC, MSC_RAW, code); | 395 | input_event(dev, EV_MSC, MSC_RAW, code); |
395 | 396 | ||
397 | if (atkbd_platform_scancode_fixup) | ||
398 | code = atkbd_platform_scancode_fixup(atkbd, code); | ||
399 | |||
396 | if (atkbd->translated) { | 400 | if (atkbd->translated) { |
397 | 401 | ||
398 | if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) { | 402 | if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) { |
@@ -923,6 +927,22 @@ static unsigned int atkbd_volume_forced_release_keys[] = { | |||
923 | }; | 927 | }; |
924 | 928 | ||
925 | /* | 929 | /* |
930 | * OQO 01+ multimedia keys (64--66) generate e0 6x upon release whereas | ||
931 | * they should be generating e4-e6 (0x80 | code). | ||
932 | */ | ||
933 | static unsigned int atkbd_oqo_01plus_scancode_fixup(struct atkbd *atkbd, | ||
934 | unsigned int code) | ||
935 | { | ||
936 | if (atkbd->translated && atkbd->emul == 1 && | ||
937 | (code == 0x64 || code == 0x65 || code == 0x66)) { | ||
938 | atkbd->emul = 0; | ||
939 | code |= 0x80; | ||
940 | } | ||
941 | |||
942 | return code; | ||
943 | } | ||
944 | |||
945 | /* | ||
926 | * atkbd_set_keycode_table() initializes keyboard's keycode table | 946 | * atkbd_set_keycode_table() initializes keyboard's keycode table |
927 | * according to the selected scancode set | 947 | * according to the selected scancode set |
928 | */ | 948 | */ |
@@ -1527,6 +1547,13 @@ static int __init atkbd_setup_forced_release(const struct dmi_system_id *id) | |||
1527 | return 0; | 1547 | return 0; |
1528 | } | 1548 | } |
1529 | 1549 | ||
1550 | static int __init atkbd_setup_scancode_fixup(const struct dmi_system_id *id) | ||
1551 | { | ||
1552 | atkbd_platform_scancode_fixup = id->driver_data; | ||
1553 | |||
1554 | return 0; | ||
1555 | } | ||
1556 | |||
1530 | static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { | 1557 | static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { |
1531 | { | 1558 | { |
1532 | .ident = "Dell Laptop", | 1559 | .ident = "Dell Laptop", |
@@ -1663,6 +1690,15 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { | |||
1663 | .callback = atkbd_setup_forced_release, | 1690 | .callback = atkbd_setup_forced_release, |
1664 | .driver_data = atkdb_soltech_ta12_forced_release_keys, | 1691 | .driver_data = atkdb_soltech_ta12_forced_release_keys, |
1665 | }, | 1692 | }, |
1693 | { | ||
1694 | .ident = "OQO Model 01+", | ||
1695 | .matches = { | ||
1696 | DMI_MATCH(DMI_SYS_VENDOR, "OQO"), | ||
1697 | DMI_MATCH(DMI_PRODUCT_NAME, "ZEPTO"), | ||
1698 | }, | ||
1699 | .callback = atkbd_setup_scancode_fixup, | ||
1700 | .driver_data = atkbd_oqo_01plus_scancode_fixup, | ||
1701 | }, | ||
1666 | { } | 1702 | { } |
1667 | }; | 1703 | }; |
1668 | 1704 | ||
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c index a88aff3816a0..77d130914259 100644 --- a/drivers/input/keyboard/gpio_keys.c +++ b/drivers/input/keyboard/gpio_keys.c | |||
@@ -147,6 +147,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev) | |||
147 | } | 147 | } |
148 | 148 | ||
149 | error = request_irq(irq, gpio_keys_isr, | 149 | error = request_irq(irq, gpio_keys_isr, |
150 | IRQF_SHARED | | ||
150 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 151 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
151 | button->desc ? button->desc : "gpio_keys", | 152 | button->desc ? button->desc : "gpio_keys", |
152 | bdata); | 153 | bdata); |
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 02f4f8f1db6f..a9bb2544b2de 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig | |||
@@ -227,6 +227,7 @@ config INPUT_WINBOND_CIR | |||
227 | depends on X86 && PNP | 227 | depends on X86 && PNP |
228 | select NEW_LEDS | 228 | select NEW_LEDS |
229 | select LEDS_CLASS | 229 | select LEDS_CLASS |
230 | select LEDS_TRIGGERS | ||
230 | select BITREVERSE | 231 | select BITREVERSE |
231 | help | 232 | help |
232 | Say Y here if you want to use the IR remote functionality found | 233 | Say Y here if you want to use the IR remote functionality found |
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index a31578170ccc..1df02d25aca5 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
@@ -836,17 +836,32 @@ static int i8042_controller_selftest(void) | |||
836 | static int i8042_controller_init(void) | 836 | static int i8042_controller_init(void) |
837 | { | 837 | { |
838 | unsigned long flags; | 838 | unsigned long flags; |
839 | int n = 0; | ||
840 | unsigned char ctr[2]; | ||
839 | 841 | ||
840 | /* | 842 | /* |
841 | * Save the CTR for restoral on unload / reboot. | 843 | * Save the CTR for restore on unload / reboot. |
842 | */ | 844 | */ |
843 | 845 | ||
844 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { | 846 | do { |
845 | printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); | 847 | if (n >= 10) { |
846 | return -EIO; | 848 | printk(KERN_ERR |
847 | } | 849 | "i8042.c: Unable to get stable CTR read.\n"); |
850 | return -EIO; | ||
851 | } | ||
852 | |||
853 | if (n != 0) | ||
854 | udelay(50); | ||
855 | |||
856 | if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { | ||
857 | printk(KERN_ERR | ||
858 | "i8042.c: Can't read CTR while initializing i8042.\n"); | ||
859 | return -EIO; | ||
860 | } | ||
848 | 861 | ||
849 | i8042_initial_ctr = i8042_ctr; | 862 | } while (n < 2 || ctr[0] != ctr[1]); |
863 | |||
864 | i8042_initial_ctr = i8042_ctr = ctr[0]; | ||
850 | 865 | ||
851 | /* | 866 | /* |
852 | * Disable the keyboard interface and interrupt. | 867 | * Disable the keyboard interface and interrupt. |
@@ -895,6 +910,12 @@ static int i8042_controller_init(void) | |||
895 | return -EIO; | 910 | return -EIO; |
896 | } | 911 | } |
897 | 912 | ||
913 | /* | ||
914 | * Flush whatever accumulated while we were disabling keyboard port. | ||
915 | */ | ||
916 | |||
917 | i8042_flush(); | ||
918 | |||
898 | return 0; | 919 | return 0; |
899 | } | 920 | } |
900 | 921 | ||
@@ -914,7 +935,7 @@ static void i8042_controller_reset(void) | |||
914 | i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; | 935 | i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; |
915 | i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); | 936 | i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); |
916 | 937 | ||
917 | if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) | 938 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) |
918 | printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n"); | 939 | printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n"); |
919 | 940 | ||
920 | /* | 941 | /* |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 5d2f48f02251..3c29a20b751e 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -1427,19 +1427,31 @@ static int e100_phy_init(struct nic *nic) | |||
1427 | } else | 1427 | } else |
1428 | DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); | 1428 | DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); |
1429 | 1429 | ||
1430 | /* Isolate all the PHY ids */ | ||
1431 | for (addr = 0; addr < 32; addr++) | ||
1432 | mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE); | ||
1433 | /* Select the discovered PHY */ | ||
1434 | bmcr &= ~BMCR_ISOLATE; | ||
1435 | mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr); | ||
1436 | |||
1437 | /* Get phy ID */ | 1430 | /* Get phy ID */ |
1438 | id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); | 1431 | id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); |
1439 | id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); | 1432 | id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); |
1440 | nic->phy = (u32)id_hi << 16 | (u32)id_lo; | 1433 | nic->phy = (u32)id_hi << 16 | (u32)id_lo; |
1441 | DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); | 1434 | DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); |
1442 | 1435 | ||
1436 | /* Select the phy and isolate the rest */ | ||
1437 | for (addr = 0; addr < 32; addr++) { | ||
1438 | if (addr != nic->mii.phy_id) { | ||
1439 | mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE); | ||
1440 | } else if (nic->phy != phy_82552_v) { | ||
1441 | bmcr = mdio_read(netdev, addr, MII_BMCR); | ||
1442 | mdio_write(netdev, addr, MII_BMCR, | ||
1443 | bmcr & ~BMCR_ISOLATE); | ||
1444 | } | ||
1445 | } | ||
1446 | /* | ||
1447 | * Workaround for 82552: | ||
1448 | * Clear the ISOLATE bit on selected phy_id last (mirrored on all | ||
1449 | * other phy_id's) using bmcr value from addr discovery loop above. | ||
1450 | */ | ||
1451 | if (nic->phy == phy_82552_v) | ||
1452 | mdio_write(netdev, nic->mii.phy_id, MII_BMCR, | ||
1453 | bmcr & ~BMCR_ISOLATE); | ||
1454 | |||
1443 | /* Handle National tx phys */ | 1455 | /* Handle National tx phys */ |
1444 | #define NCS_PHY_MODEL_MASK 0xFFF0FFFF | 1456 | #define NCS_PHY_MODEL_MASK 0xFFF0FFFF |
1445 | if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { | 1457 | if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index c0f185beb8bc..1190167a8b3d 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -76,6 +76,7 @@ | |||
76 | /* Extended Device Control */ | 76 | /* Extended Device Control */ |
77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ | 77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ |
78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ | 78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ |
79 | #define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */ | ||
79 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ | 80 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ |
80 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ | 81 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ |
81 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 82 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
@@ -347,6 +348,7 @@ | |||
347 | /* Extended Configuration Control and Size */ | 348 | /* Extended Configuration Control and Size */ |
348 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 | 349 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 |
349 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 | 350 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 |
351 | #define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE 0x00000008 | ||
350 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 | 352 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 |
351 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 | 353 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 |
352 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 | 354 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index 405a144ebcad..189dfa2d6c76 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -141,6 +141,20 @@ struct e1000_info; | |||
141 | #define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ | 141 | #define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ |
142 | #define HV_TNCRS_LOWER PHY_REG(778, 30) | 142 | #define HV_TNCRS_LOWER PHY_REG(778, 30) |
143 | 143 | ||
144 | /* BM PHY Copper Specific Status */ | ||
145 | #define BM_CS_STATUS 17 | ||
146 | #define BM_CS_STATUS_LINK_UP 0x0400 | ||
147 | #define BM_CS_STATUS_RESOLVED 0x0800 | ||
148 | #define BM_CS_STATUS_SPEED_MASK 0xC000 | ||
149 | #define BM_CS_STATUS_SPEED_1000 0x8000 | ||
150 | |||
151 | /* 82577 Mobile Phy Status Register */ | ||
152 | #define HV_M_STATUS 26 | ||
153 | #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 | ||
154 | #define HV_M_STATUS_SPEED_MASK 0x0300 | ||
155 | #define HV_M_STATUS_SPEED_1000 0x0200 | ||
156 | #define HV_M_STATUS_LINK_UP 0x0040 | ||
157 | |||
144 | enum e1000_boards { | 158 | enum e1000_boards { |
145 | board_82571, | 159 | board_82571, |
146 | board_82572, | 160 | board_82572, |
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index 7b05cf47f7f5..aaea41ef794d 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -903,6 +903,7 @@ struct e1000_shadow_ram { | |||
903 | struct e1000_dev_spec_ich8lan { | 903 | struct e1000_dev_spec_ich8lan { |
904 | bool kmrn_lock_loss_workaround_enabled; | 904 | bool kmrn_lock_loss_workaround_enabled; |
905 | struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; | 905 | struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; |
906 | bool nvm_k1_enabled; | ||
906 | }; | 907 | }; |
907 | 908 | ||
908 | struct e1000_hw { | 909 | struct e1000_hw { |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index b6388b9535fd..51ddb04ab195 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -124,11 +124,25 @@ | |||
124 | 124 | ||
125 | #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in milliseconds */ | 125 | #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in milliseconds */ |
126 | 126 | ||
127 | /* SMBus Address Phy Register */ | ||
128 | #define HV_SMB_ADDR PHY_REG(768, 26) | ||
129 | #define HV_SMB_ADDR_PEC_EN 0x0200 | ||
130 | #define HV_SMB_ADDR_VALID 0x0080 | ||
131 | |||
132 | /* Strapping Option Register - RO */ | ||
133 | #define E1000_STRAP 0x0000C | ||
134 | #define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000 | ||
135 | #define E1000_STRAP_SMBUS_ADDRESS_SHIFT 17 | ||
136 | |||
127 | /* OEM Bits Phy Register */ | 137 | /* OEM Bits Phy Register */ |
128 | #define HV_OEM_BITS PHY_REG(768, 25) | 138 | #define HV_OEM_BITS PHY_REG(768, 25) |
129 | #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */ | 139 | #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */ |
140 | #define HV_OEM_BITS_GBE_DIS 0x0040 /* Gigabit Disable */ | ||
130 | #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */ | 141 | #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */ |
131 | 142 | ||
143 | #define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */ | ||
144 | #define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */ | ||
145 | |||
132 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ | 146 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ |
133 | /* Offset 04h HSFSTS */ | 147 | /* Offset 04h HSFSTS */ |
134 | union ich8_hws_flash_status { | 148 | union ich8_hws_flash_status { |
@@ -208,6 +222,9 @@ static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); | |||
208 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); | 222 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); |
209 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); | 223 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); |
210 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active); | 224 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active); |
225 | static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw); | ||
226 | static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); | ||
227 | static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); | ||
211 | 228 | ||
212 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) | 229 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) |
213 | { | 230 | { |
@@ -483,14 +500,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
483 | goto out; | 500 | goto out; |
484 | } | 501 | } |
485 | 502 | ||
486 | if (hw->mac.type == e1000_pchlan) { | ||
487 | ret_val = e1000e_write_kmrn_reg(hw, | ||
488 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
489 | E1000_KMRNCTRLSTA_K1_ENABLE); | ||
490 | if (ret_val) | ||
491 | goto out; | ||
492 | } | ||
493 | |||
494 | /* | 503 | /* |
495 | * First we want to see if the MII Status Register reports | 504 | * First we want to see if the MII Status Register reports |
496 | * link. If so, then we want to get the current speed/duplex | 505 | * link. If so, then we want to get the current speed/duplex |
@@ -500,6 +509,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
500 | if (ret_val) | 509 | if (ret_val) |
501 | goto out; | 510 | goto out; |
502 | 511 | ||
512 | if (hw->mac.type == e1000_pchlan) { | ||
513 | ret_val = e1000_k1_gig_workaround_hv(hw, link); | ||
514 | if (ret_val) | ||
515 | goto out; | ||
516 | } | ||
517 | |||
503 | if (!link) | 518 | if (!link) |
504 | goto out; /* No link detected */ | 519 | goto out; /* No link detected */ |
505 | 520 | ||
@@ -794,6 +809,326 @@ static s32 e1000_phy_force_speed_duplex_ich8lan(struct e1000_hw *hw) | |||
794 | } | 809 | } |
795 | 810 | ||
796 | /** | 811 | /** |
812 | * e1000_sw_lcd_config_ich8lan - SW-based LCD Configuration | ||
813 | * @hw: pointer to the HW structure | ||
814 | * | ||
815 | * SW should configure the LCD from the NVM extended configuration region | ||
816 | * as a workaround for certain parts. | ||
817 | **/ | ||
818 | static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) | ||
819 | { | ||
820 | struct e1000_phy_info *phy = &hw->phy; | ||
821 | u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask; | ||
822 | s32 ret_val; | ||
823 | u16 word_addr, reg_data, reg_addr, phy_page = 0; | ||
824 | |||
825 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
826 | if (ret_val) | ||
827 | return ret_val; | ||
828 | |||
829 | /* | ||
830 | * Initialize the PHY from the NVM on ICH platforms. This | ||
831 | * is needed due to an issue where the NVM configuration is | ||
832 | * not properly autoloaded after power transitions. | ||
833 | * Therefore, after each PHY reset, we will load the | ||
834 | * configuration data out of the NVM manually. | ||
835 | */ | ||
836 | if ((hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) || | ||
837 | (hw->mac.type == e1000_pchlan)) { | ||
838 | struct e1000_adapter *adapter = hw->adapter; | ||
839 | |||
840 | /* Check if SW needs to configure the PHY */ | ||
841 | if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) || | ||
842 | (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M) || | ||
843 | (hw->mac.type == e1000_pchlan)) | ||
844 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; | ||
845 | else | ||
846 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | ||
847 | |||
848 | data = er32(FEXTNVM); | ||
849 | if (!(data & sw_cfg_mask)) | ||
850 | goto out; | ||
851 | |||
852 | /* Wait for basic configuration completes before proceeding */ | ||
853 | e1000_lan_init_done_ich8lan(hw); | ||
854 | |||
855 | /* | ||
856 | * Make sure HW does not configure LCD from PHY | ||
857 | * extended configuration before SW configuration | ||
858 | */ | ||
859 | data = er32(EXTCNF_CTRL); | ||
860 | if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE) | ||
861 | goto out; | ||
862 | |||
863 | cnf_size = er32(EXTCNF_SIZE); | ||
864 | cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK; | ||
865 | cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT; | ||
866 | if (!cnf_size) | ||
867 | goto out; | ||
868 | |||
869 | cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; | ||
870 | cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; | ||
871 | |||
872 | if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && | ||
873 | (hw->mac.type == e1000_pchlan)) { | ||
874 | /* | ||
875 | * HW configures the SMBus address and LEDs when the | ||
876 | * OEM and LCD Write Enable bits are set in the NVM. | ||
877 | * When both NVM bits are cleared, SW will configure | ||
878 | * them instead. | ||
879 | */ | ||
880 | data = er32(STRAP); | ||
881 | data &= E1000_STRAP_SMBUS_ADDRESS_MASK; | ||
882 | reg_data = data >> E1000_STRAP_SMBUS_ADDRESS_SHIFT; | ||
883 | reg_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; | ||
884 | ret_val = e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, | ||
885 | reg_data); | ||
886 | if (ret_val) | ||
887 | goto out; | ||
888 | |||
889 | data = er32(LEDCTL); | ||
890 | ret_val = e1000_write_phy_reg_hv_locked(hw, | ||
891 | HV_LED_CONFIG, | ||
892 | (u16)data); | ||
893 | if (ret_val) | ||
894 | goto out; | ||
895 | } | ||
896 | /* Configure LCD from extended configuration region. */ | ||
897 | |||
898 | /* cnf_base_addr is in DWORD */ | ||
899 | word_addr = (u16)(cnf_base_addr << 1); | ||
900 | |||
901 | for (i = 0; i < cnf_size; i++) { | ||
902 | ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, | ||
903 | ®_data); | ||
904 | if (ret_val) | ||
905 | goto out; | ||
906 | |||
907 | ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1), | ||
908 | 1, ®_addr); | ||
909 | if (ret_val) | ||
910 | goto out; | ||
911 | |||
912 | /* Save off the PHY page for future writes. */ | ||
913 | if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { | ||
914 | phy_page = reg_data; | ||
915 | continue; | ||
916 | } | ||
917 | |||
918 | reg_addr &= PHY_REG_MASK; | ||
919 | reg_addr |= phy_page; | ||
920 | |||
921 | ret_val = phy->ops.write_phy_reg_locked(hw, | ||
922 | (u32)reg_addr, | ||
923 | reg_data); | ||
924 | if (ret_val) | ||
925 | goto out; | ||
926 | } | ||
927 | } | ||
928 | |||
929 | out: | ||
930 | hw->phy.ops.release_phy(hw); | ||
931 | return ret_val; | ||
932 | } | ||
933 | |||
934 | /** | ||
935 | * e1000_k1_gig_workaround_hv - K1 Si workaround | ||
936 | * @hw: pointer to the HW structure | ||
937 | * @link: link up bool flag | ||
938 | * | ||
939 | * If K1 is enabled for 1Gbps, the MAC might stall when transitioning | ||
940 | * from a lower speed. This workaround disables K1 whenever link is at 1Gig | ||
941 | * If link is down, the function will restore the default K1 setting located | ||
942 | * in the NVM. | ||
943 | **/ | ||
944 | static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) | ||
945 | { | ||
946 | s32 ret_val = 0; | ||
947 | u16 status_reg = 0; | ||
948 | bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled; | ||
949 | |||
950 | if (hw->mac.type != e1000_pchlan) | ||
951 | goto out; | ||
952 | |||
953 | /* Wrap the whole flow with the sw flag */ | ||
954 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
955 | if (ret_val) | ||
956 | goto out; | ||
957 | |||
958 | /* Disable K1 when link is 1Gbps, otherwise use the NVM setting */ | ||
959 | if (link) { | ||
960 | if (hw->phy.type == e1000_phy_82578) { | ||
961 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, | ||
962 | BM_CS_STATUS, | ||
963 | &status_reg); | ||
964 | if (ret_val) | ||
965 | goto release; | ||
966 | |||
967 | status_reg &= BM_CS_STATUS_LINK_UP | | ||
968 | BM_CS_STATUS_RESOLVED | | ||
969 | BM_CS_STATUS_SPEED_MASK; | ||
970 | |||
971 | if (status_reg == (BM_CS_STATUS_LINK_UP | | ||
972 | BM_CS_STATUS_RESOLVED | | ||
973 | BM_CS_STATUS_SPEED_1000)) | ||
974 | k1_enable = false; | ||
975 | } | ||
976 | |||
977 | if (hw->phy.type == e1000_phy_82577) { | ||
978 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, | ||
979 | HV_M_STATUS, | ||
980 | &status_reg); | ||
981 | if (ret_val) | ||
982 | goto release; | ||
983 | |||
984 | status_reg &= HV_M_STATUS_LINK_UP | | ||
985 | HV_M_STATUS_AUTONEG_COMPLETE | | ||
986 | HV_M_STATUS_SPEED_MASK; | ||
987 | |||
988 | if (status_reg == (HV_M_STATUS_LINK_UP | | ||
989 | HV_M_STATUS_AUTONEG_COMPLETE | | ||
990 | HV_M_STATUS_SPEED_1000)) | ||
991 | k1_enable = false; | ||
992 | } | ||
993 | |||
994 | /* Link stall fix for link up */ | ||
995 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19), | ||
996 | 0x0100); | ||
997 | if (ret_val) | ||
998 | goto release; | ||
999 | |||
1000 | } else { | ||
1001 | /* Link stall fix for link down */ | ||
1002 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19), | ||
1003 | 0x4100); | ||
1004 | if (ret_val) | ||
1005 | goto release; | ||
1006 | } | ||
1007 | |||
1008 | ret_val = e1000_configure_k1_ich8lan(hw, k1_enable); | ||
1009 | |||
1010 | release: | ||
1011 | hw->phy.ops.release_phy(hw); | ||
1012 | out: | ||
1013 | return ret_val; | ||
1014 | } | ||
1015 | |||
1016 | /** | ||
1017 | * e1000_configure_k1_ich8lan - Configure K1 power state | ||
1018 | * @hw: pointer to the HW structure | ||
1019 | * @enable: K1 state to configure | ||
1020 | * | ||
1021 | * Configure the K1 power state based on the provided parameter. | ||
1022 | * Assumes semaphore already acquired. | ||
1023 | * | ||
1024 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) | ||
1025 | **/ | ||
1026 | static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable) | ||
1027 | { | ||
1028 | s32 ret_val = 0; | ||
1029 | u32 ctrl_reg = 0; | ||
1030 | u32 ctrl_ext = 0; | ||
1031 | u32 reg = 0; | ||
1032 | u16 kmrn_reg = 0; | ||
1033 | |||
1034 | ret_val = e1000e_read_kmrn_reg_locked(hw, | ||
1035 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
1036 | &kmrn_reg); | ||
1037 | if (ret_val) | ||
1038 | goto out; | ||
1039 | |||
1040 | if (k1_enable) | ||
1041 | kmrn_reg |= E1000_KMRNCTRLSTA_K1_ENABLE; | ||
1042 | else | ||
1043 | kmrn_reg &= ~E1000_KMRNCTRLSTA_K1_ENABLE; | ||
1044 | |||
1045 | ret_val = e1000e_write_kmrn_reg_locked(hw, | ||
1046 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
1047 | kmrn_reg); | ||
1048 | if (ret_val) | ||
1049 | goto out; | ||
1050 | |||
1051 | udelay(20); | ||
1052 | ctrl_ext = er32(CTRL_EXT); | ||
1053 | ctrl_reg = er32(CTRL); | ||
1054 | |||
1055 | reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); | ||
1056 | reg |= E1000_CTRL_FRCSPD; | ||
1057 | ew32(CTRL, reg); | ||
1058 | |||
1059 | ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS); | ||
1060 | udelay(20); | ||
1061 | ew32(CTRL, ctrl_reg); | ||
1062 | ew32(CTRL_EXT, ctrl_ext); | ||
1063 | udelay(20); | ||
1064 | |||
1065 | out: | ||
1066 | return ret_val; | ||
1067 | } | ||
1068 | |||
1069 | /** | ||
1070 | * e1000_oem_bits_config_ich8lan - SW-based LCD Configuration | ||
1071 | * @hw: pointer to the HW structure | ||
1072 | * @d0_state: boolean if entering d0 or d3 device state | ||
1073 | * | ||
1074 | * SW will configure Gbe Disable and LPLU based on the NVM. The four bits are | ||
1075 | * collectively called OEM bits. The OEM Write Enable bit and SW Config bit | ||
1076 | * in NVM determines whether HW should configure LPLU and Gbe Disable. | ||
1077 | **/ | ||
1078 | static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) | ||
1079 | { | ||
1080 | s32 ret_val = 0; | ||
1081 | u32 mac_reg; | ||
1082 | u16 oem_reg; | ||
1083 | |||
1084 | if (hw->mac.type != e1000_pchlan) | ||
1085 | return ret_val; | ||
1086 | |||
1087 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
1088 | if (ret_val) | ||
1089 | return ret_val; | ||
1090 | |||
1091 | mac_reg = er32(EXTCNF_CTRL); | ||
1092 | if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) | ||
1093 | goto out; | ||
1094 | |||
1095 | mac_reg = er32(FEXTNVM); | ||
1096 | if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M)) | ||
1097 | goto out; | ||
1098 | |||
1099 | mac_reg = er32(PHY_CTRL); | ||
1100 | |||
1101 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, HV_OEM_BITS, &oem_reg); | ||
1102 | if (ret_val) | ||
1103 | goto out; | ||
1104 | |||
1105 | oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU); | ||
1106 | |||
1107 | if (d0_state) { | ||
1108 | if (mac_reg & E1000_PHY_CTRL_GBE_DISABLE) | ||
1109 | oem_reg |= HV_OEM_BITS_GBE_DIS; | ||
1110 | |||
1111 | if (mac_reg & E1000_PHY_CTRL_D0A_LPLU) | ||
1112 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1113 | } else { | ||
1114 | if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE) | ||
1115 | oem_reg |= HV_OEM_BITS_GBE_DIS; | ||
1116 | |||
1117 | if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU) | ||
1118 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1119 | } | ||
1120 | /* Restart auto-neg to activate the bits */ | ||
1121 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1122 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, HV_OEM_BITS, oem_reg); | ||
1123 | |||
1124 | out: | ||
1125 | hw->phy.ops.release_phy(hw); | ||
1126 | |||
1127 | return ret_val; | ||
1128 | } | ||
1129 | |||
1130 | |||
1131 | /** | ||
797 | * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be | 1132 | * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be |
798 | * done after every PHY reset. | 1133 | * done after every PHY reset. |
799 | **/ | 1134 | **/ |
@@ -833,10 +1168,20 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) | |||
833 | ret_val = hw->phy.ops.acquire_phy(hw); | 1168 | ret_val = hw->phy.ops.acquire_phy(hw); |
834 | if (ret_val) | 1169 | if (ret_val) |
835 | return ret_val; | 1170 | return ret_val; |
1171 | |||
836 | hw->phy.addr = 1; | 1172 | hw->phy.addr = 1; |
837 | e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); | 1173 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); |
1174 | if (ret_val) | ||
1175 | goto out; | ||
838 | hw->phy.ops.release_phy(hw); | 1176 | hw->phy.ops.release_phy(hw); |
839 | 1177 | ||
1178 | /* | ||
1179 | * Configure the K1 Si workaround during phy reset assuming there is | ||
1180 | * link so that it disables K1 if link is in 1Gbps. | ||
1181 | */ | ||
1182 | ret_val = e1000_k1_gig_workaround_hv(hw, true); | ||
1183 | |||
1184 | out: | ||
840 | return ret_val; | 1185 | return ret_val; |
841 | } | 1186 | } |
842 | 1187 | ||
@@ -882,11 +1227,8 @@ static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw) | |||
882 | **/ | 1227 | **/ |
883 | static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | 1228 | static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) |
884 | { | 1229 | { |
885 | struct e1000_phy_info *phy = &hw->phy; | 1230 | s32 ret_val = 0; |
886 | u32 i; | 1231 | u16 reg; |
887 | u32 data, cnf_size, cnf_base_addr, sw_cfg_mask; | ||
888 | s32 ret_val; | ||
889 | u16 reg, word_addr, reg_data, reg_addr, phy_page = 0; | ||
890 | 1232 | ||
891 | ret_val = e1000e_phy_hw_reset_generic(hw); | 1233 | ret_val = e1000e_phy_hw_reset_generic(hw); |
892 | if (ret_val) | 1234 | if (ret_val) |
@@ -905,81 +1247,16 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | |||
905 | if (hw->mac.type == e1000_pchlan) | 1247 | if (hw->mac.type == e1000_pchlan) |
906 | e1e_rphy(hw, BM_WUC, ®); | 1248 | e1e_rphy(hw, BM_WUC, ®); |
907 | 1249 | ||
908 | /* | 1250 | /* Configure the LCD with the extended configuration region in NVM */ |
909 | * Initialize the PHY from the NVM on ICH platforms. This | 1251 | ret_val = e1000_sw_lcd_config_ich8lan(hw); |
910 | * is needed due to an issue where the NVM configuration is | 1252 | if (ret_val) |
911 | * not properly autoloaded after power transitions. | 1253 | goto out; |
912 | * Therefore, after each PHY reset, we will load the | ||
913 | * configuration data out of the NVM manually. | ||
914 | */ | ||
915 | if (hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) { | ||
916 | struct e1000_adapter *adapter = hw->adapter; | ||
917 | |||
918 | /* Check if SW needs configure the PHY */ | ||
919 | if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) || | ||
920 | (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M)) | ||
921 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; | ||
922 | else | ||
923 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | ||
924 | |||
925 | data = er32(FEXTNVM); | ||
926 | if (!(data & sw_cfg_mask)) | ||
927 | return 0; | ||
928 | |||
929 | /* Wait for basic configuration completes before proceeding */ | ||
930 | e1000_lan_init_done_ich8lan(hw); | ||
931 | |||
932 | /* | ||
933 | * Make sure HW does not configure LCD from PHY | ||
934 | * extended configuration before SW configuration | ||
935 | */ | ||
936 | data = er32(EXTCNF_CTRL); | ||
937 | if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE) | ||
938 | return 0; | ||
939 | |||
940 | cnf_size = er32(EXTCNF_SIZE); | ||
941 | cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK; | ||
942 | cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT; | ||
943 | if (!cnf_size) | ||
944 | return 0; | ||
945 | |||
946 | cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; | ||
947 | cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; | ||
948 | |||
949 | /* Configure LCD from extended configuration region. */ | ||
950 | |||
951 | /* cnf_base_addr is in DWORD */ | ||
952 | word_addr = (u16)(cnf_base_addr << 1); | ||
953 | |||
954 | for (i = 0; i < cnf_size; i++) { | ||
955 | ret_val = e1000_read_nvm(hw, | ||
956 | (word_addr + i * 2), | ||
957 | 1, | ||
958 | ®_data); | ||
959 | if (ret_val) | ||
960 | return ret_val; | ||
961 | |||
962 | ret_val = e1000_read_nvm(hw, | ||
963 | (word_addr + i * 2 + 1), | ||
964 | 1, | ||
965 | ®_addr); | ||
966 | if (ret_val) | ||
967 | return ret_val; | ||
968 | |||
969 | /* Save off the PHY page for future writes. */ | ||
970 | if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { | ||
971 | phy_page = reg_data; | ||
972 | continue; | ||
973 | } | ||
974 | |||
975 | reg_addr |= phy_page; | ||
976 | 1254 | ||
977 | ret_val = e1e_wphy(hw, (u32)reg_addr, reg_data); | 1255 | /* Configure the LCD with the OEM bits in NVM */ |
978 | if (ret_val) | 1256 | if (hw->mac.type == e1000_pchlan) |
979 | return ret_val; | 1257 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); |
980 | } | ||
981 | } | ||
982 | 1258 | ||
1259 | out: | ||
983 | return 0; | 1260 | return 0; |
984 | } | 1261 | } |
985 | 1262 | ||
@@ -2306,6 +2583,7 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw) | |||
2306 | **/ | 2583 | **/ |
2307 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | 2584 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) |
2308 | { | 2585 | { |
2586 | struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; | ||
2309 | u16 reg; | 2587 | u16 reg; |
2310 | u32 ctrl, icr, kab; | 2588 | u32 ctrl, icr, kab; |
2311 | s32 ret_val; | 2589 | s32 ret_val; |
@@ -2341,6 +2619,18 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2341 | ew32(PBS, E1000_PBS_16K); | 2619 | ew32(PBS, E1000_PBS_16K); |
2342 | } | 2620 | } |
2343 | 2621 | ||
2622 | if (hw->mac.type == e1000_pchlan) { | ||
2623 | /* Save the NVM K1 bit setting*/ | ||
2624 | ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, ®); | ||
2625 | if (ret_val) | ||
2626 | return ret_val; | ||
2627 | |||
2628 | if (reg & E1000_NVM_K1_ENABLE) | ||
2629 | dev_spec->nvm_k1_enabled = true; | ||
2630 | else | ||
2631 | dev_spec->nvm_k1_enabled = false; | ||
2632 | } | ||
2633 | |||
2344 | ctrl = er32(CTRL); | 2634 | ctrl = er32(CTRL); |
2345 | 2635 | ||
2346 | if (!e1000_check_reset_block(hw)) { | 2636 | if (!e1000_check_reset_block(hw)) { |
@@ -2386,6 +2676,15 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2386 | if (hw->mac.type == e1000_pchlan) | 2676 | if (hw->mac.type == e1000_pchlan) |
2387 | e1e_rphy(hw, BM_WUC, ®); | 2677 | e1e_rphy(hw, BM_WUC, ®); |
2388 | 2678 | ||
2679 | ret_val = e1000_sw_lcd_config_ich8lan(hw); | ||
2680 | if (ret_val) | ||
2681 | goto out; | ||
2682 | |||
2683 | if (hw->mac.type == e1000_pchlan) { | ||
2684 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); | ||
2685 | if (ret_val) | ||
2686 | goto out; | ||
2687 | } | ||
2389 | /* | 2688 | /* |
2390 | * For PCH, this write will make sure that any noise | 2689 | * For PCH, this write will make sure that any noise |
2391 | * will be detected as a CRC error and be dropped rather than show up | 2690 | * will be detected as a CRC error and be dropped rather than show up |
@@ -2404,6 +2703,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2404 | if (hw->mac.type == e1000_pchlan) | 2703 | if (hw->mac.type == e1000_pchlan) |
2405 | ret_val = e1000_hv_phy_workarounds_ich8lan(hw); | 2704 | ret_val = e1000_hv_phy_workarounds_ich8lan(hw); |
2406 | 2705 | ||
2706 | out: | ||
2407 | return ret_val; | 2707 | return ret_val; |
2408 | } | 2708 | } |
2409 | 2709 | ||
@@ -2708,14 +3008,6 @@ static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed, | |||
2708 | if (ret_val) | 3008 | if (ret_val) |
2709 | return ret_val; | 3009 | return ret_val; |
2710 | 3010 | ||
2711 | if ((hw->mac.type == e1000_pchlan) && (*speed == SPEED_1000)) { | ||
2712 | ret_val = e1000e_write_kmrn_reg(hw, | ||
2713 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
2714 | E1000_KMRNCTRLSTA_K1_DISABLE); | ||
2715 | if (ret_val) | ||
2716 | return ret_val; | ||
2717 | } | ||
2718 | |||
2719 | if ((hw->mac.type == e1000_ich8lan) && | 3011 | if ((hw->mac.type == e1000_ich8lan) && |
2720 | (hw->phy.type == e1000_phy_igp_3) && | 3012 | (hw->phy.type == e1000_phy_igp_3) && |
2721 | (*speed == SPEED_1000)) { | 3013 | (*speed == SPEED_1000)) { |
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index f9d33ab05e97..03175b3a2c9e 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -95,13 +95,6 @@ static const u16 e1000_igp_2_cable_length_table[] = | |||
95 | /* BM PHY Copper Specific Control 1 */ | 95 | /* BM PHY Copper Specific Control 1 */ |
96 | #define BM_CS_CTRL1 16 | 96 | #define BM_CS_CTRL1 16 |
97 | 97 | ||
98 | /* BM PHY Copper Specific Status */ | ||
99 | #define BM_CS_STATUS 17 | ||
100 | #define BM_CS_STATUS_LINK_UP 0x0400 | ||
101 | #define BM_CS_STATUS_RESOLVED 0x0800 | ||
102 | #define BM_CS_STATUS_SPEED_MASK 0xC000 | ||
103 | #define BM_CS_STATUS_SPEED_1000 0x8000 | ||
104 | |||
105 | #define HV_MUX_DATA_CTRL PHY_REG(776, 16) | 98 | #define HV_MUX_DATA_CTRL PHY_REG(776, 16) |
106 | #define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 | 99 | #define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 |
107 | #define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 | 100 | #define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 |
@@ -563,7 +556,7 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | |||
563 | } | 556 | } |
564 | 557 | ||
565 | /** | 558 | /** |
566 | * e1000_read_kmrn_reg_locked - Read kumeran register | 559 | * e1000e_read_kmrn_reg_locked - Read kumeran register |
567 | * @hw: pointer to the HW structure | 560 | * @hw: pointer to the HW structure |
568 | * @offset: register offset to be read | 561 | * @offset: register offset to be read |
569 | * @data: pointer to the read data | 562 | * @data: pointer to the read data |
@@ -572,7 +565,7 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | |||
572 | * information retrieved is stored in data. | 565 | * information retrieved is stored in data. |
573 | * Assumes semaphore already acquired. | 566 | * Assumes semaphore already acquired. |
574 | **/ | 567 | **/ |
575 | s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) | 568 | s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) |
576 | { | 569 | { |
577 | return __e1000_read_kmrn_reg(hw, offset, data, true); | 570 | return __e1000_read_kmrn_reg(hw, offset, data, true); |
578 | } | 571 | } |
@@ -631,7 +624,7 @@ s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | |||
631 | } | 624 | } |
632 | 625 | ||
633 | /** | 626 | /** |
634 | * e1000_write_kmrn_reg_locked - Write kumeran register | 627 | * e1000e_write_kmrn_reg_locked - Write kumeran register |
635 | * @hw: pointer to the HW structure | 628 | * @hw: pointer to the HW structure |
636 | * @offset: register offset to write to | 629 | * @offset: register offset to write to |
637 | * @data: data to write at register offset | 630 | * @data: data to write at register offset |
@@ -639,7 +632,7 @@ s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | |||
639 | * Write the data to PHY register at the offset using the kumeran interface. | 632 | * Write the data to PHY register at the offset using the kumeran interface. |
640 | * Assumes semaphore already acquired. | 633 | * Assumes semaphore already acquired. |
641 | **/ | 634 | **/ |
642 | s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) | 635 | s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) |
643 | { | 636 | { |
644 | return __e1000_write_kmrn_reg(hw, offset, data, true); | 637 | return __e1000_write_kmrn_reg(hw, offset, data, true); |
645 | } | 638 | } |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index bd3447f04902..94c9ad2746bc 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -1760,7 +1760,7 @@ static struct pcmcia_device_id pcnet_ids[] = { | |||
1760 | PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), | 1760 | PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), |
1761 | PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), | 1761 | PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), |
1762 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), | 1762 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), |
1763 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), | 1763 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"), |
1764 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), | 1764 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), |
1765 | PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b), | 1765 | PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b), |
1766 | PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", | 1766 | PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index f98ef523f525..fa4935678488 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -3379,7 +3379,7 @@ static u16 rtl_rw_cpluscmd(void __iomem *ioaddr) | |||
3379 | static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) | 3379 | static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) |
3380 | { | 3380 | { |
3381 | /* Low hurts. Let's disable the filtering. */ | 3381 | /* Low hurts. Let's disable the filtering. */ |
3382 | RTL_W16(RxMaxSize, rx_buf_sz); | 3382 | RTL_W16(RxMaxSize, rx_buf_sz + 1); |
3383 | } | 3383 | } |
3384 | 3384 | ||
3385 | static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) | 3385 | static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 2ab5c39f33ca..6a10d7ba5877 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -4538,6 +4538,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
4538 | goto err_out_free_netdev; | 4538 | goto err_out_free_netdev; |
4539 | } | 4539 | } |
4540 | 4540 | ||
4541 | netif_carrier_off(dev); | ||
4542 | |||
4541 | netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); | 4543 | netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); |
4542 | 4544 | ||
4543 | err = request_irq(pdev->irq, sky2_intr, | 4545 | err = request_irq(pdev->irq, sky2_intr, |
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c index 36cb2423bcf1..75fa32e34fd0 100644 --- a/drivers/net/tokenring/ibmtr.c +++ b/drivers/net/tokenring/ibmtr.c | |||
@@ -1144,9 +1144,16 @@ static void dir_open_adapter (struct net_device *dev) | |||
1144 | } else { | 1144 | } else { |
1145 | char **prphase = printphase; | 1145 | char **prphase = printphase; |
1146 | char **prerror = printerror; | 1146 | char **prerror = printerror; |
1147 | int pnr = err / 16 - 1; | ||
1148 | int enr = err % 16 - 1; | ||
1147 | DPRINTK("TR Adapter misc open failure, error code = "); | 1149 | DPRINTK("TR Adapter misc open failure, error code = "); |
1148 | printk("0x%x, Phase: %s, Error: %s\n", | 1150 | if (pnr < 0 || pnr >= ARRAY_SIZE(printphase) || |
1149 | err, prphase[err/16 -1], prerror[err%16 -1]); | 1151 | enr < 0 || |
1152 | enr >= ARRAY_SIZE(printerror)) | ||
1153 | printk("0x%x, invalid Phase/Error.", err); | ||
1154 | else | ||
1155 | printk("0x%x, Phase: %s, Error: %s\n", err, | ||
1156 | prphase[pnr], prerror[enr]); | ||
1150 | printk(" retrying after %ds delay...\n", | 1157 | printk(" retrying after %ds delay...\n", |
1151 | TR_RETRY_INTERVAL/HZ); | 1158 | TR_RETRY_INTERVAL/HZ); |
1152 | } | 1159 | } |
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 16a271787b85..1895d63aad0a 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -679,7 +679,7 @@ static u8 ath_rc_get_highest_rix(struct ath_softc *sc, | |||
679 | return rate; | 679 | return rate; |
680 | 680 | ||
681 | if (rate_table->info[rate].valid_single_stream && | 681 | if (rate_table->info[rate].valid_single_stream && |
682 | !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)); | 682 | !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)) |
683 | return rate; | 683 | return rate; |
684 | 684 | ||
685 | /* This should not happen */ | 685 | /* This should not happen */ |
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c index 8701034569fa..de4e804bedf0 100644 --- a/drivers/net/wireless/b43/dma.c +++ b/drivers/net/wireless/b43/dma.c | |||
@@ -1157,8 +1157,9 @@ struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot) | |||
1157 | } | 1157 | } |
1158 | 1158 | ||
1159 | static int dma_tx_fragment(struct b43_dmaring *ring, | 1159 | static int dma_tx_fragment(struct b43_dmaring *ring, |
1160 | struct sk_buff *skb) | 1160 | struct sk_buff **in_skb) |
1161 | { | 1161 | { |
1162 | struct sk_buff *skb = *in_skb; | ||
1162 | const struct b43_dma_ops *ops = ring->ops; | 1163 | const struct b43_dma_ops *ops = ring->ops; |
1163 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1164 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
1164 | u8 *header; | 1165 | u8 *header; |
@@ -1224,8 +1225,14 @@ static int dma_tx_fragment(struct b43_dmaring *ring, | |||
1224 | } | 1225 | } |
1225 | 1226 | ||
1226 | memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); | 1227 | memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); |
1228 | memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb)); | ||
1229 | bounce_skb->dev = skb->dev; | ||
1230 | skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb)); | ||
1231 | info = IEEE80211_SKB_CB(bounce_skb); | ||
1232 | |||
1227 | dev_kfree_skb_any(skb); | 1233 | dev_kfree_skb_any(skb); |
1228 | skb = bounce_skb; | 1234 | skb = bounce_skb; |
1235 | *in_skb = bounce_skb; | ||
1229 | meta->skb = skb; | 1236 | meta->skb = skb; |
1230 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); | 1237 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); |
1231 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { | 1238 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { |
@@ -1355,7 +1362,11 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb) | |||
1355 | * static, so we don't need to store it per frame. */ | 1362 | * static, so we don't need to store it per frame. */ |
1356 | ring->queue_prio = skb_get_queue_mapping(skb); | 1363 | ring->queue_prio = skb_get_queue_mapping(skb); |
1357 | 1364 | ||
1358 | err = dma_tx_fragment(ring, skb); | 1365 | /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing |
1366 | * into the skb data or cb now. */ | ||
1367 | hdr = NULL; | ||
1368 | info = NULL; | ||
1369 | err = dma_tx_fragment(ring, &skb); | ||
1359 | if (unlikely(err == -ENOKEY)) { | 1370 | if (unlikely(err == -ENOKEY)) { |
1360 | /* Drop this packet, as we don't have the encryption key | 1371 | /* Drop this packet, as we don't have the encryption key |
1361 | * anymore and must not transmit it unencrypted. */ | 1372 | * anymore and must not transmit it unencrypted. */ |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index 240cff1e6979..a741d37fd96f 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c | |||
@@ -6325,8 +6325,10 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev, | |||
6325 | 6325 | ||
6326 | fail: | 6326 | fail: |
6327 | if (dev) { | 6327 | if (dev) { |
6328 | if (registered) | 6328 | if (registered) { |
6329 | unregister_ieee80211(priv->ieee); | ||
6329 | unregister_netdev(dev); | 6330 | unregister_netdev(dev); |
6331 | } | ||
6330 | 6332 | ||
6331 | ipw2100_hw_stop_adapter(priv); | 6333 | ipw2100_hw_stop_adapter(priv); |
6332 | 6334 | ||
@@ -6383,6 +6385,7 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev) | |||
6383 | /* Unregister the device first - this results in close() | 6385 | /* Unregister the device first - this results in close() |
6384 | * being called if the device is open. If we free storage | 6386 | * being called if the device is open. If we free storage |
6385 | * first, then close() will crash. */ | 6387 | * first, then close() will crash. */ |
6388 | unregister_ieee80211(priv->ieee); | ||
6386 | unregister_netdev(dev); | 6389 | unregister_netdev(dev); |
6387 | 6390 | ||
6388 | /* ipw2100_down will ensure that there is no more pending work | 6391 | /* ipw2100_down will ensure that there is no more pending work |
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c index 827824d45de9..9b0f2c0646e0 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.c +++ b/drivers/net/wireless/ipw2x00/ipw2200.c | |||
@@ -11822,6 +11822,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev, | |||
11822 | if (err) { | 11822 | if (err) { |
11823 | IPW_ERROR("Failed to register promiscuous network " | 11823 | IPW_ERROR("Failed to register promiscuous network " |
11824 | "device (error %d).\n", err); | 11824 | "device (error %d).\n", err); |
11825 | unregister_ieee80211(priv->ieee); | ||
11825 | unregister_netdev(priv->net_dev); | 11826 | unregister_netdev(priv->net_dev); |
11826 | goto out_remove_sysfs; | 11827 | goto out_remove_sysfs; |
11827 | } | 11828 | } |
@@ -11872,6 +11873,7 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev) | |||
11872 | 11873 | ||
11873 | mutex_unlock(&priv->mutex); | 11874 | mutex_unlock(&priv->mutex); |
11874 | 11875 | ||
11876 | unregister_ieee80211(priv->ieee); | ||
11875 | unregister_netdev(priv->net_dev); | 11877 | unregister_netdev(priv->net_dev); |
11876 | 11878 | ||
11877 | if (priv->rxq) { | 11879 | if (priv->rxq) { |
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h index bf45391172f3..f42ade6c2d3e 100644 --- a/drivers/net/wireless/ipw2x00/libipw.h +++ b/drivers/net/wireless/ipw2x00/libipw.h | |||
@@ -1020,6 +1020,7 @@ static inline int libipw_is_cck_rate(u8 rate) | |||
1020 | /* ieee80211.c */ | 1020 | /* ieee80211.c */ |
1021 | extern void free_ieee80211(struct net_device *dev, int monitor); | 1021 | extern void free_ieee80211(struct net_device *dev, int monitor); |
1022 | extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); | 1022 | extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); |
1023 | extern void unregister_ieee80211(struct libipw_device *ieee); | ||
1023 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); | 1024 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); |
1024 | 1025 | ||
1025 | extern void libipw_networks_age(struct libipw_device *ieee, | 1026 | extern void libipw_networks_age(struct libipw_device *ieee, |
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c index a0e9f6aed7da..be5b809ec97a 100644 --- a/drivers/net/wireless/ipw2x00/libipw_module.c +++ b/drivers/net/wireless/ipw2x00/libipw_module.c | |||
@@ -235,16 +235,19 @@ void free_ieee80211(struct net_device *dev, int monitor) | |||
235 | libipw_networks_free(ieee); | 235 | libipw_networks_free(ieee); |
236 | 236 | ||
237 | /* free cfg80211 resources */ | 237 | /* free cfg80211 resources */ |
238 | if (!monitor) { | 238 | if (!monitor) |
239 | wiphy_unregister(ieee->wdev.wiphy); | ||
240 | kfree(ieee->a_band.channels); | ||
241 | kfree(ieee->bg_band.channels); | ||
242 | wiphy_free(ieee->wdev.wiphy); | 239 | wiphy_free(ieee->wdev.wiphy); |
243 | } | ||
244 | 240 | ||
245 | free_netdev(dev); | 241 | free_netdev(dev); |
246 | } | 242 | } |
247 | 243 | ||
244 | void unregister_ieee80211(struct libipw_device *ieee) | ||
245 | { | ||
246 | wiphy_unregister(ieee->wdev.wiphy); | ||
247 | kfree(ieee->a_band.channels); | ||
248 | kfree(ieee->bg_band.channels); | ||
249 | } | ||
250 | |||
248 | #ifdef CONFIG_LIBIPW_DEBUG | 251 | #ifdef CONFIG_LIBIPW_DEBUG |
249 | 252 | ||
250 | static int debug = 0; | 253 | static int debug = 0; |
@@ -330,3 +333,4 @@ module_init(libipw_init); | |||
330 | 333 | ||
331 | EXPORT_SYMBOL(alloc_ieee80211); | 334 | EXPORT_SYMBOL(alloc_ieee80211); |
332 | EXPORT_SYMBOL(free_ieee80211); | 335 | EXPORT_SYMBOL(free_ieee80211); |
336 | EXPORT_SYMBOL(unregister_ieee80211); | ||
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c index 92bc8c5f1ca2..3fac4efa5ac8 100644 --- a/drivers/net/wireless/libertas/if_usb.c +++ b/drivers/net/wireless/libertas/if_usb.c | |||
@@ -508,7 +508,7 @@ static int __if_usb_submit_rx_urb(struct if_usb_card *cardp, | |||
508 | /* Fill the receive configuration URB and initialise the Rx call back */ | 508 | /* Fill the receive configuration URB and initialise the Rx call back */ |
509 | usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, | 509 | usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, |
510 | usb_rcvbulkpipe(cardp->udev, cardp->ep_in), | 510 | usb_rcvbulkpipe(cardp->udev, cardp->ep_in), |
511 | (void *) (skb->tail + (size_t) IPFIELD_ALIGN_OFFSET), | 511 | skb->data + IPFIELD_ALIGN_OFFSET, |
512 | MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, | 512 | MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, |
513 | cardp); | 513 | cardp); |
514 | 514 | ||
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index b8f5ee33445e..14e7bb210075 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -2389,10 +2389,13 @@ static struct usb_device_id rt73usb_device_table[] = { | |||
2389 | { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) }, | 2389 | { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) }, |
2390 | { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) }, | 2390 | { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) }, |
2391 | /* MSI */ | 2391 | /* MSI */ |
2392 | { USB_DEVICE(0x0db0, 0x4600), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2392 | { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) }, | 2393 | { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) }, |
2393 | { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) }, | 2394 | { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) }, |
2394 | { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) }, | 2395 | { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) }, |
2395 | { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) }, | 2396 | { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) }, |
2397 | /* Ovislink */ | ||
2398 | { USB_DEVICE(0x1b75, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2396 | /* Ralink */ | 2399 | /* Ralink */ |
2397 | { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) }, | 2400 | { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) }, |
2398 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) }, | 2401 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) }, |
@@ -2420,6 +2423,8 @@ static struct usb_device_id rt73usb_device_table[] = { | |||
2420 | /* Planex */ | 2423 | /* Planex */ |
2421 | { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) }, | 2424 | { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) }, |
2422 | { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) }, | 2425 | { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) }, |
2426 | /* WideTell */ | ||
2427 | { USB_DEVICE(0x7167, 0x3840), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2423 | /* Zcom */ | 2428 | /* Zcom */ |
2424 | { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) }, | 2429 | { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) }, |
2425 | /* ZyXEL */ | 2430 | /* ZyXEL */ |
diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c index 934d4bee39a0..698d75cda084 100644 --- a/drivers/pcmcia/cs.c +++ b/drivers/pcmcia/cs.c | |||
@@ -98,10 +98,13 @@ EXPORT_SYMBOL(pcmcia_socket_list_rwsem); | |||
98 | * These functions check for the appropriate struct pcmcia_soket arrays, | 98 | * These functions check for the appropriate struct pcmcia_soket arrays, |
99 | * and pass them to the low-level functions pcmcia_{suspend,resume}_socket | 99 | * and pass them to the low-level functions pcmcia_{suspend,resume}_socket |
100 | */ | 100 | */ |
101 | static int socket_early_resume(struct pcmcia_socket *skt); | ||
102 | static int socket_late_resume(struct pcmcia_socket *skt); | ||
101 | static int socket_resume(struct pcmcia_socket *skt); | 103 | static int socket_resume(struct pcmcia_socket *skt); |
102 | static int socket_suspend(struct pcmcia_socket *skt); | 104 | static int socket_suspend(struct pcmcia_socket *skt); |
103 | 105 | ||
104 | int pcmcia_socket_dev_suspend(struct device *dev) | 106 | static void pcmcia_socket_dev_run(struct device *dev, |
107 | int (*cb)(struct pcmcia_socket *)) | ||
105 | { | 108 | { |
106 | struct pcmcia_socket *socket; | 109 | struct pcmcia_socket *socket; |
107 | 110 | ||
@@ -110,29 +113,34 @@ int pcmcia_socket_dev_suspend(struct device *dev) | |||
110 | if (socket->dev.parent != dev) | 113 | if (socket->dev.parent != dev) |
111 | continue; | 114 | continue; |
112 | mutex_lock(&socket->skt_mutex); | 115 | mutex_lock(&socket->skt_mutex); |
113 | socket_suspend(socket); | 116 | cb(socket); |
114 | mutex_unlock(&socket->skt_mutex); | 117 | mutex_unlock(&socket->skt_mutex); |
115 | } | 118 | } |
116 | up_read(&pcmcia_socket_list_rwsem); | 119 | up_read(&pcmcia_socket_list_rwsem); |
120 | } | ||
117 | 121 | ||
122 | int pcmcia_socket_dev_suspend(struct device *dev) | ||
123 | { | ||
124 | pcmcia_socket_dev_run(dev, socket_suspend); | ||
118 | return 0; | 125 | return 0; |
119 | } | 126 | } |
120 | EXPORT_SYMBOL(pcmcia_socket_dev_suspend); | 127 | EXPORT_SYMBOL(pcmcia_socket_dev_suspend); |
121 | 128 | ||
122 | int pcmcia_socket_dev_resume(struct device *dev) | 129 | void pcmcia_socket_dev_early_resume(struct device *dev) |
123 | { | 130 | { |
124 | struct pcmcia_socket *socket; | 131 | pcmcia_socket_dev_run(dev, socket_early_resume); |
132 | } | ||
133 | EXPORT_SYMBOL(pcmcia_socket_dev_early_resume); | ||
125 | 134 | ||
126 | down_read(&pcmcia_socket_list_rwsem); | 135 | void pcmcia_socket_dev_late_resume(struct device *dev) |
127 | list_for_each_entry(socket, &pcmcia_socket_list, socket_list) { | 136 | { |
128 | if (socket->dev.parent != dev) | 137 | pcmcia_socket_dev_run(dev, socket_late_resume); |
129 | continue; | 138 | } |
130 | mutex_lock(&socket->skt_mutex); | 139 | EXPORT_SYMBOL(pcmcia_socket_dev_late_resume); |
131 | socket_resume(socket); | ||
132 | mutex_unlock(&socket->skt_mutex); | ||
133 | } | ||
134 | up_read(&pcmcia_socket_list_rwsem); | ||
135 | 140 | ||
141 | int pcmcia_socket_dev_resume(struct device *dev) | ||
142 | { | ||
143 | pcmcia_socket_dev_run(dev, socket_resume); | ||
136 | return 0; | 144 | return 0; |
137 | } | 145 | } |
138 | EXPORT_SYMBOL(pcmcia_socket_dev_resume); | 146 | EXPORT_SYMBOL(pcmcia_socket_dev_resume); |
@@ -546,29 +554,24 @@ static int socket_suspend(struct pcmcia_socket *skt) | |||
546 | return 0; | 554 | return 0; |
547 | } | 555 | } |
548 | 556 | ||
549 | /* | 557 | static int socket_early_resume(struct pcmcia_socket *skt) |
550 | * Resume a socket. If a card is present, verify its CIS against | ||
551 | * our cached copy. If they are different, the card has been | ||
552 | * replaced, and we need to tell the drivers. | ||
553 | */ | ||
554 | static int socket_resume(struct pcmcia_socket *skt) | ||
555 | { | 558 | { |
556 | int ret; | ||
557 | |||
558 | if (!(skt->state & SOCKET_SUSPEND)) | ||
559 | return -EBUSY; | ||
560 | |||
561 | skt->socket = dead_socket; | 559 | skt->socket = dead_socket; |
562 | skt->ops->init(skt); | 560 | skt->ops->init(skt); |
563 | skt->ops->set_socket(skt, &skt->socket); | 561 | skt->ops->set_socket(skt, &skt->socket); |
562 | if (skt->state & SOCKET_PRESENT) | ||
563 | skt->resume_status = socket_setup(skt, resume_delay); | ||
564 | return 0; | ||
565 | } | ||
564 | 566 | ||
567 | static int socket_late_resume(struct pcmcia_socket *skt) | ||
568 | { | ||
565 | if (!(skt->state & SOCKET_PRESENT)) { | 569 | if (!(skt->state & SOCKET_PRESENT)) { |
566 | skt->state &= ~SOCKET_SUSPEND; | 570 | skt->state &= ~SOCKET_SUSPEND; |
567 | return socket_insert(skt); | 571 | return socket_insert(skt); |
568 | } | 572 | } |
569 | 573 | ||
570 | ret = socket_setup(skt, resume_delay); | 574 | if (skt->resume_status == 0) { |
571 | if (ret == 0) { | ||
572 | /* | 575 | /* |
573 | * FIXME: need a better check here for cardbus cards. | 576 | * FIXME: need a better check here for cardbus cards. |
574 | */ | 577 | */ |
@@ -596,6 +599,20 @@ static int socket_resume(struct pcmcia_socket *skt) | |||
596 | return 0; | 599 | return 0; |
597 | } | 600 | } |
598 | 601 | ||
602 | /* | ||
603 | * Resume a socket. If a card is present, verify its CIS against | ||
604 | * our cached copy. If they are different, the card has been | ||
605 | * replaced, and we need to tell the drivers. | ||
606 | */ | ||
607 | static int socket_resume(struct pcmcia_socket *skt) | ||
608 | { | ||
609 | if (!(skt->state & SOCKET_SUSPEND)) | ||
610 | return -EBUSY; | ||
611 | |||
612 | socket_early_resume(skt); | ||
613 | return socket_late_resume(skt); | ||
614 | } | ||
615 | |||
599 | static void socket_remove(struct pcmcia_socket *skt) | 616 | static void socket_remove(struct pcmcia_socket *skt) |
600 | { | 617 | { |
601 | dev_printk(KERN_NOTICE, &skt->dev, | 618 | dev_printk(KERN_NOTICE, &skt->dev, |
diff --git a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c index abe0e44c6e9e..8be4cc447a17 100644 --- a/drivers/pcmcia/yenta_socket.c +++ b/drivers/pcmcia/yenta_socket.c | |||
@@ -1275,16 +1275,26 @@ static int yenta_dev_resume_noirq(struct device *dev) | |||
1275 | if (socket->type && socket->type->restore_state) | 1275 | if (socket->type && socket->type->restore_state) |
1276 | socket->type->restore_state(socket); | 1276 | socket->type->restore_state(socket); |
1277 | 1277 | ||
1278 | return pcmcia_socket_dev_resume(dev); | 1278 | pcmcia_socket_dev_early_resume(dev); |
1279 | return 0; | ||
1280 | } | ||
1281 | |||
1282 | static int yenta_dev_resume(struct device *dev) | ||
1283 | { | ||
1284 | pcmcia_socket_dev_late_resume(dev); | ||
1285 | return 0; | ||
1279 | } | 1286 | } |
1280 | 1287 | ||
1281 | static struct dev_pm_ops yenta_pm_ops = { | 1288 | static struct dev_pm_ops yenta_pm_ops = { |
1282 | .suspend_noirq = yenta_dev_suspend_noirq, | 1289 | .suspend_noirq = yenta_dev_suspend_noirq, |
1283 | .resume_noirq = yenta_dev_resume_noirq, | 1290 | .resume_noirq = yenta_dev_resume_noirq, |
1291 | .resume = yenta_dev_resume, | ||
1284 | .freeze_noirq = yenta_dev_suspend_noirq, | 1292 | .freeze_noirq = yenta_dev_suspend_noirq, |
1285 | .thaw_noirq = yenta_dev_resume_noirq, | 1293 | .thaw_noirq = yenta_dev_resume_noirq, |
1294 | .thaw = yenta_dev_resume, | ||
1286 | .poweroff_noirq = yenta_dev_suspend_noirq, | 1295 | .poweroff_noirq = yenta_dev_suspend_noirq, |
1287 | .restore_noirq = yenta_dev_resume_noirq, | 1296 | .restore_noirq = yenta_dev_resume_noirq, |
1297 | .restore = yenta_dev_resume, | ||
1288 | }; | 1298 | }; |
1289 | 1299 | ||
1290 | #define YENTA_PM_OPS (¥ta_pm_ops) | 1300 | #define YENTA_PM_OPS (¥ta_pm_ops) |
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c index ff4617e21426..7c7914f5fa02 100644 --- a/drivers/serial/serial_cs.c +++ b/drivers/serial/serial_cs.c | |||
@@ -879,10 +879,10 @@ static struct pcmcia_device_id serial_ids[] = { | |||
879 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"), | 879 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"), |
880 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), | 880 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), |
881 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), | 881 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), |
882 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ | 882 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ |
883 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0x0710, "SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ | 883 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ |
884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ | 884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ |
885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ | 885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ |
886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), | 886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), |
887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"), | 887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"), |
888 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), | 888 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), |
diff --git a/firmware/Makefile b/firmware/Makefile index a6c7c3e47e42..f4ca0c7eb51c 100644 --- a/firmware/Makefile +++ b/firmware/Makefile | |||
@@ -69,11 +69,13 @@ fw-shipped-$(CONFIG_E100) += e100/d101m_ucode.bin e100/d101s_ucode.bin \ | |||
69 | fw-shipped-$(CONFIG_MYRI_SBUS) += myricom/lanai.bin | 69 | fw-shipped-$(CONFIG_MYRI_SBUS) += myricom/lanai.bin |
70 | fw-shipped-$(CONFIG_PCMCIA_PCNET) += cis/LA-PCM.cis cis/PCMLM28.cis \ | 70 | fw-shipped-$(CONFIG_PCMCIA_PCNET) += cis/LA-PCM.cis cis/PCMLM28.cis \ |
71 | cis/DP83903.cis cis/NE2K.cis \ | 71 | cis/DP83903.cis cis/NE2K.cis \ |
72 | cis/tamarack.cis | 72 | cis/tamarack.cis cis/PE-200.cis |
73 | fw-shipped-$(CONFIG_PCMCIA_3C589) += cis/3CXEM556.cis | 73 | fw-shipped-$(CONFIG_PCMCIA_3C589) += cis/3CXEM556.cis |
74 | fw-shipped-$(CONFIG_PCMCIA_3C574) += cis/3CCFEM556.cis | 74 | fw-shipped-$(CONFIG_PCMCIA_3C574) += cis/3CCFEM556.cis |
75 | fw-shipped-$(CONFIG_SERIAL_8250_CS) += cis/MT5634ZLX.cis cis/RS-COM-2P.cis \ | 75 | fw-shipped-$(CONFIG_SERIAL_8250_CS) += cis/MT5634ZLX.cis cis/RS-COM-2P.cis \ |
76 | cis/COMpad2.cis cis/COMpad4.cis | 76 | cis/COMpad2.cis cis/COMpad4.cis \ |
77 | cis/SW_555_SER.cis cis/SW_7xx_SER.cis \ | ||
78 | cis/SW_8xx_SER.cis | ||
77 | fw-shipped-$(CONFIG_PCMCIA_SMC91C92) += ositech/Xilinx7OD.bin | 79 | fw-shipped-$(CONFIG_PCMCIA_SMC91C92) += ositech/Xilinx7OD.bin |
78 | fw-shipped-$(CONFIG_SCSI_ADVANSYS) += advansys/mcode.bin advansys/38C1600.bin \ | 80 | fw-shipped-$(CONFIG_SCSI_ADVANSYS) += advansys/mcode.bin advansys/38C1600.bin \ |
79 | advansys/3550.bin advansys/38C0800.bin | 81 | advansys/3550.bin advansys/38C0800.bin |
diff --git a/firmware/WHENCE b/firmware/WHENCE index c437e14f0b11..7a8adc06eb34 100644 --- a/firmware/WHENCE +++ b/firmware/WHENCE | |||
@@ -600,6 +600,7 @@ File: cis/LA-PCM.cis | |||
600 | cis/DP83903.cis | 600 | cis/DP83903.cis |
601 | cis/NE2K.cis | 601 | cis/NE2K.cis |
602 | cis/tamarack.cis | 602 | cis/tamarack.cis |
603 | cis/PE-200.cis | ||
603 | 604 | ||
604 | Licence: GPL | 605 | Licence: GPL |
605 | 606 | ||
@@ -633,6 +634,9 @@ File: cis/MT5634ZLX.cis | |||
633 | cis/RS-COM-2P.cis | 634 | cis/RS-COM-2P.cis |
634 | cis/COMpad2.cis | 635 | cis/COMpad2.cis |
635 | cis/COMpad4.cis | 636 | cis/COMpad4.cis |
637 | cis/SW_555_SER.cis | ||
638 | cis/SW_7xx_SER.cis | ||
639 | cis/SW_8xx_SER.cis | ||
636 | 640 | ||
637 | Licence: GPL | 641 | Licence: GPL |
638 | 642 | ||
diff --git a/firmware/cis/PE-200.cis.ihex b/firmware/cis/PE-200.cis.ihex new file mode 100644 index 000000000000..e6dbdab6eb79 --- /dev/null +++ b/firmware/cis/PE-200.cis.ihex | |||
@@ -0,0 +1,9 @@ | |||
1 | :1000000001030000FF151E0401504D582020200060 | ||
2 | :1000100050452D3230300045544845524E4554002D | ||
3 | :1000200052303100FF210206031A050101000101CF | ||
4 | :100030001B0EC181190155E051000F100F30FFFF59 | ||
5 | :040040001400FF00A9 | ||
6 | :00000001FF | ||
7 | # | ||
8 | # Replacement CIS for PE-200 ethernet card | ||
9 | # | ||
diff --git a/firmware/cis/SW_555_SER.cis.ihex b/firmware/cis/SW_555_SER.cis.ihex new file mode 100644 index 000000000000..9b9348acee7b --- /dev/null +++ b/firmware/cis/SW_555_SER.cis.ihex | |||
@@ -0,0 +1,12 @@ | |||
1 | :100000000101FF17034100FF20043F0110072102F7 | ||
2 | :100010000200152A070053696572726120576972E0 | ||
3 | :10002000656C657373004169724361726420353594 | ||
4 | :1000300035004135353500526576203100FF1A050F | ||
5 | :1000400001030007731B0BE00118A360F8030730DE | ||
6 | :10005000BC3F1B08A10108A360F802071B08A2010E | ||
7 | :1000600008A360E803071B08A30108A360E80207D0 | ||
8 | :0A0070001B04A40108231400FF0084 | ||
9 | :00000001FF | ||
10 | # | ||
11 | # Replacement CIS for AC555 provided by Sierra Wireless | ||
12 | # | ||
diff --git a/firmware/cis/SW_7xx_SER.cis.ihex b/firmware/cis/SW_7xx_SER.cis.ihex new file mode 100644 index 000000000000..11e44ad86437 --- /dev/null +++ b/firmware/cis/SW_7xx_SER.cis.ihex | |||
@@ -0,0 +1,13 @@ | |||
1 | :100000000101FF17034100FF2004920110072102A4 | ||
2 | :1000100002001537070053696572726120576972D3 | ||
3 | :10002000656C6573730041433731302F4143373579 | ||
4 | :10003000300047505253204E6574776F726B2041E9 | ||
5 | :1000400064617074657200523100FF1A050103008B | ||
6 | :1000500007731B10E00119784D555D25A360F80367 | ||
7 | :100060000730BC861B08A10108A360F802071B0823 | ||
8 | :10007000A20108A360E803071B08A30108A360E826 | ||
9 | :0C00800002071B04A40108231400FF0069 | ||
10 | :00000001FF | ||
11 | # | ||
12 | # Replacement CIS for AC7xx provided by Sierra Wireless | ||
13 | # | ||
diff --git a/firmware/cis/SW_8xx_SER.cis.ihex b/firmware/cis/SW_8xx_SER.cis.ihex new file mode 100644 index 000000000000..bbcfe6348328 --- /dev/null +++ b/firmware/cis/SW_8xx_SER.cis.ihex | |||
@@ -0,0 +1,13 @@ | |||
1 | :100000000101FF17034100FF2004920110072102A4 | ||
2 | :100010000200152F070053696572726120576972DB | ||
3 | :10002000656C657373004143383530003347204EAB | ||
4 | :100030006574776F726B20416461707465720052F1 | ||
5 | :100040003100FF1A0501030007731B10E001197846 | ||
6 | :100050004D555D25A360F8480730BC861B08A101FB | ||
7 | :1000600008A360F847071B08A20108A360E8480737 | ||
8 | :100070001B08A30108A360E847071B04A401082389 | ||
9 | :040080001400FF0069 | ||
10 | :00000001FF | ||
11 | # | ||
12 | # Replacement CIS for AC8xx provided by Sierra Wireless | ||
13 | # | ||
diff --git a/fs/9p/vfs_dir.c b/fs/9p/vfs_dir.c index 873cd31baa47..15cce53bf61e 100644 --- a/fs/9p/vfs_dir.c +++ b/fs/9p/vfs_dir.c | |||
@@ -40,6 +40,24 @@ | |||
40 | #include "fid.h" | 40 | #include "fid.h" |
41 | 41 | ||
42 | /** | 42 | /** |
43 | * struct p9_rdir - readdir accounting | ||
44 | * @mutex: mutex protecting readdir | ||
45 | * @head: start offset of current dirread buffer | ||
46 | * @tail: end offset of current dirread buffer | ||
47 | * @buf: dirread buffer | ||
48 | * | ||
49 | * private structure for keeping track of readdir | ||
50 | * allocated on demand | ||
51 | */ | ||
52 | |||
53 | struct p9_rdir { | ||
54 | struct mutex mutex; | ||
55 | int head; | ||
56 | int tail; | ||
57 | uint8_t *buf; | ||
58 | }; | ||
59 | |||
60 | /** | ||
43 | * dt_type - return file type | 61 | * dt_type - return file type |
44 | * @mistat: mistat structure | 62 | * @mistat: mistat structure |
45 | * | 63 | * |
@@ -70,56 +88,79 @@ static int v9fs_dir_readdir(struct file *filp, void *dirent, filldir_t filldir) | |||
70 | { | 88 | { |
71 | int over; | 89 | int over; |
72 | struct p9_wstat st; | 90 | struct p9_wstat st; |
73 | int err; | 91 | int err = 0; |
74 | struct p9_fid *fid; | 92 | struct p9_fid *fid; |
75 | int buflen; | 93 | int buflen; |
76 | char *statbuf; | 94 | int reclen = 0; |
77 | int n, i = 0; | 95 | struct p9_rdir *rdir; |
78 | 96 | ||
79 | P9_DPRINTK(P9_DEBUG_VFS, "name %s\n", filp->f_path.dentry->d_name.name); | 97 | P9_DPRINTK(P9_DEBUG_VFS, "name %s\n", filp->f_path.dentry->d_name.name); |
80 | fid = filp->private_data; | 98 | fid = filp->private_data; |
81 | 99 | ||
82 | buflen = fid->clnt->msize - P9_IOHDRSZ; | 100 | buflen = fid->clnt->msize - P9_IOHDRSZ; |
83 | statbuf = kmalloc(buflen, GFP_KERNEL); | 101 | |
84 | if (!statbuf) | 102 | /* allocate rdir on demand */ |
85 | return -ENOMEM; | 103 | if (!fid->rdir) { |
86 | 104 | rdir = kmalloc(sizeof(struct p9_rdir) + buflen, GFP_KERNEL); | |
87 | while (1) { | 105 | |
88 | err = v9fs_file_readn(filp, statbuf, NULL, buflen, | 106 | if (rdir == NULL) { |
89 | fid->rdir_fpos); | 107 | err = -ENOMEM; |
90 | if (err <= 0) | 108 | goto exit; |
91 | break; | 109 | } |
92 | 110 | spin_lock(&filp->f_dentry->d_lock); | |
93 | n = err; | 111 | if (!fid->rdir) { |
94 | while (i < n) { | 112 | rdir->buf = (uint8_t *)rdir + sizeof(struct p9_rdir); |
95 | err = p9stat_read(statbuf + i, buflen-i, &st, | 113 | mutex_init(&rdir->mutex); |
96 | fid->clnt->dotu); | 114 | rdir->head = rdir->tail = 0; |
115 | fid->rdir = (void *) rdir; | ||
116 | rdir = NULL; | ||
117 | } | ||
118 | spin_unlock(&filp->f_dentry->d_lock); | ||
119 | kfree(rdir); | ||
120 | } | ||
121 | rdir = (struct p9_rdir *) fid->rdir; | ||
122 | |||
123 | err = mutex_lock_interruptible(&rdir->mutex); | ||
124 | while (err == 0) { | ||
125 | if (rdir->tail == rdir->head) { | ||
126 | err = v9fs_file_readn(filp, rdir->buf, NULL, | ||
127 | buflen, filp->f_pos); | ||
128 | if (err <= 0) | ||
129 | goto unlock_and_exit; | ||
130 | |||
131 | rdir->head = 0; | ||
132 | rdir->tail = err; | ||
133 | } | ||
134 | |||
135 | while (rdir->head < rdir->tail) { | ||
136 | err = p9stat_read(rdir->buf + rdir->head, | ||
137 | buflen - rdir->head, &st, | ||
138 | fid->clnt->dotu); | ||
97 | if (err) { | 139 | if (err) { |
98 | P9_DPRINTK(P9_DEBUG_VFS, "returned %d\n", err); | 140 | P9_DPRINTK(P9_DEBUG_VFS, "returned %d\n", err); |
99 | err = -EIO; | 141 | err = -EIO; |
100 | p9stat_free(&st); | 142 | p9stat_free(&st); |
101 | goto free_and_exit; | 143 | goto unlock_and_exit; |
102 | } | 144 | } |
103 | 145 | reclen = st.size+2; | |
104 | i += st.size+2; | ||
105 | fid->rdir_fpos += st.size+2; | ||
106 | 146 | ||
107 | over = filldir(dirent, st.name, strlen(st.name), | 147 | over = filldir(dirent, st.name, strlen(st.name), |
108 | filp->f_pos, v9fs_qid2ino(&st.qid), dt_type(&st)); | 148 | filp->f_pos, v9fs_qid2ino(&st.qid), dt_type(&st)); |
109 | 149 | ||
110 | filp->f_pos += st.size+2; | ||
111 | |||
112 | p9stat_free(&st); | 150 | p9stat_free(&st); |
113 | 151 | ||
114 | if (over) { | 152 | if (over) { |
115 | err = 0; | 153 | err = 0; |
116 | goto free_and_exit; | 154 | goto unlock_and_exit; |
117 | } | 155 | } |
156 | rdir->head += reclen; | ||
157 | filp->f_pos += reclen; | ||
118 | } | 158 | } |
119 | } | 159 | } |
120 | 160 | ||
121 | free_and_exit: | 161 | unlock_and_exit: |
122 | kfree(statbuf); | 162 | mutex_unlock(&rdir->mutex); |
163 | exit: | ||
123 | return err; | 164 | return err; |
124 | } | 165 | } |
125 | 166 | ||
diff --git a/fs/9p/vfs_inode.c b/fs/9p/vfs_inode.c index 5947628aefef..18f74ec4dce9 100644 --- a/fs/9p/vfs_inode.c +++ b/fs/9p/vfs_inode.c | |||
@@ -994,8 +994,7 @@ static int v9fs_readlink(struct dentry *dentry, char *buffer, int buflen) | |||
994 | P9_DPRINTK(P9_DEBUG_VFS, | 994 | P9_DPRINTK(P9_DEBUG_VFS, |
995 | "%s -> %s (%s)\n", dentry->d_name.name, st->extension, buffer); | 995 | "%s -> %s (%s)\n", dentry->d_name.name, st->extension, buffer); |
996 | 996 | ||
997 | retval = buflen; | 997 | retval = strnlen(buffer, buflen); |
998 | |||
999 | done: | 998 | done: |
1000 | kfree(st); | 999 | kfree(st); |
1001 | return retval; | 1000 | return retval; |
@@ -1062,7 +1061,7 @@ static void *v9fs_vfs_follow_link(struct dentry *dentry, struct nameidata *nd) | |||
1062 | __putname(link); | 1061 | __putname(link); |
1063 | link = ERR_PTR(len); | 1062 | link = ERR_PTR(len); |
1064 | } else | 1063 | } else |
1065 | link[len] = 0; | 1064 | link[min(len, PATH_MAX-1)] = 0; |
1066 | } | 1065 | } |
1067 | nd_set_link(nd, link); | 1066 | nd_set_link(nd, link); |
1068 | 1067 | ||
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index 984ca0cb38c3..00d153f2f261 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h | |||
@@ -743,6 +743,7 @@ struct ext4_inode_info { | |||
743 | #define EXT4_MOUNT_QUOTA 0x80000 /* Some quota option set */ | 743 | #define EXT4_MOUNT_QUOTA 0x80000 /* Some quota option set */ |
744 | #define EXT4_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ | 744 | #define EXT4_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ |
745 | #define EXT4_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ | 745 | #define EXT4_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ |
746 | #define EXT4_MOUNT_JOURNAL_CHECKSUM 0x800000 /* Journal checksums */ | ||
746 | #define EXT4_MOUNT_JOURNAL_ASYNC_COMMIT 0x1000000 /* Journal Async Commit */ | 747 | #define EXT4_MOUNT_JOURNAL_ASYNC_COMMIT 0x1000000 /* Journal Async Commit */ |
747 | #define EXT4_MOUNT_I_VERSION 0x2000000 /* i_version support */ | 748 | #define EXT4_MOUNT_I_VERSION 0x2000000 /* i_version support */ |
748 | #define EXT4_MOUNT_DELALLOC 0x8000000 /* Delalloc support */ | 749 | #define EXT4_MOUNT_DELALLOC 0x8000000 /* Delalloc support */ |
diff --git a/fs/ext4/super.c b/fs/ext4/super.c index 312211ee05af..d4ca92aab514 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c | |||
@@ -1300,9 +1300,11 @@ static int parse_options(char *options, struct super_block *sb, | |||
1300 | *journal_devnum = option; | 1300 | *journal_devnum = option; |
1301 | break; | 1301 | break; |
1302 | case Opt_journal_checksum: | 1302 | case Opt_journal_checksum: |
1303 | break; /* Kept for backwards compatibility */ | 1303 | set_opt(sbi->s_mount_opt, JOURNAL_CHECKSUM); |
1304 | break; | ||
1304 | case Opt_journal_async_commit: | 1305 | case Opt_journal_async_commit: |
1305 | set_opt(sbi->s_mount_opt, JOURNAL_ASYNC_COMMIT); | 1306 | set_opt(sbi->s_mount_opt, JOURNAL_ASYNC_COMMIT); |
1307 | set_opt(sbi->s_mount_opt, JOURNAL_CHECKSUM); | ||
1306 | break; | 1308 | break; |
1307 | case Opt_noload: | 1309 | case Opt_noload: |
1308 | set_opt(sbi->s_mount_opt, NOLOAD); | 1310 | set_opt(sbi->s_mount_opt, NOLOAD); |
@@ -2759,14 +2761,20 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
2759 | goto failed_mount4; | 2761 | goto failed_mount4; |
2760 | } | 2762 | } |
2761 | 2763 | ||
2762 | jbd2_journal_set_features(sbi->s_journal, | 2764 | if (test_opt(sb, JOURNAL_ASYNC_COMMIT)) { |
2763 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, 0); | 2765 | jbd2_journal_set_features(sbi->s_journal, |
2764 | if (test_opt(sb, JOURNAL_ASYNC_COMMIT)) | 2766 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, |
2765 | jbd2_journal_set_features(sbi->s_journal, 0, 0, | ||
2766 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | 2767 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); |
2767 | else | 2768 | } else if (test_opt(sb, JOURNAL_CHECKSUM)) { |
2769 | jbd2_journal_set_features(sbi->s_journal, | ||
2770 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, 0); | ||
2768 | jbd2_journal_clear_features(sbi->s_journal, 0, 0, | 2771 | jbd2_journal_clear_features(sbi->s_journal, 0, 0, |
2769 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | 2772 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); |
2773 | } else { | ||
2774 | jbd2_journal_clear_features(sbi->s_journal, | ||
2775 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, | ||
2776 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | ||
2777 | } | ||
2770 | 2778 | ||
2771 | /* We have now updated the journal if required, so we can | 2779 | /* We have now updated the journal if required, so we can |
2772 | * validate the data journaling mode. */ | 2780 | * validate the data journaling mode. */ |
diff --git a/fs/nilfs2/btnode.c b/fs/nilfs2/btnode.c index 5941958f1e47..84c25382f8e3 100644 --- a/fs/nilfs2/btnode.c +++ b/fs/nilfs2/btnode.c | |||
@@ -87,6 +87,7 @@ int nilfs_btnode_submit_block(struct address_space *btnc, __u64 blocknr, | |||
87 | brelse(bh); | 87 | brelse(bh); |
88 | BUG(); | 88 | BUG(); |
89 | } | 89 | } |
90 | memset(bh->b_data, 0, 1 << inode->i_blkbits); | ||
90 | bh->b_bdev = NILFS_I_NILFS(inode)->ns_bdev; | 91 | bh->b_bdev = NILFS_I_NILFS(inode)->ns_bdev; |
91 | bh->b_blocknr = blocknr; | 92 | bh->b_blocknr = blocknr; |
92 | set_buffer_mapped(bh); | 93 | set_buffer_mapped(bh); |
@@ -276,8 +277,7 @@ void nilfs_btnode_commit_change_key(struct address_space *btnc, | |||
276 | "invalid oldkey %lld (newkey=%lld)", | 277 | "invalid oldkey %lld (newkey=%lld)", |
277 | (unsigned long long)oldkey, | 278 | (unsigned long long)oldkey, |
278 | (unsigned long long)newkey); | 279 | (unsigned long long)newkey); |
279 | if (!test_set_buffer_dirty(obh) && TestSetPageDirty(opage)) | 280 | nilfs_btnode_mark_dirty(obh); |
280 | BUG(); | ||
281 | 281 | ||
282 | spin_lock_irq(&btnc->tree_lock); | 282 | spin_lock_irq(&btnc->tree_lock); |
283 | radix_tree_delete(&btnc->page_tree, oldkey); | 283 | radix_tree_delete(&btnc->page_tree, oldkey); |
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c index 683df89dbae5..6eff66a070d5 100644 --- a/fs/nilfs2/segment.c +++ b/fs/nilfs2/segment.c | |||
@@ -2468,17 +2468,22 @@ static void nilfs_segctor_notify(struct nilfs_sc_info *sci, | |||
2468 | /* Clear requests (even when the construction failed) */ | 2468 | /* Clear requests (even when the construction failed) */ |
2469 | spin_lock(&sci->sc_state_lock); | 2469 | spin_lock(&sci->sc_state_lock); |
2470 | 2470 | ||
2471 | sci->sc_state &= ~NILFS_SEGCTOR_COMMIT; | ||
2472 | |||
2473 | if (req->mode == SC_LSEG_SR) { | 2471 | if (req->mode == SC_LSEG_SR) { |
2472 | sci->sc_state &= ~NILFS_SEGCTOR_COMMIT; | ||
2474 | sci->sc_seq_done = req->seq_accepted; | 2473 | sci->sc_seq_done = req->seq_accepted; |
2475 | nilfs_segctor_wakeup(sci, req->sc_err ? : req->sb_err); | 2474 | nilfs_segctor_wakeup(sci, req->sc_err ? : req->sb_err); |
2476 | sci->sc_flush_request = 0; | 2475 | sci->sc_flush_request = 0; |
2477 | } else if (req->mode == SC_FLUSH_FILE) | 2476 | } else { |
2478 | sci->sc_flush_request &= ~FLUSH_FILE_BIT; | 2477 | if (req->mode == SC_FLUSH_FILE) |
2479 | else if (req->mode == SC_FLUSH_DAT) | 2478 | sci->sc_flush_request &= ~FLUSH_FILE_BIT; |
2480 | sci->sc_flush_request &= ~FLUSH_DAT_BIT; | 2479 | else if (req->mode == SC_FLUSH_DAT) |
2480 | sci->sc_flush_request &= ~FLUSH_DAT_BIT; | ||
2481 | 2481 | ||
2482 | /* re-enable timer if checkpoint creation was not done */ | ||
2483 | if (sci->sc_timer && (sci->sc_state & NILFS_SEGCTOR_COMMIT) && | ||
2484 | time_before(jiffies, sci->sc_timer->expires)) | ||
2485 | add_timer(sci->sc_timer); | ||
2486 | } | ||
2482 | spin_unlock(&sci->sc_state_lock); | 2487 | spin_unlock(&sci->sc_state_lock); |
2483 | } | 2488 | } |
2484 | 2489 | ||
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 2e6d95f97419..9e7012689a84 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h | |||
@@ -471,8 +471,8 @@ struct hw_perf_event { | |||
471 | unsigned long event_base; | 471 | unsigned long event_base; |
472 | int idx; | 472 | int idx; |
473 | }; | 473 | }; |
474 | union { /* software */ | 474 | struct { /* software */ |
475 | atomic64_t count; | 475 | s64 remaining; |
476 | struct hrtimer hrtimer; | 476 | struct hrtimer hrtimer; |
477 | }; | 477 | }; |
478 | }; | 478 | }; |
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index df7b23ac66e6..bcdd6606f468 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h | |||
@@ -354,8 +354,8 @@ struct sk_buff { | |||
354 | ipvs_property:1, | 354 | ipvs_property:1, |
355 | peeked:1, | 355 | peeked:1, |
356 | nf_trace:1; | 356 | nf_trace:1; |
357 | __be16 protocol:16; | ||
357 | kmemcheck_bitfield_end(flags1); | 358 | kmemcheck_bitfield_end(flags1); |
358 | __be16 protocol; | ||
359 | 359 | ||
360 | void (*destructor)(struct sk_buff *skb); | 360 | void (*destructor)(struct sk_buff *skb); |
361 | #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) | 361 | #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) |
@@ -367,7 +367,6 @@ struct sk_buff { | |||
367 | #endif | 367 | #endif |
368 | 368 | ||
369 | int iif; | 369 | int iif; |
370 | __u16 queue_mapping; | ||
371 | #ifdef CONFIG_NET_SCHED | 370 | #ifdef CONFIG_NET_SCHED |
372 | __u16 tc_index; /* traffic control index */ | 371 | __u16 tc_index; /* traffic control index */ |
373 | #ifdef CONFIG_NET_CLS_ACT | 372 | #ifdef CONFIG_NET_CLS_ACT |
@@ -376,6 +375,7 @@ struct sk_buff { | |||
376 | #endif | 375 | #endif |
377 | 376 | ||
378 | kmemcheck_bitfield_begin(flags2); | 377 | kmemcheck_bitfield_begin(flags2); |
378 | __u16 queue_mapping:16; | ||
379 | #ifdef CONFIG_IPV6_NDISC_NODETYPE | 379 | #ifdef CONFIG_IPV6_NDISC_NODETYPE |
380 | __u8 ndisc_nodetype:2; | 380 | __u8 ndisc_nodetype:2; |
381 | #endif | 381 | #endif |
@@ -1757,6 +1757,8 @@ extern int skb_copy_datagram_const_iovec(const struct sk_buff *from, | |||
1757 | int to_offset, | 1757 | int to_offset, |
1758 | int size); | 1758 | int size); |
1759 | extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); | 1759 | extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); |
1760 | extern void skb_free_datagram_locked(struct sock *sk, | ||
1761 | struct sk_buff *skb); | ||
1760 | extern int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, | 1762 | extern int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, |
1761 | unsigned int flags); | 1763 | unsigned int flags); |
1762 | extern __wsum skb_checksum(const struct sk_buff *skb, int offset, | 1764 | extern __wsum skb_checksum(const struct sk_buff *skb, int offset, |
diff --git a/include/linux/trace_seq.h b/include/linux/trace_seq.h index c134dd1fe6b6..09077f6ed128 100644 --- a/include/linux/trace_seq.h +++ b/include/linux/trace_seq.h | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | /* | 8 | /* |
9 | * Trace sequences are used to allow a function to call several other functions | 9 | * Trace sequences are used to allow a function to call several other functions |
10 | * to create a string of data to use (up to a max of PAGE_SIZE. | 10 | * to create a string of data to use (up to a max of PAGE_SIZE). |
11 | */ | 11 | */ |
12 | 12 | ||
13 | struct trace_seq { | 13 | struct trace_seq { |
diff --git a/include/net/9p/client.h b/include/net/9p/client.h index e26812274b75..fb00b329f0d3 100644 --- a/include/net/9p/client.h +++ b/include/net/9p/client.h | |||
@@ -159,8 +159,7 @@ struct p9_client { | |||
159 | * @qid: the &p9_qid server identifier this handle points to | 159 | * @qid: the &p9_qid server identifier this handle points to |
160 | * @iounit: the server reported maximum transaction size for this file | 160 | * @iounit: the server reported maximum transaction size for this file |
161 | * @uid: the numeric uid of the local user who owns this handle | 161 | * @uid: the numeric uid of the local user who owns this handle |
162 | * @aux: transport specific information (unused?) | 162 | * @rdir: readdir accounting structure (allocated on demand) |
163 | * @rdir_fpos: tracks offset of file position when reading directory contents | ||
164 | * @flist: per-client-instance fid tracking | 163 | * @flist: per-client-instance fid tracking |
165 | * @dlist: per-dentry fid tracking | 164 | * @dlist: per-dentry fid tracking |
166 | * | 165 | * |
@@ -174,9 +173,9 @@ struct p9_fid { | |||
174 | struct p9_qid qid; | 173 | struct p9_qid qid; |
175 | u32 iounit; | 174 | u32 iounit; |
176 | uid_t uid; | 175 | uid_t uid; |
177 | void *aux; | ||
178 | 176 | ||
179 | int rdir_fpos; | 177 | void *rdir; |
178 | |||
180 | struct list_head flist; | 179 | struct list_head flist; |
181 | struct list_head dlist; /* list of all fids attached to a dentry */ | 180 | struct list_head dlist; /* list of all fids attached to a dentry */ |
182 | }; | 181 | }; |
diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h index ef91fe924ba4..4d22fabc7719 100644 --- a/include/net/ip_fib.h +++ b/include/net/ip_fib.h | |||
@@ -210,7 +210,8 @@ extern struct fib_table *fib_get_table(struct net *net, u32 id); | |||
210 | extern const struct nla_policy rtm_ipv4_policy[]; | 210 | extern const struct nla_policy rtm_ipv4_policy[]; |
211 | extern void ip_fib_init(void); | 211 | extern void ip_fib_init(void); |
212 | extern int fib_validate_source(__be32 src, __be32 dst, u8 tos, int oif, | 212 | extern int fib_validate_source(__be32 src, __be32 dst, u8 tos, int oif, |
213 | struct net_device *dev, __be32 *spec_dst, u32 *itag); | 213 | struct net_device *dev, __be32 *spec_dst, |
214 | u32 *itag, u32 mark); | ||
214 | extern void fib_select_default(struct net *net, const struct flowi *flp, | 215 | extern void fib_select_default(struct net *net, const struct flowi *flp, |
215 | struct fib_result *res); | 216 | struct fib_result *res); |
216 | 217 | ||
diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h index d696a692d94a..e0f6feb8588c 100644 --- a/include/pcmcia/ss.h +++ b/include/pcmcia/ss.h | |||
@@ -262,6 +262,8 @@ struct pcmcia_socket { | |||
262 | struct device dev; | 262 | struct device dev; |
263 | /* data internal to the socket driver */ | 263 | /* data internal to the socket driver */ |
264 | void *driver_data; | 264 | void *driver_data; |
265 | /* status of the card during resume from a system sleep state */ | ||
266 | int resume_status; | ||
265 | }; | 267 | }; |
266 | 268 | ||
267 | 269 | ||
@@ -280,6 +282,8 @@ extern struct pccard_resource_ops pccard_nonstatic_ops; | |||
280 | 282 | ||
281 | /* socket drivers are expected to use these callbacks in their .drv struct */ | 283 | /* socket drivers are expected to use these callbacks in their .drv struct */ |
282 | extern int pcmcia_socket_dev_suspend(struct device *dev); | 284 | extern int pcmcia_socket_dev_suspend(struct device *dev); |
285 | extern void pcmcia_socket_dev_early_resume(struct device *dev); | ||
286 | extern void pcmcia_socket_dev_late_resume(struct device *dev); | ||
283 | extern int pcmcia_socket_dev_resume(struct device *dev); | 287 | extern int pcmcia_socket_dev_resume(struct device *dev); |
284 | 288 | ||
285 | /* socket drivers use this callback in their IRQ handler */ | 289 | /* socket drivers use this callback in their IRQ handler */ |
diff --git a/kernel/fork.c b/kernel/fork.c index 4c20fff8c13a..166b8c49257c 100644 --- a/kernel/fork.c +++ b/kernel/fork.c | |||
@@ -91,7 +91,7 @@ int nr_processes(void) | |||
91 | int cpu; | 91 | int cpu; |
92 | int total = 0; | 92 | int total = 0; |
93 | 93 | ||
94 | for_each_online_cpu(cpu) | 94 | for_each_possible_cpu(cpu) |
95 | total += per_cpu(process_counts, cpu); | 95 | total += per_cpu(process_counts, cpu); |
96 | 96 | ||
97 | return total; | 97 | return total; |
diff --git a/kernel/futex.c b/kernel/futex.c index 642f3bbaacc7..fb65e822fc41 100644 --- a/kernel/futex.c +++ b/kernel/futex.c | |||
@@ -2127,7 +2127,7 @@ int handle_early_requeue_pi_wakeup(struct futex_hash_bucket *hb, | |||
2127 | plist_del(&q->list, &q->list.plist); | 2127 | plist_del(&q->list, &q->list.plist); |
2128 | 2128 | ||
2129 | /* Handle spurious wakeups gracefully */ | 2129 | /* Handle spurious wakeups gracefully */ |
2130 | ret = -EAGAIN; | 2130 | ret = -EWOULDBLOCK; |
2131 | if (timeout && !timeout->task) | 2131 | if (timeout && !timeout->task) |
2132 | ret = -ETIMEDOUT; | 2132 | ret = -ETIMEDOUT; |
2133 | else if (signal_pending(current)) | 2133 | else if (signal_pending(current)) |
@@ -2208,7 +2208,6 @@ static int futex_wait_requeue_pi(u32 __user *uaddr, int fshared, | |||
2208 | debug_rt_mutex_init_waiter(&rt_waiter); | 2208 | debug_rt_mutex_init_waiter(&rt_waiter); |
2209 | rt_waiter.task = NULL; | 2209 | rt_waiter.task = NULL; |
2210 | 2210 | ||
2211 | retry: | ||
2212 | key2 = FUTEX_KEY_INIT; | 2211 | key2 = FUTEX_KEY_INIT; |
2213 | ret = get_futex_key(uaddr2, fshared, &key2, VERIFY_WRITE); | 2212 | ret = get_futex_key(uaddr2, fshared, &key2, VERIFY_WRITE); |
2214 | if (unlikely(ret != 0)) | 2213 | if (unlikely(ret != 0)) |
@@ -2303,9 +2302,6 @@ out_put_keys: | |||
2303 | out_key2: | 2302 | out_key2: |
2304 | put_futex_key(fshared, &key2); | 2303 | put_futex_key(fshared, &key2); |
2305 | 2304 | ||
2306 | /* Spurious wakeup ? */ | ||
2307 | if (ret == -EAGAIN) | ||
2308 | goto retry; | ||
2309 | out: | 2305 | out: |
2310 | if (to) { | 2306 | if (to) { |
2311 | hrtimer_cancel(&to->timer); | 2307 | hrtimer_cancel(&to->timer); |
diff --git a/kernel/perf_event.c b/kernel/perf_event.c index afb7ef3dbc44..7f29643c8985 100644 --- a/kernel/perf_event.c +++ b/kernel/perf_event.c | |||
@@ -3959,8 +3959,9 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer) | |||
3959 | regs = task_pt_regs(current); | 3959 | regs = task_pt_regs(current); |
3960 | 3960 | ||
3961 | if (regs) { | 3961 | if (regs) { |
3962 | if (perf_event_overflow(event, 0, &data, regs)) | 3962 | if (!(event->attr.exclude_idle && current->pid == 0)) |
3963 | ret = HRTIMER_NORESTART; | 3963 | if (perf_event_overflow(event, 0, &data, regs)) |
3964 | ret = HRTIMER_NORESTART; | ||
3964 | } | 3965 | } |
3965 | 3966 | ||
3966 | period = max_t(u64, 10000, event->hw.sample_period); | 3967 | period = max_t(u64, 10000, event->hw.sample_period); |
@@ -3969,6 +3970,42 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer) | |||
3969 | return ret; | 3970 | return ret; |
3970 | } | 3971 | } |
3971 | 3972 | ||
3973 | static void perf_swevent_start_hrtimer(struct perf_event *event) | ||
3974 | { | ||
3975 | struct hw_perf_event *hwc = &event->hw; | ||
3976 | |||
3977 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | ||
3978 | hwc->hrtimer.function = perf_swevent_hrtimer; | ||
3979 | if (hwc->sample_period) { | ||
3980 | u64 period; | ||
3981 | |||
3982 | if (hwc->remaining) { | ||
3983 | if (hwc->remaining < 0) | ||
3984 | period = 10000; | ||
3985 | else | ||
3986 | period = hwc->remaining; | ||
3987 | hwc->remaining = 0; | ||
3988 | } else { | ||
3989 | period = max_t(u64, 10000, hwc->sample_period); | ||
3990 | } | ||
3991 | __hrtimer_start_range_ns(&hwc->hrtimer, | ||
3992 | ns_to_ktime(period), 0, | ||
3993 | HRTIMER_MODE_REL, 0); | ||
3994 | } | ||
3995 | } | ||
3996 | |||
3997 | static void perf_swevent_cancel_hrtimer(struct perf_event *event) | ||
3998 | { | ||
3999 | struct hw_perf_event *hwc = &event->hw; | ||
4000 | |||
4001 | if (hwc->sample_period) { | ||
4002 | ktime_t remaining = hrtimer_get_remaining(&hwc->hrtimer); | ||
4003 | hwc->remaining = ktime_to_ns(remaining); | ||
4004 | |||
4005 | hrtimer_cancel(&hwc->hrtimer); | ||
4006 | } | ||
4007 | } | ||
4008 | |||
3972 | /* | 4009 | /* |
3973 | * Software event: cpu wall time clock | 4010 | * Software event: cpu wall time clock |
3974 | */ | 4011 | */ |
@@ -3991,22 +4028,14 @@ static int cpu_clock_perf_event_enable(struct perf_event *event) | |||
3991 | int cpu = raw_smp_processor_id(); | 4028 | int cpu = raw_smp_processor_id(); |
3992 | 4029 | ||
3993 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | 4030 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); |
3994 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | 4031 | perf_swevent_start_hrtimer(event); |
3995 | hwc->hrtimer.function = perf_swevent_hrtimer; | ||
3996 | if (hwc->sample_period) { | ||
3997 | u64 period = max_t(u64, 10000, hwc->sample_period); | ||
3998 | __hrtimer_start_range_ns(&hwc->hrtimer, | ||
3999 | ns_to_ktime(period), 0, | ||
4000 | HRTIMER_MODE_REL, 0); | ||
4001 | } | ||
4002 | 4032 | ||
4003 | return 0; | 4033 | return 0; |
4004 | } | 4034 | } |
4005 | 4035 | ||
4006 | static void cpu_clock_perf_event_disable(struct perf_event *event) | 4036 | static void cpu_clock_perf_event_disable(struct perf_event *event) |
4007 | { | 4037 | { |
4008 | if (event->hw.sample_period) | 4038 | perf_swevent_cancel_hrtimer(event); |
4009 | hrtimer_cancel(&event->hw.hrtimer); | ||
4010 | cpu_clock_perf_event_update(event); | 4039 | cpu_clock_perf_event_update(event); |
4011 | } | 4040 | } |
4012 | 4041 | ||
@@ -4043,22 +4072,15 @@ static int task_clock_perf_event_enable(struct perf_event *event) | |||
4043 | now = event->ctx->time; | 4072 | now = event->ctx->time; |
4044 | 4073 | ||
4045 | atomic64_set(&hwc->prev_count, now); | 4074 | atomic64_set(&hwc->prev_count, now); |
4046 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | 4075 | |
4047 | hwc->hrtimer.function = perf_swevent_hrtimer; | 4076 | perf_swevent_start_hrtimer(event); |
4048 | if (hwc->sample_period) { | ||
4049 | u64 period = max_t(u64, 10000, hwc->sample_period); | ||
4050 | __hrtimer_start_range_ns(&hwc->hrtimer, | ||
4051 | ns_to_ktime(period), 0, | ||
4052 | HRTIMER_MODE_REL, 0); | ||
4053 | } | ||
4054 | 4077 | ||
4055 | return 0; | 4078 | return 0; |
4056 | } | 4079 | } |
4057 | 4080 | ||
4058 | static void task_clock_perf_event_disable(struct perf_event *event) | 4081 | static void task_clock_perf_event_disable(struct perf_event *event) |
4059 | { | 4082 | { |
4060 | if (event->hw.sample_period) | 4083 | perf_swevent_cancel_hrtimer(event); |
4061 | hrtimer_cancel(&event->hw.hrtimer); | ||
4062 | task_clock_perf_event_update(event, event->ctx->time); | 4084 | task_clock_perf_event_update(event, event->ctx->time); |
4063 | 4085 | ||
4064 | } | 4086 | } |
diff --git a/kernel/power/hibernate.c b/kernel/power/hibernate.c index 04b3a83d686f..04a9e90d248f 100644 --- a/kernel/power/hibernate.c +++ b/kernel/power/hibernate.c | |||
@@ -693,21 +693,22 @@ static int software_resume(void) | |||
693 | /* The snapshot device should not be opened while we're running */ | 693 | /* The snapshot device should not be opened while we're running */ |
694 | if (!atomic_add_unless(&snapshot_device_available, -1, 0)) { | 694 | if (!atomic_add_unless(&snapshot_device_available, -1, 0)) { |
695 | error = -EBUSY; | 695 | error = -EBUSY; |
696 | swsusp_close(FMODE_READ); | ||
696 | goto Unlock; | 697 | goto Unlock; |
697 | } | 698 | } |
698 | 699 | ||
699 | pm_prepare_console(); | 700 | pm_prepare_console(); |
700 | error = pm_notifier_call_chain(PM_RESTORE_PREPARE); | 701 | error = pm_notifier_call_chain(PM_RESTORE_PREPARE); |
701 | if (error) | 702 | if (error) |
702 | goto Finish; | 703 | goto close_finish; |
703 | 704 | ||
704 | error = usermodehelper_disable(); | 705 | error = usermodehelper_disable(); |
705 | if (error) | 706 | if (error) |
706 | goto Finish; | 707 | goto close_finish; |
707 | 708 | ||
708 | error = create_basic_memory_bitmaps(); | 709 | error = create_basic_memory_bitmaps(); |
709 | if (error) | 710 | if (error) |
710 | goto Finish; | 711 | goto close_finish; |
711 | 712 | ||
712 | pr_debug("PM: Preparing processes for restore.\n"); | 713 | pr_debug("PM: Preparing processes for restore.\n"); |
713 | error = prepare_processes(); | 714 | error = prepare_processes(); |
@@ -719,6 +720,7 @@ static int software_resume(void) | |||
719 | pr_debug("PM: Reading hibernation image.\n"); | 720 | pr_debug("PM: Reading hibernation image.\n"); |
720 | 721 | ||
721 | error = swsusp_read(&flags); | 722 | error = swsusp_read(&flags); |
723 | swsusp_close(FMODE_READ); | ||
722 | if (!error) | 724 | if (!error) |
723 | hibernation_restore(flags & SF_PLATFORM_MODE); | 725 | hibernation_restore(flags & SF_PLATFORM_MODE); |
724 | 726 | ||
@@ -737,6 +739,9 @@ static int software_resume(void) | |||
737 | mutex_unlock(&pm_mutex); | 739 | mutex_unlock(&pm_mutex); |
738 | pr_debug("PM: Resume from disk failed.\n"); | 740 | pr_debug("PM: Resume from disk failed.\n"); |
739 | return error; | 741 | return error; |
742 | close_finish: | ||
743 | swsusp_close(FMODE_READ); | ||
744 | goto Finish; | ||
740 | } | 745 | } |
741 | 746 | ||
742 | late_initcall(software_resume); | 747 | late_initcall(software_resume); |
diff --git a/kernel/power/swap.c b/kernel/power/swap.c index b101cdc4df3f..890f6b11b1d3 100644 --- a/kernel/power/swap.c +++ b/kernel/power/swap.c | |||
@@ -314,7 +314,6 @@ static int save_image(struct swap_map_handle *handle, | |||
314 | { | 314 | { |
315 | unsigned int m; | 315 | unsigned int m; |
316 | int ret; | 316 | int ret; |
317 | int error = 0; | ||
318 | int nr_pages; | 317 | int nr_pages; |
319 | int err2; | 318 | int err2; |
320 | struct bio *bio; | 319 | struct bio *bio; |
@@ -329,26 +328,27 @@ static int save_image(struct swap_map_handle *handle, | |||
329 | nr_pages = 0; | 328 | nr_pages = 0; |
330 | bio = NULL; | 329 | bio = NULL; |
331 | do_gettimeofday(&start); | 330 | do_gettimeofday(&start); |
332 | do { | 331 | while (1) { |
333 | ret = snapshot_read_next(snapshot, PAGE_SIZE); | 332 | ret = snapshot_read_next(snapshot, PAGE_SIZE); |
334 | if (ret > 0) { | 333 | if (ret <= 0) |
335 | error = swap_write_page(handle, data_of(*snapshot), | 334 | break; |
336 | &bio); | 335 | ret = swap_write_page(handle, data_of(*snapshot), &bio); |
337 | if (error) | 336 | if (ret) |
338 | break; | 337 | break; |
339 | if (!(nr_pages % m)) | 338 | if (!(nr_pages % m)) |
340 | printk("\b\b\b\b%3d%%", nr_pages / m); | 339 | printk("\b\b\b\b%3d%%", nr_pages / m); |
341 | nr_pages++; | 340 | nr_pages++; |
342 | } | 341 | } |
343 | } while (ret > 0); | ||
344 | err2 = wait_on_bio_chain(&bio); | 342 | err2 = wait_on_bio_chain(&bio); |
345 | do_gettimeofday(&stop); | 343 | do_gettimeofday(&stop); |
346 | if (!error) | 344 | if (!ret) |
347 | error = err2; | 345 | ret = err2; |
348 | if (!error) | 346 | if (!ret) |
349 | printk("\b\b\b\bdone\n"); | 347 | printk("\b\b\b\bdone\n"); |
348 | else | ||
349 | printk("\n"); | ||
350 | swsusp_show_speed(&start, &stop, nr_to_write, "Wrote"); | 350 | swsusp_show_speed(&start, &stop, nr_to_write, "Wrote"); |
351 | return error; | 351 | return ret; |
352 | } | 352 | } |
353 | 353 | ||
354 | /** | 354 | /** |
@@ -536,7 +536,8 @@ static int load_image(struct swap_map_handle *handle, | |||
536 | snapshot_write_finalize(snapshot); | 536 | snapshot_write_finalize(snapshot); |
537 | if (!snapshot_image_loaded(snapshot)) | 537 | if (!snapshot_image_loaded(snapshot)) |
538 | error = -ENODATA; | 538 | error = -ENODATA; |
539 | } | 539 | } else |
540 | printk("\n"); | ||
540 | swsusp_show_speed(&start, &stop, nr_to_read, "Read"); | 541 | swsusp_show_speed(&start, &stop, nr_to_read, "Read"); |
541 | return error; | 542 | return error; |
542 | } | 543 | } |
@@ -572,8 +573,6 @@ int swsusp_read(unsigned int *flags_p) | |||
572 | error = load_image(&handle, &snapshot, header->pages - 1); | 573 | error = load_image(&handle, &snapshot, header->pages - 1); |
573 | release_swap_reader(&handle); | 574 | release_swap_reader(&handle); |
574 | 575 | ||
575 | blkdev_put(resume_bdev, FMODE_READ); | ||
576 | |||
577 | if (!error) | 576 | if (!error) |
578 | pr_debug("PM: Image successfully loaded\n"); | 577 | pr_debug("PM: Image successfully loaded\n"); |
579 | else | 578 | else |
@@ -596,7 +595,7 @@ int swsusp_check(void) | |||
596 | error = bio_read_page(swsusp_resume_block, | 595 | error = bio_read_page(swsusp_resume_block, |
597 | swsusp_header, NULL); | 596 | swsusp_header, NULL); |
598 | if (error) | 597 | if (error) |
599 | return error; | 598 | goto put; |
600 | 599 | ||
601 | if (!memcmp(SWSUSP_SIG, swsusp_header->sig, 10)) { | 600 | if (!memcmp(SWSUSP_SIG, swsusp_header->sig, 10)) { |
602 | memcpy(swsusp_header->sig, swsusp_header->orig_sig, 10); | 601 | memcpy(swsusp_header->sig, swsusp_header->orig_sig, 10); |
@@ -604,8 +603,10 @@ int swsusp_check(void) | |||
604 | error = bio_write_page(swsusp_resume_block, | 603 | error = bio_write_page(swsusp_resume_block, |
605 | swsusp_header, NULL); | 604 | swsusp_header, NULL); |
606 | } else { | 605 | } else { |
607 | return -EINVAL; | 606 | error = -EINVAL; |
608 | } | 607 | } |
608 | |||
609 | put: | ||
609 | if (error) | 610 | if (error) |
610 | blkdev_put(resume_bdev, FMODE_READ); | 611 | blkdev_put(resume_bdev, FMODE_READ); |
611 | else | 612 | else |
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c index 37ba67e33265..9c451a1930b6 100644 --- a/kernel/trace/ftrace.c +++ b/kernel/trace/ftrace.c | |||
@@ -740,7 +740,7 @@ ftrace_profile_write(struct file *filp, const char __user *ubuf, | |||
740 | out: | 740 | out: |
741 | mutex_unlock(&ftrace_profile_lock); | 741 | mutex_unlock(&ftrace_profile_lock); |
742 | 742 | ||
743 | filp->f_pos += cnt; | 743 | *ppos += cnt; |
744 | 744 | ||
745 | return cnt; | 745 | return cnt; |
746 | } | 746 | } |
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c index d4ff01970547..3ffa502fb243 100644 --- a/kernel/trace/ring_buffer.c +++ b/kernel/trace/ring_buffer.c | |||
@@ -483,7 +483,7 @@ struct ring_buffer_iter { | |||
483 | /* Up this if you want to test the TIME_EXTENTS and normalization */ | 483 | /* Up this if you want to test the TIME_EXTENTS and normalization */ |
484 | #define DEBUG_SHIFT 0 | 484 | #define DEBUG_SHIFT 0 |
485 | 485 | ||
486 | static inline u64 rb_time_stamp(struct ring_buffer *buffer, int cpu) | 486 | static inline u64 rb_time_stamp(struct ring_buffer *buffer) |
487 | { | 487 | { |
488 | /* shift to debug/test normalization and TIME_EXTENTS */ | 488 | /* shift to debug/test normalization and TIME_EXTENTS */ |
489 | return buffer->clock() << DEBUG_SHIFT; | 489 | return buffer->clock() << DEBUG_SHIFT; |
@@ -494,7 +494,7 @@ u64 ring_buffer_time_stamp(struct ring_buffer *buffer, int cpu) | |||
494 | u64 time; | 494 | u64 time; |
495 | 495 | ||
496 | preempt_disable_notrace(); | 496 | preempt_disable_notrace(); |
497 | time = rb_time_stamp(buffer, cpu); | 497 | time = rb_time_stamp(buffer); |
498 | preempt_enable_no_resched_notrace(); | 498 | preempt_enable_no_resched_notrace(); |
499 | 499 | ||
500 | return time; | 500 | return time; |
@@ -599,7 +599,7 @@ static struct list_head *rb_list_head(struct list_head *list) | |||
599 | } | 599 | } |
600 | 600 | ||
601 | /* | 601 | /* |
602 | * rb_is_head_page - test if the give page is the head page | 602 | * rb_is_head_page - test if the given page is the head page |
603 | * | 603 | * |
604 | * Because the reader may move the head_page pointer, we can | 604 | * Because the reader may move the head_page pointer, we can |
605 | * not trust what the head page is (it may be pointing to | 605 | * not trust what the head page is (it may be pointing to |
@@ -1868,7 +1868,7 @@ rb_move_tail(struct ring_buffer_per_cpu *cpu_buffer, | |||
1868 | * Nested commits always have zero deltas, so | 1868 | * Nested commits always have zero deltas, so |
1869 | * just reread the time stamp | 1869 | * just reread the time stamp |
1870 | */ | 1870 | */ |
1871 | *ts = rb_time_stamp(buffer, cpu_buffer->cpu); | 1871 | *ts = rb_time_stamp(buffer); |
1872 | next_page->page->time_stamp = *ts; | 1872 | next_page->page->time_stamp = *ts; |
1873 | } | 1873 | } |
1874 | 1874 | ||
@@ -2111,7 +2111,7 @@ rb_reserve_next_event(struct ring_buffer *buffer, | |||
2111 | if (RB_WARN_ON(cpu_buffer, ++nr_loops > 1000)) | 2111 | if (RB_WARN_ON(cpu_buffer, ++nr_loops > 1000)) |
2112 | goto out_fail; | 2112 | goto out_fail; |
2113 | 2113 | ||
2114 | ts = rb_time_stamp(cpu_buffer->buffer, cpu_buffer->cpu); | 2114 | ts = rb_time_stamp(cpu_buffer->buffer); |
2115 | 2115 | ||
2116 | /* | 2116 | /* |
2117 | * Only the first commit can update the timestamp. | 2117 | * Only the first commit can update the timestamp. |
@@ -2681,7 +2681,7 @@ unsigned long ring_buffer_entries(struct ring_buffer *buffer) | |||
2681 | EXPORT_SYMBOL_GPL(ring_buffer_entries); | 2681 | EXPORT_SYMBOL_GPL(ring_buffer_entries); |
2682 | 2682 | ||
2683 | /** | 2683 | /** |
2684 | * ring_buffer_overrun_cpu - get the number of overruns in buffer | 2684 | * ring_buffer_overruns - get the number of overruns in buffer |
2685 | * @buffer: The ring buffer | 2685 | * @buffer: The ring buffer |
2686 | * | 2686 | * |
2687 | * Returns the total number of overruns in the ring buffer | 2687 | * Returns the total number of overruns in the ring buffer |
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c index c820b0310a12..b20d3ec75de9 100644 --- a/kernel/trace/trace.c +++ b/kernel/trace/trace.c | |||
@@ -2440,7 +2440,7 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf, | |||
2440 | return ret; | 2440 | return ret; |
2441 | } | 2441 | } |
2442 | 2442 | ||
2443 | filp->f_pos += cnt; | 2443 | *ppos += cnt; |
2444 | 2444 | ||
2445 | return cnt; | 2445 | return cnt; |
2446 | } | 2446 | } |
@@ -2582,7 +2582,7 @@ tracing_ctrl_write(struct file *filp, const char __user *ubuf, | |||
2582 | } | 2582 | } |
2583 | mutex_unlock(&trace_types_lock); | 2583 | mutex_unlock(&trace_types_lock); |
2584 | 2584 | ||
2585 | filp->f_pos += cnt; | 2585 | *ppos += cnt; |
2586 | 2586 | ||
2587 | return cnt; | 2587 | return cnt; |
2588 | } | 2588 | } |
@@ -2764,7 +2764,7 @@ tracing_set_trace_write(struct file *filp, const char __user *ubuf, | |||
2764 | if (err) | 2764 | if (err) |
2765 | return err; | 2765 | return err; |
2766 | 2766 | ||
2767 | filp->f_pos += ret; | 2767 | *ppos += ret; |
2768 | 2768 | ||
2769 | return ret; | 2769 | return ret; |
2770 | } | 2770 | } |
@@ -3299,7 +3299,7 @@ tracing_entries_write(struct file *filp, const char __user *ubuf, | |||
3299 | } | 3299 | } |
3300 | } | 3300 | } |
3301 | 3301 | ||
3302 | filp->f_pos += cnt; | 3302 | *ppos += cnt; |
3303 | 3303 | ||
3304 | /* If check pages failed, return ENOMEM */ | 3304 | /* If check pages failed, return ENOMEM */ |
3305 | if (tracing_disabled) | 3305 | if (tracing_disabled) |
diff --git a/kernel/trace/trace_output.c b/kernel/trace/trace_output.c index ed17565826b0..b6c12c6a1bcd 100644 --- a/kernel/trace/trace_output.c +++ b/kernel/trace/trace_output.c | |||
@@ -69,6 +69,9 @@ enum print_line_t trace_print_printk_msg_only(struct trace_iterator *iter) | |||
69 | * @s: trace sequence descriptor | 69 | * @s: trace sequence descriptor |
70 | * @fmt: printf format string | 70 | * @fmt: printf format string |
71 | * | 71 | * |
72 | * It returns 0 if the trace oversizes the buffer's free | ||
73 | * space, 1 otherwise. | ||
74 | * | ||
72 | * The tracer may use either sequence operations or its own | 75 | * The tracer may use either sequence operations or its own |
73 | * copy to user routines. To simplify formating of a trace | 76 | * copy to user routines. To simplify formating of a trace |
74 | * trace_seq_printf is used to store strings into a special | 77 | * trace_seq_printf is used to store strings into a special |
@@ -95,7 +98,7 @@ trace_seq_printf(struct trace_seq *s, const char *fmt, ...) | |||
95 | 98 | ||
96 | s->len += ret; | 99 | s->len += ret; |
97 | 100 | ||
98 | return len; | 101 | return 1; |
99 | } | 102 | } |
100 | EXPORT_SYMBOL_GPL(trace_seq_printf); | 103 | EXPORT_SYMBOL_GPL(trace_seq_printf); |
101 | 104 | ||
diff --git a/mm/swapfile.c b/mm/swapfile.c index a1bc6b9af9a2..9c590eef7912 100644 --- a/mm/swapfile.c +++ b/mm/swapfile.c | |||
@@ -1151,8 +1151,7 @@ static int try_to_unuse(unsigned int type) | |||
1151 | } else | 1151 | } else |
1152 | retval = unuse_mm(mm, entry, page); | 1152 | retval = unuse_mm(mm, entry, page); |
1153 | 1153 | ||
1154 | if (set_start_mm && | 1154 | if (set_start_mm && *swap_map < swcount) { |
1155 | swap_count(*swap_map) < swcount) { | ||
1156 | mmput(new_start_mm); | 1155 | mmput(new_start_mm); |
1157 | atomic_inc(&mm->mm_users); | 1156 | atomic_inc(&mm->mm_users); |
1158 | new_start_mm = mm; | 1157 | new_start_mm = mm; |
diff --git a/net/9p/client.c b/net/9p/client.c index 5bf5f227dbe0..8af95b2dddd6 100644 --- a/net/9p/client.c +++ b/net/9p/client.c | |||
@@ -582,11 +582,9 @@ static struct p9_fid *p9_fid_create(struct p9_client *clnt) | |||
582 | 582 | ||
583 | memset(&fid->qid, 0, sizeof(struct p9_qid)); | 583 | memset(&fid->qid, 0, sizeof(struct p9_qid)); |
584 | fid->mode = -1; | 584 | fid->mode = -1; |
585 | fid->rdir_fpos = 0; | ||
586 | fid->uid = current_fsuid(); | 585 | fid->uid = current_fsuid(); |
587 | fid->clnt = clnt; | 586 | fid->clnt = clnt; |
588 | fid->aux = NULL; | 587 | fid->rdir = NULL; |
589 | |||
590 | spin_lock_irqsave(&clnt->lock, flags); | 588 | spin_lock_irqsave(&clnt->lock, flags); |
591 | list_add(&fid->flist, &clnt->fidlist); | 589 | list_add(&fid->flist, &clnt->fidlist); |
592 | spin_unlock_irqrestore(&clnt->lock, flags); | 590 | spin_unlock_irqrestore(&clnt->lock, flags); |
@@ -609,6 +607,7 @@ static void p9_fid_destroy(struct p9_fid *fid) | |||
609 | spin_lock_irqsave(&clnt->lock, flags); | 607 | spin_lock_irqsave(&clnt->lock, flags); |
610 | list_del(&fid->flist); | 608 | list_del(&fid->flist); |
611 | spin_unlock_irqrestore(&clnt->lock, flags); | 609 | spin_unlock_irqrestore(&clnt->lock, flags); |
610 | kfree(fid->rdir); | ||
612 | kfree(fid); | 611 | kfree(fid); |
613 | } | 612 | } |
614 | 613 | ||
diff --git a/net/core/datagram.c b/net/core/datagram.c index 1c6cf3a1a4f6..4ade3011bb3c 100644 --- a/net/core/datagram.c +++ b/net/core/datagram.c | |||
@@ -224,6 +224,15 @@ void skb_free_datagram(struct sock *sk, struct sk_buff *skb) | |||
224 | consume_skb(skb); | 224 | consume_skb(skb); |
225 | sk_mem_reclaim_partial(sk); | 225 | sk_mem_reclaim_partial(sk); |
226 | } | 226 | } |
227 | EXPORT_SYMBOL(skb_free_datagram); | ||
228 | |||
229 | void skb_free_datagram_locked(struct sock *sk, struct sk_buff *skb) | ||
230 | { | ||
231 | lock_sock(sk); | ||
232 | skb_free_datagram(sk, skb); | ||
233 | release_sock(sk); | ||
234 | } | ||
235 | EXPORT_SYMBOL(skb_free_datagram_locked); | ||
227 | 236 | ||
228 | /** | 237 | /** |
229 | * skb_kill_datagram - Free a datagram skbuff forcibly | 238 | * skb_kill_datagram - Free a datagram skbuff forcibly |
@@ -752,5 +761,4 @@ unsigned int datagram_poll(struct file *file, struct socket *sock, | |||
752 | EXPORT_SYMBOL(datagram_poll); | 761 | EXPORT_SYMBOL(datagram_poll); |
753 | EXPORT_SYMBOL(skb_copy_and_csum_datagram_iovec); | 762 | EXPORT_SYMBOL(skb_copy_and_csum_datagram_iovec); |
754 | EXPORT_SYMBOL(skb_copy_datagram_iovec); | 763 | EXPORT_SYMBOL(skb_copy_datagram_iovec); |
755 | EXPORT_SYMBOL(skb_free_datagram); | ||
756 | EXPORT_SYMBOL(skb_recv_datagram); | 764 | EXPORT_SYMBOL(skb_recv_datagram); |
diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c index e2f950592566..aa00398be80e 100644 --- a/net/ipv4/fib_frontend.c +++ b/net/ipv4/fib_frontend.c | |||
@@ -229,14 +229,17 @@ unsigned int inet_dev_addr_type(struct net *net, const struct net_device *dev, | |||
229 | */ | 229 | */ |
230 | 230 | ||
231 | int fib_validate_source(__be32 src, __be32 dst, u8 tos, int oif, | 231 | int fib_validate_source(__be32 src, __be32 dst, u8 tos, int oif, |
232 | struct net_device *dev, __be32 *spec_dst, u32 *itag) | 232 | struct net_device *dev, __be32 *spec_dst, |
233 | u32 *itag, u32 mark) | ||
233 | { | 234 | { |
234 | struct in_device *in_dev; | 235 | struct in_device *in_dev; |
235 | struct flowi fl = { .nl_u = { .ip4_u = | 236 | struct flowi fl = { .nl_u = { .ip4_u = |
236 | { .daddr = src, | 237 | { .daddr = src, |
237 | .saddr = dst, | 238 | .saddr = dst, |
238 | .tos = tos } }, | 239 | .tos = tos } }, |
240 | .mark = mark, | ||
239 | .iif = oif }; | 241 | .iif = oif }; |
242 | |||
240 | struct fib_result res; | 243 | struct fib_result res; |
241 | int no_addr, rpf; | 244 | int no_addr, rpf; |
242 | int ret; | 245 | int ret; |
diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c index 41ada9904d31..143333852624 100644 --- a/net/ipv4/ip_gre.c +++ b/net/ipv4/ip_gre.c | |||
@@ -1464,7 +1464,7 @@ static void ipgre_tap_setup(struct net_device *dev) | |||
1464 | 1464 | ||
1465 | ether_setup(dev); | 1465 | ether_setup(dev); |
1466 | 1466 | ||
1467 | dev->netdev_ops = &ipgre_netdev_ops; | 1467 | dev->netdev_ops = &ipgre_tap_netdev_ops; |
1468 | dev->destructor = free_netdev; | 1468 | dev->destructor = free_netdev; |
1469 | 1469 | ||
1470 | dev->iflink = 0; | 1470 | dev->iflink = 0; |
@@ -1525,25 +1525,29 @@ static int ipgre_changelink(struct net_device *dev, struct nlattr *tb[], | |||
1525 | if (t->dev != dev) | 1525 | if (t->dev != dev) |
1526 | return -EEXIST; | 1526 | return -EEXIST; |
1527 | } else { | 1527 | } else { |
1528 | unsigned nflags = 0; | ||
1529 | |||
1530 | t = nt; | 1528 | t = nt; |
1531 | 1529 | ||
1532 | if (ipv4_is_multicast(p.iph.daddr)) | 1530 | if (dev->type != ARPHRD_ETHER) { |
1533 | nflags = IFF_BROADCAST; | 1531 | unsigned nflags = 0; |
1534 | else if (p.iph.daddr) | ||
1535 | nflags = IFF_POINTOPOINT; | ||
1536 | 1532 | ||
1537 | if ((dev->flags ^ nflags) & | 1533 | if (ipv4_is_multicast(p.iph.daddr)) |
1538 | (IFF_POINTOPOINT | IFF_BROADCAST)) | 1534 | nflags = IFF_BROADCAST; |
1539 | return -EINVAL; | 1535 | else if (p.iph.daddr) |
1536 | nflags = IFF_POINTOPOINT; | ||
1537 | |||
1538 | if ((dev->flags ^ nflags) & | ||
1539 | (IFF_POINTOPOINT | IFF_BROADCAST)) | ||
1540 | return -EINVAL; | ||
1541 | } | ||
1540 | 1542 | ||
1541 | ipgre_tunnel_unlink(ign, t); | 1543 | ipgre_tunnel_unlink(ign, t); |
1542 | t->parms.iph.saddr = p.iph.saddr; | 1544 | t->parms.iph.saddr = p.iph.saddr; |
1543 | t->parms.iph.daddr = p.iph.daddr; | 1545 | t->parms.iph.daddr = p.iph.daddr; |
1544 | t->parms.i_key = p.i_key; | 1546 | t->parms.i_key = p.i_key; |
1545 | memcpy(dev->dev_addr, &p.iph.saddr, 4); | 1547 | if (dev->type != ARPHRD_ETHER) { |
1546 | memcpy(dev->broadcast, &p.iph.daddr, 4); | 1548 | memcpy(dev->dev_addr, &p.iph.saddr, 4); |
1549 | memcpy(dev->broadcast, &p.iph.daddr, 4); | ||
1550 | } | ||
1547 | ipgre_tunnel_link(ign, t); | 1551 | ipgre_tunnel_link(ign, t); |
1548 | netdev_state_change(dev); | 1552 | netdev_state_change(dev); |
1549 | } | 1553 | } |
diff --git a/net/ipv4/route.c b/net/ipv4/route.c index bb4199252026..5b1050a5d874 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c | |||
@@ -1854,7 +1854,7 @@ static int ip_route_input_mc(struct sk_buff *skb, __be32 daddr, __be32 saddr, | |||
1854 | goto e_inval; | 1854 | goto e_inval; |
1855 | spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK); | 1855 | spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK); |
1856 | } else if (fib_validate_source(saddr, 0, tos, 0, | 1856 | } else if (fib_validate_source(saddr, 0, tos, 0, |
1857 | dev, &spec_dst, &itag) < 0) | 1857 | dev, &spec_dst, &itag, 0) < 0) |
1858 | goto e_inval; | 1858 | goto e_inval; |
1859 | 1859 | ||
1860 | rth = dst_alloc(&ipv4_dst_ops); | 1860 | rth = dst_alloc(&ipv4_dst_ops); |
@@ -1967,7 +1967,7 @@ static int __mkroute_input(struct sk_buff *skb, | |||
1967 | 1967 | ||
1968 | 1968 | ||
1969 | err = fib_validate_source(saddr, daddr, tos, FIB_RES_OIF(*res), | 1969 | err = fib_validate_source(saddr, daddr, tos, FIB_RES_OIF(*res), |
1970 | in_dev->dev, &spec_dst, &itag); | 1970 | in_dev->dev, &spec_dst, &itag, skb->mark); |
1971 | if (err < 0) { | 1971 | if (err < 0) { |
1972 | ip_handle_martian_source(in_dev->dev, in_dev, skb, daddr, | 1972 | ip_handle_martian_source(in_dev->dev, in_dev, skb, daddr, |
1973 | saddr); | 1973 | saddr); |
@@ -2141,7 +2141,7 @@ static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr, | |||
2141 | int result; | 2141 | int result; |
2142 | result = fib_validate_source(saddr, daddr, tos, | 2142 | result = fib_validate_source(saddr, daddr, tos, |
2143 | net->loopback_dev->ifindex, | 2143 | net->loopback_dev->ifindex, |
2144 | dev, &spec_dst, &itag); | 2144 | dev, &spec_dst, &itag, skb->mark); |
2145 | if (result < 0) | 2145 | if (result < 0) |
2146 | goto martian_source; | 2146 | goto martian_source; |
2147 | if (result) | 2147 | if (result) |
@@ -2170,7 +2170,7 @@ brd_input: | |||
2170 | spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK); | 2170 | spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK); |
2171 | else { | 2171 | else { |
2172 | err = fib_validate_source(saddr, 0, tos, 0, dev, &spec_dst, | 2172 | err = fib_validate_source(saddr, 0, tos, 0, dev, &spec_dst, |
2173 | &itag); | 2173 | &itag, skb->mark); |
2174 | if (err < 0) | 2174 | if (err < 0) |
2175 | goto martian_source; | 2175 | goto martian_source; |
2176 | if (err) | 2176 | if (err) |
diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c index d0d436d6216c..0fa9f70e4b19 100644 --- a/net/ipv4/udp.c +++ b/net/ipv4/udp.c | |||
@@ -999,9 +999,7 @@ try_again: | |||
999 | err = ulen; | 999 | err = ulen; |
1000 | 1000 | ||
1001 | out_free: | 1001 | out_free: |
1002 | lock_sock(sk); | 1002 | skb_free_datagram_locked(sk, skb); |
1003 | skb_free_datagram(sk, skb); | ||
1004 | release_sock(sk); | ||
1005 | out: | 1003 | out: |
1006 | return err; | 1004 | return err; |
1007 | 1005 | ||
diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c index 3a60f12b34ed..cf538ed5ef6a 100644 --- a/net/ipv6/udp.c +++ b/net/ipv6/udp.c | |||
@@ -288,9 +288,7 @@ try_again: | |||
288 | err = ulen; | 288 | err = ulen; |
289 | 289 | ||
290 | out_free: | 290 | out_free: |
291 | lock_sock(sk); | 291 | skb_free_datagram_locked(sk, skb); |
292 | skb_free_datagram(sk, skb); | ||
293 | release_sock(sk); | ||
294 | out: | 292 | out: |
295 | return err; | 293 | return err; |
296 | 294 | ||
diff --git a/net/mac80211/agg-tx.c b/net/mac80211/agg-tx.c index bd765f30dba2..b09948ceec4a 100644 --- a/net/mac80211/agg-tx.c +++ b/net/mac80211/agg-tx.c | |||
@@ -666,26 +666,25 @@ void ieee80211_process_addba_resp(struct ieee80211_local *local, | |||
666 | 666 | ||
667 | state = &sta->ampdu_mlme.tid_state_tx[tid]; | 667 | state = &sta->ampdu_mlme.tid_state_tx[tid]; |
668 | 668 | ||
669 | del_timer_sync(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer); | ||
670 | |||
669 | spin_lock_bh(&sta->lock); | 671 | spin_lock_bh(&sta->lock); |
670 | 672 | ||
671 | if (!(*state & HT_ADDBA_REQUESTED_MSK)) { | 673 | if (!(*state & HT_ADDBA_REQUESTED_MSK)) |
672 | spin_unlock_bh(&sta->lock); | 674 | goto timer_still_needed; |
673 | return; | ||
674 | } | ||
675 | 675 | ||
676 | if (mgmt->u.action.u.addba_resp.dialog_token != | 676 | if (mgmt->u.action.u.addba_resp.dialog_token != |
677 | sta->ampdu_mlme.tid_tx[tid]->dialog_token) { | 677 | sta->ampdu_mlme.tid_tx[tid]->dialog_token) { |
678 | spin_unlock_bh(&sta->lock); | ||
679 | #ifdef CONFIG_MAC80211_HT_DEBUG | 678 | #ifdef CONFIG_MAC80211_HT_DEBUG |
680 | printk(KERN_DEBUG "wrong addBA response token, tid %d\n", tid); | 679 | printk(KERN_DEBUG "wrong addBA response token, tid %d\n", tid); |
681 | #endif /* CONFIG_MAC80211_HT_DEBUG */ | 680 | #endif /* CONFIG_MAC80211_HT_DEBUG */ |
682 | return; | 681 | goto timer_still_needed; |
683 | } | 682 | } |
684 | 683 | ||
685 | del_timer_sync(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer); | ||
686 | #ifdef CONFIG_MAC80211_HT_DEBUG | 684 | #ifdef CONFIG_MAC80211_HT_DEBUG |
687 | printk(KERN_DEBUG "switched off addBA timer for tid %d \n", tid); | 685 | printk(KERN_DEBUG "switched off addBA timer for tid %d \n", tid); |
688 | #endif /* CONFIG_MAC80211_HT_DEBUG */ | 686 | #endif /* CONFIG_MAC80211_HT_DEBUG */ |
687 | |||
689 | if (le16_to_cpu(mgmt->u.action.u.addba_resp.status) | 688 | if (le16_to_cpu(mgmt->u.action.u.addba_resp.status) |
690 | == WLAN_STATUS_SUCCESS) { | 689 | == WLAN_STATUS_SUCCESS) { |
691 | u8 curstate = *state; | 690 | u8 curstate = *state; |
@@ -699,5 +698,11 @@ void ieee80211_process_addba_resp(struct ieee80211_local *local, | |||
699 | } else { | 698 | } else { |
700 | ___ieee80211_stop_tx_ba_session(sta, tid, WLAN_BACK_INITIATOR); | 699 | ___ieee80211_stop_tx_ba_session(sta, tid, WLAN_BACK_INITIATOR); |
701 | } | 700 | } |
701 | |||
702 | goto out; | ||
703 | |||
704 | timer_still_needed: | ||
705 | add_timer(&sta->ampdu_mlme.tid_tx[tid]->addba_resp_timer); | ||
706 | out: | ||
702 | spin_unlock_bh(&sta->lock); | 707 | spin_unlock_bh(&sta->lock); |
703 | } | 708 | } |
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c index 5608f6c68413..7b5131bd6fa1 100644 --- a/net/mac80211/cfg.c +++ b/net/mac80211/cfg.c | |||
@@ -72,6 +72,9 @@ static int ieee80211_change_iface(struct wiphy *wiphy, | |||
72 | struct ieee80211_sub_if_data *sdata; | 72 | struct ieee80211_sub_if_data *sdata; |
73 | int ret; | 73 | int ret; |
74 | 74 | ||
75 | if (netif_running(dev)) | ||
76 | return -EBUSY; | ||
77 | |||
75 | if (!nl80211_type_check(type)) | 78 | if (!nl80211_type_check(type)) |
76 | return -EINVAL; | 79 | return -EINVAL; |
77 | 80 | ||
@@ -81,9 +84,6 @@ static int ieee80211_change_iface(struct wiphy *wiphy, | |||
81 | if (ret) | 84 | if (ret) |
82 | return ret; | 85 | return ret; |
83 | 86 | ||
84 | if (netif_running(sdata->dev)) | ||
85 | return -EBUSY; | ||
86 | |||
87 | if (ieee80211_vif_is_mesh(&sdata->vif) && params->mesh_id_len) | 87 | if (ieee80211_vif_is_mesh(&sdata->vif) && params->mesh_id_len) |
88 | ieee80211_sdata_set_mesh_id(sdata, | 88 | ieee80211_sdata_set_mesh_id(sdata, |
89 | params->mesh_id_len, | 89 | params->mesh_id_len, |
diff --git a/net/mac80211/ht.c b/net/mac80211/ht.c index 0891bfb06996..48ef1a282b91 100644 --- a/net/mac80211/ht.c +++ b/net/mac80211/ht.c | |||
@@ -153,7 +153,7 @@ void ieee80211_process_delba(struct ieee80211_sub_if_data *sdata, | |||
153 | if (net_ratelimit()) | 153 | if (net_ratelimit()) |
154 | printk(KERN_DEBUG "delba from %pM (%s) tid %d reason code %d\n", | 154 | printk(KERN_DEBUG "delba from %pM (%s) tid %d reason code %d\n", |
155 | mgmt->sa, initiator ? "initiator" : "recipient", tid, | 155 | mgmt->sa, initiator ? "initiator" : "recipient", tid, |
156 | mgmt->u.action.u.delba.reason_code); | 156 | le16_to_cpu(mgmt->u.action.u.delba.reason_code)); |
157 | #endif /* CONFIG_MAC80211_HT_DEBUG */ | 157 | #endif /* CONFIG_MAC80211_HT_DEBUG */ |
158 | 158 | ||
159 | if (initiator == WLAN_BACK_INITIATOR) | 159 | if (initiator == WLAN_BACK_INITIATOR) |
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c index ca8ecce31d34..f1362f32c17d 100644 --- a/net/mac80211/ibss.c +++ b/net/mac80211/ibss.c | |||
@@ -73,6 +73,7 @@ static void __ieee80211_sta_join_ibss(struct ieee80211_sub_if_data *sdata, | |||
73 | struct ieee80211_mgmt *mgmt; | 73 | struct ieee80211_mgmt *mgmt; |
74 | u8 *pos; | 74 | u8 *pos; |
75 | struct ieee80211_supported_band *sband; | 75 | struct ieee80211_supported_band *sband; |
76 | struct cfg80211_bss *bss; | ||
76 | u32 bss_change; | 77 | u32 bss_change; |
77 | u8 supp_rates[IEEE80211_MAX_SUPP_RATES]; | 78 | u8 supp_rates[IEEE80211_MAX_SUPP_RATES]; |
78 | 79 | ||
@@ -177,8 +178,9 @@ static void __ieee80211_sta_join_ibss(struct ieee80211_sub_if_data *sdata, | |||
177 | mod_timer(&ifibss->timer, | 178 | mod_timer(&ifibss->timer, |
178 | round_jiffies(jiffies + IEEE80211_IBSS_MERGE_INTERVAL)); | 179 | round_jiffies(jiffies + IEEE80211_IBSS_MERGE_INTERVAL)); |
179 | 180 | ||
180 | cfg80211_inform_bss_frame(local->hw.wiphy, local->hw.conf.channel, | 181 | bss = cfg80211_inform_bss_frame(local->hw.wiphy, local->hw.conf.channel, |
181 | mgmt, skb->len, 0, GFP_KERNEL); | 182 | mgmt, skb->len, 0, GFP_KERNEL); |
183 | cfg80211_put_bss(bss); | ||
182 | cfg80211_ibss_joined(sdata->dev, ifibss->bssid, GFP_KERNEL); | 184 | cfg80211_ibss_joined(sdata->dev, ifibss->bssid, GFP_KERNEL); |
183 | } | 185 | } |
184 | 186 | ||
diff --git a/net/sunrpc/svcsock.c b/net/sunrpc/svcsock.c index ccc5e83cae5d..1c246a4f491e 100644 --- a/net/sunrpc/svcsock.c +++ b/net/sunrpc/svcsock.c | |||
@@ -111,7 +111,7 @@ static void svc_release_skb(struct svc_rqst *rqstp) | |||
111 | rqstp->rq_xprt_ctxt = NULL; | 111 | rqstp->rq_xprt_ctxt = NULL; |
112 | 112 | ||
113 | dprintk("svc: service %p, releasing skb %p\n", rqstp, skb); | 113 | dprintk("svc: service %p, releasing skb %p\n", rqstp, skb); |
114 | skb_free_datagram(svsk->sk_sk, skb); | 114 | skb_free_datagram_locked(svsk->sk_sk, skb); |
115 | } | 115 | } |
116 | } | 116 | } |
117 | 117 | ||
@@ -578,7 +578,7 @@ static int svc_udp_recvfrom(struct svc_rqst *rqstp) | |||
578 | "svc: received unknown control message %d/%d; " | 578 | "svc: received unknown control message %d/%d; " |
579 | "dropping RPC reply datagram\n", | 579 | "dropping RPC reply datagram\n", |
580 | cmh->cmsg_level, cmh->cmsg_type); | 580 | cmh->cmsg_level, cmh->cmsg_type); |
581 | skb_free_datagram(svsk->sk_sk, skb); | 581 | skb_free_datagram_locked(svsk->sk_sk, skb); |
582 | return 0; | 582 | return 0; |
583 | } | 583 | } |
584 | 584 | ||
@@ -588,18 +588,18 @@ static int svc_udp_recvfrom(struct svc_rqst *rqstp) | |||
588 | if (csum_partial_copy_to_xdr(&rqstp->rq_arg, skb)) { | 588 | if (csum_partial_copy_to_xdr(&rqstp->rq_arg, skb)) { |
589 | local_bh_enable(); | 589 | local_bh_enable(); |
590 | /* checksum error */ | 590 | /* checksum error */ |
591 | skb_free_datagram(svsk->sk_sk, skb); | 591 | skb_free_datagram_locked(svsk->sk_sk, skb); |
592 | return 0; | 592 | return 0; |
593 | } | 593 | } |
594 | local_bh_enable(); | 594 | local_bh_enable(); |
595 | skb_free_datagram(svsk->sk_sk, skb); | 595 | skb_free_datagram_locked(svsk->sk_sk, skb); |
596 | } else { | 596 | } else { |
597 | /* we can use it in-place */ | 597 | /* we can use it in-place */ |
598 | rqstp->rq_arg.head[0].iov_base = skb->data + | 598 | rqstp->rq_arg.head[0].iov_base = skb->data + |
599 | sizeof(struct udphdr); | 599 | sizeof(struct udphdr); |
600 | rqstp->rq_arg.head[0].iov_len = len; | 600 | rqstp->rq_arg.head[0].iov_len = len; |
601 | if (skb_checksum_complete(skb)) { | 601 | if (skb_checksum_complete(skb)) { |
602 | skb_free_datagram(svsk->sk_sk, skb); | 602 | skb_free_datagram_locked(svsk->sk_sk, skb); |
603 | return 0; | 603 | return 0; |
604 | } | 604 | } |
605 | rqstp->rq_xprt_ctxt = skb; | 605 | rqstp->rq_xprt_ctxt = skb; |
diff --git a/net/wireless/sme.c b/net/wireless/sme.c index ece378d531ef..9f0b2800a9d7 100644 --- a/net/wireless/sme.c +++ b/net/wireless/sme.c | |||
@@ -165,7 +165,7 @@ void cfg80211_conn_work(struct work_struct *work) | |||
165 | struct cfg80211_registered_device *rdev = | 165 | struct cfg80211_registered_device *rdev = |
166 | container_of(work, struct cfg80211_registered_device, conn_work); | 166 | container_of(work, struct cfg80211_registered_device, conn_work); |
167 | struct wireless_dev *wdev; | 167 | struct wireless_dev *wdev; |
168 | u8 bssid[ETH_ALEN]; | 168 | u8 bssid_buf[ETH_ALEN], *bssid = NULL; |
169 | 169 | ||
170 | rtnl_lock(); | 170 | rtnl_lock(); |
171 | cfg80211_lock_rdev(rdev); | 171 | cfg80211_lock_rdev(rdev); |
@@ -181,7 +181,10 @@ void cfg80211_conn_work(struct work_struct *work) | |||
181 | wdev_unlock(wdev); | 181 | wdev_unlock(wdev); |
182 | continue; | 182 | continue; |
183 | } | 183 | } |
184 | memcpy(bssid, wdev->conn->params.bssid, ETH_ALEN); | 184 | if (wdev->conn->params.bssid) { |
185 | memcpy(bssid_buf, wdev->conn->params.bssid, ETH_ALEN); | ||
186 | bssid = bssid_buf; | ||
187 | } | ||
185 | if (cfg80211_conn_do_work(wdev)) | 188 | if (cfg80211_conn_do_work(wdev)) |
186 | __cfg80211_connect_result( | 189 | __cfg80211_connect_result( |
187 | wdev->netdev, bssid, | 190 | wdev->netdev, bssid, |
diff --git a/sound/core/pcm.c b/sound/core/pcm.c index 0c1440121c22..c69c60b2a48a 100644 --- a/sound/core/pcm.c +++ b/sound/core/pcm.c | |||
@@ -953,11 +953,12 @@ static int snd_pcm_dev_register(struct snd_device *device) | |||
953 | struct snd_pcm_substream *substream; | 953 | struct snd_pcm_substream *substream; |
954 | struct snd_pcm_notify *notify; | 954 | struct snd_pcm_notify *notify; |
955 | char str[16]; | 955 | char str[16]; |
956 | struct snd_pcm *pcm = device->device_data; | 956 | struct snd_pcm *pcm; |
957 | struct device *dev; | 957 | struct device *dev; |
958 | 958 | ||
959 | if (snd_BUG_ON(!pcm || !device)) | 959 | if (snd_BUG_ON(!device || !device->device_data)) |
960 | return -ENXIO; | 960 | return -ENXIO; |
961 | pcm = device->device_data; | ||
961 | mutex_lock(®ister_mutex); | 962 | mutex_lock(®ister_mutex); |
962 | err = snd_pcm_add(pcm); | 963 | err = snd_pcm_add(pcm); |
963 | if (err) { | 964 | if (err) { |
diff --git a/sound/drivers/dummy.c b/sound/drivers/dummy.c index 6ba066c41d2e..252e04ce602f 100644 --- a/sound/drivers/dummy.c +++ b/sound/drivers/dummy.c | |||
@@ -165,7 +165,7 @@ MODULE_PARM_DESC(enable, "Enable this dummy soundcard."); | |||
165 | module_param_array(pcm_devs, int, NULL, 0444); | 165 | module_param_array(pcm_devs, int, NULL, 0444); |
166 | MODULE_PARM_DESC(pcm_devs, "PCM devices # (0-4) for dummy driver."); | 166 | MODULE_PARM_DESC(pcm_devs, "PCM devices # (0-4) for dummy driver."); |
167 | module_param_array(pcm_substreams, int, NULL, 0444); | 167 | module_param_array(pcm_substreams, int, NULL, 0444); |
168 | MODULE_PARM_DESC(pcm_substreams, "PCM substreams # (1-16) for dummy driver."); | 168 | MODULE_PARM_DESC(pcm_substreams, "PCM substreams # (1-128) for dummy driver."); |
169 | //module_param_array(midi_devs, int, NULL, 0444); | 169 | //module_param_array(midi_devs, int, NULL, 0444); |
170 | //MODULE_PARM_DESC(midi_devs, "MIDI devices # (0-2) for dummy driver."); | 170 | //MODULE_PARM_DESC(midi_devs, "MIDI devices # (0-2) for dummy driver."); |
171 | module_param(fake_buffer, bool, 0444); | 171 | module_param(fake_buffer, bool, 0444); |
@@ -808,8 +808,6 @@ static int __devinit snd_card_dummy_new_mixer(struct snd_dummy *dummy) | |||
808 | unsigned int idx; | 808 | unsigned int idx; |
809 | int err; | 809 | int err; |
810 | 810 | ||
811 | if (snd_BUG_ON(!dummy)) | ||
812 | return -EINVAL; | ||
813 | spin_lock_init(&dummy->mixer_lock); | 811 | spin_lock_init(&dummy->mixer_lock); |
814 | strcpy(card->mixername, "Dummy Mixer"); | 812 | strcpy(card->mixername, "Dummy Mixer"); |
815 | 813 | ||
diff --git a/sound/drivers/pcsp/pcsp_lib.c b/sound/drivers/pcsp/pcsp_lib.c index 84cc2658c05b..e1145ac6e908 100644 --- a/sound/drivers/pcsp/pcsp_lib.c +++ b/sound/drivers/pcsp/pcsp_lib.c | |||
@@ -39,25 +39,20 @@ static DECLARE_TASKLET(pcsp_pcm_tasklet, pcsp_call_pcm_elapsed, 0); | |||
39 | /* write the port and returns the next expire time in ns; | 39 | /* write the port and returns the next expire time in ns; |
40 | * called at the trigger-start and in hrtimer callback | 40 | * called at the trigger-start and in hrtimer callback |
41 | */ | 41 | */ |
42 | static unsigned long pcsp_timer_update(struct hrtimer *handle) | 42 | static u64 pcsp_timer_update(struct snd_pcsp *chip) |
43 | { | 43 | { |
44 | unsigned char timer_cnt, val; | 44 | unsigned char timer_cnt, val; |
45 | u64 ns; | 45 | u64 ns; |
46 | struct snd_pcm_substream *substream; | 46 | struct snd_pcm_substream *substream; |
47 | struct snd_pcm_runtime *runtime; | 47 | struct snd_pcm_runtime *runtime; |
48 | struct snd_pcsp *chip = container_of(handle, struct snd_pcsp, timer); | ||
49 | unsigned long flags; | 48 | unsigned long flags; |
50 | 49 | ||
51 | if (chip->thalf) { | 50 | if (chip->thalf) { |
52 | outb(chip->val61, 0x61); | 51 | outb(chip->val61, 0x61); |
53 | chip->thalf = 0; | 52 | chip->thalf = 0; |
54 | if (!atomic_read(&chip->timer_active)) | ||
55 | return 0; | ||
56 | return chip->ns_rem; | 53 | return chip->ns_rem; |
57 | } | 54 | } |
58 | 55 | ||
59 | if (!atomic_read(&chip->timer_active)) | ||
60 | return 0; | ||
61 | substream = chip->playback_substream; | 56 | substream = chip->playback_substream; |
62 | if (!substream) | 57 | if (!substream) |
63 | return 0; | 58 | return 0; |
@@ -88,24 +83,17 @@ static unsigned long pcsp_timer_update(struct hrtimer *handle) | |||
88 | return ns; | 83 | return ns; |
89 | } | 84 | } |
90 | 85 | ||
91 | enum hrtimer_restart pcsp_do_timer(struct hrtimer *handle) | 86 | static void pcsp_pointer_update(struct snd_pcsp *chip) |
92 | { | 87 | { |
93 | struct snd_pcsp *chip = container_of(handle, struct snd_pcsp, timer); | ||
94 | struct snd_pcm_substream *substream; | 88 | struct snd_pcm_substream *substream; |
95 | int periods_elapsed, pointer_update; | ||
96 | size_t period_bytes, buffer_bytes; | 89 | size_t period_bytes, buffer_bytes; |
97 | unsigned long ns; | 90 | int periods_elapsed; |
98 | unsigned long flags; | 91 | unsigned long flags; |
99 | 92 | ||
100 | pointer_update = !chip->thalf; | ||
101 | ns = pcsp_timer_update(handle); | ||
102 | if (!ns) | ||
103 | return HRTIMER_NORESTART; | ||
104 | |||
105 | /* update the playback position */ | 93 | /* update the playback position */ |
106 | substream = chip->playback_substream; | 94 | substream = chip->playback_substream; |
107 | if (!substream) | 95 | if (!substream) |
108 | return HRTIMER_NORESTART; | 96 | return; |
109 | 97 | ||
110 | period_bytes = snd_pcm_lib_period_bytes(substream); | 98 | period_bytes = snd_pcm_lib_period_bytes(substream); |
111 | buffer_bytes = snd_pcm_lib_buffer_bytes(substream); | 99 | buffer_bytes = snd_pcm_lib_buffer_bytes(substream); |
@@ -134,6 +122,26 @@ enum hrtimer_restart pcsp_do_timer(struct hrtimer *handle) | |||
134 | 122 | ||
135 | if (periods_elapsed) | 123 | if (periods_elapsed) |
136 | tasklet_schedule(&pcsp_pcm_tasklet); | 124 | tasklet_schedule(&pcsp_pcm_tasklet); |
125 | } | ||
126 | |||
127 | enum hrtimer_restart pcsp_do_timer(struct hrtimer *handle) | ||
128 | { | ||
129 | struct snd_pcsp *chip = container_of(handle, struct snd_pcsp, timer); | ||
130 | int pointer_update; | ||
131 | u64 ns; | ||
132 | |||
133 | if (!atomic_read(&chip->timer_active) || !chip->playback_substream) | ||
134 | return HRTIMER_NORESTART; | ||
135 | |||
136 | pointer_update = !chip->thalf; | ||
137 | ns = pcsp_timer_update(chip); | ||
138 | if (!ns) { | ||
139 | printk(KERN_WARNING "PCSP: unexpected stop\n"); | ||
140 | return HRTIMER_NORESTART; | ||
141 | } | ||
142 | |||
143 | if (pointer_update) | ||
144 | pcsp_pointer_update(chip); | ||
137 | 145 | ||
138 | hrtimer_forward(handle, hrtimer_get_expires(handle), ns_to_ktime(ns)); | 146 | hrtimer_forward(handle, hrtimer_get_expires(handle), ns_to_ktime(ns)); |
139 | 147 | ||
@@ -142,8 +150,6 @@ enum hrtimer_restart pcsp_do_timer(struct hrtimer *handle) | |||
142 | 150 | ||
143 | static int pcsp_start_playing(struct snd_pcsp *chip) | 151 | static int pcsp_start_playing(struct snd_pcsp *chip) |
144 | { | 152 | { |
145 | unsigned long ns; | ||
146 | |||
147 | #if PCSP_DEBUG | 153 | #if PCSP_DEBUG |
148 | printk(KERN_INFO "PCSP: start_playing called\n"); | 154 | printk(KERN_INFO "PCSP: start_playing called\n"); |
149 | #endif | 155 | #endif |
@@ -159,11 +165,7 @@ static int pcsp_start_playing(struct snd_pcsp *chip) | |||
159 | atomic_set(&chip->timer_active, 1); | 165 | atomic_set(&chip->timer_active, 1); |
160 | chip->thalf = 0; | 166 | chip->thalf = 0; |
161 | 167 | ||
162 | ns = pcsp_timer_update(&pcsp_chip.timer); | 168 | hrtimer_start(&pcsp_chip.timer, ktime_set(0, 0), HRTIMER_MODE_REL); |
163 | if (!ns) | ||
164 | return -EIO; | ||
165 | |||
166 | hrtimer_start(&pcsp_chip.timer, ktime_set(0, ns), HRTIMER_MODE_REL); | ||
167 | return 0; | 169 | return 0; |
168 | } | 170 | } |
169 | 171 | ||
@@ -232,21 +234,22 @@ static int snd_pcsp_playback_hw_free(struct snd_pcm_substream *substream) | |||
232 | static int snd_pcsp_playback_prepare(struct snd_pcm_substream *substream) | 234 | static int snd_pcsp_playback_prepare(struct snd_pcm_substream *substream) |
233 | { | 235 | { |
234 | struct snd_pcsp *chip = snd_pcm_substream_chip(substream); | 236 | struct snd_pcsp *chip = snd_pcm_substream_chip(substream); |
237 | pcsp_sync_stop(chip); | ||
238 | chip->playback_ptr = 0; | ||
239 | chip->period_ptr = 0; | ||
240 | chip->fmt_size = | ||
241 | snd_pcm_format_physical_width(substream->runtime->format) >> 3; | ||
242 | chip->is_signed = snd_pcm_format_signed(substream->runtime->format); | ||
235 | #if PCSP_DEBUG | 243 | #if PCSP_DEBUG |
236 | printk(KERN_INFO "PCSP: prepare called, " | 244 | printk(KERN_INFO "PCSP: prepare called, " |
237 | "size=%zi psize=%zi f=%zi f1=%i\n", | 245 | "size=%zi psize=%zi f=%zi f1=%i fsize=%i\n", |
238 | snd_pcm_lib_buffer_bytes(substream), | 246 | snd_pcm_lib_buffer_bytes(substream), |
239 | snd_pcm_lib_period_bytes(substream), | 247 | snd_pcm_lib_period_bytes(substream), |
240 | snd_pcm_lib_buffer_bytes(substream) / | 248 | snd_pcm_lib_buffer_bytes(substream) / |
241 | snd_pcm_lib_period_bytes(substream), | 249 | snd_pcm_lib_period_bytes(substream), |
242 | substream->runtime->periods); | 250 | substream->runtime->periods, |
251 | chip->fmt_size); | ||
243 | #endif | 252 | #endif |
244 | pcsp_sync_stop(chip); | ||
245 | chip->playback_ptr = 0; | ||
246 | chip->period_ptr = 0; | ||
247 | chip->fmt_size = | ||
248 | snd_pcm_format_physical_width(substream->runtime->format) >> 3; | ||
249 | chip->is_signed = snd_pcm_format_signed(substream->runtime->format); | ||
250 | return 0; | 253 | return 0; |
251 | } | 254 | } |
252 | 255 | ||
diff --git a/sound/drivers/pcsp/pcsp_mixer.c b/sound/drivers/pcsp/pcsp_mixer.c index 199b03377142..903bc846763f 100644 --- a/sound/drivers/pcsp/pcsp_mixer.c +++ b/sound/drivers/pcsp/pcsp_mixer.c | |||
@@ -72,7 +72,7 @@ static int pcsp_treble_put(struct snd_kcontrol *kcontrol, | |||
72 | if (treble != chip->treble) { | 72 | if (treble != chip->treble) { |
73 | chip->treble = treble; | 73 | chip->treble = treble; |
74 | #if PCSP_DEBUG | 74 | #if PCSP_DEBUG |
75 | printk(KERN_INFO "PCSP: rate set to %i\n", PCSP_RATE()); | 75 | printk(KERN_INFO "PCSP: rate set to %li\n", PCSP_RATE()); |
76 | #endif | 76 | #endif |
77 | changed = 1; | 77 | changed = 1; |
78 | } | 78 | } |
diff --git a/sound/parisc/harmony.c b/sound/parisc/harmony.c index e924492df21d..f47f9e226b08 100644 --- a/sound/parisc/harmony.c +++ b/sound/parisc/harmony.c | |||
@@ -624,6 +624,9 @@ snd_harmony_pcm_init(struct snd_harmony *h) | |||
624 | struct snd_pcm *pcm; | 624 | struct snd_pcm *pcm; |
625 | int err; | 625 | int err; |
626 | 626 | ||
627 | if (snd_BUG_ON(!h)) | ||
628 | return -EINVAL; | ||
629 | |||
627 | harmony_disable_interrupts(h); | 630 | harmony_disable_interrupts(h); |
628 | 631 | ||
629 | err = snd_pcm_new(h->card, "harmony", 0, 1, 1, &pcm); | 632 | err = snd_pcm_new(h->card, "harmony", 0, 1, 1, &pcm); |
@@ -865,11 +868,12 @@ snd_harmony_mixer_reset(struct snd_harmony *h) | |||
865 | static int __devinit | 868 | static int __devinit |
866 | snd_harmony_mixer_init(struct snd_harmony *h) | 869 | snd_harmony_mixer_init(struct snd_harmony *h) |
867 | { | 870 | { |
868 | struct snd_card *card = h->card; | 871 | struct snd_card *card; |
869 | int idx, err; | 872 | int idx, err; |
870 | 873 | ||
871 | if (snd_BUG_ON(!h)) | 874 | if (snd_BUG_ON(!h)) |
872 | return -EINVAL; | 875 | return -EINVAL; |
876 | card = h->card; | ||
873 | strcpy(card->mixername, "Harmony Gain control interface"); | 877 | strcpy(card->mixername, "Harmony Gain control interface"); |
874 | 878 | ||
875 | for (idx = 0; idx < HARMONY_CONTROLS; idx++) { | 879 | for (idx = 0; idx < HARMONY_CONTROLS; idx++) { |
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig index fb5ee3cc3968..75c602b5b132 100644 --- a/sound/pci/Kconfig +++ b/sound/pci/Kconfig | |||
@@ -259,7 +259,6 @@ config SND_CS5530 | |||
259 | 259 | ||
260 | config SND_CS5535AUDIO | 260 | config SND_CS5535AUDIO |
261 | tristate "CS5535/CS5536 Audio" | 261 | tristate "CS5535/CS5536 Audio" |
262 | depends on X86 && !X86_64 | ||
263 | select SND_PCM | 262 | select SND_PCM |
264 | select SND_AC97_CODEC | 263 | select SND_AC97_CODEC |
265 | help | 264 | help |
diff --git a/sound/pci/ali5451/ali5451.c b/sound/pci/ali5451/ali5451.c index b458d208720b..aaf4da68969c 100644 --- a/sound/pci/ali5451/ali5451.c +++ b/sound/pci/ali5451/ali5451.c | |||
@@ -973,7 +973,7 @@ static void snd_ali_free_voice(struct snd_ali * codec, | |||
973 | void *private_data; | 973 | void *private_data; |
974 | 974 | ||
975 | snd_ali_printk("free_voice: channel=%d\n",pvoice->number); | 975 | snd_ali_printk("free_voice: channel=%d\n",pvoice->number); |
976 | if (pvoice == NULL || !pvoice->use) | 976 | if (!pvoice->use) |
977 | return; | 977 | return; |
978 | snd_ali_clear_voices(codec, pvoice->number, pvoice->number); | 978 | snd_ali_clear_voices(codec, pvoice->number, pvoice->number); |
979 | spin_lock_irq(&codec->voice_alloc); | 979 | spin_lock_irq(&codec->voice_alloc); |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index c9ad182e1b4b..e340792f6cb3 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -2674,6 +2674,7 @@ static struct pci_device_id azx_ids[] = { | |||
2674 | { PCI_DEVICE(0x10de, 0x044b), .driver_data = AZX_DRIVER_NVIDIA }, | 2674 | { PCI_DEVICE(0x10de, 0x044b), .driver_data = AZX_DRIVER_NVIDIA }, |
2675 | { PCI_DEVICE(0x10de, 0x055c), .driver_data = AZX_DRIVER_NVIDIA }, | 2675 | { PCI_DEVICE(0x10de, 0x055c), .driver_data = AZX_DRIVER_NVIDIA }, |
2676 | { PCI_DEVICE(0x10de, 0x055d), .driver_data = AZX_DRIVER_NVIDIA }, | 2676 | { PCI_DEVICE(0x10de, 0x055d), .driver_data = AZX_DRIVER_NVIDIA }, |
2677 | { PCI_DEVICE(0x10de, 0x0590), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2677 | { PCI_DEVICE(0x10de, 0x0774), .driver_data = AZX_DRIVER_NVIDIA }, | 2678 | { PCI_DEVICE(0x10de, 0x0774), .driver_data = AZX_DRIVER_NVIDIA }, |
2678 | { PCI_DEVICE(0x10de, 0x0775), .driver_data = AZX_DRIVER_NVIDIA }, | 2679 | { PCI_DEVICE(0x10de, 0x0775), .driver_data = AZX_DRIVER_NVIDIA }, |
2679 | { PCI_DEVICE(0x10de, 0x0776), .driver_data = AZX_DRIVER_NVIDIA }, | 2680 | { PCI_DEVICE(0x10de, 0x0776), .driver_data = AZX_DRIVER_NVIDIA }, |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index c08ca660daba..ff20048504b6 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -965,6 +965,8 @@ static void alc_automute_pin(struct hda_codec *codec) | |||
965 | unsigned int nid = spec->autocfg.hp_pins[0]; | 965 | unsigned int nid = spec->autocfg.hp_pins[0]; |
966 | int i; | 966 | int i; |
967 | 967 | ||
968 | if (!nid) | ||
969 | return; | ||
968 | pincap = snd_hda_query_pin_caps(codec, nid); | 970 | pincap = snd_hda_query_pin_caps(codec, nid); |
969 | if (pincap & AC_PINCAP_TRIG_REQ) /* need trigger? */ | 971 | if (pincap & AC_PINCAP_TRIG_REQ) /* need trigger? */ |
970 | snd_hda_codec_read(codec, nid, 0, AC_VERB_SET_PIN_SENSE, 0); | 972 | snd_hda_codec_read(codec, nid, 0, AC_VERB_SET_PIN_SENSE, 0); |
@@ -12602,7 +12604,8 @@ static struct snd_pci_quirk alc268_cfg_tbl[] = { | |||
12602 | SND_PCI_QUIRK(0x1025, 0x015b, "Acer Aspire One", | 12604 | SND_PCI_QUIRK(0x1025, 0x015b, "Acer Aspire One", |
12603 | ALC268_ACER_ASPIRE_ONE), | 12605 | ALC268_ACER_ASPIRE_ONE), |
12604 | SND_PCI_QUIRK(0x1028, 0x0253, "Dell OEM", ALC268_DELL), | 12606 | SND_PCI_QUIRK(0x1028, 0x0253, "Dell OEM", ALC268_DELL), |
12605 | SND_PCI_QUIRK(0x1028, 0x02b0, "Dell Inspiron Mini9", ALC268_DELL), | 12607 | SND_PCI_QUIRK_MASK(0x1028, 0xfff0, 0x02b0, |
12608 | "Dell Inspiron Mini9/Vostro A90", ALC268_DELL), | ||
12606 | /* almost compatible with toshiba but with optional digital outs; | 12609 | /* almost compatible with toshiba but with optional digital outs; |
12607 | * auto-probing seems working fine | 12610 | * auto-probing seems working fine |
12608 | */ | 12611 | */ |
@@ -17374,7 +17377,7 @@ static int alc662_auto_create_extra_out(struct hda_codec *codec, hda_nid_t pin, | |||
17374 | 17377 | ||
17375 | /* create playback/capture controls for input pins */ | 17378 | /* create playback/capture controls for input pins */ |
17376 | #define alc662_auto_create_input_ctls \ | 17379 | #define alc662_auto_create_input_ctls \ |
17377 | alc880_auto_create_input_ctls | 17380 | alc882_auto_create_input_ctls |
17378 | 17381 | ||
17379 | static void alc662_auto_set_output_and_unmute(struct hda_codec *codec, | 17382 | static void alc662_auto_set_output_and_unmute(struct hda_codec *codec, |
17380 | hda_nid_t nid, int pin_type, | 17383 | hda_nid_t nid, int pin_type, |
diff --git a/sound/pci/via82xx.c b/sound/pci/via82xx.c index 91683a349035..8a332d2f615c 100644 --- a/sound/pci/via82xx.c +++ b/sound/pci/via82xx.c | |||
@@ -386,6 +386,7 @@ struct via82xx { | |||
386 | 386 | ||
387 | struct snd_pcm *pcms[2]; | 387 | struct snd_pcm *pcms[2]; |
388 | struct snd_rawmidi *rmidi; | 388 | struct snd_rawmidi *rmidi; |
389 | struct snd_kcontrol *dxs_controls[4]; | ||
389 | 390 | ||
390 | struct snd_ac97_bus *ac97_bus; | 391 | struct snd_ac97_bus *ac97_bus; |
391 | struct snd_ac97 *ac97; | 392 | struct snd_ac97 *ac97; |
@@ -1216,9 +1217,9 @@ static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev, | |||
1216 | 1217 | ||
1217 | 1218 | ||
1218 | /* | 1219 | /* |
1219 | * open callback for playback on via686 and via823x DSX | 1220 | * open callback for playback on via686 |
1220 | */ | 1221 | */ |
1221 | static int snd_via82xx_playback_open(struct snd_pcm_substream *substream) | 1222 | static int snd_via686_playback_open(struct snd_pcm_substream *substream) |
1222 | { | 1223 | { |
1223 | struct via82xx *chip = snd_pcm_substream_chip(substream); | 1224 | struct via82xx *chip = snd_pcm_substream_chip(substream); |
1224 | struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; | 1225 | struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number]; |
@@ -1230,6 +1231,32 @@ static int snd_via82xx_playback_open(struct snd_pcm_substream *substream) | |||
1230 | } | 1231 | } |
1231 | 1232 | ||
1232 | /* | 1233 | /* |
1234 | * open callback for playback on via823x DXS | ||
1235 | */ | ||
1236 | static int snd_via8233_playback_open(struct snd_pcm_substream *substream) | ||
1237 | { | ||
1238 | struct via82xx *chip = snd_pcm_substream_chip(substream); | ||
1239 | struct viadev *viadev; | ||
1240 | unsigned int stream; | ||
1241 | int err; | ||
1242 | |||
1243 | viadev = &chip->devs[chip->playback_devno + substream->number]; | ||
1244 | if ((err = snd_via82xx_pcm_open(chip, viadev, substream)) < 0) | ||
1245 | return err; | ||
1246 | stream = viadev->reg_offset / 0x10; | ||
1247 | if (chip->dxs_controls[stream]) { | ||
1248 | chip->playback_volume[stream][0] = 0; | ||
1249 | chip->playback_volume[stream][1] = 0; | ||
1250 | chip->dxs_controls[stream]->vd[0].access &= | ||
1251 | ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; | ||
1252 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | | ||
1253 | SNDRV_CTL_EVENT_MASK_INFO, | ||
1254 | &chip->dxs_controls[stream]->id); | ||
1255 | } | ||
1256 | return 0; | ||
1257 | } | ||
1258 | |||
1259 | /* | ||
1233 | * open callback for playback on via823x multi-channel | 1260 | * open callback for playback on via823x multi-channel |
1234 | */ | 1261 | */ |
1235 | static int snd_via8233_multi_open(struct snd_pcm_substream *substream) | 1262 | static int snd_via8233_multi_open(struct snd_pcm_substream *substream) |
@@ -1302,10 +1329,26 @@ static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream) | |||
1302 | return 0; | 1329 | return 0; |
1303 | } | 1330 | } |
1304 | 1331 | ||
1332 | static int snd_via8233_playback_close(struct snd_pcm_substream *substream) | ||
1333 | { | ||
1334 | struct via82xx *chip = snd_pcm_substream_chip(substream); | ||
1335 | struct viadev *viadev = substream->runtime->private_data; | ||
1336 | unsigned int stream; | ||
1337 | |||
1338 | stream = viadev->reg_offset / 0x10; | ||
1339 | if (chip->dxs_controls[stream]) { | ||
1340 | chip->dxs_controls[stream]->vd[0].access |= | ||
1341 | SNDRV_CTL_ELEM_ACCESS_INACTIVE; | ||
1342 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, | ||
1343 | &chip->dxs_controls[stream]->id); | ||
1344 | } | ||
1345 | return snd_via82xx_pcm_close(substream); | ||
1346 | } | ||
1347 | |||
1305 | 1348 | ||
1306 | /* via686 playback callbacks */ | 1349 | /* via686 playback callbacks */ |
1307 | static struct snd_pcm_ops snd_via686_playback_ops = { | 1350 | static struct snd_pcm_ops snd_via686_playback_ops = { |
1308 | .open = snd_via82xx_playback_open, | 1351 | .open = snd_via686_playback_open, |
1309 | .close = snd_via82xx_pcm_close, | 1352 | .close = snd_via82xx_pcm_close, |
1310 | .ioctl = snd_pcm_lib_ioctl, | 1353 | .ioctl = snd_pcm_lib_ioctl, |
1311 | .hw_params = snd_via82xx_hw_params, | 1354 | .hw_params = snd_via82xx_hw_params, |
@@ -1331,8 +1374,8 @@ static struct snd_pcm_ops snd_via686_capture_ops = { | |||
1331 | 1374 | ||
1332 | /* via823x DSX playback callbacks */ | 1375 | /* via823x DSX playback callbacks */ |
1333 | static struct snd_pcm_ops snd_via8233_playback_ops = { | 1376 | static struct snd_pcm_ops snd_via8233_playback_ops = { |
1334 | .open = snd_via82xx_playback_open, | 1377 | .open = snd_via8233_playback_open, |
1335 | .close = snd_via82xx_pcm_close, | 1378 | .close = snd_via8233_playback_close, |
1336 | .ioctl = snd_pcm_lib_ioctl, | 1379 | .ioctl = snd_pcm_lib_ioctl, |
1337 | .hw_params = snd_via82xx_hw_params, | 1380 | .hw_params = snd_via82xx_hw_params, |
1338 | .hw_free = snd_via82xx_hw_free, | 1381 | .hw_free = snd_via82xx_hw_free, |
@@ -1709,8 +1752,9 @@ static struct snd_kcontrol_new snd_via8233_dxs_volume_control __devinitdata = { | |||
1709 | .device = 0, | 1752 | .device = 0, |
1710 | /* .subdevice set later */ | 1753 | /* .subdevice set later */ |
1711 | .name = "PCM Playback Volume", | 1754 | .name = "PCM Playback Volume", |
1712 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | | 1755 | .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | |
1713 | SNDRV_CTL_ELEM_ACCESS_TLV_READ), | 1756 | SNDRV_CTL_ELEM_ACCESS_TLV_READ | |
1757 | SNDRV_CTL_ELEM_ACCESS_INACTIVE, | ||
1714 | .info = snd_via8233_dxs_volume_info, | 1758 | .info = snd_via8233_dxs_volume_info, |
1715 | .get = snd_via8233_dxs_volume_get, | 1759 | .get = snd_via8233_dxs_volume_get, |
1716 | .put = snd_via8233_dxs_volume_put, | 1760 | .put = snd_via8233_dxs_volume_put, |
@@ -1948,6 +1992,7 @@ static int __devinit snd_via8233_init_misc(struct via82xx *chip) | |||
1948 | err = snd_ctl_add(chip->card, kctl); | 1992 | err = snd_ctl_add(chip->card, kctl); |
1949 | if (err < 0) | 1993 | if (err < 0) |
1950 | return err; | 1994 | return err; |
1995 | chip->dxs_controls[i] = kctl; | ||
1951 | } | 1996 | } |
1952 | } | 1997 | } |
1953 | } | 1998 | } |
diff --git a/sound/pcmcia/pdaudiocf/pdaudiocf.c b/sound/pcmcia/pdaudiocf/pdaudiocf.c index 7dea74b71cf1..64b859925c0b 100644 --- a/sound/pcmcia/pdaudiocf/pdaudiocf.c +++ b/sound/pcmcia/pdaudiocf/pdaudiocf.c | |||
@@ -217,20 +217,25 @@ static void snd_pdacf_detach(struct pcmcia_device *link) | |||
217 | * configuration callback | 217 | * configuration callback |
218 | */ | 218 | */ |
219 | 219 | ||
220 | #define CS_CHECK(fn, ret) \ | ||
221 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) | ||
222 | |||
223 | static int pdacf_config(struct pcmcia_device *link) | 220 | static int pdacf_config(struct pcmcia_device *link) |
224 | { | 221 | { |
225 | struct snd_pdacf *pdacf = link->priv; | 222 | struct snd_pdacf *pdacf = link->priv; |
226 | int last_fn, last_ret; | 223 | int ret; |
227 | 224 | ||
228 | snd_printdd(KERN_DEBUG "pdacf_config called\n"); | 225 | snd_printdd(KERN_DEBUG "pdacf_config called\n"); |
229 | link->conf.ConfigIndex = 0x5; | 226 | link->conf.ConfigIndex = 0x5; |
230 | 227 | ||
231 | CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io)); | 228 | ret = pcmcia_request_io(link, &link->io); |
232 | CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); | 229 | if (ret) |
233 | CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); | 230 | goto failed; |
231 | |||
232 | ret = pcmcia_request_irq(link, &link->irq); | ||
233 | if (ret) | ||
234 | goto failed; | ||
235 | |||
236 | ret = pcmcia_request_configuration(link, &link->conf); | ||
237 | if (ret) | ||
238 | goto failed; | ||
234 | 239 | ||
235 | if (snd_pdacf_assign_resources(pdacf, link->io.BasePort1, link->irq.AssignedIRQ) < 0) | 240 | if (snd_pdacf_assign_resources(pdacf, link->io.BasePort1, link->irq.AssignedIRQ) < 0) |
236 | goto failed; | 241 | goto failed; |
@@ -238,8 +243,6 @@ static int pdacf_config(struct pcmcia_device *link) | |||
238 | link->dev_node = &pdacf->node; | 243 | link->dev_node = &pdacf->node; |
239 | return 0; | 244 | return 0; |
240 | 245 | ||
241 | cs_failed: | ||
242 | cs_error(link, last_fn, last_ret); | ||
243 | failed: | 246 | failed: |
244 | pcmcia_disable_device(link); | 247 | pcmcia_disable_device(link); |
245 | return -ENODEV; | 248 | return -ENODEV; |
diff --git a/sound/pcmcia/vx/vxpocket.c b/sound/pcmcia/vx/vxpocket.c index 7445cc8a47d3..1492744ad67f 100644 --- a/sound/pcmcia/vx/vxpocket.c +++ b/sound/pcmcia/vx/vxpocket.c | |||
@@ -213,14 +213,11 @@ static int snd_vxpocket_assign_resources(struct vx_core *chip, int port, int irq | |||
213 | * configuration callback | 213 | * configuration callback |
214 | */ | 214 | */ |
215 | 215 | ||
216 | #define CS_CHECK(fn, ret) \ | ||
217 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) | ||
218 | |||
219 | static int vxpocket_config(struct pcmcia_device *link) | 216 | static int vxpocket_config(struct pcmcia_device *link) |
220 | { | 217 | { |
221 | struct vx_core *chip = link->priv; | 218 | struct vx_core *chip = link->priv; |
222 | struct snd_vxpocket *vxp = (struct snd_vxpocket *)chip; | 219 | struct snd_vxpocket *vxp = (struct snd_vxpocket *)chip; |
223 | int last_fn, last_ret; | 220 | int ret; |
224 | 221 | ||
225 | snd_printdd(KERN_DEBUG "vxpocket_config called\n"); | 222 | snd_printdd(KERN_DEBUG "vxpocket_config called\n"); |
226 | 223 | ||
@@ -235,9 +232,17 @@ static int vxpocket_config(struct pcmcia_device *link) | |||
235 | strcpy(chip->card->driver, vxp440_hw.name); | 232 | strcpy(chip->card->driver, vxp440_hw.name); |
236 | } | 233 | } |
237 | 234 | ||
238 | CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io)); | 235 | ret = pcmcia_request_io(link, &link->io); |
239 | CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); | 236 | if (ret) |
240 | CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); | 237 | goto failed; |
238 | |||
239 | ret = pcmcia_request_irq(link, &link->irq); | ||
240 | if (ret) | ||
241 | goto failed; | ||
242 | |||
243 | ret = pcmcia_request_configuration(link, &link->conf); | ||
244 | if (ret) | ||
245 | goto failed; | ||
241 | 246 | ||
242 | chip->dev = &handle_to_dev(link); | 247 | chip->dev = &handle_to_dev(link); |
243 | snd_card_set_dev(chip->card, chip->dev); | 248 | snd_card_set_dev(chip->card, chip->dev); |
@@ -248,8 +253,6 @@ static int vxpocket_config(struct pcmcia_device *link) | |||
248 | link->dev_node = &vxp->node; | 253 | link->dev_node = &vxp->node; |
249 | return 0; | 254 | return 0; |
250 | 255 | ||
251 | cs_failed: | ||
252 | cs_error(link, last_fn, last_ret); | ||
253 | failed: | 256 | failed: |
254 | pcmcia_disable_device(link); | 257 | pcmcia_disable_device(link); |
255 | return -ENODEV; | 258 | return -ENODEV; |
diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig index 2dee9839be86..653a362425df 100644 --- a/sound/soc/omap/Kconfig +++ b/sound/soc/omap/Kconfig | |||
@@ -21,7 +21,18 @@ config SND_OMAP_SOC_AMS_DELTA | |||
21 | select SND_OMAP_SOC_MCBSP | 21 | select SND_OMAP_SOC_MCBSP |
22 | select SND_SOC_CX20442 | 22 | select SND_SOC_CX20442 |
23 | help | 23 | help |
24 | Say Y if you want to add support for SoC audio on Amstrad Delta. | 24 | Say Y if you want to add support for SoC audio device connected to |
25 | a handset and a speakerphone found on Amstrad E3 (Delta) videophone. | ||
26 | |||
27 | Note that in order to get those devices fully supported, you have to | ||
28 | build the kernel with standard serial port driver included and | ||
29 | configured for at least 4 ports. Then, from userspace, you must load | ||
30 | a line discipline #19 on the modem (ttyS3) serial line. The simplest | ||
31 | way to achieve this is to install util-linux-ng and use the included | ||
32 | ldattach utility. This can be started automatically from udev, | ||
33 | a simple rule like this one should do the trick (it does for me): | ||
34 | ACTION=="add", KERNEL=="controlC0", \ | ||
35 | RUN+="/usr/sbin/ldattach 19 /dev/ttyS3" | ||
25 | 36 | ||
26 | config SND_OMAP_SOC_OSK5912 | 37 | config SND_OMAP_SOC_OSK5912 |
27 | tristate "SoC Audio support for omap osk5912" | 38 | tristate "SoC Audio support for omap osk5912" |
diff --git a/sound/soc/s3c24xx/s3c24xx-pcm.c b/sound/soc/s3c24xx/s3c24xx-pcm.c index 5cbbdc80fde3..1f35c6fcf5fd 100644 --- a/sound/soc/s3c24xx/s3c24xx-pcm.c +++ b/sound/soc/s3c24xx/s3c24xx-pcm.c | |||
@@ -75,11 +75,19 @@ static void s3c24xx_pcm_enqueue(struct snd_pcm_substream *substream) | |||
75 | { | 75 | { |
76 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; | 76 | struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; |
77 | dma_addr_t pos = prtd->dma_pos; | 77 | dma_addr_t pos = prtd->dma_pos; |
78 | unsigned int limit; | ||
78 | int ret; | 79 | int ret; |
79 | 80 | ||
80 | pr_debug("Entered %s\n", __func__); | 81 | pr_debug("Entered %s\n", __func__); |
81 | 82 | ||
82 | while (prtd->dma_loaded < prtd->dma_limit) { | 83 | if (s3c_dma_has_circular()) { |
84 | limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period; | ||
85 | } else | ||
86 | limit = prtd->dma_limit; | ||
87 | |||
88 | pr_debug("%s: loaded %d, limit %d\n", __func__, prtd->dma_loaded, limit); | ||
89 | |||
90 | while (prtd->dma_loaded < limit) { | ||
83 | unsigned long len = prtd->dma_period; | 91 | unsigned long len = prtd->dma_period; |
84 | 92 | ||
85 | pr_debug("dma_loaded: %d\n", prtd->dma_loaded); | 93 | pr_debug("dma_loaded: %d\n", prtd->dma_loaded); |
@@ -123,7 +131,7 @@ static void s3c24xx_audio_buffdone(struct s3c2410_dma_chan *channel, | |||
123 | snd_pcm_period_elapsed(substream); | 131 | snd_pcm_period_elapsed(substream); |
124 | 132 | ||
125 | spin_lock(&prtd->lock); | 133 | spin_lock(&prtd->lock); |
126 | if (prtd->state & ST_RUNNING) { | 134 | if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) { |
127 | prtd->dma_loaded--; | 135 | prtd->dma_loaded--; |
128 | s3c24xx_pcm_enqueue(substream); | 136 | s3c24xx_pcm_enqueue(substream); |
129 | } | 137 | } |
@@ -164,6 +172,11 @@ static int s3c24xx_pcm_hw_params(struct snd_pcm_substream *substream, | |||
164 | printk(KERN_ERR "failed to get dma channel\n"); | 172 | printk(KERN_ERR "failed to get dma channel\n"); |
165 | return ret; | 173 | return ret; |
166 | } | 174 | } |
175 | |||
176 | /* use the circular buffering if we have it available. */ | ||
177 | if (s3c_dma_has_circular()) | ||
178 | s3c2410_dma_setflags(prtd->params->channel, | ||
179 | S3C2410_DMAF_CIRCULAR); | ||
167 | } | 180 | } |
168 | 181 | ||
169 | s3c2410_dma_set_buffdone_fn(prtd->params->channel, | 182 | s3c2410_dma_set_buffdone_fn(prtd->params->channel, |
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 7ff04ad2a97e..0a1b2f64bbee 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c | |||
@@ -834,6 +834,9 @@ EXPORT_SYMBOL_GPL(snd_soc_resume_device); | |||
834 | #define soc_resume NULL | 834 | #define soc_resume NULL |
835 | #endif | 835 | #endif |
836 | 836 | ||
837 | static struct snd_soc_dai_ops null_dai_ops = { | ||
838 | }; | ||
839 | |||
837 | static void snd_soc_instantiate_card(struct snd_soc_card *card) | 840 | static void snd_soc_instantiate_card(struct snd_soc_card *card) |
838 | { | 841 | { |
839 | struct platform_device *pdev = container_of(card->dev, | 842 | struct platform_device *pdev = container_of(card->dev, |
@@ -877,6 +880,11 @@ static void snd_soc_instantiate_card(struct snd_soc_card *card) | |||
877 | ac97 = 1; | 880 | ac97 = 1; |
878 | } | 881 | } |
879 | 882 | ||
883 | for (i = 0; i < card->num_links; i++) { | ||
884 | if (!card->dai_link[i].codec_dai->ops) | ||
885 | card->dai_link[i].codec_dai->ops = &null_dai_ops; | ||
886 | } | ||
887 | |||
880 | /* If we have AC97 in the system then don't wait for the | 888 | /* If we have AC97 in the system then don't wait for the |
881 | * codec. This will need revisiting if we have to handle | 889 | * codec. This will need revisiting if we have to handle |
882 | * systems with mixed AC97 and non-AC97 parts. Only check for | 890 | * systems with mixed AC97 and non-AC97 parts. Only check for |
@@ -2329,9 +2337,6 @@ static int snd_soc_unregister_card(struct snd_soc_card *card) | |||
2329 | return 0; | 2337 | return 0; |
2330 | } | 2338 | } |
2331 | 2339 | ||
2332 | static struct snd_soc_dai_ops null_dai_ops = { | ||
2333 | }; | ||
2334 | |||
2335 | /** | 2340 | /** |
2336 | * snd_soc_register_dai - Register a DAI with the ASoC core | 2341 | * snd_soc_register_dai - Register a DAI with the ASoC core |
2337 | * | 2342 | * |
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 8de6f9dec4a2..d89f6dc00908 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c | |||
@@ -2072,9 +2072,9 @@ int snd_soc_dapm_stream_event(struct snd_soc_codec *codec, | |||
2072 | } | 2072 | } |
2073 | } | 2073 | } |
2074 | } | 2074 | } |
2075 | mutex_unlock(&codec->mutex); | ||
2076 | 2075 | ||
2077 | dapm_power_widgets(codec, event); | 2076 | dapm_power_widgets(codec, event); |
2077 | mutex_unlock(&codec->mutex); | ||
2078 | dump_dapm(codec, __func__); | 2078 | dump_dapm(codec, __func__); |
2079 | return 0; | 2079 | return 0; |
2080 | } | 2080 | } |
diff --git a/sound/usb/caiaq/audio.c b/sound/usb/caiaq/audio.c index 121af0644fd9..86b2c3b92df5 100644 --- a/sound/usb/caiaq/audio.c +++ b/sound/usb/caiaq/audio.c | |||
@@ -62,10 +62,14 @@ static void | |||
62 | activate_substream(struct snd_usb_caiaqdev *dev, | 62 | activate_substream(struct snd_usb_caiaqdev *dev, |
63 | struct snd_pcm_substream *sub) | 63 | struct snd_pcm_substream *sub) |
64 | { | 64 | { |
65 | spin_lock(&dev->spinlock); | ||
66 | |||
65 | if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK) | 67 | if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK) |
66 | dev->sub_playback[sub->number] = sub; | 68 | dev->sub_playback[sub->number] = sub; |
67 | else | 69 | else |
68 | dev->sub_capture[sub->number] = sub; | 70 | dev->sub_capture[sub->number] = sub; |
71 | |||
72 | spin_unlock(&dev->spinlock); | ||
69 | } | 73 | } |
70 | 74 | ||
71 | static void | 75 | static void |
@@ -269,16 +273,22 @@ snd_usb_caiaq_pcm_pointer(struct snd_pcm_substream *sub) | |||
269 | { | 273 | { |
270 | int index = sub->number; | 274 | int index = sub->number; |
271 | struct snd_usb_caiaqdev *dev = snd_pcm_substream_chip(sub); | 275 | struct snd_usb_caiaqdev *dev = snd_pcm_substream_chip(sub); |
276 | snd_pcm_uframes_t ptr; | ||
277 | |||
278 | spin_lock(&dev->spinlock); | ||
272 | 279 | ||
273 | if (dev->input_panic || dev->output_panic) | 280 | if (dev->input_panic || dev->output_panic) |
274 | return SNDRV_PCM_POS_XRUN; | 281 | ptr = SNDRV_PCM_POS_XRUN; |
275 | 282 | ||
276 | if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK) | 283 | if (sub->stream == SNDRV_PCM_STREAM_PLAYBACK) |
277 | return bytes_to_frames(sub->runtime, | 284 | ptr = bytes_to_frames(sub->runtime, |
278 | dev->audio_out_buf_pos[index]); | 285 | dev->audio_out_buf_pos[index]); |
279 | else | 286 | else |
280 | return bytes_to_frames(sub->runtime, | 287 | ptr = bytes_to_frames(sub->runtime, |
281 | dev->audio_in_buf_pos[index]); | 288 | dev->audio_in_buf_pos[index]); |
289 | |||
290 | spin_unlock(&dev->spinlock); | ||
291 | return ptr; | ||
282 | } | 292 | } |
283 | 293 | ||
284 | /* operators for both playback and capture */ | 294 | /* operators for both playback and capture */ |
diff --git a/sound/usb/caiaq/device.c b/sound/usb/caiaq/device.c index 83e6c1312d47..a3f02dd97440 100644 --- a/sound/usb/caiaq/device.c +++ b/sound/usb/caiaq/device.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include "input.h" | 35 | #include "input.h" |
36 | 36 | ||
37 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); | 37 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); |
38 | MODULE_DESCRIPTION("caiaq USB audio, version 1.3.19"); | 38 | MODULE_DESCRIPTION("caiaq USB audio, version 1.3.20"); |
39 | MODULE_LICENSE("GPL"); | 39 | MODULE_LICENSE("GPL"); |
40 | MODULE_SUPPORTED_DEVICE("{{Native Instruments, RigKontrol2}," | 40 | MODULE_SUPPORTED_DEVICE("{{Native Instruments, RigKontrol2}," |
41 | "{Native Instruments, RigKontrol3}," | 41 | "{Native Instruments, RigKontrol3}," |
diff --git a/tools/perf/Makefile b/tools/perf/Makefile index 742a32eee8fc..7e190d522cd5 100644 --- a/tools/perf/Makefile +++ b/tools/perf/Makefile | |||
@@ -177,8 +177,7 @@ endif | |||
177 | # Include saner warnings here, which can catch bugs: | 177 | # Include saner warnings here, which can catch bugs: |
178 | # | 178 | # |
179 | 179 | ||
180 | EXTRA_WARNINGS := -Wcast-align | 180 | EXTRA_WARNINGS := -Wformat |
181 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wformat | ||
182 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wformat-security | 181 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wformat-security |
183 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wformat-y2k | 182 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wformat-y2k |
184 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wshadow | 183 | EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wshadow |
@@ -422,7 +421,11 @@ ifeq ($(uname_S),Darwin) | |||
422 | PTHREAD_LIBS = | 421 | PTHREAD_LIBS = |
423 | endif | 422 | endif |
424 | 423 | ||
425 | ifneq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ_MMAP, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o /dev/null $(ALL_LDFLAGS) > /dev/null 2>&1 && echo y"), y) | 424 | ifeq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o /dev/null $(ALL_LDFLAGS) > /dev/null 2>&1 && echo y"), y) |
425 | ifneq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ_MMAP, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o /dev/null $(ALL_LDFLAGS) > /dev/null 2>&1 && echo y"), y) | ||
426 | BASIC_CFLAGS += -DLIBELF_NO_MMAP | ||
427 | endif | ||
428 | else | ||
426 | msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel and glibc-dev[el]); | 429 | msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel and glibc-dev[el]); |
427 | endif | 430 | endif |
428 | 431 | ||
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c index 47ea0609a760..226f44a2357d 100644 --- a/tools/perf/util/symbol.c +++ b/tools/perf/util/symbol.c | |||
@@ -413,7 +413,7 @@ static int dso__synthesize_plt_symbols(struct dso *self, int v) | |||
413 | if (fd < 0) | 413 | if (fd < 0) |
414 | goto out; | 414 | goto out; |
415 | 415 | ||
416 | elf = elf_begin(fd, ELF_C_READ_MMAP, NULL); | 416 | elf = elf_begin(fd, PERF_ELF_C_READ_MMAP, NULL); |
417 | if (elf == NULL) | 417 | if (elf == NULL) |
418 | goto out_close; | 418 | goto out_close; |
419 | 419 | ||
@@ -533,7 +533,7 @@ static int dso__load_sym(struct dso *self, int fd, const char *name, | |||
533 | Elf *elf; | 533 | Elf *elf; |
534 | int nr = 0, kernel = !strcmp("[kernel]", self->name); | 534 | int nr = 0, kernel = !strcmp("[kernel]", self->name); |
535 | 535 | ||
536 | elf = elf_begin(fd, ELF_C_READ_MMAP, NULL); | 536 | elf = elf_begin(fd, PERF_ELF_C_READ_MMAP, NULL); |
537 | if (elf == NULL) { | 537 | if (elf == NULL) { |
538 | if (v) | 538 | if (v) |
539 | fprintf(stderr, "%s: cannot read %s ELF file.\n", | 539 | fprintf(stderr, "%s: cannot read %s ELF file.\n", |
@@ -675,7 +675,7 @@ static char *dso__read_build_id(struct dso *self, int v) | |||
675 | if (fd < 0) | 675 | if (fd < 0) |
676 | goto out; | 676 | goto out; |
677 | 677 | ||
678 | elf = elf_begin(fd, ELF_C_READ_MMAP, NULL); | 678 | elf = elf_begin(fd, PERF_ELF_C_READ_MMAP, NULL); |
679 | if (elf == NULL) { | 679 | if (elf == NULL) { |
680 | if (v) | 680 | if (v) |
681 | fprintf(stderr, "%s: cannot read %s ELF file.\n", | 681 | fprintf(stderr, "%s: cannot read %s ELF file.\n", |
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h index 6e8490716408..829da9edba64 100644 --- a/tools/perf/util/symbol.h +++ b/tools/perf/util/symbol.h | |||
@@ -27,6 +27,16 @@ static inline char *bfd_demangle(void __used *v, const char __used *c, | |||
27 | #endif | 27 | #endif |
28 | #endif | 28 | #endif |
29 | 29 | ||
30 | /* | ||
31 | * libelf 0.8.x and earlier do not support ELF_C_READ_MMAP; | ||
32 | * for newer versions we can use mmap to reduce memory usage: | ||
33 | */ | ||
34 | #ifdef LIBELF_NO_MMAP | ||
35 | # define PERF_ELF_C_READ_MMAP ELF_C_READ | ||
36 | #else | ||
37 | # define PERF_ELF_C_READ_MMAP ELF_C_READ_MMAP | ||
38 | #endif | ||
39 | |||
30 | #ifndef DMGL_PARAMS | 40 | #ifndef DMGL_PARAMS |
31 | #define DMGL_PARAMS (1 << 0) /* Include function args */ | 41 | #define DMGL_PARAMS (1 << 0) /* Include function args */ |
32 | #define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */ | 42 | #define DMGL_ANSI (1 << 1) /* Include const, volatile, etc */ |