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-rw-r--r--arch/tile/include/asm/cache.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
index c2b7dcfe5327..ee597147e5cd 100644
--- a/arch/tile/include/asm/cache.h
+++ b/arch/tile/include/asm/cache.h
@@ -20,7 +20,6 @@
20/* bytes per L1 data cache line */ 20/* bytes per L1 data cache line */
21#define L1_CACHE_SHIFT CHIP_L1D_LOG_LINE_SIZE() 21#define L1_CACHE_SHIFT CHIP_L1D_LOG_LINE_SIZE()
22#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 22#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
23#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1)) & -L1_CACHE_BYTES)
24 23
25/* bytes per L1 instruction cache line */ 24/* bytes per L1 instruction cache line */
26#define L1I_CACHE_SHIFT CHIP_L1I_LOG_LINE_SIZE() 25#define L1I_CACHE_SHIFT CHIP_L1I_LOG_LINE_SIZE()