diff options
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 15 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap-serial.h | 3 | ||||
-rw-r--r-- | drivers/serial/omap-serial.c | 6 | ||||
-rw-r--r-- | include/linux/serial_reg.h | 12 |
5 files changed, 28 insertions, 14 deletions
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index b78d0749f13d..c73d1b77b364 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -52,9 +52,11 @@ static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, | |||
52 | */ | 52 | */ |
53 | static void __init omap_serial_reset(struct plat_serial8250_port *p) | 53 | static void __init omap_serial_reset(struct plat_serial8250_port *p) |
54 | { | 54 | { |
55 | omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ | 55 | omap_serial_outp(p, UART_OMAP_MDR1, |
56 | UART_OMAP_MDR1_DISABLE); /* disable UART */ | ||
56 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ | 57 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ |
57 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ | 58 | omap_serial_outp(p, UART_OMAP_MDR1, |
59 | UART_OMAP_MDR1_16X_MODE); /* enable UART */ | ||
58 | 60 | ||
59 | if (!cpu_is_omap15xx()) { | 61 | if (!cpu_is_omap15xx()) { |
60 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); | 62 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index d17960a1be25..fa9806250b50 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -169,9 +169,9 @@ static inline void serial_write_reg(struct omap_uart_state *uart, int offset, | |||
169 | 169 | ||
170 | static inline void __init omap_uart_reset(struct omap_uart_state *uart) | 170 | static inline void __init omap_uart_reset(struct omap_uart_state *uart) |
171 | { | 171 | { |
172 | serial_write_reg(uart, UART_OMAP_MDR1, 0x07); | 172 | serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); |
173 | serial_write_reg(uart, UART_OMAP_SCR, 0x08); | 173 | serial_write_reg(uart, UART_OMAP_SCR, 0x08); |
174 | serial_write_reg(uart, UART_OMAP_MDR1, 0x00); | 174 | serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); |
175 | } | 175 | } |
176 | 176 | ||
177 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) | 177 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
@@ -247,9 +247,10 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) | |||
247 | uart->context_valid = 0; | 247 | uart->context_valid = 0; |
248 | 248 | ||
249 | if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) | 249 | if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) |
250 | omap_uart_mdr1_errataset(uart, 0x07, 0xA0); | 250 | omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0); |
251 | else | 251 | else |
252 | serial_write_reg(uart, UART_OMAP_MDR1, 0x7); | 252 | serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); |
253 | |||
253 | serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ | 254 | serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */ |
254 | efr = serial_read_reg(uart, UART_EFR); | 255 | efr = serial_read_reg(uart, UART_EFR); |
255 | serial_write_reg(uart, UART_EFR, UART_EFR_ECB); | 256 | serial_write_reg(uart, UART_EFR, UART_EFR_ECB); |
@@ -268,11 +269,13 @@ static void omap_uart_restore_context(struct omap_uart_state *uart) | |||
268 | serial_write_reg(uart, UART_OMAP_SCR, uart->scr); | 269 | serial_write_reg(uart, UART_OMAP_SCR, uart->scr); |
269 | serial_write_reg(uart, UART_OMAP_WER, uart->wer); | 270 | serial_write_reg(uart, UART_OMAP_WER, uart->wer); |
270 | serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc); | 271 | serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc); |
272 | |||
271 | if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) | 273 | if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS) |
272 | omap_uart_mdr1_errataset(uart, 0x00, 0xA1); | 274 | omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1); |
273 | else | 275 | else |
274 | /* UART 16x mode */ | 276 | /* UART 16x mode */ |
275 | serial_write_reg(uart, UART_OMAP_MDR1, 0x00); | 277 | serial_write_reg(uart, UART_OMAP_MDR1, |
278 | UART_OMAP_MDR1_16X_MODE); | ||
276 | } | 279 | } |
277 | #else | 280 | #else |
278 | static inline void omap_uart_save_context(struct omap_uart_state *uart) {} | 281 | static inline void omap_uart_save_context(struct omap_uart_state *uart) {} |
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index c8dae02f0704..6a1788014611 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h | |||
@@ -31,9 +31,6 @@ | |||
31 | */ | 31 | */ |
32 | #define OMAP_SERIAL_NAME "ttyO" | 32 | #define OMAP_SERIAL_NAME "ttyO" |
33 | 33 | ||
34 | #define OMAP_MDR1_DISABLE 0x07 | ||
35 | #define OMAP_MDR1_MODE13X 0x03 | ||
36 | #define OMAP_MDR1_MODE16X 0x00 | ||
37 | #define OMAP_MODE13X_SPEED 230400 | 34 | #define OMAP_MODE13X_SPEED 230400 |
38 | 35 | ||
39 | /* | 36 | /* |
diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c index 14365f72b664..03a96db67de4 100644 --- a/drivers/serial/omap-serial.c +++ b/drivers/serial/omap-serial.c | |||
@@ -753,7 +753,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
753 | 753 | ||
754 | /* Protocol, Baud Rate, and Interrupt Settings */ | 754 | /* Protocol, Baud Rate, and Interrupt Settings */ |
755 | 755 | ||
756 | serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_DISABLE); | 756 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); |
757 | serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); | 757 | serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB); |
758 | 758 | ||
759 | up->efr = serial_in(up, UART_EFR); | 759 | up->efr = serial_in(up, UART_EFR); |
@@ -774,9 +774,9 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, | |||
774 | serial_out(up, UART_LCR, cval); | 774 | serial_out(up, UART_LCR, cval); |
775 | 775 | ||
776 | if (baud > 230400 && baud != 3000000) | 776 | if (baud > 230400 && baud != 3000000) |
777 | serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE13X); | 777 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE); |
778 | else | 778 | else |
779 | serial_out(up, UART_OMAP_MDR1, OMAP_MDR1_MODE16X); | 779 | serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); |
780 | 780 | ||
781 | /* Hardware Flow Control Configuration */ | 781 | /* Hardware Flow Control Configuration */ |
782 | 782 | ||
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index c7a0ce11cd47..6f3823474e6c 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h | |||
@@ -341,5 +341,17 @@ | |||
341 | #define UART_OMAP_SYSS 0x16 /* System status register */ | 341 | #define UART_OMAP_SYSS 0x16 /* System status register */ |
342 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ | 342 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ |
343 | 343 | ||
344 | /* | ||
345 | * These are the definitions for the MDR1 register | ||
346 | */ | ||
347 | #define UART_OMAP_MDR1_16X_MODE 0x00 /* UART 16x mode */ | ||
348 | #define UART_OMAP_MDR1_SIR_MODE 0x01 /* SIR mode */ | ||
349 | #define UART_OMAP_MDR1_16X_ABAUD_MODE 0x02 /* UART 16x auto-baud */ | ||
350 | #define UART_OMAP_MDR1_13X_MODE 0x03 /* UART 13x mode */ | ||
351 | #define UART_OMAP_MDR1_MIR_MODE 0x04 /* MIR mode */ | ||
352 | #define UART_OMAP_MDR1_FIR_MODE 0x05 /* FIR mode */ | ||
353 | #define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */ | ||
354 | #define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */ | ||
355 | |||
344 | #endif /* _LINUX_SERIAL_REG_H */ | 356 | #endif /* _LINUX_SERIAL_REG_H */ |
345 | 357 | ||