diff options
-rw-r--r-- | arch/arm/mach-omap2/clock33xx_data.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sr_device.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-omap2/vp.c | 13 | ||||
-rw-r--r-- | drivers/power/avs/smartreflex.c | 54 | ||||
-rw-r--r-- | include/linux/power/smartreflex.h | 14 |
8 files changed, 67 insertions, 65 deletions
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c index 1a45d6bd2539..88fa9494d5e9 100644 --- a/arch/arm/mach-omap2/clock33xx_data.c +++ b/arch/arm/mach-omap2/clock33xx_data.c | |||
@@ -548,16 +548,16 @@ static struct clk mcasp1_fck = { | |||
548 | .recalc = &followparent_recalc, | 548 | .recalc = &followparent_recalc, |
549 | }; | 549 | }; |
550 | 550 | ||
551 | static struct clk smartreflex0_fck = { | 551 | static struct clk smartreflex_mpu_fck = { |
552 | .name = "smartreflex0_fck", | 552 | .name = "smartreflex_mpu_fck", |
553 | .clkdm_name = "l4_wkup_clkdm", | 553 | .clkdm_name = "l4_wkup_clkdm", |
554 | .parent = &sys_clkin_ck, | 554 | .parent = &sys_clkin_ck, |
555 | .ops = &clkops_null, | 555 | .ops = &clkops_null, |
556 | .recalc = &followparent_recalc, | 556 | .recalc = &followparent_recalc, |
557 | }; | 557 | }; |
558 | 558 | ||
559 | static struct clk smartreflex1_fck = { | 559 | static struct clk smartreflex_core_fck = { |
560 | .name = "smartreflex1_fck", | 560 | .name = "smartreflex_core_fck", |
561 | .clkdm_name = "l4_wkup_clkdm", | 561 | .clkdm_name = "l4_wkup_clkdm", |
562 | .parent = &sys_clkin_ck, | 562 | .parent = &sys_clkin_ck, |
563 | .ops = &clkops_null, | 563 | .ops = &clkops_null, |
@@ -1039,8 +1039,8 @@ static struct omap_clk am33xx_clks[] = { | |||
1039 | CLK(NULL, "mcasp1_fck", &mcasp1_fck, CK_AM33XX), | 1039 | CLK(NULL, "mcasp1_fck", &mcasp1_fck, CK_AM33XX), |
1040 | CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), | 1040 | CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), |
1041 | CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), | 1041 | CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), |
1042 | CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), | 1042 | CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_AM33XX), |
1043 | CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), | 1043 | CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_AM33XX), |
1044 | CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX), | 1044 | CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX), |
1045 | CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX), | 1045 | CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX), |
1046 | CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX), | 1046 | CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX), |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 1f42c9d5ecf3..d1786fca6919 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = { | |||
3050 | /* SR clocks */ | 3050 | /* SR clocks */ |
3051 | 3051 | ||
3052 | /* SmartReflex fclk (VDD1) */ | 3052 | /* SmartReflex fclk (VDD1) */ |
3053 | static struct clk sr1_fck = { | 3053 | static struct clk smartreflex_mpu_iva_fck = { |
3054 | .name = "sr1_fck", | 3054 | .name = "smartreflex_mpu_iva_fck", |
3055 | .ops = &clkops_omap2_dflt_wait, | 3055 | .ops = &clkops_omap2_dflt_wait, |
3056 | .parent = &sys_ck, | 3056 | .parent = &sys_ck, |
3057 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), | 3057 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), |
@@ -3061,8 +3061,8 @@ static struct clk sr1_fck = { | |||
3061 | }; | 3061 | }; |
3062 | 3062 | ||
3063 | /* SmartReflex fclk (VDD2) */ | 3063 | /* SmartReflex fclk (VDD2) */ |
3064 | static struct clk sr2_fck = { | 3064 | static struct clk smartreflex_core_fck = { |
3065 | .name = "sr2_fck", | 3065 | .name = "smartreflex_core_fck", |
3066 | .ops = &clkops_omap2_dflt_wait, | 3066 | .ops = &clkops_omap2_dflt_wait, |
3067 | .parent = &sys_ck, | 3067 | .parent = &sys_ck, |
3068 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), | 3068 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), |
@@ -3478,8 +3478,8 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3478 | CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX), | 3478 | CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX), |
3479 | CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX), | 3479 | CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX), |
3480 | CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX), | 3480 | CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX), |
3481 | CLK(NULL, "sr1_fck", &sr1_fck, CK_34XX | CK_36XX), | 3481 | CLK(NULL, "smartreflex_mpu_iva_fck", &smartreflex_mpu_iva_fck, CK_34XX | CK_36XX), |
3482 | CLK(NULL, "sr2_fck", &sr2_fck, CK_34XX | CK_36XX), | 3482 | CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_34XX | CK_36XX), |
3483 | CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_34XX | CK_36XX), | 3483 | CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_34XX | CK_36XX), |
3484 | CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX), | 3484 | CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX), |
3485 | CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX), | 3485 | CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX), |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 6efc30c961a5..dc92e5f4e78e 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3226,9 +3226,9 @@ static struct omap_clk omap44xx_clks[] = { | |||
3226 | CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_443X), | 3226 | CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_443X), |
3227 | CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_443X), | 3227 | CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_443X), |
3228 | CLK(NULL, "slimbus2_fck", &slimbus2_fck, CK_443X), | 3228 | CLK(NULL, "slimbus2_fck", &slimbus2_fck, CK_443X), |
3229 | CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X), | 3229 | CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X), |
3230 | CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X), | 3230 | CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X), |
3231 | CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X), | 3231 | CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X), |
3232 | CLK(NULL, "timer1_fck", &timer1_fck, CK_443X), | 3232 | CLK(NULL, "timer1_fck", &timer1_fck, CK_443X), |
3233 | CLK(NULL, "timer10_fck", &timer10_fck, CK_443X), | 3233 | CLK(NULL, "timer10_fck", &timer10_fck, CK_443X), |
3234 | CLK(NULL, "timer11_fck", &timer11_fck, CK_443X), | 3234 | CLK(NULL, "timer11_fck", &timer11_fck, CK_443X), |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index f67b7ee07dd4..9693a187ff66 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1406,7 +1406,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { | |||
1406 | static struct omap_hwmod omap34xx_sr1_hwmod = { | 1406 | static struct omap_hwmod omap34xx_sr1_hwmod = { |
1407 | .name = "smartreflex_mpu_iva", | 1407 | .name = "smartreflex_mpu_iva", |
1408 | .class = &omap34xx_smartreflex_hwmod_class, | 1408 | .class = &omap34xx_smartreflex_hwmod_class, |
1409 | .main_clk = "sr1_fck", | 1409 | .main_clk = "smartreflex_mpu_iva_fck", |
1410 | .prcm = { | 1410 | .prcm = { |
1411 | .omap2 = { | 1411 | .omap2 = { |
1412 | .prcm_reg_id = 1, | 1412 | .prcm_reg_id = 1, |
@@ -1424,7 +1424,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { | |||
1424 | static struct omap_hwmod omap36xx_sr1_hwmod = { | 1424 | static struct omap_hwmod omap36xx_sr1_hwmod = { |
1425 | .name = "smartreflex_mpu_iva", | 1425 | .name = "smartreflex_mpu_iva", |
1426 | .class = &omap36xx_smartreflex_hwmod_class, | 1426 | .class = &omap36xx_smartreflex_hwmod_class, |
1427 | .main_clk = "sr1_fck", | 1427 | .main_clk = "smartreflex_mpu_iva_fck", |
1428 | .prcm = { | 1428 | .prcm = { |
1429 | .omap2 = { | 1429 | .omap2 = { |
1430 | .prcm_reg_id = 1, | 1430 | .prcm_reg_id = 1, |
@@ -1451,7 +1451,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { | |||
1451 | static struct omap_hwmod omap34xx_sr2_hwmod = { | 1451 | static struct omap_hwmod omap34xx_sr2_hwmod = { |
1452 | .name = "smartreflex_core", | 1452 | .name = "smartreflex_core", |
1453 | .class = &omap34xx_smartreflex_hwmod_class, | 1453 | .class = &omap34xx_smartreflex_hwmod_class, |
1454 | .main_clk = "sr2_fck", | 1454 | .main_clk = "smartreflex_core_fck", |
1455 | .prcm = { | 1455 | .prcm = { |
1456 | .omap2 = { | 1456 | .omap2 = { |
1457 | .prcm_reg_id = 1, | 1457 | .prcm_reg_id = 1, |
@@ -1469,7 +1469,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { | |||
1469 | static struct omap_hwmod omap36xx_sr2_hwmod = { | 1469 | static struct omap_hwmod omap36xx_sr2_hwmod = { |
1470 | .name = "smartreflex_core", | 1470 | .name = "smartreflex_core", |
1471 | .class = &omap36xx_smartreflex_hwmod_class, | 1471 | .class = &omap36xx_smartreflex_hwmod_class, |
1472 | .main_clk = "sr2_fck", | 1472 | .main_clk = "smartreflex_core_fck", |
1473 | .prcm = { | 1473 | .prcm = { |
1474 | .omap2 = { | 1474 | .omap2 = { |
1475 | .prcm_reg_id = 1, | 1475 | .prcm_reg_id = 1, |
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index f8217a5a4a26..a04bc25a1d26 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c | |||
@@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) | |||
121 | sr_data->senn_mod = 0x1; | 121 | sr_data->senn_mod = 0x1; |
122 | sr_data->senp_mod = 0x1; | 122 | sr_data->senp_mod = 0x1; |
123 | 123 | ||
124 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
125 | sr_data->err_weight = OMAP3430_SR_ERRWEIGHT; | ||
126 | sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | ||
127 | sr_data->accum_data = OMAP3430_SR_ACCUMDATA; | ||
128 | if (!(strcmp(sr_data->name, "smartreflex_mpu"))) { | ||
129 | sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | ||
130 | sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | ||
131 | } else { | ||
132 | sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | ||
133 | sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | ||
134 | } | ||
135 | } | ||
136 | |||
124 | sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); | 137 | sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); |
125 | if (!sr_data->voltdm) { | 138 | if (!sr_data->voltdm) { |
126 | pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", | 139 | pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", |
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 394a253c4cd4..a3c30655aa30 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c | |||
@@ -140,7 +140,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | |||
140 | udelay(1); | 140 | udelay(1); |
141 | } | 141 | } |
142 | if (timeout >= VP_TRANXDONE_TIMEOUT) { | 142 | if (timeout >= VP_TRANXDONE_TIMEOUT) { |
143 | pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted", | 143 | pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted\n", |
144 | __func__, voltdm->name); | 144 | __func__, voltdm->name); |
145 | return -ETIMEDOUT; | 145 | return -ETIMEDOUT; |
146 | } | 146 | } |
@@ -199,7 +199,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | |||
199 | u32 vpconfig, volt; | 199 | u32 vpconfig, volt; |
200 | 200 | ||
201 | if (!voltdm || IS_ERR(voltdm)) { | 201 | if (!voltdm || IS_ERR(voltdm)) { |
202 | pr_warning("%s: VDD specified does not exist!\n", __func__); | 202 | pr_warn("%s: VDD specified does not exist!\n", __func__); |
203 | return; | 203 | return; |
204 | } | 204 | } |
205 | 205 | ||
@@ -216,8 +216,8 @@ void omap_vp_enable(struct voltagedomain *voltdm) | |||
216 | 216 | ||
217 | volt = voltdm_get_voltage(voltdm); | 217 | volt = voltdm_get_voltage(voltdm); |
218 | if (!volt) { | 218 | if (!volt) { |
219 | pr_warning("%s: unable to find current voltage for %s\n", | 219 | pr_warn("%s: unable to find current voltage for %s\n", |
220 | __func__, voltdm->name); | 220 | __func__, voltdm->name); |
221 | return; | 221 | return; |
222 | } | 222 | } |
223 | 223 | ||
@@ -244,7 +244,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | |||
244 | int timeout; | 244 | int timeout; |
245 | 245 | ||
246 | if (!voltdm || IS_ERR(voltdm)) { | 246 | if (!voltdm || IS_ERR(voltdm)) { |
247 | pr_warning("%s: VDD specified does not exist!\n", __func__); | 247 | pr_warn("%s: VDD specified does not exist!\n", __func__); |
248 | return; | 248 | return; |
249 | } | 249 | } |
250 | 250 | ||
@@ -274,8 +274,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | |||
274 | VP_IDLE_TIMEOUT, timeout); | 274 | VP_IDLE_TIMEOUT, timeout); |
275 | 275 | ||
276 | if (timeout >= VP_IDLE_TIMEOUT) | 276 | if (timeout >= VP_IDLE_TIMEOUT) |
277 | pr_warning("%s: vdd_%s idle timedout\n", | 277 | pr_warn("%s: vdd_%s idle timedout\n", __func__, voltdm->name); |
278 | __func__, voltdm->name); | ||
279 | 278 | ||
280 | vp->enabled = false; | 279 | vp->enabled = false; |
281 | 280 | ||
diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c index 24768a27e1d8..4c4519e59be4 100644 --- a/drivers/power/avs/smartreflex.c +++ b/drivers/power/avs/smartreflex.c | |||
@@ -130,24 +130,21 @@ static irqreturn_t sr_interrupt(int irq, void *data) | |||
130 | 130 | ||
131 | static void sr_set_clk_length(struct omap_sr *sr) | 131 | static void sr_set_clk_length(struct omap_sr *sr) |
132 | { | 132 | { |
133 | struct clk *sys_ck; | 133 | struct clk *fck; |
134 | u32 sys_clk_speed; | 134 | u32 fclk_speed; |
135 | 135 | ||
136 | if (cpu_is_omap34xx()) | 136 | fck = clk_get(&sr->pdev->dev, "fck"); |
137 | sys_ck = clk_get(NULL, "sys_ck"); | ||
138 | else | ||
139 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | ||
140 | 137 | ||
141 | if (IS_ERR(sys_ck)) { | 138 | if (IS_ERR(fck)) { |
142 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | 139 | dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n", |
143 | __func__); | 140 | __func__, dev_name(&sr->pdev->dev)); |
144 | return; | 141 | return; |
145 | } | 142 | } |
146 | 143 | ||
147 | sys_clk_speed = clk_get_rate(sys_ck); | 144 | fclk_speed = clk_get_rate(fck); |
148 | clk_put(sys_ck); | 145 | clk_put(fck); |
149 | 146 | ||
150 | switch (sys_clk_speed) { | 147 | switch (fclk_speed) { |
151 | case 12000000: | 148 | case 12000000: |
152 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | 149 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; |
153 | break; | 150 | break; |
@@ -164,34 +161,12 @@ static void sr_set_clk_length(struct omap_sr *sr) | |||
164 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | 161 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; |
165 | break; | 162 | break; |
166 | default: | 163 | default: |
167 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | 164 | dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n", |
168 | __func__, sys_clk_speed); | 165 | __func__, fclk_speed); |
169 | break; | 166 | break; |
170 | } | 167 | } |
171 | } | 168 | } |
172 | 169 | ||
173 | static void sr_set_regfields(struct omap_sr *sr) | ||
174 | { | ||
175 | /* | ||
176 | * For time being these values are defined in smartreflex.h | ||
177 | * and populated during init. May be they can be moved to board | ||
178 | * file or pmic specific data structure. In that case these structure | ||
179 | * fields will have to be populated using the pdata or pmic structure. | ||
180 | */ | ||
181 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
182 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; | ||
183 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | ||
184 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | ||
185 | if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) { | ||
186 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | ||
187 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | ||
188 | } else { | ||
189 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | ||
190 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | ||
191 | } | ||
192 | } | ||
193 | } | ||
194 | |||
195 | static void sr_start_vddautocomp(struct omap_sr *sr) | 170 | static void sr_start_vddautocomp(struct omap_sr *sr) |
196 | { | 171 | { |
197 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | 172 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { |
@@ -924,8 +899,14 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
924 | sr_info->nvalue_count = pdata->nvalue_count; | 899 | sr_info->nvalue_count = pdata->nvalue_count; |
925 | sr_info->senn_mod = pdata->senn_mod; | 900 | sr_info->senn_mod = pdata->senn_mod; |
926 | sr_info->senp_mod = pdata->senp_mod; | 901 | sr_info->senp_mod = pdata->senp_mod; |
902 | sr_info->err_weight = pdata->err_weight; | ||
903 | sr_info->err_maxlimit = pdata->err_maxlimit; | ||
904 | sr_info->accum_data = pdata->accum_data; | ||
905 | sr_info->senn_avgweight = pdata->senn_avgweight; | ||
906 | sr_info->senp_avgweight = pdata->senp_avgweight; | ||
927 | sr_info->autocomp_active = false; | 907 | sr_info->autocomp_active = false; |
928 | sr_info->ip_type = pdata->ip_type; | 908 | sr_info->ip_type = pdata->ip_type; |
909 | |||
929 | sr_info->base = ioremap(mem->start, resource_size(mem)); | 910 | sr_info->base = ioremap(mem->start, resource_size(mem)); |
930 | if (!sr_info->base) { | 911 | if (!sr_info->base) { |
931 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | 912 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); |
@@ -937,7 +918,6 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
937 | sr_info->irq = irq->start; | 918 | sr_info->irq = irq->start; |
938 | 919 | ||
939 | sr_set_clk_length(sr_info); | 920 | sr_set_clk_length(sr_info); |
940 | sr_set_regfields(sr_info); | ||
941 | 921 | ||
942 | list_add(&sr_info->node, &sr_list); | 922 | list_add(&sr_info->node, &sr_list); |
943 | 923 | ||
diff --git a/include/linux/power/smartreflex.h b/include/linux/power/smartreflex.h index 4a496ebc7d73..c0f44c2b006d 100644 --- a/include/linux/power/smartreflex.h +++ b/include/linux/power/smartreflex.h | |||
@@ -260,8 +260,13 @@ struct omap_sr_nvalue_table { | |||
260 | * | 260 | * |
261 | * @name: instance name | 261 | * @name: instance name |
262 | * @ip_type: Smartreflex IP type. | 262 | * @ip_type: Smartreflex IP type. |
263 | * @senp_mod: SENPENABLE value for the sr | 263 | * @senp_mod: SENPENABLE value of the sr CONFIG register |
264 | * @senn_mod: SENNENABLE value for sr | 264 | * @senn_mod: SENNENABLE value for sr CONFIG register |
265 | * @err_weight ERRWEIGHT value of the sr ERRCONFIG register | ||
266 | * @err_maxlimit ERRMAXLIMIT value of the sr ERRCONFIG register | ||
267 | * @accum_data ACCUMDATA value of the sr CONFIG register | ||
268 | * @senn_avgweight SENNAVGWEIGHT value of the sr AVGWEIGHT register | ||
269 | * @senp_avgweight SENPAVGWEIGHT value of the sr AVGWEIGHT register | ||
265 | * @nvalue_count: Number of distinct nvalues in the nvalue table | 270 | * @nvalue_count: Number of distinct nvalues in the nvalue table |
266 | * @enable_on_init: whether this sr module needs to enabled at | 271 | * @enable_on_init: whether this sr module needs to enabled at |
267 | * boot up or not. | 272 | * boot up or not. |
@@ -274,6 +279,11 @@ struct omap_sr_data { | |||
274 | int ip_type; | 279 | int ip_type; |
275 | u32 senp_mod; | 280 | u32 senp_mod; |
276 | u32 senn_mod; | 281 | u32 senn_mod; |
282 | u32 err_weight; | ||
283 | u32 err_maxlimit; | ||
284 | u32 accum_data; | ||
285 | u32 senn_avgweight; | ||
286 | u32 senp_avgweight; | ||
277 | int nvalue_count; | 287 | int nvalue_count; |
278 | bool enable_on_init; | 288 | bool enable_on_init; |
279 | struct omap_sr_nvalue_table *nvalue_table; | 289 | struct omap_sr_nvalue_table *nvalue_table; |