diff options
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 6f7faf08b925..57c59b6ad5ea 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -1697,11 +1697,16 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type) | |||
1697 | if (tmpReg & | 1697 | if (tmpReg & |
1698 | (AR_INTR_SYNC_LOCAL_TIMEOUT | | 1698 | (AR_INTR_SYNC_LOCAL_TIMEOUT | |
1699 | AR_INTR_SYNC_RADM_CPL_TIMEOUT)) { | 1699 | AR_INTR_SYNC_RADM_CPL_TIMEOUT)) { |
1700 | u32 val; | ||
1700 | REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0); | 1701 | REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0); |
1701 | REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); | 1702 | |
1702 | } else { | 1703 | val = AR_RC_HOSTIF; |
1704 | if (!AR_SREV_9300_20_OR_LATER(ah)) | ||
1705 | val |= AR_RC_AHB; | ||
1706 | REG_WRITE(ah, AR_RC, val); | ||
1707 | |||
1708 | } else if (!AR_SREV_9300_20_OR_LATER(ah)) | ||
1703 | REG_WRITE(ah, AR_RC, AR_RC_AHB); | 1709 | REG_WRITE(ah, AR_RC, AR_RC_AHB); |
1704 | } | ||
1705 | 1710 | ||
1706 | rst_flags = AR_RTC_RC_MAC_WARM; | 1711 | rst_flags = AR_RTC_RC_MAC_WARM; |
1707 | if (type == ATH9K_RESET_COLD) | 1712 | if (type == ATH9K_RESET_COLD) |
@@ -1732,7 +1737,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah) | |||
1732 | REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN | | 1737 | REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN | |
1733 | AR_RTC_FORCE_WAKE_ON_INT); | 1738 | AR_RTC_FORCE_WAKE_ON_INT); |
1734 | 1739 | ||
1735 | if (!AR_SREV_9100(ah)) | 1740 | if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah)) |
1736 | REG_WRITE(ah, AR_RC, AR_RC_AHB); | 1741 | REG_WRITE(ah, AR_RC, AR_RC_AHB); |
1737 | 1742 | ||
1738 | REG_WRITE(ah, AR_RTC_RESET, 0); | 1743 | REG_WRITE(ah, AR_RTC_RESET, 0); |
@@ -2413,15 +2418,24 @@ EXPORT_SYMBOL(ath9k_hw_keyisvalid); | |||
2413 | /* Power Management (Chipset) */ | 2418 | /* Power Management (Chipset) */ |
2414 | /******************************/ | 2419 | /******************************/ |
2415 | 2420 | ||
2421 | /* | ||
2422 | * Notify Power Mgt is disabled in self-generated frames. | ||
2423 | * If requested, force chip to sleep. | ||
2424 | */ | ||
2416 | static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip) | 2425 | static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip) |
2417 | { | 2426 | { |
2418 | REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); | 2427 | REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); |
2419 | if (setChip) { | 2428 | if (setChip) { |
2429 | /* | ||
2430 | * Clear the RTC force wake bit to allow the | ||
2431 | * mac to go to sleep. | ||
2432 | */ | ||
2420 | REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, | 2433 | REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, |
2421 | AR_RTC_FORCE_WAKE_EN); | 2434 | AR_RTC_FORCE_WAKE_EN); |
2422 | if (!AR_SREV_9100(ah)) | 2435 | if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah)) |
2423 | REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); | 2436 | REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); |
2424 | 2437 | ||
2438 | /* Shutdown chip. Active low */ | ||
2425 | if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah)) | 2439 | if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah)) |
2426 | REG_CLR_BIT(ah, (AR_RTC_RESET), | 2440 | REG_CLR_BIT(ah, (AR_RTC_RESET), |
2427 | AR_RTC_RESET_EN); | 2441 | AR_RTC_RESET_EN); |