diff options
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 47 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ring.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 12 |
11 files changed, 95 insertions, 59 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index ce7036ae9f5a..34be795de173 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -3414,7 +3414,6 @@ u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, | |||
3414 | cik_srbm_select(rdev, 0, 0, 0, 0); | 3414 | cik_srbm_select(rdev, 0, 0, 0, 0); |
3415 | mutex_unlock(&rdev->srbm_mutex); | 3415 | mutex_unlock(&rdev->srbm_mutex); |
3416 | } | 3416 | } |
3417 | rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift; | ||
3418 | 3417 | ||
3419 | return rptr; | 3418 | return rptr; |
3420 | } | 3419 | } |
@@ -3433,7 +3432,6 @@ u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, | |||
3433 | cik_srbm_select(rdev, 0, 0, 0, 0); | 3432 | cik_srbm_select(rdev, 0, 0, 0, 0); |
3434 | mutex_unlock(&rdev->srbm_mutex); | 3433 | mutex_unlock(&rdev->srbm_mutex); |
3435 | } | 3434 | } |
3436 | wptr = (wptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift; | ||
3437 | 3435 | ||
3438 | return wptr; | 3436 | return wptr; |
3439 | } | 3437 | } |
@@ -3441,10 +3439,8 @@ u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, | |||
3441 | void cik_compute_ring_set_wptr(struct radeon_device *rdev, | 3439 | void cik_compute_ring_set_wptr(struct radeon_device *rdev, |
3442 | struct radeon_ring *ring) | 3440 | struct radeon_ring *ring) |
3443 | { | 3441 | { |
3444 | u32 wptr = (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask; | 3442 | rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(ring->wptr); |
3445 | 3443 | WDOORBELL32(ring->doorbell_offset, ring->wptr); | |
3446 | rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(wptr); | ||
3447 | WDOORBELL32(ring->doorbell_offset, wptr); | ||
3448 | } | 3444 | } |
3449 | 3445 | ||
3450 | /** | 3446 | /** |
@@ -7649,7 +7645,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7649 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 7645 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
7650 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 7646 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
7651 | CP_RB0_RPTR, CP_RB0_WPTR, | 7647 | CP_RB0_RPTR, CP_RB0_WPTR, |
7652 | 0, 0xfffff, RADEON_CP_PACKET2); | 7648 | RADEON_CP_PACKET2); |
7653 | if (r) | 7649 | if (r) |
7654 | return r; | 7650 | return r; |
7655 | 7651 | ||
@@ -7658,7 +7654,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7658 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; | 7654 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; |
7659 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, | 7655 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, |
7660 | CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, | 7656 | CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, |
7661 | 0, 0xfffff, PACKET3(PACKET3_NOP, 0x3FFF)); | 7657 | PACKET3(PACKET3_NOP, 0x3FFF)); |
7662 | if (r) | 7658 | if (r) |
7663 | return r; | 7659 | return r; |
7664 | ring->me = 1; /* first MEC */ | 7660 | ring->me = 1; /* first MEC */ |
@@ -7670,7 +7666,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7670 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; | 7666 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; |
7671 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, | 7667 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, |
7672 | CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, | 7668 | CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, |
7673 | 0, 0xffffffff, PACKET3(PACKET3_NOP, 0x3FFF)); | 7669 | PACKET3(PACKET3_NOP, 0x3FFF)); |
7674 | if (r) | 7670 | if (r) |
7675 | return r; | 7671 | return r; |
7676 | /* dGPU only have 1 MEC */ | 7672 | /* dGPU only have 1 MEC */ |
@@ -7683,7 +7679,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7683 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 7679 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
7684 | SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET, | 7680 | SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET, |
7685 | SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET, | 7681 | SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET, |
7686 | 2, 0xfffffffc, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); | 7682 | SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); |
7687 | if (r) | 7683 | if (r) |
7688 | return r; | 7684 | return r; |
7689 | 7685 | ||
@@ -7691,7 +7687,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7691 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, | 7687 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, |
7692 | SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET, | 7688 | SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET, |
7693 | SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET, | 7689 | SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET, |
7694 | 2, 0xfffffffc, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); | 7690 | SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); |
7695 | if (r) | 7691 | if (r) |
7696 | return r; | 7692 | return r; |
7697 | 7693 | ||
@@ -7707,7 +7703,7 @@ static int cik_startup(struct radeon_device *rdev) | |||
7707 | if (ring->ring_size) { | 7703 | if (ring->ring_size) { |
7708 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, | 7704 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, |
7709 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, | 7705 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, |
7710 | 0, 0xfffff, RADEON_CP_PACKET2); | 7706 | RADEON_CP_PACKET2); |
7711 | if (!r) | 7707 | if (!r) |
7712 | r = r600_uvd_init(rdev, true); | 7708 | r = r600_uvd_init(rdev, true); |
7713 | if (r) | 7709 | if (r) |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 2139f6c64341..389f5a981358 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -5268,14 +5268,14 @@ static int evergreen_startup(struct radeon_device *rdev) | |||
5268 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 5268 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
5269 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 5269 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
5270 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, | 5270 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, |
5271 | 0, 0xfffff, RADEON_CP_PACKET2); | 5271 | RADEON_CP_PACKET2); |
5272 | if (r) | 5272 | if (r) |
5273 | return r; | 5273 | return r; |
5274 | 5274 | ||
5275 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; | 5275 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; |
5276 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 5276 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
5277 | DMA_RB_RPTR, DMA_RB_WPTR, | 5277 | DMA_RB_RPTR, DMA_RB_WPTR, |
5278 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0)); | 5278 | DMA_PACKET(DMA_PACKET_NOP, 0, 0)); |
5279 | if (r) | 5279 | if (r) |
5280 | return r; | 5280 | return r; |
5281 | 5281 | ||
@@ -5293,7 +5293,7 @@ static int evergreen_startup(struct radeon_device *rdev) | |||
5293 | if (ring->ring_size) { | 5293 | if (ring->ring_size) { |
5294 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, | 5294 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, |
5295 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, | 5295 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, |
5296 | 0, 0xfffff, RADEON_CP_PACKET2); | 5296 | RADEON_CP_PACKET2); |
5297 | if (!r) | 5297 | if (!r) |
5298 | r = r600_uvd_init(rdev, true); | 5298 | r = r600_uvd_init(rdev, true); |
5299 | 5299 | ||
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index f543f4ca4dda..e04b17338336 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -2192,7 +2192,7 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2192 | 2192 | ||
2193 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 2193 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
2194 | CP_RB0_RPTR, CP_RB0_WPTR, | 2194 | CP_RB0_RPTR, CP_RB0_WPTR, |
2195 | 0, 0xfffff, RADEON_CP_PACKET2); | 2195 | RADEON_CP_PACKET2); |
2196 | if (r) | 2196 | if (r) |
2197 | return r; | 2197 | return r; |
2198 | 2198 | ||
@@ -2200,7 +2200,7 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2200 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 2200 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
2201 | DMA_RB_RPTR + DMA0_REGISTER_OFFSET, | 2201 | DMA_RB_RPTR + DMA0_REGISTER_OFFSET, |
2202 | DMA_RB_WPTR + DMA0_REGISTER_OFFSET, | 2202 | DMA_RB_WPTR + DMA0_REGISTER_OFFSET, |
2203 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); | 2203 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); |
2204 | if (r) | 2204 | if (r) |
2205 | return r; | 2205 | return r; |
2206 | 2206 | ||
@@ -2208,7 +2208,7 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2208 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, | 2208 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, |
2209 | DMA_RB_RPTR + DMA1_REGISTER_OFFSET, | 2209 | DMA_RB_RPTR + DMA1_REGISTER_OFFSET, |
2210 | DMA_RB_WPTR + DMA1_REGISTER_OFFSET, | 2210 | DMA_RB_WPTR + DMA1_REGISTER_OFFSET, |
2211 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); | 2211 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); |
2212 | if (r) | 2212 | if (r) |
2213 | return r; | 2213 | return r; |
2214 | 2214 | ||
@@ -2227,7 +2227,7 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2227 | if (ring->ring_size) { | 2227 | if (ring->ring_size) { |
2228 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, | 2228 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, |
2229 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, | 2229 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, |
2230 | 0, 0xfffff, RADEON_CP_PACKET2); | 2230 | RADEON_CP_PACKET2); |
2231 | if (!r) | 2231 | if (!r) |
2232 | r = r600_uvd_init(rdev, true); | 2232 | r = r600_uvd_init(rdev, true); |
2233 | if (r) | 2233 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 75349cdaa84b..2cbc512645d4 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -1102,7 +1102,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
1102 | r100_cp_load_microcode(rdev); | 1102 | r100_cp_load_microcode(rdev); |
1103 | r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET, | 1103 | r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET, |
1104 | RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR, | 1104 | RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR, |
1105 | 0, 0x7fffff, RADEON_CP_PACKET2); | 1105 | RADEON_CP_PACKET2); |
1106 | if (r) { | 1106 | if (r) { |
1107 | return r; | 1107 | return r; |
1108 | } | 1108 | } |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index c1b0aba4431a..30849eca6e07 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2504,6 +2504,49 @@ void r600_cp_fini(struct radeon_device *rdev) | |||
2504 | * solid fills, and a number of other things. It also | 2504 | * solid fills, and a number of other things. It also |
2505 | * has support for tiling/detiling of buffers. | 2505 | * has support for tiling/detiling of buffers. |
2506 | */ | 2506 | */ |
2507 | |||
2508 | /** | ||
2509 | * r600_dma_get_rptr - get the current read pointer | ||
2510 | * | ||
2511 | * @rdev: radeon_device pointer | ||
2512 | * @ring: radeon ring pointer | ||
2513 | * | ||
2514 | * Get the current rptr from the hardware (r6xx+). | ||
2515 | */ | ||
2516 | uint32_t r600_dma_get_rptr(struct radeon_device *rdev, | ||
2517 | struct radeon_ring *ring) | ||
2518 | { | ||
2519 | return (radeon_ring_generic_get_rptr(rdev, ring) & 0x3fffc) >> 2; | ||
2520 | } | ||
2521 | |||
2522 | /** | ||
2523 | * r600_dma_get_wptr - get the current write pointer | ||
2524 | * | ||
2525 | * @rdev: radeon_device pointer | ||
2526 | * @ring: radeon ring pointer | ||
2527 | * | ||
2528 | * Get the current wptr from the hardware (r6xx+). | ||
2529 | */ | ||
2530 | uint32_t r600_dma_get_wptr(struct radeon_device *rdev, | ||
2531 | struct radeon_ring *ring) | ||
2532 | { | ||
2533 | return (RREG32(ring->wptr_reg) & 0x3fffc) >> 2; | ||
2534 | } | ||
2535 | |||
2536 | /** | ||
2537 | * r600_dma_set_wptr - commit the write pointer | ||
2538 | * | ||
2539 | * @rdev: radeon_device pointer | ||
2540 | * @ring: radeon ring pointer | ||
2541 | * | ||
2542 | * Write the wptr back to the hardware (r6xx+). | ||
2543 | */ | ||
2544 | void r600_dma_set_wptr(struct radeon_device *rdev, | ||
2545 | struct radeon_ring *ring) | ||
2546 | { | ||
2547 | WREG32(ring->wptr_reg, (ring->wptr << 2) & 0x3fffc); | ||
2548 | } | ||
2549 | |||
2507 | /** | 2550 | /** |
2508 | * r600_dma_stop - stop the async dma engine | 2551 | * r600_dma_stop - stop the async dma engine |
2509 | * | 2552 | * |
@@ -3386,14 +3429,14 @@ static int r600_startup(struct radeon_device *rdev) | |||
3386 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 3429 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
3387 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 3430 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
3388 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, | 3431 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, |
3389 | 0, 0xfffff, RADEON_CP_PACKET2); | 3432 | RADEON_CP_PACKET2); |
3390 | if (r) | 3433 | if (r) |
3391 | return r; | 3434 | return r; |
3392 | 3435 | ||
3393 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; | 3436 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; |
3394 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 3437 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
3395 | DMA_RB_RPTR, DMA_RB_WPTR, | 3438 | DMA_RB_RPTR, DMA_RB_WPTR, |
3396 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); | 3439 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); |
3397 | if (r) | 3440 | if (r) |
3398 | return r; | 3441 | return r; |
3399 | 3442 | ||
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 2eab174bf22e..791cc8de6395 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -760,8 +760,6 @@ struct radeon_ring { | |||
760 | uint32_t align_mask; | 760 | uint32_t align_mask; |
761 | uint32_t ptr_mask; | 761 | uint32_t ptr_mask; |
762 | bool ready; | 762 | bool ready; |
763 | u32 ptr_reg_shift; | ||
764 | u32 ptr_reg_mask; | ||
765 | u32 nop; | 763 | u32 nop; |
766 | u32 idx; | 764 | u32 idx; |
767 | u64 last_semaphore_signal_addr; | 765 | u64 last_semaphore_signal_addr; |
@@ -912,8 +910,7 @@ unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring | |||
912 | int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, | 910 | int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, |
913 | unsigned size, uint32_t *data); | 911 | unsigned size, uint32_t *data); |
914 | int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size, | 912 | int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size, |
915 | unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, | 913 | unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, u32 nop); |
916 | u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop); | ||
917 | void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp); | 914 | void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp); |
918 | 915 | ||
919 | 916 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 7432247a812a..785b7a7add77 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -896,9 +896,9 @@ static struct radeon_asic_ring r600_dma_ring = { | |||
896 | .ring_test = &r600_dma_ring_test, | 896 | .ring_test = &r600_dma_ring_test, |
897 | .ib_test = &r600_dma_ib_test, | 897 | .ib_test = &r600_dma_ib_test, |
898 | .is_lockup = &r600_dma_is_lockup, | 898 | .is_lockup = &r600_dma_is_lockup, |
899 | .get_rptr = &radeon_ring_generic_get_rptr, | 899 | .get_rptr = &r600_dma_get_rptr, |
900 | .get_wptr = &radeon_ring_generic_get_wptr, | 900 | .get_wptr = &r600_dma_get_wptr, |
901 | .set_wptr = &radeon_ring_generic_set_wptr, | 901 | .set_wptr = &r600_dma_set_wptr, |
902 | }; | 902 | }; |
903 | 903 | ||
904 | static struct radeon_asic r600_asic = { | 904 | static struct radeon_asic r600_asic = { |
@@ -1275,9 +1275,9 @@ static struct radeon_asic_ring evergreen_dma_ring = { | |||
1275 | .ring_test = &r600_dma_ring_test, | 1275 | .ring_test = &r600_dma_ring_test, |
1276 | .ib_test = &r600_dma_ib_test, | 1276 | .ib_test = &r600_dma_ib_test, |
1277 | .is_lockup = &evergreen_dma_is_lockup, | 1277 | .is_lockup = &evergreen_dma_is_lockup, |
1278 | .get_rptr = &radeon_ring_generic_get_rptr, | 1278 | .get_rptr = &r600_dma_get_rptr, |
1279 | .get_wptr = &radeon_ring_generic_get_wptr, | 1279 | .get_wptr = &r600_dma_get_wptr, |
1280 | .set_wptr = &radeon_ring_generic_set_wptr, | 1280 | .set_wptr = &r600_dma_set_wptr, |
1281 | }; | 1281 | }; |
1282 | 1282 | ||
1283 | static struct radeon_asic evergreen_asic = { | 1283 | static struct radeon_asic evergreen_asic = { |
@@ -1580,9 +1580,9 @@ static struct radeon_asic_ring cayman_dma_ring = { | |||
1580 | .ib_test = &r600_dma_ib_test, | 1580 | .ib_test = &r600_dma_ib_test, |
1581 | .is_lockup = &cayman_dma_is_lockup, | 1581 | .is_lockup = &cayman_dma_is_lockup, |
1582 | .vm_flush = &cayman_dma_vm_flush, | 1582 | .vm_flush = &cayman_dma_vm_flush, |
1583 | .get_rptr = &radeon_ring_generic_get_rptr, | 1583 | .get_rptr = &r600_dma_get_rptr, |
1584 | .get_wptr = &radeon_ring_generic_get_wptr, | 1584 | .get_wptr = &r600_dma_get_wptr, |
1585 | .set_wptr = &radeon_ring_generic_set_wptr | 1585 | .set_wptr = &r600_dma_set_wptr |
1586 | }; | 1586 | }; |
1587 | 1587 | ||
1588 | static struct radeon_asic_ring cayman_uvd_ring = { | 1588 | static struct radeon_asic_ring cayman_uvd_ring = { |
@@ -1822,9 +1822,9 @@ static struct radeon_asic_ring si_dma_ring = { | |||
1822 | .ib_test = &r600_dma_ib_test, | 1822 | .ib_test = &r600_dma_ib_test, |
1823 | .is_lockup = &si_dma_is_lockup, | 1823 | .is_lockup = &si_dma_is_lockup, |
1824 | .vm_flush = &si_dma_vm_flush, | 1824 | .vm_flush = &si_dma_vm_flush, |
1825 | .get_rptr = &radeon_ring_generic_get_rptr, | 1825 | .get_rptr = &r600_dma_get_rptr, |
1826 | .get_wptr = &radeon_ring_generic_get_wptr, | 1826 | .get_wptr = &r600_dma_get_wptr, |
1827 | .set_wptr = &radeon_ring_generic_set_wptr, | 1827 | .set_wptr = &r600_dma_set_wptr, |
1828 | }; | 1828 | }; |
1829 | 1829 | ||
1830 | static struct radeon_asic si_asic = { | 1830 | static struct radeon_asic si_asic = { |
@@ -1966,9 +1966,9 @@ static struct radeon_asic_ring ci_dma_ring = { | |||
1966 | .ib_test = &cik_sdma_ib_test, | 1966 | .ib_test = &cik_sdma_ib_test, |
1967 | .is_lockup = &cik_sdma_is_lockup, | 1967 | .is_lockup = &cik_sdma_is_lockup, |
1968 | .vm_flush = &cik_dma_vm_flush, | 1968 | .vm_flush = &cik_dma_vm_flush, |
1969 | .get_rptr = &radeon_ring_generic_get_rptr, | 1969 | .get_rptr = &r600_dma_get_rptr, |
1970 | .get_wptr = &radeon_ring_generic_get_wptr, | 1970 | .get_wptr = &r600_dma_get_wptr, |
1971 | .set_wptr = &radeon_ring_generic_set_wptr, | 1971 | .set_wptr = &r600_dma_set_wptr, |
1972 | }; | 1972 | }; |
1973 | 1973 | ||
1974 | static struct radeon_asic ci_asic = { | 1974 | static struct radeon_asic ci_asic = { |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 37baf9c696f0..5c53eb78b22d 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -392,6 +392,13 @@ uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); | |||
392 | int rv6xx_get_temp(struct radeon_device *rdev); | 392 | int rv6xx_get_temp(struct radeon_device *rdev); |
393 | int r600_dpm_pre_set_power_state(struct radeon_device *rdev); | 393 | int r600_dpm_pre_set_power_state(struct radeon_device *rdev); |
394 | void r600_dpm_post_set_power_state(struct radeon_device *rdev); | 394 | void r600_dpm_post_set_power_state(struct radeon_device *rdev); |
395 | /* r600 dma */ | ||
396 | uint32_t r600_dma_get_rptr(struct radeon_device *rdev, | ||
397 | struct radeon_ring *ring); | ||
398 | uint32_t r600_dma_get_wptr(struct radeon_device *rdev, | ||
399 | struct radeon_ring *ring); | ||
400 | void r600_dma_set_wptr(struct radeon_device *rdev, | ||
401 | struct radeon_ring *ring); | ||
395 | /* rv6xx dpm */ | 402 | /* rv6xx dpm */ |
396 | int rv6xx_dpm_init(struct radeon_device *rdev); | 403 | int rv6xx_dpm_init(struct radeon_device *rdev); |
397 | int rv6xx_dpm_enable(struct radeon_device *rdev); | 404 | int rv6xx_dpm_enable(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index cb4b931d8d9f..46a25f037b84 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -367,7 +367,6 @@ u32 radeon_ring_generic_get_rptr(struct radeon_device *rdev, | |||
367 | rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); | 367 | rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); |
368 | else | 368 | else |
369 | rptr = RREG32(ring->rptr_reg); | 369 | rptr = RREG32(ring->rptr_reg); |
370 | rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift; | ||
371 | 370 | ||
372 | return rptr; | 371 | return rptr; |
373 | } | 372 | } |
@@ -378,7 +377,6 @@ u32 radeon_ring_generic_get_wptr(struct radeon_device *rdev, | |||
378 | u32 wptr; | 377 | u32 wptr; |
379 | 378 | ||
380 | wptr = RREG32(ring->wptr_reg); | 379 | wptr = RREG32(ring->wptr_reg); |
381 | wptr = (wptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift; | ||
382 | 380 | ||
383 | return wptr; | 381 | return wptr; |
384 | } | 382 | } |
@@ -386,7 +384,7 @@ u32 radeon_ring_generic_get_wptr(struct radeon_device *rdev, | |||
386 | void radeon_ring_generic_set_wptr(struct radeon_device *rdev, | 384 | void radeon_ring_generic_set_wptr(struct radeon_device *rdev, |
387 | struct radeon_ring *ring) | 385 | struct radeon_ring *ring) |
388 | { | 386 | { |
389 | WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask); | 387 | WREG32(ring->wptr_reg, ring->wptr); |
390 | (void)RREG32(ring->wptr_reg); | 388 | (void)RREG32(ring->wptr_reg); |
391 | } | 389 | } |
392 | 390 | ||
@@ -719,16 +717,13 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, | |||
719 | * @rptr_offs: offset of the rptr writeback location in the WB buffer | 717 | * @rptr_offs: offset of the rptr writeback location in the WB buffer |
720 | * @rptr_reg: MMIO offset of the rptr register | 718 | * @rptr_reg: MMIO offset of the rptr register |
721 | * @wptr_reg: MMIO offset of the wptr register | 719 | * @wptr_reg: MMIO offset of the wptr register |
722 | * @ptr_reg_shift: bit offset of the rptr/wptr values | ||
723 | * @ptr_reg_mask: bit mask of the rptr/wptr values | ||
724 | * @nop: nop packet for this ring | 720 | * @nop: nop packet for this ring |
725 | * | 721 | * |
726 | * Initialize the driver information for the selected ring (all asics). | 722 | * Initialize the driver information for the selected ring (all asics). |
727 | * Returns 0 on success, error on failure. | 723 | * Returns 0 on success, error on failure. |
728 | */ | 724 | */ |
729 | int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size, | 725 | int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size, |
730 | unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, | 726 | unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, u32 nop) |
731 | u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop) | ||
732 | { | 727 | { |
733 | int r; | 728 | int r; |
734 | 729 | ||
@@ -736,8 +731,6 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig | |||
736 | ring->rptr_offs = rptr_offs; | 731 | ring->rptr_offs = rptr_offs; |
737 | ring->rptr_reg = rptr_reg; | 732 | ring->rptr_reg = rptr_reg; |
738 | ring->wptr_reg = wptr_reg; | 733 | ring->wptr_reg = wptr_reg; |
739 | ring->ptr_reg_shift = ptr_reg_shift; | ||
740 | ring->ptr_reg_mask = ptr_reg_mask; | ||
741 | ring->nop = nop; | 734 | ring->nop = nop; |
742 | /* Allocate ring buffer */ | 735 | /* Allocate ring buffer */ |
743 | if (ring->ring_obj == NULL) { | 736 | if (ring->ring_obj == NULL) { |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 1e8cf49d5871..fd9dcb2d182b 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -1899,14 +1899,14 @@ static int rv770_startup(struct radeon_device *rdev) | |||
1899 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 1899 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
1900 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 1900 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
1901 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, | 1901 | R600_CP_RB_RPTR, R600_CP_RB_WPTR, |
1902 | 0, 0xfffff, RADEON_CP_PACKET2); | 1902 | RADEON_CP_PACKET2); |
1903 | if (r) | 1903 | if (r) |
1904 | return r; | 1904 | return r; |
1905 | 1905 | ||
1906 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; | 1906 | ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; |
1907 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 1907 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
1908 | DMA_RB_RPTR, DMA_RB_WPTR, | 1908 | DMA_RB_RPTR, DMA_RB_WPTR, |
1909 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); | 1909 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); |
1910 | if (r) | 1910 | if (r) |
1911 | return r; | 1911 | return r; |
1912 | 1912 | ||
@@ -1925,7 +1925,7 @@ static int rv770_startup(struct radeon_device *rdev) | |||
1925 | if (ring->ring_size) { | 1925 | if (ring->ring_size) { |
1926 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, | 1926 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, |
1927 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, | 1927 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, |
1928 | 0, 0xfffff, RADEON_CP_PACKET2); | 1928 | RADEON_CP_PACKET2); |
1929 | if (!r) | 1929 | if (!r) |
1930 | r = r600_uvd_init(rdev, true); | 1930 | r = r600_uvd_init(rdev, true); |
1931 | 1931 | ||
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 4ff59c8f508f..ae232be62921 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -6368,21 +6368,21 @@ static int si_startup(struct radeon_device *rdev) | |||
6368 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 6368 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
6369 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, | 6369 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, |
6370 | CP_RB0_RPTR, CP_RB0_WPTR, | 6370 | CP_RB0_RPTR, CP_RB0_WPTR, |
6371 | 0, 0xfffff, RADEON_CP_PACKET2); | 6371 | RADEON_CP_PACKET2); |
6372 | if (r) | 6372 | if (r) |
6373 | return r; | 6373 | return r; |
6374 | 6374 | ||
6375 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; | 6375 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; |
6376 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, | 6376 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, |
6377 | CP_RB1_RPTR, CP_RB1_WPTR, | 6377 | CP_RB1_RPTR, CP_RB1_WPTR, |
6378 | 0, 0xfffff, RADEON_CP_PACKET2); | 6378 | RADEON_CP_PACKET2); |
6379 | if (r) | 6379 | if (r) |
6380 | return r; | 6380 | return r; |
6381 | 6381 | ||
6382 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; | 6382 | ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; |
6383 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, | 6383 | r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, |
6384 | CP_RB2_RPTR, CP_RB2_WPTR, | 6384 | CP_RB2_RPTR, CP_RB2_WPTR, |
6385 | 0, 0xfffff, RADEON_CP_PACKET2); | 6385 | RADEON_CP_PACKET2); |
6386 | if (r) | 6386 | if (r) |
6387 | return r; | 6387 | return r; |
6388 | 6388 | ||
@@ -6390,7 +6390,7 @@ static int si_startup(struct radeon_device *rdev) | |||
6390 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, | 6390 | r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, |
6391 | DMA_RB_RPTR + DMA0_REGISTER_OFFSET, | 6391 | DMA_RB_RPTR + DMA0_REGISTER_OFFSET, |
6392 | DMA_RB_WPTR + DMA0_REGISTER_OFFSET, | 6392 | DMA_RB_WPTR + DMA0_REGISTER_OFFSET, |
6393 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); | 6393 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); |
6394 | if (r) | 6394 | if (r) |
6395 | return r; | 6395 | return r; |
6396 | 6396 | ||
@@ -6398,7 +6398,7 @@ static int si_startup(struct radeon_device *rdev) | |||
6398 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, | 6398 | r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, |
6399 | DMA_RB_RPTR + DMA1_REGISTER_OFFSET, | 6399 | DMA_RB_RPTR + DMA1_REGISTER_OFFSET, |
6400 | DMA_RB_WPTR + DMA1_REGISTER_OFFSET, | 6400 | DMA_RB_WPTR + DMA1_REGISTER_OFFSET, |
6401 | 2, 0x3fffc, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); | 6401 | DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); |
6402 | if (r) | 6402 | if (r) |
6403 | return r; | 6403 | return r; |
6404 | 6404 | ||
@@ -6418,7 +6418,7 @@ static int si_startup(struct radeon_device *rdev) | |||
6418 | if (ring->ring_size) { | 6418 | if (ring->ring_size) { |
6419 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, | 6419 | r = radeon_ring_init(rdev, ring, ring->ring_size, 0, |
6420 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, | 6420 | UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, |
6421 | 0, 0xfffff, RADEON_CP_PACKET2); | 6421 | RADEON_CP_PACKET2); |
6422 | if (!r) | 6422 | if (!r) |
6423 | r = r600_uvd_init(rdev, true); | 6423 | r = r600_uvd_init(rdev, true); |
6424 | if (r) | 6424 | if (r) |