diff options
169 files changed, 3010 insertions, 1631 deletions
diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt new file mode 100644 index 000000000000..44afa0e5057d --- /dev/null +++ b/Documentation/devicetree/bindings/net/macb.txt | |||
@@ -0,0 +1,25 @@ | |||
1 | * Cadence MACB/GEM Ethernet controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: Should be "cdns,[<chip>-]{macb|gem}" | ||
5 | Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs. | ||
6 | Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb". | ||
7 | Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on | ||
8 | the Cadence GEM, or the generic form: "cdns,gem". | ||
9 | - reg: Address and length of the register set for the device | ||
10 | - interrupts: Should contain macb interrupt | ||
11 | - phy-mode: String, operation mode of the PHY interface. | ||
12 | Supported values are: "mii", "rmii", "gmii", "rgmii". | ||
13 | |||
14 | Optional properties: | ||
15 | - local-mac-address: 6 bytes, mac address | ||
16 | |||
17 | Examples: | ||
18 | |||
19 | macb0: ethernet@fffc4000 { | ||
20 | compatible = "cdns,at32ap7000-macb"; | ||
21 | reg = <0xfffc4000 0x4000>; | ||
22 | interrupts = <21>; | ||
23 | phy-mode = "rmii"; | ||
24 | local-mac-address = [3a 0e 03 04 05 06]; | ||
25 | }; | ||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3cddfd87c727..b3d7b77d2d51 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -597,6 +597,7 @@ config ARCH_MMP | |||
597 | select ARCH_REQUIRE_GPIOLIB | 597 | select ARCH_REQUIRE_GPIOLIB |
598 | select CLKDEV_LOOKUP | 598 | select CLKDEV_LOOKUP |
599 | select GENERIC_CLOCKEVENTS | 599 | select GENERIC_CLOCKEVENTS |
600 | select GPIO_PXA | ||
600 | select HAVE_SCHED_CLOCK | 601 | select HAVE_SCHED_CLOCK |
601 | select TICK_ONESHOT | 602 | select TICK_ONESHOT |
602 | select PLAT_PXA | 603 | select PLAT_PXA |
@@ -682,6 +683,7 @@ config ARCH_PXA | |||
682 | select CLKSRC_MMIO | 683 | select CLKSRC_MMIO |
683 | select ARCH_REQUIRE_GPIOLIB | 684 | select ARCH_REQUIRE_GPIOLIB |
684 | select GENERIC_CLOCKEVENTS | 685 | select GENERIC_CLOCKEVENTS |
686 | select GPIO_PXA | ||
685 | select HAVE_SCHED_CLOCK | 687 | select HAVE_SCHED_CLOCK |
686 | select TICK_ONESHOT | 688 | select TICK_ONESHOT |
687 | select PLAT_PXA | 689 | select PLAT_PXA |
@@ -749,7 +751,7 @@ config ARCH_SA1100 | |||
749 | select ARCH_HAS_CPUFREQ | 751 | select ARCH_HAS_CPUFREQ |
750 | select CPU_FREQ | 752 | select CPU_FREQ |
751 | select GENERIC_CLOCKEVENTS | 753 | select GENERIC_CLOCKEVENTS |
752 | select HAVE_CLK | 754 | select CLKDEV_LOOKUP |
753 | select HAVE_SCHED_CLOCK | 755 | select HAVE_SCHED_CLOCK |
754 | select TICK_ONESHOT | 756 | select TICK_ONESHOT |
755 | select ARCH_REQUIRE_GPIOLIB | 757 | select ARCH_REQUIRE_GPIOLIB |
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi index aeef04269cf8..07603b8c9503 100644 --- a/arch/arm/boot/dts/at91sam9g20.dtsi +++ b/arch/arm/boot/dts/at91sam9g20.dtsi | |||
@@ -114,6 +114,13 @@ | |||
114 | atmel,use-dma-tx; | 114 | atmel,use-dma-tx; |
115 | status = "disabled"; | 115 | status = "disabled"; |
116 | }; | 116 | }; |
117 | |||
118 | macb0: ethernet@fffc4000 { | ||
119 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | ||
120 | reg = <0xfffc4000 0x100>; | ||
121 | interrupts = <21>; | ||
122 | status = "disabled"; | ||
123 | }; | ||
117 | }; | 124 | }; |
118 | }; | 125 | }; |
119 | }; | 126 | }; |
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index db6a45202f26..fffa005300a4 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -101,6 +101,13 @@ | |||
101 | atmel,use-dma-tx; | 101 | atmel,use-dma-tx; |
102 | status = "disabled"; | 102 | status = "disabled"; |
103 | }; | 103 | }; |
104 | |||
105 | macb0: ethernet@fffbc000 { | ||
106 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | ||
107 | reg = <0xfffbc000 0x100>; | ||
108 | interrupts = <25>; | ||
109 | status = "disabled"; | ||
110 | }; | ||
104 | }; | 111 | }; |
105 | }; | 112 | }; |
106 | }; | 113 | }; |
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 85b34f59cd82..a387e7704ce1 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts | |||
@@ -30,6 +30,11 @@ | |||
30 | usart1: serial@fff90000 { | 30 | usart1: serial@fff90000 { |
31 | status = "okay"; | 31 | status = "okay"; |
32 | }; | 32 | }; |
33 | |||
34 | macb0: ethernet@fffbc000 { | ||
35 | phy-mode = "rmii"; | ||
36 | status = "okay"; | ||
37 | }; | ||
33 | }; | 38 | }; |
34 | }; | 39 | }; |
35 | }; | 40 | }; |
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts index d66e2c00ac35..f04b535477f5 100644 --- a/arch/arm/boot/dts/usb_a9g20.dts +++ b/arch/arm/boot/dts/usb_a9g20.dts | |||
@@ -25,6 +25,11 @@ | |||
25 | dbgu: serial@fffff200 { | 25 | dbgu: serial@fffff200 { |
26 | status = "okay"; | 26 | status = "okay"; |
27 | }; | 27 | }; |
28 | |||
29 | macb0: ethernet@fffc4000 { | ||
30 | phy-mode = "rmii"; | ||
31 | status = "okay"; | ||
32 | }; | ||
28 | }; | 33 | }; |
29 | }; | 34 | }; |
30 | }; | 35 | }; |
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index b4bdf297e9fa..5d602f68a0e8 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -89,6 +89,11 @@ config EXYNOS4_DEV_DWMCI | |||
89 | help | 89 | help |
90 | Compile in platform device definitions for DWMCI | 90 | Compile in platform device definitions for DWMCI |
91 | 91 | ||
92 | config EXYNOS4_DEV_USB_OHCI | ||
93 | bool | ||
94 | help | ||
95 | Compile in platform device definition for USB OHCI | ||
96 | |||
92 | config EXYNOS4_SETUP_I2C1 | 97 | config EXYNOS4_SETUP_I2C1 |
93 | bool | 98 | bool |
94 | help | 99 | help |
@@ -150,6 +155,11 @@ config EXYNOS4_SETUP_USB_PHY | |||
150 | help | 155 | help |
151 | Common setup code for USB PHY controller | 156 | Common setup code for USB PHY controller |
152 | 157 | ||
158 | config EXYNOS4_SETUP_SPI | ||
159 | bool | ||
160 | help | ||
161 | Common setup code for SPI GPIO configurations. | ||
162 | |||
153 | # machine support | 163 | # machine support |
154 | 164 | ||
155 | if ARCH_EXYNOS4 | 165 | if ARCH_EXYNOS4 |
@@ -187,6 +197,7 @@ config MACH_SMDKV310 | |||
187 | select EXYNOS4_DEV_DMA | 197 | select EXYNOS4_DEV_DMA |
188 | select EXYNOS4_DEV_PD | 198 | select EXYNOS4_DEV_PD |
189 | select SAMSUNG_DEV_PWM | 199 | select SAMSUNG_DEV_PWM |
200 | select EXYNOS4_DEV_USB_OHCI | ||
190 | select EXYNOS4_DEV_SYSMMU | 201 | select EXYNOS4_DEV_SYSMMU |
191 | select EXYNOS4_SETUP_FIMD0 | 202 | select EXYNOS4_SETUP_FIMD0 |
192 | select EXYNOS4_SETUP_I2C1 | 203 | select EXYNOS4_SETUP_I2C1 |
@@ -300,6 +311,7 @@ config MACH_ORIGEN | |||
300 | select SAMSUNG_DEV_PWM | 311 | select SAMSUNG_DEV_PWM |
301 | select EXYNOS4_DEV_DMA | 312 | select EXYNOS4_DEV_DMA |
302 | select EXYNOS4_DEV_PD | 313 | select EXYNOS4_DEV_PD |
314 | select EXYNOS4_DEV_USB_OHCI | ||
303 | select EXYNOS4_SETUP_FIMD0 | 315 | select EXYNOS4_SETUP_FIMD0 |
304 | select EXYNOS4_SETUP_SDHCI | 316 | select EXYNOS4_SETUP_SDHCI |
305 | select EXYNOS4_SETUP_USB_PHY | 317 | select EXYNOS4_SETUP_USB_PHY |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index ca85a99c159d..5fc202cdfdb6 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -49,6 +49,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o | |||
49 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o | 49 | obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o |
50 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 50 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
51 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o | 51 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o |
52 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o | ||
52 | 53 | ||
53 | obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o | 54 | obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o |
54 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o | 55 | obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o |
@@ -63,3 +64,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o | |||
63 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o | 64 | obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o |
64 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 65 | obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
65 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o | 66 | obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o |
67 | obj-$(CONFIG_EXYNOS4_SETUP_SPI) += setup-spi.o | ||
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index 5d5250df33fd..5a8c42e90005 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c | |||
@@ -1112,36 +1112,6 @@ static struct clksrc_clk clksrcs[] = { | |||
1112 | .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, | 1112 | .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, |
1113 | }, { | 1113 | }, { |
1114 | .clk = { | 1114 | .clk = { |
1115 | .name = "sclk_spi", | ||
1116 | .devname = "s3c64xx-spi.0", | ||
1117 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1118 | .ctrlbit = (1 << 16), | ||
1119 | }, | ||
1120 | .sources = &clkset_group, | ||
1121 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 }, | ||
1122 | .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 }, | ||
1123 | }, { | ||
1124 | .clk = { | ||
1125 | .name = "sclk_spi", | ||
1126 | .devname = "s3c64xx-spi.1", | ||
1127 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1128 | .ctrlbit = (1 << 20), | ||
1129 | }, | ||
1130 | .sources = &clkset_group, | ||
1131 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 }, | ||
1132 | .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 }, | ||
1133 | }, { | ||
1134 | .clk = { | ||
1135 | .name = "sclk_spi", | ||
1136 | .devname = "s3c64xx-spi.2", | ||
1137 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1138 | .ctrlbit = (1 << 24), | ||
1139 | }, | ||
1140 | .sources = &clkset_group, | ||
1141 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 }, | ||
1142 | .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 }, | ||
1143 | }, { | ||
1144 | .clk = { | ||
1145 | .name = "sclk_fimg2d", | 1115 | .name = "sclk_fimg2d", |
1146 | }, | 1116 | }, |
1147 | .sources = &clkset_mout_g2d, | 1117 | .sources = &clkset_mout_g2d, |
@@ -1258,6 +1228,42 @@ static struct clksrc_clk clk_sclk_mmc3 = { | |||
1258 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, | 1228 | .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, |
1259 | }; | 1229 | }; |
1260 | 1230 | ||
1231 | static struct clksrc_clk clk_sclk_spi0 = { | ||
1232 | .clk = { | ||
1233 | .name = "sclk_spi", | ||
1234 | .devname = "s3c64xx-spi.0", | ||
1235 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1236 | .ctrlbit = (1 << 16), | ||
1237 | }, | ||
1238 | .sources = &clkset_group, | ||
1239 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 }, | ||
1240 | .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 }, | ||
1241 | }; | ||
1242 | |||
1243 | static struct clksrc_clk clk_sclk_spi1 = { | ||
1244 | .clk = { | ||
1245 | .name = "sclk_spi", | ||
1246 | .devname = "s3c64xx-spi.1", | ||
1247 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1248 | .ctrlbit = (1 << 20), | ||
1249 | }, | ||
1250 | .sources = &clkset_group, | ||
1251 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 }, | ||
1252 | .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 }, | ||
1253 | }; | ||
1254 | |||
1255 | static struct clksrc_clk clk_sclk_spi2 = { | ||
1256 | .clk = { | ||
1257 | .name = "sclk_spi", | ||
1258 | .devname = "s3c64xx-spi.2", | ||
1259 | .enable = exynos4_clksrc_mask_peril1_ctrl, | ||
1260 | .ctrlbit = (1 << 24), | ||
1261 | }, | ||
1262 | .sources = &clkset_group, | ||
1263 | .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 }, | ||
1264 | .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 }, | ||
1265 | }; | ||
1266 | |||
1261 | /* Clock initialization code */ | 1267 | /* Clock initialization code */ |
1262 | static struct clksrc_clk *sysclks[] = { | 1268 | static struct clksrc_clk *sysclks[] = { |
1263 | &clk_mout_apll, | 1269 | &clk_mout_apll, |
@@ -1306,6 +1312,10 @@ static struct clksrc_clk *clksrc_cdev[] = { | |||
1306 | &clk_sclk_mmc1, | 1312 | &clk_sclk_mmc1, |
1307 | &clk_sclk_mmc2, | 1313 | &clk_sclk_mmc2, |
1308 | &clk_sclk_mmc3, | 1314 | &clk_sclk_mmc3, |
1315 | &clk_sclk_spi0, | ||
1316 | &clk_sclk_spi1, | ||
1317 | &clk_sclk_spi2, | ||
1318 | |||
1309 | }; | 1319 | }; |
1310 | 1320 | ||
1311 | static struct clk_lookup exynos4_clk_lookup[] = { | 1321 | static struct clk_lookup exynos4_clk_lookup[] = { |
@@ -1319,6 +1329,9 @@ static struct clk_lookup exynos4_clk_lookup[] = { | |||
1319 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), | 1329 | CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), |
1320 | CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), | 1330 | CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), |
1321 | CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), | 1331 | CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), |
1332 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &clk_sclk_spi0.clk), | ||
1333 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", &clk_sclk_spi1.clk), | ||
1334 | CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", &clk_sclk_spi2.clk), | ||
1322 | }; | 1335 | }; |
1323 | 1336 | ||
1324 | static int xtal_rate; | 1337 | static int xtal_rate; |
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c new file mode 100644 index 000000000000..b8e75300c77d --- /dev/null +++ b/arch/arm/mach-exynos/dev-ohci.c | |||
@@ -0,0 +1,52 @@ | |||
1 | /* linux/arch/arm/mach-exynos/dev-ohci.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS - OHCI support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/dma-mapping.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <mach/irqs.h> | ||
17 | #include <mach/map.h> | ||
18 | #include <mach/ohci.h> | ||
19 | |||
20 | #include <plat/devs.h> | ||
21 | #include <plat/usb-phy.h> | ||
22 | |||
23 | static struct resource exynos4_ohci_resource[] = { | ||
24 | [0] = DEFINE_RES_MEM(EXYNOS4_PA_OHCI, SZ_256), | ||
25 | [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), | ||
26 | }; | ||
27 | |||
28 | static u64 exynos4_ohci_dma_mask = DMA_BIT_MASK(32); | ||
29 | |||
30 | struct platform_device exynos4_device_ohci = { | ||
31 | .name = "exynos-ohci", | ||
32 | .id = -1, | ||
33 | .num_resources = ARRAY_SIZE(exynos4_ohci_resource), | ||
34 | .resource = exynos4_ohci_resource, | ||
35 | .dev = { | ||
36 | .dma_mask = &exynos4_ohci_dma_mask, | ||
37 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
38 | } | ||
39 | }; | ||
40 | |||
41 | void __init exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd) | ||
42 | { | ||
43 | struct exynos4_ohci_platdata *npd; | ||
44 | |||
45 | npd = s3c_set_platdata(pd, sizeof(struct exynos4_ohci_platdata), | ||
46 | &exynos4_device_ohci); | ||
47 | |||
48 | if (!npd->phy_init) | ||
49 | npd->phy_init = s5p_usb_phy_init; | ||
50 | if (!npd->phy_exit) | ||
51 | npd->phy_exit = s5p_usb_phy_exit; | ||
52 | } | ||
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 713dd5251c64..f77bce04789a 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -72,6 +72,9 @@ | |||
72 | #define IRQ_IIC5 IRQ_SPI(63) | 72 | #define IRQ_IIC5 IRQ_SPI(63) |
73 | #define IRQ_IIC6 IRQ_SPI(64) | 73 | #define IRQ_IIC6 IRQ_SPI(64) |
74 | #define IRQ_IIC7 IRQ_SPI(65) | 74 | #define IRQ_IIC7 IRQ_SPI(65) |
75 | #define IRQ_SPI0 IRQ_SPI(66) | ||
76 | #define IRQ_SPI1 IRQ_SPI(67) | ||
77 | #define IRQ_SPI2 IRQ_SPI(68) | ||
75 | 78 | ||
76 | #define IRQ_USB_HOST IRQ_SPI(70) | 79 | #define IRQ_USB_HOST IRQ_SPI(70) |
77 | #define IRQ_USB_HSOTG IRQ_SPI(71) | 80 | #define IRQ_USB_HSOTG IRQ_SPI(71) |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index d1829860a0ec..c754a22a2bb3 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -87,6 +87,10 @@ | |||
87 | #define EXYNOS4_PA_SYSMMU_TV 0x12E20000 | 87 | #define EXYNOS4_PA_SYSMMU_TV 0x12E20000 |
88 | #define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 | 88 | #define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 |
89 | #define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 | 89 | #define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 |
90 | #define EXYNOS4_PA_SPI0 0x13920000 | ||
91 | #define EXYNOS4_PA_SPI1 0x13930000 | ||
92 | #define EXYNOS4_PA_SPI2 0x13940000 | ||
93 | |||
90 | 94 | ||
91 | #define EXYNOS4_PA_GPIO1 0x11400000 | 95 | #define EXYNOS4_PA_GPIO1 0x11400000 |
92 | #define EXYNOS4_PA_GPIO2 0x11000000 | 96 | #define EXYNOS4_PA_GPIO2 0x11000000 |
@@ -107,6 +111,7 @@ | |||
107 | #define EXYNOS4_PA_SROMC 0x12570000 | 111 | #define EXYNOS4_PA_SROMC 0x12570000 |
108 | 112 | ||
109 | #define EXYNOS4_PA_EHCI 0x12580000 | 113 | #define EXYNOS4_PA_EHCI 0x12580000 |
114 | #define EXYNOS4_PA_OHCI 0x12590000 | ||
110 | #define EXYNOS4_PA_HSPHY 0x125B0000 | 115 | #define EXYNOS4_PA_HSPHY 0x125B0000 |
111 | #define EXYNOS4_PA_MFC 0x13400000 | 116 | #define EXYNOS4_PA_MFC 0x13400000 |
112 | 117 | ||
@@ -148,6 +153,9 @@ | |||
148 | #define S3C_PA_RTC EXYNOS4_PA_RTC | 153 | #define S3C_PA_RTC EXYNOS4_PA_RTC |
149 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG | 154 | #define S3C_PA_WDT EXYNOS4_PA_WATCHDOG |
150 | #define S3C_PA_UART EXYNOS4_PA_UART | 155 | #define S3C_PA_UART EXYNOS4_PA_UART |
156 | #define S3C_PA_SPI0 EXYNOS4_PA_SPI0 | ||
157 | #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 | ||
158 | #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 | ||
151 | 159 | ||
152 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI | 160 | #define S5P_PA_EHCI EXYNOS4_PA_EHCI |
153 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 | 161 | #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 |
diff --git a/arch/arm/mach-exynos/include/mach/ohci.h b/arch/arm/mach-exynos/include/mach/ohci.h new file mode 100644 index 000000000000..c256c595be5e --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/ohci.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Samsung Electronics Co.Ltd | ||
3 | * http://www.samsung.com/ | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_EXYNOS_OHCI_H | ||
12 | #define __MACH_EXYNOS_OHCI_H | ||
13 | |||
14 | struct exynos4_ohci_platdata { | ||
15 | int (*phy_init)(struct platform_device *pdev, int type); | ||
16 | int (*phy_exit)(struct platform_device *pdev, int type); | ||
17 | }; | ||
18 | |||
19 | extern void exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd); | ||
20 | |||
21 | #endif /* __MACH_EXYNOS_OHCI_H */ | ||
diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h new file mode 100644 index 000000000000..576efdf6d091 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/spi-clocks.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Co. Ltd. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASM_ARCH_SPI_CLKS_H | ||
11 | #define __ASM_ARCH_SPI_CLKS_H __FILE__ | ||
12 | |||
13 | /* Must source from SCLK_SPI */ | ||
14 | #define EXYNOS4_SPI_SRCCLK_SCLK 0 | ||
15 | |||
16 | #endif /* __ASM_ARCH_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 586eb995aa96..2b11e046d391 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <plat/fb.h> | 41 | #include <plat/fb.h> |
42 | #include <plat/mfc.h> | 42 | #include <plat/mfc.h> |
43 | 43 | ||
44 | #include <mach/ohci.h> | ||
44 | #include <mach/map.h> | 45 | #include <mach/map.h> |
45 | 46 | ||
46 | #include "common.h" | 47 | #include "common.h" |
@@ -485,6 +486,16 @@ static void __init origen_ehci_init(void) | |||
485 | s5p_ehci_set_platdata(pdata); | 486 | s5p_ehci_set_platdata(pdata); |
486 | } | 487 | } |
487 | 488 | ||
489 | /* USB OHCI */ | ||
490 | static struct exynos4_ohci_platdata origen_ohci_pdata; | ||
491 | |||
492 | static void __init origen_ohci_init(void) | ||
493 | { | ||
494 | struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata; | ||
495 | |||
496 | exynos4_ohci_set_platdata(pdata); | ||
497 | } | ||
498 | |||
488 | static struct gpio_keys_button origen_gpio_keys_table[] = { | 499 | static struct gpio_keys_button origen_gpio_keys_table[] = { |
489 | { | 500 | { |
490 | .code = KEY_MENU, | 501 | .code = KEY_MENU, |
@@ -608,6 +619,7 @@ static struct platform_device *origen_devices[] __initdata = { | |||
608 | &s5p_device_mfc_l, | 619 | &s5p_device_mfc_l, |
609 | &s5p_device_mfc_r, | 620 | &s5p_device_mfc_r, |
610 | &s5p_device_mixer, | 621 | &s5p_device_mixer, |
622 | &exynos4_device_ohci, | ||
611 | &exynos4_device_pd[PD_LCD0], | 623 | &exynos4_device_pd[PD_LCD0], |
612 | &exynos4_device_pd[PD_TV], | 624 | &exynos4_device_pd[PD_TV], |
613 | &exynos4_device_pd[PD_G3D], | 625 | &exynos4_device_pd[PD_G3D], |
@@ -672,6 +684,7 @@ static void __init origen_machine_init(void) | |||
672 | s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); | 684 | s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); |
673 | 685 | ||
674 | origen_ehci_init(); | 686 | origen_ehci_init(); |
687 | origen_ohci_init(); | ||
675 | clk_xusbxti.rate = 24000000; | 688 | clk_xusbxti.rate = 24000000; |
676 | 689 | ||
677 | s5p_tv_setup(); | 690 | s5p_tv_setup(); |
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index a27b23eee9fa..b2c5557f50e4 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <plat/clock.h> | 42 | #include <plat/clock.h> |
43 | 43 | ||
44 | #include <mach/map.h> | 44 | #include <mach/map.h> |
45 | #include <mach/ohci.h> | ||
45 | 46 | ||
46 | #include "common.h" | 47 | #include "common.h" |
47 | 48 | ||
@@ -245,6 +246,16 @@ static void __init smdkv310_ehci_init(void) | |||
245 | s5p_ehci_set_platdata(pdata); | 246 | s5p_ehci_set_platdata(pdata); |
246 | } | 247 | } |
247 | 248 | ||
249 | /* USB OHCI */ | ||
250 | static struct exynos4_ohci_platdata smdkv310_ohci_pdata; | ||
251 | |||
252 | static void __init smdkv310_ohci_init(void) | ||
253 | { | ||
254 | struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata; | ||
255 | |||
256 | exynos4_ohci_set_platdata(pdata); | ||
257 | } | ||
258 | |||
248 | static struct platform_device *smdkv310_devices[] __initdata = { | 259 | static struct platform_device *smdkv310_devices[] __initdata = { |
249 | &s3c_device_hsmmc0, | 260 | &s3c_device_hsmmc0, |
250 | &s3c_device_hsmmc1, | 261 | &s3c_device_hsmmc1, |
@@ -261,6 +272,7 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
261 | &s5p_device_fimc3, | 272 | &s5p_device_fimc3, |
262 | &exynos4_device_ac97, | 273 | &exynos4_device_ac97, |
263 | &exynos4_device_i2s0, | 274 | &exynos4_device_i2s0, |
275 | &exynos4_device_ohci, | ||
264 | &samsung_device_keypad, | 276 | &samsung_device_keypad, |
265 | &s5p_device_mfc, | 277 | &s5p_device_mfc, |
266 | &s5p_device_mfc_l, | 278 | &s5p_device_mfc_l, |
@@ -363,6 +375,7 @@ static void __init smdkv310_machine_init(void) | |||
363 | s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); | 375 | s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); |
364 | 376 | ||
365 | smdkv310_ehci_init(); | 377 | smdkv310_ehci_init(); |
378 | smdkv310_ohci_init(); | ||
366 | clk_xusbxti.rate = 24000000; | 379 | clk_xusbxti.rate = 24000000; |
367 | 380 | ||
368 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); | 381 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); |
diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c new file mode 100644 index 000000000000..833ff40ee0e8 --- /dev/null +++ b/arch/arm/mach-exynos/setup-spi.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/setup-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2011 Samsung Electronics Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/gpio.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | #include <plat/gpio-cfg.h> | ||
15 | #include <plat/s3c64xx-spi.h> | ||
16 | |||
17 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
18 | struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { | ||
19 | .fifo_lvl_mask = 0x1ff, | ||
20 | .rx_lvl_offset = 15, | ||
21 | .high_speed = 1, | ||
22 | .clk_from_cmu = true, | ||
23 | .tx_st_done = 25, | ||
24 | }; | ||
25 | |||
26 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
27 | { | ||
28 | s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2)); | ||
29 | s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP); | ||
30 | s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2, | ||
31 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
32 | return 0; | ||
33 | } | ||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
37 | struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { | ||
38 | .fifo_lvl_mask = 0x7f, | ||
39 | .rx_lvl_offset = 15, | ||
40 | .high_speed = 1, | ||
41 | .clk_from_cmu = true, | ||
42 | .tx_st_done = 25, | ||
43 | }; | ||
44 | |||
45 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
46 | { | ||
47 | s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2)); | ||
48 | s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP); | ||
49 | s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2, | ||
50 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
51 | return 0; | ||
52 | } | ||
53 | #endif | ||
54 | |||
55 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | ||
56 | struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = { | ||
57 | .fifo_lvl_mask = 0x7f, | ||
58 | .rx_lvl_offset = 15, | ||
59 | .high_speed = 1, | ||
60 | .clk_from_cmu = true, | ||
61 | .tx_st_done = 25, | ||
62 | }; | ||
63 | |||
64 | int s3c64xx_spi2_cfg_gpio(struct platform_device *dev) | ||
65 | { | ||
66 | s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5)); | ||
67 | s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP); | ||
68 | s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2, | ||
69 | S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP); | ||
70 | return 0; | ||
71 | } | ||
72 | #endif | ||
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c index 39aca045f660..41743d21e8c6 100644 --- a/arch/arm/mach-exynos/setup-usb-phy.c +++ b/arch/arm/mach-exynos/setup-usb-phy.c | |||
@@ -19,6 +19,13 @@ | |||
19 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
20 | #include <plat/usb-phy.h> | 20 | #include <plat/usb-phy.h> |
21 | 21 | ||
22 | static atomic_t host_usage; | ||
23 | |||
24 | static int exynos4_usb_host_phy_is_on(void) | ||
25 | { | ||
26 | return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1; | ||
27 | } | ||
28 | |||
22 | static int exynos4_usb_phy1_init(struct platform_device *pdev) | 29 | static int exynos4_usb_phy1_init(struct platform_device *pdev) |
23 | { | 30 | { |
24 | struct clk *otg_clk; | 31 | struct clk *otg_clk; |
@@ -27,6 +34,8 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) | |||
27 | u32 rstcon; | 34 | u32 rstcon; |
28 | int err; | 35 | int err; |
29 | 36 | ||
37 | atomic_inc(&host_usage); | ||
38 | |||
30 | otg_clk = clk_get(&pdev->dev, "otg"); | 39 | otg_clk = clk_get(&pdev->dev, "otg"); |
31 | if (IS_ERR(otg_clk)) { | 40 | if (IS_ERR(otg_clk)) { |
32 | dev_err(&pdev->dev, "Failed to get otg clock\n"); | 41 | dev_err(&pdev->dev, "Failed to get otg clock\n"); |
@@ -39,6 +48,9 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) | |||
39 | return err; | 48 | return err; |
40 | } | 49 | } |
41 | 50 | ||
51 | if (exynos4_usb_host_phy_is_on()) | ||
52 | return 0; | ||
53 | |||
42 | writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, | 54 | writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, |
43 | S5P_USBHOST_PHY_CONTROL); | 55 | S5P_USBHOST_PHY_CONTROL); |
44 | 56 | ||
@@ -95,6 +107,9 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev) | |||
95 | struct clk *otg_clk; | 107 | struct clk *otg_clk; |
96 | int err; | 108 | int err; |
97 | 109 | ||
110 | if (atomic_dec_return(&host_usage) > 0) | ||
111 | return 0; | ||
112 | |||
98 | otg_clk = clk_get(&pdev->dev, "otg"); | 113 | otg_clk = clk_get(&pdev->dev, "otg"); |
99 | if (IS_ERR(otg_clk)) { | 114 | if (IS_ERR(otg_clk)) { |
100 | dev_err(&pdev->dev, "Failed to get otg clock\n"); | 115 | dev_err(&pdev->dev, "Failed to get otg clock\n"); |
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 3e6dfab59ef6..17cb76060125 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c | |||
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = { | |||
120 | .flags = IORESOURCE_MEM, | 120 | .flags = IORESOURCE_MEM, |
121 | }, | 121 | }, |
122 | [1] = { | 122 | [1] = { |
123 | .start = gpio_to_irq(27), | 123 | .start = MMP_GPIO_TO_IRQ(27), |
124 | .end = gpio_to_irq(27), | 124 | .end = MMP_GPIO_TO_IRQ(27), |
125 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 125 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
126 | } | 126 | } |
127 | }; | 127 | }; |
@@ -232,6 +232,7 @@ static void __init common_init(void) | |||
232 | pxa168_add_nand(&aspenite_nand_info); | 232 | pxa168_add_nand(&aspenite_nand_info); |
233 | pxa168_add_fb(&aspenite_lcd_info); | 233 | pxa168_add_fb(&aspenite_lcd_info); |
234 | pxa168_add_keypad(&aspenite_keypad_info); | 234 | pxa168_add_keypad(&aspenite_keypad_info); |
235 | platform_device_register(&pxa168_device_gpio); | ||
235 | 236 | ||
236 | /* off-chip devices */ | 237 | /* off-chip devices */ |
237 | platform_device_register(&smc91x_device); | 238 | platform_device_register(&smc91x_device); |
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index 8de3dc6131a4..b148a9dc5a44 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c | |||
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void) | |||
38 | 38 | ||
39 | /* on-chip devices */ | 39 | /* on-chip devices */ |
40 | pxa168_add_uart(2); | 40 | pxa168_add_uart(2); |
41 | platform_device_register(&pxa168_device_gpio); | ||
41 | } | 42 | } |
42 | 43 | ||
43 | MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") | 44 | MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") |
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c index e16f04b39b15..d839fe6421e6 100644 --- a/arch/arm/mach-mmp/brownstone.c +++ b/arch/arm/mach-mmp/brownstone.c | |||
@@ -202,6 +202,7 @@ static void __init brownstone_init(void) | |||
202 | /* on-chip devices */ | 202 | /* on-chip devices */ |
203 | mmp2_add_uart(1); | 203 | mmp2_add_uart(1); |
204 | mmp2_add_uart(3); | 204 | mmp2_add_uart(3); |
205 | platform_device_register(&mmp2_device_gpio); | ||
205 | mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); | 206 | mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); |
206 | mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ | 207 | mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ |
207 | mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ | 208 | mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ |
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index 5a6a27a6cfd0..2ee8cd7829dd 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c | |||
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = { | |||
87 | .flags = IORESOURCE_MEM, | 87 | .flags = IORESOURCE_MEM, |
88 | }, | 88 | }, |
89 | [1] = { | 89 | [1] = { |
90 | .start = gpio_to_irq(155), | 90 | .start = MMP_GPIO_TO_IRQ(155), |
91 | .end = gpio_to_irq(155), | 91 | .end = MMP_GPIO_TO_IRQ(155), |
92 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 92 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
93 | } | 93 | } |
94 | }; | 94 | }; |
@@ -110,6 +110,7 @@ static void __init flint_init(void) | |||
110 | /* on-chip devices */ | 110 | /* on-chip devices */ |
111 | mmp2_add_uart(1); | 111 | mmp2_add_uart(1); |
112 | mmp2_add_uart(2); | 112 | mmp2_add_uart(2); |
113 | platform_device_register(&mmp2_device_gpio); | ||
113 | 114 | ||
114 | /* off-chip devices */ | 115 | /* off-chip devices */ |
115 | platform_device_register(&smc91x_device); | 116 | platform_device_register(&smc91x_device); |
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index 1e3abbe37cac..87765467de63 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c | |||
@@ -184,6 +184,7 @@ static void __init gplugd_init(void) | |||
184 | pxa168_add_uart(3); | 184 | pxa168_add_uart(3); |
185 | pxa168_add_ssp(1); | 185 | pxa168_add_ssp(1); |
186 | pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); | 186 | pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); |
187 | platform_device_register(&pxa168_device_gpio); | ||
187 | 188 | ||
188 | pxa168_add_eth(&gplugd_eth_platform_data); | 189 | pxa168_add_eth(&gplugd_eth_platform_data); |
189 | } | 190 | } |
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h index 99b4ce1b6562..0e135a599f3e 100644 --- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h +++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define __ASM_MACH_GPIO_PXA_H | 2 | #define __ASM_MACH_GPIO_PXA_H |
3 | 3 | ||
4 | #include <mach/addr-map.h> | 4 | #include <mach/addr-map.h> |
5 | #include <mach/cputype.h> | ||
5 | #include <mach/irqs.h> | 6 | #include <mach/irqs.h> |
6 | 7 | ||
7 | #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) | 8 | #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) |
@@ -9,8 +10,6 @@ | |||
9 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 10 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
10 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) | 11 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) |
11 | 12 | ||
12 | #define NR_BUILTIN_GPIO IRQ_GPIO_NUM | ||
13 | |||
14 | #define gpio_to_bank(gpio) ((gpio) >> 5) | 13 | #define gpio_to_bank(gpio) ((gpio) >> 5) |
15 | 14 | ||
16 | /* NOTE: these macros are defined here to make optimization of | 15 | /* NOTE: these macros are defined here to make optimization of |
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h index 681262359d1c..13219ebf5128 100644 --- a/arch/arm/mach-mmp/include/mach/gpio.h +++ b/arch/arm/mach-mmp/include/mach/gpio.h | |||
@@ -3,11 +3,6 @@ | |||
3 | 3 | ||
4 | #include <asm-generic/gpio.h> | 4 | #include <asm-generic/gpio.h> |
5 | 5 | ||
6 | #define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) | 6 | #include <mach/cputype.h> |
7 | #define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START) | ||
8 | 7 | ||
9 | #define __gpio_is_inverted(gpio) (0) | ||
10 | #define __gpio_is_occupied(gpio) (0) | ||
11 | |||
12 | #include <plat/gpio.h> | ||
13 | #endif /* __ASM_MACH_GPIO_H */ | 8 | #endif /* __ASM_MACH_GPIO_H */ |
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h index a09d328e2ddd..34635a0bbb59 100644 --- a/arch/arm/mach-mmp/include/mach/irqs.h +++ b/arch/arm/mach-mmp/include/mach/irqs.h | |||
@@ -219,10 +219,10 @@ | |||
219 | #define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) | 219 | #define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) |
220 | 220 | ||
221 | #define IRQ_GPIO_START 128 | 221 | #define IRQ_GPIO_START 128 |
222 | #define IRQ_GPIO_NUM 192 | 222 | #define MMP_NR_BUILTIN_GPIO 192 |
223 | #define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) | 223 | #define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio)) |
224 | 224 | ||
225 | #define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) | 225 | #define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO) |
226 | 226 | ||
227 | #define NR_IRQS (IRQ_BOARD_START) | 227 | #define NR_IRQS (IRQ_BOARD_START) |
228 | 228 | ||
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index 2f7b2d3c2b18..cba22fed2265 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h | |||
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3; | |||
32 | extern struct pxa_device_desc mmp2_device_asram; | 32 | extern struct pxa_device_desc mmp2_device_asram; |
33 | extern struct pxa_device_desc mmp2_device_isram; | 33 | extern struct pxa_device_desc mmp2_device_isram; |
34 | 34 | ||
35 | extern struct platform_device mmp2_device_gpio; | ||
36 | |||
35 | static inline int mmp2_add_uart(int id) | 37 | static inline int mmp2_add_uart(int id) |
36 | { | 38 | { |
37 | struct pxa_device_desc *d = NULL; | 39 | struct pxa_device_desc *d = NULL; |
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index a677aa732c26..dc03d580a06d 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h | |||
@@ -43,6 +43,8 @@ struct pxa168_usb_pdata { | |||
43 | /* pdata can be NULL */ | 43 | /* pdata can be NULL */ |
44 | int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); | 44 | int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); |
45 | 45 | ||
46 | extern struct platform_device pxa168_device_gpio; | ||
47 | |||
46 | static inline int pxa168_add_uart(int id) | 48 | static inline int pxa168_add_uart(int id) |
47 | { | 49 | { |
48 | struct pxa_device_desc *d = NULL; | 50 | struct pxa_device_desc *d = NULL; |
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index 91be75591398..4de13abef7bb 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h | |||
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3; | |||
21 | extern struct pxa_device_desc pxa910_device_pwm4; | 21 | extern struct pxa_device_desc pxa910_device_pwm4; |
22 | extern struct pxa_device_desc pxa910_device_nand; | 22 | extern struct pxa_device_desc pxa910_device_nand; |
23 | 23 | ||
24 | extern struct platform_device pxa910_device_gpio; | ||
25 | |||
24 | static inline int pxa910_add_uart(int id) | 26 | static inline int pxa910_add_uart(int id) |
25 | { | 27 | { |
26 | struct pxa_device_desc *d = NULL; | 28 | struct pxa_device_desc *d = NULL; |
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index 5dd1d4a6aeb9..617c60a170a4 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/platform_device.h> | ||
16 | 17 | ||
17 | #include <asm/hardware/cache-tauros2.h> | 18 | #include <asm/hardware/cache-tauros2.h> |
18 | 19 | ||
@@ -24,7 +25,6 @@ | |||
24 | #include <mach/irqs.h> | 25 | #include <mach/irqs.h> |
25 | #include <mach/dma.h> | 26 | #include <mach/dma.h> |
26 | #include <mach/mfp.h> | 27 | #include <mach/mfp.h> |
27 | #include <mach/gpio-pxa.h> | ||
28 | #include <mach/devices.h> | 28 | #include <mach/devices.h> |
29 | #include <mach/mmp2.h> | 29 | #include <mach/mmp2.h> |
30 | 30 | ||
@@ -33,8 +33,6 @@ | |||
33 | 33 | ||
34 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) | 34 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) |
35 | 35 | ||
36 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c) | ||
37 | |||
38 | static struct mfp_addr_map mmp2_addr_map[] __initdata = { | 36 | static struct mfp_addr_map mmp2_addr_map[] __initdata = { |
39 | 37 | ||
40 | MFP_ADDR_X(GPIO0, GPIO58, 0x54), | 38 | MFP_ADDR_X(GPIO0, GPIO58, 0x54), |
@@ -95,24 +93,9 @@ void mmp2_clear_pmic_int(void) | |||
95 | __raw_writel(data, mfpr_pmic); | 93 | __raw_writel(data, mfpr_pmic); |
96 | } | 94 | } |
97 | 95 | ||
98 | static void __init mmp2_init_gpio(void) | ||
99 | { | ||
100 | int i; | ||
101 | |||
102 | /* enable GPIO clock */ | ||
103 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO); | ||
104 | |||
105 | /* unmask GPIO edge detection for all 6 banks -- APMASKx */ | ||
106 | for (i = 0; i < 6; i++) | ||
107 | __raw_writel(0xffffffff, APMASK(i)); | ||
108 | |||
109 | pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL); | ||
110 | } | ||
111 | |||
112 | void __init mmp2_init_irq(void) | 96 | void __init mmp2_init_irq(void) |
113 | { | 97 | { |
114 | mmp2_init_icu(); | 98 | mmp2_init_icu(); |
115 | mmp2_init_gpio(); | ||
116 | } | 99 | } |
117 | 100 | ||
118 | static void sdhc_clk_enable(struct clk *clk) | 101 | static void sdhc_clk_enable(struct clk *clk) |
@@ -149,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000); | |||
149 | static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); | 132 | static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); |
150 | static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); | 133 | static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); |
151 | static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); | 134 | static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); |
135 | static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000); | ||
152 | 136 | ||
153 | static APMU_CLK(nand, NAND, 0xbf, 100000000); | 137 | static APMU_CLK(nand, NAND, 0xbf, 100000000); |
154 | static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); | 138 | static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); |
@@ -168,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = { | |||
168 | INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), | 152 | INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), |
169 | INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), | 153 | INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), |
170 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | 154 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), |
155 | INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL), | ||
171 | INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), | 156 | INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), |
172 | INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), | 157 | INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), |
173 | INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), | 158 | INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), |
@@ -230,3 +215,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000); | |||
230 | /* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ | 215 | /* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ |
231 | MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); | 216 | MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); |
232 | 217 | ||
218 | struct resource mmp2_resource_gpio[] = { | ||
219 | { | ||
220 | .start = 0xd4019000, | ||
221 | .end = 0xd4019fff, | ||
222 | .flags = IORESOURCE_MEM, | ||
223 | }, { | ||
224 | .start = IRQ_MMP2_GPIO, | ||
225 | .end = IRQ_MMP2_GPIO, | ||
226 | .flags = IORESOURCE_IRQ, | ||
227 | }, | ||
228 | }; | ||
229 | |||
230 | struct platform_device mmp2_device_gpio = { | ||
231 | .name = "pxa-gpio", | ||
232 | .id = -1, | ||
233 | .num_resources = ARRAY_SIZE(mmp2_resource_gpio), | ||
234 | .resource = mmp2_resource_gpio, | ||
235 | }; | ||
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 13f23867a86a..7bc17eaa12eb 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/list.h> | 13 | #include <linux/list.h> |
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/clk.h> | 15 | #include <linux/clk.h> |
16 | #include <linux/platform_device.h> | ||
16 | 17 | ||
17 | #include <asm/mach/time.h> | 18 | #include <asm/mach/time.h> |
18 | #include <mach/addr-map.h> | 19 | #include <mach/addr-map.h> |
@@ -20,7 +21,6 @@ | |||
20 | #include <mach/regs-apbc.h> | 21 | #include <mach/regs-apbc.h> |
21 | #include <mach/regs-apmu.h> | 22 | #include <mach/regs-apmu.h> |
22 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
23 | #include <mach/gpio-pxa.h> | ||
24 | #include <mach/dma.h> | 24 | #include <mach/dma.h> |
25 | #include <mach/devices.h> | 25 | #include <mach/devices.h> |
26 | #include <mach/mfp.h> | 26 | #include <mach/mfp.h> |
@@ -43,26 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = | |||
43 | MFP_ADDR_END, | 43 | MFP_ADDR_END, |
44 | }; | 44 | }; |
45 | 45 | ||
46 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) | ||
47 | |||
48 | static void __init pxa168_init_gpio(void) | ||
49 | { | ||
50 | int i; | ||
51 | |||
52 | /* enable GPIO clock */ | ||
53 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO); | ||
54 | |||
55 | /* unmask GPIO edge detection for all 4 banks - APMASKx */ | ||
56 | for (i = 0; i < 4; i++) | ||
57 | __raw_writel(0xffffffff, APMASK(i)); | ||
58 | |||
59 | pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL); | ||
60 | } | ||
61 | |||
62 | void __init pxa168_init_irq(void) | 46 | void __init pxa168_init_irq(void) |
63 | { | 47 | { |
64 | icu_init_irq(); | 48 | icu_init_irq(); |
65 | pxa168_init_gpio(); | ||
66 | } | 49 | } |
67 | 50 | ||
68 | /* APB peripheral clocks */ | 51 | /* APB peripheral clocks */ |
@@ -80,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0); | |||
80 | static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); | 63 | static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); |
81 | static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); | 64 | static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); |
82 | static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); | 65 | static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); |
66 | static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000); | ||
83 | static APBC_CLK(keypad, PXA168_KPC, 0, 32000); | 67 | static APBC_CLK(keypad, PXA168_KPC, 0, 32000); |
84 | 68 | ||
85 | static APMU_CLK(nand, NAND, 0x19b, 156000000); | 69 | static APMU_CLK(nand, NAND, 0x19b, 156000000); |
@@ -105,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = { | |||
105 | INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), | 89 | INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), |
106 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | 90 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), |
107 | INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), | 91 | INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), |
92 | INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL), | ||
108 | INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), | 93 | INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), |
109 | INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), | 94 | INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), |
110 | INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), | 95 | INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), |
@@ -174,6 +159,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); | |||
174 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); | 159 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); |
175 | PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); | 160 | PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); |
176 | 161 | ||
162 | struct resource pxa168_resource_gpio[] = { | ||
163 | { | ||
164 | .start = 0xd4019000, | ||
165 | .end = 0xd4019fff, | ||
166 | .flags = IORESOURCE_MEM, | ||
167 | }, { | ||
168 | .start = IRQ_PXA168_GPIOX, | ||
169 | .end = IRQ_PXA168_GPIOX, | ||
170 | .flags = IORESOURCE_IRQ, | ||
171 | }, | ||
172 | }; | ||
173 | |||
174 | struct platform_device pxa168_device_gpio = { | ||
175 | .name = "pxa-gpio", | ||
176 | .id = -1, | ||
177 | .num_resources = ARRAY_SIZE(pxa168_resource_gpio), | ||
178 | .resource = pxa168_resource_gpio, | ||
179 | }; | ||
180 | |||
177 | struct resource pxa168_usb_host_resources[] = { | 181 | struct resource pxa168_usb_host_resources[] = { |
178 | /* USB Host conroller register base */ | 182 | /* USB Host conroller register base */ |
179 | [0] = { | 183 | [0] = { |
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c index 4ebbfbba39fc..3241a25784d0 100644 --- a/arch/arm/mach-mmp/pxa910.c +++ b/arch/arm/mach-mmp/pxa910.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/list.h> | 13 | #include <linux/list.h> |
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/platform_device.h> | ||
15 | 16 | ||
16 | #include <asm/mach/time.h> | 17 | #include <asm/mach/time.h> |
17 | #include <mach/addr-map.h> | 18 | #include <mach/addr-map.h> |
@@ -19,7 +20,6 @@ | |||
19 | #include <mach/regs-apmu.h> | 20 | #include <mach/regs-apmu.h> |
20 | #include <mach/cputype.h> | 21 | #include <mach/cputype.h> |
21 | #include <mach/irqs.h> | 22 | #include <mach/irqs.h> |
22 | #include <mach/gpio-pxa.h> | ||
23 | #include <mach/dma.h> | 23 | #include <mach/dma.h> |
24 | #include <mach/mfp.h> | 24 | #include <mach/mfp.h> |
25 | #include <mach/devices.h> | 25 | #include <mach/devices.h> |
@@ -77,26 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata = | |||
77 | MFP_ADDR_END, | 77 | MFP_ADDR_END, |
78 | }; | 78 | }; |
79 | 79 | ||
80 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c) | ||
81 | |||
82 | static void __init pxa910_init_gpio(void) | ||
83 | { | ||
84 | int i; | ||
85 | |||
86 | /* enable GPIO clock */ | ||
87 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO); | ||
88 | |||
89 | /* unmask GPIO edge detection for all 4 banks - APMASKx */ | ||
90 | for (i = 0; i < 4; i++) | ||
91 | __raw_writel(0xffffffff, APMASK(i)); | ||
92 | |||
93 | pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL); | ||
94 | } | ||
95 | |||
96 | void __init pxa910_init_irq(void) | 80 | void __init pxa910_init_irq(void) |
97 | { | 81 | { |
98 | icu_init_irq(); | 82 | icu_init_irq(); |
99 | pxa910_init_gpio(); | ||
100 | } | 83 | } |
101 | 84 | ||
102 | /* APB peripheral clocks */ | 85 | /* APB peripheral clocks */ |
@@ -108,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000); | |||
108 | static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); | 91 | static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); |
109 | static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); | 92 | static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); |
110 | static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); | 93 | static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); |
94 | static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000); | ||
111 | 95 | ||
112 | static APMU_CLK(nand, NAND, 0x19b, 156000000); | 96 | static APMU_CLK(nand, NAND, 0x19b, 156000000); |
113 | static APMU_CLK(u2o, USB, 0x1b, 480000000); | 97 | static APMU_CLK(u2o, USB, 0x1b, 480000000); |
@@ -123,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = { | |||
123 | INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), | 107 | INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), |
124 | INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), | 108 | INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), |
125 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | 109 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), |
110 | INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL), | ||
126 | INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), | 111 | INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), |
127 | }; | 112 | }; |
128 | 113 | ||
@@ -179,3 +164,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); | |||
179 | PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); | 164 | PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); |
180 | PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); | 165 | PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); |
181 | PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); | 166 | PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); |
167 | |||
168 | struct resource pxa910_resource_gpio[] = { | ||
169 | { | ||
170 | .start = 0xd4019000, | ||
171 | .end = 0xd4019fff, | ||
172 | .flags = IORESOURCE_MEM, | ||
173 | }, { | ||
174 | .start = IRQ_PXA910_AP_GPIO, | ||
175 | .end = IRQ_PXA910_AP_GPIO, | ||
176 | .flags = IORESOURCE_IRQ, | ||
177 | }, | ||
178 | }; | ||
179 | |||
180 | struct platform_device pxa910_device_gpio = { | ||
181 | .name = "pxa-gpio", | ||
182 | .id = -1, | ||
183 | .num_resources = ARRAY_SIZE(pxa910_resource_gpio), | ||
184 | .resource = pxa910_resource_gpio, | ||
185 | }; | ||
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index 257a21283ec1..8e3b5af04a57 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <mach/addr-map.h> | 19 | #include <mach/addr-map.h> |
20 | #include <mach/mfp-pxa910.h> | 20 | #include <mach/mfp-pxa910.h> |
21 | #include <mach/pxa910.h> | 21 | #include <mach/pxa910.h> |
22 | #include <mach/irqs.h> | ||
22 | 23 | ||
23 | #include "common.h" | 24 | #include "common.h" |
24 | 25 | ||
@@ -71,8 +72,8 @@ static struct resource smc91x_resources[] = { | |||
71 | .flags = IORESOURCE_MEM, | 72 | .flags = IORESOURCE_MEM, |
72 | }, | 73 | }, |
73 | [1] = { | 74 | [1] = { |
74 | .start = gpio_to_irq(80), | 75 | .start = MMP_GPIO_TO_IRQ(80), |
75 | .end = gpio_to_irq(80), | 76 | .end = MMP_GPIO_TO_IRQ(80), |
76 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 77 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
77 | } | 78 | } |
78 | }; | 79 | }; |
@@ -93,6 +94,7 @@ static void __init tavorevb_init(void) | |||
93 | 94 | ||
94 | /* on-chip devices */ | 95 | /* on-chip devices */ |
95 | pxa910_add_uart(1); | 96 | pxa910_add_uart(1); |
97 | platform_device_register(&pxa910_device_gpio); | ||
96 | 98 | ||
97 | /* off-chip devices */ | 99 | /* off-chip devices */ |
98 | platform_device_register(&smc91x_device); | 100 | platform_device_register(&smc91x_device); |
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c index 8ac22a62bf1a..0523e422990e 100644 --- a/arch/arm/mach-mmp/teton_bga.c +++ b/arch/arm/mach-mmp/teton_bga.c | |||
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = { | |||
66 | static struct i2c_board_info teton_bga_i2c_info[] __initdata = { | 66 | static struct i2c_board_info teton_bga_i2c_info[] __initdata = { |
67 | { | 67 | { |
68 | I2C_BOARD_INFO("ds1337", 0x68), | 68 | I2C_BOARD_INFO("ds1337", 0x68), |
69 | .irq = gpio_to_irq(RTC_INT_GPIO) | 69 | .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO) |
70 | }, | 70 | }, |
71 | }; | 71 | }; |
72 | 72 | ||
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void) | |||
78 | pxa168_add_uart(1); | 78 | pxa168_add_uart(1); |
79 | pxa168_add_keypad(&teton_bga_keypad_info); | 79 | pxa168_add_keypad(&teton_bga_keypad_info); |
80 | pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); | 80 | pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); |
81 | platform_device_register(&pxa168_device_gpio); | ||
81 | } | 82 | } |
82 | 83 | ||
83 | MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") | 84 | MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") |
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index f02658825576..5ac5d5832e45 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -24,12 +24,13 @@ | |||
24 | #include <mach/addr-map.h> | 24 | #include <mach/addr-map.h> |
25 | #include <mach/mfp-pxa910.h> | 25 | #include <mach/mfp-pxa910.h> |
26 | #include <mach/pxa910.h> | 26 | #include <mach/pxa910.h> |
27 | #include <mach/irqs.h> | ||
27 | 28 | ||
28 | #include "common.h" | 29 | #include "common.h" |
29 | 30 | ||
30 | #define TTCDKB_GPIO_EXT0(x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ | 31 | #define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ |
31 | ((x < 16) ? x : 15))) | 32 | ((x < 16) ? x : 15))) |
32 | #define TTCDKB_GPIO_EXT1(x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ | 33 | #define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ |
33 | ((x < 16) ? x : 15))) | 34 | ((x < 16) ? x : 15))) |
34 | 35 | ||
35 | /* | 36 | /* |
@@ -122,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = { | |||
122 | }; | 123 | }; |
123 | 124 | ||
124 | static struct platform_device *ttc_dkb_devices[] = { | 125 | static struct platform_device *ttc_dkb_devices[] = { |
126 | &pxa910_device_gpio, | ||
125 | &ttc_dkb_device_onenand, | 127 | &ttc_dkb_device_onenand, |
126 | }; | 128 | }; |
127 | 129 | ||
@@ -136,7 +138,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = { | |||
136 | { | 138 | { |
137 | .type = "max7312", | 139 | .type = "max7312", |
138 | .addr = 0x23, | 140 | .addr = 0x23, |
139 | .irq = IRQ_GPIO(80), | 141 | .irq = MMP_GPIO_TO_IRQ(80), |
140 | .platform_data = &max7312_data, | 142 | .platform_data = &max7312_data, |
141 | }, | 143 | }, |
142 | }; | 144 | }; |
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index da6e4aad177c..df0ad3ce234b 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/jiffies.h> | 23 | #include <linux/jiffies.h> |
24 | #include <linux/clkdev.h> | 24 | #include <linux/clkdev.h> |
25 | #include <linux/spinlock.h> | ||
25 | 26 | ||
26 | #include <asm/clkdev.h> | 27 | #include <asm/clkdev.h> |
27 | #include <asm/div64.h> | 28 | #include <asm/div64.h> |
@@ -29,6 +30,7 @@ | |||
29 | #include <mach/mx28.h> | 30 | #include <mach/mx28.h> |
30 | #include <mach/common.h> | 31 | #include <mach/common.h> |
31 | #include <mach/clock.h> | 32 | #include <mach/clock.h> |
33 | #include <mach/digctl.h> | ||
32 | 34 | ||
33 | #include "regs-clkctrl-mx28.h" | 35 | #include "regs-clkctrl-mx28.h" |
34 | 36 | ||
@@ -43,6 +45,33 @@ static struct clk emi_clk; | |||
43 | static struct clk saif0_clk; | 45 | static struct clk saif0_clk; |
44 | static struct clk saif1_clk; | 46 | static struct clk saif1_clk; |
45 | static struct clk clk32k_clk; | 47 | static struct clk clk32k_clk; |
48 | static DEFINE_SPINLOCK(clkmux_lock); | ||
49 | |||
50 | /* | ||
51 | * HW_SAIF_CLKMUX_SEL: | ||
52 | * DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1 | ||
53 | * clock pins selected for SAIF1 input clocks. | ||
54 | * CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and | ||
55 | * SAIF0 clock inputs selected for SAIF1 input clocks. | ||
56 | * EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input | ||
57 | * clocks. | ||
58 | * EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input | ||
59 | * clocks. | ||
60 | */ | ||
61 | int mxs_saif_clkmux_select(unsigned int clkmux) | ||
62 | { | ||
63 | if (clkmux > 0x3) | ||
64 | return -EINVAL; | ||
65 | |||
66 | spin_lock(&clkmux_lock); | ||
67 | __raw_writel(BM_DIGCTL_CTRL_SAIF_CLKMUX, | ||
68 | DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_CLR_ADDR); | ||
69 | __raw_writel(clkmux << BP_DIGCTL_CTRL_SAIF_CLKMUX, | ||
70 | DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR); | ||
71 | spin_unlock(&clkmux_lock); | ||
72 | |||
73 | return 0; | ||
74 | } | ||
46 | 75 | ||
47 | static int _raw_clk_enable(struct clk *clk) | 76 | static int _raw_clk_enable(struct clk *clk) |
48 | { | 77 | { |
@@ -785,6 +814,15 @@ int __init mx28_clocks_init(void) | |||
785 | clk_set_parent(&saif0_clk, &pll0_clk); | 814 | clk_set_parent(&saif0_clk, &pll0_clk); |
786 | clk_set_parent(&saif1_clk, &pll0_clk); | 815 | clk_set_parent(&saif1_clk, &pll0_clk); |
787 | 816 | ||
817 | /* | ||
818 | * Set an initial clock rate for the saif internal logic to work | ||
819 | * properly. This is important when working in EXTMASTER mode that | ||
820 | * uses the other saif's BITCLK&LRCLK but it still needs a basic | ||
821 | * clock which should be fast enough for the internal logic. | ||
822 | */ | ||
823 | clk_set_rate(&saif0_clk, 24000000); | ||
824 | clk_set_rate(&saif1_clk, 24000000); | ||
825 | |||
788 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 826 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
789 | 827 | ||
790 | mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); | 828 | mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); |
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h index c8887103f0e3..4f50094e293d 100644 --- a/arch/arm/mach-mxs/devices-mx28.h +++ b/arch/arm/mach-mxs/devices-mx28.h | |||
@@ -47,6 +47,7 @@ struct platform_device *__init mx28_add_mxsfb( | |||
47 | const struct mxsfb_platform_data *pdata); | 47 | const struct mxsfb_platform_data *pdata); |
48 | 48 | ||
49 | extern const struct mxs_saif_data mx28_saif_data[] __initconst; | 49 | extern const struct mxs_saif_data mx28_saif_data[] __initconst; |
50 | #define mx28_add_saif(id) mxs_add_saif(&mx28_saif_data[id]) | 50 | #define mx28_add_saif(id, pdata) \ |
51 | mxs_add_saif(&mx28_saif_data[id], pdata) | ||
51 | 52 | ||
52 | struct platform_device *__init mx28_add_rtc_stmp3xxx(void); | 53 | struct platform_device *__init mx28_add_rtc_stmp3xxx(void); |
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c index 1ec965e9fe92..f6e3a60b4201 100644 --- a/arch/arm/mach-mxs/devices/platform-mxs-saif.c +++ b/arch/arm/mach-mxs/devices/platform-mxs-saif.c | |||
@@ -32,7 +32,8 @@ const struct mxs_saif_data mx28_saif_data[] __initconst = { | |||
32 | }; | 32 | }; |
33 | #endif | 33 | #endif |
34 | 34 | ||
35 | struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data) | 35 | struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data, |
36 | const struct mxs_saif_platform_data *pdata) | ||
36 | { | 37 | { |
37 | struct resource res[] = { | 38 | struct resource res[] = { |
38 | { | 39 | { |
@@ -56,5 +57,5 @@ struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data) | |||
56 | }; | 57 | }; |
57 | 58 | ||
58 | return mxs_add_platform_device("mxs-saif", data->id, res, | 59 | return mxs_add_platform_device("mxs-saif", data->id, res, |
59 | ARRAY_SIZE(res), NULL, 0); | 60 | ARRAY_SIZE(res), pdata, sizeof(*pdata)); |
60 | } | 61 | } |
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 1388485414c9..e1237ab25862 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h | |||
@@ -17,6 +17,7 @@ extern const u32 *mxs_get_ocotp(void); | |||
17 | extern int mxs_reset_block(void __iomem *); | 17 | extern int mxs_reset_block(void __iomem *); |
18 | extern void mxs_timer_init(struct clk *, int); | 18 | extern void mxs_timer_init(struct clk *, int); |
19 | extern void mxs_restart(char, const char *); | 19 | extern void mxs_restart(char, const char *); |
20 | extern int mxs_saif_clkmux_select(unsigned int clkmux); | ||
20 | 21 | ||
21 | extern int mx23_register_gpios(void); | 22 | extern int mx23_register_gpios(void); |
22 | extern int mx23_clocks_init(void); | 23 | extern int mx23_clocks_init(void); |
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index a8080f44c03d..dc369c1239fc 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h | |||
@@ -94,6 +94,7 @@ struct platform_device *__init mxs_add_mxs_pwm( | |||
94 | resource_size_t iobase, int id); | 94 | resource_size_t iobase, int id); |
95 | 95 | ||
96 | /* saif */ | 96 | /* saif */ |
97 | #include <sound/saif.h> | ||
97 | struct mxs_saif_data { | 98 | struct mxs_saif_data { |
98 | int id; | 99 | int id; |
99 | resource_size_t iobase; | 100 | resource_size_t iobase; |
@@ -103,4 +104,5 @@ struct mxs_saif_data { | |||
103 | }; | 104 | }; |
104 | 105 | ||
105 | struct platform_device *__init mxs_add_saif( | 106 | struct platform_device *__init mxs_add_saif( |
106 | const struct mxs_saif_data *data); | 107 | const struct mxs_saif_data *data, |
108 | const struct mxs_saif_platform_data *pdata); | ||
diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h new file mode 100644 index 000000000000..49a888c65d6d --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/digctl.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __MACH_DIGCTL_H__ | ||
10 | #define __MACH_DIGCTL_H__ | ||
11 | |||
12 | /* MXS DIGCTL SAIF CLKMUX */ | ||
13 | #define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0 | ||
14 | #define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1 | ||
15 | #define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2 | ||
16 | #define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3 | ||
17 | |||
18 | #define HW_DIGCTL_CTRL 0x0 | ||
19 | #define BP_DIGCTL_CTRL_SAIF_CLKMUX 10 | ||
20 | #define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10) | ||
21 | #endif | ||
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index d0cc37fd23a4..eb0597be4e23 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c | |||
@@ -27,6 +27,7 @@ | |||
27 | 27 | ||
28 | #include <mach/common.h> | 28 | #include <mach/common.h> |
29 | #include <mach/iomux-mx28.h> | 29 | #include <mach/iomux-mx28.h> |
30 | #include <mach/digctl.h> | ||
30 | 31 | ||
31 | #include "devices-mx28.h" | 32 | #include "devices-mx28.h" |
32 | 33 | ||
@@ -421,6 +422,18 @@ static struct gpio mx28evk_lcd_gpios[] = { | |||
421 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, | 422 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, |
422 | }; | 423 | }; |
423 | 424 | ||
425 | static const struct mxs_saif_platform_data | ||
426 | mx28evk_mxs_saif_pdata[] __initconst = { | ||
427 | /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */ | ||
428 | { | ||
429 | .master_mode = 1, | ||
430 | .master_id = 0, | ||
431 | }, { | ||
432 | .master_mode = 0, | ||
433 | .master_id = 0, | ||
434 | }, | ||
435 | }; | ||
436 | |||
424 | static void __init mx28evk_init(void) | 437 | static void __init mx28evk_init(void) |
425 | { | 438 | { |
426 | int ret; | 439 | int ret; |
@@ -454,8 +467,9 @@ static void __init mx28evk_init(void) | |||
454 | else | 467 | else |
455 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); | 468 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); |
456 | 469 | ||
457 | mx28_add_saif(0); | 470 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); |
458 | mx28_add_saif(1); | 471 | mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]); |
472 | mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]); | ||
459 | 473 | ||
460 | mx28_add_mxs_i2c(0); | 474 | mx28_add_mxs_i2c(0); |
461 | i2c_register_board_info(0, mxs_i2c0_board_info, | 475 | i2c_register_board_info(0, mxs_i2c0_board_info, |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 5598e00ccf52..4b4c9e25a83e 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -410,6 +410,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
410 | { | 410 | { |
411 | .mmc = 5, | 411 | .mmc = 5, |
412 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, | 412 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, |
413 | .pm_caps = MMC_PM_KEEP_POWER, | ||
413 | .gpio_cd = -EINVAL, | 414 | .gpio_cd = -EINVAL, |
414 | .gpio_wp = -EINVAL, | 415 | .gpio_wp = -EINVAL, |
415 | .ocr_mask = MMC_VDD_165_195, | 416 | .ocr_mask = MMC_VDD_165_195, |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index f5a3a3f11739..4b1cfe32e6ba 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/i2c/pca953x.h> | 24 | #include <linux/i2c/pca953x.h> |
25 | #include <linux/can/platform/ti_hecc.h> | 25 | #include <linux/can/platform/ti_hecc.h> |
26 | #include <linux/davinci_emac.h> | 26 | #include <linux/davinci_emac.h> |
27 | #include <linux/mmc/host.h> | ||
27 | 28 | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <mach/am35xx.h> | 30 | #include <mach/am35xx.h> |
@@ -40,6 +41,7 @@ | |||
40 | 41 | ||
41 | #include "mux.h" | 42 | #include "mux.h" |
42 | #include "control.h" | 43 | #include "control.h" |
44 | #include "hsmmc.h" | ||
43 | 45 | ||
44 | #define AM35XX_EVM_MDIO_FREQUENCY (1000000) | 46 | #define AM35XX_EVM_MDIO_FREQUENCY (1000000) |
45 | 47 | ||
@@ -455,6 +457,23 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata) | |||
455 | static struct omap_board_config_kernel am3517_evm_config[] __initdata = { | 457 | static struct omap_board_config_kernel am3517_evm_config[] __initdata = { |
456 | }; | 458 | }; |
457 | 459 | ||
460 | static struct omap2_hsmmc_info mmc[] = { | ||
461 | { | ||
462 | .mmc = 1, | ||
463 | .caps = MMC_CAP_4_BIT_DATA, | ||
464 | .gpio_cd = 127, | ||
465 | .gpio_wp = 126, | ||
466 | }, | ||
467 | { | ||
468 | .mmc = 2, | ||
469 | .caps = MMC_CAP_4_BIT_DATA, | ||
470 | .gpio_cd = 128, | ||
471 | .gpio_wp = 129, | ||
472 | }, | ||
473 | {} /* Terminator */ | ||
474 | }; | ||
475 | |||
476 | |||
458 | static void __init am3517_evm_init(void) | 477 | static void __init am3517_evm_init(void) |
459 | { | 478 | { |
460 | omap_board_config = am3517_evm_config; | 479 | omap_board_config = am3517_evm_config; |
@@ -483,6 +502,9 @@ static void __init am3517_evm_init(void) | |||
483 | 502 | ||
484 | /* MUSB */ | 503 | /* MUSB */ |
485 | am3517_evm_musb_init(); | 504 | am3517_evm_musb_init(); |
505 | |||
506 | /* MMC init function */ | ||
507 | omap2_hsmmc_init(mmc); | ||
486 | } | 508 | } |
487 | 509 | ||
488 | MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | 510 | MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 039cadf84c11..d75e5f6b8a01 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3297,7 +3297,7 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3297 | CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3297 | CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3298 | CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3298 | CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3299 | CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3299 | CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3300 | CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3300 | CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3301 | CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), | 3301 | CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), |
3302 | CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), | 3302 | CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), |
3303 | CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), | 3303 | CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), |
@@ -3333,7 +3333,7 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3333 | CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), | 3333 | CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), |
3334 | CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), | 3334 | CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), |
3335 | CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3335 | CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3336 | CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3336 | CLK("usbhs_omap", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3337 | CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3337 | CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3338 | CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), | 3338 | CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), |
3339 | CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), | 3339 | CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), |
@@ -3379,20 +3379,18 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3379 | CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), | 3379 | CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), |
3380 | CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), | 3380 | CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), |
3381 | CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3381 | CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3382 | CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
3383 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3382 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3384 | CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
3385 | CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3383 | CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3386 | CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3384 | CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3387 | CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), | 3385 | CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), |
3388 | CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), | 3386 | CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), |
3389 | CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), | 3387 | CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), |
3390 | CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), | 3388 | CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), |
3391 | CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), | 3389 | CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), |
3392 | CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), | 3390 | CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), |
3393 | CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), | 3391 | CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), |
3394 | CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), | 3392 | CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), |
3395 | CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, CK_3XXX), | 3393 | CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, CK_3XXX), |
3396 | CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), | 3394 | CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), |
3397 | CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), | 3395 | CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), |
3398 | CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), | 3396 | CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 730097ee0f23..08e86d793a1f 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3304,7 +3304,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
3304 | CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), | 3304 | CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), |
3305 | CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), | 3305 | CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), |
3306 | CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), | 3306 | CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), |
3307 | CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), | 3307 | CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X), |
3308 | CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), | 3308 | CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), |
3309 | CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), | 3309 | CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), |
3310 | CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), | 3310 | CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), |
@@ -3315,7 +3315,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
3315 | CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), | 3315 | CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), |
3316 | CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), | 3316 | CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), |
3317 | CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), | 3317 | CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), |
3318 | CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), | 3318 | CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X), |
3319 | CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), | 3319 | CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), |
3320 | CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), | 3320 | CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), |
3321 | CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), | 3321 | CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), |
@@ -3323,7 +3323,7 @@ static struct omap_clk omap44xx_clks[] = { | |||
3323 | CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), | 3323 | CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), |
3324 | CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), | 3324 | CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), |
3325 | CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), | 3325 | CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), |
3326 | CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), | 3326 | CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X), |
3327 | CLK(NULL, "usim_ck", &usim_ck, CK_443X), | 3327 | CLK(NULL, "usim_ck", &usim_ck, CK_443X), |
3328 | CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), | 3328 | CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), |
3329 | CLK(NULL, "usim_fck", &usim_fck, CK_443X), | 3329 | CLK(NULL, "usim_fck", &usim_fck, CK_443X), |
@@ -3383,8 +3383,8 @@ static struct omap_clk omap44xx_clks[] = { | |||
3383 | CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), | 3383 | CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), |
3384 | CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), | 3384 | CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), |
3385 | CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), | 3385 | CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), |
3386 | CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), | 3386 | CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X), |
3387 | CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), | 3387 | CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X), |
3388 | CLK("omap_wdt", "ick", &dummy_ck, CK_443X), | 3388 | CLK("omap_wdt", "ick", &dummy_ck, CK_443X), |
3389 | CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), | 3389 | CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), |
3390 | CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), | 3390 | CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index f4a1020559a7..bd844af13af5 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
@@ -171,6 +171,17 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, | |||
171 | } | 171 | } |
172 | } | 172 | } |
173 | 173 | ||
174 | static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc) | ||
175 | { | ||
176 | u32 reg; | ||
177 | |||
178 | if (mmc->slots[0].internal_clock) { | ||
179 | reg = omap_ctrl_readl(control_devconf1_offset); | ||
180 | reg |= OMAP2_MMCSDIO2ADPCLKISEL; | ||
181 | omap_ctrl_writel(reg, control_devconf1_offset); | ||
182 | } | ||
183 | } | ||
184 | |||
174 | static void hsmmc23_before_set_reg(struct device *dev, int slot, | 185 | static void hsmmc23_before_set_reg(struct device *dev, int slot, |
175 | int power_on, int vdd) | 186 | int power_on, int vdd) |
176 | { | 187 | { |
@@ -179,16 +190,19 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot, | |||
179 | if (mmc->slots[0].remux) | 190 | if (mmc->slots[0].remux) |
180 | mmc->slots[0].remux(dev, slot, power_on); | 191 | mmc->slots[0].remux(dev, slot, power_on); |
181 | 192 | ||
182 | if (power_on) { | 193 | if (power_on) |
183 | /* Only MMC2 supports a CLKIN */ | 194 | hsmmc2_select_input_clk_src(mmc); |
184 | if (mmc->slots[0].internal_clock) { | 195 | } |
185 | u32 reg; | ||
186 | 196 | ||
187 | reg = omap_ctrl_readl(control_devconf1_offset); | 197 | static int am35x_hsmmc2_set_power(struct device *dev, int slot, |
188 | reg |= OMAP2_MMCSDIO2ADPCLKISEL; | 198 | int power_on, int vdd) |
189 | omap_ctrl_writel(reg, control_devconf1_offset); | 199 | { |
190 | } | 200 | struct omap_mmc_platform_data *mmc = dev->platform_data; |
191 | } | 201 | |
202 | if (power_on) | ||
203 | hsmmc2_select_input_clk_src(mmc); | ||
204 | |||
205 | return 0; | ||
192 | } | 206 | } |
193 | 207 | ||
194 | static int nop_mmc_set_power(struct device *dev, int slot, int power_on, | 208 | static int nop_mmc_set_power(struct device *dev, int slot, int power_on, |
@@ -200,10 +214,12 @@ static int nop_mmc_set_power(struct device *dev, int slot, int power_on, | |||
200 | static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, | 214 | static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, |
201 | int controller_nr) | 215 | int controller_nr) |
202 | { | 216 | { |
203 | if (gpio_is_valid(mmc_controller->slots[0].switch_pin)) | 217 | if (gpio_is_valid(mmc_controller->slots[0].switch_pin) && |
218 | (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES)) | ||
204 | omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, | 219 | omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, |
205 | OMAP_PIN_INPUT_PULLUP); | 220 | OMAP_PIN_INPUT_PULLUP); |
206 | if (gpio_is_valid(mmc_controller->slots[0].gpio_wp)) | 221 | if (gpio_is_valid(mmc_controller->slots[0].gpio_wp) && |
222 | (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES)) | ||
207 | omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, | 223 | omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, |
208 | OMAP_PIN_INPUT_PULLUP); | 224 | OMAP_PIN_INPUT_PULLUP); |
209 | if (cpu_is_omap34xx()) { | 225 | if (cpu_is_omap34xx()) { |
@@ -296,6 +312,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
296 | mmc->slots[0].name = hc_name; | 312 | mmc->slots[0].name = hc_name; |
297 | mmc->nr_slots = 1; | 313 | mmc->nr_slots = 1; |
298 | mmc->slots[0].caps = c->caps; | 314 | mmc->slots[0].caps = c->caps; |
315 | mmc->slots[0].pm_caps = c->pm_caps; | ||
299 | mmc->slots[0].internal_clock = !c->ext_clock; | 316 | mmc->slots[0].internal_clock = !c->ext_clock; |
300 | mmc->dma_mask = 0xffffffff; | 317 | mmc->dma_mask = 0xffffffff; |
301 | if (cpu_is_omap44xx()) | 318 | if (cpu_is_omap44xx()) |
@@ -336,11 +353,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
336 | * | 353 | * |
337 | * temporary HACK: ocr_mask instead of fixed supply | 354 | * temporary HACK: ocr_mask instead of fixed supply |
338 | */ | 355 | */ |
339 | mmc->slots[0].ocr_mask = c->ocr_mask; | 356 | if (cpu_is_omap3505() || cpu_is_omap3517()) |
340 | 357 | mmc->slots[0].ocr_mask = MMC_VDD_165_195 | | |
341 | if (cpu_is_omap3517() || cpu_is_omap3505()) | 358 | MMC_VDD_26_27 | |
342 | mmc->slots[0].set_power = nop_mmc_set_power; | 359 | MMC_VDD_27_28 | |
360 | MMC_VDD_29_30 | | ||
361 | MMC_VDD_30_31 | | ||
362 | MMC_VDD_31_32; | ||
343 | else | 363 | else |
364 | mmc->slots[0].ocr_mask = c->ocr_mask; | ||
365 | |||
366 | if (!cpu_is_omap3517() && !cpu_is_omap3505()) | ||
344 | mmc->slots[0].features |= HSMMC_HAS_PBIAS; | 367 | mmc->slots[0].features |= HSMMC_HAS_PBIAS; |
345 | 368 | ||
346 | if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) | 369 | if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) |
@@ -363,6 +386,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
363 | } | 386 | } |
364 | } | 387 | } |
365 | 388 | ||
389 | if (cpu_is_omap3517() || cpu_is_omap3505()) | ||
390 | mmc->slots[0].set_power = nop_mmc_set_power; | ||
391 | |||
366 | /* OMAP3630 HSMMC1 supports only 4-bit */ | 392 | /* OMAP3630 HSMMC1 supports only 4-bit */ |
367 | if (cpu_is_omap3630() && | 393 | if (cpu_is_omap3630() && |
368 | (c->caps & MMC_CAP_8_BIT_DATA)) { | 394 | (c->caps & MMC_CAP_8_BIT_DATA)) { |
@@ -372,6 +398,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
372 | } | 398 | } |
373 | break; | 399 | break; |
374 | case 2: | 400 | case 2: |
401 | if (cpu_is_omap3517() || cpu_is_omap3505()) | ||
402 | mmc->slots[0].set_power = am35x_hsmmc2_set_power; | ||
403 | |||
375 | if (c->ext_clock) | 404 | if (c->ext_clock) |
376 | c->transceiver = 1; | 405 | c->transceiver = 1; |
377 | if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { | 406 | if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { |
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h index f757e78d4d4f..c4409730c4bb 100644 --- a/arch/arm/mach-omap2/hsmmc.h +++ b/arch/arm/mach-omap2/hsmmc.h | |||
@@ -12,6 +12,7 @@ struct omap2_hsmmc_info { | |||
12 | u8 mmc; /* controller 1/2/3 */ | 12 | u8 mmc; /* controller 1/2/3 */ |
13 | u32 caps; /* 4/8 wires and any additional host | 13 | u32 caps; /* 4/8 wires and any additional host |
14 | * capabilities OR'd (ref. linux/mmc/host.h) */ | 14 | * capabilities OR'd (ref. linux/mmc/host.h) */ |
15 | u32 pm_caps; /* PM capabilities */ | ||
15 | bool transceiver; /* MMC-2 option */ | 16 | bool transceiver; /* MMC-2 option */ |
16 | bool ext_clock; /* use external pin for input clock */ | 17 | bool ext_clock; /* use external pin for input clock */ |
17 | bool cover_only; /* No card detect - just cover switch */ | 18 | bool cover_only; /* No card detect - just cover switch */ |
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c index 89ae29847c59..771dc781b746 100644 --- a/arch/arm/mach-omap2/usb-host.c +++ b/arch/arm/mach-omap2/usb-host.c | |||
@@ -28,51 +28,28 @@ | |||
28 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
30 | #include <plat/usb.h> | 30 | #include <plat/usb.h> |
31 | #include <plat/omap_device.h> | ||
31 | 32 | ||
32 | #include "mux.h" | 33 | #include "mux.h" |
33 | 34 | ||
34 | #ifdef CONFIG_MFD_OMAP_USB_HOST | 35 | #ifdef CONFIG_MFD_OMAP_USB_HOST |
35 | 36 | ||
36 | #define OMAP_USBHS_DEVICE "usbhs-omap" | 37 | #define OMAP_USBHS_DEVICE "usbhs_omap" |
37 | 38 | #define USBHS_UHH_HWMODNAME "usb_host_hs" | |
38 | static struct resource usbhs_resources[] = { | 39 | #define USBHS_TLL_HWMODNAME "usb_tll_hs" |
39 | { | ||
40 | .name = "uhh", | ||
41 | .flags = IORESOURCE_MEM, | ||
42 | }, | ||
43 | { | ||
44 | .name = "tll", | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, | ||
47 | { | ||
48 | .name = "ehci", | ||
49 | .flags = IORESOURCE_MEM, | ||
50 | }, | ||
51 | { | ||
52 | .name = "ehci-irq", | ||
53 | .flags = IORESOURCE_IRQ, | ||
54 | }, | ||
55 | { | ||
56 | .name = "ohci", | ||
57 | .flags = IORESOURCE_MEM, | ||
58 | }, | ||
59 | { | ||
60 | .name = "ohci-irq", | ||
61 | .flags = IORESOURCE_IRQ, | ||
62 | } | ||
63 | }; | ||
64 | |||
65 | static struct platform_device usbhs_device = { | ||
66 | .name = OMAP_USBHS_DEVICE, | ||
67 | .id = 0, | ||
68 | .num_resources = ARRAY_SIZE(usbhs_resources), | ||
69 | .resource = usbhs_resources, | ||
70 | }; | ||
71 | 40 | ||
72 | static struct usbhs_omap_platform_data usbhs_data; | 41 | static struct usbhs_omap_platform_data usbhs_data; |
73 | static struct ehci_hcd_omap_platform_data ehci_data; | 42 | static struct ehci_hcd_omap_platform_data ehci_data; |
74 | static struct ohci_hcd_omap_platform_data ohci_data; | 43 | static struct ohci_hcd_omap_platform_data ohci_data; |
75 | 44 | ||
45 | static struct omap_device_pm_latency omap_uhhtll_latency[] = { | ||
46 | { | ||
47 | .deactivate_func = omap_device_idle_hwmods, | ||
48 | .activate_func = omap_device_enable_hwmods, | ||
49 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, | ||
50 | }, | ||
51 | }; | ||
52 | |||
76 | /* MUX settings for EHCI pins */ | 53 | /* MUX settings for EHCI pins */ |
77 | /* | 54 | /* |
78 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST | 55 | * setup_ehci_io_mux - initialize IO pad mux for USBHOST |
@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode) | |||
508 | 485 | ||
509 | void __init usbhs_init(const struct usbhs_omap_board_data *pdata) | 486 | void __init usbhs_init(const struct usbhs_omap_board_data *pdata) |
510 | { | 487 | { |
511 | int i; | 488 | struct omap_hwmod *oh[2]; |
489 | struct omap_device *od; | ||
490 | int bus_id = -1; | ||
491 | int i; | ||
512 | 492 | ||
513 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { | 493 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { |
514 | usbhs_data.port_mode[i] = pdata->port_mode[i]; | 494 | usbhs_data.port_mode[i] = pdata->port_mode[i]; |
@@ -523,44 +503,34 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata) | |||
523 | usbhs_data.ohci_data = &ohci_data; | 503 | usbhs_data.ohci_data = &ohci_data; |
524 | 504 | ||
525 | if (cpu_is_omap34xx()) { | 505 | if (cpu_is_omap34xx()) { |
526 | usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE; | ||
527 | usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1; | ||
528 | usbhs_resources[1].start = OMAP34XX_USBTLL_BASE; | ||
529 | usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1; | ||
530 | usbhs_resources[2].start = OMAP34XX_EHCI_BASE; | ||
531 | usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1; | ||
532 | usbhs_resources[3].start = INT_34XX_EHCI_IRQ; | ||
533 | usbhs_resources[4].start = OMAP34XX_OHCI_BASE; | ||
534 | usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - 1; | ||
535 | usbhs_resources[5].start = INT_34XX_OHCI_IRQ; | ||
536 | setup_ehci_io_mux(pdata->port_mode); | 506 | setup_ehci_io_mux(pdata->port_mode); |
537 | setup_ohci_io_mux(pdata->port_mode); | 507 | setup_ohci_io_mux(pdata->port_mode); |
538 | } else if (cpu_is_omap44xx()) { | 508 | } else if (cpu_is_omap44xx()) { |
539 | usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE; | ||
540 | usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1; | ||
541 | usbhs_resources[1].start = OMAP44XX_USBTLL_BASE; | ||
542 | usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1; | ||
543 | usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE; | ||
544 | usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1; | ||
545 | usbhs_resources[3].start = OMAP44XX_IRQ_EHCI; | ||
546 | usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE; | ||
547 | usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1; | ||
548 | usbhs_resources[5].start = OMAP44XX_IRQ_OHCI; | ||
549 | setup_4430ehci_io_mux(pdata->port_mode); | 509 | setup_4430ehci_io_mux(pdata->port_mode); |
550 | setup_4430ohci_io_mux(pdata->port_mode); | 510 | setup_4430ohci_io_mux(pdata->port_mode); |
551 | } | 511 | } |
552 | 512 | ||
553 | if (platform_device_add_data(&usbhs_device, | 513 | oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); |
554 | &usbhs_data, sizeof(usbhs_data)) < 0) { | 514 | if (!oh[0]) { |
555 | printk(KERN_ERR "USBHS platform_device_add_data failed\n"); | 515 | pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); |
556 | goto init_end; | 516 | return; |
557 | } | 517 | } |
558 | 518 | ||
559 | if (platform_device_register(&usbhs_device) < 0) | 519 | oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); |
560 | printk(KERN_ERR "USBHS platform_device_register failed\n"); | 520 | if (!oh[1]) { |
521 | pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); | ||
522 | return; | ||
523 | } | ||
561 | 524 | ||
562 | init_end: | 525 | od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, |
563 | return; | 526 | (void *)&usbhs_data, sizeof(usbhs_data), |
527 | omap_uhhtll_latency, | ||
528 | ARRAY_SIZE(omap_uhhtll_latency), false); | ||
529 | if (IS_ERR(od)) { | ||
530 | pr_err("Could not build hwmod devices %s,%s\n", | ||
531 | USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); | ||
532 | return; | ||
533 | } | ||
564 | } | 534 | } |
565 | 535 | ||
566 | #else | 536 | #else |
@@ -570,5 +540,3 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata) | |||
570 | } | 540 | } |
571 | 541 | ||
572 | #endif | 542 | #endif |
573 | |||
574 | |||
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c index 4cb069fd9af2..ccdac4b6a469 100644 --- a/arch/arm/mach-pxa/am200epd.c +++ b/arch/arm/mach-pxa/am200epd.c | |||
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par) | |||
138 | { | 138 | { |
139 | int i; | 139 | int i; |
140 | 140 | ||
141 | free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); | 141 | free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par); |
142 | 142 | ||
143 | for (i = 0; i < ARRAY_SIZE(gpios); i++) | 143 | for (i = 0; i < ARRAY_SIZE(gpios); i++) |
144 | gpio_free(gpios[i]); | 144 | gpio_free(gpios[i]); |
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info) | |||
292 | { | 292 | { |
293 | int ret; | 293 | int ret; |
294 | 294 | ||
295 | ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, | 295 | ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq, |
296 | IRQF_DISABLED|IRQF_TRIGGER_FALLING, | 296 | IRQF_DISABLED|IRQF_TRIGGER_FALLING, |
297 | "AM200", info->par); | 297 | "AM200", info->par); |
298 | if (ret) | 298 | if (ret) |
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c index fa8bad235d9f..76c4b9494031 100644 --- a/arch/arm/mach-pxa/am300epd.c +++ b/arch/arm/mach-pxa/am300epd.c | |||
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par) | |||
176 | { | 176 | { |
177 | int i; | 177 | int i; |
178 | 178 | ||
179 | free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); | 179 | free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par); |
180 | 180 | ||
181 | for (i = 0; i < ARRAY_SIZE(gpios); i++) | 181 | for (i = 0; i < ARRAY_SIZE(gpios); i++) |
182 | gpio_free(gpios[i]); | 182 | gpio_free(gpios[i]); |
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info) | |||
240 | int ret; | 240 | int ret; |
241 | struct broadsheetfb_par *par = info->par; | 241 | struct broadsheetfb_par *par = info->par; |
242 | 242 | ||
243 | ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq, | 243 | ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq, |
244 | IRQF_DISABLED|IRQF_TRIGGER_RISING, | 244 | IRQF_DISABLED|IRQF_TRIGGER_RISING, |
245 | "AM300", par); | 245 | "AM300", par); |
246 | if (ret) | 246 | if (ret) |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index a34de9a0d5e5..c35456f02acb 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
@@ -180,7 +180,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = { | |||
180 | }; | 180 | }; |
181 | 181 | ||
182 | static struct ucb1400_pdata vpac270_ucb1400_pdata = { | 182 | static struct ucb1400_pdata vpac270_ucb1400_pdata = { |
183 | .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), | 183 | .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ), |
184 | }; | 184 | }; |
185 | 185 | ||
186 | 186 | ||
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index c2f0be040d27..c91727d1fe09 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c | |||
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = { | |||
50 | .flags = IORESOURCE_MEM | 50 | .flags = IORESOURCE_MEM |
51 | }, | 51 | }, |
52 | [2] = { | 52 | [2] = { |
53 | .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), | 53 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), |
54 | .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), | 54 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)), |
55 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING | 55 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING |
56 | } | 56 | } |
57 | }; | 57 | }; |
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void) | |||
80 | static struct plat_serial8250_port ti16c752_platform_data[] = { | 80 | static struct plat_serial8250_port ti16c752_platform_data[] = { |
81 | [0] = { | 81 | [0] = { |
82 | .mapbase = 0x14000000, | 82 | .mapbase = 0x14000000, |
83 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)), | 83 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)), |
84 | .irqflags = IRQF_TRIGGER_RISING, | 84 | .irqflags = IRQF_TRIGGER_RISING, |
85 | .flags = TI16C752_FLAGS, | 85 | .flags = TI16C752_FLAGS, |
86 | .iotype = UPIO_MEM, | 86 | .iotype = UPIO_MEM, |
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { | |||
89 | }, | 89 | }, |
90 | [1] = { | 90 | [1] = { |
91 | .mapbase = 0x14000040, | 91 | .mapbase = 0x14000040, |
92 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)), | 92 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)), |
93 | .irqflags = IRQF_TRIGGER_RISING, | 93 | .irqflags = IRQF_TRIGGER_RISING, |
94 | .flags = TI16C752_FLAGS, | 94 | .flags = TI16C752_FLAGS, |
95 | .iotype = UPIO_MEM, | 95 | .iotype = UPIO_MEM, |
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { | |||
98 | }, | 98 | }, |
99 | [2] = { | 99 | [2] = { |
100 | .mapbase = 0x14000080, | 100 | .mapbase = 0x14000080, |
101 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)), | 101 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)), |
102 | .irqflags = IRQF_TRIGGER_RISING, | 102 | .irqflags = IRQF_TRIGGER_RISING, |
103 | .flags = TI16C752_FLAGS, | 103 | .flags = TI16C752_FLAGS, |
104 | .iotype = UPIO_MEM, | 104 | .iotype = UPIO_MEM, |
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = { | |||
107 | }, | 107 | }, |
108 | [3] = { | 108 | [3] = { |
109 | .mapbase = 0x140000c0, | 109 | .mapbase = 0x140000c0, |
110 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)), | 110 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)), |
111 | .irqflags = IRQF_TRIGGER_RISING, | 111 | .irqflags = IRQF_TRIGGER_RISING, |
112 | .flags = TI16C752_FLAGS, | 112 | .flags = TI16C752_FLAGS, |
113 | .iotype = UPIO_MEM, | 113 | .iotype = UPIO_MEM, |
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index 13518a705399..431ef56700c4 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c | |||
@@ -33,7 +33,7 @@ | |||
33 | /* GPIO IRQ usage */ | 33 | /* GPIO IRQ usage */ |
34 | #define GPIO83_MMC_IRQ (83) | 34 | #define GPIO83_MMC_IRQ (83) |
35 | 35 | ||
36 | #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) | 36 | #define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ) |
37 | 37 | ||
38 | /* MMC power enable */ | 38 | /* MMC power enable */ |
39 | #define GPIO105_MMC_POWER (105) | 39 | #define GPIO105_MMC_POWER (105) |
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = { | |||
380 | .modalias = "libertas_spi", | 380 | .modalias = "libertas_spi", |
381 | .max_speed_hz = 13000000, | 381 | .max_speed_hz = 13000000, |
382 | .bus_num = 2, | 382 | .bus_num = 2, |
383 | .irq = gpio_to_irq(95), | 383 | .irq = PXA_GPIO_TO_IRQ(95), |
384 | .chip_select = 0, | 384 | .chip_select = 0, |
385 | .controller_data = &cm_x270_libertas_chip, | 385 | .controller_data = &cm_x270_libertas_chip, |
386 | .platform_data = &cm_x270_libertas_pdata, | 386 | .platform_data = &cm_x270_libertas_pdata, |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index ec170a552c23..8fa4ad27edf3 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
@@ -58,8 +58,8 @@ extern void cmx270_init(void); | |||
58 | #define CMX255_GPIO_IT8152_IRQ (0) | 58 | #define CMX255_GPIO_IT8152_IRQ (0) |
59 | #define CMX270_GPIO_IT8152_IRQ (22) | 59 | #define CMX270_GPIO_IT8152_IRQ (22) |
60 | 60 | ||
61 | #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) | 61 | #define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ) |
62 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) | 62 | #define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ) |
63 | 63 | ||
64 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | 64 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
65 | static struct resource cmx255_dm9000_resource[] = { | 65 | static struct resource cmx255_dm9000_resource[] = { |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 7236974da0b7..4b981b82d2a5 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
@@ -64,7 +64,7 @@ | |||
64 | #define GPIO82_MMC_IRQ (82) | 64 | #define GPIO82_MMC_IRQ (82) |
65 | #define GPIO85_MMC_WP (85) | 65 | #define GPIO85_MMC_WP (85) |
66 | 66 | ||
67 | #define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) | 67 | #define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ) |
68 | 68 | ||
69 | #define GPIO95_RTC_CS (95) | 69 | #define GPIO95_RTC_CS (95) |
70 | #define GPIO96_RTC_WR (96) | 70 | #define GPIO96_RTC_WR (96) |
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = { | |||
229 | .flags = IORESOURCE_MEM, | 229 | .flags = IORESOURCE_MEM, |
230 | }, | 230 | }, |
231 | [2] = { | 231 | [2] = { |
232 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | 232 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), |
233 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | 233 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), |
234 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 234 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
235 | } | 235 | } |
236 | }; | 236 | }; |
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 6a685165c9f2..29d5d541f602 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = { | |||
218 | .flags = IORESOURCE_MEM, | 218 | .flags = IORESOURCE_MEM, |
219 | }, | 219 | }, |
220 | { | 220 | { |
221 | .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), | 221 | .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), |
222 | .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), | 222 | .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ), |
223 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, | 223 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, |
224 | }, | 224 | }, |
225 | }; | 225 | }; |
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = { | |||
249 | }; | 249 | }; |
250 | 250 | ||
251 | static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { | 251 | static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { |
252 | .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), | 252 | .irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ), |
253 | }; | 253 | }; |
254 | 254 | ||
255 | static struct platform_device colibri_pxa270_ucb1400_device = { | 255 | static struct platform_device colibri_pxa270_ucb1400_device = { |
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index c01059a61f33..0846d210cb05 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = { | |||
78 | .flags = IORESOURCE_MEM, | 78 | .flags = IORESOURCE_MEM, |
79 | }, | 79 | }, |
80 | [1] = { | 80 | [1] = { |
81 | .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), | 81 | .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), |
82 | .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), | 82 | .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), |
83 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, | 83 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, |
84 | } | 84 | } |
85 | }; | 85 | }; |
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 5028f2300d50..6ad3359063af 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c | |||
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = { | |||
115 | .flags = IORESOURCE_MEM, | 115 | .flags = IORESOURCE_MEM, |
116 | }, | 116 | }, |
117 | [1] = { | 117 | [1] = { |
118 | .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), | 118 | .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), |
119 | .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), | 119 | .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO), |
120 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, | 120 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, |
121 | } | 121 | } |
122 | }; | 122 | }; |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 9d4dc5970b9c..66600f05e436 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = { | |||
531 | .chip_select = 0, | 531 | .chip_select = 0, |
532 | .platform_data = &corgi_ads7846_info, | 532 | .platform_data = &corgi_ads7846_info, |
533 | .controller_data= &corgi_ads7846_chip, | 533 | .controller_data= &corgi_ads7846_chip, |
534 | .irq = gpio_to_irq(CORGI_GPIO_TP_INT), | 534 | .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT), |
535 | }, { | 535 | }, { |
536 | .modalias = "corgi-lcd", | 536 | .modalias = "corgi-lcd", |
537 | .max_speed_hz = 50000, | 537 | .max_speed_hz = 50000, |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 29034778bfda..39e265cfc86d 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/gpio-pxa.h> | ||
18 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
19 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
20 | #include <linux/apm-emulation.h> | 21 | #include <linux/apm-emulation.h> |
@@ -40,7 +41,9 @@ static struct gpio charger_gpios[] = { | |||
40 | { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, | 41 | { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, |
41 | { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, | 42 | { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, |
42 | { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, | 43 | { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, |
44 | { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" }, | ||
43 | { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, | 45 | { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, |
46 | { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" }, | ||
44 | }; | 47 | }; |
45 | 48 | ||
46 | static void corgi_charger_init(void) | 49 | static void corgi_charger_init(void) |
@@ -90,7 +93,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm) | |||
90 | { | 93 | { |
91 | int is_resume = 0; | 94 | int is_resume = 0; |
92 | 95 | ||
93 | dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR); | 96 | dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, " |
97 | "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n", | ||
98 | PEDR, gpio_get_value(CORGI_GPIO_AC_IN), | ||
99 | gpio_get_value(CORGI_GPIO_CHRG_FULL), | ||
100 | gpio_get_value(CORGI_GPIO_KEY_INT), | ||
101 | gpio_get_value(CORGI_GPIO_WAKEUP)); | ||
94 | 102 | ||
95 | if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { | 103 | if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { |
96 | if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { | 104 | if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { |
@@ -124,14 +132,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm) | |||
124 | 132 | ||
125 | static unsigned long corgi_charger_wakeup(void) | 133 | static unsigned long corgi_charger_wakeup(void) |
126 | { | 134 | { |
127 | return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) ); | 135 | unsigned long ret; |
136 | |||
137 | ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN)) | ||
138 | | (!gpio_get_value(CORGI_GPIO_KEY_INT) | ||
139 | << GPIO_bit(CORGI_GPIO_KEY_INT)) | ||
140 | | (!gpio_get_value(CORGI_GPIO_WAKEUP) | ||
141 | << GPIO_bit(CORGI_GPIO_WAKEUP)); | ||
142 | return ret; | ||
128 | } | 143 | } |
129 | 144 | ||
130 | unsigned long corgipm_read_devdata(int type) | 145 | unsigned long corgipm_read_devdata(int type) |
131 | { | 146 | { |
132 | switch(type) { | 147 | switch(type) { |
133 | case SHARPSL_STATUS_ACIN: | 148 | case SHARPSL_STATUS_ACIN: |
134 | return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); | 149 | return !gpio_get_value(CORGI_GPIO_AC_IN); |
135 | case SHARPSL_STATUS_LOCK: | 150 | case SHARPSL_STATUS_LOCK: |
136 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); | 151 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); |
137 | case SHARPSL_STATUS_CHRGFULL: | 152 | case SHARPSL_STATUS_CHRGFULL: |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 2e0425404de5..18fd177073f4 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -415,9 +415,29 @@ static struct resource pxa_rtc_resources[] = { | |||
415 | }, | 415 | }, |
416 | }; | 416 | }; |
417 | 417 | ||
418 | static struct resource sa1100_rtc_resources[] = { | ||
419 | [0] = { | ||
420 | .start = 0x40900000, | ||
421 | .end = 0x409000ff, | ||
422 | .flags = IORESOURCE_MEM, | ||
423 | }, | ||
424 | [1] = { | ||
425 | .start = IRQ_RTC1Hz, | ||
426 | .end = IRQ_RTC1Hz, | ||
427 | .flags = IORESOURCE_IRQ, | ||
428 | }, | ||
429 | [2] = { | ||
430 | .start = IRQ_RTCAlrm, | ||
431 | .end = IRQ_RTCAlrm, | ||
432 | .flags = IORESOURCE_IRQ, | ||
433 | }, | ||
434 | }; | ||
435 | |||
418 | struct platform_device sa1100_device_rtc = { | 436 | struct platform_device sa1100_device_rtc = { |
419 | .name = "sa1100-rtc", | 437 | .name = "sa1100-rtc", |
420 | .id = -1, | 438 | .id = -1, |
439 | .num_resources = ARRAY_SIZE(sa1100_rtc_resources), | ||
440 | .resource = sa1100_rtc_resources, | ||
421 | }; | 441 | }; |
422 | 442 | ||
423 | struct platform_device pxa_device_rtc = { | 443 | struct platform_device pxa_device_rtc = { |
@@ -1051,6 +1071,36 @@ struct platform_device pxa3xx_device_ssp4 = { | |||
1051 | }; | 1071 | }; |
1052 | #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ | 1072 | #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ |
1053 | 1073 | ||
1074 | struct resource pxa_resource_gpio[] = { | ||
1075 | { | ||
1076 | .start = 0x40e00000, | ||
1077 | .end = 0x40e0ffff, | ||
1078 | .flags = IORESOURCE_MEM, | ||
1079 | }, { | ||
1080 | .start = IRQ_GPIO0, | ||
1081 | .end = IRQ_GPIO0, | ||
1082 | .name = "gpio0", | ||
1083 | .flags = IORESOURCE_IRQ, | ||
1084 | }, { | ||
1085 | .start = IRQ_GPIO1, | ||
1086 | .end = IRQ_GPIO1, | ||
1087 | .name = "gpio1", | ||
1088 | .flags = IORESOURCE_IRQ, | ||
1089 | }, { | ||
1090 | .start = IRQ_GPIO_2_x, | ||
1091 | .end = IRQ_GPIO_2_x, | ||
1092 | .name = "gpio_mux", | ||
1093 | .flags = IORESOURCE_IRQ, | ||
1094 | }, | ||
1095 | }; | ||
1096 | |||
1097 | struct platform_device pxa_device_gpio = { | ||
1098 | .name = "pxa-gpio", | ||
1099 | .id = -1, | ||
1100 | .num_resources = ARRAY_SIZE(pxa_resource_gpio), | ||
1101 | .resource = pxa_resource_gpio, | ||
1102 | }; | ||
1103 | |||
1054 | /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. | 1104 | /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. |
1055 | * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ | 1105 | * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ |
1056 | void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) | 1106 | void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) |
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 2fd5a8b35757..1475db107254 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp; | |||
16 | extern struct platform_device sa1100_device_rtc; | 16 | extern struct platform_device sa1100_device_rtc; |
17 | extern struct platform_device pxa_device_rtc; | 17 | extern struct platform_device pxa_device_rtc; |
18 | extern struct platform_device pxa_device_ac97; | 18 | extern struct platform_device pxa_device_ac97; |
19 | extern struct platform_device pxa_device_gpio; | ||
19 | 20 | ||
20 | extern struct platform_device pxa27x_device_i2c_power; | 21 | extern struct platform_device pxa27x_device_i2c_power; |
21 | extern struct platform_device pxa27x_device_ohci; | 22 | extern struct platform_device pxa27x_device_ohci; |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index bd396ba67af7..d80c0ba9a095 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
@@ -70,7 +70,7 @@ | |||
70 | /* common GPIOs */ | 70 | /* common GPIOs */ |
71 | #define GPIO11_NAND_CS (11) | 71 | #define GPIO11_NAND_CS (11) |
72 | #define GPIO41_ETHIRQ (41) | 72 | #define GPIO41_ETHIRQ (41) |
73 | #define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) | 73 | #define EM_X270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ) |
74 | #define GPIO115_WLAN_PWEN (115) | 74 | #define GPIO115_WLAN_PWEN (115) |
75 | #define GPIO19_WLAN_STRAP (19) | 75 | #define GPIO19_WLAN_STRAP (19) |
76 | #define GPIO9_USB_VBUS_EN (9) | 76 | #define GPIO9_USB_VBUS_EN (9) |
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = { | |||
805 | .modalias = "libertas_spi", | 805 | .modalias = "libertas_spi", |
806 | .max_speed_hz = 13000000, | 806 | .max_speed_hz = 13000000, |
807 | .bus_num = 2, | 807 | .bus_num = 2, |
808 | .irq = IRQ_GPIO(116), | 808 | .irq = PXA_GPIO_TO_IRQ(116), |
809 | .chip_select = 0, | 809 | .chip_select = 0, |
810 | .controller_data = &em_x270_libertas_chip, | 810 | .controller_data = &em_x270_libertas_chip, |
811 | .platform_data = &em_x270_libertas_pdata, | 811 | .platform_data = &em_x270_libertas_pdata, |
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = { | |||
1203 | 1203 | ||
1204 | static struct i2c_board_info em_x270_i2c_pmic_info = { | 1204 | static struct i2c_board_info em_x270_i2c_pmic_info = { |
1205 | I2C_BOARD_INFO("da9030", 0x49), | 1205 | I2C_BOARD_INFO("da9030", 0x49), |
1206 | .irq = IRQ_GPIO(0), | 1206 | .irq = PXA_GPIO_TO_IRQ(0), |
1207 | .platform_data = &em_x270_da9030_info, | 1207 | .platform_data = &em_x270_da9030_info, |
1208 | }; | 1208 | }; |
1209 | 1209 | ||
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 69473db97758..f79a610c62fc 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = { | |||
119 | .flags = IORESOURCE_MEM, | 119 | .flags = IORESOURCE_MEM, |
120 | }, | 120 | }, |
121 | [1] = { | 121 | [1] = { |
122 | .start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), | 122 | .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), |
123 | .end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), | 123 | .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ), |
124 | .flags = IORESOURCE_IRQ, | 124 | .flags = IORESOURCE_IRQ, |
125 | }, | 125 | }, |
126 | }; | 126 | }; |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index ce16bdae96de..fb9b62dcf4ca 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = { | |||
252 | .flags = IORESOURCE_MEM, | 252 | .flags = IORESOURCE_MEM, |
253 | }, | 253 | }, |
254 | [1] = { | 254 | [1] = { |
255 | .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), | 255 | .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), |
256 | .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), | 256 | .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), |
257 | .flags = IORESOURCE_IRQ, | 257 | .flags = IORESOURCE_IRQ, |
258 | }, | 258 | }, |
259 | /* SD part */ | 259 | /* SD part */ |
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = { | |||
263 | .flags = IORESOURCE_MEM, | 263 | .flags = IORESOURCE_MEM, |
264 | }, | 264 | }, |
265 | [3] = { | 265 | [3] = { |
266 | .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), | 266 | .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), |
267 | .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), | 267 | .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), |
268 | .flags = IORESOURCE_IRQ, | 268 | .flags = IORESOURCE_IRQ, |
269 | }, | 269 | }, |
270 | }; | 270 | }; |
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = { | |||
587 | .modalias = "ads7846", | 587 | .modalias = "ads7846", |
588 | .bus_num = 2, | 588 | .bus_num = 2, |
589 | .max_speed_hz = 2600000, /* 100 kHz sample rate */ | 589 | .max_speed_hz = 2600000, /* 100 kHz sample rate */ |
590 | .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ), | 590 | .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ), |
591 | .platform_data = &tsc2046_info, | 591 | .platform_data = &tsc2046_info, |
592 | .controller_data = &tsc2046_chip, | 592 | .controller_data = &tsc2046_chip, |
593 | }, | 593 | }, |
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = { | |||
635 | .name = "ac", | 635 | .name = "ac", |
636 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | 636 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
637 | IORESOURCE_IRQ_LOWEDGE, | 637 | IORESOURCE_IRQ_LOWEDGE, |
638 | .start = gpio_to_irq(GPIOD9_nAC_IN), | 638 | .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), |
639 | .end = gpio_to_irq(GPIOD9_nAC_IN), | 639 | .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), |
640 | }, | 640 | }, |
641 | [1] = { | 641 | [1] = { |
642 | .name = "usb", | 642 | .name = "usb", |
643 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | 643 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
644 | IORESOURCE_IRQ_LOWEDGE, | 644 | IORESOURCE_IRQ_LOWEDGE, |
645 | .start = gpio_to_irq(GPIOD14_nUSBC_DETECT), | 645 | .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), |
646 | .end = gpio_to_irq(GPIOD14_nUSBC_DETECT), | 646 | .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), |
647 | }, | 647 | }, |
648 | }; | 648 | }; |
649 | 649 | ||
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index e239b82c99d7..67400192ed3b 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c | |||
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = { | |||
86 | .chip_select = 0, | 86 | .chip_select = 0, |
87 | .platform_data = &mcp251x_info, | 87 | .platform_data = &mcp251x_info, |
88 | .controller_data = &mcp251x_chip_info1, | 88 | .controller_data = &mcp251x_chip_info1, |
89 | .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1) | 89 | .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1) |
90 | }, | 90 | }, |
91 | { | 91 | { |
92 | .modalias = "mcp2515", | 92 | .modalias = "mcp2515", |
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = { | |||
95 | .chip_select = 1, | 95 | .chip_select = 1, |
96 | .platform_data = &mcp251x_info, | 96 | .platform_data = &mcp251x_info, |
97 | .controller_data = &mcp251x_chip_info2, | 97 | .controller_data = &mcp251x_chip_info2, |
98 | .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2) | 98 | .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2) |
99 | }, | 99 | }, |
100 | { | 100 | { |
101 | .modalias = "mcp2515", | 101 | .modalias = "mcp2515", |
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = { | |||
104 | .chip_select = 0, | 104 | .chip_select = 0, |
105 | .platform_data = &mcp251x_info, | 105 | .platform_data = &mcp251x_info, |
106 | .controller_data = &mcp251x_chip_info3, | 106 | .controller_data = &mcp251x_chip_info3, |
107 | .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3) | 107 | .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3) |
108 | }, | 108 | }, |
109 | { | 109 | { |
110 | .modalias = "mcp2515", | 110 | .modalias = "mcp2515", |
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = { | |||
113 | .chip_select = 1, | 113 | .chip_select = 1, |
114 | .platform_data = &mcp251x_info, | 114 | .platform_data = &mcp251x_info, |
115 | .controller_data = &mcp251x_chip_info4, | 115 | .controller_data = &mcp251x_chip_info4, |
116 | .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4) | 116 | .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4) |
117 | } | 117 | } |
118 | }; | 118 | }; |
119 | 119 | ||
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index fbabd84e110c..8af1840e12cc 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = { | |||
75 | .flags = IORESOURCE_MEM, | 75 | .flags = IORESOURCE_MEM, |
76 | }, | 76 | }, |
77 | [1] = { | 77 | [1] = { |
78 | .start = IRQ_GPIO(4), | 78 | .start = PXA_GPIO_TO_IRQ(4), |
79 | .end = IRQ_GPIO(4), | 79 | .end = PXA_GPIO_TO_IRQ(4), |
80 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 80 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
81 | } | 81 | } |
82 | }; | 82 | }; |
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index 6d7eab3d0867..f02fa1e6ba86 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h | |||
@@ -172,9 +172,9 @@ enum balloon3_features { | |||
172 | /* Balloon3 Interrupts */ | 172 | /* Balloon3 Interrupts */ |
173 | #define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) | 173 | #define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) |
174 | 174 | ||
175 | #define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) | 175 | #define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) |
176 | #define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) | 176 | #define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) |
177 | #define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) | 177 | #define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD) |
178 | 178 | ||
179 | #define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) | 179 | #define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) |
180 | 180 | ||
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h index 5dfd1195a5a7..f3c3493b468d 100644 --- a/arch/arm/mach-pxa/include/mach/corgi.h +++ b/arch/arm/mach-pxa/include/mach/corgi.h | |||
@@ -66,18 +66,18 @@ | |||
66 | /* | 66 | /* |
67 | * Corgi Interrupts | 67 | * Corgi Interrupts |
68 | */ | 68 | */ |
69 | #define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) | 69 | #define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0) |
70 | #define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) | 70 | #define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) |
71 | #define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) | 71 | #define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3) |
72 | #define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) | 72 | #define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4) |
73 | #define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) | 73 | #define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) |
74 | #define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) | 74 | #define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) |
75 | #define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) | 75 | #define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10) |
76 | #define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) | 76 | #define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11) |
77 | #define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) | 77 | #define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) |
78 | #define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ | 78 | #define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */ |
79 | #define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) | 79 | #define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) |
80 | #define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ | 80 | #define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */ |
81 | 81 | ||
82 | 82 | ||
83 | /* | 83 | /* |
@@ -98,7 +98,7 @@ | |||
98 | CORGI_SCP_MIC_BIAS ) | 98 | CORGI_SCP_MIC_BIAS ) |
99 | #define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) | 99 | #define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) |
100 | 100 | ||
101 | #define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) | 101 | #define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) |
102 | #define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) | 102 | #define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) |
103 | #define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ | 103 | #define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ |
104 | #define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ | 104 | #define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ |
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h index 747ab1a71f2f..2628e7b72116 100644 --- a/arch/arm/mach-pxa/include/mach/csb726.h +++ b/arch/arm/mach-pxa/include/mach/csb726.h | |||
@@ -19,8 +19,8 @@ | |||
19 | #define CSB726_FLASH_SIZE (64 * 1024 * 1024) | 19 | #define CSB726_FLASH_SIZE (64 * 1024 * 1024) |
20 | #define CSB726_FLASH_uMON (8 * 1024 * 1024) | 20 | #define CSB726_FLASH_uMON (8 * 1024 * 1024) |
21 | 21 | ||
22 | #define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) | 22 | #define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN) |
23 | #define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) | 23 | #define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501) |
24 | 24 | ||
25 | #endif | 25 | #endif |
26 | 26 | ||
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h deleted file mode 100644 index 41b4c93a96c2..000000000000 --- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h +++ /dev/null | |||
@@ -1,133 +0,0 @@ | |||
1 | /* | ||
2 | * Written by Philipp Zabel <philipp.zabel@gmail.com> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | * | ||
18 | */ | ||
19 | #ifndef __MACH_PXA_GPIO_PXA_H | ||
20 | #define __MACH_PXA_GPIO_PXA_H | ||
21 | |||
22 | #include <mach/irqs.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #define GPIO_REGS_VIRT io_p2v(0x40E00000) | ||
26 | |||
27 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | ||
28 | #define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) | ||
29 | |||
30 | /* GPIO Pin Level Registers */ | ||
31 | #define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) | ||
32 | #define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00) | ||
33 | #define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00) | ||
34 | #define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00) | ||
35 | |||
36 | /* GPIO Pin Direction Registers */ | ||
37 | #define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c) | ||
38 | #define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c) | ||
39 | #define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c) | ||
40 | #define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c) | ||
41 | |||
42 | /* GPIO Pin Output Set Registers */ | ||
43 | #define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18) | ||
44 | #define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18) | ||
45 | #define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18) | ||
46 | #define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18) | ||
47 | |||
48 | /* GPIO Pin Output Clear Registers */ | ||
49 | #define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24) | ||
50 | #define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24) | ||
51 | #define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24) | ||
52 | #define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24) | ||
53 | |||
54 | /* GPIO Rising Edge Detect Registers */ | ||
55 | #define GRER0 GPIO_REG(BANK_OFF(0) + 0x30) | ||
56 | #define GRER1 GPIO_REG(BANK_OFF(1) + 0x30) | ||
57 | #define GRER2 GPIO_REG(BANK_OFF(2) + 0x30) | ||
58 | #define GRER3 GPIO_REG(BANK_OFF(3) + 0x30) | ||
59 | |||
60 | /* GPIO Falling Edge Detect Registers */ | ||
61 | #define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c) | ||
62 | #define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c) | ||
63 | #define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c) | ||
64 | #define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c) | ||
65 | |||
66 | /* GPIO Edge Detect Status Registers */ | ||
67 | #define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48) | ||
68 | #define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48) | ||
69 | #define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48) | ||
70 | #define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48) | ||
71 | |||
72 | /* GPIO Alternate Function Select Registers */ | ||
73 | #define GAFR0_L GPIO_REG(0x0054) | ||
74 | #define GAFR0_U GPIO_REG(0x0058) | ||
75 | #define GAFR1_L GPIO_REG(0x005C) | ||
76 | #define GAFR1_U GPIO_REG(0x0060) | ||
77 | #define GAFR2_L GPIO_REG(0x0064) | ||
78 | #define GAFR2_U GPIO_REG(0x0068) | ||
79 | #define GAFR3_L GPIO_REG(0x006C) | ||
80 | #define GAFR3_U GPIO_REG(0x0070) | ||
81 | |||
82 | /* More handy macros. The argument is a literal GPIO number. */ | ||
83 | |||
84 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) | ||
85 | |||
86 | #define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) | ||
87 | #define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) | ||
88 | #define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) | ||
89 | #define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) | ||
90 | #define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30) | ||
91 | #define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c) | ||
92 | #define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48) | ||
93 | #define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) | ||
94 | |||
95 | |||
96 | #define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM | ||
97 | |||
98 | #define gpio_to_bank(gpio) ((gpio) >> 5) | ||
99 | |||
100 | #ifdef CONFIG_CPU_PXA26x | ||
101 | /* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, | ||
102 | * as well as their Alternate Function value being '1' for GPIO in GAFRx. | ||
103 | */ | ||
104 | static inline int __gpio_is_inverted(unsigned gpio) | ||
105 | { | ||
106 | return cpu_is_pxa25x() && gpio > 85; | ||
107 | } | ||
108 | #else | ||
109 | static inline int __gpio_is_inverted(unsigned gpio) { return 0; } | ||
110 | #endif | ||
111 | |||
112 | /* | ||
113 | * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate | ||
114 | * function of a GPIO, and GPDRx cannot be altered once configured. It | ||
115 | * is attributed as "occupied" here (I know this terminology isn't | ||
116 | * accurate, you are welcome to propose a better one :-) | ||
117 | */ | ||
118 | static inline int __gpio_is_occupied(unsigned gpio) | ||
119 | { | ||
120 | if (cpu_is_pxa27x() || cpu_is_pxa25x()) { | ||
121 | int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3; | ||
122 | int dir = GPDR(gpio) & GPIO_bit(gpio); | ||
123 | |||
124 | if (__gpio_is_inverted(gpio)) | ||
125 | return af != 1 || dir == 0; | ||
126 | else | ||
127 | return af != 0 || dir != 0; | ||
128 | } else | ||
129 | return GPDR(gpio) & GPIO_bit(gpio); | ||
130 | } | ||
131 | |||
132 | #include <plat/gpio-pxa.h> | ||
133 | #endif /* __MACH_PXA_GPIO_PXA_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h index 004cade7bb13..0248e433bc98 100644 --- a/arch/arm/mach-pxa/include/mach/gpio.h +++ b/arch/arm/mach-pxa/include/mach/gpio.h | |||
@@ -25,24 +25,8 @@ | |||
25 | #define __ASM_ARCH_PXA_GPIO_H | 25 | #define __ASM_ARCH_PXA_GPIO_H |
26 | 26 | ||
27 | #include <asm-generic/gpio.h> | 27 | #include <asm-generic/gpio.h> |
28 | /* The defines for the driver are needed for the accelerated accessors */ | ||
29 | #include "gpio-pxa.h" | ||
30 | 28 | ||
31 | #define gpio_to_irq(gpio) IRQ_GPIO(gpio) | 29 | #include <mach/irqs.h> |
30 | #include <mach/hardware.h> | ||
32 | 31 | ||
33 | static inline int irq_to_gpio(unsigned int irq) | ||
34 | { | ||
35 | int gpio; | ||
36 | |||
37 | if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1) | ||
38 | return irq - IRQ_GPIO0; | ||
39 | |||
40 | gpio = irq - PXA_GPIO_IRQ_BASE; | ||
41 | if (gpio >= 2 && gpio < NR_BUILTIN_GPIO) | ||
42 | return gpio; | ||
43 | |||
44 | return -1; | ||
45 | } | ||
46 | |||
47 | #include <plat/gpio.h> | ||
48 | #endif | 32 | #endif |
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h index 9b898680b206..dba14b6503ad 100644 --- a/arch/arm/mach-pxa/include/mach/gumstix.h +++ b/arch/arm/mach-pxa/include/mach/gumstix.h | |||
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */ | |||
24 | #define GPIO_GUMSTIX_USB_GPIOx 41 | 24 | #define GPIO_GUMSTIX_USB_GPIOx 41 |
25 | 25 | ||
26 | /* usb state change */ | 26 | /* usb state change */ |
27 | #define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) | 27 | #define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn) |
28 | 28 | ||
29 | #define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) | 29 | #define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) |
30 | #define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) | 30 | #define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) |
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */ | |||
35 | */ | 35 | */ |
36 | #define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ | 36 | #define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ |
37 | #define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ | 37 | #define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ |
38 | #define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) | 38 | #define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT) |
39 | 39 | ||
40 | /* | 40 | /* |
41 | * SMC Ethernet definitions | 41 | * SMC Ethernet definitions |
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */ | |||
49 | 49 | ||
50 | #define GPIO_GUMSTIX_ETH0 36 | 50 | #define GPIO_GUMSTIX_ETH0 36 |
51 | #define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) | 51 | #define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) |
52 | #define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) | 52 | #define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0) |
53 | #define GPIO_GUMSTIX_ETH1 27 | 53 | #define GPIO_GUMSTIX_ETH1 27 |
54 | #define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) | 54 | #define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) |
55 | #define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) | 55 | #define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1) |
56 | 56 | ||
57 | 57 | ||
58 | /* CF reset line */ | 58 | /* CF reset line */ |
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */ | |||
63 | #define GPIO4_nSTSCHG GPIO4_nBVD1 | 63 | #define GPIO4_nSTSCHG GPIO4_nBVD1 |
64 | #define GPIO11_nCD 11 | 64 | #define GPIO11_nCD 11 |
65 | #define GPIO26_PRDY_nBSY 26 | 65 | #define GPIO26_PRDY_nBSY 26 |
66 | #define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) | 66 | #define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG) |
67 | #define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) | 67 | #define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD) |
68 | #define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) | 68 | #define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY) |
69 | 69 | ||
70 | /* CF slot 1 */ | 70 | /* CF slot 1 */ |
71 | #define GPIO18_nBVD1 18 | 71 | #define GPIO18_nBVD1 18 |
72 | #define GPIO18_nSTSCHG GPIO18_nBVD1 | 72 | #define GPIO18_nSTSCHG GPIO18_nBVD1 |
73 | #define GPIO36_nCD 36 | 73 | #define GPIO36_nCD 36 |
74 | #define GPIO27_PRDY_nBSY 27 | 74 | #define GPIO27_PRDY_nBSY 27 |
75 | #define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) | 75 | #define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG) |
76 | #define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) | 76 | #define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD) |
77 | #define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) | 77 | #define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY) |
78 | 78 | ||
79 | /* CF GPIO line modes */ | 79 | /* CF GPIO line modes */ |
80 | #define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) | 80 | #define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) |
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h index 37408449ec25..8bc02913517c 100644 --- a/arch/arm/mach-pxa/include/mach/hx4700.h +++ b/arch/arm/mach-pxa/include/mach/hx4700.h | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/mfd/asic3.h> | 16 | #include <linux/mfd/asic3.h> |
17 | 17 | ||
18 | #define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO | 18 | #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO |
19 | #define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) | 19 | #define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) |
20 | #define HX4700_NR_IRQS (IRQ_BOARD_START + 70) | 20 | #define HX4700_NR_IRQS (IRQ_BOARD_START + 70) |
21 | 21 | ||
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h index 5eff96fcc944..22a96f87232b 100644 --- a/arch/arm/mach-pxa/include/mach/idp.h +++ b/arch/arm/mach-pxa/include/mach/idp.h | |||
@@ -131,28 +131,26 @@ | |||
131 | #define PCC_VS2 (1 << 1) | 131 | #define PCC_VS2 (1 << 1) |
132 | #define PCC_VS1 (1 << 0) | 132 | #define PCC_VS1 (1 << 0) |
133 | 133 | ||
134 | #define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x))) | ||
135 | |||
136 | /* A listing of interrupts used by external hardware devices */ | 134 | /* A listing of interrupts used by external hardware devices */ |
137 | 135 | ||
138 | #define TOUCH_PANEL_IRQ IRQ_GPIO(5) | 136 | #define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5) |
139 | #define IDE_IRQ IRQ_GPIO(21) | 137 | #define IDE_IRQ PXA_GPIO_TO_IRQ(21) |
140 | 138 | ||
141 | #define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING | 139 | #define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
142 | 140 | ||
143 | #define ETHERNET_IRQ IRQ_GPIO(4) | 141 | #define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4) |
144 | #define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 142 | #define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
145 | 143 | ||
146 | #define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 144 | #define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
147 | 145 | ||
148 | #define PCMCIA_S0_CD_VALID IRQ_GPIO(7) | 146 | #define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7) |
149 | #define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH | 147 | #define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH |
150 | 148 | ||
151 | #define PCMCIA_S1_CD_VALID IRQ_GPIO(8) | 149 | #define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8) |
152 | #define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH | 150 | #define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH |
153 | 151 | ||
154 | #define PCMCIA_S0_RDYINT IRQ_GPIO(19) | 152 | #define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19) |
155 | #define PCMCIA_S1_RDYINT IRQ_GPIO(22) | 153 | #define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22) |
156 | 154 | ||
157 | 155 | ||
158 | /* | 156 | /* |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 7cc5a781e99e..32975adf3ca4 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -88,10 +88,8 @@ | |||
88 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ | 88 | #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ |
89 | 89 | ||
90 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) | 90 | #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) |
91 | #define PXA_GPIO_IRQ_NUM (192) | 91 | #define PXA_NR_BUILTIN_GPIO (192) |
92 | 92 | #define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | |
93 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | ||
94 | #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) | ||
95 | 93 | ||
96 | /* | 94 | /* |
97 | * The following interrupts are for board specific purposes. Since | 95 | * The following interrupts are for board specific purposes. Since |
@@ -100,7 +98,7 @@ | |||
100 | * By default, no board IRQ is reserved. It should be finished in | 98 | * By default, no board IRQ is reserved. It should be finished in |
101 | * custom board since sparse IRQ is already enabled. | 99 | * custom board since sparse IRQ is already enabled. |
102 | */ | 100 | */ |
103 | #define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) | 101 | #define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO) |
104 | 102 | ||
105 | #define NR_IRQS (IRQ_BOARD_START) | 103 | #define NR_IRQS (IRQ_BOARD_START) |
106 | 104 | ||
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h index b6238cbd8aea..8066be54e9f5 100644 --- a/arch/arm/mach-pxa/include/mach/littleton.h +++ b/arch/arm/mach-pxa/include/mach/littleton.h | |||
@@ -1,13 +1,11 @@ | |||
1 | #ifndef __ASM_ARCH_LITTLETON_H | 1 | #ifndef __ASM_ARCH_LITTLETON_H |
2 | #define __ASM_ARCH_LITTLETON_H | 2 | #define __ASM_ARCH_LITTLETON_H |
3 | 3 | ||
4 | #include <mach/gpio-pxa.h> | ||
5 | |||
6 | #define LITTLETON_ETH_PHYS 0x30000000 | 4 | #define LITTLETON_ETH_PHYS 0x30000000 |
7 | 5 | ||
8 | #define LITTLETON_GPIO_LCD_CS (17) | 6 | #define LITTLETON_GPIO_LCD_CS (17) |
9 | 7 | ||
10 | #define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) | 8 | #define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO) |
11 | #define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) | 9 | #define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) |
12 | 10 | ||
13 | #define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) | 11 | #define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) |
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h index 7cbfc5d3f9df..ba6a6e1d29e9 100644 --- a/arch/arm/mach-pxa/include/mach/magician.h +++ b/arch/arm/mach-pxa/include/mach/magician.h | |||
@@ -78,7 +78,7 @@ | |||
78 | * CPLD EGPIOs | 78 | * CPLD EGPIOs |
79 | */ | 79 | */ |
80 | 80 | ||
81 | #define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO | 81 | #define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO |
82 | #define MAGICIAN_EGPIO(reg,bit) \ | 82 | #define MAGICIAN_EGPIO(reg,bit) \ |
83 | (MAGICIAN_EGPIO_BASE + 8*reg + bit) | 83 | (MAGICIAN_EGPIO_BASE + 8*reg + bit) |
84 | 84 | ||
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h index ae536e86d8e8..2c4471336570 100644 --- a/arch/arm/mach-pxa/include/mach/palmld.h +++ b/arch/arm/mach-pxa/include/mach/palmld.h | |||
@@ -68,10 +68,10 @@ | |||
68 | /* 20, 53 and 86 are usb related too */ | 68 | /* 20, 53 and 86 are usb related too */ |
69 | 69 | ||
70 | /* INTERRUPTS */ | 70 | /* INTERRUPTS */ |
71 | #define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) | 71 | #define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET) |
72 | #define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) | 72 | #define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N) |
73 | #define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) | 73 | #define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ) |
74 | #define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) | 74 | #define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ) |
75 | 75 | ||
76 | 76 | ||
77 | /** HERE ARE INIT VALUES **/ | 77 | /** HERE ARE INIT VALUES **/ |
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h index 6baf7469d4ec..0bd4f036c72f 100644 --- a/arch/arm/mach-pxa/include/mach/palmt5.h +++ b/arch/arm/mach-pxa/include/mach/palmt5.h | |||
@@ -48,10 +48,10 @@ | |||
48 | #define GPIO_NR_PALMT5_BT_RESET 83 | 48 | #define GPIO_NR_PALMT5_BT_RESET 83 |
49 | 49 | ||
50 | /* INTERRUPTS */ | 50 | /* INTERRUPTS */ |
51 | #define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) | 51 | #define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N) |
52 | #define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) | 52 | #define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ) |
53 | #define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) | 53 | #define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT) |
54 | #define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) | 54 | #define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET) |
55 | 55 | ||
56 | /** HERE ARE INIT VALUES **/ | 56 | /** HERE ARE INIT VALUES **/ |
57 | 57 | ||
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h index 3f9dd3fd4638..c383a21680b6 100644 --- a/arch/arm/mach-pxa/include/mach/palmtc.h +++ b/arch/arm/mach-pxa/include/mach/palmtc.h | |||
@@ -52,8 +52,8 @@ | |||
52 | #define GPIO_NR_PALMTC_IR_DISABLE 45 | 52 | #define GPIO_NR_PALMTC_IR_DISABLE 45 |
53 | 53 | ||
54 | /* IRQs */ | 54 | /* IRQs */ |
55 | #define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) | 55 | #define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) |
56 | #define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) | 56 | #define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) |
57 | 57 | ||
58 | /* UCB1400 GPIOs */ | 58 | /* UCB1400 GPIOs */ |
59 | #define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) | 59 | #define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) |
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h index 7074a6ed46c6..f2e530380253 100644 --- a/arch/arm/mach-pxa/include/mach/palmtx.h +++ b/arch/arm/mach-pxa/include/mach/palmtx.h | |||
@@ -62,10 +62,10 @@ | |||
62 | #define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 | 62 | #define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 |
63 | 63 | ||
64 | /* INTERRUPTS */ | 64 | /* INTERRUPTS */ |
65 | #define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) | 65 | #define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) |
66 | #define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) | 66 | #define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) |
67 | #define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) | 67 | #define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) |
68 | #define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) | 68 | #define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) |
69 | 69 | ||
70 | /** HERE ARE INIT VALUES **/ | 70 | /** HERE ARE INIT VALUES **/ |
71 | 71 | ||
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h index 4bac588478a8..6bf28de228bd 100644 --- a/arch/arm/mach-pxa/include/mach/pcm027.h +++ b/arch/arm/mach-pxa/include/mach/pcm027.h | |||
@@ -34,7 +34,7 @@ | |||
34 | 34 | ||
35 | /* I2C RTC */ | 35 | /* I2C RTC */ |
36 | #define PCM027_RTC_IRQ_GPIO 0 | 36 | #define PCM027_RTC_IRQ_GPIO 0 |
37 | #define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) | 37 | #define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO) |
38 | #define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING | 38 | #define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
39 | #define ADR_PCM027_RTC 0x51 /* I2C address */ | 39 | #define ADR_PCM027_RTC 0x51 /* I2C address */ |
40 | 40 | ||
@@ -43,21 +43,21 @@ | |||
43 | 43 | ||
44 | /* Ethernet chip (SMSC91C111) */ | 44 | /* Ethernet chip (SMSC91C111) */ |
45 | #define PCM027_ETH_IRQ_GPIO 52 | 45 | #define PCM027_ETH_IRQ_GPIO 52 |
46 | #define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) | 46 | #define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO) |
47 | #define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 47 | #define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
48 | #define PCM027_ETH_PHYS PXA_CS5_PHYS | 48 | #define PCM027_ETH_PHYS PXA_CS5_PHYS |
49 | #define PCM027_ETH_SIZE (1*1024*1024) | 49 | #define PCM027_ETH_SIZE (1*1024*1024) |
50 | 50 | ||
51 | /* CAN controller SJA1000 (unsupported yet) */ | 51 | /* CAN controller SJA1000 (unsupported yet) */ |
52 | #define PCM027_CAN_IRQ_GPIO 114 | 52 | #define PCM027_CAN_IRQ_GPIO 114 |
53 | #define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) | 53 | #define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO) |
54 | #define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING | 54 | #define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
55 | #define PCM027_CAN_PHYS 0x22000000 | 55 | #define PCM027_CAN_PHYS 0x22000000 |
56 | #define PCM027_CAN_SIZE 0x100 | 56 | #define PCM027_CAN_SIZE 0x100 |
57 | 57 | ||
58 | /* SPI GPIO expander (unsupported yet) */ | 58 | /* SPI GPIO expander (unsupported yet) */ |
59 | #define PCM027_EGPIO_IRQ_GPIO 27 | 59 | #define PCM027_EGPIO_IRQ_GPIO 27 |
60 | #define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) | 60 | #define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO) |
61 | #define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING | 61 | #define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
62 | #define PCM027_EGPIO_CS 24 | 62 | #define PCM027_EGPIO_CS 24 |
63 | /* | 63 | /* |
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h index 8a4383b776d7..d72791695b26 100644 --- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h +++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h | |||
@@ -28,14 +28,14 @@ | |||
28 | 28 | ||
29 | /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ | 29 | /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ |
30 | #define PCM990_CTRL_INT_IRQ_GPIO 9 | 30 | #define PCM990_CTRL_INT_IRQ_GPIO 9 |
31 | #define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) | 31 | #define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO) |
32 | #define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 32 | #define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
33 | #define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ | 33 | #define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ |
34 | #define PCM990_CTRL_BASE 0xea000000 | 34 | #define PCM990_CTRL_BASE 0xea000000 |
35 | #define PCM990_CTRL_SIZE (1*1024*1024) | 35 | #define PCM990_CTRL_SIZE (1*1024*1024) |
36 | 36 | ||
37 | #define PCM990_CTRL_PWR_IRQ_GPIO 14 | 37 | #define PCM990_CTRL_PWR_IRQ_GPIO 14 |
38 | #define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) | 38 | #define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO) |
39 | #define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 39 | #define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
40 | 40 | ||
41 | /* visible CPLD (U7) registers */ | 41 | /* visible CPLD (U7) registers */ |
@@ -132,7 +132,7 @@ | |||
132 | * IDE | 132 | * IDE |
133 | */ | 133 | */ |
134 | #define PCM990_IDE_IRQ_GPIO 13 | 134 | #define PCM990_IDE_IRQ_GPIO 13 |
135 | #define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) | 135 | #define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO) |
136 | #define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 136 | #define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
137 | #define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ | 137 | #define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ |
138 | #define PCM990_IDE_PLD_BASE 0xee000000 | 138 | #define PCM990_IDE_PLD_BASE 0xee000000 |
@@ -188,11 +188,11 @@ | |||
188 | * Compact Flash | 188 | * Compact Flash |
189 | */ | 189 | */ |
190 | #define PCM990_CF_IRQ_GPIO 11 | 190 | #define PCM990_CF_IRQ_GPIO 11 |
191 | #define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) | 191 | #define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO) |
192 | #define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 192 | #define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
193 | 193 | ||
194 | #define PCM990_CF_CD_GPIO 12 | 194 | #define PCM990_CF_CD_GPIO 12 |
195 | #define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) | 195 | #define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO) |
196 | #define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING | 196 | #define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING |
197 | 197 | ||
198 | #define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ | 198 | #define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ |
@@ -258,14 +258,14 @@ | |||
258 | * Wolfson AC97 Touch | 258 | * Wolfson AC97 Touch |
259 | */ | 259 | */ |
260 | #define PCM990_AC97_IRQ_GPIO 10 | 260 | #define PCM990_AC97_IRQ_GPIO 10 |
261 | #define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) | 261 | #define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO) |
262 | #define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING | 262 | #define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING |
263 | 263 | ||
264 | /* | 264 | /* |
265 | * MMC phyCORE | 265 | * MMC phyCORE |
266 | */ | 266 | */ |
267 | #define PCM990_MMC0_IRQ_GPIO 9 | 267 | #define PCM990_MMC0_IRQ_GPIO 9 |
268 | #define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) | 268 | #define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO) |
269 | #define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING | 269 | #define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING |
270 | 270 | ||
271 | /* | 271 | /* |
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h index 83d1cfd00fc9..f32ff75dcca8 100644 --- a/arch/arm/mach-pxa/include/mach/poodle.h +++ b/arch/arm/mach-pxa/include/mach/poodle.h | |||
@@ -47,18 +47,18 @@ | |||
47 | #define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ | 47 | #define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ |
48 | 48 | ||
49 | /* PXA GPIOs */ | 49 | /* PXA GPIOs */ |
50 | #define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) | 50 | #define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0) |
51 | #define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) | 51 | #define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) |
52 | #define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) | 52 | #define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4) |
53 | #define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) | 53 | #define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16) |
54 | #define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) | 54 | #define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) |
55 | #define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) | 55 | #define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11) |
56 | #define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) | 56 | #define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10) |
57 | #define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) | 57 | #define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) |
58 | #define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) | 58 | #define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) |
59 | #define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) | 59 | #define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8) |
60 | #define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) | 60 | #define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) |
61 | #define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) | 61 | #define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13) |
62 | 62 | ||
63 | /* SCOOP GPIOs */ | 63 | /* SCOOP GPIOs */ |
64 | #define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 | 64 | #define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 |
@@ -71,7 +71,7 @@ | |||
71 | #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) | 71 | #define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) |
72 | #define POODLE_SCOOP_IO_OUT ( 0 ) | 72 | #define POODLE_SCOOP_IO_OUT ( 0 ) |
73 | 73 | ||
74 | #define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) | 74 | #define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) |
75 | #define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) | 75 | #define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) |
76 | #define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) | 76 | #define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) |
77 | #define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) | 77 | #define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) |
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h index 685749a51c42..0bfe6507c95d 100644 --- a/arch/arm/mach-pxa/include/mach/spitz.h +++ b/arch/arm/mach-pxa/include/mach/spitz.h | |||
@@ -108,7 +108,7 @@ | |||
108 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) | 108 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
109 | #define SPITZ_SCP_SUS_SET 0 | 109 | #define SPITZ_SCP_SUS_SET 0 |
110 | 110 | ||
111 | #define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) | 111 | #define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) |
112 | #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) | 112 | #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) |
113 | #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) | 113 | #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) |
114 | #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) | 114 | #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) |
@@ -140,7 +140,7 @@ | |||
140 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) | 140 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
141 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) | 141 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) |
142 | 142 | ||
143 | #define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) | 143 | #define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) |
144 | #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) | 144 | #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) |
145 | #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) | 145 | #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) |
146 | #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) | 146 | #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) |
@@ -152,7 +152,7 @@ | |||
152 | #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) | 152 | #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) |
153 | 153 | ||
154 | /* Akita IO Expander GPIOs */ | 154 | /* Akita IO Expander GPIOs */ |
155 | #define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) | 155 | #define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) |
156 | #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) | 156 | #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) |
157 | #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) | 157 | #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) |
158 | #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) | 158 | #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) |
@@ -164,23 +164,23 @@ | |||
164 | 164 | ||
165 | /* Spitz IRQ Definitions */ | 165 | /* Spitz IRQ Definitions */ |
166 | 166 | ||
167 | #define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) | 167 | #define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT) |
168 | #define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) | 168 | #define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN) |
169 | #define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) | 169 | #define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT) |
170 | #define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) | 170 | #define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN) |
171 | #define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) | 171 | #define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT) |
172 | #define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) | 172 | #define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC) |
173 | #define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) | 173 | #define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY) |
174 | #define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) | 174 | #define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA) |
175 | #define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) | 175 | #define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB) |
176 | #define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) | 176 | #define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER) |
177 | #define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) | 177 | #define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT) |
178 | #define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) | 178 | #define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO) |
179 | #define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) | 179 | #define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ) |
180 | #define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) | 180 | #define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD) |
181 | #define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) | 181 | #define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ) |
182 | #define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) | 182 | #define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT) |
183 | #define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) | 183 | #define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT) |
184 | 184 | ||
185 | /* | 185 | /* |
186 | * Shared data structures | 186 | * Shared data structures |
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h index 1272c4b56ceb..2bb0e862598c 100644 --- a/arch/arm/mach-pxa/include/mach/tosa.h +++ b/arch/arm/mach-pxa/include/mach/tosa.h | |||
@@ -24,7 +24,7 @@ | |||
24 | /* | 24 | /* |
25 | * SCOOP2 internal GPIOs | 25 | * SCOOP2 internal GPIOs |
26 | */ | 26 | */ |
27 | #define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO | 27 | #define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO |
28 | #define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 | 28 | #define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 |
29 | #define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) | 29 | #define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) |
30 | #define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) | 30 | #define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) |
@@ -42,7 +42,7 @@ | |||
42 | /* | 42 | /* |
43 | * SCOOP2 jacket GPIOs | 43 | * SCOOP2 jacket GPIOs |
44 | */ | 44 | */ |
45 | #define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) | 45 | #define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) |
46 | #define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) | 46 | #define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) |
47 | #define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) | 47 | #define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) |
48 | #define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) | 48 | #define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) |
@@ -59,7 +59,7 @@ | |||
59 | /* | 59 | /* |
60 | * TC6393XB GPIOs | 60 | * TC6393XB GPIOs |
61 | */ | 61 | */ |
62 | #define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) | 62 | #define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12) |
63 | 63 | ||
64 | #define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) | 64 | #define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) |
65 | #define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) | 65 | #define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) |
@@ -141,30 +141,30 @@ | |||
141 | /* | 141 | /* |
142 | * Interrupts | 142 | * Interrupts |
143 | */ | 143 | */ |
144 | #define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) | 144 | #define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP) |
145 | #define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) | 145 | #define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN) |
146 | #define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) | 146 | #define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN) |
147 | #define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) | 147 | #define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC) |
148 | #define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) | 148 | #define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN) |
149 | #define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) | 149 | #define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT) |
150 | #define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) | 150 | #define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT) |
151 | #define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) | 151 | #define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT) |
152 | #define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) | 152 | #define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG) |
153 | #define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) | 153 | #define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD) |
154 | #define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) | 154 | #define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG) |
155 | #define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) | 155 | #define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT) |
156 | #define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) | 156 | #define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW) |
157 | #define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) | 157 | #define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN) |
158 | #define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) | 158 | #define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ) |
159 | #define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) | 159 | #define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY) |
160 | #define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) | 160 | #define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE) |
161 | #define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) | 161 | #define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT) |
162 | #define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) | 162 | #define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ) |
163 | #define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) | 163 | #define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED) |
164 | #define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) | 164 | #define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW) |
165 | #define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) | 165 | #define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a)) |
166 | 166 | ||
167 | #define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) | 167 | #define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW) |
168 | 168 | ||
169 | #define TOSA_KEY_SYNC KEY_102ND /* ??? */ | 169 | #define TOSA_KEY_SYNC KEY_102ND /* ??? */ |
170 | 170 | ||
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h index 903e1a2e6641..d2ca01053f69 100644 --- a/arch/arm/mach-pxa/include/mach/trizeps4.h +++ b/arch/arm/mach-pxa/include/mach/trizeps4.h | |||
@@ -43,30 +43,30 @@ | |||
43 | 43 | ||
44 | /* Ethernet Controller Davicom DM9000 */ | 44 | /* Ethernet Controller Davicom DM9000 */ |
45 | #define GPIO_DM9000 101 | 45 | #define GPIO_DM9000 101 |
46 | #define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) | 46 | #define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) |
47 | 47 | ||
48 | /* UCB1400 audio / TS-controller */ | 48 | /* UCB1400 audio / TS-controller */ |
49 | #define GPIO_UCB1400 1 | 49 | #define GPIO_UCB1400 1 |
50 | #define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) | 50 | #define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) |
51 | 51 | ||
52 | /* PCMCIA socket Compact Flash */ | 52 | /* PCMCIA socket Compact Flash */ |
53 | #define GPIO_PCD 11 /* PCMCIA Card Detect */ | 53 | #define GPIO_PCD 11 /* PCMCIA Card Detect */ |
54 | #define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) | 54 | #define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) |
55 | #define GPIO_PRDY 13 /* READY / nINT */ | 55 | #define GPIO_PRDY 13 /* READY / nINT */ |
56 | #define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) | 56 | #define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) |
57 | 57 | ||
58 | /* MMC socket */ | 58 | /* MMC socket */ |
59 | #define GPIO_MMC_DET 12 | 59 | #define GPIO_MMC_DET 12 |
60 | #define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) | 60 | #define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) |
61 | 61 | ||
62 | /* DOC NAND chip */ | 62 | /* DOC NAND chip */ |
63 | #define GPIO_DOC_LOCK 94 | 63 | #define GPIO_DOC_LOCK 94 |
64 | #define GPIO_DOC_IRQ 93 | 64 | #define GPIO_DOC_IRQ 93 |
65 | #define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) | 65 | #define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) |
66 | 66 | ||
67 | /* SPI interface */ | 67 | /* SPI interface */ |
68 | #define GPIO_SPI 53 | 68 | #define GPIO_SPI 53 |
69 | #define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) | 69 | #define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) |
70 | 70 | ||
71 | /* LEDS using tx2 / rx2 */ | 71 | /* LEDS using tx2 / rx2 */ |
72 | #define GPIO_SYS_BUSY_LED 46 | 72 | #define GPIO_SYS_BUSY_LED 46 |
@@ -74,7 +74,7 @@ | |||
74 | 74 | ||
75 | /* Off-module PIC on ConXS board */ | 75 | /* Off-module PIC on ConXS board */ |
76 | #define GPIO_PIC 0 | 76 | #define GPIO_PIC 0 |
77 | #define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) | 77 | #define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) |
78 | 78 | ||
79 | #ifdef CONFIG_MACH_TRIZEPS_CONXS | 79 | #ifdef CONFIG_MACH_TRIZEPS_CONXS |
80 | /* for CONXS base board define these registers */ | 80 | /* for CONXS base board define these registers */ |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 532c5d3a97d2..5dae15ea6718 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -22,7 +22,6 @@ | |||
22 | 22 | ||
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/irqs.h> | 24 | #include <mach/irqs.h> |
25 | #include <mach/gpio-pxa.h> | ||
26 | 25 | ||
27 | #include "generic.h" | 26 | #include "generic.h" |
28 | 27 | ||
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = { | |||
92 | .irq_unmask = pxa_unmask_irq, | 91 | .irq_unmask = pxa_unmask_irq, |
93 | }; | 92 | }; |
94 | 93 | ||
95 | /* | ||
96 | * GPIO IRQs for GPIO 0 and 1 | ||
97 | */ | ||
98 | static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type) | ||
99 | { | ||
100 | int gpio = d->irq - IRQ_GPIO0; | ||
101 | |||
102 | if (__gpio_is_occupied(gpio)) { | ||
103 | pr_err("%s failed: GPIO is configured\n", __func__); | ||
104 | return -EINVAL; | ||
105 | } | ||
106 | |||
107 | if (type & IRQ_TYPE_EDGE_RISING) | ||
108 | GRER0 |= GPIO_bit(gpio); | ||
109 | else | ||
110 | GRER0 &= ~GPIO_bit(gpio); | ||
111 | |||
112 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
113 | GFER0 |= GPIO_bit(gpio); | ||
114 | else | ||
115 | GFER0 &= ~GPIO_bit(gpio); | ||
116 | |||
117 | return 0; | ||
118 | } | ||
119 | |||
120 | static void pxa_ack_low_gpio(struct irq_data *d) | ||
121 | { | ||
122 | GEDR0 = (1 << (d->irq - IRQ_GPIO0)); | ||
123 | } | ||
124 | |||
125 | static struct irq_chip pxa_low_gpio_chip = { | ||
126 | .name = "GPIO-l", | ||
127 | .irq_ack = pxa_ack_low_gpio, | ||
128 | .irq_mask = pxa_mask_irq, | ||
129 | .irq_unmask = pxa_unmask_irq, | ||
130 | .irq_set_type = pxa_set_low_gpio_type, | ||
131 | }; | ||
132 | |||
133 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) | 94 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) |
134 | { | 95 | { |
135 | uint32_t icip, icmr, mask; | 96 | uint32_t icip, icmr, mask; |
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) | |||
160 | } while (1); | 121 | } while (1); |
161 | } | 122 | } |
162 | 123 | ||
163 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | 124 | void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int)) |
164 | { | ||
165 | int irq; | ||
166 | |||
167 | /* clear edge detection on GPIO 0 and 1 */ | ||
168 | GFER0 &= ~0x3; | ||
169 | GRER0 &= ~0x3; | ||
170 | GEDR0 = 0x3; | ||
171 | |||
172 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | ||
173 | irq_set_chip_and_handler(irq, &pxa_low_gpio_chip, | ||
174 | handle_edge_irq); | ||
175 | irq_set_chip_data(irq, irq_base(0)); | ||
176 | set_irq_flags(irq, IRQF_VALID); | ||
177 | } | ||
178 | |||
179 | pxa_low_gpio_chip.irq_set_wake = fn; | ||
180 | } | ||
181 | |||
182 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) | ||
183 | { | 125 | { |
184 | int irq, i, n; | 126 | int irq, i, n; |
185 | 127 | ||
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) | |||
209 | __raw_writel(1, irq_base(0) + ICCR); | 151 | __raw_writel(1, irq_base(0) + ICCR); |
210 | 152 | ||
211 | pxa_internal_irq_chip.irq_set_wake = fn; | 153 | pxa_internal_irq_chip.irq_set_wake = fn; |
212 | pxa_init_low_gpio_irq(fn); | ||
213 | } | 154 | } |
214 | 155 | ||
215 | #ifdef CONFIG_PM | 156 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index c337c7eed514..1fb86edb857c 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = { | |||
124 | .flags = IORESOURCE_MEM, | 124 | .flags = IORESOURCE_MEM, |
125 | }, | 125 | }, |
126 | [1] = { | 126 | [1] = { |
127 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), | 127 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), |
128 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), | 128 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)), |
129 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | 129 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
130 | } | 130 | } |
131 | }; | 131 | }; |
@@ -396,7 +396,7 @@ static struct i2c_board_info littleton_i2c_info[] = { | |||
396 | .type = "da9034", | 396 | .type = "da9034", |
397 | .addr = 0x34, | 397 | .addr = 0x34, |
398 | .platform_data = &littleton_da9034_info, | 398 | .platform_data = &littleton_da9034_info, |
399 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)), | 399 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)), |
400 | }, | 400 | }, |
401 | [1] = { | 401 | [1] = { |
402 | .type = "max7320", | 402 | .type = "max7320", |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 6119c015f393..cee9ce2fc0b5 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void) | |||
152 | handle_level_irq); | 152 | handle_level_irq); |
153 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 153 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
154 | } | 154 | } |
155 | irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); | 155 | irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler); |
156 | irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); | 156 | irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); |
157 | } | 157 | } |
158 | 158 | ||
159 | 159 | ||
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 4b7a52871652..6ebd276aebeb 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void) | |||
170 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 170 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
171 | } | 171 | } |
172 | 172 | ||
173 | irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); | 173 | irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler); |
174 | irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); | 174 | irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); |
175 | } | 175 | } |
176 | 176 | ||
177 | #ifdef CONFIG_PM | 177 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 4e6774fff422..3d6baf91396c 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = { | |||
184 | .flags = IORESOURCE_MEM, | 184 | .flags = IORESOURCE_MEM, |
185 | }, | 185 | }, |
186 | [1] = { | 186 | [1] = { |
187 | .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), | 187 | .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), |
188 | .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), | 188 | .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ), |
189 | .flags = IORESOURCE_IRQ, | 189 | .flags = IORESOURCE_IRQ, |
190 | }, | 190 | }, |
191 | }; | 191 | }; |
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = { | |||
468 | }, | 468 | }, |
469 | /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ | 469 | /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ |
470 | [1] = { | 470 | [1] = { |
471 | .start = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), | 471 | .start = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ), |
472 | .end = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), | 472 | .end = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ), |
473 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 473 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
474 | } | 474 | } |
475 | }; | 475 | }; |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index ca14555d5e15..1aebaf719462 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void) | |||
178 | MST_INTMSKENA = 0; | 178 | MST_INTMSKENA = 0; |
179 | MST_INTSETCLR = 0; | 179 | MST_INTSETCLR = 0; |
180 | 180 | ||
181 | irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); | 181 | irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler); |
182 | irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); | 182 | irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); |
183 | } | 183 | } |
184 | 184 | ||
185 | #ifdef CONFIG_PM | 185 | #ifdef CONFIG_PM |
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 43a5f6861ca3..f14775536b83 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
@@ -13,6 +13,7 @@ | |||
13 | * published by the Free Software Foundation. | 13 | * published by the Free Software Foundation. |
14 | */ | 14 | */ |
15 | #include <linux/gpio.h> | 15 | #include <linux/gpio.h> |
16 | #include <linux/gpio-pxa.h> | ||
16 | #include <linux/module.h> | 17 | #include <linux/module.h> |
17 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 19 | #include <linux/init.h> |
@@ -20,7 +21,6 @@ | |||
20 | 21 | ||
21 | #include <mach/pxa2xx-regs.h> | 22 | #include <mach/pxa2xx-regs.h> |
22 | #include <mach/mfp-pxa2xx.h> | 23 | #include <mach/mfp-pxa2xx.h> |
23 | #include <mach/gpio-pxa.h> | ||
24 | 24 | ||
25 | #include "generic.h" | 25 | #include "generic.h" |
26 | 26 | ||
@@ -29,6 +29,10 @@ | |||
29 | #define GAFR_L(x) __GAFR(0, x) | 29 | #define GAFR_L(x) __GAFR(0, x) |
30 | #define GAFR_U(x) __GAFR(1, x) | 30 | #define GAFR_U(x) __GAFR(1, x) |
31 | 31 | ||
32 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | ||
33 | #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) | ||
34 | #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) | ||
35 | |||
32 | #define PWER_WE35 (1 << 24) | 36 | #define PWER_WE35 (1 << 24) |
33 | 37 | ||
34 | struct gpio_desc { | 38 | struct gpio_desc { |
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index dce71b4a3a55..e80a3db735c2 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
@@ -537,15 +537,15 @@ static struct pda_power_pdata power_pdata = { | |||
537 | static struct resource power_resources[] = { | 537 | static struct resource power_resources[] = { |
538 | [0] = { | 538 | [0] = { |
539 | .name = "ac", | 539 | .name = "ac", |
540 | .start = gpio_to_irq(GPIO96_AC_DETECT), | 540 | .start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT), |
541 | .end = gpio_to_irq(GPIO96_AC_DETECT), | 541 | .end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT), |
542 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | 542 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
543 | IORESOURCE_IRQ_LOWEDGE, | 543 | IORESOURCE_IRQ_LOWEDGE, |
544 | }, | 544 | }, |
545 | [1] = { | 545 | [1] = { |
546 | .name = "usb", | 546 | .name = "usb", |
547 | .start = gpio_to_irq(GPIO13_nUSB_DETECT), | 547 | .start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT), |
548 | .end = gpio_to_irq(GPIO13_nUSB_DETECT), | 548 | .end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT), |
549 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | 549 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | |
550 | IORESOURCE_IRQ_LOWEDGE, | 550 | IORESOURCE_IRQ_LOWEDGE, |
551 | }, | 551 | }, |
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c index 90928d6e1a5b..83570a79e7d2 100644 --- a/arch/arm/mach-pxa/mxm8x10.c +++ b/arch/arm/mach-pxa/mxm8x10.c | |||
@@ -417,8 +417,8 @@ static struct resource dm9k_resources[] = { | |||
417 | .flags = IORESOURCE_MEM | 417 | .flags = IORESOURCE_MEM |
418 | }, | 418 | }, |
419 | [2] = { | 419 | [2] = { |
420 | .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), | 420 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), |
421 | .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), | 421 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)), |
422 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 422 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
423 | } | 423 | } |
424 | }; | 424 | }; |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 6d38c6548b3d..abab4e2b122c 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = { | |||
378 | #include <linux/i2c/pca953x.h> | 378 | #include <linux/i2c/pca953x.h> |
379 | 379 | ||
380 | static struct pca953x_platform_data pca9536_data = { | 380 | static struct pca953x_platform_data pca9536_data = { |
381 | .gpio_base = NR_BUILTIN_GPIO, | 381 | .gpio_base = PXA_NR_BUILTIN_GPIO, |
382 | }; | 382 | }; |
383 | 383 | ||
384 | static int gpio_bus_switch = -EINVAL; | 384 | static int gpio_bus_switch = -EINVAL; |
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link) | |||
406 | int ret; | 406 | int ret; |
407 | 407 | ||
408 | if (gpio_bus_switch < 0) { | 408 | if (gpio_bus_switch < 0) { |
409 | ret = gpio_request(NR_BUILTIN_GPIO, "camera"); | 409 | ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera"); |
410 | if (!ret) { | 410 | if (!ret) { |
411 | gpio_bus_switch = NR_BUILTIN_GPIO; | 411 | gpio_bus_switch = PXA_NR_BUILTIN_GPIO; |
412 | gpio_direction_output(gpio_bus_switch, 0); | 412 | gpio_direction_output(gpio_bus_switch, 0); |
413 | } | 413 | } |
414 | } | 414 | } |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index b260ce872d2d..69036e42ca31 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = { | |||
166 | .flags = IORESOURCE_MEM, | 166 | .flags = IORESOURCE_MEM, |
167 | }, | 167 | }, |
168 | [1] = { | 168 | [1] = { |
169 | .start = IRQ_GPIO(10), | 169 | .start = PXA_GPIO_TO_IRQ(10), |
170 | .end = IRQ_GPIO(10), | 170 | .end = PXA_GPIO_TO_IRQ(10), |
171 | .flags = IORESOURCE_IRQ, | 171 | .flags = IORESOURCE_IRQ, |
172 | }, | 172 | }, |
173 | }; | 173 | }; |
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = { | |||
212 | .bus_num = 1, | 212 | .bus_num = 1, |
213 | .platform_data = &poodle_ads7846_info, | 213 | .platform_data = &poodle_ads7846_info, |
214 | .controller_data= &poodle_ads7846_chip, | 214 | .controller_data= &poodle_ads7846_chip, |
215 | .irq = gpio_to_irq(POODLE_GPIO_TP_INT), | 215 | .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT), |
216 | }, | 216 | }, |
217 | }; | 217 | }; |
218 | 218 | ||
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index f05f9486b0cb..adf058fa97ee 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -17,6 +17,7 @@ | |||
17 | * need be. | 17 | * need be. |
18 | */ | 18 | */ |
19 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
20 | #include <linux/gpio-pxa.h> | ||
20 | #include <linux/module.h> | 21 | #include <linux/module.h> |
21 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
22 | #include <linux/init.h> | 23 | #include <linux/init.h> |
@@ -208,6 +209,8 @@ static struct clk_lookup pxa25x_clkregs[] = { | |||
208 | INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), | 209 | INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), |
209 | INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), | 210 | INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), |
210 | INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), | 211 | INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), |
212 | INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), | ||
213 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
211 | }; | 214 | }; |
212 | 215 | ||
213 | static struct clk_lookup pxa25x_hwuart_clkreg = | 216 | static struct clk_lookup pxa25x_hwuart_clkreg = |
@@ -287,7 +290,7 @@ static inline void pxa25x_init_pm(void) {} | |||
287 | 290 | ||
288 | static int pxa25x_set_wake(struct irq_data *d, unsigned int on) | 291 | static int pxa25x_set_wake(struct irq_data *d, unsigned int on) |
289 | { | 292 | { |
290 | int gpio = irq_to_gpio(d->irq); | 293 | int gpio = pxa_irq_to_gpio(d->irq); |
291 | uint32_t mask = 0; | 294 | uint32_t mask = 0; |
292 | 295 | ||
293 | if (gpio >= 0 && gpio < 85) | 296 | if (gpio >= 0 && gpio < 85) |
@@ -312,14 +315,12 @@ set_pwer: | |||
312 | void __init pxa25x_init_irq(void) | 315 | void __init pxa25x_init_irq(void) |
313 | { | 316 | { |
314 | pxa_init_irq(32, pxa25x_set_wake); | 317 | pxa_init_irq(32, pxa25x_set_wake); |
315 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake); | ||
316 | } | 318 | } |
317 | 319 | ||
318 | #ifdef CONFIG_CPU_PXA26x | 320 | #ifdef CONFIG_CPU_PXA26x |
319 | void __init pxa26x_init_irq(void) | 321 | void __init pxa26x_init_irq(void) |
320 | { | 322 | { |
321 | pxa_init_irq(32, pxa25x_set_wake); | 323 | pxa_init_irq(32, pxa25x_set_wake); |
322 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake); | ||
323 | } | 324 | } |
324 | #endif | 325 | #endif |
325 | 326 | ||
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index bc5a98ebaa72..180bd8675d4b 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -12,6 +12,7 @@ | |||
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/gpio.h> | 14 | #include <linux/gpio.h> |
15 | #include <linux/gpio-pxa.h> | ||
15 | #include <linux/module.h> | 16 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 18 | #include <linux/init.h> |
@@ -229,6 +230,8 @@ static struct clk_lookup pxa27x_clkregs[] = { | |||
229 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), | 230 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), |
230 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), | 231 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), |
231 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), | 232 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), |
233 | INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL), | ||
234 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
232 | }; | 235 | }; |
233 | 236 | ||
234 | #ifdef CONFIG_PM | 237 | #ifdef CONFIG_PM |
@@ -355,7 +358,7 @@ static inline void pxa27x_init_pm(void) {} | |||
355 | */ | 358 | */ |
356 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) | 359 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) |
357 | { | 360 | { |
358 | int gpio = irq_to_gpio(d->irq); | 361 | int gpio = pxa_irq_to_gpio(d->irq); |
359 | uint32_t mask; | 362 | uint32_t mask; |
360 | 363 | ||
361 | if (gpio >= 0 && gpio < 128) | 364 | if (gpio >= 0 && gpio < 128) |
@@ -386,7 +389,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on) | |||
386 | void __init pxa27x_init_irq(void) | 389 | void __init pxa27x_init_irq(void) |
387 | { | 390 | { |
388 | pxa_init_irq(34, pxa27x_set_wake); | 391 | pxa_init_irq(34, pxa27x_set_wake); |
389 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake); | ||
390 | } | 392 | } |
391 | 393 | ||
392 | static struct map_desc pxa27x_io_desc[] __initdata = { | 394 | static struct map_desc pxa27x_io_desc[] __initdata = { |
@@ -422,6 +424,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
422 | } | 424 | } |
423 | 425 | ||
424 | static struct platform_device *devices[] __initdata = { | 426 | static struct platform_device *devices[] __initdata = { |
427 | &pxa_device_gpio, | ||
425 | &pxa27x_device_udc, | 428 | &pxa27x_device_udc, |
426 | &pxa_device_pmu, | 429 | &pxa_device_pmu, |
427 | &pxa_device_i2s, | 430 | &pxa_device_i2s, |
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 40bb16501d86..0388eda7878a 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c | |||
@@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0); | |||
89 | static struct clk_lookup common_clkregs[] = { | 89 | static struct clk_lookup common_clkregs[] = { |
90 | INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), | 90 | INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), |
91 | INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), | 91 | INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), |
92 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
92 | }; | 93 | }; |
93 | 94 | ||
94 | static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); | 95 | static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); |
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 8d614ecd8e99..d487e1ff4c9a 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c | |||
@@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0); | |||
83 | static struct clk_lookup pxa320_clkregs[] = { | 83 | static struct clk_lookup pxa320_clkregs[] = { |
84 | INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), | 84 | INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), |
85 | INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), | 85 | INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), |
86 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
86 | }; | 87 | }; |
87 | 88 | ||
88 | static int __init pxa320_init(void) | 89 | static int __init pxa320_init(void) |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 0737c59b88ae..f107c71c7589 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
26 | #include <asm/suspend.h> | 26 | #include <asm/suspend.h> |
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <mach/gpio-pxa.h> | ||
29 | #include <mach/pxa3xx-regs.h> | 28 | #include <mach/pxa3xx-regs.h> |
30 | #include <mach/reset.h> | 29 | #include <mach/reset.h> |
31 | #include <mach/ohci.h> | 30 | #include <mach/ohci.h> |
@@ -56,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0); | |||
56 | static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); | 55 | static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); |
57 | static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); | 56 | static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); |
58 | static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); | 57 | static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); |
58 | static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0); | ||
59 | 59 | ||
60 | static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); | 60 | static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); |
61 | static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); | 61 | static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); |
@@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
67 | INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), | 67 | INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), |
68 | /* Power I2C clock is always on */ | 68 | /* Power I2C clock is always on */ |
69 | INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), | 69 | INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), |
70 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
70 | INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), | 71 | INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), |
71 | INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), | 72 | INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), |
72 | INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), | 73 | INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), |
@@ -88,6 +89,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
88 | INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), | 89 | INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), |
89 | INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), | 90 | INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), |
90 | INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), | 91 | INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), |
92 | INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL), | ||
91 | }; | 93 | }; |
92 | 94 | ||
93 | #ifdef CONFIG_PM | 95 | #ifdef CONFIG_PM |
@@ -365,7 +367,8 @@ static struct irq_chip pxa_ext_wakeup_chip = { | |||
365 | .irq_set_type = pxa_set_ext_wakeup_type, | 367 | .irq_set_type = pxa_set_ext_wakeup_type, |
366 | }; | 368 | }; |
367 | 369 | ||
368 | static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) | 370 | static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *, |
371 | unsigned int)) | ||
369 | { | 372 | { |
370 | int irq; | 373 | int irq; |
371 | 374 | ||
@@ -388,7 +391,6 @@ void __init pxa3xx_init_irq(void) | |||
388 | 391 | ||
389 | pxa_init_irq(56, pxa3xx_set_wake); | 392 | pxa_init_irq(56, pxa3xx_set_wake); |
390 | pxa_init_ext_wakeup_irq(pxa3xx_set_wake); | 393 | pxa_init_ext_wakeup_irq(pxa3xx_set_wake); |
391 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); | ||
392 | } | 394 | } |
393 | 395 | ||
394 | static struct map_desc pxa3xx_io_desc[] __initdata = { | 396 | static struct map_desc pxa3xx_io_desc[] __initdata = { |
@@ -417,6 +419,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
417 | } | 419 | } |
418 | 420 | ||
419 | static struct platform_device *devices[] __initdata = { | 421 | static struct platform_device *devices[] __initdata = { |
422 | &pxa_device_gpio, | ||
420 | &pxa27x_device_udc, | 423 | &pxa27x_device_udc, |
421 | &pxa_device_pmu, | 424 | &pxa_device_pmu, |
422 | &pxa_device_i2s, | 425 | &pxa_device_i2s, |
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index 51371b39d2a3..fccc644702e6 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <linux/syscore_ops.h> | 20 | #include <linux/syscore_ops.h> |
21 | 21 | ||
22 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
23 | #include <mach/gpio-pxa.h> | ||
24 | #include <mach/pxa3xx-regs.h> | 23 | #include <mach/pxa3xx-regs.h> |
25 | #include <mach/pxa930.h> | 24 | #include <mach/pxa930.h> |
26 | #include <mach/reset.h> | 25 | #include <mach/reset.h> |
@@ -212,11 +211,13 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0); | |||
212 | static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); | 211 | static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); |
213 | static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); | 212 | static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); |
214 | static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); | 213 | static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); |
214 | static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0); | ||
215 | 215 | ||
216 | static struct clk_lookup pxa95x_clkregs[] = { | 216 | static struct clk_lookup pxa95x_clkregs[] = { |
217 | INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), | 217 | INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), |
218 | /* Power I2C clock is always on */ | 218 | /* Power I2C clock is always on */ |
219 | INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), | 219 | INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), |
220 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
220 | INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), | 221 | INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), |
221 | INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), | 222 | INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), |
222 | INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), | 223 | INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), |
@@ -230,12 +231,12 @@ static struct clk_lookup pxa95x_clkregs[] = { | |||
230 | INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), | 231 | INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), |
231 | INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), | 232 | INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), |
232 | INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), | 233 | INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), |
234 | INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL), | ||
233 | }; | 235 | }; |
234 | 236 | ||
235 | void __init pxa95x_init_irq(void) | 237 | void __init pxa95x_init_irq(void) |
236 | { | 238 | { |
237 | pxa_init_irq(96, NULL); | 239 | pxa_init_irq(96, NULL); |
238 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL); | ||
239 | } | 240 | } |
240 | 241 | ||
241 | /* | 242 | /* |
@@ -248,6 +249,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
248 | } | 249 | } |
249 | 250 | ||
250 | static struct platform_device *devices[] __initdata = { | 251 | static struct platform_device *devices[] __initdata = { |
252 | &pxa_device_gpio, | ||
251 | &sa1100_device_rtc, | 253 | &sa1100_device_rtc, |
252 | &pxa_device_rtc, | 254 | &pxa_device_rtc, |
253 | &pxa27x_device_ssp1, | 255 | &pxa27x_device_ssp1, |
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index 4962b1676629..22818c7694a8 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c | |||
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = { | |||
292 | .flags = IORESOURCE_MEM, | 292 | .flags = IORESOURCE_MEM, |
293 | }, | 293 | }, |
294 | { | 294 | { |
295 | .start = gpio_to_irq(GPIO_ETH_IRQ), | 295 | .start = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ), |
296 | .end = gpio_to_irq(GPIO_ETH_IRQ), | 296 | .end = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ), |
297 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, | 297 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, |
298 | } | 298 | } |
299 | }; | 299 | }; |
@@ -672,7 +672,7 @@ static struct lis3lv02d_platform_data lis3_pdata = { | |||
672 | .chip_select = 1, \ | 672 | .chip_select = 1, \ |
673 | .controller_data = (void *) GPIO_ACCEL_CS, \ | 673 | .controller_data = (void *) GPIO_ACCEL_CS, \ |
674 | .platform_data = &lis3_pdata, \ | 674 | .platform_data = &lis3_pdata, \ |
675 | .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \ | 675 | .irq = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ), \ |
676 | } | 676 | } |
677 | 677 | ||
678 | #define SPI_DAC7512 \ | 678 | #define SPI_DAC7512 \ |
@@ -956,7 +956,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = { | |||
956 | static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { | 956 | static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { |
957 | .type = "eeti_ts", | 957 | .type = "eeti_ts", |
958 | .addr = 0x0a, | 958 | .addr = 0x0a, |
959 | .irq = gpio_to_irq(GPIO_TOUCH_IRQ), | 959 | .irq = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ), |
960 | .platform_data = &eeti_ts_pdata, | 960 | .platform_data = &eeti_ts_pdata, |
961 | }; | 961 | }; |
962 | 962 | ||
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 878707056e65..0fe354efb931 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c | |||
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = { | |||
96 | .flags = IORESOURCE_MEM, | 96 | .flags = IORESOURCE_MEM, |
97 | }, | 97 | }, |
98 | [1] = { | 98 | [1] = { |
99 | .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), | 99 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), |
100 | .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), | 100 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), |
101 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 101 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
102 | } | 102 | } |
103 | }; | 103 | }; |
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = { | |||
502 | .type = "da9034", | 502 | .type = "da9034", |
503 | .addr = 0x34, | 503 | .addr = 0x34, |
504 | .platform_data = &saar_da9034_info, | 504 | .platform_data = &saar_da9034_info, |
505 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), | 505 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), |
506 | }, | 506 | }, |
507 | }; | 507 | }; |
508 | 508 | ||
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index b6dbaca460c7..febc809ed5a6 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c | |||
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = { | |||
92 | .type = "88PM860x", | 92 | .type = "88PM860x", |
93 | .addr = 0x34, | 93 | .addr = 0x34, |
94 | .platform_data = &saarb_pm8607_info, | 94 | .platform_data = &saarb_pm8607_info, |
95 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), | 95 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), |
96 | }, | 96 | }, |
97 | }; | 97 | }; |
98 | 98 | ||
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index 785880f67b60..8d5168d253a9 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c | |||
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev) | |||
907 | gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); | 907 | gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); |
908 | 908 | ||
909 | /* Register interrupt handlers */ | 909 | /* Register interrupt handlers */ |
910 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { | 910 | if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { |
911 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); | 911 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin)); |
912 | } | 912 | } |
913 | 913 | ||
914 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { | 914 | if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { |
915 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); | 915 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock)); |
916 | } | 916 | } |
917 | 917 | ||
918 | if (sharpsl_pm.machinfo->gpio_fatal) { | 918 | if (sharpsl_pm.machinfo->gpio_fatal) { |
919 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { | 919 | if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { |
920 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); | 920 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal)); |
921 | } | 921 | } |
922 | } | 922 | } |
923 | 923 | ||
924 | if (sharpsl_pm.machinfo->batfull_irq) { | 924 | if (sharpsl_pm.machinfo->batfull_irq) { |
925 | /* Register interrupt handler. */ | 925 | /* Register interrupt handler. */ |
926 | if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { | 926 | if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { |
927 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); | 927 | dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull)); |
928 | } | 928 | } |
929 | } | 929 | } |
930 | 930 | ||
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev) | |||
953 | 953 | ||
954 | led_trigger_unregister_simple(sharpsl_charge_led_trigger); | 954 | led_trigger_unregister_simple(sharpsl_charge_led_trigger); |
955 | 955 | ||
956 | free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); | 956 | free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); |
957 | free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); | 957 | free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); |
958 | 958 | ||
959 | if (sharpsl_pm.machinfo->gpio_fatal) | 959 | if (sharpsl_pm.machinfo->gpio_fatal) |
960 | free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); | 960 | free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); |
961 | 961 | ||
962 | if (sharpsl_pm.machinfo->batfull_irq) | 962 | if (sharpsl_pm.machinfo->batfull_irq) |
963 | free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); | 963 | free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); |
964 | 964 | ||
965 | gpio_free(sharpsl_pm.machinfo->gpio_batlock); | 965 | gpio_free(sharpsl_pm.machinfo->gpio_batlock); |
966 | gpio_free(sharpsl_pm.machinfo->gpio_batfull); | 966 | gpio_free(sharpsl_pm.machinfo->gpio_batfull); |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index a7f81a3fd132..abf355d0c92f 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = { | |||
552 | .chip_select = 0, | 552 | .chip_select = 0, |
553 | .platform_data = &spitz_ads7846_info, | 553 | .platform_data = &spitz_ads7846_info, |
554 | .controller_data = &spitz_ads7846_chip, | 554 | .controller_data = &spitz_ads7846_chip, |
555 | .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), | 555 | .irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT), |
556 | }, { | 556 | }, { |
557 | .modalias = "corgi-lcd", | 557 | .modalias = "corgi-lcd", |
558 | .max_speed_hz = 50000, | 558 | .max_speed_hz = 50000, |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 094279aefe9c..34cbdac51525 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/gpio-pxa.h> | ||
18 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
19 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
20 | #include <linux/apm-emulation.h> | 21 | #include <linux/apm-emulation.h> |
@@ -41,6 +42,7 @@ static int spitz_last_ac_status; | |||
41 | static struct gpio spitz_charger_gpios[] = { | 42 | static struct gpio spitz_charger_gpios[] = { |
42 | { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" }, | 43 | { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" }, |
43 | { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" }, | 44 | { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" }, |
45 | { SPITZ_GPIO_AC_IN, GPIOF_IN, "Charger Detection" }, | ||
44 | { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, | 46 | { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, |
45 | { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" }, | 47 | { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" }, |
46 | { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, | 48 | { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, |
@@ -169,14 +171,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm) | |||
169 | 171 | ||
170 | static unsigned long spitz_charger_wakeup(void) | 172 | static unsigned long spitz_charger_wakeup(void) |
171 | { | 173 | { |
172 | return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC)); | 174 | unsigned long ret; |
175 | ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT) | ||
176 | << GPIO_bit(SPITZ_GPIO_KEY_INT)) | ||
177 | | (!gpio_get_value(SPITZ_GPIO_SYNC) | ||
178 | << GPIO_bit(SPITZ_GPIO_SYNC)); | ||
179 | return ret; | ||
173 | } | 180 | } |
174 | 181 | ||
175 | unsigned long spitzpm_read_devdata(int type) | 182 | unsigned long spitzpm_read_devdata(int type) |
176 | { | 183 | { |
177 | switch (type) { | 184 | switch (type) { |
178 | case SHARPSL_STATUS_ACIN: | 185 | case SHARPSL_STATUS_ACIN: |
179 | return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); | 186 | return !gpio_get_value(SPITZ_GPIO_AC_IN); |
180 | case SHARPSL_STATUS_LOCK: | 187 | case SHARPSL_STATUS_LOCK: |
181 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); | 188 | return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); |
182 | case SHARPSL_STATUS_CHRGFULL: | 189 | case SHARPSL_STATUS_CHRGFULL: |
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 80d7f23ad0fd..d8a2467de92e 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c | |||
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = { | |||
376 | .bus_num = 1, | 376 | .bus_num = 1, |
377 | .chip_select = 0, | 377 | .chip_select = 0, |
378 | .controller_data = &staccel_chip_info, | 378 | .controller_data = &staccel_chip_info, |
379 | .irq = IRQ_GPIO(96), | 379 | .irq = PXA_GPIO_TO_IRQ(96), |
380 | }, { | 380 | }, { |
381 | .modalias = "cc2420", | 381 | .modalias = "cc2420", |
382 | .max_speed_hz = 6500000, | 382 | .max_speed_hz = 6500000, |
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = { | |||
546 | .type = "da9030", | 546 | .type = "da9030", |
547 | .addr = 0x49, | 547 | .addr = 0x49, |
548 | .platform_data = &imote2_da9030_pdata, | 548 | .platform_data = &imote2_da9030_pdata, |
549 | .irq = gpio_to_irq(1), | 549 | .irq = PXA_GPIO_TO_IRQ(1), |
550 | }, | 550 | }, |
551 | }; | 551 | }; |
552 | 552 | ||
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = { | |||
560 | /* Through a nand gate - Also beware, on V2 sensor board the | 560 | /* Through a nand gate - Also beware, on V2 sensor board the |
561 | * pull up resistors are missing. | 561 | * pull up resistors are missing. |
562 | */ | 562 | */ |
563 | .irq = IRQ_GPIO(99), | 563 | .irq = PXA_GPIO_TO_IRQ(99), |
564 | }, { /* ITS400 Sensor board only */ | 564 | }, { /* ITS400 Sensor board only */ |
565 | .type = "tsl2561", | 565 | .type = "tsl2561", |
566 | .addr = 0x49, | 566 | .addr = 0x49, |
567 | /* Through a nand gate - Also beware, on V2 sensor board the | 567 | /* Through a nand gate - Also beware, on V2 sensor board the |
568 | * pull up resistors are missing. | 568 | * pull up resistors are missing. |
569 | */ | 569 | */ |
570 | .irq = IRQ_GPIO(99), | 570 | .irq = PXA_GPIO_TO_IRQ(99), |
571 | }, { /* ITS400 Sensor board only */ | 571 | }, { /* ITS400 Sensor board only */ |
572 | .type = "tmp175", | 572 | .type = "tmp175", |
573 | .addr = 0x4A, | 573 | .addr = 0x4A, |
574 | .irq = IRQ_GPIO(96), | 574 | .irq = PXA_GPIO_TO_IRQ(96), |
575 | }, { /* IMB400 Multimedia board */ | 575 | }, { /* IMB400 Multimedia board */ |
576 | .type = "wm8940", | 576 | .type = "wm8940", |
577 | .addr = 0x1A, | 577 | .addr = 0x1A, |
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = { | |||
661 | .flags = IORESOURCE_MEM, | 661 | .flags = IORESOURCE_MEM, |
662 | }, | 662 | }, |
663 | [1] = { | 663 | [1] = { |
664 | .start = IRQ_GPIO(40), | 664 | .start = PXA_GPIO_TO_IRQ(40), |
665 | .end = IRQ_GPIO(40), | 665 | .end = PXA_GPIO_TO_IRQ(40), |
666 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 666 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
667 | } | 667 | } |
668 | }; | 668 | }; |
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev, | |||
707 | } | 707 | } |
708 | gpio_direction_input(SG2_GPIO_nSD_DETECT); | 708 | gpio_direction_input(SG2_GPIO_nSD_DETECT); |
709 | 709 | ||
710 | err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), | 710 | err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), |
711 | stargate2_detect_int, | 711 | stargate2_detect_int, |
712 | IRQ_TYPE_EDGE_BOTH, | 712 | IRQ_TYPE_EDGE_BOTH, |
713 | "MMC card detect", | 713 | "MMC card detect", |
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd) | |||
738 | 738 | ||
739 | static void stargate2_mci_exit(struct device *dev, void *data) | 739 | static void stargate2_mci_exit(struct device *dev, void *data) |
740 | { | 740 | { |
741 | free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data); | 741 | free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data); |
742 | gpio_free(SG2_SD_POWER_ENABLE); | 742 | gpio_free(SG2_SD_POWER_ENABLE); |
743 | gpio_free(SG2_GPIO_nSD_DETECT); | 743 | gpio_free(SG2_GPIO_nSD_DETECT); |
744 | } | 744 | } |
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = { | |||
913 | .type = "da9030", | 913 | .type = "da9030", |
914 | .addr = 0x49, | 914 | .addr = 0x49, |
915 | .platform_data = &stargate2_da9030_pdata, | 915 | .platform_data = &stargate2_da9030_pdata, |
916 | .irq = gpio_to_irq(1), | 916 | .irq = PXA_GPIO_TO_IRQ(1), |
917 | }, | 917 | }, |
918 | }; | 918 | }; |
919 | 919 | ||
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = { | |||
938 | /* Through a nand gate - Also beware, on V2 sensor board the | 938 | /* Through a nand gate - Also beware, on V2 sensor board the |
939 | * pull up resistors are missing. | 939 | * pull up resistors are missing. |
940 | */ | 940 | */ |
941 | .irq = IRQ_GPIO(99), | 941 | .irq = PXA_GPIO_TO_IRQ(99), |
942 | }, { /* ITS400 Sensor board only */ | 942 | }, { /* ITS400 Sensor board only */ |
943 | .type = "tsl2561", | 943 | .type = "tsl2561", |
944 | .addr = 0x49, | 944 | .addr = 0x49, |
945 | /* Through a nand gate - Also beware, on V2 sensor board the | 945 | /* Through a nand gate - Also beware, on V2 sensor board the |
946 | * pull up resistors are missing. | 946 | * pull up resistors are missing. |
947 | */ | 947 | */ |
948 | .irq = IRQ_GPIO(99), | 948 | .irq = PXA_GPIO_TO_IRQ(99), |
949 | }, { /* ITS400 Sensor board only */ | 949 | }, { /* ITS400 Sensor board only */ |
950 | .type = "tmp175", | 950 | .type = "tmp175", |
951 | .addr = 0x4A, | 951 | .addr = 0x4A, |
952 | .irq = IRQ_GPIO(96), | 952 | .irq = PXA_GPIO_TO_IRQ(96), |
953 | }, | 953 | }, |
954 | }; | 954 | }; |
955 | 955 | ||
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 4fa36a3e383c..9fb38e80e076 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c | |||
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = { | |||
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | [1] = { | 87 | [1] = { |
88 | .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), | 88 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), |
89 | .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), | 89 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)), |
90 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 90 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
91 | } | 91 | } |
92 | }; | 92 | }; |
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 8a22879f0bb0..f7d9305cfd77 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c | |||
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = { | |||
101 | .type = "88PM860x", | 101 | .type = "88PM860x", |
102 | .addr = 0x34, | 102 | .addr = 0x34, |
103 | .platform_data = &evb3_pm8607_info, | 103 | .platform_data = &evb3_pm8607_info, |
104 | .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), | 104 | .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), |
105 | }, | 105 | }, |
106 | }; | 106 | }; |
107 | 107 | ||
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index dfe40f8705aa..7ce5c436cc4e 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = { | |||
404 | static struct resource tosa_power_resource[] = { | 404 | static struct resource tosa_power_resource[] = { |
405 | { | 405 | { |
406 | .name = "ac", | 406 | .name = "ac", |
407 | .start = gpio_to_irq(TOSA_GPIO_AC_IN), | 407 | .start = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN), |
408 | .end = gpio_to_irq(TOSA_GPIO_AC_IN), | 408 | .end = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN), |
409 | .flags = IORESOURCE_IRQ | | 409 | .flags = IORESOURCE_IRQ | |
410 | IORESOURCE_IRQ_HIGHEDGE | | 410 | IORESOURCE_IRQ_HIGHEDGE | |
411 | IORESOURCE_IRQ_LOWEDGE, | 411 | IORESOURCE_IRQ_LOWEDGE, |
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index afe2b7495523..023d6ca789de 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = { | |||
422 | .flags = IORESOURCE_MEM, | 422 | .flags = IORESOURCE_MEM, |
423 | }, | 423 | }, |
424 | [1] = { | 424 | [1] = { |
425 | .start = gpio_to_irq(VIPER_ETH_GPIO), | 425 | .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), |
426 | .end = gpio_to_irq(VIPER_ETH_GPIO), | 426 | .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO), |
427 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 427 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
428 | }, | 428 | }, |
429 | [2] = { | 429 | [2] = { |
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
546 | /* External UARTs */ | 546 | /* External UARTs */ |
547 | { | 547 | { |
548 | .mapbase = VIPER_UARTA_PHYS, | 548 | .mapbase = VIPER_UARTA_PHYS, |
549 | .irq = gpio_to_irq(VIPER_UARTA_GPIO), | 549 | .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO), |
550 | .irqflags = IRQF_TRIGGER_RISING, | 550 | .irqflags = IRQF_TRIGGER_RISING, |
551 | .uartclk = 1843200, | 551 | .uartclk = 1843200, |
552 | .regshift = 1, | 552 | .regshift = 1, |
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
556 | }, | 556 | }, |
557 | { | 557 | { |
558 | .mapbase = VIPER_UARTB_PHYS, | 558 | .mapbase = VIPER_UARTB_PHYS, |
559 | .irq = gpio_to_irq(VIPER_UARTB_GPIO), | 559 | .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO), |
560 | .irqflags = IRQF_TRIGGER_RISING, | 560 | .irqflags = IRQF_TRIGGER_RISING, |
561 | .uartclk = 1843200, | 561 | .uartclk = 1843200, |
562 | .regshift = 1, | 562 | .regshift = 1, |
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = { | |||
596 | .flags = IORESOURCE_MEM, | 596 | .flags = IORESOURCE_MEM, |
597 | }, | 597 | }, |
598 | [2] = { | 598 | [2] = { |
599 | .start = gpio_to_irq(VIPER_USB_GPIO), | 599 | .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), |
600 | .end = gpio_to_irq(VIPER_USB_GPIO), | 600 | .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO), |
601 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 601 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
602 | }, | 602 | }, |
603 | }; | 603 | }; |
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index fed5fb088714..1f5cfa96f6d6 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c | |||
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = { | |||
395 | .flags = IORESOURCE_MEM, | 395 | .flags = IORESOURCE_MEM, |
396 | }, | 396 | }, |
397 | [2] = { | 397 | [2] = { |
398 | .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), | 398 | .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), |
399 | .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), | 399 | .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ), |
400 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | 400 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
401 | }, | 401 | }, |
402 | }; | 402 | }; |
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = { | |||
433 | }; | 433 | }; |
434 | 434 | ||
435 | static struct ucb1400_pdata vpac270_ucb1400_pdata = { | 435 | static struct ucb1400_pdata vpac270_ucb1400_pdata = { |
436 | .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ), | 436 | .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ), |
437 | }; | 437 | }; |
438 | 438 | ||
439 | static struct platform_device vpac270_ucb1400_device = { | 439 | static struct platform_device vpac270_ucb1400_device = { |
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = { | |||
610 | .flags = IORESOURCE_DMA | 610 | .flags = IORESOURCE_DMA |
611 | }, | 611 | }, |
612 | [3] = { /* IDE IRQ pin */ | 612 | [3] = { /* IDE IRQ pin */ |
613 | .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), | 613 | .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), |
614 | .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), | 614 | .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ), |
615 | .flags = IORESOURCE_IRQ | 615 | .flags = IORESOURCE_IRQ |
616 | } | 616 | } |
617 | }; | 617 | }; |
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index d75f66ab8c34..b6476848b561 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = { | |||
573 | .modalias = "libertas_spi", | 573 | .modalias = "libertas_spi", |
574 | .platform_data = &z2_lbs_pdata, | 574 | .platform_data = &z2_lbs_pdata, |
575 | .controller_data = &z2_lbs_chip_info, | 575 | .controller_data = &z2_lbs_chip_info, |
576 | .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ), | 576 | .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ), |
577 | .max_speed_hz = 13000000, | 577 | .max_speed_hz = 13000000, |
578 | .bus_num = 1, | 578 | .bus_num = 1, |
579 | .chip_select = 0, | 579 | .chip_select = 0, |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 9db35a7fcfc0..a4dd1c347050 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
233 | /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ | 233 | /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ |
234 | { /* COM1 */ | 234 | { /* COM1 */ |
235 | .mapbase = 0x10000000, | 235 | .mapbase = 0x10000000, |
236 | .irq = gpio_to_irq(ZEUS_UARTA_GPIO), | 236 | .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO), |
237 | .irqflags = IRQF_TRIGGER_RISING, | 237 | .irqflags = IRQF_TRIGGER_RISING, |
238 | .uartclk = 14745600, | 238 | .uartclk = 14745600, |
239 | .regshift = 1, | 239 | .regshift = 1, |
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
242 | }, | 242 | }, |
243 | { /* COM2 */ | 243 | { /* COM2 */ |
244 | .mapbase = 0x10800000, | 244 | .mapbase = 0x10800000, |
245 | .irq = gpio_to_irq(ZEUS_UARTB_GPIO), | 245 | .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO), |
246 | .irqflags = IRQF_TRIGGER_RISING, | 246 | .irqflags = IRQF_TRIGGER_RISING, |
247 | .uartclk = 14745600, | 247 | .uartclk = 14745600, |
248 | .regshift = 1, | 248 | .regshift = 1, |
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
251 | }, | 251 | }, |
252 | { /* COM3 */ | 252 | { /* COM3 */ |
253 | .mapbase = 0x11000000, | 253 | .mapbase = 0x11000000, |
254 | .irq = gpio_to_irq(ZEUS_UARTC_GPIO), | 254 | .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO), |
255 | .irqflags = IRQF_TRIGGER_RISING, | 255 | .irqflags = IRQF_TRIGGER_RISING, |
256 | .uartclk = 14745600, | 256 | .uartclk = 14745600, |
257 | .regshift = 1, | 257 | .regshift = 1, |
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
260 | }, | 260 | }, |
261 | { /* COM4 */ | 261 | { /* COM4 */ |
262 | .mapbase = 0x11800000, | 262 | .mapbase = 0x11800000, |
263 | .irq = gpio_to_irq(ZEUS_UARTD_GPIO), | 263 | .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO), |
264 | .irqflags = IRQF_TRIGGER_RISING, | 264 | .irqflags = IRQF_TRIGGER_RISING, |
265 | .uartclk = 14745600, | 265 | .uartclk = 14745600, |
266 | .regshift = 1, | 266 | .regshift = 1, |
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = { | |||
321 | .flags = IORESOURCE_MEM | 321 | .flags = IORESOURCE_MEM |
322 | }, | 322 | }, |
323 | [2] = { | 323 | [2] = { |
324 | .start = gpio_to_irq(ZEUS_ETH0_GPIO), | 324 | .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), |
325 | .end = gpio_to_irq(ZEUS_ETH0_GPIO), | 325 | .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO), |
326 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | 326 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
327 | }, | 327 | }, |
328 | }; | 328 | }; |
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = { | |||
339 | .flags = IORESOURCE_MEM, | 339 | .flags = IORESOURCE_MEM, |
340 | }, | 340 | }, |
341 | [2] = { | 341 | [2] = { |
342 | .start = gpio_to_irq(ZEUS_ETH1_GPIO), | 342 | .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), |
343 | .end = gpio_to_irq(ZEUS_ETH1_GPIO), | 343 | .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO), |
344 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | 344 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
345 | }, | 345 | }, |
346 | }; | 346 | }; |
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = { | |||
423 | [0] = { | 423 | [0] = { |
424 | .modalias = "mcp2515", | 424 | .modalias = "mcp2515", |
425 | .platform_data = &zeus_mcp2515_pdata, | 425 | .platform_data = &zeus_mcp2515_pdata, |
426 | .irq = gpio_to_irq(ZEUS_CAN_GPIO), | 426 | .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO), |
427 | .max_speed_hz = 1*1000*1000, | 427 | .max_speed_hz = 1*1000*1000, |
428 | .bus_num = 3, | 428 | .bus_num = 3, |
429 | .mode = SPI_MODE_0, | 429 | .mode = SPI_MODE_0, |
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = { | |||
753 | { | 753 | { |
754 | I2C_BOARD_INFO("pca9535", 0x20), | 754 | I2C_BOARD_INFO("pca9535", 0x20), |
755 | .platform_data = &zeus_pca953x_pdata[2], | 755 | .platform_data = &zeus_pca953x_pdata[2], |
756 | .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO), | 756 | .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO), |
757 | }, | 757 | }, |
758 | { I2C_BOARD_INFO("lm75a", 0x48) }, | 758 | { I2C_BOARD_INFO("lm75a", 0x48) }, |
759 | { I2C_BOARD_INFO("24c01", 0x50) }, | 759 | { I2C_BOARD_INFO("24c01", 0x50) }, |
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 7678b1bf7903..98eec80623e3 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -408,8 +408,8 @@ static void __init zylonite_init(void) | |||
408 | * Note: We depend that the bootloader set | 408 | * Note: We depend that the bootloader set |
409 | * the correct value to MSC register for SMC91x. | 409 | * the correct value to MSC register for SMC91x. |
410 | */ | 410 | */ |
411 | smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq); | 411 | smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq); |
412 | smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); | 412 | smc91x_resources[1].end = PXA_GPIO_TO_IRQ(gpio_eth_irq); |
413 | platform_device_register(&smc91x_device); | 413 | platform_device_register(&smc91x_device); |
414 | 414 | ||
415 | pxa_set_ac97_info(NULL); | 415 | pxa_set_ac97_info(NULL); |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 93c64d8d7de9..86e59c043de2 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = { | |||
231 | .type = "pca9539", | 231 | .type = "pca9539", |
232 | .addr = 0x74, | 232 | .addr = 0x74, |
233 | .platform_data = &gpio_exp[0], | 233 | .platform_data = &gpio_exp[0], |
234 | .irq = IRQ_GPIO(18), | 234 | .irq = PXA_GPIO_TO_IRQ(18), |
235 | }, { | 235 | }, { |
236 | .type = "pca9539", | 236 | .type = "pca9539", |
237 | .addr = 0x75, | 237 | .addr = 0x75, |
238 | .platform_data = &gpio_exp[1], | 238 | .platform_data = &gpio_exp[1], |
239 | .irq = IRQ_GPIO(19), | 239 | .irq = PXA_GPIO_TO_IRQ(19), |
240 | }, | 240 | }, |
241 | }; | 241 | }; |
242 | 242 | ||
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig index dd8c85ef6dab..c87f6108eeb1 100644 --- a/arch/arm/mach-s5p64x0/Kconfig +++ b/arch/arm/mach-s5p64x0/Kconfig | |||
@@ -41,6 +41,11 @@ config S5P64X0_SETUP_SPI | |||
41 | help | 41 | help |
42 | Common setup code for SPI GPIO configurations | 42 | Common setup code for SPI GPIO configurations |
43 | 43 | ||
44 | config S5P64X0_SETUP_SDHCI_GPIO | ||
45 | bool | ||
46 | help | ||
47 | Common setup code for SDHCI gpio. | ||
48 | |||
44 | # machine support | 49 | # machine support |
45 | 50 | ||
46 | config MACH_SMDK6440 | 51 | config MACH_SMDK6440 |
@@ -50,12 +55,16 @@ config MACH_SMDK6440 | |||
50 | select S3C_DEV_I2C1 | 55 | select S3C_DEV_I2C1 |
51 | select S3C_DEV_RTC | 56 | select S3C_DEV_RTC |
52 | select S3C_DEV_WDT | 57 | select S3C_DEV_WDT |
58 | select S3C_DEV_HSMMC | ||
59 | select S3C_DEV_HSMMC1 | ||
60 | select S3C_DEV_HSMMC2 | ||
53 | select SAMSUNG_DEV_ADC | 61 | select SAMSUNG_DEV_ADC |
54 | select SAMSUNG_DEV_BACKLIGHT | 62 | select SAMSUNG_DEV_BACKLIGHT |
55 | select SAMSUNG_DEV_PWM | 63 | select SAMSUNG_DEV_PWM |
56 | select SAMSUNG_DEV_TS | 64 | select SAMSUNG_DEV_TS |
57 | select S5P64X0_SETUP_FB_24BPP | 65 | select S5P64X0_SETUP_FB_24BPP |
58 | select S5P64X0_SETUP_I2C1 | 66 | select S5P64X0_SETUP_I2C1 |
67 | select S5P64X0_SETUP_SDHCI_GPIO | ||
59 | help | 68 | help |
60 | Machine support for the Samsung SMDK6440 | 69 | Machine support for the Samsung SMDK6440 |
61 | 70 | ||
@@ -66,13 +75,28 @@ config MACH_SMDK6450 | |||
66 | select S3C_DEV_I2C1 | 75 | select S3C_DEV_I2C1 |
67 | select S3C_DEV_RTC | 76 | select S3C_DEV_RTC |
68 | select S3C_DEV_WDT | 77 | select S3C_DEV_WDT |
78 | select S3C_DEV_HSMMC | ||
79 | select S3C_DEV_HSMMC1 | ||
80 | select S3C_DEV_HSMMC2 | ||
69 | select SAMSUNG_DEV_ADC | 81 | select SAMSUNG_DEV_ADC |
70 | select SAMSUNG_DEV_BACKLIGHT | 82 | select SAMSUNG_DEV_BACKLIGHT |
71 | select SAMSUNG_DEV_PWM | 83 | select SAMSUNG_DEV_PWM |
72 | select SAMSUNG_DEV_TS | 84 | select SAMSUNG_DEV_TS |
73 | select S5P64X0_SETUP_FB_24BPP | 85 | select S5P64X0_SETUP_FB_24BPP |
74 | select S5P64X0_SETUP_I2C1 | 86 | select S5P64X0_SETUP_I2C1 |
87 | select S5P64X0_SETUP_SDHCI_GPIO | ||
75 | help | 88 | help |
76 | Machine support for the Samsung SMDK6450 | 89 | Machine support for the Samsung SMDK6450 |
77 | 90 | ||
91 | menu "Use 8-bit SDHCI bus width" | ||
92 | |||
93 | config S5P64X0_SD_CH1_8BIT | ||
94 | bool "SDHCI Channel 1 (Slot 1)" | ||
95 | depends on MACH_SMDK6450 || MACH_SMDK6440 | ||
96 | help | ||
97 | Support SDHCI Channel 1 8-bit bus. | ||
98 | If selected, Channel 2 is disabled. | ||
99 | |||
100 | endmenu | ||
101 | |||
78 | endif | 102 | endif |
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index e167ca136f5d..12bb951187a4 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile | |||
@@ -33,3 +33,4 @@ obj-y += setup-i2c0.o | |||
33 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o | 33 | obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o |
34 | obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o | 34 | obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o |
35 | obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o | 35 | obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o |
36 | obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 925d2daa60c7..ee1e8e7f5631 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -380,36 +380,6 @@ static struct clksrc_sources clkset_audio = { | |||
380 | static struct clksrc_clk clksrcs[] = { | 380 | static struct clksrc_clk clksrcs[] = { |
381 | { | 381 | { |
382 | .clk = { | 382 | .clk = { |
383 | .name = "sclk_mmc", | ||
384 | .devname = "s3c-sdhci.0", | ||
385 | .ctrlbit = (1 << 24), | ||
386 | .enable = s5p64x0_sclk_ctrl, | ||
387 | }, | ||
388 | .sources = &clkset_group1, | ||
389 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
390 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
391 | }, { | ||
392 | .clk = { | ||
393 | .name = "sclk_mmc", | ||
394 | .devname = "s3c-sdhci.1", | ||
395 | .ctrlbit = (1 << 25), | ||
396 | .enable = s5p64x0_sclk_ctrl, | ||
397 | }, | ||
398 | .sources = &clkset_group1, | ||
399 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
400 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
401 | }, { | ||
402 | .clk = { | ||
403 | .name = "sclk_mmc", | ||
404 | .devname = "s3c-sdhci.2", | ||
405 | .ctrlbit = (1 << 26), | ||
406 | .enable = s5p64x0_sclk_ctrl, | ||
407 | }, | ||
408 | .sources = &clkset_group1, | ||
409 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
410 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
411 | }, { | ||
412 | .clk = { | ||
413 | .name = "sclk_post", | 383 | .name = "sclk_post", |
414 | .ctrlbit = (1 << 10), | 384 | .ctrlbit = (1 << 10), |
415 | .enable = s5p64x0_sclk_ctrl, | 385 | .enable = s5p64x0_sclk_ctrl, |
@@ -447,6 +417,42 @@ static struct clksrc_clk clksrcs[] = { | |||
447 | }, | 417 | }, |
448 | }; | 418 | }; |
449 | 419 | ||
420 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
421 | .clk = { | ||
422 | .name = "sclk_mmc", | ||
423 | .devname = "s3c-sdhci.0", | ||
424 | .ctrlbit = (1 << 24), | ||
425 | .enable = s5p64x0_sclk_ctrl, | ||
426 | }, | ||
427 | .sources = &clkset_group1, | ||
428 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
429 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
430 | }; | ||
431 | |||
432 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
433 | .clk = { | ||
434 | .name = "sclk_mmc", | ||
435 | .devname = "s3c-sdhci.1", | ||
436 | .ctrlbit = (1 << 25), | ||
437 | .enable = s5p64x0_sclk_ctrl, | ||
438 | }, | ||
439 | .sources = &clkset_group1, | ||
440 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
441 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
442 | }; | ||
443 | |||
444 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
445 | .clk = { | ||
446 | .name = "sclk_mmc", | ||
447 | .devname = "s3c-sdhci.2", | ||
448 | .ctrlbit = (1 << 26), | ||
449 | .enable = s5p64x0_sclk_ctrl, | ||
450 | }, | ||
451 | .sources = &clkset_group1, | ||
452 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
453 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
454 | }; | ||
455 | |||
450 | static struct clksrc_clk clk_sclk_uclk = { | 456 | static struct clksrc_clk clk_sclk_uclk = { |
451 | .clk = { | 457 | .clk = { |
452 | .name = "uclk1", | 458 | .name = "uclk1", |
@@ -504,6 +510,9 @@ static struct clksrc_clk *clksrc_cdev[] = { | |||
504 | &clk_sclk_uclk, | 510 | &clk_sclk_uclk, |
505 | &clk_sclk_spi0, | 511 | &clk_sclk_spi0, |
506 | &clk_sclk_spi1, | 512 | &clk_sclk_spi1, |
513 | &clk_sclk_mmc0, | ||
514 | &clk_sclk_mmc1, | ||
515 | &clk_sclk_mmc2 | ||
507 | }; | 516 | }; |
508 | 517 | ||
509 | static struct clk_lookup s5p6440_clk_lookup[] = { | 518 | static struct clk_lookup s5p6440_clk_lookup[] = { |
@@ -512,6 +521,9 @@ static struct clk_lookup s5p6440_clk_lookup[] = { | |||
512 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | 521 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), |
513 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | 522 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), |
514 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | 523 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), |
524 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
525 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
526 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
515 | }; | 527 | }; |
516 | 528 | ||
517 | void __init_or_cpufreq s5p6440_setup_clocks(void) | 529 | void __init_or_cpufreq s5p6440_setup_clocks(void) |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index c390a59f68ac..dae6a13f43bb 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -414,36 +414,6 @@ static struct clksrc_clk clk_sclk_audio0 = { | |||
414 | static struct clksrc_clk clksrcs[] = { | 414 | static struct clksrc_clk clksrcs[] = { |
415 | { | 415 | { |
416 | .clk = { | 416 | .clk = { |
417 | .name = "sclk_mmc", | ||
418 | .devname = "s3c-sdhci.0", | ||
419 | .ctrlbit = (1 << 24), | ||
420 | .enable = s5p64x0_sclk_ctrl, | ||
421 | }, | ||
422 | .sources = &clkset_group2, | ||
423 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
424 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
425 | }, { | ||
426 | .clk = { | ||
427 | .name = "sclk_mmc", | ||
428 | .devname = "s3c-sdhci.1", | ||
429 | .ctrlbit = (1 << 25), | ||
430 | .enable = s5p64x0_sclk_ctrl, | ||
431 | }, | ||
432 | .sources = &clkset_group2, | ||
433 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
434 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
435 | }, { | ||
436 | .clk = { | ||
437 | .name = "sclk_mmc", | ||
438 | .devname = "s3c-sdhci.2", | ||
439 | .ctrlbit = (1 << 26), | ||
440 | .enable = s5p64x0_sclk_ctrl, | ||
441 | }, | ||
442 | .sources = &clkset_group2, | ||
443 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
444 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
445 | }, { | ||
446 | .clk = { | ||
447 | .name = "sclk_fimc", | 417 | .name = "sclk_fimc", |
448 | .ctrlbit = (1 << 10), | 418 | .ctrlbit = (1 << 10), |
449 | .enable = s5p64x0_sclk_ctrl, | 419 | .enable = s5p64x0_sclk_ctrl, |
@@ -508,6 +478,42 @@ static struct clksrc_clk clksrcs[] = { | |||
508 | }, | 478 | }, |
509 | }; | 479 | }; |
510 | 480 | ||
481 | static struct clksrc_clk clk_sclk_mmc0 = { | ||
482 | .clk = { | ||
483 | .name = "sclk_mmc", | ||
484 | .devname = "s3c-sdhci.0", | ||
485 | .ctrlbit = (1 << 24), | ||
486 | .enable = s5p64x0_sclk_ctrl, | ||
487 | }, | ||
488 | .sources = &clkset_group2, | ||
489 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, | ||
490 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | ||
491 | }; | ||
492 | |||
493 | static struct clksrc_clk clk_sclk_mmc1 = { | ||
494 | .clk = { | ||
495 | .name = "sclk_mmc", | ||
496 | .devname = "s3c-sdhci.1", | ||
497 | .ctrlbit = (1 << 25), | ||
498 | .enable = s5p64x0_sclk_ctrl, | ||
499 | }, | ||
500 | .sources = &clkset_group2, | ||
501 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, | ||
502 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | ||
503 | }; | ||
504 | |||
505 | static struct clksrc_clk clk_sclk_mmc2 = { | ||
506 | .clk = { | ||
507 | .name = "sclk_mmc", | ||
508 | .devname = "s3c-sdhci.2", | ||
509 | .ctrlbit = (1 << 26), | ||
510 | .enable = s5p64x0_sclk_ctrl, | ||
511 | }, | ||
512 | .sources = &clkset_group2, | ||
513 | .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, | ||
514 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, | ||
515 | }; | ||
516 | |||
511 | static struct clksrc_clk clk_sclk_uclk = { | 517 | static struct clksrc_clk clk_sclk_uclk = { |
512 | .clk = { | 518 | .clk = { |
513 | .name = "uclk1", | 519 | .name = "uclk1", |
@@ -547,6 +553,9 @@ static struct clksrc_clk *clksrc_cdev[] = { | |||
547 | &clk_sclk_uclk, | 553 | &clk_sclk_uclk, |
548 | &clk_sclk_spi0, | 554 | &clk_sclk_spi0, |
549 | &clk_sclk_spi1, | 555 | &clk_sclk_spi1, |
556 | &clk_sclk_mmc0, | ||
557 | &clk_sclk_mmc1, | ||
558 | &clk_sclk_mmc2, | ||
550 | }; | 559 | }; |
551 | 560 | ||
552 | static struct clk_lookup s5p6450_clk_lookup[] = { | 561 | static struct clk_lookup s5p6450_clk_lookup[] = { |
@@ -555,6 +564,9 @@ static struct clk_lookup s5p6450_clk_lookup[] = { | |||
555 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | 564 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), |
556 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | 565 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), |
557 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | 566 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), |
567 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | ||
568 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | ||
569 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | ||
558 | }; | 570 | }; |
559 | 571 | ||
560 | /* Clock initialization code */ | 572 | /* Clock initialization code */ |
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 0d50e79fb9fc..52b89a376447 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
41 | #include <plat/devs.h> | 41 | #include <plat/devs.h> |
42 | #include <plat/pm.h> | 42 | #include <plat/pm.h> |
43 | #include <plat/sdhci.h> | ||
43 | #include <plat/adc-core.h> | 44 | #include <plat/adc-core.h> |
44 | #include <plat/fb-core.h> | 45 | #include <plat/fb-core.h> |
45 | #include <plat/gpio-cfg.h> | 46 | #include <plat/gpio-cfg.h> |
@@ -181,6 +182,10 @@ void __init s5p6440_map_io(void) | |||
181 | s3c_adc_setname("s3c64xx-adc"); | 182 | s3c_adc_setname("s3c64xx-adc"); |
182 | s3c_fb_setname("s5p64x0-fb"); | 183 | s3c_fb_setname("s5p64x0-fb"); |
183 | 184 | ||
185 | s5p64x0_default_sdhci0(); | ||
186 | s5p64x0_default_sdhci1(); | ||
187 | s5p6440_default_sdhci2(); | ||
188 | |||
184 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); | 189 | iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); |
185 | init_consistent_dma_size(SZ_8M); | 190 | init_consistent_dma_size(SZ_8M); |
186 | } | 191 | } |
@@ -191,6 +196,10 @@ void __init s5p6450_map_io(void) | |||
191 | s3c_adc_setname("s3c64xx-adc"); | 196 | s3c_adc_setname("s3c64xx-adc"); |
192 | s3c_fb_setname("s5p64x0-fb"); | 197 | s3c_fb_setname("s5p64x0-fb"); |
193 | 198 | ||
199 | s5p64x0_default_sdhci0(); | ||
200 | s5p64x0_default_sdhci1(); | ||
201 | s5p6450_default_sdhci2(); | ||
202 | |||
194 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); | 203 | iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); |
195 | init_consistent_dma_size(SZ_8M); | 204 | init_consistent_dma_size(SZ_8M); |
196 | } | 205 | } |
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 34d98a1dae57..a40e325d62c8 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
26 | #include <linux/fb.h> | 26 | #include <linux/fb.h> |
27 | #include <linux/mmc/host.h> | ||
27 | 28 | ||
28 | #include <video/platform_lcd.h> | 29 | #include <video/platform_lcd.h> |
29 | 30 | ||
@@ -52,6 +53,7 @@ | |||
52 | #include <plat/backlight.h> | 53 | #include <plat/backlight.h> |
53 | #include <plat/fb.h> | 54 | #include <plat/fb.h> |
54 | #include <plat/regs-fb.h> | 55 | #include <plat/regs-fb.h> |
56 | #include <plat/sdhci.h> | ||
55 | 57 | ||
56 | #include "common.h" | 58 | #include "common.h" |
57 | 59 | ||
@@ -163,6 +165,25 @@ static struct platform_device *smdk6440_devices[] __initdata = { | |||
163 | &s5p6440_device_iis, | 165 | &s5p6440_device_iis, |
164 | &s3c_device_fb, | 166 | &s3c_device_fb, |
165 | &smdk6440_lcd_lte480wv, | 167 | &smdk6440_lcd_lte480wv, |
168 | &s3c_device_hsmmc0, | ||
169 | &s3c_device_hsmmc1, | ||
170 | &s3c_device_hsmmc2, | ||
171 | }; | ||
172 | |||
173 | static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = { | ||
174 | .cd_type = S3C_SDHCI_CD_NONE, | ||
175 | }; | ||
176 | |||
177 | static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = { | ||
178 | .cd_type = S3C_SDHCI_CD_INTERNAL, | ||
179 | #if defined(CONFIG_S5P64X0_SD_CH1_8BIT) | ||
180 | .max_width = 8, | ||
181 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
182 | #endif | ||
183 | }; | ||
184 | |||
185 | static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = { | ||
186 | .cd_type = S3C_SDHCI_CD_NONE, | ||
166 | }; | 187 | }; |
167 | 188 | ||
168 | static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { | 189 | static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { |
@@ -236,6 +257,10 @@ static void __init smdk6440_machine_init(void) | |||
236 | s5p6440_set_lcd_interface(); | 257 | s5p6440_set_lcd_interface(); |
237 | s3c_fb_set_platdata(&smdk6440_lcd_pdata); | 258 | s3c_fb_set_platdata(&smdk6440_lcd_pdata); |
238 | 259 | ||
260 | s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata); | ||
261 | s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata); | ||
262 | s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata); | ||
263 | |||
239 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); | 264 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); |
240 | } | 265 | } |
241 | 266 | ||
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index 135cf5d84737..efb69e2f2afe 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/pwm_backlight.h> | 25 | #include <linux/pwm_backlight.h> |
26 | #include <linux/fb.h> | 26 | #include <linux/fb.h> |
27 | #include <linux/mmc/host.h> | ||
27 | 28 | ||
28 | #include <video/platform_lcd.h> | 29 | #include <video/platform_lcd.h> |
29 | 30 | ||
@@ -52,6 +53,7 @@ | |||
52 | #include <plat/backlight.h> | 53 | #include <plat/backlight.h> |
53 | #include <plat/fb.h> | 54 | #include <plat/fb.h> |
54 | #include <plat/regs-fb.h> | 55 | #include <plat/regs-fb.h> |
56 | #include <plat/sdhci.h> | ||
55 | 57 | ||
56 | #include "common.h" | 58 | #include "common.h" |
57 | 59 | ||
@@ -181,10 +183,28 @@ static struct platform_device *smdk6450_devices[] __initdata = { | |||
181 | &s5p6450_device_iis0, | 183 | &s5p6450_device_iis0, |
182 | &s3c_device_fb, | 184 | &s3c_device_fb, |
183 | &smdk6450_lcd_lte480wv, | 185 | &smdk6450_lcd_lte480wv, |
184 | 186 | &s3c_device_hsmmc0, | |
187 | &s3c_device_hsmmc1, | ||
188 | &s3c_device_hsmmc2, | ||
185 | /* s5p6450_device_spi0 will be added */ | 189 | /* s5p6450_device_spi0 will be added */ |
186 | }; | 190 | }; |
187 | 191 | ||
192 | static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = { | ||
193 | .cd_type = S3C_SDHCI_CD_NONE, | ||
194 | }; | ||
195 | |||
196 | static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = { | ||
197 | .cd_type = S3C_SDHCI_CD_NONE, | ||
198 | #if defined(CONFIG_S5P64X0_SD_CH1_8BIT) | ||
199 | .max_width = 8, | ||
200 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
201 | #endif | ||
202 | }; | ||
203 | |||
204 | static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = { | ||
205 | .cd_type = S3C_SDHCI_CD_NONE, | ||
206 | }; | ||
207 | |||
188 | static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { | 208 | static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { |
189 | .flags = 0, | 209 | .flags = 0, |
190 | .slave_addr = 0x10, | 210 | .slave_addr = 0x10, |
@@ -256,6 +276,10 @@ static void __init smdk6450_machine_init(void) | |||
256 | s5p6450_set_lcd_interface(); | 276 | s5p6450_set_lcd_interface(); |
257 | s3c_fb_set_platdata(&smdk6450_lcd_pdata); | 277 | s3c_fb_set_platdata(&smdk6450_lcd_pdata); |
258 | 278 | ||
279 | s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata); | ||
280 | s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata); | ||
281 | s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata); | ||
282 | |||
259 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); | 283 | platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); |
260 | } | 284 | } |
261 | 285 | ||
diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c new file mode 100644 index 000000000000..8410af0d12bf --- /dev/null +++ b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c | |||
@@ -0,0 +1,104 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/io.h> | ||
15 | #include <linux/gpio.h> | ||
16 | |||
17 | #include <mach/regs-gpio.h> | ||
18 | #include <mach/regs-clock.h> | ||
19 | |||
20 | #include <plat/gpio-cfg.h> | ||
21 | #include <plat/sdhci.h> | ||
22 | #include <plat/cpu.h> | ||
23 | |||
24 | void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | ||
25 | { | ||
26 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
27 | |||
28 | /* Set all the necessary GPG pins to special-function 2 */ | ||
29 | if (soc_is_s5p6450()) | ||
30 | s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width, | ||
31 | S3C_GPIO_SFN(2)); | ||
32 | else | ||
33 | s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width, | ||
34 | S3C_GPIO_SFN(2)); | ||
35 | |||
36 | /* Set GPG[6] pin to special-function 2 - MMC0 CDn */ | ||
37 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | ||
38 | if (soc_is_s5p6450()) { | ||
39 | s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP); | ||
40 | s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2)); | ||
41 | } else { | ||
42 | s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP); | ||
43 | s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2)); | ||
44 | } | ||
45 | } | ||
46 | } | ||
47 | |||
48 | void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | ||
49 | { | ||
50 | struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; | ||
51 | |||
52 | /* Set GPH[0:1] pins to special-function 2 - CLK and CMD */ | ||
53 | if (soc_is_s5p6450()) | ||
54 | s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2)); | ||
55 | else | ||
56 | s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2)); | ||
57 | |||
58 | switch (width) { | ||
59 | case 8: | ||
60 | /* Set data pins GPH[6:9] special-function 2 */ | ||
61 | if (soc_is_s5p6450()) | ||
62 | s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4, | ||
63 | S3C_GPIO_SFN(2)); | ||
64 | else | ||
65 | s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, | ||
66 | S3C_GPIO_SFN(2)); | ||
67 | case 4: | ||
68 | /* set data pins GPH[2:5] special-function 2 */ | ||
69 | if (soc_is_s5p6450()) | ||
70 | s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4, | ||
71 | S3C_GPIO_SFN(2)); | ||
72 | else | ||
73 | s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4, | ||
74 | S3C_GPIO_SFN(2)); | ||
75 | default: | ||
76 | break; | ||
77 | } | ||
78 | |||
79 | /* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */ | ||
80 | if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { | ||
81 | if (soc_is_s5p6450()) { | ||
82 | s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP); | ||
83 | s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3)); | ||
84 | } else { | ||
85 | s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP); | ||
86 | s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3)); | ||
87 | } | ||
88 | } | ||
89 | } | ||
90 | |||
91 | void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
92 | { | ||
93 | /* Set GPC[4:5] pins to special-function 3 - CLK and CMD */ | ||
94 | s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3)); | ||
95 | |||
96 | /* Set data pins GPH[6:9] pins to special-function 3 */ | ||
97 | s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3)); | ||
98 | } | ||
99 | |||
100 | void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
101 | { | ||
102 | /* Set all the necessary GPG pins to special-function 3 */ | ||
103 | s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3)); | ||
104 | } | ||
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c index dab3c6347a8f..d6df9f6c9f7e 100644 --- a/arch/arm/mach-sa1100/clock.c +++ b/arch/arm/mach-sa1100/clock.c | |||
@@ -11,17 +11,39 @@ | |||
11 | #include <linux/clk.h> | 11 | #include <linux/clk.h> |
12 | #include <linux/spinlock.h> | 12 | #include <linux/spinlock.h> |
13 | #include <linux/mutex.h> | 13 | #include <linux/mutex.h> |
14 | #include <linux/io.h> | ||
15 | #include <linux/clkdev.h> | ||
14 | 16 | ||
15 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
16 | 18 | ||
17 | /* | 19 | struct clkops { |
18 | * Very simple clock implementation - we only have one clock to deal with. | 20 | void (*enable)(struct clk *); |
19 | */ | 21 | void (*disable)(struct clk *); |
22 | unsigned long (*getrate)(struct clk *); | ||
23 | }; | ||
24 | |||
20 | struct clk { | 25 | struct clk { |
26 | const struct clkops *ops; | ||
27 | unsigned long rate; | ||
21 | unsigned int enabled; | 28 | unsigned int enabled; |
22 | }; | 29 | }; |
23 | 30 | ||
24 | static void clk_gpio27_enable(void) | 31 | #define INIT_CLKREG(_clk, _devname, _conname) \ |
32 | { \ | ||
33 | .clk = _clk, \ | ||
34 | .dev_id = _devname, \ | ||
35 | .con_id = _conname, \ | ||
36 | } | ||
37 | |||
38 | #define DEFINE_CLK(_name, _ops, _rate) \ | ||
39 | struct clk clk_##_name = { \ | ||
40 | .ops = _ops, \ | ||
41 | .rate = _rate, \ | ||
42 | } | ||
43 | |||
44 | static DEFINE_SPINLOCK(clocks_lock); | ||
45 | |||
46 | static void clk_gpio27_enable(struct clk *clk) | ||
25 | { | 47 | { |
26 | /* | 48 | /* |
27 | * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: | 49 | * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: |
@@ -32,38 +54,22 @@ static void clk_gpio27_enable(void) | |||
32 | TUCR = TUCR_3_6864MHz; | 54 | TUCR = TUCR_3_6864MHz; |
33 | } | 55 | } |
34 | 56 | ||
35 | static void clk_gpio27_disable(void) | 57 | static void clk_gpio27_disable(struct clk *clk) |
36 | { | 58 | { |
37 | TUCR = 0; | 59 | TUCR = 0; |
38 | GPDR &= ~GPIO_32_768kHz; | 60 | GPDR &= ~GPIO_32_768kHz; |
39 | GAFR &= ~GPIO_32_768kHz; | 61 | GAFR &= ~GPIO_32_768kHz; |
40 | } | 62 | } |
41 | 63 | ||
42 | static struct clk clk_gpio27; | ||
43 | |||
44 | static DEFINE_SPINLOCK(clocks_lock); | ||
45 | |||
46 | struct clk *clk_get(struct device *dev, const char *id) | ||
47 | { | ||
48 | const char *devname = dev_name(dev); | ||
49 | |||
50 | return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27; | ||
51 | } | ||
52 | EXPORT_SYMBOL(clk_get); | ||
53 | |||
54 | void clk_put(struct clk *clk) | ||
55 | { | ||
56 | } | ||
57 | EXPORT_SYMBOL(clk_put); | ||
58 | |||
59 | int clk_enable(struct clk *clk) | 64 | int clk_enable(struct clk *clk) |
60 | { | 65 | { |
61 | unsigned long flags; | 66 | unsigned long flags; |
62 | 67 | ||
63 | spin_lock_irqsave(&clocks_lock, flags); | 68 | spin_lock_irqsave(&clocks_lock, flags); |
64 | if (clk->enabled++ == 0) | 69 | if (clk->enabled++ == 0) |
65 | clk_gpio27_enable(); | 70 | clk->ops->enable(clk); |
66 | spin_unlock_irqrestore(&clocks_lock, flags); | 71 | spin_unlock_irqrestore(&clocks_lock, flags); |
72 | |||
67 | return 0; | 73 | return 0; |
68 | } | 74 | } |
69 | EXPORT_SYMBOL(clk_enable); | 75 | EXPORT_SYMBOL(clk_enable); |
@@ -76,13 +82,48 @@ void clk_disable(struct clk *clk) | |||
76 | 82 | ||
77 | spin_lock_irqsave(&clocks_lock, flags); | 83 | spin_lock_irqsave(&clocks_lock, flags); |
78 | if (--clk->enabled == 0) | 84 | if (--clk->enabled == 0) |
79 | clk_gpio27_disable(); | 85 | clk->ops->disable(clk); |
80 | spin_unlock_irqrestore(&clocks_lock, flags); | 86 | spin_unlock_irqrestore(&clocks_lock, flags); |
81 | } | 87 | } |
82 | EXPORT_SYMBOL(clk_disable); | 88 | EXPORT_SYMBOL(clk_disable); |
83 | 89 | ||
84 | unsigned long clk_get_rate(struct clk *clk) | 90 | unsigned long clk_get_rate(struct clk *clk) |
85 | { | 91 | { |
86 | return 3686400; | 92 | unsigned long rate; |
93 | |||
94 | rate = clk->rate; | ||
95 | if (clk->ops->getrate) | ||
96 | rate = clk->ops->getrate(clk); | ||
97 | |||
98 | return rate; | ||
87 | } | 99 | } |
88 | EXPORT_SYMBOL(clk_get_rate); | 100 | EXPORT_SYMBOL(clk_get_rate); |
101 | |||
102 | const struct clkops clk_gpio27_ops = { | ||
103 | .enable = clk_gpio27_enable, | ||
104 | .disable = clk_gpio27_disable, | ||
105 | }; | ||
106 | |||
107 | static void clk_dummy_enable(struct clk *clk) { } | ||
108 | static void clk_dummy_disable(struct clk *clk) { } | ||
109 | |||
110 | const struct clkops clk_dummy_ops = { | ||
111 | .enable = clk_dummy_enable, | ||
112 | .disable = clk_dummy_disable, | ||
113 | }; | ||
114 | |||
115 | static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400); | ||
116 | static DEFINE_CLK(dummy, &clk_dummy_ops, 0); | ||
117 | |||
118 | static struct clk_lookup sa11xx_clkregs[] = { | ||
119 | INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL), | ||
120 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), | ||
121 | }; | ||
122 | |||
123 | static int __init sa11xx_clk_init(void) | ||
124 | { | ||
125 | clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs)); | ||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | postcore_initcall(sa11xx_clk_init); | ||
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index bb10ee2cb89f..480d2ea46b00 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c | |||
@@ -345,9 +345,29 @@ void sa11x0_register_irda(struct irda_platform_data *irda) | |||
345 | sa11x0_register_device(&sa11x0ir_device, irda); | 345 | sa11x0_register_device(&sa11x0ir_device, irda); |
346 | } | 346 | } |
347 | 347 | ||
348 | static struct resource sa11x0rtc_resources[] = { | ||
349 | [0] = { | ||
350 | .start = 0x90010000, | ||
351 | .end = 0x900100ff, | ||
352 | .flags = IORESOURCE_MEM, | ||
353 | }, | ||
354 | [1] = { | ||
355 | .start = IRQ_RTC1Hz, | ||
356 | .end = IRQ_RTC1Hz, | ||
357 | .flags = IORESOURCE_IRQ, | ||
358 | }, | ||
359 | [2] = { | ||
360 | .start = IRQ_RTCAlrm, | ||
361 | .end = IRQ_RTCAlrm, | ||
362 | .flags = IORESOURCE_IRQ, | ||
363 | }, | ||
364 | }; | ||
365 | |||
348 | static struct platform_device sa11x0rtc_device = { | 366 | static struct platform_device sa11x0rtc_device = { |
349 | .name = "sa1100-rtc", | 367 | .name = "sa1100-rtc", |
350 | .id = -1, | 368 | .id = -1, |
369 | .resource = sa11x0rtc_resources, | ||
370 | .num_resources = ARRAY_SIZE(sa11x0rtc_resources), | ||
351 | }; | 371 | }; |
352 | 372 | ||
353 | static struct platform_device *sa11x0_devices[] __initdata = { | 373 | static struct platform_device *sa11x0_devices[] __initdata = { |
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 94cf70afb236..f75946c3293d 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h | |||
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data { | |||
96 | */ | 96 | */ |
97 | u8 wires; /* Used for the MMC driver on omap1 and 2420 */ | 97 | u8 wires; /* Used for the MMC driver on omap1 and 2420 */ |
98 | u32 caps; /* Used for the MMC driver on 2430 and later */ | 98 | u32 caps; /* Used for the MMC driver on 2430 and later */ |
99 | u32 pm_caps; /* PM capabilities of the mmc */ | ||
99 | 100 | ||
100 | /* | 101 | /* |
101 | * nomux means "standard" muxing is wrong on this board, and | 102 | * nomux means "standard" muxing is wrong on this board, and |
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index c616385f27bd..dc864b580da0 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data); | |||
100 | 100 | ||
101 | extern void usbhs_init(const struct usbhs_omap_board_data *pdata); | 101 | extern void usbhs_init(const struct usbhs_omap_board_data *pdata); |
102 | 102 | ||
103 | extern int omap_usbhs_enable(struct device *dev); | ||
104 | extern void omap_usbhs_disable(struct device *dev); | ||
105 | |||
106 | extern int omap4430_phy_power(struct device *dev, int ID, int on); | 103 | extern int omap4430_phy_power(struct device *dev, int ID, int on); |
107 | extern int omap4430_phy_set_clk(struct device *dev, int on); | 104 | extern int omap4430_phy_set_clk(struct device *dev, int on); |
108 | extern int omap4430_phy_init(struct device *dev); | 105 | extern int omap4430_phy_init(struct device *dev); |
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h deleted file mode 100644 index b6390beff323..000000000000 --- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | #ifndef __PLAT_PXA_GPIO_H | ||
2 | #define __PLAT_PXA_GPIO_H | ||
3 | |||
4 | struct irq_data; | ||
5 | |||
6 | /* | ||
7 | * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with | ||
8 | * one set of registers. The register offsets are organized below: | ||
9 | * | ||
10 | * GPLR GPDR GPSR GPCR GRER GFER GEDR | ||
11 | * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048 | ||
12 | * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C | ||
13 | * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050 | ||
14 | * | ||
15 | * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148 | ||
16 | * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C | ||
17 | * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150 | ||
18 | * | ||
19 | * NOTE: | ||
20 | * BANK 3 is only available on PXA27x and later processors. | ||
21 | * BANK 4 and 5 are only available on PXA935 | ||
22 | */ | ||
23 | |||
24 | #define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n)) | ||
25 | |||
26 | #define GPLR_OFFSET 0x00 | ||
27 | #define GPDR_OFFSET 0x0C | ||
28 | #define GPSR_OFFSET 0x18 | ||
29 | #define GPCR_OFFSET 0x24 | ||
30 | #define GRER_OFFSET 0x30 | ||
31 | #define GFER_OFFSET 0x3C | ||
32 | #define GEDR_OFFSET 0x48 | ||
33 | |||
34 | /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). | ||
35 | * Those cases currently cause holes in the GPIO number space, the | ||
36 | * actual number of the last GPIO is recorded by 'pxa_last_gpio'. | ||
37 | */ | ||
38 | extern int pxa_last_gpio; | ||
39 | |||
40 | typedef int (*set_wake_t)(struct irq_data *d, unsigned int on); | ||
41 | |||
42 | extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn); | ||
43 | |||
44 | #endif /* __PLAT_PXA_GPIO_H */ | ||
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h deleted file mode 100644 index 258f77210b02..000000000000 --- a/arch/arm/plat-pxa/include/plat/gpio.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | #ifndef __PLAT_GPIO_H | ||
2 | #define __PLAT_GPIO_H | ||
3 | |||
4 | #define __ARM_GPIOLIB_COMPLEX | ||
5 | |||
6 | /* The individual machine provides register offsets and NR_BUILTIN_GPIO */ | ||
7 | #include <mach/gpio-pxa.h> | ||
8 | |||
9 | static inline int gpio_get_value(unsigned gpio) | ||
10 | { | ||
11 | if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) | ||
12 | return GPLR(gpio) & GPIO_bit(gpio); | ||
13 | else | ||
14 | return __gpio_get_value(gpio); | ||
15 | } | ||
16 | |||
17 | static inline void gpio_set_value(unsigned gpio, int value) | ||
18 | { | ||
19 | if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) { | ||
20 | if (value) | ||
21 | GPSR(gpio) = GPIO_bit(gpio); | ||
22 | else | ||
23 | GPCR(gpio) = GPIO_bit(gpio); | ||
24 | } else | ||
25 | __gpio_set_value(gpio, value); | ||
26 | } | ||
27 | |||
28 | #define gpio_cansleep __gpio_cansleep | ||
29 | |||
30 | #endif /* __PLAT_GPIO_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 83b1e31696d9..4214ea0ff8fe 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -123,6 +123,7 @@ extern struct platform_device exynos4_device_dwmci; | |||
123 | extern struct platform_device exynos4_device_i2s0; | 123 | extern struct platform_device exynos4_device_i2s0; |
124 | extern struct platform_device exynos4_device_i2s1; | 124 | extern struct platform_device exynos4_device_i2s1; |
125 | extern struct platform_device exynos4_device_i2s2; | 125 | extern struct platform_device exynos4_device_i2s2; |
126 | extern struct platform_device exynos4_device_ohci; | ||
126 | extern struct platform_device exynos4_device_pcm0; | 127 | extern struct platform_device exynos4_device_pcm0; |
127 | extern struct platform_device exynos4_device_pcm1; | 128 | extern struct platform_device exynos4_device_pcm1; |
128 | extern struct platform_device exynos4_device_pcm2; | 129 | extern struct platform_device exynos4_device_pcm2; |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index dcff7dd1ae8a..656dc00d30ed 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -123,6 +123,10 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | |||
123 | extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 123 | extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
124 | extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 124 | extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
125 | extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | 125 | extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); |
126 | extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
127 | extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
128 | extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
129 | extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
126 | 130 | ||
127 | /* S3C2416 SDHCI setup */ | 131 | /* S3C2416 SDHCI setup */ |
128 | 132 | ||
@@ -146,6 +150,7 @@ static inline void s3c2416_default_sdhci0(void) { } | |||
146 | static inline void s3c2416_default_sdhci1(void) { } | 150 | static inline void s3c2416_default_sdhci1(void) { } |
147 | 151 | ||
148 | #endif /* CONFIG_S3C2416_SETUP_SDHCI */ | 152 | #endif /* CONFIG_S3C2416_SETUP_SDHCI */ |
153 | |||
149 | /* S3C64XX SDHCI setup */ | 154 | /* S3C64XX SDHCI setup */ |
150 | 155 | ||
151 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 156 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
@@ -201,6 +206,45 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
201 | 206 | ||
202 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ | 207 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ |
203 | 208 | ||
209 | /* S5P64X0 SDHCI setup */ | ||
210 | |||
211 | #ifdef CONFIG_S5P64X0_SETUP_SDHCI | ||
212 | static inline void s5p64x0_default_sdhci0(void) | ||
213 | { | ||
214 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
215 | s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio; | ||
216 | #endif | ||
217 | } | ||
218 | |||
219 | static inline void s5p64x0_default_sdhci1(void) | ||
220 | { | ||
221 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
222 | s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio; | ||
223 | #endif | ||
224 | } | ||
225 | |||
226 | static inline void s5p6440_default_sdhci2(void) | ||
227 | { | ||
228 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
229 | s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio; | ||
230 | #endif | ||
231 | } | ||
232 | |||
233 | static inline void s5p6450_default_sdhci2(void) | ||
234 | { | ||
235 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
236 | s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio; | ||
237 | #endif | ||
238 | } | ||
239 | |||
240 | #else | ||
241 | static inline void s5p64x0_default_sdhci0(void) { } | ||
242 | static inline void s5p64x0_default_sdhci1(void) { } | ||
243 | static inline void s5p6440_default_sdhci2(void) { } | ||
244 | static inline void s5p6450_default_sdhci2(void) { } | ||
245 | |||
246 | #endif /* CONFIG_S5P64X0_SETUP_SDHCI */ | ||
247 | |||
204 | /* S5PC100 SDHCI setup */ | 248 | /* S5PC100 SDHCI setup */ |
205 | 249 | ||
206 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 250 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 5099681cf503..e3380137b05b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -141,6 +141,12 @@ config GPIO_PL061 | |||
141 | help | 141 | help |
142 | Say yes here to support the PrimeCell PL061 GPIO device | 142 | Say yes here to support the PrimeCell PL061 GPIO device |
143 | 143 | ||
144 | config GPIO_PXA | ||
145 | bool "PXA GPIO support" | ||
146 | depends on ARCH_PXA || ARCH_MMP | ||
147 | help | ||
148 | Say yes here to support the PXA GPIO device | ||
149 | |||
144 | config GPIO_XILINX | 150 | config GPIO_XILINX |
145 | bool "Xilinx GPIO support" | 151 | bool "Xilinx GPIO support" |
146 | depends on PPC_OF || MICROBLAZE | 152 | depends on PPC_OF || MICROBLAZE |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 4e018d6a7639..8ef9e9abe970 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o | |||
40 | obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o | 40 | obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o |
41 | obj-$(CONFIG_GPIO_PCH) += gpio-pch.o | 41 | obj-$(CONFIG_GPIO_PCH) += gpio-pch.o |
42 | obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o | 42 | obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o |
43 | obj-$(CONFIG_PLAT_PXA) += gpio-pxa.o | 43 | obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o |
44 | obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o | 44 | obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o |
45 | obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o | 45 | obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o |
46 | obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o | 46 | obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o |
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index ee137712f9db..b2d3ee1d183a 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c | |||
@@ -11,14 +11,46 @@ | |||
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/clk.h> | ||
15 | #include <linux/err.h> | ||
14 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/gpio-pxa.h> | ||
15 | #include <linux/init.h> | 18 | #include <linux/init.h> |
16 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
17 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <linux/platform_device.h> | ||
18 | #include <linux/syscore_ops.h> | 22 | #include <linux/syscore_ops.h> |
19 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
20 | 24 | ||
21 | #include <mach/gpio-pxa.h> | 25 | /* |
26 | * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with | ||
27 | * one set of registers. The register offsets are organized below: | ||
28 | * | ||
29 | * GPLR GPDR GPSR GPCR GRER GFER GEDR | ||
30 | * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048 | ||
31 | * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C | ||
32 | * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050 | ||
33 | * | ||
34 | * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148 | ||
35 | * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C | ||
36 | * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150 | ||
37 | * | ||
38 | * NOTE: | ||
39 | * BANK 3 is only available on PXA27x and later processors. | ||
40 | * BANK 4 and 5 are only available on PXA935 | ||
41 | */ | ||
42 | |||
43 | #define GPLR_OFFSET 0x00 | ||
44 | #define GPDR_OFFSET 0x0C | ||
45 | #define GPSR_OFFSET 0x18 | ||
46 | #define GPCR_OFFSET 0x24 | ||
47 | #define GRER_OFFSET 0x30 | ||
48 | #define GFER_OFFSET 0x3C | ||
49 | #define GEDR_OFFSET 0x48 | ||
50 | #define GAFR_OFFSET 0x54 | ||
51 | #define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */ | ||
52 | |||
53 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | ||
22 | 54 | ||
23 | int pxa_last_gpio; | 55 | int pxa_last_gpio; |
24 | 56 | ||
@@ -39,8 +71,20 @@ struct pxa_gpio_chip { | |||
39 | #endif | 71 | #endif |
40 | }; | 72 | }; |
41 | 73 | ||
74 | enum { | ||
75 | PXA25X_GPIO = 0, | ||
76 | PXA26X_GPIO, | ||
77 | PXA27X_GPIO, | ||
78 | PXA3XX_GPIO, | ||
79 | PXA93X_GPIO, | ||
80 | MMP_GPIO = 0x10, | ||
81 | MMP2_GPIO, | ||
82 | }; | ||
83 | |||
42 | static DEFINE_SPINLOCK(gpio_lock); | 84 | static DEFINE_SPINLOCK(gpio_lock); |
43 | static struct pxa_gpio_chip *pxa_gpio_chips; | 85 | static struct pxa_gpio_chip *pxa_gpio_chips; |
86 | static int gpio_type; | ||
87 | static void __iomem *gpio_reg_base; | ||
44 | 88 | ||
45 | #define for_each_gpio_chip(i, c) \ | 89 | #define for_each_gpio_chip(i, c) \ |
46 | for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) | 90 | for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) |
@@ -55,6 +99,122 @@ static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio) | |||
55 | return &pxa_gpio_chips[gpio_to_bank(gpio)]; | 99 | return &pxa_gpio_chips[gpio_to_bank(gpio)]; |
56 | } | 100 | } |
57 | 101 | ||
102 | static inline int gpio_is_pxa_type(int type) | ||
103 | { | ||
104 | return (type & MMP_GPIO) == 0; | ||
105 | } | ||
106 | |||
107 | static inline int gpio_is_mmp_type(int type) | ||
108 | { | ||
109 | return (type & MMP_GPIO) != 0; | ||
110 | } | ||
111 | |||
112 | /* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted, | ||
113 | * as well as their Alternate Function value being '1' for GPIO in GAFRx. | ||
114 | */ | ||
115 | static inline int __gpio_is_inverted(int gpio) | ||
116 | { | ||
117 | if ((gpio_type == PXA26X_GPIO) && (gpio > 85)) | ||
118 | return 1; | ||
119 | return 0; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate | ||
124 | * function of a GPIO, and GPDRx cannot be altered once configured. It | ||
125 | * is attributed as "occupied" here (I know this terminology isn't | ||
126 | * accurate, you are welcome to propose a better one :-) | ||
127 | */ | ||
128 | static inline int __gpio_is_occupied(unsigned gpio) | ||
129 | { | ||
130 | struct pxa_gpio_chip *pxachip; | ||
131 | void __iomem *base; | ||
132 | unsigned long gafr = 0, gpdr = 0; | ||
133 | int ret, af = 0, dir = 0; | ||
134 | |||
135 | pxachip = gpio_to_pxachip(gpio); | ||
136 | base = gpio_chip_base(&pxachip->chip); | ||
137 | gpdr = readl_relaxed(base + GPDR_OFFSET); | ||
138 | |||
139 | switch (gpio_type) { | ||
140 | case PXA25X_GPIO: | ||
141 | case PXA26X_GPIO: | ||
142 | case PXA27X_GPIO: | ||
143 | gafr = readl_relaxed(base + GAFR_OFFSET); | ||
144 | af = (gafr >> ((gpio & 0xf) * 2)) & 0x3; | ||
145 | dir = gpdr & GPIO_bit(gpio); | ||
146 | |||
147 | if (__gpio_is_inverted(gpio)) | ||
148 | ret = (af != 1) || (dir == 0); | ||
149 | else | ||
150 | ret = (af != 0) || (dir != 0); | ||
151 | break; | ||
152 | default: | ||
153 | ret = gpdr & GPIO_bit(gpio); | ||
154 | break; | ||
155 | } | ||
156 | return ret; | ||
157 | } | ||
158 | |||
159 | #ifdef CONFIG_ARCH_PXA | ||
160 | static inline int __pxa_gpio_to_irq(int gpio) | ||
161 | { | ||
162 | if (gpio_is_pxa_type(gpio_type)) | ||
163 | return PXA_GPIO_TO_IRQ(gpio); | ||
164 | return -1; | ||
165 | } | ||
166 | |||
167 | static inline int __pxa_irq_to_gpio(int irq) | ||
168 | { | ||
169 | if (gpio_is_pxa_type(gpio_type)) | ||
170 | return irq - PXA_GPIO_TO_IRQ(0); | ||
171 | return -1; | ||
172 | } | ||
173 | #else | ||
174 | static inline int __pxa_gpio_to_irq(int gpio) { return -1; } | ||
175 | static inline int __pxa_irq_to_gpio(int irq) { return -1; } | ||
176 | #endif | ||
177 | |||
178 | #ifdef CONFIG_ARCH_MMP | ||
179 | static inline int __mmp_gpio_to_irq(int gpio) | ||
180 | { | ||
181 | if (gpio_is_mmp_type(gpio_type)) | ||
182 | return MMP_GPIO_TO_IRQ(gpio); | ||
183 | return -1; | ||
184 | } | ||
185 | |||
186 | static inline int __mmp_irq_to_gpio(int irq) | ||
187 | { | ||
188 | if (gpio_is_mmp_type(gpio_type)) | ||
189 | return irq - MMP_GPIO_TO_IRQ(0); | ||
190 | return -1; | ||
191 | } | ||
192 | #else | ||
193 | static inline int __mmp_gpio_to_irq(int gpio) { return -1; } | ||
194 | static inline int __mmp_irq_to_gpio(int irq) { return -1; } | ||
195 | #endif | ||
196 | |||
197 | static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
198 | { | ||
199 | int gpio, ret; | ||
200 | |||
201 | gpio = chip->base + offset; | ||
202 | ret = __pxa_gpio_to_irq(gpio); | ||
203 | if (ret >= 0) | ||
204 | return ret; | ||
205 | return __mmp_gpio_to_irq(gpio); | ||
206 | } | ||
207 | |||
208 | int pxa_irq_to_gpio(int irq) | ||
209 | { | ||
210 | int ret; | ||
211 | |||
212 | ret = __pxa_irq_to_gpio(irq); | ||
213 | if (ret >= 0) | ||
214 | return ret; | ||
215 | return __mmp_irq_to_gpio(irq); | ||
216 | } | ||
217 | |||
58 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 218 | static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
59 | { | 219 | { |
60 | void __iomem *base = gpio_chip_base(chip); | 220 | void __iomem *base = gpio_chip_base(chip); |
@@ -63,12 +223,12 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
63 | 223 | ||
64 | spin_lock_irqsave(&gpio_lock, flags); | 224 | spin_lock_irqsave(&gpio_lock, flags); |
65 | 225 | ||
66 | value = __raw_readl(base + GPDR_OFFSET); | 226 | value = readl_relaxed(base + GPDR_OFFSET); |
67 | if (__gpio_is_inverted(chip->base + offset)) | 227 | if (__gpio_is_inverted(chip->base + offset)) |
68 | value |= mask; | 228 | value |= mask; |
69 | else | 229 | else |
70 | value &= ~mask; | 230 | value &= ~mask; |
71 | __raw_writel(value, base + GPDR_OFFSET); | 231 | writel_relaxed(value, base + GPDR_OFFSET); |
72 | 232 | ||
73 | spin_unlock_irqrestore(&gpio_lock, flags); | 233 | spin_unlock_irqrestore(&gpio_lock, flags); |
74 | return 0; | 234 | return 0; |
@@ -81,16 +241,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip, | |||
81 | uint32_t tmp, mask = 1 << offset; | 241 | uint32_t tmp, mask = 1 << offset; |
82 | unsigned long flags; | 242 | unsigned long flags; |
83 | 243 | ||
84 | __raw_writel(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); | 244 | writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); |
85 | 245 | ||
86 | spin_lock_irqsave(&gpio_lock, flags); | 246 | spin_lock_irqsave(&gpio_lock, flags); |
87 | 247 | ||
88 | tmp = __raw_readl(base + GPDR_OFFSET); | 248 | tmp = readl_relaxed(base + GPDR_OFFSET); |
89 | if (__gpio_is_inverted(chip->base + offset)) | 249 | if (__gpio_is_inverted(chip->base + offset)) |
90 | tmp &= ~mask; | 250 | tmp &= ~mask; |
91 | else | 251 | else |
92 | tmp |= mask; | 252 | tmp |= mask; |
93 | __raw_writel(tmp, base + GPDR_OFFSET); | 253 | writel_relaxed(tmp, base + GPDR_OFFSET); |
94 | 254 | ||
95 | spin_unlock_irqrestore(&gpio_lock, flags); | 255 | spin_unlock_irqrestore(&gpio_lock, flags); |
96 | return 0; | 256 | return 0; |
@@ -98,16 +258,16 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip, | |||
98 | 258 | ||
99 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) | 259 | static int pxa_gpio_get(struct gpio_chip *chip, unsigned offset) |
100 | { | 260 | { |
101 | return __raw_readl(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset); | 261 | return readl_relaxed(gpio_chip_base(chip) + GPLR_OFFSET) & (1 << offset); |
102 | } | 262 | } |
103 | 263 | ||
104 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 264 | static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
105 | { | 265 | { |
106 | __raw_writel(1 << offset, gpio_chip_base(chip) + | 266 | writel_relaxed(1 << offset, gpio_chip_base(chip) + |
107 | (value ? GPSR_OFFSET : GPCR_OFFSET)); | 267 | (value ? GPSR_OFFSET : GPCR_OFFSET)); |
108 | } | 268 | } |
109 | 269 | ||
110 | static int __init pxa_init_gpio_chip(int gpio_end) | 270 | static int __devinit pxa_init_gpio_chip(int gpio_end) |
111 | { | 271 | { |
112 | int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; | 272 | int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; |
113 | struct pxa_gpio_chip *chips; | 273 | struct pxa_gpio_chip *chips; |
@@ -122,7 +282,7 @@ static int __init pxa_init_gpio_chip(int gpio_end) | |||
122 | struct gpio_chip *c = &chips[i].chip; | 282 | struct gpio_chip *c = &chips[i].chip; |
123 | 283 | ||
124 | sprintf(chips[i].label, "gpio-%d", i); | 284 | sprintf(chips[i].label, "gpio-%d", i); |
125 | chips[i].regbase = GPIO_BANK(i); | 285 | chips[i].regbase = gpio_reg_base + BANK_OFF(i); |
126 | 286 | ||
127 | c->base = gpio; | 287 | c->base = gpio; |
128 | c->label = chips[i].label; | 288 | c->label = chips[i].label; |
@@ -131,6 +291,7 @@ static int __init pxa_init_gpio_chip(int gpio_end) | |||
131 | c->direction_output = pxa_gpio_direction_output; | 291 | c->direction_output = pxa_gpio_direction_output; |
132 | c->get = pxa_gpio_get; | 292 | c->get = pxa_gpio_get; |
133 | c->set = pxa_gpio_set; | 293 | c->set = pxa_gpio_set; |
294 | c->to_irq = pxa_gpio_to_irq; | ||
134 | 295 | ||
135 | /* number of GPIOs on last bank may be less than 32 */ | 296 | /* number of GPIOs on last bank may be less than 32 */ |
136 | c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; | 297 | c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32; |
@@ -147,18 +308,18 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c) | |||
147 | { | 308 | { |
148 | uint32_t grer, gfer; | 309 | uint32_t grer, gfer; |
149 | 310 | ||
150 | grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask; | 311 | grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask; |
151 | gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask; | 312 | gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask; |
152 | grer |= c->irq_edge_rise & c->irq_mask; | 313 | grer |= c->irq_edge_rise & c->irq_mask; |
153 | gfer |= c->irq_edge_fall & c->irq_mask; | 314 | gfer |= c->irq_edge_fall & c->irq_mask; |
154 | __raw_writel(grer, c->regbase + GRER_OFFSET); | 315 | writel_relaxed(grer, c->regbase + GRER_OFFSET); |
155 | __raw_writel(gfer, c->regbase + GFER_OFFSET); | 316 | writel_relaxed(gfer, c->regbase + GFER_OFFSET); |
156 | } | 317 | } |
157 | 318 | ||
158 | static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) | 319 | static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) |
159 | { | 320 | { |
160 | struct pxa_gpio_chip *c; | 321 | struct pxa_gpio_chip *c; |
161 | int gpio = irq_to_gpio(d->irq); | 322 | int gpio = pxa_irq_to_gpio(d->irq); |
162 | unsigned long gpdr, mask = GPIO_bit(gpio); | 323 | unsigned long gpdr, mask = GPIO_bit(gpio); |
163 | 324 | ||
164 | c = gpio_to_pxachip(gpio); | 325 | c = gpio_to_pxachip(gpio); |
@@ -176,12 +337,12 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) | |||
176 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | 337 | type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; |
177 | } | 338 | } |
178 | 339 | ||
179 | gpdr = __raw_readl(c->regbase + GPDR_OFFSET); | 340 | gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); |
180 | 341 | ||
181 | if (__gpio_is_inverted(gpio)) | 342 | if (__gpio_is_inverted(gpio)) |
182 | __raw_writel(gpdr | mask, c->regbase + GPDR_OFFSET); | 343 | writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); |
183 | else | 344 | else |
184 | __raw_writel(gpdr & ~mask, c->regbase + GPDR_OFFSET); | 345 | writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); |
185 | 346 | ||
186 | if (type & IRQ_TYPE_EDGE_RISING) | 347 | if (type & IRQ_TYPE_EDGE_RISING) |
187 | c->irq_edge_rise |= mask; | 348 | c->irq_edge_rise |= mask; |
@@ -212,9 +373,9 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) | |||
212 | for_each_gpio_chip(gpio, c) { | 373 | for_each_gpio_chip(gpio, c) { |
213 | gpio_base = c->chip.base; | 374 | gpio_base = c->chip.base; |
214 | 375 | ||
215 | gedr = __raw_readl(c->regbase + GEDR_OFFSET); | 376 | gedr = readl_relaxed(c->regbase + GEDR_OFFSET); |
216 | gedr = gedr & c->irq_mask; | 377 | gedr = gedr & c->irq_mask; |
217 | __raw_writel(gedr, c->regbase + GEDR_OFFSET); | 378 | writel_relaxed(gedr, c->regbase + GEDR_OFFSET); |
218 | 379 | ||
219 | n = find_first_bit(&gedr, BITS_PER_LONG); | 380 | n = find_first_bit(&gedr, BITS_PER_LONG); |
220 | while (n < BITS_PER_LONG) { | 381 | while (n < BITS_PER_LONG) { |
@@ -229,29 +390,29 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) | |||
229 | 390 | ||
230 | static void pxa_ack_muxed_gpio(struct irq_data *d) | 391 | static void pxa_ack_muxed_gpio(struct irq_data *d) |
231 | { | 392 | { |
232 | int gpio = irq_to_gpio(d->irq); | 393 | int gpio = pxa_irq_to_gpio(d->irq); |
233 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 394 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); |
234 | 395 | ||
235 | __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); | 396 | writel_relaxed(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); |
236 | } | 397 | } |
237 | 398 | ||
238 | static void pxa_mask_muxed_gpio(struct irq_data *d) | 399 | static void pxa_mask_muxed_gpio(struct irq_data *d) |
239 | { | 400 | { |
240 | int gpio = irq_to_gpio(d->irq); | 401 | int gpio = pxa_irq_to_gpio(d->irq); |
241 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 402 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); |
242 | uint32_t grer, gfer; | 403 | uint32_t grer, gfer; |
243 | 404 | ||
244 | c->irq_mask &= ~GPIO_bit(gpio); | 405 | c->irq_mask &= ~GPIO_bit(gpio); |
245 | 406 | ||
246 | grer = __raw_readl(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); | 407 | grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~GPIO_bit(gpio); |
247 | gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); | 408 | gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~GPIO_bit(gpio); |
248 | __raw_writel(grer, c->regbase + GRER_OFFSET); | 409 | writel_relaxed(grer, c->regbase + GRER_OFFSET); |
249 | __raw_writel(gfer, c->regbase + GFER_OFFSET); | 410 | writel_relaxed(gfer, c->regbase + GFER_OFFSET); |
250 | } | 411 | } |
251 | 412 | ||
252 | static void pxa_unmask_muxed_gpio(struct irq_data *d) | 413 | static void pxa_unmask_muxed_gpio(struct irq_data *d) |
253 | { | 414 | { |
254 | int gpio = irq_to_gpio(d->irq); | 415 | int gpio = pxa_irq_to_gpio(d->irq); |
255 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); | 416 | struct pxa_gpio_chip *c = gpio_to_pxachip(gpio); |
256 | 417 | ||
257 | c->irq_mask |= GPIO_bit(gpio); | 418 | c->irq_mask |= GPIO_bit(gpio); |
@@ -266,34 +427,143 @@ static struct irq_chip pxa_muxed_gpio_chip = { | |||
266 | .irq_set_type = pxa_gpio_irq_type, | 427 | .irq_set_type = pxa_gpio_irq_type, |
267 | }; | 428 | }; |
268 | 429 | ||
269 | void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) | 430 | static int pxa_gpio_nums(void) |
270 | { | 431 | { |
271 | struct pxa_gpio_chip *c; | 432 | int count = 0; |
272 | int gpio, irq; | 433 | |
434 | #ifdef CONFIG_ARCH_PXA | ||
435 | if (cpu_is_pxa25x()) { | ||
436 | #ifdef CONFIG_CPU_PXA26x | ||
437 | count = 89; | ||
438 | gpio_type = PXA26X_GPIO; | ||
439 | #elif defined(CONFIG_PXA25x) | ||
440 | count = 84; | ||
441 | gpio_type = PXA26X_GPIO; | ||
442 | #endif /* CONFIG_CPU_PXA26x */ | ||
443 | } else if (cpu_is_pxa27x()) { | ||
444 | count = 120; | ||
445 | gpio_type = PXA27X_GPIO; | ||
446 | } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) { | ||
447 | count = 191; | ||
448 | gpio_type = PXA93X_GPIO; | ||
449 | } else if (cpu_is_pxa3xx()) { | ||
450 | count = 127; | ||
451 | gpio_type = PXA3XX_GPIO; | ||
452 | } | ||
453 | #endif /* CONFIG_ARCH_PXA */ | ||
454 | |||
455 | #ifdef CONFIG_ARCH_MMP | ||
456 | if (cpu_is_pxa168() || cpu_is_pxa910()) { | ||
457 | count = 127; | ||
458 | gpio_type = MMP_GPIO; | ||
459 | } else if (cpu_is_mmp2()) { | ||
460 | count = 191; | ||
461 | gpio_type = MMP2_GPIO; | ||
462 | } | ||
463 | #endif /* CONFIG_ARCH_MMP */ | ||
464 | return count; | ||
465 | } | ||
273 | 466 | ||
274 | pxa_last_gpio = end; | 467 | static int __devinit pxa_gpio_probe(struct platform_device *pdev) |
468 | { | ||
469 | struct pxa_gpio_chip *c; | ||
470 | struct resource *res; | ||
471 | struct clk *clk; | ||
472 | int gpio, irq, ret; | ||
473 | int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0; | ||
474 | |||
475 | pxa_last_gpio = pxa_gpio_nums(); | ||
476 | if (!pxa_last_gpio) | ||
477 | return -EINVAL; | ||
478 | |||
479 | irq0 = platform_get_irq_byname(pdev, "gpio0"); | ||
480 | irq1 = platform_get_irq_byname(pdev, "gpio1"); | ||
481 | irq_mux = platform_get_irq_byname(pdev, "gpio_mux"); | ||
482 | if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0) | ||
483 | || (irq_mux <= 0)) | ||
484 | return -EINVAL; | ||
485 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
486 | if (!res) | ||
487 | return -EINVAL; | ||
488 | gpio_reg_base = ioremap(res->start, resource_size(res)); | ||
489 | if (!gpio_reg_base) | ||
490 | return -EINVAL; | ||
491 | |||
492 | if (irq0 > 0) | ||
493 | gpio_offset = 2; | ||
494 | |||
495 | clk = clk_get(&pdev->dev, NULL); | ||
496 | if (IS_ERR(clk)) { | ||
497 | dev_err(&pdev->dev, "Error %ld to get gpio clock\n", | ||
498 | PTR_ERR(clk)); | ||
499 | iounmap(gpio_reg_base); | ||
500 | return PTR_ERR(clk); | ||
501 | } | ||
502 | ret = clk_prepare(clk); | ||
503 | if (ret) { | ||
504 | clk_put(clk); | ||
505 | iounmap(gpio_reg_base); | ||
506 | return ret; | ||
507 | } | ||
508 | ret = clk_enable(clk); | ||
509 | if (ret) { | ||
510 | clk_unprepare(clk); | ||
511 | clk_put(clk); | ||
512 | iounmap(gpio_reg_base); | ||
513 | return ret; | ||
514 | } | ||
275 | 515 | ||
276 | /* Initialize GPIO chips */ | 516 | /* Initialize GPIO chips */ |
277 | pxa_init_gpio_chip(end); | 517 | pxa_init_gpio_chip(pxa_last_gpio); |
278 | 518 | ||
279 | /* clear all GPIO edge detects */ | 519 | /* clear all GPIO edge detects */ |
280 | for_each_gpio_chip(gpio, c) { | 520 | for_each_gpio_chip(gpio, c) { |
281 | __raw_writel(0, c->regbase + GFER_OFFSET); | 521 | writel_relaxed(0, c->regbase + GFER_OFFSET); |
282 | __raw_writel(0, c->regbase + GRER_OFFSET); | 522 | writel_relaxed(0, c->regbase + GRER_OFFSET); |
283 | __raw_writel(~0,c->regbase + GEDR_OFFSET); | 523 | writel_relaxed(~0,c->regbase + GEDR_OFFSET); |
524 | /* unmask GPIO edge detect for AP side */ | ||
525 | if (gpio_is_mmp_type(gpio_type)) | ||
526 | writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); | ||
284 | } | 527 | } |
285 | 528 | ||
286 | for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { | 529 | #ifdef CONFIG_ARCH_PXA |
530 | irq = gpio_to_irq(0); | ||
531 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | ||
532 | handle_edge_irq); | ||
533 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
534 | irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler); | ||
535 | |||
536 | irq = gpio_to_irq(1); | ||
537 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | ||
538 | handle_edge_irq); | ||
539 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
540 | irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); | ||
541 | #endif | ||
542 | |||
543 | for (irq = gpio_to_irq(gpio_offset); | ||
544 | irq <= gpio_to_irq(pxa_last_gpio); irq++) { | ||
287 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, | 545 | irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, |
288 | handle_edge_irq); | 546 | handle_edge_irq); |
289 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 547 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
290 | } | 548 | } |
291 | 549 | ||
292 | /* Install handler for GPIO>=2 edge detect interrupts */ | 550 | irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler); |
293 | irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler); | 551 | return 0; |
294 | pxa_muxed_gpio_chip.irq_set_wake = fn; | ||
295 | } | 552 | } |
296 | 553 | ||
554 | static struct platform_driver pxa_gpio_driver = { | ||
555 | .probe = pxa_gpio_probe, | ||
556 | .driver = { | ||
557 | .name = "pxa-gpio", | ||
558 | }, | ||
559 | }; | ||
560 | |||
561 | static int __init pxa_gpio_init(void) | ||
562 | { | ||
563 | return platform_driver_register(&pxa_gpio_driver); | ||
564 | } | ||
565 | postcore_initcall(pxa_gpio_init); | ||
566 | |||
297 | #ifdef CONFIG_PM | 567 | #ifdef CONFIG_PM |
298 | static int pxa_gpio_suspend(void) | 568 | static int pxa_gpio_suspend(void) |
299 | { | 569 | { |
@@ -301,13 +571,13 @@ static int pxa_gpio_suspend(void) | |||
301 | int gpio; | 571 | int gpio; |
302 | 572 | ||
303 | for_each_gpio_chip(gpio, c) { | 573 | for_each_gpio_chip(gpio, c) { |
304 | c->saved_gplr = __raw_readl(c->regbase + GPLR_OFFSET); | 574 | c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); |
305 | c->saved_gpdr = __raw_readl(c->regbase + GPDR_OFFSET); | 575 | c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); |
306 | c->saved_grer = __raw_readl(c->regbase + GRER_OFFSET); | 576 | c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET); |
307 | c->saved_gfer = __raw_readl(c->regbase + GFER_OFFSET); | 577 | c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET); |
308 | 578 | ||
309 | /* Clear GPIO transition detect bits */ | 579 | /* Clear GPIO transition detect bits */ |
310 | __raw_writel(0xffffffff, c->regbase + GEDR_OFFSET); | 580 | writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET); |
311 | } | 581 | } |
312 | return 0; | 582 | return 0; |
313 | } | 583 | } |
@@ -319,12 +589,12 @@ static void pxa_gpio_resume(void) | |||
319 | 589 | ||
320 | for_each_gpio_chip(gpio, c) { | 590 | for_each_gpio_chip(gpio, c) { |
321 | /* restore level with set/clear */ | 591 | /* restore level with set/clear */ |
322 | __raw_writel( c->saved_gplr, c->regbase + GPSR_OFFSET); | 592 | writel_relaxed( c->saved_gplr, c->regbase + GPSR_OFFSET); |
323 | __raw_writel(~c->saved_gplr, c->regbase + GPCR_OFFSET); | 593 | writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET); |
324 | 594 | ||
325 | __raw_writel(c->saved_grer, c->regbase + GRER_OFFSET); | 595 | writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET); |
326 | __raw_writel(c->saved_gfer, c->regbase + GFER_OFFSET); | 596 | writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET); |
327 | __raw_writel(c->saved_gpdr, c->regbase + GPDR_OFFSET); | 597 | writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET); |
328 | } | 598 | } |
329 | } | 599 | } |
330 | #else | 600 | #else |
@@ -336,3 +606,10 @@ struct syscore_ops pxa_gpio_syscore_ops = { | |||
336 | .suspend = pxa_gpio_suspend, | 606 | .suspend = pxa_gpio_suspend, |
337 | .resume = pxa_gpio_resume, | 607 | .resume = pxa_gpio_resume, |
338 | }; | 608 | }; |
609 | |||
610 | static int __init pxa_gpio_sysinit(void) | ||
611 | { | ||
612 | register_syscore_ops(&pxa_gpio_syscore_ops); | ||
613 | return 0; | ||
614 | } | ||
615 | postcore_initcall(pxa_gpio_sysinit); | ||
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 46b6500c5478..6381604696d3 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -558,7 +558,7 @@ static const struct i2c_algorithm tegra_i2c_algo = { | |||
558 | .functionality = tegra_i2c_func, | 558 | .functionality = tegra_i2c_func, |
559 | }; | 559 | }; |
560 | 560 | ||
561 | static int tegra_i2c_probe(struct platform_device *pdev) | 561 | static int __devinit tegra_i2c_probe(struct platform_device *pdev) |
562 | { | 562 | { |
563 | struct tegra_i2c_dev *i2c_dev; | 563 | struct tegra_i2c_dev *i2c_dev; |
564 | struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data; | 564 | struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data; |
@@ -636,7 +636,10 @@ static int tegra_i2c_probe(struct platform_device *pdev) | |||
636 | i2c_dev->bus_clk_rate = be32_to_cpup(prop); | 636 | i2c_dev->bus_clk_rate = be32_to_cpup(prop); |
637 | } | 637 | } |
638 | 638 | ||
639 | if (pdev->id == 3) | 639 | if (pdev->dev.of_node) |
640 | i2c_dev->is_dvc = of_device_is_compatible(pdev->dev.of_node, | ||
641 | "nvidia,tegra20-i2c-dvc"); | ||
642 | else if (pdev->id == 3) | ||
640 | i2c_dev->is_dvc = 1; | 643 | i2c_dev->is_dvc = 1; |
641 | init_completion(&i2c_dev->msg_complete); | 644 | init_completion(&i2c_dev->msg_complete); |
642 | 645 | ||
@@ -690,7 +693,7 @@ err_iounmap: | |||
690 | return ret; | 693 | return ret; |
691 | } | 694 | } |
692 | 695 | ||
693 | static int tegra_i2c_remove(struct platform_device *pdev) | 696 | static int __devexit tegra_i2c_remove(struct platform_device *pdev) |
694 | { | 697 | { |
695 | struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); | 698 | struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); |
696 | i2c_del_adapter(&i2c_dev->adapter); | 699 | i2c_del_adapter(&i2c_dev->adapter); |
@@ -742,6 +745,7 @@ static int tegra_i2c_resume(struct platform_device *pdev) | |||
742 | /* Match table for of_platform binding */ | 745 | /* Match table for of_platform binding */ |
743 | static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { | 746 | static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { |
744 | { .compatible = "nvidia,tegra20-i2c", }, | 747 | { .compatible = "nvidia,tegra20-i2c", }, |
748 | { .compatible = "nvidia,tegra20-i2c-dvc", }, | ||
745 | {}, | 749 | {}, |
746 | }; | 750 | }; |
747 | MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); | 751 | MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); |
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c b/drivers/input/touchscreen/zylonite-wm97xx.c index f6328c0cded6..0a707bbbbea6 100644 --- a/drivers/input/touchscreen/zylonite-wm97xx.c +++ b/drivers/input/touchscreen/zylonite-wm97xx.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
25 | #include <linux/gpio.h> | ||
25 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
26 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
27 | #include <linux/io.h> | 28 | #include <linux/io.h> |
@@ -192,8 +193,8 @@ static int zylonite_wm97xx_probe(struct platform_device *pdev) | |||
192 | else | 193 | else |
193 | gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); | 194 | gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); |
194 | 195 | ||
195 | wm->pen_irq = IRQ_GPIO(gpio_touch_irq); | 196 | wm->pen_irq = gpio_to_irq(gpio_touch_irq); |
196 | irq_set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); | 197 | irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); |
197 | 198 | ||
198 | wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, | 199 | wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, |
199 | WM97XX_GPIO_POL_HIGH, | 200 | WM97XX_GPIO_POL_HIGH, |
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index 86e14583a082..3f565ef3e149 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c | |||
@@ -27,8 +27,9 @@ | |||
27 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <plat/usb.h> | 29 | #include <plat/usb.h> |
30 | #include <linux/pm_runtime.h> | ||
30 | 31 | ||
31 | #define USBHS_DRIVER_NAME "usbhs-omap" | 32 | #define USBHS_DRIVER_NAME "usbhs_omap" |
32 | #define OMAP_EHCI_DEVICE "ehci-omap" | 33 | #define OMAP_EHCI_DEVICE "ehci-omap" |
33 | #define OMAP_OHCI_DEVICE "ohci-omap3" | 34 | #define OMAP_OHCI_DEVICE "ohci-omap3" |
34 | 35 | ||
@@ -147,9 +148,6 @@ | |||
147 | 148 | ||
148 | 149 | ||
149 | struct usbhs_hcd_omap { | 150 | struct usbhs_hcd_omap { |
150 | struct clk *usbhost_ick; | ||
151 | struct clk *usbhost_hs_fck; | ||
152 | struct clk *usbhost_fs_fck; | ||
153 | struct clk *xclk60mhsp1_ck; | 151 | struct clk *xclk60mhsp1_ck; |
154 | struct clk *xclk60mhsp2_ck; | 152 | struct clk *xclk60mhsp2_ck; |
155 | struct clk *utmi_p1_fck; | 153 | struct clk *utmi_p1_fck; |
@@ -159,8 +157,7 @@ struct usbhs_hcd_omap { | |||
159 | struct clk *usbhost_p2_fck; | 157 | struct clk *usbhost_p2_fck; |
160 | struct clk *usbtll_p2_fck; | 158 | struct clk *usbtll_p2_fck; |
161 | struct clk *init_60m_fclk; | 159 | struct clk *init_60m_fclk; |
162 | struct clk *usbtll_fck; | 160 | struct clk *ehci_logic_fck; |
163 | struct clk *usbtll_ick; | ||
164 | 161 | ||
165 | void __iomem *uhh_base; | 162 | void __iomem *uhh_base; |
166 | void __iomem *tll_base; | 163 | void __iomem *tll_base; |
@@ -169,7 +166,6 @@ struct usbhs_hcd_omap { | |||
169 | 166 | ||
170 | u32 usbhs_rev; | 167 | u32 usbhs_rev; |
171 | spinlock_t lock; | 168 | spinlock_t lock; |
172 | int count; | ||
173 | }; | 169 | }; |
174 | /*-------------------------------------------------------------------------*/ | 170 | /*-------------------------------------------------------------------------*/ |
175 | 171 | ||
@@ -319,269 +315,6 @@ err_end: | |||
319 | return ret; | 315 | return ret; |
320 | } | 316 | } |
321 | 317 | ||
322 | /** | ||
323 | * usbhs_omap_probe - initialize TI-based HCDs | ||
324 | * | ||
325 | * Allocates basic resources for this USB host controller. | ||
326 | */ | ||
327 | static int __devinit usbhs_omap_probe(struct platform_device *pdev) | ||
328 | { | ||
329 | struct device *dev = &pdev->dev; | ||
330 | struct usbhs_omap_platform_data *pdata = dev->platform_data; | ||
331 | struct usbhs_hcd_omap *omap; | ||
332 | struct resource *res; | ||
333 | int ret = 0; | ||
334 | int i; | ||
335 | |||
336 | if (!pdata) { | ||
337 | dev_err(dev, "Missing platform data\n"); | ||
338 | ret = -ENOMEM; | ||
339 | goto end_probe; | ||
340 | } | ||
341 | |||
342 | omap = kzalloc(sizeof(*omap), GFP_KERNEL); | ||
343 | if (!omap) { | ||
344 | dev_err(dev, "Memory allocation failed\n"); | ||
345 | ret = -ENOMEM; | ||
346 | goto end_probe; | ||
347 | } | ||
348 | |||
349 | spin_lock_init(&omap->lock); | ||
350 | |||
351 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) | ||
352 | omap->platdata.port_mode[i] = pdata->port_mode[i]; | ||
353 | |||
354 | omap->platdata.ehci_data = pdata->ehci_data; | ||
355 | omap->platdata.ohci_data = pdata->ohci_data; | ||
356 | |||
357 | omap->usbhost_ick = clk_get(dev, "usbhost_ick"); | ||
358 | if (IS_ERR(omap->usbhost_ick)) { | ||
359 | ret = PTR_ERR(omap->usbhost_ick); | ||
360 | dev_err(dev, "usbhost_ick failed error:%d\n", ret); | ||
361 | goto err_end; | ||
362 | } | ||
363 | |||
364 | omap->usbhost_hs_fck = clk_get(dev, "hs_fck"); | ||
365 | if (IS_ERR(omap->usbhost_hs_fck)) { | ||
366 | ret = PTR_ERR(omap->usbhost_hs_fck); | ||
367 | dev_err(dev, "usbhost_hs_fck failed error:%d\n", ret); | ||
368 | goto err_usbhost_ick; | ||
369 | } | ||
370 | |||
371 | omap->usbhost_fs_fck = clk_get(dev, "fs_fck"); | ||
372 | if (IS_ERR(omap->usbhost_fs_fck)) { | ||
373 | ret = PTR_ERR(omap->usbhost_fs_fck); | ||
374 | dev_err(dev, "usbhost_fs_fck failed error:%d\n", ret); | ||
375 | goto err_usbhost_hs_fck; | ||
376 | } | ||
377 | |||
378 | omap->usbtll_fck = clk_get(dev, "usbtll_fck"); | ||
379 | if (IS_ERR(omap->usbtll_fck)) { | ||
380 | ret = PTR_ERR(omap->usbtll_fck); | ||
381 | dev_err(dev, "usbtll_fck failed error:%d\n", ret); | ||
382 | goto err_usbhost_fs_fck; | ||
383 | } | ||
384 | |||
385 | omap->usbtll_ick = clk_get(dev, "usbtll_ick"); | ||
386 | if (IS_ERR(omap->usbtll_ick)) { | ||
387 | ret = PTR_ERR(omap->usbtll_ick); | ||
388 | dev_err(dev, "usbtll_ick failed error:%d\n", ret); | ||
389 | goto err_usbtll_fck; | ||
390 | } | ||
391 | |||
392 | omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); | ||
393 | if (IS_ERR(omap->utmi_p1_fck)) { | ||
394 | ret = PTR_ERR(omap->utmi_p1_fck); | ||
395 | dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); | ||
396 | goto err_usbtll_ick; | ||
397 | } | ||
398 | |||
399 | omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); | ||
400 | if (IS_ERR(omap->xclk60mhsp1_ck)) { | ||
401 | ret = PTR_ERR(omap->xclk60mhsp1_ck); | ||
402 | dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret); | ||
403 | goto err_utmi_p1_fck; | ||
404 | } | ||
405 | |||
406 | omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk"); | ||
407 | if (IS_ERR(omap->utmi_p2_fck)) { | ||
408 | ret = PTR_ERR(omap->utmi_p2_fck); | ||
409 | dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); | ||
410 | goto err_xclk60mhsp1_ck; | ||
411 | } | ||
412 | |||
413 | omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck"); | ||
414 | if (IS_ERR(omap->xclk60mhsp2_ck)) { | ||
415 | ret = PTR_ERR(omap->xclk60mhsp2_ck); | ||
416 | dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret); | ||
417 | goto err_utmi_p2_fck; | ||
418 | } | ||
419 | |||
420 | omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk"); | ||
421 | if (IS_ERR(omap->usbhost_p1_fck)) { | ||
422 | ret = PTR_ERR(omap->usbhost_p1_fck); | ||
423 | dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret); | ||
424 | goto err_xclk60mhsp2_ck; | ||
425 | } | ||
426 | |||
427 | omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); | ||
428 | if (IS_ERR(omap->usbtll_p1_fck)) { | ||
429 | ret = PTR_ERR(omap->usbtll_p1_fck); | ||
430 | dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); | ||
431 | goto err_usbhost_p1_fck; | ||
432 | } | ||
433 | |||
434 | omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); | ||
435 | if (IS_ERR(omap->usbhost_p2_fck)) { | ||
436 | ret = PTR_ERR(omap->usbhost_p2_fck); | ||
437 | dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); | ||
438 | goto err_usbtll_p1_fck; | ||
439 | } | ||
440 | |||
441 | omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); | ||
442 | if (IS_ERR(omap->usbtll_p2_fck)) { | ||
443 | ret = PTR_ERR(omap->usbtll_p2_fck); | ||
444 | dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); | ||
445 | goto err_usbhost_p2_fck; | ||
446 | } | ||
447 | |||
448 | omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); | ||
449 | if (IS_ERR(omap->init_60m_fclk)) { | ||
450 | ret = PTR_ERR(omap->init_60m_fclk); | ||
451 | dev_err(dev, "init_60m_fclk failed error:%d\n", ret); | ||
452 | goto err_usbtll_p2_fck; | ||
453 | } | ||
454 | |||
455 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh"); | ||
456 | if (!res) { | ||
457 | dev_err(dev, "UHH EHCI get resource failed\n"); | ||
458 | ret = -ENODEV; | ||
459 | goto err_init_60m_fclk; | ||
460 | } | ||
461 | |||
462 | omap->uhh_base = ioremap(res->start, resource_size(res)); | ||
463 | if (!omap->uhh_base) { | ||
464 | dev_err(dev, "UHH ioremap failed\n"); | ||
465 | ret = -ENOMEM; | ||
466 | goto err_init_60m_fclk; | ||
467 | } | ||
468 | |||
469 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll"); | ||
470 | if (!res) { | ||
471 | dev_err(dev, "UHH EHCI get resource failed\n"); | ||
472 | ret = -ENODEV; | ||
473 | goto err_tll; | ||
474 | } | ||
475 | |||
476 | omap->tll_base = ioremap(res->start, resource_size(res)); | ||
477 | if (!omap->tll_base) { | ||
478 | dev_err(dev, "TLL ioremap failed\n"); | ||
479 | ret = -ENOMEM; | ||
480 | goto err_tll; | ||
481 | } | ||
482 | |||
483 | platform_set_drvdata(pdev, omap); | ||
484 | |||
485 | ret = omap_usbhs_alloc_children(pdev); | ||
486 | if (ret) { | ||
487 | dev_err(dev, "omap_usbhs_alloc_children failed\n"); | ||
488 | goto err_alloc; | ||
489 | } | ||
490 | |||
491 | goto end_probe; | ||
492 | |||
493 | err_alloc: | ||
494 | iounmap(omap->tll_base); | ||
495 | |||
496 | err_tll: | ||
497 | iounmap(omap->uhh_base); | ||
498 | |||
499 | err_init_60m_fclk: | ||
500 | clk_put(omap->init_60m_fclk); | ||
501 | |||
502 | err_usbtll_p2_fck: | ||
503 | clk_put(omap->usbtll_p2_fck); | ||
504 | |||
505 | err_usbhost_p2_fck: | ||
506 | clk_put(omap->usbhost_p2_fck); | ||
507 | |||
508 | err_usbtll_p1_fck: | ||
509 | clk_put(omap->usbtll_p1_fck); | ||
510 | |||
511 | err_usbhost_p1_fck: | ||
512 | clk_put(omap->usbhost_p1_fck); | ||
513 | |||
514 | err_xclk60mhsp2_ck: | ||
515 | clk_put(omap->xclk60mhsp2_ck); | ||
516 | |||
517 | err_utmi_p2_fck: | ||
518 | clk_put(omap->utmi_p2_fck); | ||
519 | |||
520 | err_xclk60mhsp1_ck: | ||
521 | clk_put(omap->xclk60mhsp1_ck); | ||
522 | |||
523 | err_utmi_p1_fck: | ||
524 | clk_put(omap->utmi_p1_fck); | ||
525 | |||
526 | err_usbtll_ick: | ||
527 | clk_put(omap->usbtll_ick); | ||
528 | |||
529 | err_usbtll_fck: | ||
530 | clk_put(omap->usbtll_fck); | ||
531 | |||
532 | err_usbhost_fs_fck: | ||
533 | clk_put(omap->usbhost_fs_fck); | ||
534 | |||
535 | err_usbhost_hs_fck: | ||
536 | clk_put(omap->usbhost_hs_fck); | ||
537 | |||
538 | err_usbhost_ick: | ||
539 | clk_put(omap->usbhost_ick); | ||
540 | |||
541 | err_end: | ||
542 | kfree(omap); | ||
543 | |||
544 | end_probe: | ||
545 | return ret; | ||
546 | } | ||
547 | |||
548 | /** | ||
549 | * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs | ||
550 | * @pdev: USB Host Controller being removed | ||
551 | * | ||
552 | * Reverses the effect of usbhs_omap_probe(). | ||
553 | */ | ||
554 | static int __devexit usbhs_omap_remove(struct platform_device *pdev) | ||
555 | { | ||
556 | struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); | ||
557 | |||
558 | if (omap->count != 0) { | ||
559 | dev_err(&pdev->dev, | ||
560 | "Either EHCI or OHCI is still using usbhs core\n"); | ||
561 | return -EBUSY; | ||
562 | } | ||
563 | |||
564 | iounmap(omap->tll_base); | ||
565 | iounmap(omap->uhh_base); | ||
566 | clk_put(omap->init_60m_fclk); | ||
567 | clk_put(omap->usbtll_p2_fck); | ||
568 | clk_put(omap->usbhost_p2_fck); | ||
569 | clk_put(omap->usbtll_p1_fck); | ||
570 | clk_put(omap->usbhost_p1_fck); | ||
571 | clk_put(omap->xclk60mhsp2_ck); | ||
572 | clk_put(omap->utmi_p2_fck); | ||
573 | clk_put(omap->xclk60mhsp1_ck); | ||
574 | clk_put(omap->utmi_p1_fck); | ||
575 | clk_put(omap->usbtll_ick); | ||
576 | clk_put(omap->usbtll_fck); | ||
577 | clk_put(omap->usbhost_fs_fck); | ||
578 | clk_put(omap->usbhost_hs_fck); | ||
579 | clk_put(omap->usbhost_ick); | ||
580 | kfree(omap); | ||
581 | |||
582 | return 0; | ||
583 | } | ||
584 | |||
585 | static bool is_ohci_port(enum usbhs_omap_port_mode pmode) | 318 | static bool is_ohci_port(enum usbhs_omap_port_mode pmode) |
586 | { | 319 | { |
587 | switch (pmode) { | 320 | switch (pmode) { |
@@ -689,30 +422,85 @@ static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count) | |||
689 | } | 422 | } |
690 | } | 423 | } |
691 | 424 | ||
692 | static int usbhs_enable(struct device *dev) | 425 | static int usbhs_runtime_resume(struct device *dev) |
693 | { | 426 | { |
694 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); | 427 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); |
695 | struct usbhs_omap_platform_data *pdata = &omap->platdata; | 428 | struct usbhs_omap_platform_data *pdata = &omap->platdata; |
696 | unsigned long flags = 0; | 429 | unsigned long flags; |
697 | int ret = 0; | 430 | |
698 | unsigned long timeout; | 431 | dev_dbg(dev, "usbhs_runtime_resume\n"); |
699 | unsigned reg; | ||
700 | 432 | ||
701 | dev_dbg(dev, "starting TI HSUSB Controller\n"); | ||
702 | if (!pdata) { | 433 | if (!pdata) { |
703 | dev_dbg(dev, "missing platform_data\n"); | 434 | dev_dbg(dev, "missing platform_data\n"); |
704 | return -ENODEV; | 435 | return -ENODEV; |
705 | } | 436 | } |
706 | 437 | ||
707 | spin_lock_irqsave(&omap->lock, flags); | 438 | spin_lock_irqsave(&omap->lock, flags); |
708 | if (omap->count > 0) | ||
709 | goto end_count; | ||
710 | 439 | ||
711 | clk_enable(omap->usbhost_ick); | 440 | if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) |
712 | clk_enable(omap->usbhost_hs_fck); | 441 | clk_enable(omap->ehci_logic_fck); |
713 | clk_enable(omap->usbhost_fs_fck); | 442 | |
714 | clk_enable(omap->usbtll_fck); | 443 | if (is_ehci_tll_mode(pdata->port_mode[0])) { |
715 | clk_enable(omap->usbtll_ick); | 444 | clk_enable(omap->usbhost_p1_fck); |
445 | clk_enable(omap->usbtll_p1_fck); | ||
446 | } | ||
447 | if (is_ehci_tll_mode(pdata->port_mode[1])) { | ||
448 | clk_enable(omap->usbhost_p2_fck); | ||
449 | clk_enable(omap->usbtll_p2_fck); | ||
450 | } | ||
451 | clk_enable(omap->utmi_p1_fck); | ||
452 | clk_enable(omap->utmi_p2_fck); | ||
453 | |||
454 | spin_unlock_irqrestore(&omap->lock, flags); | ||
455 | |||
456 | return 0; | ||
457 | } | ||
458 | |||
459 | static int usbhs_runtime_suspend(struct device *dev) | ||
460 | { | ||
461 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); | ||
462 | struct usbhs_omap_platform_data *pdata = &omap->platdata; | ||
463 | unsigned long flags; | ||
464 | |||
465 | dev_dbg(dev, "usbhs_runtime_suspend\n"); | ||
466 | |||
467 | if (!pdata) { | ||
468 | dev_dbg(dev, "missing platform_data\n"); | ||
469 | return -ENODEV; | ||
470 | } | ||
471 | |||
472 | spin_lock_irqsave(&omap->lock, flags); | ||
473 | |||
474 | if (is_ehci_tll_mode(pdata->port_mode[0])) { | ||
475 | clk_disable(omap->usbhost_p1_fck); | ||
476 | clk_disable(omap->usbtll_p1_fck); | ||
477 | } | ||
478 | if (is_ehci_tll_mode(pdata->port_mode[1])) { | ||
479 | clk_disable(omap->usbhost_p2_fck); | ||
480 | clk_disable(omap->usbtll_p2_fck); | ||
481 | } | ||
482 | clk_disable(omap->utmi_p2_fck); | ||
483 | clk_disable(omap->utmi_p1_fck); | ||
484 | |||
485 | if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) | ||
486 | clk_disable(omap->ehci_logic_fck); | ||
487 | |||
488 | spin_unlock_irqrestore(&omap->lock, flags); | ||
489 | |||
490 | return 0; | ||
491 | } | ||
492 | |||
493 | static void omap_usbhs_init(struct device *dev) | ||
494 | { | ||
495 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); | ||
496 | struct usbhs_omap_platform_data *pdata = &omap->platdata; | ||
497 | unsigned long flags; | ||
498 | unsigned reg; | ||
499 | |||
500 | dev_dbg(dev, "starting TI HSUSB Controller\n"); | ||
501 | |||
502 | pm_runtime_get_sync(dev); | ||
503 | spin_lock_irqsave(&omap->lock, flags); | ||
716 | 504 | ||
717 | if (pdata->ehci_data->phy_reset) { | 505 | if (pdata->ehci_data->phy_reset) { |
718 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { | 506 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) { |
@@ -736,50 +524,6 @@ static int usbhs_enable(struct device *dev) | |||
736 | omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); | 524 | omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); |
737 | dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); | 525 | dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); |
738 | 526 | ||
739 | /* perform TLL soft reset, and wait until reset is complete */ | ||
740 | usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, | ||
741 | OMAP_USBTLL_SYSCONFIG_SOFTRESET); | ||
742 | |||
743 | /* Wait for TLL reset to complete */ | ||
744 | timeout = jiffies + msecs_to_jiffies(1000); | ||
745 | while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS) | ||
746 | & OMAP_USBTLL_SYSSTATUS_RESETDONE)) { | ||
747 | cpu_relax(); | ||
748 | |||
749 | if (time_after(jiffies, timeout)) { | ||
750 | dev_dbg(dev, "operation timed out\n"); | ||
751 | ret = -EINVAL; | ||
752 | goto err_tll; | ||
753 | } | ||
754 | } | ||
755 | |||
756 | dev_dbg(dev, "TLL RESET DONE\n"); | ||
757 | |||
758 | /* (1<<3) = no idle mode only for initial debugging */ | ||
759 | usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, | ||
760 | OMAP_USBTLL_SYSCONFIG_ENAWAKEUP | | ||
761 | OMAP_USBTLL_SYSCONFIG_SIDLEMODE | | ||
762 | OMAP_USBTLL_SYSCONFIG_AUTOIDLE); | ||
763 | |||
764 | /* Put UHH in NoIdle/NoStandby mode */ | ||
765 | reg = usbhs_read(omap->uhh_base, OMAP_UHH_SYSCONFIG); | ||
766 | if (is_omap_usbhs_rev1(omap)) { | ||
767 | reg |= (OMAP_UHH_SYSCONFIG_ENAWAKEUP | ||
768 | | OMAP_UHH_SYSCONFIG_SIDLEMODE | ||
769 | | OMAP_UHH_SYSCONFIG_CACTIVITY | ||
770 | | OMAP_UHH_SYSCONFIG_MIDLEMODE); | ||
771 | reg &= ~OMAP_UHH_SYSCONFIG_AUTOIDLE; | ||
772 | |||
773 | |||
774 | } else if (is_omap_usbhs_rev2(omap)) { | ||
775 | reg &= ~OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR; | ||
776 | reg |= OMAP4_UHH_SYSCONFIG_NOIDLE; | ||
777 | reg &= ~OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR; | ||
778 | reg |= OMAP4_UHH_SYSCONFIG_NOSTDBY; | ||
779 | } | ||
780 | |||
781 | usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg); | ||
782 | |||
783 | reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); | 527 | reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG); |
784 | /* setup ULPI bypass and burst configurations */ | 528 | /* setup ULPI bypass and burst configurations */ |
785 | reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN | 529 | reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN |
@@ -825,49 +569,6 @@ static int usbhs_enable(struct device *dev) | |||
825 | reg &= ~OMAP4_P1_MODE_CLEAR; | 569 | reg &= ~OMAP4_P1_MODE_CLEAR; |
826 | reg &= ~OMAP4_P2_MODE_CLEAR; | 570 | reg &= ~OMAP4_P2_MODE_CLEAR; |
827 | 571 | ||
828 | if (is_ehci_phy_mode(pdata->port_mode[0])) { | ||
829 | ret = clk_set_parent(omap->utmi_p1_fck, | ||
830 | omap->xclk60mhsp1_ck); | ||
831 | if (ret != 0) { | ||
832 | dev_err(dev, "xclk60mhsp1_ck set parent" | ||
833 | "failed error:%d\n", ret); | ||
834 | goto err_tll; | ||
835 | } | ||
836 | } else if (is_ehci_tll_mode(pdata->port_mode[0])) { | ||
837 | ret = clk_set_parent(omap->utmi_p1_fck, | ||
838 | omap->init_60m_fclk); | ||
839 | if (ret != 0) { | ||
840 | dev_err(dev, "init_60m_fclk set parent" | ||
841 | "failed error:%d\n", ret); | ||
842 | goto err_tll; | ||
843 | } | ||
844 | clk_enable(omap->usbhost_p1_fck); | ||
845 | clk_enable(omap->usbtll_p1_fck); | ||
846 | } | ||
847 | |||
848 | if (is_ehci_phy_mode(pdata->port_mode[1])) { | ||
849 | ret = clk_set_parent(omap->utmi_p2_fck, | ||
850 | omap->xclk60mhsp2_ck); | ||
851 | if (ret != 0) { | ||
852 | dev_err(dev, "xclk60mhsp1_ck set parent" | ||
853 | "failed error:%d\n", ret); | ||
854 | goto err_tll; | ||
855 | } | ||
856 | } else if (is_ehci_tll_mode(pdata->port_mode[1])) { | ||
857 | ret = clk_set_parent(omap->utmi_p2_fck, | ||
858 | omap->init_60m_fclk); | ||
859 | if (ret != 0) { | ||
860 | dev_err(dev, "init_60m_fclk set parent" | ||
861 | "failed error:%d\n", ret); | ||
862 | goto err_tll; | ||
863 | } | ||
864 | clk_enable(omap->usbhost_p2_fck); | ||
865 | clk_enable(omap->usbtll_p2_fck); | ||
866 | } | ||
867 | |||
868 | clk_enable(omap->utmi_p1_fck); | ||
869 | clk_enable(omap->utmi_p2_fck); | ||
870 | |||
871 | if (is_ehci_tll_mode(pdata->port_mode[0]) || | 572 | if (is_ehci_tll_mode(pdata->port_mode[0]) || |
872 | (is_ohci_port(pdata->port_mode[0]))) | 573 | (is_ohci_port(pdata->port_mode[0]))) |
873 | reg |= OMAP4_P1_MODE_TLL; | 574 | reg |= OMAP4_P1_MODE_TLL; |
@@ -913,12 +614,15 @@ static int usbhs_enable(struct device *dev) | |||
913 | (pdata->ehci_data->reset_gpio_port[1], 1); | 614 | (pdata->ehci_data->reset_gpio_port[1], 1); |
914 | } | 615 | } |
915 | 616 | ||
916 | end_count: | ||
917 | omap->count++; | ||
918 | spin_unlock_irqrestore(&omap->lock, flags); | 617 | spin_unlock_irqrestore(&omap->lock, flags); |
919 | return 0; | 618 | pm_runtime_put_sync(dev); |
619 | } | ||
620 | |||
621 | static void omap_usbhs_deinit(struct device *dev) | ||
622 | { | ||
623 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); | ||
624 | struct usbhs_omap_platform_data *pdata = &omap->platdata; | ||
920 | 625 | ||
921 | err_tll: | ||
922 | if (pdata->ehci_data->phy_reset) { | 626 | if (pdata->ehci_data->phy_reset) { |
923 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) | 627 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) |
924 | gpio_free(pdata->ehci_data->reset_gpio_port[0]); | 628 | gpio_free(pdata->ehci_data->reset_gpio_port[0]); |
@@ -926,123 +630,272 @@ err_tll: | |||
926 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) | 630 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) |
927 | gpio_free(pdata->ehci_data->reset_gpio_port[1]); | 631 | gpio_free(pdata->ehci_data->reset_gpio_port[1]); |
928 | } | 632 | } |
929 | |||
930 | clk_disable(omap->usbtll_ick); | ||
931 | clk_disable(omap->usbtll_fck); | ||
932 | clk_disable(omap->usbhost_fs_fck); | ||
933 | clk_disable(omap->usbhost_hs_fck); | ||
934 | clk_disable(omap->usbhost_ick); | ||
935 | spin_unlock_irqrestore(&omap->lock, flags); | ||
936 | return ret; | ||
937 | } | 633 | } |
938 | 634 | ||
939 | static void usbhs_disable(struct device *dev) | 635 | |
636 | /** | ||
637 | * usbhs_omap_probe - initialize TI-based HCDs | ||
638 | * | ||
639 | * Allocates basic resources for this USB host controller. | ||
640 | */ | ||
641 | static int __devinit usbhs_omap_probe(struct platform_device *pdev) | ||
940 | { | 642 | { |
941 | struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); | 643 | struct device *dev = &pdev->dev; |
942 | struct usbhs_omap_platform_data *pdata = &omap->platdata; | 644 | struct usbhs_omap_platform_data *pdata = dev->platform_data; |
943 | unsigned long flags = 0; | 645 | struct usbhs_hcd_omap *omap; |
944 | unsigned long timeout; | 646 | struct resource *res; |
647 | int ret = 0; | ||
648 | int i; | ||
945 | 649 | ||
946 | dev_dbg(dev, "stopping TI HSUSB Controller\n"); | 650 | if (!pdata) { |
651 | dev_err(dev, "Missing platform data\n"); | ||
652 | ret = -ENOMEM; | ||
653 | goto end_probe; | ||
654 | } | ||
947 | 655 | ||
948 | spin_lock_irqsave(&omap->lock, flags); | 656 | omap = kzalloc(sizeof(*omap), GFP_KERNEL); |
657 | if (!omap) { | ||
658 | dev_err(dev, "Memory allocation failed\n"); | ||
659 | ret = -ENOMEM; | ||
660 | goto end_probe; | ||
661 | } | ||
949 | 662 | ||
950 | if (omap->count == 0) | 663 | spin_lock_init(&omap->lock); |
951 | goto end_disble; | ||
952 | 664 | ||
953 | omap->count--; | 665 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) |
666 | omap->platdata.port_mode[i] = pdata->port_mode[i]; | ||
667 | |||
668 | omap->platdata.ehci_data = pdata->ehci_data; | ||
669 | omap->platdata.ohci_data = pdata->ohci_data; | ||
954 | 670 | ||
955 | if (omap->count != 0) | 671 | pm_runtime_enable(dev); |
956 | goto end_disble; | ||
957 | 672 | ||
958 | /* Reset OMAP modules for insmod/rmmod to work */ | ||
959 | usbhs_write(omap->uhh_base, OMAP_UHH_SYSCONFIG, | ||
960 | is_omap_usbhs_rev2(omap) ? | ||
961 | OMAP4_UHH_SYSCONFIG_SOFTRESET : | ||
962 | OMAP_UHH_SYSCONFIG_SOFTRESET); | ||
963 | 673 | ||
964 | timeout = jiffies + msecs_to_jiffies(100); | 674 | for (i = 0; i < OMAP3_HS_USB_PORTS; i++) |
965 | while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) | 675 | if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) || |
966 | & (1 << 0))) { | 676 | is_ehci_hsic_mode(i)) { |
967 | cpu_relax(); | 677 | omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck"); |
678 | if (IS_ERR(omap->ehci_logic_fck)) { | ||
679 | ret = PTR_ERR(omap->ehci_logic_fck); | ||
680 | dev_warn(dev, "ehci_logic_fck failed:%d\n", | ||
681 | ret); | ||
682 | } | ||
683 | break; | ||
684 | } | ||
968 | 685 | ||
969 | if (time_after(jiffies, timeout)) | 686 | omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk"); |
970 | dev_dbg(dev, "operation timed out\n"); | 687 | if (IS_ERR(omap->utmi_p1_fck)) { |
688 | ret = PTR_ERR(omap->utmi_p1_fck); | ||
689 | dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret); | ||
690 | goto err_end; | ||
971 | } | 691 | } |
972 | 692 | ||
973 | while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) | 693 | omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck"); |
974 | & (1 << 1))) { | 694 | if (IS_ERR(omap->xclk60mhsp1_ck)) { |
975 | cpu_relax(); | 695 | ret = PTR_ERR(omap->xclk60mhsp1_ck); |
696 | dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret); | ||
697 | goto err_utmi_p1_fck; | ||
698 | } | ||
976 | 699 | ||
977 | if (time_after(jiffies, timeout)) | 700 | omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk"); |
978 | dev_dbg(dev, "operation timed out\n"); | 701 | if (IS_ERR(omap->utmi_p2_fck)) { |
702 | ret = PTR_ERR(omap->utmi_p2_fck); | ||
703 | dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret); | ||
704 | goto err_xclk60mhsp1_ck; | ||
979 | } | 705 | } |
980 | 706 | ||
981 | while (!(usbhs_read(omap->uhh_base, OMAP_UHH_SYSSTATUS) | 707 | omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck"); |
982 | & (1 << 2))) { | 708 | if (IS_ERR(omap->xclk60mhsp2_ck)) { |
983 | cpu_relax(); | 709 | ret = PTR_ERR(omap->xclk60mhsp2_ck); |
710 | dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret); | ||
711 | goto err_utmi_p2_fck; | ||
712 | } | ||
984 | 713 | ||
985 | if (time_after(jiffies, timeout)) | 714 | omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk"); |
986 | dev_dbg(dev, "operation timed out\n"); | 715 | if (IS_ERR(omap->usbhost_p1_fck)) { |
716 | ret = PTR_ERR(omap->usbhost_p1_fck); | ||
717 | dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret); | ||
718 | goto err_xclk60mhsp2_ck; | ||
987 | } | 719 | } |
988 | 720 | ||
989 | usbhs_write(omap->tll_base, OMAP_USBTLL_SYSCONFIG, (1 << 1)); | 721 | omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); |
722 | if (IS_ERR(omap->usbtll_p1_fck)) { | ||
723 | ret = PTR_ERR(omap->usbtll_p1_fck); | ||
724 | dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); | ||
725 | goto err_usbhost_p1_fck; | ||
726 | } | ||
990 | 727 | ||
991 | while (!(usbhs_read(omap->tll_base, OMAP_USBTLL_SYSSTATUS) | 728 | omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); |
992 | & (1 << 0))) { | 729 | if (IS_ERR(omap->usbhost_p2_fck)) { |
993 | cpu_relax(); | 730 | ret = PTR_ERR(omap->usbhost_p2_fck); |
731 | dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); | ||
732 | goto err_usbtll_p1_fck; | ||
733 | } | ||
994 | 734 | ||
995 | if (time_after(jiffies, timeout)) | 735 | omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); |
996 | dev_dbg(dev, "operation timed out\n"); | 736 | if (IS_ERR(omap->usbtll_p2_fck)) { |
737 | ret = PTR_ERR(omap->usbtll_p2_fck); | ||
738 | dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); | ||
739 | goto err_usbhost_p2_fck; | ||
997 | } | 740 | } |
998 | 741 | ||
999 | if (is_omap_usbhs_rev2(omap)) { | 742 | omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); |
1000 | if (is_ehci_tll_mode(pdata->port_mode[0])) | 743 | if (IS_ERR(omap->init_60m_fclk)) { |
1001 | clk_disable(omap->usbtll_p1_fck); | 744 | ret = PTR_ERR(omap->init_60m_fclk); |
1002 | if (is_ehci_tll_mode(pdata->port_mode[1])) | 745 | dev_err(dev, "init_60m_fclk failed error:%d\n", ret); |
1003 | clk_disable(omap->usbtll_p2_fck); | 746 | goto err_usbtll_p2_fck; |
1004 | clk_disable(omap->utmi_p2_fck); | ||
1005 | clk_disable(omap->utmi_p1_fck); | ||
1006 | } | 747 | } |
1007 | 748 | ||
1008 | clk_disable(omap->usbtll_ick); | 749 | if (is_ehci_phy_mode(pdata->port_mode[0])) { |
1009 | clk_disable(omap->usbtll_fck); | 750 | /* for OMAP3 , the clk set paretn fails */ |
1010 | clk_disable(omap->usbhost_fs_fck); | 751 | ret = clk_set_parent(omap->utmi_p1_fck, |
1011 | clk_disable(omap->usbhost_hs_fck); | 752 | omap->xclk60mhsp1_ck); |
1012 | clk_disable(omap->usbhost_ick); | 753 | if (ret != 0) |
754 | dev_err(dev, "xclk60mhsp1_ck set parent" | ||
755 | "failed error:%d\n", ret); | ||
756 | } else if (is_ehci_tll_mode(pdata->port_mode[0])) { | ||
757 | ret = clk_set_parent(omap->utmi_p1_fck, | ||
758 | omap->init_60m_fclk); | ||
759 | if (ret != 0) | ||
760 | dev_err(dev, "init_60m_fclk set parent" | ||
761 | "failed error:%d\n", ret); | ||
762 | } | ||
1013 | 763 | ||
1014 | /* The gpio_free migh sleep; so unlock the spinlock */ | 764 | if (is_ehci_phy_mode(pdata->port_mode[1])) { |
1015 | spin_unlock_irqrestore(&omap->lock, flags); | 765 | ret = clk_set_parent(omap->utmi_p2_fck, |
766 | omap->xclk60mhsp2_ck); | ||
767 | if (ret != 0) | ||
768 | dev_err(dev, "xclk60mhsp2_ck set parent" | ||
769 | "failed error:%d\n", ret); | ||
770 | } else if (is_ehci_tll_mode(pdata->port_mode[1])) { | ||
771 | ret = clk_set_parent(omap->utmi_p2_fck, | ||
772 | omap->init_60m_fclk); | ||
773 | if (ret != 0) | ||
774 | dev_err(dev, "init_60m_fclk set parent" | ||
775 | "failed error:%d\n", ret); | ||
776 | } | ||
1016 | 777 | ||
1017 | if (pdata->ehci_data->phy_reset) { | 778 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh"); |
1018 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) | 779 | if (!res) { |
1019 | gpio_free(pdata->ehci_data->reset_gpio_port[0]); | 780 | dev_err(dev, "UHH EHCI get resource failed\n"); |
781 | ret = -ENODEV; | ||
782 | goto err_init_60m_fclk; | ||
783 | } | ||
1020 | 784 | ||
1021 | if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) | 785 | omap->uhh_base = ioremap(res->start, resource_size(res)); |
1022 | gpio_free(pdata->ehci_data->reset_gpio_port[1]); | 786 | if (!omap->uhh_base) { |
787 | dev_err(dev, "UHH ioremap failed\n"); | ||
788 | ret = -ENOMEM; | ||
789 | goto err_init_60m_fclk; | ||
1023 | } | 790 | } |
1024 | return; | ||
1025 | 791 | ||
1026 | end_disble: | 792 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll"); |
1027 | spin_unlock_irqrestore(&omap->lock, flags); | 793 | if (!res) { |
1028 | } | 794 | dev_err(dev, "UHH EHCI get resource failed\n"); |
795 | ret = -ENODEV; | ||
796 | goto err_tll; | ||
797 | } | ||
1029 | 798 | ||
1030 | int omap_usbhs_enable(struct device *dev) | 799 | omap->tll_base = ioremap(res->start, resource_size(res)); |
1031 | { | 800 | if (!omap->tll_base) { |
1032 | return usbhs_enable(dev->parent); | 801 | dev_err(dev, "TLL ioremap failed\n"); |
802 | ret = -ENOMEM; | ||
803 | goto err_tll; | ||
804 | } | ||
805 | |||
806 | platform_set_drvdata(pdev, omap); | ||
807 | |||
808 | ret = omap_usbhs_alloc_children(pdev); | ||
809 | if (ret) { | ||
810 | dev_err(dev, "omap_usbhs_alloc_children failed\n"); | ||
811 | goto err_alloc; | ||
812 | } | ||
813 | |||
814 | omap_usbhs_init(dev); | ||
815 | |||
816 | goto end_probe; | ||
817 | |||
818 | err_alloc: | ||
819 | iounmap(omap->tll_base); | ||
820 | |||
821 | err_tll: | ||
822 | iounmap(omap->uhh_base); | ||
823 | |||
824 | err_init_60m_fclk: | ||
825 | clk_put(omap->init_60m_fclk); | ||
826 | |||
827 | err_usbtll_p2_fck: | ||
828 | clk_put(omap->usbtll_p2_fck); | ||
829 | |||
830 | err_usbhost_p2_fck: | ||
831 | clk_put(omap->usbhost_p2_fck); | ||
832 | |||
833 | err_usbtll_p1_fck: | ||
834 | clk_put(omap->usbtll_p1_fck); | ||
835 | |||
836 | err_usbhost_p1_fck: | ||
837 | clk_put(omap->usbhost_p1_fck); | ||
838 | |||
839 | err_xclk60mhsp2_ck: | ||
840 | clk_put(omap->xclk60mhsp2_ck); | ||
841 | |||
842 | err_utmi_p2_fck: | ||
843 | clk_put(omap->utmi_p2_fck); | ||
844 | |||
845 | err_xclk60mhsp1_ck: | ||
846 | clk_put(omap->xclk60mhsp1_ck); | ||
847 | |||
848 | err_utmi_p1_fck: | ||
849 | clk_put(omap->utmi_p1_fck); | ||
850 | |||
851 | err_end: | ||
852 | clk_put(omap->ehci_logic_fck); | ||
853 | pm_runtime_disable(dev); | ||
854 | kfree(omap); | ||
855 | |||
856 | end_probe: | ||
857 | return ret; | ||
1033 | } | 858 | } |
1034 | EXPORT_SYMBOL_GPL(omap_usbhs_enable); | ||
1035 | 859 | ||
1036 | void omap_usbhs_disable(struct device *dev) | 860 | /** |
861 | * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs | ||
862 | * @pdev: USB Host Controller being removed | ||
863 | * | ||
864 | * Reverses the effect of usbhs_omap_probe(). | ||
865 | */ | ||
866 | static int __devexit usbhs_omap_remove(struct platform_device *pdev) | ||
1037 | { | 867 | { |
1038 | usbhs_disable(dev->parent); | 868 | struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); |
869 | |||
870 | omap_usbhs_deinit(&pdev->dev); | ||
871 | iounmap(omap->tll_base); | ||
872 | iounmap(omap->uhh_base); | ||
873 | clk_put(omap->init_60m_fclk); | ||
874 | clk_put(omap->usbtll_p2_fck); | ||
875 | clk_put(omap->usbhost_p2_fck); | ||
876 | clk_put(omap->usbtll_p1_fck); | ||
877 | clk_put(omap->usbhost_p1_fck); | ||
878 | clk_put(omap->xclk60mhsp2_ck); | ||
879 | clk_put(omap->utmi_p2_fck); | ||
880 | clk_put(omap->xclk60mhsp1_ck); | ||
881 | clk_put(omap->utmi_p1_fck); | ||
882 | clk_put(omap->ehci_logic_fck); | ||
883 | pm_runtime_disable(&pdev->dev); | ||
884 | kfree(omap); | ||
885 | |||
886 | return 0; | ||
1039 | } | 887 | } |
1040 | EXPORT_SYMBOL_GPL(omap_usbhs_disable); | 888 | |
889 | static const struct dev_pm_ops usbhsomap_dev_pm_ops = { | ||
890 | .runtime_suspend = usbhs_runtime_suspend, | ||
891 | .runtime_resume = usbhs_runtime_resume, | ||
892 | }; | ||
1041 | 893 | ||
1042 | static struct platform_driver usbhs_omap_driver = { | 894 | static struct platform_driver usbhs_omap_driver = { |
1043 | .driver = { | 895 | .driver = { |
1044 | .name = (char *)usbhs_driver_name, | 896 | .name = (char *)usbhs_driver_name, |
1045 | .owner = THIS_MODULE, | 897 | .owner = THIS_MODULE, |
898 | .pm = &usbhsomap_dev_pm_ops, | ||
1046 | }, | 899 | }, |
1047 | .remove = __exit_p(usbhs_omap_remove), | 900 | .remove = __exit_p(usbhs_omap_remove), |
1048 | }; | 901 | }; |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index d5fe43d53c51..d1fb561e089d 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -1991,6 +1991,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) | |||
1991 | if (mmc_slot(host).nonremovable) | 1991 | if (mmc_slot(host).nonremovable) |
1992 | mmc->caps |= MMC_CAP_NONREMOVABLE; | 1992 | mmc->caps |= MMC_CAP_NONREMOVABLE; |
1993 | 1993 | ||
1994 | mmc->pm_caps = mmc_slot(host).pm_caps; | ||
1995 | |||
1994 | omap_hsmmc_conf_bus_power(host); | 1996 | omap_hsmmc_conf_bus_power(host); |
1995 | 1997 | ||
1996 | /* Select DMA lines */ | 1998 | /* Select DMA lines */ |
@@ -2179,13 +2181,7 @@ static int omap_hsmmc_suspend(struct device *dev) | |||
2179 | cancel_work_sync(&host->mmc_carddetect_work); | 2181 | cancel_work_sync(&host->mmc_carddetect_work); |
2180 | ret = mmc_suspend_host(host->mmc); | 2182 | ret = mmc_suspend_host(host->mmc); |
2181 | 2183 | ||
2182 | if (ret == 0) { | 2184 | if (ret) { |
2183 | omap_hsmmc_disable_irq(host); | ||
2184 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
2185 | OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); | ||
2186 | if (host->got_dbclk) | ||
2187 | clk_disable(host->dbclk); | ||
2188 | } else { | ||
2189 | host->suspended = 0; | 2185 | host->suspended = 0; |
2190 | if (host->pdata->resume) { | 2186 | if (host->pdata->resume) { |
2191 | ret = host->pdata->resume(&pdev->dev, | 2187 | ret = host->pdata->resume(&pdev->dev, |
@@ -2194,9 +2190,20 @@ static int omap_hsmmc_suspend(struct device *dev) | |||
2194 | dev_dbg(mmc_dev(host->mmc), | 2190 | dev_dbg(mmc_dev(host->mmc), |
2195 | "Unmask interrupt failed\n"); | 2191 | "Unmask interrupt failed\n"); |
2196 | } | 2192 | } |
2193 | goto err; | ||
2197 | } | 2194 | } |
2198 | pm_runtime_put_sync(host->dev); | 2195 | |
2196 | if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { | ||
2197 | omap_hsmmc_disable_irq(host); | ||
2198 | OMAP_HSMMC_WRITE(host->base, HCTL, | ||
2199 | OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); | ||
2200 | } | ||
2201 | if (host->got_dbclk) | ||
2202 | clk_disable(host->dbclk); | ||
2203 | |||
2199 | } | 2204 | } |
2205 | err: | ||
2206 | pm_runtime_put_sync(host->dev); | ||
2200 | return ret; | 2207 | return ret; |
2201 | } | 2208 | } |
2202 | 2209 | ||
@@ -2216,7 +2223,8 @@ static int omap_hsmmc_resume(struct device *dev) | |||
2216 | if (host->got_dbclk) | 2223 | if (host->got_dbclk) |
2217 | clk_enable(host->dbclk); | 2224 | clk_enable(host->dbclk); |
2218 | 2225 | ||
2219 | omap_hsmmc_conf_bus_power(host); | 2226 | if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) |
2227 | omap_hsmmc_conf_bus_power(host); | ||
2220 | 2228 | ||
2221 | if (host->pdata->resume) { | 2229 | if (host->pdata->resume) { |
2222 | ret = host->pdata->resume(&pdev->dev, host->slot_id); | 2230 | ret = host->pdata->resume(&pdev->dev, host->slot_id); |
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile index cd6d69a6a7d2..08d5f0388877 100644 --- a/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile | |||
@@ -10,7 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/ | |||
10 | obj-$(CONFIG_NET_VENDOR_AMD) += amd/ | 10 | obj-$(CONFIG_NET_VENDOR_AMD) += amd/ |
11 | obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ | 11 | obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ |
12 | obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/ | 12 | obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/ |
13 | obj-$(CONFIG_NET_ATMEL) += cadence/ | 13 | obj-$(CONFIG_NET_CADENCE) += cadence/ |
14 | obj-$(CONFIG_NET_BFIN) += adi/ | 14 | obj-$(CONFIG_NET_BFIN) += adi/ |
15 | obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/ | 15 | obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/ |
16 | obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/ | 16 | obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/ |
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig index b48378a41e49..db931916da08 100644 --- a/drivers/net/ethernet/cadence/Kconfig +++ b/drivers/net/ethernet/cadence/Kconfig | |||
@@ -5,8 +5,8 @@ | |||
5 | config HAVE_NET_MACB | 5 | config HAVE_NET_MACB |
6 | bool | 6 | bool |
7 | 7 | ||
8 | config NET_ATMEL | 8 | config NET_CADENCE |
9 | bool "Atmel devices" | 9 | bool "Cadence devices" |
10 | default y | 10 | default y |
11 | depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200) | 11 | depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200) |
12 | ---help--- | 12 | ---help--- |
@@ -21,7 +21,7 @@ config NET_ATMEL | |||
21 | the remaining Atmel network card questions. If you say Y, you will be | 21 | the remaining Atmel network card questions. If you say Y, you will be |
22 | asked for your specific card in the following questions. | 22 | asked for your specific card in the following questions. |
23 | 23 | ||
24 | if NET_ATMEL | 24 | if NET_CADENCE |
25 | 25 | ||
26 | config ARM_AT91_ETHER | 26 | config ARM_AT91_ETHER |
27 | tristate "AT91RM9200 Ethernet support" | 27 | tristate "AT91RM9200 Ethernet support" |
@@ -33,14 +33,16 @@ config ARM_AT91_ETHER | |||
33 | ethernet support, then you should always answer Y to this. | 33 | ethernet support, then you should always answer Y to this. |
34 | 34 | ||
35 | config MACB | 35 | config MACB |
36 | tristate "Atmel MACB support" | 36 | tristate "Cadence MACB/GEM support" |
37 | depends on HAVE_NET_MACB | 37 | depends on HAVE_NET_MACB |
38 | select PHYLIB | 38 | select PHYLIB |
39 | ---help--- | 39 | ---help--- |
40 | The Atmel MACB ethernet interface is found on many AT32 and AT91 | 40 | The Cadence MACB ethernet interface is found on many Atmel AT32 and |
41 | parts. Say Y to include support for the MACB chip. | 41 | AT91 parts. This driver also supports the Cadence GEM (Gigabit |
42 | Ethernet MAC found in some ARM SoC devices). Note: the Gigabit mode | ||
43 | is not yet supported. Say Y to include support for the MACB/GEM chip. | ||
42 | 44 | ||
43 | To compile this driver as a module, choose M here: the module | 45 | To compile this driver as a module, choose M here: the module |
44 | will be called macb. | 46 | will be called macb. |
45 | 47 | ||
46 | endif # NET_ATMEL | 48 | endif # NET_CADENCE |
diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c index dfeb46cb3f74..1a5b6efa0120 100644 --- a/drivers/net/ethernet/cadence/at91_ether.c +++ b/drivers/net/ethernet/cadence/at91_ether.c | |||
@@ -256,8 +256,7 @@ static void enable_phyirq(struct net_device *dev) | |||
256 | unsigned int dsintr, irq_number; | 256 | unsigned int dsintr, irq_number; |
257 | int status; | 257 | int status; |
258 | 258 | ||
259 | irq_number = lp->board_data.phy_irq_pin; | 259 | if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { |
260 | if (!irq_number) { | ||
261 | /* | 260 | /* |
262 | * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), | 261 | * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), |
263 | * or board does not have it connected. | 262 | * or board does not have it connected. |
@@ -266,6 +265,7 @@ static void enable_phyirq(struct net_device *dev) | |||
266 | return; | 265 | return; |
267 | } | 266 | } |
268 | 267 | ||
268 | irq_number = lp->board_data.phy_irq_pin; | ||
269 | status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); | 269 | status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); |
270 | if (status) { | 270 | if (status) { |
271 | printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); | 271 | printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); |
@@ -320,8 +320,7 @@ static void disable_phyirq(struct net_device *dev) | |||
320 | unsigned int dsintr; | 320 | unsigned int dsintr; |
321 | unsigned int irq_number; | 321 | unsigned int irq_number; |
322 | 322 | ||
323 | irq_number = lp->board_data.phy_irq_pin; | 323 | if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { |
324 | if (!irq_number) { | ||
325 | del_timer_sync(&lp->check_timer); | 324 | del_timer_sync(&lp->check_timer); |
326 | return; | 325 | return; |
327 | } | 326 | } |
@@ -366,6 +365,7 @@ static void disable_phyirq(struct net_device *dev) | |||
366 | disable_mdi(); | 365 | disable_mdi(); |
367 | spin_unlock_irq(&lp->lock); | 366 | spin_unlock_irq(&lp->lock); |
368 | 367 | ||
368 | irq_number = lp->board_data.phy_irq_pin; | ||
369 | free_irq(irq_number, dev); /* Free interrupt handler */ | 369 | free_irq(irq_number, dev); /* Free interrupt handler */ |
370 | } | 370 | } |
371 | 371 | ||
@@ -1078,7 +1078,7 @@ static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_add | |||
1078 | netif_carrier_off(dev); /* will be enabled in open() */ | 1078 | netif_carrier_off(dev); /* will be enabled in open() */ |
1079 | 1079 | ||
1080 | /* If board has no PHY IRQ, use a timer to poll the PHY */ | 1080 | /* If board has no PHY IRQ, use a timer to poll the PHY */ |
1081 | if (!lp->board_data.phy_irq_pin) { | 1081 | if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { |
1082 | init_timer(&lp->check_timer); | 1082 | init_timer(&lp->check_timer); |
1083 | lp->check_timer.data = (unsigned long)dev; | 1083 | lp->check_timer.data = (unsigned long)dev; |
1084 | lp->check_timer.function = at91ether_check_link; | 1084 | lp->check_timer.function = at91ether_check_link; |
@@ -1170,7 +1170,8 @@ static int __devexit at91ether_remove(struct platform_device *pdev) | |||
1170 | struct net_device *dev = platform_get_drvdata(pdev); | 1170 | struct net_device *dev = platform_get_drvdata(pdev); |
1171 | struct at91_private *lp = netdev_priv(dev); | 1171 | struct at91_private *lp = netdev_priv(dev); |
1172 | 1172 | ||
1173 | if (lp->board_data.phy_irq_pin >= 32) | 1173 | if (gpio_is_valid(lp->board_data.phy_irq_pin) && |
1174 | lp->board_data.phy_irq_pin >= 32) | ||
1174 | gpio_free(lp->board_data.phy_irq_pin); | 1175 | gpio_free(lp->board_data.phy_irq_pin); |
1175 | 1176 | ||
1176 | unregister_netdev(dev); | 1177 | unregister_netdev(dev); |
@@ -1189,11 +1190,12 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1189 | { | 1190 | { |
1190 | struct net_device *net_dev = platform_get_drvdata(pdev); | 1191 | struct net_device *net_dev = platform_get_drvdata(pdev); |
1191 | struct at91_private *lp = netdev_priv(net_dev); | 1192 | struct at91_private *lp = netdev_priv(net_dev); |
1192 | int phy_irq = lp->board_data.phy_irq_pin; | ||
1193 | 1193 | ||
1194 | if (netif_running(net_dev)) { | 1194 | if (netif_running(net_dev)) { |
1195 | if (phy_irq) | 1195 | if (gpio_is_valid(lp->board_data.phy_irq_pin)) { |
1196 | int phy_irq = lp->board_data.phy_irq_pin; | ||
1196 | disable_irq(phy_irq); | 1197 | disable_irq(phy_irq); |
1198 | } | ||
1197 | 1199 | ||
1198 | netif_stop_queue(net_dev); | 1200 | netif_stop_queue(net_dev); |
1199 | netif_device_detach(net_dev); | 1201 | netif_device_detach(net_dev); |
@@ -1207,7 +1209,6 @@ static int at91ether_resume(struct platform_device *pdev) | |||
1207 | { | 1209 | { |
1208 | struct net_device *net_dev = platform_get_drvdata(pdev); | 1210 | struct net_device *net_dev = platform_get_drvdata(pdev); |
1209 | struct at91_private *lp = netdev_priv(net_dev); | 1211 | struct at91_private *lp = netdev_priv(net_dev); |
1210 | int phy_irq = lp->board_data.phy_irq_pin; | ||
1211 | 1212 | ||
1212 | if (netif_running(net_dev)) { | 1213 | if (netif_running(net_dev)) { |
1213 | clk_enable(lp->ether_clk); | 1214 | clk_enable(lp->ether_clk); |
@@ -1215,8 +1216,10 @@ static int at91ether_resume(struct platform_device *pdev) | |||
1215 | netif_device_attach(net_dev); | 1216 | netif_device_attach(net_dev); |
1216 | netif_start_queue(net_dev); | 1217 | netif_start_queue(net_dev); |
1217 | 1218 | ||
1218 | if (phy_irq) | 1219 | if (gpio_is_valid(lp->board_data.phy_irq_pin)) { |
1220 | int phy_irq = lp->board_data.phy_irq_pin; | ||
1219 | enable_irq(phy_irq); | 1221 | enable_irq(phy_irq); |
1222 | } | ||
1220 | } | 1223 | } |
1221 | return 0; | 1224 | return 0; |
1222 | } | 1225 | } |
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index aa1d597091a8..f3d5c65d99cf 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Atmel MACB Ethernet Controller driver | 2 | * Cadence MACB/GEM Ethernet Controller driver |
3 | * | 3 | * |
4 | * Copyright (C) 2004-2006 Atmel Corporation | 4 | * Copyright (C) 2004-2006 Atmel Corporation |
5 | * | 5 | * |
@@ -23,6 +23,9 @@ | |||
23 | #include <linux/platform_data/macb.h> | 23 | #include <linux/platform_data/macb.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/phy.h> | 25 | #include <linux/phy.h> |
26 | #include <linux/of.h> | ||
27 | #include <linux/of_device.h> | ||
28 | #include <linux/of_net.h> | ||
26 | 29 | ||
27 | #include "macb.h" | 30 | #include "macb.h" |
28 | 31 | ||
@@ -59,9 +62,9 @@ static void __macb_set_hwaddr(struct macb *bp) | |||
59 | u16 top; | 62 | u16 top; |
60 | 63 | ||
61 | bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); | 64 | bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); |
62 | macb_writel(bp, SA1B, bottom); | 65 | macb_or_gem_writel(bp, SA1B, bottom); |
63 | top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); | 66 | top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); |
64 | macb_writel(bp, SA1T, top); | 67 | macb_or_gem_writel(bp, SA1T, top); |
65 | } | 68 | } |
66 | 69 | ||
67 | static void __init macb_get_hwaddr(struct macb *bp) | 70 | static void __init macb_get_hwaddr(struct macb *bp) |
@@ -70,8 +73,8 @@ static void __init macb_get_hwaddr(struct macb *bp) | |||
70 | u16 top; | 73 | u16 top; |
71 | u8 addr[6]; | 74 | u8 addr[6]; |
72 | 75 | ||
73 | bottom = macb_readl(bp, SA1B); | 76 | bottom = macb_or_gem_readl(bp, SA1B); |
74 | top = macb_readl(bp, SA1T); | 77 | top = macb_or_gem_readl(bp, SA1T); |
75 | 78 | ||
76 | addr[0] = bottom & 0xff; | 79 | addr[0] = bottom & 0xff; |
77 | addr[1] = (bottom >> 8) & 0xff; | 80 | addr[1] = (bottom >> 8) & 0xff; |
@@ -191,7 +194,6 @@ static int macb_mii_probe(struct net_device *dev) | |||
191 | { | 194 | { |
192 | struct macb *bp = netdev_priv(dev); | 195 | struct macb *bp = netdev_priv(dev); |
193 | struct phy_device *phydev; | 196 | struct phy_device *phydev; |
194 | struct macb_platform_data *pdata; | ||
195 | int ret; | 197 | int ret; |
196 | 198 | ||
197 | phydev = phy_find_first(bp->mii_bus); | 199 | phydev = phy_find_first(bp->mii_bus); |
@@ -200,14 +202,11 @@ static int macb_mii_probe(struct net_device *dev) | |||
200 | return -1; | 202 | return -1; |
201 | } | 203 | } |
202 | 204 | ||
203 | pdata = bp->pdev->dev.platform_data; | ||
204 | /* TODO : add pin_irq */ | 205 | /* TODO : add pin_irq */ |
205 | 206 | ||
206 | /* attach the mac to the phy */ | 207 | /* attach the mac to the phy */ |
207 | ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, | 208 | ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, |
208 | pdata && pdata->is_rmii ? | 209 | bp->phy_interface); |
209 | PHY_INTERFACE_MODE_RMII : | ||
210 | PHY_INTERFACE_MODE_MII); | ||
211 | if (ret) { | 210 | if (ret) { |
212 | netdev_err(dev, "Could not attach to PHY\n"); | 211 | netdev_err(dev, "Could not attach to PHY\n"); |
213 | return ret; | 212 | return ret; |
@@ -285,8 +284,8 @@ err_out: | |||
285 | static void macb_update_stats(struct macb *bp) | 284 | static void macb_update_stats(struct macb *bp) |
286 | { | 285 | { |
287 | u32 __iomem *reg = bp->regs + MACB_PFR; | 286 | u32 __iomem *reg = bp->regs + MACB_PFR; |
288 | u32 *p = &bp->hw_stats.rx_pause_frames; | 287 | u32 *p = &bp->hw_stats.macb.rx_pause_frames; |
289 | u32 *end = &bp->hw_stats.tx_pause_frames + 1; | 288 | u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; |
290 | 289 | ||
291 | WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); | 290 | WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); |
292 | 291 | ||
@@ -580,7 +579,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
580 | 579 | ||
581 | if (status & MACB_BIT(ISR_ROVR)) { | 580 | if (status & MACB_BIT(ISR_ROVR)) { |
582 | /* We missed at least one packet */ | 581 | /* We missed at least one packet */ |
583 | bp->hw_stats.rx_overruns++; | 582 | if (macb_is_gem(bp)) |
583 | bp->hw_stats.gem.rx_overruns++; | ||
584 | else | ||
585 | bp->hw_stats.macb.rx_overruns++; | ||
584 | } | 586 | } |
585 | 587 | ||
586 | if (status & MACB_BIT(HRESP)) { | 588 | if (status & MACB_BIT(HRESP)) { |
@@ -790,6 +792,84 @@ static void macb_reset_hw(struct macb *bp) | |||
790 | macb_readl(bp, ISR); | 792 | macb_readl(bp, ISR); |
791 | } | 793 | } |
792 | 794 | ||
795 | static u32 gem_mdc_clk_div(struct macb *bp) | ||
796 | { | ||
797 | u32 config; | ||
798 | unsigned long pclk_hz = clk_get_rate(bp->pclk); | ||
799 | |||
800 | if (pclk_hz <= 20000000) | ||
801 | config = GEM_BF(CLK, GEM_CLK_DIV8); | ||
802 | else if (pclk_hz <= 40000000) | ||
803 | config = GEM_BF(CLK, GEM_CLK_DIV16); | ||
804 | else if (pclk_hz <= 80000000) | ||
805 | config = GEM_BF(CLK, GEM_CLK_DIV32); | ||
806 | else if (pclk_hz <= 120000000) | ||
807 | config = GEM_BF(CLK, GEM_CLK_DIV48); | ||
808 | else if (pclk_hz <= 160000000) | ||
809 | config = GEM_BF(CLK, GEM_CLK_DIV64); | ||
810 | else | ||
811 | config = GEM_BF(CLK, GEM_CLK_DIV96); | ||
812 | |||
813 | return config; | ||
814 | } | ||
815 | |||
816 | static u32 macb_mdc_clk_div(struct macb *bp) | ||
817 | { | ||
818 | u32 config; | ||
819 | unsigned long pclk_hz; | ||
820 | |||
821 | if (macb_is_gem(bp)) | ||
822 | return gem_mdc_clk_div(bp); | ||
823 | |||
824 | pclk_hz = clk_get_rate(bp->pclk); | ||
825 | if (pclk_hz <= 20000000) | ||
826 | config = MACB_BF(CLK, MACB_CLK_DIV8); | ||
827 | else if (pclk_hz <= 40000000) | ||
828 | config = MACB_BF(CLK, MACB_CLK_DIV16); | ||
829 | else if (pclk_hz <= 80000000) | ||
830 | config = MACB_BF(CLK, MACB_CLK_DIV32); | ||
831 | else | ||
832 | config = MACB_BF(CLK, MACB_CLK_DIV64); | ||
833 | |||
834 | return config; | ||
835 | } | ||
836 | |||
837 | /* | ||
838 | * Get the DMA bus width field of the network configuration register that we | ||
839 | * should program. We find the width from decoding the design configuration | ||
840 | * register to find the maximum supported data bus width. | ||
841 | */ | ||
842 | static u32 macb_dbw(struct macb *bp) | ||
843 | { | ||
844 | if (!macb_is_gem(bp)) | ||
845 | return 0; | ||
846 | |||
847 | switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) { | ||
848 | case 4: | ||
849 | return GEM_BF(DBW, GEM_DBW128); | ||
850 | case 2: | ||
851 | return GEM_BF(DBW, GEM_DBW64); | ||
852 | case 1: | ||
853 | default: | ||
854 | return GEM_BF(DBW, GEM_DBW32); | ||
855 | } | ||
856 | } | ||
857 | |||
858 | /* | ||
859 | * Configure the receive DMA engine to use the correct receive buffer size. | ||
860 | * This is a configurable parameter for GEM. | ||
861 | */ | ||
862 | static void macb_configure_dma(struct macb *bp) | ||
863 | { | ||
864 | u32 dmacfg; | ||
865 | |||
866 | if (macb_is_gem(bp)) { | ||
867 | dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); | ||
868 | dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64); | ||
869 | gem_writel(bp, DMACFG, dmacfg); | ||
870 | } | ||
871 | } | ||
872 | |||
793 | static void macb_init_hw(struct macb *bp) | 873 | static void macb_init_hw(struct macb *bp) |
794 | { | 874 | { |
795 | u32 config; | 875 | u32 config; |
@@ -797,7 +877,7 @@ static void macb_init_hw(struct macb *bp) | |||
797 | macb_reset_hw(bp); | 877 | macb_reset_hw(bp); |
798 | __macb_set_hwaddr(bp); | 878 | __macb_set_hwaddr(bp); |
799 | 879 | ||
800 | config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L); | 880 | config = macb_mdc_clk_div(bp); |
801 | config |= MACB_BIT(PAE); /* PAuse Enable */ | 881 | config |= MACB_BIT(PAE); /* PAuse Enable */ |
802 | config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ | 882 | config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ |
803 | config |= MACB_BIT(BIG); /* Receive oversized frames */ | 883 | config |= MACB_BIT(BIG); /* Receive oversized frames */ |
@@ -805,8 +885,11 @@ static void macb_init_hw(struct macb *bp) | |||
805 | config |= MACB_BIT(CAF); /* Copy All Frames */ | 885 | config |= MACB_BIT(CAF); /* Copy All Frames */ |
806 | if (!(bp->dev->flags & IFF_BROADCAST)) | 886 | if (!(bp->dev->flags & IFF_BROADCAST)) |
807 | config |= MACB_BIT(NBC); /* No BroadCast */ | 887 | config |= MACB_BIT(NBC); /* No BroadCast */ |
888 | config |= macb_dbw(bp); | ||
808 | macb_writel(bp, NCFGR, config); | 889 | macb_writel(bp, NCFGR, config); |
809 | 890 | ||
891 | macb_configure_dma(bp); | ||
892 | |||
810 | /* Initialize TX and RX buffers */ | 893 | /* Initialize TX and RX buffers */ |
811 | macb_writel(bp, RBQP, bp->rx_ring_dma); | 894 | macb_writel(bp, RBQP, bp->rx_ring_dma); |
812 | macb_writel(bp, TBQP, bp->tx_ring_dma); | 895 | macb_writel(bp, TBQP, bp->tx_ring_dma); |
@@ -902,8 +985,8 @@ static void macb_sethashtable(struct net_device *dev) | |||
902 | mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); | 985 | mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); |
903 | } | 986 | } |
904 | 987 | ||
905 | macb_writel(bp, HRB, mc_filter[0]); | 988 | macb_or_gem_writel(bp, HRB, mc_filter[0]); |
906 | macb_writel(bp, HRT, mc_filter[1]); | 989 | macb_or_gem_writel(bp, HRT, mc_filter[1]); |
907 | } | 990 | } |
908 | 991 | ||
909 | /* | 992 | /* |
@@ -925,8 +1008,8 @@ static void macb_set_rx_mode(struct net_device *dev) | |||
925 | 1008 | ||
926 | if (dev->flags & IFF_ALLMULTI) { | 1009 | if (dev->flags & IFF_ALLMULTI) { |
927 | /* Enable all multicast mode */ | 1010 | /* Enable all multicast mode */ |
928 | macb_writel(bp, HRB, -1); | 1011 | macb_or_gem_writel(bp, HRB, -1); |
929 | macb_writel(bp, HRT, -1); | 1012 | macb_or_gem_writel(bp, HRT, -1); |
930 | cfg |= MACB_BIT(NCFGR_MTI); | 1013 | cfg |= MACB_BIT(NCFGR_MTI); |
931 | } else if (!netdev_mc_empty(dev)) { | 1014 | } else if (!netdev_mc_empty(dev)) { |
932 | /* Enable specific multicasts */ | 1015 | /* Enable specific multicasts */ |
@@ -934,8 +1017,8 @@ static void macb_set_rx_mode(struct net_device *dev) | |||
934 | cfg |= MACB_BIT(NCFGR_MTI); | 1017 | cfg |= MACB_BIT(NCFGR_MTI); |
935 | } else if (dev->flags & (~IFF_ALLMULTI)) { | 1018 | } else if (dev->flags & (~IFF_ALLMULTI)) { |
936 | /* Disable all multicast mode */ | 1019 | /* Disable all multicast mode */ |
937 | macb_writel(bp, HRB, 0); | 1020 | macb_or_gem_writel(bp, HRB, 0); |
938 | macb_writel(bp, HRT, 0); | 1021 | macb_or_gem_writel(bp, HRT, 0); |
939 | cfg &= ~MACB_BIT(NCFGR_MTI); | 1022 | cfg &= ~MACB_BIT(NCFGR_MTI); |
940 | } | 1023 | } |
941 | 1024 | ||
@@ -997,11 +1080,62 @@ static int macb_close(struct net_device *dev) | |||
997 | return 0; | 1080 | return 0; |
998 | } | 1081 | } |
999 | 1082 | ||
1083 | static void gem_update_stats(struct macb *bp) | ||
1084 | { | ||
1085 | u32 __iomem *reg = bp->regs + GEM_OTX; | ||
1086 | u32 *p = &bp->hw_stats.gem.tx_octets_31_0; | ||
1087 | u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1; | ||
1088 | |||
1089 | for (; p < end; p++, reg++) | ||
1090 | *p += __raw_readl(reg); | ||
1091 | } | ||
1092 | |||
1093 | static struct net_device_stats *gem_get_stats(struct macb *bp) | ||
1094 | { | ||
1095 | struct gem_stats *hwstat = &bp->hw_stats.gem; | ||
1096 | struct net_device_stats *nstat = &bp->stats; | ||
1097 | |||
1098 | gem_update_stats(bp); | ||
1099 | |||
1100 | nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors + | ||
1101 | hwstat->rx_alignment_errors + | ||
1102 | hwstat->rx_resource_errors + | ||
1103 | hwstat->rx_overruns + | ||
1104 | hwstat->rx_oversize_frames + | ||
1105 | hwstat->rx_jabbers + | ||
1106 | hwstat->rx_undersized_frames + | ||
1107 | hwstat->rx_length_field_frame_errors); | ||
1108 | nstat->tx_errors = (hwstat->tx_late_collisions + | ||
1109 | hwstat->tx_excessive_collisions + | ||
1110 | hwstat->tx_underrun + | ||
1111 | hwstat->tx_carrier_sense_errors); | ||
1112 | nstat->multicast = hwstat->rx_multicast_frames; | ||
1113 | nstat->collisions = (hwstat->tx_single_collision_frames + | ||
1114 | hwstat->tx_multiple_collision_frames + | ||
1115 | hwstat->tx_excessive_collisions); | ||
1116 | nstat->rx_length_errors = (hwstat->rx_oversize_frames + | ||
1117 | hwstat->rx_jabbers + | ||
1118 | hwstat->rx_undersized_frames + | ||
1119 | hwstat->rx_length_field_frame_errors); | ||
1120 | nstat->rx_over_errors = hwstat->rx_resource_errors; | ||
1121 | nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors; | ||
1122 | nstat->rx_frame_errors = hwstat->rx_alignment_errors; | ||
1123 | nstat->rx_fifo_errors = hwstat->rx_overruns; | ||
1124 | nstat->tx_aborted_errors = hwstat->tx_excessive_collisions; | ||
1125 | nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors; | ||
1126 | nstat->tx_fifo_errors = hwstat->tx_underrun; | ||
1127 | |||
1128 | return nstat; | ||
1129 | } | ||
1130 | |||
1000 | static struct net_device_stats *macb_get_stats(struct net_device *dev) | 1131 | static struct net_device_stats *macb_get_stats(struct net_device *dev) |
1001 | { | 1132 | { |
1002 | struct macb *bp = netdev_priv(dev); | 1133 | struct macb *bp = netdev_priv(dev); |
1003 | struct net_device_stats *nstat = &bp->stats; | 1134 | struct net_device_stats *nstat = &bp->stats; |
1004 | struct macb_stats *hwstat = &bp->hw_stats; | 1135 | struct macb_stats *hwstat = &bp->hw_stats.macb; |
1136 | |||
1137 | if (macb_is_gem(bp)) | ||
1138 | return gem_get_stats(bp); | ||
1005 | 1139 | ||
1006 | /* read stats from hardware */ | 1140 | /* read stats from hardware */ |
1007 | macb_update_stats(bp); | 1141 | macb_update_stats(bp); |
@@ -1109,6 +1243,52 @@ static const struct net_device_ops macb_netdev_ops = { | |||
1109 | #endif | 1243 | #endif |
1110 | }; | 1244 | }; |
1111 | 1245 | ||
1246 | #if defined(CONFIG_OF) | ||
1247 | static const struct of_device_id macb_dt_ids[] = { | ||
1248 | { .compatible = "cdns,at32ap7000-macb" }, | ||
1249 | { .compatible = "cdns,at91sam9260-macb" }, | ||
1250 | { .compatible = "cdns,macb" }, | ||
1251 | { .compatible = "cdns,pc302-gem" }, | ||
1252 | { .compatible = "cdns,gem" }, | ||
1253 | { /* sentinel */ } | ||
1254 | }; | ||
1255 | |||
1256 | MODULE_DEVICE_TABLE(of, macb_dt_ids); | ||
1257 | |||
1258 | static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev) | ||
1259 | { | ||
1260 | struct device_node *np = pdev->dev.of_node; | ||
1261 | |||
1262 | if (np) | ||
1263 | return of_get_phy_mode(np); | ||
1264 | |||
1265 | return -ENODEV; | ||
1266 | } | ||
1267 | |||
1268 | static int __devinit macb_get_hwaddr_dt(struct macb *bp) | ||
1269 | { | ||
1270 | struct device_node *np = bp->pdev->dev.of_node; | ||
1271 | if (np) { | ||
1272 | const char *mac = of_get_mac_address(np); | ||
1273 | if (mac) { | ||
1274 | memcpy(bp->dev->dev_addr, mac, ETH_ALEN); | ||
1275 | return 0; | ||
1276 | } | ||
1277 | } | ||
1278 | |||
1279 | return -ENODEV; | ||
1280 | } | ||
1281 | #else | ||
1282 | static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev) | ||
1283 | { | ||
1284 | return -ENODEV; | ||
1285 | } | ||
1286 | static int __devinit macb_get_hwaddr_dt(struct macb *bp) | ||
1287 | { | ||
1288 | return -ENODEV; | ||
1289 | } | ||
1290 | #endif | ||
1291 | |||
1112 | static int __init macb_probe(struct platform_device *pdev) | 1292 | static int __init macb_probe(struct platform_device *pdev) |
1113 | { | 1293 | { |
1114 | struct macb_platform_data *pdata; | 1294 | struct macb_platform_data *pdata; |
@@ -1116,7 +1296,6 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1116 | struct net_device *dev; | 1296 | struct net_device *dev; |
1117 | struct macb *bp; | 1297 | struct macb *bp; |
1118 | struct phy_device *phydev; | 1298 | struct phy_device *phydev; |
1119 | unsigned long pclk_hz; | ||
1120 | u32 config; | 1299 | u32 config; |
1121 | int err = -ENXIO; | 1300 | int err = -ENXIO; |
1122 | 1301 | ||
@@ -1180,31 +1359,37 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1180 | dev->base_addr = regs->start; | 1359 | dev->base_addr = regs->start; |
1181 | 1360 | ||
1182 | /* Set MII management clock divider */ | 1361 | /* Set MII management clock divider */ |
1183 | pclk_hz = clk_get_rate(bp->pclk); | 1362 | config = macb_mdc_clk_div(bp); |
1184 | if (pclk_hz <= 20000000) | 1363 | config |= macb_dbw(bp); |
1185 | config = MACB_BF(CLK, MACB_CLK_DIV8); | ||
1186 | else if (pclk_hz <= 40000000) | ||
1187 | config = MACB_BF(CLK, MACB_CLK_DIV16); | ||
1188 | else if (pclk_hz <= 80000000) | ||
1189 | config = MACB_BF(CLK, MACB_CLK_DIV32); | ||
1190 | else | ||
1191 | config = MACB_BF(CLK, MACB_CLK_DIV64); | ||
1192 | macb_writel(bp, NCFGR, config); | 1364 | macb_writel(bp, NCFGR, config); |
1193 | 1365 | ||
1194 | macb_get_hwaddr(bp); | 1366 | err = macb_get_hwaddr_dt(bp); |
1195 | pdata = pdev->dev.platform_data; | 1367 | if (err < 0) |
1368 | macb_get_hwaddr(bp); | ||
1369 | |||
1370 | err = macb_get_phy_mode_dt(pdev); | ||
1371 | if (err < 0) { | ||
1372 | pdata = pdev->dev.platform_data; | ||
1373 | if (pdata && pdata->is_rmii) | ||
1374 | bp->phy_interface = PHY_INTERFACE_MODE_RMII; | ||
1375 | else | ||
1376 | bp->phy_interface = PHY_INTERFACE_MODE_MII; | ||
1377 | } else { | ||
1378 | bp->phy_interface = err; | ||
1379 | } | ||
1196 | 1380 | ||
1197 | if (pdata && pdata->is_rmii) | 1381 | if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) |
1198 | #if defined(CONFIG_ARCH_AT91) | 1382 | #if defined(CONFIG_ARCH_AT91) |
1199 | macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) ); | 1383 | macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) | |
1384 | MACB_BIT(CLKEN))); | ||
1200 | #else | 1385 | #else |
1201 | macb_writel(bp, USRIO, 0); | 1386 | macb_or_gem_writel(bp, USRIO, 0); |
1202 | #endif | 1387 | #endif |
1203 | else | 1388 | else |
1204 | #if defined(CONFIG_ARCH_AT91) | 1389 | #if defined(CONFIG_ARCH_AT91) |
1205 | macb_writel(bp, USRIO, MACB_BIT(CLKEN)); | 1390 | macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN)); |
1206 | #else | 1391 | #else |
1207 | macb_writel(bp, USRIO, MACB_BIT(MII)); | 1392 | macb_or_gem_writel(bp, USRIO, MACB_BIT(MII)); |
1208 | #endif | 1393 | #endif |
1209 | 1394 | ||
1210 | bp->tx_pending = DEF_TX_RING_PENDING; | 1395 | bp->tx_pending = DEF_TX_RING_PENDING; |
@@ -1221,8 +1406,9 @@ static int __init macb_probe(struct platform_device *pdev) | |||
1221 | 1406 | ||
1222 | platform_set_drvdata(pdev, dev); | 1407 | platform_set_drvdata(pdev, dev); |
1223 | 1408 | ||
1224 | netdev_info(dev, "Atmel MACB at 0x%08lx irq %d (%pM)\n", | 1409 | netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n", |
1225 | dev->base_addr, dev->irq, dev->dev_addr); | 1410 | macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr, |
1411 | dev->irq, dev->dev_addr); | ||
1226 | 1412 | ||
1227 | phydev = bp->phy_dev; | 1413 | phydev = bp->phy_dev; |
1228 | netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", | 1414 | netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", |
@@ -1315,6 +1501,7 @@ static struct platform_driver macb_driver = { | |||
1315 | .driver = { | 1501 | .driver = { |
1316 | .name = "macb", | 1502 | .name = "macb", |
1317 | .owner = THIS_MODULE, | 1503 | .owner = THIS_MODULE, |
1504 | .of_match_table = of_match_ptr(macb_dt_ids), | ||
1318 | }, | 1505 | }, |
1319 | }; | 1506 | }; |
1320 | 1507 | ||
@@ -1332,6 +1519,6 @@ module_init(macb_init); | |||
1332 | module_exit(macb_exit); | 1519 | module_exit(macb_exit); |
1333 | 1520 | ||
1334 | MODULE_LICENSE("GPL"); | 1521 | MODULE_LICENSE("GPL"); |
1335 | MODULE_DESCRIPTION("Atmel MACB Ethernet driver"); | 1522 | MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver"); |
1336 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); | 1523 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
1337 | MODULE_ALIAS("platform:macb"); | 1524 | MODULE_ALIAS("platform:macb"); |
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index d3212f6db703..335e288f5314 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h | |||
@@ -59,6 +59,24 @@ | |||
59 | #define MACB_TPQ 0x00bc | 59 | #define MACB_TPQ 0x00bc |
60 | #define MACB_USRIO 0x00c0 | 60 | #define MACB_USRIO 0x00c0 |
61 | #define MACB_WOL 0x00c4 | 61 | #define MACB_WOL 0x00c4 |
62 | #define MACB_MID 0x00fc | ||
63 | |||
64 | /* GEM register offsets. */ | ||
65 | #define GEM_NCFGR 0x0004 | ||
66 | #define GEM_USRIO 0x000c | ||
67 | #define GEM_DMACFG 0x0010 | ||
68 | #define GEM_HRB 0x0080 | ||
69 | #define GEM_HRT 0x0084 | ||
70 | #define GEM_SA1B 0x0088 | ||
71 | #define GEM_SA1T 0x008C | ||
72 | #define GEM_OTX 0x0100 | ||
73 | #define GEM_DCFG1 0x0280 | ||
74 | #define GEM_DCFG2 0x0284 | ||
75 | #define GEM_DCFG3 0x0288 | ||
76 | #define GEM_DCFG4 0x028c | ||
77 | #define GEM_DCFG5 0x0290 | ||
78 | #define GEM_DCFG6 0x0294 | ||
79 | #define GEM_DCFG7 0x0298 | ||
62 | 80 | ||
63 | /* Bitfields in NCR */ | 81 | /* Bitfields in NCR */ |
64 | #define MACB_LB_OFFSET 0 | 82 | #define MACB_LB_OFFSET 0 |
@@ -126,6 +144,21 @@ | |||
126 | #define MACB_IRXFCS_OFFSET 19 | 144 | #define MACB_IRXFCS_OFFSET 19 |
127 | #define MACB_IRXFCS_SIZE 1 | 145 | #define MACB_IRXFCS_SIZE 1 |
128 | 146 | ||
147 | /* GEM specific NCFGR bitfields. */ | ||
148 | #define GEM_CLK_OFFSET 18 | ||
149 | #define GEM_CLK_SIZE 3 | ||
150 | #define GEM_DBW_OFFSET 21 | ||
151 | #define GEM_DBW_SIZE 2 | ||
152 | |||
153 | /* Constants for data bus width. */ | ||
154 | #define GEM_DBW32 0 | ||
155 | #define GEM_DBW64 1 | ||
156 | #define GEM_DBW128 2 | ||
157 | |||
158 | /* Bitfields in DMACFG. */ | ||
159 | #define GEM_RXBS_OFFSET 16 | ||
160 | #define GEM_RXBS_SIZE 8 | ||
161 | |||
129 | /* Bitfields in NSR */ | 162 | /* Bitfields in NSR */ |
130 | #define MACB_NSR_LINK_OFFSET 0 | 163 | #define MACB_NSR_LINK_OFFSET 0 |
131 | #define MACB_NSR_LINK_SIZE 1 | 164 | #define MACB_NSR_LINK_SIZE 1 |
@@ -228,12 +261,30 @@ | |||
228 | #define MACB_WOL_MTI_OFFSET 19 | 261 | #define MACB_WOL_MTI_OFFSET 19 |
229 | #define MACB_WOL_MTI_SIZE 1 | 262 | #define MACB_WOL_MTI_SIZE 1 |
230 | 263 | ||
264 | /* Bitfields in MID */ | ||
265 | #define MACB_IDNUM_OFFSET 16 | ||
266 | #define MACB_IDNUM_SIZE 16 | ||
267 | #define MACB_REV_OFFSET 0 | ||
268 | #define MACB_REV_SIZE 16 | ||
269 | |||
270 | /* Bitfields in DCFG1. */ | ||
271 | #define GEM_DBWDEF_OFFSET 25 | ||
272 | #define GEM_DBWDEF_SIZE 3 | ||
273 | |||
231 | /* Constants for CLK */ | 274 | /* Constants for CLK */ |
232 | #define MACB_CLK_DIV8 0 | 275 | #define MACB_CLK_DIV8 0 |
233 | #define MACB_CLK_DIV16 1 | 276 | #define MACB_CLK_DIV16 1 |
234 | #define MACB_CLK_DIV32 2 | 277 | #define MACB_CLK_DIV32 2 |
235 | #define MACB_CLK_DIV64 3 | 278 | #define MACB_CLK_DIV64 3 |
236 | 279 | ||
280 | /* GEM specific constants for CLK. */ | ||
281 | #define GEM_CLK_DIV8 0 | ||
282 | #define GEM_CLK_DIV16 1 | ||
283 | #define GEM_CLK_DIV32 2 | ||
284 | #define GEM_CLK_DIV48 3 | ||
285 | #define GEM_CLK_DIV64 4 | ||
286 | #define GEM_CLK_DIV96 5 | ||
287 | |||
237 | /* Constants for MAN register */ | 288 | /* Constants for MAN register */ |
238 | #define MACB_MAN_SOF 1 | 289 | #define MACB_MAN_SOF 1 |
239 | #define MACB_MAN_WRITE 1 | 290 | #define MACB_MAN_WRITE 1 |
@@ -254,11 +305,52 @@ | |||
254 | << MACB_##name##_OFFSET)) \ | 305 | << MACB_##name##_OFFSET)) \ |
255 | | MACB_BF(name,value)) | 306 | | MACB_BF(name,value)) |
256 | 307 | ||
308 | #define GEM_BIT(name) \ | ||
309 | (1 << GEM_##name##_OFFSET) | ||
310 | #define GEM_BF(name, value) \ | ||
311 | (((value) & ((1 << GEM_##name##_SIZE) - 1)) \ | ||
312 | << GEM_##name##_OFFSET) | ||
313 | #define GEM_BFEXT(name, value)\ | ||
314 | (((value) >> GEM_##name##_OFFSET) \ | ||
315 | & ((1 << GEM_##name##_SIZE) - 1)) | ||
316 | #define GEM_BFINS(name, value, old) \ | ||
317 | (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \ | ||
318 | << GEM_##name##_OFFSET)) \ | ||
319 | | GEM_BF(name, value)) | ||
320 | |||
257 | /* Register access macros */ | 321 | /* Register access macros */ |
258 | #define macb_readl(port,reg) \ | 322 | #define macb_readl(port,reg) \ |
259 | __raw_readl((port)->regs + MACB_##reg) | 323 | __raw_readl((port)->regs + MACB_##reg) |
260 | #define macb_writel(port,reg,value) \ | 324 | #define macb_writel(port,reg,value) \ |
261 | __raw_writel((value), (port)->regs + MACB_##reg) | 325 | __raw_writel((value), (port)->regs + MACB_##reg) |
326 | #define gem_readl(port, reg) \ | ||
327 | __raw_readl((port)->regs + GEM_##reg) | ||
328 | #define gem_writel(port, reg, value) \ | ||
329 | __raw_writel((value), (port)->regs + GEM_##reg) | ||
330 | |||
331 | /* | ||
332 | * Conditional GEM/MACB macros. These perform the operation to the correct | ||
333 | * register dependent on whether the device is a GEM or a MACB. For registers | ||
334 | * and bitfields that are common across both devices, use macb_{read,write}l | ||
335 | * to avoid the cost of the conditional. | ||
336 | */ | ||
337 | #define macb_or_gem_writel(__bp, __reg, __value) \ | ||
338 | ({ \ | ||
339 | if (macb_is_gem((__bp))) \ | ||
340 | gem_writel((__bp), __reg, __value); \ | ||
341 | else \ | ||
342 | macb_writel((__bp), __reg, __value); \ | ||
343 | }) | ||
344 | |||
345 | #define macb_or_gem_readl(__bp, __reg) \ | ||
346 | ({ \ | ||
347 | u32 __v; \ | ||
348 | if (macb_is_gem((__bp))) \ | ||
349 | __v = gem_readl((__bp), __reg); \ | ||
350 | else \ | ||
351 | __v = macb_readl((__bp), __reg); \ | ||
352 | __v; \ | ||
353 | }) | ||
262 | 354 | ||
263 | struct dma_desc { | 355 | struct dma_desc { |
264 | u32 addr; | 356 | u32 addr; |
@@ -358,6 +450,54 @@ struct macb_stats { | |||
358 | u32 tx_pause_frames; | 450 | u32 tx_pause_frames; |
359 | }; | 451 | }; |
360 | 452 | ||
453 | struct gem_stats { | ||
454 | u32 tx_octets_31_0; | ||
455 | u32 tx_octets_47_32; | ||
456 | u32 tx_frames; | ||
457 | u32 tx_broadcast_frames; | ||
458 | u32 tx_multicast_frames; | ||
459 | u32 tx_pause_frames; | ||
460 | u32 tx_64_byte_frames; | ||
461 | u32 tx_65_127_byte_frames; | ||
462 | u32 tx_128_255_byte_frames; | ||
463 | u32 tx_256_511_byte_frames; | ||
464 | u32 tx_512_1023_byte_frames; | ||
465 | u32 tx_1024_1518_byte_frames; | ||
466 | u32 tx_greater_than_1518_byte_frames; | ||
467 | u32 tx_underrun; | ||
468 | u32 tx_single_collision_frames; | ||
469 | u32 tx_multiple_collision_frames; | ||
470 | u32 tx_excessive_collisions; | ||
471 | u32 tx_late_collisions; | ||
472 | u32 tx_deferred_frames; | ||
473 | u32 tx_carrier_sense_errors; | ||
474 | u32 rx_octets_31_0; | ||
475 | u32 rx_octets_47_32; | ||
476 | u32 rx_frames; | ||
477 | u32 rx_broadcast_frames; | ||
478 | u32 rx_multicast_frames; | ||
479 | u32 rx_pause_frames; | ||
480 | u32 rx_64_byte_frames; | ||
481 | u32 rx_65_127_byte_frames; | ||
482 | u32 rx_128_255_byte_frames; | ||
483 | u32 rx_256_511_byte_frames; | ||
484 | u32 rx_512_1023_byte_frames; | ||
485 | u32 rx_1024_1518_byte_frames; | ||
486 | u32 rx_greater_than_1518_byte_frames; | ||
487 | u32 rx_undersized_frames; | ||
488 | u32 rx_oversize_frames; | ||
489 | u32 rx_jabbers; | ||
490 | u32 rx_frame_check_sequence_errors; | ||
491 | u32 rx_length_field_frame_errors; | ||
492 | u32 rx_symbol_errors; | ||
493 | u32 rx_alignment_errors; | ||
494 | u32 rx_resource_errors; | ||
495 | u32 rx_overruns; | ||
496 | u32 rx_ip_header_checksum_errors; | ||
497 | u32 rx_tcp_checksum_errors; | ||
498 | u32 rx_udp_checksum_errors; | ||
499 | }; | ||
500 | |||
361 | struct macb { | 501 | struct macb { |
362 | void __iomem *regs; | 502 | void __iomem *regs; |
363 | 503 | ||
@@ -376,7 +516,10 @@ struct macb { | |||
376 | struct net_device *dev; | 516 | struct net_device *dev; |
377 | struct napi_struct napi; | 517 | struct napi_struct napi; |
378 | struct net_device_stats stats; | 518 | struct net_device_stats stats; |
379 | struct macb_stats hw_stats; | 519 | union { |
520 | struct macb_stats macb; | ||
521 | struct gem_stats gem; | ||
522 | } hw_stats; | ||
380 | 523 | ||
381 | dma_addr_t rx_ring_dma; | 524 | dma_addr_t rx_ring_dma; |
382 | dma_addr_t tx_ring_dma; | 525 | dma_addr_t tx_ring_dma; |
@@ -389,6 +532,13 @@ struct macb { | |||
389 | unsigned int link; | 532 | unsigned int link; |
390 | unsigned int speed; | 533 | unsigned int speed; |
391 | unsigned int duplex; | 534 | unsigned int duplex; |
535 | |||
536 | phy_interface_t phy_interface; | ||
392 | }; | 537 | }; |
393 | 538 | ||
539 | static inline bool macb_is_gem(struct macb *bp) | ||
540 | { | ||
541 | return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2; | ||
542 | } | ||
543 | |||
394 | #endif /* _MACB_H */ | 544 | #endif /* _MACB_H */ |
diff --git a/drivers/pcmcia/pxa2xx_cm_x255.c b/drivers/pcmcia/pxa2xx_cm_x255.c index 0b4f946cf13a..31ab6ddf52c9 100644 --- a/drivers/pcmcia/pxa2xx_cm_x255.c +++ b/drivers/pcmcia/pxa2xx_cm_x255.c | |||
@@ -16,8 +16,6 @@ | |||
16 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/export.h> | 17 | #include <linux/export.h> |
18 | 18 | ||
19 | #include <asm/mach-types.h> | ||
20 | |||
21 | #include "soc_common.h" | 19 | #include "soc_common.h" |
22 | 20 | ||
23 | #define GPIO_PCMCIA_SKTSEL (54) | 21 | #define GPIO_PCMCIA_SKTSEL (54) |
@@ -27,15 +25,15 @@ | |||
27 | #define GPIO_PCMCIA_S1_RDYINT (8) | 25 | #define GPIO_PCMCIA_S1_RDYINT (8) |
28 | #define GPIO_PCMCIA_RESET (9) | 26 | #define GPIO_PCMCIA_RESET (9) |
29 | 27 | ||
30 | #define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) | 28 | #define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID) |
31 | #define PCMCIA_S1_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S1_CD_VALID) | 29 | #define PCMCIA_S1_CD_VALID gpio_to_irq(GPIO_PCMCIA_S1_CD_VALID) |
32 | #define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) | 30 | #define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT) |
33 | #define PCMCIA_S1_RDYINT IRQ_GPIO(GPIO_PCMCIA_S1_RDYINT) | 31 | #define PCMCIA_S1_RDYINT gpio_to_irq(GPIO_PCMCIA_S1_RDYINT) |
34 | 32 | ||
35 | 33 | ||
36 | static struct pcmcia_irqs irqs[] = { | 34 | static struct pcmcia_irqs irqs[] = { |
37 | { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, | 35 | { .sock = 0, .str = "PCMCIA0 CD" }, |
38 | { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" }, | 36 | { .sock = 1, .str = "PCMCIA1 CD" }, |
39 | }; | 37 | }; |
40 | 38 | ||
41 | static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | 39 | static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt) |
@@ -46,6 +44,8 @@ static int cmx255_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
46 | gpio_direction_output(GPIO_PCMCIA_RESET, 0); | 44 | gpio_direction_output(GPIO_PCMCIA_RESET, 0); |
47 | 45 | ||
48 | skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; | 46 | skt->socket.pci_irq = skt->nr == 0 ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT; |
47 | irqs[0].irq = PCMCIA_S0_CD_VALID; | ||
48 | irqs[1].irq = PCMCIA_S1_CD_VALID; | ||
49 | ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | 49 | ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); |
50 | if (!ret) | 50 | if (!ret) |
51 | gpio_free(GPIO_PCMCIA_RESET); | 51 | gpio_free(GPIO_PCMCIA_RESET); |
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c index 923f315926ef..3dc7621a0767 100644 --- a/drivers/pcmcia/pxa2xx_cm_x270.c +++ b/drivers/pcmcia/pxa2xx_cm_x270.c | |||
@@ -16,20 +16,18 @@ | |||
16 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/export.h> | 17 | #include <linux/export.h> |
18 | 18 | ||
19 | #include <asm/mach-types.h> | ||
20 | |||
21 | #include "soc_common.h" | 19 | #include "soc_common.h" |
22 | 20 | ||
23 | #define GPIO_PCMCIA_S0_CD_VALID (84) | 21 | #define GPIO_PCMCIA_S0_CD_VALID (84) |
24 | #define GPIO_PCMCIA_S0_RDYINT (82) | 22 | #define GPIO_PCMCIA_S0_RDYINT (82) |
25 | #define GPIO_PCMCIA_RESET (53) | 23 | #define GPIO_PCMCIA_RESET (53) |
26 | 24 | ||
27 | #define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID) | 25 | #define PCMCIA_S0_CD_VALID gpio_to_irq(GPIO_PCMCIA_S0_CD_VALID) |
28 | #define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT) | 26 | #define PCMCIA_S0_RDYINT gpio_to_irq(GPIO_PCMCIA_S0_RDYINT) |
29 | 27 | ||
30 | 28 | ||
31 | static struct pcmcia_irqs irqs[] = { | 29 | static struct pcmcia_irqs irqs[] = { |
32 | { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" }, | 30 | { .sock = 0, .str = "PCMCIA0 CD" }, |
33 | }; | 31 | }; |
34 | 32 | ||
35 | static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | 33 | static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) |
@@ -40,6 +38,7 @@ static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
40 | gpio_direction_output(GPIO_PCMCIA_RESET, 0); | 38 | gpio_direction_output(GPIO_PCMCIA_RESET, 0); |
41 | 39 | ||
42 | skt->socket.pci_irq = PCMCIA_S0_RDYINT; | 40 | skt->socket.pci_irq = PCMCIA_S0_RDYINT; |
41 | irqs[0].irq = PCMCIA_S0_CD_VALID; | ||
43 | ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | 42 | ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); |
44 | if (!ret) | 43 | if (!ret) |
45 | gpio_free(GPIO_PCMCIA_RESET); | 44 | gpio_free(GPIO_PCMCIA_RESET); |
diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c index 8bfbd4dca131..17cd2ce7428f 100644 --- a/drivers/pcmcia/pxa2xx_e740.c +++ b/drivers/pcmcia/pxa2xx_e740.c | |||
@@ -26,20 +26,23 @@ | |||
26 | static struct pcmcia_irqs cd_irqs[] = { | 26 | static struct pcmcia_irqs cd_irqs[] = { |
27 | { | 27 | { |
28 | .sock = 0, | 28 | .sock = 0, |
29 | .irq = IRQ_GPIO(GPIO_E740_PCMCIA_CD0), | ||
30 | .str = "CF card detect" | 29 | .str = "CF card detect" |
31 | }, | 30 | }, |
32 | { | 31 | { |
33 | .sock = 1, | 32 | .sock = 1, |
34 | .irq = IRQ_GPIO(GPIO_E740_PCMCIA_CD1), | ||
35 | .str = "Wifi switch" | 33 | .str = "Wifi switch" |
36 | }, | 34 | }, |
37 | }; | 35 | }; |
38 | 36 | ||
39 | static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | 37 | static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) |
40 | { | 38 | { |
41 | skt->socket.pci_irq = skt->nr == 0 ? IRQ_GPIO(GPIO_E740_PCMCIA_RDY0) : | 39 | if (skt->nr == 0) |
42 | IRQ_GPIO(GPIO_E740_PCMCIA_RDY1); | 40 | skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY0); |
41 | else | ||
42 | skt->socket.pci_irq = gpio_to_irq(GPIO_E740_PCMCIA_RDY1); | ||
43 | |||
44 | cd_irqs[0].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD0); | ||
45 | cd_irqs[1].irq = gpio_to_irq(GPIO_E740_PCMCIA_CD1); | ||
43 | 46 | ||
44 | return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1); | 47 | return soc_pcmcia_request_irqs(skt, &cd_irqs[skt->nr], 1); |
45 | } | 48 | } |
diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c index d589ad1dcd4c..6a8e011a8c13 100644 --- a/drivers/pcmcia/pxa2xx_palmld.c +++ b/drivers/pcmcia/pxa2xx_palmld.c | |||
@@ -33,7 +33,7 @@ static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
33 | ret = gpio_request_array(palmld_pcmcia_gpios, | 33 | ret = gpio_request_array(palmld_pcmcia_gpios, |
34 | ARRAY_SIZE(palmld_pcmcia_gpios)); | 34 | ARRAY_SIZE(palmld_pcmcia_gpios)); |
35 | 35 | ||
36 | skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMLD_PCMCIA_READY); | 36 | skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMLD_PCMCIA_READY); |
37 | 37 | ||
38 | return ret; | 38 | return ret; |
39 | } | 39 | } |
diff --git a/drivers/pcmcia/pxa2xx_palmtc.c b/drivers/pcmcia/pxa2xx_palmtc.c index 9c6a04b2f71b..9e38de769ba3 100644 --- a/drivers/pcmcia/pxa2xx_palmtc.c +++ b/drivers/pcmcia/pxa2xx_palmtc.c | |||
@@ -37,7 +37,7 @@ static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
37 | ret = gpio_request_array(palmtc_pcmcia_gpios, | 37 | ret = gpio_request_array(palmtc_pcmcia_gpios, |
38 | ARRAY_SIZE(palmtc_pcmcia_gpios)); | 38 | ARRAY_SIZE(palmtc_pcmcia_gpios)); |
39 | 39 | ||
40 | skt->socket.pci_irq = IRQ_GPIO(GPIO_NR_PALMTC_PCMCIA_READY); | 40 | skt->socket.pci_irq = gpio_to_irq(GPIO_NR_PALMTC_PCMCIA_READY); |
41 | 41 | ||
42 | return ret; | 42 | return ret; |
43 | } | 43 | } |
diff --git a/drivers/pcmcia/pxa2xx_stargate2.c b/drivers/pcmcia/pxa2xx_stargate2.c index 939622251dfb..6c2366b74a35 100644 --- a/drivers/pcmcia/pxa2xx_stargate2.c +++ b/drivers/pcmcia/pxa2xx_stargate2.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #define SG2_S0_GPIO_READY 81 | 34 | #define SG2_S0_GPIO_READY 81 |
35 | 35 | ||
36 | static struct pcmcia_irqs irqs[] = { | 36 | static struct pcmcia_irqs irqs[] = { |
37 | { 0, IRQ_GPIO(SG2_S0_GPIO_DETECT), "PCMCIA0 CD" }, | 37 | {.sock = 0, .str = "PCMCIA0 CD" }, |
38 | }; | 38 | }; |
39 | 39 | ||
40 | static struct gpio sg2_pcmcia_gpios[] = { | 40 | static struct gpio sg2_pcmcia_gpios[] = { |
@@ -44,7 +44,9 @@ static struct gpio sg2_pcmcia_gpios[] = { | |||
44 | 44 | ||
45 | static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | 45 | static int sg2_pcmcia_hw_init(struct soc_pcmcia_socket *skt) |
46 | { | 46 | { |
47 | skt->socket.pci_irq = IRQ_GPIO(SG2_S0_GPIO_READY); | 47 | skt->socket.pci_irq = gpio_to_irq(SG2_S0_GPIO_READY); |
48 | irqs[0].irq = gpio_to_irq(SG2_S0_GPIO_DETECT); | ||
49 | |||
48 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); | 50 | return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); |
49 | } | 51 | } |
50 | 52 | ||
diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c index 57ddb969d888..7c33f898135a 100644 --- a/drivers/pcmcia/pxa2xx_trizeps4.c +++ b/drivers/pcmcia/pxa2xx_trizeps4.c | |||
@@ -30,7 +30,7 @@ | |||
30 | extern void board_pcmcia_power(int power); | 30 | extern void board_pcmcia_power(int power); |
31 | 31 | ||
32 | static struct pcmcia_irqs irqs[] = { | 32 | static struct pcmcia_irqs irqs[] = { |
33 | { 0, IRQ_GPIO(GPIO_PCD), "cs0_cd" } | 33 | { .sock = 0, .str = "cs0_cd" } |
34 | /* on other baseboards we can have more inputs */ | 34 | /* on other baseboards we can have more inputs */ |
35 | }; | 35 | }; |
36 | 36 | ||
@@ -53,7 +53,8 @@ static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
53 | gpio_free(GPIO_PRDY); | 53 | gpio_free(GPIO_PRDY); |
54 | return -EINVAL; | 54 | return -EINVAL; |
55 | } | 55 | } |
56 | skt->socket.pci_irq = IRQ_GPIO(GPIO_PRDY); | 56 | skt->socket.pci_irq = gpio_to_irq(GPIO_PRDY); |
57 | irqs[0].irq = gpio_to_irq(GPIO_PCD); | ||
57 | break; | 58 | break; |
58 | default: | 59 | default: |
59 | break; | 60 | break; |
diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c index 66ab92cf3105..61b17d235dbe 100644 --- a/drivers/pcmcia/pxa2xx_vpac270.c +++ b/drivers/pcmcia/pxa2xx_vpac270.c | |||
@@ -38,12 +38,10 @@ static struct gpio vpac270_cf_gpios[] = { | |||
38 | static struct pcmcia_irqs cd_irqs[] = { | 38 | static struct pcmcia_irqs cd_irqs[] = { |
39 | { | 39 | { |
40 | .sock = 0, | 40 | .sock = 0, |
41 | .irq = IRQ_GPIO(GPIO84_VPAC270_PCMCIA_CD), | ||
42 | .str = "PCMCIA CD" | 41 | .str = "PCMCIA CD" |
43 | }, | 42 | }, |
44 | { | 43 | { |
45 | .sock = 1, | 44 | .sock = 1, |
46 | .irq = IRQ_GPIO(GPIO17_VPAC270_CF_CD), | ||
47 | .str = "CF CD" | 45 | .str = "CF CD" |
48 | }, | 46 | }, |
49 | }; | 47 | }; |
@@ -57,6 +55,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
57 | ARRAY_SIZE(vpac270_pcmcia_gpios)); | 55 | ARRAY_SIZE(vpac270_pcmcia_gpios)); |
58 | 56 | ||
59 | skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY); | 57 | skt->socket.pci_irq = gpio_to_irq(GPIO35_VPAC270_PCMCIA_RDY); |
58 | cd_irqs[0].irq = gpio_to_irq(GPIO84_VPAC270_PCMCIA_CD); | ||
60 | 59 | ||
61 | if (!ret) | 60 | if (!ret) |
62 | ret = soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1); | 61 | ret = soc_pcmcia_request_irqs(skt, &cd_irqs[0], 1); |
@@ -65,6 +64,7 @@ static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |||
65 | ARRAY_SIZE(vpac270_cf_gpios)); | 64 | ARRAY_SIZE(vpac270_cf_gpios)); |
66 | 65 | ||
67 | skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY); | 66 | skt->socket.pci_irq = gpio_to_irq(GPIO12_VPAC270_CF_RDY); |
67 | cd_irqs[1].irq = gpio_to_irq(GPIO17_VPAC270_CF_CD); | ||
68 | 68 | ||
69 | if (!ret) | 69 | if (!ret) |
70 | ret = soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1); | 70 | ret = soc_pcmcia_request_irqs(skt, &cd_irqs[1], 1); |
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 53eb4e55b289..877cf6fdcf24 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -774,7 +774,7 @@ config RTC_DRV_EP93XX | |||
774 | 774 | ||
775 | config RTC_DRV_SA1100 | 775 | config RTC_DRV_SA1100 |
776 | tristate "SA11x0/PXA2xx" | 776 | tristate "SA11x0/PXA2xx" |
777 | depends on ARCH_SA1100 || ARCH_PXA | 777 | depends on ARCH_SA1100 || ARCH_PXA || ARCH_MMP |
778 | help | 778 | help |
779 | If you say Y here you will get access to the real time clock | 779 | If you say Y here you will get access to the real time clock |
780 | built into your SA11x0 or PXA2xx CPU. | 780 | built into your SA11x0 or PXA2xx CPU. |
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index 0b40bb88a884..fc1ffe97fca1 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c | |||
@@ -27,35 +27,42 @@ | |||
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/fs.h> | 28 | #include <linux/fs.h> |
29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
30 | #include <linux/string.h> | ||
31 | #include <linux/pm.h> | 30 | #include <linux/pm.h> |
32 | #include <linux/bitops.h> | 31 | #include <linux/slab.h> |
32 | #include <linux/clk.h> | ||
33 | #include <linux/io.h> | ||
33 | 34 | ||
34 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
35 | #include <asm/irq.h> | 36 | #include <asm/irq.h> |
36 | 37 | ||
37 | #ifdef CONFIG_ARCH_PXA | ||
38 | #include <mach/regs-rtc.h> | ||
39 | #include <mach/regs-ost.h> | ||
40 | #endif | ||
41 | |||
42 | #define RTC_DEF_DIVIDER (32768 - 1) | 38 | #define RTC_DEF_DIVIDER (32768 - 1) |
43 | #define RTC_DEF_TRIM 0 | 39 | #define RTC_DEF_TRIM 0 |
44 | 40 | #define RTC_FREQ 1024 | |
45 | static const unsigned long RTC_FREQ = 1024; | 41 | |
46 | static struct rtc_time rtc_alarm; | 42 | #define RCNR 0x00 /* RTC Count Register */ |
47 | static DEFINE_SPINLOCK(sa1100_rtc_lock); | 43 | #define RTAR 0x04 /* RTC Alarm Register */ |
48 | 44 | #define RTSR 0x08 /* RTC Status Register */ | |
49 | static inline int rtc_periodic_alarm(struct rtc_time *tm) | 45 | #define RTTR 0x0c /* RTC Timer Trim Register */ |
50 | { | 46 | |
51 | return (tm->tm_year == -1) || | 47 | #define RTSR_HZE (1 << 3) /* HZ interrupt enable */ |
52 | ((unsigned)tm->tm_mon >= 12) || | 48 | #define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ |
53 | ((unsigned)(tm->tm_mday - 1) >= 31) || | 49 | #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ |
54 | ((unsigned)tm->tm_hour > 23) || | 50 | #define RTSR_AL (1 << 0) /* RTC alarm detected */ |
55 | ((unsigned)tm->tm_min > 59) || | 51 | |
56 | ((unsigned)tm->tm_sec > 59); | 52 | #define rtc_readl(sa1100_rtc, reg) \ |
57 | } | 53 | readl_relaxed((sa1100_rtc)->base + (reg)) |
58 | 54 | #define rtc_writel(sa1100_rtc, reg, value) \ | |
55 | writel_relaxed((value), (sa1100_rtc)->base + (reg)) | ||
56 | |||
57 | struct sa1100_rtc { | ||
58 | struct resource *ress; | ||
59 | void __iomem *base; | ||
60 | struct clk *clk; | ||
61 | int irq_1Hz; | ||
62 | int irq_Alrm; | ||
63 | struct rtc_device *rtc; | ||
64 | spinlock_t lock; /* Protects this structure */ | ||
65 | }; | ||
59 | /* | 66 | /* |
60 | * Calculate the next alarm time given the requested alarm time mask | 67 | * Calculate the next alarm time given the requested alarm time mask |
61 | * and the current time. | 68 | * and the current time. |
@@ -83,46 +90,26 @@ static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, | |||
83 | } | 90 | } |
84 | } | 91 | } |
85 | 92 | ||
86 | static int rtc_update_alarm(struct rtc_time *alrm) | ||
87 | { | ||
88 | struct rtc_time alarm_tm, now_tm; | ||
89 | unsigned long now, time; | ||
90 | int ret; | ||
91 | |||
92 | do { | ||
93 | now = RCNR; | ||
94 | rtc_time_to_tm(now, &now_tm); | ||
95 | rtc_next_alarm_time(&alarm_tm, &now_tm, alrm); | ||
96 | ret = rtc_tm_to_time(&alarm_tm, &time); | ||
97 | if (ret != 0) | ||
98 | break; | ||
99 | |||
100 | RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL); | ||
101 | RTAR = time; | ||
102 | } while (now != RCNR); | ||
103 | |||
104 | return ret; | ||
105 | } | ||
106 | |||
107 | static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) | 93 | static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) |
108 | { | 94 | { |
109 | struct platform_device *pdev = to_platform_device(dev_id); | 95 | struct platform_device *pdev = to_platform_device(dev_id); |
110 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 96 | struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev); |
111 | unsigned int rtsr; | 97 | unsigned int rtsr; |
112 | unsigned long events = 0; | 98 | unsigned long events = 0; |
113 | 99 | ||
114 | spin_lock(&sa1100_rtc_lock); | 100 | spin_lock(&sa1100_rtc->lock); |
115 | 101 | ||
116 | rtsr = RTSR; | ||
117 | /* clear interrupt sources */ | 102 | /* clear interrupt sources */ |
118 | RTSR = 0; | 103 | rtsr = rtc_readl(sa1100_rtc, RTSR); |
104 | rtc_writel(sa1100_rtc, RTSR, 0); | ||
105 | |||
119 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. | 106 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. |
120 | * See also the comments in sa1100_rtc_probe(). */ | 107 | * See also the comments in sa1100_rtc_probe(). */ |
121 | if (rtsr & (RTSR_ALE | RTSR_HZE)) { | 108 | if (rtsr & (RTSR_ALE | RTSR_HZE)) { |
122 | /* This is the original code, before there was the if test | 109 | /* This is the original code, before there was the if test |
123 | * above. This code does not clear interrupts that were not | 110 | * above. This code does not clear interrupts that were not |
124 | * enabled. */ | 111 | * enabled. */ |
125 | RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); | 112 | rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ) & (rtsr >> 2)); |
126 | } else { | 113 | } else { |
127 | /* For some reason, it is possible to enter this routine | 114 | /* For some reason, it is possible to enter this routine |
128 | * without interruptions enabled, it has been tested with | 115 | * without interruptions enabled, it has been tested with |
@@ -131,13 +118,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) | |||
131 | * This situation leads to an infinite "loop" of interrupt | 118 | * This situation leads to an infinite "loop" of interrupt |
132 | * routine calling and as a result the processor seems to | 119 | * routine calling and as a result the processor seems to |
133 | * lock on its first call to open(). */ | 120 | * lock on its first call to open(). */ |
134 | RTSR = RTSR_AL | RTSR_HZ; | 121 | rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ)); |
135 | } | 122 | } |
136 | 123 | ||
137 | /* clear alarm interrupt if it has occurred */ | 124 | /* clear alarm interrupt if it has occurred */ |
138 | if (rtsr & RTSR_AL) | 125 | if (rtsr & RTSR_AL) |
139 | rtsr &= ~RTSR_ALE; | 126 | rtsr &= ~RTSR_ALE; |
140 | RTSR = rtsr & (RTSR_ALE | RTSR_HZE); | 127 | rtc_writel(sa1100_rtc, RTSR, rtsr & (RTSR_ALE | RTSR_HZE)); |
141 | 128 | ||
142 | /* update irq data & counter */ | 129 | /* update irq data & counter */ |
143 | if (rtsr & RTSR_AL) | 130 | if (rtsr & RTSR_AL) |
@@ -145,91 +132,100 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) | |||
145 | if (rtsr & RTSR_HZ) | 132 | if (rtsr & RTSR_HZ) |
146 | events |= RTC_UF | RTC_IRQF; | 133 | events |= RTC_UF | RTC_IRQF; |
147 | 134 | ||
148 | rtc_update_irq(rtc, 1, events); | 135 | rtc_update_irq(sa1100_rtc->rtc, 1, events); |
149 | 136 | ||
150 | if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm)) | 137 | spin_unlock(&sa1100_rtc->lock); |
151 | rtc_update_alarm(&rtc_alarm); | ||
152 | |||
153 | spin_unlock(&sa1100_rtc_lock); | ||
154 | 138 | ||
155 | return IRQ_HANDLED; | 139 | return IRQ_HANDLED; |
156 | } | 140 | } |
157 | 141 | ||
158 | static int sa1100_rtc_open(struct device *dev) | 142 | static int sa1100_rtc_open(struct device *dev) |
159 | { | 143 | { |
144 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); | ||
160 | int ret; | 145 | int ret; |
161 | struct platform_device *plat_dev = to_platform_device(dev); | ||
162 | struct rtc_device *rtc = platform_get_drvdata(plat_dev); | ||
163 | 146 | ||
164 | ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED, | 147 | ret = request_irq(sa1100_rtc->irq_1Hz, sa1100_rtc_interrupt, |
165 | "rtc 1Hz", dev); | 148 | IRQF_DISABLED, "rtc 1Hz", dev); |
166 | if (ret) { | 149 | if (ret) { |
167 | dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz); | 150 | dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_1Hz); |
168 | goto fail_ui; | 151 | goto fail_ui; |
169 | } | 152 | } |
170 | ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED, | 153 | ret = request_irq(sa1100_rtc->irq_Alrm, sa1100_rtc_interrupt, |
171 | "rtc Alrm", dev); | 154 | IRQF_DISABLED, "rtc Alrm", dev); |
172 | if (ret) { | 155 | if (ret) { |
173 | dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm); | 156 | dev_err(dev, "IRQ %d already in use.\n", sa1100_rtc->irq_Alrm); |
174 | goto fail_ai; | 157 | goto fail_ai; |
175 | } | 158 | } |
176 | rtc->max_user_freq = RTC_FREQ; | 159 | sa1100_rtc->rtc->max_user_freq = RTC_FREQ; |
177 | rtc_irq_set_freq(rtc, NULL, RTC_FREQ); | 160 | rtc_irq_set_freq(sa1100_rtc->rtc, NULL, RTC_FREQ); |
178 | 161 | ||
179 | return 0; | 162 | return 0; |
180 | 163 | ||
181 | fail_ai: | 164 | fail_ai: |
182 | free_irq(IRQ_RTC1Hz, dev); | 165 | free_irq(sa1100_rtc->irq_1Hz, dev); |
183 | fail_ui: | 166 | fail_ui: |
184 | return ret; | 167 | return ret; |
185 | } | 168 | } |
186 | 169 | ||
187 | static void sa1100_rtc_release(struct device *dev) | 170 | static void sa1100_rtc_release(struct device *dev) |
188 | { | 171 | { |
189 | spin_lock_irq(&sa1100_rtc_lock); | 172 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
190 | RTSR = 0; | 173 | |
191 | OIER &= ~OIER_E1; | 174 | spin_lock_irq(&sa1100_rtc->lock); |
192 | OSSR = OSSR_M1; | 175 | rtc_writel(sa1100_rtc, RTSR, 0); |
193 | spin_unlock_irq(&sa1100_rtc_lock); | 176 | spin_unlock_irq(&sa1100_rtc->lock); |
194 | 177 | ||
195 | free_irq(IRQ_RTCAlrm, dev); | 178 | free_irq(sa1100_rtc->irq_Alrm, dev); |
196 | free_irq(IRQ_RTC1Hz, dev); | 179 | free_irq(sa1100_rtc->irq_1Hz, dev); |
197 | } | 180 | } |
198 | 181 | ||
199 | static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | 182 | static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
200 | { | 183 | { |
201 | spin_lock_irq(&sa1100_rtc_lock); | 184 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
185 | unsigned int rtsr; | ||
186 | |||
187 | spin_lock_irq(&sa1100_rtc->lock); | ||
188 | |||
189 | rtsr = rtc_readl(sa1100_rtc, RTSR); | ||
202 | if (enabled) | 190 | if (enabled) |
203 | RTSR |= RTSR_ALE; | 191 | rtsr |= RTSR_ALE; |
204 | else | 192 | else |
205 | RTSR &= ~RTSR_ALE; | 193 | rtsr &= ~RTSR_ALE; |
206 | spin_unlock_irq(&sa1100_rtc_lock); | 194 | rtc_writel(sa1100_rtc, RTSR, rtsr); |
195 | |||
196 | spin_unlock_irq(&sa1100_rtc->lock); | ||
207 | return 0; | 197 | return 0; |
208 | } | 198 | } |
209 | 199 | ||
210 | static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) | 200 | static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) |
211 | { | 201 | { |
212 | rtc_time_to_tm(RCNR, tm); | 202 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
203 | |||
204 | rtc_time_to_tm(rtc_readl(sa1100_rtc, RCNR), tm); | ||
213 | return 0; | 205 | return 0; |
214 | } | 206 | } |
215 | 207 | ||
216 | static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) | 208 | static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) |
217 | { | 209 | { |
210 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); | ||
218 | unsigned long time; | 211 | unsigned long time; |
219 | int ret; | 212 | int ret; |
220 | 213 | ||
221 | ret = rtc_tm_to_time(tm, &time); | 214 | ret = rtc_tm_to_time(tm, &time); |
222 | if (ret == 0) | 215 | if (ret == 0) |
223 | RCNR = time; | 216 | rtc_writel(sa1100_rtc, RCNR, time); |
224 | return ret; | 217 | return ret; |
225 | } | 218 | } |
226 | 219 | ||
227 | static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | 220 | static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
228 | { | 221 | { |
229 | u32 rtsr; | 222 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
223 | unsigned long time; | ||
224 | unsigned int rtsr; | ||
230 | 225 | ||
231 | memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time)); | 226 | time = rtc_readl(sa1100_rtc, RCNR); |
232 | rtsr = RTSR; | 227 | rtc_time_to_tm(time, &alrm->time); |
228 | rtsr = rtc_readl(sa1100_rtc, RTSR); | ||
233 | alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; | 229 | alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; |
234 | alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; | 230 | alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; |
235 | return 0; | 231 | return 0; |
@@ -237,26 +233,39 @@ static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
237 | 233 | ||
238 | static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | 234 | static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
239 | { | 235 | { |
240 | int ret; | 236 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
237 | struct rtc_time now_tm, alarm_tm; | ||
238 | unsigned long time, alarm; | ||
239 | unsigned int rtsr; | ||
241 | 240 | ||
242 | spin_lock_irq(&sa1100_rtc_lock); | 241 | spin_lock_irq(&sa1100_rtc->lock); |
243 | ret = rtc_update_alarm(&alrm->time); | ||
244 | if (ret == 0) { | ||
245 | if (alrm->enabled) | ||
246 | RTSR |= RTSR_ALE; | ||
247 | else | ||
248 | RTSR &= ~RTSR_ALE; | ||
249 | } | ||
250 | spin_unlock_irq(&sa1100_rtc_lock); | ||
251 | 242 | ||
252 | return ret; | 243 | time = rtc_readl(sa1100_rtc, RCNR); |
244 | rtc_time_to_tm(time, &now_tm); | ||
245 | rtc_next_alarm_time(&alarm_tm, &now_tm, &alrm->time); | ||
246 | rtc_tm_to_time(&alarm_tm, &alarm); | ||
247 | rtc_writel(sa1100_rtc, RTAR, alarm); | ||
248 | |||
249 | rtsr = rtc_readl(sa1100_rtc, RTSR); | ||
250 | if (alrm->enabled) | ||
251 | rtsr |= RTSR_ALE; | ||
252 | else | ||
253 | rtsr &= ~RTSR_ALE; | ||
254 | rtc_writel(sa1100_rtc, RTSR, rtsr); | ||
255 | |||
256 | spin_unlock_irq(&sa1100_rtc->lock); | ||
257 | |||
258 | return 0; | ||
253 | } | 259 | } |
254 | 260 | ||
255 | static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) | 261 | static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) |
256 | { | 262 | { |
257 | seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR); | 263 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); |
258 | seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR); | ||
259 | 264 | ||
265 | seq_printf(seq, "trim/divider\t\t: 0x%08x\n", | ||
266 | rtc_readl(sa1100_rtc, RTTR)); | ||
267 | seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", | ||
268 | rtc_readl(sa1100_rtc, RTSR)); | ||
260 | return 0; | 269 | return 0; |
261 | } | 270 | } |
262 | 271 | ||
@@ -273,7 +282,51 @@ static const struct rtc_class_ops sa1100_rtc_ops = { | |||
273 | 282 | ||
274 | static int sa1100_rtc_probe(struct platform_device *pdev) | 283 | static int sa1100_rtc_probe(struct platform_device *pdev) |
275 | { | 284 | { |
276 | struct rtc_device *rtc; | 285 | struct sa1100_rtc *sa1100_rtc; |
286 | unsigned int rttr; | ||
287 | int ret; | ||
288 | |||
289 | sa1100_rtc = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL); | ||
290 | if (!sa1100_rtc) | ||
291 | return -ENOMEM; | ||
292 | |||
293 | spin_lock_init(&sa1100_rtc->lock); | ||
294 | platform_set_drvdata(pdev, sa1100_rtc); | ||
295 | |||
296 | ret = -ENXIO; | ||
297 | sa1100_rtc->ress = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
298 | if (!sa1100_rtc->ress) { | ||
299 | dev_err(&pdev->dev, "No I/O memory resource defined\n"); | ||
300 | goto err_ress; | ||
301 | } | ||
302 | |||
303 | sa1100_rtc->irq_1Hz = platform_get_irq(pdev, 0); | ||
304 | if (sa1100_rtc->irq_1Hz < 0) { | ||
305 | dev_err(&pdev->dev, "No 1Hz IRQ resource defined\n"); | ||
306 | goto err_ress; | ||
307 | } | ||
308 | sa1100_rtc->irq_Alrm = platform_get_irq(pdev, 1); | ||
309 | if (sa1100_rtc->irq_Alrm < 0) { | ||
310 | dev_err(&pdev->dev, "No alarm IRQ resource defined\n"); | ||
311 | goto err_ress; | ||
312 | } | ||
313 | |||
314 | ret = -ENOMEM; | ||
315 | sa1100_rtc->base = ioremap(sa1100_rtc->ress->start, | ||
316 | resource_size(sa1100_rtc->ress)); | ||
317 | if (!sa1100_rtc->base) { | ||
318 | dev_err(&pdev->dev, "Unable to map pxa RTC I/O memory\n"); | ||
319 | goto err_map; | ||
320 | } | ||
321 | |||
322 | sa1100_rtc->clk = clk_get(&pdev->dev, NULL); | ||
323 | if (IS_ERR(sa1100_rtc->clk)) { | ||
324 | dev_err(&pdev->dev, "failed to find rtc clock source\n"); | ||
325 | ret = PTR_ERR(sa1100_rtc->clk); | ||
326 | goto err_clk; | ||
327 | } | ||
328 | clk_prepare(sa1100_rtc->clk); | ||
329 | clk_enable(sa1100_rtc->clk); | ||
277 | 330 | ||
278 | /* | 331 | /* |
279 | * According to the manual we should be able to let RTTR be zero | 332 | * According to the manual we should be able to let RTTR be zero |
@@ -282,24 +335,24 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
282 | * If the clock divider is uninitialized then reset it to the | 335 | * If the clock divider is uninitialized then reset it to the |
283 | * default value to get the 1Hz clock. | 336 | * default value to get the 1Hz clock. |
284 | */ | 337 | */ |
285 | if (RTTR == 0) { | 338 | if (rtc_readl(sa1100_rtc, RTTR) == 0) { |
286 | RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); | 339 | rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); |
287 | dev_warn(&pdev->dev, "warning: " | 340 | rtc_writel(sa1100_rtc, RTTR, rttr); |
288 | "initializing default clock divider/trim value\n"); | 341 | dev_warn(&pdev->dev, "warning: initializing default clock" |
342 | " divider/trim value\n"); | ||
289 | /* The current RTC value probably doesn't make sense either */ | 343 | /* The current RTC value probably doesn't make sense either */ |
290 | RCNR = 0; | 344 | rtc_writel(sa1100_rtc, RCNR, 0); |
291 | } | 345 | } |
292 | 346 | ||
293 | device_init_wakeup(&pdev->dev, 1); | 347 | device_init_wakeup(&pdev->dev, 1); |
294 | 348 | ||
295 | rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, | 349 | sa1100_rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, |
296 | THIS_MODULE); | 350 | &sa1100_rtc_ops, THIS_MODULE); |
297 | 351 | if (IS_ERR(sa1100_rtc->rtc)) { | |
298 | if (IS_ERR(rtc)) | 352 | dev_err(&pdev->dev, "Failed to register RTC device -> %d\n", |
299 | return PTR_ERR(rtc); | 353 | ret); |
300 | 354 | goto err_rtc_reg; | |
301 | platform_set_drvdata(pdev, rtc); | 355 | } |
302 | |||
303 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. | 356 | /* Fix for a nasty initialization problem the in SA11xx RTSR register. |
304 | * See also the comments in sa1100_rtc_interrupt(). | 357 | * See also the comments in sa1100_rtc_interrupt(). |
305 | * | 358 | * |
@@ -322,33 +375,46 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
322 | * | 375 | * |
323 | * Notice that clearing bit 1 and 0 is accomplished by writting ONES to | 376 | * Notice that clearing bit 1 and 0 is accomplished by writting ONES to |
324 | * the corresponding bits in RTSR. */ | 377 | * the corresponding bits in RTSR. */ |
325 | RTSR = RTSR_AL | RTSR_HZ; | 378 | rtc_writel(sa1100_rtc, RTSR, (RTSR_AL | RTSR_HZ)); |
326 | 379 | ||
327 | return 0; | 380 | return 0; |
381 | |||
382 | err_rtc_reg: | ||
383 | err_clk: | ||
384 | iounmap(sa1100_rtc->base); | ||
385 | err_ress: | ||
386 | err_map: | ||
387 | kfree(sa1100_rtc); | ||
388 | return ret; | ||
328 | } | 389 | } |
329 | 390 | ||
330 | static int sa1100_rtc_remove(struct platform_device *pdev) | 391 | static int sa1100_rtc_remove(struct platform_device *pdev) |
331 | { | 392 | { |
332 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 393 | struct sa1100_rtc *sa1100_rtc = platform_get_drvdata(pdev); |
333 | |||
334 | if (rtc) | ||
335 | rtc_device_unregister(rtc); | ||
336 | 394 | ||
395 | rtc_device_unregister(sa1100_rtc->rtc); | ||
396 | clk_disable(sa1100_rtc->clk); | ||
397 | clk_unprepare(sa1100_rtc->clk); | ||
398 | iounmap(sa1100_rtc->base); | ||
337 | return 0; | 399 | return 0; |
338 | } | 400 | } |
339 | 401 | ||
340 | #ifdef CONFIG_PM | 402 | #ifdef CONFIG_PM |
341 | static int sa1100_rtc_suspend(struct device *dev) | 403 | static int sa1100_rtc_suspend(struct device *dev) |
342 | { | 404 | { |
405 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); | ||
406 | |||
343 | if (device_may_wakeup(dev)) | 407 | if (device_may_wakeup(dev)) |
344 | enable_irq_wake(IRQ_RTCAlrm); | 408 | enable_irq_wake(sa1100_rtc->irq_Alrm); |
345 | return 0; | 409 | return 0; |
346 | } | 410 | } |
347 | 411 | ||
348 | static int sa1100_rtc_resume(struct device *dev) | 412 | static int sa1100_rtc_resume(struct device *dev) |
349 | { | 413 | { |
414 | struct sa1100_rtc *sa1100_rtc = dev_get_drvdata(dev); | ||
415 | |||
350 | if (device_may_wakeup(dev)) | 416 | if (device_may_wakeup(dev)) |
351 | disable_irq_wake(IRQ_RTCAlrm); | 417 | disable_irq_wake(sa1100_rtc->irq_Alrm); |
352 | return 0; | 418 | return 0; |
353 | } | 419 | } |
354 | 420 | ||
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 791f11bed606..75823a1abeb6 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig | |||
@@ -48,6 +48,7 @@ config USB_ARCH_HAS_OHCI | |||
48 | default y if ARCH_DAVINCI_DA8XX | 48 | default y if ARCH_DAVINCI_DA8XX |
49 | default y if ARCH_CNS3XXX | 49 | default y if ARCH_CNS3XXX |
50 | default y if PLAT_SPEAR | 50 | default y if PLAT_SPEAR |
51 | default y if ARCH_EXYNOS | ||
51 | # PPC: | 52 | # PPC: |
52 | default y if STB03xxx | 53 | default y if STB03xxx |
53 | default y if PPC_MPC52xx | 54 | default y if PPC_MPC52xx |
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index a52769b5c904..4c0c9734251d 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig | |||
@@ -380,6 +380,12 @@ config USB_OHCI_SH | |||
380 | Enables support for the on-chip OHCI controller on the SuperH. | 380 | Enables support for the on-chip OHCI controller on the SuperH. |
381 | If you use the PCI OHCI controller, this option is not necessary. | 381 | If you use the PCI OHCI controller, this option is not necessary. |
382 | 382 | ||
383 | config USB_OHCI_EXYNOS | ||
384 | boolean "OHCI support for Samsung EXYNOS SoC Series" | ||
385 | depends on USB_OHCI_HCD && ARCH_EXYNOS | ||
386 | help | ||
387 | Enable support for the Samsung Exynos SOC's on-chip OHCI controller. | ||
388 | |||
383 | config USB_CNS3XXX_OHCI | 389 | config USB_CNS3XXX_OHCI |
384 | bool "Cavium CNS3XXX OHCI Module" | 390 | bool "Cavium CNS3XXX OHCI Module" |
385 | depends on USB_OHCI_HCD && ARCH_CNS3XXX | 391 | depends on USB_OHCI_HCD && ARCH_CNS3XXX |
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index e33baf9052cb..bba9850f32f0 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <linux/usb/ulpi.h> | 41 | #include <linux/usb/ulpi.h> |
42 | #include <plat/usb.h> | 42 | #include <plat/usb.h> |
43 | #include <linux/regulator/consumer.h> | 43 | #include <linux/regulator/consumer.h> |
44 | #include <linux/pm_runtime.h> | ||
44 | 45 | ||
45 | /* EHCI Register Set */ | 46 | /* EHCI Register Set */ |
46 | #define EHCI_INSNREG04 (0xA0) | 47 | #define EHCI_INSNREG04 (0xA0) |
@@ -190,11 +191,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) | |||
190 | } | 191 | } |
191 | } | 192 | } |
192 | 193 | ||
193 | ret = omap_usbhs_enable(dev); | 194 | pm_runtime_enable(dev); |
194 | if (ret) { | 195 | pm_runtime_get_sync(dev); |
195 | dev_err(dev, "failed to start usbhs with err %d\n", ret); | ||
196 | goto err_enable; | ||
197 | } | ||
198 | 196 | ||
199 | /* | 197 | /* |
200 | * An undocumented "feature" in the OMAP3 EHCI controller, | 198 | * An undocumented "feature" in the OMAP3 EHCI controller, |
@@ -242,11 +240,8 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) | |||
242 | return 0; | 240 | return 0; |
243 | 241 | ||
244 | err_add_hcd: | 242 | err_add_hcd: |
245 | omap_usbhs_disable(dev); | ||
246 | |||
247 | err_enable: | ||
248 | disable_put_regulator(pdata); | 243 | disable_put_regulator(pdata); |
249 | usb_put_hcd(hcd); | 244 | pm_runtime_put_sync(dev); |
250 | 245 | ||
251 | err_io: | 246 | err_io: |
252 | iounmap(regs); | 247 | iounmap(regs); |
@@ -268,10 +263,12 @@ static int ehci_hcd_omap_remove(struct platform_device *pdev) | |||
268 | struct usb_hcd *hcd = dev_get_drvdata(dev); | 263 | struct usb_hcd *hcd = dev_get_drvdata(dev); |
269 | 264 | ||
270 | usb_remove_hcd(hcd); | 265 | usb_remove_hcd(hcd); |
271 | omap_usbhs_disable(dev); | ||
272 | disable_put_regulator(dev->platform_data); | 266 | disable_put_regulator(dev->platform_data); |
273 | iounmap(hcd->regs); | 267 | iounmap(hcd->regs); |
274 | usb_put_hcd(hcd); | 268 | usb_put_hcd(hcd); |
269 | pm_runtime_put_sync(dev); | ||
270 | pm_runtime_disable(dev); | ||
271 | |||
275 | return 0; | 272 | return 0; |
276 | } | 273 | } |
277 | 274 | ||
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c new file mode 100644 index 000000000000..55aa35aa3d7b --- /dev/null +++ b/drivers/usb/host/ohci-exynos.c | |||
@@ -0,0 +1,274 @@ | |||
1 | /* | ||
2 | * SAMSUNG EXYNOS USB HOST OHCI Controller | ||
3 | * | ||
4 | * Copyright (C) 2011 Samsung Electronics Co.Ltd | ||
5 | * Author: Jingoo Han <jg1.han@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/clk.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <mach/ohci.h> | ||
17 | #include <plat/usb-phy.h> | ||
18 | |||
19 | struct exynos_ohci_hcd { | ||
20 | struct device *dev; | ||
21 | struct usb_hcd *hcd; | ||
22 | struct clk *clk; | ||
23 | }; | ||
24 | |||
25 | static int ohci_exynos_start(struct usb_hcd *hcd) | ||
26 | { | ||
27 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | ||
28 | int ret; | ||
29 | |||
30 | ohci_dbg(ohci, "ohci_exynos_start, ohci:%p", ohci); | ||
31 | |||
32 | ret = ohci_init(ohci); | ||
33 | if (ret < 0) | ||
34 | return ret; | ||
35 | |||
36 | ret = ohci_run(ohci); | ||
37 | if (ret < 0) { | ||
38 | err("can't start %s", hcd->self.bus_name); | ||
39 | ohci_stop(hcd); | ||
40 | return ret; | ||
41 | } | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static const struct hc_driver exynos_ohci_hc_driver = { | ||
47 | .description = hcd_name, | ||
48 | .product_desc = "EXYNOS OHCI Host Controller", | ||
49 | .hcd_priv_size = sizeof(struct ohci_hcd), | ||
50 | |||
51 | .irq = ohci_irq, | ||
52 | .flags = HCD_MEMORY|HCD_USB11, | ||
53 | |||
54 | .start = ohci_exynos_start, | ||
55 | .stop = ohci_stop, | ||
56 | .shutdown = ohci_shutdown, | ||
57 | |||
58 | .get_frame_number = ohci_get_frame, | ||
59 | |||
60 | .urb_enqueue = ohci_urb_enqueue, | ||
61 | .urb_dequeue = ohci_urb_dequeue, | ||
62 | .endpoint_disable = ohci_endpoint_disable, | ||
63 | |||
64 | .hub_status_data = ohci_hub_status_data, | ||
65 | .hub_control = ohci_hub_control, | ||
66 | #ifdef CONFIG_PM | ||
67 | .bus_suspend = ohci_bus_suspend, | ||
68 | .bus_resume = ohci_bus_resume, | ||
69 | #endif | ||
70 | .start_port_reset = ohci_start_port_reset, | ||
71 | }; | ||
72 | |||
73 | static int __devinit exynos_ohci_probe(struct platform_device *pdev) | ||
74 | { | ||
75 | struct exynos4_ohci_platdata *pdata; | ||
76 | struct exynos_ohci_hcd *exynos_ohci; | ||
77 | struct usb_hcd *hcd; | ||
78 | struct ohci_hcd *ohci; | ||
79 | struct resource *res; | ||
80 | int irq; | ||
81 | int err; | ||
82 | |||
83 | pdata = pdev->dev.platform_data; | ||
84 | if (!pdata) { | ||
85 | dev_err(&pdev->dev, "No platform data defined\n"); | ||
86 | return -EINVAL; | ||
87 | } | ||
88 | |||
89 | exynos_ohci = kzalloc(sizeof(struct exynos_ohci_hcd), GFP_KERNEL); | ||
90 | if (!exynos_ohci) | ||
91 | return -ENOMEM; | ||
92 | |||
93 | exynos_ohci->dev = &pdev->dev; | ||
94 | |||
95 | hcd = usb_create_hcd(&exynos_ohci_hc_driver, &pdev->dev, | ||
96 | dev_name(&pdev->dev)); | ||
97 | if (!hcd) { | ||
98 | dev_err(&pdev->dev, "Unable to create HCD\n"); | ||
99 | err = -ENOMEM; | ||
100 | goto fail_hcd; | ||
101 | } | ||
102 | |||
103 | exynos_ohci->hcd = hcd; | ||
104 | exynos_ohci->clk = clk_get(&pdev->dev, "usbhost"); | ||
105 | |||
106 | if (IS_ERR(exynos_ohci->clk)) { | ||
107 | dev_err(&pdev->dev, "Failed to get usbhost clock\n"); | ||
108 | err = PTR_ERR(exynos_ohci->clk); | ||
109 | goto fail_clk; | ||
110 | } | ||
111 | |||
112 | err = clk_enable(exynos_ohci->clk); | ||
113 | if (err) | ||
114 | goto fail_clken; | ||
115 | |||
116 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
117 | if (!res) { | ||
118 | dev_err(&pdev->dev, "Failed to get I/O memory\n"); | ||
119 | err = -ENXIO; | ||
120 | goto fail_io; | ||
121 | } | ||
122 | |||
123 | hcd->rsrc_start = res->start; | ||
124 | hcd->rsrc_len = resource_size(res); | ||
125 | hcd->regs = ioremap(res->start, resource_size(res)); | ||
126 | if (!hcd->regs) { | ||
127 | dev_err(&pdev->dev, "Failed to remap I/O memory\n"); | ||
128 | err = -ENOMEM; | ||
129 | goto fail_io; | ||
130 | } | ||
131 | |||
132 | irq = platform_get_irq(pdev, 0); | ||
133 | if (!irq) { | ||
134 | dev_err(&pdev->dev, "Failed to get IRQ\n"); | ||
135 | err = -ENODEV; | ||
136 | goto fail; | ||
137 | } | ||
138 | |||
139 | if (pdata->phy_init) | ||
140 | pdata->phy_init(pdev, S5P_USB_PHY_HOST); | ||
141 | |||
142 | ohci = hcd_to_ohci(hcd); | ||
143 | ohci_hcd_init(ohci); | ||
144 | |||
145 | err = usb_add_hcd(hcd, irq, IRQF_SHARED); | ||
146 | if (err) { | ||
147 | dev_err(&pdev->dev, "Failed to add USB HCD\n"); | ||
148 | goto fail; | ||
149 | } | ||
150 | |||
151 | platform_set_drvdata(pdev, exynos_ohci); | ||
152 | |||
153 | return 0; | ||
154 | |||
155 | fail: | ||
156 | iounmap(hcd->regs); | ||
157 | fail_io: | ||
158 | clk_disable(exynos_ohci->clk); | ||
159 | fail_clken: | ||
160 | clk_put(exynos_ohci->clk); | ||
161 | fail_clk: | ||
162 | usb_put_hcd(hcd); | ||
163 | fail_hcd: | ||
164 | kfree(exynos_ohci); | ||
165 | return err; | ||
166 | } | ||
167 | |||
168 | static int __devexit exynos_ohci_remove(struct platform_device *pdev) | ||
169 | { | ||
170 | struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data; | ||
171 | struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev); | ||
172 | struct usb_hcd *hcd = exynos_ohci->hcd; | ||
173 | |||
174 | usb_remove_hcd(hcd); | ||
175 | |||
176 | if (pdata && pdata->phy_exit) | ||
177 | pdata->phy_exit(pdev, S5P_USB_PHY_HOST); | ||
178 | |||
179 | iounmap(hcd->regs); | ||
180 | |||
181 | clk_disable(exynos_ohci->clk); | ||
182 | clk_put(exynos_ohci->clk); | ||
183 | |||
184 | usb_put_hcd(hcd); | ||
185 | kfree(exynos_ohci); | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | static void exynos_ohci_shutdown(struct platform_device *pdev) | ||
191 | { | ||
192 | struct exynos_ohci_hcd *exynos_ohci = platform_get_drvdata(pdev); | ||
193 | struct usb_hcd *hcd = exynos_ohci->hcd; | ||
194 | |||
195 | if (hcd->driver->shutdown) | ||
196 | hcd->driver->shutdown(hcd); | ||
197 | } | ||
198 | |||
199 | #ifdef CONFIG_PM | ||
200 | static int exynos_ohci_suspend(struct device *dev) | ||
201 | { | ||
202 | struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev); | ||
203 | struct usb_hcd *hcd = exynos_ohci->hcd; | ||
204 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | ||
205 | struct platform_device *pdev = to_platform_device(dev); | ||
206 | struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data; | ||
207 | unsigned long flags; | ||
208 | int rc = 0; | ||
209 | |||
210 | /* | ||
211 | * Root hub was already suspended. Disable irq emission and | ||
212 | * mark HW unaccessible, bail out if RH has been resumed. Use | ||
213 | * the spinlock to properly synchronize with possible pending | ||
214 | * RH suspend or resume activity. | ||
215 | * | ||
216 | * This is still racy as hcd->state is manipulated outside of | ||
217 | * any locks =P But that will be a different fix. | ||
218 | */ | ||
219 | spin_lock_irqsave(&ohci->lock, flags); | ||
220 | if (hcd->state != HC_STATE_SUSPENDED && hcd->state != HC_STATE_HALT) { | ||
221 | rc = -EINVAL; | ||
222 | goto fail; | ||
223 | } | ||
224 | |||
225 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
226 | |||
227 | if (pdata && pdata->phy_exit) | ||
228 | pdata->phy_exit(pdev, S5P_USB_PHY_HOST); | ||
229 | fail: | ||
230 | spin_unlock_irqrestore(&ohci->lock, flags); | ||
231 | |||
232 | return rc; | ||
233 | } | ||
234 | |||
235 | static int exynos_ohci_resume(struct device *dev) | ||
236 | { | ||
237 | struct exynos_ohci_hcd *exynos_ohci = dev_get_drvdata(dev); | ||
238 | struct usb_hcd *hcd = exynos_ohci->hcd; | ||
239 | struct platform_device *pdev = to_platform_device(dev); | ||
240 | struct exynos4_ohci_platdata *pdata = pdev->dev.platform_data; | ||
241 | |||
242 | if (pdata && pdata->phy_init) | ||
243 | pdata->phy_init(pdev, S5P_USB_PHY_HOST); | ||
244 | |||
245 | /* Mark hardware accessible again as we are out of D3 state by now */ | ||
246 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
247 | |||
248 | ohci_finish_controller_resume(hcd); | ||
249 | |||
250 | return 0; | ||
251 | } | ||
252 | #else | ||
253 | #define exynos_ohci_suspend NULL | ||
254 | #define exynos_ohci_resume NULL | ||
255 | #endif | ||
256 | |||
257 | static const struct dev_pm_ops exynos_ohci_pm_ops = { | ||
258 | .suspend = exynos_ohci_suspend, | ||
259 | .resume = exynos_ohci_resume, | ||
260 | }; | ||
261 | |||
262 | static struct platform_driver exynos_ohci_driver = { | ||
263 | .probe = exynos_ohci_probe, | ||
264 | .remove = __devexit_p(exynos_ohci_remove), | ||
265 | .shutdown = exynos_ohci_shutdown, | ||
266 | .driver = { | ||
267 | .name = "exynos-ohci", | ||
268 | .owner = THIS_MODULE, | ||
269 | .pm = &exynos_ohci_pm_ops, | ||
270 | } | ||
271 | }; | ||
272 | |||
273 | MODULE_ALIAS("platform:exynos-ohci"); | ||
274 | MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>"); | ||
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 4fa5d8c4d239..5f5a63241436 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c | |||
@@ -1005,6 +1005,11 @@ MODULE_LICENSE ("GPL"); | |||
1005 | #define PLATFORM_DRIVER ohci_hcd_s3c2410_driver | 1005 | #define PLATFORM_DRIVER ohci_hcd_s3c2410_driver |
1006 | #endif | 1006 | #endif |
1007 | 1007 | ||
1008 | #ifdef CONFIG_USB_OHCI_EXYNOS | ||
1009 | #include "ohci-exynos.c" | ||
1010 | #define PLATFORM_DRIVER exynos_ohci_driver | ||
1011 | #endif | ||
1012 | |||
1008 | #ifdef CONFIG_USB_OHCI_HCD_OMAP1 | 1013 | #ifdef CONFIG_USB_OHCI_HCD_OMAP1 |
1009 | #include "ohci-omap.c" | 1014 | #include "ohci-omap.c" |
1010 | #define OMAP1_PLATFORM_DRIVER ohci_hcd_omap_driver | 1015 | #define OMAP1_PLATFORM_DRIVER ohci_hcd_omap_driver |
diff --git a/drivers/usb/host/ohci-omap3.c b/drivers/usb/host/ohci-omap3.c index 516ebc4d6cc2..1b8133b6e451 100644 --- a/drivers/usb/host/ohci-omap3.c +++ b/drivers/usb/host/ohci-omap3.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
33 | #include <plat/usb.h> | 33 | #include <plat/usb.h> |
34 | #include <linux/pm_runtime.h> | ||
34 | 35 | ||
35 | /*-------------------------------------------------------------------------*/ | 36 | /*-------------------------------------------------------------------------*/ |
36 | 37 | ||
@@ -134,7 +135,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev) | |||
134 | int irq; | 135 | int irq; |
135 | 136 | ||
136 | if (usb_disabled()) | 137 | if (usb_disabled()) |
137 | goto err_end; | 138 | return -ENODEV; |
138 | 139 | ||
139 | if (!dev->parent) { | 140 | if (!dev->parent) { |
140 | dev_err(dev, "Missing parent device\n"); | 141 | dev_err(dev, "Missing parent device\n"); |
@@ -172,11 +173,8 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev) | |||
172 | hcd->rsrc_len = resource_size(res); | 173 | hcd->rsrc_len = resource_size(res); |
173 | hcd->regs = regs; | 174 | hcd->regs = regs; |
174 | 175 | ||
175 | ret = omap_usbhs_enable(dev); | 176 | pm_runtime_enable(dev); |
176 | if (ret) { | 177 | pm_runtime_get_sync(dev); |
177 | dev_dbg(dev, "failed to start ohci\n"); | ||
178 | goto err_end; | ||
179 | } | ||
180 | 178 | ||
181 | ohci_hcd_init(hcd_to_ohci(hcd)); | 179 | ohci_hcd_init(hcd_to_ohci(hcd)); |
182 | 180 | ||
@@ -189,9 +187,7 @@ static int __devinit ohci_hcd_omap3_probe(struct platform_device *pdev) | |||
189 | return 0; | 187 | return 0; |
190 | 188 | ||
191 | err_add_hcd: | 189 | err_add_hcd: |
192 | omap_usbhs_disable(dev); | 190 | pm_runtime_put_sync(dev); |
193 | |||
194 | err_end: | ||
195 | usb_put_hcd(hcd); | 191 | usb_put_hcd(hcd); |
196 | 192 | ||
197 | err_io: | 193 | err_io: |
@@ -220,9 +216,9 @@ static int __devexit ohci_hcd_omap3_remove(struct platform_device *pdev) | |||
220 | 216 | ||
221 | iounmap(hcd->regs); | 217 | iounmap(hcd->regs); |
222 | usb_remove_hcd(hcd); | 218 | usb_remove_hcd(hcd); |
223 | omap_usbhs_disable(dev); | 219 | pm_runtime_put_sync(dev); |
220 | pm_runtime_disable(dev); | ||
224 | usb_put_hcd(hcd); | 221 | usb_put_hcd(hcd); |
225 | |||
226 | return 0; | 222 | return 0; |
227 | } | 223 | } |
228 | 224 | ||
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h new file mode 100644 index 000000000000..05071ee34c3f --- /dev/null +++ b/include/linux/gpio-pxa.h | |||
@@ -0,0 +1,16 @@ | |||
1 | #ifndef __GPIO_PXA_H | ||
2 | #define __GPIO_PXA_H | ||
3 | |||
4 | #define GPIO_bit(x) (1 << ((x) & 0x1f)) | ||
5 | |||
6 | #define gpio_to_bank(gpio) ((gpio) >> 5) | ||
7 | |||
8 | /* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). | ||
9 | * Those cases currently cause holes in the GPIO number space, the | ||
10 | * actual number of the last GPIO is recorded by 'pxa_last_gpio'. | ||
11 | */ | ||
12 | extern int pxa_last_gpio; | ||
13 | |||
14 | extern int pxa_irq_to_gpio(int irq); | ||
15 | |||
16 | #endif /* __GPIO_PXA_H */ | ||
diff --git a/include/sound/saif.h b/include/sound/saif.h index d0e0de7984ec..f22f3e16edf4 100644 --- a/include/sound/saif.h +++ b/include/sound/saif.h | |||
@@ -10,7 +10,7 @@ | |||
10 | #define __SOUND_SAIF_H__ | 10 | #define __SOUND_SAIF_H__ |
11 | 11 | ||
12 | struct mxs_saif_platform_data { | 12 | struct mxs_saif_platform_data { |
13 | int (*init) (void); | 13 | bool master_mode; /* if true use master mode */ |
14 | int (*get_master_id) (unsigned int saif_id); | 14 | int master_id; /* id of the master if in slave mode */ |
15 | }; | 15 | }; |
16 | #endif | 16 | #endif |
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 76dc74d24fc2..1ef697fe1731 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c | |||
@@ -625,13 +625,6 @@ static int mxs_saif_probe(struct platform_device *pdev) | |||
625 | if (pdev->id >= ARRAY_SIZE(mxs_saif)) | 625 | if (pdev->id >= ARRAY_SIZE(mxs_saif)) |
626 | return -EINVAL; | 626 | return -EINVAL; |
627 | 627 | ||
628 | pdata = pdev->dev.platform_data; | ||
629 | if (pdata && pdata->init) { | ||
630 | ret = pdata->init(); | ||
631 | if (ret) | ||
632 | return ret; | ||
633 | } | ||
634 | |||
635 | saif = kzalloc(sizeof(*saif), GFP_KERNEL); | 628 | saif = kzalloc(sizeof(*saif), GFP_KERNEL); |
636 | if (!saif) | 629 | if (!saif) |
637 | return -ENOMEM; | 630 | return -ENOMEM; |
@@ -639,12 +632,17 @@ static int mxs_saif_probe(struct platform_device *pdev) | |||
639 | mxs_saif[pdev->id] = saif; | 632 | mxs_saif[pdev->id] = saif; |
640 | saif->id = pdev->id; | 633 | saif->id = pdev->id; |
641 | 634 | ||
642 | saif->master_id = saif->id; | 635 | pdata = pdev->dev.platform_data; |
643 | if (pdata && pdata->get_master_id) { | 636 | if (pdata && !pdata->master_mode) { |
644 | saif->master_id = pdata->get_master_id(saif->id); | 637 | saif->master_id = pdata->master_id; |
645 | if (saif->master_id < 0 || | 638 | if (saif->master_id < 0 || |
646 | saif->master_id >= ARRAY_SIZE(mxs_saif)) | 639 | saif->master_id >= ARRAY_SIZE(mxs_saif) || |
640 | saif->master_id == saif->id) { | ||
641 | dev_err(&pdev->dev, "get wrong master id\n"); | ||
647 | return -EINVAL; | 642 | return -EINVAL; |
643 | } | ||
644 | } else { | ||
645 | saif->master_id = saif->id; | ||
648 | } | 646 | } |
649 | 647 | ||
650 | saif->clk = clk_get(&pdev->dev, NULL); | 648 | saif->clk = clk_get(&pdev->dev, NULL); |