diff options
-rw-r--r-- | arch/arm/mach-exynos/Kconfig | 7 | ||||
-rw-r--r-- | arch/arm/mach-exynos/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-exynos/dma.c | 141 | ||||
-rw-r--r-- | arch/arm/plat-samsung/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/dma-pl330.h | 1 |
5 files changed, 121 insertions, 32 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 88898ef5261a..4bb2f9464e23 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
@@ -61,6 +61,7 @@ config SOC_EXYNOS5250 | |||
61 | bool "SAMSUNG EXYNOS5250" | 61 | bool "SAMSUNG EXYNOS5250" |
62 | default y | 62 | default y |
63 | depends on ARCH_EXYNOS5 | 63 | depends on ARCH_EXYNOS5 |
64 | select SAMSUNG_DMADEV | ||
64 | help | 65 | help |
65 | Enable EXYNOS5250 SoC support | 66 | Enable EXYNOS5250 SoC support |
66 | 67 | ||
@@ -70,7 +71,7 @@ config EXYNOS4_MCT | |||
70 | help | 71 | help |
71 | Use MCT (Multi Core Timer) as kernel timers | 72 | Use MCT (Multi Core Timer) as kernel timers |
72 | 73 | ||
73 | config EXYNOS4_DEV_DMA | 74 | config EXYNOS_DEV_DMA |
74 | bool | 75 | bool |
75 | help | 76 | help |
76 | Compile in amba device definitions for DMA controller | 77 | Compile in amba device definitions for DMA controller |
@@ -228,7 +229,7 @@ config MACH_ARMLEX4210 | |||
228 | select S3C_DEV_HSMMC2 | 229 | select S3C_DEV_HSMMC2 |
229 | select S3C_DEV_HSMMC3 | 230 | select S3C_DEV_HSMMC3 |
230 | select EXYNOS4_DEV_AHCI | 231 | select EXYNOS4_DEV_AHCI |
231 | select EXYNOS4_DEV_DMA | 232 | select EXYNOS_DEV_DMA |
232 | select EXYNOS4_SETUP_SDHCI | 233 | select EXYNOS4_SETUP_SDHCI |
233 | help | 234 | help |
234 | Machine support for Samsung ARMLEX4210 based on EXYNOS4210 | 235 | Machine support for Samsung ARMLEX4210 based on EXYNOS4210 |
@@ -352,7 +353,7 @@ config MACH_SMDK4212 | |||
352 | select SAMSUNG_DEV_KEYPAD | 353 | select SAMSUNG_DEV_KEYPAD |
353 | select SAMSUNG_DEV_PWM | 354 | select SAMSUNG_DEV_PWM |
354 | select EXYNOS_DEV_SYSMMU | 355 | select EXYNOS_DEV_SYSMMU |
355 | select EXYNOS4_DEV_DMA | 356 | select EXYNOS_DEV_DMA |
356 | select EXYNOS4_SETUP_I2C1 | 357 | select EXYNOS4_SETUP_I2C1 |
357 | select EXYNOS4_SETUP_I2C3 | 358 | select EXYNOS4_SETUP_I2C3 |
358 | select EXYNOS4_SETUP_I2C7 | 359 | select EXYNOS4_SETUP_I2C7 |
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index bd7e7654a250..84c06ae53ee8 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile | |||
@@ -51,7 +51,7 @@ obj-y += dev-uart.o | |||
51 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o | 51 | obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o |
52 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o | 52 | obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o |
53 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o | 53 | obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o |
54 | obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o | 54 | obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o |
55 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o | 55 | obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o |
56 | obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o | 56 | obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o |
57 | obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o | 57 | obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o |
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 69aaa4503205..f60b66dbcf84 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -103,10 +103,45 @@ static u8 exynos4212_pdma0_peri[] = { | |||
103 | DMACH_MIPI_HSI5, | 103 | DMACH_MIPI_HSI5, |
104 | }; | 104 | }; |
105 | 105 | ||
106 | struct dma_pl330_platdata exynos4_pdma0_pdata; | 106 | static u8 exynos5250_pdma0_peri[] = { |
107 | DMACH_PCM0_RX, | ||
108 | DMACH_PCM0_TX, | ||
109 | DMACH_PCM2_RX, | ||
110 | DMACH_PCM2_TX, | ||
111 | DMACH_SPI0_RX, | ||
112 | DMACH_SPI0_TX, | ||
113 | DMACH_SPI2_RX, | ||
114 | DMACH_SPI2_TX, | ||
115 | DMACH_I2S0S_TX, | ||
116 | DMACH_I2S0_RX, | ||
117 | DMACH_I2S0_TX, | ||
118 | DMACH_I2S2_RX, | ||
119 | DMACH_I2S2_TX, | ||
120 | DMACH_UART0_RX, | ||
121 | DMACH_UART0_TX, | ||
122 | DMACH_UART2_RX, | ||
123 | DMACH_UART2_TX, | ||
124 | DMACH_UART4_RX, | ||
125 | DMACH_UART4_TX, | ||
126 | DMACH_SLIMBUS0_RX, | ||
127 | DMACH_SLIMBUS0_TX, | ||
128 | DMACH_SLIMBUS2_RX, | ||
129 | DMACH_SLIMBUS2_TX, | ||
130 | DMACH_SLIMBUS4_RX, | ||
131 | DMACH_SLIMBUS4_TX, | ||
132 | DMACH_AC97_MICIN, | ||
133 | DMACH_AC97_PCMIN, | ||
134 | DMACH_AC97_PCMOUT, | ||
135 | DMACH_MIPI_HSI0, | ||
136 | DMACH_MIPI_HSI2, | ||
137 | DMACH_MIPI_HSI4, | ||
138 | DMACH_MIPI_HSI6, | ||
139 | }; | ||
140 | |||
141 | static struct dma_pl330_platdata exynos_pdma0_pdata; | ||
107 | 142 | ||
108 | static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, | 143 | static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330, |
109 | EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos4_pdma0_pdata); | 144 | EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos_pdma0_pdata); |
110 | 145 | ||
111 | static u8 exynos4210_pdma1_peri[] = { | 146 | static u8 exynos4210_pdma1_peri[] = { |
112 | DMACH_PCM0_RX, | 147 | DMACH_PCM0_RX, |
@@ -169,10 +204,45 @@ static u8 exynos4212_pdma1_peri[] = { | |||
169 | DMACH_MIPI_HSI7, | 204 | DMACH_MIPI_HSI7, |
170 | }; | 205 | }; |
171 | 206 | ||
172 | static struct dma_pl330_platdata exynos4_pdma1_pdata; | 207 | static u8 exynos5250_pdma1_peri[] = { |
208 | DMACH_PCM0_RX, | ||
209 | DMACH_PCM0_TX, | ||
210 | DMACH_PCM1_RX, | ||
211 | DMACH_PCM1_TX, | ||
212 | DMACH_SPI1_RX, | ||
213 | DMACH_SPI1_TX, | ||
214 | DMACH_PWM, | ||
215 | DMACH_SPDIF, | ||
216 | DMACH_I2S0S_TX, | ||
217 | DMACH_I2S0_RX, | ||
218 | DMACH_I2S0_TX, | ||
219 | DMACH_I2S1_RX, | ||
220 | DMACH_I2S1_TX, | ||
221 | DMACH_UART0_RX, | ||
222 | DMACH_UART0_TX, | ||
223 | DMACH_UART1_RX, | ||
224 | DMACH_UART1_TX, | ||
225 | DMACH_UART3_RX, | ||
226 | DMACH_UART3_TX, | ||
227 | DMACH_SLIMBUS1_RX, | ||
228 | DMACH_SLIMBUS1_TX, | ||
229 | DMACH_SLIMBUS3_RX, | ||
230 | DMACH_SLIMBUS3_TX, | ||
231 | DMACH_SLIMBUS5_RX, | ||
232 | DMACH_SLIMBUS5_TX, | ||
233 | DMACH_SLIMBUS0AUX_RX, | ||
234 | DMACH_SLIMBUS0AUX_TX, | ||
235 | DMACH_DISP1, | ||
236 | DMACH_MIPI_HSI1, | ||
237 | DMACH_MIPI_HSI3, | ||
238 | DMACH_MIPI_HSI5, | ||
239 | DMACH_MIPI_HSI7, | ||
240 | }; | ||
173 | 241 | ||
174 | static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, | 242 | static struct dma_pl330_platdata exynos_pdma1_pdata; |
175 | EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos4_pdma1_pdata); | 243 | |
244 | static AMBA_AHB_DEVICE(exynos_pdma1, "dma-pl330.1", 0x00041330, | ||
245 | EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos_pdma1_pdata); | ||
176 | 246 | ||
177 | static u8 mdma_peri[] = { | 247 | static u8 mdma_peri[] = { |
178 | DMACH_MTOM_0, | 248 | DMACH_MTOM_0, |
@@ -185,46 +255,63 @@ static u8 mdma_peri[] = { | |||
185 | DMACH_MTOM_7, | 255 | DMACH_MTOM_7, |
186 | }; | 256 | }; |
187 | 257 | ||
188 | static struct dma_pl330_platdata exynos4_mdma1_pdata = { | 258 | static struct dma_pl330_platdata exynos_mdma1_pdata = { |
189 | .nr_valid_peri = ARRAY_SIZE(mdma_peri), | 259 | .nr_valid_peri = ARRAY_SIZE(mdma_peri), |
190 | .peri_id = mdma_peri, | 260 | .peri_id = mdma_peri, |
191 | }; | 261 | }; |
192 | 262 | ||
193 | static AMBA_AHB_DEVICE(exynos4_mdma1, "dma-pl330.2", 0x00041330, | 263 | static AMBA_AHB_DEVICE(exynos_mdma1, "dma-pl330.2", 0x00041330, |
194 | EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos4_mdma1_pdata); | 264 | EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos_mdma1_pdata); |
195 | 265 | ||
196 | static int __init exynos4_dma_init(void) | 266 | static int __init exynos_dma_init(void) |
197 | { | 267 | { |
198 | if (of_have_populated_dt()) | 268 | if (of_have_populated_dt()) |
199 | return 0; | 269 | return 0; |
200 | 270 | ||
201 | if (soc_is_exynos4210()) { | 271 | if (soc_is_exynos4210()) { |
202 | exynos4_pdma0_pdata.nr_valid_peri = | 272 | exynos_pdma0_pdata.nr_valid_peri = |
203 | ARRAY_SIZE(exynos4210_pdma0_peri); | 273 | ARRAY_SIZE(exynos4210_pdma0_peri); |
204 | exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri; | 274 | exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri; |
205 | exynos4_pdma1_pdata.nr_valid_peri = | 275 | exynos_pdma1_pdata.nr_valid_peri = |
206 | ARRAY_SIZE(exynos4210_pdma1_peri); | 276 | ARRAY_SIZE(exynos4210_pdma1_peri); |
207 | exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri; | 277 | exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; |
208 | } else if (soc_is_exynos4212() || soc_is_exynos4412()) { | 278 | } else if (soc_is_exynos4212() || soc_is_exynos4412()) { |
209 | exynos4_pdma0_pdata.nr_valid_peri = | 279 | exynos_pdma0_pdata.nr_valid_peri = |
210 | ARRAY_SIZE(exynos4212_pdma0_peri); | 280 | ARRAY_SIZE(exynos4212_pdma0_peri); |
211 | exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri; | 281 | exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri; |
212 | exynos4_pdma1_pdata.nr_valid_peri = | 282 | exynos_pdma1_pdata.nr_valid_peri = |
213 | ARRAY_SIZE(exynos4212_pdma1_peri); | 283 | ARRAY_SIZE(exynos4212_pdma1_peri); |
214 | exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri; | 284 | exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri; |
285 | } else if (soc_is_exynos5250()) { | ||
286 | exynos_pdma0_pdata.nr_valid_peri = | ||
287 | ARRAY_SIZE(exynos5250_pdma0_peri); | ||
288 | exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri; | ||
289 | exynos_pdma1_pdata.nr_valid_peri = | ||
290 | ARRAY_SIZE(exynos5250_pdma1_peri); | ||
291 | exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri; | ||
292 | |||
293 | exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0; | ||
294 | exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K; | ||
295 | exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0; | ||
296 | exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1; | ||
297 | exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K; | ||
298 | exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1; | ||
299 | exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1; | ||
300 | exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K; | ||
301 | exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1; | ||
215 | } | 302 | } |
216 | 303 | ||
217 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | 304 | dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask); |
218 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | 305 | dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask); |
219 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); | 306 | amba_device_register(&exynos_pdma0_device, &iomem_resource); |
220 | 307 | ||
221 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); | 308 | dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask); |
222 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); | 309 | dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask); |
223 | amba_device_register(&exynos4_pdma1_device, &iomem_resource); | 310 | amba_device_register(&exynos_pdma1_device, &iomem_resource); |
224 | 311 | ||
225 | dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask); | 312 | dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask); |
226 | amba_device_register(&exynos4_mdma1_device, &iomem_resource); | 313 | amba_device_register(&exynos_mdma1_device, &iomem_resource); |
227 | 314 | ||
228 | return 0; | 315 | return 0; |
229 | } | 316 | } |
230 | arch_initcall(exynos4_dma_init); | 317 | arch_initcall(exynos_dma_init); |
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index a0ffc77da809..77e65b483f90 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -291,7 +291,7 @@ config S3C_DMA | |||
291 | config SAMSUNG_DMADEV | 291 | config SAMSUNG_DMADEV |
292 | bool | 292 | bool |
293 | select DMADEVICES | 293 | select DMADEVICES |
294 | select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \ | 294 | select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \ |
295 | CPU_S5P6450 || CPU_S5P6440) | 295 | CPU_S5P6450 || CPU_S5P6440) |
296 | select ARM_AMBA | 296 | select ARM_AMBA |
297 | help | 297 | help |
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index 0670f37aaaed..d384a8016b47 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
@@ -90,6 +90,7 @@ enum dma_ch { | |||
90 | DMACH_MIPI_HSI5, | 90 | DMACH_MIPI_HSI5, |
91 | DMACH_MIPI_HSI6, | 91 | DMACH_MIPI_HSI6, |
92 | DMACH_MIPI_HSI7, | 92 | DMACH_MIPI_HSI7, |
93 | DMACH_DISP1, | ||
93 | DMACH_MTOM_0, | 94 | DMACH_MTOM_0, |
94 | DMACH_MTOM_1, | 95 | DMACH_MTOM_1, |
95 | DMACH_MTOM_2, | 96 | DMACH_MTOM_2, |