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-rw-r--r--drivers/spi/spi-pxa2xx.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index f440dcee852b..e0fd6f63c93e 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -69,6 +69,8 @@ MODULE_ALIAS("platform:pxa2xx-spi");
69#define LPSS_TX_HITHRESH_DFLT 224 69#define LPSS_TX_HITHRESH_DFLT 224
70 70
71/* Offset from drv_data->lpss_base */ 71/* Offset from drv_data->lpss_base */
72#define GENERAL_REG 0x08
73#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
72#define SSP_REG 0x0c 74#define SSP_REG 0x0c
73#define SPI_CS_CONTROL 0x18 75#define SPI_CS_CONTROL 0x18
74#define SPI_CS_CONTROL_SW_MODE BIT(0) 76#define SPI_CS_CONTROL_SW_MODE BIT(0)
@@ -142,8 +144,13 @@ detection_done:
142 __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value); 144 __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
143 145
144 /* Enable multiblock DMA transfers */ 146 /* Enable multiblock DMA transfers */
145 if (drv_data->master_info->enable_dma) 147 if (drv_data->master_info->enable_dma) {
146 __lpss_ssp_write_priv(drv_data, SSP_REG, 1); 148 __lpss_ssp_write_priv(drv_data, SSP_REG, 1);
149
150 value = __lpss_ssp_read_priv(drv_data, GENERAL_REG);
151 value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE;
152 __lpss_ssp_write_priv(drv_data, GENERAL_REG, value);
153 }
147} 154}
148 155
149static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable) 156static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)