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-rw-r--r--arch/arm/mach-clps711x/Kconfig6
-rw-r--r--arch/arm/mach-clps711x/Makefile1
-rw-r--r--arch/arm/mach-clps711x/ceiva.c64
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h48
-rw-r--r--arch/arm/tools/mach-types1
-rw-r--r--drivers/video/Kconfig12
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/epson1355fb.c749
-rw-r--r--include/video/epson1355.h64
9 files changed, 0 insertions, 946 deletions
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index ea036d621581..e6135363765a 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -16,12 +16,6 @@ config ARCH_CDB89712
16 The board includes 2 serial ports, Ethernet, IRDA, and expansion 16 The board includes 2 serial ports, Ethernet, IRDA, and expansion
17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM. 17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
18 18
19config ARCH_CEIVA
20 bool "CEIVA"
21 help
22 Say Y here if you intend to run this kernel on the Ceiva/Polaroid
23 PhotoMax Digital Picture Frame.
24
25config ARCH_CLEP7312 19config ARCH_CLEP7312
26 bool "CLEP7312" 20 bool "CLEP7312"
27 help 21 help
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index f2f0256232e3..aed9eb664499 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -9,7 +9,6 @@ obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
11 11
12obj-$(CONFIG_ARCH_CEIVA) += ceiva.o
13obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o 12obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
14obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o 13obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
15obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o 14obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
deleted file mode 100644
index a70147e347ac..000000000000
--- a/arch/arm/mach-clps711x/ceiva.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps711x/arch-ceiva.c
3 *
4 * Copyright (C) 2002, Rob Scott <rscott@mtrob.fdns.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23
24#include <asm/setup.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27
28#include <linux/kernel.h>
29
30#include <mach/hardware.h>
31#include <asm/page.h>
32#include <asm/pgtable.h>
33#include <asm/sizes.h>
34
35#include <asm/mach/map.h>
36
37#include "common.h"
38
39static struct map_desc ceiva_io_desc[] __initdata = {
40 /* SED1355 controlled video RAM & registers */
41 {
42 .virtual = CEIVA_VIRT_SED1355,
43 .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355),
44 .length = SZ_2M,
45 .type = MT_DEVICE
46 }
47};
48
49
50static void __init ceiva_map_io(void)
51{
52 clps711x_map_io();
53 iotable_init(ceiva_io_desc, ARRAY_SIZE(ceiva_io_desc));
54}
55
56
57MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
58 /* Maintainer: Rob Scott */
59 .atag_offset = 0x100,
60 .map_io = ceiva_map_io,
61 .init_irq = clps711x_init_irq,
62 .timer = &clps711x_timer,
63 .restart = clps711x_restart,
64MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 13a64fcd7dd1..8497775d6ee5 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -116,7 +116,6 @@
116 116
117#endif /* CONFIG_ARCH_EDB7211 */ 117#endif /* CONFIG_ARCH_EDB7211 */
118 118
119
120/* 119/*
121 * Relevant bits in port D, which controls power to the various parts of 120 * Relevant bits in port D, which controls power to the various parts of
122 * the LCD on the EDB7211. 121 * the LCD on the EDB7211.
@@ -125,51 +124,4 @@
125#define EDB_PD2_LCDEN (1<<2) 124#define EDB_PD2_LCDEN (1<<2)
126#define EDB_PD3_LCDBL (1<<3) 125#define EDB_PD3_LCDBL (1<<3)
127 126
128
129#if defined (CONFIG_ARCH_CEIVA)
130
131/*
132 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
133 * for them.
134 *
135 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
136 * in jumpered boot mode.
137 */
138#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
139#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
140
141#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */
142#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */
143
144#define CEIVA_FLASH_SIZE 0x100000
145#define CEIVA_FLASH_WIDTH 2
146
147/*
148 * SED1355 LCD controller
149 */
150#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE
151#define CEIVA_VIRT_SED1355 (0xfc000000)
152
153/*
154 * Relevant bits in port D, which controls power to the various parts of
155 * the LCD on the Ceiva Photo Max, and reset to the LCD controller.
156 */
157
158// Reset line to SED1355 (must be high to operate)
159#define CEIVA_PD1_LCDRST (1<<1)
160// LCD panel enable (set to one, to enable LCD)
161#define CEIVA_PD4_LCDEN (1<<4)
162// Backlight (set to one, to turn on backlight
163#define CEIVA_PD5_LCDBL (1<<5)
164
165/*
166 * Relevant bits in port B, which report the status of the buttons.
167 */
168
169// White button
170#define CEIVA_PB4_WHT_BTN (1<<4)
171// Black button
172#define CEIVA_PB0_BLK_BTN (1<<0)
173#endif // #if defined (CONFIG_ARCH_CEIVA)
174
175#endif 127#endif
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 2997e56ce0dd..ae87c5e3cbd2 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -66,7 +66,6 @@ iq80321 ARCH_IQ80321 IQ80321 169
66ks8695 ARCH_KS8695 KS8695 180 66ks8695 ARCH_KS8695 KS8695 180
67karo ARCH_KARO KARO 190 67karo ARCH_KARO KARO 190
68smdk2410 ARCH_SMDK2410 SMDK2410 193 68smdk2410 ARCH_SMDK2410 SMDK2410 193
69ceiva ARCH_CEIVA CEIVA 200
70voiceblue MACH_VOICEBLUE VOICEBLUE 218 69voiceblue MACH_VOICEBLUE VOICEBLUE 218
71h5400 ARCH_H5400 H5400 220 70h5400 ARCH_H5400 H5400 220
72omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234 71omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 0217f7415ef5..8c17adbe0065 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -979,18 +979,6 @@ config FB_PVR2
979 (<file:drivers/video/pvr2fb.c>). Please see the file 979 (<file:drivers/video/pvr2fb.c>). Please see the file
980 <file:Documentation/fb/pvr2fb.txt>. 980 <file:Documentation/fb/pvr2fb.txt>.
981 981
982config FB_EPSON1355
983 bool "Epson 1355 framebuffer support"
984 depends on (FB = y) && ARCH_CEIVA
985 select FB_CFB_FILLRECT
986 select FB_CFB_COPYAREA
987 select FB_CFB_IMAGEBLIT
988 help
989 Build in support for the SED1355 Epson Research Embedded RAMDAC
990 LCD/CRT Controller (since redesignated as the S1D13505) as a
991 framebuffer. Product specs at
992 <http://vdc.epson.com/>.
993
994config FB_S1D13XXX 982config FB_S1D13XXX
995 tristate "Epson S1D13XXX framebuffer support" 983 tristate "Epson S1D13XXX framebuffer support"
996 depends on FB 984 depends on FB
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ee8dafb69e36..194035986af2 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -94,7 +94,6 @@ obj-$(CONFIG_FB_G364) += g364fb.o
94obj-$(CONFIG_FB_EP93XX) += ep93xx-fb.o 94obj-$(CONFIG_FB_EP93XX) += ep93xx-fb.o
95obj-$(CONFIG_FB_SA1100) += sa1100fb.o 95obj-$(CONFIG_FB_SA1100) += sa1100fb.o
96obj-$(CONFIG_FB_HIT) += hitfb.o 96obj-$(CONFIG_FB_HIT) += hitfb.o
97obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o
98obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o 97obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
99obj-$(CONFIG_FB_PVR2) += pvr2fb.o 98obj-$(CONFIG_FB_PVR2) += pvr2fb.o
100obj-$(CONFIG_FB_VOODOO1) += sstfb.o 99obj-$(CONFIG_FB_VOODOO1) += sstfb.o
diff --git a/drivers/video/epson1355fb.c b/drivers/video/epson1355fb.c
deleted file mode 100644
index 68b9b511ce80..000000000000
--- a/drivers/video/epson1355fb.c
+++ /dev/null
@@ -1,749 +0,0 @@
1/*
2 * linux/drivers/video/epson1355fb.c -- Epson S1D13505 frame buffer for 2.5.
3 *
4 * Epson Research S1D13505 Embedded RAMDAC LCD/CRT Controller
5 * (previously known as SED1355)
6 *
7 * Cf. http://vdc.epson.com/
8 *
9 *
10 * Copyright (C) Hewlett-Packard Company. All rights reserved.
11 *
12 * Written by Christopher Hoover <ch@hpl.hp.com>
13 *
14 * Adapted from:
15 *
16 * linux/drivers/video/skeletonfb.c
17 * Modified to new api Jan 2001 by James Simmons (jsimmons@infradead.org)
18 * Created 28 Dec 1997 by Geert Uytterhoeven
19 *
20 * linux/drivers/video/epson1355fb.c (2.4 driver)
21 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
22 *
23 * This file is subject to the terms and conditions of the GNU General Public
24 * License. See the file COPYING in the main directory of this archive for
25 * more details.
26 *
27 *
28 * Noteworthy Issues
29 * -----------------
30 *
31 * This driver is complicated by the fact that this is a 16-bit chip
32 * and, on at least one platform (ceiva), we can only do 16-bit reads
33 * and writes to the framebuffer. We hide this from user space
34 * except in the case of mmap().
35 *
36 *
37 * To Do
38 * -----
39 *
40 * - Test 8-bit pseudocolor mode
41 * - Allow setting bpp, virtual resolution
42 * - Implement horizontal panning
43 * - (maybe) Implement hardware cursor
44 */
45
46#include <linux/module.h>
47#include <linux/kernel.h>
48#include <linux/errno.h>
49#include <linux/string.h>
50#include <linux/mm.h>
51#include <linux/delay.h>
52#include <linux/fb.h>
53#include <linux/init.h>
54#include <linux/ioport.h>
55#include <linux/platform_device.h>
56
57#include <asm/types.h>
58#include <asm/io.h>
59#include <linux/uaccess.h>
60
61#include <video/epson1355.h>
62
63struct epson1355_par {
64 unsigned long reg_addr;
65 u32 pseudo_palette[16];
66};
67
68/* ------------------------------------------------------------------------- */
69
70#if defined(CONFIG_ARM)
71
72# ifdef CONFIG_ARCH_CEIVA
73# include <mach/hardware.h>
74# define EPSON1355FB_BASE_PHYS (CEIVA_PHYS_SED1355)
75# endif
76
77static inline u8 epson1355_read_reg(struct epson1355_par *par, int index)
78{
79 return __raw_readb(par->reg_addr + index);
80}
81
82static inline void epson1355_write_reg(struct epson1355_par *par, u8 data, int index)
83{
84 __raw_writeb(data, par->reg_addr + index);
85}
86
87#else
88# error "no architecture-specific epson1355_{read,write}_reg"
89#endif
90
91#ifndef EPSON1355FB_BASE_PHYS
92# error "EPSON1355FB_BASE_PHYS is not defined"
93#endif
94
95#define EPSON1355FB_REGS_OFS (0)
96#define EPSON1355FB_REGS_PHYS (EPSON1355FB_BASE_PHYS + EPSON1355FB_REGS_OFS)
97#define EPSON1355FB_REGS_LEN (64)
98
99#define EPSON1355FB_FB_OFS (0x00200000)
100#define EPSON1355FB_FB_PHYS (EPSON1355FB_BASE_PHYS + EPSON1355FB_FB_OFS)
101#define EPSON1355FB_FB_LEN (2 * 1024 * 1024)
102
103/* ------------------------------------------------------------------------- */
104
105static inline u16 epson1355_read_reg16(struct epson1355_par *par, int index)
106{
107 u8 lo = epson1355_read_reg(par, index);
108 u8 hi = epson1355_read_reg(par, index + 1);
109
110 return (hi << 8) | lo;
111}
112
113static inline void epson1355_write_reg16(struct epson1355_par *par, u16 data, int index)
114{
115 u8 lo = data & 0xff;
116 u8 hi = (data >> 8) & 0xff;
117
118 epson1355_write_reg(par, lo, index);
119 epson1355_write_reg(par, hi, index + 1);
120}
121
122static inline u32 epson1355_read_reg20(struct epson1355_par *par, int index)
123{
124 u8 b0 = epson1355_read_reg(par, index);
125 u8 b1 = epson1355_read_reg(par, index + 1);
126 u8 b2 = epson1355_read_reg(par, index + 2);
127
128 return (b2 & 0x0f) << 16 | (b1 << 8) | b0;
129}
130
131static inline void epson1355_write_reg20(struct epson1355_par *par, u32 data, int index)
132{
133 u8 b0 = data & 0xff;
134 u8 b1 = (data >> 8) & 0xff;
135 u8 b2 = (data >> 16) & 0x0f;
136
137 epson1355_write_reg(par, b0, index);
138 epson1355_write_reg(par, b1, index + 1);
139 epson1355_write_reg(par, b2, index + 2);
140}
141
142/* ------------------------------------------------------------------------- */
143
144static void set_lut(struct epson1355_par *par, u8 index, u8 r, u8 g, u8 b)
145{
146 epson1355_write_reg(par, index, REG_LUT_ADDR);
147 epson1355_write_reg(par, r, REG_LUT_DATA);
148 epson1355_write_reg(par, g, REG_LUT_DATA);
149 epson1355_write_reg(par, b, REG_LUT_DATA);
150}
151
152
153/**
154 * epson1355fb_setcolreg - sets a color register.
155 * @regno: Which register in the CLUT we are programming
156 * @red: The red value which can be up to 16 bits wide
157 * @green: The green value which can be up to 16 bits wide
158 * @blue: The blue value which can be up to 16 bits wide.
159 * @transp: If supported the alpha value which can be up to 16 bits wide.
160 * @info: frame buffer info structure
161 *
162 * Returns negative errno on error, or zero on success.
163 */
164static int epson1355fb_setcolreg(unsigned regno, unsigned r, unsigned g,
165 unsigned b, unsigned transp,
166 struct fb_info *info)
167{
168 struct epson1355_par *par = info->par;
169
170 if (info->var.grayscale)
171 r = g = b = (19595 * r + 38470 * g + 7471 * b) >> 16;
172
173 switch (info->fix.visual) {
174 case FB_VISUAL_TRUECOLOR:
175 if (regno >= 16)
176 return -EINVAL;
177
178 ((u32 *) info->pseudo_palette)[regno] =
179 (r & 0xf800) | (g & 0xfc00) >> 5 | (b & 0xf800) >> 11;
180
181 break;
182 case FB_VISUAL_PSEUDOCOLOR:
183 if (regno >= 256)
184 return -EINVAL;
185
186 set_lut(par, regno, r >> 8, g >> 8, b >> 8);
187
188 break;
189 default:
190 return -ENOSYS;
191 }
192 return 0;
193}
194
195/* ------------------------------------------------------------------------- */
196
197/**
198 * epson1355fb_pan_display - Pans the display.
199 * @var: frame buffer variable screen structure
200 * @info: frame buffer structure that represents a single frame buffer
201 *
202 * Pan (or wrap, depending on the `vmode' field) the display using the
203 * `xoffset' and `yoffset' fields of the `var' structure.
204 * If the values don't fit, return -EINVAL.
205 *
206 * Returns negative errno on error, or zero on success.
207 */
208static int epson1355fb_pan_display(struct fb_var_screeninfo *var,
209 struct fb_info *info)
210{
211 struct epson1355_par *par = info->par;
212 u32 start;
213
214 if (var->xoffset != 0) /* not yet ... */
215 return -EINVAL;
216
217 if (var->yoffset + info->var.yres > info->var.yres_virtual)
218 return -EINVAL;
219
220 start = (info->fix.line_length >> 1) * var->yoffset;
221
222 epson1355_write_reg20(par, start, REG_SCRN1_DISP_START_ADDR0);
223
224 return 0;
225}
226
227/* ------------------------------------------------------------------------- */
228
229static void lcd_enable(struct epson1355_par *par, int enable)
230{
231 u8 mode = epson1355_read_reg(par, REG_DISPLAY_MODE);
232
233 if (enable)
234 mode |= 1;
235 else
236 mode &= ~1;
237
238 epson1355_write_reg(par, mode, REG_DISPLAY_MODE);
239}
240
241#if defined(CONFIG_ARCH_CEIVA)
242static void backlight_enable(int enable)
243{
244 /* ### this should be protected by a spinlock ... */
245 u8 pddr = clps_readb(PDDR);
246 if (enable)
247 pddr |= (1 << 5);
248 else
249 pddr &= ~(1 << 5);
250 clps_writeb(pddr, PDDR);
251}
252#else
253static void backlight_enable(int enable)
254{
255}
256#endif
257
258
259/**
260 * epson1355fb_blank - blanks the display.
261 * @blank_mode: the blank mode we want.
262 * @info: frame buffer structure that represents a single frame buffer
263 *
264 * Blank the screen if blank_mode != 0, else unblank. Return 0 if
265 * blanking succeeded, != 0 if un-/blanking failed due to e.g. a
266 * video mode which doesn't support it. Implements VESA suspend
267 * and powerdown modes on hardware that supports disabling hsync/vsync:
268 * blank_mode == 2: suspend vsync
269 * blank_mode == 3: suspend hsync
270 * blank_mode == 4: powerdown
271 *
272 * Returns negative errno on error, or zero on success.
273 *
274 */
275static int epson1355fb_blank(int blank_mode, struct fb_info *info)
276{
277 struct epson1355_par *par = info->par;
278
279 switch (blank_mode) {
280 case FB_BLANK_UNBLANK:
281 case FB_BLANK_NORMAL:
282 lcd_enable(par, 1);
283 backlight_enable(1);
284 break;
285 case FB_BLANK_VSYNC_SUSPEND:
286 case FB_BLANK_HSYNC_SUSPEND:
287 backlight_enable(0);
288 break;
289 case FB_BLANK_POWERDOWN:
290 backlight_enable(0);
291 lcd_enable(par, 0);
292 break;
293 default:
294 return -EINVAL;
295 }
296
297 /* let fbcon do a soft blank for us */
298 return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
299}
300
301/* ------------------------------------------------------------------------- */
302
303/*
304 * We can't use the cfb generic routines, as we have to limit
305 * ourselves to 16-bit or 8-bit loads and stores to this 16-bit
306 * chip.
307 */
308
309static inline void epson1355fb_fb_writel(unsigned long v, unsigned long *a)
310{
311 u16 *p = (u16 *) a;
312 u16 l = v & 0xffff;
313 u16 h = v >> 16;
314
315 fb_writew(l, p);
316 fb_writew(h, p + 1);
317}
318
319static inline unsigned long epson1355fb_fb_readl(const unsigned long *a)
320{
321 const u16 *p = (u16 *) a;
322 u16 l = fb_readw(p);
323 u16 h = fb_readw(p + 1);
324
325 return (h << 16) | l;
326}
327
328#define FB_READL epson1355fb_fb_readl
329#define FB_WRITEL epson1355fb_fb_writel
330
331/* ------------------------------------------------------------------------- */
332
333static inline unsigned long copy_from_user16(void *to, const void *from,
334 unsigned long n)
335{
336 u16 *dst = (u16 *) to;
337 u16 *src = (u16 *) from;
338
339 if (!access_ok(VERIFY_READ, from, n))
340 return n;
341
342 while (n > 1) {
343 u16 v;
344 if (__get_user(v, src))
345 return n;
346
347 fb_writew(v, dst);
348
349 src++, dst++;
350 n -= 2;
351 }
352
353 if (n) {
354 u8 v;
355
356 if (__get_user(v, ((u8 *) src)))
357 return n;
358
359 fb_writeb(v, dst);
360 }
361 return 0;
362}
363
364static inline unsigned long copy_to_user16(void *to, const void *from,
365 unsigned long n)
366{
367 u16 *dst = (u16 *) to;
368 u16 *src = (u16 *) from;
369
370 if (!access_ok(VERIFY_WRITE, to, n))
371 return n;
372
373 while (n > 1) {
374 u16 v = fb_readw(src);
375
376 if (__put_user(v, dst))
377 return n;
378
379 src++, dst++;
380 n -= 2;
381 }
382
383 if (n) {
384 u8 v = fb_readb(src);
385
386 if (__put_user(v, ((u8 *) dst)))
387 return n;
388 }
389 return 0;
390}
391
392
393static ssize_t
394epson1355fb_read(struct fb_info *info, char *buf, size_t count, loff_t * ppos)
395{
396 unsigned long p = *ppos;
397
398 if (p >= info->fix.smem_len)
399 return 0;
400 if (count >= info->fix.smem_len)
401 count = info->fix.smem_len;
402 if (count + p > info->fix.smem_len)
403 count = info->fix.smem_len - p;
404
405 if (count) {
406 char *base_addr;
407
408 base_addr = info->screen_base;
409 count -= copy_to_user16(buf, base_addr + p, count);
410 if (!count)
411 return -EFAULT;
412 *ppos += count;
413 }
414 return count;
415}
416
417static ssize_t
418epson1355fb_write(struct fb_info *info, const char *buf,
419 size_t count, loff_t * ppos)
420{
421 unsigned long p = *ppos;
422 int err;
423
424 /* from fbmem.c except for our own copy_*_user */
425 if (p > info->fix.smem_len)
426 return -ENOSPC;
427 if (count >= info->fix.smem_len)
428 count = info->fix.smem_len;
429 err = 0;
430 if (count + p > info->fix.smem_len) {
431 count = info->fix.smem_len - p;
432 err = -ENOSPC;
433 }
434
435 if (count) {
436 char *base_addr;
437
438 base_addr = info->screen_base;
439 count -= copy_from_user16(base_addr + p, buf, count);
440 *ppos += count;
441 err = -EFAULT;
442 }
443 if (count)
444 return count;
445 return err;
446}
447
448/* ------------------------------------------------------------------------- */
449
450static struct fb_ops epson1355fb_fbops = {
451 .owner = THIS_MODULE,
452 .fb_setcolreg = epson1355fb_setcolreg,
453 .fb_pan_display = epson1355fb_pan_display,
454 .fb_blank = epson1355fb_blank,
455 .fb_fillrect = cfb_fillrect,
456 .fb_copyarea = cfb_copyarea,
457 .fb_imageblit = cfb_imageblit,
458 .fb_read = epson1355fb_read,
459 .fb_write = epson1355fb_write,
460};
461
462/* ------------------------------------------------------------------------- */
463
464static __init unsigned int get_fb_size(struct fb_info *info)
465{
466 unsigned int size = 2 * 1024 * 1024;
467 char *p = info->screen_base;
468
469 /* the 512k framebuffer is aliased at start + 0x80000 * n */
470 fb_writeb(1, p);
471 fb_writeb(0, p + 0x80000);
472 if (!fb_readb(p))
473 size = 512 * 1024;
474
475 fb_writeb(0, p);
476
477 return size;
478}
479
480static int epson1355_width_tab[2][4] __devinitdata =
481 { {4, 8, 16, -1}, {9, 12, 16, -1} };
482static int epson1355_bpp_tab[8] __devinitdata = { 1, 2, 4, 8, 15, 16 };
483
484static void __devinit fetch_hw_state(struct fb_info *info, struct epson1355_par *par)
485{
486 struct fb_var_screeninfo *var = &info->var;
487 struct fb_fix_screeninfo *fix = &info->fix;
488 u8 panel, display;
489 u16 offset;
490 u32 xres, yres;
491 u32 xres_virtual, yres_virtual;
492 int bpp, lcd_bpp;
493 int is_color, is_dual, is_tft;
494 int lcd_enabled, crt_enabled;
495
496 fix->type = FB_TYPE_PACKED_PIXELS;
497
498 display = epson1355_read_reg(par, REG_DISPLAY_MODE);
499 bpp = epson1355_bpp_tab[(display >> 2) & 7];
500
501 switch (bpp) {
502 case 8:
503 fix->visual = FB_VISUAL_PSEUDOCOLOR;
504 var->bits_per_pixel = 8;
505 var->red.offset = var->green.offset = var->blue.offset = 0;
506 var->red.length = var->green.length = var->blue.length = 8;
507 break;
508 case 16:
509 /* 5-6-5 RGB */
510 fix->visual = FB_VISUAL_TRUECOLOR;
511 var->bits_per_pixel = 16;
512 var->red.offset = 11;
513 var->red.length = 5;
514 var->green.offset = 5;
515 var->green.length = 6;
516 var->blue.offset = 0;
517 var->blue.length = 5;
518 break;
519 default:
520 BUG();
521 }
522 fb_alloc_cmap(&(info->cmap), 256, 0);
523
524 panel = epson1355_read_reg(par, REG_PANEL_TYPE);
525 is_color = (panel & 0x04) != 0;
526 is_dual = (panel & 0x02) != 0;
527 is_tft = (panel & 0x01) != 0;
528 crt_enabled = (display & 0x02) != 0;
529 lcd_enabled = (display & 0x01) != 0;
530 lcd_bpp = epson1355_width_tab[is_tft][(panel >> 4) & 3];
531
532 xres = (epson1355_read_reg(par, REG_HORZ_DISP_WIDTH) + 1) * 8;
533 yres = (epson1355_read_reg16(par, REG_VERT_DISP_HEIGHT0) + 1) *
534 ((is_dual && !crt_enabled) ? 2 : 1);
535 offset = epson1355_read_reg16(par, REG_MEM_ADDR_OFFSET0) & 0x7ff;
536 xres_virtual = offset * 16 / bpp;
537 yres_virtual = fix->smem_len / (offset * 2);
538
539 var->xres = xres;
540 var->yres = yres;
541 var->xres_virtual = xres_virtual;
542 var->yres_virtual = yres_virtual;
543 var->xoffset = var->yoffset = 0;
544
545 fix->line_length = offset * 2;
546
547 fix->xpanstep = 0; /* no pan yet */
548 fix->ypanstep = 1;
549 fix->ywrapstep = 0;
550 fix->accel = FB_ACCEL_NONE;
551
552 var->grayscale = !is_color;
553
554#ifdef DEBUG
555 printk(KERN_INFO
556 "epson1355fb: xres=%d, yres=%d, "
557 "is_color=%d, is_dual=%d, is_tft=%d\n",
558 xres, yres, is_color, is_dual, is_tft);
559 printk(KERN_INFO
560 "epson1355fb: bpp=%d, lcd_bpp=%d, "
561 "crt_enabled=%d, lcd_enabled=%d\n",
562 bpp, lcd_bpp, crt_enabled, lcd_enabled);
563#endif
564}
565
566
567static void clearfb16(struct fb_info *info)
568{
569 u16 *dst = (u16 *) info->screen_base;
570 unsigned long n = info->fix.smem_len;
571
572 while (n > 1) {
573 fb_writew(0, dst);
574 dst++, n -= 2;
575 }
576
577 if (n)
578 fb_writeb(0, dst);
579}
580
581static int epson1355fb_remove(struct platform_device *dev)
582{
583 struct fb_info *info = platform_get_drvdata(dev);
584 struct epson1355_par *par = info->par;
585
586 backlight_enable(0);
587 if (par) {
588 lcd_enable(par, 0);
589 if (par && par->reg_addr)
590 iounmap((void *) par->reg_addr);
591 }
592
593 if (info) {
594 fb_dealloc_cmap(&info->cmap);
595 if (info->screen_base)
596 iounmap(info->screen_base);
597 framebuffer_release(info);
598 }
599 release_mem_region(EPSON1355FB_FB_PHYS, EPSON1355FB_FB_LEN);
600 release_mem_region(EPSON1355FB_REGS_PHYS, EPSON1355FB_REGS_LEN);
601 return 0;
602}
603
604static int __devinit epson1355fb_probe(struct platform_device *dev)
605{
606 struct epson1355_par *default_par;
607 struct fb_info *info;
608 u8 revision;
609 int rc = 0;
610
611 if (!request_mem_region(EPSON1355FB_REGS_PHYS, EPSON1355FB_REGS_LEN, "S1D13505 registers")) {
612 printk(KERN_ERR "epson1355fb: unable to reserve "
613 "registers at 0x%0x\n", EPSON1355FB_REGS_PHYS);
614 rc = -EBUSY;
615 goto bail;
616 }
617
618 if (!request_mem_region(EPSON1355FB_FB_PHYS, EPSON1355FB_FB_LEN,
619 "S1D13505 framebuffer")) {
620 printk(KERN_ERR "epson1355fb: unable to reserve "
621 "framebuffer at 0x%0x\n", EPSON1355FB_FB_PHYS);
622 rc = -EBUSY;
623 goto bail;
624 }
625
626 info = framebuffer_alloc(sizeof(struct epson1355_par), &dev->dev);
627 if (!info) {
628 rc = -ENOMEM;
629 goto bail;
630 }
631
632 default_par = info->par;
633 default_par->reg_addr = (unsigned long) ioremap(EPSON1355FB_REGS_PHYS, EPSON1355FB_REGS_LEN);
634 if (!default_par->reg_addr) {
635 printk(KERN_ERR "epson1355fb: unable to map registers\n");
636 rc = -ENOMEM;
637 goto bail;
638 }
639 info->pseudo_palette = default_par->pseudo_palette;
640
641 info->screen_base = ioremap(EPSON1355FB_FB_PHYS, EPSON1355FB_FB_LEN);
642 if (!info->screen_base) {
643 printk(KERN_ERR "epson1355fb: unable to map framebuffer\n");
644 rc = -ENOMEM;
645 goto bail;
646 }
647
648 revision = epson1355_read_reg(default_par, REG_REVISION_CODE);
649 if ((revision >> 2) != 3) {
650 printk(KERN_INFO "epson1355fb: epson1355 not found\n");
651 rc = -ENODEV;
652 goto bail;
653 }
654
655 info->fix.mmio_start = EPSON1355FB_REGS_PHYS;
656 info->fix.mmio_len = EPSON1355FB_REGS_LEN;
657 info->fix.smem_start = EPSON1355FB_FB_PHYS;
658 info->fix.smem_len = get_fb_size(info);
659
660 printk(KERN_INFO "epson1355fb: regs mapped at 0x%lx, fb %d KiB mapped at 0x%p\n",
661 default_par->reg_addr, info->fix.smem_len / 1024, info->screen_base);
662
663 strcpy(info->fix.id, "S1D13505");
664 info->par = default_par;
665 info->fbops = &epson1355fb_fbops;
666 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
667
668 /* we expect the boot loader to have initialized the chip
669 with appropriate parameters from which we can determinte
670 the flavor of lcd panel attached */
671 fetch_hw_state(info, default_par);
672
673 /* turn this puppy on ... */
674 clearfb16(info);
675 backlight_enable(1);
676 lcd_enable(default_par, 1);
677
678 if (register_framebuffer(info) < 0) {
679 rc = -EINVAL;
680 goto bail;
681 }
682 /*
683 * Our driver data.
684 */
685 platform_set_drvdata(dev, info);
686
687 printk(KERN_INFO "fb%d: %s frame buffer device\n",
688 info->node, info->fix.id);
689
690 return 0;
691
692 bail:
693 epson1355fb_remove(dev);
694 return rc;
695}
696
697static struct platform_driver epson1355fb_driver = {
698 .probe = epson1355fb_probe,
699 .remove = epson1355fb_remove,
700 .driver = {
701 .name = "epson1355fb",
702 },
703};
704
705static struct platform_device *epson1355fb_device;
706
707int __init epson1355fb_init(void)
708{
709 int ret = 0;
710
711 if (fb_get_options("epson1355fb", NULL))
712 return -ENODEV;
713
714 ret = platform_driver_register(&epson1355fb_driver);
715
716 if (!ret) {
717 epson1355fb_device = platform_device_alloc("epson1355fb", 0);
718
719 if (epson1355fb_device)
720 ret = platform_device_add(epson1355fb_device);
721 else
722 ret = -ENOMEM;
723
724 if (ret) {
725 platform_device_put(epson1355fb_device);
726 platform_driver_unregister(&epson1355fb_driver);
727 }
728 }
729
730 return ret;
731}
732
733module_init(epson1355fb_init);
734
735#ifdef MODULE
736static void __exit epson1355fb_exit(void)
737{
738 platform_device_unregister(epson1355fb_device);
739 platform_driver_unregister(&epson1355fb_driver);
740}
741
742/* ------------------------------------------------------------------------- */
743
744module_exit(epson1355fb_exit);
745#endif
746
747MODULE_AUTHOR("Christopher Hoover <ch@hpl.hp.com>");
748MODULE_DESCRIPTION("Framebuffer driver for Epson S1D13505");
749MODULE_LICENSE("GPL");
diff --git a/include/video/epson1355.h b/include/video/epson1355.h
deleted file mode 100644
index 9759f299499e..000000000000
--- a/include/video/epson1355.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * include/video/epson13xx.h -- Epson 13xx frame buffer
3 *
4 * Copyright (C) Hewlett-Packard Company. All rights reserved.
5 *
6 * Written by Christopher Hoover <ch@hpl.hp.com>
7 *
8 */
9
10#ifndef _EPSON13XX_H_
11#define _EPSON13XX_H_
12
13#define REG_REVISION_CODE 0x00
14#define REG_MEMORY_CONFIG 0x01
15#define REG_PANEL_TYPE 0x02
16#define REG_MOD_RATE 0x03
17#define REG_HORZ_DISP_WIDTH 0x04
18#define REG_HORZ_NONDISP_PERIOD 0x05
19#define REG_HRTC_START_POSITION 0x06
20#define REG_HRTC_PULSE_WIDTH 0x07
21#define REG_VERT_DISP_HEIGHT0 0x08
22#define REG_VERT_DISP_HEIGHT1 0x09
23#define REG_VERT_NONDISP_PERIOD 0x0A
24#define REG_VRTC_START_POSITION 0x0B
25#define REG_VRTC_PULSE_WIDTH 0x0C
26#define REG_DISPLAY_MODE 0x0D
27#define REG_SCRN1_LINE_COMPARE0 0x0E
28#define REG_SCRN1_LINE_COMPARE1 0x0F
29#define REG_SCRN1_DISP_START_ADDR0 0x10
30#define REG_SCRN1_DISP_START_ADDR1 0x11
31#define REG_SCRN1_DISP_START_ADDR2 0x12
32#define REG_SCRN2_DISP_START_ADDR0 0x13
33#define REG_SCRN2_DISP_START_ADDR1 0x14
34#define REG_SCRN2_DISP_START_ADDR2 0x15
35#define REG_MEM_ADDR_OFFSET0 0x16
36#define REG_MEM_ADDR_OFFSET1 0x17
37#define REG_PIXEL_PANNING 0x18
38#define REG_CLOCK_CONFIG 0x19
39#define REG_POWER_SAVE_CONFIG 0x1A
40#define REG_MISC 0x1B
41#define REG_MD_CONFIG_READBACK0 0x1C
42#define REG_MD_CONFIG_READBACK1 0x1D
43#define REG_GPIO_CONFIG0 0x1E
44#define REG_GPIO_CONFIG1 0x1F
45#define REG_GPIO_CONTROL0 0x20
46#define REG_GPIO_CONTROL1 0x21
47#define REG_PERF_ENHANCEMENT0 0x22
48#define REG_PERF_ENHANCEMENT1 0x23
49#define REG_LUT_ADDR 0x24
50#define REG_RESERVED_1 0x25
51#define REG_LUT_DATA 0x26
52#define REG_INK_CURSOR_CONTROL 0x27
53#define REG_CURSOR_X_POSITION0 0x28
54#define REG_CURSOR_X_POSITION1 0x29
55#define REG_CURSOR_Y_POSITION0 0x2A
56#define REG_CURSOR_Y_POSITION1 0x2B
57#define REG_INK_CURSOR_COLOR0_0 0x2C
58#define REG_INK_CURSOR_COLOR0_1 0x2D
59#define REG_INK_CURSOR_COLOR1_0 0x2E
60#define REG_INK_CURSOR_COLOR1_1 0x2F
61#define REG_INK_CURSOR_START_ADDR 0x30
62#define REG_ALTERNATE_FRM 0x31
63
64#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 15:04:27 -0500