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-rw-r--r--arch/mips/alchemy/common/clocks.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c
index d8991854530e..460c6285c1bb 100644
--- a/arch/mips/alchemy/common/clocks.c
+++ b/arch/mips/alchemy/common/clocks.c
@@ -40,8 +40,6 @@
40static unsigned int au1x00_clock; /* Hz */ 40static unsigned int au1x00_clock; /* Hz */
41static unsigned long uart_baud_base; 41static unsigned long uart_baud_base;
42 42
43static DEFINE_SPINLOCK(time_lock);
44
45/* 43/*
46 * Set the au1000_clock 44 * Set the au1000_clock
47 */ 45 */
@@ -84,9 +82,6 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base)
84unsigned long au1xxx_calc_clock(void) 82unsigned long au1xxx_calc_clock(void)
85{ 83{
86 unsigned long cpu_speed; 84 unsigned long cpu_speed;
87 unsigned long flags;
88
89 spin_lock_irqsave(&time_lock, flags);
90 85
91 /* 86 /*
92 * On early Au1000, sys_cpupll was write-only. Since these 87 * On early Au1000, sys_cpupll was write-only. Since these
@@ -108,8 +103,6 @@ unsigned long au1xxx_calc_clock(void)
108 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL) 103 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)
109 & 0x03) + 2) * 16)); 104 & 0x03) + 2) * 16));
110 105
111 spin_unlock_irqrestore(&time_lock, flags);
112
113 set_au1x00_speed(cpu_speed); 106 set_au1x00_speed(cpu_speed);
114 107
115 return cpu_speed; 108 return cpu_speed;