aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-mmp/aspenite.c1
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/flint.c1
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h2
-rw-r--r--arch/arm/mach-mmp/mmp2.c28
-rw-r--r--arch/arm/mach-mmp/pxa168.c29
-rw-r--r--arch/arm/mach-mmp/pxa910.c29
-rw-r--r--arch/arm/mach-mmp/tavorevb.c1
-rw-r--r--arch/arm/mach-mmp/teton_bga.c1
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c1
-rw-r--r--arch/arm/mach-pxa/devices.c30
-rw-r--r--arch/arm/mach-pxa/devices.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h131
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/idp.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h2
-rw-r--r--arch/arm/mach-pxa/irq.c3
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c6
-rw-r--r--arch/arm/mach-pxa/pxa25x.c3
-rw-r--r--arch/arm/mach-pxa/pxa27x.c3
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c6
-rw-r--r--arch/arm/mach-pxa/pxa95x.c3
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio-pxa.h45
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile2
-rw-r--r--drivers/gpio/gpio-pxa.c135
-rw-r--r--include/linux/gpio-pxa.h16
33 files changed, 271 insertions, 233 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..57e16d4e14dc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -591,6 +591,7 @@ config ARCH_MMP
591 select ARCH_REQUIRE_GPIOLIB 591 select ARCH_REQUIRE_GPIOLIB
592 select CLKDEV_LOOKUP 592 select CLKDEV_LOOKUP
593 select GENERIC_CLOCKEVENTS 593 select GENERIC_CLOCKEVENTS
594 select GPIO_PXA
594 select HAVE_SCHED_CLOCK 595 select HAVE_SCHED_CLOCK
595 select TICK_ONESHOT 596 select TICK_ONESHOT
596 select PLAT_PXA 597 select PLAT_PXA
@@ -673,6 +674,7 @@ config ARCH_PXA
673 select CLKSRC_MMIO 674 select CLKSRC_MMIO
674 select ARCH_REQUIRE_GPIOLIB 675 select ARCH_REQUIRE_GPIOLIB
675 select GENERIC_CLOCKEVENTS 676 select GENERIC_CLOCKEVENTS
677 select GPIO_PXA
676 select HAVE_SCHED_CLOCK 678 select HAVE_SCHED_CLOCK
677 select TICK_ONESHOT 679 select TICK_ONESHOT
678 select PLAT_PXA 680 select PLAT_PXA
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index fb7dfc157a5c..edcbadad31c1 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -231,6 +231,7 @@ static void __init common_init(void)
231 pxa168_add_nand(&aspenite_nand_info); 231 pxa168_add_nand(&aspenite_nand_info);
232 pxa168_add_fb(&aspenite_lcd_info); 232 pxa168_add_fb(&aspenite_lcd_info);
233 pxa168_add_keypad(&aspenite_keypad_info); 233 pxa168_add_keypad(&aspenite_keypad_info);
234 platform_device_register(&pxa168_device_gpio);
234 235
235 /* off-chip devices */ 236 /* off-chip devices */
236 platform_device_register(&smc91x_device); 237 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878d64a0..c5d53e0742e9 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
38 38
39 /* on-chip devices */ 39 /* on-chip devices */
40 pxa168_add_uart(2); 40 pxa168_add_uart(2);
41 platform_device_register(&pxa168_device_gpio);
41} 42}
42 43
43MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") 44MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 983cfb15fbde..eb07565a06a3 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)
202 /* on-chip devices */ 202 /* on-chip devices */
203 mmp2_add_uart(1); 203 mmp2_add_uart(1);
204 mmp2_add_uart(3); 204 mmp2_add_uart(3);
205 platform_device_register(&mmp2_device_gpio);
205 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); 206 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
206 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ 207 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
207 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ 208 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index a64c172082c4..c1f0aa88dd8a 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -110,6 +110,7 @@ static void __init flint_init(void)
110 /* on-chip devices */ 110 /* on-chip devices */
111 mmp2_add_uart(1); 111 mmp2_add_uart(1);
112 mmp2_add_uart(2); 112 mmp2_add_uart(2);
113 platform_device_register(&mmp2_device_gpio);
113 114
114 /* off-chip devices */ 115 /* off-chip devices */
115 platform_device_register(&smc91x_device); 116 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..933420a7c3ba 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(0); 185 pxa168_add_ssp(0);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 platform_device_register(&pxa168_device_gpio);
187 188
188 pxa168_add_eth(&gplugd_eth_platform_data); 189 pxa168_add_eth(&gplugd_eth_platform_data);
189} 190}
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 904466d7eb95..13219ebf5128 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,7 +3,6 @@
3 3
4#include <asm-generic/gpio.h> 4#include <asm-generic/gpio.h>
5 5
6#define __gpio_is_inverted(gpio) (0) 6#include <mach/cputype.h>
7#define __gpio_is_occupied(gpio) (0)
8 7
9#endif /* __ASM_MACH_GPIO_H */ 8#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 2f7b2d3c2b18..cba22fed2265 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;
32extern struct pxa_device_desc mmp2_device_asram; 32extern struct pxa_device_desc mmp2_device_asram;
33extern struct pxa_device_desc mmp2_device_isram; 33extern struct pxa_device_desc mmp2_device_isram;
34 34
35extern struct platform_device mmp2_device_gpio;
36
35static inline int mmp2_add_uart(int id) 37static inline int mmp2_add_uart(int id)
36{ 38{
37 struct pxa_device_desc *d = NULL; 39 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7fb568d2845b..f9286089da3a 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -42,6 +42,8 @@ struct pxa168_usb_pdata {
42/* pdata can be NULL */ 42/* pdata can be NULL */
43int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); 43int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
44 44
45extern struct platform_device pxa168_device_gpio;
46
45static inline int pxa168_add_uart(int id) 47static inline int pxa168_add_uart(int id)
46{ 48{
47 struct pxa_device_desc *d = NULL; 49 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be75591398..4de13abef7bb 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
21extern struct pxa_device_desc pxa910_device_pwm4; 21extern struct pxa_device_desc pxa910_device_pwm4;
22extern struct pxa_device_desc pxa910_device_nand; 22extern struct pxa_device_desc pxa910_device_nand;
23 23
24extern struct platform_device pxa910_device_gpio;
25
24static inline int pxa910_add_uart(int id) 26static inline int pxa910_add_uart(int id)
25{ 27{
26 struct pxa_device_desc *d = NULL; 28 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 5dd1d4a6aeb9..1ed222d3e22b 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/hardware/cache-tauros2.h> 18#include <asm/hardware/cache-tauros2.h>
18 19
@@ -24,7 +25,6 @@
24#include <mach/irqs.h> 25#include <mach/irqs.h>
25#include <mach/dma.h> 26#include <mach/dma.h>
26#include <mach/mfp.h> 27#include <mach/mfp.h>
27#include <mach/gpio-pxa.h>
28#include <mach/devices.h> 28#include <mach/devices.h>
29#include <mach/mmp2.h> 29#include <mach/mmp2.h>
30 30
@@ -33,8 +33,6 @@
33 33
34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35 35
36#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
37
38static struct mfp_addr_map mmp2_addr_map[] __initdata = { 36static struct mfp_addr_map mmp2_addr_map[] __initdata = {
39 37
40 MFP_ADDR_X(GPIO0, GPIO58, 0x54), 38 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -101,12 +99,6 @@ static void __init mmp2_init_gpio(void)
101 99
102 /* enable GPIO clock */ 100 /* enable GPIO clock */
103 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO); 101 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
104
105 /* unmask GPIO edge detection for all 6 banks -- APMASKx */
106 for (i = 0; i < 6; i++)
107 __raw_writel(0xffffffff, APMASK(i));
108
109 pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
110} 102}
111 103
112void __init mmp2_init_irq(void) 104void __init mmp2_init_irq(void)
@@ -230,3 +222,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
230/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ 222/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
231MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); 223MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
232 224
225struct resource mmp2_resource_gpio[] = {
226 {
227 .start = 0xd4019000,
228 .end = 0xd4019fff,
229 .flags = IORESOURCE_MEM,
230 }, {
231 .start = IRQ_MMP2_GPIO,
232 .end = IRQ_MMP2_GPIO,
233 .flags = IORESOURCE_IRQ,
234 },
235};
236
237struct platform_device mmp2_device_gpio = {
238 .name = "pxa-gpio",
239 .id = -1,
240 .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
241 .resource = mmp2_resource_gpio,
242};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 76ca15c00e45..fefdfe59c07c 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/mach/time.h> 18#include <asm/mach/time.h>
18#include <mach/addr-map.h> 19#include <mach/addr-map.h>
@@ -20,7 +21,6 @@
20#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
21#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
22#include <mach/irqs.h> 23#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
@@ -43,20 +43,12 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
43 MFP_ADDR_END, 43 MFP_ADDR_END,
44}; 44};
45 45
46#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
47
48static void __init pxa168_init_gpio(void) 46static void __init pxa168_init_gpio(void)
49{ 47{
50 int i; 48 int i;
51 49
52 /* enable GPIO clock */ 50 /* enable GPIO clock */
53 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO); 51 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
54
55 /* unmask GPIO edge detection for all 4 banks - APMASKx */
56 for (i = 0; i < 4; i++)
57 __raw_writel(0xffffffff, APMASK(i));
58
59 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
60} 52}
61 53
62void __init pxa168_init_irq(void) 54void __init pxa168_init_irq(void)
@@ -174,6 +166,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
174PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); 166PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
175PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); 167PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
176 168
169struct resource pxa168_resource_gpio[] = {
170 {
171 .start = 0xd4019000,
172 .end = 0xd4019fff,
173 .flags = IORESOURCE_MEM,
174 }, {
175 .start = IRQ_PXA168_GPIOX,
176 .end = IRQ_PXA168_GPIOX,
177 .flags = IORESOURCE_IRQ,
178 },
179};
180
181struct platform_device pxa168_device_gpio = {
182 .name = "pxa-gpio",
183 .id = -1,
184 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
185 .resource = pxa168_resource_gpio,
186};
187
177struct resource pxa168_usb_host_resources[] = { 188struct resource pxa168_usb_host_resources[] = {
178 /* USB Host conroller register base */ 189 /* USB Host conroller register base */
179 [0] = { 190 [0] = {
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbba39fc..7b992ced095c 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/platform_device.h>
15 16
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <mach/addr-map.h> 18#include <mach/addr-map.h>
@@ -19,7 +20,6 @@
19#include <mach/regs-apmu.h> 20#include <mach/regs-apmu.h>
20#include <mach/cputype.h> 21#include <mach/cputype.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/gpio-pxa.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/mfp.h> 24#include <mach/mfp.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
@@ -77,20 +77,12 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
77 MFP_ADDR_END, 77 MFP_ADDR_END,
78}; 78};
79 79
80#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
81
82static void __init pxa910_init_gpio(void) 80static void __init pxa910_init_gpio(void)
83{ 81{
84 int i; 82 int i;
85 83
86 /* enable GPIO clock */ 84 /* enable GPIO clock */
87 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO); 85 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
88
89 /* unmask GPIO edge detection for all 4 banks - APMASKx */
90 for (i = 0; i < 4; i++)
91 __raw_writel(0xffffffff, APMASK(i));
92
93 pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
94} 86}
95 87
96void __init pxa910_init_irq(void) 88void __init pxa910_init_irq(void)
@@ -179,3 +171,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
179PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); 171PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
180PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); 172PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
181PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 173PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
174
175struct resource pxa910_resource_gpio[] = {
176 {
177 .start = 0xd4019000,
178 .end = 0xd4019fff,
179 .flags = IORESOURCE_MEM,
180 }, {
181 .start = IRQ_PXA910_AP_GPIO,
182 .end = IRQ_PXA910_AP_GPIO,
183 .flags = IORESOURCE_IRQ,
184 },
185};
186
187struct platform_device pxa910_device_gpio = {
188 .name = "pxa-gpio",
189 .id = -1,
190 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
191 .resource = pxa910_resource_gpio,
192};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 331f5f358b59..bb2ddb72bca2 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -94,6 +94,7 @@ static void __init tavorevb_init(void)
94 94
95 /* on-chip devices */ 95 /* on-chip devices */
96 pxa910_add_uart(1); 96 pxa910_add_uart(1);
97 platform_device_register(&pxa910_device_gpio);
97 98
98 /* off-chip devices */ 99 /* off-chip devices */
99 platform_device_register(&smc91x_device); 100 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 825a01cdcccd..703de85b571c 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
78 pxa168_add_uart(1); 78 pxa168_add_uart(1);
79 pxa168_add_keypad(&teton_bga_keypad_info); 79 pxa168_add_keypad(&teton_bga_keypad_info);
80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); 80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
81 platform_device_register(&pxa168_device_gpio);
81} 82}
82 83
83MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") 84MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index fac0d5d9d464..a80ed262df1c 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -123,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
123}; 123};
124 124
125static struct platform_device *ttc_dkb_devices[] = { 125static struct platform_device *ttc_dkb_devices[] = {
126 &pxa910_device_gpio,
126 &ttc_dkb_device_onenand, 127 &ttc_dkb_device_onenand,
127}; 128};
128 129
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e0425404de5..5bc13121eac5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -1051,6 +1051,36 @@ struct platform_device pxa3xx_device_ssp4 = {
1051}; 1051};
1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ 1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1053 1053
1054struct resource pxa_resource_gpio[] = {
1055 {
1056 .start = 0x40e00000,
1057 .end = 0x40e0ffff,
1058 .flags = IORESOURCE_MEM,
1059 }, {
1060 .start = IRQ_GPIO0,
1061 .end = IRQ_GPIO0,
1062 .name = "gpio0",
1063 .flags = IORESOURCE_IRQ,
1064 }, {
1065 .start = IRQ_GPIO1,
1066 .end = IRQ_GPIO1,
1067 .name = "gpio1",
1068 .flags = IORESOURCE_IRQ,
1069 }, {
1070 .start = IRQ_GPIO_2_x,
1071 .end = IRQ_GPIO_2_x,
1072 .name = "gpio_mux",
1073 .flags = IORESOURCE_IRQ,
1074 },
1075};
1076
1077struct platform_device pxa_device_gpio = {
1078 .name = "pxa-gpio",
1079 .id = -1,
1080 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1081 .resource = pxa_resource_gpio,
1082};
1083
1054/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1084/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1055 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1085 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1056void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1086void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b35757..1475db107254 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;
16extern struct platform_device sa1100_device_rtc; 16extern struct platform_device sa1100_device_rtc;
17extern struct platform_device pxa_device_rtc; 17extern struct platform_device pxa_device_rtc;
18extern struct platform_device pxa_device_ac97; 18extern struct platform_device pxa_device_ac97;
19extern struct platform_device pxa_device_gpio;
19 20
20extern struct platform_device pxa27x_device_i2c_power; 21extern struct platform_device pxa27x_device_i2c_power;
21extern struct platform_device pxa27x_device_ohci; 22extern struct platform_device pxa27x_device_ohci;
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 134b3bc332cd..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define gpio_to_bank(gpio) ((gpio) >> 5)
97
98#ifdef CONFIG_CPU_PXA26x
99/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
100 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
101 */
102static inline int __gpio_is_inverted(unsigned gpio)
103{
104 return cpu_is_pxa25x() && gpio > 85;
105}
106#else
107static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
108#endif
109
110/*
111 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
112 * function of a GPIO, and GPDRx cannot be altered once configured. It
113 * is attributed as "occupied" here (I know this terminology isn't
114 * accurate, you are welcome to propose a better one :-)
115 */
116static inline int __gpio_is_occupied(unsigned gpio)
117{
118 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
119 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
120 int dir = GPDR(gpio) & GPIO_bit(gpio);
121
122 if (__gpio_is_inverted(gpio))
123 return af != 1 || dir == 0;
124 else
125 return af != 0 || dir != 0;
126 } else
127 return GPDR(gpio) & GPIO_bit(gpio);
128}
129
130#include <plat/gpio-pxa.h>
131#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 561cdbfd7ccf..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,7 +25,8 @@
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */ 28
29#include "gpio-pxa.h" 29#include <mach/irqs.h>
30#include <mach/hardware.h>
30 31
31#endif 32#endif
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index a7f912f5ea2f..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,8 +131,6 @@
131#define PCC_VS2 (1 << 1) 131#define PCC_VS2 (1 << 1)
132#define PCC_VS1 (1 << 0) 132#define PCC_VS1 (1 << 0)
133 133
134#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
135
136/* A listing of interrupts used by external hardware devices */ 134/* A listing of interrupts used by external hardware devices */
137 135
138#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5) 136#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index e20ac1b64b00..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,8 +1,6 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <mach/gpio-pxa.h>
5
6#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
7 5
8#define LITTLETON_GPIO_LCD_CS (17) 6#define LITTLETON_GPIO_LCD_CS (17)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 36c538f48fa6..5dae15ea6718 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/gpio-pxa.h>
26 25
27#include "generic.h" 26#include "generic.h"
28 27
@@ -122,7 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
122 } while (1); 121 } while (1);
123} 122}
124 123
125void __init pxa_init_irq(int irq_nr, set_wake_t fn) 124void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
126{ 125{
127 int irq, i, n; 126 int irq, i, n;
128 127
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f6861ca3..f14775536b83 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/gpio-pxa.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/init.h> 19#include <linux/init.h>
@@ -20,7 +21,6 @@
20 21
21#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
22#include <mach/mfp-pxa2xx.h> 23#include <mach/mfp-pxa2xx.h>
23#include <mach/gpio-pxa.h>
24 24
25#include "generic.h" 25#include "generic.h"
26 26
@@ -29,6 +29,10 @@
29#define GAFR_L(x) __GAFR(0, x) 29#define GAFR_L(x) __GAFR(0, x)
30#define GAFR_U(x) __GAFR(1, x) 30#define GAFR_U(x) __GAFR(1, x)
31 31
32#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35
32#define PWER_WE35 (1 << 24) 36#define PWER_WE35 (1 << 24)
33 37
34struct gpio_desc { 38struct gpio_desc {
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 0f38cfce5c35..91e4f6c03766 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
17 * need be. 17 * need be.
18 */ 18 */
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/gpio-pxa.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -312,14 +313,12 @@ set_pwer:
312void __init pxa25x_init_irq(void) 313void __init pxa25x_init_irq(void)
313{ 314{
314 pxa_init_irq(32, pxa25x_set_wake); 315 pxa_init_irq(32, pxa25x_set_wake);
315 pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
316} 316}
317 317
318#ifdef CONFIG_CPU_PXA26x 318#ifdef CONFIG_CPU_PXA26x
319void __init pxa26x_init_irq(void) 319void __init pxa26x_init_irq(void)
320{ 320{
321 pxa_init_irq(32, pxa25x_set_wake); 321 pxa_init_irq(32, pxa25x_set_wake);
322 pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
323} 322}
324#endif 323#endif
325 324
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 44563a0997bd..aed6cbcf3866 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/gpio-pxa.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
@@ -386,7 +387,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
386void __init pxa27x_init_irq(void) 387void __init pxa27x_init_irq(void)
387{ 388{
388 pxa_init_irq(34, pxa27x_set_wake); 389 pxa_init_irq(34, pxa27x_set_wake);
389 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
390} 390}
391 391
392static struct map_desc pxa27x_io_desc[] __initdata = { 392static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +422,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
422} 422}
423 423
424static struct platform_device *devices[] __initdata = { 424static struct platform_device *devices[] __initdata = {
425 &pxa_device_gpio,
425 &pxa27x_device_udc, 426 &pxa27x_device_udc,
426 &pxa_device_pmu, 427 &pxa_device_pmu,
427 &pxa_device_i2s, 428 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 0737c59b88ae..06cfe348c709 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/suspend.h> 26#include <asm/suspend.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/gpio-pxa.h>
29#include <mach/pxa3xx-regs.h> 28#include <mach/pxa3xx-regs.h>
30#include <mach/reset.h> 29#include <mach/reset.h>
31#include <mach/ohci.h> 30#include <mach/ohci.h>
@@ -365,7 +364,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
365 .irq_set_type = pxa_set_ext_wakeup_type, 364 .irq_set_type = pxa_set_ext_wakeup_type,
366}; 365};
367 366
368static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 367static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
368 unsigned int))
369{ 369{
370 int irq; 370 int irq;
371 371
@@ -388,7 +388,6 @@ void __init pxa3xx_init_irq(void)
388 388
389 pxa_init_irq(56, pxa3xx_set_wake); 389 pxa_init_irq(56, pxa3xx_set_wake);
390 pxa_init_ext_wakeup_irq(pxa3xx_set_wake); 390 pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
391 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
392} 391}
393 392
394static struct map_desc pxa3xx_io_desc[] __initdata = { 393static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +416,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
417} 416}
418 417
419static struct platform_device *devices[] __initdata = { 418static struct platform_device *devices[] __initdata = {
419 &pxa_device_gpio,
420 &pxa27x_device_udc, 420 &pxa27x_device_udc,
421 &pxa_device_pmu, 421 &pxa_device_pmu,
422 &pxa_device_i2s, 422 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b39d2a3..0961093dd033 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -20,7 +20,6 @@
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/gpio-pxa.h>
24#include <mach/pxa3xx-regs.h> 23#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h> 24#include <mach/pxa930.h>
26#include <mach/reset.h> 25#include <mach/reset.h>
@@ -235,7 +234,6 @@ static struct clk_lookup pxa95x_clkregs[] = {
235void __init pxa95x_init_irq(void) 234void __init pxa95x_init_irq(void)
236{ 235{
237 pxa_init_irq(96, NULL); 236 pxa_init_irq(96, NULL);
238 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
239} 237}
240 238
241/* 239/*
@@ -248,6 +246,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248} 246}
249 247
250static struct platform_device *devices[] __initdata = { 248static struct platform_device *devices[] __initdata = {
249 &pxa_device_gpio,
251 &sa1100_device_rtc, 250 &sa1100_device_rtc,
252 &pxa_device_rtc, 251 &pxa_device_rtc,
253 &pxa27x_device_ssp1, 252 &pxa27x_device_ssp1,
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index 15bf9be051e8..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,45 +0,0 @@
1#ifndef __PLAT_PXA_GPIO_H
2#define __PLAT_PXA_GPIO_H
3
4struct irq_data;
5
6/*
7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
8 * one set of registers. The register offsets are organized below:
9 *
10 * GPLR GPDR GPSR GPCR GRER GFER GEDR
11 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
12 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
13 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
14 *
15 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
16 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
17 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
18 *
19 * NOTE:
20 * BANK 3 is only available on PXA27x and later processors.
21 * BANK 4 and 5 are only available on PXA935
22 */
23
24#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
25
26#define GPLR_OFFSET 0x00
27#define GPDR_OFFSET 0x0C
28#define GPSR_OFFSET 0x18
29#define GPCR_OFFSET 0x24
30#define GRER_OFFSET 0x30
31#define GFER_OFFSET 0x3C
32#define GEDR_OFFSET 0x48
33
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space, the
36 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
37 */
38extern int pxa_last_gpio;
39
40typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
41
42extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
43extern int pxa_irq_to_gpio(int irq);
44
45#endif /* __PLAT_PXA_GPIO_H */
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 8482a23887dc..aa0b94ff36d0 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -141,6 +141,12 @@ config GPIO_PL061
141 help 141 help
142 Say yes here to support the PrimeCell PL061 GPIO device 142 Say yes here to support the PrimeCell PL061 GPIO device
143 143
144config GPIO_PXA
145 bool "PXA GPIO support"
146 depends on ARCH_PXA || ARCH_MMP
147 help
148 Say yes here to support the PXA GPIO device
149
144config GPIO_XILINX 150config GPIO_XILINX
145 bool "Xilinx GPIO support" 151 bool "Xilinx GPIO support"
146 depends on PPC_OF || MICROBLAZE 152 depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index dbcb0bcfd8da..5b2b9e26f49c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,7 +40,7 @@ obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o 40obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o 41obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o 42obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
43obj-$(CONFIG_PLAT_PXA) += gpio-pxa.o 43obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o 44obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o 45obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o
46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o 46obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 31d2da4100cd..079f97fde2c7 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -12,13 +12,42 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/gpio-pxa.h>
15#include <linux/init.h> 16#include <linux/init.h>
16#include <linux/irq.h> 17#include <linux/irq.h>
17#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/platform_device.h>
18#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
19#include <linux/slab.h> 21#include <linux/slab.h>
20 22
21#include <mach/gpio-pxa.h> 23/*
24 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
25 * one set of registers. The register offsets are organized below:
26 *
27 * GPLR GPDR GPSR GPCR GRER GFER GEDR
28 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
29 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
30 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
31 *
32 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
33 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
34 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
35 *
36 * NOTE:
37 * BANK 3 is only available on PXA27x and later processors.
38 * BANK 4 and 5 are only available on PXA935
39 */
40
41#define GPLR_OFFSET 0x00
42#define GPDR_OFFSET 0x0C
43#define GPSR_OFFSET 0x18
44#define GPCR_OFFSET 0x24
45#define GRER_OFFSET 0x30
46#define GFER_OFFSET 0x3C
47#define GEDR_OFFSET 0x48
48#define GAFR_OFFSET 0x54
49
50#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
22 51
23int pxa_last_gpio; 52int pxa_last_gpio;
24 53
@@ -52,6 +81,7 @@ enum {
52static DEFINE_SPINLOCK(gpio_lock); 81static DEFINE_SPINLOCK(gpio_lock);
53static struct pxa_gpio_chip *pxa_gpio_chips; 82static struct pxa_gpio_chip *pxa_gpio_chips;
54static int gpio_type; 83static int gpio_type;
84static void __iomem *gpio_reg_base;
55 85
56#define for_each_gpio_chip(i, c) \ 86#define for_each_gpio_chip(i, c) \
57 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) 87 for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@@ -76,6 +106,53 @@ static inline int gpio_is_mmp_type(int type)
76 return (type & MMP_GPIO) != 0; 106 return (type & MMP_GPIO) != 0;
77} 107}
78 108
109/* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted,
110 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
111 */
112static inline int __gpio_is_inverted(int gpio)
113{
114 if ((gpio_type == PXA26X_GPIO) && (gpio > 85))
115 return 1;
116 return 0;
117}
118
119/*
120 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
121 * function of a GPIO, and GPDRx cannot be altered once configured. It
122 * is attributed as "occupied" here (I know this terminology isn't
123 * accurate, you are welcome to propose a better one :-)
124 */
125static inline int __gpio_is_occupied(unsigned gpio)
126{
127 struct pxa_gpio_chip *pxachip;
128 void __iomem *base;
129 unsigned long gafr = 0, gpdr = 0;
130 int ret, af = 0, dir = 0;
131
132 pxachip = gpio_to_pxachip(gpio);
133 base = gpio_chip_base(&pxachip->chip);
134 gpdr = readl_relaxed(base + GPDR_OFFSET);
135
136 switch (gpio_type) {
137 case PXA25X_GPIO:
138 case PXA26X_GPIO:
139 case PXA27X_GPIO:
140 gafr = readl_relaxed(base + GAFR_OFFSET);
141 af = (gafr >> ((gpio & 0xf) * 2)) & 0x3;
142 dir = gpdr & GPIO_bit(gpio);
143
144 if (__gpio_is_inverted(gpio))
145 ret = (af != 1) || (dir == 0);
146 else
147 ret = (af != 0) || (dir != 0);
148 break;
149 default:
150 ret = gpdr & GPIO_bit(gpio);
151 break;
152 }
153 return ret;
154}
155
79#ifdef CONFIG_ARCH_PXA 156#ifdef CONFIG_ARCH_PXA
80static inline int __pxa_gpio_to_irq(int gpio) 157static inline int __pxa_gpio_to_irq(int gpio)
81{ 158{
@@ -187,7 +264,7 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
187 (value ? GPSR_OFFSET : GPCR_OFFSET)); 264 (value ? GPSR_OFFSET : GPCR_OFFSET));
188} 265}
189 266
190static int __init pxa_init_gpio_chip(int gpio_end) 267static int __devinit pxa_init_gpio_chip(int gpio_end)
191{ 268{
192 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1; 269 int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
193 struct pxa_gpio_chip *chips; 270 struct pxa_gpio_chip *chips;
@@ -202,7 +279,7 @@ static int __init pxa_init_gpio_chip(int gpio_end)
202 struct gpio_chip *c = &chips[i].chip; 279 struct gpio_chip *c = &chips[i].chip;
203 280
204 sprintf(chips[i].label, "gpio-%d", i); 281 sprintf(chips[i].label, "gpio-%d", i);
205 chips[i].regbase = GPIO_BANK(i); 282 chips[i].regbase = gpio_reg_base + BANK_OFF(i);
206 283
207 c->base = gpio; 284 c->base = gpio;
208 c->label = chips[i].label; 285 c->label = chips[i].label;
@@ -384,17 +461,35 @@ static int pxa_gpio_nums(void)
384 return count; 461 return count;
385} 462}
386 463
387void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) 464static int __devinit pxa_gpio_probe(struct platform_device *pdev)
388{ 465{
389 struct pxa_gpio_chip *c; 466 struct pxa_gpio_chip *c;
467 struct resource *res;
390 int gpio, irq; 468 int gpio, irq;
469 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
391 470
392 pxa_last_gpio = pxa_gpio_nums(); 471 pxa_last_gpio = pxa_gpio_nums();
393 if (!pxa_last_gpio) 472 if (!pxa_last_gpio)
394 return; 473 return -EINVAL;
474
475 irq0 = platform_get_irq_byname(pdev, "gpio0");
476 irq1 = platform_get_irq_byname(pdev, "gpio1");
477 irq_mux = platform_get_irq_byname(pdev, "gpio_mux");
478 if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0)
479 || (irq_mux <= 0))
480 return -EINVAL;
481 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
482 if (!res)
483 return -EINVAL;
484 gpio_reg_base = ioremap(res->start, resource_size(res));
485 if (!gpio_reg_base)
486 return -EINVAL;
487
488 if (irq0 > 0)
489 gpio_offset = 2;
395 490
396 /* Initialize GPIO chips */ 491 /* Initialize GPIO chips */
397 pxa_init_gpio_chip(end); 492 pxa_init_gpio_chip(pxa_last_gpio);
398 493
399 /* clear all GPIO edge detects */ 494 /* clear all GPIO edge detects */
400 for_each_gpio_chip(gpio, c) { 495 for_each_gpio_chip(gpio, c) {
@@ -417,16 +512,29 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
417 irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler); 512 irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);
418#endif 513#endif
419 514
420 for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { 515 for (irq = gpio_to_irq(gpio_offset);
516 irq <= gpio_to_irq(pxa_last_gpio); irq++) {
421 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, 517 irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
422 handle_edge_irq); 518 handle_edge_irq);
423 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 519 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
424 } 520 }
425 521
426 /* Install handler for GPIO>=2 edge detect interrupts */ 522 irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);
427 irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler); 523 return 0;
428 pxa_muxed_gpio_chip.irq_set_wake = fn; 524}
525
526static struct platform_driver pxa_gpio_driver = {
527 .probe = pxa_gpio_probe,
528 .driver = {
529 .name = "pxa-gpio",
530 },
531};
532
533static int __init pxa_gpio_init(void)
534{
535 return platform_driver_register(&pxa_gpio_driver);
429} 536}
537postcore_initcall(pxa_gpio_init);
430 538
431#ifdef CONFIG_PM 539#ifdef CONFIG_PM
432static int pxa_gpio_suspend(void) 540static int pxa_gpio_suspend(void)
@@ -470,3 +578,10 @@ struct syscore_ops pxa_gpio_syscore_ops = {
470 .suspend = pxa_gpio_suspend, 578 .suspend = pxa_gpio_suspend,
471 .resume = pxa_gpio_resume, 579 .resume = pxa_gpio_resume,
472}; 580};
581
582static int __init pxa_gpio_sysinit(void)
583{
584 register_syscore_ops(&pxa_gpio_syscore_ops);
585 return 0;
586}
587postcore_initcall(pxa_gpio_sysinit);
diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h
new file mode 100644
index 000000000000..05071ee34c3f
--- /dev/null
+++ b/include/linux/gpio-pxa.h
@@ -0,0 +1,16 @@
1#ifndef __GPIO_PXA_H
2#define __GPIO_PXA_H
3
4#define GPIO_bit(x) (1 << ((x) & 0x1f))
5
6#define gpio_to_bank(gpio) ((gpio) >> 5)
7
8/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
9 * Those cases currently cause holes in the GPIO number space, the
10 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
11 */
12extern int pxa_last_gpio;
13
14extern int pxa_irq_to_gpio(int irq);
15
16#endif /* __GPIO_PXA_H */