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-rw-r--r--Documentation/devicetree/bindings/arm/gic.txt35
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
-rw-r--r--Documentation/devicetree/booting-without-of.txt55
-rw-r--r--include/linux/of_irq.h12
4 files changed, 72 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt
index 9b4b82a721b6..62eb8df1e08d 100644
--- a/Documentation/devicetree/bindings/arm/gic.txt
+++ b/Documentation/devicetree/bindings/arm/gic.txt
@@ -11,7 +11,9 @@ have PPIs or SGIs.
11Main node required properties: 11Main node required properties:
12 12
13- compatible : should be one of: 13- compatible : should be one of:
14 "arm,cortex-a15-gic"
14 "arm,cortex-a9-gic" 15 "arm,cortex-a9-gic"
16 "arm,cortex-a7-gic"
15 "arm,arm11mp-gic" 17 "arm,arm11mp-gic"
16- interrupt-controller : Identifies the node as an interrupt controller 18- interrupt-controller : Identifies the node as an interrupt controller
17- #interrupt-cells : Specifies the number of cells needed to encode an 19- #interrupt-cells : Specifies the number of cells needed to encode an
@@ -39,8 +41,9 @@ Main node required properties:
39 the GIC cpu interface register base and size. 41 the GIC cpu interface register base and size.
40 42
41Optional 43Optional
42- interrupts : Interrupt source of the parent interrupt controller. Only 44- interrupts : Interrupt source of the parent interrupt controller on
43 present on secondary GICs. 45 secondary GICs, or VGIC maintainance interrupt on primary GIC (see
46 below).
44 47
45- cpu-offset : per-cpu offset within the distributor and cpu interface 48- cpu-offset : per-cpu offset within the distributor and cpu interface
46 regions, used when the GIC doesn't have banked registers. The offset is 49 regions, used when the GIC doesn't have banked registers. The offset is
@@ -57,3 +60,31 @@ Example:
57 <0xfff10100 0x100>; 60 <0xfff10100 0x100>;
58 }; 61 };
59 62
63
64* GIC virtualization extensions (VGIC)
65
66For ARM cores that support the virtualization extensions, additional
67properties must be described (they only exist if the GIC is the
68primary interrupt controller).
69
70Required properties:
71
72- reg : Additional regions specifying the base physical address and
73 size of the VGIC registers. The first additional region is the GIC
74 virtual interface control register base and size. The 2nd additional
75 region is the GIC virtual cpu interface register base and size.
76
77- interrupts : VGIC maintainance interrupt.
78
79Example:
80
81 interrupt-controller@2c001000 {
82 compatible = "arm,cortex-a15-gic";
83 #interrupt-cells = <3>;
84 interrupt-controller;
85 reg = <0x2c001000 0x1000>,
86 <0x2c002000 0x1000>,
87 <0x2c004000 0x2000>,
88 <0x2c006000 0x2000>;
89 interrupts = <1 9 0xf04>;
90 };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 107d8addf0e4..6eab91747a86 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -14,6 +14,7 @@ chrp Common Hardware Reference Platform
14cortina Cortina Systems, Inc. 14cortina Cortina Systems, Inc.
15dallas Maxim Integrated Products (formerly Dallas Semiconductor) 15dallas Maxim Integrated Products (formerly Dallas Semiconductor)
16denx Denx Software Engineering 16denx Denx Software Engineering
17emmicro EM Microelectronic
17epson Seiko Epson Corp. 18epson Seiko Epson Corp.
18est ESTeem Wireless Modems 19est ESTeem Wireless Modems
19fsl Freescale Semiconductor 20fsl Freescale Semiconductor
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index da0bfeb4253d..d4d66757354e 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -551,12 +551,13 @@ Here is an example of a simple device-tree. In this example, an "o"
551designates a node followed by the node unit name. Properties are 551designates a node followed by the node unit name. Properties are
552presented with their name followed by their content. "content" 552presented with their name followed by their content. "content"
553represents an ASCII string (zero terminated) value, while <content> 553represents an ASCII string (zero terminated) value, while <content>
554represents a 32-bit hexadecimal value. The various nodes in this 554represents a 32-bit value, specified in decimal or hexadecimal (the
555example will be discussed in a later chapter. At this point, it is 555latter prefixed 0x). The various nodes in this example will be
556only meant to give you a idea of what a device-tree looks like. I have 556discussed in a later chapter. At this point, it is only meant to give
557purposefully kept the "name" and "linux,phandle" properties which 557you a idea of what a device-tree looks like. I have purposefully kept
558aren't necessary in order to give you a better idea of what the tree 558the "name" and "linux,phandle" properties which aren't necessary in
559looks like in practice. 559order to give you a better idea of what the tree looks like in
560practice.
560 561
561 / o device-tree 562 / o device-tree
562 |- name = "device-tree" 563 |- name = "device-tree"
@@ -576,14 +577,14 @@ looks like in practice.
576 | |- name = "PowerPC,970" 577 | |- name = "PowerPC,970"
577 | |- device_type = "cpu" 578 | |- device_type = "cpu"
578 | |- reg = <0> 579 | |- reg = <0>
579 | |- clock-frequency = <5f5e1000> 580 | |- clock-frequency = <0x5f5e1000>
580 | |- 64-bit 581 | |- 64-bit
581 | |- linux,phandle = <2> 582 | |- linux,phandle = <2>
582 | 583 |
583 o memory@0 584 o memory@0
584 | |- name = "memory" 585 | |- name = "memory"
585 | |- device_type = "memory" 586 | |- device_type = "memory"
586 | |- reg = <00000000 00000000 00000000 20000000> 587 | |- reg = <0x00000000 0x00000000 0x00000000 0x20000000>
587 | |- linux,phandle = <3> 588 | |- linux,phandle = <3>
588 | 589 |
589 o chosen 590 o chosen
@@ -1010,8 +1011,8 @@ compatibility.
1010 #size-cells = <1>; 1011 #size-cells = <1>;
1011 #interrupt-cells = <2>; 1012 #interrupt-cells = <2>;
1012 device_type = "soc"; 1013 device_type = "soc";
1013 ranges = <00000000 e0000000 00100000> 1014 ranges = <0x00000000 0xe0000000 0x00100000>
1014 reg = <e0000000 00003000>; 1015 reg = <0xe0000000 0x00003000>;
1015 bus-frequency = <0>; 1016 bus-frequency = <0>;
1016 } 1017 }
1017 1018
@@ -1085,16 +1086,16 @@ supported currently at the toplevel.
1085 * terminated string 1086 * terminated string
1086 */ 1087 */
1087 1088
1088 property2 = <1234abcd>; /* define a property containing a 1089 property2 = <0x1234abcd>; /* define a property containing a
1089 * numerical 32-bit value (hexadecimal) 1090 * numerical 32-bit value (hexadecimal)
1090 */ 1091 */
1091 1092
1092 property3 = <12345678 12345678 deadbeef>; 1093 property3 = <0x12345678 0x12345678 0xdeadbeef>;
1093 /* define a property containing 3 1094 /* define a property containing 3
1094 * numerical 32-bit values (cells) in 1095 * numerical 32-bit values (cells) in
1095 * hexadecimal 1096 * hexadecimal
1096 */ 1097 */
1097 property4 = [0a 0b 0c 0d de ea ad be ef]; 1098 property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef];
1098 /* define a property whose content is 1099 /* define a property whose content is
1099 * an arbitrary array of bytes 1100 * an arbitrary array of bytes
1100 */ 1101 */
@@ -1350,10 +1351,10 @@ Appendix A - Sample SOC node for MPC8540
1350 model = "TSEC"; 1351 model = "TSEC";
1351 compatible = "gianfar", "simple-bus"; 1352 compatible = "gianfar", "simple-bus";
1352 reg = <0x24000 0x1000>; 1353 reg = <0x24000 0x1000>;
1353 local-mac-address = [ 00 E0 0C 00 73 00 ]; 1354 local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ];
1354 interrupts = <29 2 30 2 34 2>; 1355 interrupts = <0x29 2 0x30 2 0x34 2>;
1355 phy-handle = <&phy0>; 1356 phy-handle = <&phy0>;
1356 sleep = <&pmc 00000080>; 1357 sleep = <&pmc 0x00000080>;
1357 ranges; 1358 ranges;
1358 1359
1359 mdio@24520 { 1360 mdio@24520 {
@@ -1385,10 +1386,10 @@ Appendix A - Sample SOC node for MPC8540
1385 model = "TSEC"; 1386 model = "TSEC";
1386 compatible = "gianfar"; 1387 compatible = "gianfar";
1387 reg = <0x25000 0x1000>; 1388 reg = <0x25000 0x1000>;
1388 local-mac-address = [ 00 E0 0C 00 73 01 ]; 1389 local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ];
1389 interrupts = <13 2 14 2 18 2>; 1390 interrupts = <0x13 2 0x14 2 0x18 2>;
1390 phy-handle = <&phy1>; 1391 phy-handle = <&phy1>;
1391 sleep = <&pmc 00000040>; 1392 sleep = <&pmc 0x00000040>;
1392 }; 1393 };
1393 1394
1394 ethernet@26000 { 1395 ethernet@26000 {
@@ -1396,17 +1397,17 @@ Appendix A - Sample SOC node for MPC8540
1396 model = "FEC"; 1397 model = "FEC";
1397 compatible = "gianfar"; 1398 compatible = "gianfar";
1398 reg = <0x26000 0x1000>; 1399 reg = <0x26000 0x1000>;
1399 local-mac-address = [ 00 E0 0C 00 73 02 ]; 1400 local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ];
1400 interrupts = <41 2>; 1401 interrupts = <0x41 2>;
1401 phy-handle = <&phy3>; 1402 phy-handle = <&phy3>;
1402 sleep = <&pmc 00000020>; 1403 sleep = <&pmc 0x00000020>;
1403 }; 1404 };
1404 1405
1405 serial@4500 { 1406 serial@4500 {
1406 #address-cells = <1>; 1407 #address-cells = <1>;
1407 #size-cells = <1>; 1408 #size-cells = <1>;
1408 compatible = "fsl,mpc8540-duart", "simple-bus"; 1409 compatible = "fsl,mpc8540-duart", "simple-bus";
1409 sleep = <&pmc 00000002>; 1410 sleep = <&pmc 0x00000002>;
1410 ranges; 1411 ranges;
1411 1412
1412 serial@4500 { 1413 serial@4500 {
@@ -1414,7 +1415,7 @@ Appendix A - Sample SOC node for MPC8540
1414 compatible = "ns16550"; 1415 compatible = "ns16550";
1415 reg = <0x4500 0x100>; 1416 reg = <0x4500 0x100>;
1416 clock-frequency = <0>; 1417 clock-frequency = <0>;
1417 interrupts = <42 2>; 1418 interrupts = <0x42 2>;
1418 }; 1419 };
1419 1420
1420 serial@4600 { 1421 serial@4600 {
@@ -1422,7 +1423,7 @@ Appendix A - Sample SOC node for MPC8540
1422 compatible = "ns16550"; 1423 compatible = "ns16550";
1423 reg = <0x4600 0x100>; 1424 reg = <0x4600 0x100>;
1424 clock-frequency = <0>; 1425 clock-frequency = <0>;
1425 interrupts = <42 2>; 1426 interrupts = <0x42 2>;
1426 }; 1427 };
1427 }; 1428 };
1428 1429
@@ -1436,11 +1437,11 @@ Appendix A - Sample SOC node for MPC8540
1436 }; 1437 };
1437 1438
1438 i2c@3000 { 1439 i2c@3000 {
1439 interrupts = <43 2>; 1440 interrupts = <0x43 2>;
1440 reg = <0x3000 0x100>; 1441 reg = <0x3000 0x100>;
1441 compatible = "fsl-i2c"; 1442 compatible = "fsl-i2c";
1442 dfsrr; 1443 dfsrr;
1443 sleep = <&pmc 00000004>; 1444 sleep = <&pmc 0x00000004>;
1444 }; 1445 };
1445 1446
1446 pmc: power@e0070 { 1447 pmc: power@e0070 {
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index d229ad3edee0..1717cd935e1c 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -11,7 +11,7 @@ struct of_irq;
11#include <linux/of.h> 11#include <linux/of.h>
12 12
13/* 13/*
14 * irq_of_parse_and_map() is used ba all OF enabled platforms; but SPARC 14 * irq_of_parse_and_map() is used by all OF enabled platforms; but SPARC
15 * implements it differently. However, the prototype is the same for all, 15 * implements it differently. However, the prototype is the same for all,
16 * so declare it here regardless of the CONFIG_OF_IRQ setting. 16 * so declare it here regardless of the CONFIG_OF_IRQ setting.
17 */ 17 */
@@ -76,5 +76,13 @@ extern struct device_node *of_irq_find_parent(struct device_node *child);
76extern void of_irq_init(const struct of_device_id *matches); 76extern void of_irq_init(const struct of_device_id *matches);
77 77
78#endif /* CONFIG_OF_IRQ */ 78#endif /* CONFIG_OF_IRQ */
79#endif /* CONFIG_OF */ 79
80#else /* !CONFIG_OF */
81static inline unsigned int irq_of_parse_and_map(struct device_node *dev,
82 int index)
83{
84 return 0;
85}
86#endif /* !CONFIG_OF */
87
80#endif /* __OF_IRQ_H */ 88#endif /* __OF_IRQ_H */